#
# gdb helper commands and functions for Linux kernel debugging
#
#  Kernel proc information reader
#
# Copyright (c) 2016 Linaro Ltd
#
# Authors:
#  Kieran Bingham <kieran.bingham@linaro.org>
#
# This work is licensed under the terms of the GNU GPL version 2.
#

import gdb
from linux import constants
from linux import utils
from linux import tasks
from linux import lists
from struct import *


class LxCmdLine(gdb.Command):
    """ Report the Linux Commandline used in the current kernel.
        Equivalent to cat /proc/cmdline on a running target"""

    def __init__(self):
        super(LxCmdLine, self).__init__("lx-cmdline", gdb.COMMAND_DATA)

    def invoke(self, arg, from_tty):
        gdb.write(gdb.parse_and_eval("saved_command_line").string() + "\n")


LxCmdLine()


class LxVersion(gdb.Command):
    """ Report the Linux Version of the current kernel.
        Equivalent to cat /proc/version on a running target"""

    def __init__(self):
        super(LxVersion, self).__init__("lx-version", gdb.COMMAND_DATA)

    def invoke(self, arg, from_tty):
        # linux_banner should contain a newline
        gdb.write(gdb.parse_and_eval("(char *)linux_banner").string())


LxVersion()


# Resource Structure Printers
#  /proc/iomem
#  /proc/ioports

def get_resources(resource, depth):
    while resource:
        yield resource, depth

        child = resource['child']
        if child:
            for res, deep in get_resources(child, depth + 1):
                yield res, deep

        resource = resource['sibling']


def show_lx_resources(resource_str):
        resource = gdb.parse_and_eval(resource_str)
        width = 4 if resource['end'] < 0x10000 else 8
        # Iterate straight to the first child
        for res, depth in get_resources(resource['child'], 0):
            start = int(res['start'])
            end = int(res['end'])
            gdb.write(" " * depth * 2 +
                      "{0:0{1}x}-".format(start, width) +
                      "{0:0{1}x} : ".format(end, width) +
                      res['name'].string() + "\n")


class LxIOMem(gdb.Command):
    """Identify the IO memory resource locations defined by the kernel

Equivalent to cat /proc/iomem on a running target"""

    def __init__(self):
        super(LxIOMem, self).__init__("lx-iomem", gdb.COMMAND_DATA)

    def invoke(self, arg, from_tty):
        return show_lx_resources("iomem_resource")


LxIOMem()


class LxIOPorts(gdb.Command):
    """Identify the IO port resource locations defined by the kernel

Equivalent to cat /proc/ioports on a running target"""

    def __init__(self):
        super(LxIOPorts, self).__init__("lx-ioports", gdb.COMMAND_DATA)

    def invoke(self, arg, from_tty):
        return show_lx_resources("ioport_resource")


LxIOPorts()


# Mount namespace viewer
#  /proc/mounts

def info_opts(lst, opt):
    opts = ""
    for key, string in lst.items():
        if opt & key:
            opts += string
    return opts


FS_INFO = {constants.LX_SB_SYNCHRONOUS: ",sync",
           constants.LX_SB_MANDLOCK: ",mand",
           constants.LX_SB_DIRSYNC: ",dirsync",
           constants.LX_SB_NOATIME: ",noatime",
           constants.LX_SB_NODIRATIME: ",nodiratime"}

MNT_INFO = {constants.LX_MNT_NOSUID: ",nosuid",
            constants.LX_MNT_NODEV: ",nodev",
            constants.LX_MNT_NOEXEC: ",noexec",
            constants.LX_MNT_NOATIME: ",noatime",
            constants.LX_MNT_NODIRATIME: ",nodiratime",
            constants.LX_MNT_RELATIME: ",relatime"}

mount_type = utils.CachedType("struct mount")
mount_ptr_type = mount_type.get_type().pointer()


class LxMounts(gdb.Command):
    """Report the VFS mounts of the current process namespace.

Equivalent to cat /proc/mounts on a running target
An integer value can be supplied to display the mount
values of that process namespace"""

    def __init__(self):
        super(LxMounts, self).__init__("lx-mounts", gdb.COMMAND_DATA)

    # Equivalent to proc_namespace.c:show_vfsmnt
    # However, that has the ability to call into s_op functions
    # whereas we cannot and must make do with the information we can obtain.
    def invoke(self, arg, from_tty):
        argv = gdb.string_to_argv(arg)
        if len(argv) >= 1:
            try:
                pid = int(argv[0])
            except gdb.error:
                raise gdb.GdbError("Provide a PID as integer value")
        else:
            pid = 1

        task = tasks.get_task_by_pid(pid)
        if not task:
            raise gdb.GdbError("Couldn't find a process with PID {}"
                               .format(pid))

        namespace = task['nsproxy']['mnt_ns']
        if not namespace:
            raise gdb.GdbError("No namespace for current process")

        for vfs in lists.list_for_each_entry(namespace['list'],
                                             mount_ptr_type, "mnt_list"):
            devname = vfs['mnt_devname'].string()
            devname = devname if devname else "none"

            pathname = ""
            parent = vfs
            while True:
                mntpoint = parent['mnt_mountpoint']
                pathname = utils.dentry_name(mntpoint) + pathname
                if (parent == parent['mnt_parent']):
                    break
                parent = parent['mnt_parent']

            if (pathname == ""):
                pathname = "/"

            superblock = vfs['mnt']['mnt_sb']
            fstype = superblock['s_type']['name'].string()
            s_flags = int(superblock['s_flags'])
            m_flags = int(vfs['mnt']['mnt_flags'])
            rd = "ro" if (s_flags & constants.LX_SB_RDONLY) else "rw"

            gdb.write(
                "{} {} {} {}{}{} 0 0\n"
                .format(devname,
                        pathname,
                        fstype,
                        rd,
                        info_opts(FS_INFO, s_flags),
                        info_opts(MNT_INFO, m_flags)))


LxMounts()


class LxFdtDump(gdb.Command):
    """Output Flattened Device Tree header and dump FDT blob to the filename
       specified as the command argument. Equivalent to
       'cat /proc/fdt > fdtdump.dtb' on a running target"""

    def __init__(self):
        super(LxFdtDump, self).__init__("lx-fdtdump", gdb.COMMAND_DATA,
                                        gdb.COMPLETE_FILENAME)

    def fdthdr_to_cpu(self, fdt_header):

        fdt_header_be = ">IIIIIII"
        fdt_header_le = "<IIIIIII"

        if utils.get_target_endianness() == 1:
            output_fmt = fdt_header_le
        else:
            output_fmt = fdt_header_be

        return unpack(output_fmt, pack(fdt_header_be,
                                       fdt_header['magic'],
                                       fdt_header['totalsize'],
                                       fdt_header['off_dt_struct'],
                                       fdt_header['off_dt_strings'],
                                       fdt_header['off_mem_rsvmap'],
                                       fdt_header['version'],
                                       fdt_header['last_comp_version']))

    def invoke(self, arg, from_tty):

        if not constants.LX_CONFIG_OF:
            raise gdb.GdbError("Kernel not compiled with CONFIG_OF\n")

        if len(arg) == 0:
            filename = "fdtdump.dtb"
        else:
            filename = arg

        py_fdt_header_ptr = gdb.parse_and_eval(
            "(const struct fdt_header *) initial_boot_params")
        py_fdt_header = py_fdt_header_ptr.dereference()

        fdt_header = self.fdthdr_to_cpu(py_fdt_header)

        if fdt_header[0] != constants.LX_OF_DT_HEADER:
            raise gdb.GdbError("No flattened device tree magic found\n")

        gdb.write("fdt_magic:         0x{:02X}\n".format(fdt_header[0]))
        gdb.write("fdt_totalsize:     0x{:02X}\n".format(fdt_header[1]))
        gdb.write("off_dt_struct:     0x{:02X}\n".format(fdt_header[2]))
        gdb.write("off_dt_strings:    0x{:02X}\n".format(fdt_header[3]))
        gdb.write("off_mem_rsvmap:    0x{:02X}\n".format(fdt_header[4]))
        gdb.write("version:           {}\n".format(fdt_header[5]))
        gdb.write("last_comp_version: {}\n".format(fdt_header[6]))

        inf = gdb.inferiors()[0]
        fdt_buf = utils.read_memoryview(inf, py_fdt_header_ptr,
                                        fdt_header[1]).tobytes()

        try:
            f = open(filename, 'wb')
        except gdb.error:
            raise gdb.GdbError("Could not open file to dump fdt")

        f.write(fdt_buf)
        f.close()

        gdb.write("Dumped fdt blob to " + filename + "\n")


LxFdtDump()
</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/device-mapper/dm-crypt.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/device-mapper/dm-crypt.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/hw-vuln/core-scheduling.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/hw-vuln/core-scheduling.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/hw-vuln/srso.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/hw-vuln/srso.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/kernel-parameters.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/kernel-parameters.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/mm/ksm.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/mm/ksm.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/perf/hisi-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/hisi-pmu.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/perf/hns3-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/hns3-pmu.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/perf/qcom_l2_pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/qcom_l2_pmu.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/perf/qcom_l3_pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/qcom_l3_pmu.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/perf/thunderx2-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/thunderx2-pmu.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/perf/xgene-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/xgene-pmu.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/reporting-regressions.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/reporting-regressions.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/sysctl/net.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/sysctl/net.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/m68k/buddha-driver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/m68k/buddha-driver.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/s390/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/s390/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/arch/s390/mm.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/s390/mm.rst</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/s390/vfio-ap.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/s390/vfio-ap.rst</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/sparc/oradax/dax-hv-api.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/sparc/oradax/dax-hv-api.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/resctrl.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/x86/resctrl.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/xstate.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/x86/xstate.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/atomic_t.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/atomic_t.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/bpf/standardization/instruction-set.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/bpf/standardization/instruction-set.rst</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/conf.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/conf.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/dma-api-howto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/dma-api-howto.rst</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/entry.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/entry.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/printk-index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/printk-index.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/workqueue.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/workqueue.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/dev-tools/kcsan.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/dev-tools/kcsan.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/dev-tools/kselftest.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/dev-tools/kselftest.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/access-controllers/access-controllers.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/access-controllers/access-controllers.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/fsl.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/fsl.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/qcom.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/qcom.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/rockchip.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/rockchip.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/arm/sunxi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/sunxi.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/ata/ahci-da850.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ata/ahci-da850.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/ata/fsl,imx-pata.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ata/fsl,imx-pata.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/ata/imx-pata.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ata/imx-pata.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/clock/google,gs101-clock.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/omap-sham.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/omap-sham.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/ti,omap-sham.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/ti,omap-sham.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/panel-common-dual.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/panel-common-dual.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/dma/st,stm32-dma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/eeprom/at24.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/eeprom/at24.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/firmware/arm,scmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/firmware/arm,scmi.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/adc128d818.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/adc128d818.txt</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/as370.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/as370.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/ibm,opal-sensor.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ibm,opal-sensor.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/ibmpowernv.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ibmpowernv.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/lm87.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/lm87.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/max6650.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/max6650.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/maxim,max6650.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/maxim,max6650.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/pwm-fan.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/pwm-fan.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/st,stts751.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/st,stts751.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/stts751.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/stts751.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/syna,as370.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/syna,as370.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/ti,adc128d818.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ti,adc128d818.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/hwmon/ti,lm87.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ti,lm87.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/memory-controllers/samsung,s5pv210-dmc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/memory-controllers/samsung,s5pv210-dmc.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mmc/arm,pl18x.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/airoha,en8811h.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/airoha,en8811h.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/can/bosch,m_can.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/mediatek,net.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/mediatek,net.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/renesas,etheravb.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/renesas,etheravb.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/renesas,ethertsn.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/renesas,ethertsn.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/rockchip-dwmac.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/snps,dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/stm32-dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/stm32-dwmac.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/rng/st,stm32-rng.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/serial/st,stm32-uart.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/renesas/renesas.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/renesas/renesas.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/rockchip/grf.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/rockchip/grf.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/davinci-mcbsp.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,audmix.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,audmix.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,audmix.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,audmix.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,esai.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,esai.txt</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,esai.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,esai.yaml</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,imx-audio-spdif.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,imx-audio-spdif.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,sai.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,sai.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,spdif.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,spdif.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,ssi.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,ssi.txt</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,ssi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,ssi.yaml</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl-asoc-card.txt</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl-asoc-card.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl-asoc-card.yaml</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/imx-audio-spdif.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mediatek,mt2701-wm8960.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mediatek,mt2701-wm8960.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt2701-wm8960.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt2701-wm8960.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nuvoton,nau8325.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nuvoton,nau8325.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra20-das.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/renesas,rsnd.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/rt5645.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/rt5645.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/st,stm32-sai.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/ti,pcm1681.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/ti,pcm1681.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/ti,pcm1681.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/ti,pcm1681.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/ti,pcm6240.yaml</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/wlf,wm8776.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8974.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/wlf,wm8974.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/wlf,wm8974.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/wm8776.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/wm8776.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/spi-armada-3700.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/spi-armada-3700.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/st,stm32-spi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/ti,qspi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/ti,qspi.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/ti_qspi.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/ti_qspi.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/qcom-lmh.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/st,stih407-thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/st,stih407-thermal.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/st-thermal.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/st-thermal.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/trivial-devices.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/trivial-devices.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/usb/dwc2.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/usb/dwc2.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/vendor-prefixes.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/doc-guide/parse-headers.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/doc-guide/parse-headers.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/crypto/iaa/iaa-crypto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/crypto/iaa/iaa-crypto.rst</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/dma-buf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/dma-buf.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/driver-model/devres.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/driver-model/devres.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/eisa.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/eisa.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/gpio/driver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/gpio/driver.rst</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/gpio/legacy.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/gpio/legacy.rst</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/mtd/nand_ecc.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/mtd/nand_ecc.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/scsi.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/scsi.rst</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/usb/usb.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/usb/usb.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/wbrf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/wbrf.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/filesystems/directory-locking.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/filesystems/directory-locking.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/filesystems/efivarfs.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/filesystems/efivarfs.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/filesystems/porting.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/filesystems/porting.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/firmware-guide/acpi/namespace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/firmware-guide/acpi/namespace.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/gpu/amdgpu/debugging.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/amdgpu/debugging.rst</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/gpu/amdgpu/display/display-contributing.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/amdgpu/display/display-contributing.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/gpu/amdgpu/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/amdgpu/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/gpu/rfc/i915_vm_bind.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/rfc/i915_vm_bind.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/team.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/specs/team.yaml</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/devlink-info.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/devlink-info.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/devlink-port.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/devlink-port.rst</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/hns3.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/hns3.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/ice.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/ice.rst</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/nfp.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/nfp.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/dns_resolver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/dns_resolver.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/ethtool-netlink.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/ethtool-netlink.rst</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/filter.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/filter.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/nf_conntrack-sysctl.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/nf_conntrack-sysctl.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/networking/pse-pd/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/pse-pd/index.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/networking/pse-pd/introduction.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/pse-pd/introduction.rst</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/networking/pse-pd/pse-pi.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/pse-pd/pse-pi.rst</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/xfrm_proc.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/xfrm_proc.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/sound/kernel-api/writing-an-alsa-driver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sound/kernel-api/writing-an-alsa-driver.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/sound/soc/dapm-graph.svg?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sound/soc/dapm-graph.svg</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/sound/soc/dapm.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sound/soc/dapm.rst</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/sphinx/kernel_include.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sphinx/kernel_include.py</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/sphinx/kerneldoc-preamble.sty?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sphinx/kerneldoc-preamble.sty</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/spi/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/spi/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/spi/pxa2xx.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/spi/pxa2xx.rst</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/spi/spi-summary.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/spi/spi-summary.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/tee/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/tee/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/tee/ts-tee.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/tee/ts-tee.rst</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/timers/no_hz.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/timers/no_hz.rst</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/trace/fprobetrace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/fprobetrace.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/trace/ftrace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/ftrace.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/trace/kprobes.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/kprobes.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/trace/kprobetrace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/kprobetrace.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/trace/tracepoints.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/tracepoints.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/doc-guide/kernel-doc.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/doc-guide/kernel-doc.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/index.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/2.Process.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/2.Process.rst</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/4.Coding.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/4.Coding.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/7.AdvancedTopics.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/7.AdvancedTopics.rst</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/changes.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/changes.rst</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/coding-style.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/coding-style.rst</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/deprecated.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/deprecated.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/howto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/howto.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/index.rst</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/security-bugs.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/security-bugs.rst</a> (renamed from Documentation/translations/it_IT/admin-guide/security-bugs.rst)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/stable-kernel-rules.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/stable-kernel-rules.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/it_IT/process/submitting-patches.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/submitting-patches.rst</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_CN/scheduler/sched-domains.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/scheduler/sched-domains.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_CN/scheduler/sched-stats.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/scheduler/sched-stats.rst</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_TW/gpio.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_TW/gpio.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_TW/process/submit-checklist.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_TW/process/submit-checklist.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_TW/process/submitting-patches.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_TW/process/submitting-patches.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/netlink/genetlink-legacy.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/userspace-api/netlink/genetlink-legacy.rst</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/MAINTAINERS?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>MAINTAINERS</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/Kconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/Kconfig</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/core_apecs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/core_apecs.h</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/core_lca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/core_lca.h</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/core_t2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/core_t2.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/dma-mapping.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/dma-mapping.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/dma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/dma.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/elf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/io.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/io.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/irq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/irq.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/jensen.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/jensen.h</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/machvec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/machvec.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/mmu_context.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/special_insns.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/special_insns.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/tlbflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/tlbflush.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/uaccess.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/uaccess.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/asm/vga.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/vga.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/uapi/asm/compiler.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/uapi/asm/compiler.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/asm-offsets.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/asm-offsets.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/bugs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/bugs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/console.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/console.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_apecs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_apecs.c</a></td><td class='right'>420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_cia.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_cia.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_irongate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_irongate.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_lca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_lca.c</a></td><td class='right'>517</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_marvel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_marvel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_t2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_t2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/core_wildfire.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_wildfire.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/entry.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/io.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/irq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/irq_i8259.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/irq_i8259.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/machvec_impl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/machvec_impl.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/kernel/pci-noop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/pci-noop.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/pci_impl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/pci_impl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/perf_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/perf_event.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/proto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/proto.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/setup.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/smc37c669.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/smc37c669.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/smc37c93x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/smc37c93x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/smp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/srmcons.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/srmcons.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_cabriolet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_cabriolet.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_eb64p.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_eb64p.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_jensen.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_jensen.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_mikasa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_mikasa.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_nautilus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_nautilus.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_noritake.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_noritake.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_sable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_sable.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/alpha/kernel/sys_sio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_sio.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/syscalls/syscall.tbl?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/traps.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/lib/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/lib/checksum.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/checksum.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/lib/fpreg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/fpreg.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/lib/memcpy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/memcpy.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/alpha/lib/stycpy.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/stycpy.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/alpha/lib/styncpy.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/styncpy.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/math-emu/math.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/math-emu/math.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/mm/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/Kbuild?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/boot/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/boot/dts/axc003.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/dts/axc003.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/boot/dts/hsdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/dts/hsdk.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/boot/dts/vdk_axs10x_mb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/dts/vdk_axs10x_mb.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arc/include/asm/cachetype.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/cachetype.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/dsp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/dsp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/entry-compact.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/entry-compact.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/entry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/entry.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/irq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/irq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/irqflags-compact.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/irqflags-compact.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/mmu_context.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/pgtable-bits-arcv2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/pgtable-bits-arcv2.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/ptrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/ptrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/shmparam.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/shmparam.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/smp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/smp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/asm/thread_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/thread_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/include/uapi/asm/swab.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/uapi/asm/swab.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/entry-arcv2.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/entry-arcv2.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/entry.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/head.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/head.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/intc-arcv2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/intc-arcv2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/kprobes.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/perf_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/perf_event.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/signal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/signal.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/traps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/vmlinux.lds.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/mm/tlb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/mm/tlb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/mm/tlbex.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/mm/tlbex.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arc/net/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/net/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arc/net/bpf_jit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/net/bpf_jit.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arc/net/bpf_jit_arcv2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/net/bpf_jit_arcv2.c</a></td><td class='right'>3005</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arc/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/net/bpf_jit_core.c</a></td><td class='right'>1425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-a13.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun6i-a31.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a33.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun9i-a80.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2711.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm283x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm283x.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/microchip/at91-sama7g5ek.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nvidia/tegra20-paz00.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nvidia/tegra20-paz00.dts</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/e60k02.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/e60k02.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/e70k02.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/e70k02.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-mba53.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-ppd.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-novena.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sll.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx7s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx7s.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-apq8064.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-apq8084.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi</a></td><td class='right'>818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts</a></td><td class='right'>813</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts</a></td><td class='right'>574</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-sdx55.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r7s72100.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r7s72100.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a73a4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a73a4.dtsi</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7742.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7742.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7743.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7743.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7744.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7744.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7745.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7745.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a77470.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a77470.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7790.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7790.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7791.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7791.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7792.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7792.dtsi</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7793.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7793.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r8a7794.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7794.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/renesas/r9a06g032.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r9a06g032.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos3250.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos3250.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos4412-origen.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4412-origen.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos5250.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos5250.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos5420.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos5420.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/samsung/s5pv210.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/s5pv210.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32f746.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32f746.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32f769.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32f769.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp131.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp131.dtsi</a></td><td class='right'>1162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp133.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp133.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp135.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp135.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp135f-dk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp135f-dk.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp13xc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp13xc.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp13xf.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp13xf.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp151.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp151.dtsi</a></td><td class='right'>2801</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 11.2%;'/><td class='none' style='width: 76.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp153.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp153.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp157c-ed1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp157c-ed1.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/st/stm32mp15xc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp15xc.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/ti/omap/am33xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/am33xx.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/ti/omap/am4372.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/am4372.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/ti/omap/dra76x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/dra76x.dtsi</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/ti/omap/omap3-n900.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/omap3-n900.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/collie_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/collie_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/imx_v6_v7_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/imx_v6_v7_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/keystone_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/keystone_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/lpc18xx_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/lpc18xx_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/moxart_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/moxart_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/mps2_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/mps2_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/omap1_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/omap1_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/shmobile_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/shmobile_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/stm32_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/stm32_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/sunxi_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/sunxi_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/include/asm/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/include/asm/topology.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/kernel/hw_breakpoint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/hw_breakpoint.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/module.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/kernel/sleep.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/sleep.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/kernel/topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/topology.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-imx/mmdc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-imx/mmdc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-orion5x/board-d2net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/board-d2net.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-orion5x/dns323-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/dns323-setup.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-orion5x/mv2120-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/mv2120-setup.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-orion5x/net2big-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/net2big-setup.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-orion5x/ts409-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/ts409-setup.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-pxa/devices.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-pxa/devices.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-pxa/spitz.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-pxa/spitz.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-pxa/spitz_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-pxa/spitz_pm.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-sa1100/h3600.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-sa1100/h3600.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-stm32/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-stm32/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mm/init.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/net/bpf_jit_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/net/bpf_jit_32.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/Kconfig.platforms?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/Kconfig.platforms</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/actions/s700-cubieboard7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/actions/s700-cubieboard7.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amd/elba-16core.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-16core.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amd/elba-asic-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-asic-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amd/elba-asic.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-asic.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amd/elba-flash-parts.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-flash-parts.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amd/elba.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/apm/apm-merlin.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-merlin.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/apm/apm-mustang.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-mustang.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-shadowcat.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/apm/apm-storm.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/arm/juno-base.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/arm/juno-base.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/arm/juno-scmi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/arm/juno-scmi.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/cavium/thunder-88xx.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/cavium/thunder2-99xx.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/cavium/thunder2-99xx.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/exynos/exynos5433.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/exynos5433.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/exynos/exynos850.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/exynos850.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/exynos/exynosautov9.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/exynosautov9.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/google/gs101-oriole.dts</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/exynos/google/gs101.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/google/gs101.dtsi</a></td><td class='right'>919</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dx.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dxl-evk.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8dxl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dxl.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mn-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-evk.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mn.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-evk.dts</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-navqp.dts</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mq.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mq.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8qm-mek.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8qm-mek.dts</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8qxp-mek.dts</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8qxp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8qxp.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8ulp-evk.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8ulp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8ulp.dtsi</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx93.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx93.dtsi</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/mba8mx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/mba8mx.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/s32g2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g2.dtsi</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/s32g274a-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g274a-evb.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/s32g3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g3.dtsi</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hip05-d02.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip05-d02.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hip05.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip05.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hip06.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip06.dtsi</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/hisilicon/hip07.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip07.dtsi</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/intel/keembay-soc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/intel/keembay-soc.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/intel/socfpga_agilex.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/lg/lg1312-ref.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/lg/lg1312-ref.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/lg/lg1313-ref.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/lg/lg1313-ref.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/armada-37xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-37xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-ap80x.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9130-crb.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/cn9130-db.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9130-db.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/cn9131-db.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9131-db.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/cn9132-db.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9132-db.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt2712-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt2712-evb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt2712e.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt2712e.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt7622.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt7622.dtsi</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt7986a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt7986a.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8183.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8183.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8192.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8192.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8195.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8195.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/mediatek/mt8516.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8516.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/microchip/sparx5.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/microchip/sparx5.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra132-norrin.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/nvidia/tegra132.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra132.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra210-smaug.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra210.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/nvidia/tegra234.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra234.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/apq8016-sbc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/apq8016-sbc.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/ipq6018.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/ipq6018.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/ipq8074.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8916-mtp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-mtp.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8953.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8953.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8996.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8996.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/msm8998.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8998.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/pm6150.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/pm6150.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/pm6150l.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/pm6150l.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qcm2290.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcm2290.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qcm6490-idp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcm6490-idp.dts</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcs404-evb.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qcs404.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcs404.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qdu1000.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qdu1000.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qrb2210-rb1.dts</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qrb4210-rb2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sa8155p-adp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sa8155p-adp.dts</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sa8775p.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sa8775p.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc7180.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc7180.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc7280.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc7280.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc8180x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8180x.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sc8280xp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8280xp.dtsi</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sdm845-db845c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm845-db845c.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sdm845.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm845.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sdx75.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdx75.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm6350.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm6350.dtsi</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm6375.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm6375.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8150-hdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8150-hdk.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8150.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8150.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8250.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8350-hdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8350-hdk.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8350.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8350.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8450-hdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8450-hdk.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8450-qrd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8450-qrd.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8450.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8450.dtsi</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts</a></td><td class='right'>779</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8550.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8550.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8650-mtp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8650-mtp.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8650-qrd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8650-qrd.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/sm8650.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8650.dtsi</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/x1e80100-crd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100-crd.dts</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100-qcp.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/x1e80100.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/realtek/rtd129x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/realtek/rtd129x.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/realtek/rtd139x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/realtek/rtd139x.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/realtek/rtd16xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/realtek/rtd16xx.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/r8a779h0.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a779h0.dtsi</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/r9a07g043.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r9a07g043.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r9a07g043u.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3308.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3308.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts</a></td><td class='right'>809</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3328.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3328.dtsi</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3368-r88.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368-r88.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3368.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts</a></td><td class='right'>726</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk356x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk356x.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts</a></td><td class='right'>721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588.dtsi</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s.dtsi</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/sprd/sc9860.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sc9860.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/sprd/sc9863a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sc9863a.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/sprd/sharkl3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sharkl3.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sp9860g-1h10.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/sprd/whale2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/whale2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp251.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp253.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp253.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp255.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp255.dtsi</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp257f-ev1.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/synaptics/berlin4ct.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/tesla/fsd.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/tesla/fsd.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-main.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62a-main.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62a7-sk.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62p-main.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62p5-sk.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am642-evm.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am642-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-sk.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am65-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-main.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-am69-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am69-sk.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j7200-main.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721e-main.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j721s2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721s2.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j722s-evm.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4-evm.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/ti/k3-j784s4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/xilinx/zynqmp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/xilinx/zynqmp.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/configs/defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/configs/defconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/configs/hardening.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/configs/hardening.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/aes-ce.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/crypto/aes-ce.S</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/aes-neon.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/crypto/aes-neon.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/assembler.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/assembler.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/cputype.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/cputype.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/el2_setup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/el2_setup.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/insn.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/insn.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/irqflags.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/irqflags.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/jump_label.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/jump_label.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/pgtable-prot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/pgtable-prot.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/pgtable.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/sysreg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/sysreg.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/tlbflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/tlbflush.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/topology.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/acpi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/hw_breakpoint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/hw_breakpoint.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/module.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/perf_callchain.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/perf_callchain.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/pi/idreg-override.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/pi/idreg-override.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/probes/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/probes/kprobes.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/setup.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/smp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/stacktrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/stacktrace.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/vgic/vgic-kvm-device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kvm/vgic/vgic-kvm-device.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/lib/insn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/lib/insn.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/mm/init.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/mm/mmu.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/proc.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/mm/proc.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/net/bpf_jit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/net/bpf_jit.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/net/bpf_jit_comp.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/csky/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/csky/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/csky/include/asm/cmpxchg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/csky/include/asm/cmpxchg.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/configs/loongson3_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/configs/loongson3_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/crash_reserve.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/include/asm/crash_reserve.h</a> (renamed from arch/loongarch/include/asm/crash_core.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/perf_event.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/include/asm/perf_event.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/tlb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/include/asm/tlb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/kernel/module.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/perf_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/kernel/perf_event.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/mm/fault.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/mm/init.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/net/bpf_jit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/net/bpf_jit.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/amiga/config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/amiga/config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/amiga_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/amiga_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/apollo_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/apollo_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/atari_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/atari_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/bvme6000_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/bvme6000_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/hp300_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/hp300_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/mac_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/mac_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/multi_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/multi_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/mvme147_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/mvme147_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/mvme16x_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/mvme16x_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/q40_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/q40_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/sun3_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/sun3_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/sun3x_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/sun3x_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/include/asm/pgtable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/include/asm/thread_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/include/asm/thread_info.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/kernel/entry.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/mac/misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/mac/misc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/microblaze/configs/mmu_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/microblaze/configs/mmu_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/rs90_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/configs/rs90_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/dec/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/dec/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/include/asm/pgtable-64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/include/asm/pgtable-64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/kernel/module.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/mm/fault.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/mm/init.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/net/bpf_jit_comp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/nios2/include/asm/pgtable.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/nios2/kernel/module.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/nios2/mm/init.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/openrisc/include/asm/fpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/asm/fpu.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/include/asm/processor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/asm/processor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/include/asm/ptrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/asm/ptrace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/include/uapi/asm/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/uapi/asm/elf.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/entry.S</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/module.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/process.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/process.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/ptrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/ptrace.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/signal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/signal.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/traps.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/configs/generic-32bit_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/configs/generic-32bit_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/include/asm/cmpxchg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/include/asm/cmpxchg.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/kernel/module.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/kernel/parisc_ksyms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/kernel/parisc_ksyms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/kernel/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/lib/bitops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/lib/bitops.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/mm/init.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/net/bpf_jit_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/adder875_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/adder875_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/ep88xc_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/ep88xc_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/mpc866_ads_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/mpc866_ads_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/mpc885_ads_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/mpc885_ads_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/tqm8xx_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/tqm8xx_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/Kbuild?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/cputime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/cputime.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/elf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/kasan.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/kasan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/plpks.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/plpks.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/vdso/gettimeofday.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/head_8xx.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/head_8xx.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/head_book3s_32.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/head_book3s_32.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/kprobes.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/module.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/time.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/time.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/book3s_hv_rm_xics.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kvm/book3s_hv_rm_xics.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/lib/code-patching.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/lib/code-patching.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/mm/book3s32/mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/mm/book3s32/mmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/mm/mem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/mm/mem.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/iommu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/platforms/pseries/iommu.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/plpks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/platforms/pseries/plpks.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/Kconfig.errata?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Kconfig.errata</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/Kconfig.socs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Kconfig.socs</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/renesas/r9a07g043f.dtsi</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/sophgo/cv1800b.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv1800b.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/sophgo/cv1812h.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv1812h.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/configs/defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/defconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/configs/nommu_k210_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/nommu_k210_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/configs/nommu_k210_sdcard_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/nommu_k210_sdcard_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/configs/nommu_virt_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/nommu_virt_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/errata/thead/errata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/errata/thead/errata.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/errata_list.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/asm/errata_list.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/page.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/asm/page.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/asm/pgtable.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/uapi/asm/hwprobe.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/uapi/asm/hwprobe.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/kernel/module.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/probes/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/kernel/probes/kprobes.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/mm/init.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/net/bpf_jit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/net/bpf_jit.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/net/bpf_jit_comp64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/net/bpf_jit_comp64.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/net/bpf_jit_core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/Kconfig</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/boot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/boot.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/decompressor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/decompressor.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/decompressor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/decompressor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/kaslr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/kaslr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/pgm_check_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/pgm_check_info.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/startup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/startup.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/vmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/vmem.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/vmlinux.lds.S</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/configs/debug_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/configs/debug_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/configs/defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/configs/defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/paes_s390.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/crypto/paes_s390.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/ap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/ap.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/asm-prototypes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/asm-prototypes.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/chsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/chsc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/dwarf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/dwarf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/extmem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/extmem.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/ftrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/ftrace.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/gmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/gmap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/mmu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/mmu.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/mmu_context.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/nospec-branch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/nospec-branch.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/nospec-insn.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/nospec-insn.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/os_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/os_info.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/page.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/page.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/pgtable.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/physmem_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/physmem_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/setup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/setup.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/vdso/gettimeofday.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/vtime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/vtime.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/crash_dump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/crash_dump.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/ftrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/ftrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/ipl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/ipl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/irq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/kprobes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/module.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/nmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/nmi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/nospec-branch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/nospec-branch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/os_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/os_info.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/perf_cpum_cf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/perf_cpum_cf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/perf_cpum_cf_events.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/perf_cpum_cf_events.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/stacktrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/stacktrace.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/uv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/uv.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/vdso64/vdso_user_wrapper.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/vdso64/vdso_user_wrapper.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/vmcore_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/vmcore_info.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/vmlinux.lds.S</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kvm/kvm-s390.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kvm/kvm-s390.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kvm/vsie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kvm/vsie.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/lib/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/s390/lib/expoline.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/lib/expoline.S</a> (renamed from arch/s390/lib/expoline/expoline.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/s390/lib/expoline/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/lib/expoline/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/mm/gmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/gmap.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/mm/hugetlbpage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/hugetlbpage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/init.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/mm/vmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/vmem.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/net/bpf_jit_comp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/pci/pci_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/pci/pci_sysfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/tools/relocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/tools/relocs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/board-sh7757lcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/board-sh7757lcr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/board-sh7785lcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/board-sh7785lcr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/mach-dreamcast/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/mach-dreamcast/setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/mach-highlander/pinmux-r7785rp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/mach-highlander/pinmux-r7785rp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/mach-sh03/rtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/mach-sh03/rtc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/of-generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/of-generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boot/compressed/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/sh/boot/compressed/cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/cache.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boot/compressed/misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/misc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/sh/boot/compressed/misc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/misc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boot/dts/j2_mimas_v2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/dts/j2_mimas_v2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/edosk7705_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/edosk7705_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7619_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/se7619_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7712_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/se7712_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7721_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/se7721_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/shmin_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/shmin_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/drivers/dma/dma-api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/drivers/dma/dma-api.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/drivers/push-switch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/drivers/push-switch.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/cacheflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/cacheflush.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/dma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/dma.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/fpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/fpu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/ftrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/ftrace.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/hw_breakpoint.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/hw_breakpoint.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/setup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/setup.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/syscalls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/syscalls.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/include/asm/tlb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/tlb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/cpu/sh2a/opcode_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh2a/opcode_helper.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/cpu/sh4a/setup-sh7723.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7723.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/cpu/sh4a/setup-sh7724.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7724.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/cpu/sh4a/setup-sh7757.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7757.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/cpu/sh4a/setup-sh7786.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7786.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/dwarf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/dwarf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/kprobes.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/return_address.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/return_address.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/smp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/traps.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/kernel/traps_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/traps_32.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/lib/checksum.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/lib/checksum.S</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/math-emu/math.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/math-emu/math.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/mm/cache-sh4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/cache-sh4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/mm/cache-shx3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/cache-shx3.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/mm/cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/cache.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/mm/nommu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/nommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/mm/pgtable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/pgtable.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/mm/tlbex_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/tlbex_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/include/asm/cmpxchg_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/include/asm/cmpxchg_32.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/include/asm/pgtable_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/include/asm/pgtable_32.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/kernel/module.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/lib/atomic32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/lib/atomic32.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/mm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/mm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/sparc/mm/execmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/mm/execmem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/net/bpf_jit_comp_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/net/bpf_jit_comp_32.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/net/bpf_jit_comp_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/net/bpf_jit_comp_64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/um/include/asm/cpufeature.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/um/include/asm/cpufeature.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/Kconfig</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Kconfig.assembler?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/Kconfig.assembler</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/head_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/boot/compressed/head_64.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/sev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/boot/compressed/sev.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/boot/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/configs/hardening.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/configs/hardening.config</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/crypto/aes-xts-avx-x86_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/aes-xts-avx-x86_64.S</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aesni-intel_asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/aesni-intel_asm.S</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aesni-intel_glue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/aesni-intel_glue.c</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/nh-avx2-x86_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/nh-avx2-x86_64.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sha256-avx2-asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/sha256-avx2-asm.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sha256_ni_asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/sha256_ni_asm.S</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sha512-avx2-asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/sha512-avx2-asm.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/entry_64_compat.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/entry_64_compat.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/entry_fred.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/entry_fred.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/syscalls/syscall_64.tbl?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/syscalls/syscall_64.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/entry/thunk.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/thunk.S</a> (renamed from arch/x86/entry/thunk_64.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/entry/thunk_32.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/thunk_32.S</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/vsyscall/vsyscall_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/vsyscall/vsyscall_64.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/amd/core.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/lbr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/amd/lbr.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/cstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/cstate.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/lbr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/lbr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/pt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/pt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/uncore.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore_nhmex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/uncore_nhmex.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore_snbep.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/uncore_snbep.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/msr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/msr.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/perf_event.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/perf_event.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/rapl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/rapl.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/hyperv/hv_vtl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/hyperv/hv_vtl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/acpi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/alternative.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/alternative.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/apic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/apic.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/asm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/asm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/atomic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/atomic.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/atomic64_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/atomic64_32.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/atomic64_64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/atomic64_64.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/boot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/boot.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cmpxchg_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cmpxchg_32.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cmpxchg_64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cmpxchg_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/coco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/coco.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cpu_device_id.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cpu_device_id.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cpufeature.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cpufeature.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/e820/api.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/e820/api.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/extable_fixup_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/extable_fixup_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/hardirq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/hardirq.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/ia32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/ia32.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/include/asm/ia32_unistd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/ia32_unistd.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/idtentry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/idtentry.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/intel-family.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/intel-family.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/irq_remapping.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/irq_remapping.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/irq_stack.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/irq_stack.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/irq_vectors.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/irq_vectors.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mce.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/mce.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mpspec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/mpspec.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/msr-index.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/msr-index.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/page_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/page_types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/percpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/percpu.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgtable_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/pgtable_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/include/asm/posted_intr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/posted_intr.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/processor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/processor.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/prom.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/prom.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/qspinlock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/qspinlock.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/qspinlock_paravirt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/qspinlock_paravirt.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/seccomp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/seccomp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/sev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/sev.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/sparsemem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/sparsemem.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/special_insns.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/special_insns.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/string_64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/string_64.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/text-patching.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/text-patching.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/uaccess.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/uaccess.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/vdso/gettimeofday.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/vm86.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/vm86.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/alternative.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/alternative.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/amd_nb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/amd_nb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/apic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/apic/apic.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/vector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/apic/vector.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/x2apic_cluster.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/apic/x2apic_cluster.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/callthunks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/callthunks.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/amd.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/aperfmperf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/aperfmperf.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/bugs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/bugs.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/common.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/cpuid-deps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/cpuid-deps.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/intel.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/intel_epb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/intel_epb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/match.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/core.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/genpool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/genpool.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/intel.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/severity.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/severity.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/microcode/amd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/microcode/core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/microcode/intel.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/core.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/internal.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/monitor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/monitor.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/rdtgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/trace.h</a> (renamed from arch/x86/kernel/cpu/resctrl/pseudo_lock_event.h)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/topology_amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/topology_amd.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/topology_ext.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/topology_ext.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/devicetree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/devicetree.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/dumpstack.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/dumpstack.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/e820.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/e820.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/fpu/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/xstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/fpu/xstate.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/ftrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/ftrace.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/head_32.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/head_32.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/head_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/head_64.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/idt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/idt.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/irq.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/kprobes/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/kprobes/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/kvm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/kvm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/module.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/process_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/process_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/rtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/rtc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/setup.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/sev-shared.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/sev-shared.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/sev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/sev.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/shstk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/shstk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/signal_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/signal_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/signal_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/signal_64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/smpboot.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/smpboot.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/kernel/topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/topology.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/tsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/tsc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/tsc_msr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/tsc_msr.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/tsc_sync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/tsc_sync.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/vmlinux.lds.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/posted_intr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/posted_intr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/posted_intr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/posted_intr.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/vmx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/vmx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/vmx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/vmx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/math-emu/fpu_etc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/math-emu/fpu_etc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/math-emu/fpu_trig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/math-emu/fpu_trig.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/math-emu/reg_constant.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/math-emu/reg_constant.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/extable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/extable.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/fault.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/fault.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/init.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/mem_encrypt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/mem_encrypt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/numa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/numa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/pat/set_memory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/pat/set_memory.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/net/bpf_jit_comp.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/net/bpf_jit_comp32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/net/bpf_jit_comp32.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/pci/ce4100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/pci/ce4100.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/ce4100/ce4100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/ce4100/ce4100.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/iris/iris.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/iris/iris.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/olpc/olpc-xo1-pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/olpc/olpc-xo1-pm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/olpc/olpc-xo1-sci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/purgatory/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/purgatory/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/tools/relocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/tools/relocs.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/svm/sev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/virt/svm/sev.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/vmx/tdx/tdx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/virt/vmx/tdx/tdx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/enlighten.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/enlighten.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/enlighten_pv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/enlighten_pv.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/smp_pv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/smp_pv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/xen-head.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/xen-head.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/include/asm/cacheflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/include/asm/cacheflush.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/include/asm/processor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/include/asm/processor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/include/asm/ptrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/include/asm/ptrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/kernel/process.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/kernel/process.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/kernel/stacktrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/kernel/stacktrace.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/platforms/iss/console.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/platforms/iss/console.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/bdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/bio.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-cgroup-rwstat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-cgroup-rwstat.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-cgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-cgroup.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-core.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-flush.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-flush.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-lib.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-merge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-merge.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/block/blk-mq-debugfs-zoned.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq-debugfs-zoned.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq-debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq-debugfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq-debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq-debugfs.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-settings.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-settings.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-stat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-stat.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-sysfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-throttle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-throttle.c</a></td><td class='right'>1019</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-throttle.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-throttle.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-zoned.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-zoned.c</a></td><td class='right'>1508</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bsg-lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/bsg-lib.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/elevator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/elevator.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/elevator.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/elevator.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/fops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/fops.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/genhd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/genhd.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/ioctl.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/mq-deadline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/mq-deadline.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/partitions/cmdline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/partitions/cmdline.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/partitions/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/partitions/core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/acompress.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/acompress.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/aead.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/aead.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/af_alg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/af_alg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ahash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ahash.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/akcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/akcipher.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/algboss.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/algboss.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/api.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/public_key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/public_key.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/selftest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/selftest.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/selftest.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/selftest.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/selftest_ecdsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/selftest_ecdsa.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/selftest_rsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/selftest_rsa.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/x509_cert_parser.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/x509_cert_parser.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/x509_parser.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/x509_parser.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/x509_public_key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/x509_public_key.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/crypto/bpf_crypto_skcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/bpf_crypto_skcipher.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/cipher.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/compress.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/compress.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/crypto/crypto_user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/crypto_user.c</a> (renamed from crypto/crypto_user_base.c)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/crypto/crypto_user_stat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/crypto_user_stat.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecc.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecc_curve_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecc_curve_defs.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecdh.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecdh.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecdsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecdsa.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecrdsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecrdsa.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecrdsa_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecrdsa_defs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/fips.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/fips.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/hash.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/hash.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/jitterentropy-kcapi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/jitterentropy-kcapi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/jitterentropy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/jitterentropy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/kpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/kpp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lskcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/lskcipher.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/rng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/rng.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/scompress.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/scompress.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/shash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/shash.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/sig.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/skcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/skcipher.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/skcipher.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/skcipher.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/testmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/testmgr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/testmgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/testmgr.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/ivpu/ivpu_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/qaic/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic_data.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic_debugfs.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic_debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic_debugfs.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic_drv.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/accel/qaic/sahara.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/sahara.c</a></td><td class='right'>449</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/accel/qaic/sahara.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/sahara.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpi_ipmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpi_ipmi.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/aclocal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/aclocal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acobject.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/acobject.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evgpeinit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/evgpeinit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbfadt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/tbfadt.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbutils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/tbutils.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utdebug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/utdebug.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/apei/einj-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/apei/einj-core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/bus.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/cppc_acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/cppc_acpi.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/dock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dock.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/dptf/dptf_pch_fivr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dptf/dptf_pch_fivr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/dptf/dptf_power.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dptf/dptf_power.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/dptf/int340x_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dptf/int340x_thermal.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/fan.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/fan.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/acpi/nhlt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/nhlt.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/numa/srat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/numa/srat.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/property.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/property.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/resource.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/scan.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/video_detect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/video_detect.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/acpi/x86/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/acpi/x86/blacklist.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/blacklist.c</a> (renamed from drivers/acpi/blacklist.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/acpi/x86/cmos_rtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/cmos_rtc.c</a> (renamed from drivers/acpi/acpi_cmos_rtc.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/acpi/x86/lpss.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/lpss.c</a> (renamed from drivers/acpi/acpi_lpss.c)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/x86/s2idle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/s2idle.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/x86/utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/utils.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/ahci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/ahci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-core.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata-sata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-sata.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata-scsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-scsi.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata-sff.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-sff.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/pata_legacy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/pata_legacy.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/pata_macio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/pata_macio.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/sata_mv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/sata_mv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/sata_nv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/sata_nv.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/sata_sil24.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/sata_sil24.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/atm/fore200e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/atm/fore200e.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/atm/fore200e.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/atm/fore200e.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/auxdisplay/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/Kconfig</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/auxdisplay/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/auxdisplay/charlcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/charlcd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/auxdisplay/seg-led-gpio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/seg-led-gpio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/arch_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/arch_topology.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/devcoredump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/devcoredump.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/power/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/wakeup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/power/wakeup.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/internal.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regcache-maple.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regcache-maple.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-i3c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-i3c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-kunit.c</a></td><td class='right'>990</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-mdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-mdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-ram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-ram.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-raw-ram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-raw-ram.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-sdw-mbq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-sdw-mbq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-sdw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-spi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bcma/host_soc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bcma/host_soc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/brd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/brd.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/null_blk/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/null_blk/main.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/null_blk/null_blk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/null_blk/null_blk.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/null_blk/zoned.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/null_blk/zoned.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/ublk_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/ublk_drv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/virtio_blk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/virtio_blk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/ath3k.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/ath3k.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btintel.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btintel.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel_pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btintel_pcie.c</a></td><td class='right'>1357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel_pcie.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btintel_pcie.h</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btmrvl_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btmrvl_main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btmtk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btmtk.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btqca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btqca.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btqca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btqca.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btqcomsmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btqcomsmd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btrsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btrsi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btrtl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btrtl.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btsdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btsdio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btusb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btusb.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_bcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_bcm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_bcm4377.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_bcm4377.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_intel.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_ldisc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_ldisc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_qca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_qca.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_serdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_serdev.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_uart.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_uart.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_vhci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_vhci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/virtio_bt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/virtio_bt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/brcmstb_gisb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/brcmstb_gisb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/mhi/host/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/mhi/host/internal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/mhi/host/pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/mhi/host/pm.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/bus/stm32_etzpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/stm32_etzpc.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/bus/stm32_firewall.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/stm32_firewall.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/bus/stm32_firewall.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/stm32_firewall.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/bus/stm32_rifsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/stm32_rifsc.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/ti-sysc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/ti-sysc.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cache/sifive_ccache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cache/sifive_ccache.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/agp/alpha-agp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/agp/alpha-agp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/hw_random/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/mxc-rnga.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/hw_random/mxc-rnga.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/stm32-rng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/hw_random/stm32-rng.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/eventlog/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/eventlog/acpi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm-buf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-buf.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm-chip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-chip.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm-interface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-interface.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-sysfs.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm2-cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm2-cmd.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm2-sessions.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm2-sessions.c</a></td><td class='right'>1286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm2-space.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm2-space.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm_infineon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm_infineon.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm_tis_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm_tis_core.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/qcom/clk-smd-rpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/qcom/clk-smd-rpm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/qcom/gdsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/qcom/gdsc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/samsung/clk-exynos-clkout.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/samsung/clk-exynos-clkout.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/sunxi-ng/ccu-sun50i-a64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu-sun50i-a64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/sunxi-ng/ccu-sun50i-h6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu-sun50i-h6.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/sunxi-ng/ccu_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu_common.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/sunxi-ng/ccu_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu_common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/arm_arch_timer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clocksource/arm_arch_timer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/renesas-ostm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clocksource/renesas-ostm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/timer-ti-dm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clocksource/timer-ti-dm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/amd-pstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/amd-pstate.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/brcmstb-avs-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/brcmstb-avs-cpufreq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cppc_cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cppc_cpufreq.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cpufreq-dt-platdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cpufreq-dt-platdev.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cpufreq-dt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cpufreq-dt.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cpufreq.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/freq_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/freq_table.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/intel_pstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/intel_pstate.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/mediatek-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/mediatek-cpufreq.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/qcom-cpufreq-hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/qcom-cpufreq-hw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/sun50i-cpufreq-nvmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/sun50i-cpufreq-nvmem.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/tegra124-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/tegra124-cpufreq.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/ti-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/ti-cpufreq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/coupled.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpuidle/coupled.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/cpuidle-kirkwood.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpuidle/cpuidle-kirkwood.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/governors/ladder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpuidle/governors/ladder.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/atmel-i2c.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-i2c.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/atmel-i2c.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-sha204a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/atmel-sha204a.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/bcm/spu2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/bcm/spu2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/caam/ctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/caam/ctrl.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/sp-platform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/ccp/sp-platform.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/debugfs.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/hpre/hpre_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/hpre/hpre_main.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/qm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/qm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/sec2/sec_crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/sec2/sec_crypto.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/sec2/sec_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/sec2/sec_main.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/sgl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/sgl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/zip/zip_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/zip/zip_main.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/iaa/iaa_crypto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/iaa/iaa_crypto_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto_main.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/iaa/iaa_crypto_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto_stats.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/iaa/iaa_crypto_stats.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto_stats.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_4xxx/adf_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_accel_devices.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_common_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_common_drv.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.h</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c</a></td><td class='right'>1010</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_rl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_rl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_rl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_rl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_sriov.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_sriov.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_telemetry.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_telemetry.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_telemetry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_telemetry.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_transport.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_asym_algs.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_bl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_bl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_bl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_bl.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_mig_dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_mig_dev.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/cn10k_cpt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/marvell/octeontx2/cn10k_cpt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/mxs-dcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/mxs-dcp.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-842.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/nx/nx-842.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-842.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/nx/nx-842.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/sahara.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/sahara.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/starfive/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/starfive/jh7110-aes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-aes.c</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/starfive/jh7110-cryp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-cryp.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/starfive/jh7110-cryp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-cryp.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/starfive/jh7110-hash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-hash.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/starfive/jh7110-rsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-rsa.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/stm32/stm32-hash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/stm32/stm32-hash.c</a></td><td class='right'>570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/tegra/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se-aes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/tegra/tegra-se-aes.c</a></td><td class='right'>1933</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se-hash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/tegra/tegra-se-hash.c</a></td><td class='right'>1060</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se-key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/tegra/tegra-se-key.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se-main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/tegra/tegra-se-main.c</a></td><td class='right'>437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/tegra/tegra-se.h</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/mbox.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cxl/core/mbox.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cxl/core/port.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dax/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dax/device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/devfreq/event/exynos-nocp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/event/exynos-nocp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/devfreq/event/exynos-ppmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/event/exynos-ppmu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/devfreq/exynos-bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/exynos-bus.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/devfreq/mtk-cci-devfreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/mtk-cci-devfreq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/devfreq/rk3399_dmc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/rk3399_dmc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/devfreq/sun8i-a33-mbus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/sun8i-a33-mbus.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/dma-buf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma-buf/dma-buf.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idma64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idma64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/cdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/cdev.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/debugfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/device.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/idxd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/idxd.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/init.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/perfmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/perfmon.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/registers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/registers.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/sysfs.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/owl-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/owl-dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/pl330.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/pl330.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/tegra186-gpc-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/tegra186-gpc-dma.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/xilinx/xdma-regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/xilinx/xdma-regs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/xilinx/xdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/xilinx/xdma.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/xilinx/xilinx_dpdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/xilinx/xilinx_dpdma.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dpll/dpll_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dpll/dpll_core.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/altera_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/altera_edac.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/amd64_edac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/amd64_edac.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/amd8111_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/amd8111_edac.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/armada_xp_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/armada_xp_edac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/cpc925_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/cpc925_edac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/edac_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_device.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/edac_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_device.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/edac_device_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_device_sysfs.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/edac_mc_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_mc_sysfs.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/edac_pci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_pci.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/highbank_l2_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/highbank_l2_edac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/mpc85xx_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/mpc85xx_edac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/octeon_edac-l2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/octeon_edac-l2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/octeon_edac-pc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/octeon_edac-pc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/qcom_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/qcom_edac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/sifive_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/sifive_edac.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/skx_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/skx_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/synopsys_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/synopsys_edac.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/thunderx_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/thunderx_edac.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/versal_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/versal_edac.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/xgene_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/xgene_edac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/zynqmp_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/zynqmp_edac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/eisa/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/eisa/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/eisa/virtual_root.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/eisa/virtual_root.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/.kunitconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/.kunitconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/core-card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-card.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/core-cdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-cdev.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/core-topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-topology.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/firewire/core-trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-trace.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/core-transaction.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-transaction.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/nosy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/nosy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/ohci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/ohci.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/firewire/packet-header-definitions.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/packet-header-definitions.h</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/firewire/packet-serdes-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/packet-serdes-test.c</a></td><td class='right'>582</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/sbp2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/sbp2.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_ffa/driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_ffa/driver.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/common.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/driver.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/mailbox.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/mailbox.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/notify.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/notify.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/perf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/perf.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/pinctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/pinctrl.c</a></td><td class='right'>916</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/protocols.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/protocols.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/cs_dsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/cirrus/cs_dsp.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/efi-pstore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/efi-pstore.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/libstub/fdt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/libstub/fdt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/unaccepted_memory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/unaccepted_memory.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/vars.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/vars.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/google/cbmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/google/cbmem.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/google/coreboot_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/google/coreboot_table.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/google/coreboot_table.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/google/coreboot_table.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/microchip/mpfs-auto-update.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/microchip/mpfs-auto-update.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/qcom/qcom_qseecom_uefisecapp.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/qcom/qcom_scm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/qcom/qcom_scm.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/raspberrypi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/raspberrypi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/smccc/smccc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/smccc/smccc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/ti_sci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/ti_sci.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/fpga/dfl-pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/fpga/dfl-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-brcmstb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-brcmstb.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-cros-ec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-cros-ec.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-graniterapids.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-graniterapids.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-npcm-sgpio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-npcm-sgpio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-pca953x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-pca953x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-pcie-idio-24.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-pcie-idio-24.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-regmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-regmap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-sch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-sch.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-tangier.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-tangier.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-tegra186.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-tegra186.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-acpi.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-cdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-cdev.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-legacy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-legacy.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-of.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-of.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-swnode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-swnode.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/Kconfig</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/aldebaran.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/aldebaran.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/atom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/atom.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/cik.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cik.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/cik_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cik_ih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/cz_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cz_ih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v6_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/iceland_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/iceland_ih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ih_v6_0.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ih_v6_1.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ih_v7_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mes_v10_1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mes_v11_0.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/navi10_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/navi10_ih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/nv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/nv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/psp_v14_0.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/si.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si_dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/si_dma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/si_ih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/soc15.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/soc15.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/soc15.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/soc15.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/soc21.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/soc21.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ta_ras_if.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/tonga_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/tonga_ih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/umc_v8_10.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vce_v2_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vce_v3_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_chardev.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_migrate.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_process.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_svm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_svm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_topology.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/bios_parser.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/bios/command_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/command_table.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/bios/command_table2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/command_table2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc.c</a></td><td class='right'>1019</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_resource.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_stat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_stat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_state.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_state.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_stream.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_stream.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_surface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_surface.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc.h</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_dp_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_dp_types.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_hw_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_hw_types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_plane.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_plane.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_plane_priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_plane_priv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_state.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_state.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_state_priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_state_priv.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_stream.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_stream.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_types.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_opp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_transform.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn201/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn35/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dm_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dm_helpers.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dm_services.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dm_services.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/Makefile</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.h)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.c)</td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/core_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/core_types.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/optc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/link.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/link.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/resource.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/link_detection.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/link_detection.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/link_dpms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/link_dpms.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/dmub_srv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/dmub_srv.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/dal_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/dal_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/grph_object_id.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/grph_object_id.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/link_service_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/link_service_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/logger_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/logger_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/signal_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/signal_types.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/color/color_gamma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/color/color_gamma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/freesync/freesync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/freesync/freesync.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/amd_shared.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/amd_shared.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_offset.h</a></td><td class='right'>511</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_sh_mask.h</a></td><td class='right'>1106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/kgd_pp_interface.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/kgd_pp_interface.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/mes_v11_api_def.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/mes_v11_api_def.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/amdgpu_dpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/amdgpu_dpm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/amdgpu_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/amdgpu_pm.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h</a></td><td class='right'>1836</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c</a></td><td class='right'>1796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/arm/display/komeda/d71/d71_component.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/arm/malidp_mw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/arm/malidp_mw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/armada/armada_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/armada/armada_debugfs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_ddc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_ddc.c</a> (renamed from drivers/gpu/drm/ast/ast_i2c.c)</td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_ddc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_ddc.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_drv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_drv.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_mode.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/adv7511/adv7511.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/adv7511/adv7511.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/adv7511/adv7511_drv.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/analogix/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/anx7625.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/analogix/anx7625.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/chipone-icn6211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/chipone-icn6211.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/imx/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ite-it6505.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ite-it6505.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ite-it66121.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ite-it66121.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt8912b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/lontium-lt8912b.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt9611.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/lontium-lt9611.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt9611uxc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/lontium-lt9611uxc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/microchip-lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/microchip-lvds.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/panel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/panel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/synopsys/dw-hdmi.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358764.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/tc358764.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358775.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/tc358775.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/thc63lvd1024.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/thc63lvd1024.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-dlpc3433.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ti-dlpc3433.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-sn65dsi83.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ti-sn65dsi83.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/test.yml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ci/test.yml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_helper.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_helper_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_helper_internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_mst_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_mst_topology.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_mst_topology_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_mst_topology_internal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_tunnel.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_atomic_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_atomic_helper.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_atomic_uapi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_atomic_uapi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_bridge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_bridge.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_buddy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_buddy.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_client.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_client.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_client_modeset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_client_modeset.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_connector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_connector.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_crtc_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc_helper.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_crtc_helper_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc_helper_internal.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_crtc_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc_internal.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_displayid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_displayid.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_displayid_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_displayid_internal.h</a> (renamed from include/drm/drm_displayid.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_drv.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_edid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_edid.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_eld.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_eld.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_fb_dma_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_fb_dma_helper.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_fbdev_generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_fbdev_generic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem_atomic_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem_atomic_helper.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem_shmem_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem_shmem_helper.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem_vram_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem_vram_helper.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_internal.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_mipi_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_mipi_dsi.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_mode_config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_mode_config.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_modes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_modes.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_panic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_panic.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_plane.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_print.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_print.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_probe_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_probe_helper.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_sysfs.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_vblank.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_vblank.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_vblank_work.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_vblank_work.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/etnaviv/etnaviv_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/etnaviv/etnaviv_gpu.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/etnaviv/etnaviv_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/etnaviv/etnaviv_gpu.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/etnaviv/etnaviv_hwdb.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_dsi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_fimc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_fimc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_fimd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_fimd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_g2d.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_g2d.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_gsc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_mic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_mic.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_rotator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_rotator.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_scaler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_scaler.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_vidi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_vidi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_hdmi.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_mixer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_mixer.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/oaktrail_lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/oaktrail_lvds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/psb_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/psb_device.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/psb_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/psb_drv.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/psb_lid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/psb_lid.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gud/gud_connector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gud/gud_connector.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/Kconfig.debug?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/Kconfig.debug</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/icl_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/icl_dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_atomic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_atomic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_audio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_audio.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_audio_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_audio_regs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_backlight.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_backlight.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bios.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_bios.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_bw.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_bw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cdclk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cdclk.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cdclk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cdclk.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_color.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_color.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_color_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_color_regs.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_combo_phy_regs.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_crt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_crt.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_crtc_state_dump.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cursor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cursor.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cx0_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cx0_phy.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cx0_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cx0_phy.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_ddi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_ddi.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_de.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_de.h</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display.c</a></td><td class='right'>704</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_conversion.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_conversion.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_core.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_debugfs.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_device.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_device.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_driver.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_irq.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_params.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_params.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_params.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_power.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_power.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_power_well.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_power_well.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_reg_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_reg_defs.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_types.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_wa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_wa.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dmc.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dmc_regs.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc_wl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dmc_wl.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc_wl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dmc_wl.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_aux.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_aux.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_aux.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_aux.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_hdcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_hdcp.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_link_training.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_link_training.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_mst.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_mst.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_tunnel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpio_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpio_phy.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpio_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpio_phy.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll_mgr.c</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll_mgr.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dsb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dsb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dsi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dvo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dvo.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbc.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbc_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbc_regs.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbdev.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbdev.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fixed.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fixed.h</a> (renamed from drivers/gpu/drm/i915/i915_fixed.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_gmbus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_gmbus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdcp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdmi.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hotplug_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hotplug_irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_lpe_audio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_lpe_audio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_lvds.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_opregion.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_opregion.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_opregion.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_opregion.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_overlay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_overlay.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_panel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_panel.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pch_display.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pmdemand.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pmdemand.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pmdemand.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pmdemand.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pps.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pps.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pps.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_psr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_psr.c</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_psr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_psr.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_psr_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_psr_regs.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_quirks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_quirks.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_quirks.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_quirks.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_sdvo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_sdvo.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_snps_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_snps_phy.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_snps_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_snps_phy.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_sprite.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_sprite.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_sprite_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_sprite_regs.h</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_tc.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_tv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_tv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vbt_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_vbt_defs.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vrr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_vrr.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_scaler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_scaler.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_watermark.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_watermark.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_watermark.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_watermark.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_watermark_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_watermark_regs.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dsi.c</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi_pll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dsi_pll.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dsi_regs.h</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_context.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_context.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_context_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_context_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_object_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_object_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_shmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_shmem.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_stolen.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_stolen.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_tiling.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_tiling.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_userptr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_userptr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/selftests/huge_pages.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/selftests/huge_pages.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/gen8_engine_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/gen8_engine_cs.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/gen8_ppgtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/gen8_ppgtt.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_context_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_context_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_engine_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_engine_cs.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_engine_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_engine_types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_execlists_submission.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_execlists_submission.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_ggtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_ggtt.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gsc.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_mcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_mcr.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_mcr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_mcr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_pm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_regs.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gtt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_lrc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_lrc.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_migrate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_migrate.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_mocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_mocs.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_rc6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_rc6.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_reset.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_reset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_reset.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_rps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_rps.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_sseu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_sseu.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_tlb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_tlb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_workarounds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_workarounds.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_hangcheck.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/selftest_hangcheck.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/selftest_reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_slpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/selftest_slpc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_huc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_huc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_uc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_uc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/selftest_guc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/selftest_guc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/cmd_parser.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/cmd_parser.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/display.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/fb_decoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/fb_decoder.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/handlers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/handlers.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/mmio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/mmio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_debugfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_debugfs_params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_debugfs_params.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_driver.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_drv.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_getparam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_getparam.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_gpu_error.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_gpu_error.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_hwmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_hwmon.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_irq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_params.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_params.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_params.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_pci.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_perf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_perf.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_query.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_query.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_reg.h</a></td><td class='right'>1405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 10.5%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_ttm_buddy_manager.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_utils.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_vma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_vma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_clock_gating.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_clock_gating.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_device_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_device_info.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_device_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_device_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_gvt_mmio_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_gvt_mmio_table.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_runtime_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_runtime_pm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_step.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_step.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_uncore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_uncore.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/selftests/i915_selftest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/selftests/i915_selftest.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/selftests/intel_uncore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/selftests/intel_uncore.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/soc/intel_dram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/soc/intel_dram.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/vlv_sideband.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/vlv_sideband.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_mips.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imagination/pvr_fw_mips.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imagination/pvr_fw_trace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_vm_mips.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imagination/pvr_vm_mips.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_bcast.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_bcast.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_bcast.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_bcast.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_drv.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_drv.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_gp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_gp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_mmu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_pp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_pp.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_sched.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_sched.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_sched.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/loongson/lsdc_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/loongson/lsdc_crtc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/loongson/lsdc_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/loongson/lsdc_gem.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_crtc.c</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_crtc.c)</td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_crtc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_crtc.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_ddp_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_ddp_comp.c</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c)</td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_ddp_comp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_ddp_comp.h</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_aal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_aal.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_ccorr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_color.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_color.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_drv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_gamma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_gamma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_merge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_merge.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_ovl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_ovl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_rdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_rdma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_dp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_dpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_dpi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_drm_crtc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_crtc.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_drm_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_drv.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_drm_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_drv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_dsi.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_ethdr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_ethdr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_gem.c</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_gem.c)</td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_gem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_gem.h</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_gem.h)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_hdmi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_mdp_rdma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_padding.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_padding.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_plane.c</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_plane.c)</td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_plane.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_plane.h</a> (renamed from drivers/gpu/drm/mediatek/mtk_drm_plane.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_dw_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/meson/meson_dw_hdmi.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/meson/meson_dw_mipi_dsi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_vclk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/meson/meson_vclk.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mgag200/mgag200_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mgag200/mgag200_drv.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mgag200/mgag200_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mgag200/mgag200_mode.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/Makefile</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a2xx.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx.xml.h</a></td><td class='right'>3251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 27.4%;'/><td class='none' style='width: 72.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a2xx_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx_gpu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a2xx_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx_gpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a2xx_gpummu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx_gpummu.c</a> (renamed from drivers/gpu/drm/msm/msm_gpummu.c)</td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a3xx.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a3xx.xml.h</a></td><td class='right'>3268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 27.6%;'/><td class='none' style='width: 72.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a4xx.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a4xx.xml.h</a></td><td class='right'>4379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 36.9%;'/><td class='none' style='width: 63.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a5xx.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a5xx.xml.h</a></td><td class='right'>5572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 47.0%;'/><td class='none' style='width: 53.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx.xml.h</a></td><td class='right'>11858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 100.0%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gmu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gmu.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gpu.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/adreno_common.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/adreno_common.xml.h</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/adreno_gen7_9_0_snapshot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/adreno_gen7_9_0_snapshot.h</a></td><td class='right'>1446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h</a></td><td class='right'>2803</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 23.6%;'/><td class='none' style='width: 76.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c</a></td><td class='right'>660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h</a></td><td class='right'>1181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h</a></td><td class='right'>1979</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 16.7%;'/><td class='none' style='width: 83.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp_common.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp_common.xml.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp_format.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp_format.c</a></td><td class='right'>630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp_format.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp_format.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp_kms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/disp/mdp_kms.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_audio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_audio.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_aux.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_aux.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_aux.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_aux.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_catalog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_catalog.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_catalog.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_catalog.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_ctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_ctrl.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_ctrl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_ctrl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_debug.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_debug.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_debug.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_display.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_display.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_display.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_drm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_drm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_link.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_link.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_link.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_link.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_panel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_panel.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_panel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dp/dp_panel.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi.xml.h</a></td><td class='right'>790</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.7%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_host.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_host.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_manager.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_phy_10nm.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_phy_10nm.xml.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_phy_14nm.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_phy_14nm.xml.h</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_phy_20nm.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_phy_20nm.xml.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_phy_28nm.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_phy_28nm.xml.h</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_phy_28nm_8960.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_phy_28nm_8960.xml.h</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_phy_7nm.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/dsi_phy_7nm.xml.h</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/mmss_cc.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/mmss_cc.xml.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/phy/dsi_phy.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/sfpb.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/dsi/sfpb.xml.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/hdmi/hdmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/hdmi/hdmi.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/hdmi/hdmi.xml.h</a></td><td class='right'>1399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.8%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/qfprom.xml.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/hdmi/qfprom.xml.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_drv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_drv.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_fb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_gem.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_gem.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gem_prime.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_gem_prime.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_gpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_gpu.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_kms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_kms.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_mmu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_mmu.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/.gitignore</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/a2xx.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/a2xx.xml</a></td><td class='right'>1865</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/a3xx.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/a3xx.xml</a></td><td class='right'>1751</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/a4xx.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/a4xx.xml</a></td><td class='right'>2409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/a5xx.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/a5xx.xml</a></td><td class='right'>3039</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/a6xx.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/a6xx.xml</a></td><td class='right'>5011</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 42.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 57.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/adreno_common.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/adreno_common.xml</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml</a></td><td class='right'>2268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi.xml</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi_phy_10nm.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi_phy_10nm.xml</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi_phy_14nm.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi_phy_14nm.xml</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi_phy_20nm.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi_phy_20nm.xml</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi_phy_28nm.xml</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm_8960.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi_phy_28nm_8960.xml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/edp.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/edp.xml</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/hdmi.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/hdmi.xml</a></td><td class='right'>1015</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/mdp4.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/mdp4.xml</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/mdp5.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/mdp5.xml</a></td><td class='right'>806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/mdp_common.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/mdp_common.xml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/msm.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/msm.xml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/display/sfpb.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/display/sfpb.xml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/freedreno_copyright.xml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/freedreno_copyright.xml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/gen_header.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/gen_header.py</a></td><td class='right'>970</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/rules-fd.xsd?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/registers/rules-fd.xsd</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mxsfb/lcdif_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mxsfb/lcdif_drv.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/crc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/dispnv50/crc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_abi16.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_abi16.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_abi16.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_abi16.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_bo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_bo.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_bo.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_bo.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_display.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_dp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_prime.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nouveau_prime.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/omapdrm/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/omapdrm/omap_dmm_tiler.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/omap_fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/omapdrm/omap_fb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/omap_fbdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/omapdrm/omap_fbdev.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-edp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-edp.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-ilitek-ili9341.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-ilitek-ili9341.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-ilitek-ili9881c.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-khadas-ts050.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-khadas-ts050.c</a></td><td class='right'>1112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-lg-sw43408.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-lg-sw43408.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-novatek-nt35950.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-novatek-nt35950.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-novatek-nt36672a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-novatek-nt36672a.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-novatek-nt36672e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-novatek-nt36672e.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-raydium-rm69380.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-raydium-rm69380.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-samsung-atna33xc20.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-samsung-s6e3fa7.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-samsung-s6e3fa7.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-simple.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-simple.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-sitronix-st7703.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-sitronix-st7703.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-truly-nt35597.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-truly-nt35597.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-visionox-rm69299.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panel/panel-visionox-rm69299.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panfrost/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panfrost/panfrost_debugfs.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panfrost/panfrost_debugfs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panfrost/panfrost_device.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panfrost/panfrost_drv.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_job.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panfrost/panfrost_job.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_devfreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_devfreq.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_devfreq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_devfreq.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_device.c</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_device.h</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_drv.c</a></td><td class='right'>1488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_fw.c</a></td><td class='right'>1363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_fw.h</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_gem.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_gem.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_gpu.c</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_gpu.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_heap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_heap.c</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_heap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_heap.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_mmu.c</a></td><td class='right'>2774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_mmu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_mmu.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_regs.h</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_sched.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_sched.c</a></td><td class='right'>3528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 29.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 70.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/panthor/panthor_sched.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/qxl/qxl_object.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/qxl/qxl_object.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/qxl/qxl_object.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/qxl/qxl_object.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/qxl/qxl_prime.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/qxl/qxl_prime.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/qxl/qxl_release.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/qxl/qxl_release.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/r100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/r100.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/r300.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/r300.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/r420.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/r420.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/r600.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/r600.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_display.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_fence.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_fence.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_gem.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_ib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_ib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_pm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_prime.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_prime.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_ring.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_ring.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_ttm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/radeon_ttm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/rs400.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/rs400.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/rv515.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/radeon/rv515.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/cdn-dp-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/rockchip/cdn-dp-core.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/cdn-dp-core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/rockchip/cdn-dp-core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/inno_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/rockchip/inno_hdmi.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rk3066_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/rockchip/rk3066_hdmi.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/rockchip/rockchip_drm_vop2.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rockchip_lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/rockchip/rockchip_lvds.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/sti/sti_drv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/tegra/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_buddy_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/tests/drm_buddy_test.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tidss/tidss_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/tidss/tidss_kms.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tilcdc/tilcdc_panel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/tilcdc/tilcdc_panel.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/simpledrm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/tiny/simpledrm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_bo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ttm/ttm_bo.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ttm/ttm_device.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ttm/ttm_resource.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_tt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ttm/ttm_tt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/v3d/v3d_drv.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/v3d/v3d_drv.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/v3d/v3d_gem.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/v3d/v3d_irq.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_sched.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/v3d/v3d_sched.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/v3d/v3d_sysfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/vc4_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vc4/vc4_drv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/vc4_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vc4/vc4_hdmi.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vkms/vkms_crtc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/ttm_object.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/ttm_object.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_bo.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_drv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_drv.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_fence.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_gem.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_resource.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_validation.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_validation.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_validation.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c</a></td><td class='right'>632</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/abi/guc_actions_sriov_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/abi/guc_actions_sriov_abi.h</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/abi/guc_klvs_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/abi/guc_klvs_abi.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/intel_fb_bo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/intel_fb_bo.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/intel_fbdev_fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/intel_fbdev_fb.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/xe_display.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_dsb_buffer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/xe_dsb_buffer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_fb_pin.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/xe_fb_pin.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/xe_hdcp_gsc.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_plane_initial.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/display/xe_plane_initial.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_gfx_state_commands.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/instructions/xe_gfx_state_commands.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_gfxpipe_commands.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/instructions/xe_gfxpipe_commands.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_instr_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/instructions/xe_instr_defs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_engine_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_engine_regs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_gsc_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_gsc_regs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_gt_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_gt_regs.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_gtt_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_gtt_defs.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_guc_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_guc_regs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_reg_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_reg_defs.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_sriov_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/regs/xe_sriov_regs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_bo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_bo.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_bo_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_bo_test.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_dma_buf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_dma_buf.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_dma_buf_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_dma_buf_test.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_guc_id_mgr_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_guc_id_mgr_test.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_live_test_mod.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_live_test_mod.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_migrate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_migrate.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_migrate_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_migrate_test.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_mocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_mocs.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_mocs_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_mocs_test.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_wa_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/tests/xe_wa_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_bb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_bo.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_bo.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo_evict.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_bo_evict.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_debugfs.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_devcoredump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_devcoredump.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_devcoredump.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_devcoredump.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_device.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_device.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_device_sysfs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device_sysfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_device_sysfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_device_types.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_dma_buf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_dma_buf.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_drm_client.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_drm_client.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_exec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_exec.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_exec_queue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_exec_queue.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_exec_queue_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_exec_queue_types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ggtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ggtt.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ggtt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ggtt.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_proxy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc_proxy.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_proxy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc_proxy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_submit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc_submit.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_submit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc_submit.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gsc_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_ccs_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_ccs_mode.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_ccs_mode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_ccs_mode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_clock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_clock.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_clock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_clock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_debugfs.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_debugfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_freq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_freq.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_freq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_freq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_idle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_idle.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_idle.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_idle.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_mcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_mcr.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_mcr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_mcr.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c</a></td><td class='right'>1977</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_helpers.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_policy_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_policy_types.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sysfs.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sysfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_sysfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_topology.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_topology.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_gt_types.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ads.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_ads.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ads_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_ads_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ct.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_ct.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ct.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_ct.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ct_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_ct_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_debugfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_fwif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_fwif.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_hwconfig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_hwconfig.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_id_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_id_mgr.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_id_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_id_mgr.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_klv_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_klv_helpers.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_klv_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_klv_helpers.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_log.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_log.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_pc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_pc.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_submit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_submit.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_submit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_submit.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_submit_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_submit_types.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_guc_types.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hmm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hmm.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hmm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hmm.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_huc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_huc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_huc_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_huc_debugfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hw_engine.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hw_engine.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hw_fence.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hw_fence.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hwmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_hwmon.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lmtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_lmtt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lrc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_lrc.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lrc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_lrc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lrc_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_lrc_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_memirq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_memirq.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_migrate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_migrate.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_mmio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_mmio.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_mmio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_mmio.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_mocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_mocs.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_module.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_module.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_module.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pat.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pci.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pcode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pcode.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pcode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pcode.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_platform_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_platform_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pm.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pm.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_pt.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_query.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_query.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ring_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ring_ops.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sa.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sched_job.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sched_job.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sched_job.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sched_job.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sriov.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sriov.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sriov.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sriov.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sriov_pf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sriov_pf.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sriov_pf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sriov_pf.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sriov_pf_helpers.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sriov_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sriov_types.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sync.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sync.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_sync.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_tile.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_tile.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_tile_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_tile_sysfs.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_tile_sysfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_tile_sysfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_trace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ttm_sys_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ttm_sys_mgr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ttm_vram_mgr.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_ttm_vram_mgr.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_tuning.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_tuning.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_uc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_uc_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_uc_fw.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc_fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_uc_fw.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc_fw_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_uc_fw_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_vm.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vm_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_vm_types.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vram_freq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_vram_freq.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vram_freq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_vram_freq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_wa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_wa.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_wa_oob.rules?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xe/xe_wa_oob.rules</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_disp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xlnx/zynqmp_disp.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_disp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xlnx/zynqmp_disp.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_disp_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xlnx/zynqmp_disp_regs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xlnx/zynqmp_dp.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_dpsub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xlnx/zynqmp_dpsub.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/xlnx/zynqmp_kms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/host1x/dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/host1x/dev.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/amd-sfh-hid/amd_sfh_pcie.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/bpf/hid_bpf_dispatch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/hid_bpf_dispatch.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/FR-TEC__Raptor-Mach-2.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/FR-TEC__Raptor-Mach-2.bpf.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/HP__Elite-Presenter.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/HP__Elite-Presenter.bpf.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/Huion__Kamvas-Pro-19.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/Huion__Kamvas-Pro-19.bpf.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/IOGEAR__Kaliber-MMOmentum.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/IOGEAR__Kaliber-MMOmentum.bpf.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/Makefile</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/Microsoft__XBox-Elite-2.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/Microsoft__XBox-Elite-2.bpf.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/README?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/README</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/Wacom__ArtPen.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/Wacom__ArtPen.bpf.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/XPPen__Artist24.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/XPPen__Artist24.bpf.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/XPPen__ArtistPro16Gen2.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/XPPen__ArtistPro16Gen2.bpf.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/hid_bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/hid_bpf.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/hid_bpf_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/bpf/progs/hid_bpf_helpers.h</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-asus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-asus.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-corsair.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-corsair.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-debug.c</a></td><td class='right'>3437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.3%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 71.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-google-hammer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-google-hammer.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-ids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-ids.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-kye.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-kye.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-lenovo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-lenovo.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-logitech-dj.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-logitech-dj.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-logitech-hidpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-logitech-hidpp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-mcp2221.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-mcp2221.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-multitouch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-multitouch.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-nintendo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-nintendo.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-picolcd_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-picolcd_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-picolcd_fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-picolcd_fb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-playstation.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-playstation.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-roccat-isku.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-roccat-isku.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-roccat-kone.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-roccat-kone.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-roccat-koneplus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-roccat-koneplus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-roccat-kovaplus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-roccat-kovaplus.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-roccat-pyra.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-roccat-pyra.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-sensor-custom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-sensor-custom.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-sony.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-sony.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-steam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-steam.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-uclogic-params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-uclogic-params.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/hid-winwing.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/hid-winwing.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/i2c-hid/i2c-hid-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/i2c-hid/i2c-hid-core.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ipc/hw-ish.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ipc/hw-ish.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ipc/ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ipc/ipc.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ipc/pci-ish.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ipc/pci-ish.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ishtp/hbm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ishtp/hbm.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ishtp/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ishtp/init.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ishtp/loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ishtp/loader.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hid/intel-ish-hid/ishtp/loader.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/intel-ish-hid/ishtp/loader.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/surface-hid/surface_kbd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hid/surface-hid/surface_kbd.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hte/hte-tegra194-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hte/hte-tegra194-test.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/acpi_power_meter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/acpi_power_meter.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ad7414.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ad7414.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adc128d818.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adc128d818.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adm1026.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adm1026.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adm1029.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adm1029.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adm1177.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adm1177.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adt7410.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adt7410.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adt7411.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adt7411.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adt7462.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adt7462.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/adt7470.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/adt7470.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/aquacomputer_d5next.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/aquacomputer_d5next.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/asb100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/asb100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/aspeed-g6-pwm-tach.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/aspeed-g6-pwm-tach.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/atxp1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/atxp1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/coretemp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/coretemp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/corsair-cpro.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/corsair-cpro.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/da9052-hwmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/da9052-hwmon.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/dell-smm-hwmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/dell-smm-hwmon.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ds620.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ds620.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/emc1403.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/emc1403.c</a></td><td class='right'>838</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/emc2103.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/emc2103.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/emc2305.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/emc2305.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/emc6w201.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/emc6w201.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ftsteutates.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ftsteutates.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/g760a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/g760a.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/g762.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/g762.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/gl518sm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/gl518sm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/gl520sm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/gl520sm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/hih6130.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/hih6130.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/hs3001.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/hs3001.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ina209.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ina209.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ina238.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ina238.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ina3221.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ina3221.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/it87.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/it87.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/jc42.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/jc42.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hwmon/lenovo-ec-sensors.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lenovo-ec-sensors.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lineage-pem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lineage-pem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm70.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm70.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm73.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm73.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm77.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm77.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm87.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm87.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm93.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm93.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm95241.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm95241.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/lm95245.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/lm95245.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc2945.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc2945.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc2947-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc2947-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc2990.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc2990.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc2991.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc2991.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc2992.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc2992.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc4151.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc4151.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc4215.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc4215.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc4222.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc4222.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc4245.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc4245.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc4260.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc4260.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/ltc4261.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/ltc4261.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max127.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max127.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max1619.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max1619.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max31730.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max31730.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max31790.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max31790.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max6620.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max6620.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max6621.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max6621.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max6639.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max6639.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/max6642.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/max6642.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/mc34vr500.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/mc34vr500.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/nct7802.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/nct7802.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/nct7904.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/nct7904.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/npcm750-pwm-fan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/npcm750-pwm-fan.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/nzxt-kraken3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/nzxt-kraken3.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pcf8591.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pcf8591.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/adm1266.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/adm1266.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/adm1275.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/adm1275.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/adp1050.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/adp1050.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/inspur-ipsps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/inspur-ipsps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/ir35221.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/ir35221.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/ir36021.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/ir36021.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/ir38064.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/ir38064.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/irps5401.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/irps5401.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/lt7182s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/lt7182s.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/ltc3815.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/ltc3815.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/max15301.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/max15301.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/max16064.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/max16064.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/max20751.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/max20751.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/max31785.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/max31785.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/max8688.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/max8688.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/mp2888.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/mp2888.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/mp2975.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/mp2975.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/mp5990.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/mp5990.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/mpq8785.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/mpq8785.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/pli1209bc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/pli1209bc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/pm6764tr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/pm6764tr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/pxe1610.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/pxe1610.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/stpddc60.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/stpddc60.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/tda38640.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/tda38640.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/tps40422.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/tps40422.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/tps546d24.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/tps546d24.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/ucd9000.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/ucd9000.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/xdp710.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/xdp710.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/xdpe12284.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/xdpe12284.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pmbus/xdpe152c4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pmbus/xdpe152c4.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pt5161l.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pt5161l.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/pwm-fan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/pwm-fan.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/sbrmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/sbrmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/sbtsi_temp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/sbtsi_temp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/sht21.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/sht21.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/sht4x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/sht4x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/smsc47m192.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/smsc47m192.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/stts751.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/stts751.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/tc654.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/tc654.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/tc74.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/tc74.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/tmp102.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/tmp102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/tmp103.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/tmp103.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/tmp108.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/tmp108.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/w83791d.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/w83791d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/w83792d.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/w83792d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/w83793.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/w83793.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/w83l785ts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/w83l785ts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/w83l786ng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/hwmon/w83l786ng.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/i2c-core-base.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/i2c/i2c-core-base.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/accel/mxc4005.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/accel/mxc4005.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/addac/ad74115.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/addac/ad74115.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/frequency/admv1013.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/frequency/admv1013.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/imu/adis16475.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/imu/adis16475.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/pressure/bmp280-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/pressure/bmp280-core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/pressure/bmp280-spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/pressure/bmp280-spi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/pressure/bmp280.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iio/pressure/bmp280.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/core/addr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/core/addr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/hfi1/netdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/hw/hfi1/netdev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/hfi1/netdev_rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/hw/hfi1/netdev_rx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/irdma/cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/hw/irdma/cm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/mana/qp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/hw/mana/qp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/qedr/qedr_iw_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/hw/qedr/qedr_iw_cm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/qib/qib_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/hw/qib/qib_fs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/ulp/ipoib/ipoib_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/infiniband/ulp/ipoib/ipoib_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/joystick/xpad.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/input/joystick/xpad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/misc/atlas_btns.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/input/misc/atlas_btns.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/mouse/amimouse.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/input/mouse/amimouse.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/serio/i8042-io.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/input/serio/i8042-io.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/amd/iommu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iommu/amd/iommu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/intel/irq_remapping.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iommu/intel/irq_remapping.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/irq_remapping.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/iommu/irq_remapping.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-alpine-msi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-alpine-msi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm6345-l1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-bcm6345-l1.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-brcmstb-l2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-brcmstb-l2.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v3-its.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-gic-v3-its.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-eiointc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-loongson-eiointc.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-pch-msi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-loongson-pch-msi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-pch-pic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-loongson-pch-pic.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mxs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-mxs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-renesas-rzg2l.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-renesas-rzg2l.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-aplic-direct.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-aplic-direct.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-aplic-main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-aplic-main.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-aplic-main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-aplic-main.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-aplic-msi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-aplic-msi.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-imsic-early.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-imsic-early.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-imsic-platform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-imsic-platform.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-imsic-state.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-imsic-state.c</a></td><td class='right'>865</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-imsic-state.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-riscv-imsic-state.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sifive-plic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-sifive-plic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-stm32-exti.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-stm32-exti.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sunxi-nmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-sunxi-nmi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-tb10x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/irqchip/irq-tb10x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/isdn/capi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/isdn/capi/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/isdn/capi/kcapi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/isdn/capi/kcapi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/macintosh/via-macii.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/macintosh/via-macii.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/bset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/bcache/bset.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/bset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/bcache/bset.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/btree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/bcache/btree.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/bcache/super.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/bcache/sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/writeback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/bcache/writeback.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-bio-prison-v2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-bio-prison-v2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-cache-target.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-cache-target.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-clone-metadata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-clone-metadata.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-clone-target.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-clone-target.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-crypt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-crypt.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-delay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-delay.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-era-target.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-era-target.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-mpath.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-mpath.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-table.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-thin.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-thin.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-vdo/data-vio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-vdo/data-vio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-vdo/flush.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-vdo/flush.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-vdo/murmurhash3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-vdo/murmurhash3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-zone.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm-zone.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/dm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/md-bitmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/md-bitmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/md.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/md.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/md.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/md.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/raid5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/md/raid5.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/memory/brcmstb_memc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/memory/brcmstb_memc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/memory/mtk-smi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/memory/mtk-smi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/message/fusion/mptfc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/message/fusion/mptfc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/message/fusion/mptsas.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/message/fusion/mptsas.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/message/fusion/mptscsih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/message/fusion/mptscsih.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/message/fusion/mptspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/message/fusion/mptspi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/axp20x-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mfd/axp20x-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/axp20x-rsb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mfd/axp20x-rsb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/axp20x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mfd/axp20x.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/eeprom/at24.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/eeprom/at24.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/lkdtm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/lkdtm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/lkdtm/perms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/lkdtm/perms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mei/hw-me-regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/mei/hw-me-regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mei/pci-me.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/mei/pci-me.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mei/pxp/mei_pxp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/mei/pxp/mei_pxp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/pvpanic/pvpanic-pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/misc/pvpanic/pvpanic-pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/moxart-mmc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mmc/host/moxart-mmc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-msm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mmc/host/sdhci-msm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-of-dwcmshc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mmc/host/sdhci-of-dwcmshc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-pci-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mmc/host/sdhci-pci-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/mtdcore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mtd/mtdcore.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/nand/raw/brcmnand/brcmnand.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mtd/nand/raw/brcmnand/brcmnand.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/nand/raw/diskonchip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mtd/nand/raw/diskonchip.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/nand/raw/qcom_nandc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/mtd/nand/raw/qcom_nandc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/arcnet/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/arcnet/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/arcnet/arcdevice.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/arcnet/arcdevice.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/arcnet/arcnet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/arcnet/arcnet.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bareudp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bareudp.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bonding/bond_main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bonding/bond_netlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_options.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bonding/bond_options.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_procfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bonding/bond_procfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bonding/bond_sysfs.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_sysfs_slave.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/bonding/bond_sysfs_slave.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/cc770/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/can/cc770/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/dev/dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/can/dev/dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/sja1000/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/can/sja1000/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/vcan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/can/vcan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/vxcan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/can/vxcan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/b53/b53_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/b53/b53_common.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/b53/b53_priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/b53/b53_priv.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/bcm_sf2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/bcm_sf2.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/hirschmann/hellcreek_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/hirschmann/hellcreek_ptp.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/lan9303-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/lan9303-core.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/lantiq_gswip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/lantiq_gswip.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz8.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz8.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz8795.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz8795.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz8795_reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz8795_reg.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz9477.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz9477.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz9477_tc_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz9477_tc_flower.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz_common.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz_common.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_dcb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz_dcb.c</a></td><td class='right'>809</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_dcb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz_dcb.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/microchip/ksz_spi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mt7530-mdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mt7530-mdio.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mt7530.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mt7530.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mt7530.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mt7530.h</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/chip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mv88e6xxx/chip.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/chip.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mv88e6xxx/chip.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/global1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mv88e6xxx/global1.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/global1.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mv88e6xxx/global1.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/port.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/mv88e6xxx/port.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/ocelot/felix_vsc9959.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/ocelot/felix_vsc9959.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/qca/ar9331.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/qca/ar9331.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/qca/qca8k-8xxx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/qca/qca8k-8xxx.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/realtek/realtek.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/realtek/realtek.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/realtek/rtl8365mb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/realtek/rtl8365mb.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/realtek/rtl8366rb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/realtek/rtl8366rb.c</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/realtek/rtl83xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/realtek/rtl83xx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/rzn1_a5psw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/rzn1_a5psw.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/sja1105/sja1105_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/sja1105/sja1105_flower.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/sja1105/sja1105_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/sja1105/sja1105_main.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/vitesse-vsc73xx-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/vitesse-vsc73xx-core.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/vitesse-vsc73xx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/vitesse-vsc73xx.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/xrs700x/xrs700x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/dsa/xrs700x/xrs700x.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/3com/3c515.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/3com/3c515.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/3com/3c589_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/3com/3c589_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/3com/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/3com/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/8390/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/8390/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/8390/etherh.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/8390/etherh.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/8390/pcnet_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/8390/pcnet_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/adi/adin1110.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/adi/adin1110.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/agere/et131x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/agere/et131x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/alteon/acenic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/alteon/acenic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/altera/altera_tse_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/altera/altera_tse_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_com.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_com.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_eth_com.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_eth_com.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_eth_com.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_eth_com.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_ethtool.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_netdev.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_regs_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amazon/ena/ena_regs_defs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/amd8111e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/amd8111e.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/amd8111e.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/amd8111e.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/nmclan_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/nmclan_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/pds_core/core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/pds_core/devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/apm/xgene/xgene_enet_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/atheros/ag71xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/atheros/ag71xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/atheros/alx/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/atheros/alx/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/atheros/atlx/atl1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/atheros/atlx/atl1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/atheros/atlx/atl2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/atheros/atlx/atl2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/b44.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/b44.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bcm63xx_enet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bcm63xx_enet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnx2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnx2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt.c</a></td><td class='right'>772</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/cnic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/cnic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmmii.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/tg3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/broadcom/tg3.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/brocade/bna/bnad.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/brocade/bna/bnad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/brocade/bna/bnad_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/brocade/bna/bnad_debugfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cadence/macb_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cadence/macb_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/calxeda/xgmac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/calxeda/xgmac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/liquidio/lio_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cavium/liquidio/lio_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/liquidio/lio_vf_rep.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cavium/liquidio/lio_vf_rep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cavium/octeon/octeon_mgmt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cavium/thunder/nicvf_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb/cxgb2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb/cxgb2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/sge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cisco/enic/enic_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cisco/enic/enic_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cisco/enic/vnic_dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cisco/enic/vnic_dev.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cisco/enic/vnic_dev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cisco/enic/vnic_dev.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cortina/gemini.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/cortina/gemini.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/dlink/sundance.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/dlink/sundance.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/emulex/benet/be_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/emulex/benet/be_main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/faraday/ftmac100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/faraday/ftmac100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-flower.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/enetc/enetc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/fec_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/fec_main.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/fman/fman_memac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/fman/fman_memac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/fman/fman_muram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/fman/fman_muram.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/gianfar.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/freescale/gianfar.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/fujitsu/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/fujitsu/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/fungible/funeth/funeth_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/fungible/funeth/funeth_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_adminq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_adminq.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_adminq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_adminq.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_dqo.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_dqo.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_ethtool.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_main.c</a></td><td class='right'>619</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_rx.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_rx_dqo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_rx_dqo.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_tx.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_tx_dqo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/google/gve/gve_tx_dqo.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns/hns_enet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns/hns_enet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hnae3.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hnae3.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c</a></td><td class='right'>646</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h</a></td><td class='right'>643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_trace.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_trace.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic/hinic_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/huawei/hinic/hinic_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/emac/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ibm/emac/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/emac/mal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ibm/emac/mal.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/emac/mal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ibm/emac/mal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/ibmveth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ibm/ibmveth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/ibmvnic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ibm/ibmvnic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/e100.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000/e1000_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000e/defines.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/e1000e/defines.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000e/ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000e/netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/e1000e/netdev.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000e/phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/e1000e/phy.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/fm10k/fm10k_pci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_client.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_client.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_common.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_ddp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_ddp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_debugfs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_ethtool.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_main.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_nvm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_nvm.c</a></td><td class='right'>1010</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_prototype.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_prototype.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_ptp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_txrx.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_txrx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_type.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_xsk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/i40e/i40e_xsk.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_common.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_ethtool.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_main.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_prototype.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_prototype.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_txrx.c</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_txrx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_txrx.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_type.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/iavf/iavf_virtchnl.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/devlink/devlink.c</a> (renamed from drivers/net/ethernet/intel/ice/ice_devlink.c)</td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/devlink/devlink.h</a> (renamed from drivers/net/ethernet/intel/ice/ice_devlink.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink_port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/devlink/devlink_port.c</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink_port.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/devlink/devlink_port.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_adapter.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_adapter.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_adminq_cmd.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_base.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_base.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_common.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_dcb_lib.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_ddp.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_ddp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_debugfs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_devids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_devids.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_eswitch.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_eswitch.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_fdir.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_fdir.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_fdir.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_fdir.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_flex_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_flex_type.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_fw_update.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_fw_update.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_fw_update.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_fw_update.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lag.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_lag.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lag.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_lag.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_lib.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_lib.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_main.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_nvm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_nvm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_nvm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_nvm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_protocol_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_protocol_type.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_ptp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_ptp_hw.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_repr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_repr.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_repr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_repr.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_sched.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_sched.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_sched.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_sriov.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_sriov.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_switch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_switch.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_switch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_switch.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_tc_lib.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_tc_lib.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_txrx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_txrx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_txrx_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_txrx_lib.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_type.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_vf_lib.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_virtchnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_virtchnl.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_vsi_vlan_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_ops.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_xsk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ice/ice_xsk.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/idpf/idpf_lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/idpf/idpf_txrx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/idpf/idpf_txrx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/virtchnl2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/idpf/virtchnl2.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igb/igb_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igb/igb_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igb/igb_main.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igbvf/netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igbvf/netdev.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igc/igc.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igc/igc_ethtool.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_leds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igc/igc_leds.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igc/igc_main.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/igc/igc_ptp.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/libeth/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/libeth/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/libeth/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/libeth/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/libeth/rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/libeth/rx.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/libie/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/libie/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/libie/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/libie/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/libie/rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/intel/libie/rx.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/jme.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/jme.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/lantiq_etop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/lantiq_etop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/lantiq_xrx200.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/lantiq_xrx200.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/mv643xx_eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/mvneta.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/mvneta.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeon_ep/octep_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/cgx.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/cgx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/mbox.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rpm.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rpm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/octeontx2/nic/qos.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/prestera/prestera_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/prestera/prestera_flower.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/prestera/prestera_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/prestera/prestera_hw.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/prestera/prestera_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/prestera/prestera_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/prestera/prestera_rxtx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/prestera/prestera_rxtx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/pxa168_eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/pxa168_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/skge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/skge.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/sky2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/marvell/sky2.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mediatek/mtk_eth_soc.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mediatek/mtk_eth_soc.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_ppe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mediatek/mtk_ppe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_ppe_offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mediatek/mtk_ppe_offload.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx4/en_rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx4/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx4/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/debugfs.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/channels.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/channels.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/channels.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/channels.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/dim.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/dim.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/params.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/params.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/params.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/port.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_gre.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_gre.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_stats.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_stats.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_dim.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_fs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/eq.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/main.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_env.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/core_env.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/pci.c</a></td><td class='right'>540</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/pci_hw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/reg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/micrel/ks8851_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/micrel/ks8851_common.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/micrel/ksz884x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/micrel/ksz884x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/encx24j600-regmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/encx24j600-regmap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/encx24j600.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/encx24j600.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/encx24j600_hw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/encx24j600_hw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan743x_ethtool.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan743x_main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan743x_ptp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan743x_ptp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ifh.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan966x/lan966x_ifh.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan966x/lan966x_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan966x/lan966x_main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan966x/lan966x_port.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_tc_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan966x/lan966x_tc_flower.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_main.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_packet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_port.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_tc_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_tc_flower.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_tc_matchall.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/sparx5/sparx5_tc_matchall.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/vcap/vcap_ag_api.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/vcap/vcap_ag_api.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/vcap/vcap_api.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_client.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/vcap/vcap_api_client.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microchip/vcap/vcap_api_private.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microsoft/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microsoft/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microsoft/mana/mana_en.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/microsoft/mana/mana_en.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mscc/ocelot_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/mscc/ocelot_flower.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/natsemi/natsemi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/natsemi/natsemi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/neterion/s2io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/neterion/s2io.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/devlink_param.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/devlink_param.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/flower/action.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/flower/action.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/flower/offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/flower/offload.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfp_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/nfp_devlink.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/nfp_net_common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_debugdump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/nfp_net_debugdump.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_repr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/netronome/nfp/nfp_net_repr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ni/nixge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ni/nixge.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/nvidia/forcedeth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/nvidia/forcedeth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/pasemi/pasemi_mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/pasemi/pasemi_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/pensando/ionic/ionic_lif.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/pensando/ionic/ionic_lif.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/qed/qed.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/qed/qed_devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/qed/qed_main.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qede/qede_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/qede/qede_ethtool.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qede/qede_filter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/qede/qede_filter.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qualcomm/emac/emac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qualcomm/emac/emac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/8139cp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/realtek/8139cp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/r8169_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/realtek/r8169_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/renesas/ravb_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/renesas/ravb_main.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/renesas/sh_eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/renesas/sh_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/rocker/rocker_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/rocker/rocker_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sfc/efx_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sfc/efx_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sfc/falcon/efx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sfc/falcon/efx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sfc/siena/efx_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sfc/siena/efx_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sfc/tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sfc/tc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sis/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sis/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sis/sis900.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sis/sis900.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/smsc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/smsc/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/smsc/smc91c92_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/smsc/smc91c92_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/smsc/smc91x.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/smsc/smc91x.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-rzn1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/dwmac-rzn1.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/hwif.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sun/cassini.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sun/cassini.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sun/niu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sun/niu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sun/sungem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/sun/sungem.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/synopsys/dwc-xlgmac-net.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/tehuti/tehuti.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/tehuti/tehuti.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpsw-ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/am65-cpsw-ethtool.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/am65-cpsw-nuss.c</a></td><td class='right'>704</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/am65-cpsw-nuss.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpsw-qos.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/am65-cpsw-qos.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/am65-cpts.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpts.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/am65-cpts.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/cpsw_new.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/cpsw_new.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/cpsw_priv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/cpsw_priv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_classifier.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_classifier.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_common.c</a></td><td class='right'>1252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_config.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_config.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_config.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_ethtool.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_prueth.c</a></td><td class='right'>1197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 10.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_prueth.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c</a></td><td class='right'>1181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/k3-cppi-desc-pool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/k3-cppi-desc-pool.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/k3-cppi-desc-pool.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/ti/k3-cppi-desc-pool.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/via/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/via/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/via/via-velocity.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/via/via-velocity.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/wangxun/libwx/wx_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/wangxun/libwx/wx_lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/xilinx/xilinx_axienet.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xircom/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/xircom/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xircom/xirc2ps_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/xircom/xirc2ps_cs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xscale/ixp4xx_eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/fddi/defxx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/fddi/defxx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/fjes/fjes_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/fjes/fjes_main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/geneve.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/geneve.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/gtp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/gtp.c</a></td><td class='right'>868</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hamradio/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/hamradio/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hyperv/netvsc_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/hyperv/netvsc_drv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v3.1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v3.1.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v3.5.1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v3.5.1.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v4.11.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v4.2.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v4.5.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.7.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v4.7.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v4.9.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v5.0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v5.0.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v5.5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/data/ipa_data-v5.5.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/gsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/gsi.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/gsi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/gsi.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/gsi_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/gsi_private.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/gsi_reg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/gsi_reg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/gsi_trans.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/gsi_trans.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/gsi_trans.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/gsi_trans.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_cmd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_cmd.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_data.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_endpoint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_endpoint.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_endpoint.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_endpoint.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_gsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_gsi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_interrupt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_interrupt.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_interrupt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_interrupt.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_main.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_mem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_mem.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_mem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_mem.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_modem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_modem.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_modem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_modem.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_power.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_power.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_power.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_power.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_qmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_qmi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_qmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_qmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_qmi_msg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_qmi_msg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_qmi_msg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_qmi_msg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_reg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_reg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_resource.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_smp2p.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_smp2p.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_sysfs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_sysfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_sysfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_table.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_table.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_table.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_uc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_uc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_uc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_uc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_version.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/ipa_version.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v3.1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v3.1.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v3.5.1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v3.5.1.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v4.0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v4.0.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v4.11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v4.11.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v4.5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v4.5.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v4.9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v4.9.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/gsi_reg-v5.0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/gsi_reg-v5.0.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v3.1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v3.1.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v3.5.1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v3.5.1.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v4.11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v4.11.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v4.2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v4.2.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v4.5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v4.5.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v4.7.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v4.7.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v4.9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v4.9.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v5.0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v5.0.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/reg/ipa_reg-v5.5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipa/reg/ipa_reg-v5.5.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipvlan/ipvlan_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ipvlan/ipvlan_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/loopback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/loopback.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/macsec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/macsec.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/macvlan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/macvlan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/mdio-gpio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/mdio/mdio-gpio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/net_failover.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/net_failover.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/netdevsim/ethtool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/netdevsim/ethtool.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/netdevsim/netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/netdevsim/netdev.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/netdevsim/netdevsim.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/netdevsim/netdevsim.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ntb_netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ntb_netdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pcs/pcs-lynx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pcs/pcs-lynx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pcs/pcs-rzn1-miic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pcs/pcs-rzn1-miic.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/pfcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pfcp.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/phy/air_en8811h.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/air_en8811h.c</a></td><td class='right'>1090</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/aquantia/aquantia_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/aquantia/aquantia_main.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/dp83822.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/dp83822.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/dp83869.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/dp83869.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/marvell-88q2xxx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/marvell-88q2xxx.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/marvell.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/marvell.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mediatek-ge-soc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/mediatek-ge-soc.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mediatek-ge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/mediatek-ge.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/micrel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/micrel.c</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/phylink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/phylink.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/qcom/at803x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/qcom/at803x.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/realtek.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/realtek.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/sfp-bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/sfp-bus.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/sfp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/phy/sfp.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ppp/ppp_generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/ppp/ppp_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pse-pd/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pse-pd/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pse-pd/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pse-pd/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/pse-pd/pd692x0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pse-pd/pd692x0.c</a></td><td class='right'>1223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pse-pd/pse_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pse-pd/pse_core.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pse-pd/pse_regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pse-pd/pse_regulator.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/pse-pd/tps23881.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/pse-pd/tps23881.c</a></td><td class='right'>820</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/slip/slip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/slip/slip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/tap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/tap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/team/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/team/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/team/team_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/team/team_core.c</a> (renamed from drivers/net/team/team.c)</td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/team/team_nl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/team/team_nl.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/team/team_nl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/team/team_nl.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/tun.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/tun.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/aqc111.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/aqc111.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/asix_devices.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/asix_devices.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/ax88179_178a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/ax88179_178a.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/cdc_ncm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/cdc_ncm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/lan78xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/lan78xx.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/qmi_wwan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/qmi_wwan.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/r8152.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/r8152.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/smsc75xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/smsc75xx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/smsc95xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/smsc95xx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/sr9700.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/sr9700.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/usbnet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/usb/usbnet.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/veth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/veth.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/virtio_net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/virtio_net.c</a></td><td class='right'>1454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 87.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vmxnet3/vmxnet3_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/vmxnet3/vmxnet3_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vrf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/vrf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vsockmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/vsockmon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vxlan/vxlan_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/vxlan/vxlan_core.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wan/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wan/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wan/fsl_qmc_hdlc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wan/fsl_qmc_hdlc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireguard/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ar5523/ar5523.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ar5523/ar5523.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/core.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/debugfs_sta.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/debugfs_sta.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/hw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/hw.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/snoc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/snoc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/targaddrs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/targaddrs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/usb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/wmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath10k/wmi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/ahb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/ahb.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/core.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/core.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/debugfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/hal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/hal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/hif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/hif.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/mac.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/mhi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/mhi.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/mhi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/mhi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/p2p.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/p2p.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/p2p.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/p2p.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/pci.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/pci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/pci.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/pcic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/pcic.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/qmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/qmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/wmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/wmi.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/wmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath11k/wmi.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/acpi.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/acpi.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/core.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/core.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/debugfs.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/debugfs.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/dp.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/dp.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/dp_mon.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/dp_rx.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/dp_rx.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/dp_tx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/hal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/hif.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/htc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/htc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/hw.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/hw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/mac.c</a></td><td class='right'>1141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/mac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mhi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/mhi.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mhi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/mhi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/p2p.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/p2p.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/p2p.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/p2p.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/pci.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/pci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/qmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/qmi.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/qmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/qmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/reg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/reg.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/wmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/wmi.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/wmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath12k/wmi.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath6kl/htc_mbox.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath6kl/htc_mbox.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath6kl/htc_pipe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath6kl/htc_pipe.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath6kl/sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath6kl/sdio.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/ath9k.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/ath9k.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/eeprom_4k.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/eeprom_4k.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/eeprom_9287.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/eeprom_9287.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/eeprom_def.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/eeprom_def.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/xmit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/ath9k/xmit.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/carl9170/tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/carl9170/tx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/carl9170/usb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/carl9170/usb.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wcn36xx/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wcn36xx/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wcn36xx/txrx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wcn36xx/txrx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wcn36xx/wcn36xx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wcn36xx/wcn36xx.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wil6210/cfg80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wil6210/cfg80211.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wil6210/fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wil6210/fw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wil6210/fw_inc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wil6210/fw_inc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wil6210/wmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wil6210/wmi.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wil6210/wmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ath/wil6210/wmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/b43/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/broadcom/b43/sysfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/b43legacy/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/broadcom/b43legacy/sysfs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/bz.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/cfg/bz.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/acpi.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/acpi.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/d3.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/d3.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/offload.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/offload.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/phy.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/power.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/power.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/scan.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/scan.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/api/tx.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/dbg.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/file.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/file.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/runtime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/runtime.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/uefi.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/fw/uefi.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-config.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/iwl-config.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/iwl-drv.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-prph.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/iwl-prph.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/coex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/coex.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/constants.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/constants.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/d3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/d3.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs-vif.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs-vif.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/fw.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/link.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/link.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c</a></td><td class='right'>431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/mvm.h</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/offloading.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/ops.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/power.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/power.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/rx.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/scan.c</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/sta.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/sta.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/links.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/tests/links.c</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/tests/module.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/tests/scan.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/time-event.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/tx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/mvm/utils.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/pcie/drv.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/pcie/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/pcie/rx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/trans.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/pcie/trans.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/tests/devinfo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/intel/iwlwifi/tests/devinfo.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/marvell/mwifiex/sdio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwl8k.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/marvell/mwl8k.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/dma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mac80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mac80211.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt76.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7603/dma.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7603/mac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt76_connac.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/init.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/mac.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/soc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7915/soc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/main.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/mcu.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/pci.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7925/mac.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt792x.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt792x.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7996/mac.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7996/main.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mmio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7996/mmio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/sdio.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/testmode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/tx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/usb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/mediatek/mt76/usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/microchip/wilc1000/cfg80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/microchip/wilc1000/cfg80211.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/microchip/wilc1000/hif.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/microchip/wilc1000/hif.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/microchip/wilc1000/netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/microchip/wilc1000/netdev.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/microchip/wilc1000/netdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/microchip/wilc1000/netdev.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/microchip/wilc1000/sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/microchip/wilc1000/sdio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/microchip/wilc1000/wlan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/microchip/wilc1000/wlan.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/quantenna/qtnfmac/bus.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/quantenna/qtnfmac/bus.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/quantenna/qtnfmac/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/quantenna/qtnfmac/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/quantenna/qtnfmac/pcie/pcie.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8188e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8188e.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8188f.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8188f.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8192c.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192c.c)</td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8192e.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192f.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8192f.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8710b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8710b.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8710b.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8723a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8723a.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723a.c)</td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8723b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/8723b.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723b.c)</td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/core.c</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c)</td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/regs.h</a> (renamed from drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/cam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/cam.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/cam.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/cam.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/efuse.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/efuse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/efuse.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/efuse.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/def.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/def.h</a> (renamed from drivers/net/wireless/realtek/rtlwifi/rtl8192de/def.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.c</a></td><td class='right'>1061</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c</a></td><td class='right'>1225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c</a></td><td class='right'>856</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/reg.h</a> (renamed from drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h)</td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.c</a></td><td class='right'>1072</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 9.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.c</a></td><td class='right'>1168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 9.7%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c</a></td><td class='right'>918</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.h</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/wifi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtlwifi/wifi.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/coex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/coex.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/debug.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/fw.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/fw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/mac.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/mac80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/mac80211.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/main.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8703b.c</a></td><td class='right'>2109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8703b.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b_tables.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8703b_tables.c</a></td><td class='right'>902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b_tables.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8703b_tables.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8723cs.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8723d.c</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8723d.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8723x.c</a></td><td class='right'>721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rtw8723x.h</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw88/rx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/acpi.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/acpi.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/cam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/cam.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/cam.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/cam.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/coex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/coex.c</a></td><td class='right'>1962</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 83.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/coex.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/coex.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/core.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/core.h</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/fw.c</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/fw.h</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/mac.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/mac.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/mac80211.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac_be.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/mac_be.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/pci.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/pci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/pci.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/phy.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/phy_be.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/phy_be.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/ps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/ps.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/reg.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/regd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/regd.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8851b.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851be.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8851be.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852a.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852ae.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852ae.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852b.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852be.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852be.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852c.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852c_table.c</a></td><td class='right'>2706</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 22.4%;'/><td class='none' style='width: 77.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852ce.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8852ce.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8922a.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922ae.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/rtw8922ae.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/sar.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/sar.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/wow.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/wow.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/wow.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/realtek/rtw89/wow.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/rsi/rsi_91x_sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/rsi/rsi_91x_sdio.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wl1251/cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ti/wl1251/cmd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wl1251/sdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ti/wl1251/sdio.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wl1251/wl12xx_80211.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ti/wl1251/wl12xx_80211.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wlcore/cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ti/wlcore/cmd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wlcore/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ti/wlcore/sysfs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wlcore/wl12xx_80211.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/ti/wlcore/wl12xx_80211.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/virtual/mac80211_hwsim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wireless/virtual/mac80211_hwsim.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wwan/iosm/iosm_ipc_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wwan/iosm/iosm_ipc_devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wwan/mhi_wwan_mbim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wwan/mhi_wwan_mbim.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wwan/t7xx/t7xx_netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wwan/t7xx/t7xx_netdev.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wwan/t7xx/t7xx_netdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/wwan/t7xx/t7xx_netdev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/xen-netback/common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/xen-netback/common.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/xen-netback/interface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/xen-netback/interface.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/xen-netback/netback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/xen-netback/netback.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/xen-netfront.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/net/xen-netfront.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/nfcmrvl/spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nfc/nfcmrvl/spi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/st95hf/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nfc/st95hf/core.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/trf7970a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nfc/trf7970a.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/host/core.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/host/ioctl.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/multipath.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/host/multipath.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/nvme.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/host/nvme.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/host/pci.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/host/tcp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/auth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/auth.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/configfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/configfs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/nvmet.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/nvmet.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/rdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/rdma.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/tcp.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/zns.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/nvme/target/zns.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/of/property.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/of/property.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/opp/of.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/opp/of.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/pcie/aspm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pci/pcie/aspm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/alibaba_uncore_drw_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/alibaba_uncore_drw_pmu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/amlogic/meson_ddr_pmu_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/amlogic/meson_ddr_pmu_core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm-cci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm-cci.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm-ccn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm-ccn.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm-cmn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm-cmn.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_cspmu/arm_cspmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm_cspmu/arm_cspmu.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_dmc620_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm_dmc620_pmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_dsu_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm_dsu_pmu.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_pmu_platform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm_pmu_platform.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_smmuv3_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm_smmuv3_pmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_spe_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/arm_spe_pmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/dwc_pcie_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/dwc_pcie_pmu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/fsl_imx8_ddr_perf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/fsl_imx8_ddr_perf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/hisilicon/hisi_pcie_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/hisilicon/hisi_pcie_pmu.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/hisilicon/hisi_uncore_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/hisilicon/hisi_uncore_pmu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/hisilicon/hns3_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/hisilicon/hns3_pmu.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/qcom_l2_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/qcom_l2_pmu.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/qcom_l3_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/qcom_l3_pmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/riscv_pmu_legacy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/riscv_pmu_legacy.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/riscv_pmu_sbi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/riscv_pmu_sbi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/thunderx2_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/thunderx2_pmu.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/xgene_pmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/perf/xgene_pmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/freescale/phy-fsl-imx8m-pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/freescale/phy-fsl-imx8m-pcie.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/marvell/phy-mvebu-a3700-comphy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/marvell/phy-mvebu-a3700-comphy.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/qualcomm/phy-qcom-edp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/qualcomm/phy-qcom-edp.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/qualcomm/phy-qcom-m31.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/qualcomm/phy-qcom-m31.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/qualcomm/phy-qcom-qmp-combo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/qualcomm/phy-qcom-qmp-combo.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/qualcomm/phy-qcom-qmp-dp-phy-v5.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/qualcomm/phy-qcom-qmp-dp-phy-v5.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/qualcomm/phy-qcom-qmp-dp-phy-v6.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/qualcomm/phy-qcom-qmp-dp-phy-v6.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/rockchip/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/rockchip/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/rockchip/phy-rockchip-naneng-combphy.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/rockchip/phy-rockchip-snps-pcie3.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/ti/phy-tusb1210.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/phy/ti/phy-tusb1210.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/devicetree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/devicetree.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/intel/pinctrl-baytrail.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/intel/pinctrl-baytrail.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/intel/pinctrl-intel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/intel/pinctrl-intel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/mediatek/pinctrl-paris.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/mediatek/pinctrl-paris.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/meson/pinctrl-meson-a1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/meson/pinctrl-meson-a1.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/pinctrl-cy8c95x0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/pinctrl-cy8c95x0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/pinctrl/pinctrl-scmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/pinctrl-scmi.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/renesas/pinctrl-rzg2l.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pinctrl/renesas/pinctrl-rzg2l.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_chardev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_chardev.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_debugfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_lightbar.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_lightbar.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_lpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_lpc.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_proto_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_proto_test.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_sensorhub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_sensorhub.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_sysfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_vbc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_ec_vbc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_hps_i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_hps_i2c.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_kbd_led_backlight.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_kbd_led_backlight.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_usbpd_logger.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_usbpd_logger.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_usbpd_notify.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/cros_usbpd_notify.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/wilco_ec/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/wilco_ec/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/wilco_ec/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/wilco_ec/core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/wilco_ec/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/wilco_ec/debugfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/wilco_ec/event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/wilco_ec/event.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/wilco_ec/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/wilco_ec/sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/wilco_ec/telemetry.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/chrome/wilco_ec/telemetry.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/asus-laptop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/asus-laptop.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/classmate-laptop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/classmate-laptop.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/dell/dell-rbtn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/dell/dell-rbtn.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/eeepc-laptop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/eeepc-laptop.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/rst.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/intel/rst.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/smartconnect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/intel/smartconnect.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/speed_select_if/isst_if_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/intel/speed_select_if/isst_if_common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/lg-laptop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/lg-laptop.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/sony-laptop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/sony-laptop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/toshiba_acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/toshiba_acpi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/toshiba_bluetooth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/toshiba_bluetooth.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/toshiba_haps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/toshiba_haps.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/wireless-hotkey.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/platform/x86/wireless-hotkey.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pnp/isapnp/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pnp/isapnp/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/mt6360_charger.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/power/supply/mt6360_charger.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/rt9455_charger.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/power/supply/rt9455_charger.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/powercap/dtpm_cpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/powercap/dtpm_cpu.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/powercap/intel_rapl_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/powercap/intel_rapl_common.c</a></td><td class='right'>607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/powercap/intel_rapl_tpmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/powercap/intel_rapl_tpmi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_clockmatrix.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_clockmatrix.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_dte.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_dte.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_idt82p33.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_idt82p33.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_ines.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_ines.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_ocp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_ocp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_qoriq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_qoriq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_vmw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ptp/ptp_vmw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/core.c</a></td><td class='right'>604</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-bcm2835.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/pwm-bcm2835.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-meson.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/pwm-meson.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-pca9685.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/pwm-pca9685.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-sti.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/pwm-sti.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-stm32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/pwm-stm32.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/pwm/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/pwm/sysfs.c</a></td><td class='right'>545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/axp20x-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/axp20x-regulator.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/core.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/da9121-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/da9121-regulator.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/da9211-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/da9211-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/devres.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/devres.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/irq_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/irq_helpers.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/isl9305.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/isl9305.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/max8973-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/max8973-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/mt6311-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/mt6311-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/mt6360-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/mt6360-regulator.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/pca9450-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/pca9450-regulator.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/pf8x00-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/pf8x00-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/pfuze100-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/pfuze100-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/qcom-refgen-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/qcom-refgen-regulator.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/rpi-panel-attiny-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/rpi-panel-attiny-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/rtmv20-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/rtmv20-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/rtq2208-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/rtq2208-regulator.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/rtq6752-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/rtq6752-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/regulator/sun20i-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/sun20i-regulator.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/tps51632-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/tps51632-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/tps62360-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/tps62360-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/vqmmc-ipq4019-regulator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/regulator/vqmmc-ipq4019-regulator.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/reset/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/reset/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/block/dasd_eckd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/block/dasd_eckd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/char/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/char/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/char/raw3270.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/char/raw3270.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/chp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/chp.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/chp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/chp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/chsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/chsc.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/chsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/chsc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/cio_inject.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/cio_inject.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/css.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/css.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/css.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/css.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/idset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/idset.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/cio/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/cio/trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/ap_bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/ap_bus.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/ap_bus.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/ap_bus.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/ap_queue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/ap_queue.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/vfio_ap_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/vfio_ap_ops.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/vfio_ap_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/vfio_ap_private.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_ccamisc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/zcrypt_ccamisc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_ep11misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/crypto/zcrypt_ep11misc.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/net/ctcm_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/net/ctcm_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/net/ism_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/net/ism_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/net/qeth_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/net/qeth_core.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/net/qeth_core_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/s390/net/qeth_core_main.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/FlashPoint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/FlashPoint.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/a3000.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/a3000.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/a4000t.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/a4000t.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/aha152x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/aha152x.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/aic7xxx/Kconfig.aic79xx?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/aic7xxx/Kconfig.aic79xx</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/aic7xxx/Kconfig.aic7xxx?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/aic7xxx/Kconfig.aic7xxx</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/aic94xx/aic94xx_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/aic94xx/aic94xx_init.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/atari_scsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/atari_scsi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/bfa/bfad_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/bfa/bfad_debugfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/bnx2fc/bnx2fc_tgt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/bnx2fc/bnx2fc_tgt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/csiostor/csio_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/csiostor/csio_init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/cxlflash/lunmgt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/cxlflash/lunmgt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/cxlflash/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/cxlflash/main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/cxlflash/superpipe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/cxlflash/superpipe.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/cxlflash/superpipe.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/cxlflash/superpipe.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/cxlflash/vlun.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/cxlflash/vlun.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hisi_sas/hisi_sas.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hisi_sas/hisi_sas_main.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hisi_sas/hisi_sas_v1_hw.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hisi_sas/hisi_sas_v2_hw.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hisi_sas/hisi_sas_v3_hw.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hosts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hosts.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hpsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hpsa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hptiop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/hptiop.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/ibmvscsi/ibmvfc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/ibmvscsi/ibmvfc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/imm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/imm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/ipr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/ipr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/isci/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/isci/init.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/iscsi_tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/iscsi_tcp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/libsas/sas_ata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/libsas/sas_ata.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/libsas/sas_expander.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/libsas/sas_expander.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/libsas/sas_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/libsas/sas_internal.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/libsas/sas_scsi_host.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/libsas/sas_scsi_host.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_attr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_attr.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_bsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_bsg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_ct.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_ct.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_els.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_els.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_hbadisc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_hbadisc.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_hw4.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_hw4.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_init.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_nportdisc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_nportdisc.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_nvme.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_nvme.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_nvmet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_nvmet.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_scsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_scsi.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_scsi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_scsi.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_sli.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_sli.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_version.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/lpfc/lpfc_version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mac_scsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mac_scsi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/Kconfig.megaraid?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/megaraid/Kconfig.megaraid</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_sas.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/megaraid/megaraid_sas.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_sas_base.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/megaraid/megaraid_sas_base.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_sas_fusion.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/megaraid/megaraid_sas_fusion.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi/mpi30_cnfg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi/mpi30_cnfg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi/mpi30_image.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi/mpi30_image.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi/mpi30_ioc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi/mpi30_transport.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi/mpi30_transport.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi3mr.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr_app.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi3mr_app.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi3mr_fw.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr_os.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi3mr_os.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr_transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpi3mr/mpi3mr_transport.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpt3sas/mpt3sas_base.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpt3sas/mpt3sas_base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpt3sas/mpt3sas_scsih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpt3sas/mpt3sas_scsih.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpt3sas/mpt3sas_transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mpt3sas/mpt3sas_transport.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mvsas/mv_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/mvsas/mv_init.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/pm8001/pm8001_ctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/pm8001/pm8001_ctl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/pm8001/pm8001_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/pm8001/pm8001_init.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/pm8001/pm8001_sas.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/pm8001/pm8001_sas.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/pmcraid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/pmcraid.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/ppa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/ppa.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedf/qedf_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qedf/qedf_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedf/qedf_io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qedf/qedf_io.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedf/qedf_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qedf/qedf_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedi/qedi_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qedi/qedi_debugfs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qla2xxx/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_dfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qla2xxx/qla_dfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_mr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qla2xxx/qla_mr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_os.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qla2xxx/qla_os.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla4xxx/ql4_mbx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qla4xxx/ql4_mbx.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla4xxx/ql4_os.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/qla4xxx/ql4_os.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_debugfs.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_devinfo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_devinfo.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_lib.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_scan.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_sysfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_transport_fc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_transport_fc.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_transport_iscsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_transport_iscsi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_transport_sas.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/scsi_transport_sas.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/sd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/sd.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sd_zbc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/sd_zbc.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/ses.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/ses.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/smartpqi/smartpqi_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/smartpqi/smartpqi_init.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/snic/snic_attrs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/snic/snic_attrs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/sr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/st.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/st.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/wd33c93.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/scsi/wd33c93.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/slimbus/qcom-ngd-ctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/slimbus/qcom-ngd-ctrl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/canaan/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/canaan/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/hisilicon/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/hisilicon/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/hisilicon/kunpeng_hccs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/hisilicon/kunpeng_hccs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/mediatek/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/mediatek/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/mediatek/mtk-cmdq-helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/mediatek/mtk-cmdq-helper.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/mediatek/mtk-mutex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/mediatek/mtk-mutex.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/mediatek/mtk-socinfo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/mediatek/mtk-socinfo.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/mediatek/mtk-svs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/mediatek/mtk-svs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/pxa/ssp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/pxa/ssp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/cmd-db.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/cmd-db.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/icc-bwmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/icc-bwmon.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/pmic_glink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/pmic_glink.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/pmic_pdcharger_ulog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/pmic_pdcharger_ulog.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/qcom_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/qcom_stats.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/rpm_master_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/rpm_master_stats.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/rpmh-rsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/rpmh-rsc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/socinfo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/qcom/socinfo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/renesas/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/renesas/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/renesas/renesas-soc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/renesas/renesas-soc.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/samsung/exynos-asv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/samsung/exynos-asv.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/tegra/pmc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/tegra/pmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/ti/wkup_m3_ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soc/ti/wkup_m3_ipc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soundwire/amd_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soundwire/amd_manager.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soundwire/amd_manager.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/soundwire/amd_manager.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/spi/spi-airoha-snfi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-airoha-snfi.c</a></td><td class='right'>1129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-altera-platform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-altera-platform.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-amd.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-armada-3700.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-armada-3700.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-atmel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-atmel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-au1550.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-au1550.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-axi-spi-engine.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-axi-spi-engine.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-bitbang.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-bitbang.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-cadence-quadspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-cadence-quadspi.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-cadence-xspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-cadence-xspi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-coldfire-qspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-coldfire-qspi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-cs42l43.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-cs42l43.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-dw-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-dw-core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-dw-mmio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-dw-mmio.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-dw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-dw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-cpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-fsl-cpm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-cpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-fsl-cpm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-dspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-fsl-dspi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-lpspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-fsl-lpspi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-fsl-spi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-hisi-kunpeng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-hisi-kunpeng.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-imx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-imx.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-loopback-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-loopback-test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-microchip-core-qspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-microchip-core-qspi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-mt65xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-mt65xx.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-mt7621.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-mt7621.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-mux.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-mux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-oc-tiny.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-oc-tiny.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-omap2-mcspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-omap2-mcspi.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pic32-sqi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-pic32-sqi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pic32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-pic32.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pxa2xx-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-pxa2xx-dma.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pxa2xx-pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-pxa2xx-pci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pxa2xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-pxa2xx.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pxa2xx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-pxa2xx.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-rspi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-rspi.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-s3c64xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-s3c64xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-stm32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-stm32.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-sun4i.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-sun4i.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-sun6i.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-sun6i.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-xlp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi-xlp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/spi/spi.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ssb/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ssb/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/iio/impedance-analyzer/ad5933.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/staging/iio/impedance-analyzer/ad5933.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/rts5208/rtsx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/staging/rts5208/rtsx.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/target_core_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/target/target_core_device.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/amdtee/amdtee_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/amdtee/amdtee_private.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/amdtee/call.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/amdtee/call.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/amdtee/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/amdtee/core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/amdtee/shm_pool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/amdtee/shm_pool.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/call.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/call.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/core.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/ffa_abi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/ffa_abi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/notif.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/notif.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/optee_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/optee_private.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/rpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/rpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/optee/smc_abi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/optee/smc_abi.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/tee_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tee_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/tee_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tee_private.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/tee_shm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tee_shm.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tee/tee_shm_pool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tee_shm_pool.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/tee/tstee/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tstee/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/tee/tstee/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tstee/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/tee/tstee/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tstee/core.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/tee/tstee/tstee_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tee/tstee/tstee_private.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/amlogic_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/amlogic_thermal.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/armada_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/armada_thermal.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/cpufreq_cooling.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/cpufreq_cooling.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/gov_bang_bang.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/gov_bang_bang.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/gov_fair_share.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/gov_fair_share.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/gov_power_allocator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/gov_power_allocator.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/gov_step_wise.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/gov_step_wise.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/gov_user_space.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/gov_user_space.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/int3400_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/int3400_thermal.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/int3403_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/int3403_thermal.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_power_floor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/processor_thermal_power_floor.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_req.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/int340x_thermal/processor_thermal_wt_req.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/intel_hfi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/intel_hfi.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/intel_soc_dts_iosf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/intel/intel_soc_dts_iosf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/k3_bandgap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/k3_bandgap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/loongson2_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/loongson2_thermal.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/mediatek/lvts_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/mediatek/lvts_thermal.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/lmh.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/qcom/lmh.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/qcom-spmi-temp-alarm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/qcom/qcom-spmi-temp-alarm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/tsens-v2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/qcom/tsens-v2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/tsens.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/qcom/tsens.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/tsens.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/qcom/tsens.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/rcar_gen3_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/rcar_gen3_thermal.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_core.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_core.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_debugfs.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_debugfs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_helpers.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_netlink.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_netlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_netlink.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_sysfs.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_trace_ipa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_trace_ipa.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/thermal_trip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/thermal/thermal_trip.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/serial/8250/8250.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tty/serial/8250/8250.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/tty/serial/8250/8250_alpha.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tty/serial/8250/8250_alpha.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/serial/8250/8250_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tty/serial/8250/8250_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/serial/8250/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tty/serial/8250/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/vt/vc_screen.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/tty/vt/vc_screen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufs-mcq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/core/ufs-mcq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufs_bsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/core/ufs_bsg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufshcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/core/ufshcd.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/cdns-pltfrm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/cdns-pltfrm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-exynos.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-exynos.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-exynos.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-exynos.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-mediatek-sip.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-mediatek-sip.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-mediatek.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-mediatek.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-mediatek.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-mediatek.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-qcom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-qcom.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-qcom.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ufs/host/ufs-qcom.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/core/hub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/core/hub.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/core/port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/core/port.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/dwc3/core.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/dwc3/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/gadget.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/dwc3/gadget.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/host.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/dwc3/host.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/composite.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/gadget/composite.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/function/f_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/gadget/function/f_fs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/function/uvc_configfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/gadget/function/uvc_configfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/ohci-hcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/host/ohci-hcd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-plat.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/host/xhci-plat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-rzv2m.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/host/xhci-rzv2m.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/image/microtek.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/image/microtek.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/storage/scsiglue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/storage/scsiglue.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/storage/uas.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/storage/uas.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/storage/usb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/storage/usb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/tcpm/tcpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/usb/typec/tcpm/tcpm.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vdpa/vdpa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/vdpa/vdpa.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/vfio_pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/vfio/pci/vfio_pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vhost/net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/vhost/net.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/au1200fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/au1200fb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/core/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/core/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/core/fb_defio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/core/fb_defio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/fsl-diu-fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/fsl-diu-fb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/offb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/offb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/omap2/omapfb/dss/dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/omap2/omapfb/dss/dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/omap2/omapfb/dss/dss-of.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/omap2/omapfb/dss/dss-of.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/omap2/omapfb/dss/venc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/omap2/omapfb/dss/venc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/pxafb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/pxafb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/savage/savagefb_driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/savage/savagefb_driver.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/sh_mobile_lcdcfb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/sh_mobile_lcdcfb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/sis/init301.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/sis/init301.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/uvesafb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/fbdev/uvesafb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/hdmi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/logo/pnmtologo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/video/logo/pnmtologo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/acrn/ioreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virt/acrn/ioreq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/sev-guest/sev-guest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virt/coco/sev-guest/sev-guest.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/vmgenid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virt/vmgenid.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virtio/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virtio/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/virtio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virtio/virtio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virtio/virtio_debug.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_ring.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/virtio/virtio_ring.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/zorro/zorro.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/zorro/zorro.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/9p/v9fs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/9p/v9fs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/9p/vfs_addr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/9p/vfs_addr.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/9p/vfs_inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/9p/vfs_inode.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/9p/vfs_inode_dotl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/9p/vfs_inode_dotl.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/9p/vfs_super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/9p/vfs_super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/afs/file.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/afs/internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/rotate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/afs/rotate.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/validation.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/afs/validation.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/write.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/afs/write.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/aio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/aio.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/anon_inodes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/anon_inodes.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_background.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/alloc_background.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_background.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/alloc_background.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/backpointers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/backpointers.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/backpointers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/backpointers.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bcachefs_format.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/bcachefs_format.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bkey_methods.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/bkey_methods.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_gc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_gc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_io.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_key_cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_key_cache.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_node_scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_node_scan.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_node_scan_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_node_scan_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_update_interior.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/btree_update_interior.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/buckets.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/buckets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/chardev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/chardev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/checksum.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/checksum.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/errcode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/errcode.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/fs.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/io_write.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/io_write.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/journal.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal_io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/journal_io.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/move.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/move.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/quota.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/quota.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/recovery.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-clean.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/sb-clean.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-errors_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/sb-errors_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-members.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/sb-members.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-members.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/sb-members.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/super-io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/super-io.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/super.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/thread_with_file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/thread_with_file.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/thread_with_file.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/bcachefs/thread_with_file.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/binfmt_elf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/binfmt_elf.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/binfmt_elf_fdpic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/binfmt_elf_fdpic.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/backref.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/backref.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/block-rsv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/block-rsv.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/btrfs_inode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/btrfs_inode.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/compression.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/compression.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/compression.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/compression.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ctree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/ctree.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/defrag.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/defrag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delayed-inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/delayed-inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delayed-ref.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/delayed-ref.c</a></td><td class='right'>345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delayed-ref.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/delayed-ref.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/disk-io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/disk-io.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/export.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/export.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent-io-tree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/extent-io-tree.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent-tree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/extent-tree.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/extent_io.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_io.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/extent_io.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_map.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/extent_map.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_map.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/extent_map.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/file-item.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/file-item.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/file-item.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/file-item.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/file.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/free-space-cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/free-space-cache.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/fs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/fs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/inode-item.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/inode-item.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/inode.c</a></td><td class='right'>939</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/ioctl.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/locking.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/locking.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/locking.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/locking.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/lzo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/lzo.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/messages.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/messages.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ordered-data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/ordered-data.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ordered-data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/ordered-data.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/props.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/props.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/qgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/qgroup.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/raid56.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/raid56.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ref-verify.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/ref-verify.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/reflink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/reflink.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/relocation.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/relocation.c</a></td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/root-tree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/root-tree.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/scrub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/scrub.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/send.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/send.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/super.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/sysfs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tests/btrfs-tests.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/tests/btrfs-tests.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tests/extent-map-tests.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/tests/extent-map-tests.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/transaction.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/transaction.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tree-checker.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/tree-checker.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tree-checker.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/tree-checker.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tree-log.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/tree-log.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tree-mod-log.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/tree-mod-log.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/volumes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/volumes.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/volumes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/volumes.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/xattr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/xattr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/zlib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/zlib.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/zstd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/btrfs/zstd.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/cachefiles/io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/cachefiles/io.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ceph/addr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ceph/addr.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ceph/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ceph/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/coredump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/coredump.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/hooks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/crypto/hooks.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dcache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dcache.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/debugfs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/debugfs/inode.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/direct-io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/direct-io.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/ast.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/ast.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/ast.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/ast.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/config.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/config.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/config.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/debug_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/debug_fs.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/dir.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/dir.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/dir.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/dir.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/dlm_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/dlm_internal.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/lock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/lock.c</a></td><td class='right'>1068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/lock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/lock.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/lockspace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/lockspace.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/lowcomms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/lowcomms.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/lowcomms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/lowcomms.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/member.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/member.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/memory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/memory.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/memory.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/memory.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/midcomms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/midcomms.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/midcomms.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/midcomms.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/rcom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/rcom.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/recover.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/recover.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/recover.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/recover.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/recoverd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/recoverd.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/requestqueue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/requestqueue.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/dlm/user.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ecryptfs/crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ecryptfs/crypto.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ecryptfs/keystore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ecryptfs/keystore.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ecryptfs/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ecryptfs/main.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/efivarfs/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/efivarfs/internal.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/efivarfs/vars.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/efivarfs/vars.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/compress.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/compress.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/decompressor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/decompressor.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/erofs/decompressor_zstd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/decompressor_zstd.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/erofs_fs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/erofs_fs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/fscache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/fscache.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/internal.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/fs/erofs/pcpubuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/pcpubuf.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/super.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/zmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/zmap.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/fs/erofs/zutil.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/erofs/zutil.c</a> (renamed from fs/erofs/utils.c)</td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/eventpoll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/eventpoll.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/exec.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exfat/dir.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/exfat/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exfat/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/exfat/file.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ext4/file.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ext4/super.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/f2fs/file.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fcntl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/fcntl.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fhandle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/fhandle.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/freevxfs/vxfs_super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/freevxfs/vxfs_super.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fs-writeback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/fs-writeback.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fuse/passthrough.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/fuse/passthrough.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fuse/virtio_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/fuse/virtio_fs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/aops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/aops.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/bmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/bmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/dir.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/dir.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/file.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/glock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/glock.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/glock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/glock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/glops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/glops.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/incore.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/incore.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/lock_dlm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/lock_dlm.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/log.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/log.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/meta_io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/meta_io.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/ops_fstype.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/ops_fstype.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/rgrp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/rgrp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/super.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/sys.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/sys.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/util.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/util.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/util.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/util.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/xattr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/gfs2/xattr.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/hfsplus/xattr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/hfsplus/xattr.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/hugetlbfs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/hugetlbfs/inode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ioctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/iomap/buffered-io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/iomap/buffered-io.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jffs2/xattr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/jffs2/xattr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/libfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/libfs.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/minix/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/minix/inode.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/namei.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/namei.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/buffered_read.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/buffered_read.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/buffered_write.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/buffered_write.c</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 6.4%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/direct_read.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/direct_read.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/direct_write.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/direct_write.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/fscache_io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/fscache_io.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/internal.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/io.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/main.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/misc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/objects.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/objects.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/fs/netfs/output.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/output.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/stats.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/netfs/write_collect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/write_collect.c</a></td><td class='right'>808</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/netfs/write_issue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/netfs/write_issue.c</a></td><td class='right'>684</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfs/file.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/fscache.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfs/fscache.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfs/inode.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/write.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfs/write.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4callback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfsd/nfs4callback.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4xdr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfsd/nfs4xdr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/state.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nfsd/state.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nilfs2/ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/nilfs2/ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/bitmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/bitmap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/dir.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/dir.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/file.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/fsntfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/fsntfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/index.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/index.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/inode.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/ntfs_fs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/ntfs_fs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/ntfs3/super.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/openpromfs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/openpromfs/inode.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/dcache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/orangefs/dcache.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/namei.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/orangefs/namei.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/orangefs/super.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/copy_up.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/overlayfs/copy_up.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/overlayfs/params.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/super.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/overlayfs/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc/fd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/proc/fd.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc/page.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/proc/page.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc/proc_net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/proc/proc_net.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc/task_mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/proc/task_mmu.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/qnx6/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/qnx6/inode.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/read_write.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/read_write.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/reiserfs/item_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/reiserfs/item_ops.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/seq_file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/seq_file.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/signalfd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/signalfd.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/cifsfs.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/cifsfs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsglob.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/cifsglob.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifspdu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/cifspdu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsproto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/cifsproto.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifssmb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/cifssmb.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/connect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/connect.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/file.c</a></td><td class='right'>2744</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 20.0%;'/><td class='none' style='width: 76.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/fs_context.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/fs_context.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/fs_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/fs_context.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/fscache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/fscache.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/fscache.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/fscache.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/inode.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/misc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/smb2misc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/smb2ops.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2pdu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/smb2pdu.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2pdu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/smb2pdu.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2proto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/smb2proto.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/smb2transport.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/trace.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/client/transport.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/common/smb2pdu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/common/smb2pdu.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/ksmbd_netlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/ksmbd_netlink.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/oplock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/oplock.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/server.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/server.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/smb2pdu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/smb2pdu.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/smb2pdu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/smb2pdu.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/smb_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/smb_common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/transport_tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/transport_tcp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/vfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/vfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/vfs_cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/vfs_cache.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/vfs_cache.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/smb/server/vfs_cache.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/stat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/stat.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/timerfd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/timerfd.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/tracefs/event_inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/tracefs/event_inode.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/tracefs/inode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/tracefs/inode.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/tracefs/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/tracefs/internal.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/userfaultfd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/userfaultfd.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/verity/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/verity/init.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_file.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>fs/xfs/xfs_file.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acpi_bus.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/acpi/acpi_bus.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acpixf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/acpi/acpixf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl1.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/acpi/actbl1.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/acpi/actbl2.h</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl3.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/acpi/actbl3.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/acpi/nhlt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/acpi/nhlt.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/asm-generic/sections.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/asm-generic/sections.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/asm-generic/vmlinux.lds.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/asm-generic/vmlinux.lds.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/asm-generic/vtime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/asm-generic/vtime.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/acompress.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/acompress.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/aead.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/aead.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/aes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/aes.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/akcipher.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/akcipher.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/algapi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/algapi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/ecc_curve.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/ecc_curve.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/ecdh.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/ecdh.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/hash.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/hash.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/acompress.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/internal/acompress.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/crypto/internal/cryptouser.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/internal/cryptouser.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/ecc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/internal/ecc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/scompress.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/internal/scompress.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/kpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/kpp.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/rng.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/rng.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/skcipher.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/crypto/skcipher.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/amd_asic_type.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/amd_asic_type.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/bridge/samsung-dsim.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/bridge/samsung-dsim.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_dp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/display/drm_dp.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_dp_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/display/drm_dp_helper.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_dp_mst_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/display/drm_dp_mst_helper.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_dsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/display/drm_dsc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_buddy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_buddy.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_client.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_client.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_debugfs_crc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_debugfs_crc.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_edid.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_edid.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_encoder_slave.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_encoder_slave.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_fb_dma_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_fb_dma_helper.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_format_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_format_helper.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_gem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_gem.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_gem_shmem_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_gem_shmem_helper.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_gem_vram_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_gem_vram_helper.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_kunit_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_kunit_helpers.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_lease.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_lease.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_mipi_dsi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_mipi_dsi.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_mode_config.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_mode_config.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_modeset_helper_vtables.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_modeset_helper_vtables.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_of.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_of.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/drm/drm_panic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_panic.h</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_plane.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_plane.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_print.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_print.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_probe_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_probe_helper.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_suballoc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_suballoc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_vblank.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_vblank.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/drm/gma_drm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/gma_drm.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i2c/ch7006.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i2c/ch7006.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i2c/sil164.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i2c/sil164.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i915_component.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i915_component.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i915_gsc_proxy_mei_interface.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i915_gsc_proxy_mei_interface.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i915_hdcp_interface.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i915_hdcp_interface.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i915_pciids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i915_pciids.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/i915_pxp_tee_interface.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/i915_pxp_tee_interface.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_bo.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/ttm/ttm_bo.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_caching.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/ttm/ttm_caching.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_execbuf_util.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/ttm/ttm_execbuf_util.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_kmap_iter.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/ttm/ttm_kmap_iter.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_pool.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/ttm/ttm_pool.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/ttm/ttm_resource.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/xe_pciids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/xe_pciids.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/dt-bindings/arm/qcom,ids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/dt-bindings/arm/qcom,ids.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/dt-bindings/clock/google,gs101.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/dt-bindings/clock/google,gs101.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/dt-bindings/clock/r8a73a4-clock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/dt-bindings/clock/r8a73a4-clock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/dt-bindings/thermal/mediatek,lvts-thermal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/dt-bindings/thermal/mediatek,lvts-thermal.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/keys/trusted_dcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/keys/trusted_dcp.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/keys/trusted_tpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/keys/trusted_tpm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/kunit/test.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/kunit/test.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/kunit/try-catch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/kunit/try-catch.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/acpi.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/amd-pstate.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/amd-pstate.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/anon_inodes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/anon_inodes.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/arch_topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/arch_topology.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/arm_ffa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/arm_ffa.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bio.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bitmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bitmap.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bitops.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bitops.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/blk-mq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/blk-mq.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/blk_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/blk_types.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/blkdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/blkdev.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bpf.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/bpf_crypto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bpf_crypto.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bpf_verifier.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bpf_verifier.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bsg-lib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bsg-lib.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/btf_ids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/btf_ids.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/bus/stm32_firewall_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/bus/stm32_firewall_device.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ceph/ceph_debug.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/ceph/ceph_debug.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/cmpxchg-emu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/cmpxchg-emu.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/compiler_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/compiler_types.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/coredump.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/coredump.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/cpu.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpufreq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/cpufreq.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpuhotplug.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/cpuhotplug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpumask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/cpumask.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dev_printk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/dev_printk.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/devcoredump.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/devcoredump.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-buf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/dma-buf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-fence.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/dma-fence.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dynamic_debug.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/dynamic_debug.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dynamic_queue_limits.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/dynamic_queue_limits.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/efi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/efi.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/elf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/energy_model.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/energy_model.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/etherdevice.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/etherdevice.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ethtool.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/ethtool.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/evm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/evm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/execmem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/execmem.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/fb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/file.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/file.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/filter.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/filter.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/find.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/find.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/firewire.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/firewire.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/firmware/cirrus/cs_dsp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/firmware/cirrus/cs_dsp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/firmware/qcom/qcom_qseecom.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/firmware/qcom/qcom_qseecom.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/firmware/qcom/qcom_scm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/firmware/qcom/qcom_scm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fortify-string.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/fortify-string.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/fs.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fs_parser.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/fs_parser.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fscache.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/fscache.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/genetlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/genetlink.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/genl_magic_struct.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/genl_magic_struct.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/gpio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/gpio.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/gpio/driver.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/gpio/driver.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/gpio/property.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/gpio/property.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/hid.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/hid.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/hid_bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/hid_bpf.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/hugetlb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/hugetlb.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ieee80211.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/ieee80211.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/integrity.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/integrity.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/intel_rapl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/intel_rapl.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/io_uring.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/io_uring.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/io_uring/cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/io_uring/cmd.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/io_uring/net.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/io_uring/net.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/io_uring_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/io_uring_types.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/irq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/irq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/irqchip/riscv-aplic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/irqchip/riscv-aplic.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/irqchip/riscv-imsic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/irqchip/riscv-imsic.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/irqdesc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/irqdesc.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/jump_label.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/jump_label.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/kernel_stat.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/kernel_stat.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/libata.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/libata.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/linkmode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/linkmode.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/livepatch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/livepatch.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/lsm_hook_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/lsm_hook_defs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/marvell_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/marvell_phy.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/math64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/math64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mfd/axp20x.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mfd/axp20x.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mhi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mhi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mlx5/cq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mlx5/cq.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mlx5/device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mlx5/device.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mlx5/driver.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mlx5/driver.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mlx5/mlx5_ifc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mlx5/mlx5_ifc.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mmc/host.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mmc/host.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mmc/sdio_ids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/mmc/sdio_ids.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/module.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/module.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/moduleloader.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/moduleloader.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/namei.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/namei.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/net/intel/libie/rx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/net/intel/libie/rx.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/netdevice.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/netdevice.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/netfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/netfs.h</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/numa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/numa.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/oid_registry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/oid_registry.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/page-flags.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/page-flags.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pagemap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pagemap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pci_ids.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pci_ids.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/perf_event.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/perf_event.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/phy/phy-dp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/phy/phy-dp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/phylink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/phylink.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/platform_data/davinci_asp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/platform_data/davinci_asp.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/platform_data/spi-omap2-mcspi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/platform_data/spi-omap2-mcspi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/platform_data/ti-sysc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/platform_data/ti-sysc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pm_opp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pm_opp.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pm_wakeup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pm_wakeup.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/printk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/printk.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/profile.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/profile.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pse-pd/pse.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pse-pd/pse.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pwm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pwm.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pxa2xx_ssp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/pxa2xx_ssp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/qat/qat_mig_dev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/qat/qat_mig_dev.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/rcupdate.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/rcupdate.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/rcupdate_wait.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/rcupdate_wait.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/regmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/regmap.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/regulator/consumer.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/regulator/consumer.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/regulator/pca9450.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/regulator/pca9450.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/rhashtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/rhashtable.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/rtnetlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/rtnetlink.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/sched.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sched/idle.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/sched/idle.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sched/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/sched/topology.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/scmi_protocol.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/scmi_protocol.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/security.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/security.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/seq_file.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/seq_file.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sfp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/sfp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/shm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/shm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/skbuff.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/skbuff.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/skbuff_ref.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/skbuff_ref.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/skmsg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/skmsg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/slab.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/slab.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/soc/mediatek/mtk-cmdq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/soc/mediatek/mtk-cmdq.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/spi/pxa2xx_spi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/spi/pxa2xx_spi.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/spi/rspi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/spi/rspi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/spi/spi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/spi/spi.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/spi/xilinx_spi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/spi/xilinx_spi.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/srcutiny.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/srcutiny.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ssb/ssb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/ssb/ssb.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/stat.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/stat.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/stmmac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/stmmac.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/string.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/string.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sunrpc/svc_rdma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/sunrpc/svc_rdma.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sysctl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/sysctl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/tcp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/tee_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/tee_core.h</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tee_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/tee_drv.h</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/thermal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/thermal.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/threads.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/threads.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/timerqueue.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/timerqueue.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/tpm.h</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/trace_events.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/trace_events.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tracefs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/tracefs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tty.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/tty.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/udp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/udp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/uio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/uio.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/virtio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/virtio.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/vtime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/vtime.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/xarray.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/linux/xarray.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/9p/client.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/9p/client.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/af_unix.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/af_unix.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ax25.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ax25.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/bluetooth.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/bluetooth/bluetooth.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/bluetooth/hci.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/bluetooth/hci_core.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/l2cap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/bluetooth/l2cap.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/cfg80211.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/cfg80211.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/cipso_ipv4.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/cipso_ipv4.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/devlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/devlink.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/dsa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/dsa.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/dscp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/dscp.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/dst_cache.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/dst_cache.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/dst_metadata.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/dst_metadata.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/espintcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/espintcp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/flow_dissector.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/flow_dissector.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/flow_offload.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/flow_offload.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/genetlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/genetlink.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/gre.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/gre.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/gro.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/gro.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/gtp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/gtp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/hotdata.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/hotdata.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/ieee8021q.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ieee8021q.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/inet_connection_sock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/inet_connection_sock.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/inet_timewait_sock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/inet_timewait_sock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ip.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip6_fib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ip6_fib.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip6_route.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ip6_route.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip6_tunnel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ip6_tunnel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip_tunnels.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/ip_tunnels.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/libeth/rx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/libeth/rx.h</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/mac80211.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/mac80211.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/macsec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/macsec.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/mana/mana.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/mana/mana.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/mptcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/mptcp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netdev_queues.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/netdev_queues.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netfilter/nf_tables.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/netfilter/nf_tables.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netlabel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/netlabel.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/netlink.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/nexthop.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/nexthop.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/page_pool/helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/page_pool/helpers.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/page_pool/types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/page_pool/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/pfcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/pfcp.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/pkt_cls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/pkt_cls.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/proto_memory.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/proto_memory.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/red.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/red.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/request_sock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/request_sock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/route.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/route.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/rps.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/rps.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/rstreason.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/rstreason.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sch_generic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/sch_generic.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/scm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/scm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/smc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/smc.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/sock.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/tcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/tcp.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/timewait_sock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/timewait_sock.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/tls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/tls.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/udp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/udp.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/udp_tunnel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/udp_tunnel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/xfrm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/net/xfrm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/iser.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/iser.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/libfc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/libfc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/libfcoe.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/libfcoe.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/libsas.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/libsas.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/sas_ata.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/sas_ata.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_cmnd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi_cmnd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_driver.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi_driver.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_host.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi_host.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_transport.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi_transport.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_transport_fc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi_transport_fc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_transport_srp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/scsi/scsi_transport_srp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/soc/fsl/dcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/soc/fsl/dcp.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/soc/qcom/cmd-db.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/soc/qcom/cmd-db.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/control.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/control.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/cs35l41.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/cs35l41.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/cs35l56.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/cs35l56.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/dmaengine_pcm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/dmaengine_pcm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/emu10k1.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/emu10k1.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/hda-mlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/hda-mlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/hda_codec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/hda_codec.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/hdaudio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/hdaudio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/pcm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/pcm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc-acpi-intel-match.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/soc-acpi-intel-match.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/include/sound/soc-acpi-intel-ssp-common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/soc-acpi-intel-ssp-common.h</a> (renamed from sound/soc/intel/boards/sof_ssp_common.h)</td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc-acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/soc-acpi.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc-jack.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/soc-jack.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/soc.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/channel_map.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/channel_map.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/control.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/control.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/dai-intel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/dai-intel.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/dai.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/dai.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/debug.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/debug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/ext_manifest.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/ext_manifest.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/ext_manifest4.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/ext_manifest4.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/header.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/header.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/ipc4/header.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/ipc4/header.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/pm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/pm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/stream.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/stream.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof/xtensa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/sof/xtensa.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soundfont.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/sound/soundfont.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/bpf_probe.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/bpf_probe.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/asoc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/asoc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/bpf_test_run.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/bpf_test_run.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/btrfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/btrfs.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/dlm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/dlm.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/trace/events/firewire.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/firewire.h</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/include/trace/events/hw_pressure.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/hw_pressure.h</a> (renamed from include/trace/events/thermal_pressure.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/trace/events/icmp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/icmp.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/mce.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/mce.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/mdio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/mdio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/mmflags.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/mmflags.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/net_probe_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/net_probe_common.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/netfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/netfs.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/rcu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/rcu.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/sched.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/scmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/scmi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/sock.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sof.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/sof.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sof_intel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/sof_intel.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/tcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/tcp.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/udp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/trace/events/udp.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/drm_mode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/drm/drm_mode.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/etnaviv_drm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/drm/etnaviv_drm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/i915_drm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/drm/i915_drm.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/nouveau_drm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/drm/nouveau_drm.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/uapi/drm/panthor_drm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/drm/panthor_drm.h</a></td><td class='right'>945</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/xe_drm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/drm/xe_drm.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/bpf.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/cryptouser.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/cryptouser.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/devlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/devlink.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/ethtool.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/ethtool.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/ethtool_netlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/ethtool_netlink.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/fcntl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/fcntl.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/gtp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/gtp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/icmpv6.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/icmpv6.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_link.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/if_link.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_team.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/if_team.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_tunnel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/if_tunnel.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/io_uring.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/io_uring.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/mptcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/mptcp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/netdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/netdev.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/nl80211.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/nl80211.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/pkt_cls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/pkt_cls.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/snmp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/snmp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/stat.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/stat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/stddef.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/stddef.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/tcp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/tcp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/tee.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/tee.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/udp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/udp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/vdpa.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/vdpa.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/virtio_bt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/virtio_bt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/virtio_net.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/virtio_net.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/xfrm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/linux/xfrm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/scsi/scsi_bsg_mpi3mr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/scsi/scsi_bsg_mpi3mr.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/scsi/scsi_bsg_ufs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/scsi/scsi_bsg_ufs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/asoc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/asoc.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/intel/avs/tokens.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/intel/avs/tokens.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/skl-tplg-interface.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/skl-tplg-interface.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/sof/abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/sof/abi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/sof/fw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/sof/fw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/sof/header.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/sof/header.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/sound/sof/tokens.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/uapi/sound/sof/tokens.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/ufs/ufshcd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/ufs/ufshcd.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/ufs/ufshci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/ufs/ufshci.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/vdso/datapage.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/vdso/datapage.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/vdso/math64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/vdso/math64.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/video/omapfb_dss.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/video/omapfb_dss.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/init/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>init/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/init/do_mounts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>init/do_mounts.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/init/init_task.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>init/init_task.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/init/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>init/main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/alloc_cache.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/alloc_cache.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/cancel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/cancel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/fdinfo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/fdinfo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/filetable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/filetable.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/futex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/futex.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/futex.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/futex.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io-wq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/io-wq.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io_uring.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/io_uring.c</a></td><td class='right'>667</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io_uring.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/io_uring.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/kbuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/kbuf.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/kbuf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/kbuf.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/io_uring/memmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/memmap.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/io_uring/memmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/memmap.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/msg_ring.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/msg_ring.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/net.c</a></td><td class='right'>852</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/net.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/net.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/nop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/nop.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/notif.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/notif.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/notif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/notif.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/opdef.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/opdef.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/opdef.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/opdef.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/poll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/poll.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/poll.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/poll.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/refs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/refs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/register.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/register.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rsrc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/rsrc.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rsrc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/rsrc.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/rw.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/rw.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/sqpoll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/sqpoll.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/timeout.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/timeout.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/uring_cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/uring_cmd.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/uring_cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/uring_cmd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/waitid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>io_uring/waitid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/ipc/ipc_sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>ipc/ipc_sysctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/ipc/mq_sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>ipc/mq_sysctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/ipc/shm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>ipc/shm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bounds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bounds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/arena.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/arena.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/arraymap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/arraymap.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/bpf_local_storage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/bpf_local_storage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/bpf_struct_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/bpf_struct_ops.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/btf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/btf.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/cgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/cgroup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/core.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/cpumask.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/cpumask.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/kernel/bpf/crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/crypto.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/disasm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/disasm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/hashtab.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/hashtab.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/helpers.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/log.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/log.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/lpm_trie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/lpm_trie.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/syscall.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/syscall.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/sysfs_btf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/sysfs_btf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/trampoline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/trampoline.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/verifier.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/bpf/verifier.c</a></td><td class='right'>689</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/configs/hardening.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/configs/hardening.config</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/context_tracking.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/context_tracking.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/cpu.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/dma/swiotlb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/dma/swiotlb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/events/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/events/core.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/events/ring_buffer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/events/ring_buffer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/futex/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/futex/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/cpuhotplug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/cpuhotplug.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/internals.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/internals.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/irqdesc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/irqdesc.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/irqdomain.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/irqdomain.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/manage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/manage.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/proc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/proc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/resend.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/irq/resend.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/jump_label.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/jump_label.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/kcsan/kcsan_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/kcsan/kcsan_test.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/kprobes.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/kthread.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/kthread.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/livepatch/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/livepatch/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/livepatch/patch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/livepatch/patch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/livepatch/transition.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/livepatch/transition.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/lock_events.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/locking/lock_events.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/qspinlock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/locking/qspinlock.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/qspinlock_paravirt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/locking/qspinlock_paravirt.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/module/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/module/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/module/kallsyms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/module/kallsyms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/module/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/module/main.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/padata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/padata.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/energy_model.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/power/energy_model.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/hibernate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/power/hibernate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/printk/printk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/printk/printk.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/profile.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/profile.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/rcu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/rcu.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/rcutorture.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/rcutorture.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/srcutiny.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/srcutiny.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/srcutree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/srcutree.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/sync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/sync.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tasks.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tasks.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tiny.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tiny.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tree.c</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tree.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_exp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tree_exp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_plugin.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tree_plugin.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_stall.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/tree_stall.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/update.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/rcu/update.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/core.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/cputime.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/cputime.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/fair.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/fair.c</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/isolation.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/isolation.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/loadavg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/loadavg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/pelt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/pelt.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/pelt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/pelt.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/sched.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/stats.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/sched/topology.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/seccomp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/seccomp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/softirq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/softirq.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/stackleak.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/stackleak.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/clockevents.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/clockevents.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/clocksource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/clocksource.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/hrtimer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/hrtimer.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/timekeeping.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/timekeeping.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/timer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/timer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/timer_migration.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/timer_migration.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/vsyscall.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/time/vsyscall.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/trace/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/bpf_trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/trace/bpf_trace.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/ftrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/trace/ftrace.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_events.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/trace/trace_events.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_kprobe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/trace/trace_kprobe.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_probe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/trace/trace_probe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/ucount.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/ucount.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/user.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/vmcore_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/vmcore_info.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/watchdog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/watchdog.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/workqueue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>kernel/workqueue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Kconfig.debug?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/Kconfig.debug</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/lib/cmpxchg-emu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/cmpxchg-emu.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/crypto/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/crypto/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/lib/crypto/aescfb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/crypto/aescfb.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/dim/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/dim/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/dim/dim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/dim/dim.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/dynamic_debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/dynamic_debug.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/dynamic_queue_limits.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/dynamic_queue_limits.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/find_bit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/find_bit.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/fortify_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/fortify_kunit.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit/device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/kunit-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit/kunit-test.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/string-stream-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit/string-stream-test.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit/test.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/try-catch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit/try-catch.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit_iov_iter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/kunit_iov_iter.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/maple_tree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/maple_tree.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/math/prime_numbers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/math/prime_numbers.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/memcpy_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/memcpy_kunit.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/sbitmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/sbitmap.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/scatterlist.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/scatterlist.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/slub_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/slub_kunit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/stackdepot.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/stackdepot.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/lib/strcat_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/strcat_kunit.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/string_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/string_kunit.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/lib/strscpy_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/strscpy_kunit.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/test_bitmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/test_bitmap.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/test_bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/test_bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/test_xarray.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/test_xarray.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/ubsan.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/ubsan.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/vdso/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/vdso/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/vdso/gettimeofday.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/vdso/gettimeofday.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/xarray.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>lib/xarray.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/mm/execmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/execmem.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/filemap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/filemap.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/hugetlb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/hugetlb.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/mm_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/mm_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/mmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/mmap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/nommu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/nommu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/page-writeback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/page-writeback.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/page_owner.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/page_owner.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/readahead.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/readahead.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/shmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/shmem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/slab.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/slab.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/slab_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/slab_common.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/slub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/slub.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/userfaultfd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/userfaultfd.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/vmalloc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/vmalloc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/zswap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>mm/zswap.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/8021q/vlan_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/8021q/vlan_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/8021q/vlan_dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/8021q/vlan_dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/8021q/vlan_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/8021q/vlan_netlink.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/9p/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/9p/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/9p/client.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/9p/client.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/appletalk/ddp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/appletalk/ddp.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/appletalk/sysctl_net_atalk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/appletalk/sysctl_net_atalk.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/atm/clip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/atm/clip.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/atm/common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/atm/common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ax25/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ax25/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ax25/af_ax25.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ax25/af_ax25.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ax25/ax25_dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ax25/ax25_dev.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ax25/sysctl_net_ax25.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ax25/sysctl_net_ax25.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/batman-adv/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/batman-adv/main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/batman-adv/netlink.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/originator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/batman-adv/originator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/soft-interface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/batman-adv/soft-interface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/translation-table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/batman-adv/translation-table.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/6lowpan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/6lowpan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_conn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/hci_conn.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/hci_core.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/hci_event.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_request.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/hci_request.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_sock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/hci_sock.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_sync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/hci_sync.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/iso.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/iso.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/l2cap_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/l2cap_core.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/l2cap_sock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/l2cap_sock.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/mgmt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/mgmt.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/msft.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/msft.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/msft.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/msft.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/sco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bluetooth/sco.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bpf/bpf_dummy_struct_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bpf/bpf_dummy_struct_ops.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bpf/test_run.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bpf/test_run.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bridge/br_device.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_forward.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bridge/br_forward.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_netfilter_hooks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bridge/br_netfilter_hooks.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bridge/br_netlink.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_vlan_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/bridge/br_vlan_tunnel.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/caif/cfctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/caif/cfctrl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/bpf_sk_storage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/bpf_sk_storage.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/datagram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/datagram.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/dev.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/dev.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev_addr_lists_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/dev_addr_lists_test.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/drop_monitor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/drop_monitor.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dst_cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/dst_cache.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/fib_rules.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/fib_rules.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/filter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/filter.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/flow_dissector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/flow_dissector.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/gro.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/gro.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/hotdata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/hotdata.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/core/ieee8021q_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/ieee8021q_helpers.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/neighbour.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/neighbour.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/net-procfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/net-procfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/net-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/net-sysfs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/net_namespace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/net_namespace.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/net/core/net_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/net_test.c</a> (renamed from net/core/gso_test.c)</td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netdev-genl-gen.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/netdev-genl-gen.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netdev-genl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/netdev-genl.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netpoll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/netpoll.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/page_pool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/page_pool.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/rtnetlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/rtnetlink.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/scm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/scm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/skbuff.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/skbuff.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/skmsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/skmsg.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/sock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/sock.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/sock_map.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/sock_map.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/sysctl_net_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/core/sysctl_net_core.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dccp/ccids/ccid2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dccp/ccids/ccid2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dccp/ipv4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dccp/ipv4.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dccp/ipv6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dccp/ipv6.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dccp/minisocks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dccp/minisocks.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dccp/output.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dccp/output.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dccp/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dccp/sysctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/devlink/core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/devlink/dev.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/param.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/devlink/param.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/devlink/port.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dsa/devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/dsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dsa/dsa.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dsa/port.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/dsa/user.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethernet/eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ethernet/eth.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/pse-pd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ethtool/pse-pd.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/tsinfo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ethtool/tsinfo.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/handshake/tlshd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/handshake/tlshd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_device.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_device.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_forward.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_forward.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_framereg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_framereg.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_framereg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_framereg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_main.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_netlink.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_slave.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/hsr/hsr_slave.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ieee802154/6lowpan/reassembly.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ieee802154/6lowpan/reassembly.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/af_inet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/af_inet.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/arp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/arp.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/bpf_tcp_ca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/bpf_tcp_ca.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/cipso_ipv4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/cipso_ipv4.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/devinet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/devinet.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/esp4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/esp4.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/fib_semantics.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/fib_semantics.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/fou_bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/fou_bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/gre_demux.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/gre_demux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/icmp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/icmp.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/igmp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/igmp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_fragment.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/inet_fragment.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_hashtables.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/inet_hashtables.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_timewait_sock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/inet_timewait_sock.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_fragment.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_fragment.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_gre.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_gre.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_input.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_input.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_output.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_output.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_tunnel.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_tunnel_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_tunnel_core.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_vti.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ip_vti.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ipip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ipip.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ipmr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/ipmr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/netfilter/iptable_filter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/netfilter/iptable_filter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/proc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/proc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/raw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/raw.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/route.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/route.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/syncookies.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/syncookies.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/sysctl_net_ipv4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/sysctl_net_ipv4.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_ao.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_ao.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_bbr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_bbr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_cubic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_cubic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_dctcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_dctcp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_input.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_input.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_ipv4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_ipv4.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_metrics.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_metrics.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_minisocks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_minisocks.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_offload.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_output.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_output.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_timer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/tcp_timer.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/udp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/udp.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/udp_offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/udp_offload.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/udp_tunnel_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/udp_tunnel_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/xfrm4_input.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/xfrm4_input.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/xfrm4_policy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv4/xfrm4_policy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/addrconf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/addrconf.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/addrlabel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/addrlabel.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/anycast.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/anycast.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/esp6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/esp6.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/fib6_rules.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/fib6_rules.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/icmp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/icmp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ila/ila_lwt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ila/ila_lwt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/inet6_hashtables.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/inet6_hashtables.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_fib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6_fib.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_gre.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6_gre.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6_offload.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_output.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6_output.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6_tunnel.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_vti.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6_vti.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6mr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ip6mr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ndisc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ndisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/netfilter/ip6table_filter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/netfilter/ip6table_filter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/netfilter/nf_conntrack_reasm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/netfilter/nf_conntrack_reasm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ping.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/ping.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/raw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/raw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/reassembly.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/reassembly.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/route.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/route.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/seg6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/seg6.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/sit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/sit.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/syncookies.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/syncookies.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/sysctl_net_ipv6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/sysctl_net_ipv6.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/tcp_ipv6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/tcp_ipv6.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/tcpv6_offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/tcpv6_offload.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/udp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/udp.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/udp_offload.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/udp_offload.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/xfrm6_input.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/xfrm6_input.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/xfrm6_policy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/ipv6/xfrm6_policy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/iucv/af_iucv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/iucv/af_iucv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/iucv/iucv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/iucv/iucv.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/l2tp/l2tp_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/l2tp/l2tp_core.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/l2tp/l2tp_eth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/l2tp/l2tp_eth.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/l2tp/l2tp_ip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/l2tp/l2tp_ip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/l2tp/l2tp_ip6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/l2tp/l2tp_ip6.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/llc/sysctl_net_llc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/llc/sysctl_net_llc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/cfg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/cfg.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/chan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/chan.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/debugfs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/drop.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/drop.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/ht.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/ht.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/ieee80211_i.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/ieee80211_i.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/iface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/iface.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/link.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/link.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/mesh.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/mesh.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh_pathtbl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/mesh_pathtbl.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mlme.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/mlme.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/offchannel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/offchannel.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/rate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/rate.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/rx.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/scan.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/spectmgmt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/spectmgmt.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/sta_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/sta_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/status.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/status.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/tx.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/util.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/util.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/wpa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mac80211/wpa.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mpls/af_mpls.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mpls/af_mpls.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mpls/mpls_iptunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mpls/mpls_iptunnel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/ctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/ctrl.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/mib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/mib.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/options.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/options.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/pm_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/pm_netlink.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/pm_userspace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/pm_userspace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/protocol.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/protocol.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/protocol.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/protocol.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/sched.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/sched.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/sockopt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/sockopt.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/subflow.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/mptcp/subflow.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/ipvs/ip_vs_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_ctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/ipvs/ip_vs_ctl.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_lblc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/ipvs/ip_vs_lblc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_lblcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/ipvs/ip_vs_lblcr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_proto_sctp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/ipvs/ip_vs_proto_sctp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_xmit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/ipvs/ip_vs_xmit.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_conntrack_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_conntrack_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_conntrack_proto_dccp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_conntrack_proto_dccp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_conntrack_proto_icmpv6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_conntrack_proto_icmpv6.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_conntrack_standalone.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_conntrack_standalone.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_flow_table_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_flow_table_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_flow_table_ip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_flow_table_ip.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_log.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_log.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_tables_api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nf_tables_api.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nfnetlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nfnetlink.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_chain_filter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_chain_filter.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_connlimit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_connlimit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_counter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_counter.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_dynset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_dynset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_last.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_last.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_limit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_limit.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_quota.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_quota.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_rt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_rt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_set_pipapo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_set_pipapo.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_set_pipapo.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_set_pipapo.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netfilter/nft_tunnel.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netlabel/netlabel_kapi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netlabel/netlabel_kapi.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netlink/af_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netlink/af_netlink.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netlink/genetlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netlink/genetlink.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/netlink/genetlink.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netlink/genetlink.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netrom/sysctl_net_netrom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/netrom/sysctl_net_netrom.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/nfc/nci/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/nfc/nci/core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/nfc/netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/nfc/netlink.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/nsh/nsh.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/nsh/nsh.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/conntrack.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/openvswitch/conntrack.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/datapath.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/openvswitch/datapath.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/flow.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/openvswitch/flow.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/flow_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/openvswitch/flow_netlink.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/meter.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/openvswitch/meter.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/vport-netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/openvswitch/vport-netdev.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/packet/af_packet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/packet/af_packet.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/phonet/pn_netlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/phonet/pn_netlink.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/phonet/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/phonet/sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/psample/psample.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/psample/psample.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/qrtr/mhi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/qrtr/mhi.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rds/ib_sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rds/ib_sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rds/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rds/sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rds/tcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rds/tcp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rfkill/rfkill-gpio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rfkill/rfkill-gpio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rose/sysctl_net_rose.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rose/sysctl_net_rose.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/af_rxrpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/af_rxrpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/ar-internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/ar-internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/call_object.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/call_object.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/conn_object.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/conn_object.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/input.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/input.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/insecure.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/insecure.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/rxkad.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/rxkad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/txbuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/rxrpc/txbuf.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/act_tunnel_key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/act_tunnel_key.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/cls_api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/cls_api.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/cls_flower.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/cls_flower.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_api.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_cake.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_cake.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_cbs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_cbs.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_choke.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_choke.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_codel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_codel.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_etf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_etf.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_ets.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_ets.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fifo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_fifo.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_fq.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fq_codel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_fq_codel.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fq_pie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_fq_pie.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_generic.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_hfsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_hfsc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_hhf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_hhf.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_htb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_htb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_mqprio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_mqprio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_pie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_pie.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_sfq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_sfq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_skbprio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_skbprio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_taprio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_taprio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_teql.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sched/sch_teql.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/ipv6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sctp/ipv6.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/protocol.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sctp/protocol.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/sm_statefuns.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sctp/sm_statefuns.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/socket.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sctp/socket.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sctp/sysctl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/af_smc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/af_smc.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_cdc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_cdc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_clc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_clc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_clc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_clc.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_core.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_ib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_ib.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_ism.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_ism.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_ism.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_ism.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/smc/smc_loopback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_loopback.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/smc/smc_loopback.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_loopback.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_rx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_rx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/smc_sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/smc/smc_sysctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/socket.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/socket.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sunrpc/sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sunrpc/xprtrdma/svc_rdma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma_rw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sunrpc/xprtrdma/svc_rdma_rw.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma_sendto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sunrpc/xprtrdma/svc_rdma_sendto.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sunrpc/xprtrdma/transport.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtsock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/sunrpc/xprtsock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/switchdev/switchdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/switchdev/switchdev.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/msg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tipc/msg.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/socket.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tipc/socket.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tipc/sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/udp_media.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tipc/udp_media.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tls/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tls/tls.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tls/tls_device.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_device_fallback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tls/tls_device_fallback.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_strp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tls/tls_strp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_sw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/tls/tls_sw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/unix/af_unix.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/unix/af_unix.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/unix/garbage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/unix/garbage.c</a></td><td class='right'>616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/unix/sysctl_net_unix.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/unix/sysctl_net_unix.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/nl80211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/wireless/nl80211.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/reg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/wireless/reg.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/wireless/reg.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/wireless/scan.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/sme.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/wireless/sme.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/wireless/trace.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/x25/sysctl_net_x25.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/x25/sysctl_net_x25.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_compat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_compat.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_device.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_input.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_input.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_interface_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_interface_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_policy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_policy.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_proc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_replay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_replay.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_state.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_state.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_sysctl.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>net/xfrm/xfrm_user.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/README.md?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/README.md</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/alloc.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/alloc.rs</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/boxed.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/boxed.rs</a></td><td class='right'>2463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 20.8%;'/><td class='none' style='width: 79.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/collections/mod.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/collections/mod.rs</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/lib.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/lib.rs</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/raw_vec.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/raw_vec.rs</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/slice.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/slice.rs</a></td><td class='right'>890</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/drain.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/drain.rs</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/extract_if.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/extract_if.rs</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/into_iter.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/into_iter.rs</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/is_zero.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/is_zero.rs</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/mod.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/mod.rs</a></td><td class='right'>3683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 31.1%;'/><td class='none' style='width: 68.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/partial_eq.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/partial_eq.rs</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/set_len_on_drop.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/set_len_on_drop.rs</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/rust/alloc/vec/spec_extend.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/alloc/vec/spec_extend.rs</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/bindings/bindings_helper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/bindings/bindings_helper.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/helpers.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/alloc.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/alloc.rs</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/rust/kernel/alloc/allocator.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/alloc/allocator.rs</a> (renamed from rust/kernel/allocator.rs)</td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/alloc/box_ext.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/alloc/box_ext.rs</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/alloc/vec_ext.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/alloc/vec_ext.rs</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/error.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/error.rs</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/init.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/init.rs</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/init/macros.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/init/macros.rs</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/lib.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/lib.rs</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/net/phy.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/net/phy.rs</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/prelude.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/prelude.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/print.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/print.rs</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/std_vendor.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/std_vendor.rs</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/str.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/str.rs</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/sync.rs</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync/arc.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/sync/arc.rs</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync/condvar.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/sync/condvar.rs</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync/lock.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/sync/lock.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync/lock/mutex.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/sync/lock/mutex.rs</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync/lock/spinlock.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/sync/lock/spinlock.rs</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/task.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/task.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/time.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/time.rs</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/types.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/types.rs</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/workqueue.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/kernel/workqueue.rs</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/helpers.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/macros/helpers.rs</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/lib.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/macros/lib.rs</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/module.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/macros/module.rs</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/pin_data.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/macros/pin_data.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/zeroable.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>rust/macros/zeroable.rs</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/bpf/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>samples/bpf/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/rust/rust_minimal.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>samples/rust/rust_minimal.rs</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/rust/rust_print.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>samples/rust/rust_print.rs</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.btf?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/Makefile.btf</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.build?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/Makefile.build</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.debug?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/Makefile.debug</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.lib?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/Makefile.lib</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.modpost?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/Makefile.modpost</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/scripts/check-variable-fonts.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/check-variable-fonts.sh</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/gdb/linux/interrupts.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/gdb/linux/interrupts.py</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/generate_rust_analyzer.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/generate_rust_analyzer.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/generate_rust_target.rs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/generate_rust_target.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/kernel-doc?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/kernel-doc</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/scripts/make_fit.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/make_fit.py</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/min-tool-version.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/min-tool-version.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/mod/modpost.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/mod/modpost.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/sphinx-pre-install?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>scripts/sphinx-pre-install</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/apparmor/lsm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/apparmor/lsm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/evm/evm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/evm/evm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/evm/evm_crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/evm/evm_crypto.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/evm/evm_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/evm/evm_main.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_api.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_appraise.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_appraise.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_crypto.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_fs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_fs.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_iint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_iint.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_init.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_kexec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_kexec.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_main.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_template_lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/ima/ima_template_lib.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/integrity.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/integrity/integrity.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/gc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/gc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/key.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/keyctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/keyctl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/sysctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/sysctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/trusted-keys/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/trusted-keys/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/trusted-keys/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/trusted-keys/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/trusted-keys/trusted_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/trusted-keys/trusted_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/security/keys/trusted-keys/trusted_dcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/trusted-keys/trusted_dcp.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/trusted-keys/trusted_tpm1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/trusted-keys/trusted_tpm1.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/keys/trusted-keys/trusted_tpm2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/keys/trusted-keys/trusted_tpm2.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/loadpin/loadpin.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/loadpin/loadpin.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/security.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/security.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/hooks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/hooks.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/netlabel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/netlabel.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/selinuxfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/selinuxfs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/conditional.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/conditional.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/conditional.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/conditional.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/ebitmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/ebitmap.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/ebitmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/ebitmap.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/hashtab.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/hashtab.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/hashtab.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/hashtab.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/policydb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/policydb.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/services.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/services.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/symtab.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/ss/symtab.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/xfrm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/selinux/xfrm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/smack/smack_lsm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/smack/smack_lsm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/yama/yama_lsm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>security/yama/yama_lsm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/ac97/bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/ac97/bus.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/ac97_bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/ac97_bus.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/aoa/codecs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/aoa/codecs/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/aoa/core/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/aoa/core/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/aoa/fabrics/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/aoa/fabrics/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/aoa/soundbus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/aoa/soundbus/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/aoa/soundbus/i2sbus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/aoa/soundbus/i2sbus/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/aoa/soundbus/i2sbus/pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/aoa/soundbus/i2sbus/pcm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/arm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/arm/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/arm/pxa2xx-pcm-lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/arm/pxa2xx-pcm-lib.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/atmel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/atmel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/control_led.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/control_led.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/init.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/oss/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/oss/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/pcm_dmaengine.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/pcm_dmaengine.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/pcm_native.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/pcm_native.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/seq/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/oss/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/seq/oss/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/seq_dummy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/seq/seq_dummy.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/sound_kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/core/sound_kunit.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/aloop.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/aloop.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/mpu401/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/mpu401/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/opl3/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/opl3/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/opl4/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/opl4/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/pcmtest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/pcmtest.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/pcsp/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/pcsp/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/drivers/vx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/drivers/vx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/amdtp-stream.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/amdtp-stream.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/bebob/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/bebob/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/dice/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/dice/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/digi00x/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/digi00x/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/fireface/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/fireface/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/fireworks/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/fireworks/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/motu/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/motu/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/oxfw/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/oxfw/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/firewire/tascam/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/firewire/tascam/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/hda/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/hda/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/ext/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/hda/ext/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/hdac_controller.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/hda/hdac_controller.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/intel-dsp-config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/hda/intel-dsp-config.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/intel-sdw-acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/hda/intel-sdw-acpi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/i2c/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/i2c/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/i2c/other/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/i2c/other/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/ad1816a/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/ad1816a/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/ad1848/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/ad1848/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/cs423x/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/cs423x/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/es1688/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/es1688/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/galaxy/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/galaxy/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/gus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/gus/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/msnd/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/msnd/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/opti9xx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/opti9xx/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/sb/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/emu8000_patch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/sb/emu8000_patch.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/wavefront/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/wavefront/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/wss/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/isa/wss/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/mips/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/mips/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/oss/dmasound/dmasound_atari.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/oss/dmasound/dmasound_atari.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/oss/dmasound/dmasound_paula.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/oss/dmasound/dmasound_paula.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/parisc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/parisc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/Makefile</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ali5451/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/ali5451/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/asihpi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/asihpi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/au88x0/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/au88x0/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/aw2/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/aw2/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ca0106/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/ca0106/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ctxfi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/ctxfi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/echoaudio/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/echoaudio/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emu10k1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/emu10k1.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emu10k1_callback.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/emu10k1_callback.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emu10k1_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/emu10k1_main.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emu10k1_patch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/emu10k1_patch.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emumixer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/emumixer.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emuproc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/emuproc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/io.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/memory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/emu10k1/memory.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/Makefile</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cirrus_scodec_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/cirrus_scodec_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l41_hda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/cs35l41_hda.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l41_hda.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/cs35l41_hda.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l41_hda_property.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/cs35l41_hda_property.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l56_hda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/cs35l56_hda.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_codec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_codec.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_component.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_component.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_component.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_component.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_controller.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_controller.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_controller.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_controller.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_cs_dsp_ctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_cs_dsp_ctl.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_generic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_generic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_generic.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_intel.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_intel_trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_intel_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/hda_sysfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_analog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_analog.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_ca0132.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_ca0132.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_cirrus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_cirrus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_conexant.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_conexant.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_cs8409.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_cs8409.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_hdmi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_realtek.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_realtek.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_sigmatel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_sigmatel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_via.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/hda/patch_via.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ice1712/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/ice1712/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/korg1212/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/korg1212/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/lx6464es/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/lx6464es/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/mixart/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/mixart/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/nm256/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/nm256/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/oxygen/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/oxygen/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/pcxhr/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/pcxhr/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/riptide/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/riptide/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/rme9652/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/rme9652/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/trident/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/trident/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/vx222/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/vx222/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ymfpci/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pci/ymfpci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pcmcia/pdaudiocf/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pcmcia/pdaudiocf/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pcmcia/vx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/pcmcia/vx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/ppc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/ppc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/sh/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/sh/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/adi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/adi/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp-da7219-max98357a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp-da7219-max98357a.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-legacy-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp/acp-legacy-common.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-mach-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp/acp-mach-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp/acp-pci.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/amd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp/amd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/chip_offset_byte.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp/chip_offset_byte.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp3x-rt5682-max9836.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/acp3x-rt5682-max9836.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/ps/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/ps/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/ps/ps-sdw-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/ps/ps-sdw-dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/raven/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/raven/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/renoir/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/renoir/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/rpl/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/rpl/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/vangogh/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/vangogh/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/yc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/yc/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/yc/acp6x-mach.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/amd/yc/acp6x-mach.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/apple/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/apple/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/atmel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/atmel/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/atmel/tse850-pcm5142.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/atmel/tse850-pcm5142.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/au1x/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/au1x/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/bcm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/bcm/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/cirrus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/cirrus/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/Makefile</a></td><td class='right'>784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ab8500-codec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ab8500-codec.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/adau1372-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/adau1372-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/adau1373.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/adau1373.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/adau1701.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/adau1701.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/adau7118-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/adau7118-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/adav803.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/adav803.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ak4118.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ak4118.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ak4535.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ak4535.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ak4641.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ak4641.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ak4671.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ak4671.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l33.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l33.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l34.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l34.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l35.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l35.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l36.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l36.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l41-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l41-i2c.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l41.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l41.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l45-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l45-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l56-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l56-sdw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-shared.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l56-shared.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs35l56.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs4265.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs4265.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs4270.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs4270.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs4271-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs4271-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l42-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs42l42-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l51-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs42l51-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l52.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs42l52.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l56.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs42l56.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l73.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs42l73.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs43130.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs43130.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs4341.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs4341.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs4349.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs4349.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs53l30.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cs53l30.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cx2072x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/cx2072x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/da7210.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/da7210.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/da7213.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/da7213.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/da7219-aad.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/da7219-aad.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/da732x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/da732x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/da9055.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/da9055.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8316.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/es8316.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8326.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/es8326.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8328-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/es8328-i2c.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/hda-dai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/hda-dai.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/hda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/hda.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/hda.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/hda.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/hdac_hda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/hdac_hda.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/isabelle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/isabelle.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/lm4857.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/lm4857.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/lm49453.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/lm49453.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max9768.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max9768.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98371.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98371.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98373-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98373-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98373-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98373-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98388.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98388.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98390.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98390.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max9850.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max9850.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98520.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98520.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max9867.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max9867.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max9877.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max9877.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98925.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98925.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98926.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98926.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/max98927.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/max98927.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ml26124.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ml26124.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/mt6660.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/mt6660.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8325.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8325.c</a></td><td class='right'>900</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8325.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8325.h</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8540.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8540.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8810.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8810.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8821.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8821.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8821.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8821.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8822.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8822.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8822.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8822.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8824.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8824.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/nau8825.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/nau8825.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/pcm1681.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/pcm1681.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/pcm1789-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/pcm1789-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/pcm179x-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/pcm179x-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/pcm6240.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/pcm6240.c</a></td><td class='right'>2217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/pcm6240.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/pcm6240.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/rk3308_codec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rk3308_codec.c</a></td><td class='right'>974</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/rk3308_codec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rk3308_codec.h</a></td><td class='right'>579</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1011.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1011.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1015.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1015.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1016.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1016.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1017-sdca-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1017-sdca-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1019.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1019.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1305.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1305.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1308-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1308-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1308.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1308.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1316-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1316-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt1318-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt1318-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt274.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt274.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt286.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt286.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt298.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt298.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5514.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5514.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5616.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5616.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5631.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5631.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5640.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5640.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5645.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5645.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5651.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5651.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5659.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5659.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5660.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5660.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5663.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5663.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5665.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5665.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5668.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5668.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5670.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5670.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5682-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5682-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5682-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5682-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5682s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt5682s.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt700-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt700-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt711-sdca-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt711-sdca-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt711-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt711-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt712-sdca-dmic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt712-sdca-dmic.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt712-sdca-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt712-sdca-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt715-sdca-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt715-sdca-sdw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt715-sdca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt715-sdca.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt715-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt715-sdw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt722-sdca-sdw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt722-sdca.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/rt722-sdca.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sdw-mockup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sdw-mockup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sgtl5000.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sgtl5000.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sigmadsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sigmadsp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sma1303.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sma1303.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/src4xxx-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/src4xxx-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ssm2518.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ssm2518.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ssm4567.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ssm4567.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sta32x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sta32x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sta350.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sta350.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sta529.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/sta529.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2552.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas2552.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2764.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas2764.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2770.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas2770.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2780.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas2780.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2781-fmwlib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas2781-fmwlib.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas5086.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas5086.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas6424.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tas6424.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tda7419.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tda7419.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tfa9879.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tfa9879.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tlv320aic23-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tlv320aic23-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tlv320aic32x4-spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tlv320aic32x4-spi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tlv320aic3x-spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tlv320aic3x-spi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ts3a227e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/ts3a227e.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tscs42xx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tscs42xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tscs454.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/tscs454.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/uda1380.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/uda1380.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd934x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wcd934x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm1250-ev1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm1250-ev1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm2000.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm2000.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm2200.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm2200.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm5100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm5100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8510.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8510.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8523.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8523.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8711.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8711.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8728.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8728.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8731-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8731-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8737.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8737.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8741.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8741.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8750.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8750.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8753.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8753.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8804-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8804-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8900.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8900.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8903.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8903.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8940.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8940.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8955.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8955.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8960.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8960.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8961.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8961.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8962.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8962.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8971.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8971.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8974.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8974.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8978.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8978.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8983.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8983.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8988.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8988.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8990.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8990.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8991.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8991.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8993.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8993.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8994.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8994.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8995.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8995.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8996.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm8996.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm9081.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm9081.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm9090.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm9090.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm_adsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wm_adsp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wsa881x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/codecs/wsa881x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/Makefile</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl-asoc-card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/fsl-asoc-card.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_rpmsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/fsl_rpmsg.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_ssi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/fsl_ssi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-audio-rpmsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/imx-audio-rpmsg.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/imx-card.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-es8328.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/imx-es8328.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/imx-hdmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-pcm-rpmsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/imx-pcm-rpmsg.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-rpmsg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/fsl/imx-rpmsg.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/generic/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/generic/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/generic/audio-graph-card2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/generic/audio-graph-card2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/generic/simple-card-utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/generic/simple-card-utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/img/img-i2s-in.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/img/img-i2s-in.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/img/img-i2s-out.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/img/img-i2s-out.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/atom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/atom/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/atom/sst/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/atom/sst/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/apl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/apl.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/avs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/avs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/board_selection.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/board_selection.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/da7219.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/da7219.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/dmic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/dmic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/es8336.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/es8336.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/hdaudio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/hdaudio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/i2s_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/i2s_test.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/max98357a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/max98357a.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/max98373.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/max98373.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/max98927.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/max98927.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/nau8825.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/nau8825.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/probe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/probe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt274.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/rt274.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt286.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/rt286.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt298.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/rt298.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt5514.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/rt5514.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt5663.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/rt5663.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt5682.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/rt5682.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/ssm4567.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/boards/ssm4567.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/cldma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/cldma.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/cldma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/cldma.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/cnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/cnl.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/control.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/control.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/control.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/core.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/dsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/dsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/icl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/icl.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/ipc.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/loader.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/messages.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/messages.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/messages.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/messages.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/path.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/path.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/path.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/path.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/pcm.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/probes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/probes.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/registers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/registers.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/skl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/skl.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/tgl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/tgl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/topology.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/utils.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/avs/utils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/Kconfig</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/Makefile</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/bdw_rt286.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/bdw_rt286.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/bridge_cs35l56.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/bridge_cs35l56.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/bxt_da7219_max98357a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/bxt_da7219_max98357a.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/bxt_rt298.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/bxt_rt298.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/bytcr_rt5640.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/bytcr_rt5640.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/cml_rt1011_rt5682.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/cml_rt1011_rt5682.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/glk_rt5682_max98357a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/glk_rt5682_max98357a.c</a></td><td class='right'>691</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/hda_dsp_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/hda_dsp_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/hsw_rt5640.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/hsw_rt5640.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/kbl_da7219_max98357a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/kbl_da7219_max98357a.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/kbl_da7219_max98927.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/kbl_da7219_max98927.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/kbl_rt5660.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/kbl_rt5660.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/kbl_rt5663_max98927.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/kbl_rt5663_max98927.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/skl_hda_dsp_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/skl_hda_dsp_common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/skl_hda_dsp_generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/skl_hda_dsp_generic.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/skl_nau88l25_max98357a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/skl_nau88l25_max98357a.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/skl_nau88l25_ssm4567.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/skl_nau88l25_ssm4567.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/skl_rt286.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/skl_rt286.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_board_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_board_helpers.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_board_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_board_helpers.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_cirrus_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_cirrus_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_cs42l42.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_cs42l42.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_da7219.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_da7219.c</a></td><td class='right'>519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_maxim_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_maxim_common.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_maxim_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_maxim_common.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_nau8825.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_nau8825.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_nuvoton_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_nuvoton_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_realtek_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_realtek_common.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_realtek_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_realtek_common.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_rt5682.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_rt5682.c</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw.c</a></td><td class='right'>1369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_common.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_cs42l42.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_cs42l42.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_cs42l43.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_cs42l43.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_cs_amp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_cs_amp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_maxim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_maxim.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt5682.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt5682.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt700.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt700.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt711.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt711.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt712_sdca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt712_sdca.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt715.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt715.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt715_sdca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt715_sdca.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt722_sdca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt722_sdca.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt_amp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt_amp.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt_dmic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt_dmic.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw_rt_sdca_jack_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_sdw_rt_sdca_jack_common.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_ssp_amp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_ssp_amp.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_ssp_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/boards/sof_ssp_common.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/dsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/dsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/ipc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/loader.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/messages.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/messages.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/messages.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/messages.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/pcm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/registers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/registers.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/catpt/trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-adl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-adl-match.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-arl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-arl-match.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-cml-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-cml-match.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-glk-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-glk-match.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-icl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-icl-match.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-jsl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-jsl-match.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-lnl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-lnl-match.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-mtl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-mtl-match.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-rpl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-rpl-match.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-ssp-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-ssp-common.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-tgl-match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/soc-acpi-intel-tgl-match.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sst-dsp-priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/sst-dsp-priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sst-dsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/sst-dsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sst-dsp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/sst-dsp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sst-ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/sst-ipc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sst-ipc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/common/sst-ipc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/keembay/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/keembay/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/skylake/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/skylake/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/skylake/skl-topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/intel/skylake/skl-topology.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/jz4740/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/jz4740/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/kirkwood/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/kirkwood/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/kirkwood/kirkwood-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/kirkwood/kirkwood-dma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/loongson/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/loongson_card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/loongson/loongson_card.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/loongson_dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/loongson/loongson_dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/loongson_i2s_pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/loongson/loongson_i2s_pci.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-afe-platform-driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-afe-platform-driver.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-dai-adda-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-dai-adda-common.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-dai-adda-common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-dai-adda-common.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-dsp-sof-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-dsp-sof-common.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-dsp-sof-common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-dsp-sof-common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-soc-card.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-soc-card.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-soundcard-driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-soundcard-driver.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/common/mtk-soundcard-driver.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/common/mtk-soundcard-driver.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt2701/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt2701/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt6797/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt6797/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt6797/mt6797-afe-pcm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt6797/mt6797-dai-adda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt6797/mt6797-dai-adda.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt7986/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt7986/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt7986/mt7986-afe-pcm.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8183/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8183/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8183/mt8183-afe-pcm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8183/mt8183-dai-adda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8183/mt8183-dai-adda.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8186/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8186/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8186/mt8186-afe-pcm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8186/mt8186-dai-adda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8186/mt8186-dai-adda.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c</a></td><td class='right'>1189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8186/mt8186-mt6366.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8186/mt8186-mt6366.c</a> (renamed from sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c)</td><td class='right'>580</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8188/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8188/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8188/mt8188-afe-pcm.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8188/mt8188-dai-adda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8188/mt8188-dai-adda.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8188/mt8188-mt6359.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8188/mt8188-mt6359.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8192/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8192/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8192/mt8192-afe-pcm.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8192/mt8192-dai-adda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8192/mt8192-dai-adda.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8192/mt8192-dai-tdm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8192/mt8192-dai-tdm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8195/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8195/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8195/mt8195-afe-pcm.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8195/mt8195-dai-adda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8195/mt8195-dai-adda.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8195/mt8195-mt6359.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mediatek/mt8195/mt8195-mt6359.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/Makefile</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/aiu-fifo-i2s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/aiu-fifo-i2s.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/aiu-fifo-spdif.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/aiu-fifo-spdif.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/aiu-fifo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/aiu-fifo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/aiu-fifo.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/aiu-fifo.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/axg-card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/axg-card.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/axg-fifo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/axg-fifo.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/axg-tdm-formatter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/axg-tdm-formatter.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/axg-tdm-interface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/axg-tdm-interface.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/axg-tdm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/meson/axg-tdm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mxs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/mxs/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/pxa/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/pxa/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/Makefile</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/apq8016_sbc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/apq8016_sbc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/qdsp6/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/qdsp6/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/qdsp6/q6apm-dai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/qdsp6/q6apm-dai.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/qdsp6/q6asm-dai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/qdsp6/q6asm-dai.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/qdsp6/q6dsp-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/qdsp6/q6dsp-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sc7180.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/sc7180.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sc7280.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/sc7280.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sc8280xp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/sc8280xp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/sdw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sm8250.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/sm8250.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/x1e80100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/qcom/x1e80100.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/rockchip/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/rockchip/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/samsung/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/samsung/Makefile</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/samsung/i2s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/samsung/i2s.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/samsung/midas_wm1811.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/samsung/midas_wm1811.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/cmd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/ctu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/ctu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/dma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/dvc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/dvc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/gen.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/gen.c</a></td><td class='right'>519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/mix.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/mix.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/rsnd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/rsnd.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/src.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/src.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/ssi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/ssi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sh/rcar/ssiu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sh/rcar/ssiu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/soc-card-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-card-test.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-card.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-dai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-dai.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-dapm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-dapm.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-generic-dmaengine-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-generic-dmaengine-pcm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-jack.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-jack.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-pcm.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-topology-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-topology-test.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/soc-topology.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/amd/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/acp-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/amd/acp-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/acp-loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/amd/acp-loader.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/acp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/amd/acp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/control.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/debug.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/fw-file-profile.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/fw-file-profile.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/imx/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/imx-common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/imx/imx-common.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/imx-common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/imx/imx-common.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/imx8.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/imx/imx8.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/imx8m.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/imx/imx8m.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/imx8ulp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/imx/imx8ulp.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/apl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/apl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/atom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/atom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/atom.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/atom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/bdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/bdw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/byt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/byt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/cnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/cnl.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/ext_manifest.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/ext_manifest.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-bus.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-codec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-codec.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-common-ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-common-ops.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-ctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-ctrl.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-dai-ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-dai-ops.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-dai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-dai.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-dsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-dsp.c</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-ipc.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-ipc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-ipc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-loader-skl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-loader-skl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-loader.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-mlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-mlink.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-pcm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-probes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-probes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-stream.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-stream.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda-trace.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda.c</a></td><td class='right'>826</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/hda.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/icl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/icl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/lnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/lnl.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/lnl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/lnl.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/mtl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/mtl.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/mtl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/mtl.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-apl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-apl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-cnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-cnl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-icl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-icl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-lnl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-lnl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-mtl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-mtl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-skl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-skl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-tgl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-tgl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-tng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/pci-tng.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/shim.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/shim.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/skl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/skl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/telemetry.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/telemetry.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/telemetry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/telemetry.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/tgl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/tgl.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/tracepoints.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/intel/tracepoints.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/iomem-utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/iomem-utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3-control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3-control.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3-dtrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3-dtrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3-loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3-loader.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3-pcm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3-priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3-priv.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3-topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3-topology.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-control.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-fw-reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-fw-reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-loader.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-mtrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-mtrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-pcm.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-priv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-telemetry.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-telemetry.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-telemetry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-telemetry.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-topology.c</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4-topology.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ipc4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/loader.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/loader.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/mediatek/mt8186/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/mediatek/mt8186/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/mediatek/mt8186/mt8186.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/mediatek/mt8186/mt8186.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/mediatek/mt8195/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/mediatek/mt8195/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/mediatek/mt8195/mt8195.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/mediatek/mt8195/mt8195.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/nocodec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/nocodec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ops.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ops.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/ops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/pcm.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/pm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-acpi-dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-acpi-dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-acpi-dev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-acpi-dev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-audio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-audio.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-audio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-audio.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client-ipc-flood-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client-ipc-flood-test.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client-ipc-kernel-injector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client-ipc-kernel-injector.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client-ipc-msg-injector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client-ipc-msg-injector.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client-probes-ipc3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client-probes-ipc3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client-probes-ipc4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client-probes-ipc4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client-probes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client-probes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-client.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-client.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-pci-dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-pci-dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-pci-dev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-pci-dev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/sof-utils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/stream-ipc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/stream-ipc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/topology.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/xtensa/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/xtensa/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/xtensa/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sof/xtensa/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/spear/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/spear/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sprd/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sprd/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sti/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sti/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/stm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/stm/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sunxi/sun4i-i2s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sunxi/sun4i-i2s.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sunxi/sun50i-codec-analog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sunxi/sun50i-codec-analog.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sunxi/sun50i-dmic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sunxi/sun50i-dmic.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sunxi/sun8i-codec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/sunxi/sun8i-codec.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/tegra/Makefile</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra186_dspk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/tegra/tegra186_dspk.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra_asoc_machine.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/tegra/tegra_asoc_machine.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra_pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/tegra/tegra_pcm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ti/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/ti/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ti/davinci-i2s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/ti/davinci-i2s.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ti/davinci-mcasp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/ti/davinci-mcasp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ti/omap-hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/ti/omap-hdmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/uniphier/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/uniphier/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/uniphier/aio-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/uniphier/aio-dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ux500/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/ux500/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ux500/ux500_msp_dai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/ux500/ux500_msp_dai.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/xilinx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/xilinx/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/xilinx/xlnx_formatter_pcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/xilinx/xlnx_formatter_pcm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/xilinx/xlnx_i2s.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/xilinx/xlnx_i2s.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/xtensa/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/soc/xtensa/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/sparc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/sparc/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/spi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/spi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/emux.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/emux.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/emux_hwdep.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/emux_hwdep.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/emux_oss.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/emux_oss.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/emux_proc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/emux_proc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/emux_seq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/emux_seq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/synth/emux/soundfont.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/synth/emux/soundfont.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/6fire/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/6fire/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/card.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/hiface/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/hiface/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/misc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/misc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/mixer_quirks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/mixer_quirks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/mixer_scarlett2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/mixer_scarlett2.c</a></td><td class='right'>2843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 76.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/quirks-table.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/quirks-table.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/quirks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/quirks.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/usx2y/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/usb/usx2y/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/virtio/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/virtio/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/x86/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/x86/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/xen/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>sound/xen/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/arm64/include/asm/sysreg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/arch/arm64/include/asm/sysreg.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-btf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-btf.rst</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-cgroup.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-cgroup.rst</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-feature.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-feature.rst</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-gen.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-gen.rst</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-iter.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-iter.rst</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-link.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-link.rst</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-map.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-map.rst</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-net.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-net.rst</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-perf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-perf.rst</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-prog.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-prog.rst</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-struct_ops.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool-struct_ops.rst</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/bpftool.rst</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/common_options.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Documentation/common_options.rst</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/bash-completion/bpftool?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/bash-completion/bpftool</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/common.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/feature.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/feature.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/gen.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/gen.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/iter.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/iter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/link.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/link.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/main.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/main.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/pids.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/pids.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/prog.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/skeleton/pid_iter.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/skeleton/pid_iter.bpf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/struct_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/bpf/bpftool/struct_ops.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/linux/align.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/linux/align.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/linux/bitmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/linux/bitmap.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/linux/bitops.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/linux/bitops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/linux/compiler.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/linux/compiler.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/linux/filter.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/linux/filter.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/linux/mm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/linux/mm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/stdlib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/nolibc/stdlib.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/string.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/nolibc/string.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/nolibc/sys.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/uapi/linux/bpf.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/ethtool.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/uapi/linux/ethtool.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/netdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/include/uapi/linux/netdev.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/bpf.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/bpf.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf_core_read.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/bpf_core_read.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/bpf_helpers.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf_tracing.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/bpf_tracing.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/btf_dump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/btf_dump.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/libbpf.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/libbpf.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf.map?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/libbpf.map</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/libbpf_internal.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf_probes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/libbpf_probes.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf_version.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/libbpf_version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/ringbuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/ringbuf.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/str_error.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/str_error.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/usdt.bpf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/lib/bpf/usdt.bpf.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/cli.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/cli.py</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/ethtool.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/ethtool.py</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/lib/nlspec.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/lib/nlspec.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/lib/ynl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/lib/ynl.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/lib/ynl.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/lib/ynl.py</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/netdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/samples/netdev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/ynl-gen-c.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/ynl-gen-c.py</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/ynl-gen-rst.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/net/ynl/ynl-gen-rst.py</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/riscv/util/header.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/perf/arch/riscv/util/header.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/util/probe-finder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/perf/util/probe-finder.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/tools/pfrut/pfrut.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/power/acpi/tools/pfrut/pfrut.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/sound/dapm-graph?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/sound/dapm-graph</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/kunit/qemu_configs/riscv.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/kunit/qemu_configs/riscv.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/arm64/tags/tags_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/arm64/tags/tags_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/DENYLIST.aarch64?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/DENYLIST.aarch64</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/DENYLIST.s390x?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/DENYLIST.s390x</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/Makefile</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bench.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/bench.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/bench_bpf_crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/benchs/bench_bpf_crypto.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/bench_trigger.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/benchs/bench_trigger.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/run_bench_trigger.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/benchs/run_bench_trigger.sh</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/run_bench_uprobes.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/benchs/run_bench_uprobes.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bpf_arena_list.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/bpf_arena_list.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bpf_experimental.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/bpf_experimental.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bpf_tcp_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/bpf_tcp_helpers.h</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bpf_testmod/bpf_testmod.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/bpf_testmod/bpf_testmod.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bpf_testmod/bpf_testmod_kfunc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/bpf_testmod/bpf_testmod_kfunc.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/cgroup_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/cgroup_helpers.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/arena_atomics.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/arena_atomics.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_cookie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/bpf_cookie.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/btf_map_in_map.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/btf_map_in_map.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/cgroup1_hierarchy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/cgroup1_hierarchy.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/cls_redirect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/cls_redirect.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/crypto_sanity.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/crypto_sanity.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/dummy_st_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/dummy_st_ops.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/empty_skb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/empty_skb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/fib_lookup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/fib_lookup.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/flow_dissector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/flow_dissector.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/for_each.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/for_each.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/ip_check_defrag.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/ip_check_defrag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/ksyms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/ksyms.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/module_attach.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/module_attach.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/mptcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/mptcp.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/ns_current_pid_tgid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/ns_current_pid_tgid.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/perf_skip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/perf_skip.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/preempt_lock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/preempt_lock.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/ringbuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/ringbuf.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/send_signal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/send_signal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sk_assign.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/sk_assign.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sock_addr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/sock_addr.c</a></td><td class='right'>2353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 80.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockmap_basic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/sockmap_basic.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockmap_listen.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/sockmap_listen.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockopt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/sockopt.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockopt_inherit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/sockopt_inherit.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/tc_redirect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/tc_redirect.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/tcp_rtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/tcp_rtt.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/test_struct_ops_module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/test_struct_ops_module.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/test_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/test_tunnel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/trace_printk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/trace_printk.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/trace_vprintk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/trace_vprintk.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/verifier.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/verifier.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/verifier_kfunc_prog_types.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/verifier_kfunc_prog_types.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/wq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/wq.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/xdp_do_redirect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/xdp_do_redirect.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/xdp_metadata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/prog_tests/xdp_metadata.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/arena_atomics.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/arena_atomics.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/arena_list.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/arena_list.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bench_local_storage_create.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bench_local_storage_create.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bind4_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bind4_prog.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bind6_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bind6_prog.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bind_prog.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bind_prog.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_cc_cubic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bpf_cc_cubic.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_cubic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bpf_cubic.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_dctcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bpf_dctcp.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_dctcp_release.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bpf_dctcp_release.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_tcp_nogpl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bpf_tcp_nogpl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_tracing_net.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/bpf_tracing_net.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/cgrp_kfunc_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/cgrp_kfunc_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/connect4_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/connect4_prog.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/connect6_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/connect6_prog.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/connect_unix_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/connect_unix_prog.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/cpumask_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/cpumask_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/cpumask_failure.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/cpumask_failure.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/crypto_basic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/crypto_basic.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/crypto_bench.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/crypto_bench.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/crypto_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/crypto_common.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/crypto_sanity.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/crypto_sanity.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/dummy_st_ops_success.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/dummy_st_ops_success.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/dynptr_fail.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/dynptr_fail.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/fib_lookup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/fib_lookup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/for_each_multi_maps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/for_each_multi_maps.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/getpeername4_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/getpeername4_prog.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/getpeername6_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/getpeername6_prog.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/getsockname4_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/getsockname4_prog.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/getsockname6_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/getsockname6_prog.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/iters.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/iters.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/jeq_infer_not_null_fail.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/jeq_infer_not_null_fail.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/kprobe_multi_session.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/kprobe_multi_session.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/kprobe_multi_session_cookie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/kprobe_multi_session_cookie.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/local_storage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/local_storage.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/lsm_cgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/lsm_cgroup.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/mptcp_sock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/mptcp_sock.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/mptcpify.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/mptcpify.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/preempt_lock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/preempt_lock.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/sendmsg4_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/sendmsg4_prog.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/sendmsg6_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/sendmsg6_prog.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/sendmsg_unix_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/sendmsg_unix_prog.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/skb_pkt_end.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/skb_pkt_end.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/sock_addr_kern.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/sock_addr_kern.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/sockopt_qos_to_cc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/sockopt_qos_to_cc.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/struct_ops_forgotten_cb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/struct_ops_forgotten_cb.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/struct_ops_module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/struct_ops_module.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/struct_ops_nulled_out_cb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/struct_ops_nulled_out_cb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/task_kfunc_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/task_kfunc_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/tcp_ca_incompl_cong_ops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/tcp_ca_incompl_cong_ops.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/tcp_ca_kfunc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/tcp_ca_kfunc.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/tcp_ca_unsupp_cong_op.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/tcp_ca_unsupp_cong_op.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/tcp_ca_update.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/tcp_ca_update.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/tcp_ca_write_sk_pacing.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/tcp_ca_write_sk_pacing.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/tcp_rtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/tcp_rtt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_bpf_cookie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_bpf_cookie.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_btf_skc_cls_ingress.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_btf_skc_cls_ingress.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_global_func10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_global_func10.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_lwt_redirect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_lwt_redirect.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_module_attach.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_module_attach.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_ns_current_pid_tgid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_ns_current_pid_tgid.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_perf_skip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_perf_skip.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_ringbuf_n.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_ringbuf_n.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_skmsg_load_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_skmsg_load_helpers.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_sock_fields.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_sock_fields.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_sockmap_pass_prog.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_sockmap_pass_prog.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_sockmap_skb_verdict_attach.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_sockmap_skb_verdict_attach.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_tunnel_kern.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_tunnel_kern.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_xdp_noinline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_xdp_noinline.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_xdp_vlan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/test_xdp_vlan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/timer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/timer.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/timer_failure.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/timer_failure.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/timer_mim.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/timer_mim.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/timer_mim_reject.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/timer_mim_reject.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/trigger_bench.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/trigger_bench.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_bounds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_bounds.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_global_subprogs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_global_subprogs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_helper_restricted.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_helper_restricted.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_iterating_callbacks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_iterating_callbacks.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_kfunc_prog_types.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_kfunc_prog_types.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_sock_addr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_sock_addr.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_subprog_precision.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/verifier_subprog_precision.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/wq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/wq.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/wq_failures.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/progs/wq_failures.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_cpp.cpp?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/test_cpp.cpp</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_sock_addr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/test_sock_addr.c</a></td><td class='right'>1434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.1%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_sock_addr.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/test_sock_addr.sh</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_sockmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/test_sockmap.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_tc_tunnel.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/test_tc_tunnel.sh</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_tcp_check_syncookie_user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/test_tcp_check_syncookie_user.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/testing_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/testing_helpers.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/trace_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/trace_helpers.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/trace_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/trace_helpers.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/uprobe_multi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/uprobe_multi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/veristat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/veristat.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/xdp_hw_metadata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/xdp_hw_metadata.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/xskxceiver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/xskxceiver.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/xskxceiver.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/bpf/xskxceiver.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/capabilities/test_execve.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/capabilities/test_execve.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/capabilities/validate_cap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/capabilities/validate_cap.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/clone3/clone3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/clone3/clone3.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/clone3/clone3_clear_sighand.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/clone3/clone3_clear_sighand.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/clone3/clone3_set_tid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/clone3/clone3_set_tid.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/core/close_range_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/core/close_range_test.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/cpufreq/cpufreq.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/cpufreq/cpufreq.sh</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/cpufreq/main.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/cpufreq/main.sh</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/cpufreq/module.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/cpufreq/module.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/dmabuf-heaps/dmabuf-heap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/dmabuf-heaps/dmabuf-heap.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/README.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/README.rst</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/csum.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/csum.py</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/devlink_port_split.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/devlink_port_split.py</a> (renamed from tools/testing/selftests/net/devlink_port_split.py)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/ethtool.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/ethtool.sh</a> (renamed from tools/testing/selftests/net/forwarding/ethtool.sh)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/ethtool_extended_state.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/ethtool_extended_state.sh</a> (renamed from tools/testing/selftests/net/forwarding/ethtool_extended_state.sh)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/ethtool_lib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/ethtool_lib.sh</a> (renamed from tools/testing/selftests/net/forwarding/ethtool_lib.sh)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/ethtool_mm.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/ethtool_mm.sh</a> (renamed from tools/testing/selftests/net/forwarding/ethtool_mm.sh)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/ethtool_rmon.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/ethtool_rmon.sh</a> (renamed from tools/testing/selftests/net/forwarding/ethtool_rmon.sh)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/hw_stats_l3.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/hw_stats_l3.sh</a> (renamed from tools/testing/selftests/net/forwarding/hw_stats_l3.sh)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/hw_stats_l3_gre.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/hw_stats_l3_gre.sh</a> (renamed from tools/testing/selftests/net/forwarding/hw_stats_l3_gre.sh)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/lib/py/__init__.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/lib/py/__init__.py</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/loopback.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/loopback.sh</a> (renamed from tools/testing/selftests/net/forwarding/loopback.sh)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/pp_alloc_fail.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/pp_alloc_fail.py</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/settings?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/hw/settings</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/__init__.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/lib/py/__init__.py</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/env.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/lib/py/env.py</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/load.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/lib/py/load.py</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/remote.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/lib/py/remote.py</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/remote_netns.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/lib/py/remote_netns.py</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/remote_ssh.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/lib/py/remote_ssh.py</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/microchip/ksz9477_qos.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/microchip/ksz9477_qos.sh</a></td><td class='right'>668</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/mlxsw/ethtool_lanes.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/mlxsw/ethtool_lanes.sh</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/mlxsw/mlxsw_lib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/mlxsw/mlxsw_lib.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/mlxsw/spectrum-2/resource_scale.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/mlxsw/spectrum-2/resource_scale.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/mlxsw/spectrum/resource_scale.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/mlxsw/spectrum/resource_scale.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/ping.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/ping.py</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/queues.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/queues.py</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/stats.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/stats.py</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/virtio_net/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/virtio_net/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/virtio_net/basic_features.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/virtio_net/basic_features.sh</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/virtio_net/config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/virtio_net/config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/virtio_net/virtio_net_common.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/drivers/net/virtio_net/virtio_net_common.sh</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/exec/recursion-depth.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/exec/recursion-depth.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/filesystems/binderfs/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/filesystems/binderfs/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/filesystems/statmount/statmount_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/filesystems/statmount/statmount_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ftrace/ftracetest?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ftrace/ftracetest</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ftrace/ftracetest-ktap?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ftrace/ftracetest-ktap</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ftrace/test.d/dynevent/add_remove_btfarg.tc?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ftrace/test.d/dynevent/add_remove_btfarg.tc</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ftrace/test.d/dynevent/fprobe_entry_arg.tc?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ftrace/test.d/dynevent/fprobe_entry_arg.tc</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ftrace/test.d/ftrace/func_set_ftrace_file.tc?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ftrace/test.d/ftrace/func_set_ftrace_file.tc</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ftrace/test.d/kprobe/kretprobe_entry_arg.tc?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ftrace/test.d/kprobe/kretprobe_entry_arg.tc</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/config.common?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/config.common</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/hid_bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/hid_bpf.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/progs/hid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/progs/hid.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/progs/hid_bpf_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/progs/hid_bpf_helpers.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/tests/base.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/tests/base.py</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/tests/base_device.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/tests/base_device.py</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/tests/base_gamepad.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/tests/base_gamepad.py</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/tests/test_gamepad.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/tests/test_gamepad.py</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/hid/tests/test_tablet.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/hid/tests/test_tablet.py</a></td><td class='right'>723</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ipc/msgque.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/ipc/msgque.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kselftest.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/kselftest.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kselftest/ktap_helpers.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/kselftest/ktap_helpers.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kselftest_deps.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/kselftest_deps.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kselftest_harness.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/kselftest_harness.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/aarch64/vgic_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/kvm/aarch64/vgic_init.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/landlock/fs_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/landlock/fs_test.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/lib.mk?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/lib.mk</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/membarrier/membarrier_test_multi_thread.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/membarrier/membarrier_test_multi_thread.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/membarrier/membarrier_test_single_thread.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/membarrier/membarrier_test_single_thread.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/compaction_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/compaction_test.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/cow.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/cow.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/gup_longterm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/gup_longterm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/gup_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/gup_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/ksm_functional_tests.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/ksm_functional_tests.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/madv_populate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/madv_populate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/mdwe_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/mdwe_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/mkdirty.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/mkdirty.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/pagemap_ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/pagemap_ioctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/protection_keys.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/protection_keys.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/run_vmtests.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/run_vmtests.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/soft-dirty.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/soft-dirty.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/split_huge_page_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/mm/split_huge_page_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/Makefile</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/af_unix/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/af_unix/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/af_unix/scm_rights.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/af_unix/scm_rights.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/amt.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/amt.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/bpf.mk?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/bpf.mk</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/bpf_offload.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/bpf_offload.py</a> (renamed from tools/testing/selftests/bpf/test_offload.py)</td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/cmsg_sender.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/cmsg_sender.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/cmsg_time.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/cmsg_time.sh</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/epoll_busy_poll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/epoll_busy_poll.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/fib_rule_tests.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/fib_rule_tests.sh</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/README?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/README</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/forwarding.config.sample?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/forwarding.config.sample</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/ipip_lib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/ipip_lib.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/lib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/lib.sh</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/lib_sh_test.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/lib_sh_test.sh</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/router_mpath_nh.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/router_mpath_nh.sh</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/router_mpath_nh_lib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/router_mpath_nh_lib.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/router_mpath_nh_res.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/router_mpath_nh_res.sh</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/router_nh.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/router_nh.sh</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/sch_ets_tests.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/sch_ets_tests.sh</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/sch_red.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/sch_red.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/sch_tbf_core.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/sch_tbf_core.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/tc_common.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/tc_common.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/tc_tunnel_key.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/forwarding/tc_tunnel_key.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/gro.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/gro.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/hsr/hsr_common.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/hsr/hsr_common.sh</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/hsr/hsr_redbox.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/hsr/hsr_redbox.sh</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_dump_flush.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/conntrack_dump_flush.c</a> (renamed from tools/testing/selftests/netfilter/conntrack_dump_flush.c)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_icmp_related.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/conntrack_icmp_related.sh</a> (renamed from tools/testing/selftests/netfilter/conntrack_icmp_related.sh)</td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_ipip_mtu.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/conntrack_ipip_mtu.sh</a> (renamed from tools/testing/selftests/netfilter/ipip-conntrack-mtu.sh)</td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_sctp_collision.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/conntrack_sctp_collision.sh</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_tcp_unreplied.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/conntrack_tcp_unreplied.sh</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_vrf.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/conntrack_vrf.sh</a> (renamed from tools/testing/selftests/netfilter/conntrack_vrf.sh)</td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/ipvs.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/ipvs.sh</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/lib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/lib.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nf_conntrack_packetdrill.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nf_conntrack_packetdrill.sh</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nf_nat_edemux.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nf_nat_edemux.sh</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nf_queue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nf_queue.c</a> (renamed from tools/testing/selftests/netfilter/nf-queue.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_audit.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_audit.sh</a> (renamed from tools/testing/selftests/netfilter/nft_audit.sh)</td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_concat_range.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_concat_range.sh</a> (renamed from tools/testing/selftests/netfilter/nft_concat_range.sh)</td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_concat_range_perf.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_concat_range_perf.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_conntrack_helper.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_conntrack_helper.sh</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_fib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_fib.sh</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_flowtable.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_flowtable.sh</a> (renamed from tools/testing/selftests/netfilter/nft_flowtable.sh)</td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_meta.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_meta.sh</a> (renamed from tools/testing/selftests/netfilter/nft_meta.sh)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_nat.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_nat.sh</a> (renamed from tools/testing/selftests/netfilter/nft_nat.sh)</td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_nat_zones.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_nat_zones.sh</a> (renamed from tools/testing/selftests/netfilter/nft_nat_zones.sh)</td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_queue.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_queue.sh</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_synproxy.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_synproxy.sh</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_zones_many.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/nft_zones_many.sh</a> (renamed from tools/testing/selftests/netfilter/nft_zones_many.sh)</td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/common.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/common.sh</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/conntrack_inexact_rst.pkt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/conntrack_inexact_rst.pkt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/conntrack_rst_invalid.pkt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/conntrack_rst_invalid.pkt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/conntrack_synack_old.pkt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/conntrack_synack_old.pkt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/packetdrill/conntrack_synack_reuse.pkt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/packetdrill/conntrack_synack_reuse.pkt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/rpath.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/rpath.sh</a> (renamed from tools/testing/selftests/netfilter/rpath.sh)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/sctp_collision.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/sctp_collision.c</a> (renamed from tools/testing/selftests/netfilter/sctp_collision.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/settings?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/settings</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/xt_string.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/netfilter/xt_string.sh</a> (renamed from tools/testing/selftests/netfilter/xt_string.sh)</td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/nl_netdev.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/nl_netdev.py</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/openvswitch/ovs-dpctl.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/openvswitch/ovs-dpctl.py</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/sample_map_ret0.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/sample_map_ret0.bpf.c</a> (renamed from tools/testing/selftests/bpf/progs/sample_map_ret0.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/sample_ret0.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/sample_ret0.bpf.c</a> (renamed from tools/testing/selftests/bpf/progs/sample_ret0.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/test_bridge_neigh_suppress.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/test_bridge_neigh_suppress.sh</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/udpgro.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro_bench.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/udpgro_bench.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro_frglist.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/udpgro_frglist.sh</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro_fwd.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/udpgro_fwd.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/veth.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/veth.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/xdp_dummy.bpf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/net/xdp_dummy.bpf.c</a> (renamed from tools/testing/selftests/net/xdp_dummy.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/bridge_brouter.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/bridge_brouter.sh</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/bridge_netfilter.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/bridge_netfilter.sh</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/config</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/conntrack_sctp_collision.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/conntrack_sctp_collision.sh</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/conntrack_tcp_unreplied.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/conntrack_tcp_unreplied.sh</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/ipvs.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/ipvs.sh</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/nf_nat_edemux.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/nf_nat_edemux.sh</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/nft_conntrack_helper.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/nft_conntrack_helper.sh</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/nft_fib.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/nft_fib.sh</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/nft_queue.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/nft_queue.sh</a></td><td class='right'>449</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/nft_synproxy.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/nft_synproxy.sh</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/nft_trans_stress.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/nft_trans_stress.sh</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/netfilter/settings?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/netfilter/settings</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/nolibc/nolibc-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/nolibc/nolibc-test.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/perf_events/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/perf_events/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/perf_events/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/perf_events/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/perf_events/watermark_signal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/perf_events/watermark_signal.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/pidfd/config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_fdinfo_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/pidfd/pidfd_fdinfo_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_open_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/pidfd/pidfd_open_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_poll_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/pidfd/pidfd_poll_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_setns_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/pidfd/pidfd_setns_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/pidfd/pidfd_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/power_supply/test_power_supply_properties.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/power_supply/test_power_supply_properties.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/bin/torture.sh?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/rcutorture/bin/torture.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE09?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/rcutorture/configs/rcu/TREE09</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/cat_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/cat_test.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/cmt_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/cmt_test.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/mba_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/mba_test.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/mbm_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/mbm_test.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/resctrl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/resctrl.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/resctrl_tests.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/resctrl_tests.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/resctrl/resctrl_val.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/resctrl/resctrl_val.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/riscv/hwprobe/cbo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/riscv/hwprobe/cbo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/riscv/hwprobe/hwprobe.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/riscv/hwprobe/hwprobe.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/sgx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/sgx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/sgx/sigstruct.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/sgx/sigstruct.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/sync/sync_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/sync/sync_test.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/syscall_user_dispatch/sud_test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/syscall_user_dispatch/sud_test.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/adjtick.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/adjtick.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/alarmtimer-suspend.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/alarmtimer-suspend.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/change_skew.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/change_skew.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/freq-step.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/freq-step.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/leap-a-day.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/leap-a-day.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/leapcrash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/leapcrash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/mqueue-lat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/mqueue-lat.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/posix_timers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/posix_timers.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/raw_skew.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/raw_skew.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/set-2038.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/set-2038.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/set-tai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/set-tai.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/set-timer-lat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/set-timer-lat.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/set-tz.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/set-tz.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/skew_consistency.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/skew_consistency.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/threadtest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/threadtest.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/timers/valid-adjtimex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/timers/valid-adjtimex.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/tty/tty_tstamp_update.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/tty/tty_tstamp_update.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/vDSO/vdso_config.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/vDSO/vdso_config.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/vDSO/vdso_test_getcpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/vDSO/vdso_test_getcpu.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/vDSO/vdso_test_gettimeofday.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/vDSO/vdso_test_gettimeofday.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/wireguard/qemu/arch/riscv32.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/wireguard/qemu/arch/riscv32.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/wireguard/qemu/arch/riscv64.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/wireguard/qemu/arch/riscv64.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/wireguard/qemu/kernel.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/wireguard/qemu/kernel.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/amx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/x86/amx.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/lam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/x86/lam.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/test_mremap_vdso.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/x86/test_mremap_vdso.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/test_vsyscall.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c&amp;id2=41147b006be2174b825a54b0620ecf4cc7ec5c84'>tools/testing/selftests/x86/test_vsyscall.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>7555 files changed, 295358 insertions, 164642 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/.mailmap b/.mailmap<br/>index f877262b0be9..df56e43cb57f 100644<br/>--- a/<a href='/cgit/linux.git/tree/.mailmap?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>.mailmap</a><br/>+++ b/<a href='/cgit/linux.git/tree/.mailmap?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>.mailmap</a></div><div class='hunk'>@@ -38,6 +38,16 @@ Alexei Starovoitov &lt;ast@kernel.org&gt; &lt;alexei.starovoitov@gmail.com&gt;</div><div class='ctx'> Alexei Starovoitov &lt;ast@kernel.org&gt; &lt;ast@fb.com&gt;</div><div class='ctx'> Alexei Starovoitov &lt;ast@kernel.org&gt; &lt;ast@plumgrid.com&gt;</div><div class='ctx'> Alexey Makhalov &lt;alexey.amakhalov@broadcom.com&gt; &lt;amakhalov@vmware.com&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;aelder@sgi.com&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;alex.elder@linaro.org&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;alex.elder@linary.org&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;elder@dreamhost.com&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;elder@dreawmhost.com&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;elder@ieee.org&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;elder@inktank.com&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;elder@linaro.org&gt;</div><div class='add'>+Alex Elder &lt;elder@kernel.org&gt; &lt;elder@newdream.net&gt;</div><div class='ctx'> Alex Hung &lt;alexhung@gmail.com&gt; &lt;alex.hung@canonical.com&gt;</div><div class='ctx'> Alex Shi &lt;alexs@kernel.org&gt; &lt;alex.shi@intel.com&gt;</div><div class='ctx'> Alex Shi &lt;alexs@kernel.org&gt; &lt;alex.shi@linaro.org&gt;</div><div class='hunk'>@@ -87,6 +97,11 @@ Baolin Wang &lt;baolin.wang@linux.alibaba.com&gt; &lt;baolin.wang@linaro.org&gt;</div><div class='ctx'> Baolin Wang &lt;baolin.wang@linux.alibaba.com&gt; &lt;baolin.wang@spreadtrum.com&gt;</div><div class='ctx'> Baolin Wang &lt;baolin.wang@linux.alibaba.com&gt; &lt;baolin.wang@unisoc.com&gt;</div><div class='ctx'> Baolin Wang &lt;baolin.wang@linux.alibaba.com&gt; &lt;baolin.wang7@gmail.com&gt;</div><div class='add'>+Barry Song &lt;baohua@kernel.org&gt; &lt;21cnbao@gmail.com&gt;</div><div class='add'>+Barry Song &lt;baohua@kernel.org&gt; &lt;v-songbaohua@oppo.com&gt;</div><div class='add'>+Barry Song &lt;baohua@kernel.org&gt; &lt;song.bao.hua@hisilicon.com&gt;</div><div class='add'>+Barry Song &lt;baohua@kernel.org&gt; &lt;Baohua.Song@csr.com&gt;</div><div class='add'>+Barry Song &lt;baohua@kernel.org&gt; &lt;barry.song@analog.com&gt;</div><div class='ctx'> Bart Van Assche &lt;bvanassche@acm.org&gt; &lt;bart.vanassche@sandisk.com&gt;</div><div class='ctx'> Bart Van Assche &lt;bvanassche@acm.org&gt; &lt;bart.vanassche@wdc.com&gt;</div><div class='ctx'> Bartosz Golaszewski &lt;brgl@bgdev.pl&gt; &lt;bgolaszewski@baylibre.com&gt;</div><div class='hunk'>@@ -98,6 +113,8 @@ Ben Widawsky &lt;bwidawsk@kernel.org&gt; &lt;ben@bwidawsk.net&gt;</div><div class='ctx'> Ben Widawsky &lt;bwidawsk@kernel.org&gt; &lt;ben.widawsky@intel.com&gt;</div><div class='ctx'> Ben Widawsky &lt;bwidawsk@kernel.org&gt; &lt;benjamin.widawsky@intel.com&gt;</div><div class='ctx'> Benjamin Poirier &lt;benjamin.poirier@gmail.com&gt; &lt;bpoirier@suse.de&gt;</div><div class='add'>+Benjamin Tissoires &lt;bentiss@kernel.org&gt; &lt;benjamin.tissoires@gmail.com&gt;</div><div class='add'>+Benjamin Tissoires &lt;bentiss@kernel.org&gt; &lt;benjamin.tissoires@redhat.com&gt;</div><div class='ctx'> Bjorn Andersson &lt;andersson@kernel.org&gt; &lt;bjorn@kryo.se&gt;</div><div class='ctx'> Bjorn Andersson &lt;andersson@kernel.org&gt; &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> Bjorn Andersson &lt;andersson@kernel.org&gt; &lt;bjorn.andersson@sonymobile.com&gt;</div><div class='hunk'>@@ -116,6 +133,7 @@ Bryan Tan &lt;bryan-bt.tan@broadcom.com&gt; &lt;bryantan@vmware.com&gt;</div><div class='ctx'> Cai Huoqing &lt;cai.huoqing@linux.dev&gt; &lt;caihuoqing@baidu.com&gt;</div><div class='ctx'> Can Guo &lt;quic_cang@quicinc.com&gt; &lt;cang@codeaurora.org&gt;</div><div class='ctx'> Carl Huang &lt;quic_cjhuang@quicinc.com&gt; &lt;cjhuang@codeaurora.org&gt;</div><div class='add'>+Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt; &lt;carlos.bilbao@amd.com&gt;</div><div class='ctx'> Changbin Du &lt;changbin.du@intel.com&gt; &lt;changbin.du@gmail.com&gt;</div><div class='ctx'> Changbin Du &lt;changbin.du@intel.com&gt; &lt;changbin.du@intel.com&gt;</div><div class='ctx'> Chao Yu &lt;chao@kernel.org&gt; &lt;chao2.yu@samsung.com&gt;</div><div class='hunk'>@@ -292,6 +310,7 @@ Johan Hovold &lt;johan@kernel.org&gt; &lt;jhovold@gmail.com&gt;</div><div class='ctx'> Johan Hovold &lt;johan@kernel.org&gt; &lt;johan@hovoldconsulting.com&gt;</div><div class='ctx'> John Crispin &lt;john@phrozen.org&gt; &lt;blogic@openwrt.org&gt;</div><div class='ctx'> John Fastabend &lt;john.fastabend@gmail.com&gt; &lt;john.r.fastabend@intel.com&gt;</div><div class='add'>+John Garry &lt;john.g.garry@oracle.com&gt; &lt;john.garry@huawei.com&gt;</div><div class='ctx'> John Keeping &lt;john@keeping.me.uk&gt; &lt;john@metanate.com&gt;</div><div class='ctx'> John Moon &lt;john@jmoon.dev&gt; &lt;quic_johmoo@quicinc.com&gt;</div><div class='ctx'> John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt;</div><div class='hunk'>@@ -449,7 +468,8 @@ Nadia Yvette Chambers &lt;nyc@holomorphy.com&gt; William Lee Irwin III &lt;wli@holomorphy</div><div class='ctx'> Naoya Horiguchi &lt;nao.horiguchi@gmail.com&gt; &lt;n-horiguchi@ah.jp.nec.com&gt;</div><div class='ctx'> Naoya Horiguchi &lt;nao.horiguchi@gmail.com&gt; &lt;naoya.horiguchi@nec.com&gt;</div><div class='ctx'> Nathan Chancellor &lt;nathan@kernel.org&gt; &lt;natechancellor@gmail.com&gt;</div><div class='del'>-Neeraj Upadhyay &lt;quic_neeraju@quicinc.com&gt; &lt;neeraju@codeaurora.org&gt;</div><div class='add'>+Neeraj Upadhyay &lt;neeraj.upadhyay@kernel.org&gt; &lt;quic_neeraju@quicinc.com&gt;</div><div class='add'>+Neeraj Upadhyay &lt;neeraj.upadhyay@kernel.org&gt; &lt;neeraju@codeaurora.org&gt;</div><div class='ctx'> Neil Armstrong &lt;neil.armstrong@linaro.org&gt; &lt;narmstrong@baylibre.com&gt;</div><div class='ctx'> Nguyen Anh Quynh &lt;aquynh@gmail.com&gt;</div><div class='ctx'> Nicholas Piggin &lt;npiggin@gmail.com&gt; &lt;npiggen@suse.de&gt;</div><div class='hunk'>@@ -500,6 +520,7 @@ Praveen BP &lt;praveenbp@ti.com&gt;</div><div class='ctx'> Pradeep Kumar Chitrapu &lt;quic_pradeepc@quicinc.com&gt; &lt;pradeepc@codeaurora.org&gt;</div><div class='ctx'> Prasad Sodagudi &lt;quic_psodagud@quicinc.com&gt; &lt;psodagud@codeaurora.org&gt;</div><div class='ctx'> Punit Agrawal &lt;punitagrawal@gmail.com&gt; &lt;punit.agrawal@arm.com&gt;</div><div class='add'>+Puranjay Mohan &lt;puranjay@kernel.org&gt; &lt;puranjay12@gmail.com&gt;</div><div class='ctx'> Qais Yousef &lt;qyousef@layalina.io&gt; &lt;qais.yousef@imgtec.com&gt;</div><div class='ctx'> Qais Yousef &lt;qyousef@layalina.io&gt; &lt;qais.yousef@arm.com&gt;</div><div class='ctx'> Quentin Monnet &lt;qmo@kernel.org&gt; &lt;quentin.monnet@netronome.com&gt;</div><div class='head'>diff --git a/Documentation/ABI/removed/sysfs-firmware-efi-vars b/Documentation/ABI/removed/sysfs-firmware-efi-vars<br/>new file mode 100644<br/>index 000000000000..8d97368b149b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/removed/sysfs-firmware-efi-vars?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/ABI/removed/sysfs-firmware-efi-vars</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+What:		/sys/firmware/efi/vars</div><div class='add'>+Date:		April 2004, removed March 2023</div><div class='add'>+Description:</div><div class='add'>+		This directory exposed interfaces for interacting with</div><div class='add'>+		EFI variables.  For more information on EFI variables,</div><div class='add'>+		see 'Variable Services' in the UEFI specification</div><div class='add'>+		(section 7.2 in specification version 2.3 Errata D).</div><div class='add'>+</div><div class='add'>+		The 'efivars' sysfs interface was removed in March of 2023,</div><div class='add'>+		after being considered deprecated no later than September</div><div class='add'>+		of 2020. Its functionality has been replaced by the</div><div class='add'>+		'efivarfs' filesystem.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block<br/>index 1fe9a553c37b..831f19a32e08 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-block?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/ABI/stable/sysfs-block</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-block?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/ABI/stable/sysfs-block</a></div><div class='hunk'>@@ -101,6 +101,16 @@ Description:</div><div class='ctx'> 		devices that support receiving integrity metadata.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+What:		/sys/block/&lt;disk&gt;/partscan</div><div class='add'>+Date:		May 2024</div><div class='add'>+Contact:	Christoph Hellwig &lt;hch@lst.de&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/block/&lt;disk&gt;/partscan files reports if partition</div><div class='add'>+		scanning is enabled for the disk.  It returns "1" if partition</div><div class='add'>+		scanning is enabled, or "0" if not.  The value type is a 32-bit</div><div class='add'>+		unsigned integer, but only "0" and "1" are valid values.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/&lt;partition&gt;/alignment_offset</div><div class='ctx'> Date:		April 2009</div><div class='ctx'> Contact:	Martin K. Petersen &lt;martin.petersen@oracle.com&gt;</div><div class='hunk'>@@ -584,18 +594,6 @@ Description:</div><div class='ctx'> 		the data.  If no such restriction exists, this file will contain</div><div class='ctx'> 		'0'.  This file is writable for testing purposes.</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-What:		/sys/block/&lt;disk&gt;/queue/throttle_sample_time</div><div class='del'>-Date:		March 2017</div><div class='del'>-Contact:	linux-block@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		[RW] This is the time window that blk-throttle samples data, in</div><div class='del'>-		millisecond.  blk-throttle makes decision based on the</div><div class='del'>-		samplings. Lower time means cgroups have more smooth throughput,</div><div class='del'>-		but higher CPU overhead. This exists only when</div><div class='del'>-		CONFIG_BLK_DEV_THROTTLING_LOW is enabled.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/queue/virt_boundary_mask</div><div class='ctx'> Date:		April 2021</div><div class='ctx'> Contact:	linux-block@vger.kernel.org</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-firmware-efi-vars b/Documentation/ABI/stable/sysfs-firmware-efi-vars<br/>deleted file mode 100644<br/>index 46ccd233e359..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-firmware-efi-vars?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/ABI/stable/sysfs-firmware-efi-vars</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,79 +0,0 @@</div><div class='del'>-What:		/sys/firmware/efi/vars</div><div class='del'>-Date:		April 2004</div><div class='del'>-Contact:	Matt Domsch &lt;Matt_Domsch@dell.com&gt;</div><div class='del'>-Description:</div><div class='del'>-		This directory exposes interfaces for interactive with</div><div class='del'>-		EFI variables.  For more information on EFI variables,</div><div class='del'>-		see 'Variable Services' in the UEFI specification</div><div class='del'>-		(section 7.2 in specification version 2.3 Errata D).</div><div class='del'>-</div><div class='del'>-		In summary, EFI variables are named, and are classified</div><div class='del'>-		into separate namespaces through the use of a vendor</div><div class='del'>-		GUID.  They also have an arbitrary binary value</div><div class='del'>-		associated with them.</div><div class='del'>-</div><div class='del'>-		The efivars module enumerates these variables and</div><div class='del'>-		creates a separate directory for each one found.  Each</div><div class='del'>-		directory has a name of the form "&lt;key&gt;-&lt;vendor guid&gt;"</div><div class='del'>-		and contains the following files:</div><div class='del'>-</div><div class='del'>-		=============== ========================================</div><div class='del'>-		attributes:	A read-only text file enumerating the</div><div class='del'>-				EFI variable flags.  Potential values</div><div class='del'>-				include:</div><div class='del'>-</div><div class='del'>-				EFI_VARIABLE_NON_VOLATILE</div><div class='del'>-				EFI_VARIABLE_BOOTSERVICE_ACCESS</div><div class='del'>-				EFI_VARIABLE_RUNTIME_ACCESS</div><div class='del'>-				EFI_VARIABLE_HARDWARE_ERROR_RECORD</div><div class='del'>-				EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS</div><div class='del'>-</div><div class='del'>-				See the EFI documentation for an</div><div class='del'>-				explanation of each of these variables.</div><div class='del'>-</div><div class='del'>-		data:		A read-only binary file that can be read</div><div class='del'>-				to attain the value of the EFI variable</div><div class='del'>-</div><div class='del'>-		guid:		The vendor GUID of the variable.  This</div><div class='del'>-				should always match the GUID in the</div><div class='del'>-				variable's name.</div><div class='del'>-</div><div class='del'>-		raw_var:	A binary file that can be read to obtain</div><div class='del'>-				a structure that contains everything</div><div class='del'>-				there is to know about the variable.</div><div class='del'>-				For structure definition see "struct</div><div class='del'>-				efi_variable" in the kernel sources.</div><div class='del'>-</div><div class='del'>-				This file can also be written to in</div><div class='del'>-				order to update the value of a variable.</div><div class='del'>-				For this to work however, all fields of</div><div class='del'>-				the "struct efi_variable" passed must</div><div class='del'>-				match byte for byte with the structure</div><div class='del'>-				read out of the file, save for the value</div><div class='del'>-				portion.</div><div class='del'>-</div><div class='del'>-				**Note** the efi_variable structure</div><div class='del'>-				read/written with this file contains a</div><div class='del'>-				'long' type that may change widths</div><div class='del'>-				depending on your underlying</div><div class='del'>-				architecture.</div><div class='del'>-</div><div class='del'>-		size:		As ASCII representation of the size of</div><div class='del'>-				the variable's value.</div><div class='del'>-		=============== ========================================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		In addition, two other magic binary files are provided</div><div class='del'>-		in the top-level directory and are used for adding and</div><div class='del'>-		removing variables:</div><div class='del'>-</div><div class='del'>-		=============== ========================================</div><div class='del'>-		new_var:	Takes a "struct efi_variable" and</div><div class='del'>-				instructs the EFI firmware to create a</div><div class='del'>-				new variable.</div><div class='del'>-</div><div class='del'>-		del_var:	Takes a "struct efi_variable" and</div><div class='del'>-				instructs the EFI firmware to remove any</div><div class='del'>-				variable that has a matching vendor GUID</div><div class='del'>-				and variable key name.</div><div class='del'>-		=============== ========================================</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon<br/>index 023fd82de3f7..d792a56f59ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon</a></div><div class='hunk'>@@ -10,7 +10,7 @@ Description:	RW. Card reactive sustained  (PL1) power limit in microwatts.</div><div class='ctx'> 		power limit is disabled, writing 0 disables the</div><div class='ctx'> 		limit. Writing values &gt; 0 and &lt;= TDP will enable the power limit.</div><div class='ctx'> </div><div class='del'>-		Only supported for particular Intel xe graphics platforms.</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power1_rated_max</div><div class='ctx'> Date:		September 2023</div><div class='hunk'>@@ -18,53 +18,93 @@ KernelVersion:	6.5</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='ctx'> Description:	RO. Card default power limit (default TDP setting).</div><div class='ctx'> </div><div class='del'>-		Only supported for particular Intel xe graphics platforms.</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power1_crit</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/energy1_input</div><div class='ctx'> Date:		September 2023</div><div class='ctx'> KernelVersion:	6.5</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='del'>-Description:	RW. Card reactive critical (I1) power limit in microwatts.</div><div class='add'>+Description:	RO. Card energy input of device in microjoules.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power1_max_interval</div><div class='add'>+Date:		October 2023</div><div class='add'>+KernelVersion:	6.6</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RW. Card sustained power limit interval (Tau in PL1/Tau) in</div><div class='add'>+		milliseconds over which sustained power is averaged.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power2_max</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RW. Package reactive sustained  (PL1) power limit in microwatts.</div><div class='add'>+</div><div class='add'>+		The power controller will throttle the operating frequency</div><div class='add'>+		if the power averaged over a window (typically seconds)</div><div class='add'>+		exceeds this limit. A read value of 0 means that the PL1</div><div class='add'>+		power limit is disabled, writing 0 disables the</div><div class='add'>+		limit. Writing values &gt; 0 and &lt;= TDP will enable the power limit.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power2_rated_max</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RO. Package default power limit (default TDP setting).</div><div class='ctx'> </div><div class='del'>-		Card reactive critical (I1) power limit in microwatts is exposed</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power2_crit</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RW. Package reactive critical (I1) power limit in microwatts.</div><div class='add'>+</div><div class='add'>+		Package reactive critical (I1) power limit in microwatts is exposed</div><div class='ctx'> 		for client products. The power controller will throttle the</div><div class='ctx'> 		operating frequency if the power averaged over a window exceeds</div><div class='ctx'> 		this limit.</div><div class='ctx'> </div><div class='del'>-		Only supported for particular Intel xe graphics platforms.</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/curr1_crit</div><div class='del'>-Date:		September 2023</div><div class='del'>-KernelVersion:	6.5</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/curr2_crit</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='del'>-Description:	RW. Card reactive critical (I1) power limit in milliamperes.</div><div class='add'>+Description:	RW. Package reactive critical (I1) power limit in milliamperes.</div><div class='ctx'> </div><div class='del'>-		Card reactive critical (I1) power limit in milliamperes is</div><div class='add'>+		Package reactive critical (I1) power limit in milliamperes is</div><div class='ctx'> 		exposed for server products. The power controller will throttle</div><div class='ctx'> 		the operating frequency if the power averaged over a window</div><div class='ctx'> 		exceeds this limit.</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/in0_input</div><div class='del'>-Date:		September 2023</div><div class='del'>-KernelVersion:	6.5</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/energy2_input</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='del'>-Description:	RO. Current Voltage in millivolt.</div><div class='add'>+Description:	RO. Package energy input of device in microjoules.</div><div class='ctx'> </div><div class='del'>-		Only supported for particular Intel xe graphics platforms.</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/energy1_input</div><div class='del'>-Date:		September 2023</div><div class='del'>-KernelVersion:	6.5</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power2_max_interval</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='del'>-Description:	RO. Energy input of device in microjoules.</div><div class='add'>+Description:	RW. Package sustained power limit interval (Tau in PL1/Tau) in</div><div class='add'>+		milliseconds over which sustained power is averaged.</div><div class='ctx'> </div><div class='del'>-		Only supported for particular Intel xe graphics platforms.</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/power1_max_interval</div><div class='del'>-Date:		October 2023</div><div class='del'>-KernelVersion:	6.6</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/in1_input</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='del'>-Description:	RW. Sustained power limit interval (Tau in PL1/Tau) in</div><div class='del'>-		milliseconds over which sustained power is averaged.</div><div class='add'>+Description:	RO. Package current voltage in millivolt.</div><div class='ctx'> </div><div class='del'>-		Only supported for particular Intel xe graphics platforms.</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-panfrost-profiling b/Documentation/ABI/testing/sysfs-driver-panfrost-profiling<br/>new file mode 100644<br/>index 000000000000..7597c420e54b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-panfrost-profiling?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/ABI/testing/sysfs-driver-panfrost-profiling</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+What:		/sys/bus/platform/drivers/panfrost/.../profiling</div><div class='add'>+Date:		February 2024</div><div class='add'>+KernelVersion:	6.8.0</div><div class='add'>+Contact:	Adrian Larumbe &lt;adrian.larumbe@collabora.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Get/set drm fdinfo's engine and cycles profiling status.</div><div class='add'>+		Valid values are:</div><div class='add'>+		0: Don't enable fdinfo job profiling sources.</div><div class='add'>+		1: Enable fdinfo job profiling sources, this enables both the GPU's</div><div class='add'>+		timestamp and cycle counter registers.</div><div class='head'>diff --git a/Documentation/Makefile b/Documentation/Makefile<br/>index b68f8c816897..a961692baa12 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/Makefile</a></div><div class='hunk'>@@ -28,6 +28,10 @@ BUILDDIR      = $(obj)/output</div><div class='ctx'> PDFLATEX      = xelatex</div><div class='ctx'> LATEXOPTS     = -interaction=batchmode -no-shell-escape</div><div class='ctx'> </div><div class='add'>+# For denylisting "variable font" files</div><div class='add'>+# Can be overridden by setting as an env variable</div><div class='add'>+FONTS_CONF_DENY_VF ?= $(HOME)/deny-vf</div><div class='add'>+</div><div class='ctx'> ifeq ($(findstring 1, $(KBUILD_VERBOSE)),)</div><div class='ctx'> SPHINXOPTS    += "-q"</div><div class='ctx'> endif</div><div class='hunk'>@@ -151,10 +155,11 @@ pdfdocs:</div><div class='ctx'> </div><div class='ctx'> else # HAVE_PDFLATEX</div><div class='ctx'> </div><div class='add'>+pdfdocs: DENY_VF = XDG_CONFIG_HOME=$(FONTS_CONF_DENY_VF)</div><div class='ctx'> pdfdocs: latexdocs</div><div class='ctx'> 	@$(srctree)/scripts/sphinx-pre-install --version-check</div><div class='ctx'> 	$(foreach var,$(SPHINXDIRS), \</div><div class='del'>-	   $(MAKE) PDFLATEX="$(PDFLATEX)" LATEXOPTS="$(LATEXOPTS)" -C $(BUILDDIR)/$(var)/latex || exit; \</div><div class='add'>+	   $(MAKE) PDFLATEX="$(PDFLATEX)" LATEXOPTS="$(LATEXOPTS)" $(DENY_VF) -C $(BUILDDIR)/$(var)/latex || sh $(srctree)/scripts/check-variable-fonts.sh || exit; \</div><div class='ctx'> 	   mkdir -p $(BUILDDIR)/$(var)/pdf; \</div><div class='ctx'> 	   mv $(subst .tex,.pdf,$(wildcard $(BUILDDIR)/$(var)/latex/*.tex)) $(BUILDDIR)/$(var)/pdf/; \</div><div class='ctx'> 	)</div><div class='head'>diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst<br/>index 872ac665223f..94838c65c7d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/RCU/whatisRCU.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/RCU/whatisRCU.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/RCU/whatisRCU.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/RCU/whatisRCU.rst</a></div><div class='hunk'>@@ -427,7 +427,7 @@ their assorted primitives.</div><div class='ctx'> </div><div class='ctx'> This section shows a simple use of the core RCU API to protect a</div><div class='ctx'> global pointer to a dynamically allocated structure.  More-typical</div><div class='del'>-uses of RCU may be found in listRCU.rst, arrayRCU.rst, and NMI-RCU.rst.</div><div class='add'>+uses of RCU may be found in listRCU.rst and NMI-RCU.rst.</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	struct foo {</div><div class='hunk'>@@ -510,8 +510,8 @@ So, to sum up:</div><div class='ctx'> 	data item.</div><div class='ctx'> </div><div class='ctx'> See checklist.rst for additional rules to follow when using RCU.</div><div class='del'>-And again, more-typical uses of RCU may be found in listRCU.rst,</div><div class='del'>-arrayRCU.rst, and NMI-RCU.rst.</div><div class='add'>+And again, more-typical uses of RCU may be found in listRCU.rst</div><div class='add'>+and NMI-RCU.rst.</div><div class='ctx'> </div><div class='ctx'> .. _4_whatisRCU:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst<br/>index 17e6e9565156..eaf9e66e472a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/cgroup-v2.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/cgroup-v2.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/cgroup-v2.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/cgroup-v2.rst</a></div><div class='hunk'>@@ -1572,6 +1572,15 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 	  pglazyfreed (npn)</div><div class='ctx'> 		Amount of reclaimed lazyfree pages</div><div class='ctx'> </div><div class='add'>+	  zswpin</div><div class='add'>+		Number of pages moved in to memory from zswap.</div><div class='add'>+</div><div class='add'>+	  zswpout</div><div class='add'>+		Number of pages moved out of memory to zswap.</div><div class='add'>+</div><div class='add'>+	  zswpwb</div><div class='add'>+		Number of pages written from zswap to swap.</div><div class='add'>+</div><div class='ctx'> 	  thp_fault_alloc (npn)</div><div class='ctx'> 		Number of transparent hugepages which were allocated to satisfy</div><div class='ctx'> 		a page fault. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE</div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/dm-crypt.rst b/Documentation/admin-guide/device-mapper/dm-crypt.rst<br/>index aa2d04d95df6..41f5f57f00eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/device-mapper/dm-crypt.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/device-mapper/dm-crypt.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/device-mapper/dm-crypt.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/device-mapper/dm-crypt.rst</a></div><div class='hunk'>@@ -113,6 +113,11 @@ same_cpu_crypt</div><div class='ctx'>     The default is to use an unbound workqueue so that encryption work</div><div class='ctx'>     is automatically balanced between available CPUs.</div><div class='ctx'> </div><div class='add'>+high_priority</div><div class='add'>+    Set dm-crypt workqueues and the writer thread to high priority. This</div><div class='add'>+    improves throughput and latency of dm-crypt while degrading general</div><div class='add'>+    responsiveness of the system.</div><div class='add'>+</div><div class='ctx'> submit_from_crypt_cpus</div><div class='ctx'>     Disable offloading writes to a separate thread after encryption.</div><div class='ctx'>     There are some situations where offloading write bios from the</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/core-scheduling.rst b/Documentation/admin-guide/hw-vuln/core-scheduling.rst<br/>index cf1eeefdfc32..a92e10ec402e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/core-scheduling.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/hw-vuln/core-scheduling.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/core-scheduling.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/hw-vuln/core-scheduling.rst</a></div><div class='hunk'>@@ -67,8 +67,8 @@ arg4:</div><div class='ctx'>     will be performed for all tasks in the task group of ``pid``.</div><div class='ctx'> </div><div class='ctx'> arg5:</div><div class='del'>-    userspace pointer to an unsigned long for storing the cookie returned by</div><div class='del'>-    ``PR_SCHED_CORE_GET`` command. Should be 0 for all other commands.</div><div class='add'>+    userspace pointer to an unsigned long long for storing the cookie returned</div><div class='add'>+    by ``PR_SCHED_CORE_GET`` command. Should be 0 for all other commands.</div><div class='ctx'> </div><div class='ctx'> In order for a process to push a cookie to, or pull a cookie from a process, it</div><div class='ctx'> is required to have the ptrace access mode: `PTRACE_MODE_READ_REALCREDS` to the</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/srso.rst b/Documentation/admin-guide/hw-vuln/srso.rst<br/>index e715bfc09879..4bd3ce3ba171 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/srso.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/hw-vuln/srso.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/srso.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/hw-vuln/srso.rst</a></div><div class='hunk'>@@ -135,7 +135,7 @@ and does not want to suffer the performance impact, one can always</div><div class='ctx'> disable the mitigation with spec_rstack_overflow=off.</div><div class='ctx'> </div><div class='ctx'> Similarly, 'Mitigation: IBPB' is another full mitigation type employing</div><div class='del'>-an indrect branch prediction barrier after having applied the required</div><div class='add'>+an indirect branch prediction barrier after having applied the required</div><div class='ctx'> microcode patch for one's system. This mitigation comes also at</div><div class='ctx'> a performance cost.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt<br/>index 902ecd92a29f..45d95614ec44 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/kernel-parameters.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/kernel-parameters.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/kernel-parameters.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/kernel-parameters.txt</a></div><div class='hunk'>@@ -431,6 +431,9 @@</div><div class='ctx'> 	arcrimi=	[HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards</div><div class='ctx'> 			Format: &lt;io&gt;,&lt;irq&gt;,&lt;nodeID&gt;</div><div class='ctx'> </div><div class='add'>+	arm64.no32bit_el0 [ARM64] Unconditionally disable the execution of</div><div class='add'>+			32 bit applications.</div><div class='add'>+</div><div class='ctx'> 	arm64.nobti	[ARM64] Unconditionally disable Branch Target</div><div class='ctx'> 			Identification support</div><div class='ctx'> </div><div class='hunk'>@@ -2251,6 +2254,8 @@</div><div class='ctx'> 			no_x2apic_optout</div><div class='ctx'> 				BIOS x2APIC opt-out request will be ignored</div><div class='ctx'> 			nopost	disable Interrupt Posting</div><div class='add'>+			posted_msi</div><div class='add'>+				enable MSIs delivered as posted interrupts</div><div class='ctx'> </div><div class='ctx'> 	iomem=		Disable strict checking of access to MMIO memory</div><div class='ctx'> 		strict	regions from userspace.</div><div class='hunk'>@@ -3423,6 +3428,9 @@</div><div class='ctx'> 			arch-independent options, each of which is an</div><div class='ctx'> 			aggregation of existing arch-specific options.</div><div class='ctx'> </div><div class='add'>+			Note, "mitigations" is supported if and only if the</div><div class='add'>+			kernel was built with CPU_MITIGATIONS=y.</div><div class='add'>+</div><div class='ctx'> 			off</div><div class='ctx'> 				Disable all optional CPU mitigations.  This</div><div class='ctx'> 				improves system performance, but it may also</div><div class='hunk'>@@ -4170,13 +4178,11 @@</div><div class='ctx'> </div><div class='ctx'> 	page_alloc.shuffle=</div><div class='ctx'> 			[KNL] Boolean flag to control whether the page allocator</div><div class='del'>-			should randomize its free lists. The randomization may</div><div class='del'>-			be automatically enabled if the kernel detects it is</div><div class='del'>-			running on a platform with a direct-mapped memory-side</div><div class='del'>-			cache, and this parameter can be used to</div><div class='del'>-			override/disable that behavior. The state of the flag</div><div class='del'>-			can be read from sysfs at:</div><div class='add'>+			should randomize its free lists. This parameter can be</div><div class='add'>+			used to enable/disable page randomization. The state of</div><div class='add'>+			the flag can be read from sysfs at:</div><div class='ctx'> 			/sys/module/page_alloc/parameters/shuffle.</div><div class='add'>+			This parameter is only available if CONFIG_SHUFFLE_PAGE_ALLOCATOR=y.</div><div class='ctx'> </div><div class='ctx'> 	page_owner=	[KNL,EARLY] Boot-time page_owner enabling option.</div><div class='ctx'> 			Storage of the information about who allocated</div><div class='hunk'>@@ -4591,9 +4597,10 @@</div><div class='ctx'> 		norid		[S390] ignore the RID field and force use of</div><div class='ctx'> 				one PCI domain per PCI function</div><div class='ctx'> </div><div class='del'>-	pcie_aspm=	[PCIE] Forcibly enable or disable PCIe Active State Power</div><div class='add'>+	pcie_aspm=	[PCIE] Forcibly enable or ignore PCIe Active State Power</div><div class='ctx'> 			Management.</div><div class='del'>-		off	Disable ASPM.</div><div class='add'>+		off	Don't touch ASPM configuration at all.  Leave any</div><div class='add'>+			configuration done by firmware unchanged.</div><div class='ctx'> 		force	Enable ASPM even on devices that claim not to support it.</div><div class='ctx'> 			WARNING: Forcing ASPM on may cause system lockups.</div><div class='ctx'> </div><div class='hunk'>@@ -4781,7 +4788,9 @@</div><div class='ctx'> </div><div class='ctx'> 	prot_virt=	[S390] enable hosting protected virtual machines</div><div class='ctx'> 			isolated from the hypervisor (if hardware supports</div><div class='del'>-			that).</div><div class='add'>+			that). If enabled, the default kernel base address</div><div class='add'>+			might be overridden even when Kernel Address Space</div><div class='add'>+			Layout Randomization is disabled.</div><div class='ctx'> 			Format: &lt;bool&gt;</div><div class='ctx'> </div><div class='ctx'> 	psi=		[KNL] Enable or disable pressure stall information</div><div class='hunk'>@@ -5092,6 +5101,20 @@</div><div class='ctx'> 			delay, memory pressure or callback list growing too</div><div class='ctx'> 			big.</div><div class='ctx'> </div><div class='add'>+	rcutree.rcu_normal_wake_from_gp= [KNL]</div><div class='add'>+			Reduces a latency of synchronize_rcu() call. This approach</div><div class='add'>+			maintains its own track of synchronize_rcu() callers, so it</div><div class='add'>+			does not interact with regular callbacks because it does not</div><div class='add'>+			use a call_rcu[_hurry]() path. Please note, this is for a</div><div class='add'>+			normal grace period.</div><div class='add'>+</div><div class='add'>+			How to enable it:</div><div class='add'>+</div><div class='add'>+			echo 1 &gt; /sys/module/rcutree/parameters/rcu_normal_wake_from_gp</div><div class='add'>+			or pass a boot parameter "rcutree.rcu_normal_wake_from_gp=1"</div><div class='add'>+</div><div class='add'>+			Default is 0.</div><div class='add'>+</div><div class='ctx'> 	rcuscale.gp_async= [KNL]</div><div class='ctx'> 			Measure performance of asynchronous</div><div class='ctx'> 			grace-period primitives such as call_rcu().</div><div class='hunk'>@@ -5808,6 +5831,7 @@</div><div class='ctx'> 			but is useful for debugging and performance tuning.</div><div class='ctx'> </div><div class='ctx'> 	sched_thermal_decay_shift=</div><div class='add'>+			[Deprecated]</div><div class='ctx'> 			[KNL, SMP] Set a decay shift for scheduler thermal</div><div class='ctx'> 			pressure signal. Thermal pressure signal follows the</div><div class='ctx'> 			default decay period of other scheduler pelt</div><div class='hunk'>@@ -6745,6 +6769,7 @@</div><div class='ctx'> 			- "tpm"</div><div class='ctx'> 			- "tee"</div><div class='ctx'> 			- "caam"</div><div class='add'>+			- "dcp"</div><div class='ctx'> 			If not specified then it defaults to iterating through</div><div class='ctx'> 			the trust source list starting with TPM and assigns the</div><div class='ctx'> 			first trust source as a backend which is initialized</div><div class='hunk'>@@ -6760,6 +6785,18 @@</div><div class='ctx'> 			If not specified, "default" is used. In this case,</div><div class='ctx'> 			the RNG's choice is left to each individual trust source.</div><div class='ctx'> </div><div class='add'>+	trusted.dcp_use_otp_key</div><div class='add'>+			This is intended to be used in combination with</div><div class='add'>+			trusted.source=dcp and will select the DCP OTP key</div><div class='add'>+			instead of the DCP UNIQUE key blob encryption.</div><div class='add'>+</div><div class='add'>+	trusted.dcp_skip_zk_test</div><div class='add'>+			This is intended to be used in combination with</div><div class='add'>+			trusted.source=dcp and will disable the check if the</div><div class='add'>+			blob key is all zeros. This is helpful for situations where</div><div class='add'>+			having this key zero'ed is acceptable. E.g. in testing</div><div class='add'>+			scenarios.</div><div class='add'>+</div><div class='ctx'> 	tsc=		Disable clocksource stability checks for TSC.</div><div class='ctx'> 			Format: &lt;string&gt;</div><div class='ctx'> 			[x86] reliable: mark tsc clocksource as reliable, this</div><div class='hunk'>@@ -7320,7 +7357,7 @@</div><div class='ctx'> 			This can be changed after boot by writing to the</div><div class='ctx'> 			matching /sys/module/workqueue/parameters file. All</div><div class='ctx'> 			workqueues with the "default" affinity scope will be</div><div class='del'>-			updated accordignly.</div><div class='add'>+			updated accordingly.</div><div class='ctx'> </div><div class='ctx'> 	workqueue.debug_force_rr_cpu</div><div class='ctx'> 			Workqueue used to implicitly guarantee that work</div><div class='head'>diff --git a/Documentation/admin-guide/mm/ksm.rst b/Documentation/admin-guide/mm/ksm.rst<br/>index a639cac12477..ad8e7a41f3b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/mm/ksm.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/mm/ksm.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/mm/ksm.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/mm/ksm.rst</a></div><div class='hunk'>@@ -308,7 +308,7 @@ limited by the ``advisor_max_cpu`` parameter. In addition there is also the</div><div class='ctx'> ``advisor_target_scan_time`` parameter. This parameter sets the target time to</div><div class='ctx'> scan all the KSM candidate pages. The parameter ``advisor_target_scan_time``</div><div class='ctx'> decides how aggressive the scan time advisor scans candidate pages. Lower</div><div class='del'>-values make the scan time advisor to scan more aggresively. This is the most</div><div class='add'>+values make the scan time advisor to scan more aggressively. This is the most</div><div class='ctx'> important parameter for the configuration of the scan time advisor.</div><div class='ctx'> </div><div class='ctx'> The initial value and the maximum value can be changed with</div><div class='head'>diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst<br/>index e0174d20809a..5cc248d18c63 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/hisi-pmu.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/hisi-pmu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/hisi-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/perf/hisi-pmu.rst</a></div><div class='hunk'>@@ -20,7 +20,6 @@ interrupt, and the PMU driver shall register perf PMU drivers like L3C,</div><div class='ctx'> HHA and DDRC etc. The available events and configuration options shall</div><div class='ctx'> be described in the sysfs, see:</div><div class='ctx'> </div><div class='del'>-/sys/devices/hisi_sccl{X}_&lt;l3c{Y}/hha{Y}/ddrc{Y}&gt;/, or</div><div class='ctx'> /sys/bus/event_source/devices/hisi_sccl{X}_&lt;l3c{Y}/hha{Y}/ddrc{Y}&gt;.</div><div class='ctx'> The "perf list" command shall list the available events from sysfs.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/perf/hns3-pmu.rst b/Documentation/admin-guide/perf/hns3-pmu.rst<br/>index 75a40846d47f..1195e570f2d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/hns3-pmu.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/hns3-pmu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/hns3-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/perf/hns3-pmu.rst</a></div><div class='hunk'>@@ -16,7 +16,7 @@ HNS3 PMU driver</div><div class='ctx'> </div><div class='ctx'> The HNS3 PMU driver registers a perf PMU with the name of its sicl id.::</div><div class='ctx'> </div><div class='del'>-  /sys/devices/hns3_pmu_sicl_&lt;sicl_id&gt;</div><div class='add'>+  /sys/bus/event_source/devices/hns3_pmu_sicl_&lt;sicl_id&gt;</div><div class='ctx'> </div><div class='ctx'> PMU driver provides description of available events, filter modes, format,</div><div class='ctx'> identifier and cpumask in sysfs.</div><div class='hunk'>@@ -40,9 +40,9 @@ device.</div><div class='ctx'> </div><div class='ctx'> Example usage of checking event code and subevent code::</div><div class='ctx'> </div><div class='del'>-  $# cat /sys/devices/hns3_pmu_sicl_0/events/dly_tx_normal_to_mac_time</div><div class='add'>+  $# cat /sys/bus/event_source/devices/hns3_pmu_sicl_0/events/dly_tx_normal_to_mac_time</div><div class='ctx'>   config=0x00204</div><div class='del'>-  $# cat /sys/devices/hns3_pmu_sicl_0/events/dly_tx_normal_to_mac_packet_num</div><div class='add'>+  $# cat /sys/bus/event_source/devices/hns3_pmu_sicl_0/events/dly_tx_normal_to_mac_packet_num</div><div class='ctx'>   config=0x10204</div><div class='ctx'> </div><div class='ctx'> Each performance statistic has a pair of events to get two values to</div><div class='hunk'>@@ -60,7 +60,7 @@ computation to calculate real performance data is:::</div><div class='ctx'> </div><div class='ctx'> Example usage of checking supported filter mode::</div><div class='ctx'> </div><div class='del'>-  $# cat /sys/devices/hns3_pmu_sicl_0/filtermode/bw_ssu_rpu_byte_num</div><div class='add'>+  $# cat /sys/bus/event_source/devices/hns3_pmu_sicl_0/filtermode/bw_ssu_rpu_byte_num</div><div class='ctx'>   filter mode supported: global/port/port-tc/func/func-queue/</div><div class='ctx'> </div><div class='ctx'> Example usage of perf::</div><div class='head'>diff --git a/Documentation/admin-guide/perf/qcom_l2_pmu.rst b/Documentation/admin-guide/perf/qcom_l2_pmu.rst<br/>index c130178a4a55..c37c6be9b8d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/qcom_l2_pmu.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/qcom_l2_pmu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/qcom_l2_pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/perf/qcom_l2_pmu.rst</a></div><div class='hunk'>@@ -10,7 +10,7 @@ There is one logical L2 PMU exposed, which aggregates the results from</div><div class='ctx'> the physical PMUs.</div><div class='ctx'> </div><div class='ctx'> The driver provides a description of its available events and configuration</div><div class='del'>-options in sysfs, see /sys/devices/l2cache_0.</div><div class='add'>+options in sysfs, see /sys/bus/event_source/devices/l2cache_0.</div><div class='ctx'> </div><div class='ctx'> The "format" directory describes the format of the events.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/perf/qcom_l3_pmu.rst b/Documentation/admin-guide/perf/qcom_l3_pmu.rst<br/>index a3d014a46bfd..a66556b7e985 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/qcom_l3_pmu.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/qcom_l3_pmu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/qcom_l3_pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/perf/qcom_l3_pmu.rst</a></div><div class='hunk'>@@ -9,7 +9,7 @@ PMU with device name l3cache_&lt;socket&gt;_&lt;instance&gt;. User space is responsible</div><div class='ctx'> for aggregating across slices.</div><div class='ctx'> </div><div class='ctx'> The driver provides a description of its available events and configuration</div><div class='del'>-options in sysfs, see /sys/devices/l3cache*. Given that these are uncore PMUs</div><div class='add'>+options in sysfs, see /sys/bus/event_source/devices/l3cache*. Given that these are uncore PMUs</div><div class='ctx'> the driver also exposes a "cpumask" sysfs attribute which contains a mask</div><div class='ctx'> consisting of one CPU per socket which will be used to handle all the PMU</div><div class='ctx'> events on that socket.</div><div class='head'>diff --git a/Documentation/admin-guide/perf/thunderx2-pmu.rst b/Documentation/admin-guide/perf/thunderx2-pmu.rst<br/>index 01f158238ae1..9255f7bf9452 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/thunderx2-pmu.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/thunderx2-pmu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/thunderx2-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/perf/thunderx2-pmu.rst</a></div><div class='hunk'>@@ -22,7 +22,7 @@ The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and</div><div class='ctx'> L3C devices.  Each PMU can be used to count up to 4 (DMC/L3C) or up to 8</div><div class='ctx'> (CCPI2) events simultaneously. The PMUs provide a description of their</div><div class='ctx'> available events and configuration options under sysfs, see</div><div class='del'>-/sys/devices/uncore_&lt;l3c_S/dmc_S/ccpi2_S/&gt;; S is the socket id.</div><div class='add'>+/sys/bus/event_source/devices/uncore_&lt;l3c_S/dmc_S/ccpi2_S/&gt;; S is the socket id.</div><div class='ctx'> </div><div class='ctx'> The driver does not support sampling, therefore "perf record" will not</div><div class='ctx'> work. Per-task perf sessions are also not supported.</div><div class='head'>diff --git a/Documentation/admin-guide/perf/xgene-pmu.rst b/Documentation/admin-guide/perf/xgene-pmu.rst<br/>index 644f8ed89152..98ccb8e777c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/xgene-pmu.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/perf/xgene-pmu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/perf/xgene-pmu.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/perf/xgene-pmu.rst</a></div><div class='hunk'>@@ -13,7 +13,7 @@ PMU (perf) driver</div><div class='ctx'> </div><div class='ctx'> The xgene-pmu driver registers several perf PMU drivers. Each of the perf</div><div class='ctx'> driver provides description of its available events and configuration options</div><div class='del'>-in sysfs, see /sys/devices/&lt;l3cX/iobX/mcbX/mcX&gt;/.</div><div class='add'>+in sysfs, see /sys/bus/event_source/devices/&lt;l3cX/iobX/mcbX/mcX&gt;/.</div><div class='ctx'> </div><div class='ctx'> The "format" directory describes format of the config (event ID),</div><div class='ctx'> config1 (agent ID) fields of the perf_event_attr structure. The "events"</div><div class='head'>diff --git a/Documentation/admin-guide/reporting-regressions.rst b/Documentation/admin-guide/reporting-regressions.rst<br/>index 76b246ecf21b..946518355a2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/reporting-regressions.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/reporting-regressions.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/reporting-regressions.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/reporting-regressions.rst</a></div><div class='hunk'>@@ -42,12 +42,12 @@ The important basics</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-What is a "regression" and what is the "no regressions rule"?</div><div class='add'>+What is a "regression" and what is the "no regressions" rule?</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> It's a regression if some application or practical use case running fine with</div><div class='ctx'> one Linux kernel works worse or not at all with a newer version compiled using a</div><div class='del'>-similar configuration. The "no regressions rule" forbids this to take place; if</div><div class='add'>+similar configuration. The "no regressions" rule forbids this to take place; if</div><div class='ctx'> it happens by accident, developers that caused it are expected to quickly fix</div><div class='ctx'> the issue.</div><div class='ctx'> </div><div class='hunk'>@@ -173,7 +173,7 @@ Additional details about regressions</div><div class='ctx'> ------------------------------------</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-What is the goal of the "no regressions rule"?</div><div class='add'>+What is the goal of the "no regressions" rule?</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> Users should feel safe when updating kernel versions and not have to worry</div><div class='hunk'>@@ -199,8 +199,8 @@ Exceptions to this rule are extremely rare; in the past developers almost always</div><div class='ctx'> turned out to be wrong when they assumed a particular situation was warranting</div><div class='ctx'> an exception.</div><div class='ctx'> </div><div class='del'>-Who ensures the "no regressions" is actually followed?</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+Who ensures the "no regressions" rule is actually followed?</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> The subsystem maintainers should take care of that, which are watched and</div><div class='ctx'> supported by the tree maintainers -- e.g. Linus Torvalds for mainline and</div><div class='head'>diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst<br/>index 7250c0542828..7b0c4291c686 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/sysctl/net.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/sysctl/net.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/sysctl/net.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/sysctl/net.rst</a></div><div class='hunk'>@@ -72,6 +72,7 @@ two flavors of JITs, the newer eBPF JIT currently supported on:</div><div class='ctx'>   - riscv64</div><div class='ctx'>   - riscv32</div><div class='ctx'>   - loongarch64</div><div class='add'>+  - arc</div><div class='ctx'> </div><div class='ctx'> And the older cBPF JIT supported on the following archs:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst b/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst<br/>index d3504826f401..c389d4fd7599 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst</a></div><div class='hunk'>@@ -29,7 +29,7 @@ The essence of the process (aka 'TL;DR')</div><div class='ctx'> ========================================</div><div class='ctx'> </div><div class='ctx'> *[If you are new to building or bisecting Linux, ignore this section and head</div><div class='del'>-over to the* ":ref:`step-by-step guide&lt;introguide_bissbs&gt;`" *below. It utilizes</div><div class='add'>+over to the* ':ref:`step-by-step guide &lt;introguide_bissbs&gt;`' *below. It utilizes</div><div class='ctx'> the same commands as this section while describing them in brief fashion. The</div><div class='ctx'> steps are nevertheless easy to follow and together with accompanying entries</div><div class='ctx'> in a reference section mention many alternatives, pitfalls, and additional</div><div class='hunk'>@@ -38,8 +38,8 @@ aspects, all of which might be essential in your present case.]*</div><div class='ctx'> **In case you want to check if a bug is present in code currently supported by</div><div class='ctx'> developers**, execute just the *preparations* and *segment 1*; while doing so,</div><div class='ctx'> consider the newest Linux kernel you regularly use to be the 'working' kernel.</div><div class='del'>-In the following example that's assumed to be 6.0.13, which is why the sources</div><div class='del'>-of 6.0 will be used to prepare the .config file.</div><div class='add'>+In the following example that's assumed to be 6.0, which is why its sources</div><div class='add'>+will be used to prepare the .config file.</div><div class='ctx'> </div><div class='ctx'> **In case you face a regression**, follow the steps at least till the end of</div><div class='ctx'> *segment 2*. Then you can submit a preliminary report -- or continue with</div><div class='hunk'>@@ -61,7 +61,7 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'>     cd ~/linux/</div><div class='ctx'>     git remote add -t master stable \</div><div class='ctx'>       https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</div><div class='del'>-    git checkout --detach v6.0</div><div class='add'>+    git switch --detach v6.0</div><div class='ctx'>     # * Hint: if you used an existing clone, ensure no stale .config is around.</div><div class='ctx'>     make olddefconfig</div><div class='ctx'>     # * Ensure the former command picked the .config of the 'working' kernel.</div><div class='hunk'>@@ -87,7 +87,7 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'>   a) Checking out latest mainline code::</div><div class='ctx'> </div><div class='ctx'>        cd ~/linux/</div><div class='del'>-       git checkout --force --detach mainline/master</div><div class='add'>+       git switch --discard-changes --detach mainline/master</div><div class='ctx'> </div><div class='ctx'>   b) Build, install, and boot a kernel::</div><div class='ctx'> </div><div class='hunk'>@@ -125,7 +125,7 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'>   a) Start by checking out the sources of the 'good' version::</div><div class='ctx'> </div><div class='ctx'>        cd ~/linux/</div><div class='del'>-       git checkout --force --detach v6.0</div><div class='add'>+       git switch --discard-changes --detach v6.0</div><div class='ctx'> </div><div class='ctx'>   b) Build, install, and boot a kernel as described earlier in *segment 1,</div><div class='ctx'>      section b* -- just feel free to skip the 'du' commands, as you have a rough</div><div class='hunk'>@@ -136,8 +136,7 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'> </div><div class='ctx'> * **Segment 3**: perform and validate the bisection.</div><div class='ctx'> </div><div class='del'>-  a) In case your 'broken' version is a stable/longterm release, add the Git</div><div class='del'>-     branch holding it::</div><div class='add'>+  a) Retrieve the sources for your 'bad' version::</div><div class='ctx'> </div><div class='ctx'>        git remote set-branches --add stable linux-6.1.y</div><div class='ctx'>        git fetch stable</div><div class='hunk'>@@ -157,11 +156,12 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'>      works with the newly built kernel. If it does, tell Git by executing</div><div class='ctx'>      ``git bisect good``; if it does not, run ``git bisect bad`` instead.</div><div class='ctx'> </div><div class='del'>-     All three commands will make Git checkout another commit; then re-execute</div><div class='add'>+     All three commands will make Git check out another commit; then re-execute</div><div class='ctx'>      this step (e.g. build, install, boot, and test a kernel to then tell Git</div><div class='ctx'>      the outcome). Do so again and again until Git shows which commit broke</div><div class='ctx'>      things. If you run short of disk space during this process, check the</div><div class='del'>-     "Supplementary tasks" section below.</div><div class='add'>+     section 'Complementary tasks: cleanup during and after the process'</div><div class='add'>+     below.</div><div class='ctx'> </div><div class='ctx'>   d) Once your finished the bisection, put a few things away::</div><div class='ctx'> </div><div class='hunk'>@@ -172,14 +172,17 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'> </div><div class='ctx'>   e) Try to verify the bisection result::</div><div class='ctx'> </div><div class='del'>-       git checkout --force --detach mainline/master</div><div class='add'>+       git switch --discard-changes --detach mainline/master</div><div class='ctx'>        git revert --no-edit cafec0cacaca0</div><div class='add'>+       cp ~/kernel-config-working .config</div><div class='add'>+       ./scripts/config --set-str CONFIG_LOCALVERSION '-local-cafec0cacaca0-reverted'</div><div class='ctx'> </div><div class='ctx'>     This is optional, as some commits are impossible to revert. But if the</div><div class='ctx'>     second command worked flawlessly, build, install, and boot one more kernel</div><div class='del'>-    kernel, which should not show the regression.</div><div class='add'>+    kernel; just this time skip the first command copying the base .config file</div><div class='add'>+    over, as that already has been taken care off.</div><div class='ctx'> </div><div class='del'>-* **Supplementary tasks**: cleanup during and after the process.</div><div class='add'>+* **Complementary tasks**: cleanup during and after the process.</div><div class='ctx'> </div><div class='ctx'>   a) To avoid running out of disk space during a bisection, you might need to</div><div class='ctx'>      remove some kernels you built earlier. You most likely want to keep those</div><div class='hunk'>@@ -202,13 +205,25 @@ will be considered the 'good' release and used to prepare the .config file.</div><div class='ctx'>      the kernels you built earlier and later you might want to keep around for</div><div class='ctx'>      a week or two.</div><div class='ctx'> </div><div class='add'>+* **Optional task**: test a debug patch or a proposed fix later::</div><div class='add'>+</div><div class='add'>+    git fetch mainline</div><div class='add'>+    git switch --discard-changes --detach mainline/master</div><div class='add'>+    git apply /tmp/foobars-proposed-fix-v1.patch</div><div class='add'>+    cp ~/kernel-config-working .config</div><div class='add'>+    ./scripts/config --set-str CONFIG_LOCALVERSION '-local-foobars-fix-v1'</div><div class='add'>+</div><div class='add'>+  Build, install, and boot a kernel as described in *segment 1, section b* --</div><div class='add'>+  but this time omit the first command copying the build configuration over,</div><div class='add'>+  as that has been taken care of already.</div><div class='add'>+</div><div class='ctx'> .. _introguide_bissbs:</div><div class='ctx'> </div><div class='ctx'> Step-by-step guide on how to verify bugs and bisect regressions</div><div class='ctx'> ===============================================================</div><div class='ctx'> </div><div class='ctx'> This guide describes how to set up your own Linux kernels for investigating bugs</div><div class='del'>-or regressions you intent to report. How far you want to follow the instructions</div><div class='add'>+or regressions you intend to report. How far you want to follow the instructions</div><div class='ctx'> depends on your issue:</div><div class='ctx'> </div><div class='ctx'> Execute all steps till the end of *segment 1* to **verify if your kernel problem</div><div class='hunk'>@@ -221,15 +236,17 @@ report; instead of the latter your could also head straight on and follow</div><div class='ctx'> *segment 3* to **perform a bisection** for a full-fledged regression report</div><div class='ctx'> developers are obliged to act upon.</div><div class='ctx'> </div><div class='del'>- :ref:`Preparations: set up everything to build your own kernels.&lt;introprep_bissbs&gt;`</div><div class='add'>+ :ref:`Preparations: set up everything to build your own kernels &lt;introprep_bissbs&gt;`.</div><div class='ctx'> </div><div class='del'>- :ref:`Segment 1: try to reproduce the problem with the latest codebase.&lt;introlatestcheck_bissbs&gt;`</div><div class='add'>+ :ref:`Segment 1: try to reproduce the problem with the latest codebase &lt;introlatestcheck_bissbs&gt;`.</div><div class='ctx'> </div><div class='del'>- :ref:`Segment 2: check if the kernels you build work fine.&lt;introworkingcheck_bissbs&gt;`</div><div class='add'>+ :ref:`Segment 2: check if the kernels you build work fine &lt;introworkingcheck_bissbs&gt;`.</div><div class='ctx'> </div><div class='del'>- :ref:`Segment 3: perform a bisection and validate the result.&lt;introbisect_bissbs&gt;`</div><div class='add'>+ :ref:`Segment 3: perform a bisection and validate the result &lt;introbisect_bissbs&gt;`.</div><div class='ctx'> </div><div class='del'>- :ref:`Supplementary tasks: cleanup during and after following this guide.&lt;introclosure_bissbs&gt;`</div><div class='add'>+ :ref:`Complementary tasks: cleanup during and after following this guide &lt;introclosure_bissbs&gt;`.</div><div class='add'>+</div><div class='add'>+ :ref:`Optional tasks: test reverts, patches, or later versions &lt;introoptional_bissbs&gt;`.</div><div class='ctx'> </div><div class='ctx'> The steps in each segment illustrate the important aspects of the process, while</div><div class='ctx'> a comprehensive reference section holds additional details for almost all of the</div><div class='hunk'>@@ -240,24 +257,35 @@ to get things rolling again.</div><div class='ctx'> For further details on how to report Linux kernel issues or regressions check</div><div class='ctx'> out Documentation/admin-guide/reporting-issues.rst, which works in conjunction</div><div class='ctx'> with this document. It among others explains why you need to verify bugs with</div><div class='del'>-the latest 'mainline' kernel, even if you face a problem with a kernel from a</div><div class='del'>-'stable/longterm' series; for users facing a regression it also explains that</div><div class='del'>-sending a preliminary report after finishing segment 2 might be wise, as the</div><div class='del'>-regression and its culprit might be known already. For further details on</div><div class='del'>-what actually qualifies as a regression check out</div><div class='del'>-Documentation/admin-guide/reporting-regressions.rst.</div><div class='add'>+the latest 'mainline' kernel (e.g. versions like 6.0, 6.1-rc1, or 6.1-rc6),</div><div class='add'>+even if you face a problem with a kernel from a 'stable/longterm' series</div><div class='add'>+(say 6.0.13).</div><div class='add'>+</div><div class='add'>+For users facing a regression that document also explains why sending a</div><div class='add'>+preliminary report after segment 2 might be wise, as the regression and its</div><div class='add'>+culprit might be known already. For further details on what actually qualifies</div><div class='add'>+as a regression check out Documentation/admin-guide/reporting-regressions.rst.</div><div class='add'>+</div><div class='add'>+If you run into any problems while following this guide or have ideas how to</div><div class='add'>+improve it, :ref:`please let the kernel developers know &lt;submit_improvements&gt;`.</div><div class='ctx'> </div><div class='ctx'> .. _introprep_bissbs:</div><div class='ctx'> </div><div class='ctx'> Preparations: set up everything to build your own kernels</div><div class='ctx'> ---------------------------------------------------------</div><div class='ctx'> </div><div class='add'>+The following steps lay the groundwork for all further tasks.</div><div class='add'>+</div><div class='add'>+Note: the instructions assume you are building and testing on the same</div><div class='add'>+machine; if you want to compile the kernel on another system, check</div><div class='add'>+:ref:`Build kernels on a different machine &lt;buildhost_bis&gt;` below.</div><div class='add'>+</div><div class='ctx'> .. _backup_bissbs:</div><div class='ctx'> </div><div class='ctx'> * Create a fresh backup and put system repair and restore tools at hand, just</div><div class='ctx'>   to be prepared for the unlikely case of something going sideways.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;backup_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;backup_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _vanilla_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -265,7 +293,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   builds them automatically. That includes but is not limited to DKMS, openZFS,</div><div class='ctx'>   VirtualBox, and Nvidia's graphics drivers (including the GPLed kernel module).</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;vanilla_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;vanilla_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _secureboot_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -276,48 +304,49 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   their restrictions through a process initiated by</div><div class='ctx'>   ``mokutil --disable-validation``.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;secureboot_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;secureboot_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _rangecheck_bissbs:</div><div class='ctx'> </div><div class='ctx'> * Determine the kernel versions considered 'good' and 'bad' throughout this</div><div class='del'>-  guide.</div><div class='add'>+  guide:</div><div class='ctx'> </div><div class='del'>-  Do you follow this guide to verify if a bug is present in the code developers</div><div class='del'>-  care for? Then consider the mainline release your 'working' kernel (the newest</div><div class='del'>-  one you regularly use) is based on to be the 'good' version; if your 'working'</div><div class='del'>-  kernel for example is 6.0.11, then your 'good' kernel is 6.0.</div><div class='add'>+  * Do you follow this guide to verify if a bug is present in the code the</div><div class='add'>+    primary developers care for? Then consider the version of the newest kernel</div><div class='add'>+    you regularly use currently as 'good' (e.g. 6.0, 6.0.13, or 6.1-rc2).</div><div class='ctx'> </div><div class='del'>-  In case you face a regression, it depends on the version range where the</div><div class='del'>-  regression was introduced:</div><div class='add'>+  * Do you face a regression, e.g. something broke or works worse after</div><div class='add'>+    switching to a newer kernel version? In that case it depends on the version</div><div class='add'>+    range during which the problem appeared:</div><div class='ctx'> </div><div class='del'>-  * Something which used to work in Linux 6.0 broke when switching to Linux</div><div class='del'>-    6.1-rc1? Then henceforth regard 6.0 as the last known 'good' version</div><div class='del'>-    and 6.1-rc1 as the first 'bad' one.</div><div class='add'>+    * Something regressed when updating from a stable/longterm release</div><div class='add'>+      (say 6.0.13) to a newer mainline series (like 6.1-rc7 or 6.1) or a</div><div class='add'>+      stable/longterm version based on one (say 6.1.5)? Then consider the</div><div class='add'>+      mainline release your working kernel is based on to be the 'good'</div><div class='add'>+      version (e.g. 6.0) and the first version to be broken as the 'bad' one</div><div class='add'>+      (e.g. 6.1-rc7, 6.1, or 6.1.5). Note, at this point it is merely assumed</div><div class='add'>+      that 6.0 is fine; this hypothesis will be checked in segment 2.</div><div class='ctx'> </div><div class='del'>-  * Some function stopped working when updating from 6.0.11 to 6.1.4? Then for</div><div class='del'>-    the time being consider 6.0 as the last 'good' version and 6.1.4 as</div><div class='del'>-    the 'bad' one. Note, at this point it is merely assumed that 6.0 is fine;</div><div class='del'>-    this assumption will be checked in segment 2.</div><div class='add'>+    * Something regressed when switching from one mainline version (say 6.0) to</div><div class='add'>+      a later one (like 6.1-rc1) or a stable/longterm release based on it</div><div class='add'>+      (say 6.1.5)? Then regard the last working version (e.g. 6.0) as 'good' and</div><div class='add'>+      the first broken (e.g. 6.1-rc1 or 6.1.5) as 'bad'.</div><div class='ctx'> </div><div class='del'>-  * A feature you used in 6.0.11 does not work at all or worse in 6.1.13? In</div><div class='del'>-    that case you want to bisect within a stable/longterm series: consider</div><div class='del'>-    6.0.11 as the last known 'good' version and 6.0.13 as the first 'bad'</div><div class='del'>-    one. Note, in this case you still want to compile and test a mainline kernel</div><div class='del'>-    as explained in segment 1: the outcome will determine if you need to report</div><div class='del'>-    your issue to the regular developers or the stable team.</div><div class='add'>+    * Something regressed when updating within a stable/longterm series (say</div><div class='add'>+      from 6.0.13 to 6.0.15)? Then consider those versions as 'good' and 'bad'</div><div class='add'>+      (e.g. 6.0.13 and 6.0.15), as you need to bisect within that series.</div><div class='ctx'> </div><div class='ctx'>   *Note, do not confuse 'good' version with 'working' kernel; the latter term</div><div class='ctx'>   throughout this guide will refer to the last kernel that has been working</div><div class='ctx'>   fine.*</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;rangecheck_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;rangecheck_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _bootworking_bissbs:</div><div class='ctx'> </div><div class='ctx'> * Boot into the 'working' kernel and briefly use the apparently broken feature.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;bootworking_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;bootworking_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _diskspace_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -327,7 +356,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   debug symbols: both explain approaches reducing the amount of space, which</div><div class='ctx'>   should allow you to master these tasks with about 4 Gigabytes free space.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;diskspace_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;diskspace_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _buildrequires_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -337,7 +366,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   reference section shows how to quickly install those on various popular Linux</div><div class='ctx'>   distributions.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;buildrequires_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;buildrequires_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _sources_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -360,14 +389,23 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>     git remote add -t master stable \</div><div class='ctx'>       https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;sources_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;sources_bisref&gt;`]</div><div class='add'>+</div><div class='add'>+.. _stablesources_bissbs:</div><div class='add'>+</div><div class='add'>+* Is one of the versions you earlier established as 'good' or 'bad' a stable or</div><div class='add'>+  longterm release (say 6.1.5)? Then download the code for the series it belongs</div><div class='add'>+  to ('linux-6.1.y' in this example)::</div><div class='add'>+</div><div class='add'>+    git remote set-branches --add stable linux-6.1.y</div><div class='add'>+    git fetch stable</div><div class='ctx'> </div><div class='ctx'> .. _oldconfig_bissbs:</div><div class='ctx'> </div><div class='ctx'> * Start preparing a kernel build configuration (the '.config' file).</div><div class='ctx'> </div><div class='ctx'>   Before doing so, ensure you are still running the 'working' kernel an earlier</div><div class='del'>-  step told you to boot; if you are unsure, check the current kernel release</div><div class='add'>+  step told you to boot; if you are unsure, check the current kernelrelease</div><div class='ctx'>   identifier using ``uname -r``.</div><div class='ctx'> </div><div class='ctx'>   Afterwards check out the source code for the version earlier established as</div><div class='hunk'>@@ -375,7 +413,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   the version number in this and all later Git commands needs to be prefixed</div><div class='ctx'>   with a 'v'::</div><div class='ctx'> </div><div class='del'>-    git checkout --detach v6.0</div><div class='add'>+    git switch --discard-changes --detach v6.0</div><div class='ctx'> </div><div class='ctx'>   Now create a build configuration file::</div><div class='ctx'> </div><div class='hunk'>@@ -398,7 +436,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   'make olddefconfig' again and check if it now picked up the right config file</div><div class='ctx'>   as base.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;oldconfig_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;oldconfig_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _localmodconfig_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -432,7 +470,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   spending much effort on, as long as it boots and allows to properly test the</div><div class='ctx'>   feature that causes trouble.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;localmodconfig_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;localmodconfig_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _tagging_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -442,7 +480,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>     ./scripts/config --set-str CONFIG_LOCALVERSION '-local'</div><div class='ctx'>     ./scripts/config -e CONFIG_LOCALVERSION_AUTO</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;tagging_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;tagging_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _debugsymbols_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -461,7 +499,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>     ./scripts/config -d DEBUG_INFO -d DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT \</div><div class='ctx'>       -d DEBUG_INFO_DWARF4 -d DEBUG_INFO_DWARF5 -e CONFIG_DEBUG_INFO_NONE</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;debugsymbols_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;debugsymbols_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _configmods_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -471,14 +509,14 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>   * Are you running Debian? Then you want to avoid known problems by performing</div><div class='ctx'>     additional adjustments explained in the reference section.</div><div class='ctx'> </div><div class='del'>-    [:ref:`details&lt;configmods_distros_bisref&gt;`].</div><div class='add'>+    [:ref:`details &lt;configmods_distros_bisref&gt;`].</div><div class='ctx'> </div><div class='ctx'>   * If you want to influence other aspects of the configuration, do so now using</div><div class='ctx'>     your preferred tool. Note, to use make targets like 'menuconfig' or</div><div class='ctx'>     'nconfig', you will need to install the development files of ncurses; for</div><div class='ctx'>     'xconfig' you likewise need the Qt5 or Qt6 headers.</div><div class='ctx'> </div><div class='del'>-    [:ref:`details&lt;configmods_individual_bisref&gt;`].</div><div class='add'>+    [:ref:`details &lt;configmods_individual_bisref&gt;`].</div><div class='ctx'> </div><div class='ctx'> .. _saveconfig_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -488,7 +526,7 @@ Preparations: set up everything to build your own kernels</div><div class='ctx'>      make olddefconfig</div><div class='ctx'>      cp .config ~/kernel-config-working</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;saveconfig_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;saveconfig_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _introlatestcheck_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -498,16 +536,30 @@ Segment 1: try to reproduce the problem with the latest codebase</div><div class='ctx'> The following steps verify if the problem occurs with the code currently</div><div class='ctx'> supported by developers. In case you face a regression, it also checks that the</div><div class='ctx'> problem is not caused by some .config change, as reporting the issue then would</div><div class='del'>-be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='add'>+be a waste of time. [:ref:`details &lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _checkoutmaster_bissbs:</div><div class='ctx'> </div><div class='del'>-* Check out the latest Linux codebase::</div><div class='add'>+* Check out the latest Linux codebase.</div><div class='ctx'> </div><div class='del'>-    cd ~/linux/</div><div class='del'>-    git checkout --force --detach mainline/master</div><div class='add'>+  * Are your 'good' and 'bad' versions from the same stable or longterm series?</div><div class='add'>+    Then check the `front page of kernel.org &lt;https://kernel.org/&gt;`_: if it</div><div class='add'>+    lists a release from that series without an '[EOL]' tag, checkout the series</div><div class='add'>+    latest version ('linux-6.1.y' in the following example)::</div><div class='add'>+</div><div class='add'>+      cd ~/linux/</div><div class='add'>+      git switch --discard-changes --detach stable/linux-6.1.y</div><div class='add'>+</div><div class='add'>+    Your series is unsupported, if is not listed or carrying a 'end of life'</div><div class='add'>+    tag. In that case you might want to check if a successor series (say</div><div class='add'>+    linux-6.2.y) or mainline (see next point) fix the bug.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;checkoutmaster_bisref&gt;`]</div><div class='add'>+  * In all other cases, run::</div><div class='add'>+</div><div class='add'>+      cd ~/linux/</div><div class='add'>+      git switch --discard-changes --detach mainline/master</div><div class='add'>+</div><div class='add'>+  [:ref:`details &lt;checkoutmaster_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _build_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -522,7 +574,7 @@ be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'>   reference section for alternatives, which obviously will require other</div><div class='ctx'>   steps to install as well.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;build_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;build_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _install_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -555,7 +607,7 @@ be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'>   down: if you will build more kernels as described in segment 2 and 3, you will</div><div class='ctx'>   have to perform those again after executing ``command -v installkernel [...]``.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;install_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;install_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _storagespace_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -568,7 +620,7 @@ be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'>   Write down or remember those two values for later: they enable you to prevent</div><div class='ctx'>   running out of disk space accidentally during a bisection.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;storagespace_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;storagespace_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _kernelrelease_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -595,7 +647,7 @@ be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'>   If that command does not return '0', check the reference section, as the cause</div><div class='ctx'>   for this might interfere with your testing.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;tainted_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;tainted_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _recheckbroken_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -603,21 +655,19 @@ be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'>   out the instructions in the reference section to ensure nothing went sideways</div><div class='ctx'>   during your tests.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;recheckbroken_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;recheckbroken_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _recheckstablebroken_bissbs:</div><div class='ctx'> </div><div class='del'>-* Are you facing a problem within a stable/longterm series, but failed to</div><div class='del'>-  reproduce it with the mainline kernel you just built? One that according to</div><div class='del'>-  the `front page of kernel.org &lt;https://kernel.org/&gt;`_ is still supported? Then</div><div class='del'>-  check if the latest codebase for the particular series might already fix the</div><div class='del'>-  problem. To do so, add the stable series Git branch for your 'good' kernel</div><div class='del'>-  (again, this here is assumed to be 6.0) and check out the latest version::</div><div class='add'>+* Did you just built a stable or longterm kernel? And were you able to reproduce</div><div class='add'>+  the regression with it? Then you should test the latest mainline codebase as</div><div class='add'>+  well, because the result determines which developers the bug must be submitted</div><div class='add'>+  to.</div><div class='add'>+</div><div class='add'>+  To prepare that test, check out current mainline::</div><div class='ctx'> </div><div class='ctx'>     cd ~/linux/</div><div class='del'>-    git remote set-branches --add stable linux-6.0.y</div><div class='del'>-    git fetch stable</div><div class='del'>-    git checkout --force --detach linux-6.0.y</div><div class='add'>+    git switch --discard-changes --detach mainline/master</div><div class='ctx'> </div><div class='ctx'>   Now use the checked out code to build and install another kernel using the</div><div class='ctx'>   commands the earlier steps already described in more detail::</div><div class='hunk'>@@ -639,14 +689,16 @@ be a waste of time. [:ref:`details&lt;introlatestcheck_bisref&gt;`]</div><div class='ctx'>     uname -r</div><div class='ctx'>     cat /proc/sys/kernel/tainted</div><div class='ctx'> </div><div class='del'>-  Now verify if this kernel is showing the problem.</div><div class='add'>+  Now verify if this kernel is showing the problem. If it does, then you need</div><div class='add'>+  to report the bug to the primary developers; if it does not, report it to the</div><div class='add'>+  stable team. See Documentation/admin-guide/reporting-issues.rst for details.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;recheckstablebroken_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;recheckstablebroken_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> Do you follow this guide to verify if a problem is present in the code</div><div class='ctx'> currently supported by Linux kernel developers? Then you are done at this</div><div class='ctx'> point. If you later want to remove the kernel you just built, check out</div><div class='del'>-:ref:`Supplementary tasks: cleanup during and after following this guide&lt;introclosure_bissbs&gt;`.</div><div class='add'>+:ref:`Complementary tasks: cleanup during and after following this guide &lt;introclosure_bissbs&gt;`.</div><div class='ctx'> </div><div class='ctx'> In case you face a regression, move on and execute at least the next segment</div><div class='ctx'> as well.</div><div class='hunk'>@@ -658,7 +710,7 @@ Segment 2: check if the kernels you build work fine</div><div class='ctx'> </div><div class='ctx'> In case of a regression, you now want to ensure the trimmed configuration file</div><div class='ctx'> you created earlier works as expected; a bisection with the .config file</div><div class='del'>-otherwise would be a waste of time. [:ref:`details&lt;introworkingcheck_bisref&gt;`]</div><div class='add'>+otherwise would be a waste of time. [:ref:`details &lt;introworkingcheck_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _recheckworking_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -669,7 +721,7 @@ otherwise would be a waste of time. [:ref:`details&lt;introworkingcheck_bisref&gt;`]</div><div class='ctx'>   'good' (once again assumed to be 6.0 here)::</div><div class='ctx'> </div><div class='ctx'>     cd ~/linux/</div><div class='del'>-    git checkout --detach v6.0</div><div class='add'>+    git switch --discard-changes --detach v6.0</div><div class='ctx'> </div><div class='ctx'>   Now use the checked out code to configure, build, and install another kernel</div><div class='ctx'>   using the commands the previous subsection explained in more detail::</div><div class='hunk'>@@ -693,7 +745,7 @@ otherwise would be a waste of time. [:ref:`details&lt;introworkingcheck_bisref&gt;`]</div><div class='ctx'>   Now check if this kernel works as expected; if not, consult the reference</div><div class='ctx'>   section for further instructions.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;recheckworking_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;recheckworking_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _introbisect_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -703,18 +755,11 @@ Segment 3: perform the bisection and validate the result</div><div class='ctx'> With all the preparations and precaution builds taken care of, you are now ready</div><div class='ctx'> to begin the bisection. This will make you build quite a few kernels -- usually</div><div class='ctx'> about 15 in case you encountered a regression when updating to a newer series</div><div class='del'>-(say from 6.0.11 to 6.1.3). But do not worry, due to the trimmed build</div><div class='add'>+(say from 6.0.13 to 6.1.5). But do not worry, due to the trimmed build</div><div class='ctx'> configuration created earlier this works a lot faster than many people assume:</div><div class='ctx'> overall on average it will often just take about 10 to 15 minutes to compile</div><div class='ctx'> each kernel on commodity x86 machines.</div><div class='ctx'> </div><div class='del'>-* In case your 'bad' version is a stable/longterm release (say 6.1.5), add its</div><div class='del'>-  stable branch, unless you already did so earlier::</div><div class='del'>-</div><div class='del'>-    cd ~/linux/</div><div class='del'>-    git remote set-branches --add stable linux-6.1.y</div><div class='del'>-    git fetch stable</div><div class='del'>-</div><div class='ctx'> .. _bisectstart_bissbs:</div><div class='ctx'> </div><div class='ctx'> * Start the bisection and tell Git about the versions earlier established as</div><div class='hunk'>@@ -725,7 +770,7 @@ each kernel on commodity x86 machines.</div><div class='ctx'>     git bisect good v6.0</div><div class='ctx'>     git bisect bad v6.1.5</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;bisectstart_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;bisectstart_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _bisectbuild_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -745,7 +790,7 @@ each kernel on commodity x86 machines.</div><div class='ctx'>   If compilation fails for some reason, run ``git bisect skip`` and restart</div><div class='ctx'>   executing the stack of commands from the beginning.</div><div class='ctx'> </div><div class='del'>-  In case you skipped the "test latest codebase" step in the guide, check its</div><div class='add'>+  In case you skipped the 'test latest codebase' step in the guide, check its</div><div class='ctx'>   description as for why the 'df [...]' and 'make -s kernelrelease [...]'</div><div class='ctx'>   commands are here.</div><div class='ctx'> </div><div class='hunk'>@@ -754,7 +799,7 @@ each kernel on commodity x86 machines.</div><div class='ctx'>   totally normal to see release identifiers like '6.0-rc1-local-gcafec0cacaca0'</div><div class='ctx'>   if you bisect between versions 6.1 and 6.2 for example.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;bisectbuild_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;bisectbuild_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _bisecttest_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -794,7 +839,7 @@ each kernel on commodity x86 machines.</div><div class='ctx'>   might need to scroll up to see the message mentioning the culprit;</div><div class='ctx'>   alternatively, run ``git bisect log &gt; ~/bisection-log``.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;bisecttest_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;bisecttest_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _bisectlog_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -806,7 +851,7 @@ each kernel on commodity x86 machines.</div><div class='ctx'>     cp .config ~/bisection-config-culprit</div><div class='ctx'>     git bisect reset</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;bisectlog_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;bisectlog_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _revert_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -823,16 +868,16 @@ each kernel on commodity x86 machines.</div><div class='ctx'>   Begin by checking out the latest codebase depending on the range you bisected:</div><div class='ctx'> </div><div class='ctx'>   * Did you face a regression within a stable/longterm series (say between</div><div class='del'>-    6.0.11 and 6.0.13) that does not happen in mainline? Then check out the</div><div class='add'>+    6.0.13 and 6.0.15) that does not happen in mainline? Then check out the</div><div class='ctx'>     latest codebase for the affected series like this::</div><div class='ctx'> </div><div class='ctx'>       git fetch stable</div><div class='del'>-      git checkout --force --detach linux-6.0.y</div><div class='add'>+      git switch --discard-changes --detach linux-6.0.y</div><div class='ctx'> </div><div class='ctx'>   * In all other cases check out latest mainline::</div><div class='ctx'> </div><div class='ctx'>       git fetch mainline</div><div class='del'>-      git checkout --force --detach mainline/master</div><div class='add'>+      git switch --discard-changes --detach mainline/master</div><div class='ctx'> </div><div class='ctx'>     If you bisected a regression within a stable/longterm series that also</div><div class='ctx'>     happens in mainline, there is one more thing to do: look up the mainline</div><div class='hunk'>@@ -846,27 +891,33 @@ each kernel on commodity x86 machines.</div><div class='ctx'> </div><div class='ctx'>     git revert --no-edit cafec0cacaca0</div><div class='ctx'> </div><div class='del'>-  If that fails, give up trying and move on to the next step. But if it works,</div><div class='del'>-  build a kernel again using the familiar command sequence::</div><div class='add'>+  If that fails, give up trying and move on to the next step; if it works,</div><div class='add'>+  adjust the tag to facilitate the identification and prevent accidentally</div><div class='add'>+  overwriting another kernel::</div><div class='ctx'> </div><div class='ctx'>     cp ~/kernel-config-working .config</div><div class='add'>+    ./scripts/config --set-str CONFIG_LOCALVERSION '-local-cafec0cacaca0-reverted'</div><div class='add'>+</div><div class='add'>+  Build a kernel using the familiar command sequence, just without copying the</div><div class='add'>+  the base .config over::</div><div class='add'>+</div><div class='ctx'>     make olddefconfig &amp;&amp;</div><div class='del'>-    make -j $(nproc --all) &amp;&amp;</div><div class='add'>+    make -j $(nproc --all)</div><div class='ctx'>     # * Check if the free space suffices holding another kernel:</div><div class='ctx'>     df -h /boot/ /lib/modules/</div><div class='ctx'>     sudo make modules_install</div><div class='ctx'>     command -v installkernel &amp;&amp; sudo make install</div><div class='del'>-    Make -s kernelrelease | tee -a ~/kernels-built</div><div class='add'>+    make -s kernelrelease | tee -a ~/kernels-built</div><div class='ctx'>     reboot</div><div class='ctx'> </div><div class='del'>-  Now check one last time if the feature that made you perform a bisection work</div><div class='del'>-  with that kernel.</div><div class='add'>+  Now check one last time if the feature that made you perform a bisection works</div><div class='add'>+  with that kernel: if everything went well, it should not show the regression.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;revert_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;revert_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _introclosure_bissbs:</div><div class='ctx'> </div><div class='del'>-Supplementary tasks: cleanup during and after the bisection</div><div class='add'>+Complementary tasks: cleanup during and after the bisection</div><div class='ctx'> -----------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> During and after following this guide you might want or need to remove some of</div><div class='hunk'>@@ -903,7 +954,7 @@ space might run out.</div><div class='ctx'>   kernel image and related files behind; in that case remove them as described</div><div class='ctx'>   in the reference section.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;makeroom_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;makeroom_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _finishingtouch_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -926,18 +977,99 @@ space might run out.</div><div class='ctx'>     the version considered 'good', and the last three or four you compiled</div><div class='ctx'>     during the actual bisection process.</div><div class='ctx'> </div><div class='del'>-  [:ref:`details&lt;finishingtouch_bisref&gt;`]</div><div class='add'>+  [:ref:`details &lt;finishingtouch_bisref&gt;`]</div><div class='add'>+</div><div class='add'>+.. _introoptional_bissbs:</div><div class='add'>+</div><div class='add'>+Optional: test reverts, patches, or later versions</div><div class='add'>+--------------------------------------------------</div><div class='add'>+</div><div class='add'>+While or after reporting a bug, you might want or potentially will be asked to</div><div class='add'>+test reverts, debug patches, proposed fixes, or other versions. In that case</div><div class='add'>+follow these instructions.</div><div class='add'>+</div><div class='add'>+* Update your Git clone and check out the latest code.</div><div class='add'>+</div><div class='add'>+  * In case you want to test mainline, fetch its latest changes before checking</div><div class='add'>+    its code out::</div><div class='add'>+</div><div class='add'>+      git fetch mainline</div><div class='add'>+      git switch --discard-changes --detach mainline/master</div><div class='add'>+</div><div class='add'>+  * In case you want to test a stable or longterm kernel, first add the branch</div><div class='add'>+    holding the series you are interested in (6.2 in the example), unless you</div><div class='add'>+    already did so earlier::</div><div class='add'>+</div><div class='add'>+      git remote set-branches --add stable linux-6.2.y</div><div class='add'>+</div><div class='add'>+    Then fetch the latest changes and check out the latest version from the</div><div class='add'>+    series::</div><div class='add'>+</div><div class='add'>+      git fetch stable</div><div class='add'>+      git switch --discard-changes --detach stable/linux-6.2.y</div><div class='add'>+</div><div class='add'>+* Copy your kernel build configuration over::</div><div class='add'>+</div><div class='add'>+    cp ~/kernel-config-working .config</div><div class='add'>+</div><div class='add'>+* Your next step depends on what you want to do:</div><div class='add'>+</div><div class='add'>+  * In case you just want to test the latest codebase, head to the next step,</div><div class='add'>+    you are already all set.</div><div class='add'>+</div><div class='add'>+  * In case you want to test if a revert fixes an issue, revert one or multiple</div><div class='add'>+    changes by specifying their commit ids::</div><div class='add'>+</div><div class='add'>+      git revert --no-edit cafec0cacaca0</div><div class='add'>+</div><div class='add'>+    Now give that kernel a special tag to facilitates its identification and</div><div class='add'>+    prevent accidentally overwriting another kernel::</div><div class='add'>+</div><div class='add'>+      ./scripts/config --set-str CONFIG_LOCALVERSION '-local-cafec0cacaca0-reverted'</div><div class='add'>+</div><div class='add'>+  * In case you want to test a patch, store the patch in a file like</div><div class='add'>+    '/tmp/foobars-proposed-fix-v1.patch' and apply it like this::</div><div class='add'>+</div><div class='add'>+      git apply /tmp/foobars-proposed-fix-v1.patch</div><div class='add'>+</div><div class='add'>+    In case of multiple patches, repeat this step with the others.</div><div class='add'>+</div><div class='add'>+    Now give that kernel a special tag to facilitates its identification and</div><div class='add'>+    prevent accidentally overwriting another kernel::</div><div class='add'>+</div><div class='add'>+    ./scripts/config --set-str CONFIG_LOCALVERSION '-local-foobars-fix-v1'</div><div class='add'>+</div><div class='add'>+* Build a kernel using the familiar commands, just without copying the kernel</div><div class='add'>+  build configuration over, as that has been taken care of already::</div><div class='add'>+</div><div class='add'>+    make olddefconfig &amp;&amp;</div><div class='add'>+    make -j $(nproc --all)</div><div class='add'>+    # * Check if the free space suffices holding another kernel:</div><div class='add'>+    df -h /boot/ /lib/modules/</div><div class='add'>+    sudo make modules_install</div><div class='add'>+    command -v installkernel &amp;&amp; sudo make install</div><div class='add'>+    make -s kernelrelease | tee -a ~/kernels-built</div><div class='add'>+    reboot</div><div class='add'>+</div><div class='add'>+* Now verify you booted the newly built kernel and check it.</div><div class='add'>+</div><div class='add'>+[:ref:`details &lt;introoptional_bisref&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _submit_improvements:</div><div class='ctx'> </div><div class='del'>-This concludes the step-by-step guide.</div><div class='add'>+Conclusion</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+You have reached the end of the step-by-step guide.</div><div class='ctx'> </div><div class='ctx'> Did you run into trouble following any of the above steps not cleared up by the</div><div class='ctx'> reference section below? Did you spot errors? Or do you have ideas how to</div><div class='del'>-improve the guide? Then please take a moment and let the maintainer of this</div><div class='add'>+improve the guide?</div><div class='add'>+</div><div class='add'>+If any of that applies, please take a moment and let the maintainer of this</div><div class='ctx'> document know by email (Thorsten Leemhuis &lt;linux@leemhuis.info&gt;), ideally while</div><div class='ctx'> CCing the Linux docs mailing list (linux-doc@vger.kernel.org). Such feedback is</div><div class='del'>-vital to improve this document further, which is in everybody's interest, as it</div><div class='add'>+vital to improve this text further, which is in everybody's interest, as it</div><div class='ctx'> will enable more people to master the task described here -- and hopefully also</div><div class='ctx'> improve similar guides inspired by this one.</div><div class='ctx'> </div><div class='hunk'>@@ -948,10 +1080,20 @@ Reference section for the step-by-step guide</div><div class='ctx'> This section holds additional information for almost all the items in the above</div><div class='ctx'> step-by-step guide.</div><div class='ctx'> </div><div class='add'>+Preparations for building your own kernels</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+  *The steps in this section lay the groundwork for all further tests.*</div><div class='add'>+  [:ref:`... &lt;introprep_bissbs&gt;`]</div><div class='add'>+</div><div class='add'>+The steps in all later sections of this guide depend on those described here.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;introprep_bissbs&gt;`].</div><div class='add'>+</div><div class='ctx'> .. _backup_bisref:</div><div class='ctx'> </div><div class='ctx'> Prepare for emergencies</div><div class='del'>------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Create a fresh backup and put system repair and restore tools at hand.*</div><div class='ctx'>   [:ref:`... &lt;backup_bissbs&gt;`]</div><div class='hunk'>@@ -966,7 +1108,7 @@ for something going sideways, even if that should not happen.</div><div class='ctx'> .. _vanilla_bisref:</div><div class='ctx'> </div><div class='ctx'> Remove anything related to externally maintained kernel modules</div><div class='del'>----------------------------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Remove all software that depends on externally developed kernel drivers or</div><div class='ctx'>   builds them automatically.* [:ref:`...&lt;vanilla_bissbs&gt;`]</div><div class='hunk'>@@ -984,7 +1126,7 @@ explains in more detail.</div><div class='ctx'> .. _secureboot_bisref:</div><div class='ctx'> </div><div class='ctx'> Deal with techniques like Secure Boot</div><div class='del'>--------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *On platforms with 'Secure Boot' or similar techniques, prepare everything to</div><div class='ctx'>   ensure the system will permit your self-compiled kernel to boot later.*</div><div class='hunk'>@@ -1021,7 +1163,7 @@ Afterwards, permit MokManager to reboot the machine.</div><div class='ctx'> .. _bootworking_bisref:</div><div class='ctx'> </div><div class='ctx'> Boot the last kernel that was working</div><div class='del'>--------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Boot into the last working kernel and briefly recheck if the feature that</div><div class='ctx'>   regressed really works.* [:ref:`...&lt;bootworking_bissbs&gt;`]</div><div class='hunk'>@@ -1034,7 +1176,7 @@ the right thing.</div><div class='ctx'> .. _diskspace_bisref:</div><div class='ctx'> </div><div class='ctx'> Space requirements</div><div class='del'>-------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Ensure to have enough free space for building Linux.*</div><div class='ctx'>   [:ref:`... &lt;diskspace_bissbs&gt;`]</div><div class='hunk'>@@ -1052,32 +1194,32 @@ space by quite a few gigabytes.</div><div class='ctx'> .. _rangecheck_bisref:</div><div class='ctx'> </div><div class='ctx'> Bisection range</div><div class='del'>----------------</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Determine the kernel versions considered 'good' and 'bad' throughout this</div><div class='ctx'>   guide.* [:ref:`...&lt;rangecheck_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> Establishing the range of commits to be checked is mostly straightforward,</div><div class='ctx'> except when a regression occurred when switching from a release of one stable</div><div class='del'>-series to a release of a later series (e.g. from 6.0.11 to 6.1.4). In that case</div><div class='add'>+series to a release of a later series (e.g. from 6.0.13 to 6.1.5). In that case</div><div class='ctx'> Git will need some hand holding, as there is no straight line of descent.</div><div class='ctx'> </div><div class='ctx'> That's because with the release of 6.0 mainline carried on to 6.1 while the</div><div class='ctx'> stable series 6.0.y branched to the side. It's therefore theoretically possible</div><div class='del'>-that the issue you face with 6.1.4 only worked in 6.0.11, as it was fixed by a</div><div class='add'>+that the issue you face with 6.1.5 only worked in 6.0.13, as it was fixed by a</div><div class='ctx'> commit that went into one of the 6.0.y releases, but never hit mainline or the</div><div class='ctx'> 6.1.y series. Thankfully that normally should not happen due to the way the</div><div class='ctx'> stable/longterm maintainers maintain the code. It's thus pretty safe to assume</div><div class='ctx'> 6.0 as a 'good' kernel. That assumption will be tested anyway, as that kernel</div><div class='ctx'> will be built and tested in the segment '2' of this guide; Git would force you</div><div class='del'>-to do this as well, if you tried bisecting between 6.0.11 and 6.1.13.</div><div class='add'>+to do this as well, if you tried bisecting between 6.0.13 and 6.1.15.</div><div class='ctx'> </div><div class='ctx'> [:ref:`back to step-by-step guide &lt;rangecheck_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _buildrequires_bisref:</div><div class='ctx'> </div><div class='ctx'> Install build requirements</div><div class='del'>---------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Install all software required to build a Linux kernel.*</div><div class='ctx'>   [:ref:`...&lt;buildrequires_bissbs&gt;`]</div><div class='hunk'>@@ -1117,7 +1259,7 @@ These commands install a few packages that are often, but not always needed. You</div><div class='ctx'> for example might want to skip installing the development headers for ncurses,</div><div class='ctx'> which you will only need in case you later might want to adjust the kernel build</div><div class='ctx'> configuration using make the targets 'menuconfig' or 'nconfig'; likewise omit</div><div class='del'>-the headers of Qt6 is you do not plan to adjust the .config using 'xconfig'.</div><div class='add'>+the headers of Qt6 if you do not plan to adjust the .config using 'xconfig'.</div><div class='ctx'> </div><div class='ctx'> You furthermore might need additional libraries and their development headers</div><div class='ctx'> for tasks not covered in this guide -- for example when building utilities from</div><div class='hunk'>@@ -1128,7 +1270,7 @@ the kernel's tools/ directory.</div><div class='ctx'> .. _sources_bisref:</div><div class='ctx'> </div><div class='ctx'> Download the sources using Git</div><div class='del'>-------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Retrieve the Linux mainline sources.*</div><div class='ctx'>   [:ref:`...&lt;sources_bissbs&gt;`]</div><div class='hunk'>@@ -1148,7 +1290,7 @@ work better for you:</div><div class='ctx'> .. _sources_bundle_bisref:</div><div class='ctx'> </div><div class='ctx'> Downloading Linux mainline sources using a bundle</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+"""""""""""""""""""""""""""""""""""""""""""""""""</div><div class='ctx'> </div><div class='ctx'> Use the following commands to retrieve the Linux mainline sources using a</div><div class='ctx'> bundle::</div><div class='hunk'>@@ -1184,7 +1326,7 @@ First, execute the following command to retrieve the latest mainline codebase::</div><div class='ctx'>       https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</div><div class='ctx'> </div><div class='ctx'> Now deepen your clone's history to the second predecessor of the mainline</div><div class='del'>-release of your 'good' version. In case the latter are 6.0 or 6.0.11, 5.19 would</div><div class='add'>+release of your 'good' version. In case the latter are 6.0 or 6.0.13, 5.19 would</div><div class='ctx'> be the first predecessor and 5.18 the second -- hence deepen the history up to</div><div class='ctx'> that version::</div><div class='ctx'> </div><div class='hunk'>@@ -1219,7 +1361,7 @@ Note, shallow clones have a few peculiar characteristics:</div><div class='ctx'> .. _oldconfig_bisref:</div><div class='ctx'> </div><div class='ctx'> Start defining the build configuration for your kernel</div><div class='del'>-------------------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Start preparing a kernel build configuration (the '.config' file).*</div><div class='ctx'>   [:ref:`... &lt;oldconfig_bissbs&gt;`]</div><div class='hunk'>@@ -1279,7 +1421,7 @@ that file to the build machine and store it as ~/linux/.config; afterwards run</div><div class='ctx'> .. _localmodconfig_bisref:</div><div class='ctx'> </div><div class='ctx'> Trim the build configuration for your kernel</div><div class='del'>---------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Disable any kernel modules apparently superfluous for your setup.*</div><div class='ctx'>   [:ref:`... &lt;localmodconfig_bissbs&gt;`]</div><div class='hunk'>@@ -1328,7 +1470,7 @@ step-by-step guide mentions::</div><div class='ctx'> .. _tagging_bisref:</div><div class='ctx'> </div><div class='ctx'> Tag the kernels about to be build</div><div class='del'>----------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Ensure all the kernels you will build are clearly identifiable using a</div><div class='ctx'>   special tag and a unique version identifier.* [:ref:`... &lt;tagging_bissbs&gt;`]</div><div class='hunk'>@@ -1344,7 +1486,7 @@ confusing during the bisection.</div><div class='ctx'> .. _debugsymbols_bisref:</div><div class='ctx'> </div><div class='ctx'> Decide to enable or disable debug symbols</div><div class='del'>------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Decide how to handle debug symbols.* [:ref:`... &lt;debugsymbols_bissbs&gt;`]</div><div class='ctx'> </div><div class='hunk'>@@ -1373,7 +1515,7 @@ explains this process in more detail.</div><div class='ctx'> .. _configmods_bisref:</div><div class='ctx'> </div><div class='ctx'> Adjust build configuration</div><div class='del'>---------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Check if you may want or need to adjust some other kernel configuration</div><div class='ctx'>   options:*</div><div class='hunk'>@@ -1384,7 +1526,7 @@ kernel configuration options.</div><div class='ctx'> .. _configmods_distros_bisref:</div><div class='ctx'> </div><div class='ctx'> Distro specific adjustments</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+"""""""""""""""""""""""""""</div><div class='ctx'> </div><div class='ctx'>   *Are you running* [:ref:`... &lt;configmods_bissbs&gt;`]</div><div class='ctx'> </div><div class='hunk'>@@ -1409,7 +1551,7 @@ when following this guide on a few commodity distributions.</div><div class='ctx'> .. _configmods_individual_bisref:</div><div class='ctx'> </div><div class='ctx'> Individual adjustments</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+""""""""""""""""""""""</div><div class='ctx'> </div><div class='ctx'>   *If you want to influence the other aspects of the configuration, do so</div><div class='ctx'>   now.* [:ref:`... &lt;configmods_bissbs&gt;`]</div><div class='hunk'>@@ -1426,13 +1568,13 @@ is missing.</div><div class='ctx'> .. _saveconfig_bisref:</div><div class='ctx'> </div><div class='ctx'> Put the .config file aside</div><div class='del'>---------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Reprocess the .config after the latest changes and store it in a safe place.*</div><div class='ctx'>   [:ref:`... &lt;saveconfig_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> Put the .config you prepared aside, as you want to copy it back to the build</div><div class='del'>-directory every time  during this guide before you start building another</div><div class='add'>+directory every time during this guide before you start building another</div><div class='ctx'> kernel. That's because going back and forth between different versions can alter</div><div class='ctx'> .config files in odd ways; those occasionally cause side effects that could</div><div class='ctx'> confuse testing or in some cases render the result of your bisection</div><div class='hunk'>@@ -1442,8 +1584,8 @@ meaningless.</div><div class='ctx'> </div><div class='ctx'> .. _introlatestcheck_bisref:</div><div class='ctx'> </div><div class='del'>-Try to reproduce the regression</div><div class='del'>------------------------------------------</div><div class='add'>+Try to reproduce the problem with the latest codebase</div><div class='add'>+-----------------------------------------------------</div><div class='ctx'> </div><div class='ctx'>   *Verify the regression is not caused by some .config change and check if it</div><div class='ctx'>   still occurs with the latest codebase.* [:ref:`... &lt;introlatestcheck_bissbs&gt;`]</div><div class='hunk'>@@ -1490,28 +1632,28 @@ highly recommended for these reasons:</div><div class='ctx'> </div><div class='ctx'>   Your report might be ignored if you send it to the wrong party -- and even</div><div class='ctx'>   when you get a reply there is a decent chance that developers tell you to</div><div class='del'>-  evaluate   which of the two cases it is before they take a closer look.</div><div class='add'>+  evaluate which of the two cases it is before they take a closer look.</div><div class='ctx'> </div><div class='ctx'> [:ref:`back to step-by-step guide &lt;introlatestcheck_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _checkoutmaster_bisref:</div><div class='ctx'> </div><div class='ctx'> Check out the latest Linux codebase</div><div class='del'>------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Check out the latest Linux codebase.*</div><div class='del'>-  [:ref:`... &lt;introlatestcheck_bissbs&gt;`]</div><div class='add'>+  [:ref:`... &lt;checkoutmaster_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> In case you later want to recheck if an ever newer codebase might fix the</div><div class='ctx'> problem, remember to run that ``git fetch --shallow-exclude [...]`` command</div><div class='ctx'> again mentioned earlier to update your local Git repository.</div><div class='ctx'> </div><div class='del'>-[:ref:`back to step-by-step guide &lt;introlatestcheck_bissbs&gt;`]</div><div class='add'>+[:ref:`back to step-by-step guide &lt;checkoutmaster_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> .. _build_bisref:</div><div class='ctx'> </div><div class='ctx'> Build your kernel</div><div class='del'>------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Build the image and the modules of your first kernel using the config file</div><div class='ctx'>   you prepared.* [:ref:`... &lt;build_bissbs&gt;`]</div><div class='hunk'>@@ -1521,7 +1663,7 @@ yourself. Another subsection explains how to directly package your kernel up as</div><div class='ctx'> deb, rpm or tar file.</div><div class='ctx'> </div><div class='ctx'> Dealing with build errors</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+"""""""""""""""""""""""""</div><div class='ctx'> </div><div class='ctx'> When a build error occurs, it might be caused by some aspect of your machine's</div><div class='ctx'> setup that often can be fixed quickly; other times though the problem lies in</div><div class='hunk'>@@ -1552,11 +1694,11 @@ by modifying your search terms or using another line from the error messages.</div><div class='ctx'> </div><div class='ctx'> In the end, most issues you run into have likely been encountered and</div><div class='ctx'> reported by others already. That includes issues where the cause is not your</div><div class='del'>-system, but lies in the code. If you run into one of those, you might thus find a</div><div class='del'>-solution (e.g. a patch) or workaround for your issue, too.</div><div class='add'>+system, but lies in the code. If you run into one of those, you might thus find</div><div class='add'>+a solution (e.g. a patch) or workaround for your issue, too.</div><div class='ctx'> </div><div class='ctx'> Package your kernel up</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+""""""""""""""""""""""</div><div class='ctx'> </div><div class='ctx'> The step-by-step guide uses the default make targets (e.g. 'bzImage' and</div><div class='ctx'> 'modules' on x86) to build the image and the modules of your kernel, which later</div><div class='hunk'>@@ -1587,7 +1729,7 @@ distribution's kernel packages.</div><div class='ctx'> .. _install_bisref:</div><div class='ctx'> </div><div class='ctx'> Put the kernel in place</div><div class='del'>------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Install the kernel you just built.* [:ref:`... &lt;install_bissbs&gt;`]</div><div class='ctx'> </div><div class='hunk'>@@ -1630,7 +1772,7 @@ process. Afterwards add your kernel to your bootloader configuration and reboot.</div><div class='ctx'> .. _storagespace_bisref:</div><div class='ctx'> </div><div class='ctx'> Storage requirements per kernel</div><div class='del'>--------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Check how much storage space the kernel, its modules, and other related files</div><div class='ctx'>   like the initramfs consume.* [:ref:`... &lt;storagespace_bissbs&gt;`]</div><div class='hunk'>@@ -1651,7 +1793,7 @@ need to look in different places.</div><div class='ctx'> .. _tainted_bisref:</div><div class='ctx'> </div><div class='ctx'> Check if your newly built kernel considers itself 'tainted'</div><div class='del'>------------------------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Check if the kernel marked itself as 'tainted'.*</div><div class='ctx'>   [:ref:`... &lt;tainted_bissbs&gt;`]</div><div class='hunk'>@@ -1670,7 +1812,7 @@ interest, as your testing might be flawed otherwise.</div><div class='ctx'> .. _recheckbroken_bisref:</div><div class='ctx'> </div><div class='ctx'> Check the kernel built from a recent mainline codebase</div><div class='del'>-------------------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Verify if your bug occurs with the newly built kernel.*</div><div class='ctx'>   [:ref:`... &lt;recheckbroken_bissbs&gt;`]</div><div class='hunk'>@@ -1696,7 +1838,7 @@ the kernel you built from the latest codebase. These are the most frequent:</div><div class='ctx'> .. _recheckstablebroken_bisref:</div><div class='ctx'> </div><div class='ctx'> Check the kernel built from the latest stable/longterm codebase</div><div class='del'>----------------------------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Are you facing a regression within a stable/longterm release, but failed to</div><div class='ctx'>   reproduce it with the kernel you just built using the latest mainline sources?</div><div class='hunk'>@@ -1741,7 +1883,7 @@ ensure the kernel version you assumed to be 'good' earlier in the process (e.g.</div><div class='ctx'> .. _recheckworking_bisref:</div><div class='ctx'> </div><div class='ctx'> Build your own version of the 'good' kernel</div><div class='del'>--------------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Build your own variant of the working kernel and check if the feature that</div><div class='ctx'>   regressed works as expected with it.* [:ref:`... &lt;recheckworking_bissbs&gt;`]</div><div class='hunk'>@@ -1767,15 +1909,25 @@ multitude of reasons why this might happen. Some ideas where to look:</div><div class='ctx'> </div><div class='ctx'> Note, if you found and fixed problems with the .config file, you want to use it</div><div class='ctx'> to build another kernel from the latest codebase, as your earlier tests with</div><div class='del'>-mainline and the latest version from an affected stable/longterm series were most</div><div class='del'>-likely flawed.</div><div class='add'>+mainline and the latest version from an affected stable/longterm series were</div><div class='add'>+most likely flawed.</div><div class='ctx'> </div><div class='ctx'> [:ref:`back to step-by-step guide &lt;recheckworking_bissbs&gt;`]</div><div class='ctx'> </div><div class='add'>+Perform a bisection and validate the result</div><div class='add'>+-------------------------------------------</div><div class='add'>+</div><div class='add'>+  *With all the preparations and precaution builds taken care of, you are now</div><div class='add'>+  ready to begin the bisection.* [:ref:`... &lt;introbisect_bissbs&gt;`]</div><div class='add'>+</div><div class='add'>+The steps in this segment perform and validate the bisection.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;introbisect_bissbs&gt;`].</div><div class='add'>+</div><div class='ctx'> .. _bisectstart_bisref:</div><div class='ctx'> </div><div class='ctx'> Start the bisection</div><div class='del'>--------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Start the bisection and tell Git about the versions earlier established as</div><div class='ctx'>   'good' and 'bad'.* [:ref:`... &lt;bisectstart_bissbs&gt;`]</div><div class='hunk'>@@ -1789,7 +1941,7 @@ for you to test.</div><div class='ctx'> .. _bisectbuild_bisref:</div><div class='ctx'> </div><div class='ctx'> Build a kernel from the bisection point</div><div class='del'>----------------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Build, install, and boot a kernel from the code Git checked out using the</div><div class='ctx'>   same commands you used earlier.* [:ref:`... &lt;bisectbuild_bissbs&gt;`]</div><div class='hunk'>@@ -1817,7 +1969,7 @@ There are two things worth of note here:</div><div class='ctx'> .. _bisecttest_bisref:</div><div class='ctx'> </div><div class='ctx'> Bisection checkpoint</div><div class='del'>---------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Check if the feature that regressed works in the kernel you just built.*</div><div class='ctx'>   [:ref:`... &lt;bisecttest_bissbs&gt;`]</div><div class='hunk'>@@ -1831,7 +1983,7 @@ will be for nothing.</div><div class='ctx'> .. _bisectlog_bisref:</div><div class='ctx'> </div><div class='ctx'> Put the bisection log away</div><div class='del'>---------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Store Git's bisection log and the current .config file in a safe place.*</div><div class='ctx'>   [:ref:`... &lt;bisectlog_bissbs&gt;`]</div><div class='hunk'>@@ -1851,7 +2003,7 @@ ask for it after you report the regression.</div><div class='ctx'> .. _revert_bisref:</div><div class='ctx'> </div><div class='ctx'> Try reverting the culprit</div><div class='del'>--------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *Try reverting the culprit on top of the latest codebase to see if this fixes</div><div class='ctx'>   your regression.* [:ref:`... &lt;revert_bissbs&gt;`]</div><div class='hunk'>@@ -1869,14 +2021,20 @@ succeeds, test that kernel version instead.</div><div class='ctx'> </div><div class='ctx'> [:ref:`back to step-by-step guide &lt;revert_bissbs&gt;`]</div><div class='ctx'> </div><div class='add'>+Cleanup steps during and after following this guide</div><div class='add'>+---------------------------------------------------</div><div class='ctx'> </div><div class='del'>-Supplementary tasks: cleanup during and after the bisection</div><div class='del'>------------------------------------------------------------</div><div class='add'>+  *During and after following this guide you might want or need to remove some</div><div class='add'>+  of the kernels you installed.* [:ref:`... &lt;introclosure_bissbs&gt;`]</div><div class='add'>+</div><div class='add'>+The steps in this section describe clean-up procedures.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;introclosure_bissbs&gt;`].</div><div class='ctx'> </div><div class='ctx'> .. _makeroom_bisref:</div><div class='ctx'> </div><div class='ctx'> Cleaning up during the bisection</div><div class='del'>---------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'>   *To remove one of the kernels you installed, look up its 'kernelrelease'</div><div class='ctx'>   identifier.* [:ref:`... &lt;makeroom_bissbs&gt;`]</div><div class='hunk'>@@ -1911,13 +2069,13 @@ Now remove the boot entry for the kernel from your bootloader's configuration;</div><div class='ctx'> the steps to do that vary quite a bit between Linux distributions.</div><div class='ctx'> </div><div class='ctx'> Note, be careful with wildcards like '*' when deleting files or directories</div><div class='del'>-for kernels manually: you might accidentally remove files of a 6.0.11 kernel</div><div class='add'>+for kernels manually: you might accidentally remove files of a 6.0.13 kernel</div><div class='ctx'> when all you want is to remove 6.0 or 6.0.1.</div><div class='ctx'> </div><div class='ctx'> [:ref:`back to step-by-step guide &lt;makeroom_bissbs&gt;`]</div><div class='ctx'> </div><div class='ctx'> Cleaning up after the bisection</div><div class='del'>--------------------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> .. _finishingtouch_bisref:</div><div class='ctx'> </div><div class='hunk'>@@ -1932,26 +2090,105 @@ build artifacts and the Linux sources, but will leave the Git repository</div><div class='ctx'> (~/linux/.git/) behind -- a simple ``git reset --hard`` thus will bring the</div><div class='ctx'> sources back.</div><div class='ctx'> </div><div class='del'>-Removing the repository as well would likely be unwise at this point: there is a</div><div class='del'>-decent chance developers will ask you to build another kernel to perform</div><div class='del'>-additional tests. This is often required to debug an issue or check proposed</div><div class='del'>-fixes. Before doing so you want to run the ``git fetch mainline`` command again</div><div class='del'>-followed by ``git checkout mainline/master`` to bring your clone up to date and</div><div class='del'>-checkout the latest codebase. Then apply the patch using ``git apply</div><div class='del'>-&lt;filename&gt;`` or ``git am &lt;filename&gt;`` and build yet another kernel using the</div><div class='del'>-familiar commands.</div><div class='add'>+Removing the repository as well would likely be unwise at this point: there</div><div class='add'>+is a decent chance developers will ask you to build another kernel to</div><div class='add'>+perform additional tests -- like testing a debug patch or a proposed fix.</div><div class='add'>+Details on how to perform those can be found in the section :ref:`Optional</div><div class='add'>+tasks: test reverts, patches, or later versions &lt;introoptional_bissbs&gt;`.</div><div class='ctx'> </div><div class='ctx'> Additional tests are also the reason why you want to keep the</div><div class='ctx'> ~/kernel-config-working file around for a few weeks.</div><div class='ctx'> </div><div class='ctx'> [:ref:`back to step-by-step guide &lt;finishingtouch_bissbs&gt;`]</div><div class='ctx'> </div><div class='add'>+.. _introoptional_bisref:</div><div class='ctx'> </div><div class='del'>-Additional reading material</div><div class='del'>-===========================</div><div class='add'>+Test reverts, patches, or later versions</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+  *While or after reporting a bug, you might want or potentially will be asked</div><div class='add'>+  to test reverts, patches, proposed fixes, or other versions.*</div><div class='add'>+  [:ref:`... &lt;introoptional_bissbs&gt;`]</div><div class='add'>+</div><div class='add'>+All the commands used in this section should be pretty straight forward, so</div><div class='add'>+there is not much to add except one thing: when setting a kernel tag as</div><div class='add'>+instructed, ensure it is not much longer than the one used in the example, as</div><div class='add'>+problems will arise if the kernelrelease identifier exceeds 63 characters.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;introoptional_bissbs&gt;`].</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Additional information</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+.. _buildhost_bis:</div><div class='add'>+</div><div class='add'>+Build kernels on a different machine</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+To compile kernels on another system, slightly alter the step-by-step guide's</div><div class='add'>+instructions:</div><div class='add'>+</div><div class='add'>+* Start following the guide on the machine where you want to install and test</div><div class='add'>+  the kernels later.</div><div class='add'>+</div><div class='add'>+* After executing ':ref:`Boot into the working kernel and briefly use the</div><div class='add'>+  apparently broken feature &lt;bootworking_bissbs&gt;`', save the list of loaded</div><div class='add'>+  modules to a file using ``lsmod &gt; ~/test-machine-lsmod``. Then locate the</div><div class='add'>+  build configuration for the running kernel (see ':ref:`Start defining the</div><div class='add'>+  build configuration for your kernel &lt;oldconfig_bisref&gt;`' for hints on where</div><div class='add'>+  to find it) and store it as '~/test-machine-config-working'. Transfer both</div><div class='add'>+  files to the home directory of your build host.</div><div class='add'>+</div><div class='add'>+* Continue the guide on the build host (e.g. with ':ref:`Ensure to have enough</div><div class='add'>+  free space for building [...] &lt;diskspace_bissbs&gt;`').</div><div class='add'>+</div><div class='add'>+* When you reach ':ref:`Start preparing a kernel build configuration[...]</div><div class='add'>+  &lt;oldconfig_bissbs&gt;`': before running ``make olddefconfig`` for the first time,</div><div class='add'>+  execute the following command to base your configuration on the one from the</div><div class='add'>+  test machine's 'working' kernel::</div><div class='add'>+</div><div class='add'>+    cp ~/test-machine-config-working ~/linux/.config</div><div class='add'>+</div><div class='add'>+* During the next step to ':ref:`disable any apparently superfluous kernel</div><div class='add'>+  modules &lt;localmodconfig_bissbs&gt;`' use the following command instead::</div><div class='ctx'> </div><div class='del'>-Further sources</div><div class='del'>----------------</div><div class='add'>+    yes '' | make localmodconfig LSMOD=~/lsmod_foo-machine localmodconfig</div><div class='add'>+</div><div class='add'>+* Continue the guide, but ignore the instructions outlining how to compile,</div><div class='add'>+  install, and reboot into a kernel every time they come up. Instead build</div><div class='add'>+  like this::</div><div class='add'>+</div><div class='add'>+    cp ~/kernel-config-working .config</div><div class='add'>+    make olddefconfig &amp;&amp;</div><div class='add'>+    make -j $(nproc --all) targz-pkg</div><div class='add'>+</div><div class='add'>+  This will generate a gzipped tar file whose name is printed in the last</div><div class='add'>+  line shown; for example, a kernel with the kernelrelease identifier</div><div class='add'>+  '6.0.0-rc1-local-g928a87efa423' built for x86 machines usually will</div><div class='add'>+  be stored as '~/linux/linux-6.0.0-rc1-local-g928a87efa423-x86.tar.gz'.</div><div class='add'>+</div><div class='add'>+  Copy that file to your test machine's home directory.</div><div class='add'>+</div><div class='add'>+* Switch to the test machine to check if you have enough space to hold another</div><div class='add'>+  kernel. Then extract the file you transferred::</div><div class='add'>+</div><div class='add'>+    sudo tar -xvzf ~/linux-6.0.0-rc1-local-g928a87efa423-x86.tar.gz -C /</div><div class='add'>+</div><div class='add'>+  Afterwards :ref:`generate the initramfs and add the kernel to your boot</div><div class='add'>+  loader's configuration &lt;install_bisref&gt;`; on some distributions the following</div><div class='add'>+  command will take care of both these tasks::</div><div class='add'>+</div><div class='add'>+    sudo /sbin/installkernel 6.0.0-rc1-local-g928a87efa423 /boot/vmlinuz-6.0.0-rc1-local-g928a87efa423</div><div class='add'>+</div><div class='add'>+  Now reboot and ensure you started the intended kernel.</div><div class='add'>+</div><div class='add'>+This approach even works when building for another architecture: just install</div><div class='add'>+cross-compilers and add the appropriate parameters to every invocation of make</div><div class='add'>+(e.g. ``make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- [...]``).</div><div class='add'>+</div><div class='add'>+Additional reading material</div><div class='add'>+---------------------------</div><div class='ctx'> </div><div class='ctx'> * The `man page for 'git bisect' &lt;https://git-scm.com/docs/git-bisect&gt;`_ and</div><div class='ctx'>   `fighting regressions with 'git bisect' &lt;https://git-scm.com/docs/git-bisect-lk2009.html&gt;`_</div><div class='head'>diff --git a/Documentation/arch/m68k/buddha-driver.rst b/Documentation/arch/m68k/buddha-driver.rst<br/>index 20e401413991..5d1bc824978b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/m68k/buddha-driver.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/m68k/buddha-driver.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/m68k/buddha-driver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/m68k/buddha-driver.rst</a></div><div class='hunk'>@@ -173,7 +173,7 @@ When accessing IDE registers with A6=1 (for example $84x),</div><div class='ctx'> the timing will always be mode 0 8-bit compatible, no matter</div><div class='ctx'> what you have selected in the speed register:</div><div class='ctx'> </div><div class='del'>-781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.</div><div class='add'>+781ns select, IOR/IOW after 4 clock cycles (=314ns) active.</div><div class='ctx'> </div><div class='ctx'> All  the  timings with a very short select-signal (the 355ns</div><div class='ctx'> fast  accesses)  depend  on the accelerator card used in the</div><div class='head'>diff --git a/Documentation/arch/s390/index.rst b/Documentation/arch/s390/index.rst<br/>index 73c79bf586fd..e75a6e5d2505 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/s390/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/s390/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/s390/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/s390/index.rst</a></div><div class='hunk'>@@ -8,6 +8,7 @@ s390 Architecture</div><div class='ctx'>     cds</div><div class='ctx'>     3270</div><div class='ctx'>     driver-model</div><div class='add'>+    mm</div><div class='ctx'>     monreader</div><div class='ctx'>     qeth</div><div class='ctx'>     s390dbf</div><div class='head'>diff --git a/Documentation/arch/s390/mm.rst b/Documentation/arch/s390/mm.rst<br/>new file mode 100644<br/>index 000000000000..084adad5eef9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/s390/mm.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/s390/mm.rst</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=================</div><div class='add'>+Memory Management</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Virtual memory layout</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+</div><div class='add'>+ - Some aspects of the virtual memory layout setup are not</div><div class='add'>+   clarified (number of page levels, alignment, DMA memory).</div><div class='add'>+</div><div class='add'>+ - Unused gaps in the virtual memory layout could be present</div><div class='add'>+   or not - depending on how partucular system is configured.</div><div class='add'>+   No page tables are created for the unused gaps.</div><div class='add'>+</div><div class='add'>+ - The virtual memory regions are tracked or untracked by KASAN</div><div class='add'>+   instrumentation, as well as the KASAN shadow memory itself is</div><div class='add'>+   created only when CONFIG_KASAN configuration option is enabled.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  =============================================================================</div><div class='add'>+  |    Physical      |	  Virtual	| VM area description</div><div class='add'>+  =============================================================================</div><div class='add'>+  +- 0 --------------+- 0 --------------+</div><div class='add'>+  |		     | S390_lowcore	| Low-address memory</div><div class='add'>+  |		     +- 8 KB -----------+</div><div class='add'>+  |		     |			|</div><div class='add'>+  |		     |			|</div><div class='add'>+  |		     | ... unused gap	| KASAN untracked</div><div class='add'>+  |		     |			|</div><div class='add'>+  +- AMODE31_START --+- AMODE31_START --+ .amode31 rand. phys/virt start</div><div class='add'>+  |.amode31 text/data|.amode31 text/data| KASAN untracked</div><div class='add'>+  +- AMODE31_END ----+- AMODE31_END ----+ .amode31 rand. phys/virt end (&lt;2GB)</div><div class='add'>+  |		     |			|</div><div class='add'>+  |		     |			|</div><div class='add'>+  +- __kaslr_offset_phys		| kernel rand. phys start</div><div class='add'>+  |		     |			|</div><div class='add'>+  | kernel text/data |			|</div><div class='add'>+  |		     |			|</div><div class='add'>+  +------------------+			| kernel phys end</div><div class='add'>+  |		     |			|</div><div class='add'>+  |		     |			|</div><div class='add'>+  |		     |			|</div><div class='add'>+  |		     |			|</div><div class='add'>+  +- ident_map_size -+			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |	... unused gap	| KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +- __identity_base + identity mapping start (&gt;= 2GB)</div><div class='add'>+		     |			|</div><div class='add'>+		     | identity		| phys == virt - __identity_base</div><div class='add'>+		     | mapping		| virt == phys + __identity_base</div><div class='add'>+		     |			|</div><div class='add'>+		     |			| KASAN tracked</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     |			|</div><div class='add'>+		     +---- vmemmap -----+ 'struct page' array start</div><div class='add'>+		     |			|</div><div class='add'>+		     | virtually mapped |</div><div class='add'>+		     | memory map	| KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +- __abs_lowcore --+</div><div class='add'>+		     |			|</div><div class='add'>+		     | Absolute Lowcore | KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +- __memcpy_real_area</div><div class='add'>+		     |			|</div><div class='add'>+		     |	Real Memory Copy| KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +- VMALLOC_START --+ vmalloc area start</div><div class='add'>+		     |			| KASAN untracked or</div><div class='add'>+		     |	vmalloc area	| KASAN shallowly populated in case</div><div class='add'>+		     |			|	CONFIG_KASAN_VMALLOC=y</div><div class='add'>+		     +- MODULES_VADDR --+ modules area start</div><div class='add'>+		     |			| KASAN allocated per module or</div><div class='add'>+		     |	modules area	| KASAN shallowly populated in case</div><div class='add'>+		     |			|	CONFIG_KASAN_VMALLOC=y</div><div class='add'>+		     +- __kaslr_offset -+ kernel rand. virt start</div><div class='add'>+		     |			| KASAN tracked</div><div class='add'>+		     | kernel text/data | phys == (kvirt - __kaslr_offset) +</div><div class='add'>+		     |			|	  __kaslr_offset_phys</div><div class='add'>+		     +- kernel .bss end + kernel rand. virt end</div><div class='add'>+		     |			|</div><div class='add'>+		     |	... unused gap	| KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +------------------+ UltraVisor Secure Storage limit</div><div class='add'>+		     |			|</div><div class='add'>+		     |	... unused gap	| KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +KASAN_SHADOW_START+ KASAN shadow memory start</div><div class='add'>+		     |			|</div><div class='add'>+		     |	 KASAN shadow	| KASAN untracked</div><div class='add'>+		     |			|</div><div class='add'>+		     +------------------+ ASCE limit</div><div class='head'>diff --git a/Documentation/arch/s390/vfio-ap.rst b/Documentation/arch/s390/vfio-ap.rst<br/>index 929ee1c1c940..ea744cbc8687 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/s390/vfio-ap.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/s390/vfio-ap.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/s390/vfio-ap.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/s390/vfio-ap.rst</a></div><div class='hunk'>@@ -380,6 +380,36 @@ matrix device.</div><div class='ctx'>     control_domains:</div><div class='ctx'>       A read-only file for displaying the control domain numbers assigned to the</div><div class='ctx'>       vfio_ap mediated device.</div><div class='add'>+    ap_config:</div><div class='add'>+      A read/write file that, when written to, allows all three of the</div><div class='add'>+      vfio_ap mediated device's ap matrix masks to be replaced in one shot.</div><div class='add'>+      Three masks are given, one for adapters, one for domains, and one for</div><div class='add'>+      control domains. If the given state cannot be set then no changes are</div><div class='add'>+      made to the vfio-ap mediated device.</div><div class='add'>+</div><div class='add'>+      The format of the data written to ap_config is as follows:</div><div class='add'>+      {amask},{dmask},{cmask}\n</div><div class='add'>+</div><div class='add'>+      \n is a newline character.</div><div class='add'>+</div><div class='add'>+      amask, dmask, and cmask are masks identifying which adapters, domains,</div><div class='add'>+      and control domains should be assigned to the mediated device.</div><div class='add'>+</div><div class='add'>+      The format of a mask is as follows:</div><div class='add'>+      0xNN..NN</div><div class='add'>+</div><div class='add'>+      Where NN..NN is 64 hexadecimal characters representing a 256-bit value.</div><div class='add'>+      The leftmost (highest order) bit represents adapter/domain 0.</div><div class='add'>+</div><div class='add'>+      For an example set of masks that represent your mdev's current</div><div class='add'>+      configuration, simply cat ap_config.</div><div class='add'>+</div><div class='add'>+      Setting an adapter or domain number greater than the maximum allowed for</div><div class='add'>+      the system will result in an error.</div><div class='add'>+</div><div class='add'>+      This attribute is intended to be used by automation. End users would be</div><div class='add'>+      better served using the respective assign/unassign attributes for</div><div class='add'>+      adapters, domains, and control domains.</div><div class='ctx'> </div><div class='ctx'> * functions:</div><div class='ctx'> </div><div class='hunk'>@@ -550,7 +580,7 @@ These are the steps:</div><div class='ctx'>    following Kconfig elements selected:</div><div class='ctx'>    * IOMMU_SUPPORT</div><div class='ctx'>    * S390</div><div class='del'>-   * ZCRYPT</div><div class='add'>+   * AP</div><div class='ctx'>    * VFIO</div><div class='ctx'>    * KVM</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arch/sparc/oradax/dax-hv-api.txt b/Documentation/arch/sparc/oradax/dax-hv-api.txt<br/>index 7ecd0bf4957b..ef1a4c2bf08b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/sparc/oradax/dax-hv-api.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/sparc/oradax/dax-hv-api.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/sparc/oradax/dax-hv-api.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/sparc/oradax/dax-hv-api.txt</a></div><div class='hunk'>@@ -41,7 +41,7 @@ Chapter 36. Coprocessor services</div><div class='ctx'>         submissions until they succeed; waiting for an outstanding CCB to complete is not necessary, and would</div><div class='ctx'>         not be a guarantee that a future submission would succeed.</div><div class='ctx'> </div><div class='del'>-        The availablility of DAX coprocessor command service is indicated by the presence of the DAX virtual</div><div class='add'>+        The availability of DAX coprocessor command service is indicated by the presence of the DAX virtual</div><div class='ctx'>         device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device</div><div class='ctx'>         node�).</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/resctrl.rst<br/>index 6c245582d8fb..627e23869bca 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/resctrl.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/x86/resctrl.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/resctrl.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/x86/resctrl.rst</a></div><div class='hunk'>@@ -446,6 +446,12 @@ during mkdir.</div><div class='ctx'> max_threshold_occupancy is a user configurable value to determine the</div><div class='ctx'> occupancy at which an RMID can be freed.</div><div class='ctx'> </div><div class='add'>+The mon_llc_occupancy_limbo tracepoint gives the precise occupancy in bytes</div><div class='add'>+for a subset of RMID that are not immediately available for allocation.</div><div class='add'>+This can't be relied on to produce output every second, it may be necessary</div><div class='add'>+to attempt to create an empty monitor group to force an update. Output may</div><div class='add'>+only be produced if creation of a control or monitor group fails.</div><div class='add'>+</div><div class='ctx'> Schemata files - general concepts</div><div class='ctx'> ---------------------------------</div><div class='ctx'> Each line in the file describes one resource. The line starts with</div><div class='head'>diff --git a/Documentation/arch/x86/xstate.rst b/Documentation/arch/x86/xstate.rst<br/>index ae5c69e48b11..cec05ac464c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/xstate.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/arch/x86/xstate.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/xstate.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/arch/x86/xstate.rst</a></div><div class='hunk'>@@ -138,7 +138,7 @@ Note this example does not include the sigaltstack preparation.</div><div class='ctx'> Dynamic features in signal frames</div><div class='ctx'> ---------------------------------</div><div class='ctx'> </div><div class='del'>-Dynamcally enabled features are not written to the signal frame upon signal</div><div class='add'>+Dynamically enabled features are not written to the signal frame upon signal</div><div class='ctx'> entry if the feature is in its initial configuration.  This differs from</div><div class='ctx'> non-dynamic features which are always written regardless of their</div><div class='ctx'> configuration.  Signal handlers can examine the XSAVE buffer's XSTATE_BV</div><div class='head'>diff --git a/Documentation/atomic_t.txt b/Documentation/atomic_t.txt<br/>index d7adc6d543db..bee3b1bca9a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/atomic_t.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/atomic_t.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/atomic_t.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/atomic_t.txt</a></div><div class='hunk'>@@ -171,14 +171,14 @@ The rule of thumb:</div><div class='ctx'>  - RMW operations that are conditional are unordered on FAILURE,</div><div class='ctx'>    otherwise the above rules apply.</div><div class='ctx'> </div><div class='del'>-Except of course when an operation has an explicit ordering like:</div><div class='add'>+Except of course when a successful operation has an explicit ordering like:</div><div class='ctx'> </div><div class='ctx'>  {}_relaxed: unordered</div><div class='ctx'>  {}_acquire: the R of the RMW (or atomic_read) is an ACQUIRE</div><div class='ctx'>  {}_release: the W of the RMW (or atomic_set)  is a  RELEASE</div><div class='ctx'> </div><div class='ctx'> Where 'unordered' is against other memory locations. Address dependencies are</div><div class='del'>-not defeated.</div><div class='add'>+not defeated.  Conditional operations are still unordered on FAILURE.</div><div class='ctx'> </div><div class='ctx'> Fully ordered primitives are ordered against everything prior and everything</div><div class='ctx'> subsequent. Therefore a fully ordered primitive is like having an smp_mb()</div><div class='head'>diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst<br/>index a5ab00ac0b14..997560abadab 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/bpf/standardization/instruction-set.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/bpf/standardization/instruction-set.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/bpf/standardization/instruction-set.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/bpf/standardization/instruction-set.rst</a></div><div class='hunk'>@@ -5,7 +5,11 @@</div><div class='ctx'> BPF Instruction Set Architecture (ISA)</div><div class='ctx'> ======================================</div><div class='ctx'> </div><div class='del'>-This document specifies the BPF instruction set architecture (ISA).</div><div class='add'>+eBPF (which is no longer an acronym for anything), also commonly</div><div class='add'>+referred to as BPF, is a technology with origins in the Linux kernel</div><div class='add'>+that can run untrusted programs in a privileged context such as an</div><div class='add'>+operating system kernel. This document specifies the BPF instruction</div><div class='add'>+set architecture (ISA).</div><div class='ctx'> </div><div class='ctx'> Documentation conventions</div><div class='ctx'> =========================</div><div class='hunk'>@@ -43,7 +47,7 @@ a type's signedness (`S`) and bit width (`N`), respectively.</div><div class='ctx'>   ===== =========</div><div class='ctx'> </div><div class='ctx'> For example, `u32` is a type whose valid values are all the 32-bit unsigned</div><div class='del'>-numbers and `s16` is a types whose valid values are all the 16-bit signed</div><div class='add'>+numbers and `s16` is a type whose valid values are all the 16-bit signed</div><div class='ctx'> numbers.</div><div class='ctx'> </div><div class='ctx'> Functions</div><div class='hunk'>@@ -108,7 +112,7 @@ conformance group means it must support all instructions in that conformance</div><div class='ctx'> group.</div><div class='ctx'> </div><div class='ctx'> The use of named conformance groups enables interoperability between a runtime</div><div class='del'>-that executes instructions, and tools as such compilers that generate</div><div class='add'>+that executes instructions, and tools such as compilers that generate</div><div class='ctx'> instructions for the runtime.  Thus, capability discovery in terms of</div><div class='ctx'> conformance groups might be done manually by users or automatically by tools.</div><div class='ctx'> </div><div class='hunk'>@@ -181,10 +185,13 @@ A basic instruction is encoded as follows::</div><div class='ctx'>     (`64-bit immediate instructions`_ reuse this field for other purposes)</div><div class='ctx'> </div><div class='ctx'>   **dst_reg**</div><div class='del'>-    destination register number (0-10)</div><div class='add'>+    destination register number (0-10), unless otherwise specified</div><div class='add'>+    (future instructions might reuse this field for other purposes)</div><div class='ctx'> </div><div class='ctx'> **offset**</div><div class='del'>-  signed integer offset used with pointer arithmetic</div><div class='add'>+  signed integer offset used with pointer arithmetic, except where</div><div class='add'>+  otherwise specified (some arithmetic instructions reuse this field</div><div class='add'>+  for other purposes)</div><div class='ctx'> </div><div class='ctx'> **imm**</div><div class='ctx'>   signed integer immediate value</div><div class='hunk'>@@ -228,10 +235,12 @@ This is depicted in the following figure::</div><div class='ctx'>   operation to perform, encoded as explained above</div><div class='ctx'> </div><div class='ctx'> **regs**</div><div class='del'>-  The source and destination register numbers, encoded as explained above</div><div class='add'>+  The source and destination register numbers (unless otherwise</div><div class='add'>+  specified), encoded as explained above</div><div class='ctx'> </div><div class='ctx'> **offset**</div><div class='del'>-  signed integer offset used with pointer arithmetic</div><div class='add'>+  signed integer offset used with pointer arithmetic, unless</div><div class='add'>+  otherwise specified</div><div class='ctx'> </div><div class='ctx'> **imm**</div><div class='ctx'>   signed integer immediate value</div><div class='hunk'>@@ -342,8 +351,8 @@ where '(u32)' indicates that the upper 32 bits are zeroed.</div><div class='ctx'> </div><div class='ctx'>   dst = dst ^ imm</div><div class='ctx'> </div><div class='del'>-Note that most instructions have instruction offset of 0. Only three instructions</div><div class='del'>-(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero offset.</div><div class='add'>+Note that most arithmetic instructions have 'offset' set to 0. Only three instructions</div><div class='add'>+(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero 'offset'.</div><div class='ctx'> </div><div class='ctx'> Division, multiplication, and modulo operations for ``ALU`` are part</div><div class='ctx'> of the "divmul32" conformance group, and division, multiplication, and</div><div class='hunk'>@@ -365,15 +374,15 @@ Note that there are varying definitions of the signed modulo operation</div><div class='ctx'> when the dividend or divisor are negative, where implementations often</div><div class='ctx'> vary by language such that Python, Ruby, etc.  differ from C, Go, Java,</div><div class='ctx'> etc. This specification requires that signed modulo use truncated division</div><div class='del'>-(where -13 % 3 == -1) as implemented in C, Go, etc.:</div><div class='add'>+(where -13 % 3 == -1) as implemented in C, Go, etc.::</div><div class='ctx'> </div><div class='ctx'>    a % n = a - n * trunc(a / n)</div><div class='ctx'> </div><div class='ctx'> The ``MOVSX`` instruction does a move operation with sign extension.</div><div class='del'>-``{MOVSX, X, ALU}`` :term:`sign extends&lt;Sign Extend&gt;` 8-bit and 16-bit operands into 32</div><div class='del'>-bit operands, and zeroes the remaining upper 32 bits.</div><div class='add'>+``{MOVSX, X, ALU}`` :term:`sign extends&lt;Sign Extend&gt;` 8-bit and 16-bit operands into</div><div class='add'>+32-bit operands, and zeroes the remaining upper 32 bits.</div><div class='ctx'> ``{MOVSX, X, ALU64}`` :term:`sign extends&lt;Sign Extend&gt;` 8-bit, 16-bit, and 32-bit</div><div class='del'>-operands into 64 bit operands.  Unlike other arithmetic instructions,</div><div class='add'>+operands into 64-bit operands.  Unlike other arithmetic instructions,</div><div class='ctx'> ``MOVSX`` is only defined for register source operands (``X``).</div><div class='ctx'> </div><div class='ctx'> The ``NEG`` instruction is only defined when the source bit is clear</div><div class='hunk'>@@ -411,19 +420,19 @@ conformance group.</div><div class='ctx'> </div><div class='ctx'> Examples:</div><div class='ctx'> </div><div class='del'>-``{END, TO_LE, ALU}`` with imm = 16/32/64 means::</div><div class='add'>+``{END, TO_LE, ALU}`` with 'imm' = 16/32/64 means::</div><div class='ctx'> </div><div class='ctx'>   dst = htole16(dst)</div><div class='ctx'>   dst = htole32(dst)</div><div class='ctx'>   dst = htole64(dst)</div><div class='ctx'> </div><div class='del'>-``{END, TO_BE, ALU}`` with imm = 16/32/64 means::</div><div class='add'>+``{END, TO_BE, ALU}`` with 'imm' = 16/32/64 means::</div><div class='ctx'> </div><div class='ctx'>   dst = htobe16(dst)</div><div class='ctx'>   dst = htobe32(dst)</div><div class='ctx'>   dst = htobe64(dst)</div><div class='ctx'> </div><div class='del'>-``{END, TO_LE, ALU64}`` with imm = 16/32/64 means::</div><div class='add'>+``{END, TO_LE, ALU64}`` with 'imm' = 16/32/64 means::</div><div class='ctx'> </div><div class='ctx'>   dst = bswap16(dst)</div><div class='ctx'>   dst = bswap32(dst)</div><div class='hunk'>@@ -438,27 +447,33 @@ otherwise identical operations, and indicates the base64 conformance</div><div class='ctx'> group unless otherwise specified.</div><div class='ctx'> The 'code' field encodes the operation as below:</div><div class='ctx'> </div><div class='del'>-========  =====  =======  ===============================  ===================================================</div><div class='del'>-code      value  src_reg  description                      notes</div><div class='del'>-========  =====  =======  ===============================  ===================================================</div><div class='del'>-JA        0x0    0x0      PC += offset                     {JA, K, JMP} only</div><div class='del'>-JA        0x0    0x0      PC += imm                        {JA, K, JMP32} only</div><div class='add'>+========  =====  =======  =================================  ===================================================</div><div class='add'>+code      value  src_reg  description                        notes</div><div class='add'>+========  =====  =======  =================================  ===================================================</div><div class='add'>+JA        0x0    0x0      PC += offset                       {JA, K, JMP} only</div><div class='add'>+JA        0x0    0x0      PC += imm                          {JA, K, JMP32} only</div><div class='ctx'> JEQ       0x1    any      PC += offset if dst == src</div><div class='del'>-JGT       0x2    any      PC += offset if dst &gt; src        unsigned</div><div class='del'>-JGE       0x3    any      PC += offset if dst &gt;= src       unsigned</div><div class='add'>+JGT       0x2    any      PC += offset if dst &gt; src          unsigned</div><div class='add'>+JGE       0x3    any      PC += offset if dst &gt;= src         unsigned</div><div class='ctx'> JSET      0x4    any      PC += offset if dst &amp; src</div><div class='ctx'> JNE       0x5    any      PC += offset if dst != src</div><div class='del'>-JSGT      0x6    any      PC += offset if dst &gt; src        signed</div><div class='del'>-JSGE      0x7    any      PC += offset if dst &gt;= src       signed</div><div class='del'>-CALL      0x8    0x0      call helper function by address  {CALL, K, JMP} only, see `Helper functions`_</div><div class='del'>-CALL      0x8    0x1      call PC += imm                   {CALL, K, JMP} only, see `Program-local functions`_</div><div class='del'>-CALL      0x8    0x2      call helper function by BTF ID   {CALL, K, JMP} only, see `Helper functions`_</div><div class='del'>-EXIT      0x9    0x0      return                           {CALL, K, JMP} only</div><div class='del'>-JLT       0xa    any      PC += offset if dst &lt; src        unsigned</div><div class='del'>-JLE       0xb    any      PC += offset if dst &lt;= src       unsigned</div><div class='del'>-JSLT      0xc    any      PC += offset if dst &lt; src        signed</div><div class='del'>-JSLE      0xd    any      PC += offset if dst &lt;= src       signed</div><div class='del'>-========  =====  =======  ===============================  ===================================================</div><div class='add'>+JSGT      0x6    any      PC += offset if dst &gt; src          signed</div><div class='add'>+JSGE      0x7    any      PC += offset if dst &gt;= src         signed</div><div class='add'>+CALL      0x8    0x0      call helper function by static ID  {CALL, K, JMP} only, see `Helper functions`_</div><div class='add'>+CALL      0x8    0x1      call PC += imm                     {CALL, K, JMP} only, see `Program-local functions`_</div><div class='add'>+CALL      0x8    0x2      call helper function by BTF ID     {CALL, K, JMP} only, see `Helper functions`_</div><div class='add'>+EXIT      0x9    0x0      return                             {CALL, K, JMP} only</div><div class='add'>+JLT       0xa    any      PC += offset if dst &lt; src          unsigned</div><div class='add'>+JLE       0xb    any      PC += offset if dst &lt;= src         unsigned</div><div class='add'>+JSLT      0xc    any      PC += offset if dst &lt; src          signed</div><div class='add'>+JSLE      0xd    any      PC += offset if dst &lt;= src         signed</div><div class='add'>+========  =====  =======  =================================  ===================================================</div><div class='add'>+</div><div class='add'>+where 'PC' denotes the program counter, and the offset to increment by</div><div class='add'>+is in units of 64-bit instructions relative to the instruction following</div><div class='add'>+the jump instruction.  Thus 'PC += 1' skips execution of the next</div><div class='add'>+instruction if it's a basic instruction or results in undefined behavior</div><div class='add'>+if the next instruction is a 128-bit wide instruction.</div><div class='ctx'> </div><div class='ctx'> The BPF program needs to store the return value into register R0 before doing an</div><div class='ctx'> ``EXIT``.</div><div class='hunk'>@@ -475,7 +490,7 @@ where 's&gt;=' indicates a signed '&gt;=' comparison.</div><div class='ctx'> </div><div class='ctx'>   gotol +imm</div><div class='ctx'> </div><div class='del'>-where 'imm' means the branch offset comes from insn 'imm' field.</div><div class='add'>+where 'imm' means the branch offset comes from the 'imm' field.</div><div class='ctx'> </div><div class='ctx'> Note that there are two flavors of ``JA`` instructions. The</div><div class='ctx'> ``JMP`` class permits a 16-bit jump offset specified by the 'offset'</div><div class='hunk'>@@ -493,26 +508,26 @@ Helper functions</div><div class='ctx'> Helper functions are a concept whereby BPF programs can call into a</div><div class='ctx'> set of function calls exposed by the underlying platform.</div><div class='ctx'> </div><div class='del'>-Historically, each helper function was identified by an address</div><div class='del'>-encoded in the imm field.  The available helper functions may differ</div><div class='del'>-for each program type, but address values are unique across all program types.</div><div class='add'>+Historically, each helper function was identified by a static ID</div><div class='add'>+encoded in the 'imm' field.  The available helper functions may differ</div><div class='add'>+for each program type, but static IDs are unique across all program types.</div><div class='ctx'> </div><div class='ctx'> Platforms that support the BPF Type Format (BTF) support identifying</div><div class='del'>-a helper function by a BTF ID encoded in the imm field, where the BTF ID</div><div class='add'>+a helper function by a BTF ID encoded in the 'imm' field, where the BTF ID</div><div class='ctx'> identifies the helper name and type.</div><div class='ctx'> </div><div class='ctx'> Program-local functions</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> Program-local functions are functions exposed by the same BPF program as the</div><div class='ctx'> caller, and are referenced by offset from the call instruction, similar to</div><div class='del'>-``JA``.  The offset is encoded in the imm field of the call instruction.</div><div class='del'>-A ``EXIT`` within the program-local function will return to the caller.</div><div class='add'>+``JA``.  The offset is encoded in the 'imm' field of the call instruction.</div><div class='add'>+An ``EXIT`` within the program-local function will return to the caller.</div><div class='ctx'> </div><div class='ctx'> Load and store instructions</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='ctx'> For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the</div><div class='del'>-8-bit 'opcode' field is divided as::</div><div class='add'>+8-bit 'opcode' field is divided as follows::</div><div class='ctx'> </div><div class='ctx'>   +-+-+-+-+-+-+-+-+</div><div class='ctx'>   |mode |sz |class|</div><div class='hunk'>@@ -580,7 +595,7 @@ instructions that transfer data between a register and memory.</div><div class='ctx'> </div><div class='ctx'>   dst = *(signed size *) (src + offset)</div><div class='ctx'> </div><div class='del'>-Where size is one of: ``B``, ``H``, or ``W``, and</div><div class='add'>+Where '&lt;size&gt;' is one of: ``B``, ``H``, or ``W``, and</div><div class='ctx'> 'signed size' is one of: s8, s16, or s32.</div><div class='ctx'> </div><div class='ctx'> Atomic operations</div><div class='hunk'>@@ -662,11 +677,11 @@ src_reg  pseudocode                                 imm type     dst type</div><div class='ctx'> =======  =========================================  ===========  ==============</div><div class='ctx'> 0x0      dst = (next_imm &lt;&lt; 32) | imm               integer      integer</div><div class='ctx'> 0x1      dst = map_by_fd(imm)                       map fd       map</div><div class='del'>-0x2      dst = map_val(map_by_fd(imm)) + next_imm   map fd       data pointer</div><div class='del'>-0x3      dst = var_addr(imm)                        variable id  data pointer</div><div class='del'>-0x4      dst = code_addr(imm)                       integer      code pointer</div><div class='add'>+0x2      dst = map_val(map_by_fd(imm)) + next_imm   map fd       data address</div><div class='add'>+0x3      dst = var_addr(imm)                        variable id  data address</div><div class='add'>+0x4      dst = code_addr(imm)                       integer      code address</div><div class='ctx'> 0x5      dst = map_by_idx(imm)                      map index    map</div><div class='del'>-0x6      dst = map_val(map_by_idx(imm)) + next_imm  map index    data pointer</div><div class='add'>+0x6      dst = map_val(map_by_idx(imm)) + next_imm  map index    data address</div><div class='ctx'> =======  =========================================  ===========  ==============</div><div class='ctx'> </div><div class='ctx'> where</div><div class='head'>diff --git a/Documentation/conf.py b/Documentation/conf.py<br/>index d148f3e8dd57..0c2205d536b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/conf.py?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/conf.py</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/conf.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/conf.py</a></div><div class='hunk'>@@ -75,6 +75,8 @@ if major &gt;= 3:</div><div class='ctx'>             "__rcu",</div><div class='ctx'>             "__user",</div><div class='ctx'>             "__force",</div><div class='add'>+            "__counted_by_le",</div><div class='add'>+            "__counted_by_be",</div><div class='ctx'> </div><div class='ctx'>             # include/linux/compiler_attributes.h:</div><div class='ctx'>             "__alias",</div><div class='head'>diff --git a/Documentation/core-api/dma-api-howto.rst b/Documentation/core-api/dma-api-howto.rst<br/>index e8a55f9d61db..0bf31b6c4383 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/dma-api-howto.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/dma-api-howto.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/dma-api-howto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/core-api/dma-api-howto.rst</a></div><div class='hunk'>@@ -203,13 +203,33 @@ setting the DMA mask fails.  In this manner, if a user of your driver reports</div><div class='ctx'> that performance is bad or that the device is not even detected, you can ask</div><div class='ctx'> them for the kernel messages to find out exactly why.</div><div class='ctx'> </div><div class='del'>-The standard 64-bit addressing device would do something like this::</div><div class='add'>+The 24-bit addressing device would do something like this::</div><div class='ctx'> </div><div class='del'>-	if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) {</div><div class='add'>+	if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(24))) {</div><div class='ctx'> 		dev_warn(dev, "mydev: No suitable DMA available\n");</div><div class='ctx'> 		goto ignore_this_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+The standard 64-bit addressing device would do something like this::</div><div class='add'>+</div><div class='add'>+	dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))</div><div class='add'>+</div><div class='add'>+dma_set_mask_and_coherent() never return fail when DMA_BIT_MASK(64). Typical</div><div class='add'>+error code like::</div><div class='add'>+</div><div class='add'>+	/* Wrong code */</div><div class='add'>+	if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)))</div><div class='add'>+		dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))</div><div class='add'>+</div><div class='add'>+dma_set_mask_and_coherent() will never return failure when bigger than 32.</div><div class='add'>+So typical code like::</div><div class='add'>+</div><div class='add'>+	/* Recommended code */</div><div class='add'>+	if (support_64bit)</div><div class='add'>+		dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));</div><div class='add'>+	else</div><div class='add'>+		dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));</div><div class='add'>+</div><div class='ctx'> If the device only supports 32-bit addressing for descriptors in the</div><div class='ctx'> coherent allocations, but supports full 64-bits for streaming mappings</div><div class='ctx'> it would look like this::</div><div class='head'>diff --git a/Documentation/core-api/entry.rst b/Documentation/core-api/entry.rst<br/>index e12f22ab33c7..a15f9b1767a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/entry.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/entry.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/entry.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/core-api/entry.rst</a></div><div class='hunk'>@@ -18,7 +18,7 @@ exceptions`_, `NMI and NMI-like exceptions`_.</div><div class='ctx'> Non-instrumentable code - noinstr</div><div class='ctx'> ---------------------------------</div><div class='ctx'> </div><div class='del'>-Most instrumentation facilities depend on RCU, so intrumentation is prohibited</div><div class='add'>+Most instrumentation facilities depend on RCU, so instrumentation is prohibited</div><div class='ctx'> for entry code before RCU starts watching and exit code after RCU stops</div><div class='ctx'> watching. In addition, many architectures must save and restore register state,</div><div class='ctx'> which means that (for example) a breakpoint in the breakpoint entry code would</div><div class='head'>diff --git a/Documentation/core-api/printk-index.rst b/Documentation/core-api/printk-index.rst<br/>index 3062f37d119b..1979c5dd32fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/printk-index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/printk-index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/printk-index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/core-api/printk-index.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> Printk Index</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-There are many ways how to monitor the state of the system. One important</div><div class='add'>+There are many ways to monitor the state of the system. One important</div><div class='ctx'> source of information is the system log. It provides a lot of information,</div><div class='ctx'> including more or less important warnings and error messages.</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +101,7 @@ their own wrappers adding __printk_index_emit().</div><div class='ctx'> </div><div class='ctx'> Only few subsystem specific wrappers have been updated so far,</div><div class='ctx'> for example, dev_printk(). As a result, the printk formats from</div><div class='del'>-some subsystes can be missing in the printk index.</div><div class='add'>+some subsystems can be missing in the printk index.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Subsystem specific prefix</div><div class='head'>diff --git a/Documentation/core-api/workqueue.rst b/Documentation/core-api/workqueue.rst<br/>index ed73c612174d..bcc370c876be 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/workqueue.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/core-api/workqueue.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/workqueue.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/core-api/workqueue.rst</a></div><div class='hunk'>@@ -671,7 +671,7 @@ configuration, worker pools and how workqueues map to the pools: ::</div><div class='ctx'>   events_unbound           unbound  9  9 10 10  8</div><div class='ctx'>   events_freezable         percpu   0  2  4  6</div><div class='ctx'>   events_power_efficient   percpu   0  2  4  6</div><div class='del'>-  events_freezable_power_  percpu   0  2  4  6</div><div class='add'>+  events_freezable_pwr_ef  percpu   0  2  4  6</div><div class='ctx'>   rcu_gp                   percpu   0  2  4  6</div><div class='ctx'>   rcu_par_gp               percpu   0  2  4  6</div><div class='ctx'>   slub_flushwq             percpu   0  2  4  6</div><div class='hunk'>@@ -694,7 +694,7 @@ Use tools/workqueue/wq_monitor.py to monitor workqueue operations: ::</div><div class='ctx'>   events_unbound              38306     0      0.1       -       7       -       -</div><div class='ctx'>   events_freezable                0     0      0.0       0       0       -       -</div><div class='ctx'>   events_power_efficient      29598     0      0.2       0       0       -       -</div><div class='del'>-  events_freezable_power_        10     0      0.0       0       0       -       -</div><div class='add'>+  events_freezable_pwr_ef        10     0      0.0       0       0       -       -</div><div class='ctx'>   sock_diag_events                0     0      0.0       0       0       -       -</div><div class='ctx'> </div><div class='ctx'>                               total  infl  CPUtime  CPUhog CMW/RPR  mayday rescued</div><div class='hunk'>@@ -704,7 +704,7 @@ Use tools/workqueue/wq_monitor.py to monitor workqueue operations: ::</div><div class='ctx'>   events_unbound              38322     0      0.1       -       7       -       -</div><div class='ctx'>   events_freezable                0     0      0.0       0       0       -       -</div><div class='ctx'>   events_power_efficient      29603     0      0.2       0       0       -       -</div><div class='del'>-  events_freezable_power_        10     0      0.0       0       0       -       -</div><div class='add'>+  events_freezable_pwr_ef        10     0      0.0       0       0       -       -</div><div class='ctx'>   sock_diag_events                0     0      0.0       0       0       -       -</div><div class='ctx'> </div><div class='ctx'>   ...</div><div class='head'>diff --git a/Documentation/dev-tools/kcsan.rst b/Documentation/dev-tools/kcsan.rst<br/>index 94b6802ab0ab..02143f060b22 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kcsan.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/dev-tools/kcsan.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kcsan.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/dev-tools/kcsan.rst</a></div><div class='hunk'>@@ -91,6 +91,16 @@ the below options are available:</div><div class='ctx'>   behaviour when encountering a data race is deemed safe.  Please see</div><div class='ctx'>   `"Marking Shared-Memory Accesses" in the LKMM`_ for more information.</div><div class='ctx'> </div><div class='add'>+* Similar to ``data_race(...)``, the type qualifier ``__data_racy`` can be used</div><div class='add'>+  to document that all data races due to accesses to a variable are intended</div><div class='add'>+  and should be ignored by KCSAN::</div><div class='add'>+</div><div class='add'>+    struct foo {</div><div class='add'>+        ...</div><div class='add'>+        int __data_racy stats_counter;</div><div class='add'>+        ...</div><div class='add'>+    };</div><div class='add'>+</div><div class='ctx'> * Disabling data race detection for entire functions can be accomplished by</div><div class='ctx'>   using the function attribute ``__no_kcsan``::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dev-tools/kselftest.rst b/Documentation/dev-tools/kselftest.rst<br/>index ff10dc6eef5d..dcf634e411bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kselftest.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/dev-tools/kselftest.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kselftest.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/dev-tools/kselftest.rst</a></div><div class='hunk'>@@ -183,7 +183,7 @@ expected time it takes to run a test. If you have control over the systems</div><div class='ctx'> which will run the tests you can configure a test runner on those systems to</div><div class='ctx'> use a greater or lower timeout on the command line as with the `-o` or</div><div class='ctx'> the `--override-timeout` argument. For example to use 165 seconds instead</div><div class='del'>-one would use:</div><div class='add'>+one would use::</div><div class='ctx'> </div><div class='ctx'>    $ ./run_kselftest.sh --override-timeout 165</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/access-controllers/access-controllers.yaml b/Documentation/devicetree/bindings/access-controllers/access-controllers.yaml<br/>new file mode 100644<br/>index 000000000000..99e2865f0e46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/access-controllers/access-controllers.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/access-controllers/access-controllers.yaml</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/access-controllers/access-controllers.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic Domain Access Controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Oleksii Moisieiev &lt;oleksii_moisieiev@epam.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  Common access controllers properties</div><div class='add'>+</div><div class='add'>+  Access controllers are in charge of stating which of the hardware blocks under</div><div class='add'>+  their responsibility (their domain) can be accesssed by which compartment. A</div><div class='add'>+  compartment can be a cluster of CPUs (or coprocessors), a range of addresses</div><div class='add'>+  or a group of hardware blocks. An access controller's domain is the set of</div><div class='add'>+  resources covered by the access controller.</div><div class='add'>+</div><div class='add'>+  This device tree binding can be used to bind devices to their access</div><div class='add'>+  controller provided by access-controllers property. In this case, the device</div><div class='add'>+  is a consumer and the access controller is the provider.</div><div class='add'>+</div><div class='add'>+  An access controller can be represented by any node in the device tree and</div><div class='add'>+  can provide one or more configuration parameters, needed to control parameters</div><div class='add'>+  of the consumer device. A consumer node can refer to the provider by phandle</div><div class='add'>+  and a set of phandle arguments, specified by '#access-controller-cells'</div><div class='add'>+  property in the access controller node.</div><div class='add'>+</div><div class='add'>+  Access controllers are typically used to set/read the permissions of a</div><div class='add'>+  hardware block and grant access to it. Any of which depends on the access</div><div class='add'>+  controller. The capabilities of each access controller are defined by the</div><div class='add'>+  binding of the access controller device.</div><div class='add'>+</div><div class='add'>+  Each node can be a consumer for the several access controllers.</div><div class='add'>+</div><div class='add'>+# always select the core schema</div><div class='add'>+select: true</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  "#access-controller-cells":</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in an access-controllers specifier;</div><div class='add'>+      Can be any value as specified by device tree binding documentation</div><div class='add'>+      of a particular provider. The node is an access controller.</div><div class='add'>+</div><div class='add'>+  access-controller-names:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of access-controllers names, sorted in the same order as</div><div class='add'>+      access-controllers entries. Consumer drivers will use</div><div class='add'>+      access-controller-names to match with existing access-controllers entries.</div><div class='add'>+</div><div class='add'>+  access-controllers:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      A list of access controller specifiers, as defined by the</div><div class='add'>+      bindings of the access-controllers provider.</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock_controller: access-controllers@50000 {</div><div class='add'>+        reg = &lt;0x50000 0x400&gt;;</div><div class='add'>+        #access-controller-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    bus_controller: bus@60000 {</div><div class='add'>+        reg = &lt;0x60000 0x10000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+        #access-controller-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+        uart4: serial@60100 {</div><div class='add'>+            reg = &lt;0x60100 0x400&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk_serial&gt;;</div><div class='add'>+            access-controllers = &lt;&amp;clock_controller 1 2&gt;,</div><div class='add'>+                                 &lt;&amp;bus_controller 1 3 5&gt;;</div><div class='add'>+            access-controller-names = "clock", "bus";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml<br/>index 4cc4e6754681..d925e7a3b5ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml</a></div><div class='hunk'>@@ -53,6 +53,7 @@ properties:</div><div class='ctx'>       - description: BCM4709 based boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - asus,rt-ac3200</div><div class='ctx'>               - asus,rt-ac87u</div><div class='ctx'>               - buffalo,wxr-1900dhp</div><div class='ctx'>               - linksys,ea9200</div><div class='hunk'>@@ -67,6 +68,7 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - asus,rt-ac3100</div><div class='add'>+              - asus,rt-ac5300</div><div class='ctx'>               - asus,rt-ac88u</div><div class='ctx'>               - dlink,dir-885l</div><div class='ctx'>               - dlink,dir-890l</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml<br/>index 39e3c248f5b7..1f84407a73e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml</a></div><div class='hunk'>@@ -46,6 +46,30 @@ properties:</div><div class='ctx'>       - compatible</div><div class='ctx'>       - "#clock-cells"</div><div class='ctx'> </div><div class='add'>+  gpio:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: raspberrypi,firmware-gpio</div><div class='add'>+</div><div class='add'>+      gpio-controller: true</div><div class='add'>+</div><div class='add'>+      "#gpio-cells":</div><div class='add'>+        const: 2</div><div class='add'>+        description:</div><div class='add'>+          The first cell is the pin number, and the second cell is used to</div><div class='add'>+          specify the gpio polarity (GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW).</div><div class='add'>+</div><div class='add'>+      gpio-line-names:</div><div class='add'>+        minItems: 8</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - gpio-controller</div><div class='add'>+      - "#gpio-cells"</div><div class='add'>+</div><div class='ctx'>   reset:</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='hunk'>@@ -96,6 +120,12 @@ examples:</div><div class='ctx'>             #clock-cells = &lt;1&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='add'>+        expgpio: gpio {</div><div class='add'>+            compatible = "raspberrypi,firmware-gpio";</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>         reset: reset {</div><div class='ctx'>             compatible = "raspberrypi,firmware-reset";</div><div class='ctx'>             #reset-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml<br/>index 0027201e19f8..6d185d09cb6a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/fsl.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/fsl.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/fsl.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/fsl.yaml</a></div><div class='hunk'>@@ -813,6 +813,14 @@ properties:</div><div class='ctx'>           - const: tq,imx6ull-tqma6ull2l      # MCIMX6Y2, LGA SoM variant</div><div class='ctx'>           - const: fsl,imx6ull</div><div class='ctx'> </div><div class='add'>+      - description: Seeed Stuido i.MX6ULL SoM on dev boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - seeed,imx6ull-seeed-npi-emmc</div><div class='add'>+              - seeed,imx6ull-seeed-npi-nand</div><div class='add'>+          - const: seeed,imx6ull-seeed-npi</div><div class='add'>+          - const: fsl,imx6ull</div><div class='add'>+</div><div class='ctx'>       - description: i.MX6ULZ based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -1050,6 +1058,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - beacon,imx8mp-beacon-kit  # i.MX8MP Beacon Development Kit</div><div class='ctx'>               - dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC</div><div class='add'>+              - emcraft,imx8mp-navqp      # i.MX8MP Emcraft Systems NavQ+ Kit</div><div class='ctx'>               - fsl,imx8mp-evk            # i.MX8MP EVK Board</div><div class='ctx'>               - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board</div><div class='ctx'>               - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board</div><div class='hunk'>@@ -1218,7 +1227,6 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - einfochips,imx8qxp-ai_ml  # i.MX8QXP AI_ML Board</div><div class='ctx'>               - fsl,imx8qxp-mek           # i.MX8QXP MEK Board</div><div class='del'>-              - toradex,colibri-imx8x     # Colibri iMX8X Modules</div><div class='ctx'>           - const: fsl,imx8qxp</div><div class='ctx'> </div><div class='ctx'>       - description: i.MX8DXL based Boards</div><div class='hunk'>@@ -1227,7 +1235,7 @@ properties:</div><div class='ctx'>               - fsl,imx8dxl-evk           # i.MX8DXL EVK Board</div><div class='ctx'>           - const: fsl,imx8dxl</div><div class='ctx'> </div><div class='del'>-      - description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules</div><div class='add'>+      - description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - toradex,colibri-imx8x-aster   # Colibri iMX8X Module on Aster Board</div><div class='hunk'>@@ -1235,7 +1243,9 @@ properties:</div><div class='ctx'>               - toradex,colibri-imx8x-iris    # Colibri iMX8X Module on Iris Board</div><div class='ctx'>               - toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2</div><div class='ctx'>           - const: toradex,colibri-imx8x</div><div class='del'>-          - const: fsl,imx8qxp</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8qxp</div><div class='add'>+              - fsl,imx8dx</div><div class='ctx'> </div><div class='ctx'>       - description:</div><div class='ctx'>           TQMa8Xx is a series of SOM featuring NXP i.MX8X system-on-chip</div><div class='hunk'>@@ -1536,6 +1546,12 @@ properties:</div><div class='ctx'>               - nxp,s32g274a-rdb2</div><div class='ctx'>           - const: nxp,s32g2</div><div class='ctx'> </div><div class='add'>+      - description: S32G3 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nxp,s32g399a-rdb3</div><div class='add'>+          - const: nxp,s32g3</div><div class='add'>+</div><div class='ctx'>       - description: S32V234 based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml<br/>index c24ad0968f3e..7f06b1080244 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml</a></div><div class='hunk'>@@ -61,10 +61,6 @@ properties:</div><div class='ctx'>   mboxes:</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='del'>-  ti,system-reboot-controller:</div><div class='del'>-    description: Determines If system reboot can be triggered by SoC reboot</div><div class='del'>-    type: boolean</div><div class='del'>-</div><div class='ctx'>   ti,host-id:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -94,7 +90,6 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     pmmc: system-controller@2921800 {</div><div class='ctx'>       compatible = "ti,k2g-sci";</div><div class='del'>-      ti,system-reboot-controller;</div><div class='ctx'>       mbox-names = "rx", "tx";</div><div class='ctx'>       mboxes = &lt;&amp;msgmgr 5 2&gt;,</div><div class='ctx'>                &lt;&amp;msgmgr 0 0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml<br/>index 66beaac60e1d..ae885414b181 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/qcom.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/qcom.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/qcom.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/qcom.yaml</a></div><div class='hunk'>@@ -137,6 +137,7 @@ properties:</div><div class='ctx'>               - microsoft,dempsey</div><div class='ctx'>               - microsoft,makepeace</div><div class='ctx'>               - microsoft,moneypenny</div><div class='add'>+              - motorola,falcon</div><div class='ctx'>               - samsung,s3ve3g</div><div class='ctx'>           - const: qcom,msm8226</div><div class='ctx'> </div><div class='hunk'>@@ -184,13 +185,16 @@ properties:</div><div class='ctx'>               - oneplus,bacon</div><div class='ctx'>               - samsung,klte</div><div class='ctx'>               - sony,xperia-castor</div><div class='add'>+              - sony,xperia-leo</div><div class='ctx'>           - const: qcom,msm8974pro</div><div class='ctx'>           - const: qcom,msm8974</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='del'>-          - const: qcom,msm8916-mtp</div><div class='del'>-          - const: qcom,msm8916-mtp/1</div><div class='del'>-          - const: qcom,msm8916</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,kltechn</div><div class='add'>+          - const: samsung,klte</div><div class='add'>+          - const: qcom,msm8974pro</div><div class='add'>+          - const: qcom,msm8974</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -200,6 +204,8 @@ properties:</div><div class='ctx'>               - gplus,fl8005a</div><div class='ctx'>               - huawei,g7</div><div class='ctx'>               - longcheer,l8910</div><div class='add'>+              - longcheer,l8150</div><div class='add'>+              - qcom,msm8916-mtp</div><div class='ctx'>               - samsung,a3u-eur</div><div class='ctx'>               - samsung,a5u-eur</div><div class='ctx'>               - samsung,e5</div><div class='hunk'>@@ -221,11 +227,6 @@ properties:</div><div class='ctx'>           - const: qcom,msm8916</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='del'>-          - const: longcheer,l8150</div><div class='del'>-          - const: qcom,msm8916-v1-qrd/9-v1</div><div class='del'>-          - const: qcom,msm8916</div><div class='del'>-</div><div class='del'>-      - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - motorola,potter</div><div class='ctx'>               - xiaomi,daisy</div><div class='hunk'>@@ -1003,6 +1004,7 @@ properties:</div><div class='ctx'>               - qcom,sm8550-hdk</div><div class='ctx'>               - qcom,sm8550-mtp</div><div class='ctx'>               - qcom,sm8550-qrd</div><div class='add'>+              - sony,pdx234</div><div class='ctx'>           - const: qcom,sm8550</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml<br/>index fcf7316ecd74..e04c213a0dee 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/rockchip.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/rockchip.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/rockchip.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/rockchip.yaml</a></div><div class='hunk'>@@ -49,6 +49,11 @@ properties:</div><div class='ctx'>               - anbernic,rg-arc-s</div><div class='ctx'>           - const: rockchip,rk3566</div><div class='ctx'> </div><div class='add'>+      - description: ArmSoM Sige7 board</div><div class='add'>+        items:</div><div class='add'>+          - const: armsom,sige7</div><div class='add'>+          - const: rockchip,rk3588</div><div class='add'>+</div><div class='ctx'>       - description: Asus Tinker board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: asus,rk3288-tinker</div><div class='hunk'>@@ -198,6 +203,13 @@ properties:</div><div class='ctx'>           - const: firefly,rk3568-roc-pc</div><div class='ctx'>           - const: rockchip,rk3568</div><div class='ctx'> </div><div class='add'>+      - description: Forlinx FET3588-C SoM</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - forlinx,ok3588-c</div><div class='add'>+          - const: forlinx,fet3588-c</div><div class='add'>+          - const: rockchip,rk3588</div><div class='add'>+</div><div class='ctx'>       - description: FriendlyElec NanoPi R2 series boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -236,6 +248,11 @@ properties:</div><div class='ctx'>           - const: friendlyarm,nanopc-t6</div><div class='ctx'>           - const: rockchip,rk3588</div><div class='ctx'> </div><div class='add'>+      - description: GameForce Chi</div><div class='add'>+        items:</div><div class='add'>+          - const: gameforce,chi</div><div class='add'>+          - const: rockchip,rk3326</div><div class='add'>+</div><div class='ctx'>       - description: GeekBuying GeekBox</div><div class='ctx'>         items:</div><div class='ctx'>           - const: geekbuying,geekbox</div><div class='hunk'>@@ -631,7 +648,7 @@ properties:</div><div class='ctx'>           - const: phytec,rk3288-phycore-som</div><div class='ctx'>           - const: rockchip,rk3288</div><div class='ctx'> </div><div class='del'>-      - description: Pine64 PinebookPro</div><div class='add'>+      - description: Pine64 Pinebook Pro</div><div class='ctx'>         items:</div><div class='ctx'>           - const: pine64,pinebook-pro</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='hunk'>@@ -644,7 +661,7 @@ properties:</div><div class='ctx'>           - const: pine64,pinenote</div><div class='ctx'>           - const: rockchip,rk3566</div><div class='ctx'> </div><div class='del'>-      - description: Pine64 PinePhonePro</div><div class='add'>+      - description: Pine64 PinePhone Pro</div><div class='ctx'>         items:</div><div class='ctx'>           - const: pine64,pinephone-pro</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='hunk'>@@ -682,7 +699,7 @@ properties:</div><div class='ctx'>           - const: pine64,quartzpro64</div><div class='ctx'>           - const: rockchip,rk3588</div><div class='ctx'> </div><div class='del'>-      - description: Pine64 SoQuartz SoM</div><div class='add'>+      - description: Pine64 SOQuartz</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - pine64,soquartz-blade</div><div class='hunk'>@@ -700,12 +717,17 @@ properties:</div><div class='ctx'>               - powkiddy,x55</div><div class='ctx'>           - const: rockchip,rk3566</div><div class='ctx'> </div><div class='add'>+      - description: Protonic MECSBC board</div><div class='add'>+        items:</div><div class='add'>+          - const: prt,mecsbc</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='ctx'>       - description: QNAP TS-433-4G 4-Bay NAS</div><div class='ctx'>         items:</div><div class='ctx'>           - const: qnap,ts433</div><div class='ctx'>           - const: rockchip,rk3568</div><div class='ctx'> </div><div class='del'>-      - description: Radxa Compute Module 3(CM3)</div><div class='add'>+      - description: Radxa Compute Module 3 (CM3)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - radxa,cm3-io</div><div class='hunk'>@@ -767,22 +789,27 @@ properties:</div><div class='ctx'>           - const: radxa,rockpis</div><div class='ctx'>           - const: rockchip,rk3308</div><div class='ctx'> </div><div class='del'>-      - description: Radxa Rock2 Square</div><div class='add'>+      - description: Radxa Rock 2 Square</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rock2-square</div><div class='ctx'>           - const: rockchip,rk3288</div><div class='ctx'> </div><div class='del'>-      - description: Radxa ROCK3 Model A</div><div class='add'>+      - description: Radxa ROCK 3A</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rock3a</div><div class='ctx'>           - const: rockchip,rk3568</div><div class='ctx'> </div><div class='del'>-      - description: Radxa ROCK 5 Model A</div><div class='add'>+      - description: Radxa ROCK 3C</div><div class='add'>+        items:</div><div class='add'>+          - const: radxa,rock-3c</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: Radxa ROCK 5A</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rock-5a</div><div class='ctx'>           - const: rockchip,rk3588s</div><div class='ctx'> </div><div class='del'>-      - description: Radxa ROCK 5 Model B</div><div class='add'>+      - description: Radxa ROCK 5B</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rock-5b</div><div class='ctx'>           - const: rockchip,rk3588</div><div class='hunk'>@@ -927,6 +954,11 @@ properties:</div><div class='ctx'>           - const: turing,rk1</div><div class='ctx'>           - const: rockchip,rk3588</div><div class='ctx'> </div><div class='add'>+      - description: WolfVision PF5 mainboard</div><div class='add'>+        items:</div><div class='add'>+          - const: wolfvision,rk3568-pf5</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='ctx'>       - description: Xunlong Orange Pi 5 Plus</div><div class='ctx'>         items:</div><div class='ctx'>           - const: xunlong,orangepi-5-plus</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml<br/>index 09d835db6db5..c6d0d8d81ed4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/sunxi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/arm/sunxi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/sunxi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/arm/sunxi.yaml</a></div><div class='hunk'>@@ -56,6 +56,21 @@ properties:</div><div class='ctx'>           - const: anbernic,rg-nano</div><div class='ctx'>           - const: allwinner,sun8i-v3s</div><div class='ctx'> </div><div class='add'>+      - description: Anbernic RG35XX (2024)</div><div class='add'>+      - items:</div><div class='add'>+          - const: anbernic,rg35xx-2024</div><div class='add'>+          - const: allwinner,sun50i-h700</div><div class='add'>+</div><div class='add'>+      - description: Anbernic RG35XX Plus</div><div class='add'>+      - items:</div><div class='add'>+          - const: anbernic,rg35xx-plus</div><div class='add'>+          - const: allwinner,sun50i-h700</div><div class='add'>+</div><div class='add'>+      - description: Anbernic RG35XX H</div><div class='add'>+      - items:</div><div class='add'>+          - const: anbernic,rg35xx-h</div><div class='add'>+          - const: allwinner,sun50i-h700</div><div class='add'>+</div><div class='ctx'>       - description: Amarula A64 Relic</div><div class='ctx'>         items:</div><div class='ctx'>           - const: amarula,a64-relic</div><div class='hunk'>@@ -774,6 +789,11 @@ properties:</div><div class='ctx'>           - const: pocketbook,touch-lux-3</div><div class='ctx'>           - const: allwinner,sun5i-a13</div><div class='ctx'> </div><div class='add'>+      - description: PocketBook 614 Plus</div><div class='add'>+        items:</div><div class='add'>+          - const: pocketbook,614-plus</div><div class='add'>+          - const: allwinner,sun5i-a13</div><div class='add'>+</div><div class='ctx'>       - description: Point of View Protab2-IPS9</div><div class='ctx'>         items:</div><div class='ctx'>           - const: pov,protab2-ips9</div><div class='hunk'>@@ -860,6 +880,11 @@ properties:</div><div class='ctx'>           - const: allwinner,sl631</div><div class='ctx'>           - const: allwinner,sun8i-v3</div><div class='ctx'> </div><div class='add'>+      - description: Tanix TX1</div><div class='add'>+        items:</div><div class='add'>+          - const: oranth,tanix-tx1</div><div class='add'>+          - const: allwinner,sun50i-h616</div><div class='add'>+</div><div class='ctx'>       - description: Tanix TX6</div><div class='ctx'>         items:</div><div class='ctx'>           - const: oranth,tanix-tx6</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt b/Documentation/devicetree/bindings/ata/ahci-da850.txt<br/>deleted file mode 100644<br/>index 5f8193417725..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ata/ahci-da850.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ata/ahci-da850.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Device tree binding for the TI DA850 AHCI SATA Controller</div><div class='del'>----------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: must be "ti,da850-ahci"</div><div class='del'>-  - reg: physical base addresses and sizes of the two register regions</div><div class='del'>-         used by the controller: the register map as defined by the</div><div class='del'>-         AHCI 1.1 standard and the Power Down Control Register (PWRDN)</div><div class='del'>-         for enabling/disabling the SATA clock receiver</div><div class='del'>-  - interrupts: interrupt specifier (refer to the interrupt binding)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	sata: sata@218000 {</div><div class='del'>-		compatible = "ti,da850-ahci";</div><div class='del'>-		reg = &lt;0x218000 0x2000&gt;, &lt;0x22c018 0x4&gt;;</div><div class='del'>-		interrupts = &lt;67&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/fsl,imx-pata.yaml b/Documentation/devicetree/bindings/ata/fsl,imx-pata.yaml<br/>new file mode 100644<br/>index 000000000000..324e2413bba8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ata/fsl,imx-pata.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/ata/fsl,imx-pata.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/fsl,imx-pata.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX PATA Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Animesh Agarwal &lt;animeshagarwal28@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx31-pata</div><div class='add'>+              - fsl,imx51-pata</div><div class='add'>+          - const: fsl,imx27-pata</div><div class='add'>+      - const: fsl,imx27-pata</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: PATA Controller interrupts</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: PATA Controller clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pata: pata@83fe0000 {</div><div class='add'>+        compatible = "fsl,imx51-pata", "fsl,imx27-pata";</div><div class='add'>+        reg = &lt;0x83fe0000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;70&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 161&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/imx-pata.txt b/Documentation/devicetree/bindings/ata/imx-pata.txt<br/>deleted file mode 100644<br/>index f1172f00188a..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ata/imx-pata.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ata/imx-pata.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-* Freescale i.MX PATA Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "fsl,imx27-pata"</div><div class='del'>-- reg: Address range of the PATA Controller</div><div class='del'>-- interrupts: The interrupt of the PATA Controller</div><div class='del'>-- clocks: the clocks for the PATA Controller</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pata: pata@83fe0000 {</div><div class='del'>-		compatible = "fsl,imx51-pata", "fsl,imx27-pata";</div><div class='del'>-		reg = &lt;0x83fe0000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;70&gt;;</div><div class='del'>-		clocks = &lt;&amp;clks 161&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml b/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml<br/>new file mode 100644<br/>index 000000000000..ce13c76bdffb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/ti,da850-ahci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI DA850 AHCI SATA Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Animesh Agarwal &lt;animeshagarwal28@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,da850-ahci</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address and size of the register map as defined by the AHCI 1.1 standard.</div><div class='add'>+      - description:</div><div class='add'>+          Address and size of Power Down Control Register (PWRDN) for enabling/disabling the SATA clock</div><div class='add'>+          receiver.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sata@218000 {</div><div class='add'>+        compatible = "ti,da850-ahci";</div><div class='add'>+        reg = &lt;0x218000 0x2000&gt;, &lt;0x22c018 0x4&gt;;</div><div class='add'>+        interrupts = &lt;67&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml<br/>new file mode 100644<br/>index 000000000000..d12b62a3a5a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STM32 Extended TrustZone protection controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The ETZPC configures TrustZone security in a SoC having bus masters and</div><div class='add'>+  devices with programmable-security attributes (securable resources).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Gatien Chevallier &lt;gatien.chevallier@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: st,stm32-etzpc</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: st,stm32-etzpc</div><div class='add'>+      - const: simple-bus</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  "#access-controller-cells":</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      Contains the firewall ID associated to the peripheral.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^.*@[0-9a-f]+$":</div><div class='add'>+    description: Peripherals</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    additionalProperties: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - access-controllers</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - "#access-controller-cells"</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // In this example, the usart2 device refers to rifsc as its access</div><div class='add'>+    // controller.</div><div class='add'>+    // Access rights are verified before creating devices.</div><div class='add'>+</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/stm32mp13-clks.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/stm32mp13-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    etzpc: bus@5c007000 {</div><div class='add'>+        compatible = "st,stm32-etzpc", "simple-bus";</div><div class='add'>+        reg = &lt;0x5c007000 0x400&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        #access-controller-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        usart2: serial@4c001000 {</div><div class='add'>+            compatible = "st,stm32h7-uart";</div><div class='add'>+            reg = &lt;0x4c001000 0x400&gt;;</div><div class='add'>+            interrupts-extended = &lt;&amp;exti 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;rcc USART2_K&gt;;</div><div class='add'>+            resets = &lt;&amp;rcc USART2_R&gt;;</div><div class='add'>+            wakeup-source;</div><div class='add'>+            dmas = &lt;&amp;dmamux1 43 0x400 0x5&gt;,</div><div class='add'>+                    &lt;&amp;dmamux1 44 0x400 0x1&gt;;</div><div class='add'>+            dma-names = "rx", "tx";</div><div class='add'>+            access-controllers = &lt;&amp;etzpc 17&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml<br/>new file mode 100644<br/>index 000000000000..20acd1a6b173<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STM32 Resource isolation framework security controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Gatien Chevallier &lt;gatien.chevallier@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Resource isolation framework (RIF) is a comprehensive set of hardware blocks</div><div class='add'>+  designed to enforce and manage isolation of STM32 hardware resources like</div><div class='add'>+  memory and peripherals.</div><div class='add'>+</div><div class='add'>+  The RIFSC (RIF security controller) is composed of three sets of registers,</div><div class='add'>+  each managing a specific set of hardware resources:</div><div class='add'>+    - RISC registers associated with RISUP logic (resource isolation device unit</div><div class='add'>+      for peripherals), assign all non-RIF aware peripherals to zero, one or</div><div class='add'>+      any security domains (secure, privilege, compartment).</div><div class='add'>+    - RIMC registers: associated with RIMU logic (resource isolation master</div><div class='add'>+      unit), assign all non RIF-aware bus master to one security domain by</div><div class='add'>+      setting secure, privileged and compartment information on the system bus.</div><div class='add'>+      Alternatively, the RISUP logic controlling the device port access to a</div><div class='add'>+      peripheral can assign target bus attributes to this peripheral master port</div><div class='add'>+      (supported attribute: CID).</div><div class='add'>+    - RISC registers associated with RISAL logic (resource isolation device unit</div><div class='add'>+      for address space - Lite version), assign address space subregions to one</div><div class='add'>+      security domains (secure, privilege, compartment).</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: st,stm32mp25-rifsc</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: st,stm32mp25-rifsc</div><div class='add'>+      - const: simple-bus</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  "#access-controller-cells":</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      Contains the firewall ID associated to the peripheral.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^.*@[0-9a-f]+$":</div><div class='add'>+    description: Peripherals</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    additionalProperties: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - access-controllers</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - "#access-controller-cells"</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // In this example, the usart2 device refers to rifsc as its domain</div><div class='add'>+    // controller.</div><div class='add'>+    // Access rights are verified before creating devices.</div><div class='add'>+</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    rifsc: bus@42080000 {</div><div class='add'>+        compatible = "st,stm32mp25-rifsc", "simple-bus";</div><div class='add'>+        reg = &lt;0x42080000 0x1000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        #access-controller-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        usart2: serial@400e0000 {</div><div class='add'>+              compatible = "st,stm32h7-uart";</div><div class='add'>+              reg = &lt;0x400e0000 0x400&gt;;</div><div class='add'>+              interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+              clocks = &lt;&amp;ck_flexgen_08&gt;;</div><div class='add'>+              access-controllers = &lt;&amp;rifsc 32&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml<br/>index 1d2bcea41c85..caf442ead24b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/clock/google,gs101-clock.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/clock/google,gs101-clock.yaml</a></div><div class='hunk'>@@ -30,16 +30,18 @@ properties:</div><div class='ctx'>       - google,gs101-cmu-top</div><div class='ctx'>       - google,gs101-cmu-apm</div><div class='ctx'>       - google,gs101-cmu-misc</div><div class='add'>+      - google,gs101-cmu-hsi0</div><div class='add'>+      - google,gs101-cmu-hsi2</div><div class='ctx'>       - google,gs101-cmu-peric0</div><div class='ctx'>       - google,gs101-cmu-peric1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   "#clock-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -76,6 +78,55 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: google,gs101-cmu-hsi0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (24.576 MHz)</div><div class='add'>+            - description: HSI0 bus clock (from CMU_TOP)</div><div class='add'>+            - description: DPGTC (from CMU_TOP)</div><div class='add'>+            - description: USB DRD controller clock (from CMU_TOP)</div><div class='add'>+            - description: USB Display Port debug clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: dpgtc</div><div class='add'>+            - const: usb31drd</div><div class='add'>+            - const: usbdpdbg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - google,gs101-cmu-hsi2</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (24.576 MHz)</div><div class='add'>+            - description: High Speed Interface bus clock (from CMU_TOP)</div><div class='add'>+            - description: High Speed Interface pcie clock (from CMU_TOP)</div><div class='add'>+            - description: High Speed Interface ufs clock (from CMU_TOP)</div><div class='add'>+            - description: High Speed Interface mmc clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: ufs</div><div class='add'>+            - const: mmc</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: google,gs101-cmu-misc</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml<br/>index 56fc71d6a081..1e9797f96410 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml</a></div><div class='hunk'>@@ -38,6 +38,7 @@ properties:</div><div class='ctx'>               - qcom,sc7280-cpufreq-epss</div><div class='ctx'>               - qcom,sc8280xp-cpufreq-epss</div><div class='ctx'>               - qcom,sdx75-cpufreq-epss</div><div class='add'>+              - qcom,sm4450-cpufreq-epss</div><div class='ctx'>               - qcom,sm6375-cpufreq-epss</div><div class='ctx'>               - qcom,sm8250-cpufreq-epss</div><div class='ctx'>               - qcom,sm8350-cpufreq-epss</div><div class='hunk'>@@ -133,6 +134,7 @@ allOf:</div><div class='ctx'>               - qcom,sc8280xp-cpufreq-epss</div><div class='ctx'>               - qcom,sdm670-cpufreq-hw</div><div class='ctx'>               - qcom,sdm845-cpufreq-hw</div><div class='add'>+              - qcom,sm4450-cpufreq-epss</div><div class='ctx'>               - qcom,sm6115-cpufreq-hw</div><div class='ctx'>               - qcom,sm6350-cpufreq-hw</div><div class='ctx'>               - qcom,sm6375-cpufreq-epss</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml b/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml<br/>new file mode 100644<br/>index 000000000000..cb47ae2889b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-aes.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Security Engine for AES algorithms</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Tegra Security Engine accelerates the following AES encryption/decryption</div><div class='add'>+  algorithms - AES-ECB, AES-CBC, AES-OFB, AES-XTS, AES-CTR, AES-GCM, AES-CCM,</div><div class='add'>+  AES-CMAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Akhil R &lt;akhilrajeev@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra234-se-aes</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - iommus</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra234-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    crypto@15820000 {</div><div class='add'>+        compatible = "nvidia,tegra234-se-aes";</div><div class='add'>+        reg = &lt;0x15820000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA234_CLK_SE&gt;;</div><div class='add'>+        iommus = &lt;&amp;smmu TEGRA234_SID_SES_SE1&gt;;</div><div class='add'>+        dma-coherent;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml b/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml<br/>new file mode 100644<br/>index 000000000000..f57ef10645e2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-hash.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Security Engine for HASH algorithms</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Tegra Security HASH Engine accelerates the following HASH functions -</div><div class='add'>+  SHA1, SHA224, SHA256, SHA384, SHA512, SHA3-224, SHA3-256, SHA3-384, SHA3-512</div><div class='add'>+  HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HMAC(SHA512)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Akhil R &lt;akhilrajeev@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra234-se-hash</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - iommus</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra234-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    crypto@15840000 {</div><div class='add'>+        compatible = "nvidia,tegra234-se-hash";</div><div class='add'>+        reg = &lt;0x15840000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA234_CLK_SE&gt;;</div><div class='add'>+        iommus = &lt;&amp;smmu TEGRA234_SID_SES_SE2&gt;;</div><div class='add'>+        dma-coherent;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/omap-sham.txt b/Documentation/devicetree/bindings/crypto/omap-sham.txt<br/>deleted file mode 100644<br/>index ad9115569611..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/omap-sham.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/omap-sham.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-OMAP SoC SHA crypto Module</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : Should contain entries for this and backward compatible</div><div class='del'>-  SHAM versions:</div><div class='del'>-  - "ti,omap2-sham" for OMAP2 &amp; OMAP3.</div><div class='del'>-  - "ti,omap4-sham" for OMAP4 and AM33XX.</div><div class='del'>-  - "ti,omap5-sham" for OMAP5, DRA7 and AM43XX.</div><div class='del'>-- ti,hwmods: Name of the hwmod associated with the SHAM module</div><div class='del'>-- reg : Offset and length of the register set for the module</div><div class='del'>-- interrupts : the interrupt-specifier for the SHAM module.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dmas: DMA specifiers for the rx dma. See the DMA client binding,</div><div class='del'>-	Documentation/devicetree/bindings/dma/dma.txt</div><div class='del'>-- dma-names: DMA request name. Should be "rx" if a dma is present.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	/* AM335x */</div><div class='del'>-	sham: sham@53100000 {</div><div class='del'>-		compatible = "ti,omap4-sham";</div><div class='del'>-		ti,hwmods = "sham";</div><div class='del'>-		reg = &lt;0x53100000 0x200&gt;;</div><div class='del'>-		interrupts = &lt;109&gt;;</div><div class='del'>-		dmas = &lt;&amp;edma 36&gt;;</div><div class='del'>-		dma-names = "rx";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml<br/>index e91bc7dc6ad3..0304f074cf08 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - qcom,sa8775p-inline-crypto-engine</div><div class='ctx'>           - qcom,sc7180-inline-crypto-engine</div><div class='add'>+          - qcom,sc7280-inline-crypto-engine</div><div class='ctx'>           - qcom,sm8450-inline-crypto-engine</div><div class='ctx'>           - qcom,sm8550-inline-crypto-engine</div><div class='ctx'>           - qcom,sm8650-inline-crypto-engine</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml<br/>index 0ddeb8a9a7a0..27354658d054 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml</a></div><div class='hunk'>@@ -46,6 +46,10 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml<br/>index ac480765cde0..822318414095 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml</a></div><div class='hunk'>@@ -51,6 +51,10 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml b/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml<br/>index 71a2876bd6e4..7ccb6e1641d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/starfive,jh7110-crypto.yaml</a></div><div class='hunk'>@@ -12,7 +12,9 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: starfive,jh7110-crypto</div><div class='add'>+    enum:</div><div class='add'>+      - starfive,jh7110-crypto</div><div class='add'>+      - starfive,jh8100-crypto</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -28,7 +30,10 @@ properties:</div><div class='ctx'>       - const: ahb</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: SHA2 module irq</div><div class='add'>+      - description: SM3 module irq</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -54,6 +59,27 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: starfive,jh7110-crypto</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: starfive,jh8100-crypto</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     crypto: crypto@16000000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/ti,omap-sham.yaml b/Documentation/devicetree/bindings/crypto/ti,omap-sham.yaml<br/>new file mode 100644<br/>index 000000000000..d69b50228009<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/ti,omap-sham.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/crypto/ti,omap-sham.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/ti,omap-sham.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: OMAP SoC SHA crypto Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Animesh Agarwal &lt;animeshagarwal28@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,omap2-sham</div><div class='add'>+      - ti,omap4-sham</div><div class='add'>+      - ti,omap5-sham</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    const: rx</div><div class='add'>+</div><div class='add'>+  ti,hwmods:</div><div class='add'>+    description: Name of the hwmod associated with the SHAM module</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum: [sham]</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  dmas: [dma-names]</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - ti,hwmods</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sham@53100000 {</div><div class='add'>+        compatible = "ti,omap4-sham";</div><div class='add'>+        ti,hwmods = "sham";</div><div class='add'>+        reg = &lt;0x53100000 0x200&gt;;</div><div class='add'>+        interrupts = &lt;109&gt;;</div><div class='add'>+        dmas = &lt;&amp;edma 36&gt;;</div><div class='add'>+        dma-names = "rx";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml<br/>index c9a882ee6d98..c4469f463978 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: ITE it6505</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Allen Chen &lt;allen.chen@ite.com.tw&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> description: |</div><div class='ctx'>   The IT6505 is a high-performance DisplayPort 1.1a transmitter,</div><div class='ctx'>   fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.</div><div class='hunk'>@@ -52,6 +55,9 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: extcon specifier for the Power Delivery</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='hunk'>@@ -105,7 +111,7 @@ required:</div><div class='ctx'>   - extcon</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml<br/>index 84aafcbf0919..6ceeed76e88e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml</a></div><div class='hunk'>@@ -41,6 +41,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - ti,ds90cf364a # For the DS90CF364A FPD-Link LVDS Receiver</div><div class='ctx'>               - ti,ds90cf384a # For the DS90CF384A FPD-Link LVDS Receiver</div><div class='add'>+              - ti,sn65lvds94 # For the SN65DS94 LVDS serdes</div><div class='ctx'>           - const: lvds-decoder # Generic LVDS decoders compatible fallback</div><div class='ctx'>       - enum:</div><div class='ctx'>           - thine,thc63lvdm83d # For the THC63LVDM83D LVDS serializer</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml b/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml<br/>new file mode 100644<br/>index 000000000000..862ef441ac9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip SAM9X75 LVDS Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dharma Balasubiramani &lt;dharma.b@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Low Voltage Differential Signaling Controller (LVDSC) manages data</div><div class='add'>+  format conversion from the LCD Controller internal DPI bus to OpenLDI</div><div class='add'>+  LVDS output signals. LVDSC functions include bit mapping, balanced mode</div><div class='add'>+  management, and serializer.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: microchip,sam9x75-lvds</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral Bus Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/at91.h&gt;</div><div class='add'>+    lvds-controller@f8060000 {</div><div class='add'>+      compatible = "microchip,sam9x75-lvds";</div><div class='add'>+      reg = &lt;0xf8060000 0x100&gt;;</div><div class='add'>+      interrupts = &lt;56 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+      clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 56&gt;;</div><div class='add'>+      clock-names = "pclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml<br/>index d879c700594a..258dd9cfd770 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Vinay Simha BN &lt;simhavcs@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  This binding supports DSI to LVDS bridge TC358775</div><div class='add'>+  This binding supports DSI to LVDS bridges TC358765 and TC358775</div><div class='ctx'> </div><div class='ctx'>   MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.</div><div class='ctx'>   Video frame size:</div><div class='hunk'>@@ -21,7 +21,9 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: toshiba,tc358775</div><div class='add'>+    enum:</div><div class='add'>+      - toshiba,tc358765</div><div class='add'>+      - toshiba,tc358775</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -46,11 +48,27 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           DSI Input. The remote endpoint phandle should be a</div><div class='ctx'>           reference to a valid mipi_dsi_host device node.</div><div class='ctx'> </div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: array of physical DSI data lane indexes.</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='ctx'>       port@1:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>         description: |</div><div class='hunk'>@@ -70,10 +88,19 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vdd-supply</div><div class='ctx'>   - vddio-supply</div><div class='del'>-  - stby-gpios</div><div class='ctx'>   - reset-gpios</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: toshiba,tc358765</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        stby-gpios: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -108,6 +135,7 @@ examples:</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='ctx'>                     d2l_in_test: endpoint {</div><div class='ctx'>                         remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                        data-lanes = &lt;1 2 3 4&gt;;</div><div class='ctx'>                     };</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='hunk'>@@ -132,7 +160,6 @@ examples:</div><div class='ctx'>                 reg = &lt;1&gt;;</div><div class='ctx'>                 dsi0_out: endpoint {</div><div class='ctx'>                     remote-endpoint = &lt;&amp;d2l_in_test&gt;;</div><div class='del'>-                    data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>              };</div><div class='ctx'>          };</div><div class='hunk'>@@ -167,6 +194,7 @@ examples:</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='ctx'>                     d2l_in_dual: endpoint {</div><div class='ctx'>                         remote-endpoint = &lt;&amp;dsi0_out_dual&gt;;</div><div class='add'>+                        data-lanes = &lt;1 2 3 4&gt;;</div><div class='ctx'>                     };</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='hunk'>@@ -198,7 +226,6 @@ examples:</div><div class='ctx'>                 reg = &lt;1&gt;;</div><div class='ctx'>                 dsi0_out_dual: endpoint {</div><div class='ctx'>                     remote-endpoint = &lt;&amp;d2l_in_dual&gt;;</div><div class='del'>-                    data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>              };</div><div class='ctx'>          };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml<br/>index c6641acd75d6..b8b8e83ebc3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml</a></div><div class='hunk'>@@ -24,6 +24,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - mediatek,mt8173-disp-gamma</div><div class='ctx'>           - mediatek,mt8183-disp-gamma</div><div class='add'>+          - mediatek,mt8195-disp-gamma</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt6795-disp-gamma</div><div class='hunk'>@@ -35,6 +36,10 @@ properties:</div><div class='ctx'>               - mediatek,mt8192-disp-gamma</div><div class='ctx'>               - mediatek,mt8195-disp-gamma</div><div class='ctx'>           - const: mediatek,mt8183-disp-gamma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8188-disp-gamma</div><div class='add'>+          - const: mediatek,mt8195-disp-gamma</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml<br/>index ae53cbfb2193..97993feda193 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>           - qcom,sm8650-dp</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,sm6350-dp</div><div class='ctx'>               - qcom,sm8150-dp</div><div class='ctx'>               - qcom,sm8250-dp</div><div class='ctx'>               - qcom,sm8450-dp</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml<br/>index c9ba1fae8042..bba666bdffe5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml</a></div><div class='hunk'>@@ -53,6 +53,15 @@ patternProperties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         const: qcom,sm6350-dpu</div><div class='ctx'> </div><div class='add'>+  "^displayport-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: qcom,sm6350-dp</div><div class='add'>+</div><div class='ctx'>   "^dsi@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml<br/>index b1e624be3e33..a015dce72f60 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>           - ampire,am8001280g</div><div class='ctx'>           - bananapi,lhr050h41</div><div class='ctx'>           - feixin,k101-im2byl02</div><div class='add'>+          - startek,kd050hdfia020</div><div class='ctx'>           - tdo,tl050hdv35</div><div class='ctx'>           - wanchanglong,w552946aba</div><div class='ctx'>       - const: ilitek,ili9881c</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml<br/>new file mode 100644<br/>index 000000000000..1e08648f5bc7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LG SW43408 1080x2160 DSI panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Caleb Connolly &lt;caleb.connolly@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This panel is used on the Pixel 3, it is a 60hz OLED panel which</div><div class='add'>+  required DSC (Display Stream Compression) and has rounded corners.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: lg,sw43408</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+  port: true</div><div class='add'>+  vddi-supply: true</div><div class='add'>+  vpnl-supply: true</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - vddi-supply</div><div class='add'>+  - vpnl-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "lg,sw43408";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vddi-supply = &lt;&amp;vreg_l14a_1p88&gt;;</div><div class='add'>+            vpnl-supply = &lt;&amp;vreg_l28a_3p0&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml<br/>index 377a05d48a02..7cac93b20944 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/novatek,nt35950.yaml</a></div><div class='hunk'>@@ -19,7 +19,7 @@ description: |</div><div class='ctx'>   either bilinear interpolation or pixel duplication.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: panel-common-dual.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -59,6 +59,7 @@ required:</div><div class='ctx'>   - avee-supply</div><div class='ctx'>   - dvdd-supply</div><div class='ctx'>   - vddio-supply</div><div class='add'>+  - ports</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml<br/>index 5f7e4c486094..bbeea8cfa5fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml</a></div><div class='hunk'>@@ -14,9 +14,6 @@ description: |</div><div class='ctx'>   panels. Support video mode panels from China Star Optoelectronics</div><div class='ctx'>   Technology (CSOT) and BOE Technology.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: panel-common.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -38,7 +35,6 @@ properties:</div><div class='ctx'>     description: regulator that supplies the I/O voltage</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='del'>-  ports: true</div><div class='ctx'>   rotation: true</div><div class='ctx'>   backlight: true</div><div class='ctx'> </div><div class='hunk'>@@ -47,7 +43,26 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vddio-supply</div><div class='ctx'>   - reset-gpios</div><div class='del'>-  - ports</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common-dual.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - novatek,nt36523w</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ports:</div><div class='add'>+          properties:</div><div class='add'>+            port@1: false</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        port: false</div><div class='add'>+        ports:</div><div class='add'>+          required:</div><div class='add'>+            - port@1</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-common-dual.yaml b/Documentation/devicetree/bindings/display/panel/panel-common-dual.yaml<br/>new file mode 100644<br/>index 000000000000..cc7ea3c35c77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-common-dual.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/panel-common-dual.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/panel-common-dual.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Common Properties for Dual-Link Display Panels</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Properties common for Panel IC supporting dual link panels.  Devices might</div><div class='add'>+  support also single link.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: First link</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Second link</div><div class='add'>+</div><div class='add'>+      "#address-cells": true</div><div class='add'>+      "#size-cells": true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+</div><div class='add'>+# Single-panel setups are still allowed.</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - ports</div><div class='add'>+  - required:</div><div class='add'>+      - port</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml<br/>index f9160d7bac3c..db5acd2807ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml</a></div><div class='hunk'>@@ -36,6 +36,8 @@ properties:</div><div class='ctx'>       - jdi,fhd-r63452</div><div class='ctx'>         # Khadas TS050 5" 1080x1920 LCD panel</div><div class='ctx'>       - khadas,ts050</div><div class='add'>+        # Khadas TS050 V2 5" 1080x1920 LCD panel</div><div class='add'>+      - khadas,ts050v2</div><div class='ctx'>         # Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel</div><div class='ctx'>       - kingdisplay,kd097d04</div><div class='ctx'>         # LG ACX467AKM-7 4.95" 1080×1920 LCD Panel</div><div class='hunk'>@@ -50,6 +52,8 @@ properties:</div><div class='ctx'>       - panasonic,vvx10f004b00</div><div class='ctx'>         # Panasonic 10" WUXGA TFT LCD panel</div><div class='ctx'>       - panasonic,vvx10f034n00</div><div class='add'>+        # Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel</div><div class='add'>+      - samsung,s6e3fa7-ams559nk06</div><div class='ctx'>         # Samsung s6e3fc2x01 1080x2340 AMOLED panel</div><div class='ctx'>       - samsung,s6e3fc2x01</div><div class='ctx'>         # Samsung sofef00 1080x2280 AMOLED panel</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml<br/>index a95445f40870..5067f5c0a272 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a></div><div class='hunk'>@@ -91,6 +91,8 @@ properties:</div><div class='ctx'>       - boe,nv133fhm-n62</div><div class='ctx'>         # BOE NV140FHM-N49 14.0" FHD a-Si FT panel</div><div class='ctx'>       - boe,nv140fhmn49</div><div class='add'>+        # Crystal Clear Technology CMT430B19N00 4.3" 480x272 TFT-LCD panel</div><div class='add'>+      - cct,cmt430b19n00</div><div class='ctx'>         # CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel</div><div class='ctx'>       - cdtech,s043wq26h-ct7</div><div class='ctx'>         # CDTech(H.K.) Electronics Limited 7" WSVGA (1024x600) TFT LCD Panel</div><div class='hunk'>@@ -188,6 +190,8 @@ properties:</div><div class='ctx'>       - innolux,g121i1-l01</div><div class='ctx'>         # Innolux Corporation 12.1" G121X1-L03 XGA (1024x768) TFT LCD panel</div><div class='ctx'>       - innolux,g121x1-l03</div><div class='add'>+        # Innolux Corporation 12.1" G121XCE-L01 XGA (1024x768) TFT LCD panel</div><div class='add'>+      - innolux,g121xce-l01</div><div class='ctx'>         # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel</div><div class='ctx'>       - innolux,n116bca-ea1</div><div class='ctx'>         # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel</div><div class='hunk'>@@ -272,6 +276,8 @@ properties:</div><div class='ctx'>       - osddisplays,osd070t1718-19ts</div><div class='ctx'>         # One Stop Displays OSD101T2045-53TS 10.1" 1920x1200 panel</div><div class='ctx'>       - osddisplays,osd101t2045-53ts</div><div class='add'>+        # POWERTIP PH128800T006-ZHC01 10.1" WXGA TFT LCD panel</div><div class='add'>+      - powertip,ph128800t006-zhc01</div><div class='ctx'>         # POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel</div><div class='ctx'>       - powertip,ph800480t013-idf02</div><div class='ctx'>         # QiaoDian XianShi Corporation 4"3 TFT LCD panel</div><div class='hunk'>@@ -348,15 +354,6 @@ properties:</div><div class='ctx'>         # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel</div><div class='ctx'>       - yes-optoelectronics,ytc700tlag-05-201c</div><div class='ctx'> </div><div class='del'>-  backlight: true</div><div class='del'>-  ddc-i2c-bus: true</div><div class='del'>-  enable-gpios: true</div><div class='del'>-  port: true</div><div class='del'>-  power-supply: true</div><div class='del'>-  no-hpd: true</div><div class='del'>-  hpd-gpios: true</div><div class='del'>-  data-mapping: true</div><div class='del'>-</div><div class='ctx'> if:</div><div class='ctx'>   not:</div><div class='ctx'>     properties:</div><div class='hunk'>@@ -367,7 +364,7 @@ then:</div><div class='ctx'>   properties:</div><div class='ctx'>     data-mapping: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml b/Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml<br/>new file mode 100644<br/>index 000000000000..b17765b2b351<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/raydium,rm69380.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Raydium RM69380-based DSI display panels</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - David Wronek &lt;david@mainlining.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Raydium RM69380 is a generic DSI panel IC used to control</div><div class='add'>+  OLED panels.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common-dual.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - lenovo,j716f-edo-rm69380</div><div class='add'>+      - const: raydium,rm69380</div><div class='add'>+    description: This indicates the panel manufacturer of the panel</div><div class='add'>+      that is in turn using the RM69380 panel driver. The compatible</div><div class='add'>+      string determines how the RM69380 panel driver shall be configured</div><div class='add'>+      to work with the indicated panel. The raydium,rm69380 compatible shall</div><div class='add'>+      always be provided as a fallback.</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog voltage rail</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: I/O voltage rail</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: phandle of gpio for reset line - This should be active low</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "lenovo,j716f-edo-rm69380", "raydium,rm69380";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;panel_avdd_regulator&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l14a&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 75 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    panel_in_0: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    panel_in_1: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss_dsi1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml<br/>index 6ec471284f97..4ae152cc55e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml</a></div><div class='hunk'>@@ -22,6 +22,8 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel</div><div class='ctx'>       - anbernic,rg353v-panel-v2</div><div class='add'>+      # GameForce Chi 3.5" 640x480 TFT LCD panel</div><div class='add'>+      - gameforce,chi-panel</div><div class='ctx'>       # Powkiddy RGB10MAX3 5.0" 720x1280 TFT LCD panel</div><div class='ctx'>       - powkiddy,rgb10max3-panel</div><div class='ctx'>       # Powkiddy RGB30 3.0" 720x720 TFT LCD panel</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml b/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml<br/>index b6b885b4c22d..07bce556ad40 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml</a></div><div class='hunk'>@@ -23,6 +23,8 @@ properties:</div><div class='ctx'>   reg: true</div><div class='ctx'> </div><div class='ctx'>   backlight: true</div><div class='add'>+  width-mm: true</div><div class='add'>+  height-mm: true</div><div class='ctx'> </div><div class='ctx'>   vddio-supply:</div><div class='ctx'>     description: VDDIO 1.8V supply</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml<br/>index af638b6c0d21..2aac62219ff6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: ../bridge/synopsys,dw-hdmi.yaml#</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -124,6 +125,9 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       phandle to the GRF to mux vopl/vopb.</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -153,6 +157,7 @@ examples:</div><div class='ctx'>         ddc-i2c-bus = &lt;&amp;i2c5&gt;;</div><div class='ctx'>         power-domains = &lt;&amp;power RK3288_PD_VIO&gt;;</div><div class='ctx'>         rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         ports {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml<br/>index be78dcfa1c76..5b87b0f1963e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml</a></div><div class='hunk'>@@ -37,6 +37,9 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='hunk'>@@ -66,6 +69,7 @@ required:</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -106,6 +110,7 @@ examples:</div><div class='ctx'>       clock-names = "pclk";</div><div class='ctx'>       pinctrl-names = "default";</div><div class='ctx'>       pinctrl-0 = &lt;&amp;hdmi_ctl&gt;;</div><div class='add'>+      #sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>       ports {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml<br/>index 1a68a940d165..6d4b78a36576 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml</a></div><div class='hunk'>@@ -10,6 +10,9 @@ maintainers:</div><div class='ctx'>   - Sandy Huang &lt;hjc@rock-chips.com&gt;</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: rockchip,rk3066-hdmi</div><div class='hunk'>@@ -34,6 +37,9 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='hunk'>@@ -83,6 +89,7 @@ examples:</div><div class='ctx'>       pinctrl-names = "default";</div><div class='ctx'>       power-domains = &lt;&amp;power RK3066_PD_VIO&gt;;</div><div class='ctx'>       rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>       ports {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml<br/>index 94c5242c03b2..3563378a01af 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml</a></div><div class='hunk'>@@ -182,6 +182,15 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - nvidia,tegra194-host1x</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        dma-coherent: true</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='ctx'>               - nvidia,tegra234-host1x</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -226,6 +235,8 @@ allOf:</div><div class='ctx'>             use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to</div><div class='ctx'>             usable stream IDs.</div><div class='ctx'> </div><div class='add'>+        dma-coherent: true</div><div class='add'>+</div><div class='ctx'>       required:</div><div class='ctx'>         - reg-names</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml<br/>index 329847ef096a..ff935a0068ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/dma/st,stm32-dma.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/dma/st,stm32-dma.yaml</a></div><div class='hunk'>@@ -82,6 +82,10 @@ properties:</div><div class='ctx'>     description: if defined, it indicates that the controller</div><div class='ctx'>       supports memory-to-memory transfer</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml<br/>index e722fbcd8a5f..ddf82bf1e71a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml</a></div><div class='hunk'>@@ -28,6 +28,10 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml<br/>index 1812ef31d5f1..3c36cd0510de 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/eeprom/at24.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/eeprom/at24.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/eeprom/at24.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/eeprom/at24.yaml</a></div><div class='hunk'>@@ -69,14 +69,10 @@ properties:</div><div class='ctx'>               - items:</div><div class='ctx'>                   pattern: c32$</div><div class='ctx'>               - items:</div><div class='del'>-                  pattern: c32d-wl$</div><div class='del'>-              - items:</div><div class='ctx'>                   pattern: cs32$</div><div class='ctx'>               - items:</div><div class='ctx'>                   pattern: c64$</div><div class='ctx'>               - items:</div><div class='del'>-                  pattern: c64d-wl$</div><div class='del'>-              - items:</div><div class='ctx'>                   pattern: cs64$</div><div class='ctx'>               - items:</div><div class='ctx'>                   pattern: c128$</div><div class='hunk'>@@ -136,6 +132,7 @@ properties:</div><div class='ctx'>               - renesas,r1ex24128</div><div class='ctx'>               - samsung,s524ad0xd1</div><div class='ctx'>           - const: atmel,24c128</div><div class='add'>+      - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st</div><div class='ctx'> </div><div class='ctx'>   label:</div><div class='ctx'>     description: Descriptive name of the EEPROM.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml<br/>index 4591523b51a0..7de2c29606e5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/firmware/arm,scmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/firmware/arm,scmi.yaml</a></div><div class='hunk'>@@ -247,6 +247,37 @@ properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x18</div><div class='ctx'> </div><div class='add'>+  protocol@19:</div><div class='add'>+    type: object</div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: '#/$defs/protocol-node'</div><div class='add'>+      - $ref: /schemas/pinctrl/pinctrl.yaml</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        const: 0x19</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '-pins$':</div><div class='add'>+        type: object</div><div class='add'>+        allOf:</div><div class='add'>+          - $ref: /schemas/pinctrl/pincfg-node.yaml#</div><div class='add'>+          - $ref: /schemas/pinctrl/pinmux-node.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        description:</div><div class='add'>+          A pin multiplexing sub-node describes how to configure a</div><div class='add'>+          set of pins in some desired function.</div><div class='add'>+          A single sub-node may define several pin configurations.</div><div class='add'>+          This sub-node is using the default pinctrl bindings to configure</div><div class='add'>+          pin multiplexing and using SCMI protocol to apply a specified</div><div class='add'>+          configuration.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='hunk'>@@ -355,7 +386,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>             scmi_dvfs: protocol@13 {</div><div class='ctx'>                 reg = &lt;0x13&gt;;</div><div class='del'>-                #clock-cells = &lt;1&gt;;</div><div class='add'>+                #power-domain-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'>                 mboxes = &lt;&amp;mhuB 1 0&gt;,</div><div class='ctx'>                          &lt;&amp;mhuB 1 1&gt;;</div><div class='hunk'>@@ -401,6 +432,25 @@ examples:</div><div class='ctx'>             scmi_powercap: protocol@18 {</div><div class='ctx'>                 reg = &lt;0x18&gt;;</div><div class='ctx'>             };</div><div class='add'>+</div><div class='add'>+            scmi_pinctrl: protocol@19 {</div><div class='add'>+                reg = &lt;0x19&gt;;</div><div class='add'>+</div><div class='add'>+                i2c2-pins {</div><div class='add'>+                    groups = "g_i2c2_a", "g_i2c2_b";</div><div class='add'>+                    function = "f_i2c2";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                mdio-pins {</div><div class='add'>+                    groups = "g_avb_mdio";</div><div class='add'>+                    drive-strength = &lt;24&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                keys_pins: keys-pins {</div><div class='add'>+                    pins = "gpio_5_17", "gpio_5_20", "gpio_5_22", "gpio_2_1";</div><div class='add'>+                    bias-pull-up;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -468,7 +518,7 @@ examples:</div><div class='ctx'>                 reg = &lt;0x13&gt;;</div><div class='ctx'>                 linaro,optee-channel-id = &lt;1&gt;;</div><div class='ctx'>                 shmem = &lt;&amp;cpu_optee_lpri0&gt;;</div><div class='del'>-                #clock-cells = &lt;1&gt;;</div><div class='add'>+                #power-domain-cells = &lt;1&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             scmi_clk0: protocol@14 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml b/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml<br/>index a1e71c974e79..f096f286da19 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml</a></div><div class='hunk'>@@ -62,6 +62,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='ctx'>   wakeup-source:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description: &gt;</div><div class='hunk'>@@ -88,6 +90,7 @@ examples:</div><div class='ctx'>         interrupt-parent = &lt;&amp;irq0_intc&gt;;</div><div class='ctx'>         interrupts = &lt;0x6&gt;;</div><div class='ctx'>         brcm,gpio-bank-widths = &lt;32 32 32 24&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pinctrl 0 0 120&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     upg_gio_aon: gpio@f04172c0 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml<br/>index d481e78958a7..d61569b3f15b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - microchip,mpfs-gpio</div><div class='add'>+          - microchip,coregpio-rtl-v3</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -43,6 +44,7 @@ properties:</div><div class='ctx'>     default: 32</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='add'>+  gpio-line-names: true</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.+-hog(-[0-9]+)?$":</div><div class='hunk'>@@ -62,12 +64,21 @@ patternProperties:</div><div class='ctx'>       - gpio-hog</div><div class='ctx'>       - gpios</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: microchip,mpfs-gpio</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+        - "#interrupt-cells"</div><div class='add'>+        - interrupt-controller</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - "#interrupt-cells"</div><div class='del'>-  - interrupt-controller</div><div class='ctx'>   - "#gpio-cells"</div><div class='ctx'>   - gpio-controller</div><div class='ctx'>   - clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt b/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt<br/>deleted file mode 100644<br/>index ce97265e23ba..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-Raspberry Pi GPIO expander</div><div class='del'>-</div><div class='del'>-The Raspberry Pi 3 GPIO expander is controlled by the VC4 firmware. The</div><div class='del'>-firmware exposes a mailbox interface that allows the ARM core to control the</div><div class='del'>-GPIO lines on the expander.</div><div class='del'>-</div><div class='del'>-The Raspberry Pi GPIO expander node must be a child node of the Raspberry Pi</div><div class='del'>-firmware node.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : Should be "raspberrypi,firmware-gpio"</div><div class='del'>-- gpio-controller : Marks the device node as a gpio controller</div><div class='del'>-- #gpio-cells : Should be two.  The first cell is the pin number, and</div><div class='del'>-  the second cell is used to specify the gpio polarity:</div><div class='del'>-  0 = active high</div><div class='del'>-  1 = active low</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-firmware: firmware-rpi {</div><div class='del'>-	compatible = "raspberrypi,bcm2835-firmware";</div><div class='del'>-	mboxes = &lt;&amp;mailbox&gt;;</div><div class='del'>-</div><div class='del'>-	expgpio: gpio {</div><div class='del'>-		 compatible = "raspberrypi,firmware-gpio";</div><div class='del'>-		 gpio-controller;</div><div class='del'>-		 #gpio-cells = &lt;2&gt;;</div><div class='del'>-	 };</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml<br/>new file mode 100644<br/>index 000000000000..a5b4e0021758<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Mali Valhall GPU</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liviu Dudau &lt;liviu.dudau@arm.com&gt;</div><div class='add'>+  - Boris Brezillon &lt;boris.brezillon@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: '^gpu@[a-f0-9]+$'</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - rockchip,rk3588-mali</div><div class='add'>+          - const: arm,mali-valhall-csf   # Mali Valhall GPU model/revision is fully discoverable</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Job interrupt</div><div class='add'>+      - description: MMU interrupt</div><div class='add'>+      - description: GPU interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: job</div><div class='add'>+      - const: mmu</div><div class='add'>+      - const: gpu</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: coregroup</div><div class='add'>+      - const: stacks</div><div class='add'>+</div><div class='add'>+  mali-supply: true</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  sram-supply: true</div><div class='add'>+</div><div class='add'>+  "#cooling-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  dynamic-power-coefficient:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      A u32 value that represents the running time dynamic</div><div class='add'>+      power coefficient in units of uW/MHz/V^2. The</div><div class='add'>+      coefficient can either be calculated from power</div><div class='add'>+      measurements or derived by analysis.</div><div class='add'>+</div><div class='add'>+      The dynamic power consumption of the GPU is</div><div class='add'>+      proportional to the square of the Voltage (V) and</div><div class='add'>+      the clock frequency (f). The coefficient is used to</div><div class='add'>+      calculate the dynamic power as below -</div><div class='add'>+</div><div class='add'>+      Pdyn = dynamic-power-coefficient * V^2 * f</div><div class='add'>+</div><div class='add'>+      where voltage is in V, frequency is in MHz.</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - mali-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3588-mali</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        power-domain-names: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rockchip,rk3588-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/rk3588-power.h&gt;</div><div class='add'>+</div><div class='add'>+    gpu: gpu@fb000000 {</div><div class='add'>+        compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";</div><div class='add'>+        reg = &lt;0xfb000000 0x200000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+                     &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+                     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+        interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+        clock-names = "core", "coregroup", "stacks";</div><div class='add'>+        clocks = &lt;&amp;cru CLK_GPU&gt;, &lt;&amp;cru CLK_GPU_COREGROUP&gt;,</div><div class='add'>+                 &lt;&amp;cru CLK_GPU_STACKS&gt;;</div><div class='add'>+        power-domains = &lt;&amp;power RK3588_PD_GPU&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+        mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+        sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+</div><div class='add'>+        gpu_opp_table: opp-table {</div><div class='add'>+            compatible = "operating-points-v2";</div><div class='add'>+            opp-300000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;675000 675000 850000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-400000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;675000 675000 850000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adc128d818.txt b/Documentation/devicetree/bindings/hwmon/adc128d818.txt<br/>deleted file mode 100644<br/>index d0ae46d7bac3..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/adc128d818.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/adc128d818.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-TI ADC128D818 ADC System Monitor With Temperature Sensor</div><div class='del'>---------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Operation modes:</div><div class='del'>-</div><div class='del'>- - Mode 0:  7 single-ended voltage readings (IN0-IN6),</div><div class='del'>-            1 temperature reading (internal)</div><div class='del'>- - Mode 1:  8 single-ended voltage readings (IN0-IN7),</div><div class='del'>-            no temperature</div><div class='del'>- - Mode 2:  4 pseudo-differential voltage readings</div><div class='del'>-              (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6),</div><div class='del'>-            1 temperature reading (internal)</div><div class='del'>- - Mode 3:  4 single-ended voltage readings (IN0-IN3),</div><div class='del'>-            2 pseudo-differential voltage readings</div><div class='del'>-              (IN4-IN5, IN7-IN6),</div><div class='del'>-            1 temperature reading (internal)</div><div class='del'>-</div><div class='del'>-If no operation mode is configured via device tree, the driver keeps the</div><div class='del'>-currently active chip operation mode (default is mode 0).</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Required node properties:</div><div class='del'>-</div><div class='del'>- - compatible:  must be set to "ti,adc128d818"</div><div class='del'>- - reg:         I2C address of the device</div><div class='del'>-</div><div class='del'>-Optional node properties:</div><div class='del'>-</div><div class='del'>- - ti,mode:     Operation mode (u8) (see above).</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example (operation mode 2):</div><div class='del'>-</div><div class='del'>-	adc128d818@1d {</div><div class='del'>-		compatible = "ti,adc128d818";</div><div class='del'>-		reg = &lt;0x1d&gt;;</div><div class='del'>-		ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml<br/>index b68061294964..5b076d677395 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/hwmon/adi,adm1275.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analog Devices ADM1075/ADM127x/ADM129x digital power monitors</div><div class='add'>+title: Analog Devices ADM1075/ADM127x/ADM1281/ADM129x digital power monitors</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>       - adi,adm1275</div><div class='ctx'>       - adi,adm1276</div><div class='ctx'>       - adi,adm1278</div><div class='add'>+      - adi,adm1281</div><div class='ctx'>       - adi,adm1293</div><div class='ctx'>       - adi,adm1294</div><div class='ctx'> </div><div class='hunk'>@@ -91,6 +92,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - adi,adm1278</div><div class='add'>+              - adi,adm1281</div><div class='ctx'>               - adi,adm1293</div><div class='ctx'>               - adi,adm1294</div><div class='ctx'>     then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/as370.txt b/Documentation/devicetree/bindings/hwmon/as370.txt<br/>deleted file mode 100644<br/>index d102fe765124..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/as370.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/as370.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-Bindings for Synaptics AS370 PVT sensors</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "syna,as370-hwmon"</div><div class='del'>-- reg        : address and length of the register set.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	hwmon@ea0810 {</div><div class='del'>-		compatible = "syna,as370-hwmon";</div><div class='del'>-		reg = &lt;0xea0810 0xc&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ibm,opal-sensor.yaml b/Documentation/devicetree/bindings/hwmon/ibm,opal-sensor.yaml<br/>new file mode 100644<br/>index 000000000000..376ee7f1cdb7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/ibm,opal-sensor.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/ibm,opal-sensor.yaml</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/ibm,opal-sensor.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: IBM POWERNV platform sensors</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Javier Carrasco &lt;javier.carrasco.cruz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ibm,opal-sensor-cooling-fan</div><div class='add'>+      - ibm,opal-sensor-amb-temp</div><div class='add'>+      - ibm,opal-sensor-power-supply</div><div class='add'>+      - ibm,opal-sensor-power</div><div class='add'>+</div><div class='add'>+  sensor-id:</div><div class='add'>+    description:</div><div class='add'>+      An opaque id provided by the firmware to the kernel, identifies a</div><div class='add'>+      given sensor and its attribute data.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - sensor-id</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sensor {</div><div class='add'>+        compatible = "ibm,opal-sensor-cooling-fan";</div><div class='add'>+        sensor-id = &lt;0x7052107&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt b/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt<br/>deleted file mode 100644<br/>index 5dc5d2e2573d..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-Device-tree bindings for I2C-based On-Chip Controller hwmon device</div><div class='del'>-------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible = "ibm,p8-occ-hwmon";</div><div class='del'>- - reg = &lt;I2C address&gt;;			: I2C bus address</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-    i2c-bus@100 {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        clock-frequency = &lt;100000&gt;;</div><div class='del'>-        &lt; more properties &gt;</div><div class='del'>-</div><div class='del'>-        occ-hwmon@1 {</div><div class='del'>-            compatible = "ibm,p8-occ-hwmon";</div><div class='del'>-            reg = &lt;0x50&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        occ-hwmon@2 {</div><div class='del'>-            compatible = "ibm,p8-occ-hwmon";</div><div class='del'>-            reg = &lt;0x51&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ibmpowernv.txt b/Documentation/devicetree/bindings/hwmon/ibmpowernv.txt<br/>deleted file mode 100644<br/>index f93242be60a1..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/ibmpowernv.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/ibmpowernv.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-IBM POWERNV platform sensors</div><div class='del'>-----------------------------</div><div class='del'>-</div><div class='del'>-Required node properties:</div><div class='del'>-- compatible: must be one of</div><div class='del'>-		"ibm,opal-sensor-cooling-fan"</div><div class='del'>-		"ibm,opal-sensor-amb-temp"</div><div class='del'>-		"ibm,opal-sensor-power-supply"</div><div class='del'>-		"ibm,opal-sensor-power"</div><div class='del'>-- sensor-id: an opaque id provided by the firmware to the kernel, identifies a</div><div class='del'>-	     given sensor and its attribute data</div><div class='del'>-</div><div class='del'>-Example sensors node:</div><div class='del'>-</div><div class='del'>-cooling-fan#8-data {</div><div class='del'>-	sensor-id = &lt;0x7052107&gt;;</div><div class='del'>-	compatible = "ibm,opal-sensor-cooling-fan";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-amb-temp#1-thrs {</div><div class='del'>-	sensor-id = &lt;0x5096000&gt;;</div><div class='del'>-	compatible = "ibm,opal-sensor-amb-temp";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/lm87.txt b/Documentation/devicetree/bindings/hwmon/lm87.txt<br/>deleted file mode 100644<br/>index 758ff398b67b..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/lm87.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/lm87.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-*LM87 hwmon sensor.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be</div><div class='del'>-	"ti,lm87"</div><div class='del'>-</div><div class='del'>-- reg: I2C address</div><div class='del'>-</div><div class='del'>-optional properties:</div><div class='del'>-- has-temp3: This configures pins 18 and 19 to be used as a second</div><div class='del'>-             remote temperature sensing channel. By default the pins</div><div class='del'>-             are configured as voltage input pins in0 and in5.</div><div class='del'>-</div><div class='del'>-- has-in6: When set, pin 5 is configured to be used as voltage input</div><div class='del'>-           in6. Otherwise the pin is set as FAN1 input.</div><div class='del'>-</div><div class='del'>-- has-in7: When set, pin 6 is configured to be used as voltage input</div><div class='del'>-           in7. Otherwise the pin is set as FAN2 input.</div><div class='del'>-</div><div class='del'>-- vcc-supply: a Phandle for the regulator supplying power, can be</div><div class='del'>-              configured to measure 5.0V power supply. Default is 3.3V.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-lm87@2e {</div><div class='del'>-	compatible = "ti,lm87";</div><div class='del'>-	reg = &lt;0x2e&gt;;</div><div class='del'>-	has-temp3;</div><div class='del'>-	vcc-supply = &lt;&amp;reg_5v0&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/max6650.txt b/Documentation/devicetree/bindings/hwmon/max6650.txt<br/>deleted file mode 100644<br/>index f6bd87d8e284..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/max6650.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/max6650.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-Bindings for MAX6651 and MAX6650 I2C fan controllers</div><div class='del'>-</div><div class='del'>-Reference:</div><div class='del'>-[1]	https://datasheets.maximintegrated.com/en/ds/MAX6650-MAX6651.pdf</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : One of "maxim,max6650" or "maxim,max6651"</div><div class='del'>-- reg        : I2C address, one of 0x1b, 0x1f, 0x4b, 0x48.</div><div class='del'>-</div><div class='del'>-Optional properties, default is to retain the chip's current setting:</div><div class='del'>-- maxim,fan-microvolt : The supply voltage of the fan, either 5000000 uV or</div><div class='del'>-			12000000 uV.</div><div class='del'>-- maxim,fan-prescale  : Pre-scaling value, as per datasheet [1]. Lower values</div><div class='del'>-			allow more fine-grained control of slower fans.</div><div class='del'>-			Valid: 1, 2, 4, 8, 16.</div><div class='del'>-- maxim,fan-target-rpm: Initial requested fan rotation speed. If specified, the</div><div class='del'>-			driver selects closed-loop mode and the requested speed.</div><div class='del'>-			This ensures the fan is already running before userspace</div><div class='del'>-			takes over.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	fan-max6650: max6650@1b {</div><div class='del'>-		reg = &lt;0x1b&gt;;</div><div class='del'>-		compatible = "maxim,max6650";</div><div class='del'>-		maxim,fan-microvolt = &lt;12000000&gt;;</div><div class='del'>-		maxim,fan-prescale = &lt;4&gt;;</div><div class='del'>-		maxim,fan-target-rpm = &lt;1200&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/maxim,max6650.yaml b/Documentation/devicetree/bindings/hwmon/maxim,max6650.yaml<br/>new file mode 100644<br/>index 000000000000..2c26104a5e16<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/maxim,max6650.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/maxim,max6650.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/maxim,max6650.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim MAX6650 and MAX6651 I2C Fan Controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Javier Carrasco &lt;javier.carrasco.cruz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MAX6650 and MAX6651 regulate and monitor the speed</div><div class='add'>+  of 5VDC/12VDC burshless fans with built-in tachometers.</div><div class='add'>+</div><div class='add'>+  Datasheets:</div><div class='add'>+    https://datasheets.maximintegrated.com/en/ds/MAX6650-MAX6651.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max6650</div><div class='add'>+      - maxim,max6651</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  maxim,fan-microvolt:</div><div class='add'>+    description:</div><div class='add'>+      The supply voltage of the fan, either 5000000 uV or</div><div class='add'>+      12000000 uV.</div><div class='add'>+    enum: [5000000, 12000000]</div><div class='add'>+</div><div class='add'>+  maxim,fan-prescale:</div><div class='add'>+    description:</div><div class='add'>+      Pre-scaling value, as per datasheet. Lower values</div><div class='add'>+      allow more fine-grained control of slower fans.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [1, 2, 4, 8, 16]</div><div class='add'>+</div><div class='add'>+  maxim,fan-target-rpm:</div><div class='add'>+    description:</div><div class='add'>+      Initial requested fan rotation speed. If specified, the</div><div class='add'>+      driver selects closed-loop mode and the requested speed.</div><div class='add'>+      This ensures the fan is already running before userspace</div><div class='add'>+      takes over.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 30000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        fan-controller@1b {</div><div class='add'>+            compatible = "maxim,max6650";</div><div class='add'>+            reg = &lt;0x1b&gt;;</div><div class='add'>+            maxim,fan-microvolt = &lt;12000000&gt;;</div><div class='add'>+            maxim,fan-prescale = &lt;4&gt;;</div><div class='add'>+            maxim,fan-target-rpm = &lt;1200&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml<br/>new file mode 100644<br/>index 000000000000..10c2204bc3df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/pmbus/adi,adp1050.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices ADP1050 digital controller with PMBus interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Radu Sabau &lt;radu.sabau@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+   The ADP1050 is used to monitor system voltages, currents and temperatures.</div><div class='add'>+   Through the PMBus interface, the ADP1050 targets isolated power supplies</div><div class='add'>+   and has four individual monitors for input/output voltage, input current</div><div class='add'>+   and temperature.</div><div class='add'>+   Datasheet:</div><div class='add'>+     https://www.analog.com/en/products/adp1050.html</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: adi,adp1050</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vcc-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vcc-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+        hwmon@70 {</div><div class='add'>+            compatible = "adi,adp1050";</div><div class='add'>+            reg = &lt;0x70&gt;;</div><div class='add'>+            vcc-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt<br/>deleted file mode 100644<br/>index 48886f0ce415..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/pwm-fan.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/pwm-fan.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-This file has moved to pwm-fan.yaml.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/st,stts751.yaml b/Documentation/devicetree/bindings/hwmon/st,stts751.yaml<br/>new file mode 100644<br/>index 000000000000..9c825adbed58<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/st,stts751.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/st,stts751.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/st,stts751.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STTS751 Thermometer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Javier Carrasco &lt;javier.carrasco.cruz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stts751</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  smbus-timeout-disable:</div><div class='add'>+    description:</div><div class='add'>+      When set, the smbus timeout function will be disabled.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        thermometer@48 {</div><div class='add'>+            compatible = "st,stts751";</div><div class='add'>+            reg = &lt;0x48&gt;;</div><div class='add'>+            smbus-timeout-disable;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/stts751.txt b/Documentation/devicetree/bindings/hwmon/stts751.txt<br/>deleted file mode 100644<br/>index 3ee1dc30e72f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/stts751.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/hwmon/stts751.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-* STTS751 thermometer.</div><div class='del'>-</div><div class='del'>-Required node properties:</div><div class='del'>-- compatible: "stts751"</div><div class='del'>-- reg: I2C bus address of the device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- smbus-timeout-disable: when set, the smbus timeout function will be disabled</div><div class='del'>-</div><div class='del'>-Example stts751 node:</div><div class='del'>-</div><div class='del'>-temp-sensor {</div><div class='del'>-	compatible = "stts751";</div><div class='del'>-	reg = &lt;0x48&gt;;</div><div class='del'>-}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/syna,as370.yaml b/Documentation/devicetree/bindings/hwmon/syna,as370.yaml<br/>new file mode 100644<br/>index 000000000000..1f7005f55247<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/syna,as370.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/syna,as370.yaml</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/syna,as370.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synaptics AS370 PVT sensors</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Javier Carrasco &lt;javier.carrasco.cruz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: syna,as370-hwmon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      Address and length of the register set.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sensor@ea0810 {</div><div class='add'>+        compatible = "syna,as370-hwmon";</div><div class='add'>+        reg = &lt;0xea0810 0xc&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,adc128d818.yaml b/Documentation/devicetree/bindings/hwmon/ti,adc128d818.yaml<br/>new file mode 100644<br/>index 000000000000..a32035409cee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/ti,adc128d818.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/ti,adc128d818.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/ti,adc128d818.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments ADC128D818 ADC System Monitor With Temperature Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Javier Carrasco &lt;javier.carrasco.cruz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The ADC128D818 is a 12-Bit, 8-Channel Analog to Digital Converter (ADC)</div><div class='add'>+  with a temperature sensor and an I2C interface.</div><div class='add'>+</div><div class='add'>+  Datasheets:</div><div class='add'>+    https://www.ti.com/product/ADC128D818</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,adc128d818</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      Operation mode.</div><div class='add'>+      Mode 0  - 7 single-ended voltage readings (IN0-IN6), 1 temperature</div><div class='add'>+      reading (internal).</div><div class='add'>+      Mode 1 - 8 single-ended voltage readings (IN0-IN7), no temperature.</div><div class='add'>+      Mode 2 - 4 pseudo-differential voltage readings</div><div class='add'>+      (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 1 temperature reading (internal).</div><div class='add'>+      Mode 3 - 4 single-ended voltage readings (IN0-IN3), 2 pseudo-differential</div><div class='add'>+      voltage readings (IN4-IN5, IN7-IN6), 1 temperature reading (internal).</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  vref-supply:</div><div class='add'>+    description:</div><div class='add'>+      The regulator to use as an external reference. If it does not exist, the</div><div class='add'>+      internal reference will be used.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@1d {</div><div class='add'>+            compatible = "ti,adc128d818";</div><div class='add'>+            reg = &lt;0x1d&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;vref&gt;;</div><div class='add'>+            ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,lm87.yaml b/Documentation/devicetree/bindings/hwmon/ti,lm87.yaml<br/>new file mode 100644<br/>index 000000000000..f553235a7321<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/hwmon/ti,lm87.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/hwmon/ti,lm87.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/ti,lm87.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments LM87 Hardware Monitor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Javier Carrasco &lt;javier.carrasco.cruz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The LM87 is a serial interface system hardware monitor</div><div class='add'>+  with remote diode temperature sensing.</div><div class='add'>+</div><div class='add'>+  Datasheets:</div><div class='add'>+    https://www.ti.com/product/LM87</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,lm87</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  has-temp3:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      This configures pins 18 and 19 to be used as a second</div><div class='add'>+      remote temperature sensing channel. By default the pins</div><div class='add'>+      are configured as voltage input pins in0 and in5.</div><div class='add'>+</div><div class='add'>+  has-in6:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      When set, pin 5 is configured to be used as voltage input</div><div class='add'>+      in6. Otherwise the pin is set as FAN1 input.</div><div class='add'>+</div><div class='add'>+  has-in7:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      When set, pin 6 is configured to be used as voltage input</div><div class='add'>+      in7. Otherwise the pin is set as FAN2 input.</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description:</div><div class='add'>+      Regulator supplying power, can be configured to measure</div><div class='add'>+      5.0V power supply. Default is 3.3V.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        hwmon@2e {</div><div class='add'>+            compatible = "ti,lm87";</div><div class='add'>+            reg = &lt;0x2e&gt;;</div><div class='add'>+            has-temp3;</div><div class='add'>+            vcc-supply = &lt;&amp;reg_5v0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml<br/>index 1b31b87c1800..8fd8be76875e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml</a></div><div class='hunk'>@@ -127,6 +127,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   wakeup-source: true</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml<br/>index 995cbf8cefc6..ec34c48d4878 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml</a></div><div class='hunk'>@@ -93,6 +93,10 @@ properties:</div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml<br/>index 1970503389aa..c1b1324fa132 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml</a></div><div class='hunk'>@@ -59,6 +59,10 @@ properties:</div><div class='ctx'>       If not, SPI CLKOUT frequency will not be accurate.</div><div class='ctx'>     maximum: 20000000</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml b/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml<br/>index 04045b932bd2..b15de4eb209c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml</a></div><div class='hunk'>@@ -45,6 +45,10 @@ properties:</div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml b/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml<br/>index c13c10c8d65d..eed0df9d3a23 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml</a></div><div class='hunk'>@@ -42,7 +42,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: maxim,max30100</div><div class='add'>+            const: maxim,max30102</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         maxim,green-led-current-microamp: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml<br/>new file mode 100644<br/>index 000000000000..190a6499c932<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RISC-V Advanced Platform Level Interrupt Controller (APLIC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Anup Patel &lt;anup@brainfault.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The RISC-V advanced interrupt architecture (AIA) defines an advanced</div><div class='add'>+  platform level interrupt controller (APLIC) for handling wired interrupts</div><div class='add'>+  in a RISC-V platform. The RISC-V AIA specification can be found at</div><div class='add'>+  https://github.com/riscv/riscv-aia.</div><div class='add'>+</div><div class='add'>+  The RISC-V APLIC is implemented as hierarchical APLIC domains where all</div><div class='add'>+  interrupt sources connect to the root APLIC domain and a parent APLIC</div><div class='add'>+  domain can delegate interrupt sources to it's child APLIC domains. There</div><div class='add'>+  is one device tree node for each APLIC domain.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qemu,aplic</div><div class='add'>+      - const: riscv,aplic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts-extended:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16384</div><div class='add'>+    description:</div><div class='add'>+      Given APLIC domain directly injects external interrupts to a set of</div><div class='add'>+      RISC-V HARTS (or CPUs). Each node pointed to should be a riscv,cpu-intc</div><div class='add'>+      node, which has a CPU node (i.e. RISC-V HART) as parent.</div><div class='add'>+</div><div class='add'>+  msi-parent:</div><div class='add'>+    description:</div><div class='add'>+      Given APLIC domain forwards wired interrupts as MSIs to a AIA incoming</div><div class='add'>+      message signaled interrupt controller (IMSIC). If both "msi-parent" and</div><div class='add'>+      "interrupts-extended" properties are present then it means the APLIC</div><div class='add'>+      domain supports both MSI mode and Direct mode in HW. In this case, the</div><div class='add'>+      APLIC driver has to choose between MSI mode or Direct mode.</div><div class='add'>+</div><div class='add'>+  riscv,num-sources:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 1023</div><div class='add'>+    description:</div><div class='add'>+      Specifies the number of wired interrupt sources supported by this</div><div class='add'>+      APLIC domain.</div><div class='add'>+</div><div class='add'>+  riscv,children:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 1024</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      A list of child APLIC domains for the given APLIC domain. Each child</div><div class='add'>+      APLIC domain is assigned a child index in increasing order, with the</div><div class='add'>+      first child APLIC domain assigned child index 0. The APLIC domain child</div><div class='add'>+      index is used by firmware to delegate interrupts from the given APLIC</div><div class='add'>+      domain to a particular child APLIC domain.</div><div class='add'>+</div><div class='add'>+  riscv,delegation:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 1024</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: child APLIC domain phandle</div><div class='add'>+        - description: first interrupt number of the parent APLIC domain (inclusive)</div><div class='add'>+        - description: last interrupt number of the parent APLIC domain (inclusive)</div><div class='add'>+    description:</div><div class='add'>+      A interrupt delegation list where each entry is a triple consisting</div><div class='add'>+      of child APLIC domain phandle, first interrupt number of the parent</div><div class='add'>+      APLIC domain, and last interrupt number of the parent APLIC domain.</div><div class='add'>+      Firmware must configure interrupt delegation registers based on</div><div class='add'>+      interrupt delegation list.</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  riscv,delegation: [ "riscv,children" ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - riscv,num-sources</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - interrupts-extended</div><div class='add'>+  - required:</div><div class='add'>+      - msi-parent</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // Example 1 (APLIC domains directly injecting interrupt to HARTs):</div><div class='add'>+</div><div class='add'>+    interrupt-controller@c000000 {</div><div class='add'>+      compatible = "qemu,aplic", "riscv,aplic";</div><div class='add'>+      interrupts-extended = &lt;&amp;cpu1_intc 11&gt;,</div><div class='add'>+                            &lt;&amp;cpu2_intc 11&gt;,</div><div class='add'>+                            &lt;&amp;cpu3_intc 11&gt;,</div><div class='add'>+                            &lt;&amp;cpu4_intc 11&gt;;</div><div class='add'>+      reg = &lt;0xc000000 0x4080&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      riscv,num-sources = &lt;63&gt;;</div><div class='add'>+      riscv,children = &lt;&amp;aplic1&gt;, &lt;&amp;aplic2&gt;;</div><div class='add'>+      riscv,delegation = &lt;&amp;aplic1 1 63&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    aplic1: interrupt-controller@d000000 {</div><div class='add'>+      compatible = "qemu,aplic", "riscv,aplic";</div><div class='add'>+      interrupts-extended = &lt;&amp;cpu1_intc 9&gt;,</div><div class='add'>+                            &lt;&amp;cpu2_intc 9&gt;;</div><div class='add'>+      reg = &lt;0xd000000 0x4080&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      riscv,num-sources = &lt;63&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    aplic2: interrupt-controller@e000000 {</div><div class='add'>+      compatible = "qemu,aplic", "riscv,aplic";</div><div class='add'>+      interrupts-extended = &lt;&amp;cpu3_intc 9&gt;,</div><div class='add'>+                            &lt;&amp;cpu4_intc 9&gt;;</div><div class='add'>+      reg = &lt;0xe000000 0x4080&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      riscv,num-sources = &lt;63&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // Example 2 (APLIC domains forwarding interrupts as MSIs):</div><div class='add'>+</div><div class='add'>+    interrupt-controller@c000000 {</div><div class='add'>+      compatible = "qemu,aplic", "riscv,aplic";</div><div class='add'>+      msi-parent = &lt;&amp;imsic_mlevel&gt;;</div><div class='add'>+      reg = &lt;0xc000000 0x4000&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      riscv,num-sources = &lt;63&gt;;</div><div class='add'>+      riscv,children = &lt;&amp;aplic3&gt;;</div><div class='add'>+      riscv,delegation = &lt;&amp;aplic3 1 63&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    aplic3: interrupt-controller@d000000 {</div><div class='add'>+      compatible = "qemu,aplic", "riscv,aplic";</div><div class='add'>+      msi-parent = &lt;&amp;imsic_slevel&gt;;</div><div class='add'>+      reg = &lt;0xd000000 0x4000&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      riscv,num-sources = &lt;63&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml<br/>new file mode 100644<br/>index 000000000000..84976f17a4a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RISC-V Incoming MSI Controller (IMSIC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Anup Patel &lt;anup@brainfault.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RISC-V advanced interrupt architecture (AIA) defines a per-CPU incoming</div><div class='add'>+  MSI controller (IMSIC) for handling MSIs in a RISC-V platform. The RISC-V</div><div class='add'>+  AIA specification can be found at https://github.com/riscv/riscv-aia.</div><div class='add'>+</div><div class='add'>+  The IMSIC is a per-CPU (or per-HART) device with separate interrupt file</div><div class='add'>+  for each privilege level (machine or supervisor). The configuration of</div><div class='add'>+  a IMSIC interrupt file is done using AIA CSRs and it also has a 4KB MMIO</div><div class='add'>+  space to receive MSIs from devices. Each IMSIC interrupt file supports a</div><div class='add'>+  fixed number of interrupt identities (to distinguish MSIs from devices)</div><div class='add'>+  which is same for given privilege level across CPUs (or HARTs).</div><div class='add'>+</div><div class='add'>+  The device tree of a RISC-V platform will have one IMSIC device tree node</div><div class='add'>+  for each privilege level (machine or supervisor) which collectively describe</div><div class='add'>+  IMSIC interrupt files at that privilege level across CPUs (or HARTs).</div><div class='add'>+</div><div class='add'>+  The arrangement of IMSIC interrupt files in MMIO space of a RISC-V platform</div><div class='add'>+  follows a particular scheme defined by the RISC-V AIA specification. A IMSIC</div><div class='add'>+  group is a set of IMSIC interrupt files co-located in MMIO space and we can</div><div class='add'>+  have multiple IMSIC groups (i.e. clusters, sockets, chiplets, etc) in a</div><div class='add'>+  RISC-V platform. The MSI target address of a IMSIC interrupt file at given</div><div class='add'>+  privilege level (machine or supervisor) encodes group index, HART index,</div><div class='add'>+  and guest index (shown below).</div><div class='add'>+</div><div class='add'>+  XLEN-1            &gt; (HART Index MSB)                  12    0</div><div class='add'>+  |                  |                                  |     |</div><div class='add'>+  -------------------------------------------------------------</div><div class='add'>+  |xxxxxx|Group Index|xxxxxxxxxxx|HART Index|Guest Index|  0  |</div><div class='add'>+  -------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qemu,imsics</div><div class='add'>+      - const: riscv,imsics</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16384</div><div class='add'>+    description:</div><div class='add'>+      Base address of each IMSIC group.</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  msi-controller: true</div><div class='add'>+</div><div class='add'>+  "#msi-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interrupts-extended:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16384</div><div class='add'>+    description:</div><div class='add'>+      This property represents the set of CPUs (or HARTs) for which given</div><div class='add'>+      device tree node describes the IMSIC interrupt files. Each node pointed</div><div class='add'>+      to should be a riscv,cpu-intc node, which has a CPU node (i.e. RISC-V</div><div class='add'>+      HART) as parent.</div><div class='add'>+</div><div class='add'>+  riscv,num-ids:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 63</div><div class='add'>+    maximum: 2047</div><div class='add'>+    description:</div><div class='add'>+      Number of interrupt identities supported by IMSIC interrupt file.</div><div class='add'>+</div><div class='add'>+  riscv,num-guest-ids:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 63</div><div class='add'>+    maximum: 2047</div><div class='add'>+    description:</div><div class='add'>+      Number of interrupt identities are supported by IMSIC guest interrupt</div><div class='add'>+      file. When not specified it is assumed to be same as specified by the</div><div class='add'>+      riscv,num-ids property.</div><div class='add'>+</div><div class='add'>+  riscv,guest-index-bits:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 7</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Number of guest index bits in the MSI target address.</div><div class='add'>+</div><div class='add'>+  riscv,hart-index-bits:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Number of HART index bits in the MSI target address. When not</div><div class='add'>+      specified it is calculated based on the interrupts-extended property.</div><div class='add'>+</div><div class='add'>+  riscv,group-index-bits:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 7</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Number of group index bits in the MSI target address.</div><div class='add'>+</div><div class='add'>+  riscv,group-index-shift:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 55</div><div class='add'>+    default: 24</div><div class='add'>+    description:</div><div class='add'>+      The least significant bit position of the group index bits in the</div><div class='add'>+      MSI target address.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - msi-controller</div><div class='add'>+  - "#msi-cells"</div><div class='add'>+  - interrupts-extended</div><div class='add'>+  - riscv,num-ids</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // Example 1 (Machine-level IMSIC files with just one group):</div><div class='add'>+</div><div class='add'>+    interrupt-controller@24000000 {</div><div class='add'>+      compatible = "qemu,imsics", "riscv,imsics";</div><div class='add'>+      interrupts-extended = &lt;&amp;cpu1_intc 11&gt;,</div><div class='add'>+                            &lt;&amp;cpu2_intc 11&gt;,</div><div class='add'>+                            &lt;&amp;cpu3_intc 11&gt;,</div><div class='add'>+                            &lt;&amp;cpu4_intc 11&gt;;</div><div class='add'>+      reg = &lt;0x28000000 0x4000&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;0&gt;;</div><div class='add'>+      msi-controller;</div><div class='add'>+      #msi-cells = &lt;0&gt;;</div><div class='add'>+      riscv,num-ids = &lt;127&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // Example 2 (Supervisor-level IMSIC files with two groups):</div><div class='add'>+</div><div class='add'>+    interrupt-controller@28000000 {</div><div class='add'>+      compatible = "qemu,imsics", "riscv,imsics";</div><div class='add'>+      interrupts-extended = &lt;&amp;cpu1_intc 9&gt;,</div><div class='add'>+                            &lt;&amp;cpu2_intc 9&gt;,</div><div class='add'>+                            &lt;&amp;cpu3_intc 9&gt;,</div><div class='add'>+                            &lt;&amp;cpu4_intc 9&gt;;</div><div class='add'>+      reg = &lt;0x28000000 0x2000&gt;, /* Group0 IMSICs */</div><div class='add'>+            &lt;0x29000000 0x2000&gt;; /* Group1 IMSICs */</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;0&gt;;</div><div class='add'>+      msi-controller;</div><div class='add'>+      #msi-cells = &lt;0&gt;;</div><div class='add'>+      riscv,num-ids = &lt;127&gt;;</div><div class='add'>+      riscv,group-index-bits = &lt;1&gt;;</div><div class='add'>+      riscv,group-index-shift = &lt;24&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml<br/>index 00c10a8258f1..9967e57b449b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml</a></div><div class='hunk'>@@ -89,8 +89,23 @@ examples:</div><div class='ctx'>         reg = &lt;0x5000d000 0x400&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='add'>+  - |</div><div class='ctx'>     //Example 2</div><div class='del'>-    exti2: interrupt-controller@40013c00 {</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    exti2: interrupt-controller@5000d000 {</div><div class='add'>+        compatible = "st,stm32mp1-exti", "syscon";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        reg = &lt;0x5000d000 0x400&gt;;</div><div class='add'>+        interrupts-extended =</div><div class='add'>+            &lt;&amp;intc GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+            &lt;0&gt;,</div><div class='add'>+            &lt;&amp;intc GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    //Example 3</div><div class='add'>+    exti3: interrupt-controller@40013c00 {</div><div class='ctx'>         compatible = "st,stm32-exti";</div><div class='ctx'>         interrupt-controller;</div><div class='ctx'>         #interrupt-cells = &lt;2&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml b/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml<br/>index 2314a9a14650..1d930d9e10fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml</a></div><div class='hunk'>@@ -29,6 +29,10 @@ properties:</div><div class='ctx'>       - const: cec</div><div class='ctx'>       - const: hdmi-cec</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml b/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml<br/>index 6b3e413cedb2..34147127192f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml</a></div><div class='hunk'>@@ -36,6 +36,10 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>     unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml b/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml<br/>index b8611bc8756c..73726c65cfb9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml</a></div><div class='hunk'>@@ -30,6 +30,10 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/samsung,s5pv210-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/samsung,s5pv210-dmc.yaml<br/>new file mode 100644<br/>index 000000000000..c0e47055f28c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/samsung,s5pv210-dmc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/memory-controllers/samsung,s5pv210-dmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/samsung,s5pv210-dmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5Pv210 SoC Dynamic Memory Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Dynamic Memory Controller interfaces external JEDEC DDR-type SDRAM.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,s5pv210-dmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    memory-controller@f0000000 {</div><div class='add'>+        compatible = "samsung,s5pv210-dmc";</div><div class='add'>+        reg = &lt;0xf0000000 0x1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml<br/>index 84ac6f50a6fc..706e45eb4d27 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml</a></div><div class='hunk'>@@ -50,6 +50,10 @@ properties:</div><div class='ctx'>       Reflects the memory layout with four integer values per bank. Format:</div><div class='ctx'>       &lt;bank-number&gt; 0 &lt;address of the bank&gt; &lt;size&gt;</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-4],[a-f0-9]+$":</div><div class='ctx'>     additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml<br/>index 27329c5dc38e..d41308856408 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml</a></div><div class='hunk'>@@ -44,6 +44,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   wakeup-source: true</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'>   pwm:</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml<br/>index f84e09a5743b..b0e438ff4950 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml</a></div><div class='hunk'>@@ -67,6 +67,10 @@ properties:</div><div class='ctx'>   "#size-cells":</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'>   pwm:</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml<br/>index 06f1779835a1..b8e8db0d58e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml</a></div><div class='hunk'>@@ -83,6 +83,7 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - x-powers,axp313a</div><div class='ctx'>               - x-powers,axp15060</div><div class='add'>+              - x-powers,axp717</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -99,6 +100,7 @@ properties:</div><div class='ctx'>           - x-powers,axp221</div><div class='ctx'>           - x-powers,axp223</div><div class='ctx'>           - x-powers,axp313a</div><div class='add'>+          - x-powers,axp717</div><div class='ctx'>           - x-powers,axp803</div><div class='ctx'>           - x-powers,axp806</div><div class='ctx'>           - x-powers,axp809</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml<br/>index 940b12688167..8f62e2c7fa64 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/mmc/arm,pl18x.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/mmc/arm,pl18x.yaml</a></div><div class='hunk'>@@ -79,6 +79,10 @@ properties:</div><div class='ctx'>           - const: rx</div><div class='ctx'>           - const: tx</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'>   power-domains: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/airoha,en8811h.yaml b/Documentation/devicetree/bindings/net/airoha,en8811h.yaml<br/>new file mode 100644<br/>index 000000000000..ecb5149ec6b0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/airoha,en8811h.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/airoha,en8811h.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/airoha,en8811h.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Airoha EN8811H PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Eric Woudstra &lt;ericwouds@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Airoha EN8811H PHY has the ability to reverse polarity</div><div class='add'>+  on the lines to and/or from the MAC. It is reversed by</div><div class='add'>+  the booleans in the devicetree node of the phy.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-phy.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ethernet-phy-id03a2.a411</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  airoha,pnswap-rx:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Reverse rx polarity of the SERDES. This is the receiving</div><div class='add'>+      side of the lines from the MAC towards the EN881H.</div><div class='add'>+</div><div class='add'>+  airoha,pnswap-tx:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Reverse tx polarity of SERDES. This is the transmitting</div><div class='add'>+      side of the lines from EN8811H towards the MAC.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-phy@1 {</div><div class='add'>+            compatible = "ethernet-phy-id03a2.a411";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            airoha,pnswap-rx;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml<br/>new file mode 100644<br/>index 000000000000..67ff7caad599<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/bluetooth/mediatek,mt7921s-bluetooth.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT7921S Bluetooth</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MT7921S is an SDIO-attached dual-radio WiFi+Bluetooth Combo chip; each</div><div class='add'>+  function is its own SDIO function on a shared SDIO interface. The chip</div><div class='add'>+  has two dedicated reset lines, one for each function core.</div><div class='add'>+  This binding only covers the Bluetooth SDIO function, with one device</div><div class='add'>+  node describing only this SDIO function.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: bluetooth-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt7921s-bluetooth</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      An active-low reset line for the Bluetooth core; on typical M.2</div><div class='add'>+      key E modules this is the W_DISABLE2# pin.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        bluetooth@2 {</div><div class='add'>+            compatible = "mediatek,mt7921s-bluetooth";</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pio 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml b/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml<br/>index cc70b00c6ce5..4a1bfc2b3584 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml</a></div><div class='hunk'>@@ -14,20 +14,25 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - brcm,bcm20702a1</div><div class='del'>-      - brcm,bcm4329-bt</div><div class='del'>-      - brcm,bcm4330-bt</div><div class='del'>-      - brcm,bcm4334-bt</div><div class='del'>-      - brcm,bcm43430a0-bt</div><div class='del'>-      - brcm,bcm43430a1-bt</div><div class='del'>-      - brcm,bcm43438-bt</div><div class='del'>-      - brcm,bcm4345c5</div><div class='del'>-      - brcm,bcm43540-bt</div><div class='del'>-      - brcm,bcm4335a0</div><div class='del'>-      - brcm,bcm4349-bt</div><div class='del'>-      - cypress,cyw4373a0-bt</div><div class='del'>-      - infineon,cyw55572-bt</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - infineon,cyw43439-bt</div><div class='add'>+          - const: brcm,bcm4329-bt</div><div class='add'>+      - enum:</div><div class='add'>+          - brcm,bcm20702a1</div><div class='add'>+          - brcm,bcm4329-bt</div><div class='add'>+          - brcm,bcm4330-bt</div><div class='add'>+          - brcm,bcm4334-bt</div><div class='add'>+          - brcm,bcm43430a0-bt</div><div class='add'>+          - brcm,bcm43430a1-bt</div><div class='add'>+          - brcm,bcm43438-bt</div><div class='add'>+          - brcm,bcm4345c5</div><div class='add'>+          - brcm,bcm43540-bt</div><div class='add'>+          - brcm,bcm4335a0</div><div class='add'>+          - brcm,bcm4349-bt</div><div class='add'>+          - cypress,cyw4373a0-bt</div><div class='add'>+          - infineon,cyw55572-bt</div><div class='ctx'> </div><div class='ctx'>   shutdown-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml<br/>index f9ffb963d6b1..c4887522e8fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/can/bosch,m_can.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/can/bosch,m_can.yaml</a></div><div class='hunk'>@@ -118,6 +118,10 @@ properties:</div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml<br/>index e74502a0afe8..3202dc7967c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/mediatek,net.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/mediatek,net.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/mediatek,net.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/mediatek,net.yaml</a></div><div class='hunk'>@@ -337,8 +337,8 @@ allOf:</div><div class='ctx'>           minItems: 4</div><div class='ctx'> </div><div class='ctx'>         clocks:</div><div class='del'>-          minItems: 34</div><div class='del'>-          maxItems: 34</div><div class='add'>+          minItems: 24</div><div class='add'>+          maxItems: 24</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -351,18 +351,6 @@ allOf:</div><div class='ctx'>             - const: ethwarp_wocpu1</div><div class='ctx'>             - const: ethwarp_wocpu0</div><div class='ctx'>             - const: esw</div><div class='del'>-            - const: netsys0</div><div class='del'>-            - const: netsys1</div><div class='del'>-            - const: sgmii_tx250m</div><div class='del'>-            - const: sgmii_rx250m</div><div class='del'>-            - const: sgmii2_tx250m</div><div class='del'>-            - const: sgmii2_rx250m</div><div class='del'>-            - const: top_usxgmii0_sel</div><div class='del'>-            - const: top_usxgmii1_sel</div><div class='del'>-            - const: top_sgm0_sel</div><div class='del'>-            - const: top_sgm1_sel</div><div class='del'>-            - const: top_xfi_phy0_xtal_sel</div><div class='del'>-            - const: top_xfi_phy1_xtal_sel</div><div class='ctx'>             - const: top_eth_gmii_sel</div><div class='ctx'>             - const: top_eth_refck_50m_sel</div><div class='ctx'>             - const: top_eth_sys_200m_sel</div><div class='hunk'>@@ -375,16 +363,10 @@ allOf:</div><div class='ctx'>             - const: top_netsys_sync_250m_sel</div><div class='ctx'>             - const: top_netsys_ppefb_250m_sel</div><div class='ctx'>             - const: top_netsys_warp_sel</div><div class='del'>-            - const: wocpu1</div><div class='del'>-            - const: wocpu0</div><div class='ctx'>             - const: xgp1</div><div class='ctx'>             - const: xgp2</div><div class='ctx'>             - const: xgp3</div><div class='ctx'> </div><div class='del'>-        mediatek,sgmiisys:</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^mac@[0-1]$":</div><div class='ctx'>     type: object</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml<br/>index 4c01cae7c93a..87bc4416eadf 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml</a></div><div class='hunk'>@@ -66,6 +66,10 @@ properties:</div><div class='ctx'>       Should be phandle/offset pair. The phandle to the syscon node which</div><div class='ctx'>       encompases the GPR register, and the offset of the GPR register.</div><div class='ctx'> </div><div class='add'>+  nvmem-cells: true</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names: true</div><div class='add'>+</div><div class='ctx'>   snps,rmii_refclk_ext:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml<br/>new file mode 100644<br/>index 000000000000..828439398fdf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip PD692x0 Power Sourcing Equipment controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kory Maincent &lt;kory.maincent@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pse-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microchip,pd69200</div><div class='add'>+      - microchip,pd69210</div><div class='add'>+      - microchip,pd69220</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  managers:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      List of the PD69208T4/PD69204T4/PD69208M PSE managers. Each manager</div><div class='add'>+      have 4 or 8 physical ports according to the chip version. No need to</div><div class='add'>+      specify the SPI chip select as it is automatically detected by the</div><div class='add'>+      PD692x0 PSE controller. The PSE managers have to be described from</div><div class='add'>+      the lowest chip select to the greatest one, which is the detection</div><div class='add'>+      behavior of the PD692x0 PSE controller. The PD692x0 support up to</div><div class='add'>+      12 PSE managers which can expose up to 96 physical ports. All</div><div class='add'>+      physical ports available on a manager have to be described in the</div><div class='add'>+      incremental order even if they are not used.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^manager@0[0-9a-b]$":</div><div class='add'>+        type: object</div><div class='add'>+        description:</div><div class='add'>+          PD69208T4/PD69204T4/PD69208M PSE manager exposing 4 or 8 physical</div><div class='add'>+          ports.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            description:</div><div class='add'>+              Incremental index of the PSE manager starting from 0, ranging</div><div class='add'>+              from lowest to highest chip select, up to 11.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+          "#address-cells":</div><div class='add'>+            const: 1</div><div class='add'>+</div><div class='add'>+          "#size-cells":</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='add'>+        patternProperties:</div><div class='add'>+          '^port@[0-7]$':</div><div class='add'>+            type: object</div><div class='add'>+            required:</div><div class='add'>+              - reg</div><div class='add'>+            additionalProperties: false</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+          - "#address-cells"</div><div class='add'>+          - "#size-cells"</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - pse-pis</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      ethernet-pse@3c {</div><div class='add'>+        compatible = "microchip,pd69200";</div><div class='add'>+        reg = &lt;0x3c&gt;;</div><div class='add'>+</div><div class='add'>+        managers {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          manager@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            phys0: port@0 {</div><div class='add'>+              reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phys1: port@1 {</div><div class='add'>+              reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phys2: port@2 {</div><div class='add'>+              reg = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phys3: port@3 {</div><div class='add'>+              reg = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          manager@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            phys4: port@0 {</div><div class='add'>+              reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phys5: port@1 {</div><div class='add'>+              reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phys6: port@2 {</div><div class='add'>+              reg = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phys7: port@3 {</div><div class='add'>+              reg = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pse-pis {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          pse_pi0: pse-pi@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #pse-cells = &lt;0&gt;;</div><div class='add'>+            pairset-names = "alternative-a", "alternative-b";</div><div class='add'>+            pairsets = &lt;&amp;phys0&gt;, &lt;&amp;phys1&gt;;</div><div class='add'>+            polarity-supported = "MDI", "S";</div><div class='add'>+            vpwr-supply = &lt;&amp;vpwr1&gt;;</div><div class='add'>+          };</div><div class='add'>+          pse_pi1: pse-pi@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #pse-cells = &lt;0&gt;;</div><div class='add'>+            pairset-names = "alternative-a";</div><div class='add'>+            pairsets = &lt;&amp;phys2&gt;;</div><div class='add'>+            polarity-supported = "MDI";</div><div class='add'>+            vpwr-supply = &lt;&amp;vpwr2&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml b/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml<br/>index 2d382faca0e6..a12cda8aa764 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml</a></div><div class='hunk'>@@ -13,6 +13,7 @@ description: Binding for the Power Sourcing Equipment (PSE) as defined in the</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;</div><div class='add'>+  - Kory Maincent &lt;kory.maincent@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='hunk'>@@ -22,11 +23,105 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Used to uniquely identify a PSE instance within an IC. Will be</div><div class='ctx'>       0 on PSE nodes with only a single output and at least 1 on nodes</div><div class='del'>-      controlling several outputs.</div><div class='add'>+      controlling several outputs which are not described in the pse-pis</div><div class='add'>+      subnode. This property is deprecated, please use pse-pis instead.</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='del'>-required:</div><div class='del'>-  - "#pse-cells"</div><div class='add'>+  pse-pis:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Overview of the PSE PIs provided by the controller.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^pse-pi@[0-9a-f]+$":</div><div class='add'>+        type: object</div><div class='add'>+        description:</div><div class='add'>+          PSE PI for power delivery via pairsets, compliant with IEEE</div><div class='add'>+          802.3-2022, Section 145.2.4. Each pairset comprises a positive and</div><div class='add'>+          a negative VPSE pair, adhering to the pinout configurations</div><div class='add'>+          detailed in the standard.</div><div class='add'>+          See Documentation/networking/pse-pd/pse-pi.rst for details.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            description:</div><div class='add'>+              Address describing the PSE PI index.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+          "#pse-cells":</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='add'>+          pairset-names:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+            description:</div><div class='add'>+              Names of the pairsets as per IEEE 802.3-2022, Section 145.2.4.</div><div class='add'>+              Each name should correspond to a phandle in the 'pairset'</div><div class='add'>+              property pointing to the power supply for that pairset.</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+            items:</div><div class='add'>+              enum:</div><div class='add'>+                - alternative-a</div><div class='add'>+                - alternative-b</div><div class='add'>+</div><div class='add'>+          pairsets:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+            description:</div><div class='add'>+              List of phandles, each pointing to the power supply for the</div><div class='add'>+              corresponding pairset named in 'pairset-names'. This property</div><div class='add'>+              aligns with IEEE 802.3-2022, Section 33.2.3 and 145.2.4.</div><div class='add'>+              PSE Pinout Alternatives (as per IEEE 802.3-2022 Table 145\u20133)</div><div class='add'>+              |-----------|---------------|---------------|---------------|---------------|</div><div class='add'>+              | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |</div><div class='add'>+              |           |    (MDI-X)    |     (MDI)     |      (X)      |      (S)      |</div><div class='add'>+              |-----------|---------------|---------------|---------------|---------------|</div><div class='add'>+              | 1         | Negative VPSE | Positive VPSE | -             | -             |</div><div class='add'>+              | 2         | Negative VPSE | Positive VPSE | -             | -             |</div><div class='add'>+              | 3         | Positive VPSE | Negative VPSE | -             | -             |</div><div class='add'>+              | 4         | -             | -             | Negative VPSE | Positive VPSE |</div><div class='add'>+              | 5         | -             | -             | Negative VPSE | Positive VPSE |</div><div class='add'>+              | 6         | Positive VPSE | Negative VPSE | -             | -             |</div><div class='add'>+              | 7         | -             | -             | Positive VPSE | Negative VPSE |</div><div class='add'>+              | 8         | -             | -             | Positive VPSE | Negative VPSE |</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+</div><div class='add'>+          polarity-supported:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+            description:</div><div class='add'>+              Polarity configuration supported by the PSE PI pairsets.</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 4</div><div class='add'>+            items:</div><div class='add'>+              enum:</div><div class='add'>+                - MDI-X</div><div class='add'>+                - MDI</div><div class='add'>+                - X</div><div class='add'>+                - S</div><div class='add'>+</div><div class='add'>+          vpwr-supply:</div><div class='add'>+            description: Regulator power supply for the PSE PI.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+          - "#pse-cells"</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - "#pse-cells"</div><div class='add'>+  - required:</div><div class='add'>+      - pse-pis</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml b/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml<br/>new file mode 100644<br/>index 000000000000..4147adb11e10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pse-pd/ti,tps23881.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI TPS23881 Power Sourcing Equipment controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kory Maincent &lt;kory.maincent@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pse-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,tps23881</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#pse-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  channels:</div><div class='add'>+    description: each set of 8 ports can be assigned to one physical</div><div class='add'>+      channels or two for PoE4. This parameter describes the configuration</div><div class='add'>+      of the ports conversion matrix that establishes relationship between</div><div class='add'>+      the logical ports and the physical channels.</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^channel@[0-7]$':</div><div class='add'>+        type: object</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      ethernet-pse@20 {</div><div class='add'>+        compatible = "ti,tps23881";</div><div class='add'>+        reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+        channels {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          phys0: channel@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          phys1: channel@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          phys2: channel@2 {</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pse-pis {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          pse_pi0: pse-pi@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #pse-cells = &lt;0&gt;;</div><div class='add'>+            pairset-names = "alternative-a", "alternative-b";</div><div class='add'>+            pairsets = &lt;&amp;phys0&gt;, &lt;&amp;phys1&gt;;</div><div class='add'>+            polarity-supported = "MDI", "S";</div><div class='add'>+            vpwr-supply = &lt;&amp;vpwr1&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          pse_pi1: pse-pi@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #pse-cells = &lt;0&gt;;</div><div class='add'>+            pairset-names = "alternative-a";</div><div class='add'>+            pairsets = &lt;&amp;phys2&gt;;</div><div class='add'>+            polarity-supported = "MDI";</div><div class='add'>+            vpwr-supply = &lt;&amp;vpwr2&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml<br/>index 0029e197a825..a94480e819ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml</a></div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,ipq6018-mdio</div><div class='ctx'>               - qcom,ipq8074-mdio</div><div class='add'>+              - qcom,ipq9574-mdio</div><div class='ctx'>           - const: qcom,ipq4019-mdio</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='hunk'>@@ -76,6 +77,7 @@ allOf:</div><div class='ctx'>               - qcom,ipq5018-mdio</div><div class='ctx'>               - qcom,ipq6018-mdio</div><div class='ctx'>               - qcom,ipq8074-mdio</div><div class='add'>+              - qcom,ipq9574-mdio</div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml<br/>index de7ba7f345a9..21a92f179093 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/renesas,etheravb.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/renesas,etheravb.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/renesas,etheravb.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/renesas,etheravb.yaml</a></div><div class='hunk'>@@ -88,10 +88,16 @@ properties:</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     description: Number of address cells for the MDIO bus.</div><div class='ctx'>     const: 1</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     description: Number of size cells on the MDIO bus.</div><div class='ctx'>     const: 0</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: /schemas/net/mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   renesas,no-ether-link:</div><div class='ctx'>     type: boolean</div><div class='hunk'>@@ -110,9 +116,13 @@ properties:</div><div class='ctx'>   tx-internal-delay-ps:</div><div class='ctx'>     enum: [0, 2000]</div><div class='ctx'> </div><div class='add'>+# In older bindings there where no mdio child-node to describe the MDIO bus</div><div class='add'>+# and the PHY. To not fail older bindings accept any node with an address. New</div><div class='add'>+# users should describe the PHY inside the mdio child-node.</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "@[0-9a-f]$":</div><div class='ctx'>     type: object</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -123,8 +133,6 @@ required:</div><div class='ctx'>   - resets</div><div class='ctx'>   - phy-mode</div><div class='ctx'>   - phy-handle</div><div class='del'>-  - '#address-cells'</div><div class='del'>-  - '#size-cells'</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: ethernet-controller.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,ethertsn.yaml b/Documentation/devicetree/bindings/net/renesas,ethertsn.yaml<br/>index ea35d19be829..b4680a1d0a06 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/renesas,ethertsn.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/renesas,ethertsn.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/renesas,ethertsn.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/renesas,ethertsn.yaml</a></div><div class='hunk'>@@ -71,16 +71,8 @@ properties:</div><div class='ctx'>     enum: [0, 2000]</div><div class='ctx'>     default: 0</div><div class='ctx'> </div><div class='del'>-  '#address-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#size-cells':</div><div class='del'>-    const: 0</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^ethernet-phy@[0-9a-f]$":</div><div class='del'>-    type: object</div><div class='del'>-    $ref: ethernet-phy.yaml#</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: /schemas/net/mdio.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -94,8 +86,7 @@ required:</div><div class='ctx'>   - resets</div><div class='ctx'>   - phy-mode</div><div class='ctx'>   - phy-handle</div><div class='del'>-  - '#address-cells'</div><div class='del'>-  - '#size-cells'</div><div class='add'>+  - mdio</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -122,14 +113,18 @@ examples:</div><div class='ctx'>         tx-internal-delay-ps = &lt;2000&gt;;</div><div class='ctx'>         phy-handle = &lt;&amp;phy3&gt;;</div><div class='ctx'> </div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        phy3: ethernet-phy@3 {</div><div class='del'>-            compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-            reg = &lt;0&gt;;</div><div class='del'>-            interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-            interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;gpio1 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+            phy3: ethernet-phy@0 {</div><div class='add'>+                compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+                interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml<br/>new file mode 100644<br/>index 000000000000..d9a8d586e260<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas GMAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Romain Gantois &lt;romain.gantois@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - renesas,r9a06g032-gmac</div><div class='add'>+          - renesas,rzn1-gmac</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwmac.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a06g032-gmac</div><div class='add'>+      - const: renesas,rzn1-gmac</div><div class='add'>+      - const: snps,dwmac</div><div class='add'>+</div><div class='add'>+  pcs-handle:</div><div class='add'>+    description:</div><div class='add'>+      phandle pointing to a PCS sub-node compatible with</div><div class='add'>+      renesas,rzn1-miic.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a06g032-sysctrl.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@44000000 {</div><div class='add'>+      compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";</div><div class='add'>+      reg = &lt;0x44000000 0x2000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";</div><div class='add'>+      clock-names = "stmmaceth";</div><div class='add'>+      clocks = &lt;&amp;sysctrl R9A06G032_HCLK_GMAC0&gt;;</div><div class='add'>+      power-domains = &lt;&amp;sysctrl&gt;;</div><div class='add'>+      snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+      snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+      tx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+      rx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+      pcs-handle = &lt;&amp;mii_conv1&gt;;</div><div class='add'>+      phy-mode = "mii";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml<br/>index 70bbc4220e2a..6bbe96e35250 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/rockchip-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/rockchip-dwmac.yaml</a></div><div class='hunk'>@@ -137,8 +137,6 @@ examples:</div><div class='ctx'>         assigned-clock-parents = &lt;&amp;ext_gmac&gt;;</div><div class='ctx'> </div><div class='ctx'>         rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-        phy-mode = "rgmii";</div><div class='add'>+        phy-mode = "rgmii-id";</div><div class='ctx'>         clock_in_out = "input";</div><div class='del'>-        tx_delay = &lt;0x30&gt;;</div><div class='del'>-        rx_delay = &lt;0x10&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml<br/>index 6b0341a8e0ea..21cc27e75f50 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/snps,dwmac.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/snps,dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a></div><div class='hunk'>@@ -242,7 +242,8 @@ properties:</div><div class='ctx'>             type: boolean</div><div class='ctx'>             description: Multicast &amp; Broadcast Packets</div><div class='ctx'>           snps,priority:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+            maxItems: 1</div><div class='ctx'>             description: Bitmask of the tagged frames priorities assigned to the queue</div><div class='ctx'>         allOf:</div><div class='ctx'>           - if:</div><div class='hunk'>@@ -327,9 +328,6 @@ properties:</div><div class='ctx'>       snps,tx-sched-dwrr:</div><div class='ctx'>         type: boolean</div><div class='ctx'>         description: Deficit Weighted Round Robin</div><div class='del'>-      snps,tx-sched-sp:</div><div class='del'>-        type: boolean</div><div class='del'>-        description: Strict priority</div><div class='ctx'>     allOf:</div><div class='ctx'>       - if:</div><div class='ctx'>           required:</div><div class='hunk'>@@ -338,7 +336,6 @@ properties:</div><div class='ctx'>           properties:</div><div class='ctx'>             snps,tx-sched-wfq: false</div><div class='ctx'>             snps,tx-sched-dwrr: false</div><div class='del'>-            snps,tx-sched-sp: false</div><div class='ctx'>       - if:</div><div class='ctx'>           required:</div><div class='ctx'>             - snps,tx-sched-wfq</div><div class='hunk'>@@ -346,7 +343,6 @@ properties:</div><div class='ctx'>           properties:</div><div class='ctx'>             snps,tx-sched-wrr: false</div><div class='ctx'>             snps,tx-sched-dwrr: false</div><div class='del'>-            snps,tx-sched-sp: false</div><div class='ctx'>       - if:</div><div class='ctx'>           required:</div><div class='ctx'>             - snps,tx-sched-dwrr</div><div class='hunk'>@@ -354,15 +350,6 @@ properties:</div><div class='ctx'>           properties:</div><div class='ctx'>             snps,tx-sched-wrr: false</div><div class='ctx'>             snps,tx-sched-wfq: false</div><div class='del'>-            snps,tx-sched-sp: false</div><div class='del'>-      - if:</div><div class='del'>-          required:</div><div class='del'>-            - snps,tx-sched-sp</div><div class='del'>-        then:</div><div class='del'>-          properties:</div><div class='del'>-            snps,tx-sched-wrr: false</div><div class='del'>-            snps,tx-sched-wfq: false</div><div class='del'>-            snps,tx-sched-dwrr: false</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^queue[0-9]$":</div><div class='ctx'>         description: Each subnode represents a queue.</div><div class='hunk'>@@ -393,7 +380,8 @@ properties:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             description: max read outstanding req. limit</div><div class='ctx'>           snps,priority:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+            maxItems: 1</div><div class='ctx'>             description:</div><div class='ctx'>               Bitmask of the tagged frames priorities assigned to the queue.</div><div class='ctx'>               When a PFC frame is received with priorities matching the bitmask,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml<br/>index 0d1962980f57..313a15331661 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml</a></div><div class='hunk'>@@ -30,6 +30,10 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: starfive,jh7110-dwmac</div><div class='ctx'>           - const: snps,dwmac-5.20</div><div class='add'>+      - items:</div><div class='add'>+          - const: starfive,jh8100-dwmac</div><div class='add'>+          - const: starfive,jh7110-dwmac</div><div class='add'>+          - const: snps,dwmac-5.20</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -116,11 +120,25 @@ allOf:</div><div class='ctx'>           minItems: 3</div><div class='ctx'>           maxItems: 3</div><div class='ctx'> </div><div class='del'>-        resets:</div><div class='del'>-          minItems: 2</div><div class='del'>-</div><div class='del'>-        reset-names:</div><div class='del'>-          minItems: 2</div><div class='add'>+      if:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: starfive,jh8100-dwmac</div><div class='add'>+      then:</div><div class='add'>+        properties:</div><div class='add'>+          resets:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+          reset-names:</div><div class='add'>+            const: stmmaceth</div><div class='add'>+      else:</div><div class='add'>+        properties:</div><div class='add'>+          resets:</div><div class='add'>+            minItems: 2</div><div class='add'>+</div><div class='add'>+          reset-names:</div><div class='add'>+            minItems: 2</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml<br/>index fc8c96b08d7d..7ccf75676b6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/stm32-dwmac.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/stm32-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/stm32-dwmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/stm32-dwmac.yaml</a></div><div class='hunk'>@@ -82,6 +82,13 @@ properties:</div><div class='ctx'>       Should be phandle/offset pair. The phandle to the syscon node which</div><div class='ctx'>       encompases the glue register, and the offset of the control register</div><div class='ctx'> </div><div class='add'>+  st,ext-phyclk:</div><div class='add'>+    description:</div><div class='add'>+      set this property in RMII mode when you have PHY without crystal 50MHz and want to</div><div class='add'>+      select RCC clock instead of ETH_REF_CLK. OR in RGMII mode when you want to select</div><div class='add'>+      RCC clock instead of ETH_CLK125.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   st,eth-clk-sel:</div><div class='ctx'>     description:</div><div class='ctx'>       set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.</div><div class='hunk'>@@ -93,6 +100,10 @@ properties:</div><div class='ctx'>       select RCC clock instead of ETH_REF_CLK.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml<br/>index 229c8f32019f..e253fa786092 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml</a></div><div class='hunk'>@@ -13,14 +13,12 @@ description:</div><div class='ctx'>   Ethernet based on the Programmable Real-Time Unit and Industrial</div><div class='ctx'>   Communication Subsystem.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - ti,am642-icssg-prueth  # for AM64x SoC family</div><div class='del'>-      - ti,am654-icssg-prueth  # for AM65x SoC family</div><div class='add'>+      - ti,am642-icssg-prueth      # for AM64x SoC family</div><div class='add'>+      - ti,am654-icssg-prueth      # for AM65x SoC family</div><div class='add'>+      - ti,am654-sr1-icssg-prueth  # for AM65x SoC family, SR1.0</div><div class='ctx'> </div><div class='ctx'>   sram:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='hunk'>@@ -28,9 +26,11 @@ properties:</div><div class='ctx'>       phandle to MSMC SRAM node</div><div class='ctx'> </div><div class='ctx'>   dmas:</div><div class='del'>-    maxItems: 10</div><div class='add'>+    minItems: 10</div><div class='add'>+    maxItems: 12</div><div class='ctx'> </div><div class='ctx'>   dma-names:</div><div class='add'>+    minItems: 10</div><div class='ctx'>     items:</div><div class='ctx'>       - const: tx0-0</div><div class='ctx'>       - const: tx0-1</div><div class='hunk'>@@ -42,6 +42,8 @@ properties:</div><div class='ctx'>       - const: tx1-3</div><div class='ctx'>       - const: rx0</div><div class='ctx'>       - const: rx1</div><div class='add'>+      - const: rxmgm0</div><div class='add'>+      - const: rxmgm1</div><div class='ctx'> </div><div class='ctx'>   ti,mii-g-rt:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='hunk'>@@ -132,6 +134,27 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-names</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,am654-sr1-icssg-prueth</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        dmas:</div><div class='add'>+          minItems: 12</div><div class='add'>+        dma-names:</div><div class='add'>+          minItems: 12</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        dmas:</div><div class='add'>+          maxItems: 10</div><div class='add'>+        dma-names:</div><div class='add'>+          maxItems: 10</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml<br/>index 4aa521f1be8c..e564f20d8f41 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a></div><div class='hunk'>@@ -44,6 +44,7 @@ properties:</div><div class='ctx'>               - brcm,bcm4366-fmac</div><div class='ctx'>               - cypress,cyw4373-fmac</div><div class='ctx'>               - cypress,cyw43012-fmac</div><div class='add'>+              - infineon,cyw43439-fmac</div><div class='ctx'>           - const: brcm,bcm4329-fmac</div><div class='ctx'>       - enum:</div><div class='ctx'>           - brcm,bcm4329-fmac</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml<br/>index 9b3ef4bc3732..5c4498b762c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml</a></div><div class='hunk'>@@ -73,6 +73,12 @@ properties:</div><div class='ctx'>       - sky85703-11</div><div class='ctx'>       - sky85803</div><div class='ctx'> </div><div class='add'>+  firmware-name:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      If present, a board or platform specific string used to lookup firmware</div><div class='add'>+      files for the device.</div><div class='add'>+</div><div class='ctx'>   wifi-firmware:</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml<br/>index 672282cdfc2f..a2d55bf4c7a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml</a></div><div class='hunk'>@@ -59,6 +59,8 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='add'>+  ieee80211-freq-limit: true</div><div class='add'>+</div><div class='ctx'>   wifi-firmware:</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -88,6 +90,7 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: ieee80211.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml<br/>index 51f62c3ae194..ec5e424bb3c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml</a></div><div class='hunk'>@@ -13,25 +13,25 @@ maintainers:</div><div class='ctx'> description: |</div><div class='ctx'>   For some SoCs, the CPU frequency subset and voltage value of each</div><div class='ctx'>   OPP varies based on the silicon variant in use. Allwinner Process</div><div class='del'>-  Voltage Scaling Tables defines the voltage and frequency value based</div><div class='del'>-  on the speedbin blown in the efuse combination. The</div><div class='del'>-  sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to</div><div class='del'>-  provide the OPP framework with required information.</div><div class='add'>+  Voltage Scaling Tables define the voltage and frequency values based</div><div class='add'>+  on the speedbin blown in the efuse combination.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: opp-v2-base.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: allwinner,sun50i-h6-operating-points</div><div class='add'>+    enum:</div><div class='add'>+      - allwinner,sun50i-h6-operating-points</div><div class='add'>+      - allwinner,sun50i-h616-operating-points</div><div class='ctx'> </div><div class='ctx'>   nvmem-cells:</div><div class='ctx'>     description: |</div><div class='ctx'>       A phandle pointing to a nvmem-cells node representing the efuse</div><div class='del'>-      registers that has information about the speedbin that is used</div><div class='add'>+      register that has information about the speedbin that is used</div><div class='ctx'>       to select the right frequency/voltage value pair. Please refer</div><div class='del'>-      the for nvmem-cells bindings</div><div class='del'>-      Documentation/devicetree/bindings/nvmem/nvmem.txt and also</div><div class='add'>+      to the nvmem-cells bindings in</div><div class='add'>+      Documentation/devicetree/bindings/nvmem/nvmem.yaml and also the</div><div class='ctx'>       examples below.</div><div class='ctx'> </div><div class='ctx'>   opp-shared: true</div><div class='hunk'>@@ -47,15 +47,18 @@ patternProperties:</div><div class='ctx'>     properties:</div><div class='ctx'>       opp-hz: true</div><div class='ctx'>       clock-latency-ns: true</div><div class='add'>+      opp-microvolt: true</div><div class='add'>+      opp-supported-hw:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description:</div><div class='add'>+          A single 32 bit bitmap value, representing compatible HW, one</div><div class='add'>+          bit per speed bin index.</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^opp-microvolt-speed[0-9]$": true</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - opp-hz</div><div class='del'>-      - opp-microvolt-speed0</div><div class='del'>-      - opp-microvolt-speed1</div><div class='del'>-      - opp-microvolt-speed2</div><div class='ctx'> </div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -77,58 +80,54 @@ examples:</div><div class='ctx'>             opp-microvolt-speed2 = &lt;800000&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        opp-720000000 {</div><div class='add'>+        opp-1080000000 {</div><div class='ctx'>             clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-            opp-hz = /bits/ 64 &lt;720000000&gt;;</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1080000000&gt;;</div><div class='ctx'> </div><div class='del'>-            opp-microvolt-speed0 = &lt;880000&gt;;</div><div class='del'>-            opp-microvolt-speed1 = &lt;820000&gt;;</div><div class='del'>-            opp-microvolt-speed2 = &lt;800000&gt;;</div><div class='add'>+            opp-microvolt-speed0 = &lt;1060000&gt;;</div><div class='add'>+            opp-microvolt-speed1 = &lt;880000&gt;;</div><div class='add'>+            opp-microvolt-speed2 = &lt;840000&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        opp-816000000 {</div><div class='add'>+        opp-1488000000 {</div><div class='ctx'>             clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-            opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1488000000&gt;;</div><div class='ctx'> </div><div class='del'>-            opp-microvolt-speed0 = &lt;880000&gt;;</div><div class='del'>-            opp-microvolt-speed1 = &lt;820000&gt;;</div><div class='del'>-            opp-microvolt-speed2 = &lt;800000&gt;;</div><div class='add'>+            opp-microvolt-speed0 = &lt;1160000&gt;;</div><div class='add'>+            opp-microvolt-speed1 = &lt;1000000&gt;;</div><div class='add'>+            opp-microvolt-speed2 = &lt;960000&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='del'>-        opp-888000000 {</div><div class='del'>-            clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-            opp-hz = /bits/ 64 &lt;888000000&gt;;</div><div class='del'>-</div><div class='del'>-            opp-microvolt-speed0 = &lt;940000&gt;;</div><div class='del'>-            opp-microvolt-speed1 = &lt;820000&gt;;</div><div class='del'>-            opp-microvolt-speed2 = &lt;800000&gt;;</div><div class='del'>-        };</div><div class='add'>+  - |</div><div class='add'>+    opp-table {</div><div class='add'>+        compatible = "allwinner,sun50i-h616-operating-points";</div><div class='add'>+        nvmem-cells = &lt;&amp;speedbin_efuse&gt;;</div><div class='add'>+        opp-shared;</div><div class='ctx'> </div><div class='del'>-        opp-1080000000 {</div><div class='add'>+        opp-480000000 {</div><div class='ctx'>             clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-            opp-hz = /bits/ 64 &lt;1080000000&gt;;</div><div class='add'>+            opp-hz = /bits/ 64 &lt;480000000&gt;;</div><div class='ctx'> </div><div class='del'>-            opp-microvolt-speed0 = &lt;1060000&gt;;</div><div class='del'>-            opp-microvolt-speed1 = &lt;880000&gt;;</div><div class='del'>-            opp-microvolt-speed2 = &lt;840000&gt;;</div><div class='add'>+            opp-microvolt = &lt;900000&gt;;</div><div class='add'>+            opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        opp-1320000000 {</div><div class='add'>+        opp-792000000 {</div><div class='ctx'>             clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-            opp-hz = /bits/ 64 &lt;1320000000&gt;;</div><div class='add'>+            opp-hz = /bits/ 64 &lt;792000000&gt;;</div><div class='ctx'> </div><div class='del'>-            opp-microvolt-speed0 = &lt;1160000&gt;;</div><div class='del'>-            opp-microvolt-speed1 = &lt;940000&gt;;</div><div class='del'>-            opp-microvolt-speed2 = &lt;900000&gt;;</div><div class='add'>+            opp-microvolt-speed1 = &lt;900000&gt;;</div><div class='add'>+            opp-microvolt-speed4 = &lt;940000&gt;;</div><div class='add'>+            opp-supported-hw = &lt;0x12&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        opp-1488000000 {</div><div class='add'>+        opp-1512000000 {</div><div class='ctx'>             clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='del'>-            opp-hz = /bits/ 64 &lt;1488000000&gt;;</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='ctx'> </div><div class='del'>-            opp-microvolt-speed0 = &lt;1160000&gt;;</div><div class='del'>-            opp-microvolt-speed1 = &lt;1000000&gt;;</div><div class='del'>-            opp-microvolt-speed2 = &lt;960000&gt;;</div><div class='add'>+            opp-microvolt = &lt;1100000&gt;;</div><div class='add'>+            opp-supported-hw = &lt;0x0a&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml<br/>index 24a3dbde223b..ceea122ae1a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml</a></div><div class='hunk'>@@ -55,6 +55,10 @@ properties:</div><div class='ctx'>     description: number of clock cells for ck_usbo_48m consumer</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> # Required child nodes:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br/>index d476de82e5c3..4d5a957fa232 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml</a></div><div class='hunk'>@@ -120,7 +120,9 @@ additionalProperties:</div><div class='ctx'>         slew-rate: true</div><div class='ctx'>         gpio-hog: true</div><div class='ctx'>         gpios: true</div><div class='add'>+        input: true</div><div class='ctx'>         input-enable: true</div><div class='add'>+        output-enable: true</div><div class='ctx'>         output-high: true</div><div class='ctx'>         output-low: true</div><div class='ctx'>         line-name: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml b/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml<br/>index d84268b59784..96cd6f3c3546 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml</a></div><div class='hunk'>@@ -25,6 +25,9 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: microchip,sama7g5-pwm</div><div class='ctx'>           - const: atmel,sama5d2-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,sam9x7-pwm</div><div class='add'>+          - const: microchip,sam9x60-pwm</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml<br/>index 3afe1480df52..f7bc84b05a87 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml</a></div><div class='hunk'>@@ -35,7 +35,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - '#pwm-cells'</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml b/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml<br/>index ba6325575ea0..9ee1946dc2e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml</a></div><div class='hunk'>@@ -34,7 +34,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - "#pwm-cells"</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml b/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml<br/>index a5c308801619..d515c09e1021 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml</a></div><div class='hunk'>@@ -66,7 +66,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - "#pwm-cells"</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml<br/>index bc813fe74fab..195e4371196b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a></div><div class='hunk'>@@ -31,6 +31,7 @@ properties:</div><div class='ctx'>               - mediatek,mt8188-disp-pwm</div><div class='ctx'>               - mediatek,mt8192-disp-pwm</div><div class='ctx'>               - mediatek,mt8195-disp-pwm</div><div class='add'>+              - mediatek,mt8365-disp-pwm</div><div class='ctx'>           - const: mediatek,mt8183-disp-pwm</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -58,7 +59,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - "#pwm-cells"</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml b/Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml<br/>index 15e7fd98defc..9dc25f38fb94 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/pwm-bcm2835.yaml</a></div><div class='hunk'>@@ -29,7 +29,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='del'>-  - "#pwm-cells"</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml<br/>index 4d0b5964443d..7523a89a1773 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml</a></div><div class='hunk'>@@ -51,7 +51,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - "#pwm-cells"</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml<br/>new file mode 100644<br/>index 000000000000..ec6695c8d2e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-system-ldos.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner D1 System LDOs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Samuel Holland &lt;samuel@sholland.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Allwinner D1 contains a pair of general-purpose LDOs which are designed to</div><div class='add'>+  supply power inside and outside the SoC. They are controlled by a register</div><div class='add'>+  within the system control MMIO space.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - allwinner,sun20i-d1-system-ldos</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^ldo[ab]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml<br/>index 9ff9abf2691a..51e2f6fb7a5a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</a></div><div class='hunk'>@@ -41,6 +41,13 @@ allOf:</div><div class='ctx'>         - gpios</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    anyOf:</div><div class='add'>+      - description: Preferred name is 'regulator-[0-9]v[0-9]'</div><div class='add'>+        pattern: '^regulator(-[0-9]+v[0-9]+|-[0-9a-z-]+)?$'</div><div class='add'>+      - description: Any name allowed</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - regulator-fixed</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml<br/>index 3d469b8e9774..849bfa50bdba 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml</a></div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'>       - nxp,pca9450a</div><div class='ctx'>       - nxp,pca9450b</div><div class='ctx'>       - nxp,pca9450c</div><div class='add'>+      - nxp,pca9451a</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml<br/>index 33ae1f786802..fcefc722ee2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,pm4125-vbus-reg</div><div class='ctx'>               - qcom,pm6150-vbus-reg</div><div class='add'>+              - qcom,pm7250b-vbus-reg</div><div class='ctx'>               - qcom,pmi632-vbus-reg</div><div class='ctx'>           - const: qcom,pm8150b-vbus-reg</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml<br/>index 05f4ad2c7d3a..6ceaffb45dc9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml</a></div><div class='hunk'>@@ -30,6 +30,10 @@ properties:</div><div class='ctx'>   vdda-supply:</div><div class='ctx'>     description: phandle to the vdda input analog voltage.</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml b/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml<br/>index 717f6b321f88..340d01d481d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/rng/st,stm32-rng.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/rng/st,stm32-rng.yaml</a></div><div class='hunk'>@@ -37,6 +37,10 @@ properties:</div><div class='ctx'>     description: If set, the RNG configuration in RNG_CR, RNG_HTCR and</div><div class='ctx'>                   RNG_NSCR will be locked.</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml<br/>index 62f97da1b2fd..2ed526139269 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/serial/st,stm32-uart.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/serial/st,stm32-uart.yaml</a></div><div class='hunk'>@@ -73,6 +73,10 @@ properties:</div><div class='ctx'>     enum: [1, 2, 4, 8, 12, 14, 16]</div><div class='ctx'>     default: 8</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: rs485.yaml#</div><div class='ctx'>   - $ref: serial.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml<br/>index 4310bae6c58e..4512390f90f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml</a></div><div class='hunk'>@@ -58,20 +58,6 @@ patternProperties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - if:</div><div class='del'>-      not:</div><div class='del'>-        properties:</div><div class='del'>-          compatible:</div><div class='del'>-            contains:</div><div class='del'>-              enum:</div><div class='del'>-                - qcom,sm8450-pmic-glink</div><div class='del'>-                - qcom,sm8550-pmic-glink</div><div class='del'>-                - qcom,x1e80100-pmic-glink</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        orientation-gpios: false</div><div class='del'>-</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml<br/>index 74bb92e31554..fd6db0ca98eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a></div><div class='hunk'>@@ -116,8 +116,8 @@ examples:</div><div class='ctx'> </div><div class='ctx'>             bluetooth {</div><div class='ctx'>                 compatible = "qcom,wcnss-bt";</div><div class='del'>-                /* BD address 00:11:22:33:44:55 */</div><div class='del'>-                local-bd-address = [ 55 44 33 22 11 00 ];</div><div class='add'>+                /* Updated by boot firmware (little-endian order) */</div><div class='add'>+                local-bd-address = [ 00 00 00 00 00 00 ];</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             wifi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml<br/>new file mode 100644<br/>index 000000000000..ebbf0c9109ce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/V2H(P) System Controller (SYS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RZ/V2H(P) SYS (System Controller) controls the overall</div><div class='add'>+  configuration of the LSI and supports the following functions,</div><div class='add'>+  - Trust zone control</div><div class='add'>+  - Extend access by specific masters to address beyond 4GB space</div><div class='add'>+  - GBETH configuration</div><div class='add'>+  - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU</div><div class='add'>+  - LSI version</div><div class='add'>+  - WDT stop control</div><div class='add'>+  - General registers</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r9a09g057-sys</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sys: system-controller@10430000 {</div><div class='add'>+        compatible = "renesas,r9a09g057-sys";</div><div class='add'>+        reg = &lt;0x10430000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg 1&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml<br/>index c1ce4da2dc32..09d3ce97efa2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/renesas/renesas.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/soc/renesas/renesas.yaml</a></div><div class='hunk'>@@ -513,6 +513,14 @@ properties:</div><div class='ctx'>               - renesas,rzv2mevk2   # RZ/V2M Eval Board v2.0</div><div class='ctx'>           - const: renesas,r9a09g011</div><div class='ctx'> </div><div class='add'>+      - description: RZ/V2H(P) (R9A09G057)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a09g057h41 # RZ/V2H</div><div class='add'>+              - renesas,r9a09g057h42 # RZ/V2H with Mali-G31 support</div><div class='add'>+              - renesas,r9a09g057h44 # RZ/V2HP with Mali-G31 + Mali-C55 support</div><div class='add'>+          - const: renesas,r9a09g057</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml<br/>index 0b87c266760c..79798c747476 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/rockchip/grf.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/rockchip/grf.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/rockchip/grf.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/soc/rockchip/grf.yaml</a></div><div class='hunk'>@@ -171,6 +171,7 @@ allOf:</div><div class='ctx'>           unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         pcie-phy:</div><div class='add'>+          type: object</div><div class='ctx'>           description:</div><div class='ctx'>             Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml<br/>index c0c6ce8fc786..3ca220582897 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - google,gs101-apm-sysreg</div><div class='add'>+              - google,gs101-hsi2-sysreg</div><div class='ctx'>               - google,gs101-peric0-sysreg</div><div class='ctx'>               - google,gs101-peric1-sysreg</div><div class='ctx'>               - samsung,exynos3-sysreg</div><div class='hunk'>@@ -72,6 +73,7 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - google,gs101-hsi2-sysreg</div><div class='ctx'>               - google,gs101-peric0-sysreg</div><div class='ctx'>               - google,gs101-peric1-sysreg</div><div class='ctx'>               - samsung,exynos850-cmgp-sysreg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt b/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt<br/>deleted file mode 100644<br/>index 3ffc2562fb31..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/davinci-mcbsp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-Texas Instruments DaVinci McBSP module</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-This binding describes the "Multi-channel Buffered Serial Port" (McBSP)</div><div class='del'>-audio interface found in some TI DaVinci processors like the OMAP-L138 or AM180x.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~</div><div class='del'>-- compatible :</div><div class='del'>-        "ti,da850-mcbsp" : for DA850, AM180x and OPAM-L138 platforms</div><div class='del'>-</div><div class='del'>-- reg : physical base address and length of the controller memory mapped</div><div class='del'>-        region(s).</div><div class='del'>-- reg-names : Should contain:</div><div class='del'>-        * "mpu" for the main registers (required).</div><div class='del'>-        * "dat" for the data FIFO (optional).</div><div class='del'>-</div><div class='del'>-- dmas: three element list of DMA controller phandles, DMA request line and</div><div class='del'>-	TC channel ordered triplets.</div><div class='del'>-- dma-names: identifier string for each DMA request line in the dmas property.</div><div class='del'>-	These strings correspond 1:1 with the ordered pairs in dmas. The dma</div><div class='del'>-	identifiers must be "rx" and "tx".</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~</div><div class='del'>-- interrupts : Interrupt numbers for McBSP</div><div class='del'>-- interrupt-names : Known interrupt names are "rx" and "tx"</div><div class='del'>-</div><div class='del'>-- pinctrl-0: Should specify pin control group used for this controller.</div><div class='del'>-- pinctrl-names: Should contain only one value - "default", for more details</div><div class='del'>-        please refer to pinctrl-bindings.txt</div><div class='del'>-</div><div class='del'>-Example (AM1808):</div><div class='del'>-~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-mcbsp0: mcbsp@1d10000 {</div><div class='del'>-	compatible = "ti,da850-mcbsp";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcbsp0_pins&gt;;</div><div class='del'>-</div><div class='del'>-	reg = 	&lt;0x00110000 0x1000&gt;,</div><div class='del'>-		&lt;0x00310000 0x1000&gt;;</div><div class='del'>-	reg-names = "mpu", "dat";</div><div class='del'>-	interrupts = &lt;97 98&gt;;</div><div class='del'>-	interrupt-names = "rx", "tx";</div><div class='del'>-	dmas = &lt;&amp;edma0 3 1</div><div class='del'>-		&amp;edma0 2 1&gt;;</div><div class='del'>-	dma-names = "tx", "rx";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml b/Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml<br/>new file mode 100644<br/>index 000000000000..4fa677023827<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/davinci-mcbsp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: McBSP Controller for TI SoCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bastien Curutchet &lt;bastien.curutchet@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,da850-mcbsp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: CFG registers</div><div class='add'>+      - description: data registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: mpu</div><div class='add'>+      - const: dat</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: transmission DMA channel</div><div class='add'>+      - description: reception DMA channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: RX interrupt</div><div class='add'>+      - description: TX interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: functional clock</div><div class='add'>+      - description: external input clock for sample rate generator.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: fck</div><div class='add'>+      - const: clks</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  ti,T1-framing-tx:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      If the property is present, tx data delay is set to 2 bit clock periods.</div><div class='add'>+      McBSP will insert a blank period (high-impedance period) before the first</div><div class='add'>+      data bit. This can be used to interface to T1-framing devices.</div><div class='add'>+</div><div class='add'>+  ti,T1-framing-rx:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      If the property is present, rx data delay is set to 2 bit clock periods.</div><div class='add'>+      McBSP will discard the bit preceding the data stream (called framing bit).</div><div class='add'>+      This can be used to interface to T1-framing devices.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mcbsp0@1d10000 {</div><div class='add'>+      #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+      compatible = "ti,da850-mcbsp";</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;mcbsp0_pins&gt;;</div><div class='add'>+</div><div class='add'>+      reg = &lt;0x111000 0x1000&gt;,</div><div class='add'>+            &lt;0x311000 0x1000&gt;;</div><div class='add'>+      reg-names = "mpu", "dat";</div><div class='add'>+      interrupts = &lt;97&gt;, &lt;98&gt;;</div><div class='add'>+      interrupt-names = "rx", "tx";</div><div class='add'>+      dmas = &lt;&amp;edma0 3 1&gt;,</div><div class='add'>+             &lt;&amp;edma0 2 1&gt;;</div><div class='add'>+      dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;psc1 14&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,audmix.txt b/Documentation/devicetree/bindings/sound/fsl,audmix.txt<br/>deleted file mode 100644<br/>index 840b7e0d6a63..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,audmix.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,audmix.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-NXP Audio Mixer (AUDMIX).</div><div class='del'>-</div><div class='del'>-The Audio Mixer is a on-chip functional module that allows mixing of two</div><div class='del'>-audio streams into a single audio stream. Audio Mixer has two input serial</div><div class='del'>-audio interfaces. These are driven by two Synchronous Audio interface</div><div class='del'>-modules (SAI). Each input serial interface carries 8 audio channels in its</div><div class='del'>-frame in TDM manner. Mixer mixes audio samples of corresponding channels</div><div class='del'>-from two interfaces into a single sample. Before mixing, audio samples of</div><div class='del'>-two inputs can be attenuated based on configuration. The output of the</div><div class='del'>-Audio Mixer is also a serial audio interface. Like input interfaces it has</div><div class='del'>-the same TDM frame format. This output is used to drive the serial DAC TDM</div><div class='del'>-interface of audio codec and also sent to the external pins along with the</div><div class='del'>-receive path of normal audio SAI module for readback by the CPU.</div><div class='del'>-</div><div class='del'>-The output of Audio Mixer can be selected from any of the three streams</div><div class='del'>- - serial audio input 1</div><div class='del'>- - serial audio input 2</div><div class='del'>- - mixed audio</div><div class='del'>-</div><div class='del'>-Mixing operation is independent of audio sample rate but the two audio</div><div class='del'>-input streams must have same audio sample rate with same number of channels</div><div class='del'>-in TDM frame to be eligible for mixing.</div><div class='del'>-</div><div class='del'>-Device driver required properties:</div><div class='del'>-=================================</div><div class='del'>-  - compatible		: Compatible list, contains "fsl,imx8qm-audmix"</div><div class='del'>-</div><div class='del'>-  - reg			: Offset and length of the register set for the device.</div><div class='del'>-</div><div class='del'>-  - clocks		: Must contain an entry for each entry in clock-names.</div><div class='del'>-</div><div class='del'>-  - clock-names		: Must include the "ipg" for register access.</div><div class='del'>-</div><div class='del'>-  - power-domains	: Must contain the phandle to AUDMIX power domain node</div><div class='del'>-</div><div class='del'>-  - dais		: Must contain a list of phandles to AUDMIX connected</div><div class='del'>-			  DAIs. The current implementation requires two phandles</div><div class='del'>-			  to SAI interfaces to be provided, the first SAI in the</div><div class='del'>-			  list being used to route the AUDMIX output.</div><div class='del'>-</div><div class='del'>-Device driver configuration example:</div><div class='del'>-======================================</div><div class='del'>-  audmix: audmix@59840000 {</div><div class='del'>-    compatible = "fsl,imx8qm-audmix";</div><div class='del'>-    reg = &lt;0x0 0x59840000 0x0 0x10000&gt;;</div><div class='del'>-    clocks = &lt;&amp;clk IMX8QXP_AUD_AUDMIX_IPG&gt;;</div><div class='del'>-    clock-names = "ipg";</div><div class='del'>-    power-domains = &lt;&amp;pd_audmix&gt;;</div><div class='del'>-    dais = &lt;&amp;sai4&gt;, &lt;&amp;sai5&gt;;</div><div class='del'>-  };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,audmix.yaml b/Documentation/devicetree/bindings/sound/fsl,audmix.yaml<br/>new file mode 100644<br/>index 000000000000..9413b901cf77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,audmix.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,audmix.yaml</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,audmix.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP Audio Mixer (AUDMIX).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Audio Mixer is a on-chip functional module that allows mixing of two</div><div class='add'>+  audio streams into a single audio stream. Audio Mixer has two input serial</div><div class='add'>+  audio interfaces. These are driven by two Synchronous Audio interface</div><div class='add'>+  modules (SAI). Each input serial interface carries 8 audio channels in its</div><div class='add'>+  frame in TDM manner. Mixer mixes audio samples of corresponding channels</div><div class='add'>+  from two interfaces into a single sample. Before mixing, audio samples of</div><div class='add'>+  two inputs can be attenuated based on configuration. The output of the</div><div class='add'>+  Audio Mixer is also a serial audio interface. Like input interfaces it has</div><div class='add'>+  the same TDM frame format. This output is used to drive the serial DAC TDM</div><div class='add'>+  interface of audio codec and also sent to the external pins along with the</div><div class='add'>+  receive path of normal audio SAI module for readback by the CPU.</div><div class='add'>+</div><div class='add'>+  The output of Audio Mixer can be selected from any of the three streams</div><div class='add'>+    - serial audio input 1</div><div class='add'>+    - serial audio input 2</div><div class='add'>+    - mixed audio</div><div class='add'>+</div><div class='add'>+  Mixing operation is independent of audio sample rate but the two audio</div><div class='add'>+  input streams must have same audio sample rate with same number of channels</div><div class='add'>+  in TDM frame to be eligible for mixing.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx8qm-audmix</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dais:</div><div class='add'>+    description: contain a list of phandles to AUDMIX connected DAIs.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: the AUDMIX output</div><div class='add'>+        maxItems: 1</div><div class='add'>+      - description: serial audio input 1</div><div class='add'>+        maxItems: 1</div><div class='add'>+      - description: serial audio input 2</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - dais</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    audmix@59840000 {</div><div class='add'>+      compatible = "fsl,imx8qm-audmix";</div><div class='add'>+      reg = &lt;0x59840000 0x10000&gt;;</div><div class='add'>+      clocks = &lt;&amp;amix_lpcg 0&gt;;</div><div class='add'>+      clock-names = "ipg";</div><div class='add'>+      power-domains = &lt;&amp;pd_audmix&gt;;</div><div class='add'>+      dais = &lt;&amp;sai4&gt;, &lt;&amp;sai5&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt<br/>deleted file mode 100644<br/>index 90112ca1ff42..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,esai.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,esai.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,68 +0,0 @@</div><div class='del'>-Freescale Enhanced Serial Audio Interface (ESAI) Controller</div><div class='del'>-</div><div class='del'>-The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port</div><div class='del'>-for serial communication with a variety of serial devices, including industry</div><div class='del'>-standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and</div><div class='del'>-other DSPs. It has up to six transmitters and four receivers.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible		: Compatible list, should contain one of the following</div><div class='del'>-			  compatibles:</div><div class='del'>-			  "fsl,imx35-esai",</div><div class='del'>-			  "fsl,vf610-esai",</div><div class='del'>-			  "fsl,imx6ull-esai",</div><div class='del'>-			  "fsl,imx8qm-esai",</div><div class='del'>-</div><div class='del'>-  - reg			: Offset and length of the register set for the device.</div><div class='del'>-</div><div class='del'>-  - interrupts		: Contains the spdif interrupt.</div><div class='del'>-</div><div class='del'>-  - dmas		: Generic dma devicetree binding as described in</div><div class='del'>-			  Documentation/devicetree/bindings/dma/dma.txt.</div><div class='del'>-</div><div class='del'>-  - dma-names		: Two dmas have to be defined, "tx" and "rx".</div><div class='del'>-</div><div class='del'>-  - clocks		: Contains an entry for each entry in clock-names.</div><div class='del'>-</div><div class='del'>-  - clock-names		: Includes the following entries:</div><div class='del'>-	"core"		  The core clock used to access registers</div><div class='del'>-	"extal"		  The esai baud clock for esai controller used to</div><div class='del'>-			  derive HCK, SCK and FS.</div><div class='del'>-	"fsys"		  The system clock derived from ahb clock used to</div><div class='del'>-			  derive HCK, SCK and FS.</div><div class='del'>-	"spba"		  The spba clock is required when ESAI is placed as a</div><div class='del'>-			  bus slave of the Shared Peripheral Bus and when two</div><div class='del'>-			  or more bus masters (CPU, DMA or DSP) try to access</div><div class='del'>-			  it. This property is optional depending on the SoC</div><div class='del'>-			  design.</div><div class='del'>-</div><div class='del'>-  - fsl,fifo-depth	: The number of elements in the transmit and receive</div><div class='del'>-			  FIFOs. This number is the maximum allowed value for</div><div class='del'>-			  TFCR[TFWM] or RFCR[RFWM].</div><div class='del'>-</div><div class='del'>-  - fsl,esai-synchronous: This is a boolean property. If present, indicating</div><div class='del'>-			  that ESAI would work in the synchronous mode, which</div><div class='del'>-			  means all the settings for Receiving would be</div><div class='del'>-			  duplicated from Transmission related registers.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-  - big-endian		: If this property is absent, the native endian mode</div><div class='del'>-			  will be in use as default, or the big endian mode</div><div class='del'>-			  will be in use for all the device registers.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-esai: esai@2024000 {</div><div class='del'>-	compatible = "fsl,imx35-esai";</div><div class='del'>-	reg = &lt;0x02024000 0x4000&gt;;</div><div class='del'>-	interrupts = &lt;0 51 0x04&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks 208&gt;, &lt;&amp;clks 118&gt;, &lt;&amp;clks 208&gt;;</div><div class='del'>-	clock-names = "core", "extal", "fsys";</div><div class='del'>-	dmas = &lt;&amp;sdma 23 21 0&gt;, &lt;&amp;sdma 24 21 0&gt;;</div><div class='del'>-	dma-names = "rx", "tx";</div><div class='del'>-	fsl,fifo-depth = &lt;128&gt;;</div><div class='del'>-	fsl,esai-synchronous;</div><div class='del'>-	big-endian;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.yaml b/Documentation/devicetree/bindings/sound/fsl,esai.yaml<br/>new file mode 100644<br/>index 000000000000..f99ed20fa684<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,esai.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,esai.yaml</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,esai.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Enhanced Serial Audio Interface (ESAI) Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port</div><div class='add'>+  for serial communication with a variety of serial devices, including industry</div><div class='add'>+  standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and</div><div class='add'>+  other DSPs. It has up to six transmitters and four receivers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx35-esai</div><div class='add'>+      - fsl,imx6ull-esai</div><div class='add'>+      - fsl,imx8qm-esai</div><div class='add'>+      - fsl,vf610-esai</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          The core clock used to access registers.</div><div class='add'>+      - description:</div><div class='add'>+          The esai baud clock for esai controller used to</div><div class='add'>+          derive HCK, SCK and FS.</div><div class='add'>+      - description:</div><div class='add'>+          The system clock derived from ahb clock used to</div><div class='add'>+          derive HCK, SCK and FS.</div><div class='add'>+      - description:</div><div class='add'>+          The spba clock is required when ESAI is placed as a</div><div class='add'>+          bus slave of the Shared Peripheral Bus and when two</div><div class='add'>+          or more bus masters (CPU, DMA or DSP) try to access</div><div class='add'>+          it. This property is optional depending on the SoC</div><div class='add'>+          design.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: extal</div><div class='add'>+      - const: fsys</div><div class='add'>+      - const: spba</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  fsl,fifo-depth:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 64</div><div class='add'>+    description:</div><div class='add'>+      The number of elements in the transmit and receive</div><div class='add'>+      FIFOs. This number is the maximum allowed value for</div><div class='add'>+      TFCR[TFWM] or RFCR[RFWM].</div><div class='add'>+</div><div class='add'>+  fsl,esai-synchronous:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      This is a boolean property. If present, indicating</div><div class='add'>+      that ESAI would work in the synchronous mode, which</div><div class='add'>+      means all the settings for Receiving would be</div><div class='add'>+      duplicated from Transmission related registers.</div><div class='add'>+</div><div class='add'>+  big-endian:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      If this property is absent, the native endian mode</div><div class='add'>+      will be in use as default, or the big endian mode</div><div class='add'>+      will be in use for all the device registers.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    esai@2024000 {</div><div class='add'>+      compatible = "fsl,imx35-esai";</div><div class='add'>+      reg = &lt;0x02024000 0x4000&gt;;</div><div class='add'>+      interrupts = &lt;0 51 0x04&gt;;</div><div class='add'>+      clocks = &lt;&amp;clks 208&gt;, &lt;&amp;clks 118&gt;, &lt;&amp;clks 208&gt;;</div><div class='add'>+      clock-names = "core", "extal", "fsys";</div><div class='add'>+      dmas = &lt;&amp;sdma 23 21 0&gt;, &lt;&amp;sdma 24 21 0&gt;;</div><div class='add'>+      dma-names = "rx", "tx";</div><div class='add'>+      fsl,fifo-depth = &lt;128&gt;;</div><div class='add'>+      fsl,esai-synchronous;</div><div class='add'>+      big-endian;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml<br/>index bfef2fcb75b1..76aa1f248488 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml</a></div><div class='hunk'>@@ -74,6 +74,9 @@ properties:</div><div class='ctx'>       - const: asrck_f</div><div class='ctx'>       - const: spba</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   fsl,asrc-rate:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: The mutual sample rate used by DPCM Back Ends</div><div class='hunk'>@@ -131,6 +134,17 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         fsl,asrc-clk-map: false</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx8qm-asrc</div><div class='add'>+              - fsl,imx8qxp-asrc</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,imx-audio-spdif.yaml b/Documentation/devicetree/bindings/sound/fsl,imx-audio-spdif.yaml<br/>new file mode 100644<br/>index 000000000000..5fc543d02ecb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,imx-audio-spdif.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,imx-audio-spdif.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,imx-audio-spdif.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX audio complex with S/PDIF transceiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx-sabreauto-spdif</div><div class='add'>+              - fsl,imx6sx-sdb-spdif</div><div class='add'>+          - const: fsl,imx-audio-spdif</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx-audio-spdif</div><div class='add'>+</div><div class='add'>+  model:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: User specified audio sound card name</div><div class='add'>+</div><div class='add'>+  spdif-controller:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of the i.MX S/PDIF controller</div><div class='add'>+</div><div class='add'>+  spdif-out:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, the transmitting function of S/PDIF will be enabled,</div><div class='add'>+      indicating there's a physical S/PDIF out connector or jack on the</div><div class='add'>+      board or it's connecting to some other IP block, such as an HDMI</div><div class='add'>+      encoder or display-controller.</div><div class='add'>+</div><div class='add'>+  spdif-in:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, the receiving function of S/PDIF will be enabled,</div><div class='add'>+      indicating there is a physical S/PDIF in connector/jack on the board.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - model</div><div class='add'>+  - spdif-controller</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - spdif-in</div><div class='add'>+  - required:</div><div class='add'>+      - spdif-out</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sound-spdif {</div><div class='add'>+        compatible = "fsl,imx-audio-spdif";</div><div class='add'>+        model = "imx-spdif";</div><div class='add'>+        spdif-controller = &lt;&amp;spdif&gt;;</div><div class='add'>+        spdif-out;</div><div class='add'>+        spdif-in;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml<br/>index 2456d958adee..a5d9c246cc47 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,sai.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,sai.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,sai.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,sai.yaml</a></div><div class='hunk'>@@ -81,14 +81,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   dmas:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - description: DMA controller phandle and request line for RX</div><div class='del'>-      - description: DMA controller phandle and request line for TX</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   dma-names:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='del'>-      - const: rx</div><div class='add'>+      - enum: [ rx, tx ]</div><div class='ctx'>       - const: tx</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.yaml b/Documentation/devicetree/bindings/sound/fsl,spdif.yaml<br/>index 1d64e8337aa4..204f361cea27 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,spdif.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,spdif.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,spdif.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,spdif.yaml</a></div><div class='hunk'>@@ -31,7 +31,10 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Combined or receive interrupt</div><div class='add'>+      - description: Transmit interrupt</div><div class='ctx'> </div><div class='ctx'>   dmas:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -86,6 +89,9 @@ properties:</div><div class='ctx'>       registers. Set this flag for HCDs with big endian descriptors and big</div><div class='ctx'>       endian registers.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -97,6 +103,33 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - fsl,imx8qm-spdif</div><div class='add'>+            - fsl,imx8qxp-spdif</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx8qm-spdif</div><div class='add'>+              - fsl,imx8qxp-spdif</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spdif@2004000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,ssi.txt b/Documentation/devicetree/bindings/sound/fsl,ssi.txt<br/>deleted file mode 100644<br/>index 7e15a85cecd2..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,ssi.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl,ssi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,87 +0,0 @@</div><div class='del'>-Freescale Synchronous Serial Interface</div><div class='del'>-</div><div class='del'>-The SSI is a serial device that communicates with audio codecs.  It can</div><div class='del'>-be programmed in AC97, I2S, left-justified, or right-justified modes.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:       Compatible list, should contain one of the following</div><div class='del'>-                    compatibles:</div><div class='del'>-                      fsl,mpc8610-ssi</div><div class='del'>-                      fsl,imx51-ssi</div><div class='del'>-                      fsl,imx35-ssi</div><div class='del'>-                      fsl,imx21-ssi</div><div class='del'>-- cell-index:       The SSI, &lt;0&gt; = SSI1, &lt;1&gt; = SSI2, and so on.</div><div class='del'>-- reg:              Offset and length of the register set for the device.</div><div class='del'>-- interrupts:       &lt;a b&gt; where a is the interrupt number and b is a</div><div class='del'>-                    field that represents an encoding of the sense and</div><div class='del'>-                    level information for the interrupt.  This should be</div><div class='del'>-                    encoded based on the information in section 2)</div><div class='del'>-                    depending on the type of interrupt controller you</div><div class='del'>-                    have.</div><div class='del'>-- fsl,fifo-depth:   The number of elements in the transmit and receive FIFOs.</div><div class='del'>-                    This number is the maximum allowed value for SFCSR[TFWM0].</div><div class='del'>- - clocks:          "ipg" - Required clock for the SSI unit</div><div class='del'>-                    "baud" - Required clock for SSI master mode. Otherwise this</div><div class='del'>-		      clock is not used</div><div class='del'>-</div><div class='del'>-Required are also ac97 link bindings if ac97 is used. See</div><div class='del'>-Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary</div><div class='del'>-bindings.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- codec-handle:     Phandle to a 'codec' node that defines an audio</div><div class='del'>-                    codec connected to this SSI.  This node is typically</div><div class='del'>-                    a child of an I2C or other control node.</div><div class='del'>-- fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to</div><div class='del'>-		    filter the codec stream. This is necessary for some boards</div><div class='del'>-		    where an incompatible codec is connected to this SSI, e.g.</div><div class='del'>-		    on pca100 and pcm043.</div><div class='del'>-- dmas:		    Generic dma devicetree binding as described in</div><div class='del'>-		    Documentation/devicetree/bindings/dma/dma.txt.</div><div class='del'>-- dma-names:	    Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq</div><div class='del'>-		    is not defined.</div><div class='del'>-- fsl,mode:         The operating mode for the AC97 interface only.</div><div class='del'>-                    "ac97-slave" - AC97 mode, SSI is clock slave</div><div class='del'>-                    "ac97-master" - AC97 mode, SSI is clock master</div><div class='del'>-- fsl,ssi-asynchronous:</div><div class='del'>-                    If specified, the SSI is to be programmed in asynchronous</div><div class='del'>-                    mode.  In this mode, pins SRCK, STCK, SRFS, and STFS must</div><div class='del'>-                    all be connected to valid signals.  In synchronous mode,</div><div class='del'>-                    SRCK and SRFS are ignored.  Asynchronous mode allows</div><div class='del'>-                    playback and capture to use different sample sizes and</div><div class='del'>-                    sample rates.  Some drivers may require that SRCK and STCK</div><div class='del'>-                    be connected together, and SRFS and STFS be connected</div><div class='del'>-                    together.  This would still allow different sample sizes,</div><div class='del'>-                    but not different sample rates.</div><div class='del'>-- fsl,playback-dma: Phandle to a node for the DMA channel to use for</div><div class='del'>-                    playback of audio.  This is typically dictated by SOC</div><div class='del'>-                    design.  See the notes below.</div><div class='del'>-                    Only used on Power Architecture.</div><div class='del'>-- fsl,capture-dma:  Phandle to a node for the DMA channel to use for</div><div class='del'>-                    capture (recording) of audio.  This is typically dictated</div><div class='del'>-                    by SOC design.  See the notes below.</div><div class='del'>-                    Only used on Power Architecture.</div><div class='del'>-</div><div class='del'>-Child 'codec' node required properties:</div><div class='del'>-- compatible:       Compatible list, contains the name of the codec</div><div class='del'>-</div><div class='del'>-Child 'codec' node optional properties:</div><div class='del'>-- clock-frequency:  The frequency of the input clock, which typically comes</div><div class='del'>-                    from an on-board dedicated oscillator.</div><div class='del'>-</div><div class='del'>-Notes on fsl,playback-dma and fsl,capture-dma:</div><div class='del'>-</div><div class='del'>-On SOCs that have an SSI, specific DMA channels are hard-wired for playback</div><div class='del'>-and capture.  On the MPC8610, for example, SSI1 must use DMA channel 0 for</div><div class='del'>-playback and DMA channel 1 for capture.  SSI2 must use DMA channel 2 for</div><div class='del'>-playback and DMA channel 3 for capture.  The developer can choose which</div><div class='del'>-DMA controller to use, but the channels themselves are hard-wired.  The</div><div class='del'>-purpose of these two properties is to represent this hardware design.</div><div class='del'>-</div><div class='del'>-The device tree nodes for the DMA channels that are referenced by</div><div class='del'>-"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with</div><div class='del'>-"fsl,ssi-dma-channel".  The SOC-specific compatible string (e.g.</div><div class='del'>-"fsl,mpc8610-dma-channel") can remain.  If these nodes are left as</div><div class='del'>-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA</div><div class='del'>-drivers (fsldma) will attempt to use them, and it will conflict with the</div><div class='del'>-sound drivers.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,ssi.yaml b/Documentation/devicetree/bindings/sound/fsl,ssi.yaml<br/>new file mode 100644<br/>index 000000000000..4ab10cd3b520<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,ssi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl,ssi.yaml</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,ssi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Synchronous Serial Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Notes on fsl,playback-dma and fsl,capture-dma</div><div class='add'>+  On SOCs that have an SSI, specific DMA channels are hard-wired for playback</div><div class='add'>+  and capture.  On the MPC8610, for example, SSI1 must use DMA channel 0 for</div><div class='add'>+  playback and DMA channel 1 for capture.  SSI2 must use DMA channel 2 for</div><div class='add'>+  playback and DMA channel 3 for capture.  The developer can choose which</div><div class='add'>+  DMA controller to use, but the channels themselves are hard-wired.  The</div><div class='add'>+  purpose of these two properties is to represent this hardware design.</div><div class='add'>+</div><div class='add'>+  The device tree nodes for the DMA channels that are referenced by</div><div class='add'>+  "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with</div><div class='add'>+  "fsl,ssi-dma-channel".  The SOC-specific compatible string (e.g.</div><div class='add'>+  "fsl,mpc8610-dma-channel") can remain.  If these nodes are left as</div><div class='add'>+  "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA</div><div class='add'>+  drivers (fsldma) will attempt to use them, and it will conflict with the</div><div class='add'>+  sound drivers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx50-ssi</div><div class='add'>+              - fsl,imx53-ssi</div><div class='add'>+          - const: fsl,imx51-ssi</div><div class='add'>+          - const: fsl,imx21-ssi</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx25-ssi</div><div class='add'>+              - fsl,imx27-ssi</div><div class='add'>+              - fsl,imx35-ssi</div><div class='add'>+              - fsl,imx51-ssi</div><div class='add'>+          - const: fsl,imx21-ssi</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6q-ssi</div><div class='add'>+              - fsl,imx6sl-ssi</div><div class='add'>+              - fsl,imx6sx-ssi</div><div class='add'>+          - const: fsl,imx51-ssi</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx21-ssi</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,mpc8610-ssi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The ipg clock for register access</div><div class='add'>+      - description: clock for SSI master mode</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+      - const: baud</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: DMA controller phandle and request line for RX</div><div class='add'>+          - description: DMA controller phandle and request line for TX</div><div class='add'>+      - items:</div><div class='add'>+          - description: DMA controller phandle and request line for RX0</div><div class='add'>+          - description: DMA controller phandle and request line for TX0</div><div class='add'>+          - description: DMA controller phandle and request line for RX1</div><div class='add'>+          - description: DMA controller phandle and request line for TX1</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: rx</div><div class='add'>+          - const: tx</div><div class='add'>+      - items:</div><div class='add'>+          - const: rx0</div><div class='add'>+          - const: tx0</div><div class='add'>+          - const: rx1</div><div class='add'>+          - const: tx1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+    description: optional, some dts node didn't add it.</div><div class='add'>+</div><div class='add'>+  cell-index:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1, 2]</div><div class='add'>+    description: The SSI index</div><div class='add'>+</div><div class='add'>+  ac97-gpios:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: Please refer to soc-ac97link.txt</div><div class='add'>+</div><div class='add'>+  codec-handle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a 'codec' node that defines an audio</div><div class='add'>+      codec connected to this SSI.  This node is typically</div><div class='add'>+      a child of an I2C or other control node.</div><div class='add'>+</div><div class='add'>+  fsl,fifo-depth:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The number of elements in the transmit and receive FIFOs.</div><div class='add'>+      This number is the maximum allowed value for SFCSR[TFWM0].</div><div class='add'>+    enum: [8, 15]</div><div class='add'>+</div><div class='add'>+  fsl,fiq-stream-filter:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Disabled DMA and use FIQ instead to filter the codec stream.</div><div class='add'>+      This is necessary for some boards where an incompatible codec</div><div class='add'>+      is connected to this SSI, e.g. on pca100 and pcm043.</div><div class='add'>+</div><div class='add'>+  fsl,mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum: [ ac97-slave, ac97-master, i2s-slave, i2s-master,</div><div class='add'>+            lj-slave, lj-master, rj-slave, rj-master ]</div><div class='add'>+    description: |</div><div class='add'>+      "ac97-slave" - AC97 mode, SSI is clock slave</div><div class='add'>+      "ac97-master" - AC97 mode, SSI is clock master</div><div class='add'>+      "i2s-slave" - I2S mode, SSI is clock slave</div><div class='add'>+      "i2s-master" - I2S mode, SSI is clock master</div><div class='add'>+      "lj-slave" - Left justified mode, SSI is clock slave</div><div class='add'>+      "lj-master" - Left justified mode, SSI is clock master</div><div class='add'>+      "rj-slave" - Right justified mode, SSI is clock slave</div><div class='add'>+      "rj-master" - Right justified mode, SSI is clock master</div><div class='add'>+</div><div class='add'>+  fsl,ssi-asynchronous:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: If specified, the SSI is to be programmed in asynchronous</div><div class='add'>+      mode.  In this mode, pins SRCK, STCK, SRFS, and STFS must</div><div class='add'>+      all be connected to valid signals.  In synchronous mode,</div><div class='add'>+      SRCK and SRFS are ignored.  Asynchronous mode allows</div><div class='add'>+      playback and capture to use different sample sizes and</div><div class='add'>+      sample rates.  Some drivers may require that SRCK and STCK</div><div class='add'>+      be connected together, and SRFS and STFS be connected</div><div class='add'>+      together.  This would still allow different sample sizes,</div><div class='add'>+      but not different sample rates.</div><div class='add'>+</div><div class='add'>+  fsl,playback-dma:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Phandle to a node for the DMA channel to use for</div><div class='add'>+      playback of audio.  This is typically dictated by SOC</div><div class='add'>+      design. Only used on Power Architecture.</div><div class='add'>+</div><div class='add'>+  fsl,capture-dma:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Phandle to a node for the DMA channel to use for</div><div class='add'>+      capture (recording) of audio.  This is typically dictated</div><div class='add'>+      by SOC design. Only used on Power Architecture.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - fsl,fifo-depth</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+    ssi@2028000 {</div><div class='add'>+        compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi";</div><div class='add'>+        reg = &lt;0x02028000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX6QDL_CLK_SSI1_IPG&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX6QDL_CLK_SSI1&gt;;</div><div class='add'>+        clock-names = "ipg", "baud";</div><div class='add'>+        dmas = &lt;&amp;sdma 37 1 0&gt;, &lt;&amp;sdma 38 1 0&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt b/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt<br/>deleted file mode 100644<br/>index 4e8dbc5abfd1..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/fsl-asoc-card.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,117 +0,0 @@</div><div class='del'>-Freescale Generic ASoC Sound Card with ASRC support</div><div class='del'>-</div><div class='del'>-The Freescale Generic ASoC Sound Card can be used, ideally, for all Freescale</div><div class='del'>-SoCs connecting with external CODECs.</div><div class='del'>-</div><div class='del'>-The idea of this generic sound card is a bit like ASoC Simple Card. However,</div><div class='del'>-for Freescale SoCs (especially those released in recent years), most of them</div><div class='del'>-have ASRC (Documentation/devicetree/bindings/sound/fsl,asrc.txt) inside. And</div><div class='del'>-this is a specific feature that might be painstakingly controlled and merged</div><div class='del'>-into the Simple Card.</div><div class='del'>-</div><div class='del'>-So having this generic sound card allows all Freescale SoC users to benefit</div><div class='del'>-from the simplification of a new card support and the capability of the wide</div><div class='del'>-sample rates support through ASRC.</div><div class='del'>-</div><div class='del'>-Note: The card is initially designed for those sound cards who use AC'97, I2S</div><div class='del'>-      and PCM DAI formats. However, it'll be also possible to support those non</div><div class='del'>-      AC'97/I2S/PCM type sound cards, such as S/PDIF audio and HDMI audio, as</div><div class='del'>-      long as the driver has been properly upgraded.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The compatible list for this generic sound card currently:</div><div class='del'>- "fsl,imx-audio-ac97"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-cs42888"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-cs427x"</div><div class='del'>- (compatible with CS4271 and CS4272)</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-wm8962"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-sgtl5000"</div><div class='del'>- (compatible with Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt)</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-wm8960"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-mqs"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-wm8524"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-tlv320aic32x4"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-tlv320aic31xx"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-si476x"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-wm8958"</div><div class='del'>-</div><div class='del'>- "fsl,imx-audio-nau8822"</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible		: Contains one of entries in the compatible list.</div><div class='del'>-</div><div class='del'>-  - model		: The user-visible name of this sound complex</div><div class='del'>-</div><div class='del'>-  - audio-cpu		: The phandle of an CPU DAI controller</div><div class='del'>-</div><div class='del'>-  - audio-codec		: The phandle of an audio codec</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-  - audio-asrc		: The phandle of ASRC. It can be absent if there's no</div><div class='del'>-			  need to add ASRC support via DPCM.</div><div class='del'>-</div><div class='del'>-  - audio-routing	: A list of the connections between audio components.</div><div class='del'>-			  Each entry is a pair of strings, the first being the</div><div class='del'>-			  connection's sink, the second being the connection's</div><div class='del'>-			  source. There're a few pre-designed board connectors:</div><div class='del'>-			   * Line Out Jack</div><div class='del'>-			   * Line In Jack</div><div class='del'>-			   * Headphone Jack</div><div class='del'>-			   * Mic Jack</div><div class='del'>-			   * Ext Spk</div><div class='del'>-			   * AMIC (stands for Analog Microphone Jack)</div><div class='del'>-			   * DMIC (stands for Digital Microphone Jack)</div><div class='del'>-</div><div class='del'>-			  Note: The "Mic Jack" and "AMIC" are redundant while</div><div class='del'>-			        coexisting in order to support the old bindings</div><div class='del'>-				of wm8962 and sgtl5000.</div><div class='del'>-</div><div class='del'>-  - hp-det-gpio		: The GPIO that detect headphones are plugged in</div><div class='del'>-  - mic-det-gpio	: The GPIO that detect microphones are plugged in</div><div class='del'>-  - bitclock-master	: Indicates dai-link bit clock master; for details see simple-card.yaml.</div><div class='del'>-  - frame-master	: Indicates dai-link frame master; for details see simple-card.yaml.</div><div class='del'>-  - dai-format		: audio format, for details see simple-card.yaml.</div><div class='del'>-  - frame-inversion	: dai-link uses frame clock inversion, for details see simple-card.yaml.</div><div class='del'>-  - bitclock-inversion	: dai-link uses bit clock inversion, for details see simple-card.yaml.</div><div class='del'>-  - mclk-id		: main clock id, specific for each card configuration.</div><div class='del'>-</div><div class='del'>-Optional unless SSI is selected as a CPU DAI:</div><div class='del'>-</div><div class='del'>-  - mux-int-port	: The internal port of the i.MX audio muxer (AUDMUX)</div><div class='del'>-</div><div class='del'>-  - mux-ext-port	: The external port of the i.MX audio muxer</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-sound-cs42888 {</div><div class='del'>-	compatible = "fsl,imx-audio-cs42888";</div><div class='del'>-	model = "cs42888-audio";</div><div class='del'>-	audio-cpu = &lt;&amp;esai&gt;;</div><div class='del'>-	audio-asrc = &lt;&amp;asrc&gt;;</div><div class='del'>-	audio-codec = &lt;&amp;cs42888&gt;;</div><div class='del'>-	audio-routing =</div><div class='del'>-		"Line Out Jack", "AOUT1L",</div><div class='del'>-		"Line Out Jack", "AOUT1R",</div><div class='del'>-		"Line Out Jack", "AOUT2L",</div><div class='del'>-		"Line Out Jack", "AOUT2R",</div><div class='del'>-		"Line Out Jack", "AOUT3L",</div><div class='del'>-		"Line Out Jack", "AOUT3R",</div><div class='del'>-		"Line Out Jack", "AOUT4L",</div><div class='del'>-		"Line Out Jack", "AOUT4R",</div><div class='del'>-		"AIN1L", "Line In Jack",</div><div class='del'>-		"AIN1R", "Line In Jack",</div><div class='del'>-		"AIN2L", "Line In Jack",</div><div class='del'>-		"AIN2R", "Line In Jack";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl-asoc-card.yaml b/Documentation/devicetree/bindings/sound/fsl-asoc-card.yaml<br/>new file mode 100644<br/>index 000000000000..9922664d5ccc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl-asoc-card.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/fsl-asoc-card.yaml</a></div><div class='hunk'>@@ -0,0 +1,197 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl-asoc-card.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Generic ASoC Sound Card with ASRC support</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Freescale Generic ASoC Sound Card can be used, ideally,</div><div class='add'>+  for all Freescale SoCs connecting with external CODECs.</div><div class='add'>+</div><div class='add'>+  The idea of this generic sound card is a bit like ASoC Simple Card.</div><div class='add'>+  However, for Freescale SoCs (especially those released in recent years),</div><div class='add'>+  most of them have ASRC inside. And this is a specific feature that might</div><div class='add'>+  be painstakingly controlled and merged into the Simple Card.</div><div class='add'>+</div><div class='add'>+  So having this generic sound card allows all Freescale SoC users to</div><div class='add'>+  benefit from the simplification of a new card support and the capability</div><div class='add'>+  of the wide sample rates support through ASRC.</div><div class='add'>+</div><div class='add'>+  Note, The card is initially designed for those sound cards who use AC'97, I2S</div><div class='add'>+  and PCM DAI formats. However, it'll be also possible to support those non</div><div class='add'>+  AC'97/I2S/PCM type sound cards, such as S/PDIF audio and HDMI audio, as</div><div class='add'>+  long as the driver has been properly upgraded.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx-sgtl5000</div><div class='add'>+              - fsl,imx25-pdk-sgtl5000</div><div class='add'>+              - fsl,imx53-cpuvo-sgtl5000</div><div class='add'>+              - fsl,imx51-babbage-sgtl5000</div><div class='add'>+              - fsl,imx53-m53evk-sgtl5000</div><div class='add'>+              - fsl,imx53-qsb-sgtl5000</div><div class='add'>+              - fsl,imx53-voipac-sgtl5000</div><div class='add'>+              - fsl,imx6-armadeus-sgtl5000</div><div class='add'>+              - fsl,imx6-rex-sgtl5000</div><div class='add'>+              - fsl,imx6-sabreauto-cs42888</div><div class='add'>+              - fsl,imx6-wandboard-sgtl5000</div><div class='add'>+              - fsl,imx6dl-nit6xlite-sgtl5000</div><div class='add'>+              - fsl,imx6q-ba16-sgtl5000</div><div class='add'>+              - fsl,imx6q-nitrogen6_max-sgtl5000</div><div class='add'>+              - fsl,imx6q-nitrogen6_som2-sgtl5000</div><div class='add'>+              - fsl,imx6q-nitrogen6x-sgtl5000</div><div class='add'>+              - fsl,imx6q-sabrelite-sgtl5000</div><div class='add'>+              - fsl,imx6q-sabresd-wm8962</div><div class='add'>+              - fsl,imx6q-udoo-ac97</div><div class='add'>+              - fsl,imx6q-ventana-sgtl5000</div><div class='add'>+              - fsl,imx6sl-evk-wm8962</div><div class='add'>+              - fsl,imx6sx-sdb-mqs</div><div class='add'>+              - fsl,imx6sx-sdb-wm8962</div><div class='add'>+              - fsl,imx7d-evk-wm8960</div><div class='add'>+              - karo,tx53-audio-sgtl5000</div><div class='add'>+              - tq,imx53-mba53-sgtl5000</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx-audio-ac97</div><div class='add'>+              - fsl,imx-audio-cs42888</div><div class='add'>+              - fsl,imx-audio-mqs</div><div class='add'>+              - fsl,imx-audio-sgtl5000</div><div class='add'>+              - fsl,imx-audio-wm8960</div><div class='add'>+              - fsl,imx-audio-wm8962</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx-audio-ac97</div><div class='add'>+              - fsl,imx-audio-cs42888</div><div class='add'>+              - fsl,imx-audio-cs427x</div><div class='add'>+              - fsl,imx-audio-mqs</div><div class='add'>+              - fsl,imx-audio-nau8822</div><div class='add'>+              - fsl,imx-audio-sgtl5000</div><div class='add'>+              - fsl,imx-audio-si476x</div><div class='add'>+              - fsl,imx-audio-tlv320aic31xx</div><div class='add'>+              - fsl,imx-audio-tlv320aic32x4</div><div class='add'>+              - fsl,imx-audio-wm8524</div><div class='add'>+              - fsl,imx-audio-wm8904</div><div class='add'>+              - fsl,imx-audio-wm8960</div><div class='add'>+              - fsl,imx-audio-wm8962</div><div class='add'>+              - fsl,imx-audio-wm8958</div><div class='add'>+</div><div class='add'>+  model:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: The user-visible name of this sound complex</div><div class='add'>+</div><div class='add'>+  audio-asrc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      The phandle of ASRC. It can be absent if there's no</div><div class='add'>+      need to add ASRC support via DPCM.</div><div class='add'>+</div><div class='add'>+  audio-codec:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of an audio codec</div><div class='add'>+</div><div class='add'>+  audio-cpu:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of an CPU DAI controller</div><div class='add'>+</div><div class='add'>+  audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source. There're a few pre-designed board</div><div class='add'>+      connectors. "AMIC" stands for Analog Microphone Jack.</div><div class='add'>+      "DMIC" stands for Digital Microphone Jack. The "Mic Jack" and "AMIC"</div><div class='add'>+      are redundant while coexisting in order to support the old bindings</div><div class='add'>+      of wm8962 and sgtl5000.</div><div class='add'>+</div><div class='add'>+  hp-det-gpio:</div><div class='add'>+    deprecated: true</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The GPIO that detect headphones are plugged in</div><div class='add'>+</div><div class='add'>+  hp-det-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The GPIO that detect headphones are plugged in</div><div class='add'>+</div><div class='add'>+  mic-det-gpio:</div><div class='add'>+    deprecated: true</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The GPIO that detect microphones are plugged in</div><div class='add'>+</div><div class='add'>+  mic-det-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The GPIO that detect microphones are plugged in</div><div class='add'>+</div><div class='add'>+  bitclock-master:</div><div class='add'>+    $ref: simple-card.yaml#/definitions/bitclock-master</div><div class='add'>+    description: Indicates dai-link bit clock master.</div><div class='add'>+</div><div class='add'>+  frame-master:</div><div class='add'>+    $ref: simple-card.yaml#/definitions/frame-master</div><div class='add'>+    description: Indicates dai-link frame master.</div><div class='add'>+</div><div class='add'>+  format:</div><div class='add'>+    $ref: simple-card.yaml#/definitions/format</div><div class='add'>+    description: audio format.</div><div class='add'>+</div><div class='add'>+  frame-inversion:</div><div class='add'>+    $ref: simple-card.yaml#/definitions/frame-inversion</div><div class='add'>+    description: dai-link uses frame clock inversion.</div><div class='add'>+</div><div class='add'>+  bitclock-inversion:</div><div class='add'>+    $ref: simple-card.yaml#/definitions/bitclock-inversion</div><div class='add'>+    description: dai-link uses bit clock inversion.</div><div class='add'>+</div><div class='add'>+  mclk-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: main clock id, specific for each card configuration.</div><div class='add'>+</div><div class='add'>+  mux-int-port:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [1, 2, 7]</div><div class='add'>+    description: The internal port of the i.MX audio muxer (AUDMUX)</div><div class='add'>+</div><div class='add'>+  mux-ext-port:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [3, 4, 5, 6]</div><div class='add'>+    description: The external port of the i.MX audio muxer</div><div class='add'>+</div><div class='add'>+  ssi-controller:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of an CPU DAI controller</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - model</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sound-cs42888 {</div><div class='add'>+        compatible = "fsl,imx-audio-cs42888";</div><div class='add'>+        model = "cs42888-audio";</div><div class='add'>+        audio-cpu = &lt;&amp;esai&gt;;</div><div class='add'>+        audio-asrc = &lt;&amp;asrc&gt;;</div><div class='add'>+        audio-codec = &lt;&amp;cs42888&gt;;</div><div class='add'>+        audio-routing =</div><div class='add'>+             "Line Out Jack", "AOUT1L",</div><div class='add'>+             "Line Out Jack", "AOUT1R",</div><div class='add'>+             "Line Out Jack", "AOUT2L",</div><div class='add'>+             "Line Out Jack", "AOUT2R",</div><div class='add'>+             "Line Out Jack", "AOUT3L",</div><div class='add'>+             "Line Out Jack", "AOUT3R",</div><div class='add'>+             "Line Out Jack", "AOUT4L",</div><div class='add'>+             "Line Out Jack", "AOUT4R",</div><div class='add'>+             "AIN1L", "Line In Jack",</div><div class='add'>+             "AIN1R", "Line In Jack",</div><div class='add'>+             "AIN2L", "Line In Jack",</div><div class='add'>+             "AIN2R", "Line In Jack";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt b/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt<br/>deleted file mode 100644<br/>index da84a442ccea..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/imx-audio-spdif.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-Freescale i.MX audio complex with S/PDIF transceiver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible		: "fsl,imx-audio-spdif"</div><div class='del'>-</div><div class='del'>-  - model		: The user-visible name of this sound complex</div><div class='del'>-</div><div class='del'>-  - spdif-controller	: The phandle of the i.MX S/PDIF controller</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-  - spdif-out		: This is a boolean property. If present, the</div><div class='del'>-			  transmitting function of S/PDIF will be enabled,</div><div class='del'>-			  indicating there's a physical S/PDIF out connector</div><div class='del'>-			  or jack on the board or it's connecting to some</div><div class='del'>-			  other IP block, such as an HDMI encoder or</div><div class='del'>-			  display-controller.</div><div class='del'>-</div><div class='del'>-  - spdif-in		: This is a boolean property. If present, the receiving</div><div class='del'>-			  function of S/PDIF will be enabled, indicating there</div><div class='del'>-			  is a physical S/PDIF in connector/jack on the board.</div><div class='del'>-</div><div class='del'>-* Note: At least one of these two properties should be set in the DT binding.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-sound-spdif {</div><div class='del'>-	compatible = "fsl,imx-audio-spdif";</div><div class='del'>-	model = "imx-spdif";</div><div class='del'>-	spdif-controller = &lt;&amp;spdif&gt;;</div><div class='del'>-	spdif-out;</div><div class='del'>-	spdif-in;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt2701-wm8960.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt2701-wm8960.yaml<br/>new file mode 100644<br/>index 000000000000..cf985461a995<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mediatek,mt2701-wm8960.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/mediatek,mt2701-wm8960.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mediatek,mt2701-wm8960.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT2701 with WM8960 CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kartik Agarwala &lt;agarwala.kartik@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt2701-wm8960-machine</div><div class='add'>+</div><div class='add'>+  mediatek,platform:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of MT2701 ASoC platform.</div><div class='add'>+</div><div class='add'>+  audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source.</div><div class='add'>+</div><div class='add'>+  mediatek,audio-codec:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of the WM8960 audio codec.</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - mediatek,platform</div><div class='add'>+  - audio-routing</div><div class='add'>+  - mediatek,audio-codec</div><div class='add'>+  - pinctrl-names</div><div class='add'>+  - pinctrl-0</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sound {</div><div class='add'>+        compatible = "mediatek,mt2701-wm8960-machine";</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+        audio-routing =</div><div class='add'>+            "Headphone", "HP_L",</div><div class='add'>+            "Headphone", "HP_R",</div><div class='add'>+            "LINPUT1", "AMIC",</div><div class='add'>+            "RINPUT1", "AMIC";</div><div class='add'>+        mediatek,audio-codec = &lt;&amp;wm8960&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;aud_pins_default&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt2701-wm8960.txt b/Documentation/devicetree/bindings/sound/mt2701-wm8960.txt<br/>deleted file mode 100644<br/>index 809b609ea9d0..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt2701-wm8960.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt2701-wm8960.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-MT2701 with WM8960 CODEC</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "mediatek,mt2701-wm8960-machine"</div><div class='del'>-- mediatek,platform: the phandle of MT2701 ASoC platform</div><div class='del'>-- audio-routing: a list of the connections between audio</div><div class='del'>-- mediatek,audio-codec: the phandles of wm8960 codec</div><div class='del'>-- pinctrl-names: Should contain only one value - "default"</div><div class='del'>-- pinctrl-0: Should specify pin control groups used for this controller.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	sound:sound {</div><div class='del'>-		compatible = "mediatek,mt2701-wm8960-machine";</div><div class='del'>-		mediatek,platform = &lt;&amp;afe&gt;;</div><div class='del'>-		audio-routing =</div><div class='del'>-			"Headphone", "HP_L",</div><div class='del'>-			"Headphone", "HP_R",</div><div class='del'>-			"LINPUT1", "AMIC",</div><div class='del'>-			"RINPUT1", "AMIC";</div><div class='del'>-		mediatek,audio-codec = &lt;&amp;wm8960&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;aud_pins_default&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml<br/>index 9853c11a1330..cbc641ecbe94 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a></div><div class='hunk'>@@ -12,17 +12,46 @@ maintainers:</div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the MT8186 sound card.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: sound-card-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mediatek,mt8186-mt6366-da7219-max98357-sound</div><div class='ctx'> </div><div class='add'>+  audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source.</div><div class='add'>+      Valid names could be the input or output widgets of audio components,</div><div class='add'>+      power supplies, MicBias of codec and the software switch.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        # Sinks</div><div class='add'>+        - HDMI1</div><div class='add'>+        - Headphones</div><div class='add'>+        - Line Out</div><div class='add'>+        - MIC</div><div class='add'>+        - Speakers</div><div class='add'>+</div><div class='add'>+        # Sources</div><div class='add'>+        - Headset Mic</div><div class='add'>+        - HPL</div><div class='add'>+        - HPR</div><div class='add'>+        - Speaker</div><div class='add'>+        - TX</div><div class='add'>+</div><div class='ctx'>   mediatek,platform:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8186 ASoC platform.</div><div class='ctx'> </div><div class='ctx'>   headset-codec:</div><div class='ctx'>     type: object</div><div class='add'>+    deprecated: true</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -32,6 +61,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   playback-codecs:</div><div class='ctx'>     type: object</div><div class='add'>+    deprecated: true</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -53,32 +83,115 @@ properties:</div><div class='ctx'>       A list of the desired dai-links in the sound card. Each entry is a</div><div class='ctx'>       name defined in the machine driver.</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+patternProperties:</div><div class='add'>+  ".*-dai-link$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Container for dai-link level properties and CODEC sub-nodes.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      link-name:</div><div class='add'>+        description: Indicates dai-link name and PCM stream name</div><div class='add'>+        items:</div><div class='add'>+          enum:</div><div class='add'>+            - I2S0</div><div class='add'>+            - I2S1</div><div class='add'>+            - I2S2</div><div class='add'>+            - I2S3</div><div class='add'>+</div><div class='add'>+      codec:</div><div class='add'>+        description: Holds subnode which indicates codec dai.</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+      dai-format:</div><div class='add'>+        description: audio format</div><div class='add'>+        items:</div><div class='add'>+          enum:</div><div class='add'>+            - i2s</div><div class='add'>+            - right_j</div><div class='add'>+            - left_j</div><div class='add'>+            - dsp_a</div><div class='add'>+            - dsp_b</div><div class='add'>+</div><div class='add'>+      mediatek,clk-provider:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        description: Indicates dai-link clock master.</div><div class='add'>+        items:</div><div class='add'>+          enum:</div><div class='add'>+            - cpu</div><div class='add'>+            - codec</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - link-name</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - mediatek,platform</div><div class='del'>-  - headset-codec</div><div class='del'>-  - playback-codecs</div><div class='add'>+</div><div class='add'>+# Disallow legacy properties if xxx-dai-link nodes are specified</div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    patternProperties:</div><div class='add'>+      ".*-dai-link$": false</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    headset-codec: false</div><div class='add'>+    speaker-codecs: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='ctx'>     sound: mt8186-sound {</div><div class='ctx'>         compatible = "mediatek,mt8186-mt6366-da7219-max98357-sound";</div><div class='del'>-        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+        model = "mt8186_da7219_m98357";</div><div class='ctx'>         pinctrl-names = "aud_clk_mosi_off",</div><div class='ctx'>                         "aud_clk_mosi_on";</div><div class='ctx'>         pinctrl-0 = &lt;&amp;aud_clk_mosi_off&gt;;</div><div class='ctx'>         pinctrl-1 = &lt;&amp;aud_clk_mosi_on&gt;;</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+</div><div class='add'>+        audio-routing =</div><div class='add'>+                "Headphones", "HPL",</div><div class='add'>+                "Headphones", "HPR",</div><div class='add'>+                "MIC", "Headset Mic",</div><div class='add'>+                "Speakers", "Speaker",</div><div class='add'>+                "HDMI1", "TX";</div><div class='add'>+</div><div class='add'>+        hs-playback-dai-link {</div><div class='add'>+                link-name = "I2S0";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;da7219&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='ctx'> </div><div class='del'>-        headset-codec {</div><div class='del'>-            sound-dai = &lt;&amp;da7219&gt;;</div><div class='add'>+        hs-capture-dai-link {</div><div class='add'>+                link-name = "I2S1";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;da7219&gt;;</div><div class='add'>+                };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        playback-codecs {</div><div class='del'>-            sound-dai = &lt;&amp;anx_bridge_dp&gt;,</div><div class='del'>-                        &lt;&amp;max98357a&gt;;</div><div class='add'>+        spk-dp-playback-dai-link {</div><div class='add'>+                link-name = "I2S3";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;anx_bridge_dp&gt;, &lt;&amp;max98357a&gt;;</div><div class='add'>+                };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml<br/>index bdf7b0960533..ed93f18ef985 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml</a></div><div class='hunk'>@@ -12,6 +12,9 @@ maintainers:</div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the MT8186 sound card.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: sound-card-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -19,6 +22,34 @@ properties:</div><div class='ctx'>       - mediatek,mt8186-mt6366-rt5682s-max98360-sound</div><div class='ctx'>       - mediatek,mt8186-mt6366-rt5650-sound</div><div class='ctx'> </div><div class='add'>+  audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source.</div><div class='add'>+      Valid names could be the input or output widgets of audio components,</div><div class='add'>+      power supplies, MicBias of codec and the software switch.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        # Sinks</div><div class='add'>+        - HDMI1</div><div class='add'>+        - Headphone</div><div class='add'>+        - IN1P</div><div class='add'>+        - IN1N</div><div class='add'>+        - Line Out</div><div class='add'>+        - Speakers</div><div class='add'>+</div><div class='add'>+        # Sources</div><div class='add'>+        - Headset Mic</div><div class='add'>+        - HPOL</div><div class='add'>+        - HPOR</div><div class='add'>+        - Speaker</div><div class='add'>+        - SPOL</div><div class='add'>+        - SPOR</div><div class='add'>+        - TX</div><div class='add'>+</div><div class='ctx'>   mediatek,platform:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8186 ASoC platform.</div><div class='hunk'>@@ -32,6 +63,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   headset-codec:</div><div class='ctx'>     type: object</div><div class='add'>+    deprecated: true</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -41,6 +73,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   playback-codecs:</div><div class='ctx'>     type: object</div><div class='add'>+    deprecated: true</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -62,13 +95,56 @@ properties:</div><div class='ctx'>       A list of the desired dai-links in the sound card. Each entry is a</div><div class='ctx'>       name defined in the machine driver.</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+patternProperties:</div><div class='add'>+  ".*-dai-link$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Container for dai-link level properties and CODEC sub-nodes.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      link-name:</div><div class='add'>+        description: Indicates dai-link name and PCM stream name</div><div class='add'>+        enum: [ I2S0, I2S1, I2S2, I2S3 ]</div><div class='add'>+</div><div class='add'>+      codec:</div><div class='add'>+        description: Holds subnode which indicates codec dai.</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+      dai-format:</div><div class='add'>+        description: audio format</div><div class='add'>+        enum: [ i2s, right_j, left_j, dsp_a, dsp_b ]</div><div class='add'>+</div><div class='add'>+      mediatek,clk-provider:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        description: Indicates dai-link clock master.</div><div class='add'>+        enum: [ cpu, codec ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - link-name</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - mediatek,platform</div><div class='del'>-  - headset-codec</div><div class='del'>-  - playback-codecs</div><div class='add'>+</div><div class='add'>+# Disallow legacy properties if xxx-dai-link nodes are specified</div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    patternProperties:</div><div class='add'>+      ".*-dai-link$": false</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    headset-codec: false</div><div class='add'>+    speaker-codecs: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -76,23 +152,49 @@ examples:</div><div class='ctx'> </div><div class='ctx'>     sound: mt8186-sound {</div><div class='ctx'>         compatible = "mediatek,mt8186-mt6366-rt1019-rt5682s-sound";</div><div class='del'>-        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+        model = "mt8186_rt1019_rt5682s";</div><div class='ctx'>         pinctrl-names = "aud_clk_mosi_off",</div><div class='ctx'>                         "aud_clk_mosi_on",</div><div class='ctx'>                         "aud_gpio_dmic_sec";</div><div class='ctx'>         pinctrl-0 = &lt;&amp;aud_clk_mosi_off&gt;;</div><div class='ctx'>         pinctrl-1 = &lt;&amp;aud_clk_mosi_on&gt;;</div><div class='ctx'>         pinctrl-2 = &lt;&amp;aud_gpio_dmic_sec&gt;;</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='ctx'> </div><div class='ctx'>         dmic-gpios = &lt;&amp;pio 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='del'>-        headset-codec {</div><div class='del'>-            sound-dai = &lt;&amp;rt5682s&gt;;</div><div class='add'>+        audio-routing =</div><div class='add'>+                "Headphone", "HPOL",</div><div class='add'>+                "Headphone", "HPOR",</div><div class='add'>+                "IN1P", "Headset Mic",</div><div class='add'>+                "Speakers", "Speaker",</div><div class='add'>+                "HDMI1", "TX";</div><div class='add'>+</div><div class='add'>+        hs-playback-dai-link {</div><div class='add'>+                link-name = "I2S0";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;rt5682s 0&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hs-capture-dai-link {</div><div class='add'>+                link-name = "I2S1";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;rt5682s 0&gt;;</div><div class='add'>+                };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        playback-codecs {</div><div class='del'>-             sound-dai = &lt;&amp;it6505dptx&gt;,</div><div class='del'>-                         &lt;&amp;rt1019p&gt;;</div><div class='add'>+        spk-hdmi-playback-dai-link {</div><div class='add'>+                link-name = "I2S3";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;it6505dptx&gt;, &lt;&amp;rt1019p&gt;;</div><div class='add'>+                };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml b/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml<br/>index 7e50f5d65c8f..c4e68f31aaab 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml</a></div><div class='hunk'>@@ -13,6 +13,9 @@ maintainers:</div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the MT8192 sound card.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: sound-card-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -20,6 +23,31 @@ properties:</div><div class='ctx'>       - mediatek,mt8192_mt6359_rt1015p_rt5682</div><div class='ctx'>       - mediatek,mt8192_mt6359_rt1015p_rt5682s</div><div class='ctx'> </div><div class='add'>+  audio-routing:</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source.</div><div class='add'>+      Valid names could be the input or output widgets of audio components,</div><div class='add'>+      power supplies, MicBias of codec and the software switch.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        # Sinks</div><div class='add'>+        - Speakers</div><div class='add'>+        - Headphone Jack</div><div class='add'>+        - IN1P</div><div class='add'>+        - Left Spk</div><div class='add'>+        - Right Spk</div><div class='add'>+</div><div class='add'>+        # Sources</div><div class='add'>+        - Headset Mic</div><div class='add'>+        - HPOL</div><div class='add'>+        - HPOR</div><div class='add'>+        - Left SPO</div><div class='add'>+        - Right SPO</div><div class='add'>+        - Speaker</div><div class='add'>+</div><div class='ctx'>   mediatek,platform:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8192 ASoC platform.</div><div class='hunk'>@@ -27,10 +55,12 @@ properties:</div><div class='ctx'>   mediatek,hdmi-codec:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of HDMI codec.</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>   headset-codec:</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -41,6 +71,7 @@ properties:</div><div class='ctx'>   speaker-codecs:</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -51,33 +82,121 @@ properties:</div><div class='ctx'>     required:</div><div class='ctx'>       - sound-dai</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+patternProperties:</div><div class='add'>+  ".*-dai-link$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    description:</div><div class='add'>+      Container for dai-link level properties and CODEC sub-nodes.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      link-name:</div><div class='add'>+        description: Indicates dai-link name and PCM stream name</div><div class='add'>+        enum:</div><div class='add'>+          - I2S0</div><div class='add'>+          - I2S1</div><div class='add'>+          - I2S2</div><div class='add'>+          - I2S3</div><div class='add'>+          - I2S4</div><div class='add'>+          - I2S5</div><div class='add'>+          - I2S6</div><div class='add'>+          - I2S7</div><div class='add'>+          - I2S8</div><div class='add'>+          - I2S9</div><div class='add'>+          - TDM</div><div class='add'>+</div><div class='add'>+      codec:</div><div class='add'>+        description: Holds subnode which indicates codec dai.</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+      dai-format:</div><div class='add'>+        description: audio format</div><div class='add'>+        enum: [ i2s, right_j, left_j, dsp_a, dsp_b ]</div><div class='add'>+</div><div class='add'>+      mediatek,clk-provider:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        description: Indicates dai-link clock master.</div><div class='add'>+        enum: [ cpu, codec ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - link-name</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - mediatek,platform</div><div class='del'>-  - headset-codec</div><div class='del'>-  - speaker-codecs</div><div class='add'>+</div><div class='add'>+# Disallow legacy properties if xxx-dai-link nodes are specified</div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    patternProperties:</div><div class='add'>+      ".*-dai-link$": false</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    headset-codec: false</div><div class='add'>+    speaker-codecs: false</div><div class='add'>+    mediatek,hdmi-codec: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='ctx'>     sound: mt8192-sound {</div><div class='ctx'>         compatible = "mediatek,mt8192_mt6359_rt1015_rt5682";</div><div class='del'>-        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='del'>-        mediatek,hdmi-codec = &lt;&amp;anx_bridge_dp&gt;;</div><div class='add'>+        model = "mt8192_mt6359_rt1015_rt5682";</div><div class='ctx'>         pinctrl-names = "aud_clk_mosi_off",</div><div class='ctx'>                         "aud_clk_mosi_on";</div><div class='ctx'>         pinctrl-0 = &lt;&amp;aud_clk_mosi_off&gt;;</div><div class='ctx'>         pinctrl-1 = &lt;&amp;aud_clk_mosi_on&gt;;</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+</div><div class='add'>+        audio-routing =</div><div class='add'>+                "Headphone Jack", "HPOL",</div><div class='add'>+                "Headphone Jack", "HPOR",</div><div class='add'>+                "IN1P", "Headset Mic",</div><div class='add'>+                "Speakers", "Speaker";</div><div class='add'>+</div><div class='add'>+        spk-playback-dai-link {</div><div class='add'>+                link-name = "I2S3";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;rt1015p&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hs-playback-dai-link {</div><div class='add'>+                link-name = "I2S8";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;rt5682 0&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='ctx'> </div><div class='del'>-        headset-codec {</div><div class='del'>-            sound-dai = &lt;&amp;rt5682&gt;;</div><div class='add'>+        hs-capture-dai-link {</div><div class='add'>+                link-name = "I2S9";</div><div class='add'>+                dai-format = "i2s";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;rt5682 0&gt;;</div><div class='add'>+                };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        speaker-codecs {</div><div class='del'>-            sound-dai = &lt;&amp;rt1015_l&gt;,</div><div class='del'>-                        &lt;&amp;rt1015_r&gt;;</div><div class='add'>+        displayport-dai-link {</div><div class='add'>+                link-name = "TDM";</div><div class='add'>+                dai-format = "dsp_a";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;anx_bridge_dp&gt;;</div><div class='add'>+                };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml<br/>index c1ddbf672ca3..2af1d8ffbd8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a></div><div class='hunk'>@@ -12,6 +12,9 @@ maintainers:</div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the MT8195 sound card.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: sound-card-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -23,6 +26,33 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     description: User specified audio sound card name</div><div class='ctx'> </div><div class='add'>+  audio-routing:</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source.</div><div class='add'>+      Valid names could be the input or output widgets of audio components,</div><div class='add'>+      power supplies, MicBias of codec and the software switch.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        # Sinks</div><div class='add'>+        - Ext Spk</div><div class='add'>+        - Headphone</div><div class='add'>+        - IN1P</div><div class='add'>+        - Left Spk</div><div class='add'>+        - Right Spk</div><div class='add'>+</div><div class='add'>+        # Sources</div><div class='add'>+        - Headset Mic</div><div class='add'>+        - HPOL</div><div class='add'>+        - HPOR</div><div class='add'>+        - Left BE_OUT</div><div class='add'>+        - Left SPO</div><div class='add'>+        - Right BE_OUT</div><div class='add'>+        - Right SPO</div><div class='add'>+        - Speaker</div><div class='add'>+</div><div class='ctx'>   mediatek,platform:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 ASoC platform.</div><div class='hunk'>@@ -30,10 +60,12 @@ properties:</div><div class='ctx'>   mediatek,dptx-codec:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 Display Port Tx codec node.</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>   mediatek,hdmi-codec:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 HDMI codec node.</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>   mediatek,adsp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='hunk'>@@ -45,20 +77,122 @@ properties:</div><div class='ctx'>       A list of the desired dai-links in the sound card. Each entry is a</div><div class='ctx'>       name defined in the machine driver.</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  ".*-dai-link$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Container for dai-link level properties and CODEC sub-nodes.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      link-name:</div><div class='add'>+        description: Indicates dai-link name and PCM stream name</div><div class='add'>+        enum:</div><div class='add'>+          - DPTX_BE</div><div class='add'>+          - ETDM1_IN_BE</div><div class='add'>+          - ETDM2_IN_BE</div><div class='add'>+          - ETDM1_OUT_BE</div><div class='add'>+          - ETDM2_OUT_BE</div><div class='add'>+          - ETDM3_OUT_BE</div><div class='add'>+          - PCM1_BE</div><div class='add'>+</div><div class='add'>+      codec:</div><div class='add'>+        description: Holds subnode which indicates codec dai.</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+      dai-format:</div><div class='add'>+        description: audio format</div><div class='add'>+        enum: [ i2s, right_j, left_j, dsp_a, dsp_b ]</div><div class='add'>+</div><div class='add'>+      mediatek,clk-provider:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        description: Indicates dai-link clock master.</div><div class='add'>+        enum: [ cpu, codec ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - link-name</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - mediatek,platform</div><div class='ctx'> </div><div class='add'>+# Disallow legacy properties if xxx-dai-link nodes are specified</div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    patternProperties:</div><div class='add'>+      ".*-dai-link$": false</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    mediatek,dptx-codec: false</div><div class='add'>+    mediatek,hdmi-codec: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='ctx'>     sound: mt8195-sound {</div><div class='ctx'>         compatible = "mediatek,mt8195_mt6359_rt1019_rt5682";</div><div class='add'>+        model = "mt8195_r1019_5682";</div><div class='ctx'>         mediatek,platform = &lt;&amp;afe&gt;;</div><div class='ctx'>         pinctrl-names = "default";</div><div class='ctx'>         pinctrl-0 = &lt;&amp;aud_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+        audio-routing =</div><div class='add'>+                "Headphone", "HPOL",</div><div class='add'>+                "Headphone", "HPOR",</div><div class='add'>+                "IN1P", "Headset Mic",</div><div class='add'>+                "Ext Spk", "Speaker";</div><div class='add'>+</div><div class='add'>+        mm-dai-link {</div><div class='add'>+                link-name = "ETDM1_IN_BE";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hs-playback-dai-link {</div><div class='add'>+                link-name = "ETDM1_OUT_BE";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;headset_codec&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hs-capture-dai-link {</div><div class='add'>+                link-name = "ETDM2_IN_BE";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;headset_codec&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        spk-playback-dai-link {</div><div class='add'>+                link-name = "ETDM2_OUT_BE";</div><div class='add'>+                mediatek,clk-provider = "cpu";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;spk_amplifier&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hdmi-dai-link {</div><div class='add'>+                link-name = "ETDM3_OUT_BE";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;hdmi_tx&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        displayport-dai-link {</div><div class='add'>+                link-name = "DPTX_BE";</div><div class='add'>+                codec {</div><div class='add'>+                        sound-dai = &lt;&amp;dp_tx&gt;;</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8325.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8325.yaml<br/>new file mode 100644<br/>index 000000000000..979be0d336da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nuvoton,nau8325.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/nuvoton,nau8325.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nuvoton,nau8325.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NAU8325 audio Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Seven Lee &lt;WTLI@nuvoton.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nuvoton,nau8325</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nuvoton,vref-impedance-ohms:</div><div class='add'>+    description:</div><div class='add'>+      The vref impedance to be used in ohms. Middle of voltage enables</div><div class='add'>+      Tie-Off selection options. Due to the high impedance of the VREF</div><div class='add'>+      pin, it is important to use a low-leakage capacitor.</div><div class='add'>+</div><div class='add'>+    enum: [0, 25000, 125000, 2500]</div><div class='add'>+</div><div class='add'>+  nuvoton,dac-vref-microvolt:</div><div class='add'>+    description:</div><div class='add'>+      The DAC vref to be used in voltage. DAC reference voltage setting. Can</div><div class='add'>+      be used for minor tuning of the output level. Since the VDDA is range</div><div class='add'>+      between 1.62 to 1.98 voltage, the typical value for design is 1.8V. After</div><div class='add'>+      the minor tuning, the final microvolt are as the below.</div><div class='add'>+</div><div class='add'>+    enum: [1800000, 2700000, 2880000, 3060000]</div><div class='add'>+</div><div class='add'>+  nuvoton,alc-enable:</div><div class='add'>+    description:</div><div class='add'>+      Enable digital automatic level control (ALC) function.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  nuvoton,clock-detection-disable:</div><div class='add'>+    description:</div><div class='add'>+      When clock detection is enabled, it will detect whether MCLK</div><div class='add'>+      and FS are within the range. MCLK range is from 2.048MHz to 24.576MHz.</div><div class='add'>+      FS range is from 8kHz to 96kHz. And also needs to detect the ratio</div><div class='add'>+      MCLK_SRC/LRCK of 256, 400 or 500, and needs to detect the BCLK</div><div class='add'>+      to make sure data is present. There needs to be at least 8 BCLK</div><div class='add'>+      cycles per Frame Sync.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  nuvoton,clock-det-data:</div><div class='add'>+    description:</div><div class='add'>+      Request clock detection to require 2048 non-zero samples before enabling</div><div class='add'>+      the audio paths. If set then non-zero samples is required, otherwise it</div><div class='add'>+      doesn't matter.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@21 {</div><div class='add'>+            compatible = "nuvoton,nau8325";</div><div class='add'>+            reg = &lt;0x21&gt;;</div><div class='add'>+            nuvoton,vref-impedance-ohms = &lt;125000&gt;;</div><div class='add'>+            nuvoton,dac-vref-microvolt = &lt;2880000&gt;;</div><div class='add'>+            nuvoton,alc-enable;</div><div class='add'>+            nuvoton,clock-det-data;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml<br/>index 054b53954ac3..9f44168efb3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/nuvoton,nau8821.yaml</a></div><div class='hunk'>@@ -103,6 +103,12 @@ properties:</div><div class='ctx'>         just limited to the left adc for design demand.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  nuvoton,adc-delay-ms:</div><div class='add'>+    description: Delay (in ms) to make input path stable and avoid pop noise.</div><div class='add'>+    minimum: 125</div><div class='add'>+    maximum: 500</div><div class='add'>+    default: 125</div><div class='add'>+</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='hunk'>@@ -136,6 +142,7 @@ examples:</div><div class='ctx'>             nuvoton,jack-eject-debounce = &lt;0&gt;;</div><div class='ctx'>             nuvoton,dmic-clk-threshold = &lt;3072000&gt;;</div><div class='ctx'>             nuvoton,dmic-slew-rate = &lt;0&gt;;</div><div class='add'>+            nuvoton,adc-delay-ms = &lt;125&gt;;</div><div class='ctx'>             #sound-dai-cells = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt<br/>deleted file mode 100644<br/>index eaf00102d92c..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-NVIDIA Tegra 20 AC97 controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "nvidia,tegra20-ac97"</div><div class='del'>-- reg : Should contain AC97 controller registers location and length</div><div class='del'>-- interrupts : Should contain AC97 interrupt</div><div class='del'>-- resets : Must contain an entry for each entry in reset-names.</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names : Must include the following entries:</div><div class='del'>-  - ac97</div><div class='del'>-- dmas : Must contain an entry for each entry in clock-names.</div><div class='del'>-  See ../dma/dma.txt for details.</div><div class='del'>-- dma-names : Must include the following entries:</div><div class='del'>-  - rx</div><div class='del'>-  - tx</div><div class='del'>-- clocks : Must contain one entry, for the module clock.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number</div><div class='del'>-  of the GPIO used to reset the external AC97 codec</div><div class='del'>-- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number</div><div class='del'>-  of the GPIO corresponding with the AC97 DAP _FS line</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-ac97@70002000 {</div><div class='del'>-	compatible = "nvidia,tegra20-ac97";</div><div class='del'>-	reg = &lt;0x70002000 0x200&gt;;</div><div class='del'>-	interrupts = &lt;0 81 0x04&gt;;</div><div class='del'>-	nvidia,codec-reset-gpio = &lt;&amp;gpio 170 0&gt;;</div><div class='del'>-	nvidia,codec-sync-gpio = &lt;&amp;gpio 120 0&gt;;</div><div class='del'>-	clocks = &lt;&amp;tegra_car 3&gt;;</div><div class='del'>-	resets = &lt;&amp;tegra_car 3&gt;;</div><div class='del'>-	reset-names = "ac97";</div><div class='del'>-	dmas = &lt;&amp;apbdma 12&gt;, &lt;&amp;apbdma 12&gt;;</div><div class='del'>-	dma-names = "rx", "tx";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml<br/>new file mode 100644<br/>index 000000000000..4ea0a303d995<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra20 AC97 controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra20-ac97</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: ac97</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  nvidia,codec-reset-gpios:</div><div class='add'>+    description: Reset pin of external AC97 codec</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,codec-sync-gpios:</div><div class='add'>+    description: AC97 DAP _FS line</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - nvidia,codec-reset-gpios</div><div class='add'>+  - nvidia,codec-sync-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    ac97@70002000 {</div><div class='add'>+        compatible = "nvidia,tegra20-ac97";</div><div class='add'>+        reg = &lt;0x70002000 0x200&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 3&gt;;</div><div class='add'>+        reset-names = "ac97";</div><div class='add'>+        interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car 3&gt;;</div><div class='add'>+        dmas = &lt;&amp;apbdma 12&gt;, &lt;&amp;apbdma 12&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        nvidia,codec-reset-gpios = &lt;&amp;gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        nvidia,codec-sync-gpios = &lt;&amp;gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt<br/>deleted file mode 100644<br/>index 6de3a7ee4efb..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-NVIDIA Tegra 20 DAS (Digital Audio Switch) controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "nvidia,tegra20-das"</div><div class='del'>-- reg : Should contain DAS registers location and length</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-das@70000c00 {</div><div class='del'>-	compatible = "nvidia,tegra20-das";</div><div class='del'>-	reg = &lt;0x70000c00 0x80&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.yaml<br/>new file mode 100644<br/>index 000000000000..44c5ce8ee6be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/nvidia,tegra20-das.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra20-das.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra 20 DAS (Digital Audio Switch) controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra20-das</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        das@70000c00 {</div><div class='add'>+            compatible = "nvidia,tegra20-das";</div><div class='add'>+            reg = &lt;0x70000c00 0x80&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt<br/>deleted file mode 100644<br/>index 38caa936f6f8..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-NVIDIA Tegra30 I2S controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : For Tegra30, must contain "nvidia,tegra30-i2s".  For Tegra124,</div><div class='del'>-  must contain "nvidia,tegra124-i2s".  Otherwise, must contain</div><div class='del'>-  "nvidia,&lt;chip&gt;-i2s" plus at least one of the above, where &lt;chip&gt; is</div><div class='del'>-  tegra114 or tegra132.</div><div class='del'>-- reg : Should contain I2S registers location and length</div><div class='del'>-- clocks : Must contain one entry, for the module clock.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- resets : Must contain an entry for each entry in reset-names.</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names : Must include the following entries:</div><div class='del'>-  - i2s</div><div class='del'>-- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)</div><div class='del'>-  first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-i2s@70080300 {</div><div class='del'>-	compatible = "nvidia,tegra30-i2s";</div><div class='del'>-	reg = &lt;0x70080300 0x100&gt;;</div><div class='del'>-	nvidia,ahub-cif-ids = &lt;4 4&gt;;</div><div class='del'>-	clocks = &lt;&amp;tegra_car 11&gt;;</div><div class='del'>-	resets = &lt;&amp;tegra_car 11&gt;;</div><div class='del'>-	reset-names = "i2s";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.yaml<br/>new file mode 100644<br/>index 000000000000..89c3c6414ab1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra30-i2s.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra30 I2S controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra124-i2s</div><div class='add'>+          - nvidia,tegra30-i2s</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra114-i2s</div><div class='add'>+          - const: nvidia,tegra30-i2s</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: i2s</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: i2s</div><div class='add'>+</div><div class='add'>+  nvidia,ahub-cif-ids:</div><div class='add'>+    description: list of AHUB CIF IDs</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: rx (playback)</div><div class='add'>+      - description: tx (capture)</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - nvidia,ahub-cif-ids</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra30-car.h&gt;</div><div class='add'>+</div><div class='add'>+    i2s@70080300 {</div><div class='add'>+        compatible = "nvidia,tegra30-i2s";</div><div class='add'>+        reg = &lt;0x70080300 0x100&gt;;</div><div class='add'>+        nvidia,ahub-cif-ids = &lt;4 4&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA30_CLK_I2S0&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 30&gt;;</div><div class='add'>+        reset-names = "i2s";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml<br/>index 2ab6871e89e5..b2e15ebbd1bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a></div><div class='hunk'>@@ -29,6 +29,8 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - qcom,apq8016-sbc-sndcard</div><div class='ctx'>           - qcom,msm8916-qdsp6-sndcard</div><div class='add'>+          - qcom,qcm6490-idp-sndcard</div><div class='add'>+          - qcom,qcs6490-rb3gen2-sndcard</div><div class='ctx'>           - qcom,qrb5165-rb5-sndcard</div><div class='ctx'>           - qcom,sc7180-qdsp6-sndcard</div><div class='ctx'>           - qcom,sc8280xp-sndcard</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml<br/>index 0d7a6b576d88..07ec6247d9de 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/renesas,rsnd.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/renesas,rsnd.yaml</a></div><div class='hunk'>@@ -48,13 +48,16 @@ properties:</div><div class='ctx'>           - const: renesas,rcar_sound-gen3</div><div class='ctx'>       # for Gen4 SoC</div><div class='ctx'>       - items:</div><div class='del'>-          - const: renesas,rcar_sound-r8a779g0  # R-Car V4H</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,rcar_sound-r8a779g0  # R-Car V4H</div><div class='add'>+              - renesas,rcar_sound-r8a779h0  # R-Car V4M</div><div class='ctx'>           - const: renesas,rcar_sound-gen4</div><div class='ctx'>       # for Generic</div><div class='ctx'>       - enum:</div><div class='ctx'>           - renesas,rcar_sound-gen1</div><div class='ctx'>           - renesas,rcar_sound-gen2</div><div class='ctx'>           - renesas,rcar_sound-gen3</div><div class='add'>+          - renesas,rcar_sound-gen4</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml<br/>new file mode 100644<br/>index 000000000000..ecf3d7d968c8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/rockchip,rk3308-codec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3308 Internal Codec</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This is the audio codec embedded in the Rockchip RK3308</div><div class='add'>+  SoC. It has 8 24-bit ADCs and 2 24-bit DACs. The maximum supported</div><div class='add'>+  sampling rate is 192 kHz.</div><div class='add'>+</div><div class='add'>+  It is connected internally to one out of a selection of the internal I2S</div><div class='add'>+  controllers.</div><div class='add'>+</div><div class='add'>+  The RK3308 audio codec has 8 independent capture channels, but some</div><div class='add'>+  features work on stereo pairs called groups:</div><div class='add'>+    * grp 0 -- MIC1 / MIC2</div><div class='add'>+    * grp 1 -- MIC3 / MIC4</div><div class='add'>+    * grp 2 -- MIC5 / MIC6</div><div class='add'>+    * grp 3 -- MIC7 / MIC8</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rockchip,rk3308-codec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the General Register Files (GRF)</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock for TX</div><div class='add'>+      - description: clock for RX</div><div class='add'>+      - description: AHB clock driving the interface</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk_tx</div><div class='add'>+      - const: mclk_rx</div><div class='add'>+      - const: hclk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: codec</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  rockchip,micbias-avdd-percent:</div><div class='add'>+    description: |</div><div class='add'>+      Voltage setting for the MICBIAS pins expressed as a percentage of</div><div class='add'>+      AVDD.</div><div class='add'>+</div><div class='add'>+      E.g. if rockchip,micbias-avdd-percent = 85 and AVDD = 3v3, then the</div><div class='add'>+      MIC BIAS voltage will be 3.3 V * 85% = 2.805 V.</div><div class='add'>+</div><div class='add'>+    enum: [ 50, 55, 60, 65, 70, 75, 80, 85 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - rockchip,grf</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3308-cru.h&gt;</div><div class='add'>+</div><div class='add'>+    audio_codec: audio-codec@ff560000 {</div><div class='add'>+        compatible = "rockchip,rk3308-codec";</div><div class='add'>+        reg = &lt;0xff560000 0x10000&gt;;</div><div class='add'>+        rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+        clock-names = "mclk_tx", "mclk_rx", "hclk";</div><div class='add'>+        clocks = &lt;&amp;cru SCLK_I2S2_8CH_TX_OUT&gt;,</div><div class='add'>+                 &lt;&amp;cru SCLK_I2S2_8CH_RX_OUT&gt;,</div><div class='add'>+                 &lt;&amp;cru PCLK_ACODEC&gt;;</div><div class='add'>+        reset-names = "codec";</div><div class='add'>+        resets = &lt;&amp;cru SRST_ACODEC_P&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rt5645.txt b/Documentation/devicetree/bindings/sound/rt5645.txt<br/>index 41a62fd2ae1f..c1fa379f5f3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/rt5645.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/rt5645.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/rt5645.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/rt5645.txt</a></div><div class='hunk'>@@ -20,6 +20,11 @@ Optional properties:</div><div class='ctx'>   a GPIO spec for the external headphone detect pin. If jd-mode = 0,</div><div class='ctx'>   we will get the JD status by getting the value of hp-detect-gpios.</div><div class='ctx'> </div><div class='add'>+- cbj-sleeve-gpios:</div><div class='add'>+  a GPIO spec to control the external combo jack circuit to tie the sleeve/ring2</div><div class='add'>+  contacts to the ground or floating. It could avoid some electric noise from the</div><div class='add'>+  active speaker jacks.</div><div class='add'>+</div><div class='ctx'> - realtek,in2-differential</div><div class='ctx'>   Boolean. Indicate MIC2 input are differential, rather than single-ended.</div><div class='ctx'> </div><div class='hunk'>@@ -68,6 +73,7 @@ codec: rt5650@1a {</div><div class='ctx'> 	compatible = "realtek,rt5650";</div><div class='ctx'> 	reg = &lt;0x1a&gt;;</div><div class='ctx'> 	hp-detect-gpios = &lt;&amp;gpio 19 0&gt;;</div><div class='add'>+	cbj-sleeve-gpios = &lt;&amp;gpio 20 0&gt;;</div><div class='ctx'> 	interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='ctx'> 	interrupts = &lt;7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	realtek,dmic-en = "true";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml b/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml<br/>index b9111d375b93..8978f6bd63e5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml</a></div><div class='hunk'>@@ -65,6 +65,10 @@ properties:</div><div class='ctx'>     $ref: audio-graph-port.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml<br/>index 59df8a832310..b46a4778807d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/st,stm32-sai.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/st,stm32-sai.yaml</a></div><div class='hunk'>@@ -48,6 +48,10 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml b/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml<br/>index bc48151b9adb..3dedc81ec12f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml</a></div><div class='hunk'>@@ -50,6 +50,10 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,pcm1681.txt b/Documentation/devicetree/bindings/sound/ti,pcm1681.txt<br/>deleted file mode 100644<br/>index 4df17185ab80..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/ti,pcm1681.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/ti,pcm1681.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-Texas Instruments PCM1681 8-channel PWM Processor</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - compatible:		Should contain "ti,pcm1681".</div><div class='del'>- - reg:			The i2c address. Should contain &lt;0x4c&gt;.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-	i2c_bus {</div><div class='del'>-		pcm1681@4c {</div><div class='del'>-			compatible = "ti,pcm1681";</div><div class='del'>-			reg = &lt;0x4c&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,pcm1681.yaml b/Documentation/devicetree/bindings/sound/ti,pcm1681.yaml<br/>new file mode 100644<br/>index 000000000000..5aa00617291c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/ti,pcm1681.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/ti,pcm1681.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/ti,pcm1681.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments PCM1681 8-channel PWM Processor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shenghao Ding &lt;shenghao-ding@ti.com&gt;</div><div class='add'>+  - Kevin Lu &lt;kevin-lu@ti.com&gt;</div><div class='add'>+  - Baojun Xu &lt;baojun.xu@ti.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,pcm1681</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pcm1681: audio-codec@4c {</div><div class='add'>+            compatible = "ti,pcm1681";</div><div class='add'>+            reg = &lt;0x4c&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml b/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml<br/>new file mode 100644<br/>index 000000000000..dd5b08e3d7a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/ti,pcm6240.yaml</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 - 2024 Texas Instruments Incorporated</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/ti,pcm6240.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments PCM6240 Family Audio ADC/DAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shenghao Ding &lt;shenghao-ding@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The PCM6240 Family is a big family of Audio ADC/DAC for</div><div class='add'>+  different Specifications, range from Personal Electric</div><div class='add'>+  to Automotive Electric, even some professional fields.</div><div class='add'>+</div><div class='add'>+  Specifications about the audio chip can be found at:</div><div class='add'>+    https://www.ti.com/lit/gpn/tlv320adc3120</div><div class='add'>+    https://www.ti.com/lit/gpn/tlv320adc5120</div><div class='add'>+    https://www.ti.com/lit/gpn/tlv320adc6120</div><div class='add'>+    https://www.ti.com/lit/gpn/dix4192</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm1690</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm3120-q1</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm3140-q1</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm5120-q1</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm6120-q1</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm6260-q1</div><div class='add'>+    https://www.ti.com/lit/gpn/pcm9211</div><div class='add'>+    https://www.ti.com/lit/gpn/pcmd3140</div><div class='add'>+    https://www.ti.com/lit/gpn/pcmd3180</div><div class='add'>+    https://www.ti.com/lit/gpn/taa5212</div><div class='add'>+    https://www.ti.com/lit/gpn/tad5212</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    description: |</div><div class='add'>+      ti,adc3120: Stereo-channel, 768-kHz, Burr-Brown™ audio analog-to-</div><div class='add'>+      digital converter (ADC) with 106-dB SNR.</div><div class='add'>+</div><div class='add'>+      ti,adc5120: 2-Channel, 768-kHz, Burr-Brown™ Audio ADC with 120-dB SNR.</div><div class='add'>+</div><div class='add'>+      ti,adc6120: Stereo-channel, 768-kHz, Burr-Brown™ audio analog-to-</div><div class='add'>+      digital converter (ADC) with 123-dB SNR.</div><div class='add'>+</div><div class='add'>+      ti,dix4192: 216-kHz digital audio converter with Quad-Channel In</div><div class='add'>+      and One-Channel Out.</div><div class='add'>+</div><div class='add'>+      ti,pcm1690: Automotive Catalog 113dB SNR 8-Channel Audio DAC with</div><div class='add'>+      Differential Outputs.</div><div class='add'>+</div><div class='add'>+      ti,pcm3120: Automotive, stereo, 106-dB SNR, 768-kHz, low-power</div><div class='add'>+      software-controlled audio ADC.</div><div class='add'>+</div><div class='add'>+      ti,pcm3140: Automotive, Quad-Channel, 768-kHz, Burr-Brown™ Audio ADC</div><div class='add'>+      with 106-dB SNR.</div><div class='add'>+</div><div class='add'>+      ti,pcm5120: Automotive, stereo, 120-dB SNR, 768-kHz, low-power</div><div class='add'>+      software-controlled audio ADC.</div><div class='add'>+</div><div class='add'>+      ti,pcm5140: Automotive, Quad-Channel, 768-kHz, Burr-Brown™ Audio ADC</div><div class='add'>+      with 120-dB SNR.</div><div class='add'>+</div><div class='add'>+      ti,pcm6120: Automotive, stereo, 123-dB SNR, 768-kHz, low-power</div><div class='add'>+      software-controlled audio ADC.</div><div class='add'>+</div><div class='add'>+      ti,pcm6140: Automotive, Quad-Channel, 768-kHz, Burr-Brown™ Audio ADC</div><div class='add'>+      with 123-dB SNR.</div><div class='add'>+</div><div class='add'>+      ti,pcm6240: Automotive 4-ch audio ADC with integrated programmable mic</div><div class='add'>+      bias, boost and input diagnostics.</div><div class='add'>+</div><div class='add'>+      ti,pcm6260: Automotive 6-ch audio ADC with integrated programmable mic</div><div class='add'>+      bias, boost and input diagnostics.</div><div class='add'>+</div><div class='add'>+      ti,pcm9211: 216-kHz digital audio converter With Stereo ADC and</div><div class='add'>+      Routing.</div><div class='add'>+</div><div class='add'>+      ti,pcmd3140: Four-channel PDM-input to TDM or I2S output converter.</div><div class='add'>+</div><div class='add'>+      ti,pcmd3180: Eight-channel pulse-density-modulation input to TDM or</div><div class='add'>+      I2S output converter.</div><div class='add'>+</div><div class='add'>+      ti,taa5212: Low-power high-performance stereo audio ADC with 118-dB</div><div class='add'>+      dynamic range.</div><div class='add'>+</div><div class='add'>+      ti,tad5212: Low-power stereo audio DAC with 120-dB dynamic range.</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,adc3120</div><div class='add'>+              - ti,adc5120</div><div class='add'>+              - ti,pcm3120</div><div class='add'>+              - ti,pcm5120</div><div class='add'>+              - ti,pcm6120</div><div class='add'>+          - const: ti,adc6120</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,pcmd512x</div><div class='add'>+              - ti,pcm9211</div><div class='add'>+              - ti,taa5212</div><div class='add'>+              - ti,tad5212</div><div class='add'>+          - const: ti,adc6120</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,pcm3140</div><div class='add'>+              - ti,pcm5140</div><div class='add'>+              - ti,dix4192</div><div class='add'>+              - ti,pcm6140</div><div class='add'>+              - ti,pcm6260</div><div class='add'>+          - const: ti,pcm6240</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,pcmd3140</div><div class='add'>+              - ti,pcmd3180</div><div class='add'>+              - ti,pcm1690</div><div class='add'>+              - ti,taa5412</div><div class='add'>+              - ti,tad5412</div><div class='add'>+          - const: ti,pcm6240</div><div class='add'>+      - enum:</div><div class='add'>+          - ti,adc6120</div><div class='add'>+          - ti,pcm6240</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      I2C address, in multiple pcmdevices case, all the i2c address</div><div class='add'>+      aggregate as one Audio Device to support multiple audio slots.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Invalid only for ti,pcm1690 because of no INT pin.</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,pcm1690</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+   #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+   i2c {</div><div class='add'>+     /* example for two devices with interrupt support */</div><div class='add'>+     #address-cells = &lt;1&gt;;</div><div class='add'>+     #size-cells = &lt;0&gt;;</div><div class='add'>+     pcm6240: audio-codec@48 {</div><div class='add'>+       compatible = "ti,pcm6240";</div><div class='add'>+       reg = &lt;0x48&gt;, /* primary-device */</div><div class='add'>+             &lt;0x4b&gt;; /* secondary-device */</div><div class='add'>+       #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+       reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+       interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+       interrupts = &lt;15&gt;;</div><div class='add'>+     };</div><div class='add'>+   };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml<br/>new file mode 100644<br/>index 000000000000..7bbc96ee81be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/wlf,wm8776.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8776.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8776 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8776</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8776";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8974.txt b/Documentation/devicetree/bindings/sound/wlf,wm8974.txt<br/>deleted file mode 100644<br/>index 01d3a7c83419..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8974.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/wlf,wm8974.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-WM8974 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: "wlf,wm8974"</div><div class='del'>-  - reg: the I2C address or SPI chip select number of the device</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-codec: wm8974@1a {</div><div class='del'>-	compatible = "wlf,wm8974";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml<br/>new file mode 100644<br/>index 000000000000..d27300207c67<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/sound/wlf,wm8974.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8974.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8974 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8974</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8974";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8776.txt b/Documentation/devicetree/bindings/sound/wm8776.txt<br/>deleted file mode 100644<br/>index 01173369c3ed..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/wm8776.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/sound/wm8776.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-WM8776 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8776"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8776: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8776";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml b/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml<br/>new file mode 100644<br/>index 000000000000..b820c5613dcc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/airoha,en7581-snand.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SPI-NAND flash controller for Airoha ARM SoCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: airoha,en7581-snand</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: spi base address</div><div class='add'>+      - description: nfi2spi base address</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: spi</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/en7523-clk.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      spi@1fa10000 {</div><div class='add'>+        compatible = "airoha,en7581-snand";</div><div class='add'>+        reg = &lt;0x0 0x1fa10000 0x0 0x140&gt;,</div><div class='add'>+              &lt;0x0 0x1fa11000 0x0 0x160&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;scuclk EN7523_CLK_SPI&gt;;</div><div class='add'>+        clock-names = "spi";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+          compatible = "spi-nand";</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+          spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml<br/>index cca81f89e252..d48ecd6cd5ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml</a></div><div class='hunk'>@@ -68,12 +68,13 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - amd,pensando-elba-qspi</div><div class='del'>-              - ti,k2g-qspi</div><div class='del'>-              - ti,am654-ospi</div><div class='ctx'>               - intel,lgm-qspi</div><div class='del'>-              - xlnx,versal-ospi-1.0</div><div class='ctx'>               - intel,socfpga-qspi</div><div class='add'>+              - mobileye,eyeq5-ospi</div><div class='ctx'>               - starfive,jh7110-qspi</div><div class='add'>+              - ti,am654-ospi</div><div class='add'>+              - ti,k2g-qspi</div><div class='add'>+              - xlnx,versal-ospi-1.0</div><div class='ctx'>           - const: cdns,qspi-nor</div><div class='ctx'>       - const: cdns,qspi-nor</div><div class='ctx'> </div><div class='hunk'>@@ -145,7 +146,6 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - clocks</div><div class='del'>-  - cdns,fifo-depth</div><div class='ctx'>   - cdns,fifo-width</div><div class='ctx'>   - cdns,trigger-address</div><div class='ctx'>   - '#address-cells'</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml b/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml<br/>new file mode 100644<br/>index 000000000000..61caa1d86188<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/marvell,armada-3700-spi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Armada 3700 SPI Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The SPI controller on Marvell Armada 3700 SoC.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kousik Sanagavarapu &lt;five231003@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,armada-3700-spi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  num-cs:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    spi0: spi@10600 {</div><div class='add'>+        compatible = "marvell,armada-3700-spi";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x10600 0x5d&gt;;</div><div class='add'>+        clocks = &lt;&amp;nb_perih_clk 7&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        num-cs = &lt;4&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml<br/>index 00acbbb0f65d..49649fc3f95a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a></div><div class='hunk'>@@ -54,6 +54,7 @@ properties:</div><div class='ctx'>               - renesas,msiof-r8a779a0      # R-Car V3U</div><div class='ctx'>               - renesas,msiof-r8a779f0      # R-Car S4-8</div><div class='ctx'>               - renesas,msiof-r8a779g0      # R-Car V4H</div><div class='add'>+              - renesas,msiof-r8a779h0      # R-Car V4M</div><div class='ctx'>           - const: renesas,rcar-gen4-msiof  # generic R-Car Gen4</div><div class='ctx'>                                             # compatible device</div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-armada-3700.txt b/Documentation/devicetree/bindings/spi/spi-armada-3700.txt<br/>deleted file mode 100644<br/>index 1564aa8c02cd..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/spi-armada-3700.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/spi-armada-3700.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* Marvell Armada 3700 SPI Controller</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "marvell,armada-3700-spi"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-       region.</div><div class='del'>-- interrupts: The interrupt number. The interrupt specifier format depends on</div><div class='del'>-	      the interrupt controller and of its driver.</div><div class='del'>-- clocks: Must contain the clock source, usually from the North Bridge clocks.</div><div class='del'>-- num-cs: The number of chip selects that is supported by this SPI Controller</div><div class='del'>-- #address-cells: should be 1.</div><div class='del'>-- #size-cells: should be 0.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spi0: spi@10600 {</div><div class='del'>-		compatible = "marvell,armada-3700-spi";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x10600 0x5d&gt;;</div><div class='del'>-		clocks = &lt;&amp;nb_perih_clk 7&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		num-cs = &lt;4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml<br/>index 8bba965a9ae6..3f1a27efff80 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml</a></div><div class='hunk'>@@ -46,6 +46,10 @@ properties:</div><div class='ctx'>       - const: tx</div><div class='ctx'>       - const: rx</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml<br/>index 4bd9aeb81208..a55c8633c32c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/st,stm32-spi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/st,stm32-spi.yaml</a></div><div class='hunk'>@@ -52,6 +52,10 @@ properties:</div><div class='ctx'>       - const: rx</div><div class='ctx'>       - const: tx</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/ti,qspi.yaml b/Documentation/devicetree/bindings/spi/ti,qspi.yaml<br/>new file mode 100644<br/>index 000000000000..626a915b3d77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/ti,qspi.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/spi/ti,qspi.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/ti,qspi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI QSPI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kousik Sanagavarapu &lt;five231003@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,am4372-qspi</div><div class='add'>+      - ti,dra7xxx-qspi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: base registers</div><div class='add'>+      - description: mapped memory</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qspi_base</div><div class='add'>+      - const: qspi_mmap</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fck</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  num-cs:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 4</div><div class='add'>+    default: 1</div><div class='add'>+</div><div class='add'>+  ti,hwmods:</div><div class='add'>+    description:</div><div class='add'>+      Name of the hwmod associated to the QSPI.  This is for legacy</div><div class='add'>+      platforms only.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  syscon-chipselects:</div><div class='add'>+    description:</div><div class='add'>+      Handle to system control region containing QSPI chipselect register</div><div class='add'>+      and offset of that register.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to system control register</div><div class='add'>+          - description: register offset</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    description: Maximum SPI clocking speed of the controller in Hz.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/dra7.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@4b300000 {</div><div class='add'>+        compatible = "ti,dra7xxx-qspi";</div><div class='add'>+        reg = &lt;0x4b300000 0x100&gt;,</div><div class='add'>+              &lt;0x5c000000 0x4000000&gt;;</div><div class='add'>+        reg-names = "qspi_base", "qspi_mmap";</div><div class='add'>+        syscon-chipselects = &lt;&amp;scm_conf 0x558&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25&gt;;</div><div class='add'>+        clock-names = "fck";</div><div class='add'>+        num-cs = &lt;4&gt;;</div><div class='add'>+        spi-max-frequency = &lt;48000000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt<br/>deleted file mode 100644<br/>index 47b184bce414..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/ti_qspi.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/spi/ti_qspi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-TI QSPI controller.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi".</div><div class='del'>-- reg: Should contain QSPI registers location and length.</div><div class='del'>-- reg-names: Should contain the resource reg names.</div><div class='del'>-	- qspi_base: Qspi configuration register Address space</div><div class='del'>-	- qspi_mmap: Memory mapped Address space</div><div class='del'>-	- (optional) qspi_ctrlmod: Control module Address space</div><div class='del'>-- interrupts: should contain the qspi interrupt number.</div><div class='del'>-- #address-cells, #size-cells : Must be present if the device has sub-nodes</div><div class='del'>-- ti,hwmods: Name of the hwmod associated to the QSPI</div><div class='del'>-</div><div class='del'>-Recommended properties:</div><div class='del'>-- spi-max-frequency: Definition as per</div><div class='del'>-                     Documentation/devicetree/bindings/spi/spi-bus.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- syscon-chipselects: Handle to system control region contains QSPI</div><div class='del'>-		      chipselect register and offset of that register.</div><div class='del'>-</div><div class='del'>-NOTE: TI QSPI controller requires different pinmux and IODelay</div><div class='del'>-parameters for Mode-0 and Mode-3 operations, which needs to be set up by</div><div class='del'>-the bootloader (U-Boot). Default configuration only supports Mode-0</div><div class='del'>-operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be</div><div class='del'>-specified in the slave nodes of TI QSPI controller without appropriate</div><div class='del'>-modification to bootloader.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-For am4372:</div><div class='del'>-qspi: qspi@47900000 {</div><div class='del'>-	compatible = "ti,am4372-qspi";</div><div class='del'>-	reg = &lt;0x47900000 0x100&gt;, &lt;0x30000000 0x4000000&gt;;</div><div class='del'>-	reg-names = "qspi_base", "qspi_mmap";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	spi-max-frequency = &lt;25000000&gt;;</div><div class='del'>-	ti,hwmods = "qspi";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-For dra7xx:</div><div class='del'>-qspi: qspi@4b300000 {</div><div class='del'>-	compatible = "ti,dra7xxx-qspi";</div><div class='del'>-	reg = &lt;0x4b300000 0x100&gt;,</div><div class='del'>-	      &lt;0x5c000000 0x4000000&gt;,</div><div class='del'>-	reg-names = "qspi_base", "qspi_mmap";</div><div class='del'>-	syscon-chipselects = &lt;&amp;scm_conf 0x558&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	spi-max-frequency = &lt;48000000&gt;;</div><div class='del'>-	ti,hwmods = "qspi";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml<br/>index 20f8f9b3b971..01fccdfc4178 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml</a></div><div class='hunk'>@@ -13,11 +13,13 @@ description: Binding for Amlogic Thermal</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - amlogic,g12a-cpu-thermal</div><div class='del'>-          - amlogic,g12a-ddr-thermal</div><div class='del'>-      - const: amlogic,g12a-thermal</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,g12a-cpu-thermal</div><div class='add'>+              - amlogic,g12a-ddr-thermal</div><div class='add'>+          - const: amlogic,g12a-thermal</div><div class='add'>+      - const: amlogic,a1-cpu-thermal</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml b/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml<br/>index b634f57cd011..ca81c8afba79 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml</a></div><div class='hunk'>@@ -18,13 +18,15 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - loongson,ls2k1000-thermal</div><div class='add'>+          - loongson,ls2k2000-thermal</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - loongson,ls2k2000-thermal</div><div class='add'>+              - loongson,ls2k0500-thermal</div><div class='ctx'>           - const: loongson,ls2k1000-thermal</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -38,6 +40,24 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - '#thermal-sensor-cells'</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - loongson,ls2k2000-thermal</div><div class='add'>+</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    reg:</div><div class='add'>+      minItems: 2</div><div class='add'>+      maxItems: 2</div><div class='add'>+</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    reg:</div><div class='add'>+      maxItems: 1</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml<br/>index e6665af52ee6..331cf4e662e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml</a></div><div class='hunk'>@@ -19,6 +19,9 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mediatek,mt7988-lvts-ap</div><div class='add'>+      - mediatek,mt8186-lvts</div><div class='add'>+      - mediatek,mt8188-lvts-ap</div><div class='add'>+      - mediatek,mt8188-lvts-mcu</div><div class='ctx'>       - mediatek,mt8192-lvts-ap</div><div class='ctx'>       - mediatek,mt8192-lvts-mcu</div><div class='ctx'>       - mediatek,mt8195-lvts-ap</div><div class='hunk'>@@ -60,6 +63,8 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - mediatek,mt8188-lvts-ap</div><div class='add'>+              - mediatek,mt8188-lvts-mcu</div><div class='ctx'>               - mediatek,mt8192-lvts-ap</div><div class='ctx'>               - mediatek,mt8192-lvts-mcu</div><div class='ctx'>     then:</div><div class='hunk'>@@ -75,6 +80,7 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - mediatek,mt8186-lvts</div><div class='ctx'>               - mediatek,mt8195-lvts-ap</div><div class='ctx'>               - mediatek,mt8195-lvts-mcu</div><div class='ctx'>     then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml<br/>index 5ff72ce5c887..1175bb358382 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/qcom-lmh.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/thermal/qcom-lmh.yaml</a></div><div class='hunk'>@@ -17,10 +17,14 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sc8180x-lmh</div><div class='del'>-      - qcom,sdm845-lmh</div><div class='del'>-      - qcom,sm8150-lmh</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sc8180x-lmh</div><div class='add'>+          - qcom,sdm845-lmh</div><div class='add'>+          - qcom,sm8150-lmh</div><div class='add'>+      - items:</div><div class='add'>+          - const: qcom,qcm2290-lmh</div><div class='add'>+          - const: qcom,sm8150-lmh</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/st,stih407-thermal.yaml b/Documentation/devicetree/bindings/thermal/st,stih407-thermal.yaml<br/>new file mode 100644<br/>index 000000000000..9f6fc5c95c55<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/st,stih407-thermal.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/thermal/st,stih407-thermal.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/st,stih407-thermal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics STi digital thermal sensor (DTS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: thermal-sensor.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stih407-thermal</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: thermal</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      For thermal sensors for which no interrupt has been defined, a polling</div><div class='add'>+      delay of 1000ms will be used to read the temperature from device.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    temperature-sensor@91a0000 {</div><div class='add'>+        compatible = "st,stih407-thermal";</div><div class='add'>+        reg = &lt;0x91a0000 0x28&gt;;</div><div class='add'>+        clock-names = "thermal";</div><div class='add'>+        clocks = &lt;&amp;CLK_SYSIN&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 205 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/st-thermal.txt b/Documentation/devicetree/bindings/thermal/st-thermal.txt<br/>deleted file mode 100644<br/>index a2f939137e35..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/st-thermal.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/thermal/st-thermal.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-Binding for Thermal Sensor driver for STMicroelectronics STi series of SoCs.</div><div class='del'>-</div><div class='del'>-Required parameters:</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-compatible : 	Should be "st,stih407-thermal"</div><div class='del'>-</div><div class='del'>-clock-names : 	Should be "thermal".</div><div class='del'>-		  See: Documentation/devicetree/bindings/resource-names.txt</div><div class='del'>-clocks : 	Phandle of the clock used by the thermal sensor.</div><div class='del'>-		  See: Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-</div><div class='del'>-Optional parameters:</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-reg : 		For non-sysconf based sensors, this should be the physical base</div><div class='del'>-		address and length of the sensor's registers.</div><div class='del'>-interrupts :	Standard way to define interrupt number.</div><div class='del'>-		  NB: For thermal sensor's for which no interrupt has been</div><div class='del'>-		  defined, a polling delay of 1000ms will be used to read the</div><div class='del'>-		  temperature from device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	temp0@91a0000 {</div><div class='del'>-		compatible = "st,stih407-thermal";</div><div class='del'>-		reg = &lt;0x91a0000 0x28&gt;;</div><div class='del'>-		clock-names = "thermal";</div><div class='del'>-		clocks = &lt;&amp;CLK_SYSIN&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 205 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		st,passive_cooling_temp = &lt;110&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml<br/>index 8b06a681764e..e8c642166462 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>           - renesas,r9a07g043-ostm # RZ/G2UL and RZ/Five</div><div class='ctx'>           - renesas,r9a07g044-ostm # RZ/G2{L,LC}</div><div class='ctx'>           - renesas,r9a07g054-ostm # RZ/V2L</div><div class='add'>+          - renesas,r9a09g057-ostm # RZ/V2H(P)</div><div class='ctx'>       - const: renesas,ostm        # Generic</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -58,6 +59,7 @@ if:</div><div class='ctx'>           - renesas,r9a07g043-ostm</div><div class='ctx'>           - renesas,r9a07g044-ostm</div><div class='ctx'>           - renesas,r9a07g054-ostm</div><div class='add'>+          - renesas,r9a09g057-ostm</div><div class='ctx'> then:</div><div class='ctx'>   required:</div><div class='ctx'>     - resets</div><div class='head'>diff --git a/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml b/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml<br/>index 3ab4434b7352..af7720dc4a12 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml</a></div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - infineon,slb9673</div><div class='ctx'>               - nuvoton,npct75x</div><div class='add'>+              - st,st33ktpm2xi2c</div><div class='ctx'>           - const: tcg,tpm-tis-i2c</div><div class='ctx'> </div><div class='ctx'>       - description: TPM 1.2 and 2.0 chips with vendor-specific I²C interface</div><div class='head'>diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml<br/>index e07be7bf8395..025d50454f88 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/trivial-devices.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/trivial-devices.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/trivial-devices.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/trivial-devices.yaml</a></div><div class='hunk'>@@ -126,6 +126,8 @@ properties:</div><div class='ctx'>           - ibm,cffps1</div><div class='ctx'>             # IBM Common Form Factor Power Supply Versions 2</div><div class='ctx'>           - ibm,cffps2</div><div class='add'>+            # IBM On-Chip Controller hwmon device</div><div class='add'>+          - ibm,p8-occ-hwmon</div><div class='ctx'>             # Infineon barometric pressure and temperature sensor</div><div class='ctx'>           - infineon,dps310</div><div class='ctx'>             # Infineon IR36021 digital POL buck controller</div><div class='hunk'>@@ -134,6 +136,8 @@ properties:</div><div class='ctx'>           - infineon,irps5401</div><div class='ctx'>             # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor</div><div class='ctx'>           - infineon,tlv493d-a1b6</div><div class='add'>+            # Infineon Hot-swap controller xdp710</div><div class='add'>+          - infineon,xdp710</div><div class='ctx'>             # Infineon Multi-phase Digital VR Controller xdpe11280</div><div class='ctx'>           - infineon,xdpe11280</div><div class='ctx'>             # Infineon Multi-phase Digital VR Controller xdpe12254</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml<br/>index b2b509b3944d..720879820f66 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml</a></div><div class='hunk'>@@ -12,12 +12,10 @@ maintainers:</div><div class='ctx'> description: |</div><div class='ctx'>   Each Samsung UFS host controller instance should have its own node.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: ufs-common.yaml</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - google,gs101-ufs</div><div class='ctx'>       - samsung,exynos7-ufs</div><div class='ctx'>       - samsung,exynosautov9-ufs</div><div class='ctx'>       - samsung,exynosautov9-ufs-vh</div><div class='hunk'>@@ -38,14 +36,24 @@ properties:</div><div class='ctx'>       - const: ufsp</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - description: ufs link core clock</div><div class='ctx'>       - description: unipro main clock</div><div class='add'>+      - description: fmp clock</div><div class='add'>+      - description: ufs aclk clock</div><div class='add'>+      - description: ufs pclk clock</div><div class='add'>+      - description: sysreg clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - const: core_clk</div><div class='ctx'>       - const: sclk_unipro_main</div><div class='add'>+      - const: fmp</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: sysreg</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -72,6 +80,30 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ufs-common.yaml</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: google,gs101-ufs</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml<br/>index 0a5c98ea711d..88c077673c8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/dwc2.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/usb/dwc2.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/dwc2.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/usb/dwc2.yaml</a></div><div class='hunk'>@@ -172,6 +172,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   tpl-support: true</div><div class='ctx'> </div><div class='add'>+  access-controllers:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='ctx'> dependencies:</div><div class='ctx'>   port: [ usb-role-switch ]</div><div class='ctx'>   role-switch-default-mode: [ usb-role-switch ]</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml<br/>index 2d3589d284b2..0a6e7ac1b37e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml</a></div><div class='hunk'>@@ -33,6 +33,7 @@ properties:</div><div class='ctx'>               - fsl,imx7ulp-usbmisc</div><div class='ctx'>               - fsl,imx8mm-usbmisc</div><div class='ctx'>               - fsl,imx8mn-usbmisc</div><div class='add'>+              - fsl,imx8ulp-usbmisc</div><div class='ctx'>           - const: fsl,imx7d-usbmisc</div><div class='ctx'>           - const: fsl,imx6q-usbmisc</div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml<br/>index b97d298b3eb6..fbf47f0bacf1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/vendor-prefixes.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/vendor-prefixes.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a></div><div class='hunk'>@@ -151,6 +151,8 @@ patternProperties:</div><div class='ctx'>     description: ARM Ltd.</div><div class='ctx'>   "^armadeus,.*":</div><div class='ctx'>     description: ARMadeus Systems SARL</div><div class='add'>+  "^armsom,.*":</div><div class='add'>+    description: ArmSoM Technology Co., Ltd.</div><div class='ctx'>   "^arrow,.*":</div><div class='ctx'>     description: Arrow Electronics</div><div class='ctx'>   "^artesyn,.*":</div><div class='hunk'>@@ -256,6 +258,8 @@ patternProperties:</div><div class='ctx'>     description: Catalyst Semiconductor, Inc.</div><div class='ctx'>   "^cavium,.*":</div><div class='ctx'>     description: Cavium, Inc.</div><div class='add'>+  "^cct,.*":</div><div class='add'>+    description: Crystal Clear Technology Sdn. Bhd.</div><div class='ctx'>   "^cdns,.*":</div><div class='ctx'>     description: Cadence Design Systems Inc.</div><div class='ctx'>   "^cdtech,.*":</div><div class='hunk'>@@ -438,6 +442,8 @@ patternProperties:</div><div class='ctx'>     description: Dongguan EmbedFire Electronic Technology Co., Ltd.</div><div class='ctx'>   "^embest,.*":</div><div class='ctx'>     description: Shenzhen Embest Technology Co., Ltd.</div><div class='add'>+  "^emcraft,.*":</div><div class='add'>+    description: Emcraft Systems</div><div class='ctx'>   "^emlid,.*":</div><div class='ctx'>     description: Emlid, Ltd.</div><div class='ctx'>   "^emmicro,.*":</div><div class='hunk'>@@ -529,6 +535,8 @@ patternProperties:</div><div class='ctx'>     description: FX Technology Ltd.</div><div class='ctx'>   "^galaxycore,.*":</div><div class='ctx'>     description: GalaxyCore Inc.</div><div class='add'>+  "^gameforce,.*":</div><div class='add'>+    description: GameForce</div><div class='ctx'>   "^gardena,.*":</div><div class='ctx'>     description: GARDENA GmbH</div><div class='ctx'>   "^gateway,.*":</div><div class='hunk'>@@ -1627,6 +1635,8 @@ patternProperties:</div><div class='ctx'>     description: Wondermedia Technologies, Inc.</div><div class='ctx'>   "^wobo,.*":</div><div class='ctx'>     description: Wobo</div><div class='add'>+  "^wolfvision,.*":</div><div class='add'>+    description: WolfVision GmbH</div><div class='ctx'>   "^x-powers,.*":</div><div class='ctx'>     description: X-Powers</div><div class='ctx'>   "^xen,.*":</div><div class='head'>diff --git a/Documentation/doc-guide/parse-headers.rst b/Documentation/doc-guide/parse-headers.rst<br/>index 5da0046f7059..204b025f1349 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/doc-guide/parse-headers.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/doc-guide/parse-headers.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/doc-guide/parse-headers.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/doc-guide/parse-headers.rst</a></div><div class='hunk'>@@ -61,7 +61,7 @@ DESCRIPTION</div><div class='ctx'> ***********</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Convert a C header or source file (C_FILE), into a ReStructured Text</div><div class='add'>+Convert a C header or source file (C_FILE), into a reStructuredText</div><div class='ctx'> included via ..parsed-literal block with cross-references for the</div><div class='ctx'> documentation files that describe the API. It accepts an optional</div><div class='ctx'> EXCEPTIONS_FILE with describes what elements will be either ignored or</div><div class='head'>diff --git a/Documentation/driver-api/crypto/iaa/iaa-crypto.rst b/Documentation/driver-api/crypto/iaa/iaa-crypto.rst<br/>index de587cf9cbed..f4fba897d931 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/crypto/iaa/iaa-crypto.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/crypto/iaa/iaa-crypto.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/crypto/iaa/iaa-crypto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/crypto/iaa/iaa-crypto.rst</a></div><div class='hunk'>@@ -179,7 +179,9 @@ has the old 'iax' device naming in place) ::</div><div class='ctx'> </div><div class='ctx'>   # configure wq1.0</div><div class='ctx'> </div><div class='del'>-  accel-config config-wq --group-id=0 --mode=dedicated --type=kernel --name="iaa_crypto" --device_name="crypto" iax1/wq1.0</div><div class='add'>+  accel-config config-wq --group-id=0 --mode=dedicated --type=kernel --priority=10 --name="iaa_crypto" --driver-name="crypto" iax1/wq1.0</div><div class='add'>+</div><div class='add'>+  accel-config config-engine iax1/engine1.0 --group-id=0</div><div class='ctx'> </div><div class='ctx'>   # enable IAA device iax1</div><div class='ctx'> </div><div class='hunk'>@@ -321,33 +323,30 @@ driver will generate statistics which can be accessed in debugfs at::</div><div class='ctx'> </div><div class='ctx'>   # ls -al /sys/kernel/debug/iaa-crypto/</div><div class='ctx'>   total 0</div><div class='del'>-  drwxr-xr-x  2 root root 0 Mar  3 09:35 .</div><div class='del'>-  drwx------ 47 root root 0 Mar  3 09:35 ..</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 max_acomp_delay_ns</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 max_adecomp_delay_ns</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 max_comp_delay_ns</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 max_decomp_delay_ns</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 stats_reset</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 total_comp_bytes_out</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 total_comp_calls</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 total_decomp_bytes_in</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 total_decomp_calls</div><div class='del'>-  -rw-r--r--  1 root root 0 Mar  3 09:35 wq_stats</div><div class='del'>-</div><div class='del'>-Most of the above statisticss are self-explanatory.  The wq_stats file</div><div class='del'>-shows per-wq stats, a set for each iaa device and wq in addition to</div><div class='del'>-some global stats::</div><div class='add'>+  drwxr-xr-x  2 root root 0 Mar  3 07:55 .</div><div class='add'>+  drwx------ 53 root root 0 Mar  3 07:55 ..</div><div class='add'>+  -rw-r--r--  1 root root 0 Mar  3 07:55 global_stats</div><div class='add'>+  -rw-r--r--  1 root root 0 Mar  3 07:55 stats_reset</div><div class='add'>+  -rw-r--r--  1 root root 0 Mar  3 07:55 wq_stats</div><div class='ctx'> </div><div class='del'>-  # cat wq_stats</div><div class='add'>+The global_stats file shows a set of global statistics collected since</div><div class='add'>+the driver has been loaded or reset::</div><div class='add'>+</div><div class='add'>+  # cat global_stats</div><div class='ctx'>   global stats:</div><div class='del'>-    total_comp_calls: 100</div><div class='del'>-    total_decomp_calls: 100</div><div class='del'>-    total_comp_bytes_out: 22800</div><div class='del'>-    total_decomp_bytes_in: 22800</div><div class='add'>+    total_comp_calls: 4300</div><div class='add'>+    total_decomp_calls: 4164</div><div class='add'>+    total_sw_decomp_calls: 0</div><div class='add'>+    total_comp_bytes_out: 5993989</div><div class='add'>+    total_decomp_bytes_in: 5993989</div><div class='ctx'>     total_completion_einval_errors: 0</div><div class='ctx'>     total_completion_timeout_errors: 0</div><div class='del'>-    total_completion_comp_buf_overflow_errors: 0</div><div class='add'>+    total_completion_comp_buf_overflow_errors: 136</div><div class='add'>+</div><div class='add'>+The wq_stats file shows per-wq stats, a set for each iaa device and wq</div><div class='add'>+in addition to some global stats::</div><div class='ctx'> </div><div class='add'>+  # cat wq_stats</div><div class='ctx'>   iaa device:</div><div class='ctx'>     id: 1</div><div class='ctx'>     n_wqs: 1</div><div class='hunk'>@@ -379,21 +378,36 @@ some global stats::</div><div class='ctx'>   iaa device:</div><div class='ctx'>     id: 5</div><div class='ctx'>     n_wqs: 1</div><div class='del'>-    comp_calls: 100</div><div class='del'>-    comp_bytes: 22800</div><div class='del'>-    decomp_calls: 100</div><div class='del'>-    decomp_bytes: 22800</div><div class='add'>+    comp_calls: 1360</div><div class='add'>+    comp_bytes: 1999776</div><div class='add'>+    decomp_calls: 0</div><div class='add'>+    decomp_bytes: 0</div><div class='ctx'>     wqs:</div><div class='ctx'>       name: iaa_crypto</div><div class='del'>-      comp_calls: 100</div><div class='del'>-      comp_bytes: 22800</div><div class='del'>-      decomp_calls: 100</div><div class='del'>-      decomp_bytes: 22800</div><div class='add'>+      comp_calls: 1360</div><div class='add'>+      comp_bytes: 1999776</div><div class='add'>+      decomp_calls: 0</div><div class='add'>+      decomp_bytes: 0</div><div class='ctx'> </div><div class='del'>-Writing 0 to 'stats_reset' resets all the stats, including the</div><div class='add'>+  iaa device:</div><div class='add'>+    id: 7</div><div class='add'>+    n_wqs: 1</div><div class='add'>+    comp_calls: 2940</div><div class='add'>+    comp_bytes: 3994213</div><div class='add'>+    decomp_calls: 4164</div><div class='add'>+    decomp_bytes: 5993989</div><div class='add'>+    wqs:</div><div class='add'>+      name: iaa_crypto</div><div class='add'>+      comp_calls: 2940</div><div class='add'>+      comp_bytes: 3994213</div><div class='add'>+      decomp_calls: 4164</div><div class='add'>+      decomp_bytes: 5993989</div><div class='add'>+    ...</div><div class='add'>+</div><div class='add'>+Writing to 'stats_reset' resets all the stats, including the</div><div class='ctx'> per-device and per-wq stats::</div><div class='ctx'> </div><div class='del'>-  # echo 0 &gt; stats_reset</div><div class='add'>+  # echo 1 &gt; stats_reset</div><div class='ctx'>   # cat wq_stats</div><div class='ctx'>     global stats:</div><div class='ctx'>     total_comp_calls: 0</div><div class='hunk'>@@ -536,12 +550,20 @@ The below script automatically does that::</div><div class='ctx'> </div><div class='ctx'>   echo "End Disable IAA"</div><div class='ctx'> </div><div class='add'>+  echo "Reload iaa_crypto module"</div><div class='add'>+</div><div class='add'>+  rmmod iaa_crypto</div><div class='add'>+  modprobe iaa_crypto</div><div class='add'>+</div><div class='add'>+  echo "End Reload iaa_crypto module"</div><div class='add'>+</div><div class='ctx'>   #</div><div class='ctx'>   # configure iaa wqs and devices</div><div class='ctx'>   #</div><div class='ctx'>   echo "Configure IAA"</div><div class='ctx'>   for ((i = 1; i &lt; ${num_iaa} * 2; i += 2)); do</div><div class='del'>-      accel-config config-wq --group-id=0 --mode=dedicated --size=128 --priority=10 --type=kernel --name="iaa_crypto" --driver_name="crypto" iax${i}/wq${i}</div><div class='add'>+      accel-config config-wq --group-id=0 --mode=dedicated --wq-size=128 --priority=10 --type=kernel --name="iaa_crypto" --driver-name="crypto" iax${i}/wq${i}.0</div><div class='add'>+      accel-config config-engine iax${i}/engine${i}.0 --group-id=0</div><div class='ctx'>   done</div><div class='ctx'> </div><div class='ctx'>   echo "End Configure IAA"</div><div class='hunk'>@@ -552,10 +574,10 @@ The below script automatically does that::</div><div class='ctx'>   echo "Enable IAA"</div><div class='ctx'> </div><div class='ctx'>   for ((i = 1; i &lt; ${num_iaa} * 2; i += 2)); do</div><div class='del'>-      echo enable iaa iaa${i}</div><div class='del'>-      accel-config enable-device iaa${i}</div><div class='del'>-      echo enable wq iaa${i}/wq${i}.0</div><div class='del'>-      accel-config enable-wq iaa${i}/wq${i}.0</div><div class='add'>+      echo enable iaa iax${i}</div><div class='add'>+      accel-config enable-device iax${i}</div><div class='add'>+      echo enable wq iax${i}/wq${i}.0</div><div class='add'>+      accel-config enable-wq iax${i}/wq${i}.0</div><div class='ctx'>   done</div><div class='ctx'> </div><div class='ctx'>   echo "End Enable IAA"</div><div class='head'>diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst<br/>index 0c153d79ccc4..29abf1eebf9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/dma-buf.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/dma-buf.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/dma-buf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/dma-buf.rst</a></div><div class='hunk'>@@ -77,7 +77,7 @@ consider though:</div><div class='ctx'>   the usual size discover pattern size = SEEK_END(0); SEEK_SET(0). Every other</div><div class='ctx'>   llseek operation will report -EINVAL.</div><div class='ctx'> </div><div class='del'>-  If llseek on dma-buf FDs isn't support the kernel will report -ESPIPE for all</div><div class='add'>+  If llseek on dma-buf FDs isn't supported the kernel will report -ESPIPE for all</div><div class='ctx'>   cases. Userspace can use this to detect support for discovering the dma-buf</div><div class='ctx'>   size using llseek.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst<br/>index 7be8b8dd5f00..18caebad7376 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/driver-model/devres.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/driver-model/devres.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/driver-model/devres.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/driver-model/devres.rst</a></div><div class='hunk'>@@ -433,6 +433,7 @@ REGULATOR</div><div class='ctx'>   devm_regulator_bulk_put()</div><div class='ctx'>   devm_regulator_get()</div><div class='ctx'>   devm_regulator_get_enable()</div><div class='add'>+  devm_regulator_get_enable_read_voltage()</div><div class='ctx'>   devm_regulator_get_enable_optional()</div><div class='ctx'>   devm_regulator_get_exclusive()</div><div class='ctx'>   devm_regulator_get_optional()</div><div class='head'>diff --git a/Documentation/driver-api/eisa.rst b/Documentation/driver-api/eisa.rst<br/>index 3eac11b7eb01..b33ebe1ec9ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/eisa.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/eisa.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/eisa.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/eisa.rst</a></div><div class='hunk'>@@ -196,8 +196,8 @@ eisa_bus.disable_dev</div><div class='ctx'> virtual_root.force_probe</div><div class='ctx'> 	Force the probing code to probe EISA slots even when it cannot find an</div><div class='ctx'> 	EISA compliant mainboard (nothing appears on slot 0). Defaults to 0</div><div class='del'>-	(don't force), and set to 1 (force probing) when either</div><div class='del'>-	CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set.</div><div class='add'>+	(don't force), and set to 1 (force probing) when</div><div class='add'>+	CONFIG_EISA_VLB_PRIMING is set.</div><div class='ctx'> </div><div class='ctx'> Random notes</div><div class='ctx'> ============</div><div class='head'>diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst<br/>index bf6319cc531b..e541bd2e898b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/gpio/driver.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/gpio/driver.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/gpio/driver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/gpio/driver.rst</a></div><div class='hunk'>@@ -7,7 +7,7 @@ This document serves as a guide for writers of GPIO chip drivers.</div><div class='ctx'> Each GPIO controller driver needs to include the following header, which defines</div><div class='ctx'> the structures used to define a GPIO driver::</div><div class='ctx'> </div><div class='del'>-	#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+  #include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Internal Representation of GPIOs</div><div class='hunk'>@@ -144,7 +144,7 @@ is not open, it will present a high-impedance (tristate) to the external rail::</div><div class='ctx'>      in ----||                   |/</div><div class='ctx'>             ||--+         in ----|</div><div class='ctx'>                 |                |\</div><div class='del'>-               GND	           GND</div><div class='add'>+               GND                 GND</div><div class='ctx'> </div><div class='ctx'> This configuration is normally used as a way to achieve one of two things:</div><div class='ctx'> </div><div class='hunk'>@@ -550,10 +550,10 @@ the interrupt separately and go with it:</div><div class='ctx'>   struct my_gpio *g;</div><div class='ctx'>   struct gpio_irq_chip *girq;</div><div class='ctx'> </div><div class='del'>-  ret = devm_request_threaded_irq(dev, irq, NULL,</div><div class='del'>-		irq_thread_fn, IRQF_ONESHOT, "my-chip", g);</div><div class='add'>+  ret = devm_request_threaded_irq(dev, irq, NULL, irq_thread_fn,</div><div class='add'>+                                  IRQF_ONESHOT, "my-chip", g);</div><div class='ctx'>   if (ret &lt; 0)</div><div class='del'>-	return ret;</div><div class='add'>+      return ret;</div><div class='ctx'> </div><div class='ctx'>   /* Get a pointer to the gpio_irq_chip */</div><div class='ctx'>   girq = &amp;g-&gt;gc.irq;</div><div class='hunk'>@@ -681,12 +681,12 @@ certain operations and keep track of usage inside of the gpiolib subsystem.</div><div class='ctx'> Input GPIOs can be used as IRQ signals. When this happens, a driver is requested</div><div class='ctx'> to mark the GPIO as being used as an IRQ::</div><div class='ctx'> </div><div class='del'>-	int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+  int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> </div><div class='ctx'> This will prevent the use of non-irq related GPIO APIs until the GPIO IRQ lock</div><div class='ctx'> is released::</div><div class='ctx'> </div><div class='del'>-	void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+  void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> </div><div class='ctx'> When implementing an irqchip inside a GPIO driver, these two functions should</div><div class='ctx'> typically be called in the .startup() and .shutdown() callbacks from the</div><div class='hunk'>@@ -708,12 +708,12 @@ When a GPIO is used as an IRQ signal, then gpiolib also needs to know if</div><div class='ctx'> the IRQ is enabled or disabled. In order to inform gpiolib about this,</div><div class='ctx'> the irqchip driver should call::</div><div class='ctx'> </div><div class='del'>-	void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+  void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> </div><div class='ctx'> This allows drivers to drive the GPIO as an output while the IRQ is</div><div class='ctx'> disabled. When the IRQ is enabled again, a driver should call::</div><div class='ctx'> </div><div class='del'>-	void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+  void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> </div><div class='ctx'> When implementing an irqchip inside a GPIO driver, these two functions should</div><div class='ctx'> typically be called in the .irq_disable() and .irq_enable() callbacks from the</div><div class='hunk'>@@ -763,12 +763,12 @@ Sometimes it is useful to allow a GPIO chip driver to request its own GPIO</div><div class='ctx'> descriptors through the gpiolib API. A GPIO driver can use the following</div><div class='ctx'> functions to request and free descriptors::</div><div class='ctx'> </div><div class='del'>-	struct gpio_desc *gpiochip_request_own_desc(struct gpio_desc *desc,</div><div class='del'>-						    u16 hwnum,</div><div class='del'>-						    const char *label,</div><div class='del'>-						    enum gpiod_flags flags)</div><div class='add'>+  struct gpio_desc *gpiochip_request_own_desc(struct gpio_desc *desc,</div><div class='add'>+                                              u16 hwnum,</div><div class='add'>+                                              const char *label,</div><div class='add'>+                                              enum gpiod_flags flags)</div><div class='ctx'> </div><div class='del'>-	void gpiochip_free_own_desc(struct gpio_desc *desc)</div><div class='add'>+  void gpiochip_free_own_desc(struct gpio_desc *desc)</div><div class='ctx'> </div><div class='ctx'> Descriptors requested with gpiochip_request_own_desc() must be released with</div><div class='ctx'> gpiochip_free_own_desc().</div><div class='head'>diff --git a/Documentation/driver-api/gpio/legacy.rst b/Documentation/driver-api/gpio/legacy.rst<br/>index b6505914791c..534dfe95d128 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/gpio/legacy.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/gpio/legacy.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/gpio/legacy.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/gpio/legacy.rst</a></div><div class='hunk'>@@ -225,8 +225,6 @@ setup or driver probe/teardown code, so this is an easy constraint.)::</div><div class='ctx'>                 gpio_request()</div><div class='ctx'> </div><div class='ctx'>         ## 	gpio_request_one()</div><div class='del'>-        ##	gpio_request_array()</div><div class='del'>-        ## 	gpio_free_array()</div><div class='ctx'> </div><div class='ctx'>                 gpio_free()</div><div class='ctx'> </div><div class='hunk'>@@ -295,14 +293,6 @@ are claimed, three additional calls are defined::</div><div class='ctx'> 	 */</div><div class='ctx'> 	int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);</div><div class='ctx'> </div><div class='del'>-	/* request multiple GPIOs in a single call</div><div class='del'>-	 */</div><div class='del'>-	int gpio_request_array(struct gpio *array, size_t num);</div><div class='del'>-</div><div class='del'>-	/* release multiple GPIOs in a single call</div><div class='del'>-	 */</div><div class='del'>-	void gpio_free_array(struct gpio *array, size_t num);</div><div class='del'>-</div><div class='ctx'> where 'flags' is currently defined to specify the following properties:</div><div class='ctx'> </div><div class='ctx'> 	* GPIOF_DIR_IN		- to configure direction as input</div><div class='hunk'>@@ -341,12 +331,6 @@ A typical example of usage::</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-	err = gpio_request_array(leds_gpios, ARRAY_SIZE(leds_gpios));</div><div class='del'>-	if (err)</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-	gpio_free_array(leds_gpios, ARRAY_SIZE(leds_gpios));</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> GPIOs mapped to IRQs</div><div class='ctx'> --------------------</div><div class='head'>diff --git a/Documentation/driver-api/mtd/nand_ecc.rst b/Documentation/driver-api/mtd/nand_ecc.rst<br/>index 74347c14a70b..a0d681f26a2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/mtd/nand_ecc.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/mtd/nand_ecc.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/mtd/nand_ecc.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/mtd/nand_ecc.rst</a></div><div class='hunk'>@@ -462,7 +462,7 @@ statements is reduced. This is also reflected in the assembly code.</div><div class='ctx'> Analysis 3</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='del'>-Very weird. Guess it has to do with caching or instruction parallellism</div><div class='add'>+Very weird. Guess it has to do with caching or instruction parallelism</div><div class='ctx'> or so. I also tried on an eeePC (Celeron, clocked at 900 Mhz). Interesting</div><div class='ctx'> observation was that this one is only 30% slower (according to time)</div><div class='ctx'> executing the code as my 3Ghz D920 processor.</div><div class='head'>diff --git a/Documentation/driver-api/scsi.rst b/Documentation/driver-api/scsi.rst<br/>index 64b231d125e0..273281474c09 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/scsi.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/scsi.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/scsi.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/scsi.rst</a></div><div class='hunk'>@@ -20,7 +20,7 @@ Although the old parallel (fast/wide/ultra) SCSI bus has largely fallen</div><div class='ctx'> out of use, the SCSI command set is more widely used than ever to</div><div class='ctx'> communicate with devices over a number of different busses.</div><div class='ctx'> </div><div class='del'>-The `SCSI protocol &lt;http://www.t10.org/scsi-3.htm&gt;`__ is a big-endian</div><div class='add'>+The `SCSI protocol &lt;https://www.t10.org/scsi-3.htm&gt;`__ is a big-endian</div><div class='ctx'> peer-to-peer packet based protocol. SCSI commands are 6, 10, 12, or 16</div><div class='ctx'> bytes long, often followed by an associated data payload.</div><div class='ctx'> </div><div class='hunk'>@@ -28,8 +28,7 @@ SCSI commands can be transported over just about any kind of bus, and</div><div class='ctx'> are the default protocol for storage devices attached to USB, SATA, SAS,</div><div class='ctx'> Fibre Channel, FireWire, and ATAPI devices. SCSI packets are also</div><div class='ctx'> commonly exchanged over Infiniband,</div><div class='del'>-`I2O &lt;http://i2o.shadowconnect.com/faq.php&gt;`__, TCP/IP</div><div class='del'>-(`iSCSI &lt;https://en.wikipedia.org/wiki/ISCSI&gt;`__), even `Parallel</div><div class='add'>+TCP/IP (`iSCSI &lt;https://en.wikipedia.org/wiki/ISCSI&gt;`__), even `Parallel</div><div class='ctx'> ports &lt;http://cyberelk.net/tim/parport/parscsi.html&gt;`__.</div><div class='ctx'> </div><div class='ctx'> Design of the Linux SCSI subsystem</div><div class='hunk'>@@ -170,9 +169,9 @@ drivers/scsi/scsi_netlink.c</div><div class='ctx'> </div><div class='ctx'> Infrastructure to provide async events from transports to userspace via</div><div class='ctx'> netlink, using a single NETLINK_SCSITRANSPORT protocol for all</div><div class='del'>-transports. See `the original patch</div><div class='del'>-submission &lt;http://marc.info/?l=linux-scsi&amp;m=115507374832500&amp;w=2&gt;`__ for</div><div class='del'>-more details.</div><div class='add'>+transports. See `the original patch submission</div><div class='add'>+&lt;https://lore.kernel.org/linux-scsi/1155070439.6275.5.camel@localhost.localdomain/&gt;`__</div><div class='add'>+for more details.</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/scsi/scsi_netlink.c</div><div class='ctx'>    :internal:</div><div class='hunk'>@@ -259,7 +258,7 @@ attributes for Serial Attached SCSI, a variant of SATA aimed at large</div><div class='ctx'> high-end systems.</div><div class='ctx'> </div><div class='ctx'> The SAS transport class contains common code to deal with SAS HBAs, an</div><div class='del'>-aproximated representation of SAS topologies in the driver model, and</div><div class='add'>+approximated representation of SAS topologies in the driver model, and</div><div class='ctx'> various sysfs attributes to expose these topologies and management</div><div class='ctx'> interfaces to userspace.</div><div class='ctx'> </div><div class='hunk'>@@ -328,11 +327,11 @@ the ordinary is seen.</div><div class='ctx'> To be more realistic, the simulated devices have the transport</div><div class='ctx'> attributes of SAS disks.</div><div class='ctx'> </div><div class='del'>-For documentation see http://sg.danny.cz/sg/sdebug26.html</div><div class='add'>+For documentation see http://sg.danny.cz/sg/scsi_debug.html</div><div class='ctx'> </div><div class='ctx'> todo</div><div class='ctx'> ~~~~</div><div class='ctx'> </div><div class='ctx'> Parallel (fast/wide/ultra) SCSI, USB, SATA, SAS, Fibre Channel,</div><div class='del'>-FireWire, ATAPI devices, Infiniband, I2O, Parallel ports,</div><div class='add'>+FireWire, ATAPI devices, Infiniband, Parallel ports,</div><div class='ctx'> netlink...</div><div class='head'>diff --git a/Documentation/driver-api/usb/usb.rst b/Documentation/driver-api/usb/usb.rst<br/>index fb41768696ec..89f9c37bb979 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/usb/usb.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/usb/usb.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/usb/usb.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/usb/usb.rst</a></div><div class='hunk'>@@ -422,7 +422,7 @@ USBDEVFS_CONNECTINFO</div><div class='ctx'> </div><div class='ctx'> USBDEVFS_GET_SPEED</div><div class='ctx'>     Returns the speed of the device. The speed is returned as a</div><div class='del'>-    nummerical value in accordance with enum usb_device_speed</div><div class='add'>+    numerical value in accordance with enum usb_device_speed</div><div class='ctx'> </div><div class='ctx'>     File modification time is not updated by this request.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/wbrf.rst b/Documentation/driver-api/wbrf.rst<br/>index f48bfa029813..6b18833e2e69 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/wbrf.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/driver-api/wbrf.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/wbrf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/driver-api/wbrf.rst</a></div><div class='hunk'>@@ -68,7 +68,7 @@ The expected flow for the consumers:</div><div class='ctx'> can be enabled for the device.</div><div class='ctx'> 2. Call `amd_wbrf_register_notifier` to register for notification</div><div class='ctx'> of frequency band change(add or remove) from other producers.</div><div class='del'>-3. Call the `amd_wbrf_retrieve_freq_band` initally to retrieve</div><div class='add'>+3. Call the `amd_wbrf_retrieve_freq_band` initially to retrieve</div><div class='ctx'> current active frequency bands considering some producers may broadcast</div><div class='ctx'> such information before the consumer is up.</div><div class='ctx'> 4. On receiving a notification for frequency band change, run</div><div class='head'>diff --git a/Documentation/filesystems/directory-locking.rst b/Documentation/filesystems/directory-locking.rst<br/>index 05ea387bc9fb..6fdf0b02df43 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/directory-locking.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/filesystems/directory-locking.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/directory-locking.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/filesystems/directory-locking.rst</a></div><div class='hunk'>@@ -44,7 +44,7 @@ For our purposes all operations fall in 6 classes:</div><div class='ctx'> 	* decide which of the source and target need to be locked.</div><div class='ctx'> 	  The source needs to be locked if it's a non-directory, target - if it's</div><div class='ctx'> 	  a non-directory or about to be removed.</div><div class='del'>-	* take the locks that need to be taken (exlusive), in inode pointer order</div><div class='add'>+	* take the locks that need to be taken (exclusive), in inode pointer order</div><div class='ctx'> 	  if need to take both (that can happen only when both source and target</div><div class='ctx'> 	  are non-directories - the source because it wouldn't need to be locked</div><div class='ctx'> 	  otherwise and the target because mixing directory and non-directory is</div><div class='hunk'>@@ -234,7 +234,7 @@ among the children, in some order.  But that is also impossible, since</div><div class='ctx'> neither of the children is a descendent of another.</div><div class='ctx'> </div><div class='ctx'> That concludes the proof, since the set of operations with the</div><div class='del'>-properties requiered for a minimal deadlock can not exist.</div><div class='add'>+properties required for a minimal deadlock can not exist.</div><div class='ctx'> </div><div class='ctx'> Note that the check for having a common ancestor in cross-directory</div><div class='ctx'> rename is crucial - without it a deadlock would be possible.  Indeed,</div><div class='head'>diff --git a/Documentation/filesystems/efivarfs.rst b/Documentation/filesystems/efivarfs.rst<br/>index 0551985821b8..f646c3f0980f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/efivarfs.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/filesystems/efivarfs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/efivarfs.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/filesystems/efivarfs.rst</a></div><div class='hunk'>@@ -40,4 +40,4 @@ accidentally.</div><div class='ctx'> *See also:*</div><div class='ctx'> </div><div class='ctx'> - Documentation/admin-guide/acpi/ssdt-overlays.rst</div><div class='del'>-- Documentation/ABI/stable/sysfs-firmware-efi-vars</div><div class='add'>+- Documentation/ABI/removed/sysfs-firmware-efi-vars</div><div class='head'>diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst<br/>index 1be76ef117b3..f2b44c2400c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/porting.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/filesystems/porting.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/porting.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/filesystems/porting.rst</a></div><div class='hunk'>@@ -858,7 +858,7 @@ be misspelled d_alloc_anon().</div><div class='ctx'> </div><div class='ctx'> **mandatory**</div><div class='ctx'> </div><div class='del'>-[should've been added in 2016] stale comment in finish_open() nonwithstanding,</div><div class='add'>+[should've been added in 2016] stale comment in finish_open() notwithstanding,</div><div class='ctx'> failure exits in -&gt;atomic_open() instances should *NOT* fput() the file,</div><div class='ctx'> no matter what.  Everything is handled by the caller.</div><div class='ctx'> </div><div class='hunk'>@@ -989,7 +989,7 @@ This mechanism would only work for a single device so the block layer couldn't</div><div class='ctx'> find the owning superblock of any additional devices.</div><div class='ctx'> </div><div class='ctx'> In the old mechanism reusing or creating a superblock for a racing mount(2) and</div><div class='del'>-umount(2) relied on the file_system_type as the holder. This was severly</div><div class='add'>+umount(2) relied on the file_system_type as the holder. This was severely</div><div class='ctx'> underdocumented however:</div><div class='ctx'> </div><div class='ctx'> (1) Any concurrent mounter that managed to grab an active reference on an</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/namespace.rst b/Documentation/firmware-guide/acpi/namespace.rst<br/>index 4ef963679a3d..5021843b526b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/namespace.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/firmware-guide/acpi/namespace.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/namespace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/firmware-guide/acpi/namespace.rst</a></div><div class='hunk'>@@ -15,7 +15,7 @@ ACPI Device Tree - Representation of ACPI Namespace</div><div class='ctx'> Abstract</div><div class='ctx'> ========</div><div class='ctx'> The Linux ACPI subsystem converts ACPI namespace objects into a Linux</div><div class='del'>-device tree under the /sys/devices/LNXSYSTEM:00 and updates it upon</div><div class='add'>+device tree under the /sys/devices/LNXSYSTM:00 and updates it upon</div><div class='ctx'> receiving ACPI hotplug notification events.  For each device object</div><div class='ctx'> in this hierarchy there is a corresponding symbolic link in the</div><div class='ctx'> /sys/bus/acpi/devices.</div><div class='hunk'>@@ -326,7 +326,7 @@ example ACPI namespace illustrated in Figure 2 with the addition of</div><div class='ctx'> fixed PWR_BUTTON/SLP_BUTTON devices is shown below::</div><div class='ctx'> </div><div class='ctx'>    +--------------+---+-----------------+</div><div class='del'>-   | LNXSYSTEM:00 | \ | acpi:LNXSYSTEM: |</div><div class='add'>+   | LNXSYSTM:00  | \ | acpi:LNXSYSTM:  |</div><div class='ctx'>    +--------------+---+-----------------+</div><div class='ctx'>      |</div><div class='ctx'>      | +-------------+-----+----------------+</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/debugging.rst b/Documentation/gpu/amdgpu/debugging.rst<br/>new file mode 100644<br/>index 000000000000..e75f97d0e4ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/debugging.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/amdgpu/debugging.rst</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+===============</div><div class='add'>+ GPU Debugging</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+GPUVM Debugging</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+To aid in debugging GPU virtual memory related problems, the driver supports a</div><div class='add'>+number of options module parameters:</div><div class='add'>+</div><div class='add'>+`vm_fault_stop` - If non-0, halt the GPU memory controller on a GPU page fault.</div><div class='add'>+</div><div class='add'>+`vm_update_mode` - If non-0, use the CPU to update GPU page tables rather than</div><div class='add'>+the GPU.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Decoding a GPUVM Page Fault</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+If you see a GPU page fault in the kernel log, you can decode it to figure</div><div class='add'>+out what is going wrong in your application.  A page fault in your kernel</div><div class='add'>+log may look something like this:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+ [gfxhub0] no-retry page fault (src_id:0 ring:24 vmid:3 pasid:32777, for process glxinfo pid 2424 thread glxinfo:cs0 pid 2425)</div><div class='add'>+   in page starting at address 0x0000800102800000 from IH client 0x1b (UTCL2)</div><div class='add'>+ VM_L2_PROTECTION_FAULT_STATUS:0x00301030</div><div class='add'>+ 	Faulty UTCL2 client ID: TCP (0x8)</div><div class='add'>+ 	MORE_FAULTS: 0x0</div><div class='add'>+ 	WALKER_ERROR: 0x0</div><div class='add'>+ 	PERMISSION_FAULTS: 0x3</div><div class='add'>+ 	MAPPING_ERROR: 0x0</div><div class='add'>+ 	RW: 0x0</div><div class='add'>+</div><div class='add'>+First you have the memory hub, gfxhub and mmhub.  gfxhub is the memory</div><div class='add'>+hub used for graphics, compute, and sdma on some chips.  mmhub is the</div><div class='add'>+memory hub used for multi-media and sdma on some chips.</div><div class='add'>+</div><div class='add'>+Next you have the vmid and pasid.  If the vmid is 0, this fault was likely</div><div class='add'>+caused by the kernel driver or firmware.  If the vmid is non-0, it is generally</div><div class='add'>+a fault in a user application.  The pasid is used to link a vmid to a system</div><div class='add'>+process id.  If the process is active when the fault happens, the process</div><div class='add'>+information will be printed.</div><div class='add'>+</div><div class='add'>+The GPU virtual address that caused the fault comes next.</div><div class='add'>+</div><div class='add'>+The client ID indicates the GPU block that caused the fault.</div><div class='add'>+Some common client IDs:</div><div class='add'>+</div><div class='add'>+- CB/DB: The color/depth backend of the graphics pipe</div><div class='add'>+- CPF: Command Processor Frontend</div><div class='add'>+- CPC: Command Processor Compute</div><div class='add'>+- CPG: Command Processor Graphics</div><div class='add'>+- TCP/SQC/SQG: Shaders</div><div class='add'>+- SDMA: SDMA engines</div><div class='add'>+- VCN: Video encode/decode engines</div><div class='add'>+- JPEG: JPEG engines</div><div class='add'>+</div><div class='add'>+PERMISSION_FAULTS describe what faults were encountered:</div><div class='add'>+</div><div class='add'>+- bit 0: the PTE was not valid</div><div class='add'>+- bit 1: the PTE read bit was not set</div><div class='add'>+- bit 2: the PTE write bit was not set</div><div class='add'>+- bit 3: the PTE execute bit was not set</div><div class='add'>+</div><div class='add'>+Finally, RW, indicates whether the access was a read (0) or a write (1).</div><div class='add'>+</div><div class='add'>+In the example above, a shader (cliend id = TCP) generated a read (RW = 0x0) to</div><div class='add'>+an invalid page (PERMISSION_FAULTS = 0x3) at GPU virtual address</div><div class='add'>+0x0000800102800000.  The user can then inspect their shader code and resource</div><div class='add'>+descriptor state to determine what caused the GPU page fault.</div><div class='add'>+</div><div class='add'>+UMR</div><div class='add'>+===</div><div class='add'>+</div><div class='add'>+`umr &lt;https://gitlab.freedesktop.org/tomstdenis/umr&gt;`_ is a general purpose</div><div class='add'>+GPU debugging and diagnostics tool.  Please see the umr</div><div class='add'>+`documentation &lt;https://umr.readthedocs.io/en/main/&gt;`_ for more information</div><div class='add'>+about its capabilities.</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/display-contributing.rst b/Documentation/gpu/amdgpu/display/display-contributing.rst<br/>index fdb2bea01d53..36f3077eee00 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/display/display-contributing.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/amdgpu/display/display-contributing.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/display/display-contributing.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/amdgpu/display/display-contributing.rst</a></div><div class='hunk'>@@ -135,7 +135,7 @@ Enable underlay</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='ctx'> AMD display has this feature called underlay (which you can read more about at</div><div class='del'>-'Documentation/GPU/amdgpu/display/mpo-overview.rst') which is intended to</div><div class='add'>+'Documentation/gpu/amdgpu/display/mpo-overview.rst') which is intended to</div><div class='ctx'> save power when playing a video. The basic idea is to put a video in the</div><div class='ctx'> underlay plane at the bottom and the desktop in the plane above it with a hole</div><div class='ctx'> in the video area. This feature is enabled in ChromeOS, and from our data</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst<br/>index 912e699fd373..847e04924030 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/amdgpu/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/amdgpu/index.rst</a></div><div class='hunk'>@@ -15,4 +15,5 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.</div><div class='ctx'>    ras</div><div class='ctx'>    thermal</div><div class='ctx'>    driver-misc</div><div class='add'>+   debugging</div><div class='ctx'>    amdgpu-glossary</div><div class='head'>diff --git a/Documentation/gpu/driver-uapi.rst b/Documentation/gpu/driver-uapi.rst<br/>index e5070a0e95ab..971cdb4816fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/driver-uapi.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/driver-uapi.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/driver-uapi.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/driver-uapi.rst</a></div><div class='hunk'>@@ -18,6 +18,11 @@ VM_BIND / EXEC uAPI</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: include/uapi/drm/nouveau_drm.h</div><div class='ctx'> </div><div class='add'>+drm/panthor uAPI</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/drm/panthor_drm.h</div><div class='add'>+</div><div class='ctx'> drm/xe uAPI</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst<br/>index 13d3627d8bc0..abfe220764e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/drm-kms.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/drm-kms.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/drm-kms.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/drm-kms.rst</a></div><div class='hunk'>@@ -398,6 +398,21 @@ Plane Damage Tracking Functions Reference</div><div class='ctx'> .. kernel-doc:: include/drm/drm_damage_helper.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='add'>+Plane Panic Feature</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_panic.c</div><div class='add'>+   :doc: overview</div><div class='add'>+</div><div class='add'>+Plane Panic Functions Reference</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/drm/drm_panic.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_panic.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='ctx'> Display Modes Function Reference</div><div class='ctx'> ================================</div><div class='ctx'> </div><div class='hunk'>@@ -496,6 +511,13 @@ addition to the one mentioned above:</div><div class='ctx'> </div><div class='ctx'> * An IGT test must be submitted where reasonable.</div><div class='ctx'> </div><div class='add'>+For historical reasons, non-standard, driver-specific properties exist. If a KMS</div><div class='add'>+driver wants to add support for one of those properties, the requirements for</div><div class='add'>+new properties apply where possible. Additionally, the documented behavior must</div><div class='add'>+match the de facto semantics of the existing property to ensure compatibility.</div><div class='add'>+Developers of the driver that first added the property should help with those</div><div class='add'>+tasks and must ACK the documented behavior if possible.</div><div class='add'>+</div><div class='ctx'> Property Types and Blob Property Support</div><div class='ctx'> ----------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst<br/>index 0ca1550fd9dc..17261ba18313 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/i915.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/i915.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/i915.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/i915.rst</a></div><div class='hunk'>@@ -204,6 +204,15 @@ DMC Firmware Support</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='add'>+DMC wakelock support</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c</div><div class='add'>+   :doc: DMC wakelock support</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='ctx'> Video BIOS Table (VBT)</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/panfrost.rst b/Documentation/gpu/panfrost.rst<br/>index b80e41f4b2c5..51ba375fd80d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/panfrost.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/panfrost.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/panfrost.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/panfrost.rst</a></div><div class='hunk'>@@ -38,3 +38,12 @@ the currently possible format options:</div><div class='ctx'> </div><div class='ctx'> Possible `drm-engine-` key names are: `fragment`, and  `vertex-tiler`.</div><div class='ctx'> `drm-curfreq-` values convey the current operating frequency for that engine.</div><div class='add'>+</div><div class='add'>+Users must bear in mind that engine and cycle sampling are disabled by default,</div><div class='add'>+because of power saving concerns. `fdinfo` users and benchmark applications which</div><div class='add'>+query the fdinfo file must make sure to toggle the job profiling status of the</div><div class='add'>+driver by writing into the appropriate sysfs node::</div><div class='add'>+</div><div class='add'>+    echo &lt;N&gt; &gt; /sys/bus/platform/drivers/panfrost/[a-f0-9]*.gpu/profiling</div><div class='add'>+</div><div class='add'>+Where `N` is either `0` or `1`, depending on the desired enablement status.</div><div class='head'>diff --git a/Documentation/gpu/rfc/i915_vm_bind.h b/Documentation/gpu/rfc/i915_vm_bind.h<br/>index 8a8fcd4fceac..bc26dc126104 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/rfc/i915_vm_bind.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/gpu/rfc/i915_vm_bind.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/rfc/i915_vm_bind.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/gpu/rfc/i915_vm_bind.h</a></div><div class='hunk'>@@ -93,12 +93,11 @@ struct drm_i915_gem_timeline_fence {</div><div class='ctx'>  * Multiple VA mappings can be created to the same section of the object</div><div class='ctx'>  * (aliasing).</div><div class='ctx'>  *</div><div class='del'>- * The @start, @offset and @length must be 4K page aligned. However the DG2</div><div class='del'>- * and XEHPSDV has 64K page size for device local memory and has compact page</div><div class='del'>- * table. On those platforms, for binding device local-memory objects, the</div><div class='del'>- * @start, @offset and @length must be 64K aligned. Also, UMDs should not mix</div><div class='del'>- * the local memory 64K page and the system memory 4K page bindings in the same</div><div class='del'>- * 2M range.</div><div class='add'>+ * The @start, @offset and @length must be 4K page aligned. However the DG2 has</div><div class='add'>+ * 64K page size for device local memory and has compact page table. On that</div><div class='add'>+ * platform, for binding device local-memory objects, the @start, @offset and</div><div class='add'>+ * @length must be 64K aligned. Also, UMDs should not mix the local memory 64K</div><div class='add'>+ * page and the system memory 4K page bindings in the same 2M range.</div><div class='ctx'>  *</div><div class='ctx'>  * Error code -EINVAL will be returned if @start, @offset and @length are not</div><div class='ctx'>  * properly aligned. In version 1 (See I915_PARAM_VM_BIND_VERSION), error code</div><div class='head'>diff --git a/Documentation/hid/hid-bpf.rst b/Documentation/hid/hid-bpf.rst<br/>index 4fad83a6ebc3..0765b3298ecf 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hid/hid-bpf.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hid/hid-bpf.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hid/hid-bpf.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hid/hid-bpf.rst</a></div><div class='hunk'>@@ -179,7 +179,7 @@ Available API that can be used in syscall HID-BPF programs:</div><div class='ctx'> -----------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/hid/bpf/hid_bpf_dispatch.c</div><div class='del'>-   :functions: hid_bpf_attach_prog hid_bpf_hw_request hid_bpf_allocate_context hid_bpf_release_context</div><div class='add'>+   :functions: hid_bpf_attach_prog hid_bpf_hw_request hid_bpf_hw_output_report hid_bpf_input_report hid_bpf_allocate_context hid_bpf_release_context</div><div class='ctx'> </div><div class='ctx'> General overview of a HID-BPF program</div><div class='ctx'> =====================================</div><div class='head'>diff --git a/Documentation/hid/intel-ish-hid.rst b/Documentation/hid/intel-ish-hid.rst<br/>index 42dc77b7b10f..55cbaa719a79 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hid/intel-ish-hid.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hid/intel-ish-hid.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hid/intel-ish-hid.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hid/intel-ish-hid.rst</a></div><div class='hunk'>@@ -18,8 +18,8 @@ These ISH also comply to HID sensor specification, but the difference is the</div><div class='ctx'> transport protocol used for communication. The current external sensor hubs</div><div class='ctx'> mainly use HID over I2C or USB. But ISH doesn't use either I2C or USB.</div><div class='ctx'> </div><div class='del'>-1. Overview</div><div class='del'>-===========</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='ctx'> </div><div class='ctx'> Using a analogy with a usbhid implementation, the ISH follows a similar model</div><div class='ctx'> for a very high speed communication::</div><div class='hunk'>@@ -58,8 +58,8 @@ implemented as a bus. Each client application executing in the ISH processor</div><div class='ctx'> is registered as a device on this bus. The driver, which binds each device</div><div class='ctx'> (ISH HID driver) identifies the device type and registers with the HID core.</div><div class='ctx'> </div><div class='del'>-2. ISH Implementation: Block Diagram</div><div class='del'>-====================================</div><div class='add'>+ISH Implementation: Block Diagram</div><div class='add'>+=================================</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='hunk'>@@ -96,27 +96,27 @@ is registered as a device on this bus. The driver, which binds each device</div><div class='ctx'> 	| ISH Hardware/Firmware(FW) |</div><div class='ctx'> 	 ----------------------------</div><div class='ctx'> </div><div class='del'>-3. High level processing in above blocks</div><div class='del'>-========================================</div><div class='add'>+High level processing in above blocks</div><div class='add'>+=====================================</div><div class='ctx'> </div><div class='del'>-3.1 Hardware Interface</div><div class='del'>-----------------------</div><div class='add'>+Hardware Interface</div><div class='add'>+------------------</div><div class='ctx'> </div><div class='ctx'> The ISH is exposed as "Non-VGA unclassified PCI device" to the host. The PCI</div><div class='ctx'> product and vendor IDs are changed from different generations of processors. So</div><div class='ctx'> the source code which enumerates drivers needs to update from generation to</div><div class='ctx'> generation.</div><div class='ctx'> </div><div class='del'>-3.2 Inter Processor Communication (IPC) driver</div><div class='del'>-----------------------------------------------</div><div class='add'>+Inter Processor Communication (IPC) driver</div><div class='add'>+------------------------------------------</div><div class='ctx'> </div><div class='ctx'> Location: drivers/hid/intel-ish-hid/ipc</div><div class='ctx'> </div><div class='ctx'> The IPC message uses memory mapped I/O. The registers are defined in</div><div class='ctx'> hw-ish-regs.h.</div><div class='ctx'> </div><div class='del'>-3.2.1 IPC/FW message types</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+IPC/FW message types</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> There are two types of messages, one for management of link and another for</div><div class='ctx'> messages to and from transport layers.</div><div class='hunk'>@@ -142,20 +142,20 @@ register has the following format::</div><div class='ctx'>   Bit 31: doorbell trigger (signal H/W interrupt to the other side)</div><div class='ctx'>   Other bits are reserved, should be 0.</div><div class='ctx'> </div><div class='del'>-3.2.2 Transport layer interface</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+Transport layer interface</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> To abstract HW level IPC communication, a set of callbacks is registered.</div><div class='ctx'> The transport layer uses them to send and receive messages.</div><div class='ctx'> Refer to struct ishtp_hw_ops for callbacks.</div><div class='ctx'> </div><div class='del'>-3.3 ISH Transport layer</div><div class='del'>------------------------</div><div class='add'>+ISH Transport layer</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> Location: drivers/hid/intel-ish-hid/ishtp/</div><div class='ctx'> </div><div class='del'>-3.3.1 A Generic Transport Layer</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+A Generic Transport Layer</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> The transport layer is a bi-directional protocol, which defines:</div><div class='ctx'> - Set of commands to start, stop, connect, disconnect and flow control</div><div class='hunk'>@@ -166,8 +166,8 @@ This protocol resembles bus messages described in the following document:</div><div class='ctx'> http://www.intel.com/content/dam/www/public/us/en/documents/technical-\</div><div class='ctx'> specifications/dcmi-hi-1-0-spec.pdf "Chapter 7: Bus Message Layer"</div><div class='ctx'> </div><div class='del'>-3.3.2 Connection and Flow Control Mechanism</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+Connection and Flow Control Mechanism</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> Each FW client and a protocol is identified by a UUID. In order to communicate</div><div class='ctx'> to a FW client, a connection must be established using connect request and</div><div class='hunk'>@@ -181,8 +181,8 @@ before receiving the next flow control credit.</div><div class='ctx'> Either side can send disconnect request bus message to end communication. Also</div><div class='ctx'> the link will be dropped if major FW reset occurs.</div><div class='ctx'> </div><div class='del'>-3.3.3 Peer to Peer data transfer</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+Peer to Peer data transfer</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> Peer to Peer data transfer can happen with or without using DMA. Depending on</div><div class='ctx'> the sensor bandwidth requirement DMA can be enabled by using module parameter</div><div class='hunk'>@@ -217,8 +217,8 @@ In principle, multiple DMA_XFER and DMA_XFER_ACK messages may be sent at once</div><div class='ctx'> Currently, ISH FW decides to send over DMA if ISHTP message is more than 3 IPC</div><div class='ctx'> fragments and via IPC otherwise.</div><div class='ctx'> </div><div class='del'>-3.3.4 Ring Buffers</div><div class='del'>-^^^^^^^^^^^^^^^^^^</div><div class='add'>+Ring Buffers</div><div class='add'>+^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> When a client initiates a connection, a ring of RX and TX buffers is allocated.</div><div class='ctx'> The size of ring can be specified by the client. HID client sets 16 and 32 for</div><div class='hunk'>@@ -228,8 +228,8 @@ bus message protocol. These buffers are required because the FW may have not</div><div class='ctx'> have processed the last message and may not have enough flow control credits</div><div class='ctx'> to send. Same thing holds true on receive side and flow control is required.</div><div class='ctx'> </div><div class='del'>-3.3.5 Host Enumeration</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+Host Enumeration</div><div class='add'>+^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='ctx'> The host enumeration bus command allows discovery of clients present in the FW.</div><div class='ctx'> There can be multiple sensor clients and clients for calibration function.</div><div class='hunk'>@@ -252,8 +252,8 @@ Enumeration sequence of messages:</div><div class='ctx'> - Once host received properties for that last discovered client, it considers</div><div class='ctx'>   ISHTP device fully functional (and allocates DMA buffers)</div><div class='ctx'> </div><div class='del'>-3.4 HID over ISH Client</div><div class='del'>------------------------</div><div class='add'>+HID over ISH Client</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> Location: drivers/hid/intel-ish-hid</div><div class='ctx'> </div><div class='hunk'>@@ -265,16 +265,16 @@ The ISHTP client driver is responsible for:</div><div class='ctx'> - Process Get/Set feature request</div><div class='ctx'> - Get input reports</div><div class='ctx'> </div><div class='del'>-3.5 HID Sensor Hub MFD and IIO sensor drivers</div><div class='del'>----------------------------------------------</div><div class='add'>+HID Sensor Hub MFD and IIO sensor drivers</div><div class='add'>+-----------------------------------------</div><div class='ctx'> </div><div class='ctx'> The functionality in these drivers is the same as an external sensor hub.</div><div class='ctx'> Refer to</div><div class='ctx'> Documentation/hid/hid-sensor.rst for HID sensor</div><div class='ctx'> Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.</div><div class='ctx'> </div><div class='del'>-3.6 End to End HID transport Sequence Diagram</div><div class='del'>----------------------------------------------</div><div class='add'>+End to End HID transport Sequence Diagram</div><div class='add'>+-----------------------------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='hunk'>@@ -339,16 +339,81 @@ Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.</div><div class='ctx'>           |                        |                       |                               |</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-3.7 ISH Debugging</div><div class='del'>------------------</div><div class='add'>+ISH Firmware Loading from Host Flow</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+Starting from the Lunar Lake generation, the ISH firmware has been divided into two components for better space optimization and increased flexibility. These components include a bootloader that is integrated into the BIOS, and a main firmware that is stored within the operating system's file system.</div><div class='add'>+</div><div class='add'>+The process works as follows:</div><div class='add'>+</div><div class='add'>+- Initially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins.</div><div class='add'>+</div><div class='add'>+- During this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware.</div><div class='add'>+</div><div class='add'>+- After the process concludes, the ISHTP driver calls the release_firmware() function.</div><div class='add'>+</div><div class='add'>+For more detailed information, please refer to the flow descriptions provided below:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  +---------------+                                                    +-----------------+</div><div class='add'>+  | ISHTP Driver  |                                                    | ISH Bootloader  |</div><div class='add'>+  +---------------+                                                    +-----------------+</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |~~~Send HOST_START_REQ_CMD~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~&gt;|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |&lt;--Send HOST_START_RES_CMD(Includes ISHTP_SUPPORT_CAP_LOADER bit)----|</div><div class='add'>+          |                                                                     |</div><div class='add'>+  ****************************************************************************************</div><div class='add'>+  * if ISHTP_SUPPORT_CAP_LOADER bit is set                                               *</div><div class='add'>+  ****************************************************************************************</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |~~~start loading firmware from host process~~~+                      |</div><div class='add'>+          |                                              |                      |</div><div class='add'>+          |&lt;---------------------------------------------+                      |</div><div class='add'>+          |                                                                     |</div><div class='add'>+  ---------------------------                                                   |</div><div class='add'>+  | Call request_firmware() |                                                   |</div><div class='add'>+  ---------------------------                                                   |</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |~~~Send LOADER_CMD_XFER_QUERY~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~&gt;|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |&lt;--Send response-----------------------------------------------------|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |~~~Send LOADER_CMD_XFER_FRAGMENT~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~&gt;|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |&lt;--Send response-----------------------------------------------------|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |~~~Send LOADER_CMD_START~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~&gt;|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |&lt;--Send response-----------------------------------------------------|</div><div class='add'>+          |                                                                     |</div><div class='add'>+          |                                                                     |~~~Jump to Main Firmware~~~+</div><div class='add'>+          |                                                                     |                           |</div><div class='add'>+          |                                                                     |&lt;--------------------------+</div><div class='add'>+          |                                                                     |</div><div class='add'>+  ---------------------------                                                   |</div><div class='add'>+  | Call release_firmware() |                                                   |</div><div class='add'>+  ---------------------------                                                   |</div><div class='add'>+          |                                                                     |</div><div class='add'>+  ****************************************************************************************</div><div class='add'>+  * end if                                                                               *</div><div class='add'>+  ****************************************************************************************</div><div class='add'>+          |                                                                     |</div><div class='add'>+  +---------------+                                                    +-----------------+</div><div class='add'>+  | ISHTP Driver  |                                                    | ISH Bootloader  |</div><div class='add'>+  +---------------+                                                    +-----------------+</div><div class='add'>+</div><div class='add'>+ISH Debugging</div><div class='add'>+-------------</div><div class='ctx'> </div><div class='ctx'> To debug ISH, event tracing mechanism is used. To enable debug logs::</div><div class='ctx'> </div><div class='ctx'>   echo 1 &gt; /sys/kernel/tracing/events/intel_ish/enable</div><div class='ctx'>   cat /sys/kernel/tracing/trace</div><div class='ctx'> </div><div class='del'>-3.8 ISH IIO sysfs Example on Lenovo thinkpad Yoga 260</div><div class='del'>------------------------------------------------------</div><div class='add'>+ISH IIO sysfs Example on Lenovo thinkpad Yoga 260</div><div class='add'>+-------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/adm1275.rst b/Documentation/hwmon/adm1275.rst<br/>index 804590eeabdc..467daf8ce3c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/adm1275.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/adm1275.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/adm1275.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/adm1275.rst</a></div><div class='hunk'>@@ -43,6 +43,14 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>     Datasheet: www.analog.com/static/imported-files/data_sheets/ADM1278.pdf</div><div class='ctx'> </div><div class='add'>+  * Analog Devices ADM1281</div><div class='add'>+</div><div class='add'>+    Prefix: 'adm1281'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: -</div><div class='add'>+</div><div class='add'>+    Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adm1281.pdf</div><div class='add'>+</div><div class='ctx'>   * Analog Devices ADM1293/ADM1294</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'adm1293', 'adm1294'</div><div class='hunk'>@@ -58,10 +66,10 @@ Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='ctx'> This driver supports hardware monitoring for Analog Devices ADM1075, ADM1272,</div><div class='del'>-ADM1275, ADM1276, ADM1278, ADM1293, and ADM1294 Hot-Swap Controller and</div><div class='add'>+ADM1275, ADM1276, ADM1278, ADM1281, ADM1293, and ADM1294 Hot-Swap Controller and</div><div class='ctx'> Digital Power Monitors.</div><div class='ctx'> </div><div class='del'>-ADM1075, ADM1272, ADM1275, ADM1276, ADM1278, ADM1293, and ADM1294 are hot-swap</div><div class='add'>+ADM1075, ADM1272, ADM1275, ADM1276, ADM1278, ADM1281, ADM1293, and ADM1294 are hot-swap</div><div class='ctx'> controllers that allow a circuit board to be removed from or inserted into</div><div class='ctx'> a live backplane. They also feature current and voltage readback via an</div><div class='ctx'> integrated 12 bit analog-to-digital converter (ADC), accessed using a</div><div class='hunk'>@@ -144,5 +152,5 @@ temp1_highest		Highest observed temperature.</div><div class='ctx'> temp1_reset_history	Write any value to reset history.</div><div class='ctx'> </div><div class='ctx'> 			Temperature attributes are supported on ADM1272 and</div><div class='del'>-			ADM1278.</div><div class='add'>+			ADM1278, and ADM1281.</div><div class='ctx'> ======================= =======================================================</div><div class='head'>diff --git a/Documentation/hwmon/adp1050.rst b/Documentation/hwmon/adp1050.rst<br/>new file mode 100644<br/>index 000000000000..8fa937064886<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/adp1050.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/adp1050.rst</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver adp1050</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * Analog Devices ADP1050</div><div class='add'>+</div><div class='add'>+    Prefix: 'adp1050'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x70 - 0x77</div><div class='add'>+</div><div class='add'>+    Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADP1050.pdf</div><div class='add'>+</div><div class='add'>+Authors:</div><div class='add'>+</div><div class='add'>+  - Radu Sabau &lt;radu.sabau@analog.com&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver supprts hardware monitoring for Analog Devices ADP1050 Digital</div><div class='add'>+Controller for Isolated Power Supply with PMBus interface.</div><div class='add'>+</div><div class='add'>+The ADP1050 is an advanced digital controller with a PMBus™</div><div class='add'>+interface targeting high density, high efficiency dc-to-dc power</div><div class='add'>+conversion used to monitor system temperatures, voltages and currents.</div><div class='add'>+Through the PMBus interface, the device can monitor input/output voltages,</div><div class='add'>+input current and temperature.</div><div class='add'>+</div><div class='add'>+Usage Notes</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver does not auto-detect devices. You will have to instantiate</div><div class='add'>+the devices explicitly.</div><div class='add'>+Please see Documentation/i2c/instantiating-devices.rst for details.</div><div class='add'>+</div><div class='add'>+Platform data support</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+The driver supports standard PMBus driver platform data.</div><div class='add'>+</div><div class='add'>+Sysfs Attributes</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+================= ========================================</div><div class='add'>+in1_label         "vin"</div><div class='add'>+in1_input         Measured input voltage</div><div class='add'>+in1_alarm	  Input voltage alarm</div><div class='add'>+in2_label	  "vout1"</div><div class='add'>+in2_input	  Measured output voltage</div><div class='add'>+in2_crit	  Critical maximum output voltage</div><div class='add'>+in2_crit_alarm    Output voltage high alarm</div><div class='add'>+in2_lcrit	  Critical minimum output voltage</div><div class='add'>+in2_lcrit_alarm	  Output voltage critical low alarm</div><div class='add'>+curr1_label	  "iin"</div><div class='add'>+curr1_input	  Measured input current.</div><div class='add'>+curr1_alarm	  Input current alarm</div><div class='add'>+temp1_input       Measured temperature</div><div class='add'>+temp1_crit	  Critical high temperature</div><div class='add'>+temp1_crit_alarm  Chip temperature critical high alarm</div><div class='add'>+================= ========================================</div><div class='head'>diff --git a/Documentation/hwmon/aquacomputer_d5next.rst b/Documentation/hwmon/aquacomputer_d5next.rst<br/>index cb073c79479c..49163f387b90 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/aquacomputer_d5next.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/aquacomputer_d5next.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/aquacomputer_d5next.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/aquacomputer_d5next.rst</a></div><div class='hunk'>@@ -45,9 +45,9 @@ seems to require sending it a complete configuration. That includes addressable</div><div class='ctx'> RGB LEDs, for which there is no standard sysfs interface. Thus, that task is</div><div class='ctx'> better suited for userspace tools.</div><div class='ctx'> </div><div class='del'>-The Octo exposes four physical and sixteen virtual temperature sensors, as well as</div><div class='del'>-eight PWM controllable fans, along with their speed (in RPM), power, voltage and</div><div class='del'>-current.</div><div class='add'>+The Octo exposes four physical and sixteen virtual temperature sensors, a flow sensor</div><div class='add'>+as well as eight PWM controllable fans, along with their speed (in RPM), power, voltage</div><div class='add'>+and current. Flow sensor pulses are also available.</div><div class='ctx'> </div><div class='ctx'> The Quadro exposes four physical and sixteen virtual temperature sensors, a flow</div><div class='ctx'> sensor and four PWM controllable fans, along with their speed (in RPM), power,</div><div class='hunk'>@@ -95,11 +95,12 @@ Sysfs entries</div><div class='ctx'> ================ ==============================================================</div><div class='ctx'> temp[1-20]_input Physical/virtual temperature sensors (in millidegrees Celsius)</div><div class='ctx'> temp[1-8]_offset Temperature sensor correction offset (in millidegrees Celsius)</div><div class='del'>-fan[1-8]_input   Pump/fan speed (in RPM) / Flow speed (in dL/h)</div><div class='add'>+fan[1-9]_input   Pump/fan speed (in RPM) / Flow speed (in dL/h)</div><div class='ctx'> fan1_min         Minimal fan speed (in RPM)</div><div class='ctx'> fan1_max         Maximal fan speed (in RPM)</div><div class='ctx'> fan1_target      Target fan speed (in RPM)</div><div class='ctx'> fan5_pulses      Quadro flow sensor pulses</div><div class='add'>+fan9_pulses      Octo flow sensor pulses</div><div class='ctx'> power[1-8]_input Pump/fan power (in micro Watts)</div><div class='ctx'> in[0-7]_input    Pump/fan voltage (in milli Volts)</div><div class='ctx'> curr[1-8]_input  Pump/fan current (in milli Amperes)</div><div class='head'>diff --git a/Documentation/hwmon/emc1403.rst b/Documentation/hwmon/emc1403.rst<br/>index 0de9616b24ed..57f833b1a800 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/emc1403.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/emc1403.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/emc1403.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/emc1403.rst</a></div><div class='hunk'>@@ -45,6 +45,17 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'> 	- https://ww1.microchip.com/downloads/en/DeviceDoc/1423_1424.pdf</div><div class='ctx'> </div><div class='add'>+  * SMSC / Microchip EMC1428, EMC1438</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18, 0x4c, 0x4d</div><div class='add'>+</div><div class='add'>+    Prefix: 'emc1428', 'emc1438'</div><div class='add'>+</div><div class='add'>+    Datasheets:</div><div class='add'>+</div><div class='add'>+	- https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005275A.pdf</div><div class='add'>+	- https://ww1.microchip.com/downloads/en/DeviceDoc/EMC1438%20DS%20Rev.%201.0%20(04-29-10).pdf</div><div class='add'>+</div><div class='ctx'> Author:</div><div class='ctx'>     Kalhan Trisal &lt;kalhan.trisal@intel.com</div><div class='ctx'> </div><div class='hunk'>@@ -53,10 +64,10 @@ Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='ctx'> The Standard Microsystems Corporation (SMSC) / Microchip EMC14xx chips</div><div class='del'>-contain up to four temperature sensors. EMC14x2 support two sensors</div><div class='add'>+contain up to eight temperature sensors. EMC14x2 support two sensors</div><div class='ctx'> (one internal, one external). EMC14x3 support three sensors (one internal,</div><div class='del'>-two external), and EMC14x4 support four sensors (one internal, three</div><div class='del'>-external).</div><div class='add'>+two external), EMC14x4 support four sensors (one internal, three external),</div><div class='add'>+and EMC14x8 support eight sensors (one internal, seven external).</div><div class='ctx'> </div><div class='ctx'> The chips implement three limits for each sensor: low (tempX_min), high</div><div class='ctx'> (tempX_max) and critical (tempX_crit.) The chips also implement an</div><div class='head'>diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst<br/>index 1ca7a4fe1f8f..03d313af469a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/index.rst</a></div><div class='hunk'>@@ -33,6 +33,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    adm1266</div><div class='ctx'>    adm1275</div><div class='ctx'>    adm9240</div><div class='add'>+   adp1050</div><div class='ctx'>    ads7828</div><div class='ctx'>    adt7410</div><div class='ctx'>    adt7411</div><div class='hunk'>@@ -250,6 +251,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    wm831x</div><div class='ctx'>    wm8350</div><div class='ctx'>    xgene-hwmon</div><div class='add'>+   xdp710</div><div class='ctx'>    xdpe12284</div><div class='ctx'>    xdpe152c4</div><div class='ctx'>    zl6100</div><div class='head'>diff --git a/Documentation/hwmon/lm70.rst b/Documentation/hwmon/lm70.rst<br/>index 11303a7e16a8..02ed60dddffb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/lm70.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/lm70.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/lm70.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/lm70.rst</a></div><div class='hunk'>@@ -5,7 +5,7 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>   * National Semiconductor LM70</div><div class='ctx'> </div><div class='del'>-    Datasheet: http://www.national.com/pf/LM/LM70.html</div><div class='add'>+    Datasheet: https://www.ti.com/product/LM70</div><div class='ctx'> </div><div class='ctx'>   * Texas Instruments TMP121/TMP123</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/nzxt-kraken3.rst b/Documentation/hwmon/nzxt-kraken3.rst<br/>index 90fd9dec15ff..57fe99d23301 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/nzxt-kraken3.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/nzxt-kraken3.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/nzxt-kraken3.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/nzxt-kraken3.rst</a></div><div class='hunk'>@@ -11,17 +11,20 @@ Supported devices:</div><div class='ctx'> * NZXT Kraken Z53</div><div class='ctx'> * NZXT Kraken Z63</div><div class='ctx'> * NZXT Kraken Z73</div><div class='add'>+* NZXT Kraken 2023</div><div class='add'>+* NZXT Kraken 2023 Elite</div><div class='ctx'> </div><div class='ctx'> Author: Jonas Malaco, Aleksa Savic</div><div class='ctx'> </div><div class='ctx'> Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-This driver enables hardware monitoring support for NZXT Kraken X53/X63/X73 and</div><div class='del'>-Z53/Z63/Z73 all-in-one CPU liquid coolers. All models expose liquid temperature</div><div class='del'>-and pump speed (in RPM), as well as PWM control (either as a fixed value</div><div class='del'>-or through a temp-PWM curve). The Z-series models additionally expose the speed</div><div class='del'>-and duty of an optionally connected fan, with the same PWM control capabilities.</div><div class='add'>+This driver enables hardware monitoring support for NZXT Kraken X53/X63/X73,</div><div class='add'>+Z53/Z63/Z73 and Kraken 2023 (standard and Elite) all-in-one CPU liquid coolers.</div><div class='add'>+All models expose liquid temperature and pump speed (in RPM), as well as PWM</div><div class='add'>+control (either as a fixed value or through a temp-PWM curve). The Z-series and</div><div class='add'>+Kraken 2023 models additionally expose the speed and duty of an optionally connected</div><div class='add'>+fan, with the same PWM control capabilities.</div><div class='ctx'> </div><div class='ctx'> Pump and fan duty control mode can be set through pwm[1-2]_enable, where 1 is</div><div class='ctx'> for the manual control mode and 2 is for the liquid temp to PWM curve mode.</div><div class='hunk'>@@ -39,9 +42,9 @@ The devices can report if they are faulty. The driver supports that situation</div><div class='ctx'> and will issue a warning. This can also happen when the USB cable is connected,</div><div class='ctx'> but SATA power is not.</div><div class='ctx'> </div><div class='del'>-The addressable RGB LEDs and LCD screen (only on Z-series models) are not</div><div class='del'>-supported in this driver, but can be controlled through existing userspace tools,</div><div class='del'>-such as `liquidctl`_.</div><div class='add'>+The addressable RGB LEDs and LCD screen (only on Z-series and Kraken 2023 models)</div><div class='add'>+are not supported in this driver, but can be controlled through existing userspace</div><div class='add'>+tools, such as `liquidctl`_.</div><div class='ctx'> </div><div class='ctx'> .. _liquidctl: https://github.com/liquidctl/liquidctl</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/pmbus.rst b/Documentation/hwmon/pmbus.rst<br/>index eb1569bfa676..d477124cf67f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/pmbus.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/hwmon/pmbus.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/pmbus.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/pmbus.rst</a></div><div class='hunk'>@@ -152,7 +152,7 @@ Emerson DS1200 power modules might look as follows::</div><div class='ctx'>   }</div><div class='ctx'> </div><div class='ctx'>   static const struct i2c_device_id ds1200_id[] = {</div><div class='del'>-	{"ds1200", 0},</div><div class='add'>+	{"ds1200"},</div><div class='ctx'> 	{}</div><div class='ctx'>   };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/xdp710.rst b/Documentation/hwmon/xdp710.rst<br/>new file mode 100644<br/>index 000000000000..083891f27818<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/xdp710.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/hwmon/xdp710.rst</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver xdp710</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * Infineon XDP710</div><div class='add'>+</div><div class='add'>+    Prefix: 'xdp710'</div><div class='add'>+</div><div class='add'>+  * Datasheet</div><div class='add'>+</div><div class='add'>+    Publicly available at the Infineon website : https://www.infineon.com/dgdl/Infineon-XDP710-001-DataSheet-v01_00-EN.pdf?fileId=8ac78c8c8412f8d301848a5316290b97</div><div class='add'>+</div><div class='add'>+Author:</div><div class='add'>+</div><div class='add'>+	Peter Yin &lt;peteryin.openbmc@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver implements support for Infineon XDP710 Hot-Swap Controller.</div><div class='add'>+</div><div class='add'>+Device compliant with:</div><div class='add'>+</div><div class='add'>+- PMBus rev 1.3 interface.</div><div class='add'>+</div><div class='add'>+Device supports direct and linear format for reading input voltage,</div><div class='add'>+output voltage, output current, input power and temperature.</div><div class='add'>+</div><div class='add'>+The driver exports the following attributes via the 'sysfs' files</div><div class='add'>+for input voltage:</div><div class='add'>+</div><div class='add'>+**in1_input**</div><div class='add'>+</div><div class='add'>+**in1_label**</div><div class='add'>+</div><div class='add'>+**in1_max**</div><div class='add'>+</div><div class='add'>+**in1_max_alarm**</div><div class='add'>+</div><div class='add'>+**in1_min**</div><div class='add'>+</div><div class='add'>+**in1_min_alarm**</div><div class='add'>+</div><div class='add'>+The driver provides the following attributes for output voltage:</div><div class='add'>+</div><div class='add'>+**in2_input**</div><div class='add'>+</div><div class='add'>+**in2_label**</div><div class='add'>+</div><div class='add'>+**in2_alarm**</div><div class='add'>+</div><div class='add'>+The driver provides the following attributes for output current:</div><div class='add'>+</div><div class='add'>+**curr1_input**</div><div class='add'>+</div><div class='add'>+**curr1_label**</div><div class='add'>+</div><div class='add'>+**curr1_alarm**</div><div class='add'>+</div><div class='add'>+**curr1_max**</div><div class='add'>+</div><div class='add'>+The driver provides the following attributes for input power:</div><div class='add'>+</div><div class='add'>+**power1_input**</div><div class='add'>+</div><div class='add'>+**power1_label**</div><div class='add'>+</div><div class='add'>+**power1_alarm**</div><div class='add'>+</div><div class='add'>+The driver provides the following attributes for temperature:</div><div class='add'>+</div><div class='add'>+**temp1_input**</div><div class='add'>+</div><div class='add'>+**temp1_max**</div><div class='add'>+</div><div class='add'>+**temp1_max_alarm**</div><div class='add'>+</div><div class='add'>+**temp1_crit**</div><div class='add'>+</div><div class='add'>+**temp1_crit_alarm**</div><div class='head'>diff --git a/Documentation/index.rst b/Documentation/index.rst<br/>index 5298611e00ee..f9f525f4c0dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/index.rst</a></div><div class='hunk'>@@ -107,7 +107,7 @@ Other documentation</div><div class='ctx'> </div><div class='ctx'> There are several unsorted documents that don't seem to fit on other parts</div><div class='ctx'> of the documentation body, or may require some adjustments and/or conversion</div><div class='del'>-to ReStructured Text format, or are simply too old.</div><div class='add'>+to reStructuredText format, or are simply too old.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='head'>diff --git a/Documentation/litmus-tests/README b/Documentation/litmus-tests/README<br/>index 658d37860d39..6c666f3422ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/litmus-tests/README?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/litmus-tests/README</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/litmus-tests/README?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/litmus-tests/README</a></div><div class='hunk'>@@ -21,6 +21,51 @@ Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus</div><div class='ctx'>     Test that atomic_set() cannot break the atomicity of atomic RMWs.</div><div class='ctx'>     NOTE: Require herd7 7.56 or later which supports "(void)expr".</div><div class='ctx'> </div><div class='add'>+cmpxchg-fail-ordered-1.litmus</div><div class='add'>+    Demonstrate that a failing cmpxchg() operation acts as a full barrier</div><div class='add'>+    when followed by smp_mb__after_atomic().</div><div class='add'>+</div><div class='add'>+cmpxchg-fail-ordered-2.litmus</div><div class='add'>+    Demonstrate that a failing cmpxchg() operation acts as an acquire</div><div class='add'>+    operation when followed by smp_mb__after_atomic().</div><div class='add'>+</div><div class='add'>+cmpxchg-fail-unordered-1.litmus</div><div class='add'>+    Demonstrate that a failing cmpxchg() operation does not act as a</div><div class='add'>+    full barrier.</div><div class='add'>+</div><div class='add'>+cmpxchg-fail-unordered-2.litmus</div><div class='add'>+    Demonstrate that a failing cmpxchg() operation does not act as an</div><div class='add'>+    acquire operation.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+locking (/locking directory)</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+DCL-broken.litmus</div><div class='add'>+    Demonstrates that double-checked locking needs more than just</div><div class='add'>+    the obvious lock acquisitions and releases.</div><div class='add'>+</div><div class='add'>+DCL-fixed.litmus</div><div class='add'>+    Demonstrates corrected double-checked locking that uses</div><div class='add'>+    smp_store_release() and smp_load_acquire() in addition to the</div><div class='add'>+    obvious lock acquisitions and releases.</div><div class='add'>+</div><div class='add'>+RM-broken.litmus</div><div class='add'>+    Demonstrates problems with "roach motel" locking, where code is</div><div class='add'>+    freely moved into lock-based critical sections.  This example also</div><div class='add'>+    shows how to use the "filter" clause to discard executions that</div><div class='add'>+    would be excluded by other code not modeled in the litmus test.</div><div class='add'>+    Note also that this "roach motel" optimization is emulated by</div><div class='add'>+    physically moving P1()'s two reads from x under the lock.</div><div class='add'>+</div><div class='add'>+    What is a roach motel?  This is from an old advertisement for</div><div class='add'>+    a cockroach trap, much later featured in one of the "Men in</div><div class='add'>+    Black" movies.  "The roaches check in.  They don't check out."</div><div class='add'>+</div><div class='add'>+RM-fixed.litmus</div><div class='add'>+    The counterpart to RM-broken.litmus, showing P0()'s two loads from</div><div class='add'>+    x safely outside of the critical section.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> RCU (/rcu directory)</div><div class='ctx'> --------------------</div><div class='head'>diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmus b/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmus<br/>new file mode 100644<br/>index 000000000000..c0f93dc07105<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmus?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-1.litmus</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+C cmpxchg-fail-ordered-1</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Never</div><div class='add'>+ *</div><div class='add'>+ * Demonstrate that a failing cmpxchg() operation will act as a full</div><div class='add'>+ * barrier when followed by smp_mb__after_atomic().</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{}</div><div class='add'>+</div><div class='add'>+P0(int *x, int *y, int *z)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(*x, 1);</div><div class='add'>+	r1 = cmpxchg(z, 1, 0);</div><div class='add'>+	smp_mb__after_atomic();</div><div class='add'>+	r0 = READ_ONCE(*y);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *x, int *y, int *z)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(*y, 1);</div><div class='add'>+	r1 = cmpxchg(z, 1, 0);</div><div class='add'>+	smp_mb__after_atomic();</div><div class='add'>+	r0 = READ_ONCE(*x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+locations[0:r1;1:r1]</div><div class='add'>+exists (0:r0=0 /\ 1:r0=0)</div><div class='head'>diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus b/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus<br/>new file mode 100644<br/>index 000000000000..5c06054f4694<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/litmus-tests/atomic/cmpxchg-fail-ordered-2.litmus</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+C cmpxchg-fail-ordered-2</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Never</div><div class='add'>+ *</div><div class='add'>+ * Demonstrate use of smp_mb__after_atomic() to make a failing cmpxchg</div><div class='add'>+ * operation have acquire ordering.</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{}</div><div class='add'>+</div><div class='add'>+P0(int *x, int *y)</div><div class='add'>+{</div><div class='add'>+	int r1;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(*x, 1);</div><div class='add'>+	r1 = cmpxchg(y, 0, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *x, int *y)</div><div class='add'>+{</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r1 = cmpxchg(y, 0, 1);</div><div class='add'>+	smp_mb__after_atomic();</div><div class='add'>+	r2 = READ_ONCE(*x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+exists (0:r1=0 /\ 1:r1=1 /\ 1:r2=0)</div><div class='head'>diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus b/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus<br/>new file mode 100644<br/>index 000000000000..39ea1f56a28d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-1.litmus</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+C cmpxchg-fail-unordered-1</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Sometimes</div><div class='add'>+ *</div><div class='add'>+ * Demonstrate that a failing cmpxchg() operation does not act as a</div><div class='add'>+ * full barrier.  (In contrast, a successful cmpxchg() does act as a</div><div class='add'>+ * full barrier.)</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{}</div><div class='add'>+</div><div class='add'>+P0(int *x, int *y, int *z)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(*x, 1);</div><div class='add'>+	r1 = cmpxchg(z, 1, 0);</div><div class='add'>+	r0 = READ_ONCE(*y);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *x, int *y, int *z)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(*y, 1);</div><div class='add'>+	r1 = cmpxchg(z, 1, 0);</div><div class='add'>+	r0 = READ_ONCE(*x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+locations[0:r1;1:r1]</div><div class='add'>+exists (0:r0=0 /\ 1:r0=0)</div><div class='head'>diff --git a/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.litmus b/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.litmus<br/>new file mode 100644<br/>index 000000000000..61aab24a4a64<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.litmus?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/litmus-tests/atomic/cmpxchg-fail-unordered-2.litmus</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+C cmpxchg-fail-unordered-2</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Sometimes</div><div class='add'>+ *</div><div class='add'>+ * Demonstrate that a failing cmpxchg() operation does not act as either</div><div class='add'>+ * an acquire release operation.  (In contrast, a successful cmpxchg()</div><div class='add'>+ * does act as both an acquire and a release operation.)</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{}</div><div class='add'>+</div><div class='add'>+P0(int *x, int *y)</div><div class='add'>+{</div><div class='add'>+	int r1;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(*x, 1);</div><div class='add'>+	r1 = cmpxchg(y, 0, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *x, int *y)</div><div class='add'>+{</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r1 = cmpxchg(y, 0, 1);</div><div class='add'>+	r2 = READ_ONCE(*x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+exists (0:r1=0 /\ 1:r1=1 /\ 1:r2=0)</div><div class='head'>diff --git a/Documentation/mm/page_frags.rst b/Documentation/mm/page_frags.rst<br/>index a81617e688a8..503ca6cdb804 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/mm/page_frags.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/mm/page_frags.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/mm/page_frags.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/mm/page_frags.rst</a></div><div class='hunk'>@@ -25,7 +25,7 @@ to be disabled when executing the fragment allocation.</div><div class='ctx'> The network stack uses two separate caches per CPU to handle fragment</div><div class='ctx'> allocation.  The netdev_alloc_cache is used by callers making use of the</div><div class='ctx'> netdev_alloc_frag and __netdev_alloc_skb calls.  The napi_alloc_cache is</div><div class='del'>-used by callers of the __napi_alloc_frag and __napi_alloc_skb calls.  The</div><div class='add'>+used by callers of the __napi_alloc_frag and napi_alloc_skb calls.  The</div><div class='ctx'> main difference between these two calls is the context in which they may be</div><div class='ctx'> called.  The "netdev" prefixed functions are usable in any context as these</div><div class='ctx'> functions will disable interrupts, while the "napi" prefixed functions are</div><div class='head'>diff --git a/Documentation/mm/slub.rst b/Documentation/mm/slub.rst<br/>index b517ee28a955..60d350d08362 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/mm/slub.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/mm/slub.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/mm/slub.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/mm/slub.rst</a></div><div class='hunk'>@@ -80,7 +80,7 @@ to the dentry cache with::</div><div class='ctx'> </div><div class='ctx'> Debugging options may require the minimum possible slab order to increase as</div><div class='ctx'> a result of storing the metadata (for example, caches with PAGE_SIZE object</div><div class='del'>-sizes).  This has a higher liklihood of resulting in slab allocation errors</div><div class='add'>+sizes).  This has a higher likelihood of resulting in slab allocation errors</div><div class='ctx'> in low memory situations or if there's high fragmentation of memory.  To</div><div class='ctx'> switch off debugging for such caches by default, use::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/netlink/genetlink-c.yaml b/Documentation/netlink/genetlink-c.yaml<br/>index 4dfd899a1661..4f803eaac6d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-c.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/genetlink-c.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-c.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/genetlink-c.yaml</a></div><div class='hunk'>@@ -158,7 +158,7 @@ properties:</div><div class='ctx'>               type: &amp;attr-type</div><div class='ctx'>                 enum: [ unused, pad, flag, binary,</div><div class='ctx'>                         uint, sint, u8, u16, u32, u64, s32, s64,</div><div class='del'>-                        string, nest, array-nest, nest-type-value ]</div><div class='add'>+                        string, nest, indexed-array, nest-type-value ]</div><div class='ctx'>               doc:</div><div class='ctx'>                 description: Documentation of the attribute.</div><div class='ctx'>                 type: string</div><div class='head'>diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml<br/>index b48ad3b1cc32..8db0e22fa72c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-legacy.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/genetlink-legacy.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-legacy.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/genetlink-legacy.yaml</a></div><div class='hunk'>@@ -201,7 +201,7 @@ properties:</div><div class='ctx'>                 description: The netlink attribute type</div><div class='ctx'>                 enum: [ unused, pad, flag, binary, bitfield32,</div><div class='ctx'>                         uint, sint, u8, u16, u32, u64, s32, s64,</div><div class='del'>-                        string, nest, array-nest, nest-type-value ]</div><div class='add'>+                        string, nest, indexed-array, nest-type-value ]</div><div class='ctx'>               doc:</div><div class='ctx'>                 description: Documentation of the attribute.</div><div class='ctx'>                 type: string</div><div class='head'>diff --git a/Documentation/netlink/genetlink.yaml b/Documentation/netlink/genetlink.yaml<br/>index ebd6ee743fcc..b036227b46f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/genetlink.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/genetlink.yaml</a></div><div class='hunk'>@@ -124,7 +124,7 @@ properties:</div><div class='ctx'>               type: &amp;attr-type</div><div class='ctx'>                 enum: [ unused, pad, flag, binary,</div><div class='ctx'>                         uint, sint, u8, u16, u32, u64, s32, s64,</div><div class='del'>-                        string, nest, array-nest, nest-type-value ]</div><div class='add'>+                        string, nest, indexed-array, nest-type-value ]</div><div class='ctx'>               doc:</div><div class='ctx'>                 description: Documentation of the attribute.</div><div class='ctx'>                 type: string</div><div class='head'>diff --git a/Documentation/netlink/netlink-raw.yaml b/Documentation/netlink/netlink-raw.yaml<br/>index a76e54cbadbc..914aa1c0a273 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/netlink-raw.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/netlink-raw.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/netlink-raw.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/netlink-raw.yaml</a></div><div class='hunk'>@@ -222,7 +222,7 @@ properties:</div><div class='ctx'>                 description: The netlink attribute type</div><div class='ctx'>                 enum: [ unused, pad, flag, binary, bitfield32,</div><div class='ctx'>                         u8, u16, u32, u64, s8, s16, s32, s64,</div><div class='del'>-                        string, nest, array-nest, nest-type-value,</div><div class='add'>+                        string, nest, indexed-array, nest-type-value,</div><div class='ctx'>                         sub-message ]</div><div class='ctx'>               doc:</div><div class='ctx'>                 description: Documentation of the attribute.</div><div class='head'>diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml<br/>index 197208f419dc..00dc61358be8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ethtool.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/specs/ethtool.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ethtool.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/ethtool.yaml</a></div><div class='hunk'>@@ -16,6 +16,10 @@ definitions:</div><div class='ctx'>     name: stringset</div><div class='ctx'>     type: enum</div><div class='ctx'>     entries: []</div><div class='add'>+  -</div><div class='add'>+    name: header-flags</div><div class='add'>+    type: flags</div><div class='add'>+    entries: [ compact-bitsets, omit-reply, stats ]</div><div class='ctx'> </div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='hunk'>@@ -30,6 +34,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: flags</div><div class='ctx'>         type: u32</div><div class='add'>+        enum: header-flags</div><div class='ctx'> </div><div class='ctx'>   -</div><div class='ctx'>     name: bitset-bit</div><div class='hunk'>@@ -560,6 +565,18 @@ attribute-sets:</div><div class='ctx'>         name: tx-lpi-timer</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='add'>+    name: ts-stat</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: tx-pkts</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-lost</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-err</div><div class='add'>+        type: uint</div><div class='add'>+  -</div><div class='ctx'>     name: tsinfo</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='hunk'>@@ -581,6 +598,10 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: phc-index</div><div class='ctx'>         type: u32</div><div class='add'>+      -</div><div class='add'>+        name: stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: ts-stat</div><div class='ctx'>   -</div><div class='ctx'>     name: cable-result</div><div class='ctx'>     attributes:</div><div class='hunk'>@@ -878,17 +899,29 @@ attribute-sets:</div><div class='ctx'>         type: nest</div><div class='ctx'>         nested-attributes: header</div><div class='ctx'>       -</div><div class='del'>-        name: admin-state</div><div class='add'>+        name: podl-pse-admin-state</div><div class='add'>+        type: u32</div><div class='add'>+        name-prefix: ethtool-a-</div><div class='add'>+      -</div><div class='add'>+        name: podl-pse-admin-control</div><div class='add'>+        type: u32</div><div class='add'>+        name-prefix: ethtool-a-</div><div class='add'>+      -</div><div class='add'>+        name: podl-pse-pw-d-status</div><div class='add'>+        type: u32</div><div class='add'>+        name-prefix: ethtool-a-</div><div class='add'>+      -</div><div class='add'>+        name: c33-pse-admin-state</div><div class='ctx'>         type: u32</div><div class='del'>-        name-prefix: ethtool-a-podl-pse-</div><div class='add'>+        name-prefix: ethtool-a-</div><div class='ctx'>       -</div><div class='del'>-        name: admin-control</div><div class='add'>+        name: c33-pse-admin-control</div><div class='ctx'>         type: u32</div><div class='del'>-        name-prefix: ethtool-a-podl-pse-</div><div class='add'>+        name-prefix: ethtool-a-</div><div class='ctx'>       -</div><div class='del'>-        name: pw-d-status</div><div class='add'>+        name: c33-pse-pw-d-status</div><div class='ctx'>         type: u32</div><div class='del'>-        name-prefix: ethtool-a-podl-pse-</div><div class='add'>+        name-prefix: ethtool-a-</div><div class='ctx'>   -</div><div class='ctx'>     name: rss</div><div class='ctx'>     attributes:</div><div class='hunk'>@@ -1388,6 +1421,7 @@ operations:</div><div class='ctx'>             - tx-types</div><div class='ctx'>             - rx-filters</div><div class='ctx'>             - phc-index</div><div class='add'>+            - stats</div><div class='ctx'>       dump: *tsinfo-get-op</div><div class='ctx'>     -</div><div class='ctx'>       name: cable-test-act</div><div class='hunk'>@@ -1571,9 +1605,12 @@ operations:</div><div class='ctx'>         reply:</div><div class='ctx'>           attributes: &amp;pse</div><div class='ctx'>             - header</div><div class='del'>-            - admin-state</div><div class='del'>-            - admin-control</div><div class='del'>-            - pw-d-status</div><div class='add'>+            - podl-pse-admin-state</div><div class='add'>+            - podl-pse-admin-control</div><div class='add'>+            - podl-pse-pw-d-status</div><div class='add'>+            - c33-pse-admin-state</div><div class='add'>+            - c33-pse-admin-control</div><div class='add'>+            - c33-pse-pw-d-status</div><div class='ctx'>       dump: *pse-get-op</div><div class='ctx'>     -</div><div class='ctx'>       name: pse-set</div><div class='head'>diff --git a/Documentation/netlink/specs/netdev.yaml b/Documentation/netlink/specs/netdev.yaml<br/>index 76352dbd2be4..11a32373365a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/netdev.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/specs/netdev.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/netdev.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/netdev.yaml</a></div><div class='hunk'>@@ -335,6 +335,124 @@ attribute-sets:</div><div class='ctx'>           Allocation failure may, or may not result in a packet drop, depending</div><div class='ctx'>           on driver implementation and whether system recovers quickly.</div><div class='ctx'>         type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-drops</div><div class='add'>+        doc: |</div><div class='add'>+          Number of all packets which entered the device, but never left it,</div><div class='add'>+          including but not limited to: packets dropped due to lack of buffer</div><div class='add'>+          space, processing errors, explicit or implicit policies and packet</div><div class='add'>+          filters.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-drop-overruns</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets dropped due to transient lack of resources, such as</div><div class='add'>+          buffer space, host descriptors etc.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-csum-unnecessary</div><div class='add'>+        doc: Number of packets that were marked as CHECKSUM_UNNECESSARY.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-csum-none</div><div class='add'>+        doc: Number of packets that were not checksummed by device.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-csum-bad</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets with bad checksum. The packets are not discarded,</div><div class='add'>+          but still delivered to the stack.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-gro-packets</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets that were coalesced from smaller packets by the device.</div><div class='add'>+          Counts only packets coalesced with the HW-GRO netdevice feature,</div><div class='add'>+          LRO-coalesced packets are not counted.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-gro-bytes</div><div class='add'>+        doc: See `rx-hw-gro-packets`.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-gro-wire-packets</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets that were coalesced to bigger packetss with the HW-GRO</div><div class='add'>+          netdevice feature. LRO-coalesced packets are not counted.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-gro-wire-bytes</div><div class='add'>+        doc: See `rx-hw-gro-wire-packets`.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: rx-hw-drop-ratelimits</div><div class='add'>+        doc: |</div><div class='add'>+          Number of the packets dropped by the device due to the received</div><div class='add'>+          packets bitrate exceeding the device rate limit.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-drops</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets that arrived at the device but never left it,</div><div class='add'>+          encompassing packets dropped for reasons such as processing errors, as</div><div class='add'>+          well as those affected by explicitly defined policies and packet</div><div class='add'>+          filtering criteria.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-drop-errors</div><div class='add'>+        doc: Number of packets dropped because they were invalid or malformed.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-csum-none</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets that did not require the device to calculate the</div><div class='add'>+          checksum.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-needs-csum</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets that required the device to calculate the checksum.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-gso-packets</div><div class='add'>+        doc: |</div><div class='add'>+          Number of packets that necessitated segmentation into smaller packets</div><div class='add'>+          by the device.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-gso-bytes</div><div class='add'>+        doc: See `tx-hw-gso-packets`.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-gso-wire-packets</div><div class='add'>+        doc: |</div><div class='add'>+          Number of wire-sized packets generated by processing</div><div class='add'>+          `tx-hw-gso-packets`</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-gso-wire-bytes</div><div class='add'>+        doc: See `tx-hw-gso-wire-packets`.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-hw-drop-ratelimits</div><div class='add'>+        doc: |</div><div class='add'>+          Number of the packets dropped by the device due to the transmit</div><div class='add'>+          packets bitrate exceeding the device rate limit.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-stop</div><div class='add'>+        doc: |</div><div class='add'>+          Number of times driver paused accepting new tx packets</div><div class='add'>+          from the stack to this queue, because the queue was full.</div><div class='add'>+          Note that if BQL is supported and enabled on the device</div><div class='add'>+          the networking stack will avoid queuing a lot of data at once.</div><div class='add'>+        type: uint</div><div class='add'>+      -</div><div class='add'>+        name: tx-wake</div><div class='add'>+        doc: |</div><div class='add'>+          Number of times driver re-started accepting send</div><div class='add'>+          requests to this queue from the stack.</div><div class='add'>+        type: uint</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   list:</div><div class='hunk'>@@ -486,6 +604,7 @@ operations:</div><div class='ctx'>       dump:</div><div class='ctx'>         request:</div><div class='ctx'>           attributes:</div><div class='add'>+            - ifindex</div><div class='ctx'>             - scope</div><div class='ctx'>         reply:</div><div class='ctx'>           attributes:</div><div class='head'>diff --git a/Documentation/netlink/specs/nftables.yaml b/Documentation/netlink/specs/nftables.yaml<br/>new file mode 100644<br/>index 000000000000..dff2a18f3d90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/nftables.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/nftables.yaml</a></div><div class='hunk'>@@ -0,0 +1,1264 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: nftables</div><div class='add'>+protocol: netlink-raw</div><div class='add'>+protonum: 12</div><div class='add'>+</div><div class='add'>+doc:</div><div class='add'>+  Netfilter nftables configuration over netlink.</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    name: nfgenmsg</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: nfgen-family</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: version</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: res-id</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        type: u16</div><div class='add'>+  -</div><div class='add'>+    name: meta-keys</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      - len</div><div class='add'>+      - protocol</div><div class='add'>+      - priority</div><div class='add'>+      - mark</div><div class='add'>+      - iif</div><div class='add'>+      - oif</div><div class='add'>+      - iifname</div><div class='add'>+      - oifname</div><div class='add'>+      - iftype</div><div class='add'>+      - oiftype</div><div class='add'>+      - skuid</div><div class='add'>+      - skgid</div><div class='add'>+      - nftrace</div><div class='add'>+      - rtclassid</div><div class='add'>+      - secmark</div><div class='add'>+      - nfproto</div><div class='add'>+      - l4-proto</div><div class='add'>+      - bri-iifname</div><div class='add'>+      - bri-oifname</div><div class='add'>+      - pkttype</div><div class='add'>+      - cpu</div><div class='add'>+      - iifgroup</div><div class='add'>+      - oifgroup</div><div class='add'>+      - cgroup</div><div class='add'>+      - prandom</div><div class='add'>+      - secpath</div><div class='add'>+      - iifkind</div><div class='add'>+      - oifkind</div><div class='add'>+      - bri-iifpvid</div><div class='add'>+      - bri-iifvproto</div><div class='add'>+      - time-ns</div><div class='add'>+      - time-day</div><div class='add'>+      - time-hour</div><div class='add'>+      - sdif</div><div class='add'>+      - sdifname</div><div class='add'>+      - bri-broute</div><div class='add'>+  -</div><div class='add'>+    name: cmp-ops</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      - eq</div><div class='add'>+      - neq</div><div class='add'>+      - lt</div><div class='add'>+      - lte</div><div class='add'>+      - gt</div><div class='add'>+      - gte</div><div class='add'>+  -</div><div class='add'>+    name: object-type</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      - unspec</div><div class='add'>+      - counter</div><div class='add'>+      - quota</div><div class='add'>+      - ct-helper</div><div class='add'>+      - limit</div><div class='add'>+      - connlimit</div><div class='add'>+      - tunnel</div><div class='add'>+      - ct-timeout</div><div class='add'>+      - secmark</div><div class='add'>+      - ct-expect</div><div class='add'>+      - synproxy</div><div class='add'>+  -</div><div class='add'>+    name: nat-range-flags</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      - map-ips</div><div class='add'>+      - proto-specified</div><div class='add'>+      - proto-random</div><div class='add'>+      - persistent</div><div class='add'>+      - proto-random-fully</div><div class='add'>+      - proto-offset</div><div class='add'>+      - netmap</div><div class='add'>+  -</div><div class='add'>+    name: table-flags</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      - dormant</div><div class='add'>+      - owner</div><div class='add'>+      - persist</div><div class='add'>+  -</div><div class='add'>+    name: chain-flags</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      - base</div><div class='add'>+      - hw-offload</div><div class='add'>+      - binding</div><div class='add'>+  -</div><div class='add'>+    name: set-flags</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      - anonymous</div><div class='add'>+      - constant</div><div class='add'>+      - interval</div><div class='add'>+      - map</div><div class='add'>+      - timeout</div><div class='add'>+      - eval</div><div class='add'>+      - object</div><div class='add'>+      - concat</div><div class='add'>+      - expr</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: empty-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+  -</div><div class='add'>+    name: batch-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: genid</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: table-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the table</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: bitmask of flags</div><div class='add'>+        enum: table-flags</div><div class='add'>+        enum-as-flags: true</div><div class='add'>+      -</div><div class='add'>+        name: use</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: number of chains in this table</div><div class='add'>+      -</div><div class='add'>+        name: handle</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: numeric handle of the table</div><div class='add'>+      -</div><div class='add'>+        name: userdata</div><div class='add'>+        type: binary</div><div class='add'>+        doc: user data</div><div class='add'>+  -</div><div class='add'>+    name: chain-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: table</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the table containing the chain</div><div class='add'>+      -</div><div class='add'>+        name: handle</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: numeric handle of the chain</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the chain</div><div class='add'>+      -</div><div class='add'>+        name: hook</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: nft-hook-attrs</div><div class='add'>+        doc: hook specification for basechains</div><div class='add'>+      -</div><div class='add'>+        name: policy</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: numeric policy of the chain</div><div class='add'>+      -</div><div class='add'>+        name: use</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: number of references to this chain</div><div class='add'>+      -</div><div class='add'>+        name: type</div><div class='add'>+        type: string</div><div class='add'>+        doc: type name of the chain</div><div class='add'>+      -</div><div class='add'>+        name: counters</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: nft-counter-attrs</div><div class='add'>+        doc: counter specification of the chain</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: chain flags</div><div class='add'>+        enum: chain-flags</div><div class='add'>+        enum-as-flags: true</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: uniquely identifies a chain in a transaction</div><div class='add'>+      -</div><div class='add'>+        name: userdata</div><div class='add'>+        type: binary</div><div class='add'>+        doc: user data</div><div class='add'>+  -</div><div class='add'>+    name: counter-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: bytes</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: packets</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+  -</div><div class='add'>+    name: nft-hook-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: num</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: priority</div><div class='add'>+        type: s32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: dev</div><div class='add'>+        type: string</div><div class='add'>+        doc: net device name</div><div class='add'>+      -</div><div class='add'>+        name: devs</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: hook-dev-attrs</div><div class='add'>+        doc: list of net devices</div><div class='add'>+  -</div><div class='add'>+    name: hook-dev-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='add'>+    name: nft-counter-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: bytes</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: packets</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: rule-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: table</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the table containing the rule</div><div class='add'>+      -</div><div class='add'>+        name: chain</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the chain containing the rule</div><div class='add'>+      -</div><div class='add'>+        name: handle</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: numeric handle of the rule</div><div class='add'>+      -</div><div class='add'>+        name: expressions</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: expr-list-attrs</div><div class='add'>+        doc: list of expressions</div><div class='add'>+      -</div><div class='add'>+        name: compat</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: rule-compat-attrs</div><div class='add'>+        doc: compatibility specifications of the rule</div><div class='add'>+      -</div><div class='add'>+        name: position</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: numeric handle of the previous rule</div><div class='add'>+      -</div><div class='add'>+        name: userdata</div><div class='add'>+        type: binary</div><div class='add'>+        doc: user data</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: uniquely identifies a rule in a transaction</div><div class='add'>+      -</div><div class='add'>+        name: position-id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: transaction unique identifier of the previous rule</div><div class='add'>+      -</div><div class='add'>+        name: chain-id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: add the rule to chain by ID, alternative to chain name</div><div class='add'>+  -</div><div class='add'>+    name: expr-list-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: elem</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: expr-attrs</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='add'>+    name: expr-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the expression type</div><div class='add'>+      -</div><div class='add'>+        name: data</div><div class='add'>+        type: sub-message</div><div class='add'>+        sub-message: expr-ops</div><div class='add'>+        selector: name</div><div class='add'>+        doc: type specific data</div><div class='add'>+  -</div><div class='add'>+    name: rule-compat-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: proto</div><div class='add'>+        type: binary</div><div class='add'>+        doc: numeric value of the handled protocol</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: binary</div><div class='add'>+        doc: bitmask of flags</div><div class='add'>+  -</div><div class='add'>+    name: set-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: table</div><div class='add'>+        type: string</div><div class='add'>+        doc: table name</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        doc: set name</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+        enum: set-flags</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: bitmask of enum nft_set_flags</div><div class='add'>+      -</div><div class='add'>+        name: key-type</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: key data type, informational purpose only</div><div class='add'>+      -</div><div class='add'>+        name: key-len</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: key data length</div><div class='add'>+      -</div><div class='add'>+        name: data-type</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: mapping data type</div><div class='add'>+      -</div><div class='add'>+        name: data-len</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: mapping data length</div><div class='add'>+      -</div><div class='add'>+        name: policy</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: selection policy</div><div class='add'>+      -</div><div class='add'>+        name: desc</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: set-desc-attrs</div><div class='add'>+        doc: set description</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: uniquely identifies a set in a transaction</div><div class='add'>+      -</div><div class='add'>+        name: timeout</div><div class='add'>+        type: u64</div><div class='add'>+        doc: default timeout value</div><div class='add'>+      -</div><div class='add'>+        name: gc-interval</div><div class='add'>+        type: u32</div><div class='add'>+        doc: garbage collection interval</div><div class='add'>+      -</div><div class='add'>+        name: userdata</div><div class='add'>+        type: binary</div><div class='add'>+        doc: user data</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: obj-type</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: stateful object type</div><div class='add'>+      -</div><div class='add'>+        name: handle</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: set handle</div><div class='add'>+      -</div><div class='add'>+        name: expr</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: expr-attrs</div><div class='add'>+        doc: set expression</div><div class='add'>+        multi-attr: true</div><div class='add'>+      -</div><div class='add'>+        name: expressions</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: set-list-attrs</div><div class='add'>+        doc: list of expressions</div><div class='add'>+  -</div><div class='add'>+    name: set-desc-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: size</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: number of elements in set</div><div class='add'>+      -</div><div class='add'>+        name: concat</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: set-desc-concat-attrs</div><div class='add'>+        doc: description of field concatenation</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='add'>+    name: set-desc-concat-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: elem</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: set-field-attrs</div><div class='add'>+  -</div><div class='add'>+    name: set-field-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: len</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: set-list-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: elem</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: expr-attrs</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='add'>+    name: setelem-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: key</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: data-attrs</div><div class='add'>+        doc: key value</div><div class='add'>+      -</div><div class='add'>+        name: data</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: data-attrs</div><div class='add'>+        doc: data value of mapping</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: binary</div><div class='add'>+        doc: bitmask of nft_set_elem_flags</div><div class='add'>+      -</div><div class='add'>+        name: timeout</div><div class='add'>+        type: u64</div><div class='add'>+        doc: timeout value</div><div class='add'>+      -</div><div class='add'>+        name: expiration</div><div class='add'>+        type: u64</div><div class='add'>+        doc: expiration time</div><div class='add'>+      -</div><div class='add'>+        name: userdata</div><div class='add'>+        type: binary</div><div class='add'>+        doc: user data</div><div class='add'>+      -</div><div class='add'>+        name: expr</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: expr-attrs</div><div class='add'>+        doc: expression</div><div class='add'>+      -</div><div class='add'>+        name: objref</div><div class='add'>+        type: string</div><div class='add'>+        doc: stateful object reference</div><div class='add'>+      -</div><div class='add'>+        name: key-end</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: data-attrs</div><div class='add'>+        doc: closing key value</div><div class='add'>+      -</div><div class='add'>+        name: expressions</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: expr-list-attrs</div><div class='add'>+        doc: list of expressions</div><div class='add'>+  -</div><div class='add'>+    name: setelem-list-elem-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: elem</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: setelem-attrs</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='add'>+    name: setelem-list-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: table</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: set</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: elements</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: setelem-list-elem-attrs</div><div class='add'>+      -</div><div class='add'>+        name: set-id</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: gen-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: ruleset generation id</div><div class='add'>+      -</div><div class='add'>+        name: proc-pid</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: proc-name</div><div class='add'>+        type: string</div><div class='add'>+  -</div><div class='add'>+    name: obj-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: table</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of the table containing the expression</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        doc: name of this expression type</div><div class='add'>+      -</div><div class='add'>+        name: type</div><div class='add'>+        type: u32</div><div class='add'>+        enum: object-type</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: stateful object type</div><div class='add'>+      -</div><div class='add'>+        name: data</div><div class='add'>+        type: sub-message</div><div class='add'>+        sub-message: obj-data</div><div class='add'>+        selector: type</div><div class='add'>+        doc: stateful object data</div><div class='add'>+      -</div><div class='add'>+        name: use</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: number of references to this expression</div><div class='add'>+      -</div><div class='add'>+        name: handle</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        doc: object handle</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: userdata</div><div class='add'>+        type: binary</div><div class='add'>+        doc: user data</div><div class='add'>+  -</div><div class='add'>+    name: quota-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: bytes</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: flags # TODO</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: consumed</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: flowtable-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: table</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: hook</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: flowtable-hook-attrs</div><div class='add'>+      -</div><div class='add'>+        name: use</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: handle</div><div class='add'>+        type: u64</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: flowtable-hook-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: num</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: priority</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: devs</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: hook-dev-attrs</div><div class='add'>+  -</div><div class='add'>+    name: expr-cmp-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: sreg</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: op</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        enum: cmp-ops</div><div class='add'>+      -</div><div class='add'>+        name: data</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: data-attrs</div><div class='add'>+  -</div><div class='add'>+    name: data-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: value</div><div class='add'>+        type: binary</div><div class='add'>+        # sub-type: u8</div><div class='add'>+      -</div><div class='add'>+        name: verdict</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: verdict-attrs</div><div class='add'>+  -</div><div class='add'>+    name: verdict-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: code</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: chain</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: chain-id</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: expr-counter-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: bytes</div><div class='add'>+        type: u64</div><div class='add'>+        doc: Number of bytes</div><div class='add'>+      -</div><div class='add'>+        name: packets</div><div class='add'>+        type: u64</div><div class='add'>+        doc: Number of packets</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+  -</div><div class='add'>+    name: expr-flow-offload-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        doc: Flow offload table name</div><div class='add'>+  -</div><div class='add'>+    name: expr-immediate-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: dreg</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: data</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: data-attrs</div><div class='add'>+  -</div><div class='add'>+    name: expr-meta-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: dreg</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: key</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        enum: meta-keys</div><div class='add'>+      -</div><div class='add'>+        name: sreg</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: expr-nat-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: type</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: family</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: reg-addr-min</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: reg-addr-max</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: reg-proto-min</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: reg-proto-max</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        enum: nat-range-flags</div><div class='add'>+        enum-as-flags: true</div><div class='add'>+  -</div><div class='add'>+    name: expr-payload-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: dreg</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: base</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: offset</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: len</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: sreg</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: csum-type</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: csum-offset</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: csum-flags</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: expr-tproxy-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: family</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: reg-addr</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: reg-port</div><div class='add'>+        type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+</div><div class='add'>+sub-messages:</div><div class='add'>+  -</div><div class='add'>+    name: expr-ops</div><div class='add'>+    formats:</div><div class='add'>+      -</div><div class='add'>+        value: bitwise # TODO</div><div class='add'>+      -</div><div class='add'>+        value: cmp</div><div class='add'>+        attribute-set: expr-cmp-attrs</div><div class='add'>+      -</div><div class='add'>+        value: counter</div><div class='add'>+        attribute-set: expr-counter-attrs</div><div class='add'>+      -</div><div class='add'>+        value: ct # TODO</div><div class='add'>+      -</div><div class='add'>+        value: flow_offload</div><div class='add'>+        attribute-set: expr-flow-offload-attrs</div><div class='add'>+      -</div><div class='add'>+        value: immediate</div><div class='add'>+        attribute-set: expr-immediate-attrs</div><div class='add'>+      -</div><div class='add'>+        value: lookup # TODO</div><div class='add'>+      -</div><div class='add'>+        value: meta</div><div class='add'>+        attribute-set: expr-meta-attrs</div><div class='add'>+      -</div><div class='add'>+        value: nat</div><div class='add'>+        attribute-set: expr-nat-attrs</div><div class='add'>+      -</div><div class='add'>+        value: payload</div><div class='add'>+        attribute-set: expr-payload-attrs</div><div class='add'>+      -</div><div class='add'>+        value: tproxy</div><div class='add'>+        attribute-set: expr-tproxy-attrs</div><div class='add'>+  -</div><div class='add'>+    name: obj-data</div><div class='add'>+    formats:</div><div class='add'>+      -</div><div class='add'>+        value: counter</div><div class='add'>+        attribute-set: counter-attrs</div><div class='add'>+      -</div><div class='add'>+        value: quota</div><div class='add'>+        attribute-set: quota-attrs</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  enum-model: directional</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: batch-begin</div><div class='add'>+      doc: Start a batch of operations</div><div class='add'>+      attribute-set: batch-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0x10</div><div class='add'>+          attributes:</div><div class='add'>+            - genid</div><div class='add'>+        reply:</div><div class='add'>+          value: 0x10</div><div class='add'>+          attributes:</div><div class='add'>+            - genid</div><div class='add'>+    -</div><div class='add'>+      name: batch-end</div><div class='add'>+      doc: Finish a batch of operations</div><div class='add'>+      attribute-set: batch-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0x11</div><div class='add'>+          attributes:</div><div class='add'>+            - genid</div><div class='add'>+    -</div><div class='add'>+      name: newtable</div><div class='add'>+      doc: Create a new table.</div><div class='add'>+      attribute-set: table-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa00</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: gettable</div><div class='add'>+      doc: Get / dump tables.</div><div class='add'>+      attribute-set: table-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa01</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa00</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: deltable</div><div class='add'>+      doc: Delete an existing table.</div><div class='add'>+      attribute-set: table-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa02</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroytable</div><div class='add'>+      doc: Delete an existing table with destroy semantics (ignoring ENOENT errors).</div><div class='add'>+      attribute-set: table-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa1a</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: newchain</div><div class='add'>+      doc: Create a new chain.</div><div class='add'>+      attribute-set: chain-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa03</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getchain</div><div class='add'>+      doc: Get / dump chains.</div><div class='add'>+      attribute-set: chain-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa04</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa03</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: delchain</div><div class='add'>+      doc: Delete an existing chain.</div><div class='add'>+      attribute-set: chain-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa05</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroychain</div><div class='add'>+      doc: Delete an existing chain with destroy semantics (ignoring ENOENT errors).</div><div class='add'>+      attribute-set: chain-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa1b</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: newrule</div><div class='add'>+      doc: Create a new rule.</div><div class='add'>+      attribute-set: rule-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa06</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getrule</div><div class='add'>+      doc: Get / dump rules.</div><div class='add'>+      attribute-set: rule-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa07</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa06</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getrule-reset</div><div class='add'>+      doc: Get / dump rules and reset stateful expressions.</div><div class='add'>+      attribute-set: rule-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa19</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa06</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: delrule</div><div class='add'>+      doc: Delete an existing rule.</div><div class='add'>+      attribute-set: rule-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa08</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroyrule</div><div class='add'>+      doc: Delete an existing rule with destroy semantics (ignoring ENOENT errors).</div><div class='add'>+      attribute-set: rule-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa1c</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: newset</div><div class='add'>+      doc: Create a new set.</div><div class='add'>+      attribute-set: set-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa09</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getset</div><div class='add'>+      doc: Get / dump sets.</div><div class='add'>+      attribute-set: set-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa0a</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa09</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: delset</div><div class='add'>+      doc: Delete an existing set.</div><div class='add'>+      attribute-set: set-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa0b</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroyset</div><div class='add'>+      doc: Delete an existing set with destroy semantics (ignoring ENOENT errors).</div><div class='add'>+      attribute-set: set-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa1d</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: newsetelem</div><div class='add'>+      doc: Create a new set element.</div><div class='add'>+      attribute-set: setelem-list-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa0c</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getsetelem</div><div class='add'>+      doc: Get / dump set elements.</div><div class='add'>+      attribute-set: setelem-list-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa0d</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa0c</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getsetelem-reset</div><div class='add'>+      doc: Get / dump set elements and reset stateful expressions.</div><div class='add'>+      attribute-set: setelem-list-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa21</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa0c</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: delsetelem</div><div class='add'>+      doc: Delete an existing set element.</div><div class='add'>+      attribute-set: setelem-list-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa0e</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroysetelem</div><div class='add'>+      doc: Delete an existing set element with destroy semantics.</div><div class='add'>+      attribute-set: setelem-list-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa1e</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getgen</div><div class='add'>+      doc: Get / dump rule-set generation.</div><div class='add'>+      attribute-set: gen-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa10</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa0f</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: newobj</div><div class='add'>+      doc: Create a new stateful object.</div><div class='add'>+      attribute-set: obj-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa12</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getobj</div><div class='add'>+      doc: Get / dump stateful objects.</div><div class='add'>+      attribute-set: obj-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa13</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa12</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: delobj</div><div class='add'>+      doc: Delete an existing stateful object.</div><div class='add'>+      attribute-set: obj-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa14</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroyobj</div><div class='add'>+      doc: Delete an existing stateful object with destroy semantics.</div><div class='add'>+      attribute-set: obj-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa1f</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: newflowtable</div><div class='add'>+      doc: Create a new flow table.</div><div class='add'>+      attribute-set: flowtable-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa16</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: getflowtable</div><div class='add'>+      doc: Get / dump flow tables.</div><div class='add'>+      attribute-set: flowtable-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa17</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          value: 0xa16</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: delflowtable</div><div class='add'>+      doc: Delete an existing flow table.</div><div class='add'>+      attribute-set: flowtable-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa18</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+    -</div><div class='add'>+      name: destroyflowtable</div><div class='add'>+      doc: Delete an existing flow table with destroy semantics.</div><div class='add'>+      attribute-set: flowtable-attrs</div><div class='add'>+      fixed-header: nfgenmsg</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 0xa20</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+</div><div class='add'>+mcast-groups:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: mgmt</div><div class='head'>diff --git a/Documentation/netlink/specs/nlctrl.yaml b/Documentation/netlink/specs/nlctrl.yaml<br/>index b1632b95f725..a36535350bdb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/nlctrl.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/specs/nlctrl.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/nlctrl.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/nlctrl.yaml</a></div><div class='hunk'>@@ -65,11 +65,13 @@ attribute-sets:</div><div class='ctx'>         type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ops</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: op-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: mcast-groups</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: mcast-group-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: policy</div><div class='head'>diff --git a/Documentation/netlink/specs/rt_link.yaml b/Documentation/netlink/specs/rt_link.yaml<br/>index 8e4d19adee8c..de08c12fd56f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_link.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/specs/rt_link.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_link.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/rt_link.yaml</a></div><div class='hunk'>@@ -50,7 +50,16 @@ definitions:</div><div class='ctx'>         name: dormant</div><div class='ctx'>       -</div><div class='ctx'>         name: echo</div><div class='del'>-</div><div class='add'>+  -</div><div class='add'>+    name: vlan-protocols</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: 8021q</div><div class='add'>+        value: 33024</div><div class='add'>+      -</div><div class='add'>+        name: 8021ad</div><div class='add'>+        value: 34984</div><div class='ctx'>   -</div><div class='ctx'>     name: rtgenmsg</div><div class='ctx'>     type: struct</div><div class='hunk'>@@ -729,7 +738,171 @@ definitions:</div><div class='ctx'>       -</div><div class='ctx'>         name: filter-mask</div><div class='ctx'>         type: u32</div><div class='del'>-</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vlan-flags</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+        enum: vlan-flags</div><div class='add'>+        enum-as-flags: true</div><div class='add'>+      -</div><div class='add'>+        name: mask</div><div class='add'>+        type: u32</div><div class='add'>+        display-hint: hex</div><div class='add'>+  -</div><div class='add'>+    name: vlan-flags</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      - reorder-hdr</div><div class='add'>+      - gvrp</div><div class='add'>+      - loose-binding</div><div class='add'>+      - mvrp</div><div class='add'>+      - bridge-binding</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vlan-qos-mapping</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: from</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: to</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-mac</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: mac</div><div class='add'>+        type: binary</div><div class='add'>+        len: 32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-vlan</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: vlan</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: qos</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-tx-rate</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rate</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-spoofchk</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: setting</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-link-state</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: link-state</div><div class='add'>+        type: u32</div><div class='add'>+        enum: ifla-vf-link-state-enum</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-link-state-enum</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      - auto</div><div class='add'>+      - enable</div><div class='add'>+      - disable</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-rate</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: min-tx-rate</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: max-tx-rate</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-rss-query-en</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: setting</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-trust</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: setting</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-guid</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: guid</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vf-vlan-info</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: vf</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: vlan</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: qos</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: vlan-proto</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: rtext-filter</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      - vf</div><div class='add'>+      - brvlan</div><div class='add'>+      - brvlan-compressed</div><div class='add'>+      - skip-stats</div><div class='add'>+      - mrp</div><div class='add'>+      - cfm-config</div><div class='add'>+      - cfm-status</div><div class='add'>+      - mst</div><div class='ctx'> </div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='hunk'>@@ -807,7 +980,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: vfinfo-list</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: vfinfo-attrs</div><div class='add'>+        nested-attributes: vfinfo-list-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: stats64</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -833,6 +1006,8 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: ext-mask</div><div class='ctx'>         type: u32</div><div class='add'>+        enum: rtext-filter</div><div class='add'>+        enum-as-flags: true</div><div class='ctx'>       -</div><div class='ctx'>         name: promiscuity</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -965,8 +1140,106 @@ attribute-sets:</div><div class='ctx'>         value: 45</div><div class='ctx'>         nested-attributes: mctp-attrs</div><div class='ctx'>   -</div><div class='add'>+    name: vfinfo-list-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: info</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: vfinfo-attrs</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='ctx'>     name: vfinfo-attrs</div><div class='del'>-    attributes: []</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: mac</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-mac</div><div class='add'>+      -</div><div class='add'>+        name: vlan</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-vlan</div><div class='add'>+      -</div><div class='add'>+        name: tx-rate</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-tx-rate</div><div class='add'>+      -</div><div class='add'>+        name: spoofchk</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-spoofchk</div><div class='add'>+      -</div><div class='add'>+        name: link-state</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-link-state</div><div class='add'>+      -</div><div class='add'>+        name: rate</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-rate</div><div class='add'>+      -</div><div class='add'>+        name: rss-query-en</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-rss-query-en</div><div class='add'>+      -</div><div class='add'>+        name: stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: vf-stats-attrs</div><div class='add'>+      -</div><div class='add'>+        name: trust</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-trust</div><div class='add'>+      -</div><div class='add'>+        name: ib-node-guid</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-guid</div><div class='add'>+      -</div><div class='add'>+        name: ib-port-guid</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-guid</div><div class='add'>+      -</div><div class='add'>+        name: vlan-list</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: vf-vlan-attrs</div><div class='add'>+      -</div><div class='add'>+        name: broadcast</div><div class='add'>+        type: binary</div><div class='add'>+  -</div><div class='add'>+    name: vf-stats-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: rx-packets</div><div class='add'>+        type: u64</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: tx-packets</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: rx-bytes</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-bytes</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: broadcast</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: multicast</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: rx-dropped</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-dropped</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: vf-vlan-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: info</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vf-vlan-info</div><div class='add'>+        multi-attr: true</div><div class='ctx'>   -</div><div class='ctx'>     name: vf-ports-attrs</div><div class='ctx'>     attributes: []</div><div class='hunk'>@@ -996,6 +1269,165 @@ attribute-sets:</div><div class='ctx'>         sub-message: linkinfo-member-data-msg</div><div class='ctx'>         selector: slave-kind</div><div class='ctx'>   -</div><div class='add'>+    name: linkinfo-bond-attrs</div><div class='add'>+    name-prefix: ifla-bond-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: mode</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: active-slave</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: miimon</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: updelay</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: downdelay</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: use-carrier</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: arp-interval</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: arp-ip-target</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: u32</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        display-hint: ipv4</div><div class='add'>+      -</div><div class='add'>+        name: arp-validate</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: arp-all-targets</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: primary</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: primary-reselect</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: fail-over-mac</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: xmit-hash-policy</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: resend-igmp</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: num-peer-notif</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: all-slaves-active</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: min-links</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: lp-interval</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: packets-per-slave</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: ad-lacp-rate</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: ad-select</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: ad-info</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: bond-ad-info-attrs</div><div class='add'>+      -</div><div class='add'>+        name: ad-actor-sys-prio</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: ad-user-port-key</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: ad-actor-system</div><div class='add'>+        type: binary</div><div class='add'>+        display-hint: mac</div><div class='add'>+      -</div><div class='add'>+        name: tlb-dynamic-lb</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: peer-notif-delay</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: ad-lacp-active</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: missed-max</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: ns-ip6-target</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: binary</div><div class='add'>+        display-hint: ipv6</div><div class='add'>+      -</div><div class='add'>+        name: coupled-control</div><div class='add'>+        type: u8</div><div class='add'>+  -</div><div class='add'>+    name: bond-ad-info-attrs</div><div class='add'>+    name-prefix: ifla-bond-ad-info-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: aggregator</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: num-ports</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: actor-key</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: partner-key</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: partner-mac</div><div class='add'>+        type: binary</div><div class='add'>+        display-hint: mac</div><div class='add'>+  -</div><div class='add'>+    name: bond-slave-attrs</div><div class='add'>+    name-prefix: ifla-bond-slave-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: state</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: mii-status</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: link-failure-count</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: perm-hwaddr</div><div class='add'>+        type: binary</div><div class='add'>+        display-hint: mac</div><div class='add'>+      -</div><div class='add'>+        name: queue-id</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: ad-aggregator-id</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: ad-actor-oper-port-state</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: ad-partner-oper-port-state</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: prio</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='ctx'>     name: linkinfo-bridge-attrs</div><div class='ctx'>     name-prefix: ifla-br-</div><div class='ctx'>     attributes:</div><div class='hunk'>@@ -1144,6 +1576,12 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: mcast-querier-state</div><div class='ctx'>         type: binary</div><div class='add'>+      -</div><div class='add'>+        name: fdb-n-learned</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: fdb-max-learned</div><div class='add'>+        type: u32</div><div class='ctx'>   -</div><div class='ctx'>     name: linkinfo-brport-attrs</div><div class='ctx'>     name-prefix: ifla-brport-</div><div class='hunk'>@@ -1508,6 +1946,39 @@ attribute-sets:</div><div class='ctx'>         name: num-disabled-queues</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='add'>+    name: linkinfo-vlan-attrs</div><div class='add'>+    name-prefix: ifla-vlan-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: flag</div><div class='add'>+        type: binary</div><div class='add'>+        struct: ifla-vlan-flags</div><div class='add'>+      -</div><div class='add'>+        name: egress-qos</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: ifla-vlan-qos</div><div class='add'>+      -</div><div class='add'>+        name: ingress-qos</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: ifla-vlan-qos</div><div class='add'>+      -</div><div class='add'>+        name: protocol</div><div class='add'>+        type: u16</div><div class='add'>+        enum: vlan-protocols</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+  -</div><div class='add'>+    name: ifla-vlan-qos</div><div class='add'>+    name-prefix: ifla-vlan-qos</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: mapping</div><div class='add'>+        type: binary</div><div class='add'>+        multi-attr: true</div><div class='add'>+        struct: ifla-vlan-qos-mapping</div><div class='add'>+  -</div><div class='ctx'>     name: linkinfo-vrf-attrs</div><div class='ctx'>     name-prefix: ifla-vrf-</div><div class='ctx'>     attributes:</div><div class='hunk'>@@ -1617,7 +2088,8 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>       -</div><div class='ctx'>         name: hw-s-info</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: hw-s-info-one</div><div class='ctx'>       -</div><div class='ctx'>         name: l3-stats</div><div class='hunk'>@@ -1643,6 +2115,9 @@ sub-messages:</div><div class='ctx'>     name: linkinfo-data-msg</div><div class='ctx'>     formats:</div><div class='ctx'>       -</div><div class='add'>+        value: bond</div><div class='add'>+        attribute-set: linkinfo-bond-attrs</div><div class='add'>+      -</div><div class='ctx'>         value: bridge</div><div class='ctx'>         attribute-set: linkinfo-bridge-attrs</div><div class='ctx'>       -</div><div class='hunk'>@@ -1667,6 +2142,9 @@ sub-messages:</div><div class='ctx'>         value: tun</div><div class='ctx'>         attribute-set: linkinfo-tun-attrs</div><div class='ctx'>       -</div><div class='add'>+        value: vlan</div><div class='add'>+        attribute-set: linkinfo-vlan-attrs</div><div class='add'>+      -</div><div class='ctx'>         value: vrf</div><div class='ctx'>         attribute-set: linkinfo-vrf-attrs</div><div class='ctx'>   -</div><div class='hunk'>@@ -1677,6 +2155,7 @@ sub-messages:</div><div class='ctx'>         attribute-set: linkinfo-brport-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: bond</div><div class='add'>+        attribute-set: bond-slave-attrs</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   enum-model: directional</div><div class='head'>diff --git a/Documentation/netlink/specs/tc.yaml b/Documentation/netlink/specs/tc.yaml<br/>index 324fa182cd14..8c01e4e13195 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/tc.yaml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/netlink/specs/tc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/tc.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/tc.yaml</a></div><div class='hunk'>@@ -1100,6 +1100,19 @@ definitions:</div><div class='ctx'>         name: offmask</div><div class='ctx'>         type: s32</div><div class='ctx'>   -</div><div class='add'>+    name: tc-u32-mark</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: val</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: mask</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: success</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='ctx'>     name: tc-u32-sel</div><div class='ctx'>     type: struct</div><div class='ctx'>     members:</div><div class='hunk'>@@ -1775,6 +1788,44 @@ attribute-sets:</div><div class='ctx'>         name: key-ex</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='add'>+    name: tc-act-police-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: tbf</div><div class='add'>+        type: binary</div><div class='add'>+        struct: tc-police</div><div class='add'>+      -</div><div class='add'>+        name: rate</div><div class='add'>+        type: binary # TODO</div><div class='add'>+      -</div><div class='add'>+        name: peakrate</div><div class='add'>+        type: binary # TODO</div><div class='add'>+      -</div><div class='add'>+        name: avrate</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: result</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tm</div><div class='add'>+        type: binary</div><div class='add'>+        struct: tcf-t</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: rate64</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: peakrate64</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: pktrate64</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: pktburst64</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='ctx'>     name: tc-act-simple-attrs</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='hunk'>@@ -1937,7 +1988,8 @@ attribute-sets:</div><div class='ctx'>         nested-attributes: tc-ematch-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='hunk'>@@ -2077,7 +2129,8 @@ attribute-sets:</div><div class='ctx'>         type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: tin-stats</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-cake-tin-stats-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: deficit</div><div class='hunk'>@@ -2297,7 +2350,8 @@ attribute-sets:</div><div class='ctx'>         type: string</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: key-eth-dst</div><div class='hunk'>@@ -2798,7 +2852,8 @@ attribute-sets:</div><div class='ctx'>         type: string</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: mask</div><div class='hunk'>@@ -2951,7 +3006,8 @@ attribute-sets:</div><div class='ctx'>         type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: flags</div><div class='hunk'>@@ -3324,7 +3380,8 @@ attribute-sets:</div><div class='ctx'>         nested-attributes: tc-police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-act-attrs</div><div class='ctx'>   -</div><div class='ctx'>     name: tc-taprio-attrs</div><div class='hunk'>@@ -3542,7 +3599,8 @@ attribute-sets:</div><div class='ctx'>         nested-attributes: tc-police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: array-nest</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='ctx'>         nested-attributes: tc-act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: indev</div><div class='head'>diff --git a/Documentation/netlink/specs/team.yaml b/Documentation/netlink/specs/team.yaml<br/>new file mode 100644<br/>index 000000000000..c13529e011c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/team.yaml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/netlink/specs/team.yaml</a></div><div class='hunk'>@@ -0,0 +1,204 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: team</div><div class='add'>+</div><div class='add'>+protocol: genetlink-legacy</div><div class='add'>+</div><div class='add'>+doc: |</div><div class='add'>+  Network team device driver.</div><div class='add'>+</div><div class='add'>+c-family-name: team-genl-name</div><div class='add'>+c-version-name: team-genl-version</div><div class='add'>+kernel-policy: global</div><div class='add'>+uapi-header: linux/if_team.h</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    name: string-max-len</div><div class='add'>+    type: const</div><div class='add'>+    value: 32</div><div class='add'>+  -</div><div class='add'>+    name: genl-change-event-mc-grp-name</div><div class='add'>+    type: const</div><div class='add'>+    value: change_event</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: team</div><div class='add'>+    doc:</div><div class='add'>+      The team nested layout of get/set msg looks like</div><div class='add'>+          [TEAM_ATTR_LIST_OPTION]</div><div class='add'>+              [TEAM_ATTR_ITEM_OPTION]</div><div class='add'>+                  [TEAM_ATTR_OPTION_*], ...</div><div class='add'>+              [TEAM_ATTR_ITEM_OPTION]</div><div class='add'>+                  [TEAM_ATTR_OPTION_*], ...</div><div class='add'>+              ...</div><div class='add'>+          [TEAM_ATTR_LIST_PORT]</div><div class='add'>+              [TEAM_ATTR_ITEM_PORT]</div><div class='add'>+                  [TEAM_ATTR_PORT_*], ...</div><div class='add'>+              [TEAM_ATTR_ITEM_PORT]</div><div class='add'>+                  [TEAM_ATTR_PORT_*], ...</div><div class='add'>+              ...</div><div class='add'>+    name-prefix: team-attr-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: unspec</div><div class='add'>+        type: unused</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: team-ifindex</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: list-option</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: item-option</div><div class='add'>+      -</div><div class='add'>+        name: list-port</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: item-port</div><div class='add'>+  -</div><div class='add'>+    name: item-option</div><div class='add'>+    name-prefix: team-attr-item-</div><div class='add'>+    attr-cnt-name: __team-attr-item-option-max</div><div class='add'>+    attr-max-name: team-attr-item-option-max</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: option-unspec</div><div class='add'>+        type: unused</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: option</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: attr-option</div><div class='add'>+  -</div><div class='add'>+    name: attr-option</div><div class='add'>+    name-prefix: team-attr-option-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: unspec</div><div class='add'>+        type: unused</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+        checks:</div><div class='add'>+          max-len: string-max-len</div><div class='add'>+          unterminated-ok: true</div><div class='add'>+      -</div><div class='add'>+        name: changed</div><div class='add'>+        type: flag</div><div class='add'>+      -</div><div class='add'>+        name: type</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: data</div><div class='add'>+        type: binary</div><div class='add'>+      -</div><div class='add'>+        name: removed</div><div class='add'>+        type: flag</div><div class='add'>+      -</div><div class='add'>+        name: port-ifindex</div><div class='add'>+        type: u32</div><div class='add'>+        doc: for per-port options</div><div class='add'>+      -</div><div class='add'>+        name: array-index</div><div class='add'>+        type: u32</div><div class='add'>+        doc: for array options</div><div class='add'>+  -</div><div class='add'>+    name: item-port</div><div class='add'>+    name-prefix: team-attr-item-</div><div class='add'>+    attr-cnt-name: __team-attr-item-port-max</div><div class='add'>+    attr-max-name: team-attr-item-port-max</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: port-unspec</div><div class='add'>+        type: unused</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: port</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: attr-port</div><div class='add'>+  -</div><div class='add'>+    name: attr-port</div><div class='add'>+    name-prefix: team-attr-port-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: unspec</div><div class='add'>+        type: unused</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: ifindex</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: changed</div><div class='add'>+        type: flag</div><div class='add'>+      -</div><div class='add'>+        name: linkup</div><div class='add'>+        type: flag</div><div class='add'>+      -</div><div class='add'>+        name: speed</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: duplex</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: removed</div><div class='add'>+        type: flag</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: noop</div><div class='add'>+      doc: No operation</div><div class='add'>+      value: 0</div><div class='add'>+      attribute-set: team</div><div class='add'>+      dont-validate: [ strict ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        # Actually it only reply the team netlink family</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - team-ifindex</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: options-set</div><div class='add'>+      doc: Set team options</div><div class='add'>+      attribute-set: team</div><div class='add'>+      dont-validate: [ strict ]</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request: &amp;option_attrs</div><div class='add'>+          attributes:</div><div class='add'>+            - team-ifindex</div><div class='add'>+            - list-option</div><div class='add'>+        reply: *option_attrs</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: options-get</div><div class='add'>+      doc: Get team options info</div><div class='add'>+      attribute-set: team</div><div class='add'>+      dont-validate: [ strict ]</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - team-ifindex</div><div class='add'>+        reply: *option_attrs</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: port-list-get</div><div class='add'>+      doc: Get team ports info</div><div class='add'>+      attribute-set: team</div><div class='add'>+      dont-validate: [ strict ]</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - team-ifindex</div><div class='add'>+        reply: &amp;port_attrs</div><div class='add'>+          attributes:</div><div class='add'>+            - team-ifindex</div><div class='add'>+            - list-port</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst<br/>index f69ee1ebee01..fed821ef9b09 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst</a></div><div class='hunk'>@@ -300,6 +300,11 @@ the software port.</div><div class='ctx'>        in the beginning of the queue. This is a normal condition.</div><div class='ctx'>      - Informative</div><div class='ctx'> </div><div class='add'>+   * - `tx[i]_timestamps`</div><div class='add'>+     - Transmitted packets that were hardware timestamped at the device's DMA</div><div class='add'>+       layer.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='ctx'>    * - `tx[i]_added_vlan_packets`</div><div class='ctx'>      - The number of packets sent where vlan tag insertion was offloaded to the</div><div class='ctx'>        hardware.</div><div class='hunk'>@@ -702,6 +707,12 @@ the software port.</div><div class='ctx'>        the device typically ensures not posting the CQE.</div><div class='ctx'>      - Error</div><div class='ctx'> </div><div class='add'>+   * - `ptp_cq[i]_lost_cqe`</div><div class='add'>+     - Number of times a CQE is expected to not be delivered on the PTP</div><div class='add'>+       timestamping CQE by the device due to a time delta elapsing. If such a</div><div class='add'>+       CQE is somehow delivered, `ptp_cq[i]_late_cqe` is incremented.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='ctx'> .. [#ring_global] The corresponding ring and global counters do not share the</div><div class='ctx'>                   same name (i.e. do not follow the common naming scheme).</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-info.rst b/Documentation/networking/devlink/devlink-info.rst<br/>index 1242b0e6826b..23073bc219d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-info.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/devlink-info.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-info.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/devlink/devlink-info.rst</a></div><div class='hunk'>@@ -146,6 +146,11 @@ board.manufacture</div><div class='ctx'> </div><div class='ctx'> An identifier of the company or the facility which produced the part.</div><div class='ctx'> </div><div class='add'>+board.part_number</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Part number of the board and its components.</div><div class='add'>+</div><div class='ctx'> fw</div><div class='ctx'> --</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-port.rst b/Documentation/networking/devlink/devlink-port.rst<br/>index 562f46b41274..9d22d41a7cd1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-port.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/devlink-port.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-port.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/devlink/devlink-port.rst</a></div><div class='hunk'>@@ -134,6 +134,9 @@ Users may also set the IPsec crypto capability of the function using</div><div class='ctx'> Users may also set the IPsec packet capability of the function using</div><div class='ctx'> `devlink port function set ipsec_packet` command.</div><div class='ctx'> </div><div class='add'>+Users may also set the maximum IO event queues of the function</div><div class='add'>+using `devlink port function set max_io_eqs` command.</div><div class='add'>+</div><div class='ctx'> Function attributes</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='hunk'>@@ -295,6 +298,36 @@ policy is processed in software by the kernel.</div><div class='ctx'>         function:</div><div class='ctx'>             hw_addr 00:00:00:00:00:00 ipsec_packet enabled</div><div class='ctx'> </div><div class='add'>+Maximum IO events queues setup</div><div class='add'>+------------------------------</div><div class='add'>+When user sets maximum number of IO event queues for a SF or</div><div class='add'>+a VF, such function driver is limited to consume only enforced</div><div class='add'>+number of IO event queues.</div><div class='add'>+</div><div class='add'>+IO event queues deliver events related to IO queues, including network</div><div class='add'>+device transmit and receive queues (txq and rxq) and RDMA Queue Pairs (QPs).</div><div class='add'>+For example, the number of netdevice channels and RDMA device completion</div><div class='add'>+vectors are derived from the function's IO event queues. Usually, the number</div><div class='add'>+of interrupt vectors consumed by the driver is limited by the number of IO</div><div class='add'>+event queues per device, as each of the IO event queues is connected to an</div><div class='add'>+interrupt vector.</div><div class='add'>+</div><div class='add'>+- Get maximum IO event queues of the VF device::</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+        function:</div><div class='add'>+            hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 10</div><div class='add'>+</div><div class='add'>+- Set maximum IO event queues of the VF device::</div><div class='add'>+</div><div class='add'>+    $ devlink port function set pci/0000:06:00.0/2 max_io_eqs 32</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+        function:</div><div class='add'>+            hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 32</div><div class='add'>+</div><div class='ctx'> Subfunction</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/hns3.rst b/Documentation/networking/devlink/hns3.rst<br/>index 4562a6e4782f..72bc1b9f3785 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/hns3.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/hns3.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/hns3.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/devlink/hns3.rst</a></div><div class='hunk'>@@ -23,3 +23,8 @@ The ``hns3`` driver reports the following versions</div><div class='ctx'>    * - ``fw``</div><div class='ctx'>      - running</div><div class='ctx'>      - Used to represent the firmware version.</div><div class='add'>+   * - ``fw.scc``</div><div class='add'>+     - running</div><div class='add'>+     - Used to represent the Soft Congestion Control (SSC) firmware version.</div><div class='add'>+       SCC is a firmware component which provides multiple RDMA congestion</div><div class='add'>+       control algorithms, including DCQCN.</div><div class='head'>diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst<br/>index 7f30ebd5debb..830c04354222 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/ice.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/ice.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/ice.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/devlink/ice.rst</a></div><div class='hunk'>@@ -21,6 +21,53 @@ Parameters</div><div class='ctx'>    * - ``enable_iwarp``</div><div class='ctx'>      - runtime</div><div class='ctx'>      - mutually exclusive with ``enable_roce``</div><div class='add'>+   * - ``tx_scheduling_layers``</div><div class='add'>+     - permanent</div><div class='add'>+     - The ice hardware uses hierarchical scheduling for Tx with a fixed</div><div class='add'>+       number of layers in the scheduling tree. Each of them are decision</div><div class='add'>+       points. Root node represents a port, while all the leaves represent</div><div class='add'>+       the queues. This way of configuring the Tx scheduler allows features</div><div class='add'>+       like DCB or devlink-rate (documented below) to configure how much</div><div class='add'>+       bandwidth is given to any given queue or group of queues, enabling</div><div class='add'>+       fine-grained control because scheduling parameters can be configured</div><div class='add'>+       at any given layer of the tree.</div><div class='add'>+</div><div class='add'>+       The default 9-layer tree topology was deemed best for most workloads,</div><div class='add'>+       as it gives an optimal ratio of performance to configurability. However,</div><div class='add'>+       for some specific cases, this 9-layer topology might not be desired.</div><div class='add'>+       One example would be sending traffic to queues that are not a multiple</div><div class='add'>+       of 8. Because the maximum radix is limited to 8 in 9-layer topology,</div><div class='add'>+       the 9th queue has a different parent than the rest, and it's given</div><div class='add'>+       more bandwidth credits. This causes a problem when the system is</div><div class='add'>+       sending traffic to 9 queues:</div><div class='add'>+</div><div class='add'>+       | tx_queue_0_packets: 24163396</div><div class='add'>+       | tx_queue_1_packets: 24164623</div><div class='add'>+       | tx_queue_2_packets: 24163188</div><div class='add'>+       | tx_queue_3_packets: 24163701</div><div class='add'>+       | tx_queue_4_packets: 24163683</div><div class='add'>+       | tx_queue_5_packets: 24164668</div><div class='add'>+       | tx_queue_6_packets: 23327200</div><div class='add'>+       | tx_queue_7_packets: 24163853</div><div class='add'>+       | tx_queue_8_packets: 91101417 &lt; Too much traffic is sent from 9th</div><div class='add'>+</div><div class='add'>+       To address this need, you can switch to a 5-layer topology, which</div><div class='add'>+       changes the maximum topology radix to 512. With this enhancement,</div><div class='add'>+       the performance characteristic is equal as all queues can be assigned</div><div class='add'>+       to the same parent in the tree. The obvious drawback of this solution</div><div class='add'>+       is a lower configuration depth of the tree.</div><div class='add'>+</div><div class='add'>+       Use the ``tx_scheduling_layer`` parameter with the devlink command</div><div class='add'>+       to change the transmit scheduler topology. To use 5-layer topology,</div><div class='add'>+       use a value of 5. For example:</div><div class='add'>+       $ devlink dev param set pci/0000:16:00.0 name tx_scheduling_layers</div><div class='add'>+       value 5 cmode permanent</div><div class='add'>+       Use a value of 9 to set it back to the default value.</div><div class='add'>+</div><div class='add'>+       You must do PCI slot powercycle for the selected topology to take effect.</div><div class='add'>+</div><div class='add'>+       To verify that value has been set:</div><div class='add'>+       $ devlink dev param show pci/0000:16:00.0 name tx_scheduling_layers</div><div class='ctx'> </div><div class='ctx'> Info versions</div><div class='ctx'> =============</div><div class='head'>diff --git a/Documentation/networking/devlink/nfp.rst b/Documentation/networking/devlink/nfp.rst<br/>index a1717db0dfcc..3093642bdae4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/nfp.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/devlink/nfp.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/nfp.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/devlink/nfp.rst</a></div><div class='hunk'>@@ -32,7 +32,7 @@ The ``nfp`` driver reports the following versions</div><div class='ctx'>      - Description</div><div class='ctx'>    * - ``board.id``</div><div class='ctx'>      - fixed</div><div class='del'>-     - Part number identifying the board design</div><div class='add'>+     - Identifier of the board design</div><div class='ctx'>    * - ``board.rev``</div><div class='ctx'>      - fixed</div><div class='ctx'>      - Revision of the board design</div><div class='hunk'>@@ -42,6 +42,9 @@ The ``nfp`` driver reports the following versions</div><div class='ctx'>    * - ``board.model``</div><div class='ctx'>      - fixed</div><div class='ctx'>      - Model name of the board design</div><div class='add'>+   * - ``board.part_number``</div><div class='add'>+     - fixed</div><div class='add'>+     - Part number of the board and its components</div><div class='ctx'>    * - ``fw.bundle_id``</div><div class='ctx'>      - stored, running</div><div class='ctx'>      - Firmware bundle id</div><div class='head'>diff --git a/Documentation/networking/dns_resolver.rst b/Documentation/networking/dns_resolver.rst<br/>index add4d59a99a5..c0364f7070af 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/dns_resolver.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/dns_resolver.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/dns_resolver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/dns_resolver.rst</a></div><div class='hunk'>@@ -118,7 +118,7 @@ Keys of dns_resolver type can be read from userspace using keyctl_read() or</div><div class='ctx'> Mechanism</div><div class='ctx'> =========</div><div class='ctx'> </div><div class='del'>-The dnsresolver module registers a key type called "dns_resolver".  Keys of</div><div class='add'>+The dns_resolver module registers a key type called "dns_resolver".  Keys of</div><div class='ctx'> this type are used to transport and cache DNS lookup results from userspace.</div><div class='ctx'> </div><div class='ctx'> When dns_query() is invoked, it calls request_key() to search the local</div><div class='hunk'>@@ -152,4 +152,4 @@ Debugging</div><div class='ctx'> Debugging messages can be turned on dynamically by writing a 1 into the</div><div class='ctx'> following file::</div><div class='ctx'> </div><div class='del'>-	/sys/module/dnsresolver/parameters/debug</div><div class='add'>+	/sys/module/dns_resolver/parameters/debug</div><div class='head'>diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst<br/>index d583d9abf2f8..160bfb0ae8ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/ethtool-netlink.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/ethtool-netlink.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/ethtool-netlink.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/ethtool-netlink.rst</a></div><div class='hunk'>@@ -1237,12 +1237,21 @@ Kernel response contents:</div><div class='ctx'>   ``ETHTOOL_A_TSINFO_TX_TYPES``          bitset  supported Tx types</div><div class='ctx'>   ``ETHTOOL_A_TSINFO_RX_FILTERS``        bitset  supported Rx filters</div><div class='ctx'>   ``ETHTOOL_A_TSINFO_PHC_INDEX``         u32     PTP hw clock index</div><div class='add'>+  ``ETHTOOL_A_TSINFO_STATS``             nested  HW timestamping statistics</div><div class='ctx'>   =====================================  ======  ==========================</div><div class='ctx'> </div><div class='ctx'> ``ETHTOOL_A_TSINFO_PHC_INDEX`` is absent if there is no associated PHC (there</div><div class='ctx'> is no special value for this case). The bitset attributes are omitted if they</div><div class='ctx'> would be empty (no bit set).</div><div class='ctx'> </div><div class='add'>+Additional hardware timestamping statistics response contents:</div><div class='add'>+</div><div class='add'>+  =====================================  ======  ===================================</div><div class='add'>+  ``ETHTOOL_A_TS_STAT_TX_PKTS``          uint    Packets with Tx HW timestamps</div><div class='add'>+  ``ETHTOOL_A_TS_STAT_TX_LOST``          uint    Tx HW timestamp not arrived count</div><div class='add'>+  ``ETHTOOL_A_TS_STAT_TX_ERR``           uint    HW error request Tx timestamp count</div><div class='add'>+  =====================================  ======  ===================================</div><div class='add'>+</div><div class='ctx'> CABLE_TEST</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='hunk'>@@ -1717,6 +1726,10 @@ Kernel response contents:</div><div class='ctx'>                                                   PSE functions</div><div class='ctx'>   ``ETHTOOL_A_PODL_PSE_PW_D_STATUS``         u32  power detection status of the</div><div class='ctx'>                                                   PoDL PSE.</div><div class='add'>+  ``ETHTOOL_A_C33_PSE_ADMIN_STATE``          u32  Operational state of the PoE</div><div class='add'>+                                                  PSE functions.</div><div class='add'>+  ``ETHTOOL_A_C33_PSE_PW_D_STATUS``          u32  power detection status of the</div><div class='add'>+                                                  PoE PSE.</div><div class='ctx'>   ======================================  ======  =============================</div><div class='ctx'> </div><div class='ctx'> When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies</div><div class='hunk'>@@ -1728,6 +1741,12 @@ aPoDLPSEAdminState. Possible values are:</div><div class='ctx'> .. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='ctx'>     :identifiers: ethtool_podl_pse_admin_state</div><div class='ctx'> </div><div class='add'>+The same goes for ``ETHTOOL_A_C33_PSE_ADMIN_STATE`` implementing</div><div class='add'>+``IEEE 802.3-2022`` 30.9.1.1.2 aPSEAdminState.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_c33_pse_admin_state</div><div class='add'>+</div><div class='ctx'> When set, the optional ``ETHTOOL_A_PODL_PSE_PW_D_STATUS`` attribute identifies</div><div class='ctx'> the power detection status of the PoDL PSE.  The status depend on internal PSE</div><div class='ctx'> state machine and automatic PD classification support. This option is</div><div class='hunk'>@@ -1737,6 +1756,12 @@ Possible values are:</div><div class='ctx'> .. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='ctx'>     :identifiers: ethtool_podl_pse_pw_d_status</div><div class='ctx'> </div><div class='add'>+The same goes for ``ETHTOOL_A_C33_PSE_ADMIN_PW_D_STATUS`` implementing</div><div class='add'>+``IEEE 802.3-2022`` 30.9.1.1.5 aPSEPowerDetectionStatus.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_c33_pse_pw_d_status</div><div class='add'>+</div><div class='ctx'> PSE_SET</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='hunk'>@@ -1747,6 +1772,7 @@ Request contents:</div><div class='ctx'>   ======================================  ======  =============================</div><div class='ctx'>   ``ETHTOOL_A_PSE_HEADER``                nested  request header</div><div class='ctx'>   ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL``       u32  Control PoDL PSE Admin state</div><div class='add'>+  ``ETHTOOL_A_C33_PSE_ADMIN_CONTROL``        u32  Control PSE Admin state</div><div class='ctx'>   ======================================  ======  =============================</div><div class='ctx'> </div><div class='ctx'> When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` attribute is used</div><div class='hunk'>@@ -1754,6 +1780,9 @@ to control PoDL PSE Admin functions. This option is implementing</div><div class='ctx'> ``IEEE 802.3-2018`` 30.15.1.2.1 acPoDLPSEAdminControl. See</div><div class='ctx'> ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` for supported values.</div><div class='ctx'> </div><div class='add'>+The same goes for ``ETHTOOL_A_C33_PSE_ADMIN_CONTROL`` implementing</div><div class='add'>+``IEEE 802.3-2022`` 30.9.1.2.1 acPSEAdminControl.</div><div class='add'>+</div><div class='ctx'> RSS_GET</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst<br/>index 7d8c5380492f..8eb9a5d40f31 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/filter.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/filter.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/filter.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/filter.rst</a></div><div class='hunk'>@@ -513,7 +513,7 @@ JIT compiler</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='ctx'> The Linux kernel has a built-in BPF JIT compiler for x86_64, SPARC,</div><div class='del'>-PowerPC, ARM, ARM64, MIPS, RISC-V and s390 and can be enabled through</div><div class='add'>+PowerPC, ARM, ARM64, MIPS, RISC-V, s390, and ARC and can be enabled through</div><div class='ctx'> CONFIG_BPF_JIT. The JIT compiler is transparently invoked for each</div><div class='ctx'> attached filter from user space or for internal kernel users if it has</div><div class='ctx'> been previously enabled by root::</div><div class='hunk'>@@ -650,7 +650,7 @@ before a conversion to the new layout is being done behind the scenes!</div><div class='ctx'> </div><div class='ctx'> Currently, the classic BPF format is being used for JITing on most</div><div class='ctx'> 32-bit architectures, whereas x86-64, aarch64, s390x, powerpc64,</div><div class='del'>-sparc64, arm32, riscv64, riscv32, loongarch64 perform JIT compilation</div><div class='add'>+sparc64, arm32, riscv64, riscv32, loongarch64, arc perform JIT compilation</div><div class='ctx'> from eBPF instruction set.</div><div class='ctx'> </div><div class='ctx'> Testing</div><div class='head'>diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst<br/>index 473d72c36d61..7664c0bfe461 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/index.rst</a></div><div class='hunk'>@@ -93,6 +93,7 @@ Contents:</div><div class='ctx'>    plip</div><div class='ctx'>    ppp_generic</div><div class='ctx'>    proc_net_tcp</div><div class='add'>+   pse-pd/index</div><div class='ctx'>    radiotap-headers</div><div class='ctx'>    rds</div><div class='ctx'>    regulatory</div><div class='head'>diff --git a/Documentation/networking/nf_conntrack-sysctl.rst b/Documentation/networking/nf_conntrack-sysctl.rst<br/>index c383a394c665..238b66d0e059 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/nf_conntrack-sysctl.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/nf_conntrack-sysctl.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/nf_conntrack-sysctl.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/nf_conntrack-sysctl.rst</a></div><div class='hunk'>@@ -222,11 +222,11 @@ nf_flowtable_tcp_timeout - INTEGER (seconds)</div><div class='ctx'> </div><div class='ctx'>         Control offload timeout for tcp connections.</div><div class='ctx'>         TCP connections may be offloaded from nf conntrack to nf flow table.</div><div class='del'>-        Once aged, the connection is returned to nf conntrack with tcp pickup timeout.</div><div class='add'>+        Once aged, the connection is returned to nf conntrack.</div><div class='ctx'> </div><div class='ctx'> nf_flowtable_udp_timeout - INTEGER (seconds)</div><div class='ctx'>         default 30</div><div class='ctx'> </div><div class='ctx'>         Control offload timeout for udp connections.</div><div class='ctx'>         UDP connections may be offloaded from nf conntrack to nf flow table.</div><div class='del'>-        Once aged, the connection is returned to nf conntrack with udp pickup timeout.</div><div class='add'>+        Once aged, the connection is returned to nf conntrack.</div><div class='head'>diff --git a/Documentation/networking/pse-pd/index.rst b/Documentation/networking/pse-pd/index.rst<br/>new file mode 100644<br/>index 000000000000..de28a5aee316<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/pse-pd/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/pse-pd/index.rst</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Power Sourcing Equipment (PSE) Documentation</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 2</div><div class='add'>+</div><div class='add'>+   introduction</div><div class='add'>+   pse-pi</div><div class='head'>diff --git a/Documentation/networking/pse-pd/introduction.rst b/Documentation/networking/pse-pd/introduction.rst<br/>new file mode 100644<br/>index 000000000000..e3d3faaef717<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/pse-pd/introduction.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/pse-pd/introduction.rst</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Power Sourcing Equipment (PSE) in IEEE 802.3 Standard</div><div class='add'>+=====================================================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+Power Sourcing Equipment (PSE) is essential in networks for delivering power</div><div class='add'>+along with data over Ethernet cables. It usually refers to devices like</div><div class='add'>+switches and hubs that supply power to Powered Devices (PDs) such as IP</div><div class='add'>+cameras, VoIP phones, and wireless access points.</div><div class='add'>+</div><div class='add'>+PSE vs. PoDL PSE</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+PSE in the IEEE 802.3 standard generally refers to equipment that provides</div><div class='add'>+power alongside data over Ethernet cables, typically associated with Power over</div><div class='add'>+Ethernet (PoE).</div><div class='add'>+</div><div class='add'>+PoDL PSE, or Power over Data Lines PSE, specifically denotes PSEs operating</div><div class='add'>+with single balanced twisted-pair PHYs, as per Clause 104 of IEEE 802.3. PoDL</div><div class='add'>+is significant in contexts like automotive and industrial controls where power</div><div class='add'>+and data delivery over a single pair is advantageous.</div><div class='add'>+</div><div class='add'>+IEEE 802.3-2018 Addendums and Related Clauses</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+Key addenda to the IEEE 802.3-2018 standard relevant to power delivery over</div><div class='add'>+Ethernet are as follows:</div><div class='add'>+</div><div class='add'>+- **802.3af (Approved in 2003-06-12)**: Known as PoE in the market, detailed in</div><div class='add'>+  Clause 33, delivering up to 15.4W of power.</div><div class='add'>+- **802.3at (Approved in 2009-09-11)**: Marketed as PoE+, enhancing PoE as</div><div class='add'>+  covered in Clause 33, increasing power delivery to up to 30W.</div><div class='add'>+- **802.3bt (Approved in 2018-09-27)**: Known as 4PPoE in the market, outlined</div><div class='add'>+  in Clause 33. Type 3 delivers up to 60W, and Type 4 up to 100W.</div><div class='add'>+- **802.3bu (Approved in 2016-12-07)**: Formerly referred to as PoDL, detailed</div><div class='add'>+  in Clause 104. Introduces Classes 0 - 9. Class 9 PoDL PSE delivers up to ~65W</div><div class='add'>+</div><div class='add'>+Kernel Naming Convention Recommendations</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+For clarity and consistency within the Linux kernel's networking subsystem, the</div><div class='add'>+following naming conventions are recommended:</div><div class='add'>+</div><div class='add'>+- For general PSE (PoE) code, use "c33_pse" key words. For example:</div><div class='add'>+  ``enum ethtool_c33_pse_admin_state c33_admin_control;``.</div><div class='add'>+  This aligns with Clause 33, encompassing various PoE forms.</div><div class='add'>+</div><div class='add'>+- For PoDL PSE - specific code, use "podl_pse". For example:</div><div class='add'>+  ``enum ethtool_podl_pse_admin_state podl_admin_control;`` to differentiate</div><div class='add'>+  PoDL PSE settings according to Clause 104.</div><div class='add'>+</div><div class='add'>+Summary of Clause 33: Data Terminal Equipment (DTE) Power via Media Dependent Interface (MDI)</div><div class='add'>+---------------------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Clause 33 of the IEEE 802.3 standard defines the functional and electrical</div><div class='add'>+characteristics of Powered Device (PD) and Power Sourcing Equipment (PSE).</div><div class='add'>+These entities enable power delivery using the same generic cabling as for data</div><div class='add'>+transmission, integrating power with data communication for devices such as</div><div class='add'>+10BASE-T, 100BASE-TX, or 1000BASE-T.</div><div class='add'>+</div><div class='add'>+Summary of Clause 104: Power over Data Lines (PoDL) of Single Balanced Twisted-Pair Ethernet</div><div class='add'>+--------------------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Clause 104 of the IEEE 802.3 standard delineates the functional and electrical</div><div class='add'>+characteristics of PoDL Powered Devices (PDs) and PoDL Power Sourcing Equipment</div><div class='add'>+(PSEs). These are designed for use with single balanced twisted-pair Ethernet</div><div class='add'>+Physical Layers. In this clause, 'PSE' refers specifically to PoDL PSE, and</div><div class='add'>+'PD' to PoDL PD. The key intent is to provide devices with a unified interface</div><div class='add'>+for both data and the power required to process this data over a single</div><div class='add'>+balanced twisted-pair Ethernet connection.</div><div class='head'>diff --git a/Documentation/networking/pse-pd/pse-pi.rst b/Documentation/networking/pse-pd/pse-pi.rst<br/>new file mode 100644<br/>index 000000000000..5cad14fedc13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/pse-pd/pse-pi.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/pse-pd/pse-pi.rst</a></div><div class='hunk'>@@ -0,0 +1,301 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+PSE Power Interface (PSE PI) Documentation</div><div class='add'>+==========================================</div><div class='add'>+</div><div class='add'>+The Power Sourcing Equipment Power Interface (PSE PI) plays a pivotal role in</div><div class='add'>+the architecture of Power over Ethernet (PoE) systems. It is essentially a</div><div class='add'>+blueprint that outlines how one or multiple power sources are connected to the</div><div class='add'>+eight-pin modular jack, commonly known as the Ethernet RJ45 port. This</div><div class='add'>+connection scheme is crucial for enabling the delivery of power alongside data</div><div class='add'>+over Ethernet cables.</div><div class='add'>+</div><div class='add'>+Documentation and Standards</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+The IEEE 802.3 standard provides detailed documentation on the PSE PI.</div><div class='add'>+Specifically:</div><div class='add'>+</div><div class='add'>+- Section "33.2.3 PI pin assignments" covers the pin assignments for PoE</div><div class='add'>+  systems that utilize two pairs for power delivery.</div><div class='add'>+- Section "145.2.4 PSE PI" addresses the configuration for PoE systems that</div><div class='add'>+  deliver power over all four pairs of an Ethernet cable.</div><div class='add'>+</div><div class='add'>+PSE PI and Single Pair Ethernet</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+Single Pair Ethernet (SPE) represents a different approach to Ethernet</div><div class='add'>+connectivity, utilizing just one pair of conductors for both data and power</div><div class='add'>+transmission. Unlike the configurations detailed in the PSE PI for standard</div><div class='add'>+Ethernet, which can involve multiple power sourcing arrangements across four or</div><div class='add'>+two pairs of wires, SPE operates on a simpler model due to its single-pair</div><div class='add'>+design. As a result, the complexities of choosing between alternative pin</div><div class='add'>+assignments for power delivery, as described in the PSE PI for multi-pair</div><div class='add'>+Ethernet, are not applicable to SPE.</div><div class='add'>+</div><div class='add'>+Understanding PSE PI</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+The Power Sourcing Equipment Power Interface (PSE PI) is a framework defining</div><div class='add'>+how Power Sourcing Equipment (PSE) delivers power to Powered Devices (PDs) over</div><div class='add'>+Ethernet cables. It details two main configurations for power delivery, known</div><div class='add'>+as Alternative A and Alternative B, which are distinguished not only by their</div><div class='add'>+method of power transmission but also by the implications for polarity and data</div><div class='add'>+transmission direction.</div><div class='add'>+</div><div class='add'>+Alternative A and B Overview</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+- **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of</div><div class='add'>+  networks 10/100BaseT or 1G/2G/5G/10GBaseT, the pairs used are carrying data.</div><div class='add'>+  The power delivery's polarity in this alternative can vary based on the MDI</div><div class='add'>+  (Medium Dependent Interface) or MDI-X (Medium Dependent Interface Crossover)</div><div class='add'>+  configuration.</div><div class='add'>+</div><div class='add'>+- **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of</div><div class='add'>+  10/100BaseT network the pairs used are spare pairs without data and are less</div><div class='add'>+  influenced by data transmission direction. This is not the case for</div><div class='add'>+  1G/2G/5G/10GBaseT network. Alternative B includes two configurations with</div><div class='add'>+  different polarities, known as variant X and variant S, to accommodate</div><div class='add'>+  different network requirements and device specifications.</div><div class='add'>+</div><div class='add'>+Table 145-3 PSE Pinout Alternatives</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+The following table outlines the pin configurations for both Alternative A and</div><div class='add'>+Alternative B.</div><div class='add'>+</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| Conductor  | Alternative A     | Alternative A   | Alternative B   | Alternative B   |</div><div class='add'>+|            |    (MDI-X)        |      (MDI)      |        (X)      |        (S)      |</div><div class='add'>++============+===================+=================+=================+=================+</div><div class='add'>+| 1          | Negative V        | Positive V      | -               | -               |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 2          | Negative V        | Positive V      | -               | -               |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 3          | Positive V        | Negative V      | -               | -               |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 4          | -                 | -               | Negative V      | Positive V      |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 5          | -                 | -               | Negative V      | Positive V      |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 6          | Positive V        | Negative V      | -               | -               |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 7          | -                 | -               | Positive V      | Negative V      |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+| 8          | -                 | -               | Positive V      | Negative V      |</div><div class='add'>++------------+-------------------+-----------------+-----------------+-----------------+</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    - "Positive V" and "Negative V" indicate the voltage polarity for each pin.</div><div class='add'>+    - "-" indicates that the pin is not used for power delivery in that</div><div class='add'>+      specific configuration.</div><div class='add'>+</div><div class='add'>+PSE PI compatibilities</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+The following table outlines the compatibility between the pinout alternative</div><div class='add'>+and the 1000/2.5G/5G/10GBaseT in the PSE 2 pairs connection.</div><div class='add'>+</div><div class='add'>++---------+---------------+---------------------+-----------------------+</div><div class='add'>+| Variant | Alternative   | Power Feeding Type  | Compatibility with    |</div><div class='add'>+|         | (A/B)         | (Direct/Phantom)    | 1000/2.5G/5G/10GBaseT |</div><div class='add'>++=========+===============+=====================+=======================+</div><div class='add'>+| 1       | A             | Phantom             | Yes                   |</div><div class='add'>++---------+---------------+---------------------+-----------------------+</div><div class='add'>+| 2       | B             | Phantom             | Yes                   |</div><div class='add'>++---------+---------------+---------------------+-----------------------+</div><div class='add'>+| 3       | B             | Direct              | No                    |</div><div class='add'>++---------+---------------+---------------------+-----------------------+</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    - "Direct" indicate a variant where the power is injected directly to pairs</div><div class='add'>+       without using magnetics in case of spare pairs.</div><div class='add'>+    - "Phantom" indicate power path over coils/magnetics as it is done for</div><div class='add'>+       Alternative A variant.</div><div class='add'>+</div><div class='add'>+In case of PSE 4 pairs, a PSE supporting only 10/100BaseT (which mean Direct</div><div class='add'>+Power on pinout Alternative B) is not compatible with a 4 pairs</div><div class='add'>+1000/2.5G/5G/10GBaseT.</div><div class='add'>+</div><div class='add'>+PSE Power Interface (PSE PI) Connection Diagram</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+The diagram below illustrates the connection architecture between the RJ45</div><div class='add'>+port, the Ethernet PHY (Physical Layer), and the PSE PI (Power Sourcing</div><div class='add'>+Equipment Power Interface), demonstrating how power and data are delivered</div><div class='add'>+simultaneously through an Ethernet cable. The RJ45 port serves as the physical</div><div class='add'>+interface for these connections, with each of its eight pins connected to both</div><div class='add'>+the Ethernet PHY for data transmission and the PSE PI for power delivery.</div><div class='add'>+</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+    +--------------------------+</div><div class='add'>+    |                          |</div><div class='add'>+    |          RJ45 Port       |</div><div class='add'>+    |                          |</div><div class='add'>+    +--+--+--+--+--+--+--+--+--+                +-------------+</div><div class='add'>+      1| 2| 3| 4| 5| 6| 7| 8|                   |             |</div><div class='add'>+       |  |  |  |  |  |  |  o-------------------+             |</div><div class='add'>+       |  |  |  |  |  |  o--|-------------------+             +&lt;--- PSE 1</div><div class='add'>+       |  |  |  |  |  o--|--|-------------------+             |</div><div class='add'>+       |  |  |  |  o--|--|--|-------------------+             |</div><div class='add'>+       |  |  |  o--|--|--|--|-------------------+  PSE PI     |</div><div class='add'>+       |  |  o--|--|--|--|--|-------------------+             |</div><div class='add'>+       |  o--|--|--|--|--|--|-------------------+             +&lt;--- PSE 2 (optional)</div><div class='add'>+       o--|--|--|--|--|--|--|-------------------+             |</div><div class='add'>+       |  |  |  |  |  |  |  |                   |             |</div><div class='add'>+    +--+--+--+--+--+--+--+--+--+                +-------------+</div><div class='add'>+    |                          |</div><div class='add'>+    |       Ethernet PHY       |</div><div class='add'>+    |                          |</div><div class='add'>+    +--------------------------+</div><div class='add'>+</div><div class='add'>+Simple PSE PI Configuration for Alternative A</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+The diagram below illustrates a straightforward PSE PI (Power Sourcing</div><div class='add'>+Equipment Power Interface) configuration designed to support the Alternative A</div><div class='add'>+setup for Power over Ethernet (PoE). This implementation is tailored to provide</div><div class='add'>+power delivery through the data-carrying pairs of an Ethernet cable, suitable</div><div class='add'>+for either MDI or MDI-X configurations, albeit supporting one variation at a</div><div class='add'>+time.</div><div class='add'>+</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+         +-------------+</div><div class='add'>+         |    PSE PI   |</div><div class='add'>+ 8  -----+                             +-------------+</div><div class='add'>+ 7  -----+                    Rail 1   |</div><div class='add'>+ 6  -----+------+----------------------+</div><div class='add'>+ 5  -----+      |                      |</div><div class='add'>+ 4  -----+      |             Rail 2   |  PSE 1</div><div class='add'>+ 3  -----+------/         +------------+</div><div class='add'>+ 2  -----+--+-------------/            |</div><div class='add'>+ 1  -----+--/                          +-------------+</div><div class='add'>+         |</div><div class='add'>+         +-------------+</div><div class='add'>+</div><div class='add'>+In this configuration:</div><div class='add'>+</div><div class='add'>+- Pins 1 and 2, as well as pins 3 and 6, are utilized for power delivery in</div><div class='add'>+  addition to data transmission. This aligns with the standard wiring for</div><div class='add'>+  10/100BaseT Ethernet networks where these pairs are used for data.</div><div class='add'>+- Rail 1 and Rail 2 represent the positive and negative voltage rails, with</div><div class='add'>+  Rail 1 connected to pins 1 and 2, and Rail 2 connected to pins 3 and 6.</div><div class='add'>+  More advanced PSE PI configurations may include integrated or external</div><div class='add'>+  switches to change the polarity of the voltage rails, allowing for</div><div class='add'>+  compatibility with both MDI and MDI-X configurations.</div><div class='add'>+</div><div class='add'>+More complex PSE PI configurations may include additional components, to support</div><div class='add'>+Alternative B, or to provide additional features such as power management, or</div><div class='add'>+additional power delivery capabilities such as 2-pair or 4-pair power delivery.</div><div class='add'>+</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+         +-------------+</div><div class='add'>+         |    PSE PI   |</div><div class='add'>+         |        +---+</div><div class='add'>+ 8  -----+--------+   |                 +-------------+</div><div class='add'>+ 7  -----+--------+   |       Rail 1   |</div><div class='add'>+ 6  -----+--------+   +-----------------+</div><div class='add'>+ 5  -----+--------+   |                |</div><div class='add'>+ 4  -----+--------+   |       Rail 2   |  PSE 1</div><div class='add'>+ 3  -----+--------+   +----------------+</div><div class='add'>+ 2  -----+--------+   |                |</div><div class='add'>+ 1  -----+--------+   |                 +-------------+</div><div class='add'>+         |        +---+</div><div class='add'>+         +-------------+</div><div class='add'>+</div><div class='add'>+Device Tree Configuration: Describing PSE PI Configurations</div><div class='add'>+-----------------------------------------------------------</div><div class='add'>+</div><div class='add'>+The necessity for a separate PSE PI node in the device tree is influenced by</div><div class='add'>+the intricacy of the Power over Ethernet (PoE) system's setup. Here are</div><div class='add'>+descriptions of both simple and complex PSE PI configurations to illustrate</div><div class='add'>+this decision-making process:</div><div class='add'>+</div><div class='add'>+**Simple PSE PI Configuration:**</div><div class='add'>+In a straightforward scenario, the PSE PI setup involves a direct, one-to-one</div><div class='add'>+connection between a single PSE controller and an Ethernet port. This setup</div><div class='add'>+typically supports basic PoE functionality without the need for dynamic</div><div class='add'>+configuration or management of multiple power delivery modes. For such simple</div><div class='add'>+configurations, detailing the PSE PI within the existing PSE controller's node</div><div class='add'>+may suffice, as the system does not encompass additional complexity that</div><div class='add'>+warrants a separate node. The primary focus here is on the clear and direct</div><div class='add'>+association of power delivery to a specific Ethernet port.</div><div class='add'>+</div><div class='add'>+**Complex PSE PI Configuration:**</div><div class='add'>+Contrastingly, a complex PSE PI setup may encompass multiple PSE controllers or</div><div class='add'>+auxiliary circuits that collectively manage power delivery to one Ethernet</div><div class='add'>+port. Such configurations might support a range of PoE standards and require</div><div class='add'>+the capability to dynamically configure power delivery based on the operational</div><div class='add'>+mode (e.g., PoE2 versus PoE4) or specific requirements of connected devices. In</div><div class='add'>+these instances, a dedicated PSE PI node becomes essential for accurately</div><div class='add'>+documenting the system architecture. This node would serve to detail the</div><div class='add'>+interactions between different PSE controllers, the support for various PoE</div><div class='add'>+modes, and any additional logic required to coordinate power delivery across</div><div class='add'>+the network infrastructure.</div><div class='add'>+</div><div class='add'>+**Guidance:**</div><div class='add'>+</div><div class='add'>+For simple PSE setups, including PSE PI information in the PSE controller node</div><div class='add'>+might suffice due to the straightforward nature of these systems. However,</div><div class='add'>+complex configurations, involving multiple components or advanced PoE features,</div><div class='add'>+benefit from a dedicated PSE PI node. This method adheres to IEEE 802.3</div><div class='add'>+specifications, improving documentation clarity and ensuring accurate</div><div class='add'>+representation of the PoE system's complexity.</div><div class='add'>+</div><div class='add'>+PSE PI Node: Essential Information</div><div class='add'>+----------------------------------</div><div class='add'>+</div><div class='add'>+The PSE PI (Power Sourcing Equipment Power Interface) node in a device tree can</div><div class='add'>+include several key pieces of information critical for defining the power</div><div class='add'>+delivery capabilities and configurations of a PoE (Power over Ethernet) system.</div><div class='add'>+Below is a list of such information, along with explanations for their</div><div class='add'>+necessity and reasons why they might not be found within a PSE controller node:</div><div class='add'>+</div><div class='add'>+1. **Powered Pairs Configuration**</div><div class='add'>+</div><div class='add'>+   - *Description:* Identifies the pairs used for power delivery in the</div><div class='add'>+     Ethernet cable.</div><div class='add'>+   - *Necessity:* Essential to ensure the correct pairs are powered according</div><div class='add'>+     to the board's design.</div><div class='add'>+   - *PSE Controller Node:* Typically lacks details on physical pair usage,</div><div class='add'>+     focusing on power regulation.</div><div class='add'>+</div><div class='add'>+2. **Polarity of Powered Pairs**</div><div class='add'>+</div><div class='add'>+   - *Description:* Specifies the polarity (positive or negative) for each</div><div class='add'>+     powered pair.</div><div class='add'>+   - *Necessity:* Critical for safe and effective power transmission to PDs.</div><div class='add'>+   - *PSE Controller Node:* Polarity management may exceed the standard</div><div class='add'>+     functionalities of PSE controllers.</div><div class='add'>+</div><div class='add'>+3. **PSE Cells Association**</div><div class='add'>+</div><div class='add'>+   - *Description:* Details the association of PSE cells with Ethernet ports or</div><div class='add'>+     pairs in multi-cell configurations.</div><div class='add'>+   - *Necessity:* Allows for optimized power resource allocation in complex</div><div class='add'>+     systems.</div><div class='add'>+   - *PSE Controller Node:* Controllers may not manage cell associations</div><div class='add'>+     directly, focusing instead on power flow regulation.</div><div class='add'>+</div><div class='add'>+4. **Support for PoE Standards**</div><div class='add'>+</div><div class='add'>+   - *Description:* Lists the PoE standards and configurations supported by the</div><div class='add'>+     system.</div><div class='add'>+   - *Necessity:* Ensures system compatibility with various PDs and adherence</div><div class='add'>+     to industry standards.</div><div class='add'>+   - *PSE Controller Node:* Specific capabilities may depend on the overall PSE</div><div class='add'>+     PI design rather than the controller alone. Multiple PSE cells per PI</div><div class='add'>+     do not necessarily imply support for multiple PoE standards.</div><div class='add'>+</div><div class='add'>+5. **Protection Mechanisms**</div><div class='add'>+</div><div class='add'>+   - *Description:* Outlines additional protection mechanisms, such as</div><div class='add'>+     overcurrent protection and thermal management.</div><div class='add'>+   - *Necessity:* Provides extra safety and stability, complementing PSE</div><div class='add'>+     controller protections.</div><div class='add'>+   - *PSE Controller Node:* Some protections may be implemented via</div><div class='add'>+     board-specific hardware or algorithms external to the controller.</div><div class='head'>diff --git a/Documentation/networking/xfrm_proc.rst b/Documentation/networking/xfrm_proc.rst<br/>index 0a771c5a7399..973d1571acac 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/xfrm_proc.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/networking/xfrm_proc.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/xfrm_proc.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/networking/xfrm_proc.rst</a></div><div class='hunk'>@@ -73,6 +73,9 @@ XfrmAcquireError:</div><div class='ctx'> XfrmFwdHdrError:</div><div class='ctx'> 	Forward routing of a packet is not allowed</div><div class='ctx'> </div><div class='add'>+XfrmInStateDirError:</div><div class='add'>+        State direction mismatch (lookup found an output state on the input path, expected input or no direction)</div><div class='add'>+</div><div class='ctx'> Outbound errors</div><div class='ctx'> ~~~~~~~~~~~~~~~</div><div class='ctx'> XfrmOutError:</div><div class='hunk'>@@ -111,3 +114,6 @@ XfrmOutPolError:</div><div class='ctx'> </div><div class='ctx'> XfrmOutStateInvalid:</div><div class='ctx'> 	State is invalid, perhaps expired</div><div class='add'>+</div><div class='add'>+XfrmOutStateDirError:</div><div class='add'>+        State direction mismatch (lookup found an input state on the output path, expected output or no direction)</div><div class='head'>diff --git a/Documentation/power/pci.rst b/Documentation/power/pci.rst<br/>index 12070320307e..e2c1fb8a569a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/power/pci.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/power/pci.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/power/pci.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/power/pci.rst</a></div><div class='hunk'>@@ -333,7 +333,7 @@ struct pci_dev.</div><div class='ctx'> The PCI subsystem's first task related to device power management is to</div><div class='ctx'> prepare the device for power management and initialize the fields of struct</div><div class='ctx'> pci_dev used for this purpose.  This happens in two functions defined in</div><div class='del'>-drivers/pci/pci.c, pci_pm_init() and platform_pci_wakeup_init().</div><div class='add'>+drivers/pci/, pci_pm_init() and pci_acpi_setup().</div><div class='ctx'> </div><div class='ctx'> The first of these functions checks if the device supports native PCI PM</div><div class='ctx'> and if that's the case the offset of its power management capability structure</div><div class='head'>diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst<br/>index 7ef8de58f7f8..5685d7bfe4d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/changes.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/process/changes.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/changes.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/process/changes.rst</a></div><div class='hunk'>@@ -31,7 +31,7 @@ you probably needn't concern yourself with pcmciautils.</div><div class='ctx'> ====================== ===============  ========================================</div><div class='ctx'> GNU C                  5.1              gcc --version</div><div class='ctx'> Clang/LLVM (optional)  13.0.1           clang --version</div><div class='del'>-Rust (optional)        1.76.0           rustc --version</div><div class='add'>+Rust (optional)        1.78.0           rustc --version</div><div class='ctx'> bindgen (optional)     0.65.1           bindgen --version</div><div class='ctx'> GNU make               3.82             make --version</div><div class='ctx'> bash                   4.2              bash --version</div><div class='hunk'>@@ -62,6 +62,7 @@ Sphinx\ [#f1]_         2.4.4            sphinx-build --version</div><div class='ctx'> cpio                   any              cpio --version</div><div class='ctx'> GNU tar                1.28             tar --version</div><div class='ctx'> gtags (optional)       6.6.5            gtags --version</div><div class='add'>+mkimage (optional)     2017.01          mkimage --version</div><div class='ctx'> ====================== ===============  ========================================</div><div class='ctx'> </div><div class='ctx'> .. [#f1] Sphinx is needed only to build the Kernel documentation</div><div class='hunk'>@@ -189,6 +190,14 @@ The kernel build requires GNU GLOBAL version 6.6.5 or later to generate</div><div class='ctx'> tag files through ``make gtags``.  This is due to its use of the gtags</div><div class='ctx'> ``-C (--directory)`` flag.</div><div class='ctx'> </div><div class='add'>+mkimage</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+This tool is used when building a Flat Image Tree (FIT), commonly used on ARM</div><div class='add'>+platforms. The tool is available via the ``u-boot-tools`` package or can be</div><div class='add'>+built from the U-Boot source code. See the instructions at</div><div class='add'>+https://docs.u-boot.org/en/latest/build/tools.html#building-tools-for-linux</div><div class='add'>+</div><div class='ctx'> System utilities</div><div class='ctx'> ****************</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/process/handling-regressions.rst b/Documentation/process/handling-regressions.rst<br/>index ce6753a674f3..49ba1410cfce 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/handling-regressions.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/process/handling-regressions.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/handling-regressions.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/process/handling-regressions.rst</a></div><div class='hunk'>@@ -284,7 +284,7 @@ What else is there to known about regressions?</div><div class='ctx'> Check out Documentation/admin-guide/reporting-regressions.rst, it covers a lot</div><div class='ctx'> of other aspects you want might want to be aware of:</div><div class='ctx'> </div><div class='del'>- * the purpose of the "no regressions rule"</div><div class='add'>+ * the purpose of the "no regressions" rule</div><div class='ctx'> </div><div class='ctx'>  * what issues actually qualify as regression</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/process/maintainer-tip.rst b/Documentation/process/maintainer-tip.rst<br/>index 497bb39727c8..64739968afa6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/maintainer-tip.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/process/maintainer-tip.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/maintainer-tip.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/process/maintainer-tip.rst</a></div><div class='hunk'>@@ -409,20 +409,20 @@ See :ref:`resend_reminders`.</div><div class='ctx'> Merge window</div><div class='ctx'> ^^^^^^^^^^^^</div><div class='ctx'> </div><div class='del'>-Please do not expect large patch series to be handled during the merge</div><div class='del'>-window or even during the week before.  Such patches should be submitted in</div><div class='del'>-mergeable state *at* *least* a week before the merge window opens.</div><div class='del'>-Exceptions are made for bug fixes and *sometimes* for small standalone</div><div class='del'>-drivers for new hardware or minimally invasive patches for hardware</div><div class='del'>-enablement.</div><div class='add'>+Please do not expect patches to be reviewed or merged by tip</div><div class='add'>+maintainers around or during the merge window.  The trees are closed</div><div class='add'>+to all but urgent fixes during this time.  They reopen once the merge</div><div class='add'>+window closes and a new -rc1 kernel has been released.</div><div class='add'>+</div><div class='add'>+Large series should be submitted in mergeable state *at* *least* a week</div><div class='add'>+before the merge window opens.  Exceptions are made for bug fixes and</div><div class='add'>+*sometimes* for small standalone drivers for new hardware or minimally</div><div class='add'>+invasive patches for hardware enablement.</div><div class='ctx'> </div><div class='ctx'> During the merge window, the maintainers instead focus on following the</div><div class='ctx'> upstream changes, fixing merge window fallout, collecting bug fixes, and</div><div class='ctx'> allowing themselves a breath. Please respect that.</div><div class='ctx'> </div><div class='del'>-The release candidate -rc1 is the starting point for new patches to be</div><div class='del'>-applied which are targeted for the next merge window.</div><div class='del'>-</div><div class='ctx'> So called _urgent_ branches will be merged into mainline during the</div><div class='ctx'> stabilization phase of each release.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/process/stable-kernel-rules.rst b/Documentation/process/stable-kernel-rules.rst<br/>index 1704f1c686d0..edf90bbe30f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/stable-kernel-rules.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/process/stable-kernel-rules.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/stable-kernel-rules.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/process/stable-kernel-rules.rst</a></div><div class='hunk'>@@ -6,29 +6,29 @@ Everything you ever wanted to know about Linux -stable releases</div><div class='ctx'> Rules on what kind of patches are accepted, and which ones are not, into the</div><div class='ctx'> "-stable" tree:</div><div class='ctx'> </div><div class='del'>- - It or an equivalent fix must already exist in Linus' tree (upstream).</div><div class='del'>- - It must be obviously correct and tested.</div><div class='del'>- - It cannot be bigger than 100 lines, with context.</div><div class='del'>- - It must follow the</div><div class='del'>-   :ref:`Documentation/process/submitting-patches.rst &lt;submittingpatches&gt;`</div><div class='del'>-   rules.</div><div class='del'>- - It must either fix a real bug that bothers people or just add a device ID.</div><div class='del'>-   To elaborate on the former:</div><div class='del'>-</div><div class='del'>-   - It fixes a problem like an oops, a hang, data corruption, a real security</div><div class='del'>-     issue, a hardware quirk, a build error (but not for things marked</div><div class='del'>-     CONFIG_BROKEN), or some "oh, that's not good" issue.</div><div class='del'>-   - Serious issues as reported by a user of a distribution kernel may also</div><div class='del'>-     be considered if they fix a notable performance or interactivity issue.</div><div class='del'>-     As these fixes are not as obvious and have a higher risk of a subtle</div><div class='del'>-     regression they should only be submitted by a distribution kernel</div><div class='del'>-     maintainer and include an addendum linking to a bugzilla entry if it</div><div class='del'>-     exists and additional information on the user-visible impact.</div><div class='del'>-   - No "This could be a problem..." type of things like a "theoretical race</div><div class='del'>-     condition", unless an explanation of how the bug can be exploited is also</div><div class='del'>-     provided.</div><div class='del'>-   - No "trivial" fixes without benefit for users (spelling changes, whitespace</div><div class='del'>-     cleanups, etc).</div><div class='add'>+- It or an equivalent fix must already exist in Linux mainline (upstream).</div><div class='add'>+- It must be obviously correct and tested.</div><div class='add'>+- It cannot be bigger than 100 lines, with context.</div><div class='add'>+- It must follow the</div><div class='add'>+  :ref:`Documentation/process/submitting-patches.rst &lt;submittingpatches&gt;`</div><div class='add'>+  rules.</div><div class='add'>+- It must either fix a real bug that bothers people or just add a device ID.</div><div class='add'>+  To elaborate on the former:</div><div class='add'>+</div><div class='add'>+  - It fixes a problem like an oops, a hang, data corruption, a real security</div><div class='add'>+    issue, a hardware quirk, a build error (but not for things marked</div><div class='add'>+    CONFIG_BROKEN), or some "oh, that's not good" issue.</div><div class='add'>+  - Serious issues as reported by a user of a distribution kernel may also</div><div class='add'>+    be considered if they fix a notable performance or interactivity issue.</div><div class='add'>+    As these fixes are not as obvious and have a higher risk of a subtle</div><div class='add'>+    regression they should only be submitted by a distribution kernel</div><div class='add'>+    maintainer and include an addendum linking to a bugzilla entry if it</div><div class='add'>+    exists and additional information on the user-visible impact.</div><div class='add'>+  - No "This could be a problem..." type of things like a "theoretical race</div><div class='add'>+    condition", unless an explanation of how the bug can be exploited is also</div><div class='add'>+    provided.</div><div class='add'>+  - No "trivial" fixes without benefit for users (spelling changes, whitespace</div><div class='add'>+    cleanups, etc).</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Procedure for submitting patches to the -stable tree</div><div class='hunk'>@@ -42,11 +42,11 @@ Procedure for submitting patches to the -stable tree</div><div class='ctx'> </div><div class='ctx'> There are three options to submit a change to -stable trees:</div><div class='ctx'> </div><div class='del'>- 1. Add a 'stable tag' to the description of a patch you then submit for</div><div class='del'>-    mainline inclusion.</div><div class='del'>- 2. Ask the stable team to pick up a patch already mainlined.</div><div class='del'>- 3. Submit a patch to the stable team that is equivalent to a change already</div><div class='del'>-    mainlined.</div><div class='add'>+1. Add a 'stable tag' to the description of a patch you then submit for</div><div class='add'>+   mainline inclusion.</div><div class='add'>+2. Ask the stable team to pick up a patch already mainlined.</div><div class='add'>+3. Submit a patch to the stable team that is equivalent to a change already</div><div class='add'>+   mainlined.</div><div class='ctx'> </div><div class='ctx'> The sections below describe each of the options in more detail.</div><div class='ctx'> </div><div class='hunk'>@@ -68,82 +68,72 @@ Option 1</div><div class='ctx'> ********</div><div class='ctx'> </div><div class='ctx'> To have a patch you submit for mainline inclusion later automatically picked up</div><div class='del'>-for stable trees, add the tag</div><div class='add'>+for stable trees, add this tag in the sign-off area::</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+  Cc: stable@vger.kernel.org</div><div class='ctx'> </div><div class='del'>-     Cc: stable@vger.kernel.org</div><div class='add'>+Use ``Cc: stable@kernel.org`` instead when fixing unpublished vulnerabilities:</div><div class='add'>+it reduces the chance of accidentally exposing the fix to the public by way of</div><div class='add'>+'git send-email', as mails sent to that address are not delivered anywhere.</div><div class='ctx'> </div><div class='del'>-in the sign-off area. Once the patch is mainlined it will be applied to the</div><div class='del'>-stable tree without anything else needing to be done by the author or</div><div class='del'>-subsystem maintainer.</div><div class='add'>+Once the patch is mainlined it will be applied to the stable tree without</div><div class='add'>+anything else needing to be done by the author or subsystem maintainer.</div><div class='ctx'> </div><div class='del'>-To sent additional instructions to the stable team, use a shell-style inline</div><div class='del'>-comment:</div><div class='add'>+To send additional instructions to the stable team, use a shell-style inline</div><div class='add'>+comment to pass arbitrary or predefined notes:</div><div class='ctx'> </div><div class='del'>- * To specify any additional patch prerequisites for cherry picking use the</div><div class='del'>-   following format in the sign-off area:</div><div class='add'>+* Specify any additional patch prerequisites for cherry picking::</div><div class='ctx'> </div><div class='del'>-   .. code-block:: none</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x: a1f84a3: sched: Check for idle</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x: 1b9508f: sched: Rate-limit newidle</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x: fd21073: sched: Fix affinity logic</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x</div><div class='add'>+    Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;</div><div class='ctx'> </div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x: a1f84a3: sched: Check for idle</div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x: 1b9508f: sched: Rate-limit newidle</div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x: fd21073: sched: Fix affinity logic</div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x</div><div class='del'>-     Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;</div><div class='add'>+  The tag sequence has the meaning of::</div><div class='ctx'> </div><div class='del'>-   The tag sequence has the meaning of:</div><div class='add'>+    git cherry-pick a1f84a3</div><div class='add'>+    git cherry-pick 1b9508f</div><div class='add'>+    git cherry-pick fd21073</div><div class='add'>+    git cherry-pick &lt;this commit&gt;</div><div class='ctx'> </div><div class='del'>-   .. code-block:: none</div><div class='add'>+  Note that for a patch series, you do not have to list as prerequisites the</div><div class='add'>+  patches present in the series itself. For example, if you have the following</div><div class='add'>+  patch series::</div><div class='ctx'> </div><div class='del'>-     git cherry-pick a1f84a3</div><div class='del'>-     git cherry-pick 1b9508f</div><div class='del'>-     git cherry-pick fd21073</div><div class='del'>-     git cherry-pick &lt;this commit&gt;</div><div class='add'>+    patch1</div><div class='add'>+    patch2</div><div class='ctx'> </div><div class='del'>-   Note that for a patch series, you do not have to list as prerequisites the</div><div class='del'>-   patches present in the series itself. For example, if you have the following</div><div class='del'>-   patch series:</div><div class='add'>+  where patch2 depends on patch1, you do not have to list patch1 as</div><div class='add'>+  prerequisite of patch2 if you have already marked patch1 for stable</div><div class='add'>+  inclusion.</div><div class='ctx'> </div><div class='del'>-   .. code-block:: none</div><div class='add'>+* Point out kernel version prerequisites::</div><div class='ctx'> </div><div class='del'>-     patch1</div><div class='del'>-     patch2</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x</div><div class='ctx'> </div><div class='del'>-   where patch2 depends on patch1, you do not have to list patch1 as</div><div class='del'>-   prerequisite of patch2 if you have already marked patch1 for stable</div><div class='del'>-   inclusion.</div><div class='add'>+  The tag has the meaning of::</div><div class='ctx'> </div><div class='del'>- * For patches that may have kernel version prerequisites specify them using</div><div class='del'>-   the following format in the sign-off area:</div><div class='add'>+    git cherry-pick &lt;this commit&gt;</div><div class='ctx'> </div><div class='del'>-   .. code-block:: none</div><div class='add'>+  For each "-stable" tree starting with the specified version.</div><div class='ctx'> </div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # 3.3.x</div><div class='add'>+  Note, such tagging is unnecessary if the stable team can derive the</div><div class='add'>+  appropriate versions from Fixes: tags.</div><div class='ctx'> </div><div class='del'>-   The tag has the meaning of:</div><div class='add'>+* Delay pick up of patches::</div><div class='ctx'> </div><div class='del'>-   .. code-block:: none</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # after -rc3</div><div class='ctx'> </div><div class='del'>-     git cherry-pick &lt;this commit&gt;</div><div class='add'>+* Point out known problems::</div><div class='ctx'> </div><div class='del'>-   For each "-stable" tree starting with the specified version.</div><div class='add'>+    Cc: &lt;stable@vger.kernel.org&gt; # see patch description, needs adjustments for &lt;= 6.3</div><div class='ctx'> </div><div class='del'>-   Note, such tagging is unnecessary if the stable team can derive the</div><div class='del'>-   appropriate versions from Fixes: tags.</div><div class='add'>+There furthermore is a variant of the stable tag you can use to make the stable</div><div class='add'>+team's backporting tools (e.g AUTOSEL or scripts that look for commits</div><div class='add'>+containing a 'Fixes:' tag) ignore a change::</div><div class='ctx'> </div><div class='del'>- * To delay pick up of patches, use the following format:</div><div class='del'>-</div><div class='del'>-   .. code-block:: none</div><div class='del'>-</div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # after 4 weeks in mainline</div><div class='del'>-</div><div class='del'>- * For any other requests, just add a note to the stable tag. This for example</div><div class='del'>-   can be used to point out known problems:</div><div class='del'>-</div><div class='del'>-   .. code-block:: none</div><div class='del'>-</div><div class='del'>-     Cc: &lt;stable@vger.kernel.org&gt; # see patch description, needs adjustments for &lt;= 6.3</div><div class='add'>+     Cc: &lt;stable+noautosel@kernel.org&gt; # reason goes here, and must be present</div><div class='ctx'> </div><div class='ctx'> .. _option_2:</div><div class='ctx'> </div><div class='hunk'>@@ -163,17 +153,13 @@ Option 3</div><div class='ctx'> Send the patch, after verifying that it follows the above rules, to</div><div class='ctx'> stable@vger.kernel.org and mention the kernel versions you wish it to be applied</div><div class='ctx'> to. When doing so, you must note the upstream commit ID in the changelog of your</div><div class='del'>-submission with a separate line above the commit text, like this:</div><div class='del'>-</div><div class='del'>-.. code-block:: none</div><div class='del'>-</div><div class='del'>-    commit &lt;sha1&gt; upstream.</div><div class='add'>+submission with a separate line above the commit text, like this::</div><div class='ctx'> </div><div class='del'>-or alternatively:</div><div class='add'>+  commit &lt;sha1&gt; upstream.</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+Or alternatively::</div><div class='ctx'> </div><div class='del'>-    [ Upstream commit &lt;sha1&gt; ]</div><div class='add'>+  [ Upstream commit &lt;sha1&gt; ]</div><div class='ctx'> </div><div class='ctx'> If the submitted patch deviates from the original upstream patch (for example</div><div class='ctx'> because it had to be adjusted for the older API), this must be very clearly</div><div class='hunk'>@@ -194,55 +180,55 @@ developers and by the relevant subsystem maintainer.</div><div class='ctx'> Review cycle</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='del'>- - When the -stable maintainers decide for a review cycle, the patches will be</div><div class='del'>-   sent to the review committee, and the maintainer of the affected area of</div><div class='del'>-   the patch (unless the submitter is the maintainer of the area) and CC: to</div><div class='del'>-   the linux-kernel mailing list.</div><div class='del'>- - The review committee has 48 hours in which to ACK or NAK the patch.</div><div class='del'>- - If the patch is rejected by a member of the committee, or linux-kernel</div><div class='del'>-   members object to the patch, bringing up issues that the maintainers and</div><div class='del'>-   members did not realize, the patch will be dropped from the queue.</div><div class='del'>- - The ACKed patches will be posted again as part of release candidate (-rc)</div><div class='del'>-   to be tested by developers and testers.</div><div class='del'>- - Usually only one -rc release is made, however if there are any outstanding</div><div class='del'>-   issues, some patches may be modified or dropped or additional patches may</div><div class='del'>-   be queued. Additional -rc releases are then released and tested until no</div><div class='del'>-   issues are found.</div><div class='del'>- - Responding to the -rc releases can be done on the mailing list by sending</div><div class='del'>-   a "Tested-by:" email with any testing information desired. The "Tested-by:"</div><div class='del'>-   tags will be collected and added to the release commit.</div><div class='del'>- - At the end of the review cycle, the new -stable release will be released</div><div class='del'>-   containing all the queued and tested patches.</div><div class='del'>- - Security patches will be accepted into the -stable tree directly from the</div><div class='del'>-   security kernel team, and not go through the normal review cycle.</div><div class='del'>-   Contact the kernel security team for more details on this procedure.</div><div class='add'>+- When the -stable maintainers decide for a review cycle, the patches will be</div><div class='add'>+  sent to the review committee, and the maintainer of the affected area of</div><div class='add'>+  the patch (unless the submitter is the maintainer of the area) and CC: to</div><div class='add'>+  the linux-kernel mailing list.</div><div class='add'>+- The review committee has 48 hours in which to ACK or NAK the patch.</div><div class='add'>+- If the patch is rejected by a member of the committee, or linux-kernel</div><div class='add'>+  members object to the patch, bringing up issues that the maintainers and</div><div class='add'>+  members did not realize, the patch will be dropped from the queue.</div><div class='add'>+- The ACKed patches will be posted again as part of release candidate (-rc)</div><div class='add'>+  to be tested by developers and testers.</div><div class='add'>+- Usually only one -rc release is made, however if there are any outstanding</div><div class='add'>+  issues, some patches may be modified or dropped or additional patches may</div><div class='add'>+  be queued. Additional -rc releases are then released and tested until no</div><div class='add'>+  issues are found.</div><div class='add'>+- Responding to the -rc releases can be done on the mailing list by sending</div><div class='add'>+  a "Tested-by:" email with any testing information desired. The "Tested-by:"</div><div class='add'>+  tags will be collected and added to the release commit.</div><div class='add'>+- At the end of the review cycle, the new -stable release will be released</div><div class='add'>+  containing all the queued and tested patches.</div><div class='add'>+- Security patches will be accepted into the -stable tree directly from the</div><div class='add'>+  security kernel team, and not go through the normal review cycle.</div><div class='add'>+  Contact the kernel security team for more details on this procedure.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Trees</div><div class='ctx'> -----</div><div class='ctx'> </div><div class='del'>- - The queues of patches, for both completed versions and in progress</div><div class='del'>-   versions can be found at:</div><div class='add'>+- The queues of patches, for both completed versions and in progress</div><div class='add'>+  versions can be found at:</div><div class='ctx'> </div><div class='del'>-	https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git</div><div class='add'>+    https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git</div><div class='ctx'> </div><div class='del'>- - The finalized and tagged releases of all stable kernels can be found</div><div class='del'>-   in separate branches per version at:</div><div class='add'>+- The finalized and tagged releases of all stable kernels can be found</div><div class='add'>+  in separate branches per version at:</div><div class='ctx'> </div><div class='del'>-	https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</div><div class='add'>+    https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</div><div class='ctx'> </div><div class='del'>- - The release candidate of all stable kernel versions can be found at:</div><div class='add'>+- The release candidate of all stable kernel versions can be found at:</div><div class='ctx'> </div><div class='del'>-        https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/</div><div class='add'>+    https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/</div><div class='ctx'> </div><div class='del'>-   .. warning::</div><div class='del'>-      The -stable-rc tree is a snapshot in time of the stable-queue tree and</div><div class='del'>-      will change frequently, hence will be rebased often. It should only be</div><div class='del'>-      used for testing purposes (e.g. to be consumed by CI systems).</div><div class='add'>+  .. warning::</div><div class='add'>+     The -stable-rc tree is a snapshot in time of the stable-queue tree and</div><div class='add'>+     will change frequently, hence will be rebased often. It should only be</div><div class='add'>+     used for testing purposes (e.g. to be consumed by CI systems).</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Review committee</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='del'>- - This is made up of a number of kernel developers who have volunteered for</div><div class='del'>-   this task, and a few that haven't.</div><div class='add'>+- This is made up of a number of kernel developers who have volunteered for</div><div class='add'>+  this task, and a few that haven't.</div><div class='head'>diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-support.rst<br/>index 5c4fa9f5d1cd..c9137710633a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/rust/arch-support.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/rust/arch-support.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/rust/arch-support.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/rust/arch-support.rst</a></div><div class='hunk'>@@ -16,7 +16,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file.</div><div class='ctx'> Architecture   Level of support  Constraints</div><div class='ctx'> =============  ================  ==============================================</div><div class='ctx'> ``arm64``      Maintained        Little Endian only.</div><div class='del'>-``loongarch``  Maintained        -</div><div class='add'>+``loongarch``  Maintained        \-</div><div class='ctx'> ``um``         Maintained        ``x86_64`` only.</div><div class='ctx'> ``x86``        Maintained        ``x86_64`` only.</div><div class='ctx'> =============  ================  ==============================================</div><div class='head'>diff --git a/Documentation/rust/general-information.rst b/Documentation/rust/general-information.rst<br/>index 081397827a7e..4bb6ac12d482 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/rust/general-information.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/rust/general-information.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/rust/general-information.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/rust/general-information.rst</a></div><div class='hunk'>@@ -64,6 +64,63 @@ but it is intended that coverage is expanded as time goes on. "Leaf" modules</div><div class='ctx'> (e.g. drivers) should not use the C bindings directly. Instead, subsystems</div><div class='ctx'> should provide as-safe-as-possible abstractions as needed.</div><div class='ctx'> </div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+	                                                rust/bindings/</div><div class='add'>+	                                               (rust/helpers.c)</div><div class='add'>+</div><div class='add'>+	                                                   include/ -----+ &lt;-+</div><div class='add'>+	                                                                 |   |</div><div class='add'>+	  drivers/              rust/kernel/              +----------+ &lt;-+   |</div><div class='add'>+	    fs/                                           | bindgen  |       |</div><div class='add'>+	   .../            +-------------------+          +----------+ --+   |</div><div class='add'>+	                   |    Abstractions   |                         |   |</div><div class='add'>+	+---------+        | +------+ +------+ |          +----------+   |   |</div><div class='add'>+	| my_foo  | -----&gt; | | foo  | | bar  | | -------&gt; | Bindings | &lt;-+   |</div><div class='add'>+	| driver  |  Safe  | | sub- | | sub- | |  Unsafe  |          |       |</div><div class='add'>+	+---------+        | |system| |system| |          | bindings | &lt;-----+</div><div class='add'>+	     |             | +------+ +------+ |          |  crate   |       |</div><div class='add'>+	     |             |   kernel crate    |          +----------+       |</div><div class='add'>+	     |             +-------------------+                             |</div><div class='add'>+	     |                                                               |</div><div class='add'>+	     +------------------# FORBIDDEN #--------------------------------+</div><div class='add'>+</div><div class='add'>+The main idea is to encapsulate all direct interaction with the kernel's C APIs</div><div class='add'>+into carefully reviewed and documented abstractions. Then users of these</div><div class='add'>+abstractions cannot introduce undefined behavior (UB) as long as:</div><div class='add'>+</div><div class='add'>+#. The abstractions are correct ("sound").</div><div class='add'>+#. Any ``unsafe`` blocks respect the safety contract necessary to call the</div><div class='add'>+   operations inside the block. Similarly, any ``unsafe impl``\ s respect the</div><div class='add'>+   safety contract necessary to implement the trait.</div><div class='add'>+</div><div class='add'>+Bindings</div><div class='add'>+~~~~~~~~</div><div class='add'>+</div><div class='add'>+By including a C header from ``include/`` into</div><div class='add'>+``rust/bindings/bindings_helper.h``, the ``bindgen`` tool will auto-generate the</div><div class='add'>+bindings for the included subsystem. After building, see the ``*_generated.rs``</div><div class='add'>+output files in the ``rust/bindings/`` directory.</div><div class='add'>+</div><div class='add'>+For parts of the C header that ``bindgen`` does not auto generate, e.g. C</div><div class='add'>+``inline`` functions or non-trivial macros, it is acceptable to add a small</div><div class='add'>+wrapper function to ``rust/helpers.c`` to make it available for the Rust side as</div><div class='add'>+well.</div><div class='add'>+</div><div class='add'>+Abstractions</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Abstractions are the layer between the bindings and the in-kernel users. They</div><div class='add'>+are located in ``rust/kernel/`` and their role is to encapsulate the unsafe</div><div class='add'>+access to the bindings into an as-safe-as-possible API that they expose to their</div><div class='add'>+users. Users of the abstractions include things like drivers or file systems</div><div class='add'>+written in Rust.</div><div class='add'>+</div><div class='add'>+Besides the safety aspect, the abstractions are supposed to be "ergonomic", in</div><div class='add'>+the sense that they turn the C interfaces into "idiomatic" Rust code. Basic</div><div class='add'>+examples are to turn the C resource acquisition and release into Rust</div><div class='add'>+constructors and destructors or C integer error codes into Rust's ``Result``\ s.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Conditional compilation</div><div class='ctx'> -----------------------</div><div class='head'>diff --git a/Documentation/rust/testing.rst b/Documentation/rust/testing.rst<br/>index 6658998d1b6c..acfd0c2be48d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/rust/testing.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/rust/testing.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/rust/testing.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/rust/testing.rst</a></div><div class='hunk'>@@ -6,10 +6,11 @@ Testing</div><div class='ctx'> This document contains useful information how to test the Rust code in the</div><div class='ctx'> kernel.</div><div class='ctx'> </div><div class='del'>-There are two sorts of tests:</div><div class='add'>+There are three sorts of tests:</div><div class='ctx'> </div><div class='ctx'> - The KUnit tests.</div><div class='ctx'> - The ``#[test]`` tests.</div><div class='add'>+- The Kselftests.</div><div class='ctx'> </div><div class='ctx'> The KUnit tests</div><div class='ctx'> ---------------</div><div class='hunk'>@@ -133,3 +134,25 @@ Additionally, there are the ``#[test]`` tests. These can be run using the</div><div class='ctx'> This requires the kernel ``.config`` and downloads external repositories. It</div><div class='ctx'> runs the ``#[test]`` tests on the host (currently) and thus is fairly limited in</div><div class='ctx'> what these tests can test.</div><div class='add'>+</div><div class='add'>+The Kselftests</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Kselftests are also available in the ``tools/testing/selftests/rust`` folder.</div><div class='add'>+</div><div class='add'>+The kernel config options required for the tests are listed in the</div><div class='add'>+``tools/testing/selftests/rust/config`` file and can be included with the aid</div><div class='add'>+of the ``merge_config.sh`` script::</div><div class='add'>+</div><div class='add'>+	./scripts/kconfig/merge_config.sh .config tools/testing/selftests/rust/config</div><div class='add'>+</div><div class='add'>+The kselftests are built within the kernel source tree and are intended to</div><div class='add'>+be executed on a system that is running the same kernel.</div><div class='add'>+</div><div class='add'>+Once a kernel matching the source tree has been installed and booted, the</div><div class='add'>+tests can be compiled and executed using the following command::</div><div class='add'>+</div><div class='add'>+	make TARGETS="rust" kselftest</div><div class='add'>+</div><div class='add'>+Refer to Documentation/dev-tools/kselftest.rst for the general Kselftest</div><div class='add'>+documentation.</div><div class='head'>diff --git a/Documentation/scheduler/sched-domains.rst b/Documentation/scheduler/sched-domains.rst<br/>index e57ad28301bd..5e996fe973b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-domains.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/scheduler/sched-domains.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-domains.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/scheduler/sched-domains.rst</a></div><div class='hunk'>@@ -31,21 +31,21 @@ is treated as one entity. The load of a group is defined as the sum of the</div><div class='ctx'> load of each of its member CPUs, and only when the load of a group becomes</div><div class='ctx'> out of balance are tasks moved between groups.</div><div class='ctx'> </div><div class='del'>-In kernel/sched/core.c, trigger_load_balance() is run periodically on each CPU</div><div class='del'>-through scheduler_tick(). It raises a softirq after the next regularly scheduled</div><div class='add'>+In kernel/sched/core.c, sched_balance_trigger() is run periodically on each CPU</div><div class='add'>+through sched_tick(). It raises a softirq after the next regularly scheduled</div><div class='ctx'> rebalancing event for the current runqueue has arrived. The actual load</div><div class='del'>-balancing workhorse, run_rebalance_domains()-&gt;rebalance_domains(), is then run</div><div class='add'>+balancing workhorse, sched_balance_softirq()-&gt;sched_balance_domains(), is then run</div><div class='ctx'> in softirq context (SCHED_SOFTIRQ).</div><div class='ctx'> </div><div class='ctx'> The latter function takes two arguments: the runqueue of current CPU and whether</div><div class='del'>-the CPU was idle at the time the scheduler_tick() happened and iterates over all</div><div class='add'>+the CPU was idle at the time the sched_tick() happened and iterates over all</div><div class='ctx'> sched domains our CPU is on, starting from its base domain and going up the -&gt;parent</div><div class='ctx'> chain. While doing that, it checks to see if the current domain has exhausted its</div><div class='del'>-rebalance interval. If so, it runs load_balance() on that domain. It then checks</div><div class='add'>+rebalance interval. If so, it runs sched_balance_rq() on that domain. It then checks</div><div class='ctx'> the parent sched_domain (if it exists), and the parent of the parent and so</div><div class='ctx'> forth.</div><div class='ctx'> </div><div class='del'>-Initially, load_balance() finds the busiest group in the current sched domain.</div><div class='add'>+Initially, sched_balance_rq() finds the busiest group in the current sched domain.</div><div class='ctx'> If it succeeds, it looks for the busiest runqueue of all the CPUs' runqueues in</div><div class='ctx'> that group. If it manages to find such a runqueue, it locks both our initial</div><div class='ctx'> CPU's runqueue and the newly found busiest one and starts moving tasks from it</div><div class='head'>diff --git a/Documentation/scheduler/sched-stats.rst b/Documentation/scheduler/sched-stats.rst<br/>index 03c062915998..7c2b16c4729d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-stats.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/scheduler/sched-stats.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-stats.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/scheduler/sched-stats.rst</a></div><div class='hunk'>@@ -2,6 +2,11 @@</div><div class='ctx'> Scheduler Statistics</div><div class='ctx'> ====================</div><div class='ctx'> </div><div class='add'>+Version 16 of schedstats changed the order of definitions within</div><div class='add'>+'enum cpu_idle_type', which changed the order of [CPU_MAX_IDLE_TYPES]</div><div class='add'>+columns in show_schedstat(). In particular the position of CPU_IDLE</div><div class='add'>+and __CPU_NOT_IDLE changed places. The size of the array is unchanged.</div><div class='add'>+</div><div class='ctx'> Version 15 of schedstats dropped counters for some sched_yield:</div><div class='ctx'> yld_exp_empty, yld_act_empty and yld_both_empty. Otherwise, it is</div><div class='ctx'> identical to version 14.</div><div class='hunk'>@@ -72,53 +77,53 @@ domain&lt;N&gt; &lt;cpumask&gt; 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23</div><div class='ctx'> </div><div class='ctx'> The first field is a bit mask indicating what cpus this domain operates over.</div><div class='ctx'> </div><div class='del'>-The next 24 are a variety of load_balance() statistics in grouped into types</div><div class='add'>+The next 24 are a variety of sched_balance_rq() statistics in grouped into types</div><div class='ctx'> of idleness (idle, busy, and newly idle):</div><div class='ctx'> </div><div class='del'>-    1)  # of times in this domain load_balance() was called when the</div><div class='add'>+    1)  # of times in this domain sched_balance_rq() was called when the</div><div class='ctx'>         cpu was idle</div><div class='del'>-    2)  # of times in this domain load_balance() checked but found</div><div class='add'>+    2)  # of times in this domain sched_balance_rq() checked but found</div><div class='ctx'>         the load did not require balancing when the cpu was idle</div><div class='del'>-    3)  # of times in this domain load_balance() tried to move one or</div><div class='add'>+    3)  # of times in this domain sched_balance_rq() tried to move one or</div><div class='ctx'>         more tasks and failed, when the cpu was idle</div><div class='ctx'>     4)  sum of imbalances discovered (if any) with each call to</div><div class='del'>-        load_balance() in this domain when the cpu was idle</div><div class='add'>+        sched_balance_rq() in this domain when the cpu was idle</div><div class='ctx'>     5)  # of times in this domain pull_task() was called when the cpu</div><div class='ctx'>         was idle</div><div class='ctx'>     6)  # of times in this domain pull_task() was called even though</div><div class='ctx'>         the target task was cache-hot when idle</div><div class='del'>-    7)  # of times in this domain load_balance() was called but did</div><div class='add'>+    7)  # of times in this domain sched_balance_rq() was called but did</div><div class='ctx'>         not find a busier queue while the cpu was idle</div><div class='ctx'>     8)  # of times in this domain a busier queue was found while the</div><div class='ctx'>         cpu was idle but no busier group was found</div><div class='del'>-    9)  # of times in this domain load_balance() was called when the</div><div class='add'>+    9)  # of times in this domain sched_balance_rq() was called when the</div><div class='ctx'>         cpu was busy</div><div class='del'>-    10) # of times in this domain load_balance() checked but found the</div><div class='add'>+    10) # of times in this domain sched_balance_rq() checked but found the</div><div class='ctx'>         load did not require balancing when busy</div><div class='del'>-    11) # of times in this domain load_balance() tried to move one or</div><div class='add'>+    11) # of times in this domain sched_balance_rq() tried to move one or</div><div class='ctx'>         more tasks and failed, when the cpu was busy</div><div class='ctx'>     12) sum of imbalances discovered (if any) with each call to</div><div class='del'>-        load_balance() in this domain when the cpu was busy</div><div class='add'>+        sched_balance_rq() in this domain when the cpu was busy</div><div class='ctx'>     13) # of times in this domain pull_task() was called when busy</div><div class='ctx'>     14) # of times in this domain pull_task() was called even though the</div><div class='ctx'>         target task was cache-hot when busy</div><div class='del'>-    15) # of times in this domain load_balance() was called but did not</div><div class='add'>+    15) # of times in this domain sched_balance_rq() was called but did not</div><div class='ctx'>         find a busier queue while the cpu was busy</div><div class='ctx'>     16) # of times in this domain a busier queue was found while the cpu</div><div class='ctx'>         was busy but no busier group was found</div><div class='ctx'> </div><div class='del'>-    17) # of times in this domain load_balance() was called when the</div><div class='add'>+    17) # of times in this domain sched_balance_rq() was called when the</div><div class='ctx'>         cpu was just becoming idle</div><div class='del'>-    18) # of times in this domain load_balance() checked but found the</div><div class='add'>+    18) # of times in this domain sched_balance_rq() checked but found the</div><div class='ctx'>         load did not require balancing when the cpu was just becoming idle</div><div class='del'>-    19) # of times in this domain load_balance() tried to move one or more</div><div class='add'>+    19) # of times in this domain sched_balance_rq() tried to move one or more</div><div class='ctx'>         tasks and failed, when the cpu was just becoming idle</div><div class='ctx'>     20) sum of imbalances discovered (if any) with each call to</div><div class='del'>-        load_balance() in this domain when the cpu was just becoming idle</div><div class='add'>+        sched_balance_rq() in this domain when the cpu was just becoming idle</div><div class='ctx'>     21) # of times in this domain pull_task() was called when newly idle</div><div class='ctx'>     22) # of times in this domain pull_task() was called even though the</div><div class='ctx'>         target task was cache-hot when just becoming idle</div><div class='del'>-    23) # of times in this domain load_balance() was called but did not</div><div class='add'>+    23) # of times in this domain sched_balance_rq() was called but did not</div><div class='ctx'>         find a busier queue while the cpu was just becoming idle</div><div class='ctx'>     24) # of times in this domain a busier queue was found while the cpu</div><div class='ctx'>         was just becoming idle but no busier group was found</div><div class='head'>diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst<br/>index 022198c51350..2df29b92e196 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/scsi/scsi_mid_low_api.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/scsi/scsi_mid_low_api.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/scsi/scsi_mid_low_api.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/scsi/scsi_mid_low_api.rst</a></div><div class='hunk'>@@ -42,18 +42,18 @@ This version of the document roughly matches linux kernel version 2.6.8 .</div><div class='ctx'> Documentation</div><div class='ctx'> =============</div><div class='ctx'> There is a SCSI documentation directory within the kernel source tree,</div><div class='del'>-typically Documentation/scsi . Most documents are in plain</div><div class='del'>-(i.e. ASCII) text. This file is named scsi_mid_low_api.txt and can be</div><div class='add'>+typically Documentation/scsi . Most documents are in reStructuredText</div><div class='add'>+format. This file is named scsi_mid_low_api.rst and can be</div><div class='ctx'> found in that directory. A more recent copy of this document may be found</div><div class='del'>-at http://web.archive.org/web/20070107183357rn_1/sg.torque.net/scsi/.</div><div class='del'>-Many LLDs are documented there (e.g. aic7xxx.txt). The SCSI mid-level is</div><div class='del'>-briefly described in scsi.txt which contains a url to a document</div><div class='del'>-describing the SCSI subsystem in the lk 2.4 series. Two upper level</div><div class='del'>-drivers have documents in that directory: st.txt (SCSI tape driver) and</div><div class='del'>-scsi-generic.txt (for the sg driver).</div><div class='del'>-</div><div class='del'>-Some documentation (or urls) for LLDs may be found in the C source code</div><div class='del'>-or in the same directory as the C source code. For example to find a url</div><div class='add'>+at https://docs.kernel.org/scsi/scsi_mid_low_api.html. Many LLDs are</div><div class='add'>+documented in Documentation/scsi (e.g. aic7xxx.rst). The SCSI mid-level is</div><div class='add'>+briefly described in scsi.rst which contains a URL to a document describing</div><div class='add'>+the SCSI subsystem in the Linux Kernel 2.4 series. Two upper level</div><div class='add'>+drivers have documents in that directory: st.rst (SCSI tape driver) and</div><div class='add'>+scsi-generic.rst (for the sg driver).</div><div class='add'>+</div><div class='add'>+Some documentation (or URLs) for LLDs may be found in the C source code</div><div class='add'>+or in the same directory as the C source code. For example to find a URL</div><div class='ctx'> about the USB mass storage driver see the</div><div class='ctx'> /usr/src/linux/drivers/usb/storage directory.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/security/SCTP.rst b/Documentation/security/SCTP.rst<br/>index b73eb764a001..6d80d464ab6e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/security/SCTP.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/security/SCTP.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/security/SCTP.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/security/SCTP.rst</a></div><div class='hunk'>@@ -81,7 +81,7 @@ A summary of the ``@optname`` entries is as follows::</div><div class='ctx'>                             destination addresses.</div><div class='ctx'> </div><div class='ctx'>     SCTP_SENDMSG_CONNECT  - Initiate a connection that is generated by a</div><div class='del'>-                            sendmsg(2) or sctp_sendmsg(3) on a new asociation.</div><div class='add'>+                            sendmsg(2) or sctp_sendmsg(3) on a new association.</div><div class='ctx'> </div><div class='ctx'>     SCTP_PRIMARY_ADDR     - Set local primary address.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/security/keys/trusted-encrypted.rst b/Documentation/security/keys/trusted-encrypted.rst<br/>index e989b9802f92..f4d7e162d5e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/security/keys/trusted-encrypted.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/security/keys/trusted-encrypted.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/security/keys/trusted-encrypted.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/security/keys/trusted-encrypted.rst</a></div><div class='hunk'>@@ -42,6 +42,14 @@ safe.</div><div class='ctx'>          randomly generated and fused into each SoC at manufacturing time.</div><div class='ctx'>          Otherwise, a common fixed test key is used instead.</div><div class='ctx'> </div><div class='add'>+     (4) DCP (Data Co-Processor: crypto accelerator of various i.MX SoCs)</div><div class='add'>+</div><div class='add'>+         Rooted to a one-time programmable key (OTP) that is generally burnt</div><div class='add'>+         in the on-chip fuses and is accessible to the DCP encryption engine only.</div><div class='add'>+         DCP provides two keys that can be used as root of trust: the OTP key</div><div class='add'>+         and the UNIQUE key. Default is to use the UNIQUE key, but selecting</div><div class='add'>+         the OTP key can be done via a module parameter (dcp_use_otp_key).</div><div class='add'>+</div><div class='ctx'>   *  Execution isolation</div><div class='ctx'> </div><div class='ctx'>      (1) TPM</div><div class='hunk'>@@ -57,6 +65,12 @@ safe.</div><div class='ctx'> </div><div class='ctx'>          Fixed set of operations running in isolated execution environment.</div><div class='ctx'> </div><div class='add'>+     (4) DCP</div><div class='add'>+</div><div class='add'>+         Fixed set of cryptographic operations running in isolated execution</div><div class='add'>+         environment. Only basic blob key encryption is executed there.</div><div class='add'>+         The actual key sealing/unsealing is done on main processor/kernel space.</div><div class='add'>+</div><div class='ctx'>   * Optional binding to platform integrity state</div><div class='ctx'> </div><div class='ctx'>      (1) TPM</div><div class='hunk'>@@ -79,6 +93,11 @@ safe.</div><div class='ctx'>          Relies on the High Assurance Boot (HAB) mechanism of NXP SoCs</div><div class='ctx'>          for platform integrity.</div><div class='ctx'> </div><div class='add'>+     (4) DCP</div><div class='add'>+</div><div class='add'>+         Relies on Secure/Trusted boot process (called HAB by vendor) for</div><div class='add'>+         platform integrity.</div><div class='add'>+</div><div class='ctx'>   *  Interfaces and APIs</div><div class='ctx'> </div><div class='ctx'>      (1) TPM</div><div class='hunk'>@@ -94,6 +113,11 @@ safe.</div><div class='ctx'> </div><div class='ctx'>          Interface is specific to silicon vendor.</div><div class='ctx'> </div><div class='add'>+     (4) DCP</div><div class='add'>+</div><div class='add'>+         Vendor-specific API that is implemented as part of the DCP crypto driver in</div><div class='add'>+         ``drivers/crypto/mxs-dcp.c``.</div><div class='add'>+</div><div class='ctx'>   *  Threat model</div><div class='ctx'> </div><div class='ctx'>      The strength and appropriateness of a particular trust source for a given</div><div class='hunk'>@@ -129,6 +153,13 @@ selected trust source:</div><div class='ctx'>      CAAM HWRNG, enable CRYPTO_DEV_FSL_CAAM_RNG_API and ensure the device</div><div class='ctx'>      is probed.</div><div class='ctx'> </div><div class='add'>+  *  DCP (Data Co-Processor: crypto accelerator of various i.MX SoCs)</div><div class='add'>+</div><div class='add'>+     The DCP hardware device itself does not provide a dedicated RNG interface,</div><div class='add'>+     so the kernel default RNG is used. SoCs with DCP like the i.MX6ULL do have</div><div class='add'>+     a dedicated hardware RNG that is independent from DCP which can be enabled</div><div class='add'>+     to back the kernel RNG.</div><div class='add'>+</div><div class='ctx'> Users may override this by specifying ``trusted.rng=kernel`` on the kernel</div><div class='ctx'> command-line to override the used RNG with the kernel's random number pool.</div><div class='ctx'> </div><div class='hunk'>@@ -231,6 +262,19 @@ Usage::</div><div class='ctx'> CAAM-specific format.  The key length for new keys is always in bytes.</div><div class='ctx'> Trusted Keys can be 32 - 128 bytes (256 - 1024 bits).</div><div class='ctx'> </div><div class='add'>+Trusted Keys usage: DCP</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+Usage::</div><div class='add'>+</div><div class='add'>+    keyctl add trusted name "new keylen" ring</div><div class='add'>+    keyctl add trusted name "load hex_blob" ring</div><div class='add'>+    keyctl print keyid</div><div class='add'>+</div><div class='add'>+"keyctl print" returns an ASCII hex copy of the sealed key, which is in format</div><div class='add'>+specific to this DCP key-blob implementation.  The key length for new keys is</div><div class='add'>+always in bytes. Trusted Keys can be 32 - 128 bytes (256 - 1024 bits).</div><div class='add'>+</div><div class='ctx'> Encrypted Keys usage</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='hunk'>@@ -426,3 +470,12 @@ string length.</div><div class='ctx'> privkey is the binary representation of TPM2B_PUBLIC excluding the</div><div class='ctx'> initial TPM2B header which can be reconstructed from the ASN.1 octed</div><div class='ctx'> string length.</div><div class='add'>+</div><div class='add'>+DCP Blob Format</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: security/keys/trusted-keys/trusted_dcp.c</div><div class='add'>+   :doc: dcp blob format</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: security/keys/trusted-keys/trusted_dcp.c</div><div class='add'>+   :identifiers: struct dcp_blob_fmt</div><div class='head'>diff --git a/Documentation/security/snp-tdx-threat-model.rst b/Documentation/security/snp-tdx-threat-model.rst<br/>index ec66f2ed80c9..3a2d41d2e645 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/security/snp-tdx-threat-model.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/security/snp-tdx-threat-model.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/security/snp-tdx-threat-model.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/security/snp-tdx-threat-model.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@ Confidential Computing in Linux for x86 virtualization</div><div class='ctx'> </div><div class='ctx'> .. contents:: :local:</div><div class='ctx'> </div><div class='del'>-By: Elena Reshetova &lt;elena.reshetova@intel.com&gt; and Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+By: Elena Reshetova &lt;elena.reshetova@intel.com&gt; and Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> Motivation</div><div class='ctx'> ==========</div><div class='head'>diff --git a/Documentation/security/tpm/index.rst b/Documentation/security/tpm/index.rst<br/>index fc40e9f23c85..fa593d960040 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/security/tpm/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/security/tpm/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/security/tpm/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/security/tpm/index.rst</a></div><div class='hunk'>@@ -5,6 +5,8 @@ Trusted Platform Module documentation</div><div class='ctx'> .. toctree::</div><div class='ctx'> </div><div class='ctx'>    tpm_event_log</div><div class='add'>+   tpm-security</div><div class='add'>+   tpm_tis</div><div class='ctx'>    tpm_vtpm_proxy</div><div class='ctx'>    xen-tpmfront</div><div class='ctx'>    tpm_ftpm_tee</div><div class='head'>diff --git a/Documentation/security/tpm/tpm-security.rst b/Documentation/security/tpm/tpm-security.rst<br/>new file mode 100644<br/>index 000000000000..4f633f251033<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/security/tpm/tpm-security.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/security/tpm/tpm-security.rst</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+TPM Security</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+The object of this document is to describe how we make the kernel's</div><div class='add'>+use of the TPM reasonably robust in the face of external snooping and</div><div class='add'>+packet alteration attacks (called passive and active interposer attack</div><div class='add'>+in the literature).  The current security document is for TPM 2.0.</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The TPM is usually a discrete chip attached to a PC via some type of</div><div class='add'>+low bandwidth bus.  There are exceptions to this such as the Intel</div><div class='add'>+PTT, which is a software TPM running inside a software environment</div><div class='add'>+close to the CPU, which are subject to different attacks, but right at</div><div class='add'>+the moment, most hardened security environments require a discrete</div><div class='add'>+hardware TPM, which is the use case discussed here.</div><div class='add'>+</div><div class='add'>+Snooping and Alteration Attacks against the bus</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+The current state of the art for snooping the `TPM Genie`_ hardware</div><div class='add'>+interposer which is a simple external device that can be installed in</div><div class='add'>+a couple of seconds on any system or laptop.  Recently attacks were</div><div class='add'>+successfully demonstrated against the `Windows Bitlocker TPM`_ system.</div><div class='add'>+Most recently the same `attack against TPM based Linux disk</div><div class='add'>+encryption`_ schemes.  The next phase of research seems to be hacking</div><div class='add'>+existing devices on the bus to act as interposers, so the fact that</div><div class='add'>+the attacker requires physical access for a few seconds might</div><div class='add'>+evaporate.  However, the goal of this document is to protect TPM</div><div class='add'>+secrets and integrity as far as we are able in this environment and to</div><div class='add'>+try to insure that if we can't prevent the attack then at least we can</div><div class='add'>+detect it.</div><div class='add'>+</div><div class='add'>+Unfortunately, most of the TPM functionality, including the hardware</div><div class='add'>+reset capability can be controlled by an attacker who has access to</div><div class='add'>+the bus, so we'll discuss some of the disruption possibilities below.</div><div class='add'>+</div><div class='add'>+Measurement (PCR) Integrity</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+Since the attacker can send their own commands to the TPM, they can</div><div class='add'>+send arbitrary PCR extends and thus disrupt the measurement system,</div><div class='add'>+which would be an annoying denial of service attack.  However, there</div><div class='add'>+are two, more serious, classes of attack aimed at entities sealed to</div><div class='add'>+trust measurements.</div><div class='add'>+</div><div class='add'>+1. The attacker could intercept all PCR extends coming from the system</div><div class='add'>+   and completely substitute their own values, producing a replay of</div><div class='add'>+   an untampered state that would cause PCR measurements to attest to</div><div class='add'>+   a trusted state and release secrets</div><div class='add'>+</div><div class='add'>+2. At some point in time the attacker could reset the TPM, clearing</div><div class='add'>+   the PCRs and then send down their own measurements which would</div><div class='add'>+   effectively overwrite the boot time measurements the TPM has</div><div class='add'>+   already done.</div><div class='add'>+</div><div class='add'>+The first can be thwarted by always doing HMAC protection of the PCR</div><div class='add'>+extend and read command meaning measurement values cannot be</div><div class='add'>+substituted without producing a detectable HMAC failure in the</div><div class='add'>+response.  However, the second can only really be detected by relying</div><div class='add'>+on some sort of mechanism for protection which would change over TPM</div><div class='add'>+reset.</div><div class='add'>+</div><div class='add'>+Secrets Guarding</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Certain information passing in and out of the TPM, such as key sealing</div><div class='add'>+and private key import and random number generation, is vulnerable to</div><div class='add'>+interception which HMAC protection alone cannot protect against, so</div><div class='add'>+for these types of command we must also employ request and response</div><div class='add'>+encryption to prevent the loss of secret information.</div><div class='add'>+</div><div class='add'>+Establishing Initial Trust with the TPM</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+In order to provide security from the beginning, an initial shared or</div><div class='add'>+asymmetric secret must be established which must also be unknown to</div><div class='add'>+the attacker.  The most obvious avenues for this are the endorsement</div><div class='add'>+and storage seeds, which can be used to derive asymmetric keys.</div><div class='add'>+However, using these keys is difficult because the only way to pass</div><div class='add'>+them into the kernel would be on the command line, which requires</div><div class='add'>+extensive support in the boot system, and there's no guarantee that</div><div class='add'>+either hierarchy would not have some type of authorization.</div><div class='add'>+</div><div class='add'>+The mechanism chosen for the Linux Kernel is to derive the primary</div><div class='add'>+elliptic curve key from the null seed using the standard storage seed</div><div class='add'>+parameters.  The null seed has two advantages: firstly the hierarchy</div><div class='add'>+physically cannot have an authorization, so we are always able to use</div><div class='add'>+it and secondly, the null seed changes across TPM resets, meaning if</div><div class='add'>+we establish trust on the null seed at start of day, all sessions</div><div class='add'>+salted with the derived key will fail if the TPM is reset and the seed</div><div class='add'>+changes.</div><div class='add'>+</div><div class='add'>+Obviously using the null seed without any other prior shared secrets,</div><div class='add'>+we have to create and read the initial public key which could, of</div><div class='add'>+course, be intercepted and substituted by the bus interposer.</div><div class='add'>+However, the TPM has a key certification mechanism (using the EK</div><div class='add'>+endorsement certificate, creating an attestation identity key and</div><div class='add'>+certifying the null seed primary with that key) which is too complex</div><div class='add'>+to run within the kernel, so we keep a copy of the null primary key</div><div class='add'>+name, which is what is exported via sysfs so user-space can run the</div><div class='add'>+full certification when it boots.  The definitive guarantee here is</div><div class='add'>+that if the null primary key certifies correctly, you know all your</div><div class='add'>+TPM transactions since start of day were secure and if it doesn't, you</div><div class='add'>+know there's an interposer on your system (and that any secret used</div><div class='add'>+during boot may have been leaked).</div><div class='add'>+</div><div class='add'>+Stacking Trust</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+In the current null primary scenario, the TPM must be completely</div><div class='add'>+cleared before handing it on to the next consumer.  However the kernel</div><div class='add'>+hands to user-space the name of the derived null seed key which can</div><div class='add'>+then be verified by certification in user-space.  Therefore, this chain</div><div class='add'>+of name handoff can be used between the various boot components as</div><div class='add'>+well (via an unspecified mechanism).  For instance, grub could use the</div><div class='add'>+null seed scheme for security and hand the name off to the kernel in</div><div class='add'>+the boot area.  The kernel could make its own derivation of the key</div><div class='add'>+and the name and know definitively that if they differ from the handed</div><div class='add'>+off version that tampering has occurred.  Thus it becomes possible to</div><div class='add'>+chain arbitrary boot components together (UEFI to grub to kernel) via</div><div class='add'>+the name handoff provided each successive component knows how to</div><div class='add'>+collect the name and verifies it against its derived key.</div><div class='add'>+</div><div class='add'>+Session Properties</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+All TPM commands the kernel uses allow sessions.  HMAC sessions may be</div><div class='add'>+used to check the integrity of requests and responses and decrypt and</div><div class='add'>+encrypt flags may be used to shield parameters and responses.  The</div><div class='add'>+HMAC and encryption keys are usually derived from the shared</div><div class='add'>+authorization secret, but for a lot of kernel operations that is well</div><div class='add'>+known (and usually empty).  Thus, every HMAC session used by the</div><div class='add'>+kernel must be created using the null primary key as the salt key</div><div class='add'>+which thus provides a cryptographic input into the session key</div><div class='add'>+derivation.  Thus, the kernel creates the null primary key once (as a</div><div class='add'>+volatile TPM handle) and keeps it around in a saved context stored in</div><div class='add'>+tpm_chip for every in-kernel use of the TPM.  Currently, because of a</div><div class='add'>+lack of de-gapping in the in-kernel resource manager, the session must</div><div class='add'>+be created and destroyed for each operation, but, in future, a single</div><div class='add'>+session may also be reused for the in-kernel HMAC, encryption and</div><div class='add'>+decryption sessions.</div><div class='add'>+</div><div class='add'>+Protection Types</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+For every in-kernel operation we use null primary salted HMAC to</div><div class='add'>+protect the integrity.  Additionally, we use parameter encryption to</div><div class='add'>+protect key sealing and parameter decryption to protect key unsealing</div><div class='add'>+and random number generation.</div><div class='add'>+</div><div class='add'>+Null Primary Key Certification in Userspace</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+Every TPM comes shipped with a couple of X.509 certificates for the</div><div class='add'>+primary endorsement key.  This document assumes that the Elliptic</div><div class='add'>+Curve version of the certificate exists at 01C00002, but will work</div><div class='add'>+equally well with the RSA certificate (at 01C00001).</div><div class='add'>+</div><div class='add'>+The first step in the certification is primary creation using the</div><div class='add'>+template from the `TCG EK Credential Profile`_ which allows comparison</div><div class='add'>+of the generated primary key against the one in the certificate (the</div><div class='add'>+public key must match).  Note that generation of the EK primary</div><div class='add'>+requires the EK hierarchy password, but a pre-generated version of the</div><div class='add'>+EC primary should exist at 81010002 and a TPM2_ReadPublic() may be</div><div class='add'>+performed on this without needing the key authority.  Next, the</div><div class='add'>+certificate itself must be verified to chain back to the manufacturer</div><div class='add'>+root (which should be published on the manufacturer website).  Once</div><div class='add'>+this is done, an attestation key (AK) is generated within the TPM and</div><div class='add'>+it's name and the EK public key can be used to encrypt a secret using</div><div class='add'>+TPM2_MakeCredential.  The TPM then runs TPM2_ActivateCredential which</div><div class='add'>+will only recover the secret if the binding between the TPM, the EK</div><div class='add'>+and the AK is true. the generated AK may now be used to run a</div><div class='add'>+certification of the null primary key whose name the kernel has</div><div class='add'>+exported.  Since TPM2_MakeCredential/ActivateCredential are somewhat</div><div class='add'>+complicated, a more simplified process involving an externally</div><div class='add'>+generated private key is described below.</div><div class='add'>+</div><div class='add'>+This process is a simplified abbreviation of the usual privacy CA</div><div class='add'>+based attestation process.  The assumption here is that the</div><div class='add'>+attestation is done by the TPM owner who thus has access to only the</div><div class='add'>+owner hierarchy.  The owner creates an external public/private key</div><div class='add'>+pair (assume elliptic curve in this case) and wraps the private key</div><div class='add'>+for import using an inner wrapping process and parented to the EC</div><div class='add'>+derived storage primary.  The TPM2_Import() is done using a parameter</div><div class='add'>+decryption HMAC session salted to the EK primary (which also does not</div><div class='add'>+require the EK key authority) meaning that the inner wrapping key is</div><div class='add'>+the encrypted parameter and thus the TPM will not be able to perform</div><div class='add'>+the import unless is possesses the certified EK so if the command</div><div class='add'>+succeeds and the HMAC verifies on return we know we have a loadable</div><div class='add'>+copy of the private key only for the certified TPM.  This key is now</div><div class='add'>+loaded into the TPM and the Storage primary flushed (to free up space</div><div class='add'>+for the null key generation).</div><div class='add'>+</div><div class='add'>+The null EC primary is now generated using the Storage profile</div><div class='add'>+outlined in the `TCG TPM v2.0 Provisioning Guidance`_; the name of</div><div class='add'>+this key (the hash of the public area) is computed and compared to the</div><div class='add'>+null seed name presented by the kernel in</div><div class='add'>+/sys/class/tpm/tpm0/null_name.  If the names do not match, the TPM is</div><div class='add'>+compromised.  If the names match, the user performs a TPM2_Certify()</div><div class='add'>+using the null primary as the object handle and the loaded private key</div><div class='add'>+as the sign handle and providing randomized qualifying data.  The</div><div class='add'>+signature of the returned certifyInfo is verified against the public</div><div class='add'>+part of the loaded private key and the qualifying data checked to</div><div class='add'>+prevent replay.  If all of these tests pass, the user is now assured</div><div class='add'>+that TPM integrity and privacy was preserved across the entire boot</div><div class='add'>+sequence of this kernel.</div><div class='add'>+</div><div class='add'>+.. _TPM Genie: https://www.nccgroup.trust/globalassets/about-us/us/documents/tpm-genie.pdf</div><div class='add'>+.. _Windows Bitlocker TPM: https://dolosgroup.io/blog/2021/7/9/from-stolen-laptop-to-inside-the-company-network</div><div class='add'>+.. _attack against TPM based Linux disk encryption: https://www.secura.com/blog/tpm-sniffing-attacks-against-non-bitlocker-targets</div><div class='add'>+.. _TCG EK Credential Profile: https://trustedcomputinggroup.org/resource/tcg-ek-credential-profile-for-tpm-family-2-0/</div><div class='add'>+.. _TCG TPM v2.0 Provisioning Guidance: https://trustedcomputinggroup.org/resource/tcg-tpm-v2-0-provisioning-guidance/</div><div class='head'>diff --git a/Documentation/security/tpm/tpm_tis.rst b/Documentation/security/tpm/tpm_tis.rst<br/>new file mode 100644<br/>index 000000000000..b9637f295638<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/security/tpm/tpm_tis.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/security/tpm/tpm_tis.rst</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=========================</div><div class='add'>+TPM FIFO interface driver</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+TCG PTP Specification defines two interface types: FIFO and CRB. The former is</div><div class='add'>+based on sequenced read and write operations,  and the latter is based on a</div><div class='add'>+buffer containing the full command or response.</div><div class='add'>+</div><div class='add'>+FIFO (First-In-First-Out) interface is used by the tpm_tis_core dependent</div><div class='add'>+drivers. Originally Linux had only a driver called tpm_tis, which covered</div><div class='add'>+memory mapped (aka MMIO) interface but it was later on extended to cover other</div><div class='add'>+physical interfaces supported by the TCG standard.</div><div class='add'>+</div><div class='add'>+For historical reasons above the original MMIO driver is called tpm_tis and the</div><div class='add'>+framework for FIFO drivers is named as tpm_tis_core. The postfix "tis" in</div><div class='add'>+tpm_tis comes from the TPM Interface Specification, which is the hardware</div><div class='add'>+interface specification for TPM 1.x chips.</div><div class='add'>+</div><div class='add'>+Communication is based on a 20 KiB buffer shared by the TPM chip through a</div><div class='add'>+hardware bus or memory map, depending on the physical wiring. The buffer is</div><div class='add'>+further split into five equal-size 4 KiB buffers, which provide equivalent</div><div class='add'>+sets of registers for communication between the CPU and TPM. These</div><div class='add'>+communication endpoints are called localities in the TCG terminology.</div><div class='add'>+</div><div class='add'>+When the kernel wants to send commands to the TPM chip, it first reserves</div><div class='add'>+locality 0 by setting the requestUse bit in the TPM_ACCESS register. The bit is</div><div class='add'>+cleared by the chip when the access is granted. Once it completes its</div><div class='add'>+communication, the kernel writes the TPM_ACCESS.activeLocality bit. This</div><div class='add'>+informs the chip that the locality has been relinquished.</div><div class='add'>+</div><div class='add'>+Pending localities are served in order by the chip in descending order, one at</div><div class='add'>+a time:</div><div class='add'>+</div><div class='add'>+- Locality 0 has the lowest priority.</div><div class='add'>+- Locality 5 has the highest priority.</div><div class='add'>+</div><div class='add'>+Further information on the purpose and meaning of the localities can be found</div><div class='add'>+in section 3.2 of the TCG PC Client Platform TPM Profile Specification.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+TCG PC Client Platform TPM Profile (PTP) Specification</div><div class='add'>+https://trustedcomputinggroup.org/resource/pc-client-platform-tpm-profile-ptp-specification/</div><div class='head'>diff --git a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst<br/>index 2d2998faff62..801b0bb57e97 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/sound/kernel-api/writing-an-alsa-driver.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sound/kernel-api/writing-an-alsa-driver.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sound/kernel-api/writing-an-alsa-driver.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/sound/kernel-api/writing-an-alsa-driver.rst</a></div><div class='hunk'>@@ -3976,7 +3976,7 @@ Driver with A Single Source File</div><div class='ctx'> </div><div class='ctx'>    Suppose you have a file xyz.c. Add the following two lines::</div><div class='ctx'> </div><div class='del'>-     snd-xyz-objs := xyz.o</div><div class='add'>+     snd-xyz-y := xyz.o</div><div class='ctx'>      obj-$(CONFIG_SND_XYZ) += snd-xyz.o</div><div class='ctx'> </div><div class='ctx'> 2. Create the Kconfig entry</div><div class='hunk'>@@ -4019,7 +4019,7 @@ located in the new subdirectory, sound/pci/xyz.</div><div class='ctx'> </div><div class='ctx'> 2. Under the directory ``sound/pci/xyz``, create a Makefile::</div><div class='ctx'> </div><div class='del'>-         snd-xyz-objs := xyz.o abc.o def.o</div><div class='add'>+         snd-xyz-y := xyz.o abc.o def.o</div><div class='ctx'>          obj-$(CONFIG_SND_XYZ) += snd-xyz.o</div><div class='ctx'> </div><div class='ctx'> 3. Create the Kconfig entry</div><div class='head'>diff --git a/Documentation/sound/soc/dapm-graph.svg b/Documentation/sound/soc/dapm-graph.svg<br/>new file mode 100644<br/>index 000000000000..d783672db815<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sound/soc/dapm-graph.svg?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/sound/soc/dapm-graph.svg</a></div><div class='hunk'>@@ -0,0 +1,375 @@</div><div class='add'>+&lt;?xml version="1.0" encoding="UTF-8" standalone="no"?&gt;</div><div class='add'>+&lt;!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"</div><div class='add'>+ "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd"&gt;</div><div class='add'>+&lt;!-- Generated by graphviz version 2.43.0 (0)</div><div class='add'>+ --&gt;</div><div class='add'>+&lt;!-- Title: G Pages: 1 --&gt;</div><div class='add'>+&lt;svg width="900pt" height="630pt"</div><div class='add'>+ viewBox="0.00 0.00 900.00 630.00" xmlns="http://www.w3.org/2000/svg" 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class="edge"&gt;</div><div class='add'>+&lt;title&gt;cs42l51.0&amp;#45;004a_Left DAC&amp;#45;&amp;gt;cs42l51.0&amp;#45;004a_HPL&lt;/title&gt;</div><div class='add'>+&lt;path fill="none" stroke="black" d="M511,-89.83C511,-82.13 511,-72.97 511,-64.42"/&gt;</div><div class='add'>+&lt;polygon fill="black" stroke="black" points="514.5,-64.41 511,-54.41 507.5,-64.41 514.5,-64.41"/&gt;</div><div class='add'>+&lt;/g&gt;</div><div class='add'>+&lt;!-- cs42l51.0&amp;#45;004a_Left PGA --&gt;</div><div class='add'>+&lt;g id="node15" class="node"&gt;</div><div class='add'>+&lt;title&gt;cs42l51.0&amp;#45;004a_Left PGA&lt;/title&gt;</div><div class='add'>+&lt;polygon fill="#f2f2f2" stroke="#4d4d4d" points="838,-424 764,-424 764,-386 838,-386 838,-424"/&gt;</div><div class='add'>+&lt;text text-anchor="middle" x="801" y="-408.8" font-family="sans-serif" font-size="14.00"&gt;Left PGA&lt;/text&gt;</div><div class='add'>+&lt;text text-anchor="middle" x="801" y="-393.8" font-family="sans-serif" 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154.61,-519.42"/&gt;</div><div class='add'>+&lt;polygon fill="black" stroke="black" points="158.1,-519.46 154.74,-509.41 151.11,-519.36 158.1,-519.46"/&gt;</div><div class='add'>+&lt;/g&gt;</div><div class='add'>+&lt;/g&gt;</div><div class='add'>+&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/sound/soc/dapm.rst b/Documentation/sound/soc/dapm.rst<br/>index c3154ce6e1b2..14c4dc026e6b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/sound/soc/dapm.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sound/soc/dapm.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sound/soc/dapm.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/sound/soc/dapm.rst</a></div><div class='hunk'>@@ -7,8 +7,8 @@ Description</div><div class='ctx'> </div><div class='ctx'> Dynamic Audio Power Management (DAPM) is designed to allow portable</div><div class='ctx'> Linux devices to use the minimum amount of power within the audio</div><div class='del'>-subsystem at all times. It is independent of other kernel PM and as</div><div class='del'>-such, can easily co-exist with the other PM systems.</div><div class='add'>+subsystem at all times. It is independent of other kernel power</div><div class='add'>+management frameworks and, as such, can easily co-exist with them.</div><div class='ctx'> </div><div class='ctx'> DAPM is also completely transparent to all user space applications as</div><div class='ctx'> all power switching is done within the ASoC core. No code changes or</div><div class='hunk'>@@ -16,11 +16,29 @@ recompiling are required for user space applications. DAPM makes power</div><div class='ctx'> switching decisions based upon any audio stream (capture/playback)</div><div class='ctx'> activity and audio mixer settings within the device.</div><div class='ctx'> </div><div class='del'>-DAPM spans the whole machine. It covers power control within the entire</div><div class='del'>-audio subsystem, this includes internal codec power blocks and machine</div><div class='del'>-level power systems.</div><div class='add'>+DAPM is based on two basic elements, called widgets and routes:</div><div class='ctx'> </div><div class='del'>-There are 4 power domains within DAPM</div><div class='add'>+ * a **widget** is every part of the audio hardware that can be enabled by</div><div class='add'>+   software when in use and disabled to save power when not in use</div><div class='add'>+ * a **route** is an interconnection between widgets that exists when sound</div><div class='add'>+   can flow from one widget to the other</div><div class='add'>+</div><div class='add'>+All DAPM power switching decisions are made automatically by consulting an</div><div class='add'>+audio routing graph. This graph is specific to each sound card and spans</div><div class='add'>+the whole sound card, so some DAPM routes connect two widgets belonging to</div><div class='add'>+different components (e.g. the LINE OUT pin of a CODEC and the input pin of</div><div class='add'>+an amplifier).</div><div class='add'>+</div><div class='add'>+The graph for the STM32MP1-DK1 sound card is shown in picture:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: dapm-graph.svg</div><div class='add'>+    :alt:   Example DAPM graph</div><div class='add'>+    :align: center</div><div class='add'>+</div><div class='add'>+DAPM power domains</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+There are 4 power domains within DAPM:</div><div class='ctx'> </div><div class='ctx'> Codec bias domain</div><div class='ctx'>       VREF, VMID (core codec and audio power)</div><div class='hunk'>@@ -47,17 +65,11 @@ Stream domain</div><div class='ctx'>       Enabled and disabled when stream playback/capture is started and</div><div class='ctx'>       stopped respectively. e.g. aplay, arecord.</div><div class='ctx'> </div><div class='del'>-All DAPM power switching decisions are made automatically by consulting an audio</div><div class='del'>-routing map of the whole machine. This map is specific to each machine and</div><div class='del'>-consists of the interconnections between every audio component (including</div><div class='del'>-internal codec components). All audio components that effect power are called</div><div class='del'>-widgets hereafter.</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> DAPM Widgets</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-Audio DAPM widgets fall into a number of types:-</div><div class='add'>+Audio DAPM widgets fall into a number of types:</div><div class='ctx'> </div><div class='ctx'> Mixer</div><div class='ctx'> 	Mixes several analog signals into a single analog signal.</div><div class='hunk'>@@ -141,14 +153,14 @@ Stream Widgets relate to the stream power domain and only consist of ADCs</div><div class='ctx'> (analog to digital converters), DACs (digital to analog converters),</div><div class='ctx'> AIF IN and AIF OUT.</div><div class='ctx'> </div><div class='del'>-Stream widgets have the following format:-</div><div class='add'>+Stream widgets have the following format:</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   SND_SOC_DAPM_DAC(name, stream name, reg, shift, invert),</div><div class='ctx'>   SND_SOC_DAPM_AIF_IN(name, stream, slot, reg, shift, invert)</div><div class='ctx'> </div><div class='ctx'> NOTE: the stream name must match the corresponding stream name in your codec</div><div class='del'>-snd_soc_codec_dai.</div><div class='add'>+snd_soc_dai_driver.</div><div class='ctx'> </div><div class='ctx'> e.g. stream widgets for HiFi playback and capture</div><div class='ctx'> ::</div><div class='hunk'>@@ -167,7 +179,7 @@ Path Domain Widgets</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='ctx'> Path domain widgets have a ability to control or affect the audio signal or</div><div class='del'>-audio paths within the audio subsystem. They have the following form:-</div><div class='add'>+audio paths within the audio subsystem. They have the following form:</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   SND_SOC_DAPM_PGA(name, reg, shift, invert, controls, num_controls)</div><div class='hunk'>@@ -207,7 +219,7 @@ powered. e.g.</div><div class='ctx'> A machine widget can have an optional call back.</div><div class='ctx'> </div><div class='ctx'> e.g. Jack connector widget for an external Mic that enables Mic Bias</div><div class='del'>-when the Mic is inserted:-::</div><div class='add'>+when the Mic is inserted::</div><div class='ctx'> </div><div class='ctx'>   static int spitz_mic_bias(struct snd_soc_dapm_widget* w, int event)</div><div class='ctx'>   {</div><div class='hunk'>@@ -221,7 +233,7 @@ when the Mic is inserted:-::</div><div class='ctx'> Codec (BIAS) Domain</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-The codec bias power domain has no widgets and is handled by the codecs DAPM</div><div class='add'>+The codec bias power domain has no widgets and is handled by the codec DAPM</div><div class='ctx'> event handler. This handler is called when the codec powerstate is changed wrt</div><div class='ctx'> to any stream event or by kernel PM events.</div><div class='ctx'> </div><div class='hunk'>@@ -229,17 +241,58 @@ to any stream event or by kernel PM events.</div><div class='ctx'> Virtual Widgets</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='del'>-Sometimes widgets exist in the codec or machine audio map that don't have any</div><div class='add'>+Sometimes widgets exist in the codec or machine audio graph that don't have any</div><div class='ctx'> corresponding soft power control. In this case it is necessary to create</div><div class='ctx'> a virtual widget - a widget with no control bits e.g.</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),</div><div class='ctx'> </div><div class='del'>-This can be used to merge to signal paths together in software.</div><div class='add'>+This can be used to merge two signal paths together in software.</div><div class='ctx'> </div><div class='del'>-After all the widgets have been defined, they can then be added to the DAPM</div><div class='del'>-subsystem individually with a call to snd_soc_dapm_new_control().</div><div class='add'>+Registering DAPM controls</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+In many cases the DAPM widgets are implemented statically in a ``static</div><div class='add'>+const struct snd_soc_dapm_widget`` array in a codec driver, and simply</div><div class='add'>+declared via the ``dapm_widgets`` and ``num_dapm_widgets`` fields of the</div><div class='add'>+``struct snd_soc_component_driver``.</div><div class='add'>+</div><div class='add'>+Similarly, routes connecting them are implemented statically in a ``static</div><div class='add'>+const struct snd_soc_dapm_route`` array and declared via the</div><div class='add'>+``dapm_routes`` and ``num_dapm_routes`` fields of the same struct.</div><div class='add'>+</div><div class='add'>+With the above declared, the driver registration will take care of</div><div class='add'>+populating them::</div><div class='add'>+</div><div class='add'>+  static const struct snd_soc_dapm_widget wm2000_dapm_widgets[] = {</div><div class='add'>+  	SND_SOC_DAPM_OUTPUT("SPKN"),</div><div class='add'>+  	SND_SOC_DAPM_OUTPUT("SPKP"),</div><div class='add'>+  	...</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  /* Target, Path, Source */</div><div class='add'>+  static const struct snd_soc_dapm_route wm2000_audio_map[] = {</div><div class='add'>+  	{ "SPKN", NULL, "ANC Engine" },</div><div class='add'>+  	{ "SPKP", NULL, "ANC Engine" },</div><div class='add'>+	...</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  static const struct snd_soc_component_driver soc_component_dev_wm2000 = {</div><div class='add'>+	...</div><div class='add'>+  	.dapm_widgets		= wm2000_dapm_widgets,</div><div class='add'>+  	.num_dapm_widgets	= ARRAY_SIZE(wm2000_dapm_widgets),</div><div class='add'>+  	.dapm_routes            = wm2000_audio_map,</div><div class='add'>+  	.num_dapm_routes        = ARRAY_SIZE(wm2000_audio_map),</div><div class='add'>+	...</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+In more complex cases the list of DAPM widgets and/or routes can be only</div><div class='add'>+known at probe time. This happens for example when a driver supports</div><div class='add'>+different models having a different set of features. In those cases</div><div class='add'>+separate widgets and routes arrays implementing the case-specific features</div><div class='add'>+can be registered programmatically by calling snd_soc_dapm_new_controls()</div><div class='add'>+and snd_soc_dapm_add_routes().</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Codec/DSP Widget Interconnections</div><div class='hunk'>@@ -247,31 +300,29 @@ Codec/DSP Widget Interconnections</div><div class='ctx'> </div><div class='ctx'> Widgets are connected to each other within the codec, platform and machine by</div><div class='ctx'> audio paths (called interconnections). Each interconnection must be defined in</div><div class='del'>-order to create a map of all audio paths between widgets.</div><div class='add'>+order to create a graph of all audio paths between widgets.</div><div class='ctx'> </div><div class='ctx'> This is easiest with a diagram of the codec or DSP (and schematic of the machine</div><div class='ctx'> audio system), as it requires joining widgets together via their audio signal</div><div class='ctx'> paths.</div><div class='ctx'> </div><div class='del'>-e.g., from the WM8731 output mixer (wm8731.c)</div><div class='del'>-</div><div class='del'>-The WM8731 output mixer has 3 inputs (sources)</div><div class='add'>+For example the WM8731 output mixer (wm8731.c) has 3 inputs (sources):</div><div class='ctx'> </div><div class='ctx'> 1. Line Bypass Input</div><div class='ctx'> 2. DAC (HiFi playback)</div><div class='ctx'> 3. Mic Sidetone Input</div><div class='ctx'> </div><div class='del'>-Each input in this example has a kcontrol associated with it (defined in example</div><div class='del'>-above) and is connected to the output mixer via its kcontrol name. We can now</div><div class='del'>-connect the destination widget (wrt audio signal) with its source widgets.</div><div class='del'>-::</div><div class='add'>+Each input in this example has a kcontrol associated with it (defined in</div><div class='add'>+the example above) and is connected to the output mixer via its kcontrol</div><div class='add'>+name. We can now connect the destination widget (wrt audio signal) with its</div><div class='add'>+source widgets.  ::</div><div class='ctx'> </div><div class='ctx'> 	/* output mixer */</div><div class='ctx'> 	{"Output Mixer", "Line Bypass Switch", "Line Input"},</div><div class='ctx'> 	{"Output Mixer", "HiFi Playback Switch", "DAC"},</div><div class='ctx'> 	{"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},</div><div class='ctx'> </div><div class='del'>-So we have :-</div><div class='add'>+So we have:</div><div class='ctx'> </div><div class='ctx'> * Destination Widget  &lt;=== Path Name &lt;=== Source Widget, or</div><div class='ctx'> * Sink, Path, Source, or</div><div class='hunk'>@@ -280,12 +331,11 @@ So we have :-</div><div class='ctx'> When there is no path name connecting widgets (e.g. a direct connection) we</div><div class='ctx'> pass NULL for the path name.</div><div class='ctx'> </div><div class='del'>-Interconnections are created with a call to:-</div><div class='del'>-::</div><div class='add'>+Interconnections are created with a call to::</div><div class='ctx'> </div><div class='ctx'>   snd_soc_dapm_connect_input(codec, sink, path, source);</div><div class='ctx'> </div><div class='del'>-Finally, snd_soc_dapm_new_widgets(codec) must be called after all widgets and</div><div class='add'>+Finally, snd_soc_dapm_new_widgets() must be called after all widgets and</div><div class='ctx'> interconnections have been registered with the core. This causes the core to</div><div class='ctx'> scan the codec and machine so that the internal DAPM state matches the</div><div class='ctx'> physical state of the machine.</div><div class='hunk'>@@ -326,35 +376,44 @@ jacks can also be switched OFF.</div><div class='ctx'> DAPM Widget Events</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='del'>-Some widgets can register their interest with the DAPM core in PM events.</div><div class='del'>-e.g. A Speaker with an amplifier registers a widget so the amplifier can be</div><div class='del'>-powered only when the spk is in use.</div><div class='del'>-::</div><div class='add'>+Widgets needing to implement a more complex behaviour than what DAPM can do</div><div class='add'>+can set a custom "event handler" by setting a function pointer. An example</div><div class='add'>+is a power supply needing to enable a GPIO::</div><div class='ctx'> </div><div class='del'>-  /* turn speaker amplifier on/off depending on use */</div><div class='del'>-  static int corgi_amp_event(struct snd_soc_dapm_widget *w, int event)</div><div class='add'>+  static int sof_es8316_speaker_power_event(struct snd_soc_dapm_widget *w,</div><div class='add'>+  					  struct snd_kcontrol *kcontrol, int event)</div><div class='ctx'>   {</div><div class='del'>-	gpio_set_value(CORGI_GPIO_APM_ON, SND_SOC_DAPM_EVENT_ON(event));</div><div class='del'>-	return 0;</div><div class='add'>+  	if (SND_SOC_DAPM_EVENT_ON(event))</div><div class='add'>+  		gpiod_set_value_cansleep(gpio_pa, true);</div><div class='add'>+  	else</div><div class='add'>+  		gpiod_set_value_cansleep(gpio_pa, false);</div><div class='add'>+</div><div class='add'>+  	return 0;</div><div class='ctx'>   }</div><div class='ctx'> </div><div class='del'>-  /* corgi machine dapm widgets */</div><div class='del'>-  static const struct snd_soc_dapm_widget wm8731_dapm_widgets =</div><div class='del'>-	SND_SOC_DAPM_SPK("Ext Spk", corgi_amp_event);</div><div class='add'>+  static const struct snd_soc_dapm_widget st_widgets[] = {</div><div class='add'>+  	...</div><div class='add'>+  	SND_SOC_DAPM_SUPPLY("Speaker Power", SND_SOC_NOPM, 0, 0,</div><div class='add'>+  			    sof_es8316_speaker_power_event,</div><div class='add'>+  			    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),</div><div class='add'>+  };</div><div class='ctx'> </div><div class='del'>-Please see soc-dapm.h for all other widgets that support events.</div><div class='add'>+See soc-dapm.h for all other widgets that support events.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Event types</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-The following event types are supported by event widgets.</div><div class='del'>-::</div><div class='add'>+The following event types are supported by event widgets::</div><div class='ctx'> </div><div class='ctx'>   /* dapm event types */</div><div class='del'>-  #define SND_SOC_DAPM_PRE_PMU	0x1 	/* before widget power up */</div><div class='del'>-  #define SND_SOC_DAPM_POST_PMU	0x2		/* after widget power up */</div><div class='del'>-  #define SND_SOC_DAPM_PRE_PMD	0x4 	/* before widget power down */</div><div class='del'>-  #define SND_SOC_DAPM_POST_PMD	0x8		/* after widget power down */</div><div class='del'>-  #define SND_SOC_DAPM_PRE_REG	0x10	/* before audio path setup */</div><div class='del'>-  #define SND_SOC_DAPM_POST_REG	0x20	/* after audio path setup */</div><div class='add'>+  #define SND_SOC_DAPM_PRE_PMU		0x1	/* before widget power up */</div><div class='add'>+  #define SND_SOC_DAPM_POST_PMU		0x2	/* after  widget power up */</div><div class='add'>+  #define SND_SOC_DAPM_PRE_PMD		0x4	/* before widget power down */</div><div class='add'>+  #define SND_SOC_DAPM_POST_PMD		0x8	/* after  widget power down */</div><div class='add'>+  #define SND_SOC_DAPM_PRE_REG		0x10	/* before audio path setup */</div><div class='add'>+  #define SND_SOC_DAPM_POST_REG		0x20	/* after  audio path setup */</div><div class='add'>+  #define SND_SOC_DAPM_WILL_PMU		0x40	/* called at start of sequence */</div><div class='add'>+  #define SND_SOC_DAPM_WILL_PMD		0x80	/* called at start of sequence */</div><div class='add'>+  #define SND_SOC_DAPM_PRE_POST_PMD	(SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD)</div><div class='add'>+  #define SND_SOC_DAPM_PRE_POST_PMU	(SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU)</div><div class='head'>diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py<br/>index abe768088377..638762442336 100755<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/sphinx/kernel_include.py?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sphinx/kernel_include.py</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sphinx/kernel_include.py?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/sphinx/kernel_include.py</a></div><div class='hunk'>@@ -97,7 +97,6 @@ class KernelInclude(Include):</div><div class='ctx'>         # HINT: this is the only line I had to change / commented out:</div><div class='ctx'>         #path = utils.relative_path(None, path)</div><div class='ctx'> </div><div class='del'>-        path = nodes.reprunicode(path)</div><div class='ctx'>         encoding = self.options.get(</div><div class='ctx'>             'encoding', self.state.document.settings.input_encoding)</div><div class='ctx'>         e_handler=self.state.document.settings.input_encoding_error_handler</div><div class='head'>diff --git a/Documentation/sphinx/kerneldoc-preamble.sty b/Documentation/sphinx/kerneldoc-preamble.sty<br/>index 3092df051c95..d479cfa73658 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/sphinx/kerneldoc-preamble.sty?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/sphinx/kerneldoc-preamble.sty</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sphinx/kerneldoc-preamble.sty?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/sphinx/kerneldoc-preamble.sty</a></div><div class='hunk'>@@ -215,11 +215,12 @@</div><div class='ctx'> 	    due to the lack of suitable font families and/or the texlive-xecjk</div><div class='ctx'> 	    package.</div><div class='ctx'> </div><div class='del'>-	    If you want them, please install ``Noto Sans CJK'' font families</div><div class='del'>-	    along with the texlive-xecjk package by following instructions from</div><div class='add'>+	    If you want them, please install non-variable ``Noto Sans CJK''</div><div class='add'>+	    font families along with the texlive-xecjk package by following</div><div class='add'>+	    instructions from</div><div class='ctx'> 	    \sphinxcode{./scripts/sphinx-pre-install}.</div><div class='del'>-	    Having optional ``Noto Serif CJK'' font families will improve</div><div class='del'>-	    the looks of those translations.</div><div class='add'>+	    Having optional non-variable ``Noto Serif CJK'' font families will</div><div class='add'>+	    improve the looks of those translations.</div><div class='ctx'> 	\end{sphinxadmonition}}</div><div class='ctx'>     \newcommand{\kerneldocEndSC}{}</div><div class='ctx'>     \newcommand{\kerneldocBeginTC}[1]{}</div><div class='head'>diff --git a/Documentation/spi/index.rst b/Documentation/spi/index.rst<br/>index 06c34ea11bcf..824ce42ed4f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/spi/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/spi/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/spi/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/spi/index.rst</a></div><div class='hunk'>@@ -10,7 +10,6 @@ Serial Peripheral Interface (SPI)</div><div class='ctx'>    spi-summary</div><div class='ctx'>    spidev</div><div class='ctx'>    butterfly</div><div class='del'>-   pxa2xx</div><div class='ctx'>    spi-lm70llp</div><div class='ctx'>    spi-sc18is602</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/spi/pxa2xx.rst b/Documentation/spi/pxa2xx.rst<br/>deleted file mode 100644<br/>index 19479b801826..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/spi/pxa2xx.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/spi/pxa2xx.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,211 +0,0 @@</div><div class='del'>-==============================</div><div class='del'>-PXA2xx SPI on SSP driver HOWTO</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-This a mini HOWTO on the pxa2xx_spi driver. The driver turns a PXA2xx</div><div class='del'>-synchronous serial port into an SPI host controller</div><div class='del'>-(see Documentation/spi/spi-summary.rst). The driver has the following features</div><div class='del'>-</div><div class='del'>-- Support for any PXA2xx and compatible SSP.</div><div class='del'>-- SSP PIO and SSP DMA data transfers.</div><div class='del'>-- External and Internal (SSPFRM) chip selects.</div><div class='del'>-- Per peripheral device (chip) configuration.</div><div class='del'>-- Full suspend, freeze, resume support.</div><div class='del'>-</div><div class='del'>-The driver is built around a &amp;struct spi_message FIFO serviced by kernel</div><div class='del'>-thread. The kernel thread, spi_pump_messages(), drives message FIFO and</div><div class='del'>-is responsible for queuing SPI transactions and setting up and launching</div><div class='del'>-the DMA or interrupt driven transfers.</div><div class='del'>-</div><div class='del'>-Declaring PXA2xx host controllers</div><div class='del'>----------------------------------</div><div class='del'>-Typically, for a legacy platform, an SPI host controller is defined in the</div><div class='del'>-arch/.../mach-*/board-*.c as a "platform device". The host controller configuration</div><div class='del'>-is passed to the driver via a table found in include/linux/spi/pxa2xx_spi.h::</div><div class='del'>-</div><div class='del'>-  struct pxa2xx_spi_controller {</div><div class='del'>-	u16 num_chipselect;</div><div class='del'>-	u8 enable_dma;</div><div class='del'>-	...</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-The "pxa2xx_spi_controller.num_chipselect" field is used to determine the number of</div><div class='del'>-peripheral devices (chips) attached to this SPI host controller.</div><div class='del'>-</div><div class='del'>-The "pxa2xx_spi_controller.enable_dma" field informs the driver that SSP DMA should</div><div class='del'>-be used. This caused the driver to acquire two DMA channels: Rx channel and</div><div class='del'>-Tx channel. The Rx channel has a higher DMA service priority than the Tx channel.</div><div class='del'>-See the "PXA2xx Developer Manual" section "DMA Controller".</div><div class='del'>-</div><div class='del'>-For the new platforms the description of the controller and peripheral devices</div><div class='del'>-comes from Device Tree or ACPI.</div><div class='del'>-</div><div class='del'>-NSSP HOST SAMPLE</div><div class='del'>-----------------</div><div class='del'>-Below is a sample configuration using the PXA255 NSSP for a legacy platform::</div><div class='del'>-</div><div class='del'>-  static struct resource pxa_spi_nssp_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= __PREG(SSCR0_P(2)), /* Start address of NSSP */</div><div class='del'>-		.end	= __PREG(SSCR0_P(2)) + 0x2c, /* Range of registers */</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_NSSP, /* NSSP IRQ */</div><div class='del'>-		.end	= IRQ_NSSP,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static struct pxa2xx_spi_controller pxa_nssp_controller_info = {</div><div class='del'>-	.num_chipselect = 1, /* Matches the number of chips attached to NSSP */</div><div class='del'>-	.enable_dma = 1, /* Enables NSSP DMA */</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static struct platform_device pxa_spi_nssp = {</div><div class='del'>-	.name = "pxa2xx-spi", /* MUST BE THIS VALUE, so device match driver */</div><div class='del'>-	.id = 2, /* Bus number, MUST MATCH SSP number 1..n */</div><div class='del'>-	.resource = pxa_spi_nssp_resources,</div><div class='del'>-	.num_resources = ARRAY_SIZE(pxa_spi_nssp_resources),</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;pxa_nssp_controller_info, /* Passed to driver */</div><div class='del'>-	},</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static struct platform_device *devices[] __initdata = {</div><div class='del'>-	&amp;pxa_spi_nssp,</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static void __init board_init(void)</div><div class='del'>-  {</div><div class='del'>-	(void)platform_add_device(devices, ARRAY_SIZE(devices));</div><div class='del'>-  }</div><div class='del'>-</div><div class='del'>-Declaring peripheral devices</div><div class='del'>-----------------------------</div><div class='del'>-Typically, for a legacy platform, each SPI peripheral device (chip) is defined in the</div><div class='del'>-arch/.../mach-*/board-*.c using the "spi_board_info" structure found in</div><div class='del'>-"linux/spi/spi.h". See "Documentation/spi/spi-summary.rst" for additional</div><div class='del'>-information.</div><div class='del'>-</div><div class='del'>-Each peripheral device (chip) attached to the PXA2xx must provide specific chip configuration</div><div class='del'>-information via the structure "pxa2xx_spi_chip" found in</div><div class='del'>-"include/linux/spi/pxa2xx_spi.h". The PXA2xx host controller driver will use</div><div class='del'>-the configuration whenever the driver communicates with the peripheral</div><div class='del'>-device. All fields are optional.</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-  struct pxa2xx_spi_chip {</div><div class='del'>-	u8 tx_threshold;</div><div class='del'>-	u8 rx_threshold;</div><div class='del'>-	u8 dma_burst_size;</div><div class='del'>-	u32 timeout;</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are</div><div class='del'>-used to configure the SSP hardware FIFO. These fields are critical to the</div><div class='del'>-performance of pxa2xx_spi driver and misconfiguration will result in rx</div><div class='del'>-FIFO overruns (especially in PIO mode transfers). Good default values are::</div><div class='del'>-</div><div class='del'>-	.tx_threshold = 8,</div><div class='del'>-	.rx_threshold = 8,</div><div class='del'>-</div><div class='del'>-The range is 1 to 16 where zero indicates "use default".</div><div class='del'>-</div><div class='del'>-The "pxa2xx_spi_chip.dma_burst_size" field is used to configure PXA2xx DMA</div><div class='del'>-engine and is related the "spi_device.bits_per_word" field.  Read and understand</div><div class='del'>-the PXA2xx "Developer Manual" sections on the DMA controller and SSP Controllers</div><div class='del'>-to determine the correct value. An SSP configured for byte-wide transfers would</div><div class='del'>-use a value of 8. The driver will determine a reasonable default if</div><div class='del'>-dma_burst_size == 0.</div><div class='del'>-</div><div class='del'>-The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle</div><div class='del'>-trailing bytes in the SSP receiver FIFO. The correct value for this field is</div><div class='del'>-dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific</div><div class='del'>-peripheral device. Please note that the PXA2xx SSP 1 does not support trailing byte</div><div class='del'>-timeouts and must busy-wait any trailing bytes.</div><div class='del'>-</div><div class='del'>-NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the</div><div class='del'>-chipselect is dropped after each spi_transfer.  Most devices need chip select</div><div class='del'>-asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor)</div><div class='del'>-to accommodate these chips.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-NSSP PERIPHERAL SAMPLE</div><div class='del'>-----------------------</div><div class='del'>-For a legacy platform or in some other cases, the pxa2xx_spi_chip structure</div><div class='del'>-is passed to the pxa2xx_spi driver in the "spi_board_info.controller_data"</div><div class='del'>-field. Below is a sample configuration using the PXA255 NSSP.</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-  static struct pxa2xx_spi_chip cs8415a_chip_info = {</div><div class='del'>-	.tx_threshold = 8, /* SSP hardware FIFO threshold */</div><div class='del'>-	.rx_threshold = 8, /* SSP hardware FIFO threshold */</div><div class='del'>-	.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */</div><div class='del'>-	.timeout = 235, /* See Intel documentation */</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static struct pxa2xx_spi_chip cs8405a_chip_info = {</div><div class='del'>-	.tx_threshold = 8, /* SSP hardware FIFO threshold */</div><div class='del'>-	.rx_threshold = 8, /* SSP hardware FIFO threshold */</div><div class='del'>-	.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */</div><div class='del'>-	.timeout = 235, /* See Intel documentation */</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static struct spi_board_info streetracer_spi_board_info[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.modalias = "cs8415a", /* Name of spi_driver for this device */</div><div class='del'>-		.max_speed_hz = 3686400, /* Run SSP as fast a possible */</div><div class='del'>-		.bus_num = 2, /* Framework bus number */</div><div class='del'>-		.chip_select = 0, /* Framework chip select */</div><div class='del'>-		.platform_data = NULL; /* No spi_driver specific config */</div><div class='del'>-		.controller_data = &amp;cs8415a_chip_info, /* Host controller config */</div><div class='del'>-		.irq = STREETRACER_APCI_IRQ, /* Peripheral device interrupt */</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.modalias = "cs8405a", /* Name of spi_driver for this device */</div><div class='del'>-		.max_speed_hz = 3686400, /* Run SSP as fast a possible */</div><div class='del'>-		.bus_num = 2, /* Framework bus number */</div><div class='del'>-		.chip_select = 1, /* Framework chip select */</div><div class='del'>-		.controller_data = &amp;cs8405a_chip_info, /* Host controller config */</div><div class='del'>-		.irq = STREETRACER_APCI_IRQ, /* Peripheral device interrupt */</div><div class='del'>-	},</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-  static void __init streetracer_init(void)</div><div class='del'>-  {</div><div class='del'>-	spi_register_board_info(streetracer_spi_board_info,</div><div class='del'>-				ARRAY_SIZE(streetracer_spi_board_info));</div><div class='del'>-  }</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-DMA and PIO I/O Support</div><div class='del'>------------------------</div><div class='del'>-The pxa2xx_spi driver supports both DMA and interrupt driven PIO message</div><div class='del'>-transfers.  The driver defaults to PIO mode and DMA transfers must be enabled</div><div class='del'>-by setting the "enable_dma" flag in the "pxa2xx_spi_controller" structure.</div><div class='del'>-For the newer platforms, that are known to support DMA, the driver will enable</div><div class='del'>-it automatically and try it first with a possible fallback to PIO. The DMA</div><div class='del'>-mode supports both coherent and stream based DMA mappings.</div><div class='del'>-</div><div class='del'>-The following logic is used to determine the type of I/O to be used on</div><div class='del'>-a per "spi_transfer" basis::</div><div class='del'>-</div><div class='del'>-  if spi_message.len &gt; 65536 then</div><div class='del'>-	if spi_message.is_dma_mapped or rx_dma_buf != 0 or tx_dma_buf != 0 then</div><div class='del'>-		reject premapped transfers</div><div class='del'>-</div><div class='del'>-	print "rate limited" warning</div><div class='del'>-	use PIO transfers</div><div class='del'>-</div><div class='del'>-  if enable_dma and the size is in the range [DMA burst size..65536] then</div><div class='del'>-	use streaming DMA mode</div><div class='del'>-</div><div class='del'>-  otherwise</div><div class='del'>-	use PIO transfer</div><div class='del'>-</div><div class='del'>-THANKS TO</div><div class='del'>----------</div><div class='del'>-David Brownell and others for mentoring the development of this driver.</div><div class='head'>diff --git a/Documentation/spi/spi-summary.rst b/Documentation/spi/spi-summary.rst<br/>index 546de37d6caf..7f8accfae6f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/spi/spi-summary.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/spi/spi-summary.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/spi/spi-summary.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/spi/spi-summary.rst</a></div><div class='hunk'>@@ -348,7 +348,6 @@ SPI protocol drivers somewhat resemble platform device drivers::</div><div class='ctx'> 	static struct spi_driver CHIP_driver = {</div><div class='ctx'> 		.driver = {</div><div class='ctx'> 			.name		= "CHIP",</div><div class='del'>-			.owner		= THIS_MODULE,</div><div class='ctx'> 			.pm		= &amp;CHIP_pm_ops,</div><div class='ctx'> 		},</div><div class='ctx'> </div><div class='hunk'>@@ -419,10 +418,6 @@ any more such messages.</div><div class='ctx'>     to make extra copies unless the hardware requires it (e.g. working</div><div class='ctx'>     around hardware errata that force the use of bounce buffering).</div><div class='ctx'> </div><div class='del'>-    If standard dma_map_single() handling of these buffers is inappropriate,</div><div class='del'>-    you can use spi_message.is_dma_mapped to tell the controller driver</div><div class='del'>-    that you've already provided the relevant DMA addresses.</div><div class='del'>-</div><div class='ctx'>   - The basic I/O primitive is spi_async().  Async requests may be</div><div class='ctx'>     issued in any context (irq handler, task, etc) and completion</div><div class='ctx'>     is reported using a callback provided with the message.</div><div class='head'>diff --git a/Documentation/tee/index.rst b/Documentation/tee/index.rst<br/>index a23bd08847e5..4be6e69d7837 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/tee/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/tee/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/tee/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/tee/index.rst</a></div><div class='hunk'>@@ -10,6 +10,7 @@ TEE Subsystem</div><div class='ctx'>    tee</div><div class='ctx'>    op-tee</div><div class='ctx'>    amd-tee</div><div class='add'>+   ts-tee</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/tee/ts-tee.rst b/Documentation/tee/ts-tee.rst<br/>new file mode 100644<br/>index 000000000000..843e34422648<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/tee/ts-tee.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/tee/ts-tee.rst</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=================================</div><div class='add'>+TS-TEE (Trusted Services project)</div><div class='add'>+=================================</div><div class='add'>+</div><div class='add'>+This driver provides access to secure services implemented by Trusted Services.</div><div class='add'>+</div><div class='add'>+Trusted Services [1] is a TrustedFirmware.org project that provides a framework</div><div class='add'>+for developing and deploying device Root of Trust services in FF-A [2] S-EL0</div><div class='add'>+Secure Partitions. The project hosts the reference implementation of the Arm</div><div class='add'>+Platform Security Architecture [3] for Arm A-profile devices.</div><div class='add'>+</div><div class='add'>+The FF-A Secure Partitions (SP) are accessible through the FF-A driver [4] which</div><div class='add'>+provides the low level communication for this driver. On top of that the Trusted</div><div class='add'>+Services RPC protocol is used [5]. To use the driver from user space a reference</div><div class='add'>+implementation is provided at [6], which is part of the Trusted Services client</div><div class='add'>+library called libts [7].</div><div class='add'>+</div><div class='add'>+All Trusted Services (TS) SPs have the same FF-A UUID; it identifies the TS RPC</div><div class='add'>+protocol. A TS SP can host one or more services (e.g. PSA Crypto, PSA ITS, etc).</div><div class='add'>+A service is identified by its service UUID; the same type of service cannot be</div><div class='add'>+present twice in the same SP. During SP boot each service in the SP is assigned</div><div class='add'>+an "interface ID". This is just a short ID to simplify message addressing.</div><div class='add'>+</div><div class='add'>+The generic TEE design is to share memory at once with the Trusted OS, which can</div><div class='add'>+then be reused to communicate with multiple applications running on the Trusted</div><div class='add'>+OS. However, in case of FF-A, memory sharing works on an endpoint level, i.e.</div><div class='add'>+memory is shared with a specific SP. User space has to be able to separately</div><div class='add'>+share memory with each SP based on its endpoint ID; therefore a separate TEE</div><div class='add'>+device is registered for each discovered TS SP. Opening the SP corresponds to</div><div class='add'>+opening the TEE device and creating a TEE context. A TS SP hosts one or more</div><div class='add'>+services. Opening a service corresponds to opening a session in the given</div><div class='add'>+tee_context.</div><div class='add'>+</div><div class='add'>+Overview of a system with Trusted Services components::</div><div class='add'>+</div><div class='add'>+   User space                  Kernel space                   Secure world</div><div class='add'>+   ~~~~~~~~~~                  ~~~~~~~~~~~~                   ~~~~~~~~~~~~</div><div class='add'>+   +--------+                                               +-------------+</div><div class='add'>+   | Client |                                               | Trusted     |</div><div class='add'>+   +--------+                                               | Services SP |</div><div class='add'>+      /\                                                    +-------------+</div><div class='add'>+      ||                                                          /\</div><div class='add'>+      ||                                                          ||</div><div class='add'>+      ||                                                          ||</div><div class='add'>+      \/                                                          \/</div><div class='add'>+   +-------+                +----------+--------+           +-------------+</div><div class='add'>+   | libts |                |  TEE     | TS-TEE |           |  FF-A SPMC  |</div><div class='add'>+   |       |                |  subsys  | driver |           |   + SPMD    |</div><div class='add'>+   +-------+----------------+----+-----+--------+-----------+-------------+</div><div class='add'>+   |      Generic TEE API        |     |  FF-A  |     TS RPC protocol     |</div><div class='add'>+   |      IOCTL (TEE_IOC_*)      |     | driver |        over FF-A        |</div><div class='add'>+   +-----------------------------+     +--------+-------------------------+</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+[1] https://www.trustedfirmware.org/projects/trusted-services/</div><div class='add'>+</div><div class='add'>+[2] https://developer.arm.com/documentation/den0077/</div><div class='add'>+</div><div class='add'>+[3] https://www.arm.com/architecture/security-features/platform-security</div><div class='add'>+</div><div class='add'>+[4] drivers/firmware/arm_ffa/</div><div class='add'>+</div><div class='add'>+[5] https://trusted-services.readthedocs.io/en/v1.0.0/developer/service-access-protocols.html#abi</div><div class='add'>+</div><div class='add'>+[6] https://git.trustedfirmware.org/TS/trusted-services.git/tree/components/rpc/ts_rpc/caller/linux/ts_rpc_caller_linux.c?h=v1.0.0</div><div class='add'>+</div><div class='add'>+[7] https://git.trustedfirmware.org/TS/trusted-services.git/tree/deployments/libts/arm-linux/CMakeLists.txt?h=v1.0.0</div><div class='head'>diff --git a/Documentation/timers/no_hz.rst b/Documentation/timers/no_hz.rst<br/>index f8786be15183..7fe8ef9718d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/timers/no_hz.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/timers/no_hz.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/timers/no_hz.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/timers/no_hz.rst</a></div><div class='hunk'>@@ -129,11 +129,8 @@ adaptive-tick CPUs:  At least one non-adaptive-tick CPU must remain</div><div class='ctx'> online to handle timekeeping tasks in order to ensure that system</div><div class='ctx'> calls like gettimeofday() returns accurate values on adaptive-tick CPUs.</div><div class='ctx'> (This is not an issue for CONFIG_NO_HZ_IDLE=y because there are no running</div><div class='del'>-user processes to observe slight drifts in clock rate.)  Therefore, the</div><div class='del'>-boot CPU is prohibited from entering adaptive-ticks mode.  Specifying a</div><div class='del'>-"nohz_full=" mask that includes the boot CPU will result in a boot-time</div><div class='del'>-error message, and the boot CPU will be removed from the mask.  Note that</div><div class='del'>-this means that your system must have at least two CPUs in order for</div><div class='add'>+user processes to observe slight drifts in clock rate.) Note that this</div><div class='add'>+means that your system must have at least two CPUs in order for</div><div class='ctx'> CONFIG_NO_HZ_FULL=y to do anything for you.</div><div class='ctx'> </div><div class='ctx'> Finally, adaptive-ticks CPUs must have their RCU callbacks offloaded.</div><div class='head'>diff --git a/Documentation/trace/fprobetrace.rst b/Documentation/trace/fprobetrace.rst<br/>index 0f187e3796e4..b4c2ca3d02c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/fprobetrace.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/fprobetrace.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/fprobetrace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/trace/fprobetrace.rst</a></div><div class='hunk'>@@ -74,7 +74,7 @@ Function arguments at exit</div><div class='ctx'> --------------------------</div><div class='ctx'> Function arguments can be accessed at exit probe using $arg&lt;N&gt; fetcharg. This</div><div class='ctx'> is useful to record the function parameter and return value at once, and</div><div class='del'>-trace the difference of structure fields (for debuging a function whether it</div><div class='add'>+trace the difference of structure fields (for debugging a function whether it</div><div class='ctx'> correctly updates the given data structure or not)</div><div class='ctx'> See the :ref:`sample&lt;fprobetrace_exit_args_sample&gt;` below for how it works.</div><div class='ctx'> </div><div class='hunk'>@@ -248,4 +248,4 @@ mode. You can trace that changes with return probe.</div><div class='ctx'>              cat-143     [007] ...1.  1945.720616: vfs_open__entry: (vfs_open+0x4/0x40) mode=0x1 inode=0x0</div><div class='ctx'>              cat-143     [007] ...1.  1945.728263: vfs_open__exit: (do_open+0x274/0x3d0 &lt;- vfs_open) mode=0xa800d inode=0xffff888004ada8d8</div><div class='ctx'> </div><div class='del'>-You can see the `file::f_mode` and `file::f_inode` are upated in `vfs_open()`.</div><div class='add'>+You can see the `file::f_mode` and `file::f_inode` are updated in `vfs_open()`.</div><div class='head'>diff --git a/Documentation/trace/ftrace.rst b/Documentation/trace/ftrace.rst<br/>index 7e7b8ec17934..5aba74872ba7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/ftrace.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/ftrace.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/ftrace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/trace/ftrace.rst</a></div><div class='hunk'>@@ -1968,7 +1968,7 @@ wakeup</div><div class='ctx'> One common case that people are interested in tracing is the</div><div class='ctx'> time it takes for a task that is woken to actually wake up.</div><div class='ctx'> Now for non Real-Time tasks, this can be arbitrary. But tracing</div><div class='del'>-it none the less can be interesting. </div><div class='add'>+it nonetheless can be interesting. </div><div class='ctx'> </div><div class='ctx'> Without function tracing::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/trace/kprobes.rst b/Documentation/trace/kprobes.rst<br/>index e1636e579c9c..5e606730cec6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/kprobes.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/kprobes.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/kprobes.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/trace/kprobes.rst</a></div><div class='hunk'>@@ -322,6 +322,7 @@ architectures:</div><div class='ctx'> - s390</div><div class='ctx'> - parisc</div><div class='ctx'> - loongarch</div><div class='add'>+- riscv</div><div class='ctx'> </div><div class='ctx'> Configuring Kprobes</div><div class='ctx'> ===================</div><div class='head'>diff --git a/Documentation/trace/kprobetrace.rst b/Documentation/trace/kprobetrace.rst<br/>index a49662ccd53c..69cb7776ae99 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/kprobetrace.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/kprobetrace.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/kprobetrace.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/trace/kprobetrace.rst</a></div><div class='hunk'>@@ -74,7 +74,7 @@ Function arguments at kretprobe</div><div class='ctx'> -------------------------------</div><div class='ctx'> Function arguments can be accessed at kretprobe using $arg&lt;N&gt; fetcharg. This</div><div class='ctx'> is useful to record the function parameter and return value at once, and</div><div class='del'>-trace the difference of structure fields (for debuging a function whether it</div><div class='add'>+trace the difference of structure fields (for debugging a function whether it</div><div class='ctx'> correctly updates the given data structure or not).</div><div class='ctx'> See the :ref:`sample&lt;fprobetrace_exit_args_sample&gt;` in fprobe event for how</div><div class='ctx'> it works.</div><div class='head'>diff --git a/Documentation/trace/tracepoints.rst b/Documentation/trace/tracepoints.rst<br/>index 0cb8d9ca3d60..decabcc77b56 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/tracepoints.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/trace/tracepoints.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/tracepoints.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/trace/tracepoints.rst</a></div><div class='hunk'>@@ -27,7 +27,7 @@ the tracepoint site).</div><div class='ctx'> </div><div class='ctx'> You can put tracepoints at important locations in the code. They are</div><div class='ctx'> lightweight hooks that can pass an arbitrary number of parameters,</div><div class='del'>-which prototypes are described in a tracepoint declaration placed in a</div><div class='add'>+whose prototypes are described in a tracepoint declaration placed in a</div><div class='ctx'> header file.</div><div class='ctx'> </div><div class='ctx'> They can be used for tracing and performance accounting.</div><div class='head'>diff --git a/Documentation/translations/it_IT/doc-guide/kernel-doc.rst b/Documentation/translations/it_IT/doc-guide/kernel-doc.rst<br/>index 5cece223b46b..74057d203539 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/doc-guide/kernel-doc.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/doc-guide/kernel-doc.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/doc-guide/kernel-doc.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/doc-guide/kernel-doc.rst</a></div><div class='hunk'>@@ -180,9 +180,9 @@ Il valore di ritorno, se c'è, viene descritto in una sezione dedicata di nome</div><div class='ctx'>      se provate a formattare bene il vostro testo come nel seguente esempio::</div><div class='ctx'> </div><div class='ctx'> 	* Return:</div><div class='del'>-	* 0 - OK</div><div class='del'>-	* -EINVAL - invalid argument</div><div class='del'>-	* -ENOMEM - out of memory</div><div class='add'>+	* %0 - OK</div><div class='add'>+	* %-EINVAL - invalid argument</div><div class='add'>+	* %-ENOMEM - out of memory</div><div class='ctx'> </div><div class='ctx'>      le righe verranno unite e il risultato sarà::</div><div class='ctx'> </div><div class='hunk'>@@ -192,8 +192,8 @@ Il valore di ritorno, se c'è, viene descritto in una sezione dedicata di nome</div><div class='ctx'>      utilizzare una lista ReST, ad esempio::</div><div class='ctx'> </div><div class='ctx'>       * Return:</div><div class='del'>-      * * 0		- OK to runtime suspend the device</div><div class='del'>-      * * -EBUSY	- Device should not be runtime suspended</div><div class='add'>+      * * %0		- OK to runtime suspend the device</div><div class='add'>+      * * %-EBUSY	- Device should not be runtime suspended</div><div class='ctx'> </div><div class='ctx'>   #) Se il vostro testo ha delle righe che iniziano con una frase seguita dai</div><div class='ctx'>      due punti, allora ognuna di queste frasi verrà considerata come il nome</div><div class='head'>diff --git a/Documentation/translations/it_IT/index.rst b/Documentation/translations/it_IT/index.rst<br/>index 70ccd23b2cde..9220f65e30d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/index.rst</a></div><div class='hunk'>@@ -132,4 +132,4 @@ Documentazione varia</div><div class='ctx'> </div><div class='ctx'> Ci sono documenti che sono difficili da inserire nell'attuale organizzazione</div><div class='ctx'> della documentazione; altri hanno bisogno di essere migliorati e/o convertiti</div><div class='del'>-nel formato *ReStructured Text*; altri sono semplicamente troppo vecchi.</div><div class='add'>+nel formato *reStructuredText*; altri sono semplicamente troppo vecchi.</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/2.Process.rst b/Documentation/translations/it_IT/process/2.Process.rst<br/>index 25cd00351c03..0a62c0f33faf 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/2.Process.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/2.Process.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/2.Process.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/2.Process.rst</a></div><div class='hunk'>@@ -462,9 +462,12 @@ linux-kernel:</div><div class='ctx'>   di far domande.  Molti sviluppatori possono divenire impazienti con le</div><div class='ctx'>   persone che chiaramente non hanno svolto i propri compiti a casa.</div><div class='ctx'> </div><div class='del'>-- Evitate il *top-posting* (cioè la pratica di mettere la vostra risposta sopra</div><div class='del'>-  alla frase alla quale state rispondendo).  Ciò renderebbe la vostra risposta</div><div class='del'>-  difficile da leggere e genera scarsa impressione.</div><div class='add'>+- Rispondete sotto alla porzione di righe citate, così da dare un contesto alle</div><div class='add'>+  vostre risposte, e quindi renderle più leggibili (in altre parole, evitate di</div><div class='add'>+  rispondere in cima, ovvero prima del testo citato). Per maggiori dettagli</div><div class='add'>+  leggete :ref:`Documentation/translations/it_IT/process/submitting-patches.rst</div><div class='add'>+  &lt;it_interleaved_replies&gt;`.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> - Chiedete nella lista di discussione corretta.  Linux-kernel può essere un</div><div class='ctx'>   punto di incontro generale, ma non è il miglior posto dove trovare</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/4.Coding.rst b/Documentation/translations/it_IT/process/4.Coding.rst<br/>index 54fd255b77d0..ec874a8dfb9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/4.Coding.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/4.Coding.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/4.Coding.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/4.Coding.rst</a></div><div class='hunk'>@@ -72,6 +72,10 @@ compiti del genere.  Consultate il file</div><div class='ctx'> :ref:`Documentation/translations/it_IT/process/clang-format.rst &lt;clangformat&gt;`</div><div class='ctx'> per maggiori dettagli</div><div class='ctx'> </div><div class='add'>+Se utilizzate un programma compatibile con EditorConfig, allora alcune</div><div class='add'>+configurazioni basilari come l'indentazione e la fine delle righe verranno</div><div class='add'>+applicate automaticamente. Per maggiori informazioni consultate la pagina:</div><div class='add'>+https://editorconfig.org/</div><div class='ctx'> </div><div class='ctx'> Livelli di astrazione</div><div class='ctx'> *********************</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/7.AdvancedTopics.rst b/Documentation/translations/it_IT/process/7.AdvancedTopics.rst<br/>index dffd813a0910..a83fcfe18024 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/7.AdvancedTopics.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/7.AdvancedTopics.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/7.AdvancedTopics.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/7.AdvancedTopics.rst</a></div><div class='hunk'>@@ -160,6 +160,8 @@ preparerà una richiesta nel modo in cui gli altri sviluppatori se l'aspettano,</div><div class='ctx'> e verificherà che vi siate ricordati di pubblicare quelle patch su un</div><div class='ctx'> server pubblico.</div><div class='ctx'> </div><div class='add'>+.. _development_advancedtopics_reviews_it:</div><div class='add'>+</div><div class='ctx'> Revisionare le patch</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='hunk'>@@ -180,6 +182,13 @@ i commenti come domande e non come critiche.  Chiedere "Come viene rilasciato</div><div class='ctx'> il *lock* in questo percorso?" funziona sempre molto meglio che</div><div class='ctx'> "qui la sincronizzazione è sbagliata".</div><div class='ctx'> </div><div class='add'>+In caso di disaccordi, può essere utile chiedere una terza opinione. Se dopo</div><div class='add'>+pochi scambi la discussione raggiunge un punto morto, allora chiedete ai</div><div class='add'>+manutentori o altri revisori di partecipare esprimendo la loro opinione. Spesso</div><div class='add'>+vige un silenzio assenso per cui gli altri revisori non intervengono se non gli</div><div class='add'>+viene richiesto esplicitamente. L'opinione di più persone avrà sicuramente un</div><div class='add'>+peso maggiore.</div><div class='add'>+</div><div class='ctx'> Diversi sviluppatori revisioneranno il codice con diversi punti di vista.</div><div class='ctx'> Alcuni potrebbero concentrarsi principalmente sullo stile del codice e se</div><div class='ctx'> alcune linee hanno degli spazio bianchi di troppo.  Altri si chiederanno</div><div class='hunk'>@@ -189,3 +198,13 @@ l'uso eccessivo di *stack*, problemi di sicurezza, duplicazione del codice</div><div class='ctx'> in altri contesti, documentazione, effetti negativi sulle prestazioni, cambi</div><div class='ctx'> all'ABI dello spazio utente, eccetera.  Qualunque tipo di revisione è ben</div><div class='ctx'> accetta e di valore, se porta ad avere un codice migliore nel kernel.</div><div class='add'>+</div><div class='add'>+Non esistono requisiti particolarmente stringenti per l'uso di etichette come</div><div class='add'>+``Reviewd-by``. Tuttavia, perché la revisione sia efficace ci si aspetta un</div><div class='add'>+qualche tipo di messaggio che dica "ho verificato A, B e C nel codice che è</div><div class='add'>+appena stato inviato e mi sembra tutto in ordine". Inoltre, questo permette ai</div><div class='add'>+manutentori di prendere conoscenza circa una revisione avvenuta per davvero.</div><div class='add'>+</div><div class='add'>+Per finire, la revisione delle patch può diventare un processo negativo, troppo</div><div class='add'>+focalizzato sulla ricerca dei problemi. Provate a fare qualche complimento di</div><div class='add'>+tanto in tanto, specialmente con i nuovi arrivati.</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/changes.rst b/Documentation/translations/it_IT/process/changes.rst<br/>index f37c53f8b524..ade695a7de19 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/changes.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/changes.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/changes.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/changes.rst</a></div><div class='hunk'>@@ -34,13 +34,15 @@ PC Card, per esempio, probabilmente non dovreste preoccuparvi di pcmciautils.</div><div class='ctx'> ====================== =================  ========================================</div><div class='ctx'> GNU C                  5.1                gcc --version</div><div class='ctx'> Clang/LLVM (optional)  11.0.0             clang --version</div><div class='add'>+Rust (opzionale)       1.74.1             rustc --version</div><div class='add'>+bindgen (opzionale)    0.65.1             bindgen --version</div><div class='ctx'> GNU make               3.81               make --version</div><div class='ctx'> bash                   4.2                bash --version</div><div class='ctx'> binutils               2.25               ld -v</div><div class='ctx'> flex                   2.5.35             flex --version</div><div class='ctx'> bison                  2.0                bison --version</div><div class='ctx'> pahole                 1.16               pahole --version</div><div class='del'>-util-linux             2.10o              fdformat --version</div><div class='add'>+util-linux             2.10o              mount --version</div><div class='ctx'> kmod                   13                 depmod -V</div><div class='ctx'> e2fsprogs              1.41.4             e2fsck -V</div><div class='ctx'> jfsutils               1.1.3              fsck.jfs -V</div><div class='hunk'>@@ -59,8 +61,10 @@ mcelog                 0.6                mcelog --version</div><div class='ctx'> iptables               1.4.2              iptables -V</div><div class='ctx'> openssl &amp; libcrypto    1.0.0              openssl version</div><div class='ctx'> bc                     1.06.95            bc --version</div><div class='del'>-Sphinx\ [#f1]_         1.7                sphinx-build --version</div><div class='add'>+Sphinx\ [#f1]_         2.4.4              sphinx-build --version</div><div class='ctx'> cpio                   any                cpio --version</div><div class='add'>+GNU tar                1.28               tar --version</div><div class='add'>+gtags (opzionale)      6.6.5              gtags --version</div><div class='ctx'> ====================== =================  ========================================</div><div class='ctx'> </div><div class='ctx'> .. [#f1] Sphinx è necessario solo per produrre la documentazione del Kernel</div><div class='hunk'>@@ -151,6 +155,18 @@ Se la firma dei moduli è abilitata, allora vi servirà openssl per compilare il</div><div class='ctx'> kernel 3.7 e successivi.  Vi serviranno anche i pacchetti di sviluppo di</div><div class='ctx'> openssl per compilare il kernel 4.3 o successivi.</div><div class='ctx'> </div><div class='add'>+Tar</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+GNU Tar è necessario per accedere ai file d'intestazione del kernel usando sysfs</div><div class='add'>+(CONFIG_IKHEADERS)</div><div class='add'>+</div><div class='add'>+gtags / GNU GLOBAL (opzionale)</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+Il programma GNU GLOBAL versione 6.6.5, o successiva, è necessario quando si</div><div class='add'>+vuole eseguire ``make gtags`` e generare i relativi indici. Internamente si fa</div><div class='add'>+uso del parametro gtags ``-C (--directory)`` che compare in questa versione.</div><div class='ctx'> </div><div class='ctx'> Strumenti di sistema</div><div class='ctx'> ********************</div><div class='hunk'>@@ -434,7 +450,7 @@ E2fsprogs</div><div class='ctx'> JFSutils</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='del'>-- &lt;http://jfs.sourceforge.net/&gt;</div><div class='add'>+- &lt;https://jfs.sourceforge.net/&gt;</div><div class='ctx'> </div><div class='ctx'> Reiserfsprogs</div><div class='ctx'> -------------</div><div class='hunk'>@@ -455,7 +471,7 @@ Pcmciautils</div><div class='ctx'> Quota-tools</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-- &lt;http://sourceforge.net/projects/linuxquota/&gt;</div><div class='add'>+- &lt;https://sourceforge.net/projects/linuxquota/&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Microcodice Intel P6</div><div class='hunk'>@@ -476,7 +492,7 @@ FUSE</div><div class='ctx'> mcelog</div><div class='ctx'> ------</div><div class='ctx'> </div><div class='del'>-- &lt;http://www.mcelog.org/&gt;</div><div class='add'>+- &lt;https://www.mcelog.org/&gt;</div><div class='ctx'> </div><div class='ctx'> cpio</div><div class='ctx'> ----</div><div class='hunk'>@@ -497,7 +513,8 @@ PPP</div><div class='ctx'> NFS-utils</div><div class='ctx'> ---------</div><div class='ctx'> </div><div class='del'>-- &lt;http://sourceforge.net/project/showfiles.php?group_id=14&gt;</div><div class='add'>+- &lt;https://sourceforge.net/project/showfiles.php?group_id=14&gt;</div><div class='add'>+- &lt;https://nfs.sourceforge.net/&gt;</div><div class='ctx'> </div><div class='ctx'> Iptables</div><div class='ctx'> --------</div><div class='hunk'>@@ -512,12 +529,7 @@ Ip-route2</div><div class='ctx'> OProfile</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='del'>-- &lt;http://oprofile.sf.net/download/&gt;</div><div class='del'>-</div><div class='del'>-NFS-Utils</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-- &lt;http://nfs.sourceforge.net/&gt;</div><div class='add'>+- &lt;https://oprofile.sf.net/download/&gt;</div><div class='ctx'> </div><div class='ctx'> Documentazione del kernel</div><div class='ctx'> *************************</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/coding-style.rst b/Documentation/translations/it_IT/process/coding-style.rst<br/>index 284a75ac19f8..a4b9f44081da 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/coding-style.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/coding-style.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/coding-style.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/coding-style.rst</a></div><div class='hunk'>@@ -214,7 +214,7 @@ Non usate inutilmente le graffe dove una singola espressione è sufficiente.</div><div class='ctx'> </div><div class='ctx'> e</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	if (condition)</div><div class='ctx'> 		do_this();</div><div class='hunk'>@@ -652,7 +652,7 @@ Quindi, potete sbarazzarvi di GNU emacs, o riconfigurarlo con valori più</div><div class='ctx'> sensati.  Per fare quest'ultima cosa, potete appiccicare il codice che</div><div class='ctx'> segue nel vostro file .emacs:</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+.. code-block:: elisp</div><div class='ctx'> </div><div class='ctx'>   (defun c-lineup-arglist-tabs-only (ignored)</div><div class='ctx'>     "Line up argument lists by tabs, not spaces"</div><div class='hunk'>@@ -728,6 +728,10 @@ il testo e altre cose simili.</div><div class='ctx'> Per maggiori dettagli, consultate il file</div><div class='ctx'> :ref:`Documentation/translations/it_IT/process/clang-format.rst &lt;it_clangformat&gt;`.</div><div class='ctx'> </div><div class='add'>+Se utilizzate un programma compatibile con EditorConfig, allora alcune</div><div class='add'>+configurazioni basilari come l'indentazione e la fine delle righe verranno</div><div class='add'>+applicate automaticamente. Per maggiori informazioni consultate la pagina:</div><div class='add'>+https://editorconfig.org/</div><div class='ctx'> </div><div class='ctx'> 10) File di configurazione Kconfig</div><div class='ctx'> ----------------------------------</div><div class='hunk'>@@ -898,7 +902,9 @@ usare per assicurarvi che i messaggi vengano associati correttamente ai</div><div class='ctx'> dispositivi e ai driver, e che siano etichettati correttamente:  dev_err(),</div><div class='ctx'> dev_warn(), dev_info(), e così via.  Per messaggi che non sono associati ad</div><div class='ctx'> alcun dispositivo, &lt;linux/printk.h&gt; definisce pr_info(), pr_warn(), pr_err(),</div><div class='del'>-eccetera.</div><div class='add'>+eccetera. Quando tutto funziona correttamente, non dovrebbero esserci stampe,</div><div class='add'>+per cui preferite dev_dbg/pr_debug a meno che non sia qualcosa di sbagliato</div><div class='add'>+da segnalare.</div><div class='ctx'> </div><div class='ctx'> Tirar fuori un buon messaggio di debug può essere una vera sfida; e quando</div><div class='ctx'> l'avete può essere d'enorme aiuto per risolvere problemi da remoto.</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/deprecated.rst b/Documentation/translations/it_IT/process/deprecated.rst<br/>index ba0ed7dc154c..d4ab76e9be49 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/deprecated.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/deprecated.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/deprecated.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/deprecated.rst</a></div><div class='hunk'>@@ -86,7 +86,7 @@ da kcalloc().</div><div class='ctx'> Se questo tipo di allocatore non è disponibile, allora dovrebbero essere usate</div><div class='ctx'> le funzioni del tipo *saturate-on-overflow*::</div><div class='ctx'> </div><div class='del'>-	bar = vmalloc(array_size(count, size));</div><div class='add'>+	bar = dma_alloc_coherent(dev, array_size(count, size), &amp;dma, GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> Un altro tipico caso da evitare è quello di calcolare la dimensione di una</div><div class='ctx'> struttura seguita da un vettore di altre strutture, come nel seguente caso::</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/howto.rst b/Documentation/translations/it_IT/process/howto.rst<br/>index 052f1b3610cb..090941a0a898 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/howto.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/howto.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/howto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/howto.rst</a></div><div class='hunk'>@@ -85,8 +85,8 @@ relativi file di documentatione che spiegano come usarele.</div><div class='ctx'> Quando un cambiamento del kernel genera anche un cambiamento nell'interfaccia</div><div class='ctx'> con lo spazio utente, è raccomandabile che inviate una notifica o una</div><div class='ctx'> correzione alle pagine *man* spiegando tale modifica agli amministratori di</div><div class='del'>-queste pagine all'indirizzo mtk.manpages@gmail.com, aggiungendo</div><div class='del'>-in CC la lista linux-api@vger.kernel.org.</div><div class='add'>+queste pagine all'indirizzo alx@kernel.org, aggiungendo in CC la</div><div class='add'>+lista linux-api@vger.kernel.org.</div><div class='ctx'> </div><div class='ctx'> Di seguito una lista di file che sono presenti nei sorgente del kernel e che</div><div class='ctx'> è richiesto che voi leggiate:</div><div class='hunk'>@@ -144,7 +144,7 @@ Di seguito una lista di file che sono presenti nei sorgente del kernel e che</div><div class='ctx'>     dello sviluppo di Linux ed è molto importante per le persone che arrivano</div><div class='ctx'>     da esperienze con altri Sistemi Operativi.</div><div class='ctx'> </div><div class='del'>-  :ref:`Documentation/translations/it_IT/admin-guide/security-bugs.rst &lt;it_securitybugs&gt;`</div><div class='add'>+  :ref:`Documentation/translations/it_IT/process/security-bugs.rst &lt;it_securitybugs&gt;`</div><div class='ctx'>     Se ritenete di aver trovato un problema di sicurezza nel kernel Linux,</div><div class='ctx'>     seguite i passaggi scritti in questo documento per notificarlo agli</div><div class='ctx'>     sviluppatori del kernel, ed aiutare la risoluzione del problema.</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/index.rst b/Documentation/translations/it_IT/process/index.rst<br/>index cd7977905fb8..73c643dcc541 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/index.rst</a></div><div class='hunk'>@@ -21,19 +21,75 @@ l'accettazione delle vostre modifiche con il minimo sforzo.</div><div class='ctx'> </div><div class='ctx'> Di seguito le guide che ogni sviluppatore dovrebbe leggere.</div><div class='ctx'> </div><div class='add'>+Introduzione al funzionamento dello sviluppo del kernel</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Innanzitutto, leggete questi documenti che vi aiuteranno ad entrare nella</div><div class='add'>+comunità del kernel.</div><div class='add'>+</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>    howto</div><div class='del'>-   code-of-conduct</div><div class='ctx'>    development-process</div><div class='ctx'>    submitting-patches</div><div class='add'>+   submit-checklist</div><div class='add'>+</div><div class='add'>+Strumenti e guide tecniche per gli sviluppatori del kernel</div><div class='add'>+----------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Quella che segue è una raccolta di documenti che uno sviluppatore del kernel</div><div class='add'>+Linux dovrebbe conoscere.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   changes</div><div class='ctx'>    programming-language</div><div class='ctx'>    coding-style</div><div class='ctx'>    maintainer-pgp-guide</div><div class='ctx'>    email-clients</div><div class='add'>+   applying-patches</div><div class='add'>+   adding-syscalls</div><div class='add'>+   volatile-considered-harmful</div><div class='add'>+   botching-up-ioctls</div><div class='add'>+</div><div class='add'>+Politiche e dichiarazioni degli sviluppatori</div><div class='add'>+--------------------------------------------</div><div class='add'>+</div><div class='add'>+Quelle che seguono rappresentano le regole che cerchiamo di seguire all'interno</div><div class='add'>+della comunità del kernel (e oltre).</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   code-of-conduct</div><div class='ctx'>    kernel-enforcement-statement</div><div class='ctx'>    kernel-driver-statement</div><div class='add'>+   stable-api-nonsense</div><div class='add'>+   stable-kernel-rules</div><div class='add'>+   management-style</div><div class='add'>+</div><div class='add'>+Gestire i bachi</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+I bachi sono parte della nostra vita; dunque è importante che vengano trattati</div><div class='add'>+con riguardo. I documenti che seguono descrivono le nostre politiche riguardo al</div><div class='add'>+trattamento di alcune classi particolari di bachi: le regressioni e i problemi</div><div class='add'>+di sicurezza.</div><div class='add'>+</div><div class='add'>+Informazioni per i manutentori</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+Come trovare le persone che accetteranno le vostre modifiche.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   maintainers</div><div class='add'>+</div><div class='add'>+Altri documenti</div><div class='add'>+---------------</div><div class='ctx'> </div><div class='ctx'> Poi ci sono altre guide sulla comunità che sono di interesse per molti</div><div class='ctx'> degli sviluppatori:</div><div class='hunk'>@@ -41,13 +97,7 @@ degli sviluppatori:</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-   changes</div><div class='del'>-   stable-api-nonsense</div><div class='del'>-   management-style</div><div class='del'>-   stable-kernel-rules</div><div class='del'>-   submit-checklist</div><div class='ctx'>    kernel-docs</div><div class='del'>-   maintainers</div><div class='ctx'> </div><div class='ctx'> Ed infine, qui ci sono alcune guide più tecniche che son state messe qua solo</div><div class='ctx'> perché non si è trovato un posto migliore.</div><div class='hunk'>@@ -55,11 +105,7 @@ perché non si è trovato un posto migliore.</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-   applying-patches</div><div class='del'>-   adding-syscalls</div><div class='ctx'>    magic-number</div><div class='del'>-   volatile-considered-harmful</div><div class='del'>-   botching-up-ioctls</div><div class='ctx'>    clang-format</div><div class='ctx'>    ../riscv/patch-acceptance</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/it_IT/admin-guide/security-bugs.rst b/Documentation/translations/it_IT/process/security-bugs.rst<br/>index 20994f4bfa31..20994f4bfa31 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/admin-guide/security-bugs.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/admin-guide/security-bugs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/security-bugs.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/security-bugs.rst</a></div><div class='head'>diff --git a/Documentation/translations/it_IT/process/stable-kernel-rules.rst b/Documentation/translations/it_IT/process/stable-kernel-rules.rst<br/>index 248bf1e4b171..a2577a806a18 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/stable-kernel-rules.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/stable-kernel-rules.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/stable-kernel-rules.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/stable-kernel-rules.rst</a></div><div class='hunk'>@@ -44,7 +44,7 @@ Procedura per sottomettere patch per i sorgenti -stable</div><div class='ctx'> .. note::</div><div class='ctx'>   Una patch di sicurezza non dovrebbe essere gestita (solamente) dal processo</div><div class='ctx'>   di revisione -stable, ma dovrebbe seguire le procedure descritte in</div><div class='del'>-  :ref:`Documentation/translations/it_IT/admin-guide/security-bugs.rst &lt;it_securitybugs&gt;`.</div><div class='add'>+  :ref:`Documentation/translations/it_IT/process/security-bugs.rst &lt;it_securitybugs&gt;`.</div><div class='ctx'> </div><div class='ctx'> Per tutte le altre sottomissioni, scegliere una delle seguenti procedure</div><div class='ctx'> ------------------------------------------------------------------------</div><div class='head'>diff --git a/Documentation/translations/it_IT/process/submitting-patches.rst b/Documentation/translations/it_IT/process/submitting-patches.rst<br/>index f91c8092844f..4c6a276bdc08 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/submitting-patches.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/it_IT/process/submitting-patches.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/it_IT/process/submitting-patches.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/it_IT/process/submitting-patches.rst</a></div><div class='hunk'>@@ -349,6 +349,33 @@ Leggete Documentation/translations/it_IT/process/email-clients.rst per</div><div class='ctx'> le raccomandazioni sui programmi di posta elettronica e l'etichetta da usare</div><div class='ctx'> sulle liste di discussione.</div><div class='ctx'> </div><div class='add'>+.. _it_interleaved_replies:</div><div class='add'>+</div><div class='add'>+Rispondere alle email in riga e riducendo la citazioni</div><div class='add'>+------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Nelle discussioni riguardo allo sviluppo del kernel viene fortemente scoraggiato</div><div class='add'>+l'uso di risposte in cima ai messaggi di posta elettronica. Rispondere in riga</div><div class='add'>+rende le conversazioni molto più scorrevoli. Maggiori dettagli possono essere</div><div class='add'>+trovati qui: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style</div><div class='add'>+</div><div class='add'>+Come spesso citato nelle liste di discussione::</div><div class='add'>+</div><div class='add'>+  R: http://en.wikipedia.org/wiki/Top_post</div><div class='add'>+  D: Dove posso trovare informazioni riguardo alle "risposte in cima"?</div><div class='add'>+  R: Perché incasina il normale ordine con cui si legge un testo.</div><div class='add'>+  D: Perché è così terribile rispondere in cima?</div><div class='add'>+  R: Risposte in cima.</div><div class='add'>+  Q: Qual è la cosa più fastidiosa nei messaggi di posta elettronica?</div><div class='add'>+</div><div class='add'>+Allo stesso modo, per favore eliminate tutte le citazioni non necessarie per la</div><div class='add'>+vostra risposta. Questo permette di trovare più facilmente le risposte, e</div><div class='add'>+permette di risparmiare tempo e spazio. Per maggiori dettagli:</div><div class='add'>+http://daringfireball.net/2007/07/on_top ::</div><div class='add'>+</div><div class='add'>+  R: No.</div><div class='add'>+  D: Dovrei includere un blocco di citazione dopo la mia risposta?</div><div class='add'>+</div><div class='ctx'> .. _it_resend_reminders:</div><div class='ctx'> </div><div class='ctx'> Non scoraggiatevi - o impazientitevi</div><div class='head'>diff --git a/Documentation/translations/ja_JP/process/howto.rst b/Documentation/translations/ja_JP/process/howto.rst<br/>index 8d856ebe873c..872876c67896 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/ja_JP/process/howto.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/ja_JP/process/howto.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/ja_JP/process/howto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/ja_JP/process/howto.rst</a></div><div class='hunk'>@@ -110,7 +110,7 @@ Linux カーãƒ�ルソースツリーã�¯å¹…広ã�„範囲ã�®ãƒ‰ã‚­ãƒ¥ãƒ¡ãƒ³ãƒˆã‚’å�</div><div class='ctx'> æ–°ã�—ã�„ドキュメントファイルも追加ã�™ã‚‹ã�“ã�¨ã‚’勧ã‚�ã�¾ã�™ã€‚</div><div class='ctx'> カーãƒ�ルã�®å¤‰æ›´ã�Œã€�カーãƒ�ルã�Œãƒ¦ãƒ¼ã‚¶ç©ºé–“ã�«å…¬é–‹ã�—ã�¦ã�„るインターフェイスã�®</div><div class='ctx'> 変更を引ã��èµ·ã�“ã�™å ´å�ˆã€�ã��ã�®å¤‰æ›´ã‚’説明ã�™ã‚‹ãƒžãƒ‹ãƒ¥ã‚¢ãƒ«ãƒšãƒ¼ã‚¸ã�®ãƒ‘ッãƒ�や情報</div><div class='del'>-をマニュアルページã�®ãƒ¡ãƒ³ãƒ†ãƒŠ mtk.manpages@gmail.com ã�«é€�ã‚Šã€�CC ã‚’</div><div class='add'>+をマニュアルページã�®ãƒ¡ãƒ³ãƒ†ãƒŠ alx@kernel.org ã�«é€�ã‚Šã€�CC ã‚’</div><div class='ctx'> linux-api@vger.kernel.org ã�«é€�ã‚‹ã�“ã�¨ã‚’勧ã‚�ã�¾ã�™ã€‚</div><div class='ctx'> </div><div class='ctx'> 以下ã�¯ã‚«ãƒ¼ãƒ�ルソースツリーã�«å�«ã�¾ã‚Œã�¦ã�„る読んã�§ã�Šã��ã�¹ã��ファイルã�®ä¸€è¦§ã�§</div><div class='head'>diff --git a/Documentation/translations/sp_SP/index.rst b/Documentation/translations/sp_SP/index.rst<br/>index c543b495c042..274ef4ad96b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/index.rst</a></div><div class='hunk'>@@ -7,7 +7,7 @@ Traducción al español</div><div class='ctx'> </div><div class='ctx'> 	\kerneldocCJKoff</div><div class='ctx'> </div><div class='del'>-:maintainer: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:maintainer: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_disclaimer:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/memory-barriers.txt b/Documentation/translations/sp_SP/memory-barriers.txt<br/>index 27097a808c88..153e57130775 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/memory-barriers.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/memory-barriers.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/memory-barriers.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/memory-barriers.txt</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> NOTE:</div><div class='ctx'> This is a version of Documentation/memory-barriers.txt translated into</div><div class='del'>-Spanish by Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;. If you find any</div><div class='add'>+Spanish by Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;. If you find any</div><div class='ctx'> difference between this document and the original file or a problem with</div><div class='ctx'> the translation, please contact the maintainer of this file. Please also</div><div class='ctx'> note that the purpose of this file is to be easier to read for non English</div><div class='hunk'>@@ -18,7 +18,7 @@ Documento original: David Howells &lt;dhowells@redhat.com&gt;</div><div class='ctx'>     Will Deacon &lt;will.deacon@arm.com&gt;</div><div class='ctx'>     Peter Zijlstra &lt;peterz@infradead.org&gt;</div><div class='ctx'> </div><div class='del'>-Traducido por: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+Traducido por: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> Nota: Si tiene alguna duda sobre la exactitud del contenido de esta</div><div class='ctx'> traducción, la única referencia válida es la documentación oficial en</div><div class='ctx'> inglés.</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/1.Intro.rst b/Documentation/translations/sp_SP/process/1.Intro.rst<br/>new file mode 100644<br/>index 000000000000..9b92b6c85221<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/1.Intro.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/1.Intro.rst</a></div><div class='hunk'>@@ -0,0 +1,302 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/1.Intro.rst</div><div class='add'>+:Translator: Avadhut Naik &lt;avadhut.naik@amd.com&gt;</div><div class='add'>+</div><div class='add'>+.. _sp_development_process_intro:</div><div class='add'>+</div><div class='add'>+Introducción</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+Resumen ejecutivo</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+El resto de esta sección cubre el alcance del proceso de desarrollo del</div><div class='add'>+kernel y los tipos de frustraciones que los desarrolladores y sus</div><div class='add'>+empleadores pueden encontrar allí. Hay muchas razones por las que el</div><div class='add'>+código del kernel debe fusionarse con el kernel oficial (“mainlineâ€�),</div><div class='add'>+incluyendo la disponibilidad automática para los usuarios, el apoyo de la</div><div class='add'>+comunidad en muchas formas, y la capacidad de influir en la dirección del</div><div class='add'>+desarrollo del kernel. El código contribuido al kernel de Linux debe</div><div class='add'>+estar disponible bajo una licencia compatible con GPL.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_process` introduce el proceso de desarrollo, el ciclo</div><div class='add'>+de lanzamiento del kernel y la mecánica de la "ventana de combinación"</div><div class='add'>+(merge window). Se cubren las distintas fases en el desarrollo del parche,</div><div class='add'>+la revisión y, el ciclo de fusión. Hay algunas discusiones sobre</div><div class='add'>+herramientas y listas de correo. Se anima a los desarrolladores que deseen</div><div class='add'>+comenzar con el desarrollo del kernel a encontrar y corregir errores como</div><div class='add'>+ejercicio inicial.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_early_stage` cubre la planificación de proyectos en</div><div class='add'>+etapas tempranas, con énfasis en involucrar a la comunidad de desarrollo</div><div class='add'>+lo antes posible.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_coding` trata sobre el proceso de codificación. Se</div><div class='add'>+discuten varios escollos encontrados por otros desarrolladores. Se cubren</div><div class='add'>+algunos requisitos para los parches, y hay una introducción a algunas de</div><div class='add'>+las herramientas que pueden ayudar a garantizar que los parches del kernel</div><div class='add'>+sean correctos.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_posting` trata sobre el proceso de enviar parches para</div><div class='add'>+su revisión. Para ser tomados en serio por la comunidad de desarrollo,</div><div class='add'>+los parches deben estar correctamente formateados y descritos, y deben</div><div class='add'>+enviarse al lugar correcto. Seguir los consejos de esta sección debería</div><div class='add'>+ayudar a garantizar la mejor recepción posible para su trabajo.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_followthrough` cubre lo que sucede después de publicar</div><div class='add'>+parches; el trabajo está lejos de terminar en ese momento. Trabajar con</div><div class='add'>+revisores es una parte crucial del proceso de desarrollo; esta sección</div><div class='add'>+ofrece varios consejos sobre cómo evitar problemas en esta importante</div><div class='add'>+etapa. Se advierte a los desarrolladores que no asuman que el trabajo está</div><div class='add'>+terminado cuando un parche se fusiona en mainline.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_advancedtopics` introduce un par de temas “avanzadosâ€�:</div><div class='add'>+la administración de parches con git y la revisión de parches publicados</div><div class='add'>+por otros.</div><div class='add'>+</div><div class='add'>+:ref:`sp_development_conclusion` concluye el documento con punteros a las</div><div class='add'>+fuentes para obtener más información sobre el desarrollo del kernel.</div><div class='add'>+</div><div class='add'>+De qué trata este documento</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+El kernel de Linux, con más de 8 millones de líneas de código y más de</div><div class='add'>+1000 colaboradores en cada versión, en uno de los proyectos de software</div><div class='add'>+libre más grandes y activos que existen. Desde sus humildes comienzos en</div><div class='add'>+1991, este kernel ha evolucionado hasta convertirse en el mejor componente</div><div class='add'>+del sistema operativo que se ejecuta en reproductores de música digital</div><div class='add'>+de bolsillo, PC de escritorio, las supercomputadoras más grandes que</div><div class='add'>+existen y todo tipo de sistemas intermedios. Es una solución robusta,</div><div class='add'>+eficiente, y escalable para casi cualquier situación.</div><div class='add'>+</div><div class='add'>+Con el crecimiento de Linux, ha llegado un aumento en el número de</div><div class='add'>+desarrolladores (y empresas) que desean participar en su desarrollo. Los</div><div class='add'>+vendedores de hardware quieren asegurarse de que Linux sea compatible con</div><div class='add'>+sus productos, lo que hace que esos productos sean atractivos para los</div><div class='add'>+usuarios de Linux. Los vendedores de sistemas embebidos, que utilizan</div><div class='add'>+Linux como componente de un producto integrado, quieren que Linux sea lo</div><div class='add'>+más capaz y adecuado posible para tarea en cuestión. Los distribuidores</div><div class='add'>+y otros vendedores de software que basan sus productos en Linux tienen un</div><div class='add'>+claro interés en las capacidades, el rendimiento, y la fiabilidad del</div><div class='add'>+kernel de Linux. Y los usuarios finales, también, a menudo desearán</div><div class='add'>+cambiar Linux para que se adapte mejor a sus necesidades.</div><div class='add'>+</div><div class='add'>+Una de las características más convincentes de Linux es que es accesible</div><div class='add'>+a estos desarrolladores; cualquier persona con las habilidades necesarias</div><div class='add'>+puede mejorar Linux e influir en la dirección de su desarrollo. Los</div><div class='add'>+productos propietarios no pueden ofrecer este tipo de apertura, que es una</div><div class='add'>+característica del proceso de software libre. Pero, en todo caso, el</div><div class='add'>+kernel es aún más libre que la mayoría de los otros proyectos de software</div><div class='add'>+libre. Un ciclo típico de desarrollo de kernel de tres meses puede</div><div class='add'>+involucrar a más de 1000 desarrolladores que trabajan para más de 100</div><div class='add'>+empresas diferentes (o sin pertenecer a ninguna empresa).</div><div class='add'>+</div><div class='add'>+Trabajar con la comunidad de desarrollo del kernel no es especialmente</div><div class='add'>+difícil. Pero, a pesar de eso, muchos colaboradores potenciales han</div><div class='add'>+experimentado dificultades al tratar de hacer el trabajo del kernel. La</div><div class='add'>+comunidad del kernel ha desarrollado sus propias formas distintivas de</div><div class='add'>+operar, lo que le permite funcionar de manera fluida (y producir un</div><div class='add'>+producto de alta calidad) en un entorno donde miles de líneas de código</div><div class='add'>+se cambian todos los días. Por lo tanto, no es sorprendente que el</div><div class='add'>+proceso de desarrollo del kernel de Linux difiera mucho de los métodos de</div><div class='add'>+desarrollo propietarios.</div><div class='add'>+</div><div class='add'>+El proceso de desarrollo del kernel puede parecer extraño e intimidante</div><div class='add'>+para los nuevos desarrolladores, pero hay buenas razones y una sólida</div><div class='add'>+experiencia detrás de él. Un desarrollador que no entienda las formas de</div><div class='add'>+la comunidad del kernel (o, peor aún, que intente burlarse o eludirlas)</div><div class='add'>+tendrá una experiencia frustrante por delante. La comunidad de</div><div class='add'>+desarrollo, si bien es servicial para aquellos que están tratando de</div><div class='add'>+aprender, tiene poco tiempo para aquellos que no escuchan o que no se</div><div class='add'>+preocupan por el proceso de desarrollo.</div><div class='add'>+</div><div class='add'>+Se espera que quienes lean este documento puedan evitar esa experiencia</div><div class='add'>+frustrante. Hay mucho material aquí, pero el esfuerzo que implica leerlo</div><div class='add'>+será recompensado en poco tiempo. La comunidad de desarrollo siempre</div><div class='add'>+necesita desarrolladores que ayudan a mejorar el kernel; el siguiente</div><div class='add'>+texto debería ayudarle – o a quienes trabajan para usted, a unirse a</div><div class='add'>+nuestra comunidad.</div><div class='add'>+</div><div class='add'>+Créditos</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+Este documento fue escrito por Jonathan Corbet, corbet@lwn.net. Ha sido</div><div class='add'>+mejorado por los comentarios de Johannes Berg, James Berry, Alex Chiang,</div><div class='add'>+Roland Dreier, Randy Dunlap, Jake Edge, Jiri Kosina, Matt Mackall, Arthur</div><div class='add'>+Marsh, Amanda McPherson, Andrew Morton, Andrew Price, Tsugikazu Shibata y</div><div class='add'>+Jochen Voß.</div><div class='add'>+Este trabajo fue respaldado por la Fundación Linux; gracias especialmente</div><div class='add'>+a Amanda McPherson, quien reconoció el valor de este esfuerzo e hizo que</div><div class='add'>+todo sucediera.</div><div class='add'>+</div><div class='add'>+Importancia de integrar el código en el mainline</div><div class='add'>+------------------------------------------------</div><div class='add'>+</div><div class='add'>+Algunas empresas y desarrolladores ocasionalmente se preguntan por qué</div><div class='add'>+deberían molestarse en aprender cómo trabajar con la comunidad del</div><div class='add'>+kernel y obtener su código en el kernel mainline (el “mainlineâ€� es el</div><div class='add'>+kernel mantenido por Linus Torvalds y utilizado como base por los</div><div class='add'>+distribuidores de Linux. A corto plazo, contribuir con código puede</div><div class='add'>+parecer un gasto evitable; parece más fácil mantener el código separado</div><div class='add'>+y dar soporte a los usuarios directamente. La verdad del asunto es que</div><div class='add'>+mantener el código separado (“fuera del árbolâ€�) es pan para hoy y hambre</div><div class='add'>+para mañana.</div><div class='add'>+</div><div class='add'>+Para ilustrar los costos del código fuera-del-árbol, aquí hay algunos</div><div class='add'>+aspectos relevantes del proceso de desarrollo del kernel. La mayoría de</div><div class='add'>+estos se discutirán con mayor detalle más adelante en este documento.</div><div class='add'>+Considerar:</div><div class='add'>+</div><div class='add'>+- El código que se ha fusionado con el kernel mainline está disponible</div><div class='add'>+  para todos los usuarios de Linux. Estará presente automáticamente en</div><div class='add'>+  todas las distribuciones que lo habiliten. No hay necesidad de discos</div><div class='add'>+  de controladores, descargas, o las molestias de admitir múltiples</div><div class='add'>+  versiones de múltiples distribuciones; todo simplemente funciona, para</div><div class='add'>+  el desarrollador y para el usuario. La incorporación al mainline</div><div class='add'>+  resuelve un gran número de problemas de distribución y soporte.</div><div class='add'>+</div><div class='add'>+- Mientras los desarrolladores del kernel se esfuerzan por mantener una</div><div class='add'>+  interfaz estable para el espacio de usuario, la API interna de kernel</div><div class='add'>+  está en constante cambio. La falta de una interfaz interna estable es</div><div class='add'>+  una decisión deliberada de diseño; permite realizar mejoras</div><div class='add'>+  fundamentales en cualquier momento y da como resultado un código de</div><div class='add'>+  mayor calidad. Pero uno resultado de esa política es que cualquier</div><div class='add'>+  código fuera-del-árbol requiere un mantenimiento constante si va a</div><div class='add'>+  funcionar con los nuevos kernels. Mantener el código fuera-del-árbol</div><div class='add'>+  requiere una cantidad significativa de trabajo sólo para que ese código</div><div class='add'>+  siga funcionando.</div><div class='add'>+</div><div class='add'>+  En su lugar, el código en el mainline no requiere este trabajo como</div><div class='add'>+  resultado de una regla simple que requiere que cualquier desarrollador</div><div class='add'>+  que realice un cambio en la API también corrija cualquier código que</div><div class='add'>+  se rompa como resultado de ese cambio. Así que, el código fusionado en</div><div class='add'>+  el mainline tiene costos de mantenimiento significativamente más bajos.</div><div class='add'>+</div><div class='add'>+- Más allá de eso, el código que está en el kernel a menudo será</div><div class='add'>+  mejorado por otros desarrolladores. Resultados sorprendentes pueden</div><div class='add'>+  provenir de capacitar a su comunidad de usuarios y clientes para mejorar</div><div class='add'>+  su producto.</div><div class='add'>+</div><div class='add'>+- El código del kernel se somete a revisión, tanto antes como después</div><div class='add'>+  de fusionarse con el mainline. No importa cuán fuertes sean las</div><div class='add'>+  habilidades del desarrollador original, este proceso de revisión</div><div class='add'>+  invariablemente encuentra formas en las que se puede mejorar el código.</div><div class='add'>+  A menudo la revisión encuentra errores graves y problemas de seguridad.</div><div class='add'>+  Esto es especialmente cierto para el código que se ha desarrollado en</div><div class='add'>+  un entorno cerrado; dicho código se beneficia fuertemente de la</div><div class='add'>+  revisión por desarrolladores externos. El código fuera-del-árbol es</div><div class='add'>+  de menor calidad.</div><div class='add'>+</div><div class='add'>+- La participación en el proceso de desarrollo es su manera de influir en</div><div class='add'>+  la dirección del desarrollo del kernel. Los usuarios que se quejan</div><div class='add'>+  desde el sofa son escuchados, pero los desarrolladores activos tienen</div><div class='add'>+  una voz más fuerte – y la capacidad de implementar cambios que hacen</div><div class='add'>+  que el kernel funcione mejor para sus necesidades.</div><div class='add'>+</div><div class='add'>+- Cuando el código se mantiene por separado, siempre existe la posibilidad</div><div class='add'>+  de que un tercero contribuya a una implementación diferente de una</div><div class='add'>+  característica similar. Si eso sucede, conseguir que su código</div><div class='add'>+  fusionado será mucho más difícil – hasta el punto de la imposibilidad.</div><div class='add'>+  Entonces se enfrentará a las desagradables alternativas de (1) mantener</div><div class='add'>+  una característica no estándar fuera del árbol indefinidamente, o</div><div class='add'>+  (2) abandonar su código y migrar sus usuarios a la versión en el árbol.</div><div class='add'>+</div><div class='add'>+- La contribución del código es la acción fundamental que hace que todo</div><div class='add'>+  el proceso funcione. Al contribuir con su código, puede agregar nuevas</div><div class='add'>+  funcionalidades al kernel y proporcionar capacidades y ejemplos que son</div><div class='add'>+  útiles para otros desarrolladores del kernel. Si ha desarrollado código</div><div class='add'>+  para Linux (o está pensando en hacerlo), claramente tiene un interés</div><div class='add'>+  en el éxito continuo de esta plataforma; contribuir con código es una</div><div class='add'>+  de las mejores maneras de ayudar a garantizar ese éxito.</div><div class='add'>+</div><div class='add'>+Todo el razonamiento anterior se aplica a cualquier código de kernel</div><div class='add'>+fuera-del-árbol, incluido el código que se distribuye en forma propietaria</div><div class='add'>+y únicamente en binario. Sin embargo, hay factores adicionales que deben</div><div class='add'>+tenerse en cuenta antes de considerar cualquier tipo de distribución de</div><div class='add'>+código de kernel únicamente en binario. Estos incluyen:</div><div class='add'>+</div><div class='add'>+- Las cuestiones legales en torno a la distribución de módulos</div><div class='add'>+  propietarios del kernel son, en el mejor de los casos, confusas;</div><div class='add'>+  bastantes titulares de derechos de autor del kernel creen que la</div><div class='add'>+  mayoría de los módulos binarios son productos derivados del kernel y</div><div class='add'>+  que, como resultado, su distribución es una violación de la licencia</div><div class='add'>+  Pública General de GNU (sobre la que se dirá más adelante). El autor</div><div class='add'>+  de este texto no es abogado, y nada en este documento puede considerarse</div><div class='add'>+  asesoramiento legal. Solo los tribunales pueden determinar el verdadero</div><div class='add'>+  estatus legal de los módulos de código cerrado. Pero la incertidumbre</div><div class='add'>+  que acecha a esos módulos está ahí a pesar de todo.</div><div class='add'>+</div><div class='add'>+- Los módulos binarios aumentan enormemente la dificultad de depurar</div><div class='add'>+  problemas del kernel, hasta el punto de que la mayoría de los</div><div class='add'>+  desarrolladores del kernel ni siquiera lo intentarán. Por lo tanto,</div><div class='add'>+  la distribución de módulos únicamente en binario hará que sea más</div><div class='add'>+  difícil para sus usuarios obtener soporte de la comunidad.</div><div class='add'>+</div><div class='add'>+- El soporte también es más difícil para los distribuidores de módulos</div><div class='add'>+  únicamente en binario, que deben proporcionar una versión del módulo</div><div class='add'>+  para cada distribución y cada versión del kernel que deseen apoyar.</div><div class='add'>+  Podría requerir docenas de compilaciones de un solo módulo para</div><div class='add'>+  proporcionar una cobertura razonablemente completa, y sus usuarios</div><div class='add'>+  tendrán que actualizar su módulo por separado cada vez que</div><div class='add'>+  actualicen su kernel.</div><div class='add'>+</div><div class='add'>+- Todo lo que se dijo anteriormente sobre la revisión de código se aplica</div><div class='add'>+  doblemente al código cerrado. Dado que este código no está disponible</div><div class='add'>+  en absoluto, no puede haber sido revisado por la comunidad y, sin duda,</div><div class='add'>+  tendrá serios problemas.</div><div class='add'>+</div><div class='add'>+Los fabricantes de sistemas embebidos, en particular, pueden verse</div><div class='add'>+tentados a ignorar gran parte de lo que se ha dicho en esta sección</div><div class='add'>+creyendo que están enviando un producto autónomo que utiliza una</div><div class='add'>+versión de kernel congelada y no requiere más desarrollo después de su</div><div class='add'>+lanzamiento. Este argumento desaprovecha el valor de la revisión</div><div class='add'>+generalizad del código y el valor de permitir que sus usuarios agreguen</div><div class='add'>+capacidades a su producto. Pero estos productos también tienen una vida</div><div class='add'>+comercial limitada, después de la cual se debe lanzar una nueva versión.</div><div class='add'>+En ese punto, los vendedores cuyo código esté en el mainline y bien</div><div class='add'>+mantenido estarán en una posición mucho mejor para preparar el nuevo</div><div class='add'>+producto rápidamente para el mercado.</div><div class='add'>+</div><div class='add'>+Licencias</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+El código se contribuye al kernel de Linux bajo varias licencias, pero</div><div class='add'>+todo el código debe ser compatible con la versión 2 de la Licencia</div><div class='add'>+Pública General de GNU (GPLv2), que cubre la distribución del kernel. En</div><div class='add'>+la práctica, esto significa que todas las contribuciones de código están</div><div class='add'>+cubiertas ya sea por la GPLv2 (con, opcionalmente, un lenguaje que permite</div><div class='add'>+la distribución en versiones posteriores de la GPL) o por la licencia BSD</div><div class='add'>+de tres cláusulas. Cualquier contribución que no esté cubierta por una</div><div class='add'>+licencia compatible no será aceptada en el kernel.</div><div class='add'>+</div><div class='add'>+No se requieren (ni se solicitan) cesiones de derechos de autor para el</div><div class='add'>+código aportado al kernel. Todo el código fusionado en el kernel</div><div class='add'>+mainline conserva su propiedad original; como resultado, el kernel ahora</div><div class='add'>+tiene miles de propietarios.</div><div class='add'>+</div><div class='add'>+Una implicación de esta estructura de propiedad es que cualquier intento</div><div class='add'>+de cambiar la licencia del kernel está condenado a un fracaso casi seguro.</div><div class='add'>+Hay pocos escenarios prácticos en los que se pueda obtener el acuerdo de</div><div class='add'>+todos los titulares de derechos de autor (o eliminar su código del</div><div class='add'>+kernel). Así que, en particular, no hay perspectivas de una migración a</div><div class='add'>+la versión 3 de la GPL en un futuro previsible.</div><div class='add'>+</div><div class='add'>+Es imperativo que todo el código aportado al kernel sea legítimamente</div><div class='add'>+software libre. Por esa razón, no se aceptará código de colaboradores</div><div class='add'>+anónimos (o seudónimos). Todos los colaboradores están obligados a</div><div class='add'>+“firmarâ€� su código, indicando que el código puede ser distribuido con</div><div class='add'>+el kernel bajo la GPL. El código que no ha sido licenciado como software</div><div class='add'>+libre por su propietario, o que corre el riesgo de crear problemas</div><div class='add'>+relacionadas con los derechos de autor para el kernel (como el código que</div><div class='add'>+se deriva de esfuerzos de ingeniería inversa que carecen de las garantías</div><div class='add'>+adecuadas) no puede ser contribuido.</div><div class='add'>+</div><div class='add'>+Las preguntas sobre cuestiones relacionadas con los derechos de autor son</div><div class='add'>+comunes en las listas de correo de desarrollo de Linux. Normalmente, estas</div><div class='add'>+preguntas no recibirán escasez de respuestas, pero se debe tener en cuenta</div><div class='add'>+que las personas que responden a esas preguntas no son abogados y no</div><div class='add'>+pueden proporcionar consejo legal. Si tiene preguntas legales relacionadas</div><div class='add'>+con el código fuente de Linux, no hay sustituto para hablar con un abogado</div><div class='add'>+que entienda este campo. Confiar en las respuestas obtenidas en listas</div><div class='add'>+técnicas de correo es un asunto arriesgado.</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/2.Process.rst b/Documentation/translations/sp_SP/process/2.Process.rst<br/>new file mode 100644<br/>index 000000000000..5993eed71563<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/2.Process.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/2.Process.rst</a></div><div class='hunk'>@@ -0,0 +1,542 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/2.Process.rst</div><div class='add'>+:Translator: Avadhut Naik &lt;avadhut.naik@amd.com&gt;</div><div class='add'>+</div><div class='add'>+.. _sp_development_process:</div><div class='add'>+</div><div class='add'>+Cómo funciona el proceso de desarrollo</div><div class='add'>+======================================</div><div class='add'>+</div><div class='add'>+El desarrollo del kernel de Linux a principios de la década de 1990 fue</div><div class='add'>+un asunto relajado, con un número relativamente pequeño de usuarios y</div><div class='add'>+desarrolladores involucrados. Con una base de usuarios en los millones y</div><div class='add'>+alrededor de 2,000 desarrolladores involucrados durante un año, el kernel</div><div class='add'>+ha tenido que adaptar varios procesos para mantener el desarrollo sin</div><div class='add'>+problemas. Se requiere una comprensión solida de cómo funciona el proceso</div><div class='add'>+para ser una parte efectiva del mismo.</div><div class='add'>+</div><div class='add'>+El panorama general</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+Los desarrolladores del kernel utilizan un proceso de lanzamiento basado</div><div class='add'>+en el tiempo de manera flexible, con uno nuevo lanzamiento principal del</div><div class='add'>+kernel ocurriendo cada dos o tres meses. El historial reciente de</div><div class='add'>+lanzamientos se ve así:</div><div class='add'>+</div><div class='add'>+	======  ==================</div><div class='add'>+	5.0     Marzo 3, 2019</div><div class='add'>+	5.1     Mayo 5, 2019</div><div class='add'>+	5.2     Julio 7, 2019</div><div class='add'>+	5.3     Septiembre 15, 2019</div><div class='add'>+	5.4     Noviembre 24, 2019</div><div class='add'>+	5.5     Enero 6, 2020</div><div class='add'>+	======  ==================</div><div class='add'>+</div><div class='add'>+Cada lanzamiento 5.x es un lanzamiento principal del kernel con nuevas</div><div class='add'>+características, cambios internos en la API y más. Un lanzamiento típico</div><div class='add'>+puede contener alrededor de 13,000 conjuntos de cambios incluyendo en</div><div class='add'>+varias centenas de miles de líneas de código. 5.x es la vanguardia del</div><div class='add'>+desarrollo del kernel de Linux; el kernel utiliza un modelo de desarrollo</div><div class='add'>+continuo que está integrando continuamente cambios importantes.</div><div class='add'>+</div><div class='add'>+Se sigue una disciplina relativamente sencilla con respecto a la fusión</div><div class='add'>+de parches para cada lanzamiento. Al comienzo de cada ciclo de desarrollo,</div><div class='add'>+se dice que la "merge window" (ventana de fusión) está abierta. En ese</div><div class='add'>+momento, el código que se considera lo suficientemente estable (y que es</div><div class='add'>+aceptado por la comunidad de desarrollo) se fusiona en el kernel mainline.</div><div class='add'>+La mayor parte de los cambios para un nuevo ciclo de desarrollo (y todos</div><div class='add'>+los cambios principales) se fusionarán durante este tiempo, a un ritmo</div><div class='add'>+cercano a los 1,000 cambios (“parchesâ€� o “conjuntos de cambiosâ€�) por</div><div class='add'>+día.</div><div class='add'>+</div><div class='add'>+(Aparte, vale la pena señalar que los cambios integrados durante la</div><div class='add'>+ventana de fusión no surgen de la nada; han sido recolectados, probados</div><div class='add'>+y montados con anticipación. Como funciona ese proceso se describirá en</div><div class='add'>+detalle más adelante).</div><div class='add'>+</div><div class='add'>+La ventana de fusión dura aproximadamente dos semanas. Al final de este</div><div class='add'>+tiempo, Linux Torvalds declarará que la ventana está cerrada y publicará</div><div class='add'>+el primero de los kernels “rcâ€�. Para el kernel destinado a ser 5.6, por</div><div class='add'>+ejemplo, el lanzamiento al final de la ventana de fusión se llamará</div><div class='add'>+5.6-rc1. El lanzamiento -rc1 señala que el tiempo para fusionar nuevas</div><div class='add'>+características ha pasado y que el tiempo para estabilizar el siguiente</div><div class='add'>+kernel ha comenzado.</div><div class='add'>+</div><div class='add'>+Durante las próximas seis a diez semanas, solo los parches que solucionen</div><div class='add'>+problemas deben enviarse al mainline. En ocasiones, se permitirá un cambio</div><div class='add'>+más significativo, pero tales ocasiones son raras; los desarrolladores que</div><div class='add'>+intentan fusionar nuevas características fuera de la ventana de fusión</div><div class='add'>+suelen recibir una recepción poco amistosa. Como regla general, si se</div><div class='add'>+pierde la ventana de fusión de una característica determinada, lo mejor</div><div class='add'>+que puede hacer es esperar al siguiente ciclo de desarrollo. (Se hace una</div><div class='add'>+excepción ocasional para los drivers de hardware que no se admitía</div><div class='add'>+anteriormente; si no afectan a ningún código en árbol, no pueden causar</div><div class='add'>+regresiones y debería ser seguro agregarlos en cualquier momento).</div><div class='add'>+</div><div class='add'>+A medida que las correcciones se abren paso en el mainline, la tasa de</div><div class='add'>+parches se ralentizará con el tiempo. Linus lanza nuevos kernels -rc</div><div class='add'>+aproximadamente una vez a la semana; una serie normal llegará a algún</div><div class='add'>+punto entre -rc6 y -rc9 antes de que se considere que el kernel es</div><div class='add'>+suficientemente estable y realice el lanzamiento final. En ese momento,</div><div class='add'>+todo el proceso vuelve a empezar.</div><div class='add'>+</div><div class='add'>+Como ejemplo, así fue el ciclo de desarrollo de 5.4 (todas las fechas son</div><div class='add'>+de 2019):</div><div class='add'>+</div><div class='add'>+	==============  =======================================</div><div class='add'>+	Septiembre 15	5.3 lanzamiento estable</div><div class='add'>+	Septiembre 30	5.4-rc1, la ventana de fusion se cierra</div><div class='add'>+	Octubre 6		5.4-rc2</div><div class='add'>+	Octubre 13		5.4-rc3</div><div class='add'>+	Octubre 20		5.4-rc4</div><div class='add'>+	Octubre 27		5.4-rc5</div><div class='add'>+	Noviembre 3		5.4-rc6</div><div class='add'>+	Noviembre 10	5.4-rc7</div><div class='add'>+	Noviembre 17	5.4-rc8</div><div class='add'>+	Noviembre 24	5.4 lanzamiento estable</div><div class='add'>+	==============  =======================================</div><div class='add'>+</div><div class='add'>+¿Cómo deciden los desarrolladores cuándo cerrar el ciclo de desarrollo</div><div class='add'>+y crear el lanzamiento estable? La métrica más significativa utilizada</div><div class='add'>+es la lista de regresiones de lanzamientos anteriores. Ningunos errores</div><div class='add'>+son bienvenidos, pero aquellos que rompen sistemas que funcionaron en el</div><div class='add'>+pasado se consideran especialmente graves. Por esta razón, los parches</div><div class='add'>+que causan regresiones se ven con malos ojos y es bastante probable que</div><div class='add'>+se reviertan durante el periodo de estabilización.</div><div class='add'>+</div><div class='add'>+El objetivo de los desarrolladores es corregir todas las regresiones</div><div class='add'>+conocidas antes de que se realice el lanzamiento estable. En el mundo</div><div class='add'>+real, este tipo de perfección es difícil de lograr; hay demasiados</div><div class='add'>+variables en un proyecto de este tamaño. Llega un punto en el que</div><div class='add'>+retrasar el lanzamiento final solo empeora el problema; la pila de cambios</div><div class='add'>+que esperan la siguiente ventana de fusión crecerá, creando aún más</div><div class='add'>+regresiones la próxima vez. Por lo tanto, la mayoría de los kernels 5.x</div><div class='add'>+se lanzan con un punado de regresiones conocidas, aunque, con suerte,</div><div class='add'>+ninguna de ellas es seria.</div><div class='add'>+</div><div class='add'>+Una vez que se realiza un lanzamiento estable, su mantenimiento continuo</div><div class='add'>+se transfiere al “equipo estableâ€�, actualmente encabezado por Greg</div><div class='add'>+Kroah-Hartman. El equipo estable lanzará actualizaciones ocasionales al</div><div class='add'>+lanzamiento estable utilizando el esquema de numeración 5.x.y. Para ser</div><div class='add'>+considerado para un lanzamiento de actualización, un parche debe</div><div class='add'>+(1) corregir un error significativo y (2) ya estar fusionado en el</div><div class='add'>+mainline para el siguiente kernel de desarrollo. Por lo general, los</div><div class='add'>+kernels recibirán actualizaciones estables durante un poco más de un</div><div class='add'>+ciclo de desarrollo después de su lanzamiento inicial. Así, por ejemplo,</div><div class='add'>+la historia del kernel 5.2 se veía así (todas las fechas en 2019):</div><div class='add'>+</div><div class='add'>+	==============  ===============================</div><div class='add'>+	Julio 7			5.2 lanzamiento estable</div><div class='add'>+	Julio 14		5.2.1</div><div class='add'>+	Julio 21		5.2.2</div><div class='add'>+	Julio 26		5.2.3</div><div class='add'>+	Julio 28		5.2.4</div><div class='add'>+	Julio 31		5.2.5</div><div class='add'>+	...				...</div><div class='add'>+	Octubre 11		5.2.21</div><div class='add'>+	==============  ===============================</div><div class='add'>+</div><div class='add'>+5.2.21 fue la última actualización estable del lanzamiento 5.2.</div><div class='add'>+</div><div class='add'>+Algunos kernels se designan como kernels “a largo plazoâ€�; recibirán</div><div class='add'>+soporte durante un periodo más largo. Consulte el siguiente enlace para</div><div class='add'>+obtener la lista de versiones activas del kernel a largo plazos y sus</div><div class='add'>+maintainers:</div><div class='add'>+</div><div class='add'>+	https://www.kernel.org/category/releases.html</div><div class='add'>+</div><div class='add'>+La selección de un kernel para soporte a largo plazo es puramente una</div><div class='add'>+cuestión de que un maintainer tenga la necesidad y el tiempo para</div><div class='add'>+mantener ese lanzamiento. No hay planes conocidos para ofrecer soporte a</div><div class='add'>+largo plazo para ningún lanzamiento especifico próximo.</div><div class='add'>+</div><div class='add'>+Ciclo de vida de un parche</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Los parches no van directamente desde el teclado del desarrollador al</div><div class='add'>+kernel mainline. Hay, en cambio, un proceso algo complicado (aunque algo</div><div class='add'>+informal) diseñado para garantizar que cada parche sea revisado en cuanto</div><div class='add'>+a calidad y que cada parche implemente un cambio que es deseable tener en</div><div class='add'>+el mainline. Este proceso puede ocurrir rápidamente para correcciones</div><div class='add'>+menores, o, en el caso de cambios grandes y controvertidos, continuar</div><div class='add'>+durante años. Gran parte de la frustración de los desarrolladores proviene</div><div class='add'>+de la falta de compresión de este proceso o de sus intentos de eludirlo.</div><div class='add'>+</div><div class='add'>+Con la esperanza de reducir esa frustración, este documento describirá</div><div class='add'>+cómo un parche entra en el kernel. Lo que sigue a continuación es una</div><div class='add'>+introducción que describe el proceso de una manera tanto idealizada. Un</div><div class='add'>+tratamiento mucho más detallado vendrá en secciones posteriores.</div><div class='add'>+</div><div class='add'>+Las etapas por las que pasa un parche son, generalmente:</div><div class='add'>+</div><div class='add'>+ - Diseño. Aquí es donde se establecen los requisitos reales para el</div><div class='add'>+   parche – y la forma en que se cumplirán esos requisitos. El trabajo</div><div class='add'>+   de diseño a menudo se realiza sin involucrar a la comunidad, pero es</div><div class='add'>+   mejor hacer este trabajo de manera abierta si es posible; puede ahorrar</div><div class='add'>+   mucho tiempo rediseñando las cosas más tarde.</div><div class='add'>+</div><div class='add'>+ - Revisión inicial. Los parches se publican en la lista de correo</div><div class='add'>+   relevante y los desarrolladores en esa lista responden con cualquier</div><div class='add'>+   comentario que puedan tener. Este proceso debería revelar cualquier</div><div class='add'>+   problema importante con un parche si todo va bien.</div><div class='add'>+</div><div class='add'>+ - Revisión más amplia. Cuando el parche se acerca a estar listo para su</div><div class='add'>+   inclusión en el mainline, debe ser aceptado por un maintainer del</div><div class='add'>+   subsistema relevante – aunque esta aceptación no es una garantía de</div><div class='add'>+   que el parche llegara hasta el mainline. El parche aparecerá en el</div><div class='add'>+   árbol de subsistemas del maintainer y en los árboles -next (descritos</div><div class='add'>+   a continuación). Cuando el proceso funciona, este paso conduce a una</div><div class='add'>+   revisión exhaustiva del parche y al descubrimiento de cualquier</div><div class='add'>+   problema resultante de la integración de este parche con el trabajo</div><div class='add'>+   realizado por otros.</div><div class='add'>+</div><div class='add'>+ - Tenga en cuenta que la mayoría de los maintainers también tienen</div><div class='add'>+   trabajos diurnos, por lo que fusionar su parche no puede ser su máxima</div><div class='add'>+   prioridad. Si su parche está recibiendo comentarios sobre los cambios</div><div class='add'>+   que se necesitan, debería realizar esos cambios o justificar por qué</div><div class='add'>+   no deberían realizarse. Si su parche no tiene quejas de revisión, pero</div><div class='add'>+   no está siendo fusionado por el maintainer apropiado del subsistema o</div><div class='add'>+   del driver, debe ser persistente en la actualización del parche</div><div class='add'>+   al kernel actual para que se aplique limpiamente y seguir enviándolo</div><div class='add'>+   para su revisión y fusión.</div><div class='add'>+</div><div class='add'>+ - Fusión en el mainline. Eventualmente, un parche exitoso se fusionará</div><div class='add'>+   en el repositorio mainline administrado por Linux Torvalds. Mas</div><div class='add'>+   comentarios y/o problemas pueden surgir en este momento; es importante</div><div class='add'>+   que el desarrollador responda a estos y solucione cualquier problema</div><div class='add'>+   que surja.</div><div class='add'>+</div><div class='add'>+ - Lanzamiento estable. El número de usuarios potencialmente afectados por</div><div class='add'>+   el parche es ahora grande, por lo que, una vez más, pueden surgir</div><div class='add'>+   nuevos problemas.</div><div class='add'>+</div><div class='add'>+ - Mantenimiento a largo plazo. Si bien un desarrollador puede olvidarse</div><div class='add'>+   del código después de fusionarlo, ese comportamiento tiende a dejar</div><div class='add'>+   una impresión negativa en la comunidad de desarrollo. Fusionar el</div><div class='add'>+   código elimina parte de la carga de mantenimiento; otros solucionarán</div><div class='add'>+   los problemas causados por los cambios en la API. Sin embargo, el</div><div class='add'>+   desarrollador original debe seguir asumiendo la responsabilidad del</div><div class='add'>+   código si quiere seguir siendo útil a largo plazo.</div><div class='add'>+</div><div class='add'>+Uno de los peores errores cometidos por los desarrolladores del kernel</div><div class='add'>+(o sus empleadores) es tratar de reducir el proceso a un solo paso de</div><div class='add'>+“fusión en el mainlineâ€�. Este enfoque conduce invariablemente a la</div><div class='add'>+frustración de todos los involucrados.</div><div class='add'>+</div><div class='add'>+Cómo se integran los parches en el kernel</div><div class='add'>+-----------------------------------------</div><div class='add'>+</div><div class='add'>+Hay exactamente una persona que puede fusionar parches en el repositorio</div><div class='add'>+mainline del kernel: Linus Torvalds. Pero, por ejemplo, de los más de</div><div class='add'>+9,500 parches que se incluyeron en el kernel 2.6.38, solo 112 (alrededor</div><div class='add'>+del 1.3%) fueron elegidos directamente por Linus mismo. El proyecto del</div><div class='add'>+kernel ha crecido mucho desde hace tiempo a un tamaño en el que ningún</div><div class='add'>+desarrollador individual podría inspeccionar y seleccionar todos los</div><div class='add'>+parches sin ayuda. La forma que los desarrolladores del kernel han</div><div class='add'>+abordado este crecimiento es a través del uso de un sistema jerárquico</div><div class='add'>+alrededor de una cadena de confianza.</div><div class='add'>+</div><div class='add'>+La base de código del kernel se descompone lógicamente en un conjunto de</div><div class='add'>+subsistemas: redes, soporte de arquitectura especifica, gestión de</div><div class='add'>+memoria, dispositivos de video, etc. La mayoría de los subsistemas tienen</div><div class='add'>+un maintainer designado, un desarrollador que tiene la responsabilidad</div><div class='add'>+general del código dentro de ese subsistema. Estos maintainers de</div><div class='add'>+subsistemas son los guardianes (en cierto modo) de la parte del kernel que</div><div class='add'>+gestionan; son los que (usualmente) aceptarán un parche para incluirlo en</div><div class='add'>+el kernel mainline.</div><div class='add'>+</div><div class='add'>+Cada uno de los maintainers del subsistema administra su propia versión</div><div class='add'>+del árbol de fuentes del kernel, generalmente (pero, ciertamente no</div><div class='add'>+siempre) usando la herramienta de administración de código fuente de git.</div><div class='add'>+Herramientas como git (y herramientas relacionadas como quilt o mercurial)</div><div class='add'>+permiten a los maintainers realizar un seguimiento de una lista de</div><div class='add'>+parches, incluida la información de autoría y otros metadatos. En</div><div class='add'>+cualquier momento, el maintainer puede identificar qué parches de su</div><div class='add'>+repositorio no se encuentran en el mainline.</div><div class='add'>+</div><div class='add'>+Cuando se abre la ventana de fusión, los maintainers de nivel superior</div><div class='add'>+le pedirán a Linus que “extraigaâ€� los parches que han seleccionado para</div><div class='add'>+fusionar de sus repositorios. Si Linus está de acuerdo, el flujo de</div><div class='add'>+parches fluirá hacia su repositorio, convirtiéndose en parte del kernel</div><div class='add'>+mainline. La cantidad de atención que Linus presta a los parches</div><div class='add'>+específicos recibidos en una operación de extracción varia. Está claro</div><div class='add'>+que, a veces, examina bastante de cerca. Pero, como regla general, Linus</div><div class='add'>+confía en que los maintainers del subsistema no envíen parches</div><div class='add'>+defectuosos al upstream.</div><div class='add'>+</div><div class='add'>+Los maintainers de subsistemas, a su vez, pueden extraer parches de otros</div><div class='add'>+maintainers. Por ejemplo, el árbol de red se construye a partir de</div><div class='add'>+parches que se acumulan primero en arboles dedicados a drivers de</div><div class='add'>+dispositivos de red, redes inalámbricas, etc. Esta cadena de repositorios</div><div class='add'>+puede ser arbitrariamente larga, aunque rara vez supera los dos o tres</div><div class='add'>+enlaces. Dado que cada maintainer de la cadena confía en los que</div><div class='add'>+administran árboles de nivel inferior, este proceso se conoce como la</div><div class='add'>+“cadena de confianzaâ€�.</div><div class='add'>+</div><div class='add'>+Claramente, en un sistema como este, lograr que los parches se integren</div><div class='add'>+en el kernel depende de encontrar el maintainer adecuado. Enviar parches</div><div class='add'>+directamente a Linus no es normalmente la forma correcta de hacerlo.</div><div class='add'>+</div><div class='add'>+Ã�rboles siguientes (next)</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+La cadena de árboles de subsistemas guía el flujo de parches en el</div><div class='add'>+kernel, pero también plantea una pregunta interesante: ¿Qué pasa si</div><div class='add'>+alguien quiere ver todos los parches que se están preparando para la</div><div class='add'>+próxima ventana de fusión? Los desarrolladores estarán interesados en</div><div class='add'>+saber que otros cambios están pendientes para ver si hay algún conflicto</div><div class='add'>+del que preocuparse; un parche que cambia un prototipo de función del</div><div class='add'>+núcleo del kernel, por ejemplo, entrará en conflicto con cualquier otro</div><div class='add'>+parche que utilice la forma anterior de esa función. Los revisores y</div><div class='add'>+probadores quieren tener acceso a los cambios en su forma integrada antes</div><div class='add'>+de que todos esos cambios se integren en el kernel mainline. Uno podría</div><div class='add'>+extraer cambios de todos los árboles de subsistemas interesantes, pero</div><div class='add'>+eso sería un trabajo tedioso y propenso a errores.</div><div class='add'>+</div><div class='add'>+La respuesta viene en forma de árboles -next, donde los árboles de</div><div class='add'>+subsistemas se recopilan para pruebas y revisiones. El más antiguo de</div><div class='add'>+estos árboles, mantenido por Andrew Morton, se llama “-mmâ€� (por gestión</div><div class='add'>+de la memoria, que es como comenzó). El árbol “-mmâ€� integra parches</div><div class='add'>+de una larga lista de árboles de subsistemas; también tiene algunos</div><div class='add'>+parches destinados a ayudar con la depuración.</div><div class='add'>+</div><div class='add'>+Más allá de eso, -mm contiene una colección significativa de parches</div><div class='add'>+que han sido seleccionados directamente por Andrew. Estos parches pueden</div><div class='add'>+haber sido publicados en una lista de correo o aplicarse a una parte del</div><div class='add'>+kernel para la que no hay un árbol de subsistemas designado. Como</div><div class='add'>+resultado, -mm funciona como una especie de árbol de subsistemas de</div><div class='add'>+último recurso; si no hay otro camino obvio para un parche en el mainline,</div><div class='add'>+es probable que termine en -mm. Los parches misceláneos que se acumulan</div><div class='add'>+en -mm eventualmente se enviarán a un árbol de subsistema apropiado o se</div><div class='add'>+enviarán directamente a Linus. En un ciclo de desarrollo típico,</div><div class='add'>+aproximadamente el 5-10% de los parches que van al mainline llegan allí</div><div class='add'>+a través de -mm.</div><div class='add'>+</div><div class='add'>+El parche -mm actual está disponible en el directorio “mmotmâ€� (-mm</div><div class='add'>+del momento) en:</div><div class='add'>+</div><div class='add'>+	https://www.ozlabs.org/~akpm/mmotm/</div><div class='add'>+</div><div class='add'>+Sin embargo, es probable que el uso del árbol MMOTM sea una experiencia</div><div class='add'>+frustrante; existe una posibilidad definitiva de que ni siquiera se</div><div class='add'>+compile.</div><div class='add'>+</div><div class='add'>+El árbol principal para la fusión de parches del siguiente ciclo es</div><div class='add'>+linux-next, mantenido por Stephen Rothwell. El árbol linux-next es, por</div><div class='add'>+diseño, una instantánea de cómo se espera que se vea el mainline después</div><div class='add'>+de que se cierre la siguiente ventana de fusión. Los árboles linux-next</div><div class='add'>+se anuncian en las listas de correo linux-kernel y linux-next cuando se</div><div class='add'>+ensamblan; Se pueden descargar desde:</div><div class='add'>+</div><div class='add'>+	https://www.kernel.org/pub/linux/kernel/next/</div><div class='add'>+</div><div class='add'>+Linux-next se ha convertido en una parte integral del proceso de</div><div class='add'>+desarrollo del kernel; todos los parches fusionados durante una ventana</div><div class='add'>+de fusión determinada deberían haber encontrado su camino en linux-next</div><div class='add'>+en algún momento antes de que se abra la ventana de fusión.</div><div class='add'>+</div><div class='add'>+Ã�rboles de staging</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+El árbol de fuentes del kernel contiene el directorio drivers/staging/,</div><div class='add'>+donde residen muchos subdirectorios para drivers o sistemas de archivos</div><div class='add'>+que están en proceso de ser agregados al árbol del kernel. Permanecen</div><div class='add'>+en drivers/staging mientras aún necesitan más trabajo; una vez</div><div class='add'>+completados, se pueden mover al kernel propiamente dicho. Esta es una</div><div class='add'>+forma de realizar un seguimiento de los drivers drivers que no están a la</div><div class='add'>+altura de la codificación o los estándares de calidad del kernel de</div><div class='add'>+Linux, pero que las personas pueden querer usarlos y realizar un</div><div class='add'>+seguimiento del desarrollo.</div><div class='add'>+</div><div class='add'>+Greg Kroah-Hartman mantiene actualmente el árbol de staging. Los drivers</div><div class='add'>+que aun necesitan trabajo se le envían, y cada driver tiene su propio</div><div class='add'>+subdirectorio en drivers/staging/. Junto con los archivos de origen del</div><div class='add'>+driver, también debe haber un archivo TODO en el directorio. El archivo</div><div class='add'>+TODO enumera el trabajo pendiente que el driver necesita para ser aceptado</div><div class='add'>+en el kernel propiamente dicho, así como una lista de personas a las que</div><div class='add'>+Cc’d para cualquier parche para el driver. Las reglas actuales exigen</div><div class='add'>+que los drivers que contribuyen a staging deben, como mínimo, compilarse</div><div class='add'>+correctamente.</div><div class='add'>+</div><div class='add'>+El staging puede ser una forma relativamente fácil de conseguir nuevos</div><div class='add'>+drivers en el mainline donde, con suerte, llamarán la atención de otros</div><div class='add'>+desarrolladores y mejorarán rápidamente. Sin embargo, la entrada en el</div><div class='add'>+staging no es el final de la historia; el código que no está viendo</div><div class='add'>+progreso regular eventualmente será eliminado. Los distribuidores también</div><div class='add'>+tienden a ser relativamente reacios a habilitar los drivers de staging.</div><div class='add'>+Por lo tanto, el staging es, en el mejor de los casos, una parada en el</div><div class='add'>+camino para hacia convertirse en un apropiado driver del mainline.</div><div class='add'>+</div><div class='add'>+Herramientas</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Como se puede ver en el texto anterior, el proceso de desarrollo del</div><div class='add'>+kernel depende en gran medida de la capacidad de dirigir colecciones de</div><div class='add'>+parches en varias direcciones. Todo ello no funcionaría tan bien como lo</div><div class='add'>+hace sin herramientas apropiadamente potentes. Los tutoriales sobre cómo</div><div class='add'>+usar estas herramientas están mucho más allá del alcance de este</div><div class='add'>+documento, pero hay espacio para algunos consejos.</div><div class='add'>+</div><div class='add'>+Con mucho, el sistema de gestión de código fuente dominante utilizado</div><div class='add'>+por la comunidad del kernel es git. Git es uno de los varios sistemas de</div><div class='add'>+control de versiones distribuidos que se están desarrollando en la</div><div class='add'>+comunidad de software libre. Está bien ajustado para el desarrollo de</div><div class='add'>+kernel, ya que funciona bastante bien cuando se trata de grandes</div><div class='add'>+repositorios y grandes cantidades de parches. También tiene la reputación</div><div class='add'>+de ser difícil de aprender y usar, aunque ha mejorado con el tiempo.</div><div class='add'>+Algún tipo de familiaridad con git es casi un requisito para los</div><div class='add'>+desarrolladores del kernel; incluso si no lo usan para su propio</div><div class='add'>+trabajo, necesitarán git para mantenerse al día con lo que otros</div><div class='add'>+desarrolladores (y el mainline) están haciendo.</div><div class='add'>+</div><div class='add'>+Git ahora está empaquetado por casi todas las distribuciones de Linux.</div><div class='add'>+Hay una página de inicio en:</div><div class='add'>+</div><div class='add'>+	https://git-scm.com/</div><div class='add'>+</div><div class='add'>+Esa página tiene punteros a documentación y tutoriales.</div><div class='add'>+</div><div class='add'>+Entre los desarrolladores de kernel que no usan git, la opción más</div><div class='add'>+popular es casi con certeza Mercurial:</div><div class='add'>+</div><div class='add'>+	https://www.selenic.com/mercurial/</div><div class='add'>+</div><div class='add'>+Mercurial comparte muchas características con git, pero proporciona una</div><div class='add'>+interfaz que muchos encuentran más fácil de usar.</div><div class='add'>+</div><div class='add'>+Otra herramienta que vale la pena conocer es Quilt:</div><div class='add'>+</div><div class='add'>+	https://savannah.nongnu.org/projects/quilt/</div><div class='add'>+</div><div class='add'>+Quilt es un sistema de gestión de parches, en lugar de un sistema de</div><div class='add'>+gestión de código fuente. No rastrea el historial a lo largo del tiempo;</div><div class='add'>+en cambio, está orientado al seguimiento de un conjunto especifico de</div><div class='add'>+cambios en relación con una base de código en evolución. Algunos de los</div><div class='add'>+principales maintainers de subsistemas utilizan Quilt para gestionar los</div><div class='add'>+parches destinados a ir upstream. Para la gestión de ciertos tipos de</div><div class='add'>+árboles (por ejemplo, -mm) Quilt es la mejor herramienta para el trabajo.</div><div class='add'>+</div><div class='add'>+Listas de correo</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Una gran parte del trabajo de desarrollo del kernel de Linux se realiza a</div><div class='add'>+través de listas de correo. Es difícil ser un miembro plenamente funcional</div><div class='add'>+de la comunidad sin unirse al menos a una lista en algún parte. Pero las</div><div class='add'>+listas de correo de Linux también representan un peligro potencial para</div><div class='add'>+los desarrolladores, que corren el riesgo de quedar enterrados bajo una</div><div class='add'>+carga de correo electrónico, incumplir las convenciones utilizadas en las</div><div class='add'>+listas de Linux, o ambas cosas.</div><div class='add'>+</div><div class='add'>+La mayoría de las listas de correo del kernel se ejecutan en</div><div class='add'>+vger.kernel.org; la lista principal se puede encontrar en:</div><div class='add'>+</div><div class='add'>+	http://vger.kernel.org/vger-lists.html</div><div class='add'>+</div><div class='add'>+Sim embargo, hay listas alojadas en otros lugares; varios de ellos se</div><div class='add'>+encuentran en redhat.com/mailman/listinfo.</div><div class='add'>+</div><div class='add'>+La lista de correo principal para el desarrollo del kernel es, por</div><div class='add'>+supuesto, linux-kernel. Esta lista es un lugar intimidante; el volumen</div><div class='add'>+puede alcanzar 500 mensajes por día, la cantidad de ruido es alta, la</div><div class='add'>+conversación puede ser muy técnica y los participantes no siempre se</div><div class='add'>+preocupan por mostrar un alto grado de cortesía. Pero no hay otro lugar</div><div class='add'>+donde la comunidad de desarrollo del kernel se reúna como un todo; los</div><div class='add'>+desarrolladores que eviten esta lista se perderán información importante.</div><div class='add'>+</div><div class='add'>+Hay algunos consejos que pueden ayudar a sobrevivir en el kernel de Linux:</div><div class='add'>+</div><div class='add'>+- Haga que la lista se entregue en una carpeta separada, en lugar de su</div><div class='add'>+  buzón principal. Uno debe ser capaz de ignorar el flujo durante</div><div class='add'>+  periodos prolongados.</div><div class='add'>+</div><div class='add'>+- No trate de seguir cada conversación, nadie lo hace. Es importante</div><div class='add'>+  filtrar tanto por el tema de interés (aunque tenga en cuenta que las</div><div class='add'>+  conversaciones prolongadas pueden alejarse del asunto original sin</div><div class='add'>+  cambiar la línea de asunto del correo electrónico) por las personas</div><div class='add'>+  que participan.</div><div class='add'>+</div><div class='add'>+- No alimente a los trolls. Si alguien está tratando de provocar una</div><div class='add'>+  respuesta de enojo, ignórelos.</div><div class='add'>+</div><div class='add'>+- Al responder al correo electrónico del kernel de Linux (o al de otras</div><div class='add'>+  listas) conserve el encabezado Cc: para todos los involucrados. En</div><div class='add'>+  ausencia de una razón solida (como una solicitud explícita), nunca debe</div><div class='add'>+  eliminar destinarios. Asegúrese siempre de que la persona a la que está</div><div class='add'>+  respondiendo esté en la lista Cc:. Esta convención también hace que no</div><div class='add'>+  sea necesario solicitar explícitamente que se le copie en las respuestas</div><div class='add'>+  a sus publicaciones.</div><div class='add'>+</div><div class='add'>+- Busque en los archivos de la lista (y en la red en su conjunto) antes</div><div class='add'>+  de hacer preguntas. Algunos desarrolladores pueden impacientarse con</div><div class='add'>+  las personas que claramente no han hecho sus deberes.</div><div class='add'>+</div><div class='add'>+- Utilice respuestas intercaladas (“en líneaâ€�), lo que hace que su</div><div class='add'>+  respuesta sea más fácil de leer. (Es decir, evite top-posting – la</div><div class='add'>+  práctica de poner su respuesta encima del texto citado al que está</div><div class='add'>+  respondiendo.) Para obtener más información, consulte</div><div class='add'>+  :ref:`Documentation/translations/sp_SP/process/submitting-patches.rst &lt;sp_interleaved_replies&gt;`.</div><div class='add'>+</div><div class='add'>+- Pregunte en la lista de correo correcta. linux-kernel puede ser el</div><div class='add'>+  punto de encuentro general, pero no es el mejor lugar para encontrar</div><div class='add'>+  desarrolladores de todos los subsistemas.</div><div class='add'>+</div><div class='add'>+El último punto, encontrar la lista de correo correcta, es una fuente</div><div class='add'>+común de errores para desarrolladores principiantes. Alguien que haga</div><div class='add'>+una pregunta relacionada con las redes en linux-kernel seguramente</div><div class='add'>+recibirá una surgencia educada para preguntar en la lista de netdev en su</div><div class='add'>+lugar, ya que esa es la lista frecuentada por la mayoría de los</div><div class='add'>+desarrolladores de redes. Existen otras listas para los subsistemas SCSI,</div><div class='add'>+video4linux, IDE, sistema de archivos, etc. El mejor lugar para buscar</div><div class='add'>+listas de correo es en el archivo MAINTAINERS incluido con el código</div><div class='add'>+fuente del kernel.</div><div class='add'>+</div><div class='add'>+Comenzar con el desarrollo del kernel</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+Las preguntas sobre como comenzar con el proceso de desarrollo del kernel</div><div class='add'>+son comunes, tanto de individuos como de empresas. Igualmente comunes son</div><div class='add'>+los pasos en falso que hacen que el comienzo de la relación sea más</div><div class='add'>+difícil de lo que tiene que ser.</div><div class='add'>+</div><div class='add'>+Las empresas a menudo buscan contratar desarrolladores conocidos para</div><div class='add'>+iniciar un grupo de desarrollo. De hecho, esta puede ser una técnica</div><div class='add'>+efectiva. Pero también tiende a ser caro y no hace mucho para crecer el</div><div class='add'>+grupo de desarrolladores de kernel experimentados. Es posible poner al</div><div class='add'>+día a los desarrolladores internos en el desarrollo de kernel de Linux,</div><div class='add'>+dada la inversión de algún tiempo. Tomarse este tiempo puede dotar a un</div><div class='add'>+empleador de un grupo de desarrolladores que comprendan tanto el kernel</div><div class='add'>+como la empresa, y que también puedan ayudar a educar a otros. A medio</div><div class='add'>+plazo, este es a menudo el enfoque más rentable.</div><div class='add'>+</div><div class='add'>+Los desarrolladores individuales, a menudo, comprensiblemente, no tienen</div><div class='add'>+un lugar para empezar. Comenzar con un proyecto grande puede ser</div><div class='add'>+intimidante; a menudo uno quiere probar las aguas con algo más pequeño</div><div class='add'>+primero. Este es el punto en el que algunos desarrolladores se lanzan a</div><div class='add'>+la creación de parches para corregir errores ortográficos o problemas</div><div class='add'>+menores de estilo de codificación. Desafortunadamente, dicho parches</div><div class='add'>+crean un nivel de ruido que distrae a la comunidad de desarrollo en su</div><div class='add'>+conjunto, por lo que, cada vez más, se los mira con desprecio. Los nuevos</div><div class='add'>+desarrolladores que deseen presentarse a la comunidad no recibirán la</div><div class='add'>+recepción que desean por estos medios.</div><div class='add'>+</div><div class='add'>+Andrew Morton da este consejo (traducido) para los aspirantes a</div><div class='add'>+desarrolladores de kernel.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	El proyecto #1 para los principiantes en el kernel seguramente debería</div><div class='add'>+	ser “asegúrese de que el kernel funcione perfectamente en todo momento</div><div class='add'>+	en todas las máquinas que pueda conseguirâ€�. Por lo general, la forma</div><div class='add'>+	de hacer esto es trabajar con otros para arreglar las cosas (¡esto</div><div class='add'>+	puede requerir persistencia!), pero eso está bien, es parte del</div><div class='add'>+	desarrollo del kernel.</div><div class='add'>+</div><div class='add'>+(https://lwn.net/Articles/283982/)</div><div class='add'>+</div><div class='add'>+En ausencia de problemas obvios que solucionar, se aconseja a los</div><div class='add'>+desarrolladores que consulten las listas actuales de regresiones y errores</div><div class='add'>+abiertos en general. Nunca faltan problemas que necesitan solución; al</div><div class='add'>+abordar estos problemas, los desarrolladores ganarán experiencia con el</div><div class='add'>+proceso mientras, al mismo tiempo, se ganarán el respeto del resto de la</div><div class='add'>+comunidad de desarrollo.</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/3.Early-stage.rst b/Documentation/translations/sp_SP/process/3.Early-stage.rst<br/>new file mode 100644<br/>index 000000000000..71cfb3fb0fda<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/3.Early-stage.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/3.Early-stage.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/3.Early-stage.rst</div><div class='add'>+</div><div class='add'>+.. _sp_development_early_stage:</div><div class='add'>+</div><div class='add'>+Planificación en etapa inicial</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+	TODO aún no traducido</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/4.Coding.rst b/Documentation/translations/sp_SP/process/4.Coding.rst<br/>new file mode 100644<br/>index 000000000000..d9436e039b4b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/4.Coding.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/4.Coding.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/4.Coding.rst</div><div class='add'>+</div><div class='add'>+.. _sp_development_coding:</div><div class='add'>+</div><div class='add'>+Conseguir el código correcto</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+	TODO aún no traducido</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/5.Posting.rst b/Documentation/translations/sp_SP/process/5.Posting.rst<br/>new file mode 100644<br/>index 000000000000..50a3bc5998a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/5.Posting.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/5.Posting.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/5.Posting.rst</div><div class='add'>+</div><div class='add'>+.. _sp_development_posting:</div><div class='add'>+</div><div class='add'>+Publicar parches</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+	TODO aún no traducido</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/6.Followthrough.rst b/Documentation/translations/sp_SP/process/6.Followthrough.rst<br/>new file mode 100644<br/>index 000000000000..f0acf9082bb3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/6.Followthrough.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/6.Followthrough.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/6.Followthrough.rst</div><div class='add'>+</div><div class='add'>+.. _sp_development_followthrough:</div><div class='add'>+</div><div class='add'>+Seguimiento</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+	TODO aún no traducido</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/7.AdvancedTopics.rst b/Documentation/translations/sp_SP/process/7.AdvancedTopics.rst<br/>new file mode 100644<br/>index 000000000000..553759857339<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/7.AdvancedTopics.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/7.AdvancedTopics.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/7.AdvancedTopics.rst</div><div class='add'>+</div><div class='add'>+.. _sp_development_advancedtopics:</div><div class='add'>+</div><div class='add'>+Temas avanzados</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+	TODO aún no traducido</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/8.Conclusion.rst b/Documentation/translations/sp_SP/process/8.Conclusion.rst<br/>new file mode 100644<br/>index 000000000000..dd181cb8ec9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/8.Conclusion.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/8.Conclusion.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/8.Conclusion.rst</div><div class='add'>+</div><div class='add'>+.. _sp_development_conclusion:</div><div class='add'>+</div><div class='add'>+Para más información</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+	TODO aún no traducido</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/code-of-conduct.rst b/Documentation/translations/sp_SP/process/code-of-conduct.rst<br/>index adc6c770cc37..a6c08613aefc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/code-of-conduct.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/code-of-conduct.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/code-of-conduct.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/code-of-conduct.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/code-of-conduct.rst &lt;code_of_conduct&gt;`</div><div class='del'>-:Translator: Contributor Covenant and Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Contributor Covenant and Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_code_of_conduct:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/coding-style.rst b/Documentation/translations/sp_SP/process/coding-style.rst<br/>index a37274764371..b5a84df44cea 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/coding-style.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/coding-style.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/coding-style.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/coding-style.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/coding-style.rst &lt;submittingpatches&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_codingstyle:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/development-process.rst b/Documentation/translations/sp_SP/process/development-process.rst<br/>new file mode 100644<br/>index 000000000000..40d74086f22e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/development-process.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/development-process.rst</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+.. include:: ../disclaimer-sp.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/development-process.rst</div><div class='add'>+:Translator: Avadhut Naik &lt;avadhut.naik@amd.com&gt;</div><div class='add'>+</div><div class='add'>+.. _sp_development_process_main:</div><div class='add'>+</div><div class='add'>+Guía del proceso de desarrollo del kernel</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+El propósito de este documento es ayudar a los desarrolladores (y sus</div><div class='add'>+gerentes) a trabajar con la comunidad de desarrollo con un mínimo de</div><div class='add'>+frustración. Es un intento de documentar cómo funciona esta comunidad</div><div class='add'>+de una manera accesible para aquellos que no están familiarizados</div><div class='add'>+íntimamente con el desarrollo del kernel de Linux (o, de hecho, el</div><div class='add'>+desarrollo de software libre en general). Si bien hay algo de material</div><div class='add'>+técnico aquí, este es en gran medida una discusión orientada al proceso</div><div class='add'>+que no requiere un conocimiento profundo de la programación del kernel</div><div class='add'>+para entenderla.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :caption: Contenido</div><div class='add'>+   :numbered:</div><div class='add'>+   :maxdepth: 2</div><div class='add'>+</div><div class='add'>+   1.Intro</div><div class='add'>+   2.Process</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/email-clients.rst b/Documentation/translations/sp_SP/process/email-clients.rst<br/>index fdf1e51b84e4..55d5803daf41 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/email-clients.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/email-clients.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/email-clients.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/email-clients.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/email-clients.rst &lt;email_clients&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_email_clients:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/howto.rst b/Documentation/translations/sp_SP/process/howto.rst<br/>index dd793c0f8574..72ea855ac9dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/howto.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/howto.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/howto.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/howto.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/howto.rst &lt;process_howto&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_process_howto:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/index.rst b/Documentation/translations/sp_SP/process/index.rst<br/>index 2239373b3999..4892159310ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/index.rst</a></div><div class='hunk'>@@ -28,3 +28,4 @@</div><div class='ctx'>    management-style</div><div class='ctx'>    submit-checklist</div><div class='ctx'>    howto</div><div class='add'>+   development-process</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/kernel-docs.rst b/Documentation/translations/sp_SP/process/kernel-docs.rst<br/>index 2f9b3df8f8fa..a62c6854f59b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/kernel-docs.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/kernel-docs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/kernel-docs.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/kernel-docs.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/kernel-docs.rst &lt;kernel_docs&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_kernel_docs:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/kernel-enforcement-statement.rst b/Documentation/translations/sp_SP/process/kernel-enforcement-statement.rst<br/>index d66902694089..d47a1c154610 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/kernel-enforcement-statement.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/kernel-enforcement-statement.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/kernel-enforcement-statement.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/kernel-enforcement-statement.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/kernel-enforcement-statement.rst &lt;process_statement_kernel&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_process_statement_kernel:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/magic-number.rst b/Documentation/translations/sp_SP/process/magic-number.rst<br/>index 7c7dfb4ba80b..32a99aac2f6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/magic-number.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/magic-number.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/magic-number.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/magic-number.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/magic-number.rst &lt;magicnumbers&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_magicnumbers:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/programming-language.rst b/Documentation/translations/sp_SP/process/programming-language.rst<br/>index 301f525372d8..ba2164057f45 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/programming-language.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/programming-language.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/programming-language.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/programming-language.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/programming-language.rst &lt;programming_language&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_programming_language:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/submitting-patches.rst b/Documentation/translations/sp_SP/process/submitting-patches.rst<br/>index c2757d9ab216..328ec80bd61d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/submitting-patches.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/sp_SP/process/submitting-patches.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/submitting-patches.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/sp_SP/process/submitting-patches.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. include:: ../disclaimer-sp.rst</div><div class='ctx'> </div><div class='ctx'> :Original: :ref:`Documentation/process/submitting-patches.rst &lt;submittingpatches&gt;`</div><div class='del'>-:Translator: Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+:Translator: Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> .. _sp_submittingpatches:</div><div class='ctx'> </div><div class='hunk'>@@ -356,6 +356,34 @@ Consulte Documentation/process/email-clients.rst para obtener</div><div class='ctx'> recomendaciones sobre clientes de correo electrónico y normas de etiqueta</div><div class='ctx'> en la lista de correo.</div><div class='ctx'> </div><div class='add'>+.. _sp_interleaved_replies:</div><div class='add'>+</div><div class='add'>+Uso de respuestas intercaladas recortadas en las discusiones por correo electrónico</div><div class='add'>+-----------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Se desaconseja encarecidamente la publicación en la parte superior de las</div><div class='add'>+discusiones sobre el desarrollo del kernel de Linux. Las respuestas</div><div class='add'>+intercaladas (o "en línea") hacen que las conversaciones sean mucho más</div><div class='add'>+fáciles de seguir. Para obtener más detalles, consulte:</div><div class='add'>+https://en.wikipedia.org/wiki/Posting_style#Interleaved_style</div><div class='add'>+</div><div class='add'>+Como se cita frecuentemente en la lista de correo::</div><div class='add'>+</div><div class='add'>+  A: http://en.wikipedia.org/wiki/Top_post</div><div class='add'>+  Q: ¿Dónde puedo encontrar información sobre esto que se llama top-posting?</div><div class='add'>+  A: Porque desordena el orden en el que la gente normalmente lee el texto.</div><div class='add'>+  Q: ¿Por qué es tan malo el top-posting?</div><div class='add'>+  A: Top-posting.</div><div class='add'>+  Q: ¿Qué es lo más molesto del correo electrónico?</div><div class='add'>+</div><div class='add'>+Del mismo modo, por favor, recorte todas las citas innecesarias que no</div><div class='add'>+sean relevantes para su respuesta. Esto hace que las respuestas sean más</div><div class='add'>+fáciles de encontrar y ahorra tiempo y espacio. Para obtener más</div><div class='add'>+información, consulte: http://daringfireball.net/2007/07/on_top ::</div><div class='add'>+</div><div class='add'>+  A: No.</div><div class='add'>+  Q: ¿Debo incluir citas después de mi respuesta?</div><div class='add'>+</div><div class='ctx'> .. _sp_resend_reminders:</div><div class='ctx'> </div><div class='ctx'> No se desanime o impaciente</div><div class='head'>diff --git a/Documentation/translations/zh_CN/core-api/workqueue.rst b/Documentation/translations/zh_CN/core-api/workqueue.rst<br/>index 7fac6f75d078..fe0ff5a127f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/core-api/workqueue.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/core-api/workqueue.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/core-api/workqueue.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/core-api/workqueue.rst</a></div><div class='hunk'>@@ -7,12 +7,13 @@</div><div class='ctx'> </div><div class='ctx'>  å�¸å»¶è…¾ Yanteng Si &lt;siyanteng@loongson.cn&gt;</div><div class='ctx'>  周彬彬 Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;</div><div class='add'>+ 陈兴å�‹ Xingyou Chen &lt;rockrush@rockwork.org&gt;</div><div class='ctx'> </div><div class='ctx'> .. _cn_workqueue.rst:</div><div class='ctx'> </div><div class='del'>-=========================</div><div class='del'>-并å�‘管ç�†çš„工作队列 (cmwq)</div><div class='del'>-=========================</div><div class='add'>+========</div><div class='add'>+工作队列</div><div class='add'>+========</div><div class='ctx'> </div><div class='ctx'> :日期: September, 2010</div><div class='ctx'> :作者: Tejun Heo &lt;tj@kernel.org&gt;</div><div class='hunk'>@@ -22,7 +23,7 @@</div><div class='ctx'> 简介</div><div class='ctx'> ====</div><div class='ctx'> </div><div class='del'>-在很多情况下，需è¦�一个异步进程的执行环境，工作队列（wq）API是这ç§�情况下</div><div class='add'>+在很多情况下，需è¦�一个异步的程åº�执行环境，工作队列（wq）API是这ç§�情况下</div><div class='ctx'> 最常用的机制。</div><div class='ctx'> </div><div class='ctx'> 当需è¦�这样一个异步执行上下文时，一个æ��è¿°å°†è¦�执行的函数的工作项（work，</div><div class='hunk'>@@ -34,8 +35,8 @@</div><div class='ctx'> 队列时，工作者å�ˆå¼€å§‹æ‰§è¡Œã€‚</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-为什么è¦�cmwq?</div><div class='del'>-=============</div><div class='add'>+为什么è¦�有并å�‘管ç�†å·¥ä½œé˜Ÿåˆ—?</div><div class='add'>+===========================</div><div class='ctx'> </div><div class='ctx'> 在最åˆ�çš„wq实现中，多线程（MT）wq在æ¯�个CPU上有一个工作者线程，而å�•çº¿ç¨‹</div><div class='ctx'> （ST）wq在全系统有一个工作者线程。一个MT wq需è¦�ä¿�æŒ�与CPUæ•°é‡�相å�Œçš„å·¥</div><div class='hunk'>@@ -73,9 +74,11 @@</div><div class='ctx'> å�‘该函数的工作项，并在工作队列中排队等待该工作项。（就是挂到workqueue</div><div class='ctx'> 队列里é�¢åŽ»ï¼‰</div><div class='ctx'> </div><div class='del'>-特定目的线程，称为工作线程（工作者），一个接一个地执行队列中的功能。</div><div class='del'>-如果没有工作项排队，工作者线程就会闲置。这些工作者线程被管ç�†åœ¨æ‰€è°“</div><div class='del'>-的工作者池中。</div><div class='add'>+工作项å�¯ä»¥åœ¨çº¿ç¨‹æˆ–BH(软中断)上下文中执行。</div><div class='add'>+</div><div class='add'>+对于由线程执行的工作队列，被称为（内核）工作者（[k]worker）的特殊</div><div class='add'>+线程会ä¾�次执行其中的函数。如果没有工作项排队，工作者线程就会闲置。</div><div class='add'>+这些工作者线程被管ç�†åœ¨æ‰€è°“的工作者池中。</div><div class='ctx'> </div><div class='ctx'> cmwq设计区分了é�¢å�‘用户的工作队列，å­�系统和驱动程åº�在上é�¢æŽ’队工作，</div><div class='ctx'> 以å�Šç®¡ç�†å·¥ä½œè€…池和处ç�†æŽ’队工作项的å�Žç«¯æœºåˆ¶ã€‚</div><div class='hunk'>@@ -84,6 +87,10 @@ cmwq设计区分了é�¢å�‘用户的工作队列，å­�系统和驱动程åº�在上é</div><div class='ctx'> 优先级的工作项，还有一些é¢�外的工作者池，用于æœ�务未绑定工作队列的工</div><div class='ctx'> 作项目——这些å�Žå¤‡æ± çš„æ•°é‡�是动æ€�的。</div><div class='ctx'> </div><div class='add'>+BH工作队列使用相å�Œçš„结构。然而，由于å�Œä¸€æ—¶é—´å�ªå�¯èƒ½æœ‰ä¸€ä¸ªæ‰§è¡Œä¸Šä¸‹æ–‡ï¼Œ</div><div class='add'>+ä¸�需è¦�担心并å�‘问题。æ¯�个CPU上的BH工作者池å�ªåŒ…å�«ä¸€ä¸ªç”¨äºŽè¡¨ç¤ºBH执行</div><div class='add'>+上下文的虚拟工作者。BH工作队列å�¯ä»¥è¢«çœ‹ä½œè½¯ä¸­æ–­çš„便æ�·æŽ¥å�£ã€‚</div><div class='add'>+</div><div class='ctx'> 当他们认为å�ˆé€‚的时候，å­�系统和驱动程åº�å�¯ä»¥é€šè¿‡ç‰¹æ®Šçš„</div><div class='ctx'> ``workqueue API`` 函数创建和排队工作项。他们å�¯ä»¥é€šè¿‡åœ¨å·¥ä½œé˜Ÿåˆ—上</div><div class='ctx'> 设置标志æ�¥å½±å“�工作项执行方å¼�çš„æŸ�些方é�¢ï¼Œä»–们把工作项放在那里。这些</div><div class='hunk'>@@ -95,9 +102,9 @@ cmwq设计区分了é�¢å�‘用户的工作队列，å­�系统和驱动程åº�在上é</div><div class='ctx'> å�¦åˆ™ä¸€ä¸ªç»‘定的工作队列的工作项将被排在与å�‘起线程è¿�行的CPU相关的普</div><div class='ctx'> 通或高级工作工作者池的工作项列表中。</div><div class='ctx'> </div><div class='del'>-对于任何工作者池的实施，管ç�†å¹¶å�‘水平（有多少执行上下文处于活动状</div><div class='del'>-æ€�）是一个é‡�è¦�问题。最低水平是为了节çœ�资æº�，而饱和水平是指系统被</div><div class='del'>-充分使用。</div><div class='add'>+对于任何线程池的实施，管ç�†å¹¶å�‘水平（有多少执行上下文处于活动状</div><div class='add'>+æ€�）是一个é‡�è¦�问题。cmwq试图将并å�‘ä¿�æŒ�在一个尽å�¯èƒ½ä½Žä¸”充足的</div><div class='add'>+水平。最低水平是为了节çœ�资æº�，而充足是为了使系统能被充分使用。</div><div class='ctx'> </div><div class='ctx'> æ¯�个与实际CPU绑定的worker-pool通过钩ä½�调度器æ�¥å®žçŽ°å¹¶å�‘管ç�†ã€‚æ¯�当</div><div class='ctx'> 一个活动的工作者被唤醒或ç�¡çœ æ—¶ï¼Œå·¥ä½œè€…池就会得到通知，并跟踪当å‰�å�¯</div><div class='hunk'>@@ -140,6 +147,17 @@ workqueue将自动创建与属性相匹é…�çš„å�Žå¤‡å·¥ä½œè€…池。调节并å�‘æ°</div><div class='ctx'> ``flags``</div><div class='ctx'> ---------</div><div class='ctx'> </div><div class='add'>+``WQ_BH``</div><div class='add'>+  BH工作队列å�¯ä»¥è¢«çœ‹ä½œè½¯ä¸­æ–­çš„便æ�·æŽ¥å�£ã€‚它总是æ¯�个CPU一份，</div><div class='add'>+  其中的å�„个工作项也会按在队列中的顺åº�，被所属CPU在软中断</div><div class='add'>+  上下文中执行。</div><div class='add'>+</div><div class='add'>+  BH工作队列的 ``max_active`` 值必须为0，且å�ªèƒ½å�•ç‹¬æˆ–å’Œ</div><div class='add'>+  ``WQ_HIGHPRI`` 标志组å�ˆä½¿ç”¨ã€‚</div><div class='add'>+</div><div class='add'>+  BH工作项ä¸�å�¯ä»¥ç�¡çœ ã€‚åƒ�延迟排队ã€�冲洗ã€�å�–消等所有其他特性</div><div class='add'>+  都是支æŒ�的。</div><div class='add'>+</div><div class='ctx'> ``WQ_UNBOUND``</div><div class='ctx'>   排队到é�žç»‘定wq的工作项由特殊的工作者池æ��ä¾›æœ�务，这些工作者ä¸�</div><div class='ctx'>   绑定在任何特定的CPU上。这使得wq表现得åƒ�一个简å�•çš„执行环境æ��</div><div class='hunk'>@@ -184,25 +202,21 @@ workqueue将自动创建与属性相匹é…�çš„å�Žå¤‡å·¥ä½œè€…池。调节并å�‘æ°</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='ctx'> ``@max_active`` 决定了æ¯�个CPUå�¯ä»¥åˆ†é…�ç»™wq的工作项的最大执行上</div><div class='del'>-下文数é‡�。例如，如果 ``@max_active为16`` ，æ¯�个CPU最多å�¯ä»¥å�Œ</div><div class='del'>-时执行16个wq的工作项。</div><div class='add'>+下文数é‡�。例如，如果 ``@max_active`` 为16 ，æ¯�个CPU最多å�¯ä»¥å�Œ</div><div class='add'>+时执行16个wq的工作项。它总是æ¯�CPU属性，å�³ä¾¿å¯¹äºŽæœªç»‘定 wq。</div><div class='ctx'> </div><div class='del'>-ç›®å‰�，对于一个绑定的wq， ``@max_active`` 的最大é™�制是512，当指</div><div class='del'>-定为0时使用的默认值是256。对于é�žç»‘定的wq，其é™�制是512å’Œ</div><div class='del'>-4 * ``num_possible_cpus()`` 中的较高值。这些值被选得足够高，所</div><div class='del'>-以它们ä¸�是é™�制性因素，å�Œæ—¶ä¼šåœ¨å¤±æŽ§æƒ…况下æ��ä¾›ä¿�护。</div><div class='add'>+``@max_active`` 的最大é™�制是512，当指定为0时使用的默认值是256。</div><div class='add'>+这些值被选得足够高，所以它们ä¸�是é™�制性因素，å�Œæ—¶ä¼šåœ¨å¤±æŽ§æƒ…况下æ��ä¾›</div><div class='add'>+ä¿�护。</div><div class='ctx'> </div><div class='ctx'> 一个wq的活动工作项的数é‡�通常由wq的用户æ�¥è°ƒèŠ‚，更具体地说，是由用</div><div class='ctx'> 户在å�Œä¸€æ—¶é—´å�¯ä»¥æŽ’列多少个工作项æ�¥è°ƒèŠ‚。除é�žæœ‰ç‰¹å®šçš„需求æ�¥æŽ§åˆ¶æ´»åŠ¨</div><div class='ctx'> 工作项的数é‡�，å�¦åˆ™å»ºè®®æŒ‡å®š 为"0"。</div><div class='ctx'> </div><div class='del'>-一些用户ä¾�赖于ST wq的严格执行顺åº�。 ``@max_active`` 为1å’Œ ``WQ_UNBOUND``</div><div class='del'>-的组å�ˆç”¨æ�¥å®žçŽ°è¿™ç§�行为。这ç§�wq上的工作项目总是被排到未绑定的工作池</div><div class='del'>-中，并且在任何时候都å�ªæœ‰ä¸€ä¸ªå·¥ä½œé¡¹ç›®å¤„于活动状æ€�，从而实现与ST wq相</div><div class='del'>-å�Œçš„排åº�属性。</div><div class='del'>-</div><div class='del'>-在目å‰�的实现中，上述é…�ç½®å�ªä¿�è¯�了特定NUMA节点内的ST行为。相å��，</div><div class='del'>-``alloc_ordered_workqueue()`` 应该被用æ�¥å®žçŽ°å…¨ç³»ç»Ÿçš„ST行为。</div><div class='add'>+一些用户ä¾�赖于任æ„�时刻最多å�ªæœ‰ä¸€ä¸ªå·¥ä½œé¡¹è¢«æ‰§è¡Œï¼Œä¸”å�„工作项被按队列中</div><div class='add'>+顺åº�处ç�†å¸¦æ�¥çš„严格执行顺åº�。``@max_active`` 为1å’Œ ``WQ_UNBOUND``</div><div class='add'>+的组å�ˆæ›¾è¢«ç”¨æ�¥å®žçŽ°è¿™ç§�行为，现在ä¸�用了。请使用</div><div class='add'>+``alloc_ordered_workqueue()`` 。</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 执行场景示例</div><div class='hunk'>@@ -285,7 +299,7 @@ And with cmwq with ``@max_active`` &gt;= 3, ::</div><div class='ctx'> * 除é�žæœ‰ç‰¹æ®Šéœ€è¦�，建议使用0作为@max_active。在大多数使用情</div><div class='ctx'>   况下，并å�‘水平通常ä¿�æŒ�在默认é™�制之下。</div><div class='ctx'> </div><div class='del'>-* 一个wq作为å‰�进进度ä¿�è¯�（WQ_MEM_RECLAIM，冲洗（flush）和工</div><div class='add'>+* 一个wq作为å‰�进进度ä¿�è¯�，``WQ_MEM_RECLAIM`` ，冲洗（flush）和工</div><div class='ctx'>   作项属性的域。ä¸�涉å�Šå†…存回收的工作项，ä¸�需è¦�作为工作项组的一</div><div class='ctx'>   部分被刷新，也ä¸�需è¦�任何特殊属性，å�¯ä»¥ä½¿ç”¨ç³»ç»Ÿä¸­çš„一个wq。使</div><div class='ctx'>   用专用wq和系统wq在执行特性上没有区别。</div><div class='hunk'>@@ -294,6 +308,337 @@ And with cmwq with ``@max_active`` &gt;= 3, ::</div><div class='ctx'>   益的，因为wqæ“�作和工作项执行中的定ä½�æ°´å¹³æ��高了。</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+亲和性作用域</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+一个é�žç»‘定工作队列根æ�®å…¶äº²å’Œæ€§ä½œç”¨åŸŸæ�¥å¯¹CPU进行分组以æ��高缓存</div><div class='add'>+局部性。比如如果一个工作队列使用默认的“cacheâ€�亲和性作用域，</div><div class='add'>+它将根æ�®æœ€å�Žä¸€çº§ç¼“存的边界æ�¥åˆ†ç»„处ç�†å™¨ã€‚这个工作队列上的工作项</div><div class='add'>+将被分é…�给一个与å�‘èµ·CPU共用最å�Žçº§ç¼“存的处ç�†å™¨ä¸Šçš„工作者。根æ�®</div><div class='add'>+``affinity_strict`` 的设置，工作者在å�¯åŠ¨å�Žå�¯èƒ½è¢«å…�许移出</div><div class='add'>+所在作用域，也å�¯èƒ½ä¸�被å…�许。</div><div class='add'>+</div><div class='add'>+工作队列目å‰�支æŒ�以下亲和性作用域。</div><div class='add'>+</div><div class='add'>+``default``</div><div class='add'>+  使用模å�—å�‚æ•° ``workqueue.default_affinity_scope`` 指定</div><div class='add'>+  的作用域，该å�‚数总是会被设为以下作用域中的一个。</div><div class='add'>+</div><div class='add'>+``cpu``</div><div class='add'>+  CPUä¸�被分组。一个CPU上å�‘起的工作项会被å�Œä¸€CPU上的工作者执行。</div><div class='add'>+  这使é�žç»‘定工作队列表现得åƒ�是ä¸�å�«å¹¶å�‘管ç�†çš„æ¯�CPU工作队列。</div><div class='add'>+</div><div class='add'>+``smt``</div><div class='add'>+  CPU被按SMT边界分组。这通常æ„�味ç�€æ¯�个物ç�†CPU核上的å�„逻辑CPU会</div><div class='add'>+  被分进å�Œä¸€ç»„。</div><div class='add'>+</div><div class='add'>+``cache``</div><div class='add'>+  CPU被按缓存边界分组。采用哪个缓存边界由架构代ç �决定。很多情况</div><div class='add'>+  下会使用L3。这是默认的亲和性作用域。</div><div class='add'>+</div><div class='add'>+``numa``</div><div class='add'>+  CPU被按NUMA边界分组。</div><div class='add'>+</div><div class='add'>+``system``</div><div class='add'>+  所有CPU被放在å�Œä¸€ç»„。工作队列ä¸�å°�试在临近å�‘èµ·CPUçš„CPU上è¿�è¡Œ</div><div class='add'>+  工作项。</div><div class='add'>+</div><div class='add'>+默认的亲和性作用域å�¯ä»¥è¢«æ¨¡å�—å�‚æ•° ``workqueue.default_affinity_scope``</div><div class='add'>+修改，特定工作队列的亲和性作用域å�¯ä»¥é€šè¿‡ ``apply_workqueue_attrs()``</div><div class='add'>+被更改。</div><div class='add'>+</div><div class='add'>+如果设置了 ``WQ_SYSFS`` ，工作队列会在它的 ``/sys/devices/virtual/workqueue/WQ_NAME/``</div><div class='add'>+目录中有以下亲和性作用域相关的接å�£æ–‡ä»¶ã€‚</div><div class='add'>+</div><div class='add'>+``affinity_scope``</div><div class='add'>+  读æ“�作以查看当å‰�的亲和性作用域。写æ“�作用于更改设置。</div><div class='add'>+</div><div class='add'>+  当å‰�作用域是默认值时，当å‰�生效的作用域也å�¯ä»¥è¢«ä»Žè¿™ä¸ªæ–‡ä»¶ä¸­</div><div class='add'>+  读到（å°�括å�·å†…），例如 ``default (cache)`` 。</div><div class='add'>+</div><div class='add'>+``affinity_strict``</div><div class='add'>+  默认值0表明亲和性作用域ä¸�是严格的。当一个工作项开始执行时，</div><div class='add'>+  工作队列尽é‡�å°�试使工作者处于亲和性作用域内，称为é�£è¿”。å�¯åŠ¨å�Žï¼Œ</div><div class='add'>+  调度器å�¯ä»¥è‡ªç”±åœ°å°†å·¥ä½œè€…调度到系统中任æ„�它认为å�ˆé€‚的地方去。</div><div class='add'>+  这使得在ä¿�留使用其他CPU（如果必需且有å�¯ç”¨ï¼‰èƒ½åŠ›çš„å�Œæ—¶ï¼Œ</div><div class='add'>+  还能从作用域局部性上获益。</div><div class='add'>+</div><div class='add'>+  如果设置为1，作用域内的所有工作者将被ä¿�è¯�总是处于作用域内。</div><div class='add'>+  这在跨亲和性作用域会导致如功耗ã€�负载隔离等方é�¢çš„潜在影å“�æ—¶</div><div class='add'>+  会有用。严格的NUMA作用域也å�¯ç”¨äºŽå’Œæ—§ç‰ˆå†…核中工作队列的行为</div><div class='add'>+  ä¿�æŒ�一致。</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+亲和性作用域与性能</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+如果é�žç»‘定工作队列的行为对ç»�大多数使用场景æ�¥è¯´éƒ½æ˜¯æœ€ä¼˜çš„，</div><div class='add'>+ä¸�需è¦�更多调节，就完美了。很ä¸�幸，在当å‰�内核中，é‡�度使用</div><div class='add'>+工作队列时，需è¦�在局部性和利用率间显å¼�地作一个明显的æ�ƒè¡¡ã€‚</div><div class='add'>+</div><div class='add'>+更高的局部性带æ�¥æ›´é«˜æ•ˆçŽ‡ï¼Œä¹Ÿå°±æ˜¯ç›¸å�Œæ•°é‡�çš„CPU周期内å�¯ä»¥å�š</div><div class='add'>+更多工作。然而，如果å�‘起者没能将工作项充分地分散在亲和性</div><div class='add'>+作用域间，更高的局部性也å�¯èƒ½å¸¦æ�¥æ›´ä½Žçš„整体系统利用率。以下</div><div class='add'>+dm-crypt 的性能测试清楚地é˜�明了这一å�–èˆ�。</div><div class='add'>+</div><div class='add'>+测试è¿�行在一个12æ ¸24线程ã€�4个L3缓存的处ç�†å™¨ï¼ˆAMD Ryzen</div><div class='add'>+9 3900x）上。为ä¿�æŒ�一致性，关闭CPU超频。 ``/dev/dm-0``</div><div class='add'>+是NVME SSD（三星 990 PRO）上创建，用 ``cryptsetup``</div><div class='add'>+以默认é…�置打开的一个 dm-crypt 设备。</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+场景 1: 机器上é��布ç�€æœ‰å……足的å�‘起者和工作é‡�</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+使用命令：::</div><div class='add'>+</div><div class='add'>+  $ fio --filename=/dev/dm-0 --direct=1 --rw=randrw --bs=32k --ioengine=libaio \</div><div class='add'>+    --iodepth=64 --runtime=60 --numjobs=24 --time_based --group_reporting \</div><div class='add'>+    --name=iops-test-job --verify=sha512</div><div class='add'>+</div><div class='add'>+这里有24个å�‘起者，æ¯�个å�Œæ—¶å�‘èµ·64个IO。 ``--verify=sha512``</div><div class='add'>+使得 ``fio`` æ¯�次生æˆ�和读回内容å�—å�‘起者和 ``kcryptd``</div><div class='add'>+间的执行局部性影å“�。下é�¢æ˜¯åŸºäºŽä¸�å�Œ ``kcryptd`` 的亲和性</div><div class='add'>+作用域设置，å�„ç»�过五次测试得到的读å�–带宽和CPU利用率数æ�®ã€‚</div><div class='add'>+</div><div class='add'>+.. list-table::</div><div class='add'>+   :widths: 16 20 20</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - 亲和性</div><div class='add'>+     - 带宽 (MiBps)</div><div class='add'>+     - CPU利用率（%）</div><div class='add'>+</div><div class='add'>+   * - system</div><div class='add'>+     - 1159.40 ±1.34</div><div class='add'>+     - 99.31 ±0.02</div><div class='add'>+</div><div class='add'>+   * - cache</div><div class='add'>+     - 1166.40 ±0.89</div><div class='add'>+     - 99.34 ±0.01</div><div class='add'>+</div><div class='add'>+   * - cache (strict)</div><div class='add'>+     - 1166.00 ±0.71</div><div class='add'>+     - 99.35 ±0.01</div><div class='add'>+</div><div class='add'>+在系统中分布ç�€è¶³å¤Ÿå¤šå�‘起者的情况下，ä¸�论严格与å�¦ï¼Œâ€œcacheâ€�</div><div class='add'>+没有表现得更差。三ç§�é…�ç½®å�‡ä½¿æ•´ä¸ªæœºå™¨è¾¾åˆ°é¥±å’Œï¼Œä½†ç”±äºŽæ��高了</div><div class='add'>+局部性，缓存相关的两ç§�有0.6%的（带宽）æ��å�‡ã€‚</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+场景 2: æ›´å°‘å�‘起者，足以达到饱和的工作é‡�</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+使用命令：::</div><div class='add'>+</div><div class='add'>+  $ fio --filename=/dev/dm-0 --direct=1 --rw=randrw --bs=32k \</div><div class='add'>+    --ioengine=libaio --iodepth=64 --runtime=60 --numjobs=8 \</div><div class='add'>+    --time_based --group_reporting --name=iops-test-job --verify=sha512</div><div class='add'>+</div><div class='add'>+与上一个场景唯一的区别是 ``--numjobs=8``。 å�‘起者数é‡�</div><div class='add'>+å‡�少为三分之一，但ä»�然有足以使系统达到饱和的工作总é‡�。</div><div class='add'>+</div><div class='add'>+.. list-table::</div><div class='add'>+   :widths: 16 20 20</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - 亲和性</div><div class='add'>+     - 带宽 (MiBps)</div><div class='add'>+     - CPU利用率（%）</div><div class='add'>+</div><div class='add'>+   * - system</div><div class='add'>+     - 1155.40 ±0.89</div><div class='add'>+     - 97.41 ±0.05</div><div class='add'>+</div><div class='add'>+   * - cache</div><div class='add'>+     - 1154.40 ±1.14</div><div class='add'>+     - 96.15 ±0.09</div><div class='add'>+</div><div class='add'>+   * - cache (strict)</div><div class='add'>+     - 1112.00 ±4.64</div><div class='add'>+     - 93.26 ±0.35</div><div class='add'>+</div><div class='add'>+这里有超过使系统达到饱和所需的工作é‡�。“systemâ€�和“cacheâ€�</div><div class='add'>+都接近但并未使机器完全饱和。“cacheâ€�消耗更少的CPU但更高的</div><div class='add'>+效率使其得到和“systemâ€�相å�Œçš„带宽。</div><div class='add'>+</div><div class='add'>+八个å�‘起者盘桓在四个L3缓存作用域间ä»�然å…�许“cache (strict)â€�</div><div class='add'>+几乎使机器饱和，但缺少对工作的ä¿�æŒ�（ä¸�移到空闲处ç�†å™¨ä¸Šï¼‰</div><div class='add'>+开始带æ�¥3.7%的带宽æ�Ÿå¤±ã€‚</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+场景 3: æ›´å°‘å�‘起者，ä¸�充足的工作é‡�</div><div class='add'>+----------------------------------</div><div class='add'>+</div><div class='add'>+使用命令：::</div><div class='add'>+</div><div class='add'>+  $ fio --filename=/dev/dm-0 --direct=1 --rw=randrw --bs=32k \</div><div class='add'>+    --ioengine=libaio --iodepth=64 --runtime=60 --numjobs=4 \</div><div class='add'>+    --time_based --group_reporting --name=iops-test-job --verify=sha512</div><div class='add'>+</div><div class='add'>+å†�次，唯一的区别是 ``--numjobs=4``。由于å�‘起者å‡�少到四个，</div><div class='add'>+现在没有足以使系统饱和的工作é‡�，带宽å�˜å¾—ä¾�赖于完æˆ�时延。</div><div class='add'>+</div><div class='add'>+.. list-table::</div><div class='add'>+   :widths: 16 20 20</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - 亲和性</div><div class='add'>+     - 带宽 (MiBps)</div><div class='add'>+     - CPU利用率（%）</div><div class='add'>+</div><div class='add'>+   * - system</div><div class='add'>+     - 993.60 ±1.82</div><div class='add'>+     - 75.49 ±0.06</div><div class='add'>+</div><div class='add'>+   * - cache</div><div class='add'>+     - 973.40 ±1.52</div><div class='add'>+     - 74.90 ±0.07</div><div class='add'>+</div><div class='add'>+   * - cache (strict)</div><div class='add'>+     - 828.20 ±4.49</div><div class='add'>+     - 66.84 ±0.29</div><div class='add'>+</div><div class='add'>+现在，局部性和利用率间的æ�ƒè¡¡æ›´æ¸…晰了。“cacheâ€�展示出相比</div><div class='add'>+“systemâ€�2%的带宽æ�Ÿå¤±ï¼Œè€Œâ€œcache (strict)â€�跌到20%。</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+结论和建议</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+在以上试验中，虽然一致并且也明显，但“cacheâ€�亲和性作用域</div><div class='add'>+相比“systemâ€�的性能优势并ä¸�大。然而，这影å“�是ä¾�赖于作用域</div><div class='add'>+é—´è·�离的，在更å¤�æ�‚的处ç�†å™¨æ‹“扑下å�¯èƒ½æœ‰æ›´æ˜Žæ˜¾çš„å½±å“�。</div><div class='add'>+</div><div class='add'>+虽然这些情形下缺少工作ä¿�æŒ�是有å��处的，但比“cache (strict)â€�</div><div class='add'>+好多了，而且最大化工作队列利用率的需求也并ä¸�常è§�。因此，</div><div class='add'>+“cacheâ€�是é�žç»‘定池的默认亲和性作用域。</div><div class='add'>+</div><div class='add'>+* 由于ä¸�存在一个适用于大多数场景的选择，对于å�¯èƒ½éœ€è¦�消耗</div><div class='add'>+  大é‡�CPU的工作队列，建议通过 ``apply_workqueue_attrs()``</div><div class='add'>+  进行（专门）é…�置，并考虑是å�¦å�¯ç”¨ ``WQ_SYSFS``。</div><div class='add'>+</div><div class='add'>+* 设置了严格“cpuâ€�亲和性作用域的é�žç»‘定工作队列，它的行为与</div><div class='add'>+  ``WQ_CPU_INTENSIVE`` æ¯�CPU工作队列一样。å�Žè€…没有真正</div><div class='add'>+  优势，而å‰�者æ��供了大幅度的ç�µæ´»æ€§ã€‚</div><div class='add'>+</div><div class='add'>+* 亲和性作用域是从Linux v6.5起引入的。为了模拟旧版行为，</div><div class='add'>+  å�¯ä»¥ä½¿ç”¨ä¸¥æ ¼çš„“numaâ€�亲和性作用域。</div><div class='add'>+</div><div class='add'>+* ä¸�严格的亲和性作用域中，缺少工作ä¿�æŒ�大概缘于调度器。内核</div><div class='add'>+  为什么没能维护好大多数场景下的工作ä¿�æŒ�，把事情作对，还没有</div><div class='add'>+  ç�†è®ºä¸Šçš„解释。因此，未æ�¥è°ƒåº¦å™¨çš„改进å�¯èƒ½ä¼šä½¿æˆ‘们ä¸�å†�需è¦�</div><div class='add'>+  这些调节项。</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+检查é…�ç½®</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+使用 tools/workqueue/wq_dump.py（drgn脚本） æ�¥æ£€æŸ¥æœª</div><div class='add'>+绑定CPU的亲和性é…�置，工作者池，以å�Šå·¥ä½œé˜Ÿåˆ—如何映射到池上: ::</div><div class='add'>+</div><div class='add'>+  $ tools/workqueue/wq_dump.py</div><div class='add'>+  Affinity Scopes</div><div class='add'>+  ===============</div><div class='add'>+  wq_unbound_cpumask=0000000f</div><div class='add'>+</div><div class='add'>+  CPU</div><div class='add'>+    nr_pods  4</div><div class='add'>+    pod_cpus [0]=00000001 [1]=00000002 [2]=00000004 [3]=00000008</div><div class='add'>+    pod_node [0]=0 [1]=0 [2]=1 [3]=1</div><div class='add'>+    cpu_pod  [0]=0 [1]=1 [2]=2 [3]=3</div><div class='add'>+</div><div class='add'>+  SMT</div><div class='add'>+    nr_pods  4</div><div class='add'>+    pod_cpus [0]=00000001 [1]=00000002 [2]=00000004 [3]=00000008</div><div class='add'>+    pod_node [0]=0 [1]=0 [2]=1 [3]=1</div><div class='add'>+    cpu_pod  [0]=0 [1]=1 [2]=2 [3]=3</div><div class='add'>+</div><div class='add'>+  CACHE (default)</div><div class='add'>+    nr_pods  2</div><div class='add'>+    pod_cpus [0]=00000003 [1]=0000000c</div><div class='add'>+    pod_node [0]=0 [1]=1</div><div class='add'>+    cpu_pod  [0]=0 [1]=0 [2]=1 [3]=1</div><div class='add'>+</div><div class='add'>+  NUMA</div><div class='add'>+    nr_pods  2</div><div class='add'>+    pod_cpus [0]=00000003 [1]=0000000c</div><div class='add'>+    pod_node [0]=0 [1]=1</div><div class='add'>+    cpu_pod  [0]=0 [1]=0 [2]=1 [3]=1</div><div class='add'>+</div><div class='add'>+  SYSTEM</div><div class='add'>+    nr_pods  1</div><div class='add'>+    pod_cpus [0]=0000000f</div><div class='add'>+    pod_node [0]=-1</div><div class='add'>+    cpu_pod  [0]=0 [1]=0 [2]=0 [3]=0</div><div class='add'>+</div><div class='add'>+  Worker Pools</div><div class='add'>+  ============</div><div class='add'>+  pool[00] ref= 1 nice=  0 idle/workers=  4/  4 cpu=  0</div><div class='add'>+  pool[01] ref= 1 nice=-20 idle/workers=  2/  2 cpu=  0</div><div class='add'>+  pool[02] ref= 1 nice=  0 idle/workers=  4/  4 cpu=  1</div><div class='add'>+  pool[03] ref= 1 nice=-20 idle/workers=  2/  2 cpu=  1</div><div class='add'>+  pool[04] ref= 1 nice=  0 idle/workers=  4/  4 cpu=  2</div><div class='add'>+  pool[05] ref= 1 nice=-20 idle/workers=  2/  2 cpu=  2</div><div class='add'>+  pool[06] ref= 1 nice=  0 idle/workers=  3/  3 cpu=  3</div><div class='add'>+  pool[07] ref= 1 nice=-20 idle/workers=  2/  2 cpu=  3</div><div class='add'>+  pool[08] ref=42 nice=  0 idle/workers=  6/  6 cpus=0000000f</div><div class='add'>+  pool[09] ref=28 nice=  0 idle/workers=  3/  3 cpus=00000003</div><div class='add'>+  pool[10] ref=28 nice=  0 idle/workers= 17/ 17 cpus=0000000c</div><div class='add'>+  pool[11] ref= 1 nice=-20 idle/workers=  1/  1 cpus=0000000f</div><div class='add'>+  pool[12] ref= 2 nice=-20 idle/workers=  1/  1 cpus=00000003</div><div class='add'>+  pool[13] ref= 2 nice=-20 idle/workers=  1/  1 cpus=0000000c</div><div class='add'>+</div><div class='add'>+  Workqueue CPU -&gt; pool</div><div class='add'>+  =====================</div><div class='add'>+  [    workqueue \ CPU              0  1  2  3 dfl]</div><div class='add'>+  events                   percpu   0  2  4  6</div><div class='add'>+  events_highpri           percpu   1  3  5  7</div><div class='add'>+  events_long              percpu   0  2  4  6</div><div class='add'>+  events_unbound           unbound  9  9 10 10  8</div><div class='add'>+  events_freezable         percpu   0  2  4  6</div><div class='add'>+  events_power_efficient   percpu   0  2  4  6</div><div class='add'>+  events_freezable_power_  percpu   0  2  4  6</div><div class='add'>+  rcu_gp                   percpu   0  2  4  6</div><div class='add'>+  rcu_par_gp               percpu   0  2  4  6</div><div class='add'>+  slub_flushwq             percpu   0  2  4  6</div><div class='add'>+  netns                    ordered  8  8  8  8  8</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+å�‚è§�命令的帮助消æ�¯ä»¥èŽ·å�–更多信æ�¯ã€‚</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+监视</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+使用 tools/workqueue/wq_monitor.py æ�¥ç›‘视工作队列的è¿�行： ::</div><div class='add'>+</div><div class='add'>+  $ tools/workqueue/wq_monitor.py events</div><div class='add'>+                              total  infl  CPUtime  CPUhog CMW/RPR  mayday rescued</div><div class='add'>+  events                      18545     0      6.1       0       5       -       -</div><div class='add'>+  events_highpri                  8     0      0.0       0       0       -       -</div><div class='add'>+  events_long                     3     0      0.0       0       0       -       -</div><div class='add'>+  events_unbound              38306     0      0.1       -       7       -       -</div><div class='add'>+  events_freezable                0     0      0.0       0       0       -       -</div><div class='add'>+  events_power_efficient      29598     0      0.2       0       0       -       -</div><div class='add'>+  events_freezable_power_        10     0      0.0       0       0       -       -</div><div class='add'>+  sock_diag_events                0     0      0.0       0       0       -       -</div><div class='add'>+</div><div class='add'>+                              total  infl  CPUtime  CPUhog CMW/RPR  mayday rescued</div><div class='add'>+  events                      18548     0      6.1       0       5       -       -</div><div class='add'>+  events_highpri                  8     0      0.0       0       0       -       -</div><div class='add'>+  events_long                     3     0      0.0       0       0       -       -</div><div class='add'>+  events_unbound              38322     0      0.1       -       7       -       -</div><div class='add'>+  events_freezable                0     0      0.0       0       0       -       -</div><div class='add'>+  events_power_efficient      29603     0      0.2       0       0       -       -</div><div class='add'>+  events_freezable_power_        10     0      0.0       0       0       -       -</div><div class='add'>+  sock_diag_events                0     0      0.0       0       0       -       -</div><div class='add'>+</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+å�‚è§�命令的帮助消æ�¯ä»¥èŽ·å�–更多信æ�¯ã€‚</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 调试</div><div class='ctx'> ====</div><div class='ctx'> </div><div class='hunk'>@@ -330,7 +675,6 @@ And with cmwq with ``@max_active`` &gt;= 3, ::</div><div class='ctx'> </div><div class='ctx'> 工作队列ä¿�è¯�，如果在工作项排队å�Žæ»¡è¶³ä»¥ä¸‹æ�¡ä»¶ï¼Œåˆ™å·¥ä½œé¡¹ä¸�能é‡�入：</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'>         1. 工作函数没有被改å�˜ã€‚</div><div class='ctx'>         2. 没有人将该工作项排到å�¦ä¸€ä¸ªå·¥ä½œé˜Ÿåˆ—中。</div><div class='ctx'>         3. 该工作项尚未被é‡�æ–°å�¯åŠ¨ã€‚</div><div class='head'>diff --git a/Documentation/translations/zh_CN/dev-tools/index.rst b/Documentation/translations/zh_CN/dev-tools/index.rst<br/>index c2db3e566b1b..fa900f5beb68 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/dev-tools/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/dev-tools/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/dev-tools/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/dev-tools/index.rst</a></div><div class='hunk'>@@ -22,14 +22,14 @@ Documentation/translations/zh_CN/dev-tools/testing-overview.rst</div><div class='ctx'>    sparse</div><div class='ctx'>    gcov</div><div class='ctx'>    kasan</div><div class='add'>+   kcov</div><div class='add'>+   ubsan</div><div class='add'>+   kmemleak</div><div class='ctx'>    gdb-kernel-debugging</div><div class='ctx'> </div><div class='ctx'> Todolist:</div><div class='ctx'> </div><div class='ctx'>  - coccinelle</div><div class='del'>- - kcov</div><div class='del'>- - ubsan</div><div class='del'>- - kmemleak</div><div class='ctx'>  - kcsan</div><div class='ctx'>  - kfence</div><div class='ctx'>  - kgdb</div><div class='head'>diff --git a/Documentation/translations/zh_CN/dev-tools/kcov.rst b/Documentation/translations/zh_CN/dev-tools/kcov.rst<br/>new file mode 100644<br/>index 000000000000..629154df7121<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/dev-tools/kcov.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/dev-tools/kcov.rst</a></div><div class='hunk'>@@ -0,0 +1,359 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. include:: ../disclaimer-zh_CN.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/dev-tools/kcov.rst</div><div class='add'>+:Translator: 刘浩阳 Haoyang Liu &lt;tttturtleruss@hust.edu.cn&gt;</div><div class='add'>+</div><div class='add'>+KCOV: 用于模糊测试的代ç �覆盖率</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+KCOV 以一ç§�适用于覆盖率引导的模糊测试的形å¼�收集和暴露内核代ç �覆盖率信æ�¯ã€‚</div><div class='add'>+一个正在è¿�行的内核的覆盖率数æ�®å�¯ä»¥é€šè¿‡ ``kcov`` 调试文件导出。覆盖率的收集是基</div><div class='add'>+于任务å�¯ç”¨çš„，因此 KCOV å�¯ä»¥ç²¾ç¡®æ�•èŽ·å�•ä¸ªç³»ç»Ÿè°ƒç”¨çš„覆盖率。</div><div class='add'>+</div><div class='add'>+è¦�注æ„�的是 KCOV ä¸�是为了收集尽å�¯èƒ½å¤šçš„覆盖率数æ�®ã€‚而是为了收集相对稳定的覆盖率</div><div class='add'>+，这是系统调用输入的函数。为了完æˆ�这个目标，它ä¸�收集软硬中断的覆盖率（除é�žç§»é™¤</div><div class='add'>+覆盖率收集被å�¯ç”¨ï¼Œè§�下文）以å�Šå†…核中固有的ä¸�确定部分的覆盖率（如调度器，é”�定）</div><div class='add'>+</div><div class='add'>+除了收集代ç �覆盖率，KCOV 还收集æ“�作数比较的覆盖率。è§� "æ“�作数比较收集" 一节</div><div class='add'>+查看详细信æ�¯ã€‚</div><div class='add'>+</div><div class='add'>+除了从系统调用处ç�†å™¨æ”¶é›†è¦†ç›–率数æ�®ï¼ŒKCOV 还从å�Žå�°å†…核或软中断任务中执行的内核</div><div class='add'>+被标注的部分收集覆盖率。è§� "远程覆盖率收集" 一节查看详细信æ�¯ã€‚</div><div class='add'>+</div><div class='add'>+先决æ�¡ä»¶</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+KCOV ä¾�赖编译器æ�’桩，è¦�求 GCC 6.1.0 å�Šæ›´é«˜ç‰ˆæœ¬æˆ–者内核支æŒ�çš„ä»»æ„�版本的 Clang。</div><div class='add'>+</div><div class='add'>+收集æ“�作数比较的覆盖率需è¦� GCC 8+ 或者 Clang。</div><div class='add'>+</div><div class='add'>+为了å�¯ç”¨ KCOV，需è¦�使用如下å�‚æ•°é…�置内核::</div><div class='add'>+</div><div class='add'>+        CONFIG_KCOV=y</div><div class='add'>+</div><div class='add'>+为了å�¯ç”¨æ“�作数比较覆盖率的收集，使用如下å�‚æ•°::</div><div class='add'>+</div><div class='add'>+    CONFIG_KCOV_ENABLE_COMPARISONS=y</div><div class='add'>+</div><div class='add'>+覆盖率数æ�®å�ªä¼šåœ¨è°ƒè¯•æ–‡ä»¶ç³»ç»Ÿè¢«æŒ‚è½½å�Žæ‰�å�¯ä»¥èŽ·å�–::</div><div class='add'>+</div><div class='add'>+        mount -t debugfs none /sys/kernel/debug</div><div class='add'>+</div><div class='add'>+覆盖率收集</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+下é�¢çš„程åº�演示了如何使用 KCOV 在一个测试程åº�中收集å�•ä¸ªç³»ç»Ÿè°ƒç”¨çš„覆盖率：</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    #include &lt;stdio.h&gt;</div><div class='add'>+    #include &lt;stddef.h&gt;</div><div class='add'>+    #include &lt;stdint.h&gt;</div><div class='add'>+    #include &lt;stdlib.h&gt;</div><div class='add'>+    #include &lt;sys/types.h&gt;</div><div class='add'>+    #include &lt;sys/stat.h&gt;</div><div class='add'>+    #include &lt;sys/ioctl.h&gt;</div><div class='add'>+    #include &lt;sys/mman.h&gt;</div><div class='add'>+    #include &lt;unistd.h&gt;</div><div class='add'>+    #include &lt;fcntl.h&gt;</div><div class='add'>+    #include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+    #define KCOV_INIT_TRACE			_IOR('c', 1, unsigned long)</div><div class='add'>+    #define KCOV_ENABLE			_IO('c', 100)</div><div class='add'>+    #define KCOV_DISABLE			_IO('c', 101)</div><div class='add'>+    #define COVER_SIZE			(64&lt;&lt;10)</div><div class='add'>+</div><div class='add'>+    #define KCOV_TRACE_PC  0</div><div class='add'>+    #define KCOV_TRACE_CMP 1</div><div class='add'>+</div><div class='add'>+    int main(int argc, char **argv)</div><div class='add'>+    {</div><div class='add'>+	int fd;</div><div class='add'>+	unsigned long *cover, n, i;</div><div class='add'>+</div><div class='add'>+	/* å�•ä¸ªæ–‡ä»¶æ��述符å…�许</div><div class='add'>+	 * 在å�•çº¿ç¨‹ä¸Šæ”¶é›†è¦†ç›–率。</div><div class='add'>+	 */</div><div class='add'>+	fd = open("/sys/kernel/debug/kcov", O_RDWR);</div><div class='add'>+	if (fd == -1)</div><div class='add'>+		perror("open"), exit(1);</div><div class='add'>+	/* 设置跟踪模å¼�和跟踪大å°�。 */</div><div class='add'>+	if (ioctl(fd, KCOV_INIT_TRACE, COVER_SIZE))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	/* 映射内核空间和用户空间共享的缓冲区。 */</div><div class='add'>+	cover = (unsigned long*)mmap(NULL, COVER_SIZE * sizeof(unsigned long),</div><div class='add'>+				     PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);</div><div class='add'>+	if ((void*)cover == MAP_FAILED)</div><div class='add'>+		perror("mmap"), exit(1);</div><div class='add'>+	/* 在当å‰�线程中å�¯ç”¨è¦†ç›–率收集。 */</div><div class='add'>+	if (ioctl(fd, KCOV_ENABLE, KCOV_TRACE_PC))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	/* 在调用 ioctl() 之å�Žé‡�置覆盖率。 */</div><div class='add'>+	__atomic_store_n(&amp;cover[0], 0, __ATOMIC_RELAXED);</div><div class='add'>+	/* 调用目标系统调用。 */</div><div class='add'>+	read(-1, NULL, 0);</div><div class='add'>+	/* 读å�–收集到的 PC 的数目。 */</div><div class='add'>+	n = __atomic_load_n(&amp;cover[0], __ATOMIC_RELAXED);</div><div class='add'>+	for (i = 0; i &lt; n; i++)</div><div class='add'>+		printf("0x%lx\n", cover[i + 1]);</div><div class='add'>+	/* 在当å‰�线程上ç¦�用覆盖率收集。在这之å�Ž</div><div class='add'>+	 * å�¯ä»¥åœ¨å…¶ä»–线程上收集覆盖率</div><div class='add'>+	 */</div><div class='add'>+	if (ioctl(fd, KCOV_DISABLE, 0))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	/* 释放资æº� */</div><div class='add'>+	if (munmap(cover, COVER_SIZE * sizeof(unsigned long)))</div><div class='add'>+		perror("munmap"), exit(1);</div><div class='add'>+	if (close(fd))</div><div class='add'>+		perror("close"), exit(1);</div><div class='add'>+	return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+在使用 ``addr2line`` 传输å�Žï¼Œç¨‹åº�输出应该如下所示::</div><div class='add'>+</div><div class='add'>+    SyS_read</div><div class='add'>+    fs/read_write.c:562</div><div class='add'>+    __fdget_pos</div><div class='add'>+    fs/file.c:774</div><div class='add'>+    __fget_light</div><div class='add'>+    fs/file.c:746</div><div class='add'>+    __fget_light</div><div class='add'>+    fs/file.c:750</div><div class='add'>+    __fget_light</div><div class='add'>+    fs/file.c:760</div><div class='add'>+    __fdget_pos</div><div class='add'>+    fs/file.c:784</div><div class='add'>+    SyS_read</div><div class='add'>+    fs/read_write.c:562</div><div class='add'>+</div><div class='add'>+如果一个程åº�需è¦�从多个线程收集覆盖率（独立地）。那么æ¯�个线程都需è¦�å�•ç‹¬æ‰“å¼€</div><div class='add'>+``/sys/kernel/debug/kcov``。</div><div class='add'>+</div><div class='add'>+接å�£çš„细粒度å…�许高效的创建测试进程。å�³ï¼Œä¸€ä¸ªçˆ¶è¿›ç¨‹æ‰“开了</div><div class='add'>+``/sys/kernel/debug/kcov``，å�¯ç”¨äº†è¿½è¸ªæ¨¡å¼�，映射了覆盖率缓冲区，然å�Žåœ¨ä¸€ä¸ªå¾ª</div><div class='add'>+环中创建了å­�进程。这个å­�进程å�ªéœ€è¦�å�¯ç”¨è¦†ç›–率收集å�³å�¯ï¼ˆå½“一个线程退出时将自动ç¦�</div><div class='add'>+用覆盖率收集）。</div><div class='add'>+</div><div class='add'>+æ“�作数比较收集</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+æ“�作数比较收集和覆盖率收集类似：</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    /* 包å�«å’Œä¸Šæ–‡ä¸€æ ·çš„头文件和å®�定义。 */</div><div class='add'>+</div><div class='add'>+    /* æ¯�次记录的 64 ä½�å­—çš„æ•°é‡�。 */</div><div class='add'>+    #define KCOV_WORDS_PER_CMP 4</div><div class='add'>+</div><div class='add'>+    /*</div><div class='add'>+     * 收集的比较ç§�类的格å¼�。</div><div class='add'>+     *</div><div class='add'>+     * 0 比特表示是å�¦æ˜¯ä¸€ä¸ªç¼–译时常é‡�。</div><div class='add'>+     * 1 &amp; 2 比特包å�«å�‚数大å°�çš„ log2 值，最大 8 字节。</div><div class='add'>+     */</div><div class='add'>+</div><div class='add'>+    #define KCOV_CMP_CONST          (1 &lt;&lt; 0)</div><div class='add'>+    #define KCOV_CMP_SIZE(n)        ((n) &lt;&lt; 1)</div><div class='add'>+    #define KCOV_CMP_MASK           KCOV_CMP_SIZE(3)</div><div class='add'>+</div><div class='add'>+    int main(int argc, char **argv)</div><div class='add'>+    {</div><div class='add'>+	int fd;</div><div class='add'>+	uint64_t *cover, type, arg1, arg2, is_const, size;</div><div class='add'>+	unsigned long n, i;</div><div class='add'>+</div><div class='add'>+	fd = open("/sys/kernel/debug/kcov", O_RDWR);</div><div class='add'>+	if (fd == -1)</div><div class='add'>+		perror("open"), exit(1);</div><div class='add'>+	if (ioctl(fd, KCOV_INIT_TRACE, COVER_SIZE))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	/*</div><div class='add'>+	* 注æ„�缓冲区指针的类型是 uint64_t*，因为所有的</div><div class='add'>+	* 比较æ“�作数都被æ��å�‡ä¸º uint64_t 类型。</div><div class='add'>+	*/</div><div class='add'>+	cover = (uint64_t *)mmap(NULL, COVER_SIZE * sizeof(unsigned long),</div><div class='add'>+				     PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);</div><div class='add'>+	if ((void*)cover == MAP_FAILED)</div><div class='add'>+		perror("mmap"), exit(1);</div><div class='add'>+	/* 注æ„�这里是 KCOV_TRACE_CMP 而ä¸�是 KCOV_TRACE_PC。 */</div><div class='add'>+	if (ioctl(fd, KCOV_ENABLE, KCOV_TRACE_CMP))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	__atomic_store_n(&amp;cover[0], 0, __ATOMIC_RELAXED);</div><div class='add'>+	read(-1, NULL, 0);</div><div class='add'>+	/* 读å�–收集到的比较æ“�作数的数é‡�。 */</div><div class='add'>+	n = __atomic_load_n(&amp;cover[0], __ATOMIC_RELAXED);</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		uint64_t ip;</div><div class='add'>+</div><div class='add'>+		type = cover[i * KCOV_WORDS_PER_CMP + 1];</div><div class='add'>+		/* arg1 å’Œ arg2 - 比较的两个æ“�作数。 */</div><div class='add'>+		arg1 = cover[i * KCOV_WORDS_PER_CMP + 2];</div><div class='add'>+		arg2 = cover[i * KCOV_WORDS_PER_CMP + 3];</div><div class='add'>+		/* ip - 调用者的地å�€ã€‚ */</div><div class='add'>+		ip = cover[i * KCOV_WORDS_PER_CMP + 4];</div><div class='add'>+		/* æ“�作数的大å°�。 */</div><div class='add'>+		size = 1 &lt;&lt; ((type &amp; KCOV_CMP_MASK) &gt;&gt; 1);</div><div class='add'>+		/* is_const - 当æ“�作数是一个编译时常é‡�时为真。*/</div><div class='add'>+		is_const = type &amp; KCOV_CMP_CONST;</div><div class='add'>+		printf("ip: 0x%lx type: 0x%lx, arg1: 0x%lx, arg2: 0x%lx, "</div><div class='add'>+			"size: %lu, %s\n",</div><div class='add'>+			ip, type, arg1, arg2, size,</div><div class='add'>+		is_const ? "const" : "non-const");</div><div class='add'>+	}</div><div class='add'>+	if (ioctl(fd, KCOV_DISABLE, 0))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	/* 释放资æº�。 */</div><div class='add'>+	if (munmap(cover, COVER_SIZE * sizeof(unsigned long)))</div><div class='add'>+		perror("munmap"), exit(1);</div><div class='add'>+	if (close(fd))</div><div class='add'>+		perror("close"), exit(1);</div><div class='add'>+	return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+注æ„� KCOV 的模å¼�（代ç �覆盖率收集或æ“�作数比较收集）是互斥的。</div><div class='add'>+</div><div class='add'>+远程覆盖率收集</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+除了从用户空间进程å�‘布的系统调用å�¥æŸ„收集覆盖率数æ�®ä»¥å¤–，KCOV 也å�¯ä»¥ä»Žéƒ¨åˆ†åœ¨å…¶</div><div class='add'>+他上下文中执行的内核中收集覆盖率 - 称为“远程â€�覆盖率。</div><div class='add'>+</div><div class='add'>+使用 KCOV 收集远程覆盖率è¦�求：</div><div class='add'>+</div><div class='add'>+1. 修改内核æº�ç �并使用 ``kcov_remote_start`` å’Œ ``kcov_remote_stop`` æ�¥æ ‡æ³¨è¦�收集</div><div class='add'>+   覆盖率的代ç �片段。</div><div class='add'>+</div><div class='add'>+2. 在用户空间的收集覆盖率的进程应使用 ``KCOV_REMOTE_ENABLE`` 而ä¸�是 ``KCOV_ENABLE``。</div><div class='add'>+</div><div class='add'>+``kcov_remote_start`` å’Œ ``kcov_remote_stop`` 的标注以å�Š ``KCOV_REMOTE_ENABLE``</div><div class='add'>+ioctl 都接å�—å�¯ä»¥è¯†åˆ«ç‰¹å®šè¦†ç›–率收集片段的å�¥æŸ„。å�¥æŸ„的使用方å¼�å�–决于匹é…�代ç �片段执</div><div class='add'>+行的上下文。</div><div class='add'>+</div><div class='add'>+KCOV 支æŒ�在如下上下文中收集远程覆盖率：</div><div class='add'>+</div><div class='add'>+1. 全局内核å�Žå�°ä»»åŠ¡ã€‚这些任务是内核å�¯åŠ¨æ—¶åˆ›å»ºçš„æ•°é‡�有é™�的实例（如，æ¯�一个</div><div class='add'>+   USB HCD 产生一个 USB ``hub_event`` 工作器）。</div><div class='add'>+</div><div class='add'>+2. 局部内核å�Žå�°ä»»åŠ¡ã€‚这些任务通常是由于用户空间进程与æŸ�些内核接å�£è¿›è¡Œäº¤äº’时产</div><div class='add'>+   生的，并且通常在进程退出时会被å�œæ­¢ï¼ˆå¦‚，vhost 工作器）。</div><div class='add'>+</div><div class='add'>+3. 软中断。</div><div class='add'>+</div><div class='add'>+对于 #1 å’Œ #3，必须选择一个独特的全局å�¥æŸ„并将其传递给对应的</div><div class='add'>+``kcov_remote_start`` 调用。一个用户空间进程必须将该å�¥æŸ„存储在</div><div class='add'>+``kcov_remote_arg`` 结构体的 ``handle`` 数组字段中并将其传递给</div><div class='add'>+``KCOV_REMOTE_ENABLE``。这会将使用的 KCOV 设备附加到由此å�¥æŸ„引用的代ç �片段。多个全局</div><div class='add'>+å�¥æŸ„标识的ä¸�å�Œä»£ç �片段å�¯ä»¥ä¸€æ¬¡æ€§ä¼ é€’。</div><div class='add'>+</div><div class='add'>+对于 #2，用户空间进程必须通过 ``kcov_remote_arg`` 结构体的 ``common_handle`` 字段</div><div class='add'>+传递一个é�žé›¶å�¥æŸ„。这个通用å�¥æŸ„将会被ä¿�存在当å‰� ``task_struct`` 结构体的</div><div class='add'>+``kcov_handle`` 字段中并且需è¦�通过自定义内核代ç �的修改æ�¥ä¼ é€’给新创建的本地任务</div><div class='add'>+。这些任务需è¦�在 ``kcov_remote_start`` å’Œ ``kcov_remote_stop`` 标注中ä¾�次使用传递过æ�¥çš„</div><div class='add'>+å�¥æŸ„。</div><div class='add'>+</div><div class='add'>+KCOV 对全局å�¥æŸ„和通用å�¥æŸ„å�‡é�µå¾ªä¸€ä¸ªé¢„定义的格å¼�。æ¯�一个å�¥æŸ„都是一个 ``u64`` æ•´å½¢</div><div class='add'>+。当å‰�，å�ªæœ‰æœ€é«˜ä½�和低四ä½�字节被使用。第 4-7 字节是ä¿�ç•™ä½�并且值必须为 0。</div><div class='add'>+</div><div class='add'>+对于全局å�¥æŸ„，最高ä½�的字节表示该å�¥æŸ„属于的å­�系统的标识。比如，KCOV 使用 ``1``</div><div class='add'>+表示 USB å­�系统类型。全局å�¥æŸ„的低 4 字节表示å­�系统中任务实例的标识。比如，æ¯�一</div><div class='add'>+个 ``hub_event`` 工作器使用 USB 总线å�·ä½œä¸ºä»»åŠ¡å®žä¾‹çš„标识。</div><div class='add'>+</div><div class='add'>+对于通用å�¥æŸ„，使用一个ä¿�留值 ``0`` 作为å­�系统标识，因为这些å�¥æŸ„ä¸�属于一个特定</div><div class='add'>+çš„å­�系统。通用å�¥æŸ„的低 4 字节用于识别有用户进程生æˆ�的所有本地å�¥æŸ„的集å�ˆå®žä¾‹ï¼Œ</div><div class='add'>+该进程将通用å�¥æŸ„传递给 ``KCOV_REMOTE_ENABLE``。</div><div class='add'>+</div><div class='add'>+实际上，如果å�ªä»Žç³»ç»Ÿä¸­çš„å�•ä¸ªç”¨æˆ·ç©ºé—´è¿›ç¨‹æ”¶é›†è¦†ç›–率，那么å�¯ä»¥ä½¿ç”¨ä»»æ„�值作为通用</div><div class='add'>+å�¥æŸ„的实例标识。然而，如果通用å�¥æŸ„被多个用户空间进程使用，æ¯�个进程必须使用唯一</div><div class='add'>+的实例标识。一个选择是使用进程标识作为通用å�¥æŸ„实例的标识。</div><div class='add'>+</div><div class='add'>+下é�¢çš„程åº�演示了如何使用 KCOV 从一个由进程产生的本地任务和处ç�† USB 总线的全局</div><div class='add'>+任务 #1 收集覆盖率：</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    /* 包å�«å’Œä¸Šæ–‡ä¸€æ ·çš„头文件和å®�定义。 */</div><div class='add'>+</div><div class='add'>+    struct kcov_remote_arg {</div><div class='add'>+	__u32		trace_mode;</div><div class='add'>+	__u32		area_size;</div><div class='add'>+	__u32		num_handles;</div><div class='add'>+	__aligned_u64	common_handle;</div><div class='add'>+	__aligned_u64	handles[0];</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    #define KCOV_INIT_TRACE			_IOR('c', 1, unsigned long)</div><div class='add'>+    #define KCOV_DISABLE			_IO('c', 101)</div><div class='add'>+    #define KCOV_REMOTE_ENABLE		_IOW('c', 102, struct kcov_remote_arg)</div><div class='add'>+</div><div class='add'>+    #define COVER_SIZE	(64 &lt;&lt; 10)</div><div class='add'>+</div><div class='add'>+    #define KCOV_TRACE_PC	0</div><div class='add'>+</div><div class='add'>+    #define KCOV_SUBSYSTEM_COMMON	(0x00ull &lt;&lt; 56)</div><div class='add'>+    #define KCOV_SUBSYSTEM_USB	(0x01ull &lt;&lt; 56)</div><div class='add'>+</div><div class='add'>+    #define KCOV_SUBSYSTEM_MASK	(0xffull &lt;&lt; 56)</div><div class='add'>+    #define KCOV_INSTANCE_MASK	(0xffffffffull)</div><div class='add'>+</div><div class='add'>+    static inline __u64 kcov_remote_handle(__u64 subsys, __u64 inst)</div><div class='add'>+    {</div><div class='add'>+	if (subsys &amp; ~KCOV_SUBSYSTEM_MASK || inst &amp; ~KCOV_INSTANCE_MASK)</div><div class='add'>+		return 0;</div><div class='add'>+	return subsys | inst;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    #define KCOV_COMMON_ID	0x42</div><div class='add'>+    #define KCOV_USB_BUS_NUM	1</div><div class='add'>+</div><div class='add'>+    int main(int argc, char **argv)</div><div class='add'>+    {</div><div class='add'>+	int fd;</div><div class='add'>+	unsigned long *cover, n, i;</div><div class='add'>+	struct kcov_remote_arg *arg;</div><div class='add'>+</div><div class='add'>+	fd = open("/sys/kernel/debug/kcov", O_RDWR);</div><div class='add'>+	if (fd == -1)</div><div class='add'>+		perror("open"), exit(1);</div><div class='add'>+	if (ioctl(fd, KCOV_INIT_TRACE, COVER_SIZE))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	cover = (unsigned long*)mmap(NULL, COVER_SIZE * sizeof(unsigned long),</div><div class='add'>+				     PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);</div><div class='add'>+	if ((void*)cover == MAP_FAILED)</div><div class='add'>+		perror("mmap"), exit(1);</div><div class='add'>+</div><div class='add'>+	/* 通过通用å�¥æŸ„å’Œ USB 总线 #1 å�¯ç”¨ä»£ç �覆盖率收集。 */</div><div class='add'>+	arg = calloc(1, sizeof(*arg) + sizeof(uint64_t));</div><div class='add'>+	if (!arg)</div><div class='add'>+		perror("calloc"), exit(1);</div><div class='add'>+	arg-&gt;trace_mode = KCOV_TRACE_PC;</div><div class='add'>+	arg-&gt;area_size = COVER_SIZE;</div><div class='add'>+	arg-&gt;num_handles = 1;</div><div class='add'>+	arg-&gt;common_handle = kcov_remote_handle(KCOV_SUBSYSTEM_COMMON,</div><div class='add'>+							KCOV_COMMON_ID);</div><div class='add'>+	arg-&gt;handles[0] = kcov_remote_handle(KCOV_SUBSYSTEM_USB,</div><div class='add'>+						KCOV_USB_BUS_NUM);</div><div class='add'>+	if (ioctl(fd, KCOV_REMOTE_ENABLE, arg))</div><div class='add'>+		perror("ioctl"), free(arg), exit(1);</div><div class='add'>+	free(arg);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 在这里用户需è¦�触å�‘执行一个内核代ç �段</div><div class='add'>+	 * 该代ç �段è¦�么使用通用å�¥æŸ„标识</div><div class='add'>+	 * è¦�么触å�‘了一些 USB 总线 #1 上的一些活动。</div><div class='add'>+	 */</div><div class='add'>+	sleep(2);</div><div class='add'>+</div><div class='add'>+	n = __atomic_load_n(&amp;cover[0], __ATOMIC_RELAXED);</div><div class='add'>+	for (i = 0; i &lt; n; i++)</div><div class='add'>+		printf("0x%lx\n", cover[i + 1]);</div><div class='add'>+	if (ioctl(fd, KCOV_DISABLE, 0))</div><div class='add'>+		perror("ioctl"), exit(1);</div><div class='add'>+	if (munmap(cover, COVER_SIZE * sizeof(unsigned long)))</div><div class='add'>+		perror("munmap"), exit(1);</div><div class='add'>+	if (close(fd))</div><div class='add'>+		perror("close"), exit(1);</div><div class='add'>+	return 0;</div><div class='add'>+    }</div><div class='head'>diff --git a/Documentation/translations/zh_CN/dev-tools/kmemleak.rst b/Documentation/translations/zh_CN/dev-tools/kmemleak.rst<br/>new file mode 100644<br/>index 000000000000..d248c8428095<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/dev-tools/kmemleak.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/dev-tools/kmemleak.rst</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. include:: ../disclaimer-zh_CN.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/dev-tools/kmemleak.rst</div><div class='add'>+:Translator: 刘浩阳 Haoyang Liu &lt;tttturtleruss@hust.edu.cn&gt;</div><div class='add'>+</div><div class='add'>+内核内存泄露检测器</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+Kmemleak æ��供了一个类似 `å�¯è¿½è¸ªçš„垃圾收集器 &lt;https://en.wikipedia.org/wiki/Tra</div><div class='add'>+cing_garbage_collection&gt;`_ 的方法æ�¥æ£€æµ‹å�¯èƒ½çš„内核内存泄æ¼�，ä¸�å�Œçš„是孤立对象ä¸�会</div><div class='add'>+被释放，而是仅通过 /sys/kernel/debug/kmemleak 报告。Valgrind 工具</div><div class='add'>+（``memcheck --leak-check``）使用了一ç§�相似的方法æ�¥æ£€æµ‹ç”¨æˆ·ç©ºé—´åº”用中的内存泄</div><div class='add'>+露。</div><div class='add'>+</div><div class='add'>+用法</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+"Kernel hacking" 中的 CONFIG_DEBUG_KMEMLEAK 必须被å�¯ç”¨ã€‚一个内核线程æ¯�10分钟</div><div class='add'>+（默认情况下）扫æ��一次内存，并且打å�°å‡ºæ–°å�‘现的未被引用的对象个数。</div><div class='add'>+如果 ``debugfs`` 没有挂载，则执行::</div><div class='add'>+</div><div class='add'>+   # mount -t debugfs nodev /sys/kernel/debug/</div><div class='add'>+</div><div class='add'>+显示所有扫æ��出的å�¯èƒ½çš„内存泄æ¼�的细节信æ�¯::</div><div class='add'>+</div><div class='add'>+   # cat /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+å�¯åŠ¨ä¸€æ¬¡ä¸­ç­‰ç¨‹åº¦çš„内存扫æ��::</div><div class='add'>+</div><div class='add'>+   # echo scan &gt; /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+清空当å‰�所有å�¯èƒ½çš„内存泄露列表::</div><div class='add'>+</div><div class='add'>+   # echo clear &gt; /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+当å†�次读å�– ``/sys/kernel/debug/kmemleak`` 文件时，将会输出自上次扫æ��以æ�¥æ£€æµ‹åˆ°çš„</div><div class='add'>+新的内存泄露。</div><div class='add'>+</div><div class='add'>+注æ„�，孤立目标是通过被分é…�时间æ�¥æŽ’åº�的，列表开始的对象å�¯èƒ½ä¼šå¯¼è‡´å�Žç»­çš„对象都被</div><div class='add'>+识别为孤立对象。</div><div class='add'>+</div><div class='add'>+å�¯ä»¥é€šè¿‡å†™å…¥ ``/sys/kernel/debug/kmemleak`` 文件在è¿�行时修改内存扫æ��å�‚数。下é�¢æ˜¯</div><div class='add'>+支æŒ�çš„å�‚数：</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+* off</div><div class='add'>+    ç¦�用 kmemleak（ä¸�å�¯é€†ï¼‰</div><div class='add'>+* stack=on</div><div class='add'>+    å¼€å�¯ä»»åŠ¡æ ˆæ‰«æ��（默认）</div><div class='add'>+* stack=off</div><div class='add'>+    ç¦�用任务栈扫æ��</div><div class='add'>+* scan=on</div><div class='add'>+    å¼€å�¯è‡ªåŠ¨å†…存扫æ��线程（默认）</div><div class='add'>+* scan=off</div><div class='add'>+    关闭自动内存扫æ��线程</div><div class='add'>+* scan=&lt;secs&gt;;</div><div class='add'>+    设定自动内存扫æ��间隔，以秒为å�•ä½�（默认值为 600，设置为 0 表示å�œ</div><div class='add'>+    止自动扫æ��）</div><div class='add'>+* scan</div><div class='add'>+    触å�‘一次内存扫æ��</div><div class='add'>+* clear</div><div class='add'>+    通过标记所有当å‰�已报告的未被引用对象为ç�°ï¼Œä»Žè€Œæ¸…空当å‰�å�¯èƒ½çš„内存泄露列</div><div class='add'>+    表；如果 kmemleak 被ç¦�用，则释放所有 kmemleak 对象，。</div><div class='add'>+* dump=&lt;addr&gt;</div><div class='add'>+    输出存储在 &lt;addr&gt; 中的对象信æ�¯</div><div class='add'>+</div><div class='add'>+å�¯ä»¥é€šè¿‡åœ¨å†…核命令行中传递 ``kmemleak=off`` å�‚数从而在å�¯åŠ¨æ—¶ç¦�用 Kmemleak。</div><div class='add'>+</div><div class='add'>+在 kmemleak åˆ�始化之å‰�å°±å�¯èƒ½ä¼šæœ‰å†…存分é…�或释放，这些æ“�作被存储在一个早期日志缓</div><div class='add'>+冲区中。缓冲区的大å°�通过 CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE 选项é…�置。</div><div class='add'>+</div><div class='add'>+如果 CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF 被å�¯ç”¨ï¼Œåˆ™ kmemleak 默认被ç¦�用。在内核命</div><div class='add'>+令行中传递 ``kmemleak=on`` å�‚æ•°æ�¥å¼€å�¯è¿™ä¸ªåŠŸèƒ½ã€‚</div><div class='add'>+</div><div class='add'>+如果出现 "Error while writing to stdout" 或 "write_loop: Invalid argument" 这样</div><div class='add'>+的错误，请确认 kmemleak 被正确å�¯ç”¨ã€‚</div><div class='add'>+</div><div class='add'>+基础算法</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+通过 :c:func:`kmalloc`, :c:func:`vmalloc`, :c:func:`kmem_cache_alloc` 以å�Šå�Œç±»</div><div class='add'>+函数å�‡è¢«è·Ÿè¸ªï¼ŒæŒ‡é’ˆï¼ŒåŒ…括一些é¢�外的信æ�¯å¦‚大å°�和栈追踪等，都被存储在红黑树中。</div><div class='add'>+对应的释放函数调用也被追踪，并从 kmemleak æ•°æ�®ç»“构中移除相应指针。</div><div class='add'>+</div><div class='add'>+对于一个已分é…�的内存å�—，如果通过扫æ��内存（包括ä¿�存寄存器）没有å�‘现任何指针指å�‘</div><div class='add'>+它的起始地å�€æˆ–者其中的任何ä½�置，则认为这å�—内存是孤立的。这æ„�味ç�€å†…核无法将该内</div><div class='add'>+å­˜å�—的地å�€ä¼ é€’给一个释放内存函数，这å�—内存便被认为泄露了。</div><div class='add'>+</div><div class='add'>+扫æ��算法步骤：</div><div class='add'>+</div><div class='add'>+   1. 标记所有对象为白色（最å�Žå‰©ä¸‹çš„白色对象被认为是孤立的）</div><div class='add'>+   2. 从数æ�®èŠ‚和栈开始扫æ��内存，检测æ¯�个值是å�¦æ˜¯çº¢é»‘树中存储的地å�€ã€‚如果一个指å�‘</div><div class='add'>+      白色对象的指针被检测到，则将该对象标记为ç�°è‰²ã€‚</div><div class='add'>+   3. 扫æ��ç�°è‰²å¯¹è±¡å¼•ç”¨çš„其他对象（有些白色对象å�¯èƒ½ä¼šå�˜ä¸ºç�°è‰²å¹¶è¢«æ·»åŠ åˆ°ç�°å��å�•æœ«å°¾</div><div class='add'>+      ）直到ç�°å��å�•ä¸ºç©ºã€‚</div><div class='add'>+   4. 剩余的白色对象就被认为是孤立的并通过 /sys/kernel/debug/kmemleak 报告。</div><div class='add'>+</div><div class='add'>+有些指å�‘已分é…�的内存å�—的指针存储在内核内部的数æ�®ç»“构中，它们ä¸�能被检测为孤立。</div><div class='add'>+为了é�¿å…�è¿™ç§�情况，kmemleak 也存储了指å�‘需è¦�被查找的内存å�—范围内的任æ„�地å�€çš„地å�€</div><div class='add'>+æ•°é‡�，如此一æ�¥è¿™äº›å†…存便ä¸�会被认为泄露。一个例å­�是 __vmalloc()。</div><div class='add'>+</div><div class='add'>+用 kmemleak 测试特定部分</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+在åˆ�始化å�¯åŠ¨é˜¶æ®µ /sys/kernel/debug/kmemleak 的输出å�¯èƒ½ä¼šå¾ˆå¤šï¼Œè¿™ä¹Ÿå�¯èƒ½æ˜¯ä½ åœ¨å¼€å�‘</div><div class='add'>+时编写的æ¼�洞百出的代ç �导致的。为了解决这ç§�情况你å�¯ä»¥ä½¿ç”¨ 'clear' 命令æ�¥æ¸…除</div><div class='add'>+/sys/kernel/debug/kmemleak 输出的所有的未引用对象。在执行 'clear' å�Žæ‰§è¡Œ 'scan'</div><div class='add'>+å�¯ä»¥å�‘现新的未引用对象，这将会有利你测试代ç �的特定部分。</div><div class='add'>+</div><div class='add'>+为了用一个空的 kmemleak 测试一个特定部分，执行::</div><div class='add'>+</div><div class='add'>+   # echo clear &gt; /sys/kernel/debug/kmemleak</div><div class='add'>+   ... 测试你的内核或者模å�— ...</div><div class='add'>+   # echo scan &gt; /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+然å�Žåƒ�平常一样获得报告::</div><div class='add'>+</div><div class='add'>+   # cat /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+释放 kmemleak 内核对象</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+为了å…�许访问先å‰�å�‘现的内存泄露，当用户ç¦�用或å�‘生致命错误导致 kmemleak</div><div class='add'>+被ç¦�用时，内核中的 kmemleak 对象ä¸�会被释放。这些对象å�¯èƒ½ä¼šå� ç”¨å¾ˆå¤§</div><div class='add'>+一部分物ç�†å†…存。</div><div class='add'>+</div><div class='add'>+在这ç§�情况下，你å�¯ä»¥ç”¨å¦‚下命令回收这些内存::</div><div class='add'>+</div><div class='add'>+   # echo clear &gt; /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+Kmemleak API</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+在 include/linux/kmemleak.h 头文件中查看函数原型：</div><div class='add'>+</div><div class='add'>+- ``kmemleak_init`` - åˆ�始化 kmemleak</div><div class='add'>+- ``kmemleak_alloc`` - 通知一个内存å�—的分é…�</div><div class='add'>+- ``kmemleak_alloc_percpu`` - 通知一个 percpu 类型的内存分é…�</div><div class='add'>+- ``kmemleak_vmalloc`` - 通知一个使用 vmalloc() 的内存分é…�</div><div class='add'>+- ``kmemleak_free`` - 通知一个内存å�—的释放</div><div class='add'>+- ``kmemleak_free_part`` - 通知一个部分的内存释放</div><div class='add'>+- ``kmemleak_free_percpu`` - 通知一个 percpu 类型的内存释放</div><div class='add'>+- ``kmemleak_update_trace`` - 更新分é…�对象过程的栈追踪</div><div class='add'>+- ``kmemleak_not_leak`` - 标记一个对象内存为未泄露的</div><div class='add'>+- ``kmemleak_ignore`` - ä¸�è¦�扫æ��或报告æŸ�个对象未泄露的</div><div class='add'>+- ``kmemleak_scan_area`` - 在内存å�—中添加扫æ��区域</div><div class='add'>+- ``kmemleak_no_scan`` - ä¸�扫æ��æŸ�个内存å�—</div><div class='add'>+- ``kmemleak_erase`` - 在指针å�˜é‡�中移除æŸ�个旧的值</div><div class='add'>+- ``kmemleak_alloc_recursive`` - å’Œ kmemleak_alloc 效果相å�Œä½†ä¼šæ£€æŸ¥æ˜¯å�¦æœ‰é€’å½’çš„</div><div class='add'>+   内存分é…�</div><div class='add'>+- ``kmemleak_free_recursive`` - å’Œ kmemleak_free 效果相å�Œä½†ä¼šæ£€æŸ¥æ˜¯å�¦æœ‰é€’å½’çš„</div><div class='add'>+   内存释放</div><div class='add'>+</div><div class='add'>+下列函数使用一个物ç�†åœ°å�€ä½œä¸ºå¯¹è±¡æŒ‡é’ˆå¹¶ä¸”å�ªåœ¨åœ°å�€æœ‰ä¸€ä¸ª lowmem 映射时å�šå‡ºç›¸åº”çš„</div><div class='add'>+行为：</div><div class='add'>+</div><div class='add'>+- ``kmemleak_alloc_phys``</div><div class='add'>+- ``kmemleak_free_part_phys``</div><div class='add'>+- ``kmemleak_ignore_phys``</div><div class='add'>+</div><div class='add'>+解决å�‡é˜³æ€§/å�‡é˜´æ€§</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+å�‡é˜´æ€§æ˜¯æŒ‡ç”±äºŽåœ¨å†…存扫æ��中有值指å�‘该对象导致 kmemleak 没有报告的实际存在的内存</div><div class='add'>+泄露（孤立对象）。为了å‡�å°‘å�‡é˜´æ€§çš„出现次数，kmemleak æ��供了 kmemleak_ignore，</div><div class='add'>+kmemleak_scan_area，kmemleak_no_scan å’Œ kmemleak_erase 函数（è§�上）。</div><div class='add'>+任务栈也会增加å�‡é˜´æ€§çš„æ•°é‡�并且默认ä¸�å¼€å�¯å¯¹å®ƒä»¬çš„扫æ��。</div><div class='add'>+</div><div class='add'>+å�‡é˜³æ€§æ˜¯å¯¹è±¡è¢«è¯¯æŠ¥ä¸ºå†…存泄露（孤立对象）。对于已知未泄露的对象，kmemleak</div><div class='add'>+æ��供了 kmemleak_not_leak 函数。å�Œæ—¶ kmemleak_ignore å�¯ä»¥ç”¨äºŽæ ‡è®°å·²çŸ¥ä¸�包å�«ä»»ä½•</div><div class='add'>+其他指针的内存å�—，标记å�Žè¯¥å†…å­˜å�—ä¸�会å†�被扫æ��。</div><div class='add'>+</div><div class='add'>+一些被报告的泄露仅仅是暂时的，尤其是在 SMP（对称多处ç�†ï¼‰ç³»ç»Ÿä¸­ï¼Œå› ä¸ºå…¶æŒ‡é’ˆ</div><div class='add'>+暂存在 CPU 寄存器或栈中。Kmemleak 定义了 MSECS_MIN_AGE（默认值为 1000）</div><div class='add'>+æ�¥è¡¨ç¤ºä¸€ä¸ªè¢«æŠ¥å‘Šä¸ºå†…存泄露的对象的最å°�存活时间。</div><div class='add'>+</div><div class='add'>+é™�制和缺点</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+主è¦�的缺点是内存分é…�和释放的性能下é™�。为了é�¿å…�其他的æ�Ÿå¤±ï¼Œå�ªæœ‰å½“</div><div class='add'>+/sys/kernel/debug/kmemleak 文件被读å�–æ—¶æ‰�会进行内存扫æ��。无论如何，这个工具是出于</div><div class='add'>+调试的目标，性能表现å�¯èƒ½ä¸�是最é‡�è¦�的。</div><div class='add'>+</div><div class='add'>+为了ä¿�æŒ�算法简å�•ï¼Œkmemleak 寻找指å�‘æŸ�个内存å�—范围中的任何值。这å�¯èƒ½ä¼šå¼•å�‘å�‡é˜´æ€§</div><div class='add'>+现象的出现。但是，最å�Žä¸€ä¸ªçœŸæ­£çš„内存泄露也会å�˜å¾—明显。</div><div class='add'>+</div><div class='add'>+é�žæŒ‡é’ˆå€¼çš„æ•°æ�®æ˜¯å�‡é˜´æ€§çš„å�¦ä¸€ä¸ªæ�¥æº�。在将æ�¥çš„版本中，kmemleak 仅仅会扫</div><div class='add'>+æ��已分é…�结构体中的指针æˆ�员。这个特性会解决上述很多的å�‡é˜´æ€§æƒ…况。</div><div class='add'>+</div><div class='add'>+Kmemleak 会报告å�‡é˜³æ€§ã€‚è¿™å�¯èƒ½å�‘生在æŸ�些被分é…�的内存å�—ä¸�需è¦�被释放的情况下</div><div class='add'>+（æŸ�些 init_call 函数中），指针的计算是通过其他方法而ä¸�是常规的 container_of å®�</div><div class='add'>+或是指针被存储在 kmemleak 没有扫æ��的地方。</div><div class='add'>+</div><div class='add'>+页分é…�å’Œ ioremap ä¸�会被追踪。</div><div class='add'>+</div><div class='add'>+使用 kmemleak-test 测试</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+为了检测是å�¦æˆ�功å�¯ç”¨äº† kmemleak，你å�¯ä»¥ä½¿ç”¨ä¸€ä¸ªæ•…æ„�制造内存泄露的模å�—</div><div class='add'>+kmemleak-test。设置 CONFIG_SAMPLE_KMEMLEAK 为模å�—（ä¸�能作为内建模å�—使用）</div><div class='add'>+并且å�¯åŠ¨å�¯ç”¨äº† kmemleak 的内核。加载模å�—并执行一次扫æ��::</div><div class='add'>+</div><div class='add'>+   # modprobe kmemleak-test</div><div class='add'>+   # echo scan &gt; /sys/kernel/debug/kmemleak</div><div class='add'>+</div><div class='add'>+注æ„�ä½ å�¯èƒ½æ— æ³•ç«‹åˆ»æˆ–在第一次扫æ��å�Žå¾—到结果。当 kmemleak 得到结果，将会输出日</div><div class='add'>+å¿— ``kmemleak: &lt;count of leaks&gt; new suspected memory leaks`` 。然å�Žé€šè¿‡è¯»å�–文件</div><div class='add'>+获å�–ä¿¡æ�¯::</div><div class='add'>+</div><div class='add'>+   # cat /sys/kernel/debug/kmemleak</div><div class='add'>+   unreferenced object 0xffff89862ca702e8 (size 32):</div><div class='add'>+     comm "modprobe", pid 2088, jiffies 4294680594 (age 375.486s)</div><div class='add'>+     hex dump (first 32 bytes):</div><div class='add'>+       6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b  kkkkkkkkkkkkkkkk</div><div class='add'>+       6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5  kkkkkkkkkkkkkkk.</div><div class='add'>+     backtrace:</div><div class='add'>+       [&lt;00000000e0a73ec7&gt;] 0xffffffffc01d2036</div><div class='add'>+       [&lt;000000000c5d2a46&gt;] do_one_initcall+0x41/0x1df</div><div class='add'>+       [&lt;0000000046db7e0a&gt;] do_init_module+0x55/0x200</div><div class='add'>+       [&lt;00000000542b9814&gt;] load_module+0x203c/0x2480</div><div class='add'>+       [&lt;00000000c2850256&gt;] __do_sys_finit_module+0xba/0xe0</div><div class='add'>+       [&lt;000000006564e7ef&gt;] do_syscall_64+0x43/0x110</div><div class='add'>+       [&lt;000000007c873fa6&gt;] entry_SYSCALL_64_after_hwframe+0x44/0xa9</div><div class='add'>+   ...</div><div class='add'>+</div><div class='add'>+用 ``rmmod kmemleak_test`` 移除模å�—时也会触å�‘</div><div class='add'>+kmemleak 的结果输出。</div><div class='head'>diff --git a/Documentation/translations/zh_CN/dev-tools/ubsan.rst b/Documentation/translations/zh_CN/dev-tools/ubsan.rst<br/>new file mode 100644<br/>index 000000000000..2487696b3772<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/dev-tools/ubsan.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/dev-tools/ubsan.rst</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. include:: ../disclaimer-zh_CN.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/dev-tools/ubsan.rst</div><div class='add'>+:Translator: Dongliang Mu &lt;dzm91@hust.edu.cn&gt;</div><div class='add'>+</div><div class='add'>+未定义行为消毒剂 - UBSAN</div><div class='add'>+====================================</div><div class='add'>+</div><div class='add'>+UBSAN是一ç§�动æ€�未定义行为检查工具。</div><div class='add'>+</div><div class='add'>+UBSAN使用编译时æ�’æ¡©æ�•æ�‰æœªå®šä¹‰è¡Œä¸ºã€‚编译器在å�¯èƒ½å¯¼è‡´æœªå®šä¹‰è¡Œä¸ºçš„æ“�作å‰�æ�’入特定</div><div class='add'>+检测代ç �。如果检查失败，å�³æ£€æµ‹åˆ°æœªå®šä¹‰è¡Œä¸ºï¼Œ__ubsan_handle_* 函数将被调用打å�°</div><div class='add'>+错误信æ�¯ã€‚</div><div class='add'>+</div><div class='add'>+GCC自4.9.x [1_] （详è§� ``-fsanitize=undefined`` 选项å�Šå…¶å­�选项）版本å�Žå¼•å…¥è¿™</div><div class='add'>+一特性。GCC 5.x 版本实现了更多检查器 [2_]。</div><div class='add'>+</div><div class='add'>+报告样例</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	 ================================================================================</div><div class='add'>+	 UBSAN: Undefined behaviour in ../include/linux/bitops.h:110:33</div><div class='add'>+	 shift exponent 32 is to large for 32-bit type 'unsigned int'</div><div class='add'>+	 CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.0-rc1+ #26</div><div class='add'>+	  0000000000000000 ffffffff82403cc8 ffffffff815e6cd6 0000000000000001</div><div class='add'>+	  ffffffff82403cf8 ffffffff82403ce0 ffffffff8163a5ed 0000000000000020</div><div class='add'>+	  ffffffff82403d78 ffffffff8163ac2b ffffffff815f0001 0000000000000002</div><div class='add'>+	 Call Trace:</div><div class='add'>+	  [&lt;ffffffff815e6cd6&gt;] dump_stack+0x45/0x5f</div><div class='add'>+	  [&lt;ffffffff8163a5ed&gt;] ubsan_epilogue+0xd/0x40</div><div class='add'>+	  [&lt;ffffffff8163ac2b&gt;] __ubsan_handle_shift_out_of_bounds+0xeb/0x130</div><div class='add'>+	  [&lt;ffffffff815f0001&gt;] ? radix_tree_gang_lookup_slot+0x51/0x150</div><div class='add'>+	  [&lt;ffffffff8173c586&gt;] _mix_pool_bytes+0x1e6/0x480</div><div class='add'>+	  [&lt;ffffffff83105653&gt;] ? dmi_walk_early+0x48/0x5c</div><div class='add'>+	  [&lt;ffffffff8173c881&gt;] add_device_randomness+0x61/0x130</div><div class='add'>+	  [&lt;ffffffff83105b35&gt;] ? dmi_save_one_device+0xaa/0xaa</div><div class='add'>+	  [&lt;ffffffff83105653&gt;] dmi_walk_early+0x48/0x5c</div><div class='add'>+	  [&lt;ffffffff831066ae&gt;] dmi_scan_machine+0x278/0x4b4</div><div class='add'>+	  [&lt;ffffffff8111d58a&gt;] ? vprintk_default+0x1a/0x20</div><div class='add'>+	  [&lt;ffffffff830ad120&gt;] ? early_idt_handler_array+0x120/0x120</div><div class='add'>+	  [&lt;ffffffff830b2240&gt;] setup_arch+0x405/0xc2c</div><div class='add'>+	  [&lt;ffffffff830ad120&gt;] ? early_idt_handler_array+0x120/0x120</div><div class='add'>+	  [&lt;ffffffff830ae053&gt;] start_kernel+0x83/0x49a</div><div class='add'>+	  [&lt;ffffffff830ad120&gt;] ? early_idt_handler_array+0x120/0x120</div><div class='add'>+	  [&lt;ffffffff830ad386&gt;] x86_64_start_reservations+0x2a/0x2c</div><div class='add'>+	  [&lt;ffffffff830ad4f3&gt;] x86_64_start_kernel+0x16b/0x17a</div><div class='add'>+	 ================================================================================</div><div class='add'>+</div><div class='add'>+用法</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+使用如下内核é…�ç½®å�¯ç”¨UBSAN::</div><div class='add'>+</div><div class='add'>+	CONFIG_UBSAN=y</div><div class='add'>+</div><div class='add'>+使用如下内核é…�置检查整个内核::</div><div class='add'>+</div><div class='add'>+        CONFIG_UBSAN_SANITIZE_ALL=y</div><div class='add'>+</div><div class='add'>+为了在特定文件或目录å�¯åŠ¨ä»£ç �æ�’桩，需è¦�在相应的内核Makefile中添加一行类似内容:</div><div class='add'>+</div><div class='add'>+- å�•æ–‡ä»¶ï¼ˆå¦‚main.o）::</div><div class='add'>+</div><div class='add'>+    UBSAN_SANITIZE_main.o := y</div><div class='add'>+</div><div class='add'>+- 一个目录中的所有文件::</div><div class='add'>+</div><div class='add'>+    UBSAN_SANITIZE := y</div><div class='add'>+</div><div class='add'>+å�³ä½¿è®¾ç½®äº†``CONFIG_UBSAN_SANITIZE_ALL=y``，为了é�¿å…�文件被æ�’桩，å�¯ä½¿ç”¨::</div><div class='add'>+</div><div class='add'>+  UBSAN_SANITIZE_main.o := n</div><div class='add'>+</div><div class='add'>+与::</div><div class='add'>+</div><div class='add'>+  UBSAN_SANITIZE := n</div><div class='add'>+</div><div class='add'>+未对é½�的内存访问检测å�¯é€šè¿‡å¼€å�¯ç‹¬ç«‹é€‰é¡¹ - CONFIG_UBSAN_ALIGNMENT 检测。</div><div class='add'>+该选项在支æŒ�未对é½�访问的架构上(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y)</div><div class='add'>+默认为关闭。该选项ä»�å�¯é€šè¿‡å†…æ ¸é…�ç½®å�¯ç”¨ï¼Œä½†å®ƒå°†äº§ç”Ÿå¤§é‡�çš„UBSAN报告。</div><div class='add'>+</div><div class='add'>+å�‚考文献</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+.. _1: https://gcc.gnu.org/onlinedocs/gcc-4.9.0/gcc/Debugging-Options.html</div><div class='add'>+.. _2: https://gcc.gnu.org/onlinedocs/gcc/Debugging-Options.html</div><div class='add'>+.. _3: https://clang.llvm.org/docs/UndefinedBehaviorSanitizer.html</div><div class='head'>diff --git a/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst b/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst<br/>index aeccff777170..0faf042001d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/driver-api/gpio/legacy.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/driver-api/gpio/legacy.rst</a></div><div class='hunk'>@@ -208,8 +208,6 @@ GPIO 值的命令需è¦�等待其信æ�¯æŽ’到队首æ‰�å�‘é€�命令，å†�获得其</div><div class='ctx'>                 gpio_request()</div><div class='ctx'> </div><div class='ctx'>         ## 	gpio_request_one()</div><div class='del'>-        ##	gpio_request_array()</div><div class='del'>-        ## 	gpio_free_array()</div><div class='ctx'> </div><div class='ctx'>                 gpio_free()</div><div class='ctx'> </div><div class='hunk'>@@ -272,14 +270,6 @@ gpio_request()å‰�将这类细节é…�置好，例如使用引脚控制å­�系统的</div><div class='ctx'> 	 */</div><div class='ctx'> 	int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);</div><div class='ctx'> </div><div class='del'>-	/* 在å�•ä¸ªå‡½æ•°ä¸­ç”³è¯·å¤šä¸ª GPIO</div><div class='del'>-	 */</div><div class='del'>-	int gpio_request_array(struct gpio *array, size_t num);</div><div class='del'>-</div><div class='del'>-	/* 在å�•ä¸ªå‡½æ•°ä¸­é‡Šæ”¾å¤šä¸ª GPIO</div><div class='del'>-	 */</div><div class='del'>-	void gpio_free_array(struct gpio *array, size_t num);</div><div class='del'>-</div><div class='ctx'> 这里 'flags' 当å‰�定义å�¯æŒ‡å®šä»¥ä¸‹å±žæ€§:</div><div class='ctx'> </div><div class='ctx'> 	* GPIOF_DIR_IN		- é…�置方å�‘为输入</div><div class='hunk'>@@ -317,12 +307,6 @@ gpio_request()å‰�将这类细节é…�置好，例如使用引脚控制å­�系统的</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-	err = gpio_request_array(leds_gpios, ARRAY_SIZE(leds_gpios));</div><div class='del'>-	if (err)</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-	gpio_free_array(leds_gpios, ARRAY_SIZE(leds_gpios));</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> GPIO 映射到 IRQ</div><div class='ctx'> ----------------</div><div class='head'>diff --git a/Documentation/translations/zh_CN/index.rst b/Documentation/translations/zh_CN/index.rst<br/>index 6ccec9657cc6..20b9d4270d1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/index.rst</a></div><div class='hunk'>@@ -24,8 +24,8 @@</div><div class='ctx'> 上的linux-doc邮件列表。</div><div class='ctx'> </div><div class='ctx'> 顺便说下，中文文档也需è¦�é�µå®ˆå†…核编ç �风格，风格中中文和英文的主è¦�ä¸�å�Œå°±æ˜¯ä¸­æ–‡</div><div class='del'>-的字符标点å� ç”¨ä¸¤ä¸ªè‹±æ–‡å­—符宽度， 所以，当英文è¦�求ä¸�è¦�超过æ¯�è¡Œ100个字符时，</div><div class='del'>-中文就ä¸�è¦�超过50个字符。å�¦å¤–，也è¦�注æ„�'-'，'=' 等符å�·ä¸Žç›¸å…³æ ‡é¢˜çš„对é½�。在将</div><div class='add'>+的字符标点å� ç”¨ä¸¤ä¸ªè‹±æ–‡å­—符宽度，所以，当英文è¦�求ä¸�è¦�超过æ¯�è¡Œ100个字符时，</div><div class='add'>+中文就ä¸�è¦�超过50个字符。å�¦å¤–，也è¦�注æ„�'-'，'='等符å�·ä¸Žç›¸å…³æ ‡é¢˜çš„对é½�。在将</div><div class='ctx'> è¡¥ä¸�æ��交到社区之å‰�，一定è¦�进行必è¦�çš„ ``checkpatch.pl`` 检查和编译测试。</div><div class='ctx'> </div><div class='ctx'> 与Linux 内核社区一起工作</div><div class='head'>diff --git a/Documentation/translations/zh_CN/mm/page_frags.rst b/Documentation/translations/zh_CN/mm/page_frags.rst<br/>index 20bd3fafdc8c..a5b22486a913 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/mm/page_frags.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/mm/page_frags.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/mm/page_frags.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/mm/page_frags.rst</a></div><div class='hunk'>@@ -25,7 +25,7 @@ sk_buff-&gt;head使用，或者用于skb_shared_infoçš„ “fragsâ€� 部分。</div><div class='ctx'> </div><div class='ctx'> 网络堆栈在æ¯�个CPU使用两个独立的缓存æ�¥å¤„ç�†ç¢Žç‰‡åˆ†é…�。netdev_alloc_cache被使用</div><div class='ctx'> netdev_alloc_fragå’Œ__netdev_alloc_skb调用的调用者使用。napi_alloc_cache</div><div class='del'>-被调用__napi_alloc_fragå’Œ__napi_alloc_skb的调用者使用。这两个调用的主è¦�区别是</div><div class='add'>+被调用__napi_alloc_fragå’Œnapi_alloc_skb的调用者使用。这两个调用的主è¦�区别是</div><div class='ctx'> 它们å�¯èƒ½è¢«è°ƒç”¨çš„环境。“netdevâ€� å‰�缀的函数å�¯ä»¥åœ¨ä»»ä½•ä¸Šä¸‹æ–‡ä¸­ä½¿ç”¨ï¼Œå› ä¸ºè¿™äº›å‡½æ•°</div><div class='ctx'> å°†ç¦�用中断，而 â€�napi“ å‰�缀的函数å�ªå�¯ä»¥åœ¨softirq上下文中使用。</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/process/cve.rst b/Documentation/translations/zh_CN/process/cve.rst<br/>new file mode 100644<br/>index 000000000000..e39b796efcec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/process/cve.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/process/cve.rst</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+.. include:: ../disclaimer-zh_CN.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/process/cve.rst</div><div class='add'>+:Translator: Dongliang Mu &lt;dzm91@hust.edu.cn&gt;</div><div class='add'>+</div><div class='add'>+====</div><div class='add'>+CVEs</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+Common Vulnerabilities and Exposure (CVE®) ç¼–å�·æ˜¯ä¸€ç§�明确的方å¼�æ�¥</div><div class='add'>+识别ã€�定义和登记公开披露的安全æ¼�洞。éš�ç�€æ—¶é—´çš„推移，它们在内核项目中的实用性</div><div class='add'>+å·²ç»�下é™�，CVEç¼–å�·ç»�常以ä¸�适当的方å¼�å’Œä¸�适当的原因被分é…�。因此，内核开å�‘社区</div><div class='add'>+倾å�‘于é�¿å…�使用它们。然而，分é…�CVE与其他形å¼�的安全标识符的æŒ�续压力，以å�Šå†…æ ¸</div><div class='add'>+社区之外的个人和公å�¸çš„æŒ�续滥用，已ç»�清楚地表明内核社区应该控制这些CVE分é…�。</div><div class='add'>+</div><div class='add'>+Linux内核开å�‘团队确实有能力为潜在的Linux内核安全问题分é…�CVE。CVE的分é…�</div><div class='add'>+独立于 :doc:`安全æ¼�洞报é€�æµ�程&lt;/process/security-bugs&gt;`。</div><div class='add'>+</div><div class='add'>+所有分é…�ç»™Linux内核的CVE列表都å�¯ä»¥åœ¨linux-cve邮件列表的存档中找到，如</div><div class='add'>+https://lore.kernel.org/linux-cve-announce/ 所示。如果想获得已分é…�</div><div class='add'>+CVE的通知，请“订阅â€�该邮件列表。è¦�获得分é…�çš„CVE通知，请订阅该邮件列表：</div><div class='add'>+`订阅 &lt;https://subspace.kernel.org/subscribing.html&gt;`_。</div><div class='add'>+</div><div class='add'>+过程</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+作为正常稳定å�‘布过程的一部分，å�¯èƒ½å­˜åœ¨å®‰å…¨é—®é¢˜çš„内核更改由负责CVEç¼–å�·åˆ†é…�</div><div class='add'>+çš„å¼€å�‘人员识别，并自动为其分é…�CVEç¼–å�·ã€‚这些CVE分é…�会作为ç»�常性的通告ç»�常</div><div class='add'>+å�‘布在linux-cve-announce邮件列表上。</div><div class='add'>+</div><div class='add'>+注æ„�，由于Linux内核在系统中的特殊地ä½�，几乎任何æ¼�洞都å�¯èƒ½è¢«åˆ©ç”¨æ�¥å�±å®³å†…æ ¸</div><div class='add'>+的安全性，但是当æ¼�洞被修å¤�å�Žï¼Œåˆ©ç”¨çš„å�¯èƒ½æ€§é€šå¸¸ä¸�明显。因此，CVE分é…�团队过于</div><div class='add'>+谨慎，并将CVEç¼–å�·åˆ†é…�给他们识别的任何æ¼�æ´žä¿®å¤�。这就解释了为什么Linux内核</div><div class='add'>+团队会å�‘布大é‡�çš„CVE。</div><div class='add'>+</div><div class='add'>+如果CVE分é…�团队错过了任何用户认为应该分é…�CVE的特定修å¤�，请å�‘é€�电å­�邮件到</div><div class='add'>+&lt;cve@kernel.org&gt;，那里的团队将与您一起工作。请注æ„�，任何潜在的安全问题</div><div class='add'>+ä¸�应被å�‘é€�到此邮箱，它仅用于为已å�‘布的内核树中的æ¼�æ´žä¿®å¤�分é…�CVE。如果你觉得</div><div class='add'>+自己å�‘现了一个未修å¤�的安全问题，请按照 :doc:`安全æ¼�洞报é€�æµ�程</div><div class='add'>+&lt;/process/security-bugs&gt;` å�‘é€�到Linux内核社区。</div><div class='add'>+</div><div class='add'>+Linux内核ä¸�会给未修å¤�的安全问题自动分é…�CVEï¼›å�ªæœ‰åœ¨å®‰å…¨ä¿®å¤�å�¯ç”¨ä¸”应用于</div><div class='add'>+稳定内核树å�Žï¼ŒCVE分é…�æ‰�会自动å�‘生，并且它将通过安全修å¤�çš„Gitæ��交编å�·è¿›è¡Œ</div><div class='add'>+跟踪。如果有人希望在æ��交安全修å¤�之å‰�分é…�CVE，请è�”系内核CVE分é…�团队，从</div><div class='add'>+他们的一批ä¿�留编å�·ä¸­èŽ·å¾—相应的CVEç¼–å�·ã€‚</div><div class='add'>+</div><div class='add'>+对于目å‰�没有得到稳定与长期维护内核团队积æž�支æŒ�的内核版本中å�‘现的任何问题，</div><div class='add'>+都ä¸�会分é…�CVEs。当å‰�支æŒ�的内核分支列表å�¯ä»¥åœ¨ https://kernel.org/releases.html</div><div class='add'>+上找到。</div><div class='add'>+</div><div class='add'>+被分é…�CVE的争论</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+对于为特定内核修改分é…�çš„CVE，其争论或修改的æ�ƒé™�仅属于å�—å½±å“�å­�系统的维护者。</div><div class='add'>+这一原则确ä¿�了æ¼�洞报告的高度准确性和å�¯é—®è´£æ€§ã€‚å�ªæœ‰é‚£äº›å…·æœ‰æ·±åŽšä¸“业知识和</div><div class='add'>+对å­�系统深入了解的维护人员，æ‰�能有效评估内核æ¼�洞的有效性和范围，并确定其适当的</div><div class='add'>+CVE指定策略。在此指定æ�ƒé™�之外，任何争论或修改CVEçš„å°�试都å�¯èƒ½å¯¼è‡´æ··ä¹±ã€�</div><div class='add'>+ä¸�准确的报告，并最终å�±å�Šç³»ç»Ÿã€‚</div><div class='add'>+</div><div class='add'>+无效的CVE</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+如果å�‘现的安全问题存在于仅由æŸ�Linuxå�‘行版支æŒ�çš„Linux内核中，å�³å®‰å…¨é—®é¢˜æ˜¯</div><div class='add'>+由于Linuxå�‘行版所å�šçš„更改导致，或者Linuxçš„å�‘行版内核版本ä¸�å†�是Linux内核</div><div class='add'>+社区支æŒ�的内核版本，那么Linux内核CVE团队将ä¸�能分é…�CVE，必须从Linux</div><div class='add'>+å�‘行版本身请求。</div><div class='add'>+</div><div class='add'>+内核CVE分é…�团队以外的任何团队对Linux内核支æŒ�版本分é…�çš„CVE都ä¸�应被</div><div class='add'>+视为有效CVE。请通知内核CVE分é…�团队，以便他们å�¯ä»¥é€šè¿‡CNAä¿®å¤�措施使</div><div class='add'>+这些æ�¡ç›®å¤±æ•ˆã€‚</div><div class='add'>+</div><div class='add'>+特定CVE的适用性</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+由于Linux内核å�¯ä»¥ä»¥è®¸å¤šä¸�å�Œæ–¹å¼�使用，外部用户å�¯ä»¥é€šè¿‡è®¸å¤šä¸�å�Œæ–¹å¼�访问它，或者</div><div class='add'>+根本没有访问，因此任何特定CVE的适用性å�–决于Linux用户，而ä¸�是内核CVE分é…�团队。</div><div class='add'>+请ä¸�è¦�与我们è�”ç³»æ�¥å°�试确定任何特定CVE的适用性。</div><div class='add'>+</div><div class='add'>+此外，由于æº�代ç �æ ‘é�žå¸¸å¤§ï¼Œè€Œä»»ä½•ä¸€ä¸ªç³»ç»Ÿéƒ½å�ªä½¿ç”¨æº�代ç �树的一å°�部分，因此任何</div><div class='add'>+Linux用户都应该æ„�识到，大é‡�分é…�çš„CVEs与他们的系统无关。</div><div class='add'>+</div><div class='add'>+简而言之，我们ä¸�知é�“您的用例，也ä¸�知é�“您使用的是内核的哪个部分，因此我们无法</div><div class='add'>+确定特定的CVE是å�¦ä¸Žæ‚¨çš„系统相关。</div><div class='add'>+</div><div class='add'>+与往常一样，最好采用所有å�‘布的内核更改，因为它们是由许多社区æˆ�员在一个统一的</div><div class='add'>+整体中一起进行测试的，而ä¸�是作为个别的精选更改。还è¦�注æ„�，对于许多安全问题æ�¥</div><div class='add'>+说，整体问题的解决方案并ä¸�是在å�•ä¸ªæ›´æ”¹ä¸­æ‰¾åˆ°çš„，而是在彼此之上的许多修å¤�的总</div><div class='add'>+和。ç�†æƒ³æƒ…况下，CVE将被分é…�给所有问题的所有修å¤�，但有时我们将无法注æ„�到一些</div><div class='add'>+ä¿®å¤�，因此æŸ�些修å¤�å�¯èƒ½åœ¨æ²¡æœ‰CVE的情况下被采å�–。</div><div class='head'>diff --git a/Documentation/translations/zh_CN/process/index.rst b/Documentation/translations/zh_CN/process/index.rst<br/>index 3ca02d281be0..5c6c8ccdd50d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/process/index.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/process/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/process/index.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/process/index.rst</a></div><div class='hunk'>@@ -48,6 +48,7 @@ TODOLIST:</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>    embargoed-hardware-issues</div><div class='add'>+   cve</div><div class='ctx'> </div><div class='ctx'> TODOLIST:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/process/submitting-patches.rst b/Documentation/translations/zh_CN/process/submitting-patches.rst<br/>index f8978f02057c..7864107e60a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/process/submitting-patches.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/process/submitting-patches.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/process/submitting-patches.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/process/submitting-patches.rst</a></div><div class='hunk'>@@ -333,10 +333,10 @@ Linus 和其他的内核开å�‘者需è¦�阅读和评论你æ��交的改动。对äº</div><div class='ctx'> 未å�‚与其开å�‘。签署链应当å��映补ä¸�传播到维护者并最终传播到Linus所ç»�过的 **真实**</div><div class='ctx'> 路径，首个签署指明å�•ä¸ªä½œè€…的主è¦�作者身份。</div><div class='ctx'> </div><div class='del'>-何时使用Acked-by:，CC:，和Co-Developed by:</div><div class='add'>+何时使用Acked-by:，Cc:，和Co-developed-by:</div><div class='ctx'> ------------------------------------------</div><div class='ctx'> </div><div class='del'>-Singed-off-by: 标签表示签å��者å�‚与了补ä¸�çš„å¼€å�‘，或者他/她在补ä¸�的传递路径中。</div><div class='add'>+Signed-off-by: 标签表示签å��者å�‚与了补ä¸�çš„å¼€å�‘，或者他/她在补ä¸�的传递路径中。</div><div class='ctx'> </div><div class='ctx'> 如果一个人没有直接å�‚与补ä¸�的准备或处ç�†ï¼Œä½†å¸Œæœ›è¡¨ç¤ºå¹¶è®°å½•ä»–们对补ä¸�的批准/赞æˆ�，</div><div class='ctx'> 那么他们å�¯ä»¥è¦�求在补ä¸�çš„å�˜æ›´æ—¥å¿—中添加一个Acked-by:。</div><div class='hunk'>@@ -358,8 +358,8 @@ Acked-by：ä¸�一定表示对整个补ä¸�的确认。例如，如果一个补ä¸�</div><div class='ctx'> Co-developed-by: 声明补ä¸�是由多个开å�‘人员共å�Œåˆ›å»ºçš„；当几个人在一个补ä¸�上工</div><div class='ctx'> 作时，它用于给出共å�Œä½œè€…（除了From:所给出的作者之外）。因为Co-developed-by:</div><div class='ctx'> 表示作者身份，所以æ¯�个Co-developed-by:必须紧跟在相关å�ˆä½œä½œè€…的签署之å�Žã€‚标准</div><div class='del'>-签署程åº�è¦�求Singed-off-by:标签的顺åº�应尽å�¯èƒ½å��映补ä¸�的时间历å�²ï¼Œæ— è®ºä½œè€…是通</div><div class='del'>-过From:还是Co-developed-by:表明。值得注æ„�的是，最å�Žä¸€ä¸ªSinged-off-by:必须是</div><div class='add'>+签署程åº�è¦�求Signed-off-by:标签的顺åº�应尽å�¯èƒ½å��映补ä¸�的时间历å�²ï¼Œæ— è®ºä½œè€…是通</div><div class='add'>+过From:还是Co-developed-by:表明。值得注æ„�的是，最å�Žä¸€ä¸ªSigned-off-by:必须是</div><div class='ctx'> æ��交补ä¸�çš„å¼€å�‘人员。</div><div class='ctx'> </div><div class='ctx'> 注æ„�，如果From:作者也是电å­�邮件标题的From:行中列出的人，则From:标签是å�¯é€‰çš„。</div><div class='head'>diff --git a/Documentation/translations/zh_CN/rust/arch-support.rst b/Documentation/translations/zh_CN/rust/arch-support.rst<br/>index afbd02afec45..abd708d48f82 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/arch-support.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/rust/arch-support.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/arch-support.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/rust/arch-support.rst</a></div><div class='hunk'>@@ -16,8 +16,12 @@</div><div class='ctx'> </div><div class='ctx'> 下é�¢æ˜¯ç›®å‰�å�¯ä»¥å·¥ä½œçš„架构的一般总结。支æŒ�程度与 ``MAINTAINERS`` 文件中的``S`` 值相对应:</div><div class='ctx'> </div><div class='del'>-============  ================  ==============================================</div><div class='del'>-架构          支æŒ�æ°´å¹³          é™�制因素</div><div class='del'>-============  ================  ==============================================</div><div class='del'>-``x86``       Maintained        å�ªæœ‰ ``x86_64``</div><div class='del'>-============  ================  ==============================================</div><div class='add'>+=============  ================  ==============================================</div><div class='add'>+架构           支æŒ�æ°´å¹³           é™�制因素</div><div class='add'>+=============  ================  ==============================================</div><div class='add'>+``arm64``      Maintained        å�ªæœ‰å°�端åº�</div><div class='add'>+``loongarch``  Maintained        \-</div><div class='add'>+``riscv``      Maintained        å�ªæœ‰ ``riscv64``</div><div class='add'>+``um``         Maintained        å�ªæœ‰ ``x86_64``</div><div class='add'>+``x86``        Maintained        å�ªæœ‰ ``x86_64``</div><div class='add'>+=============  ================  ==============================================</div><div class='head'>diff --git a/Documentation/translations/zh_CN/rust/coding-guidelines.rst b/Documentation/translations/zh_CN/rust/coding-guidelines.rst<br/>index 6c0bdbbc5a2a..419143b938ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/coding-guidelines.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/rust/coding-guidelines.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/coding-guidelines.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/rust/coding-guidelines.rst</a></div><div class='hunk'>@@ -157,6 +157,18 @@ https://commonmark.org/help/</div><div class='ctx'> </div><div class='ctx'> 	https://doc.rust-lang.org/rustdoc/how-to-write-documentation.html</div><div class='ctx'> </div><div class='add'>+此外，内核支æŒ�通过在链接目标å‰�添加 ``srctree/`` æ�¥åˆ›å»ºç›¸å¯¹äºŽæº�代ç �树的链接。例如:</div><div class='add'>+</div><div class='add'>+.. code-block:: rust</div><div class='add'>+</div><div class='add'>+       //! C header: [`include/linux/printk.h`](srctree/include/linux/printk.h)</div><div class='add'>+</div><div class='add'>+或者:</div><div class='add'>+</div><div class='add'>+.. code-block:: rust</div><div class='add'>+</div><div class='add'>+       /// [`struct mutex`]: srctree/include/linux/mutex.h</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 命å��</div><div class='ctx'> ----</div><div class='head'>diff --git a/Documentation/translations/zh_CN/rust/general-information.rst b/Documentation/translations/zh_CN/rust/general-information.rst<br/>index 6b91dfe1834a..251f6ee2bb44 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/general-information.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/rust/general-information.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/general-information.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/rust/general-information.rst</a></div><div class='hunk'>@@ -32,7 +32,7 @@ Rust内核代ç �使用其内置的文档生æˆ�器 ``rustdoc`` 进行记录。</div><div class='ctx'> </div><div class='ctx'> è¦�在你的网络æµ�览器中本地阅读该文档，请è¿�行如::</div><div class='ctx'> </div><div class='del'>-	xdg-open rust/doc/kernel/index.html</div><div class='add'>+	xdg-open Documentation/output/rust/rustdoc/kernel/index.html</div><div class='ctx'> </div><div class='ctx'> è¦�了解如何编写文档，请看 coding-guidelines.rst 。</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/rust/quick-start.rst b/Documentation/translations/zh_CN/rust/quick-start.rst<br/>index a4b8e8a50a89..8616556ae4d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/quick-start.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/rust/quick-start.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/rust/quick-start.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/rust/quick-start.rst</a></div><div class='hunk'>@@ -37,13 +37,18 @@ rustc</div><div class='ctx'> 需è¦�一个特定版本的Rust编译器。较新的版本å�¯èƒ½ä¼šä¹Ÿå�¯èƒ½ä¸�会工作，因为就目å‰�而言，内核ä¾�èµ–</div><div class='ctx'> 于一些ä¸�稳定的Rust特性。</div><div class='ctx'> </div><div class='del'>-如果使用的是 ``rustup`` ，请进入检出的æº�代ç �目录并è¿�è¡Œ::</div><div class='add'>+如果使用的是 ``rustup`` ，请进入内核编译目录（或者用 ``--path=&lt;build-dir&gt;`` å�‚æ•°</div><div class='add'>+æ�¥ ``设置`` sub-command)并è¿�è¡Œ::</div><div class='ctx'> </div><div class='ctx'> 	rustup override set $(scripts/min-tool-version.sh rustc)</div><div class='ctx'> </div><div class='del'>-或者从以下网å�€èŽ·å�–一个独立的安装程åº�或安装 ``rustup`` ：</div><div class='add'>++这将é…�置你的工作目录使用正确版本的 ``rustc``，而ä¸�å½±å“�你的默认工具链。</div><div class='ctx'> </div><div class='del'>-	https://www.rust-lang.org</div><div class='add'>+请注æ„�覆盖应用当å‰�的工作目录（和它的å­�目录）。</div><div class='add'>+</div><div class='add'>+如果你使用 ``rustup``， å�¯ä»¥ä»Žä¸‹é�¢çš„链接拉å�–一个å�•ç‹¬çš„安装程åº�:</div><div class='add'>+</div><div class='add'>+	https://forge.rust-lang.org/infra/other-installation-methods.html#standalone</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Rust标准库æº�代ç �</div><div class='hunk'>@@ -57,21 +62,23 @@ Rust标准库的æº�代ç �是必需的，因为构建系统会交å�‰ç¼–译 ``core</div><div class='ctx'> </div><div class='ctx'> 这些组件是按工具链安装的，因此以å�Žå�‡çº§Rust编译器版本需è¦�é‡�新添加组件。</div><div class='ctx'> </div><div class='del'>-å�¦åˆ™ï¼Œå¦‚果使用独立的安装程åº�，å�¯ä»¥å°†Rust仓库克隆到工具链的安装文件夹中::</div><div class='add'>+å�¦åˆ™ï¼Œå¦‚果使用独立的安装程åº�，å�¯ä»¥å°†Rustæº�ç �树下载到安装工具链的文件夹中::</div><div class='ctx'> </div><div class='del'>-	git clone --recurse-submodules \</div><div class='del'>-		--branch $(scripts/min-tool-version.sh rustc) \</div><div class='del'>-		https://github.com/rust-lang/rust \</div><div class='del'>-		$(rustc --print sysroot)/lib/rustlib/src/rust</div><div class='add'>+       curl -L "https://static.rust-lang.org/dist/rust-src-$(scripts/min-tool-version.sh rustc).tar.gz" |</div><div class='add'>+               tar -xzf - -C "$(rustc --print sysroot)/lib" \</div><div class='add'>+               "rust-src-$(scripts/min-tool-version.sh rustc)/rust-src/lib/" \</div><div class='add'>+               --strip-components=3</div><div class='ctx'> </div><div class='del'>-在这ç§�情况下，以å�Žå�‡çº§Rust编译器版本需è¦�手动更新这个克隆的仓库。</div><div class='add'>+在这ç§�情况下，以å�Žå�‡çº§Rust编译器版本需è¦�手动更新这个æº�代ç �树（这å�¯ä»¥é€šè¿‡ç§»é™¤</div><div class='add'>+``$(rustc --print sysroot)/lib/rustlib/src/rust`` ，然å�Žé‡�新执行上</div><div class='add'>+é�¢çš„命令å�šåˆ°ï¼‰ã€‚</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> libclang</div><div class='ctx'> ********</div><div class='ctx'> </div><div class='ctx'> ``bindgen`` 使用 ``libclang`` （LLVM的一部分）æ�¥ç�†è§£å†…核中的C代ç �，这æ„�味ç�€éœ€è¦�安</div><div class='del'>-装LLVMï¼›å�Œåœ¨å¼€å�¯ ``CC=clang`` 或 ``LLVM=1`` 时编译内核一样。</div><div class='add'>+装LLVMï¼›å�Œåœ¨å¼€å�¯``LLVM=1`` 时编译内核一样。</div><div class='ctx'> </div><div class='ctx'> Linuxå�‘行版中å�¯èƒ½ä¼šæœ‰å�ˆé€‚的包，所以最好先检查一下。</div><div class='ctx'> </div><div class='hunk'>@@ -94,7 +101,20 @@ bindgen</div><div class='ctx'> </div><div class='ctx'> 通过以下方å¼�安装它（注æ„�，这将从æº�ç �下载并构建该工具）::</div><div class='ctx'> </div><div class='del'>-	cargo install --locked --version $(scripts/min-tool-version.sh bindgen) bindgen</div><div class='add'>+	cargo install --locked --version $(scripts/min-tool-version.sh bindgen) bindgen-cli</div><div class='add'>+</div><div class='add'>+``bindgen`` 需è¦�找到å�ˆé€‚çš„ ``libclang`` æ‰�能工作。如果没有找到（或者找到的</div><div class='add'>+``libclang`` 与应该使用的 ``libclang`` ä¸�å�Œï¼‰ï¼Œåˆ™å�¯ä»¥ä½¿ç”¨ ``clang-sys``</div><div class='add'>+ç�†è§£çš„环境å�˜é‡�（Rust绑定创建的 ``bindgen`` 用æ�¥è®¿é—® ``libclang``）:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+* ``LLVM_CONFIG_PATH`` å�¯ä»¥æŒ‡å�‘一个 ``llvm-config`` å�¯æ‰§è¡Œæ–‡ä»¶ã€‚</div><div class='add'>+</div><div class='add'>+* 或者 ``LIBCLANG_PATH`` å�¯ä»¥æŒ‡å�‘ ``libclang`` 共享库或包å�«å®ƒçš„目录。</div><div class='add'>+</div><div class='add'>+* 或者 ``CLANG_PATH`` å�¯ä»¥æŒ‡å�‘ ``clang`` å�¯æ‰§è¡Œæ–‡ä»¶ã€‚</div><div class='add'>+</div><div class='add'>+详情请å�‚阅 ``clang-sys`` 的文档:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> å¼€å�‘ä¾�èµ–</div><div class='hunk'>@@ -163,7 +183,9 @@ rust-analyzer</div><div class='ctx'> 一起使用，以实现语法高亮ã€�补全ã€�转到定义和其他功能。</div><div class='ctx'> </div><div class='ctx'> ``rust-analyzer`` 需è¦�一个é…�置文件， ``rust-project.json``, 它å�¯ä»¥ç”± ``rust-analyzer``</div><div class='del'>-Make 目标生æˆ�。</div><div class='add'>+Make 目标生æˆ�::</div><div class='add'>+</div><div class='add'>+       make LLVM=1 rust-analyzer</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> é…�ç½®</div><div class='hunk'>@@ -189,10 +211,6 @@ Rust支æŒ�（CONFIG_RUST）需è¦�在 ``General setup`` è�œå�•ä¸­å�¯ç”¨ã€‚在其ä</div><div class='ctx'> </div><div class='ctx'> 	make LLVM=1</div><div class='ctx'> </div><div class='del'>-对于ä¸�支æŒ�完整LLVM工具链的架构，使用::</div><div class='del'>-</div><div class='del'>-	make CC=clang</div><div class='del'>-</div><div class='ctx'> 使用GCC对æŸ�些é…�置也是å�¯è¡Œçš„，但目å‰�它是é�žå¸¸è¯•éªŒæ€§çš„。</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/scheduler/sched-domains.rst b/Documentation/translations/zh_CN/scheduler/sched-domains.rst<br/>index e814d4c01141..06363169c56b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/scheduler/sched-domains.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/scheduler/sched-domains.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/scheduler/sched-domains.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/scheduler/sched-domains.rst</a></div><div class='hunk'>@@ -34,17 +34,17 @@ CPU共享。任æ„�两个组的CPU掩ç �的交集ä¸�一定为空，如果是这ç§</div><div class='ctx'> 调度域中的负载å�‡è¡¡å�‘生在调度组中。也就是说，æ¯�个组被视为一个实体。组的负载被定义为它</div><div class='ctx'> 管辖的æ¯�个CPU的负载之和。仅当组的负载ä¸�å�‡è¡¡å�Žï¼Œä»»åŠ¡æ‰�在组之间å�‘生è¿�移。</div><div class='ctx'> </div><div class='del'>-在kernel/sched/core.c中，trigger_load_balance()在æ¯�个CPU上通过scheduler_tick()</div><div class='add'>+在kernel/sched/core.c中，sched_balance_trigger()在æ¯�个CPU上通过sched_tick()</div><div class='ctx'> 周期执行。在当å‰�è¿�行队列下一个定期调度å†�平衡事件到达å�Žï¼Œå®ƒå¼•å�‘一个软中断。负载å�‡è¡¡çœŸæ­£</div><div class='del'>-的工作由run_rebalance_domains()-&gt;rebalance_domains()完æˆ�，在软中断上下文中执行</div><div class='add'>+的工作由sched_balance_softirq()-&gt;sched_balance_domains()完æˆ�，在软中断上下文中执行</div><div class='ctx'> （SCHED_SOFTIRQ）。</div><div class='ctx'> </div><div class='del'>-å�Žä¸€ä¸ªå‡½æ•°æœ‰ä¸¤ä¸ªå…¥å�‚：当å‰�CPUçš„è¿�行队列ã€�它在scheduler_tick()调用时是å�¦ç©ºé—²ã€‚函数会从</div><div class='add'>+å�Žä¸€ä¸ªå‡½æ•°æœ‰ä¸¤ä¸ªå…¥å�‚：当å‰�CPUçš„è¿�行队列ã€�它在sched_tick()调用时是å�¦ç©ºé—²ã€‚函数会从</div><div class='ctx'> 当å‰�CPU所在的基调度域开始迭代执行，并沿ç�€parent指针链å�‘上进入更高层级的调度域。在迭代</div><div class='ctx'> 过程中，函数会检查当å‰�调度域是å�¦å·²ç»�耗尽了å†�平衡的时间间隔，如果是，它在该调度域è¿�è¡Œ</div><div class='del'>-load_balance()。接下æ�¥å®ƒæ£€æŸ¥çˆ¶è°ƒåº¦åŸŸï¼ˆå¦‚果存在），å†�å�Žæ�¥çˆ¶è°ƒåº¦åŸŸçš„父调度域，以此类推。</div><div class='add'>+sched_balance_rq()。接下æ�¥å®ƒæ£€æŸ¥çˆ¶è°ƒåº¦åŸŸï¼ˆå¦‚果存在），å†�å�Žæ�¥çˆ¶è°ƒåº¦åŸŸçš„父调度域，以此类推。</div><div class='ctx'> </div><div class='del'>-èµ·åˆ�，load_balance()查找当å‰�调度域中最ç¹�忙的调度组。如果æˆ�功，在该调度组管辖的全部CPU</div><div class='add'>+èµ·åˆ�，sched_balance_rq()查找当å‰�调度域中最ç¹�忙的调度组。如果æˆ�功，在该调度组管辖的全部CPU</div><div class='ctx'> çš„è¿�行队列中找出最ç¹�忙的è¿�行队列。如能找到，对当å‰�çš„CPUè¿�行队列和新找到的最ç¹�å¿™è¿�è¡Œ</div><div class='ctx'> 队列å�‡åŠ é”�，并把任务从最ç¹�忙队列中è¿�移到当å‰�CPU上。被è¿�移的任务数é‡�等于在先å‰�迭代执行</div><div class='ctx'> 中计算出的该调度域的调度组的ä¸�å�‡è¡¡å€¼ã€‚</div><div class='head'>diff --git a/Documentation/translations/zh_CN/scheduler/sched-stats.rst b/Documentation/translations/zh_CN/scheduler/sched-stats.rst<br/>index c5e0be663837..09eee2517610 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/scheduler/sched-stats.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_CN/scheduler/sched-stats.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/scheduler/sched-stats.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_CN/scheduler/sched-stats.rst</a></div><div class='hunk'>@@ -75,42 +75,42 @@ domain&lt;N&gt; &lt;cpumask&gt; 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23</div><div class='ctx'> ç¹�忙，新空闲）：</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-    1)  当CPU空闲时，load_balance()在这个调度域中被调用了#次</div><div class='del'>-    2)  当CPU空闲时，load_balance()在这个调度域中被调用，但是å�‘现负载无需</div><div class='add'>+    1)  当CPU空闲时，sched_balance_rq()在这个调度域中被调用了#次</div><div class='add'>+    2)  当CPU空闲时，sched_balance_rq()在这个调度域中被调用，但是å�‘现负载无需</div><div class='ctx'>         å�‡è¡¡#次</div><div class='del'>-    3)  当CPU空闲时，load_balance()在这个调度域中被调用，试图è¿�移1个或更多</div><div class='add'>+    3)  当CPU空闲时，sched_balance_rq()在这个调度域中被调用，试图è¿�移1个或更多</div><div class='ctx'>         任务且失败了#次</div><div class='del'>-    4)  当CPU空闲时，load_balance()在这个调度域中被调用，å�‘现ä¸�å�‡è¡¡ï¼ˆå¦‚果有）</div><div class='add'>+    4)  当CPU空闲时，sched_balance_rq()在这个调度域中被调用，å�‘现ä¸�å�‡è¡¡ï¼ˆå¦‚果有）</div><div class='ctx'>         #次</div><div class='ctx'>     5)  当CPU空闲时，pull_task()在这个调度域中被调用#次</div><div class='ctx'>     6)  当CPU空闲时，尽管目标任务是热缓存状æ€�，pull_task()ä¾�然被调用#次</div><div class='del'>-    7)  当CPU空闲时，load_balance()在这个调度域中被调用，未能找到更ç¹�忙的</div><div class='add'>+    7)  当CPU空闲时，sched_balance_rq()在这个调度域中被调用，未能找到更ç¹�忙的</div><div class='ctx'>         队列#次</div><div class='ctx'>     8)  当CPU空闲时，在调度域中找到了更ç¹�忙的队列，但未找到更ç¹�忙的调度组</div><div class='ctx'>         #次</div><div class='del'>-    9)  当CPUç¹�忙时，load_balance()在这个调度域中被调用了#次</div><div class='del'>-    10) 当CPUç¹�忙时，load_balance()在这个调度域中被调用，但是å�‘现负载无需</div><div class='add'>+    9)  当CPUç¹�忙时，sched_balance_rq()在这个调度域中被调用了#次</div><div class='add'>+    10) 当CPUç¹�忙时，sched_balance_rq()在这个调度域中被调用，但是å�‘现负载无需</div><div class='ctx'>         å�‡è¡¡#次</div><div class='del'>-    11) 当CPUç¹�忙时，load_balance()在这个调度域中被调用，试图è¿�移1个或更多</div><div class='add'>+    11) 当CPUç¹�忙时，sched_balance_rq()在这个调度域中被调用，试图è¿�移1个或更多</div><div class='ctx'>         任务且失败了#次</div><div class='del'>-    12) 当CPUç¹�忙时，load_balance()在这个调度域中被调用，å�‘现ä¸�å�‡è¡¡ï¼ˆå¦‚果有）</div><div class='add'>+    12) 当CPUç¹�忙时，sched_balance_rq()在这个调度域中被调用，å�‘现ä¸�å�‡è¡¡ï¼ˆå¦‚果有）</div><div class='ctx'>         #次</div><div class='ctx'>     13) 当CPUç¹�忙时，pull_task()在这个调度域中被调用#次</div><div class='ctx'>     14) 当CPUç¹�忙时，尽管目标任务是热缓存状æ€�，pull_task()ä¾�然被调用#次</div><div class='del'>-    15) 当CPUç¹�忙时，load_balance()在这个调度域中被调用，未能找到更ç¹�忙的</div><div class='add'>+    15) 当CPUç¹�忙时，sched_balance_rq()在这个调度域中被调用，未能找到更ç¹�忙的</div><div class='ctx'>         队列#次</div><div class='ctx'>     16) 当CPUç¹�忙时，在调度域中找到了更ç¹�忙的队列，但未找到更ç¹�忙的调度组</div><div class='ctx'>         #次</div><div class='del'>-    17) 当CPU新空闲时，load_balance()在这个调度域中被调用了#次</div><div class='del'>-    18) 当CPU新空闲时，load_balance()在这个调度域中被调用，但是å�‘现负载无需</div><div class='add'>+    17) 当CPU新空闲时，sched_balance_rq()在这个调度域中被调用了#次</div><div class='add'>+    18) 当CPU新空闲时，sched_balance_rq()在这个调度域中被调用，但是å�‘现负载无需</div><div class='ctx'>         å�‡è¡¡#次</div><div class='del'>-    19) 当CPU新空闲时，load_balance()在这个调度域中被调用，试图è¿�移1个或更多</div><div class='add'>+    19) 当CPU新空闲时，sched_balance_rq()在这个调度域中被调用，试图è¿�移1个或更多</div><div class='ctx'>         任务且失败了#次</div><div class='del'>-    20) 当CPU新空闲时，load_balance()在这个调度域中被调用，å�‘现ä¸�å�‡è¡¡ï¼ˆå¦‚果有）</div><div class='add'>+    20) 当CPU新空闲时，sched_balance_rq()在这个调度域中被调用，å�‘现ä¸�å�‡è¡¡ï¼ˆå¦‚果有）</div><div class='ctx'>         #次</div><div class='ctx'>     21) 当CPU新空闲时，pull_task()在这个调度域中被调用#次</div><div class='ctx'>     22) 当CPU新空闲时，尽管目标任务是热缓存状æ€�，pull_task()ä¾�然被调用#次</div><div class='del'>-    23) 当CPU新空闲时，load_balance()在这个调度域中被调用，未能找到更ç¹�忙的</div><div class='add'>+    23) 当CPU新空闲时，sched_balance_rq()在这个调度域中被调用，未能找到更ç¹�忙的</div><div class='ctx'>         队列#次</div><div class='ctx'>     24) 当CPU新空闲时，在调度域中找到了更ç¹�忙的队列，但未找到更ç¹�忙的调度组</div><div class='ctx'>         #次</div><div class='head'>diff --git a/Documentation/translations/zh_TW/gpio.txt b/Documentation/translations/zh_TW/gpio.txt<br/>index b9b48012c62e..77d69d381316 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/gpio.txt?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_TW/gpio.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/gpio.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_TW/gpio.txt</a></div><div class='hunk'>@@ -215,13 +215,10 @@ GPIO 值的命令需è¦�等待其信æ�¯æŽ’到隊首æ‰�發é€�命令，å†�ç�²å¾—å…¶</div><div class='ctx'> 	gpio_request()</div><div class='ctx'> </div><div class='ctx'> ## 	gpio_request_one()</div><div class='del'>-##	gpio_request_array()</div><div class='del'>-## 	gpio_free_array()</div><div class='ctx'> </div><div class='ctx'> 	gpio_free()</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> è�²æ˜Žå’Œé‡‹æ”¾ GPIO</div><div class='ctx'> ----------------------------</div><div class='ctx'> 爲了有助於æ�•ç�²ç³»çµ±é…�置錯誤,定義了兩個函數。</div><div class='hunk'>@@ -278,14 +275,6 @@ gpio_request()å‰�將這類細節é…�置好，例如使用 pinctrl å­�系統的映</div><div class='ctx'> 	 */</div><div class='ctx'> 	int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);</div><div class='ctx'> </div><div class='del'>-	/* 在單個函數中申請多個 GPIO</div><div class='del'>-	 */</div><div class='del'>-	int gpio_request_array(struct gpio *array, size_t num);</div><div class='del'>-</div><div class='del'>-	/* 在單個函數中釋放多個 GPIO</div><div class='del'>-	 */</div><div class='del'>-	void gpio_free_array(struct gpio *array, size_t num);</div><div class='del'>-</div><div class='ctx'> 這裡 'flags' 當å‰�定義å�¯æŒ‡å®šä»¥ä¸‹å±¬æ€§:</div><div class='ctx'> </div><div class='ctx'> 	* GPIOF_DIR_IN		- é…�置方å�‘爲輸入</div><div class='hunk'>@@ -323,12 +312,6 @@ gpio_request()å‰�將這類細節é…�置好，例如使用 pinctrl å­�系統的映</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-	err = gpio_request_array(leds_gpios, ARRAY_SIZE(leds_gpios));</div><div class='del'>-	if (err)</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-	gpio_free_array(leds_gpios, ARRAY_SIZE(leds_gpios));</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> GPIO 映射到 IRQ</div><div class='ctx'> --------------------</div><div class='head'>diff --git a/Documentation/translations/zh_TW/process/submit-checklist.rst b/Documentation/translations/zh_TW/process/submit-checklist.rst<br/>index 43f2e3c5b514..0ecb187753e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/process/submit-checklist.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_TW/process/submit-checklist.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/process/submit-checklist.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_TW/process/submit-checklist.rst</a></div><div class='hunk'>@@ -31,7 +31,7 @@ Linux內核補ä¸�æ��交檢查單</div><div class='ctx'> </div><div class='ctx'>    c) 使用 ``O=builddir`` 時å�¯ä»¥æˆ�功編譯</div><div class='ctx'> </div><div class='del'>-   d) 任何 Doucmentation/ 下的變更都能æˆ�功構建且ä¸�引入新警告/錯誤。</div><div class='add'>+   d) 任何 Documentation/ 下的變更都能æˆ�功構建且ä¸�引入新警告/錯誤。</div><div class='ctx'>       用 ``make htmldocs`` 或 ``make pdfdocs`` 檢驗構建情æ³�並修復å•�題。</div><div class='ctx'> </div><div class='ctx'> 3) 通é�Žä½¿ç”¨æœ¬åœ°äº¤å�‰ç·¨è­¯å·¥å…·æˆ–其他一些構建設施在多個CPU體系çµ�構上構建。</div><div class='head'>diff --git a/Documentation/translations/zh_TW/process/submitting-patches.rst b/Documentation/translations/zh_TW/process/submitting-patches.rst<br/>index 99fa0f2fe6f4..f12f2f193f85 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/process/submitting-patches.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/translations/zh_TW/process/submitting-patches.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/process/submitting-patches.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/translations/zh_TW/process/submitting-patches.rst</a></div><div class='hunk'>@@ -334,10 +334,10 @@ Linus 和其他的內核開發者需è¦�閱讀和評論你æ��交的改動。å°�æ–</div><div class='ctx'> 未å�ƒèˆ‡å…¶é–‹ç™¼ã€‚簽署é�ˆæ‡‰ç•¶å��映補ä¸�傳播到維護者並最終傳播到Linus所經é�Žçš„ **真實**</div><div class='ctx'> 路徑，首個簽署指明單個作者的主è¦�作者身份。</div><div class='ctx'> </div><div class='del'>-何時使用Acked-by:，CC:，和Co-Developed by:</div><div class='add'>+何時使用Acked-by:，Cc:，和Co-developed-by:</div><div class='ctx'> ------------------------------------------</div><div class='ctx'> </div><div class='del'>-Singed-off-by: 標籤表示簽å��者å�ƒèˆ‡äº†è£œä¸�的開發，或者他/她在補ä¸�的傳é�žè·¯å¾‘中。</div><div class='add'>+Signed-off-by: 標籤表示簽å��者å�ƒèˆ‡äº†è£œä¸�的開發，或者他/她在補ä¸�的傳é�žè·¯å¾‘中。</div><div class='ctx'> </div><div class='ctx'> 如果一個人沒有直接å�ƒèˆ‡è£œä¸�的準備或處ç�†ï¼Œä½†å¸Œæœ›è¡¨ç¤ºä¸¦è¨˜éŒ„他們å°�補ä¸�的批准/è´Šæˆ�，</div><div class='ctx'> 那麼他們å�¯ä»¥è¦�求在補ä¸�的變更日誌中添加一個Acked-by:。</div><div class='hunk'>@@ -359,8 +359,8 @@ Acked-by：ä¸�一定表示å°�整個補ä¸�的確èª�。例如，如果一個補ä¸�</div><div class='ctx'> Co-developed-by: è�²æ˜Žè£œä¸�是由多個開發人員共å�Œå‰µå»ºçš„；當幾個人在一個補ä¸�上工</div><div class='ctx'> 作時，它用於給出共å�Œä½œè€…（除了From:所給出的作者之外）。因爲Co-developed-by:</div><div class='ctx'> 表示作者身份，所以æ¯�個Co-developed-by:必須緊跟在相關å�ˆä½œä½œè€…的簽署之後。標準</div><div class='del'>-簽署程åº�è¦�求Singed-off-by:標籤的順åº�應儘å�¯èƒ½å��映補ä¸�的時間歷å�²ï¼Œç„¡è«–作者是通</div><div class='del'>-é�ŽFrom:還是Co-developed-by:表明。值得注æ„�的是，最後一個Singed-off-by:必須是</div><div class='add'>+簽署程åº�è¦�求Signed-off-by:標籤的順åº�應儘å�¯èƒ½å��映補ä¸�的時間歷å�²ï¼Œç„¡è«–作者是通</div><div class='add'>+é�ŽFrom:還是Co-developed-by:表明。值得注æ„�的是，最後一個Signed-off-by:必須是</div><div class='ctx'> æ��交補ä¸�的開發人員。</div><div class='ctx'> </div><div class='ctx'> 注æ„�，如果From:作者也是電å­�郵件標題的From:行中列出的人，則From:標籤是å�¯é�¸çš„。</div><div class='head'>diff --git a/Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst b/Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst<br/>index 56b975801b6a..6615d6ced755 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/userspace-api/gpio/gpio-v2-get-line-ioctl.rst</a></div><div class='hunk'>@@ -81,7 +81,7 @@ Only one event clock flag, ``GPIO_V2_LINE_FLAG_EVENT_CLOCK_xxx``, may be set.</div><div class='ctx'> If none are set then the event clock defaults to ``CLOCK_MONOTONIC``.</div><div class='ctx'> The ``GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE`` flag requires supporting hardware</div><div class='ctx'> and a kernel with ``CONFIG_HTE`` set.  Requesting HTE from a device that</div><div class='del'>-doesn't support it is an error (**EOPNOTSUP**).</div><div class='add'>+doesn't support it is an error (**EOPNOTSUPP**).</div><div class='ctx'> </div><div class='ctx'> The :c:type:`debounce_period_us&lt;gpio_v2_line_attribute&gt;` attribute may only</div><div class='ctx'> be applied to lines with ``GPIO_V2_LINE_FLAG_INPUT`` set. When set, debounce</div><div class='head'>diff --git a/Documentation/userspace-api/netlink/genetlink-legacy.rst b/Documentation/userspace-api/netlink/genetlink-legacy.rst<br/>index 70a77387f6c4..fa005989193a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/netlink/genetlink-legacy.rst?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Documentation/userspace-api/netlink/genetlink-legacy.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/netlink/genetlink-legacy.rst?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Documentation/userspace-api/netlink/genetlink-legacy.rst</a></div><div class='hunk'>@@ -46,10 +46,16 @@ For reference the ``multi-attr`` array may look like this::</div><div class='ctx'> </div><div class='ctx'> where ``ARRAY-ATTR`` is the array entry type.</div><div class='ctx'> </div><div class='del'>-array-nest</div><div class='del'>-~~~~~~~~~~</div><div class='add'>+indexed-array</div><div class='add'>+~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+``indexed-array`` wraps the entire array in an extra attribute (hence</div><div class='add'>+limiting its size to 64kB). The ``ENTRY`` nests are special and have the</div><div class='add'>+index of the entry as their type instead of normal attribute type.</div><div class='ctx'> </div><div class='del'>-``array-nest`` creates the following structure::</div><div class='add'>+A ``sub-type`` is needed to describe what type in the ``ENTRY``. A ``nest``</div><div class='add'>+``sub-type`` means there are nest arrays in the ``ENTRY``, with the structure</div><div class='add'>+looks like::</div><div class='ctx'> </div><div class='ctx'>   [SOME-OTHER-ATTR]</div><div class='ctx'>   [ARRAY-ATTR]</div><div class='hunk'>@@ -60,9 +66,13 @@ array-nest</div><div class='ctx'>       [MEMBER1]</div><div class='ctx'>       [MEMBER2]</div><div class='ctx'> </div><div class='del'>-It wraps the entire array in an extra attribute (hence limiting its size</div><div class='del'>-to 64kB). The ``ENTRY`` nests are special and have the index of the entry</div><div class='del'>-as their type instead of normal attribute type.</div><div class='add'>+Other ``sub-type`` like ``u32`` means there is only one member as described</div><div class='add'>+in ``sub-type`` in the ``ENTRY``. The structure looks like::</div><div class='add'>+</div><div class='add'>+  [SOME-OTHER-ATTR]</div><div class='add'>+  [ARRAY-ATTR]</div><div class='add'>+    [ENTRY u32]</div><div class='add'>+    [ENTRY u32]</div><div class='ctx'> </div><div class='ctx'> type-value</div><div class='ctx'> ~~~~~~~~~~</div><div class='head'>diff --git a/MAINTAINERS b/MAINTAINERS<br/>index 0960c519f949..c4a192a73adb 100644<br/>--- a/<a href='/cgit/linux.git/tree/MAINTAINERS?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>MAINTAINERS</a><br/>+++ b/<a href='/cgit/linux.git/tree/MAINTAINERS?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>MAINTAINERS</a></div><div class='hunk'>@@ -479,6 +479,13 @@ L:	linux-wireless@vger.kernel.org</div><div class='ctx'> S:	Orphan</div><div class='ctx'> F:	drivers/net/wireless/admtek/adm8211.*</div><div class='ctx'> </div><div class='add'>+ADP1050 HARDWARE MONITOR DRIVER</div><div class='add'>+M:	Radu Sabau &lt;radu.sabau@analog.com&gt;</div><div class='add'>+L:	linux-hwmon@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+W:	https://ez.analog.com/linux-software-drivers</div><div class='add'>+F:	Documentation/devicetree/bindings/hwmon/pmbus/adi,adp1050.yaml</div><div class='add'>+</div><div class='ctx'> ADP1653 FLASH CONTROLLER DRIVER</div><div class='ctx'> M:	Sakari Ailus &lt;sakari.ailus@iki.fi&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='hunk'>@@ -553,7 +560,7 @@ F:	Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml</div><div class='ctx'> F:	drivers/input/misc/adxl34x.c</div><div class='ctx'> </div><div class='ctx'> ADXL355 THREE-AXIS DIGITAL ACCELEROMETER DRIVER</div><div class='del'>-M:	Puranjay Mohan &lt;puranjay12@gmail.com&gt;</div><div class='add'>+M:	Puranjay Mohan &lt;puranjay@kernel.org&gt;</div><div class='ctx'> L:	linux-iio@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml</div><div class='hunk'>@@ -653,6 +660,15 @@ S:	Supported</div><div class='ctx'> F:	fs/aio.c</div><div class='ctx'> F:	include/linux/*aio*.h</div><div class='ctx'> </div><div class='add'>+AIROHA SPI SNFI DRIVER</div><div class='add'>+M:	Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+M:	Ray Liu &lt;ray.liu@airoha.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+L:	linux-spi@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml</div><div class='add'>+F:	drivers/spi/spi-airoha-snfi.c</div><div class='add'>+</div><div class='ctx'> AIRSPY MEDIA DRIVER</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Orphan</div><div class='hunk'>@@ -993,7 +1009,7 @@ F:	drivers/video/fbdev/geode/</div><div class='ctx'> </div><div class='ctx'> AMD HSMP DRIVER</div><div class='ctx'> M:	Naveen Krishna Chatradhi &lt;naveenkrishna.chatradhi@amd.com&gt;</div><div class='del'>-R:	Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+R:	Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/arch/x86/amd_hsmp.rst</div><div class='hunk'>@@ -1062,6 +1078,9 @@ F:	drivers/gpu/drm/amd/pm/</div><div class='ctx'> </div><div class='ctx'> AMD PSTATE DRIVER</div><div class='ctx'> M:	Huang Rui &lt;ray.huang@amd.com&gt;</div><div class='add'>+M:	Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;</div><div class='add'>+M:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='add'>+R:	Perry Yuan &lt;perry.yuan@amd.com&gt;</div><div class='ctx'> L:	linux-pm@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/admin-guide/pm/amd-pstate.rst</div><div class='hunk'>@@ -1671,7 +1690,7 @@ F:	drivers/soc/versatile/</div><div class='ctx'> ARM KOMEDA DRM-KMS DRIVER</div><div class='ctx'> M:	Liviu Dudau &lt;liviu.dudau@arm.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/arm,komeda.yaml</div><div class='ctx'> F:	Documentation/gpu/komeda-kms.rst</div><div class='ctx'> F:	drivers/gpu/drm/arm/display/include/</div><div class='hunk'>@@ -1683,15 +1702,26 @@ M:	Rob Herring &lt;robh@kernel.org&gt;</div><div class='ctx'> R:	Steven Price &lt;steven.price@arm.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/gpu/panfrost.rst</div><div class='ctx'> F:	drivers/gpu/drm/panfrost/</div><div class='ctx'> F:	include/uapi/drm/panfrost_drm.h</div><div class='ctx'> </div><div class='add'>+ARM MALI PANTHOR DRM DRIVER</div><div class='add'>+M:	Boris Brezillon &lt;boris.brezillon@collabora.com&gt;</div><div class='add'>+M:	Steven Price &lt;steven.price@arm.com&gt;</div><div class='add'>+M:	Liviu Dudau &lt;liviu.dudau@arm.com&gt;</div><div class='add'>+L:	dri-devel@lists.freedesktop.org</div><div class='add'>+S:	Supported</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='add'>+F:	Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml</div><div class='add'>+F:	drivers/gpu/drm/panthor/</div><div class='add'>+F:	include/uapi/drm/panthor_drm.h</div><div class='add'>+</div><div class='ctx'> ARM MALI-DP DRM DRIVER</div><div class='ctx'> M:	Liviu Dudau &lt;liviu.dudau@arm.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/arm,malidp.yaml</div><div class='ctx'> F:	Documentation/gpu/afbc.rst</div><div class='ctx'> F:	drivers/gpu/drm/arm/</div><div class='hunk'>@@ -2585,12 +2615,8 @@ F:	arch/arm64/boot/dts/qcom/sc7180*</div><div class='ctx'> F:	arch/arm64/boot/dts/qcom/sc7280*</div><div class='ctx'> F:	arch/arm64/boot/dts/qcom/sdm845-cheza*</div><div class='ctx'> </div><div class='del'>-ARM/QUALCOMM SUPPORT</div><div class='del'>-M:	Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='del'>-M:	Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+ARM/QUALCOMM MAILING LIST</div><div class='ctx'> L:	linux-arm-msm@vger.kernel.org</div><div class='del'>-S:	Maintained</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/*/qcom*</div><div class='ctx'> F:	Documentation/devicetree/bindings/soc/qcom/</div><div class='ctx'> F:	arch/arm/boot/dts/qcom/</div><div class='hunk'>@@ -2627,6 +2653,33 @@ F:	include/dt-bindings/*/qcom*</div><div class='ctx'> F:	include/linux/*/qcom*</div><div class='ctx'> F:	include/linux/soc/qcom/</div><div class='ctx'> </div><div class='add'>+ARM/QUALCOMM SUPPORT</div><div class='add'>+M:	Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+M:	Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+L:	linux-arm-msm@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git</div><div class='add'>+F:	Documentation/devicetree/bindings/arm/qcom-soc.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/arm/qcom.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/bus/qcom*</div><div class='add'>+F:	Documentation/devicetree/bindings/cache/qcom,llcc.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/firmware/qcom,scm.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/reserved-memory/qcom</div><div class='add'>+F:	Documentation/devicetree/bindings/soc/qcom/</div><div class='add'>+F:	arch/arm/boot/dts/qcom/</div><div class='add'>+F:	arch/arm/configs/qcom_defconfig</div><div class='add'>+F:	arch/arm/mach-qcom/</div><div class='add'>+F:	arch/arm64/boot/dts/qcom/</div><div class='add'>+F:	drivers/bus/qcom*</div><div class='add'>+F:	drivers/firmware/qcom/</div><div class='add'>+F:	drivers/soc/qcom/</div><div class='add'>+F:	include/dt-bindings/arm/qcom,ids.h</div><div class='add'>+F:	include/dt-bindings/firmware/qcom,scm.h</div><div class='add'>+F:	include/dt-bindings/soc/qcom*</div><div class='add'>+F:	include/linux/firmware/qcom</div><div class='add'>+F:	include/linux/soc/qcom/</div><div class='add'>+F:	include/soc/qcom/</div><div class='add'>+</div><div class='ctx'> ARM/RDA MICRO ARCHITECTURE</div><div class='ctx'> M:	Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -3050,6 +3103,13 @@ F:	drivers/mmc/host/sdhci-of-arasan.c</div><div class='ctx'> N:	zynq</div><div class='ctx'> N:	xilinx</div><div class='ctx'> </div><div class='add'>+ARM64 FIT SUPPORT</div><div class='add'>+M:	Simon Glass &lt;sjg@chromium.org&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/arm64/boot/Makefile</div><div class='add'>+F:	scripts/make_fit.py</div><div class='add'>+</div><div class='ctx'> ARM64 PORT (AARCH64 ARCHITECTURE)</div><div class='ctx'> M:	Catalin Marinas &lt;catalin.marinas@arm.com&gt;</div><div class='ctx'> M:	Will Deacon &lt;will@kernel.org&gt;</div><div class='hunk'>@@ -3712,9 +3772,15 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/iio/imu/bosch,bmi323.yaml</div><div class='ctx'> F:	drivers/iio/imu/bmi323/</div><div class='ctx'> </div><div class='add'>+BPF JIT for ARC</div><div class='add'>+M:	Shahab Vahedi &lt;shahab@synopsys.com&gt;</div><div class='add'>+L:	bpf@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/arc/net/</div><div class='add'>+</div><div class='ctx'> BPF JIT for ARM</div><div class='ctx'> M:	Russell King &lt;linux@armlinux.org.uk&gt;</div><div class='del'>-M:	Puranjay Mohan &lt;puranjay12@gmail.com&gt;</div><div class='add'>+M:	Puranjay Mohan &lt;puranjay@kernel.org&gt;</div><div class='ctx'> L:	bpf@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/net/</div><div class='hunk'>@@ -3764,6 +3830,8 @@ X:	arch/riscv/net/bpf_jit_comp64.c</div><div class='ctx'> </div><div class='ctx'> BPF JIT for RISC-V (64-bit)</div><div class='ctx'> M:	Björn Töpel &lt;bjorn@kernel.org&gt;</div><div class='add'>+R:	Pu Lehui &lt;pulehui@huawei.com&gt;</div><div class='add'>+R:	Puranjay Mohan &lt;puranjay@kernel.org&gt;</div><div class='ctx'> L:	bpf@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/riscv/net/</div><div class='hunk'>@@ -3822,6 +3890,14 @@ F:	kernel/bpf/tnum.c</div><div class='ctx'> F:	kernel/bpf/trampoline.c</div><div class='ctx'> F:	kernel/bpf/verifier.c</div><div class='ctx'> </div><div class='add'>+BPF [CRYPTO]</div><div class='add'>+M:	Vadim Fedorenko &lt;vadim.fedorenko@linux.dev&gt;</div><div class='add'>+L:	bpf@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	crypto/bpf_crypto_skcipher.c</div><div class='add'>+F:	include/linux/bpf_crypto.h</div><div class='add'>+F:	kernel/bpf/crypto.c</div><div class='add'>+</div><div class='ctx'> BPF [DOCUMENTATION] (Related to Standardization)</div><div class='ctx'> R:	David Vernet &lt;void@manifault.com&gt;</div><div class='ctx'> L:	bpf@vger.kernel.org</div><div class='hunk'>@@ -4191,7 +4267,6 @@ S:	Supported</div><div class='ctx'> F:	drivers/scsi/bnx2i/</div><div class='ctx'> </div><div class='ctx'> BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER</div><div class='del'>-M:	Ariel Elior &lt;aelior@marvell.com&gt;</div><div class='ctx'> M:	Sudarsana Kalluru &lt;skalluru@marvell.com&gt;</div><div class='ctx'> M:	Manish Chopra &lt;manishc@marvell.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='hunk'>@@ -5352,7 +5427,7 @@ F:	drivers/usb/atm/cxacru.c</div><div class='ctx'> </div><div class='ctx'> CONFIDENTIAL COMPUTING THREAT MODEL FOR X86 VIRTUALIZATION (SNP/TDX)</div><div class='ctx'> M:	Elena Reshetova &lt;elena.reshetova@intel.com&gt;</div><div class='del'>-M:	Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+M:	Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/security/snp-tdx-threat-model.rst</div><div class='ctx'> </div><div class='hunk'>@@ -5708,7 +5783,7 @@ Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='ctx'> F:	drivers/media/dvb-frontends/cxd2820r*</div><div class='ctx'> </div><div class='ctx'> CXGB3 ETHERNET DRIVER (CXGB3)</div><div class='del'>-M:	Raju Rangoju &lt;rajur@chelsio.com&gt;</div><div class='add'>+M:	Potnuri Bharat Teja &lt;bharat@chelsio.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	http://www.chelsio.com</div><div class='hunk'>@@ -5729,7 +5804,7 @@ W:	http://www.chelsio.com</div><div class='ctx'> F:	drivers/crypto/chelsio</div><div class='ctx'> </div><div class='ctx'> CXGB4 ETHERNET DRIVER (CXGB4)</div><div class='del'>-M:	Raju Rangoju &lt;rajur@chelsio.com&gt;</div><div class='add'>+M:	Potnuri Bharat Teja &lt;bharat@chelsio.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	http://www.chelsio.com</div><div class='hunk'>@@ -5758,7 +5833,7 @@ F:	drivers/infiniband/hw/cxgb4/</div><div class='ctx'> F:	include/uapi/rdma/cxgb4-abi.h</div><div class='ctx'> </div><div class='ctx'> CXGB4VF ETHERNET DRIVER (CXGB4VF)</div><div class='del'>-M:	Raju Rangoju &lt;rajur@chelsio.com&gt;</div><div class='add'>+M:	Potnuri Bharat Teja &lt;bharat@chelsio.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	http://www.chelsio.com</div><div class='hunk'>@@ -5778,10 +5853,9 @@ F:	include/uapi/misc/cxl.h</div><div class='ctx'> </div><div class='ctx'> CXLFLASH (IBM Coherent Accelerator Processor Interface CAPI Flash) SCSI DRIVER</div><div class='ctx'> M:	Manoj N. Kumar &lt;manoj@linux.ibm.com&gt;</div><div class='del'>-M:	Matthew R. Ochs &lt;mrochs@linux.ibm.com&gt;</div><div class='ctx'> M:	Uma Krishnan &lt;ukrishn@linux.ibm.com&gt;</div><div class='ctx'> L:	linux-scsi@vger.kernel.org</div><div class='del'>-S:	Supported</div><div class='add'>+S:	Obsolete</div><div class='ctx'> F:	Documentation/arch/powerpc/cxlflash.rst</div><div class='ctx'> F:	drivers/scsi/cxlflash/</div><div class='ctx'> F:	include/uapi/scsi/cxlflash_ioctl.h</div><div class='hunk'>@@ -6310,7 +6384,7 @@ L:	linux-media@vger.kernel.org</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	linaro-mm-sig@lists.linaro.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/driver-api/dma-buf.rst</div><div class='ctx'> F:	Documentation/userspace-api/dma-buf-alloc-exchange.rst</div><div class='ctx'> F:	drivers/dma-buf/</div><div class='hunk'>@@ -6364,7 +6438,7 @@ L:	linux-media@vger.kernel.org</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	linaro-mm-sig@lists.linaro.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/dma-buf/dma-heap.c</div><div class='ctx'> F:	drivers/dma-buf/heaps/*</div><div class='ctx'> F:	include/linux/dma-heap.h</div><div class='hunk'>@@ -6401,6 +6475,7 @@ S:	Maintained</div><div class='ctx'> P:	Documentation/doc-guide/maintainer-profile.rst</div><div class='ctx'> T:	git git://git.lwn.net/linux.git docs-next</div><div class='ctx'> F:	Documentation/</div><div class='add'>+F:	scripts/check-variable-fonts.sh</div><div class='ctx'> F:	scripts/documentation-file-ref-check</div><div class='ctx'> F:	scripts/kernel-doc</div><div class='ctx'> F:	scripts/sphinx-pre-install</div><div class='hunk'>@@ -6573,7 +6648,7 @@ M:	Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;</div><div class='ctx'> M:	Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/accel/ivpu/</div><div class='ctx'> F:	include/uapi/drm/ivpu_accel.h</div><div class='ctx'> </div><div class='hunk'>@@ -6593,18 +6668,18 @@ M:	Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'> R:	Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/sun4i/sun8i*</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR ARM PL111 CLCD</div><div class='ctx'> S:	Orphan</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/pl111/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR ARM VERSATILE TFT PANELS</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-arm-versatile.c</div><div class='ctx'> </div><div class='hunk'>@@ -6612,7 +6687,7 @@ DRM DRIVER FOR ASPEED BMC GFX</div><div class='ctx'> M:	Joel Stanley &lt;joel@jms.id.au&gt;</div><div class='ctx'> L:	linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/gpu/aspeed-gfx.txt</div><div class='ctx'> F:	drivers/gpu/drm/aspeed/</div><div class='ctx'> </div><div class='hunk'>@@ -6622,14 +6697,14 @@ R:	Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> R:	Jocelyn Falempe &lt;jfalempe@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/ast/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR BOCHS VIRTUAL GPU</div><div class='ctx'> M:	Gerd Hoffmann &lt;kraxel@redhat.com&gt;</div><div class='ctx'> L:	virtualization@lists.linux.dev</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/tiny/bochs.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR BOE HIMAX8279D PANELS</div><div class='hunk'>@@ -6647,14 +6722,14 @@ F:	drivers/gpu/drm/bridge/chipone-icn6211.c</div><div class='ctx'> DRM DRIVER FOR EBBG FT8719 PANEL</div><div class='ctx'> M:	Joel Selvaraj &lt;jo@jsfamily.in&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-ebbg-ft8719.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR FARADAY TVE200 TV ENCODER</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/tve200/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR FEIXIN K101 IM2BA02 MIPI-DSI LCD PANELS</div><div class='hunk'>@@ -6674,7 +6749,7 @@ M:	Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> M:	Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/drm_aperture.c</div><div class='ctx'> F:	drivers/gpu/drm/tiny/ofdrm.c</div><div class='ctx'> F:	drivers/gpu/drm/tiny/simpledrm.c</div><div class='hunk'>@@ -6693,27 +6768,27 @@ DRM DRIVER FOR GENERIC USB DISPLAY</div><div class='ctx'> M:	Noralf Trønnes &lt;noralf@tronnes.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	https://github.com/notro/gud/wiki</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/gud/</div><div class='ctx'> F:	include/drm/gud.h</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR GRAIN MEDIA GM12U320 PROJECTORS</div><div class='ctx'> M:	Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/tiny/gm12u320.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR HIMAX HX8394 MIPI-DSI LCD panels</div><div class='ctx'> M:	Ondrej Jirman &lt;megi@xff.cz&gt;</div><div class='ctx'> M:	Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-himax-hx8394.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR HX8357D PANELS</div><div class='ctx'> S:	Orphan</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/himax,hx8357d.txt</div><div class='ctx'> F:	drivers/gpu/drm/tiny/hx8357d.c</div><div class='ctx'> </div><div class='hunk'>@@ -6722,20 +6797,20 @@ M:	Deepak Rawat &lt;drawat.floss@gmail.com&gt;</div><div class='ctx'> L:	linux-hyperv@vger.kernel.org</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/hyperv</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR ILITEK ILI9225 PANELS</div><div class='ctx'> M:	David Lechner &lt;david@lechnology.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ilitek,ili9225.txt</div><div class='ctx'> F:	drivers/gpu/drm/tiny/ili9225.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR ILITEK ILI9486 PANELS</div><div class='ctx'> M:	Kamlesh Gurudasani &lt;kamlesh.gurudasani@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ilitek,ili9486.yaml</div><div class='ctx'> F:	drivers/gpu/drm/tiny/ili9486.c</div><div class='ctx'> </div><div class='hunk'>@@ -6751,17 +6826,25 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c</div><div class='ctx'> </div><div class='add'>+DRM DRIVER FOR LG SW43408 PANELS</div><div class='add'>+M:	Sumit Semwal &lt;sumit.semwal@linaro.org&gt;</div><div class='add'>+M:	Caleb Connolly &lt;caleb.connolly@linaro.org&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+F:	Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml</div><div class='add'>+F:	drivers/gpu/drm/panel/panel-lg-sw43408.c</div><div class='add'>+</div><div class='ctx'> DRM DRIVER FOR LOGICVC DISPLAY CONTROLLER</div><div class='ctx'> M:	Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/logicvc/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR LVDS PANELS</div><div class='ctx'> M:	Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/lvds.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/panel-lvds.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-lvds.c</div><div class='hunk'>@@ -6779,13 +6862,13 @@ R:	Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> R:	Jocelyn Falempe &lt;jfalempe@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/mgag200/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR MI0283QT</div><div class='ctx'> M:	Noralf Trønnes &lt;noralf@tronnes.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt</div><div class='ctx'> F:	drivers/gpu/drm/tiny/mi0283qt.c</div><div class='ctx'> </div><div class='hunk'>@@ -6793,11 +6876,29 @@ DRM DRIVER FOR MIPI DBI compatible panels</div><div class='ctx'> M:	Noralf Trønnes &lt;noralf@tronnes.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	https://github.com/notro/panel-mipi-dbi/wiki</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml</div><div class='ctx'> F:	drivers/gpu/drm/tiny/panel-mipi-dbi.c</div><div class='ctx'> </div><div class='del'>-DRM DRIVER FOR MSM ADRENO GPU</div><div class='add'>+DRM DRIVER for Qualcomm Adreno GPUs</div><div class='add'>+M:	Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+R:	Sean Paul &lt;sean@poorly.run&gt;</div><div class='add'>+R:	Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+L:	linux-arm-msm@vger.kernel.org</div><div class='add'>+L:	dri-devel@lists.freedesktop.org</div><div class='add'>+L:	freedreno@lists.freedesktop.org</div><div class='add'>+S:	Maintained</div><div class='add'>+B:	https://gitlab.freedesktop.org/drm/msm/-/issues</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/msm.git</div><div class='add'>+F:	Documentation/devicetree/bindings/display/msm/gpu.yaml</div><div class='add'>+F:	drivers/gpu/drm/msm/adreno/</div><div class='add'>+F:	drivers/gpu/drm/msm/msm_gpu.*</div><div class='add'>+F:	drivers/gpu/drm/msm/msm_gpu_devfreq.*</div><div class='add'>+F:	drivers/gpu/drm/msm/msm_ringbuffer.*</div><div class='add'>+F:	drivers/gpu/drm/msm/registers/adreno/</div><div class='add'>+F:	include/uapi/drm/msm_drm.h</div><div class='add'>+</div><div class='add'>+DRM DRIVER for Qualcomm display hardware</div><div class='ctx'> M:	Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='ctx'> M:	Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;</div><div class='ctx'> M:	Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='hunk'>@@ -6817,28 +6918,28 @@ F:	include/uapi/drm/msm_drm.h</div><div class='ctx'> DRM DRIVER FOR NOVATEK NT35510 PANELS</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-novatek-nt35510.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR NOVATEK NT35560 PANELS</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/sony,acx424akp.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-novatek-nt35560.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR NOVATEK NT36523 PANELS</div><div class='ctx'> M:	Jianhua Lu &lt;lujianhua000@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-novatek-nt36523.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR NOVATEK NT36672A PANELS</div><div class='ctx'> M:	Sumit Semwal &lt;sumit.semwal@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-novatek-nt36672a.c</div><div class='ctx'> </div><div class='hunk'>@@ -6872,7 +6973,7 @@ F:	drivers/gpu/drm/bridge/parade-ps8640.c</div><div class='ctx'> DRM DRIVER FOR PERVASIVE DISPLAYS REPAPER PANELS</div><div class='ctx'> M:	Noralf Trønnes &lt;noralf@tronnes.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/repaper.txt</div><div class='ctx'> F:	drivers/gpu/drm/tiny/repaper.c</div><div class='ctx'> </div><div class='hunk'>@@ -6882,7 +6983,7 @@ M:	Gerd Hoffmann &lt;kraxel@redhat.com&gt;</div><div class='ctx'> L:	virtualization@lists.linux.dev</div><div class='ctx'> S:	Obsolete</div><div class='ctx'> W:	https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/tiny/cirrus.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR QXL VIRTUAL GPU</div><div class='hunk'>@@ -6891,7 +6992,7 @@ M:	Gerd Hoffmann &lt;kraxel@redhat.com&gt;</div><div class='ctx'> L:	virtualization@lists.linux.dev</div><div class='ctx'> L:	spice-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/qxl/</div><div class='ctx'> F:	include/uapi/drm/qxl_drm.h</div><div class='ctx'> </div><div class='hunk'>@@ -6904,7 +7005,7 @@ F:	drivers/gpu/drm/panel/panel-raydium-rm67191.c</div><div class='ctx'> DRM DRIVER FOR SAMSUNG DB7430 PANELS</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-samsung-db7430.c</div><div class='ctx'> </div><div class='hunk'>@@ -6913,7 +7014,7 @@ M:	Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='ctx'> M:	Jagan Teki &lt;jagan@amarulasolutions.com&gt;</div><div class='ctx'> M:	Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml</div><div class='ctx'> F:	drivers/gpu/drm/bridge/samsung-dsim.c</div><div class='ctx'> F:	include/drm/bridge/samsung-dsim.h</div><div class='hunk'>@@ -6933,7 +7034,7 @@ F:	drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c</div><div class='ctx'> DRM DRIVER FOR SITRONIX ST7586 PANELS</div><div class='ctx'> M:	David Lechner &lt;david@lechnology.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/sitronix,st7586.txt</div><div class='ctx'> F:	drivers/gpu/drm/tiny/st7586.c</div><div class='ctx'> </div><div class='hunk'>@@ -6954,14 +7055,14 @@ F:	drivers/gpu/drm/panel/panel-sitronix-st7703.c</div><div class='ctx'> DRM DRIVER FOR SITRONIX ST7735R PANELS</div><div class='ctx'> M:	David Lechner &lt;david@lechnology.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/sitronix,st7735r.yaml</div><div class='ctx'> F:	drivers/gpu/drm/tiny/st7735r.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR SOLOMON SSD130X OLED DISPLAYS</div><div class='ctx'> M:	Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/solomon,ssd-common.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/solomon,ssd13*.yaml</div><div class='ctx'> F:	drivers/gpu/drm/solomon/ssd130x*</div><div class='hunk'>@@ -6969,7 +7070,7 @@ F:	drivers/gpu/drm/solomon/ssd130x*</div><div class='ctx'> DRM DRIVER FOR ST-ERICSSON MCDE</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ste,mcde.yaml</div><div class='ctx'> F:	drivers/gpu/drm/mcde/</div><div class='ctx'> </div><div class='hunk'>@@ -6993,7 +7094,7 @@ F:	drivers/gpu/drm/bridge/ti-sn65dsi86.c</div><div class='ctx'> DRM DRIVER FOR TPO TPG110 PANELS</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-tpo-tpg110.c</div><div class='ctx'> </div><div class='hunk'>@@ -7003,7 +7104,7 @@ R:	Sean Paul &lt;sean@poorly.run&gt;</div><div class='ctx'> R:	Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/udl/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR VIRTUAL KERNEL MODESETTING (VKMS)</div><div class='hunk'>@@ -7014,7 +7115,7 @@ R:	Haneen Mohammed &lt;hamohammed.sa@gmail.com&gt;</div><div class='ctx'> R:	Daniel Vetter &lt;daniel@ffwll.ch&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/gpu/vkms.rst</div><div class='ctx'> F:	drivers/gpu/drm/vkms/</div><div class='ctx'> </div><div class='hunk'>@@ -7022,7 +7123,7 @@ DRM DRIVER FOR VIRTUALBOX VIRTUAL GPU</div><div class='ctx'> M:	Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/vboxvideo/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR VMWARE VIRTUAL GPU</div><div class='hunk'>@@ -7030,14 +7131,14 @@ M:	Zack Rusin &lt;zack.rusin@broadcom.com&gt;</div><div class='ctx'> R:	Broadcom internal kernel review list &lt;bcm-kernel-feedback-list@broadcom.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/vmwgfx/</div><div class='ctx'> F:	include/uapi/drm/vmwgfx_drm.h</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR WIDECHIPS WS2401 PANELS</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-widechips-ws2401.c</div><div class='ctx'> </div><div class='hunk'>@@ -7062,8 +7163,8 @@ M:	Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;</div><div class='ctx'> M:	Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> M:	Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-W:	https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-misc.html</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+W:	https://drm.pages.freedesktop.org/maintainer-tools/drm-misc.html</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/</div><div class='ctx'> F:	Documentation/devicetree/bindings/gpu/</div><div class='ctx'> F:	Documentation/gpu/</div><div class='hunk'>@@ -7090,7 +7191,7 @@ M:	Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> M:	Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/allwinner*</div><div class='ctx'> F:	drivers/gpu/drm/sun4i/</div><div class='ctx'> </div><div class='hunk'>@@ -7100,7 +7201,7 @@ L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	linux-amlogic@lists.infradead.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	http://linux-meson.com/</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml</div><div class='ctx'> F:	Documentation/gpu/meson.rst</div><div class='hunk'>@@ -7112,7 +7213,7 @@ M:	Sam Ravnborg &lt;sam@ravnborg.org&gt;</div><div class='ctx'> M:	Boris Brezillon &lt;bbrezillon@kernel.org&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/atmel/</div><div class='ctx'> F:	drivers/gpu/drm/atmel-hlcdc/</div><div class='ctx'> </div><div class='hunk'>@@ -7124,7 +7225,7 @@ R:	Laurent Pinchart &lt;Laurent.pinchart@ideasonboard.com&gt;</div><div class='ctx'> R:	Jonas Karlman &lt;jonas@kwiboo.se&gt;</div><div class='ctx'> R:	Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/bridge/</div><div class='ctx'> F:	drivers/gpu/drm/bridge/</div><div class='ctx'> F:	drivers/gpu/drm/drm_bridge.c</div><div class='hunk'>@@ -7149,7 +7250,7 @@ M:	Stefan Agner &lt;stefan@agner.ch&gt;</div><div class='ctx'> M:	Alison Wang &lt;alison.wang@nxp.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/fsl,dcu.txt</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/fsl,tcon.txt</div><div class='ctx'> F:	drivers/gpu/drm/fsl-dcu/</div><div class='hunk'>@@ -7158,7 +7259,7 @@ DRM DRIVERS FOR FREESCALE IMX 5/6</div><div class='ctx'> M:	Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> T:	git git://git.pengutronix.de/git/pza/linux</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/imx/</div><div class='ctx'> F:	drivers/gpu/drm/imx/ipuv3/</div><div class='hunk'>@@ -7178,7 +7279,7 @@ DRM DRIVERS FOR GMA500 (Poulsbo, Moorestown and derivative chipsets)</div><div class='ctx'> M:	Patrik Jakobsson &lt;patrik.r.jakobsson@gmail.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/gma500/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVERS FOR HISILICON</div><div class='hunk'>@@ -7190,7 +7291,7 @@ R:	Yongqin Liu &lt;yongqin.liu@linaro.org&gt;</div><div class='ctx'> R:	John Stultz &lt;jstultz@google.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/hisilicon/</div><div class='ctx'> F:	drivers/gpu/drm/hisilicon/</div><div class='ctx'> </div><div class='hunk'>@@ -7199,7 +7300,7 @@ M:	Qiang Yu &lt;yuq825@gmail.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	lima@lists.freedesktop.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/lima/</div><div class='ctx'> F:	include/uapi/drm/lima_drm.h</div><div class='ctx'> </div><div class='hunk'>@@ -7207,7 +7308,7 @@ DRM DRIVERS FOR LOONGSON</div><div class='ctx'> M:	Sui Jingfeng &lt;suijingfeng@loongson.cn&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/loongson/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVERS FOR MEDIATEK</div><div class='hunk'>@@ -7255,7 +7356,7 @@ M:	Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	linux-renesas-soc@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml</div><div class='ctx'> F:	drivers/gpu/drm/renesas/rz-du/</div><div class='ctx'> </div><div class='hunk'>@@ -7265,7 +7366,7 @@ M:	Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	linux-renesas-soc@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/renesas,shmobile-lcdc.yaml</div><div class='ctx'> F:	drivers/gpu/drm/renesas/shmobile/</div><div class='ctx'> F:	include/linux/platform_data/shmob_drm.h</div><div class='hunk'>@@ -7276,7 +7377,7 @@ M:	Heiko Stübner &lt;heiko@sntech.de&gt;</div><div class='ctx'> M:	Andy Yan &lt;andy.yan@rock-chips.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/rockchip/</div><div class='ctx'> F:	drivers/gpu/drm/ci/xfails/rockchip*</div><div class='ctx'> F:	drivers/gpu/drm/rockchip/</div><div class='hunk'>@@ -7285,7 +7386,7 @@ DRM DRIVERS FOR STI</div><div class='ctx'> M:	Alain Volmat &lt;alain.volmat@foss.st.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/st,stih4xx.txt</div><div class='ctx'> F:	drivers/gpu/drm/sti</div><div class='ctx'> </div><div class='hunk'>@@ -7295,7 +7396,7 @@ M:	Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;</div><div class='ctx'> M:	Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml</div><div class='ctx'> F:	drivers/gpu/drm/stm</div><div class='ctx'> </div><div class='hunk'>@@ -7304,7 +7405,7 @@ M:	Jyri Sarha &lt;jyri.sarha@iki.fi&gt;</div><div class='ctx'> M:	Tomi Valkeinen &lt;tomi.valkeinen@ideasonboard.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml</div><div class='hunk'>@@ -7315,7 +7416,7 @@ M:	Jyri Sarha &lt;jyri.sarha@iki.fi&gt;</div><div class='ctx'> M:	Tomi Valkeinen &lt;tomi.valkeinen@ideasonboard.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/tilcdc/</div><div class='ctx'> F:	drivers/gpu/drm/tilcdc/</div><div class='ctx'> </div><div class='hunk'>@@ -7323,7 +7424,7 @@ DRM DRIVERS FOR TI OMAP</div><div class='ctx'> M:	Tomi Valkeinen &lt;tomi.valkeinen@ideasonboard.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/ti/</div><div class='ctx'> F:	drivers/gpu/drm/omapdrm/</div><div class='ctx'> </div><div class='hunk'>@@ -7331,7 +7432,7 @@ DRM DRIVERS FOR V3D</div><div class='ctx'> M:	Melissa Wen &lt;mwen@igalia.com&gt;</div><div class='ctx'> M:	Maíra Canal &lt;mcanal@igalia.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</div><div class='ctx'> F:	drivers/gpu/drm/v3d/</div><div class='ctx'> F:	include/uapi/drm/v3d_drm.h</div><div class='hunk'>@@ -7340,7 +7441,7 @@ DRM DRIVERS FOR VC4</div><div class='ctx'> M:	Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git git://github.com/anholt/linux</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/brcm,bcm2835-*.yaml</div><div class='ctx'> F:	drivers/gpu/drm/vc4/</div><div class='ctx'> F:	include/uapi/drm/vc4_drm.h</div><div class='hunk'>@@ -7361,15 +7462,16 @@ M:	Oleksandr Andrushchenko &lt;oleksandr_andrushchenko@epam.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	xen-devel@lists.xenproject.org (moderated for non-subscribers)</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/gpu/xen-front.rst</div><div class='ctx'> F:	drivers/gpu/drm/xen/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVERS FOR XILINX</div><div class='ctx'> M:	Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='add'>+M:	Tomi Valkeinen &lt;tomi.valkeinen@ideasonboard.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/xlnx/</div><div class='ctx'> F:	drivers/gpu/drm/xlnx/</div><div class='ctx'> </div><div class='hunk'>@@ -7378,7 +7480,7 @@ M:	Luben Tuikov &lt;ltuikov89@gmail.com&gt;</div><div class='ctx'> M:	Matthew Brost &lt;matthew.brost@intel.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/scheduler/</div><div class='ctx'> F:	include/drm/gpu_scheduler.h</div><div class='ctx'> </div><div class='hunk'>@@ -7388,7 +7490,7 @@ R:	Jessica Zhang &lt;quic_jesszhan@quicinc.com&gt;</div><div class='ctx'> R:	Sam Ravnborg &lt;sam@ravnborg.org&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/</div><div class='ctx'> F:	drivers/gpu/drm/drm_panel.c</div><div class='ctx'> F:	drivers/gpu/drm/panel/</div><div class='hunk'>@@ -7398,7 +7500,7 @@ DRM PRIVACY-SCREEN CLASS</div><div class='ctx'> M:	Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/drm_privacy_screen*</div><div class='ctx'> F:	include/drm/drm_privacy_screen*</div><div class='ctx'> </div><div class='hunk'>@@ -7407,7 +7509,7 @@ M:	Christian Koenig &lt;christian.koenig@amd.com&gt;</div><div class='ctx'> M:	Huang Rui &lt;ray.huang@amd.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/ttm/</div><div class='ctx'> F:	include/drm/ttm/</div><div class='ctx'> </div><div class='hunk'>@@ -7415,7 +7517,7 @@ DRM AUTOMATED TESTING</div><div class='ctx'> M:	Helen Koike &lt;helen.koike@collabora.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/gpu/automated_testing.rst</div><div class='ctx'> F:	drivers/gpu/drm/ci/</div><div class='ctx'> </div><div class='hunk'>@@ -7829,9 +7931,8 @@ W:	http://aeschi.ch.eu.org/efs/</div><div class='ctx'> F:	fs/efs/</div><div class='ctx'> </div><div class='ctx'> EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER</div><div class='del'>-M:	Douglas Miller &lt;dougmill@linux.ibm.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='del'>-S:	Maintained</div><div class='add'>+S:	Orphan</div><div class='ctx'> F:	drivers/net/ethernet/ibm/ehea/</div><div class='ctx'> </div><div class='ctx'> ELM327 CAN NETWORK DRIVER</div><div class='hunk'>@@ -8439,8 +8540,6 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/har</div><div class='ctx'> F:	include/linux/fortify-string.h</div><div class='ctx'> F:	lib/fortify_kunit.c</div><div class='ctx'> F:	lib/memcpy_kunit.c</div><div class='del'>-F:	lib/strcat_kunit.c</div><div class='del'>-F:	lib/strscpy_kunit.c</div><div class='ctx'> F:	lib/test_fortify/*</div><div class='ctx'> F:	scripts/test_fortify.sh</div><div class='ctx'> K:	\b__NO_FORTIFY\b</div><div class='hunk'>@@ -8481,7 +8580,7 @@ F:	arch/x86/math-emu/</div><div class='ctx'> FRAMEBUFFER CORE</div><div class='ctx'> M:	Daniel Vetter &lt;daniel@ffwll.ch&gt;</div><div class='ctx'> S:	Odd Fixes</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/video/fbdev/core/</div><div class='ctx'> </div><div class='ctx'> FRAMEBUFFER LAYER</div><div class='hunk'>@@ -9576,7 +9675,7 @@ F:	kernel/power/</div><div class='ctx'> </div><div class='ctx'> HID CORE LAYER</div><div class='ctx'> M:	Jiri Kosina &lt;jikos@kernel.org&gt;</div><div class='del'>-M:	Benjamin Tissoires &lt;benjamin.tissoires@redhat.com&gt;</div><div class='add'>+M:	Benjamin Tissoires &lt;bentiss@kernel.org&gt;</div><div class='ctx'> L:	linux-input@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git</div><div class='hunk'>@@ -10583,7 +10682,7 @@ IMGTEC POWERVR DRM DRIVER</div><div class='ctx'> M:	Frank Binns &lt;frank.binns@imgtec.com&gt;</div><div class='ctx'> M:	Matt Coster &lt;matt.coster@imgtec.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml</div><div class='ctx'> F:	Documentation/gpu/imagination/</div><div class='hunk'>@@ -10603,7 +10702,7 @@ S:	Orphan</div><div class='ctx'> F:	drivers/video/fbdev/imsttfb.c</div><div class='ctx'> </div><div class='ctx'> INDEX OF FURTHER KERNEL DOCUMENTATION</div><div class='del'>-M:	Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+M:	Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/process/kernel-docs.rst</div><div class='ctx'> </div><div class='hunk'>@@ -10888,6 +10987,7 @@ L:	linux-gpio@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git</div><div class='ctx'> F:	drivers/gpio/gpio-elkhartlake.c</div><div class='add'>+F:	drivers/gpio/gpio-graniterapids.c</div><div class='ctx'> F:	drivers/gpio/gpio-ich.c</div><div class='ctx'> F:	drivers/gpio/gpio-merrifield.c</div><div class='ctx'> F:	drivers/gpio/gpio-ml-ioh.c</div><div class='hunk'>@@ -11364,7 +11464,7 @@ IOSYS-MAP HELPERS</div><div class='ctx'> M:	Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	include/linux/iosys-map.h</div><div class='ctx'> </div><div class='ctx'> IO_URING</div><div class='hunk'>@@ -11432,6 +11532,7 @@ S:	Maintained</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core</div><div class='ctx'> F:	Documentation/core-api/irq/irq-domain.rst</div><div class='ctx'> F:	include/linux/irqdomain.h</div><div class='add'>+F:	include/linux/irqdomain_defs.h</div><div class='ctx'> F:	kernel/irq/irqdomain.c</div><div class='ctx'> F:	kernel/irq/msi.c</div><div class='ctx'> </div><div class='hunk'>@@ -11441,6 +11542,10 @@ L:	linux-kernel@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core</div><div class='ctx'> F:	include/linux/group_cpus.h</div><div class='add'>+F:	include/linux/irq.h</div><div class='add'>+F:	include/linux/irqhandler.h</div><div class='add'>+F:	include/linux/irqnr.h</div><div class='add'>+F:	include/linux/irqreturn.h</div><div class='ctx'> F:	kernel/irq/</div><div class='ctx'> F:	lib/group_cpus.c</div><div class='ctx'> </div><div class='hunk'>@@ -11451,6 +11556,7 @@ S:	Maintained</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core</div><div class='ctx'> F:	Documentation/devicetree/bindings/interrupt-controller/</div><div class='ctx'> F:	drivers/irqchip/</div><div class='add'>+F:	include/linux/irqchip.h</div><div class='ctx'> </div><div class='ctx'> ISA</div><div class='ctx'> M:	William Breathitt Gray &lt;william.gray@linaro.org&gt;</div><div class='hunk'>@@ -11557,7 +11663,7 @@ ITE IT66121 HDMI BRIDGE DRIVER</div><div class='ctx'> M:	Phong LE &lt;ple@baylibre.com&gt;</div><div class='ctx'> M:	Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml</div><div class='ctx'> F:	drivers/gpu/drm/bridge/ite-it66121.c</div><div class='ctx'> </div><div class='hunk'>@@ -12014,6 +12120,15 @@ S:	Maintained</div><div class='ctx'> F:	include/keys/trusted_caam.h</div><div class='ctx'> F:	security/keys/trusted-keys/trusted_caam.c</div><div class='ctx'> </div><div class='add'>+KEYS-TRUSTED-DCP</div><div class='add'>+M:	David Gstir &lt;david@sigma-star.at&gt;</div><div class='add'>+R:	sigma star Kernel Team &lt;upstream+dcp@sigma-star.at&gt;</div><div class='add'>+L:	linux-integrity@vger.kernel.org</div><div class='add'>+L:	keyrings@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	include/keys/trusted_dcp.h</div><div class='add'>+F:	security/keys/trusted-keys/trusted_dcp.c</div><div class='add'>+</div><div class='ctx'> KEYS-TRUSTED-TEE</div><div class='ctx'> M:	Sumit Garg &lt;sumit.garg@linaro.org&gt;</div><div class='ctx'> L:	linux-integrity@vger.kernel.org</div><div class='hunk'>@@ -12041,6 +12156,7 @@ M:	Mimi Zohar &lt;zohar@linux.ibm.com&gt;</div><div class='ctx'> L:	linux-integrity@vger.kernel.org</div><div class='ctx'> L:	keyrings@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='add'>+W:	https://kernsec.org/wiki/index.php/Linux_Kernel_Integrity</div><div class='ctx'> F:	security/integrity/platform_certs</div><div class='ctx'> </div><div class='ctx'> KFENCE</div><div class='hunk'>@@ -12387,6 +12503,26 @@ F:	drivers/ata/</div><div class='ctx'> F:	include/linux/ata.h</div><div class='ctx'> F:	include/linux/libata.h</div><div class='ctx'> </div><div class='add'>+LIBETH COMMON ETHERNET LIBRARY</div><div class='add'>+M:	Alexander Lobakin &lt;aleksander.lobakin@intel.com&gt;</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+L:	intel-wired-lan@lists.osuosl.org (moderated for non-subscribers)</div><div class='add'>+S:	Supported</div><div class='add'>+T:	git https://github.com/alobakin/linux.git</div><div class='add'>+F:	drivers/net/ethernet/intel/libeth/</div><div class='add'>+F:	include/net/libeth/</div><div class='add'>+K:	libeth</div><div class='add'>+</div><div class='add'>+LIBIE COMMON INTEL ETHERNET LIBRARY</div><div class='add'>+M:	Alexander Lobakin &lt;aleksander.lobakin@intel.com&gt;</div><div class='add'>+L:	intel-wired-lan@lists.osuosl.org (moderated for non-subscribers)</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+T:	git https://github.com/alobakin/linux.git</div><div class='add'>+F:	drivers/net/ethernet/intel/libie/</div><div class='add'>+F:	include/linux/net/intel/libie/</div><div class='add'>+K:	libie</div><div class='add'>+</div><div class='ctx'> LIBNVDIMM BTT: BLOCK TRANSLATION TABLE</div><div class='ctx'> M:	Vishal Verma &lt;vishal.l.verma@intel.com&gt;</div><div class='ctx'> M:	Dan Williams &lt;dan.j.williams@intel.com&gt;</div><div class='hunk'>@@ -13731,6 +13867,7 @@ M:	Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='ctx'> L:	linux-bluetooth@vger.kernel.org</div><div class='ctx'> L:	linux-mediatek@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/net/mediatek-bluetooth.txt</div><div class='ctx'> F:	drivers/bluetooth/btmtkuart.c</div><div class='ctx'> </div><div class='hunk'>@@ -14564,6 +14701,14 @@ S:	Supported</div><div class='ctx'> F:	Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml</div><div class='ctx'> F:	drivers/pwm/pwm-atmel.c</div><div class='ctx'> </div><div class='add'>+MICROCHIP SAM9x7-COMPATIBLE LVDS CONTROLLER</div><div class='add'>+M:	Manikandan Muralidharan &lt;manikandan.m@microchip.com&gt;</div><div class='add'>+M:	Dharma Balasubiramani &lt;dharma.b@microchip.com&gt;</div><div class='add'>+L:	dri-devel@lists.freedesktop.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml</div><div class='add'>+F:	drivers/gpu/drm/bridge/microchip-lvds.c</div><div class='add'>+</div><div class='ctx'> MICROCHIP SAMA5D2-COMPATIBLE ADC DRIVER</div><div class='ctx'> M:	Eugen Hristev &lt;eugen.hristev@microchip.com&gt;</div><div class='ctx'> L:	linux-iio@vger.kernel.org</div><div class='hunk'>@@ -15151,7 +15296,7 @@ M:	Marek Vasut &lt;marex@denx.de&gt;</div><div class='ctx'> M:	Stefan Agner &lt;stefan@agner.ch&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/fsl,lcdif.yaml</div><div class='ctx'> F:	drivers/gpu/drm/mxsfb/</div><div class='ctx'> </div><div class='hunk'>@@ -15163,9 +15308,8 @@ F:	drivers/scsi/myrb.*</div><div class='ctx'> F:	drivers/scsi/myrs.*</div><div class='ctx'> </div><div class='ctx'> MYRICOM MYRI-10G 10GbE DRIVER (MYRI10GE)</div><div class='del'>-M:	Chris Lee &lt;christopher.lee@cspi.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='del'>-S:	Supported</div><div class='add'>+S:	Orphan</div><div class='ctx'> W:	https://www.cspi.com/ethernet-products/support/downloads/</div><div class='ctx'> F:	drivers/net/ethernet/myricom/myri10ge/</div><div class='ctx'> </div><div class='hunk'>@@ -15261,6 +15405,7 @@ F:	net/*/netfilter.c</div><div class='ctx'> F:	net/*/netfilter/</div><div class='ctx'> F:	net/bridge/br_netfilter*.c</div><div class='ctx'> F:	net/netfilter/</div><div class='add'>+F:	tools/testing/selftests/net/netfilter/</div><div class='ctx'> </div><div class='ctx'> NETROM NETWORK LAYER</div><div class='ctx'> M:	Ralf Baechle &lt;ralf@linux-mips.org&gt;</div><div class='hunk'>@@ -15872,7 +16017,7 @@ M:	Laurentiu Palcu &lt;laurentiu.palcu@oss.nxp.com&gt;</div><div class='ctx'> R:	Lucas Stach &lt;l.stach@pengutronix.de&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml</div><div class='ctx'> F:	drivers/gpu/drm/imx/dcss/</div><div class='ctx'> </div><div class='hunk'>@@ -16801,12 +16946,6 @@ S:	Maintained</div><div class='ctx'> F:	drivers/leds/leds-pca9532.c</div><div class='ctx'> F:	include/linux/leds-pca9532.h</div><div class='ctx'> </div><div class='del'>-PCA9541 I2C BUS MASTER SELECTOR DRIVER</div><div class='del'>-M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='del'>-L:	linux-i2c@vger.kernel.org</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	drivers/i2c/muxes/i2c-mux-pca9541.c</div><div class='del'>-</div><div class='ctx'> PCI DRIVER FOR AARDVARK (Marvell Armada 3700)</div><div class='ctx'> M:	Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;</div><div class='ctx'> M:	Pali Rohár &lt;pali@kernel.org&gt;</div><div class='hunk'>@@ -17775,6 +17914,14 @@ F:	include/net/psample.h</div><div class='ctx'> F:	include/uapi/linux/psample.h</div><div class='ctx'> F:	net/psample</div><div class='ctx'> </div><div class='add'>+PSE NETWORK DRIVER</div><div class='add'>+M:	Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;</div><div class='add'>+M:	Kory Maincent &lt;kory.maincent@bootlin.com&gt;</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/net/pse-pd/</div><div class='add'>+F:	drivers/net/pse-pd/</div><div class='add'>+</div><div class='ctx'> PSTORE FILESYSTEM</div><div class='ctx'> M:	Kees Cook &lt;keescook@chromium.org&gt;</div><div class='ctx'> R:	Tony Luck &lt;tony.luck@intel.com&gt;</div><div class='hunk'>@@ -17875,7 +18022,7 @@ F:	Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml</div><div class='ctx'> F:	drivers/media/rc/pwm-ir-tx.c</div><div class='ctx'> </div><div class='ctx'> PWM SUBSYSTEM</div><div class='del'>-M:	Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;</div><div class='add'>+M:	Uwe Kleine-König &lt;ukleinek@kernel.org&gt;</div><div class='ctx'> L:	linux-pwm@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> Q:	https://patchwork.ozlabs.org/project/linux-pwm/list/</div><div class='hunk'>@@ -17999,7 +18146,6 @@ S:	Supported</div><div class='ctx'> F:	drivers/scsi/qedi/</div><div class='ctx'> </div><div class='ctx'> QLOGIC QL4xxx ETHERNET DRIVER</div><div class='del'>-M:	Ariel Elior &lt;aelior@marvell.com&gt;</div><div class='ctx'> M:	Manish Chopra &lt;manishc@marvell.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -18009,7 +18155,6 @@ F:	include/linux/qed/</div><div class='ctx'> </div><div class='ctx'> QLOGIC QL4xxx RDMA DRIVER</div><div class='ctx'> M:	Michal Kalderon &lt;mkalderon@marvell.com&gt;</div><div class='del'>-M:	Ariel Elior &lt;aelior@marvell.com&gt;</div><div class='ctx'> L:	linux-rdma@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/infiniband/hw/qedr/</div><div class='hunk'>@@ -18175,7 +18320,7 @@ R:	Pranjal Ramajor Asha Kanojiya &lt;quic_pkanojiy@quicinc.com&gt;</div><div class='ctx'> L:	linux-arm-msm@vger.kernel.org</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/accel/qaic/</div><div class='ctx'> F:	drivers/accel/qaic/</div><div class='ctx'> F:	include/uapi/drm/qaic_accel.h</div><div class='hunk'>@@ -18587,7 +18732,7 @@ F:	tools/testing/selftests/resctrl/</div><div class='ctx'> READ-COPY UPDATE (RCU)</div><div class='ctx'> M:	"Paul E. McKenney" &lt;paulmck@kernel.org&gt;</div><div class='ctx'> M:	Frederic Weisbecker &lt;frederic@kernel.org&gt; (kernel/rcu/tree_nocb.h)</div><div class='del'>-M:	Neeraj Upadhyay &lt;quic_neeraju@quicinc.com&gt; (kernel/rcu/tasks.h)</div><div class='add'>+M:	Neeraj Upadhyay &lt;neeraj.upadhyay@kernel.org&gt; (kernel/rcu/tasks.h)</div><div class='ctx'> M:	Joel Fernandes &lt;joel@joelfernandes.org&gt;</div><div class='ctx'> M:	Josh Triplett &lt;josh@joshtriplett.org&gt;</div><div class='ctx'> M:	Boqun Feng &lt;boqun.feng@gmail.com&gt;</div><div class='hunk'>@@ -18840,6 +18985,12 @@ F:	include/dt-bindings/net/pcs-rzn1-miic.h</div><div class='ctx'> F:	include/linux/pcs-rzn1-miic.h</div><div class='ctx'> F:	net/dsa/tag_rzn1_a5psw.c</div><div class='ctx'> </div><div class='add'>+RENESAS RZ/N1 DWMAC GLUE LAYER</div><div class='add'>+M:	Romain Gantois &lt;romain.gantois@bootlin.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml</div><div class='add'>+F:	drivers/net/ethernet/stmicro/stmmac/dwmac-rzn1.c</div><div class='add'>+</div><div class='ctx'> RENESAS RZ/N1 RTC CONTROLLER DRIVER</div><div class='ctx'> M:	Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='ctx'> L:	linux-rtc@vger.kernel.org</div><div class='hunk'>@@ -18953,6 +19104,20 @@ S:	Maintained</div><div class='ctx'> F:	drivers/mtd/nand/raw/r852.c</div><div class='ctx'> F:	drivers/mtd/nand/raw/r852.h</div><div class='ctx'> </div><div class='add'>+RISC-V AIA DRIVERS</div><div class='add'>+M:	Anup Patel &lt;anup@brainfault.org&gt;</div><div class='add'>+L:	linux-riscv@lists.infradead.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml</div><div class='add'>+F:	drivers/irqchip/irq-riscv-aplic-*.c</div><div class='add'>+F:	drivers/irqchip/irq-riscv-aplic-*.h</div><div class='add'>+F:	drivers/irqchip/irq-riscv-imsic-*.c</div><div class='add'>+F:	drivers/irqchip/irq-riscv-imsic-*.h</div><div class='add'>+F:	drivers/irqchip/irq-riscv-intc.c</div><div class='add'>+F:	include/linux/irqchip/riscv-aplic.h</div><div class='add'>+F:	include/linux/irqchip/riscv-imsic.h</div><div class='add'>+</div><div class='ctx'> RISC-V ARCHITECTURE</div><div class='ctx'> M:	Paul Walmsley &lt;paul.walmsley@sifive.com&gt;</div><div class='ctx'> M:	Palmer Dabbelt &lt;palmer@dabbelt.com&gt;</div><div class='hunk'>@@ -19077,6 +19242,13 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/media/rockchip-rga.yaml</div><div class='ctx'> F:	drivers/media/platform/rockchip/rga/</div><div class='ctx'> </div><div class='add'>+ROCKCHIP RK3308 INTERNAL AUDIO CODEC</div><div class='add'>+M:	Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml</div><div class='add'>+F:	sound/soc/codecs/rk3308_codec.c</div><div class='add'>+F:	sound/soc/codecs/rk3308_codec.h</div><div class='add'>+</div><div class='ctx'> ROCKCHIP VIDEO DECODER DRIVER</div><div class='ctx'> M:	Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='hunk'>@@ -19851,6 +20023,10 @@ Q:	https://patchwork.kernel.org/project/linux-security-module/list</div><div class='ctx'> B:	mailto:linux-security-module@vger.kernel.org</div><div class='ctx'> P:	https://github.com/LinuxSecurityModule/kernel/blob/main/README.md</div><div class='ctx'> T:	git https://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/lsm.git</div><div class='add'>+F:	include/linux/lsm_audit.h</div><div class='add'>+F:	include/linux/lsm_hook_defs.h</div><div class='add'>+F:	include/linux/lsm_hooks.h</div><div class='add'>+F:	include/linux/security.h</div><div class='ctx'> F:	include/uapi/linux/lsm.h</div><div class='ctx'> F:	security/</div><div class='ctx'> F:	tools/testing/selftests/lsm/</div><div class='hunk'>@@ -20179,7 +20355,6 @@ F:	include/linux/platform_data/simplefb.h</div><div class='ctx'> </div><div class='ctx'> SIOX</div><div class='ctx'> M:	Thorsten Scherer &lt;t.scherer@eckelmann.de&gt;</div><div class='del'>-M:	Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;</div><div class='ctx'> R:	Pengutronix Kernel Team &lt;kernel@pengutronix.de&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/gpio/gpio-siox.c</div><div class='hunk'>@@ -20658,6 +20833,12 @@ F:	include/trace/events/sof*.h</div><div class='ctx'> F:	include/uapi/sound/asoc.h</div><div class='ctx'> F:	sound/soc/</div><div class='ctx'> </div><div class='add'>+SOUND - SOC LAYER / dapm-graph</div><div class='add'>+M:	Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;</div><div class='add'>+L:	linux-sound@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	tools/sound/dapm-graph</div><div class='add'>+</div><div class='ctx'> SOUND - SOUND OPEN FIRMWARE (SOF) DRIVERS</div><div class='ctx'> M:	Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;</div><div class='ctx'> M:	Liam Girdwood &lt;lgirdwood@gmail.com&gt;</div><div class='hunk'>@@ -20692,7 +20873,7 @@ Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='ctx'> F:	drivers/media/dvb-frontends/sp2*</div><div class='ctx'> </div><div class='ctx'> SPANISH DOCUMENTATION</div><div class='del'>-M:	Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+M:	Carlos Bilbao &lt;carlos.bilbao.osdev@gmail.com&gt;</div><div class='ctx'> R:	Avadhut Naik &lt;avadhut.naik@amd.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/translations/sp_SP/</div><div class='hunk'>@@ -20844,6 +21025,13 @@ T:	git git://linuxtv.org/media_tree.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml</div><div class='ctx'> F:	drivers/media/i2c/st-mipid02.c</div><div class='ctx'> </div><div class='add'>+ST STM32 FIREWALL</div><div class='add'>+M:	Gatien Chevallier &lt;gatien.chevallier@foss.st.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/bus/stm32_etzpc.c</div><div class='add'>+F:	drivers/bus/stm32_firewall.c</div><div class='add'>+F:	drivers/bus/stm32_rifsc.c</div><div class='add'>+</div><div class='ctx'> ST STM32 I2C/SMBUS DRIVER</div><div class='ctx'> M:	Pierre-Yves MORDRET &lt;pierre-yves.mordret@foss.st.com&gt;</div><div class='ctx'> M:	Alain Volmat &lt;alain.volmat@foss.st.com&gt;</div><div class='hunk'>@@ -21327,7 +21515,7 @@ R:	Gustavo Padovan &lt;gustavo@padovan.org&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/driver-api/sync_file.rst</div><div class='ctx'> F:	drivers/dma-buf/dma-fence*</div><div class='ctx'> F:	drivers/dma-buf/sw_sync.c</div><div class='hunk'>@@ -21486,6 +21674,7 @@ F:	drivers/cpufreq/sc[mp]i-cpufreq.c</div><div class='ctx'> F:	drivers/firmware/arm_scmi/</div><div class='ctx'> F:	drivers/firmware/arm_scpi.c</div><div class='ctx'> F:	drivers/hwmon/scmi-hwmon.c</div><div class='add'>+F:	drivers/pinctrl/pinctrl-scmi.c</div><div class='ctx'> F:	drivers/pmdomain/arm/</div><div class='ctx'> F:	drivers/powercap/arm_scmi_powercap.c</div><div class='ctx'> F:	drivers/regulator/scmi-regulator.c</div><div class='hunk'>@@ -21672,6 +21861,7 @@ TEAM DRIVER</div><div class='ctx'> M:	Jiri Pirko &lt;jiri@resnulli.us&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='add'>+F:	Documentation/netlink/specs/team.yaml</div><div class='ctx'> F:	drivers/net/team/</div><div class='ctx'> F:	include/linux/if_team.h</div><div class='ctx'> F:	include/uapi/linux/if_team.h</div><div class='hunk'>@@ -21717,6 +21907,7 @@ F:	Documentation/driver-api/tee.rst</div><div class='ctx'> F:	Documentation/tee/</div><div class='ctx'> F:	Documentation/userspace-api/tee.rst</div><div class='ctx'> F:	drivers/tee/</div><div class='add'>+F:	include/linux/tee_core.h</div><div class='ctx'> F:	include/linux/tee_drv.h</div><div class='ctx'> F:	include/uapi/linux/tee.h</div><div class='ctx'> </div><div class='hunk'>@@ -21735,6 +21926,11 @@ M:	Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/clk/tegra/</div><div class='ctx'> </div><div class='add'>+TEGRA CRYPTO DRIVERS</div><div class='add'>+M:	Akhil R &lt;akhilrajeev@nvidia.com&gt;</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/crypto/tegra/*</div><div class='add'>+</div><div class='ctx'> TEGRA DMA DRIVERS</div><div class='ctx'> M:	Laxman Dewangan &lt;ldewangan@nvidia.com&gt;</div><div class='ctx'> M:	Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='hunk'>@@ -21851,7 +22047,7 @@ F:	Documentation/devicetree/bindings/sound/tas2552.txt</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/tas2562.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/tas2770.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/tas27xx.yaml</div><div class='del'>-F:	Documentation/devicetree/bindings/sound/ti,pcm1681.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/sound/ti,pcm1681.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/ti,tlv320*.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/tlv320adcx140.yaml</div><div class='hunk'>@@ -21928,7 +22124,7 @@ F:	include/linux/soc/ti/ti_sci_inta_msi.h</div><div class='ctx'> F:	include/linux/soc/ti/ti_sci_protocol.h</div><div class='ctx'> </div><div class='ctx'> TEXAS INSTRUMENTS' TMP117 TEMPERATURE SENSOR DRIVER</div><div class='del'>-M:	Puranjay Mohan &lt;puranjay12@gmail.com&gt;</div><div class='add'>+M:	Puranjay Mohan &lt;puranjay@kernel.org&gt;</div><div class='ctx'> L:	linux-iio@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml</div><div class='hunk'>@@ -22421,7 +22617,7 @@ M:	Jarkko Sakkinen &lt;jarkko@kernel.org&gt;</div><div class='ctx'> R:	Jason Gunthorpe &lt;jgg@ziepe.ca&gt;</div><div class='ctx'> L:	linux-integrity@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-W:	https://kernsec.org/wiki/index.php/Linux_Kernel_Integrity</div><div class='add'>+W:	https://gitlab.com/jarkkojs/linux-tpmdd-test</div><div class='ctx'> Q:	https://patchwork.kernel.org/project/linux-integrity/list/</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/tpm/</div><div class='hunk'>@@ -22510,6 +22706,15 @@ F:	Documentation/ABI/testing/configfs-tsm</div><div class='ctx'> F:	drivers/virt/coco/tsm.c</div><div class='ctx'> F:	include/linux/tsm.h</div><div class='ctx'> </div><div class='add'>+TRUSTED SERVICES TEE DRIVER</div><div class='add'>+M:	Balint Dobszay &lt;balint.dobszay@arm.com&gt;</div><div class='add'>+M:	Sudeep Holla &lt;sudeep.holla@arm.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+L:	trusted-services@lists.trustedfirmware.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/tee/ts-tee.rst</div><div class='add'>+F:	drivers/tee/tstee/</div><div class='add'>+</div><div class='ctx'> TTY LAYER AND SERIAL DRIVERS</div><div class='ctx'> M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> M:	Jiri Slaby &lt;jirislaby@kernel.org&gt;</div><div class='hunk'>@@ -22651,6 +22856,7 @@ F:	include/linux/ubsan.h</div><div class='ctx'> F:	lib/Kconfig.ubsan</div><div class='ctx'> F:	lib/test_ubsan.c</div><div class='ctx'> F:	lib/ubsan.c</div><div class='add'>+F:	lib/ubsan.h</div><div class='ctx'> F:	scripts/Makefile.ubsan</div><div class='ctx'> K:	\bARCH_HAS_UBSAN\b</div><div class='ctx'> </div><div class='hunk'>@@ -22841,7 +23047,7 @@ F:	drivers/usb/host/ehci*</div><div class='ctx'> </div><div class='ctx'> USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)</div><div class='ctx'> M:	Jiri Kosina &lt;jikos@kernel.org&gt;</div><div class='del'>-M:	Benjamin Tissoires &lt;benjamin.tissoires@redhat.com&gt;</div><div class='add'>+M:	Benjamin Tissoires &lt;bentiss@kernel.org&gt;</div><div class='ctx'> L:	linux-usb@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git</div><div class='hunk'>@@ -23111,7 +23317,7 @@ USERSPACE DMA BUFFER DRIVER</div><div class='ctx'> M:	Gerd Hoffmann &lt;kraxel@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/dma-buf/udmabuf.c</div><div class='ctx'> F:	include/uapi/linux/udmabuf.h</div><div class='ctx'> </div><div class='hunk'>@@ -23293,7 +23499,7 @@ F:	drivers/vfio/pci/virtio</div><div class='ctx'> VGA_SWITCHEROO</div><div class='ctx'> R:	Lukas Wunner &lt;lukas@wunner.de&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/gpu/vga-switcheroo.rst</div><div class='ctx'> F:	drivers/gpu/vga/vga_switcheroo.c</div><div class='ctx'> F:	include/linux/vga_switcheroo.h</div><div class='hunk'>@@ -23437,6 +23643,7 @@ F:	include/linux/virtio*.h</div><div class='ctx'> F:	include/linux/vringh.h</div><div class='ctx'> F:	include/uapi/linux/virtio_*.h</div><div class='ctx'> F:	tools/virtio/</div><div class='add'>+F:	tools/testing/selftests/drivers/net/virtio_net/</div><div class='ctx'> </div><div class='ctx'> VIRTIO CRYPTO DRIVER</div><div class='ctx'> M:	Gonglei &lt;arei.gonglei@huawei.com&gt;</div><div class='hunk'>@@ -23486,7 +23693,7 @@ R:	Chia-I Wu &lt;olvaffe@gmail.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> L:	virtualization@lists.linux.dev</div><div class='ctx'> S:	Maintained</div><div class='del'>-T:	git git://anongit.freedesktop.org/drm/drm-misc</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	drivers/gpu/drm/ci/xfails/virtio*</div><div class='ctx'> F:	drivers/gpu/drm/virtio/</div><div class='ctx'> F:	include/uapi/linux/virtio_gpu.h</div><div class='hunk'>@@ -24469,6 +24676,14 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/har</div><div class='ctx'> F:	Documentation/admin-guide/LSM/Yama.rst</div><div class='ctx'> F:	security/yama/</div><div class='ctx'> </div><div class='add'>+YAML NETLINK (YNL)</div><div class='add'>+M:	Donald Hunter &lt;donald.hunter@gmail.com&gt;</div><div class='add'>+M:	Jakub Kicinski &lt;kuba@kernel.org&gt;</div><div class='add'>+F:	Documentation/netlink/</div><div class='add'>+F:	Documentation/userspace-api/netlink/intro-specs.rst</div><div class='add'>+F:	Documentation/userspace-api/netlink/specs.rst</div><div class='add'>+F:	tools/net/ynl/</div><div class='add'>+</div><div class='ctx'> YEALINK PHONE DRIVER</div><div class='ctx'> M:	Henk Vergonet &lt;Henk.Vergonet@gmail.com&gt;</div><div class='ctx'> L:	usbb2k-api-dev@nongnu.org</div><div class='head'>diff --git a/Makefile b/Makefile<br/>index 43b10f3d438c..967e97878ecd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> VERSION = 6</div><div class='ctx'> PATCHLEVEL = 9</div><div class='ctx'> SUBLEVEL = 0</div><div class='del'>-EXTRAVERSION = -rc5</div><div class='add'>+EXTRAVERSION =</div><div class='ctx'> NAME = Hurr durr I'ma ninja sloth</div><div class='ctx'> </div><div class='ctx'> # *DOCUMENTATION*</div><div class='head'>diff --git a/arch/Kconfig b/arch/Kconfig<br/>index 65afb1de48b3..b34946d90e4b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/Kconfig</a></div><div class='hunk'>@@ -9,6 +9,14 @@</div><div class='ctx'> #</div><div class='ctx'> source "arch/$(SRCARCH)/Kconfig"</div><div class='ctx'> </div><div class='add'>+config ARCH_CONFIGURES_CPU_MITIGATIONS</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+if !ARCH_CONFIGURES_CPU_MITIGATIONS</div><div class='add'>+config CPU_MITIGATIONS</div><div class='add'>+	def_bool y</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> menu "General architecture-dependent options"</div><div class='ctx'> </div><div class='ctx'> config ARCH_HAS_SUBPAGE_FAULTS</div><div class='hunk'>@@ -52,10 +60,10 @@ config GENERIC_ENTRY</div><div class='ctx'> </div><div class='ctx'> config KPROBES</div><div class='ctx'> 	bool "Kprobes"</div><div class='del'>-	depends on MODULES</div><div class='ctx'> 	depends on HAVE_KPROBES</div><div class='ctx'> 	select KALLSYMS</div><div class='del'>-	select TASKS_RCU if PREEMPTION</div><div class='add'>+	select EXECMEM</div><div class='add'>+	select NEED_TASKS_RCU</div><div class='ctx'> 	help</div><div class='ctx'> 	  Kprobes allows you to trap at almost any kernel address and</div><div class='ctx'> 	  execute a callback function.  register_kprobe() establishes</div><div class='hunk'>@@ -104,7 +112,7 @@ config STATIC_CALL_SELFTEST</div><div class='ctx'> config OPTPROBES</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on KPROBES &amp;&amp; HAVE_OPTPROBES</div><div class='del'>-	select TASKS_RCU if PREEMPTION</div><div class='add'>+	select NEED_TASKS_RCU</div><div class='ctx'> </div><div class='ctx'> config KPROBES_ON_FTRACE</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -502,6 +510,15 @@ config MMU_LAZY_TLB_SHOOTDOWN</div><div class='ctx'> config ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config ARCH_HAVE_EXTRA_ELF_NOTES</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture should select this in order to enable adding an</div><div class='add'>+	  arch-specific ELF note section to core files. It must provide two</div><div class='add'>+	  functions: elf_coredump_extra_notes_size() and</div><div class='add'>+	  elf_coredump_extra_notes_write() which are invoked by the ELF core</div><div class='add'>+	  dumper.</div><div class='add'>+</div><div class='ctx'> config ARCH_HAS_NMI_SAFE_THIS_CPU_OPS</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -960,6 +977,14 @@ config ARCH_WANTS_MODULES_DATA_IN_VMALLOC</div><div class='ctx'> 	  For architectures like powerpc/32 which have constraints on module</div><div class='ctx'> 	  allocation and need to allocate module data outside of module area.</div><div class='ctx'> </div><div class='add'>+config ARCH_WANTS_EXECMEM_LATE</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  For architectures that do not allocate executable memory early on</div><div class='add'>+	  boot, but rather require its initialization late when there is</div><div class='add'>+	  enough entropy for module space randomization, for instance</div><div class='add'>+	  arm64.</div><div class='add'>+</div><div class='ctx'> config HAVE_IRQ_EXIT_ON_IRQ_STACK</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1609,4 +1634,7 @@ config CC_HAS_SANE_FUNCTION_ALIGNMENT</div><div class='ctx'> 	# strict alignment always, even with -falign-functions.</div><div class='ctx'> 	def_bool CC_HAS_MIN_FUNCTION_ALIGNMENT || CC_IS_CLANG</div><div class='ctx'> </div><div class='add'>+config ARCH_NEED_CMPXCHG_1_EMU</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig<br/>index 3afd042150f8..50ff06d5b799 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/Kconfig</a></div><div class='hunk'>@@ -10,7 +10,7 @@ config ALPHA</div><div class='ctx'> 	select ARCH_NO_SG_CHAIN</div><div class='ctx'> 	select ARCH_USE_CMPXCHG_LOCKREF</div><div class='ctx'> 	select DMA_OPS if PCI</div><div class='del'>-	select FORCE_PCI if !ALPHA_JENSEN</div><div class='add'>+	select FORCE_PCI</div><div class='ctx'> 	select PCI_DOMAINS if PCI</div><div class='ctx'> 	select PCI_SYSCALL if PCI</div><div class='ctx'> 	select HAVE_ASM_MODVERSIONS</div><div class='hunk'>@@ -90,22 +90,11 @@ choice</div><div class='ctx'> 	  &lt;http://www.alphalinux.org/&gt;. In summary:</div><div class='ctx'> </div><div class='ctx'> 	  Alcor/Alpha-XLT     AS 600, AS 500, XL-300, XL-366</div><div class='del'>-	  Alpha-XL            XL-233, XL-266</div><div class='del'>-	  AlphaBook1          Alpha laptop</div><div class='del'>-	  Avanti              AS 200, AS 205, AS 250, AS 255, AS 300, AS 400</div><div class='del'>-	  Cabriolet           AlphaPC64, AlphaPCI64</div><div class='ctx'> 	  DP264               DP264 / DS20 / ES40 / DS10 / DS10L</div><div class='del'>-	  EB164               EB164 21164 evaluation board</div><div class='del'>-	  EB64+               EB64+ 21064 evaluation board</div><div class='del'>-	  EB66                EB66 21066 evaluation board</div><div class='del'>-	  EB66+               EB66+ 21066 evaluation board</div><div class='del'>-	  Jensen              DECpc 150, DEC 2000 models 300, 500</div><div class='ctx'> 	  LX164               AlphaPC164-LX</div><div class='del'>-	  Lynx                AS 2100A</div><div class='ctx'> 	  Miata               Personal Workstation 433/500/600 a/au</div><div class='ctx'> 	  Marvel              AlphaServer ES47 / ES80 / GS1280</div><div class='ctx'> 	  Mikasa              AS 1000</div><div class='del'>-	  Noname              AXPpci33, UDB (Multia)</div><div class='ctx'> 	  Noritake            AS 1000A, AS 600A, AS 800</div><div class='ctx'> 	  PC164               AlphaPC164</div><div class='ctx'> 	  Rawhide             AS 1200, AS 4000, AS 4100</div><div class='hunk'>@@ -137,27 +126,6 @@ config ALPHA_ALCOR</div><div class='ctx'> 	  all the work required to support an external Bcache and to maintain</div><div class='ctx'> 	  memory coherence when a PCI device DMAs into (or out of) memory.</div><div class='ctx'> </div><div class='del'>-config ALPHA_XL</div><div class='del'>-	bool "Alpha-XL"</div><div class='del'>-	help</div><div class='del'>-	  XL-233 and XL-266-based Alpha systems.</div><div class='del'>-</div><div class='del'>-config ALPHA_BOOK1</div><div class='del'>-	bool "AlphaBook1"</div><div class='del'>-	help</div><div class='del'>-	  Dec AlphaBook1/Burns Alpha-based laptops.</div><div class='del'>-</div><div class='del'>-config ALPHA_AVANTI_CH</div><div class='del'>-	bool "Avanti"</div><div class='del'>-</div><div class='del'>-config ALPHA_CABRIOLET</div><div class='del'>-	bool "Cabriolet"</div><div class='del'>-	help</div><div class='del'>-	  Cabriolet AlphaPC64, AlphaPCI64 systems.  Derived from EB64+ but now</div><div class='del'>-	  baby-AT with Flash boot ROM, no on-board SCSI or Ethernet. 3 ISA</div><div class='del'>-	  slots, 4 PCI slots (one pair are on a shared slot), uses plug-in</div><div class='del'>-	  Bcache SIMMs.  Requires power supply with 3.3V output.</div><div class='del'>-</div><div class='ctx'> config ALPHA_DP264</div><div class='ctx'> 	bool "DP264"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -165,62 +133,18 @@ config ALPHA_DP264</div><div class='ctx'> 	  API Networks: 264DP, UP2000(+), CS20;</div><div class='ctx'> 	  Compaq: DS10(E,L), XP900, XP1000, DS20(E), ES40.</div><div class='ctx'> </div><div class='del'>-config ALPHA_EB164</div><div class='del'>-	bool "EB164"</div><div class='del'>-	help</div><div class='del'>-	  EB164 21164 evaluation board from DEC.  Uses 21164 and ALCOR.  Has</div><div class='del'>-	  ISA and PCI expansion (3 ISA slots, 2 64-bit PCI slots (one is</div><div class='del'>-	  shared with an ISA slot) and 2 32-bit PCI slots.  Uses plus-in</div><div class='del'>-	  Bcache SIMMs. I/O sub-system provides SuperI/O (2S, 1P, FD), KBD,</div><div class='del'>-	  MOUSE (PS2 style), RTC/NVRAM.  Boot ROM is Flash.  PC-AT-sized</div><div class='del'>-	  motherboard.  Requires power supply with 3.3V output.</div><div class='del'>-</div><div class='del'>-config ALPHA_EB64P_CH</div><div class='del'>-	bool "EB64+"</div><div class='del'>-</div><div class='del'>-config ALPHA_EB66</div><div class='del'>-	bool "EB66"</div><div class='del'>-	help</div><div class='del'>-	  A Digital DS group board.  Uses 21066 or 21066A.  I/O sub-system is</div><div class='del'>-	  identical to EB64+.  Baby PC-AT size.  Runs from standard PC power</div><div class='del'>-	  supply.  The EB66 schematic was published as a marketing poster</div><div class='del'>-	  advertising the 21066 as "the first microprocessor in the world with</div><div class='del'>-	  embedded PCI".</div><div class='del'>-</div><div class='del'>-config ALPHA_EB66P</div><div class='del'>-	bool "EB66+"</div><div class='del'>-	help</div><div class='del'>-	  Later variant of the EB66 board.</div><div class='del'>-</div><div class='ctx'> config ALPHA_EIGER</div><div class='ctx'> 	bool "Eiger"</div><div class='ctx'> 	help</div><div class='ctx'> 	  Apparently an obscure OEM single-board computer based on the</div><div class='ctx'> 	  Typhoon/Tsunami chipset family. Information on it is scanty.</div><div class='ctx'> </div><div class='del'>-config ALPHA_JENSEN</div><div class='del'>-	bool "Jensen"</div><div class='del'>-	select HAVE_EISA</div><div class='del'>-	help</div><div class='del'>-	  DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one</div><div class='del'>-	  of the first-generation Alpha systems. A number of these systems</div><div class='del'>-	  seem to be available on the second- hand market. The Jensen is a</div><div class='del'>-	  floor-standing tower system which originally used a 150MHz 21064 It</div><div class='del'>-	  used programmable logic to interface a 486 EISA I/O bridge to the</div><div class='del'>-	  CPU.</div><div class='del'>-</div><div class='ctx'> config ALPHA_LX164</div><div class='ctx'> 	bool "LX164"</div><div class='ctx'> 	help</div><div class='ctx'> 	  A technical overview of this board is available at</div><div class='ctx'> 	  &lt;http://www.unix-ag.org/Linux-Alpha/Architectures/LX164.html&gt;.</div><div class='ctx'> </div><div class='del'>-config ALPHA_LYNX</div><div class='del'>-	bool "Lynx"</div><div class='del'>-	select HAVE_EISA</div><div class='del'>-	help</div><div class='del'>-	  AlphaServer 2100A-based systems.</div><div class='del'>-</div><div class='ctx'> config ALPHA_MARVEL</div><div class='ctx'> 	bool "Marvel"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -243,9 +167,6 @@ config ALPHA_NAUTILUS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Alpha systems based on the AMD 751 &amp; ALI 1543C chipsets.</div><div class='ctx'> </div><div class='del'>-config ALPHA_NONAME_CH</div><div class='del'>-	bool "Noname"</div><div class='del'>-</div><div class='ctx'> config ALPHA_NORITAKE</div><div class='ctx'> 	bool "Noritake"</div><div class='ctx'> 	select HAVE_EISA</div><div class='hunk'>@@ -256,9 +177,6 @@ config ALPHA_NORITAKE</div><div class='ctx'> config ALPHA_PC164</div><div class='ctx'> 	bool "PC164"</div><div class='ctx'> </div><div class='del'>-config ALPHA_P2K</div><div class='del'>-	bool "Platform2000"</div><div class='del'>-</div><div class='ctx'> config ALPHA_RAWHIDE</div><div class='ctx'> 	bool "Rawhide"</div><div class='ctx'> 	select HAVE_EISA</div><div class='hunk'>@@ -322,84 +240,18 @@ config ISA_DMA_API</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config ALPHA_NONAME</div><div class='del'>-	bool</div><div class='del'>-	depends on ALPHA_BOOK1 || ALPHA_NONAME_CH</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  The AXPpci33 (aka NoName), is based on the EB66 (includes the Multia</div><div class='del'>-	  UDB).  This design was produced by Digital's Technical OEM (TOEM)</div><div class='del'>-	  group. It uses the 21066 processor running at 166MHz or 233MHz. It</div><div class='del'>-	  is a baby-AT size, and runs from a standard PC power supply. It has</div><div class='del'>-	  5 ISA slots and 3 PCI slots (one pair are a shared slot). There are</div><div class='del'>-	  2 versions, with either PS/2 or large DIN connectors for the</div><div class='del'>-	  keyboard.</div><div class='del'>-</div><div class='del'>-config ALPHA_EV4</div><div class='del'>-	bool</div><div class='del'>-	depends on ALPHA_JENSEN || (ALPHA_SABLE &amp;&amp; !ALPHA_GAMMA) || ALPHA_LYNX || ALPHA_NORITAKE &amp;&amp; !ALPHA_PRIMO || ALPHA_MIKASA &amp;&amp; !ALPHA_PRIMO || ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P_CH || ALPHA_XL || ALPHA_NONAME || ALPHA_EB66 || ALPHA_EB66P || ALPHA_P2K</div><div class='del'>-	default y if !ALPHA_LYNX</div><div class='del'>-	default y if !ALPHA_EV5</div><div class='del'>-</div><div class='del'>-config ALPHA_LCA</div><div class='del'>-	bool</div><div class='del'>-	depends on ALPHA_NONAME || ALPHA_EB66 || ALPHA_EB66P || ALPHA_P2K</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config ALPHA_APECS</div><div class='del'>-	bool</div><div class='del'>-	depends on !ALPHA_PRIMO &amp;&amp; (ALPHA_NORITAKE || ALPHA_MIKASA) || ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P_CH || ALPHA_XL</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config ALPHA_EB64P</div><div class='del'>-	bool</div><div class='del'>-	depends on ALPHA_CABRIOLET || ALPHA_EB64P_CH</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Uses 21064 or 21064A and APECs.  Has ISA and PCI expansion (3 ISA,</div><div class='del'>-	  2 PCI, one pair are on a shared slot). Supports 36-bit DRAM SIMs.</div><div class='del'>-	  ISA bus generated by Intel SaturnI/O PCI-ISA bridge. On-board SCSI</div><div class='del'>-	  (NCR 810 on PCI) Ethernet (Digital 21040), KBD, MOUSE (PS2 style),</div><div class='del'>-	  SuperI/O (2S, 1P, FD), RTC/NVRAM. Boot ROM is EPROM.  PC-AT size.</div><div class='del'>-	  Runs from standard PC power supply.</div><div class='del'>-</div><div class='del'>-config ALPHA_EV5</div><div class='del'>-	bool "EV5 CPU(s) (model 5/xxx)?" if ALPHA_LYNX</div><div class='del'>-	default y if ALPHA_RX164 || ALPHA_RAWHIDE || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_SABLE &amp;&amp; ALPHA_GAMMA || ALPHA_NORITAKE &amp;&amp; ALPHA_PRIMO || ALPHA_MIKASA &amp;&amp; ALPHA_PRIMO || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR</div><div class='del'>-</div><div class='ctx'> config ALPHA_CIA</div><div class='ctx'> 	bool</div><div class='del'>-	depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE &amp;&amp; ALPHA_PRIMO || ALPHA_MIKASA &amp;&amp; ALPHA_PRIMO || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR</div><div class='add'>+	depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config ALPHA_EV56</div><div class='del'>-	bool "EV56 CPU (speed &gt;= 366MHz)?" if ALPHA_ALCOR</div><div class='del'>-	default y if ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA</div><div class='del'>-</div><div class='del'>-config ALPHA_EV56</div><div class='del'>-	prompt "EV56 CPU (speed &gt;= 333MHz)?"</div><div class='del'>-	depends on ALPHA_NORITAKE || ALPHA_PRIMO</div><div class='del'>-</div><div class='del'>-config ALPHA_EV56</div><div class='del'>-	prompt "EV56 CPU (speed &gt;= 400MHz)?"</div><div class='del'>-	depends on ALPHA_RAWHIDE</div><div class='del'>-</div><div class='del'>-config ALPHA_PRIMO</div><div class='del'>-	bool "EV5 CPU daughtercard (model 5/xxx)?"</div><div class='del'>-	depends on ALPHA_NORITAKE || ALPHA_MIKASA</div><div class='del'>-	help</div><div class='del'>-	  Say Y if you have an AS 1000 5/xxx or an AS 1000A 5/xxx.</div><div class='del'>-</div><div class='del'>-config ALPHA_GAMMA</div><div class='del'>-	bool "EV5 CPU(s) (model 5/xxx)?" if ALPHA_SABLE</div><div class='del'>-	depends on ALPHA_SABLE || ALPHA_LYNX</div><div class='del'>-	default ALPHA_LYNX</div><div class='del'>-	help</div><div class='del'>-	  Say Y if you have an AS 2000 5/xxx or an AS 2100 5/xxx.</div><div class='add'>+	bool</div><div class='add'>+	default y if ALPHA_ALCOR || ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_RAWHIDE || ALPHA_SABLE</div><div class='ctx'> </div><div class='ctx'> config ALPHA_T2</div><div class='ctx'> 	bool</div><div class='del'>-	depends on ALPHA_SABLE || ALPHA_LYNX</div><div class='add'>+	depends on ALPHA_SABLE</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config ALPHA_PYXIS</div><div class='hunk'>@@ -443,15 +295,6 @@ config GENERIC_HWEIGHT</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y if !ALPHA_EV67</div><div class='ctx'> </div><div class='del'>-config ALPHA_AVANTI</div><div class='del'>-	bool</div><div class='del'>-	depends on ALPHA_XL || ALPHA_AVANTI_CH</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Avanti AS 200, AS 205, AS 250, AS 255, AS 300, and AS 400-based</div><div class='del'>-	  Alphas. Info at</div><div class='del'>-	  &lt;http://www.unix-ag.org/Linux-Alpha/Architectures/Avanti.html&gt;.</div><div class='del'>-</div><div class='ctx'> config ALPHA_BROKEN_IRQ_MASK</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on ALPHA_GENERIC || ALPHA_PC164</div><div class='hunk'>@@ -481,9 +324,9 @@ config ALPHA_QEMU</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> config ALPHA_SRM</div><div class='del'>-	bool "Use SRM as bootloader" if ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS || ALPHA_NONAME</div><div class='add'>+	bool "Use SRM as bootloader" if ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS</div><div class='ctx'> 	depends on TTY</div><div class='del'>-	default y if ALPHA_JENSEN || ALPHA_MIKASA || ALPHA_SABLE || ALPHA_LYNX || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL</div><div class='add'>+	default y if ALPHA_MIKASA || ALPHA_SABLE || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL</div><div class='ctx'> 	help</div><div class='ctx'> 	  There are two different types of booting firmware on Alphas: SRM,</div><div class='ctx'> 	  which is command line driven, and ARC, which uses menus and arrow</div><div class='hunk'>@@ -509,7 +352,7 @@ config ARCH_MAY_HAVE_PC_FDC</div><div class='ctx'> </div><div class='ctx'> config SMP</div><div class='ctx'> 	bool "Symmetric multi-processing support"</div><div class='del'>-	depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL</div><div class='add'>+	depends on ALPHA_SABLE || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for systems with more than one CPU. If you have</div><div class='ctx'> 	  a system with only one CPU, say N. If you have a system with more</div><div class='hunk'>@@ -545,7 +388,7 @@ config ARCH_SPARSEMEM_ENABLE</div><div class='ctx'> config ALPHA_WTINT</div><div class='ctx'> 	bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC</div><div class='ctx'> 	default y if ALPHA_QEMU</div><div class='del'>-	default n if ALPHA_EV5 || ALPHA_EV56 || (ALPHA_EV4 &amp;&amp; !ALPHA_LCA)</div><div class='add'>+	default n if ALPHA_EV56</div><div class='ctx'> 	default n if !ALPHA_SRM &amp;&amp; !ALPHA_GENERIC</div><div class='ctx'> 	default y if SMP</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/alpha/Makefile b/arch/alpha/Makefile<br/>index 45158024085e..35445ff2e489 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/Makefile</a></div><div class='hunk'>@@ -15,18 +15,14 @@ CHECKFLAGS	+= -D__alpha__</div><div class='ctx'> cflags-y	:= -pipe -mno-fp-regs -ffixed-8</div><div class='ctx'> cflags-y	+= $(call cc-option, -fno-jump-tables)</div><div class='ctx'> </div><div class='del'>-cpuflags-$(CONFIG_ALPHA_EV4)		:= -mcpu=ev4</div><div class='del'>-cpuflags-$(CONFIG_ALPHA_EV5)		:= -mcpu=ev5</div><div class='ctx'> cpuflags-$(CONFIG_ALPHA_EV56)		:= -mcpu=ev56</div><div class='ctx'> cpuflags-$(CONFIG_ALPHA_POLARIS)	:= -mcpu=pca56</div><div class='ctx'> cpuflags-$(CONFIG_ALPHA_SX164)		:= -mcpu=pca56</div><div class='ctx'> cpuflags-$(CONFIG_ALPHA_EV6)		:= -mcpu=ev6</div><div class='ctx'> cpuflags-$(CONFIG_ALPHA_EV67)		:= -mcpu=ev67</div><div class='ctx'> # If GENERIC, make sure to turn off any instruction set extensions that</div><div class='del'>-# the host compiler might have on by default.  Given that EV4 and EV5</div><div class='del'>-# have the same instruction set, prefer EV5 because an EV5 schedule is</div><div class='del'>-# more likely to keep an EV4 processor busy than vice-versa.</div><div class='del'>-cpuflags-$(CONFIG_ALPHA_GENERIC)	:= -mcpu=ev5</div><div class='add'>+# the host compiler might have on by default.</div><div class='add'>+cpuflags-$(CONFIG_ALPHA_GENERIC)	:= -mcpu=ev56 -mtune=ev6</div><div class='ctx'> </div><div class='ctx'> cflags-y				+= $(cpuflags-y)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/include/asm/core_apecs.h b/arch/alpha/include/asm/core_apecs.h<br/>deleted file mode 100644<br/>index 69a2fc62c9c3..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/core_apecs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/core_apecs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,534 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __ALPHA_APECS__H__</div><div class='del'>-#define __ALPHA_APECS__H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/compiler.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * APECS is the internal name for the 2107x chipset which provides</div><div class='del'>- * memory controller and PCI access for the 21064 chip based systems.</div><div class='del'>- *</div><div class='del'>- * This file is based on:</div><div class='del'>- *</div><div class='del'>- * DECchip 21071-AA and DECchip 21072-AA Core Logic Chipsets</div><div class='del'>- * Data Sheet</div><div class='del'>- *</div><div class='del'>- * EC-N0648-72</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * david.rusling@reo.mts.dec.com Initial Version.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-   An AVANTI *might* be an XL, and an XL has only 27 bits of ISA address</div><div class='del'>-   that get passed through the PCI&lt;-&gt;ISA bridge chip. So we've gotta use</div><div class='del'>-   both windows to max out the physical memory we can DMA to. Sigh...</div><div class='del'>-</div><div class='del'>-   If we try a window at 0 for 1GB as a work-around, we run into conflicts</div><div class='del'>-   with ISA/PCI bus memory which can't be relocated, like VGA aperture and</div><div class='del'>-   BIOS ROMs. So we must put the windows high enough to avoid these areas.</div><div class='del'>-</div><div class='del'>-   We put window 1 at BUS 64Mb for 64Mb, mapping physical 0 to 64Mb-1,</div><div class='del'>-   and window 2 at BUS 1Gb for 1Gb, mapping physical 0 to 1Gb-1.</div><div class='del'>-   Yes, this does map 0 to 64Mb-1 twice, but only window 1 will actually</div><div class='del'>-   be used for that range (via virt_to_bus()).</div><div class='del'>-</div><div class='del'>-   Note that we actually fudge the window 1 maximum as 48Mb instead of 64Mb,</div><div class='del'>-   to keep virt_to_bus() from returning an address in the first window, for</div><div class='del'>-   a data area that goes beyond the 64Mb first DMA window.  Sigh...</div><div class='del'>-   The fudge factor MUST match with &lt;asm/dma.h&gt; MAX_DMA_ADDRESS, but</div><div class='del'>-   we can't just use that here, because of header file looping... :-(</div><div class='del'>-</div><div class='del'>-   Window 1 will be used for all DMA from the ISA bus; yes, that does</div><div class='del'>-   limit what memory an ISA floppy or sound card or Ethernet can touch, but</div><div class='del'>-   it's also a known limitation on other platforms as well. We use the</div><div class='del'>-   same technique that is used on INTEL platforms with similar limitation:</div><div class='del'>-   set MAX_DMA_ADDRESS and clear some pages' DMAable flags during mem_init().</div><div class='del'>-   We trust that any ISA bus device drivers will *always* ask for DMAable</div><div class='del'>-   memory explicitly via kmalloc()/get_free_pages() flags arguments.</div><div class='del'>-</div><div class='del'>-   Note that most PCI bus devices' drivers do *not* explicitly ask for</div><div class='del'>-   DMAable memory; they count on being able to DMA to any memory they</div><div class='del'>-   get from kmalloc()/get_free_pages(). They will also use window 1 for</div><div class='del'>-   any physical memory accesses below 64Mb; the rest will be handled by</div><div class='del'>-   window 2, maxing out at 1Gb of memory. I trust this is enough... :-)</div><div class='del'>-</div><div class='del'>-   We hope that the area before the first window is large enough so that</div><div class='del'>-   there will be no overlap at the top end (64Mb). We *must* locate the</div><div class='del'>-   PCI cards' memory just below window 1, so that there's still the</div><div class='del'>-   possibility of being able to access it via SPARSE space. This is</div><div class='del'>-   important for cards such as the Matrox Millennium, whose Xserver</div><div class='del'>-   wants to access memory-mapped registers in byte and short lengths.</div><div class='del'>-</div><div class='del'>-   Note that the XL is treated differently from the AVANTI, even though</div><div class='del'>-   for most other things they are identical. It didn't seem reasonable to</div><div class='del'>-   make the AVANTI support pay for the limitations of the XL. It is true,</div><div class='del'>-   however, that an XL kernel will run on an AVANTI without problems.</div><div class='del'>-</div><div class='del'>-   %%% All of this should be obviated by the ability to route</div><div class='del'>-   everything through the iommu.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 21071-DA Control and Status registers.</div><div class='del'>- * These are used for PCI memory access.</div><div class='del'>- */</div><div class='del'>-#define APECS_IOC_DCSR                  (IDENT_ADDR + 0x1A0000000UL)</div><div class='del'>-#define APECS_IOC_PEAR                  (IDENT_ADDR + 0x1A0000020UL)</div><div class='del'>-#define APECS_IOC_SEAR                  (IDENT_ADDR + 0x1A0000040UL)</div><div class='del'>-#define APECS_IOC_DR1                   (IDENT_ADDR + 0x1A0000060UL)</div><div class='del'>-#define APECS_IOC_DR2                   (IDENT_ADDR + 0x1A0000080UL)</div><div class='del'>-#define APECS_IOC_DR3                   (IDENT_ADDR + 0x1A00000A0UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_TB1R                  (IDENT_ADDR + 0x1A00000C0UL)</div><div class='del'>-#define APECS_IOC_TB2R                  (IDENT_ADDR + 0x1A00000E0UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_PB1R                  (IDENT_ADDR + 0x1A0000100UL)</div><div class='del'>-#define APECS_IOC_PB2R                  (IDENT_ADDR + 0x1A0000120UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_PM1R                  (IDENT_ADDR + 0x1A0000140UL)</div><div class='del'>-#define APECS_IOC_PM2R                  (IDENT_ADDR + 0x1A0000160UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_HAXR0                 (IDENT_ADDR + 0x1A0000180UL)</div><div class='del'>-#define APECS_IOC_HAXR1                 (IDENT_ADDR + 0x1A00001A0UL)</div><div class='del'>-#define APECS_IOC_HAXR2                 (IDENT_ADDR + 0x1A00001C0UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_PMLT                  (IDENT_ADDR + 0x1A00001E0UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_TLBTAG0               (IDENT_ADDR + 0x1A0000200UL)</div><div class='del'>-#define APECS_IOC_TLBTAG1               (IDENT_ADDR + 0x1A0000220UL)</div><div class='del'>-#define APECS_IOC_TLBTAG2               (IDENT_ADDR + 0x1A0000240UL)</div><div class='del'>-#define APECS_IOC_TLBTAG3               (IDENT_ADDR + 0x1A0000260UL)</div><div class='del'>-#define APECS_IOC_TLBTAG4               (IDENT_ADDR + 0x1A0000280UL)</div><div class='del'>-#define APECS_IOC_TLBTAG5               (IDENT_ADDR + 0x1A00002A0UL)</div><div class='del'>-#define APECS_IOC_TLBTAG6               (IDENT_ADDR + 0x1A00002C0UL)</div><div class='del'>-#define APECS_IOC_TLBTAG7               (IDENT_ADDR + 0x1A00002E0UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_TLBDATA0              (IDENT_ADDR + 0x1A0000300UL)</div><div class='del'>-#define APECS_IOC_TLBDATA1              (IDENT_ADDR + 0x1A0000320UL)</div><div class='del'>-#define APECS_IOC_TLBDATA2              (IDENT_ADDR + 0x1A0000340UL)</div><div class='del'>-#define APECS_IOC_TLBDATA3              (IDENT_ADDR + 0x1A0000360UL)</div><div class='del'>-#define APECS_IOC_TLBDATA4              (IDENT_ADDR + 0x1A0000380UL)</div><div class='del'>-#define APECS_IOC_TLBDATA5              (IDENT_ADDR + 0x1A00003A0UL)</div><div class='del'>-#define APECS_IOC_TLBDATA6              (IDENT_ADDR + 0x1A00003C0UL)</div><div class='del'>-#define APECS_IOC_TLBDATA7              (IDENT_ADDR + 0x1A00003E0UL)</div><div class='del'>-</div><div class='del'>-#define APECS_IOC_TBIA                  (IDENT_ADDR + 0x1A0000400UL)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 21071-CA Control and Status registers.</div><div class='del'>- * These are used to program memory timing,</div><div class='del'>- *  configure memory and initialise the B-Cache.</div><div class='del'>- */</div><div class='del'>-#define APECS_MEM_GCR		        (IDENT_ADDR + 0x180000000UL)</div><div class='del'>-#define APECS_MEM_EDSR		        (IDENT_ADDR + 0x180000040UL)</div><div class='del'>-#define APECS_MEM_TAR  		        (IDENT_ADDR + 0x180000060UL)</div><div class='del'>-#define APECS_MEM_ELAR		        (IDENT_ADDR + 0x180000080UL)</div><div class='del'>-#define APECS_MEM_EHAR  		(IDENT_ADDR + 0x1800000a0UL)</div><div class='del'>-#define APECS_MEM_SFT_RST		(IDENT_ADDR + 0x1800000c0UL)</div><div class='del'>-#define APECS_MEM_LDxLAR 		(IDENT_ADDR + 0x1800000e0UL)</div><div class='del'>-#define APECS_MEM_LDxHAR 		(IDENT_ADDR + 0x180000100UL)</div><div class='del'>-#define APECS_MEM_GTR    		(IDENT_ADDR + 0x180000200UL)</div><div class='del'>-#define APECS_MEM_RTR    		(IDENT_ADDR + 0x180000220UL)</div><div class='del'>-#define APECS_MEM_VFPR   		(IDENT_ADDR + 0x180000240UL)</div><div class='del'>-#define APECS_MEM_PDLDR  		(IDENT_ADDR + 0x180000260UL)</div><div class='del'>-#define APECS_MEM_PDhDR  		(IDENT_ADDR + 0x180000280UL)</div><div class='del'>-</div><div class='del'>-/* Bank x Base Address Register */</div><div class='del'>-#define APECS_MEM_B0BAR  		(IDENT_ADDR + 0x180000800UL)</div><div class='del'>-#define APECS_MEM_B1BAR  		(IDENT_ADDR + 0x180000820UL)</div><div class='del'>-#define APECS_MEM_B2BAR  		(IDENT_ADDR + 0x180000840UL)</div><div class='del'>-#define APECS_MEM_B3BAR  		(IDENT_ADDR + 0x180000860UL)</div><div class='del'>-#define APECS_MEM_B4BAR  		(IDENT_ADDR + 0x180000880UL)</div><div class='del'>-#define APECS_MEM_B5BAR  		(IDENT_ADDR + 0x1800008A0UL)</div><div class='del'>-#define APECS_MEM_B6BAR  		(IDENT_ADDR + 0x1800008C0UL)</div><div class='del'>-#define APECS_MEM_B7BAR  		(IDENT_ADDR + 0x1800008E0UL)</div><div class='del'>-#define APECS_MEM_B8BAR  		(IDENT_ADDR + 0x180000900UL)</div><div class='del'>-</div><div class='del'>-/* Bank x Configuration Register */</div><div class='del'>-#define APECS_MEM_B0BCR  		(IDENT_ADDR + 0x180000A00UL)</div><div class='del'>-#define APECS_MEM_B1BCR  		(IDENT_ADDR + 0x180000A20UL)</div><div class='del'>-#define APECS_MEM_B2BCR  		(IDENT_ADDR + 0x180000A40UL)</div><div class='del'>-#define APECS_MEM_B3BCR  		(IDENT_ADDR + 0x180000A60UL)</div><div class='del'>-#define APECS_MEM_B4BCR  		(IDENT_ADDR + 0x180000A80UL)</div><div class='del'>-#define APECS_MEM_B5BCR  		(IDENT_ADDR + 0x180000AA0UL)</div><div class='del'>-#define APECS_MEM_B6BCR  		(IDENT_ADDR + 0x180000AC0UL)</div><div class='del'>-#define APECS_MEM_B7BCR  		(IDENT_ADDR + 0x180000AE0UL)</div><div class='del'>-#define APECS_MEM_B8BCR  		(IDENT_ADDR + 0x180000B00UL)</div><div class='del'>-</div><div class='del'>-/* Bank x Timing Register A */</div><div class='del'>-#define APECS_MEM_B0TRA  		(IDENT_ADDR + 0x180000C00UL)</div><div class='del'>-#define APECS_MEM_B1TRA  		(IDENT_ADDR + 0x180000C20UL)</div><div class='del'>-#define APECS_MEM_B2TRA  		(IDENT_ADDR + 0x180000C40UL)</div><div class='del'>-#define APECS_MEM_B3TRA  		(IDENT_ADDR + 0x180000C60UL)</div><div class='del'>-#define APECS_MEM_B4TRA  		(IDENT_ADDR + 0x180000C80UL)</div><div class='del'>-#define APECS_MEM_B5TRA  		(IDENT_ADDR + 0x180000CA0UL)</div><div class='del'>-#define APECS_MEM_B6TRA  		(IDENT_ADDR + 0x180000CC0UL)</div><div class='del'>-#define APECS_MEM_B7TRA  		(IDENT_ADDR + 0x180000CE0UL)</div><div class='del'>-#define APECS_MEM_B8TRA  		(IDENT_ADDR + 0x180000D00UL)</div><div class='del'>-</div><div class='del'>-/* Bank x Timing Register B */</div><div class='del'>-#define APECS_MEM_B0TRB                 (IDENT_ADDR + 0x180000E00UL)</div><div class='del'>-#define APECS_MEM_B1TRB  		(IDENT_ADDR + 0x180000E20UL)</div><div class='del'>-#define APECS_MEM_B2TRB  		(IDENT_ADDR + 0x180000E40UL)</div><div class='del'>-#define APECS_MEM_B3TRB  		(IDENT_ADDR + 0x180000E60UL)</div><div class='del'>-#define APECS_MEM_B4TRB  		(IDENT_ADDR + 0x180000E80UL)</div><div class='del'>-#define APECS_MEM_B5TRB  		(IDENT_ADDR + 0x180000EA0UL)</div><div class='del'>-#define APECS_MEM_B6TRB  		(IDENT_ADDR + 0x180000EC0UL)</div><div class='del'>-#define APECS_MEM_B7TRB  		(IDENT_ADDR + 0x180000EE0UL)</div><div class='del'>-#define APECS_MEM_B8TRB  		(IDENT_ADDR + 0x180000F00UL)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Memory spaces:</div><div class='del'>- */</div><div class='del'>-#define APECS_IACK_SC		        (IDENT_ADDR + 0x1b0000000UL)</div><div class='del'>-#define APECS_CONF		        (IDENT_ADDR + 0x1e0000000UL)</div><div class='del'>-#define APECS_IO			(IDENT_ADDR + 0x1c0000000UL)</div><div class='del'>-#define APECS_SPARSE_MEM		(IDENT_ADDR + 0x200000000UL)</div><div class='del'>-#define APECS_DENSE_MEM		        (IDENT_ADDR + 0x300000000UL)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Bit definitions for I/O Controller status register 0:</div><div class='del'>- */</div><div class='del'>-#define APECS_IOC_STAT0_CMD		0xf</div><div class='del'>-#define APECS_IOC_STAT0_ERR		(1&lt;&lt;4)</div><div class='del'>-#define APECS_IOC_STAT0_LOST		(1&lt;&lt;5)</div><div class='del'>-#define APECS_IOC_STAT0_THIT		(1&lt;&lt;6)</div><div class='del'>-#define APECS_IOC_STAT0_TREF		(1&lt;&lt;7)</div><div class='del'>-#define APECS_IOC_STAT0_CODE_SHIFT	8</div><div class='del'>-#define APECS_IOC_STAT0_CODE_MASK	0x7</div><div class='del'>-#define APECS_IOC_STAT0_P_NBR_SHIFT	13</div><div class='del'>-#define APECS_IOC_STAT0_P_NBR_MASK	0x7ffff</div><div class='del'>-</div><div class='del'>-#define APECS_HAE_ADDRESS		APECS_IOC_HAXR1</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Data structure for handling APECS machine checks:</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct el_apecs_mikasa_sysdata_mcheck</div><div class='del'>-{</div><div class='del'>-	unsigned long coma_gcr;</div><div class='del'>-	unsigned long coma_edsr;</div><div class='del'>-	unsigned long coma_ter;</div><div class='del'>-	unsigned long coma_elar;</div><div class='del'>-	unsigned long coma_ehar;</div><div class='del'>-	unsigned long coma_ldlr;</div><div class='del'>-	unsigned long coma_ldhr;</div><div class='del'>-	unsigned long coma_base0;</div><div class='del'>-	unsigned long coma_base1;</div><div class='del'>-	unsigned long coma_base2;</div><div class='del'>-	unsigned long coma_base3;</div><div class='del'>-	unsigned long coma_cnfg0;</div><div class='del'>-	unsigned long coma_cnfg1;</div><div class='del'>-	unsigned long coma_cnfg2;</div><div class='del'>-	unsigned long coma_cnfg3;</div><div class='del'>-	unsigned long epic_dcsr;</div><div class='del'>-	unsigned long epic_pear;</div><div class='del'>-	unsigned long epic_sear;</div><div class='del'>-	unsigned long epic_tbr1;</div><div class='del'>-	unsigned long epic_tbr2;</div><div class='del'>-	unsigned long epic_pbr1;</div><div class='del'>-	unsigned long epic_pbr2;</div><div class='del'>-	unsigned long epic_pmr1;</div><div class='del'>-	unsigned long epic_pmr2;</div><div class='del'>-	unsigned long epic_harx1;</div><div class='del'>-	unsigned long epic_harx2;</div><div class='del'>-	unsigned long epic_pmlt;</div><div class='del'>-	unsigned long epic_tag0;</div><div class='del'>-	unsigned long epic_tag1;</div><div class='del'>-	unsigned long epic_tag2;</div><div class='del'>-	unsigned long epic_tag3;</div><div class='del'>-	unsigned long epic_tag4;</div><div class='del'>-	unsigned long epic_tag5;</div><div class='del'>-	unsigned long epic_tag6;</div><div class='del'>-	unsigned long epic_tag7;</div><div class='del'>-	unsigned long epic_data0;</div><div class='del'>-	unsigned long epic_data1;</div><div class='del'>-	unsigned long epic_data2;</div><div class='del'>-	unsigned long epic_data3;</div><div class='del'>-	unsigned long epic_data4;</div><div class='del'>-	unsigned long epic_data5;</div><div class='del'>-	unsigned long epic_data6;</div><div class='del'>-	unsigned long epic_data7;</div><div class='del'>-</div><div class='del'>-	unsigned long pceb_vid;</div><div class='del'>-	unsigned long pceb_did;</div><div class='del'>-	unsigned long pceb_revision;</div><div class='del'>-	unsigned long pceb_command;</div><div class='del'>-	unsigned long pceb_status;</div><div class='del'>-	unsigned long pceb_latency;</div><div class='del'>-	unsigned long pceb_control;</div><div class='del'>-	unsigned long pceb_arbcon;</div><div class='del'>-	unsigned long pceb_arbpri;</div><div class='del'>-</div><div class='del'>-	unsigned long esc_id;</div><div class='del'>-	unsigned long esc_revision;</div><div class='del'>-	unsigned long esc_int0;</div><div class='del'>-	unsigned long esc_int1;</div><div class='del'>-	unsigned long esc_elcr0;</div><div class='del'>-	unsigned long esc_elcr1;</div><div class='del'>-	unsigned long esc_last_eisa;</div><div class='del'>-	unsigned long esc_nmi_stat;</div><div class='del'>-</div><div class='del'>-	unsigned long pci_ir;</div><div class='del'>-	unsigned long pci_imr;</div><div class='del'>-	unsigned long svr_mgr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* This for the normal APECS machines.  */</div><div class='del'>-struct el_apecs_sysdata_mcheck</div><div class='del'>-{</div><div class='del'>-	unsigned long coma_gcr;</div><div class='del'>-	unsigned long coma_edsr;</div><div class='del'>-	unsigned long coma_ter;</div><div class='del'>-	unsigned long coma_elar;</div><div class='del'>-	unsigned long coma_ehar;</div><div class='del'>-	unsigned long coma_ldlr;</div><div class='del'>-	unsigned long coma_ldhr;</div><div class='del'>-	unsigned long coma_base0;</div><div class='del'>-	unsigned long coma_base1;</div><div class='del'>-	unsigned long coma_base2;</div><div class='del'>-	unsigned long coma_cnfg0;</div><div class='del'>-	unsigned long coma_cnfg1;</div><div class='del'>-	unsigned long coma_cnfg2;</div><div class='del'>-	unsigned long epic_dcsr;</div><div class='del'>-	unsigned long epic_pear;</div><div class='del'>-	unsigned long epic_sear;</div><div class='del'>-	unsigned long epic_tbr1;</div><div class='del'>-	unsigned long epic_tbr2;</div><div class='del'>-	unsigned long epic_pbr1;</div><div class='del'>-	unsigned long epic_pbr2;</div><div class='del'>-	unsigned long epic_pmr1;</div><div class='del'>-	unsigned long epic_pmr2;</div><div class='del'>-	unsigned long epic_harx1;</div><div class='del'>-	unsigned long epic_harx2;</div><div class='del'>-	unsigned long epic_pmlt;</div><div class='del'>-	unsigned long epic_tag0;</div><div class='del'>-	unsigned long epic_tag1;</div><div class='del'>-	unsigned long epic_tag2;</div><div class='del'>-	unsigned long epic_tag3;</div><div class='del'>-	unsigned long epic_tag4;</div><div class='del'>-	unsigned long epic_tag5;</div><div class='del'>-	unsigned long epic_tag6;</div><div class='del'>-	unsigned long epic_tag7;</div><div class='del'>-	unsigned long epic_data0;</div><div class='del'>-	unsigned long epic_data1;</div><div class='del'>-	unsigned long epic_data2;</div><div class='del'>-	unsigned long epic_data3;</div><div class='del'>-	unsigned long epic_data4;</div><div class='del'>-	unsigned long epic_data5;</div><div class='del'>-	unsigned long epic_data6;</div><div class='del'>-	unsigned long epic_data7;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct el_apecs_procdata</div><div class='del'>-{</div><div class='del'>-	unsigned long paltemp[32];  /* PAL TEMP REGS. */</div><div class='del'>-	/* EV4-specific fields */</div><div class='del'>-	unsigned long exc_addr;     /* Address of excepting instruction. */</div><div class='del'>-	unsigned long exc_sum;      /* Summary of arithmetic traps. */</div><div class='del'>-	unsigned long exc_mask;     /* Exception mask (from exc_sum). */</div><div class='del'>-	unsigned long iccsr;        /* IBox hardware enables. */</div><div class='del'>-	unsigned long pal_base;     /* Base address for PALcode. */</div><div class='del'>-	unsigned long hier;         /* Hardware Interrupt Enable. */</div><div class='del'>-	unsigned long hirr;         /* Hardware Interrupt Request. */</div><div class='del'>-	unsigned long csr;          /* D-stream fault info. */</div><div class='del'>-	unsigned long dc_stat;      /* D-cache status (ECC/Parity Err). */</div><div class='del'>-	unsigned long dc_addr;      /* EV3 Phys Addr for ECC/DPERR. */</div><div class='del'>-	unsigned long abox_ctl;     /* ABox Control Register. */</div><div class='del'>-	unsigned long biu_stat;     /* BIU Status. */</div><div class='del'>-	unsigned long biu_addr;     /* BUI Address. */</div><div class='del'>-	unsigned long biu_ctl;      /* BIU Control. */</div><div class='del'>-	unsigned long fill_syndrome;/* For correcting ECC errors. */</div><div class='del'>-	unsigned long fill_addr;    /* Cache block which was being read */</div><div class='del'>-	unsigned long va;           /* Effective VA of fault or miss. */</div><div class='del'>-	unsigned long bc_tag;       /* Backup Cache Tag Probe Results.*/</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#ifndef __EXTERN_INLINE</div><div class='del'>-#define __EXTERN_INLINE extern inline</div><div class='del'>-#define __IO_EXTERN_INLINE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * I/O functions:</div><div class='del'>- *</div><div class='del'>- * Unlike Jensen, the APECS machines have no concept of local</div><div class='del'>- * I/O---everything goes over the PCI bus.</div><div class='del'>- *</div><div class='del'>- * There is plenty room for optimization here.  In particular,</div><div class='del'>- * the Alpha's insb/insw/extb/extw should be useful in moving</div><div class='del'>- * data to/from the right byte-lanes.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define vip	volatile int __force *</div><div class='del'>-#define vuip	volatile unsigned int __force *</div><div class='del'>-#define vulp	volatile unsigned long __force *</div><div class='del'>-</div><div class='del'>-#define APECS_SET_HAE						\</div><div class='del'>-	do {							\</div><div class='del'>-		if (addr &gt;= (1UL &lt;&lt; 24)) {			\</div><div class='del'>-			unsigned long msb = addr &amp; 0xf8000000;	\</div><div class='del'>-			addr -= msb;				\</div><div class='del'>-			set_hae(msb);				\</div><div class='del'>-		}						\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u8 apecs_ioread8(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long result, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= APECS_DENSE_MEM) {</div><div class='del'>-		addr -= APECS_DENSE_MEM;</div><div class='del'>-		APECS_SET_HAE;</div><div class='del'>-		base_and_type = APECS_SPARSE_MEM + 0x00;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= APECS_IO;</div><div class='del'>-		base_and_type = APECS_IO + 0x00;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result = *(vip) ((addr &lt;&lt; 5) + base_and_type);</div><div class='del'>-	return __kernel_extbl(result, addr &amp; 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void apecs_iowrite8(u8 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long w, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= APECS_DENSE_MEM) {</div><div class='del'>-		addr -= APECS_DENSE_MEM;</div><div class='del'>-		APECS_SET_HAE;</div><div class='del'>-		base_and_type = APECS_SPARSE_MEM + 0x00;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= APECS_IO;</div><div class='del'>-		base_and_type = APECS_IO + 0x00;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	w = __kernel_insbl(b, addr &amp; 3);</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 5) + base_and_type) = w;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u16 apecs_ioread16(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long result, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= APECS_DENSE_MEM) {</div><div class='del'>-		addr -= APECS_DENSE_MEM;</div><div class='del'>-		APECS_SET_HAE;</div><div class='del'>-		base_and_type = APECS_SPARSE_MEM + 0x08;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= APECS_IO;</div><div class='del'>-		base_and_type = APECS_IO + 0x08;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result = *(vip) ((addr &lt;&lt; 5) + base_and_type);</div><div class='del'>-	return __kernel_extwl(result, addr &amp; 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void apecs_iowrite16(u16 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long w, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= APECS_DENSE_MEM) {</div><div class='del'>-		addr -= APECS_DENSE_MEM;</div><div class='del'>-		APECS_SET_HAE;</div><div class='del'>-		base_and_type = APECS_SPARSE_MEM + 0x08;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= APECS_IO;</div><div class='del'>-		base_and_type = APECS_IO + 0x08;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	w = __kernel_inswl(b, addr &amp; 3);</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 5) + base_and_type) = w;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u32 apecs_ioread32(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; APECS_DENSE_MEM)</div><div class='del'>-		addr = ((addr - APECS_IO) &lt;&lt; 5) + APECS_IO + 0x18;</div><div class='del'>-	return *(vuip)addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void apecs_iowrite32(u32 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; APECS_DENSE_MEM)</div><div class='del'>-		addr = ((addr - APECS_IO) &lt;&lt; 5) + APECS_IO + 0x18;</div><div class='del'>-	*(vuip)addr = b;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u64 apecs_ioread64(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; APECS_DENSE_MEM)</div><div class='del'>-		addr = ((addr - APECS_IO) &lt;&lt; 5) + APECS_IO + 0x18;</div><div class='del'>-	return *(vulp)addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void apecs_iowrite64(u64 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; APECS_DENSE_MEM)</div><div class='del'>-		addr = ((addr - APECS_IO) &lt;&lt; 5) + APECS_IO + 0x18;</div><div class='del'>-	*(vulp)addr = b;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void __iomem *apecs_ioportmap(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return (void __iomem *)(addr + APECS_IO);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void __iomem *apecs_ioremap(unsigned long addr,</div><div class='del'>-					    unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return (void __iomem *)(addr + APECS_DENSE_MEM);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE int apecs_is_ioaddr(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return addr &gt;= IDENT_ADDR + 0x180000000UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE int apecs_is_mmio(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return (unsigned long)addr &gt;= APECS_DENSE_MEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#undef APECS_SET_HAE</div><div class='del'>-</div><div class='del'>-#undef vip</div><div class='del'>-#undef vuip</div><div class='del'>-#undef vulp</div><div class='del'>-</div><div class='del'>-#undef __IO_PREFIX</div><div class='del'>-#define __IO_PREFIX		apecs</div><div class='del'>-#define apecs_trivial_io_bw	0</div><div class='del'>-#define apecs_trivial_io_lq	0</div><div class='del'>-#define apecs_trivial_rw_bw	2</div><div class='del'>-#define apecs_trivial_rw_lq	1</div><div class='del'>-#define apecs_trivial_iounmap	1</div><div class='del'>-#include &lt;asm/io_trivial.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef __IO_EXTERN_INLINE</div><div class='del'>-#undef __EXTERN_INLINE</div><div class='del'>-#undef __IO_EXTERN_INLINE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ALPHA_APECS__H__ */</div><div class='head'>diff --git a/arch/alpha/include/asm/core_lca.h b/arch/alpha/include/asm/core_lca.h<br/>deleted file mode 100644<br/>index d8c3e72ef8f6..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/core_lca.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/core_lca.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,378 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __ALPHA_LCA__H__</div><div class='del'>-#define __ALPHA_LCA__H__</div><div class='del'>-</div><div class='del'>-#include &lt;asm/compiler.h&gt;</div><div class='del'>-#include &lt;asm/mce.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Low Cost Alpha (LCA) definitions (these apply to 21066 and 21068,</div><div class='del'>- * for example).</div><div class='del'>- *</div><div class='del'>- * This file is based on:</div><div class='del'>- *</div><div class='del'>- *	DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors</div><div class='del'>- *	Hardware Reference Manual; Digital Equipment Corp.; May 1994;</div><div class='del'>- *	Maynard, MA; Order Number: EC-N2681-71.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NOTE: The LCA uses a Host Address Extension (HAE) register to access</div><div class='del'>- *	 PCI addresses that are beyond the first 27 bits of address</div><div class='del'>- *	 space.  Updating the HAE requires an external cycle (and</div><div class='del'>- *	 a memory barrier), which tends to be slow.  Instead of updating</div><div class='del'>- *	 it on each sparse memory access, we keep the current HAE value</div><div class='del'>- *	 cached in variable cache_hae.  Only if the cached HAE differs</div><div class='del'>- *	 from the desired HAE value do we actually updated HAE register.</div><div class='del'>- *	 The HAE register is preserved by the interrupt handler entry/exit</div><div class='del'>- *	 code, so this scheme works even in the presence of interrupts.</div><div class='del'>- *</div><div class='del'>- * Dense memory space doesn't require the HAE, but is restricted to</div><div class='del'>- * aligned 32 and 64 bit accesses.  Special Cycle and Interrupt</div><div class='del'>- * Acknowledge cycles may also require the use of the HAE.  The LCA</div><div class='del'>- * limits I/O address space to the bottom 24 bits of address space,</div><div class='del'>- * but this easily covers the 16 bit ISA I/O address space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NOTE 2! The memory operations do not set any memory barriers, as</div><div class='del'>- * it's not needed for cases like a frame buffer that is essentially</div><div class='del'>- * memory-like.  You need to do them by hand if the operations depend</div><div class='del'>- * on ordering.</div><div class='del'>- *</div><div class='del'>- * Similarly, the port I/O operations do a "mb" only after a write</div><div class='del'>- * operation: if an mb is needed before (as in the case of doing</div><div class='del'>- * memory mapped I/O first, and then a port I/O operation to the same</div><div class='del'>- * device), it needs to be done by hand.</div><div class='del'>- *</div><div class='del'>- * After the above has bitten me 100 times, I'll give up and just do</div><div class='del'>- * the mb all the time, but right now I'm hoping this will work out.</div><div class='del'>- * Avoiding mb's may potentially be a noticeable speed improvement,</div><div class='del'>- * but I can't honestly say I've tested it.</div><div class='del'>- *</div><div class='del'>- * Handling interrupts that need to do mb's to synchronize to</div><div class='del'>- * non-interrupts is another fun race area.  Don't do it (because if</div><div class='del'>- * you do, I'll have to do *everything* with interrupts disabled,</div><div class='del'>- * ugh).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Memory Controller registers:</div><div class='del'>- */</div><div class='del'>-#define LCA_MEM_BCR0		(IDENT_ADDR + 0x120000000UL)</div><div class='del'>-#define LCA_MEM_BCR1		(IDENT_ADDR + 0x120000008UL)</div><div class='del'>-#define LCA_MEM_BCR2		(IDENT_ADDR + 0x120000010UL)</div><div class='del'>-#define LCA_MEM_BCR3		(IDENT_ADDR + 0x120000018UL)</div><div class='del'>-#define LCA_MEM_BMR0		(IDENT_ADDR + 0x120000020UL)</div><div class='del'>-#define LCA_MEM_BMR1		(IDENT_ADDR + 0x120000028UL)</div><div class='del'>-#define LCA_MEM_BMR2		(IDENT_ADDR + 0x120000030UL)</div><div class='del'>-#define LCA_MEM_BMR3		(IDENT_ADDR + 0x120000038UL)</div><div class='del'>-#define LCA_MEM_BTR0		(IDENT_ADDR + 0x120000040UL)</div><div class='del'>-#define LCA_MEM_BTR1		(IDENT_ADDR + 0x120000048UL)</div><div class='del'>-#define LCA_MEM_BTR2		(IDENT_ADDR + 0x120000050UL)</div><div class='del'>-#define LCA_MEM_BTR3		(IDENT_ADDR + 0x120000058UL)</div><div class='del'>-#define LCA_MEM_GTR		(IDENT_ADDR + 0x120000060UL)</div><div class='del'>-#define LCA_MEM_ESR		(IDENT_ADDR + 0x120000068UL)</div><div class='del'>-#define LCA_MEM_EAR		(IDENT_ADDR + 0x120000070UL)</div><div class='del'>-#define LCA_MEM_CAR		(IDENT_ADDR + 0x120000078UL)</div><div class='del'>-#define LCA_MEM_VGR		(IDENT_ADDR + 0x120000080UL)</div><div class='del'>-#define LCA_MEM_PLM		(IDENT_ADDR + 0x120000088UL)</div><div class='del'>-#define LCA_MEM_FOR		(IDENT_ADDR + 0x120000090UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * I/O Controller registers:</div><div class='del'>- */</div><div class='del'>-#define LCA_IOC_HAE		(IDENT_ADDR + 0x180000000UL)</div><div class='del'>-#define LCA_IOC_CONF		(IDENT_ADDR + 0x180000020UL)</div><div class='del'>-#define LCA_IOC_STAT0		(IDENT_ADDR + 0x180000040UL)</div><div class='del'>-#define LCA_IOC_STAT1		(IDENT_ADDR + 0x180000060UL)</div><div class='del'>-#define LCA_IOC_TBIA		(IDENT_ADDR + 0x180000080UL)</div><div class='del'>-#define LCA_IOC_TB_ENA		(IDENT_ADDR + 0x1800000a0UL)</div><div class='del'>-#define LCA_IOC_SFT_RST		(IDENT_ADDR + 0x1800000c0UL)</div><div class='del'>-#define LCA_IOC_PAR_DIS		(IDENT_ADDR + 0x1800000e0UL)</div><div class='del'>-#define LCA_IOC_W_BASE0		(IDENT_ADDR + 0x180000100UL)</div><div class='del'>-#define LCA_IOC_W_BASE1		(IDENT_ADDR + 0x180000120UL)</div><div class='del'>-#define LCA_IOC_W_MASK0		(IDENT_ADDR + 0x180000140UL)</div><div class='del'>-#define LCA_IOC_W_MASK1		(IDENT_ADDR + 0x180000160UL)</div><div class='del'>-#define LCA_IOC_T_BASE0		(IDENT_ADDR + 0x180000180UL)</div><div class='del'>-#define LCA_IOC_T_BASE1		(IDENT_ADDR + 0x1800001a0UL)</div><div class='del'>-#define LCA_IOC_TB_TAG0		(IDENT_ADDR + 0x188000000UL)</div><div class='del'>-#define LCA_IOC_TB_TAG1		(IDENT_ADDR + 0x188000020UL)</div><div class='del'>-#define LCA_IOC_TB_TAG2		(IDENT_ADDR + 0x188000040UL)</div><div class='del'>-#define LCA_IOC_TB_TAG3		(IDENT_ADDR + 0x188000060UL)</div><div class='del'>-#define LCA_IOC_TB_TAG4		(IDENT_ADDR + 0x188000070UL)</div><div class='del'>-#define LCA_IOC_TB_TAG5		(IDENT_ADDR + 0x1880000a0UL)</div><div class='del'>-#define LCA_IOC_TB_TAG6		(IDENT_ADDR + 0x1880000c0UL)</div><div class='del'>-#define LCA_IOC_TB_TAG7		(IDENT_ADDR + 0x1880000e0UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Memory spaces:</div><div class='del'>- */</div><div class='del'>-#define LCA_IACK_SC		(IDENT_ADDR + 0x1a0000000UL)</div><div class='del'>-#define LCA_CONF		(IDENT_ADDR + 0x1e0000000UL)</div><div class='del'>-#define LCA_IO			(IDENT_ADDR + 0x1c0000000UL)</div><div class='del'>-#define LCA_SPARSE_MEM		(IDENT_ADDR + 0x200000000UL)</div><div class='del'>-#define LCA_DENSE_MEM		(IDENT_ADDR + 0x300000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Bit definitions for I/O Controller status register 0:</div><div class='del'>- */</div><div class='del'>-#define LCA_IOC_STAT0_CMD		0xf</div><div class='del'>-#define LCA_IOC_STAT0_ERR		(1&lt;&lt;4)</div><div class='del'>-#define LCA_IOC_STAT0_LOST		(1&lt;&lt;5)</div><div class='del'>-#define LCA_IOC_STAT0_THIT		(1&lt;&lt;6)</div><div class='del'>-#define LCA_IOC_STAT0_TREF		(1&lt;&lt;7)</div><div class='del'>-#define LCA_IOC_STAT0_CODE_SHIFT	8</div><div class='del'>-#define LCA_IOC_STAT0_CODE_MASK		0x7</div><div class='del'>-#define LCA_IOC_STAT0_P_NBR_SHIFT	13</div><div class='del'>-#define LCA_IOC_STAT0_P_NBR_MASK	0x7ffff</div><div class='del'>-</div><div class='del'>-#define LCA_HAE_ADDRESS		LCA_IOC_HAE</div><div class='del'>-</div><div class='del'>-/* LCA PMR Power Management register defines */</div><div class='del'>-#define LCA_PMR_ADDR	(IDENT_ADDR + 0x120000098UL)</div><div class='del'>-#define LCA_PMR_PDIV    0x7                     /* Primary clock divisor */</div><div class='del'>-#define LCA_PMR_ODIV    0x38                    /* Override clock divisor */</div><div class='del'>-#define LCA_PMR_INTO    0x40                    /* Interrupt override */</div><div class='del'>-#define LCA_PMR_DMAO    0x80                    /* DMA override */</div><div class='del'>-#define LCA_PMR_OCCEB   0xffff0000L             /* Override cycle counter - even bits */</div><div class='del'>-#define LCA_PMR_OCCOB   0xffff000000000000L     /* Override cycle counter - even bits */</div><div class='del'>-#define LCA_PMR_PRIMARY_MASK    0xfffffffffffffff8L</div><div class='del'>-</div><div class='del'>-/* LCA PMR Macros */</div><div class='del'>-</div><div class='del'>-#define LCA_READ_PMR        (*(volatile unsigned long *)LCA_PMR_ADDR)</div><div class='del'>-#define LCA_WRITE_PMR(d)    (*((volatile unsigned long *)LCA_PMR_ADDR) = (d))</div><div class='del'>-</div><div class='del'>-#define LCA_GET_PRIMARY(r)  ((r) &amp; LCA_PMR_PDIV)</div><div class='del'>-#define LCA_GET_OVERRIDE(r) (((r) &gt;&gt; 3) &amp; LCA_PMR_PDIV)</div><div class='del'>-#define LCA_SET_PRIMARY_CLOCK(r, c) ((r) = (((r) &amp; LCA_PMR_PRIMARY_MASK)|(c)))</div><div class='del'>-</div><div class='del'>-/* LCA PMR Divisor values */</div><div class='del'>-#define LCA_PMR_DIV_1   0x0</div><div class='del'>-#define LCA_PMR_DIV_1_5 0x1</div><div class='del'>-#define LCA_PMR_DIV_2   0x2</div><div class='del'>-#define LCA_PMR_DIV_4   0x3</div><div class='del'>-#define LCA_PMR_DIV_8   0x4</div><div class='del'>-#define LCA_PMR_DIV_16  0x5</div><div class='del'>-#define LCA_PMR_DIV_MIN DIV_1</div><div class='del'>-#define LCA_PMR_DIV_MAX DIV_16</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Data structure for handling LCA machine checks.  Correctable errors</div><div class='del'>- * result in a short logout frame, uncorrectable ones in a long one.</div><div class='del'>- */</div><div class='del'>-struct el_lca_mcheck_short {</div><div class='del'>-	struct el_common	h;		/* common logout header */</div><div class='del'>-	unsigned long		esr;		/* error-status register */</div><div class='del'>-	unsigned long		ear;		/* error-address register */</div><div class='del'>-	unsigned long		dc_stat;	/* dcache status register */</div><div class='del'>-	unsigned long		ioc_stat0;	/* I/O controller status register 0 */</div><div class='del'>-	unsigned long		ioc_stat1;	/* I/O controller status register 1 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct el_lca_mcheck_long {</div><div class='del'>-	struct el_common	h;		/* common logout header */</div><div class='del'>-	unsigned long		pt[31];		/* PAL temps */</div><div class='del'>-	unsigned long		exc_addr;	/* exception address */</div><div class='del'>-	unsigned long		pad1[3];</div><div class='del'>-	unsigned long		pal_base;	/* PALcode base address */</div><div class='del'>-	unsigned long		hier;		/* hw interrupt enable */</div><div class='del'>-	unsigned long		hirr;		/* hw interrupt request */</div><div class='del'>-	unsigned long		mm_csr;		/* MMU control &amp; status */</div><div class='del'>-	unsigned long		dc_stat;	/* data cache status */</div><div class='del'>-	unsigned long		dc_addr;	/* data cache addr register */</div><div class='del'>-	unsigned long		abox_ctl;	/* address box control register */</div><div class='del'>-	unsigned long		esr;		/* error status register */</div><div class='del'>-	unsigned long		ear;		/* error address register */</div><div class='del'>-	unsigned long		car;		/* cache control register */</div><div class='del'>-	unsigned long		ioc_stat0;	/* I/O controller status register 0 */</div><div class='del'>-	unsigned long		ioc_stat1;	/* I/O controller status register 1 */</div><div class='del'>-	unsigned long		va;		/* virtual address register */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union el_lca {</div><div class='del'>-	struct el_common *		c;</div><div class='del'>-	struct el_lca_mcheck_long *	l;</div><div class='del'>-	struct el_lca_mcheck_short *	s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#ifndef __EXTERN_INLINE</div><div class='del'>-#define __EXTERN_INLINE extern inline</div><div class='del'>-#define __IO_EXTERN_INLINE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * I/O functions:</div><div class='del'>- *</div><div class='del'>- * Unlike Jensen, the Noname machines have no concept of local</div><div class='del'>- * I/O---everything goes over the PCI bus.</div><div class='del'>- *</div><div class='del'>- * There is plenty room for optimization here.  In particular,</div><div class='del'>- * the Alpha's insb/insw/extb/extw should be useful in moving</div><div class='del'>- * data to/from the right byte-lanes.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define vip	volatile int __force *</div><div class='del'>-#define vuip	volatile unsigned int __force *</div><div class='del'>-#define vulp	volatile unsigned long __force *</div><div class='del'>-</div><div class='del'>-#define LCA_SET_HAE						\</div><div class='del'>-	do {							\</div><div class='del'>-		if (addr &gt;= (1UL &lt;&lt; 24)) {			\</div><div class='del'>-			unsigned long msb = addr &amp; 0xf8000000;	\</div><div class='del'>-			addr -= msb;				\</div><div class='del'>-			set_hae(msb);				\</div><div class='del'>-		}						\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u8 lca_ioread8(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long result, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= LCA_DENSE_MEM) {</div><div class='del'>-		addr -= LCA_DENSE_MEM;</div><div class='del'>-		LCA_SET_HAE;</div><div class='del'>-		base_and_type = LCA_SPARSE_MEM + 0x00;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= LCA_IO;</div><div class='del'>-		base_and_type = LCA_IO + 0x00;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result = *(vip) ((addr &lt;&lt; 5) + base_and_type);</div><div class='del'>-	return __kernel_extbl(result, addr &amp; 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void lca_iowrite8(u8 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long w, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= LCA_DENSE_MEM) {</div><div class='del'>-		addr -= LCA_DENSE_MEM;</div><div class='del'>-		LCA_SET_HAE;</div><div class='del'>-		base_and_type = LCA_SPARSE_MEM + 0x00;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= LCA_IO;</div><div class='del'>-		base_and_type = LCA_IO + 0x00;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	w = __kernel_insbl(b, addr &amp; 3);</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 5) + base_and_type) = w;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u16 lca_ioread16(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long result, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= LCA_DENSE_MEM) {</div><div class='del'>-		addr -= LCA_DENSE_MEM;</div><div class='del'>-		LCA_SET_HAE;</div><div class='del'>-		base_and_type = LCA_SPARSE_MEM + 0x08;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= LCA_IO;</div><div class='del'>-		base_and_type = LCA_IO + 0x08;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result = *(vip) ((addr &lt;&lt; 5) + base_and_type);</div><div class='del'>-	return __kernel_extwl(result, addr &amp; 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void lca_iowrite16(u16 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long w, base_and_type;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= LCA_DENSE_MEM) {</div><div class='del'>-		addr -= LCA_DENSE_MEM;</div><div class='del'>-		LCA_SET_HAE;</div><div class='del'>-		base_and_type = LCA_SPARSE_MEM + 0x08;</div><div class='del'>-	} else {</div><div class='del'>-		addr -= LCA_IO;</div><div class='del'>-		base_and_type = LCA_IO + 0x08;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	w = __kernel_inswl(b, addr &amp; 3);</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 5) + base_and_type) = w;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u32 lca_ioread32(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; LCA_DENSE_MEM)</div><div class='del'>-		addr = ((addr - LCA_IO) &lt;&lt; 5) + LCA_IO + 0x18;</div><div class='del'>-	return *(vuip)addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void lca_iowrite32(u32 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; LCA_DENSE_MEM)</div><div class='del'>-		addr = ((addr - LCA_IO) &lt;&lt; 5) + LCA_IO + 0x18;</div><div class='del'>-	*(vuip)addr = b;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u64 lca_ioread64(const void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; LCA_DENSE_MEM)</div><div class='del'>-		addr = ((addr - LCA_IO) &lt;&lt; 5) + LCA_IO + 0x18;</div><div class='del'>-	return *(vulp)addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void lca_iowrite64(u64 b, void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	if (addr &lt; LCA_DENSE_MEM)</div><div class='del'>-		addr = ((addr - LCA_IO) &lt;&lt; 5) + LCA_IO + 0x18;</div><div class='del'>-	*(vulp)addr = b;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void __iomem *lca_ioportmap(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return (void __iomem *)(addr + LCA_IO);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void __iomem *lca_ioremap(unsigned long addr,</div><div class='del'>-					  unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return (void __iomem *)(addr + LCA_DENSE_MEM);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE int lca_is_ioaddr(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return addr &gt;= IDENT_ADDR + 0x120000000UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE int lca_is_mmio(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return (unsigned long)addr &gt;= LCA_DENSE_MEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#undef vip</div><div class='del'>-#undef vuip</div><div class='del'>-#undef vulp</div><div class='del'>-</div><div class='del'>-#undef __IO_PREFIX</div><div class='del'>-#define __IO_PREFIX		lca</div><div class='del'>-#define lca_trivial_rw_bw	2</div><div class='del'>-#define lca_trivial_rw_lq	1</div><div class='del'>-#define lca_trivial_io_bw	0</div><div class='del'>-#define lca_trivial_io_lq	0</div><div class='del'>-#define lca_trivial_iounmap	1</div><div class='del'>-#include &lt;asm/io_trivial.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef __IO_EXTERN_INLINE</div><div class='del'>-#undef __EXTERN_INLINE</div><div class='del'>-#undef __IO_EXTERN_INLINE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ALPHA_LCA__H__ */</div><div class='head'>diff --git a/arch/alpha/include/asm/core_t2.h b/arch/alpha/include/asm/core_t2.h<br/>index ab956b1625b5..ca9b091d9c5f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/core_t2.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/core_t2.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/core_t2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/core_t2.h</a></div><div class='hunk'>@@ -25,16 +25,8 @@</div><div class='ctx'> #define T2_MEM_R1_MASK 0x07ffffff  /* Mem sparse region 1 mask is 27 bits */</div><div class='ctx'> </div><div class='ctx'> /* GAMMA-SABLE is a SABLE with EV5-based CPUs */</div><div class='del'>-/* All LYNX machines, EV4 or EV5, use the GAMMA bias also */</div><div class='ctx'> #define _GAMMA_BIAS		0x8000000000UL</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC)</div><div class='del'>-#define GAMMA_BIAS		alpha_mv.sys.t2.gamma_bias</div><div class='del'>-#elif defined(CONFIG_ALPHA_GAMMA)</div><div class='ctx'> #define GAMMA_BIAS		_GAMMA_BIAS</div><div class='del'>-#else</div><div class='del'>-#define GAMMA_BIAS		0</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Memory spaces:</div><div class='head'>diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h<br/>index 6ce7e2041685..ad5a59b035cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/dma-mapping.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/dma-mapping.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -6,11 +6,7 @@ extern const struct dma_map_ops alpha_pci_ops;</div><div class='ctx'> </div><div class='ctx'> static inline const struct dma_map_ops *get_arch_dma_ops(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_ALPHA_JENSEN</div><div class='del'>-	return NULL;</div><div class='del'>-#else</div><div class='ctx'> 	return &amp;alpha_pci_ops;</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ALPHA_DMA_MAPPING_H */</div><div class='head'>diff --git a/arch/alpha/include/asm/dma.h b/arch/alpha/include/asm/dma.h<br/>index a04d76b96089..3a88812b7165 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/dma.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/dma.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/dma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/dma.h</a></div><div class='hunk'>@@ -82,11 +82,6 @@</div><div class='ctx'>   just a wiring limit.</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-/* The maximum address for ISA DMA transfer on Alpha XL, due to an</div><div class='del'>-   hardware SIO limitation, is 64MB.</div><div class='del'>-*/</div><div class='del'>-#define ALPHA_XL_MAX_ISA_DMA_ADDRESS		0x04000000UL</div><div class='del'>-</div><div class='ctx'> /* The maximum address for ISA DMA transfer on RUFFIAN,</div><div class='ctx'>    due to an hardware SIO limitation, is 16MB.</div><div class='ctx'> */</div><div class='hunk'>@@ -107,9 +102,7 @@</div><div class='ctx'> #ifdef CONFIG_ALPHA_GENERIC</div><div class='ctx'> # define MAX_ISA_DMA_ADDRESS		(alpha_mv.max_isa_dma_address)</div><div class='ctx'> #else</div><div class='del'>-# if defined(CONFIG_ALPHA_XL)</div><div class='del'>-#  define MAX_ISA_DMA_ADDRESS		ALPHA_XL_MAX_ISA_DMA_ADDRESS</div><div class='del'>-# elif defined(CONFIG_ALPHA_RUFFIAN)</div><div class='add'>+# if defined(CONFIG_ALPHA_RUFFIAN)</div><div class='ctx'> #  define MAX_ISA_DMA_ADDRESS		ALPHA_RUFFIAN_MAX_ISA_DMA_ADDRESS</div><div class='ctx'> # elif defined(CONFIG_ALPHA_SABLE)</div><div class='ctx'> #  define MAX_ISA_DMA_ADDRESS		ALPHA_SABLE_MAX_ISA_DMA_ADDRESS</div><div class='head'>diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h<br/>index e6da23f1da83..4d7c46f50382 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/elf.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/elf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/elf.h</a></div><div class='hunk'>@@ -133,9 +133,7 @@ extern int dump_elf_task(elf_greg_t *dest, struct task_struct *task);</div><div class='ctx'> #define ELF_PLATFORM				\</div><div class='ctx'> ({						\</div><div class='ctx'> 	enum implver_enum i_ = implver();	\</div><div class='del'>-	( i_ == IMPLVER_EV4 ? "ev4"		\</div><div class='del'>-	: i_ == IMPLVER_EV5			\</div><div class='del'>-	  ? (amask(AMASK_BWX) ? "ev5" : "ev56")	\</div><div class='add'>+	( i_ == IMPLVER_EV5 ? "ev56"			\</div><div class='ctx'> 	: amask (AMASK_CIX) ? "ev6" : "ev67");	\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h<br/>index 4f47a5003fe8..2bb8cbeedf91 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/io.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/io.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/io.h</a></div><div class='hunk'>@@ -203,16 +203,10 @@ static inline int generic_is_mmio(const volatile void __iomem *a)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_APECS)</div><div class='del'>-# include &lt;asm/core_apecs.h&gt;</div><div class='del'>-#elif defined(CONFIG_ALPHA_CIA)</div><div class='add'>+#if defined(CONFIG_ALPHA_CIA)</div><div class='ctx'> # include &lt;asm/core_cia.h&gt;</div><div class='ctx'> #elif defined(CONFIG_ALPHA_IRONGATE)</div><div class='ctx'> # include &lt;asm/core_irongate.h&gt;</div><div class='del'>-#elif defined(CONFIG_ALPHA_JENSEN)</div><div class='del'>-# include &lt;asm/jensen.h&gt;</div><div class='del'>-#elif defined(CONFIG_ALPHA_LCA)</div><div class='del'>-# include &lt;asm/core_lca.h&gt;</div><div class='ctx'> #elif defined(CONFIG_ALPHA_MARVEL)</div><div class='ctx'> # include &lt;asm/core_marvel.h&gt;</div><div class='ctx'> #elif defined(CONFIG_ALPHA_MCPCIA)</div><div class='hunk'>@@ -631,23 +625,7 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);</div><div class='ctx'> #define outsw outsw</div><div class='ctx'> #define outsl outsl</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The Alpha Jensen hardware for some rather strange reason puts</div><div class='del'>- * the RTC clock at 0x170 instead of 0x70. Probably due to some</div><div class='del'>- * misguided idea about using 0x70 for NMI stuff.</div><div class='del'>- *</div><div class='del'>- * These defines will override the defaults when doing RTC queries</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ALPHA_GENERIC</div><div class='del'>-# define RTC_PORT(x)	((x) + alpha_mv.rtc_port)</div><div class='del'>-#else</div><div class='del'>-# ifdef CONFIG_ALPHA_JENSEN</div><div class='del'>-#  define RTC_PORT(x)	(0x170+(x))</div><div class='del'>-# else</div><div class='del'>-#  define RTC_PORT(x)	(0x70 + (x))</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='add'>+#define RTC_PORT(x)	(0x70 + (x))</div><div class='ctx'> #define RTC_ALWAYS_BCD	0</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/alpha/include/asm/irq.h b/arch/alpha/include/asm/irq.h<br/>index 432402c8e47f..d83b26b6660f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/irq.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/irq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/irq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/irq.h</a></div><div class='hunk'>@@ -31,16 +31,11 @@</div><div class='ctx'> #  define NR_IRQS      (32768 + 16)    /* marvel - 32 pids */</div><div class='ctx'> # endif</div><div class='ctx'> </div><div class='del'>-#elif defined(CONFIG_ALPHA_CABRIOLET) || \</div><div class='del'>-      defined(CONFIG_ALPHA_EB66P)     || \</div><div class='del'>-      defined(CONFIG_ALPHA_EB164)     || \</div><div class='del'>-      defined(CONFIG_ALPHA_PC164)     || \</div><div class='add'>+#elif defined(CONFIG_ALPHA_PC164)     || \</div><div class='ctx'>       defined(CONFIG_ALPHA_LX164)</div><div class='ctx'> # define NR_IRQS	35</div><div class='ctx'> </div><div class='del'>-#elif defined(CONFIG_ALPHA_EB66)      || \</div><div class='del'>-      defined(CONFIG_ALPHA_EB64P)     || \</div><div class='del'>-      defined(CONFIG_ALPHA_MIKASA)</div><div class='add'>+#elif defined(CONFIG_ALPHA_MIKASA)</div><div class='ctx'> # define NR_IRQS	32</div><div class='ctx'> </div><div class='ctx'> #elif defined(CONFIG_ALPHA_ALCOR)     || \</div><div class='hunk'>@@ -55,7 +50,6 @@</div><div class='ctx'> # define NR_IRQS	40</div><div class='ctx'> </div><div class='ctx'> #elif defined(CONFIG_ALPHA_DP264) || \</div><div class='del'>-      defined(CONFIG_ALPHA_LYNX)  || \</div><div class='ctx'>       defined(CONFIG_ALPHA_SHARK)</div><div class='ctx'> # define NR_IRQS	64</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/include/asm/jensen.h b/arch/alpha/include/asm/jensen.h<br/>deleted file mode 100644<br/>index 66eb049eb421..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/jensen.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/jensen.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,363 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __ALPHA_JENSEN_H</div><div class='del'>-#define __ALPHA_JENSEN_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/compiler.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Defines for the AlphaPC EISA IO and memory address space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NOTE! The memory operations do not set any memory barriers, as it's</div><div class='del'>- * not needed for cases like a frame buffer that is essentially memory-like.</div><div class='del'>- * You need to do them by hand if the operations depend on ordering.</div><div class='del'>- *</div><div class='del'>- * Similarly, the port IO operations do a "mb" only after a write operation:</div><div class='del'>- * if an mb is needed before (as in the case of doing memory mapped IO</div><div class='del'>- * first, and then a port IO operation to the same device), it needs to be</div><div class='del'>- * done by hand.</div><div class='del'>- *</div><div class='del'>- * After the above has bitten me 100 times, I'll give up and just do the</div><div class='del'>- * mb all the time, but right now I'm hoping this will work out.  Avoiding</div><div class='del'>- * mb's may potentially be a noticeable speed improvement, but I can't</div><div class='del'>- * honestly say I've tested it.</div><div class='del'>- *</div><div class='del'>- * Handling interrupts that need to do mb's to synchronize to non-interrupts</div><div class='del'>- * is another fun race area.  Don't do it (because if you do, I'll have to</div><div class='del'>- * do *everything* with interrupts disabled, ugh).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * EISA Interrupt Acknowledge address</div><div class='del'>- */</div><div class='del'>-#define EISA_INTA		(IDENT_ADDR + 0x100000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * FEPROM addresses</div><div class='del'>- */</div><div class='del'>-#define EISA_FEPROM0		(IDENT_ADDR + 0x180000000UL)</div><div class='del'>-#define EISA_FEPROM1		(IDENT_ADDR + 0x1A0000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * VL82C106 base address</div><div class='del'>- */</div><div class='del'>-#define EISA_VL82C106		(IDENT_ADDR + 0x1C0000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * EISA "Host Address Extension" address (bits 25-31 of the EISA address)</div><div class='del'>- */</div><div class='del'>-#define EISA_HAE		(IDENT_ADDR + 0x1D0000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "SYSCTL" register address</div><div class='del'>- */</div><div class='del'>-#define EISA_SYSCTL		(IDENT_ADDR + 0x1E0000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "spare" register address</div><div class='del'>- */</div><div class='del'>-#define EISA_SPARE		(IDENT_ADDR + 0x1F0000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * EISA memory address offset</div><div class='del'>- */</div><div class='del'>-#define EISA_MEM		(IDENT_ADDR + 0x200000000UL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * EISA IO address offset</div><div class='del'>- */</div><div class='del'>-#define EISA_IO			(IDENT_ADDR + 0x300000000UL)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#ifndef __EXTERN_INLINE</div><div class='del'>-#define __EXTERN_INLINE extern inline</div><div class='del'>-#define __IO_EXTERN_INLINE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handle the "host address register". This needs to be set</div><div class='del'>- * to the high 7 bits of the EISA address.  This is also needed</div><div class='del'>- * for EISA IO addresses, which are only 16 bits wide (the</div><div class='del'>- * hae needs to be set to 0).</div><div class='del'>- *</div><div class='del'>- * HAE isn't needed for the local IO operations, though.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define JENSEN_HAE_ADDRESS	EISA_HAE</div><div class='del'>-#define JENSEN_HAE_MASK		0x1ffffff</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_set_hae(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	/* hae on the Jensen is bits 31:25 shifted right */</div><div class='del'>-	addr &gt;&gt;= 25;</div><div class='del'>-	if (addr != alpha_mv.hae_cache)</div><div class='del'>-		set_hae(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define vuip	volatile unsigned int *</div><div class='del'>-#define vulp	volatile unsigned long *</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IO functions</div><div class='del'>- *</div><div class='del'>- * The "local" functions are those that don't go out to the EISA bus,</div><div class='del'>- * but instead act on the VL82C106 chip directly.. This is mainly the</div><div class='del'>- * keyboard, RTC,  printer and first two serial lines..</div><div class='del'>- *</div><div class='del'>- * The local stuff makes for some complications, but it seems to be</div><div class='del'>- * gone in the PCI version. I hope I can get DEC suckered^H^H^H^H^H^H^H^H</div><div class='del'>- * convinced that I need one of the newer machines.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE unsigned int jensen_local_inb(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return 0xff &amp; *(vuip)((addr &lt;&lt; 9) + EISA_VL82C106);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_local_outb(u8 b, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	*(vuip)((addr &lt;&lt; 9) + EISA_VL82C106) = b;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE unsigned int jensen_bus_inb(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	long result;</div><div class='del'>-</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	result = *(volatile int *)((addr &lt;&lt; 7) + EISA_IO + 0x00);</div><div class='del'>-	return __kernel_extbl(result, addr &amp; 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_bus_outb(u8 b, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	*(vuip)((addr &lt;&lt; 7) + EISA_IO + 0x00) = b * 0x01010101;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * It seems gcc is not very good at optimizing away logical</div><div class='del'>- * operations that result in operations across inline functions.</div><div class='del'>- * Which is why this is a macro.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define jensen_is_local(addr) ( \</div><div class='del'>-/* keyboard */	(addr == 0x60 || addr == 0x64) || \</div><div class='del'>-/* RTC */	(addr == 0x170 || addr == 0x171) || \</div><div class='del'>-/* mb COM2 */	(addr &gt;= 0x2f8 &amp;&amp; addr &lt;= 0x2ff) || \</div><div class='del'>-/* mb LPT1 */	(addr &gt;= 0x3bc &amp;&amp; addr &lt;= 0x3be) || \</div><div class='del'>-/* mb COM2 */	(addr &gt;= 0x3f8 &amp;&amp; addr &lt;= 0x3ff))</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u8 jensen_inb(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	if (jensen_is_local(addr))</div><div class='del'>-		return jensen_local_inb(addr);</div><div class='del'>-	else</div><div class='del'>-		return jensen_bus_inb(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_outb(u8 b, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	if (jensen_is_local(addr))</div><div class='del'>-		jensen_local_outb(b, addr);</div><div class='del'>-	else</div><div class='del'>-		jensen_bus_outb(b, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u16 jensen_inw(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	long result;</div><div class='del'>-</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	result = *(volatile int *) ((addr &lt;&lt; 7) + EISA_IO + 0x20);</div><div class='del'>-	result &gt;&gt;= (addr &amp; 3) * 8;</div><div class='del'>-	return 0xffffUL &amp; result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u32 jensen_inl(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	return *(vuip) ((addr &lt;&lt; 7) + EISA_IO + 0x60);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u64 jensen_inq(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	return *(vulp) ((addr &lt;&lt; 7) + EISA_IO + 0x60);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_outw(u16 b, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 7) + EISA_IO + 0x20) = b * 0x00010001;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_outl(u32 b, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 7) + EISA_IO + 0x60) = b;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_outq(u64 b, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	jensen_set_hae(0);</div><div class='del'>-	*(vulp) ((addr &lt;&lt; 7) + EISA_IO + 0x60) = b;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Memory functions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u8 jensen_readb(const volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	long result;</div><div class='del'>-</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	result = *(volatile int *) ((addr &lt;&lt; 7) + EISA_MEM + 0x00);</div><div class='del'>-	result &gt;&gt;= (addr &amp; 3) * 8;</div><div class='del'>-	return 0xffUL &amp; result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u16 jensen_readw(const volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	long result;</div><div class='del'>-</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	result = *(volatile int *) ((addr &lt;&lt; 7) + EISA_MEM + 0x20);</div><div class='del'>-	result &gt;&gt;= (addr &amp; 3) * 8;</div><div class='del'>-	return 0xffffUL &amp; result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u32 jensen_readl(const volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	return *(vuip) ((addr &lt;&lt; 7) + EISA_MEM + 0x60);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE u64 jensen_readq(const volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	unsigned long r0, r1;</div><div class='del'>-</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	addr = (addr &lt;&lt; 7) + EISA_MEM + 0x60;</div><div class='del'>-	r0 = *(vuip) (addr);</div><div class='del'>-	r1 = *(vuip) (addr + (4 &lt;&lt; 7));</div><div class='del'>-	return r1 &lt;&lt; 32 | r0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_writeb(u8 b, volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 7) + EISA_MEM + 0x00) = b * 0x01010101;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_writew(u16 b, volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 7) + EISA_MEM + 0x20) = b * 0x00010001;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_writel(u32 b, volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	*(vuip) ((addr &lt;&lt; 7) + EISA_MEM + 0x60) = b;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void jensen_writeq(u64 b, volatile void __iomem *xaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr = (unsigned long) xaddr;</div><div class='del'>-	jensen_set_hae(addr);</div><div class='del'>-	addr &amp;= JENSEN_HAE_MASK;</div><div class='del'>-	addr = (addr &lt;&lt; 7) + EISA_MEM + 0x60;</div><div class='del'>-	*(vuip) (addr) = b;</div><div class='del'>-	*(vuip) (addr + (4 &lt;&lt; 7)) = b &gt;&gt; 32;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void __iomem *jensen_ioportmap(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return (void __iomem *)addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void __iomem *jensen_ioremap(unsigned long addr,</div><div class='del'>-					     unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return (void __iomem *)(addr + 0x100000000ul);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE int jensen_is_ioaddr(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	return (long)addr &gt;= 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE int jensen_is_mmio(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return (unsigned long)addr &gt;= 0x100000000ul;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* New-style ioread interface.  All the routines are so ugly for Jensen</div><div class='del'>-   that it doesn't make sense to merge them.  */</div><div class='del'>-</div><div class='del'>-#define IOPORT(OS, NS)							\</div><div class='del'>-__EXTERN_INLINE u##NS jensen_ioread##NS(const void __iomem *xaddr)	\</div><div class='del'>-{									\</div><div class='del'>-	if (jensen_is_mmio(xaddr))					\</div><div class='del'>-		return jensen_read##OS(xaddr - 0x100000000ul);		\</div><div class='del'>-	else								\</div><div class='del'>-		return jensen_in##OS((unsigned long)xaddr);		\</div><div class='del'>-}									\</div><div class='del'>-__EXTERN_INLINE void jensen_iowrite##NS(u##NS b, void __iomem *xaddr)	\</div><div class='del'>-{									\</div><div class='del'>-	if (jensen_is_mmio(xaddr))					\</div><div class='del'>-		jensen_write##OS(b, xaddr - 0x100000000ul);		\</div><div class='del'>-	else								\</div><div class='del'>-		jensen_out##OS(b, (unsigned long)xaddr);		\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-IOPORT(b, 8)</div><div class='del'>-IOPORT(w, 16)</div><div class='del'>-IOPORT(l, 32)</div><div class='del'>-IOPORT(q, 64)</div><div class='del'>-</div><div class='del'>-#undef IOPORT</div><div class='del'>-</div><div class='del'>-#undef vuip</div><div class='del'>-#undef vulp</div><div class='del'>-</div><div class='del'>-#undef __IO_PREFIX</div><div class='del'>-#define __IO_PREFIX		jensen</div><div class='del'>-#define jensen_trivial_rw_bw	0</div><div class='del'>-#define jensen_trivial_rw_lq	0</div><div class='del'>-#define jensen_trivial_io_bw	0</div><div class='del'>-#define jensen_trivial_io_lq	0</div><div class='del'>-#define jensen_trivial_iounmap	1</div><div class='del'>-#include &lt;asm/io_trivial.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef __IO_EXTERN_INLINE</div><div class='del'>-#undef __EXTERN_INLINE</div><div class='del'>-#undef __IO_EXTERN_INLINE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ALPHA_JENSEN_H */</div><div class='head'>diff --git a/arch/alpha/include/asm/machvec.h b/arch/alpha/include/asm/machvec.h<br/>index 8623f995d34c..490fc880bb3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/machvec.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/machvec.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/machvec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/machvec.h</a></div><div class='hunk'>@@ -72,15 +72,6 @@ struct alpha_machine_vector</div><div class='ctx'> 	int (*mv_is_ioaddr)(unsigned long);</div><div class='ctx'> 	int (*mv_is_mmio)(const volatile void __iomem *);</div><div class='ctx'> </div><div class='del'>-	void (*mv_switch_mm)(struct mm_struct *, struct mm_struct *,</div><div class='del'>-			     struct task_struct *);</div><div class='del'>-	void (*mv_activate_mm)(struct mm_struct *, struct mm_struct *);</div><div class='del'>-</div><div class='del'>-	void (*mv_flush_tlb_current)(struct mm_struct *);</div><div class='del'>-	void (*mv_flush_tlb_current_page)(struct mm_struct * mm,</div><div class='del'>-					  struct vm_area_struct *vma,</div><div class='del'>-					  unsigned long addr);</div><div class='del'>-</div><div class='ctx'> 	void (*update_irq_hw)(unsigned long, unsigned long, int);</div><div class='ctx'> 	void (*ack_irq)(unsigned long);</div><div class='ctx'> 	void (*device_interrupt)(unsigned long vector);</div><div class='head'>diff --git a/arch/alpha/include/asm/mmu_context.h b/arch/alpha/include/asm/mmu_context.h<br/>index 29a3e3a1f02b..eee8fe836a59 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/mmu_context.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -71,9 +71,7 @@ __reload_thread(struct pcb_struct *pcb)</div><div class='ctx'> #ifdef CONFIG_ALPHA_GENERIC</div><div class='ctx'> # define MAX_ASN	(alpha_mv.max_asn)</div><div class='ctx'> #else</div><div class='del'>-# ifdef CONFIG_ALPHA_EV4</div><div class='del'>-#  define MAX_ASN	EV4_MAX_ASN</div><div class='del'>-# elif defined(CONFIG_ALPHA_EV5)</div><div class='add'>+# if defined(CONFIG_ALPHA_EV56)</div><div class='ctx'> #  define MAX_ASN	EV5_MAX_ASN</div><div class='ctx'> # else</div><div class='ctx'> #  define MAX_ASN	EV6_MAX_ASN</div><div class='hunk'>@@ -162,26 +160,6 @@ ev5_switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,</div><div class='ctx'> 	task_thread_info(next)-&gt;pcb.asn = mmc &amp; HARDWARE_ASN_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-__EXTERN_INLINE void</div><div class='del'>-ev4_switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,</div><div class='del'>-	      struct task_struct *next)</div><div class='del'>-{</div><div class='del'>-	/* As described, ASN's are broken for TLB usage.  But we can</div><div class='del'>-	   optimize for switching between threads -- if the mm is</div><div class='del'>-	   unchanged from current we needn't flush.  */</div><div class='del'>-	/* ??? May not be needed because EV4 PALcode recognizes that</div><div class='del'>-	   ASN's are broken and does a tbiap itself on swpctx, under</div><div class='del'>-	   the "Must set ASN or flush" rule.  At least this is true</div><div class='del'>-	   for a 1992 SRM, reports Joseph Martin (jmartin@hlo.dec.com).</div><div class='del'>-	   I'm going to leave this here anyway, just to Be Sure.  -- r~  */</div><div class='del'>-	if (prev_mm != next_mm)</div><div class='del'>-		tbiap();</div><div class='del'>-</div><div class='del'>-	/* Do continue to allocate ASNs, because we can still use them</div><div class='del'>-	   to avoid flushing the icache.  */</div><div class='del'>-	ev5_switch_mm(prev_mm, next_mm, next);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern void __load_new_mm_context(struct mm_struct *);</div><div class='ctx'> asmlinkage void do_page_fault(unsigned long address, unsigned long mmcsr,</div><div class='ctx'> 			      long cause, struct pt_regs *regs);</div><div class='hunk'>@@ -209,25 +187,8 @@ ev5_activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)</div><div class='ctx'> 	__load_new_mm_context(next_mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-__EXTERN_INLINE void</div><div class='del'>-ev4_activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)</div><div class='del'>-{</div><div class='del'>-	__load_new_mm_context(next_mm);</div><div class='del'>-	tbiap();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ALPHA_GENERIC</div><div class='del'>-# define switch_mm(a,b,c)	alpha_mv.mv_switch_mm((a),(b),(c))</div><div class='del'>-# define activate_mm(x,y)	alpha_mv.mv_activate_mm((x),(y))</div><div class='del'>-#else</div><div class='del'>-# ifdef CONFIG_ALPHA_EV4</div><div class='del'>-#  define switch_mm(a,b,c)	ev4_switch_mm((a),(b),(c))</div><div class='del'>-#  define activate_mm(x,y)	ev4_activate_mm((x),(y))</div><div class='del'>-# else</div><div class='del'>-#  define switch_mm(a,b,c)	ev5_switch_mm((a),(b),(c))</div><div class='del'>-#  define activate_mm(x,y)	ev5_activate_mm((x),(y))</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='add'>+#define switch_mm(a,b,c)	ev5_switch_mm((a),(b),(c))</div><div class='add'>+#define activate_mm(x,y)	ev5_activate_mm((x),(y))</div><div class='ctx'> </div><div class='ctx'> #define init_new_context init_new_context</div><div class='ctx'> static inline int</div><div class='head'>diff --git a/arch/alpha/include/asm/special_insns.h b/arch/alpha/include/asm/special_insns.h<br/>index ca2c5c30b22e..798d0bdb11f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/special_insns.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/special_insns.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/special_insns.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/special_insns.h</a></div><div class='hunk'>@@ -15,10 +15,7 @@ enum implver_enum {</div><div class='ctx'>    (enum implver_enum) __implver; })</div><div class='ctx'> #else</div><div class='ctx'> /* Try to eliminate some dead code.  */</div><div class='del'>-#ifdef CONFIG_ALPHA_EV4</div><div class='del'>-#define implver() IMPLVER_EV4</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ALPHA_EV5</div><div class='add'>+#ifdef CONFIG_ALPHA_EV56</div><div class='ctx'> #define implver() IMPLVER_EV5</div><div class='ctx'> #endif</div><div class='ctx'> #if defined(CONFIG_ALPHA_EV6)</div><div class='head'>diff --git a/arch/alpha/include/asm/tlbflush.h b/arch/alpha/include/asm/tlbflush.h<br/>index 94dc37cf873a..ba4b359d6c39 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/tlbflush.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/tlbflush.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/tlbflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -14,16 +14,6 @@</div><div class='ctx'> extern void __load_new_mm_context(struct mm_struct *);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* Use a few helper functions to hide the ugly broken ASN</div><div class='del'>-   numbers on early Alphas (ev4 and ev45).  */</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void</div><div class='del'>-ev4_flush_tlb_current(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	__load_new_mm_context(mm);</div><div class='del'>-	tbiap();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> __EXTERN_INLINE void</div><div class='ctx'> ev5_flush_tlb_current(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='hunk'>@@ -35,19 +25,6 @@ ev5_flush_tlb_current(struct mm_struct *mm)</div><div class='ctx'>    specific icache page.  */</div><div class='ctx'> </div><div class='ctx'> __EXTERN_INLINE void</div><div class='del'>-ev4_flush_tlb_current_page(struct mm_struct * mm,</div><div class='del'>-			   struct vm_area_struct *vma,</div><div class='del'>-			   unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	int tbi_flag = 2;</div><div class='del'>-	if (vma-&gt;vm_flags &amp; VM_EXEC) {</div><div class='del'>-		__load_new_mm_context(mm);</div><div class='del'>-		tbi_flag = 3;</div><div class='del'>-	}</div><div class='del'>-	tbi(tbi_flag, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__EXTERN_INLINE void</div><div class='ctx'> ev5_flush_tlb_current_page(struct mm_struct * mm,</div><div class='ctx'> 			   struct vm_area_struct *vma,</div><div class='ctx'> 			   unsigned long addr)</div><div class='hunk'>@@ -59,18 +36,8 @@ ev5_flush_tlb_current_page(struct mm_struct * mm,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ALPHA_GENERIC</div><div class='del'>-# define flush_tlb_current		alpha_mv.mv_flush_tlb_current</div><div class='del'>-# define flush_tlb_current_page		alpha_mv.mv_flush_tlb_current_page</div><div class='del'>-#else</div><div class='del'>-# ifdef CONFIG_ALPHA_EV4</div><div class='del'>-#  define flush_tlb_current		ev4_flush_tlb_current</div><div class='del'>-#  define flush_tlb_current_page	ev4_flush_tlb_current_page</div><div class='del'>-# else</div><div class='del'>-#  define flush_tlb_current		ev5_flush_tlb_current</div><div class='del'>-#  define flush_tlb_current_page	ev5_flush_tlb_current_page</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='add'>+#define flush_tlb_current	ev5_flush_tlb_current</div><div class='add'>+#define flush_tlb_current_page	ev5_flush_tlb_current_page</div><div class='ctx'> </div><div class='ctx'> #ifdef __MMU_EXTERN_INLINE</div><div class='ctx'> #undef __EXTERN_INLINE</div><div class='head'>diff --git a/arch/alpha/include/asm/uaccess.h b/arch/alpha/include/asm/uaccess.h<br/>index c32c2584c0b7..ef295cbb797c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/uaccess.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/uaccess.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/uaccess.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/uaccess.h</a></div><div class='hunk'>@@ -96,9 +96,6 @@ struct __large_struct { unsigned long buf[100]; };</div><div class='ctx'> 		: "=r"(__gu_val), "=r"(__gu_err)	\</div><div class='ctx'> 		: "m"(__m(addr)), "1"(__gu_err))</div><div class='ctx'> </div><div class='del'>-#ifdef __alpha_bwx__</div><div class='del'>-/* Those lucky bastards with ev56 and later CPUs can do byte/word moves.  */</div><div class='del'>-</div><div class='ctx'> #define __get_user_16(addr)				\</div><div class='ctx'> 	__asm__("1: ldwu %0,%2\n"			\</div><div class='ctx'> 	"2:\n"						\</div><div class='hunk'>@@ -112,33 +109,6 @@ struct __large_struct { unsigned long buf[100]; };</div><div class='ctx'> 	EXC(1b,2b,%0,%1)				\</div><div class='ctx'> 		: "=r"(__gu_val), "=r"(__gu_err)	\</div><div class='ctx'> 		: "m"(__m(addr)), "1"(__gu_err))</div><div class='del'>-#else</div><div class='del'>-/* Unfortunately, we can't get an unaligned access trap for the sub-word</div><div class='del'>-   load, so we have to do a general unaligned operation.  */</div><div class='del'>-</div><div class='del'>-#define __get_user_16(addr)						\</div><div class='del'>-{									\</div><div class='del'>-	long __gu_tmp;							\</div><div class='del'>-	__asm__("1: ldq_u %0,0(%3)\n"					\</div><div class='del'>-	"2:	ldq_u %1,1(%3)\n"					\</div><div class='del'>-	"	extwl %0,%3,%0\n"					\</div><div class='del'>-	"	extwh %1,%3,%1\n"					\</div><div class='del'>-	"	or %0,%1,%0\n"						\</div><div class='del'>-	"3:\n"								\</div><div class='del'>-	EXC(1b,3b,%0,%2)						\</div><div class='del'>-	EXC(2b,3b,%0,%2)						\</div><div class='del'>-		: "=&amp;r"(__gu_val), "=&amp;r"(__gu_tmp), "=r"(__gu_err)	\</div><div class='del'>-		: "r"(addr), "2"(__gu_err));				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define __get_user_8(addr)						\</div><div class='del'>-	__asm__("1: ldq_u %0,0(%2)\n"					\</div><div class='del'>-	"	extbl %0,%2,%0\n"					\</div><div class='del'>-	"2:\n"								\</div><div class='del'>-	EXC(1b,2b,%0,%1)						\</div><div class='del'>-		: "=&amp;r"(__gu_val), "=r"(__gu_err)			\</div><div class='del'>-		: "r"(addr), "1"(__gu_err))</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> extern void __put_user_unknown(void);</div><div class='ctx'> </div><div class='hunk'>@@ -192,9 +162,6 @@ __asm__ __volatile__("1: stl %r2,%1\n"				\</div><div class='ctx'> 		: "=r"(__pu_err)				\</div><div class='ctx'> 		: "m"(__m(addr)), "rJ"(x), "0"(__pu_err))</div><div class='ctx'> </div><div class='del'>-#ifdef __alpha_bwx__</div><div class='del'>-/* Those lucky bastards with ev56 and later CPUs can do byte/word moves.  */</div><div class='del'>-</div><div class='ctx'> #define __put_user_16(x, addr)					\</div><div class='ctx'> __asm__ __volatile__("1: stw %r2,%1\n"				\</div><div class='ctx'> 	"2:\n"							\</div><div class='hunk'>@@ -208,53 +175,6 @@ __asm__ __volatile__("1: stb %r2,%1\n"				\</div><div class='ctx'> 	EXC(1b,2b,$31,%0)					\</div><div class='ctx'> 		: "=r"(__pu_err)				\</div><div class='ctx'> 		: "m"(__m(addr)), "rJ"(x), "0"(__pu_err))</div><div class='del'>-#else</div><div class='del'>-/* Unfortunately, we can't get an unaligned access trap for the sub-word</div><div class='del'>-   write, so we have to do a general unaligned operation.  */</div><div class='del'>-</div><div class='del'>-#define __put_user_16(x, addr)					\</div><div class='del'>-{								\</div><div class='del'>-	long __pu_tmp1, __pu_tmp2, __pu_tmp3, __pu_tmp4;	\</div><div class='del'>-	__asm__ __volatile__(					\</div><div class='del'>-	"1:	ldq_u %2,1(%5)\n"				\</div><div class='del'>-	"2:	ldq_u %1,0(%5)\n"				\</div><div class='del'>-	"	inswh %6,%5,%4\n"				\</div><div class='del'>-	"	inswl %6,%5,%3\n"				\</div><div class='del'>-	"	mskwh %2,%5,%2\n"				\</div><div class='del'>-	"	mskwl %1,%5,%1\n"				\</div><div class='del'>-	"	or %2,%4,%2\n"					\</div><div class='del'>-	"	or %1,%3,%1\n"					\</div><div class='del'>-	"3:	stq_u %2,1(%5)\n"				\</div><div class='del'>-	"4:	stq_u %1,0(%5)\n"				\</div><div class='del'>-	"5:\n"							\</div><div class='del'>-	EXC(1b,5b,$31,%0)					\</div><div class='del'>-	EXC(2b,5b,$31,%0)					\</div><div class='del'>-	EXC(3b,5b,$31,%0)					\</div><div class='del'>-	EXC(4b,5b,$31,%0)					\</div><div class='del'>-		: "=r"(__pu_err), "=&amp;r"(__pu_tmp1), 		\</div><div class='del'>-		  "=&amp;r"(__pu_tmp2), "=&amp;r"(__pu_tmp3), 		\</div><div class='del'>-		  "=&amp;r"(__pu_tmp4)				\</div><div class='del'>-		: "r"(addr), "r"((unsigned long)(x)), "0"(__pu_err)); \</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define __put_user_8(x, addr)					\</div><div class='del'>-{								\</div><div class='del'>-	long __pu_tmp1, __pu_tmp2;				\</div><div class='del'>-	__asm__ __volatile__(					\</div><div class='del'>-	"1:	ldq_u %1,0(%4)\n"				\</div><div class='del'>-	"	insbl %3,%4,%2\n"				\</div><div class='del'>-	"	mskbl %1,%4,%1\n"				\</div><div class='del'>-	"	or %1,%2,%1\n"					\</div><div class='del'>-	"2:	stq_u %1,0(%4)\n"				\</div><div class='del'>-	"3:\n"							\</div><div class='del'>-	EXC(1b,3b,$31,%0)					\</div><div class='del'>-	EXC(2b,3b,$31,%0)					\</div><div class='del'>-		: "=r"(__pu_err), 				\</div><div class='del'>-	  	  "=&amp;r"(__pu_tmp1), "=&amp;r"(__pu_tmp2)		\</div><div class='del'>-		: "r"((unsigned long)(x)), "r"(addr), "0"(__pu_err)); \</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Complex access routines</div><div class='head'>diff --git a/arch/alpha/include/asm/vga.h b/arch/alpha/include/asm/vga.h<br/>index 4c347a8454c7..919931cb5b63 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/vga.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/asm/vga.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/asm/vga.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/asm/vga.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #define VT_BUF_HAVE_RW</div><div class='ctx'> #define VT_BUF_HAVE_MEMSETW</div><div class='ctx'> #define VT_BUF_HAVE_MEMCPYW</div><div class='add'>+#define VT_BUF_HAVE_MEMMOVEW</div><div class='ctx'> </div><div class='ctx'> static inline void scr_writew(u16 val, volatile u16 *addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -40,6 +41,7 @@ static inline void scr_memsetw(u16 *s, u16 c, unsigned int count)</div><div class='ctx'> </div><div class='ctx'> /* Do not trust that the usage will be correct; analyze the arguments.  */</div><div class='ctx'> extern void scr_memcpyw(u16 *d, const u16 *s, unsigned int count);</div><div class='add'>+extern void scr_memmovew(u16 *d, const u16 *s, unsigned int count);</div><div class='ctx'> </div><div class='ctx'> /* ??? These are currently only used for downloading character sets.  As</div><div class='ctx'>    such, they don't need memory barriers.  Is this all they are intended</div><div class='head'>diff --git a/arch/alpha/include/uapi/asm/compiler.h b/arch/alpha/include/uapi/asm/compiler.h<br/>index 0e00c0e13374..8c03740966b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/uapi/asm/compiler.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/include/uapi/asm/compiler.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/uapi/asm/compiler.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/include/uapi/asm/compiler.h</a></div><div class='hunk'>@@ -95,24 +95,6 @@</div><div class='ctx'> #define __kernel_ldwu(mem)	(mem)</div><div class='ctx'> #define __kernel_stb(val,mem)	((mem) = (val))</div><div class='ctx'> #define __kernel_stw(val,mem)	((mem) = (val))</div><div class='del'>-#else</div><div class='del'>-#define __kernel_ldbu(mem)				\</div><div class='del'>-  ({ unsigned char __kir;				\</div><div class='del'>-     __asm__(".arch ev56;				\</div><div class='del'>-	      ldbu %0,%1" : "=r"(__kir) : "m"(mem));	\</div><div class='del'>-     __kir; })</div><div class='del'>-#define __kernel_ldwu(mem)				\</div><div class='del'>-  ({ unsigned short __kir;				\</div><div class='del'>-     __asm__(".arch ev56;				\</div><div class='del'>-	      ldwu %0,%1" : "=r"(__kir) : "m"(mem));	\</div><div class='del'>-     __kir; })</div><div class='del'>-#define __kernel_stb(val,mem)				\</div><div class='del'>-  __asm__(".arch ev56;					\</div><div class='del'>-	   stb %1,%0" : "=m"(mem) : "r"(val))</div><div class='del'>-#define __kernel_stw(val,mem)				\</div><div class='del'>-  __asm__(".arch ev56;					\</div><div class='del'>-	   stw %1,%0" : "=m"(mem) : "r"(val))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #endif /* _UAPI__ALPHA_COMPILER_H */</div><div class='head'>diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile<br/>index fb4efec7cbc7..b6c862dff1f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/Makefile</a></div><div class='hunk'>@@ -22,14 +22,14 @@ obj-$(CONFIG_AUDIT)	+= audit.o</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_ALPHA_GENERIC</div><div class='ctx'> </div><div class='del'>-obj-y 	 += core_apecs.o core_cia.o core_irongate.o core_lca.o \</div><div class='add'>+obj-y 	 += core_cia.o core_irongate.o \</div><div class='ctx'> 	    core_mcpcia.o core_polaris.o core_t2.o \</div><div class='ctx'> 	    core_tsunami.o</div><div class='ctx'> </div><div class='del'>-obj-y	 += sys_alcor.o sys_cabriolet.o sys_dp264.o sys_eb64p.o sys_eiger.o \</div><div class='del'>-	    sys_jensen.o sys_miata.o sys_mikasa.o sys_nautilus.o \</div><div class='add'>+obj-y	 += sys_alcor.o sys_cabriolet.o sys_dp264.o sys_eiger.o \</div><div class='add'>+	    sys_miata.o sys_mikasa.o sys_nautilus.o \</div><div class='ctx'> 	    sys_noritake.o sys_rawhide.o sys_ruffian.o sys_rx164.o \</div><div class='del'>-	    sys_sable.o sys_sio.o sys_sx164.o sys_takara.o</div><div class='add'>+	    sys_sable.o sys_sx164.o sys_takara.o</div><div class='ctx'> </div><div class='ctx'> ifndef CONFIG_ALPHA_LEGACY_START_ADDRESS</div><div class='ctx'> obj-y	 += core_marvel.o core_titan.o core_wildfire.o</div><div class='hunk'>@@ -48,10 +48,8 @@ else</div><div class='ctx'> obj-$(CONFIG_ALPHA_SRM)		+= srmcons.o</div><div class='ctx'> </div><div class='ctx'> # Core logic support</div><div class='del'>-obj-$(CONFIG_ALPHA_APECS)	+= core_apecs.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_CIA)		+= core_cia.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_IRONGATE)	+= core_irongate.o</div><div class='del'>-obj-$(CONFIG_ALPHA_LCA)		+= core_lca.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_MARVEL)	+= core_marvel.o gct.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_MCPCIA)	+= core_mcpcia.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_POLARIS)	+= core_polaris.o</div><div class='hunk'>@@ -62,12 +60,6 @@ obj-$(CONFIG_ALPHA_WILDFIRE)	+= core_wildfire.o</div><div class='ctx'> </div><div class='ctx'> # Board support</div><div class='ctx'> obj-$(CONFIG_ALPHA_ALCOR)	+= sys_alcor.o irq_i8259.o irq_srm.o</div><div class='del'>-obj-$(CONFIG_ALPHA_CABRIOLET)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \</div><div class='del'>-				   pc873xx.o</div><div class='del'>-obj-$(CONFIG_ALPHA_EB164)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \</div><div class='del'>-				   pc873xx.o</div><div class='del'>-obj-$(CONFIG_ALPHA_EB66P)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \</div><div class='del'>-				   pc873xx.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_LX164)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \</div><div class='ctx'> 				   smc37c93x.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_PC164)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \</div><div class='hunk'>@@ -75,10 +67,7 @@ obj-$(CONFIG_ALPHA_PC164)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \</div><div class='ctx'> obj-$(CONFIG_ALPHA_DP264)	+= sys_dp264.o irq_i8259.o es1888.o smc37c669.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_SHARK)	+= sys_dp264.o irq_i8259.o es1888.o smc37c669.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_TITAN)	+= sys_titan.o irq_i8259.o smc37c669.o</div><div class='del'>-obj-$(CONFIG_ALPHA_EB64P)	+= sys_eb64p.o irq_i8259.o</div><div class='del'>-obj-$(CONFIG_ALPHA_EB66)	+= sys_eb64p.o irq_i8259.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_EIGER)	+= sys_eiger.o irq_i8259.o</div><div class='del'>-obj-$(CONFIG_ALPHA_JENSEN)	+= sys_jensen.o pci-noop.o irq_i8259.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_MARVEL)	+= sys_marvel.o </div><div class='ctx'> obj-$(CONFIG_ALPHA_MIATA)	+= sys_miata.o irq_pyxis.o irq_i8259.o \</div><div class='ctx'> 				   es1888.o smc37c669.o</div><div class='hunk'>@@ -89,12 +78,6 @@ obj-$(CONFIG_ALPHA_RAWHIDE)	+= sys_rawhide.o irq_i8259.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_RUFFIAN)	+= sys_ruffian.o irq_pyxis.o irq_i8259.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_RX164)	+= sys_rx164.o irq_i8259.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_SABLE)	+= sys_sable.o</div><div class='del'>-obj-$(CONFIG_ALPHA_LYNX)	+= sys_sable.o</div><div class='del'>-obj-$(CONFIG_ALPHA_BOOK1)	+= sys_sio.o irq_i8259.o irq_srm.o pc873xx.o</div><div class='del'>-obj-$(CONFIG_ALPHA_AVANTI)	+= sys_sio.o irq_i8259.o irq_srm.o pc873xx.o</div><div class='del'>-obj-$(CONFIG_ALPHA_NONAME)	+= sys_sio.o irq_i8259.o irq_srm.o pc873xx.o</div><div class='del'>-obj-$(CONFIG_ALPHA_P2K)		+= sys_sio.o irq_i8259.o irq_srm.o pc873xx.o</div><div class='del'>-obj-$(CONFIG_ALPHA_XL)		+= sys_sio.o irq_i8259.o irq_srm.o pc873xx.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_SX164)	+= sys_sx164.o irq_pyxis.o irq_i8259.o \</div><div class='ctx'> 				   irq_srm.o smc37c669.o</div><div class='ctx'> obj-$(CONFIG_ALPHA_TAKARA)	+= sys_takara.o irq_i8259.o pc873xx.o</div><div class='head'>diff --git a/arch/alpha/kernel/asm-offsets.c b/arch/alpha/kernel/asm-offsets.c<br/>index bf1eedd27cf7..4cfeae42c79a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/asm-offsets.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/asm-offsets.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -10,35 +10,16 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/kbuild.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/machvec.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void __used foo(void)</div><div class='ctx'> {</div><div class='del'>-	DEFINE(TI_TASK, offsetof(struct thread_info, task));</div><div class='ctx'> 	DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));</div><div class='del'>-	DEFINE(TI_CPU, offsetof(struct thread_info, cpu));</div><div class='ctx'> 	DEFINE(TI_FP, offsetof(struct thread_info, fp));</div><div class='ctx'> 	DEFINE(TI_STATUS, offsetof(struct thread_info, status));</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='del'>-        DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));</div><div class='del'>-        DEFINE(TASK_CRED, offsetof(struct task_struct, cred));</div><div class='del'>-        DEFINE(TASK_REAL_PARENT, offsetof(struct task_struct, real_parent));</div><div class='del'>-        DEFINE(TASK_GROUP_LEADER, offsetof(struct task_struct, group_leader));</div><div class='del'>-        DEFINE(TASK_TGID, offsetof(struct task_struct, tgid));</div><div class='del'>-        BLANK();</div><div class='del'>-</div><div class='del'>-        DEFINE(CRED_UID,  offsetof(struct cred, uid));</div><div class='del'>-        DEFINE(CRED_EUID, offsetof(struct cred, euid));</div><div class='del'>-        DEFINE(CRED_GID,  offsetof(struct cred, gid));</div><div class='del'>-        DEFINE(CRED_EGID, offsetof(struct cred, egid));</div><div class='del'>-        BLANK();</div><div class='del'>-</div><div class='ctx'> 	DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs));</div><div class='del'>-	DEFINE(PT_PTRACED, PT_PTRACED);</div><div class='del'>-	DEFINE(CLONE_VM, CLONE_VM);</div><div class='del'>-	DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);</div><div class='del'>-	DEFINE(SIGCHLD, SIGCHLD);</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='ctx'> 	DEFINE(HAE_CACHE, offsetof(struct alpha_machine_vector, hae_cache));</div><div class='head'>diff --git a/arch/alpha/kernel/bugs.c b/arch/alpha/kernel/bugs.c<br/>index 08cc10d7fa17..e8c51089325f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/bugs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/bugs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/bugs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/bugs.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SYSFS</div><div class='head'>diff --git a/arch/alpha/kernel/console.c b/arch/alpha/kernel/console.c<br/>index 5476279329a6..4193f76e9633 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/console.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/console.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/console.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/console.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pci_impl.h"</div><div class='add'>+#include "proto.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VGA_HOSE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/core_apecs.c b/arch/alpha/kernel/core_apecs.c<br/>deleted file mode 100644<br/>index 6df765ff2b10..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_apecs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_apecs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,420 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	linux/arch/alpha/kernel/core_apecs.c</div><div class='del'>- *</div><div class='del'>- * Rewritten for Apecs from the lca.c from:</div><div class='del'>- *</div><div class='del'>- * Written by David Mosberger (davidm@cs.arizona.edu) with some code</div><div class='del'>- * taken from Dave Rusling's (david.rusling@reo.mts.dec.com) 32-bit</div><div class='del'>- * bios code.</div><div class='del'>- *</div><div class='del'>- * Code common to all APECS core logic chips.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define __EXTERN_INLINE inline</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_apecs.h&gt;</div><div class='del'>-#undef __EXTERN_INLINE</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/smp.h&gt;</div><div class='del'>-#include &lt;asm/mce.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proto.h"</div><div class='del'>-#include "pci_impl.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NOTE: Herein lie back-to-back mb instructions.  They are magic. </div><div class='del'>- * One plausible explanation is that the i/o controller does not properly</div><div class='del'>- * handle the system transaction.  Another involves timing.  Ho hum.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * BIOS32-style PCI interface:</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define DEBUG_CONFIG 0</div><div class='del'>-</div><div class='del'>-#if DEBUG_CONFIG</div><div class='del'>-# define DBGC(args)	printk args</div><div class='del'>-#else</div><div class='del'>-# define DBGC(args)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define vuip	volatile unsigned int  *</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Given a bus, device, and function number, compute resulting</div><div class='del'>- * configuration space address and setup the APECS_HAXR2 register</div><div class='del'>- * accordingly.  It is therefore not safe to have concurrent</div><div class='del'>- * invocations to configuration space access routines, but there</div><div class='del'>- * really shouldn't be any need for this.</div><div class='del'>- *</div><div class='del'>- * Type 0:</div><div class='del'>- *</div><div class='del'>- *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 </div><div class='del'>- *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- * | | | | | | | | | | | | | | | | | | | | | | | |F|F|F|R|R|R|R|R|R|0|0|</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- *</div><div class='del'>- *	31:11	Device select bit.</div><div class='del'>- * 	10:8	Function number</div><div class='del'>- * 	 7:2	Register number</div><div class='del'>- *</div><div class='del'>- * Type 1:</div><div class='del'>- *</div><div class='del'>- *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 </div><div class='del'>- *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- * | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- *</div><div class='del'>- *	31:24	reserved</div><div class='del'>- *	23:16	bus number (8 bits = 128 possible buses)</div><div class='del'>- *	15:11	Device number (5 bits)</div><div class='del'>- *	10:8	function number</div><div class='del'>- *	 7:2	register number</div><div class='del'>- *  </div><div class='del'>- * Notes:</div><div class='del'>- *	The function number selects which function of a multi-function device </div><div class='del'>- *	(e.g., SCSI and Ethernet).</div><div class='del'>- * </div><div class='del'>- *	The register selects a DWORD (32 bit) register offset.  Hence it</div><div class='del'>- *	doesn't get shifted by 2 bits as we want to "drop" the bottom two</div><div class='del'>- *	bits.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where,</div><div class='del'>-	     unsigned long *pci_addr, unsigned char *type1)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr;</div><div class='del'>-	u8 bus = pbus-&gt;number;</div><div class='del'>-</div><div class='del'>-	DBGC(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x,"</div><div class='del'>-	      " pci_addr=0x%p, type1=0x%p)\n",</div><div class='del'>-	      bus, device_fn, where, pci_addr, type1));</div><div class='del'>-</div><div class='del'>-	if (bus == 0) {</div><div class='del'>-		int device = device_fn &gt;&gt; 3;</div><div class='del'>-</div><div class='del'>-		/* type 0 configuration cycle: */</div><div class='del'>-</div><div class='del'>-		if (device &gt; 20) {</div><div class='del'>-			DBGC(("mk_conf_addr: device (%d) &gt; 20, returning -1\n",</div><div class='del'>-			      device));</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		*type1 = 0;</div><div class='del'>-		addr = (device_fn &lt;&lt; 8) | (where);</div><div class='del'>-	} else {</div><div class='del'>-		/* type 1 configuration cycle: */</div><div class='del'>-		*type1 = 1;</div><div class='del'>-		addr = (bus &lt;&lt; 16) | (device_fn &lt;&lt; 8) | (where);</div><div class='del'>-	}</div><div class='del'>-	*pci_addr = addr;</div><div class='del'>-	DBGC(("mk_conf_addr: returning pci_addr 0x%lx\n", addr));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-conf_read(unsigned long addr, unsigned char type1)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int stat0, value;</div><div class='del'>-	unsigned int haxr2 = 0;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);	/* avoid getting hit by machine check */</div><div class='del'>-</div><div class='del'>-	DBGC(("conf_read(addr=0x%lx, type1=%d)\n", addr, type1));</div><div class='del'>-</div><div class='del'>-	/* Reset status register to avoid losing errors.  */</div><div class='del'>-	stat0 = *(vuip)APECS_IOC_DCSR;</div><div class='del'>-	*(vuip)APECS_IOC_DCSR = stat0;</div><div class='del'>-	mb();</div><div class='del'>-	DBGC(("conf_read: APECS DCSR was 0x%x\n", stat0));</div><div class='del'>-</div><div class='del'>-	/* If Type1 access, must set HAE #2. */</div><div class='del'>-	if (type1) {</div><div class='del'>-		haxr2 = *(vuip)APECS_IOC_HAXR2;</div><div class='del'>-		mb();</div><div class='del'>-		*(vuip)APECS_IOC_HAXR2 = haxr2 | 1;</div><div class='del'>-		DBGC(("conf_read: TYPE1 access\n"));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	draina();</div><div class='del'>-	mcheck_expected(0) = 1;</div><div class='del'>-	mcheck_taken(0) = 0;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/* Access configuration space.  */</div><div class='del'>-</div><div class='del'>-	/* Some SRMs step on these registers during a machine check.  */</div><div class='del'>-	asm volatile("ldl %0,%1; mb; mb" : "=r"(value) : "m"(*(vuip)addr)</div><div class='del'>-		     : "$9", "$10", "$11", "$12", "$13", "$14", "memory");</div><div class='del'>-</div><div class='del'>-	if (mcheck_taken(0)) {</div><div class='del'>-		mcheck_taken(0) = 0;</div><div class='del'>-		value = 0xffffffffU;</div><div class='del'>-		mb();</div><div class='del'>-	}</div><div class='del'>-	mcheck_expected(0) = 0;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-#if 1</div><div class='del'>-	/*</div><div class='del'>-	 * david.rusling@reo.mts.dec.com.  This code is needed for the</div><div class='del'>-	 * EB64+ as it does not generate a machine check (why I don't</div><div class='del'>-	 * know).  When we build kernels for one particular platform</div><div class='del'>-	 * then we can make this conditional on the type.</div><div class='del'>-	 */</div><div class='del'>-	draina();</div><div class='del'>-</div><div class='del'>-	/* Now look for any errors.  */</div><div class='del'>-	stat0 = *(vuip)APECS_IOC_DCSR;</div><div class='del'>-	DBGC(("conf_read: APECS DCSR after read 0x%x\n", stat0));</div><div class='del'>-</div><div class='del'>-	/* Is any error bit set? */</div><div class='del'>-	if (stat0 &amp; 0xffe0U) {</div><div class='del'>-		/* If not NDEV, print status.  */</div><div class='del'>-		if (!(stat0 &amp; 0x0800)) {</div><div class='del'>-			printk("apecs.c:conf_read: got stat0=%x\n", stat0);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Reset error status.  */</div><div class='del'>-		*(vuip)APECS_IOC_DCSR = stat0;</div><div class='del'>-		mb();</div><div class='del'>-		wrmces(0x7);			/* reset machine check */</div><div class='del'>-		value = 0xffffffff;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* If Type1 access, must reset HAE #2 so normal IO space ops work.  */</div><div class='del'>-	if (type1) {</div><div class='del'>-		*(vuip)APECS_IOC_HAXR2 = haxr2 &amp; ~1;</div><div class='del'>-		mb();</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-conf_write(unsigned long addr, unsigned int value, unsigned char type1)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int stat0;</div><div class='del'>-	unsigned int haxr2 = 0;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);	/* avoid getting hit by machine check */</div><div class='del'>-</div><div class='del'>-	/* Reset status register to avoid losing errors.  */</div><div class='del'>-	stat0 = *(vuip)APECS_IOC_DCSR;</div><div class='del'>-	*(vuip)APECS_IOC_DCSR = stat0;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/* If Type1 access, must set HAE #2. */</div><div class='del'>-	if (type1) {</div><div class='del'>-		haxr2 = *(vuip)APECS_IOC_HAXR2;</div><div class='del'>-		mb();</div><div class='del'>-		*(vuip)APECS_IOC_HAXR2 = haxr2 | 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	draina();</div><div class='del'>-	mcheck_expected(0) = 1;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/* Access configuration space.  */</div><div class='del'>-	*(vuip)addr = value;</div><div class='del'>-	mb();</div><div class='del'>-	mb();  /* magic */</div><div class='del'>-	mcheck_expected(0) = 0;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-#if 1</div><div class='del'>-	/*</div><div class='del'>-	 * david.rusling@reo.mts.dec.com.  This code is needed for the</div><div class='del'>-	 * EB64+ as it does not generate a machine check (why I don't</div><div class='del'>-	 * know).  When we build kernels for one particular platform</div><div class='del'>-	 * then we can make this conditional on the type.</div><div class='del'>-	 */</div><div class='del'>-	draina();</div><div class='del'>-</div><div class='del'>-	/* Now look for any errors.  */</div><div class='del'>-	stat0 = *(vuip)APECS_IOC_DCSR;</div><div class='del'>-</div><div class='del'>-	/* Is any error bit set? */</div><div class='del'>-	if (stat0 &amp; 0xffe0U) {</div><div class='del'>-		/* If not NDEV, print status.  */</div><div class='del'>-		if (!(stat0 &amp; 0x0800)) {</div><div class='del'>-			printk("apecs.c:conf_write: got stat0=%x\n", stat0);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Reset error status.  */</div><div class='del'>-		*(vuip)APECS_IOC_DCSR = stat0;</div><div class='del'>-		mb();</div><div class='del'>-		wrmces(0x7);			/* reset machine check */</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* If Type1 access, must reset HAE #2 so normal IO space ops work.  */</div><div class='del'>-	if (type1) {</div><div class='del'>-		*(vuip)APECS_IOC_HAXR2 = haxr2 &amp; ~1;</div><div class='del'>-		mb();</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-apecs_read_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-		  int size, u32 *value)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr, pci_addr;</div><div class='del'>-	unsigned char type1;</div><div class='del'>-	long mask;</div><div class='del'>-	int shift;</div><div class='del'>-</div><div class='del'>-	if (mk_conf_addr(bus, devfn, where, &amp;pci_addr, &amp;type1))</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	mask = (size - 1) * 8;</div><div class='del'>-	shift = (where &amp; 3) * 8;</div><div class='del'>-	addr = (pci_addr &lt;&lt; 5) + mask + APECS_CONF;</div><div class='del'>-	*value = conf_read(addr, type1) &gt;&gt; (shift);</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-apecs_write_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-		   int size, u32 value)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr, pci_addr;</div><div class='del'>-	unsigned char type1;</div><div class='del'>-	long mask;</div><div class='del'>-</div><div class='del'>-	if (mk_conf_addr(bus, devfn, where, &amp;pci_addr, &amp;type1))</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	mask = (size - 1) * 8;</div><div class='del'>-	addr = (pci_addr &lt;&lt; 5) + mask + APECS_CONF;</div><div class='del'>-	conf_write(addr, value &lt;&lt; ((where &amp; 3) * 8), type1);</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct pci_ops apecs_pci_ops = </div><div class='del'>-{</div><div class='del'>-	.read =		apecs_read_config,</div><div class='del'>-	.write =	apecs_write_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-apecs_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)</div><div class='del'>-{</div><div class='del'>-	wmb();</div><div class='del'>-	*(vip)APECS_IOC_TBIA = 0;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-apecs_init_arch(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Create our single hose.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	pci_isa_hose = hose = alloc_pci_controller();</div><div class='del'>-	hose-&gt;io_space = &amp;ioport_resource;</div><div class='del'>-	hose-&gt;mem_space = &amp;iomem_resource;</div><div class='del'>-	hose-&gt;index = 0;</div><div class='del'>-</div><div class='del'>-	hose-&gt;sparse_mem_base = APECS_SPARSE_MEM - IDENT_ADDR;</div><div class='del'>-	hose-&gt;dense_mem_base = APECS_DENSE_MEM - IDENT_ADDR;</div><div class='del'>-	hose-&gt;sparse_io_base = APECS_IO - IDENT_ADDR;</div><div class='del'>-	hose-&gt;dense_io_base = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up the PCI to main memory translation windows.</div><div class='del'>-	 *</div><div class='del'>-	 * Window 1 is direct access 1GB at 1GB</div><div class='del'>-	 * Window 2 is scatter-gather 8MB at 8MB (for isa)</div><div class='del'>-	 */</div><div class='del'>-	hose-&gt;sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,</div><div class='del'>-				       SMP_CACHE_BYTES);</div><div class='del'>-	hose-&gt;sg_pci = NULL;</div><div class='del'>-	__direct_map_base = 0x40000000;</div><div class='del'>-	__direct_map_size = 0x40000000;</div><div class='del'>-</div><div class='del'>-	*(vuip)APECS_IOC_PB1R = __direct_map_base | 0x00080000;</div><div class='del'>-	*(vuip)APECS_IOC_PM1R = (__direct_map_size - 1) &amp; 0xfff00000U;</div><div class='del'>-	*(vuip)APECS_IOC_TB1R = 0;</div><div class='del'>-</div><div class='del'>-	*(vuip)APECS_IOC_PB2R = hose-&gt;sg_isa-&gt;dma_base | 0x000c0000;</div><div class='del'>-	*(vuip)APECS_IOC_PM2R = (hose-&gt;sg_isa-&gt;size - 1) &amp; 0xfff00000;</div><div class='del'>-	*(vuip)APECS_IOC_TB2R = virt_to_phys(hose-&gt;sg_isa-&gt;ptes) &gt;&gt; 1;</div><div class='del'>-</div><div class='del'>-	apecs_pci_tbi(hose, 0, -1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Finally, clear the HAXR2 register, which gets used</div><div class='del'>-	 * for PCI Config Space accesses. That is the way</div><div class='del'>-	 * we want to use it, and we do not want to depend on</div><div class='del'>-	 * what ARC or SRM might have left behind...</div><div class='del'>-	 */</div><div class='del'>-	*(vuip)APECS_IOC_HAXR2 = 0;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-apecs_pci_clr_err(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int jd;</div><div class='del'>-</div><div class='del'>-	jd = *(vuip)APECS_IOC_DCSR;</div><div class='del'>-	if (jd &amp; 0xffe0L) {</div><div class='del'>-		*(vuip)APECS_IOC_SEAR;</div><div class='del'>-		*(vuip)APECS_IOC_DCSR = jd | 0xffe1L;</div><div class='del'>-		mb();</div><div class='del'>-		*(vuip)APECS_IOC_DCSR;</div><div class='del'>-	}</div><div class='del'>-	*(vuip)APECS_IOC_TBIA = (unsigned int)APECS_IOC_TBIA;</div><div class='del'>-	mb();</div><div class='del'>-	*(vuip)APECS_IOC_TBIA;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-apecs_machine_check(unsigned long vector, unsigned long la_ptr)</div><div class='del'>-{</div><div class='del'>-	struct el_common *mchk_header;</div><div class='del'>-	struct el_apecs_procdata *mchk_procdata;</div><div class='del'>-	struct el_apecs_sysdata_mcheck *mchk_sysdata;</div><div class='del'>-</div><div class='del'>-	mchk_header = (struct el_common *)la_ptr;</div><div class='del'>-</div><div class='del'>-	mchk_procdata = (struct el_apecs_procdata *)</div><div class='del'>-		(la_ptr + mchk_header-&gt;proc_offset</div><div class='del'>-		 - sizeof(mchk_procdata-&gt;paltemp));</div><div class='del'>-</div><div class='del'>-	mchk_sysdata = (struct el_apecs_sysdata_mcheck *)</div><div class='del'>-		(la_ptr + mchk_header-&gt;sys_offset);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Clear the error before any reporting.  */</div><div class='del'>-	mb();</div><div class='del'>-	mb(); /* magic */</div><div class='del'>-	draina();</div><div class='del'>-	apecs_pci_clr_err();</div><div class='del'>-	wrmces(0x7);		/* reset machine check pending flag */</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	process_mcheck_info(vector, la_ptr, "APECS",</div><div class='del'>-			    (mcheck_expected(0)</div><div class='del'>-			     &amp;&amp; (mchk_sysdata-&gt;epic_dcsr &amp; 0x0c00UL)));</div><div class='del'>-}</div><div class='head'>diff --git a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c<br/>index 12926e9538b8..ca3d9c732b61 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_cia.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_cia.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_cia.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/core_cia.c</a></div><div class='hunk'>@@ -280,7 +280,7 @@ cia_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)</div><div class='ctx'> #define CIA_BROKEN_TBIA_SIZE	1024</div><div class='ctx'> </div><div class='ctx'> /* Always called with interrupts disabled */</div><div class='del'>-void</div><div class='add'>+static void</div><div class='ctx'> cia_pci_tbi_try2(struct pci_controller *hose,</div><div class='ctx'> 		 dma_addr_t start, dma_addr_t end)</div><div class='ctx'> {</div><div class='hunk'>@@ -576,7 +576,7 @@ struct</div><div class='ctx'>     } window[4];</div><div class='ctx'> } saved_config __attribute((common));</div><div class='ctx'> </div><div class='del'>-void</div><div class='add'>+static void</div><div class='ctx'> cia_save_srm_settings(int is_pyxis)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -602,7 +602,7 @@ cia_save_srm_settings(int is_pyxis)</div><div class='ctx'> 	mb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='add'>+static void</div><div class='ctx'> cia_restore_srm_settings(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/arch/alpha/kernel/core_irongate.c b/arch/alpha/kernel/core_irongate.c<br/>index 6b8ed12936b6..05dc4c1b9074 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_irongate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_irongate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_irongate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/core_irongate.c</a></div><div class='hunk'>@@ -226,7 +226,6 @@ albacore_init_arch(void)</div><div class='ctx'> 	if (memtop &gt; pci_mem) {</div><div class='ctx'> #ifdef CONFIG_BLK_DEV_INITRD</div><div class='ctx'> 		extern unsigned long initrd_start, initrd_end;</div><div class='del'>-		extern void *move_initrd(unsigned long);</div><div class='ctx'> </div><div class='ctx'> 		/* Move the initrd out of the way. */</div><div class='ctx'> 		if (initrd_end &amp;&amp; __pa(initrd_end) &gt; pci_mem) {</div><div class='head'>diff --git a/arch/alpha/kernel/core_lca.c b/arch/alpha/kernel/core_lca.c<br/>deleted file mode 100644<br/>index 57e0750419f2..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_lca.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_lca.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,517 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	linux/arch/alpha/kernel/core_lca.c</div><div class='del'>- *</div><div class='del'>- * Written by David Mosberger (davidm@cs.arizona.edu) with some code</div><div class='del'>- * taken from Dave Rusling's (david.rusling@reo.mts.dec.com) 32-bit</div><div class='del'>- * bios code.</div><div class='del'>- *</div><div class='del'>- * Code common to all LCA core logic chips.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define __EXTERN_INLINE inline</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_lca.h&gt;</div><div class='del'>-#undef __EXTERN_INLINE</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/irq_regs.h&gt;</div><div class='del'>-#include &lt;asm/smp.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proto.h"</div><div class='del'>-#include "pci_impl.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * BIOS32-style PCI interface:</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Machine check reasons.  Defined according to PALcode sources</div><div class='del'>- * (osf.h and platform.h).</div><div class='del'>- */</div><div class='del'>-#define MCHK_K_TPERR		0x0080</div><div class='del'>-#define MCHK_K_TCPERR		0x0082</div><div class='del'>-#define MCHK_K_HERR		0x0084</div><div class='del'>-#define MCHK_K_ECC_C		0x0086</div><div class='del'>-#define MCHK_K_ECC_NC		0x0088</div><div class='del'>-#define MCHK_K_UNKNOWN		0x008A</div><div class='del'>-#define MCHK_K_CACKSOFT		0x008C</div><div class='del'>-#define MCHK_K_BUGCHECK		0x008E</div><div class='del'>-#define MCHK_K_OS_BUGCHECK	0x0090</div><div class='del'>-#define MCHK_K_DCPERR		0x0092</div><div class='del'>-#define MCHK_K_ICPERR		0x0094</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Platform-specific machine-check reasons:</div><div class='del'>- */</div><div class='del'>-#define MCHK_K_SIO_SERR		0x204	/* all platforms so far */</div><div class='del'>-#define MCHK_K_SIO_IOCHK	0x206	/* all platforms so far */</div><div class='del'>-#define MCHK_K_DCSR		0x208	/* all but Noname */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Given a bus, device, and function number, compute resulting</div><div class='del'>- * configuration space address and setup the LCA_IOC_CONF register</div><div class='del'>- * accordingly.  It is therefore not safe to have concurrent</div><div class='del'>- * invocations to configuration space access routines, but there</div><div class='del'>- * really shouldn't be any need for this.</div><div class='del'>- *</div><div class='del'>- * Type 0:</div><div class='del'>- *</div><div class='del'>- *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 </div><div class='del'>- *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- * | | | | | | | | | | | | | | | | | | | | | | | |F|F|F|R|R|R|R|R|R|0|0|</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- *</div><div class='del'>- *	31:11	Device select bit.</div><div class='del'>- * 	10:8	Function number</div><div class='del'>- * 	 7:2	Register number</div><div class='del'>- *</div><div class='del'>- * Type 1:</div><div class='del'>- *</div><div class='del'>- *  3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 </div><div class='del'>- *  3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- * | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|</div><div class='del'>- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>- *</div><div class='del'>- *	31:24	reserved</div><div class='del'>- *	23:16	bus number (8 bits = 128 possible buses)</div><div class='del'>- *	15:11	Device number (5 bits)</div><div class='del'>- *	10:8	function number</div><div class='del'>- *	 7:2	register number</div><div class='del'>- *  </div><div class='del'>- * Notes:</div><div class='del'>- *	The function number selects which function of a multi-function device </div><div class='del'>- *	(e.g., SCSI and Ethernet).</div><div class='del'>- * </div><div class='del'>- *	The register selects a DWORD (32 bit) register offset.  Hence it</div><div class='del'>- *	doesn't get shifted by 2 bits as we want to "drop" the bottom two</div><div class='del'>- *	bits.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where,</div><div class='del'>-	     unsigned long *pci_addr)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr;</div><div class='del'>-	u8 bus = pbus-&gt;number;</div><div class='del'>-</div><div class='del'>-	if (bus == 0) {</div><div class='del'>-		int device = device_fn &gt;&gt; 3;</div><div class='del'>-		int func = device_fn &amp; 0x7;</div><div class='del'>-</div><div class='del'>-		/* Type 0 configuration cycle.  */</div><div class='del'>-</div><div class='del'>-		if (device &gt; 12) {</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		*(vulp)LCA_IOC_CONF = 0;</div><div class='del'>-		addr = (1 &lt;&lt; (11 + device)) | (func &lt;&lt; 8) | where;</div><div class='del'>-	} else {</div><div class='del'>-		/* Type 1 configuration cycle.  */</div><div class='del'>-		*(vulp)LCA_IOC_CONF = 1;</div><div class='del'>-		addr = (bus &lt;&lt; 16) | (device_fn &lt;&lt; 8) | where;</div><div class='del'>-	}</div><div class='del'>-	*pci_addr = addr;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-conf_read(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags, code, stat0;</div><div class='del'>-	unsigned int value;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	/* Reset status register to avoid losing errors.  */</div><div class='del'>-	stat0 = *(vulp)LCA_IOC_STAT0;</div><div class='del'>-	*(vulp)LCA_IOC_STAT0 = stat0;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/* Access configuration space.  */</div><div class='del'>-	value = *(vuip)addr;</div><div class='del'>-	draina();</div><div class='del'>-</div><div class='del'>-	stat0 = *(vulp)LCA_IOC_STAT0;</div><div class='del'>-	if (stat0 &amp; LCA_IOC_STAT0_ERR) {</div><div class='del'>-		code = ((stat0 &gt;&gt; LCA_IOC_STAT0_CODE_SHIFT)</div><div class='del'>-			&amp; LCA_IOC_STAT0_CODE_MASK);</div><div class='del'>-		if (code != 1) {</div><div class='del'>-			printk("lca.c:conf_read: got stat0=%lx\n", stat0);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Reset error status.  */</div><div class='del'>-		*(vulp)LCA_IOC_STAT0 = stat0;</div><div class='del'>-		mb();</div><div class='del'>-</div><div class='del'>-		/* Reset machine check.  */</div><div class='del'>-		wrmces(0x7);</div><div class='del'>-</div><div class='del'>-		value = 0xffffffff;</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-conf_write(unsigned long addr, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags, code, stat0;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);	/* avoid getting hit by machine check */</div><div class='del'>-</div><div class='del'>-	/* Reset status register to avoid losing errors.  */</div><div class='del'>-	stat0 = *(vulp)LCA_IOC_STAT0;</div><div class='del'>-	*(vulp)LCA_IOC_STAT0 = stat0;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/* Access configuration space.  */</div><div class='del'>-	*(vuip)addr = value;</div><div class='del'>-	draina();</div><div class='del'>-</div><div class='del'>-	stat0 = *(vulp)LCA_IOC_STAT0;</div><div class='del'>-	if (stat0 &amp; LCA_IOC_STAT0_ERR) {</div><div class='del'>-		code = ((stat0 &gt;&gt; LCA_IOC_STAT0_CODE_SHIFT)</div><div class='del'>-			&amp; LCA_IOC_STAT0_CODE_MASK);</div><div class='del'>-		if (code != 1) {</div><div class='del'>-			printk("lca.c:conf_write: got stat0=%lx\n", stat0);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Reset error status.  */</div><div class='del'>-		*(vulp)LCA_IOC_STAT0 = stat0;</div><div class='del'>-		mb();</div><div class='del'>-</div><div class='del'>-		/* Reset machine check. */</div><div class='del'>-		wrmces(0x7);</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-lca_read_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-		int size, u32 *value)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr, pci_addr;</div><div class='del'>-	long mask;</div><div class='del'>-	int shift;</div><div class='del'>-</div><div class='del'>-	if (mk_conf_addr(bus, devfn, where, &amp;pci_addr))</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	shift = (where &amp; 3) * 8;</div><div class='del'>-	mask = (size - 1) * 8;</div><div class='del'>-	addr = (pci_addr &lt;&lt; 5) + mask + LCA_CONF;</div><div class='del'>-	*value = conf_read(addr) &gt;&gt; (shift);</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int </div><div class='del'>-lca_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,</div><div class='del'>-		 u32 value)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr, pci_addr;</div><div class='del'>-	long mask;</div><div class='del'>-</div><div class='del'>-	if (mk_conf_addr(bus, devfn, where, &amp;pci_addr))</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	mask = (size - 1) * 8;</div><div class='del'>-	addr = (pci_addr &lt;&lt; 5) + mask + LCA_CONF;</div><div class='del'>-	conf_write(addr, value &lt;&lt; ((where &amp; 3) * 8));</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct pci_ops lca_pci_ops = </div><div class='del'>-{</div><div class='del'>-	.read =		lca_read_config,</div><div class='del'>-	.write =	lca_write_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-lca_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)</div><div class='del'>-{</div><div class='del'>-	wmb();</div><div class='del'>-	*(vulp)LCA_IOC_TBIA = 0;</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-lca_init_arch(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Create our single hose.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	pci_isa_hose = hose = alloc_pci_controller();</div><div class='del'>-	hose-&gt;io_space = &amp;ioport_resource;</div><div class='del'>-	hose-&gt;mem_space = &amp;iomem_resource;</div><div class='del'>-	hose-&gt;index = 0;</div><div class='del'>-</div><div class='del'>-	hose-&gt;sparse_mem_base = LCA_SPARSE_MEM - IDENT_ADDR;</div><div class='del'>-	hose-&gt;dense_mem_base = LCA_DENSE_MEM - IDENT_ADDR;</div><div class='del'>-	hose-&gt;sparse_io_base = LCA_IO - IDENT_ADDR;</div><div class='del'>-	hose-&gt;dense_io_base = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up the PCI to main memory translation windows.</div><div class='del'>-	 *</div><div class='del'>-	 * Mimic the SRM settings for the direct-map window.</div><div class='del'>-	 *   Window 0 is scatter-gather 8MB at 8MB (for isa).</div><div class='del'>-	 *   Window 1 is direct access 1GB at 1GB.</div><div class='del'>-	 *</div><div class='del'>-	 * Note that we do not try to save any of the DMA window CSRs</div><div class='del'>-	 * before setting them, since we cannot read those CSRs on LCA.</div><div class='del'>-	 */</div><div class='del'>-	hose-&gt;sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,</div><div class='del'>-				       SMP_CACHE_BYTES);</div><div class='del'>-	hose-&gt;sg_pci = NULL;</div><div class='del'>-	__direct_map_base = 0x40000000;</div><div class='del'>-	__direct_map_size = 0x40000000;</div><div class='del'>-</div><div class='del'>-	*(vulp)LCA_IOC_W_BASE0 = hose-&gt;sg_isa-&gt;dma_base | (3UL &lt;&lt; 32);</div><div class='del'>-	*(vulp)LCA_IOC_W_MASK0 = (hose-&gt;sg_isa-&gt;size - 1) &amp; 0xfff00000;</div><div class='del'>-	*(vulp)LCA_IOC_T_BASE0 = virt_to_phys(hose-&gt;sg_isa-&gt;ptes);</div><div class='del'>-</div><div class='del'>-	*(vulp)LCA_IOC_W_BASE1 = __direct_map_base | (2UL &lt;&lt; 32);</div><div class='del'>-	*(vulp)LCA_IOC_W_MASK1 = (__direct_map_size - 1) &amp; 0xfff00000;</div><div class='del'>-	*(vulp)LCA_IOC_T_BASE1 = 0;</div><div class='del'>-</div><div class='del'>-	*(vulp)LCA_IOC_TB_ENA = 0x80;</div><div class='del'>-</div><div class='del'>-	lca_pci_tbi(hose, 0, -1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Disable PCI parity for now.  The NCR53c810 chip has</div><div class='del'>-	 * troubles meeting the PCI spec which results in</div><div class='del'>-	 * data parity errors.</div><div class='del'>-	 */</div><div class='del'>-	*(vulp)LCA_IOC_PAR_DIS = 1UL&lt;&lt;5;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Finally, set up for restoring the correct HAE if using SRM.</div><div class='del'>-	 * Again, since we cannot read many of the CSRs on the LCA,</div><div class='del'>-	 * one of which happens to be the HAE, we save the value that</div><div class='del'>-	 * the SRM will expect...</div><div class='del'>-	 */</div><div class='del'>-	if (alpha_using_srm)</div><div class='del'>-		srm_hae = 0x80000000UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Constants used during machine-check handling.  I suppose these</div><div class='del'>- * could be moved into lca.h but I don't see much reason why anybody</div><div class='del'>- * else would want to use them.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define ESR_EAV		(1UL&lt;&lt; 0)	/* error address valid */</div><div class='del'>-#define ESR_CEE		(1UL&lt;&lt; 1)	/* correctable error */</div><div class='del'>-#define ESR_UEE		(1UL&lt;&lt; 2)	/* uncorrectable error */</div><div class='del'>-#define ESR_WRE		(1UL&lt;&lt; 3)	/* write-error */</div><div class='del'>-#define ESR_SOR		(1UL&lt;&lt; 4)	/* error source */</div><div class='del'>-#define ESR_CTE		(1UL&lt;&lt; 7)	/* cache-tag error */</div><div class='del'>-#define ESR_MSE		(1UL&lt;&lt; 9)	/* multiple soft errors */</div><div class='del'>-#define ESR_MHE		(1UL&lt;&lt;10)	/* multiple hard errors */</div><div class='del'>-#define ESR_NXM		(1UL&lt;&lt;12)	/* non-existent memory */</div><div class='del'>-</div><div class='del'>-#define IOC_ERR		(  1&lt;&lt;4)	/* ioc logs an error */</div><div class='del'>-#define IOC_CMD_SHIFT	0</div><div class='del'>-#define IOC_CMD		(0xf&lt;&lt;IOC_CMD_SHIFT)</div><div class='del'>-#define IOC_CODE_SHIFT	8</div><div class='del'>-#define IOC_CODE	(0xf&lt;&lt;IOC_CODE_SHIFT)</div><div class='del'>-#define IOC_LOST	(  1&lt;&lt;5)</div><div class='del'>-#define IOC_P_NBR	((__u32) ~((1&lt;&lt;13) - 1))</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mem_error(unsigned long esr, unsigned long ear)</div><div class='del'>-{</div><div class='del'>-	printk("    %s %s error to %s occurred at address %x\n",</div><div class='del'>-	       ((esr &amp; ESR_CEE) ? "Correctable" :</div><div class='del'>-		(esr &amp; ESR_UEE) ? "Uncorrectable" : "A"),</div><div class='del'>-	       (esr &amp; ESR_WRE) ? "write" : "read",</div><div class='del'>-	       (esr &amp; ESR_SOR) ? "memory" : "b-cache",</div><div class='del'>-	       (unsigned) (ear &amp; 0x1ffffff8));</div><div class='del'>-	if (esr &amp; ESR_CTE) {</div><div class='del'>-		printk("    A b-cache tag parity error was detected.\n");</div><div class='del'>-	}</div><div class='del'>-	if (esr &amp; ESR_MSE) {</div><div class='del'>-		printk("    Several other correctable errors occurred.\n");</div><div class='del'>-	}</div><div class='del'>-	if (esr &amp; ESR_MHE) {</div><div class='del'>-		printk("    Several other uncorrectable errors occurred.\n");</div><div class='del'>-	}</div><div class='del'>-	if (esr &amp; ESR_NXM) {</div><div class='del'>-		printk("    Attempted to access non-existent memory.\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ioc_error(__u32 stat0, __u32 stat1)</div><div class='del'>-{</div><div class='del'>-	static const char * const pci_cmd[] = {</div><div class='del'>-		"Interrupt Acknowledge", "Special", "I/O Read", "I/O Write",</div><div class='del'>-		"Rsvd 1", "Rsvd 2", "Memory Read", "Memory Write", "Rsvd3",</div><div class='del'>-		"Rsvd4", "Configuration Read", "Configuration Write",</div><div class='del'>-		"Memory Read Multiple", "Dual Address", "Memory Read Line",</div><div class='del'>-		"Memory Write and Invalidate"</div><div class='del'>-	};</div><div class='del'>-	static const char * const err_name[] = {</div><div class='del'>-		"exceeded retry limit", "no device", "bad data parity",</div><div class='del'>-		"target abort", "bad address parity", "page table read error",</div><div class='del'>-		"invalid page", "data error"</div><div class='del'>-	};</div><div class='del'>-	unsigned code = (stat0 &amp; IOC_CODE) &gt;&gt; IOC_CODE_SHIFT;</div><div class='del'>-	unsigned cmd  = (stat0 &amp; IOC_CMD)  &gt;&gt; IOC_CMD_SHIFT;</div><div class='del'>-</div><div class='del'>-	printk("    %s initiated PCI %s cycle to address %x"</div><div class='del'>-	       " failed due to %s.\n",</div><div class='del'>-	       code &gt; 3 ? "PCI" : "CPU", pci_cmd[cmd], stat1, err_name[code]);</div><div class='del'>-</div><div class='del'>-	if (code == 5 || code == 6) {</div><div class='del'>-		printk("    (Error occurred at PCI memory address %x.)\n",</div><div class='del'>-		       (stat0 &amp; ~IOC_P_NBR));</div><div class='del'>-	}</div><div class='del'>-	if (stat0 &amp; IOC_LOST) {</div><div class='del'>-		printk("    Other PCI errors occurred simultaneously.\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-lca_machine_check(unsigned long vector, unsigned long la_ptr)</div><div class='del'>-{</div><div class='del'>-	const char * reason;</div><div class='del'>-	union el_lca el;</div><div class='del'>-</div><div class='del'>-	el.c = (struct el_common *) la_ptr;</div><div class='del'>-</div><div class='del'>-	wrmces(rdmces());	/* reset machine check pending flag */</div><div class='del'>-</div><div class='del'>-	printk(KERN_CRIT "LCA machine check: vector=%#lx pc=%#lx code=%#x\n",</div><div class='del'>-	       vector, get_irq_regs()-&gt;pc, (unsigned int) el.c-&gt;code);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The first quadword after the common header always seems to</div><div class='del'>-	 * be the machine check reason---don't know why this isn't</div><div class='del'>-	 * part of the common header instead.  In the case of a long</div><div class='del'>-	 * logout frame, the upper 32 bits is the machine check</div><div class='del'>-	 * revision level, which we ignore for now.</div><div class='del'>-	 */</div><div class='del'>-	switch ((unsigned int) el.c-&gt;code) {</div><div class='del'>-	case MCHK_K_TPERR:	reason = "tag parity error"; break;</div><div class='del'>-	case MCHK_K_TCPERR:	reason = "tag control parity error"; break;</div><div class='del'>-	case MCHK_K_HERR:	reason = "access to non-existent memory"; break;</div><div class='del'>-	case MCHK_K_ECC_C:	reason = "correctable ECC error"; break;</div><div class='del'>-	case MCHK_K_ECC_NC:	reason = "non-correctable ECC error"; break;</div><div class='del'>-	case MCHK_K_CACKSOFT:	reason = "MCHK_K_CACKSOFT"; break;</div><div class='del'>-	case MCHK_K_BUGCHECK:	reason = "illegal exception in PAL mode"; break;</div><div class='del'>-	case MCHK_K_OS_BUGCHECK: reason = "callsys in kernel mode"; break;</div><div class='del'>-	case MCHK_K_DCPERR:	reason = "d-cache parity error"; break;</div><div class='del'>-	case MCHK_K_ICPERR:	reason = "i-cache parity error"; break;</div><div class='del'>-	case MCHK_K_SIO_SERR:	reason = "SIO SERR occurred on PCI bus"; break;</div><div class='del'>-	case MCHK_K_SIO_IOCHK:	reason = "SIO IOCHK occurred on ISA bus"; break;</div><div class='del'>-	case MCHK_K_DCSR:	reason = "MCHK_K_DCSR"; break;</div><div class='del'>-	case MCHK_K_UNKNOWN:</div><div class='del'>-	default:		reason = "unknown"; break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (el.c-&gt;size) {</div><div class='del'>-	case sizeof(struct el_lca_mcheck_short):</div><div class='del'>-		printk(KERN_CRIT</div><div class='del'>-		       "  Reason: %s (short frame%s, dc_stat=%#lx):\n",</div><div class='del'>-		       reason, el.c-&gt;retry ? ", retryable" : "",</div><div class='del'>-		       el.s-&gt;dc_stat);</div><div class='del'>-		if (el.s-&gt;esr &amp; ESR_EAV) {</div><div class='del'>-			mem_error(el.s-&gt;esr, el.s-&gt;ear);</div><div class='del'>-		}</div><div class='del'>-		if (el.s-&gt;ioc_stat0 &amp; IOC_ERR) {</div><div class='del'>-			ioc_error(el.s-&gt;ioc_stat0, el.s-&gt;ioc_stat1);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case sizeof(struct el_lca_mcheck_long):</div><div class='del'>-		printk(KERN_CRIT "  Reason: %s (long frame%s):\n",</div><div class='del'>-		       reason, el.c-&gt;retry ? ", retryable" : "");</div><div class='del'>-		printk(KERN_CRIT</div><div class='del'>-		       "    reason: %#lx  exc_addr: %#lx  dc_stat: %#lx\n", </div><div class='del'>-		       el.l-&gt;pt[0], el.l-&gt;exc_addr, el.l-&gt;dc_stat);</div><div class='del'>-		printk(KERN_CRIT "    car: %#lx\n", el.l-&gt;car);</div><div class='del'>-		if (el.l-&gt;esr &amp; ESR_EAV) {</div><div class='del'>-			mem_error(el.l-&gt;esr, el.l-&gt;ear);</div><div class='del'>-		}</div><div class='del'>-		if (el.l-&gt;ioc_stat0 &amp; IOC_ERR) {</div><div class='del'>-			ioc_error(el.l-&gt;ioc_stat0, el.l-&gt;ioc_stat1);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_CRIT "  Unknown errorlog size %d\n", el.c-&gt;size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Dump the logout area to give all info.  */</div><div class='del'>-#ifdef CONFIG_VERBOSE_MCHECK</div><div class='del'>-	if (alpha_verbose_mcheck &gt; 1) {</div><div class='del'>-		unsigned long * ptr = (unsigned long *) la_ptr;</div><div class='del'>-		long i;</div><div class='del'>-		for (i = 0; i &lt; el.c-&gt;size / sizeof(long); i += 2) {</div><div class='del'>-			printk(KERN_CRIT " +%8lx %016lx %016lx\n",</div><div class='del'>-			       i*sizeof(long), ptr[i], ptr[i+1]);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif /* CONFIG_VERBOSE_MCHECK */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The following routines are needed to support the SPEED changing</div><div class='del'>- * necessary to successfully manage the thermal problem on the AlphaBook1.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-lca_clock_print(void)</div><div class='del'>-{</div><div class='del'>-        long    pmr_reg;</div><div class='del'>-</div><div class='del'>-        pmr_reg = LCA_READ_PMR;</div><div class='del'>-</div><div class='del'>-        printk("Status of clock control:\n");</div><div class='del'>-        printk("\tPrimary clock divisor\t0x%lx\n", LCA_GET_PRIMARY(pmr_reg));</div><div class='del'>-        printk("\tOverride clock divisor\t0x%lx\n", LCA_GET_OVERRIDE(pmr_reg));</div><div class='del'>-        printk("\tInterrupt override is %s\n",</div><div class='del'>-	       (pmr_reg &amp; LCA_PMR_INTO) ? "on" : "off"); </div><div class='del'>-        printk("\tDMA override is %s\n",</div><div class='del'>-	       (pmr_reg &amp; LCA_PMR_DMAO) ? "on" : "off"); </div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-lca_get_clock(void)</div><div class='del'>-{</div><div class='del'>-        long    pmr_reg;</div><div class='del'>-</div><div class='del'>-        pmr_reg = LCA_READ_PMR;</div><div class='del'>-        return(LCA_GET_PRIMARY(pmr_reg));</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-lca_clock_fiddle(int divisor)</div><div class='del'>-{</div><div class='del'>-        long    pmr_reg;</div><div class='del'>-</div><div class='del'>-        pmr_reg = LCA_READ_PMR;</div><div class='del'>-        LCA_SET_PRIMARY_CLOCK(pmr_reg, divisor);</div><div class='del'>-	/* lca_norm_clock = divisor; */</div><div class='del'>-        LCA_WRITE_PMR(pmr_reg);</div><div class='del'>-        mb();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c<br/>index e9348aec4649..b22248044bf0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_marvel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_marvel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_marvel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/core_marvel.c</a></div><div class='hunk'>@@ -355,7 +355,7 @@ marvel_init_io7(struct io7 *io7)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+static void __init</div><div class='ctx'> marvel_io7_present(gct6_node *node)</div><div class='ctx'> {</div><div class='ctx'> 	int pe;</div><div class='head'>diff --git a/arch/alpha/kernel/core_t2.c b/arch/alpha/kernel/core_t2.c<br/>index 98d5b6ff8a76..3d72d90624f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_t2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_t2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_t2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/core_t2.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'>  * Code common to all T2 core logic chips.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define __EXTERN_INLINE</div><div class='add'>+#define __EXTERN_INLINE inline</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/core_t2.h&gt;</div><div class='ctx'> #undef __EXTERN_INLINE</div><div class='head'>diff --git a/arch/alpha/kernel/core_wildfire.c b/arch/alpha/kernel/core_wildfire.c<br/>index 3a804b67f9da..8dd08c5e4270 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_wildfire.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/core_wildfire.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/core_wildfire.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/core_wildfire.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ unsigned long wildfire_pca_mask;</div><div class='ctx'> unsigned long wildfire_cpu_mask;</div><div class='ctx'> unsigned long wildfire_mem_mask;</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+static void __init</div><div class='ctx'> wildfire_init_hose(int qbbno, int hoseno)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose;</div><div class='hunk'>@@ -137,7 +137,7 @@ wildfire_init_hose(int qbbno, int hoseno)</div><div class='ctx'> 	wildfire_pci_tbi(hose, 0, 0); /* Flush TLB at the end. */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+static void __init</div><div class='ctx'> wildfire_init_pca(int qbbno, int pcano)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='hunk'>@@ -154,7 +154,7 @@ wildfire_init_pca(int qbbno, int pcano)</div><div class='ctx'> 	wildfire_init_hose(qbbno, (pcano &lt;&lt; 1) + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+static void __init</div><div class='ctx'> wildfire_init_qbb(int qbbno)</div><div class='ctx'> {</div><div class='ctx'> 	int pcano;</div><div class='hunk'>@@ -176,7 +176,7 @@ wildfire_init_qbb(int qbbno)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+static void __init</div><div class='ctx'> wildfire_hardware_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long temp;</div><div class='head'>diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S<br/>index eb51f93a70c8..dd26062d75b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/entry.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/entry.S</a></div><div class='hunk'>@@ -811,6 +811,7 @@ alpha_\name:</div><div class='ctx'> fork_like fork</div><div class='ctx'> fork_like vfork</div><div class='ctx'> fork_like clone</div><div class='add'>+fork_like clone3</div><div class='ctx'> </div><div class='ctx'> .macro	sigreturn_like name</div><div class='ctx'> 	.align	4</div><div class='head'>diff --git a/arch/alpha/kernel/io.c b/arch/alpha/kernel/io.c<br/>index eda09778268f..c28035d6d1e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/io.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/io.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/io.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/io.c</a></div><div class='hunk'>@@ -647,6 +647,10 @@ void _memset_c_io(volatile void __iomem *to, unsigned long c, long count)</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(_memset_c_io);</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_VGA_CONSOLE) || IS_ENABLED(CONFIG_MDA_CONSOLE)</div><div class='add'>+</div><div class='add'>+#include &lt;asm/vga.h&gt;</div><div class='add'>+</div><div class='ctx'> /* A version of memcpy used by the vga console routines to move data around</div><div class='ctx'>    arbitrarily between screen and main memory.  */</div><div class='ctx'> </div><div class='hunk'>@@ -681,6 +685,21 @@ scr_memcpyw(u16 *d, const u16 *s, unsigned int count)</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(scr_memcpyw);</div><div class='ctx'> </div><div class='add'>+void scr_memmovew(u16 *d, const u16 *s, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (d &lt; s)</div><div class='add'>+		scr_memcpyw(d, s, count);</div><div class='add'>+	else {</div><div class='add'>+		count /= 2;</div><div class='add'>+		d += count;</div><div class='add'>+		s += count;</div><div class='add'>+		while (count--)</div><div class='add'>+			scr_writew(scr_readw(--s), --d);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(scr_memmovew);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void __iomem *ioport_map(unsigned long port, unsigned int size)</div><div class='ctx'> {</div><div class='ctx'> 	return IO_CONCAT(__IO_PREFIX,ioportmap) (port);</div><div class='head'>diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c<br/>index 15f2effd6baf..c67047c5d830 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/irq.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include "irq_impl.h"</div><div class='ctx'> </div><div class='ctx'> volatile unsigned long irq_err_count;</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, irq_pmi_count);</div><div class='head'>diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c<br/>index 1dcf0d9038fd..29c6c477ac35 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/irq_i8259.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/irq_i8259.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/irq_i8259.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/irq_i8259.c</a></div><div class='hunk'>@@ -98,10 +98,6 @@ init_i8259a_irqs(void)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ALPHA_GENERIC)</div><div class='ctx'> # define IACK_SC	alpha_mv.iack_sc</div><div class='del'>-#elif defined(CONFIG_ALPHA_APECS)</div><div class='del'>-# define IACK_SC	APECS_IACK_SC</div><div class='del'>-#elif defined(CONFIG_ALPHA_LCA)</div><div class='del'>-# define IACK_SC	LCA_IACK_SC</div><div class='ctx'> #elif defined(CONFIG_ALPHA_CIA)</div><div class='ctx'> # define IACK_SC	CIA_IACK_SC</div><div class='ctx'> #elif defined(CONFIG_ALPHA_PYXIS)</div><div class='head'>diff --git a/arch/alpha/kernel/machvec_impl.h b/arch/alpha/kernel/machvec_impl.h<br/>index c2ebcb39e589..129ae36b8e6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/machvec_impl.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/machvec_impl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/machvec_impl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/machvec_impl.h</a></div><div class='hunk'>@@ -44,33 +44,14 @@</div><div class='ctx'> </div><div class='ctx'> #define DO_DEFAULT_RTC			.rtc_port = 0x70</div><div class='ctx'> </div><div class='del'>-#define DO_EV4_MMU							\</div><div class='del'>-	.max_asn =			EV4_MAX_ASN,			\</div><div class='del'>-	.mv_switch_mm =			ev4_switch_mm,			\</div><div class='del'>-	.mv_activate_mm =		ev4_activate_mm,		\</div><div class='del'>-	.mv_flush_tlb_current =		ev4_flush_tlb_current,		\</div><div class='del'>-	.mv_flush_tlb_current_page =	ev4_flush_tlb_current_page</div><div class='del'>-</div><div class='ctx'> #define DO_EV5_MMU							\</div><div class='del'>-	.max_asn =			EV5_MAX_ASN,			\</div><div class='del'>-	.mv_switch_mm =			ev5_switch_mm,			\</div><div class='del'>-	.mv_activate_mm =		ev5_activate_mm,		\</div><div class='del'>-	.mv_flush_tlb_current =		ev5_flush_tlb_current,		\</div><div class='del'>-	.mv_flush_tlb_current_page =	ev5_flush_tlb_current_page</div><div class='add'>+	.max_asn =			EV5_MAX_ASN			\</div><div class='ctx'> </div><div class='ctx'> #define DO_EV6_MMU							\</div><div class='del'>-	.max_asn =			EV6_MAX_ASN,			\</div><div class='del'>-	.mv_switch_mm =			ev5_switch_mm,			\</div><div class='del'>-	.mv_activate_mm =		ev5_activate_mm,		\</div><div class='del'>-	.mv_flush_tlb_current =		ev5_flush_tlb_current,		\</div><div class='del'>-	.mv_flush_tlb_current_page =	ev5_flush_tlb_current_page</div><div class='add'>+	.max_asn =			EV6_MAX_ASN			\</div><div class='ctx'> </div><div class='ctx'> #define DO_EV7_MMU							\</div><div class='del'>-	.max_asn =			EV6_MAX_ASN,			\</div><div class='del'>-	.mv_switch_mm =			ev5_switch_mm,			\</div><div class='del'>-	.mv_activate_mm =		ev5_activate_mm,		\</div><div class='del'>-	.mv_flush_tlb_current =		ev5_flush_tlb_current,		\</div><div class='del'>-	.mv_flush_tlb_current_page =	ev5_flush_tlb_current_page</div><div class='add'>+	.max_asn =			EV6_MAX_ASN			\</div><div class='ctx'> </div><div class='ctx'> #define IO_LITE(UP,low)							\</div><div class='ctx'> 	.hae_register =		(unsigned long *) CAT(UP,_HAE_ADDRESS),	\</div><div class='head'>diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c<br/>deleted file mode 100644<br/>index ae82061edae9..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/pci-noop.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/pci-noop.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,113 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	linux/arch/alpha/kernel/pci-noop.c</div><div class='del'>- *</div><div class='del'>- * Stub PCI interfaces for Jensen-specific kernels.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-#include &lt;linux/capability.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;linux/syscalls.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proto.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The PCI controller list.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct pci_controller *hose_head, **hose_tail = &amp;hose_head;</div><div class='del'>-struct pci_controller *pci_isa_hose;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-struct pci_controller * __init</div><div class='del'>-alloc_pci_controller(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-</div><div class='del'>-	hose = memblock_alloc(sizeof(*hose), SMP_CACHE_BYTES);</div><div class='del'>-	if (!hose)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(*hose));</div><div class='del'>-</div><div class='del'>-	*hose_tail = hose;</div><div class='del'>-	hose_tail = &amp;hose-&gt;next;</div><div class='del'>-</div><div class='del'>-	return hose;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct resource * __init</div><div class='del'>-alloc_resource(void)</div><div class='del'>-{</div><div class='del'>-	void *ptr = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);</div><div class='del'>-</div><div class='del'>-	if (!ptr)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(struct resource));</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, bus,</div><div class='del'>-		unsigned long, dfn)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-</div><div class='del'>-	/* from hose or from bus.devfn */</div><div class='del'>-	if (which &amp; IOBASE_FROM_HOSE) {</div><div class='del'>-		for (hose = hose_head; hose; hose = hose-&gt;next)</div><div class='del'>-			if (hose-&gt;index == bus)</div><div class='del'>-				break;</div><div class='del'>-		if (!hose)</div><div class='del'>-			return -ENODEV;</div><div class='del'>-	} else {</div><div class='del'>-		/* Special hook for ISA access.  */</div><div class='del'>-		if (bus == 0 &amp;&amp; dfn == 0)</div><div class='del'>-			hose = pci_isa_hose;</div><div class='del'>-		else</div><div class='del'>-			return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (which &amp; ~IOBASE_FROM_HOSE) {</div><div class='del'>-	case IOBASE_HOSE:</div><div class='del'>-		return hose-&gt;index;</div><div class='del'>-	case IOBASE_SPARSE_MEM:</div><div class='del'>-		return hose-&gt;sparse_mem_base;</div><div class='del'>-	case IOBASE_DENSE_MEM:</div><div class='del'>-		return hose-&gt;dense_mem_base;</div><div class='del'>-	case IOBASE_SPARSE_IO:</div><div class='del'>-		return hose-&gt;sparse_io_base;</div><div class='del'>-	case IOBASE_DENSE_IO:</div><div class='del'>-		return hose-&gt;dense_io_base;</div><div class='del'>-	case IOBASE_ROOT_BUS:</div><div class='del'>-		return hose-&gt;bus-&gt;number;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn,</div><div class='del'>-		unsigned long, off, unsigned long, len, void __user *, buf)</div><div class='del'>-{</div><div class='del'>-	if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-	else</div><div class='del'>-		return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,</div><div class='del'>-		unsigned long, off, unsigned long, len, void __user *, buf)</div><div class='del'>-{</div><div class='del'>-	if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-	else</div><div class='del'>-		return -ENODEV;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/alpha/kernel/pci_impl.h b/arch/alpha/kernel/pci_impl.h<br/>index 18043af45e2b..a16325ce21c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/pci_impl.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/pci_impl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/pci_impl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/pci_impl.h</a></div><div class='hunk'>@@ -143,9 +143,7 @@ struct pci_iommu_arena</div><div class='ctx'> 	unsigned int align_entry;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_SRM) &amp;&amp; \</div><div class='del'>-    (defined(CONFIG_ALPHA_CIA) || defined(CONFIG_ALPHA_LCA) || \</div><div class='del'>-     defined(CONFIG_ALPHA_AVANTI))</div><div class='add'>+#if defined(CONFIG_ALPHA_SRM) &amp;&amp; defined(CONFIG_ALPHA_CIA)</div><div class='ctx'> # define NEED_SRM_SAVE_RESTORE</div><div class='ctx'> #else</div><div class='ctx'> # undef NEED_SRM_SAVE_RESTORE</div><div class='head'>diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c<br/>index ccdb508c1516..1f0eb4f25c0f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/perf_event.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/perf_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/perf_event.c</a></div><div class='hunk'>@@ -870,7 +870,7 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,</div><div class='ctx'> /*</div><div class='ctx'>  * Init call to initialise performance events at kernel startup.</div><div class='ctx'>  */</div><div class='del'>-int __init init_hw_perf_events(void)</div><div class='add'>+static int __init init_hw_perf_events(void)</div><div class='ctx'> {</div><div class='ctx'> 	pr_info("Performance events: ");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/proto.h b/arch/alpha/kernel/proto.h<br/>index 2c89c1c55712..a8bc3ead776b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/proto.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/proto.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/proto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/proto.h</a></div><div class='hunk'>@@ -15,13 +15,7 @@ struct pt_regs;</div><div class='ctx'> struct task_struct;</div><div class='ctx'> struct pci_dev;</div><div class='ctx'> struct pci_controller;</div><div class='del'>-</div><div class='del'>-/* core_apecs.c */</div><div class='del'>-extern struct pci_ops apecs_pci_ops;</div><div class='del'>-extern void apecs_init_arch(void);</div><div class='del'>-extern void apecs_pci_clr_err(void);</div><div class='del'>-extern void apecs_machine_check(unsigned long vector, unsigned long la_ptr);</div><div class='del'>-extern void apecs_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);</div><div class='add'>+struct pci_bus;</div><div class='ctx'> </div><div class='ctx'> /* core_cia.c */</div><div class='ctx'> extern struct pci_ops cia_pci_ops;</div><div class='hunk'>@@ -38,12 +32,6 @@ extern int irongate_pci_clr_err(void);</div><div class='ctx'> extern void irongate_init_arch(void);</div><div class='ctx'> #define irongate_pci_tbi ((void *)0)</div><div class='ctx'> </div><div class='del'>-/* core_lca.c */</div><div class='del'>-extern struct pci_ops lca_pci_ops;</div><div class='del'>-extern void lca_init_arch(void);</div><div class='del'>-extern void lca_machine_check(unsigned long vector, unsigned long la_ptr);</div><div class='del'>-extern void lca_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);</div><div class='del'>-</div><div class='ctx'> /* core_marvel.c */</div><div class='ctx'> extern struct pci_ops marvel_pci_ops;</div><div class='ctx'> extern void marvel_init_arch(void);</div><div class='hunk'>@@ -114,6 +102,9 @@ extern int boot_cpuid;</div><div class='ctx'> #ifdef CONFIG_VERBOSE_MCHECK</div><div class='ctx'> extern unsigned long alpha_verbose_mcheck;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_BLK_DEV_INITRD</div><div class='add'>+extern void * __init move_initrd(unsigned long);</div><div class='add'>+#endif</div><div class='ctx'> extern struct screen_info vgacon_screen_info;</div><div class='ctx'> </div><div class='ctx'> /* srmcons.c */</div><div class='hunk'>@@ -128,6 +119,7 @@ extern void unregister_srm_console(void);</div><div class='ctx'> /* smp.c */</div><div class='ctx'> extern void setup_smp(void);</div><div class='ctx'> extern void handle_ipi(struct pt_regs *);</div><div class='add'>+extern void __init smp_callin(void);</div><div class='ctx'> </div><div class='ctx'> /* bios32.c */</div><div class='ctx'> /* extern void reset_for_srm(void); */</div><div class='hunk'>@@ -139,13 +131,13 @@ extern void common_init_rtc(void);</div><div class='ctx'> extern unsigned long est_cycle_freq;</div><div class='ctx'> </div><div class='ctx'> /* smc37c93x.c */</div><div class='del'>-extern void SMC93x_Init(void);</div><div class='add'>+extern int __init SMC93x_Init(void);</div><div class='ctx'> </div><div class='ctx'> /* smc37c669.c */</div><div class='del'>-extern void SMC669_Init(int);</div><div class='add'>+extern void __init SMC669_Init(int);</div><div class='ctx'> </div><div class='ctx'> /* es1888.c */</div><div class='del'>-extern void es1888_init(void);</div><div class='add'>+extern void __init es1888_init(void);</div><div class='ctx'> </div><div class='ctx'> /* ../lib/fpreg.c */</div><div class='ctx'> extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);</div><div class='hunk'>@@ -166,19 +158,37 @@ extern void entSys(void);</div><div class='ctx'> extern void entUna(void);</div><div class='ctx'> extern void entDbg(void);</div><div class='ctx'> </div><div class='add'>+/* pci.c */</div><div class='add'>+extern void pcibios_claim_one_bus(struct pci_bus *);</div><div class='add'>+</div><div class='ctx'> /* ptrace.c */</div><div class='ctx'> extern int ptrace_set_bpt (struct task_struct *child);</div><div class='ctx'> extern int ptrace_cancel_bpt (struct task_struct *child);</div><div class='add'>+extern void syscall_trace_leave(void);</div><div class='add'>+extern unsigned long syscall_trace_enter(void);</div><div class='add'>+</div><div class='add'>+/* signal.c */</div><div class='add'>+struct sigcontext;</div><div class='add'>+extern void do_sigreturn(struct sigcontext __user *);</div><div class='add'>+struct rt_sigframe;</div><div class='add'>+extern void do_rt_sigreturn(struct rt_sigframe __user *);</div><div class='add'>+extern void do_work_pending(struct pt_regs *, unsigned long, unsigned long, unsigned long);</div><div class='ctx'> </div><div class='ctx'> /* traps.c */</div><div class='ctx'> extern void dik_show_regs(struct pt_regs *regs, unsigned long *r9_15);</div><div class='ctx'> extern void die_if_kernel(char *, struct pt_regs *, long, unsigned long *);</div><div class='add'>+extern void do_entInt(unsigned long, unsigned long, unsigned long, struct pt_regs *);</div><div class='add'>+extern void do_entArith(unsigned long, unsigned long, struct pt_regs *);</div><div class='add'>+extern void do_entIF(unsigned long, struct pt_regs *);</div><div class='add'>+extern void do_entDbg(struct pt_regs *);</div><div class='add'>+struct allregs;</div><div class='add'>+extern void do_entUna(void *, unsigned long, unsigned long, struct allregs *);</div><div class='add'>+extern void do_entUnaUser(void __user *, unsigned long, unsigned long, struct pt_regs *);</div><div class='ctx'> </div><div class='ctx'> /* sys_titan.c */</div><div class='ctx'> extern void titan_dispatch_irqs(u64);</div><div class='ctx'> </div><div class='ctx'> /* ../mm/init.c */</div><div class='del'>-extern void switch_to_system_map(void);</div><div class='ctx'> extern void srm_paging_stop(void);</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='head'>diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c<br/>index 0738f9396f95..bebdffafaee8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/setup.c</a></div><div class='hunk'>@@ -171,35 +171,22 @@ EXPORT_SYMBOL(__direct_map_size);</div><div class='ctx'> 	asm(".weak "#X)</div><div class='ctx'> </div><div class='ctx'> WEAK(alcor_mv);</div><div class='del'>-WEAK(alphabook1_mv);</div><div class='del'>-WEAK(avanti_mv);</div><div class='del'>-WEAK(cabriolet_mv);</div><div class='ctx'> WEAK(clipper_mv);</div><div class='ctx'> WEAK(dp264_mv);</div><div class='ctx'> WEAK(eb164_mv);</div><div class='del'>-WEAK(eb64p_mv);</div><div class='del'>-WEAK(eb66_mv);</div><div class='del'>-WEAK(eb66p_mv);</div><div class='ctx'> WEAK(eiger_mv);</div><div class='del'>-WEAK(jensen_mv);</div><div class='ctx'> WEAK(lx164_mv);</div><div class='del'>-WEAK(lynx_mv);</div><div class='ctx'> WEAK(marvel_ev7_mv);</div><div class='ctx'> WEAK(miata_mv);</div><div class='del'>-WEAK(mikasa_mv);</div><div class='ctx'> WEAK(mikasa_primo_mv);</div><div class='ctx'> WEAK(monet_mv);</div><div class='ctx'> WEAK(nautilus_mv);</div><div class='del'>-WEAK(noname_mv);</div><div class='del'>-WEAK(noritake_mv);</div><div class='ctx'> WEAK(noritake_primo_mv);</div><div class='del'>-WEAK(p2k_mv);</div><div class='ctx'> WEAK(pc164_mv);</div><div class='ctx'> WEAK(privateer_mv);</div><div class='ctx'> WEAK(rawhide_mv);</div><div class='ctx'> WEAK(ruffian_mv);</div><div class='ctx'> WEAK(rx164_mv);</div><div class='del'>-WEAK(sable_mv);</div><div class='ctx'> WEAK(sable_gamma_mv);</div><div class='ctx'> WEAK(shark_mv);</div><div class='ctx'> WEAK(sx164_mv);</div><div class='hunk'>@@ -207,7 +194,6 @@ WEAK(takara_mv);</div><div class='ctx'> WEAK(titan_mv);</div><div class='ctx'> WEAK(webbrick_mv);</div><div class='ctx'> WEAK(wildfire_mv);</div><div class='del'>-WEAK(xl_mv);</div><div class='ctx'> WEAK(xlt_mv);</div><div class='ctx'> </div><div class='ctx'> #undef WEAK</div><div class='hunk'>@@ -224,7 +210,7 @@ static void __init</div><div class='ctx'> reserve_std_resources(void)</div><div class='ctx'> {</div><div class='ctx'> 	static struct resource standard_io_resources[] = {</div><div class='del'>-		{ .name = "rtc", .start = -1, .end = -1 },</div><div class='add'>+		{ .name = "rtc", .start = 0x70, .end =  0x7f},</div><div class='ctx'>         	{ .name = "dma1", .start = 0x00, .end = 0x1f },</div><div class='ctx'>         	{ .name = "pic1", .start = 0x20, .end = 0x3f },</div><div class='ctx'>         	{ .name = "timer", .start = 0x40, .end = 0x5f },</div><div class='hunk'>@@ -246,10 +232,6 @@ reserve_std_resources(void)</div><div class='ctx'> 			}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Fix up for the Jensen's queer RTC placement.  */</div><div class='del'>-	standard_io_resources[0].start = RTC_PORT(0);</div><div class='del'>-	standard_io_resources[0].end = RTC_PORT(0) + 0x0f;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(standard_io_resources); ++i)</div><div class='ctx'> 		request_resource(io, standard_io_resources+i);</div><div class='ctx'> }</div><div class='hunk'>@@ -486,14 +468,7 @@ setup_arch(char **cmdline_p)</div><div class='ctx'> 	/* </div><div class='ctx'> 	 * Locate the command line.</div><div class='ctx'> 	 */</div><div class='del'>-	/* Hack for Jensen... since we're restricted to 8 or 16 chars for</div><div class='del'>-	   boot flags depending on the boot mode, we need some shorthand.</div><div class='del'>-	   This should do for installation.  */</div><div class='del'>-	if (strcmp(COMMAND_LINE, "INSTALL") == 0) {</div><div class='del'>-		strscpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof(command_line));</div><div class='del'>-	} else {</div><div class='del'>-		strscpy(command_line, COMMAND_LINE, sizeof(command_line));</div><div class='del'>-	}</div><div class='add'>+	strscpy(command_line, COMMAND_LINE, sizeof(command_line));</div><div class='ctx'> 	strcpy(boot_command_line, command_line);</div><div class='ctx'> 	*cmdline_p = command_line;</div><div class='ctx'> </div><div class='hunk'>@@ -706,12 +681,6 @@ static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4};</div><div class='ctx'> static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"};</div><div class='ctx'> static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2};</div><div class='ctx'> </div><div class='del'>-static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"};</div><div class='del'>-static int eb64p_indices[] = {0,0,1,2};</div><div class='del'>-</div><div class='del'>-static char eb66_names[][8] = {"EB66", "EB66+"};</div><div class='del'>-static int eb66_indices[] = {0,0,1};</div><div class='del'>-</div><div class='ctx'> static char marvel_names[][16] = {</div><div class='ctx'> 	"Marvel/EV7"</div><div class='ctx'> };</div><div class='hunk'>@@ -745,26 +714,26 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)</div><div class='ctx'> 		NULL,		/* Ruby */</div><div class='ctx'> 		NULL,		/* Flamingo */</div><div class='ctx'> 		NULL,		/* Mannequin */</div><div class='del'>-		&amp;jensen_mv,</div><div class='add'>+		NULL,		/* Jensens */</div><div class='ctx'> 		NULL, 		/* Pelican */</div><div class='ctx'> 		NULL,		/* Morgan */</div><div class='ctx'> 		NULL,		/* Sable -- see below.  */</div><div class='ctx'> 		NULL,		/* Medulla */</div><div class='del'>-		&amp;noname_mv,</div><div class='add'>+		NULL,		/* Noname */</div><div class='ctx'> 		NULL,		/* Turbolaser */</div><div class='del'>-		&amp;avanti_mv,</div><div class='add'>+		NULL,		/* Avanti */</div><div class='ctx'> 		NULL,		/* Mustang */</div><div class='ctx'> 		NULL,		/* Alcor, Bret, Maverick. HWRPB inaccurate? */</div><div class='ctx'> 		NULL,		/* Tradewind */</div><div class='ctx'> 		NULL,		/* Mikasa -- see below.  */</div><div class='ctx'> 		NULL,		/* EB64 */</div><div class='del'>-		NULL,		/* EB66 -- see variation.  */</div><div class='del'>-		NULL,		/* EB64+ -- see variation.  */</div><div class='del'>-		&amp;alphabook1_mv,</div><div class='add'>+		NULL,		/* EB66 */</div><div class='add'>+		NULL,		/* EB64+ */</div><div class='add'>+		NULL,		/* Alphabook1 */</div><div class='ctx'> 		&amp;rawhide_mv,</div><div class='ctx'> 		NULL,		/* K2 */</div><div class='del'>-		&amp;lynx_mv,	/* Lynx */</div><div class='del'>-		&amp;xl_mv,</div><div class='add'>+		NULL,		/* Lynx */</div><div class='add'>+		NULL,		/* XL */</div><div class='ctx'> 		NULL,		/* EB164 -- see variation.  */</div><div class='ctx'> 		NULL,		/* Noritake -- see below.  */</div><div class='ctx'> 		NULL,		/* Cortex */</div><div class='hunk'>@@ -803,19 +772,6 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)</div><div class='ctx'> 		&amp;eb164_mv, &amp;pc164_mv, &amp;lx164_mv, &amp;sx164_mv, &amp;rx164_mv</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	static struct alpha_machine_vector *eb64p_vecs[] __initdata =</div><div class='del'>-	{</div><div class='del'>-		&amp;eb64p_mv,</div><div class='del'>-		&amp;cabriolet_mv,</div><div class='del'>-		&amp;cabriolet_mv		/* AlphaPCI64 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	static struct alpha_machine_vector *eb66_vecs[] __initdata =</div><div class='del'>-	{</div><div class='del'>-		&amp;eb66_mv,</div><div class='del'>-		&amp;eb66p_mv</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	static struct alpha_machine_vector *marvel_vecs[] __initdata =</div><div class='ctx'> 	{</div><div class='ctx'> 		&amp;marvel_ev7_mv,</div><div class='hunk'>@@ -883,14 +839,6 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)</div><div class='ctx'> 			if (vec == &amp;eb164_mv &amp;&amp; cpu == EV56_CPU)</div><div class='ctx'> 				vec = &amp;pc164_mv;</div><div class='ctx'> 			break;</div><div class='del'>-		case ST_DEC_EB64P:</div><div class='del'>-			if (member &lt; ARRAY_SIZE(eb64p_indices))</div><div class='del'>-				vec = eb64p_vecs[eb64p_indices[member]];</div><div class='del'>-			break;</div><div class='del'>-		case ST_DEC_EB66:</div><div class='del'>-			if (member &lt; ARRAY_SIZE(eb66_indices))</div><div class='del'>-				vec = eb66_vecs[eb66_indices[member]];</div><div class='del'>-			break;</div><div class='ctx'> 		case ST_DEC_MARVEL:</div><div class='ctx'> 			if (member &lt; ARRAY_SIZE(marvel_indices))</div><div class='ctx'> 				vec = marvel_vecs[marvel_indices[member]];</div><div class='hunk'>@@ -905,22 +853,13 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)</div><div class='ctx'> 				vec = tsunami_vecs[tsunami_indices[member]];</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ST_DEC_1000:</div><div class='del'>-			if (cpu == EV5_CPU || cpu == EV56_CPU)</div><div class='del'>-				vec = &amp;mikasa_primo_mv;</div><div class='del'>-			else</div><div class='del'>-				vec = &amp;mikasa_mv;</div><div class='add'>+			vec = &amp;mikasa_primo_mv;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ST_DEC_NORITAKE:</div><div class='del'>-			if (cpu == EV5_CPU || cpu == EV56_CPU)</div><div class='del'>-				vec = &amp;noritake_primo_mv;</div><div class='del'>-			else</div><div class='del'>-				vec = &amp;noritake_mv;</div><div class='add'>+			vec = &amp;noritake_primo_mv;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ST_DEC_2100_A500:</div><div class='del'>-			if (cpu == EV5_CPU || cpu == EV56_CPU)</div><div class='del'>-				vec = &amp;sable_gamma_mv;</div><div class='del'>-			else</div><div class='del'>-				vec = &amp;sable_mv;</div><div class='add'>+			vec = &amp;sable_gamma_mv;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -933,41 +872,27 @@ get_sysvec_byname(const char *name)</div><div class='ctx'> 	static struct alpha_machine_vector *all_vecs[] __initdata =</div><div class='ctx'> 	{</div><div class='ctx'> 		&amp;alcor_mv,</div><div class='del'>-		&amp;alphabook1_mv,</div><div class='del'>-		&amp;avanti_mv,</div><div class='del'>-		&amp;cabriolet_mv,</div><div class='ctx'> 		&amp;clipper_mv,</div><div class='ctx'> 		&amp;dp264_mv,</div><div class='ctx'> 		&amp;eb164_mv,</div><div class='del'>-		&amp;eb64p_mv,</div><div class='del'>-		&amp;eb66_mv,</div><div class='del'>-		&amp;eb66p_mv,</div><div class='ctx'> 		&amp;eiger_mv,</div><div class='del'>-		&amp;jensen_mv,</div><div class='ctx'> 		&amp;lx164_mv,</div><div class='del'>-		&amp;lynx_mv,</div><div class='ctx'> 		&amp;miata_mv,</div><div class='del'>-		&amp;mikasa_mv,</div><div class='ctx'> 		&amp;mikasa_primo_mv,</div><div class='ctx'> 		&amp;monet_mv,</div><div class='ctx'> 		&amp;nautilus_mv,</div><div class='del'>-		&amp;noname_mv,</div><div class='del'>-		&amp;noritake_mv,</div><div class='ctx'> 		&amp;noritake_primo_mv,</div><div class='del'>-		&amp;p2k_mv,</div><div class='ctx'> 		&amp;pc164_mv,</div><div class='ctx'> 		&amp;privateer_mv,</div><div class='ctx'> 		&amp;rawhide_mv,</div><div class='ctx'> 		&amp;ruffian_mv,</div><div class='ctx'> 		&amp;rx164_mv,</div><div class='del'>-		&amp;sable_mv,</div><div class='ctx'> 		&amp;sable_gamma_mv,</div><div class='ctx'> 		&amp;shark_mv,</div><div class='ctx'> 		&amp;sx164_mv,</div><div class='ctx'> 		&amp;takara_mv,</div><div class='ctx'> 		&amp;webbrick_mv,</div><div class='ctx'> 		&amp;wildfire_mv,</div><div class='del'>-		&amp;xl_mv,</div><div class='ctx'> 		&amp;xlt_mv</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1029,14 +954,6 @@ get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,</div><div class='ctx'> 		if (member &lt; ARRAY_SIZE(alcor_indices))</div><div class='ctx'> 			*variation_name = alcor_names[alcor_indices[member]];</div><div class='ctx'> 		break;</div><div class='del'>-	case ST_DEC_EB64P:</div><div class='del'>-		if (member &lt; ARRAY_SIZE(eb64p_indices))</div><div class='del'>-			*variation_name = eb64p_names[eb64p_indices[member]];</div><div class='del'>-		break;</div><div class='del'>-	case ST_DEC_EB66:</div><div class='del'>-		if (member &lt; ARRAY_SIZE(eb66_indices))</div><div class='del'>-			*variation_name = eb66_names[eb66_indices[member]];</div><div class='del'>-		break;</div><div class='ctx'> 	case ST_DEC_MARVEL:</div><div class='ctx'> 		if (member &lt; ARRAY_SIZE(marvel_indices))</div><div class='ctx'> 			*variation_name = marvel_names[marvel_indices[member]];</div><div class='head'>diff --git a/arch/alpha/kernel/smc37c669.c b/arch/alpha/kernel/smc37c669.c<br/>index bbbd34586de0..a5a6ed97a6ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/smc37c669.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/smc37c669.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/smc37c669.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/smc37c669.c</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "proto.h"</div><div class='add'>+</div><div class='ctx'> #if 0</div><div class='ctx'> # define DBG_DEVS(args)         printk args</div><div class='ctx'> #else</div><div class='hunk'>@@ -2430,13 +2432,15 @@ int __init smcc669_write( struct FILE *fp, int size, int number, unsigned char *</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+#if SMC_DEBUG</div><div class='add'>+static void __init</div><div class='ctx'> SMC37c669_dump_registers(void)</div><div class='ctx'> {</div><div class='ctx'>   int i;</div><div class='ctx'>   for (i = 0; i &lt;= 0x29; i++)</div><div class='ctx'>     printk("-- CR%02x : %02x\n", i, SMC37c669_read_config(i));</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> /*+</div><div class='ctx'>  * ============================================================================</div><div class='ctx'>  * = SMC_init - SMC37c669 Super I/O controller initialization                 =</div><div class='head'>diff --git a/arch/alpha/kernel/smc37c93x.c b/arch/alpha/kernel/smc37c93x.c<br/>index 71cd7aca38ce..8028273f0d16 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/smc37c93x.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/smc37c93x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/smc37c93x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/smc37c93x.c</a></div><div class='hunk'>@@ -12,6 +12,8 @@</div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "proto.h"</div><div class='add'>+</div><div class='ctx'> #define SMC_DEBUG 0</div><div class='ctx'> </div><div class='ctx'> #if SMC_DEBUG</div><div class='head'>diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c<br/>index 8e9dd63b220c..ed06367ece57 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/smp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/smp.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "proto.h"</div><div class='ctx'> #include "irq_impl.h"</div><div class='head'>diff --git a/arch/alpha/kernel/srmcons.c b/arch/alpha/kernel/srmcons.c<br/>index feaf89f6936b..3e61073f4b30 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/srmcons.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/srmcons.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/srmcons.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/srmcons.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> #include &lt;asm/console.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "proto.h"</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> static DEFINE_SPINLOCK(srmcons_callback_lock);</div><div class='ctx'> static int srm_is_registered_console = 0;</div><div class='head'>diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c<br/>index 47459b73cdb7..54e75d4fdbe3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_cabriolet.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_cabriolet.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_cabriolet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/sys_cabriolet.c</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  *	Copyright (C) 1996 Jay A Estabrook</div><div class='ctx'>  *	Copyright (C) 1998, 1999, 2000 Richard Henderson</div><div class='ctx'>  *</div><div class='del'>- * Code supporting the Cabriolet (AlphaPC64), EB66+, and EB164,</div><div class='del'>- * PC164 and LX164.</div><div class='add'>+ * Code supporting the PC164 and LX164.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -23,9 +22,7 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_apecs.h&gt;</div><div class='ctx'> #include &lt;asm/core_cia.h&gt;</div><div class='del'>-#include &lt;asm/core_lca.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "proto.h"</div><div class='hunk'>@@ -233,13 +230,6 @@ cabriolet_enable_ide(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __init</div><div class='del'>-cabriolet_init_pci(void)</div><div class='del'>-{</div><div class='del'>-	common_init_pci();</div><div class='del'>-	cabriolet_enable_ide();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __init</div><div class='ctx'> cia_cab_init_pci(void)</div><div class='ctx'> {</div><div class='ctx'> 	cia_init_pci();</div><div class='hunk'>@@ -317,81 +307,6 @@ alphapc164_init_pci(void)</div><div class='ctx'>  * The System Vector</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_CABRIOLET)</div><div class='del'>-struct alpha_machine_vector cabriolet_mv __initmv = {</div><div class='del'>-	.vector_name		= "Cabriolet",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_APECS_IO,</div><div class='del'>-	.machine_check		= apecs_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 35,</div><div class='del'>-	.device_interrupt	= cabriolet_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= apecs_init_arch,</div><div class='del'>-	.init_irq		= cabriolet_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= cabriolet_init_pci,</div><div class='del'>-	.pci_map_irq		= cabriolet_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-};</div><div class='del'>-#ifndef CONFIG_ALPHA_EB64P</div><div class='del'>-ALIAS_MV(cabriolet)</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB164)</div><div class='del'>-struct alpha_machine_vector eb164_mv __initmv = {</div><div class='del'>-	.vector_name		= "EB164",</div><div class='del'>-	DO_EV5_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_CIA_IO,</div><div class='del'>-	.machine_check		= cia_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= CIA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 35,</div><div class='del'>-	.device_interrupt	= cabriolet_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= cia_init_arch,</div><div class='del'>-	.init_irq		= cabriolet_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= cia_cab_init_pci,</div><div class='del'>-	.kill_arch		= cia_kill_arch,</div><div class='del'>-	.pci_map_irq		= cabriolet_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(eb164)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB66P)</div><div class='del'>-struct alpha_machine_vector eb66p_mv __initmv = {</div><div class='del'>-	.vector_name		= "EB66+",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_LCA_IO,</div><div class='del'>-	.machine_check		= lca_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 35,</div><div class='del'>-	.device_interrupt	= cabriolet_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= lca_init_arch,</div><div class='del'>-	.init_irq		= cabriolet_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= cabriolet_init_pci,</div><div class='del'>-	.pci_map_irq		= eb66p_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(eb66p)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_LX164)</div><div class='ctx'> struct alpha_machine_vector lx164_mv __initmv = {</div><div class='ctx'> 	.vector_name		= "LX164",</div><div class='head'>diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c<br/>deleted file mode 100644<br/>index 3c43fd347526..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_eb64p.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_eb64p.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,238 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	linux/arch/alpha/kernel/sys_eb64p.c</div><div class='del'>- *</div><div class='del'>- *	Copyright (C) 1995 David A Rusling</div><div class='del'>- *	Copyright (C) 1996 Jay A Estabrook</div><div class='del'>- *	Copyright (C) 1998, 1999 Richard Henderson</div><div class='del'>- *</div><div class='del'>- * Code supporting the EB64+ and EB66.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_apecs.h&gt;</div><div class='del'>-#include &lt;asm/core_lca.h&gt;</div><div class='del'>-#include &lt;asm/hwrpb.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proto.h"</div><div class='del'>-#include "irq_impl.h"</div><div class='del'>-#include "pci_impl.h"</div><div class='del'>-#include "machvec_impl.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Note mask bit is true for DISABLED irqs.  */</div><div class='del'>-static unsigned int cached_irq_mask = -1;</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-eb64p_update_irq_hw(unsigned int irq, unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	outb(mask &gt;&gt; (irq &gt;= 24 ? 24 : 16), (irq &gt;= 24 ? 0x27 : 0x26));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-eb64p_enable_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	eb64p_update_irq_hw(d-&gt;irq, cached_irq_mask &amp;= ~(1 &lt;&lt; d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-eb64p_disable_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	eb64p_update_irq_hw(d-&gt;irq, cached_irq_mask |= 1 &lt;&lt; d-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip eb64p_irq_type = {</div><div class='del'>-	.name		= "EB64P",</div><div class='del'>-	.irq_unmask	= eb64p_enable_irq,</div><div class='del'>-	.irq_mask	= eb64p_disable_irq,</div><div class='del'>-	.irq_mask_ack	= eb64p_disable_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void </div><div class='del'>-eb64p_device_interrupt(unsigned long vector)</div><div class='del'>-{</div><div class='del'>-	unsigned long pld;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* Read the interrupt summary registers */</div><div class='del'>-	pld = inb(0x26) | (inb(0x27) &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Now, for every possible bit set, work through</div><div class='del'>-	 * them and call the appropriate interrupt handler.</div><div class='del'>-	 */</div><div class='del'>-	while (pld) {</div><div class='del'>-		i = ffz(~pld);</div><div class='del'>-		pld &amp;= pld - 1;	/* clear least bit set */</div><div class='del'>-</div><div class='del'>-		if (i == 5) {</div><div class='del'>-			isa_device_interrupt(vector);</div><div class='del'>-		} else {</div><div class='del'>-			handle_irq(16 + i);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-eb64p_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	long i;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_CABRIOLET)</div><div class='del'>-	/*</div><div class='del'>-	 * CABRIO SRM may not set variation correctly, so here we test</div><div class='del'>-	 * the high word of the interrupt summary register for the RAZ</div><div class='del'>-	 * bits, and hope that a true EB64+ would read all ones...</div><div class='del'>-	 */</div><div class='del'>-	if (inw(0x806) != 0xffff) {</div><div class='del'>-		extern struct alpha_machine_vector cabriolet_mv;</div><div class='del'>-</div><div class='del'>-		printk("Detected Cabriolet: correcting HWRPB.\n");</div><div class='del'>-</div><div class='del'>-		hwrpb-&gt;sys_variation |= 2L &lt;&lt; 10;</div><div class='del'>-		hwrpb_update_checksum(hwrpb);</div><div class='del'>-</div><div class='del'>-		alpha_mv = cabriolet_mv;</div><div class='del'>-		alpha_mv.init_irq();</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-#endif /* GENERIC */</div><div class='del'>-</div><div class='del'>-	outb(0xff, 0x26);</div><div class='del'>-	outb(0xff, 0x27);</div><div class='del'>-</div><div class='del'>-	init_i8259a_irqs();</div><div class='del'>-</div><div class='del'>-	for (i = 16; i &lt; 32; ++i) {</div><div class='del'>-		irq_set_chip_and_handler(i, &amp;eb64p_irq_type, handle_level_irq);</div><div class='del'>-		irq_set_status_flags(i, IRQ_LEVEL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	common_init_isa_dma();</div><div class='del'>-	if (request_irq(16 + 5, no_action, 0, "isa-cascade", NULL))</div><div class='del'>-		pr_err("Failed to register isa-cascade interrupt\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCI Fixup configuration.</div><div class='del'>- *</div><div class='del'>- * There are two 8 bit external summary registers as follows:</div><div class='del'>- *</div><div class='del'>- * Summary @ 0x26:</div><div class='del'>- * Bit      Meaning</div><div class='del'>- * 0        Interrupt Line A from slot 0</div><div class='del'>- * 1        Interrupt Line A from slot 1</div><div class='del'>- * 2        Interrupt Line B from slot 0</div><div class='del'>- * 3        Interrupt Line B from slot 1</div><div class='del'>- * 4        Interrupt Line C from slot 0</div><div class='del'>- * 5        Interrupt line from the two ISA PICs</div><div class='del'>- * 6        Tulip</div><div class='del'>- * 7        NCR SCSI</div><div class='del'>- *</div><div class='del'>- * Summary @ 0x27</div><div class='del'>- * Bit      Meaning</div><div class='del'>- * 0        Interrupt Line C from slot 1</div><div class='del'>- * 1        Interrupt Line D from slot 0</div><div class='del'>- * 2        Interrupt Line D from slot 1</div><div class='del'>- * 3        RAZ</div><div class='del'>- * 4        RAZ</div><div class='del'>- * 5        RAZ</div><div class='del'>- * 6        RAZ</div><div class='del'>- * 7        RAZ</div><div class='del'>- *</div><div class='del'>- * The device to slot mapping looks like:</div><div class='del'>- *</div><div class='del'>- * Slot     Device</div><div class='del'>- *  5       NCR SCSI controller</div><div class='del'>- *  6       PCI on board slot 0</div><div class='del'>- *  7       PCI on board slot 1</div><div class='del'>- *  8       Intel SIO PCI-ISA bridge chip</div><div class='del'>- *  9       Tulip - DECchip 21040 Ethernet controller</div><div class='del'>- *   </div><div class='del'>- *</div><div class='del'>- * This two layered interrupt approach means that we allocate IRQ 16 and </div><div class='del'>- * above for PCI interrupts.  The IRQ relates to which bit the interrupt</div><div class='del'>- * comes in on.  This makes interrupt processing much easier.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-eb64p_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='del'>-{</div><div class='del'>-	static char irq_tab[5][5] = {</div><div class='del'>-		/*INT  INTA  INTB  INTC   INTD */</div><div class='del'>-		{16+7, 16+7, 16+7, 16+7,  16+7},  /* IdSel 5,  slot ?, ?? */</div><div class='del'>-		{16+0, 16+0, 16+2, 16+4,  16+9},  /* IdSel 6,  slot ?, ?? */</div><div class='del'>-		{16+1, 16+1, 16+3, 16+8, 16+10},  /* IdSel 7,  slot ?, ?? */</div><div class='del'>-		{  -1,   -1,   -1,   -1,    -1},  /* IdSel 8,  SIO */</div><div class='del'>-		{16+6, 16+6, 16+6, 16+6,  16+6},  /* IdSel 9,  TULIP */</div><div class='del'>-	};</div><div class='del'>-	const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;</div><div class='del'>-	return COMMON_TABLE_LOOKUP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The System Vector</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB64P)</div><div class='del'>-struct alpha_machine_vector eb64p_mv __initmv = {</div><div class='del'>-	.vector_name		= "EB64+",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_APECS_IO,</div><div class='del'>-	.machine_check		= apecs_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 32,</div><div class='del'>-	.device_interrupt	= eb64p_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= apecs_init_arch,</div><div class='del'>-	.init_irq		= eb64p_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= common_init_pci,</div><div class='del'>-	.kill_arch		= NULL,</div><div class='del'>-	.pci_map_irq		= eb64p_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(eb64p)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB66)</div><div class='del'>-struct alpha_machine_vector eb66_mv __initmv = {</div><div class='del'>-	.vector_name		= "EB66",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_LCA_IO,</div><div class='del'>-	.machine_check		= lca_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 32,</div><div class='del'>-	.device_interrupt	= eb64p_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= lca_init_arch,</div><div class='del'>-	.init_irq		= eb64p_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= common_init_pci,</div><div class='del'>-	.pci_map_irq		= eb64p_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(eb66)</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c<br/>deleted file mode 100644<br/>index 5c9c88428124..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_jensen.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_jensen.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,237 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	linux/arch/alpha/kernel/sys_jensen.c</div><div class='del'>- *</div><div class='del'>- *	Copyright (C) 1995 Linus Torvalds</div><div class='del'>- *	Copyright (C) 1998, 1999 Richard Henderson</div><div class='del'>- *</div><div class='del'>- * Code supporting the Jensen.</div><div class='del'>- */</div><div class='del'>-#define __EXTERN_INLINE</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/jensen.h&gt;</div><div class='del'>-#undef  __EXTERN_INLINE</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proto.h"</div><div class='del'>-#include "irq_impl.h"</div><div class='del'>-#include "pci_impl.h"</div><div class='del'>-#include "machvec_impl.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Jensen is special: the vector is 0x8X0 for EISA interrupt X, and</div><div class='del'>- * 0x9X0 for the local motherboard interrupts.</div><div class='del'>- *</div><div class='del'>- * Note especially that those local interrupts CANNOT be masked,</div><div class='del'>- * which causes much of the pain below...</div><div class='del'>- *</div><div class='del'>- *	0x660 - NMI</div><div class='del'>- *</div><div class='del'>- *	0x800 - IRQ0  interval timer (not used, as we use the RTC timer)</div><div class='del'>- *	0x810 - IRQ1  line printer (duh..)</div><div class='del'>- *	0x860 - IRQ6  floppy disk</div><div class='del'>- *</div><div class='del'>- *	0x900 - COM1</div><div class='del'>- *	0x920 - COM2</div><div class='del'>- *	0x980 - keyboard</div><div class='del'>- *	0x990 - mouse</div><div class='del'>- *</div><div class='del'>- * PCI-based systems are more sane: they don't have the local</div><div class='del'>- * interrupts at all, and have only normal PCI interrupts from</div><div class='del'>- * devices.  Happily it's easy enough to do a sane mapping from the</div><div class='del'>- * Jensen.</div><div class='del'>- * </div><div class='del'>- * Note that this means that we may have to do a hardware</div><div class='del'>- * "local_op" to a different interrupt than we report to the rest of the</div><div class='del'>- * world.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-jensen_local_enable(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	/* the parport is really hw IRQ 1, silly Jensen.  */</div><div class='del'>-	if (d-&gt;irq == 7)</div><div class='del'>-		i8259a_enable_irq(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-jensen_local_disable(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	/* the parport is really hw IRQ 1, silly Jensen.  */</div><div class='del'>-	if (d-&gt;irq == 7)</div><div class='del'>-		i8259a_disable_irq(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-jensen_local_mask_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	/* the parport is really hw IRQ 1, silly Jensen.  */</div><div class='del'>-	if (d-&gt;irq == 7)</div><div class='del'>-		i8259a_mask_and_ack_irq(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip jensen_local_irq_type = {</div><div class='del'>-	.name		= "LOCAL",</div><div class='del'>-	.irq_unmask	= jensen_local_enable,</div><div class='del'>-	.irq_mask	= jensen_local_disable,</div><div class='del'>-	.irq_mask_ack	= jensen_local_mask_ack,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void </div><div class='del'>-jensen_device_interrupt(unsigned long vector)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	switch (vector) {</div><div class='del'>-	case 0x660:</div><div class='del'>-		printk("Whee.. NMI received. Probable hardware error\n");</div><div class='del'>-		printk("61=%02x, 461=%02x\n", inb(0x61), inb(0x461));</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* local device interrupts: */</div><div class='del'>-	case 0x900: irq = 4; break;		/* com1 -&gt; irq 4 */</div><div class='del'>-	case 0x920: irq = 3; break;		/* com2 -&gt; irq 3 */</div><div class='del'>-	case 0x980: irq = 1; break;		/* kbd -&gt; irq 1 */</div><div class='del'>-	case 0x990: irq = 9; break;		/* mouse -&gt; irq 9 */</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		if (vector &gt; 0x900) {</div><div class='del'>-			printk("Unknown local interrupt %lx\n", vector);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		irq = (vector - 0x800) &gt;&gt; 4;</div><div class='del'>-		if (irq == 1)</div><div class='del'>-			irq = 7;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If there is no handler yet... */</div><div class='del'>-	if (!irq_has_action(irq)) {</div><div class='del'>-	    /* If it is a local interrupt that cannot be masked... */</div><div class='del'>-	    if (vector &gt;= 0x900)</div><div class='del'>-	    {</div><div class='del'>-	        /* Clear keyboard/mouse state */</div><div class='del'>-	    	inb(0x64);</div><div class='del'>-		inb(0x60);</div><div class='del'>-		/* Reset serial ports */</div><div class='del'>-		inb(0x3fa);</div><div class='del'>-		inb(0x2fa);</div><div class='del'>-		outb(0x0c, 0x3fc);</div><div class='del'>-		outb(0x0c, 0x2fc);</div><div class='del'>-		/* Clear NMI */</div><div class='del'>-		outb(0,0x61);</div><div class='del'>-		outb(0,0x461);</div><div class='del'>-	    }</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-        /* A useful bit of code to find out if an interrupt is going wild.  */</div><div class='del'>-        {</div><div class='del'>-          static unsigned int last_msg = 0, last_cc = 0;</div><div class='del'>-          static int last_irq = -1, count = 0;</div><div class='del'>-          unsigned int cc;</div><div class='del'>-</div><div class='del'>-          __asm __volatile("rpcc %0" : "=r"(cc));</div><div class='del'>-          ++count;</div><div class='del'>-#define JENSEN_CYCLES_PER_SEC	(150000000)</div><div class='del'>-          if (cc - last_msg &gt; ((JENSEN_CYCLES_PER_SEC) * 3) ||</div><div class='del'>-	      irq != last_irq) {</div><div class='del'>-                printk(KERN_CRIT " irq %d count %d cc %u @ %lx\n",</div><div class='del'>-                       irq, count, cc-last_cc, get_irq_regs()-&gt;pc);</div><div class='del'>-                count = 0;</div><div class='del'>-                last_msg = cc;</div><div class='del'>-                last_irq = irq;</div><div class='del'>-          }</div><div class='del'>-          last_cc = cc;</div><div class='del'>-        }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	handle_irq(irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-jensen_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	init_i8259a_irqs();</div><div class='del'>-</div><div class='del'>-	irq_set_chip_and_handler(1, &amp;jensen_local_irq_type, handle_level_irq);</div><div class='del'>-	irq_set_chip_and_handler(4, &amp;jensen_local_irq_type, handle_level_irq);</div><div class='del'>-	irq_set_chip_and_handler(3, &amp;jensen_local_irq_type, handle_level_irq);</div><div class='del'>-	irq_set_chip_and_handler(7, &amp;jensen_local_irq_type, handle_level_irq);</div><div class='del'>-	irq_set_chip_and_handler(9, &amp;jensen_local_irq_type, handle_level_irq);</div><div class='del'>-</div><div class='del'>-	common_init_isa_dma();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-jensen_init_arch(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-	static struct pci_dev fake_isa_bridge = { .dma_mask = 0xffffffffUL, };</div><div class='del'>-</div><div class='del'>-	isa_bridge = &amp;fake_isa_bridge;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Create a hose so that we can report i/o base addresses to</div><div class='del'>-	   userland.  */</div><div class='del'>-</div><div class='del'>-	pci_isa_hose = hose = alloc_pci_controller();</div><div class='del'>-	hose-&gt;io_space = &amp;ioport_resource;</div><div class='del'>-	hose-&gt;mem_space = &amp;iomem_resource;</div><div class='del'>-	hose-&gt;index = 0;</div><div class='del'>-</div><div class='del'>-	hose-&gt;sparse_mem_base = EISA_MEM - IDENT_ADDR;</div><div class='del'>-	hose-&gt;dense_mem_base = 0;</div><div class='del'>-	hose-&gt;sparse_io_base = EISA_IO - IDENT_ADDR;</div><div class='del'>-	hose-&gt;dense_io_base = 0;</div><div class='del'>-</div><div class='del'>-	hose-&gt;sg_isa = hose-&gt;sg_pci = NULL;</div><div class='del'>-	__direct_map_base = 0;</div><div class='del'>-	__direct_map_size = 0xffffffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-jensen_machine_check(unsigned long vector, unsigned long la)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_CRIT "Machine check\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The System Vector</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct alpha_machine_vector jensen_mv __initmv = {</div><div class='del'>-	.vector_name		= "Jensen",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	IO_LITE(JENSEN,jensen),</div><div class='del'>-	.machine_check		= jensen_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.rtc_port		= 0x170,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 16,</div><div class='del'>-	.device_interrupt	= jensen_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= jensen_init_arch,</div><div class='del'>-	.init_irq		= jensen_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= NULL,</div><div class='del'>-	.kill_arch		= NULL,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(jensen)</div><div class='head'>diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c<br/>index 7690dfd57cb6..557802398231 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_mikasa.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_mikasa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_mikasa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/sys_mikasa.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_apecs.h&gt;</div><div class='ctx'> #include &lt;asm/core_cia.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -164,64 +163,9 @@ mikasa_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)</div><div class='del'>-static void</div><div class='del'>-mikasa_apecs_machine_check(unsigned long vector, unsigned long la_ptr)</div><div class='del'>-{</div><div class='del'>-#define MCHK_NO_DEVSEL 0x205U</div><div class='del'>-#define MCHK_NO_TABT 0x204U</div><div class='del'>-</div><div class='del'>-	struct el_common *mchk_header;</div><div class='del'>-	unsigned int code;</div><div class='del'>-</div><div class='del'>-	mchk_header = (struct el_common *)la_ptr;</div><div class='del'>-</div><div class='del'>-	/* Clear the error before any reporting.  */</div><div class='del'>-	mb();</div><div class='del'>-	mb(); /* magic */</div><div class='del'>-	draina();</div><div class='del'>-	apecs_pci_clr_err();</div><div class='del'>-	wrmces(0x7);</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	code = mchk_header-&gt;code;</div><div class='del'>-	process_mcheck_info(vector, la_ptr, "MIKASA APECS",</div><div class='del'>-			    (mcheck_expected(0)</div><div class='del'>-			     &amp;&amp; (code == MCHK_NO_DEVSEL</div><div class='del'>-			         || code == MCHK_NO_TABT)));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The System Vector</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)</div><div class='del'>-struct alpha_machine_vector mikasa_mv __initmv = {</div><div class='del'>-	.vector_name		= "Mikasa",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_APECS_IO,</div><div class='del'>-	.machine_check		= mikasa_apecs_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 32,</div><div class='del'>-	.device_interrupt	= mikasa_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= apecs_init_arch,</div><div class='del'>-	.init_irq		= mikasa_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= common_init_pci,</div><div class='del'>-	.pci_map_irq		= mikasa_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(mikasa)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PRIMO)</div><div class='ctx'> struct alpha_machine_vector mikasa_primo_mv __initmv = {</div><div class='ctx'> 	.vector_name		= "Mikasa-Primo",</div><div class='ctx'> 	DO_EV5_MMU,</div><div class='hunk'>@@ -244,4 +188,3 @@ struct alpha_machine_vector mikasa_primo_mv __initmv = {</div><div class='ctx'> 	.pci_swizzle		= common_swizzle,</div><div class='ctx'> };</div><div class='ctx'> ALIAS_MV(mikasa_primo)</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c<br/>index 96fd6ff3fe81..13b79960b4b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_nautilus.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_nautilus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_nautilus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/sys_nautilus.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@ nautilus_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='add'>+static void</div><div class='ctx'> nautilus_kill_arch(int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_bus *bus = pci_isa_hose-&gt;bus;</div><div class='hunk'>@@ -127,7 +127,7 @@ naut_sys_machine_check(unsigned long vector, unsigned long la_ptr,</div><div class='ctx'> /* Machine checks can come from two sources - those on the CPU and those</div><div class='ctx'>    in the system.  They are analysed separately but all starts here.  */</div><div class='ctx'> </div><div class='del'>-void</div><div class='add'>+static void</div><div class='ctx'> nautilus_machine_check(unsigned long vector, unsigned long la_ptr)</div><div class='ctx'> {</div><div class='ctx'> 	char *mchk_class;</div><div class='hunk'>@@ -184,8 +184,6 @@ nautilus_machine_check(unsigned long vector, unsigned long la_ptr)</div><div class='ctx'> 	mb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void pcibios_claim_one_bus(struct pci_bus *);</div><div class='del'>-</div><div class='ctx'> static struct resource irongate_mem = {</div><div class='ctx'> 	.name	= "Irongate PCI MEM",</div><div class='ctx'> 	.flags	= IORESOURCE_MEM,</div><div class='hunk'>@@ -197,7 +195,7 @@ static struct resource busn_resource = {</div><div class='ctx'> 	.flags	= IORESOURCE_BUS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='add'>+static void __init</div><div class='ctx'> nautilus_init_pci(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose = hose_head;</div><div class='head'>diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c<br/>index 47f3ce4f719a..eed3f16561c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_noritake.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_noritake.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_noritake.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/sys_noritake.c</a></div><div class='hunk'>@@ -24,7 +24,6 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_apecs.h&gt;</div><div class='ctx'> #include &lt;asm/core_cia.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -253,64 +252,6 @@ noritake_swizzle(struct pci_dev *dev, u8 *pinp)</div><div class='ctx'> 	return slot;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)</div><div class='del'>-static void</div><div class='del'>-noritake_apecs_machine_check(unsigned long vector, unsigned long la_ptr)</div><div class='del'>-{</div><div class='del'>-#define MCHK_NO_DEVSEL 0x205U</div><div class='del'>-#define MCHK_NO_TABT 0x204U</div><div class='del'>-</div><div class='del'>-        struct el_common *mchk_header;</div><div class='del'>-        unsigned int code;</div><div class='del'>-</div><div class='del'>-        mchk_header = (struct el_common *)la_ptr;</div><div class='del'>-</div><div class='del'>-        /* Clear the error before any reporting.  */</div><div class='del'>-        mb();</div><div class='del'>-        mb(); /* magic */</div><div class='del'>-        draina();</div><div class='del'>-        apecs_pci_clr_err();</div><div class='del'>-        wrmces(0x7);</div><div class='del'>-        mb();</div><div class='del'>-</div><div class='del'>-        code = mchk_header-&gt;code;</div><div class='del'>-        process_mcheck_info(vector, la_ptr, "NORITAKE APECS",</div><div class='del'>-                            (mcheck_expected(0)</div><div class='del'>-                             &amp;&amp; (code == MCHK_NO_DEVSEL</div><div class='del'>-                                 || code == MCHK_NO_TABT)));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The System Vectors</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)</div><div class='del'>-struct alpha_machine_vector noritake_mv __initmv = {</div><div class='del'>-	.vector_name		= "Noritake",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_APECS_IO,</div><div class='del'>-	.machine_check		= noritake_apecs_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= EISA_DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 48,</div><div class='del'>-	.device_interrupt	= noritake_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= apecs_init_arch,</div><div class='del'>-	.init_irq		= noritake_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= common_init_pci,</div><div class='del'>-	.pci_map_irq		= noritake_map_irq,</div><div class='del'>-	.pci_swizzle		= noritake_swizzle,</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(noritake)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PRIMO)</div><div class='ctx'> struct alpha_machine_vector noritake_primo_mv __initmv = {</div><div class='ctx'> 	.vector_name		= "Noritake-Primo",</div><div class='ctx'> 	DO_EV5_MMU,</div><div class='hunk'>@@ -333,4 +274,3 @@ struct alpha_machine_vector noritake_primo_mv __initmv = {</div><div class='ctx'> 	.pci_swizzle		= noritake_swizzle,</div><div class='ctx'> };</div><div class='ctx'> ALIAS_MV(noritake_primo)</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c<br/>index 930005b2f630..49f5c75134ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_sable.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_sable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_sable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/sys_sable.c</a></div><div class='hunk'>@@ -212,232 +212,6 @@ sable_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> #endif /* defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_SABLE) */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_LYNX)</div><div class='del'>-</div><div class='del'>-/***********************************************************************/</div><div class='del'>-/* LYNX hardware specifics</div><div class='del'>- */</div><div class='del'>-/*</div><div class='del'>- *   For LYNX, which is also baroque, we manage 64 IRQs, via a custom IC.</div><div class='del'>- *</div><div class='del'>- * Bit      Meaning               Kernel IRQ</div><div class='del'>- *------------------------------------------</div><div class='del'>- * 0        </div><div class='del'>- * 1        </div><div class='del'>- * 2        </div><div class='del'>- * 3        mouse			12</div><div class='del'>- * 4        </div><div class='del'>- * 5        </div><div class='del'>- * 6        keyboard			1</div><div class='del'>- * 7        floppy			6</div><div class='del'>- * 8        COM2			3</div><div class='del'>- * 9        parallel port		7</div><div class='del'>- *10        EISA irq 3			-</div><div class='del'>- *11        EISA irq 4			-</div><div class='del'>- *12        EISA irq 5			5</div><div class='del'>- *13        EISA irq 6			-</div><div class='del'>- *14        EISA irq 7			-</div><div class='del'>- *15        COM1			4</div><div class='del'>- *16        EISA irq 9			9</div><div class='del'>- *17        EISA irq 10			10</div><div class='del'>- *18        EISA irq 11			11</div><div class='del'>- *19        EISA irq 12			-</div><div class='del'>- *20        </div><div class='del'>- *21        EISA irq 14			14</div><div class='del'>- *22        EISA irq 15			15</div><div class='del'>- *23        IIC				-</div><div class='del'>- *24        VGA (builtin)               -</div><div class='del'>- *25</div><div class='del'>- *26</div><div class='del'>- *27</div><div class='del'>- *28        NCR810 (builtin)		28</div><div class='del'>- *29</div><div class='del'>- *30</div><div class='del'>- *31</div><div class='del'>- *32        PCI 0 slot 4 A primary bus  32</div><div class='del'>- *33        PCI 0 slot 4 B primary bus  33</div><div class='del'>- *34        PCI 0 slot 4 C primary bus  34</div><div class='del'>- *35        PCI 0 slot 4 D primary bus</div><div class='del'>- *36        PCI 0 slot 5 A primary bus</div><div class='del'>- *37        PCI 0 slot 5 B primary bus</div><div class='del'>- *38        PCI 0 slot 5 C primary bus</div><div class='del'>- *39        PCI 0 slot 5 D primary bus</div><div class='del'>- *40        PCI 0 slot 6 A primary bus</div><div class='del'>- *41        PCI 0 slot 6 B primary bus</div><div class='del'>- *42        PCI 0 slot 6 C primary bus</div><div class='del'>- *43        PCI 0 slot 6 D primary bus</div><div class='del'>- *44        PCI 0 slot 7 A primary bus</div><div class='del'>- *45        PCI 0 slot 7 B primary bus</div><div class='del'>- *46        PCI 0 slot 7 C primary bus</div><div class='del'>- *47        PCI 0 slot 7 D primary bus</div><div class='del'>- *48        PCI 0 slot 0 A secondary bus</div><div class='del'>- *49        PCI 0 slot 0 B secondary bus</div><div class='del'>- *50        PCI 0 slot 0 C secondary bus</div><div class='del'>- *51        PCI 0 slot 0 D secondary bus</div><div class='del'>- *52        PCI 0 slot 1 A secondary bus</div><div class='del'>- *53        PCI 0 slot 1 B secondary bus</div><div class='del'>- *54        PCI 0 slot 1 C secondary bus</div><div class='del'>- *55        PCI 0 slot 1 D secondary bus</div><div class='del'>- *56        PCI 0 slot 2 A secondary bus</div><div class='del'>- *57        PCI 0 slot 2 B secondary bus</div><div class='del'>- *58        PCI 0 slot 2 C secondary bus</div><div class='del'>- *59        PCI 0 slot 2 D secondary bus</div><div class='del'>- *60        PCI 0 slot 3 A secondary bus</div><div class='del'>- *61        PCI 0 slot 3 B secondary bus</div><div class='del'>- *62        PCI 0 slot 3 C secondary bus</div><div class='del'>- *63        PCI 0 slot 3 D secondary bus</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-lynx_update_irq_hw(unsigned long bit, unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Write the AIR register on the T3/T4 with the</div><div class='del'>-	 * address of the IC mask register (offset 0x40)</div><div class='del'>-	 */</div><div class='del'>-	*(vulp)T2_AIR = 0x40;</div><div class='del'>-	mb();</div><div class='del'>-	*(vulp)T2_AIR; /* re-read to force write */</div><div class='del'>-	mb();</div><div class='del'>-	*(vulp)T2_DIR = mask;    </div><div class='del'>-	mb();</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-lynx_ack_irq_hw(unsigned long bit)</div><div class='del'>-{</div><div class='del'>-	*(vulp)T2_VAR = (u_long) bit;</div><div class='del'>-	mb();</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irq_swizzle_t lynx_irq_swizzle = {</div><div class='del'>-	{ /* irq_to_mask */</div><div class='del'>-		-1,  6, -1,  8, 15, 12,  7,  9,	/* pseudo PIC  0-7  */</div><div class='del'>-		-1, 16, 17, 18,  3, -1, 21, 22,	/* pseudo PIC  8-15 */</div><div class='del'>-		-1, -1, -1, -1, -1, -1, -1, -1,	/* pseudo */</div><div class='del'>-		-1, -1, -1, -1, 28, -1, -1, -1,	/* pseudo */</div><div class='del'>-		32, 33, 34, 35, 36, 37, 38, 39,	/* mask 32-39 */</div><div class='del'>-		40, 41, 42, 43, 44, 45, 46, 47,	/* mask 40-47 */</div><div class='del'>-		48, 49, 50, 51, 52, 53, 54, 55,	/* mask 48-55 */</div><div class='del'>-		56, 57, 58, 59, 60, 61, 62, 63	/* mask 56-63 */</div><div class='del'>-	},</div><div class='del'>-	{ /* mask_to_irq */</div><div class='del'>-		-1, -1, -1, 12, -1, -1,  1,  6,	/* mask 0-7   */</div><div class='del'>-		 3,  7, -1, -1,  5, -1, -1,  4,	/* mask 8-15  */</div><div class='del'>-		 9, 10, 11, -1, -1, 14, 15, -1,	/* mask 16-23 */</div><div class='del'>-		-1, -1, -1, -1, 28, -1, -1, -1,	/* mask 24-31 */</div><div class='del'>-		32, 33, 34, 35, 36, 37, 38, 39,	/* mask 32-39 */</div><div class='del'>-		40, 41, 42, 43, 44, 45, 46, 47,	/* mask 40-47 */</div><div class='del'>-		48, 49, 50, 51, 52, 53, 54, 55,	/* mask 48-55 */</div><div class='del'>-		56, 57, 58, 59, 60, 61, 62, 63	/* mask 56-63 */</div><div class='del'>-	},</div><div class='del'>-	-1,</div><div class='del'>-	lynx_update_irq_hw,</div><div class='del'>-	lynx_ack_irq_hw</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-lynx_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	sable_lynx_irq_swizzle = &amp;lynx_irq_swizzle;</div><div class='del'>-	sable_lynx_init_irq(64);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCI Fixup configuration for ALPHA LYNX (2100A)</div><div class='del'>- *</div><div class='del'>- * The device to slot mapping looks like:</div><div class='del'>- *</div><div class='del'>- * Slot     Device</div><div class='del'>- *  0       none</div><div class='del'>- *  1       none</div><div class='del'>- *  2       PCI-EISA bridge</div><div class='del'>- *  3       PCI-PCI bridge</div><div class='del'>- *  4       NCR 810 (Demi-Lynx only)</div><div class='del'>- *  5       none</div><div class='del'>- *  6       PCI on board slot 4</div><div class='del'>- *  7       PCI on board slot 5</div><div class='del'>- *  8       PCI on board slot 6</div><div class='del'>- *  9       PCI on board slot 7</div><div class='del'>- *</div><div class='del'>- * And behind the PPB we have:</div><div class='del'>- *</div><div class='del'>- * 11       PCI on board slot 0</div><div class='del'>- * 12       PCI on board slot 1</div><div class='del'>- * 13       PCI on board slot 2</div><div class='del'>- * 14       PCI on board slot 3</div><div class='del'>- */</div><div class='del'>-/*</div><div class='del'>- * NOTE: the IRQ assignments below are arbitrary, but need to be consistent</div><div class='del'>- * with the values in the irq swizzling tables above.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-lynx_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='del'>-{</div><div class='del'>-	static char irq_tab[19][5] = {</div><div class='del'>-		/*INT    INTA   INTB   INTC   INTD */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 13,  PCEB   */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 14,  PPB    */</div><div class='del'>-		{   28,    28,    28,    28,    28},  /* IdSel 15,  NCR demi */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 16,  none   */</div><div class='del'>-		{   32,    32,    33,    34,    35},  /* IdSel 17,  slot 4 */</div><div class='del'>-		{   36,    36,    37,    38,    39},  /* IdSel 18,  slot 5 */</div><div class='del'>-		{   40,    40,    41,    42,    43},  /* IdSel 19,  slot 6 */</div><div class='del'>-		{   44,    44,    45,    46,    47},  /* IdSel 20,  slot 7 */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 22,  none   */</div><div class='del'>-		/* The following are actually behind the PPB. */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 16   none */</div><div class='del'>-		{   28,    28,    28,    28,    28},  /* IdSel 17   NCR lynx */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 18   none */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 19   none */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 20   none */</div><div class='del'>-		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 21   none */</div><div class='del'>-		{   48,    48,    49,    50,    51},  /* IdSel 22   slot 0 */</div><div class='del'>-		{   52,    52,    53,    54,    55},  /* IdSel 23   slot 1 */</div><div class='del'>-		{   56,    56,    57,    58,    59},  /* IdSel 24   slot 2 */</div><div class='del'>-		{   60,    60,    61,    62,    63}   /* IdSel 25   slot 3 */</div><div class='del'>-	};</div><div class='del'>-	const long min_idsel = 2, max_idsel = 20, irqs_per_slot = 5;</div><div class='del'>-	return COMMON_TABLE_LOOKUP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u8</div><div class='del'>-lynx_swizzle(struct pci_dev *dev, u8 *pinp)</div><div class='del'>-{</div><div class='del'>-	int slot, pin = *pinp;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;bus-&gt;number == 0) {</div><div class='del'>-		slot = PCI_SLOT(dev-&gt;devfn);</div><div class='del'>-	}</div><div class='del'>-	/* Check for the built-in bridge */</div><div class='del'>-	else if (PCI_SLOT(dev-&gt;bus-&gt;self-&gt;devfn) == 3) {</div><div class='del'>-		slot = PCI_SLOT(dev-&gt;devfn) + 11;</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		/* Must be a card-based bridge.  */</div><div class='del'>-		do {</div><div class='del'>-			if (PCI_SLOT(dev-&gt;bus-&gt;self-&gt;devfn) == 3) {</div><div class='del'>-				slot = PCI_SLOT(dev-&gt;devfn) + 11;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			pin = pci_swizzle_interrupt_pin(dev, pin);</div><div class='del'>-</div><div class='del'>-			/* Move up the chain of bridges.  */</div><div class='del'>-			dev = dev-&gt;bus-&gt;self;</div><div class='del'>-			/* Slot of the next bridge.  */</div><div class='del'>-			slot = PCI_SLOT(dev-&gt;devfn);</div><div class='del'>-		} while (dev-&gt;bus-&gt;self);</div><div class='del'>-	}</div><div class='del'>-	*pinp = pin;</div><div class='del'>-	return slot;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_LYNX) */</div><div class='del'>-</div><div class='ctx'> /***********************************************************************/</div><div class='ctx'> /* GENERIC irq routines */</div><div class='ctx'> </div><div class='hunk'>@@ -539,40 +313,7 @@ sable_lynx_init_pci(void)</div><div class='ctx'>  * these games with GAMMA_BIAS.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || \</div><div class='del'>-    (defined(CONFIG_ALPHA_SABLE) &amp;&amp; !defined(CONFIG_ALPHA_GAMMA))</div><div class='del'>-#undef GAMMA_BIAS</div><div class='del'>-#define GAMMA_BIAS 0</div><div class='del'>-struct alpha_machine_vector sable_mv __initmv = {</div><div class='del'>-	.vector_name		= "Sable",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_T2_IO,</div><div class='del'>-	.machine_check		= t2_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_SABLE_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= EISA_DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= T2_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 40,</div><div class='del'>-	.device_interrupt	= sable_lynx_srm_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= t2_init_arch,</div><div class='del'>-	.init_irq		= sable_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= sable_lynx_init_pci,</div><div class='del'>-	.kill_arch		= t2_kill_arch,</div><div class='del'>-	.pci_map_irq		= sable_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .t2 = {</div><div class='del'>-	    .gamma_bias		= 0</div><div class='del'>-	} }</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(sable)</div><div class='del'>-#endif /* GENERIC || (SABLE &amp;&amp; !GAMMA) */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || \</div><div class='del'>-    (defined(CONFIG_ALPHA_SABLE) &amp;&amp; defined(CONFIG_ALPHA_GAMMA))</div><div class='add'>+#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_SABLE)</div><div class='ctx'> #undef GAMMA_BIAS</div><div class='ctx'> #define GAMMA_BIAS _GAMMA_BIAS</div><div class='ctx'> struct alpha_machine_vector sable_gamma_mv __initmv = {</div><div class='hunk'>@@ -601,35 +342,4 @@ struct alpha_machine_vector sable_gamma_mv __initmv = {</div><div class='ctx'> 	} }</div><div class='ctx'> };</div><div class='ctx'> ALIAS_MV(sable_gamma)</div><div class='del'>-#endif /* GENERIC || (SABLE &amp;&amp; GAMMA) */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_LYNX)</div><div class='del'>-#undef GAMMA_BIAS</div><div class='del'>-#define GAMMA_BIAS _GAMMA_BIAS</div><div class='del'>-struct alpha_machine_vector lynx_mv __initmv = {</div><div class='del'>-	.vector_name		= "Lynx",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_T2_IO,</div><div class='del'>-	.machine_check		= t2_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_SABLE_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= EISA_DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= T2_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 64,</div><div class='del'>-	.device_interrupt	= sable_lynx_srm_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= t2_init_arch,</div><div class='del'>-	.init_irq		= lynx_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= sable_lynx_init_pci,</div><div class='del'>-	.kill_arch		= t2_kill_arch,</div><div class='del'>-	.pci_map_irq		= lynx_map_irq,</div><div class='del'>-	.pci_swizzle		= lynx_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .t2 = {</div><div class='del'>-	    .gamma_bias		= _GAMMA_BIAS</div><div class='del'>-	} }</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(lynx)</div><div class='del'>-#endif /* GENERIC || LYNX */</div><div class='add'>+#endif /* GENERIC || SABLE */</div><div class='head'>diff --git a/arch/alpha/kernel/sys_sio.c b/arch/alpha/kernel/sys_sio.c<br/>deleted file mode 100644<br/>index 086488ed83a7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/sys_sio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/sys_sio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,486 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	linux/arch/alpha/kernel/sys_sio.c</div><div class='del'>- *</div><div class='del'>- *	Copyright (C) 1995 David A Rusling</div><div class='del'>- *	Copyright (C) 1996 Jay A Estabrook</div><div class='del'>- *	Copyright (C) 1998, 1999 Richard Henderson</div><div class='del'>- *</div><div class='del'>- * Code for all boards that route the PCI interrupts through the SIO</div><div class='del'>- * PCI/ISA bridge.  This includes Noname (AXPpci33), Multia (UDB),</div><div class='del'>- * Kenetics's Platform 2000, Avanti (AlphaStation), XL, and AlphaBook1.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/screen_info.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/compiler.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/core_apecs.h&gt;</div><div class='del'>-#include &lt;asm/core_lca.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proto.h"</div><div class='del'>-#include "irq_impl.h"</div><div class='del'>-#include "pci_impl.h"</div><div class='del'>-#include "machvec_impl.h"</div><div class='del'>-#include "pc873xx.h"</div><div class='del'>-</div><div class='del'>-#if defined(ALPHA_RESTORE_SRM_SETUP)</div><div class='del'>-/* Save LCA configuration data as the console had it set up.  */</div><div class='del'>-struct </div><div class='del'>-{</div><div class='del'>-	unsigned int orig_route_tab; /* for SAVE/RESTORE */</div><div class='del'>-} saved_config __attribute((common));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-sio_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	if (alpha_using_srm)</div><div class='del'>-		alpha_mv.device_interrupt = srm_device_interrupt;</div><div class='del'>-</div><div class='del'>-	init_i8259a_irqs();</div><div class='del'>-	common_init_isa_dma();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __init</div><div class='del'>-alphabook1_init_arch(void)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_VGA_CONSOLE</div><div class='del'>-	/* The AlphaBook1 has LCD video fixed at 800x600,</div><div class='del'>-	   37 rows and 100 cols. */</div><div class='del'>-	vgacon_screen_info.orig_y = 37;</div><div class='del'>-	vgacon_screen_info.orig_video_cols = 100;</div><div class='del'>-	vgacon_screen_info.orig_video_lines = 37;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	lca_init_arch();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * sio_route_tab selects irq routing in PCI/ISA bridge so that:</div><div class='del'>- *		PIRQ0 -&gt; irq 15</div><div class='del'>- *		PIRQ1 -&gt; irq  9</div><div class='del'>- *		PIRQ2 -&gt; irq 10</div><div class='del'>- *		PIRQ3 -&gt; irq 11</div><div class='del'>- *</div><div class='del'>- * This probably ought to be configurable via MILO.  For</div><div class='del'>- * example, sound boards seem to like using IRQ 9.</div><div class='del'>- *</div><div class='del'>- * This is NOT how we should do it. PIRQ0-X should have</div><div class='del'>- * their own IRQs, the way intel uses the IO-APIC IRQs.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-sio_pci_route(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int orig_route_tab;</div><div class='del'>-</div><div class='del'>-	/* First, ALWAYS read and print the original setting. */</div><div class='del'>-	pci_bus_read_config_dword(pci_isa_hose-&gt;bus, PCI_DEVFN(7, 0), 0x60,</div><div class='del'>-				  &amp;orig_route_tab);</div><div class='del'>-	printk("%s: PIRQ original 0x%x new 0x%x\n", __func__,</div><div class='del'>-	       orig_route_tab, alpha_mv.sys.sio.route_tab);</div><div class='del'>-</div><div class='del'>-#if defined(ALPHA_RESTORE_SRM_SETUP)</div><div class='del'>-	saved_config.orig_route_tab = orig_route_tab;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Now override with desired setting. */</div><div class='del'>-	pci_bus_write_config_dword(pci_isa_hose-&gt;bus, PCI_DEVFN(7, 0), 0x60,</div><div class='del'>-				   alpha_mv.sys.sio.route_tab);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool sio_pci_dev_irq_needs_level(const struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	if ((dev-&gt;class &gt;&gt; 16 == PCI_BASE_CLASS_BRIDGE) &amp;&amp;</div><div class='del'>-	    (dev-&gt;class &gt;&gt; 8 != PCI_CLASS_BRIDGE_PCMCIA))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int __init</div><div class='del'>-sio_collect_irq_levels(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int level_bits = 0;</div><div class='del'>-	struct pci_dev *dev = NULL;</div><div class='del'>-</div><div class='del'>-	/* Iterate through the devices, collecting IRQ levels.  */</div><div class='del'>-	for_each_pci_dev(dev) {</div><div class='del'>-		if (!sio_pci_dev_irq_needs_level(dev))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (dev-&gt;irq)</div><div class='del'>-			level_bits |= (1 &lt;&lt; dev-&gt;irq);</div><div class='del'>-	}</div><div class='del'>-	return level_bits;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __sio_fixup_irq_levels(unsigned int level_bits, bool reset)</div><div class='del'>-{</div><div class='del'>-	unsigned int old_level_bits;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Now, make all PCI interrupts level sensitive.  Notice:</div><div class='del'>-	 * these registers must be accessed byte-wise.  inw()/outw()</div><div class='del'>-	 * don't work.</div><div class='del'>-	 *</div><div class='del'>-	 * Make sure to turn off any level bits set for IRQs 9,10,11,15,</div><div class='del'>-	 *  so that the only bits getting set are for devices actually found.</div><div class='del'>-	 * Note that we do preserve the remainder of the bits, which we hope</div><div class='del'>-	 *  will be set correctly by ARC/SRM.</div><div class='del'>-	 *</div><div class='del'>-	 * Note: we at least preserve any level-set bits on AlphaBook1</div><div class='del'>-	 */</div><div class='del'>-	old_level_bits = inb(0x4d0) | (inb(0x4d1) &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-	if (reset)</div><div class='del'>-		old_level_bits &amp;= 0x71ff;</div><div class='del'>-</div><div class='del'>-	level_bits |= old_level_bits;</div><div class='del'>-</div><div class='del'>-	outb((level_bits &gt;&gt; 0) &amp; 0xff, 0x4d0);</div><div class='del'>-	outb((level_bits &gt;&gt; 8) &amp; 0xff, 0x4d1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-sio_fixup_irq_levels(unsigned int level_bits)</div><div class='del'>-{</div><div class='del'>-	__sio_fixup_irq_levels(level_bits, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-noname_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * The Noname board has 5 PCI slots with each of the 4</div><div class='del'>-	 * interrupt pins routed to different pins on the PCI/ISA</div><div class='del'>-	 * bridge (PIRQ0-PIRQ3).  The table below is based on</div><div class='del'>-	 * information available at:</div><div class='del'>-	 *</div><div class='del'>-	 *   http://ftp.digital.com/pub/DEC/axppci/ref_interrupts.txt</div><div class='del'>-	 *</div><div class='del'>-	 * I have no information on the Avanti interrupt routing, but</div><div class='del'>-	 * the routing seems to be identical to the Noname except</div><div class='del'>-	 * that the Avanti has an additional slot whose routing I'm</div><div class='del'>-	 * unsure of.</div><div class='del'>-	 *</div><div class='del'>-	 * pirq_tab[0] is a fake entry to deal with old PCI boards</div><div class='del'>-	 * that have the interrupt pin number hardwired to 0 (meaning</div><div class='del'>-	 * that they use the default INTA line, if they are interrupt</div><div class='del'>-	 * driven at all).</div><div class='del'>-	 */</div><div class='del'>-	static char irq_tab[][5] = {</div><div class='del'>-		/*INT A   B   C   D */</div><div class='del'>-		{ 3,  3,  3,  3,  3}, /* idsel  6 (53c810) */ </div><div class='del'>-		{-1, -1, -1, -1, -1}, /* idsel  7 (SIO: PCI/ISA bridge) */</div><div class='del'>-		{ 2,  2, -1, -1, -1}, /* idsel  8 (Hack: slot closest ISA) */</div><div class='del'>-		{-1, -1, -1, -1, -1}, /* idsel  9 (unused) */</div><div class='del'>-		{-1, -1, -1, -1, -1}, /* idsel 10 (unused) */</div><div class='del'>-		{ 0,  0,  2,  1,  0}, /* idsel 11 KN25_PCI_SLOT0 */</div><div class='del'>-		{ 1,  1,  0,  2,  1}, /* idsel 12 KN25_PCI_SLOT1 */</div><div class='del'>-		{ 2,  2,  1,  0,  2}, /* idsel 13 KN25_PCI_SLOT2 */</div><div class='del'>-		{ 0,  0,  0,  0,  0}, /* idsel 14 AS255 TULIP */</div><div class='del'>-	};</div><div class='del'>-	const long min_idsel = 6, max_idsel = 14, irqs_per_slot = 5;</div><div class='del'>-	int irq = COMMON_TABLE_LOOKUP, tmp;</div><div class='del'>-	tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq);</div><div class='del'>-</div><div class='del'>-	irq = irq &gt;= 0 ? tmp : -1;</div><div class='del'>-</div><div class='del'>-	/* Fixup IRQ level if an actual IRQ mapping is detected */</div><div class='del'>-	if (sio_pci_dev_irq_needs_level(dev) &amp;&amp; irq &gt;= 0)</div><div class='del'>-		__sio_fixup_irq_levels(1 &lt;&lt; irq, false);</div><div class='del'>-</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-p2k_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='del'>-{</div><div class='del'>-	static char irq_tab[][5] = {</div><div class='del'>-		/*INT A   B   C   D */</div><div class='del'>-		{ 0,  0, -1, -1, -1}, /* idsel  6 (53c810) */</div><div class='del'>-		{-1, -1, -1, -1, -1}, /* idsel  7 (SIO: PCI/ISA bridge) */</div><div class='del'>-		{ 1,  1,  2,  3,  0}, /* idsel  8 (slot A) */</div><div class='del'>-		{ 2,  2,  3,  0,  1}, /* idsel  9 (slot B) */</div><div class='del'>-		{-1, -1, -1, -1, -1}, /* idsel 10 (unused) */</div><div class='del'>-		{-1, -1, -1, -1, -1}, /* idsel 11 (unused) */</div><div class='del'>-		{ 3,  3, -1, -1, -1}, /* idsel 12 (CMD0646) */</div><div class='del'>-	};</div><div class='del'>-	const long min_idsel = 6, max_idsel = 12, irqs_per_slot = 5;</div><div class='del'>-	int irq = COMMON_TABLE_LOOKUP, tmp;</div><div class='del'>-	tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq);</div><div class='del'>-	return irq &gt;= 0 ? tmp : -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __init</div><div class='del'>-noname_init_pci(void)</div><div class='del'>-{</div><div class='del'>-	common_init_pci();</div><div class='del'>-	sio_pci_route();</div><div class='del'>-	sio_fixup_irq_levels(sio_collect_irq_levels());</div><div class='del'>-</div><div class='del'>-	if (pc873xx_probe() == -1) {</div><div class='del'>-		printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");</div><div class='del'>-	} else {</div><div class='del'>-		printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",</div><div class='del'>-			pc873xx_get_model(), pc873xx_get_base());</div><div class='del'>-</div><div class='del'>-		/* Enabling things in the Super IO chip doesn't actually</div><div class='del'>-		 * configure and enable things, the legacy drivers still</div><div class='del'>-		 * need to do the actual configuration and enabling.</div><div class='del'>-		 * This only unblocks them.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-#if !defined(CONFIG_ALPHA_AVANTI)</div><div class='del'>-		/* Don't bother on the Avanti family.</div><div class='del'>-		 * None of them had on-board IDE.</div><div class='del'>-		 */</div><div class='del'>-		pc873xx_enable_ide();</div><div class='del'>-#endif</div><div class='del'>-		pc873xx_enable_epp19();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __init</div><div class='del'>-alphabook1_init_pci(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *dev;</div><div class='del'>-	unsigned char orig, config;</div><div class='del'>-</div><div class='del'>-	common_init_pci();</div><div class='del'>-	sio_pci_route();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * On the AlphaBook1, the PCMCIA chip (Cirrus 6729)</div><div class='del'>-	 * is sensitive to PCI bus bursts, so we must DISABLE</div><div class='del'>-	 * burst mode for the NCR 8xx SCSI... :-(</div><div class='del'>-	 *</div><div class='del'>-	 * Note that the NCR810 SCSI driver must preserve the</div><div class='del'>-	 * setting of the bit in order for this to work.  At the</div><div class='del'>-	 * moment (2.0.29), ncr53c8xx.c does NOT do this, but</div><div class='del'>-	 * 53c7,8xx.c DOES.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	dev = NULL;</div><div class='del'>-	while ((dev = pci_get_device(PCI_VENDOR_ID_NCR, PCI_ANY_ID, dev))) {</div><div class='del'>-		if (dev-&gt;device == PCI_DEVICE_ID_NCR_53C810</div><div class='del'>-		    || dev-&gt;device == PCI_DEVICE_ID_NCR_53C815</div><div class='del'>-		    || dev-&gt;device == PCI_DEVICE_ID_NCR_53C820</div><div class='del'>-		    || dev-&gt;device == PCI_DEVICE_ID_NCR_53C825) {</div><div class='del'>-			unsigned long io_port;</div><div class='del'>-			unsigned char ctest4;</div><div class='del'>-</div><div class='del'>-			io_port = dev-&gt;resource[0].start;</div><div class='del'>-			ctest4 = inb(io_port+0x21);</div><div class='del'>-			if (!(ctest4 &amp; 0x80)) {</div><div class='del'>-				printk("AlphaBook1 NCR init: setting"</div><div class='del'>-				       " burst disable\n");</div><div class='del'>-				outb(ctest4 | 0x80, io_port+0x21);</div><div class='del'>-			}</div><div class='del'>-                }</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Do not set *ANY* level triggers for AlphaBook1. */</div><div class='del'>-	sio_fixup_irq_levels(0);</div><div class='del'>-</div><div class='del'>-	/* Make sure that register PR1 indicates 1Mb mem */</div><div class='del'>-	outb(0x0f, 0x3ce); orig = inb(0x3cf);   /* read PR5  */</div><div class='del'>-	outb(0x0f, 0x3ce); outb(0x05, 0x3cf);   /* unlock PR0-4 */</div><div class='del'>-	outb(0x0b, 0x3ce); config = inb(0x3cf); /* read PR1 */</div><div class='del'>-	if ((config &amp; 0xc0) != 0xc0) {</div><div class='del'>-		printk("AlphaBook1 VGA init: setting 1Mb memory\n");</div><div class='del'>-		config |= 0xc0;</div><div class='del'>-		outb(0x0b, 0x3ce); outb(config, 0x3cf); /* write PR1 */</div><div class='del'>-	}</div><div class='del'>-	outb(0x0f, 0x3ce); outb(orig, 0x3cf); /* (re)lock PR0-4 */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-sio_kill_arch(int mode)</div><div class='del'>-{</div><div class='del'>-#if defined(ALPHA_RESTORE_SRM_SETUP)</div><div class='del'>-	/* Since we cannot read the PCI DMA Window CSRs, we</div><div class='del'>-	 * cannot restore them here.</div><div class='del'>-	 *</div><div class='del'>-	 * However, we CAN read the PIRQ route register, so restore it</div><div class='del'>-	 * now...</div><div class='del'>-	 */</div><div class='del'>- 	pci_bus_write_config_dword(pci_isa_hose-&gt;bus, PCI_DEVFN(7, 0), 0x60,</div><div class='del'>-				   saved_config.orig_route_tab);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The System Vectors</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_BOOK1)</div><div class='del'>-struct alpha_machine_vector alphabook1_mv __initmv = {</div><div class='del'>-	.vector_name		= "AlphaBook1",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_LCA_IO,</div><div class='del'>-	.machine_check		= lca_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 16,</div><div class='del'>-	.device_interrupt	= isa_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= alphabook1_init_arch,</div><div class='del'>-	.init_irq		= sio_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= alphabook1_init_pci,</div><div class='del'>-	.kill_arch		= sio_kill_arch,</div><div class='del'>-	.pci_map_irq		= noname_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .sio = {</div><div class='del'>-		/* NCR810 SCSI is 14, PCMCIA controller is 15.  */</div><div class='del'>-		.route_tab	= 0x0e0f0a0a,</div><div class='del'>-	}}</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(alphabook1)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_AVANTI)</div><div class='del'>-struct alpha_machine_vector avanti_mv __initmv = {</div><div class='del'>-	.vector_name		= "Avanti",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_APECS_IO,</div><div class='del'>-	.machine_check		= apecs_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 16,</div><div class='del'>-	.device_interrupt	= isa_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= apecs_init_arch,</div><div class='del'>-	.init_irq		= sio_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= noname_init_pci,</div><div class='del'>-	.kill_arch		= sio_kill_arch,</div><div class='del'>-	.pci_map_irq		= noname_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .sio = {</div><div class='del'>-		.route_tab	= 0x0b0a050f, /* leave 14 for IDE, 9 for SND */</div><div class='del'>-	}}</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(avanti)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_NONAME)</div><div class='del'>-struct alpha_machine_vector noname_mv __initmv = {</div><div class='del'>-	.vector_name		= "Noname",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_LCA_IO,</div><div class='del'>-	.machine_check		= lca_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 16,</div><div class='del'>-	.device_interrupt	= srm_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= lca_init_arch,</div><div class='del'>-	.init_irq		= sio_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= noname_init_pci,</div><div class='del'>-	.kill_arch		= sio_kill_arch,</div><div class='del'>-	.pci_map_irq		= noname_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .sio = {</div><div class='del'>-		/* For UDB, the only available PCI slot must not map to IRQ 9,</div><div class='del'>-		   since that's the builtin MSS sound chip. That PCI slot</div><div class='del'>-		   will map to PIRQ1 (for INTA at least), so we give it IRQ 15</div><div class='del'>-		   instead.</div><div class='del'>-</div><div class='del'>-		   Unfortunately we have to do this for NONAME as well, since</div><div class='del'>-		   they are co-indicated when the platform type "Noname" is</div><div class='del'>-		   selected... :-(  */</div><div class='del'>-</div><div class='del'>-		.route_tab	= 0x0b0a0f0d,</div><div class='del'>-	}}</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(noname)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_P2K)</div><div class='del'>-struct alpha_machine_vector p2k_mv __initmv = {</div><div class='del'>-	.vector_name		= "Platform2000",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_LCA_IO,</div><div class='del'>-	.machine_check		= lca_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= APECS_AND_LCA_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 16,</div><div class='del'>-	.device_interrupt	= srm_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= lca_init_arch,</div><div class='del'>-	.init_irq		= sio_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= noname_init_pci,</div><div class='del'>-	.kill_arch		= sio_kill_arch,</div><div class='del'>-	.pci_map_irq		= p2k_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .sio = {</div><div class='del'>-		.route_tab	= 0x0b0a090f,</div><div class='del'>-	}}</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(p2k)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_XL)</div><div class='del'>-struct alpha_machine_vector xl_mv __initmv = {</div><div class='del'>-	.vector_name		= "XL",</div><div class='del'>-	DO_EV4_MMU,</div><div class='del'>-	DO_DEFAULT_RTC,</div><div class='del'>-	DO_APECS_IO,</div><div class='del'>-	.machine_check		= apecs_machine_check,</div><div class='del'>-	.max_isa_dma_address	= ALPHA_XL_MAX_ISA_DMA_ADDRESS,</div><div class='del'>-	.min_io_address		= DEFAULT_IO_BASE,</div><div class='del'>-	.min_mem_address	= XL_DEFAULT_MEM_BASE,</div><div class='del'>-</div><div class='del'>-	.nr_irqs		= 16,</div><div class='del'>-	.device_interrupt	= isa_device_interrupt,</div><div class='del'>-</div><div class='del'>-	.init_arch		= apecs_init_arch,</div><div class='del'>-	.init_irq		= sio_init_irq,</div><div class='del'>-	.init_rtc		= common_init_rtc,</div><div class='del'>-	.init_pci		= noname_init_pci,</div><div class='del'>-	.kill_arch		= sio_kill_arch,</div><div class='del'>-	.pci_map_irq		= noname_map_irq,</div><div class='del'>-	.pci_swizzle		= common_swizzle,</div><div class='del'>-</div><div class='del'>-	.sys = { .sio = {</div><div class='del'>-		.route_tab	= 0x0b0a090f,</div><div class='del'>-	}}</div><div class='del'>-};</div><div class='del'>-ALIAS_MV(xl)</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/alpha/kernel/syscalls/syscall.tbl b/arch/alpha/kernel/syscalls/syscall.tbl<br/>index 8ff110826ce2..26cce7e7f70b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/syscalls/syscall.tbl?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/syscalls/syscall.tbl?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -474,7 +474,7 @@</div><div class='ctx'> 542	common	fsmount				sys_fsmount</div><div class='ctx'> 543	common	fspick				sys_fspick</div><div class='ctx'> 544	common	pidfd_open			sys_pidfd_open</div><div class='del'>-# 545 reserved for clone3</div><div class='add'>+545	common	clone3				alpha_clone3</div><div class='ctx'> 546	common	close_range			sys_close_range</div><div class='ctx'> 547	common	openat2				sys_openat2</div><div class='ctx'> 548	common	pidfd_getfd			sys_pidfd_getfd</div><div class='head'>diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c<br/>index 7fc72aeb7398..6afae65e9a8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/traps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/kernel/traps.c</a></div><div class='hunk'>@@ -30,39 +30,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "proto.h"</div><div class='ctx'> </div><div class='del'>-/* Work-around for some SRMs which mishandle opDEC faults.  */</div><div class='del'>-</div><div class='del'>-static int opDEC_fix;</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-opDEC_check(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__ (</div><div class='del'>-	/* Load the address of... */</div><div class='del'>-	"	br	$16, 1f\n"</div><div class='del'>-	/* A stub instruction fault handler.  Just add 4 to the</div><div class='del'>-	   pc and continue.  */</div><div class='del'>-	"	ldq	$16, 8($sp)\n"</div><div class='del'>-	"	addq	$16, 4, $16\n"</div><div class='del'>-	"	stq	$16, 8($sp)\n"</div><div class='del'>-	"	call_pal %[rti]\n"</div><div class='del'>-	/* Install the instruction fault handler.  */</div><div class='del'>-	"1:	lda	$17, 3\n"</div><div class='del'>-	"	call_pal %[wrent]\n"</div><div class='del'>-	/* With that in place, the fault from the round-to-minf fp</div><div class='del'>-	   insn will arrive either at the "lda 4" insn (bad) or one</div><div class='del'>-	   past that (good).  This places the correct fixup in %0.  */</div><div class='del'>-	"	lda %[fix], 0\n"</div><div class='del'>-	"	cvttq/svm $f31,$f31\n"</div><div class='del'>-	"	lda %[fix], 4"</div><div class='del'>-	: [fix] "=r" (opDEC_fix)</div><div class='del'>-	: [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)</div><div class='del'>-	: "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");</div><div class='del'>-</div><div class='del'>-	if (opDEC_fix)</div><div class='del'>-		printk("opDEC fixup enabled.\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void</div><div class='ctx'> dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)</div><div class='ctx'> {</div><div class='hunk'>@@ -353,32 +320,6 @@ do_entIF(unsigned long type, struct pt_regs *regs)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	      case 4: /* opDEC */</div><div class='del'>-		if (implver() == IMPLVER_EV4) {</div><div class='del'>-			long si_code;</div><div class='del'>-</div><div class='del'>-			/* The some versions of SRM do not handle</div><div class='del'>-			   the opDEC properly - they return the PC of the</div><div class='del'>-			   opDEC fault, not the instruction after as the</div><div class='del'>-			   Alpha architecture requires.  Here we fix it up.</div><div class='del'>-			   We do this by intentionally causing an opDEC</div><div class='del'>-			   fault during the boot sequence and testing if</div><div class='del'>-			   we get the correct PC.  If not, we set a flag</div><div class='del'>-			   to correct it every time through.  */</div><div class='del'>-			regs-&gt;pc += opDEC_fix; </div><div class='del'>-			</div><div class='del'>-			/* EV4 does not implement anything except normal</div><div class='del'>-			   rounding.  Everything else will come here as</div><div class='del'>-			   an illegal instruction.  Emulate them.  */</div><div class='del'>-			si_code = alpha_fp_emul(regs-&gt;pc - 4);</div><div class='del'>-			if (si_code == 0)</div><div class='del'>-				return;</div><div class='del'>-			if (si_code &gt; 0) {</div><div class='del'>-				send_sig_fault_trapno(SIGFPE, si_code,</div><div class='del'>-						      (void __user *) regs-&gt;pc,</div><div class='del'>-						      0, current);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	      case 5: /* illoc */</div><div class='hunk'>@@ -979,11 +920,6 @@ trap_init(void)</div><div class='ctx'> 	register unsigned long gptr __asm__("$29");</div><div class='ctx'> 	wrkgp(gptr);</div><div class='ctx'> </div><div class='del'>-	/* Hack for Multia (UDB) and JENSEN: some of their SRMs have</div><div class='del'>-	   a bug in the handling of the opDEC fault.  Fix it up if so.  */</div><div class='del'>-	if (implver() == IMPLVER_EV4)</div><div class='del'>-		opDEC_check();</div><div class='del'>-</div><div class='ctx'> 	wrent(entArith, 1);</div><div class='ctx'> 	wrent(entMM, 2);</div><div class='ctx'> 	wrent(entIF, 3);</div><div class='head'>diff --git a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile<br/>index 6a779b9018fd..84046e730e6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/lib/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/lib/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/lib/Makefile</a></div><div class='hunk'>@@ -44,17 +44,3 @@ AFLAGS___remlu.o =       -DREM -DINTSIZE</div><div class='ctx'> $(addprefix $(obj)/,__divqu.o __remqu.o __divlu.o __remlu.o): \</div><div class='ctx'> 						$(src)/$(ev6-y)divide.S FORCE</div><div class='ctx'> 	$(call if_changed_rule,as_o_S)</div><div class='del'>-</div><div class='del'>-# There are direct branches between {str*cpy,str*cat} and stx*cpy.</div><div class='del'>-# Ensure the branches are within range by merging these objects.</div><div class='del'>-</div><div class='del'>-LDFLAGS_stycpy.o := -r</div><div class='del'>-LDFLAGS_styncpy.o := -r</div><div class='del'>-</div><div class='del'>-$(obj)/stycpy.o: $(obj)/strcpy.o $(obj)/$(ev67-y)strcat.o \</div><div class='del'>-		 $(obj)/$(ev6-y)stxcpy.o FORCE</div><div class='del'>-	$(call if_changed,ld)</div><div class='del'>-</div><div class='del'>-$(obj)/styncpy.o: $(obj)/strncpy.o $(obj)/$(ev67-y)strncat.o \</div><div class='del'>-		 $(obj)/$(ev6-y)stxncpy.o FORCE</div><div class='del'>-	$(call if_changed,ld)</div><div class='head'>diff --git a/arch/alpha/lib/checksum.c b/arch/alpha/lib/checksum.c<br/>index 3f35c3ed6948..17fa230baeef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/lib/checksum.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/checksum.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/lib/checksum.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/lib/checksum.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'>  </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;net/checksum.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/lib/fpreg.c b/arch/alpha/lib/fpreg.c<br/>index 7c08b225261c..eee11fb4c7f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/lib/fpreg.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/fpreg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/lib/fpreg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/lib/fpreg.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/preempt.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)</div><div class='ctx'> #define STT(reg,val)  asm volatile ("ftoit $f"#reg",%0" : "=r"(val));</div><div class='head'>diff --git a/arch/alpha/lib/memcpy.c b/arch/alpha/lib/memcpy.c<br/>index cbac3dc6d963..78b6850a9d53 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/lib/memcpy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/lib/memcpy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/lib/memcpy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/lib/memcpy.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This should be done in one go with ldq_u*2/mask/stq_u. Do it</div><div class='hunk'>@@ -150,6 +151,8 @@ static inline void __memcpy_aligned_dn (unsigned long d, unsigned long s,</div><div class='ctx'> 	DO_REST_ALIGNED_DN(d,s,n);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#undef memcpy</div><div class='add'>+</div><div class='ctx'> void * memcpy(void * dest, const void *src, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	if (!(((unsigned long) dest ^ (unsigned long) src) &amp; 7)) {</div><div class='head'>diff --git a/arch/alpha/lib/stycpy.S b/arch/alpha/lib/stycpy.S<br/>new file mode 100644<br/>index 000000000000..32ecd9c5f90d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/lib/stycpy.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/lib/stycpy.S</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+#include "strcpy.S"</div><div class='add'>+#ifdef CONFIG_ALPHA_EV67</div><div class='add'>+#include "ev67-strcat.S"</div><div class='add'>+#else</div><div class='add'>+#include "strcat.S"</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ALPHA_EV6</div><div class='add'>+#include "ev6-stxcpy.S"</div><div class='add'>+#else</div><div class='add'>+#include "stxcpy.S"</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/alpha/lib/styncpy.S b/arch/alpha/lib/styncpy.S<br/>new file mode 100644<br/>index 000000000000..72fc2754eb57<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/lib/styncpy.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/lib/styncpy.S</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+#include "strncpy.S"</div><div class='add'>+#ifdef CONFIG_ALPHA_EV67</div><div class='add'>+#include "ev67-strncat.S"</div><div class='add'>+#else</div><div class='add'>+#include "strncat.S"</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ALPHA_EV6</div><div class='add'>+#include "ev6-stxncpy.S"</div><div class='add'>+#else</div><div class='add'>+#include "stxncpy.S"</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/alpha/math-emu/math.c b/arch/alpha/math-emu/math.c<br/>index 4212258f3cfd..68d420bfd3c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/math-emu/math.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/math-emu/math.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/math-emu/math.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/math-emu/math.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -45,12 +46,6 @@</div><div class='ctx'> #define MISC_TRAPB	0x0000</div><div class='ctx'> #define MISC_EXCB	0x0400</div><div class='ctx'> </div><div class='del'>-extern unsigned long alpha_read_fp_reg (unsigned long reg);</div><div class='del'>-extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);</div><div class='del'>-extern unsigned long alpha_read_fp_reg_s (unsigned long reg);</div><div class='del'>-extern void alpha_write_fp_reg_s (unsigned long reg, unsigned long val);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #ifdef MODULE</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("FP Software completion module");</div><div class='head'>diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c<br/>index a155180d7a83..4fe618446e4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/alpha/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/alpha/mm/init.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='del'>-extern void die_if_kernel(char *,struct pt_regs *,long);</div><div class='add'>+#include "../kernel/proto.h"</div><div class='ctx'> </div><div class='ctx'> static struct pcb_struct original_pcb;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/Kbuild b/arch/arc/Kbuild<br/>index b94102fff68b..20ea7dd482d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/Kbuild?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/Kbuild</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/Kbuild?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/Kbuild</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> obj-y += kernel/</div><div class='ctx'> obj-y += mm/</div><div class='add'>+obj-y += net/</div><div class='ctx'> </div><div class='ctx'> # for cleaning</div><div class='ctx'> subdir- += boot</div><div class='head'>diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig<br/>index 99d2845f3feb..fd0b0a0d4686 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/Kconfig</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> config ARC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select ARC_TIMERS</div><div class='del'>-	select ARCH_HAS_CPU_CACHE_ALIASING</div><div class='ctx'> 	select ARCH_HAS_CACHE_LINE_SIZE</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VM_PGTABLE</div><div class='ctx'> 	select ARCH_HAS_DMA_PREP_COHERENT</div><div class='hunk'>@@ -52,6 +51,7 @@ config ARC</div><div class='ctx'> 	select PCI_SYSCALL if PCI</div><div class='ctx'> 	select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 &amp;&amp; !CPU_ENDIAN_BE32</div><div class='ctx'> 	select TRACE_IRQFLAGS_SUPPORT</div><div class='add'>+	select HAVE_EBPF_JIT if ISA_ARCV2</div><div class='ctx'> </div><div class='ctx'> config LOCKDEP_SUPPORT</div><div class='ctx'> 	def_bool y</div><div class='head'>diff --git a/arch/arc/boot/Makefile b/arch/arc/boot/Makefile<br/>index 5648748c285f..5a8550124b73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/boot/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/boot/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/boot/Makefile</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-# uImage build relies on mkimage being availble on your host for ARC target</div><div class='add'>+# uImage build relies on mkimage being available on your host for ARC target</div><div class='ctx'> # You will need to build u-boot for ARC, rename mkimage to arc-elf32-mkimage</div><div class='del'>-# and make sure it's reacable from your PATH</div><div class='add'>+# and make sure it's reachable from your PATH</div><div class='ctx'> </div><div class='ctx'> OBJCOPYFLAGS= -O binary -R .note -R .note.gnu.build-id -R .comment -S</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi<br/>index 3434c8131ecd..c0a812674ce9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/boot/dts/axc003.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/dts/axc003.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/boot/dts/axc003.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/boot/dts/axc003.dtsi</a></div><div class='hunk'>@@ -119,9 +119,9 @@</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The DW APB ICTL intc on MB is connected to CPU intc via a</div><div class='ctx'> 	 * DT "invisible" DW APB GPIO block, configured to simply pass thru</div><div class='del'>-	 * interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)</div><div class='add'>+	 * interrupts - setup accordingly in platform init (plat-axs10x/ax10x.c)</div><div class='ctx'> 	 *</div><div class='del'>-	 * So here we mimic a direct connection betwen them, ignoring the</div><div class='add'>+	 * So here we mimic a direct connection between them, ignoring the</div><div class='ctx'> 	 * ABPG GPIO. Thus set "interrupts = &lt;24&gt;" (DW APB GPIO to core)</div><div class='ctx'> 	 * instead of "interrupts = &lt;12&gt;" (DW APB ICTL to DW APB GPIO)</div><div class='ctx'> 	 *</div><div class='head'>diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts<br/>index 6691f4255077..41b980df862b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/boot/dts/hsdk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/dts/hsdk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/boot/dts/hsdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/boot/dts/hsdk.dts</a></div><div class='hunk'>@@ -205,7 +205,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gmac: ethernet@8000 {</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "snps,dwmac";</div><div class='ctx'> 			reg = &lt;0x8000 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;10&gt;;</div><div class='head'>diff --git a/arch/arc/boot/dts/vdk_axs10x_mb.dtsi b/arch/arc/boot/dts/vdk_axs10x_mb.dtsi<br/>index 90a412026e64..0e0e2d337bf8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/boot/dts/vdk_axs10x_mb.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/boot/dts/vdk_axs10x_mb.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/boot/dts/vdk_axs10x_mb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/boot/dts/vdk_axs10x_mb.dtsi</a></div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Embedded Vision subsystem UIO mappings; only relevant for EV VDK</div><div class='ctx'> 	 *</div><div class='del'>-	 * This node is intentionally put outside of MB above becase</div><div class='add'>+	 * This node is intentionally put outside of MB above because</div><div class='ctx'> 	 * it maps areas outside of MB's 0xez-0xfz.</div><div class='ctx'> 	 */</div><div class='ctx'> 	uio_ev: uio@d0000000 {</div><div class='head'>diff --git a/arch/arc/include/asm/cachetype.h b/arch/arc/include/asm/cachetype.h<br/>deleted file mode 100644<br/>index 05fc7ed59712..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/cachetype.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/cachetype.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,9 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __ASM_ARC_CACHETYPE_H</div><div class='del'>-#define __ASM_ARC_CACHETYPE_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-#define cpu_dcache_is_aliasing()	true</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arc/include/asm/dsp.h b/arch/arc/include/asm/dsp.h<br/>index 202c78e56704..f496dbc4640b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/dsp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/dsp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/dsp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/dsp.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * DSP-related saved registers - need to be saved only when you are</div><div class='ctx'>  * scheduled out.</div><div class='del'>- * structure fields name must correspond to aux register defenitions for</div><div class='add'>+ * structure fields name must correspond to aux register definitions for</div><div class='ctx'>  * automatic offset calculation in DSP_AUX_SAVE_RESTORE macros</div><div class='ctx'>  */</div><div class='ctx'> struct dsp_callee_regs {</div><div class='head'>diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h<br/>index 92c3e9f13252..00946fe04c9b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/entry-compact.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/entry-compact.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/entry-compact.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/entry-compact.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>  *  Stack switching code can no longer reliably rely on the fact that</div><div class='ctx'>  *  if we are NOT in user mode, stack is switched to kernel mode.</div><div class='ctx'>  *  e.g. L2 IRQ interrupted a L1 ISR which had not yet completed</div><div class='del'>- *  it's prologue including stack switching from user mode</div><div class='add'>+ *  its prologue including stack switching from user mode</div><div class='ctx'>  *</div><div class='ctx'>  * Vineetg: Aug 28th 2008: Bug #94984</div><div class='ctx'>  *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap</div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> 	 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)</div><div class='ctx'> 	 * 3. But before it could switch SP from USER to KERNEL stack</div><div class='ctx'> 	 *      a L2 IRQ "Interrupts" L1</div><div class='del'>-	 * Thay way although L2 IRQ happened in Kernel mode, stack is still</div><div class='add'>+	 * That way although L2 IRQ happened in Kernel mode, stack is still</div><div class='ctx'> 	 * not switched.</div><div class='ctx'> 	 * To handle this, we may need to switch stack even if in kernel mode</div><div class='ctx'> 	 * provided SP has values in range of USER mode stack ( &lt; 0x7000_0000 )</div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> </div><div class='ctx'> 	GET_CURR_TASK_ON_CPU   r9</div><div class='ctx'> </div><div class='del'>-	/* With current tsk in r9, get it's kernel mode stack base */</div><div class='add'>+	/* With current tsk in r9, get its kernel mode stack base */</div><div class='ctx'> 	GET_TSK_STACK_BASE  r9, r9</div><div class='ctx'> </div><div class='ctx'> 	/* save U mode SP @ pt_regs-&gt;sp */</div><div class='hunk'>@@ -282,7 +282,7 @@</div><div class='ctx'>  * NOTE:</div><div class='ctx'>  *</div><div class='ctx'>  * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg</div><div class='del'>- * for memory load operations. If used in that way interrupts are deffered</div><div class='add'>+ * for memory load operations. If used in that way interrupts are deferred</div><div class='ctx'>  * by hardware and that is not good.</div><div class='ctx'>  *-------------------------------------------------------------*/</div><div class='ctx'> .macro EXCEPTION_EPILOGUE</div><div class='hunk'>@@ -350,7 +350,7 @@</div><div class='ctx'>  * NOTE:</div><div class='ctx'>  *</div><div class='ctx'>  * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg</div><div class='del'>- * for memory load operations. If used in that way interrupts are deffered</div><div class='add'>+ * for memory load operations. If used in that way interrupts are deferred</div><div class='ctx'>  * by hardware and that is not good.</div><div class='ctx'>  *-------------------------------------------------------------*/</div><div class='ctx'> .macro INTERRUPT_EPILOGUE  LVL</div><div class='head'>diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h<br/>index cf1ba376e992..38c35722cebf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/entry.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/entry.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/entry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/entry.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #ifndef __ASM_ARC_ENTRY_H</div><div class='ctx'> #define __ASM_ARC_ENTRY_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/unistd.h&gt;		/* For NR_syscalls defination */</div><div class='add'>+#include &lt;asm/unistd.h&gt;		/* For NR_syscalls definition */</div><div class='ctx'> #include &lt;asm/arcregs.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;	/* For VMALLOC_START */</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------</div><div class='del'>- * given a tsk struct, get to the base of it's kernel mode stack</div><div class='add'>+ * given a tsk struct, get to the base of its kernel mode stack</div><div class='ctx'>  * tsk-&gt;thread_info is really a PAGE, whose bottom hoists stack</div><div class='ctx'>  * which grows upwards towards thread_info</div><div class='ctx'>  *------------------------------------------------------------*/</div><div class='head'>diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h<br/>index c574712ad865..9cd79263acba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/irq.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/irq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/irq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/irq.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'>  * ARCv2 can support 240 interrupts in the core interrupts controllers and</div><div class='ctx'>  * 128 interrupts in IDU. Thus 512 virtual IRQs must be enough for most</div><div class='ctx'>  * configurations of boards.</div><div class='del'>- * This doesnt affect ARCompact, but we change it to same value</div><div class='add'>+ * This doesn't affect ARCompact, but we change it to same value</div><div class='ctx'>  */</div><div class='ctx'> #define NR_IRQS		512</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/irqflags-compact.h b/arch/arc/include/asm/irqflags-compact.h<br/>index 0d63e568d64c..936a2f21f315 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/irqflags-compact.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/irqflags-compact.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/irqflags-compact.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/irqflags-compact.h</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'>  * IRQ Control Macros</div><div class='ctx'>  *</div><div class='ctx'>  * All of them have "memory" clobber (compiler barrier) which is needed to</div><div class='del'>- * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)</div><div class='add'>+ * ensure that LD/ST requiring irq safety (R-M-W when LLSC is not available)</div><div class='ctx'>  * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)</div><div class='ctx'>  *</div><div class='ctx'>  * Noted at the time of Abilis Timer List corruption</div><div class='head'>diff --git a/arch/arc/include/asm/mmu_context.h b/arch/arc/include/asm/mmu_context.h<br/>index dda471f5f05b..9963bb1a5733 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/mmu_context.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -165,7 +165,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,</div><div class='ctx'>  * for retiring-mm. However destroy_context( ) still needs to do that because</div><div class='ctx'>  * between mm_release( ) = &gt;deactive_mm( ) and</div><div class='ctx'>  * mmput =&gt; .. =&gt; __mmdrop( ) =&gt; destroy_context( )</div><div class='del'>- * there is a good chance that task gets sched-out/in, making it's ASID valid</div><div class='add'>+ * there is a good chance that task gets sched-out/in, making its ASID valid</div><div class='ctx'>  * again (this teased me for a whole day).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/pgtable-bits-arcv2.h b/arch/arc/include/asm/pgtable-bits-arcv2.h<br/>index f3eea3f30b2e..8ebec1b21d24 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/pgtable-bits-arcv2.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/pgtable-bits-arcv2.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/pgtable-bits-arcv2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/pgtable-bits-arcv2.h</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'>  * Other rules which cause the divergence from 1:1 mapping</div><div class='ctx'>  *</div><div class='ctx'>  *  1. Although ARC700 can do exclusive execute/write protection (meaning R</div><div class='del'>- *     can be tracked independet of X/W unlike some other CPUs), still to</div><div class='add'>+ *     can be tracked independently of X/W unlike some other CPUs), still to</div><div class='ctx'>  *     keep things consistent with other archs:</div><div class='ctx'>  *      -Write implies Read:   W =&gt; R</div><div class='ctx'>  *      -Execute implies Read: X =&gt; R</div><div class='head'>diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h<br/>index 00b9318e551e..cf79df0b2570 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/ptrace.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/ptrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -169,7 +169,7 @@ static inline unsigned long regs_get_register(struct pt_regs *regs,</div><div class='ctx'> 	return *(unsigned long *)((unsigned long)regs + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern int syscall_trace_entry(struct pt_regs *);</div><div class='add'>+extern int syscall_trace_enter(struct pt_regs *);</div><div class='ctx'> extern void syscall_trace_exit(struct pt_regs *);</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='head'>diff --git a/arch/arc/include/asm/shmparam.h b/arch/arc/include/asm/shmparam.h<br/>index 8b0251464ffd..719112af0f41 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/shmparam.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/shmparam.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/shmparam.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/shmparam.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef __ARC_ASM_SHMPARAM_H</div><div class='ctx'> #define __ARC_ASM_SHMPARAM_H</div><div class='ctx'> </div><div class='del'>-/* Handle upto 2 cache bins */</div><div class='add'>+/* Handle up to 2 cache bins */</div><div class='ctx'> #define	SHMLBA	(2 * PAGE_SIZE)</div><div class='ctx'> </div><div class='ctx'> /* Enforce SHMLBA in shmat */</div><div class='head'>diff --git a/arch/arc/include/asm/smp.h b/arch/arc/include/asm/smp.h<br/>index e0913f52c2cd..990f834909f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/smp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/smp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/smp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/smp.h</a></div><div class='hunk'>@@ -77,7 +77,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ARC700 doesn't support atomic Read-Modify-Write ops.</div><div class='del'>- * Originally Interrupts had to be disabled around code to gaurantee atomicity.</div><div class='add'>+ * Originally Interrupts had to be disabled around code to guarantee atomicity.</div><div class='ctx'>  * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops</div><div class='ctx'>  * based on retry-if-irq-in-atomic (with hardware assist).</div><div class='ctx'>  * However despite these, we provide the IRQ disabling variant</div><div class='hunk'>@@ -86,7 +86,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)</div><div class='ctx'>  *	support needed.</div><div class='ctx'>  *</div><div class='ctx'>  * (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be</div><div class='del'>- *	gaurantted by the platform (not something which core handles).</div><div class='add'>+ *	guaranteed by the platform (not something which core handles).</div><div class='ctx'>  *	Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ</div><div class='ctx'>  *	disabling for atomicity.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arc/include/asm/thread_info.h b/arch/arc/include/asm/thread_info.h<br/>index 4c530cf131f3..12daaf3a61ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/asm/thread_info.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/asm/thread_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> struct thread_info {</div><div class='ctx'> 	unsigned long flags;		/* low level flags */</div><div class='ctx'> 	unsigned long ksp;		/* kernel mode stack top in __switch_to */</div><div class='del'>-	int preempt_count;		/* 0 =&gt; preemptable, &lt;0 =&gt; BUG */</div><div class='add'>+	int preempt_count;		/* 0 =&gt; preemptible, &lt;0 =&gt; BUG */</div><div class='ctx'> 	int cpu;			/* current CPU */</div><div class='ctx'> 	unsigned long thr_ptr;		/* TLS ptr */</div><div class='ctx'> 	struct task_struct *task;	/* main task structure */</div><div class='head'>diff --git a/arch/arc/include/uapi/asm/swab.h b/arch/arc/include/uapi/asm/swab.h<br/>index 02109cd48ee1..8d1f1ef44ba7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/include/uapi/asm/swab.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/include/uapi/asm/swab.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/include/uapi/asm/swab.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/include/uapi/asm/swab.h</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'>  * 8051fdc4:	st     r2,[r1,20]	; Mem op : save result back to mem</div><div class='ctx'>  *</div><div class='ctx'>  * Joern suggested a better "C" algorithm which is great since</div><div class='del'>- * (1) It is portable to any architecure</div><div class='add'>+ * (1) It is portable to any architecture</div><div class='ctx'>  * (2) At the same time it takes advantage of ARC ISA (rotate intrns)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S<br/>index 2e49c81c8086..e238b5fd3c8c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/entry-arcv2.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/entry-arcv2.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/entry-arcv2.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/entry-arcv2.S</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/linkage.h&gt;   /* ARC_{EXTRY,EXIT} */</div><div class='add'>+#include &lt;linux/linkage.h&gt;   /* ARC_{ENTRY,EXIT} */</div><div class='ctx'> #include &lt;asm/entry.h&gt;       /* SAVE_ALL_{INT1,INT2,TRAP...} */</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/arcregs.h&gt;</div><div class='hunk'>@@ -31,7 +31,7 @@ VECTOR	res_service		; Reset Vector</div><div class='ctx'> VECTOR	mem_service		; Mem exception</div><div class='ctx'> VECTOR	instr_service		; Instrn Error</div><div class='ctx'> VECTOR	EV_MachineCheck		; Fatal Machine check</div><div class='del'>-VECTOR	EV_TLBMissI		; Intruction TLB miss</div><div class='add'>+VECTOR	EV_TLBMissI		; Instruction TLB miss</div><div class='ctx'> VECTOR	EV_TLBMissD		; Data TLB miss</div><div class='ctx'> VECTOR	EV_TLBProtV		; Protection Violation</div><div class='ctx'> VECTOR	EV_PrivilegeV		; Privilege Violation</div><div class='hunk'>@@ -76,11 +76,11 @@ ENTRY(handle_interrupt)</div><div class='ctx'> 	# query in hard ISR path would return false (since .IE is set) which would</div><div class='ctx'> 	# trips genirq interrupt handling asserts.</div><div class='ctx'> 	#</div><div class='del'>-	# So do a "soft" disable of interrutps here.</div><div class='add'>+	# So do a "soft" disable of interrupts here.</div><div class='ctx'> 	#</div><div class='ctx'> 	# Note this disable is only for consistent book-keeping as further interrupts</div><div class='ctx'> 	# will be disabled anyways even w/o this. Hardware tracks active interrupts</div><div class='del'>-	# seperately in AUX_IRQ_ACT.active and will not take new interrupts</div><div class='add'>+	# separately in AUX_IRQ_ACT.active and will not take new interrupts</div><div class='ctx'> 	# unless this one returns (or higher prio becomes pending in 2-prio scheme)</div><div class='ctx'> </div><div class='ctx'> 	IRQ_DISABLE</div><div class='head'>diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S<br/>index 089f6680518f..3c7e74aba679 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/entry.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/entry.S</a></div><div class='hunk'>@@ -95,7 +95,7 @@ ENTRY(EV_MachineCheck)</div><div class='ctx'> 	lr  r0, [efa]</div><div class='ctx'> 	mov r1, sp</div><div class='ctx'> </div><div class='del'>-	; MC excpetions disable MMU</div><div class='add'>+	; MC exceptions disable MMU</div><div class='ctx'> 	ARC_MMU_REENABLE r3</div><div class='ctx'> </div><div class='ctx'> 	lsr  	r3, r10, 8</div><div class='hunk'>@@ -209,7 +209,7 @@ trap_with_param:</div><div class='ctx'> </div><div class='ctx'> ; ---------------------------------------------</div><div class='ctx'> ; syscall TRAP</div><div class='del'>-; ABI: (r0-r7) upto 8 args, (r8) syscall number</div><div class='add'>+; ABI: (r0-r7) up to 8 args, (r8) syscall number</div><div class='ctx'> ; ---------------------------------------------</div><div class='ctx'> </div><div class='ctx'> ENTRY(EV_Trap)</div><div class='head'>diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S<br/>index 9152782444b5..8d541f53fae3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/head.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/head.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/head.S</a></div><div class='hunk'>@@ -165,7 +165,7 @@ ENTRY(first_lines_of_secondary)</div><div class='ctx'> 	; setup stack (fp, sp)</div><div class='ctx'> 	mov	fp, 0</div><div class='ctx'> </div><div class='del'>-	; set it's stack base to tsk-&gt;thread_info bottom</div><div class='add'>+	; set its stack base to tsk-&gt;thread_info bottom</div><div class='ctx'> 	GET_TSK_STACK_BASE r0, sp</div><div class='ctx'> </div><div class='ctx'> 	j	start_kernel_secondary</div><div class='head'>diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c<br/>index 678898757e47..f324f0e3341a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/intc-arcv2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/intc-arcv2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/intc-arcv2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/intc-arcv2.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ void arc_init_IRQ(void)</div><div class='ctx'> 	WRITE_AUX(AUX_IRQ_CTRL, ictrl);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * ARCv2 core intc provides multiple interrupt priorities (upto 16).</div><div class='add'>+	 * ARCv2 core intc provides multiple interrupt priorities (up to 16).</div><div class='ctx'> 	 * Typical builds though have only two levels (0-high, 1-low)</div><div class='ctx'> 	 * Linux by default uses lower prio 1 for most irqs, reserving 0 for</div><div class='ctx'> 	 * NMI style interrupts in future (say perf)</div><div class='head'>diff --git a/arch/arc/kernel/kprobes.c b/arch/arc/kernel/kprobes.c<br/>index e71d64119d71..f8e2960832d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/kprobes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/kprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/kprobes.c</a></div><div class='hunk'>@@ -190,7 +190,8 @@ static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)</div><div class='add'>+static int</div><div class='add'>+__kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct kprobe *p;</div><div class='ctx'> 	struct kprobe_ctlblk *kcb;</div><div class='hunk'>@@ -241,8 +242,8 @@ int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __kprobes arc_post_kprobe_handler(unsigned long addr,</div><div class='del'>-					 struct pt_regs *regs)</div><div class='add'>+static int</div><div class='add'>+__kprobes arc_post_kprobe_handler(unsigned long addr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct kprobe *cur = kprobe_running();</div><div class='ctx'> 	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();</div><div class='head'>diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c<br/>index adff957962da..6e5a651cd75c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/perf_event.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/perf_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/perf_event.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'>  * (based on a specific RTL build)</div><div class='ctx'>  * Below is the static map between perf generic/arc specific event_id and</div><div class='ctx'>  * h/w condition names.</div><div class='del'>- * At the time of probe, we loop thru each index and find it's name to</div><div class='add'>+ * At the time of probe, we loop thru each index and find its name to</div><div class='ctx'>  * complete the mapping of perf event_id to h/w index as latter is needed</div><div class='ctx'>  * to program the counter really</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c<br/>index d08a5092c2b4..7b6a9beba9db 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/setup.c</a></div><div class='hunk'>@@ -390,7 +390,7 @@ static void arc_chk_core_config(struct cpuinfo_arc *info)</div><div class='ctx'> #ifdef CONFIG_ARC_HAS_DCCM</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * DCCM can be arbit placed in hardware.</div><div class='del'>-	 * Make sure it's placement/sz matches what Linux is built with</div><div class='add'>+	 * Make sure its placement/sz matches what Linux is built with</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((unsigned int)__arc_dccm_base != info-&gt;dccm.base)</div><div class='ctx'> 		panic("Linux built with incorrect DCCM Base address\n");</div><div class='head'>diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c<br/>index 8f6f4a542964..fefa705a8638 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/signal.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/signal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/signal.c</a></div><div class='hunk'>@@ -8,15 +8,16 @@</div><div class='ctx'>  *</div><div class='ctx'>  * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)</div><div class='ctx'>  *  -do_signal() supports TIF_RESTORE_SIGMASK</div><div class='del'>- *  -do_signal() no loner needs oldset, required by OLD sys_sigsuspend</div><div class='del'>- *  -sys_rt_sigsuspend() now comes from generic code, so discard arch implemen</div><div class='add'>+ *  -do_signal() no longer needs oldset, required by OLD sys_sigsuspend</div><div class='add'>+ *  -sys_rt_sigsuspend() now comes from generic code, so discard arch</div><div class='add'>+ *   implementation</div><div class='ctx'>  *  -sys_sigsuspend() no longer needs to fudge ptregs, hence that arg removed</div><div class='ctx'>  *  -sys_sigsuspend() no longer loops for do_signal(), sets TIF_xxx and leaves</div><div class='ctx'>  *   the job to do_signal()</div><div class='ctx'>  *</div><div class='ctx'>  * vineetg: July 2009</div><div class='ctx'>  *  -Modified Code to support the uClibc provided userland sigreturn stub</div><div class='del'>- *   to avoid kernel synthesing it on user stack at runtime, costing TLB</div><div class='add'>+ *   to avoid kernel synthesizing it on user stack at runtime, costing TLB</div><div class='ctx'>  *   probes and Cache line flushes.</div><div class='ctx'>  *</div><div class='ctx'>  * vineetg: July 2009</div><div class='head'>diff --git a/arch/arc/kernel/traps.c b/arch/arc/kernel/traps.c<br/>index 9b9570b79362..a19751e824fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/traps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/traps.c</a></div><div class='hunk'>@@ -89,7 +89,7 @@ int do_misaligned_access(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Entry point for miscll errors such as Nested Exceptions</div><div class='del'>- *  -Duplicate TLB entry is handled seperately though</div><div class='add'>+ *  -Duplicate TLB entry is handled separately though</div><div class='ctx'>  */</div><div class='ctx'> void do_machine_check_fault(unsigned long address, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arc/kernel/vmlinux.lds.S b/arch/arc/kernel/vmlinux.lds.S<br/>index 549c3f407918..61a1b2b96e1d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -41,8 +41,8 @@ SECTIONS</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * The reason for having a seperate subsection .init.ramfs is to</div><div class='del'>-	 * prevent objump from including it in kernel dumps</div><div class='add'>+	 * The reason for having a separate subsection .init.ramfs is to</div><div class='add'>+	 * prevent objdump from including it in kernel dumps</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Reason for having .init.ramfs above .init is to make sure that the</div><div class='ctx'> 	 * binary blob is tucked away to one side, reducing the displacement</div><div class='head'>diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c<br/>index ad702b49aeb3..cae4a7aae0ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/mm/tlb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/mm/tlb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/mm/tlb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/mm/tlb.c</a></div><div class='hunk'>@@ -212,7 +212,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* If range @start to @end is more than 32 TLB entries deep,</div><div class='del'>-	 * its better to move to a new ASID rather than searching for</div><div class='add'>+	 * it's better to move to a new ASID rather than searching for</div><div class='ctx'> 	 * individual entries and then shooting them down</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * The calc above is rough, doesn't account for unaligned parts,</div><div class='hunk'>@@ -408,7 +408,7 @@ static void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *p</div><div class='ctx'> 	 * -More importantly it makes this handler inconsistent with fast-path</div><div class='ctx'> 	 *  TLB Refill handler which always deals with "current"</div><div class='ctx'> 	 *</div><div class='del'>-	 * Lets see the use cases when current-&gt;mm != vma-&gt;mm and we land here</div><div class='add'>+	 * Let's see the use cases when current-&gt;mm != vma-&gt;mm and we land here</div><div class='ctx'> 	 *  1. execve-&gt;copy_strings()-&gt;__get_user_pages-&gt;handle_mm_fault</div><div class='ctx'> 	 *     Here VM wants to pre-install a TLB entry for user stack while</div><div class='ctx'> 	 *     current-&gt;mm still points to pre-execve mm (hence the condition).</div><div class='head'>diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S<br/>index e054780a8fe0..dc65e87a531f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/mm/tlbex.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arc/mm/tlbex.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/mm/tlbex.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/mm/tlbex.S</a></div><div class='hunk'>@@ -5,19 +5,19 @@</div><div class='ctx'>  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  *</div><div class='ctx'>  * Vineetg: April 2011 :</div><div class='del'>- *  -MMU v1: moved out legacy code into a seperate file</div><div class='add'>+ *  -MMU v1: moved out legacy code into a separate file</div><div class='ctx'>  *  -MMU v3: PD{0,1} bits layout changed: They don't overlap anymore,</div><div class='ctx'>  *      helps avoid a shift when preparing PD0 from PTE</div><div class='ctx'>  *</div><div class='ctx'>  * Vineetg: July 2009</div><div class='del'>- *  -For MMU V2, we need not do heuristics at the time of commiting a D-TLB</div><div class='del'>- *   entry, so that it doesn't knock out it's I-TLB entry</div><div class='add'>+ *  -For MMU V2, we need not do heuristics at the time of committing a D-TLB</div><div class='add'>+ *   entry, so that it doesn't knock out its I-TLB entry</div><div class='ctx'>  *  -Some more fine tuning:</div><div class='ctx'>  *   bmsk instead of add, asl.cc instead of branch, delay slot utilise etc</div><div class='ctx'>  *</div><div class='ctx'>  * Vineetg: July 2009</div><div class='ctx'>  *  -Practically rewrote the I/D TLB Miss handlers</div><div class='del'>- *   Now 40 and 135 instructions a peice as compared to 131 and 449 resp.</div><div class='add'>+ *   Now 40 and 135 instructions apiece as compared to 131 and 449 resp.</div><div class='ctx'>  *   Hence Leaner by 1.5 K</div><div class='ctx'>  *   Used Conditional arithmetic to replace excessive branching</div><div class='ctx'>  *   Also used short instructions wherever possible</div><div class='head'>diff --git a/arch/arc/net/Makefile b/arch/arc/net/Makefile<br/>new file mode 100644<br/>index 000000000000..ea5790952e9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/net/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/net/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+ifeq ($(CONFIG_ISA_ARCV2),y)</div><div class='add'>+	obj-$(CONFIG_BPF_JIT) += bpf_jit_core.o</div><div class='add'>+	obj-$(CONFIG_BPF_JIT) += bpf_jit_arcv2.o</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/arc/net/bpf_jit.h b/arch/arc/net/bpf_jit.h<br/>new file mode 100644<br/>index 000000000000..ec44873c42d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/net/bpf_jit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/net/bpf_jit.h</a></div><div class='hunk'>@@ -0,0 +1,164 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * The interface that a back-end should provide to bpf_jit_core.c.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Synopsys Inc.</div><div class='add'>+ * Author: Shahab Vahedi &lt;shahab@synopsys.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ARC_BPF_JIT_H</div><div class='add'>+#define _ARC_BPF_JIT_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+</div><div class='add'>+/* Print debug info and assert. */</div><div class='add'>+//#define ARC_BPF_JIT_DEBUG</div><div class='add'>+</div><div class='add'>+/* Determine the address type of the target. */</div><div class='add'>+#ifdef CONFIG_ISA_ARCV2</div><div class='add'>+#define ARC_ADDR u32</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For the translation of some BPF instructions, a temporary register</div><div class='add'>+ * might be needed for some interim data.</div><div class='add'>+ */</div><div class='add'>+#define JIT_REG_TMP MAX_BPF_JIT_REG</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Buffer access: If buffer "b" is not NULL, advance by "n" bytes.</div><div class='add'>+ *</div><div class='add'>+ * This macro must be used in any place that potentially requires a</div><div class='add'>+ * "buf + len". This way, we make sure that the "buf" argument for</div><div class='add'>+ * the underlying "arc_*(buf, ...)" ends up as NULL instead of something</div><div class='add'>+ * like "0+4" or "0+8", etc. Those "arc_*()" functions check their "buf"</div><div class='add'>+ * value to decide if instructions should be emitted or not.</div><div class='add'>+ */</div><div class='add'>+#define BUF(b, n) (((b) != NULL) ? ((b) + (n)) : (b))</div><div class='add'>+</div><div class='add'>+/************** Functions that the back-end must provide **************/</div><div class='add'>+/* Extension for 32-bit operations. */</div><div class='add'>+inline u8 zext(u8 *buf, u8 rd);</div><div class='add'>+/***** Moves *****/</div><div class='add'>+u8 mov_r32(u8 *buf, u8 rd, u8 rs, u8 sign_ext);</div><div class='add'>+u8 mov_r32_i32(u8 *buf, u8 reg, s32 imm);</div><div class='add'>+u8 mov_r64(u8 *buf, u8 rd, u8 rs, u8 sign_ext);</div><div class='add'>+u8 mov_r64_i32(u8 *buf, u8 reg, s32 imm);</div><div class='add'>+u8 mov_r64_i64(u8 *buf, u8 reg, u32 lo, u32 hi);</div><div class='add'>+/***** Loads and stores *****/</div><div class='add'>+u8 load_r(u8 *buf, u8 rd, u8 rs, s16 off, u8 size, bool sign_ext);</div><div class='add'>+u8 store_r(u8 *buf, u8 rd, u8 rs, s16 off, u8 size);</div><div class='add'>+u8 store_i(u8 *buf, s32 imm, u8 rd, s16 off, u8 size);</div><div class='add'>+/***** Addition *****/</div><div class='add'>+u8 add_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 add_r32_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+u8 add_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 add_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Subtraction *****/</div><div class='add'>+u8 sub_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 sub_r32_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+u8 sub_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 sub_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Multiplication *****/</div><div class='add'>+u8 mul_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 mul_r32_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+u8 mul_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 mul_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Division *****/</div><div class='add'>+u8 div_r32(u8 *buf, u8 rd, u8 rs, bool sign_ext);</div><div class='add'>+u8 div_r32_i32(u8 *buf, u8 rd, s32 imm, bool sign_ext);</div><div class='add'>+/***** Remainder *****/</div><div class='add'>+u8 mod_r32(u8 *buf, u8 rd, u8 rs, bool sign_ext);</div><div class='add'>+u8 mod_r32_i32(u8 *buf, u8 rd, s32 imm, bool sign_ext);</div><div class='add'>+/***** Bitwise AND *****/</div><div class='add'>+u8 and_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 and_r32_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+u8 and_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 and_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Bitwise OR *****/</div><div class='add'>+u8 or_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 or_r32_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+u8 or_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 or_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Bitwise XOR *****/</div><div class='add'>+u8 xor_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 xor_r32_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+u8 xor_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 xor_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Bitwise Negate *****/</div><div class='add'>+u8 neg_r32(u8 *buf, u8 r);</div><div class='add'>+u8 neg_r64(u8 *buf, u8 r);</div><div class='add'>+/***** Bitwise left shift *****/</div><div class='add'>+u8 lsh_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 lsh_r32_i32(u8 *buf, u8 rd, u8 imm);</div><div class='add'>+u8 lsh_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 lsh_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Bitwise right shift (logical) *****/</div><div class='add'>+u8 rsh_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 rsh_r32_i32(u8 *buf, u8 rd, u8 imm);</div><div class='add'>+u8 rsh_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 rsh_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Bitwise right shift (arithmetic) *****/</div><div class='add'>+u8 arsh_r32(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 arsh_r32_i32(u8 *buf, u8 rd, u8 imm);</div><div class='add'>+u8 arsh_r64(u8 *buf, u8 rd, u8 rs);</div><div class='add'>+u8 arsh_r64_i32(u8 *buf, u8 rd, s32 imm);</div><div class='add'>+/***** Frame related *****/</div><div class='add'>+u32 mask_for_used_regs(u8 bpf_reg, bool is_call);</div><div class='add'>+u8 arc_prologue(u8 *buf, u32 usage, u16 frame_size);</div><div class='add'>+u8 arc_epilogue(u8 *buf, u32 usage, u16 frame_size);</div><div class='add'>+/***** Jumps *****/</div><div class='add'>+/*</div><div class='add'>+ * Different sorts of conditions (ARC enum as opposed to BPF_*).</div><div class='add'>+ *</div><div class='add'>+ * Do not change the order of enums here. ARC_CC_SLE+1 is used</div><div class='add'>+ * to determine the number of JCCs.</div><div class='add'>+ */</div><div class='add'>+enum ARC_CC {</div><div class='add'>+	ARC_CC_UGT = 0,		/* unsigned &gt;  */</div><div class='add'>+	ARC_CC_UGE,		/* unsigned &gt;= */</div><div class='add'>+	ARC_CC_ULT,		/* unsigned &lt;  */</div><div class='add'>+	ARC_CC_ULE,		/* unsigned &lt;= */</div><div class='add'>+	ARC_CC_SGT,		/*   signed &gt;  */</div><div class='add'>+	ARC_CC_SGE,		/*   signed &gt;= */</div><div class='add'>+	ARC_CC_SLT,		/*   signed &lt;  */</div><div class='add'>+	ARC_CC_SLE,		/*   signed &lt;= */</div><div class='add'>+	ARC_CC_AL,		/* always      */</div><div class='add'>+	ARC_CC_EQ,		/*          == */</div><div class='add'>+	ARC_CC_NE,		/*          != */</div><div class='add'>+	ARC_CC_SET,		/* test        */</div><div class='add'>+	ARC_CC_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A few notes:</div><div class='add'>+ *</div><div class='add'>+ * - check_jmp_*() are prerequisites before calling the gen_jmp_*().</div><div class='add'>+ *   They return "true" if the jump is possible and "false" otherwise.</div><div class='add'>+ *</div><div class='add'>+ * - The notion of "*_off" is to emphasize that these parameters are</div><div class='add'>+ *   merely offsets in the JIT stream and not absolute addresses. One</div><div class='add'>+ *   can look at them as addresses if the JIT code would start from</div><div class='add'>+ *   address 0x0000_0000. Nonetheless, since the buffer address for the</div><div class='add'>+ *   JIT is on a word-aligned address, this works and actually makes</div><div class='add'>+ *   things simpler (offsets are in the range of u32 which is more than</div><div class='add'>+ *   enough).</div><div class='add'>+ */</div><div class='add'>+bool check_jmp_32(u32 curr_off, u32 targ_off, u8 cond);</div><div class='add'>+bool check_jmp_64(u32 curr_off, u32 targ_off, u8 cond);</div><div class='add'>+u8 gen_jmp_32(u8 *buf, u8 rd, u8 rs, u8 cond, u32 c_off, u32 t_off);</div><div class='add'>+u8 gen_jmp_64(u8 *buf, u8 rd, u8 rs, u8 cond, u32 c_off, u32 t_off);</div><div class='add'>+/***** Miscellaneous *****/</div><div class='add'>+u8 gen_func_call(u8 *buf, ARC_ADDR func_addr, bool external_func);</div><div class='add'>+u8 arc_to_bpf_return(u8 *buf);</div><div class='add'>+/*</div><div class='add'>+ * - Perform byte swaps on "rd" based on the "size".</div><div class='add'>+ * - If "force" is set, do it unconditionally. Otherwise, consider the</div><div class='add'>+ *   desired "endian"ness and the host endianness.</div><div class='add'>+ * - For data "size"s up to 32 bits, perform a zero-extension if asked</div><div class='add'>+ *   by the "do_zext" boolean.</div><div class='add'>+ */</div><div class='add'>+u8 gen_swap(u8 *buf, u8 rd, u8 size, u8 endian, bool force, bool do_zext);</div><div class='add'>+</div><div class='add'>+#endif /* _ARC_BPF_JIT_H */</div><div class='head'>diff --git a/arch/arc/net/bpf_jit_arcv2.c b/arch/arc/net/bpf_jit_arcv2.c<br/>new file mode 100644<br/>index 000000000000..31bfb6e9ce00<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/net/bpf_jit_arcv2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/net/bpf_jit_arcv2.c</a></div><div class='hunk'>@@ -0,0 +1,3005 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * The ARCv2 backend of Just-In-Time compiler for eBPF bytecode.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Synopsys Inc.</div><div class='add'>+ * Author: Shahab Vahedi &lt;shahab@synopsys.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include "bpf_jit.h"</div><div class='add'>+</div><div class='add'>+/* ARC core registers. */</div><div class='add'>+enum {</div><div class='add'>+	ARC_R_0,  ARC_R_1,  ARC_R_2,  ARC_R_3,  ARC_R_4,  ARC_R_5,</div><div class='add'>+	ARC_R_6,  ARC_R_7,  ARC_R_8,  ARC_R_9,  ARC_R_10, ARC_R_11,</div><div class='add'>+	ARC_R_12, ARC_R_13, ARC_R_14, ARC_R_15, ARC_R_16, ARC_R_17,</div><div class='add'>+	ARC_R_18, ARC_R_19, ARC_R_20, ARC_R_21, ARC_R_22, ARC_R_23,</div><div class='add'>+	ARC_R_24, ARC_R_25, ARC_R_26, ARC_R_FP, ARC_R_SP, ARC_R_ILINK,</div><div class='add'>+	ARC_R_30, ARC_R_BLINK,</div><div class='add'>+	/*</div><div class='add'>+	 * Having ARC_R_IMM encoded as source register means there is an</div><div class='add'>+	 * immediate that must be interpreted from the next 4 bytes. If</div><div class='add'>+	 * encoded as the destination register though, it implies that the</div><div class='add'>+	 * output of the operation is not assigned to any register. The</div><div class='add'>+	 * latter is helpful if we only care about updating the CPU status</div><div class='add'>+	 * flags.</div><div class='add'>+	 */</div><div class='add'>+	ARC_R_IMM = 62</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Remarks about the rationale behind the chosen mapping:</div><div class='add'>+ *</div><div class='add'>+ * - BPF_REG_{1,2,3,4} are the argument registers and must be mapped to</div><div class='add'>+ *   argument registers in ARCv2 ABI: r0-r7. The r7 registers is the last</div><div class='add'>+ *   argument register in the ABI. Therefore BPF_REG_5, as the fifth</div><div class='add'>+ *   argument, must be pushed onto the stack. This is a must for calling</div><div class='add'>+ *   in-kernel functions.</div><div class='add'>+ *</div><div class='add'>+ * - In ARCv2 ABI, the return value is in r0 for 32-bit results and (r1,r0)</div><div class='add'>+ *   for 64-bit results. However, because they're already used for BPF_REG_1,</div><div class='add'>+ *   the next available scratch registers, r8 and r9, are the best candidates</div><div class='add'>+ *   for BPF_REG_0. After a "call" to a(n) (in-kernel) function, the result</div><div class='add'>+ *   is "mov"ed to these registers. At a BPF_EXIT, their value is "mov"ed to</div><div class='add'>+ *   (r1,r0).</div><div class='add'>+ *   It is worth mentioning that scratch registers are the best choice for</div><div class='add'>+ *   BPF_REG_0, because it is very popular in BPF instruction encoding.</div><div class='add'>+ *</div><div class='add'>+ * - JIT_REG_TMP is an artifact needed to translate some BPF instructions.</div><div class='add'>+ *   Its life span is one single BPF instruction. Since during the</div><div class='add'>+ *   analyze_reg_usage(), it is not known if temporary registers are used,</div><div class='add'>+ *   it is mapped to ARC's scratch registers: r10 and r11. Therefore, they</div><div class='add'>+ *   don't matter in analysing phase and don't need saving. This temporary</div><div class='add'>+ *   register is added as yet another index in the bpf2arc array, so it will</div><div class='add'>+ *   unfold like the rest of registers during the code generation process.</div><div class='add'>+ *</div><div class='add'>+ * - Mapping of callee-saved BPF registers, BPF_REG_{6,7,8,9}, starts from</div><div class='add'>+ *   (r15,r14) register pair. The (r13,r12) is not a good choice, because</div><div class='add'>+ *   in ARCv2 ABI, r12 is not a callee-saved register and this can cause</div><div class='add'>+ *   problem when calling an in-kernel function. Theoretically, the mapping</div><div class='add'>+ *   could start from (r14,r13), but it is not a conventional ARCv2 register</div><div class='add'>+ *   pair. To have a future proof design, I opted for this arrangement.</div><div class='add'>+ *   If/when we decide to add ARCv2 instructions that do use register pairs,</div><div class='add'>+ *   the mapping, hopefully, doesn't need to be revisited.</div><div class='add'>+ */</div><div class='add'>+const u8 bpf2arc[][2] = {</div><div class='add'>+	/* Return value from in-kernel function, and exit value from eBPF */</div><div class='add'>+	[BPF_REG_0] = {ARC_R_8, ARC_R_9},</div><div class='add'>+	/* Arguments from eBPF program to in-kernel function */</div><div class='add'>+	[BPF_REG_1] = {ARC_R_0, ARC_R_1},</div><div class='add'>+	[BPF_REG_2] = {ARC_R_2, ARC_R_3},</div><div class='add'>+	[BPF_REG_3] = {ARC_R_4, ARC_R_5},</div><div class='add'>+	[BPF_REG_4] = {ARC_R_6, ARC_R_7},</div><div class='add'>+	/* Remaining arguments, to be passed on the stack per 32-bit ABI */</div><div class='add'>+	[BPF_REG_5] = {ARC_R_22, ARC_R_23},</div><div class='add'>+	/* Callee-saved registers that in-kernel function will preserve */</div><div class='add'>+	[BPF_REG_6] = {ARC_R_14, ARC_R_15},</div><div class='add'>+	[BPF_REG_7] = {ARC_R_16, ARC_R_17},</div><div class='add'>+	[BPF_REG_8] = {ARC_R_18, ARC_R_19},</div><div class='add'>+	[BPF_REG_9] = {ARC_R_20, ARC_R_21},</div><div class='add'>+	/* Read-only frame pointer to access the eBPF stack. 32-bit only. */</div><div class='add'>+	[BPF_REG_FP] = {ARC_R_FP, },</div><div class='add'>+	/* Register for blinding constants */</div><div class='add'>+	[BPF_REG_AX] = {ARC_R_24, ARC_R_25},</div><div class='add'>+	/* Temporary registers for internal use */</div><div class='add'>+	[JIT_REG_TMP] = {ARC_R_10, ARC_R_11}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ARC_CALLEE_SAVED_REG_FIRST ARC_R_13</div><div class='add'>+#define ARC_CALLEE_SAVED_REG_LAST  ARC_R_25</div><div class='add'>+</div><div class='add'>+#define REG_LO(r) (bpf2arc[(r)][0])</div><div class='add'>+#define REG_HI(r) (bpf2arc[(r)][1])</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * To comply with ARCv2 ABI, BPF's arg5 must be put on stack. After which,</div><div class='add'>+ * the stack needs to be restored by ARG5_SIZE.</div><div class='add'>+ */</div><div class='add'>+#define ARG5_SIZE 8</div><div class='add'>+</div><div class='add'>+/* Instruction lengths in bytes. */</div><div class='add'>+enum {</div><div class='add'>+	INSN_len_normal = 4,	/* Normal instructions length. */</div><div class='add'>+	INSN_len_imm = 4	/* Length of an extra 32-bit immediate. */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ZZ defines the size of operation in encodings that it is used. */</div><div class='add'>+enum {</div><div class='add'>+	ZZ_1_byte = 1,</div><div class='add'>+	ZZ_2_byte = 2,</div><div class='add'>+	ZZ_4_byte = 0,</div><div class='add'>+	ZZ_8_byte = 3</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * AA is mostly about address write back mode. It determines if the</div><div class='add'>+ * address in question should be updated before usage or after:</div><div class='add'>+ *   addr += offset; data = *addr;</div><div class='add'>+ *   data = *addr; addr += offset;</div><div class='add'>+ *</div><div class='add'>+ * In "scaling" mode, the effective address will become the sum</div><div class='add'>+ * of "address" + "index"*"size". The "size" is specified by the</div><div class='add'>+ * "ZZ" field. There is no write back when AA is set for scaling:</div><div class='add'>+ *   data = *(addr + offset&lt;&lt;zz)</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	AA_none  = 0,</div><div class='add'>+	AA_pre   = 1,	/* in assembly known as "a/aw". */</div><div class='add'>+	AA_post  = 2,	/* in assembly known as "ab". */</div><div class='add'>+	AA_scale = 3	/* in assembly known as "as". */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* X flag determines the mode of extension. */</div><div class='add'>+enum {</div><div class='add'>+	X_zero = 0,</div><div class='add'>+	X_sign = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Condition codes. */</div><div class='add'>+enum {</div><div class='add'>+	CC_always     = 0,	/* condition is true all the time */</div><div class='add'>+	CC_equal      = 1,	/* if status32.z flag is set */</div><div class='add'>+	CC_unequal    = 2,	/* if status32.z flag is clear */</div><div class='add'>+	CC_positive   = 3,	/* if status32.n flag is clear */</div><div class='add'>+	CC_negative   = 4,	/* if status32.n flag is set */</div><div class='add'>+	CC_less_u     = 5,	/* less than (unsigned) */</div><div class='add'>+	CC_less_eq_u  = 14,	/* less than or equal (unsigned) */</div><div class='add'>+	CC_great_eq_u = 6,	/* greater than or equal (unsigned) */</div><div class='add'>+	CC_great_u    = 13,	/* greater than (unsigned) */</div><div class='add'>+	CC_less_s     = 11,	/* less than (signed) */</div><div class='add'>+	CC_less_eq_s  = 12,	/* less than or equal (signed) */</div><div class='add'>+	CC_great_eq_s = 10,	/* greater than or equal (signed) */</div><div class='add'>+	CC_great_s    = 9	/* greater than (signed) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IN_U6_RANGE(x)	((x) &lt;= (0x40      - 1) &amp;&amp; (x) &gt;= 0)</div><div class='add'>+#define IN_S9_RANGE(x)	((x) &lt;= (0x100     - 1) &amp;&amp; (x) &gt;= -0x100)</div><div class='add'>+#define IN_S12_RANGE(x)	((x) &lt;= (0x800     - 1) &amp;&amp; (x) &gt;= -0x800)</div><div class='add'>+#define IN_S21_RANGE(x)	((x) &lt;= (0x100000  - 1) &amp;&amp; (x) &gt;= -0x100000)</div><div class='add'>+#define IN_S25_RANGE(x)	((x) &lt;= (0x1000000 - 1) &amp;&amp; (x) &gt;= -0x1000000)</div><div class='add'>+</div><div class='add'>+/* Operands in most of the encodings. */</div><div class='add'>+#define OP_A(x)	((x) &amp; 0x03f)</div><div class='add'>+#define OP_B(x)	((((x) &amp; 0x07) &lt;&lt; 24) | (((x) &amp; 0x38) &lt;&lt;  9))</div><div class='add'>+#define OP_C(x)	(((x) &amp; 0x03f) &lt;&lt; 6)</div><div class='add'>+#define OP_IMM	(OP_C(ARC_R_IMM))</div><div class='add'>+#define COND(x)	(OP_A((x) &amp; 31))</div><div class='add'>+#define FLAG(x)	(((x) &amp; 1) &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "mov b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0000_1010 0BBB_cccc cc00_0000</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		destination register</div><div class='add'>+ * c:  cccccc		source register</div><div class='add'>+ */</div><div class='add'>+#define OPC_MOV		0x200a0000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "mov b,s12" (used for moving small immediates):</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 1000_1010 0BBB_ssss ssSS_SSSS</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		destination register</div><div class='add'>+ * s:  SSSSSSssssss	source immediate (signed)</div><div class='add'>+ */</div><div class='add'>+#define OPC_MOVI	0x208a0000</div><div class='add'>+#define MOVI_S12(x)	((((x) &amp; 0xfc0) &gt;&gt; 6) | (((x) &amp; 0x3f) &lt;&lt; 6))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "mov[.qq] b,u6", used for conditional</div><div class='add'>+ * moving of even smaller immediates:</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 1100_1010 0BBB_cccc cciq_qqqq</div><div class='add'>+ *</div><div class='add'>+ * qq: qqqqq		condition code</div><div class='add'>+ * i:			If set, c is considered a 6-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		destination register</div><div class='add'>+ * c:  cccccc		source</div><div class='add'>+ */</div><div class='add'>+#define OPC_MOV_CC	0x20ca0000</div><div class='add'>+#define MOV_CC_I	BIT(5)</div><div class='add'>+#define OPC_MOVU_CC	(OPC_MOV_CC | MOV_CC_I)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "sexb b,c" (8-bit sign extension):</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0010_1111 0BBB_cccc cc00_0101</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		destination register</div><div class='add'>+ * c:  cccccc		source register</div><div class='add'>+ */</div><div class='add'>+#define OPC_SEXB	0x202f0005</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "sexh b,c" (16-bit sign extension):</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0010_1111 0BBB_cccc cc00_0110</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		destination register</div><div class='add'>+ * c:  cccccc		source register</div><div class='add'>+ */</div><div class='add'>+#define OPC_SEXH	0x202f0006</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "ld[zz][.x][.aa] c,[b,s9]":</div><div class='add'>+ *</div><div class='add'>+ * 0001_0bbb ssss_ssss SBBB_0aaz zxcc_cccc</div><div class='add'>+ *</div><div class='add'>+ * zz:			size mode</div><div class='add'>+ * aa:			address write back mode</div><div class='add'>+ * x:			extension mode</div><div class='add'>+ *</div><div class='add'>+ * s9: S_ssss_ssss	9-bit signed number</div><div class='add'>+ * b:  BBBbbb		source reg for address</div><div class='add'>+ * c:  cccccc		destination register</div><div class='add'>+ */</div><div class='add'>+#define OPC_LOAD	0x10000000</div><div class='add'>+#define LOAD_X(x)	((x) &lt;&lt; 6)</div><div class='add'>+#define LOAD_ZZ(x)	((x) &lt;&lt; 7)</div><div class='add'>+#define LOAD_AA(x)	((x) &lt;&lt; 9)</div><div class='add'>+#define LOAD_S9(x)	((((x) &amp; 0x0ff) &lt;&lt; 16) | (((x) &amp; 0x100) &lt;&lt;  7))</div><div class='add'>+#define LOAD_C(x)	((x) &amp; 0x03f)</div><div class='add'>+/* Unsigned and signed loads. */</div><div class='add'>+#define OPC_LDU		(OPC_LOAD | LOAD_X(X_zero))</div><div class='add'>+#define OPC_LDS		(OPC_LOAD | LOAD_X(X_sign))</div><div class='add'>+/* 32-bit load. */</div><div class='add'>+#define OPC_LD32	(OPC_LDU | LOAD_ZZ(ZZ_4_byte))</div><div class='add'>+/* "pop reg" is merely a "ld.ab reg,[sp,4]". */</div><div class='add'>+#define OPC_POP		\</div><div class='add'>+	(OPC_LD32 | LOAD_AA(AA_post) | LOAD_S9(4) | OP_B(ARC_R_SP))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "st[zz][.aa] c,[b,s9]":</div><div class='add'>+ *</div><div class='add'>+ * 0001_1bbb ssss_ssss SBBB_cccc cc0a_azz0</div><div class='add'>+ *</div><div class='add'>+ * zz: zz		size mode</div><div class='add'>+ * aa: aa		address write back mode</div><div class='add'>+ *</div><div class='add'>+ * s9: S_ssss_ssss	9-bit signed number</div><div class='add'>+ * b:  BBBbbb		source reg for address</div><div class='add'>+ * c:  cccccc		source reg to be stored</div><div class='add'>+ */</div><div class='add'>+#define OPC_STORE	0x18000000</div><div class='add'>+#define STORE_ZZ(x)	((x) &lt;&lt; 1)</div><div class='add'>+#define STORE_AA(x)	((x) &lt;&lt; 3)</div><div class='add'>+#define STORE_S9(x)	((((x) &amp; 0x0ff) &lt;&lt; 16) | (((x) &amp; 0x100) &lt;&lt;  7))</div><div class='add'>+/* 32-bit store. */</div><div class='add'>+#define OPC_ST32	(OPC_STORE | STORE_ZZ(ZZ_4_byte))</div><div class='add'>+/* "push reg" is merely a "st.aw reg,[sp,-4]". */</div><div class='add'>+#define OPC_PUSH	\</div><div class='add'>+	(OPC_ST32 | STORE_AA(AA_pre) | STORE_S9(-4) | OP_B(ARC_R_SP))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "add a,b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0i00_0000 fBBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * f:                   indicates if flags (carry, etc.) should be updated</div><div class='add'>+ * i:			If set, c is considered a 6-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_ADD		0x20000000</div><div class='add'>+/* Addition with updating the pertinent flags in "status32" register. */</div><div class='add'>+#define OPC_ADDF	(OPC_ADD | FLAG(1))</div><div class='add'>+#define ADDI		BIT(22)</div><div class='add'>+#define ADDI_U6(x)	OP_C(x)</div><div class='add'>+#define OPC_ADDI	(OPC_ADD | ADDI)</div><div class='add'>+#define OPC_ADDIF	(OPC_ADDI | FLAG(1))</div><div class='add'>+#define OPC_ADD_I	(OPC_ADD | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "adc a,b,c" (addition with carry):</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0i00_0001 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * i:			if set, c is considered a 6-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_ADC		0x20010000</div><div class='add'>+#define ADCI		BIT(22)</div><div class='add'>+#define ADCI_U6(x)	OP_C(x)</div><div class='add'>+#define OPC_ADCI	(OPC_ADC | ADCI)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "sub a,b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0i00_0010 fBBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * f:                   indicates if flags (carry, etc.) should be updated</div><div class='add'>+ * i:			if set, c is considered a 6-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_SUB		0x20020000</div><div class='add'>+/* Subtraction with updating the pertinent flags in "status32" register. */</div><div class='add'>+#define OPC_SUBF	(OPC_SUB | FLAG(1))</div><div class='add'>+#define SUBI		BIT(22)</div><div class='add'>+#define SUBI_U6(x)	OP_C(x)</div><div class='add'>+#define OPC_SUBI	(OPC_SUB | SUBI)</div><div class='add'>+#define OPC_SUB_I	(OPC_SUB | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "sbc a,b,c" (subtraction with carry):</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0000_0011 fBBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * f:                   indicates if flags (carry, etc.) should be updated</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_SBC		0x20030000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "cmp[.qq] b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 1100_1100 1BBB_cccc cc0q_qqqq</div><div class='add'>+ *</div><div class='add'>+ * qq:	qqqqq		condition code</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		the 1st operand</div><div class='add'>+ * c:  cccccc		the 2nd operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_CMP		0x20cc8000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "neg a,b":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0100_1110 0BBB_0000 00aa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		input</div><div class='add'>+ */</div><div class='add'>+#define OPC_NEG		0x204e0000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "mpy a,b,c".</div><div class='add'>+ * mpy is the signed 32-bit multiplication with the lower 32-bit</div><div class='add'>+ * of the product as the result.</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0001_1010 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_MPY		0x201a0000</div><div class='add'>+#define OPC_MPYI	(OPC_MPY | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "mpydu a,b,c".</div><div class='add'>+ * mpydu is the unsigned 32-bit multiplication with the lower 32-bit of</div><div class='add'>+ * the product in register "a" and the higher 32-bit in register "a+1".</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0001_1001 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		64-bit result in registers (R_a+1,R_a)</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_MPYDU	0x28190000</div><div class='add'>+#define OPC_MPYDUI	(OPC_MPYDU | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "divu a,b,c" (unsigned division):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0000_0101 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result (quotient)</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand (divisor)</div><div class='add'>+ */</div><div class='add'>+#define OPC_DIVU	0x28050000</div><div class='add'>+#define OPC_DIVUI	(OPC_DIVU | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "div a,b,c" (signed division):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0000_0100 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result (quotient)</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand (divisor)</div><div class='add'>+ */</div><div class='add'>+#define OPC_DIVS	0x28040000</div><div class='add'>+#define OPC_DIVSI	(OPC_DIVS | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "remu a,b,c" (unsigned remainder):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0000_1001 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result (remainder)</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand (divisor)</div><div class='add'>+ */</div><div class='add'>+#define OPC_REMU	0x28090000</div><div class='add'>+#define OPC_REMUI	(OPC_REMU | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "rem a,b,c" (signed remainder):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0000_1000 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result (remainder)</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand (divisor)</div><div class='add'>+ */</div><div class='add'>+#define OPC_REMS	0x28080000</div><div class='add'>+#define OPC_REMSI	(OPC_REMS | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "and a,b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0000_0100 fBBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * f:                   indicates if zero and negative flags should be updated</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_AND		0x20040000</div><div class='add'>+#define OPC_ANDI	(OPC_AND | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "tst[.qq] b,c".</div><div class='add'>+ * Checks if the two input operands have any bit set at the same</div><div class='add'>+ * position.</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 1100_1011 1BBB_cccc cc0q_qqqq</div><div class='add'>+ *</div><div class='add'>+ * qq:	qqqqq		condition code</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_TST		0x20cb8000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "or a,b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0000_0101 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_OR		0x20050000</div><div class='add'>+#define OPC_ORI		(OPC_OR | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "xor a,b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0000_0111 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		the 1st input operand</div><div class='add'>+ * c:  cccccc		the 2nd input operand</div><div class='add'>+ */</div><div class='add'>+#define OPC_XOR		0x20070000</div><div class='add'>+#define OPC_XORI	(OPC_XOR | OP_IMM)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "not b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0010_1111 0BBB_cccc cc00_1010</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		result</div><div class='add'>+ * c:  cccccc		input</div><div class='add'>+ */</div><div class='add'>+#define OPC_NOT		0x202f000a</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "btst b,u6":</div><div class='add'>+ *</div><div class='add'>+ * 0010_0bbb 0101_0001 1BBB_uuuu uu00_0000</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		input number to check</div><div class='add'>+ * u6: uuuuuu		6-bit unsigned number specifying bit position to check</div><div class='add'>+ */</div><div class='add'>+#define OPC_BTSTU6	0x20518000</div><div class='add'>+#define BTST_U6(x)	(OP_C((x) &amp; 63))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "asl[.qq] b,b,c" (arithmetic shift left):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0i00_0000 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * i:			if set, c is considered a 5-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		result and the first operand (number to be shifted)</div><div class='add'>+ * c:  cccccc		amount to be shifted</div><div class='add'>+ */</div><div class='add'>+#define OPC_ASL		0x28000000</div><div class='add'>+#define ASL_I		BIT(22)</div><div class='add'>+#define ASLI_U6(x)	OP_C((x) &amp; 31)</div><div class='add'>+#define OPC_ASLI	(OPC_ASL | ASL_I)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "asr a,b,c" (arithmetic shift right):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0i00_0010 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * i:			if set, c is considered a 6-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		first input:  number to be shifted</div><div class='add'>+ * c:  cccccc		second input: amount to be shifted</div><div class='add'>+ */</div><div class='add'>+#define OPC_ASR		0x28020000</div><div class='add'>+#define ASR_I		ASL_I</div><div class='add'>+#define ASRI_U6(x)	ASLI_U6(x)</div><div class='add'>+#define OPC_ASRI	(OPC_ASR | ASR_I)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "lsr a,b,c" (logical shift right):</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0i00_0001 0BBB_cccc ccaa_aaaa</div><div class='add'>+ *</div><div class='add'>+ * i:			if set, c is considered a 6-bit immediate, else a reg.</div><div class='add'>+ *</div><div class='add'>+ * a:  aaaaaa		result</div><div class='add'>+ * b:  BBBbbb		first input:  number to be shifted</div><div class='add'>+ * c:  cccccc		second input: amount to be shifted</div><div class='add'>+ */</div><div class='add'>+#define OPC_LSR		0x28010000</div><div class='add'>+#define LSR_I		ASL_I</div><div class='add'>+#define LSRI_U6(x)	ASLI_U6(x)</div><div class='add'>+#define OPC_LSRI	(OPC_LSR | LSR_I)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 4-byte encoding of "swape b,c":</div><div class='add'>+ *</div><div class='add'>+ * 0010_1bbb 0010_1111 0bbb_cccc cc00_1001</div><div class='add'>+ *</div><div class='add'>+ * b:  BBBbbb		destination register</div><div class='add'>+ * c:  cccccc		source register</div><div class='add'>+ */</div><div class='add'>+#define OPC_SWAPE	0x282f0009</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Encoding for jump to an address in register:</div><div class='add'>+ * j reg_c</div><div class='add'>+ *</div><div class='add'>+ * 0010_0000 1110_0000 0000_cccc cc00_0000</div><div class='add'>+ *</div><div class='add'>+ * c:  cccccc		register holding the destination address</div><div class='add'>+ */</div><div class='add'>+#define OPC_JMP		0x20e00000</div><div class='add'>+/* Jump to "branch-and-link" register, which effectively is a "return". */</div><div class='add'>+#define OPC_J_BLINK	(OPC_JMP | OP_C(ARC_R_BLINK))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Encoding for jump-and-link to an address in register:</div><div class='add'>+ * jl reg_c</div><div class='add'>+ *</div><div class='add'>+ * 0010_0000 0010_0010 0000_cccc cc00_0000</div><div class='add'>+ *</div><div class='add'>+ * c:  cccccc		register holding the destination address</div><div class='add'>+ */</div><div class='add'>+#define OPC_JL		0x20220000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Encoding for (conditional) branch to an offset from the current location</div><div class='add'>+ * that is word aligned: (PC &amp; 0xffff_fffc) + s21</div><div class='add'>+ * B[qq] s21</div><div class='add'>+ *</div><div class='add'>+ * 0000_0sss ssss_sss0 SSSS_SSSS SS0q_qqqq</div><div class='add'>+ *</div><div class='add'>+ * qq:	qqqqq				condition code</div><div class='add'>+ * s21:	SSSS SSSS_SSss ssss_ssss	The displacement (21-bit signed)</div><div class='add'>+ *</div><div class='add'>+ * The displacement is supposed to be 16-bit (2-byte) aligned. Therefore,</div><div class='add'>+ * it should be a multiple of 2. Hence, there is an implied '0' bit at its</div><div class='add'>+ * LSB: S_SSSS SSSS_Ssss ssss_sss0</div><div class='add'>+ */</div><div class='add'>+#define OPC_BCC		0x00000000</div><div class='add'>+#define BCC_S21(d)	((((d) &amp; 0x7fe) &lt;&lt; 16) | (((d) &amp; 0x1ff800) &gt;&gt; 5))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Encoding for unconditional branch to an offset from the current location</div><div class='add'>+ * that is word aligned: (PC &amp; 0xffff_fffc) + s25</div><div class='add'>+ * B s25</div><div class='add'>+ *</div><div class='add'>+ * 0000_0sss ssss_sss1 SSSS_SSSS SS00_TTTT</div><div class='add'>+ *</div><div class='add'>+ * s25:	TTTT SSSS SSSS_SSss ssss_ssss	The displacement (25-bit signed)</div><div class='add'>+ *</div><div class='add'>+ * The displacement is supposed to be 16-bit (2-byte) aligned. Therefore,</div><div class='add'>+ * it should be a multiple of 2. Hence, there is an implied '0' bit at its</div><div class='add'>+ * LSB: T TTTS_SSSS SSSS_Ssss ssss_sss0</div><div class='add'>+ */</div><div class='add'>+#define OPC_B		0x00010000</div><div class='add'>+#define B_S25(d)	((((d) &amp; 0x1e00000) &gt;&gt; 21) | BCC_S21(d))</div><div class='add'>+</div><div class='add'>+static inline void emit_2_bytes(u8 *buf, u16 bytes)</div><div class='add'>+{</div><div class='add'>+	*((u16 *)buf) = bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void emit_4_bytes(u8 *buf, u32 bytes)</div><div class='add'>+{</div><div class='add'>+	emit_2_bytes(buf, bytes &gt;&gt; 16);</div><div class='add'>+	emit_2_bytes(buf + 2, bytes &amp; 0xffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 bpf_to_arc_size(u8 size)</div><div class='add'>+{</div><div class='add'>+	switch (size) {</div><div class='add'>+	case BPF_B:</div><div class='add'>+		return ZZ_1_byte;</div><div class='add'>+	case BPF_H:</div><div class='add'>+		return ZZ_2_byte;</div><div class='add'>+	case BPF_W:</div><div class='add'>+		return ZZ_4_byte;</div><div class='add'>+	case BPF_DW:</div><div class='add'>+		return ZZ_8_byte;</div><div class='add'>+	default:</div><div class='add'>+		return ZZ_4_byte;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/************** Encoders (Deal with ARC regs) ************/</div><div class='add'>+</div><div class='add'>+/* Move an immediate to register with a 4-byte instruction. */</div><div class='add'>+static u8 arc_movi_r(u8 *buf, u8 reg, s16 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MOVI | OP_B(reg) | MOVI_S12(imm);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rd &lt;- rs */</div><div class='add'>+static u8 arc_mov_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MOV | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The emitted code may have different sizes based on "imm". */</div><div class='add'>+static u8 arc_mov_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MOV | OP_B(rd) | OP_IMM;</div><div class='add'>+</div><div class='add'>+	if (IN_S12_RANGE(imm))</div><div class='add'>+		return arc_movi_r(buf, rd, imm);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The emitted code will always have the same size (8). */</div><div class='add'>+static u8 arc_mov_i_fixed(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MOV | OP_B(rd) | OP_IMM;</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Conditional move. */</div><div class='add'>+static u8 arc_mov_cc_r(u8 *buf, u8 cc, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MOV_CC | OP_B(rd) | OP_C(rs) | COND(cc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Conditional move of a small immediate to rd. */</div><div class='add'>+static u8 arc_movu_cc_r(u8 *buf, u8 cc, u8 rd, u8 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MOVU_CC | OP_B(rd) | OP_C(imm) | COND(cc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sign extension from a byte. */</div><div class='add'>+static u8 arc_sexb_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SEXB | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sign extension from two bytes. */</div><div class='add'>+static u8 arc_sexh_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SEXH | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* st reg, [reg_mem, off] */</div><div class='add'>+static u8 arc_st_r(u8 *buf, u8 reg, u8 reg_mem, s16 off, u8 zz)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_STORE | STORE_ZZ(zz) | OP_C(reg) |</div><div class='add'>+		OP_B(reg_mem) | STORE_S9(off);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* st.aw reg, [sp, -4] */</div><div class='add'>+static u8 arc_push_r(u8 *buf, u8 reg)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_PUSH | OP_C(reg);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ld reg, [reg_mem, off] (unsigned) */</div><div class='add'>+static u8 arc_ld_r(u8 *buf, u8 reg, u8 reg_mem, s16 off, u8 zz)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_LDU | LOAD_ZZ(zz) | LOAD_C(reg) |</div><div class='add'>+		OP_B(reg_mem) | LOAD_S9(off);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ld.x reg, [reg_mem, off] (sign extend) */</div><div class='add'>+static u8 arc_ldx_r(u8 *buf, u8 reg, u8 reg_mem, s16 off, u8 zz)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_LDS | LOAD_ZZ(zz) | LOAD_C(reg) |</div><div class='add'>+		OP_B(reg_mem) | LOAD_S9(off);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ld.ab reg,[sp,4] */</div><div class='add'>+static u8 arc_pop_r(u8 *buf, u8 reg)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_POP | LOAD_C(reg);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* add Ra,Ra,Rc */</div><div class='add'>+static u8 arc_add_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADD | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* add.f Ra,Ra,Rc */</div><div class='add'>+static u8 arc_addf_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADDF | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* add.f Ra,Ra,u6 */</div><div class='add'>+static u8 arc_addif_r(u8 *buf, u8 ra, u8 u6)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADDIF | OP_A(ra) | OP_B(ra) | ADDI_U6(u6);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* add Ra,Ra,u6 */</div><div class='add'>+static u8 arc_addi_r(u8 *buf, u8 ra, u8 u6)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADDI | OP_A(ra) | OP_B(ra) | ADDI_U6(u6);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* add Ra,Rb,imm */</div><div class='add'>+static u8 arc_add_i(u8 *buf, u8 ra, u8 rb, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADD_I | OP_A(ra) | OP_B(rb);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* adc Ra,Ra,Rc */</div><div class='add'>+static u8 arc_adc_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADC | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* adc Ra,Ra,u6 */</div><div class='add'>+static u8 arc_adci_r(u8 *buf, u8 ra, u8 u6)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ADCI | OP_A(ra) | OP_B(ra) | ADCI_U6(u6);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* sub Ra,Ra,Rc */</div><div class='add'>+static u8 arc_sub_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SUB | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* sub.f Ra,Ra,Rc */</div><div class='add'>+static u8 arc_subf_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SUBF | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* sub Ra,Ra,u6 */</div><div class='add'>+static u8 arc_subi_r(u8 *buf, u8 ra, u8 u6)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SUBI | OP_A(ra) | OP_B(ra) | SUBI_U6(u6);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* sub Ra,Ra,imm */</div><div class='add'>+static u8 arc_sub_i(u8 *buf, u8 ra, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SUB_I | OP_A(ra) | OP_B(ra);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* sbc Ra,Ra,Rc */</div><div class='add'>+static u8 arc_sbc_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SBC | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* cmp Rb,Rc */</div><div class='add'>+static u8 arc_cmp_r(u8 *buf, u8 rb, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_CMP | OP_B(rb) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cmp.z Rb,Rc</div><div class='add'>+ *</div><div class='add'>+ * This "cmp.z" variant of compare instruction is used on lower</div><div class='add'>+ * 32-bits of register pairs after "cmp"ing their upper parts. If the</div><div class='add'>+ * upper parts are equal (z), then this one will proceed to check the</div><div class='add'>+ * rest.</div><div class='add'>+ */</div><div class='add'>+static u8 arc_cmpz_r(u8 *buf, u8 rb, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_CMP | OP_B(rb) | OP_C(rc) | CC_equal;</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* neg Ra,Rb */</div><div class='add'>+static u8 arc_neg_r(u8 *buf, u8 ra, u8 rb)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_NEG | OP_A(ra) | OP_B(rb);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mpy Ra,Rb,Rc */</div><div class='add'>+static u8 arc_mpy_r(u8 *buf, u8 ra, u8 rb, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MPY | OP_A(ra) | OP_B(rb) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mpy Ra,Rb,imm */</div><div class='add'>+static u8 arc_mpy_i(u8 *buf, u8 ra, u8 rb, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MPYI | OP_A(ra) | OP_B(rb);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mpydu Ra,Ra,Rc */</div><div class='add'>+static u8 arc_mpydu_r(u8 *buf, u8 ra, u8 rc)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MPYDU | OP_A(ra) | OP_B(ra) | OP_C(rc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mpydu Ra,Ra,imm */</div><div class='add'>+static u8 arc_mpydu_i(u8 *buf, u8 ra, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_MPYDUI | OP_A(ra) | OP_B(ra);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* divu Rd,Rd,Rs */</div><div class='add'>+static u8 arc_divu_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_DIVU | OP_A(rd) | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* divu Rd,Rd,imm */</div><div class='add'>+static u8 arc_divu_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_DIVUI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* div Rd,Rd,Rs */</div><div class='add'>+static u8 arc_divs_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_DIVS | OP_A(rd) | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* div Rd,Rd,imm */</div><div class='add'>+static u8 arc_divs_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_DIVSI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* remu Rd,Rd,Rs */</div><div class='add'>+static u8 arc_remu_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_REMU | OP_A(rd) | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* remu Rd,Rd,imm */</div><div class='add'>+static u8 arc_remu_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_REMUI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rem Rd,Rd,Rs */</div><div class='add'>+static u8 arc_rems_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_REMS | OP_A(rd) | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rem Rd,Rd,imm */</div><div class='add'>+static u8 arc_rems_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_REMSI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* and Rd,Rd,Rs */</div><div class='add'>+static u8 arc_and_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_AND | OP_A(rd) | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* and Rd,Rd,limm */</div><div class='add'>+static u8 arc_and_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ANDI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* tst Rd,Rs */</div><div class='add'>+static u8 arc_tst_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_TST | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This particular version, "tst.z ...", is meant to be used after a</div><div class='add'>+ * "tst" on the low 32-bit of register pairs. If that "tst" is not</div><div class='add'>+ * zero, then we don't need to test the upper 32-bits lest it sets</div><div class='add'>+ * the zero flag.</div><div class='add'>+ */</div><div class='add'>+static u8 arc_tstz_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_TST | OP_B(rd) | OP_C(rs) | CC_equal;</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_or_r(u8 *buf, u8 rd, u8 rs1, u8 rs2)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_OR | OP_A(rd) | OP_B(rs1) | OP_C(rs2);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_or_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ORI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_xor_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_XOR | OP_A(rd) | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_xor_i(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_XORI | OP_A(rd) | OP_B(rd);</div><div class='add'>+</div><div class='add'>+	if (buf) {</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+		emit_4_bytes(buf + INSN_len_normal, imm);</div><div class='add'>+	}</div><div class='add'>+	return INSN_len_normal + INSN_len_imm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_not_r(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_NOT | OP_B(rd) | OP_C(rs);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_btst_i(u8 *buf, u8 rs, u8 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_BTSTU6 | OP_B(rs) | BTST_U6(imm);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_asl_r(u8 *buf, u8 rd, u8 rs1, u8 rs2)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ASL | OP_A(rd) | OP_B(rs1) | OP_C(rs2);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_asli_r(u8 *buf, u8 rd, u8 rs, u8 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ASLI | OP_A(rd) | OP_B(rs) | ASLI_U6(imm);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_asr_r(u8 *buf, u8 rd, u8 rs1, u8 rs2)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ASR | OP_A(rd) | OP_B(rs1) | OP_C(rs2);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_asri_r(u8 *buf, u8 rd, u8 rs, u8 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_ASRI | OP_A(rd) | OP_B(rs) | ASRI_U6(imm);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_lsr_r(u8 *buf, u8 rd, u8 rs1, u8 rs2)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_LSR | OP_A(rd) | OP_B(rs1) | OP_C(rs2);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_lsri_r(u8 *buf, u8 rd, u8 rs, u8 imm)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_LSRI | OP_A(rd) | OP_B(rs) | LSRI_U6(imm);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_swape_r(u8 *buf, u8 r)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_SWAPE | OP_B(r) | OP_C(r);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_jmp_return(u8 *buf)</div><div class='add'>+{</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, OPC_J_BLINK);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 arc_jl(u8 *buf, u8 reg)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_JL | OP_C(reg);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Conditional jump to an address that is max 21 bits away (signed).</div><div class='add'>+ *</div><div class='add'>+ * b&lt;cc&gt; s21</div><div class='add'>+ */</div><div class='add'>+static u8 arc_bcc(u8 *buf, u8 cc, int offset)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_BCC | BCC_S21(offset) | COND(cc);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unconditional jump to an address that is max 25 bits away (signed).</div><div class='add'>+ *</div><div class='add'>+ * b     s25</div><div class='add'>+ */</div><div class='add'>+static u8 arc_b(u8 *buf, s32 offset)</div><div class='add'>+{</div><div class='add'>+	const u32 insn = OPC_B | B_S25(offset);</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		emit_4_bytes(buf, insn);</div><div class='add'>+	return INSN_len_normal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/************* Packers (Deal with BPF_REGs) **************/</div><div class='add'>+</div><div class='add'>+inline u8 zext(u8 *buf, u8 rd)</div><div class='add'>+{</div><div class='add'>+	if (rd != BPF_REG_FP)</div><div class='add'>+		return arc_movi_r(buf, REG_HI(rd), 0);</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mov_r32(u8 *buf, u8 rd, u8 rs, u8 sign_ext)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	if (sign_ext) {</div><div class='add'>+		if (sign_ext == 8)</div><div class='add'>+			len = arc_sexb_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+		else if (sign_ext == 16)</div><div class='add'>+			len = arc_sexh_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+		else if (sign_ext == 32 &amp;&amp; rd != rs)</div><div class='add'>+			len = arc_mov_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+</div><div class='add'>+		return len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Unsigned move. */</div><div class='add'>+</div><div class='add'>+	if (rd != rs)</div><div class='add'>+		len = arc_mov_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mov_r32_i32(u8 *buf, u8 reg, s32 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_mov_i(buf, REG_LO(reg), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mov_r64(u8 *buf, u8 rd, u8 rs, u8 sign_ext)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	if (sign_ext) {</div><div class='add'>+		/* First handle the low 32-bit part. */</div><div class='add'>+		len = mov_r32(buf, rd, rs, sign_ext);</div><div class='add'>+</div><div class='add'>+		/* Now propagate the sign bit of LO to HI. */</div><div class='add'>+		if (sign_ext == 8 || sign_ext == 16 || sign_ext == 32) {</div><div class='add'>+			len += arc_asri_r(BUF(buf, len),</div><div class='add'>+					  REG_HI(rd), REG_LO(rd), 31);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Unsigned move. */</div><div class='add'>+</div><div class='add'>+	if (rd == rs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	len = arc_mov_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+</div><div class='add'>+	if (rs != BPF_REG_FP)</div><div class='add'>+		len += arc_mov_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	/* BPF_REG_FP is mapped to 32-bit "fp" register. */</div><div class='add'>+	else</div><div class='add'>+		len += arc_movi_r(BUF(buf, len), REG_HI(rd), 0);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sign extend the 32-bit immediate into 64-bit register pair. */</div><div class='add'>+u8 mov_r64_i32(u8 *buf, u8 reg, s32 imm)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	len = arc_mov_i(buf, REG_LO(reg), imm);</div><div class='add'>+</div><div class='add'>+	/* BPF_REG_FP is mapped to 32-bit "fp" register. */</div><div class='add'>+	if (reg != BPF_REG_FP) {</div><div class='add'>+		if (imm &gt;= 0)</div><div class='add'>+			len += arc_movi_r(BUF(buf, len), REG_HI(reg), 0);</div><div class='add'>+		else</div><div class='add'>+			len += arc_movi_r(BUF(buf, len), REG_HI(reg), -1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is merely used for translation of "LD R, IMM64" instructions</div><div class='add'>+ * of the BPF. These sort of instructions are sometimes used for</div><div class='add'>+ * relocations. If during the normal pass, the relocation value is</div><div class='add'>+ * not known, the BPF instruction may look something like:</div><div class='add'>+ *</div><div class='add'>+ * LD R &lt;- 0x0000_0001_0000_0001</div><div class='add'>+ *</div><div class='add'>+ * Which will nicely translate to two 4-byte ARC instructions:</div><div class='add'>+ *</div><div class='add'>+ * mov R_lo, 1               # imm is small enough to be s12</div><div class='add'>+ * mov R_hi, 1               # same</div><div class='add'>+ *</div><div class='add'>+ * However, during the extra pass, the IMM64 will have changed</div><div class='add'>+ * to the resolved address and looks something like:</div><div class='add'>+ *</div><div class='add'>+ * LD R &lt;- 0x0000_0000_1234_5678</div><div class='add'>+ *</div><div class='add'>+ * Now, the translated code will require 12 bytes:</div><div class='add'>+ *</div><div class='add'>+ * mov R_lo, 0x12345678      # this is an 8-byte instruction</div><div class='add'>+ * mov R_hi, 0               # still 4 bytes</div><div class='add'>+ *</div><div class='add'>+ * Which in practice will result in overwriting the following</div><div class='add'>+ * instruction. To avoid such cases, we will always emit codes</div><div class='add'>+ * with fixed sizes.</div><div class='add'>+ */</div><div class='add'>+u8 mov_r64_i64(u8 *buf, u8 reg, u32 lo, u32 hi)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_mov_i_fixed(buf, REG_LO(reg), lo);</div><div class='add'>+	len += arc_mov_i_fixed(BUF(buf, len), REG_HI(reg), hi);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If the "off"set is too big (doesn't encode as S9) for:</div><div class='add'>+ *</div><div class='add'>+ *   {ld,st}  r, [rm, off]</div><div class='add'>+ *</div><div class='add'>+ * Then emit:</div><div class='add'>+ *</div><div class='add'>+ *   add r10, REG_LO(rm), off</div><div class='add'>+ *</div><div class='add'>+ * and make sure that r10 becomes the effective address:</div><div class='add'>+ *</div><div class='add'>+ *   {ld,st}  r, [r10, 0]</div><div class='add'>+ */</div><div class='add'>+static u8 adjust_mem_access(u8 *buf, s16 *off, u8 size,</div><div class='add'>+			    u8 rm, u8 *arc_reg_mem)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+	*arc_reg_mem = REG_LO(rm);</div><div class='add'>+</div><div class='add'>+	if (!IN_S9_RANGE(*off) ||</div><div class='add'>+	    (size == BPF_DW &amp;&amp; !IN_S9_RANGE(*off + 4))) {</div><div class='add'>+		len += arc_add_i(BUF(buf, len),</div><div class='add'>+				 REG_LO(JIT_REG_TMP), REG_LO(rm), (u32)(*off));</div><div class='add'>+		*arc_reg_mem = REG_LO(JIT_REG_TMP);</div><div class='add'>+		*off = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* store rs, [rd, off] */</div><div class='add'>+u8 store_r(u8 *buf, u8 rs, u8 rd, s16 off, u8 size)</div><div class='add'>+{</div><div class='add'>+	u8 len, arc_reg_mem;</div><div class='add'>+</div><div class='add'>+	len = adjust_mem_access(buf, &amp;off, size, rd, &amp;arc_reg_mem);</div><div class='add'>+</div><div class='add'>+	if (size == BPF_DW) {</div><div class='add'>+		len += arc_st_r(BUF(buf, len), REG_LO(rs), arc_reg_mem,</div><div class='add'>+				off, ZZ_4_byte);</div><div class='add'>+		len += arc_st_r(BUF(buf, len), REG_HI(rs), arc_reg_mem,</div><div class='add'>+				off + 4, ZZ_4_byte);</div><div class='add'>+	} else {</div><div class='add'>+		u8 zz = bpf_to_arc_size(size);</div><div class='add'>+</div><div class='add'>+		len += arc_st_r(BUF(buf, len), REG_LO(rs), arc_reg_mem,</div><div class='add'>+				off, zz);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For {8,16,32}-bit stores:</div><div class='add'>+ *   mov r21, imm</div><div class='add'>+ *   st  r21, [...]</div><div class='add'>+ * For 64-bit stores:</div><div class='add'>+ *   mov r21, imm</div><div class='add'>+ *   st  r21, [...]</div><div class='add'>+ *   mov r21, {0,-1}</div><div class='add'>+ *   st  r21, [...+4]</div><div class='add'>+ */</div><div class='add'>+u8 store_i(u8 *buf, s32 imm, u8 rd, s16 off, u8 size)</div><div class='add'>+{</div><div class='add'>+	u8 len, arc_reg_mem;</div><div class='add'>+	/* REG_LO(JIT_REG_TMP) might be used by "adjust_mem_access()". */</div><div class='add'>+	const u8 arc_rs = REG_HI(JIT_REG_TMP);</div><div class='add'>+</div><div class='add'>+	len = adjust_mem_access(buf, &amp;off, size, rd, &amp;arc_reg_mem);</div><div class='add'>+</div><div class='add'>+	if (size == BPF_DW) {</div><div class='add'>+		len += arc_mov_i(BUF(buf, len), arc_rs, imm);</div><div class='add'>+		len += arc_st_r(BUF(buf, len), arc_rs, arc_reg_mem,</div><div class='add'>+				off, ZZ_4_byte);</div><div class='add'>+		imm = (imm &gt;= 0 ? 0 : -1);</div><div class='add'>+		len += arc_mov_i(BUF(buf, len), arc_rs, imm);</div><div class='add'>+		len += arc_st_r(BUF(buf, len), arc_rs, arc_reg_mem,</div><div class='add'>+				off + 4, ZZ_4_byte);</div><div class='add'>+	} else {</div><div class='add'>+		u8 zz = bpf_to_arc_size(size);</div><div class='add'>+</div><div class='add'>+		len += arc_mov_i(BUF(buf, len), arc_rs, imm);</div><div class='add'>+		len += arc_st_r(BUF(buf, len), arc_rs, arc_reg_mem, off, zz);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For the calling convention of a little endian machine, the LO part</div><div class='add'>+ * must be on top of the stack.</div><div class='add'>+ */</div><div class='add'>+static u8 push_r64(u8 *buf, u8 reg)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+#ifdef __LITTLE_ENDIAN</div><div class='add'>+	/* BPF_REG_FP is mapped to 32-bit "fp" register. */</div><div class='add'>+	if (reg != BPF_REG_FP)</div><div class='add'>+		len += arc_push_r(BUF(buf, len), REG_HI(reg));</div><div class='add'>+	len += arc_push_r(BUF(buf, len), REG_LO(reg));</div><div class='add'>+#else</div><div class='add'>+	len += arc_push_r(BUF(buf, len), REG_LO(reg));</div><div class='add'>+	if (reg != BPF_REG_FP)</div><div class='add'>+		len += arc_push_r(BUF(buf, len), REG_HI(reg));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* load rd, [rs, off] */</div><div class='add'>+u8 load_r(u8 *buf, u8 rd, u8 rs, s16 off, u8 size, bool sign_ext)</div><div class='add'>+{</div><div class='add'>+	u8 len, arc_reg_mem;</div><div class='add'>+</div><div class='add'>+	len = adjust_mem_access(buf, &amp;off, size, rs, &amp;arc_reg_mem);</div><div class='add'>+</div><div class='add'>+	if (size == BPF_B || size == BPF_H || size == BPF_W) {</div><div class='add'>+		const u8 zz = bpf_to_arc_size(size);</div><div class='add'>+</div><div class='add'>+		/* Use LD.X only if the data size is less than 32-bit. */</div><div class='add'>+		if (sign_ext &amp;&amp; (zz == ZZ_1_byte || zz == ZZ_2_byte)) {</div><div class='add'>+			len += arc_ldx_r(BUF(buf, len), REG_LO(rd),</div><div class='add'>+					 arc_reg_mem, off, zz);</div><div class='add'>+		} else {</div><div class='add'>+			len += arc_ld_r(BUF(buf, len), REG_LO(rd),</div><div class='add'>+					arc_reg_mem, off, zz);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (sign_ext) {</div><div class='add'>+			/* Propagate the sign bit to the higher reg. */</div><div class='add'>+			len += arc_asri_r(BUF(buf, len),</div><div class='add'>+					  REG_HI(rd), REG_LO(rd), 31);</div><div class='add'>+		} else {</div><div class='add'>+			len += arc_movi_r(BUF(buf, len), REG_HI(rd), 0);</div><div class='add'>+		}</div><div class='add'>+	} else if (size == BPF_DW) {</div><div class='add'>+		/*</div><div class='add'>+		 * We are about to issue 2 consecutive loads:</div><div class='add'>+		 *</div><div class='add'>+		 *   ld rx, [rb, off+0]</div><div class='add'>+		 *   ld ry, [rb, off+4]</div><div class='add'>+		 *</div><div class='add'>+		 * If "rx" and "rb" are the same registers, then the order</div><div class='add'>+		 * should change to guarantee that "rb" remains intact</div><div class='add'>+		 * during these 2 operations:</div><div class='add'>+		 *</div><div class='add'>+		 *   ld ry, [rb, off+4]</div><div class='add'>+		 *   ld rx, [rb, off+0]</div><div class='add'>+		 */</div><div class='add'>+		if (REG_LO(rd) != arc_reg_mem) {</div><div class='add'>+			len += arc_ld_r(BUF(buf, len), REG_LO(rd), arc_reg_mem,</div><div class='add'>+					off, ZZ_4_byte);</div><div class='add'>+			len += arc_ld_r(BUF(buf, len), REG_HI(rd), arc_reg_mem,</div><div class='add'>+					off + 4, ZZ_4_byte);</div><div class='add'>+		} else {</div><div class='add'>+			len += arc_ld_r(BUF(buf, len), REG_HI(rd), arc_reg_mem,</div><div class='add'>+					off + 4, ZZ_4_byte);</div><div class='add'>+			len += arc_ld_r(BUF(buf, len), REG_LO(rd), arc_reg_mem,</div><div class='add'>+					off, ZZ_4_byte);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 add_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_add_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 add_r32_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	if (IN_U6_RANGE(imm))</div><div class='add'>+		return arc_addi_r(buf, REG_LO(rd), imm);</div><div class='add'>+	else</div><div class='add'>+		return arc_add_i(buf, REG_LO(rd), REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 add_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_addf_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+	len += arc_adc_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 add_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	if (IN_U6_RANGE(imm)) {</div><div class='add'>+		len  = arc_addif_r(buf, REG_LO(rd), imm);</div><div class='add'>+		len += arc_adci_r(BUF(buf, len), REG_HI(rd), 0);</div><div class='add'>+	} else {</div><div class='add'>+		len  = mov_r64_i32(buf, JIT_REG_TMP, imm);</div><div class='add'>+		len += add_r64(BUF(buf, len), rd, JIT_REG_TMP);</div><div class='add'>+	}</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 sub_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_sub_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 sub_r32_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	if (IN_U6_RANGE(imm))</div><div class='add'>+		return arc_subi_r(buf, REG_LO(rd), imm);</div><div class='add'>+	else</div><div class='add'>+		return arc_sub_i(buf, REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 sub_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_subf_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+	len += arc_sbc_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 sub_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = mov_r64_i32(buf, JIT_REG_TMP, imm);</div><div class='add'>+	len += sub_r64(BUF(buf, len), rd, JIT_REG_TMP);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 cmp_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_cmp_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 neg_r32(u8 *buf, u8 r)</div><div class='add'>+{</div><div class='add'>+	return arc_neg_r(buf, REG_LO(r), REG_LO(r));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* In a two's complement system, -r is (~r + 1). */</div><div class='add'>+u8 neg_r64(u8 *buf, u8 r)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_not_r(buf, REG_LO(r), REG_LO(r));</div><div class='add'>+	len += arc_not_r(BUF(buf, len), REG_HI(r), REG_HI(r));</div><div class='add'>+	len += add_r64_i32(BUF(buf, len), r, 1);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mul_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_mpy_r(buf, REG_LO(rd), REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mul_r32_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_mpy_i(buf, REG_LO(rd), REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MUL B, C</div><div class='add'>+ * --------</div><div class='add'>+ * mpy       t0, B_hi, C_lo</div><div class='add'>+ * mpy       t1, B_lo, C_hi</div><div class='add'>+ * mpydu   B_lo, B_lo, C_lo</div><div class='add'>+ * add     B_hi, B_hi,   t0</div><div class='add'>+ * add     B_hi, B_hi,   t1</div><div class='add'>+ */</div><div class='add'>+u8 mul_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 t1   = REG_HI(JIT_REG_TMP);</div><div class='add'>+	const u8 C_lo = REG_LO(rs);</div><div class='add'>+	const u8 C_hi = REG_HI(rs);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_mpy_r(buf, t0, B_hi, C_lo);</div><div class='add'>+	len += arc_mpy_r(BUF(buf, len), t1, B_lo, C_hi);</div><div class='add'>+	len += arc_mpydu_r(BUF(buf, len), B_lo, C_lo);</div><div class='add'>+	len += arc_add_r(BUF(buf, len), B_hi, t0);</div><div class='add'>+	len += arc_add_r(BUF(buf, len), B_hi, t1);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MUL B, imm</div><div class='add'>+ * ----------</div><div class='add'>+ *</div><div class='add'>+ *  To get a 64-bit result from a signed 64x32 multiplication:</div><div class='add'>+ *</div><div class='add'>+ *         B_hi             B_lo   *</div><div class='add'>+ *         sign             imm</div><div class='add'>+ *  -----------------------------</div><div class='add'>+ *  HI(B_lo*imm)     LO(B_lo*imm)  +</div><div class='add'>+ *     B_hi*imm                    +</div><div class='add'>+ *     B_lo*sign</div><div class='add'>+ *  -----------------------------</div><div class='add'>+ *        res_hi           res_lo</div><div class='add'>+ *</div><div class='add'>+ * mpy     t1, B_lo, sign(imm)</div><div class='add'>+ * mpy     t0, B_hi, imm</div><div class='add'>+ * mpydu B_lo, B_lo, imm</div><div class='add'>+ * add   B_hi, B_hi,  t0</div><div class='add'>+ * add   B_hi, B_hi,  t1</div><div class='add'>+ *</div><div class='add'>+ * Note: We can't use signed double multiplication, "mpyd", instead of an</div><div class='add'>+ * unsigned version, "mpydu", and then get rid of the sign adjustments</div><div class='add'>+ * calculated in "t1". The signed multiplication, "mpyd", will consider</div><div class='add'>+ * both operands, "B_lo" and "imm", as signed inputs. However, for this</div><div class='add'>+ * 64x32 multiplication, "B_lo" must be treated as an unsigned number.</div><div class='add'>+ */</div><div class='add'>+u8 mul_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 t1   = REG_HI(JIT_REG_TMP);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	if (imm == 1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Is the sign-extension of the immediate "-1"? */</div><div class='add'>+	if (imm &lt; 0)</div><div class='add'>+		len += arc_neg_r(BUF(buf, len), t1, B_lo);</div><div class='add'>+</div><div class='add'>+	len += arc_mpy_i(BUF(buf, len), t0, B_hi, imm);</div><div class='add'>+	len += arc_mpydu_i(BUF(buf, len), B_lo, imm);</div><div class='add'>+	len += arc_add_r(BUF(buf, len), B_hi, t0);</div><div class='add'>+</div><div class='add'>+	/* Add the "sign*B_lo" part, if necessary. */</div><div class='add'>+	if (imm &lt; 0)</div><div class='add'>+		len += arc_add_r(BUF(buf, len), B_hi, t1);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 div_r32(u8 *buf, u8 rd, u8 rs, bool sign_ext)</div><div class='add'>+{</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		return arc_divs_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+	else</div><div class='add'>+		return arc_divu_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 div_r32_i32(u8 *buf, u8 rd, s32 imm, bool sign_ext)</div><div class='add'>+{</div><div class='add'>+	if (imm == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		return arc_divs_i(buf, REG_LO(rd), imm);</div><div class='add'>+	else</div><div class='add'>+		return arc_divu_i(buf, REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mod_r32(u8 *buf, u8 rd, u8 rs, bool sign_ext)</div><div class='add'>+{</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		return arc_rems_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+	else</div><div class='add'>+		return arc_remu_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 mod_r32_i32(u8 *buf, u8 rd, s32 imm, bool sign_ext)</div><div class='add'>+{</div><div class='add'>+	if (imm == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		return arc_rems_i(buf, REG_LO(rd), imm);</div><div class='add'>+	else</div><div class='add'>+		return arc_remu_i(buf, REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 and_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_and_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 and_r32_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_and_i(buf, REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 and_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_and_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+	len += arc_and_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 and_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = mov_r64_i32(buf, JIT_REG_TMP, imm);</div><div class='add'>+	len += and_r64(BUF(buf, len), rd, JIT_REG_TMP);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 tst_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_tst_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 or_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_or_r(buf, REG_LO(rd), REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 or_r32_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_or_i(buf, REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 or_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_or_r(buf, REG_LO(rd), REG_LO(rd), REG_LO(rs));</div><div class='add'>+	len += arc_or_r(BUF(buf, len), REG_HI(rd), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 or_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = mov_r64_i32(buf, JIT_REG_TMP, imm);</div><div class='add'>+	len += or_r64(BUF(buf, len), rd, JIT_REG_TMP);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 xor_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_xor_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 xor_r32_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_xor_i(buf, REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 xor_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_xor_r(buf, REG_LO(rd), REG_LO(rs));</div><div class='add'>+	len += arc_xor_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 xor_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = mov_r64_i32(buf, JIT_REG_TMP, imm);</div><div class='add'>+	len += xor_r64(BUF(buf, len), rd, JIT_REG_TMP);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* "asl a,b,c" --&gt; "a = (b &lt;&lt; (c &amp; 31))". */</div><div class='add'>+u8 lsh_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_asl_r(buf, REG_LO(rd), REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 lsh_r32_i32(u8 *buf, u8 rd, u8 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_asli_r(buf, REG_LO(rd), REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * algorithm</div><div class='add'>+ * ---------</div><div class='add'>+ * if (n &lt;= 32)</div><div class='add'>+ *   to_hi = lo &gt;&gt; (32-n)   # (32-n) is the negate of "n" in a 5-bit width.</div><div class='add'>+ *   lo &lt;&lt;= n</div><div class='add'>+ *   hi &lt;&lt;= n</div><div class='add'>+ *   hi |= to_hi</div><div class='add'>+ * else</div><div class='add'>+ *   hi = lo &lt;&lt; (n-32)</div><div class='add'>+ *   lo = 0</div><div class='add'>+ *</div><div class='add'>+ * assembly translation for "LSH B, C"</div><div class='add'>+ * (heavily influenced by ARC gcc)</div><div class='add'>+ * -----------------------------------</div><div class='add'>+ * not    t0, C_lo            # The first 3 lines are almost the same as:</div><div class='add'>+ * lsr    t1, B_lo, 1         #   neg   t0, C_lo</div><div class='add'>+ * lsr    t1, t1, t0          #   lsr   t1, B_lo, t0   --&gt; t1 is "to_hi"</div><div class='add'>+ * mov    t0, C_lo*           # with one important difference. In "neg"</div><div class='add'>+ * asl    B_lo, B_lo, t0      # version, when C_lo=0, t1 becomes B_lo while</div><div class='add'>+ * asl    B_hi, B_hi, t0      # it should be 0. The "not" approach instead,</div><div class='add'>+ * or     B_hi, B_hi, t1      # "shift"s t1 once and 31 times, practically</div><div class='add'>+ * btst   t0, 5               # setting it to 0 when C_lo=0.</div><div class='add'>+ * mov.ne B_hi, B_lo**</div><div class='add'>+ * mov.ne B_lo, 0</div><div class='add'>+ *</div><div class='add'>+ * *The "mov t0, C_lo" is necessary to cover the cases that C is the same</div><div class='add'>+ * register as B.</div><div class='add'>+ *</div><div class='add'>+ * **ARC performs a shift in this manner: B &lt;&lt;= (C &amp; 31)</div><div class='add'>+ * For 32&lt;=n&lt;64, "n-32" and "n&amp;31" are the same. Therefore, "B &lt;&lt; n" and</div><div class='add'>+ * "B &lt;&lt; (n-32)" yield the same results. e.g. the results of "B &lt;&lt; 35" and</div><div class='add'>+ * "B &lt;&lt; 3" are the same.</div><div class='add'>+ *</div><div class='add'>+ * The behaviour is undefined for n &gt;= 64.</div><div class='add'>+ */</div><div class='add'>+u8 lsh_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 t1   = REG_HI(JIT_REG_TMP);</div><div class='add'>+	const u8 C_lo = REG_LO(rs);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_not_r(buf, t0, C_lo);</div><div class='add'>+	len += arc_lsri_r(BUF(buf, len), t1, B_lo, 1);</div><div class='add'>+	len += arc_lsr_r(BUF(buf, len), t1, t1, t0);</div><div class='add'>+	len += arc_mov_r(BUF(buf, len), t0, C_lo);</div><div class='add'>+	len += arc_asl_r(BUF(buf, len), B_lo, B_lo, t0);</div><div class='add'>+	len += arc_asl_r(BUF(buf, len), B_hi, B_hi, t0);</div><div class='add'>+	len += arc_or_r(BUF(buf, len), B_hi, B_hi, t1);</div><div class='add'>+	len += arc_btst_i(BUF(buf, len), t0, 5);</div><div class='add'>+	len += arc_mov_cc_r(BUF(buf, len), CC_unequal, B_hi, B_lo);</div><div class='add'>+	len += arc_movu_cc_r(BUF(buf, len), CC_unequal, B_lo, 0);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * if (n &lt; 32)</div><div class='add'>+ *   to_hi = B_lo &gt;&gt; 32-n          # extract upper n bits</div><div class='add'>+ *   lo &lt;&lt;= n</div><div class='add'>+ *   hi &lt;&lt;=n</div><div class='add'>+ *   hi |= to_hi</div><div class='add'>+ * else if (n &lt; 64)</div><div class='add'>+ *   hi = lo &lt;&lt; n-32</div><div class='add'>+ *   lo = 0</div><div class='add'>+ */</div><div class='add'>+u8 lsh_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	const u8 n    = (u8)imm;</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	if (n == 0) {</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (n &lt;= 31) {</div><div class='add'>+		len  = arc_lsri_r(buf, t0, B_lo, 32 - n);</div><div class='add'>+		len += arc_asli_r(BUF(buf, len), B_lo, B_lo, n);</div><div class='add'>+		len += arc_asli_r(BUF(buf, len), B_hi, B_hi, n);</div><div class='add'>+		len += arc_or_r(BUF(buf, len), B_hi, B_hi, t0);</div><div class='add'>+	} else if (n &lt;= 63) {</div><div class='add'>+		len  = arc_asli_r(buf, B_hi, B_lo, n - 32);</div><div class='add'>+		len += arc_movi_r(BUF(buf, len), B_lo, 0);</div><div class='add'>+	}</div><div class='add'>+	/* n &gt;= 64 is undefined behaviour. */</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* "lsr a,b,c" --&gt; "a = (b &gt;&gt; (c &amp; 31))". */</div><div class='add'>+u8 rsh_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_lsr_r(buf, REG_LO(rd), REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 rsh_r32_i32(u8 *buf, u8 rd, u8 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_lsri_r(buf, REG_LO(rd), REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For better commentary, see lsh_r64().</div><div class='add'>+ *</div><div class='add'>+ * algorithm</div><div class='add'>+ * ---------</div><div class='add'>+ * if (n &lt;= 32)</div><div class='add'>+ *   to_lo = hi &lt;&lt; (32-n)</div><div class='add'>+ *   hi &gt;&gt;= n</div><div class='add'>+ *   lo &gt;&gt;= n</div><div class='add'>+ *   lo |= to_lo</div><div class='add'>+ * else</div><div class='add'>+ *   lo = hi &gt;&gt; (n-32)</div><div class='add'>+ *   hi = 0</div><div class='add'>+ *</div><div class='add'>+ * RSH    B,C</div><div class='add'>+ * ----------</div><div class='add'>+ * not    t0, C_lo</div><div class='add'>+ * asl    t1, B_hi, 1</div><div class='add'>+ * asl    t1, t1, t0</div><div class='add'>+ * mov    t0, C_lo</div><div class='add'>+ * lsr    B_hi, B_hi, t0</div><div class='add'>+ * lsr    B_lo, B_lo, t0</div><div class='add'>+ * or     B_lo, B_lo, t1</div><div class='add'>+ * btst   t0, 5</div><div class='add'>+ * mov.ne B_lo, B_hi</div><div class='add'>+ * mov.ne B_hi, 0</div><div class='add'>+ */</div><div class='add'>+u8 rsh_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 t1   = REG_HI(JIT_REG_TMP);</div><div class='add'>+	const u8 C_lo = REG_LO(rs);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_not_r(buf, t0, C_lo);</div><div class='add'>+	len += arc_asli_r(BUF(buf, len), t1, B_hi, 1);</div><div class='add'>+	len += arc_asl_r(BUF(buf, len), t1, t1, t0);</div><div class='add'>+	len += arc_mov_r(BUF(buf, len), t0, C_lo);</div><div class='add'>+	len += arc_lsr_r(BUF(buf, len), B_hi, B_hi, t0);</div><div class='add'>+	len += arc_lsr_r(BUF(buf, len), B_lo, B_lo, t0);</div><div class='add'>+	len += arc_or_r(BUF(buf, len), B_lo, B_lo, t1);</div><div class='add'>+	len += arc_btst_i(BUF(buf, len), t0, 5);</div><div class='add'>+	len += arc_mov_cc_r(BUF(buf, len), CC_unequal, B_lo, B_hi);</div><div class='add'>+	len += arc_movu_cc_r(BUF(buf, len), CC_unequal, B_hi, 0);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * if (n &lt; 32)</div><div class='add'>+ *   to_lo = B_lo &lt;&lt; 32-n     # extract lower n bits, right-padded with 32-n 0s</div><div class='add'>+ *   lo &gt;&gt;=n</div><div class='add'>+ *   hi &gt;&gt;=n</div><div class='add'>+ *   hi |= to_lo</div><div class='add'>+ * else if (n &lt; 64)</div><div class='add'>+ *   lo = hi &gt;&gt; n-32</div><div class='add'>+ *   hi = 0</div><div class='add'>+ */</div><div class='add'>+u8 rsh_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	const u8 n    = (u8)imm;</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	if (n == 0) {</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (n &lt;= 31) {</div><div class='add'>+		len  = arc_asli_r(buf, t0, B_hi, 32 - n);</div><div class='add'>+		len += arc_lsri_r(BUF(buf, len), B_lo, B_lo, n);</div><div class='add'>+		len += arc_lsri_r(BUF(buf, len), B_hi, B_hi, n);</div><div class='add'>+		len += arc_or_r(BUF(buf, len), B_lo, B_lo, t0);</div><div class='add'>+	} else if (n &lt;= 63) {</div><div class='add'>+		len  = arc_lsri_r(buf, B_lo, B_hi, n - 32);</div><div class='add'>+		len += arc_movi_r(BUF(buf, len), B_hi, 0);</div><div class='add'>+	}</div><div class='add'>+	/* n &gt;= 64 is undefined behaviour. */</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* "asr a,b,c" --&gt; "a = (b s&gt;&gt; (c &amp; 31))". */</div><div class='add'>+u8 arsh_r32(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	return arc_asr_r(buf, REG_LO(rd), REG_LO(rd), REG_LO(rs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 arsh_r32_i32(u8 *buf, u8 rd, u8 imm)</div><div class='add'>+{</div><div class='add'>+	return arc_asri_r(buf, REG_LO(rd), REG_LO(rd), imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For comparison, see rsh_r64().</div><div class='add'>+ *</div><div class='add'>+ * algorithm</div><div class='add'>+ * ---------</div><div class='add'>+ * if (n &lt;= 32)</div><div class='add'>+ *   to_lo = hi &lt;&lt; (32-n)</div><div class='add'>+ *   hi s&gt;&gt;= n</div><div class='add'>+ *   lo  &gt;&gt;= n</div><div class='add'>+ *   lo |= to_lo</div><div class='add'>+ * else</div><div class='add'>+ *   hi_sign = hi s&gt;&gt;31</div><div class='add'>+ *   lo = hi s&gt;&gt; (n-32)</div><div class='add'>+ *   hi = hi_sign</div><div class='add'>+ *</div><div class='add'>+ * ARSH   B,C</div><div class='add'>+ * ----------</div><div class='add'>+ * not    t0, C_lo</div><div class='add'>+ * asl    t1, B_hi, 1</div><div class='add'>+ * asl    t1, t1, t0</div><div class='add'>+ * mov    t0, C_lo</div><div class='add'>+ * asr    B_hi, B_hi, t0</div><div class='add'>+ * lsr    B_lo, B_lo, t0</div><div class='add'>+ * or     B_lo, B_lo, t1</div><div class='add'>+ * btst   t0, 5</div><div class='add'>+ * asr    t0, B_hi, 31        # now, t0 = 0 or -1 based on B_hi's sign</div><div class='add'>+ * mov.ne B_lo, B_hi</div><div class='add'>+ * mov.ne B_hi, t0</div><div class='add'>+ */</div><div class='add'>+u8 arsh_r64(u8 *buf, u8 rd, u8 rs)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 t1   = REG_HI(JIT_REG_TMP);</div><div class='add'>+	const u8 C_lo = REG_LO(rs);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_not_r(buf, t0, C_lo);</div><div class='add'>+	len += arc_asli_r(BUF(buf, len), t1, B_hi, 1);</div><div class='add'>+	len += arc_asl_r(BUF(buf, len), t1, t1, t0);</div><div class='add'>+	len += arc_mov_r(BUF(buf, len), t0, C_lo);</div><div class='add'>+	len += arc_asr_r(BUF(buf, len), B_hi, B_hi, t0);</div><div class='add'>+	len += arc_lsr_r(BUF(buf, len), B_lo, B_lo, t0);</div><div class='add'>+	len += arc_or_r(BUF(buf, len), B_lo, B_lo, t1);</div><div class='add'>+	len += arc_btst_i(BUF(buf, len), t0, 5);</div><div class='add'>+	len += arc_asri_r(BUF(buf, len), t0, B_hi, 31);</div><div class='add'>+	len += arc_mov_cc_r(BUF(buf, len), CC_unequal, B_lo, B_hi);</div><div class='add'>+	len += arc_mov_cc_r(BUF(buf, len), CC_unequal, B_hi, t0);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * if (n &lt; 32)</div><div class='add'>+ *   to_lo = lo &lt;&lt; 32-n     # extract lower n bits, right-padded with 32-n 0s</div><div class='add'>+ *   lo &gt;&gt;=n</div><div class='add'>+ *   hi s&gt;&gt;=n</div><div class='add'>+ *   hi |= to_lo</div><div class='add'>+ * else if (n &lt; 64)</div><div class='add'>+ *   lo = hi s&gt;&gt; n-32</div><div class='add'>+ *   hi = (lo[msb] ? -1 : 0)</div><div class='add'>+ */</div><div class='add'>+u8 arsh_r64_i32(u8 *buf, u8 rd, s32 imm)</div><div class='add'>+{</div><div class='add'>+	const u8 t0   = REG_LO(JIT_REG_TMP);</div><div class='add'>+	const u8 B_lo = REG_LO(rd);</div><div class='add'>+	const u8 B_hi = REG_HI(rd);</div><div class='add'>+	const u8 n    = (u8)imm;</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	if (n == 0) {</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (n &lt;= 31) {</div><div class='add'>+		len  = arc_asli_r(buf, t0, B_hi, 32 - n);</div><div class='add'>+		len += arc_lsri_r(BUF(buf, len), B_lo, B_lo, n);</div><div class='add'>+		len += arc_asri_r(BUF(buf, len), B_hi, B_hi, n);</div><div class='add'>+		len += arc_or_r(BUF(buf, len), B_lo, B_lo, t0);</div><div class='add'>+	} else if (n &lt;= 63) {</div><div class='add'>+		len  = arc_asri_r(buf, B_lo, B_hi, n - 32);</div><div class='add'>+		len += arc_movi_r(BUF(buf, len), B_hi, -1);</div><div class='add'>+		len += arc_btst_i(BUF(buf, len), B_lo, 31);</div><div class='add'>+		len += arc_movu_cc_r(BUF(buf, len), CC_equal, B_hi, 0);</div><div class='add'>+	}</div><div class='add'>+	/* n &gt;= 64 is undefined behaviour. */</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 gen_swap(u8 *buf, u8 rd, u8 size, u8 endian, bool force, bool do_zext)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+	const u8 host_endian = BPF_FROM_BE;</div><div class='add'>+#else</div><div class='add'>+	const u8 host_endian = BPF_FROM_LE;</div><div class='add'>+#endif</div><div class='add'>+	if (host_endian != endian || force) {</div><div class='add'>+		switch (size) {</div><div class='add'>+		case 16:</div><div class='add'>+			/*</div><div class='add'>+			 * r = B4B3_B2B1 &lt;&lt; 16 --&gt; r = B2B1_0000</div><div class='add'>+			 * then, swape(r) would become the desired 0000_B1B2</div><div class='add'>+			 */</div><div class='add'>+			len = arc_asli_r(buf, REG_LO(rd), REG_LO(rd), 16);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case 32:</div><div class='add'>+			len += arc_swape_r(BUF(buf, len), REG_LO(rd));</div><div class='add'>+			if (do_zext)</div><div class='add'>+				len += zext(BUF(buf, len), rd);</div><div class='add'>+			break;</div><div class='add'>+		case 64:</div><div class='add'>+			/*</div><div class='add'>+			 * swap "hi" and "lo":</div><div class='add'>+			 *   hi ^= lo;</div><div class='add'>+			 *   lo ^= hi;</div><div class='add'>+			 *   hi ^= lo;</div><div class='add'>+			 * and then swap the bytes in "hi" and "lo".</div><div class='add'>+			 */</div><div class='add'>+			len  = arc_xor_r(buf, REG_HI(rd), REG_LO(rd));</div><div class='add'>+			len += arc_xor_r(BUF(buf, len), REG_LO(rd), REG_HI(rd));</div><div class='add'>+			len += arc_xor_r(BUF(buf, len), REG_HI(rd), REG_LO(rd));</div><div class='add'>+			len += arc_swape_r(BUF(buf, len), REG_LO(rd));</div><div class='add'>+			len += arc_swape_r(BUF(buf, len), REG_HI(rd));</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* The caller must have handled this. */</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * If the same endianness, there's not much to do other</div><div class='add'>+		 * than zeroing out the upper bytes based on the "size".</div><div class='add'>+		 */</div><div class='add'>+		switch (size) {</div><div class='add'>+		case 16:</div><div class='add'>+			len = arc_and_i(buf, REG_LO(rd), 0xffff);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case 32:</div><div class='add'>+			if (do_zext)</div><div class='add'>+				len += zext(BUF(buf, len), rd);</div><div class='add'>+			break;</div><div class='add'>+		case 64:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* The caller must have handled this. */</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * To create a frame, all that is needed is:</div><div class='add'>+ *</div><div class='add'>+ *  push fp</div><div class='add'>+ *  mov  fp, sp</div><div class='add'>+ *  sub  sp, &lt;frame_size&gt;</div><div class='add'>+ *</div><div class='add'>+ * "push fp" is taken care of separately while saving the clobbered registers.</div><div class='add'>+ * All that remains is copying SP value to FP and shrinking SP's address space</div><div class='add'>+ * for any possible function call to come.</div><div class='add'>+ */</div><div class='add'>+static inline u8 frame_create(u8 *buf, u16 size)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len = arc_mov_r(buf, ARC_R_FP, ARC_R_SP);</div><div class='add'>+	if (IN_U6_RANGE(size))</div><div class='add'>+		len += arc_subi_r(BUF(buf, len), ARC_R_SP, size);</div><div class='add'>+	else</div><div class='add'>+		len += arc_sub_i(BUF(buf, len), ARC_R_SP, size);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * mov sp, fp</div><div class='add'>+ *</div><div class='add'>+ * The value of SP upon entering was copied to FP.</div><div class='add'>+ */</div><div class='add'>+static inline u8 frame_restore(u8 *buf)</div><div class='add'>+{</div><div class='add'>+	return arc_mov_r(buf, ARC_R_SP, ARC_R_FP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Going from a JITed code to the native caller:</div><div class='add'>+ *</div><div class='add'>+ * mov ARC_ABI_RET_lo, BPF_REG_0_lo     # r0 &lt;- r8</div><div class='add'>+ * mov ARC_ABI_RET_hi, BPF_REG_0_hi     # r1 &lt;- r9</div><div class='add'>+ */</div><div class='add'>+static u8 bpf_to_arc_return(u8 *buf)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_mov_r(buf, ARC_R_0, REG_LO(BPF_REG_0));</div><div class='add'>+	len += arc_mov_r(BUF(buf, len), ARC_R_1, REG_HI(BPF_REG_0));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Coming back from an external (in-kernel) function to the JITed code:</div><div class='add'>+ *</div><div class='add'>+ * mov ARC_ABI_RET_lo, BPF_REG_0_lo     # r8 &lt;- r0</div><div class='add'>+ * mov ARC_ABI_RET_hi, BPF_REG_0_hi     # r9 &lt;- r1</div><div class='add'>+ */</div><div class='add'>+u8 arc_to_bpf_return(u8 *buf)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_mov_r(buf, REG_LO(BPF_REG_0), ARC_R_0);</div><div class='add'>+	len += arc_mov_r(BUF(buf, len), REG_HI(BPF_REG_0), ARC_R_1);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This translation leads to:</div><div class='add'>+ *</div><div class='add'>+ *   mov r10, addr                # always an 8-byte instruction</div><div class='add'>+ *   jl  [r10]</div><div class='add'>+ *</div><div class='add'>+ * The length of the "mov" must be fixed (8), otherwise it may diverge</div><div class='add'>+ * during the normal and extra passes:</div><div class='add'>+ *</div><div class='add'>+ *          normal pass                  extra pass</div><div class='add'>+ *</div><div class='add'>+ *   180:  mov     r10,0        |   180:  mov     r10,0x700578d8</div><div class='add'>+ *   184:  jl      [r10]        |   188:  jl      [r10]</div><div class='add'>+ *   188:  add.f   r16,r16,0x1  |   18c:  adc     r17,r17,0</div><div class='add'>+ *   18c:  adc     r17,r17,0    |</div><div class='add'>+ *</div><div class='add'>+ * In the above example, the change from "r10 &lt;- 0" to "r10 &lt;- 0x700578d8"</div><div class='add'>+ * has led to an increase in the length of the "mov" instruction.</div><div class='add'>+ * Inadvertently, that caused the loss of the "add.f" instruction.</div><div class='add'>+ */</div><div class='add'>+static u8 jump_and_link(u8 *buf, u32 addr)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	len  = arc_mov_i_fixed(buf, REG_LO(JIT_REG_TMP), addr);</div><div class='add'>+	len += arc_jl(BUF(buf, len), REG_LO(JIT_REG_TMP));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function determines which ARC registers must be saved and restored.</div><div class='add'>+ * It does so by looking into:</div><div class='add'>+ *</div><div class='add'>+ * "bpf_reg": The clobbered (destination) BPF register</div><div class='add'>+ * "is_call": Indicator if the current instruction is a call</div><div class='add'>+ *</div><div class='add'>+ * When a register of interest is clobbered, its corresponding bit position</div><div class='add'>+ * in return value, "usage", is set to true.</div><div class='add'>+ */</div><div class='add'>+u32 mask_for_used_regs(u8 bpf_reg, bool is_call)</div><div class='add'>+{</div><div class='add'>+	u32 usage = 0;</div><div class='add'>+</div><div class='add'>+	/* BPF registers that must be saved. */</div><div class='add'>+	if (bpf_reg &gt;= BPF_REG_6 &amp;&amp; bpf_reg &lt;= BPF_REG_9) {</div><div class='add'>+		usage |= BIT(REG_LO(bpf_reg));</div><div class='add'>+		usage |= BIT(REG_HI(bpf_reg));</div><div class='add'>+	/*</div><div class='add'>+	 * Using the frame pointer register implies that it should</div><div class='add'>+	 * be saved and reinitialised with the current frame data.</div><div class='add'>+	 */</div><div class='add'>+	} else if (bpf_reg == BPF_REG_FP) {</div><div class='add'>+		usage |= BIT(REG_LO(BPF_REG_FP));</div><div class='add'>+	/* Could there be some ARC registers that must to be saved? */</div><div class='add'>+	} else {</div><div class='add'>+		if (REG_LO(bpf_reg) &gt;= ARC_CALLEE_SAVED_REG_FIRST &amp;&amp;</div><div class='add'>+		    REG_LO(bpf_reg) &lt;= ARC_CALLEE_SAVED_REG_LAST)</div><div class='add'>+			usage |= BIT(REG_LO(bpf_reg));</div><div class='add'>+</div><div class='add'>+		if (REG_HI(bpf_reg) &gt;= ARC_CALLEE_SAVED_REG_FIRST &amp;&amp;</div><div class='add'>+		    REG_HI(bpf_reg) &lt;= ARC_CALLEE_SAVED_REG_LAST)</div><div class='add'>+			usage |= BIT(REG_HI(bpf_reg));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* A "call" indicates that ARC's "blink" reg must be saved. */</div><div class='add'>+	usage |= is_call ? BIT(ARC_R_BLINK) : 0;</div><div class='add'>+</div><div class='add'>+	return usage;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * push blink             # if blink is marked as clobbered</div><div class='add'>+ * push r[0-n]            # if r[i] is marked as clobbered</div><div class='add'>+ * push fp                # if fp is marked as clobbered</div><div class='add'>+ * mov  fp, sp            # if frame_size &gt; 0 (clobbers fp)</div><div class='add'>+ * sub  sp, &lt;frame_size&gt;  # same as above</div><div class='add'>+ */</div><div class='add'>+u8 arc_prologue(u8 *buf, u32 usage, u16 frame_size)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+	u32 gp_regs = 0;</div><div class='add'>+</div><div class='add'>+	/* Deal with blink first. */</div><div class='add'>+	if (usage &amp; BIT(ARC_R_BLINK))</div><div class='add'>+		len += arc_push_r(BUF(buf, len), ARC_R_BLINK);</div><div class='add'>+</div><div class='add'>+	gp_regs = usage &amp; ~(BIT(ARC_R_BLINK) | BIT(ARC_R_FP));</div><div class='add'>+	while (gp_regs) {</div><div class='add'>+		u8 reg = __builtin_ffs(gp_regs) - 1;</div><div class='add'>+</div><div class='add'>+		len += arc_push_r(BUF(buf, len), reg);</div><div class='add'>+		gp_regs &amp;= ~BIT(reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Deal with fp last. */</div><div class='add'>+	if ((usage &amp; BIT(ARC_R_FP)) || frame_size &gt; 0)</div><div class='add'>+		len += arc_push_r(BUF(buf, len), ARC_R_FP);</div><div class='add'>+</div><div class='add'>+	if (frame_size &gt; 0)</div><div class='add'>+		len += frame_create(BUF(buf, len), frame_size);</div><div class='add'>+</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	if ((usage &amp; BIT(ARC_R_FP)) &amp;&amp; frame_size == 0) {</div><div class='add'>+		pr_err("FP is being saved while there is no frame.");</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * mov  sp, fp            # if frame_size &gt; 0</div><div class='add'>+ * pop  fp                # if fp is marked as clobbered</div><div class='add'>+ * pop  r[n-0]            # if r[i] is marked as clobbered</div><div class='add'>+ * pop  blink             # if blink is marked as clobbered</div><div class='add'>+ * mov  r0, r8            # always: ABI_return &lt;- BPF_return</div><div class='add'>+ * mov  r1, r9            # continuation of above</div><div class='add'>+ * j    [blink]           # always</div><div class='add'>+ *</div><div class='add'>+ * "fp being marked as clobbered" and "frame_size &gt; 0" are the two sides of</div><div class='add'>+ * the same coin.</div><div class='add'>+ */</div><div class='add'>+u8 arc_epilogue(u8 *buf, u32 usage, u16 frame_size)</div><div class='add'>+{</div><div class='add'>+	u32 len = 0;</div><div class='add'>+	u32 gp_regs = 0;</div><div class='add'>+</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	if ((usage &amp; BIT(ARC_R_FP)) &amp;&amp; frame_size == 0) {</div><div class='add'>+		pr_err("FP is being saved while there is no frame.");</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (frame_size &gt; 0)</div><div class='add'>+		len += frame_restore(BUF(buf, len));</div><div class='add'>+</div><div class='add'>+	/* Deal with fp first. */</div><div class='add'>+	if ((usage &amp; BIT(ARC_R_FP)) || frame_size &gt; 0)</div><div class='add'>+		len += arc_pop_r(BUF(buf, len), ARC_R_FP);</div><div class='add'>+</div><div class='add'>+	gp_regs = usage &amp; ~(BIT(ARC_R_BLINK) | BIT(ARC_R_FP));</div><div class='add'>+	while (gp_regs) {</div><div class='add'>+		/* "usage" is 32-bit, each bit indicating an ARC register. */</div><div class='add'>+		u8 reg = 31 - __builtin_clz(gp_regs);</div><div class='add'>+</div><div class='add'>+		len += arc_pop_r(BUF(buf, len), reg);</div><div class='add'>+		gp_regs &amp;= ~BIT(reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Deal with blink last. */</div><div class='add'>+	if (usage &amp; BIT(ARC_R_BLINK))</div><div class='add'>+		len += arc_pop_r(BUF(buf, len), ARC_R_BLINK);</div><div class='add'>+</div><div class='add'>+	/* Wrap up the return value and jump back to the caller. */</div><div class='add'>+	len += bpf_to_arc_return(BUF(buf, len));</div><div class='add'>+	len += arc_jmp_return(BUF(buf, len));</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For details on the algorithm, see the comments of "gen_jcc_64()".</div><div class='add'>+ *</div><div class='add'>+ * This data structure is holding information for jump translations.</div><div class='add'>+ *</div><div class='add'>+ * jit_off: How many bytes into the current JIT address, "b"ranch insn. occurs</div><div class='add'>+ * cond: The condition that the ARC branch instruction must use</div><div class='add'>+ *</div><div class='add'>+ * e.g.:</div><div class='add'>+ *</div><div class='add'>+ * BPF_JGE  R1, R0, @target</div><div class='add'>+ * ------------------------</div><div class='add'>+ *            |</div><div class='add'>+ *            v</div><div class='add'>+ * 0x1000: cmp  r3, r1     # 0x1000 is the JIT address for "BPF_JGE ..." insn</div><div class='add'>+ * 0x1004: bhi  @target    # first jump (branch higher)</div><div class='add'>+ * 0x1008: blo  @end       # second jump acting as a skip (end is 0x1014)</div><div class='add'>+ * 0x100C: cmp  r2, r0     # the lower 32 bits are evaluated</div><div class='add'>+ * 0x1010: bhs  @target    # third jump (branch higher or same)</div><div class='add'>+ * 0x1014: ...</div><div class='add'>+ *</div><div class='add'>+ * The jit_off(set) of the "bhi" is 4 bytes.</div><div class='add'>+ * The cond(ition) for the "bhi" is "CC_great_u".</div><div class='add'>+ *</div><div class='add'>+ * The jit_off(set) is necessary for calculating the exact displacement</div><div class='add'>+ * to the "target" address:</div><div class='add'>+ *</div><div class='add'>+ * jit_address + jit_off(set) - @target</div><div class='add'>+ * 0x1000      + 4            - @target</div><div class='add'>+ */</div><div class='add'>+#define JCC64_NR_OF_JMPS 3	/* Number of jumps in jcc64 template. */</div><div class='add'>+#define JCC64_INSNS_TO_END 3	/* Number of insn. inclusive the 2nd jmp to end. */</div><div class='add'>+#define JCC64_SKIP_JMP 1	/* Index of the "skip" jump to "end". */</div><div class='add'>+const struct {</div><div class='add'>+	/*</div><div class='add'>+	 * "jit_off" is common between all "jmp[]" and is coupled with</div><div class='add'>+	 * "cond" of each "jmp[]" instance. e.g.:</div><div class='add'>+	 *</div><div class='add'>+	 * arcv2_64_jccs.jit_off[1]</div><div class='add'>+	 * arcv2_64_jccs.jmp[ARC_CC_UGT].cond[1]</div><div class='add'>+	 *</div><div class='add'>+	 * Are indicating that the second jump in JITed code of "UGT"</div><div class='add'>+	 * is at offset "jit_off[1]" while its condition is "cond[1]".</div><div class='add'>+	 */</div><div class='add'>+	u8 jit_off[JCC64_NR_OF_JMPS];</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u8 cond[JCC64_NR_OF_JMPS];</div><div class='add'>+	} jmp[ARC_CC_SLE + 1];</div><div class='add'>+} arcv2_64_jccs = {</div><div class='add'>+	.jit_off = {</div><div class='add'>+		INSN_len_normal * 1,</div><div class='add'>+		INSN_len_normal * 2,</div><div class='add'>+		INSN_len_normal * 4</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   bhi  @target         # 1: u&gt;</div><div class='add'>+	 *   blo  @end            # 2: u&lt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   bhi  @target         # 3: u&gt;</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_UGT] = {</div><div class='add'>+		.cond = {CC_great_u, CC_less_u, CC_great_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   bhi  @target         # 1: u&gt;</div><div class='add'>+	 *   blo  @end            # 2: u&lt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   bhs  @target         # 3: u&gt;=</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_UGE] = {</div><div class='add'>+		.cond = {CC_great_u, CC_less_u, CC_great_eq_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   blo  @target         # 1: u&lt;</div><div class='add'>+	 *   bhi  @end            # 2: u&gt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   blo  @target         # 3: u&lt;</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_ULT] = {</div><div class='add'>+		.cond = {CC_less_u, CC_great_u, CC_less_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   blo  @target         # 1: u&lt;</div><div class='add'>+	 *   bhi  @end            # 2: u&gt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   bls  @target         # 3: u&lt;=</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_ULE] = {</div><div class='add'>+		.cond = {CC_less_u, CC_great_u, CC_less_eq_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   bgt  @target         # 1: s&gt;</div><div class='add'>+	 *   blt  @end            # 2: s&lt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   bhi  @target         # 3: u&gt;</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_SGT] = {</div><div class='add'>+		.cond = {CC_great_s, CC_less_s, CC_great_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   bgt  @target         # 1: s&gt;</div><div class='add'>+	 *   blt  @end            # 2: s&lt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   bhs  @target         # 3: u&gt;=</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_SGE] = {</div><div class='add'>+		.cond = {CC_great_s, CC_less_s, CC_great_eq_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   blt  @target         # 1: s&lt;</div><div class='add'>+	 *   bgt  @end            # 2: s&gt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   blo  @target         # 3: u&lt;</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_SLT] = {</div><div class='add'>+		.cond = {CC_less_s, CC_great_s, CC_less_u}</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 *   cmp  rd_hi, rs_hi</div><div class='add'>+	 *   blt  @target         # 1: s&lt;</div><div class='add'>+	 *   bgt  @end            # 2: s&gt;</div><div class='add'>+	 *   cmp  rd_lo, rs_lo</div><div class='add'>+	 *   bls  @target         # 3: u&lt;=</div><div class='add'>+	 * end:</div><div class='add'>+	 */</div><div class='add'>+	.jmp[ARC_CC_SLE] = {</div><div class='add'>+		.cond = {CC_less_s, CC_great_s, CC_less_eq_u}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The displacement (offset) for ARC's "b"ranch instruction is the distance</div><div class='add'>+ * from the aligned version of _current_ instruction (PCL) to the target</div><div class='add'>+ * instruction:</div><div class='add'>+ *</div><div class='add'>+ * DISP = TARGET - PCL          # PCL is the word aligned PC</div><div class='add'>+ */</div><div class='add'>+static inline s32 get_displacement(u32 curr_off, u32 targ_off)</div><div class='add'>+{</div><div class='add'>+	return (s32)(targ_off - (curr_off &amp; ~3L));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * "disp"lacement should be:</div><div class='add'>+ *</div><div class='add'>+ * 1. 16-bit aligned.</div><div class='add'>+ * 2. fit in S25, because no "condition code" is supposed to be encoded.</div><div class='add'>+ */</div><div class='add'>+static inline bool is_valid_far_disp(s32 disp)</div><div class='add'>+{</div><div class='add'>+	return (!(disp &amp; 1) &amp;&amp; IN_S25_RANGE(disp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * "disp"lacement should be:</div><div class='add'>+ *</div><div class='add'>+ * 1. 16-bit aligned.</div><div class='add'>+ * 2. fit in S21, because "condition code" is supposed to be encoded too.</div><div class='add'>+ */</div><div class='add'>+static inline bool is_valid_near_disp(s32 disp)</div><div class='add'>+{</div><div class='add'>+	return (!(disp &amp; 1) &amp;&amp; IN_S21_RANGE(disp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cmp        rd_hi, rs_hi</div><div class='add'>+ * cmp.z      rd_lo, rs_lo</div><div class='add'>+ * b{eq,ne}   @target</div><div class='add'>+ *   |  |</div><div class='add'>+ *   |  `--&gt;  "eq" param is false (JNE)</div><div class='add'>+ *   `-----&gt;  "eq" param is true  (JEQ)</div><div class='add'>+ */</div><div class='add'>+static int gen_j_eq_64(u8 *buf, u8 rd, u8 rs, bool eq,</div><div class='add'>+		       u32 curr_off, u32 targ_off)</div><div class='add'>+{</div><div class='add'>+	s32 disp;</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	len += arc_cmp_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	len += arc_cmpz_r(BUF(buf, len), REG_LO(rd), REG_LO(rs));</div><div class='add'>+	disp = get_displacement(curr_off + len, targ_off);</div><div class='add'>+	len += arc_bcc(BUF(buf, len), eq ? CC_equal : CC_unequal, disp);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * tst   rd_hi, rs_hi</div><div class='add'>+ * tst.z rd_lo, rs_lo</div><div class='add'>+ * bne   @target</div><div class='add'>+ */</div><div class='add'>+static u8 gen_jset_64(u8 *buf, u8 rd, u8 rs, u32 curr_off, u32 targ_off)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+	s32 disp;</div><div class='add'>+</div><div class='add'>+	len += arc_tst_r(BUF(buf, len), REG_HI(rd), REG_HI(rs));</div><div class='add'>+	len += arc_tstz_r(BUF(buf, len), REG_LO(rd), REG_LO(rs));</div><div class='add'>+	disp = get_displacement(curr_off + len, targ_off);</div><div class='add'>+	len += arc_bcc(BUF(buf, len), CC_unequal, disp);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Verify if all the jumps for a JITed jcc64 operation are valid,</div><div class='add'>+ * by consulting the data stored at "arcv2_64_jccs".</div><div class='add'>+ */</div><div class='add'>+static bool check_jcc_64(u32 curr_off, u32 targ_off, u8 cond)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	if (cond &gt;= ARC_CC_LAST)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; JCC64_NR_OF_JMPS; i++) {</div><div class='add'>+		u32 from, to;</div><div class='add'>+</div><div class='add'>+		from = curr_off + arcv2_64_jccs.jit_off[i];</div><div class='add'>+		/* for the 2nd jump, we jump to the end of block. */</div><div class='add'>+		if (i != JCC64_SKIP_JMP)</div><div class='add'>+			to = targ_off;</div><div class='add'>+		else</div><div class='add'>+			to = from + (JCC64_INSNS_TO_END * INSN_len_normal);</div><div class='add'>+		/* There is a "cc" in the instruction, so a "near" jump. */</div><div class='add'>+		if (!is_valid_near_disp(get_displacement(from, to)))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Can the jump from "curr_off" to "targ_off" actually happen? */</div><div class='add'>+bool check_jmp_64(u32 curr_off, u32 targ_off, u8 cond)</div><div class='add'>+{</div><div class='add'>+	s32 disp;</div><div class='add'>+</div><div class='add'>+	switch (cond) {</div><div class='add'>+	case ARC_CC_UGT:</div><div class='add'>+	case ARC_CC_UGE:</div><div class='add'>+	case ARC_CC_ULT:</div><div class='add'>+	case ARC_CC_ULE:</div><div class='add'>+	case ARC_CC_SGT:</div><div class='add'>+	case ARC_CC_SGE:</div><div class='add'>+	case ARC_CC_SLT:</div><div class='add'>+	case ARC_CC_SLE:</div><div class='add'>+		return check_jcc_64(curr_off, targ_off, cond);</div><div class='add'>+	case ARC_CC_EQ:</div><div class='add'>+	case ARC_CC_NE:</div><div class='add'>+	case ARC_CC_SET:</div><div class='add'>+		/*</div><div class='add'>+		 * The "jump" for the JITed BPF_J{SET,EQ,NE} is actually the</div><div class='add'>+		 * 3rd instruction. See comments of "gen_j{set,_eq}_64()".</div><div class='add'>+		 */</div><div class='add'>+		curr_off += 2 * INSN_len_normal;</div><div class='add'>+		disp = get_displacement(curr_off, targ_off);</div><div class='add'>+		/* There is a "cc" field in the issued instruction. */</div><div class='add'>+		return is_valid_near_disp(disp);</div><div class='add'>+	case ARC_CC_AL:</div><div class='add'>+		disp = get_displacement(curr_off, targ_off);</div><div class='add'>+		return is_valid_far_disp(disp);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The template for the 64-bit jumps with the following BPF conditions</div><div class='add'>+ *</div><div class='add'>+ * u&lt; u&lt;= u&gt; u&gt;= s&lt; s&lt;= s&gt; s&gt;=</div><div class='add'>+ *</div><div class='add'>+ * Looks like below:</div><div class='add'>+ *</div><div class='add'>+ *   cmp   rd_hi, rs_hi</div><div class='add'>+ *   b&lt;c1&gt; @target</div><div class='add'>+ *   b&lt;c2&gt; @end</div><div class='add'>+ *   cmp   rd_lo, rs_lo   # if execution reaches here, r{d,s}_hi are equal</div><div class='add'>+ *   b&lt;c3&gt; @target</div><div class='add'>+ * end:</div><div class='add'>+ *</div><div class='add'>+ * "c1" is the condition that JIT is handling minus the equality part.</div><div class='add'>+ * For instance if we have to translate an "unsigned greater or equal",</div><div class='add'>+ * then "c1" will be "unsigned greater". We won't know about equality</div><div class='add'>+ * until all 64-bits of data (higeher and lower registers) are processed.</div><div class='add'>+ *</div><div class='add'>+ * "c2" is the counter logic of "c1". For instance, if "c1" is originated</div><div class='add'>+ * from "s&gt;", then "c2" would be "s&lt;". Notice that equality doesn't play</div><div class='add'>+ * a role here either, because the lower 32 bits are not processed yet.</div><div class='add'>+ *</div><div class='add'>+ * "c3" is the unsigned version of "c1", no matter if the BPF condition</div><div class='add'>+ * was signed or unsigned. An unsigned version is necessary, because the</div><div class='add'>+ * MSB of the lower 32 bits does not reflect a sign in the whole 64-bit</div><div class='add'>+ * scheme. Otherwise, 64-bit comparisons like</div><div class='add'>+ * (0x0000_0000,0x8000_0000) s&gt;= (0x0000_0000,0x0000_0000)</div><div class='add'>+ * would yield an incorrect result. Finally, if there is an equality</div><div class='add'>+ * check in the BPF condition, it will be reflected in "c3".</div><div class='add'>+ *</div><div class='add'>+ * You can find all the instances of this template where the</div><div class='add'>+ * "arcv2_64_jccs" is getting initialised.</div><div class='add'>+ */</div><div class='add'>+static u8 gen_jcc_64(u8 *buf, u8 rd, u8 rs, u8 cond,</div><div class='add'>+		     u32 curr_off, u32 targ_off)</div><div class='add'>+{</div><div class='add'>+	s32 disp;</div><div class='add'>+	u32 end_off;</div><div class='add'>+	const u8 *cc = arcv2_64_jccs.jmp[cond].cond;</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	/* cmp rd_hi, rs_hi */</div><div class='add'>+	len += arc_cmp_r(buf, REG_HI(rd), REG_HI(rs));</div><div class='add'>+</div><div class='add'>+	/* b&lt;c1&gt; @target */</div><div class='add'>+	disp = get_displacement(curr_off + len, targ_off);</div><div class='add'>+	len += arc_bcc(BUF(buf, len), cc[0], disp);</div><div class='add'>+</div><div class='add'>+	/* b&lt;c2&gt; @end */</div><div class='add'>+	end_off = curr_off + len + (JCC64_INSNS_TO_END * INSN_len_normal);</div><div class='add'>+	disp = get_displacement(curr_off + len, end_off);</div><div class='add'>+	len += arc_bcc(BUF(buf, len), cc[1], disp);</div><div class='add'>+</div><div class='add'>+	/* cmp rd_lo, rs_lo */</div><div class='add'>+	len += arc_cmp_r(BUF(buf, len), REG_LO(rd), REG_LO(rs));</div><div class='add'>+</div><div class='add'>+	/* b&lt;c3&gt; @target */</div><div class='add'>+	disp = get_displacement(curr_off + len, targ_off);</div><div class='add'>+	len += arc_bcc(BUF(buf, len), cc[2], disp);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function only applies the necessary logic to make the proper</div><div class='add'>+ * translations. All the sanity checks must have already been done</div><div class='add'>+ * by calling the check_jmp_64().</div><div class='add'>+ */</div><div class='add'>+u8 gen_jmp_64(u8 *buf, u8 rd, u8 rs, u8 cond, u32 curr_off, u32 targ_off)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+	bool eq = false;</div><div class='add'>+	s32 disp;</div><div class='add'>+</div><div class='add'>+	switch (cond) {</div><div class='add'>+	case ARC_CC_AL:</div><div class='add'>+		disp = get_displacement(curr_off, targ_off);</div><div class='add'>+		len = arc_b(buf, disp);</div><div class='add'>+		break;</div><div class='add'>+	case ARC_CC_UGT:</div><div class='add'>+	case ARC_CC_UGE:</div><div class='add'>+	case ARC_CC_ULT:</div><div class='add'>+	case ARC_CC_ULE:</div><div class='add'>+	case ARC_CC_SGT:</div><div class='add'>+	case ARC_CC_SGE:</div><div class='add'>+	case ARC_CC_SLT:</div><div class='add'>+	case ARC_CC_SLE:</div><div class='add'>+		len = gen_jcc_64(buf, rd, rs, cond, curr_off, targ_off);</div><div class='add'>+		break;</div><div class='add'>+	case ARC_CC_EQ:</div><div class='add'>+		eq = true;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case ARC_CC_NE:</div><div class='add'>+		len = gen_j_eq_64(buf, rd, rs, eq, curr_off, targ_off);</div><div class='add'>+		break;</div><div class='add'>+	case ARC_CC_SET:</div><div class='add'>+		len = gen_jset_64(buf, rd, rs, curr_off, targ_off);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+		pr_err("64-bit jump condition is not known.");</div><div class='add'>+		BUG();</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The condition codes to use when generating JIT instructions</div><div class='add'>+ * for 32-bit jumps.</div><div class='add'>+ *</div><div class='add'>+ * The "ARC_CC_AL" index is not really used by the code, but it</div><div class='add'>+ * is here for the sake of completeness.</div><div class='add'>+ *</div><div class='add'>+ * The "ARC_CC_SET" becomes "CC_unequal" because of the "tst"</div><div class='add'>+ * instruction that precedes the conditional branch.</div><div class='add'>+ */</div><div class='add'>+const u8 arcv2_32_jmps[ARC_CC_LAST] = {</div><div class='add'>+	[ARC_CC_UGT] = CC_great_u,</div><div class='add'>+	[ARC_CC_UGE] = CC_great_eq_u,</div><div class='add'>+	[ARC_CC_ULT] = CC_less_u,</div><div class='add'>+	[ARC_CC_ULE] = CC_less_eq_u,</div><div class='add'>+	[ARC_CC_SGT] = CC_great_s,</div><div class='add'>+	[ARC_CC_SGE] = CC_great_eq_s,</div><div class='add'>+	[ARC_CC_SLT] = CC_less_s,</div><div class='add'>+	[ARC_CC_SLE] = CC_less_eq_s,</div><div class='add'>+	[ARC_CC_AL]  = CC_always,</div><div class='add'>+	[ARC_CC_EQ]  = CC_equal,</div><div class='add'>+	[ARC_CC_NE]  = CC_unequal,</div><div class='add'>+	[ARC_CC_SET] = CC_unequal</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Can the jump from "curr_off" to "targ_off" actually happen? */</div><div class='add'>+bool check_jmp_32(u32 curr_off, u32 targ_off, u8 cond)</div><div class='add'>+{</div><div class='add'>+	u8 addendum;</div><div class='add'>+	s32 disp;</div><div class='add'>+</div><div class='add'>+	if (cond &gt;= ARC_CC_LAST)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The unconditional jump happens immediately, while the rest</div><div class='add'>+	 * are either preceded by a "cmp" or "tst" instruction.</div><div class='add'>+	 */</div><div class='add'>+	addendum = (cond == ARC_CC_AL) ? 0 : INSN_len_normal;</div><div class='add'>+	disp = get_displacement(curr_off + addendum, targ_off);</div><div class='add'>+</div><div class='add'>+	if (ARC_CC_AL)</div><div class='add'>+		return is_valid_far_disp(disp);</div><div class='add'>+	else</div><div class='add'>+		return is_valid_near_disp(disp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The JITed code for 32-bit (conditional) branches:</div><div class='add'>+ *</div><div class='add'>+ * ARC_CC_AL  @target</div><div class='add'>+ *   b @jit_targ_addr</div><div class='add'>+ *</div><div class='add'>+ * ARC_CC_SET rd, rs, @target</div><div class='add'>+ *   tst rd, rs</div><div class='add'>+ *   bnz @jit_targ_addr</div><div class='add'>+ *</div><div class='add'>+ * ARC_CC_xx  rd, rs, @target</div><div class='add'>+ *   cmp rd, rs</div><div class='add'>+ *   b&lt;cc&gt; @jit_targ_addr            # cc = arcv2_32_jmps[xx]</div><div class='add'>+ */</div><div class='add'>+u8 gen_jmp_32(u8 *buf, u8 rd, u8 rs, u8 cond, u32 curr_off, u32 targ_off)</div><div class='add'>+{</div><div class='add'>+	s32 disp;</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Although this must have already been checked by "check_jmp_32()",</div><div class='add'>+	 * we're not going to risk accessing "arcv2_32_jmps" array without</div><div class='add'>+	 * the boundary check.</div><div class='add'>+	 */</div><div class='add'>+	if (cond &gt;= ARC_CC_LAST) {</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+		pr_err("32-bit jump condition is not known.");</div><div class='add'>+		BUG();</div><div class='add'>+#endif</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If there is a "condition", issue the "cmp" or "tst" first. */</div><div class='add'>+	if (cond != ARC_CC_AL) {</div><div class='add'>+		if (cond == ARC_CC_SET)</div><div class='add'>+			len = tst_r32(buf, rd, rs);</div><div class='add'>+		else</div><div class='add'>+			len = cmp_r32(buf, rd, rs);</div><div class='add'>+		/*</div><div class='add'>+		 * The issued instruction affects the "disp"lacement as</div><div class='add'>+		 * it alters the "curr_off" by its "len"gth. The "curr_off"</div><div class='add'>+		 * should always point to the jump instruction.</div><div class='add'>+		 */</div><div class='add'>+		disp = get_displacement(curr_off + len, targ_off);</div><div class='add'>+		len += arc_bcc(BUF(buf, len), arcv2_32_jmps[cond], disp);</div><div class='add'>+	} else {</div><div class='add'>+		/* The straight forward unconditional jump. */</div><div class='add'>+		disp = get_displacement(curr_off, targ_off);</div><div class='add'>+		len = arc_b(buf, disp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Generate code for functions calls. There can be two types of calls:</div><div class='add'>+ *</div><div class='add'>+ * - Calling another BPF function</div><div class='add'>+ * - Calling an in-kernel function which is compiled by ARC gcc</div><div class='add'>+ *</div><div class='add'>+ * In the later case, we must comply to ARCv2 ABI and handle arguments</div><div class='add'>+ * and return values accordingly.</div><div class='add'>+ */</div><div class='add'>+u8 gen_func_call(u8 *buf, ARC_ADDR func_addr, bool external_func)</div><div class='add'>+{</div><div class='add'>+	u8 len = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In case of an in-kernel function call, always push the 5th</div><div class='add'>+	 * argument onto the stack, because that's where the ABI dictates</div><div class='add'>+	 * it should be found. If the callee doesn't really use it, no harm</div><div class='add'>+	 * is done. The stack is readjusted either way after the call.</div><div class='add'>+	 */</div><div class='add'>+	if (external_func)</div><div class='add'>+		len += push_r64(BUF(buf, len), BPF_REG_5);</div><div class='add'>+</div><div class='add'>+	len += jump_and_link(BUF(buf, len), func_addr);</div><div class='add'>+</div><div class='add'>+	if (external_func)</div><div class='add'>+		len += arc_add_i(BUF(buf, len), ARC_R_SP, ARC_R_SP, ARG5_SIZE);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arc/net/bpf_jit_core.c b/arch/arc/net/bpf_jit_core.c<br/>new file mode 100644<br/>index 000000000000..6f6b4ffccf2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arc/net/bpf_jit_core.c</a></div><div class='hunk'>@@ -0,0 +1,1425 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * The back-end-agnostic part of Just-In-Time compiler for eBPF bytecode.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Synopsys Inc.</div><div class='add'>+ * Author: Shahab Vahedi &lt;shahab@synopsys.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include "bpf_jit.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check for the return value. A pattern used often in this file.</div><div class='add'>+ * There must be a "ret" variable of type "int" in the scope.</div><div class='add'>+ */</div><div class='add'>+#define CHECK_RET(cmd)			\</div><div class='add'>+	do {				\</div><div class='add'>+		ret = (cmd);		\</div><div class='add'>+		if (ret &lt; 0)		\</div><div class='add'>+			return ret;	\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+/* Dumps bytes in /var/log/messages at KERN_INFO level (4). */</div><div class='add'>+static void dump_bytes(const u8 *buf, u32 len, const char *header)</div><div class='add'>+{</div><div class='add'>+	u8 line[64];</div><div class='add'>+	size_t i, j;</div><div class='add'>+</div><div class='add'>+	pr_info("-----------------[ %s ]-----------------\n", header);</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = 0; i &lt; len; i++) {</div><div class='add'>+		/* Last input byte? */</div><div class='add'>+		if (i == len - 1) {</div><div class='add'>+			j += scnprintf(line + j, 64 - j, "0x%02x", buf[i]);</div><div class='add'>+			pr_info("%s\n", line);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/* End of line? */</div><div class='add'>+		else if (i % 8 == 7) {</div><div class='add'>+			j += scnprintf(line + j, 64 - j, "0x%02x", buf[i]);</div><div class='add'>+			pr_info("%s\n", line);</div><div class='add'>+			j = 0;</div><div class='add'>+		} else {</div><div class='add'>+			j += scnprintf(line + j, 64 - j, "0x%02x, ", buf[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif /* ARC_BPF_JIT_DEBUG */</div><div class='add'>+</div><div class='add'>+/********************* JIT context ***********************/</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * buf:		Translated instructions end up here.</div><div class='add'>+ * len:		The length of whole block in bytes.</div><div class='add'>+ * index:	The offset at which the _next_ instruction may be put.</div><div class='add'>+ */</div><div class='add'>+struct jit_buffer {</div><div class='add'>+	u8	*buf;</div><div class='add'>+	u32	len;</div><div class='add'>+	u32	index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is a subset of "struct jit_context" that its information is deemed</div><div class='add'>+ * necessary for the next extra pass to come.</div><div class='add'>+ *</div><div class='add'>+ * bpf_header:	Needed to finally lock the region.</div><div class='add'>+ * bpf2insn:	Used to find the translation for instructions of interest.</div><div class='add'>+ *</div><div class='add'>+ * Things like "jit.buf" and "jit.len" can be retrieved respectively from</div><div class='add'>+ * "prog-&gt;bpf_func" and "prog-&gt;jited_len".</div><div class='add'>+ */</div><div class='add'>+struct arc_jit_data {</div><div class='add'>+	struct bpf_binary_header *bpf_header;</div><div class='add'>+	u32                      *bpf2insn;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The JIT pertinent context that is used by different functions.</div><div class='add'>+ *</div><div class='add'>+ * prog:		The current eBPF program being handled.</div><div class='add'>+ * orig_prog:		The original eBPF program before any possible change.</div><div class='add'>+ * jit:			The JIT buffer and its length.</div><div class='add'>+ * bpf_header:		The JITed program header. "jit.buf" points inside it.</div><div class='add'>+ * emit:		If set, opcodes are written to memory; else, a dry-run.</div><div class='add'>+ * do_zext:		If true, 32-bit sub-regs must be zero extended.</div><div class='add'>+ * bpf2insn:		Maps BPF insn indices to their counterparts in jit.buf.</div><div class='add'>+ * bpf2insn_valid:	Indicates if "bpf2ins" is populated with the mappings.</div><div class='add'>+ * jit_data:		A piece of memory to transfer data to the next pass.</div><div class='add'>+ * arc_regs_clobbered:	Each bit status determines if that arc reg is clobbered.</div><div class='add'>+ * save_blink:		Whether ARC's "blink" register needs to be saved.</div><div class='add'>+ * frame_size:		Derived from "prog-&gt;aux-&gt;stack_depth".</div><div class='add'>+ * epilogue_offset:	Used by early "return"s in the code to jump here.</div><div class='add'>+ * need_extra_pass:	A forecast if an "extra_pass" will occur.</div><div class='add'>+ * is_extra_pass:	Indicates if the current pass is an extra pass.</div><div class='add'>+ * user_bpf_prog:	True, if VM opcodes come from a real program.</div><div class='add'>+ * blinded:		True if "constant blinding" step returned a new "prog".</div><div class='add'>+ * success:		Indicates if the whole JIT went OK.</div><div class='add'>+ */</div><div class='add'>+struct jit_context {</div><div class='add'>+	struct bpf_prog			*prog;</div><div class='add'>+	struct bpf_prog			*orig_prog;</div><div class='add'>+	struct jit_buffer		jit;</div><div class='add'>+	struct bpf_binary_header	*bpf_header;</div><div class='add'>+	bool				emit;</div><div class='add'>+	bool				do_zext;</div><div class='add'>+	u32				*bpf2insn;</div><div class='add'>+	bool				bpf2insn_valid;</div><div class='add'>+	struct arc_jit_data		*jit_data;</div><div class='add'>+	u32				arc_regs_clobbered;</div><div class='add'>+	bool				save_blink;</div><div class='add'>+	u16				frame_size;</div><div class='add'>+	u32				epilogue_offset;</div><div class='add'>+	bool				need_extra_pass;</div><div class='add'>+	bool				is_extra_pass;</div><div class='add'>+	bool				user_bpf_prog;</div><div class='add'>+	bool				blinded;</div><div class='add'>+	bool				success;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If we're in ARC_BPF_JIT_DEBUG mode and the debug level is right, dump the</div><div class='add'>+ * input BPF stream. "bpf_jit_dump()" is not fully suited for this purpose.</div><div class='add'>+ */</div><div class='add'>+static void vm_dump(const struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	if (bpf_jit_enable &gt; 1)</div><div class='add'>+		dump_bytes((u8 *)prog-&gt;insns, 8 * prog-&gt;len, " VM  ");</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If the right level of debug is set, dump the bytes. There are 2 variants</div><div class='add'>+ * of this function:</div><div class='add'>+ *</div><div class='add'>+ * 1. Use the standard bpf_jit_dump() which is meant only for JITed code.</div><div class='add'>+ * 2. Use the dump_bytes() to match its "vm_dump()" instance.</div><div class='add'>+ */</div><div class='add'>+static void jit_dump(const struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	u8 header[8];</div><div class='add'>+#endif</div><div class='add'>+	const int pass = ctx-&gt;is_extra_pass ? 2 : 1;</div><div class='add'>+</div><div class='add'>+	if (bpf_jit_enable &lt;= 1 || !ctx-&gt;prog-&gt;jited)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	scnprintf(header, sizeof(header), "JIT:%d", pass);</div><div class='add'>+	dump_bytes(ctx-&gt;jit.buf, ctx-&gt;jit.len, header);</div><div class='add'>+	pr_info("\n");</div><div class='add'>+#else</div><div class='add'>+	bpf_jit_dump(ctx-&gt;prog-&gt;len, ctx-&gt;jit.len, pass, ctx-&gt;jit.buf);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialise the context so there's no garbage. */</div><div class='add'>+static int jit_ctx_init(struct jit_context *ctx, struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	memset(ctx, 0, sizeof(ctx));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;orig_prog = prog;</div><div class='add'>+</div><div class='add'>+	/* If constant blinding was requested but failed, scram. */</div><div class='add'>+	ctx-&gt;prog = bpf_jit_blind_constants(prog);</div><div class='add'>+	if (IS_ERR(ctx-&gt;prog))</div><div class='add'>+		return PTR_ERR(ctx-&gt;prog);</div><div class='add'>+	ctx-&gt;blinded = (ctx-&gt;prog == ctx-&gt;orig_prog ? false : true);</div><div class='add'>+</div><div class='add'>+	/* If the verifier doesn't zero-extend, then we have to do it. */</div><div class='add'>+	ctx-&gt;do_zext = !ctx-&gt;prog-&gt;aux-&gt;verifier_zext;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;is_extra_pass = ctx-&gt;prog-&gt;jited;</div><div class='add'>+	ctx-&gt;user_bpf_prog = ctx-&gt;prog-&gt;is_func;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Only after the first iteration of normal pass (the dry-run),</div><div class='add'>+ * there are valid offsets in ctx-&gt;bpf2insn array.</div><div class='add'>+ */</div><div class='add'>+static inline bool offsets_available(const struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	return ctx-&gt;bpf2insn_valid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * "*mem" should be freed when there is no "extra pass" to come,</div><div class='add'>+ * or the compilation terminated abruptly. A few of such memory</div><div class='add'>+ * allocations are: ctx-&gt;jit_data and ctx-&gt;bpf2insn.</div><div class='add'>+ */</div><div class='add'>+static inline void maybe_free(struct jit_context *ctx, void **mem)</div><div class='add'>+{</div><div class='add'>+	if (*mem) {</div><div class='add'>+		if (!ctx-&gt;success || !ctx-&gt;need_extra_pass) {</div><div class='add'>+			kfree(*mem);</div><div class='add'>+			*mem = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Free memories based on the status of the context.</div><div class='add'>+ *</div><div class='add'>+ * A note about "bpf_header": On successful runs, "bpf_header" is</div><div class='add'>+ * not freed, because "jit.buf", a sub-array of it, is returned as</div><div class='add'>+ * the "bpf_func". However, "bpf_header" is lost and nothing points</div><div class='add'>+ * to it. This should not cause a leakage, because apparently</div><div class='add'>+ * "bpf_header" can be revived by "bpf_jit_binary_hdr()". This is</div><div class='add'>+ * how "bpf_jit_free()" in "kernel/bpf/core.c" releases the memory.</div><div class='add'>+ */</div><div class='add'>+static void jit_ctx_cleanup(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (ctx-&gt;blinded) {</div><div class='add'>+		/* if all went well, release the orig_prog. */</div><div class='add'>+		if (ctx-&gt;success)</div><div class='add'>+			bpf_jit_prog_release_other(ctx-&gt;prog, ctx-&gt;orig_prog);</div><div class='add'>+		else</div><div class='add'>+			bpf_jit_prog_release_other(ctx-&gt;orig_prog, ctx-&gt;prog);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	maybe_free(ctx, (void **)&amp;ctx-&gt;bpf2insn);</div><div class='add'>+	maybe_free(ctx, (void **)&amp;ctx-&gt;jit_data);</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;bpf2insn)</div><div class='add'>+		ctx-&gt;bpf2insn_valid = false;</div><div class='add'>+</div><div class='add'>+	/* Freeing "bpf_header" is enough. "jit.buf" is a sub-array of it. */</div><div class='add'>+	if (!ctx-&gt;success &amp;&amp; ctx-&gt;bpf_header) {</div><div class='add'>+		bpf_jit_binary_free(ctx-&gt;bpf_header);</div><div class='add'>+		ctx-&gt;bpf_header = NULL;</div><div class='add'>+		ctx-&gt;jit.buf    = NULL;</div><div class='add'>+		ctx-&gt;jit.index  = 0;</div><div class='add'>+		ctx-&gt;jit.len    = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;emit = false;</div><div class='add'>+	ctx-&gt;do_zext = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Analyse the register usage and record the frame size.</div><div class='add'>+ * The register usage is determined by consulting the back-end.</div><div class='add'>+ */</div><div class='add'>+static void analyze_reg_usage(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+	u32 usage = 0;</div><div class='add'>+	const struct bpf_insn *insn = ctx-&gt;prog-&gt;insnsi;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ctx-&gt;prog-&gt;len; i++) {</div><div class='add'>+		u8 bpf_reg;</div><div class='add'>+		bool call;</div><div class='add'>+</div><div class='add'>+		bpf_reg = insn[i].dst_reg;</div><div class='add'>+		call = (insn[i].code == (BPF_JMP | BPF_CALL)) ? true : false;</div><div class='add'>+		usage |= mask_for_used_regs(bpf_reg, call);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;arc_regs_clobbered = usage;</div><div class='add'>+	ctx-&gt;frame_size = ctx-&gt;prog-&gt;aux-&gt;stack_depth;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Verify that no instruction will be emitted when there is no buffer. */</div><div class='add'>+static inline int jit_buffer_check(const struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (ctx-&gt;emit) {</div><div class='add'>+		if (!ctx-&gt;jit.buf) {</div><div class='add'>+			pr_err("bpf-jit: inconsistence state; no "</div><div class='add'>+			       "buffer to emit instructions.\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		} else if (ctx-&gt;jit.index &gt; ctx-&gt;jit.len) {</div><div class='add'>+			pr_err("bpf-jit: estimated JIT length is less "</div><div class='add'>+			       "than the emitted instructions.\n");</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* On a dry-run (emit=false), "jit.len" is growing gradually. */</div><div class='add'>+static inline void jit_buffer_update(struct jit_context *ctx, u32 n)</div><div class='add'>+{</div><div class='add'>+	if (!ctx-&gt;emit)</div><div class='add'>+		ctx-&gt;jit.len += n;</div><div class='add'>+	else</div><div class='add'>+		ctx-&gt;jit.index += n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Based on "emit", determine the address where instructions are emitted. */</div><div class='add'>+static inline u8 *effective_jit_buf(const struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	return ctx-&gt;emit ? (ctx-&gt;jit.buf + ctx-&gt;jit.index) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Prologue based on context variables set by "analyze_reg_usage()". */</div><div class='add'>+static int handle_prologue(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 *buf = effective_jit_buf(ctx);</div><div class='add'>+	u32 len = 0;</div><div class='add'>+</div><div class='add'>+	CHECK_RET(jit_buffer_check(ctx));</div><div class='add'>+</div><div class='add'>+	len = arc_prologue(buf, ctx-&gt;arc_regs_clobbered, ctx-&gt;frame_size);</div><div class='add'>+	jit_buffer_update(ctx, len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The counter part for "handle_prologue()". */</div><div class='add'>+static int handle_epilogue(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 *buf = effective_jit_buf(ctx);</div><div class='add'>+	u32 len = 0;</div><div class='add'>+</div><div class='add'>+	CHECK_RET(jit_buffer_check(ctx));</div><div class='add'>+</div><div class='add'>+	len = arc_epilogue(buf, ctx-&gt;arc_regs_clobbered, ctx-&gt;frame_size);</div><div class='add'>+	jit_buffer_update(ctx, len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Tell which number of the BPF instruction we are dealing with. */</div><div class='add'>+static inline s32 get_index_for_insn(const struct jit_context *ctx,</div><div class='add'>+				     const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	return (insn - ctx-&gt;prog-&gt;insnsi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In most of the cases, the "offset" is read from "insn-&gt;off". However,</div><div class='add'>+ * if it is an unconditional BPF_JMP32, then it comes from "insn-&gt;imm".</div><div class='add'>+ *</div><div class='add'>+ * (Courtesy of "cpu=v4" support)</div><div class='add'>+ */</div><div class='add'>+static inline s32 get_offset(const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	if ((BPF_CLASS(insn-&gt;code) == BPF_JMP32) &amp;&amp;</div><div class='add'>+	    (BPF_OP(insn-&gt;code) == BPF_JA))</div><div class='add'>+		return insn-&gt;imm;</div><div class='add'>+	else</div><div class='add'>+		return insn-&gt;off;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Determine to which number of the BPF instruction we're jumping to.</div><div class='add'>+ *</div><div class='add'>+ * The "offset" is interpreted as the "number" of BPF instructions</div><div class='add'>+ * from the _next_ BPF instruction. e.g.:</div><div class='add'>+ *</div><div class='add'>+ *  4 means 4 instructions after  the next insn</div><div class='add'>+ *  0 means 0 instructions after  the next insn -&gt; fallthrough.</div><div class='add'>+ * -1 means 1 instruction  before the next insn -&gt; jmp to current insn.</div><div class='add'>+ *</div><div class='add'>+ *  Another way to look at this, "offset" is the number of instructions</div><div class='add'>+ *  that exist between the current instruction and the target instruction.</div><div class='add'>+ *</div><div class='add'>+ *  It is worth noting that a "mov r,i64", which is 16-byte long, is</div><div class='add'>+ *  treated as two instructions long, therefore "offset" needn't be</div><div class='add'>+ *  treated specially for those. Everything is uniform.</div><div class='add'>+ */</div><div class='add'>+static inline s32 get_target_index_for_insn(const struct jit_context *ctx,</div><div class='add'>+					    const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	return (get_index_for_insn(ctx, insn) + 1) + get_offset(insn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Is there an immediate operand encoded in the "insn"? */</div><div class='add'>+static inline bool has_imm(const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	return BPF_SRC(insn-&gt;code) == BPF_K;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Is the last BPF instruction? */</div><div class='add'>+static inline bool is_last_insn(const struct bpf_prog *prog, u32 idx)</div><div class='add'>+{</div><div class='add'>+	return idx == (prog-&gt;len - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Invocation of this function, conditionally signals the need for</div><div class='add'>+ * an extra pass. The conditions that must be met are:</div><div class='add'>+ *</div><div class='add'>+ * 1. The current pass itself shouldn't be an extra pass.</div><div class='add'>+ * 2. The stream of bytes being JITed must come from a user program.</div><div class='add'>+ */</div><div class='add'>+static inline void set_need_for_extra_pass(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (!ctx-&gt;is_extra_pass)</div><div class='add'>+		ctx-&gt;need_extra_pass = ctx-&gt;user_bpf_prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check if the "size" is valid and then transfer the control to</div><div class='add'>+ * the back-end for the swap.</div><div class='add'>+ */</div><div class='add'>+static int handle_swap(u8 *buf, u8 rd, u8 size, u8 endian,</div><div class='add'>+		       bool force, bool do_zext, u8 *len)</div><div class='add'>+{</div><div class='add'>+	/* Sanity check on the size. */</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 16:</div><div class='add'>+	case 32:</div><div class='add'>+	case 64:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("bpf-jit: invalid size for swap.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*len = gen_swap(buf, rd, size, endian, force, do_zext);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Checks if the (instruction) index is in valid range. */</div><div class='add'>+static inline bool check_insn_idx_valid(const struct jit_context *ctx,</div><div class='add'>+					const s32 idx)</div><div class='add'>+{</div><div class='add'>+	return (idx &gt;= 0 &amp;&amp; idx &lt; ctx-&gt;prog-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Decouple the back-end from BPF by converting BPF conditions</div><div class='add'>+ * to internal enum. ARC_CC_* start from 0 and are used as index</div><div class='add'>+ * to an array. BPF_J* usage must end after this conversion.</div><div class='add'>+ */</div><div class='add'>+static int bpf_cond_to_arc(const u8 op, u8 *arc_cc)</div><div class='add'>+{</div><div class='add'>+	switch (op) {</div><div class='add'>+	case BPF_JA:</div><div class='add'>+		*arc_cc = ARC_CC_AL;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JEQ:</div><div class='add'>+		*arc_cc = ARC_CC_EQ;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JGT:</div><div class='add'>+		*arc_cc = ARC_CC_UGT;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JGE:</div><div class='add'>+		*arc_cc = ARC_CC_UGE;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JSET:</div><div class='add'>+		*arc_cc = ARC_CC_SET;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JNE:</div><div class='add'>+		*arc_cc = ARC_CC_NE;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JSGT:</div><div class='add'>+		*arc_cc = ARC_CC_SGT;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JSGE:</div><div class='add'>+		*arc_cc = ARC_CC_SGE;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JLT:</div><div class='add'>+		*arc_cc = ARC_CC_ULT;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JLE:</div><div class='add'>+		*arc_cc = ARC_CC_ULE;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JSLT:</div><div class='add'>+		*arc_cc = ARC_CC_SLT;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JSLE:</div><div class='add'>+		*arc_cc = ARC_CC_SLE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("bpf-jit: can't handle condition 0x%02X\n", op);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check a few things for a supposedly "jump" instruction:</div><div class='add'>+ *</div><div class='add'>+ * 0. "insn" is a "jump" instruction, but not the "call/exit" variant.</div><div class='add'>+ * 1. The current "insn" index is in valid range.</div><div class='add'>+ * 2. The index of target instruction is in valid range.</div><div class='add'>+ */</div><div class='add'>+static int check_bpf_jump(const struct jit_context *ctx,</div><div class='add'>+			  const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	const u8 class = BPF_CLASS(insn-&gt;code);</div><div class='add'>+	const u8 op = BPF_OP(insn-&gt;code);</div><div class='add'>+</div><div class='add'>+	/* Must be a jmp(32) instruction that is not a "call/exit". */</div><div class='add'>+	if ((class != BPF_JMP &amp;&amp; class != BPF_JMP32) ||</div><div class='add'>+	    (op == BPF_CALL || op == BPF_EXIT)) {</div><div class='add'>+		pr_err("bpf-jit: not a jump instruction.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!check_insn_idx_valid(ctx, get_index_for_insn(ctx, insn))) {</div><div class='add'>+		pr_err("bpf-jit: the bpf jump insn is not in prog.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!check_insn_idx_valid(ctx, get_target_index_for_insn(ctx, insn))) {</div><div class='add'>+		pr_err("bpf-jit: bpf jump label is out of range.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Based on input "insn", consult "ctx-&gt;bpf2insn" to get the</div><div class='add'>+ * related index (offset) of the translation in JIT stream.</div><div class='add'>+ */</div><div class='add'>+static u32 get_curr_jit_off(const struct jit_context *ctx,</div><div class='add'>+			    const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	const s32 idx = get_index_for_insn(ctx, insn);</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	BUG_ON(!offsets_available(ctx) || !check_insn_idx_valid(ctx, idx));</div><div class='add'>+#endif</div><div class='add'>+	return ctx-&gt;bpf2insn[idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The input "insn" must be a jump instruction.</div><div class='add'>+ *</div><div class='add'>+ * Based on input "insn", consult "ctx-&gt;bpf2insn" to get the</div><div class='add'>+ * related JIT index (offset) of "target instruction" that</div><div class='add'>+ * "insn" would jump to.</div><div class='add'>+ */</div><div class='add'>+static u32 get_targ_jit_off(const struct jit_context *ctx,</div><div class='add'>+			    const struct bpf_insn *insn)</div><div class='add'>+{</div><div class='add'>+	const s32 tidx = get_target_index_for_insn(ctx, insn);</div><div class='add'>+#ifdef ARC_BPF_JIT_DEBUG</div><div class='add'>+	BUG_ON(!offsets_available(ctx) || !check_insn_idx_valid(ctx, tidx));</div><div class='add'>+#endif</div><div class='add'>+	return ctx-&gt;bpf2insn[tidx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function will return 0 for a feasible jump.</div><div class='add'>+ *</div><div class='add'>+ * Consult the back-end to check if it finds it feasible to emit</div><div class='add'>+ * the necessary instructions based on "cond" and the displacement</div><div class='add'>+ * between the "from_off" and the "to_off".</div><div class='add'>+ */</div><div class='add'>+static int feasible_jit_jump(u32 from_off, u32 to_off, u8 cond, bool j32)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (j32) {</div><div class='add'>+		if (!check_jmp_32(from_off, to_off, cond))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+	} else {</div><div class='add'>+		if (!check_jmp_64(from_off, to_off, cond))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		pr_err("bpf-jit: the JIT displacement is not OK.\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This jump handler performs the following steps:</div><div class='add'>+ *</div><div class='add'>+ * 1. Compute ARC's internal condition code from BPF's</div><div class='add'>+ * 2. Determine the bitness of the operation (32 vs. 64)</div><div class='add'>+ * 3. Sanity check on BPF stream</div><div class='add'>+ * 4. Sanity check on what is supposed to be JIT's displacement</div><div class='add'>+ * 5. And finally, emit the necessary instructions</div><div class='add'>+ *</div><div class='add'>+ * The last two steps are performed through the back-end.</div><div class='add'>+ * The value of steps 1 and 2 are necessary inputs for the back-end.</div><div class='add'>+ */</div><div class='add'>+static int handle_jumps(const struct jit_context *ctx,</div><div class='add'>+			const struct bpf_insn *insn,</div><div class='add'>+			u8 *len)</div><div class='add'>+{</div><div class='add'>+	u8 cond;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 *buf = effective_jit_buf(ctx);</div><div class='add'>+	const bool j32 = (BPF_CLASS(insn-&gt;code) == BPF_JMP32) ? true : false;</div><div class='add'>+	const u8 rd = insn-&gt;dst_reg;</div><div class='add'>+	u8 rs = insn-&gt;src_reg;</div><div class='add'>+	u32 curr_off = 0, targ_off = 0;</div><div class='add'>+</div><div class='add'>+	*len = 0;</div><div class='add'>+</div><div class='add'>+	/* Map the BPF condition to internal enum. */</div><div class='add'>+	CHECK_RET(bpf_cond_to_arc(BPF_OP(insn-&gt;code), &amp;cond));</div><div class='add'>+</div><div class='add'>+	/* Sanity check on the BPF byte stream. */</div><div class='add'>+	CHECK_RET(check_bpf_jump(ctx, insn));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Move the immediate into a temporary register _now_ for 2 reasons:</div><div class='add'>+	 *</div><div class='add'>+	 * 1. "gen_jmp_{32,64}()" deal with operands in registers.</div><div class='add'>+	 *</div><div class='add'>+	 * 2. The "len" parameter will grow so that the current jit offset</div><div class='add'>+	 *    (curr_off) will have increased to a point where the necessary</div><div class='add'>+	 *    instructions can be inserted by "gen_jmp_{32,64}()".</div><div class='add'>+	 */</div><div class='add'>+	if (has_imm(insn) &amp;&amp; cond != ARC_CC_AL) {</div><div class='add'>+		if (j32) {</div><div class='add'>+			*len += mov_r32_i32(BUF(buf, *len), JIT_REG_TMP,</div><div class='add'>+					    insn-&gt;imm);</div><div class='add'>+		} else {</div><div class='add'>+			*len += mov_r64_i32(BUF(buf, *len), JIT_REG_TMP,</div><div class='add'>+					    insn-&gt;imm);</div><div class='add'>+		}</div><div class='add'>+		rs = JIT_REG_TMP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the offsets are known, check if the branch can occur. */</div><div class='add'>+	if (offsets_available(ctx)) {</div><div class='add'>+		curr_off = get_curr_jit_off(ctx, insn) + *len;</div><div class='add'>+		targ_off = get_targ_jit_off(ctx, insn);</div><div class='add'>+</div><div class='add'>+		/* Sanity check on the back-end side. */</div><div class='add'>+		CHECK_RET(feasible_jit_jump(curr_off, targ_off, cond, j32));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (j32) {</div><div class='add'>+		*len += gen_jmp_32(BUF(buf, *len), rd, rs, cond,</div><div class='add'>+				   curr_off, targ_off);</div><div class='add'>+	} else {</div><div class='add'>+		*len += gen_jmp_64(BUF(buf, *len), rd, rs, cond,</div><div class='add'>+				   curr_off, targ_off);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Jump to translated epilogue address. */</div><div class='add'>+static int handle_jmp_epilogue(struct jit_context *ctx,</div><div class='add'>+			       const struct bpf_insn *insn, u8 *len)</div><div class='add'>+{</div><div class='add'>+	u8 *buf = effective_jit_buf(ctx);</div><div class='add'>+	u32 curr_off = 0, epi_off = 0;</div><div class='add'>+</div><div class='add'>+	/* Check the offset only if the data is available. */</div><div class='add'>+	if (offsets_available(ctx)) {</div><div class='add'>+		curr_off = get_curr_jit_off(ctx, insn);</div><div class='add'>+		epi_off = ctx-&gt;epilogue_offset;</div><div class='add'>+</div><div class='add'>+		if (!check_jmp_64(curr_off, epi_off, ARC_CC_AL)) {</div><div class='add'>+			pr_err("bpf-jit: epilogue offset is not valid.\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Jump to "epilogue offset" (rd and rs don't matter). */</div><div class='add'>+	*len = gen_jmp_64(buf, 0, 0, ARC_CC_AL, curr_off, epi_off);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Try to get the resolved address and generate the instructions. */</div><div class='add'>+static int handle_call(struct jit_context *ctx,</div><div class='add'>+		       const struct bpf_insn *insn,</div><div class='add'>+		       u8 *len)</div><div class='add'>+{</div><div class='add'>+	int  ret;</div><div class='add'>+	bool in_kernel_func, fixed = false;</div><div class='add'>+	u64  addr = 0;</div><div class='add'>+	u8  *buf = effective_jit_buf(ctx);</div><div class='add'>+</div><div class='add'>+	ret = bpf_jit_get_func_addr(ctx-&gt;prog, insn, ctx-&gt;is_extra_pass,</div><div class='add'>+				    &amp;addr, &amp;fixed);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("bpf-jit: can't get the address for call.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	in_kernel_func = (fixed ? true : false);</div><div class='add'>+</div><div class='add'>+	/* No valuable address retrieved (yet). */</div><div class='add'>+	if (!fixed &amp;&amp; !addr)</div><div class='add'>+		set_need_for_extra_pass(ctx);</div><div class='add'>+</div><div class='add'>+	*len = gen_func_call(buf, (ARC_ADDR)addr, in_kernel_func);</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;src_reg != BPF_PSEUDO_CALL) {</div><div class='add'>+		/* Assigning ABI's return reg to JIT's return reg. */</div><div class='add'>+		*len += arc_to_bpf_return(BUF(buf, *len));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Try to generate instructions for loading a 64-bit immediate.</div><div class='add'>+ * These sort of instructions are usually associated with the 64-bit</div><div class='add'>+ * relocations: R_BPF_64_64. Therefore, signal the need for an extra</div><div class='add'>+ * pass if the circumstances are right.</div><div class='add'>+ */</div><div class='add'>+static int handle_ld_imm64(struct jit_context *ctx,</div><div class='add'>+			   const struct bpf_insn *insn,</div><div class='add'>+			   u8 *len)</div><div class='add'>+{</div><div class='add'>+	const s32 idx = get_index_for_insn(ctx, insn);</div><div class='add'>+	u8 *buf = effective_jit_buf(ctx);</div><div class='add'>+</div><div class='add'>+	/* We're about to consume 2 VM instructions. */</div><div class='add'>+	if (is_last_insn(ctx-&gt;prog, idx)) {</div><div class='add'>+		pr_err("bpf-jit: need more data for 64-bit immediate.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*len = mov_r64_i64(buf, insn-&gt;dst_reg, insn-&gt;imm, (insn + 1)-&gt;imm);</div><div class='add'>+</div><div class='add'>+	if (bpf_pseudo_func(insn))</div><div class='add'>+		set_need_for_extra_pass(ctx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Handles one eBPF instruction at a time. To make this function faster,</div><div class='add'>+ * it does not call "jit_buffer_check()". Else, it would call it for every</div><div class='add'>+ * instruction. As a result, it should not be invoked directly. Only</div><div class='add'>+ * "handle_body()", that has already executed the "check", may call this</div><div class='add'>+ * function.</div><div class='add'>+ *</div><div class='add'>+ * If the "ret" value is negative, something has went wrong. Else,</div><div class='add'>+ * it mostly holds the value 0 and rarely 1. Number 1 signals</div><div class='add'>+ * the loop in "handle_body()" to skip the next instruction, because</div><div class='add'>+ * it has been consumed as part of a 64-bit immediate value.</div><div class='add'>+ */</div><div class='add'>+static int handle_insn(struct jit_context *ctx, u32 idx)</div><div class='add'>+{</div><div class='add'>+	const struct bpf_insn *insn = &amp;ctx-&gt;prog-&gt;insnsi[idx];</div><div class='add'>+	const u8  code = insn-&gt;code;</div><div class='add'>+	const u8  dst  = insn-&gt;dst_reg;</div><div class='add'>+	const u8  src  = insn-&gt;src_reg;</div><div class='add'>+	const s16 off  = insn-&gt;off;</div><div class='add'>+	const s32 imm  = insn-&gt;imm;</div><div class='add'>+	u8 *buf = effective_jit_buf(ctx);</div><div class='add'>+	u8  len = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (code) {</div><div class='add'>+	/* dst += src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_ADD | BPF_X:</div><div class='add'>+		len = add_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst += imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_ADD | BPF_K:</div><div class='add'>+		len = add_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst -= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_SUB | BPF_X:</div><div class='add'>+		len = sub_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst -= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_SUB | BPF_K:</div><div class='add'>+		len = sub_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = -dst (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_NEG:</div><div class='add'>+		len = neg_r32(buf, dst);</div><div class='add'>+		break;</div><div class='add'>+	/* dst *= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_MUL | BPF_X:</div><div class='add'>+		len = mul_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst *= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_MUL | BPF_K:</div><div class='add'>+		len = mul_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst /= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_DIV | BPF_X:</div><div class='add'>+		len = div_r32(buf, dst, src, off == 1);</div><div class='add'>+		break;</div><div class='add'>+	/* dst /= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_DIV | BPF_K:</div><div class='add'>+		len = div_r32_i32(buf, dst, imm, off == 1);</div><div class='add'>+		break;</div><div class='add'>+	/* dst %= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_MOD | BPF_X:</div><div class='add'>+		len = mod_r32(buf, dst, src, off == 1);</div><div class='add'>+		break;</div><div class='add'>+	/* dst %= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_MOD | BPF_K:</div><div class='add'>+		len = mod_r32_i32(buf, dst, imm, off == 1);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &amp;= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_AND | BPF_X:</div><div class='add'>+		len = and_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &amp;= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_AND | BPF_K:</div><div class='add'>+		len = and_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst |= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_OR | BPF_X:</div><div class='add'>+		len = or_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst |= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_OR | BPF_K:</div><div class='add'>+		len = or_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst ^= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_XOR | BPF_X:</div><div class='add'>+		len = xor_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst ^= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_XOR | BPF_K:</div><div class='add'>+		len = xor_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &lt;&lt;= src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_LSH | BPF_X:</div><div class='add'>+		len = lsh_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &lt;&lt;= imm (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_LSH | BPF_K:</div><div class='add'>+		len = lsh_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= src (32-bit) [unsigned] */</div><div class='add'>+	case BPF_ALU | BPF_RSH | BPF_X:</div><div class='add'>+		len = rsh_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= imm (32-bit) [unsigned] */</div><div class='add'>+	case BPF_ALU | BPF_RSH | BPF_K:</div><div class='add'>+		len = rsh_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= src (32-bit) [signed] */</div><div class='add'>+	case BPF_ALU | BPF_ARSH | BPF_X:</div><div class='add'>+		len = arsh_r32(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= imm (32-bit) [signed] */</div><div class='add'>+	case BPF_ALU | BPF_ARSH | BPF_K:</div><div class='add'>+		len = arsh_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = src (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_MOV | BPF_X:</div><div class='add'>+		len = mov_r32(buf, dst, src, (u8)off);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = imm32 (32-bit) */</div><div class='add'>+	case BPF_ALU | BPF_MOV | BPF_K:</div><div class='add'>+		len = mov_r32_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = swap(dst) */</div><div class='add'>+	case BPF_ALU   | BPF_END | BPF_FROM_LE:</div><div class='add'>+	case BPF_ALU   | BPF_END | BPF_FROM_BE:</div><div class='add'>+	case BPF_ALU64 | BPF_END | BPF_FROM_LE: {</div><div class='add'>+		CHECK_RET(handle_swap(buf, dst, imm, BPF_SRC(code),</div><div class='add'>+				      BPF_CLASS(code) == BPF_ALU64,</div><div class='add'>+				      ctx-&gt;do_zext, &amp;len));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	/* dst += src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_ADD | BPF_X:</div><div class='add'>+		len = add_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst += imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_ADD | BPF_K:</div><div class='add'>+		len = add_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst -= src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_SUB | BPF_X:</div><div class='add'>+		len = sub_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst -= imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_SUB | BPF_K:</div><div class='add'>+		len = sub_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = -dst (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_NEG:</div><div class='add'>+		len = neg_r64(buf, dst);</div><div class='add'>+		break;</div><div class='add'>+	/* dst *= src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_MUL | BPF_X:</div><div class='add'>+		len = mul_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst *= imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_MUL | BPF_K:</div><div class='add'>+		len = mul_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &amp;= src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_AND | BPF_X:</div><div class='add'>+		len = and_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &amp;= imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_AND | BPF_K:</div><div class='add'>+		len = and_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst |= src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_OR | BPF_X:</div><div class='add'>+		len = or_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst |= imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_OR | BPF_K:</div><div class='add'>+		len = or_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst ^= src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_XOR | BPF_X:</div><div class='add'>+		len = xor_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst ^= imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_XOR | BPF_K:</div><div class='add'>+		len = xor_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &lt;&lt;= src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_LSH | BPF_X:</div><div class='add'>+		len = lsh_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &lt;&lt;= imm32 (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_LSH | BPF_K:</div><div class='add'>+		len = lsh_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= src (64-bit) [unsigned] */</div><div class='add'>+	case BPF_ALU64 | BPF_RSH | BPF_X:</div><div class='add'>+		len = rsh_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= imm32 (64-bit) [unsigned] */</div><div class='add'>+	case BPF_ALU64 | BPF_RSH | BPF_K:</div><div class='add'>+		len = rsh_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= src (64-bit) [signed] */</div><div class='add'>+	case BPF_ALU64 | BPF_ARSH | BPF_X:</div><div class='add'>+		len = arsh_r64(buf, dst, src);</div><div class='add'>+		break;</div><div class='add'>+	/* dst &gt;&gt;= imm32 (64-bit) [signed] */</div><div class='add'>+	case BPF_ALU64 | BPF_ARSH | BPF_K:</div><div class='add'>+		len = arsh_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = src (64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_MOV | BPF_X:</div><div class='add'>+		len = mov_r64(buf, dst, src, (u8)off);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = imm32 (sign extend to 64-bit) */</div><div class='add'>+	case BPF_ALU64 | BPF_MOV | BPF_K:</div><div class='add'>+		len = mov_r64_i32(buf, dst, imm);</div><div class='add'>+		break;</div><div class='add'>+	/* dst = imm64 */</div><div class='add'>+	case BPF_LD | BPF_DW | BPF_IMM:</div><div class='add'>+		CHECK_RET(handle_ld_imm64(ctx, insn, &amp;len));</div><div class='add'>+		/* Tell the loop to skip the next instruction. */</div><div class='add'>+		ret = 1;</div><div class='add'>+		break;</div><div class='add'>+	/* dst = *(size *)(src + off) */</div><div class='add'>+	case BPF_LDX | BPF_MEM | BPF_W:</div><div class='add'>+	case BPF_LDX | BPF_MEM | BPF_H:</div><div class='add'>+	case BPF_LDX | BPF_MEM | BPF_B:</div><div class='add'>+	case BPF_LDX | BPF_MEM | BPF_DW:</div><div class='add'>+		len = load_r(buf, dst, src, off, BPF_SIZE(code), false);</div><div class='add'>+		break;</div><div class='add'>+	case BPF_LDX | BPF_MEMSX | BPF_W:</div><div class='add'>+	case BPF_LDX | BPF_MEMSX | BPF_H:</div><div class='add'>+	case BPF_LDX | BPF_MEMSX | BPF_B:</div><div class='add'>+		len = load_r(buf, dst, src, off, BPF_SIZE(code), true);</div><div class='add'>+		break;</div><div class='add'>+	/* *(size *)(dst + off) = src */</div><div class='add'>+	case BPF_STX | BPF_MEM | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_MEM | BPF_H:</div><div class='add'>+	case BPF_STX | BPF_MEM | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_MEM | BPF_DW:</div><div class='add'>+		len = store_r(buf, src, dst, off, BPF_SIZE(code));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_ST | BPF_MEM | BPF_W:</div><div class='add'>+	case BPF_ST | BPF_MEM | BPF_H:</div><div class='add'>+	case BPF_ST | BPF_MEM | BPF_B:</div><div class='add'>+	case BPF_ST | BPF_MEM | BPF_DW:</div><div class='add'>+		len = store_i(buf, imm, dst, off, BPF_SIZE(code));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JMP   | BPF_JA:</div><div class='add'>+	case BPF_JMP   | BPF_JEQ  | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JEQ  | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JNE  | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JNE  | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JSET | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JSET | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JGT  | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JGT  | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JGE  | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JGE  | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JSGT | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JSGT | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JSGE | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JSGE | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JLT  | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JLT  | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JLE  | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JLE  | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JSLT | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JSLT | BPF_K:</div><div class='add'>+	case BPF_JMP   | BPF_JSLE | BPF_X:</div><div class='add'>+	case BPF_JMP   | BPF_JSLE | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JA:</div><div class='add'>+	case BPF_JMP32 | BPF_JEQ  | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JEQ  | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JNE  | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JNE  | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JSET | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JSET | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JGT  | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JGT  | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JGE  | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JGE  | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JSGT | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JSGT | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JSGE | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JSGE | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JLT  | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JLT  | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JLE  | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JLE  | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JSLT | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JSLT | BPF_K:</div><div class='add'>+	case BPF_JMP32 | BPF_JSLE | BPF_X:</div><div class='add'>+	case BPF_JMP32 | BPF_JSLE | BPF_K:</div><div class='add'>+		CHECK_RET(handle_jumps(ctx, insn, &amp;len));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_JMP | BPF_CALL:</div><div class='add'>+		CHECK_RET(handle_call(ctx, insn, &amp;len));</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BPF_JMP | BPF_EXIT:</div><div class='add'>+		/* If this is the last instruction, epilogue will follow. */</div><div class='add'>+		if (is_last_insn(ctx-&gt;prog, idx))</div><div class='add'>+			break;</div><div class='add'>+		CHECK_RET(handle_jmp_epilogue(ctx, insn, &amp;len));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("bpf-jit: can't handle instruction code 0x%02X\n", code);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (BPF_CLASS(code) == BPF_ALU) {</div><div class='add'>+		/*</div><div class='add'>+		 * Skip the "swap" instructions. Even 64-bit swaps are of type</div><div class='add'>+		 * BPF_ALU (and not BPF_ALU64). Therefore, for the swaps, one</div><div class='add'>+		 * has to look at the "size" of the operations rather than the</div><div class='add'>+		 * ALU type. "gen_swap()" specifically takes care of that.</div><div class='add'>+		 */</div><div class='add'>+		if (BPF_OP(code) != BPF_END &amp;&amp; ctx-&gt;do_zext)</div><div class='add'>+			len += zext(BUF(buf, len), dst);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jit_buffer_update(ctx, len);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int handle_body(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	bool populate_bpf2insn = false;</div><div class='add'>+	const struct bpf_prog *prog = ctx-&gt;prog;</div><div class='add'>+</div><div class='add'>+	CHECK_RET(jit_buffer_check(ctx));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Record the mapping for the instructions during the dry-run.</div><div class='add'>+	 * Doing it this way allows us to have the mapping ready for</div><div class='add'>+	 * the jump instructions during the real compilation phase.</div><div class='add'>+	 */</div><div class='add'>+	if (!ctx-&gt;emit)</div><div class='add'>+		populate_bpf2insn = true;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; prog-&gt;len; i++) {</div><div class='add'>+		/* During the dry-run, jit.len grows gradually per BPF insn. */</div><div class='add'>+		if (populate_bpf2insn)</div><div class='add'>+			ctx-&gt;bpf2insn[i] = ctx-&gt;jit.len;</div><div class='add'>+</div><div class='add'>+		CHECK_RET(handle_insn(ctx, i));</div><div class='add'>+		if (ret &gt; 0) {</div><div class='add'>+			/* "ret" is 1 if two (64-bit) chunks were consumed. */</div><div class='add'>+			ctx-&gt;bpf2insn[i + 1] = ctx-&gt;bpf2insn[i];</div><div class='add'>+			i++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If bpf2insn had to be populated, then it is done at this point. */</div><div class='add'>+	if (populate_bpf2insn)</div><div class='add'>+		ctx-&gt;bpf2insn_valid = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize the memory with "unimp_s" which is the mnemonic for</div><div class='add'>+ * "unimplemented" instruction and always raises an exception.</div><div class='add'>+ *</div><div class='add'>+ * The instruction is 2 bytes. If "size" is odd, there is not much</div><div class='add'>+ * that can be done about the last byte in "area". Because, the</div><div class='add'>+ * CPU always fetches instructions in two bytes. Therefore, the</div><div class='add'>+ * byte beyond the last one is going to accompany it during a</div><div class='add'>+ * possible fetch. In the most likely case of a little endian</div><div class='add'>+ * system, that beyond-byte will become the major opcode and</div><div class='add'>+ * we have no control over its initialisation.</div><div class='add'>+ */</div><div class='add'>+static void fill_ill_insn(void *area, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	const u16 unimp_s = 0x79e0;</div><div class='add'>+</div><div class='add'>+	if (size &amp; 1) {</div><div class='add'>+		*((u8 *)area + (size - 1)) = 0xff;</div><div class='add'>+		size -= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset16(area, unimp_s, size &gt;&gt; 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Piece of memory that can be allocated at the beginning of jit_prepare(). */</div><div class='add'>+static int jit_prepare_early_mem_alloc(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;bpf2insn = kcalloc(ctx-&gt;prog-&gt;len, sizeof(ctx-&gt;jit.len),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;bpf2insn) {</div><div class='add'>+		pr_err("bpf-jit: could not allocate memory for "</div><div class='add'>+		       "mapping of the instructions.\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Memory allocations that rely on parameters known at the end of</div><div class='add'>+ * jit_prepare().</div><div class='add'>+ */</div><div class='add'>+static int jit_prepare_final_mem_alloc(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	const size_t alignment = sizeof(u32);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;bpf_header = bpf_jit_binary_alloc(ctx-&gt;jit.len, &amp;ctx-&gt;jit.buf,</div><div class='add'>+					       alignment, fill_ill_insn);</div><div class='add'>+	if (!ctx-&gt;bpf_header) {</div><div class='add'>+		pr_err("bpf-jit: could not allocate memory for translation.\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;need_extra_pass) {</div><div class='add'>+		ctx-&gt;jit_data = kzalloc(sizeof(*ctx-&gt;jit_data), GFP_KERNEL);</div><div class='add'>+		if (!ctx-&gt;jit_data)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The first phase of the translation without actually emitting any</div><div class='add'>+ * instruction. It helps in getting a forecast on some aspects, such</div><div class='add'>+ * as the length of the whole program or where the epilogue starts.</div><div class='add'>+ *</div><div class='add'>+ * Whenever the necessary parameters are known, memories are allocated.</div><div class='add'>+ */</div><div class='add'>+static int jit_prepare(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Dry run. */</div><div class='add'>+	ctx-&gt;emit = false;</div><div class='add'>+</div><div class='add'>+	CHECK_RET(jit_prepare_early_mem_alloc(ctx));</div><div class='add'>+</div><div class='add'>+	/* Get the length of prologue section after some register analysis. */</div><div class='add'>+	analyze_reg_usage(ctx);</div><div class='add'>+	CHECK_RET(handle_prologue(ctx));</div><div class='add'>+</div><div class='add'>+	CHECK_RET(handle_body(ctx));</div><div class='add'>+</div><div class='add'>+	/* Record at which offset epilogue begins. */</div><div class='add'>+	ctx-&gt;epilogue_offset = ctx-&gt;jit.len;</div><div class='add'>+</div><div class='add'>+	/* Process the epilogue section now. */</div><div class='add'>+	CHECK_RET(handle_epilogue(ctx));</div><div class='add'>+</div><div class='add'>+	CHECK_RET(jit_prepare_final_mem_alloc(ctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All the "handle_*()" functions have been called before by the</div><div class='add'>+ * "jit_prepare()". If there was an error, we would know by now.</div><div class='add'>+ * Therefore, no extra error checking at this point, other than</div><div class='add'>+ * a sanity check at the end that expects the calculated length</div><div class='add'>+ * (jit.len) to be equal to the length of generated instructions</div><div class='add'>+ * (jit.index).</div><div class='add'>+ */</div><div class='add'>+static int jit_compile(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Let there be code. */</div><div class='add'>+	ctx-&gt;emit = true;</div><div class='add'>+</div><div class='add'>+	CHECK_RET(handle_prologue(ctx));</div><div class='add'>+</div><div class='add'>+	CHECK_RET(handle_body(ctx));</div><div class='add'>+</div><div class='add'>+	CHECK_RET(handle_epilogue(ctx));</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;jit.index != ctx-&gt;jit.len) {</div><div class='add'>+		pr_err("bpf-jit: divergence between the phases; "</div><div class='add'>+		       "%u vs. %u (bytes).\n",</div><div class='add'>+		       ctx-&gt;jit.len, ctx-&gt;jit.index);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Calling this function implies a successful JIT. A successful</div><div class='add'>+ * translation is signaled by setting the right parameters:</div><div class='add'>+ *</div><div class='add'>+ * prog-&gt;jited=1, prog-&gt;jited_len=..., prog-&gt;bpf_func=...</div><div class='add'>+ */</div><div class='add'>+static int jit_finalize(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *prog = ctx-&gt;prog;</div><div class='add'>+</div><div class='add'>+	/* We're going to need this information for the "do_extra_pass()". */</div><div class='add'>+	if (ctx-&gt;need_extra_pass) {</div><div class='add'>+		ctx-&gt;jit_data-&gt;bpf_header = ctx-&gt;bpf_header;</div><div class='add'>+		ctx-&gt;jit_data-&gt;bpf2insn = ctx-&gt;bpf2insn;</div><div class='add'>+		prog-&gt;aux-&gt;jit_data = (void *)ctx-&gt;jit_data;</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * If things seem finalised, then mark the JITed memory</div><div class='add'>+		 * as R-X and flush it.</div><div class='add'>+		 */</div><div class='add'>+		if (bpf_jit_binary_lock_ro(ctx-&gt;bpf_header)) {</div><div class='add'>+			pr_err("bpf-jit: Could not lock the JIT memory.\n");</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+		flush_icache_range((unsigned long)ctx-&gt;bpf_header,</div><div class='add'>+				   (unsigned long)</div><div class='add'>+				   BUF(ctx-&gt;jit.buf, ctx-&gt;jit.len));</div><div class='add'>+		prog-&gt;aux-&gt;jit_data = NULL;</div><div class='add'>+		bpf_prog_fill_jited_linfo(prog, ctx-&gt;bpf2insn);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;success = true;</div><div class='add'>+	prog-&gt;bpf_func = (void *)ctx-&gt;jit.buf;</div><div class='add'>+	prog-&gt;jited_len = ctx-&gt;jit.len;</div><div class='add'>+	prog-&gt;jited = 1;</div><div class='add'>+</div><div class='add'>+	jit_ctx_cleanup(ctx);</div><div class='add'>+	jit_dump(ctx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A lenient verification for the existence of JIT context in "prog".</div><div class='add'>+ * Apparently the JIT internals, namely jit_subprogs() in bpf/verifier.c,</div><div class='add'>+ * may request for a second compilation although nothing needs to be done.</div><div class='add'>+ */</div><div class='add'>+static inline int check_jit_context(const struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	if (!prog-&gt;aux-&gt;jit_data) {</div><div class='add'>+		pr_notice("bpf-jit: no jit data for the extra pass.\n");</div><div class='add'>+		return 1;</div><div class='add'>+	} else {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reuse the previous pass's data. */</div><div class='add'>+static int jit_resume_context(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct arc_jit_data *jdata =</div><div class='add'>+		(struct arc_jit_data *)ctx-&gt;prog-&gt;aux-&gt;jit_data;</div><div class='add'>+</div><div class='add'>+	if (!jdata) {</div><div class='add'>+		pr_err("bpf-jit: no jit data for the extra pass.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;jit.buf = (u8 *)ctx-&gt;prog-&gt;bpf_func;</div><div class='add'>+	ctx-&gt;jit.len = ctx-&gt;prog-&gt;jited_len;</div><div class='add'>+	ctx-&gt;bpf_header = jdata-&gt;bpf_header;</div><div class='add'>+	ctx-&gt;bpf2insn = (u32 *)jdata-&gt;bpf2insn;</div><div class='add'>+	ctx-&gt;bpf2insn_valid = ctx-&gt;bpf2insn ? true : false;</div><div class='add'>+	ctx-&gt;jit_data = jdata;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Patch in the new addresses. The instructions of interest are:</div><div class='add'>+ *</div><div class='add'>+ * - call</div><div class='add'>+ * - ld r64, imm64</div><div class='add'>+ *</div><div class='add'>+ * For "call"s, it resolves the addresses one more time through the</div><div class='add'>+ * handle_call().</div><div class='add'>+ *</div><div class='add'>+ * For 64-bit immediate loads, it just retranslates them, because the BPF</div><div class='add'>+ * core in kernel might have changed the value since the normal pass.</div><div class='add'>+ */</div><div class='add'>+static int jit_patch_relocations(struct jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	const u8 bpf_opc_call = BPF_JMP | BPF_CALL;</div><div class='add'>+	const u8 bpf_opc_ldi64 = BPF_LD | BPF_DW | BPF_IMM;</div><div class='add'>+	const struct bpf_prog *prog = ctx-&gt;prog;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;emit = true;</div><div class='add'>+	for (u32 i = 0; i &lt; prog-&gt;len; i++) {</div><div class='add'>+		const struct bpf_insn *insn = &amp;prog-&gt;insnsi[i];</div><div class='add'>+		u8 dummy;</div><div class='add'>+		/*</div><div class='add'>+		 * Adjust "ctx.jit.index", so "gen_*()" functions below</div><div class='add'>+		 * can use it for their output addresses.</div><div class='add'>+		 */</div><div class='add'>+		ctx-&gt;jit.index = ctx-&gt;bpf2insn[i];</div><div class='add'>+</div><div class='add'>+		if (insn-&gt;code == bpf_opc_call) {</div><div class='add'>+			CHECK_RET(handle_call(ctx, insn, &amp;dummy));</div><div class='add'>+		} else if (insn-&gt;code == bpf_opc_ldi64) {</div><div class='add'>+			CHECK_RET(handle_ld_imm64(ctx, insn, &amp;dummy));</div><div class='add'>+			/* Skip the next instruction. */</div><div class='add'>+			++i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A normal pass that involves a "dry-run" phase, jit_prepare(),</div><div class='add'>+ * to get the necessary data for the real compilation phase,</div><div class='add'>+ * jit_compile().</div><div class='add'>+ */</div><div class='add'>+static struct bpf_prog *do_normal_pass(struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	struct jit_context ctx;</div><div class='add'>+</div><div class='add'>+	/* Bail out if JIT is disabled. */</div><div class='add'>+	if (!prog-&gt;jit_requested)</div><div class='add'>+		return prog;</div><div class='add'>+</div><div class='add'>+	if (jit_ctx_init(&amp;ctx, prog)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get the lengths and allocate buffer. */</div><div class='add'>+	if (jit_prepare(&amp;ctx)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (jit_compile(&amp;ctx)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (jit_finalize(&amp;ctx)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ctx.prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If there are multi-function BPF programs that call each other,</div><div class='add'>+ * their translated addresses are not known all at once. Therefore,</div><div class='add'>+ * an extra pass is needed to consult the bpf_jit_get_func_addr()</div><div class='add'>+ * again to get the newly translated addresses in order to resolve</div><div class='add'>+ * the "call"s.</div><div class='add'>+ */</div><div class='add'>+static struct bpf_prog *do_extra_pass(struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	struct jit_context ctx;</div><div class='add'>+</div><div class='add'>+	/* Skip if there's no context to resume from. */</div><div class='add'>+	if (check_jit_context(prog))</div><div class='add'>+		return prog;</div><div class='add'>+</div><div class='add'>+	if (jit_ctx_init(&amp;ctx, prog)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (jit_resume_context(&amp;ctx)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (jit_patch_relocations(&amp;ctx)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (jit_finalize(&amp;ctx)) {</div><div class='add'>+		jit_ctx_cleanup(&amp;ctx);</div><div class='add'>+		return prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ctx.prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function may be invoked twice for the same stream of BPF</div><div class='add'>+ * instructions. The "extra pass" happens, when there are "call"s</div><div class='add'>+ * involved that their addresses are not known during the first</div><div class='add'>+ * invocation.</div><div class='add'>+ */</div><div class='add'>+struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	vm_dump(prog);</div><div class='add'>+</div><div class='add'>+	/* Was this program already translated? */</div><div class='add'>+	if (!prog-&gt;jited)</div><div class='add'>+		return do_normal_pass(prog);</div><div class='add'>+	else</div><div class='add'>+		return do_extra_pass(prog);</div><div class='add'>+</div><div class='add'>+	return prog;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile<br/>index 2d26c3397f14..4247f19b1adc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/Makefile</a></div><div class='hunk'>@@ -61,6 +61,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \</div><div class='ctx'> 	sun5i-a13-olinuxino.dtb \</div><div class='ctx'> 	sun5i-a13-olinuxino-micro.dtb \</div><div class='ctx'> 	sun5i-a13-pocketbook-touch-lux-3.dtb \</div><div class='add'>+	sun5i-a13-pocketbook-614-plus.dtb \</div><div class='ctx'> 	sun5i-a13-q8-tablet.dtb \</div><div class='ctx'> 	sun5i-a13-utoo-p66.dtb \</div><div class='ctx'> 	sun5i-gr8-chip-pro.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts b/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts<br/>new file mode 100644<br/>index 000000000000..ab8d138dc11d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts</a></div><div class='hunk'>@@ -0,0 +1,218 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Denis Burkov &lt;hitechshell@mail.ru&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun5i-a13.dtsi"</div><div class='add'>+#include "sunxi-common-regulators.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "PocketBook 614 Plus";</div><div class='add'>+	compatible = "pocketbook,614-plus", "allwinner,sun5i-a13";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+			gpios = &lt;&amp;pio 4 8 GPIO_ACTIVE_LOW&gt;; /* PE8 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-0 {</div><div class='add'>+			label = "Right";</div><div class='add'>+			linux,code = &lt;KEY_NEXT&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 6 9 GPIO_ACTIVE_LOW&gt;; /* PG9 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-1 {</div><div class='add'>+			label = "Left";</div><div class='add'>+			linux,code = &lt;KEY_PREVIOUS&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 6 10 GPIO_ACTIVE_LOW&gt;; /* PG10 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3_mmc0: regulator-mmc0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd-mmc0";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 4 4 GPIO_ACTIVE_LOW&gt;; /* PE4 */</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp209: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp209";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp209.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcf8563: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_ldo2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button-300 {</div><div class='add'>+		label = "Down";</div><div class='add'>+		linux,code = &lt;KEY_DOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-700 {</div><div class='add'>+		label = "Up";</div><div class='add'>+		linux,code = &lt;KEY_UP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;700000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-1000 {</div><div class='add'>+		label = "Left";</div><div class='add'>+		linux,code = &lt;KEY_LEFT&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-1200 {</div><div class='add'>+		label = "Menu";</div><div class='add'>+		linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-1500 {</div><div class='add'>+		label = "Right";</div><div class='add'>+		linux,code = &lt;KEY_RIGHT&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3_mmc0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 6 0 GPIO_ACTIVE_LOW&gt;; /* PG0 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_4bit_pc_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;otg_sram {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-int-dll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo1 {</div><div class='add'>+	regulator-name = "vdd-rtc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_ldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	regulator-name = "avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb0_vbus {</div><div class='add'>+	status = "okay";</div><div class='add'>+	gpio = &lt;&amp;pio 6 12 GPIO_ACTIVE_HIGH&gt;; /* PG12 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb1_vbus {</div><div class='add'>+	gpio = &lt;&amp;pio 6 11 GPIO_ACTIVE_HIGH&gt;; /* PG11 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pg_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_power_supply {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;battery_power_supply {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_id_det-gpios = &lt;&amp;pio 6 2 GPIO_ACTIVE_HIGH&gt;; /* PG2 */</div><div class='add'>+	usb0_vbus_det-gpios = &lt;&amp;axp_gpio 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi b/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi<br/>index 3325ab07094a..2c9152b151be 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-a13.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun5i-a13.dtsi</a></div><div class='hunk'>@@ -62,14 +62,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				cpu_alert0: cpu_alert0 {</div><div class='add'>+				cpu_alert0: cpu-alert0 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;85000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_crit: cpu_crit {</div><div class='add'>+				cpu_crit: cpu-crit {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;100000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts b/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts<br/>index 5c3562b85a5b..ffbd99c176db 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts</a></div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc0_pwrseq: mmc0_pwrseq {</div><div class='add'>+	mmc0_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 1 10 GPIO_ACTIVE_LOW&gt;; /* PB10 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts b/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts<br/>index 4192c23848c3..8c784a2c086e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts</a></div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc0_pwrseq: mmc0_pwrseq {</div><div class='add'>+	mmc0_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 2 19 GPIO_ACTIVE_LOW&gt;; /* PC19 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts<br/>index 236ebfc06192..5bce7a32651e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts</a></div><div class='hunk'>@@ -109,7 +109,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_vga_3v3: vga_3v3_regulator {</div><div class='add'>+	reg_vga_3v3: vga-3v3-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vga-3v3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 7 25 GPIO_ACTIVE_HIGH&gt;; /* PH25 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 6 10 GPIO_ACTIVE_LOW&gt;; /* PG10 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi<br/>index 5cce4918f84c..f0145d6b9c53 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun6i-a31.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun6i-a31.dtsi</a></div><div class='hunk'>@@ -179,14 +179,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				cpu_alert0: cpu_alert0 {</div><div class='add'>+				cpu_alert0: cpu-alert0 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;70000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_crit: cpu_crit {</div><div class='add'>+				cpu_crit: cpu-crit {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;100000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='hunk'>@@ -1318,7 +1318,7 @@</div><div class='ctx'> 			compatible = "allwinner,sun6i-a31-prcm";</div><div class='ctx'> 			reg = &lt;0x01f01400 0x200&gt;;</div><div class='ctx'> </div><div class='del'>-			ar100: ar100_clk {</div><div class='add'>+			ar100: ar100-clk {</div><div class='ctx'> 				compatible = "allwinner,sun6i-a31-ar100-clk";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rtc CLK_OSC32K&gt;, &lt;&amp;osc24M&gt;,</div><div class='hunk'>@@ -1327,7 +1327,7 @@</div><div class='ctx'> 				clock-output-names = "ar100";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ahb0: ahb0_clk {</div><div class='add'>+			ahb0: ahb0-clk {</div><div class='ctx'> 				compatible = "fixed-factor-clock";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clock-div = &lt;1&gt;;</div><div class='hunk'>@@ -1336,14 +1336,14 @@</div><div class='ctx'> 				clock-output-names = "ahb0";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			apb0: apb0_clk {</div><div class='add'>+			apb0: apb0-clk {</div><div class='ctx'> 				compatible = "allwinner,sun6i-a31-apb0-clk";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;ahb0&gt;;</div><div class='ctx'> 				clock-output-names = "apb0";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			apb0_gates: apb0_gates_clk {</div><div class='add'>+			apb0_gates: apb0-gates-clk {</div><div class='ctx'> 				compatible = "allwinner,sun6i-a31-apb0-gates-clk";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;apb0&gt;;</div><div class='hunk'>@@ -1353,14 +1353,14 @@</div><div class='ctx'> 						"apb0_i2c";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ir_clk: ir_clk {</div><div class='add'>+			ir_clk: ir-clk {</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				compatible = "allwinner,sun4i-a10-mod0-clk";</div><div class='ctx'> 				clocks = &lt;&amp;rtc CLK_OSC32K&gt;, &lt;&amp;osc24M&gt;;</div><div class='ctx'> 				clock-output-names = "ir";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			apb0_rst: apb0_rst {</div><div class='add'>+			apb0_rst: apb0-rst {</div><div class='ctx'> 				compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='ctx'> 				#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts<br/>index 96554ab4f6d3..f63d67ec9887 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc2_pwrseq: mmc2_pwrseq {</div><div class='add'>+	mmc2_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 8 GPIO_ACTIVE_LOW&gt;; /* PL8 WIFI_EN */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts<br/>index caa935ca4f19..f2d7fab9978d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts</a></div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc3_pwrseq: mmc3_pwrseq {</div><div class='add'>+	mmc3_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 7 22 GPIO_ACTIVE_LOW&gt;; /* PH22 WL-PMU-EN */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts<br/>index 52160e368304..be9b31d0f4b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts</a></div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc3_pwrseq: mmc3_pwrseq {</div><div class='add'>+	mmc3_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 7 9 GPIO_ACTIVE_LOW&gt;; /* PH9 WIFI_EN */</div><div class='ctx'> 		clocks = &lt;&amp;ccu CLK_OUT_A&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts<br/>index 3def2a330598..f1e26b75cd90 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts</a></div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_mmc3_vdd: mmc3_vdd {</div><div class='add'>+	reg_mmc3_vdd: regulator-mmc3-vdd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "mmc3_vdd";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 7 9 GPIO_ACTIVE_HIGH&gt;; /* PH9 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_gmac_vdd: gmac_vdd {</div><div class='add'>+	reg_gmac_vdd: regulator-gmac-vdd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "gmac_vdd";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts<br/>index 20bf09b2226c..fb835730bbc4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> 	model = "Olimex A20-Olimex-SOM-EVB-eMMC";</div><div class='ctx'> 	compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	mmc2_pwrseq: mmc2_pwrseq {</div><div class='add'>+	mmc2_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-emmc";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 2 18 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts<br/>index a59755a2e7a9..e8977c2fe798 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 	model = "Olimex A20-SOM204-EVB-eMMC";</div><div class='ctx'> 	compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";</div><div class='ctx'> </div><div class='del'>-	mmc2_pwrseq: mmc2_pwrseq {</div><div class='add'>+	mmc2_pwrseq: pwrseq-1 {</div><div class='ctx'> 		compatible = "mmc-pwrseq-emmc";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 2 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts<br/>index 54af6c18075b..a55406657449 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts</a></div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtl_pwrseq: rtl_pwrseq {</div><div class='add'>+	rtl_pwrseq: pwrseq-0 {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 6 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -177,7 +177,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	rtl8723bs: sdio_wifi@1 {</div><div class='add'>+	rtl8723bs: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts<br/>index ecb91fb899ff..435a189332e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts</a></div><div class='hunk'>@@ -82,7 +82,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_axp_ipsout: axp_ipsout {</div><div class='add'>+	reg_axp_ipsout: regulator-axp-ipsout {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "axp-ipsout";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts<br/>index 3bfae98f3cc3..29199b6a3b4a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts</a></div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc3_pwrseq: mmc3_pwrseq {</div><div class='add'>+	mmc3_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 7 9 GPIO_ACTIVE_LOW&gt;; /* PH9 WIFI_EN */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi b/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi<br/>index 5574299685ab..5f44f09c5545 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun7i-a20.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun7i-a20.dtsi</a></div><div class='hunk'>@@ -153,14 +153,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				cpu_alert0: cpu_alert0 {</div><div class='add'>+				cpu_alert0: cpu-alert0 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;75000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_crit: cpu_crit {</div><div class='add'>+				cpu_crit: cpu-crit {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;100000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi<br/>index cd4bf60dbb3c..2af8382ccdf5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi</a></div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		osc24M: osc24M_clk {</div><div class='add'>+		osc24M: osc24M-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;24000000&gt;;</div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'> 			clock-output-names = "osc24M";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ext_osc32k: ext_osc32k_clk {</div><div class='add'>+		ext_osc32k: ext-osc32k-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;32768&gt;;</div><div class='hunk'>@@ -733,7 +733,7 @@</div><div class='ctx'> 			compatible = "allwinner,sun8i-a23-prcm";</div><div class='ctx'> 			reg = &lt;0x01f01400 0x200&gt;;</div><div class='ctx'> </div><div class='del'>-			ar100: ar100_clk {</div><div class='add'>+			ar100: ar100-clk {</div><div class='ctx'> 				compatible = "fixed-factor-clock";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clock-div = &lt;1&gt;;</div><div class='hunk'>@@ -742,7 +742,7 @@</div><div class='ctx'> 				clock-output-names = "ar100";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ahb0: ahb0_clk {</div><div class='add'>+			ahb0: ahb0-clk {</div><div class='ctx'> 				compatible = "fixed-factor-clock";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clock-div = &lt;1&gt;;</div><div class='hunk'>@@ -751,14 +751,14 @@</div><div class='ctx'> 				clock-output-names = "ahb0";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			apb0: apb0_clk {</div><div class='add'>+			apb0: apb0-clk {</div><div class='ctx'> 				compatible = "allwinner,sun8i-a23-apb0-clk";</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;ahb0&gt;;</div><div class='ctx'> 				clock-output-names = "apb0";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			apb0_gates: apb0_gates_clk {</div><div class='add'>+			apb0_gates: apb0-gates-clk {</div><div class='ctx'> 				compatible = "allwinner,sun8i-a23-apb0-gates-clk";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;apb0&gt;;</div><div class='hunk'>@@ -767,7 +767,7 @@</div><div class='ctx'> 						"apb0_i2c";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			apb0_rst: apb0_rst {</div><div class='add'>+			apb0_rst: apb0-rst {</div><div class='ctx'> 				compatible = "allwinner,sun6i-a31-clock-reset";</div><div class='ctx'> 				#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts<br/>index d5f6aebd7216..0c585a6d990d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 		ethernet0 = &amp;esp8089;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 6 GPIO_ACTIVE_LOW&gt;; /* PL6 */</div><div class='ctx'> 		/* The esp8089 needs 200 ms after driving wifi-en high */</div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	esp8089: sdio_wifi@1 {</div><div class='add'>+	esp8089: wifi@1 {</div><div class='ctx'> 		compatible = "esp,esp8089";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		esp,crystal-26M-en = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts<br/>index 9f9232a2fefb..63cb4e194a03 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 		ethernet0 = &amp;esp8089;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 6 GPIO_ACTIVE_LOW&gt;; /* PL6 */</div><div class='ctx'> 		/* The esp8089 needs 200 ms after driving wifi-en high */</div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	esp8089: sdio_wifi@1 {</div><div class='add'>+	esp8089: wifi@1 {</div><div class='ctx'> 		compatible = "esp,esp8089";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		esp,crystal-26M-en = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts<br/>index 2dfdd0a3151e..f00ce03ffc84 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	rtl8703as: sdio_wifi@1 {</div><div class='add'>+	rtl8703as: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts<br/>index 065cb620aa99..162ba93f7484 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts</a></div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	rtl8723bs: sdio_wifi@1 {</div><div class='add'>+	rtl8723bs: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi<br/>index 30fdd2703b1f..36b2d78cdab9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a33.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a33.dtsi</a></div><div class='hunk'>@@ -323,35 +323,35 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				cpu_alert0: cpu_alert0 {</div><div class='add'>+				cpu_alert0: cpu-alert0 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;75000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				gpu_alert0: gpu_alert0 {</div><div class='add'>+				gpu_alert0: gpu-alert0 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;85000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_alert1: cpu_alert1 {</div><div class='add'>+				cpu_alert1: cpu-alert1 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;90000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				gpu_alert1: gpu_alert1 {</div><div class='add'>+				gpu_alert1: gpu-alert1 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_crit: cpu_crit {</div><div class='add'>+				cpu_crit: cpu-crit {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts<br/>index 8d56b103f063..32e811fa23e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts</a></div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 3 24 GPIO_ACTIVE_HIGH&gt;; /* PD24 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;ac100_rtc 1&gt;;</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts<br/>index 870993393fc2..d5e6ddaffbce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts</a></div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;ac100_rtc 1&gt;;</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts<br/>index a7d4ca308990..43982b106a4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts</a></div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_vbat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 WL-PMU-EN */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi<br/>index 94eb3bfc989e..addf0cb0f465 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi</a></div><div class='hunk'>@@ -164,7 +164,7 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		/* TODO: PRCM block has a mux for this. */</div><div class='del'>-		osc24M: osc24M_clk {</div><div class='add'>+		osc24M: osc24M-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;24000000&gt;;</div><div class='hunk'>@@ -177,14 +177,14 @@</div><div class='ctx'> 		 * It is an internal RC-based oscillator.</div><div class='ctx'> 		 * TODO: Its controls are in the PRCM block.</div><div class='ctx'> 		 */</div><div class='del'>-		osc16M: osc16M_clk {</div><div class='add'>+		osc16M: osc16M-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;16000000&gt;;</div><div class='ctx'> 			clock-output-names = "osc16M";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		osc16Md512: osc16Md512_clk {</div><div class='add'>+		osc16Md512: osc16Md512-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-factor-clock";</div><div class='ctx'> 			clock-div = &lt;512&gt;;</div><div class='hunk'>@@ -1127,7 +1127,7 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		r_cpucfg@1f01c00 {</div><div class='add'>+		cpucfg@1f01c00 {</div><div class='ctx'> 			compatible = "allwinner,sun8i-a83t-r-cpucfg";</div><div class='ctx'> 			reg = &lt;0x1f01c00 0x400&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts<br/>index d729b7c705db..d3a7c9fa23e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts</a></div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		cpu-supply = &lt;&amp;reg_vcc1v2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts<br/>index 3356f4210d45..79b03b31c5eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts</a></div><div class='hunk'>@@ -43,11 +43,12 @@</div><div class='ctx'> /* Orange Pi R1 is based on Orange Pi Zero design */</div><div class='ctx'> #include "sun8i-h2-plus-orangepi-zero.dts"</div><div class='ctx'> </div><div class='add'>+/delete-node/ &amp;reg_vcc_wifi;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Xunlong Orange Pi R1";</div><div class='ctx'> 	compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus";</div><div class='ctx'> </div><div class='del'>-	/delete-node/ reg_vcc_wifi;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ths pin of this regulator is the same with the Wi-Fi extra</div><div class='hunk'>@@ -89,7 +90,7 @@</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='ctx'> </div><div class='del'>-	rtl8189etv: sdio_wifi@1 {</div><div class='add'>+	rtl8189etv: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts<br/>index 3706216ffb40..1b001f2ad0ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</a></div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_vcc_wifi: reg_vcc_wifi {</div><div class='add'>+	reg_vcc_wifi: reg-vcc-wifi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		states = &lt;1100000 0&gt;, &lt;1300000 1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> 	 * Explicitly define the sdio device, so that we can add an ethernet</div><div class='ctx'> 	 * alias for it (which e.g. makes u-boot set a mac-address).</div><div class='ctx'> 	 */</div><div class='del'>-	xr819: sdio_wifi@1 {</div><div class='add'>+	xr819: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts<br/>index a6d38ecee141..5b77300307de 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts</a></div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='hunk'>@@ -185,7 +185,7 @@</div><div class='ctx'> 	 * Explicitly define the sdio device, so that we can add an ethernet</div><div class='ctx'> 	 * alias for it (which e.g. makes u-boot set a mac-address).</div><div class='ctx'> 	 */</div><div class='del'>-	sdiowifi: sdio_wifi@1 {</div><div class='add'>+	sdiowifi: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts<br/>index 343b02b97155..2b0566d4b386 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts</a></div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_vcc5v0&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	sdio_wifi: sdio_wifi@1 {</div><div class='add'>+	sdio_wifi: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts<br/>index 4ba533b0340f..59bd0746acf8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 3 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 	};</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	sdio_wifi: sdio_wifi@1 {</div><div class='add'>+	sdio_wifi: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts<br/>index 9e1a33f94cad..6d85370e04f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts</a></div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts<br/>index 42cd1131adf3..870649760f70 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 			 &lt;1300000 0x1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts<br/>index f1f9dbead32a..d2ae47b074bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts</a></div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 WIFI_EN */</div><div class='ctx'> 	};</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'> 	 * Explicitly define the sdio device, so that we can add an ethernet</div><div class='ctx'> 	 * alias for it (which e.g. makes u-boot set a mac-address).</div><div class='ctx'> 	 */</div><div class='del'>-	rtl8189: sdio_wifi@1 {</div><div class='add'>+	rtl8189: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts<br/>index 305b34a321f5..6a4316a52469 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts</a></div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> 	 * Explicitly define the sdio device, so that we can add an ethernet</div><div class='ctx'> 	 * alias for it (which e.g. makes u-boot set a mac-address).</div><div class='ctx'> 	 */</div><div class='del'>-	rtl8189ftv: sdio_wifi@1 {</div><div class='add'>+	rtl8189ftv: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts<br/>index babf4cf1b2f6..8a49b3376dfc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts</a></div><div class='hunk'>@@ -63,7 +63,7 @@</div><div class='ctx'> 	 * Explicitly define the sdio device, so that we can add an ethernet</div><div class='ctx'> 	 * alias for it (which e.g. makes u-boot set a mac-address).</div><div class='ctx'> 	 */</div><div class='del'>-	rtl8189ftv: sdio_wifi@1 {</div><div class='add'>+	rtl8189ftv: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts<br/>index 561ea1d2f861..7a6444a10e25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</a></div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 0 9 GPIO_ACTIVE_LOW&gt;; /* PA9 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi b/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi<br/>index 3d9a1524e17e..272584881bb2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Q8 boards use various PL# pins as wifi-en. On other boards</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	sdio_wifi: sdio_wifi@1 {</div><div class='add'>+	sdio_wifi: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts<br/>index bc394686fedb..f4bf46b35bec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 6 GPIO_ACTIVE_LOW&gt;; /* PL06 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts b/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts<br/>index 95543a9c2118..75067522ff59 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 6 GPIO_ACTIVE_LOW&gt;; /* PL06 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts<br/>index 28197bbcb1d5..cd2351acc32f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts</a></div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 6 10 GPIO_ACTIVE_LOW&gt;; /* PG10 WIFI_EN */</div><div class='ctx'> 		clocks = &lt;&amp;ccu CLK_OUTA&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts b/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts<br/>index 0bd1336206b8..15b0b4de626a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 1 10 GPIO_ACTIVE_LOW&gt;; // PB10 WIFI_EN</div><div class='ctx'> 		clocks = &lt;&amp;ccu CLK_OUTA&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts b/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts<br/>index 20966e954eda..e0d4404b5957 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts</a></div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 		startup-delay-us = &lt;200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 1 3 GPIO_ACTIVE_LOW&gt;; /* PB3 WIFI-RST */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi<br/>index e8a04476b776..9e13c2aa8911 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi</a></div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		osc24M: osc24M_clk {</div><div class='add'>+		osc24M: osc24M-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;24000000&gt;;</div><div class='hunk'>@@ -106,7 +106,7 @@</div><div class='ctx'> 			clock-output-names = "osc24M";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		osc32k: osc32k_clk {</div><div class='add'>+		osc32k: osc32k-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;32768&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts<br/>index 434871040aca..6575ef274453 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts</a></div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 6 10 GPIO_ACTIVE_LOW&gt;; /* PG10 WIFI_EN */</div><div class='ctx'> 		clocks = &lt;&amp;ccu CLK_OUTA&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi<br/>index 7d3f3300f431..a1ae0929cec9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sun9i-a80.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sun9i-a80.dtsi</a></div><div class='hunk'>@@ -196,14 +196,14 @@</div><div class='ctx'> 		 * The actual TX clock rate is not controlled by the</div><div class='ctx'> 		 * gmac_tx clock.</div><div class='ctx'> 		 */</div><div class='del'>-		mii_phy_tx_clk: mii_phy_tx_clk {</div><div class='add'>+		mii_phy_tx_clk: mii-phy-tx-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;25000000&gt;;</div><div class='ctx'> 			clock-output-names = "mii_phy_tx";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac_int_tx_clk: gmac_int_tx_clk {</div><div class='add'>+		gmac_int_tx_clk: gmac-int-tx-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;125000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi<br/>index 1d1d127cf38f..873817ddb4ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi</a></div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pio 3 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi<br/>index 60804b0e6c56..be5f5528a118 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 2 7 GPIO_ACTIVE_LOW&gt;; /* PC7 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi<br/>index ade1cd50e445..7df60515a903 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi</a></div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		osc24M: osc24M_clk {</div><div class='add'>+		osc24M: osc24M-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;24000000&gt;;</div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 			clock-output-names = "osc24M";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		osc32k: osc32k_clk {</div><div class='add'>+		osc32k: osc32k-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;32768&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts<br/>index 4554abf0c7cd..9aa2de3723b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts</a></div><div class='hunk'>@@ -98,14 +98,14 @@</div><div class='ctx'> </div><div class='ctx'> 	/* IPB PMIC */</div><div class='ctx'> 	lm25066@40 {</div><div class='del'>-		compatible = "lm25066";</div><div class='add'>+		compatible = "ti,lm25066";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='ctx'> 		shunt-resistor-micro-ohms = &lt;1000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* 12VSB PMIC */</div><div class='ctx'> 	lm25066@41 {</div><div class='del'>-		compatible = "lm25066";</div><div class='add'>+		compatible = "ti,lm25066";</div><div class='ctx'> 		reg = &lt;0x41&gt;;</div><div class='ctx'> 		shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts<br/>index 6600f7e9bf5e..e830fec0570f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #define EFUSE(hexaddr, num)							\</div><div class='ctx'> 	efuse@##hexaddr {							\</div><div class='del'>-		compatible = "lm25066";						\</div><div class='add'>+		compatible = "ti,lm25066";					\</div><div class='ctx'> 		reg = &lt;0x##hexaddr&gt;;						\</div><div class='ctx'> 		shunt-resistor-micro-ohms = &lt;675&gt;;				\</div><div class='ctx'> 		regulators {							\</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/Makefile b/arch/arm/boot/dts/broadcom/Makefile<br/>index 7099d9560033..5881bcc95eba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/Makefile</a></div><div class='hunk'>@@ -64,6 +64,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \</div><div class='ctx'> 	bcm47081-luxul-xap-1410.dtb \</div><div class='ctx'> 	bcm47081-luxul-xwr-1200.dtb \</div><div class='ctx'> 	bcm47081-tplink-archer-c5-v2.dtb \</div><div class='add'>+	bcm4709-asus-rt-ac3200.dtb \</div><div class='ctx'> 	bcm4709-asus-rt-ac87u.dtb \</div><div class='ctx'> 	bcm4709-buffalo-wxr-1900dhp.dtb \</div><div class='ctx'> 	bcm4709-linksys-ea9200.dtb \</div><div class='hunk'>@@ -71,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \</div><div class='ctx'> 	bcm4709-netgear-r8000.dtb \</div><div class='ctx'> 	bcm4709-tplink-archer-c9-v1.dtb \</div><div class='ctx'> 	bcm47094-asus-rt-ac3100.dtb \</div><div class='add'>+	bcm47094-asus-rt-ac5300.dtb \</div><div class='ctx'> 	bcm47094-asus-rt-ac88u.dtb \</div><div class='ctx'> 	bcm47094-dlink-dir-885l.dtb \</div><div class='ctx'> 	bcm47094-dlink-dir-890l.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts<br/>index d5f8823230db..353bb50ce542 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include "bcm283x-rpi-led-deprecated.dtsi"</div><div class='ctx'> #include "bcm283x-rpi-usb-peripheral.dtsi"</div><div class='ctx'> #include "bcm283x-rpi-wifi-bt.dtsi"</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "raspberrypi,4-model-b", "brcm,bcm2711";</div><div class='hunk'>@@ -15,6 +16,13 @@</div><div class='ctx'> 		stdout-path = "serial1:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cam1_reg: regulator-cam1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cam1-reg";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;expgpio 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sd_io_1v8_reg: regulator-sd-io-1v8 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "vdd-sd-io";</div><div class='hunk'>@@ -197,6 +205,27 @@</div><div class='ctx'> 	phy1: ethernet-phy@1 {</div><div class='ctx'> 		/* No PHY interrupt */</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+		leds {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			/* LED1 */</div><div class='add'>+			led@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				function = LED_FUNCTION_LAN;</div><div class='add'>+				default-state = "keep";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* LED2 */</div><div class='add'>+			led@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+				function = LED_FUNCTION_LAN;</div><div class='add'>+				default-state = "keep";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts<br/>index 5a2869a18bd5..ca9be91b4f36 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;genet_mdio {</div><div class='ctx'> 	clock-frequency = &lt;1950000&gt;;</div><div class='add'>+	/delete-node/ leds;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;led_pwr {</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts<br/>index d7ba02f586d3..6bc77dd48c0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include "bcm2711-rpi-cm4.dtsi"</div><div class='ctx'> #include "bcm283x-rpi-led-deprecated.dtsi"</div><div class='ctx'> #include "bcm283x-rpi-usb-host.dtsi"</div><div class='hunk'>@@ -101,6 +102,38 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c0_1 {</div><div class='add'>+	rtc@51 {</div><div class='add'>+		/* Attention: An alarm resets the machine */</div><div class='add'>+		compatible = "nxp,pcf85063a";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;7000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy1 {</div><div class='add'>+	leds {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* LED2 */</div><div class='add'>+		led@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* LED3 */</div><div class='add'>+		led@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;led_act {</div><div class='ctx'> 	gpios = &lt;&amp;gpio 42 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi<br/>index d233a191c139..6bf4241fe3b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi</a></div><div class='hunk'>@@ -17,14 +17,33 @@</div><div class='ctx'> 		pcie0 = &amp;pcie0;</div><div class='ctx'> 		blconfig = &amp;blconfig;</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;firmware {</div><div class='del'>-	firmware_clocks: clocks {</div><div class='del'>-		compatible = "raspberrypi,firmware-clocks";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='add'>+	i2c0mux: i2c-mux0 {</div><div class='add'>+		compatible = "i2c-mux-pinctrl";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-parent = &lt;&amp;i2c0&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "i2c0", "i2c0-vc";</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c0_gpio0&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;i2c0_gpio44&gt;;</div><div class='add'>+</div><div class='add'>+		i2c0_0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0_1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+&amp;firmware {</div><div class='ctx'> 	expgpio: gpio {</div><div class='ctx'> 		compatible = "raspberrypi,firmware-gpio";</div><div class='ctx'> 		gpio-controller;</div><div class='hunk'>@@ -54,6 +73,11 @@</div><div class='ctx'> 	clocks = &lt;&amp;firmware_clocks 4&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-property/ pinctrl-names;</div><div class='add'>+	/delete-property/ pinctrl-0;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rmem {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * RPi4's co-processor will copy the board's bootloader configuration</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711.dtsi b/arch/arm/boot/dts/broadcom/bcm2711.dtsi<br/>index 22c7f1561344..e4e42af21ef3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2711.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2711.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2711.dtsi</a></div><div class='hunk'>@@ -432,8 +432,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	arm-pmu {</div><div class='del'>-		compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			&lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			&lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1114,6 +1114,14 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;csi0 {</div><div class='add'>+	interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi1 {</div><div class='add'>+	interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cma {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * arm64 reserves the CMA by default somewhere in ZONE_DMA32,</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi b/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi<br/>index 4e7b4a592da7..8b3c21d9f333 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi</a></div><div class='hunk'>@@ -7,13 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/power/raspberrypi-power.h&gt;</div><div class='ctx'> </div><div class='del'>-&amp;firmware {</div><div class='del'>-	firmware_clocks: clocks {</div><div class='del'>-		compatible = "raspberrypi,firmware-clocks";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;hdmi {</div><div class='ctx'> 	clocks = &lt;&amp;firmware_clocks 9&gt;,</div><div class='ctx'> 		 &lt;&amp;firmware_clocks 13&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi<br/>index f0acc9390f31..e9bf41b9f5c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi</a></div><div class='hunk'>@@ -4,11 +4,12 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		firmware: firmware {</div><div class='ctx'> 			compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='ctx'> 			mboxes = &lt;&amp;mailbox&gt;;</div><div class='del'>-			dma-ranges;</div><div class='add'>+</div><div class='add'>+			firmware_clocks: clocks {</div><div class='add'>+				compatible = "raspberrypi,firmware-clocks";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		power: power {</div><div class='hunk'>@@ -25,6 +26,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;csi0 {</div><div class='add'>+	clocks = &lt;&amp;clocks BCM2835_CLOCK_CAM0&gt;,</div><div class='add'>+		 &lt;&amp;firmware_clocks 4&gt;;</div><div class='add'>+	clock-names = "lp", "vpu";</div><div class='add'>+	power-domains = &lt;&amp;power RPI_POWER_DOMAIN_UNICAM0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi1 {</div><div class='add'>+	clocks = &lt;&amp;clocks BCM2835_CLOCK_CAM1&gt;,</div><div class='add'>+		 &lt;&amp;firmware_clocks 4&gt;;</div><div class='add'>+	clock-names = "lp", "vpu";</div><div class='add'>+	power-domains = &lt;&amp;power RPI_POWER_DOMAIN_UNICAM1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpio {</div><div class='ctx'> 	gpioout: gpioout {</div><div class='ctx'> 		brcm,pins = &lt;6&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm283x.dtsi b/arch/arm/boot/dts/broadcom/bcm283x.dtsi<br/>index 2ca8a2505a4d..69b0919f1324 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm283x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm283x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm283x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm283x.dtsi</a></div><div class='hunk'>@@ -454,6 +454,30 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		csi0: csi@7e800000 {</div><div class='add'>+			compatible = "brcm,bcm2835-unicam";</div><div class='add'>+			reg = &lt;0x7e800000 0x800&gt;,</div><div class='add'>+			      &lt;0x7e802000 0x4&gt;;</div><div class='add'>+			reg-names = "unicam", "cmi";</div><div class='add'>+			interrupts = &lt;2 6&gt;;</div><div class='add'>+			brcm,num-data-lanes = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			port {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		csi1: csi@7e801000 {</div><div class='add'>+			compatible = "brcm,bcm2835-unicam";</div><div class='add'>+			reg = &lt;0x7e801000 0x800&gt;,</div><div class='add'>+			      &lt;0x7e802004 0x4&gt;;</div><div class='add'>+			reg-names = "unicam", "cmi";</div><div class='add'>+			interrupts = &lt;2 7&gt;;</div><div class='add'>+			brcm,num-data-lanes = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			port {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c1: i2c@7e804000 {</div><div class='ctx'> 			compatible = "brcm,bcm2835-i2c";</div><div class='ctx'> 			reg = &lt;0x7e804000 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts<br/>new file mode 100644<br/>index 000000000000..53cb0c58f6d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Author: Tom Brautaset &lt;tbrautaset@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4709.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "asus,rt-ac3200", "brcm,bcm4709", "brcm,bcm4708";</div><div class='add'>+	model = "ASUS RT-AC3200";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;,</div><div class='add'>+		      &lt;0x88000000 0x08000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvram@1c080000 {</div><div class='add'>+		compatible = "brcm,nvram";</div><div class='add'>+		reg = &lt;0x1c080000 0x00180000&gt;;</div><div class='add'>+</div><div class='add'>+		et0macaddr: et0macaddr {</div><div class='add'>+			#nvmem-cell-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-wifi {</div><div class='add'>+			label = "Wi-Fi";</div><div class='add'>+			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-power {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-wan-red {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-wps {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_WPS;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et0macaddr 0&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et0macaddr 1&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et0macaddr 2&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nandcs {</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		partition@0 {</div><div class='add'>+			reg = &lt;0x00000000 0x00080000&gt;;</div><div class='add'>+			label = "boot";</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		partition@80000 {</div><div class='add'>+			reg = &lt;0x00080000 0x00180000&gt;;</div><div class='add'>+			label = "nvram";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		partition@200000 {</div><div class='add'>+			compatible = "brcm,trx";</div><div class='add'>+			reg = &lt;0x00200000 0x07e00000&gt;;</div><div class='add'>+			label = "firmware";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;srab {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			label = "wan";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			label = "lan1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			label = "lan2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@3 {</div><div class='add'>+			label = "lan3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@4 {</div><div class='add'>+			label = "lan4";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2 {</div><div class='add'>+	vcc-gpio = &lt;&amp;chipcommon 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts<br/>index 5f089307cd8c..1655ac95769c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts</a></div><div class='hunk'>@@ -13,11 +13,22 @@</div><div class='ctx'> </div><div class='ctx'> 	nvram@1c080000 {</div><div class='ctx'> 		et0macaddr: et0macaddr {</div><div class='add'>+			#nvmem-cell-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac0 {</div><div class='del'>-	nvmem-cells = &lt;&amp;et0macaddr&gt;;</div><div class='add'>+	nvmem-cells = &lt;&amp;et0macaddr 0&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et0macaddr 1&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et0macaddr 2&gt;;</div><div class='ctx'> 	nvmem-cell-names = "mac-address";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi<br/>index 09cefce27fb1..2cfaaabc7a6a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi</a></div><div class='hunk'>@@ -6,15 +6,13 @@</div><div class='ctx'> #include "bcm47094.dtsi"</div><div class='ctx'> #include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "earlycon";</div><div class='del'>-	};</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='ctx'> 	memory@0 {</div><div class='del'>-		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x08000000&gt;,</div><div class='ctx'> 		      &lt;0x88000000 0x18000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	nvram@1c080000 {</div><div class='hunk'>@@ -22,76 +20,108 @@</div><div class='ctx'> 		reg = &lt;0x1c080000 0x00180000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		led-power {</div><div class='del'>-			label = "white:power";</div><div class='del'>-			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,default-trigger = "default-on";</div><div class='add'>+		button-led {</div><div class='add'>+			label = "Backlight";</div><div class='add'>+			linux,code = &lt;KEY_BRIGHTNESS_ZERO&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-wan-red {</div><div class='del'>-			label = "red:wan";</div><div class='del'>-			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		button-reset {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-wifi {</div><div class='add'>+			label = "Wi-Fi";</div><div class='add'>+			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 18 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		button-wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='ctx'> 		led-lan {</div><div class='del'>-			label = "white:lan";</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='ctx'> 			gpios = &lt;&amp;chipcommon 21 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		led-power {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		led-usb2 {</div><div class='del'>-			label = "white:usb2";</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_USB;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;chipcommon 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			trigger-sources = &lt;&amp;ehci_port2&gt;;</div><div class='ctx'> 			linux,default-trigger = "usbport";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-usb3 {</div><div class='del'>-			label = "white:usb3";</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_USB;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;chipcommon 17 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			trigger-sources = &lt;&amp;ehci_port1&gt;, &lt;&amp;xhci_port1&gt;;</div><div class='ctx'> 			linux,default-trigger = "usbport";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		led-wan-red {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		led-wps {</div><div class='del'>-			label = "white:wps";</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_WPS;</div><div class='ctx'> 			gpios = &lt;&amp;chipcommon 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-		button-wps {</div><div class='del'>-			label = "WPS";</div><div class='del'>-			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='del'>-			gpios = &lt;&amp;chipcommon 20 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;nandcs {</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		button-reset {</div><div class='del'>-			label = "Reset";</div><div class='del'>-			linux,code = &lt;KEY_RESTART&gt;;</div><div class='del'>-			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		partition@0 {</div><div class='add'>+			reg = &lt;0x00000000 0x00080000&gt;;</div><div class='add'>+			label = "boot";</div><div class='add'>+			read-only;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button-wifi {</div><div class='del'>-			label = "Wi-Fi";</div><div class='del'>-			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='del'>-			gpios = &lt;&amp;chipcommon 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		partition@80000 {</div><div class='add'>+			reg = &lt;0x00080000 0x00180000&gt;;</div><div class='add'>+			label = "nvram";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button-led {</div><div class='del'>-			label = "Backlight";</div><div class='del'>-			linux,code = &lt;KEY_BRIGHTNESS_ZERO&gt;;</div><div class='del'>-			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		partition@200000 {</div><div class='add'>+			compatible = "brcm,trx";</div><div class='add'>+			reg = &lt;0x00200000 0x07e00000&gt;;</div><div class='add'>+			label = "firmware";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;srab {</div><div class='del'>-	compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='hunk'>@@ -136,28 +166,3 @@</div><div class='ctx'> &amp;usb3_phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;nandcs {</div><div class='del'>-	partitions {</div><div class='del'>-		compatible = "fixed-partitions";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		partition@0 {</div><div class='del'>-			label = "boot";</div><div class='del'>-			reg = &lt;0x00000000 0x00080000&gt;;</div><div class='del'>-			read-only;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		partition@80000 {</div><div class='del'>-			label = "nvram";</div><div class='del'>-			reg = &lt;0x00080000 0x00180000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		partition@200000 {</div><div class='del'>-			label = "firmware";</div><div class='del'>-			reg = &lt;0x00200000 0x07e00000&gt;;</div><div class='del'>-			compatible = "brcm,trx";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts<br/>new file mode 100644<br/>index 000000000000..6c666dc7ad23<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Author: Tom Brautaset &lt;tbrautaset@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm47094.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "asus,rt-ac5300", "brcm,bcm47094", "brcm,bcm4708";</div><div class='add'>+	model = "ASUS RT-AC5300";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;,</div><div class='add'>+		      &lt;0x88000000 0x18000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvram@1c080000 {</div><div class='add'>+		compatible = "brcm,nvram";</div><div class='add'>+		reg = &lt;0x1c080000 0x00180000&gt;;</div><div class='add'>+</div><div class='add'>+		et1macaddr: et1macaddr {</div><div class='add'>+			#nvmem-cell-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-wifi {</div><div class='add'>+			label = "Wi-Fi";</div><div class='add'>+			linux,code = &lt;KEY_RFKILL&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-lan {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-power {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-wan-red {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-wps {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_WPS;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et1macaddr 0&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et1macaddr 1&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et1macaddr 2&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nandcs {</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		partition@0 {</div><div class='add'>+			reg = &lt;0x00000000 0x00080000&gt;;</div><div class='add'>+			label = "boot";</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		partition@80000 {</div><div class='add'>+			reg = &lt;0x00080000 0x00180000&gt;;</div><div class='add'>+			label = "nvram";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		partition@200000 {</div><div class='add'>+			compatible = "brcm,trx";</div><div class='add'>+			reg = &lt;0x00200000 0x07e00000&gt;;</div><div class='add'>+			label = "firmware";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;srab {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			label = "lan4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			label = "lan3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			label = "lan2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@3 {</div><div class='add'>+			label = "lan1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@4 {</div><div class='add'>+			label = "wan";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2 {</div><div class='add'>+	vcc-gpio = &lt;&amp;chipcommon 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts<br/>index fd344b55087e..a197f447fd97 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts</a></div><div class='hunk'>@@ -13,18 +13,40 @@</div><div class='ctx'> </div><div class='ctx'> 	nvram@1c080000 {</div><div class='ctx'> 		et1macaddr: et1macaddr {</div><div class='add'>+			#nvmem-cell-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	switch {</div><div class='ctx'> 		compatible = "realtek,rtl8365mb";</div><div class='del'>-		/* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */</div><div class='ctx'> 		mdc-gpios = &lt;&amp;chipcommon 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		mdio-gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;chipcommon 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		realtek,disable-leds;</div><div class='ctx'> 		dsa,member = &lt;1 0&gt;;</div><div class='ctx'> </div><div class='add'>+		mdio {</div><div class='add'>+			compatible = "realtek,smi-mdio";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			ethphy0: ethernet-phy@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethphy1: ethernet-phy@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethphy2: ethernet-phy@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethphy3: ethernet-phy@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -68,29 +90,21 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		mdio {</div><div class='del'>-			compatible = "realtek,smi-mdio";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			ethphy0: ethernet-phy@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ethphy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			ethphy2: ethernet-phy@2 {</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-			};</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et1macaddr 0&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			ethphy3: ethernet-phy@3 {</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;gmac2 {</div><div class='add'>+	nvmem-cells = &lt;&amp;et1macaddr 1&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;srab {</div><div class='hunk'>@@ -111,12 +125,3 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;gmac0 {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gmac1 {</div><div class='del'>-	nvmem-cells = &lt;&amp;et1macaddr&gt;;</div><div class='del'>-	nvmem-cell-names = "mac-address";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts<br/>index 4f609e9e510e..009d2c832421 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts</a></div><div class='hunk'>@@ -242,7 +242,7 @@</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='del'>-						regulator-suspend-voltage = &lt;1150000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1150000&gt;;</div><div class='ctx'> 						regulator-mode = &lt;4&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -263,7 +263,7 @@</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='del'>-						regulator-suspend-voltage = &lt;1050000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 						regulator-mode = &lt;4&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +280,7 @@</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='del'>-						regulator-suspend-voltage = &lt;1800000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -296,7 +296,7 @@</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='del'>-						regulator-suspend-voltage = &lt;3300000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts<br/>index 217e9b96c61e..20b2497657ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/microchip/at91-sama7g5ek.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/microchip/at91-sama7g5ek.dts</a></div><div class='hunk'>@@ -293,7 +293,7 @@</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='del'>-						regulator-suspend-voltage = &lt;1150000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1150000&gt;;</div><div class='ctx'> 						regulator-mode = &lt;4&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -314,7 +314,7 @@</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='del'>-						regulator-suspend-voltage = &lt;1050000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 						regulator-mode = &lt;4&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -331,7 +331,7 @@</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='del'>-						regulator-suspend-voltage = &lt;1800000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -346,7 +346,7 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;3700000&gt;;</div><div class='ctx'> </div><div class='ctx'> 					regulator-state-standby {</div><div class='del'>-						regulator-suspend-voltage = &lt;1800000&gt;;</div><div class='add'>+						regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 						regulator-on-in-suspend;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi<br/>index 8c1d5c9fa483..2ff7be8f1382 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi</a></div><div class='hunk'>@@ -445,9 +445,9 @@</div><div class='ctx'> </div><div class='ctx'> 	tegra_ac97: ac97@70002000 {</div><div class='ctx'> 		status = "okay";</div><div class='del'>-		nvidia,codec-reset-gpio =</div><div class='add'>+		nvidia,codec-reset-gpios =</div><div class='ctx'> 			&lt;&amp;gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		nvidia,codec-sync-gpio =</div><div class='add'>+		nvidia,codec-sync-gpios =</div><div class='ctx'> 			&lt;&amp;gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra20-paz00.dts b/arch/arm/boot/dts/nvidia/tegra20-paz00.dts<br/>index afb922bd79a7..1408e1e00759 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nvidia/tegra20-paz00.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nvidia/tegra20-paz00.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nvidia/tegra20-paz00.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nvidia/tegra20-paz00.dts</a></div><div class='hunk'>@@ -533,6 +533,49 @@</div><div class='ctx'> 					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		emc-tables@1 {</div><div class='add'>+			nvidia,ram-code = &lt;0x1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			emc-table@166500 {</div><div class='add'>+				reg = &lt;166500&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;166500&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x0000000a 0x00000016</div><div class='add'>+					0x00000008 0x00000003 0x00000004 0x00000004</div><div class='add'>+					0x00000002 0x0000000c 0x00000003 0x00000003</div><div class='add'>+					0x00000002 0x00000001 0x00000004 0x00000005</div><div class='add'>+					0x00000004 0x00000009 0x0000000d 0x000004df</div><div class='add'>+					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='add'>+					0x00000003 0x00000001 0x0000000a 0x000000c8</div><div class='add'>+					0x00000003 0x00000006 0x00000004 0x00000008</div><div class='add'>+					0x00000002 0x00000000 0x00000000 0x00000002</div><div class='add'>+					0x00000000 0x00000000 0x00000083 0xe03b0323</div><div class='add'>+					0x007fe010 0x00001414 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			emc-table@333000 {</div><div class='add'>+				reg = &lt;333000&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;333000&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x00000018 0x00000033</div><div class='add'>+					0x00000012 0x00000004 0x00000004 0x00000005</div><div class='add'>+					0x00000003 0x0000000c 0x00000006 0x00000006</div><div class='add'>+					0x00000003 0x00000001 0x00000004 0x00000005</div><div class='add'>+					0x00000004 0x00000009 0x0000000d 0x00000bff</div><div class='add'>+					0x00000000 0x00000003 0x00000003 0x00000006</div><div class='add'>+					0x00000006 0x00000001 0x00000011 0x000000c8</div><div class='add'>+					0x00000003 0x0000000e 0x00000007 0x00000008</div><div class='add'>+					0x00000002 0x00000000 0x00000000 0x00000002</div><div class='add'>+					0x00000000 0x00000000 0x00000083 0xf0440303</div><div class='add'>+					0x007fe010 0x00001414 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb@c5000000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile<br/>index 4052cad859fa..231c0d73a53e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/Makefile</a></div><div class='hunk'>@@ -349,12 +349,15 @@ dtb-$(CONFIG_SOC_IMX6UL) += \</div><div class='ctx'> 	imx6ull-phytec-segin-lc-rdk-nand.dtb \</div><div class='ctx'> 	imx6ull-phytec-tauri-emmc.dtb \</div><div class='ctx'> 	imx6ull-phytec-tauri-nand.dtb \</div><div class='add'>+	imx6ull-seeed-npi-dev-board-emmc.dtb \</div><div class='add'>+	imx6ull-seeed-npi-dev-board-nand.dtb \</div><div class='ctx'> 	imx6ull-tarragon-master.dtb \</div><div class='ctx'> 	imx6ull-tarragon-micro.dtb \</div><div class='ctx'> 	imx6ull-tarragon-slave.dtb \</div><div class='ctx'> 	imx6ull-tarragon-slavext.dtb \</div><div class='ctx'> 	imx6ull-tqma6ull2-mba6ulx.dtb \</div><div class='ctx'> 	imx6ull-tqma6ull2l-mba6ulx.dtb \</div><div class='add'>+	imx6ull-uti260b.dtb \</div><div class='ctx'> 	imx6ulz-14x14-evk.dtb \</div><div class='ctx'> 	imx6ulz-bsh-smm-m2.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_IMX7D) += \</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi<br/>index dd03e3860f97..13756d39fb7b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/e60k02.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/e60k02.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/e60k02.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/e60k02.dtsi</a></div><div class='hunk'>@@ -127,7 +127,7 @@</div><div class='ctx'> 		compatible = "ricoh,rc5t619";</div><div class='ctx'> 		reg = &lt;0x32&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/e70k02.dtsi b/arch/arm/boot/dts/nxp/imx/e70k02.dtsi<br/>index 4e1bf080eaca..dcc3c9d488a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/e70k02.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/e70k02.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/e70k02.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/e70k02.dtsi</a></div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> 		compatible = "ricoh,rc5t619";</div><div class='ctx'> 		reg = &lt;0x32&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;19 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi<br/>index abc9233c5a1b..31b3fc972abb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi</a></div><div class='hunk'>@@ -15,6 +15,22 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0xa0000000 0x08000000&gt;; /* 128MB */</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usbotgphy: usbotgphy {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usbotgphy&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbh2phy: usbh2phy {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usbh2phy&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cspi1 {</div><div class='hunk'>@@ -84,6 +100,52 @@</div><div class='ctx'> 				MX27_PAD_NFWE_B__NFWE_B 0x0</div><div class='ctx'> 			&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usbotgphy: usbotgphygrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX27_PAD_USBH1_RCV__GPIO2_25		0x1 /* reset gpio */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usbotg: usbotggrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX27_PAD_USBOTG_CLK__USBOTG_CLK		0x0</div><div class='add'>+				MX27_PAD_USBOTG_DIR__USBOTG_DIR		0x0</div><div class='add'>+				MX27_PAD_USBOTG_NXT__USBOTG_NXT		0x0</div><div class='add'>+				MX27_PAD_USBOTG_STP__USBOTG_STP		0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA0__USBOTG_DATA0	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA1__USBOTG_DATA1	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA2__USBOTG_DATA2	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA3__USBOTG_DATA3	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA4__USBOTG_DATA4	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA5__USBOTG_DATA5	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA6__USBOTG_DATA6	0x0</div><div class='add'>+				MX27_PAD_USBOTG_DATA7__USBOTG_DATA7	0x0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usbh2phy: usbh2phygrp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX27_PAD_USBH1_SUSP__GPIO2_22		0x0 /* reset gpio */</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_usbh2: usbh2grp {</div><div class='add'>+			fsl,pins = &lt;</div><div class='add'>+				MX27_PAD_USBH2_CLK__USBH2_CLK		0x0</div><div class='add'>+				MX27_PAD_USBH2_DIR__USBH2_DIR		0x0</div><div class='add'>+				MX27_PAD_USBH2_NXT__USBH2_NXT		0x0</div><div class='add'>+				MX27_PAD_USBH2_STP__USBH2_STP		0x0</div><div class='add'>+				MX27_PAD_CSPI2_SCLK__USBH2_DATA0	0x0</div><div class='add'>+				MX27_PAD_CSPI2_MOSI__USBH2_DATA1	0x0</div><div class='add'>+				MX27_PAD_CSPI2_MISO__USBH2_DATA2	0x0</div><div class='add'>+				MX27_PAD_CSPI2_SS1__USBH2_DATA3		0x0</div><div class='add'>+				MX27_PAD_CSPI2_SS2__USBH2_DATA4		0x0</div><div class='add'>+				MX27_PAD_CSPI1_SS2__USBH2_DATA5		0x0</div><div class='add'>+				MX27_PAD_CSPI2_SS0__USBH2_DATA6		0x0</div><div class='add'>+				MX27_PAD_USBH2_DATA7__USBH2_DATA7	0x0</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -95,3 +157,19 @@</div><div class='ctx'> 	nand-on-flash-bbt;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbotg&gt;;</div><div class='add'>+	phy_type = "ulpi";</div><div class='add'>+	phys = &lt;&amp;usbotgphy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbh2&gt;;</div><div class='add'>+	phy_type = "ulpi";</div><div class='add'>+	phys = &lt;&amp;usbh2phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts<br/>index f7408722d68a..2bd0761c7e90 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 78770&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 78770 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 150 200 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;1&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;backlight_reg&gt;;</div><div class='hunk'>@@ -113,7 +113,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm_backlight&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts b/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts<br/>index 0e7f071fd10e..f6f116366643 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_backlight&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 24 28 32 36</div><div class='ctx'> 				     40 44 48 52 56</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi<br/>index 4508f34139a0..ae5f87b8612d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 		compatible = "pwm-beeper";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_buzzer&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 500000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 500000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-buttons {</div><div class='hunk'>@@ -162,14 +162,6 @@</div><div class='ctx'> 	&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;uart1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts<br/>index c323b4dbe9f0..1353d985969c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 3000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 3000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_backlight&gt;;</div><div class='hunk'>@@ -313,7 +313,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts b/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts<br/>index 6a37616cef1c..2117de872703 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-mba53.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx53-mba53.dts</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;10&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio7 7 0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts b/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts<br/>index 70c4a4852256..e939acc1c88b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-ppd.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx53-ppd.dts</a></div><div class='hunk'>@@ -167,7 +167,7 @@</div><div class='ctx'> </div><div class='ctx'> 	pwm_bl: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 2 5 7 10 12 15 17 20 22 25 28 30 33 35</div><div class='ctx'> 				     38 40 43 45 48 51 53 56 58 61 63 66 68 71</div><div class='ctx'> 				     73 76 79 81 84 86 89 91 94 96 99 102 104</div><div class='hunk'>@@ -187,7 +187,7 @@</div><div class='ctx'> </div><div class='ctx'> 		led-1 {</div><div class='ctx'> 			label = "alarm-brightness";</div><div class='del'>-			pwms = &lt;&amp;pwm1 0 100000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm1 0 100000 0&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -628,14 +628,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi<br/>index 294811bfc8d2..b2d7271d1d24 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi</a></div><div class='hunk'>@@ -202,14 +202,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;uart1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts<br/>index cc861a43eb58..a5ac79346854 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -79,6 +79,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts<br/>index b6cb78870cd5..5a25bdbbeb68 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 3000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 3000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -69,6 +69,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts<br/>index 028951955bde..72ee236d2f5e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 25000&gt;; /* 25000ns -&gt; 40kHz */</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 25000 0&gt;; /* 25000ns -&gt; 40kHz */</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 160 192 224 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -303,7 +303,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi<br/>index f266f1b7e0cf..09d9ca0cb332 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi</a></div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_display&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;  0   1   2   3   4   5   6   7   8   9</div><div class='ctx'> 				      10  11  12  13  14  15  16  17  18  19</div><div class='ctx'> 				      20  21  22  23  24  25  26  27  28  29</div><div class='hunk'>@@ -349,7 +349,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts b/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts<br/>index 02648806c275..d3f14b4d3b51 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 200000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 200000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 61 499 1706 4079 8022 13938 22237 33328 47623 65535&gt;;</div><div class='ctx'> 		num-interpolated-steps = &lt;10&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;60&gt;;</div><div class='hunk'>@@ -117,14 +117,14 @@</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='ctx'> 			max-brightness = &lt;248&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='del'>-			pwms = &lt;&amp;pwm2 0 500000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm2 0 500000 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led_white: led-1 {</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='ctx'> 			max-brightness = &lt;248&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='del'>-			pwms = &lt;&amp;pwm3 0 500000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm3 0 500000 0&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -484,28 +484,24 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi<br/>index 091903f53a56..c425d427663d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	backlight_lcd: backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 255&gt;;</div><div class='ctx'> 		num-interpolated-steps = &lt;255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;250&gt;;</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> 	beeper {</div><div class='ctx'> 		compatible = "pwm-beeper";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 500000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 500000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	lcd_display: display {</div><div class='hunk'>@@ -378,14 +378,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts b/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts<br/>index a7d5a68110fc..d392b5bd2eea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-novena.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-novena.dts</a></div><div class='hunk'>@@ -67,7 +67,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 10000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 10000000 0&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_backlight_novena&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_lvds_lcd&gt;;</div><div class='hunk'>@@ -465,7 +465,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts<br/>index 46c6b96d8073..56b77cc0af2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts</a></div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;</div><div class='ctx'> 			0  /*1  2  3  4  5  6*/  7  8  9</div><div class='ctx'> 			10 11 12 13 14 15 16 17 18 19</div><div class='hunk'>@@ -571,7 +571,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts b/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts<br/>index 3508a2cd928a..a7d5693c5ab7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_backlight&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 16 64 255&gt;;</div><div class='ctx'> 		num-interpolated-steps = &lt;16&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;1&gt;;</div><div class='hunk'>@@ -292,7 +292,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts b/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts<br/>index 2290c1237634..0225a621ec7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 248&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -203,7 +203,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi<br/>index 338d292553ad..3a46ade3b6bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 191000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 191000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;0&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_5v&gt;;</div><div class='hunk'>@@ -212,7 +212,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi<br/>index db1bc511e71f..758eaf9d93d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio6 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -346,7 +346,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi<br/>index 1e530d892b76..761566ae3cf5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 			active-low;</div><div class='ctx'> 			label = "imx6:red:front";</div><div class='ctx'> 			max-brightness = &lt;248&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm1 0 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -233,7 +233,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi<br/>index 42b2ba23aefc..a308a3584b62 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_lvds_bl&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio6 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;</div><div class='ctx'> 			0 4 8 16 32 64 80 96 112</div><div class='ctx'> 			128 144 160 176 250</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 	pwm_fan: pwm-fan {</div><div class='ctx'> 		compatible = "pwm-fan";</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 50000 0&gt;;</div><div class='ctx'> 		cooling-levels = &lt;0 64 127 191 255&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_rgb_bl&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio6 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;</div><div class='ctx'> 			250 176 160 144 128 112</div><div class='ctx'> 			96 80 64 48 32 16 8 1</div><div class='hunk'>@@ -736,17 +736,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi<br/>index 535679c27d6f..48ffb3ee01bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -520,7 +520,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi<br/>index 3e1c572af582..1eae438fbdae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -517,7 +517,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi<br/>index 0ffa0357a6fa..c2ec8572c8a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -570,7 +570,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default", "state_dio";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4_backlight&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_pwm4_dio&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi<br/>index 46cf4080fec3..7cee983da669 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight-display {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;</div><div class='ctx'> 			0  1  2  3  4  5  6  7  8  9</div><div class='ctx'> 			10 11 12 13 14 15 16 17 18 19</div><div class='hunk'>@@ -619,7 +619,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi<br/>index a74cde050158..fbc704c064b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi</a></div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;</div><div class='ctx'> 			0  1  2  3  4  5  6  7  8  9</div><div class='ctx'> 			10 11 12 13 14 15 16 17 18 19</div><div class='hunk'>@@ -502,7 +502,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi<br/>index 1e723807ab4c..070506279186 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -586,7 +586,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi<br/>index efe11524b885..9975b6ee433d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 100000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 100000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -245,7 +245,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi<br/>index 4d2abcd44eff..60aa1e947f62 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi</a></div><div class='hunk'>@@ -298,6 +298,7 @@</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_mba6_3p3v&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ethernet@1 {</div><div class='ctx'> 			compatible = "usb424,9e00";</div><div class='hunk'>@@ -441,8 +442,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_hog: hoggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099</div><div class='del'>-</div><div class='ctx'> 			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099</div><div class='ctx'> 			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099</div><div class='ctx'> 			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x0001b099</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi<br/>index f2542d725ce7..a30cf0d06206 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi</a></div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds0: backlight-lvds0 {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -499,7 +499,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -512,7 +511,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi<br/>index 32a110a35b02..33174febf410 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi</a></div><div class='hunk'>@@ -183,7 +183,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -192,7 +192,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds0: backlight-lvds0 {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -201,7 +201,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds1: backlight-lvds1 {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -735,14 +735,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -755,7 +753,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi<br/>index 414196b75991..8e64314fa8b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds0: backlight-lvds0 {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -641,7 +641,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -654,7 +653,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi<br/>index f278b14911ce..121177273dd0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi</a></div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -596,7 +596,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -609,7 +608,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi<br/>index 1ca4d219609f..0b4c09b09c03 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_backlight&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -224,7 +224,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi<br/>index 68e97180d33e..6656e2e762a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi</a></div><div class='hunk'>@@ -144,8 +144,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound-spdif {</div><div class='del'>-		compatible = "fsl,imx-audio-spdif",</div><div class='del'>-			   "fsl,imx-sabreauto-spdif";</div><div class='add'>+		compatible = "fsl,imx-sabreauto-spdif",</div><div class='add'>+			     "fsl,imx-audio-spdif";</div><div class='ctx'> 		model = "imx-spdif";</div><div class='ctx'> 		spdif-controller = &lt;&amp;spdif&gt;;</div><div class='ctx'> 		spdif-in;</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -802,7 +802,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi<br/>index 84c8a9531e18..9c502bf77d0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi</a></div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;22000000&gt;;</div><div class='ctx'> 		clock-output-names = "mipi_pwm3";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 45&gt;; /* 1 / 45 ns = 22 MHz */</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 45 0&gt;; /* 1 / 45 ns = 22 MHz */</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +162,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight-lcd {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -171,7 +171,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -654,21 +654,18 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi<br/>index 4fe58764b929..8f4f5fba68cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -755,7 +755,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi<br/>index 02e6d36e85fa..6823a639ed2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi</a></div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;4&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 10000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 10000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_3p3v: regulator-3p3v {</div><div class='hunk'>@@ -140,7 +140,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi<br/>index d59d5d0e1d19..6ab71a729fd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi</a></div><div class='hunk'>@@ -282,7 +282,6 @@</div><div class='ctx'> &amp;pwm2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi<br/>index 647ba5e623dd..14272b42f9a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi</a></div><div class='hunk'>@@ -59,16 +59,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_usb_h1_vbus: regulator-usb-h1-vbus {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "usb_h1_vbus";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		startup-delay-us = &lt;2&gt;; /* USB2415 requires a POR of 1 us minimum */</div><div class='del'>-		gpio = &lt;&amp;gpio7 12 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_panel: regulator-panel {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "lcd_panel";</div><div class='hunk'>@@ -285,9 +275,18 @@</div><div class='ctx'> &amp;usbh1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usbh&gt;;</div><div class='del'>-	vbus-supply = &lt;&amp;reg_usb_h1_vbus&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks IMX6QDL_CLK_CKO&gt;;</div><div class='del'>-	status = "disabled";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	usb-port@1 {</div><div class='add'>+		compatible = "usb424,2514";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks IMX6QDL_CLK_CKO&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio7 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbotg {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi<br/>index 8431b8a994f4..d2200c9db25a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi</a></div><div class='hunk'>@@ -397,11 +397,10 @@</div><div class='ctx'> 					reg = &lt;0x02024000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;0 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6QDL_CLK_ESAI_IPG&gt;,</div><div class='del'>-						 &lt;&amp;clks IMX6QDL_CLK_ESAI_MEM&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6QDL_CLK_ESAI_EXTAL&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6QDL_CLK_ESAI_IPG&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6QDL_CLK_SPBA&gt;;</div><div class='del'>-					clock-names = "core", "mem", "extal", "fsys", "spba";</div><div class='add'>+					clock-names = "core", "extal", "fsys", "spba";</div><div class='ctx'> 					dmas = &lt;&amp;sdma 23 21 0&gt;, &lt;&amp;sdma 24 21 0&gt;;</div><div class='ctx'> 					dma-names = "rx", "tx";</div><div class='ctx'> 					status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts<br/>index 239bc6dfc584..31eee0419af7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_display: backlight_display {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -584,10 +584,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;reg_vdd1p1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts<br/>index 5636fb3661e8..03d6965f0149 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts</a></div><div class='hunk'>@@ -138,7 +138,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_zforce&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;6 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;ldo1_reg&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		touchscreen-size-x = &lt;1072&gt;;</div><div class='hunk'>@@ -163,7 +163,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_ricoh_gpio&gt;;</div><div class='ctx'> 		reg = &lt;0x32&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts<br/>index e3e9b0ec4f73..febc2dd9967d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_display: backlight-display {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -314,10 +314,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;snvs_poweroff {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi<br/>index 3659fd5ecfa6..ddeb5b37fb78 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sll.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sll.dtsi</a></div><div class='hunk'>@@ -683,7 +683,6 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SLL_CLK_USBOH3&gt;;</div><div class='ctx'> 				fsl,usbphy = &lt;&amp;usbphy1&gt;;</div><div class='ctx'> 				fsl,usbmisc = &lt;&amp;usbmisc 0&gt;;</div><div class='del'>-				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 				ahb-burst-config = &lt;0x0&gt;;</div><div class='ctx'> 				tx-burst-size-dword = &lt;0x10&gt;;</div><div class='ctx'> 				rx-burst-size-dword = &lt;0x10&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts<br/>index cd9cbc9ccc9e..1c1515a854c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm4 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-sgtl5000";</div><div class='ctx'> 		model = "imx6sx-nitrogen6sx-sgtl5000";</div><div class='del'>-		cpu-dai = &lt;&amp;ssi1&gt;;</div><div class='add'>+		ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;codec&gt;;</div><div class='ctx'> 		audio-routing =</div><div class='ctx'> 			"MIC_IN", "Mic Jack",</div><div class='hunk'>@@ -229,10 +229,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm4 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ssi1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi<br/>index c6e85e4a0883..7d4170c27732 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_display: backlight-display {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -184,8 +184,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound-spdif {</div><div class='del'>-		compatible = "fsl,imx-audio-spdif",</div><div class='del'>-			   "fsl,imx6sx-sdb-spdif";</div><div class='add'>+		compatible = "fsl,imx6sx-sdb-spdif",</div><div class='add'>+			     "fsl,imx-audio-spdif";</div><div class='ctx'> 		model = "imx-spdif";</div><div class='ctx'> 		spdif-controller = &lt;&amp;spdif&gt;;</div><div class='ctx'> 		spdif-out;</div><div class='hunk'>@@ -295,10 +295,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;snvs_poweroff {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts<br/>index bfcd8f7d86dd..f999eb244373 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts</a></div><div class='hunk'>@@ -46,19 +46,19 @@</div><div class='ctx'> 		led-1 {</div><div class='ctx'> 			label = "red";</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm6 0 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm6 0 50000 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-2 {</div><div class='ctx'> 			label = "green";</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm2 0 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-3 {</div><div class='ctx'> 			label = "blue";</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm1 0 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -505,24 +505,18 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm6 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm6&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;reg_arm {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi<br/>index 0de359d62a47..b386448486df 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6sx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6sx.dtsi</a></div><div class='hunk'>@@ -339,15 +339,14 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				esai: esai@2024000 {</div><div class='del'>-					compatible = "fsl,imx6sx-esai", "fsl,imx35-esai";</div><div class='add'>+					compatible = "fsl,imx35-esai";</div><div class='ctx'> 					reg = &lt;0x02024000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6SX_CLK_ESAI_IPG&gt;,</div><div class='del'>-						 &lt;&amp;clks IMX6SX_CLK_ESAI_MEM&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6SX_CLK_ESAI_EXTAL&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6SX_CLK_ESAI_IPG&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6SX_CLK_SPBA&gt;;</div><div class='del'>-					clock-names = "core", "mem", "extal",</div><div class='add'>+					clock-names = "core", "extal",</div><div class='ctx'> 						      "fsys", "spba";</div><div class='ctx'> 					dmas = &lt;&amp;sdma 23 21 0&gt;,</div><div class='ctx'> 					       &lt;&amp;sdma 24 21 0&gt;;</div><div class='hunk'>@@ -929,7 +928,6 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USBOH3&gt;;</div><div class='ctx'> 				fsl,usbphy = &lt;&amp;usbphy1&gt;;</div><div class='ctx'> 				fsl,usbmisc = &lt;&amp;usbmisc 0&gt;;</div><div class='del'>-				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 				ahb-burst-config = &lt;0x0&gt;;</div><div class='ctx'> 				tx-burst-size-dword = &lt;0x10&gt;;</div><div class='ctx'> 				rx-burst-size-dword = &lt;0x10&gt;;</div><div class='hunk'>@@ -957,7 +955,6 @@</div><div class='ctx'> 				fsl,usbphy = &lt;&amp;usbphynop1&gt;;</div><div class='ctx'> 				fsl,usbmisc = &lt;&amp;usbmisc 2&gt;;</div><div class='ctx'> 				phy_type = "hsic";</div><div class='del'>-				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 				dr_mode = "host";</div><div class='ctx'> 				ahb-burst-config = &lt;0x0&gt;;</div><div class='ctx'> 				tx-burst-size-dword = &lt;0x10&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi<br/>index f10f0525490b..9cfb99ac9e9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight_display: backlight-display {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -277,7 +277,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts<br/>index 1762bc47e18d..ed61ae8524fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> 	lcd_backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm5 0 50000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm5 0 50000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -168,7 +168,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm5 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm5&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts<br/>index 2ca18f3dad0a..cdbb8c435cd6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm8 0 100000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm8 0 100000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt; 0  1  2  3  4  5  6  7  8  9</div><div class='ctx'> 				     10 11 12 13 14 15 16 17 18 19</div><div class='ctx'> 				     20 21 22 23 24 25 26 27 28 29</div><div class='hunk'>@@ -194,7 +194,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm8 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi<br/>index af337f18a266..be3cacb4fa7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 191000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 191000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;7&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_5v&gt;;</div><div class='hunk'>@@ -143,7 +143,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi<br/>index 14fc4828ba4e..ee86c36205f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm8 0 100000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm8 0 100000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt; 0  1  2  3  4  5  6  7  8  9</div><div class='ctx'> 				     10 11 12 13 14 15 16 17 18 19</div><div class='ctx'> 				     20 21 22 23 24 25 26 27 28 29</div><div class='hunk'>@@ -187,7 +187,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm8 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts<br/>index 0c643706a158..4e8191a65211 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm7 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm7 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -41,7 +41,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm7 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm7&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi<br/>index 33d5f27285a4..d8f7877349c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> 	pwm-beeper {</div><div class='ctx'> 		compatible = "pwm-beeper";</div><div class='del'>-		pwms = &lt;&amp;pwm8 0 5000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm8 0 5000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_3v3: regulator-3v3 {</div><div class='hunk'>@@ -152,7 +152,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm8 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi<br/>index 07dcecbe485d..fe307f49b9e5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> </div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 5000000&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 5000000 0&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;6&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -177,7 +177,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts<br/>new file mode 100644<br/>index 000000000000..cfcd8783c31d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Linumiz</div><div class='add'>+ * Author: Parthiban &lt;parthiban@linumiz.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6ull.dtsi"</div><div class='add'>+#include "imx6ull-seeed-npi.dtsi"</div><div class='add'>+#include "imx6ull-seeed-npi-dev-board.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Seeed NPi iMX6ULL Dev Board with NAND";</div><div class='add'>+	compatible = "seeed,imx6ull-seeed-npi-emmc", "seeed,imx6ull-seeed-npi", "fsl,imx6ull";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts<br/>new file mode 100644<br/>index 000000000000..87c9434b09c5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Linumiz</div><div class='add'>+ * Author: Parthiban &lt;parthiban@linumiz.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6ull.dtsi"</div><div class='add'>+#include "imx6ull-seeed-npi.dtsi"</div><div class='add'>+#include "imx6ull-seeed-npi-dev-board.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Seeed NPi iMX6ULL Dev Board with NAND";</div><div class='add'>+	compatible = "seeed,imx6ull-seeed-npi-nand", "seeed,imx6ull-seeed-npi", "fsl,imx6ull";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi<br/>new file mode 100644<br/>index 000000000000..6bb12e0bbc7e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi</a></div><div class='hunk'>@@ -0,0 +1,424 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Linumiz</div><div class='add'>+ * Author: Parthiban &lt;parthiban@linumiz.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_buttons: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_button&gt;;</div><div class='add'>+</div><div class='add'>+		button-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "SW2";</div><div class='add'>+			linux,code = &lt;KEY_A&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='add'>+</div><div class='add'>+		led-blue {</div><div class='add'>+			gpios = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "LED_B";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-green {</div><div class='add'>+			gpios = &lt;&amp;gpio4 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "LED_G";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-red {</div><div class='add'>+			gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "LED_R";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-user {</div><div class='add'>+			gpios = &lt;&amp;gpio5 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "User";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v_sys: regulator-5v-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5V_SYS";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v: regulator-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5V";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_5v_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3_in: regulator-3v3-in {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3V3_IN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_5v_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sd1_vmmc: regulator-sd1-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3V3_SD";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_vmmc&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_csi1&gt;;</div><div class='add'>+	status = "disabled"; /* LED Blue &amp; Green shared */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet1&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet2&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@2 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			micrel,led-mode = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks IMX6UL_CLK_ENET_REF&gt;;</div><div class='add'>+			clock-names = "rmii-ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			micrel,led-mode = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks IMX6UL_CLK_ENET2_REF&gt;;</div><div class='add'>+			clock-names = "rmii-ref";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lcdif&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc_3v3 {</div><div class='add'>+	vin-supply = &lt;&amp;reg_3v3_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai2 {</div><div class='add'>+	assigned-clock-rates = &lt;320000000&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clks IMX6UL_CLK_PLL3_PFD2&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_poweroff {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb_otg1_id&gt;;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	srp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1 &amp;pinctrl_usdhc1_cd&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz &amp;pinctrl_usdhc1_cd&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz &amp;pinctrl_usdhc1_cd&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio1 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_sd1_vmmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_button: buttongrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_csi1: csi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_VSYNC__CSI_VSYNC		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_HSYNC__CSI_HSYNC		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA00__CSI_DATA02	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA01__CSI_DATA03	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA02__CSI_DATA04	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA03__CSI_DATA05	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA04__CSI_DATA06	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA05__CSI_DATA07	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA06__CSI_DATA08	0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA07__CSI_DATA09	0x1b088</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet1: enet1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet2: enet2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_leds: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0x0b0b0</div><div class='add'>+			MX6UL_PAD_CSI_VSYNC__GPIO4_IO19		0x0b0b0</div><div class='add'>+			MX6UL_PAD_CSI_HSYNC__GPIO4_IO20		0x0b0b0</div><div class='add'>+			MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lcdif: lcdif-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x79</div><div class='add'>+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x79</div><div class='add'>+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x79</div><div class='add'>+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x79</div><div class='add'>+			MX6UL_PAD_LCD_RESET__LCDIF_RESET	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA18__LCDIF_DATA18	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA19__LCDIF_DATA19	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA20__LCDIF_DATA20	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA21__LCDIF_DATA21	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA22__LCDIF_DATA22	0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA23__LCDIF_DATA23	0x79</div><div class='add'>+			MX6UL_PAD_GPIO1_IO08__GPIO1_IO08	0x79</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_vmmc: usdhc1regvmmc {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai2: sai2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x130b0</div><div class='add'>+			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x120b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pin = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pin = &lt;</div><div class='add'>+			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pin = &lt;</div><div class='add'>+			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pin = &lt;</div><div class='add'>+			MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pin = &lt;</div><div class='add'>+			MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb_otg1_id: usbotg1idgrp {</div><div class='add'>+		fsl,pin = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_cd: usdhc1cd {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi<br/>new file mode 100644<br/>index 000000000000..f5ad6b5c1ad0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Linumiz</div><div class='add'>+ * Author: Parthiban &lt;parthiban@linumiz.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Seeed NPi-iMX6ULL Dev Board";</div><div class='add'>+	compatible = "seeed,imx6ull-seeed-npi", "fsl,imx6ull";</div><div class='add'>+</div><div class='add'>+	reg_dcdc_3v3: regulator-dcdc-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "DCDC_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_dram_1v35: regulator-dram-1v35 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "DRAM_1V35";</div><div class='add'>+		regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_dcdc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_arm_soc_in: regulator-vdd-arm-soc-in {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_ARM_SOC_IN";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_dcdc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_dcdc_1v8: regulator-dcdc-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "DCDC_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_dcdc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sd1_vqmmc: regulator-sd1-vqmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "NVCC_SD";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_vqmmc&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_dcdc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpmi_nand&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_sd1_vqmmc&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_DQS__RAWNAND_DQS		0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_CLE__RAWNAND_CLE		0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_ALE__RAWNAND_ALE		0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B	0x0b000</div><div class='add'>+			MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05	0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06   0x0b0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07	0x0b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_vqmmc: usdhc1regvqmmc {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO05__GPIO1_IO05	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x10069</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x100b9</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x100f9</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi<br/>index 3fdece5bd31f..5248a058230c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi</a></div><div class='hunk'>@@ -805,6 +805,7 @@</div><div class='ctx'> 		     &amp;pinctrl_usb_pwr&gt;;</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	power-active-high;</div><div class='add'>+	over-current-active-low;</div><div class='ctx'> 	disable-over-current;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts<br/>index 67007ce383e3..f9bbd589b66d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 		interrupts = &lt;19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		spi-cpol;</div><div class='del'>-		spi-max-frequency = &lt;16000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +63,7 @@</div><div class='ctx'> 		interrupts = &lt;9 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		spi-cpol;</div><div class='del'>-		spi-max-frequency = &lt;16000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts<br/>index cee223b5f8e1..ef06619d7c86 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		interrupts = &lt;19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		spi-cpol;</div><div class='del'>-		spi-max-frequency = &lt;16000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts<br/>index 7fd53b7a4372..83db65bf630f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 		interrupts = &lt;19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		spi-cpol;</div><div class='del'>-		spi-max-frequency = &lt;16000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts<br/>new file mode 100644<br/>index 000000000000..e4576d509a5b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts</a></div><div class='hunk'>@@ -0,0 +1,566 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+// Copyright (C) 2022-2024 Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6ull.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/imx6ul-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "UNI-T UTi260B Thermal Camera";</div><div class='add'>+	compatible = "uni-t,uti260b", "fsl,imx6ull";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;6&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_backlight_enable&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vsd&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		/* generic 26650 battery */</div><div class='add'>+		device-chemistry = "lithium-ion";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;5000000&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4200000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tp5000: charger {</div><div class='add'>+		compatible = "gpio-charger";</div><div class='add'>+		charger-type = "usb-sdp";</div><div class='add'>+		gpios = &lt;&amp;gpio1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_charger_stat1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fuel-gauge {</div><div class='add'>+		compatible = "adc-battery";</div><div class='add'>+		charged-gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		io-channel-names = "voltage";</div><div class='add'>+		io-channels = &lt;&amp;adc1 7&gt;;</div><div class='add'>+		monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_charger_stat2&gt;;</div><div class='add'>+		power-supplies = &lt;&amp;tp5000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_gpio_keys&gt;;</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		up-key {</div><div class='add'>+			label = "Up";</div><div class='add'>+			gpios = &lt;&amp;gpio2 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_UP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		down-key {</div><div class='add'>+			label = "Down";</div><div class='add'>+			gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_DOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		left-key {</div><div class='add'>+			label = "Left";</div><div class='add'>+			gpios = &lt;&amp;gpio2 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_LEFT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		right-key {</div><div class='add'>+			label = "Right";</div><div class='add'>+			gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_RIGHT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ok-key {</div><div class='add'>+			label = "Ok";</div><div class='add'>+			gpios = &lt;&amp;gpio2 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		return-key {</div><div class='add'>+			label = "Return";</div><div class='add'>+			gpios = &lt;&amp;gpio2 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		play-key {</div><div class='add'>+			label = "Media";</div><div class='add'>+			gpios = &lt;&amp;gpio2 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MEDIA&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trigger-key {</div><div class='add'>+			label = "Trigger";</div><div class='add'>+			gpios = &lt;&amp;gpio2 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;BTN_TRIGGER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			label = "Power";</div><div class='add'>+			gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		light-key {</div><div class='add'>+			label = "Light";</div><div class='add'>+			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_LIGHTS_TOGGLE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_led_ctrl&gt;;</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_FLASH;</div><div class='add'>+			gpios = &lt;&amp;gpio2 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	poweroff {</div><div class='add'>+		compatible = "gpio-poweroff";</div><div class='add'>+		gpios = &lt;&amp;gpio2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_poweroff&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vref: regulator-vref-4v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VREF_4V2";</div><div class='add'>+		regulator-min-microvolt = &lt;4200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;4200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vsd: regulator-vsd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VSD_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	#io-channel-cells = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_adc&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;reg_vref&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_csi&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		parallel_from_gc0308: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;gc0308_to_parallel&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi3 {</div><div class='add'>+	cs-gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_spi3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "inanbo,t28cp45tn89-v17";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;panel_backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vsd&gt;;</div><div class='add'>+		spi-cpha;</div><div class='add'>+		spi-cpol;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	ir-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		line-name = "ir-reset-gpio";</div><div class='add'>+		output-low;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_ir_reset&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	/* configuring this to output-high results in poweroff */</div><div class='add'>+	power-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		line-name = "power-en-gpio";</div><div class='add'>+		output-low;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_poweroff2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	camera@21 {</div><div class='add'>+		compatible = "galaxycore,gc0308";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks IMX6UL_CLK_CSI&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mux_gc0308&gt;;</div><div class='add'>+		powerdown-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd28-supply = &lt;&amp;reg_vsd&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			gc0308_to_parallel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;parallel_from_gc0308&gt;;</div><div class='add'>+				bus-width = &lt;8&gt;;</div><div class='add'>+				data-shift = &lt;2&gt;; /* lines 9:2 are used */</div><div class='add'>+				hsync-active = &lt;1&gt;; /* active high */</div><div class='add'>+				vsync-active = &lt;1&gt;; /* active high */</div><div class='add'>+				data-active = &lt;1&gt;; /* active high */</div><div class='add'>+				pclk-sample = &lt;1&gt;; /* sample on rising edge */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif {</div><div class='add'>+	assigned-clocks = &lt;&amp;clks IMX6UL_CLK_LCDIF_PRE_SEL&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clks IMX6UL_CLK_PLL5_VIDEO_DIV&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_lcd_data&gt;, &lt;&amp;mux_lcd_ctrl&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		display_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_pwm&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_uart&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	/* USB-C connector */</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	/* thermal sensor */</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	fsl,tx-d-cal = &lt;106&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy2 {</div><div class='add'>+	fsl,tx-d-cal = &lt;106&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	/* MicroSD */</div><div class='add'>+	cd-gpios = &lt;&amp;gpio1 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_sdhc1&gt;, &lt;&amp;mux_sdhc1_cd&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mux_sdhc1_100mhz&gt;, &lt;&amp;mux_sdhc1_cd&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;mux_sdhc1_200mhz&gt;, &lt;&amp;mux_sdhc1_cd&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vsd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	/* eMMC */</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_sdhc2&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mux_wdog&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	mux_adc: adcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO07__GPIO1_IO07		0xb0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_backlight_enable: blenablegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_charger_stat1: charger1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_charger_stat2: charger2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_csi: csi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_VSYNC__CSI_VSYNC			0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_HSYNC__CSI_HSYNC			0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA00__CSI_DATA02		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA01__CSI_DATA03		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA02__CSI_DATA04		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA03__CSI_DATA05		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA04__CSI_DATA06		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA05__CSI_DATA07		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA06__CSI_DATA08		0x1b088</div><div class='add'>+			MX6UL_PAD_CSI_DATA07__CSI_DATA09		0x1b088</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_gc0308: gc0308grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_CSI_MCLK__CSI_MCLK			0x1e038</div><div class='add'>+			MX6UL_PAD_GPIO1_IO05__GPIO1_IO05		0x1b088</div><div class='add'>+			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06		0x1b088</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_gpio_keys: gpiokeygrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08		0x3008</div><div class='add'>+			MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14		0x3008</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03		0x3008</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL		0x4001b8b0</div><div class='add'>+			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA		0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL		0x4001f8a8</div><div class='add'>+			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA		0x4001f8a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_ir_reset: irresetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_lcd_ctrl: lcdifctrlgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_LCD_CLK__LCDIF_CLK			0x79</div><div class='add'>+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE		0x79</div><div class='add'>+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC		0x79</div><div class='add'>+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC		0x79</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_lcd_data: lcdifdatgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16		0x79</div><div class='add'>+			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17		0x79</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_led_ctrl: ledctrlgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_poweroff: poweroffgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_poweroff2: poweroff2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_pwm: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO08__PWM1_OUT			0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_sdhc1: sdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD			0x17059</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK			0x10071</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_sdhc1_100mhz: sdhc1-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD			0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK			0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3		0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_sdhc1_200mhz: sdhc1-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD			0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK			0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3		0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_sdhc1_cd: sdhc1-cd-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_sdhc2: sdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK			0x10069</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD			0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_spi3: ecspi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI		0x100b1</div><div class='add'>+			MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK		0x100b1</div><div class='add'>+			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20		0x3008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_uart: uartgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX		0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY		0x30b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi<br/>index 9c81c6baa2d3..22dd72499ef2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx7s.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/nxp/imx/imx7s.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx7s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/nxp/imx/imx7s.dtsi</a></div><div class='hunk'>@@ -636,6 +636,15 @@</div><div class='ctx'> 					clock-names = "snvs-rtc";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				snvs_poweroff: snvs-poweroff {</div><div class='add'>+					compatible = "syscon-poweroff";</div><div class='add'>+					regmap = &lt;&amp;snvs&gt;;</div><div class='add'>+					offset = &lt;0x38&gt;;</div><div class='add'>+					value = &lt;0x60&gt;;</div><div class='add'>+					mask = &lt;0x60&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				snvs_pwrkey: snvs-powerkey {</div><div class='ctx'> 					compatible = "fsl,sec-v4.0-pwrkey";</div><div class='ctx'> 					regmap = &lt;&amp;snvs&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile<br/>index 6478a39b3be5..e2e922bdc9e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/Makefile</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM) += \</div><div class='add'>+	msm8226-motorola-falcon.dtb \</div><div class='ctx'> 	qcom-apq8016-sbc.dtb \</div><div class='ctx'> 	qcom-apq8026-asus-sparrow.dtb \</div><div class='ctx'> 	qcom-apq8026-huawei-sturgeon.dtb \</div><div class='hunk'>@@ -45,7 +46,9 @@ dtb-$(CONFIG_ARCH_QCOM) += \</div><div class='ctx'> 	qcom-msm8974pro-fairphone-fp2.dtb \</div><div class='ctx'> 	qcom-msm8974pro-oneplus-bacon.dtb \</div><div class='ctx'> 	qcom-msm8974pro-samsung-klte.dtb \</div><div class='add'>+	qcom-msm8974pro-samsung-kltechn.dtb \</div><div class='ctx'> 	qcom-msm8974pro-sony-xperia-shinano-castor.dtb \</div><div class='add'>+	qcom-msm8974pro-sony-xperia-shinano-leo.dtb \</div><div class='ctx'> 	qcom-mdm9615-wp8548-mangoh-green.dtb \</div><div class='ctx'> 	qcom-sdx55-mtp.dtb \</div><div class='ctx'> 	qcom-sdx55-t55.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts b/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts<br/>new file mode 100644<br/>index 000000000000..029e1b1659c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts</a></div><div class='hunk'>@@ -0,0 +1,359 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "qcom-msm8226.dtsi"</div><div class='add'>+#include "pm8226.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;smem_region;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Motorola Moto G (2013)";</div><div class='add'>+	compatible = "motorola,falcon", "qcom,msm8226";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@3200000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x03200000 0x800000&gt;;</div><div class='add'>+			width = &lt;720&gt;;</div><div class='add'>+			height = &lt;1280&gt;;</div><div class='add'>+			stride = &lt;(720 * 3)&gt;;</div><div class='add'>+			format = "r8g8b8";</div><div class='add'>+			vsp-supply = &lt;&amp;reg_lcd_pos&gt;;</div><div class='add'>+			vsn-supply = &lt;&amp;reg_lcd_neg&gt;;</div><div class='add'>+			vddio-supply = &lt;&amp;vddio_disp_vreg&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		event-hall-sensor {</div><div class='add'>+			label = "Hall Effect Sensor";</div><div class='add'>+			gpios = &lt;&amp;tlmm 51 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;tlmm 106 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vddio_disp_vreg: regulator-vddio-disp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vddio_disp";</div><div class='add'>+		gpio = &lt;&amp;tlmm 34 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pm8226_l8&gt;;</div><div class='add'>+		startup-delay-us = &lt;300&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@3200000 {</div><div class='add'>+			reg = &lt;0x03200000 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dhob@f500000 {</div><div class='add'>+			reg = &lt;0x0f500000 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		shob@f540000 {</div><div class='add'>+			reg = &lt;0x0f540000 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smem_region: smem@fa00000 {</div><div class='add'>+			reg = &lt;0x0fa00000 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Actually &lt;0x0fa00000 0x500000&gt;, but first 100000 is smem */</div><div class='add'>+		reserved@fb00000 {</div><div class='add'>+			reg = &lt;0x0fb00000 0x400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	regulator@3e {</div><div class='add'>+		compatible = "ti,tps65132";</div><div class='add'>+		reg = &lt;0x3e&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;reg_lcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		reg_lcd_pos: outp {</div><div class='add'>+			regulator-name = "outp";</div><div class='add'>+			regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+			regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			enable-gpios = &lt;&amp;tlmm 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reg_lcd_neg: outn {</div><div class='add'>+			regulator-name = "outn";</div><div class='add'>+			regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+			regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			enable-gpios = &lt;&amp;tlmm 33 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp108";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;temp_alert_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8226_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8226_vib {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "qcom,rpm-pm8226-regulators";</div><div class='add'>+</div><div class='add'>+		pm8226_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_s5: s5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1337500&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l4: l4 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l7: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l14: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;2750000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2750000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3350000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l17: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l18: l18 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l19: l19 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l20: l20 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l21: l21 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l24: l24 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l25: l25 {</div><div class='add'>+			regulator-min-microvolt = &lt;1775000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2125000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l26: l26 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l27: l27 {</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_l28: l28 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8226_lvs1: lvs1 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8226_l17&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8226_l6&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smbb {</div><div class='add'>+	qcom,fast-charge-safe-current = &lt;2000000&gt;;</div><div class='add'>+	qcom,fast-charge-current-limit = &lt;1900000&gt;;</div><div class='add'>+	qcom,fast-charge-safe-voltage = &lt;4400000&gt;;</div><div class='add'>+	qcom,minimum-input-voltage = &lt;4300000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	reg_lcd_default: reg-lcd-default-state {</div><div class='add'>+		pins = "gpio31", "gpio33";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vddio_disp_default: reg-vddio-disp-default-state {</div><div class='add'>+		pins = "gpio34";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temp_alert_default: temp-alert-default-state {</div><div class='add'>+		pins = "gpio13";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	extcon = &lt;&amp;smbb&gt;;</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_hs_phy {</div><div class='add'>+	extcon = &lt;&amp;smbb&gt;;</div><div class='add'>+	v1p8-supply = &lt;&amp;pm8226_l10&gt;;</div><div class='add'>+	v3p3-supply = &lt;&amp;pm8226_l20&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi<br/>index 9a5ba978775a..11e60b74c3c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-apq8064.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-apq8064.dtsi</a></div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SPC: spc {</div><div class='add'>+			CPU_SPC: cpu-spc {</div><div class='ctx'> 				compatible = "qcom,idle-state-spc",</div><div class='ctx'> 						"arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;400&gt;;</div><div class='hunk'>@@ -1334,6 +1334,16 @@</div><div class='ctx'> 				 &lt;&amp;gcc PCIE_PHY_RESET&gt;;</div><div class='ctx'> 			reset-names = "axi", "ahb", "por", "pci", "phy";</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		hdmi: hdmi-tx@4a00000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi<br/>index 8204e64d9a97..ca53dff820ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-apq8084.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-apq8084.dtsi</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SPC: spc {</div><div class='add'>+			CPU_SPC: cpu-spc {</div><div class='ctx'> 				compatible = "qcom,idle-state-spc",</div><div class='ctx'> 						"arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;150&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi<br/>index 681cb3fc8085..0fb65f2bbcdf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi</a></div><div class='hunk'>@@ -470,6 +470,16 @@</div><div class='ctx'> 				      "phy_ahb";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		qpic_bam: dma-controller@7984000 {</div><div class='hunk'>@@ -598,24 +608,33 @@</div><div class='ctx'> 			reg = &lt;0x90000 0x64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			ethphy0: ethernet-phy@0 {</div><div class='add'>+			ethernet-phy-package@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "qcom,qca8075-package";</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='del'>-			};</div><div class='ctx'> </div><div class='del'>-			ethphy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='add'>+				qcom,tx-drive-strength-milliwatt = &lt;300&gt;;</div><div class='ctx'> </div><div class='del'>-			ethphy2: ethernet-phy@2 {</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-			};</div><div class='add'>+				ethphy0: ethernet-phy@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='ctx'> </div><div class='del'>-			ethphy3: ethernet-phy@3 {</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-			};</div><div class='add'>+				ethphy1: ethernet-phy@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ethphy2: ethernet-phy@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ethphy3: ethernet-phy@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='ctx'> </div><div class='del'>-			ethphy4: ethernet-phy@4 {</div><div class='del'>-				reg = &lt;4&gt;;</div><div class='add'>+				ethphy4: ethernet-phy@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi<br/>index 2eb6758b6a3a..f128510d8445 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi</a></div><div class='hunk'>@@ -1121,6 +1121,16 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			perst-gpios = &lt;&amp;qcom_pinmux 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1: pcie@1b700000 {</div><div class='hunk'>@@ -1172,6 +1182,16 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			perst-gpios = &lt;&amp;qcom_pinmux 48 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie2: pcie@1b900000 {</div><div class='hunk'>@@ -1223,6 +1243,16 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			perst-gpios = &lt;&amp;qcom_pinmux 63 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		qsgmii_csr: syscon@1bb00000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi<br/>index 36328dbe4212..1ba403b83cb1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;CPU_SLEEP_0 {</div><div class='del'>-	compatible = "qcom,idle-state-spc";</div><div class='add'>+	compatible = "qcom,idle-state-spc", "arm,idle-state";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu0_acc {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi<br/>index 5efc38d712cc..5651bb31bd54 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974.dtsi</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='ctx'> 	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> </div><div class='add'>+	chosen { };</div><div class='add'>+</div><div class='ctx'> 	clocks {</div><div class='ctx'> 		xo_board: xo_board {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='hunk'>@@ -85,7 +87,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SPC: spc {</div><div class='add'>+			CPU_SPC: cpu-spc {</div><div class='ctx'> 				compatible = "qcom,idle-state-spc",</div><div class='ctx'> 						"arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;150&gt;;</div><div class='hunk'>@@ -103,7 +105,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi<br/>new file mode 100644<br/>index 000000000000..b5443fd5b425<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,818 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "qcom-msm8974pro.dtsi"</div><div class='add'>+#include "pma8084.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;blsp1_uart1;</div><div class='add'>+		mmc0 = &amp;sdhc_1; /* SDC1 eMMC slot */</div><div class='add'>+		mmc1 = &amp;sdhc_3; /* SDC2 SD card slot */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_keys_pin_a&gt;;</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "volume_down";</div><div class='add'>+			gpios = &lt;&amp;pma8084_gpios 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-home {</div><div class='add'>+			label = "home_key";</div><div class='add'>+			gpios = &lt;&amp;pma8084_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "volume_up";</div><div class='add'>+			gpios = &lt;&amp;pma8084_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-gpio-touchkey {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;tlmm 95 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;tlmm 96 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c_touchkey_pins&gt;;</div><div class='add'>+</div><div class='add'>+		touchkey@20 {</div><div class='add'>+			compatible = "cypress,tm2-touchkey";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;pma8084_gpios&gt;;</div><div class='add'>+			interrupts = &lt;6 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;touchkey_pin&gt;;</div><div class='add'>+</div><div class='add'>+			vcc-supply = &lt;&amp;max77826_ldo15&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;pma8084_l19&gt;;</div><div class='add'>+</div><div class='add'>+			linux,keycodes = &lt;KEY_APPSELECT KEY_BACK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_led_gpio: i2c-gpio-led {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c_led_gpioex_pins&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-gpio,delay-us = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio_expander: gpio@20 {</div><div class='add'>+			compatible = "nxp,pcal6416";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			vcc-supply = &lt;&amp;pma8084_s4&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;gpioex_pin&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-controller@30 {</div><div class='add'>+			compatible = "panasonic,an30259a";</div><div class='add'>+			reg = &lt;0x30&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			led@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				function = LED_FUNCTION_STATUS;</div><div class='add'>+				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				function = LED_FUNCTION_STATUS;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				function = LED_FUNCTION_STATUS;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wlan: wlan-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "wl-reg";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;gpio_expander 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_panel: panel-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_en_pin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-name = "panel-vddr-reg";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pma8084_gpios 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: vreg-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph-pwr";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@20 {</div><div class='add'>+		compatible = "syna,rmi4-i2c";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;pma8084_gpios&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;max77826_ldo13&gt;;</div><div class='add'>+		vio-supply = &lt;&amp;pma8084_lvs2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_pin&gt;;</div><div class='add'>+</div><div class='add'>+		syna,startup-delay-ms = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rmi4-f01@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			syna,nosleep-mode = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmi4-f12@12 {</div><div class='add'>+			reg = &lt;0x12&gt;;</div><div class='add'>+			syna,sensor-type = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@60 {</div><div class='add'>+		reg = &lt;0x60&gt;;</div><div class='add'>+		compatible = "maxim,max77826";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			max77826_ldo1: LDO1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo2: LDO2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo3: LDO3 {</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo4: LDO4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo5: LDO5 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo6: LDO6 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo7: LDO7 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo8: LDO8 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo9: LDO9 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo10: LDO10 {</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo11: LDO11 {</div><div class='add'>+				regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo12: LDO12 {</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo13: LDO13 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo14: LDO14 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_ldo15: LDO15 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_buck: BUCK {</div><div class='add'>+				regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			max77826_buckboost: BUCKBOOST {</div><div class='add'>+				regulator-min-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp2_i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	fuelgauge@36 {</div><div class='add'>+		compatible = "maxim,max17048";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+		maxim,double-soc;</div><div class='add'>+		maxim,rcomp = /bits/ 8 &lt;0x56&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;pma8084_gpios&gt;;</div><div class='add'>+		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;fuelgauge_pin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp2_uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp2_uart2_pins_active&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp2_uart2_pins_sleep&gt;;</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43540-bt";</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_pins&gt;;</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio_expander 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+		interrupts = &lt;75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdda-supply = &lt;&amp;pma8084_l2&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;pma8084_l22&gt;;</div><div class='add'>+	vddio-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='add'>+</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "samsung,s6e3fa2";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_te_pin &amp;panel_rst_pin&gt;;</div><div class='add'>+</div><div class='add'>+		iovdd-supply = &lt;&amp;pma8084_lvs4&gt;;</div><div class='add'>+		vddr-supply = &lt;&amp;vreg_panel&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pma8084_gpios 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vddio-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pma8084_gpios {</div><div class='add'>+	gpio_keys_pin_a: gpio-keys-active-state {</div><div class='add'>+		pins = "gpio2", "gpio3", "gpio5";</div><div class='add'>+		function = "normal";</div><div class='add'>+</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touchkey_pin: touchkey-int-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_pin: touchscreen-int-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_en_pin: panel-en-state {</div><div class='add'>+		pins = "gpio14";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_sleep_clk_pin: wlan-sleep-clk-state {</div><div class='add'>+		pins = "gpio16";</div><div class='add'>+		function = "func2";</div><div class='add'>+</div><div class='add'>+		output-high;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_rst_pin: panel-rst-state {</div><div class='add'>+		pins = "gpio17";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fuelgauge_pin: fuelgauge-int-state {</div><div class='add'>+		pins = "gpio21";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	status = "okay";</div><div class='add'>+	cx-supply = &lt;&amp;pma8084_s2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mss {</div><div class='add'>+	status = "okay";</div><div class='add'>+	cx-supply = &lt;&amp;pma8084_s2&gt;;</div><div class='add'>+	mss-supply = &lt;&amp;pma8084_s6&gt;;</div><div class='add'>+	mx-supply = &lt;&amp;pma8084_s1&gt;;</div><div class='add'>+	pll-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,rpm-pma8084-regulators";</div><div class='add'>+</div><div class='add'>+		pma8084_s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_s2: s2 {</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_s5: s5 {</div><div class='add'>+			regulator-min-microvolt = &lt;2150000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2150000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_s6: s6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l4: l4 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l7: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l11: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l13: l13 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l14: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l17: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l18: l18 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l19: l19 {</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l20: l20 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-system-load = &lt;200000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l21: l21 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-system-load = &lt;200000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l24: l24 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l25: l25 {</div><div class='add'>+			regulator-min-microvolt = &lt;2100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l26: l26 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_l27: l27 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pma8084_lvs1: lvs1 {};</div><div class='add'>+		pma8084_lvs2: lvs2 {};</div><div class='add'>+		pma8084_lvs3: lvs3 {};</div><div class='add'>+		pma8084_lvs4: lvs4 {};</div><div class='add'>+</div><div class='add'>+		pma8084_5vs1: 5vs1 {};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;pma8084_l20&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pma8084_s4&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc1_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc1_off&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pma8084_s4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_off&gt;;</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Allow all klte* variants to load the same NVRAM file,</div><div class='add'>+		 * as they have little difference in the WiFi part.</div><div class='add'>+		 */</div><div class='add'>+		brcm,board-type = "samsung,klte";</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+		interrupts = &lt;92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wlan_sleep_clk_pin &amp;wifi_pin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;pma8084_l21&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pma8084_l13&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * cd-gpio is intentionally disabled. If enabled, an SD card</div><div class='add'>+	 * present during boot is not initialized correctly. Without</div><div class='add'>+	 * cd-gpios the driver resorts to polling, so hotplug works.</div><div class='add'>+	 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc3_on /* &amp;sdhc3_cd_pin */&gt;;</div><div class='add'>+	/* cd-gpios = &lt;&amp;tlmm 62 GPIO_ACTIVE_LOW&gt;; */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	/* This seems suspicious, but somebody with this device should look into it. */</div><div class='add'>+	blsp2_uart2_pins_active: blsp2-uart2-pins-active-state {</div><div class='add'>+		pins = "gpio45", "gpio46", "gpio47", "gpio48";</div><div class='add'>+		function = "blsp_uart8";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep-state {</div><div class='add'>+		pins = "gpio45", "gpio46", "gpio47", "gpio48";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_pins: bt-pins-state {</div><div class='add'>+		hostwake-pins {</div><div class='add'>+			pins = "gpio75";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		devwake-pins {</div><div class='add'>+			pins = "gpio91";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc1_on: sdhc1-on-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "sdc1_clk";</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-data-pins {</div><div class='add'>+			pins = "sdc1_cmd", "sdc1_data";</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc3_on: sdc3-on-state {</div><div class='add'>+		pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";</div><div class='add'>+		function = "sdc3";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhc3_cd_pin: sdc3-cd-on-state {</div><div class='add'>+		pins = "gpio62";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_on: sdhc2-on-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "sdc2_clk";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-data-pins {</div><div class='add'>+			pins = "sdc2_cmd", "sdc2_data";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_touchkey_pins: i2c-touchkey-state {</div><div class='add'>+		pins = "gpio95", "gpio96";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_led_gpioex_pins: i2c-led-gpioex-state {</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpioex_pin: gpioex-state {</div><div class='add'>+		pins = "gpio145";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pin: wifi-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_te_pin: panel-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "mdp_vsync";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;usb_hs1_phy&gt;;</div><div class='add'>+	phy-select = &lt;&amp;tcsr 0xb000 0&gt;;</div><div class='add'>+</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_hs1_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	v1p8-supply = &lt;&amp;pma8084_l6&gt;;</div><div class='add'>+	v3p3-supply = &lt;&amp;pma8084_l24&gt;;</div><div class='add'>+</div><div class='add'>+	qcom,init-seq = /bits/ 8 &lt;0x1 0x64&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts<br/>index b93539e2b87e..954665f3a9dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts</a></div><div class='hunk'>@@ -1,817 +1,16 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include "qcom-msm8974pro.dtsi"</div><div class='del'>-#include "pma8084.dtsi"</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "qcom-msm8974pro-samsung-klte-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Samsung Galaxy S5";</div><div class='ctx'> 	compatible = "samsung,klte", "qcom,msm8974pro", "qcom,msm8974";</div><div class='del'>-	chassis-type = "handset";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;blsp1_uart1;</div><div class='del'>-		mmc0 = &amp;sdhc_1; /* SDC1 eMMC slot */</div><div class='del'>-		mmc1 = &amp;sdhc_3; /* SDC2 SD card slot */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;gpio_keys_pin_a&gt;;</div><div class='del'>-</div><div class='del'>-		key-volume-down {</div><div class='del'>-			label = "volume_down";</div><div class='del'>-			gpios = &lt;&amp;pma8084_gpios 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-			debounce-interval = &lt;15&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-home {</div><div class='del'>-			label = "home_key";</div><div class='del'>-			gpios = &lt;&amp;pma8084_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			debounce-interval = &lt;15&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-volume-up {</div><div class='del'>-			label = "volume_up";</div><div class='del'>-			gpios = &lt;&amp;pma8084_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-			debounce-interval = &lt;15&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c-gpio-touchkey {</div><div class='del'>-		compatible = "i2c-gpio";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		sda-gpios = &lt;&amp;tlmm 95 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='del'>-		scl-gpios = &lt;&amp;tlmm 96 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c_touchkey_pins&gt;;</div><div class='del'>-</div><div class='del'>-		touchkey@20 {</div><div class='del'>-			compatible = "cypress,tm2-touchkey";</div><div class='del'>-			reg = &lt;0x20&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;pma8084_gpios&gt;;</div><div class='del'>-			interrupts = &lt;6 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;touchkey_pin&gt;;</div><div class='del'>-</div><div class='del'>-			vcc-supply = &lt;&amp;max77826_ldo15&gt;;</div><div class='del'>-			vdd-supply = &lt;&amp;pma8084_l19&gt;;</div><div class='del'>-</div><div class='del'>-			linux,keycodes = &lt;KEY_APPSELECT KEY_BACK&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c-gpio-led {</div><div class='del'>-		compatible = "i2c-gpio";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		scl-gpios = &lt;&amp;tlmm 121 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='del'>-		sda-gpios = &lt;&amp;tlmm 120 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;i2c_led_gpioex_pins&gt;;</div><div class='del'>-</div><div class='del'>-		i2c-gpio,delay-us = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio_expander: gpio@20 {</div><div class='del'>-			compatible = "nxp,pcal6416";</div><div class='del'>-			reg = &lt;0x20&gt;;</div><div class='del'>-</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			vcc-supply = &lt;&amp;pma8084_s4&gt;;</div><div class='del'>-</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;gpioex_pin&gt;;</div><div class='del'>-</div><div class='del'>-			reset-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-controller@30 {</div><div class='del'>-			compatible = "panasonic,an30259a";</div><div class='del'>-			reg = &lt;0x30&gt;;</div><div class='del'>-</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			led@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				function = LED_FUNCTION_STATUS;</div><div class='del'>-				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led@2 {</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				function = LED_FUNCTION_STATUS;</div><div class='del'>-				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			led@3 {</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-				function = LED_FUNCTION_STATUS;</div><div class='del'>-				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_wlan: wlan-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "wl-reg";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;gpio_expander 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_panel: panel-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;panel_en_pin&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-name = "panel-vddr-reg";</div><div class='del'>-		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;pma8084_gpios 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_vph_pwr: vreg-vph-pwr {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vph-pwr";</div><div class='del'>-</div><div class='del'>-		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp1_i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	touchscreen@20 {</div><div class='del'>-		compatible = "syna,rmi4-i2c";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;pma8084_gpios&gt;;</div><div class='del'>-		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-</div><div class='del'>-		vdd-supply = &lt;&amp;max77826_ldo13&gt;;</div><div class='del'>-		vio-supply = &lt;&amp;pma8084_lvs2&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;touch_pin&gt;;</div><div class='del'>-</div><div class='del'>-		syna,startup-delay-ms = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		rmi4-f01@1 {</div><div class='del'>-			reg = &lt;0x1&gt;;</div><div class='del'>-			syna,nosleep-mode = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rmi4-f12@12 {</div><div class='del'>-			reg = &lt;0x12&gt;;</div><div class='del'>-			syna,sensor-type = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp1_i2c6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pmic@60 {</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-		compatible = "maxim,max77826";</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			max77826_ldo1: LDO1 {</div><div class='del'>-				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo2: LDO2 {</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo3: LDO3 {</div><div class='del'>-				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo4: LDO4 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo5: LDO5 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo6: LDO6 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo7: LDO7 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo8: LDO8 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo9: LDO9 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo10: LDO10 {</div><div class='del'>-				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo11: LDO11 {</div><div class='del'>-				regulator-min-microvolt = &lt;2700000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo12: LDO12 {</div><div class='del'>-				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo13: LDO13 {</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo14: LDO14 {</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_ldo15: LDO15 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_buck: BUCK {</div><div class='del'>-				regulator-min-microvolt = &lt;1225000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			max77826_buckboost: BUCKBOOST {</div><div class='del'>-				regulator-min-microvolt = &lt;3400000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp1_uart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp2_i2c6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	fuelgauge@36 {</div><div class='del'>-		compatible = "maxim,max17048";</div><div class='del'>-		reg = &lt;0x36&gt;;</div><div class='del'>-</div><div class='del'>-		maxim,double-soc;</div><div class='del'>-		maxim,rcomp = /bits/ 8 &lt;0x56&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;pma8084_gpios&gt;;</div><div class='del'>-		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;fuelgauge_pin&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp2_uart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;blsp2_uart2_pins_active&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;blsp2_uart2_pins_sleep&gt;;</div><div class='del'>-</div><div class='del'>-	bluetooth {</div><div class='del'>-		compatible = "brcm,bcm43540-bt";</div><div class='del'>-		max-speed = &lt;3000000&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;bt_pins&gt;;</div><div class='del'>-		device-wakeup-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		shutdown-gpios = &lt;&amp;gpio_expander 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "host-wakeup";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dsi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdda-supply = &lt;&amp;pma8084_l2&gt;;</div><div class='del'>-	vdd-supply = &lt;&amp;pma8084_l22&gt;;</div><div class='del'>-	vddio-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='del'>-</div><div class='del'>-	panel: panel@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		compatible = "samsung,s6e3fa2";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;panel_te_pin &amp;panel_rst_pin&gt;;</div><div class='del'>-</div><div class='del'>-		iovdd-supply = &lt;&amp;pma8084_lvs4&gt;;</div><div class='del'>-		vddr-supply = &lt;&amp;vreg_panel&gt;;</div><div class='del'>-</div><div class='del'>-		reset-gpios = &lt;&amp;pma8084_gpios 17 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			panel_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dsi0_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dsi0_phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vddio-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pma8084_gpios {</div><div class='del'>-	gpio_keys_pin_a: gpio-keys-active-state {</div><div class='del'>-		pins = "gpio2", "gpio3", "gpio5";</div><div class='del'>-		function = "normal";</div><div class='del'>-</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	touchkey_pin: touchkey-int-state {</div><div class='del'>-		pins = "gpio6";</div><div class='del'>-		function = "normal";</div><div class='del'>-		bias-disable;</div><div class='del'>-		input-enable;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	touch_pin: touchscreen-int-state {</div><div class='del'>-		pins = "gpio8";</div><div class='del'>-		function = "normal";</div><div class='del'>-		bias-disable;</div><div class='del'>-		input-enable;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	panel_en_pin: panel-en-state {</div><div class='del'>-		pins = "gpio14";</div><div class='del'>-		function = "normal";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wlan_sleep_clk_pin: wlan-sleep-clk-state {</div><div class='del'>-		pins = "gpio16";</div><div class='del'>-		function = "func2";</div><div class='del'>-</div><div class='del'>-		output-high;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	panel_rst_pin: panel-rst-state {</div><div class='del'>-		pins = "gpio17";</div><div class='del'>-		function = "normal";</div><div class='del'>-		bias-disable;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fuelgauge_pin: fuelgauge-int-state {</div><div class='del'>-		pins = "gpio21";</div><div class='del'>-		function = "normal";</div><div class='del'>-		bias-disable;</div><div class='del'>-		input-enable;</div><div class='del'>-		power-source = &lt;PMA8084_GPIO_S4&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;i2c_led_gpio {</div><div class='add'>+	scl-gpios = &lt;&amp;tlmm 121 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;tlmm 120 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;remoteproc_adsp {</div><div class='del'>-	status = "okay";</div><div class='del'>-	cx-supply = &lt;&amp;pma8084_s2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_mss {</div><div class='del'>-	status = "okay";</div><div class='del'>-	cx-supply = &lt;&amp;pma8084_s2&gt;;</div><div class='del'>-	mss-supply = &lt;&amp;pma8084_s6&gt;;</div><div class='del'>-	mx-supply = &lt;&amp;pma8084_s1&gt;;</div><div class='del'>-	pll-supply = &lt;&amp;pma8084_l12&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rpm_requests {</div><div class='del'>-	regulators-0 {</div><div class='del'>-		compatible = "qcom,rpm-pma8084-regulators";</div><div class='del'>-</div><div class='del'>-		pma8084_s1: s1 {</div><div class='del'>-			regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_s2: s2 {</div><div class='del'>-			regulator-min-microvolt = &lt;500000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_s3: s3 {</div><div class='del'>-			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_s4: s4 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_s5: s5 {</div><div class='del'>-			regulator-min-microvolt = &lt;2150000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2150000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_s6: s6 {</div><div class='del'>-			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l1: l1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l2: l2 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l3: l3 {</div><div class='del'>-			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l4: l4 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l5: l5 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l6: l6 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l7: l7 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l8: l8 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l9: l9 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l10: l10 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l11: l11 {</div><div class='del'>-			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l12: l12 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l13: l13 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l14: l14 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l15: l15 {</div><div class='del'>-			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l16: l16 {</div><div class='del'>-			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l17: l17 {</div><div class='del'>-			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l18: l18 {</div><div class='del'>-			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l19: l19 {</div><div class='del'>-			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l20: l20 {</div><div class='del'>-			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-system-load = &lt;200000&gt;;</div><div class='del'>-			regulator-allow-set-load;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l21: l21 {</div><div class='del'>-			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-system-load = &lt;200000&gt;;</div><div class='del'>-			regulator-allow-set-load;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l22: l22 {</div><div class='del'>-			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l23: l23 {</div><div class='del'>-			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l24: l24 {</div><div class='del'>-			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l25: l25 {</div><div class='del'>-			regulator-min-microvolt = &lt;2100000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2100000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l26: l26 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_l27: l27 {</div><div class='del'>-			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pma8084_lvs1: lvs1 {};</div><div class='del'>-		pma8084_lvs2: lvs2 {};</div><div class='del'>-		pma8084_lvs3: lvs3 {};</div><div class='del'>-		pma8084_lvs4: lvs4 {};</div><div class='del'>-</div><div class='del'>-		pma8084_5vs1: 5vs1 {};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vmmc-supply = &lt;&amp;pma8084_l20&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;pma8084_s4&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc1_on&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;sdc1_off&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	max-frequency = &lt;100000000&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;pma8084_s4&gt;;</div><div class='del'>-	non-removable;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc2_on&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;sdc2_off&gt;;</div><div class='del'>-</div><div class='del'>-	wifi@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "host-wake";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;wlan_sleep_clk_pin &amp;wifi_pin&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	max-frequency = &lt;100000000&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;pma8084_l21&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;pma8084_l13&gt;;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * cd-gpio is intentionally disabled. If enabled, an SD card</div><div class='del'>-	 * present during boot is not initialized correctly. Without</div><div class='del'>-	 * cd-gpios the driver resorts to polling, so hotplug works.</div><div class='del'>-	 */</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc3_on /* &amp;sdhc3_cd_pin */&gt;;</div><div class='del'>-	/* cd-gpios = &lt;&amp;tlmm 62 GPIO_ACTIVE_LOW&gt;; */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	/* This seems suspicious, but somebody with this device should look into it. */</div><div class='del'>-	blsp2_uart2_pins_active: blsp2-uart2-pins-active-state {</div><div class='del'>-		pins = "gpio45", "gpio46", "gpio47", "gpio48";</div><div class='del'>-		function = "blsp_uart8";</div><div class='del'>-		drive-strength = &lt;8&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep-state {</div><div class='del'>-		pins = "gpio45", "gpio46", "gpio47", "gpio48";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-pull-down;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bt_pins: bt-pins-state {</div><div class='del'>-		hostwake-pins {</div><div class='del'>-			pins = "gpio75";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;16&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		devwake-pins {</div><div class='del'>-			pins = "gpio91";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc1_on: sdhc1-on-state {</div><div class='del'>-		clk-pins {</div><div class='del'>-			pins = "sdc1_clk";</div><div class='del'>-			drive-strength = &lt;4&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cmd-data-pins {</div><div class='del'>-			pins = "sdc1_cmd", "sdc1_data";</div><div class='del'>-			drive-strength = &lt;4&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc3_on: sdc3-on-state {</div><div class='del'>-		pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";</div><div class='del'>-		function = "sdc3";</div><div class='del'>-		drive-strength = &lt;8&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhc3_cd_pin: sdc3-cd-on-state {</div><div class='del'>-		pins = "gpio62";</div><div class='del'>-		function = "gpio";</div><div class='del'>-</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc2_on: sdhc2-on-state {</div><div class='del'>-		clk-pins {</div><div class='del'>-			pins = "sdc2_clk";</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cmd-data-pins {</div><div class='del'>-			pins = "sdc2_cmd", "sdc2_data";</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c_touchkey_pins: i2c-touchkey-state {</div><div class='del'>-		pins = "gpio95", "gpio96";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c_led_gpioex_pins: i2c-led-gpioex-state {</div><div class='del'>-		pins = "gpio120", "gpio121";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-down;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpioex_pin: gpioex-state {</div><div class='del'>-		pins = "gpio145";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wifi_pin: wifi-state {</div><div class='del'>-		pins = "gpio92";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-down;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	panel_te_pin: panel-state {</div><div class='del'>-		pins = "gpio12";</div><div class='del'>-		function = "mdp_vsync";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;usb_hs1_phy&gt;;</div><div class='del'>-	phy-select = &lt;&amp;tcsr 0xb000 0&gt;;</div><div class='del'>-</div><div class='del'>-	hnp-disable;</div><div class='del'>-	srp-disable;</div><div class='del'>-	adp-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_hs1_phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	v1p8-supply = &lt;&amp;pma8084_l6&gt;;</div><div class='del'>-	v3p3-supply = &lt;&amp;pma8084_l24&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,init-seq = /bits/ 8 &lt;0x1 0x64&gt;;</div><div class='add'>+&amp;i2c_led_gpioex_pins {</div><div class='add'>+	pins = "gpio120", "gpio121";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts<br/>new file mode 100644<br/>index 000000000000..b902e31b16c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "qcom-msm8974pro-samsung-klte-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S5 China";</div><div class='add'>+	compatible = "samsung,kltechn", "samsung,klte", "qcom,msm8974pro", "qcom,msm8974";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_led_gpio {</div><div class='add'>+	scl-gpios = &lt;&amp;tlmm 61 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;tlmm 60 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_led_gpioex_pins {</div><div class='add'>+	pins = "gpio60", "gpio61";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts<br/>index ee94741a26ed..409d1798de34 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts</a></div><div class='hunk'>@@ -1,60 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include "qcom-msm8974pro.dtsi"</div><div class='del'>-#include "pm8841.dtsi"</div><div class='del'>-#include "pm8941.dtsi"</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Sony Xperia Z2 Tablet";</div><div class='ctx'> 	compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";</div><div class='ctx'> 	chassis-type = "tablet";</div><div class='ctx'> </div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;blsp1_uart2;</div><div class='del'>-		serial1 = &amp;blsp2_uart1;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;gpio_keys_pin_a&gt;;</div><div class='del'>-</div><div class='del'>-		key-volume-down {</div><div class='del'>-			label = "volume_down";</div><div class='del'>-			gpios = &lt;&amp;pm8941_gpios 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-camera-snapshot {</div><div class='del'>-			label = "camera_snapshot";</div><div class='del'>-			gpios = &lt;&amp;pm8941_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-camera-focus {</div><div class='del'>-			label = "camera_focus";</div><div class='del'>-			gpios = &lt;&amp;pm8941_gpios 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-volume-up {</div><div class='del'>-			label = "volume_up";</div><div class='del'>-			gpios = &lt;&amp;pm8941_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	vreg_bl_vddio: lcd-backlight-vddio {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vreg_bl_vddio";</div><div class='hunk'>@@ -67,107 +18,15 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;70000&gt;;</div><div class='ctx'> </div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;lcd_backlight_en_pin_a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_vsp: lcd-dcdc-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vreg_vsp";</div><div class='del'>-		regulator-min-microvolt = &lt;5600000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5600000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;pm8941_gpios 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;lcd_dcdc_en_pin_a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_boost: vreg-boost {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "vreg-boost";</div><div class='del'>-		regulator-min-microvolt = &lt;3150000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3150000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;pm8941_gpios 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;boost_bypass_n_pin&gt;;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	vreg_vph_pwr: vreg-vph-pwr {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vph-pwr";</div><div class='del'>-</div><div class='del'>-		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_wlan: wlan-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "wl-reg";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;pm8941_gpios 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;wlan_regulator_pin&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp1_uart2 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;blsp2_i2c2 {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;blsp2_i2c5 {</div><div class='ctx'> 	clock-frequency = &lt;355000&gt;;</div><div class='ctx'> </div><div class='del'>-	synaptics@2c {</div><div class='del'>-		compatible = "syna,rmi4-i2c";</div><div class='del'>-		reg = &lt;0x2c&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;86 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		vdd-supply = &lt;&amp;pm8941_l22&gt;;</div><div class='del'>-		vio-supply = &lt;&amp;pm8941_lvs3&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;ts_int_pin&gt;;</div><div class='del'>-</div><div class='del'>-		syna,startup-delay-ms = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		rmi4-f01@1 {</div><div class='del'>-			reg = &lt;0x1&gt;;</div><div class='del'>-			syna,nosleep-mode = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rmi4-f11@11 {</div><div class='del'>-			reg = &lt;0x11&gt;;</div><div class='del'>-			syna,sensor-type = &lt;1&gt;;</div><div class='del'>-			touchscreen-inverted-x;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp2_i2c5 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	clock-frequency = &lt;355000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	lp8566_wled: backlight@2c {</div><div class='ctx'> 		compatible = "ti,lp8556";</div><div class='hunk'>@@ -182,42 +41,52 @@</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa0&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0xff&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a1h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa1&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x3f&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a2h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa2&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x20&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a3h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa3&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x5e&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a4h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa4&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x02&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a5h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa5&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x04&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a6h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa6&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x80&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a7h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa7&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0xf7&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-a9h {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xa9&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x80&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-aah {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xaa&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x0f&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		rom-aeh {</div><div class='ctx'> 			rom-addr = /bits/ 8 &lt;0xae&gt;;</div><div class='ctx'> 			rom-val = /bits/ 8 &lt;0x0f&gt;;</div><div class='hunk'>@@ -232,8 +101,8 @@</div><div class='ctx'> 		compatible = "brcm,bcm43438-bt";</div><div class='ctx'> 		max-speed = &lt;3000000&gt;;</div><div class='ctx'> </div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_host_wake_pin&gt;, &lt;&amp;bt_dev_wake_pin&gt;, &lt;&amp;bt_reg_on_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 		host-wakeup-gpios = &lt;&amp;tlmm 95 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		device-wakeup-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -241,339 +110,26 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pm8941_coincell {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	qcom,rset-ohms = &lt;2100&gt;;</div><div class='del'>-	qcom,vset-millivolts = &lt;3000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pm8941_gpios {</div><div class='del'>-	gpio_keys_pin_a: gpio-keys-active-state {</div><div class='del'>-		pins = "gpio2", "gpio5";</div><div class='del'>-		function = "normal";</div><div class='del'>-</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	bt_reg_on_pin: bt-reg-on-state {</div><div class='ctx'> 		pins = "gpio16";</div><div class='ctx'> 		function = "normal";</div><div class='del'>-</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	wlan_sleep_clk_pin: wl-sleep-clk-state {</div><div class='del'>-		pins = "gpio17";</div><div class='del'>-		function = "func2";</div><div class='del'>-</div><div class='del'>-		output-high;</div><div class='del'>-		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wlan_regulator_pin: wl-reg-active-state {</div><div class='del'>-		pins = "gpio18";</div><div class='del'>-		function = "normal";</div><div class='del'>-</div><div class='del'>-		bias-disable;</div><div class='del'>-		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state {</div><div class='del'>-		pins = "gpio20";</div><div class='del'>-		function = "normal";</div><div class='del'>-</div><div class='del'>-		bias-disable;</div><div class='del'>-		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='del'>-		input-disable;</div><div class='del'>-		output-low;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pm8941_lpg {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	qcom,power-source = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	multi-led {</div><div class='del'>-		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='del'>-		function = LED_FUNCTION_STATUS;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		led@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led@6 {</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_adsp {</div><div class='del'>-	cx-supply = &lt;&amp;pm8841_s2&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_mss {</div><div class='del'>-	cx-supply = &lt;&amp;pm8841_s2&gt;;</div><div class='del'>-	mss-supply = &lt;&amp;pm8841_s3&gt;;</div><div class='del'>-	mx-supply = &lt;&amp;pm8841_s1&gt;;</div><div class='del'>-	pll-supply = &lt;&amp;pm8941_l12&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rpm_requests {</div><div class='del'>-	regulators-0 {</div><div class='del'>-		compatible = "qcom,rpm-pm8841-regulators";</div><div class='del'>-</div><div class='del'>-		pm8841_s1: s1 {</div><div class='del'>-			regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8841_s2: s2 {</div><div class='del'>-			regulator-min-microvolt = &lt;500000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8841_s3: s3 {</div><div class='del'>-			regulator-min-microvolt = &lt;500000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8841_s4: s4 {</div><div class='del'>-			regulator-min-microvolt = &lt;500000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	regulators-1 {</div><div class='del'>-		compatible = "qcom,rpm-pm8941-regulators";</div><div class='del'>-</div><div class='del'>-		vdd_l1_l3-supply = &lt;&amp;pm8941_s1&gt;;</div><div class='del'>-		vdd_l2_lvs1_2_3-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='del'>-		vdd_l4_l11-supply = &lt;&amp;pm8941_s1&gt;;</div><div class='del'>-		vdd_l5_l7-supply = &lt;&amp;pm8941_s2&gt;;</div><div class='del'>-		vdd_l6_l12_l14_l15-supply = &lt;&amp;pm8941_s2&gt;;</div><div class='del'>-		vdd_l9_l10_l17_l22-supply = &lt;&amp;vreg_boost&gt;;</div><div class='del'>-		vdd_l13_l20_l23_l24-supply = &lt;&amp;vreg_boost&gt;;</div><div class='del'>-		vdd_l21-supply = &lt;&amp;vreg_boost&gt;;</div><div class='del'>-</div><div class='del'>-		pm8941_s1: s1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_s2: s2 {</div><div class='del'>-			regulator-min-microvolt = &lt;2150000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2150000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_s3: s3 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-system-load = &lt;154000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_s4: s4 {</div><div class='del'>-			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l1: l1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l2: l2 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l3: l3 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l4: l4 {</div><div class='del'>-			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l5: l5 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l6: l6 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l7: l7 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l8: l8 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l9: l9 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		pm8941_l11: l11 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pm8941_l12: l12 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l13: l13 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l14: l14 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l15: l15 {</div><div class='del'>-			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l16: l16 {</div><div class='del'>-			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l17: l17 {</div><div class='del'>-			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l18: l18 {</div><div class='del'>-			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		pm8941_l19: l19 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		pm8941_l20: l20 {</div><div class='del'>-			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-system-load = &lt;500000&gt;;</div><div class='del'>-			regulator-allow-set-load;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l21: l21 {</div><div class='del'>-			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l22: l22 {</div><div class='del'>-			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l23: l23 {</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_l24: l24 {</div><div class='del'>-			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941_lvs3: lvs3 {};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vmmc-supply = &lt;&amp;pm8941_l20&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc1_on&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;sdc1_off&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vmmc-supply = &lt;&amp;pm8941_l21&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;pm8941_l13&gt;;</div><div class='del'>-</div><div class='del'>-	cd-gpios = &lt;&amp;tlmm 62 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc2_on&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;sdc2_off&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	max-frequency = &lt;100000000&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='del'>-	non-removable;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc3_on&gt;;</div><div class='del'>-</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	bcrmf@1 {</div><div class='del'>-		compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		brcm,drive-strength = &lt;10&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;wlan_sleep_clk_pin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -591,75 +147,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;tlmm {</div><div class='del'>-	lcd_backlight_en_pin_a: lcd-backlight-vddio-state {</div><div class='del'>-		pins = "gpio69";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;10&gt;;</div><div class='del'>-		output-low;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc1_on: sdc1-on-state {</div><div class='del'>-		clk-pins {</div><div class='del'>-			pins = "sdc1_clk";</div><div class='del'>-			drive-strength = &lt;16&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cmd-data-pins {</div><div class='del'>-			pins = "sdc1_cmd", "sdc1_data";</div><div class='del'>-			drive-strength = &lt;10&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc2_on: sdc2-on-state {</div><div class='del'>-		clk-pins {</div><div class='del'>-			pins = "sdc2_clk";</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cmd-data-pins {</div><div class='del'>-			pins = "sdc2_cmd", "sdc2_data";</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cd-pins {</div><div class='del'>-			pins = "gpio62";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc3_on: sdc3-on-state {</div><div class='del'>-		clk-pins {</div><div class='del'>-			pins = "gpio40";</div><div class='del'>-			function = "sdc3";</div><div class='del'>-			drive-strength = &lt;10&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cmd-pins {</div><div class='del'>-			pins = "gpio39";</div><div class='del'>-			function = "sdc3";</div><div class='del'>-			drive-strength = &lt;10&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		data-pins {</div><div class='del'>-			pins = "gpio35", "gpio36", "gpio37", "gpio38";</div><div class='del'>-			function = "sdc3";</div><div class='del'>-			drive-strength = &lt;10&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;synaptics_touchscreen {</div><div class='add'>+	vio-supply = &lt;&amp;pm8941_lvs3&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ts_int_pin: ts-int-pin-state {</div><div class='del'>-		pins = "gpio86";</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bt_dev_wake_pin: bt-dev-wake-state {</div><div class='add'>+		pins = "gpio96";</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> 		drive-strength = &lt;2&gt;;</div><div class='ctx'> 		bias-disable;</div><div class='hunk'>@@ -673,33 +167,11 @@</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	bt_dev_wake_pin: bt-dev-wake-state {</div><div class='del'>-		pins = "gpio96";</div><div class='add'>+	lcd_backlight_en_pin_a: lcd-backlight-vddio-state {</div><div class='add'>+		pins = "gpio69";</div><div class='ctx'> 		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='add'>+		drive-strength = &lt;10&gt;;</div><div class='add'>+		output-low;</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;usb {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;usb_hs1_phy&gt;;</div><div class='del'>-	phy-select = &lt;&amp;tcsr 0xb000 0&gt;;</div><div class='del'>-	extcon = &lt;&amp;smbb&gt;, &lt;&amp;usb_id&gt;;</div><div class='del'>-	vbus-supply = &lt;&amp;chg_otg&gt;;</div><div class='del'>-</div><div class='del'>-	hnp-disable;</div><div class='del'>-	srp-disable;</div><div class='del'>-	adp-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_hs1_phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	v1p8-supply = &lt;&amp;pm8941_l6&gt;;</div><div class='del'>-	v3p3-supply = &lt;&amp;pm8941_l24&gt;;</div><div class='del'>-</div><div class='del'>-	extcon = &lt;&amp;smbb&gt;;</div><div class='del'>-	qcom,init-seq = /bits/ 8 &lt;0x1 0x64&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi<br/>new file mode 100644<br/>index 000000000000..e129bb1bd6ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,539 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "qcom-msm8974pro.dtsi"</div><div class='add'>+#include "pm8841.dtsi"</div><div class='add'>+#include "pm8941.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='add'>+		mmc1 = &amp;sdhc_2;</div><div class='add'>+		serial0 = &amp;blsp1_uart2;</div><div class='add'>+		serial1 = &amp;blsp2_uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_keys_pin_a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "volume_down";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "volume_up";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vsp: lcd-dcdc-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_vsp";</div><div class='add'>+		regulator-min-microvolt = &lt;5600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5600000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8941_gpios 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd_dcdc_en_pin_a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_boost: vreg-boost {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vreg-boost";</div><div class='add'>+		regulator-min-microvolt = &lt;3150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3150000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8941_gpios 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;boost_bypass_n_pin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: vreg-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph-pwr";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wlan: wlan-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "wl-reg";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8941_gpios 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wlan_regulator_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp2_i2c2 {</div><div class='add'>+	clock-frequency = &lt;355000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	synaptics_touchscreen: synaptics@2c {</div><div class='add'>+		compatible = "syna,rmi4-i2c";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+		interrupts = &lt;86 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;pm8941_l22&gt;;</div><div class='add'>+		/* vio-supply is set in dts */</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_int_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		syna,startup-delay-ms = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		rmi4-f01@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			syna,nosleep-mode = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmi4-f11@11 {</div><div class='add'>+			reg = &lt;0x11&gt;;</div><div class='add'>+			syna,sensor-type = &lt;1&gt;;</div><div class='add'>+			touchscreen-inverted-x;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8941_coincell {</div><div class='add'>+	qcom,rset-ohms = &lt;2100&gt;;</div><div class='add'>+	qcom,vset-millivolts = &lt;3000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8941_gpios {</div><div class='add'>+	gpio_keys_pin_a: gpio-keys-active-state {</div><div class='add'>+		pins = "gpio2", "gpio5";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_sleep_clk_pin: wl-sleep-clk-state {</div><div class='add'>+		pins = "gpio17";</div><div class='add'>+		function = "func2";</div><div class='add'>+		output-high;</div><div class='add'>+		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_regulator_pin: wl-reg-active-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state {</div><div class='add'>+		pins = "gpio20";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8941_lpg {</div><div class='add'>+	qcom,power-source = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	multi-led {</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8941_vib {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	cx-supply = &lt;&amp;pm8841_s2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mss {</div><div class='add'>+	cx-supply = &lt;&amp;pm8841_s2&gt;;</div><div class='add'>+	mss-supply = &lt;&amp;pm8841_s3&gt;;</div><div class='add'>+	mx-supply = &lt;&amp;pm8841_s1&gt;;</div><div class='add'>+	pll-supply = &lt;&amp;pm8941_l12&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,rpm-pm8841-regulators";</div><div class='add'>+</div><div class='add'>+		pm8841_s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8841_s2: s2 {</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8841_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8841_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,rpm-pm8941-regulators";</div><div class='add'>+</div><div class='add'>+		vdd_l1_l3-supply = &lt;&amp;pm8941_s1&gt;;</div><div class='add'>+		vdd_l2_lvs1_2_3-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='add'>+		vdd_l4_l11-supply = &lt;&amp;pm8941_s1&gt;;</div><div class='add'>+		vdd_l5_l7-supply = &lt;&amp;pm8941_s2&gt;;</div><div class='add'>+		vdd_l6_l12_l14_l15-supply = &lt;&amp;pm8941_s2&gt;;</div><div class='add'>+		vdd_l9_l10_l17_l22-supply = &lt;&amp;vreg_boost&gt;;</div><div class='add'>+		vdd_l13_l20_l23_l24-supply = &lt;&amp;vreg_boost&gt;;</div><div class='add'>+		vdd_l21-supply = &lt;&amp;vreg_boost&gt;;</div><div class='add'>+</div><div class='add'>+		pm8941_s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_s2: s2 {</div><div class='add'>+			regulator-min-microvolt = &lt;2150000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2150000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-system-load = &lt;154000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l4: l4 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l7: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l13: l13 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l14: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l17: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l18: l18 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l20: l20 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-system-load = &lt;500000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l21: l21 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_l24: l24 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8941_lvs3: lvs3 {};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8941_l20&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc1_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc1_off&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8941_l21&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8941_l13&gt;;</div><div class='add'>+</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 62 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_off&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_3 {</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc3_on&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		brcm,drive-strength = &lt;10&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wlan_sleep_clk_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	sdc1_on: sdc1-on-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "sdc1_clk";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-data-pins {</div><div class='add'>+			pins = "sdc1_cmd", "sdc1_data";</div><div class='add'>+			drive-strength = &lt;10&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_on: sdc2-on-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "sdc2_clk";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-data-pins {</div><div class='add'>+			pins = "sdc2_cmd", "sdc2_data";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cd-pins {</div><div class='add'>+			pins = "gpio62";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc3_on: sdc3-on-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "gpio40";</div><div class='add'>+			function = "sdc3";</div><div class='add'>+			drive-strength = &lt;10&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-pins {</div><div class='add'>+			pins = "gpio39";</div><div class='add'>+			function = "sdc3";</div><div class='add'>+			drive-strength = &lt;10&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		data-pins {</div><div class='add'>+			pins = "gpio35", "gpio36", "gpio37", "gpio38";</div><div class='add'>+			function = "sdc3";</div><div class='add'>+			drive-strength = &lt;10&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_int_pin: ts-int-pin-state {</div><div class='add'>+		pins = "gpio86";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	phys = &lt;&amp;usb_hs1_phy&gt;;</div><div class='add'>+	phy-select = &lt;&amp;tcsr 0xb000 0&gt;;</div><div class='add'>+	extcon = &lt;&amp;smbb&gt;, &lt;&amp;usb_id&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;chg_otg&gt;;</div><div class='add'>+</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_hs1_phy {</div><div class='add'>+	v1p8-supply = &lt;&amp;pm8941_l6&gt;;</div><div class='add'>+	v3p3-supply = &lt;&amp;pm8941_l24&gt;;</div><div class='add'>+</div><div class='add'>+	extcon = &lt;&amp;smbb&gt;;</div><div class='add'>+	qcom,init-seq = /bits/ 8 &lt;0x1 0x64&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts<br/>new file mode 100644<br/>index 000000000000..1ed6e1cc21d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sony Xperia Z3";</div><div class='add'>+	compatible = "sony,xperia-leo", "qcom,msm8974pro", "qcom,msm8974";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		key-camera-snapshot {</div><div class='add'>+			label = "camera_snapshot";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-camera-focus {</div><div class='add'>+			label = "camera_focus";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio_keys_pin_a {</div><div class='add'>+	pins = "gpio2", "gpio3", "gpio4", "gpio5";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smbb {</div><div class='add'>+	usb-charge-current-limit = &lt;1500000&gt;;</div><div class='add'>+	qcom,fast-charge-safe-current = &lt;3000000&gt;;</div><div class='add'>+	qcom,fast-charge-current-limit = &lt;2150000&gt;;</div><div class='add'>+	qcom,fast-charge-safe-voltage = &lt;4400000&gt;;</div><div class='add'>+	qcom,fast-charge-high-threshold-voltage = &lt;4350000&gt;;</div><div class='add'>+	qcom,auto-recharge-threshold-voltage = &lt;4280000&gt;;</div><div class='add'>+	qcom,minimum-input-voltage = &lt;4200000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;synaptics_touchscreen {</div><div class='add'>+	vio-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi<br/>index edc9aaf828c8..68fa5859d263 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/qcom/qcom-sdx55.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/qcom/qcom-sdx55.dtsi</a></div><div class='hunk'>@@ -378,6 +378,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie_ep: pcie-ep@1c00000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/renesas/r7s72100.dtsi<br/>index e6d8da6faffb..08ea4c551ed0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r7s72100.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r7s72100.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r7s72100.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r7s72100.dtsi</a></div><div class='hunk'>@@ -125,6 +125,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF0&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -138,6 +139,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF1&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -151,6 +153,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF2&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -164,6 +167,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF3&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -177,6 +181,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF4&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -190,6 +195,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF5&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -203,6 +209,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF6&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='hunk'>@@ -216,6 +223,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri";</div><div class='ctx'> 			clocks = &lt;&amp;mstp4_clks R7S72100_CLK_SCIF7&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi<br/>index ac654ff45d0e..9a2ae282a46b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a73a4.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a73a4.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a73a4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a73a4.dtsi</a></div><div class='hunk'>@@ -60,6 +60,32 @@</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	tmu0: timer@e61e0000 {</div><div class='add'>+		compatible = "renesas,tmu-r8a73a4", "renesas,tmu";</div><div class='add'>+		reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+		clocks = &lt;&amp;mstp1_clks R8A73A4_CLK_TMU0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;pd_c5&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tmu3: timer@fff80000 {</div><div class='add'>+		compatible = "renesas,tmu-r8a73a4", "renesas,tmu";</div><div class='add'>+		reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+		clocks = &lt;&amp;mstp1_clks R8A73A4_CLK_TMU3&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;pd_a3r&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	dbsc1: memory-controller@e6790000 {</div><div class='ctx'> 		compatible = "renesas,dbsc-r8a73a4";</div><div class='ctx'> 		reg = &lt;0 0xe6790000 0 0x10000&gt;;</div><div class='hunk'>@@ -654,6 +680,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* Gate clocks */</div><div class='add'>+		mstp1_clks: mstp1_clks@e6150134 {</div><div class='add'>+			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='add'>+			reg = &lt;0 0xe6150134 0 4&gt;, &lt;0 0xe6150038 0 4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cp_clk&gt;, &lt;&amp;mp_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-indices = &lt;</div><div class='add'>+				R8A73A4_CLK_TMU0 R8A73A4_CLK_TMU3</div><div class='add'>+			&gt;;</div><div class='add'>+			clock-output-names =</div><div class='add'>+				"tmu0", "tmu3";</div><div class='add'>+		};</div><div class='ctx'> 		mstp2_clks: mstp2_clks@e6150138 {</div><div class='ctx'> 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";</div><div class='ctx'> 			reg = &lt;0 0xe6150138 0 4&gt;, &lt;0 0xe6150040 0 4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7742.dtsi b/arch/arm/boot/dts/renesas/r8a7742.dtsi<br/>index 16d146db824a..d55c344c1cd2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7742.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7742.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7742.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7742.dtsi</a></div><div class='hunk'>@@ -404,6 +404,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7742", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7742_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7742", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7742_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7742", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7742_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7742", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7742_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		thermal: thermal@e61f0000 {</div><div class='ctx'> 			compatible = "renesas,thermal-r8a7742",</div><div class='ctx'> 				     "renesas,rcar-gen2-thermal";</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7743.dtsi b/arch/arm/boot/dts/renesas/r8a7743.dtsi<br/>index 2245d19a23bb..d917c0a971f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7743.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7743.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7743.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7743.dtsi</a></div><div class='hunk'>@@ -329,6 +329,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7743", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7743_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7743", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7743_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7743", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7743_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7743", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7743_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		thermal: thermal@e61f0000 {</div><div class='ctx'> 			compatible = "renesas,thermal-r8a7743",</div><div class='ctx'> 				     "renesas,rcar-gen2-thermal";</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7744.dtsi b/arch/arm/boot/dts/renesas/r8a7744.dtsi<br/>index aa13841f9781..754859c38a93 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7744.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7744.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7744.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7744.dtsi</a></div><div class='hunk'>@@ -329,6 +329,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7744", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7744_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7744", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7744_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7744", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7744_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7744", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7744_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		thermal: thermal@e61f0000 {</div><div class='ctx'> 			compatible = "renesas,thermal-r8a7744",</div><div class='ctx'> 				     "renesas,rcar-gen2-thermal";</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7745.dtsi b/arch/arm/boot/dts/renesas/r8a7745.dtsi<br/>index 44688b8431c3..168298300490 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7745.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7745.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7745.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7745.dtsi</a></div><div class='hunk'>@@ -304,6 +304,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7745", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7745_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7745", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7745_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7745", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7745_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7745", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7745_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ipmmu_sy0: iommu@e6280000 {</div><div class='ctx'> 			compatible = "renesas,ipmmu-r8a7745",</div><div class='ctx'> 				     "renesas,ipmmu-vmsa";</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a77470.dtsi b/arch/arm/boot/dts/renesas/r8a77470.dtsi<br/>index a5cf663a0118..2375438d83c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a77470.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a77470.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a77470.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a77470.dtsi</a></div><div class='hunk'>@@ -241,6 +241,50 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a77470", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a77470", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a77470", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icram0:	sram@e63a0000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0 0xe63a0000 0 0x12000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi<br/>index 46fb81f5062f..583b74a9f071 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7790.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7790.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7790.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7790.dtsi</a></div><div class='hunk'>@@ -434,6 +434,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		thermal: thermal@e61f0000 {</div><div class='ctx'> 			compatible = "renesas,thermal-r8a7790",</div><div class='ctx'> 				     "renesas,rcar-gen2-thermal",</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi<br/>index b9d34147628e..de08ceb62230 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7791.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7791.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7791.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7791.dtsi</a></div><div class='hunk'>@@ -351,6 +351,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		thermal: thermal@e61f0000 {</div><div class='ctx'> 			compatible = "renesas,thermal-r8a7791",</div><div class='ctx'> 				     "renesas,rcar-gen2-thermal",</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi<br/>index ecfab3ff59e8..7defeb8e4cd1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7792.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7792.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7792.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7792.dtsi</a></div><div class='hunk'>@@ -351,6 +351,65 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7792_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7792_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7792_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7792_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icram0:	sram@e63a0000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0 0xe63a0000 0 0x12000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi<br/>index f51bf687f4bd..d32a9d5d3faa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7793.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7793.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7793.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7793.dtsi</a></div><div class='hunk'>@@ -326,6 +326,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7793_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7793_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7793_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7793_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		thermal: thermal@e61f0000 {</div><div class='ctx'> 			compatible = "renesas,thermal-r8a7793",</div><div class='ctx'> 				     "renesas,rcar-gen2-thermal",</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi<br/>index 371dd4715dde..f37f094cecc8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7794.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r8a7794.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r8a7794.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r8a7794.dtsi</a></div><div class='hunk'>@@ -292,6 +292,64 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 407&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 125&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7794_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 125&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@fff60000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff60000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 111&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7794_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 111&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@fff70000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff70000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 122&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7794_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 122&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@fff80000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xfff80000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 121&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A7794_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 121&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ipmmu_sy0: iommu@e6280000 {</div><div class='ctx'> 			compatible = "renesas,ipmmu-r8a7794",</div><div class='ctx'> 				     "renesas,ipmmu-vmsa";</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi<br/>index fa63e1afc4ef..45f60eeeaaa1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r9a06g032.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/renesas/r9a06g032.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/renesas/r9a06g032.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/renesas/r9a06g032.dtsi</a></div><div class='hunk'>@@ -319,7 +319,6 @@</div><div class='ctx'> 		gmac2: ethernet@44002000 {</div><div class='ctx'> 			compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";</div><div class='ctx'> 			reg = &lt;0x44002000 0x2000&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos3250.dtsi b/arch/arm/boot/dts/samsung/exynos3250.dtsi<br/>index 3f1015edab43..b6c3826a9424 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos3250.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos3250.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos3250.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos3250.dtsi</a></div><div class='hunk'>@@ -826,6 +826,7 @@</div><div class='ctx'> 			samsung,spi-src-clk = &lt;0&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;256&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -842,6 +843,7 @@</div><div class='ctx'> 			samsung,spi-src-clk = &lt;0&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4.dtsi b/arch/arm/boot/dts/samsung/exynos4.dtsi<br/>index 7f981b5c0d64..ed47d0ce04e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos4.dtsi</a></div><div class='hunk'>@@ -621,6 +621,7 @@</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;256&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -636,6 +637,7 @@</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -651,6 +653,7 @@</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi2_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts b/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts<br/>index b566f878ed84..18f4f494093b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> &amp;keypad {</div><div class='ctx'> 	samsung,keypad-num-rows = &lt;2&gt;;</div><div class='ctx'> 	samsung,keypad-num-columns = &lt;8&gt;;</div><div class='del'>-	linux,keypad-no-autorepeat;</div><div class='add'>+	linux,input-no-autorepeat;</div><div class='ctx'> 	wakeup-source;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi<br/>index e5254e32aa8f..9bc05961577d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi</a></div><div class='hunk'>@@ -45,6 +45,12 @@</div><div class='ctx'> 		/* Default S-BOOT bootloader loads initramfs here */</div><div class='ctx'> 		linux,initrd-start = &lt;0x42000000&gt;;</div><div class='ctx'> 		linux,initrd-end = &lt;0x42800000&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Stock bootloader provides incorrect memory size in ATAG_MEM;</div><div class='add'>+		 * override it here</div><div class='add'>+		 */</div><div class='add'>+		linux,usable-memory-range = &lt;0x40000000 0x3fc00000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	firmware@204f000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4412-origen.dts b/arch/arm/boot/dts/samsung/exynos4412-origen.dts<br/>index 23b151645d66..10ab7bc90f50 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4412-origen.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4412-origen.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4412-origen.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos4412-origen.dts</a></div><div class='hunk'>@@ -453,7 +453,7 @@</div><div class='ctx'> &amp;keypad {</div><div class='ctx'> 	samsung,keypad-num-rows = &lt;3&gt;;</div><div class='ctx'> 	samsung,keypad-num-columns = &lt;2&gt;;</div><div class='del'>-	linux,keypad-no-autorepeat;</div><div class='add'>+	linux,input-no-autorepeat;</div><div class='ctx'> 	wakeup-source;</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts b/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts<br/>index 715dfcba1417..c83fb250e664 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts</a></div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> &amp;keypad {</div><div class='ctx'> 	samsung,keypad-num-rows = &lt;3&gt;;</div><div class='ctx'> 	samsung,keypad-num-columns = &lt;8&gt;;</div><div class='del'>-	linux,keypad-no-autorepeat;</div><div class='add'>+	linux,input-no-autorepeat;</div><div class='ctx'> 	wakeup-source;</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;keypad_rows &amp;keypad_cols&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -105,31 +105,31 @@</div><div class='ctx'> 		linux,code = &lt;6&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	key-A {</div><div class='add'>+	key-a {</div><div class='ctx'> 		keypad,row = &lt;2&gt;;</div><div class='ctx'> 		keypad,column = &lt;6&gt;;</div><div class='ctx'> 		linux,code = &lt;30&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	key-B {</div><div class='add'>+	key-b {</div><div class='ctx'> 		keypad,row = &lt;2&gt;;</div><div class='ctx'> 		keypad,column = &lt;7&gt;;</div><div class='ctx'> 		linux,code = &lt;48&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	key-C {</div><div class='add'>+	key-c {</div><div class='ctx'> 		keypad,row = &lt;0&gt;;</div><div class='ctx'> 		keypad,column = &lt;5&gt;;</div><div class='ctx'> 		linux,code = &lt;46&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	key-D {</div><div class='add'>+	key-d {</div><div class='ctx'> 		keypad,row = &lt;2&gt;;</div><div class='ctx'> 		keypad,column = &lt;5&gt;;</div><div class='ctx'> 		linux,code = &lt;32&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	key-E {</div><div class='add'>+	key-e {</div><div class='ctx'> 		keypad,row = &lt;0&gt;;</div><div class='ctx'> 		keypad,column = &lt;7&gt;;</div><div class='ctx'> 		linux,code = &lt;18&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos5250.dtsi b/arch/arm/boot/dts/samsung/exynos5250.dtsi<br/>index 99c84bebf25a..b9e7c4938818 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos5250.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos5250.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos5250.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos5250.dtsi</a></div><div class='hunk'>@@ -511,6 +511,7 @@</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;256&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spi_1: spi@12d30000 {</div><div class='hunk'>@@ -526,6 +527,7 @@</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spi_2: spi@12d40000 {</div><div class='hunk'>@@ -541,6 +543,7 @@</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi2_bus&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc_0: mmc@12200000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos5420.dtsi b/arch/arm/boot/dts/samsung/exynos5420.dtsi<br/>index 25ed90374679..196c6d04675a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos5420.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos5420.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos5420.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos5420.dtsi</a></div><div class='hunk'>@@ -658,6 +658,7 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clock CLK_SPI0&gt;, &lt;&amp;clock CLK_SCLK_SPI0&gt;;</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='add'>+			fifo-depth = &lt;256&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -674,6 +675,7 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clock CLK_SPI1&gt;, &lt;&amp;clock CLK_SCLK_SPI1&gt;;</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -690,6 +692,7 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi2_bus&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clock CLK_SPI2&gt;, &lt;&amp;clock CLK_SCLK_SPI2&gt;;</div><div class='ctx'> 			clock-names = "spi", "spi_busclk0";</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts<br/>index 9bbbdce9103a..bb019868b996 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts</a></div><div class='hunk'>@@ -185,7 +185,7 @@</div><div class='ctx'> 	samsung,color-depth = &lt;1&gt;;</div><div class='ctx'> 	samsung,link-rate = &lt;0x0a&gt;;</div><div class='ctx'> 	samsung,lane-count = &lt;2&gt;;</div><div class='del'>-	samsung,hpd-gpio = &lt;&amp;gpx2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	hpd-gpios = &lt;&amp;gpx2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='ctx'> 		port {</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi<br/>index ed560c9a3aa1..34e8a3d5efa5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/s5pv210.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/samsung/s5pv210.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/samsung/s5pv210.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/samsung/s5pv210.dtsi</a></div><div class='hunk'>@@ -72,7 +72,7 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		onenand: onenand@b0600000 {</div><div class='add'>+		onenand: nand-controller@b0600000 {</div><div class='ctx'> 			compatible = "samsung,s5pv210-onenand";</div><div class='ctx'> 			reg = &lt;0xb0600000 0x2000&gt;,</div><div class='ctx'> 				&lt;0xb0000000 0x20000&gt;,</div><div class='hunk'>@@ -82,7 +82,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;clocks CLK_NANDXL&gt;, &lt;&amp;clocks DOUT_FLASH&gt;;</div><div class='ctx'> 			clock-names = "bus", "onenand";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -161,6 +161,7 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			fifo-depth = &lt;256&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -177,6 +178,7 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi<br/>index 65c72b6fcc83..2537b3d47e6f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32f746.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32f746.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32f746.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32f746.dtsi</a></div><div class='hunk'>@@ -257,23 +257,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		can3: can@40003400 {</div><div class='del'>-			compatible = "st,stm32f4-bxcan";</div><div class='del'>-			reg = &lt;0x40003400 0x200&gt;;</div><div class='del'>-			interrupts = &lt;104&gt;, &lt;105&gt;, &lt;106&gt;, &lt;107&gt;;</div><div class='del'>-			interrupt-names = "tx", "rx0", "rx1", "sce";</div><div class='del'>-			resets = &lt;&amp;rcc STM32F7_APB1_RESET(CAN3)&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc 0 STM32F7_APB1_CLOCK(CAN3)&gt;;</div><div class='del'>-			st,gcan = &lt;&amp;gcan3&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gcan3: gcan@40003600 {</div><div class='del'>-			compatible = "st,stm32f4-gcan", "syscon";</div><div class='del'>-			reg = &lt;0x40003600 0x200&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc 0 STM32F7_APB1_CLOCK(CAN3)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		spi2: spi@40003800 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32f769.dtsi b/arch/arm/boot/dts/st/stm32f769.dtsi<br/>index 4e7d9032149c..e8cbb99e81a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32f769.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32f769.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32f769.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32f769.dtsi</a></div><div class='hunk'>@@ -7,6 +7,23 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	soc {</div><div class='add'>+		can3: can@40003400 {</div><div class='add'>+			compatible = "st,stm32f4-bxcan";</div><div class='add'>+			reg = &lt;0x40003400 0x200&gt;;</div><div class='add'>+			interrupts = &lt;104&gt;, &lt;105&gt;, &lt;106&gt;, &lt;107&gt;;</div><div class='add'>+			interrupt-names = "tx", "rx0", "rx1", "sce";</div><div class='add'>+			resets = &lt;&amp;rcc STM32F7_APB1_RESET(CAN3)&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc 0 STM32F7_APB1_CLOCK(CAN3)&gt;;</div><div class='add'>+			st,gcan = &lt;&amp;gcan3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gcan3: gcan@40003600 {</div><div class='add'>+			compatible = "st,stm32f4-gcan", "syscon";</div><div class='add'>+			reg = &lt;0x40003600 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc 0 STM32F7_APB1_CLOCK(CAN3)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		dsi: dsi@40016c00 {</div><div class='ctx'> 			compatible = "st,stm32-dsi";</div><div class='ctx'> 			reg = &lt;0x40016c00 0x800&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi<br/>index 27e0c3826789..32c5d8a1e06a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi</a></div><div class='hunk'>@@ -47,6 +47,63 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ltdc_pins_a: ltdc-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D',  9, AF13)&gt;, /* LCD_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('C',  6, AF14)&gt;, /* LCD_HSYNC */</div><div class='add'>+				 &lt;STM32_PINMUX('G',  4, AF11)&gt;, /* LCD_VSYNC */</div><div class='add'>+				 &lt;STM32_PINMUX('H',  9, AF11)&gt;, /* LCD_DE */</div><div class='add'>+				 &lt;STM32_PINMUX('G',  7, AF14)&gt;, /* LCD_R2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 12, AF13)&gt;, /* LCD_R3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 14, AF14)&gt;, /* LCD_R4 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',  7, AF14)&gt;, /* LCD_R5 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 13, AF14)&gt;, /* LCD_R6 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',  9, AF14)&gt;, /* LCD_R7 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 13, AF14)&gt;, /* LCD_G2 */</div><div class='add'>+				 &lt;STM32_PINMUX('F',  3, AF14)&gt;, /* LCD_G3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D',  5, AF14)&gt;, /* LCD_G4 */</div><div class='add'>+				 &lt;STM32_PINMUX('G',  0, AF14)&gt;, /* LCD_G5 */</div><div class='add'>+				 &lt;STM32_PINMUX('C',  7, AF14)&gt;, /* LCD_G6 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 15, AF11)&gt;, /* LCD_G7 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 10, AF14)&gt;, /* LCD_B2 */</div><div class='add'>+				 &lt;STM32_PINMUX('F',  2, AF14)&gt;, /* LCD_B3 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 14, AF11)&gt;, /* LCD_B4 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',  0, AF14)&gt;, /* LCD_B5 */</div><div class='add'>+				 &lt;STM32_PINMUX('B',  6, AF7)&gt;,  /* LCD_B6 */</div><div class='add'>+				 &lt;STM32_PINMUX('F',  1, AF13)&gt;; /* LCD_B7 */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ltdc_sleep_pins_a: ltdc-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D',  9, ANALOG)&gt;, /* LCD_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('C',  6, ANALOG)&gt;, /* LCD_HSYNC */</div><div class='add'>+				 &lt;STM32_PINMUX('G',  4, ANALOG)&gt;, /* LCD_VSYNC */</div><div class='add'>+				 &lt;STM32_PINMUX('H',  9, ANALOG)&gt;, /* LCD_DE */</div><div class='add'>+				 &lt;STM32_PINMUX('G',  7, ANALOG)&gt;, /* LCD_R2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 12, ANALOG)&gt;, /* LCD_R3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 14, ANALOG)&gt;, /* LCD_R4 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',  7, ANALOG)&gt;, /* LCD_R5 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 13, ANALOG)&gt;, /* LCD_R6 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',  9, ANALOG)&gt;, /* LCD_R7 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 13, ANALOG)&gt;, /* LCD_G2 */</div><div class='add'>+				 &lt;STM32_PINMUX('F',  3, ANALOG)&gt;, /* LCD_G3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D',  5, ANALOG)&gt;, /* LCD_G4 */</div><div class='add'>+				 &lt;STM32_PINMUX('G',  0, ANALOG)&gt;, /* LCD_G5 */</div><div class='add'>+				 &lt;STM32_PINMUX('C',  7, ANALOG)&gt;, /* LCD_G6 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 15, ANALOG)&gt;, /* LCD_G7 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 10, ANALOG)&gt;, /* LCD_B2 */</div><div class='add'>+				 &lt;STM32_PINMUX('F',  2, ANALOG)&gt;, /* LCD_B3 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 14, ANALOG)&gt;, /* LCD_B4 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',  0, ANALOG)&gt;, /* LCD_B5 */</div><div class='add'>+				 &lt;STM32_PINMUX('B',  6, ANALOG)&gt;, /* LCD_B6 */</div><div class='add'>+				 &lt;STM32_PINMUX('F',  1, ANALOG)&gt;; /* LCD_B7 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mcp23017_pins_a: mcp23017-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('G', 12, GPIO)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi<br/>index 3900f32da797..6704ceef284d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp131.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp131.dtsi</a></div><div class='hunk'>@@ -745,340 +745,6 @@</div><div class='ctx'> 			dma-channels = &lt;16&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		adc_2: adc@48004000 {</div><div class='del'>-			compatible = "st,stm32mp13-adc-core";</div><div class='del'>-			reg = &lt;0x48004000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc ADC2&gt;, &lt;&amp;rcc ADC2_K&gt;;</div><div class='del'>-			clock-names = "bus", "adc";</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			adc2: adc@0 {</div><div class='del'>-				compatible = "st,stm32mp13-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x0&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;adc_2&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 10 0x400 0x80000001&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				channel@13 {</div><div class='del'>-					reg = &lt;13&gt;;</div><div class='del'>-					label = "vrefint";</div><div class='del'>-				};</div><div class='del'>-				channel@14 {</div><div class='del'>-					reg = &lt;14&gt;;</div><div class='del'>-					label = "vddcore";</div><div class='del'>-				};</div><div class='del'>-				channel@16 {</div><div class='del'>-					reg = &lt;16&gt;;</div><div class='del'>-					label = "vddcpu";</div><div class='del'>-				};</div><div class='del'>-				channel@17 {</div><div class='del'>-					reg = &lt;17&gt;;</div><div class='del'>-					label = "vddq_ddr";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbotg_hs: usb@49000000 {</div><div class='del'>-			compatible = "st,stm32mp15-hsotg", "snps,dwc2";</div><div class='del'>-			reg = &lt;0x49000000 0x40000&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USBO_K&gt;;</div><div class='del'>-			clock-names = "otg";</div><div class='del'>-			resets = &lt;&amp;rcc USBO_R&gt;;</div><div class='del'>-			reset-names = "dwc2";</div><div class='del'>-			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			g-rx-fifo-size = &lt;512&gt;;</div><div class='del'>-			g-np-tx-fifo-size = &lt;32&gt;;</div><div class='del'>-			g-tx-fifo-size = &lt;256 16 16 16 16 16 16 16&gt;;</div><div class='del'>-			dr_mode = "otg";</div><div class='del'>-			otg-rev = &lt;0x200&gt;;</div><div class='del'>-			usb33d-supply = &lt;&amp;scmi_usb33&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usart1: serial@4c000000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x4c000000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USART1_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc USART1_R&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 41 0x400 0x5&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 42 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usart2: serial@4c001000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x4c001000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USART2_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc USART2_R&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 43 0x400 0x5&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 44 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2s4: audio-controller@4c002000 {</div><div class='del'>-			compatible = "st,stm32h7-i2s";</div><div class='del'>-			reg = &lt;0x4c002000 0x400&gt;;</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 83 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 84 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi4: spi@4c002000 {</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x4c002000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI4_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 83 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 84 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi5: spi@4c003000 {</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x4c003000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI5_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 85 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 86 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c3: i2c@4c004000 {</div><div class='del'>-			compatible = "st,stm32mp13-i2c";</div><div class='del'>-			reg = &lt;0x4c004000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C3_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C3_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 73 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 74 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x4&gt;;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c4: i2c@4c005000 {</div><div class='del'>-			compatible = "st,stm32mp13-i2c";</div><div class='del'>-			reg = &lt;0x4c005000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C4_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C4_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 75 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 76 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x8&gt;;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c5: i2c@4c006000 {</div><div class='del'>-			compatible = "st,stm32mp13-i2c";</div><div class='del'>-			reg = &lt;0x4c006000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C5_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C5_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 115 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 116 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x10&gt;;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers12: timer@4c007000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x4c007000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM12_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@11 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;11&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers13: timer@4c008000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x4c008000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM13_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@12 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;12&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers14: timer@4c009000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x4c009000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM14_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@13 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;13&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers15: timer@4c00a000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x4c00a000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM15_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 105 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 106 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 107 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 108 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "up", "trig", "com";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@14 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;14&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers16: timer@4c00b000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x4c00b000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM16_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 109 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 110 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@15 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;15&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers17: timer@4c00c000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x4c00c000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM17_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 111 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 112 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@16 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;16&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		rcc: rcc@50000000 {</div><div class='ctx'> 			compatible = "st,stm32mp13-rcc", "syscon";</div><div class='ctx'> 			reg = &lt;0x50000000 0x1000&gt;;</div><div class='hunk'>@@ -1092,80 +758,113 @@</div><div class='ctx'> 				 &lt;&amp;scmi_clk CK_SCMI_LSI&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		exti: interrupt-controller@5000d000 {</div><div class='del'>-			compatible = "st,stm32mp13-exti", "syscon";</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			reg = &lt;0x5000d000 0x400&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		syscfg: syscon@50020000 {</div><div class='del'>-			compatible = "st,stm32mp157-syscfg", "syscon";</div><div class='del'>-			reg = &lt;0x50020000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SYSCFG&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lptimer2: timer@50021000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x50021000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM2_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='add'>+		pwr_regulators: pwr@50001000 {</div><div class='add'>+			compatible = "st,stm32mp1,pwr-reg";</div><div class='add'>+			reg = &lt;0x50001000 0x10&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			trigger@1 {</div><div class='del'>-				compatible = "st,stm32-lptimer-trigger";</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='add'>+			reg11: reg11 {</div><div class='add'>+				regulator-name = "reg11";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-lptimer-counter";</div><div class='del'>-				status = "disabled";</div><div class='add'>+			reg18: reg18 {</div><div class='add'>+				regulator-name = "reg18";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			timer {</div><div class='del'>-				compatible = "st,stm32-lptimer-timer";</div><div class='del'>-				status = "disabled";</div><div class='add'>+			usb33: usb33 {</div><div class='add'>+				regulator-name = "usb33";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		lptimer3: timer@50022000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x50022000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM3_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			trigger@2 {</div><div class='del'>-				compatible = "st,stm32-lptimer-trigger";</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='add'>+		exti: interrupt-controller@5000d000 {</div><div class='add'>+			compatible = "st,stm32mp1-exti", "syscon";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x5000d000 0x400&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;intc GIC_SPI 6   IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_0 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 7   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 8   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 9   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 10  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 24  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 65  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 66  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 67  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 68  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 41  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_10 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 43  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 77  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 78  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 1   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 3   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_20 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 32  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 34  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 73  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 93  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 38  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 39  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 40  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 72  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 53  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_30 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 54  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 83  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 84  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_40 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 96  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_50 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_60 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 63  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 98  IRQ_TYPE_LEVEL_HIGH&gt;;	/* EXTI_70 */</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-			timer {</div><div class='del'>-				compatible = "st,stm32-lptimer-timer";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='add'>+		syscfg: syscon@50020000 {</div><div class='add'>+			compatible = "st,stm32mp157-syscfg", "syscon";</div><div class='add'>+			reg = &lt;0x50020000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc SYSCFG&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		lptimer4: timer@50023000 {</div><div class='hunk'>@@ -1210,25 +909,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		hash: hash@54003000 {</div><div class='del'>-			compatible = "st,stm32mp13-hash";</div><div class='del'>-			reg = &lt;0x54003000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc HASH1&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc HASH1_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;mdma 30 0x2 0x1000a02 0x0 0x0&gt;;</div><div class='del'>-			dma-names = "in";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rng: rng@54004000 {</div><div class='del'>-			compatible = "st,stm32mp13-rng";</div><div class='del'>-			reg = &lt;0x54004000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc RNG1_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc RNG1_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		mdma: dma-controller@58000000 {</div><div class='ctx'> 			compatible = "st,stm32h7-mdma";</div><div class='ctx'> 			reg = &lt;0x58000000 0x1000&gt;;</div><div class='hunk'>@@ -1239,82 +919,6 @@</div><div class='ctx'> 			dma-requests = &lt;48&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		fmc: memory-controller@58002000 {</div><div class='del'>-			compatible = "st,stm32mp1-fmc2-ebi";</div><div class='del'>-			reg = &lt;0x58002000 0x1000&gt;;</div><div class='del'>-			ranges = &lt;0 0 0x60000000 0x04000000&gt;, /* EBI CS 1 */</div><div class='del'>-				 &lt;1 0 0x64000000 0x04000000&gt;, /* EBI CS 2 */</div><div class='del'>-				 &lt;2 0 0x68000000 0x04000000&gt;, /* EBI CS 3 */</div><div class='del'>-				 &lt;3 0 0x6c000000 0x04000000&gt;, /* EBI CS 4 */</div><div class='del'>-				 &lt;4 0 0x80000000 0x10000000&gt;; /* NAND */</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc FMC_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc FMC_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			nand-controller@4,0 {</div><div class='del'>-				compatible = "st,stm32mp1-fmc2-nfc";</div><div class='del'>-				reg = &lt;4 0x00000000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x08010000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x08020000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x01000000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x09010000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x09020000 0x1000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;mdma 24 0x2 0x12000a02 0x0 0x0&gt;,</div><div class='del'>-				       &lt;&amp;mdma 24 0x2 0x12000a08 0x0 0x0&gt;,</div><div class='del'>-				       &lt;&amp;mdma 25 0x2 0x12000a0a 0x0 0x0&gt;;</div><div class='del'>-				dma-names = "tx", "rx", "ecc";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qspi: spi@58003000 {</div><div class='del'>-			compatible = "st,stm32f469-qspi";</div><div class='del'>-			reg = &lt;0x58003000 0x1000&gt;, &lt;0x70000000 0x10000000&gt;;</div><div class='del'>-			reg-names = "qspi", "qspi_mm";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;mdma 26 0x2 0x10100002 0x0 0x0&gt;,</div><div class='del'>-			       &lt;&amp;mdma 26 0x2 0x10100008 0x0 0x0&gt;;</div><div class='del'>-			dma-names = "tx", "rx";</div><div class='del'>-			clocks = &lt;&amp;rcc QSPI_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc QSPI_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdmmc1: mmc@58005000 {</div><div class='del'>-			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='del'>-			arm,primecell-periphid = &lt;0x20253180&gt;;</div><div class='del'>-			reg = &lt;0x58005000 0x1000&gt;, &lt;0x58006000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SDMMC1_K&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			resets = &lt;&amp;rcc SDMMC1_R&gt;;</div><div class='del'>-			cap-sd-highspeed;</div><div class='del'>-			cap-mmc-highspeed;</div><div class='del'>-			max-frequency = &lt;130000000&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdmmc2: mmc@58007000 {</div><div class='del'>-			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='del'>-			arm,primecell-periphid = &lt;0x20253180&gt;;</div><div class='del'>-			reg = &lt;0x58007000 0x1000&gt;, &lt;0x58008000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SDMMC2_K&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			resets = &lt;&amp;rcc SDMMC2_R&gt;;</div><div class='del'>-			cap-sd-highspeed;</div><div class='del'>-			cap-mmc-highspeed;</div><div class='del'>-			max-frequency = &lt;130000000&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		crc1: crc@58009000 {</div><div class='ctx'> 			compatible = "st,stm32f7-crc";</div><div class='ctx'> 			reg = &lt;0x58009000 0x400&gt;;</div><div class='hunk'>@@ -1349,29 +953,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usbphyc: usbphyc@5a006000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32mp1-usbphyc";</div><div class='del'>-			reg = &lt;0x5a006000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USBPHY_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc USBPHY_R&gt;;</div><div class='del'>-			vdda1v1-supply = &lt;&amp;scmi_reg11&gt;;</div><div class='del'>-			vdda1v8-supply = &lt;&amp;scmi_reg18&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			usbphyc_port0: usb-phy@0 {</div><div class='del'>-				#phy-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usbphyc_port1: usb-phy@1 {</div><div class='del'>-				#phy-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		rtc: rtc@5c004000 {</div><div class='ctx'> 			compatible = "st,stm32mp1-rtc";</div><div class='ctx'> 			reg = &lt;0x5c004000 0x400&gt;;</div><div class='hunk'>@@ -1400,6 +981,555 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		etzpc: bus@5c007000 {</div><div class='add'>+			compatible = "st,stm32-etzpc", "simple-bus";</div><div class='add'>+			reg = &lt;0x5c007000 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			#access-controller-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			adc_2: adc@48004000 {</div><div class='add'>+				compatible = "st,stm32mp13-adc-core";</div><div class='add'>+				reg = &lt;0x48004000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc ADC2&gt;, &lt;&amp;rcc ADC2_K&gt;;</div><div class='add'>+				clock-names = "bus", "adc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 33&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				adc2: adc@0 {</div><div class='add'>+					compatible = "st,stm32mp13-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+					interrupt-parent = &lt;&amp;adc_2&gt;;</div><div class='add'>+					interrupts = &lt;0&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 10 0x400 0x80000001&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+</div><div class='add'>+					channel@13 {</div><div class='add'>+						reg = &lt;13&gt;;</div><div class='add'>+						label = "vrefint";</div><div class='add'>+					};</div><div class='add'>+					channel@14 {</div><div class='add'>+						reg = &lt;14&gt;;</div><div class='add'>+						label = "vddcore";</div><div class='add'>+					};</div><div class='add'>+					channel@16 {</div><div class='add'>+						reg = &lt;16&gt;;</div><div class='add'>+						label = "vddcpu";</div><div class='add'>+					};</div><div class='add'>+					channel@17 {</div><div class='add'>+						reg = &lt;17&gt;;</div><div class='add'>+						label = "vddq_ddr";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbotg_hs: usb@49000000 {</div><div class='add'>+				compatible = "st,stm32mp15-hsotg", "snps,dwc2";</div><div class='add'>+				reg = &lt;0x49000000 0x40000&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USBO_K&gt;;</div><div class='add'>+				clock-names = "otg";</div><div class='add'>+				resets = &lt;&amp;rcc USBO_R&gt;;</div><div class='add'>+				reset-names = "dwc2";</div><div class='add'>+				interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				g-rx-fifo-size = &lt;512&gt;;</div><div class='add'>+				g-np-tx-fifo-size = &lt;32&gt;;</div><div class='add'>+				g-tx-fifo-size = &lt;256 16 16 16 16 16 16 16&gt;;</div><div class='add'>+				dr_mode = "otg";</div><div class='add'>+				otg-rev = &lt;0x200&gt;;</div><div class='add'>+				usb33d-supply = &lt;&amp;scmi_usb33&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 34&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@4c000000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x4c000000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USART1_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc USART1_R&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 41 0x400 0x5&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 42 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@4c001000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x4c001000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USART2_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc USART2_R&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 43 0x400 0x5&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 44 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 17&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s4: audio-controller@4c002000 {</div><div class='add'>+				compatible = "st,stm32h7-i2s";</div><div class='add'>+				reg = &lt;0x4c002000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 83 0x400 0x01&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 84 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 13&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@4c002000 {</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x4c002000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI4_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 83 0x400 0x01&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 84 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 18&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@4c003000 {</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x4c003000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI5_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 85 0x400 0x01&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 86 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 19&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@4c004000 {</div><div class='add'>+				compatible = "st,stm32mp13-i2c";</div><div class='add'>+				reg = &lt;0x4c004000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C3_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C3_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 73 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 74 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x4&gt;;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 20&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@4c005000 {</div><div class='add'>+				compatible = "st,stm32mp13-i2c";</div><div class='add'>+				reg = &lt;0x4c005000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C4_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C4_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 75 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 76 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x8&gt;;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 21&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@4c006000 {</div><div class='add'>+				compatible = "st,stm32mp13-i2c";</div><div class='add'>+				reg = &lt;0x4c006000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C5_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C5_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 115 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 116 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x10&gt;;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 22&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers12: timer@4c007000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x4c007000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM12_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 23&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@11 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;11&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers13: timer@4c008000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x4c008000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM13_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@12 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers14: timer@4c009000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x4c009000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM14_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 25&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@13 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;13&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers15: timer@4c00a000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x4c00a000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM15_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 105 0x400 0x1&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 106 0x400 0x1&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 107 0x400 0x1&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 108 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "up", "trig", "com";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 26&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@14 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;14&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers16: timer@4c00b000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x4c00b000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM16_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 109 0x400 0x1&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 110 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@15 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;15&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers17: timer@4c00c000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x4c00c000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM17_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 111 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 112 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 28&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@16 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;16&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer2: timer@50021000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x50021000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM2_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@1 {</div><div class='add'>+					compatible = "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer3: timer@50022000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x50022000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM3_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@2 {</div><div class='add'>+					compatible = "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hash: hash@54003000 {</div><div class='add'>+				compatible = "st,stm32mp13-hash";</div><div class='add'>+				reg = &lt;0x54003000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc HASH1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc HASH1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;mdma 30 0x2 0x1000a02 0x0 0x0&gt;;</div><div class='add'>+				dma-names = "in";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 41&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rng: rng@54004000 {</div><div class='add'>+				compatible = "st,stm32mp13-rng";</div><div class='add'>+				reg = &lt;0x54004000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc RNG1_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc RNG1_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			fmc: memory-controller@58002000 {</div><div class='add'>+				compatible = "st,stm32mp1-fmc2-ebi";</div><div class='add'>+				reg = &lt;0x58002000 0x1000&gt;;</div><div class='add'>+				ranges = &lt;0 0 0x60000000 0x04000000&gt;, /* EBI CS 1 */</div><div class='add'>+					 &lt;1 0 0x64000000 0x04000000&gt;, /* EBI CS 2 */</div><div class='add'>+					 &lt;2 0 0x68000000 0x04000000&gt;, /* EBI CS 3 */</div><div class='add'>+					 &lt;3 0 0x6c000000 0x04000000&gt;, /* EBI CS 4 */</div><div class='add'>+					 &lt;4 0 0x80000000 0x10000000&gt;; /* NAND */</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc FMC_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc FMC_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 54&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				nand-controller@4,0 {</div><div class='add'>+					compatible = "st,stm32mp1-fmc2-nfc";</div><div class='add'>+					reg = &lt;4 0x00000000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x08010000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x08020000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x01000000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x09010000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x09020000 0x1000&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;mdma 24 0x2 0x12000a02 0x0 0x0&gt;,</div><div class='add'>+					       &lt;&amp;mdma 24 0x2 0x12000a08 0x0 0x0&gt;,</div><div class='add'>+					       &lt;&amp;mdma 25 0x2 0x12000a0a 0x0 0x0&gt;;</div><div class='add'>+					dma-names = "tx", "rx", "ecc";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qspi: spi@58003000 {</div><div class='add'>+				compatible = "st,stm32f469-qspi";</div><div class='add'>+				reg = &lt;0x58003000 0x1000&gt;, &lt;0x70000000 0x10000000&gt;;</div><div class='add'>+				reg-names = "qspi", "qspi_mm";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;mdma 26 0x2 0x10100002 0x0 0x0&gt;,</div><div class='add'>+				       &lt;&amp;mdma 26 0x2 0x10100008 0x0 0x0&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				clocks = &lt;&amp;rcc QSPI_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc QSPI_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 55&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdmmc1: mmc@58005000 {</div><div class='add'>+				compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='add'>+				arm,primecell-periphid = &lt;0x20253180&gt;;</div><div class='add'>+				reg = &lt;0x58005000 0x1000&gt;, &lt;0x58006000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SDMMC1_K&gt;;</div><div class='add'>+				clock-names = "apb_pclk";</div><div class='add'>+				resets = &lt;&amp;rcc SDMMC1_R&gt;;</div><div class='add'>+				cap-sd-highspeed;</div><div class='add'>+				cap-mmc-highspeed;</div><div class='add'>+				max-frequency = &lt;130000000&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 50&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdmmc2: mmc@58007000 {</div><div class='add'>+				compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='add'>+				arm,primecell-periphid = &lt;0x20253180&gt;;</div><div class='add'>+				reg = &lt;0x58007000 0x1000&gt;, &lt;0x58008000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SDMMC2_K&gt;;</div><div class='add'>+				clock-names = "apb_pclk";</div><div class='add'>+				resets = &lt;&amp;rcc SDMMC2_R&gt;;</div><div class='add'>+				cap-sd-highspeed;</div><div class='add'>+				cap-mmc-highspeed;</div><div class='add'>+				max-frequency = &lt;130000000&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 51&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbphyc: usbphyc@5a006000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp1-usbphyc";</div><div class='add'>+				reg = &lt;0x5a006000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USBPHY_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc USBPHY_R&gt;;</div><div class='add'>+				vdda1v1-supply = &lt;&amp;scmi_reg11&gt;;</div><div class='add'>+				vdda1v8-supply = &lt;&amp;scmi_reg18&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 5&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				usbphyc_port0: usb-phy@0 {</div><div class='add'>+					#phy-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usbphyc_port1: usb-phy@1 {</div><div class='add'>+					#phy-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Break node order to solve dependency probe issue between</div><div class='ctx'> 		 * pinctrl and exti.</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi<br/>index df451c3c2a26..3e394c8e58b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp133.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp133.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp133.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp133.dtsi</a></div><div class='hunk'>@@ -33,35 +33,38 @@</div><div class='ctx'> 			bosch,mram-cfg = &lt;0x1400 0 0 32 0 0 2 2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		adc_1: adc@48003000 {</div><div class='del'>-			compatible = "st,stm32mp13-adc-core";</div><div class='del'>-			reg = &lt;0x48003000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc ADC1&gt;, &lt;&amp;rcc ADC1_K&gt;;</div><div class='del'>-			clock-names = "bus", "adc";</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+&amp;etzpc {</div><div class='add'>+	adc_1: adc@48003000 {</div><div class='add'>+		compatible = "st,stm32mp13-adc-core";</div><div class='add'>+		reg = &lt;0x48003000 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc ADC1&gt;, &lt;&amp;rcc ADC1_K&gt;;</div><div class='add'>+		clock-names = "bus", "adc";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		adc1: adc@0 {</div><div class='add'>+			compatible = "st,stm32mp13-adc";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;adc_1&gt;;</div><div class='add'>+			interrupts = &lt;0&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmamux1 9 0x400 0x80000001&gt;;</div><div class='add'>+			dma-names = "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			adc1: adc@0 {</div><div class='del'>-				compatible = "st,stm32mp13-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x0&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;adc_1&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 9 0x400 0x80000001&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				channel@18 {</div><div class='del'>-					reg = &lt;18&gt;;</div><div class='del'>-					label = "vrefint";</div><div class='del'>-				};</div><div class='add'>+			channel@18 {</div><div class='add'>+				reg = &lt;18&gt;;</div><div class='add'>+				label = "vrefint";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi<br/>index 68d32f9f5314..834a4d545fe4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp135.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp135.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp135.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp135.dtsi</a></div><div class='hunk'>@@ -19,5 +19,16 @@</div><div class='ctx'> 			port {</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		ltdc: display-controller@5a001000 {</div><div class='add'>+			compatible = "st,stm32-ltdc";</div><div class='add'>+			reg = &lt;0x5a001000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc LTDC_PX&gt;;</div><div class='add'>+			clock-names = "lcd";</div><div class='add'>+			resets = &lt;&amp;scmi_reset RST_SCMI_LTDC&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts<br/>index 52171214a308..567e53ad285f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp135f-dk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp135f-dk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp135f-dk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp135f-dk.dts</a></div><div class='hunk'>@@ -66,6 +66,46 @@</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	panel_backlight: panel-backlight {</div><div class='add'>+		compatible = "gpio-backlight";</div><div class='add'>+		gpios = &lt;&amp;gpioe 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		default-on;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_rgb: panel-rgb {</div><div class='add'>+		compatible = "rocktech,rk043fn48h";</div><div class='add'>+		enable-gpios = &lt;&amp;gpioi 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		backlight = &lt;&amp;panel_backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;scmi_v3v3_sw&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		width-mm = &lt;105&gt;;</div><div class='add'>+		height-mm = &lt;67&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;10000000&gt;;</div><div class='add'>+			hactive = &lt;480&gt;;</div><div class='add'>+			hback-porch = &lt;43&gt;;</div><div class='add'>+			hfront-porch = &lt;10&gt;;</div><div class='add'>+			hsync-len = &lt;1&gt;;</div><div class='add'>+			hsync-active = &lt;0&gt;;</div><div class='add'>+			vactive = &lt;272&gt;;</div><div class='add'>+			vback-porch = &lt;26&gt;;</div><div class='add'>+			vfront-porch = &lt;4&gt;;</div><div class='add'>+			vsync-len = &lt;10&gt;;</div><div class='add'>+			vsync-active = &lt;0&gt;;</div><div class='add'>+			de-active = &lt;1&gt;;</div><div class='add'>+			pixelclk-active = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_rgb: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ltdc_out_rgb&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;adc_1 {</div><div class='hunk'>@@ -168,6 +208,19 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ltdc {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ltdc_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;ltdc_sleep_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		ltdc_out_rgb: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;panel_in_rgb&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp13xc.dtsi b/arch/arm/boot/dts/st/stm32mp13xc.dtsi<br/>index 4d00e7592882..a8bd5fe6536c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp13xc.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp13xc.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp13xc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp13xc.dtsi</a></div><div class='hunk'>@@ -4,15 +4,14 @@</div><div class='ctx'>  * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	soc {</div><div class='del'>-		cryp: crypto@54002000 {</div><div class='del'>-			compatible = "st,stm32mp1-cryp";</div><div class='del'>-			reg = &lt;0x54002000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+&amp;etzpc {</div><div class='add'>+	cryp: crypto@54002000 {</div><div class='add'>+		compatible = "st,stm32mp1-cryp";</div><div class='add'>+		reg = &lt;0x54002000 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='add'>+		resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 42&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp13xf.dtsi b/arch/arm/boot/dts/st/stm32mp13xf.dtsi<br/>index 4d00e7592882..a8bd5fe6536c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp13xf.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp13xf.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp13xf.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp13xf.dtsi</a></div><div class='hunk'>@@ -4,15 +4,14 @@</div><div class='ctx'>  * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	soc {</div><div class='del'>-		cryp: crypto@54002000 {</div><div class='del'>-			compatible = "st,stm32mp1-cryp";</div><div class='del'>-			reg = &lt;0x54002000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+&amp;etzpc {</div><div class='add'>+	cryp: crypto@54002000 {</div><div class='add'>+		compatible = "st,stm32mp1-cryp";</div><div class='add'>+		reg = &lt;0x54002000 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='add'>+		resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 42&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi<br/>index fa4cbd312e5a..90c5c72c87ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp151.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp151.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp151.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp151.dtsi</a></div><div class='hunk'>@@ -122,1042 +122,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		timers2: timer@40000000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40000000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM2_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 18 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 19 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 20 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 21 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 22 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "ch2", "ch3", "ch4", "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@1 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-timer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers3: timer@40001000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40001000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM3_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 23 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 24 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 25 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 26 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 27 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 28 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@2 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-timer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers4: timer@40002000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40002000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM4_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 29 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 30 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 31 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 32 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "ch2", "ch3", "ch4";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@3 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-timer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers5: timer@40003000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40003000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM5_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 55 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 56 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 57 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 58 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 59 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 60 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@4 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;4&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-timer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers6: timer@40004000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40004000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM6_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 69 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			timer@5 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;5&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers7: timer@40005000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40005000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM7_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 70 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			timer@6 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;6&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers12: timer@40006000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40006000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM12_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@11 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;11&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers13: timer@40007000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40007000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM13_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@12 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;12&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers14: timer@40008000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x40008000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM14_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@13 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;13&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lptimer1: timer@40009000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x40009000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM1_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			trigger@0 {</div><div class='del'>-				compatible = "st,stm32-lptimer-trigger";</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-lptimer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi2: spi@4000b000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x4000b000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI2_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 39 0x400 0x05&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 40 0x400 0x05&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2s2: audio-controller@4000b000 {</div><div class='del'>-			compatible = "st,stm32h7-i2s";</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x4000b000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 39 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 40 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi3: spi@4000c000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x4000c000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI3_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 61 0x400 0x05&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 62 0x400 0x05&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2s3: audio-controller@4000c000 {</div><div class='del'>-			compatible = "st,stm32h7-i2s";</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x4000c000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 61 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 62 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spdifrx: audio-controller@4000d000 {</div><div class='del'>-			compatible = "st,stm32h7-spdifrx";</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x4000d000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPDIF_K&gt;;</div><div class='del'>-			clock-names = "kclk";</div><div class='del'>-			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 93 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 94 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "rx-ctrl";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usart2: serial@4000e000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x4000e000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USART2_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 43 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 44 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usart3: serial@4000f000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x4000f000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USART3_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 45 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 46 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart4: serial@40010000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x40010000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc UART4_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 63 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 64 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart5: serial@40011000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x40011000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc UART5_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 65 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 66 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@40012000 {</div><div class='del'>-			compatible = "st,stm32mp15-i2c";</div><div class='del'>-			reg = &lt;0x40012000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C1_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C1_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x1&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c2: i2c@40013000 {</div><div class='del'>-			compatible = "st,stm32mp15-i2c";</div><div class='del'>-			reg = &lt;0x40013000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C2_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C2_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x2&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c3: i2c@40014000 {</div><div class='del'>-			compatible = "st,stm32mp15-i2c";</div><div class='del'>-			reg = &lt;0x40014000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C3_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C3_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x4&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c5: i2c@40015000 {</div><div class='del'>-			compatible = "st,stm32mp15-i2c";</div><div class='del'>-			reg = &lt;0x40015000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C5_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C5_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x10&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cec: cec@40016000 {</div><div class='del'>-			compatible = "st,stm32-cec";</div><div class='del'>-			reg = &lt;0x40016000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc CEC_K&gt;, &lt;&amp;rcc CEC&gt;;</div><div class='del'>-			clock-names = "cec", "hdmi-cec";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dac: dac@40017000 {</div><div class='del'>-			compatible = "st,stm32h7-dac-core";</div><div class='del'>-			reg = &lt;0x40017000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc DAC12&gt;;</div><div class='del'>-			clock-names = "pclk";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			dac1: dac@1 {</div><div class='del'>-				compatible = "st,stm32-dac";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dac2: dac@2 {</div><div class='del'>-				compatible = "st,stm32-dac";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart7: serial@40018000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x40018000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc UART7_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 79 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 80 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart8: serial@40019000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x40019000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc UART8_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 81 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 82 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers1: timer@44000000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x44000000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM1_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 11 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 12 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 13 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 14 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 15 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 16 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 17 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "ch2", "ch3", "ch4",</div><div class='del'>-				    "up", "trig", "com";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@0 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-timer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers8: timer@44001000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x44001000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM8_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 47 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 48 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 49 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 50 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 51 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 52 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 53 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "ch2", "ch3", "ch4",</div><div class='del'>-				    "up", "trig", "com";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@7 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;7&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-timer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usart6: serial@44003000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x44003000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USART6_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 71 0x400 0x15&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 72 0x400 0x11&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi1: spi@44004000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x44004000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI1_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 37 0x400 0x05&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 38 0x400 0x05&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2s1: audio-controller@44004000 {</div><div class='del'>-			compatible = "st,stm32h7-i2s";</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x44004000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 37 0x400 0x01&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 38 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi4: spi@44005000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x44005000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI4_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 83 0x400 0x05&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 84 0x400 0x05&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers15: timer@44006000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x44006000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM15_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 105 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 106 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 107 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 108 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "up", "trig", "com";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@14 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;14&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers16: timer@44007000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x44007000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM16_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 109 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 110 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-			timer@15 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;15&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		timers17: timer@44008000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-timers";</div><div class='del'>-			reg = &lt;0x44008000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "global";</div><div class='del'>-			clocks = &lt;&amp;rcc TIM17_K&gt;;</div><div class='del'>-			clock-names = "int";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 111 0x400 0x1&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 112 0x400 0x1&gt;;</div><div class='del'>-			dma-names = "ch1", "up";</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			timer@16 {</div><div class='del'>-				compatible = "st,stm32h7-timer-trigger";</div><div class='del'>-				reg = &lt;16&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi5: spi@44009000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x44009000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI5_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmamux1 85 0x400 0x05&gt;,</div><div class='del'>-			       &lt;&amp;dmamux1 86 0x400 0x05&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sai1: sai@4400a000 {</div><div class='del'>-			compatible = "st,stm32h7-sai";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0 0x4400a000 0x400&gt;;</div><div class='del'>-			reg = &lt;0x4400a000 0x4&gt;, &lt;0x4400a3f0 0x10&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SAI1_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			sai1a: audio-controller@4400a004 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				compatible = "st,stm32-sai-sub-a";</div><div class='del'>-				reg = &lt;0x4 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI1_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 87 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai1b: audio-controller@4400a024 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-b";</div><div class='del'>-				reg = &lt;0x24 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI1_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 88 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sai2: sai@4400b000 {</div><div class='del'>-			compatible = "st,stm32h7-sai";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0 0x4400b000 0x400&gt;;</div><div class='del'>-			reg = &lt;0x4400b000 0x4&gt;, &lt;0x4400b3f0 0x10&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SAI2_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			sai2a: audio-controller@4400b004 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-a";</div><div class='del'>-				reg = &lt;0x4 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI2_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 89 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai2b: audio-controller@4400b024 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-b";</div><div class='del'>-				reg = &lt;0x24 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI2_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 90 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sai3: sai@4400c000 {</div><div class='del'>-			compatible = "st,stm32h7-sai";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0 0x4400c000 0x400&gt;;</div><div class='del'>-			reg = &lt;0x4400c000 0x4&gt;, &lt;0x4400c3f0 0x10&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SAI3_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			sai3a: audio-controller@4400c004 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-a";</div><div class='del'>-				reg = &lt;0x04 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI3_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 113 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai3b: audio-controller@4400c024 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-b";</div><div class='del'>-				reg = &lt;0x24 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI3_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 114 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dfsdm: dfsdm@4400d000 {</div><div class='del'>-			compatible = "st,stm32mp1-dfsdm";</div><div class='del'>-			reg = &lt;0x4400d000 0x800&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc DFSDM_K&gt;;</div><div class='del'>-			clock-names = "dfsdm";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			dfsdm0: filter@0 {</div><div class='del'>-				compatible = "st,stm32-dfsdm-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 101 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dfsdm1: filter@1 {</div><div class='del'>-				compatible = "st,stm32-dfsdm-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 102 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dfsdm2: filter@2 {</div><div class='del'>-				compatible = "st,stm32-dfsdm-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 103 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dfsdm3: filter@3 {</div><div class='del'>-				compatible = "st,stm32-dfsdm-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 104 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dfsdm4: filter@4 {</div><div class='del'>-				compatible = "st,stm32-dfsdm-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;4&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 91 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dfsdm5: filter@5 {</div><div class='del'>-				compatible = "st,stm32-dfsdm-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				reg = &lt;5&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 92 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dma1: dma-controller@48000000 {</div><div class='del'>-			compatible = "st,stm32-dma";</div><div class='del'>-			reg = &lt;0x48000000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc DMA1&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc DMA1_R&gt;;</div><div class='del'>-			#dma-cells = &lt;4&gt;;</div><div class='del'>-			st,mem2mem;</div><div class='del'>-			dma-requests = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dma2: dma-controller@48001000 {</div><div class='del'>-			compatible = "st,stm32-dma";</div><div class='del'>-			reg = &lt;0x48001000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc DMA2&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc DMA2_R&gt;;</div><div class='del'>-			#dma-cells = &lt;4&gt;;</div><div class='del'>-			st,mem2mem;</div><div class='del'>-			dma-requests = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dmamux1: dma-router@48002000 {</div><div class='del'>-			compatible = "st,stm32h7-dmamux";</div><div class='del'>-			reg = &lt;0x48002000 0x40&gt;;</div><div class='del'>-			#dma-cells = &lt;3&gt;;</div><div class='del'>-			dma-requests = &lt;128&gt;;</div><div class='del'>-			dma-masters = &lt;&amp;dma1 &amp;dma2&gt;;</div><div class='del'>-			dma-channels = &lt;16&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc DMAMUX&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc DMAMUX_R&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		adc: adc@48003000 {</div><div class='del'>-			compatible = "st,stm32mp1-adc-core";</div><div class='del'>-			reg = &lt;0x48003000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc ADC12&gt;, &lt;&amp;rcc ADC12_K&gt;;</div><div class='del'>-			clock-names = "bus", "adc";</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			st,syscfg = &lt;&amp;syscfg&gt;;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			adc1: adc@0 {</div><div class='del'>-				compatible = "st,stm32mp1-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x0&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;adc&gt;;</div><div class='del'>-				interrupts = &lt;0&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 9 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			adc2: adc@100 {</div><div class='del'>-				compatible = "st,stm32mp1-adc";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x100&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;adc&gt;;</div><div class='del'>-				interrupts = &lt;1&gt;;</div><div class='del'>-				dmas = &lt;&amp;dmamux1 10 0x400 0x01&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				nvmem-cells = &lt;&amp;vrefint&gt;;</div><div class='del'>-				nvmem-cell-names = "vrefint";</div><div class='del'>-				status = "disabled";</div><div class='del'>-				channel@13 {</div><div class='del'>-					reg = &lt;13&gt;;</div><div class='del'>-					label = "vrefint";</div><div class='del'>-				};</div><div class='del'>-				channel@14 {</div><div class='del'>-					reg = &lt;14&gt;;</div><div class='del'>-					label = "vddcore";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdmmc3: mmc@48004000 {</div><div class='del'>-			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='del'>-			arm,primecell-periphid = &lt;0x00253180&gt;;</div><div class='del'>-			reg = &lt;0x48004000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SDMMC3_K&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			resets = &lt;&amp;rcc SDMMC3_R&gt;;</div><div class='del'>-			cap-sd-highspeed;</div><div class='del'>-			cap-mmc-highspeed;</div><div class='del'>-			max-frequency = &lt;120000000&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbotg_hs: usb-otg@49000000 {</div><div class='del'>-			compatible = "st,stm32mp15-hsotg", "snps,dwc2";</div><div class='del'>-			reg = &lt;0x49000000 0x10000&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USBO_K&gt;, &lt;&amp;usbphyc&gt;;</div><div class='del'>-			clock-names = "otg", "utmi";</div><div class='del'>-			resets = &lt;&amp;rcc USBO_R&gt;;</div><div class='del'>-			reset-names = "dwc2";</div><div class='del'>-			interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			g-rx-fifo-size = &lt;512&gt;;</div><div class='del'>-			g-np-tx-fifo-size = &lt;32&gt;;</div><div class='del'>-			g-tx-fifo-size = &lt;256 16 16 16 16 16 16 16&gt;;</div><div class='del'>-			dr_mode = "otg";</div><div class='del'>-			otg-rev = &lt;0x200&gt;;</div><div class='del'>-			usb33d-supply = &lt;&amp;usb33&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		ipcc: mailbox@4c001000 {</div><div class='ctx'> 			compatible = "st,stm32mp1-ipcc";</div><div class='ctx'> 			#mbox-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1172,18 +136,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dcmi: dcmi@4c006000 {</div><div class='del'>-			compatible = "st,stm32-dcmi";</div><div class='del'>-			reg = &lt;0x4c006000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc CAMITF_R&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc DCMI&gt;;</div><div class='del'>-			clock-names = "mclk";</div><div class='del'>-			dmas = &lt;&amp;dmamux1 75 0x400 0x01&gt;;</div><div class='del'>-			dma-names = "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		rcc: rcc@50000000 {</div><div class='ctx'> 			compatible = "st,stm32mp1-rcc", "syscon";</div><div class='ctx'> 			reg = &lt;0x50000000 0x1000&gt;;</div><div class='hunk'>@@ -1224,6 +176,81 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			reg = &lt;0x5000d000 0x400&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;intc GIC_SPI 6   IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_0 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 7   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 8   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 9   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 10  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 23  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 64  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 65  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 66  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 67  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 40  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_10 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 42  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 76  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 77  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 1   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 3   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_20 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 31  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 33  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 72  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 95  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 37  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 38  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 39  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 71  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 52  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_30 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 53  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 82  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 83  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_40 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 93  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_50 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_60 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 62  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_70 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		syscfg: syscon@50020000 {</div><div class='hunk'>@@ -1232,131 +259,6 @@</div><div class='ctx'> 			clocks = &lt;&amp;rcc SYSCFG&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		lptimer2: timer@50021000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x50021000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM2_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			trigger@1 {</div><div class='del'>-				compatible = "st,stm32-lptimer-trigger";</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			counter {</div><div class='del'>-				compatible = "st,stm32-lptimer-counter";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lptimer3: timer@50022000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x50022000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM3_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			trigger@2 {</div><div class='del'>-				compatible = "st,stm32-lptimer-trigger";</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lptimer4: timer@50023000 {</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x50023000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM4_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lptimer5: timer@50024000 {</div><div class='del'>-			compatible = "st,stm32-lptimer";</div><div class='del'>-			reg = &lt;0x50024000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc LPTIM5_K&gt;;</div><div class='del'>-			clock-names = "mux";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			pwm {</div><div class='del'>-				compatible = "st,stm32-pwm-lp";</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vrefbuf: vrefbuf@50025000 {</div><div class='del'>-			compatible = "st,stm32-vrefbuf";</div><div class='del'>-			reg = &lt;0x50025000 0x8&gt;;</div><div class='del'>-			regulator-min-microvolt = &lt;1500000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2500000&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc VREF&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sai4: sai@50027000 {</div><div class='del'>-			compatible = "st,stm32h7-sai";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0 0x50027000 0x400&gt;;</div><div class='del'>-			reg = &lt;0x50027000 0x4&gt;, &lt;0x500273f0 0x10&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SAI4_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			sai4a: audio-controller@50027004 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-a";</div><div class='del'>-				reg = &lt;0x04 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI4_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 99 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai4b: audio-controller@50027024 {</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32-sai-sub-b";</div><div class='del'>-				reg = &lt;0x24 0x20&gt;;</div><div class='del'>-				clocks = &lt;&amp;rcc SAI4_K&gt;;</div><div class='del'>-				clock-names = "sai_ck";</div><div class='del'>-				dmas = &lt;&amp;dmamux1 100 0x400 0x01&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		dts: thermal@50028000 {</div><div class='ctx'> 			compatible = "st,stm32-thermal";</div><div class='ctx'> 			reg = &lt;0x50028000 0x100&gt;;</div><div class='hunk'>@@ -1367,26 +269,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		hash1: hash@54002000 {</div><div class='del'>-			compatible = "st,stm32f756-hash";</div><div class='del'>-			reg = &lt;0x54002000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc HASH1&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc HASH1_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;mdma1 31 0x2 0x1000A02 0x0 0x0&gt;;</div><div class='del'>-			dma-names = "in";</div><div class='del'>-			dma-maxburst = &lt;2&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rng1: rng@54003000 {</div><div class='del'>-			compatible = "st,stm32-rng";</div><div class='del'>-			reg = &lt;0x54003000 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc RNG1_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc RNG1_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		mdma1: dma-controller@58000000 {</div><div class='ctx'> 			compatible = "st,stm32h7-mdma";</div><div class='ctx'> 			reg = &lt;0x58000000 0x1000&gt;;</div><div class='hunk'>@@ -1398,55 +280,6 @@</div><div class='ctx'> 			dma-requests = &lt;48&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		fmc: memory-controller@58002000 {</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "st,stm32mp1-fmc2-ebi";</div><div class='del'>-			reg = &lt;0x58002000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc FMC_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc FMC_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			ranges = &lt;0 0 0x60000000 0x04000000&gt;, /* EBI CS 1 */</div><div class='del'>-				 &lt;1 0 0x64000000 0x04000000&gt;, /* EBI CS 2 */</div><div class='del'>-				 &lt;2 0 0x68000000 0x04000000&gt;, /* EBI CS 3 */</div><div class='del'>-				 &lt;3 0 0x6c000000 0x04000000&gt;, /* EBI CS 4 */</div><div class='del'>-				 &lt;4 0 0x80000000 0x10000000&gt;; /* NAND */</div><div class='del'>-</div><div class='del'>-			nand-controller@4,0 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stm32mp1-fmc2-nfc";</div><div class='del'>-				reg = &lt;4 0x00000000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x08010000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x08020000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x01000000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x09010000 0x1000&gt;,</div><div class='del'>-				      &lt;4 0x09020000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				dmas = &lt;&amp;mdma1 20 0x2 0x12000a02 0x0 0x0&gt;,</div><div class='del'>-				       &lt;&amp;mdma1 20 0x2 0x12000a08 0x0 0x0&gt;,</div><div class='del'>-				       &lt;&amp;mdma1 21 0x2 0x12000a0a 0x0 0x0&gt;;</div><div class='del'>-				dma-names = "tx", "rx", "ecc";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qspi: spi@58003000 {</div><div class='del'>-			compatible = "st,stm32f469-qspi";</div><div class='del'>-			reg = &lt;0x58003000 0x1000&gt;, &lt;0x70000000 0x10000000&gt;;</div><div class='del'>-			reg-names = "qspi", "qspi_mm";</div><div class='del'>-			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			dmas = &lt;&amp;mdma1 22 0x2 0x10100002 0x0 0x0&gt;,</div><div class='del'>-			       &lt;&amp;mdma1 22 0x2 0x10100008 0x0 0x0&gt;;</div><div class='del'>-			dma-names = "tx", "rx";</div><div class='del'>-			clocks = &lt;&amp;rcc QSPI_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc QSPI_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		sdmmc1: mmc@58005000 {</div><div class='ctx'> 			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='ctx'> 			arm,primecell-periphid = &lt;0x00253180&gt;;</div><div class='hunk'>@@ -1482,39 +315,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ethernet0: ethernet@5800a000 {</div><div class='del'>-			compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";</div><div class='del'>-			reg = &lt;0x5800a000 0x2000&gt;;</div><div class='del'>-			reg-names = "stmmaceth";</div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "macirq";</div><div class='del'>-			clock-names = "stmmaceth",</div><div class='del'>-				      "mac-clk-tx",</div><div class='del'>-				      "mac-clk-rx",</div><div class='del'>-				      "eth-ck",</div><div class='del'>-				      "ptp_ref",</div><div class='del'>-				      "ethstp";</div><div class='del'>-			clocks = &lt;&amp;rcc ETHMAC&gt;,</div><div class='del'>-				 &lt;&amp;rcc ETHTX&gt;,</div><div class='del'>-				 &lt;&amp;rcc ETHRX&gt;,</div><div class='del'>-				 &lt;&amp;rcc ETHCK_K&gt;,</div><div class='del'>-				 &lt;&amp;rcc ETHPTP_K&gt;,</div><div class='del'>-				 &lt;&amp;rcc ETHSTP&gt;;</div><div class='del'>-			st,syscon = &lt;&amp;syscfg 0x4&gt;;</div><div class='del'>-			snps,mixed-burst;</div><div class='del'>-			snps,pbl = &lt;2&gt;;</div><div class='del'>-			snps,en-tx-lpi-clockgating;</div><div class='del'>-			snps,axi-config = &lt;&amp;stmmac_axi_config_0&gt;;</div><div class='del'>-			snps,tso;</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			stmmac_axi_config_0: stmmac-axi-config {</div><div class='del'>-				snps,wr_osr_lmt = &lt;0x7&gt;;</div><div class='del'>-				snps,rd_osr_lmt = &lt;0x7&gt;;</div><div class='del'>-				snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		usbh_ohci: usb@5800c000 {</div><div class='ctx'> 			compatible = "generic-ohci";</div><div class='ctx'> 			reg = &lt;0x5800c000 0x1000&gt;;</div><div class='hunk'>@@ -1580,45 +380,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usart1: serial@5c000000 {</div><div class='del'>-			compatible = "st,stm32h7-uart";</div><div class='del'>-			reg = &lt;0x5c000000 0x400&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;exti 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc USART1_K&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		spi6: spi@5c001000 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "st,stm32h7-spi";</div><div class='del'>-			reg = &lt;0x5c001000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc SPI6_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc SPI6_R&gt;;</div><div class='del'>-			dmas = &lt;&amp;mdma1 34 0x0 0x40008 0x0 0x0&gt;,</div><div class='del'>-			       &lt;&amp;mdma1 35 0x0 0x40002 0x0 0x0&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c4: i2c@5c002000 {</div><div class='del'>-			compatible = "st,stm32mp15-i2c";</div><div class='del'>-			reg = &lt;0x5c002000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C4_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C4_R&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x8&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		rtc: rtc@5c004000 {</div><div class='ctx'> 			compatible = "st,stm32mp1-rtc";</div><div class='ctx'> 			reg = &lt;0x5c004000 0x400&gt;;</div><div class='hunk'>@@ -1647,20 +408,1406 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c6: i2c@5c009000 {</div><div class='del'>-			compatible = "st,stm32mp15-i2c";</div><div class='del'>-			reg = &lt;0x5c009000 0x400&gt;;</div><div class='del'>-			interrupt-names = "event", "error";</div><div class='del'>-			interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc I2C6_K&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc I2C6_R&gt;;</div><div class='add'>+		etzpc: bus@5c007000 {</div><div class='add'>+			compatible = "st,stm32-etzpc", "simple-bus";</div><div class='add'>+			reg = &lt;0x5c007000 0x400&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x20&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			i2c-analog-filter;</div><div class='del'>-			status = "disabled";</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			#access-controller-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			timers2: timer@40000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40000000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM2_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 18 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 19 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 20 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 21 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 22 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "ch2", "ch3", "ch4", "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@1 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers3: timer@40001000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40001000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM3_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 23 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 24 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 25 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 26 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 27 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 28 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 17&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@2 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers4: timer@40002000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40002000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM4_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 29 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 30 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 31 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 32 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "ch2", "ch3", "ch4";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 18&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@3 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers5: timer@40003000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40003000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM5_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 55 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 56 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 57 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 58 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 59 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 60 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 19&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@4 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers6: timer@40004000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40004000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM6_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 69 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 20&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				timer@5 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers7: timer@40005000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40005000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM7_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 70 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 21&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				timer@6 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers12: timer@40006000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40006000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM12_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 22&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@11 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;11&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers13: timer@40007000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40007000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM13_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 23&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@12 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers14: timer@40008000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x40008000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM14_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@13 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;13&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer1: timer@40009000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x40009000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM1_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 25&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@0 {</div><div class='add'>+					compatible = "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s2: audio-controller@4000b000 {</div><div class='add'>+				compatible = "st,stm32h7-i2s";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x4000b000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 39 0x400 0x01&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 40 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@4000b000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x4000b000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI2_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 39 0x400 0x05&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 40 0x400 0x05&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s3: audio-controller@4000c000 {</div><div class='add'>+				compatible = "st,stm32h7-i2s";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x4000c000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 61 0x400 0x01&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 62 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 28&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@4000c000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x4000c000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI3_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 61 0x400 0x05&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 62 0x400 0x05&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 28&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spdifrx: audio-controller@4000d000 {</div><div class='add'>+				compatible = "st,stm32h7-spdifrx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x4000d000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPDIF_K&gt;;</div><div class='add'>+				clock-names = "kclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 93 0x400 0x01&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 94 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "rx-ctrl";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 29&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@4000e000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x4000e000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USART2_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 43 0x400 0x15&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 44 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 30&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart3: serial@4000f000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x4000f000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USART3_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 45 0x400 0x15&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 46 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 31&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@40010000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40010000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc UART4_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 63 0x400 0x15&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 64 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart5: serial@40011000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40011000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc UART5_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 65 0x400 0x15&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 66 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 33&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@40012000 {</div><div class='add'>+				compatible = "st,stm32mp15-i2c";</div><div class='add'>+				reg = &lt;0x40012000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C1_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C1_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x1&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 34&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@40013000 {</div><div class='add'>+				compatible = "st,stm32mp15-i2c";</div><div class='add'>+				reg = &lt;0x40013000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C2_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C2_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x2&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 35&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@40014000 {</div><div class='add'>+				compatible = "st,stm32mp15-i2c";</div><div class='add'>+				reg = &lt;0x40014000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C3_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C3_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x4&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 36&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@40015000 {</div><div class='add'>+				compatible = "st,stm32mp15-i2c";</div><div class='add'>+				reg = &lt;0x40015000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C5_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C5_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x10&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 37&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cec: cec@40016000 {</div><div class='add'>+				compatible = "st,stm32-cec";</div><div class='add'>+				reg = &lt;0x40016000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CEC_K&gt;, &lt;&amp;rcc CEC&gt;;</div><div class='add'>+				clock-names = "cec", "hdmi-cec";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 38&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dac: dac@40017000 {</div><div class='add'>+				compatible = "st,stm32h7-dac-core";</div><div class='add'>+				reg = &lt;0x40017000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc DAC12&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 39&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				dac1: dac@1 {</div><div class='add'>+					compatible = "st,stm32-dac";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dac2: dac@2 {</div><div class='add'>+					compatible = "st,stm32-dac";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@40018000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40018000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc UART7_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 79 0x400 0x15&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 80 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart8: serial@40019000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40019000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc UART8_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 81 0x400 0x15&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 82 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 41&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers1: timer@44000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x44000000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM1_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 11 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 12 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 13 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 14 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 15 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 16 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 17 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "ch2", "ch3", "ch4",</div><div class='add'>+					    "up", "trig", "com";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 48&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@0 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers8: timer@44001000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x44001000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM8_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 47 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 48 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 49 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 50 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 51 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 52 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 53 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "ch2", "ch3", "ch4",</div><div class='add'>+					    "up", "trig", "com";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 49&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@7 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart6: serial@44003000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x44003000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USART6_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 71 0x400 0x15&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 72 0x400 0x11&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 51&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s1: audio-controller@44004000 {</div><div class='add'>+				compatible = "st,stm32h7-i2s";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x44004000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 37 0x400 0x01&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 38 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 52&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@44004000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x44004000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI1_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 37 0x400 0x05&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 38 0x400 0x05&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 52&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@44005000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x44005000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI4_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 83 0x400 0x05&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 84 0x400 0x05&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 53&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers15: timer@44006000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x44006000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM15_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 105 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 106 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 107 0x400 0x1&gt;,</div><div class='add'>+				       &lt;&amp;dmamux1 108 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "up", "trig", "com";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 54&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@14 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;14&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers16: timer@44007000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x44007000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM16_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 109 0x400 0x1&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 110 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 55&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+				timer@15 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;15&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers17: timer@44008000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-timers";</div><div class='add'>+				reg = &lt;0x44008000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc TIM17_K&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 111 0x400 0x1&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 112 0x400 0x1&gt;;</div><div class='add'>+				dma-names = "ch1", "up";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 56&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@16 {</div><div class='add'>+					compatible = "st,stm32h7-timer-trigger";</div><div class='add'>+					reg = &lt;16&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@44009000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x44009000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI5_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;dmamux1 85 0x400 0x05&gt;,</div><div class='add'>+				&lt;&amp;dmamux1 86 0x400 0x05&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 57&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai1: sai@4400a000 {</div><div class='add'>+				compatible = "st,stm32h7-sai";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x4400a000 0x400&gt;;</div><div class='add'>+				reg = &lt;0x4400a000 0x4&gt;, &lt;0x4400a3f0 0x10&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI1_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 58&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai1a: audio-controller@4400a004 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI1_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 87 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai1b: audio-controller@4400a024 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI1_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 88 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai2: sai@4400b000 {</div><div class='add'>+				compatible = "st,stm32h7-sai";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x4400b000 0x400&gt;;</div><div class='add'>+				reg = &lt;0x4400b000 0x4&gt;, &lt;0x4400b3f0 0x10&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI2_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 59&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai2a: audio-controller@4400b004 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI2_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 89 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai2b: audio-controller@4400b024 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI2_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 90 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai3: sai@4400c000 {</div><div class='add'>+				compatible = "st,stm32h7-sai";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x4400c000 0x400&gt;;</div><div class='add'>+				reg = &lt;0x4400c000 0x4&gt;, &lt;0x4400c3f0 0x10&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI3_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 60&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai3a: audio-controller@4400c004 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x04 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI3_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 113 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai3b: audio-controller@4400c024 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI3_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 114 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dfsdm: dfsdm@4400d000 {</div><div class='add'>+				compatible = "st,stm32mp1-dfsdm";</div><div class='add'>+				reg = &lt;0x4400d000 0x800&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc DFSDM_K&gt;;</div><div class='add'>+				clock-names = "dfsdm";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 61&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				dfsdm0: filter@0 {</div><div class='add'>+					compatible = "st,stm32-dfsdm-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 101 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfsdm1: filter@1 {</div><div class='add'>+					compatible = "st,stm32-dfsdm-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 102 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfsdm2: filter@2 {</div><div class='add'>+					compatible = "st,stm32-dfsdm-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 103 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfsdm3: filter@3 {</div><div class='add'>+					compatible = "st,stm32-dfsdm-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 104 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfsdm4: filter@4 {</div><div class='add'>+					compatible = "st,stm32-dfsdm-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 91 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfsdm5: filter@5 {</div><div class='add'>+					compatible = "st,stm32-dfsdm-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 92 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma1: dma-controller@48000000 {</div><div class='add'>+				compatible = "st,stm32-dma";</div><div class='add'>+				reg = &lt;0x48000000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc DMA1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc DMA1_R&gt;;</div><div class='add'>+				#dma-cells = &lt;4&gt;;</div><div class='add'>+				st,mem2mem;</div><div class='add'>+				dma-requests = &lt;8&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 88&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma2: dma-controller@48001000 {</div><div class='add'>+				compatible = "st,stm32-dma";</div><div class='add'>+				reg = &lt;0x48001000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc DMA2&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc DMA2_R&gt;;</div><div class='add'>+				#dma-cells = &lt;4&gt;;</div><div class='add'>+				st,mem2mem;</div><div class='add'>+				dma-requests = &lt;8&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 89&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dmamux1: dma-router@48002000 {</div><div class='add'>+				compatible = "st,stm32h7-dmamux";</div><div class='add'>+				reg = &lt;0x48002000 0x40&gt;;</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-requests = &lt;128&gt;;</div><div class='add'>+				dma-masters = &lt;&amp;dma1 &amp;dma2&gt;;</div><div class='add'>+				dma-channels = &lt;16&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc DMAMUX&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc DMAMUX_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 90&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc: adc@48003000 {</div><div class='add'>+				compatible = "st,stm32mp1-adc-core";</div><div class='add'>+				reg = &lt;0x48003000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc ADC12&gt;, &lt;&amp;rcc ADC12_K&gt;;</div><div class='add'>+				clock-names = "bus", "adc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				st,syscfg = &lt;&amp;syscfg&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 72&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				adc1: adc@0 {</div><div class='add'>+					compatible = "st,stm32mp1-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+					interrupt-parent = &lt;&amp;adc&gt;;</div><div class='add'>+					interrupts = &lt;0&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 9 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				adc2: adc@100 {</div><div class='add'>+					compatible = "st,stm32mp1-adc";</div><div class='add'>+					#io-channel-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x100&gt;;</div><div class='add'>+					interrupt-parent = &lt;&amp;adc&gt;;</div><div class='add'>+					interrupts = &lt;1&gt;;</div><div class='add'>+					dmas = &lt;&amp;dmamux1 10 0x400 0x01&gt;;</div><div class='add'>+					dma-names = "rx";</div><div class='add'>+					nvmem-cells = &lt;&amp;vrefint&gt;;</div><div class='add'>+					nvmem-cell-names = "vrefint";</div><div class='add'>+					status = "disabled";</div><div class='add'>+					channel@13 {</div><div class='add'>+						reg = &lt;13&gt;;</div><div class='add'>+						label = "vrefint";</div><div class='add'>+					};</div><div class='add'>+					channel@14 {</div><div class='add'>+						reg = &lt;14&gt;;</div><div class='add'>+						label = "vddcore";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdmmc3: mmc@48004000 {</div><div class='add'>+				compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='add'>+				arm,primecell-periphid = &lt;0x00253180&gt;;</div><div class='add'>+				reg = &lt;0x48004000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SDMMC3_K&gt;;</div><div class='add'>+				clock-names = "apb_pclk";</div><div class='add'>+				resets = &lt;&amp;rcc SDMMC3_R&gt;;</div><div class='add'>+				cap-sd-highspeed;</div><div class='add'>+				cap-mmc-highspeed;</div><div class='add'>+				max-frequency = &lt;120000000&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 86&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbotg_hs: usb-otg@49000000 {</div><div class='add'>+				compatible = "st,stm32mp15-hsotg", "snps,dwc2";</div><div class='add'>+				reg = &lt;0x49000000 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USBO_K&gt;, &lt;&amp;usbphyc&gt;;</div><div class='add'>+				clock-names = "otg", "utmi";</div><div class='add'>+				resets = &lt;&amp;rcc USBO_R&gt;;</div><div class='add'>+				reset-names = "dwc2";</div><div class='add'>+				interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				g-rx-fifo-size = &lt;512&gt;;</div><div class='add'>+				g-np-tx-fifo-size = &lt;32&gt;;</div><div class='add'>+				g-tx-fifo-size = &lt;256 16 16 16 16 16 16 16&gt;;</div><div class='add'>+				dr_mode = "otg";</div><div class='add'>+				otg-rev = &lt;0x200&gt;;</div><div class='add'>+				usb33d-supply = &lt;&amp;usb33&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 85&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcmi: dcmi@4c006000 {</div><div class='add'>+				compatible = "st,stm32-dcmi";</div><div class='add'>+				reg = &lt;0x4c006000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc CAMITF_R&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc DCMI&gt;;</div><div class='add'>+				clock-names = "mclk";</div><div class='add'>+				dmas = &lt;&amp;dmamux1 75 0x400 0x01&gt;;</div><div class='add'>+				dma-names = "tx";</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 70&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer2: timer@50021000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x50021000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM2_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@1 {</div><div class='add'>+					compatible = "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer3: timer@50022000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x50022000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM3_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 65&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@2 {</div><div class='add'>+					compatible = "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer4: timer@50023000 {</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x50023000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM4_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 66&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer5: timer@50024000 {</div><div class='add'>+				compatible = "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x50024000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc LPTIM5_K&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 67&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vrefbuf: vrefbuf@50025000 {</div><div class='add'>+				compatible = "st,stm32-vrefbuf";</div><div class='add'>+				reg = &lt;0x50025000 0x8&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc VREF&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 69&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai4: sai@50027000 {</div><div class='add'>+				compatible = "st,stm32h7-sai";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x50027000 0x400&gt;;</div><div class='add'>+				reg = &lt;0x50027000 0x4&gt;, &lt;0x500273f0 0x10&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI4_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 68&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai4a: audio-controller@50027004 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x04 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI4_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 99 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai4b: audio-controller@50027024 {</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc SAI4_K&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;dmamux1 100 0x400 0x01&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hash1: hash@54002000 {</div><div class='add'>+				compatible = "st,stm32f756-hash";</div><div class='add'>+				reg = &lt;0x54002000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc HASH1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc HASH1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;mdma1 31 0x2 0x1000A02 0x0 0x0&gt;;</div><div class='add'>+				dma-names = "in";</div><div class='add'>+				dma-maxburst = &lt;2&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 8&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rng1: rng@54003000 {</div><div class='add'>+				compatible = "st,stm32-rng";</div><div class='add'>+				reg = &lt;0x54003000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc RNG1_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc RNG1_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 7&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			fmc: memory-controller@58002000 {</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				compatible = "st,stm32mp1-fmc2-ebi";</div><div class='add'>+				reg = &lt;0x58002000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc FMC_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc FMC_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 91&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ranges = &lt;0 0 0x60000000 0x04000000&gt;, /* EBI CS 1 */</div><div class='add'>+					 &lt;1 0 0x64000000 0x04000000&gt;, /* EBI CS 2 */</div><div class='add'>+					 &lt;2 0 0x68000000 0x04000000&gt;, /* EBI CS 3 */</div><div class='add'>+					 &lt;3 0 0x6c000000 0x04000000&gt;, /* EBI CS 4 */</div><div class='add'>+					 &lt;4 0 0x80000000 0x10000000&gt;; /* NAND */</div><div class='add'>+</div><div class='add'>+				nand-controller@4,0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					compatible = "st,stm32mp1-fmc2-nfc";</div><div class='add'>+					reg = &lt;4 0x00000000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x08010000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x08020000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x01000000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x09010000 0x1000&gt;,</div><div class='add'>+					      &lt;4 0x09020000 0x1000&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					dmas = &lt;&amp;mdma1 20 0x2 0x12000a02 0x0 0x0&gt;,</div><div class='add'>+					       &lt;&amp;mdma1 20 0x2 0x12000a08 0x0 0x0&gt;,</div><div class='add'>+					       &lt;&amp;mdma1 21 0x2 0x12000a0a 0x0 0x0&gt;;</div><div class='add'>+					dma-names = "tx", "rx", "ecc";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qspi: spi@58003000 {</div><div class='add'>+				compatible = "st,stm32f469-qspi";</div><div class='add'>+				reg = &lt;0x58003000 0x1000&gt;, &lt;0x70000000 0x10000000&gt;;</div><div class='add'>+				reg-names = "qspi", "qspi_mm";</div><div class='add'>+				interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;mdma1 22 0x2 0x10100002 0x0 0x0&gt;,</div><div class='add'>+				       &lt;&amp;mdma1 22 0x2 0x10100008 0x0 0x0&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				clocks = &lt;&amp;rcc QSPI_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc QSPI_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 92&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet0: ethernet@5800a000 {</div><div class='add'>+				compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";</div><div class='add'>+				reg = &lt;0x5800a000 0x2000&gt;;</div><div class='add'>+				reg-names = "stmmaceth";</div><div class='add'>+				interrupts-extended = &lt;&amp;intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "macirq";</div><div class='add'>+				clock-names = "stmmaceth",</div><div class='add'>+					      "mac-clk-tx",</div><div class='add'>+					      "mac-clk-rx",</div><div class='add'>+					      "eth-ck",</div><div class='add'>+					      "ptp_ref",</div><div class='add'>+					      "ethstp";</div><div class='add'>+				clocks = &lt;&amp;rcc ETHMAC&gt;,</div><div class='add'>+					 &lt;&amp;rcc ETHTX&gt;,</div><div class='add'>+					 &lt;&amp;rcc ETHRX&gt;,</div><div class='add'>+					 &lt;&amp;rcc ETHCK_K&gt;,</div><div class='add'>+					 &lt;&amp;rcc ETHPTP_K&gt;,</div><div class='add'>+					 &lt;&amp;rcc ETHSTP&gt;;</div><div class='add'>+				st,syscon = &lt;&amp;syscfg 0x4&gt;;</div><div class='add'>+				snps,mixed-burst;</div><div class='add'>+				snps,pbl = &lt;2&gt;;</div><div class='add'>+				snps,en-tx-lpi-clockgating;</div><div class='add'>+				snps,axi-config = &lt;&amp;stmmac_axi_config_0&gt;;</div><div class='add'>+				snps,tso;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 94&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				stmmac_axi_config_0: stmmac-axi-config {</div><div class='add'>+					snps,wr_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+					snps,rd_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+					snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@5c000000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x5c000000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc USART1_K&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi6: spi@5c001000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32h7-spi";</div><div class='add'>+				reg = &lt;0x5c001000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc SPI6_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI6_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;mdma1 34 0x0 0x40008 0x0 0x0&gt;,</div><div class='add'>+				       &lt;&amp;mdma1 35 0x0 0x40002 0x0 0x0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 4&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@5c002000 {</div><div class='add'>+				compatible = "st,stm32mp15-i2c";</div><div class='add'>+				reg = &lt;0x5c002000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C4_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C4_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x8&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 5&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@5c009000 {</div><div class='add'>+				compatible = "st,stm32mp15-i2c";</div><div class='add'>+				reg = &lt;0x5c009000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event", "error";</div><div class='add'>+				interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc I2C6_K&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C6_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				st,syscfg-fmp = &lt;&amp;syscfg 0x4 0x20&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				i2c-analog-filter;</div><div class='add'>+				access-controllers = &lt;&amp;etzpc 12&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		tamp: tamp@5c00a000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp153.dtsi b/arch/arm/boot/dts/st/stm32mp153.dtsi<br/>index 486084e0b80b..4640dafb1598 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp153.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp153.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp153.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp153.dtsi</a></div><div class='hunk'>@@ -28,32 +28,34 @@</div><div class='ctx'> 			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc {</div><div class='del'>-		m_can1: can@4400e000 {</div><div class='del'>-			compatible = "bosch,m_can";</div><div class='del'>-			reg = &lt;0x4400e000 0x400&gt;, &lt;0x44011000 0x1400&gt;;</div><div class='del'>-			reg-names = "m_can", "message_ram";</div><div class='del'>-			interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "int0", "int1";</div><div class='del'>-			clocks = &lt;&amp;rcc CK_HSE&gt;, &lt;&amp;rcc FDCAN_K&gt;;</div><div class='del'>-			clock-names = "hclk", "cclk";</div><div class='del'>-			bosch,mram-cfg = &lt;0x0 0 0 32 0 0 2 2&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+&amp;etzpc {</div><div class='add'>+	m_can1: can@4400e000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x4400e000 0x400&gt;, &lt;0x44011000 0x1400&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		clocks = &lt;&amp;rcc CK_HSE&gt;, &lt;&amp;rcc FDCAN_K&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		bosch,mram-cfg = &lt;0x0 0 0 32 0 0 2 2&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 62&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		m_can2: can@4400f000 {</div><div class='del'>-			compatible = "bosch,m_can";</div><div class='del'>-			reg = &lt;0x4400f000 0x400&gt;, &lt;0x44011000 0x2800&gt;;</div><div class='del'>-			reg-names = "m_can", "message_ram";</div><div class='del'>-			interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "int0", "int1";</div><div class='del'>-			clocks = &lt;&amp;rcc CK_HSE&gt;, &lt;&amp;rcc FDCAN_K&gt;;</div><div class='del'>-			clock-names = "hclk", "cclk";</div><div class='del'>-			bosch,mram-cfg = &lt;0x1400 0 0 32 0 0 2 2&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+	m_can2: can@4400f000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x4400f000 0x400&gt;, &lt;0x44011000 0x2800&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		clocks = &lt;&amp;rcc CK_HSE&gt;, &lt;&amp;rcc FDCAN_K&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		bosch,mram-cfg = &lt;0x1400 0 0 32 0 0 2 2&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 62&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts<br/>index 66ed5f9921ba..9cf5ed111b52 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp157c-ed1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp157c-ed1.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include "stm32mp15-pinctrl.dtsi"</div><div class='ctx'> #include "stm32mp15xxaa-pinctrl.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mfd/st,stpmic1.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -71,6 +72,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	led {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led-blue {</div><div class='add'>+			gpios = &lt;&amp;gpiod 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sd_switch: regulator-sd_switch {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "sd_switch";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xc.dtsi b/arch/arm/boot/dts/st/stm32mp15xc.dtsi<br/>index b06a55a2fa18..97465717f932 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp15xc.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/st/stm32mp15xc.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/st/stm32mp15xc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/st/stm32mp15xc.dtsi</a></div><div class='hunk'>@@ -4,15 +4,14 @@</div><div class='ctx'>  * Author: Alexandre Torgue &lt;alexandre.torgue@st.com&gt; for STMicroelectronics.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	soc {</div><div class='del'>-		cryp1: cryp@54001000 {</div><div class='del'>-			compatible = "st,stm32mp1-cryp";</div><div class='del'>-			reg = &lt;0x54001000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='del'>-			resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='add'>+&amp;etzpc {</div><div class='add'>+	cryp1: cryp@54001000 {</div><div class='add'>+		compatible = "st,stm32mp1-cryp";</div><div class='add'>+		reg = &lt;0x54001000 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='add'>+		resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 9&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi b/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi<br/>index 790b29ab0fa2..dafe485dfe19 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi</a></div><div class='hunk'>@@ -256,11 +256,6 @@</div><div class='ctx'> </div><div class='ctx'> 		pmmc: system-controller@2921c00 {</div><div class='ctx'> 			compatible = "ti,k2g-sci";</div><div class='del'>-			/*</div><div class='del'>-			 * In case of rare platforms that does not use k2g as</div><div class='del'>-			 * system master, use /delete-property/</div><div class='del'>-			 */</div><div class='del'>-			ti,system-reboot-controller;</div><div class='ctx'> 			mbox-names = "rx", "tx";</div><div class='ctx'> 			mboxes = &lt;&amp;msgmgr 5 2&gt;,</div><div class='ctx'> 				&lt;&amp;msgmgr 0 0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi b/arch/arm/boot/dts/ti/omap/am33xx.dtsi<br/>index 989d5a6edeed..0614ffdc1578 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/am33xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/am33xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/am33xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/ti/omap/am33xx.dtsi</a></div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		 * because the can not be enabled simultaneously on a</div><div class='ctx'> 		 * single SoC.</div><div class='ctx'> 		 */</div><div class='del'>-		opp-50-300000000{</div><div class='add'>+		opp-50-300000000 {</div><div class='ctx'> 			/* OPP50 */</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;950000 931000 969000&gt;;</div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		opp-100-275000000{</div><div class='add'>+		opp-100-275000000 {</div><div class='ctx'> 			/* OPP100-1 */</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;275000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1100000 1078000 1122000&gt;;</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		opp-100-300000000{</div><div class='add'>+		opp-100-300000000 {</div><div class='ctx'> 			/* OPP100-2 */</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1100000 1078000 1122000&gt;;</div><div class='hunk'>@@ -104,7 +104,7 @@</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		opp-100-500000000{</div><div class='add'>+		opp-100-500000000 {</div><div class='ctx'> 			/* OPP100-3 */</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1100000 1078000 1122000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi<br/>index 5fd1b380ece6..0a1df30f2818 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/am4372.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/am4372.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/am4372.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/ti/omap/am4372.dtsi</a></div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 			opp-supported-hw = &lt;0xFF 0x08&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		opp-800000000{</div><div class='add'>+		opp-800000000 {</div><div class='ctx'> 			/* OPP Turbo */</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1260000 1234800 1285200&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra76x.dtsi b/arch/arm/boot/dts/ti/omap/dra76x.dtsi<br/>index 1045eb24aa0d..50a02c393ea2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/dra76x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/dra76x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/dra76x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/ti/omap/dra76x.dtsi</a></div><div class='hunk'>@@ -84,35 +84,44 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;scm_conf_clocks {</div><div class='del'>-	dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,divider-clock";</div><div class='del'>-		clocks = &lt;&amp;dpll_gmac_x2_ck&gt;;</div><div class='del'>-		ti,max-div = &lt;63&gt;;</div><div class='del'>-		reg = &lt;0x03fc&gt;;</div><div class='del'>-		ti,bit-shift = &lt;20&gt;;</div><div class='del'>-		ti,latch-bit = &lt;26&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;dpll_gmac_h14x2_ctrl_ck&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clocks = &lt;&amp;dpll_gmac_ck&gt;, &lt;&amp;dpll_gmac_h14x2_ctrl_ck&gt;;</div><div class='add'>+	/* CTRL_CORE_SMA_SW_0 */</div><div class='add'>+	clock@3fc {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='ctx'> 		reg = &lt;0x3fc&gt;;</div><div class='del'>-		ti,bit-shift = &lt;29&gt;;</div><div class='del'>-		ti,latch-bit = &lt;26&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;dpll_gmac_h14x2_ctrl_mux_ck&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;dpll_gmac_h14x2_ctrl_ck&gt;;</div><div class='del'>-	};</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_gmac_h14x2_ctrl_ck: clock@20 {</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			clock-output-names = "dpll_gmac_h14x2_ctrl_ck";</div><div class='add'>+			compatible = "ti,divider-clock";</div><div class='add'>+			clocks = &lt;&amp;dpll_gmac_x2_ck&gt;;</div><div class='add'>+			ti,max-div = &lt;63&gt;;</div><div class='add'>+			ti,latch-bit = &lt;26&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;dpll_gmac_h14x2_ctrl_ck&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	mcan_clk: mcan_clk@3fc {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,gate-clock";</div><div class='del'>-		clocks = &lt;&amp;dpll_gmac_h14x2_ctrl_mux_ck&gt;;</div><div class='del'>-		ti,bit-shift = &lt;27&gt;;</div><div class='del'>-		reg = &lt;0x3fc&gt;;</div><div class='add'>+		mcan_clk: clock@27 {</div><div class='add'>+			reg = &lt;27&gt;;</div><div class='add'>+			clock-output-names = "mcan_clk";</div><div class='add'>+			compatible = "ti,gate-clock";</div><div class='add'>+			clocks = &lt;&amp;dpll_gmac_h14x2_ctrl_mux_ck&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dpll_gmac_h14x2_ctrl_mux_ck: clock@29 {</div><div class='add'>+			reg = &lt;29&gt;;</div><div class='add'>+			clock-output-names = "dpll_gmac_h14x2_ctrl_mux_ck";</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clocks = &lt;&amp;dpll_gmac_ck&gt;, &lt;&amp;dpll_gmac_h14x2_ctrl_ck&gt;;</div><div class='add'>+			ti,latch-bit = &lt;26&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;dpll_gmac_h14x2_ctrl_mux_ck&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;dpll_gmac_h14x2_ctrl_ck&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi<br/>index 06466d36caa9..04f08b8c64d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi</a></div><div class='hunk'>@@ -285,13 +285,21 @@</div><div class='ctx'> 		ti,invert-autoidle-bit;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_core_byp_mux: clock-dpll-core-byp-mux-23@12c {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_core_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x012c&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_CORE */</div><div class='add'>+	clock@12c {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x12c&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_core_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_core_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_core_ck: clock@120 {</div><div class='hunk'>@@ -368,13 +376,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_dsp_byp_mux: clock-dpll-dsp-byp-mux-23@240 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_dsp_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dsp_dpll_hs_clk_div&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x0240&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_DSP */</div><div class='add'>+	clock@240 {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x240&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_dsp_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_dsp_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dsp_dpll_hs_clk_div&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_dsp_ck: clock@234 {</div><div class='hunk'>@@ -410,13 +426,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_iva_byp_mux: clock-dpll-iva-byp-mux-23@1ac {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_iva_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;iva_dpll_hs_clk_div&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x01ac&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_IVA */</div><div class='add'>+	clock@1ac {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x1ac&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_iva_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_iva_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;iva_dpll_hs_clk_div&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_iva_ck: clock@1a0 {</div><div class='hunk'>@@ -452,13 +476,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_gpu_byp_mux: clock-dpll-gpu-byp-mux-23@2e4 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_gpu_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x02e4&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_GPU */</div><div class='add'>+	clock@2e4 {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x2e4&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_gpu_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_gpu_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_gpu_ck: clock@2d8 {</div><div class='hunk'>@@ -506,13 +538,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_ddr_byp_mux: clock-dpll-ddr-byp-mux-23@21c {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_ddr_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x021c&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_DDR */</div><div class='add'>+	clock@21c {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x21c&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_ddr_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_ddr_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_ddr_ck: clock@210 {</div><div class='hunk'>@@ -535,13 +575,21 @@</div><div class='ctx'> 		ti,invert-autoidle-bit;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_gmac_byp_mux: clock-dpll-gmac-byp-mux-23@2b4 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_gmac_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x02b4&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_GMAC */</div><div class='add'>+	clock@2b4 {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x2b4&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_gmac_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_gmac_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;dpll_abe_m3x2_ck&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_gmac_ck: clock@2a8 {</div><div class='hunk'>@@ -618,13 +666,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_eve_byp_mux: clock-dpll-eve-byp-mux-23@290 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_eve_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;eve_dpll_hs_clk_div&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x0290&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_EVE */</div><div class='add'>+	clock@290 {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x290&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_eve_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_eve_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;eve_dpll_hs_clk_div&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_eve_ck: clock@284 {</div><div class='hunk'>@@ -838,15 +894,23 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	l3_iclk_div: clock-l3-iclk-div-4@100 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,divider-clock";</div><div class='del'>-		clock-output-names = "l3_iclk_div";</div><div class='del'>-		ti,max-div = &lt;2&gt;;</div><div class='del'>-		ti,bit-shift = &lt;4&gt;;</div><div class='del'>-		reg = &lt;0x0100&gt;;</div><div class='del'>-		clocks = &lt;&amp;dpll_core_h12x2_ck&gt;;</div><div class='del'>-		ti,index-power-of-two;</div><div class='add'>+	/* CM_CLKSEL_CORE */</div><div class='add'>+	clock@100 {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x100&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		l3_iclk_div: clock@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			compatible = "ti,divider-clock";</div><div class='add'>+			clock-output-names = "l3_iclk_div";</div><div class='add'>+			ti,max-div = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;dpll_core_h12x2_ck&gt;;</div><div class='add'>+			ti,index-power-of-two;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	l4_root_clk_div: clock-l4-root-clk-div {</div><div class='hunk'>@@ -911,12 +975,21 @@</div><div class='ctx'> 		ti,index-starts-at-one;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	abe_dpll_sys_clk_mux: clock-abe-dpll-sys-clk-mux@118 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "abe_dpll_sys_clk_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;sys_clkin2&gt;;</div><div class='del'>-		reg = &lt;0x0118&gt;;</div><div class='add'>+	/* CM_CLKSEL_ABE_PLL_SYS */</div><div class='add'>+	clock@118 {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x118&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		abe_dpll_sys_clk_mux: clock@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "abe_dpll_sys_clk_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;sys_clkin2&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	abe_dpll_bypass_clk_mux: clock-abe-dpll-bypass-clk-mux@114 {</div><div class='hunk'>@@ -1018,14 +1091,23 @@</div><div class='ctx'> 		ti,index-power-of-two;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dsp_gclk_div: clock-dsp-gclk-div@18c {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,divider-clock";</div><div class='del'>-		clock-output-names = "dsp_gclk_div";</div><div class='del'>-		clocks = &lt;&amp;dpll_dsp_m2_ck&gt;;</div><div class='del'>-		ti,max-div = &lt;64&gt;;</div><div class='del'>-		reg = &lt;0x018c&gt;;</div><div class='del'>-		ti,index-power-of-two;</div><div class='add'>+	/* CM_CLKSEL_DPLL_USB */</div><div class='add'>+	clock@18c {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x18c&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dsp_gclk_div: clock@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			compatible = "ti,divider-clock";</div><div class='add'>+			clock-output-names = "dsp_gclk_div";</div><div class='add'>+			clocks = &lt;&amp;dpll_dsp_m2_ck&gt;;</div><div class='add'>+			ti,max-div = &lt;64&gt;;</div><div class='add'>+			ti,index-power-of-two;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpu_dclk: clock-gpu-dclk@1a0 {</div><div class='hunk'>@@ -1326,13 +1408,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_per_byp_mux: clock-dpll-per-byp-mux-23@14c {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_per_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;per_dpll_hs_clk_div&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x014c&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_PER */</div><div class='add'>+	clock@14c {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x14c&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_per_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_per_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;per_dpll_hs_clk_div&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_per_ck: clock@140 {</div><div class='hunk'>@@ -1364,13 +1454,21 @@</div><div class='ctx'> 		clock-div = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dpll_usb_byp_mux: clock-dpll-usb-byp-mux-23@18c {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "ti,mux-clock";</div><div class='del'>-		clock-output-names = "dpll_usb_byp_mux";</div><div class='del'>-		clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;usb_dpll_hs_clk_div&gt;;</div><div class='del'>-		ti,bit-shift = &lt;23&gt;;</div><div class='del'>-		reg = &lt;0x018c&gt;;</div><div class='add'>+	/* CM_CLKSEL_DPLL_USB */</div><div class='add'>+	clock@18c {</div><div class='add'>+		compatible = "ti,clksel";</div><div class='add'>+		reg = &lt;0x18c&gt;;</div><div class='add'>+		#clock-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpll_usb_byp_mux: clock@23 {</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			compatible = "ti,mux-clock";</div><div class='add'>+			clock-output-names = "dpll_usb_byp_mux";</div><div class='add'>+			clocks = &lt;&amp;sys_clkin1&gt;, &lt;&amp;usb_dpll_hs_clk_div&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dpll_usb_ck: clock@180 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-n900.dts b/arch/arm/boot/dts/ti/omap/omap3-n900.dts<br/>index d33485341251..07c5b963af78 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/omap3-n900.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/boot/dts/ti/omap/omap3-n900.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/ti/omap/omap3-n900.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/boot/dts/ti/omap/omap3-n900.dts</a></div><div class='hunk'>@@ -754,7 +754,7 @@</div><div class='ctx'> 		ti,current-limit = &lt;100&gt;;</div><div class='ctx'> 		ti,weak-battery-voltage = &lt;3400&gt;;</div><div class='ctx'> 		ti,battery-regulation-voltage = &lt;4200&gt;;</div><div class='del'>-		ti,charge-current = &lt;650&gt;;</div><div class='add'>+		ti,charge-current = &lt;950&gt;;</div><div class='ctx'> 		ti,termination-current = &lt;100&gt;;</div><div class='ctx'> 		ti,resistor-sense = &lt;68&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig<br/>index 01b5a5a73f03..42cb1c854118 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/collie_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/collie_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/collie_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/collie_defconfig</a></div><div class='hunk'>@@ -3,7 +3,7 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> CONFIG_ARCH_MULTI_V4=y</div><div class='ctx'> # CONFIG_ARCH_MULTI_V7 is not set</div><div class='head'>diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig<br/>index 7327fce87808..cf2480dce285 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/imx_v6_v7_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/imx_v6_v7_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/imx_v6_v7_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/imx_v6_v7_defconfig</a></div><div class='hunk'>@@ -336,6 +336,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=m</div><div class='ctx'> CONFIG_USB_SERIAL_OPTION=m</div><div class='ctx'> CONFIG_USB_TEST=m</div><div class='ctx'> CONFIG_USB_EHSET_TEST_FIXTURE=m</div><div class='add'>+CONFIG_USB_ONBOARD_DEV=y</div><div class='ctx'> CONFIG_NOP_USB_XCEIV=y</div><div class='ctx'> CONFIG_USB_MXS_PHY=y</div><div class='ctx'> CONFIG_USB_GADGET=y</div><div class='head'>diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig<br/>index 59c4835ffc97..c1291ca290b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/keystone_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/keystone_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/keystone_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/keystone_defconfig</a></div><div class='hunk'>@@ -12,7 +12,7 @@ CONFIG_CGROUP_DEVICE=y</div><div class='ctx'> CONFIG_CGROUP_CPUACCT=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='head'>diff --git a/arch/arm/configs/lpc18xx_defconfig b/arch/arm/configs/lpc18xx_defconfig<br/>index d169da9b2824..f55c231e0870 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/lpc18xx_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/lpc18xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/lpc18xx_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/lpc18xx_defconfig</a></div><div class='hunk'>@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> # CONFIG_RD_LZ4 is not set</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> # CONFIG_UID16 is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='head'>diff --git a/arch/arm/configs/moxart_defconfig b/arch/arm/configs/moxart_defconfig<br/>index 1d41e73f4903..34d079e03b3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/moxart_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/moxart_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/moxart_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/moxart_defconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y</div><div class='ctx'> CONFIG_IKCONFIG_PROC=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='ctx'> # CONFIG_TIMERFD is not set</div><div class='ctx'> # CONFIG_EVENTFD is not set</div><div class='head'>diff --git a/arch/arm/configs/mps2_defconfig b/arch/arm/configs/mps2_defconfig<br/>index 3ed73f184d83..e995e50537ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/mps2_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/mps2_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/mps2_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/mps2_defconfig</a></div><div class='hunk'>@@ -5,7 +5,7 @@ CONFIG_LOG_BUF_SHIFT=16</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_UID16 is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='head'>diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig<br/>index 729ea8157e2a..025b595dd837 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/omap1_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/omap1_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/omap1_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/omap1_defconfig</a></div><div class='hunk'>@@ -9,7 +9,7 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_SHMEM is not set</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='head'>diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig<br/>index 091e1840933c..56925adfe842 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/shmobile_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/shmobile_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/shmobile_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/shmobile_defconfig</a></div><div class='hunk'>@@ -139,8 +139,8 @@ CONFIG_DRM_FBDEV_EMULATION=y</div><div class='ctx'> CONFIG_DRM_RCAR_DU=y</div><div class='ctx'> # CONFIG_DRM_RCAR_USE_MIPI_DSI is not set</div><div class='ctx'> CONFIG_DRM_SHMOBILE=y</div><div class='del'>-CONFIG_DRM_PANEL_SIMPLE=y</div><div class='ctx'> CONFIG_DRM_PANEL_EDP=y</div><div class='add'>+CONFIG_DRM_PANEL_SIMPLE=y</div><div class='ctx'> CONFIG_DRM_DISPLAY_CONNECTOR=y</div><div class='ctx'> CONFIG_DRM_LVDS_CODEC=y</div><div class='ctx'> CONFIG_DRM_SII902X=y</div><div class='hunk'>@@ -235,3 +235,4 @@ CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='add'>+CONFIG_ARM_DEBUG_WX=y</div><div class='head'>diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig<br/>index b9fe3fbed5ae..3baec075d1ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/stm32_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/stm32_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/stm32_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/stm32_defconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_UID16 is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='head'>diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig<br/>index bddc82f78942..a83d29fed175 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/sunxi_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/configs/sunxi_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/sunxi_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/configs/sunxi_defconfig</a></div><div class='hunk'>@@ -110,6 +110,7 @@ CONFIG_DRM_PANEL_LVDS=y</div><div class='ctx'> CONFIG_DRM_PANEL_SIMPLE=y</div><div class='ctx'> CONFIG_DRM_PANEL_EDP=y</div><div class='ctx'> CONFIG_DRM_SIMPLE_BRIDGE=y</div><div class='add'>+CONFIG_DRM_DW_HDMI=y</div><div class='ctx'> CONFIG_DRM_LIMA=y</div><div class='ctx'> CONFIG_FB_SIMPLE=y</div><div class='ctx'> CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='head'>diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h<br/>index 853c4f81ba4a..ad36b6570067 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/include/asm/topology.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/include/asm/topology.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/include/asm/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/include/asm/topology.h</a></div><div class='hunk'>@@ -22,9 +22,9 @@</div><div class='ctx'> /* Enable topology flag updates */</div><div class='ctx'> #define arch_update_cpu_topology topology_update_cpu_topology</div><div class='ctx'> </div><div class='del'>-/* Replace task scheduler's default thermal pressure API */</div><div class='del'>-#define arch_scale_thermal_pressure topology_get_thermal_pressure</div><div class='del'>-#define arch_update_thermal_pressure	topology_update_thermal_pressure</div><div class='add'>+/* Replace task scheduler's default HW pressure API */</div><div class='add'>+#define arch_scale_hw_pressure topology_get_hw_pressure</div><div class='add'>+#define arch_update_hw_pressure	topology_update_hw_pressure</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c<br/>index dc0fb7a81371..054e9199f30d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/kernel/hw_breakpoint.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/hw_breakpoint.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/kernel/hw_breakpoint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/kernel/hw_breakpoint.c</a></div><div class='hunk'>@@ -626,7 +626,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,</div><div class='ctx'> 	hw-&gt;address &amp;= ~alignment_mask;</div><div class='ctx'> 	hw-&gt;ctrl.len &lt;&lt;= offset;</div><div class='ctx'> </div><div class='del'>-	if (uses_default_overflow_handler(bp)) {</div><div class='add'>+	if (is_default_overflow_handler(bp)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Mismatch breakpoints are required for single-stepping</div><div class='ctx'> 		 * breakpoints.</div><div class='hunk'>@@ -798,7 +798,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,</div><div class='ctx'> 		 * Otherwise, insert a temporary mismatch breakpoint so that</div><div class='ctx'> 		 * we can single-step over the watchpoint trigger.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!uses_default_overflow_handler(wp))</div><div class='add'>+		if (!is_default_overflow_handler(wp))</div><div class='ctx'> 			continue;</div><div class='ctx'> step:</div><div class='ctx'> 		enable_single_step(wp, instruction_pointer(regs));</div><div class='hunk'>@@ -811,7 +811,7 @@ step:</div><div class='ctx'> 		info-&gt;trigger = addr;</div><div class='ctx'> 		pr_debug("watchpoint fired: address = 0x%x\n", info-&gt;trigger);</div><div class='ctx'> 		perf_bp_event(wp, regs);</div><div class='del'>-		if (uses_default_overflow_handler(wp))</div><div class='add'>+		if (is_default_overflow_handler(wp))</div><div class='ctx'> 			enable_single_step(wp, instruction_pointer(regs));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -886,7 +886,7 @@ static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs)</div><div class='ctx'> 			info-&gt;trigger = addr;</div><div class='ctx'> 			pr_debug("breakpoint fired: address = 0x%x\n", addr);</div><div class='ctx'> 			perf_bp_event(bp, regs);</div><div class='del'>-			if (uses_default_overflow_handler(bp))</div><div class='add'>+			if (is_default_overflow_handler(bp))</div><div class='ctx'> 				enable_single_step(bp, addr);</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c<br/>index e74d84f58b77..677f218f7e84 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/kernel/module.c</a></div><div class='hunk'>@@ -12,48 +12,14 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> #include &lt;asm/opcodes.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_XIP_KERNEL</div><div class='del'>-/*</div><div class='del'>- * The XIP kernel text is mapped in the module area for modules and</div><div class='del'>- * some other stuff to work without any indirect relocations.</div><div class='del'>- * MODULES_VADDR is redefined here and not in asm/memory.h to avoid</div><div class='del'>- * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.</div><div class='del'>- */</div><div class='del'>-#undef MODULES_VADDR</div><div class='del'>-#define MODULES_VADDR	(((unsigned long)_exiprom + ~PMD_MASK) &amp; PMD_MASK)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	gfp_t gfp_mask = GFP_KERNEL;</div><div class='del'>-	void *p;</div><div class='del'>-</div><div class='del'>-	/* Silence the initial allocation */</div><div class='del'>-	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS))</div><div class='del'>-		gfp_mask |= __GFP_NOWARN;</div><div class='del'>-</div><div class='del'>-	p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,</div><div class='del'>-				gfp_mask, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,</div><div class='del'>-				__builtin_return_address(0));</div><div class='del'>-	if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p)</div><div class='del'>-		return p;</div><div class='del'>-	return __vmalloc_node_range(size, 1,  VMALLOC_START, VMALLOC_END,</div><div class='del'>-				GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,</div><div class='del'>-				__builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> bool module_init_section(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	return strstarts(name, ".init") ||</div><div class='head'>diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S<br/>index a86a1d4f3461..93afd1005b43 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/kernel/sleep.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/sleep.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/kernel/sleep.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/kernel/sleep.S</a></div><div class='hunk'>@@ -127,6 +127,10 @@ cpu_resume_after_mmu:</div><div class='ctx'> 	instr_sync</div><div class='ctx'> #endif</div><div class='ctx'> 	bl	cpu_init		@ restore the und/abt/irq banked regs</div><div class='add'>+#if defined(CONFIG_KASAN) &amp;&amp; defined(CONFIG_KASAN_STACK)</div><div class='add'>+	mov	r0, sp</div><div class='add'>+	bl	kasan_unpoison_task_stack_below</div><div class='add'>+#endif</div><div class='ctx'> 	mov	r0, #0			@ return zero on success</div><div class='ctx'> 	ldmfd	sp!, {r4 - r11, pc}</div><div class='ctx'> ENDPROC(cpu_resume_after_mmu)</div><div class='head'>diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c<br/>index ef0058de432b..2336ee2aa44a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/kernel/topology.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/kernel/topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/kernel/topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/kernel/topology.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'>  * can take this difference into account during load balance. A per cpu</div><div class='ctx'>  * structure is preferred because each CPU updates its own cpu_capacity field</div><div class='ctx'>  * during the load balance except for idle cores. One idle core is selected</div><div class='del'>- * to run the rebalance_domains for all idle cores and the cpu_capacity can be</div><div class='add'>+ * to run the sched_balance_domains for all idle cores and the cpu_capacity can be</div><div class='ctx'>  * updated during this sequence.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c<br/>index 25893d109190..b68cb86dbe4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/mmdc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-imx/mmdc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/mmdc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-imx/mmdc.c</a></div><div class='hunk'>@@ -437,6 +437,7 @@ static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc,</div><div class='ctx'> {</div><div class='ctx'> 	*pmu_mmdc = (struct mmdc_pmu) {</div><div class='ctx'> 		.pmu = (struct pmu) {</div><div class='add'>+			.parent		= dev,</div><div class='ctx'> 			.task_ctx_nr    = perf_invalid_context,</div><div class='ctx'> 			.attr_groups    = attr_groups,</div><div class='ctx'> 			.event_init     = mmdc_pmu_event_init,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/board-d2net.c b/arch/arm/mach-orion5x/board-d2net.c<br/>index 0297e302d7bc..09bf366d05ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/board-d2net.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/board-d2net.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/board-d2net.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-orion5x/board-d2net.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/pci.h&gt;</div><div class='hunk'>@@ -55,12 +56,9 @@ static struct gpio_led d2net_leds[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "d2net:blue:sata",</div><div class='ctx'> 		.default_trigger = "default-on",</div><div class='del'>-		.gpio = D2NET_GPIO_BLUE_LED_OFF,</div><div class='del'>-		.active_low = 1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "d2net:red:fail",</div><div class='del'>-		.gpio = D2NET_GPIO_RED_LED,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -77,6 +75,17 @@ static struct platform_device d2net_gpio_leds = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct gpiod_lookup_table d2net_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", D2NET_GPIO_BLUE_LED_OFF, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", D2NET_GPIO_RED_LED, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_HIGH),</div><div class='add'>+		{ },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init d2net_gpio_leds_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -91,6 +100,7 @@ static void __init d2net_gpio_leds_init(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		pr_err("d2net: failed to configure blue LED blink GPIO\n");</div><div class='ctx'> </div><div class='add'>+	gpiod_add_lookup_table(&amp;d2net_leds_gpio_table);</div><div class='ctx'> 	platform_device_register(&amp;d2net_gpio_leds);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c<br/>index d69259b6b60d..062109efa0ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/dns323-setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/dns323-setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/dns323-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-orion5x/dns323-setup.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -254,37 +255,64 @@ error_fail:</div><div class='ctx'> static struct gpio_led dns323ab_leds[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "power:blue",</div><div class='del'>-		.gpio = DNS323_GPIO_LED_POWER2,</div><div class='ctx'> 		.default_trigger = "default-on",</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name = "right:amber",</div><div class='del'>-		.gpio = DNS323_GPIO_LED_RIGHT_AMBER,</div><div class='del'>-		.active_low = 1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name = "left:amber",</div><div class='del'>-		.gpio = DNS323_GPIO_LED_LEFT_AMBER,</div><div class='del'>-		.active_low = 1,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct gpiod_lookup_table dns323a1_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323_GPIO_LED_POWER2, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323_GPIO_LED_RIGHT_AMBER, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323_GPIO_LED_LEFT_AMBER, NULL,</div><div class='add'>+				2, GPIO_ACTIVE_LOW),</div><div class='add'>+		{ },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* B1 is the same but power LED is active high */</div><div class='add'>+static struct gpiod_lookup_table dns323b1_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323_GPIO_LED_POWER2, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323_GPIO_LED_RIGHT_AMBER, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323_GPIO_LED_LEFT_AMBER, NULL,</div><div class='add'>+				2, GPIO_ACTIVE_LOW),</div><div class='add'>+		{ },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static struct gpio_led dns323c_leds[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "power:blue",</div><div class='del'>-		.gpio = DNS323C_GPIO_LED_POWER,</div><div class='ctx'> 		.default_trigger = "timer",</div><div class='del'>-		.active_low = 1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name = "right:amber",</div><div class='del'>-		.gpio = DNS323C_GPIO_LED_RIGHT_AMBER,</div><div class='del'>-		.active_low = 1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name = "left:amber",</div><div class='del'>-		.gpio = DNS323C_GPIO_LED_LEFT_AMBER,</div><div class='del'>-		.active_low = 1,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct gpiod_lookup_table dns323c_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323C_GPIO_LED_POWER, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323C_GPIO_LED_RIGHT_AMBER, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", DNS323C_GPIO_LED_LEFT_AMBER, NULL,</div><div class='add'>+				2, GPIO_ACTIVE_LOW),</div><div class='add'>+		{ },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static struct gpio_led_platform_data dns323ab_led_data = {</div><div class='ctx'> 	.num_leds	= ARRAY_SIZE(dns323ab_leds),</div><div class='hunk'>@@ -621,16 +649,21 @@ static void __init dns323_init(void)</div><div class='ctx'> 		/* The 5181 power LED is active low and requires</div><div class='ctx'> 		 * DNS323_GPIO_LED_POWER1 to also be low.</div><div class='ctx'> 		 */</div><div class='del'>-		 dns323ab_leds[0].active_low = 1;</div><div class='del'>-		 gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");</div><div class='del'>-		 gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);</div><div class='del'>-		fallthrough;</div><div class='add'>+		gpiod_add_lookup_table(&amp;dns323a1_leds_gpio_table);</div><div class='add'>+		gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");</div><div class='add'>+		gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);</div><div class='add'>+		i2c_register_board_info(0, dns323ab_i2c_devices,</div><div class='add'>+					ARRAY_SIZE(dns323ab_i2c_devices));</div><div class='add'>+</div><div class='add'>+		break;</div><div class='ctx'> 	case DNS323_REV_B1:</div><div class='add'>+		gpiod_add_lookup_table(&amp;dns323b1_leds_gpio_table);</div><div class='ctx'> 		i2c_register_board_info(0, dns323ab_i2c_devices,</div><div class='ctx'> 				ARRAY_SIZE(dns323ab_i2c_devices));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DNS323_REV_C1:</div><div class='ctx'> 		/* Hookup LEDs &amp; Buttons */</div><div class='add'>+		gpiod_add_lookup_table(&amp;dns323c_leds_gpio_table);</div><div class='ctx'> 		dns323_gpio_leds.dev.platform_data = &amp;dns323c_led_data;</div><div class='ctx'> 		dns323_button_device.dev.platform_data = &amp;dns323c_button_data;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c<br/>index 2bf8ec75e908..b7327a612835 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/mv2120-setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/mv2120-setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/mv2120-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-orion5x/mv2120-setup.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  * License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='hunk'>@@ -139,34 +140,45 @@ static struct i2c_board_info __initdata mv2120_i2c_rtc = {</div><div class='ctx'> static struct gpio_led mv2120_led_pins[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "mv2120:blue:health",</div><div class='del'>-		.gpio			= 0,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "mv2120:red:health",</div><div class='del'>-		.gpio			= 1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "mv2120:led:bright",</div><div class='del'>-		.gpio			= 4,</div><div class='ctx'> 		.default_trigger	= "default-on",</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "mv2120:led:dimmed",</div><div class='del'>-		.gpio			= 5,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "mv2120:red:sata0",</div><div class='del'>-		.gpio			= 8,</div><div class='del'>-		.active_low		= 1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "mv2120:red:sata1",</div><div class='del'>-		.gpio			= 9,</div><div class='del'>-		.active_low		= 1,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct gpiod_lookup_table mv2120_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 0, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 1, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 4, NULL,</div><div class='add'>+				2, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 5, NULL,</div><div class='add'>+				3, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 8, NULL,</div><div class='add'>+				4, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 9, NULL,</div><div class='add'>+				5, GPIO_ACTIVE_LOW),</div><div class='add'>+		{ },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct gpio_led_platform_data mv2120_led_data = {</div><div class='ctx'> 	.leds		= mv2120_led_pins,</div><div class='ctx'> 	.num_leds	= ARRAY_SIZE(mv2120_led_pins),</div><div class='hunk'>@@ -219,6 +231,7 @@ static void __init mv2120_init(void)</div><div class='ctx'> 			gpio_free(MV2120_GPIO_RTC_IRQ);</div><div class='ctx'> 	}</div><div class='ctx'> 	i2c_register_board_info(0, &amp;mv2120_i2c_rtc, 1);</div><div class='add'>+	gpiod_add_lookup_table(&amp;mv2120_leds_gpio_table);</div><div class='ctx'> 	platform_device_register(&amp;mv2120_leds);</div><div class='ctx'> </div><div class='ctx'> 	/* register mv2120 specific power-off method */</div><div class='head'>diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c<br/>index 695cc683cd83..6ad9740b426b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/net2big-setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/net2big-setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/net2big-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-orion5x/net2big-setup.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -214,19 +215,30 @@ err_free_1:</div><div class='ctx'> static struct gpio_led net2big_leds[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "net2big:red:power",</div><div class='del'>-		.gpio = NET2BIG_GPIO_PWR_RED_LED,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "net2big:blue:power",</div><div class='del'>-		.gpio = NET2BIG_GPIO_PWR_BLUE_LED,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "net2big:red:sata0",</div><div class='del'>-		.gpio = NET2BIG_GPIO_SATA0_RED_LED,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "net2big:red:sata1",</div><div class='del'>-		.gpio = NET2BIG_GPIO_SATA1_RED_LED,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpiod_lookup_table net2big_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", NET2BIG_GPIO_PWR_RED_LED, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", NET2BIG_GPIO_PWR_BLUE_LED, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", NET2BIG_GPIO_SATA0_RED_LED, NULL,</div><div class='add'>+				2, GPIO_ACTIVE_HIGH),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", NET2BIG_GPIO_SATA1_RED_LED, NULL,</div><div class='add'>+				3, GPIO_ACTIVE_HIGH),</div><div class='add'>+		{ },</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -282,6 +294,7 @@ static void __init net2big_gpio_leds_init(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		pr_err("net2big: failed to setup SATA1 blue LED GPIO\n");</div><div class='ctx'> </div><div class='add'>+	gpiod_add_lookup_table(&amp;net2big_leds_gpio_table);</div><div class='ctx'> 	platform_device_register(&amp;net2big_gpio_leds);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c<br/>index 6f60dc1dfa22..8131982c10d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/ts409-setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-orion5x/ts409-setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-orion5x/ts409-setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-orion5x/ts409-setup.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  * Copyright (C) 2008  Martin Michlmayr &lt;tbm@cyrius.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='hunk'>@@ -168,20 +169,27 @@ static struct i2c_board_info __initdata qnap_ts409_i2c_rtc = {</div><div class='ctx'> static struct gpio_led ts409_led_pins[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name		= "ts409:red:sata1",</div><div class='del'>-		.gpio		= 4,</div><div class='del'>-		.active_low	= 1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "ts409:red:sata2",</div><div class='del'>-		.gpio		= 5,</div><div class='del'>-		.active_low	= 1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "ts409:red:sata3",</div><div class='del'>-		.gpio		= 6,</div><div class='del'>-		.active_low	= 1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "ts409:red:sata4",</div><div class='del'>-		.gpio		= 7,</div><div class='del'>-		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpiod_lookup_table ts409_leds_gpio_table = {</div><div class='add'>+	.dev_id = "leds-gpio",</div><div class='add'>+	.table = {</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 4, NULL,</div><div class='add'>+				0, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 5, NULL,</div><div class='add'>+				1, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 6, NULL,</div><div class='add'>+				2, GPIO_ACTIVE_LOW),</div><div class='add'>+		GPIO_LOOKUP_IDX("orion_gpio0", 7, NULL,</div><div class='add'>+				3, GPIO_ACTIVE_LOW),</div><div class='add'>+		{ },</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -300,6 +308,7 @@ static void __init qnap_ts409_init(void)</div><div class='ctx'> 	if (qnap_ts409_i2c_rtc.irq == 0)</div><div class='ctx'> 		pr_warn("qnap_ts409_init: failed to get RTC IRQ\n");</div><div class='ctx'> 	i2c_register_board_info(0, &amp;qnap_ts409_i2c_rtc, 1);</div><div class='add'>+	gpiod_add_lookup_table(&amp;ts409_leds_gpio_table);</div><div class='ctx'> 	platform_device_register(&amp;ts409_leds);</div><div class='ctx'> </div><div class='ctx'> 	/* register tsx09 specific power-off method */</div><div class='head'>diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c<br/>index 661b3fc43275..1e4cd502340e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/devices.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-pxa/devices.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/devices.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-pxa/devices.c</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> #include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/dmaengine.h&gt;</div><div class='del'>-#include &lt;linux/spi/pxa2xx_spi.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/i2c-pxa.h&gt;</div><div class='ctx'> #include &lt;linux/soc/pxa/cpu.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -665,23 +664,6 @@ struct platform_device pxa27x_device_gpio = {</div><div class='ctx'> 	.resource	= pxa_resource_gpio,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.</div><div class='del'>- * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */</div><div class='del'>-void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pd;</div><div class='del'>-</div><div class='del'>-	pd = platform_device_alloc("pxa2xx-spi", id);</div><div class='del'>-	if (pd == NULL) {</div><div class='del'>-		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",</div><div class='del'>-		       id);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pd-&gt;dev.platform_data = info;</div><div class='del'>-	platform_device_add(pd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct resource pxa_dma_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start	= 0x40000000,</div><div class='head'>diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c<br/>index cc691b199429..3c5f5a3cb480 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/spitz.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-pxa/spitz.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/spitz.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-pxa/spitz.c</a></div><div class='hunk'>@@ -18,10 +18,10 @@</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/i2c-pxa.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/pca953x.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/spi/ads7846.h&gt;</div><div class='ctx'> #include &lt;linux/spi/corgi_lcd.h&gt;</div><div class='del'>-#include &lt;linux/spi/pxa2xx_spi.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/sharpsl.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/input-event-codes.h&gt;</div><div class='hunk'>@@ -569,10 +569,6 @@ static struct spi_board_info spitz_spi_devices[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct pxa2xx_spi_controller spitz_spi_info = {</div><div class='del'>-	.num_chipselect	= 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct gpiod_lookup_table spitz_spi_gpio_table = {</div><div class='ctx'> 	.dev_id = "spi2",</div><div class='ctx'> 	.table = {</div><div class='hunk'>@@ -583,8 +579,21 @@ static struct gpiod_lookup_table spitz_spi_gpio_table = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct property_entry spitz_spi_properties[] = {</div><div class='add'>+	PROPERTY_ENTRY_U32("num-cs", 3),</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct software_node spitz_spi_node = {</div><div class='add'>+	.properties = spitz_spi_properties,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init spitz_spi_init(void)</div><div class='ctx'> {</div><div class='add'>+	struct platform_device *pd;</div><div class='add'>+	int id = 2;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='ctx'> 	if (machine_is_akita())</div><div class='ctx'> 		gpiod_add_lookup_table(&amp;akita_lcdcon_gpio_table);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -592,7 +601,21 @@ static void __init spitz_spi_init(void)</div><div class='ctx'> </div><div class='ctx'> 	gpiod_add_lookup_table(&amp;spitz_ads7846_gpio_table);</div><div class='ctx'> 	gpiod_add_lookup_table(&amp;spitz_spi_gpio_table);</div><div class='del'>-	pxa2xx_set_spi_info(2, &amp;spitz_spi_info);</div><div class='add'>+</div><div class='add'>+	/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1 */</div><div class='add'>+	pd = platform_device_alloc("pxa2xx-spi", id);</div><div class='add'>+	if (pd == NULL) {</div><div class='add'>+		pr_err("pxa2xx-spi: failed to allocate device id %d\n", id);</div><div class='add'>+	} else {</div><div class='add'>+		err = device_add_software_node(&amp;pd-&gt;dev, &amp;spitz_spi_node);</div><div class='add'>+		if (err) {</div><div class='add'>+			platform_device_put(pd);</div><div class='add'>+			pr_err("pxa2xx-spi: failed to add software node\n");</div><div class='add'>+		} else {</div><div class='add'>+			platform_device_add(pd);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c<br/>index 8bc4ea51a0c1..03b4b347f11a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/spitz_pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-pxa/spitz_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/spitz_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-pxa/spitz_pm.c</a></div><div class='hunk'>@@ -35,18 +35,20 @@</div><div class='ctx'> </div><div class='ctx'> static int spitz_last_ac_status;</div><div class='ctx'> </div><div class='del'>-static struct gpio spitz_charger_gpios[] = {</div><div class='del'>-	{ SPITZ_GPIO_KEY_INT,	GPIOF_IN, "Keyboard Interrupt" },</div><div class='del'>-	{ SPITZ_GPIO_SYNC,	GPIOF_IN, "Sync" },</div><div class='del'>-	{ SPITZ_GPIO_AC_IN,     GPIOF_IN, "Charger Detection" },</div><div class='del'>-	{ SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },</div><div class='del'>-	{ SPITZ_GPIO_JK_B,	  GPIOF_OUT_INIT_LOW, "JK B" },</div><div class='del'>-	{ SPITZ_GPIO_CHRG_ON,	  GPIOF_OUT_INIT_LOW, "Charger On" },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void spitz_charger_init(void)</div><div class='ctx'> {</div><div class='del'>-	gpio_request_array(ARRAY_AND_SIZE(spitz_charger_gpios));</div><div class='add'>+	gpio_request(SPITZ_GPIO_KEY_INT, "Keyboard Interrupt");</div><div class='add'>+	gpio_direction_input(SPITZ_GPIO_KEY_INT);</div><div class='add'>+	gpio_request(SPITZ_GPIO_SYNC, "Sync");</div><div class='add'>+	gpio_direction_input(SPITZ_GPIO_SYNC);</div><div class='add'>+	gpio_request(SPITZ_GPIO_AC_IN, "Charger Detection");</div><div class='add'>+	gpio_direction_input(SPITZ_GPIO_AC_IN);</div><div class='add'>+	gpio_request(SPITZ_GPIO_ADC_TEMP_ON, "ADC Temp On");</div><div class='add'>+	gpio_direction_output(SPITZ_GPIO_ADC_TEMP_ON, 0);</div><div class='add'>+	gpio_request(SPITZ_GPIO_JK_B, "JK B");</div><div class='add'>+	gpio_direction_output(SPITZ_GPIO_JK_B, 0);</div><div class='add'>+	gpio_request(SPITZ_GPIO_CHRG_ON, "Charger On");</div><div class='add'>+	gpio_direction_output(SPITZ_GPIO_CHRG_ON, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void spitz_measure_temp(int on)</div><div class='head'>diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c<br/>index 5e25dfa752e9..1cfc0b1fa41c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-sa1100/h3600.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-sa1100/h3600.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-sa1100/h3600.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-sa1100/h3600.c</a></div><div class='hunk'>@@ -20,16 +20,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * helper for sa1100fb</div><div class='del'>- */</div><div class='del'>-static struct gpio h3600_lcd_gpio[] = {</div><div class='del'>-	{ H3XXX_EGPIO_LCD_ON,	GPIOF_OUT_INIT_LOW,	"LCD power" },</div><div class='del'>-	{ H3600_EGPIO_LCD_PCI,	GPIOF_OUT_INIT_LOW,	"LCD control" },</div><div class='del'>-	{ H3600_EGPIO_LCD_5V_ON, GPIOF_OUT_INIT_LOW,	"LCD 5v" },</div><div class='del'>-	{ H3600_EGPIO_LVDD_ON,	GPIOF_OUT_INIT_LOW,	"LCD 9v/-6.5v" },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static bool h3600_lcd_request(void)</div><div class='ctx'> {</div><div class='ctx'> 	static bool h3600_lcd_ok;</div><div class='hunk'>@@ -38,7 +28,42 @@ static bool h3600_lcd_request(void)</div><div class='ctx'> 	if (h3600_lcd_ok)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	rc = gpio_request_array(h3600_lcd_gpio, ARRAY_SIZE(h3600_lcd_gpio));</div><div class='add'>+	rc = gpio_request(H3XXX_EGPIO_LCD_ON, "LCD power");</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+	rc = gpio_direction_output(H3XXX_EGPIO_LCD_ON, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_on;</div><div class='add'>+	rc = gpio_request(H3600_EGPIO_LCD_PCI, "LCD control");</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_on;</div><div class='add'>+	rc = gpio_direction_output(H3600_EGPIO_LCD_PCI, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_pci;</div><div class='add'>+	rc = gpio_request(H3600_EGPIO_LCD_5V_ON, "LCD 5v");</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_pci;</div><div class='add'>+	rc = gpio_direction_output(H3600_EGPIO_LCD_5V_ON, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_5v_on;</div><div class='add'>+	rc = gpio_request(H3600_EGPIO_LVDD_ON, "LCD 9v/-6.5v");</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_5v_on;</div><div class='add'>+	rc = gpio_direction_output(H3600_EGPIO_LVDD_ON, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_free_lvdd_on;</div><div class='add'>+</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+out_free_lvdd_on:</div><div class='add'>+	gpio_free(H3600_EGPIO_LVDD_ON);</div><div class='add'>+out_free_5v_on:</div><div class='add'>+	gpio_free(H3600_EGPIO_LCD_5V_ON);</div><div class='add'>+out_free_pci:</div><div class='add'>+	gpio_free(H3600_EGPIO_LCD_PCI);</div><div class='add'>+out_free_on:</div><div class='add'>+	gpio_free(H3XXX_EGPIO_LCD_ON);</div><div class='add'>+out:</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		pr_err("%s: can't request GPIOs\n", __func__);</div><div class='ctx'> 	else</div><div class='head'>diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig<br/>index 98145031586f..ae21a9f78f9c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-stm32/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mach-stm32/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-stm32/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mach-stm32/Kconfig</a></div><div class='hunk'>@@ -12,6 +12,7 @@ menuconfig ARCH_STM32</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select RESET_CONTROLLER</div><div class='ctx'> 	select STM32_EXTI</div><div class='add'>+	select STM32_FIREWALL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for STMicroelectronics STM32 processors.</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c<br/>index e8c6f4be0ce1..5345d218899a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/mm/init.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> #include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> #include &lt;linux/swiotlb.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cp15.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='hunk'>@@ -486,3 +487,47 @@ void free_initrd_mem(unsigned long start, unsigned long end)</div><div class='ctx'> 	free_reserved_area((void *)start, (void *)end, -1, "initrd");</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+/*</div><div class='add'>+ * The XIP kernel text is mapped in the module area for modules and</div><div class='add'>+ * some other stuff to work without any indirect relocations.</div><div class='add'>+ * MODULES_VADDR is redefined here and not in asm/memory.h to avoid</div><div class='add'>+ * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.</div><div class='add'>+ */</div><div class='add'>+#undef MODULES_VADDR</div><div class='add'>+#define MODULES_VADDR	(((unsigned long)_exiprom + ~PMD_MASK) &amp; PMD_MASK)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long fallback_start = 0, fallback_end = 0;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS)) {</div><div class='add'>+		fallback_start = VMALLOC_START;</div><div class='add'>+		fallback_end = VMALLOC_END;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= MODULES_VADDR,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL_EXEC,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+				.fallback_start	= fallback_start,</div><div class='add'>+				.fallback_end	= fallback_end,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MMU */</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c<br/>index 1d672457d02f..deeb8f292454 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/net/bpf_jit_32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm/net/bpf_jit_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/net/bpf_jit_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm/net/bpf_jit_32.c</a></div><div class='hunk'>@@ -871,16 +871,11 @@ static inline void emit_a32_alu_r64(const bool is64, const s8 dst[],</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* dst = src (4 bytes)*/</div><div class='del'>-static inline void emit_a32_mov_r(const s8 dst, const s8 src, const u8 off,</div><div class='del'>-				  struct jit_ctx *ctx) {</div><div class='add'>+static inline void emit_a32_mov_r(const s8 dst, const s8 src, struct jit_ctx *ctx) {</div><div class='ctx'> 	const s8 *tmp = bpf2a32[TMP_REG_1];</div><div class='ctx'> 	s8 rt;</div><div class='ctx'> </div><div class='ctx'> 	rt = arm_bpf_get_reg32(src, tmp[0], ctx);</div><div class='del'>-	if (off &amp;&amp; off != 32) {</div><div class='del'>-		emit(ARM_LSL_I(rt, rt, 32 - off), ctx);</div><div class='del'>-		emit(ARM_ASR_I(rt, rt, 32 - off), ctx);</div><div class='del'>-	}</div><div class='ctx'> 	arm_bpf_put_reg32(dst, rt, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -889,15 +884,15 @@ static inline void emit_a32_mov_r64(const bool is64, const s8 dst[],</div><div class='ctx'> 				  const s8 src[],</div><div class='ctx'> 				  struct jit_ctx *ctx) {</div><div class='ctx'> 	if (!is64) {</div><div class='del'>-		emit_a32_mov_r(dst_lo, src_lo, 0, ctx);</div><div class='add'>+		emit_a32_mov_r(dst_lo, src_lo, ctx);</div><div class='ctx'> 		if (!ctx-&gt;prog-&gt;aux-&gt;verifier_zext)</div><div class='ctx'> 			/* Zero out high 4 bytes */</div><div class='ctx'> 			emit_a32_mov_i(dst_hi, 0, ctx);</div><div class='ctx'> 	} else if (__LINUX_ARM_ARCH__ &lt; 6 &amp;&amp;</div><div class='ctx'> 		   ctx-&gt;cpu_architecture &lt; CPU_ARCH_ARMv5TE) {</div><div class='ctx'> 		/* complete 8 byte move */</div><div class='del'>-		emit_a32_mov_r(dst_lo, src_lo, 0, ctx);</div><div class='del'>-		emit_a32_mov_r(dst_hi, src_hi, 0, ctx);</div><div class='add'>+		emit_a32_mov_r(dst_lo, src_lo, ctx);</div><div class='add'>+		emit_a32_mov_r(dst_hi, src_hi, ctx);</div><div class='ctx'> 	} else if (is_stacked(src_lo) &amp;&amp; is_stacked(dst_lo)) {</div><div class='ctx'> 		const u8 *tmp = bpf2a32[TMP_REG_1];</div><div class='ctx'> </div><div class='hunk'>@@ -917,17 +912,52 @@ static inline void emit_a32_mov_r64(const bool is64, const s8 dst[],</div><div class='ctx'> static inline void emit_a32_movsx_r64(const bool is64, const u8 off, const s8 dst[], const s8 src[],</div><div class='ctx'> 				      struct jit_ctx *ctx) {</div><div class='ctx'> 	const s8 *tmp = bpf2a32[TMP_REG_1];</div><div class='del'>-	const s8 *rt;</div><div class='add'>+	s8 rs;</div><div class='add'>+	s8 rd;</div><div class='add'>+</div><div class='add'>+	if (is_stacked(dst_lo))</div><div class='add'>+		rd = tmp[1];</div><div class='add'>+	else</div><div class='add'>+		rd = dst_lo;</div><div class='add'>+	rs = arm_bpf_get_reg32(src_lo, rd, ctx);</div><div class='add'>+	/* rs may be one of src[1], dst[1], or tmp[1] */</div><div class='ctx'> </div><div class='del'>-	rt = arm_bpf_get_reg64(dst, tmp, ctx);</div><div class='add'>+	/* Sign extend rs if needed. If off == 32, lower 32-bits of src are moved to dst and sign</div><div class='add'>+	 * extension only happens in the upper 64 bits.</div><div class='add'>+	 */</div><div class='add'>+	if (off != 32) {</div><div class='add'>+		/* Sign extend rs into rd */</div><div class='add'>+		emit(ARM_LSL_I(rd, rs, 32 - off), ctx);</div><div class='add'>+		emit(ARM_ASR_I(rd, rd, 32 - off), ctx);</div><div class='add'>+	} else {</div><div class='add'>+		rd = rs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write rd to dst_lo</div><div class='add'>+	 *</div><div class='add'>+	 * Optimization:</div><div class='add'>+	 * Assume:</div><div class='add'>+	 * 1. dst == src and stacked.</div><div class='add'>+	 * 2. off == 32</div><div class='add'>+	 *</div><div class='add'>+	 * In this case src_lo was loaded into rd(tmp[1]) but rd was not sign extended as off==32.</div><div class='add'>+	 * So, we don't need to write rd back to dst_lo as they have the same value.</div><div class='add'>+	 * This saves us one str instruction.</div><div class='add'>+	 */</div><div class='add'>+	if (dst_lo != src_lo || off != 32)</div><div class='add'>+		arm_bpf_put_reg32(dst_lo, rd, ctx);</div><div class='ctx'> </div><div class='del'>-	emit_a32_mov_r(dst_lo, src_lo, off, ctx);</div><div class='ctx'> 	if (!is64) {</div><div class='ctx'> 		if (!ctx-&gt;prog-&gt;aux-&gt;verifier_zext)</div><div class='ctx'> 			/* Zero out high 4 bytes */</div><div class='ctx'> 			emit_a32_mov_i(dst_hi, 0, ctx);</div><div class='ctx'> 	} else {</div><div class='del'>-		emit(ARM_ASR_I(rt[0], rt[1], 31), ctx);</div><div class='add'>+		if (is_stacked(dst_hi)) {</div><div class='add'>+			emit(ARM_ASR_I(tmp[0], rd, 31), ctx);</div><div class='add'>+			arm_bpf_put_reg32(dst_hi, tmp[0], ctx);</div><div class='add'>+		} else {</div><div class='add'>+			emit(ARM_ASR_I(dst_hi, rd, 31), ctx);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2222,28 +2252,21 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	/* If building the body of the JITed code fails somehow,</div><div class='ctx'> 	 * we fall back to the interpretation.</div><div class='ctx'> 	 */</div><div class='del'>-	if (build_body(&amp;ctx) &lt; 0) {</div><div class='del'>-		image_ptr = NULL;</div><div class='del'>-		bpf_jit_binary_free(header);</div><div class='del'>-		prog = orig_prog;</div><div class='del'>-		goto out_imms;</div><div class='del'>-	}</div><div class='add'>+	if (build_body(&amp;ctx) &lt; 0)</div><div class='add'>+		goto out_free;</div><div class='ctx'> 	build_epilogue(&amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* 3.) Extra pass to validate JITed Code */</div><div class='del'>-	if (validate_code(&amp;ctx)) {</div><div class='del'>-		image_ptr = NULL;</div><div class='del'>-		bpf_jit_binary_free(header);</div><div class='del'>-		prog = orig_prog;</div><div class='del'>-		goto out_imms;</div><div class='del'>-	}</div><div class='add'>+	if (validate_code(&amp;ctx))</div><div class='add'>+		goto out_free;</div><div class='ctx'> 	flush_icache_range((u32)header, (u32)(ctx.target + ctx.idx));</div><div class='ctx'> </div><div class='ctx'> 	if (bpf_jit_enable &gt; 1)</div><div class='ctx'> 		/* there are 2 passes here */</div><div class='ctx'> 		bpf_jit_dump(prog-&gt;len, image_size, 2, ctx.target);</div><div class='ctx'> </div><div class='del'>-	bpf_jit_binary_lock_ro(header);</div><div class='add'>+	if (bpf_jit_binary_lock_ro(header))</div><div class='add'>+		goto out_free;</div><div class='ctx'> 	prog-&gt;bpf_func = (void *)ctx.target;</div><div class='ctx'> 	prog-&gt;jited = 1;</div><div class='ctx'> 	prog-&gt;jited_len = image_size;</div><div class='hunk'>@@ -2260,5 +2283,11 @@ out:</div><div class='ctx'> 		bpf_jit_prog_release_other(prog, prog == orig_prog ?</div><div class='ctx'> 					   tmp : orig_prog);</div><div class='ctx'> 	return prog;</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	image_ptr = NULL;</div><div class='add'>+	bpf_jit_binary_free(header);</div><div class='add'>+	prog = orig_prog;</div><div class='add'>+	goto out_imms;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig<br/>index 7b11c98b3e84..2df0818c3ca9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/Kconfig</a></div><div class='hunk'>@@ -105,6 +105,7 @@ config ARM64</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS</div><div class='ctx'> 	select ARCH_WANT_HUGE_PMD_SHARE if ARM64_4K_PAGES || (ARM64_16K_PAGES &amp;&amp; !ARM64_VA_BITS_36)</div><div class='ctx'> 	select ARCH_WANT_LD_ORPHAN_WARN</div><div class='add'>+	select ARCH_WANTS_EXECMEM_LATE if EXECMEM</div><div class='ctx'> 	select ARCH_WANTS_NO_INSTR</div><div class='ctx'> 	select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES</div><div class='ctx'> 	select ARCH_HAS_UBSAN</div><div class='hunk'>@@ -255,9 +256,11 @@ config ARM64</div><div class='ctx'> 	select SYSCTL_EXCEPTION_TRACE</div><div class='ctx'> 	select THREAD_INFO_IN_TASK</div><div class='ctx'> 	select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD</div><div class='add'>+	select HAVE_ARCH_USERFAULTFD_WP if USERFAULTFD</div><div class='ctx'> 	select TRACE_IRQFLAGS_SUPPORT</div><div class='ctx'> 	select TRACE_IRQFLAGS_NMI_SUPPORT</div><div class='ctx'> 	select HAVE_SOFTIRQ_ON_OWN_STACK</div><div class='add'>+	select USER_STACKTRACE_SUPPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  ARM 64-bit (AArch64) Linux support.</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms<br/>index 24335565bad5..a52618073de2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/Kconfig.platforms?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/Kconfig.platforms</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/Kconfig.platforms?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/Kconfig.platforms</a></div><div class='hunk'>@@ -8,6 +8,13 @@ config ARCH_ACTIONS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the Actions Semiconductor S900 SoC family.</div><div class='ctx'> </div><div class='add'>+config ARCH_AIROHA</div><div class='add'>+	bool "Airoha SoC Support"</div><div class='add'>+	select ARM_PSCI</div><div class='add'>+	select HAVE_ARM_ARCH_TIMER</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the ARM64 based Airoha SoCs.</div><div class='add'>+</div><div class='ctx'> config ARCH_SUNXI</div><div class='ctx'> 	bool "Allwinner sunxi 64-bit SoC Family"</div><div class='ctx'> 	select ARCH_HAS_RESET_CONTROLLER</div><div class='hunk'>@@ -302,9 +309,11 @@ config ARCH_STM32</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select PINCTRL_STM32MP257</div><div class='add'>+	select STM32_EXTI</div><div class='ctx'> 	select ARM_SMC_MBOX</div><div class='ctx'> 	select ARM_SCMI_PROTOCOL</div><div class='ctx'> 	select COMMON_CLK_SCMI</div><div class='add'>+	select STM32_FIREWALL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for ARMv8 based STMicroelectronics</div><div class='ctx'> 	  STM32 family, including:</div><div class='head'>diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile<br/>index 0e075d3c546b..b8b1d4f4a572 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/Makefile</a></div><div class='hunk'>@@ -154,6 +154,10 @@ libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a</div><div class='ctx'> # Default target when executing plain make</div><div class='ctx'> boot		:= arch/arm64/boot</div><div class='ctx'> </div><div class='add'>+BOOT_TARGETS	:= Image vmlinuz.efi image.fit</div><div class='add'>+</div><div class='add'>+PHONY += $(BOOT_TARGETS)</div><div class='add'>+</div><div class='ctx'> ifeq ($(CONFIG_EFI_ZBOOT),)</div><div class='ctx'> KBUILD_IMAGE	:= $(boot)/Image.gz</div><div class='ctx'> else</div><div class='hunk'>@@ -162,8 +166,10 @@ endif</div><div class='ctx'> </div><div class='ctx'> all:	$(notdir $(KBUILD_IMAGE))</div><div class='ctx'> </div><div class='del'>-vmlinuz.efi: Image</div><div class='del'>-Image vmlinuz.efi: vmlinux</div><div class='add'>+image.fit: dtbs</div><div class='add'>+</div><div class='add'>+vmlinuz.efi image.fit: Image</div><div class='add'>+$(BOOT_TARGETS): vmlinux</div><div class='ctx'> 	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@</div><div class='ctx'> </div><div class='ctx'> Image.%: Image</div><div class='hunk'>@@ -215,6 +221,7 @@ virtconfig:</div><div class='ctx'> define archhelp</div><div class='ctx'>   echo  '* Image.gz      - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'</div><div class='ctx'>   echo  '  Image         - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'</div><div class='add'>+  echo  '  image.fit     - Flat Image Tree (arch/$(ARCH)/boot/image.fit)'</div><div class='ctx'>   echo  '  install       - Install uncompressed kernel'</div><div class='ctx'>   echo  '  zinstall      - Install compressed kernel'</div><div class='ctx'>   echo  '                  Install using (your) ~/bin/installkernel or'</div><div class='head'>diff --git a/arch/arm64/boot/.gitignore b/arch/arm64/boot/.gitignore<br/>index af5dc61f8b43..abaae9de1bdd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/.gitignore?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/.gitignore</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/.gitignore</a></div><div class='hunk'>@@ -2,3 +2,4 @@</div><div class='ctx'> Image</div><div class='ctx'> Image.gz</div><div class='ctx'> vmlinuz*</div><div class='add'>+image.fit</div><div class='head'>diff --git a/arch/arm64/boot/Makefile b/arch/arm64/boot/Makefile<br/>index a5a787371117..607a67a649c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/Makefile</a></div><div class='hunk'>@@ -16,7 +16,8 @@</div><div class='ctx'> </div><div class='ctx'> OBJCOPYFLAGS_Image :=-O binary -R .note -R .note.gnu.build-id -R .comment -S</div><div class='ctx'> </div><div class='del'>-targets := Image Image.bz2 Image.gz Image.lz4 Image.lzma Image.lzo Image.zst</div><div class='add'>+targets := Image Image.bz2 Image.gz Image.lz4 Image.lzma Image.lzo \</div><div class='add'>+	Image.zst image.fit</div><div class='ctx'> </div><div class='ctx'> $(obj)/Image: vmlinux FORCE</div><div class='ctx'> 	$(call if_changed,objcopy)</div><div class='hunk'>@@ -39,6 +40,9 @@ $(obj)/Image.lzo: $(obj)/Image FORCE</div><div class='ctx'> $(obj)/Image.zst: $(obj)/Image FORCE</div><div class='ctx'> 	$(call if_changed,zstd)</div><div class='ctx'> </div><div class='add'>+$(obj)/image.fit: $(obj)/Image $(obj)/dts/dtbs-list FORCE</div><div class='add'>+	$(call if_changed,fit)</div><div class='add'>+</div><div class='ctx'> EFI_ZBOOT_PAYLOAD	:= Image</div><div class='ctx'> EFI_ZBOOT_BFD_TARGET	:= elf64-littleaarch64</div><div class='ctx'> EFI_ZBOOT_MACH_TYPE	:= ARM64</div><div class='head'>diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts<br/>index 63e375cd9eb4..bd54b5165129 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/actions/s700-cubieboard7.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/actions/s700-cubieboard7.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/actions/s700-cubieboard7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/actions/s700-cubieboard7.dts</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory@1,e0000000 {</div><div class='add'>+	memory@1e0000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x1 0xe0000000 0x0 0x0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile<br/>index 21149b346a60..0db7b60b49a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/Makefile</a></div><div class='hunk'>@@ -39,6 +39,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h313-tanix-tx1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb</div><div class='hunk'>@@ -47,3 +48,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-2024.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-plus.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-h.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts<br/>index e6d5bc0f7a61..d1f415acd7b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts<br/>index 0af6dcdf7515..dec9960a7440 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts<br/>index bfb806cf6d7a..fd3794678c33 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts<br/>index 4f8529d5ac00..c8303a66438d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 8 GPIO_ACTIVE_LOW&gt;; /* PL8 */</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts<br/>index 50ed2e9f10ed..6c65d5bc16ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi<br/>index 87847116ab6d..6eab61a12cd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi</a></div><div class='hunk'>@@ -39,25 +39,35 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		led-0 {</div><div class='add'>+		led0: led-0 {</div><div class='ctx'> 			function = LED_FUNCTION_INDICATOR;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pio 3 20 GPIO_ACTIVE_HIGH&gt;; /* PD20 */</div><div class='add'>+			retain-state-suspended;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-1 {</div><div class='add'>+		led1: led-1 {</div><div class='ctx'> 			function = LED_FUNCTION_INDICATOR;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pio 3 18 GPIO_ACTIVE_HIGH&gt;; /* PD18 */</div><div class='add'>+			retain-state-suspended;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-2 {</div><div class='add'>+		led2: led-2 {</div><div class='ctx'> 			function = LED_FUNCTION_INDICATOR;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pio 3 19 GPIO_ACTIVE_HIGH&gt;; /* PD19 */</div><div class='add'>+			retain-state-suspended;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	multi-led {</div><div class='add'>+		compatible = "leds-group-multicolor";</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_INDICATOR;</div><div class='add'>+		leds = &lt;&amp;led0&gt;, &lt;&amp;led1&gt;, &lt;&amp;led2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_ps: ps-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ps";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts<br/>index 0a5607f73049..c6007df99938 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts</a></div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts<br/>index 1128030e4c25..b407e1dd08a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi<br/>index 57ac18738c99..ce4aa44c3353 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi</a></div><div class='hunk'>@@ -107,27 +107,19 @@</div><div class='ctx'> 	gpu_opp_table: opp-table-gpu {</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> </div><div class='del'>-		opp-120000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;120000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-312000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;312000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		opp-432000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;432000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	osc24M: osc24M_clk {</div><div class='add'>+	osc24M: osc24M-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 		clock-output-names = "osc24M";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	osc32k: osc32k_clk {</div><div class='add'>+	osc32k: osc32k-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;32768&gt;;</div><div class='hunk'>@@ -216,21 +208,21 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				cpu_alert0: cpu_alert0 {</div><div class='add'>+				cpu_alert0: cpu-alert0 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;75000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_alert1: cpu_alert1 {</div><div class='add'>+				cpu_alert1: cpu-alert1 {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;90000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				cpu_crit: cpu_crit {</div><div class='add'>+				cpu_crit: cpu-crit {</div><div class='ctx'> 					/* milliCelsius */</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts<br/>new file mode 100644<br/>index 000000000000..bb2cde59bd03<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Arm Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun50i-h616.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Tanix TX1";</div><div class='add'>+	compatible = "oranth,tanix-tx1", "allwinner,sun50i-h616";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		ethernet0 = &amp;sdio_wifi;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key {</div><div class='add'>+			label = "hidden";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 7 9 GPIO_ACTIVE_LOW&gt;; /* PH9 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 7 6 GPIO_ACTIVE_HIGH&gt;; /* PH6 */</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-0 = &lt;&amp;x32clk_fanout_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;pio 6 18 GPIO_ACTIVE_LOW&gt;; /* PG18 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply directly from the DC input */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	sdio_wifi: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp313: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp313a";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* Supplies VCC-PLL, so needs to be always on. */</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Supplies VCC-IO, so needs to be always on. */</div><div class='add'>+			reg_dldo1: dldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc3v3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;990000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1120000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpu";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_ph_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	dr_mode = "host";       /* USB A type receptable */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts<br/>index 4c3921ac236c..b69032c44557 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		states = &lt;1100000 0&gt;, &lt;1300000 1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts<br/>index a3e040da38a0..3a7ee44708a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts</a></div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		states = &lt;1100000 0x0&gt;, &lt;1300000 0x1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PL7 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='hunk'>@@ -170,7 +170,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	rtl8189etv: sdio_wifi@1 {</div><div class='add'>+	rtl8189etv: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts<br/>index d7f8bad6bb98..b699bb900e13 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 2 14 GPIO_ACTIVE_LOW&gt;; /* PC14 */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts<br/>index 7ec5ac850a0d..ae85131aac9c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts</a></div><div class='hunk'>@@ -97,7 +97,7 @@</div><div class='ctx'> 	 * Explicitly define the sdio device, so that we can add an ethernet</div><div class='ctx'> 	 * alias for it (which e.g. makes u-boot set a mac-address).</div><div class='ctx'> 	 */</div><div class='del'>-	rtl8189ftv: sdio_wifi@1 {</div><div class='add'>+	rtl8189ftv: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts<br/>index 22530ace12d5..734481e998b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 0 9 GPIO_ACTIVE_LOW&gt;; /* PA9 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts<br/>index 381d58cea092..3be1e8c2fdb9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ext_osc32k: ext_osc32k_clk {</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;32768&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts<br/>index 6fc65e8db220..6c3bfe3d09d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ext_osc32k: ext_osc32k_clk {</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;32768&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts<br/>index fb31dcb1cb6d..a3f65a45bd26 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> 		serial1 = &amp;uart1; /* BT-UART */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi<br/>index 92745128fcfe..13b07141c334 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ext_osc32k: ext_osc32k_clk {</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;32768&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts<br/>index b710f1a0f53a..66fe03910d5e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts</a></div><div class='hunk'>@@ -5,13 +5,13 @@</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h6-pine-h64.dts"</div><div class='ctx'> </div><div class='add'>+/delete-node/ &amp;reg_gmac_3v3;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Pine H64 model B";</div><div class='ctx'> 	compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";</div><div class='ctx'> </div><div class='del'>-	/delete-node/ reg_gmac_3v3;</div><div class='del'>-</div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 1 3 GPIO_ACTIVE_LOW&gt;; /* PM3 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts<br/>index 1ffd68f43f87..3910393be1f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ext_osc32k: ext_osc32k_clk {</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;32768&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi<br/>index d11e5041bae9..8a8591c4e7dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	osc24M: osc24M_clk {</div><div class='add'>+	osc24M: osc24M-clk {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;24000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi<br/>index af421ba24ce0..d12b01c5f41b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -62,6 +63,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='ctx'> 	/* Card detection pin is not connected */</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi<br/>new file mode 100644<br/>index 000000000000..aca22a7f0191<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+// Copyright (C) 2023 Martin Botka &lt;martin@somainline.org&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpu_opp_table: opp-table-cpu {</div><div class='add'>+		compatible = "allwinner,sun50i-h616-operating-points";</div><div class='add'>+		nvmem-cells = &lt;&amp;cpu_speed_grade&gt;;</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-480000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;480000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x1f&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x12&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-720000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;720000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x0d&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-792000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;792000000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt-speed4 = &lt;940000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x12&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-936000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;936000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x0d&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1008000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='add'>+			opp-microvolt-speed0 = &lt;950000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;940000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;950000&gt;;</div><div class='add'>+			opp-microvolt-speed3 = &lt;950000&gt;;</div><div class='add'>+			opp-microvolt-speed4 = &lt;1020000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x1f&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1104000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1104000000&gt;;</div><div class='add'>+			opp-microvolt-speed0 = &lt;1000000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;1000000&gt;;</div><div class='add'>+			opp-microvolt-speed3 = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x0d&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt-speed0 = &lt;1050000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;1020000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;1050000&gt;;</div><div class='add'>+			opp-microvolt-speed3 = &lt;1050000&gt;;</div><div class='add'>+			opp-microvolt-speed4 = &lt;1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x1f&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1320000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1320000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x1d&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x0d&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1512000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;1100000&gt;;</div><div class='add'>+			opp-microvolt-speed3 = &lt;1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-supported-hw = &lt;0x0a&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts<br/>index b5d713926a34..a360d8567f95 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts</a></div><div class='hunk'>@@ -6,12 +6,17 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616-orangepi-zero.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "OrangePi Zero2";</div><div class='ctx'> 	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdca&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;emac0 {</div><div class='ctx'> 	allwinner,rx-delay-ps = &lt;3100&gt;;</div><div class='ctx'> 	allwinner,tx-delay-ps = &lt;700&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts<br/>index 959b6fd18483..26d25b5b59e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -32,6 +33,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdca&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ehci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi<br/>index b2e85e52d1a1..921d5f61d8d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -34,6 +35,7 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -42,6 +44,7 @@</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -50,6 +53,7 @@</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -156,6 +160,10 @@</div><div class='ctx'> 			ths_calibration: thermal-sensor-calibration@14 {</div><div class='ctx'> 				reg = &lt;0x14 0x8&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			cpu_speed_grade: cpu-speed-grade@0 {</div><div class='add'>+				reg = &lt;0x0 2&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		watchdog: watchdog@30090a0 {</div><div class='hunk'>@@ -194,7 +202,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			i2c0_pins: i2c0-pins {</div><div class='del'>-				pins = "PI6", "PI7";</div><div class='add'>+				pins = "PI5", "PI6";</div><div class='ctx'> 				function = "i2c0";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -775,6 +783,15 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		nmi_intc: interrupt-controller@7010320 {</div><div class='add'>+			compatible = "allwinner,sun50i-h616-nmi",</div><div class='add'>+				     "allwinner,sun9i-a80-nmi";</div><div class='add'>+			reg = &lt;0x07010320 0xc&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		r_pio: pinctrl@7022000 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-h616-r-pinctrl";</div><div class='ctx'> 			reg = &lt;0x07022000 0x400&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi<br/>index 8c1263a3939e..e92d150aaf1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi</a></div><div class='hunk'>@@ -4,6 +4,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> &amp;mmc2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts<br/>index 21ca1977055d..6a4f0da97233 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -53,6 +54,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ehci1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts<br/>index b3b1b8692125..e1cd7572a14c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts</a></div><div class='hunk'>@@ -6,12 +6,17 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616-orangepi-zero.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "OrangePi Zero3";</div><div class='ctx'> 	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;emac0 {</div><div class='ctx'> 	allwinner,tx-delay-ps = &lt;700&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts<br/>index ac0a2b7ea6f3..d6631bfe629f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -41,7 +42,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='hunk'>@@ -51,6 +52,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ehci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts<br/>index b6e3c169797f..c204dd43c726 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		reset-gpios = &lt;&amp;r_pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PL2 */</div><div class='ctx'> 		post-power-on-delay-ms = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts<br/>new file mode 100644<br/>index 000000000000..ee30584b6ad7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts</a></div><div class='hunk'>@@ -0,0 +1,327 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Ryan Walklin &lt;ryan@testtoast.com&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun50i-h616.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Anbernic RG35XX 2024";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+	compatible = "anbernic,rg35xx-2024", "allwinner,sun50i-h700";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys_gamepad: gpio-keys-gamepad {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-a {</div><div class='add'>+			label = "Action-Pad A";</div><div class='add'>+			gpios = &lt;&amp;pio 0 0 GPIO_ACTIVE_LOW&gt;; /* PA0 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_EAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-b {</div><div class='add'>+			label = "Action-Pad B";</div><div class='add'>+			gpios = &lt;&amp;pio 0 1 GPIO_ACTIVE_LOW&gt;; /* PA1 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_SOUTH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-down {</div><div class='add'>+			label = "D-Pad Down";</div><div class='add'>+			gpios = &lt;&amp;pio 4 0 GPIO_ACTIVE_LOW&gt;; /* PE0 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_DPAD_DOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-l1 {</div><div class='add'>+			label = "Key L1";</div><div class='add'>+			gpios = &lt;&amp;pio 0 10 GPIO_ACTIVE_LOW&gt;; /* PA10 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_TL&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-l2 {</div><div class='add'>+			label = "Key L2";</div><div class='add'>+			gpios = &lt;&amp;pio 0 11 GPIO_ACTIVE_LOW&gt;; /* PA11 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_TL2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-left {</div><div class='add'>+			label = "D-Pad left";</div><div class='add'>+			gpios = &lt;&amp;pio 0 8 GPIO_ACTIVE_LOW&gt;; /* PA8 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_DPAD_LEFT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-menu {</div><div class='add'>+			label = "Key Menu";</div><div class='add'>+			gpios = &lt;&amp;pio 4 3 GPIO_ACTIVE_LOW&gt;; /* PE3 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_MODE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-r1 {</div><div class='add'>+			label = "Key R1";</div><div class='add'>+			gpios = &lt;&amp;pio 0 12 GPIO_ACTIVE_LOW&gt;; /* PA12 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_TR&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-r2 {</div><div class='add'>+			label = "Key R2";</div><div class='add'>+			gpios = &lt;&amp;pio 0 7 GPIO_ACTIVE_LOW&gt;; /* PA7 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_TR2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-right {</div><div class='add'>+			label = "D-Pad Right";</div><div class='add'>+			gpios = &lt;&amp;pio 0 9 GPIO_ACTIVE_LOW&gt;; /* PA9 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_DPAD_RIGHT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-select {</div><div class='add'>+			label = "Key Select";</div><div class='add'>+			gpios = &lt;&amp;pio 0 5 GPIO_ACTIVE_LOW&gt;; /* PA5 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_SELECT&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-start {</div><div class='add'>+			label = "Key Start";</div><div class='add'>+			gpios = &lt;&amp;pio 0 4 GPIO_ACTIVE_LOW&gt;; /* PA4 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_START&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-up {</div><div class='add'>+			label = "D-Pad Up";</div><div class='add'>+			gpios = &lt;&amp;pio 0 6 GPIO_ACTIVE_LOW&gt;; /* PA6 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_DPAD_UP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-x {</div><div class='add'>+			label = "Action-Pad X";</div><div class='add'>+			gpios = &lt;&amp;pio 0 3 GPIO_ACTIVE_LOW&gt;; /* PA3 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_NORTH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-y {</div><div class='add'>+			label = "Action Pad Y";</div><div class='add'>+			gpios = &lt;&amp;pio 0 2 GPIO_ACTIVE_LOW&gt;; /* PA2 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_WEST&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys-volume {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			label = "Key Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pio 4 1 GPIO_ACTIVE_LOW&gt;; /* PE1 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-down {</div><div class='add'>+			label = "Key Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pio 4 2 GPIO_ACTIVE_LOW&gt;; /* PE2 */</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 8 12 GPIO_ACTIVE_HIGH&gt;; /* PI12 */</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: regulator-vcc5v { /* USB-C power input */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;  /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pa-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_aldo4&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_rsb {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp717: pmic@3a3 {</div><div class='add'>+		compatible = "x-powers,axp717";</div><div class='add'>+		reg = &lt;0x3a3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin4-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpu";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;940000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;940000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				/* 1.8v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo2: aldo2 {</div><div class='add'>+				/* 1.8v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo3: aldo3 {</div><div class='add'>+				/* 1.8v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo4: aldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pg";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo1: bldo1 {</div><div class='add'>+				/* 1.8v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo2: bldo2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pll";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo3: bldo3 {</div><div class='add'>+				/* 2.8v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo4: bldo4 {</div><div class='add'>+				/* 1.2v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo1: cldo1 {</div><div class='add'>+				/* 3.3v - audio codec - not yet implemented */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo2: cldo2 {</div><div class='add'>+				/* 3.3v - unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo3: cldo3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-io";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo4: cldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-wifi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_boost: boost {</div><div class='add'>+				regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;5200000&gt;;</div><div class='add'>+				regulator-name = "boost";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cpusldo: cpusldo {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_ph_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* the AXP717 has USB type-C role switch functionality, not yet described by the binding */</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	dr_mode = "peripheral";   /* USB type-C receptable */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts<br/>new file mode 100644<br/>index 000000000000..63036256917f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Ryan Walklin &lt;ryan@testtoast.com&gt;.</div><div class='add'>+ * Copyright (C) 2024 Chris Morgan &lt;macroalpha82@gmail.com&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sun50i-h700-anbernic-rg35xx-plus.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Anbernic RG35XX H";</div><div class='add'>+	compatible = "anbernic,rg35xx-h", "allwinner,sun50i-h700";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio_keys_gamepad {</div><div class='add'>+	button-thumbl {</div><div class='add'>+		label = "GPIO Thumb Left";</div><div class='add'>+		gpios = &lt;&amp;pio 4 8 GPIO_ACTIVE_LOW&gt;; /* PE8 */</div><div class='add'>+		linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+		linux,code = &lt;BTN_THUMBL&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-thumbr {</div><div class='add'>+		label = "GPIO Thumb Right";</div><div class='add'>+		gpios = &lt;&amp;pio 4 9 GPIO_ACTIVE_LOW&gt;; /* PE9 */</div><div class='add'>+		linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+		linux,code = &lt;BTN_THUMBR&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts<br/>new file mode 100644<br/>index 000000000000..60a8e4922103<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Ryan Walklin &lt;ryan@testtoast.com&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sun50i-h700-anbernic-rg35xx-2024.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Anbernic RG35XX Plus";</div><div class='add'>+	compatible = "anbernic,rg35xx-plus", "allwinner,sun50i-h700";</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-0 = &lt;&amp;x32clk_fanout_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 6 18 GPIO_ACTIVE_LOW&gt;; /* PG18 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SDIO WiFi RTL8821CS */</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo4&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_aldo4&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	sdio_wifi: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;6 15 IRQ_TYPE_LEVEL_LOW&gt;; /* PG15 */</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bluetooth RTL8821CS */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;, &lt;&amp;uart1_rts_cts_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt";</div><div class='add'>+		device-wake-gpios = &lt;&amp;pio 6 17 GPIO_ACTIVE_HIGH&gt;; /* PG17 */</div><div class='add'>+		enable-gpios = &lt;&amp;pio 6 19 GPIO_ACTIVE_HIGH&gt;; /* PG19 */</div><div class='add'>+		host-wake-gpios = &lt;&amp;pio 6 16 GPIO_ACTIVE_HIGH&gt;; /* PG16 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi<br/>index 072fe20cfca0..cbbc53c47921 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;0 170 4&gt;,</div><div class='ctx'> 			     &lt;0 171 4&gt;,</div><div class='ctx'> 			     &lt;0 172 4&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi<br/>index dbf2dce8d1d6..da9de4986660 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Annapurna Labs Alpine v2";</div><div class='ctx'> 	compatible = "al,alpine-v2";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +90,22 @@</div><div class='ctx'> 		clock-frequency = &lt;1000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a57-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -97,22 +114,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		timer {</div><div class='del'>-			compatible = "arm,armv8-timer";</div><div class='del'>-			interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-				     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-				     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-				     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pmu {</div><div class='del'>-			compatible = "arm,armv8-pmuv3";</div><div class='del'>-			interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		gic: interrupt-controller@f0200000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			reg = &lt;0x0 0xf0200000 0x0 0x10000&gt;,	/* GIC Dist */</div><div class='hunk'>@@ -150,7 +151,7 @@</div><div class='ctx'> 			al,msi-num-spis = &lt;160&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		io-fabric {</div><div class='add'>+		io-fabric@fc000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi<br/>index 3ea178acdddf..8b6156b5af65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a></div><div class='hunk'>@@ -244,7 +244,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;cluster3_l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cluster0_l2: cache@0 {</div><div class='add'>+		cluster0_l2: cache-0 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-size = &lt;0x200000&gt;;</div><div class='ctx'> 			cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -253,7 +253,7 @@</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cluster1_l2: cache@100 {</div><div class='add'>+		cluster1_l2: cache-100 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-size = &lt;0x200000&gt;;</div><div class='ctx'> 			cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -262,7 +262,7 @@</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cluster2_l2: cache@200 {</div><div class='add'>+		cluster2_l2: cache-200 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-size = &lt;0x200000&gt;;</div><div class='ctx'> 			cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -271,7 +271,7 @@</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cluster3_l2: cache@300 {</div><div class='add'>+		cluster3_l2: cache-300 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-size = &lt;0x200000&gt;;</div><div class='ctx'> 			cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -318,7 +318,7 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		gic: interrupt-controller@f0000000 {</div><div class='add'>+		gic: interrupt-controller@f0800000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='hunk'>@@ -361,7 +361,7 @@</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		io-fabric {</div><div class='add'>+		io-fabric@fc000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/elba-16core.dtsi b/arch/arm64/boot/dts/amd/elba-16core.dtsi<br/>index 568bcc39ce9f..6c1b7b8fe354 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-16core.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-16core.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-16core.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amd/elba-16core.dtsi</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2020-2023 Advanced Micro Devices, Inc.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/elba-asic-common.dtsi b/arch/arm64/boot/dts/amd/elba-asic-common.dtsi<br/>index 46b6c6783f58..d12e9a7b5587 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-asic-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-asic-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-asic-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amd/elba-asic-common.dtsi</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2020-2022 Advanced Micro Devices, Inc.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/elba-asic.dts b/arch/arm64/boot/dts/amd/elba-asic.dts<br/>index c3f4da2f7449..20b0fa0807a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-asic.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-asic.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-asic.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amd/elba-asic.dts</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> /*</div><div class='ctx'>  * Device Tree file for AMD Pensando Elba Board.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/elba-flash-parts.dtsi b/arch/arm64/boot/dts/amd/elba-flash-parts.dtsi<br/>index cf761a05a81f..6ea2d777c8c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-flash-parts.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba-flash-parts.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba-flash-parts.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amd/elba-flash-parts.dtsi</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2020-2023 Advanced Micro Devices, Inc.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/elba.dtsi b/arch/arm64/boot/dts/amd/elba.dtsi<br/>index 674890cf2a34..758bce0a0b2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/amd/elba.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amd/elba.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/amd/elba.dtsi</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2020-2022 Advanced Micro Devices, Inc.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-merlin.dts b/arch/arm64/boot/dts/apm/apm-merlin.dts<br/>index 2e8069002ec1..6e05cf1a3df6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-merlin.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-merlin.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-merlin.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/apm/apm-merlin.dts</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> 	chosen { };</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@100000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt; 0x1 0x00000000 0x0 0x80000000 &gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-mustang.dts b/arch/arm64/boot/dts/apm/apm-mustang.dts<br/>index 033e10e12b18..e7644cddf06f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-mustang.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-mustang.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-mustang.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/apm/apm-mustang.dts</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> 	chosen { };</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@100000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt; 0x1 0x00000000 0x0 0x80000000 &gt;; /* Updated by bootloader */</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi<br/>index 65ebac3082e2..ea5721ea02f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-shadowcat.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/apm/apm-shadowcat.dtsi</a></div><div class='hunk'>@@ -211,6 +211,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	refclk: refclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		clock-output-names = "refclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu {</div><div class='ctx'> 		compatible = "arm,armv8-pmuv3";</div><div class='ctx'> 		interrupts = &lt;1 12 0xff04&gt;;</div><div class='hunk'>@@ -236,13 +243,6 @@</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			refclk: refclk {</div><div class='del'>-				compatible = "fixed-clock";</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clock-frequency = &lt;100000000&gt;;</div><div class='del'>-				clock-output-names = "refclk";</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			pmdpll: pmdpll@170000f0 {</div><div class='ctx'> 				compatible = "apm,xgene-pcppll-v2-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi<br/>index 988928c60f15..532401bc9c66 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-storm.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apm/apm-storm.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a></div><div class='hunk'>@@ -112,6 +112,13 @@</div><div class='ctx'> 		interrupts = &lt;1 9 0xf04&gt;;	/* GIC Maintenence IRQ */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	refclk: refclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		clock-output-names = "refclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts = &lt;1 0 0xff08&gt;,	/* Secure Phys IRQ */</div><div class='hunk'>@@ -122,7 +129,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "apm,potenza-pmu", "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "apm,potenza-pmu";</div><div class='ctx'> 		interrupts = &lt;1 12 0xff04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -137,12 +144,6 @@</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='del'>-			refclk: refclk {</div><div class='del'>-				compatible = "fixed-clock";</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clock-frequency = &lt;100000000&gt;;</div><div class='del'>-				clock-output-names = "refclk";</div><div class='del'>-			};</div><div class='ctx'> </div><div class='ctx'> 			pcppll: pcppll@17000100 {</div><div class='ctx'> 				compatible = "apm,xgene-pcppll-clock";</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi<br/>index b897f5542c0a..98ed2b329ed6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/juno-base.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/arm/juno-base.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/juno-base.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/arm/juno-base.dtsi</a></div><div class='hunk'>@@ -773,14 +773,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		big_cluster_thermal_zone: big-cluster-thermal {</div><div class='add'>+		big_cluster_thermal_zone: big-cl-thermal {</div><div class='ctx'> 			polling-delay = &lt;1000&gt;;</div><div class='ctx'> 			polling-delay-passive = &lt;100&gt;;</div><div class='ctx'> 			thermal-sensors = &lt;&amp;scpi_sensors0 21&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		little_cluster_thermal_zone: little-cluster-thermal {</div><div class='add'>+		little_cluster_thermal_zone: little-cl-thermal {</div><div class='ctx'> 			polling-delay = &lt;1000&gt;;</div><div class='ctx'> 			polling-delay-passive = &lt;100&gt;;</div><div class='ctx'> 			thermal-sensors = &lt;&amp;scpi_sensors0 22&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-scmi.dtsi b/arch/arm64/boot/dts/arm/juno-scmi.dtsi<br/>index 31929e2377d8..f38c5b6ef657 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/juno-scmi.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/arm/juno-scmi.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/juno-scmi.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/arm/juno-scmi.dtsi</a></div><div class='hunk'>@@ -84,11 +84,11 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;scmi_sensors0 3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		big-cluster-thermal {</div><div class='add'>+		big-cl-thermal {</div><div class='ctx'> 			thermal-sensors = &lt;&amp;scmi_sensors0 21&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		little-cluster-thermal {</div><div class='add'>+		little-cl-thermal {</div><div class='ctx'> 			thermal-sensors = &lt;&amp;scmi_sensors0 22&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts<br/>index 8db4243a4947..9115c99d0dc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts</a></div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi<br/>index e01cf4f54077..8b924812322c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi</a></div><div class='hunk'>@@ -594,6 +594,7 @@</div><div class='ctx'> 			reg-names = "nand", "nand-int-base";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "nand_ctlrdy";</div><div class='add'>+			brcm,wp-not-connected;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			nandcs: nand@0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts<br/>index 030ffa5364fb..e5b37643296b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;nand_controller {</div><div class='del'>-	brcm,wp-not-connected;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts<br/>index dec5a110f1e8..f43cfe66b6af 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts</a></div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'> 		bootargs = "earlycon=uart8250,mmio32,0x66130000";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts b/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts<br/>index 1d314f17bbdd..c50df1d02797 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		bootargs = "earlycon=uart8250,mmio32,0x66130000";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000001 0x00000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi<br/>index 896d1f33b5b6..cfd9fd23a1c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi</a></div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a57-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi<br/>index d8516ec0dae7..857fa427e195 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi</a></div><div class='hunk'>@@ -142,7 +142,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi<br/>index 8ad31dee11a3..cc860a80af51 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/cavium/thunder-88xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/cavium/thunder-88xx.dtsi</a></div><div class='hunk'>@@ -361,24 +361,24 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "cavium,thunder-pmu";</div><div class='ctx'> 		interrupts = &lt;1 7 4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	refclk50mhz: refclk50mhz {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		clock-output-names = "refclk50mhz";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		refclk50mhz: refclk50mhz {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;50000000&gt;;</div><div class='del'>-			clock-output-names = "refclk50mhz";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gic0: interrupt-controller@8010,00000000 {</div><div class='add'>+		gic0: interrupt-controller@801000000000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -397,7 +397,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uaa0: serial@87e0,24000000 {</div><div class='add'>+		uaa0: serial@87e024000000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x87e0 0x24000000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;1 21 4&gt;;</div><div class='hunk'>@@ -405,7 +405,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uaa1: serial@87e0,25000000 {</div><div class='add'>+		uaa1: serial@87e025000000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x87e0 0x25000000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;1 22 4&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dts b/arch/arm64/boot/dts/cavium/thunder2-99xx.dts<br/>index d005e1e79c3d..89fc4107a0c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/cavium/thunder2-99xx.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/cavium/thunder2-99xx.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/cavium/thunder2-99xx.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/cavium/thunder2-99xx.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> 	model = "Cavium ThunderX2 CN99XX";</div><div class='ctx'> 	compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x0 0x80000000&gt;,  /* 2G @ 2G  */</div><div class='ctx'> 		      &lt;0x00000008 0x80000000 0x0 0x80000000&gt;;  /* 2G @ 34G */</div><div class='head'>diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi<br/>index 3419bd252696..6dfe78a7d4ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi</a></div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "brcm,vulcan-pmu", "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "brcm,vulcan-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;; /* PMU overflow */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -103,7 +103,6 @@</div><div class='ctx'> </div><div class='ctx'> 		/* ECAM at 0x3000_0000 - 0x4000_0000 */</div><div class='ctx'> 		reg = &lt;0x0 0x30000000  0x0 0x10000000&gt;;</div><div class='del'>-		reg-names = "PCI ECAM";</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * PCI ranges:</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi<br/>index 7fbbec04bff0..0b9053b9b2b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/exynos5433.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/exynos5433.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/exynos5433.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/exynos/exynos5433.dtsi</a></div><div class='hunk'>@@ -1468,6 +1468,7 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='add'>+			fifo-depth = &lt;256&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1487,6 +1488,7 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1506,6 +1508,7 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi2_bus&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1525,6 +1528,7 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi3_bus&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1544,6 +1548,7 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;spi4_bus&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi<br/>index 2ba67c3d0681..0706c8534ceb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/exynos850.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/exynos850.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/exynos850.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/exynos/exynos850.dtsi</a></div><div class='hunk'>@@ -93,6 +93,8 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cmu_cpucl0 CLK_CLUSTER0_SCLK&gt;;</div><div class='add'>+			clock-names = "cluster0_clk";</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -117,6 +119,8 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cmu_cpucl1 CLK_CLUSTER1_SCLK&gt;;</div><div class='add'>+			clock-names = "cluster1_clk";</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -254,6 +258,28 @@</div><div class='ctx'> 				      "dout_peri_uart", "dout_peri_ip";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_cpucl1: clock-controller@10800000 {</div><div class='add'>+			compatible = "samsung,exynos850-cmu-cpucl1";</div><div class='add'>+			reg = &lt;0x10800000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;, &lt;&amp;cmu_top CLK_DOUT_CPUCL1_SWITCH&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CPUCL1_DBG&gt;;</div><div class='add'>+			clock-names = "oscclk", "dout_cpucl1_switch",</div><div class='add'>+				      "dout_cpucl1_dbg";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_cpucl0: clock-controller@10900000 {</div><div class='add'>+			compatible = "samsung,exynos850-cmu-cpucl0";</div><div class='add'>+			reg = &lt;0x10900000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;, &lt;&amp;cmu_top CLK_DOUT_CPUCL0_SWITCH&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CPUCL0_DBG&gt;;</div><div class='add'>+			clock-names = "oscclk", "dout_cpucl0_switch",</div><div class='add'>+				      "dout_cpucl0_dbg";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmu_g3d: clock-controller@11400000 {</div><div class='ctx'> 			compatible = "samsung,exynos850-cmu-g3d";</div><div class='ctx'> 			reg = &lt;0x11400000 0x8000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi<br/>index c871a2f49fda..0248329da49a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/exynosautov9.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/exynosautov9.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/exynosautov9.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/exynos/exynosautov9.dtsi</a></div><div class='hunk'>@@ -435,6 +435,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;256&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -526,6 +527,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;256&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -617,6 +619,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -708,6 +711,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -799,6 +803,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -890,6 +895,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -981,6 +987,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;256&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1072,6 +1079,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1163,6 +1171,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1254,6 +1263,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1345,6 +1355,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1434,6 +1445,7 @@</div><div class='ctx'> 				num-cs = &lt;1&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts<br/>index 6ccade2c8cb4..5e8ffe065081 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/google/gs101-oriole.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/exynos/google/gs101-oriole.dts</a></div><div class='hunk'>@@ -29,8 +29,8 @@</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;key_voldown&gt;, &lt;&amp;key_volup&gt;, &lt;&amp;key_power&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 		button-vol-down {</div><div class='ctx'> 			label = "KEY_VOLUMEDOWN";</div><div class='hunk'>@@ -53,6 +53,21 @@</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once PMIC is implemented  */</div><div class='add'>+	reg_placeholder: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "placeholder_reg";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once S2MPG11 slave PMIC is implemented  */</div><div class='add'>+	ufs_0_fixed_vcc_reg: regulator-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ufs-vcc";</div><div class='add'>+		gpio = &lt;&amp;gpp0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ext_24_5m {</div><div class='hunk'>@@ -103,8 +118,33 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serial_0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart0_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vcc-supply = &lt;&amp;ufs_0_fixed_vcc_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd31 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vdd10-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	vdd33-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd31_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	maximum-speed = "super-speed-plus";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd31_phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi<br/>index 55e6bcb3689e..a66e996666b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/google/gs101.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/exynos/google/gs101.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/exynos/google/gs101.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/exynos/google/gs101.dtsi</a></div><div class='hunk'>@@ -370,12 +370,398 @@</div><div class='ctx'> 		pinctrl_peric0: pinctrl@10840000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x10840000 0x00001000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_GPIO_PERIC0_PCLK&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usi1: usi@109000c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109000c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_1: i2c@10900000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10900000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c1_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_1: serial@10900000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10900000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart1_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_1: spi@10900000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10900000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi2: usi@109100c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109100c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1004&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_2: i2c@10910000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10910000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c2_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_2: serial@10910000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10910000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart2_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_2: spi@10910000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10910000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi2_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi3: usi@109200c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109200c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1008&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_3: i2c@10920000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10920000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c3_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_3: serial@10920000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10920000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart3_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_3: spi@10920000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10920000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi3_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi4: usi@109300c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109300c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x100c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_4: i2c@10930000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10930000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c4_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_4: serial@10930000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10930000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart4_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_4: spi@10930000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10930000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi4_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi5: usi@109400c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109400c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1010&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_5: i2c@10940000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10940000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_5: serial@10940000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10940000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart5_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_5: spi@10940000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10940000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi6: usi@109500c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109500c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1014&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_6: i2c@10950000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10950000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c6_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_6: serial@10950000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10950000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart6_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_6: spi@10950000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10950000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi6_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi7: usi@109600c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109600c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1018&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_7: i2c@10960000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10960000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c7_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_7: serial@10960000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10960000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart7_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_7: spi@10960000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10960000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi7_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usi8: usi@109700c0 {</div><div class='del'>-			compatible = "google,gs101-usi",</div><div class='del'>-				     "samsung,exynos850-usi";</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109700c0 0x20&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -393,18 +779,44 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				pinctrl-names = "default";</div><div class='del'>-				pinctrl-0 = &lt;&amp;hsi2c8_bus&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7&gt;,</div><div class='ctx'> 					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7&gt;;</div><div class='ctx'> 				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c8_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_8: serial@10970000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10970000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart8_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_8: spi@10970000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10970000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi8_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usi_uart: usi@10a000c0 {</div><div class='del'>-			compatible = "google,gs101-usi",</div><div class='del'>-				     "samsung,exynos850-usi";</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x10a000c0 0x20&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -419,16 +831,72 @@</div><div class='ctx'> 			serial_0: serial@10a00000 {</div><div class='ctx'> 				compatible = "google,gs101-uart";</div><div class='ctx'> 				reg = &lt;0x10a00000 0xc0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 634</div><div class='del'>-					      IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0&gt;,</div><div class='ctx'> 					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0&gt;;</div><div class='ctx'> 				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart0_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				samsung,uart-fifosize = &lt;256&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usi14: usi@10a200c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10a200c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1028&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_14: i2c@10a20000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10a20000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c14_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_14: serial@10a20000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10a20000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart14_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_14: spi@10a20000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10a20000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi14_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmu_peric1: clock-controller@10c00000 {</div><div class='ctx'> 			compatible = "google,gs101-cmu-peric1";</div><div class='ctx'> 			reg = &lt;0x10c00000 0x4000&gt;;</div><div class='hunk'>@@ -448,12 +916,233 @@</div><div class='ctx'> 		pinctrl_peric1: pinctrl@10c40000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x10c40000 0x00001000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usi0: usi@10d100c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d100c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric1 0x1000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_0: i2c@10d10000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10d10000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c0_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_usi0: serial@10d10000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10d10000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart0_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_0: spi@10d10000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10d10000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi9: usi@10d200c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d200c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric1 0x1004&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_9: i2c@10d20000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10d20000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c9_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_9: serial@10d20000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10d20000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart9_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_9: spi@10d20000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10d20000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi9_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi10: usi@10d300c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d300c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric1 0x1008&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_10: i2c@10d30000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10d30000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c10_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_10: serial@10d30000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10d30000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart10_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_10: spi@10d30000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10d30000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi10_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi11: usi@10d400c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d400c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric1 0x100c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_11: i2c@10d40000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10d40000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c11_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_11: serial@10d40000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10d40000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart11_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_11: spi@10d40000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10d40000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi11_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usi12: usi@10d500c0 {</div><div class='del'>-			compatible = "google,gs101-usi",</div><div class='del'>-				     "samsung,exynos850-usi";</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x10d500c0 0x20&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -471,11 +1160,148 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				pinctrl-0 = &lt;&amp;hsi2c12_bus&gt;;</div><div class='del'>-				pinctrl-names = "default";</div><div class='ctx'> 				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5&gt;,</div><div class='ctx'> 					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5&gt;;</div><div class='ctx'> 				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c12_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_12: serial@10d50000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10d50000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart12_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_12: spi@10d50000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10d50000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi12_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi13: usi@10d600c0 {</div><div class='add'>+			compatible = "google,gs101-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d600c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_peric1 0x1014&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_13: i2c@10d60000 {</div><div class='add'>+				compatible = "google,gs101-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10d60000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c13_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_13: serial@10d60000 {</div><div class='add'>+				compatible = "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10d60000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart13_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_13: spi@10d60000 {</div><div class='add'>+				compatible = "google,gs101-spi";</div><div class='add'>+				reg = &lt;0x10d60000 0x30&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi13_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_hsi0: clock-controller@11000000 {</div><div class='add'>+			compatible = "google,gs101-cmu-hsi0";</div><div class='add'>+			reg = &lt;0x11000000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;ext_24_5m&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_DPGTC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_USB31DRD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "dpgtc", "usb31drd",</div><div class='add'>+				      "usbdpdbg";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdrd31_phy: phy@11100000 {</div><div class='add'>+			compatible = "google,gs101-usb31drd-phy";</div><div class='add'>+			reg = &lt;0x11100000 0x0100&gt;,</div><div class='add'>+			      &lt;0x110f0000 0x0800&gt;,</div><div class='add'>+			      &lt;0x110e0000 0x2800&gt;;</div><div class='add'>+			reg-names = "phy", "pcs", "pma";</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB20_PHY_REFCLK_26&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USBDPPHY_SCL_APB_PCLK&gt;;</div><div class='add'>+			clock-names = "phy", "ref", "ctrl_aclk", "ctrl_pclk", "scl_pclk";</div><div class='add'>+			samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdrd31: usb@11110000 {</div><div class='add'>+			compatible = "google,gs101-dwusb3";</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY&gt;,</div><div class='add'>+				&lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26&gt;,</div><div class='add'>+				&lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK&gt;,</div><div class='add'>+				&lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_PCLK&gt;;</div><div class='add'>+			clock-names = "bus_early", "susp_clk", "link_aclk", "link_pclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x11110000 0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usbdrd31_dwc3: usb@0 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				clocks = &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_REF_CLK_40&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				phys = &lt;&amp;usbdrd31_phy 0&gt;, &lt;&amp;usbdrd31_phy 1&gt;;</div><div class='add'>+				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -483,15 +1309,74 @@</div><div class='ctx'> 		pinctrl_hsi1: pinctrl@11840000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x11840000 0x00001000&gt;;</div><div class='add'>+			/* TODO: update once support for this CMU exists */</div><div class='add'>+			clocks = &lt;0&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_hsi2: clock-controller@14400000 {</div><div class='add'>+			compatible = "google,gs101-cmu-hsi2";</div><div class='add'>+			reg = &lt;0x14400000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;ext_24_5m&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI2_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI2_PCIE&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sysreg_hsi2: syscon@14420000 {</div><div class='add'>+			compatible = "google,gs101-hsi2-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x14420000 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_hsi2: pinctrl@14440000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x14440000 0x00001000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_GPIO_HSI2_PCLK&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ufs_0: ufs@14700000 {</div><div class='add'>+			compatible = "google,gs101-ufs";</div><div class='add'>+			reg = &lt;0x14700000 0x200&gt;,</div><div class='add'>+			      &lt;0x14701100 0x200&gt;,</div><div class='add'>+			      &lt;0x14780000 0xa000&gt;,</div><div class='add'>+			      &lt;0x14600000 0x100&gt;;</div><div class='add'>+			reg-names = "hci", "vs_hci", "unipro", "ufsp";</div><div class='add'>+			interrupts = &lt;GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_CLK_UNIPRO&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_FMP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK&gt;;</div><div class='add'>+			clock-names = "core_clk", "sclk_unipro_main", "fmp",</div><div class='add'>+				      "aclk", "pclk", "sysreg";</div><div class='add'>+			freq-table-hz = &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;ufs_rst_n &amp;ufs_refclk_out&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			phys = &lt;&amp;ufs_0_phy&gt;;</div><div class='add'>+			phy-names = "ufs-phy";</div><div class='add'>+			samsung,sysreg = &lt;&amp;sysreg_hsi2 0x710&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_0_phy: phy@14704000 {</div><div class='add'>+			compatible = "google,gs101-ufs-phy";</div><div class='add'>+			reg = &lt;0x14704000 0x3000&gt;;</div><div class='add'>+			reg-names = "phy-pma";</div><div class='add'>+			samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;ext_24_5m&gt;;</div><div class='add'>+			clock-names = "ref_clk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmu_apm: clock-controller@17400000 {</div><div class='ctx'> 			compatible = "google,gs101-cmu-apm";</div><div class='ctx'> 			reg = &lt;0x17400000 0x8000&gt;;</div><div class='hunk'>@@ -514,6 +1399,8 @@</div><div class='ctx'> 		pinctrl_gpio_alive: pinctrl@174d0000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x174d0000 0x00001000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_apm CLK_GOUT_APM_APBIF_GPIO_ALIVE_PCLK&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> </div><div class='ctx'> 			wakeup-interrupt-controller {</div><div class='ctx'> 				compatible = "google,gs101-wakeup-eint",</div><div class='hunk'>@@ -525,6 +1412,8 @@</div><div class='ctx'> 		pinctrl_far_alive: pinctrl@174e0000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x174e0000 0x00001000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_apm CLK_GOUT_APM_APBIF_GPIO_FAR_ALIVE_PCLK&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> </div><div class='ctx'> 			wakeup-interrupt-controller {</div><div class='ctx'> 				compatible = "google,gs101-wakeup-eint",</div><div class='hunk'>@@ -536,11 +1425,17 @@</div><div class='ctx'> 		pinctrl_gsactrl: pinctrl@17940000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x17940000 0x00001000&gt;;</div><div class='add'>+			/* TODO: update once support for this CMU exists */</div><div class='add'>+			clocks = &lt;0&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pinctrl_gsacore: pinctrl@17a80000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x17a80000 0x00001000&gt;;</div><div class='add'>+			/* TODO: update once support for this CMU exists */</div><div class='add'>+			clocks = &lt;0&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmu_top: clock-controller@1e080000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile<br/>index 045250d0a040..bd443c2bc5a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/Makefile</a></div><div class='hunk'>@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb</div><div class='hunk'>@@ -98,6 +99,10 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-11-x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-8-x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-7-x.dtb</div><div class='ctx'> </div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-aster.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-eval-v3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris-v2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb</div><div class='hunk'>@@ -166,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb</div><div class='hunk'>@@ -259,4 +265,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx-rpidsi.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_S32) += s32g399a-rdb3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi<br/>index fe9093b3c02e..a0f7bbd691a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi</a></div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;0 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts<br/>index ed4e69e87e30..195bdbafdf7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/fsl,qoriq-clockgen.h&gt;</div><div class='del'>-#include "fsl-ls1028a-kontron-sl28.dts"</div><div class='add'>+#include "fsl-ls1028a-kontron-sl28-var3.dts"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts<br/>new file mode 100644<br/>index 000000000000..08851ca407a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for the Kontron SMARC-sAL28 board.</div><div class='add'>+ *</div><div class='add'>+ * This is for the network variant 3 which has one ethernet ports.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Michael Walle &lt;michael@walle.cc&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "fsl-ls1028a-kontron-sl28.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kontron SMARC-sAL28 (Single PHY)";</div><div class='add'>+	compatible = "kontron,sl28-var3", "kontron,sl28", "fsl,ls1028a";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi<br/>index ae534c23b970..70b8731029c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi</a></div><div class='hunk'>@@ -1099,21 +1099,25 @@</div><div class='ctx'> 				  0xc2000000 0x1 0xf8230000  0x1 0xf8230000  0x0 0x020000</div><div class='ctx'> 				  /* BAR4 (PF5) - non-prefetchable memory */</div><div class='ctx'> 				  0x82000000 0x1 0xfc000000  0x1 0xfc000000  0x0 0x400000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0000 0 0 1 &amp;gic 0 0 GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0000 0 0 2 &amp;gic 0 0 GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			enetc_port0: ethernet@0,0 {</div><div class='del'>-				compatible = "fsl,enetc";</div><div class='add'>+				compatible = "pci1957,e100", "fsl,enetc";</div><div class='ctx'> 				reg = &lt;0x000000 0 0 0 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			enetc_port1: ethernet@0,1 {</div><div class='del'>-				compatible = "fsl,enetc";</div><div class='add'>+				compatible = "pci1957,e100", "fsl,enetc";</div><div class='ctx'> 				reg = &lt;0x000100 0 0 0 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			enetc_port2: ethernet@0,2 {</div><div class='del'>-				compatible = "fsl,enetc";</div><div class='add'>+				compatible = "pci1957,e100", "fsl,enetc";</div><div class='ctx'> 				reg = &lt;0x000200 0 0 0 0&gt;;</div><div class='ctx'> 				phy-mode = "internal";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1126,14 +1130,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			enetc_mdio_pf3: mdio@0,3 {</div><div class='del'>-				compatible = "fsl,enetc-mdio";</div><div class='add'>+				compatible = "pci1957,ee01", "fsl,enetc-mdio";</div><div class='ctx'> 				reg = &lt;0x000300 0 0 0 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ethernet@0,4 {</div><div class='del'>-				compatible = "fsl,enetc-ptp";</div><div class='add'>+				compatible = "pci1957,ee02", "fsl,enetc-ptp";</div><div class='ctx'> 				reg = &lt;0x000400 0 0 0 0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clockgen QORIQ_CLK_HWACCEL 3&gt;;</div><div class='ctx'> 				little-endian;</div><div class='hunk'>@@ -1143,7 +1147,7 @@</div><div class='ctx'> 			mscc_felix: ethernet-switch@0,5 {</div><div class='ctx'> 				reg = &lt;0x000500 0 0 0 0&gt;;</div><div class='ctx'> 				/* IEP INT_B */</div><div class='del'>-				interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;2&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 				mscc_felix_ports: ports {</div><div class='hunk'>@@ -1201,7 +1205,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			enetc_port3: ethernet@0,6 {</div><div class='del'>-				compatible = "fsl,enetc";</div><div class='add'>+				compatible = "pci1957,e100", "fsl,enetc";</div><div class='ctx'> 				reg = &lt;0x000600 0 0 0 0&gt;;</div><div class='ctx'> 				phy-mode = "internal";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1216,7 +1220,7 @@</div><div class='ctx'> 			rcec@1f,0 {</div><div class='ctx'> 				reg = &lt;0x00f800 0 0 0 0&gt;;</div><div class='ctx'> 				/* IEP INT_A */</div><div class='del'>-				interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi<br/>index d333b773bc45..8ee6d8c0ef61 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi</a></div><div class='hunk'>@@ -276,7 +276,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;0 106 0x4&gt;,</div><div class='ctx'> 			     &lt;0 107 0x4&gt;,</div><div class='ctx'> 			     &lt;0 95 0x4&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi<br/>index 1aa38ed09aa4..8352197cea6f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi</a></div><div class='hunk'>@@ -12,6 +12,13 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/fsl,qoriq-clockgen.h&gt;</div><div class='ctx'> #include "fsl-ls208xa.dtsi"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a57-pmu";</div><div class='add'>+		interrupts = &lt;1 7 0x8&gt;; /* PMU PPI, Level low type */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu {</div><div class='ctx'> 	cpu0: cpu@0 {</div><div class='ctx'> 		device_type = "cpu";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi<br/>index 8581ea55d254..245bbd615c81 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi</a></div><div class='hunk'>@@ -12,6 +12,13 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/fsl,qoriq-clockgen.h&gt;</div><div class='ctx'> #include "fsl-ls208xa.dtsi"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='add'>+		interrupts = &lt;1 7 0x8&gt;; /* PMU PPI, Level low type */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu {</div><div class='ctx'> 	cpu0: cpu@0 {</div><div class='ctx'> 		device_type = "cpu";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi<br/>index 0b7292835906..ccba0a135b24 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi</a></div><div class='hunk'>@@ -247,11 +247,6 @@</div><div class='ctx'> 			     &lt;1 10 4&gt;; /* Hypervisor PPI, active-low */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='del'>-		interrupts = &lt;1 7 0x8&gt;; /* PMU PPI, Level low type */</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	psci {</div><div class='ctx'> 		compatible = "arm,psci-0.2";</div><div class='ctx'> 		method = "smc";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi<br/>index e665c629e1a1..96055593204a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi</a></div><div class='hunk'>@@ -748,7 +748,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='del'>-			scl-gpios = &lt;&amp;gpio2 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c0_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -761,6 +764,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c1_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -773,6 +780,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c2_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -785,6 +796,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c3_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -797,7 +812,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='del'>-			scl-gpios = &lt;&amp;gpio2 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c4_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c4_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -810,6 +828,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c5_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c5_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -822,6 +844,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c6_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c6_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -834,6 +860,10 @@</div><div class='ctx'> 			clock-names = "i2c";</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(16)&gt;;</div><div class='add'>+			pinctrl-names = "default", "gpio";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c7_scl&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;i2c7_scl_gpio&gt;;</div><div class='add'>+			scl-gpios = &lt;&amp;gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1669,6 +1699,80 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pinmux_i2crv: pinmux@70010012c {</div><div class='add'>+			compatible = "pinctrl-single";</div><div class='add'>+			reg = &lt;0x00000007 0x0010012c 0x0 0xc&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			pinctrl-single,bit-per-mux;</div><div class='add'>+			pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+			pinctrl-single,function-mask = &lt;0x7&gt;;</div><div class='add'>+</div><div class='add'>+			i2c1_scl: i2c1-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 0 0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_scl_gpio: i2c1-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 0x1 0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_scl: i2c2-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 0 (0x7 &lt;&lt; 3)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_scl_gpio: i2c2-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 (0x1 &lt;&lt; 3) (0x7 &lt;&lt; 3)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_scl: i2c3-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 0 (0x7 &lt;&lt; 6)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_scl_gpio: i2c3-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 (0x1 &lt;&lt; 6) (0x7 &lt;&lt; 6)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4_scl: i2c4-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 0 (0x7 &lt;&lt; 9)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4_scl_gpio: i2c4-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 (0x1 &lt;&lt; 9) (0x7 &lt;&lt; 9)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5_scl: i2c5-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 0 (0x7 &lt;&lt; 12)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5_scl_gpio: i2c5-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x0 (0x1 &lt;&lt; 12) (0x7 &lt;&lt; 12)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6_scl: i2c6-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x4 0x2 0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6_scl_gpio: i2c6-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x4 0x1 0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7_scl: i2c7-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x4 0x2 0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7_scl_gpio: i2c7-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x4 0x1 0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0_scl: i2c0-scl-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x8 0 (0x7 &lt;&lt; 10)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0_scl_gpio: i2c0-scl-gpio-pins {</div><div class='add'>+				pinctrl-single,bits = &lt;0x8 (0x1 &lt;&lt; 10) (0x7 &lt;&lt; 10)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		fsl_mc: fsl-mc@80c000000 {</div><div class='ctx'> 			compatible = "fsl,qoriq-mc";</div><div class='ctx'> 			reg = &lt;0x00000008 0x0c000000 0 0x40&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts<br/>index 9f88583aa25e..eafef8718a0f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> 		i2c7 = &amp;mpcie1_i2c;</div><div class='ctx'> 		i2c8 = &amp;mpcie0_i2c;</div><div class='ctx'> 		i2c9 = &amp;pcieclk_i2c;</div><div class='add'>+		i2c10 = &amp;i2c5;</div><div class='ctx'> 		mmc0 = &amp;esdhc0;</div><div class='ctx'> 		mmc1 = &amp;esdhc1;</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi<br/>index 0580ea30cfbc..e914291e63a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi</a></div><div class='hunk'>@@ -71,3 +71,12 @@</div><div class='ctx'> 		reg = &lt;0x54&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@6f {</div><div class='add'>+		compatible = "microchip,mcp7940x";</div><div class='add'>+		reg = &lt;0x6f&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi<br/>index 07afeb78ed56..897cbb7b6742 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/imx8-clock.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/imx8-lpcg.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='ctx'> </div><div class='ctx'> audio_ipg_clk: clock-audio-ipg {</div><div class='hunk'>@@ -119,13 +120,96 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='ctx'> 	ranges = &lt;0x59000000 0x0 0x59000000 0x1000000&gt;;</div><div class='ctx'> </div><div class='add'>+	asrc0: asrc@59000000 {</div><div class='add'>+		compatible = "fsl,imx8qm-asrc";</div><div class='add'>+		reg = &lt;0x59000000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;asrc0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;asrc0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;aud_pll_div0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;aud_pll_div1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;acm IMX_ADMA_ACM_AUD_CLK0_SEL&gt;,</div><div class='add'>+			 &lt;&amp;acm IMX_ADMA_ACM_AUD_CLK1_SEL&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;;</div><div class='add'>+		clock-names = "mem", "ipg",</div><div class='add'>+			      "asrck_0", "asrck_1", "asrck_2", "asrck_3",</div><div class='add'>+			      "asrck_4", "asrck_5", "asrck_6", "asrck_7",</div><div class='add'>+			      "asrck_8", "asrck_9", "asrck_a", "asrck_b",</div><div class='add'>+			      "asrck_c", "asrck_d", "asrck_e", "asrck_f",</div><div class='add'>+			      "spba";</div><div class='add'>+		dmas = &lt;&amp;edma0 0 0 0&gt;,</div><div class='add'>+		       &lt;&amp;edma0 1 0 0&gt;,</div><div class='add'>+		       &lt;&amp;edma0 2 0 0&gt;,</div><div class='add'>+		       &lt;&amp;edma0 3 0 FSL_EDMA_RX&gt;,</div><div class='add'>+		       &lt;&amp;edma0 4 0 FSL_EDMA_RX&gt;,</div><div class='add'>+		       &lt;&amp;edma0 5 0 FSL_EDMA_RX&gt;;</div><div class='add'>+		/* tx* is output channel of asrc, it is rx channel for eDMA */</div><div class='add'>+		dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc";</div><div class='add'>+		fsl,asrc-rate = &lt;8000&gt;;</div><div class='add'>+		fsl,asrc-width = &lt;16&gt;;</div><div class='add'>+		fsl,asrc-clk-map = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ASRC_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	esai0: esai@59010000 {</div><div class='add'>+		compatible = "fsl,imx8qm-esai";</div><div class='add'>+		reg = &lt;0x59010000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;esai0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;esai0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;esai0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;;</div><div class='add'>+		clock-names = "core", "extal", "fsys", "spba";</div><div class='add'>+		dmas = &lt;&amp;edma0 6 0 FSL_EDMA_RX&gt;, &lt;&amp;edma0 7 0 0&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ESAI_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif0: spdif@59020000 {</div><div class='add'>+		compatible = "fsl,imx8qm-spdif";</div><div class='add'>+		reg = &lt;0x59020000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;, /* rx */</div><div class='add'>+			     &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH&gt;; /* tx */</div><div class='add'>+		clocks = &lt;&amp;spdif0_lpcg IMX_LPCG_CLK_4&gt;,	/* core */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,			/* rxtx0 */</div><div class='add'>+			 &lt;&amp;spdif0_lpcg IMX_LPCG_CLK_0&gt;,	/* rxtx1 */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,			/* rxtx2 */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,			/* rxtx3 */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,			/* rxtx4 */</div><div class='add'>+			 &lt;&amp;audio_ipg_clk&gt;,		/* rxtx5 */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,			/* rxtx6 */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,			/* rxtx7 */</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;;			/* spba */</div><div class='add'>+		clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4",</div><div class='add'>+			      "rxtx5", "rxtx6", "rxtx7", "spba";</div><div class='add'>+		dmas = &lt;&amp;edma0 8 0 (FSL_EDMA_MULTI_FIFO | FSL_EDMA_RX)&gt;,</div><div class='add'>+		       &lt;&amp;edma0 9 0 FSL_EDMA_MULTI_FIFO&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SPDIF_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sai0: sai@59040000 {</div><div class='ctx'> 		compatible = "fsl,imx8qm-sai";</div><div class='ctx'> 		reg = &lt;0x59040000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;sai0_lpcg 1&gt;,</div><div class='add'>+		clocks = &lt;&amp;sai0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='del'>-			 &lt;&amp;sai0_lpcg 0&gt;,</div><div class='add'>+			 &lt;&amp;sai0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;;</div><div class='ctx'> 		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='hunk'>@@ -139,9 +223,9 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 		compatible = "fsl,imx8qm-sai";</div><div class='ctx'> 		reg = &lt;0x59050000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;sai1_lpcg 1&gt;,</div><div class='add'>+		clocks = &lt;&amp;sai1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='del'>-			 &lt;&amp;sai1_lpcg 0&gt;,</div><div class='add'>+			 &lt;&amp;sai1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;;</div><div class='ctx'> 		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='hunk'>@@ -155,9 +239,9 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 		compatible = "fsl,imx8qm-sai";</div><div class='ctx'> 		reg = &lt;0x59060000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;sai2_lpcg 1&gt;,</div><div class='add'>+		clocks = &lt;&amp;sai2_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='del'>-			 &lt;&amp;sai2_lpcg 0&gt;,</div><div class='add'>+			 &lt;&amp;sai2_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;;</div><div class='ctx'> 		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='hunk'>@@ -171,9 +255,9 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 		compatible = "fsl,imx8qm-sai";</div><div class='ctx'> 		reg = &lt;0x59070000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;sai3_lpcg 1&gt;,</div><div class='add'>+		clocks = &lt;&amp;sai3_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='del'>-			 &lt;&amp;sai3_lpcg 0&gt;,</div><div class='add'>+			 &lt;&amp;sai3_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;,</div><div class='ctx'> 			 &lt;&amp;clk_dummy&gt;;</div><div class='ctx'> 		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='hunk'>@@ -239,6 +323,40 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 				&lt;&amp;pd IMX_SC_R_DMA_0_CH23&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	asrc0_lpcg: clock-controller@59400000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59400000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "asrc0_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ASRC_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	esai0_lpcg: clock-controller@59410000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59410000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;acm IMX_ADMA_ACM_ESAI0_MCLK_SEL&gt;,</div><div class='add'>+			 &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "esai0_lpcg_extal_clk",</div><div class='add'>+				     "esai0_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ESAI_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif0_lpcg: clock-controller@59420000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59420000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;acm IMX_ADMA_ACM_SPDIF0_TX_CLK_SEL&gt;,</div><div class='add'>+			 &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "spdif0_lpcg_tx_clk",</div><div class='add'>+				     "spdif0_lpcg_gclkw";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SPDIF_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sai0_lpcg: clock-controller@59440000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-lpcg";</div><div class='ctx'> 		reg = &lt;0x59440000 0x10000&gt;;</div><div class='hunk'>@@ -333,6 +451,101 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	asrc1: asrc@59800000 {</div><div class='add'>+		compatible = "fsl,imx8qm-asrc";</div><div class='add'>+		reg = &lt;0x59800000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;asrc1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;asrc1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;aud_pll_div0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;aud_pll_div1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;acm IMX_ADMA_ACM_AUD_CLK0_SEL&gt;,</div><div class='add'>+			 &lt;&amp;acm IMX_ADMA_ACM_AUD_CLK1_SEL&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;;</div><div class='add'>+		clock-names = "mem", "ipg",</div><div class='add'>+			      "asrck_0", "asrck_1", "asrck_2", "asrck_3",</div><div class='add'>+			      "asrck_4", "asrck_5", "asrck_6", "asrck_7",</div><div class='add'>+			      "asrck_8", "asrck_9", "asrck_a", "asrck_b",</div><div class='add'>+			      "asrck_c", "asrck_d", "asrck_e", "asrck_f",</div><div class='add'>+			      "spba";</div><div class='add'>+		dmas = &lt;&amp;edma1 0 0 0&gt;,</div><div class='add'>+		       &lt;&amp;edma1 1 0 0&gt;,</div><div class='add'>+		       &lt;&amp;edma1 2 0 0&gt;,</div><div class='add'>+		       &lt;&amp;edma1 3 0 FSL_EDMA_RX&gt;,</div><div class='add'>+		       &lt;&amp;edma1 4 0 FSL_EDMA_RX&gt;,</div><div class='add'>+		       &lt;&amp;edma1 5 0 FSL_EDMA_RX&gt;;</div><div class='add'>+		/* tx* is output channel of asrc, it is rx channel for eDMA */</div><div class='add'>+		dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc";</div><div class='add'>+		fsl,asrc-rate = &lt;8000&gt;;</div><div class='add'>+		fsl,asrc-width = &lt;16&gt;;</div><div class='add'>+		fsl,asrc-clk-map = &lt;1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ASRC_1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai4: sai@59820000 {</div><div class='add'>+		compatible = "fsl,imx8qm-sai";</div><div class='add'>+		reg = &lt;0x59820000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;sai4_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;sai4_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;;</div><div class='add'>+		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+		dmas = &lt;&amp;edma1 8 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 9 0 0&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SAI_4&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai5: sai@59830000 {</div><div class='add'>+		compatible = "fsl,imx8qm-sai";</div><div class='add'>+		reg = &lt;0x59830000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;sai5_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;sai5_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+			 &lt;&amp;clk_dummy&gt;;</div><div class='add'>+		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+		dmas = &lt;&amp;edma1 10 0 0&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SAI_5&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amix: amix@59840000 {</div><div class='add'>+		compatible = "fsl,imx8qm-audmix";</div><div class='add'>+		reg = &lt;0x59840000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;amix_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "ipg";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_AMIX&gt;;</div><div class='add'>+		dais = &lt;&amp;sai4&gt;, &lt;&amp;sai5&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mqs: mqs@59850000 {</div><div class='add'>+		compatible = "fsl,imx8qm-mqs";</div><div class='add'>+		reg = &lt;0x59850000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;mqs0_lpcg IMX_LPCG_CLK_4&gt;, &lt;&amp;mqs0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "mclk", "core";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_MQS_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	edma1: dma-controller@599f0000 {</div><div class='ctx'> 		compatible = "fsl,imx8qm-edma";</div><div class='ctx'> 		reg = &lt;0x599f0000 0xc0000&gt;;</div><div class='hunk'>@@ -481,4 +694,60 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 			      "sai3_rx_bclk",</div><div class='ctx'> 			      "sai4_rx_bclk";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	asrc1_lpcg: clock-controller@59c00000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59c00000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "asrc1_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ASRC_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai4_lpcg: clock-controller@59c20000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59c20000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;acm IMX_ADMA_ACM_SAI4_MCLK_SEL&gt;,</div><div class='add'>+			 &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "sai4_lpcg_mclk",</div><div class='add'>+				     "sai4_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SAI_4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai5_lpcg: clock-controller@59c30000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59c30000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;acm IMX_ADMA_ACM_SAI5_MCLK_SEL&gt;,</div><div class='add'>+			 &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "sai5_lpcg_mclk",</div><div class='add'>+				     "sai5_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SAI_5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amix_lpcg: clock-controller@59c40000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59c40000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "amix_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_AMIX&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mqs0_lpcg: clock-controller@59c50000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x59c50000 0x10000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;acm IMX_ADMA_ACM_MQS_TX_CLK_SEL&gt;,</div><div class='add'>+			 &lt;&amp;audio_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "mqs0_lpcg_mclk",</div><div class='add'>+				     "mqs0_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_MQS_0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi<br/>new file mode 100644<br/>index 000000000000..92752c0c5eb5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+</div><div class='add'>+cm40_ipg_clk: clock-cm40-ipg {</div><div class='add'>+	compatible = "fixed-clock";</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;132000000&gt;;</div><div class='add'>+	clock-output-names = "cm40_ipg_clk";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+cm40_subsys: bus@34000000 {</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges = &lt;0x34000000 0x0 0x34000000 0x4000000&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;cm40_intmux&gt;;</div><div class='add'>+</div><div class='add'>+	cm40_lpuart: serial@37220000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpuart";</div><div class='add'>+		reg = &lt;0x37220000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;cm40_uart_lpcg IMX_LPCG_CLK_1&gt;, &lt;&amp;cm40_uart_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "ipg", "baud";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_M4_0_UART&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cm40_i2c: i2c@37230000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+		reg = &lt;0x37230000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;cm40_i2c_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;cm40_i2c_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-names = "per", "ipg";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_M4_0_I2C IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_M4_0_I2C&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cm40_intmux: intmux@37400000 {</div><div class='add'>+		compatible = "fsl,imx-intmux";</div><div class='add'>+		reg = &lt;0x37400000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		clocks = &lt;&amp;cm40_ipg_clk&gt;;</div><div class='add'>+		clock-names = "ipg";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_M4_0_INTMUX&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cm40_uart_lpcg: clock-controller@37620000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x37620000 0x1000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER&gt;,</div><div class='add'>+			 &lt;&amp;cm40_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_1&gt;;</div><div class='add'>+		clock-output-names = "cm40_lpcg_uart_clk",</div><div class='add'>+				     "cm40_lpcg_uart_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_M4_0_UART&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cm40_i2c_lpcg: clock-controller@37630000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x37630000 0x1000&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_M4_0_I2C IMX_SC_PM_CLK_PER&gt;,</div><div class='add'>+			 &lt;&amp;cm40_ipg_clk&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "cm40_lpcg_i2c_clk",</div><div class='add'>+				     "cm40_lpcg_i2c_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_M4_0_I2C&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi<br/>index e7783cc2d830..77d2928997b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi</a></div><div class='hunk'>@@ -21,7 +21,6 @@ img_subsys: bus@58000000 {</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;img_jpeg_dec_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 			 &lt;&amp;img_jpeg_dec_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='del'>-		clock-names = "per", "ipg";</div><div class='ctx'> 		assigned-clocks = &lt;&amp;img_jpeg_dec_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 				  &lt;&amp;img_jpeg_dec_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;200000000&gt;, &lt;200000000&gt;;</div><div class='hunk'>@@ -35,7 +34,6 @@ img_subsys: bus@58000000 {</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;img_jpeg_enc_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 			 &lt;&amp;img_jpeg_enc_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='del'>-		clock-names = "per", "ipg";</div><div class='ctx'> 		assigned-clocks = &lt;&amp;img_jpeg_enc_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='ctx'> 				  &lt;&amp;img_jpeg_enc_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;200000000&gt;, &lt;200000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts<br/>new file mode 100644<br/>index 000000000000..c974f5dc0283<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2018-2021 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8dx-colibri.dtsi"</div><div class='add'>+#include "imx8x-colibri-aster.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX8DX on Aster Board";</div><div class='add'>+	compatible = "toradex,colibri-imx8x-aster",</div><div class='add'>+		     "toradex,colibri-imx8x",</div><div class='add'>+		     "fsl,imx8dx";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts<br/>new file mode 100644<br/>index 000000000000..f2bf15463ae8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2018-2021 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8dx-colibri.dtsi"</div><div class='add'>+#include "imx8x-colibri-eval-v3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX8DX on Colibri Evaluation Board V3";</div><div class='add'>+	compatible = "toradex,colibri-imx8x-eval-v3",</div><div class='add'>+		     "toradex,colibri-imx8x",</div><div class='add'>+		     "fsl,imx8dx";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts<br/>new file mode 100644<br/>index 000000000000..fd425c70cf2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2018-2021 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8dx-colibri.dtsi"</div><div class='add'>+#include "imx8x-colibri-iris-v2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX8DX on Colibri Iris V2 Board";</div><div class='add'>+	compatible = "toradex,colibri-imx8x-iris-v2",</div><div class='add'>+		     "toradex,colibri-imx8x",</div><div class='add'>+		     "fsl,imx8dx";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts<br/>new file mode 100644<br/>index 000000000000..e5e2346ce4f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2018-2021 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8dx-colibri.dtsi"</div><div class='add'>+#include "imx8x-colibri-iris.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX8DX on Colibri Iris Board";</div><div class='add'>+	compatible = "toradex,colibri-imx8x-iris",</div><div class='add'>+		     "toradex,colibri-imx8x",</div><div class='add'>+		     "fsl,imx8dx";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi<br/>new file mode 100644<br/>index 000000000000..66b0fcc6687d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2018-2021 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8dx.dtsi"</div><div class='add'>+#include "imx8x-colibri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX8DX Module";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dx.dtsi b/arch/arm64/boot/dts/freescale/imx8dx.dtsi<br/>new file mode 100644<br/>index 000000000000..ce76efc1a041<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2016 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2017-2020 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8dxp.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;gpu_3d0 {</div><div class='add'>+	assigned-clock-rates = &lt;372000000&gt;, &lt;372000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts<br/>index 2123d431e061..2412ab145c06 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dxl-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dxl-evk.dts</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> 		mmc0 = &amp;usdhc1;</div><div class='ctx'> 		mmc1 = &amp;usdhc2;</div><div class='ctx'> 		serial0 = &amp;lpuart0;</div><div class='add'>+		serial1 = &amp;lpuart1;</div><div class='add'>+		serial6 = &amp;cm40_lpuart;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -51,6 +53,16 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	m2_uart1_sel: regulator-m2uart1sel {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "m2_uart1_sel";</div><div class='add'>+		gpio = &lt;&amp;pca6416_1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mux3_en: regulator-0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -340,6 +352,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;flexcan2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='hunk'>@@ -354,6 +372,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cm40_intmux {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cm40_lpuart {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_cm40_lpuart&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lsio_gpio4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -595,6 +623,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpuart1: lpuart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8DXL_UART1_TX_ADMA_UART1_TX          0x06000020</div><div class='add'>+			IMX8DXL_UART1_RX_ADMA_UART1_RX          0x06000020</div><div class='add'>+			IMX8DXL_UART1_RTS_B_ADMA_UART1_RTS_B    0x06000020</div><div class='add'>+			IMX8DXL_UART1_CTS_B_ADMA_UART1_CTS_B    0x06000020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc1: usdhc1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8DXL_EMMC0_CLK_CONN_EMMC0_CLK	0x06000041</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi<br/>index a0674c5c5576..7e54cf202858 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dxl.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8dxl.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8dxl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8dxl.dtsi</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/imx8-clock.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/imx8-lpcg.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -104,7 +105,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a35-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -231,6 +232,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* sorted in register address */</div><div class='add'>+	#include "imx8-ss-cm40.dtsi"</div><div class='ctx'> 	#include "imx8-ss-adma.dtsi"</div><div class='ctx'> 	#include "imx8-ss-conn.dtsi"</div><div class='ctx'> 	#include "imx8-ss-ddr.dtsi"</div><div class='hunk'>@@ -241,3 +243,14 @@</div><div class='ctx'> #include "imx8dxl-ss-conn.dtsi"</div><div class='ctx'> #include "imx8dxl-ss-lsio.dtsi"</div><div class='ctx'> #include "imx8dxl-ss-ddr.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;cm40_intmux {</div><div class='add'>+	interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi<br/>index bd5b365867fd..90d1901df2b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi</a></div><div class='hunk'>@@ -72,6 +72,20 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_1v5: regulator-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_1V5";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_vddext_3v3: regulator-vddext-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VDDEXT_3V3";</div><div class='hunk'>@@ -381,7 +395,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ptn5110: tcpc@50 {</div><div class='del'>-		compatible = "nxp,ptn5110";</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_typec1&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -441,6 +455,9 @@</div><div class='ctx'> 		assigned-clock-rates = &lt;24000000&gt;;</div><div class='ctx'> 		powerdown-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1v5&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			ov5640_to_mipi_csi2: endpoint {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts<br/>index d643381417f1..affbc67c2ef6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts</a></div><div class='hunk'>@@ -117,7 +117,6 @@</div><div class='ctx'> 		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_ptn5150&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi<br/>index 41c966147b94..429be2bab8a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	tpm@1 {</div><div class='del'>-		compatible = "tcg,tpm_tis-spi";</div><div class='add'>+		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;36000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts<br/>index 5e2cbaf27e0f..35ae0faa815b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts</a></div><div class='hunk'>@@ -297,7 +297,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tpm@1 {</div><div class='del'>-		compatible = "tcg,tpm_tis-spi";</div><div class='add'>+		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;36000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi<br/>index 1cff0b829357..ce20de259805 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='del'>-		simple-audio-card,name = "imx8mm-wm8904";</div><div class='add'>+		simple-audio-card,name = "verdin-wm8904";</div><div class='ctx'> 		simple-audio-card,routing =</div><div class='ctx'> 			"Headphone Jack", "HPOUTL",</div><div class='ctx'> 			"Headphone Jack", "HPOUTR",</div><div class='hunk'>@@ -32,6 +32,25 @@</div><div class='ctx'> 			sound-dai = &lt;&amp;sai2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usb_hub: regulator-usb-hub {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "HUB_PWR_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_pcie: regulator-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "PCIE_1_PWR_EN";</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin SPI_1 */</div><div class='hunk'>@@ -58,6 +77,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Current measurement into module VCC */</div><div class='ctx'> &amp;hwmon {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -93,6 +117,7 @@</div><div class='ctx'> </div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='ctx'> &amp;pcie0 {</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcie&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -115,6 +140,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* We support turning off sleep moci on Dahlia */</div><div class='add'>+&amp;reg_force_sleep_moci {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin I2S_1 */</div><div class='ctx'> &amp;sai2 {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -143,8 +173,16 @@</div><div class='ctx'> </div><div class='ctx'> /* Verdin USB_2 */</div><div class='ctx'> &amp;usbotg2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	disable-over-current;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	usb-hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_usb_hub&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin SD_1 */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi<br/>index 3c4b8ca125e3..1d8d146d9eeb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='del'>-		simple-audio-card,name = "imx8mm-nau8822";</div><div class='add'>+		simple-audio-card,name = "verdin-nau8822";</div><div class='ctx'> 		simple-audio-card,routing =</div><div class='ctx'> 			"Headphones", "LHP",</div><div class='ctx'> 			"Headphones", "RHP",</div><div class='hunk'>@@ -78,6 +78,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpio_expander_21 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi<br/>index 1e28c78e381f..763f069e8405 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-verdin-yavia.dtsi</a></div><div class='hunk'>@@ -81,6 +81,11 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_gpios_ext_yavia&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;hwmon_temp {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi<br/>index 6f0811587142..4768b05fd765 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a></div><div class='hunk'>@@ -110,6 +110,22 @@</div><div class='ctx'> 		startup-delay-us = &lt;200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * By default we enable CTRL_SLEEP_MOCI#, this is required to have</div><div class='add'>+	 * peripherals on the carrier board powered.</div><div class='add'>+	 * If more granularity or power saving is required this can be disabled</div><div class='add'>+	 * in the carrier board device tree files.</div><div class='add'>+	 */</div><div class='add'>+	reg_force_sleep_moci: regulator-force-sleep-moci {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "CTRL_SLEEP_MOCI#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usb_otg1_vbus: regulator-usb-otg1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -333,16 +349,6 @@</div><div class='ctx'> 			  "SODIMM_212",</div><div class='ctx'> 			  "SODIMM_151",</div><div class='ctx'> 			  "SODIMM_153";</div><div class='del'>-</div><div class='del'>-	ctrl-sleep-moci-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='del'>-		gpios = &lt;1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		line-name = "CTRL_SLEEP_MOCI#";</div><div class='del'>-		output-high;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* On-module I2C */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi<br/>index 8a1b42b94dce..9535dedcef59 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mm.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mm.dtsi</a></div><div class='hunk'>@@ -1168,6 +1168,13 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;lcdif_to_dsim&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mipi_dsi_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1253,7 +1260,6 @@</div><div class='ctx'> 				reg = &lt;0x32e40000 0x200&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX8MM_CLK_USB1_CTRL_ROOT&gt;;</div><div class='del'>-				clock-names = "usb1_ctrl_root_clk";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USB_BUS&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk IMX8MM_SYS_PLL2_500M&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usbphynop1&gt;;</div><div class='hunk'>@@ -1274,7 +1280,6 @@</div><div class='ctx'> 				reg = &lt;0x32e50000 0x200&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX8MM_CLK_USB1_CTRL_ROOT&gt;;</div><div class='del'>-				clock-names = "usb1_ctrl_root_clk";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USB_BUS&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk IMX8MM_SYS_PLL2_500M&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usbphynop2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts<br/>index 000e2c0596df..d25032e3ceab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dts</a></div><div class='hunk'>@@ -112,3 +112,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	hdmi@3d {</div><div class='add'>+		avdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		pvdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		a2vdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		v1p2-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	camera@3c {</div><div class='add'>+		DOVDD-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts<br/>index cc2ff59ac53b..6d85a0b052c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts</a></div><div class='hunk'>@@ -158,3 +158,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	hdmi@3d {</div><div class='add'>+		avdd-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+		pvdd-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+		a2vdd-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+		v1p2-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	camera@3c {</div><div class='add'>+		DOVDD-supply = &lt;&amp;buck5_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts<br/>index 0b71f50d936e..41330210a05f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mn-evk.dts</a></div><div class='hunk'>@@ -125,3 +125,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	hdmi@3d {</div><div class='add'>+		avdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		pvdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		a2vdd-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+		v1p2-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	camera@3c {</div><div class='add'>+		DOVDD-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi<br/>index 269e70f66a13..9e0259ddf4bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			hdmi_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;adv7533_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7535_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -52,6 +52,27 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_1v5: regulator-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_1V5";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vddext_3v3: regulator-vddext-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDDEXT_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ir-receiver {</div><div class='ctx'> 		compatible = "gpio-ir-receiver";</div><div class='ctx'> 		gpios = &lt;&amp;gpio1 13 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -193,15 +214,11 @@</div><div class='ctx'> </div><div class='ctx'> 	hdmi@3d {</div><div class='ctx'> 		compatible = "adi,adv7535";</div><div class='del'>-		reg = &lt;0x3d&gt;, &lt;0x3c&gt;, &lt;0x3e&gt;, &lt;0x3f&gt;;</div><div class='del'>-		reg-names = "main", "cec", "edid", "packet";</div><div class='add'>+		reg = &lt;0x3d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		adi,dsi-lanes = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		adi,input-depth = &lt;8&gt;;</div><div class='del'>-		adi,input-colorspace = "rgb";</div><div class='del'>-		adi,input-clock = "1x";</div><div class='del'>-		adi,input-style = &lt;1&gt;;</div><div class='del'>-		adi,input-justification = "evenly";</div><div class='add'>+		v3p3-supply = &lt;&amp;reg_vddext_3v3&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -210,7 +227,7 @@</div><div class='ctx'> 			port@0 {</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-				adv7533_in: endpoint {</div><div class='add'>+				adv7535_in: endpoint {</div><div class='ctx'> 					remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -218,7 +235,7 @@</div><div class='ctx'> 			port@1 {</div><div class='ctx'> 				reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-				adv7533_out: endpoint {</div><div class='add'>+				adv7535_out: endpoint {</div><div class='ctx'> 					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -227,7 +244,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ptn5110: tcpc@50 {</div><div class='del'>-		compatible = "nxp,ptn5110";</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_typec1&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -284,6 +301,8 @@</div><div class='ctx'> 		assigned-clock-rates = &lt;24000000&gt;;</div><div class='ctx'> 		powerdown-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1v5&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			ov5640_to_mipi_csi2: endpoint {</div><div class='hunk'>@@ -335,7 +354,7 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			dsi_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;adv7533_in&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7535_in&gt;;</div><div class='ctx'> 				data-lanes = &lt;1 2 3 4&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts<br/>index a6b94d1957c9..3434b189fa58 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts</a></div><div class='hunk'>@@ -126,7 +126,6 @@</div><div class='ctx'> 		interrupts = &lt;11 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_ptn5150&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			typec1_dr_sw: endpoint {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi<br/>index 932c8b05c75f..a5f9cfb46e5d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mn.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mn.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mn.dtsi</a></div><div class='hunk'>@@ -1104,6 +1104,13 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;lcdif_to_dsim&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mipi_dsi_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1213,7 +1220,6 @@</div><div class='ctx'> 				reg = &lt;0x32e40000 0x200&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX8MN_CLK_USB1_CTRL_ROOT&gt;;</div><div class='del'>-				clock-names = "usb1_ctrl_root_clk";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;clk IMX8MN_CLK_USB_BUS&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk IMX8MN_SYS_PLL2_500M&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usbphynop1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts<br/>index a08057410bde..e5d3901f2913 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts</a></div><div class='hunk'>@@ -340,7 +340,7 @@</div><div class='ctx'> &amp;i2c3 {</div><div class='ctx'> 	/* Connected to USB Hub */</div><div class='ctx'> 	usb-typec@52 {</div><div class='del'>-		compatible = "nxp,ptn5110";</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts<br/>index 2c19766ebf09..9b8f97a84e61 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts</a></div><div class='hunk'>@@ -197,10 +197,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='del'>-	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c3 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts<br/>index b11d694b98e1..d241db3743a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts</a></div><div class='hunk'>@@ -144,7 +144,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='ctx'> 	nvmem-cells = &lt;&amp;ethmac1&gt;;</div><div class='ctx'> 	nvmem-cell-names = "mac-address";</div><div class='del'>-	phy-supply = &lt;&amp;reg_baseboard_vdd3v3&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts<br/>index b749e28e5ede..ac7ec7533a3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts</a></div><div class='hunk'>@@ -167,6 +167,16 @@</div><div class='ctx'> 				VDDIO-supply = &lt;&amp;reg_vdd_3p3v_awo&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			csi2exp: gpio@24 {</div><div class='add'>+				compatible = "nxp,pca9570";</div><div class='add'>+				reg = &lt;0x24&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"CSI2_#RESET", "CSI2_#PWDN",</div><div class='add'>+					"CSI_#PWDN", "CSI_#RESET";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			typec@3d {</div><div class='ctx'> 				compatible = "nxp,ptn5150";</div><div class='ctx'> 				reg = &lt;0x3d&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts<br/>index 9beba8d6a0df..8be5b2a57f27 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-evk.dts</a></div><div class='hunk'>@@ -145,6 +145,27 @@</div><div class='ctx'> </div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound-hdmi {</div><div class='add'>+		compatible = "fsl,imx-audio-hdmi";</div><div class='add'>+		model = "audio-hdmi";</div><div class='add'>+		audio-cpu = &lt;&amp;aud2htx&gt;;</div><div class='add'>+		hdmi-out;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-micfil {</div><div class='add'>+		compatible = "fsl,imx-audio-card";</div><div class='add'>+		model = "micfil-audio";</div><div class='add'>+</div><div class='add'>+		pri-dai-link {</div><div class='add'>+			link-name = "micfil hifi";</div><div class='add'>+			format = "i2s";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;micfil&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -198,6 +219,10 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;aud2htx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;eqos {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='hunk'>@@ -524,6 +549,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;micfil {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pdm&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_PDM&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;196608000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mipi_dsi {</div><div class='ctx'> 	samsung,esc-clock-frequency = &lt;10000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -790,6 +825,16 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_pdm: pdmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK		0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_PDM_BIT_STREAM01	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_PDM_BIT_STREAM02	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_PDM_BIT_STREAM03	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pmic: pmicgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x000001c0</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi<br/>index 61c2a63efc6d..0fd5c3abcdb7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi</a></div><div class='hunk'>@@ -200,8 +200,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -241,8 +244,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c6&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c6_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -602,38 +608,50 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_i2c1: i2c1grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c3&gt;,</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c3&gt;;</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001e0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14		0x1e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15		0x1e0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_i2c2: i2c2grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c3&gt;,</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c3&gt;;</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001e0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_i2c3: i2c3grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c3&gt;,</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c3&gt;;</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001e0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_i2c4: i2c4grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL		0x400001c3&gt;,</div><div class='del'>-			&lt;MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA		0x400001c3&gt;;</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL		0x400001e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA		0x400001e0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_i2c5: i2c5grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL		0x400001c3&gt;,</div><div class='del'>-			&lt;MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA		0x400001c3&gt;;</div><div class='add'>+			&lt;MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL		0x400001e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA		0x400001e0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_i2c6: i2c6grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL		0x400001c3&gt;,</div><div class='del'>-			&lt;MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA		0x400001c3&gt;;</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL		0x400001e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA		0x400001e0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c6_gpio: i2c6gpiogrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19		0x1e0&gt;,</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20		0x1e0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_lcd0_backlight: lcd0-backlightgrp {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts b/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts<br/>new file mode 100644<br/>index 000000000000..5fd1614982cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-navqp.dts</a></div><div class='hunk'>@@ -0,0 +1,424 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2021 Emcraft Systems</div><div class='add'>+ * Copyright 2024 Gilles Talis &lt;gilles.talis@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Emcraft Systems i.MX8MPlus NavQ+ Kit";</div><div class='add'>+	compatible = "emcraft,imx8mp-navqp", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		regulator-name = "VSD_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;1000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;10000&gt;;</div><div class='add'>+			qca,disable-smarteee;</div><div class='add'>+			qca,disable-hibernation-mode;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			BUCK1 {</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK4 {</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK5 {</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO2 {</div><div class='add'>+				regulator-name = "LDO2";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO3 {</div><div class='add'>+				regulator-name = "LDO3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO4 {</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO5 {</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@53 {</div><div class='add'>+		compatible = "nxp,pcf2131";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	/* console */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD Card */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22				0x110</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_led: gpioledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16				0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL					0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA					0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL					0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA					0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL					0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA					0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL					0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA					0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03				0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19				0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX				0x49</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX				0x49</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK				0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT				0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK				0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT				0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK				0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT				0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12				0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK				0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7				0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE				0x190</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK				0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7				0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE				0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK				0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7				0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE				0x196</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B				0xc6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts<br/>index 86d3da36e4f3..c51ed7d991d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts</a></div><div class='hunk'>@@ -135,6 +135,18 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "X44";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	display: display {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Display is not fixed, so compatible has to be added from</div><div class='hunk'>@@ -470,6 +482,28 @@</div><div class='ctx'> 			  "", "", "", "";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			hdmi_tx_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	clock-frequency = &lt;384000&gt;;</div><div class='ctx'> 	pinctrl-names = "default", "gpio";</div><div class='hunk'>@@ -531,6 +565,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcf85063 {</div><div class='ctx'> 	/* RTC_EVENT# is connected on MBa8MPxL */</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi<br/>index e7bf032265e0..2f740d74707b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	tpm@1 {</div><div class='del'>-		compatible = "tcg,tpm_tis-spi";</div><div class='add'>+		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;36000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi<br/>index f24b14744799..5ab3ffe9931d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi</a></div><div class='hunk'>@@ -8,6 +8,10 @@</div><div class='ctx'> #include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	connector {</div><div class='ctx'> 		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -152,6 +156,38 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='ctx'> 	reset-gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pcie@0,0 {</div><div class='add'>+			reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			pcie@3,0 {</div><div class='add'>+				reg = &lt;0x1800 0 0 0 0&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				eth1: ethernet@0,0 {</div><div class='add'>+					reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+					local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* GPS */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi<br/>index f5491a608b2f..dec57fad6828 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi</a></div><div class='hunk'>@@ -8,6 +8,10 @@</div><div class='ctx'> #include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	connector {</div><div class='ctx'> 		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -164,6 +168,38 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='ctx'> 	reset-gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pcie@0,0 {</div><div class='add'>+			reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			pcie@4,0 {</div><div class='add'>+				reg = &lt;0x2000 0 0 0 0&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				eth1: ethernet@0,0 {</div><div class='add'>+					reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+					local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* GPS */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso<br/>index 270a9114da97..edf22ff549a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-imx219.dtso</a></div><div class='hunk'>@@ -62,12 +62,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 			mipi_csi_0_in: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;imx219_to_mipi_csi2&gt;;</div><div class='ctx'> 				data-lanes = &lt;1 2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mipi_csi_0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;isi_in_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts<br/>index cae586cd45bd..a77e9a44d9fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts</a></div><div class='hunk'>@@ -404,6 +404,12 @@</div><div class='ctx'> 				label = "vdd_dram";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			channel@9e {</div><div class='add'>+				gw,mode = &lt;2&gt;;</div><div class='add'>+				reg = &lt;0x9e&gt;;</div><div class='add'>+				label = "vdd_1p0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			channel@a2 {</div><div class='ctx'> 				gw,mode = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0xa2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi<br/>index 7e9e4b13b5c5..6e6b9c2c4640 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='del'>-		simple-audio-card,name = "imx8mp-wm8904";</div><div class='add'>+		simple-audio-card,name = "verdin-wm8904";</div><div class='ctx'> 		simple-audio-card,routing =</div><div class='ctx'> 			"Headphone Jack", "HPOUTL",</div><div class='ctx'> 			"Headphone Jack", "HPOUTR",</div><div class='hunk'>@@ -32,6 +32,25 @@</div><div class='ctx'> 			sound-dai = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usb_hub: regulator-usb-hub {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "HUB_PWR_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_pcie: regulator-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "PCIE_1_PWR_EN";</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;backlight {</div><div class='hunk'>@@ -70,6 +89,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Current measurement into module VCC */</div><div class='ctx'> &amp;hwmon {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -110,8 +134,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='ctx'> &amp;pcie {</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcie&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -138,6 +168,11 @@</div><div class='ctx'> 	vin-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* We support turning off sleep moci on Dahlia */</div><div class='add'>+&amp;reg_force_sleep_moci {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin I2S_1 */</div><div class='ctx'> &amp;sai1 {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI1&gt;;</div><div class='hunk'>@@ -181,6 +216,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	usb_hub_3_0: usb-hub@1 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;usb_hub_2_0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_usb_hub&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_hub_2_0: usb-hub@2 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;usb_hub_3_0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_usb_hub&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin SD_1 */</div><div class='ctx'> &amp;usdhc2 {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi<br/>index a509b2b7fa85..42ed44a11711 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='del'>-		simple-audio-card,name = "imx8mp-nau8822";</div><div class='add'>+		simple-audio-card,name = "verdin-nau8822";</div><div class='ctx'> 		simple-audio-card,routing =</div><div class='ctx'> 			"Headphones", "LHP",</div><div class='ctx'> 			"Headphones", "RHP",</div><div class='hunk'>@@ -93,6 +93,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpio_expander_21 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	vcc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -131,6 +136,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='ctx'> &amp;pcie {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi<br/>index 8482393f3cac..1d15f7449c58 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi</a></div><div class='hunk'>@@ -112,6 +112,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='ctx'> &amp;pcie {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi<br/>index db1722f0d80e..a7b261ff3e4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi</a></div><div class='hunk'>@@ -100,6 +100,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;hwmon_temp {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -117,6 +122,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='ctx'> &amp;pcie {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi<br/>index faa17cbbe2fd..aef4bef4bccd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi</a></div><div class='hunk'>@@ -116,6 +116,22 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * By default we enable CTRL_SLEEP_MOCI#, this is required to have</div><div class='add'>+	 * peripherals on the carrier board powered.</div><div class='add'>+	 * If more granularity or power saving is required this can be disabled</div><div class='add'>+	 * in the carrier board device tree files.</div><div class='add'>+	 */</div><div class='add'>+	reg_force_sleep_moci: regulator-force-sleep-moci {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "CTRL_SLEEP_MOCI#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -439,16 +455,6 @@</div><div class='ctx'> 			  "SODIMM_256",</div><div class='ctx'> 			  "SODIMM_48",</div><div class='ctx'> 			  "SODIMM_44";</div><div class='del'>-</div><div class='del'>-	ctrl-sleep-moci-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='del'>-		gpios = &lt;29 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		line-name = "CTRL_SLEEP_MOCI#";</div><div class='del'>-		output-high;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* On-module I2C */</div><div class='hunk'>@@ -664,8 +670,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Verdin I2C_3_HDMI */</div><div class='del'>-</div><div class='ctx'> /* Verdin I2C_4_CSI */</div><div class='ctx'> &amp;i2c3 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -764,6 +768,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='ctx'> &amp;pcie {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -1106,8 +1120,6 @@</div><div class='ctx'> 	pinctrl_hdmi_hog: hdmihoggrp {</div><div class='ctx'> 		fsl,pins =</div><div class='ctx'> 			&lt;MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC	0x40000019&gt;,	/* SODIMM 63 */</div><div class='del'>-			&lt;MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3&gt;,	/* SODIMM 59 */</div><div class='del'>-			&lt;MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3&gt;,	/* SODIMM 57 */</div><div class='ctx'> 			&lt;MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD	0x40000019&gt;;	/* SODIMM 61 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1163,6 +1175,19 @@</div><div class='ctx'> 			&lt;MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21		0x400001c6&gt;;	/* SODIMM 12 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* Verdin I2C_3_HDMI */</div><div class='add'>+	pinctrl_i2c5: i2c5grp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL		0x400001c6&gt;,	/* SODIMM 59 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA		0x400001c6&gt;;	/* SODIMM 57 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5_gpio: i2c5gpiogrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26		0x400001c6&gt;,	/* SODIMM 59 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27		0x400001c6&gt;;	/* SODIMM 57 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* Verdin I2S_2_BCLK (TOUCH_RESET#) */</div><div class='ctx'> 	pinctrl_i2s_2_bclk_touch_reset: i2s2bclktouchresetgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi<br/>index bfc5c81a5bd4..b92abb5a5c53 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a></div><div class='hunk'>@@ -836,6 +836,23 @@</div><div class='ctx'> 							 &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='add'>+					pgc_hdmimix: power-domain@14 {</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+						reg = &lt;IMX8MP_POWER_DOMAIN_HDMIMIX&gt;;</div><div class='add'>+						clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;;</div><div class='add'>+						assigned-clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_AXI&gt;,</div><div class='add'>+								  &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;;</div><div class='add'>+						assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_500M&gt;,</div><div class='add'>+									 &lt;&amp;clk IMX8MP_SYS_PLL1_133M&gt;;</div><div class='add'>+						assigned-clock-rates = &lt;500000000&gt;, &lt;133000000&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					pgc_hdmi_phy: power-domain@15 {</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+						reg = &lt;IMX8MP_POWER_DOMAIN_HDMI_PHY&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='ctx'> 					pgc_mipi_phy2: power-domain@16 {</div><div class='ctx'> 						#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 						reg = &lt;IMX8MP_POWER_DOMAIN_MIPI_PHY2&gt;;</div><div class='hunk'>@@ -1513,6 +1530,16 @@</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				aud2htx: aud2htx@30cb0000 {</div><div class='add'>+					compatible = "fsl,imx8mp-aud2htx";</div><div class='add'>+					reg = &lt;0x30cb0000 0x10000&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG&gt;;</div><div class='add'>+					clock-names = "bus";</div><div class='add'>+					dmas = &lt;&amp;sdma2 26 2 0&gt;;</div><div class='add'>+					dma-names = "tx";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sdma3: dma-controller@30e00000 {</div><div class='hunk'>@@ -1630,7 +1657,7 @@</div><div class='ctx'> 				compatible = "fsl,imx8mp-mipi-csi2", "fsl,imx8mm-mipi-csi2";</div><div class='ctx'> 				reg = &lt;0x32e40000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clock-frequency = &lt;500000000&gt;;</div><div class='add'>+				clock-frequency = &lt;266000000&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT&gt;,</div><div class='hunk'>@@ -1640,7 +1667,7 @@</div><div class='ctx'> 						  &lt;&amp;clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;,</div><div class='ctx'> 							 &lt;&amp;clk IMX8MP_CLK_24M&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;500000000&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;266000000&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -1672,7 +1699,7 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI_ROOT&gt;;</div><div class='ctx'> 				clock-names = "pclk", "wrap", "phy", "axi";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM1_PIX&gt;,</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM2_PIX&gt;,</div><div class='ctx'> 						  &lt;&amp;clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;,</div><div class='ctx'> 							 &lt;&amp;clk IMX8MP_CLK_24M&gt;;</div><div class='hunk'>@@ -1725,6 +1752,13 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;lcdif1_to_dsim&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mipi_dsi_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1889,6 +1923,136 @@</div><div class='ctx'> 				#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			hdmi_blk_ctrl: blk-ctrl@32fc0000 {</div><div class='add'>+				compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";</div><div class='add'>+				reg = &lt;0x32fc0000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_ROOT&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_REF_266M&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_24M&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_FDCC_TST&gt;;</div><div class='add'>+				clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc";</div><div class='add'>+				power-domains = &lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;,</div><div class='add'>+						&lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;,</div><div class='add'>+						&lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;,</div><div class='add'>+						&lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmi_phy&gt;,</div><div class='add'>+						&lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;;</div><div class='add'>+				power-domain-names = "bus", "irqsteer", "lcdif",</div><div class='add'>+						     "pai", "pvi", "trng",</div><div class='add'>+						     "hdmi-tx", "hdmi-tx-phy",</div><div class='add'>+						     "hdcp", "hrv";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			irqsteer_hdmi: interrupt-controller@32fc2000 {</div><div class='add'>+				compatible = "fsl,imx-irqsteer";</div><div class='add'>+				reg = &lt;0x32fc2000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				fsl,channel = &lt;1&gt;;</div><div class='add'>+				fsl,num-irqs = &lt;64&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				power-domains = &lt;&amp;hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi_pvi: display-bridge@32fc4000 {</div><div class='add'>+				compatible = "fsl,imx8mp-hdmi-pvi";</div><div class='add'>+				reg = &lt;0x32fc4000 0x1000&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;irqsteer_hdmi&gt;;</div><div class='add'>+				interrupts = &lt;12&gt;;</div><div class='add'>+				power-domains = &lt;&amp;hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						pvi_from_lcdif3: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;lcdif3_to_pvi&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						pvi_to_hdmi_tx: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;hdmi_tx_from_pvi&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lcdif3: display-controller@32fc6000 {</div><div class='add'>+				compatible = "fsl,imx8mp-lcdif";</div><div class='add'>+				reg = &lt;0x32fc6000 0x1000&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;irqsteer_hdmi&gt;;</div><div class='add'>+				interrupts = &lt;8&gt;;</div><div class='add'>+				clocks = &lt;&amp;hdmi_tx_phy&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_ROOT&gt;;</div><div class='add'>+				clock-names = "pix", "axi", "disp_axi";</div><div class='add'>+				power-domains = &lt;&amp;hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					lcdif3_to_pvi: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;pvi_from_lcdif3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi_tx: hdmi@32fd8000 {</div><div class='add'>+				compatible = "fsl,imx8mp-hdmi-tx";</div><div class='add'>+				reg = &lt;0x32fd8000 0x7eff&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;irqsteer_hdmi&gt;;</div><div class='add'>+				interrupts = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_REF_266M&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_32K&gt;,</div><div class='add'>+					 &lt;&amp;hdmi_tx_phy&gt;;</div><div class='add'>+				clock-names = "iahb", "isfr", "cec", "pix";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_REF_266M&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_266M&gt;;</div><div class='add'>+				power-domains = &lt;&amp;hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX&gt;;</div><div class='add'>+				reg-io-width = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						hdmi_tx_from_pvi: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;pvi_to_hdmi_tx&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						/* Point endpoint to the HDMI connector */</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi_tx_phy: phy@32fdff00 {</div><div class='add'>+				compatible = "fsl,imx8mp-hdmi-phy";</div><div class='add'>+				reg = &lt;0x32fdff00 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_HDMI_24M&gt;;</div><div class='add'>+				clock-names = "apb", "ref";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_24M&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX8MP_CLK_24M&gt;;</div><div class='add'>+				power-domains = &lt;&amp;hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie: pcie@33800000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts b/arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts<br/>index 366693f31992..e92b5d5a66b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	typec_ptn5100: usb-typec@50 {</div><div class='del'>-		compatible = "nxp,ptn5110";</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts<br/>index 8055a2c23035..b268ba7a0e12 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts</a></div><div class='hunk'>@@ -429,7 +429,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	typec_ptn5100: usb-typec@52 {</div><div class='del'>-		compatible = "nxp,ptn5110";</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi<br/>index c6dc3ba0d43b..e03186bbc415 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mq.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8mq.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mq.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8mq.dtsi</a></div><div class='hunk'>@@ -1290,6 +1290,13 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;lcdif_mipi_dsi&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mipi_dsi_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts<br/>index 77ac0efdfaad..5c6b39c6933f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qm-mek.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8qm-mek.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qm-mek.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8qm-mek.dts</a></div><div class='hunk'>@@ -39,6 +39,20 @@</div><div class='ctx'> 		gpio = &lt;&amp;lsio_gpio4 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_vref_1v8: regulator-adc-vref {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vref_1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc0&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;reg_vref_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -71,6 +85,37 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpspi2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi2 &amp;pinctrl_lpspi2_cs&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;lsio_gpio3 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	spidev0: spi@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "rohm,dh2228fv";</div><div class='add'>+		spi-max-frequency = &lt;30000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash0: flash@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		spi-max-frequency = &lt;133000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;fec1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_fec1&gt;;</div><div class='hunk'>@@ -130,6 +175,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_adc0: adc0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_ADC_IN0_DMA_ADC0_IN0				0xc0000060</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_fec1: fec1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QM_ENET0_MDC_CONN_ENET0_MDC				0x06000020</div><div class='hunk'>@@ -149,6 +200,41 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpspi2: lpspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_SPI2_SCK_DMA_SPI2_SCK		0x06000040</div><div class='add'>+			IMX8QM_SPI2_SDO_DMA_SPI2_SDO		0x06000040</div><div class='add'>+			IMX8QM_SPI2_SDI_DMA_SPI2_SDI		0x06000040</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpspi2_cs: lpspi2csgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10		0x21</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexspi0: flexspi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0     0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1     0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2     0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3     0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS         0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B     0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B     0x06000021</div><div class='add'>+			IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK       0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK       0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0     0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1     0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2     0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3     0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS         0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B     0x06000021</div><div class='add'>+			IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B     0x06000021</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_lpuart0: lpuart0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QM_UART0_RX_DMA_UART0_RX				0x06000020</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts<br/>index 8360bb851ac0..cee13e58762c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8qxp-mek.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8qxp-mek.dts</a></div><div class='hunk'>@@ -44,6 +44,22 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound-wm8960 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8960";</div><div class='add'>+		model = "wm8960-audio";</div><div class='add'>+		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8960&gt;;</div><div class='add'>+		hp-det-gpio = &lt;&amp;lsio_gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HP_L",</div><div class='add'>+				"Headphone Jack", "HP_R",</div><div class='add'>+				"Ext Spk", "SPK_LP",</div><div class='add'>+				"Ext Spk", "SPK_LN",</div><div class='add'>+				"Ext Spk", "SPK_RP",</div><div class='add'>+				"Ext Spk", "SPK_RN",</div><div class='add'>+				"LINPUT1", "Mic Jack",</div><div class='add'>+				"Mic Jack", "MICB";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dsp {</div><div class='hunk'>@@ -149,7 +165,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ptn5110: tcpc@50 {</div><div class='del'>-		compatible = "nxp,ptn5110";</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -188,6 +204,47 @@</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cm40_i2c {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_cm40_i2c&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_cm40_i2c_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;lsio_gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;lsio_gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm8960: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8960";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+				  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;786432000&gt;,</div><div class='add'>+				       &lt;49152000&gt;,</div><div class='add'>+				       &lt;12288000&gt;,</div><div class='add'>+				       &lt;12288000&gt;;</div><div class='add'>+		wlf,shared-lrclk;</div><div class='add'>+		wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='add'>+		wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca6416: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cm40_intmux {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpuart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_lpuart0&gt;;</div><div class='hunk'>@@ -218,6 +275,53 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sai0 {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai1_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai4 {</div><div class='add'>+	assigned-clocks = &lt;&amp;acm IMX_ADMA_ACM_SAI4_MCLK_SEL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai4_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;aud_pll_div1_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;786432000&gt;, &lt;98304000&gt;, &lt;12288000&gt;, &lt;98304000&gt;;</div><div class='add'>+	fsl,sai-asynchronous;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	assigned-clocks = &lt;&amp;acm IMX_ADMA_ACM_SAI5_MCLK_SEL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai5_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;aud_pll_div1_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;786432000&gt;, &lt;98304000&gt;, &lt;12288000&gt;, &lt;98304000&gt;;</div><div class='add'>+	fsl,sai-asynchronous;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;thermal_zones {</div><div class='ctx'> 	pmic-thermal {</div><div class='ctx'> 		polling-delay-passive = &lt;250&gt;;</div><div class='hunk'>@@ -314,6 +418,21 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='add'>+</div><div class='add'>+	pinctrl_cm40_i2c: cm40i2cgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_ADC_IN1_M40_I2C0_SDA                            0x0600004c</div><div class='add'>+			IMX8QXP_ADC_IN0_M40_I2C0_SCL                            0x0600004c</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_cm40_i2c_gpio: cm40i2cgpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_ADC_IN1_LSIO_GPIO1_IO09				0xc600004c</div><div class='add'>+			IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10				0xc600004c</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_fec1: fec1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020</div><div class='hunk'>@@ -385,6 +504,25 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_sai0: sai0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_SAI0_TXD_ADMA_SAI0_TXD		0x06000060</div><div class='add'>+			IMX8QXP_SAI0_RXD_ADMA_SAI0_RXD		0x06000040</div><div class='add'>+			IMX8QXP_SAI0_TXC_ADMA_SAI0_TXC		0x06000040</div><div class='add'>+			IMX8QXP_SAI0_TXFS_ADMA_SAI0_TXFS	0x06000040</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD     0x06000040</div><div class='add'>+			IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC     0x06000040</div><div class='add'>+			IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS   0x06000040</div><div class='add'>+			IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD     0x06000060</div><div class='add'>+			IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00   0x06000040</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc1: usdhc1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi<br/>index 10e16d84c0c3..0313f295de2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qxp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8qxp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qxp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8qxp.dtsi</a></div><div class='hunk'>@@ -317,6 +317,7 @@</div><div class='ctx'> 	/* sorted in register address */</div><div class='ctx'> 	#include "imx8-ss-img.dtsi"</div><div class='ctx'> 	#include "imx8-ss-vpu.dtsi"</div><div class='add'>+	#include "imx8-ss-cm40.dtsi"</div><div class='ctx'> 	#include "imx8-ss-gpu0.dtsi"</div><div class='ctx'> 	#include "imx8-ss-adma.dtsi"</div><div class='ctx'> 	#include "imx8-ss-conn.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts<br/>index 24bb253b938d..e937e5f8fa8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8ulp-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8ulp-evk.dts</a></div><div class='hunk'>@@ -127,12 +127,70 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_lpi2c7&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	ptn5150_1: typec@1d {</div><div class='add'>+		compatible = "nxp,ptn5150";</div><div class='add'>+		reg = &lt;0x1d&gt;;</div><div class='add'>+		int-gpios = &lt;&amp;gpiof 3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_typec1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcal6408: gpio@21 {</div><div class='ctx'> 		compatible = "nxp,pcal9554b";</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ptn5150_2: typec@3d {</div><div class='add'>+		compatible = "nxp,ptn5150";</div><div class='add'>+		reg = &lt;0x3d&gt;;</div><div class='add'>+		int-gpios = &lt;&amp;gpiof 5 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_typec2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1&gt;;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	over-current-active-low;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	fsl,tx-d-cal = &lt;110&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbmisc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb2&gt;;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	over-current-active-low;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy2 {</div><div class='add'>+	fsl,tx-d-cal = &lt;110&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbmisc2 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usdhc0 {</div><div class='hunk'>@@ -224,6 +282,32 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_typec1: typec1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTF3__PTF3           0x3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_typec2: typec2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTF5__PTF5           0x3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1: usb1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTF2__USB0_ID	0x10003</div><div class='add'>+			MX8ULP_PAD_PTF4__USB0_OC	0x10003</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb2: usb2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTD23__USB1_ID	0x10003</div><div class='add'>+			MX8ULP_PAD_PTF6__USB1_OC	0x10003</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc0: usdhc0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8ULP_PAD_PTD1__SDHC0_CMD	0x3</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi<br/>index c4a0082f30d3..e32d5afcf4a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8ulp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx8ulp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8ulp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx8ulp.dtsi</a></div><div class='hunk'>@@ -252,6 +252,38 @@</div><div class='ctx'> 				#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			crypto: crypto@292e0000 {</div><div class='add'>+				compatible = "fsl,sec-v4.0";</div><div class='add'>+				reg = &lt;0x292e0000 0x10000&gt;;</div><div class='add'>+				ranges = &lt;0 0x292e0000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				sec_jr0: jr@1000 {</div><div class='add'>+					compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+					reg = &lt;0x1000 0x1000&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sec_jr1: jr@2000 {</div><div class='add'>+					compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+					reg = &lt;0x2000 0x1000&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sec_jr2: jr@3000 {</div><div class='add'>+					compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+					reg = &lt;0x3000 0x1000&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sec_jr3: jr@4000 {</div><div class='add'>+					compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+					reg = &lt;0x4000 0x1000&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			tpm5: tpm@29340000 {</div><div class='ctx'> 				compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm";</div><div class='ctx'> 				reg = &lt;0x29340000 0x1000&gt;;</div><div class='hunk'>@@ -472,6 +504,68 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			usbotg1: usb@29900000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";</div><div class='add'>+				reg = &lt;0x29900000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc4 IMX8ULP_CLK_USB0&gt;;</div><div class='add'>+				power-domains = &lt;&amp;scmi_devpd IMX8ULP_PD_USB0&gt;;</div><div class='add'>+				phys = &lt;&amp;usbphy1&gt;;</div><div class='add'>+				fsl,usbmisc = &lt;&amp;usbmisc1 0&gt;;</div><div class='add'>+				ahb-burst-config = &lt;0x0&gt;;</div><div class='add'>+				tx-burst-size-dword = &lt;0x8&gt;;</div><div class='add'>+				rx-burst-size-dword = &lt;0x8&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbmisc1: usbmisc@29900200 {</div><div class='add'>+				compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+					     "fsl,imx6q-usbmisc";</div><div class='add'>+				reg = &lt;0x29900200 0x200&gt;;</div><div class='add'>+				#index-cells = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbphy1: usb-phy@29910000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";</div><div class='add'>+				reg = &lt;0x29910000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc4 IMX8ULP_CLK_USB0_PHY&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbotg2: usb@29920000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";</div><div class='add'>+				reg = &lt;0x29920000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc4 IMX8ULP_CLK_USB1&gt;;</div><div class='add'>+				power-domains = &lt;&amp;scmi_devpd IMX8ULP_PD_USDHC2_USB1&gt;;</div><div class='add'>+				phys = &lt;&amp;usbphy2&gt;;</div><div class='add'>+				fsl,usbmisc = &lt;&amp;usbmisc2 0&gt;;</div><div class='add'>+				ahb-burst-config = &lt;0x0&gt;;</div><div class='add'>+				tx-burst-size-dword = &lt;0x8&gt;;</div><div class='add'>+				rx-burst-size-dword = &lt;0x8&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbmisc2: usbmisc@29920200 {</div><div class='add'>+				compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+					     "fsl,imx6q-usbmisc";</div><div class='add'>+				reg = &lt;0x29920200 0x200&gt;;</div><div class='add'>+				#index-cells = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbphy2: usb-phy@29930000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";</div><div class='add'>+				reg = &lt;0x29930000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc4 IMX8ULP_CLK_USB1_PHY&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			fec: ethernet@29950000 {</div><div class='ctx'> 				compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";</div><div class='ctx'> 				reg = &lt;0x29950000 0x10000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts<br/>index 9921ea13ab48..d400d85f42a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "imx93.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -38,7 +39,7 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		vdev1vring0: vdev1vring0@a4000000 {</div><div class='add'>+		vdev1vring0: vdev1vring0@a4010000 {</div><div class='ctx'> 			reg = &lt;0 0xa4010000 0 0x8000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -48,8 +49,8 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rsc_table: rsc-table@2021f000 {</div><div class='del'>-			reg = &lt;0 0x2021f000 0 0x1000&gt;;</div><div class='add'>+		rsc_table: rsc-table@2021e000 {</div><div class='add'>+			reg = &lt;0 0x2021e000 0 0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -104,9 +105,85 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;eqos {</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ptn5110: tcpc@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		typec1_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 20000, 3000)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec1_dr_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb1_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ptn5110_2: tcpc@51 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		typec2_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 20000, 3000)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec2_dr_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb2_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_eqos_sleep&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -120,13 +197,17 @@</div><div class='ctx'> 		ethphy1: ethernet-phy@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			eee-broken-1000t;</div><div class='add'>+			reset-gpios = &lt;&amp;pcal6524 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;80000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;fec {</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_fec_sleep&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='ctx'> 	fsl,magic-packet;</div><div class='hunk'>@@ -140,6 +221,9 @@</div><div class='ctx'> 		ethphy2: ethernet-phy@2 {</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 			eee-broken-1000t;</div><div class='add'>+			reset-gpios = &lt;&amp;pcal6524 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;80000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -156,21 +240,58 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	samsung,picophy-pre-emp-curr-control = &lt;3&gt;;</div><div class='add'>+	samsung,picophy-dc-vol-level-adjust = &lt;7&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb1_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec1_dr_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	samsung,picophy-pre-emp-curr-control = &lt;3&gt;;</div><div class='add'>+	samsung,picophy-dc-vol-level-adjust = &lt;7&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb2_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec2_dr_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc1 {</div><div class='ctx'> 	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='del'>-	pinctrl-2 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usdhc2 {</div><div class='del'>-	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='del'>-	pinctrl-2 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2_sleep&gt;, &lt;&amp;pinctrl_usdhc2_gpio_sleep&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio3 00 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='hunk'>@@ -183,6 +304,118 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpi2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcal6524: gpio@22 {</div><div class='add'>+		compatible = "nxp,pcal6524";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pcal6524&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9451a";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pcal6524&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-min-microvolt = &lt;610000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;670000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4{</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5{</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+				regulator-min-microvolt = &lt;1060000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1140000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;840000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcf2131: rtc@53 {</div><div class='add'>+		compatible = "nxp,pcf2131";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pcal6524&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl_eqos: eqosgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='hunk'>@@ -203,6 +436,25 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_eqos_sleep: eqossleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET1_MDC__GPIO4_IO00				0x31e</div><div class='add'>+			MX93_PAD_ENET1_MDIO__GPIO4_IO01				0x31e</div><div class='add'>+			MX93_PAD_ENET1_RD0__GPIO4_IO10                          0x31e</div><div class='add'>+			MX93_PAD_ENET1_RD1__GPIO4_IO11				0x31e</div><div class='add'>+			MX93_PAD_ENET1_RD2__GPIO4_IO12				0x31e</div><div class='add'>+			MX93_PAD_ENET1_RD3__GPIO4_IO13				0x31e</div><div class='add'>+			MX93_PAD_ENET1_RXC__GPIO4_IO09                          0x31e</div><div class='add'>+			MX93_PAD_ENET1_RX_CTL__GPIO4_IO08			0x31e</div><div class='add'>+			MX93_PAD_ENET1_TD0__GPIO4_IO05                          0x31e</div><div class='add'>+			MX93_PAD_ENET1_TD1__GPIO4_IO04                          0x31e</div><div class='add'>+			MX93_PAD_ENET1_TD2__GPIO4_IO03				0x31e</div><div class='add'>+			MX93_PAD_ENET1_TD3__GPIO4_IO02				0x31e</div><div class='add'>+			MX93_PAD_ENET1_TXC__GPIO4_IO07                          0x31e</div><div class='add'>+			MX93_PAD_ENET1_TX_CTL__GPIO4_IO06                       0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_fec: fecgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_ENET2_MDC__ENET1_MDC			0x57e</div><div class='hunk'>@@ -222,6 +474,32 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO28__LPI2C3_SDA			0x40000b9e</div><div class='add'>+			MX93_PAD_GPIO_IO29__LPI2C3_SCL			0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec_sleep: fecsleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET2_MDC__GPIO4_IO14			0x51e</div><div class='add'>+			MX93_PAD_ENET2_MDIO__GPIO4_IO15			0x51e</div><div class='add'>+			MX93_PAD_ENET2_RD0__GPIO4_IO24			0x51e</div><div class='add'>+			MX93_PAD_ENET2_RD1__GPIO4_IO25			0x51e</div><div class='add'>+			MX93_PAD_ENET2_RD2__GPIO4_IO26			0x51e</div><div class='add'>+			MX93_PAD_ENET2_RD3__GPIO4_IO27			0x51e</div><div class='add'>+			MX93_PAD_ENET2_RXC__GPIO4_IO23                  0x51e</div><div class='add'>+			MX93_PAD_ENET2_RX_CTL__GPIO4_IO22		0x51e</div><div class='add'>+			MX93_PAD_ENET2_TD0__GPIO4_IO19			0x51e</div><div class='add'>+			MX93_PAD_ENET2_TD1__GPIO4_IO18			0x51e</div><div class='add'>+			MX93_PAD_ENET2_TD2__GPIO4_IO17			0x51e</div><div class='add'>+			MX93_PAD_ENET2_TD3__GPIO4_IO16			0x51e</div><div class='add'>+			MX93_PAD_ENET2_TXC__GPIO4_IO21                  0x51e</div><div class='add'>+			MX93_PAD_ENET2_TX_CTL__GPIO4_IO20               0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_UART1_RXD__LPUART1_RX			0x31e</div><div class='hunk'>@@ -238,9 +516,63 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_I2C2_SCL__LPI2C2_SCL			0x40000b9e</div><div class='add'>+			MX93_PAD_I2C2_SDA__LPI2C2_SDA			0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO28__LPI2C3_SDA			0x40000b9e</div><div class='add'>+			MX93_PAD_GPIO_IO29__LPI2C3_SCL			0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcal6524: pcal6524grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_CCM_CLKO2__GPIO3_IO27			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='ctx'> 	pinctrl_usdhc1: usdhc1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD1_CLK__USDHC1_CLK		0x1582</div><div class='add'>+			MX93_PAD_SD1_CMD__USDHC1_CMD		0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x40001382</div><div class='add'>+			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x40001382</div><div class='add'>+			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x1582</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD1_CLK__USDHC1_CLK		0x158e</div><div class='add'>+			MX93_PAD_SD1_CMD__USDHC1_CMD		0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_SD1_CLK__USDHC1_CLK		0x15fe</div><div class='ctx'> 			MX93_PAD_SD1_CMD__USDHC1_CMD		0x400013fe</div><div class='ctx'> 			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x400013fe</div><div class='hunk'>@@ -267,9 +599,41 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='ctx'> 	pinctrl_usdhc2: usdhc2grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x1582</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x40001382</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x40001382</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x40001382</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x40001382</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x40001382</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x158e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_SD2_CLK__USDHC2_CLK		0x15fe</div><div class='ctx'> 			MX93_PAD_SD2_CMD__USDHC2_CMD		0x400013fe</div><div class='ctx'> 			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x400013fe</div><div class='hunk'>@@ -279,4 +643,17 @@</div><div class='ctx'> 			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CLK__GPIO3_IO01            0x51e</div><div class='add'>+			MX93_PAD_SD2_CMD__GPIO3_IO02		0x51e</div><div class='add'>+			MX93_PAD_SD2_DATA0__GPIO3_IO03		0x51e</div><div class='add'>+			MX93_PAD_SD2_DATA1__GPIO3_IO04		0x51e</div><div class='add'>+			MX93_PAD_SD2_DATA2__GPIO3_IO05		0x51e</div><div class='add'>+			MX93_PAD_SD2_DATA3__GPIO3_IO06		0x51e</div><div class='add'>+			MX93_PAD_SD2_VSELECT__GPIO3_IO19	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi<br/>index 601c94e1fac8..4a3f42355cb8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx93.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/imx93.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx93.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/imx93.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/imx93-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -183,6 +184,20 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbphynop1: usbphynop1 {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_USB_PHY_BURUNIN&gt;;</div><div class='add'>+		clock-names = "main_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbphynop2: usbphynop2 {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_USB_PHY_BURUNIN&gt;;</div><div class='add'>+		clock-names = "main_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -316,6 +331,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C1_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 7 0 0&gt;, &lt;&amp;edma1 8 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -328,6 +345,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C2_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 9 0 0&gt;, &lt;&amp;edma1 10 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -340,6 +359,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI1_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 11 0 0&gt;, &lt;&amp;edma1 12 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -352,6 +373,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI2_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 13 0 0&gt;, &lt;&amp;edma1 14 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -361,7 +384,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART1_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 17 0 1&gt;, &lt;&amp;edma1 16 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma1 17 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 16 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -372,7 +395,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART2_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 19 0 1&gt;, &lt;&amp;edma1 18 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma1 19 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 18 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -400,7 +423,7 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_SAI1_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='ctx'> 				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='del'>-				dmas = &lt;&amp;edma1 22 0 1&gt;, &lt;&amp;edma1 21 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma1 22 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 21 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -509,8 +532,7 @@</div><div class='ctx'> 				reg = &lt;0x44530000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_ADC1_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='ctx'> 				#io-channel-cells = &lt;1&gt;;</div><div class='hunk'>@@ -693,6 +715,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C3_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 8 0 0&gt;, &lt;&amp;edma2 9 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -705,6 +729,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C4_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 10 0 0&gt;, &lt;&amp;edma2 11 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -717,6 +743,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI3_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 12 0 0&gt;, &lt;&amp;edma2 13 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -729,6 +757,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI4_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 14 0 0&gt;, &lt;&amp;edma2 15 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -738,7 +768,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART3_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 18 0 1&gt;, &lt;&amp;edma2 17 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 18 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 17 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -749,7 +779,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART4_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 20 0 1&gt;, &lt;&amp;edma2 19 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 20 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 19 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -760,7 +790,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART5_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 22 0 1&gt;, &lt;&amp;edma2 21 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 22 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 21 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -771,7 +801,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART6_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 24 0 1&gt;, &lt;&amp;edma2 23 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 24 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 23 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -814,7 +844,7 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_SAI2_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='ctx'> 				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='del'>-				dmas = &lt;&amp;edma2 59 0 1&gt;, &lt;&amp;edma2 58 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 59 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 58 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -827,7 +857,7 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_SAI3_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='ctx'> 				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='del'>-				dmas = &lt;&amp;edma2 61 0 1&gt;, &lt;&amp;edma2 60 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 61 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 60 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -846,7 +876,7 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_AUD_XCVR_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg", "phy", "spba", "pll_ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 65 0 1&gt;, &lt;&amp;edma2 66 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 65 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 66 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -857,7 +887,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART7_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 88 0 1&gt;, &lt;&amp;edma2 87 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 88 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 87 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -868,7 +898,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPUART8_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 90 0 1&gt;, &lt;&amp;edma2 89 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 90 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 89 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -882,6 +912,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C5_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 71 0 0&gt;, &lt;&amp;edma2 72 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -894,6 +926,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C6_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 73 0 0&gt;, &lt;&amp;edma2 74 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -906,6 +940,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C7_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 75 0 0&gt;, &lt;&amp;edma2 76 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -918,6 +954,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPI2C8_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 77 0 0&gt;, &lt;&amp;edma2 78 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -930,6 +968,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI5_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 79 0 0&gt;, &lt;&amp;edma2 80 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -942,6 +982,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI6_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 81 0 0&gt;, &lt;&amp;edma2 82 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -954,6 +996,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI7_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 83 0 0&gt;, &lt;&amp;edma2 84 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -966,6 +1010,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX93_CLK_LPSPI8_GATE&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='ctx'> 				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 85 0 0&gt;, &lt;&amp;edma2 86 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -986,6 +1032,9 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_USDHC1_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 				bus-width = &lt;8&gt;;</div><div class='ctx'> 				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='ctx'> 				fsl,tuning-step = &lt;2&gt;;</div><div class='hunk'>@@ -1000,6 +1049,9 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_USDHC2_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC2&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 				bus-width = &lt;4&gt;;</div><div class='ctx'> 				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='ctx'> 				fsl,tuning-step = &lt;2&gt;;</div><div class='hunk'>@@ -1030,6 +1082,8 @@</div><div class='ctx'> 				fsl,num-tx-queues = &lt;3&gt;;</div><div class='ctx'> 				fsl,num-rx-queues = &lt;3&gt;;</div><div class='ctx'> 				fsl,stop-mode = &lt;&amp;wakeupmix_gpr 0x0c 1&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;eth_mac1&gt;;</div><div class='add'>+				nvmem-cell-names = "mac-address";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1052,6 +1106,8 @@</div><div class='ctx'> 				assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;;</div><div class='ctx'> 				intf_mode = &lt;&amp;wakeupmix_gpr 0x28&gt;;</div><div class='ctx'> 				snps,clk-csr = &lt;0&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;eth_mac2&gt;;</div><div class='add'>+				nvmem-cell-names = "mac-address";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1063,6 +1119,9 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX93_CLK_USDHC3_GATE&gt;;</div><div class='ctx'> 				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC3&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 				bus-width = &lt;4&gt;;</div><div class='ctx'> 				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='ctx'> 				fsl,tuning-step = &lt;2&gt;;</div><div class='hunk'>@@ -1136,6 +1195,15 @@</div><div class='ctx'> 			reg = &lt;0x47510000 0x10000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth_mac1: mac-address@4ec {</div><div class='add'>+				reg = &lt;0x4ec 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eth_mac2: mac-address@4f2 {</div><div class='add'>+				reg = &lt;0x4f2 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		s4muap: mailbox@47520000 {</div><div class='hunk'>@@ -1167,6 +1235,50 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usbotg1: usb@4c100000 {</div><div class='add'>+			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='add'>+			reg = &lt;0x4c100000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_USB_CONTROLLER_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_HSIO_32K_GATE&gt;;</div><div class='add'>+			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX93_CLK_HSIO&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;133000000&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphynop1&gt;;</div><div class='add'>+			fsl,usbmisc = &lt;&amp;usbmisc1 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbmisc1: usbmisc@4c100200 {</div><div class='add'>+			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+				     "fsl,imx6q-usbmisc";</div><div class='add'>+			reg = &lt;0x4c100200 0x200&gt;;</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbotg2: usb@4c200000 {</div><div class='add'>+			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='add'>+			reg = &lt;0x4c200000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_USB_CONTROLLER_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_HSIO_32K_GATE&gt;;</div><div class='add'>+			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX93_CLK_HSIO&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;133000000&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphynop2&gt;;</div><div class='add'>+			fsl,usbmisc = &lt;&amp;usbmisc2 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbmisc2: usbmisc@4c200200 {</div><div class='add'>+			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+				     "fsl,imx6q-usbmisc";</div><div class='add'>+			reg = &lt;0x4c200200 0x200&gt;;</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ddr-pmu@4e300dc0 {</div><div class='ctx'> 			compatible = "fsl,imx93-ddr-pmu";</div><div class='ctx'> 			reg = &lt;0x4e300dc0 0x200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi<br/>index 427467df42bf..815241526a0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/mba8mx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/mba8mx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/mba8mx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/mba8mx.dtsi</a></div><div class='hunk'>@@ -316,17 +316,11 @@</div><div class='ctx'> &amp;mipi_dsi {</div><div class='ctx'> 	samsung,burst-clock-frequency = &lt;891000000&gt;;</div><div class='ctx'> 	samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mipi_dsi_out: endpoint {</div><div class='del'>-				data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-				remote-endpoint = &lt;&amp;lvds_bridge_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mipi_dsi_out {</div><div class='add'>+	data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;lvds_bridge_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm3 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi<br/>index 5ac1cc9ff50e..fc19ae2e8d3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/s32g2.dtsi</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * NXP S32G2 SoC family</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2021 SUSE LLC</div><div class='del'>- * Copyright (c) 2017-2021 NXP</div><div class='add'>+ * Copyright 2017-2021, 2024 NXP</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -14,6 +14,18 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	reserved-memory  {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		scmi_buf: shm@d0000000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0xd0000000 0x0 0x80&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -77,6 +89,19 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	firmware {</div><div class='add'>+		scmi {</div><div class='add'>+			compatible = "arm,scmi-smc";</div><div class='add'>+			arm,smc-id = &lt;0xc20000fe&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			shmem = &lt;&amp;scmi_buf&gt;;</div><div class='add'>+</div><div class='add'>+			clks: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		psci {</div><div class='ctx'> 			compatible = "arm,psci-1.0";</div><div class='ctx'> 			method = "smc";</div><div class='hunk'>@@ -113,6 +138,16 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usdhc0: mmc@402f0000 {</div><div class='add'>+			compatible = "nxp,s32g2-usdhc";</div><div class='add'>+			reg = &lt;0x402f0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 32&gt;, &lt;&amp;clks 31&gt;, &lt;&amp;clks 33&gt;;</div><div class='add'>+			clock-names = "ipg", "ahb", "per";</div><div class='add'>+			bus-width = &lt;8&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@50800000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			reg = &lt;0x50800000 0x10000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts<br/>index 9118d8d2ee01..00070c949e2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g274a-evb.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g274a-evb.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g274a-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/s32g274a-evb.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2021 SUSE LLC</div><div class='del'>- * Copyright (c) 2019-2021 NXP</div><div class='add'>+ * Copyright 2019-2021, 2024 NXP</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -32,3 +32,7 @@</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usdhc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts<br/>index e05ee854cdf5..b3fc12899cae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2021 SUSE LLC</div><div class='del'>- * Copyright (c) 2019-2021 NXP</div><div class='add'>+ * Copyright 2019-2021, 2024 NXP</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -38,3 +38,7 @@</div><div class='ctx'> &amp;uart1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usdhc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi<br/>new file mode 100644<br/>index 000000000000..c1b08992754b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/s32g3.dtsi</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2021-2023 NXP</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ghennadi Procopciuc &lt;ghennadi.procopciuc@nxp.com&gt;</div><div class='add'>+ *          Ciprian Costea &lt;ciprianmarian.costea@nxp.com&gt;</div><div class='add'>+ *          Andra-Teodora Ilie &lt;andra.ilie@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nxp,s32g3";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;0x02&gt;;</div><div class='add'>+	#size-cells = &lt;0x02&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@101 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x101&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@102 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x102&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@103 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x103&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;dfs 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scmi: scmi {</div><div class='add'>+			compatible = "arm,scmi-smc";</div><div class='add'>+			shmem = &lt;&amp;scmi_shmem&gt;;</div><div class='add'>+			arm,smc-id = &lt;0xc20000fe&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dfs: protocol@13 {</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clks: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		psci: psci {</div><div class='add'>+			compatible = "arm,psci-1.0";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory  {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		scmi_shmem: shm@d0000000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0xd0000000 0x0 0x80&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0x80000000&gt;;</div><div class='add'>+</div><div class='add'>+		uart0: serial@401c8000 {</div><div class='add'>+			compatible = "nxp,s32g3-linflexuart",</div><div class='add'>+				     "fsl,s32v234-linflexuart";</div><div class='add'>+			reg = &lt;0x401c8000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 82 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@401cc000 {</div><div class='add'>+			compatible = "nxp,s32g3-linflexuart",</div><div class='add'>+				     "fsl,s32v234-linflexuart";</div><div class='add'>+			reg = &lt;0x401cc000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@402bc000 {</div><div class='add'>+			compatible = "nxp,s32g3-linflexuart",</div><div class='add'>+				     "fsl,s32v234-linflexuart";</div><div class='add'>+			reg = &lt;0x402bc000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usdhc0: mmc@402f0000 {</div><div class='add'>+			compatible = "nxp,s32g3-usdhc",</div><div class='add'>+				     "nxp,s32g2-usdhc";</div><div class='add'>+			reg = &lt;0x402f0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 32&gt;,</div><div class='add'>+				 &lt;&amp;clks 31&gt;,</div><div class='add'>+				 &lt;&amp;clks 33&gt;;</div><div class='add'>+			clock-names = "ipg", "ahb", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@50800000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x50800000 0x10000&gt;,</div><div class='add'>+			      &lt;0x50900000 0x200000&gt;,</div><div class='add'>+			      &lt;0x50400000 0x2000&gt;,</div><div class='add'>+			      &lt;0x50410000 0x2000&gt;,</div><div class='add'>+			      &lt;0x50420000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;, /* sec-phys */</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;, /* phys */</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;, /* virt */</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;, /* hyp-phys */</div><div class='add'>+			     &lt;GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;; /* hyp-virt */</div><div class='add'>+		arm,no-tick-in-suspend;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts<br/>new file mode 100644<br/>index 000000000000..9d674819876e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2021-2023 NXP</div><div class='add'>+ *</div><div class='add'>+ * NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s32g3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3)";</div><div class='add'>+	compatible = "nxp,s32g399a-rdb3", "nxp,s32g3";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;usdhc0;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 4GiB RAM */</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0 0x80000000&gt;,</div><div class='add'>+		      &lt;0x8 0x80000000 0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc0 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi<br/>index ed1b5a7a6067..f6bc001c3832 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi</a></div><div class='hunk'>@@ -31,6 +31,13 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@1 {</div><div class='hunk'>@@ -38,6 +45,13 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@2 {</div><div class='hunk'>@@ -45,6 +59,13 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@3 {</div><div class='hunk'>@@ -52,13 +73,33 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;; /* 32 KiB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	L2: l2-cache {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-unified;</div><div class='add'>+		cache-size = &lt;0x80000&gt;; /* 512 KiB */</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;512&gt;;</div><div class='add'>+		cache-level = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gic: interrupt-controller@f1001000 {</div><div class='ctx'> 		compatible = "arm,gic-400";</div><div class='ctx'> 		reg = &lt;0x0 0xf1001000 0x0 0x1000&gt;,  /* GICD */</div><div class='del'>-		      &lt;0x0 0xf1002000 0x0 0x100&gt;;   /* GICC */</div><div class='add'>+		      &lt;0x0 0xf1002000 0x0 0x2000&gt;,  /* GICC */</div><div class='add'>+		      &lt;0x0 0xf1004000 0x0 0x2000&gt;,  /* GICH */</div><div class='add'>+		      &lt;0x0 0xf1006000 0x0 0x2000&gt;;  /* GICV */</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |</div><div class='add'>+			      IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='ctx'> 		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts<br/>index f0672ec65b26..2d304efe081d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts</a></div><div class='hunk'>@@ -82,7 +82,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_sys_5v: regulator@0 {</div><div class='add'>+	reg_sys_5v: regulator-0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "SYS_5V";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_vdd_3v3: regulator@1 {</div><div class='add'>+	reg_vdd_3v3: regulator-1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VDD_3V3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -101,7 +101,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_sys_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_5v_hub: regulator@2 {</div><div class='add'>+	reg_5v_hub: regulator-2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "5V_HUB";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -514,6 +514,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='ctx'> 				adv7533_in: endpoint {</div><div class='ctx'> 					remote-endpoint = &lt;&amp;dsi_out0&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi<br/>index be808bb2544e..a589954c29e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a></div><div class='hunk'>@@ -852,7 +852,7 @@</div><div class='ctx'> 			clock-names = "wdog_clk", "apb_pclk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tsensor: tsensor@0,f7030700 {</div><div class='add'>+		tsensor: tsensor@f7030700 {</div><div class='ctx'> 			compatible = "hisilicon,tsensor";</div><div class='ctx'> 			reg = &lt;0x0 0xf7030700 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hip05-d02.dts b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts<br/>index c4eaebbb448f..b7792d443189 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip05-d02.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip05-d02.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip05-d02.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hip05-d02.dts</a></div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 	ranges = &lt;0 0 0x0 0x90000000 0x08000000&gt;,</div><div class='ctx'> 		 &lt;1 0 0x0 0x98000000 0x08000000&gt;;</div><div class='ctx'> </div><div class='del'>-	nor-flash@0,0 {</div><div class='add'>+	nor-flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "numonyx,js28f00a", "cfi-flash";</div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cpld@1,0 {</div><div class='add'>+	cpld@100000000 {</div><div class='ctx'> 		compatible = "hisilicon,hip05-cpld";</div><div class='ctx'> 		reg = &lt;1 0x0 0x100&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi<br/>index 65ddc0698f82..d0912ca5f237 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip05.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip05.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip05.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hip05.dtsi</a></div><div class='hunk'>@@ -279,6 +279,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	refclk200mhz: refclk200mhz {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='hunk'>@@ -298,12 +304,6 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		refclk200mhz: refclk200mhz {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		uart0: serial@80300000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x0 0x80300000 0x0 0x10000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi<br/>index f46c33d10750..3d7285e6700e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip06.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip06.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip06.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hip06.dtsi</a></div><div class='hunk'>@@ -258,6 +258,48 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eth2: ethernet-0 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;0&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth3: ethernet-1 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;1&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0: ethernet-4 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;4&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1: ethernet-5 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;5&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	refclk: refclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='hunk'>@@ -374,12 +416,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		refclk: refclk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;50000000&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		usb_ohci: usb@a7030000 {</div><div class='ctx'> 			compatible = "generic-ohci";</div><div class='ctx'> 			reg = &lt;0x0 0xa7030000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -436,7 +472,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dsaf0: dsa@c7000000 {</div><div class='add'>+		dsaf0: dsa@c5000000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "hisilicon,hns-dsaf-v2";</div><div class='hunk'>@@ -570,42 +606,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eth0: ethernet-4 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;4&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth1: ethernet-5 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;5&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth2: ethernet-0 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;0&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth3: ethernet-1 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;1&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		sas0: sas@c3000000 {</div><div class='ctx'> 			compatible = "hisilicon,hip06-sas-v2";</div><div class='ctx'> 			reg = &lt;0 0xc3000000 0 0x10000&gt;;</div><div class='hunk'>@@ -733,7 +733,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie0: pcie@a0090000 {</div><div class='add'>+		pcie0: pcie@b0000000 {</div><div class='ctx'> 			compatible = "hisilicon,hip06-pcie-ecam";</div><div class='ctx'> 			reg = &lt;0 0xb0000000 0 0x2000000&gt;,</div><div class='ctx'> 			      &lt;0 0xa0090000 0 0x10000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi<br/>index 81d907ef43ed..00a6bfa7478c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip07.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/hisilicon/hip07.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/hisilicon/hip07.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/hisilicon/hip07.dtsi</a></div><div class='hunk'>@@ -1013,6 +1013,42 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eth0: ethernet-0 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;4&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1: ethernet-1 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;5&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth2: ethernet-2 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;0&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth3: ethernet-3 {</div><div class='add'>+		compatible = "hisilicon,hns-nic-v2";</div><div class='add'>+		ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='add'>+		port-idx-in-ae = &lt;1&gt;;</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='hunk'>@@ -1343,7 +1379,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dsaf0: dsa@c7000000 {</div><div class='add'>+		dsaf0: dsa@c5000000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "hisilicon,hns-dsaf-v2";</div><div class='hunk'>@@ -1483,42 +1519,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eth0: ethernet@4 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;4&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth1: ethernet@5 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;5&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth2: ethernet@0 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;0&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth3: ethernet@1 {</div><div class='del'>-			compatible = "hisilicon,hns-nic-v2";</div><div class='del'>-			ae-handle = &lt;&amp;dsaf0&gt;;</div><div class='del'>-			port-idx-in-ae = &lt;1&gt;;</div><div class='del'>-			local-mac-address = [00 00 00 00 00 00];</div><div class='del'>-			status = "disabled";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		infiniband@c4000000 {</div><div class='ctx'> 			compatible = "hisilicon,hns-roce-v1";</div><div class='ctx'> 			reg = &lt;0x0 0xc4000000 0x0 0x100000&gt;;</div><div class='hunk'>@@ -1724,7 +1724,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		p0_pcie2_a: pcie@a00a0000 {</div><div class='add'>+		p0_pcie2_a: pcie@af800000 {</div><div class='ctx'> 			compatible = "hisilicon,hip07-pcie-ecam";</div><div class='ctx'> 			reg = &lt;0 0xaf800000 0 0x800000&gt;,</div><div class='ctx'> 			      &lt;0 0xa00a0000 0 0x10000&gt;;</div><div class='hunk'>@@ -1745,7 +1745,7 @@</div><div class='ctx'> 					 0x0 0 0 4 &amp;mbigen_pcie2_a 671 4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='del'>-		p0_sec_a: crypto@d2000000 {</div><div class='add'>+		p0_sec_a: crypto@d0000000 {</div><div class='ctx'> 			compatible = "hisilicon,hip07-sec";</div><div class='ctx'> 			reg = &lt;0x0 0xd0000000 0x0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x0 0xd2000000 0x0 0x10000&gt;,</div><div class='hunk'>@@ -1786,7 +1786,7 @@</div><div class='ctx'> 				     &lt;605 1&gt;, &lt;606 4&gt;,</div><div class='ctx'> 				     &lt;607 1&gt;, &lt;608 4&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		p0_sec_b: crypto@8,d2000000 {</div><div class='add'>+		p0_sec_b: crypto@8d0000000 {</div><div class='ctx'> 			compatible = "hisilicon,hip07-sec";</div><div class='ctx'> 			reg = &lt;0x8 0xd0000000 0x0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x8 0xd2000000 0x0 0x10000&gt;,</div><div class='hunk'>@@ -1827,7 +1827,7 @@</div><div class='ctx'> 				     &lt;605 1&gt;, &lt;606 4&gt;,</div><div class='ctx'> 				     &lt;607 1&gt;, &lt;608 4&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		p1_sec_a: crypto@400,d2000000 {</div><div class='add'>+		p1_sec_a: crypto@400d0000000 {</div><div class='ctx'> 			compatible = "hisilicon,hip07-sec";</div><div class='ctx'> 			reg = &lt;0x400 0xd0000000 0x0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x400 0xd2000000 0x0 0x10000&gt;,</div><div class='hunk'>@@ -1868,7 +1868,7 @@</div><div class='ctx'> 				     &lt;605 1&gt;, &lt;606 4&gt;,</div><div class='ctx'> 				     &lt;607 1&gt;, &lt;608 4&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		p1_sec_b: crypto@408,d2000000 {</div><div class='add'>+		p1_sec_b: crypto@408d0000000 {</div><div class='ctx'> 			compatible = "hisilicon,hip07-sec";</div><div class='ctx'> 			reg = &lt;0x408 0xd0000000 0x0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x408 0xd2000000 0x0 0x10000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/keembay-soc.dtsi b/arch/arm64/boot/dts/intel/keembay-soc.dtsi<br/>index 781761d2942b..ae00e9e54e82 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/intel/keembay-soc.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/intel/keembay-soc.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/intel/keembay-soc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/intel/keembay-soc.dtsi</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 0x7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi<br/>index 76aafa172eb0..2a5eeb21da47 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/intel/socfpga_agilex.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/intel/socfpga_agilex.dtsi</a></div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/lg/lg1312-ref.dts b/arch/arm64/boot/dts/lg/lg1312-ref.dts<br/>index 260a2c5b19e5..cdd10f138098 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/lg/lg1312-ref.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/lg/lg1312-ref.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/lg/lg1312-ref.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/lg/lg1312-ref.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		serial2 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x00000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/lg/lg1313-ref.dts b/arch/arm64/boot/dts/lg/lg1313-ref.dts<br/>index e89ae853788a..6ace977ff4cf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/lg/lg1313-ref.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/lg/lg1313-ref.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/lg/lg1313-ref.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/lg/lg1313-ref.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		serial2 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x00000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi<br/>index 5591939e057b..75377c292bcb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts<br/>index d6d37a1f6f38..91c2f8b4edfa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts</a></div><div class='hunk'>@@ -25,8 +25,6 @@</div><div class='ctx'> 	/* Actual device is MV88E6361 */</div><div class='ctx'> 	switch: switch@0 {</div><div class='ctx'> 		compatible = "marvell,mv88e6190";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts<br/>index 870bb380a40a..b3cc2b7b5d19 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts</a></div><div class='hunk'>@@ -114,54 +114,84 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdio {</div><div class='add'>+	/* Switch is @3, not @1 */</div><div class='add'>+	/delete-node/ ethernet-switch@1;</div><div class='ctx'> 	extphy: ethernet-phy@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		reset-gpios = &lt;&amp;gpionb 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;switch0 {</div><div class='del'>-	reg = &lt;3&gt;;</div><div class='add'>+	switch0: ethernet-switch@3 {</div><div class='add'>+		compatible = "marvell,mv88e6085";</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='ctx'> </div><div class='del'>-	reset-gpios = &lt;&amp;gpiosb 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpiosb 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		dsa,member = &lt;0 0&gt;;</div><div class='ctx'> </div><div class='del'>-	ethernet-ports {</div><div class='del'>-		switch0port1: ethernet-port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			label = "lan0";</div><div class='del'>-			phy-handle = &lt;&amp;switch0phy0&gt;;</div><div class='del'>-		};</div><div class='add'>+		ethernet-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			switch0port0: ethernet-port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				label = "cpu";</div><div class='add'>+				ethernet = &lt;&amp;eth0&gt;;</div><div class='add'>+				phy-mode = "rgmii-id";</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;1000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		switch0port2: ethernet-port@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			label = "lan1";</div><div class='del'>-			phy-handle = &lt;&amp;switch0phy1&gt;;</div><div class='del'>-		};</div><div class='add'>+			switch0port1: ethernet-port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				label = "lan0";</div><div class='add'>+				phy-handle = &lt;&amp;switch0phy0&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		switch0port3: ethernet-port@3 {</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-			label = "lan2";</div><div class='del'>-			phy-handle = &lt;&amp;switch0phy2&gt;;</div><div class='del'>-		};</div><div class='add'>+			switch0port2: ethernet-port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				label = "lan1";</div><div class='add'>+				phy-handle = &lt;&amp;switch0phy1&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		switch0port4: ethernet-port@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-			label = "lan3";</div><div class='del'>-			phy-handle = &lt;&amp;switch0phy3&gt;;</div><div class='del'>-		};</div><div class='add'>+			switch0port3: ethernet-port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				label = "lan2";</div><div class='add'>+				phy-handle = &lt;&amp;switch0phy2&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		switch0port5: ethernet-port@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-			label = "wan";</div><div class='del'>-			phy-handle = &lt;&amp;extphy&gt;;</div><div class='del'>-			phy-mode = "sgmii";</div><div class='add'>+			switch0port4: ethernet-port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				label = "lan3";</div><div class='add'>+				phy-handle = &lt;&amp;switch0phy3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			switch0port5: ethernet-port@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+				label = "wan";</div><div class='add'>+				phy-handle = &lt;&amp;extphy&gt;;</div><div class='add'>+				phy-mode = "sgmii";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	mdio {</div><div class='del'>-		switch0phy3: ethernet-phy@14 {</div><div class='del'>-			reg = &lt;0x14&gt;;</div><div class='add'>+		mdio {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			switch0phy0: ethernet-phy@11 {</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+			};</div><div class='add'>+			switch0phy1: ethernet-phy@12 {</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+			};</div><div class='add'>+			switch0phy2: ethernet-phy@13 {</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+			};</div><div class='add'>+			switch0phy3: ethernet-phy@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts<br/>index f1a9f2234359..54453b0a91f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts</a></div><div class='hunk'>@@ -216,8 +216,6 @@</div><div class='ctx'> 	assigned-clock-rates = &lt;20000000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;20000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi<br/>index 1cc3fa1c354d..9603223dd761 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-37xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-37xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-37xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/armada-37xx.dtsi</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi<br/>index 7ec7c789d87e..fdf88cd0eb02 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/armada-ap80x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/armada-ap80x.dtsi</a></div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			ranges = &lt;0x0 0x0 0xf0000000 0x1000000&gt;;</div><div class='ctx'> </div><div class='del'>-			smmu: iommu@5000000 {</div><div class='add'>+			smmu: iommu@100000 {</div><div class='ctx'> 				compatible = "marvell,ap806-smmu-500", "arm,mmu-500";</div><div class='ctx'> 				reg = &lt;0x100000 0x100000&gt;;</div><div class='ctx'> 				dma-coherent;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi<br/>index 6fcc34f7b464..5e7d6de3cdde 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9130-crb.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/cn9130-crb.dtsi</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ap0_reg_mmc_vccq: ap0_mmc_vccq@0 {</div><div class='add'>+	ap0_reg_mmc_vccq: regulator-1 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "ap0_mmc_vccq";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> 			  3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_usb3_vbus1: cp0_usb3_vbus@1 {</div><div class='add'>+	cp0_reg_usb3_vbus1: regulator-2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp0-xhci1-vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -45,16 +45,16 @@</div><div class='ctx'> 		gpio = &lt;&amp;expander0 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_usb3_0_phy0: cp0_usb3_phy0 {</div><div class='add'>+	cp0_usb3_0_phy0: usb-phy-1 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_usb3_0_phy1: cp0_usb3_phy1 {</div><div class='add'>+	cp0_usb3_0_phy1: usb-phy-2 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 		vcc-supply = &lt;&amp;cp0_reg_usb3_vbus1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_sd_vccq: cp0_sd_vccq@0 {</div><div class='add'>+	cp0_reg_sd_vccq: regulator-3 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "cp0_sd_vccq";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 			  3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_sd_vcc: cp0_sd_vcc@0 {</div><div class='add'>+	cp0_reg_sd_vcc: regulator-4 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp0_sd_vcc";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -82,7 +82,6 @@</div><div class='ctx'> 		tx-disable-gpios = &lt;&amp;expander0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		tx-fault-gpios = &lt;&amp;cp0_gpio1 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		maximum-power-milliwatt = &lt;3000&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi<br/>index 6eb6a175de38..be56a2336265 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9130-db.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9130-db.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9130-db.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/cn9130-db.dtsi</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ap0_reg_sd_vccq: ap0_sd_vccq@0 {</div><div class='add'>+	ap0_reg_sd_vccq: regulator-1 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "ap0_sd_vccq";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		states = &lt;1800000 0x1 3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_usb3_vbus0: cp0_usb3_vbus@0 {</div><div class='add'>+	cp0_reg_usb3_vbus0: regulator-2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp0-xhci0-vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -48,12 +48,12 @@</div><div class='ctx'> 		gpio = &lt;&amp;expander0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_usb3_0_phy0: cp0_usb3_phy@0 {</div><div class='add'>+	cp0_usb3_0_phy0: usb-phy-1 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 		vcc-supply = &lt;&amp;cp0_reg_usb3_vbus0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_usb3_vbus1: cp0_usb3_vbus@1 {</div><div class='add'>+	cp0_reg_usb3_vbus1: regulator-3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp0-xhci1-vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -62,12 +62,12 @@</div><div class='ctx'> 		gpio = &lt;&amp;expander0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_usb3_0_phy1: cp0_usb3_phy@1 {</div><div class='add'>+	cp0_usb3_0_phy1: usb-phy-2 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 		vcc-supply = &lt;&amp;cp0_reg_usb3_vbus1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_sd_vccq: cp0_sd_vccq@0 {</div><div class='add'>+	cp0_reg_sd_vccq: regulator-4 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "cp0_sd_vccq";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> 			  3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_reg_sd_vcc: cp0_sd_vcc@0 {</div><div class='add'>+	cp0_reg_sd_vcc: regulator-5 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp0_sd_vcc";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp0_sfp_eth0: sfp-eth@0 {</div><div class='add'>+	cp0_sfp_eth0: sfp-eth-1 {</div><div class='ctx'> 		compatible = "sff,sfp";</div><div class='ctx'> 		i2c-bus = &lt;&amp;cp0_sfpp0_i2c&gt;;</div><div class='ctx'> 		los-gpios = &lt;&amp;cp0_module_expander1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -311,8 +311,6 @@</div><div class='ctx'> 	reg = &lt;0x700680 0x50&gt;;</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='del'>-		#address-cells = &lt;0x1&gt;;</div><div class='del'>-		#size-cells = &lt;0x1&gt;;</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='ctx'> 		/* On-board MUX does not allow higher frequencies */</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi<br/>index ff8422fae31b..ad7360c83048 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9131-db.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9131-db.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9131-db.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/cn9131-db.dtsi</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> 		ethernet4 = &amp;cp1_eth1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp1_reg_usb3_vbus0: cp1_usb3_vbus@0 {</div><div class='add'>+	cp1_reg_usb3_vbus0: regulator-6 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;cp1_xhci0_vbus_pins&gt;;</div><div class='hunk'>@@ -29,12 +29,12 @@</div><div class='ctx'> 		gpio = &lt;&amp;cp1_gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp1_usb3_0_phy0: cp1_usb3_phy0 {</div><div class='add'>+	cp1_usb3_0_phy0: usb-phy-3 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 		vcc-supply = &lt;&amp;cp1_reg_usb3_vbus0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp1_sfp_eth1: sfp-eth1 {</div><div class='add'>+	cp1_sfp_eth1: sfp-eth-2 {</div><div class='ctx'> 		compatible = "sff,sfp";</div><div class='ctx'> 		i2c-bus = &lt;&amp;cp1_i2c0&gt;;</div><div class='ctx'> 		los-gpios = &lt;&amp;cp1_gpio1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -138,8 +138,6 @@</div><div class='ctx'> 	reg = &lt;0x700680 0x50&gt;;</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='del'>-		#address-cells = &lt;0x1&gt;;</div><div class='del'>-		#size-cells = &lt;0x1&gt;;</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='ctx'> 		/* On-board MUX does not allow higher frequencies */</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9132-db.dtsi b/arch/arm64/boot/dts/marvell/cn9132-db.dtsi<br/>index 512a4fa2861e..e753cfdac697 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9132-db.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/marvell/cn9132-db.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/cn9132-db.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/marvell/cn9132-db.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		ethernet5 = &amp;cp2_eth0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {</div><div class='add'>+	cp2_reg_usb3_vbus0: regulator-7 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp2-xhci0-vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -26,12 +26,12 @@</div><div class='ctx'> 		gpio = &lt;&amp;cp2_gpio1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp2_usb3_0_phy0: cp2_usb3_phy0 {</div><div class='add'>+	cp2_usb3_0_phy0: usb-phy-4 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 		vcc-supply = &lt;&amp;cp2_reg_usb3_vbus0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {</div><div class='add'>+	cp2_reg_usb3_vbus1: regulator-8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "cp2-xhci1-vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -40,12 +40,12 @@</div><div class='ctx'> 		gpio = &lt;&amp;cp2_gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp2_usb3_0_phy1: cp2_usb3_phy1 {</div><div class='add'>+	cp2_usb3_0_phy1: usb-phy-5 {</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='ctx'> 		vcc-supply = &lt;&amp;cp2_reg_usb3_vbus1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp2_reg_sd_vccq: cp2_sd_vccq@0 {</div><div class='add'>+	cp2_reg_sd_vccq: regulator-9 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "cp2_sd_vcc";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 		states = &lt;1800000 0x1 3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cp2_sfp_eth0: sfp-eth0 {</div><div class='add'>+	cp2_sfp_eth0: sfp-eth-3 {</div><div class='ctx'> 		compatible = "sff,sfp";</div><div class='ctx'> 		i2c-bus = &lt;&amp;cp2_sfpp0_i2c&gt;;</div><div class='ctx'> 		los-gpios = &lt;&amp;cp2_module_expander1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts<br/>index 0c38f7b51763..234e3b23d7a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt2712-evb.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt2712-evb.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt2712-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt2712-evb.dts</a></div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pio {</div><div class='del'>-	eth_default: eth_default {</div><div class='add'>+	eth_default: eth-default-pins {</div><div class='ctx'> 		tx_pins {</div><div class='ctx'> 			pinmux = &lt;MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3&gt;,</div><div class='ctx'> 				 &lt;MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2&gt;,</div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	eth_sleep: eth_sleep {</div><div class='add'>+	eth_sleep: eth-sleep-pins {</div><div class='ctx'> 		tx_pins {</div><div class='ctx'> 			pinmux = &lt;MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71&gt;,</div><div class='ctx'> 				 &lt;MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72&gt;,</div><div class='hunk'>@@ -182,14 +182,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb0_id_pins_float: usb0_iddig {</div><div class='add'>+	usb0_id_pins_float: usb0-iddig-pins {</div><div class='ctx'> 		pins_iddig {</div><div class='ctx'> 			pinmux = &lt;MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb1_id_pins_float: usb1_iddig {</div><div class='add'>+	usb1_id_pins_float: usb1-iddig-pins {</div><div class='ctx'> 		pins_iddig {</div><div class='ctx'> 			pinmux = &lt;MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi<br/>index 6d218caa198c..082672efba0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt2712e.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt2712e.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt2712e.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt2712e.dtsi</a></div><div class='hunk'>@@ -249,10 +249,11 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	infracfg: syscon@10001000 {</div><div class='add'>+	infracfg: clock-controller@10001000 {</div><div class='ctx'> 		compatible = "mediatek,mt2712-infracfg", "syscon";</div><div class='ctx'> 		reg = &lt;0 0x10001000 0 0x1000&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pericfg: syscon@10003000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi<br/>index 3ee9266fa8e9..917fa39a74f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt7622.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt7622.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt7622.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt7622.dtsi</a></div><div class='hunk'>@@ -252,7 +252,7 @@</div><div class='ctx'> 		clock-names = "hif_sel";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cir: cir@10009000 {</div><div class='add'>+	cir: ir-receiver@10009000 {</div><div class='ctx'> 		compatible = "mediatek,mt7622-cir";</div><div class='ctx'> 		reg = &lt;0 0x10009000 0 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -283,16 +283,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	apmixedsys: apmixedsys@10209000 {</div><div class='del'>-		compatible = "mediatek,mt7622-apmixedsys",</div><div class='del'>-			     "syscon";</div><div class='add'>+	apmixedsys: clock-controller@10209000 {</div><div class='add'>+		compatible = "mediatek,mt7622-apmixedsys";</div><div class='ctx'> 		reg = &lt;0 0x10209000 0 0x1000&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	topckgen: topckgen@10210000 {</div><div class='del'>-		compatible = "mediatek,mt7622-topckgen",</div><div class='del'>-			     "syscon";</div><div class='add'>+	topckgen: clock-controller@10210000 {</div><div class='add'>+		compatible = "mediatek,mt7622-topckgen";</div><div class='ctx'> 		reg = &lt;0 0x10210000 0 0x1000&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -515,7 +513,6 @@</div><div class='ctx'> 			 &lt;&amp;pericfg CLK_PERI_AUXADC_PD&gt;;</div><div class='ctx'> 		clock-names = "therm", "auxadc";</div><div class='ctx'> 		resets = &lt;&amp;pericfg MT7622_PERI_THERM_SW_RST&gt;;</div><div class='del'>-		reset-names = "therm";</div><div class='ctx'> 		mediatek,auxadc = &lt;&amp;auxadc&gt;;</div><div class='ctx'> 		mediatek,apmixedsys = &lt;&amp;apmixedsys&gt;;</div><div class='ctx'> 		nvmem-cells = &lt;&amp;thermal_calibration&gt;;</div><div class='hunk'>@@ -734,9 +731,8 @@</div><div class='ctx'> 		power-domains = &lt;&amp;scpsys MT7622_POWER_DOMAIN_WB&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ssusbsys: ssusbsys@1a000000 {</div><div class='del'>-		compatible = "mediatek,mt7622-ssusbsys",</div><div class='del'>-			     "syscon";</div><div class='add'>+	ssusbsys: clock-controller@1a000000 {</div><div class='add'>+		compatible = "mediatek,mt7622-ssusbsys";</div><div class='ctx'> 		reg = &lt;0 0x1a000000 0 0x1000&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -793,9 +789,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pciesys: pciesys@1a100800 {</div><div class='del'>-		compatible = "mediatek,mt7622-pciesys",</div><div class='del'>-			     "syscon";</div><div class='add'>+	pciesys: clock-controller@1a100800 {</div><div class='add'>+		compatible = "mediatek,mt7622-pciesys";</div><div class='ctx'> 		reg = &lt;0 0x1a100800 0 0x1000&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -921,12 +916,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hifsys: syscon@1af00000 {</div><div class='del'>-		compatible = "mediatek,mt7622-hifsys", "syscon";</div><div class='add'>+	hifsys: clock-controller@1af00000 {</div><div class='add'>+		compatible = "mediatek,mt7622-hifsys";</div><div class='ctx'> 		reg = &lt;0 0x1af00000 0 0x70&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ethsys: syscon@1b000000 {</div><div class='add'>+	ethsys: clock-controller@1b000000 {</div><div class='ctx'> 		compatible = "mediatek,mt7622-ethsys",</div><div class='ctx'> 			     "syscon";</div><div class='ctx'> 		reg = &lt;0 0x1b000000 0 0x1000&gt;;</div><div class='hunk'>@@ -966,9 +962,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	eth: ethernet@1b100000 {</div><div class='del'>-		compatible = "mediatek,mt7622-eth",</div><div class='del'>-			     "mediatek,mt2701-eth",</div><div class='del'>-			     "syscon";</div><div class='add'>+		compatible = "mediatek,mt7622-eth";</div><div class='ctx'> 		reg = &lt;0 0x1b100000 0 0x20000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts<br/>index e04b1c0c0ebb..ed79ad1ae871 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts</a></div><div class='hunk'>@@ -146,19 +146,19 @@</div><div class='ctx'> </div><div class='ctx'> &amp;cpu_thermal {</div><div class='ctx'> 	cooling-maps {</div><div class='del'>-		cpu-active-high {</div><div class='add'>+		map-cpu-active-high {</div><div class='ctx'> 			/* active: set fan to cooling level 2 */</div><div class='ctx'> 			cooling-device = &lt;&amp;fan 2 2&gt;;</div><div class='ctx'> 			trip = &lt;&amp;cpu_trip_active_high&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu-active-med {</div><div class='add'>+		map-cpu-active-med {</div><div class='ctx'> 			/* active: set fan to cooling level 1 */</div><div class='ctx'> 			cooling-device = &lt;&amp;fan 1 1&gt;;</div><div class='ctx'> 			trip = &lt;&amp;cpu_trip_active_med&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu-active-low {</div><div class='add'>+		map-cpu-active-low {</div><div class='ctx'> 			/* active: set fan to cooling level 0 */</div><div class='ctx'> 			cooling-device = &lt;&amp;fan 0 0&gt;;</div><div class='ctx'> 			trip = &lt;&amp;cpu_trip_active_low&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi<br/>index b3f416b9a7a4..559990dcd1d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt7986a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt7986a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt7986a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt7986a.dtsi</a></div><div class='hunk'>@@ -332,9 +332,8 @@</div><div class='ctx'> 			reg = &lt;0 0x1100c800 0 0x800&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;infracfg CLK_INFRA_THERM_CK&gt;,</div><div class='del'>-				 &lt;&amp;infracfg CLK_INFRA_ADC_26M_CK&gt;,</div><div class='del'>-				 &lt;&amp;infracfg CLK_INFRA_ADC_FRC_CK&gt;;</div><div class='del'>-			clock-names = "therm", "auxadc", "adc_32k";</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_ADC_26M_CK&gt;;</div><div class='add'>+			clock-names = "therm", "auxadc";</div><div class='ctx'> 			nvmem-cells = &lt;&amp;thermal_calibration&gt;;</div><div class='ctx'> 			nvmem-cell-names = "calibration-data";</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='hunk'>@@ -492,8 +491,6 @@</div><div class='ctx'> 			 compatible = "mediatek,mt7986-ethsys",</div><div class='ctx'> 				      "syscon";</div><div class='ctx'> 			 reg = &lt;0 0x15000000 0 0x1000&gt;;</div><div class='del'>-			 #address-cells = &lt;1&gt;;</div><div class='del'>-			 #size-cells = &lt;1&gt;;</div><div class='ctx'> 			 #clock-cells = &lt;1&gt;;</div><div class='ctx'> 			 #reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -556,7 +553,6 @@</div><div class='ctx'> 					  &lt;&amp;topckgen CLK_TOP_SGM_325M_SEL&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;&amp;apmixedsys CLK_APMIXED_NET2PLL&gt;,</div><div class='ctx'> 						 &lt;&amp;apmixedsys CLK_APMIXED_SGMPLL&gt;;</div><div class='del'>-			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			mediatek,ethsys = &lt;&amp;ethsys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts<br/>index a2e74b829320..6a7ae616512d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts</a></div><div class='hunk'>@@ -82,7 +82,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mmc1 {</div><div class='del'>-	bt_reset: bt-reset {</div><div class='add'>+	bluetooth@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='ctx'> 		compatible = "mediatek,mt7921s-bluetooth";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_pins_reset&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi<br/>index 6bd7424ef66c..100191c6453b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi</a></div><div class='hunk'>@@ -433,7 +433,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mt6358_vgpu_reg {</div><div class='del'>-	regulator-min-microvolt = &lt;625000&gt;;</div><div class='ctx'> 	regulator-max-microvolt = &lt;900000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	regulator-coupled-with = &lt;&amp;mt6358_vsram_gpu_reg&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi<br/>index 93dfbf130231..774ae5d9143f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8183.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8183.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8183.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8183.dtsi</a></div><div class='hunk'>@@ -1637,6 +1637,7 @@</div><div class='ctx'> 			compatible = "mediatek,mt8183-mfgcfg", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x13000000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_MFG_ASYNC&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpu: gpu@13040000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi<br/>index 3dea28f1d806..1807e9d6cb0e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi</a></div><div class='hunk'>@@ -1296,7 +1296,7 @@</div><div class='ctx'> 				 * regulator coupling requirements.</div><div class='ctx'> 				 */</div><div class='ctx'> 				regulator-name = "ppvar_dvdd_vgpu";</div><div class='del'>-				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;950000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;6250&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi<br/>index 9b738f6a5d21..7a704246678f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi</a></div><div class='hunk'>@@ -1421,7 +1421,7 @@</div><div class='ctx'> 			mt6315_6_vbuck1: vbuck1 {</div><div class='ctx'> 				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vbcpu";</div><div class='del'>-				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='ctx'> 				regulator-allowed-modes = &lt;0 1 2&gt;;</div><div class='hunk'>@@ -1431,7 +1431,7 @@</div><div class='ctx'> 			mt6315_6_vbuck3: vbuck3 {</div><div class='ctx'> 				regulator-compatible = "vbuck3";</div><div class='ctx'> 				regulator-name = "Vlcpu";</div><div class='del'>-				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='ctx'> 				regulator-allowed-modes = &lt;0 1 2&gt;;</div><div class='hunk'>@@ -1448,7 +1448,7 @@</div><div class='ctx'> 			mt6315_7_vbuck1: vbuck1 {</div><div class='ctx'> 				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vgpu";</div><div class='del'>-				regulator-min-microvolt = &lt;606250&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;800000&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='ctx'> 				regulator-allowed-modes = &lt;0 1 2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi<br/>index 05e401670bce..84cbdf6e9eb0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8192.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8192.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8192.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8192.dtsi</a></div><div class='hunk'>@@ -1464,6 +1464,7 @@</div><div class='ctx'> 			reg = &lt;0 0x14001000 0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_MUTEX0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x1000 0x1000&gt;;</div><div class='ctx'> 			mediatek,gce-events = &lt;CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0&gt;,</div><div class='ctx'> 					      &lt;CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8192_POWER_DOMAIN_DISP&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi<br/>index f94c07f8b933..4a11918da370 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi</a></div><div class='hunk'>@@ -264,6 +264,38 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6359_vcore_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6359_vcore_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6359_vcore_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6359_vcore_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu4 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6315_6_vbuck1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu5 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6315_6_vbuck1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu6 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6315_6_vbuck1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu7 {</div><div class='add'>+	cpu-supply = &lt;&amp;mt6315_6_vbuck1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;dp_intf0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -1214,7 +1246,7 @@</div><div class='ctx'> 			mt6315_6_vbuck1: vbuck1 {</div><div class='ctx'> 				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vbcpu";</div><div class='del'>-				regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;6250&gt;;</div><div class='hunk'>@@ -1232,7 +1264,7 @@</div><div class='ctx'> 			mt6315_7_vbuck1: vbuck1 {</div><div class='ctx'> 				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vgpu";</div><div class='del'>-				regulator-min-microvolt = &lt;625000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;6250&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi<br/>index ea6dc220e1cc..5d8b68f86ce4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8195.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8195.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8195.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8195.dtsi</a></div><div class='hunk'>@@ -2028,6 +2028,7 @@</div><div class='ctx'> 			compatible = "mediatek,mt8195-vppsys0", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x14000000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dma-controller@14001000 {</div><div class='hunk'>@@ -2251,6 +2252,7 @@</div><div class='ctx'> 			compatible = "mediatek,mt8195-vppsys1", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x14f00000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mutex@14f01000 {</div><div class='hunk'>@@ -3080,6 +3082,7 @@</div><div class='ctx'> 			reg = &lt;0 0x1c01a000 0 0x1000&gt;;</div><div class='ctx'> 			mboxes = &lt;&amp;gce0 0 CMDQ_THR_PRIO_4&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c01XXXX 0xa000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -3261,6 +3264,7 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_MUTEX0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c01XXXX 0x6000 0x1000&gt;;</div><div class='ctx'> 			mediatek,gce-events = &lt;CMDQ_EVENT_VDO0_DISP_STREAM_DONE_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3331,6 +3335,7 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys1 CLK_VDO1_DISP_MUTEX&gt;;</div><div class='ctx'> 			clock-names = "vdo1_mutex";</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x1000 0x1000&gt;;</div><div class='ctx'> 			mediatek,gce-events = &lt;CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi<br/>index 9cbd6dd8f671..d0b03dc4d3f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8516.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/mediatek/mt8516.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8516.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/mediatek/mt8516.dtsi</a></div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a35-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi<br/>index 24075cd91420..c3029e0abacc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/microchip/sparx5.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/microchip/sparx5.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/microchip/sparx5.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/microchip/sparx5.dtsi</a></div><div class='hunk'>@@ -447,7 +447,7 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x6 0x110102d4 0x24&gt;;</div><div class='add'>+			reg = &lt;0x6 0x110102f8 0x24&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mdio3: mdio@61101031c {</div><div class='hunk'>@@ -460,7 +460,7 @@</div><div class='ctx'> 			reg = &lt;0x6 0x1101031c 0x24&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		serdes: serdes@10808000 {</div><div class='add'>+		serdes: serdes@610808000 {</div><div class='ctx'> 			compatible = "microchip,sparx5-serdes";</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sys_clk&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi<br/>index f3e226de5e5e..2c5574734c9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi</a></div><div class='hunk'>@@ -15,234 +15,234 @@</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='del'>-		led@0 {</div><div class='add'>+		led-0 {</div><div class='ctx'> 			label = "twr0:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 8 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@1 {</div><div class='add'>+		led-1 {</div><div class='ctx'> 			label = "twr0:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 8 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@2 {</div><div class='add'>+		led-2 {</div><div class='ctx'> 			label = "twr1:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 9 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@3 {</div><div class='add'>+		led-3 {</div><div class='ctx'> 			label = "twr1:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 9 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@4 {</div><div class='add'>+		led-4 {</div><div class='ctx'> 			label = "twr2:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 10 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@5 {</div><div class='add'>+		led-5 {</div><div class='ctx'> 			label = "twr2:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 10 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@6 {</div><div class='add'>+		led-6 {</div><div class='ctx'> 			label = "twr3:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 11 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@7 {</div><div class='add'>+		led-7 {</div><div class='ctx'> 			label = "twr3:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 11 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		led@8 {</div><div class='add'>+		led-8 {</div><div class='ctx'> 			label = "eth12:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 12 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@9 {</div><div class='add'>+		led-9 {</div><div class='ctx'> 			label = "eth12:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 12 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@10 {</div><div class='add'>+		led-10 {</div><div class='ctx'> 			label = "eth13:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 13 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@11 {</div><div class='add'>+		led-11 {</div><div class='ctx'> 			label = "eth13:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 13 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@12 {</div><div class='add'>+		led-12 {</div><div class='ctx'> 			label = "eth14:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 14 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@13 {</div><div class='add'>+		led-13 {</div><div class='ctx'> 			label = "eth14:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 14 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@14 {</div><div class='add'>+		led-14 {</div><div class='ctx'> 			label = "eth15:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 15 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@15 {</div><div class='add'>+		led-15 {</div><div class='ctx'> 			label = "eth15:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out0 15 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@16 {</div><div class='add'>+		led-16 {</div><div class='ctx'> 			label = "eth48:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 16 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@17 {</div><div class='add'>+		led-17 {</div><div class='ctx'> 			label = "eth48:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 16 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@18 {</div><div class='add'>+		led-18 {</div><div class='ctx'> 			label = "eth49:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 17 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@19 {</div><div class='add'>+		led-19 {</div><div class='ctx'> 			label = "eth49:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 17 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@20 {</div><div class='add'>+		led-20 {</div><div class='ctx'> 			label = "eth50:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 18 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@21 {</div><div class='add'>+		led-21 {</div><div class='ctx'> 			label = "eth50:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 18 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@22 {</div><div class='add'>+		led-22 {</div><div class='ctx'> 			label = "eth51:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 19 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@23 {</div><div class='add'>+		led-23 {</div><div class='ctx'> 			label = "eth51:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 19 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@24 {</div><div class='add'>+		led-24 {</div><div class='ctx'> 			label = "eth52:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 20 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@25 {</div><div class='add'>+		led-25 {</div><div class='ctx'> 			label = "eth52:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 20 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@26 {</div><div class='add'>+		led-26 {</div><div class='ctx'> 			label = "eth53:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 21 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@27 {</div><div class='add'>+		led-27 {</div><div class='ctx'> 			label = "eth53:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 21 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@28 {</div><div class='add'>+		led-28 {</div><div class='ctx'> 			label = "eth54:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 22 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@29 {</div><div class='add'>+		led-29 {</div><div class='ctx'> 			label = "eth54:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 22 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@30 {</div><div class='add'>+		led-30 {</div><div class='ctx'> 			label = "eth55:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 23 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@31 {</div><div class='add'>+		led-31 {</div><div class='ctx'> 			label = "eth55:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 23 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@32 {</div><div class='add'>+		led-32 {</div><div class='ctx'> 			label = "eth56:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 24 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@33 {</div><div class='add'>+		led-33 {</div><div class='ctx'> 			label = "eth56:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 24 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@34 {</div><div class='add'>+		led-34 {</div><div class='ctx'> 			label = "eth57:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 25 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@35 {</div><div class='add'>+		led-35 {</div><div class='ctx'> 			label = "eth57:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 25 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@36 {</div><div class='add'>+		led-36 {</div><div class='ctx'> 			label = "eth58:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 26 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@37 {</div><div class='add'>+		led-37 {</div><div class='ctx'> 			label = "eth58:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 26 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@38 {</div><div class='add'>+		led-38 {</div><div class='ctx'> 			label = "eth59:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 27 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@39 {</div><div class='add'>+		led-39 {</div><div class='ctx'> 			label = "eth59:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 27 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@40 {</div><div class='add'>+		led-40 {</div><div class='ctx'> 			label = "eth60:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 28 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@41 {</div><div class='add'>+		led-41 {</div><div class='ctx'> 			label = "eth60:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 28 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@42 {</div><div class='add'>+		led-42 {</div><div class='ctx'> 			label = "eth61:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 29 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@43 {</div><div class='add'>+		led-43 {</div><div class='ctx'> 			label = "eth61:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 29 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@44 {</div><div class='add'>+		led-44 {</div><div class='ctx'> 			label = "eth62:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 30 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@45 {</div><div class='add'>+		led-45 {</div><div class='ctx'> 			label = "eth62:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 30 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@46 {</div><div class='add'>+		led-46 {</div><div class='ctx'> 			label = "eth63:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 31 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@47 {</div><div class='add'>+		led-47 {</div><div class='ctx'> 			label = "eth63:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 31 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='hunk'>@@ -274,15 +274,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		spi-max-frequency = &lt;8000000&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	spi@0 {</div><div class='ctx'> 		compatible = "spi-mux";</div><div class='ctx'> 		mux-controls = &lt;&amp;mux&gt;;</div><div class='hunk'>@@ -395,13 +386,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;axi {</div><div class='del'>-	i2c0_imux: i2c0-imux@0 {</div><div class='add'>+	i2c0_imux: i2c-mux-0 {</div><div class='ctx'> 		compatible = "i2c-mux-pinctrl";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		i2c-parent = &lt;&amp;i2c0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c0_emux: i2c0-emux@0 {</div><div class='add'>+	i2c0_emux: i2c-mux-1 {</div><div class='ctx'> 		compatible = "i2c-mux-gpio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -427,62 +418,62 @@</div><div class='ctx'> 	pinctrl-10 = &lt;&amp;i2cmux_10&gt;;</div><div class='ctx'> 	pinctrl-11 = &lt;&amp;i2cmux_11&gt;;</div><div class='ctx'> 	pinctrl-12 = &lt;&amp;i2cmux_pins_i&gt;;</div><div class='del'>-	i2c_sfp1: i2c_sfp1 {</div><div class='add'>+	i2c_sfp1: i2c@0 {</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp2: i2c_sfp2 {</div><div class='add'>+	i2c_sfp2: i2c@1 {</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp3: i2c_sfp3 {</div><div class='add'>+	i2c_sfp3: i2c@2 {</div><div class='ctx'> 		reg = &lt;0x2&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp4: i2c_sfp4 {</div><div class='add'>+	i2c_sfp4: i2c@3 {</div><div class='ctx'> 		reg = &lt;0x3&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp5: i2c_sfp5 {</div><div class='add'>+	i2c_sfp5: i2c@4 {</div><div class='ctx'> 		reg = &lt;0x4&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp6: i2c_sfp6 {</div><div class='add'>+	i2c_sfp6: i2c@5 {</div><div class='ctx'> 		reg = &lt;0x5&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp7: i2c_sfp7 {</div><div class='add'>+	i2c_sfp7: i2c@6 {</div><div class='ctx'> 		reg = &lt;0x6&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp8: i2c_sfp8 {</div><div class='add'>+	i2c_sfp8: i2c@7 {</div><div class='ctx'> 		reg = &lt;0x7&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp9: i2c_sfp9 {</div><div class='add'>+	i2c_sfp9: i2c@8 {</div><div class='ctx'> 		reg = &lt;0x8&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp10: i2c_sfp10 {</div><div class='add'>+	i2c_sfp10: i2c@9 {</div><div class='ctx'> 		reg = &lt;0x9&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp11: i2c_sfp11 {</div><div class='add'>+	i2c_sfp11: i2c@a {</div><div class='ctx'> 		reg = &lt;0xa&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp12: i2c_sfp12 {</div><div class='add'>+	i2c_sfp12: i2c@b {</div><div class='ctx'> 		reg = &lt;0xb&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -495,42 +486,42 @@</div><div class='ctx'> 		     &amp;gpio 61 GPIO_ACTIVE_HIGH</div><div class='ctx'> 		     &amp;gpio 54 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	idle-state = &lt;0x8&gt;;</div><div class='del'>-	i2c_sfp13: i2c_sfp13 {</div><div class='add'>+	i2c_sfp13: i2c@0 {</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp14: i2c_sfp14 {</div><div class='add'>+	i2c_sfp14: i2c@1 {</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp15: i2c_sfp15 {</div><div class='add'>+	i2c_sfp15: i2c@2 {</div><div class='ctx'> 		reg = &lt;0x2&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp16: i2c_sfp16 {</div><div class='add'>+	i2c_sfp16: i2c@3 {</div><div class='ctx'> 		reg = &lt;0x3&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp17: i2c_sfp17 {</div><div class='add'>+	i2c_sfp17: i2c@4 {</div><div class='ctx'> 		reg = &lt;0x4&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp18: i2c_sfp18 {</div><div class='add'>+	i2c_sfp18: i2c@5 {</div><div class='ctx'> 		reg = &lt;0x5&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp19: i2c_sfp19 {</div><div class='add'>+	i2c_sfp19: i2c@6 {</div><div class='ctx'> 		reg = &lt;0x6&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp20: i2c_sfp20 {</div><div class='add'>+	i2c_sfp20: i2c@7 {</div><div class='ctx'> 		reg = &lt;0x7&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi<br/>index 82ce007d9959..af2f1831f07f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi</a></div><div class='hunk'>@@ -15,42 +15,42 @@</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='del'>-		led@0 {</div><div class='add'>+		led-0 {</div><div class='ctx'> 			label = "eth60:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 28 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@1 {</div><div class='add'>+		led-1 {</div><div class='ctx'> 			label = "eth60:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 28 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@2 {</div><div class='add'>+		led-2 {</div><div class='ctx'> 			label = "eth61:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 29 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@3 {</div><div class='add'>+		led-3 {</div><div class='ctx'> 			label = "eth61:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 29 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@4 {</div><div class='add'>+		led-4 {</div><div class='ctx'> 			label = "eth62:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 30 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@5 {</div><div class='add'>+		led-5 {</div><div class='ctx'> 			label = "eth62:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 30 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@6 {</div><div class='add'>+		led-6 {</div><div class='ctx'> 			label = "eth63:yellow";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 31 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='del'>-		led@7 {</div><div class='add'>+		led-7 {</div><div class='ctx'> 			label = "eth63:green";</div><div class='ctx'> 			gpios = &lt;&amp;sgpio_out1 31 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='hunk'>@@ -89,15 +89,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		spi-max-frequency = &lt;8000000&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	spi@0 {</div><div class='ctx'> 		compatible = "spi-mux";</div><div class='ctx'> 		mux-controls = &lt;&amp;mux&gt;;</div><div class='hunk'>@@ -129,7 +120,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;axi {</div><div class='del'>-	i2c0_imux: i2c0-imux@0 {</div><div class='add'>+	i2c0_imux: i2c-mux {</div><div class='ctx'> 		compatible = "i2c-mux-pinctrl";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -146,22 +137,22 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;i2cmux_s31&gt;;</div><div class='ctx'> 	pinctrl-3 = &lt;&amp;i2cmux_s32&gt;;</div><div class='ctx'> 	pinctrl-4 = &lt;&amp;i2cmux_pins_i&gt;;</div><div class='del'>-	i2c_sfp1: i2c_sfp1 {</div><div class='add'>+	i2c_sfp1: i2c@0 {</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp2: i2c_sfp2 {</div><div class='add'>+	i2c_sfp2: i2c@1 {</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp3: i2c_sfp3 {</div><div class='add'>+	i2c_sfp3: i2c@2 {</div><div class='ctx'> 		reg = &lt;0x2&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	i2c_sfp4: i2c_sfp4 {</div><div class='add'>+	i2c_sfp4: i2c@3 {</div><div class='ctx'> 		reg = &lt;0x3&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts<br/>index a5ab2bc0f835..eeceb5b292a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> 		stdout-path = &amp;serial0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts<br/>index 14d58859bb55..683ac124523b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra132-norrin.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/nvidia/tegra132-norrin.dts</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'> 	compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='del'>-		rtc0 = "/i2c@7000d000/as3722@40";</div><div class='del'>-		rtc1 = "/rtc@7000e000";</div><div class='add'>+		rtc0 = &amp;as3722;</div><div class='add'>+		rtc1 = &amp;tegra_rtc;</div><div class='ctx'> 		serial0 = &amp;uarta;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi<br/>index 7e24a212c7e4..5bcccfef3f7f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra132.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra132.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra132.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/nvidia/tegra132.dtsi</a></div><div class='hunk'>@@ -572,7 +572,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@7000e000 {</div><div class='add'>+	tegra_rtc: rtc@7000e000 {</div><div class='ctx'> 		compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";</div><div class='ctx'> 		reg = &lt;0x0 0x7000e000 0x0 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts<br/>index 9ebb7369256e..2e5b6b2c1f56 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra210-smaug.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/nvidia/tegra210-smaug.dts</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x80000000 0x0 0xc0000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi<br/>index 47f8268e46bf..882b1d1f4ada 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra210.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/nvidia/tegra210.dtsi</a></div><div class='hunk'>@@ -2004,7 +2004,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a57-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi<br/>index 78cbfdd98dd1..f2e2d8d6845b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra234.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/nvidia/tegra234.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra234.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/nvidia/tegra234.dtsi</a></div><div class='hunk'>@@ -4406,6 +4406,22 @@</div><div class='ctx'> 				 */</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			crypto@15820000 {</div><div class='add'>+				compatible = "nvidia,tegra234-se-aes";</div><div class='add'>+				reg = &lt;0x00 0x15820000 0x00 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;bpmp TEGRA234_CLK_SE&gt;;</div><div class='add'>+				iommus = &lt;&amp;smmu_niso1 TEGRA234_SID_SES_SE1&gt;;</div><div class='add'>+				dma-coherent;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			crypto@15840000 {</div><div class='add'>+				compatible = "nvidia,tegra234-se-hash";</div><div class='add'>+				reg = &lt;0x00 0x15840000 0x00 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;bpmp TEGRA234_CLK_SE&gt;;</div><div class='add'>+				iommus = &lt;&amp;smmu_niso1 TEGRA234_SID_SES_SE2&gt;;</div><div class='add'>+				dma-coherent;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie@140a0000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile<br/>index 7d40ec5e7d21..f63abb43e9fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/Makefile</a></div><div class='hunk'>@@ -241,6 +241,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-sony-xperia-nagara-pdx224.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8550-hdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8550-mtp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8550-qrd.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm8550-sony-xperia-yodo-pdx234.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8650-mtp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8650-qrd.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-crd.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts<br/>index 9ffad7d1f2b6..aba08424aa38 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/apq8016-sbc.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/apq8016-sbc.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/apq8016-sbc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/apq8016-sbc.dts</a></div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> </div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		led@1 {</div><div class='add'>+		led-1 {</div><div class='ctx'> 			label = "apq8016-sbc:green:user1";</div><div class='ctx'> 			function = LED_FUNCTION_HEARTBEAT;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@2 {</div><div class='add'>+		led-2 {</div><div class='ctx'> 			label = "apq8016-sbc:green:user2";</div><div class='ctx'> 			function = LED_FUNCTION_DISK_ACTIVITY;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='hunk'>@@ -109,7 +109,7 @@</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@3 {</div><div class='add'>+		led-3 {</div><div class='ctx'> 			label = "apq8016-sbc:green:user3";</div><div class='ctx'> 			function = LED_FUNCTION_DISK_ACTIVITY;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='hunk'>@@ -118,7 +118,7 @@</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@4 {</div><div class='add'>+		led-4 {</div><div class='ctx'> 			label = "apq8016-sbc:green:user4";</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pm8916_gpios 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -127,7 +127,7 @@</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@5 {</div><div class='add'>+		led-5 {</div><div class='ctx'> 			label = "apq8016-sbc:yellow:wlan";</div><div class='ctx'> 			function = LED_FUNCTION_WLAN;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@6 {</div><div class='add'>+		led-6 {</div><div class='ctx'> 			label = "apq8016-sbc:blue:bt";</div><div class='ctx'> 			function = LED_FUNCTION_BLUETOOTH;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi<br/>index 4e29adea570a..17ab6c475958 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/ipq6018.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/ipq6018.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/ipq6018.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/ipq6018.dtsi</a></div><div class='hunk'>@@ -907,6 +907,16 @@</div><div class='ctx'> 				      "axi_s_sticky";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi<br/>index 1b8379ba87f9..34e2f80514a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> 		stdout-path = "serial0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x40000000 0x0 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi<br/>index e5b89753aa5c..5d42de829e75 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/ipq8074.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/ipq8074.dtsi</a></div><div class='hunk'>@@ -323,6 +323,13 @@</div><div class='ctx'> 				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			serial_5_pins: serial5-state {</div><div class='add'>+				pins = "gpio9", "gpio16";</div><div class='add'>+				function = "blsp5_uart";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			i2c_0_pins: i2c-0-state {</div><div class='ctx'> 				pins = "gpio42", "gpio43";</div><div class='ctx'> 				function = "blsp1_i2c";</div><div class='hunk'>@@ -349,7 +356,7 @@</div><div class='ctx'> 				       "gpio5", "gpio6", "gpio7",</div><div class='ctx'> 				       "gpio8", "gpio10", "gpio11",</div><div class='ctx'> 				       "gpio12", "gpio13", "gpio14",</div><div class='del'>-				       "gpio15", "gpio16", "gpio17";</div><div class='add'>+				       "gpio15", "gpio17";</div><div class='ctx'> 				function = "qpic";</div><div class='ctx'> 				drive-strength = &lt;8&gt;;</div><div class='ctx'> 				bias-disable;</div><div class='hunk'>@@ -471,6 +478,18 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		blsp1_uart6: serial@78b4000 {</div><div class='add'>+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='add'>+			reg = &lt;0x078b4000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_UART6_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			pinctrl-0 = &lt;&amp;serial_5_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		blsp1_spi1: spi@78b5000 {</div><div class='ctx'> 			compatible = "qcom,spi-qup-v2.2.1";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -864,6 +883,16 @@</div><div class='ctx'> 				      "ahb",</div><div class='ctx'> 				      "axi_m_sticky";</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0: pcie@20000000 {</div><div class='hunk'>@@ -929,6 +958,16 @@</div><div class='ctx'> 				      "axi_m_sticky",</div><div class='ctx'> 				      "axi_s_sticky";</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts<br/>index 3a3e794c022f..7f0c2c1b8a94 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Longcheer L8150";</div><div class='del'>-	compatible = "longcheer,l8150", "qcom,msm8916-v1-qrd/9-v1", "qcom,msm8916";</div><div class='add'>+	compatible = "longcheer,l8150", "qcom,msm8916";</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts b/arch/arm64/boot/dts/qcom/msm8916-mtp.dts<br/>index ac527a3a0826..c11a845e91bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-mtp.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-mtp.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-mtp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8916-mtp.dts</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm Technologies, Inc. MSM 8916 MTP";</div><div class='del'>-	compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp/1", "qcom,msm8916";</div><div class='add'>+	compatible = "qcom,msm8916-mtp", "qcom,msm8916";</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi<br/>index 2937495940ea..4bbbee80b5e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi</a></div><div class='hunk'>@@ -128,6 +128,12 @@</div><div class='ctx'> </div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;muic_int_default&gt;;</div><div class='add'>+</div><div class='add'>+			usb_con: connector {</div><div class='add'>+				compatible = "usb-b-connector";</div><div class='add'>+				label = "micro-USB";</div><div class='add'>+				type = "micro";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi<br/>index 3c49dac92d2d..c50f81a68897 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi</a></div><div class='hunk'>@@ -23,6 +23,12 @@</div><div class='ctx'> </div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;muic_int_default&gt;;</div><div class='add'>+</div><div class='add'>+			usb_con: connector {</div><div class='add'>+				compatible = "usb-b-connector";</div><div class='add'>+				label = "micro-USB";</div><div class='add'>+				type = "micro";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi<br/>index c2800ad2dd5b..5e933fb8b363 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi</a></div><div class='hunk'>@@ -26,6 +26,30 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clk_pwm_backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;clk_pwm 0 100000&gt;;</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 98 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		brightness-levels = &lt;0 255&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;255&gt;;</div><div class='add'>+		default-brightness-level = &lt;128&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;backlight_en_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_pwm: pwm {</div><div class='add'>+		compatible = "clk-pwm";</div><div class='add'>+		#pwm-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;gcc GCC_GP2_CLK&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;backlight_pwm_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='hunk'>@@ -66,6 +90,19 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;motor_en_default&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_tsp_a: regulator-vdd-tsp-a {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_tsp_a";</div><div class='add'>+		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 73 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tsp_en_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_i2c1 {</div><div class='hunk'>@@ -94,6 +131,26 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;blsp_i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen: touchscreen@20 {</div><div class='add'>+		compatible = "zinitix,bt541";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 13 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		touchscreen-size-x = &lt;540&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;960&gt;;</div><div class='add'>+</div><div class='add'>+		vcca-supply = &lt;&amp;reg_vdd_tsp_a&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;pm8916_l6&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tsp_int_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -166,6 +223,18 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='add'>+	backlight_en_default: backlight-en-default-state {</div><div class='add'>+		pins = "gpio98";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_pwm_default: backlight-pwm-default-state {</div><div class='add'>+		pins = "gpio50";</div><div class='add'>+		function = "gcc_gp2_clk_a";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	fg_alert_default: fg-alert-default-state {</div><div class='ctx'> 		pins = "gpio121";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -200,4 +269,18 @@</div><div class='ctx'> 		drive-strength = &lt;2&gt;;</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	tsp_en_default: tsp-en-default-state {</div><div class='add'>+		pins = "gpio73";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsp_int_default: tsp-int-default-state {</div><div class='add'>+		pins = "gpio13";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi<br/>index 42843771ae2a..b438fa81886c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi</a></div><div class='hunk'>@@ -5,6 +5,9 @@</div><div class='ctx'> /* SM5504 MUIC instead of SM5502 */</div><div class='ctx'> /delete-node/ &amp;muic;</div><div class='ctx'> </div><div class='add'>+/* Touchscreen varies depending on model variant */</div><div class='add'>+/delete-node/ &amp;touchscreen;</div><div class='add'>+</div><div class='ctx'> &amp;blsp_i2c1 {</div><div class='ctx'> 	muic: extcon@14 {</div><div class='ctx'> 		compatible = "siliconmitus,sm5504-muic";</div><div class='hunk'>@@ -14,3 +17,12 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* On rossa backlight is controlled with MIPI DCS commands */</div><div class='add'>+&amp;clk_pwm {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;clk_pwm_backlight {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts b/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts<br/>index aa6c39482a2f..0c599e71a464 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts</a></div><div class='hunk'>@@ -286,6 +286,12 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-0 = &lt;&amp;muic_int_default&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-b-connector";</div><div class='add'>+			label = "micro-USB";</div><div class='add'>+			type = "micro";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi<br/>index f1011bb641c6..5d818fe057dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8953.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8953.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8953.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8953.dtsi</a></div><div class='hunk'>@@ -1323,6 +1323,20 @@</div><div class='ctx'> 				snps,hird-threshold = /bits/ 8 &lt;0x00&gt;;</div><div class='ctx'> </div><div class='ctx'> 				maximum-speed = "high-speed";</div><div class='add'>+</div><div class='add'>+				usb-role-switch;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						usb_dwc3_hs: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi<br/>index 1601e46549e7..8d2cb6f41095 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8996.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8996.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8996.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8996.dtsi</a></div><div class='hunk'>@@ -1929,6 +1929,16 @@</div><div class='ctx'> 						"cfg",</div><div class='ctx'> 						"bus_master",</div><div class='ctx'> 						"bus_slave";</div><div class='add'>+</div><div class='add'>+				pcie@0 {</div><div class='add'>+					device_type = "pci";</div><div class='add'>+					reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+					bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pcie1: pcie@608000 {</div><div class='hunk'>@@ -1982,6 +1992,16 @@</div><div class='ctx'> 						"cfg",</div><div class='ctx'> 						"bus_master",</div><div class='ctx'> 						"bus_slave";</div><div class='add'>+</div><div class='add'>+				pcie@0 {</div><div class='add'>+					device_type = "pci";</div><div class='add'>+					reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+					bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pcie2: pcie@610000 {</div><div class='hunk'>@@ -2032,6 +2052,16 @@</div><div class='ctx'> 						"cfg",</div><div class='ctx'> 						"bus_master",</div><div class='ctx'> 						"bus_slave";</div><div class='add'>+</div><div class='add'>+				pcie@0 {</div><div class='add'>+					device_type = "pci";</div><div class='add'>+					reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+					bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi b/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi<br/>index 876c6921ddf0..d8cc0d729e99 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi</a></div><div class='hunk'>@@ -98,30 +98,35 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> 		label = "Side buttons";</div><div class='add'>+		pinctrl-0 = &lt;&amp;focus_n &amp;snapshot_n &amp;vol_down_n &amp;vol_up_n&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vol_down_n &amp;focus_n &amp;snapshot_n&gt;;</div><div class='del'>-		button-vol-down {</div><div class='del'>-			label = "Volume Down";</div><div class='del'>-			gpios = &lt;&amp;pm8998_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-			wakeup-source;</div><div class='add'>+		button-camera-focus {</div><div class='add'>+			label = "Camera Focus";</div><div class='add'>+			gpios = &lt;&amp;pm8998_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='ctx'> 			debounce-interval = &lt;15&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		button-camera-snapshot {</div><div class='ctx'> 			label = "Camera Snapshot";</div><div class='ctx'> 			gpios = &lt;&amp;pm8998_gpios 7 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='ctx'> 			debounce-interval = &lt;15&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button-camera-focus {</div><div class='del'>-			label = "Camera Focus";</div><div class='del'>-			gpios = &lt;&amp;pm8998_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='del'>-			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='add'>+		button-vol-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pm8998_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm8998_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;15&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -345,6 +350,14 @@</div><div class='ctx'> 		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_NO&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vol_up_n: vol-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_NO&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	focus_n: focus-n-state {</div><div class='ctx'> 		pins = "gpio7";</div><div class='ctx'> 		function = PMIC_GPIO_FUNC_NORMAL;</div><div class='hunk'>@@ -405,9 +418,33 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pm8998_resin {</div><div class='del'>-	linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+&amp;pmi8998_lpg {</div><div class='add'>+	qcom,power-source = &lt;1&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	multi-led {</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qusb2phy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi<br/>index 4dfe2d09ac28..d795b2bbe133 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8998.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/msm8998.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/msm8998.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/msm8998.dtsi</a></div><div class='hunk'>@@ -972,6 +972,16 @@</div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_0_GDSC&gt;;</div><div class='ctx'> 			iommu-map = &lt;0x100 &amp;anoc1_smmu 0x1480 1&gt;;</div><div class='ctx'> 			perst-gpios = &lt;&amp;tlmm 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie_phy: phy@1c06000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pm6150.dtsi b/arch/arm64/boot/dts/qcom/pm6150.dtsi<br/>index 11158c2bd524..6de6ed562d97 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/pm6150.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/pm6150.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/pm6150.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/pm6150.dtsi</a></div><div class='hunk'>@@ -64,15 +64,15 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pm6150_vbus: usb-vbus-regulator@1100 {</div><div class='del'>-			compatible = "qcom,pm6150-vbus-reg,</div><div class='del'>-				      qcom,pm8150b-vbus-reg";</div><div class='add'>+			compatible = "qcom,pm6150-vbus-reg",</div><div class='add'>+				     "qcom,pm8150b-vbus-reg";</div><div class='ctx'> 			reg = &lt;0x1100&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pm6150_typec: typec@1500 {</div><div class='del'>-			compatible = "qcom,pm6150-typec,</div><div class='del'>-				      qcom,pm8150b-typec";</div><div class='add'>+			compatible = "qcom,pm6150-typec",</div><div class='add'>+				     "qcom,pm8150b-typec";</div><div class='ctx'> 			reg = &lt;0x1500&gt;, &lt;0x1700&gt;;</div><div class='ctx'> 			interrupts = &lt;0x0 0x15 0x00 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 				     &lt;0x0 0x15 0x01 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pm6150l.dtsi b/arch/arm64/boot/dts/qcom/pm6150l.dtsi<br/>index d13a1ab7c20b..0fce45276e5c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/pm6150l.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/pm6150l.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/pm6150l.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/pm6150l.dtsi</a></div><div class='hunk'>@@ -118,6 +118,16 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pm6150l_lpg: pwm {</div><div class='add'>+			compatible = "qcom,pm6150l-lpg", "qcom,pm8150l-lpg";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#pwm-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pm6150l_wled: leds@d800 {</div><div class='ctx'> 			compatible = "qcom,pm6150l-wled";</div><div class='ctx'> 			reg = &lt;0xd800&gt;, &lt;0xd900&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi<br/>index 89beac833d43..106110a9f551 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcm2290.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcm2290.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcm2290.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qcm2290.dtsi</a></div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -694,10 +694,31 @@</div><div class='ctx'> 			clock-output-names = "usb3_phy_pipe_clk_src";</div><div class='ctx'> </div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='add'>+			orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 			qcom,tcsr-reg = &lt;&amp;tcsr_regs 0xb244&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usb_qmpphy_out: endpoint {</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usb_qmpphy_usb_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_dwc3_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		system_noc: interconnect@1880000 {</div><div class='hunk'>@@ -1380,6 +1401,27 @@</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='ctx'> 				maximum-speed = "super-speed";</div><div class='ctx'> 				dr_mode = "otg";</div><div class='add'>+				usb-role-switch;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						usb_dwc3_hs: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						usb_dwc3_ss: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;usb_qmpphy_usb_ss_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1858,7 +1900,7 @@</div><div class='ctx'> 			compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";</div><div class='ctx'> 			reg = &lt;0x0 0x0f521000 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "freq-domain0";</div><div class='del'>-			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;lmh_cluster 0&gt;;</div><div class='ctx'> 			interrupt-names = "dcvsh-irq-0";</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;, &lt;&amp;gcc GPLL0&gt;;</div><div class='ctx'> 			clock-names = "xo", "alternate";</div><div class='hunk'>@@ -1866,6 +1908,18 @@</div><div class='ctx'> 			#freq-domain-cells = &lt;1&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		lmh_cluster: lmh@f550800 {</div><div class='add'>+			compatible = "qcom,qcm2290-lmh", "qcom,sm8150-lmh";</div><div class='add'>+			reg = &lt;0x0 0x0f550800 0x0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			cpus = &lt;&amp;CPU0&gt;;</div><div class='add'>+			qcom,lmh-temp-arm-millicelsius = &lt;65000&gt;;</div><div class='add'>+			qcom,lmh-temp-low-millicelsius = &lt;94500&gt;;</div><div class='add'>+			qcom,lmh-temp-high-millicelsius = &lt;95000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts<br/>index 4ff9fc24e50e..f3432701945f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts</a></div><div class='hunk'>@@ -77,6 +77,8 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 140 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='ctx'> 		connector@0 {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts<br/>index e4bfad50a669..47ca2d000341 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcm6490-idp.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcm6490-idp.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcm6490-idp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qcm6490-idp.dts</a></div><div class='hunk'>@@ -9,7 +9,9 @@</div><div class='ctx'> #define PM7250B_SID 8</div><div class='ctx'> #define PM7250B_SID1 9</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> #include "sc7280.dtsi"</div><div class='ctx'> #include "pm7250b.dtsi"</div><div class='hunk'>@@ -35,10 +37,45 @@</div><div class='ctx'> 		serial0 = &amp;uart5;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pm8350c_pwm_backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pm8350c_pwm 3 65535&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pm8350c_gpios 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_lcd_bl_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	lcd_disp_bias: regulator-lcd-disp-bias {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "lcd_disp_bias";</div><div class='add'>+		regulator-min-microvolt = &lt;5500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5500000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pm7250b_gpios 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd_disp_bias_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_vol_up_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume_up";</div><div class='add'>+			gpios = &lt;&amp;pm7325_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		xbl_mem: xbl@80700000 {</div><div class='ctx'> 			reg = &lt;0x0 0x80700000 0x0 0x100000&gt;;</div><div class='hunk'>@@ -158,129 +195,151 @@</div><div class='ctx'> 		vdd-l14-l16-supply = &lt;&amp;vreg_s8b_1p272&gt;;</div><div class='ctx'> </div><div class='ctx'> 		vreg_s1b_1p872: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1b_1p872";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1840000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s2b_0p876: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2b_0p876";</div><div class='ctx'> 			regulator-min-microvolt = &lt;570070&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s7b_0p972: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7b_0p972";</div><div class='ctx'> 			regulator-min-microvolt = &lt;535000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1120000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s8b_1p272: smps8 {</div><div class='add'>+			regulator-name = "vreg_s8b_1p272";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1500000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_RET&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l1b_0p912: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_0p912";</div><div class='ctx'> 			regulator-min-microvolt = &lt;825000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;925000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2b_3p072: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p072";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l3b_0p504: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b_0p504";</div><div class='ctx'> 			regulator-min-microvolt = &lt;312000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;910000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l4b_0p752: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;752000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;820000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		reg_l5b_0p752: ldo5 {</div><div class='add'>+			regulator-name = "reg_l5b_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;552000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;832000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6b_1p2: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p2";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1140000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l7b_2p952: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p952";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2400000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l8b_0p904: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_0p904";</div><div class='ctx'> 			regulator-min-microvolt = &lt;870000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;970000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l9b_1p2: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_1p2";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l11b_1p504: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11b_1p504";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1504000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l12b_0p751: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_0p751";</div><div class='ctx'> 			regulator-min-microvolt = &lt;751000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;824000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13b_0p53: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_0p53";</div><div class='ctx'> 			regulator-min-microvolt = &lt;530000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;824000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l14b_1p08: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_1p08";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1080000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l15b_0p765: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_0p765";</div><div class='ctx'> 			regulator-min-microvolt = &lt;765000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1020000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l16b_1p1: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_1p1";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l17b_1p7: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_1p7";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l18b_1p8: ldo18 {</div><div class='add'>+			regulator-name = "vreg_l18b_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l19b_1p8: ldo19 {</div><div class='add'>+			regulator-name = "vreg_l19b_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='hunk'>@@ -312,116 +371,217 @@</div><div class='ctx'> 		vdd-bob-supply = &lt;&amp;vph_pwr&gt;;</div><div class='ctx'> </div><div class='ctx'> 		vreg_s1c_2p19: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c_2p19";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2190000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2210000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s2c_0p752: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2c_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;750000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;800000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s5c_0p752: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5c_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;465000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s7c_0p752: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7c_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;465000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;800000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s9c_1p084: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9c_1p084";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1010000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l1c_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2c_1p62: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l3c_2p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_2p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3540000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l4c_1p62: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l5c_1p62: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6c_2p96: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c_2p96";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l7c_3p0: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c_3p0";</div><div class='ctx'> 			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l8c_1p62: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l9c_2p96: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c_2p96";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;35440000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l10c_0p88: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10c_0p88";</div><div class='ctx'> 			regulator-min-microvolt = &lt;720000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l11c_2p8: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11c_2p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l12c_1p65: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c_1p65";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13c_2p7: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c_2p7";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_bob_3p296: bob {</div><div class='add'>+			regulator-name = "vreg_bob_3p296";</div><div class='ctx'> 			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi {</div><div class='add'>+	vdda-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "novatek,nt36672e";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 44 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddi-supply = &lt;&amp;vreg_l8c_1p62&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;lcd_disp_bias&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;lcd_disp_bias&gt;;</div><div class='add'>+</div><div class='add'>+		backlight = &lt;&amp;pm8350c_pwm_backlight&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel0_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm7250b_gpios {</div><div class='add'>+	lcd_disp_bias_en: lcd-disp-bias-en-state {</div><div class='add'>+		pins = "gpio2";</div><div class='add'>+		function = "func1";</div><div class='add'>+		bias-disable;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8350c_gpios {</div><div class='add'>+	pmic_lcd_bl_en: pmic-lcd-bl-en-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_lcd_bl_pwm: pmic-lcd-bl-pwm-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "func1";</div><div class='add'>+		bias-disable;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm7325_gpios {</div><div class='add'>+	key_vol_up_default: key-vol-up-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		input-enable;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm8350c_pwm {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pmic_lcd_bl_pwm&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	multi-led {</div><div class='hunk'>@@ -448,10 +608,39 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/qcm6490/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/qcm6490/cdsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/qcm6490/modem.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_wpss {</div><div class='add'>+	firmware-name = "qcom/qcm6490/wpss.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhc_1 {</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	no-sd;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi<br/>index 10655401528e..a22b4501ce1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcs404-evb.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qcs404-evb.dtsi</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 		vddrf-supply = &lt;&amp;vreg_l1_1p3&gt;;</div><div class='ctx'> 		vddch0-supply = &lt;&amp;vdd_ch0_3p3&gt;;</div><div class='ctx'> </div><div class='del'>-		local-bd-address = [ 02 00 00 00 5a ad ];</div><div class='add'>+		local-bd-address = [ 00 00 00 00 00 00 ];</div><div class='ctx'> </div><div class='ctx'> 		max-speed = &lt;3200000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi<br/>index a05d0234f7fc..ac451f378056 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcs404.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcs404.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcs404.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qcs404.dtsi</a></div><div class='hunk'>@@ -1516,6 +1516,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts<br/>index 97824c769ba3..a085ff5b5fb2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #include "pmk8350.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;ipa_fw_mem;</div><div class='del'>-/delete-node/ &amp;remoteproc_mpss;</div><div class='ctx'> /delete-node/ &amp;rmtfs_mem;</div><div class='ctx'> /delete-node/ &amp;adsp_mem;</div><div class='ctx'> /delete-node/ &amp;cdsp_mem;</div><div class='hunk'>@@ -39,6 +38,20 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dp-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP";</div><div class='add'>+		type = "mini";</div><div class='add'>+</div><div class='add'>+		hpd-gpios = &lt;&amp;tlmm 60 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_edp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		xbl_mem: xbl@80700000 {</div><div class='ctx'> 			reg = &lt;0x0 0x80700000 0x0 0x100000&gt;;</div><div class='hunk'>@@ -121,6 +134,49 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;redriver_usb_con_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;redriver_usb_con_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='hunk'>@@ -153,129 +209,154 @@</div><div class='ctx'> 		vdd-l14-l16-supply = &lt;&amp;vreg_s8b_1p272&gt;;</div><div class='ctx'> </div><div class='ctx'> 		vreg_s1b_1p872: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1b_1p872";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1840000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s2b_0p876: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2b_0p876";</div><div class='ctx'> 			regulator-min-microvolt = &lt;570070&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s7b_0p972: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7b_0p972";</div><div class='ctx'> 			regulator-min-microvolt = &lt;535000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1120000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s8b_1p272: smps8 {</div><div class='add'>+			regulator-name = "vreg_s8b_1p272";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1500000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_RET&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l1b_0p912: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_0p912";</div><div class='ctx'> 			regulator-min-microvolt = &lt;825000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;925000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2b_3p072: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p072";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l3b_0p504: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b_0p504";</div><div class='ctx'> 			regulator-min-microvolt = &lt;312000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;910000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l4b_0p752: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;752000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;820000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		reg_l5b_0p752: ldo5 {</div><div class='add'>+			regulator-name = "reg_l5b_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;552000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;832000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6b_1p2: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p2";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1140000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l7b_2p952: ldo7 {</div><div class='del'>-			regulator-min-microvolt = &lt;2400000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-name = "vreg_l7b_2p952";</div><div class='add'>+			regulator-min-microvolt = &lt;2952000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2952000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l8b_0p904: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_0p904";</div><div class='ctx'> 			regulator-min-microvolt = &lt;870000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;970000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l9b_1p2: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_1p2";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l11b_1p504: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11b_1p504";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1504000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l12b_0p751: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_0p751";</div><div class='ctx'> 			regulator-min-microvolt = &lt;751000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;824000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13b_0p53: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_0p53";</div><div class='ctx'> 			regulator-min-microvolt = &lt;530000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;824000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l14b_1p08: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_1p08";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1080000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l15b_0p765: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_0p765";</div><div class='ctx'> 			regulator-min-microvolt = &lt;765000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1020000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l16b_1p1: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_1p1";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l17b_1p7: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_1p7";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l18b_1p8: ldo18 {</div><div class='add'>+			regulator-name = "vreg_l18b_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l19b_1p8: ldo19 {</div><div class='add'>+			regulator-name = "vreg_l19b_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='hunk'>@@ -304,109 +385,128 @@</div><div class='ctx'> 		vdd-bob-supply = &lt;&amp;vph_pwr&gt;;</div><div class='ctx'> </div><div class='ctx'> 		vreg_s1c_2p19: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c_2p19";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2190000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2210000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s2c_0p752: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2c_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;750000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;800000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s5c_0p752: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5c_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;465000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s7c_0p752: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7c_0p752";</div><div class='ctx'> 			regulator-min-microvolt = &lt;465000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;800000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s9c_1p084: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9c_1p084";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1010000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l1c_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2c_1p62: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l3c_2p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_2p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3540000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l4c_1p62: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l5c_1p62: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6c_2p96: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c_2p96";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l7c_3p0: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c_3p0";</div><div class='ctx'> 			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l8c_1p62: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c_1p62";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l9c_2p96: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c_2p96";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;35440000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l10c_0p88: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10c_0p88";</div><div class='ctx'> 			regulator-min-microvolt = &lt;720000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l11c_2p8: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11c_2p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l12c_1p65: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c_1p65";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13c_2p7: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c_2p7";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_bob_3p296: bob {</div><div class='add'>+			regulator-name = "vreg_bob_3p296";</div><div class='ctx'> 			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -430,10 +530,102 @@</div><div class='ctx'> 			   &lt;GCC_WPSS_RSCP_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@1c {</div><div class='add'>+		compatible = "onnn,nb7vpq904m";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				redriver_usb_con_ss: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				redriver_phy_con_ss: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_dp_qmpphy_out&gt;;</div><div class='add'>+					data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				redriver_usb_con_sbu: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_edp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_edp_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;dp_connector_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_edp_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/qcs6490/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/qcs6490/cdsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/qcs6490/modem.mdt";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_wpss {</div><div class='add'>+	firmware-name = "qcom/qcs6490/wpss.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;32 2&gt;, /* ADSP */</div><div class='ctx'> 			       &lt;48 4&gt;; /* NFC */</div><div class='hunk'>@@ -449,7 +641,16 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3 {</div><div class='del'>-	dr_mode = "peripheral";</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_ss {</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='hunk'>@@ -464,9 +665,49 @@</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l1b_0p912&gt;;</div><div class='ctx'> </div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;redriver_phy_con_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy_usb_ss_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss_dp_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 175 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l7b_2p952&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;800000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;900000&gt;;</div><div class='add'>+	vccq2-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq2-max-microamp = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='ctx'> 	memory-region = &lt;&amp;wlan_fw_mem&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */</div><div class='add'>+</div><div class='add'>+&amp;edp_hot_plug_det {</div><div class='add'>+	function = "gpio";</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi<br/>index 832f472c4b7a..f2a5e2e40461 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qdu1000.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qdu1000.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qdu1000.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qdu1000.dtsi</a></div><div class='hunk'>@@ -177,7 +177,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts<br/>index 6e9dd0312adc..bb5191422660 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qrb2210-rb1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qrb2210-rb1.dts</a></div><div class='hunk'>@@ -262,6 +262,46 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm4125_typec {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+</div><div class='add'>+		power-role = "dual";</div><div class='add'>+		data-role = "dual";</div><div class='add'>+		self-powered;</div><div class='add'>+</div><div class='add'>+		typec-power-opmode = "default";</div><div class='add'>+		pd-disable;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				pm4125_hs_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_dwc3_hs&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				pm4125_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm4125_vbus {</div><div class='add'>+	regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+	regulator-max-microamp = &lt;500000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -535,14 +575,8 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;pm4125_l12&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;pm4125_l13&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='add'>+&amp;usb_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pm4125_hs_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_hsphy {</div><div class='hunk'>@@ -552,12 +586,23 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;pm4125_l12&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;pm4125_l13&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pm4125_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wifi {</div><div class='ctx'> 	vdd-0.8-cx-mx-supply = &lt;&amp;pm4125_l7&gt;;</div><div class='ctx'> 	vdd-1.8-xo-supply = &lt;&amp;pm4125_l13&gt;;</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;pm4125_l10&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;pm4125_l22&gt;;</div><div class='ctx'> 	qcom,ath10k-calibration-variant = "Thundercomm_RB1";</div><div class='add'>+	firmware-name = "qcm2290";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts<br/>index 696d6d43c56b..2c39bb1b97db 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/qrb4210-rb2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/qrb4210-rb2.dts</a></div><div class='hunk'>@@ -678,6 +678,7 @@</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;vreg_l17a_1p3&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;vreg_l23a_3p3&gt;;</div><div class='ctx'> 	qcom,ath10k-calibration-variant = "Thundercomm_RB2";</div><div class='add'>+	firmware-name = "qrb4210";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts<br/>index 5e4287f8c8cd..9e9c7f81096b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sa8155p-adp.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sa8155p-adp.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sa8155p-adp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sa8155p-adp.dts</a></div><div class='hunk'>@@ -283,7 +283,7 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13c_2p96: ldo13 {</div><div class='ctx'> 			regulator-name = "vreg_l13c_2p96";</div><div class='del'>-			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -367,6 +367,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmm8155au_1_gpios {</div><div class='add'>+	pmm8155au_1_sdc2_cd: sdc2-cd-default-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		input-enable;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -384,10 +394,10 @@</div><div class='ctx'> &amp;sdhc_2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	cd-gpios = &lt;&amp;tlmm 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pmm8155au_1_gpios 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc2_on&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;sdc2_off&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_on &amp;pmm8155au_1_sdc2_cd&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_off &amp;pmm8155au_1_sdc2_cd&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vreg_l13c_2p96&gt;; /* IO line power */</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vreg_l17a_2p96&gt;;  /* Card power line */</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='hunk'>@@ -505,13 +515,6 @@</div><div class='ctx'> 			bias-pull-up;		/* pull up */</div><div class='ctx'> 			drive-strength = &lt;16&gt;;	/* 16 MA */</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		sd-cd-pins {</div><div class='del'>-			pins = "gpio96";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			bias-pull-up;		/* pull up */</div><div class='del'>-			drive-strength = &lt;2&gt;;	/* 2 MA */</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdc2_off: sdc2-off-state {</div><div class='hunk'>@@ -532,13 +535,6 @@</div><div class='ctx'> 			bias-pull-up;		/* pull up */</div><div class='ctx'> 			drive-strength = &lt;2&gt;;	/* 2 MA */</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		sd-cd-pins {</div><div class='del'>-			pins = "gpio96";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			bias-pull-up;		/* pull up */</div><div class='del'>-			drive-strength = &lt;2&gt;;	/* 2 MA */</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb2phy_ac_en1_default: usb2phy-ac-en1-default-state {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi<br/>index 231cea1f0fa8..31de73594839 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sa8775p.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sa8775p.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sa8775p.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sa8775p.dtsi</a></div><div class='hunk'>@@ -3677,6 +3677,16 @@</div><div class='ctx'> 		phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 		status = "disabled";</div><div class='add'>+</div><div class='add'>+		pcie@0 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+			bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie0_phy: phy@1c04000 {</div><div class='hunk'>@@ -3777,6 +3787,16 @@</div><div class='ctx'> 		phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 		status = "disabled";</div><div class='add'>+</div><div class='add'>+		pcie@0 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+			bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie1_phy: phy@1c14000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi<br/>index 5260c63db007..8513be297120 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi</a></div><div class='hunk'>@@ -1167,6 +1167,7 @@ ap_spi_fp: &amp;spi10 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm6150l_gpios {</div><div class='add'>+	status = "disabled"; /* No GPIOs are consumed or configured */</div><div class='ctx'> 	gpio-line-names = "AP_SUSPEND",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi<br/>index 2b481e20ae38..4774a859bd7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc7180.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc7180.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc7180.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc7180.dtsi</a></div><div class='hunk'>@@ -1585,9 +1585,12 @@</div><div class='ctx'> 			compatible = "qcom,sc7180-qmp-ufs-phy",</div><div class='ctx'> 				     "qcom,sm7150-qmp-ufs-phy";</div><div class='ctx'> 			reg = &lt;0 0x01d87000 0 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_UFS_MEM_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;;</div><div class='del'>-			clock-names = "ref", "ref_aux";</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_MEM_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "ref",</div><div class='add'>+				      "ref_aux",</div><div class='add'>+				      "qref";</div><div class='ctx'> 			power-domains = &lt;&amp;gcc UFS_PHY_GDSC&gt;;</div><div class='ctx'> 			resets = &lt;&amp;ufs_mem_hc 0&gt;;</div><div class='ctx'> 			reset-names = "ufsphy";</div><div class='hunk'>@@ -2309,6 +2312,7 @@</div><div class='ctx'> 			compatible = "qcom,sc7180-dcc", "qcom,dcc";</div><div class='ctx'> 			reg = &lt;0x0 0x010a2000 0x0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0x0 0x010ae000 0x0 0x2000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		stm@6002000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi<br/>index 7e7f0f0fb41b..fc9ec367e3a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc7280.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc7280.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc7280.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc7280.dtsi</a></div><div class='hunk'>@@ -2273,6 +2273,16 @@</div><div class='ctx'> 				    &lt;0x100 &amp;apps_smmu 0x1c81 0x1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='hunk'>@@ -2352,6 +2362,8 @@</div><div class='ctx'> 				&lt;0 0&gt;,</div><div class='ctx'> 				&lt;0 0&gt;,</div><div class='ctx'> 				&lt;0 0&gt;;</div><div class='add'>+			qcom,ice = &lt;&amp;ice&gt;;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2374,6 +2386,13 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ice: crypto@1d88000 {</div><div class='add'>+			compatible = "qcom,sc7280-inline-crypto-engine",</div><div class='add'>+				     "qcom,inline-crypto-engine";</div><div class='add'>+			reg = &lt;0 0x01d88000 0 0x8000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cryptobam: dma-controller@1dc4000 {</div><div class='ctx'> 			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='ctx'> 			reg = &lt;0x0 0x01dc4000 0x0 0x28000&gt;;</div><div class='hunk'>@@ -3707,7 +3726,7 @@</div><div class='ctx'> 			compatible = "qcom,sc7280-adsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x03700000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -3944,7 +3963,7 @@</div><div class='ctx'> 			compatible = "qcom,sc7280-cdsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x0a300000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -4458,6 +4477,11 @@</div><div class='ctx'> 						opp-hz = /bits/ 64 &lt;506666667&gt;;</div><div class='ctx'> 						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					opp-608000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;608000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts<br/>index 0c22f3efec20..6af99116c715 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts</a></div><div class='hunk'>@@ -51,6 +51,8 @@</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 38 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 58 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		connector@0 {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='hunk'>@@ -329,12 +331,18 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l10e_2p9: ldo10 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2904000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2904000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l16e_3p0: ldo16 {</div><div class='hunk'>@@ -350,49 +358,58 @@</div><div class='ctx'> </div><div class='ctx'> 	zap-shader {</div><div class='ctx'> 		memory-region = &lt;&amp;gpu_mem&gt;;</div><div class='del'>-		firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";</div><div class='add'>+		firmware-name = "qcom/sc8180x/LENOVO/82AK/qcdxkmsuc8180.mbn";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c1_active&gt;, &lt;&amp;i2c1_hid_active&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_active&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	hid@10 {</div><div class='add'>+	touchscreen@10 {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 122 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_int_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c7 {</div><div class='del'>-	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	clock-frequency = &lt;1000000&gt;;</div><div class='ctx'> </div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c7_active&gt;, &lt;&amp;i2c7_hid_active&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c7_active&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	hid@5 {</div><div class='add'>+	keyboard@5 {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x5&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x20&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 37 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kb_int_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hid@2c {</div><div class='add'>+	touchpad@2c {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x20&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tp_int_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -669,14 +686,6 @@</div><div class='ctx'> 		drive-strength = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c1_hid_active: i2c1-hid-active-state {</div><div class='del'>-		pins = "gpio122";</div><div class='del'>-		function = "gpio";</div><div class='del'>-</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	i2c7_active: i2c7-active-state {</div><div class='ctx'> 		pins = "gpio98", "gpio99";</div><div class='ctx'> 		function = "qup7";</div><div class='hunk'>@@ -685,8 +694,8 @@</div><div class='ctx'> 		drive-strength = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c7_hid_active: i2c7-hid-active-state {</div><div class='del'>-		pins = "gpio37", "gpio24";</div><div class='add'>+	kb_int_default: kb-int-default-state {</div><div class='add'>+		pins = "gpio37";</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> </div><div class='ctx'> 		bias-pull-up;</div><div class='hunk'>@@ -718,6 +727,22 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	tp_int_default: tp-int-default-state {</div><div class='add'>+		pins = "gpio24";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_int_default: ts-int-default-state {</div><div class='add'>+		pins = "gpio122";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usbprim_sbu_default: usbprim-sbu-state {</div><div class='ctx'> 		oe-n-pins {</div><div class='ctx'> 			pins = "gpio152";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi<br/>index 32afc78d5b76..067712310560 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8180x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8180x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8180x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc8180x.dtsi</a></div><div class='hunk'>@@ -1777,6 +1777,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -1888,6 +1898,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie3_phy: phy@1c0c000 {</div><div class='hunk'>@@ -2000,6 +2020,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c16000 {</div><div class='hunk'>@@ -2112,6 +2142,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie2_phy: phy@1c1c000 {</div><div class='hunk'>@@ -2225,7 +2265,6 @@</div><div class='ctx'> </div><div class='ctx'> 		gpu: gpu@2c00000 {</div><div class='ctx'> 			compatible = "qcom,adreno-680.1", "qcom,adreno";</div><div class='del'>-			#stream-id-cells = &lt;16&gt;;</div><div class='ctx'> </div><div class='ctx'> 			reg = &lt;0 0x02c00000 0 0x40000&gt;;</div><div class='ctx'> 			reg-names = "kgsl_3d0_reg_memory";</div><div class='hunk'>@@ -2701,7 +2740,7 @@</div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_USB30_SEC_BCR&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;gcc USB30_SEC_GDSC&gt;;</div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					      &lt;&amp;pdc 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 10 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 11 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			interrupt-names = "hs_phy_irq", "ss_phy_irq",</div><div class='hunk'>@@ -2805,7 +2844,7 @@</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8180X_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-				interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				ports {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -2878,7 +2917,7 @@</div><div class='ctx'> 				reg-names = "dsi_ctrl";</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-				interrupts = &lt;4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;4&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='hunk'>@@ -2964,7 +3003,7 @@</div><div class='ctx'> 				reg-names = "dsi_ctrl";</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-				interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;5&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='hunk'>@@ -3030,7 +3069,8 @@</div><div class='ctx'> 				reg = &lt;0 0xae90000 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0xae90200 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0xae90400 0 0x600&gt;,</div><div class='del'>-				      &lt;0 0xae90a00 0 0x400&gt;;</div><div class='add'>+				      &lt;0 0xae90a00 0 0x400&gt;,</div><div class='add'>+				      &lt;0 0xae91000 0 0x400&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3106,7 +3146,8 @@</div><div class='ctx'> 				reg = &lt;0 0xae98000 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0xae98200 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0xae98400 0 0x600&gt;,</div><div class='del'>-				      &lt;0 0xae98a00 0 0x400&gt;;</div><div class='add'>+				      &lt;0 0xae98a00 0 0x400&gt;,</div><div class='add'>+				      &lt;0 0xae99000 0 0x400&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;13&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts<br/>index 15ae94c1602d..e937732abede 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts</a></div><div class='hunk'>@@ -100,6 +100,8 @@</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 166 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		connector@0 {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='hunk'>@@ -414,6 +416,13 @@</div><div class='ctx'> 			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vreg_l1b: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l3b: ldo3 {</div><div class='ctx'> 			regulator-name = "vreg_l3b";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='hunk'>@@ -464,6 +473,13 @@</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vreg_l8c: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l12c: ldo12 {</div><div class='ctx'> 			regulator-name = "vreg_l12c";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -497,6 +513,13 @@</div><div class='ctx'> 		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='ctx'> 		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='ctx'> </div><div class='add'>+		vreg_l2d: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l3d: ldo3 {</div><div class='ctx'> 			regulator-name = "vreg_l3d";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='hunk'>@@ -525,12 +548,26 @@</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vreg_l8d: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l9d: ldo9 {</div><div class='ctx'> 			regulator-name = "vreg_l9d";</div><div class='ctx'> 			regulator-min-microvolt = &lt;912000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;912000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		vreg_l10d: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -731,22 +768,14 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	pcie@0 {</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		bus-range = &lt;0x01 0xff&gt;;</div><div class='del'>-</div><div class='del'>-		wifi@0 {</div><div class='del'>-			compatible = "pci17cb,1103";</div><div class='del'>-			reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> </div><div class='del'>-			qcom,ath11k-calibration-variant = "LE_X13S";</div><div class='del'>-		};</div><div class='add'>+		qcom,ath11k-calibration-variant = "LE_X13S";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1168,6 +1197,56 @@</div><div class='ctx'> 	remote-endpoint = &lt;&amp;pmic_glink_con1_hs&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy0 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy1 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l8d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy2 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l8c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy3 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l8c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l8d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;vamacro {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi<br/>index a5b194813079..0549ba1fbeea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8280xp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sc8280xp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sc8280xp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sc8280xp.dtsi</a></div><div class='hunk'>@@ -50,7 +50,8 @@</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			capacity-dmips-mhz = &lt;602&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;981&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;549&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -77,7 +78,8 @@</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			capacity-dmips-mhz = &lt;602&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;981&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;549&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -99,7 +101,8 @@</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			capacity-dmips-mhz = &lt;602&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;981&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;549&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -121,7 +124,8 @@</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			capacity-dmips-mhz = &lt;602&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;981&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;549&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -144,6 +148,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;590&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -166,6 +171,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;590&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -188,6 +194,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;590&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -210,6 +217,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;590&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='hunk'>@@ -300,6 +308,7 @@</div><div class='ctx'> 		scm: scm {</div><div class='ctx'> 			compatible = "qcom,scm-sc8280xp", "qcom,scm";</div><div class='ctx'> 			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x13000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -862,6 +871,18 @@</div><div class='ctx'> 			#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		qfprom: efuse@784000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0 0x00784000 0 0x3000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			gpu_speed_bin: gpu-speed-bin@18b {</div><div class='add'>+				reg = &lt;0x18b 0x1&gt;;</div><div class='add'>+				bits = &lt;5 3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qup2: geniqup@8c0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0 0x008c0000 0 0x2000&gt;;</div><div class='hunk'>@@ -1731,6 +1752,8 @@</div><div class='ctx'> 			linux,pci-domain = &lt;6&gt;;</div><div class='ctx'> 			num-lanes = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0xe0000 0x10000&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1774,11 +1797,22 @@</div><div class='ctx'> 			reset-names = "pci";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_4_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;pcie4_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie4_port0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie4_phy: phy@1c06000 {</div><div class='hunk'>@@ -1831,6 +1865,8 @@</div><div class='ctx'> 			linux,pci-domain = &lt;5&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0xd0000 0x10000&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1872,11 +1908,22 @@</div><div class='ctx'> 			reset-names = "pci";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_3B_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;pcie3b_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie3b_port0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie3b_phy: phy@1c0e000 {</div><div class='hunk'>@@ -1929,6 +1976,8 @@</div><div class='ctx'> 			linux,pci-domain = &lt;4&gt;;</div><div class='ctx'> 			num-lanes = &lt;4&gt;;</div><div class='ctx'> </div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0xc0000 0x10000&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1970,11 +2019,22 @@</div><div class='ctx'> 			reset-names = "pci";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_3A_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;pcie3a_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie3a_port0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie3a_phy: phy@1c14000 {</div><div class='hunk'>@@ -2030,6 +2090,8 @@</div><div class='ctx'> 			linux,pci-domain = &lt;3&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0xb0000 0x10000&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -2071,11 +2133,22 @@</div><div class='ctx'> 			reset-names = "pci";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_2B_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;pcie2b_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie2b_port0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie2b_phy: phy@1c1e000 {</div><div class='hunk'>@@ -2128,6 +2201,8 @@</div><div class='ctx'> 			linux,pci-domain = &lt;2&gt;;</div><div class='ctx'> 			num-lanes = &lt;4&gt;;</div><div class='ctx'> </div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0xa0000 0x10000&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -2169,11 +2244,22 @@</div><div class='ctx'> 			reset-names = "pci";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_2A_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;pcie2a_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie2a_port0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie2a_phy: phy@1c24000 {</div><div class='hunk'>@@ -2641,7 +2727,7 @@</div><div class='ctx'> 			compatible = "qcom,sc8280xp-adsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x03000000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -3337,6 +3423,88 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb_2: usb@a4f8800 {</div><div class='add'>+			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";</div><div class='add'>+			reg = &lt;0 0x0a4f8800 0 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_MP_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_MP_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_MP_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_MP_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_MP_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB_NOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SYS_NOC_USB_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",</div><div class='add'>+				      "noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB30_MP_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB30_MP_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 127 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 126 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 129 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 128 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 131 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 130 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 133 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 132 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-names = "pwr_event_1", "pwr_event_2",</div><div class='add'>+					  "pwr_event_3", "pwr_event_4",</div><div class='add'>+					  "hs_phy_1",	 "hs_phy_2",</div><div class='add'>+					  "hs_phy_3",	 "hs_phy_4",</div><div class='add'>+					  "dp_hs_phy_1", "dm_hs_phy_1",</div><div class='add'>+					  "dp_hs_phy_2", "dm_hs_phy_2",</div><div class='add'>+					  "dp_hs_phy_3", "dm_hs_phy_3",</div><div class='add'>+					  "dp_hs_phy_4", "dm_hs_phy_4",</div><div class='add'>+					  "ss_phy_1",	 "ss_phy_2";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB30_MP_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB30_MP_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_USB3_MP 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_USB3_MP 0&gt;;</div><div class='add'>+			interconnect-names = "usb-ddr", "apps-usb";</div><div class='add'>+</div><div class='add'>+			wakeup-source;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb_2_dwc3: usb@a400000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0 0x0a400000 0 0xcd00&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				iommus = &lt;&amp;apps_smmu 0x800 0x0&gt;;</div><div class='add'>+				phys = &lt;&amp;usb_2_hsphy0&gt;, &lt;&amp;usb_2_qmpphy0&gt;,</div><div class='add'>+				       &lt;&amp;usb_2_hsphy1&gt;, &lt;&amp;usb_2_qmpphy1&gt;,</div><div class='add'>+				       &lt;&amp;usb_2_hsphy2&gt;,</div><div class='add'>+				       &lt;&amp;usb_2_hsphy3&gt;;</div><div class='add'>+				phy-names = "usb2-0", "usb3-0",</div><div class='add'>+					    "usb2-1", "usb3-1",</div><div class='add'>+					    "usb2-2",</div><div class='add'>+					    "usb2-3";</div><div class='add'>+				dr_mode = "host";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_0: usb@a6f8800 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";</div><div class='ctx'> 			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='hunk'>@@ -3361,10 +3529,12 @@</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='ctx'> 					  "ss_phy_irq";</div><div class='hunk'>@@ -3421,10 +3591,12 @@</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 12 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 13 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='ctx'> 					  "ss_phy_irq";</div><div class='hunk'>@@ -4448,6 +4620,11 @@</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		restart@c264000 {</div><div class='add'>+			compatible = "qcom,pshold";</div><div class='add'>+			reg = &lt;0 0x0c264000 0 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tsens1: thermal-sensor@c265000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-tsens", "qcom,tsens-v2";</div><div class='ctx'> 			reg = &lt;0 0x0c265000 0 0x1ff&gt;, /* TM */</div><div class='hunk'>@@ -4799,7 +4976,7 @@</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			msi-controller@17a40000 {</div><div class='add'>+			its: msi-controller@17a40000 {</div><div class='ctx'> 				compatible = "arm,gic-v3-its";</div><div class='ctx'> 				reg = &lt;0 0x17a40000 0 0x20000&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='hunk'>@@ -4966,6 +5143,11 @@</div><div class='ctx'> 			      &lt;0 0x18592000 0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "freq-domain0", "freq-domain1";</div><div class='ctx'> </div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dcvsh-irq-0",</div><div class='add'>+					  "dcvsh-irq-1";</div><div class='add'>+</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='ctx'> 			clock-names = "xo", "alternate";</div><div class='ctx'> </div><div class='hunk'>@@ -4977,7 +5159,7 @@</div><div class='ctx'> 			compatible = "qcom,sc8280xp-nsp0-pas";</div><div class='ctx'> 			reg = &lt;0 0x1b300000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp0_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp0_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -5108,7 +5290,7 @@</div><div class='ctx'> 			compatible = "qcom,sc8280xp-nsp1-pas";</div><div class='ctx'> 			reg = &lt;0 0x21300000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 887 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 887 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp1_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp1_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi<br/>index 819a5f8825e7..a4b722e0fc1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi</a></div><div class='hunk'>@@ -90,6 +90,8 @@</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_keys_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 		key-camera-focus {</div><div class='ctx'> 			label = "Camera Focus";</div><div class='hunk'>@@ -645,6 +647,13 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio_keys_default: gpio-keys-default-state {</div><div class='add'>+		pins = "gpio64", "gpio113";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	imx300_vana_default: imx300-vana-default-state {</div><div class='ctx'> 		pins = "gpio50";</div><div class='ctx'> 		function = "gpio";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts<br/>index 057579ae3013..e2708c74e95a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts</a></div><div class='hunk'>@@ -116,6 +116,33 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmi632_typec {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+</div><div class='add'>+		power-role = "dual";</div><div class='add'>+		data-role = "dual";</div><div class='add'>+		self-powered;</div><div class='add'>+</div><div class='add'>+		typec-power-opmode = "default";</div><div class='add'>+		pd-disable;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			pmi632_hs_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb_dwc3_hs&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmi632_vbus {</div><div class='add'>+	regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+	regulator-max-microamp = &lt;1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhc_1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	vmmc-supply = &lt;&amp;pm8953_l8&gt;;</div><div class='hunk'>@@ -240,8 +267,8 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb3_dwc3 {</div><div class='del'>-	dr_mode = "peripheral";</div><div class='add'>+&amp;usb_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmi632_hs_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wcnss {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts b/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts<br/>index 32a7bd59e1ec..176b0119fe6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts</a></div><div class='hunk'>@@ -441,6 +441,47 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0 {</div><div class='add'>+	vdda-supply = &lt;&amp;vreg_l1a_1p225&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "samsung,s6e3fa7-ams559nk06";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 75 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_default&gt;;</div><div class='add'>+</div><div class='add'>+		power-supply = &lt;&amp;vreg_l6b_3p3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vreg_l1b_0p925&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_mdp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm660l_gpios {</div><div class='ctx'> 	vol_up_pin: vol-up-state {</div><div class='ctx'> 		pins = "gpio7";</div><div class='hunk'>@@ -481,6 +522,29 @@</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;0 4&gt;, &lt;81 4&gt;;</div><div class='ctx'> </div><div class='add'>+	panel_default: panel-default-state {</div><div class='add'>+		te-pins {</div><div class='add'>+			pins = "gpio10";</div><div class='add'>+			function = "mdp_vsync";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-pins {</div><div class='add'>+			pins = "gpio75";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mode-pins {</div><div class='add'>+			pins = "gpio76";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	touchscreen_default: ts-default-state {</div><div class='ctx'> 		ts-reset-pins {</div><div class='ctx'> 			pins = "gpio99";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts<br/>index 1f517328199b..9a6d3d0c0ee4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm845-db845c.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm845-db845c.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm845-db845c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sdm845-db845c.dts</a></div><div class='hunk'>@@ -195,6 +195,12 @@</div><div class='ctx'> </div><div class='ctx'> 		gpio = &lt;&amp;tlmm 90 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='add'>+		/*</div><div class='add'>+		 * FIXME: this regulator is responsible for VBUS on the left USB</div><div class='add'>+		 * port. Keep it always on until we can correctly model this</div><div class='add'>+		 * relationship.</div><div class='add'>+		 */</div><div class='add'>+		regulator-always-on;</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pcie0_pwren_state&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi<br/>index 2f20be99ee7e..10de2bd46ffc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm845.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdm845.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdm845.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sdm845.dtsi</a></div><div class='hunk'>@@ -2375,6 +2375,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -2479,6 +2489,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0a000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi<br/>index 7dbdf8ca6de6..da1704061d58 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdx75.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sdx75.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sdx75.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sdx75.dtsi</a></div><div class='hunk'>@@ -224,7 +224,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -411,7 +411,7 @@</div><div class='ctx'> 		hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc: soc {</div><div class='add'>+	soc: soc@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi<br/>index 24bcec3366ef..84ff20a96c83 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm6350.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm6350.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm6350.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm6350.dtsi</a></div><div class='hunk'>@@ -1205,6 +1205,37 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cryptobam: dma-controller@1dc4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0 0x01dc4000 0 0x24000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			num-channels = &lt;16&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x426 0x11&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x432 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x436 0x11&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x438 0x1&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x43f 0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		crypto: crypto@1dfa000 {</div><div class='add'>+			compatible = "qcom,sm6350-qce", "qcom,sm8150-qce", "qcom,qce";</div><div class='add'>+			reg = &lt;0 0x01dfa000 0 0x6000&gt;;</div><div class='add'>+			dmas = &lt;&amp;cryptobam 4&gt;, &lt;&amp;cryptobam 5&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x426 0x11&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x432 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x436 0x11&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x438 0x1&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x43f 0x0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "memory";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ipa: ipa@1e40000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-ipa";</div><div class='ctx'> </div><div class='hunk'>@@ -1252,7 +1283,7 @@</div><div class='ctx'> 			compatible = "qcom,sm6350-adsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x03000000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1511,7 +1542,7 @@</div><div class='ctx'> 			compatible = "qcom,sm6350-cdsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x08300000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2033,6 +2064,14 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;mdss_dsi0_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf0_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss_dp_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				mdp_opp_table: opp-table {</div><div class='hunk'>@@ -2070,6 +2109,86 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			mdss_dp: displayport-controller@ae90000 {</div><div class='add'>+				compatible = "qcom,sm6350-dp", "qcom,sm8350-dp";</div><div class='add'>+				reg = &lt;0 0xae90000 0 0x200&gt;,</div><div class='add'>+				      &lt;0 0xae90200 0 0x200&gt;,</div><div class='add'>+				      &lt;0 0xae90400 0 0x600&gt;,</div><div class='add'>+				      &lt;0 0xae91000 0 0x400&gt;,</div><div class='add'>+				      &lt;0 0xae91400 0 0x400&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;12&gt;;</div><div class='add'>+				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+				clock-names = "core_iface",</div><div class='add'>+					      "core_aux",</div><div class='add'>+					      "ctrl_link",</div><div class='add'>+					      "ctrl_link_iface",</div><div class='add'>+					      "stream_pixel";</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='add'>+				phy-names = "dp";</div><div class='add'>+</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SM6350_CX&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dp_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dp_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dp_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-160000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;160000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-270000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-540000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-810000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			mdss_dsi0: dsi@ae94000 {</div><div class='ctx'> 				compatible = "qcom,sm6350-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='ctx'> 				reg = &lt;0 0x0ae94000 0 0x400&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi<br/>index 4386f8a9c636..f40509d91bbd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm6375.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm6375.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm6375.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm6375.dtsi</a></div><div class='hunk'>@@ -1561,7 +1561,7 @@</div><div class='ctx'> 			compatible = "qcom,sm6375-adsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x0a400000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts<br/>index de670b407ef1..6cb6f503fdac 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8150-hdk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8150-hdk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8150-hdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8150-hdk.dts</a></div><div class='hunk'>@@ -609,6 +609,11 @@</div><div class='ctx'> 	firmware-name = "qcom/sm8150/cdsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/sm8150/modem.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;remoteproc_slpi {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -713,3 +718,14 @@</div><div class='ctx'> &amp;usb_2_dwc3 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd-0.8-cx-mx-supply = &lt;&amp;vreg_l1a_0p75&gt;;</div><div class='add'>+	vdd-1.8-xo-supply = &lt;&amp;vreg_l7a_1p8&gt;;</div><div class='add'>+	vdd-1.3-rfa-supply = &lt;&amp;vreg_l2c_1p3&gt;;</div><div class='add'>+	vdd-3.3-ch0-supply = &lt;&amp;vreg_l11c_3p3&gt;;</div><div class='add'>+</div><div class='add'>+	qcom,ath10k-calibration-variant = "Qualcomm_sm8150hdk";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi<br/>index a35c0852b5a1..ff22e4346660 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8150.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8150.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8150.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8150.dtsi</a></div><div class='hunk'>@@ -1901,6 +1901,16 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -2011,6 +2021,16 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pcie1_default_state&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi<br/>index 6f54f50a70b0..41f117474872 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi</a></div><div class='hunk'>@@ -636,7 +636,8 @@</div><div class='ctx'> 	connector {</div><div class='ctx'> 		compatible = "usb-c-connector";</div><div class='ctx'> </div><div class='del'>-		power-role = "source";</div><div class='add'>+		op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+		power-role = "dual";</div><div class='ctx'> 		data-role = "dual";</div><div class='ctx'> 		self-powered;</div><div class='ctx'> </div><div class='hunk'>@@ -645,6 +646,12 @@</div><div class='ctx'> 					 PDO_FIXED_USB_COMM |</div><div class='ctx'> 					 PDO_FIXED_DATA_SWAP)&gt;;</div><div class='ctx'> </div><div class='add'>+		sink-pdos = &lt;PDO_FIXED(5000, 3000,</div><div class='add'>+				       PDO_FIXED_DUAL_ROLE |</div><div class='add'>+				       PDO_FIXED_USB_COMM |</div><div class='add'>+				       PDO_FIXED_DATA_SWAP)</div><div class='add'>+				       PDO_VAR(5000, 12000, 5000)&gt;;</div><div class='add'>+</div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -661,6 +668,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm8150b_vbus {</div><div class='add'>+	regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+	regulator-max-microamp = &lt;3000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi<br/>index 39bd8f0eba1e..8ccade628f1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8250.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8250.dtsi</a></div><div class='hunk'>@@ -2203,6 +2203,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -2318,6 +2328,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='hunk'>@@ -2433,6 +2453,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie2_phy: phy@1c16000 {</div><div class='hunk'>@@ -3062,7 +3092,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8250-slpi-pas";</div><div class='ctx'> 			reg = &lt;0 0x05c00000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 9 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -3766,7 +3796,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8250-cdsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x08300000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -5928,7 +5958,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8250-adsp-pas";</div><div class='ctx'> 			reg = &lt;0 0x17300000 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts<br/>index b43d264ed42b..4c25ab2f5670 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8350-hdk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8350-hdk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8350-hdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8350-hdk.dts</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> 		compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 81 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		connector@0 {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi<br/>index a5e7dbbd8c6c..f7c4700f00c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8350.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8350.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8350.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8350.dtsi</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/firmware/qcom,scm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sm8350.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy-qcom-qmp.h&gt;</div><div class='hunk'>@@ -1572,6 +1573,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -1669,6 +1680,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='hunk'>@@ -1730,6 +1751,11 @@</div><div class='ctx'> 				&lt;&amp;gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK&gt;,</div><div class='ctx'> 				&lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK&gt;,</div><div class='ctx'> 				&lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "ufs-ddr", "cpu-ufs";</div><div class='ctx'> 			freq-table-hz =</div><div class='ctx'> 				&lt;75000000 300000000&gt;,</div><div class='ctx'> 				&lt;0 0&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts<br/>index 0786cff07b89..3be46b56c723 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8450-hdk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8450-hdk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8450-hdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8450-hdk.dts</a></div><div class='hunk'>@@ -95,6 +95,7 @@</div><div class='ctx'> 		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		connector@0 {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts<br/>index c7d05945aa51..7b62ead68e77 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8450-qrd.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8450-qrd.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8450-qrd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8450-qrd.dts</a></div><div class='hunk'>@@ -467,6 +467,14 @@</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l5b_0p88&gt;;</div><div class='ctx'> 	vdda18-supply = &lt;&amp;vreg_l1c_1p8&gt;;</div><div class='ctx'> 	vdda33-supply = &lt;&amp;vreg_l2b_3p07&gt;;</div><div class='add'>+	qcom,squelch-detector-bp = &lt;(-2090)&gt;;</div><div class='add'>+	qcom,hs-disconnect-bp = &lt;1743&gt;;</div><div class='add'>+	qcom,pre-emphasis-amplitude-bp = &lt;40000&gt;;</div><div class='add'>+	qcom,pre-emphasis-duration-bp = &lt;20000&gt;;</div><div class='add'>+	qcom,hs-amplitude-bp = &lt;2000&gt;;</div><div class='add'>+	qcom,hs-output-impedance-micro-ohms = &lt;2600000&gt;;</div><div class='add'>+	qcom,hs-crossover-voltage-microvolt = &lt;(-31000)&gt;;</div><div class='add'>+	qcom,hs-rise-fall-time-bp = &lt;(-4100)&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_qmpphy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi<br/>index b86be34a912b..616461fcbab9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8450.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8450.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8450.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8450.dtsi</a></div><div class='hunk'>@@ -1777,12 +1777,8 @@</div><div class='ctx'> 			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000&gt;,</div><div class='ctx'> 				 &lt;0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000&gt;;</div><div class='ctx'> </div><div class='del'>-			/*</div><div class='del'>-			 * MSIs for BDF (1:0.0) only works with Device ID 0x5980.</div><div class='del'>-			 * Hence, the IDs are swapped.</div><div class='del'>-			 */</div><div class='del'>-			msi-map = &lt;0x0 &amp;gic_its 0x5981 0x1&gt;,</div><div class='del'>-				  &lt;0x100 &amp;gic_its 0x5980 0x1&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x5980 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x5981 0x1&gt;;</div><div class='ctx'> 			msi-map-mask = &lt;0xff00&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1850,6 +1846,16 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -1900,12 +1906,8 @@</div><div class='ctx'> 			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000&gt;,</div><div class='ctx'> 				 &lt;0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000&gt;;</div><div class='ctx'> </div><div class='del'>-			/*</div><div class='del'>-			 * MSIs for BDF (1:0.0) only works with Device ID 0x5a00.</div><div class='del'>-			 * Hence, the IDs are swapped.</div><div class='del'>-			 */</div><div class='del'>-			msi-map = &lt;0x0 &amp;gic_its 0x5a01 0x1&gt;,</div><div class='del'>-				  &lt;0x100 &amp;gic_its 0x5a00 0x1&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x5a00 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x5a01 0x1&gt;;</div><div class='ctx'> 			msi-map-mask = &lt;0xff00&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1971,6 +1973,16 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pcie1_default_state&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='hunk'>@@ -2363,6 +2375,7 @@</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='ctx'> 					label = "sdsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2665,6 +2678,7 @@</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='ctx'> 					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2731,6 +2745,7 @@</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='ctx'> 					label = "cdsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts<br/>new file mode 100644<br/>index 000000000000..85e0d3d66e16<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts</a></div><div class='hunk'>@@ -0,0 +1,779 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/firmware/qcom,scm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/cs35l45.h&gt;</div><div class='add'>+#include "sm8550.dtsi"</div><div class='add'>+#include "pm8010.dtsi"</div><div class='add'>+#include "pm8550.dtsi"</div><div class='add'>+#include "pm8550b.dtsi"</div><div class='add'>+#define PMK8550VE_SID 5</div><div class='add'>+#include "pm8550ve.dtsi"</div><div class='add'>+#include "pm8550vs.dtsi"</div><div class='add'>+#include "pmk8550.dtsi"</div><div class='add'>+/* TODO: Only one SID of PMR735D seems accessible? */</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;hwfence_shbuf;</div><div class='add'>+/delete-node/ &amp;mpss_mem;</div><div class='add'>+/delete-node/ &amp;rmtfs_mem;</div><div class='add'>+/ {</div><div class='add'>+	model = "Sony Xperia 1 V";</div><div class='add'>+	compatible = "sony,pdx234", "qcom,sm8550";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c10 = &amp;i2c10;</div><div class='add'>+		i2c11 = &amp;i2c11;</div><div class='add'>+		i2c16 = &amp;i2c_hub_2;</div><div class='add'>+		serial0 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		label = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;focus_n &amp;snapshot_n &amp;vol_down_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-camera-focus {</div><div class='add'>+			label = "Camera Focus";</div><div class='add'>+			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='add'>+			gpios = &lt;&amp;pm8550b_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-camera-snapshot {</div><div class='add'>+			label = "Camera Snapshot";</div><div class='add'>+			gpios = &lt;&amp;pm8550b_gpios 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;pm8550_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_dp_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		mpss_mem: mpss-region@89800000 {</div><div class='add'>+			reg = &lt;0x0 0x89800000 0x0 0x10800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		splash@b8000000 {</div><div class='add'>+			reg = &lt;0x0 0xb8000000 0x0 0x2b00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hwfence_shbuf: hwfence-shbuf-region@e6440000 {</div><div class='add'>+			reg = &lt;0x0 0xe6440000 0x0 0x2dd000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmtfs_mem: memory@f8b00000 {</div><div class='add'>+			compatible = "qcom,rmtfs-mem";</div><div class='add'>+			reg = &lt;0x0 0xf8b00000 0x0 0x280000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			qcom,client-id = &lt;1&gt;;</div><div class='add'>+			qcom,vmid = &lt;QCOM_SCM_VMID_MSS_MSA&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ramoops@ffd00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0xffd00000 0x0 0xc0000&gt;;</div><div class='add'>+			console-size = &lt;0x40000&gt;;</div><div class='add'>+			record-size = &lt;0x1000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x40000&gt;;</div><div class='add'>+			ecc-size = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rdtag-store-region@ffdc0000 {</div><div class='add'>+			reg = &lt;0x0 0xffdc0000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: vph-pwr-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		pm8550_bob1: bob1 {</div><div class='add'>+			regulator-name = "pm8550_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3416000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* TODO: bob2 @ 2.704-3.008V doesn't fall into the vreg driver constraints */</div><div class='add'>+</div><div class='add'>+		pm8550_l1: ldo1 {</div><div class='add'>+			regulator-name = "pm8550_l1";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l2: ldo2 {</div><div class='add'>+			regulator-name = "pm8550_l2";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* L4 exists in cmd-db, but the board seems to crash on access */</div><div class='add'>+</div><div class='add'>+		pm8550_l5: ldo5 {</div><div class='add'>+			regulator-name = "pm8550_l5";</div><div class='add'>+			regulator-min-microvolt = &lt;3104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l6: ldo6 {</div><div class='add'>+			regulator-name = "pm8550_l6";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l7: ldo7 {</div><div class='add'>+			regulator-name = "pm8550_l7";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l8: ldo8 {</div><div class='add'>+			regulator-name = "pm8550_l8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l9: ldo9 {</div><div class='add'>+			regulator-name = "pm8550_l9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l10: ldo10 {</div><div class='add'>+			regulator-name = "pm8550_l10";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l11: ldo11 {</div><div class='add'>+			regulator-name = "pm8550_l11";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l12: ldo12 {</div><div class='add'>+			regulator-name = "pm8550_l12";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l13: ldo13 {</div><div class='add'>+			regulator-name = "pm8550_l13";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l14: ldo14 {</div><div class='add'>+			regulator-name = "pm8550_l14";</div><div class='add'>+			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l15: ldo15 {</div><div class='add'>+			regulator-name = "pm8550_l15";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l16: ldo16 {</div><div class='add'>+			regulator-name = "pm8550_l16";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550_l17: ldo17 {</div><div class='add'>+			regulator-name = "pm8550_l17";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550vs-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		pm8550vs_0_l1: ldo1 {</div><div class='add'>+			regulator-name = "pm8550vs_0_l1";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_0_l3: ldo3 {</div><div class='add'>+			regulator-name = "pm8550vs_0_l3";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pm8550vs-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		pm8550vs_1_l1: ldo1 {</div><div class='add'>+			regulator-name = "pm8550vs_1_l1";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* L3 exists in cmd-db, but the board seems to crash on access */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pm8550vs-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		pm8550vs_2_s4: smps4 {</div><div class='add'>+			regulator-name = "pm8550vs_2_s4";</div><div class='add'>+			regulator-min-microvolt = &lt;904000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_2_s5: smps5 {</div><div class='add'>+			regulator-name = "pm8550vs_2_s5";</div><div class='add'>+			regulator-min-microvolt = &lt;1010000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1120000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_2_l1: ldo1 {</div><div class='add'>+			regulator-name = "pm8550vs_2_l1";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_2_l2: ldo2 {</div><div class='add'>+			regulator-name = "pm8550vs_2_l2";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;968000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_2_l3: ldo3 {</div><div class='add'>+			regulator-name = "pm8550vs_2_l3";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		pm8550ve_s4: smps4 {</div><div class='add'>+			regulator-name = "pm8550ve_s4";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve_l1: ldo1 {</div><div class='add'>+			regulator-name = "pm8550ve_l1";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve_l2: ldo2 {</div><div class='add'>+			regulator-name = "pm8550ve_l2";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve_l3: ldo3 {</div><div class='add'>+			regulator-name = "pm8550ve_l3";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-5 {</div><div class='add'>+		compatible = "qcom,pm8550vs-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "g";</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_s1: smps1 {</div><div class='add'>+			regulator-name = "pm8550vs_3_s1";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_s2: smps2 {</div><div class='add'>+			regulator-name = "pm8550vs_3_s2";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1036000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_s3: smps3 {</div><div class='add'>+			regulator-name = "pm8550vs_3_s3";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1004000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_s4: smps4 {</div><div class='add'>+			regulator-name = "pm8550vs_3_s4";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1352000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_s5: smps5 {</div><div class='add'>+			regulator-name = "pm8550vs_3_s5";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1004000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_s6: smps6 {</div><div class='add'>+			regulator-name = "pm8550vs_3_s6";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_l1: ldo1 {</div><div class='add'>+			regulator-name = "pm8550vs_3_l1";</div><div class='add'>+			regulator-min-microvolt = &lt;1144000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_l2: ldo2 {</div><div class='add'>+			regulator-name = "pm8550vs_3_l2";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_3_l3: ldo3 {</div><div class='add'>+			regulator-name = "pm8550vs_3_l3";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Unknown PMIC @ k, l, PM8010 @ m, n */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_hub_2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@75 {</div><div class='add'>+		compatible = "dlg,slg51000";</div><div class='add'>+		reg = &lt;0x75&gt;;</div><div class='add'>+		dlg,cs-gpios = &lt;&amp;pm8550vs_g_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_pwr_a_cs&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			slg51000_a_ldo1: ldo1 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;2400000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slg51000_a_ldo2: ldo2 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;2400000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slg51000_a_ldo3: ldo3 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3750000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slg51000_a_ldo4: ldo4 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo4";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3750000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slg51000_a_ldo5: ldo5 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slg51000_a_ldo6: ldo6 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slg51000_a_ldo7: ldo7 {</div><div class='add'>+				regulator-name = "slg51000_a_ldo7";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3750000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_master_hub_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* NXP NFC @ 28 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* LX Semi SW82907 touchscreen @ 28 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	clock-frequency = &lt;1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Cirrus Logic CS40L25A boosted haptics driver @ 40 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	clock-frequency = &lt;1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cs35l41_l: speaker-amp@30 {</div><div class='add'>+		compatible = "cirrus,cs35l45";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 182 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 183 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		cirrus,asp-sdout-hiz-ctrl = &lt;(CS35L45_ASP_TX_HIZ_UNUSED | CS35L45_ASP_TX_HIZ_DISABLED)&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		cirrus,gpio-ctrl2 {</div><div class='add'>+			gpio-ctrl = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cs35l41_r: speaker-amp@31 {</div><div class='add'>+		compatible = "cirrus,cs35l45";</div><div class='add'>+		reg = &lt;0x31&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 182 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 183 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		cirrus,asp-sdout-hiz-ctrl = &lt;(CS35L45_ASP_TX_HIZ_UNUSED | CS35L45_ASP_TX_HIZ_DISABLED)&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		cirrus,gpio-ctrl2 {</div><div class='add'>+			gpio-ctrl = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 94 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;pm8550vs_2_l1&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;pm8550vs_2_l3&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_flash {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led-0 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+		led-sources = &lt;1&gt;, &lt;4&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;1000000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+		function-enumerator = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-1 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		led-sources = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;1000000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+		function-enumerator = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	vol_down_n: volume-down-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_card_det_n: sd-card-det-n-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		output-disable;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550b_gpios {</div><div class='add'>+	snapshot_n: snapshot-n-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	focus_n: focus-n-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550vs_g_gpios {</div><div class='add'>+	cam_pwr_a_cs: cam-pwr-a-cs-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;0x01&gt;;</div><div class='add'>+		drive-push-pull;</div><div class='add'>+		output-low;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550b_eusb2_repeater {</div><div class='add'>+	qcom,tune-usb2-disc-thres = /bits/ 8 &lt;0x6&gt;;</div><div class='add'>+	qcom,tune-usb2-amplitude = /bits/ 8 &lt;0xf&gt;;</div><div class='add'>+	qcom,tune-usb2-preem = /bits/ 8 &lt;0x7&gt;;</div><div class='add'>+	vdd18-supply = &lt;&amp;pm8550_l15&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;pm8550_l5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sm8550/Sony/yodo/adsp.mbn",</div><div class='add'>+			"qcom/sm8550/Sony/yodo/adsp_dtb.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/sm8550/Sony/yodo/cdsp.mbn",</div><div class='add'>+			"qcom/sm8550/Sony/yodo/cdsp_dtb.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;pm8550_gpios 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8550_l9&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8550_l8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sleep_clk {</div><div class='add'>+	clock-frequency = &lt;32000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;32 8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_ss {</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;pm8550vs_2_l1&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;pm8550vs_2_l3&gt;;</div><div class='add'>+	phys = &lt;&amp;pm8550b_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;pm8550vs_2_l3&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;pm8550ve_l3&gt;;</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy_usb_ss_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board {</div><div class='add'>+	clock-frequency = &lt;76800000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi<br/>index 3904348075f6..bc5aeb05ffc3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8550.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8550.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8550.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8550.dtsi</a></div><div class='hunk'>@@ -812,6 +812,7 @@</div><div class='ctx'> 			dma-channels = &lt;12&gt;;</div><div class='ctx'> 			dma-channel-mask = &lt;0x3e&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x436 0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -823,6 +824,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_2_M_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_QUPV3_WRAP_2_S_AHB_CLK&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x423 0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -1322,6 +1324,7 @@</div><div class='ctx'> 			dma-channels = &lt;12&gt;;</div><div class='ctx'> 			dma-channel-mask = &lt;0x1e&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0xb6 0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1335,6 +1338,7 @@</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0xa3 0&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;;</div><div class='ctx'> 			interconnect-names = "qup-core";</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -1755,9 +1759,8 @@</div><div class='ctx'> 					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc_main SLAVE_PCIE_0 0&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='ctx'> </div><div class='del'>-			/* Entries are reversed due to the unusual ITS DeviceID encoding */</div><div class='del'>-			msi-map = &lt;0x0 &amp;gic_its 0x1401 0x1&gt;,</div><div class='del'>-				  &lt;0x100 &amp;gic_its 0x1400 0x1&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x1400 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x1401 0x1&gt;;</div><div class='ctx'> 			iommu-map = &lt;0x0   &amp;apps_smmu 0x1400 0x1&gt;,</div><div class='ctx'> 				    &lt;0x100 &amp;apps_smmu 0x1401 0x1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1770,6 +1773,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -1867,9 +1880,8 @@</div><div class='ctx'> 					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc_main SLAVE_PCIE_1 0&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='ctx'> </div><div class='del'>-			/* Entries are reversed due to the unusual ITS DeviceID encoding */</div><div class='del'>-			msi-map = &lt;0x0 &amp;gic_its 0x1481 0x1&gt;,</div><div class='del'>-				  &lt;0x100 &amp;gic_its 0x1480 0x1&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x1480 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x1481 0x1&gt;;</div><div class='ctx'> 			iommu-map = &lt;0x0   &amp;apps_smmu 0x1480 0x1&gt;,</div><div class='ctx'> 				    &lt;0x100 &amp;apps_smmu 0x1481 0x1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1883,6 +1895,16 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='hunk'>@@ -3227,12 +3249,21 @@</div><div class='ctx'> 				reg = &lt;0x0 0x0a600000 0x0 0xcd00&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x40 0x0&gt;;</div><div class='del'>-				snps,dis_u2_susphy_quirk;</div><div class='del'>-				snps,dis_enblslpm_quirk;</div><div class='del'>-				snps,usb3_lpm_capable;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='ctx'> 				       &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+				snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='add'>+				snps,usb2-gadget-lpm-disable;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='add'>+				snps,is-utmi-l1-suspend;</div><div class='add'>+				snps,usb3_lpm_capable;</div><div class='add'>+				snps,usb2-lpm-disable;</div><div class='add'>+				snps,has-lpm-erratum;</div><div class='add'>+				tx-fifo-resize;</div><div class='add'>+				dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 				ports {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -3968,6 +3999,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17100000 {</div><div class='hunk'>@@ -4316,6 +4348,7 @@</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='ctx'> 					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -4454,6 +4487,7 @@</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='ctx'> 					label = "cdsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts<br/>index 4450273f9667..d04ceaa73c2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8650-mtp.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8650-mtp.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8650-mtp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8650-mtp.dts</a></div><div class='hunk'>@@ -641,10 +641,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_mdp {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie_1_phy_aux_clk {</div><div class='ctx'> 	clock-frequency = &lt;1000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts<br/>index b07cac2e5bc8..4e94f7fe4d2d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8650-qrd.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8650-qrd.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8650-qrd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8650-qrd.dts</a></div><div class='hunk'>@@ -766,6 +766,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		firmware-name = "qcom/sm8650/gen70900_zap.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpass_tlmm {</div><div class='ctx'> 	spkr_1_sd_n_active: spkr-1-sd-n-active-state {</div><div class='ctx'> 		pins = "gpio21";</div><div class='hunk'>@@ -827,10 +835,6 @@</div><div class='ctx'> 	remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_mdp {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie_1_phy_aux_clk {</div><div class='ctx'> 	clock-frequency = &lt;1000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi<br/>index ba72d8f38420..62a6e77730bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8650.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/sm8650.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/sm8650.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/sm8650.dtsi</a></div><div class='hunk'>@@ -485,9 +485,9 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		/* Merged aop_config, tme_crash_dump, tme_log and uefi_log regions */</div><div class='add'>+		/* Merged aop_config, tme_crash_dump, tme_log, uefi_log, and chipinfo regions */</div><div class='ctx'> 		aop_tme_uefi_merged_mem: aop-tme-uefi-merged@81c80000 {</div><div class='del'>-			reg = &lt;0 0x81c80000 0 0x74000&gt;;</div><div class='add'>+			reg = &lt;0 0x81c80000 0 0x75000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2274,9 +2274,8 @@</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			/* Entries are reversed due to the unusual ITS DeviceID encoding */</div><div class='del'>-			msi-map = &lt;0x0 &amp;gic_its 0x1401 0x1&gt;,</div><div class='del'>-				  &lt;0x100 &amp;gic_its 0x1400 0x1&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x1400 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x1401 0x1&gt;;</div><div class='ctx'> 			msi-map-mask = &lt;0xff00&gt;;</div><div class='ctx'> </div><div class='ctx'> 			linux,pci-domain = &lt;0&gt;;</div><div class='hunk'>@@ -2294,6 +2293,16 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie0_phy: phy@1c06000 {</div><div class='hunk'>@@ -2402,9 +2411,8 @@</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			/* Entries are reversed due to the unusual ITS DeviceID encoding */</div><div class='del'>-			msi-map = &lt;0x0 &amp;gic_its 0x1481 0x1&gt;,</div><div class='del'>-				  &lt;0x100 &amp;gic_its 0x1480 0x1&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x1480 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x1481 0x1&gt;;</div><div class='ctx'> 			msi-map-mask = &lt;0xff00&gt;;</div><div class='ctx'> </div><div class='ctx'> 			linux,pci-domain = &lt;1&gt;;</div><div class='hunk'>@@ -2422,6 +2430,16 @@</div><div class='ctx'> 				 &lt;0x02000000 0 0x40300000 0 0x40300000 0 0x1fd00000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='hunk'>@@ -2591,6 +2609,143 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@3d00000 {</div><div class='add'>+			compatible = "qcom,adreno-43051401", "qcom,adreno";</div><div class='add'>+			reg = &lt;0x0 0x03d00000 0x0 0x40000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d9e000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d61000 0x0 0x800&gt;;</div><div class='add'>+			reg-names = "kgsl_3d0_reg_memory",</div><div class='add'>+				    "cx_mem",</div><div class='add'>+				    "cx_dbgc";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 0 0x0&gt;,</div><div class='add'>+				 &lt;&amp;adreno_smmu 1 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			zap-shader {</div><div class='add'>+				memory-region = &lt;&amp;gpu_micro_code_mem&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Speedbin needs more work on A740+, keep only lower freqs */</div><div class='add'>+			gpu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-231000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;231000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-310000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;310000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-366000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;366000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-422000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;422000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-500000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_L1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-578000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;578000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-629000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;629000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-680000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;680000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-720000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;720000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-770000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;770000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-834000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;834000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmu: gmu@3d6a000 {</div><div class='add'>+			compatible = "qcom,adreno-gmu-750.1", "qcom,adreno-gmu";</div><div class='add'>+			reg = &lt;0x0 0x03d6a000 0x0 0x35000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d50000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0b280000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hfi", "gmu";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_GPU_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_DEMET_CLK&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "gmu",</div><div class='add'>+				      "cxo",</div><div class='add'>+				      "axi",</div><div class='add'>+				      "memnoc",</div><div class='add'>+				      "hub",</div><div class='add'>+				      "demet";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CX_GDSC&gt;,</div><div class='add'>+					&lt;&amp;gpucc GPU_GX_GDSC&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "gx";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 5 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			gmu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-260000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;260000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-625000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;625000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpucc: clock-controller@3d90000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-gpucc";</div><div class='ctx'> 			reg = &lt;0 0x03d90000 0 0xa000&gt;;</div><div class='hunk'>@@ -2604,6 +2759,50 @@</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		adreno_smmu: iommu@3da0000 {</div><div class='add'>+			compatible = "qcom,sm8650-smmu-500", "qcom,adreno-smmu",</div><div class='add'>+				     "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x03da0000 0x0 0x40000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "hlos",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "ahb";</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CX_GDSC&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ipa: ipa@3f40000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-ipa", "qcom,sm8550-ipa";</div><div class='ctx'> </div><div class='hunk'>@@ -3584,14 +3783,16 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-dwc3", "qcom,dwc3";</div><div class='ctx'> 			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "hs_phy_irq",</div><div class='del'>-					  "ss_phy_irq",</div><div class='add'>+					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='del'>-					  "dp_hs_phy_irq";</div><div class='add'>+					  "ss_phy_irq";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='hunk'>@@ -4845,6 +5046,8 @@</div><div class='ctx'> </div><div class='ctx'> 					label = "adsp";</div><div class='ctx'> </div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5002,6 +5205,8 @@</div><div class='ctx'> </div><div class='ctx'> 					label = "cdsp";</div><div class='ctx'> </div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5084,6 +5289,38 @@</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x19c8 0x0&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					/* note: secure cb9 in downstream */</div><div class='add'>+</div><div class='add'>+					compute-cb@10 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;12&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x196c 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c0c 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19cc 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@11 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;13&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x196d 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c0d 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19cd 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@12 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;14&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x196e 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c0e 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19ce 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts<br/>index 6a0a54532e5f..c5c2895b37c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100-crd.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100-crd.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100-crd.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/x1e80100-crd.dts</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm Technologies, Inc. X1E80100 CRD";</div><div class='hunk'>@@ -598,8 +599,6 @@</div><div class='ctx'> 	compatible = "qcom,x1e80100-dp";</div><div class='ctx'> 	/delete-property/ #sound-dai-cells;</div><div class='ctx'> </div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	aux-bus {</div><div class='hunk'>@@ -619,6 +618,9 @@</div><div class='ctx'> 		port@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			mdss_dp3_out: endpoint {</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='ctx'> 				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -680,16 +682,32 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l8b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;swr0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	/* WSA8845, Left Woofer */</div><div class='ctx'> 	left_woofer: speaker@0,0 {</div><div class='ctx'> 		compatible = "sdw20217020400";</div><div class='ctx'> 		reg = &lt;0 0&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		powerdown-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		sound-name-prefix = "WooferLeft";</div><div class='ctx'> 		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='hunk'>@@ -700,8 +718,7 @@</div><div class='ctx'> 	left_tweeter: speaker@0,1 {</div><div class='ctx'> 		compatible = "sdw20217020400";</div><div class='ctx'> 		reg = &lt;0 1&gt;;</div><div class='del'>-		/* pinctrl in left_woofer node because of sharing the GPIO*/</div><div class='del'>-		powerdown-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		sound-name-prefix = "TwitterLeft";</div><div class='ctx'> 		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='hunk'>@@ -734,13 +751,14 @@</div><div class='ctx'> &amp;swr3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa2_swr_active&gt;, &lt;&amp;spkr_23_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	/* WSA8845, Right Woofer */</div><div class='ctx'> 	right_woofer: speaker@0,0 {</div><div class='ctx'> 		compatible = "sdw20217020400";</div><div class='ctx'> 		reg = &lt;0 0&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;spkr_23_sd_n_active&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		powerdown-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		sound-name-prefix = "WooferRight";</div><div class='ctx'> 		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='hunk'>@@ -751,8 +769,7 @@</div><div class='ctx'> 	right_tweeter: speaker@0,1 {</div><div class='ctx'> 		compatible = "sdw20217020400";</div><div class='ctx'> 		reg = &lt;0 1&gt;;</div><div class='del'>-		/* pinctrl in right_woofer node because of sharing the GPIO*/</div><div class='del'>-		powerdown-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		sound-name-prefix = "TwitterRight";</div><div class='ctx'> 		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='hunk'>@@ -817,6 +834,8 @@</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='ctx'> </div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -837,6 +856,8 @@</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='ctx'> </div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -857,6 +878,8 @@</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='ctx'> </div><div class='add'>+	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi<br/>new file mode 100644<br/>index 000000000000..04301f772fbd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus1 {</div><div class='add'>+	smb2360_0: pmic@7 {</div><div class='add'>+		compatible = "qcom,smb2360", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x7 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		smb2360_0_eusb2_repeater: phy@fd00 {</div><div class='add'>+			compatible = "qcom,smb2360-eusb2-repeater";</div><div class='add'>+			reg = &lt;0xfd00&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smb2360_1: pmic@a {</div><div class='add'>+		compatible = "qcom,smb2360", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0xa SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		smb2360_1_eusb2_repeater: phy@fd00 {</div><div class='add'>+			compatible = "qcom,smb2360-eusb2-repeater";</div><div class='add'>+			reg = &lt;0xfd00&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smb2360_2: pmic@b {</div><div class='add'>+		compatible = "qcom,smb2360", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0xb SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		smb2360_2_eusb2_repeater: phy@fd00 {</div><div class='add'>+			compatible = "qcom,smb2360-eusb2-repeater";</div><div class='add'>+			reg = &lt;0xfd00&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts<br/>index e76d29053d79..2061fbe7b75a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100-qcp.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/x1e80100-qcp.dts</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm Technologies, Inc. X1E80100 QCP";</div><div class='hunk'>@@ -409,8 +410,6 @@</div><div class='ctx'> 	compatible = "qcom,x1e80100-dp";</div><div class='ctx'> 	/delete-property/ #sound-dai-cells;</div><div class='ctx'> </div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	aux-bus {</div><div class='hunk'>@@ -430,6 +429,9 @@</div><div class='ctx'> 		port@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			mdss_dp3_out: endpoint {</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='ctx'> 				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -491,6 +493,21 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l8b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;33 3&gt;, /* Unused */</div><div class='ctx'> 			       &lt;44 4&gt;, /* SPI (TPM) */</div><div class='hunk'>@@ -513,6 +530,8 @@</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='ctx'> </div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -533,6 +552,8 @@</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='ctx'> </div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -553,6 +574,8 @@</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='ctx'> </div><div class='add'>+	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi<br/>index 8e517f76189e..5f90a0b3c016 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a></div><div class='hunk'>@@ -284,7 +284,7 @@</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='ctx'> 			CLUSTER_CL4: cluster-sleep-0 {</div><div class='del'>-				compatible = "arm,idle-state";</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='ctx'> 				idle-state-name = "l2-ret";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x01000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;350&gt;;</div><div class='hunk'>@@ -293,7 +293,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			CLUSTER_CL5: cluster-sleep-1 {</div><div class='del'>-				compatible = "arm,idle-state";</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='ctx'> 				idle-state-name = "ret-pll-off";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x01000054&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2200&gt;;</div><div class='hunk'>@@ -3088,7 +3088,7 @@</div><div class='ctx'> 			qcom,ports-hstart =		/bits/ 8 &lt;0xff 0x03 0x00 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='ctx'> 			qcom,ports-hstop =		/bits/ 8 &lt;0xff 0x06 0x0f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='ctx'> 			qcom,ports-word-length =	/bits/ 8 &lt;0x01 0x07 0x04 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='del'>-			qcom,ports-block-pack-mode =	/bits/ 8 &lt;0xff 0x00 0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-pack-mode =	/bits/ 8 &lt;0xff 0xff 0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='ctx'> 			qcom,ports-block-group-count =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='ctx'> 			qcom,ports-lane-control =	/bits/ 8 &lt;0x01 0x00 0x00 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -4095,8 +4095,6 @@</div><div class='ctx'> </div><div class='ctx'> 						mdss_dp3_in: endpoint {</div><div class='ctx'> 							remote-endpoint = &lt;&amp;mdss_intf5_out&gt;;</div><div class='del'>-</div><div class='del'>-							link-frequencies = /bits/ 64 &lt;8100000000&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4221,6 +4219,48 @@</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spmi: arbiter@c400000 {</div><div class='add'>+			compatible = "qcom,x1e80100-spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0 0x0c400000 0 0x3000&gt;,</div><div class='add'>+			      &lt;0 0x0c500000 0 0x400000&gt;,</div><div class='add'>+			      &lt;0 0x0c440000 0 0x80000&gt;;</div><div class='add'>+			reg-names = "core", "chnls", "obsrvr";</div><div class='add'>+</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			spmi_bus0: spmi@c42d000 {</div><div class='add'>+				reg = &lt;0 0x0c42d000 0 0x4000&gt;,</div><div class='add'>+				      &lt;0 0x0c4c0000 0 0x10000&gt;;</div><div class='add'>+				reg-names = "cnfg", "intr";</div><div class='add'>+</div><div class='add'>+				interrupt-names = "periph_irq";</div><div class='add'>+				interrupts-extended = &lt;&amp;pdc 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spmi_bus1: spmi@c432000 {</div><div class='add'>+				reg = &lt;0 0x0c432000 0 0x4000&gt;,</div><div class='add'>+				      &lt;0 0x0c4d0000 0 0x10000&gt;;</div><div class='add'>+				reg-names = "cnfg", "intr";</div><div class='add'>+</div><div class='add'>+				interrupt-names = "periph_irq";</div><div class='add'>+				interrupts-extended = &lt;&amp;pdc 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> </div><div class='ctx'> 		tlmm: pinctrl@f100000 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-tlmm";</div><div class='head'>diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi<br/>index 39aefe66a794..ba50e292bdbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/realtek/rtd129x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/realtek/rtd129x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/realtek/rtd129x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/realtek/rtd129x.dtsi</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 		clock-output-names = "osc27M";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc {</div><div class='add'>+	soc@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/realtek/rtd139x.dtsi b/arch/arm64/boot/dts/realtek/rtd139x.dtsi<br/>index a3c10ceeb586..e8af39193e75 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/realtek/rtd139x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/realtek/rtd139x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/realtek/rtd139x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/realtek/rtd139x.dtsi</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		clock-output-names = "osc27M";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc {</div><div class='add'>+	soc@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi<br/>index 34802cc62983..3a7f6e35b7f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/realtek/rtd16xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/realtek/rtd16xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/realtek/rtd16xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/realtek/rtd16xx.dtsi</a></div><div class='hunk'>@@ -109,7 +109,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	arm_pmu: pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;,</div><div class='ctx'> 			&lt;&amp;cpu3&gt;, &lt;&amp;cpu4&gt;, &lt;&amp;cpu5&gt;;</div><div class='hunk'>@@ -127,7 +127,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc {</div><div class='add'>+	soc@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile<br/>index 5f3e0e61d78d..fbd214a1a638 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/Makefile</a></div><div class='hunk'>@@ -62,6 +62,9 @@ dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-ulcb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-ulcb-kf.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle-function-expansion.dtbo</div><div class='add'>+r8a77970-eagle-function-expansion-dtbs := r8a77970-eagle.dtb r8a77970-eagle-function-expansion.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle-function-expansion.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-v3msk.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso b/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso<br/>new file mode 100644<br/>index 000000000000..3aa243c5f04c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the Eagle V3M Function expansion board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/* CN4 */</div><div class='add'>+	/* Eagle: SW18 set to OFF */</div><div class='add'>+	cvbs-in-cn4 {</div><div class='add'>+		compatible = "composite-video-connector";</div><div class='add'>+		label = "CVBS IN CN4";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			cvbs_con: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7482_ain7&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CN2 */</div><div class='add'>+	/* Eagle: SW35 set 5, 6 and 8 to OFF */</div><div class='add'>+	hdmi-in-cn2 {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "HDMI IN CN2";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_in_con2: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7612_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CN3 */</div><div class='add'>+	/* Eagle: SW18 set to OFF */</div><div class='add'>+	hdmi-in-cn3 {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "HDMI IN CN3";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_in_con: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7482_hdmi&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Disconnect MAX9286 GMSL I2C. */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connect expansion board I2C. */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	gpio@27 {</div><div class='add'>+		compatible = "onnn,pca9654";</div><div class='add'>+		reg = &lt;0x27&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		vin0_adv7612_en {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "VIN0_ADV7612_ENn";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-decoder@4c {</div><div class='add'>+		compatible = "adi,adv7612";</div><div class='add'>+		reg = &lt;0x4c&gt;, &lt;0x50&gt;, &lt;0x52&gt;, &lt;0x54&gt;, &lt;0x56&gt;, &lt;0x58&gt;;</div><div class='add'>+		reg-names = "main", "afe", "rep", "edid", "hdmi", "cp";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		default-input = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				adv7612_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_in_con2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				adv7612_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;vin0_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	video-receiver@70 {</div><div class='add'>+		compatible = "adi,adv7482";</div><div class='add'>+		reg = &lt;0x70 0x71 0x72 0x73 0x74 0x75</div><div class='add'>+		       0x60 0x61 0x62 0x63 0x64 0x65&gt;;</div><div class='add'>+		reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",</div><div class='add'>+			    "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;03 IRQ_TYPE_LEVEL_LOW&gt;, &lt;04 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "intrq1", "intrq2";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@7 {</div><div class='add'>+				reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+				adv7482_ain7: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;cvbs_con&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@8 {</div><div class='add'>+				reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+				adv7482_hdmi: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_in_con&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@a {</div><div class='add'>+				reg = &lt;10&gt;;</div><div class='add'>+</div><div class='add'>+				adv7482_txa: endpoint {</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;csi40_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi40 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi40_in: endpoint {</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7482_txa&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pfc {</div><div class='add'>+	vin0_pins_parallel: vin0 {</div><div class='add'>+		groups = "vin0_data12", "vin0_sync", "vin0_clk", "vin0_clkenb";</div><div class='add'>+		function = "vin0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;vin0_pins_parallel&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			vin0_in: endpoint {</div><div class='add'>+				pclk-sample = &lt;0&gt;;</div><div class='add'>+				hsync-active = &lt;0&gt;;</div><div class='add'>+				vsync-active = &lt;0&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7612_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts<br/>index abfda5c6ca16..bc65a7b4d999 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts</a></div><div class='hunk'>@@ -14,9 +14,9 @@</div><div class='ctx'> 	compatible = "renesas,s4sk", "renesas,r8a779f4", "renesas,r8a779f0";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='del'>-		serial0	= &amp;hscif0;</div><div class='del'>-		serial1	= &amp;hscif1;</div><div class='del'>-		eth0	= &amp;rswitch;</div><div class='add'>+		serial0 = &amp;hscif0;</div><div class='add'>+		serial1 = &amp;hscif1;</div><div class='add'>+		ethernet0 = &amp;rswitch;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts<br/>index bc8616a56c03..cfbe8c8680cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts</a></div><div class='hunk'>@@ -18,11 +18,12 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;hscif0;</div><div class='add'>+		serial1 = &amp;hscif2;</div><div class='ctx'> 		ethernet0 = &amp;avb0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='del'>-		bootargs = "ignore_loglevel";</div><div class='add'>+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";</div><div class='ctx'> 		stdout-path = "serial0:921600n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -90,6 +91,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hscif2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hscif2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -144,7 +153,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pfc {</div><div class='del'>-	pinctrl-0 = &lt;&amp;scif_clk_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif_clk_pins&gt;, &lt;&amp;scif_clk2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 	avb0_pins: avb0 {</div><div class='hunk'>@@ -170,6 +179,11 @@</div><div class='ctx'> 		function = "hscif0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hscif2_pins: hscif2 {</div><div class='add'>+		groups = "hscif2_data", "hscif2_ctrl";</div><div class='add'>+		function = "hscif2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c0_pins: i2c0 {</div><div class='ctx'> 		groups = "i2c0";</div><div class='ctx'> 		function = "i2c0";</div><div class='hunk'>@@ -190,6 +204,11 @@</div><div class='ctx'> 		groups = "scif_clk";</div><div class='ctx'> 		function = "scif_clk";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	scif_clk2_pins: scif-clk2 {</div><div class='add'>+		groups = "scif_clk2";</div><div class='add'>+		function = "scif_clk2";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rpc {</div><div class='hunk'>@@ -228,3 +247,7 @@</div><div class='ctx'> &amp;scif_clk {</div><div class='ctx'> 	clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;scif_clk2 {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi<br/>index 11885729181b..6d791024cabe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a779h0.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r8a779h0.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r8a779h0.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/r8a779h0.dtsi</a></div><div class='hunk'>@@ -144,13 +144,19 @@</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* External SCIF clock - to be overridden by boards that provide it */</div><div class='add'>+	/* External SCIF clocks - to be overridden by boards that provide them */</div><div class='ctx'> 	scif_clk: scif-clk {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	scif_clk2: scif-clk2 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='hunk'>@@ -297,6 +303,76 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 917&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmt0: timer@e60f0000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-cmt0",</div><div class='add'>+				     "renesas,rcar-gen4-cmt0";</div><div class='add'>+			reg = &lt;0 0xe60f0000 0 0x1004&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 910&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 910&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmt1: timer@e6130000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-cmt1",</div><div class='add'>+				     "renesas,rcar-gen4-cmt1";</div><div class='add'>+			reg = &lt;0 0xe6130000 0 0x1004&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 911&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 911&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmt2: timer@e6140000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-cmt1",</div><div class='add'>+				     "renesas,rcar-gen4-cmt1";</div><div class='add'>+			reg = &lt;0 0xe6140000 0 0x1004&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 912&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 912&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmt3: timer@e6148000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-cmt1",</div><div class='add'>+				     "renesas,rcar-gen4-cmt1";</div><div class='add'>+			reg = &lt;0 0xe6148000 0 0x1004&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 913&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 913&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpg: clock-controller@e6150000 {</div><div class='ctx'> 			compatible = "renesas,r8a779h0-cpg-mssr";</div><div class='ctx'> 			reg = &lt;0 0xe6150000 0 0x4000&gt;;</div><div class='hunk'>@@ -318,6 +394,106 @@</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tsc: thermal@e6198000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-thermal";</div><div class='add'>+			reg = &lt;0 0xe6198000 0 0x200&gt;,</div><div class='add'>+			      &lt;0 0xe61a0000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 919&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 919&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc_ex: interrupt-controller@e61c0000 {</div><div class='add'>+			compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc";</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0 0xe61c0000 0 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 611&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 611&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu0: timer@e61e0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a779h0", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe61e0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 713&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 713&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu1: timer@e6fc0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a779h0", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe6fc0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 714&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 714&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu2: timer@e6fd0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a779h0", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe6fd0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 715&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 715&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu3: timer@e6fe0000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a779h0", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xe6fe0000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 716&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 716&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmu4: timer@ffc00000 {</div><div class='add'>+			compatible = "renesas,tmu-r8a779h0", "renesas,tmu";</div><div class='add'>+			reg = &lt;0 0xffc00000 0 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 717&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 717&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c0: i2c@e6500000 {</div><div class='ctx'> 			compatible = "renesas,i2c-r8a779h0",</div><div class='ctx'> 				     "renesas,rcar-gen4-i2c";</div><div class='hunk'>@@ -403,6 +579,57 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		hscif1: serial@e6550000 {</div><div class='add'>+			compatible = "renesas,hscif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-hscif", "renesas,hscif";</div><div class='add'>+			reg = &lt;0 0xe6550000 0 0x60&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 515&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 515&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x33&gt;, &lt;&amp;dmac1 0x32&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x33&gt;, &lt;&amp;dmac2 0x32&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hscif2: serial@e6560000 {</div><div class='add'>+			compatible = "renesas,hscif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-hscif", "renesas,hscif";</div><div class='add'>+			reg = &lt;0 0xe6560000 0 0x60&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 516&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk2&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 516&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x35&gt;, &lt;&amp;dmac1 0x34&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x35&gt;, &lt;&amp;dmac2 0x34&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hscif3: serial@e66a0000 {</div><div class='add'>+			compatible = "renesas,hscif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-hscif", "renesas,hscif";</div><div class='add'>+			reg = &lt;0 0xe66a0000 0 0x60&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 517&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 517&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x37&gt;, &lt;&amp;dmac1 0x36&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x37&gt;, &lt;&amp;dmac2 0x36&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		avb0: ethernet@e6800000 {</div><div class='ctx'> 			compatible = "renesas,etheravb-r8a779h0",</div><div class='ctx'> 				     "renesas,etheravb-rcar-gen4";</div><div class='hunk'>@@ -446,6 +673,7 @@</div><div class='ctx'> 			phy-mode = "rgmii";</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_hc 0&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -547,6 +775,170 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scif0: serial@e6e60000 {</div><div class='add'>+			compatible = "renesas,scif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-scif", "renesas,scif";</div><div class='add'>+			reg = &lt;0 0xe6e60000 0 64&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 702&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 702&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x51&gt;, &lt;&amp;dmac1 0x50&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x51&gt;, &lt;&amp;dmac2 0x50&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif1: serial@e6e68000 {</div><div class='add'>+			compatible = "renesas,scif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-scif", "renesas,scif";</div><div class='add'>+			reg = &lt;0 0xe6e68000 0 64&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 703&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 703&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x53&gt;, &lt;&amp;dmac1 0x52&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x53&gt;, &lt;&amp;dmac2 0x52&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif3: serial@e6c50000 {</div><div class='add'>+			compatible = "renesas,scif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-scif", "renesas,scif";</div><div class='add'>+			reg = &lt;0 0xe6c50000 0 64&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 704&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 704&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x57&gt;, &lt;&amp;dmac1 0x56&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x57&gt;, &lt;&amp;dmac2 0x56&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif4: serial@e6c40000 {</div><div class='add'>+			compatible = "renesas,scif-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-scif", "renesas,scif";</div><div class='add'>+			reg = &lt;0 0xe6c40000 0 64&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 705&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1&gt;,</div><div class='add'>+				 &lt;&amp;scif_clk2&gt;;</div><div class='add'>+			clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 705&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x59&gt;, &lt;&amp;dmac1 0x58&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x59&gt;, &lt;&amp;dmac2 0x58&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msiof0: spi@e6e90000 {</div><div class='add'>+			compatible = "renesas,msiof-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-msiof";</div><div class='add'>+			reg = &lt;0 0xe6e90000 0 0x0064&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 618&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x41&gt;, &lt;&amp;dmac1 0x40&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x41&gt;, &lt;&amp;dmac2 0x40&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 618&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msiof1: spi@e6ea0000 {</div><div class='add'>+			compatible = "renesas,msiof-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-msiof";</div><div class='add'>+			reg = &lt;0 0xe6ea0000 0 0x0064&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 619&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x43&gt;, &lt;&amp;dmac1 0x42&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x43&gt;, &lt;&amp;dmac2 0x42&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 619&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msiof2: spi@e6c00000 {</div><div class='add'>+			compatible = "renesas,msiof-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-msiof";</div><div class='add'>+			reg = &lt;0 0xe6c00000 0 0x0064&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 620&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x45&gt;, &lt;&amp;dmac1 0x44&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x45&gt;, &lt;&amp;dmac2 0x44&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 620&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msiof3: spi@e6c10000 {</div><div class='add'>+			compatible = "renesas,msiof-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-msiof";</div><div class='add'>+			reg = &lt;0 0xe6c10000 0 0x0064&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 621&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x47&gt;, &lt;&amp;dmac1 0x46&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x47&gt;, &lt;&amp;dmac2 0x46&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 621&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msiof4: spi@e6c20000 {</div><div class='add'>+			compatible = "renesas,msiof-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-msiof";</div><div class='add'>+			reg = &lt;0 0xe6c20000 0 0x0064&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 622&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x49&gt;, &lt;&amp;dmac1 0x48&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x49&gt;, &lt;&amp;dmac2 0x48&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 622&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msiof5: spi@e6c28000 {</div><div class='add'>+			compatible = "renesas,msiof-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-msiof";</div><div class='add'>+			reg = &lt;0 0xe6c28000 0 0x0064&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 623&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac1 0x4b&gt;, &lt;&amp;dmac1 0x4a&gt;,</div><div class='add'>+			       &lt;&amp;dmac2 0x4b&gt;, &lt;&amp;dmac2 0x4a&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 623&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		dmac1: dma-controller@e7350000 {</div><div class='ctx'> 			compatible = "renesas,dmac-r8a779h0",</div><div class='ctx'> 				     "renesas,rcar-gen4-dmac";</div><div class='hunk'>@@ -580,6 +972,14 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 709&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			dma-channels = &lt;16&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_ds0 0&gt;, &lt;&amp;ipmmu_ds0 1&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 2&gt;, &lt;&amp;ipmmu_ds0 3&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 4&gt;, &lt;&amp;ipmmu_ds0 5&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 6&gt;, &lt;&amp;ipmmu_ds0 7&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 8&gt;, &lt;&amp;ipmmu_ds0 9&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 10&gt;, &lt;&amp;ipmmu_ds0 11&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 12&gt;, &lt;&amp;ipmmu_ds0 13&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 14&gt;, &lt;&amp;ipmmu_ds0 15&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dmac2: dma-controller@e7351000 {</div><div class='hunk'>@@ -605,6 +1005,10 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 710&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			dma-channels = &lt;8&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_ds0 16&gt;, &lt;&amp;ipmmu_ds0 17&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 18&gt;, &lt;&amp;ipmmu_ds0 19&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 20&gt;, &lt;&amp;ipmmu_ds0 21&gt;,</div><div class='add'>+				 &lt;&amp;ipmmu_ds0 22&gt;, &lt;&amp;ipmmu_ds0 23&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc0: mmc@ee140000 {</div><div class='hunk'>@@ -618,6 +1022,7 @@</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 706&gt;;</div><div class='ctx'> 			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_ds0 32&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -637,6 +1042,106 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ipmmu_rt0: iommu@ee480000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xee480000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_rt1: iommu@ee4c0000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xee4c0000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_ds0: iommu@eed00000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeed00000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_hc: iommu@eed40000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeed40000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_ir: iommu@eed80000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeed80000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_vc: iommu@eedc0000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeedc0000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_3dg: iommu@eee00000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeee00000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_vi0: iommu@eee80000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeee80000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_vi1: iommu@eeec0000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeeec0000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_vip0: iommu@eef00000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeef00000 0 0x20000&gt;;</div><div class='add'>+			renesas,ipmmu-main = &lt;&amp;ipmmu_mm&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipmmu_mm: iommu@eefc0000 {</div><div class='add'>+			compatible = "renesas,ipmmu-r8a779h0",</div><div class='add'>+				     "renesas,rcar-gen4-ipmmu-vmsa";</div><div class='add'>+			reg = &lt;0 0xeefc0000 0 0x20000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@f1000000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='hunk'>@@ -653,6 +1158,36 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	thermal-zones {</div><div class='add'>+		sensor_thermal_cr52: sensor1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsc 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				sensor1_crit: sensor1-crit {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sensor_thermal_ca76: sensor2-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsc 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				sensor2_crit: sensor2-crit {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts-extended = &lt;&amp;gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi<br/>index 8721f4c9fa0f..d2365def1059 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r9a07g043.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/r9a07g043.dtsi</a></div><div class='hunk'>@@ -598,6 +598,7 @@</div><div class='ctx'> 			gpio-ranges = &lt;&amp;pinctrl 0 0 152&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpg CPG_MOD R9A07G043_GPIO_HCLK&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;cpg&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg R9A07G043_GPIO_RSTN&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi<br/>index 964b0a475eee..165bfcfef3bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/r9a07g043u.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/r9a07g043u.dtsi</a></div><div class='hunk'>@@ -54,10 +54,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;soc {</div><div class='ctx'> 	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi<br/>index de590996e10a..433860987f73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2022 Renesas Electronics Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include "rzg2ul-smarc-pinfunction.dtsi"</div><div class='ctx'> #include "rz-smarc-common.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -23,6 +24,63 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='add'>+	da9062: pmic@58 {</div><div class='add'>+		compatible = "dlg,da9062";</div><div class='add'>+		reg = &lt;0x58&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio {</div><div class='add'>+			compatible = "dlg,da9062-gpio";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		onkey {</div><div class='add'>+			compatible = "dlg,da9062-onkey";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmic-good-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "PMIC_PGOOD";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc {</div><div class='add'>+			compatible = "dlg,da9062-rtc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-pwr-sel-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "SD0_PWR_SEL";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1-pwr-sel-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "SD1_PWR_SEL";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sw-et0-en-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "SW_ET0_EN#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		thermal {</div><div class='add'>+			compatible = "dlg,da9062-thermal";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog {</div><div class='add'>+			compatible = "dlg,da9062-watchdog";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	versa3: clock-generator@68 {</div><div class='ctx'> 		compatible = "renesas,5p35023";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi<br/>index acac4666ae59..8a3d302f1535 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'>  *	SW_OFF - SD2 is connected to SoC</div><div class='ctx'>  *	SW_ON  - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC</div><div class='ctx'>  */</div><div class='del'>-#define SW_CONFIG2	SW_ON</div><div class='add'>+#define SW_CONFIG2	SW_OFF</div><div class='ctx'> #define SW_CONFIG3	SW_ON</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -36,8 +36,8 @@</div><div class='ctx'> #if SW_CONFIG3 == SW_OFF</div><div class='ctx'> 		mmc2 = &amp;sdhi2;</div><div class='ctx'> #else</div><div class='del'>-		eth0 = &amp;eth0;</div><div class='del'>-		eth1 = &amp;eth1;</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='ctx'> #endif</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile<br/>index f906a868b71a..f42fa62b4064 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351m.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351v.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-gameforce-chi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2-v11.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb</div><div class='hunk'>@@ -90,6 +91,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-rock-3c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-blade.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-model-a.dtb</div><div class='hunk'>@@ -100,6 +102,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb</div><div class='hunk'>@@ -107,6 +110,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo</div><div class='hunk'>@@ -114,6 +120,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi<br/>index cfc0a87b5195..962ea893999b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3308.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3308.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3308.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3308.dtsi</a></div><div class='hunk'>@@ -578,6 +578,48 @@</div><div class='ctx'> 		#dma-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * - can be clock producer or consumer</div><div class='add'>+	 * - up to 8 capture channels and 2 playback channels</div><div class='add'>+	 * - connected internally to audio codec</div><div class='add'>+	 */</div><div class='add'>+	i2s_8ch_2: i2s@ff320000 {</div><div class='add'>+		compatible = "rockchip,rk3308-i2s-tdm";</div><div class='add'>+		reg = &lt;0x0 0xff320000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clock-names = "mclk_tx", "mclk_rx", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_I2S2_8CH_TX&gt;,</div><div class='add'>+			 &lt;&amp;cru SCLK_I2S2_8CH_RX&gt;,</div><div class='add'>+			 &lt;&amp;cru HCLK_I2S2_8CH&gt;;</div><div class='add'>+		dmas = &lt;&amp;dmac1 5&gt;, &lt;&amp;dmac1 4&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='add'>+		resets = &lt;&amp;cru SRST_I2S2_8CH_TX_M&gt;, &lt;&amp;cru SRST_I2S2_8CH_RX_M&gt;;</div><div class='add'>+		reset-names = "tx-m", "rx-m";</div><div class='add'>+		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * - can be clock consumer only</div><div class='add'>+	 * - up to 4 capture channels, no playback</div><div class='add'>+	 * - connected internally to audio codec</div><div class='add'>+	 */</div><div class='add'>+	i2s_8ch_3: i2s@ff330000 {</div><div class='add'>+		compatible = "rockchip,rk3308-i2s-tdm";</div><div class='add'>+		reg = &lt;0x0 0xff330000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clock-names = "mclk_tx", "mclk_rx", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_I2S3_8CH_TX&gt;,</div><div class='add'>+			 &lt;&amp;cru SCLK_I2S3_8CH_RX&gt;,</div><div class='add'>+			 &lt;&amp;cru HCLK_I2S3_8CH&gt;;</div><div class='add'>+		dmas = &lt;&amp;dmac1 7&gt;;</div><div class='add'>+		dma-names = "rx";</div><div class='add'>+		resets = &lt;&amp;cru SRST_I2S3_8CH_TX_M&gt;, &lt;&amp;cru SRST_I2S3_8CH_RX_M&gt;;</div><div class='add'>+		reset-names = "tx-m", "rx-m";</div><div class='add'>+		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s_2ch_0: i2s@ff350000 {</div><div class='ctx'> 		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";</div><div class='ctx'> 		reg = &lt;0x0 0xff350000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -761,6 +803,20 @@</div><div class='ctx'> 		assigned-clock-rates = &lt;32768&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	codec: codec@ff560000 {</div><div class='add'>+		compatible = "rockchip,rk3308-codec";</div><div class='add'>+		reg = &lt;0x0 0xff560000 0x0 0x10000&gt;;</div><div class='add'>+		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+		clock-names = "mclk_tx", "mclk_rx", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_I2S2_8CH_TX_OUT&gt;,</div><div class='add'>+			 &lt;&amp;cru SCLK_I2S2_8CH_RX_OUT&gt;,</div><div class='add'>+			 &lt;&amp;cru PCLK_ACODEC&gt;;</div><div class='add'>+		reset-names = "codec-reset";</div><div class='add'>+		resets = &lt;&amp;cru SRST_ACODEC_P&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gic: interrupt-controller@ff580000 {</div><div class='ctx'> 		compatible = "arm,gic-400";</div><div class='ctx'> 		reg = &lt;0x0 0xff581000 0x0 0x1000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts b/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts<br/>new file mode 100644<br/>index 000000000000..579261b3a474<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts</a></div><div class='hunk'>@@ -0,0 +1,809 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Chris Morgan &lt;macromorgan@hotmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rk3326.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "GameForce Chi";</div><div class='add'>+	compatible = "gameforce,chi", "rockchip,rk3326";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+		mmc1 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc_joystick: adc-joystick {</div><div class='add'>+		compatible = "adc-joystick";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;,</div><div class='add'>+			      &lt;&amp;saradc 1&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		axis@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			abs-flat = &lt;10&gt;;</div><div class='add'>+			abs-fuzz = &lt;10&gt;;</div><div class='add'>+			abs-range = &lt;850 175&gt;;</div><div class='add'>+			linux,code = &lt;ABS_Y&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		axis@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			abs-flat = &lt;10&gt;;</div><div class='add'>+			abs-fuzz = &lt;10&gt;;</div><div class='add'>+			abs-range = &lt;800 190&gt;;</div><div class='add'>+			linux,code = &lt;ABS_X&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc_keys: adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 2&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;60&gt;;</div><div class='add'>+</div><div class='add'>+		button-1 {</div><div class='add'>+			label = "HAPPY1";</div><div class='add'>+			linux,code = &lt;BTN_TRIGGER_HAPPY1&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;15000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-2 {</div><div class='add'>+			label = "HAPPY2";</div><div class='add'>+			linux,code = &lt;BTN_TRIGGER_HAPPY2&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;vcc_bl&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;3000000&gt;;</div><div class='add'>+		charge-term-current-microamp = &lt;300000&gt;;</div><div class='add'>+		constant-charge-current-max-microamp = &lt;1500000&gt;;</div><div class='add'>+		constant-charge-voltage-max-microvolt = &lt;4200000&gt;;</div><div class='add'>+		factory-internal-resistance-micro-ohms = &lt;180000&gt;;</div><div class='add'>+		ocv-capacity-celsius = &lt;20&gt;;</div><div class='add'>+		ocv-capacity-table-0 =  &lt;4106000 100&gt;, &lt;4071000 95&gt;, &lt;4018000 90&gt;, &lt;3975000 85&gt;,</div><div class='add'>+					&lt;3946000 80&gt;, &lt;3908000 75&gt;, &lt;3877000 70&gt;, &lt;3853000 65&gt;,</div><div class='add'>+					&lt;3834000 60&gt;, &lt;3816000 55&gt;, &lt;3802000 50&gt;, &lt;3788000 45&gt;,</div><div class='add'>+					&lt;3774000 40&gt;, &lt;3760000 35&gt;, &lt;3748000 30&gt;, &lt;3735000 25&gt;,</div><div class='add'>+					&lt;3718000 20&gt;, &lt;3697000 15&gt;, &lt;3685000 10&gt;, &lt;3625000 5&gt;,</div><div class='add'>+					&lt;3400000 0&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4250000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_leds: gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		red_led: led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		green_led: led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blue_led: led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		white_led: led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		chg_led: led-4 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_CHARGING;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;btn_pins_ctrl&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		button-a {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "EAST";</div><div class='add'>+			linux,code = &lt;BTN_EAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-b {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "SOUTH";</div><div class='add'>+			linux,code = &lt;BTN_SOUTH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-down {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "DPAD-DOWN";</div><div class='add'>+			linux,code = &lt;BTN_DPAD_DOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "HOME";</div><div class='add'>+			linux,code = &lt;BTN_MODE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-l1 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "TL";</div><div class='add'>+			linux,code = &lt;BTN_TL&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-l2 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "TL2";</div><div class='add'>+			linux,code = &lt;BTN_TL2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-left {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "DPAD-LEFT";</div><div class='add'>+			linux,code = &lt;BTN_DPAD_LEFT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-r1 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "TR";</div><div class='add'>+			linux,code = &lt;BTN_TR&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-r2 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "TR2";</div><div class='add'>+			linux,code = &lt;BTN_TR2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-right {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "DPAD-RIGHT";</div><div class='add'>+			linux,code = &lt;BTN_DPAD_RIGHT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-select {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "SELECT";</div><div class='add'>+			linux,code = &lt;BTN_SELECT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-start {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "START";</div><div class='add'>+			linux,code = &lt;BTN_START&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-up {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "DPAD-UP";</div><div class='add'>+			linux,code = &lt;BTN_DPAD_UP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-x {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "NORTH";</div><div class='add'>+			linux,code = &lt;BTN_NORTH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-y {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "WEST";</div><div class='add'>+			linux,code = &lt;BTN_WEST&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	multi-led {</div><div class='add'>+		compatible = "leds-group-multicolor";</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_KBD_BACKLIGHT;</div><div class='add'>+		leds = &lt;&amp;red_led&gt;, &lt;&amp;green_led&gt;, &lt;&amp;blue_led&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spk_amp: audio-amplifier {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spk_amp_enable_h&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		sound-name-prefix = "Speaker Amp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_det&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		simple-audio-card,name = "rk817_ext";</div><div class='add'>+		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,hp-det-gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Mic Jack",</div><div class='add'>+			"Headphone", "Headphones",</div><div class='add'>+			"Speaker", "Internal Speakers";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"MICL", "Mic Jack",</div><div class='add'>+			"Headphones", "HPOL",</div><div class='add'>+			"Headphones", "HPOR",</div><div class='add'>+			"Internal Speakers", "Speaker Amp OUTL",</div><div class='add'>+			"Internal Speakers", "Speaker Amp OUTR",</div><div class='add'>+			"Speaker Amp INL", "HPOL",</div><div class='add'>+			"Speaker Amp INR", "HPOR";</div><div class='add'>+		simple-audio-card,pin-switches = "Internal Speakers";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;rk817&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s1_2ch&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vibrator_left: pwm-vibrator-l {</div><div class='add'>+		compatible = "pwm-vibrator";</div><div class='add'>+		pwm-names = "enable";</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vibrator_right: pwm-vibrator-r {</div><div class='add'>+		compatible = "pwm-vibrator";</div><div class='add'>+		pwm-names = "enable";</div><div class='add'>+		pwms = &lt;&amp;pwm5 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rk817 1&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vccsys: vccsys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v8_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3800000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	internal_display: panel@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "gameforce,chi-panel";</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_lcd&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_lcd&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		mipi_out: port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mipi_out_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;16&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;280&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk817: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk817";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		clock-output-names = "rk808-clkout1", "xin32k";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_I2S1_OUT&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1_2ch_mclk&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;dcdc_boost&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_arm: DCDC_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v0: DCDC_REG4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: LDO_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_1v0: LDO_REG3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-name = "vdd_1v0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v0_pmu: LDO_REG4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v0_pmu";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_sd: LDO_REG6 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_sd";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_bl: LDO_REG7 {</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_bl";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_lcd: LDO_REG8 {</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-name = "vcc_lcd";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_wifi: LDO_REG9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_wifi";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcdc_boost: BOOST {</div><div class='add'>+				regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+				regulator-name = "dcdc_boost";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			otg_switch: OTG_SWITCH {</div><div class='add'>+				regulator-name = "otg_switch";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk817_charger: charger {</div><div class='add'>+			monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+			rockchip,resistor-sense-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			rockchip,sleep-enter-current-microamp = &lt;300000&gt;;</div><div class='add'>+			rockchip,sleep-filter-current-microamp = &lt;100000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1_2ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_3v0_pmu&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bluetooth-pins {</div><div class='add'>+		bt_reset: bt-reset {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_dev: bt-wake-dev {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	headphone {</div><div class='add'>+		hp_det: hp-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;2 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-btns {</div><div class='add'>+		btn_pins_ctrl: btn-pins-ctrl {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;1 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;1 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;1 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				&lt;2 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		led_pins: led-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		soc_slppin_gpio: soc_slppin_gpio {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA4 RK_FUNC_GPIO &amp;pcfg_output_low&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		soc_slppin_rst: soc_slppin_rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		soc_slppin_slp: soc_slppin_slp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio-pwrseq {</div><div class='add'>+		wifi_enable_h: wifi-enable-h {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	speaker {</div><div class='add'>+		spk_amp_enable_h: spk-amp-enable-h {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;2 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc_3v0_pmu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	disable-wp;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sfc_clk &amp;sfc_cs0 &amp;sfc_bus2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;108000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	u2phy_otg: otg-port {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The right ADC joystick exists connected to an unknown ADC</div><div class='add'>+ * controller which can be communicated with via uart0. This ADC device</div><div class='add'>+ * is an 8-pin SOIC with no markings located right next to the left ADC</div><div class='add'>+ * joystick ribbon cable. The pinout for this ADC controller appears to</div><div class='add'>+ * be pin 1 - VCC (2.8v), pin 2 - 1.8v (clk maybe?), pin 3 - GPIO 10,</div><div class='add'>+ * pin 4 - unknown, pin 5 - unknown, pin 6 - analog in, pin 7 - analog in,</div><div class='add'>+ * pin 8 - ground. There is currently a userspace UART driver for this</div><div class='add'>+ * device but it only works with the BSP joystick driver.</div><div class='add'>+ */</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Bluetooth was not working on BSP and is not currently working on</div><div class='add'>+ * mainline due to missing firmware. Bluetooth requires removal of DMA</div><div class='add'>+ * or else it will not probe.</div><div class='add'>+ */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	/delete-property/ dma-names;</div><div class='add'>+	/delete-property/ dmas;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth: bluetooth {</div><div class='add'>+		compatible = "realtek,rtl8723ds-bt";</div><div class='add'>+		device-wake-gpios = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wake-gpios = &lt;&amp;gpio0 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reset&gt;, &lt;&amp;bt_wake_dev&gt;, &lt;&amp;bt_wake_host&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m1_xfer&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi<br/>index b6f045069ee2..07dcc949b899 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3328.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3328.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3328.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3328.dtsi</a></div><div class='hunk'>@@ -46,8 +46,14 @@</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;120&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -59,8 +65,14 @@</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;120&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -72,8 +84,14 @@</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;120&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -85,8 +103,14 @@</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;120&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='hunk'>@@ -102,10 +126,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		l2: l2-cache0 {</div><div class='add'>+		l2_cache: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;256&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi<br/>index b48b98c13705..e5c0dbf794ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts<br/>index dcee2e28916f..23ae2d9de382 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts<br/>index b16b7ca02379..7f14206d53c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368-r88.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368-r88.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368-r88.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3368-r88.dts</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi<br/>index 62af0cb94839..734f87db4d11 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3368.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3368.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3368.dtsi</a></div><div class='hunk'>@@ -141,7 +141,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	arm-pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi<br/>index 5846a11f0e84..d5e035823eb5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi</a></div><div class='hunk'>@@ -663,7 +663,7 @@ camera: &amp;i2c7 {</div><div class='ctx'> 			port@1 {</div><div class='ctx'> 				reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-				mipi1_in_panel: endpoint@1 {</div><div class='add'>+				mipi1_in_panel: endpoint {</div><div class='ctx'> 					remote-endpoint = &lt;&amp;mipi1_out_panel&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -689,7 +689,6 @@ camera: &amp;i2c7 {</div><div class='ctx'> 	ep-gpios = &lt;&amp;gpio0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 	/* PERST# asserted in S3 */</div><div class='del'>-	pcie-reset-suspend = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;wlan_3v3&gt;;</div><div class='ctx'> 	vpcie1v8-supply = &lt;&amp;pp1800_pcie&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts<br/>index dfb2a0bdea5b..9586bb12a5d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts</a></div><div class='hunk'>@@ -611,7 +611,7 @@</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				interface@0 {	/* interface 0 of configuration 1 */</div><div class='del'>-					compatible = "usbbda,8156.config1.0";</div><div class='add'>+					compatible = "usbifbda,8156.config1.0";</div><div class='ctx'> 					reg = &lt;0 1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts<br/>index 054c6a4d1a45..294eb2de263d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts</a></div><div class='hunk'>@@ -779,7 +779,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie0 {</div><div class='del'>-	bus-scan-delay-ms = &lt;1000&gt;;</div><div class='ctx'> 	ep-gpios = &lt;&amp;gpio2 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	num-lanes = &lt;4&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts<br/>index 61f3fec5a8b1..e5709c7ee06a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include "rk3399-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Pine64 PinePhonePro";</div><div class='add'>+	model = "Pine64 PinePhone Pro";</div><div class='ctx'> 	compatible = "pine64,pinephone-pro", "rockchip,rk3399";</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts<br/>index 2c3984a880af..f6f15946579e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts</a></div><div class='hunk'>@@ -194,6 +194,8 @@</div><div class='ctx'> 	num-lanes = &lt;4&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie_clkreqn_cpm&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	vpcie12v-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi<br/>index c08e69391c01..ccbe3a7a1d2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi</a></div><div class='hunk'>@@ -79,6 +79,26 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcca_0v9: vcca-0v9-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcca_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcca_1v8: vcca-1v8-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcca_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_log: vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='hunk'>@@ -416,16 +436,28 @@</div><div class='ctx'> 	gpio1830-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmu_io_domains {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pmu1830-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	/* PCIe PHY supplies */</div><div class='add'>+	vpcie0v9-supply = &lt;&amp;vcca_0v9&gt;;</div><div class='add'>+	vpcie1v8-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pwm2 {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;pcie_clkreqn_cpm {</div><div class='add'>+	rockchip,pins =</div><div class='add'>+		&lt;2 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;q7_thermal_pin&gt;;</div><div class='add'>+</div><div class='add'>+	gpios {</div><div class='add'>+		q7_thermal_pin: q7-thermal-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c8 {</div><div class='ctx'> 		i2c8_xfer_a: i2c8-xfer {</div><div class='ctx'> 			rockchip,pins =</div><div class='hunk'>@@ -458,11 +490,20 @@</div><div class='ctx'> 	usb3 {</div><div class='ctx'> 		usb3_id: usb3-id {</div><div class='ctx'> 			rockchip,pins =</div><div class='del'>-			  &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+			  &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pmu1830-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Signal integrity isn't great at 200MHz but 100MHz has proven stable</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts<br/>index 7baf9d1b22fd..972aea843afd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts</a></div><div class='hunk'>@@ -151,6 +151,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;emmc_phy {</div><div class='add'>+	rockchip,enable-strobe-pulldown;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -549,7 +550,8 @@</div><div class='ctx'> &amp;sdhci {</div><div class='ctx'> 	max-frequency = &lt;150000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi<br/>index 281a12180703..b9d6284bb804 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a></div><div class='hunk'>@@ -194,6 +194,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;emmc_phy {</div><div class='add'>+	rockchip,enable-strobe-pulldown;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -648,7 +649,8 @@</div><div class='ctx'> &amp;sdhci {</div><div class='ctx'> 	max-frequency = &lt;150000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts<br/>index 8aa93c646bec..a73cf30801ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-anbernic-rg353x.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RG353P";</div><div class='add'>+	model = "Anbernic RG353P";</div><div class='ctx'> 	compatible = "anbernic,rg353p", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts<br/>index b211973e36c2..ca5284e4807d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-anbernic-rg353x.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RG353PS";</div><div class='add'>+	model = "Anbernic RG353PS";</div><div class='ctx'> 	compatible = "anbernic,rg353ps", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts<br/>index f49ce29ba597..e9954a33e8cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-anbernic-rg353x.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RG353V";</div><div class='add'>+	model = "Anbernic RG353V";</div><div class='ctx'> 	compatible = "anbernic,rg353v", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts<br/>index a7dc462fe21f..90da43855d1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-anbernic-rg353x.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RG353VS";</div><div class='add'>+	model = "Anbernic RG353VS";</div><div class='ctx'> 	compatible = "anbernic,rg353vs", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts<br/>index 94e6dd61a2db..74cf313e0635 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-anbernic-rgxx3.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RG503";</div><div class='add'>+	model = "Anbernic RG503";</div><div class='ctx'> 	compatible = "anbernic,rg503", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi<br/>index 18b8c2e7befa..233eade30f21 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include "rk3566.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='ctx'> 	chosen: chosen {</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -623,9 +625,12 @@</div><div class='ctx'> 	cap-sdio-irq;</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdmmc2m0_bus4 &amp;sdmmc2m0_cmd &amp;sdmmc2m0_clk&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	sd-uhs-sdr50;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_wifi&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vcca1v8_pmu&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts<br/>index 6ecdf5d28339..c1194d1e438d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts</a></div><div class='hunk'>@@ -447,7 +447,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pcie2x1 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	disable-gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts<br/>index 1f567a14ac84..952b1b285f3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-powkiddy-rk2023.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RGB30";</div><div class='add'>+	model = "Powkiddy RGB30";</div><div class='ctx'> 	compatible = "powkiddy,rgb30", "rockchip,rk3566";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts<br/>index bc9933d9e262..72890f747ee3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566-powkiddy-rk2023.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "RK2023";</div><div class='add'>+	model = "Powkiddy RK2023";</div><div class='ctx'> 	compatible = "powkiddy,rk2023", "rockchip,rk3566";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi<br/>index 3ab751a01cb2..bd332714a023 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include "rk3566.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		mmc1 = &amp;sdmmc0;</div><div class='ctx'> 		mmc2 = &amp;sdmmc1;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts<br/>index 4786b19fd017..5a648db41f35 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Powkiddy x55";</div><div class='add'>+	chassis-type = "handset";</div><div class='ctx'> 	compatible = "powkiddy,x55", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts<br/>index 59843a7a199c..0b191d8462ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Pine64 RK3566 Quartz64-A Board";</div><div class='add'>+	model = "Pine64 Quartz64 Model A";</div><div class='ctx'> 	compatible = "pine64,quartz64-a", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts<br/>index 2d92713be2a0..26322a358d91 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Pine64 RK3566 Quartz64-B Board";</div><div class='add'>+	model = "Pine64 Quartz64 Model B";</div><div class='ctx'> 	compatible = "pine64,quartz64-b", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts b/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts<br/>new file mode 100644<br/>index 000000000000..b242409d378c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts</a></div><div class='hunk'>@@ -0,0 +1,726 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3566.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 3C";</div><div class='add'>+	compatible = "radxa,rock-3c", "rockchip,rk3566";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+		mmc2 = &amp;sdmmc1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac1_clkin: external-gmac1-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+		clock-output-names = "gmac1_clkin";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;user_led2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rk809 1&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on_h&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;100&gt;;</div><div class='add'>+		power-off-delay-us = &lt;5000000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v_dcin: vcc5v-dcin-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pwr_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_usb30_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb30_host";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_usb_otg_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_cam: vcc-cam-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc_cam_en&gt;;</div><div class='add'>+		regulator-name = "vcc_cam";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_mipi: vcc-mipi-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc_mipi_en&gt;;</div><div class='add'>+		regulator-name = "vcc_mipi";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;gmac1_clkin&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1m1_miim</div><div class='add'>+		     &amp;gmac1m1_tx_bus2</div><div class='add'>+		     &amp;gmac1m1_rx_bus2</div><div class='add'>+		     &amp;gmac1m1_rgmii_clk</div><div class='add'>+		     &amp;gmac1m1_rgmii_bus</div><div class='add'>+		     &amp;gmac1m1_clkinout&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	avdd-0v9-supply = &lt;&amp;vdda0v9_image&gt;;</div><div class='add'>+	avdd-1v8-supply = &lt;&amp;vcca1v8_image&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_gpu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vdd_npu";</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: DCDC_REG5 {</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_image: LDO_REG1 {</div><div class='add'>+				regulator-name = "vdda0v9_image";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v9: LDO_REG2 {</div><div class='add'>+				regulator-name = "vdda_0v9";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_pmu: LDO_REG3 {</div><div class='add'>+				regulator-name = "vdda0v9_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_acodec: LDO_REG4 {</div><div class='add'>+				regulator-name = "vccio_acodec";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_pmu: LDO_REG6 {</div><div class='add'>+				regulator-name = "vcc3v3_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG7 {</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pmu: LDO_REG8 {</div><div class='add'>+				regulator-name = "vcca1v8_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_image: LDO_REG9 {</div><div class='add'>+				regulator-name = "vcca1v8_image";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: SWITCH_REG1 {</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sd: SWITCH_REG2 {</div><div class='add'>+				regulator-name = "vcc3v3_sd";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom: eeprom@50 {</div><div class='add'>+		compatible = "belling,bl24c16a", "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s1m0_sclktx &amp;i2s1m0_lrcktx &amp;i2s1m0_sdi0 &amp;i2s1m0_sdo0&gt;;</div><div class='add'>+	rockchip,trcm-sync-tx-only;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_reset_h&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio1 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bluetooth {</div><div class='add'>+		bt_reg_on_h: bt-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host_h: bt-wake-host-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_host_wake_h: bt-host-wake-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam {</div><div class='add'>+		vcc_cam_en: vcc_cam_en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display {</div><div class='add'>+		vcc_mipi_en: vcc_mipi_en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		user_led2: user-led2 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_pwr_en: pcie-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_reset_h: pcie-reset-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int_l: pmic-int-l {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_host_wake_h: wifi-host-wake-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_reg_on_h: wifi-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcca1v8_pmu&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vccio_acodec&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcca1v8_pmu&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_bus4 &amp;sdmmc1_clk &amp;sdmmc1_cmd&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcca1v8_pmu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;120000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1m0_ctsn &amp;uart1m0_rtsn &amp;uart1m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb_otg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts<br/>index fdbf1c783242..fdbb4a6a19d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include "rk3566-soquartz.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "PINE64 RK3566 SOQuartz on Blade carrier board";</div><div class='add'>+	model = "Pine64 SOQuartz on Blade carrier board";</div><div class='ctx'> 	compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts<br/>index 6ed3fa4aee34..2b6f0df477b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include "rk3566-soquartz.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";</div><div class='add'>+	model = "Pine64 SOQuartz on CM4-IO carrier board";</div><div class='ctx'> 	compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts<br/>index f2095dfa4eaf..9a6a63277c3d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include "rk3566-soquartz.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "PINE64 RK3566 SOQuartz on Model A carrier board";</div><div class='add'>+	model = "Pine64 SOQuartz on Model A carrier board";</div><div class='ctx'> 	compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi<br/>index bfb7b952f4c5..dd4e9c1893c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3566.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Pine64 RK3566 SoQuartz SOM";</div><div class='add'>+	model = "Pine64 SOQuartz system on module";</div><div class='ctx'> 	compatible = "pine64,soquartz", "rockchip,rk3566";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts<br/>index 7b5f3904ef61..c87fad2c34cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts</a></div><div class='hunk'>@@ -416,6 +416,8 @@</div><div class='ctx'> </div><div class='ctx'> 			vccio_sd: LDO_REG5 {</div><div class='ctx'> 				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -525,9 +527,9 @@</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	switch@0 {</div><div class='add'>+	switch@1f {</div><div class='ctx'> 		compatible = "mediatek,mt7531";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x1f&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts<br/>index a8a4cc190eb3..a3112d5df200 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts</a></div><div class='hunk'>@@ -523,7 +523,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pcie2x1 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	disable-gpios = &lt;&amp;gpio3 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_mini_pcie&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts<br/>new file mode 100644<br/>index 000000000000..c2dfffc638d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts</a></div><div class='hunk'>@@ -0,0 +1,404 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "rk3568.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Protonic MECSBC";</div><div class='add'>+	compatible = "prt,mecsbc", "rockchip,rk3568";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tas2562-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,name = "Speaker";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s1_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;tas2562&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_gpu: regulator-vdd-gpu {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		regulator-name = "vdd_gpu";</div><div class='add'>+		regulator-min-microvolt = &lt;915000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+		pwm-dutycycle-range = &lt;0 100&gt;; /* dutycycle inverted 0% =&gt; 0.915V */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3: regulator-p3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v8: regulator-p1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sd: regulator-sd {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "sdcard-gpio-supply";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		states = &lt;1800000 0x1&gt;, &lt;3300000 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_npu: regulator-vdd-npu {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		regulator-name = "vdd_npu";</div><div class='add'>+		regulator-min-microvolt = &lt;915000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+		pwm-dutycycle-range = &lt;0 100&gt;; /* dutycycle inverted 0% =&gt; 0.915V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru CLK_MAC1_2TOP&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1m1_miim</div><div class='add'>+		     &amp;gmac1m1_tx_bus2</div><div class='add'>+		     &amp;gmac1m1_rx_bus2</div><div class='add'>+		     &amp;gmac1m1_rgmii_clk</div><div class='add'>+		     &amp;gmac1m1_clkinout</div><div class='add'>+		     &amp;gmac1m1_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_opp_table {</div><div class='add'>+	compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+	opp-200000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+		opp-microvolt = &lt;915000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-300000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+		opp-microvolt = &lt;915000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-400000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+		opp-microvolt = &lt;915000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-600000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+		opp-microvolt = &lt;920000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-700000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+		opp-microvolt = &lt;950000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-800000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+		opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu: regulator@60 {</div><div class='add'>+		compatible = "fcs,fan53555";</div><div class='add'>+		reg = &lt;0x60&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2m0_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tas2562: amplifier@4c {</div><div class='add'>+		compatible = "ti,tas2562";</div><div class='add'>+		reg = &lt;0x4c&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tas2562&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,imon-slot-no = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf85363";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "rtcic_32kout";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s1m0_sclktx &amp;i2s1m0_lrcktx &amp;i2s1m0_sdi0 &amp;i2s1m0_sdo0&gt;;</div><div class='add'>+	rockchip,trcm-sync-tx-only;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@2 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;eth_phy1_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie20m1_pins&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie30x2m1_pins&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ethernet {</div><div class='add'>+		eth_phy1_rst: eth-phy1-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tas2562 {</div><div class='add'>+		pinctrl_tas2562: tas2562 {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;p1v8&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;p1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;p1v8&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;p1v8&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1m0_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm2m0_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;p1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;p1v8&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	extcon = &lt;&amp;usb2phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts<br/>index a5e974ea659e..ebdedea15ad1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3568.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Radxa ROCK3 Model A";</div><div class='add'>+	model = "Radxa ROCK 3A";</div><div class='ctx'> 	compatible = "radxa,rock3a", "rockchip,rk3568";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -757,6 +757,20 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sfc {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;104000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tsadc {</div><div class='ctx'> 	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='ctx'> 	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso<br/>new file mode 100644<br/>index 000000000000..ebcaeafc3800<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso</a></div><div class='hunk'>@@ -0,0 +1,137 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Device tree overlay for the WolfVision PF5 IO Expander board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 WolfVision GmbH.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/rk3568-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	gmac0_clkin: external-gmac0-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		clock-output-names = "gmac0_clkin";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_host_vbus: usb-host-vbus-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_vbus_en&gt;;</div><div class='add'>+		regulator-name = "usb_host_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_eth: vcc1v8-eth-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc1v8_eth_en&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "1v8_eth";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_eth: vcc3v3-eth-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-low;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc3v3_eth_enn&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "3v3_eth";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC0_RX_TX&gt;,</div><div class='add'>+			  &lt;&amp;cru SCLK_GMAC0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC0_RMII_SPEED&gt;,</div><div class='add'>+				 &lt;&amp;gmac0_clkin&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-handle = &lt;&amp;dp83826&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-supply = &lt;&amp;vcc3v3_eth&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='add'>+		     &amp;gmac0_clkinout</div><div class='add'>+		     &amp;gmac0_rx_er</div><div class='add'>+		     &amp;gmac0_rx_bus2</div><div class='add'>+		     &amp;gmac0_tx_bus2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	dp83826: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;eth_wake_intn &amp;eth_phy_rstn&gt;;</div><div class='add'>+		reset-assert-us = &lt;1000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;2000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ethernet {</div><div class='add'>+		eth_wake_intn: eth-wake-intn-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth_phy_rstn: eth-phy-rstn-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc1v8_eth_en: vcc1v8-eth-en-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc3v3_eth_enn: vcc3v3-eth-enn-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_vbus_en: usb-host-vbus-en-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	phys = &lt;&amp;usb2phy0_host&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;usb_host_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts<br/>new file mode 100644<br/>index 000000000000..170b14f92f51<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts</a></div><div class='hunk'>@@ -0,0 +1,528 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Device tree for the WolfVision PF5 mainboard.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 WolfVision GmbH.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/ti,tps62864.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3568.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "WolfVision PF5";</div><div class='add'>+	compatible = "wolfvision,rk3568-pf5", "rockchip,rk3568";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		rtc0 = &amp;pcf85623;</div><div class='add'>+		rtc1 = &amp;rk809;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_tx: hdmi-tx-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		hdmi-pwr-supply = &lt;&amp;hdmi_tx_5v&gt;;</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_tx_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_tx_5v: hdmi-tx-5v-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hdmi_tx_5v_en&gt;;</div><div class='add'>+		regulator-name = "hdmi_tx_5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdm_codec: pdm-codec {</div><div class='add'>+		compatible = "dmic-codec";</div><div class='add'>+		num-channels = &lt;1&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdm_sound: pdm-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "microphone";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;pdm&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;pdm_codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_cam: vcc12v-cam-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc12v_cam_en&gt;;</div><div class='add'>+		regulator-name = "12v_cam";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_in: vcc12v-in-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "12v_in";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v8_cam: vcc3v8-cam-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc3v8_cam_en&gt;;</div><div class='add'>+		regulator-name = "3v8_cam";</div><div class='add'>+		regulator-min-microvolt = &lt;3800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v_in: vcc5v-in-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5v_in";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vcc0v9_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vcc0v9_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vcc0v9_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vcc0v9_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vcc0v9_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	avdd-0v9-supply = &lt;&amp;vcc0v9a_image&gt;;</div><div class='add'>+	avdd-1v8-supply = &lt;&amp;vcc1v8a_image&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_tx_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_tx_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='add'>+		rockchip,system-power-controller;</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vcc0v9_logic: DCDC_REG1 {</div><div class='add'>+				regulator-name = "0v9_logic";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc0v9_gpu: DCDC_REG2 {</div><div class='add'>+				regulator-name = "0v9_gpu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v1_ddr4: DCDC_REG3 {</div><div class='add'>+				regulator-name = "1v1_ddr4";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc0v9_npu: DCDC_REG4 {</div><div class='add'>+				regulator-name = "0v9_npu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8: DCDC_REG5 {</div><div class='add'>+				regulator-name = "1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc0v9a_image: LDO_REG1 {</div><div class='add'>+				regulator-name = "0v9a_image";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc0v9a: LDO_REG2 {</div><div class='add'>+				regulator-name = "0v9a";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc0v9a_pmu: LDO_REG3 {</div><div class='add'>+				regulator-name = "0v9a_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_acodec: LDO_REG4 {</div><div class='add'>+				regulator-name = "3v3_acodec";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sd: LDO_REG5 {</div><div class='add'>+				regulator-name = "3v3_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_pmu: LDO_REG6 {</div><div class='add'>+				regulator-name = "3v3_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8a: LDO_REG7 {</div><div class='add'>+				regulator-name = "1v8a";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8a_pmu: LDO_REG8 {</div><div class='add'>+				regulator-name = "1v8a_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8a_image: LDO_REG9 {</div><div class='add'>+				regulator-name = "1v8a_image";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sw: SWITCH_REG1 {</div><div class='add'>+				regulator-name = "3v3_sw";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator@42 {</div><div class='add'>+		compatible = "ti,tps62869";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vcc0v9_cpu: SW {</div><div class='add'>+				regulator-name = "0v9_cpu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;TPS62864_MODE_FPWM&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcf85623: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf85263";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;clk32k_in&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3m0_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4m1_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pdm {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pdmm0_clk</div><div class='add'>+		     &amp;pdmm0_sdi0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	cam {</div><div class='add'>+		vcc12v_cam_en: vcc12v-cam-en-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc3v8_cam_en: vcc3v8-cam-en-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmitx {</div><div class='add'>+		hdmi_tx_5v_en: hdmi-tx-5v-en-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int_l: pmic-int-l-pinctrl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc3v3_acodec&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc1v8&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc1v8&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc3v3_sw&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc3v3_sw&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc1v8a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sw&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	/* The following quirks are required since the bInterval is 1 and we</div><div class='add'>+	 * handle steady ISOC streaming. See Usecase 3 in commit 729dcffd1ed3</div><div class='add'>+	 * ("usb: dwc3: gadget: Add support for disabling U1 and U2 entries").</div><div class='add'>+	 */</div><div class='add'>+	snps,dis-u1-entry-quirk;</div><div class='add'>+	snps,dis-u2-entry-quirk;</div><div class='add'>+	/*</div><div class='add'>+	 * Without this quirk the available fifosize seems to be miscalculated</div><div class='add'>+	 * in cases where many endpoints are used. In one particular situation</div><div class='add'>+	 * 8 IN EPs and 3 OUT EPs where selected and lead to stalled transfers</div><div class='add'>+	 * without the resize quirk.</div><div class='add'>+	 */</div><div class='add'>+	tx-fifo-resize;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP2&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi<br/>index 92f96ec01385..d8543b5557ee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk356x.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk356x.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk356x.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk356x.dtsi</a></div><div class='hunk'>@@ -57,6 +57,13 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@100 {</div><div class='hunk'>@@ -66,6 +73,13 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@200 {</div><div class='hunk'>@@ -75,6 +89,13 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@300 {</div><div class='hunk'>@@ -84,9 +105,29 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * There are no private per-core L2 caches, but only the</div><div class='add'>+	 * L3 cache that appears to the CPU cores as L2 caches</div><div class='add'>+	 */</div><div class='add'>+	l3_cache: l3-cache {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-level = &lt;2&gt;;</div><div class='add'>+		cache-unified;</div><div class='add'>+		cache-size = &lt;0x80000&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;512&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpu0_opp_table: opp-table-0 {</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts<br/>new file mode 100644<br/>index 000000000000..98c622b27647<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts</a></div><div class='hunk'>@@ -0,0 +1,721 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ArmSoM Sige7";</div><div class='add'>+	compatible = "armsom,sige7", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='add'>+		label = "rk3588-es8316";</div><div class='add'>+		hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		routing = "MIC2", "Mic Jack",</div><div class='add'>+			  "Headphones", "HPOL",</div><div class='add'>+			  "Headphones", "HPOR";</div><div class='add'>+		widgets = "Microphone", "Mic Jack",</div><div class='add'>+			  "Headphone", "Headphones";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_rgb_g&gt;;</div><div class='add'>+</div><div class='add'>+		led_green: led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_red: led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;0 95 145 195 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8316: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8316";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			es8316_p0_0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;i2s0_8ch_p0_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2s0_8ch_p0: port {</div><div class='add'>+		i2s0_8ch_p0_0: endpoint {</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;es8316_p0_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* phy1 - right ethernet port */</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* phy2 - WiFi */</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* phy0 - left ethernet port */</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_g: led-rgb-g {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		led_rgb_r: led-rgb-r {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi<br/>index cce1c8e83587..fde8b228f2c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi</a></div><div class='hunk'>@@ -136,6 +136,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -216,9 +221,9 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c7m0_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	es8316: audio-codec@11 {</div><div class='add'>+	es8316: audio-codec@10 {</div><div class='ctx'> 		compatible = "everest,es8316";</div><div class='del'>-		reg = &lt;0x11&gt;;</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='ctx'> 		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;12288000&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='hunk'>@@ -357,7 +362,7 @@</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi<br/>index c0d4a15323e2..709d348cf06b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi</a></div><div class='hunk'>@@ -162,6 +162,8 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='ctx'> 			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='ctx'> </div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -182,7 +184,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi<br/>index 963e880ccc12..7b1317898358 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi</a></div><div class='hunk'>@@ -68,6 +68,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c6 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -230,3 +234,7 @@</div><div class='ctx'> &amp;usb_host1_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts<br/>index de30c2632b8e..7be2190244ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -159,6 +160,18 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vbus5v0_typec: vbus5v0-typec-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PD0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='hunk'>@@ -281,9 +294,68 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_orientation_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dwc3_0_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					dp_altmode_mux: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_dp_altmode_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hym8563: rtc@51 {</div><div class='ctx'> 		compatible = "haoyu,hym8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='hunk'>@@ -410,6 +482,16 @@</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb-typec {</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='hunk'>@@ -484,12 +566,16 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				/* regulator coupling requires always-on */</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-min-microvolt = &lt;550000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;950000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;12500&gt;;</div><div class='ctx'> 				regulator-name = "vdd_gpu_s0";</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='ctx'> 				regulator-state-mem {</div><div class='ctx'> 					regulator-off-in-suspend;</div><div class='ctx'> 				};</div><div class='hunk'>@@ -534,12 +620,16 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			vdd_gpu_mem_s0: dcdc-reg5 {</div><div class='add'>+				/* regulator coupling requires always-on */</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-min-microvolt = &lt;675000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;950000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;12500&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='ctx'> 				regulator-name = "vdd_gpu_mem_s0";</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='ctx'> 				regulator-state-mem {</div><div class='ctx'> 					regulator-off-in-suspend;</div><div class='ctx'> 				};</div><div class='hunk'>@@ -1041,6 +1131,22 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1079,3 +1185,58 @@</div><div class='ctx'> &amp;usb_host1_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_orientation_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_dp_altmode_mux: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dp_altmode_mux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	/*</div><div class='add'>+	 * USBDP PHY1 is wired to a female USB3 Type-A connector. Additionally</div><div class='add'>+	 * the differential pairs 2+3 and the aux channel are wired to a RTD2166,</div><div class='add'>+	 * which converts the DP signal into VGA. This is exposed on the</div><div class='add'>+	 * board via a female VGA connector.</div><div class='add'>+	 */</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dwc3_0_role_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi<br/>new file mode 100644<br/>index 000000000000..47e64d547ea9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi</a></div><div class='hunk'>@@ -0,0 +1,558 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "forlinx,fet3588-c", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_rgb_b&gt;;</div><div class='add'>+</div><div class='add'>+		io-led {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie20_avdd0v85: pcie20-avdd0v85-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pcie20_avdd0v85";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_0v85_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie20_avdd1v8: pcie20-avdd1v8-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pcie20_avdd1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie30_avdd0v75: pcie30-avdd0v75-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pcie30_avdd0v75";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pcie30_avdd1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc4v0_sys: vcc4v0-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc4v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;4000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_lit_mem_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_lit_mem_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_lit_mem_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+	mem-supply = &lt;&amp;vdd_cpu_lit_mem_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc4v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc4v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m2_xfer&gt;;</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc4v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_b: led-rgb-b {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts<br/>index 39d65002add1..31d2f8994f85 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts</a></div><div class='hunk'>@@ -72,6 +72,27 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE</div><div class='add'>+	 * clock generator.</div><div class='add'>+	 * The clock output is gated via the OE pin on the clock generator.</div><div class='add'>+	 * This is modeled as a fixed-clock plus a gpio-gate-clock.</div><div class='add'>+	 */</div><div class='add'>+	pcie_refclk_gen: pcie-refclk-gen-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_refclk: pcie-refclk-clock {</div><div class='add'>+		compatible = "gpio-gate-clock";</div><div class='add'>+		clocks = &lt;&amp;pcie_refclk_gen&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_LOW&gt;; /* PCIE30X4_CLKREQN_M0 */</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie30x4_clkreqn_m0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pps {</div><div class='ctx'> 		compatible = "pps-gpio";</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -245,6 +266,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -353,6 +379,30 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	/*</div><div class='add'>+	 * The board has a gpio-controlled "pcie_refclk" generator,</div><div class='add'>+	 * so add it to the list of clocks.</div><div class='add'>+	 */</div><div class='add'>+	clocks = &lt;&amp;cru ACLK_PCIE_4L_MSTR&gt;, &lt;&amp;cru ACLK_PCIE_4L_SLV&gt;,</div><div class='add'>+		 &lt;&amp;cru ACLK_PCIE_4L_DBI&gt;, &lt;&amp;cru PCLK_PCIE_4L&gt;,</div><div class='add'>+		 &lt;&amp;cru CLK_PCIE_AUX0&gt;, &lt;&amp;cru CLK_PCIE4L_PIPE&gt;,</div><div class='add'>+		 &lt;&amp;pcie_refclk&gt;;</div><div class='add'>+	clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+		      "aclk_dbi", "pclk",</div><div class='add'>+		      "aux", "pipe",</div><div class='add'>+		      "ref";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie30x4_waken_m0 &amp;pcie30x4_perstn_m0&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio0 RK_PD0 GPIO_ACTIVE_HIGH&gt;; /* PCIE30X4_PERSTN_M0 */</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_mdot2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	emmc {</div><div class='ctx'> 		emmc_reset: emmc-reset {</div><div class='hunk'>@@ -371,6 +421,20 @@</div><div class='ctx'> 			rockchip,pins = &lt;1 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pcie30x4 {</div><div class='add'>+		pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie30x4_perstn_m0: pcie30x4-perstn-m0 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie30x4_waken_m0: pcie30x4-waken-m0 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC7 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='hunk'>@@ -452,7 +516,7 @@</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts b/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts<br/>new file mode 100644<br/>index 000000000000..009566d881f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts</a></div><div class='hunk'>@@ -0,0 +1,409 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "rk3588-fet3588-c.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Forlinx OK3588-C Board";</div><div class='add'>+	compatible = "forlinx,ok3588-c", "forlinx,fet3588-c", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "Maskrom";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;400&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-1 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-volume-up {</div><div class='add'>+			label = "V+/Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volume-down {</div><div class='add'>+			label = "V-";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;417000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-menu {</div><div class='add'>+			label = "Menu";</div><div class='add'>+			linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;890000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-escape {</div><div class='add'>+			label = "ESC";</div><div class='add'>+			linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1235000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;0 95 145 195 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		simple-audio-card,name = "RK3588 OK3588-C Audio";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,pin-switches = "Headphones", "Speaker";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Headphones", "Headphones",</div><div class='add'>+			"Speaker", "Speaker",</div><div class='add'>+			"Microphone", "Internal Microphone",</div><div class='add'>+			"Microphone", "Headset Microphone";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphones", "LHP",</div><div class='add'>+			"Headphones", "RHP",</div><div class='add'>+			"Speaker", "LSPK",</div><div class='add'>+			"Speaker", "RSPK",</div><div class='add'>+			"LMICP", "Headset Microphone",</div><div class='add'>+			"RMICP", "Internal Microphone";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		masterdai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;nau8822&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_sys: vcc1v8-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v8_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l0";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;50000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: vcc3v3_pcie30-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='add'>+		     &amp;gmac0_tx_bus2</div><div class='add'>+		     &amp;gmac0_rx_bus2</div><div class='add'>+		     &amp;gmac0_rgmii_clk</div><div class='add'>+		     &amp;gmac0_rgmii_bus&gt;;</div><div class='add'>+	tx_delay = &lt;0x44&gt;;</div><div class='add'>+	rx_delay = &lt;0x00&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	tx_delay = &lt;0x44&gt;;</div><div class='add'>+	rx_delay = &lt;0x00&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tca6424a: gpio@23 {</div><div class='add'>+		compatible = "ti,tca6424";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tca6424a_int&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5m2_xfer&gt;;</div><div class='add'>+</div><div class='add'>+	pcf8563: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nau8822: audio-codec@1a {</div><div class='add'>+		compatible = "nuvoton,nau8822";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@1 {</div><div class='add'>+		/* RTL8211F */</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916",</div><div class='add'>+			     "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_0_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@2 {</div><div class='add'>+		/* RTL8211F */</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916",</div><div class='add'>+			     "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_1_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_2_rst: pcie2-2-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3_rst: pcie3-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl8211f {</div><div class='add'>+		rtl8211f_0_rst: rtl8211f-0-rst {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		rtl8211f_1_rst: rtl8211f-1-rst {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tca6424a {</div><div class='add'>+		tca6424a_int: tca6424a-int {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts<br/>index 1b606ea5b6cf..1a604429fb26 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts</a></div><div class='hunk'>@@ -485,6 +485,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='ctx'> 			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -506,7 +507,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts<br/>index 67414d72e2b6..b4f22d95ac0e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "PINE64 QuartzPro64";</div><div class='add'>+	model = "Pine64 QuartzPro64";</div><div class='ctx'> 	compatible = "pine64,quartzpro64", "rockchip,rk3588";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -285,6 +285,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -456,6 +462,7 @@</div><div class='ctx'> 			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc4v0_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc4v0_sys&gt;;</div><div class='hunk'>@@ -491,11 +498,15 @@</div><div class='ctx'> 		regulators {</div><div class='ctx'> 			vdd_gpu_s0: dcdc-reg1 {</div><div class='ctx'> 				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				/* regulator coupling requires always-on */</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;550000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;950000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 				regulator-state-mem {</div><div class='ctx'> 					regulator-off-in-suspend;</div><div class='hunk'>@@ -545,11 +556,15 @@</div><div class='ctx'> </div><div class='ctx'> 			vdd_gpu_mem_s0: dcdc-reg5 {</div><div class='ctx'> 				regulator-name = "vdd_gpu_mem_s0";</div><div class='add'>+				/* regulator coupling requires always-on */</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;675000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;950000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 				regulator-state-mem {</div><div class='ctx'> 					regulator-off-in-suspend;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts<br/>index 1fe8b2a0ed75..b8e15b76a8a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Radxa ROCK 5 Model B";</div><div class='add'>+	model = "Radxa ROCK 5B";</div><div class='ctx'> 	compatible = "radxa,rock-5b", "rockchip,rk3588";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -180,6 +180,11 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -742,6 +747,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -761,6 +774,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -777,6 +794,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts<br/>index d672198c6b64..e4b7a0a4444b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts</a></div><div class='hunk'>@@ -113,6 +113,16 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;otg_vbus_drv&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_otg";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='hunk'>@@ -137,6 +147,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;extcon_usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gmac0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -199,6 +213,13 @@</div><div class='ctx'> 				&lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb2 {</div><div class='add'>+		otg_vbus_drv: otg-vbus-drv {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			  &lt;1 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdmmc {</div><div class='hunk'>@@ -214,6 +235,23 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_otg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -231,25 +269,38 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart5 {</div><div class='ctx'> 	rts-gpios = &lt;&amp;gpio3 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* host0 on Q7_USB_P2, lower usb3 port */</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* host0 on Q7_USB_P2, upper usb3 port */</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* host0 on Q7_USB_P2, lower usb3 port */</div><div class='add'>+/* host0 on Q7_USB_P2, upper usb3 port */</div><div class='ctx'> &amp;usb_host0_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* host0_xhci on Q7_USB_P1, usb3-otg port */</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	extcon = &lt;&amp;extcon_usb3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* host1 on Q7_USB_P3, usb2 port */</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -260,7 +311,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* host2 on Q7_USB_P2, lower usb3 port */</div><div class='add'>+/* host1_xhci on Q7_USB_P0, lower usb3 port */</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* host2 on Q7_USB_P2, upper usb3 port */</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi<br/>index 1eb2543a5fde..aebe1fedd2d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi</a></div><div class='hunk'>@@ -23,6 +23,14 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	extcon_usb3: extcon-usb3 {</div><div class='add'>+		compatible = "linux,extcon-usb-gpio";</div><div class='add'>+		id-gpios = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb3_id&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -46,7 +54,7 @@</div><div class='ctx'> 	pcie_refclk_gen: pcie-refclk-gen-clock {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;1000000000&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie_refclk: pcie-refclk-clock {</div><div class='hunk'>@@ -139,6 +147,11 @@</div><div class='ctx'> 	snps,reset-delays-us = &lt;0 10000 100000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -322,6 +335,13 @@</div><div class='ctx'> 			rockchip,pins = &lt;1 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb3 {</div><div class='add'>+		usb3_id: usb3-id {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			  &lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='hunk'>@@ -396,7 +416,7 @@</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -683,6 +703,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Routed to UART0 on the Q7 connector */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m2_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Mule-ATtiny UPDI */</div><div class='ctx'> &amp;uart4 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart4m2_xfer&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi<br/>index dc08da518a76..6b9206ce4a03 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a></div><div class='hunk'>@@ -318,7 +318,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi<br/>index 5519c1430cb7..5984016b5f96 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588.dtsi</a></div><div class='hunk'>@@ -7,6 +7,26 @@</div><div class='ctx'> #include "rk3588-pinctrl.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	usb_host1_xhci: usb@fc400000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dwc3", "snps,dwc3";</div><div class='add'>+		reg = &lt;0x0 0xfc400000 0x0 0x400000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REF_CLK_USB3OTG1&gt;, &lt;&amp;cru SUSPEND_CLK_USB3OTG1&gt;,</div><div class='add'>+			 &lt;&amp;cru ACLK_USB3OTG1&gt;;</div><div class='add'>+		clock-names = "ref_clk", "suspend_clk", "bus_clk";</div><div class='add'>+		dr_mode = "otg";</div><div class='add'>+		phys = &lt;&amp;u2phy1_otg&gt;, &lt;&amp;usbdp_phy1 PHY_TYPE_USB3&gt;;</div><div class='add'>+		phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+		phy_type = "utmi_wide";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_USB&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_USB3OTG1&gt;;</div><div class='add'>+		snps,dis_enblslpm_quirk;</div><div class='add'>+		snps,dis-u2-freeclk-exists-quirk;</div><div class='add'>+		snps,dis-del-phy-power-chg-quirk;</div><div class='add'>+		snps,dis-tx-ipgap-linecheck-quirk;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie30_phy_grf: syscon@fd5b8000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";</div><div class='ctx'> 		reg = &lt;0x0 0xfd5b8000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -17,6 +37,36 @@</div><div class='ctx'> 		reg = &lt;0x0 0xfd5c0000 0x0 0x100&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbdpphy1_grf: syscon@fd5cc000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5cc000 0x0 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2phy1_grf: syscon@fd5d4000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";</div><div class='add'>+		reg = &lt;0x0 0xfd5d4000 0x0 0x4000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		u2phy1: usb2phy@4000 {</div><div class='add'>+			compatible = "rockchip,rk3588-usb2phy";</div><div class='add'>+			reg = &lt;0x4000 0x10&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_USB2PHY_HDPTXRXPHY_REF&gt;;</div><div class='add'>+			clock-names = "phyclk";</div><div class='add'>+			clock-output-names = "usb480m_phy1";</div><div class='add'>+			interrupts = &lt;GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_OTGPHY_U3_1&gt;, &lt;&amp;cru SRST_P_USB2PHY_U3_1_GRF0&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			u2phy1_otg: otg-port {</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s8_8ch: i2s@fddc8000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfddc8000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -310,6 +360,28 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbdp_phy1: phy@fed90000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usbdp-phy";</div><div class='add'>+		reg = &lt;0x0 0xfed90000 0x0 0x10000&gt;;</div><div class='add'>+		#phy-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_USBDPPHY_MIPIDCPPHY_REF&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_USBDP_PHY1_IMMORTAL&gt;,</div><div class='add'>+			 &lt;&amp;cru PCLK_USBDPPHY1&gt;,</div><div class='add'>+			 &lt;&amp;u2phy1&gt;;</div><div class='add'>+		clock-names = "refclk", "immortal", "pclk", "utmi";</div><div class='add'>+		resets = &lt;&amp;cru SRST_USBDP_COMBO_PHY1_INIT&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_USBDP_COMBO_PHY1_CMN&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_USBDP_COMBO_PHY1_LANE&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_USBDP_COMBO_PHY1_PCS&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_P_USBDPPHY1&gt;;</div><div class='add'>+		reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";</div><div class='add'>+		rockchip,u2phy-grf = &lt;&amp;usb2phy1_grf&gt;;</div><div class='add'>+		rockchip,usb-grf = &lt;&amp;usb_grf&gt;;</div><div class='add'>+		rockchip,usbdpphy-grf = &lt;&amp;usbdpphy1_grf&gt;;</div><div class='add'>+		rockchip,vo-grf = &lt;&amp;vo0_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	combphy1_ps: phy@fee10000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-naneng-combphy";</div><div class='ctx'> 		reg = &lt;0x0 0xfee10000 0x0 0x100&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts<br/>index e037bf9db75a..3b2ec1d0c542 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts</a></div><div class='hunk'>@@ -203,6 +203,11 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -479,7 +484,7 @@</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts<br/>index ce8119cbb824..d8c50fdcca3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts</a></div><div class='hunk'>@@ -316,7 +316,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='ctx'> </div><div class='del'>-		connector {</div><div class='add'>+		usb_con: connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			data-role = "dual";</div><div class='ctx'> 			label = "USB-C";</div><div class='hunk'>@@ -325,6 +325,32 @@</div><div class='ctx'> 			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='ctx'> 			sink-pdos = &lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='ctx'> 			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_orientation_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dwc3_0_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					dp_altmode_mux: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_dp_altmode_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -528,7 +554,7 @@</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -788,6 +814,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -839,6 +873,17 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		dwc3_0_role_switch: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -850,3 +895,27 @@</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	orientation-switch;</div><div class='add'>+	mode-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_orientation_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_dp_altmode_mux: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dp_altmode_mux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts<br/>index f53e993c785e..dbddfc3bb464 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts</a></div><div class='hunk'>@@ -3,7 +3,9 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -12,11 +14,298 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-function {</div><div class='add'>+			label = "Function";</div><div class='add'>+			linux,code = &lt;KEY_FN&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		compatible = "gpio-ir-receiver";</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PA7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;ir_receiver_pin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		red_led: led-0 {</div><div class='add'>+			label = "red_led";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm11 0 25000 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		green_led: led-1 {</div><div class='add'>+			label = "green_led";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm14 0 25000 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blue_led: led-2 {</div><div class='add'>+			label = "blue_led";</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm15 0 25000 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie_wl: vcc3v3-pcie-wl-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie2_2_vcc3v3_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie_wl";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_sd: vdd-3v3-sd-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_sd";</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_sd_en&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	vdd_sd {</div><div class='add'>+		vdd_sd_en: vdd-sd-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_2_rst: pcie2-2-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_2_vcc3v3_en: pcie2-2-vcc-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		ir_receiver_pin: ir-receiver-pin {</div><div class='add'>+			rockchip,pins = &lt;1  RK_PA7  RK_FUNC_GPIO  &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wireless-bluetooth {</div><div class='add'>+		bt_reset_pin: bt-reset-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_pin: bt-wake-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host_irq: bt-wake-host-irq {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie_wl&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm11 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm11m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm14 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm14m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm15 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm15m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci {</div><div class='hunk'>@@ -29,7 +318,403 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspim2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;100000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;uart9 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart9m2_xfer &amp;uart9m2_ctsn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts<br/>index 25de4362af38..feea6b20a6bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -146,6 +147,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -212,6 +218,56 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c6m3_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus_typec&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usbc0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_host0_xhci_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					usbc0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					usbc0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hym8563: rtc@51 {</div><div class='ctx'> 		compatible = "haoyu,hym8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='hunk'>@@ -336,7 +392,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -625,6 +681,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -646,6 +710,29 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_typec_ss: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_typec_sbu: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_sbu&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -654,6 +741,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb_host0_xhci_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts<br/>index 00afb90d4eb1..8e2a07612d17 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Radxa ROCK 5 Model A";</div><div class='add'>+	model = "Radxa ROCK 5A";</div><div class='ctx'> 	compatible = "radxa,rock-5a", "rockchip,rk3588s";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -414,7 +414,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='ctx'> 			function = "pin_fun0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -697,6 +697,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -720,6 +728,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -730,6 +743,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi<br/>index 87b83c87bd55..6ac5ac8b48ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/rockchip/rk3588s.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/rockchip/rk3588s.dtsi</a></div><div class='hunk'>@@ -347,6 +347,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	display_subsystem: display-subsystem {</div><div class='add'>+		compatible = "rockchip,display-subsystem";</div><div class='add'>+		ports = &lt;&amp;vop_out&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		optee: optee {</div><div class='ctx'> 			compatible = "linaro,optee-tz";</div><div class='hunk'>@@ -394,11 +399,6 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	display_subsystem: display-subsystem {</div><div class='del'>-		compatible = "rockchip,display-subsystem";</div><div class='del'>-		ports = &lt;&amp;vop_out&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='hunk'>@@ -436,6 +436,84 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpu: gpu@fb000000 {</div><div class='add'>+		compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";</div><div class='add'>+		reg = &lt;0x0 0xfb000000 0x0 0x200000&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_GPU&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_GPU&gt;, &lt;&amp;cru CLK_GPU_COREGROUP&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_GPU_STACKS&gt;;</div><div class='add'>+		clock-names = "core", "coregroup", "stacks";</div><div class='add'>+		dynamic-power-coefficient = &lt;2982&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+		operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_GPU&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		gpu_opp_table: opp-table {</div><div class='add'>+			compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+			opp-300000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;675000 675000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-400000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;675000 675000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-500000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;675000 675000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-600000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;675000 675000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-700000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;700000 700000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-800000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;750000 750000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-900000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;900000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;800000 800000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-1000000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;850000 850000 850000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_host0_xhci: usb@fc000000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dwc3", "snps,dwc3";</div><div class='add'>+		reg = &lt;0x0 0xfc000000 0x0 0x400000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REF_CLK_USB3OTG0&gt;, &lt;&amp;cru SUSPEND_CLK_USB3OTG0&gt;,</div><div class='add'>+			 &lt;&amp;cru ACLK_USB3OTG0&gt;;</div><div class='add'>+		clock-names = "ref_clk", "suspend_clk", "bus_clk";</div><div class='add'>+		dr_mode = "otg";</div><div class='add'>+		phys = &lt;&amp;u2phy0_otg&gt;, &lt;&amp;usbdp_phy0 PHY_TYPE_USB3&gt;;</div><div class='add'>+		phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+		phy_type = "utmi_wide";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_USB&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_USB3OTG0&gt;;</div><div class='add'>+		snps,dis_enblslpm_quirk;</div><div class='add'>+		snps,dis-u1-entry-quirk;</div><div class='add'>+		snps,dis-u2-entry-quirk;</div><div class='add'>+		snps,dis-u2-freeclk-exists-quirk;</div><div class='add'>+		snps,dis-del-phy-power-chg-quirk;</div><div class='add'>+		snps,dis-tx-ipgap-linecheck-quirk;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usb_host0_ehci: usb@fc800000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-ehci", "generic-ehci";</div><div class='ctx'> 		reg = &lt;0x0 0xfc800000 0x0 0x40000&gt;;</div><div class='hunk'>@@ -501,6 +579,30 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mmu600_pcie: iommu@fc900000 {</div><div class='add'>+		compatible = "arm,smmu-v3";</div><div class='add'>+		reg = &lt;0x0 0xfc900000 0x0 0x200000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmu600_php: iommu@fcb00000 {</div><div class='add'>+		compatible = "arm,smmu-v3";</div><div class='add'>+		reg = &lt;0x0 0xfcb00000 0x0 0x200000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu1grf: syscon@fd58a000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0x0 0xfd58a000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -516,12 +618,23 @@</div><div class='ctx'> 		reg = &lt;0x0 0xfd5a4000 0x0 0x2000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vo0_grf: syscon@fd5a6000 {</div><div class='add'>+		compatible = "rockchip,rk3588-vo-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5a6000 0x0 0x2000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_VO0GRF&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vo1_grf: syscon@fd5a8000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-vo-grf", "syscon";</div><div class='ctx'> 		reg = &lt;0x0 0xfd5a8000 0x0 0x100&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru PCLK_VO1GRF&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usb_grf: syscon@fd5ac000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usb-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5ac000 0x0 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	php_grf: syscon@fd5b0000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-php-grf", "syscon";</div><div class='ctx'> 		reg = &lt;0x0 0xfd5b0000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -537,22 +650,52 @@</div><div class='ctx'> 		reg = &lt;0x0 0xfd5c4000 0x0 0x100&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbdpphy0_grf: syscon@fd5c8000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5c8000 0x0 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2phy0_grf: syscon@fd5d0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";</div><div class='add'>+		reg = &lt;0x0 0xfd5d0000 0x0 0x4000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		u2phy0: usb2phy@0 {</div><div class='add'>+			compatible = "rockchip,rk3588-usb2phy";</div><div class='add'>+			reg = &lt;0x0 0x10&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_USB2PHY_HDPTXRXPHY_REF&gt;;</div><div class='add'>+			clock-names = "phyclk";</div><div class='add'>+			clock-output-names = "usb480m_phy0";</div><div class='add'>+			interrupts = &lt;GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_OTGPHY_U3_0&gt;, &lt;&amp;cru SRST_P_USB2PHY_U3_0_GRF0&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			u2phy0_otg: otg-port {</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usb2phy2_grf: syscon@fd5d8000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0x0 0xfd5d8000 0x0 0x4000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		u2phy2: usb2-phy@8000 {</div><div class='add'>+		u2phy2: usb2phy@8000 {</div><div class='ctx'> 			compatible = "rockchip,rk3588-usb2phy";</div><div class='ctx'> 			reg = &lt;0x8000 0x10&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-			resets = &lt;&amp;cru SRST_OTGPHY_U2_0&gt;, &lt;&amp;cru SRST_P_USB2PHY_U2_0_GRF0&gt;;</div><div class='del'>-			reset-names = "phy", "apb";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru CLK_USB2PHY_HDPTXRXPHY_REF&gt;;</div><div class='ctx'> 			clock-names = "phyclk";</div><div class='ctx'> 			clock-output-names = "usb480m_phy2";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_OTGPHY_U2_0&gt;, &lt;&amp;cru SRST_P_USB2PHY_U2_0_GRF0&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			u2phy2_host: host-port {</div><div class='hunk'>@@ -568,16 +711,16 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		u2phy3: usb2-phy@c000 {</div><div class='add'>+		u2phy3: usb2phy@c000 {</div><div class='ctx'> 			compatible = "rockchip,rk3588-usb2phy";</div><div class='ctx'> 			reg = &lt;0xc000 0x10&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-			resets = &lt;&amp;cru SRST_OTGPHY_U2_1&gt;, &lt;&amp;cru SRST_P_USB2PHY_U2_1_GRF0&gt;;</div><div class='del'>-			reset-names = "phy", "apb";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru CLK_USB2PHY_HDPTXRXPHY_REF&gt;;</div><div class='ctx'> 			clock-names = "phyclk";</div><div class='ctx'> 			clock-output-names = "usb480m_phy3";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_OTGPHY_U2_1&gt;, &lt;&amp;cru SRST_P_USB2PHY_U2_1_GRF0&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			u2phy3_host: host-port {</div><div class='hunk'>@@ -646,74 +789,6 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vop: vop@fdd90000 {</div><div class='del'>-		compatible = "rockchip,rk3588-vop";</div><div class='del'>-		reg = &lt;0x0 0xfdd90000 0x0 0x4200&gt;, &lt;0x0 0xfdd95000 0x0 0x1000&gt;;</div><div class='del'>-		reg-names = "vop", "gamma-lut";</div><div class='del'>-		interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru ACLK_VOP&gt;,</div><div class='del'>-			 &lt;&amp;cru HCLK_VOP&gt;,</div><div class='del'>-			 &lt;&amp;cru DCLK_VOP0&gt;,</div><div class='del'>-			 &lt;&amp;cru DCLK_VOP1&gt;,</div><div class='del'>-			 &lt;&amp;cru DCLK_VOP2&gt;,</div><div class='del'>-			 &lt;&amp;cru DCLK_VOP3&gt;,</div><div class='del'>-			 &lt;&amp;cru PCLK_VOP_ROOT&gt;;</div><div class='del'>-		clock-names = "aclk",</div><div class='del'>-			      "hclk",</div><div class='del'>-			      "dclk_vp0",</div><div class='del'>-			      "dclk_vp1",</div><div class='del'>-			      "dclk_vp2",</div><div class='del'>-			      "dclk_vp3",</div><div class='del'>-			      "pclk_vop";</div><div class='del'>-		iommus = &lt;&amp;vop_mmu&gt;;</div><div class='del'>-		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='del'>-		rockchip,vop-grf = &lt;&amp;vop_grf&gt;;</div><div class='del'>-		rockchip,vo1-grf = &lt;&amp;vo1_grf&gt;;</div><div class='del'>-		rockchip,pmu = &lt;&amp;pmu&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		vop_out: ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			vp0: port@0 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vp1: port@1 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vp2: port@2 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vp3: port@3 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vop_mmu: iommu@fdd97e00 {</div><div class='del'>-		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";</div><div class='del'>-		reg = &lt;0x0 0xfdd97e00 0x0 0x100&gt;, &lt;0x0 0xfdd97f00 0x0 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru ACLK_VOP&gt;, &lt;&amp;cru HCLK_VOP&gt;;</div><div class='del'>-		clock-names = "aclk", "iface";</div><div class='del'>-		#iommu-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	uart0: serial@fd890000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";</div><div class='ctx'> 		reg = &lt;0x0 0xfd890000 0x0 0x100&gt;;</div><div class='hunk'>@@ -1084,6 +1159,87 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	av1d: video-codec@fdc70000 {</div><div class='add'>+		compatible = "rockchip,rk3588-av1-vpu";</div><div class='add'>+		reg = &lt;0x0 0xfdc70000 0x0 0x800&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "vdpu";</div><div class='add'>+		assigned-clocks = &lt;&amp;cru ACLK_AV1&gt;, &lt;&amp;cru PCLK_AV1&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;400000000&gt;, &lt;400000000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_AV1&gt;, &lt;&amp;cru PCLK_AV1&gt;;</div><div class='add'>+		clock-names = "aclk", "hclk";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_AV1&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_AV1&gt;, &lt;&amp;cru SRST_P_AV1&gt;, &lt;&amp;cru SRST_A_AV1_BIU&gt;, &lt;&amp;cru SRST_P_AV1_BIU&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vop: vop@fdd90000 {</div><div class='add'>+		compatible = "rockchip,rk3588-vop";</div><div class='add'>+		reg = &lt;0x0 0xfdd90000 0x0 0x4200&gt;, &lt;0x0 0xfdd95000 0x0 0x1000&gt;;</div><div class='add'>+		reg-names = "vop", "gamma-lut";</div><div class='add'>+		interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_VOP&gt;,</div><div class='add'>+			 &lt;&amp;cru HCLK_VOP&gt;,</div><div class='add'>+			 &lt;&amp;cru DCLK_VOP0&gt;,</div><div class='add'>+			 &lt;&amp;cru DCLK_VOP1&gt;,</div><div class='add'>+			 &lt;&amp;cru DCLK_VOP2&gt;,</div><div class='add'>+			 &lt;&amp;cru DCLK_VOP3&gt;,</div><div class='add'>+			 &lt;&amp;cru PCLK_VOP_ROOT&gt;;</div><div class='add'>+		clock-names = "aclk",</div><div class='add'>+			      "hclk",</div><div class='add'>+			      "dclk_vp0",</div><div class='add'>+			      "dclk_vp1",</div><div class='add'>+			      "dclk_vp2",</div><div class='add'>+			      "dclk_vp3",</div><div class='add'>+			      "pclk_vop";</div><div class='add'>+		iommus = &lt;&amp;vop_mmu&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='add'>+		rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='add'>+		rockchip,vop-grf = &lt;&amp;vop_grf&gt;;</div><div class='add'>+		rockchip,vo1-grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+		rockchip,pmu = &lt;&amp;pmu&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		vop_out: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			vp0: port@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vp1: port@1 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vp2: port@2 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vp3: port@3 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vop_mmu: iommu@fdd97e00 {</div><div class='add'>+		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";</div><div class='add'>+		reg = &lt;0x0 0xfdd97e00 0x0 0x100&gt;, &lt;0x0 0xfdd97f00 0x0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_VOP&gt;, &lt;&amp;cru HCLK_VOP&gt;;</div><div class='add'>+		clock-names = "aclk", "iface";</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s4_8ch: i2s@fddc0000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfddc0000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -1375,6 +1531,16 @@</div><div class='ctx'> 		reg = &lt;0x0 0xfdf82200 0x0 0x20&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dfi: dfi@fe060000 {</div><div class='add'>+		reg = &lt;0x00 0xfe060000 0x00 0x10000&gt;;</div><div class='add'>+		compatible = "rockchip,rk3588-dfi";</div><div class='add'>+		interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		rockchip,pmu = &lt;&amp;pmu1grf&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie2x1l1: pcie@fe180000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";</div><div class='ctx'> 		bus-range = &lt;0x30 0x3f&gt;;</div><div class='hunk'>@@ -1477,16 +1643,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dfi: dfi@fe060000 {</div><div class='del'>-		reg = &lt;0x00 0xfe060000 0x00 0x10000&gt;;</div><div class='del'>-		compatible = "rockchip,rk3588-dfi";</div><div class='del'>-		interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-		rockchip,pmu = &lt;&amp;pmu1grf&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gmac1: ethernet@fe1c0000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";</div><div class='ctx'> 		reg = &lt;0x0 0xfe1c0000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -2380,6 +2536,28 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbdp_phy0: phy@fed80000 {</div><div class='add'>+		compatible = "rockchip,rk3588-usbdp-phy";</div><div class='add'>+		reg = &lt;0x0 0xfed80000 0x0 0x10000&gt;;</div><div class='add'>+		#phy-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_USBDPPHY_MIPIDCPPHY_REF&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_USBDP_PHY0_IMMORTAL&gt;,</div><div class='add'>+			 &lt;&amp;cru PCLK_USBDPPHY0&gt;,</div><div class='add'>+			 &lt;&amp;u2phy0&gt;;</div><div class='add'>+		clock-names = "refclk", "immortal", "pclk", "utmi";</div><div class='add'>+		resets = &lt;&amp;cru SRST_USBDP_COMBO_PHY0_INIT&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_USBDP_COMBO_PHY0_CMN&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_USBDP_COMBO_PHY0_LANE&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_USBDP_COMBO_PHY0_PCS&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_P_USBDPPHY0&gt;;</div><div class='add'>+		reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";</div><div class='add'>+		rockchip,u2phy-grf = &lt;&amp;usb2phy0_grf&gt;;</div><div class='add'>+		rockchip,usb-grf = &lt;&amp;usb_grf&gt;;</div><div class='add'>+		rockchip,usbdpphy-grf = &lt;&amp;usbdpphy0_grf&gt;;</div><div class='add'>+		rockchip,vo-grf = &lt;&amp;vo0_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	combphy0_ps: phy@fee00000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-naneng-combphy";</div><div class='ctx'> 		reg = &lt;0x0 0xfee00000 0x0 0x100&gt;;</div><div class='hunk'>@@ -2487,19 +2665,6 @@</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	av1d: video-codec@fdc70000 {</div><div class='del'>-		compatible = "rockchip,rk3588-av1-vpu";</div><div class='del'>-		reg = &lt;0x0 0xfdc70000 0x0 0x800&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-		interrupt-names = "vdpu";</div><div class='del'>-		assigned-clocks = &lt;&amp;cru ACLK_AV1&gt;, &lt;&amp;cru PCLK_AV1&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;400000000&gt;, &lt;400000000&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru ACLK_AV1&gt;, &lt;&amp;cru PCLK_AV1&gt;;</div><div class='del'>-		clock-names = "aclk", "hclk";</div><div class='del'>-		power-domains = &lt;&amp;power RK3588_PD_AV1&gt;;</div><div class='del'>-		resets = &lt;&amp;cru SRST_A_AV1&gt;, &lt;&amp;cru SRST_P_AV1&gt;, &lt;&amp;cru SRST_A_AV1_BIU&gt;, &lt;&amp;cru SRST_P_AV1_BIU&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #include "rk3588s-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts<br/>index da44a15a8adf..a251c4343548 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts</a></div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	tas5707a@1d {</div><div class='add'>+	audio-codec@1d {</div><div class='ctx'> 		compatible = "ti,tas5711";</div><div class='ctx'> 		reg = &lt;0x1d&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio UNIPHIER_GPIO_PORT(23, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		PVDD_C-supply = &lt;&amp;amp_vcc_reg&gt;;</div><div class='ctx'> 		PVDD_D-supply = &lt;&amp;amp_vcc_reg&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			tas_speaker: endpoint {</div><div class='ctx'> 				dai-format = "i2s";</div><div class='ctx'> 				remote-endpoint = &lt;&amp;i2s_hpcmout1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts<br/>index a01579cb3b79..79f6db2455c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts</a></div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	tas5707@1b {</div><div class='add'>+	audio-codec@1b {</div><div class='ctx'> 		compatible = "ti,tas5711";</div><div class='ctx'> 		reg = &lt;0x1b&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio UNIPHIER_GPIO_PORT(0, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		PVDD_C-supply = &lt;&amp;amp_vcc_reg&gt;;</div><div class='ctx'> 		PVDD_D-supply = &lt;&amp;amp_vcc_reg&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			tas_speaker: endpoint {</div><div class='ctx'> 				dai-format = "i2s";</div><div class='ctx'> 				remote-endpoint = &lt;&amp;i2s_hpcmout1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi<br/>index e27eb3ed1d47..31952d361a8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sc9860.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sc9860.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sc9860.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/sprd/sc9860.dtsi</a></div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	idle-states{</div><div class='add'>+	idle-states {</div><div class='ctx'> 		entry-method = "psci";</div><div class='ctx'> </div><div class='ctx'> 		CORE_PD: core_pd {</div><div class='hunk'>@@ -135,18 +135,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gic: interrupt-controller@12001000 {</div><div class='del'>-		compatible = "arm,gic-400";</div><div class='del'>-		reg = &lt;0 0x12001000 0 0x1000&gt;,</div><div class='del'>-		      &lt;0 0x12002000 0 0x2000&gt;,</div><div class='del'>-		      &lt;0 0x12004000 0 0x2000&gt;,</div><div class='del'>-		      &lt;0 0x12006000 0 0x2000&gt;;</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)</div><div class='del'>-					| IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	psci {</div><div class='ctx'> 		compatible = "arm,psci-0.2";</div><div class='ctx'> 		method = "smc";</div><div class='hunk'>@@ -165,7 +153,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -185,6 +173,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='add'>+		gic: interrupt-controller@12001000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0 0x12001000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x12002000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x12004000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x12006000 0 0x2000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)</div><div class='add'>+						| IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmu_gate: pmu-gate {</div><div class='ctx'> 			compatible = "sprd,sc9860-pmu-gate";</div><div class='ctx'> 			sprd,syscon = &lt;&amp;pmu_regs&gt;; /* 0x402b0000 */</div><div class='hunk'>@@ -207,7 +207,7 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		aon_prediv: aon-prediv {</div><div class='add'>+		aon_prediv: aon-prediv@402d0000 {</div><div class='ctx'> 			compatible = "sprd,sc9860-aon-prediv";</div><div class='ctx'> 			reg = &lt;0 0x402d0000 0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ext_26m&gt;, &lt;&amp;pll 0&gt;,</div><div class='hunk'>@@ -684,33 +684,5 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		gpio-keys {</div><div class='del'>-			compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-			key-volumedown {</div><div class='del'>-				label = "Volume Down Key";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-				gpios = &lt;&amp;eic_debounce 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-				debounce-interval = &lt;2&gt;;</div><div class='del'>-				wakeup-source;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			key-volumeup {</div><div class='del'>-				label = "Volume Up Key";</div><div class='del'>-				linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-				gpios = &lt;&amp;pmic_eic 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				debounce-interval = &lt;2&gt;;</div><div class='del'>-				wakeup-source;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			key-power {</div><div class='del'>-				label = "Power Key";</div><div class='del'>-				linux,code = &lt;KEY_POWER&gt;;</div><div class='del'>-				gpios = &lt;&amp;pmic_eic 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				debounce-interval = &lt;2&gt;;</div><div class='del'>-				wakeup-source;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sc9863a.dtsi b/arch/arm64/boot/dts/sprd/sc9863a.dtsi<br/>index 22d81ace740a..53e5b77d70b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sc9863a.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sc9863a.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sc9863a.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/sprd/sc9863a.dtsi</a></div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sharkl3.dtsi b/arch/arm64/boot/dts/sprd/sharkl3.dtsi<br/>index 206a4afdab1c..9b4ee0bdd69f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sharkl3.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sharkl3.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sharkl3.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/sprd/sharkl3.dtsi</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x20e00000 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-			apahb_gate: apahb-gate {</div><div class='add'>+			apahb_gate: apahb-gate@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-apahb-gate";</div><div class='ctx'> 				reg = &lt;0x0 0x1020&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x402b0000 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-			pmu_gate: pmu-gate {</div><div class='add'>+			pmu_gate: pmu-gate@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-pmu-gate";</div><div class='ctx'> 				reg = &lt;0 0x1200&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;ext_26m&gt;;</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x402e0000 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-			aonapb_gate: aonapb-gate {</div><div class='add'>+			aonapb_gate: aonapb-gate@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-aonapb-gate";</div><div class='ctx'> 				reg = &lt;0 0x1100&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x40353000 0x3000&gt;;</div><div class='ctx'> </div><div class='del'>-			pll: pll {</div><div class='add'>+			pll: pll@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-pll";</div><div class='ctx'> 				reg = &lt;0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;ext_26m&gt;;</div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x40359000 0x3000&gt;;</div><div class='ctx'> </div><div class='del'>-			mpll: mpll {</div><div class='add'>+			mpll: mpll@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-mpll";</div><div class='ctx'> 				reg = &lt;0 0x100&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x4035c000 0x3000&gt;;</div><div class='ctx'> </div><div class='del'>-			rpll: rpll {</div><div class='add'>+			rpll: rpll@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-rpll";</div><div class='ctx'> 				reg = &lt;0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;ext_26m&gt;;</div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x40363000 0x3000&gt;;</div><div class='ctx'> </div><div class='del'>-			dpll: dpll {</div><div class='add'>+			dpll: dpll@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-dpll";</div><div class='ctx'> 				reg = &lt;0 0x100&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -135,7 +135,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x60800000 0x3000&gt;;</div><div class='ctx'> </div><div class='del'>-			mm_gate: mm-gate {</div><div class='add'>+			mm_gate: mm-gate@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-mm-gate";</div><div class='ctx'> 				reg = &lt;0 0x1100&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -150,7 +150,7 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0 0x71300000 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-			apapb_gate: apapb-gate {</div><div class='add'>+			apapb_gate: apapb-gate@0 {</div><div class='ctx'> 				compatible = "sprd,sc9863a-apapb-gate";</div><div class='ctx'> 				reg = &lt;0 0x1000&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;ext_26m&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts b/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts<br/>index 6b95fd94cee3..1ce3cbbd9668 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/sp9860g-1h10.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/sprd/sp9860g-1h10.dts</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		spi0 = &amp;adi_bus;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory{</div><div class='add'>+	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x80000000 0 0x60000000&gt;,</div><div class='ctx'> 		      &lt;0x1 0x80000000 0 0x60000000&gt;;</div><div class='hunk'>@@ -34,6 +34,34 @@</div><div class='ctx'> 		stdout-path = "serial1:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-volumedown {</div><div class='add'>+			label = "Volume Down Key";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;eic_debounce 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;2&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volumeup {</div><div class='add'>+			label = "Volume Up Key";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;pmic_eic 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			debounce-interval = &lt;2&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power Key";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;pmic_eic 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			debounce-interval = &lt;2&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi<br/>index fece49704b5c..7068bfd2f4c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/whale2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/sprd/whale2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/sprd/whale2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/sprd/whale2.dtsi</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 			reg = &lt;0 0x70b00000 0 0x40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ap-apb {</div><div class='add'>+		ap-apb@70000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi<br/>index 66791a974f8f..7a82896dcbf6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi</a></div><div class='hunk'>@@ -6,6 +6,23 @@</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/stm32-pinfunc.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	i2c2_pins_a: i2c2-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 5, AF9)&gt;, /* I2C2_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 4, AF9)&gt;; /* I2C2_SDA */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_sleep_pins_a: i2c2-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 5, ANALOG)&gt;, /* I2C2_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 4, ANALOG)&gt;; /* I2C2_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('E', 4, AF10)&gt;, /* SDMMC1_D0 */</div><div class='hunk'>@@ -60,6 +77,28 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spi3_pins_a: spi3-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 7, AF1)&gt;, /* SPI3_SCK */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 8, AF1)&gt;; /* SPI3_MOSI */</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 10, AF1)&gt;; /* SPI3_MISO */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_sleep_pins_a: spi3-sleep-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 7, ANALOG)&gt;, /* SPI3_SCK */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 8, ANALOG)&gt;, /* SPI3_MOSI */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 10, ANALOG)&gt;; /* SPI3_MISO */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usart2_pins_a: usart2-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 4, AF6)&gt;; /* USART2_TX */</div><div class='hunk'>@@ -90,3 +129,46 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_z {</div><div class='add'>+	i2c8_pins_a: i2c8-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 4, AF8)&gt;, /* I2C8_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('Z', 3, AF8)&gt;; /* I2C8_SDA */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c8_sleep_pins_a: i2c8-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 4, ANALOG)&gt;, /* I2C8_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('Z', 3, ANALOG)&gt;; /* I2C8_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_z {</div><div class='add'>+	spi8_pins_a: spi8-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 2, AF3)&gt;, /* SPI8_SCK */</div><div class='add'>+				 &lt;STM32_PINMUX('Z', 0, AF3)&gt;; /* SPI8_MOSI */</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 1, AF3)&gt;; /* SPI8_MISO */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_sleep_pins_a: spi8-sleep-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 2, ANALOG)&gt;, /* SPI8_SCK */</div><div class='add'>+				 &lt;STM32_PINMUX('Z', 0, ANALOG)&gt;, /* SPI8_MOSI */</div><div class='add'>+				 &lt;STM32_PINMUX('Z', 1, ANALOG)&gt;; /* SPI8_MISO */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi<br/>index 5dd4f3580a60..dcd0656d67a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp251.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp251.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a></div><div class='hunk'>@@ -3,7 +3,9 @@</div><div class='ctx'>  * Copyright (C) STMicroelectronics 2023 - All Rights Reserved</div><div class='ctx'>  * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;dt-bindings/clock/st,stm32mp25-rcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/st,stm32mp25-rcc.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -35,34 +37,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='del'>-		ck_flexgen_08: ck-flexgen-08 {</div><div class='add'>+		clk_dsi_txbyte: txbyteclk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ck_flexgen_51: ck-flexgen-51 {</div><div class='add'>+		clk_rcbsec: clk-rcbsec {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ck_icn_ls_mcu: ck-icn-ls-mcu {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ck_icn_p_vdec: ck-icn-p-vdec {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ck_icn_p_venc: ck-icn-p-venc {</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			clock-frequency = &lt;64000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -109,10 +93,10 @@</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 		always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -123,18 +107,220 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 		ranges = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='ctx'> </div><div class='del'>-		rifsc: rifsc-bus@42080000 {</div><div class='del'>-			compatible = "simple-bus";</div><div class='add'>+		rifsc: bus@42080000 {</div><div class='add'>+			compatible = "st,stm32mp25-rifsc", "simple-bus";</div><div class='ctx'> 			reg = &lt;0x42080000 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='add'>+			#access-controller-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			spi2: spi@400b0000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x400b0000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI2&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 23&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@400c0000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x400c0000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI3&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			usart2: serial@400e0000 {</div><div class='ctx'> 				compatible = "st,stm32h7-uart";</div><div class='ctx'> 				reg = &lt;0x400e0000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_flexgen_08&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_USART2&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@40120000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40120000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C1_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 41&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@40130000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40130000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C2&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C2_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 42&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@40140000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40140000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C3&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C3_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 43&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@40150000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40150000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C4&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C4_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 44&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@40160000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40160000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C5&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C5_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 45&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@40170000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40170000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C6&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C6_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 46&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7: i2c@40180000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40180000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C7&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C7_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 47&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@40230000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40230000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 22&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@40240000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40240000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI4&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 25&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@40280000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40280000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI5&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 26&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi6: spi@40350000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40350000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI6&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI6_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi7: spi@40360000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40360000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI7&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI7_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 28&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi8: spi@46020000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x46020000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI8&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI8_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 29&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@46040000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x46040000 0x400&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C8&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C8_R&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 48&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -143,11 +329,13 @@</div><div class='ctx'> 				arm,primecell-periphid = &lt;0x00353180&gt;;</div><div class='ctx'> 				reg = &lt;0x48220000 0x400&gt;, &lt;0x44230400 0x8&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_flexgen_51&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SDMMC1 &gt;;</div><div class='ctx'> 				clock-names = "apb_pclk";</div><div class='add'>+				resets = &lt;&amp;rcc SDMMC1_R&gt;;</div><div class='ctx'> 				cap-sd-highspeed;</div><div class='ctx'> 				cap-mmc-highspeed;</div><div class='ctx'> 				max-frequency = &lt;120000000&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 76&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -168,6 +356,186 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rcc: clock-controller@44200000 {</div><div class='add'>+			compatible = "st,stm32mp25-rcc";</div><div class='add'>+			reg = &lt;0x44200000 0x10000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_HSE&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_HSI&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_MSI&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_LSE&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_LSI&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_HSE_DIV2&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_HS_MCU&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_LS_MCU&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_SDMMC&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_DDR&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_DISPLAY&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_HSL&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_NIC&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_VID&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_07&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_08&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_09&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_10&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_11&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_12&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_13&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_14&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_15&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_16&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_17&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_18&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_19&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_20&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_21&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_22&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_23&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_24&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_25&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_26&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_27&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_28&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_29&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_30&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_31&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_32&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_33&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_34&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_35&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_36&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_37&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_38&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_39&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_40&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_41&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_42&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_43&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_44&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_45&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_46&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_47&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_48&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_49&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_50&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_51&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_52&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_53&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_54&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_55&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_56&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_57&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_58&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_59&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_60&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_61&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_62&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_63&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB1&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB2&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB3&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB4&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APBDBG&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_TIMG1&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_TIMG2&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_PLL3&gt;,</div><div class='add'>+				&lt;&amp;clk_dsi_txbyte&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		exti1: interrupt-controller@44220000 {</div><div class='add'>+			compatible = "st,stm32mp1-exti", "syscon";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x44220000 0x400&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_0 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_10 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 0   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 1   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_20 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_30 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_40 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_50 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_60 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 10  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_70 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_80 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		syscfg: syscon@44230000 {</div><div class='ctx'> 			compatible = "st,stm32mp25-syscfg", "syscon";</div><div class='ctx'> 			reg = &lt;0x44230000 0x10000&gt;;</div><div class='hunk'>@@ -178,6 +546,8 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "st,stm32mp257-pinctrl";</div><div class='ctx'> 			ranges = &lt;0 0x44240000 0xa0400&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;exti1&gt;;</div><div class='add'>+			st,syscfg = &lt;&amp;exti1 0x60 0xff&gt;;</div><div class='ctx'> 			pins-are-numbered;</div><div class='ctx'> </div><div class='ctx'> 			gpioa: gpio@44240000 {</div><div class='hunk'>@@ -186,7 +556,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOA&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOA";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -197,7 +567,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x10000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOB&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOB";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -208,7 +578,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x20000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOC&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOC";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -219,7 +589,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x30000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOD&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOD";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -230,7 +600,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x40000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOE&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOE";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -241,7 +611,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x50000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOF&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOF";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -252,7 +622,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x60000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOG&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOG";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -263,7 +633,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x70000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOH&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOH";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -274,7 +644,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x80000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOI&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOI";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -285,7 +655,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x90000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOJ&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOJ";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -296,7 +666,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0xa0000 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOK&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOK";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -307,6 +677,8 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "st,stm32mp257-z-pinctrl";</div><div class='ctx'> 			ranges = &lt;0 0x46200000 0x400&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;exti1&gt;;</div><div class='add'>+			st,syscfg = &lt;&amp;exti1 0x60 0xff&gt;;</div><div class='ctx'> 			pins-are-numbered;</div><div class='ctx'> </div><div class='ctx'> 			gpioz: gpio@46200000 {</div><div class='hunk'>@@ -315,12 +687,91 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0 0x400&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOZ&gt;;</div><div class='ctx'> 				st,bank-name = "GPIOZ";</div><div class='ctx'> 				st,bank-ioport = &lt;11&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		exti2: interrupt-controller@46230000 {</div><div class='add'>+			compatible = "st,stm32mp1-exti", "syscon";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x46230000 0x400&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;intc GIC_SPI 17  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_0 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 18  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 19  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 20  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 21  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 22  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 23  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 24  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 25  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 26  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 27  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_10 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 28  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 29  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 30  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 31  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 32  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 12  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 13  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_20 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 14  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 15  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_30 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_40 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 11  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 5   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 4   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 6   IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_50 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 7   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 2   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 3   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_60 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;;	/* EXTI_70 */</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp253.dtsi b/arch/arm64/boot/dts/st/stm32mp253.dtsi<br/>index af48e82efe8a..029f88981961 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp253.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp253.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp253.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/st/stm32mp253.dtsi</a></div><div class='hunk'>@@ -20,4 +20,11 @@</div><div class='ctx'> 			     &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi<br/>index 17f197c5b22b..f689b47c5010 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp255.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp255.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp255.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/st/stm32mp255.dtsi</a></div><div class='hunk'>@@ -5,22 +5,21 @@</div><div class='ctx'>  */</div><div class='ctx'> #include "stm32mp253.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	soc@0 {</div><div class='del'>-		rifsc: rifsc-bus@42080000 {</div><div class='del'>-			vdec: vdec@480d0000 {</div><div class='del'>-				compatible = "st,stm32mp25-vdec";</div><div class='del'>-				reg = &lt;0x480d0000 0x3c8&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_p_vdec&gt;;</div><div class='del'>-			};</div><div class='add'>+&amp;rifsc {</div><div class='add'>+	vdec: vdec@480d0000 {</div><div class='add'>+		compatible = "st,stm32mp25-vdec";</div><div class='add'>+		reg = &lt;0x480d0000 0x3c8&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CK_BUS_VDEC&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;rifsc 89&gt;;</div><div class='ctx'> </div><div class='del'>-			venc: venc@480e0000 {</div><div class='del'>-				compatible = "st,stm32mp25-venc";</div><div class='del'>-				reg = &lt;0x480e0000 0x800&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;ck_icn_ls_mcu&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='add'>+</div><div class='add'>+	venc: venc@480e0000 {</div><div class='add'>+		compatible = "st,stm32mp25-venc";</div><div class='add'>+		reg = &lt;0x480e0000 0x800&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CK_BUS_VENC&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;rifsc 90&gt;;</div><div class='add'>+	};</div><div class='add'>+};
\ No newline at end of file</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts<br/>index b2d3afb15758..27b7360e5dba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/st/stm32mp257f-ev1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/st/stm32mp257f-ev1.dts</a></div><div class='hunk'>@@ -55,6 +55,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c2_sleep_pins_a&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;100&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;13&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c8_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c8_sleep_pins_a&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;57&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;7&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdmmc1 {</div><div class='ctx'> 	pinctrl-names = "default", "opendrain", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdmmc1_b4_pins_a&gt;;</div><div class='hunk'>@@ -68,6 +88,20 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;spi3 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi3_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;spi3_sleep_pins_a&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi8 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi8_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;spi8_sleep_pins_a&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usart2 {</div><div class='ctx'> 	pinctrl-names = "default", "idle", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;usart2_pins_a&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi<br/>index 53d616c3cfed..71e4bfcc9e81 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/synaptics/berlin4ct.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/synaptics/berlin4ct.dtsi</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi<br/>index 047a83cee603..690b4ed9c29b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/tesla/fsd.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/tesla/fsd.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/tesla/fsd.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/tesla/fsd.dtsi</a></div><div class='hunk'>@@ -304,7 +304,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	arm-pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile<br/>index 9a722c2473fb..2c327cc320cf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/Makefile</a></div><div class='hunk'>@@ -48,6 +48,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-pcie.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-usb3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-gpio-fan.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo</div><div class='hunk'>@@ -131,6 +132,8 @@ k3-am62p5-sk-csi2-tevi-ov5640-dtbs := k3-am62p5-sk.dtb \</div><div class='ctx'> 	k3-am62x-sk-csi2-tevi-ov5640.dtbo</div><div class='ctx'> k3-am642-evm-icssg1-dualemac-dtbs := \</div><div class='ctx'> 	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo</div><div class='add'>+k3-am642-phyboard-electra-gpio-fan-dtbs := \</div><div class='add'>+	k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-gpio-fan.dtbo</div><div class='ctx'> k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo</div><div class='ctx'> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \</div><div class='hunk'>@@ -161,19 +164,21 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \</div><div class='ctx'> 	k3-am642-evm-icssg1-dualemac.dtb \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \</div><div class='del'>-	k3-am68-sk-base-board-csi2-dual-imx219-dtbs \</div><div class='del'>-	k3-am69-sk-csi2-dual-imx219-dtbs \</div><div class='add'>+	k3-am68-sk-base-board-csi2-dual-imx219.dtb \</div><div class='add'>+	k3-am69-sk-csi2-dual-imx219.dtb \</div><div class='ctx'> 	k3-j721e-evm-pcie0-ep.dtb \</div><div class='del'>-	k3-j721e-sk-csi2-dual-imx219-dtbs \</div><div class='add'>+	k3-j721e-sk-csi2-dual-imx219.dtb \</div><div class='ctx'> 	k3-j721s2-evm-pcie1-ep.dtb</div><div class='ctx'> </div><div class='ctx'> # Enable support for device-tree overlays</div><div class='ctx'> DTC_FLAGS_k3-am625-beagleplay += -@</div><div class='add'>+DTC_FLAGS_k3-am625-phyboard-lyra-rdk += -@</div><div class='ctx'> DTC_FLAGS_k3-am625-sk += -@</div><div class='ctx'> DTC_FLAGS_k3-am62-lp-sk += -@</div><div class='ctx'> DTC_FLAGS_k3-am62a7-sk += -@</div><div class='ctx'> DTC_FLAGS_k3-am62p5-sk += -@</div><div class='ctx'> DTC_FLAGS_k3-am642-evm += -@</div><div class='add'>+DTC_FLAGS_k3-am642-phyboard-electra-rdk += -@</div><div class='ctx'> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@</div><div class='ctx'> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@</div><div class='ctx'> DTC_FLAGS_k3-am68-sk-base-board += -@</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts<br/>index c4149059a4c5..9a17bd3e59c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts</a></div><div class='hunk'>@@ -166,7 +166,6 @@</div><div class='ctx'> </div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		ti,power-button;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			buck1_reg: buck1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi<br/>index e9cffca073ef..448a59dc53a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-main.dtsi</a></div><div class='hunk'>@@ -619,10 +619,11 @@</div><div class='ctx'> </div><div class='ctx'> 	usbss0: dwc3-usb@f900000 {</div><div class='ctx'> 		compatible = "ti,am62-usb";</div><div class='del'>-		reg = &lt;0x00 0x0f900000 0x00 0x800&gt;;</div><div class='add'>+		reg = &lt;0x00 0x0f900000 0x00 0x800&gt;,</div><div class='add'>+		      &lt;0x00 0x0f908000 0x00 0x400&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 161 3&gt;;</div><div class='ctx'> 		clock-names = "ref";</div><div class='del'>-		ti,syscon-phy-pll-refclk = &lt;&amp;wkup_conf 0x4008&gt;;</div><div class='add'>+		ti,syscon-phy-pll-refclk = &lt;&amp;usb0_phy_ctrl 0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 178 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -644,10 +645,11 @@</div><div class='ctx'> </div><div class='ctx'> 	usbss1: dwc3-usb@f910000 {</div><div class='ctx'> 		compatible = "ti,am62-usb";</div><div class='del'>-		reg = &lt;0x00 0x0f910000 0x00 0x800&gt;;</div><div class='add'>+		reg = &lt;0x00 0x0f910000 0x00 0x800&gt;,</div><div class='add'>+		      &lt;0x00 0x0f918000 0x00 0x400&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 162 3&gt;;</div><div class='ctx'> 		clock-names = "ref";</div><div class='del'>-		ti,syscon-phy-pll-refclk = &lt;&amp;wkup_conf 0x4018&gt;;</div><div class='add'>+		ti,syscon-phy-pll-refclk = &lt;&amp;usb1_phy_ctrl 0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 179 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi<br/>index 6c4cec8728e4..e8f4d136e5df 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='ctx'> 		simple-audio-card,name = "verdin-wm8904";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,routing =</div><div class='ctx'> 			"Headphone Jack", "HPOUTL",</div><div class='ctx'> 			"Headphone Jack", "HPOUTR",</div><div class='hunk'>@@ -35,7 +36,6 @@</div><div class='ctx'> 			"Line", "Line In Jack";</div><div class='ctx'> </div><div class='ctx'> 		codec_dai: simple-audio-card,codec {</div><div class='del'>-			clocks = &lt;&amp;audio_refclk1&gt;;</div><div class='ctx'> 			sound-dai = &lt;&amp;wm8904_1a&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +43,15 @@</div><div class='ctx'> 			sound-dai = &lt;&amp;mcasp0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usb_hub: regulator-usb-hub {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "HUB_PWR_EN";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin ETHs */</div><div class='hunk'>@@ -160,7 +169,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='ctx'> 		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='ctx'> 		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_pcie_1_reset&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin I2C_3_HDMI */</div><div class='hunk'>@@ -183,6 +193,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Do not force CTRL_SLEEP_MOCI# always enabled */</div><div class='add'>+&amp;reg_force_sleep_moci {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin SD_1 */</div><div class='ctx'> &amp;sdhci1 {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -203,7 +218,15 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	usb-hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_usb_hub&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin CTRL_WAKE1_MICO# */</div><div class='hunk'>@@ -211,6 +234,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin UART_2 */</div><div class='ctx'> &amp;wkup_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi<br/>index be62648e7818..74eec1a1abca 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi</a></div><div class='hunk'>@@ -181,7 +181,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='ctx'> 		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='ctx'> 		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_pcie_1_reset&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin I2C_3_HDMI */</div><div class='hunk'>@@ -232,6 +233,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin UART_2 */</div><div class='ctx'> &amp;wkup_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi<br/>index 77b1beb638ad..754216d8ac14 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi</a></div><div class='hunk'>@@ -81,10 +81,10 @@</div><div class='ctx'> &amp;main_gpio0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_5&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_6&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_7&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin I2C_1 */</div><div class='hunk'>@@ -149,6 +149,15 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_pcie_1_reset&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin I2C_3_HDMI */</div><div class='ctx'> &amp;mcu_i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -192,6 +201,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin UART_2 */</div><div class='ctx'> &amp;wkup_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi<br/>index 997dfafd27eb..7372d392ec8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi</a></div><div class='hunk'>@@ -159,7 +159,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='ctx'> 		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='ctx'> 		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='del'>-		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_pcie_1_reset&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin I2C_3_HDMI */</div><div class='hunk'>@@ -205,6 +206,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Verdin UART_2 */</div><div class='ctx'> &amp;wkup_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi<br/>index e8d8857ad51f..2038c5e04639 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi</a></div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> </div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='del'>-		reg = &lt;0x00000000 0x80000000 0x00000000 0x40000000&gt;; /* 1G RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;; /* 2G RAM */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	opp-table {</div><div class='hunk'>@@ -138,6 +138,22 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * By default we enable CTRL_SLEEP_MOCI#, this is required to have</div><div class='add'>+	 * peripherals on the carrier board powered.</div><div class='add'>+	 * If more granularity or power saving is required this can be disabled</div><div class='add'>+	 * in the carrier board device tree files.</div><div class='add'>+	 */</div><div class='add'>+	reg_force_sleep_moci: regulator-force-sleep-moci {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpio = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "CTRL_SLEEP_MOCI#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* Verdin SD_1 Power Supply */</div><div class='ctx'> 	reg_sdhc1_vmmc: regulator-sdhci1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -457,6 +473,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* Verdin SD_1_CD# as GPIO */</div><div class='add'>+	pinctrl_sd1_cd_gpio: main-gpio1-48-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 7) /* (D17) MMC1_SDCD.GPIO1_48 */ /* SODIMM 84 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* Verdin DSI_1_INT# (pulled-up as active-low) */</div><div class='ctx'> 	pinctrl_dsi1_int: main-gpio1-49-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='hunk'>@@ -571,7 +594,6 @@</div><div class='ctx'> 			AM62X_IOPAD(0x22c, PIN_INPUT,        0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */</div><div class='ctx'> 			AM62X_IOPAD(0x228, PIN_INPUT,        0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */</div><div class='ctx'> 			AM62X_IOPAD(0x224, PIN_INPUT,        0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */</div><div class='del'>-			AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -979,14 +1001,6 @@</div><div class='ctx'> 		"",</div><div class='ctx'> 		"",</div><div class='ctx'> 		"";</div><div class='del'>-</div><div class='del'>-	verdin_ctrl_sleep_moci: ctrl-sleep-moci-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='del'>-		gpios = &lt;31 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		line-name = "CTRL_SLEEP_MOCI#";</div><div class='del'>-		output-high;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio1 {</div><div class='hunk'>@@ -1407,6 +1421,15 @@</div><div class='ctx'> 		"",</div><div class='ctx'> 		"",</div><div class='ctx'> 		"";</div><div class='add'>+</div><div class='add'>+	verdin_pcie_1_reset_hog: pcie-1-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		/* Verdin PCIE_1_RESET# (SODIMM 244) */</div><div class='add'>+		gpios = &lt;0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		line-name = "PCIE_1_RESET#";</div><div class='add'>+		output-low;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin CAN_2 */</div><div class='hunk'>@@ -1441,10 +1464,12 @@</div><div class='ctx'> /* Verdin SD_1 */</div><div class='ctx'> &amp;sdhci1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_sdhci1&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sdhci1&gt;, &lt;&amp;pinctrl_sd1_cd_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;main_gpio1 48 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_sdhc1_vmmc&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;reg_sdhc1_vqmmc&gt;;</div><div class='add'>+	ti,fails-without-test-cd;</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi<br/>index 23ce1bfda8d6..66ddf2dc51af 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi</a></div><div class='hunk'>@@ -21,6 +21,16 @@</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		usb0_phy_ctrl: syscon@4008 {</div><div class='add'>+			compatible = "ti,am62-usb-phy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4008 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1_phy_ctrl: syscon@4018 {</div><div class='add'>+			compatible = "ti,am62-usb-phy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4018 0x4&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	target-module@2b300050 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts<br/>index a34e0df2ab86..18e3070a8683 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts</a></div><div class='hunk'>@@ -82,6 +82,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_en_pins_default&gt;;</div><div class='add'>+		/* Internal power on time(Figure 8-3) * 2 */</div><div class='add'>+		post-power-on-delay-ms = &lt;10&gt;;</div><div class='add'>+		/* Re-enable time(Figure 8-2) + 20uS */</div><div class='add'>+		power-off-delay-us = &lt;80&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;main_gpio0 38 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vsys_5v0: regulator-1 {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -104,20 +115,6 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wlan_en: regulator-3 {</div><div class='del'>-		/* OUTPUT of SN74AVC2T244DQMR */</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "wlan_en";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='del'>-		gpio = &lt;&amp;main_gpio0 38 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;wifi_en_pins_default&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	vdd_3v3_sd: regulator-4 {</div><div class='ctx'> 		/* output of TPS22918DBVR-U21 */</div><div class='ctx'> 		bootph-all;</div><div class='hunk'>@@ -292,6 +289,8 @@</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */</div><div class='ctx'> 			AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */</div><div class='add'>+			AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */</div><div class='add'>+			AM62X_IOPAD(0x018c, PIN_INPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -383,7 +382,6 @@</div><div class='ctx'> 			AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */</div><div class='ctx'> 			AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */</div><div class='ctx'> 			AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */</div><div class='del'>-			AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */</div><div class='ctx'> 			AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */</div><div class='ctx'> 			AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -597,6 +595,9 @@</div><div class='ctx'> </div><div class='ctx'> 	cpsw3g_phy0: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;main_gpio0 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;50000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpsw3g_phy1: ethernet-phy@1 {</div><div class='hunk'>@@ -615,7 +616,7 @@</div><div class='ctx'> 		"USR0", "USR1", "USR2", "USR3", "", "", "USR4",	/* 3-9 */</div><div class='ctx'> 		"EEPROM_WP",					/* 10 */</div><div class='ctx'> 		"CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2",	/* 11-12 */</div><div class='del'>-		"CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "",	/* 13-17 */</div><div class='add'>+		"CC1352P7_BOOT", "CC1352P7_RSTN", "GBE_RSTN", "", "",	/* 13-17 */</div><div class='ctx'> 		"USR_BUTTON", "", "", "", "", "", "", "", "",	/* 18-26 */</div><div class='ctx'> 		"", "", "", "", "", "", "", "", "", "HDMI_INT",	/* 27-36 */</div><div class='ctx'> 		"", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */</div><div class='hunk'>@@ -839,13 +840,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci2 {</div><div class='del'>-	vmmc-supply = &lt;&amp;wlan_en&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;wifi_pins_default&gt;, &lt;&amp;wifi_32k_clk&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	ti,fails-without-test-cd;</div><div class='ctx'> 	cap-power-off-card;</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='ctx'> 	assigned-clocks = &lt;&amp;k3_clks 157 158&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;k3_clks 157 160&gt;;</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts<br/>index a83a90497857..50d2573c840e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> 	can_tc1: can-phy0 {</div><div class='ctx'> 		compatible = "ti,tcan1042";</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='ctx'> 		standby-gpios = &lt;&amp;gpio_exp 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -66,6 +66,35 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "phyBOARD-Lyra";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone",           "Mic Jack",</div><div class='add'>+			"Headphone",            "Headphone Jack",</div><div class='add'>+			"Speaker",              "External Speaker";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"MIC3R",                "Mic Jack",</div><div class='add'>+			"Mic Jack",             "Mic Bias",</div><div class='add'>+			"Headphone Jack",       "HPLOUT",</div><div class='add'>+			"Headphone Jack",       "HPROUT",</div><div class='add'>+			"External Speaker",     "SPOP",</div><div class='add'>+			"External Speaker",     "SPOM";</div><div class='add'>+		simple-audio-card,format = "dsp_b";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;sound_master&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;sound_master&gt;;</div><div class='add'>+		simple-audio-card,bitclock-inversion;</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;mcasp2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sound_master: simple-audio-card,codec {</div><div class='add'>+				sound-dai = &lt;&amp;audio_codec&gt;;</div><div class='add'>+				clocks = &lt;&amp;audio_refclk1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -82,6 +111,15 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vcc_3v3_mmc: regulator-vcc-3v3-mmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC_3V3_MMC";</div><div class='hunk'>@@ -90,9 +128,24 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_sw: regulator-vcc-3v3-sw {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_3V3_SW";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_pmx0 {</div><div class='add'>+	audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio_keys_pins_default: gpio-keys-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM62X_IOPAD(0x1d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */</div><div class='hunk'>@@ -150,6 +203,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	main_mcasp2_pins_default: main-mcasp2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x070, PIN_INPUT, 3) /* (T24) GPMC0_AD13.MCASP2_ACLKX */</div><div class='add'>+			AM62X_IOPAD(0x06c, PIN_INPUT, 3) /* (T22) GPMC0_AD12.MCASP2_AFSX */</div><div class='add'>+			AM62X_IOPAD(0x064, PIN_OUTPUT, 3) /* (T25) GPMC0_AD10.MCASP2_AXR2 */</div><div class='add'>+			AM62X_IOPAD(0x068, PIN_INPUT, 3) /* (R21) GPMC0_AD11.MCASP2_AXR3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM62X_IOPAD(0x23c, PIN_INPUT_PULLUP, 0) /* (A21) MMC1_CMD */</div><div class='hunk'>@@ -254,6 +316,21 @@</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	audio_codec: audio-codec@18 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;audio_ext_refclk1_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "ti,tlv320aic3007";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		ai3x-micbias-vg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		AVDD-supply = &lt;&amp;vcc_3v3_sw&gt;;</div><div class='add'>+		IOVDD-supply = &lt;&amp;vcc_3v3_sw&gt;;</div><div class='add'>+		DRVDD-supply = &lt;&amp;vcc_3v3_sw&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio_exp: gpio-expander@21 {</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;gpio_exp_int_pins_default&gt;;</div><div class='hunk'>@@ -271,6 +348,24 @@</div><div class='ctx'> 				  "GPIO6_ETH1_USER_RESET", "GPIO7_AUDIO_USER_RESET";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usb-pd@22 {</div><div class='add'>+		compatible = "ti,tps6598x";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			self-powered;</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			power-role = "sink";</div><div class='add'>+			port {</div><div class='add'>+				usb_con_hs: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;typec_hs&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sii9022: bridge-hdmi@39 {</div><div class='ctx'> 		compatible = "sil,sii9022";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='hunk'>@@ -329,6 +424,28 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mcasp2 {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcasp2_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	/* MCASP_IIS_MODE */</div><div class='add'>+	op-mode = &lt;0&gt;;</div><div class='add'>+	tdm-slots = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	/* 0: INACTIVE, 1: TX, 2: RX */</div><div class='add'>+	serial-dir = &lt;</div><div class='add'>+			0 0 1 2</div><div class='add'>+			0 0 0 0</div><div class='add'>+			0 0 0 0</div><div class='add'>+			0 0 0 0</div><div class='add'>+	&gt;;</div><div class='add'>+	tx-num-evt = &lt;32&gt;;</div><div class='add'>+	rx-num-evt = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci1 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_3v3_mmc&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddshv5_sdio&gt;;</div><div class='hunk'>@@ -350,7 +467,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb0 {</div><div class='del'>-	dr_mode = "peripheral";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		typec_hs: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi<br/>index aa1e057082f0..bf9c2d9c6439 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62a-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62a-main.dtsi</a></div><div class='hunk'>@@ -573,7 +573,6 @@</div><div class='ctx'> 		ti,itap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='ctx'> 		ti,itap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='ctx'> 		ti,itap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='del'>-		no-1-8-v;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -597,16 +596,16 @@</div><div class='ctx'> 		ti,itap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='ctx'> 		ti,itap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='ctx'> 		ti,itap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='del'>-		no-1-8-v;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usbss0: dwc3-usb@f900000 {</div><div class='ctx'> 		compatible = "ti,am62-usb";</div><div class='del'>-		reg = &lt;0x00 0x0f900000 0x00 0x800&gt;;</div><div class='add'>+		reg = &lt;0x00 0x0f900000 0x00 0x800&gt;,</div><div class='add'>+		      &lt;0x00 0x0f908000 0x00 0x400&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 161 3&gt;;</div><div class='ctx'> 		clock-names = "ref";</div><div class='del'>-		ti,syscon-phy-pll-refclk = &lt;&amp;wkup_conf 0x4008&gt;;</div><div class='add'>+		ti,syscon-phy-pll-refclk = &lt;&amp;usb0_phy_ctrl 0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 178 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -621,15 +620,18 @@</div><div class='ctx'> 			interrupt-names = "host", "peripheral";</div><div class='ctx'> 			maximum-speed = "high-speed";</div><div class='ctx'> 			dr_mode = "otg";</div><div class='add'>+			snps,usb2-gadget-lpm-disable;</div><div class='add'>+			snps,usb2-lpm-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usbss1: dwc3-usb@f910000 {</div><div class='ctx'> 		compatible = "ti,am62-usb";</div><div class='del'>-		reg = &lt;0x00 0x0f910000 0x00 0x800&gt;;</div><div class='add'>+		reg = &lt;0x00 0x0f910000 0x00 0x800&gt;,</div><div class='add'>+		      &lt;0x00 0x0f918000 0x00 0x400&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 162 3&gt;;</div><div class='ctx'> 		clock-names = "ref";</div><div class='del'>-		ti,syscon-phy-pll-refclk = &lt;&amp;wkup_conf 0x4018&gt;;</div><div class='add'>+		ti,syscon-phy-pll-refclk = &lt;&amp;usb1_phy_ctrl 0x0&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 179 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -644,6 +646,8 @@</div><div class='ctx'> 			interrupt-names = "host", "peripheral";</div><div class='ctx'> 			maximum-speed = "high-speed";</div><div class='ctx'> 			dr_mode = "otg";</div><div class='add'>+			snps,usb2-gadget-lpm-disable;</div><div class='add'>+			snps,usb2-lpm-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1051,4 +1055,11 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vpu: video-codec@30210000 {</div><div class='add'>+		compatible = "ti,j721s2-wave521c", "cnm,wave521c";</div><div class='add'>+		reg = &lt;0x00 0x30210000 0x00 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 204 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 204 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi<br/>index f7bec484705a..98043e9aa316 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi</a></div><div class='hunk'>@@ -17,6 +17,16 @@</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		usb0_phy_ctrl: syscon@4008 {</div><div class='add'>+			compatible = "ti,am62-usb-phy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4008 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1_phy_ctrl: syscon@4018 {</div><div class='add'>+			compatible = "ti,am62-usb-phy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4018 0x4&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_uart0: serial@2b300000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts<br/>index f241637a5642..fa43cd0b631e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62a7-sk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62a7-sk.dts</a></div><div class='hunk'>@@ -113,6 +113,20 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vddshv_sdio: regulator-5 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "vddshv_sdio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vddshv_sdio_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;ldo1&gt;;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -342,6 +356,12 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vddshv_sdio_pins_default: vddshv-sdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_pmx0 {</div><div class='hunk'>@@ -580,6 +600,7 @@</div><div class='ctx'> 	/* SD/MMC */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vddshv_sdio&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi<br/>index 7337a9e13535..900d1f9530a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62p-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62p-main.dtsi</a></div><div class='hunk'>@@ -635,6 +635,58 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbss0: usb@f900000 {</div><div class='add'>+		compatible = "ti,am62-usb";</div><div class='add'>+		reg = &lt;0x00 0x0f900000 0x00 0x800&gt;,</div><div class='add'>+		      &lt;0x00 0x0f908000 0x00 0x400&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 161 3&gt;;</div><div class='add'>+		clock-names = "ref";</div><div class='add'>+		ti,syscon-phy-pll-refclk = &lt;&amp;usb0_phy_ctrl 0x0&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 178 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		usb0: usb@31000000 {</div><div class='add'>+			compatible = "snps,dwc3";</div><div class='add'>+			reg = &lt;0x00 0x31000000 0x00 0x50000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;, /* irq.0 */</div><div class='add'>+			&lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;; /* irq.0 */</div><div class='add'>+			interrupt-names = "host", "peripheral";</div><div class='add'>+			maximum-speed = "high-speed";</div><div class='add'>+			dr_mode = "otg";</div><div class='add'>+			snps,usb2-gadget-lpm-disable;</div><div class='add'>+			snps,usb2-lpm-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbss1: usb@f910000 {</div><div class='add'>+		compatible = "ti,am62-usb";</div><div class='add'>+		reg = &lt;0x00 0x0f910000 0x00 0x800&gt;,</div><div class='add'>+		      &lt;0x00 0x0f918000 0x00 0x400&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 162 3&gt;;</div><div class='add'>+		clock-names = "ref";</div><div class='add'>+		ti,syscon-phy-pll-refclk = &lt;&amp;usb1_phy_ctrl 0x0&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 179 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		usb1: usb@31100000 {</div><div class='add'>+			compatible = "snps,dwc3";</div><div class='add'>+			reg = &lt;0x00 0x31100000 0x00 0x50000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;, /* irq.0 */</div><div class='add'>+			&lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;; /* irq.0 */</div><div class='add'>+			interrupt-names = "host", "peripheral";</div><div class='add'>+			maximum-speed = "high-speed";</div><div class='add'>+			dr_mode = "otg";</div><div class='add'>+			snps,usb2-gadget-lpm-disable;</div><div class='add'>+			snps,usb2-lpm-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	fss: bus@fc00000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		reg = &lt;0x00 0x0fc00000 0x00 0x70000&gt;;</div><div class='hunk'>@@ -673,6 +725,7 @@</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 13 11&gt;;</div><div class='ctx'> 		clock-names = "fck";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 13 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		dmas = &lt;&amp;main_pktdma 0xc600 15&gt;,</div><div class='ctx'> 		       &lt;&amp;main_pktdma 0xc601 15&gt;,</div><div class='hunk'>@@ -696,6 +749,7 @@</div><div class='ctx'> 				label = "port1";</div><div class='ctx'> 				phys = &lt;&amp;phy_gmii_sel 1&gt;;</div><div class='ctx'> 				mac-address = [00 00 00 00 00 00];</div><div class='add'>+				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cpsw_port2: port@2 {</div><div class='hunk'>@@ -704,6 +758,7 @@</div><div class='ctx'> 				label = "port2";</div><div class='ctx'> 				phys = &lt;&amp;phy_gmii_sel 2&gt;;</div><div class='ctx'> 				mac-address = [00 00 00 00 00 00];</div><div class='add'>+				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi<br/>index a84756c336d0..c71d9624ea27 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi</a></div><div class='hunk'>@@ -18,6 +18,16 @@</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='ctx'> 			bootph-all;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		usb0_phy_ctrl: syscon@4008 {</div><div class='add'>+			compatible = "ti,am62-usb-phy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4008 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1_phy_ctrl: syscon@4018 {</div><div class='add'>+			compatible = "ti,am62-usb-phy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4018 0x4&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_uart0: serial@2b300000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts<br/>index e86f34e835c1..6e7234659111 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am62p5-sk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am62p5-sk.dts</a></div><div class='hunk'>@@ -27,6 +27,8 @@</div><div class='ctx'> 		spi0 = &amp;ospi0;</div><div class='ctx'> 		ethernet0 = &amp;cpsw_port1;</div><div class='ctx'> 		ethernet1 = &amp;cpsw_port2;</div><div class='add'>+		usb0 = &amp;usb0;</div><div class='add'>+		usb1 = &amp;usb1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -297,6 +299,12 @@</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	main_usb1_pins_default: main-usb1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_wlirq_pins_default: main-wlirq-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */</div><div class='hunk'>@@ -340,6 +348,36 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	typec_pd0: usb-power-controller@3f {</div><div class='add'>+		compatible = "ti,tps6598x";</div><div class='add'>+		reg = &lt;0x3f&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			self-powered;</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			power-role = "sink";</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usb_con_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb0_hs_ep&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;main_i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -431,16 +469,19 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;,</div><div class='ctx'> 		    &lt;&amp;main_rgmii2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw_port2 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw3g_mdio {</div><div class='hunk'>@@ -463,6 +504,35 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		usb0_hs_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_usb1_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mcasp1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='hunk'>@@ -493,7 +563,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> </div><div class='del'>-	flash@0{</div><div class='add'>+	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;8&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts<br/>index 53fe1d065ddb..e20e4ffd0f1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-evm.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-evm.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-evm.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am642-evm.dts</a></div><div class='hunk'>@@ -473,7 +473,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='del'>-	current-speed = &lt;115200&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* main_uart1 is reserved for firmware usage */</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso<br/>new file mode 100644<br/>index 000000000000..5057658061b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 PHYTEC America LLC</div><div class='add'>+ * Author: Nathan Morrisson &lt;nmorrisson@phytec.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	fan: gpio-fan {</div><div class='add'>+		compatible = "gpio-fan";</div><div class='add'>+		gpio-fan,speed-map = &lt;0 0 8600 1&gt;;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_fan_pins_default&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	gpio_fan_pins_default: gpio-fan-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x070, PIN_OUTPUT, 7) /* (V18) GPMC0_AD13.GPIO0_28 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;thermal_zones {</div><div class='add'>+	main0_thermal: main0-thermal {</div><div class='add'>+		trips {</div><div class='add'>+			main0_thermal_trip0: main0-thermal-trip {</div><div class='add'>+				temperature = &lt;65000&gt;;  /* millicelsius */</div><div class='add'>+				hysteresis = &lt;2000&gt;;    /* millicelsius */</div><div class='add'>+				type = "active";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main0_thermal_trip0&gt;;</div><div class='add'>+				cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts<br/>index 8237b8c815b8..6df331ccb970 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;can_tc1_pins_default&gt;;</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='ctx'> 		standby-gpios = &lt;&amp;main_gpio0 32 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;can_tc2_pins_default&gt;;</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='ctx'> 		standby-gpios = &lt;&amp;main_gpio0 35 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -275,7 +275,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='del'>-	current-speed = &lt;115200&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='hunk'>@@ -283,7 +282,6 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart1_pins_default&gt;;</div><div class='ctx'> 	uart-has-rtscts;</div><div class='del'>-	current-speed = &lt;115200&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts<br/>index 67cd41bf806e..5b028b3a3192 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-sk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am642-sk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am642-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am642-sk.dts</a></div><div class='hunk'>@@ -381,7 +381,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='del'>-	current-speed = &lt;115200&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi<br/>index c50a585dd638..ef7897763ef8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi</a></div><div class='hunk'>@@ -43,9 +43,33 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;icssg0_eth {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='add'>+	compatible = "ti,am654-sr1-icssg-prueth";</div><div class='ctx'> </div><div class='del'>-&amp;icssg0_mdio {</div><div class='del'>-	status = "disabled";</div><div class='add'>+	ti,prus = &lt;&amp;pru0_0&gt;, &lt;&amp;rtu0_0&gt;, &lt;&amp;pru0_1&gt;, &lt;&amp;rtu0_1&gt;;</div><div class='add'>+	firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf",</div><div class='add'>+			"ti-pruss/am65x-rtu0-prueth-fw.elf",</div><div class='add'>+			"ti-pruss/am65x-pru1-prueth-fw.elf",</div><div class='add'>+			"ti-pruss/am65x-rtu1-prueth-fw.elf";</div><div class='add'>+</div><div class='add'>+	ti,pruss-gp-mux-sel = &lt;2&gt;,      /* MII mode */</div><div class='add'>+			      &lt;2&gt;,</div><div class='add'>+			      &lt;2&gt;,      /* MII mode */</div><div class='add'>+			      &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	dmas = &lt;&amp;main_udmap 0xc100&gt;, /* egress slice 0 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc101&gt;, /* egress slice 0 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc102&gt;, /* egress slice 0 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc103&gt;, /* egress slice 0 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc104&gt;, /* egress slice 1 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc105&gt;, /* egress slice 1 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc106&gt;, /* egress slice 1 */</div><div class='add'>+	       &lt;&amp;main_udmap 0xc107&gt;, /* egress slice 1 */</div><div class='add'>+	       &lt;&amp;main_udmap 0x4100&gt;, /* ingress slice 0 */</div><div class='add'>+	       &lt;&amp;main_udmap 0x4101&gt;, /* ingress slice 1 */</div><div class='add'>+	       &lt;&amp;main_udmap 0x4102&gt;, /* mgmnt rsp slice 0 */</div><div class='add'>+	       &lt;&amp;main_udmap 0x4103&gt;; /* mgmnt rsp slice 1 */</div><div class='add'>+	dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",</div><div class='add'>+		    "tx1-0", "tx1-1", "tx1-2", "tx1-3",</div><div class='add'>+		    "rx0", "rx1",</div><div class='add'>+		    "rxmgm0", "rxmgm1";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi<br/>index ff857117d719..ed71561c5bd9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am65-main.dtsi</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 153 8&gt;, &lt;&amp;k3_clks 153 4&gt;;</div><div class='ctx'> 		ti,serdes-clk = &lt;&amp;serdes0_clk&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='del'>-		mux-controls = &lt;&amp;serdes_mux 0&gt;;</div><div class='add'>+		mux-controls = &lt;&amp;serdes0_mux 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serdes1: serdes@910000 {</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 154 9&gt;, &lt;&amp;k3_clks 154 5&gt;;</div><div class='ctx'> 		ti,serdes-clk = &lt;&amp;serdes1_clk&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='del'>-		mux-controls = &lt;&amp;serdes_mux 1&gt;;</div><div class='add'>+		mux-controls = &lt;&amp;serdes1_mux 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart0: serial@2800000 {</div><div class='hunk'>@@ -89,7 +89,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02800000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -436,18 +435,13 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		mmc-ddr-1_8v;</div><div class='ctx'> 		mmc-hs200-1_8v;</div><div class='add'>+		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='add'>+		ti,trm-icp = &lt;0x8&gt;;</div><div class='ctx'> 		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='ctx'> 		ti,otap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr50 = &lt;0x8&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr104 = &lt;0x7&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr50 = &lt;0x5&gt;;</div><div class='ctx'> 		ti,otap-del-sel-ddr52 = &lt;0x5&gt;;</div><div class='ctx'> 		ti,otap-del-sel-hs200 = &lt;0x5&gt;;</div><div class='del'>-		ti,otap-del-sel-hs400 = &lt;0x0&gt;;</div><div class='del'>-		ti,trm-icp = &lt;0x8&gt;;</div><div class='add'>+		ti,itap-del-sel-ddr52 = &lt;0x0&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -459,18 +453,19 @@</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 48 0&gt;, &lt;&amp;k3_clks 48 1&gt;;</div><div class='ctx'> 		clock-names = "clk_ahb", "clk_xin";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='add'>+		ti,trm-icp = &lt;0x8&gt;;</div><div class='ctx'> 		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='ctx'> 		ti,otap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr12 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr25 = &lt;0xf&gt;;</div><div class='ctx'> 		ti,otap-del-sel-sdr50 = &lt;0x8&gt;;</div><div class='ctx'> 		ti,otap-del-sel-sdr104 = &lt;0x7&gt;;</div><div class='ctx'> 		ti,otap-del-sel-ddr50 = &lt;0x4&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr52 = &lt;0x4&gt;;</div><div class='del'>-		ti,otap-del-sel-hs200 = &lt;0x7&gt;;</div><div class='del'>-		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='del'>-		ti,trm-icp = &lt;0x8&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0xa&gt;;</div><div class='add'>+		ti,itap-del-sel-sd-hs = &lt;0x1&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr12 = &lt;0xa&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr25 = &lt;0x1&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -483,20 +478,25 @@</div><div class='ctx'> 		ranges = &lt;0x0 0x0 0x00100000 0x1c000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		serdes0_clk: clock@4080 {</div><div class='del'>-			compatible = "syscon";</div><div class='del'>-			reg = &lt;0x00004080 0x4&gt;;</div><div class='add'>+			compatible = "ti,am654-serdes-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4080 0x4&gt;;</div><div class='add'>+</div><div class='add'>+			serdes0_mux: mux-controller {</div><div class='add'>+				compatible = "mmio-mux";</div><div class='add'>+				#mux-control-cells = &lt;1&gt;;</div><div class='add'>+				mux-reg-masks = &lt;0x0 0x3&gt;; /* lane select */</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		serdes1_clk: clock@4090 {</div><div class='del'>-			compatible = "syscon";</div><div class='del'>-			reg = &lt;0x00004090 0x4&gt;;</div><div class='del'>-		};</div><div class='add'>+			compatible = "ti,am654-serdes-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4090 0x4&gt;;</div><div class='ctx'> </div><div class='del'>-		serdes_mux: mux-controller {</div><div class='del'>-			compatible = "mmio-mux";</div><div class='del'>-			#mux-control-cells = &lt;1&gt;;</div><div class='del'>-			mux-reg-masks = &lt;0x4080 0x3&gt;, /* SERDES0 lane select */</div><div class='del'>-					&lt;0x4090 0x3&gt;; /* SERDES1 lane select */</div><div class='add'>+			serdes1_mux: mux-controller {</div><div class='add'>+				compatible = "mmio-mux";</div><div class='add'>+				#mux-control-cells = &lt;1&gt;;</div><div class='add'>+				mux-reg-masks = &lt;0x0 0x3&gt;; /* lane select */</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi<br/>index 6ff3ccc39fb4..8feab9317644 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi</a></div><div class='hunk'>@@ -43,7 +43,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x40a00000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;96000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 149 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -286,7 +285,11 @@</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x47000000 0x0 0x47000000 0x0 0x100&gt;, /* FSS Control */</div><div class='add'>+			 &lt;0x0 0x47040000 0x0 0x47040000 0x0 0x100&gt;, /* OSPI0 Control */</div><div class='add'>+			 &lt;0x0 0x47050000 0x0 0x47050000 0x0 0x100&gt;, /* OSPI1 Control */</div><div class='add'>+			 &lt;0x5 0x00000000 0x5 0x00000000 0x1 0x0000000&gt;, /* OSPI0 Memory */</div><div class='add'>+			 &lt;0x7 0x00000000 0x7 0x00000000 0x1 0x0000000&gt;; /* OSPI1 Memory */</div><div class='ctx'> </div><div class='ctx'> 		ospi0: spi@47040000 {</div><div class='ctx'> 			compatible = "ti,am654-ospi", "cdns,qspi-nor";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi<br/>index 37527890ddea..eee072e44a42 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi</a></div><div class='hunk'>@@ -59,7 +59,6 @@</div><div class='ctx'> 		reg = &lt;0x42300000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 150 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts<br/>index 50de2a448a3a..d88651c297a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am69-sk.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-am69-sk.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-am69-sk.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-am69-sk.dts</a></div><div class='hunk'>@@ -517,18 +517,18 @@</div><div class='ctx'> 	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */</div><div class='del'>-			J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */</div><div class='del'>-			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */</div><div class='del'>-			J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_UART0_CTSn */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (L36) WKUP_UART0_RTSn */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */</div><div class='del'>-			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi<br/>index 657f9cc9f4ea..9386bf3ef9f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j7200-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j7200-main.dtsi</a></div><div class='hunk'>@@ -440,7 +440,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02800000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 146 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -452,7 +451,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02810000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 278 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 278 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -464,7 +462,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02820000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 279 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 279 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -476,7 +473,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02830000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 280 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 280 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -488,7 +484,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02840000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 281 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 281 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -500,7 +495,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02850000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 282 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 282 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -512,7 +506,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02860000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 283 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 283 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -524,7 +517,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02870000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 284 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 284 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -536,7 +528,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02880000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 285 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 285 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -548,7 +539,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02890000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 286 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 286 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi<br/>index 7cf21c99956e..fccaabfb1348 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -259,7 +259,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x42300000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 287 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 287 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -271,7 +270,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x40a00000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;96000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 149 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 149 2&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -520,10 +518,12 @@</div><div class='ctx'> </div><div class='ctx'> 	fss: bus@47000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='del'>-		reg = &lt;0x00 0x47000000 0x00 0x100&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x47000000 0x0 0x47000000 0x0 0x100&gt;, /* FSS Control */</div><div class='add'>+			 &lt;0x0 0x47034000 0x0 0x47040000 0x0 0x100&gt;, /* HBMC Control */</div><div class='add'>+			 &lt;0x0 0x47040000 0x0 0x47040000 0x0 0x100&gt;, /* OSPI0 Control */</div><div class='add'>+			 &lt;0x5 0x00000000 0x5 0x00000000 0x1 0x0000000&gt;; /* HBMC/OSPI0 Memory */</div><div class='ctx'> </div><div class='ctx'> 		hbmc_mux: mux-controller@47000004 {</div><div class='ctx'> 			compatible = "reg-mux";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi<br/>index c7eafbc862f9..0da785be80ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721e-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j721e-main.dtsi</a></div><div class='hunk'>@@ -1337,7 +1337,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02800000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 146 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1349,7 +1348,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02810000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 278 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 278 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1361,7 +1359,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02820000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 279 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 279 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1373,7 +1370,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02830000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 280 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 280 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1385,7 +1381,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02840000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 281 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 281 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1397,7 +1392,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02850000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 282 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 282 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1409,7 +1403,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02860000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 283 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 283 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1421,7 +1414,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02870000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 284 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 284 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1433,7 +1425,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02880000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 285 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 285 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -1445,7 +1436,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02890000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 286 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 286 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi<br/>index 4618b697fbc4..9349ae07c046 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -243,7 +243,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x42300000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 287 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 287 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -255,7 +254,6 @@</div><div class='ctx'> 		reg = &lt;0x00 0x40a00000 0x00 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clock-frequency = &lt;96000000&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 149 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 149 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='hunk'>@@ -346,10 +344,14 @@</div><div class='ctx'> </div><div class='ctx'> 	fss: bus@47000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='del'>-		reg = &lt;0x0 0x47000000 0x0 0x100&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x47000000 0x0 0x47000000 0x0 0x100&gt;, /* FSS Control */</div><div class='add'>+			 &lt;0x0 0x47034000 0x0 0x47034000 0x0 0x100&gt;, /* HBMC Control */</div><div class='add'>+			 &lt;0x0 0x47040000 0x0 0x47040000 0x0 0x100&gt;, /* OSPI0 Control */</div><div class='add'>+			 &lt;0x0 0x47050000 0x0 0x47050000 0x0 0x100&gt;, /* OSPI1 Control */</div><div class='add'>+			 &lt;0x5 0x00000000 0x5 0x00000000 0x1 0x0000000&gt;, /* HBMC/OSPI0 Memory */</div><div class='add'>+			 &lt;0x7 0x00000000 0x7 0x00000000 0x1 0x0000000&gt;; /* OSPI1 Memory */</div><div class='ctx'> </div><div class='ctx'> 		hbmc_mux: mux-controller@47000004 {</div><div class='ctx'> 			compatible = "reg-mux";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi<br/>index b70c8615e3c1..9ed6949b40e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi</a></div><div class='hunk'>@@ -459,7 +459,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02800000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 146 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -470,7 +469,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02810000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 350 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 350 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -481,7 +479,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02820000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 351 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 351 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -492,7 +489,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02830000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 352 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 352 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -503,7 +499,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02840000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 353 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 353 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -514,7 +509,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02850000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 354 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 354 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -525,7 +519,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02860000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 355 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 355 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -536,7 +529,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02870000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 356 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 356 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -547,7 +539,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02880000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 357 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 357 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -558,7 +549,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02890000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 358 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 358 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -778,8 +768,6 @@</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='ctx'> 		ti,trm-icp = &lt;0x8&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		/* Masking support for SDR104 capability */</div><div class='del'>-		sdhci-caps-mask = &lt;0x00000003 0x00000000&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi<br/>index eaf7f709440e..5ccb04c7c462 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -298,7 +298,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x42300000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 359 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 359 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -309,7 +308,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x40a00000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 149 3&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 149 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi<br/>index be4502fe1c9d..568e6a04619d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721s2.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j721s2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721s2.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j721s2.dtsi</a></div><div class='hunk'>@@ -117,6 +117,7 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges = &lt;0x00 0x00100000 0x00 0x00100000 0x00 0x00020000&gt;, /* ctrl mmr */</div><div class='ctx'> 			 &lt;0x00 0x00600000 0x00 0x00600000 0x00 0x00031100&gt;, /* GPIO */</div><div class='add'>+			 &lt;0x00 0x00700000 0x00 0x00700000 0x00 0x00001000&gt;, /* ESM */</div><div class='ctx'> 			 &lt;0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000&gt;, /* Most peripherals */</div><div class='ctx'> 			 &lt;0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000&gt;, /* PCIe Core*/</div><div class='ctx'> 			 &lt;0x00 0x18000000 0x00 0x18000000 0x00 0x08000000&gt;, /* PCIe1 DAT0 */</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts<br/>index cee3a8661d5e..bf3c246d13d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j722s-evm.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j722s-evm.dts</a></div><div class='hunk'>@@ -226,10 +226,7 @@</div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpsw_port2 {</div><div class='del'>-	status = "disabled";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio1 {</div><div class='hunk'>@@ -369,6 +366,13 @@</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='add'>+	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci1 {</div><div class='ctx'> 	/* SD/MMC */</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='hunk'>@@ -377,7 +381,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='del'>-	no-1-8-v;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts<br/>index 81fd7afac8c5..d511b25d62e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4-evm.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j784s4-evm.dts</a></div><div class='hunk'>@@ -343,16 +343,16 @@</div><div class='ctx'> 	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */</div><div class='del'>-			J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */</div><div class='del'>-			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi<br/>index b67c37460a73..6a4554c6c9c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi</a></div><div class='hunk'>@@ -404,7 +404,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02800000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 146 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -415,7 +414,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02810000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 388 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 388 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -426,7 +424,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02820000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 389 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 389 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -437,7 +434,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02830000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 390 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 390 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -448,7 +444,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02840000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 391 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 391 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -459,7 +454,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02850000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 392 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 392 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -470,7 +464,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02860000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 393 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 393 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -481,7 +474,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02870000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 394 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 394 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -492,7 +484,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02880000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 395 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 395 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -503,7 +494,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x02890000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 396 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 396 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -914,8 +904,6 @@</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='ctx'> 		ti,trm-icp = &lt;0x8&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		sdhci-caps-mask = &lt;0x00000003 0x00000000&gt;;</div><div class='del'>-		no-1-8-v;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi<br/>index 77a8d99139ec..2e18d91ae92f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -304,7 +304,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x42300000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 397 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 397 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -315,7 +314,6 @@</div><div class='ctx'> 		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='ctx'> 		reg = &lt;0x00 0x40a00000 0x00 0x200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		current-speed = &lt;115200&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 149 0&gt;;</div><div class='ctx'> 		clock-names = "fclk";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 149 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -674,10 +672,13 @@</div><div class='ctx'> </div><div class='ctx'> 	fss: bus@47000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='del'>-		reg = &lt;0x00 0x47000000 0x00 0x100&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x47000000 0x0 0x47000000 0x0 0x100&gt;, /* FSS Control */</div><div class='add'>+			 &lt;0x0 0x47040000 0x0 0x47040000 0x0 0x100&gt;, /* OSPI0 Control */</div><div class='add'>+			 &lt;0x0 0x47050000 0x0 0x47050000 0x0 0x100&gt;, /* OSPI1 Control */</div><div class='add'>+			 &lt;0x5 0x00000000 0x5 0x00000000 0x1 0x0000000&gt;, /* OSPI0 Memory */</div><div class='add'>+			 &lt;0x7 0x00000000 0x7 0x00000000 0x1 0x0000000&gt;; /* OSPI1 Memory */</div><div class='ctx'> </div><div class='ctx'> 		ospi0: spi@47040000 {</div><div class='ctx'> 			compatible = "ti,am654-ospi", "cdns,qspi-nor";</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi<br/>index 6e2e92ffe745..da7368ed6b52 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/ti/k3-j784s4.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/ti/k3-j784s4.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/ti/k3-j784s4.dtsi</a></div><div class='hunk'>@@ -234,6 +234,7 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges = &lt;0x00 0x00100000 0x00 0x00100000 0x00 0x00020000&gt;, /* ctrl mmr */</div><div class='ctx'> 			 &lt;0x00 0x00600000 0x00 0x00600000 0x00 0x00031100&gt;, /* GPIO */</div><div class='add'>+			 &lt;0x00 0x00700000 0x00 0x00700000 0x00 0x00001000&gt;, /* ESM */</div><div class='ctx'> 			 &lt;0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000&gt;, /* Most peripherals */</div><div class='ctx'> 			 &lt;0x00 0x04210000 0x00 0x04210000 0x00 0x00010000&gt;, /* VPU0 */</div><div class='ctx'> 			 &lt;0x00 0x04220000 0x00 0x04220000 0x00 0x00010000&gt;, /* VPU1 */</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi<br/>index 25d20d803230..34d0e0be3fe6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/xilinx/zynqmp.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/boot/dts/xilinx/zynqmp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/xilinx/zynqmp.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/boot/dts/xilinx/zynqmp.dtsi</a></div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig<br/>index 2c30d617e180..d35150a979d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/configs/defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/configs/defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/configs/defconfig</a></div><div class='hunk'>@@ -34,6 +34,7 @@ CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_KEXEC_FILE=y</div><div class='ctx'> CONFIG_CRASH_DUMP=y</div><div class='ctx'> CONFIG_ARCH_ACTIONS=y</div><div class='add'>+CONFIG_ARCH_AIROHA=y</div><div class='ctx'> CONFIG_ARCH_SUNXI=y</div><div class='ctx'> CONFIG_ARCH_ALPINE=y</div><div class='ctx'> CONFIG_ARCH_APPLE=y</div><div class='hunk'>@@ -411,6 +412,7 @@ CONFIG_WCN36XX=m</div><div class='ctx'> CONFIG_ATH11K=m</div><div class='ctx'> CONFIG_ATH11K_AHB=m</div><div class='ctx'> CONFIG_ATH11K_PCI=m</div><div class='add'>+CONFIG_ATH12K=m</div><div class='ctx'> CONFIG_BRCMFMAC=m</div><div class='ctx'> CONFIG_MWIFIEX=m</div><div class='ctx'> CONFIG_MWIFIEX_SDIO=m</div><div class='hunk'>@@ -445,6 +447,7 @@ CONFIG_INPUT_TPS65219_PWRBUTTON=m</div><div class='ctx'> CONFIG_INPUT_PWM_BEEPER=m</div><div class='ctx'> CONFIG_INPUT_PWM_VIBRA=m</div><div class='ctx'> CONFIG_INPUT_RK805_PWRKEY=m</div><div class='add'>+CONFIG_INPUT_DA9063_ONKEY=m</div><div class='ctx'> CONFIG_INPUT_HISI_POWERKEY=y</div><div class='ctx'> # CONFIG_SERIO_SERPORT is not set</div><div class='ctx'> CONFIG_SERIO_AMBAKMI=y</div><div class='hunk'>@@ -562,6 +565,7 @@ CONFIG_SPI_TEGRA114=m</div><div class='ctx'> CONFIG_SPI_SPIDEV=m</div><div class='ctx'> CONFIG_SPMI=y</div><div class='ctx'> CONFIG_SPMI_MTK_PMIF=m</div><div class='add'>+CONFIG_PINCTRL_DA9062=m</div><div class='ctx'> CONFIG_PINCTRL_MAX77620=y</div><div class='ctx'> CONFIG_PINCTRL_RK805=m</div><div class='ctx'> CONFIG_PINCTRL_SINGLE=y</div><div class='hunk'>@@ -727,6 +731,7 @@ CONFIG_MFD_ALTERA_SYSMGR=y</div><div class='ctx'> CONFIG_MFD_BD9571MWV=y</div><div class='ctx'> CONFIG_MFD_AXP20X_I2C=y</div><div class='ctx'> CONFIG_MFD_AXP20X_RSB=y</div><div class='add'>+CONFIG_MFD_DA9062=m</div><div class='ctx'> CONFIG_MFD_EXYNOS_LPASS=m</div><div class='ctx'> CONFIG_MFD_HI6421_PMIC=y</div><div class='ctx'> CONFIG_MFD_HI655X_PMIC=y</div><div class='hunk'>@@ -772,6 +777,7 @@ CONFIG_REGULATOR_PWM=y</div><div class='ctx'> CONFIG_REGULATOR_QCOM_RPMH=y</div><div class='ctx'> CONFIG_REGULATOR_QCOM_SMD_RPM=y</div><div class='ctx'> CONFIG_REGULATOR_QCOM_SPMI=y</div><div class='add'>+CONFIG_REGULATOR_QCOM_USB_VBUS=m</div><div class='ctx'> CONFIG_REGULATOR_RAA215300=y</div><div class='ctx'> CONFIG_REGULATOR_RK808=y</div><div class='ctx'> CONFIG_REGULATOR_S2MPS11=y</div><div class='hunk'>@@ -854,6 +860,7 @@ CONFIG_DRM_RCAR_DU=m</div><div class='ctx'> CONFIG_DRM_RCAR_DW_HDMI=m</div><div class='ctx'> CONFIG_DRM_RCAR_MIPI_DSI=m</div><div class='ctx'> CONFIG_DRM_RZG2L_MIPI_DSI=m</div><div class='add'>+CONFIG_DRM_RZG2L_DU=m</div><div class='ctx'> CONFIG_DRM_SUN4I=m</div><div class='ctx'> CONFIG_DRM_SUN6I_DSI=m</div><div class='ctx'> CONFIG_DRM_SUN8I_DW_HDMI=m</div><div class='hunk'>@@ -865,7 +872,9 @@ CONFIG_DRM_PANEL_LVDS=m</div><div class='ctx'> CONFIG_DRM_PANEL_SIMPLE=m</div><div class='ctx'> CONFIG_DRM_PANEL_EDP=m</div><div class='ctx'> CONFIG_DRM_PANEL_ILITEK_ILI9882T=m</div><div class='add'>+CONFIG_DRM_PANEL_KHADAS_TS050=m</div><div class='ctx'> CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m</div><div class='add'>+CONFIG_DRM_PANEL_NOVATEK_NT36672E=m</div><div class='ctx'> CONFIG_DRM_PANEL_RAYDIUM_RM67191=m</div><div class='ctx'> CONFIG_DRM_PANEL_SITRONIX_ST7703=m</div><div class='ctx'> CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m</div><div class='hunk'>@@ -890,6 +899,7 @@ CONFIG_DRM_ANALOGIX_ANX7625=m</div><div class='ctx'> CONFIG_DRM_I2C_ADV7511=m</div><div class='ctx'> CONFIG_DRM_I2C_ADV7511_AUDIO=y</div><div class='ctx'> CONFIG_DRM_CDNS_MHDP8546=m</div><div class='add'>+CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=m</div><div class='ctx'> CONFIG_DRM_DW_HDMI_AHB_AUDIO=m</div><div class='ctx'> CONFIG_DRM_DW_HDMI_CEC=m</div><div class='ctx'> CONFIG_DRM_IMX_DCSS=m</div><div class='hunk'>@@ -907,6 +917,7 @@ CONFIG_DRM_MESON=m</div><div class='ctx'> CONFIG_DRM_PL111=m</div><div class='ctx'> CONFIG_DRM_LIMA=m</div><div class='ctx'> CONFIG_DRM_PANFROST=m</div><div class='add'>+CONFIG_DRM_PANTHOR=m</div><div class='ctx'> CONFIG_DRM_TIDSS=m</div><div class='ctx'> CONFIG_DRM_POWERVR=m</div><div class='ctx'> CONFIG_FB=y</div><div class='hunk'>@@ -949,6 +960,7 @@ CONFIG_SND_SOC_SM8250=m</div><div class='ctx'> CONFIG_SND_SOC_SC8280XP=m</div><div class='ctx'> CONFIG_SND_SOC_SC7180=m</div><div class='ctx'> CONFIG_SND_SOC_SC7280=m</div><div class='add'>+CONFIG_SND_SOC_X1E80100=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP_SPDIF=m</div><div class='hunk'>@@ -991,6 +1003,7 @@ CONFIG_SND_SOC_GTM601=m</div><div class='ctx'> CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m</div><div class='ctx'> CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m</div><div class='ctx'> CONFIG_SND_SOC_PCM3168A_I2C=m</div><div class='add'>+CONFIG_SND_SOC_RK3308=m</div><div class='ctx'> CONFIG_SND_SOC_RK817=m</div><div class='ctx'> CONFIG_SND_SOC_RT5640=m</div><div class='ctx'> CONFIG_SND_SOC_RT5659=m</div><div class='hunk'>@@ -1169,6 +1182,7 @@ CONFIG_RTC_DRV_RV8803=m</div><div class='ctx'> CONFIG_RTC_DRV_S5M=y</div><div class='ctx'> CONFIG_RTC_DRV_DS3232=y</div><div class='ctx'> CONFIG_RTC_DRV_PCF2127=m</div><div class='add'>+CONFIG_RTC_DRV_DA9063=m</div><div class='ctx'> CONFIG_RTC_DRV_EFI=y</div><div class='ctx'> CONFIG_RTC_DRV_CROS_EC=y</div><div class='ctx'> CONFIG_RTC_DRV_FSL_FTM_ALARM=m</div><div class='hunk'>@@ -1217,6 +1231,7 @@ CONFIG_STAGING=y</div><div class='ctx'> CONFIG_STAGING_MEDIA=y</div><div class='ctx'> CONFIG_VIDEO_MAX96712=m</div><div class='ctx'> CONFIG_VIDEO_MESON_VDEC=m</div><div class='add'>+CONFIG_SND_BCM2835=m</div><div class='ctx'> CONFIG_CHROME_PLATFORMS=y</div><div class='ctx'> CONFIG_CROS_EC=y</div><div class='ctx'> CONFIG_CROS_EC_I2C=y</div><div class='hunk'>@@ -1286,6 +1301,7 @@ CONFIG_QCM_DISPCC_2290=m</div><div class='ctx'> CONFIG_QCS_GCC_404=y</div><div class='ctx'> CONFIG_QDU_GCC_1000=y</div><div class='ctx'> CONFIG_SC_CAMCC_8280XP=m</div><div class='add'>+CONFIG_SC_DISPCC_7280=m</div><div class='ctx'> CONFIG_SC_DISPCC_8280XP=m</div><div class='ctx'> CONFIG_SA_GCC_8775P=y</div><div class='ctx'> CONFIG_SA_GPUCC_8775P=m</div><div class='hunk'>@@ -1293,6 +1309,7 @@ CONFIG_SC_GCC_7180=y</div><div class='ctx'> CONFIG_SC_GCC_7280=y</div><div class='ctx'> CONFIG_SC_GCC_8180X=y</div><div class='ctx'> CONFIG_SC_GCC_8280XP=y</div><div class='add'>+CONFIG_SC_GPUCC_7280=m</div><div class='ctx'> CONFIG_SC_GPUCC_8280XP=m</div><div class='ctx'> CONFIG_SC_LPASSCC_8280XP=m</div><div class='ctx'> CONFIG_SDM_CAMCC_845=m</div><div class='hunk'>@@ -1408,6 +1425,7 @@ CONFIG_ARCH_R9A07G044=y</div><div class='ctx'> CONFIG_ARCH_R9A07G054=y</div><div class='ctx'> CONFIG_ARCH_R9A08G045=y</div><div class='ctx'> CONFIG_ARCH_R9A09G011=y</div><div class='add'>+CONFIG_ARCH_R9A09G057=y</div><div class='ctx'> CONFIG_ROCKCHIP_IODOMAIN=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_132_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_210_SOC=y</div><div class='hunk'>@@ -1473,6 +1491,7 @@ CONFIG_PWM_VISCONTI=m</div><div class='ctx'> CONFIG_SL28CPLD_INTC=y</div><div class='ctx'> CONFIG_QCOM_PDC=y</div><div class='ctx'> CONFIG_QCOM_MPM=y</div><div class='add'>+CONFIG_RESET_GPIO=m</div><div class='ctx'> CONFIG_RESET_IMX7=y</div><div class='ctx'> CONFIG_RESET_QCOM_AOSS=y</div><div class='ctx'> CONFIG_RESET_QCOM_PDC=m</div><div class='hunk'>@@ -1517,6 +1536,7 @@ CONFIG_PHY_ROCKCHIP_PCIE=m</div><div class='ctx'> CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=m</div><div class='ctx'> CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y</div><div class='ctx'> CONFIG_PHY_ROCKCHIP_TYPEC=y</div><div class='add'>+CONFIG_PHY_ROCKCHIP_USBDP=m</div><div class='ctx'> CONFIG_PHY_SAMSUNG_UFS=y</div><div class='ctx'> CONFIG_PHY_UNIPHIER_USB2=y</div><div class='ctx'> CONFIG_PHY_UNIPHIER_USB3=y</div><div class='hunk'>@@ -1585,6 +1605,7 @@ CONFIG_INTERCONNECT_QCOM_SC8180X=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SC8280XP=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SDM845=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SDX75=y</div><div class='add'>+CONFIG_INTERCONNECT_QCOM_SM6115=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SM8150=m</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SM8250=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SM8350=m</div><div class='hunk'>@@ -1599,6 +1620,7 @@ CONFIG_HTE_TEGRA194=y</div><div class='ctx'> CONFIG_HTE_TEGRA194_TEST=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='ctx'> CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='add'>+CONFIG_EXT4_FS_SECURITY=y</div><div class='ctx'> CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_BTRFS_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='hunk'>@@ -1647,6 +1669,7 @@ CONFIG_CRYPTO_DEV_FSL_CAAM=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_QCE=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_QCOM_RNG=m</div><div class='add'>+CONFIG_CRYPTO_DEV_TEGRA=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_CCREE=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_HISI_SEC2=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_HISI_ZIP=m</div><div class='head'>diff --git a/arch/arm64/configs/hardening.config b/arch/arm64/configs/hardening.config<br/>index b0e795208998..24179722927e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/configs/hardening.config?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/configs/hardening.config</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/configs/hardening.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/configs/hardening.config</a></div><div class='hunk'>@@ -5,6 +5,7 @@ CONFIG_ARM64_SW_TTBR0_PAN=y</div><div class='ctx'> </div><div class='ctx'> # Software Shadow Stack or PAC</div><div class='ctx'> CONFIG_SHADOW_CALL_STACK=y</div><div class='add'>+CONFIG_UNWIND_PATCH_PAC_INTO_SCS=y</div><div class='ctx'> </div><div class='ctx'> # Pointer authentication (ARMv8.3 and later). If hardware actually supports</div><div class='ctx'> # it, one can turn off CONFIG_STACKPROTECTOR_STRONG with this enabled.</div><div class='head'>diff --git a/arch/arm64/crypto/aes-ce.S b/arch/arm64/crypto/aes-ce.S<br/>index 1dc5bbbfeed2..b262eaa9170c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/aes-ce.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/crypto/aes-ce.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/aes-ce.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/crypto/aes-ce.S</a></div><div class='hunk'>@@ -25,33 +25,28 @@</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* preload all round keys */</div><div class='del'>-	.macro		load_round_keys, rounds, rk</div><div class='del'>-	cmp		\rounds, #12</div><div class='del'>-	blo		2222f		/* 128 bits */</div><div class='del'>-	beq		1111f		/* 192 bits */</div><div class='del'>-	ld1		{v17.4s-v18.4s}, [\rk], #32</div><div class='del'>-1111:	ld1		{v19.4s-v20.4s}, [\rk], #32</div><div class='del'>-2222:	ld1		{v21.4s-v24.4s}, [\rk], #64</div><div class='del'>-	ld1		{v25.4s-v28.4s}, [\rk], #64</div><div class='del'>-	ld1		{v29.4s-v31.4s}, [\rk]</div><div class='add'>+	.macro		load_round_keys, rk, nr, tmp</div><div class='add'>+	add		\tmp, \rk, \nr, sxtw #4</div><div class='add'>+	sub		\tmp, \tmp, #160</div><div class='add'>+	ld1		{v17.4s-v20.4s}, [\rk]</div><div class='add'>+	ld1		{v21.4s-v24.4s}, [\tmp], #64</div><div class='add'>+	ld1		{v25.4s-v28.4s}, [\tmp], #64</div><div class='add'>+	ld1		{v29.4s-v31.4s}, [\tmp]</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* prepare for encryption with key in rk[] */</div><div class='ctx'> 	.macro		enc_prepare, rounds, rk, temp</div><div class='del'>-	mov		\temp, \rk</div><div class='del'>-	load_round_keys	\rounds, \temp</div><div class='add'>+	load_round_keys	\rk, \rounds, \temp</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* prepare for encryption (again) but with new key in rk[] */</div><div class='ctx'> 	.macro		enc_switch_key, rounds, rk, temp</div><div class='del'>-	mov		\temp, \rk</div><div class='del'>-	load_round_keys	\rounds, \temp</div><div class='add'>+	load_round_keys	\rk, \rounds, \temp</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/* prepare for decryption with key in rk[] */</div><div class='ctx'> 	.macro		dec_prepare, rounds, rk, temp</div><div class='del'>-	mov		\temp, \rk</div><div class='del'>-	load_round_keys	\rounds, \temp</div><div class='add'>+	load_round_keys	\rk, \rounds, \temp</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro		do_enc_Nx, de, mc, k, i0, i1, i2, i3, i4</div><div class='hunk'>@@ -110,14 +105,13 @@</div><div class='ctx'> </div><div class='ctx'> 	/* up to 5 interleaved blocks */</div><div class='ctx'> 	.macro		do_block_Nx, enc, rounds, i0, i1, i2, i3, i4</div><div class='del'>-	cmp		\rounds, #12</div><div class='del'>-	blo		2222f		/* 128 bits */</div><div class='del'>-	beq		1111f		/* 192 bits */</div><div class='add'>+	tbz		\rounds, #2, .L\@	/* 128 bits */</div><div class='ctx'> 	round_Nx	\enc, v17, \i0, \i1, \i2, \i3, \i4</div><div class='ctx'> 	round_Nx	\enc, v18, \i0, \i1, \i2, \i3, \i4</div><div class='del'>-1111:	round_Nx	\enc, v19, \i0, \i1, \i2, \i3, \i4</div><div class='add'>+	tbz		\rounds, #1, .L\@	/* 192 bits */</div><div class='add'>+	round_Nx	\enc, v19, \i0, \i1, \i2, \i3, \i4</div><div class='ctx'> 	round_Nx	\enc, v20, \i0, \i1, \i2, \i3, \i4</div><div class='del'>-2222:	.irp		key, v21, v22, v23, v24, v25, v26, v27, v28, v29</div><div class='add'>+.L\@:	.irp		key, v21, v22, v23, v24, v25, v26, v27, v28, v29</div><div class='ctx'> 	round_Nx	\enc, \key, \i0, \i1, \i2, \i3, \i4</div><div class='ctx'> 	.endr</div><div class='ctx'> 	fin_round_Nx	\enc, v30, v31, \i0, \i1, \i2, \i3, \i4</div><div class='head'>diff --git a/arch/arm64/crypto/aes-neon.S b/arch/arm64/crypto/aes-neon.S<br/>index 9de7fbc797af..3a8961b6ea51 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/aes-neon.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/crypto/aes-neon.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/aes-neon.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/crypto/aes-neon.S</a></div><div class='hunk'>@@ -99,16 +99,16 @@</div><div class='ctx'> 	ld1		{v15.4s}, [\rk]</div><div class='ctx'> 	add		\rkp, \rk, #16</div><div class='ctx'> 	mov		\i, \rounds</div><div class='del'>-1111:	eor		\in\().16b, \in\().16b, v15.16b		/* ^round key */</div><div class='add'>+.La\@:	eor		\in\().16b, \in\().16b, v15.16b		/* ^round key */</div><div class='ctx'> 	movi		v15.16b, #0x40</div><div class='ctx'> 	tbl		\in\().16b, {\in\().16b}, v13.16b	/* ShiftRows */</div><div class='ctx'> 	sub_bytes	\in</div><div class='del'>-	subs		\i, \i, #1</div><div class='add'>+	sub		\i, \i, #1</div><div class='ctx'> 	ld1		{v15.4s}, [\rkp], #16</div><div class='del'>-	beq		2222f</div><div class='add'>+	cbz		\i, .Lb\@</div><div class='ctx'> 	mix_columns	\in, \enc</div><div class='del'>-	b		1111b</div><div class='del'>-2222:	eor		\in\().16b, \in\().16b, v15.16b		/* ^round key */</div><div class='add'>+	b		.La\@</div><div class='add'>+.Lb\@:	eor		\in\().16b, \in\().16b, v15.16b		/* ^round key */</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro		encrypt_block, in, rounds, rk, rkp, i</div><div class='hunk'>@@ -206,7 +206,7 @@</div><div class='ctx'> 	ld1		{v15.4s}, [\rk]</div><div class='ctx'> 	add		\rkp, \rk, #16</div><div class='ctx'> 	mov		\i, \rounds</div><div class='del'>-1111:	eor		\in0\().16b, \in0\().16b, v15.16b	/* ^round key */</div><div class='add'>+.La\@:	eor		\in0\().16b, \in0\().16b, v15.16b	/* ^round key */</div><div class='ctx'> 	eor		\in1\().16b, \in1\().16b, v15.16b	/* ^round key */</div><div class='ctx'> 	eor		\in2\().16b, \in2\().16b, v15.16b	/* ^round key */</div><div class='ctx'> 	eor		\in3\().16b, \in3\().16b, v15.16b	/* ^round key */</div><div class='hunk'>@@ -216,13 +216,13 @@</div><div class='ctx'> 	tbl		\in2\().16b, {\in2\().16b}, v13.16b	/* ShiftRows */</div><div class='ctx'> 	tbl		\in3\().16b, {\in3\().16b}, v13.16b	/* ShiftRows */</div><div class='ctx'> 	sub_bytes_4x	\in0, \in1, \in2, \in3</div><div class='del'>-	subs		\i, \i, #1</div><div class='add'>+	sub		\i, \i, #1</div><div class='ctx'> 	ld1		{v15.4s}, [\rkp], #16</div><div class='del'>-	beq		2222f</div><div class='add'>+	cbz		\i, .Lb\@</div><div class='ctx'> 	mix_columns_2x	\in0, \in1, \enc</div><div class='ctx'> 	mix_columns_2x	\in2, \in3, \enc</div><div class='del'>-	b		1111b</div><div class='del'>-2222:	eor		\in0\().16b, \in0\().16b, v15.16b	/* ^round key */</div><div class='add'>+	b		.La\@</div><div class='add'>+.Lb\@:	eor		\in0\().16b, \in0\().16b, v15.16b	/* ^round key */</div><div class='ctx'> 	eor		\in1\().16b, \in1\().16b, v15.16b	/* ^round key */</div><div class='ctx'> 	eor		\in2\().16b, \in2\().16b, v15.16b	/* ^round key */</div><div class='ctx'> 	eor		\in3\().16b, \in3\().16b, v15.16b	/* ^round key */</div><div class='head'>diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h<br/>index ab8b396428da..bc0b0d75acef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/assembler.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/assembler.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/assembler.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/assembler.h</a></div><div class='hunk'>@@ -50,16 +50,12 @@</div><div class='ctx'> 	msr	daif, \flags</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-	.macro	enable_dbg</div><div class='del'>-	msr	daifclr, #8</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='ctx'> 	.macro	disable_step_tsk, flgs, tmp</div><div class='ctx'> 	tbz	\flgs, #TIF_SINGLESTEP, 9990f</div><div class='ctx'> 	mrs	\tmp, mdscr_el1</div><div class='ctx'> 	bic	\tmp, \tmp, #DBG_MDSCR_SS</div><div class='ctx'> 	msr	mdscr_el1, \tmp</div><div class='del'>-	isb	// Synchronise with enable_dbg</div><div class='add'>+	isb	// Take effect before a subsequent clear of DAIF.D</div><div class='ctx'> 9990:</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -480,9 +476,10 @@ alternative_endif</div><div class='ctx'>  */</div><div class='ctx'> 	.macro	reset_pmuserenr_el0, tmpreg</div><div class='ctx'> 	mrs	\tmpreg, id_aa64dfr0_el1</div><div class='del'>-	sbfx	\tmpreg, \tmpreg, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4</div><div class='del'>-	cmp	\tmpreg, #1			// Skip if no PMU present</div><div class='del'>-	b.lt	9000f</div><div class='add'>+	ubfx	\tmpreg, \tmpreg, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4</div><div class='add'>+	cmp	\tmpreg, #ID_AA64DFR0_EL1_PMUVer_NI</div><div class='add'>+	ccmp	\tmpreg, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF, #4, ne</div><div class='add'>+	b.eq	9000f				// Skip if no PMU present or IMP_DEF</div><div class='ctx'> 	msr	pmuserenr_el0, xzr		// Disable PMU access from EL0</div><div class='ctx'> 9000:</div><div class='ctx'> 	.endm</div><div class='head'>diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h<br/>index 52f076afeb96..936389e9aecb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/cputype.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/cputype.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/cputype.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/cputype.h</a></div><div class='hunk'>@@ -86,6 +86,7 @@</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_X2		0xD48</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_N2	0xD49</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A78C	0xD4B</div><div class='add'>+#define ARM_CPU_PART_NEOVERSE_V2	0xD4F</div><div class='ctx'> </div><div class='ctx'> #define APM_CPU_PART_XGENE		0x000</div><div class='ctx'> #define APM_CPU_VAR_POTENZA		0x00</div><div class='hunk'>@@ -159,6 +160,7 @@</div><div class='ctx'> #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)</div><div class='ctx'> #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)</div><div class='ctx'> #define MIDR_CORTEX_A78C	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)</div><div class='add'>+#define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2)</div><div class='ctx'> #define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)</div><div class='ctx'> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)</div><div class='ctx'> #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)</div><div class='head'>diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h<br/>index b7afaa026842..e4546b29dd0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/el2_setup.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/el2_setup.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/el2_setup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/el2_setup.h</a></div><div class='hunk'>@@ -59,13 +59,14 @@</div><div class='ctx'> </div><div class='ctx'> .macro __init_el2_debug</div><div class='ctx'> 	mrs	x1, id_aa64dfr0_el1</div><div class='del'>-	sbfx	x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4</div><div class='del'>-	cmp	x0, #1</div><div class='del'>-	b.lt	.Lskip_pmu_\@			// Skip if no PMU present</div><div class='add'>+	ubfx	x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4</div><div class='add'>+	cmp	x0, #ID_AA64DFR0_EL1_PMUVer_NI</div><div class='add'>+	ccmp	x0, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF, #4, ne</div><div class='add'>+	b.eq	.Lskip_pmu_\@			// Skip if no PMU present or IMP_DEF</div><div class='ctx'> 	mrs	x0, pmcr_el0			// Disable debug access traps</div><div class='ctx'> 	ubfx	x0, x0, #11, #5			// to EL2 and allow access to</div><div class='ctx'> .Lskip_pmu_\@:</div><div class='del'>-	csel	x2, xzr, x0, lt			// all PMU counters from EL1</div><div class='add'>+	csel	x2, xzr, x0, eq			// all PMU counters from EL1</div><div class='ctx'> </div><div class='ctx'> 	/* Statistical profiling */</div><div class='ctx'> 	ubfx	x0, x1, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4</div><div class='head'>diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h<br/>index db1aeacd4cd9..8c0a36f72d6f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/insn.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/insn.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/insn.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/insn.h</a></div><div class='hunk'>@@ -135,6 +135,12 @@ enum aarch64_insn_special_register {</div><div class='ctx'> 	AARCH64_INSN_SPCLREG_SP_EL2	= 0xF210</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum aarch64_insn_system_register {</div><div class='add'>+	AARCH64_INSN_SYSREG_TPIDR_EL1	= 0x4684,</div><div class='add'>+	AARCH64_INSN_SYSREG_TPIDR_EL2	= 0x6682,</div><div class='add'>+	AARCH64_INSN_SYSREG_SP_EL0	= 0x4208,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum aarch64_insn_variant {</div><div class='ctx'> 	AARCH64_INSN_VARIANT_32BIT,</div><div class='ctx'> 	AARCH64_INSN_VARIANT_64BIT</div><div class='hunk'>@@ -686,6 +692,8 @@ u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type);</div><div class='add'>+u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,</div><div class='add'>+			 enum aarch64_insn_system_register sysreg);</div><div class='ctx'> </div><div class='ctx'> s32 aarch64_get_branch_offset(u32 insn);</div><div class='ctx'> u32 aarch64_set_branch_offset(u32 insn, s32 offset);</div><div class='head'>diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h<br/>index 0a7186a93882..d4d7451c2c12 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/irqflags.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/irqflags.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/irqflags.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/irqflags.h</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'> #ifndef __ASM_IRQFLAGS_H</div><div class='ctx'> #define __ASM_IRQFLAGS_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='head'>diff --git a/arch/arm64/include/asm/jump_label.h b/arch/arm64/include/asm/jump_label.h<br/>index 6aafbb789991..4e753908b801 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/jump_label.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/jump_label.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/jump_label.h</a></div><div class='hunk'>@@ -15,17 +15,23 @@</div><div class='ctx'> </div><div class='ctx'> #define JUMP_LABEL_NOP_SIZE		AARCH64_INSN_SIZE</div><div class='ctx'> </div><div class='add'>+#define JUMP_TABLE_ENTRY(key, label)			\</div><div class='add'>+	".pushsection	__jump_table, \"aw\"\n\t"	\</div><div class='add'>+	".align		3\n\t"				\</div><div class='add'>+	".long		1b - ., %l["#label"] - .\n\t"	\</div><div class='add'>+	".quad		%c0 - .\n\t"			\</div><div class='add'>+	".popsection\n\t"				\</div><div class='add'>+	:  :  "i"(key) :  : label</div><div class='add'>+</div><div class='ctx'> static __always_inline bool arch_static_branch(struct static_key * const key,</div><div class='ctx'> 					       const bool branch)</div><div class='ctx'> {</div><div class='add'>+	char *k = &amp;((char *)key)[branch];</div><div class='add'>+</div><div class='ctx'> 	asm goto(</div><div class='ctx'> 		"1:	nop					\n\t"</div><div class='del'>-		 "	.pushsection	__jump_table, \"aw\"	\n\t"</div><div class='del'>-		 "	.align		3			\n\t"</div><div class='del'>-		 "	.long		1b - ., %l[l_yes] - .	\n\t"</div><div class='del'>-		 "	.quad		%c0 - .			\n\t"</div><div class='del'>-		 "	.popsection				\n\t"</div><div class='del'>-		 :  :  "i"(&amp;((char *)key)[branch]) :  : l_yes);</div><div class='add'>+		JUMP_TABLE_ENTRY(k, l_yes)</div><div class='add'>+		);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> l_yes:</div><div class='hunk'>@@ -35,15 +41,11 @@ l_yes:</div><div class='ctx'> static __always_inline bool arch_static_branch_jump(struct static_key * const key,</div><div class='ctx'> 						    const bool branch)</div><div class='ctx'> {</div><div class='add'>+	char *k = &amp;((char *)key)[branch];</div><div class='ctx'> 	asm goto(</div><div class='ctx'> 		"1:	b		%l[l_yes]		\n\t"</div><div class='del'>-		 "	.pushsection	__jump_table, \"aw\"	\n\t"</div><div class='del'>-		 "	.align		3			\n\t"</div><div class='del'>-		 "	.long		1b - ., %l[l_yes] - .	\n\t"</div><div class='del'>-		 "	.quad		%c0 - .			\n\t"</div><div class='del'>-		 "	.popsection				\n\t"</div><div class='del'>-		 :  :  "i"(&amp;((char *)key)[branch]) :  : l_yes);</div><div class='del'>-</div><div class='add'>+		JUMP_TABLE_ENTRY(k, l_yes)</div><div class='add'>+		);</div><div class='ctx'> 	return false;</div><div class='ctx'> l_yes:</div><div class='ctx'> 	return true;</div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h<br/>index dd9ee67d1d87..b11cfb9fdd37 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/pgtable-prot.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/pgtable-prot.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/pgtable-prot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/pgtable-prot.h</a></div><div class='hunk'>@@ -18,14 +18,21 @@</div><div class='ctx'> #define PTE_DIRTY		(_AT(pteval_t, 1) &lt;&lt; 55)</div><div class='ctx'> #define PTE_SPECIAL		(_AT(pteval_t, 1) &lt;&lt; 56)</div><div class='ctx'> #define PTE_DEVMAP		(_AT(pteval_t, 1) &lt;&lt; 57)</div><div class='del'>-#define PTE_PROT_NONE		(_AT(pteval_t, 1) &lt;&lt; 58) /* only when !PTE_VALID */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This bit indicates that the entry is present i.e. pmd_page()</div><div class='del'>- * still points to a valid huge page in memory even if the pmd</div><div class='del'>- * has been invalidated.</div><div class='add'>+ * PTE_PRESENT_INVALID=1 &amp; PTE_VALID=0 indicates that the pte's fields should be</div><div class='add'>+ * interpreted according to the HW layout by SW but any attempted HW access to</div><div class='add'>+ * the address will result in a fault. pte_present() returns true.</div><div class='ctx'>  */</div><div class='del'>-#define PMD_PRESENT_INVALID	(_AT(pteval_t, 1) &lt;&lt; 59) /* only when !PMD_SECT_VALID */</div><div class='add'>+#define PTE_PRESENT_INVALID	(PTE_NG)		 /* only when !PTE_VALID */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP</div><div class='add'>+#define PTE_UFFD_WP		(_AT(pteval_t, 1) &lt;&lt; 58) /* uffd-wp tracking */</div><div class='add'>+#define PTE_SWP_UFFD_WP		(_AT(pteval_t, 1) &lt;&lt; 3)	 /* only for swp ptes */</div><div class='add'>+#else</div><div class='add'>+#define PTE_UFFD_WP		(_AT(pteval_t, 0))</div><div class='add'>+#define PTE_SWP_UFFD_WP		(_AT(pteval_t, 0))</div><div class='add'>+#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */</div><div class='ctx'> </div><div class='ctx'> #define _PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)</div><div class='ctx'> #define _PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)</div><div class='hunk'>@@ -103,7 +110,7 @@ static inline bool __pure lpa2_is_enabled(void)</div><div class='ctx'> 		__val;							\</div><div class='ctx'> 	 })</div><div class='ctx'> </div><div class='del'>-#define PAGE_NONE		__pgprot(((_PAGE_DEFAULT) &amp; ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)</div><div class='add'>+#define PAGE_NONE		__pgprot(((_PAGE_DEFAULT) &amp; ~PTE_VALID) | PTE_PRESENT_INVALID | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)</div><div class='ctx'> /* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */</div><div class='ctx'> #define PAGE_SHARED		__pgprot(_PAGE_SHARED)</div><div class='ctx'> #define PAGE_SHARED_EXEC	__pgprot(_PAGE_SHARED_EXEC)</div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h<br/>index afdd56d26ad7..bde9fd179388 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/pgtable.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/pgtable.h</a></div><div class='hunk'>@@ -105,7 +105,7 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)</div><div class='ctx'> /*</div><div class='ctx'>  * The following only work if pte_present(). Undefined behaviour otherwise.</div><div class='ctx'>  */</div><div class='del'>-#define pte_present(pte)	(!!(pte_val(pte) &amp; (PTE_VALID | PTE_PROT_NONE)))</div><div class='add'>+#define pte_present(pte)	(pte_valid(pte) || pte_present_invalid(pte))</div><div class='ctx'> #define pte_young(pte)		(!!(pte_val(pte) &amp; PTE_AF))</div><div class='ctx'> #define pte_special(pte)	(!!(pte_val(pte) &amp; PTE_SPECIAL))</div><div class='ctx'> #define pte_write(pte)		(!!(pte_val(pte) &amp; PTE_WRITE))</div><div class='hunk'>@@ -132,6 +132,8 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)</div><div class='ctx'> #define pte_dirty(pte)		(pte_sw_dirty(pte) || pte_hw_dirty(pte))</div><div class='ctx'> </div><div class='ctx'> #define pte_valid(pte)		(!!(pte_val(pte) &amp; PTE_VALID))</div><div class='add'>+#define pte_present_invalid(pte) \</div><div class='add'>+	((pte_val(pte) &amp; (PTE_VALID | PTE_PRESENT_INVALID)) == PTE_PRESENT_INVALID)</div><div class='ctx'> /*</div><div class='ctx'>  * Execute-only user mappings do not have the PTE_USER bit set. All valid</div><div class='ctx'>  * kernel mappings have the PTE_UXN bit set.</div><div class='hunk'>@@ -261,6 +263,13 @@ static inline pte_t pte_mkpresent(pte_t pte)</div><div class='ctx'> 	return set_pte_bit(pte, __pgprot(PTE_VALID));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline pte_t pte_mkinvalid(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	pte = set_pte_bit(pte, __pgprot(PTE_PRESENT_INVALID));</div><div class='add'>+	pte = clear_pte_bit(pte, __pgprot(PTE_VALID));</div><div class='add'>+	return pte;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline pmd_t pmd_mkcont(pmd_t pmd)</div><div class='ctx'> {</div><div class='ctx'> 	return __pmd(pmd_val(pmd) | PMD_SECT_CONT);</div><div class='hunk'>@@ -271,9 +280,31 @@ static inline pte_t pte_mkdevmap(pte_t pte)</div><div class='ctx'> 	return set_pte_bit(pte, __pgprot(PTE_DEVMAP | PTE_SPECIAL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_pte(pte_t *ptep, pte_t pte)</div><div class='add'>+#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP</div><div class='add'>+static inline int pte_uffd_wp(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return !!(pte_val(pte) &amp; PTE_UFFD_WP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pte_t pte_mkuffd_wp(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return pte_wrprotect(set_pte_bit(pte, __pgprot(PTE_UFFD_WP)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pte_t pte_clear_uffd_wp(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return clear_pte_bit(pte, __pgprot(PTE_UFFD_WP));</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */</div><div class='add'>+</div><div class='add'>+static inline void __set_pte_nosync(pte_t *ptep, pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	WRITE_ONCE(*ptep, pte);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __set_pte(pte_t *ptep, pte_t pte)</div><div class='add'>+{</div><div class='add'>+	__set_pte_nosync(ptep, pte);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only if the new pte is valid and kernel, otherwise TLB maintenance</div><div class='hunk'>@@ -463,13 +494,39 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> 	return clear_pte_bit(pte, __pgprot(PTE_SWP_EXCLUSIVE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP</div><div class='add'>+static inline pte_t pte_swp_mkuffd_wp(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return set_pte_bit(pte, __pgprot(PTE_SWP_UFFD_WP));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pte_swp_uffd_wp(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return !!(pte_val(pte) &amp; PTE_SWP_UFFD_WP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pte_t pte_swp_clear_uffd_wp(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return clear_pte_bit(pte, __pgprot(PTE_SWP_UFFD_WP));</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_NUMA_BALANCING</div><div class='ctx'> /*</div><div class='ctx'>  * See the comment in include/linux/pgtable.h</div><div class='ctx'>  */</div><div class='ctx'> static inline int pte_protnone(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return (pte_val(pte) &amp; (PTE_VALID | PTE_PROT_NONE)) == PTE_PROT_NONE;</div><div class='add'>+	/*</div><div class='add'>+	 * pte_present_invalid() tells us that the pte is invalid from HW</div><div class='add'>+	 * perspective but present from SW perspective, so the fields are to be</div><div class='add'>+	 * interpretted as per the HW layout. The second 2 checks are the unique</div><div class='add'>+	 * encoding that we use for PROT_NONE. It is insufficient to only use</div><div class='add'>+	 * the first check because we share the same encoding scheme with pmds</div><div class='add'>+	 * which support pmd_mkinvalid(), so can be present-invalid without</div><div class='add'>+	 * being PROT_NONE.</div><div class='add'>+	 */</div><div class='add'>+	return pte_present_invalid(pte) &amp;&amp; !pte_user(pte) &amp;&amp; !pte_user_exec(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int pmd_protnone(pmd_t pmd)</div><div class='hunk'>@@ -478,12 +535,7 @@ static inline int pmd_protnone(pmd_t pmd)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define pmd_present_invalid(pmd)     (!!(pmd_val(pmd) &amp; PMD_PRESENT_INVALID))</div><div class='del'>-</div><div class='del'>-static inline int pmd_present(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return pte_present(pmd_pte(pmd)) || pmd_present_invalid(pmd);</div><div class='del'>-}</div><div class='add'>+#define pmd_present(pmd)	pte_present(pmd_pte(pmd))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * THP definitions.</div><div class='hunk'>@@ -508,14 +560,16 @@ static inline int pmd_trans_huge(pmd_t pmd)</div><div class='ctx'> #define pmd_mkclean(pmd)	pte_pmd(pte_mkclean(pmd_pte(pmd)))</div><div class='ctx'> #define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))</div><div class='ctx'> #define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))</div><div class='del'>-</div><div class='del'>-static inline pmd_t pmd_mkinvalid(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	pmd = set_pmd_bit(pmd, __pgprot(PMD_PRESENT_INVALID));</div><div class='del'>-	pmd = clear_pmd_bit(pmd, __pgprot(PMD_SECT_VALID));</div><div class='del'>-</div><div class='del'>-	return pmd;</div><div class='del'>-}</div><div class='add'>+#define pmd_mkinvalid(pmd)	pte_pmd(pte_mkinvalid(pmd_pte(pmd)))</div><div class='add'>+#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP</div><div class='add'>+#define pmd_uffd_wp(pmd)	pte_uffd_wp(pmd_pte(pmd))</div><div class='add'>+#define pmd_mkuffd_wp(pmd)	pte_pmd(pte_mkuffd_wp(pmd_pte(pmd)))</div><div class='add'>+#define pmd_clear_uffd_wp(pmd)	pte_pmd(pte_clear_uffd_wp(pmd_pte(pmd)))</div><div class='add'>+#define pmd_swp_uffd_wp(pmd)	pte_swp_uffd_wp(pmd_pte(pmd))</div><div class='add'>+#define pmd_swp_mkuffd_wp(pmd)	pte_pmd(pte_swp_mkuffd_wp(pmd_pte(pmd)))</div><div class='add'>+#define pmd_swp_clear_uffd_wp(pmd) \</div><div class='add'>+				pte_pmd(pte_swp_clear_uffd_wp(pmd_pte(pmd)))</div><div class='add'>+#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */</div><div class='ctx'> </div><div class='ctx'> #define pmd_thp_or_huge(pmd)	(pmd_huge(pmd) || pmd_trans_huge(pmd))</div><div class='ctx'> </div><div class='hunk'>@@ -760,6 +814,7 @@ static inline pmd_t *pud_pgtable(pud_t pud)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='add'>+#define pud_valid(pud)		false</div><div class='ctx'> #define pud_page_paddr(pud)	({ BUILD_BUG(); 0; })</div><div class='ctx'> #define pud_user_exec(pud)	pud_user(pud) /* Always 0 with folding */</div><div class='ctx'> </div><div class='hunk'>@@ -1005,6 +1060,8 @@ static inline p4d_t *p4d_offset_kimg(pgd_t *pgdp, u64 addr)</div><div class='ctx'> </div><div class='ctx'> static inline bool pgtable_l5_enabled(void) { return false; }</div><div class='ctx'> </div><div class='add'>+#define p4d_index(addr)		(((addr) &gt;&gt; P4D_SHIFT) &amp; (PTRS_PER_P4D - 1))</div><div class='add'>+</div><div class='ctx'> /* Match p4d_offset folding in &lt;asm/generic/pgtable-nop4d.h&gt; */</div><div class='ctx'> #define p4d_set_fixmap(addr)		NULL</div><div class='ctx'> #define p4d_set_fixmap_offset(p4dp, addr)	((p4d_t *)p4dp)</div><div class='hunk'>@@ -1027,8 +1084,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> 	 * in MAIR_EL1. The mask below has to include PTE_ATTRINDX_MASK.</div><div class='ctx'> 	 */</div><div class='ctx'> 	const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |</div><div class='del'>-			      PTE_PROT_NONE | PTE_VALID | PTE_WRITE | PTE_GP |</div><div class='del'>-			      PTE_ATTRINDX_MASK;</div><div class='add'>+			      PTE_PRESENT_INVALID | PTE_VALID | PTE_WRITE |</div><div class='add'>+			      PTE_GP | PTE_ATTRINDX_MASK;</div><div class='ctx'> 	/* preserve the hardware dirty information */</div><div class='ctx'> 	if (pte_hw_dirty(pte))</div><div class='ctx'> 		pte = set_pte_bit(pte, __pgprot(PTE_DIRTY));</div><div class='hunk'>@@ -1076,17 +1133,17 @@ static inline int pgd_devmap(pgd_t pgd)</div><div class='ctx'> #ifdef CONFIG_PAGE_TABLE_CHECK</div><div class='ctx'> static inline bool pte_user_accessible_page(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte_present(pte) &amp;&amp; (pte_user(pte) || pte_user_exec(pte));</div><div class='add'>+	return pte_valid(pte) &amp;&amp; (pte_user(pte) || pte_user_exec(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool pmd_user_accessible_page(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	return pmd_leaf(pmd) &amp;&amp; !pmd_present_invalid(pmd) &amp;&amp; (pmd_user(pmd) || pmd_user_exec(pmd));</div><div class='add'>+	return pmd_valid(pmd) &amp;&amp; !pmd_table(pmd) &amp;&amp; (pmd_user(pmd) || pmd_user_exec(pmd));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool pud_user_accessible_page(pud_t pud)</div><div class='ctx'> {</div><div class='del'>-	return pud_leaf(pud) &amp;&amp; (pud_user(pud) || pud_user_exec(pud));</div><div class='add'>+	return pud_valid(pud) &amp;&amp; !pud_table(pud) &amp;&amp; (pud_user(pud) || pud_user_exec(pud));</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1248,15 +1305,16 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,</div><div class='ctx'>  * Encode and decode a swap entry:</div><div class='ctx'>  *	bits 0-1:	present (must be zero)</div><div class='ctx'>  *	bits 2:		remember PG_anon_exclusive</div><div class='del'>- *	bits 3-7:	swap type</div><div class='del'>- *	bits 8-57:	swap offset</div><div class='del'>- *	bit  58:	PTE_PROT_NONE (must be zero)</div><div class='add'>+ *	bit  3:		remember uffd-wp state</div><div class='add'>+ *	bits 6-10:	swap type</div><div class='add'>+ *	bit  11:	PTE_PRESENT_INVALID (must be zero)</div><div class='add'>+ *	bits 12-61:	swap offset</div><div class='ctx'>  */</div><div class='del'>-#define __SWP_TYPE_SHIFT	3</div><div class='add'>+#define __SWP_TYPE_SHIFT	6</div><div class='ctx'> #define __SWP_TYPE_BITS		5</div><div class='del'>-#define __SWP_OFFSET_BITS	50</div><div class='ctx'> #define __SWP_TYPE_MASK		((1 &lt;&lt; __SWP_TYPE_BITS) - 1)</div><div class='del'>-#define __SWP_OFFSET_SHIFT	(__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)</div><div class='add'>+#define __SWP_OFFSET_SHIFT	12</div><div class='add'>+#define __SWP_OFFSET_BITS	50</div><div class='ctx'> #define __SWP_OFFSET_MASK	((1UL &lt;&lt; __SWP_OFFSET_BITS) - 1)</div><div class='ctx'> </div><div class='ctx'> #define __swp_type(x)		(((x).val &gt;&gt; __SWP_TYPE_SHIFT) &amp; __SWP_TYPE_MASK)</div><div class='head'>diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h<br/>index 9e8999592f3a..af3b206fa423 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/sysreg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/sysreg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/sysreg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/sysreg.h</a></div><div class='hunk'>@@ -1036,18 +1036,18 @@</div><div class='ctx'>  * Permission Indirection Extension (PIE) permission encodings.</div><div class='ctx'>  * Encodings with the _O suffix, have overlays applied (Permission Overlay Extension).</div><div class='ctx'>  */</div><div class='del'>-#define PIE_NONE_O	0x0</div><div class='del'>-#define PIE_R_O		0x1</div><div class='del'>-#define PIE_X_O		0x2</div><div class='del'>-#define PIE_RX_O	0x3</div><div class='del'>-#define PIE_RW_O	0x5</div><div class='del'>-#define PIE_RWnX_O	0x6</div><div class='del'>-#define PIE_RWX_O	0x7</div><div class='del'>-#define PIE_R		0x8</div><div class='del'>-#define PIE_GCS		0x9</div><div class='del'>-#define PIE_RX		0xa</div><div class='del'>-#define PIE_RW		0xc</div><div class='del'>-#define PIE_RWX		0xe</div><div class='add'>+#define PIE_NONE_O	UL(0x0)</div><div class='add'>+#define PIE_R_O		UL(0x1)</div><div class='add'>+#define PIE_X_O		UL(0x2)</div><div class='add'>+#define PIE_RX_O	UL(0x3)</div><div class='add'>+#define PIE_RW_O	UL(0x5)</div><div class='add'>+#define PIE_RWnX_O	UL(0x6)</div><div class='add'>+#define PIE_RWX_O	UL(0x7)</div><div class='add'>+#define PIE_R		UL(0x8)</div><div class='add'>+#define PIE_GCS		UL(0x9)</div><div class='add'>+#define PIE_RX		UL(0xa)</div><div class='add'>+#define PIE_RW		UL(0xc)</div><div class='add'>+#define PIE_RWX		UL(0xe)</div><div class='ctx'> </div><div class='ctx'> #define PIRx_ELx_PERM(idx, perm)	((perm) &lt;&lt; ((idx) * 4))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h<br/>index a75de2665d84..95fbc8c05607 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/tlbflush.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/tlbflush.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/tlbflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -142,17 +142,24 @@ static inline unsigned long get_trans_granule(void)</div><div class='ctx'>  * EL1, Inner Shareable".</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-#define __TLBI_VADDR_RANGE(baddr, asid, scale, num, ttl)			\</div><div class='del'>-	({									\</div><div class='del'>-		unsigned long __ta = (baddr);					\</div><div class='del'>-		unsigned long __ttl = (ttl &gt;= 1 &amp;&amp; ttl &lt;= 3) ? ttl : 0;		\</div><div class='del'>-		__ta &amp;= GENMASK_ULL(36, 0);					\</div><div class='del'>-		__ta |= __ttl &lt;&lt; 37;						\</div><div class='del'>-		__ta |= (unsigned long)(num) &lt;&lt; 39;				\</div><div class='del'>-		__ta |= (unsigned long)(scale) &lt;&lt; 44;				\</div><div class='del'>-		__ta |= get_trans_granule() &lt;&lt; 46;				\</div><div class='del'>-		__ta |= (unsigned long)(asid) &lt;&lt; 48;				\</div><div class='del'>-		__ta;								\</div><div class='add'>+#define TLBIR_ASID_MASK		GENMASK_ULL(63, 48)</div><div class='add'>+#define TLBIR_TG_MASK		GENMASK_ULL(47, 46)</div><div class='add'>+#define TLBIR_SCALE_MASK	GENMASK_ULL(45, 44)</div><div class='add'>+#define TLBIR_NUM_MASK		GENMASK_ULL(43, 39)</div><div class='add'>+#define TLBIR_TTL_MASK		GENMASK_ULL(38, 37)</div><div class='add'>+#define TLBIR_BADDR_MASK	GENMASK_ULL(36,  0)</div><div class='add'>+</div><div class='add'>+#define __TLBI_VADDR_RANGE(baddr, asid, scale, num, ttl)		\</div><div class='add'>+	({								\</div><div class='add'>+		unsigned long __ta = 0;					\</div><div class='add'>+		unsigned long __ttl = (ttl &gt;= 1 &amp;&amp; ttl &lt;= 3) ? ttl : 0;	\</div><div class='add'>+		__ta |= FIELD_PREP(TLBIR_BADDR_MASK, baddr);		\</div><div class='add'>+		__ta |= FIELD_PREP(TLBIR_TTL_MASK, __ttl);		\</div><div class='add'>+		__ta |= FIELD_PREP(TLBIR_NUM_MASK, num);		\</div><div class='add'>+		__ta |= FIELD_PREP(TLBIR_SCALE_MASK, scale);		\</div><div class='add'>+		__ta |= FIELD_PREP(TLBIR_TG_MASK, get_trans_granule());	\</div><div class='add'>+		__ta |= FIELD_PREP(TLBIR_ASID_MASK, asid);		\</div><div class='add'>+		__ta;							\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='ctx'> /* These macros are used by the TLBI RANGE feature. */</div><div class='hunk'>@@ -439,11 +446,11 @@ static inline void __flush_tlb_range_nosync(struct vm_area_struct *vma,</div><div class='ctx'> 	 * When not uses TLB range ops, we can handle up to</div><div class='ctx'> 	 * (MAX_DVM_OPS - 1) pages;</div><div class='ctx'> 	 * When uses TLB range ops, we can handle up to</div><div class='del'>-	 * (MAX_TLBI_RANGE_PAGES - 1) pages.</div><div class='add'>+	 * MAX_TLBI_RANGE_PAGES pages.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((!system_supports_tlb_range() &amp;&amp;</div><div class='ctx'> 	     (end - start) &gt;= (MAX_DVM_OPS * stride)) ||</div><div class='del'>-	    pages &gt;= MAX_TLBI_RANGE_PAGES) {</div><div class='add'>+	    pages &gt; MAX_TLBI_RANGE_PAGES) {</div><div class='ctx'> 		flush_tlb_mm(vma-&gt;vm_mm);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h<br/>index a323b109b9c4..0f6ef432fb84 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/topology.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/include/asm/topology.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/topology.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/include/asm/topology.h</a></div><div class='hunk'>@@ -35,9 +35,9 @@ void update_freq_counters_refs(void);</div><div class='ctx'> /* Enable topology flag updates */</div><div class='ctx'> #define arch_update_cpu_topology topology_update_cpu_topology</div><div class='ctx'> </div><div class='del'>-/* Replace task scheduler's default thermal pressure API */</div><div class='del'>-#define arch_scale_thermal_pressure topology_get_thermal_pressure</div><div class='del'>-#define arch_update_thermal_pressure	topology_update_thermal_pressure</div><div class='add'>+/* Replace task scheduler's default HW pressure API */</div><div class='add'>+#define arch_scale_hw_pressure topology_get_hw_pressure</div><div class='add'>+#define arch_update_hw_pressure	topology_update_hw_pressure</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/topology.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c<br/>index dba8fcec7f33..e0e7b93c16cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/acpi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/acpi.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/libfdt.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/serial_core.h&gt;</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;acpi/ghes.h&gt;</div><div class='hunk'>@@ -227,6 +228,15 @@ done:</div><div class='ctx'> 		if (earlycon_acpi_spcr_enable)</div><div class='ctx'> 			early_init_dt_scan_chosen_stdout();</div><div class='ctx'> 	} else {</div><div class='add'>+#ifdef CONFIG_HIBERNATION</div><div class='add'>+		struct acpi_table_header *facs = NULL;</div><div class='add'>+		acpi_get_table(ACPI_SIG_FACS, 1, &amp;facs);</div><div class='add'>+		if (facs) {</div><div class='add'>+			swsusp_hardware_signature =</div><div class='add'>+				((struct acpi_table_facs *)facs)-&gt;hardware_signature;</div><div class='add'>+			acpi_put_table(facs);</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='ctx'> 		acpi_parse_spcr(earlycon_acpi_spcr_enable, true);</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_ACPI_BGRT))</div><div class='ctx'> 			acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt);</div><div class='head'>diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c<br/>index 2f5755192c2b..722ac45f9f7b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/hw_breakpoint.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/hw_breakpoint.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/hw_breakpoint.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/hw_breakpoint.c</a></div><div class='hunk'>@@ -655,7 +655,7 @@ static int breakpoint_handler(unsigned long unused, unsigned long esr,</div><div class='ctx'> 		perf_bp_event(bp, regs);</div><div class='ctx'> </div><div class='ctx'> 		/* Do we need to handle the stepping? */</div><div class='del'>-		if (uses_default_overflow_handler(bp))</div><div class='add'>+		if (is_default_overflow_handler(bp))</div><div class='ctx'> 			step = 1;</div><div class='ctx'> unlock:</div><div class='ctx'> 		rcu_read_unlock();</div><div class='hunk'>@@ -734,7 +734,7 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,</div><div class='ctx'> static int watchpoint_report(struct perf_event *wp, unsigned long addr,</div><div class='ctx'> 			     struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	int step = uses_default_overflow_handler(wp);</div><div class='add'>+	int step = is_default_overflow_handler(wp);</div><div class='ctx'> 	struct arch_hw_breakpoint *info = counter_arch_bp(wp);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;trigger = addr;</div><div class='head'>diff --git a/arch/arm64/kernel/module.c b/arch/arm64/kernel/module.c<br/>index 47e0be610bb6..36b25af56324 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/module.c</a></div><div class='hunk'>@@ -12,144 +12,18 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/kasan.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/scs.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/scs.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='del'>-static u64 module_direct_base __ro_after_init = 0;</div><div class='del'>-static u64 module_plt_base __ro_after_init = 0;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Choose a random page-aligned base address for a window of 'size' bytes which</div><div class='del'>- * entirely contains the interval [start, end - 1].</div><div class='del'>- */</div><div class='del'>-static u64 __init random_bounding_box(u64 size, u64 start, u64 end)</div><div class='del'>-{</div><div class='del'>-	u64 max_pgoff, pgoff;</div><div class='del'>-</div><div class='del'>-	if ((end - start) &gt;= size)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	max_pgoff = (size - (end - start)) / PAGE_SIZE;</div><div class='del'>-	pgoff = get_random_u32_inclusive(0, max_pgoff);</div><div class='del'>-</div><div class='del'>-	return start - pgoff * PAGE_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Modules may directly reference data and text anywhere within the kernel</div><div class='del'>- * image and other modules. References using PREL32 relocations have a +/-2G</div><div class='del'>- * range, and so we need to ensure that the entire kernel image and all modules</div><div class='del'>- * fall within a 2G window such that these are always within range.</div><div class='del'>- *</div><div class='del'>- * Modules may directly branch to functions and code within the kernel text,</div><div class='del'>- * and to functions and code within other modules. These branches will use</div><div class='del'>- * CALL26/JUMP26 relocations with a +/-128M range. Without PLTs, we must ensure</div><div class='del'>- * that the entire kernel text and all module text falls within a 128M window</div><div class='del'>- * such that these are always within range. With PLTs, we can expand this to a</div><div class='del'>- * 2G window.</div><div class='del'>- *</div><div class='del'>- * We chose the 128M region to surround the entire kernel image (rather than</div><div class='del'>- * just the text) as using the same bounds for the 128M and 2G regions ensures</div><div class='del'>- * by construction that we never select a 128M region that is not a subset of</div><div class='del'>- * the 2G region. For very large and unusual kernel configurations this means</div><div class='del'>- * we may fall back to PLTs where they could have been avoided, but this keeps</div><div class='del'>- * the logic significantly simpler.</div><div class='del'>- */</div><div class='del'>-static int __init module_init_limits(void)</div><div class='del'>-{</div><div class='del'>-	u64 kernel_end = (u64)_end;</div><div class='del'>-	u64 kernel_start = (u64)_text;</div><div class='del'>-	u64 kernel_size = kernel_end - kernel_start;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The default modules region is placed immediately below the kernel</div><div class='del'>-	 * image, and is large enough to use the full 2G relocation range.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(KIMAGE_VADDR != MODULES_END);</div><div class='del'>-	BUILD_BUG_ON(MODULES_VSIZE &lt; SZ_2G);</div><div class='del'>-</div><div class='del'>-	if (!kaslr_enabled()) {</div><div class='del'>-		if (kernel_size &lt; SZ_128M)</div><div class='del'>-			module_direct_base = kernel_end - SZ_128M;</div><div class='del'>-		if (kernel_size &lt; SZ_2G)</div><div class='del'>-			module_plt_base = kernel_end - SZ_2G;</div><div class='del'>-	} else {</div><div class='del'>-		u64 min = kernel_start;</div><div class='del'>-		u64 max = kernel_end;</div><div class='del'>-</div><div class='del'>-		if (IS_ENABLED(CONFIG_RANDOMIZE_MODULE_REGION_FULL)) {</div><div class='del'>-			pr_info("2G module region forced by RANDOMIZE_MODULE_REGION_FULL\n");</div><div class='del'>-		} else {</div><div class='del'>-			module_direct_base = random_bounding_box(SZ_128M, min, max);</div><div class='del'>-			if (module_direct_base) {</div><div class='del'>-				min = module_direct_base;</div><div class='del'>-				max = module_direct_base + SZ_128M;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		module_plt_base = random_bounding_box(SZ_2G, min, max);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_info("%llu pages in range for non-PLT usage",</div><div class='del'>-		module_direct_base ? (SZ_128M - kernel_size) / PAGE_SIZE : 0);</div><div class='del'>-	pr_info("%llu pages in range for PLT usage",</div><div class='del'>-		module_plt_base ? (SZ_2G - kernel_size) / PAGE_SIZE : 0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-subsys_initcall(module_init_limits);</div><div class='del'>-</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	void *p = NULL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Where possible, prefer to allocate within direct branch range of the</div><div class='del'>-	 * kernel such that no PLTs are necessary.</div><div class='del'>-	 */</div><div class='del'>-	if (module_direct_base) {</div><div class='del'>-		p = __vmalloc_node_range(size, MODULE_ALIGN,</div><div class='del'>-					 module_direct_base,</div><div class='del'>-					 module_direct_base + SZ_128M,</div><div class='del'>-					 GFP_KERNEL | __GFP_NOWARN,</div><div class='del'>-					 PAGE_KERNEL, 0, NUMA_NO_NODE,</div><div class='del'>-					 __builtin_return_address(0));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!p &amp;&amp; module_plt_base) {</div><div class='del'>-		p = __vmalloc_node_range(size, MODULE_ALIGN,</div><div class='del'>-					 module_plt_base,</div><div class='del'>-					 module_plt_base + SZ_2G,</div><div class='del'>-					 GFP_KERNEL | __GFP_NOWARN,</div><div class='del'>-					 PAGE_KERNEL, 0, NUMA_NO_NODE,</div><div class='del'>-					 __builtin_return_address(0));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!p) {</div><div class='del'>-		pr_warn_ratelimited("%s: unable to allocate memory\n",</div><div class='del'>-				    __func__);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (p &amp;&amp; (kasan_alloc_module_shadow(p, size, GFP_KERNEL) &lt; 0)) {</div><div class='del'>-		vfree(p);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Memory is intended to be executable, reset the pointer tag. */</div><div class='del'>-	return kasan_reset_tag(p);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> enum aarch64_reloc_op {</div><div class='ctx'> 	RELOC_OP_NONE,</div><div class='ctx'> 	RELOC_OP_ABS,</div><div class='head'>diff --git a/arch/arm64/kernel/perf_callchain.c b/arch/arm64/kernel/perf_callchain.c<br/>index 6d157f32187b..e8ed5673f481 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/perf_callchain.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/perf_callchain.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/perf_callchain.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/perf_callchain.c</a></div><div class='hunk'>@@ -10,94 +10,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pointer_auth.h&gt;</div><div class='ctx'> </div><div class='del'>-struct frame_tail {</div><div class='del'>-	struct frame_tail	__user *fp;</div><div class='del'>-	unsigned long		lr;</div><div class='del'>-} __attribute__((packed));</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the return address for a single stackframe and return a pointer to the</div><div class='del'>- * next frame tail.</div><div class='del'>- */</div><div class='del'>-static struct frame_tail __user *</div><div class='del'>-user_backtrace(struct frame_tail __user *tail,</div><div class='del'>-	       struct perf_callchain_entry_ctx *entry)</div><div class='del'>-{</div><div class='del'>-	struct frame_tail buftail;</div><div class='del'>-	unsigned long err;</div><div class='del'>-	unsigned long lr;</div><div class='del'>-</div><div class='del'>-	/* Also check accessibility of one struct frame_tail beyond */</div><div class='del'>-	if (!access_ok(tail, sizeof(buftail)))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pagefault_disable();</div><div class='del'>-	err = __copy_from_user_inatomic(&amp;buftail, tail, sizeof(buftail));</div><div class='del'>-	pagefault_enable();</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	lr = ptrauth_strip_user_insn_pac(buftail.lr);</div><div class='del'>-</div><div class='del'>-	perf_callchain_store(entry, lr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Frame pointers should strictly progress back up the stack</div><div class='del'>-	 * (towards higher addresses).</div><div class='del'>-	 */</div><div class='del'>-	if (tail &gt;= buftail.fp)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return buftail.fp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_COMPAT</div><div class='del'>-/*</div><div class='del'>- * The registers we're interested in are at the end of the variable</div><div class='del'>- * length saved register structure. The fp points at the end of this</div><div class='del'>- * structure so the address of this struct is:</div><div class='del'>- * (struct compat_frame_tail *)(xxx-&gt;fp)-1</div><div class='del'>- *</div><div class='del'>- * This code has been adapted from the ARM OProfile support.</div><div class='del'>- */</div><div class='del'>-struct compat_frame_tail {</div><div class='del'>-	compat_uptr_t	fp; /* a (struct compat_frame_tail *) in compat mode */</div><div class='del'>-	u32		sp;</div><div class='del'>-	u32		lr;</div><div class='del'>-} __attribute__((packed));</div><div class='del'>-</div><div class='del'>-static struct compat_frame_tail __user *</div><div class='del'>-compat_user_backtrace(struct compat_frame_tail __user *tail,</div><div class='del'>-		      struct perf_callchain_entry_ctx *entry)</div><div class='add'>+static bool callchain_trace(void *data, unsigned long pc)</div><div class='ctx'> {</div><div class='del'>-	struct compat_frame_tail buftail;</div><div class='del'>-	unsigned long err;</div><div class='del'>-</div><div class='del'>-	/* Also check accessibility of one struct frame_tail beyond */</div><div class='del'>-	if (!access_ok(tail, sizeof(buftail)))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pagefault_disable();</div><div class='del'>-	err = __copy_from_user_inatomic(&amp;buftail, tail, sizeof(buftail));</div><div class='del'>-	pagefault_enable();</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	perf_callchain_store(entry, buftail.lr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Frame pointers should strictly progress back up the stack</div><div class='del'>-	 * (towards higher addresses).</div><div class='del'>-	 */</div><div class='del'>-	if (tail + 1 &gt;= (struct compat_frame_tail __user *)</div><div class='del'>-			compat_ptr(buftail.fp))</div><div class='del'>-		return NULL;</div><div class='add'>+	struct perf_callchain_entry_ctx *entry = data;</div><div class='ctx'> </div><div class='del'>-	return (struct compat_frame_tail __user *)compat_ptr(buftail.fp) - 1;</div><div class='add'>+	return perf_callchain_store(entry, pc) == 0;</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_COMPAT */</div><div class='ctx'> </div><div class='ctx'> void perf_callchain_user(struct perf_callchain_entry_ctx *entry,</div><div class='ctx'> 			 struct pt_regs *regs)</div><div class='hunk'>@@ -107,35 +25,7 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	perf_callchain_store(entry, regs-&gt;pc);</div><div class='del'>-</div><div class='del'>-	if (!compat_user_mode(regs)) {</div><div class='del'>-		/* AARCH64 mode */</div><div class='del'>-		struct frame_tail __user *tail;</div><div class='del'>-</div><div class='del'>-		tail = (struct frame_tail __user *)regs-&gt;regs[29];</div><div class='del'>-</div><div class='del'>-		while (entry-&gt;nr &lt; entry-&gt;max_stack &amp;&amp;</div><div class='del'>-		       tail &amp;&amp; !((unsigned long)tail &amp; 0x7))</div><div class='del'>-			tail = user_backtrace(tail, entry);</div><div class='del'>-	} else {</div><div class='del'>-#ifdef CONFIG_COMPAT</div><div class='del'>-		/* AARCH32 compat mode */</div><div class='del'>-		struct compat_frame_tail __user *tail;</div><div class='del'>-</div><div class='del'>-		tail = (struct compat_frame_tail __user *)regs-&gt;compat_fp - 1;</div><div class='del'>-</div><div class='del'>-		while ((entry-&gt;nr &lt; entry-&gt;max_stack) &amp;&amp;</div><div class='del'>-			tail &amp;&amp; !((unsigned long)tail &amp; 0x3))</div><div class='del'>-			tail = compat_user_backtrace(tail, entry);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool callchain_trace(void *data, unsigned long pc)</div><div class='del'>-{</div><div class='del'>-	struct perf_callchain_entry_ctx *entry = data;</div><div class='del'>-	return perf_callchain_store(entry, pc) == 0;</div><div class='add'>+	arch_stack_walk_user(callchain_trace, entry, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,</div><div class='head'>diff --git a/arch/arm64/kernel/pi/idreg-override.c b/arch/arm64/kernel/pi/idreg-override.c<br/>index aad399796e81..48c1aa456af9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/idreg-override.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/pi/idreg-override.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/idreg-override.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/pi/idreg-override.c</a></div><div class='hunk'>@@ -108,6 +108,7 @@ static const struct ftr_set_desc pfr0 __prel64_initconst = {</div><div class='ctx'> 	.override	= &amp;id_aa64pfr0_override,</div><div class='ctx'> 	.fields		= {</div><div class='ctx'> 	        FIELD("sve", ID_AA64PFR0_EL1_SVE_SHIFT, pfr0_sve_filter),</div><div class='add'>+		FIELD("el0", ID_AA64PFR0_EL1_EL0_SHIFT, NULL),</div><div class='ctx'> 		{}</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -223,6 +224,7 @@ static const struct {</div><div class='ctx'> 	{ "nokaslr",			"arm64_sw.nokaslr=1" },</div><div class='ctx'> 	{ "rodata=off",			"arm64_sw.rodataoff=1" },</div><div class='ctx'> 	{ "arm64.nolva",		"id_aa64mmfr2.varange=0" },</div><div class='add'>+	{ "arm64.no32bit_el0",		"id_aa64pfr0.el0=1" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init parse_hexdigit(const char *p, u64 *v)</div><div class='head'>diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c<br/>index 327855a11df2..4268678d0e86 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/probes/kprobes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/probes/kprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/probes/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/probes/kprobes.c</a></div><div class='hunk'>@@ -129,13 +129,6 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *alloc_insn_page(void)</div><div class='del'>-{</div><div class='del'>-	return __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, VMALLOC_END,</div><div class='del'>-			GFP_KERNEL, PAGE_KERNEL_ROX, VM_FLUSH_RESET_PERMS,</div><div class='del'>-			NUMA_NO_NODE, __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* arm kprobe: install breakpoint in text */</div><div class='ctx'> void __kprobes arch_arm_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c<br/>index 65a052bf741f..a096e2451044 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/setup.c</a></div><div class='hunk'>@@ -298,8 +298,15 @@ void __init __no_sanitize_address setup_arch(char **cmdline_p)</div><div class='ctx'> 	dynamic_scs_init();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Unmask SError as soon as possible after initializing earlycon so</div><div class='del'>-	 * that we can report any SErrors immediately.</div><div class='add'>+	 * The primary CPU enters the kernel with all DAIF exceptions masked.</div><div class='add'>+	 *</div><div class='add'>+	 * We must unmask Debug and SError before preemption or scheduling is</div><div class='add'>+	 * possible to ensure that these are consistently unmasked across</div><div class='add'>+	 * threads, and we want to unmask SError as soon as possible after</div><div class='add'>+	 * initializing earlycon so that we can report any SErrors immediately.</div><div class='add'>+	 *</div><div class='add'>+	 * IRQ and FIQ will be unmasked after the root irqchip has been</div><div class='add'>+	 * detected and initialized.</div><div class='ctx'> 	 */</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX_NOIRQ);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c<br/>index 4ced34f62dab..31c8b3094dd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/smp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/smp.c</a></div><div class='hunk'>@@ -264,6 +264,13 @@ asmlinkage notrace void secondary_start_kernel(void)</div><div class='ctx'> 	set_cpu_online(cpu, true);</div><div class='ctx'> 	complete(&amp;cpu_running);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Secondary CPUs enter the kernel with all DAIF exceptions masked.</div><div class='add'>+	 *</div><div class='add'>+	 * As with setup_arch() we must unmask Debug and SError exceptions, and</div><div class='add'>+	 * as the root irqchip has already been detected and initialized we can</div><div class='add'>+	 * unmask IRQ and FIQ at the same time.</div><div class='add'>+	 */</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c<br/>index 684c26511696..6b3258860377 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/stacktrace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kernel/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/stacktrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kernel/stacktrace.c</a></div><div class='hunk'>@@ -324,3 +324,123 @@ void show_stack(struct task_struct *tsk, unsigned long *sp, const char *loglvl)</div><div class='ctx'> 	dump_backtrace(NULL, tsk, loglvl);</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The struct defined for userspace stack frame in AARCH64 mode.</div><div class='add'>+ */</div><div class='add'>+struct frame_tail {</div><div class='add'>+	struct frame_tail	__user *fp;</div><div class='add'>+	unsigned long		lr;</div><div class='add'>+} __attribute__((packed));</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get the return address for a single stackframe and return a pointer to the</div><div class='add'>+ * next frame tail.</div><div class='add'>+ */</div><div class='add'>+static struct frame_tail __user *</div><div class='add'>+unwind_user_frame(struct frame_tail __user *tail, void *cookie,</div><div class='add'>+	       stack_trace_consume_fn consume_entry)</div><div class='add'>+{</div><div class='add'>+	struct frame_tail buftail;</div><div class='add'>+	unsigned long err;</div><div class='add'>+	unsigned long lr;</div><div class='add'>+</div><div class='add'>+	/* Also check accessibility of one struct frame_tail beyond */</div><div class='add'>+	if (!access_ok(tail, sizeof(buftail)))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pagefault_disable();</div><div class='add'>+	err = __copy_from_user_inatomic(&amp;buftail, tail, sizeof(buftail));</div><div class='add'>+	pagefault_enable();</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	lr = ptrauth_strip_user_insn_pac(buftail.lr);</div><div class='add'>+</div><div class='add'>+	if (!consume_entry(cookie, lr))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Frame pointers should strictly progress back up the stack</div><div class='add'>+	 * (towards higher addresses).</div><div class='add'>+	 */</div><div class='add'>+	if (tail &gt;= buftail.fp)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return buftail.fp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+/*</div><div class='add'>+ * The registers we're interested in are at the end of the variable</div><div class='add'>+ * length saved register structure. The fp points at the end of this</div><div class='add'>+ * structure so the address of this struct is:</div><div class='add'>+ * (struct compat_frame_tail *)(xxx-&gt;fp)-1</div><div class='add'>+ *</div><div class='add'>+ * This code has been adapted from the ARM OProfile support.</div><div class='add'>+ */</div><div class='add'>+struct compat_frame_tail {</div><div class='add'>+	compat_uptr_t	fp; /* a (struct compat_frame_tail *) in compat mode */</div><div class='add'>+	u32		sp;</div><div class='add'>+	u32		lr;</div><div class='add'>+} __attribute__((packed));</div><div class='add'>+</div><div class='add'>+static struct compat_frame_tail __user *</div><div class='add'>+unwind_compat_user_frame(struct compat_frame_tail __user *tail, void *cookie,</div><div class='add'>+				stack_trace_consume_fn consume_entry)</div><div class='add'>+{</div><div class='add'>+	struct compat_frame_tail buftail;</div><div class='add'>+	unsigned long err;</div><div class='add'>+</div><div class='add'>+	/* Also check accessibility of one struct frame_tail beyond */</div><div class='add'>+	if (!access_ok(tail, sizeof(buftail)))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pagefault_disable();</div><div class='add'>+	err = __copy_from_user_inatomic(&amp;buftail, tail, sizeof(buftail));</div><div class='add'>+	pagefault_enable();</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!consume_entry(cookie, buftail.lr))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Frame pointers should strictly progress back up the stack</div><div class='add'>+	 * (towards higher addresses).</div><div class='add'>+	 */</div><div class='add'>+	if (tail + 1 &gt;= (struct compat_frame_tail __user *)</div><div class='add'>+			compat_ptr(buftail.fp))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return (struct compat_frame_tail __user *)compat_ptr(buftail.fp) - 1;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_COMPAT */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void arch_stack_walk_user(stack_trace_consume_fn consume_entry, void *cookie,</div><div class='add'>+					const struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (!consume_entry(cookie, regs-&gt;pc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!compat_user_mode(regs)) {</div><div class='add'>+		/* AARCH64 mode */</div><div class='add'>+		struct frame_tail __user *tail;</div><div class='add'>+</div><div class='add'>+		tail = (struct frame_tail __user *)regs-&gt;regs[29];</div><div class='add'>+		while (tail &amp;&amp; !((unsigned long)tail &amp; 0x7))</div><div class='add'>+			tail = unwind_user_frame(tail, cookie, consume_entry);</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+		/* AARCH32 compat mode */</div><div class='add'>+		struct compat_frame_tail __user *tail;</div><div class='add'>+</div><div class='add'>+		tail = (struct compat_frame_tail __user *)regs-&gt;compat_fp - 1;</div><div class='add'>+		while (tail &amp;&amp; !((unsigned long)tail &amp; 0x3))</div><div class='add'>+			tail = unwind_compat_user_frame(tail, cookie, consume_entry);</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-kvm-device.c b/arch/arm64/kvm/vgic/vgic-kvm-device.c<br/>index f48b8dab8b3d..1d26bb5b02f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-kvm-device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/kvm/vgic/vgic-kvm-device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-kvm-device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/kvm/vgic/vgic-kvm-device.c</a></div><div class='hunk'>@@ -338,12 +338,12 @@ int kvm_register_vgic_device(unsigned long type)</div><div class='ctx'> int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='ctx'> 		       struct vgic_reg_attr *reg_attr)</div><div class='ctx'> {</div><div class='del'>-	int cpuid;</div><div class='add'>+	int cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr-&gt;attr);</div><div class='ctx'> </div><div class='del'>-	cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr-&gt;attr);</div><div class='del'>-</div><div class='del'>-	reg_attr-&gt;vcpu = kvm_get_vcpu_by_id(dev-&gt;kvm, cpuid);</div><div class='ctx'> 	reg_attr-&gt;addr = attr-&gt;attr &amp; KVM_DEV_ARM_VGIC_OFFSET_MASK;</div><div class='add'>+	reg_attr-&gt;vcpu = kvm_get_vcpu_by_id(dev-&gt;kvm, cpuid);</div><div class='add'>+	if (!reg_attr-&gt;vcpu)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/lib/insn.c b/arch/arm64/lib/insn.c<br/>index a635ab83fee3..b008a9b46a7f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/lib/insn.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/lib/insn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/insn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/lib/insn.c</a></div><div class='hunk'>@@ -1515,3 +1515,14 @@ u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='ctx'> </div><div class='ctx'> 	return insn;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,</div><div class='add'>+			 enum aarch64_insn_system_register sysreg)</div><div class='add'>+{</div><div class='add'>+	u32 insn = aarch64_insn_get_mrs_value();</div><div class='add'>+</div><div class='add'>+	insn &amp;= ~GENMASK(19, 0);</div><div class='add'>+	insn |= sysreg &lt;&lt; 5;</div><div class='add'>+	return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT,</div><div class='add'>+					    insn, result);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c<br/>index 03efd86dce0a..9b5ab6818f7f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/mm/init.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;linux/acpi_iort.h&gt;</div><div class='ctx'> #include &lt;linux/kmemleak.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/boot.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='hunk'>@@ -432,3 +433,142 @@ void dump_mem_limit(void)</div><div class='ctx'> 		pr_emerg("Memory Limit: none\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static u64 module_direct_base __ro_after_init = 0;</div><div class='add'>+static u64 module_plt_base __ro_after_init = 0;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Choose a random page-aligned base address for a window of 'size' bytes which</div><div class='add'>+ * entirely contains the interval [start, end - 1].</div><div class='add'>+ */</div><div class='add'>+static u64 __init random_bounding_box(u64 size, u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	u64 max_pgoff, pgoff;</div><div class='add'>+</div><div class='add'>+	if ((end - start) &gt;= size)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	max_pgoff = (size - (end - start)) / PAGE_SIZE;</div><div class='add'>+	pgoff = get_random_u32_inclusive(0, max_pgoff);</div><div class='add'>+</div><div class='add'>+	return start - pgoff * PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Modules may directly reference data and text anywhere within the kernel</div><div class='add'>+ * image and other modules. References using PREL32 relocations have a +/-2G</div><div class='add'>+ * range, and so we need to ensure that the entire kernel image and all modules</div><div class='add'>+ * fall within a 2G window such that these are always within range.</div><div class='add'>+ *</div><div class='add'>+ * Modules may directly branch to functions and code within the kernel text,</div><div class='add'>+ * and to functions and code within other modules. These branches will use</div><div class='add'>+ * CALL26/JUMP26 relocations with a +/-128M range. Without PLTs, we must ensure</div><div class='add'>+ * that the entire kernel text and all module text falls within a 128M window</div><div class='add'>+ * such that these are always within range. With PLTs, we can expand this to a</div><div class='add'>+ * 2G window.</div><div class='add'>+ *</div><div class='add'>+ * We chose the 128M region to surround the entire kernel image (rather than</div><div class='add'>+ * just the text) as using the same bounds for the 128M and 2G regions ensures</div><div class='add'>+ * by construction that we never select a 128M region that is not a subset of</div><div class='add'>+ * the 2G region. For very large and unusual kernel configurations this means</div><div class='add'>+ * we may fall back to PLTs where they could have been avoided, but this keeps</div><div class='add'>+ * the logic significantly simpler.</div><div class='add'>+ */</div><div class='add'>+static int __init module_init_limits(void)</div><div class='add'>+{</div><div class='add'>+	u64 kernel_end = (u64)_end;</div><div class='add'>+	u64 kernel_start = (u64)_text;</div><div class='add'>+	u64 kernel_size = kernel_end - kernel_start;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The default modules region is placed immediately below the kernel</div><div class='add'>+	 * image, and is large enough to use the full 2G relocation range.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(KIMAGE_VADDR != MODULES_END);</div><div class='add'>+	BUILD_BUG_ON(MODULES_VSIZE &lt; SZ_2G);</div><div class='add'>+</div><div class='add'>+	if (!kaslr_enabled()) {</div><div class='add'>+		if (kernel_size &lt; SZ_128M)</div><div class='add'>+			module_direct_base = kernel_end - SZ_128M;</div><div class='add'>+		if (kernel_size &lt; SZ_2G)</div><div class='add'>+			module_plt_base = kernel_end - SZ_2G;</div><div class='add'>+	} else {</div><div class='add'>+		u64 min = kernel_start;</div><div class='add'>+		u64 max = kernel_end;</div><div class='add'>+</div><div class='add'>+		if (IS_ENABLED(CONFIG_RANDOMIZE_MODULE_REGION_FULL)) {</div><div class='add'>+			pr_info("2G module region forced by RANDOMIZE_MODULE_REGION_FULL\n");</div><div class='add'>+		} else {</div><div class='add'>+			module_direct_base = random_bounding_box(SZ_128M, min, max);</div><div class='add'>+			if (module_direct_base) {</div><div class='add'>+				min = module_direct_base;</div><div class='add'>+				max = module_direct_base + SZ_128M;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		module_plt_base = random_bounding_box(SZ_2G, min, max);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("%llu pages in range for non-PLT usage",</div><div class='add'>+		module_direct_base ? (SZ_128M - kernel_size) / PAGE_SIZE : 0);</div><div class='add'>+	pr_info("%llu pages in range for PLT usage",</div><div class='add'>+		module_plt_base ? (SZ_2G - kernel_size) / PAGE_SIZE : 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long fallback_start = 0, fallback_end = 0;</div><div class='add'>+	unsigned long start = 0, end = 0;</div><div class='add'>+</div><div class='add'>+	module_init_limits();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Where possible, prefer to allocate within direct branch range of the</div><div class='add'>+	 * kernel such that no PLTs are necessary.</div><div class='add'>+	 */</div><div class='add'>+	if (module_direct_base) {</div><div class='add'>+		start = module_direct_base;</div><div class='add'>+		end = module_direct_base + SZ_128M;</div><div class='add'>+</div><div class='add'>+		if (module_plt_base) {</div><div class='add'>+			fallback_start = module_plt_base;</div><div class='add'>+			fallback_end = module_plt_base + SZ_2G;</div><div class='add'>+		}</div><div class='add'>+	} else if (module_plt_base) {</div><div class='add'>+		start = module_plt_base;</div><div class='add'>+		end = module_plt_base + SZ_2G;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= start,</div><div class='add'>+				.end	= end,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+				.fallback_start	= fallback_start,</div><div class='add'>+				.fallback_end	= fallback_end,</div><div class='add'>+			},</div><div class='add'>+			[EXECMEM_KPROBES] = {</div><div class='add'>+				.start	= VMALLOC_START,</div><div class='add'>+				.end	= VMALLOC_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL_ROX,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+			[EXECMEM_BPF] = {</div><div class='add'>+				.start	= VMALLOC_START,</div><div class='add'>+				.end	= VMALLOC_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c<br/>index 495b732d5af3..c927e9312f10 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/mmu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/mm/mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/mm/mmu.c</a></div><div class='hunk'>@@ -109,28 +109,12 @@ EXPORT_SYMBOL(phys_mem_access_prot);</div><div class='ctx'> static phys_addr_t __init early_pgtable_alloc(int shift)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t phys;</div><div class='del'>-	void *ptr;</div><div class='ctx'> </div><div class='ctx'> 	phys = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0,</div><div class='ctx'> 					 MEMBLOCK_ALLOC_NOLEAKTRACE);</div><div class='ctx'> 	if (!phys)</div><div class='ctx'> 		panic("Failed to allocate page table page\n");</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE</div><div class='del'>-	 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise</div><div class='del'>-	 * any level of table.</div><div class='del'>-	 */</div><div class='del'>-	ptr = pte_set_fixmap(phys);</div><div class='del'>-</div><div class='del'>-	memset(ptr, 0, PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Implicit barriers also ensure the zeroed page is visible to the page</div><div class='del'>-	 * table walker</div><div class='del'>-	 */</div><div class='del'>-	pte_clear_fixmap();</div><div class='del'>-</div><div class='ctx'> 	return phys;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -172,16 +156,25 @@ bool pgattr_change_is_safe(u64 old, u64 new)</div><div class='ctx'> 	return ((old ^ new) &amp; ~mask) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end,</div><div class='del'>-		     phys_addr_t phys, pgprot_t prot)</div><div class='add'>+static void init_clear_pgtable(void *table)</div><div class='ctx'> {</div><div class='del'>-	pte_t *ptep;</div><div class='add'>+	clear_page(table);</div><div class='ctx'> </div><div class='del'>-	ptep = pte_set_fixmap_offset(pmdp, addr);</div><div class='add'>+	/* Ensure the zeroing is observed by page table walks. */</div><div class='add'>+	dsb(ishst);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void init_pte(pte_t *ptep, unsigned long addr, unsigned long end,</div><div class='add'>+		     phys_addr_t phys, pgprot_t prot)</div><div class='add'>+{</div><div class='ctx'> 	do {</div><div class='ctx'> 		pte_t old_pte = __ptep_get(ptep);</div><div class='ctx'> </div><div class='del'>-		__set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot));</div><div class='add'>+		/*</div><div class='add'>+		 * Required barriers to make this visible to the table walker</div><div class='add'>+		 * are deferred to the end of alloc_init_cont_pte().</div><div class='add'>+		 */</div><div class='add'>+		__set_pte_nosync(ptep, pfn_pte(__phys_to_pfn(phys), prot));</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * After the PTE entry has been populated once, we</div><div class='hunk'>@@ -192,8 +185,6 @@ static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end,</div><div class='ctx'> </div><div class='ctx'> 		phys += PAGE_SIZE;</div><div class='ctx'> 	} while (ptep++, addr += PAGE_SIZE, addr != end);</div><div class='del'>-</div><div class='del'>-	pte_clear_fixmap();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='hunk'>@@ -204,6 +195,7 @@ static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='ctx'> 	pmd_t pmd = READ_ONCE(*pmdp);</div><div class='add'>+	pte_t *ptep;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(pmd_sect(pmd));</div><div class='ctx'> 	if (pmd_none(pmd)) {</div><div class='hunk'>@@ -214,10 +206,14 @@ static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> 			pmdval |= PMD_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='ctx'> 		pte_phys = pgtable_alloc(PAGE_SHIFT);</div><div class='add'>+		ptep = pte_set_fixmap(pte_phys);</div><div class='add'>+		init_clear_pgtable(ptep);</div><div class='add'>+		ptep += pte_index(addr);</div><div class='ctx'> 		__pmd_populate(pmdp, pte_phys, pmdval);</div><div class='del'>-		pmd = READ_ONCE(*pmdp);</div><div class='add'>+	} else {</div><div class='add'>+		BUG_ON(pmd_bad(pmd));</div><div class='add'>+		ptep = pte_set_fixmap_offset(pmdp, addr);</div><div class='ctx'> 	}</div><div class='del'>-	BUG_ON(pmd_bad(pmd));</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		pgprot_t __prot = prot;</div><div class='hunk'>@@ -229,20 +225,26 @@ static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> 		    (flags &amp; NO_CONT_MAPPINGS) == 0)</div><div class='ctx'> 			__prot = __pgprot(pgprot_val(prot) | PTE_CONT);</div><div class='ctx'> </div><div class='del'>-		init_pte(pmdp, addr, next, phys, __prot);</div><div class='add'>+		init_pte(ptep, addr, next, phys, __prot);</div><div class='ctx'> </div><div class='add'>+		ptep += pte_index(next) - pte_index(addr);</div><div class='ctx'> 		phys += next - addr;</div><div class='ctx'> 	} while (addr = next, addr != end);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Note: barriers and maintenance necessary to clear the fixmap slot</div><div class='add'>+	 * ensure that all previous pgtable writes are visible to the table</div><div class='add'>+	 * walker.</div><div class='add'>+	 */</div><div class='add'>+	pte_clear_fixmap();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end,</div><div class='add'>+static void init_pmd(pmd_t *pmdp, unsigned long addr, unsigned long end,</div><div class='ctx'> 		     phys_addr_t phys, pgprot_t prot,</div><div class='ctx'> 		     phys_addr_t (*pgtable_alloc)(int), int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='del'>-	pmd_t *pmdp;</div><div class='ctx'> </div><div class='del'>-	pmdp = pmd_set_fixmap_offset(pudp, addr);</div><div class='ctx'> 	do {</div><div class='ctx'> 		pmd_t old_pmd = READ_ONCE(*pmdp);</div><div class='ctx'> </div><div class='hunk'>@@ -268,8 +270,6 @@ static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end,</div><div class='ctx'> 		}</div><div class='ctx'> 		phys += next - addr;</div><div class='ctx'> 	} while (pmdp++, addr = next, addr != end);</div><div class='del'>-</div><div class='del'>-	pmd_clear_fixmap();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='hunk'>@@ -279,6 +279,7 @@ static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='ctx'> 	pud_t pud = READ_ONCE(*pudp);</div><div class='add'>+	pmd_t *pmdp;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check for initial section mappings in the pgd/pud.</div><div class='hunk'>@@ -292,10 +293,14 @@ static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> 			pudval |= PUD_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='ctx'> 		pmd_phys = pgtable_alloc(PMD_SHIFT);</div><div class='add'>+		pmdp = pmd_set_fixmap(pmd_phys);</div><div class='add'>+		init_clear_pgtable(pmdp);</div><div class='add'>+		pmdp += pmd_index(addr);</div><div class='ctx'> 		__pud_populate(pudp, pmd_phys, pudval);</div><div class='del'>-		pud = READ_ONCE(*pudp);</div><div class='add'>+	} else {</div><div class='add'>+		BUG_ON(pud_bad(pud));</div><div class='add'>+		pmdp = pmd_set_fixmap_offset(pudp, addr);</div><div class='ctx'> 	}</div><div class='del'>-	BUG_ON(pud_bad(pud));</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		pgprot_t __prot = prot;</div><div class='hunk'>@@ -307,10 +312,13 @@ static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> 		    (flags &amp; NO_CONT_MAPPINGS) == 0)</div><div class='ctx'> 			__prot = __pgprot(pgprot_val(prot) | PTE_CONT);</div><div class='ctx'> </div><div class='del'>-		init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags);</div><div class='add'>+		init_pmd(pmdp, addr, next, phys, __prot, pgtable_alloc, flags);</div><div class='ctx'> </div><div class='add'>+		pmdp += pmd_index(next) - pmd_index(addr);</div><div class='ctx'> 		phys += next - addr;</div><div class='ctx'> 	} while (addr = next, addr != end);</div><div class='add'>+</div><div class='add'>+	pmd_clear_fixmap();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end,</div><div class='hunk'>@@ -330,12 +338,15 @@ static void alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end,</div><div class='ctx'> 			p4dval |= P4D_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='ctx'> 		pud_phys = pgtable_alloc(PUD_SHIFT);</div><div class='add'>+		pudp = pud_set_fixmap(pud_phys);</div><div class='add'>+		init_clear_pgtable(pudp);</div><div class='add'>+		pudp += pud_index(addr);</div><div class='ctx'> 		__p4d_populate(p4dp, pud_phys, p4dval);</div><div class='del'>-		p4d = READ_ONCE(*p4dp);</div><div class='add'>+	} else {</div><div class='add'>+		BUG_ON(p4d_bad(p4d));</div><div class='add'>+		pudp = pud_set_fixmap_offset(p4dp, addr);</div><div class='ctx'> 	}</div><div class='del'>-	BUG_ON(p4d_bad(p4d));</div><div class='ctx'> </div><div class='del'>-	pudp = pud_set_fixmap_offset(p4dp, addr);</div><div class='ctx'> 	do {</div><div class='ctx'> 		pud_t old_pud = READ_ONCE(*pudp);</div><div class='ctx'> </div><div class='hunk'>@@ -385,12 +396,15 @@ static void alloc_init_p4d(pgd_t *pgdp, unsigned long addr, unsigned long end,</div><div class='ctx'> 			pgdval |= PGD_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='ctx'> 		p4d_phys = pgtable_alloc(P4D_SHIFT);</div><div class='add'>+		p4dp = p4d_set_fixmap(p4d_phys);</div><div class='add'>+		init_clear_pgtable(p4dp);</div><div class='add'>+		p4dp += p4d_index(addr);</div><div class='ctx'> 		__pgd_populate(pgdp, p4d_phys, pgdval);</div><div class='del'>-		pgd = READ_ONCE(*pgdp);</div><div class='add'>+	} else {</div><div class='add'>+		BUG_ON(pgd_bad(pgd));</div><div class='add'>+		p4dp = p4d_set_fixmap_offset(pgdp, addr);</div><div class='ctx'> 	}</div><div class='del'>-	BUG_ON(pgd_bad(pgd));</div><div class='ctx'> </div><div class='del'>-	p4dp = p4d_set_fixmap_offset(pgdp, addr);</div><div class='ctx'> 	do {</div><div class='ctx'> 		p4d_t old_p4d = READ_ONCE(*p4dp);</div><div class='ctx'> </div><div class='hunk'>@@ -457,11 +471,10 @@ void create_kpti_ng_temp_pgd(pgd_t *pgdir, phys_addr_t phys, unsigned long virt,</div><div class='ctx'> </div><div class='ctx'> static phys_addr_t __pgd_pgtable_alloc(int shift)</div><div class='ctx'> {</div><div class='del'>-	void *ptr = (void *)__get_free_page(GFP_PGTABLE_KERNEL);</div><div class='del'>-	BUG_ON(!ptr);</div><div class='add'>+	/* Page is zeroed by init_clear_pgtable() so don't duplicate effort. */</div><div class='add'>+	void *ptr = (void *)__get_free_page(GFP_PGTABLE_KERNEL &amp; ~__GFP_ZERO);</div><div class='ctx'> </div><div class='del'>-	/* Ensure the zeroed page is visible to the page table walker */</div><div class='del'>-	dsb(ishst);</div><div class='add'>+	BUG_ON(!ptr);</div><div class='ctx'> 	return __pa(ptr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S<br/>index 9d40f3ffd8d2..f4bc6c5bac06 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/proc.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/mm/proc.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/proc.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/mm/proc.S</a></div><div class='hunk'>@@ -135,14 +135,6 @@ SYM_FUNC_START(cpu_do_resume)</div><div class='ctx'> </div><div class='ctx'> 	msr	tcr_el1, x8</div><div class='ctx'> 	msr	vbar_el1, x9</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * __cpu_setup() cleared MDSCR_EL1.MDE and friends, before unmasking</div><div class='del'>-	 * debug exceptions. By restoring MDSCR_EL1 here, we may take a debug</div><div class='del'>-	 * exception. Mask them until local_daif_restore() in cpu_suspend()</div><div class='del'>-	 * resets them.</div><div class='del'>-	 */</div><div class='del'>-	disable_daif</div><div class='ctx'> 	msr	mdscr_el1, x10</div><div class='ctx'> </div><div class='ctx'> 	msr	sctlr_el1, x12</div><div class='hunk'>@@ -466,8 +458,6 @@ SYM_FUNC_START(__cpu_setup)</div><div class='ctx'> 	msr	cpacr_el1, xzr			// Reset cpacr_el1</div><div class='ctx'> 	mov	x1, #1 &lt;&lt; 12			// Reset mdscr_el1 and disable</div><div class='ctx'> 	msr	mdscr_el1, x1			// access to the DCC from EL0</div><div class='del'>-	isb					// Unmask debug exceptions now,</div><div class='del'>-	enable_dbg				// since this is per-cpu</div><div class='ctx'> 	reset_pmuserenr_el0 x1			// Disable PMU access from EL0</div><div class='ctx'> 	reset_amuserenr_el0 x1			// Disable AMU access from EL0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/net/bpf_jit.h b/arch/arm64/net/bpf_jit.h<br/>index 23b1b34db088..b22ab2f97a30 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/net/bpf_jit.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/net/bpf_jit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/net/bpf_jit.h</a></div><div class='hunk'>@@ -297,4 +297,12 @@</div><div class='ctx'> #define A64_ADR(Rd, offset) \</div><div class='ctx'> 	aarch64_insn_gen_adr(0, offset, Rd, AARCH64_INSN_ADR_TYPE_ADR)</div><div class='ctx'> </div><div class='add'>+/* MRS */</div><div class='add'>+#define A64_MRS_TPIDR_EL1(Rt) \</div><div class='add'>+	aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_TPIDR_EL1)</div><div class='add'>+#define A64_MRS_TPIDR_EL2(Rt) \</div><div class='add'>+	aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_TPIDR_EL2)</div><div class='add'>+#define A64_MRS_SP_EL0(Rt) \</div><div class='add'>+	aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_SP_EL0)</div><div class='add'>+</div><div class='ctx'> #endif /* _BPF_JIT_H */</div><div class='head'>diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c<br/>index 122021f9bdfc..720336d28856 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/arm64/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/arm64/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #define TCALL_CNT (MAX_BPF_JIT_REG + 2)</div><div class='ctx'> #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)</div><div class='ctx'> #define FP_BOTTOM (MAX_BPF_JIT_REG + 4)</div><div class='add'>+#define ARENA_VM_START (MAX_BPF_JIT_REG + 5)</div><div class='ctx'> </div><div class='ctx'> #define check_imm(bits, imm) do {				\</div><div class='ctx'> 	if ((((imm) &gt; 0) &amp;&amp; ((imm) &gt;&gt; (bits))) ||		\</div><div class='hunk'>@@ -67,6 +68,8 @@ static const int bpf2a64[] = {</div><div class='ctx'> 	/* temporary register for blinding constants */</div><div class='ctx'> 	[BPF_REG_AX] = A64_R(9),</div><div class='ctx'> 	[FP_BOTTOM] = A64_R(27),</div><div class='add'>+	/* callee saved register for kern_vm_start address */</div><div class='add'>+	[ARENA_VM_START] = A64_R(28),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct jit_ctx {</div><div class='hunk'>@@ -79,6 +82,7 @@ struct jit_ctx {</div><div class='ctx'> 	__le32 *ro_image;</div><div class='ctx'> 	u32 stack_size;</div><div class='ctx'> 	int fpb_offset;</div><div class='add'>+	u64 user_vm_start;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bpf_plt {</div><div class='hunk'>@@ -295,7 +299,7 @@ static bool is_lsi_offset(int offset, int scale)</div><div class='ctx'> #define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 8)</div><div class='ctx'> </div><div class='ctx'> static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,</div><div class='del'>-			  bool is_exception_cb)</div><div class='add'>+			  bool is_exception_cb, u64 arena_vm_start)</div><div class='ctx'> {</div><div class='ctx'> 	const struct bpf_prog *prog = ctx-&gt;prog;</div><div class='ctx'> 	const bool is_main_prog = !bpf_is_subprog(prog);</div><div class='hunk'>@@ -306,6 +310,7 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,</div><div class='ctx'> 	const u8 fp = bpf2a64[BPF_REG_FP];</div><div class='ctx'> 	const u8 tcc = bpf2a64[TCALL_CNT];</div><div class='ctx'> 	const u8 fpb = bpf2a64[FP_BOTTOM];</div><div class='add'>+	const u8 arena_vm_base = bpf2a64[ARENA_VM_START];</div><div class='ctx'> 	const int idx0 = ctx-&gt;idx;</div><div class='ctx'> 	int cur_offset;</div><div class='ctx'> </div><div class='hunk'>@@ -411,6 +416,10 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,</div><div class='ctx'> </div><div class='ctx'> 	/* Set up function call stack */</div><div class='ctx'> 	emit(A64_SUB_I(1, A64_SP, A64_SP, ctx-&gt;stack_size), ctx);</div><div class='add'>+</div><div class='add'>+	if (arena_vm_start)</div><div class='add'>+		emit_a64_mov_i64(arena_vm_base, arena_vm_start, ctx);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -485,20 +494,26 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> static int emit_lse_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 code = insn-&gt;code;</div><div class='add'>+	const u8 arena_vm_base = bpf2a64[ARENA_VM_START];</div><div class='ctx'> 	const u8 dst = bpf2a64[insn-&gt;dst_reg];</div><div class='ctx'> 	const u8 src = bpf2a64[insn-&gt;src_reg];</div><div class='ctx'> 	const u8 tmp = bpf2a64[TMP_REG_1];</div><div class='ctx'> 	const u8 tmp2 = bpf2a64[TMP_REG_2];</div><div class='ctx'> 	const bool isdw = BPF_SIZE(code) == BPF_DW;</div><div class='add'>+	const bool arena = BPF_MODE(code) == BPF_PROBE_ATOMIC;</div><div class='ctx'> 	const s16 off = insn-&gt;off;</div><div class='del'>-	u8 reg;</div><div class='add'>+	u8 reg = dst;</div><div class='ctx'> </div><div class='del'>-	if (!off) {</div><div class='del'>-		reg = dst;</div><div class='del'>-	} else {</div><div class='del'>-		emit_a64_mov_i(1, tmp, off, ctx);</div><div class='del'>-		emit(A64_ADD(1, tmp, tmp, dst), ctx);</div><div class='del'>-		reg = tmp;</div><div class='add'>+	if (off || arena) {</div><div class='add'>+		if (off) {</div><div class='add'>+			emit_a64_mov_i(1, tmp, off, ctx);</div><div class='add'>+			emit(A64_ADD(1, tmp, tmp, dst), ctx);</div><div class='add'>+			reg = tmp;</div><div class='add'>+		}</div><div class='add'>+		if (arena) {</div><div class='add'>+			emit(A64_ADD(1, tmp, reg, arena_vm_base), ctx);</div><div class='add'>+			reg = tmp;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (insn-&gt;imm) {</div><div class='hunk'>@@ -567,6 +582,12 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> 	u8 reg;</div><div class='ctx'> 	s32 jmp_offset;</div><div class='ctx'> </div><div class='add'>+	if (BPF_MODE(code) == BPF_PROBE_ATOMIC) {</div><div class='add'>+		/* ll_sc based atomics don't support unsafe pointers yet. */</div><div class='add'>+		pr_err_once("unknown atomic opcode %02x\n", code);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!off) {</div><div class='ctx'> 		reg = dst;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -738,6 +759,7 @@ static void build_epilogue(struct jit_ctx *ctx, bool is_exception_cb)</div><div class='ctx'> </div><div class='ctx'> #define BPF_FIXUP_OFFSET_MASK	GENMASK(26, 0)</div><div class='ctx'> #define BPF_FIXUP_REG_MASK	GENMASK(31, 27)</div><div class='add'>+#define DONT_CLEAR 5 /* Unused ARM64 register from BPF's POV */</div><div class='ctx'> </div><div class='ctx'> bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> 		    struct pt_regs *regs)</div><div class='hunk'>@@ -745,7 +767,8 @@ bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> 	off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex-&gt;fixup);</div><div class='ctx'> 	int dst_reg = FIELD_GET(BPF_FIXUP_REG_MASK, ex-&gt;fixup);</div><div class='ctx'> </div><div class='del'>-	regs-&gt;regs[dst_reg] = 0;</div><div class='add'>+	if (dst_reg != DONT_CLEAR)</div><div class='add'>+		regs-&gt;regs[dst_reg] = 0;</div><div class='ctx'> 	regs-&gt;pc = (unsigned long)&amp;ex-&gt;fixup - offset;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -765,7 +788,9 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM &amp;&amp;</div><div class='del'>-		BPF_MODE(insn-&gt;code) != BPF_PROBE_MEMSX)</div><div class='add'>+		BPF_MODE(insn-&gt;code) != BPF_PROBE_MEMSX &amp;&amp;</div><div class='add'>+			BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32 &amp;&amp;</div><div class='add'>+				BPF_MODE(insn-&gt;code) != BPF_PROBE_ATOMIC)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!ctx-&gt;prog-&gt;aux-&gt;extable ||</div><div class='hunk'>@@ -810,6 +835,9 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> </div><div class='ctx'> 	ex-&gt;insn = ins_offset;</div><div class='ctx'> </div><div class='add'>+	if (BPF_CLASS(insn-&gt;code) != BPF_LDX)</div><div class='add'>+		dst_reg = DONT_CLEAR;</div><div class='add'>+</div><div class='ctx'> 	ex-&gt;fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |</div><div class='ctx'> 		    FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);</div><div class='ctx'> </div><div class='hunk'>@@ -829,12 +857,13 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,</div><div class='ctx'> 		      bool extra_pass)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 code = insn-&gt;code;</div><div class='del'>-	const u8 dst = bpf2a64[insn-&gt;dst_reg];</div><div class='del'>-	const u8 src = bpf2a64[insn-&gt;src_reg];</div><div class='add'>+	u8 dst = bpf2a64[insn-&gt;dst_reg];</div><div class='add'>+	u8 src = bpf2a64[insn-&gt;src_reg];</div><div class='ctx'> 	const u8 tmp = bpf2a64[TMP_REG_1];</div><div class='ctx'> 	const u8 tmp2 = bpf2a64[TMP_REG_2];</div><div class='ctx'> 	const u8 fp = bpf2a64[BPF_REG_FP];</div><div class='ctx'> 	const u8 fpb = bpf2a64[FP_BOTTOM];</div><div class='add'>+	const u8 arena_vm_base = bpf2a64[ARENA_VM_START];</div><div class='ctx'> 	const s16 off = insn-&gt;off;</div><div class='ctx'> 	const s32 imm = insn-&gt;imm;</div><div class='ctx'> 	const int i = insn - ctx-&gt;prog-&gt;insnsi;</div><div class='hunk'>@@ -853,6 +882,24 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,</div><div class='ctx'> 	/* dst = src */</div><div class='ctx'> 	case BPF_ALU | BPF_MOV | BPF_X:</div><div class='ctx'> 	case BPF_ALU64 | BPF_MOV | BPF_X:</div><div class='add'>+		if (insn_is_cast_user(insn)) {</div><div class='add'>+			emit(A64_MOV(0, tmp, src), ctx); // 32-bit mov clears the upper 32 bits</div><div class='add'>+			emit_a64_mov_i(0, dst, ctx-&gt;user_vm_start &gt;&gt; 32, ctx);</div><div class='add'>+			emit(A64_LSL(1, dst, dst, 32), ctx);</div><div class='add'>+			emit(A64_CBZ(1, tmp, 2), ctx);</div><div class='add'>+			emit(A64_ORR(1, tmp, dst, tmp), ctx);</div><div class='add'>+			emit(A64_MOV(1, dst, tmp), ctx);</div><div class='add'>+			break;</div><div class='add'>+		} else if (insn_is_mov_percpu_addr(insn)) {</div><div class='add'>+			if (dst != src)</div><div class='add'>+				emit(A64_MOV(1, dst, src), ctx);</div><div class='add'>+			if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))</div><div class='add'>+				emit(A64_MRS_TPIDR_EL2(tmp), ctx);</div><div class='add'>+			else</div><div class='add'>+				emit(A64_MRS_TPIDR_EL1(tmp), ctx);</div><div class='add'>+			emit(A64_ADD(1, dst, dst, tmp), ctx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		switch (insn-&gt;off) {</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			emit(A64_MOV(is64, dst, src), ctx);</div><div class='hunk'>@@ -1181,6 +1228,21 @@ emit_cond_jmp:</div><div class='ctx'> 		const u8 r0 = bpf2a64[BPF_REG_0];</div><div class='ctx'> 		bool func_addr_fixed;</div><div class='ctx'> 		u64 func_addr;</div><div class='add'>+		u32 cpu_offset;</div><div class='add'>+</div><div class='add'>+		/* Implement helper call to bpf_get_smp_processor_id() inline */</div><div class='add'>+		if (insn-&gt;src_reg == 0 &amp;&amp; insn-&gt;imm == BPF_FUNC_get_smp_processor_id) {</div><div class='add'>+			cpu_offset = offsetof(struct thread_info, cpu);</div><div class='add'>+</div><div class='add'>+			emit(A64_MRS_SP_EL0(tmp), ctx);</div><div class='add'>+			if (is_lsi_offset(cpu_offset, 2)) {</div><div class='add'>+				emit(A64_LDR32I(r0, tmp, cpu_offset), ctx);</div><div class='add'>+			} else {</div><div class='add'>+				emit_a64_mov_i(1, tmp2, cpu_offset, ctx);</div><div class='add'>+				emit(A64_LDR32(r0, tmp, tmp2), ctx);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		ret = bpf_jit_get_func_addr(ctx-&gt;prog, insn, extra_pass,</div><div class='ctx'> 					    &amp;func_addr, &amp;func_addr_fixed);</div><div class='hunk'>@@ -1237,7 +1299,15 @@ emit_cond_jmp:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:</div><div class='del'>-		if (ctx-&gt;fpb_offset &gt; 0 &amp;&amp; src == fp) {</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32) {</div><div class='add'>+			emit(A64_ADD(1, tmp2, src, arena_vm_base), ctx);</div><div class='add'>+			src = tmp2;</div><div class='add'>+		}</div><div class='add'>+		if (ctx-&gt;fpb_offset &gt; 0 &amp;&amp; src == fp &amp;&amp; BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32) {</div><div class='ctx'> 			src_adj = fpb;</div><div class='ctx'> 			off_adj = off + ctx-&gt;fpb_offset;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1322,7 +1392,15 @@ emit_cond_jmp:</div><div class='ctx'> 	case BPF_ST | BPF_MEM | BPF_H:</div><div class='ctx'> 	case BPF_ST | BPF_MEM | BPF_B:</div><div class='ctx'> 	case BPF_ST | BPF_MEM | BPF_DW:</div><div class='del'>-		if (ctx-&gt;fpb_offset &gt; 0 &amp;&amp; dst == fp) {</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32) {</div><div class='add'>+			emit(A64_ADD(1, tmp2, dst, arena_vm_base), ctx);</div><div class='add'>+			dst = tmp2;</div><div class='add'>+		}</div><div class='add'>+		if (ctx-&gt;fpb_offset &gt; 0 &amp;&amp; dst == fp &amp;&amp; BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32) {</div><div class='ctx'> 			dst_adj = fpb;</div><div class='ctx'> 			off_adj = off + ctx-&gt;fpb_offset;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1365,6 +1443,10 @@ emit_cond_jmp:</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		ret = add_exception_handler(insn, ctx, dst);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	/* STX: *(size *)(dst + off) = src */</div><div class='hunk'>@@ -1372,7 +1454,15 @@ emit_cond_jmp:</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_H:</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_B:</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_DW:</div><div class='del'>-		if (ctx-&gt;fpb_offset &gt; 0 &amp;&amp; dst == fp) {</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32) {</div><div class='add'>+			emit(A64_ADD(1, tmp2, dst, arena_vm_base), ctx);</div><div class='add'>+			dst = tmp2;</div><div class='add'>+		}</div><div class='add'>+		if (ctx-&gt;fpb_offset &gt; 0 &amp;&amp; dst == fp &amp;&amp; BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32) {</div><div class='ctx'> 			dst_adj = fpb;</div><div class='ctx'> 			off_adj = off + ctx-&gt;fpb_offset;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1413,16 +1503,26 @@ emit_cond_jmp:</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		ret = add_exception_handler(insn, ctx, dst);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='add'>+	case BPF_STX | BPF_PROBE_ATOMIC | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW:</div><div class='ctx'> 		if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS))</div><div class='ctx'> 			ret = emit_lse_atomic(insn, ctx);</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = emit_ll_sc_atomic(insn, ctx);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='add'>+</div><div class='add'>+		ret = add_exception_handler(insn, ctx, dst);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1594,6 +1694,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	bool tmp_blinded = false;</div><div class='ctx'> 	bool extra_pass = false;</div><div class='ctx'> 	struct jit_ctx ctx;</div><div class='add'>+	u64 arena_vm_start;</div><div class='ctx'> 	u8 *image_ptr;</div><div class='ctx'> 	u8 *ro_image_ptr;</div><div class='ctx'> </div><div class='hunk'>@@ -1611,6 +1712,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 		prog = tmp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	arena_vm_start = bpf_arena_get_kern_vm_start(prog-&gt;aux-&gt;arena);</div><div class='ctx'> 	jit_data = prog-&gt;aux-&gt;jit_data;</div><div class='ctx'> 	if (!jit_data) {</div><div class='ctx'> 		jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);</div><div class='hunk'>@@ -1641,6 +1743,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ctx.fpb_offset = find_fpb_offset(prog);</div><div class='add'>+	ctx.user_vm_start = bpf_arena_get_user_vm_start(prog-&gt;aux-&gt;arena);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 1. Initial fake pass to compute ctx-&gt;idx and ctx-&gt;offset.</div><div class='hunk'>@@ -1648,7 +1751,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	 * BPF line info needs ctx-&gt;offset[i] to be the offset of</div><div class='ctx'> 	 * instruction[i] in jited image, so build prologue first.</div><div class='ctx'> 	 */</div><div class='del'>-	if (build_prologue(&amp;ctx, was_classic, prog-&gt;aux-&gt;exception_cb)) {</div><div class='add'>+	if (build_prologue(&amp;ctx, was_classic, prog-&gt;aux-&gt;exception_cb,</div><div class='add'>+			   arena_vm_start)) {</div><div class='ctx'> 		prog = orig_prog;</div><div class='ctx'> 		goto out_off;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1696,7 +1800,7 @@ skip_init_ctx:</div><div class='ctx'> 	ctx.idx = 0;</div><div class='ctx'> 	ctx.exentry_idx = 0;</div><div class='ctx'> </div><div class='del'>-	build_prologue(&amp;ctx, was_classic, prog-&gt;aux-&gt;exception_cb);</div><div class='add'>+	build_prologue(&amp;ctx, was_classic, prog-&gt;aux-&gt;exception_cb, arena_vm_start);</div><div class='ctx'> </div><div class='ctx'> 	if (build_body(&amp;ctx, extra_pass)) {</div><div class='ctx'> 		prog = orig_prog;</div><div class='hunk'>@@ -1793,17 +1897,6 @@ u64 bpf_jit_alloc_exec_limit(void)</div><div class='ctx'> 	return VMALLOC_END - VMALLOC_START;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *bpf_jit_alloc_exec(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	/* Memory is intended to be executable, reset the pointer tag. */</div><div class='del'>-	return kasan_reset_tag(vmalloc(size));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void bpf_jit_free_exec(void *addr)</div><div class='del'>-{</div><div class='del'>-	return vfree(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */</div><div class='ctx'> bool bpf_jit_supports_subprog_tailcalls(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1844,15 +1937,15 @@ static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='ctx'> </div><div class='ctx'> 	emit_call(enter_prog, ctx);</div><div class='ctx'> </div><div class='add'>+	/* save return value to callee saved register x20 */</div><div class='add'>+	emit(A64_MOV(1, A64_R(20), A64_R(0)), ctx);</div><div class='add'>+</div><div class='ctx'> 	/* if (__bpf_prog_enter(prog) == 0)</div><div class='ctx'> 	 *         goto skip_exec_of_prog;</div><div class='ctx'> 	 */</div><div class='ctx'> 	branch = ctx-&gt;image + ctx-&gt;idx;</div><div class='ctx'> 	emit(A64_NOP, ctx);</div><div class='ctx'> </div><div class='del'>-	/* save return value to callee saved register x20 */</div><div class='del'>-	emit(A64_MOV(1, A64_R(20), A64_R(0)), ctx);</div><div class='del'>-</div><div class='ctx'> 	emit(A64_ADD_I(1, A64_R(0), A64_SP, args_off), ctx);</div><div class='ctx'> 	if (!p-&gt;jited)</div><div class='ctx'> 		emit_addr_mov_i64(A64_R(1), (const u64)p-&gt;insnsi, ctx);</div><div class='hunk'>@@ -2176,12 +2269,9 @@ void arch_free_bpf_trampoline(void *image, unsigned int size)</div><div class='ctx'> 	bpf_prog_pack_free(image, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void arch_protect_bpf_trampoline(void *image, unsigned int size)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void arch_unprotect_bpf_trampoline(void *image, unsigned int size)</div><div class='add'>+int arch_protect_bpf_trampoline(void *image, unsigned int size)</div><div class='ctx'> {</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='hunk'>@@ -2464,6 +2554,39 @@ bool bpf_jit_supports_exceptions(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_supports_arena(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)</div><div class='add'>+{</div><div class='add'>+	if (!in_arena)</div><div class='add'>+		return true;</div><div class='add'>+	switch (insn-&gt;code) {</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='add'>+		if (!cpus_have_cap(ARM64_HAS_LSE_ATOMICS))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_supports_percpu_insn(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_inlines_helper_call(s32 imm)</div><div class='add'>+{</div><div class='add'>+	switch (imm) {</div><div class='add'>+	case BPF_FUNC_get_smp_processor_id:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bpf_jit_free(struct bpf_prog *prog)</div><div class='ctx'> {</div><div class='ctx'> 	if (prog-&gt;jited) {</div><div class='head'>diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig<br/>index d3ac36751ad1..5479707eb5d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/csky/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/csky/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/csky/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/csky/Kconfig</a></div><div class='hunk'>@@ -37,6 +37,7 @@ config CSKY</div><div class='ctx'> 	select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION</div><div class='ctx'> 	select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION</div><div class='ctx'> 	select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION</div><div class='add'>+	select ARCH_NEED_CMPXCHG_1_EMU</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 &amp;&amp; $(cc-option,-mbacktrace)</div><div class='ctx'> 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT</div><div class='ctx'> 	select COMMON_CLK</div><div class='head'>diff --git a/arch/csky/include/asm/cmpxchg.h b/arch/csky/include/asm/cmpxchg.h<br/>index 916043b845f1..db6dda47184e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/csky/include/asm/cmpxchg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/csky/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/csky/include/asm/cmpxchg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/csky/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='add'>+#include &lt;linux/cmpxchg-emu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define __xchg_relaxed(new, ptr, size)				\</div><div class='ctx'> ({								\</div><div class='hunk'>@@ -61,6 +62,9 @@</div><div class='ctx'> 	__typeof__(old) __old = (old);				\</div><div class='ctx'> 	__typeof__(*(ptr)) __ret;				\</div><div class='ctx'> 	switch (size) {						\</div><div class='add'>+	case 1:							\</div><div class='add'>+		__ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \</div><div class='add'>+		break;						\</div><div class='ctx'> 	case 4:							\</div><div class='ctx'> 		asm volatile (					\</div><div class='ctx'> 		"1:	ldex.w		%0, (%3) \n"		\</div><div class='hunk'>@@ -91,6 +95,9 @@</div><div class='ctx'> 	__typeof__(old) __old = (old);				\</div><div class='ctx'> 	__typeof__(*(ptr)) __ret;				\</div><div class='ctx'> 	switch (size) {						\</div><div class='add'>+	case 1:							\</div><div class='add'>+		__ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \</div><div class='add'>+		break;						\</div><div class='ctx'> 	case 4:							\</div><div class='ctx'> 		asm volatile (					\</div><div class='ctx'> 		"1:	ldex.w		%0, (%3) \n"		\</div><div class='hunk'>@@ -122,6 +129,9 @@</div><div class='ctx'> 	__typeof__(old) __old = (old);				\</div><div class='ctx'> 	__typeof__(*(ptr)) __ret;				\</div><div class='ctx'> 	switch (size) {						\</div><div class='add'>+	case 1:							\</div><div class='add'>+		__ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \</div><div class='add'>+		break;						\</div><div class='ctx'> 	case 4:							\</div><div class='ctx'> 		asm volatile (					\</div><div class='ctx'> 		RELEASE_FENCE					\</div><div class='head'>diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig<br/>index a5f300ec6f28..54ad04dacdee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/Kconfig</a></div><div class='hunk'>@@ -595,7 +595,7 @@ config ARCH_SELECTS_CRASH_DUMP</div><div class='ctx'> 	select RELOCATABLE</div><div class='ctx'> </div><div class='ctx'> config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION</div><div class='del'>-	def_bool CRASH_CORE</div><div class='add'>+	def_bool CRASH_RESERVE</div><div class='ctx'> </div><div class='ctx'> config RELOCATABLE</div><div class='ctx'> 	bool "Relocatable kernel"</div><div class='head'>diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig<br/>index f18c2ba871ef..fc0d89d4c1c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/configs/loongson3_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/configs/loongson3_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/configs/loongson3_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/configs/loongson3_defconfig</a></div><div class='hunk'>@@ -76,7 +76,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y</div><div class='ctx'> CONFIG_MODVERSIONS=y</div><div class='ctx'> CONFIG_BLK_DEV_ZONED=y</div><div class='ctx'> CONFIG_BLK_DEV_THROTTLING=y</div><div class='del'>-CONFIG_BLK_DEV_THROTTLING_LOW=y</div><div class='ctx'> CONFIG_BLK_WBT=y</div><div class='ctx'> CONFIG_BLK_CGROUP_IOLATENCY=y</div><div class='ctx'> CONFIG_BLK_CGROUP_FC_APPID=y</div><div class='head'>diff --git a/arch/loongarch/include/asm/crash_core.h b/arch/loongarch/include/asm/crash_reserve.h<br/>index 218bdbfa527b..a1d9b84b1c7d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/crash_core.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/include/asm/crash_core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/crash_reserve.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/include/asm/crash_reserve.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-#ifndef _LOONGARCH_CRASH_CORE_H</div><div class='del'>-#define _LOONGARCH_CRASH_CORE_H</div><div class='add'>+#ifndef _LOONGARCH_CRASH_RESERVE_H</div><div class='add'>+#define _LOONGARCH_CRASH_RESERVE_H</div><div class='ctx'> </div><div class='ctx'> #define CRASH_ALIGN			SZ_2M</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/include/asm/perf_event.h b/arch/loongarch/include/asm/perf_event.h<br/>index 2a35a0bc2aaa..52b638059e40 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/perf_event.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/include/asm/perf_event.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/perf_event.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/include/asm/perf_event.h</a></div><div class='hunk'>@@ -7,6 +7,14 @@</div><div class='ctx'> #ifndef __LOONGARCH_PERF_EVENT_H__</div><div class='ctx'> #define __LOONGARCH_PERF_EVENT_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='ctx'> #define perf_arch_bpf_user_pt_regs(regs) (struct user_pt_regs *)regs</div><div class='ctx'> </div><div class='add'>+#define perf_arch_fetch_caller_regs(regs, __ip) { \</div><div class='add'>+	(regs)-&gt;csr_era = (__ip); \</div><div class='add'>+	(regs)-&gt;regs[3] = current_stack_pointer; \</div><div class='add'>+	(regs)-&gt;regs[22] = (unsigned long) __builtin_frame_address(0); \</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __LOONGARCH_PERF_EVENT_H__ */</div><div class='head'>diff --git a/arch/loongarch/include/asm/tlb.h b/arch/loongarch/include/asm/tlb.h<br/>index da7a3b5b9374..e071f5e9e858 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/tlb.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/include/asm/tlb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/tlb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/include/asm/tlb.h</a></div><div class='hunk'>@@ -132,8 +132,6 @@ static __always_inline void invtlb_all(u32 op, u32 info, u64 addr)</div><div class='ctx'> 		);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)</div><div class='del'>-</div><div class='ctx'> static void tlb_flush(struct mmu_gather *tlb);</div><div class='ctx'> </div><div class='ctx'> #define tlb_flush tlb_flush</div><div class='head'>diff --git a/arch/loongarch/kernel/module.c b/arch/loongarch/kernel/module.c<br/>index c7d0338d12c1..36d6d9eeb7c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/kernel/module.c</a></div><div class='hunk'>@@ -490,12 +490,6 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,</div><div class='del'>-			GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE, __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void module_init_ftrace_plt(const Elf_Ehdr *hdr,</div><div class='ctx'> 				   const Elf_Shdr *sechdrs, struct module *mod)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/kernel/perf_event.c b/arch/loongarch/kernel/perf_event.c<br/>index 0491bf453cd4..cac7cba81b65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/perf_event.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/perf_event.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/kernel/perf_event.c</a></div><div class='hunk'>@@ -884,4 +884,4 @@ static int __init init_hw_perf_events(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-early_initcall(init_hw_perf_events);</div><div class='add'>+pure_initcall(init_hw_perf_events);</div><div class='head'>diff --git a/arch/loongarch/mm/fault.c b/arch/loongarch/mm/fault.c<br/>index 1fc2f6813ea0..97b40defde06 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/mm/fault.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/mm/fault.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/mm/fault.c</a></div><div class='hunk'>@@ -202,10 +202,10 @@ good_area:</div><div class='ctx'> 		if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='ctx'> 			goto bad_area;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (!(vma-&gt;vm_flags &amp; VM_READ) &amp;&amp; address != exception_era(regs))</div><div class='del'>-			goto bad_area;</div><div class='ctx'> 		if (!(vma-&gt;vm_flags &amp; VM_EXEC) &amp;&amp; address == exception_era(regs))</div><div class='ctx'> 			goto bad_area;</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; (VM_READ | VM_WRITE)) &amp;&amp; address != exception_era(regs))</div><div class='add'>+			goto bad_area;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/loongarch/mm/init.c b/arch/loongarch/mm/init.c<br/>index 4dd53427f657..bf789d114c2d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/mm/init.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='hunk'>@@ -248,3 +249,23 @@ EXPORT_SYMBOL(invalid_pmd_table);</div><div class='ctx'> #endif</div><div class='ctx'> pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;</div><div class='ctx'> EXPORT_SYMBOL(invalid_pte_table);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= MODULES_VADDR,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c<br/>index e73323d759d0..7dbefd4ba210 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/net/bpf_jit.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/loongarch/net/bpf_jit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/net/bpf_jit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/loongarch/net/bpf_jit.c</a></div><div class='hunk'>@@ -1294,16 +1294,19 @@ skip_init_ctx:</div><div class='ctx'> 	flush_icache_range((unsigned long)header, (unsigned long)(ctx.image + ctx.idx));</div><div class='ctx'> </div><div class='ctx'> 	if (!prog-&gt;is_func || extra_pass) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='ctx'> 		if (extra_pass &amp;&amp; ctx.idx != jit_data-&gt;ctx.idx) {</div><div class='ctx'> 			pr_err_once("multi-func JIT bug %d != %d\n",</div><div class='ctx'> 				    ctx.idx, jit_data-&gt;ctx.idx);</div><div class='del'>-			bpf_jit_binary_free(header);</div><div class='del'>-			prog-&gt;bpf_func = NULL;</div><div class='del'>-			prog-&gt;jited = 0;</div><div class='del'>-			prog-&gt;jited_len = 0;</div><div class='del'>-			goto out_offset;</div><div class='add'>+			goto out_free;</div><div class='add'>+		}</div><div class='add'>+		err = bpf_jit_binary_lock_ro(header);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_err_once("bpf_jit_binary_lock_ro() returned %d\n",</div><div class='add'>+				    err);</div><div class='add'>+			goto out_free;</div><div class='ctx'> 		}</div><div class='del'>-		bpf_jit_binary_lock_ro(header);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		jit_data-&gt;ctx = ctx;</div><div class='ctx'> 		jit_data-&gt;image = image_ptr;</div><div class='hunk'>@@ -1334,6 +1337,13 @@ out:</div><div class='ctx'> 	out_offset = -1;</div><div class='ctx'> </div><div class='ctx'> 	return prog;</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	bpf_jit_binary_free(header);</div><div class='add'>+	prog-&gt;bpf_func = NULL;</div><div class='add'>+	prog-&gt;jited = 0;</div><div class='add'>+	prog-&gt;jited_len = 0;</div><div class='add'>+	goto out_offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */</div><div class='head'>diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig<br/>index 6ffa29585194..cc26df907bfe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/Kconfig</a></div><div class='hunk'>@@ -3,8 +3,8 @@ config M68K</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> 	select ARCH_32BIT_OFF_T</div><div class='del'>-	select ARCH_HAS_CPU_CACHE_ALIASING</div><div class='ctx'> 	select ARCH_HAS_BINFMT_FLAT</div><div class='add'>+	select ARCH_HAS_CPU_CACHE_ALIASING</div><div class='ctx'> 	select ARCH_HAS_CPU_FINALIZE_INIT if MMU</div><div class='ctx'> 	select ARCH_HAS_CURRENT_STACK_POINTER</div><div class='ctx'> 	select ARCH_HAS_DMA_PREP_COHERENT if M68K_NONCOHERENT_DMA &amp;&amp; !COLDFIRE</div><div class='hunk'>@@ -18,7 +18,7 @@ config M68K</div><div class='ctx'> 	select DMA_DIRECT_REMAP if M68K_NONCOHERENT_DMA &amp;&amp; !COLDFIRE</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='del'>-	select GENERIC_IOMAP</div><div class='add'>+	select GENERIC_IOMAP if HAS_IOPORT</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_LIB_ASHLDI3</div><div class='ctx'> 	select GENERIC_LIB_ASHRDI3</div><div class='head'>diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c<br/>index 99718f3dc686..d4b170c861bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/amiga/config.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/amiga/config.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/amiga/config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/amiga/config.c</a></div><div class='hunk'>@@ -836,7 +836,7 @@ static void amiga_get_hardware_list(struct seq_file *m)</div><div class='ctx'> 		seq_printf(m, "\tZorro II%s AutoConfig: %d Expansion "</div><div class='ctx'> 				"Device%s\n",</div><div class='ctx'> 				AMIGAHW_PRESENT(ZORRO3) ? "I" : "",</div><div class='del'>-				zorro_num_autocon, zorro_num_autocon == 1 ? "" : "s");</div><div class='add'>+				zorro_num_autocon, str_plural(zorro_num_autocon));</div><div class='ctx'> #endif /* CONFIG_ZORRO */</div><div class='ctx'> </div><div class='ctx'> #undef AMIGAHW_ANNOUNCE</div><div class='head'>diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig<br/>index a6f6607efe79..6bb202d03d34 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/amiga_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/amiga_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/amiga_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/amiga_defconfig</a></div><div class='hunk'>@@ -26,6 +26,7 @@ CONFIG_AMIGA_BUILTIN_SERIAL=y</div><div class='ctx'> CONFIG_SERIAL_CONSOLE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='ctx'> CONFIG_MAC_PARTITION=y</div><div class='hunk'>@@ -217,7 +218,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -624,8 +624,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig<br/>index 0ca1f9f930bc..3598e0cc66b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/apollo_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/apollo_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/apollo_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/apollo_defconfig</a></div><div class='hunk'>@@ -21,6 +21,7 @@ CONFIG_HEARTBEAT=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -213,7 +214,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -581,8 +581,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig<br/>index be030659d8d7..3fbb8a9a307d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/atari_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/atari_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/atari_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/atari_defconfig</a></div><div class='hunk'>@@ -29,6 +29,7 @@ CONFIG_ATARI_ETHERNEC=y</div><div class='ctx'> CONFIG_ATARI_DSP56K=m</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_MAC_PARTITION=y</div><div class='hunk'>@@ -220,7 +221,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -601,8 +601,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig<br/>index ad8f81fbb630..9a2b0c7871ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/bvme6000_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/bvme6000_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/bvme6000_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/bvme6000_defconfig</a></div><div class='hunk'>@@ -19,6 +19,7 @@ CONFIG_BVME6000=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -210,7 +211,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -573,8 +573,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig<br/>index ff253b6accec..2408785e0e48 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/hp300_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/hp300_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/hp300_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/hp300_defconfig</a></div><div class='hunk'>@@ -20,6 +20,7 @@ CONFIG_HP300=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -212,7 +213,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -583,8 +583,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig<br/>index f92b866620a7..6789d03b7b52 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/mac_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/mac_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/mac_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/mac_defconfig</a></div><div class='hunk'>@@ -20,6 +20,7 @@ CONFIG_MAC=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -211,7 +212,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -600,8 +600,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig<br/>index bd813beaa8a7..b57af39db3b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/multi_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/multi_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/multi_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/multi_defconfig</a></div><div class='hunk'>@@ -44,6 +44,7 @@ CONFIG_AMIGA_BUILTIN_SERIAL=y</div><div class='ctx'> CONFIG_SERIAL_CONSOLE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_BSD_DISKLABEL=y</div><div class='ctx'> CONFIG_MINIX_SUBPARTITION=y</div><div class='hunk'>@@ -231,7 +232,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -686,8 +686,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig<br/>index 2237ee0fe433..29b70f27aedd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme147_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/mvme147_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme147_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/mvme147_defconfig</a></div><div class='hunk'>@@ -18,6 +18,7 @@ CONFIG_MVME147=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -209,7 +210,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -572,8 +572,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig<br/>index afb5aa9c5012..757c582ffe84 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme16x_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/mvme16x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme16x_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/mvme16x_defconfig</a></div><div class='hunk'>@@ -19,6 +19,7 @@ CONFIG_MVME16x=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -210,7 +211,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -573,8 +573,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig<br/>index e40f7a308966..f15d1009108a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/q40_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/q40_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/q40_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/q40_defconfig</a></div><div class='hunk'>@@ -19,6 +19,7 @@ CONFIG_HEARTBEAT=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -211,7 +212,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -590,8 +590,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig<br/>index 4df397c0395f..5218c1e614b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/sun3_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/sun3_defconfig</a></div><div class='hunk'>@@ -16,6 +16,7 @@ CONFIG_SUN3=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -206,7 +207,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -570,8 +570,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig<br/>index aa7719b3947f..acdf4eb7af28 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3x_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/configs/sun3x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3x_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/configs/sun3x_defconfig</a></div><div class='hunk'>@@ -16,6 +16,7 @@ CONFIG_SUN3X=y</div><div class='ctx'> CONFIG_PROC_HARDWARE=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_AMIGA_PARTITION=y</div><div class='ctx'> CONFIG_ATARI_PARTITION=y</div><div class='hunk'>@@ -207,7 +208,6 @@ CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NFT_DUP_IPV6=m</div><div class='hunk'>@@ -571,8 +571,6 @@ CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='del'>-CONFIG_STRING_SELFTEST=m</div><div class='del'>-CONFIG_TEST_STRING_HELPERS=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='ctx'> CONFIG_TEST_PRINTF=m</div><div class='ctx'> CONFIG_TEST_SCANF=m</div><div class='head'>diff --git a/arch/m68k/include/asm/pgtable.h b/arch/m68k/include/asm/pgtable.h<br/>index 27525c6a12fd..49fcfd734860 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/include/asm/pgtable.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/include/asm/pgtable.h</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> #ifndef __M68K_PGTABLE_H</div><div class='ctx'> #define __M68K_PGTABLE_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='ctx'> #ifdef __uClinux__</div><div class='ctx'> #include &lt;asm/pgtable_no.h&gt;</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h<br/>index 31be2ad999ca..3e31adbddc75 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/include/asm/thread_info.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/include/asm/thread_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/include/asm/thread_info.h</a></div><div class='hunk'>@@ -12,14 +12,15 @@</div><div class='ctx'>  */</div><div class='ctx'> #if PAGE_SHIFT &lt; 13</div><div class='ctx'> #ifdef CONFIG_4KSTACKS</div><div class='del'>-#define THREAD_SIZE	4096</div><div class='add'>+#define THREAD_SIZE_ORDER	0</div><div class='ctx'> #else</div><div class='del'>-#define THREAD_SIZE	8192</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='ctx'> #endif</div><div class='ctx'> #else</div><div class='del'>-#define THREAD_SIZE	PAGE_SIZE</div><div class='add'>+#define THREAD_SIZE_ORDER	0</div><div class='ctx'> #endif</div><div class='del'>-#define THREAD_SIZE_ORDER	((THREAD_SIZE / PAGE_SIZE) - 1)</div><div class='add'>+</div><div class='add'>+#define THREAD_SIZE	(PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S<br/>index 3bcdd32a6b36..338b474910f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/kernel/entry.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/kernel/entry.S</a></div><div class='hunk'>@@ -430,7 +430,9 @@ resume:</div><div class='ctx'> 	movec	%a0,%dfc</div><div class='ctx'> </div><div class='ctx'> 	/* restore status register */</div><div class='del'>-	movew	%a1@(TASK_THREAD+THREAD_SR),%sr</div><div class='add'>+	movew	%a1@(TASK_THREAD+THREAD_SR),%d0</div><div class='add'>+	oriw	#0x0700,%d0</div><div class='add'>+	movew	%d0,%sr</div><div class='ctx'> </div><div class='ctx'> 	rts</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/mac/misc.c b/arch/m68k/mac/misc.c<br/>index 4c8f8cbfa05f..e7f0f72c1b36 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/mac/misc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/m68k/mac/misc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/mac/misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/m68k/mac/misc.c</a></div><div class='hunk'>@@ -453,30 +453,18 @@ void mac_poweroff(void)</div><div class='ctx'> </div><div class='ctx'> void mac_reset(void)</div><div class='ctx'> {</div><div class='del'>-	if (macintosh_config-&gt;adb_type == MAC_ADB_II &amp;&amp;</div><div class='del'>-	    macintosh_config-&gt;ident != MAC_MODEL_SE30) {</div><div class='del'>-		/* need ROMBASE in booter */</div><div class='del'>-		/* indeed, plus need to MAP THE ROM !! */</div><div class='del'>-</div><div class='del'>-		if (mac_bi_data.rombase == 0)</div><div class='del'>-			mac_bi_data.rombase = 0x40800000;</div><div class='del'>-</div><div class='del'>-		/* works on some */</div><div class='del'>-		rom_reset = (void *) (mac_bi_data.rombase + 0xa);</div><div class='del'>-</div><div class='del'>-		local_irq_disable();</div><div class='del'>-		rom_reset();</div><div class='ctx'> #ifdef CONFIG_ADB_CUDA</div><div class='del'>-	} else if (macintosh_config-&gt;adb_type == MAC_ADB_EGRET ||</div><div class='del'>-	           macintosh_config-&gt;adb_type == MAC_ADB_CUDA) {</div><div class='add'>+	if (macintosh_config-&gt;adb_type == MAC_ADB_EGRET ||</div><div class='add'>+	    macintosh_config-&gt;adb_type == MAC_ADB_CUDA) {</div><div class='ctx'> 		cuda_restart();</div><div class='add'>+	} else</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ADB_PMU</div><div class='del'>-	} else if (macintosh_config-&gt;adb_type == MAC_ADB_PB2) {</div><div class='add'>+	if (macintosh_config-&gt;adb_type == MAC_ADB_PB2) {</div><div class='ctx'> 		pmu_restart();</div><div class='add'>+	} else</div><div class='ctx'> #endif</div><div class='del'>-	} else if (CPU_IS_030) {</div><div class='del'>-</div><div class='add'>+	if (CPU_IS_030) {</div><div class='ctx'> 		/* 030-specific reset routine.  The idea is general, but the</div><div class='ctx'> 		 * specific registers to reset are '030-specific.  Until I</div><div class='ctx'> 		 * have a non-030 machine, I can't test anything else.</div><div class='hunk'>@@ -524,6 +512,18 @@ void mac_reset(void)</div><div class='ctx'> 		    "jmp %/a0@\n\t" /* jump to the reset vector */</div><div class='ctx'> 		    ".chip 68k"</div><div class='ctx'> 		    : : "r" (offset), "a" (rombase) : "a0");</div><div class='add'>+	} else {</div><div class='add'>+		/* need ROMBASE in booter */</div><div class='add'>+		/* indeed, plus need to MAP THE ROM !! */</div><div class='add'>+</div><div class='add'>+		if (mac_bi_data.rombase == 0)</div><div class='add'>+			mac_bi_data.rombase = 0x40800000;</div><div class='add'>+</div><div class='add'>+		/* works on some */</div><div class='add'>+		rom_reset = (void *)(mac_bi_data.rombase + 0xa);</div><div class='add'>+</div><div class='add'>+		local_irq_disable();</div><div class='add'>+		rom_reset();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* should never get here */</div><div class='head'>diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig<br/>index 4da7bc4ac4a3..176314f3c9aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/microblaze/configs/mmu_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/microblaze/configs/mmu_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/microblaze/configs/mmu_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/microblaze/configs/mmu_defconfig</a></div><div class='hunk'>@@ -4,7 +4,7 @@ CONFIG_AUDIT=y</div><div class='ctx'> CONFIG_IKCONFIG=y</div><div class='ctx'> CONFIG_IKCONFIG_PROC=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1</div><div class='ctx'> CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1</div><div class='head'>diff --git a/arch/mips/configs/rs90_defconfig b/arch/mips/configs/rs90_defconfig<br/>index 4b9e36d6400e..a53dd66e9b86 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/rs90_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/configs/rs90_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/rs90_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/configs/rs90_defconfig</a></div><div class='hunk'>@@ -9,7 +9,7 @@ CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y</div><div class='ctx'> # CONFIG_SGETMASK_SYSCALL is not set</div><div class='ctx'> # CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_TIMERFD is not set</div><div class='ctx'> # CONFIG_AIO is not set</div><div class='ctx'> # CONFIG_IO_URING is not set</div><div class='head'>diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c<br/>index 6c3704f51d0d..87f0a1436bf9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/dec/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/dec/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/dec/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/dec/setup.c</a></div><div class='hunk'>@@ -756,7 +756,7 @@ void __init arch_init_irq(void)</div><div class='ctx'> 				NULL))</div><div class='ctx'> 			pr_err("Failed to register fpu interrupt\n");</div><div class='ctx'> 		desc_fpu = irq_to_desc(irq_fpu);</div><div class='del'>-		fpu_kstat_irq = this_cpu_ptr(desc_fpu-&gt;kstat_irqs);</div><div class='add'>+		fpu_kstat_irq = this_cpu_ptr(&amp;desc_fpu-&gt;kstat_irqs-&gt;cnt);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (dec_interrupt[DEC_IRQ_CASCADE] &gt;= 0) {</div><div class='ctx'> 		if (request_irq(dec_interrupt[DEC_IRQ_CASCADE], no_action,</div><div class='head'>diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h<br/>index 20ca48c1b606..c0109aff223b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/include/asm/pgtable-64.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/include/asm/pgtable-64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/include/asm/pgtable-64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/include/asm/pgtable-64.h</a></div><div class='hunk'>@@ -147,8 +147,8 @@</div><div class='ctx'> #if defined(CONFIG_MODULES) &amp;&amp; defined(KBUILD_64BIT_SYM32) &amp;&amp; \</div><div class='ctx'> 	VMALLOC_START != CKSSEG</div><div class='ctx'> /* Load modules into 32bit-compatible segment. */</div><div class='del'>-#define MODULE_START	CKSSEG</div><div class='del'>-#define MODULE_END	(FIXADDR_START-2*PAGE_SIZE)</div><div class='add'>+#define MODULES_VADDR	CKSSEG</div><div class='add'>+#define MODULES_END	(FIXADDR_START-2*PAGE_SIZE)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define pte_ERROR(e) \</div><div class='head'>diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c<br/>index 7b2fbaa9cac5..ba0f62d8eff5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/kernel/module.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/numa.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -31,15 +30,6 @@ struct mips_hi16 {</div><div class='ctx'> static LIST_HEAD(dbe_list);</div><div class='ctx'> static DEFINE_SPINLOCK(dbe_lock);</div><div class='ctx'> </div><div class='del'>-#ifdef MODULE_START</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END,</div><div class='del'>-				GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE,</div><div class='del'>-				__builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void apply_r_mips_32(u32 *location, u32 base, Elf_Addr v)</div><div class='ctx'> {</div><div class='ctx'> 	*location = base + v;</div><div class='head'>diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c<br/>index aaa9a242ebba..37fedeaca2e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/mm/fault.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/mm/fault.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/mm/fault.c</a></div><div class='hunk'>@@ -83,8 +83,8 @@ static void __do_page_fault(struct pt_regs *regs, unsigned long write,</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(address &gt;= VMALLOC_START &amp;&amp; address &lt;= VMALLOC_END))</div><div class='ctx'> 		goto VMALLOC_FAULT_TARGET;</div><div class='del'>-#ifdef MODULE_START</div><div class='del'>-	if (unlikely(address &gt;= MODULE_START &amp;&amp; address &lt; MODULE_END))</div><div class='add'>+#ifdef MODULES_VADDR</div><div class='add'>+	if (unlikely(address &gt;= MODULES_VADDR &amp;&amp; address &lt; MODULES_END))</div><div class='ctx'> 		goto VMALLOC_FAULT_TARGET;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c<br/>index 39f129205b0c..4583d1a2a73e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/mm/init.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/kcore.h&gt;</div><div class='ctx'> #include &lt;linux/initrd.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/cachectl.h&gt;</div><div class='hunk'>@@ -576,3 +577,25 @@ EXPORT_SYMBOL_GPL(invalid_pmd_table);</div><div class='ctx'> #endif</div><div class='ctx'> pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;</div><div class='ctx'> EXPORT_SYMBOL(invalid_pte_table);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+#ifdef MODULES_VADDR</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= MODULES_VADDR,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/mips/net/bpf_jit_comp.c b/arch/mips/net/bpf_jit_comp.c<br/>index a40d926b6513..e355dfca4400 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/mips/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/mips/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -1012,7 +1012,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	bpf_prog_fill_jited_linfo(prog, &amp;ctx.descriptors[1]);</div><div class='ctx'> </div><div class='ctx'> 	/* Set as read-only exec and flush instruction cache */</div><div class='del'>-	bpf_jit_binary_lock_ro(header);</div><div class='add'>+	if (bpf_jit_binary_lock_ro(header))</div><div class='add'>+		goto out_err;</div><div class='ctx'> 	flush_icache_range((unsigned long)header,</div><div class='ctx'> 			   (unsigned long)&amp;ctx.target[ctx.jit_index]);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/nios2/include/asm/pgtable.h b/arch/nios2/include/asm/pgtable.h<br/>index d052dfcbe8d3..eab87c6beacb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/include/asm/pgtable.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/nios2/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/nios2/include/asm/pgtable.h</a></div><div class='hunk'>@@ -25,7 +25,10 @@</div><div class='ctx'> #include &lt;asm-generic/pgtable-nopmd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define VMALLOC_START		CONFIG_NIOS2_KERNEL_MMU_REGION_BASE</div><div class='del'>-#define VMALLOC_END		(CONFIG_NIOS2_KERNEL_REGION_BASE - 1)</div><div class='add'>+#define VMALLOC_END		(CONFIG_NIOS2_KERNEL_REGION_BASE - SZ_32M - 1)</div><div class='add'>+</div><div class='add'>+#define MODULES_VADDR		(CONFIG_NIOS2_KERNEL_REGION_BASE - SZ_32M)</div><div class='add'>+#define MODULES_END		(CONFIG_NIOS2_KERNEL_REGION_BASE - 1)</div><div class='ctx'> </div><div class='ctx'> struct mm_struct;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/nios2/kernel/module.c b/arch/nios2/kernel/module.c<br/>index 76e0a42d6e36..f4483243578d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/nios2/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/nios2/kernel/module.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -21,25 +20,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Modules should NOT be allocated with kmalloc for (obvious) reasons.</div><div class='del'>- * But we do it for now to avoid relocation issues. CALL26/PCREL26 cannot reach</div><div class='del'>- * from 0x80000000 (vmalloc area) to 0xc00000000 (kernel) (kmalloc returns</div><div class='del'>- * addresses in 0xc0000000)</div><div class='del'>- */</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	if (size == 0)</div><div class='del'>-		return NULL;</div><div class='del'>-	return kmalloc(size, GFP_KERNEL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Free memory returned from module_alloc */</div><div class='del'>-void module_memfree(void *module_region)</div><div class='del'>-{</div><div class='del'>-	kfree(module_region);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,</div><div class='ctx'> 			unsigned int symindex, unsigned int relsec,</div><div class='ctx'> 			struct module *mod)</div><div class='head'>diff --git a/arch/nios2/mm/init.c b/arch/nios2/mm/init.c<br/>index 7bc82ee889c9..3459df28afee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/nios2/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/nios2/mm/init.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/binfmts.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -143,3 +144,23 @@ static const pgprot_t protection_map[16] = {</div><div class='ctx'> 	[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ]	= MKP(1, 1, 1)</div><div class='ctx'> };</div><div class='ctx'> DECLARE_VM_GET_PAGE_PROT</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= MODULES_VADDR,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL_EXEC,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig<br/>index 3586cda55bde..69c0258700b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/Kconfig</a></div><div class='hunk'>@@ -188,6 +188,15 @@ config SMP</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say N.</div><div class='ctx'> </div><div class='add'>+config FPU</div><div class='add'>+	bool "FPU support"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Say N here if you want to disable all floating-point related procedures</div><div class='add'>+	  in the kernel and reduce binary size.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+</div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='ctx'> </div><div class='ctx'> config OPENRISC_NO_SPR_SR_DSX</div><div class='head'>diff --git a/arch/openrisc/include/asm/fpu.h b/arch/openrisc/include/asm/fpu.h<br/>new file mode 100644<br/>index 000000000000..57bc44d80d53<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/fpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/include/asm/fpu.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __ASM_OPENRISC_FPU_H</div><div class='add'>+#define __ASM_OPENRISC_FPU_H</div><div class='add'>+</div><div class='add'>+struct task_struct;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FPU</div><div class='add'>+static inline void save_fpu(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	task-&gt;thread.fpcsr = mfspr(SPR_FPCSR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void restore_fpu(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	mtspr(SPR_FPCSR, task-&gt;thread.fpcsr);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+#define save_fpu(tsk)			do { } while (0)</div><div class='add'>+#define restore_fpu(tsk)		do { } while (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_OPENRISC_FPU_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/processor.h b/arch/openrisc/include/asm/processor.h<br/>index 3b736e74e6ed..e05d1b59e24e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/processor.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/processor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/include/asm/processor.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@</div><div class='ctx'> struct task_struct;</div><div class='ctx'> </div><div class='ctx'> struct thread_struct {</div><div class='add'>+	long fpcsr;		/* Floating point control status register. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/openrisc/include/asm/ptrace.h b/arch/openrisc/include/asm/ptrace.h<br/>index 375147ff71fc..1da3e66292e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/ptrace.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/ptrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -59,7 +59,7 @@ struct pt_regs {</div><div class='ctx'> 	 * -1 for all other exceptions.</div><div class='ctx'> 	 */</div><div class='ctx'> 	long  orig_gpr11;	/* For restarting system calls */</div><div class='del'>-	long fpcsr;		/* Floating point control status register. */</div><div class='add'>+	long dummy;		/* Cheap alignment fix */</div><div class='ctx'> 	long dummy2;		/* Cheap alignment fix */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -115,6 +115,5 @@ static inline long regs_return_value(struct pt_regs *regs)</div><div class='ctx'> #define PT_GPR31      124</div><div class='ctx'> #define PT_PC	      128</div><div class='ctx'> #define PT_ORIG_GPR11 132</div><div class='del'>-#define PT_FPCSR      136</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_OPENRISC_PTRACE_H */</div><div class='head'>diff --git a/arch/openrisc/include/uapi/asm/elf.h b/arch/openrisc/include/uapi/asm/elf.h<br/>index 6868f81c281e..441e343f8268 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/include/uapi/asm/elf.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/include/uapi/asm/elf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/include/uapi/asm/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/include/uapi/asm/elf.h</a></div><div class='hunk'>@@ -34,15 +34,72 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* The OR1K relocation types... not all relevant for module loader */</div><div class='del'>-#define R_OR32_NONE	0</div><div class='del'>-#define R_OR32_32	1</div><div class='del'>-#define R_OR32_16	2</div><div class='del'>-#define R_OR32_8	3</div><div class='del'>-#define R_OR32_CONST	4</div><div class='del'>-#define R_OR32_CONSTH	5</div><div class='del'>-#define R_OR32_JUMPTARG	6</div><div class='del'>-#define R_OR32_VTINHERIT 7</div><div class='del'>-#define R_OR32_VTENTRY	8</div><div class='add'>+#define R_OR1K_NONE		0</div><div class='add'>+#define R_OR1K_32		1</div><div class='add'>+#define R_OR1K_16		2</div><div class='add'>+#define R_OR1K_8		3</div><div class='add'>+#define R_OR1K_LO_16_IN_INSN	4</div><div class='add'>+#define R_OR1K_HI_16_IN_INSN	5</div><div class='add'>+#define R_OR1K_INSN_REL_26	6</div><div class='add'>+#define R_OR1K_GNU_VTENTRY	7</div><div class='add'>+#define R_OR1K_GNU_VTINHERIT	8</div><div class='add'>+#define R_OR1K_32_PCREL		9</div><div class='add'>+#define R_OR1K_16_PCREL		10</div><div class='add'>+#define R_OR1K_8_PCREL		11</div><div class='add'>+#define R_OR1K_GOTPC_HI16	12</div><div class='add'>+#define R_OR1K_GOTPC_LO16	13</div><div class='add'>+#define R_OR1K_GOT16		14</div><div class='add'>+#define R_OR1K_PLT26		15</div><div class='add'>+#define R_OR1K_GOTOFF_HI16	16</div><div class='add'>+#define R_OR1K_GOTOFF_LO16	17</div><div class='add'>+#define R_OR1K_COPY		18</div><div class='add'>+#define R_OR1K_GLOB_DAT		19</div><div class='add'>+#define R_OR1K_JMP_SLOT		20</div><div class='add'>+#define R_OR1K_RELATIVE		21</div><div class='add'>+#define R_OR1K_TLS_GD_HI16	22</div><div class='add'>+#define R_OR1K_TLS_GD_LO16	23</div><div class='add'>+#define R_OR1K_TLS_LDM_HI16	24</div><div class='add'>+#define R_OR1K_TLS_LDM_LO16	25</div><div class='add'>+#define R_OR1K_TLS_LDO_HI16	26</div><div class='add'>+#define R_OR1K_TLS_LDO_LO16	27</div><div class='add'>+#define R_OR1K_TLS_IE_HI16	28</div><div class='add'>+#define R_OR1K_TLS_IE_LO16	29</div><div class='add'>+#define R_OR1K_TLS_LE_HI16	30</div><div class='add'>+#define R_OR1K_TLS_LE_LO16	31</div><div class='add'>+#define R_OR1K_TLS_TPOFF	32</div><div class='add'>+#define R_OR1K_TLS_DTPOFF	33</div><div class='add'>+#define R_OR1K_TLS_DTPMOD	34</div><div class='add'>+#define R_OR1K_AHI16		35</div><div class='add'>+#define R_OR1K_GOTOFF_AHI16	36</div><div class='add'>+#define R_OR1K_TLS_IE_AHI16	37</div><div class='add'>+#define R_OR1K_TLS_LE_AHI16	38</div><div class='add'>+#define R_OR1K_SLO16		39</div><div class='add'>+#define R_OR1K_GOTOFF_SLO16	40</div><div class='add'>+#define R_OR1K_TLS_LE_SLO16	41</div><div class='add'>+#define R_OR1K_PCREL_PG21	42</div><div class='add'>+#define R_OR1K_GOT_PG21		43</div><div class='add'>+#define R_OR1K_TLS_GD_PG21	44</div><div class='add'>+#define R_OR1K_TLS_LDM_PG21	45</div><div class='add'>+#define R_OR1K_TLS_IE_PG21	46</div><div class='add'>+#define R_OR1K_LO13		47</div><div class='add'>+#define R_OR1K_GOT_LO13		48</div><div class='add'>+#define R_OR1K_TLS_GD_LO13	49</div><div class='add'>+#define R_OR1K_TLS_LDM_LO13	50</div><div class='add'>+#define R_OR1K_TLS_IE_LO13	51</div><div class='add'>+#define R_OR1K_SLO13		52</div><div class='add'>+#define R_OR1K_PLTA26		53</div><div class='add'>+#define R_OR1K_GOT_AHI16	54</div><div class='add'>+</div><div class='add'>+/* Old relocation names */</div><div class='add'>+#define R_OR32_NONE	R_OR1K_NONE</div><div class='add'>+#define R_OR32_32	R_OR1K_32</div><div class='add'>+#define R_OR32_16	R_OR1K_16</div><div class='add'>+#define R_OR32_8	R_OR1K_8</div><div class='add'>+#define R_OR32_CONST	R_OR1K_LO_16_IN_INSN</div><div class='add'>+#define R_OR32_CONSTH	R_OR1K_HI_16_IN_INSN</div><div class='add'>+#define R_OR32_JUMPTARG	R_OR1K_INSN_REL_26</div><div class='add'>+#define R_OR32_VTENTRY	R_OR1K_GNU_VTENTRY</div><div class='add'>+#define R_OR32_VTINHERIT R_OR1K_GNU_VTINHERIT</div><div class='ctx'> </div><div class='ctx'> typedef unsigned long elf_greg_t;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S<br/>index c9f48e750b72..440711d7bf40 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/entry.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/entry.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/kernel/entry.S</a></div><div class='hunk'>@@ -106,8 +106,6 @@</div><div class='ctx'> 	l.mtspr r0,r3,SPR_EPCR_BASE				;\</div><div class='ctx'> 	l.lwz   r3,PT_SR(r1)					;\</div><div class='ctx'> 	l.mtspr r0,r3,SPR_ESR_BASE				;\</div><div class='del'>-	l.lwz	r3,PT_FPCSR(r1)					;\</div><div class='del'>-	l.mtspr	r0,r3,SPR_FPCSR					;\</div><div class='ctx'> 	l.lwz   r2,PT_GPR2(r1)					;\</div><div class='ctx'> 	l.lwz   r3,PT_GPR3(r1)					;\</div><div class='ctx'> 	l.lwz   r4,PT_GPR4(r1)					;\</div><div class='hunk'>@@ -177,8 +175,6 @@ handler:							;\</div><div class='ctx'> 	/* r30 already save */					;\</div><div class='ctx'> 	l.sw    PT_GPR31(r1),r31					;\</div><div class='ctx'> 	TRACE_IRQS_OFF_ENTRY						;\</div><div class='del'>-	l.mfspr	r30,r0,SPR_FPCSR				;\</div><div class='del'>-	l.sw	PT_FPCSR(r1),r30				;\</div><div class='ctx'> 	/* Store -1 in orig_gpr11 for non-syscall exceptions */	;\</div><div class='ctx'> 	l.addi	r30,r0,-1					;\</div><div class='ctx'> 	l.sw	PT_ORIG_GPR11(r1),r30</div><div class='hunk'>@@ -219,8 +215,6 @@ handler:							;\</div><div class='ctx'> 	/* Store -1 in orig_gpr11 for non-syscall exceptions */	;\</div><div class='ctx'> 	l.addi	r30,r0,-1					;\</div><div class='ctx'> 	l.sw	PT_ORIG_GPR11(r1),r30				;\</div><div class='del'>-	l.mfspr	r30,r0,SPR_FPCSR				;\</div><div class='del'>-	l.sw	PT_FPCSR(r1),r30				;\</div><div class='ctx'> 	l.addi	r3,r1,0						;\</div><div class='ctx'> 	/* r4 is exception EA */				;\</div><div class='ctx'> 	l.addi	r5,r0,vector					;\</div><div class='hunk'>@@ -852,6 +846,7 @@ _syscall_badsys:</div><div class='ctx'> </div><div class='ctx'> EXCEPTION_ENTRY(_fpe_trap_handler)</div><div class='ctx'> 	CLEAR_LWA_FLAG(r3)</div><div class='add'>+</div><div class='ctx'> 	/* r4: EA of fault (set by EXCEPTION_HANDLE) */</div><div class='ctx'> 	l.jal   do_fpe_trap</div><div class='ctx'> 	 l.addi  r3,r1,0 /* pt_regs */</div><div class='hunk'>@@ -1100,10 +1095,6 @@ ENTRY(_switch)</div><div class='ctx'> 	l.sw    PT_GPR28(r1),r28</div><div class='ctx'> 	l.sw    PT_GPR30(r1),r30</div><div class='ctx'> </div><div class='del'>-	/* Store the old FPU state to new pt_regs */</div><div class='del'>-	l.mfspr	r29,r0,SPR_FPCSR</div><div class='del'>-	l.sw	PT_FPCSR(r1),r29</div><div class='del'>-</div><div class='ctx'> 	l.addi	r11,r10,0			/* Save old 'current' to 'last' return value*/</div><div class='ctx'> </div><div class='ctx'> 	/* We use thread_info-&gt;ksp for storing the address of the above</div><div class='hunk'>@@ -1126,10 +1117,6 @@ ENTRY(_switch)</div><div class='ctx'> 	l.lwz	r29,PT_SP(r1)</div><div class='ctx'> 	l.sw	TI_KSP(r10),r29</div><div class='ctx'> </div><div class='del'>-	/* Restore the old value of FPCSR */</div><div class='del'>-	l.lwz	r29,PT_FPCSR(r1)</div><div class='del'>-	l.mtspr	r0,r29,SPR_FPCSR</div><div class='del'>-</div><div class='ctx'> 	/* ...and restore the registers, except r11 because the return value</div><div class='ctx'> 	 * has already been set above.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/openrisc/kernel/module.c b/arch/openrisc/kernel/module.c<br/>index 532013f523ac..c9ff4c4a0b29 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/kernel/module.c</a></div><div class='hunk'>@@ -39,22 +39,32 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,</div><div class='ctx'> 		value = sym-&gt;st_value + rel[i].r_addend;</div><div class='ctx'> </div><div class='ctx'> 		switch (ELF32_R_TYPE(rel[i].r_info)) {</div><div class='del'>-		case R_OR32_32:</div><div class='add'>+		case R_OR1K_32:</div><div class='ctx'> 			*location = value;</div><div class='ctx'> 			break;</div><div class='del'>-		case R_OR32_CONST:</div><div class='add'>+		case R_OR1K_LO_16_IN_INSN:</div><div class='ctx'> 			*((uint16_t *)location + 1) = value;</div><div class='ctx'> 			break;</div><div class='del'>-		case R_OR32_CONSTH:</div><div class='add'>+		case R_OR1K_HI_16_IN_INSN:</div><div class='ctx'> 			*((uint16_t *)location + 1) = value &gt;&gt; 16;</div><div class='ctx'> 			break;</div><div class='del'>-		case R_OR32_JUMPTARG:</div><div class='add'>+		case R_OR1K_INSN_REL_26:</div><div class='ctx'> 			value -= (uint32_t)location;</div><div class='ctx'> 			value &gt;&gt;= 2;</div><div class='ctx'> 			value &amp;= 0x03ffffff;</div><div class='ctx'> 			value |= *location &amp; 0xfc000000;</div><div class='ctx'> 			*location = value;</div><div class='ctx'> 			break;</div><div class='add'>+		case R_OR1K_AHI16:</div><div class='add'>+			/* Adjust the operand to match with a signed LO16.  */</div><div class='add'>+			value += 0x8000;</div><div class='add'>+			*((uint16_t *)location + 1) = value &gt;&gt; 16;</div><div class='add'>+			break;</div><div class='add'>+		case R_OR1K_SLO16:</div><div class='add'>+			/* Split value lower 16-bits.  */</div><div class='add'>+			value = ((value &amp; 0xf800) &lt;&lt; 10) | (value &amp; 0x7ff);</div><div class='add'>+			*location = (*location &amp; ~0x3e007ff) | value;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			pr_err("module %s: Unknown relocation: %u\n",</div><div class='ctx'> 			       me-&gt;name, ELF32_R_TYPE(rel[i].r_info));</div><div class='head'>diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c<br/>index 86e02929f3ac..eef99fee2110 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/process.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/process.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/kernel/process.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='hunk'>@@ -65,7 +66,7 @@ void machine_restart(char *cmd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This is used if pm_power_off has not been set by a power management</div><div class='add'>+ * This is used if a sys-off handler was not set by a power management</div><div class='ctx'>  * driver, in this case we can assume we are on a simulator.  On</div><div class='ctx'>  * OpenRISC simulators l.nop 1 will trigger the simulator exit.</div><div class='ctx'>  */</div><div class='hunk'>@@ -89,10 +90,8 @@ void machine_halt(void)</div><div class='ctx'> void machine_power_off(void)</div><div class='ctx'> {</div><div class='ctx'> 	printk(KERN_INFO "*** MACHINE POWER OFF ***\n");</div><div class='del'>-	if (pm_power_off != NULL)</div><div class='del'>-		pm_power_off();</div><div class='del'>-	else</div><div class='del'>-		default_power_off();</div><div class='add'>+	do_kernel_power_off();</div><div class='add'>+	default_power_off();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -246,6 +245,8 @@ struct task_struct *__switch_to(struct task_struct *old,</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='add'>+	save_fpu(current);</div><div class='add'>+</div><div class='ctx'> 	/* current_set is an array of saved current pointers</div><div class='ctx'> 	 * (one for each cpu). we need them at user-&gt;kernel transition,</div><div class='ctx'> 	 * while we save them at kernel-&gt;user transition</div><div class='hunk'>@@ -258,6 +259,8 @@ struct task_struct *__switch_to(struct task_struct *old,</div><div class='ctx'> 	current_thread_info_set[smp_processor_id()] = new_ti;</div><div class='ctx'> 	last = (_switch(old_ti, new_ti))-&gt;task;</div><div class='ctx'> </div><div class='add'>+	restore_fpu(current);</div><div class='add'>+</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> </div><div class='ctx'> 	return last;</div><div class='head'>diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c<br/>index 1eeac3b62e9d..5091b18eab4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/ptrace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/ptrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/kernel/ptrace.c</a></div><div class='hunk'>@@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_FPU</div><div class='ctx'> /*</div><div class='ctx'>  * As OpenRISC shares GPRs and floating point registers we don't need to export</div><div class='ctx'>  * the floating point registers again.  So here we only export the fpcsr special</div><div class='hunk'>@@ -97,9 +98,7 @@ static int fpregs_get(struct task_struct *target,</div><div class='ctx'> 		       const struct user_regset *regset,</div><div class='ctx'> 		       struct membuf to)</div><div class='ctx'> {</div><div class='del'>-	const struct pt_regs *regs = task_pt_regs(target);</div><div class='del'>-</div><div class='del'>-	return membuf_store(&amp;to, regs-&gt;fpcsr);</div><div class='add'>+	return membuf_store(&amp;to, target-&gt;thread.fpcsr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fpregs_set(struct task_struct *target,</div><div class='hunk'>@@ -107,21 +106,20 @@ static int fpregs_set(struct task_struct *target,</div><div class='ctx'> 		       unsigned int pos, unsigned int count,</div><div class='ctx'> 		       const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct pt_regs *regs = task_pt_regs(target);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	/* FPCSR */</div><div class='del'>-	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='del'>-				 &amp;regs-&gt;fpcsr, 0, 4);</div><div class='del'>-	return ret;</div><div class='add'>+	return user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf,</div><div class='add'>+				  &amp;target-&gt;thread.fpcsr, 0, 4);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Define the register sets available on OpenRISC under Linux</div><div class='ctx'>  */</div><div class='ctx'> enum or1k_regset {</div><div class='ctx'> 	REGSET_GENERAL,</div><div class='add'>+#ifdef CONFIG_FPU</div><div class='ctx'> 	REGSET_FPU,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset or1k_regsets[] = {</div><div class='hunk'>@@ -133,6 +131,7 @@ static const struct user_regset or1k_regsets[] = {</div><div class='ctx'> 			    .regset_get = genregs_get,</div><div class='ctx'> 			    .set = genregs_set,</div><div class='ctx'> 			    },</div><div class='add'>+#ifdef CONFIG_FPU</div><div class='ctx'> 	[REGSET_FPU] = {</div><div class='ctx'> 			    .core_note_type = NT_PRFPREG,</div><div class='ctx'> 			    .n = sizeof(struct __or1k_fpu_state) / sizeof(long),</div><div class='hunk'>@@ -141,6 +140,7 @@ static const struct user_regset or1k_regsets[] = {</div><div class='ctx'> 			    .regset_get = fpregs_get,</div><div class='ctx'> 			    .set = fpregs_set,</div><div class='ctx'> 			    },</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset_view user_or1k_native_view = {</div><div class='head'>diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c<br/>index e2f21a5d8ad9..c7ab42e2cb7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/signal.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/signal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/kernel/signal.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='ctx'> #include &lt;linux/resume_user_mode.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/syscall.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='hunk'>@@ -39,6 +40,37 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs);</div><div class='ctx'> asmlinkage int do_work_pending(struct pt_regs *regs, unsigned int thread_flags,</div><div class='ctx'> 			       int syscall);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_FPU</div><div class='add'>+static long restore_fp_state(struct sigcontext __user *sc)</div><div class='add'>+{</div><div class='add'>+	long err;</div><div class='add'>+</div><div class='add'>+	err = __copy_from_user(&amp;current-&gt;thread.fpcsr, &amp;sc-&gt;fpcsr, sizeof(unsigned long));</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Restore the FPU state */</div><div class='add'>+	restore_fpu(current);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long save_fp_state(struct sigcontext __user *sc)</div><div class='add'>+{</div><div class='add'>+	long err;</div><div class='add'>+</div><div class='add'>+	/* Sync the user FPU state so we can copy to sigcontext */</div><div class='add'>+	save_fpu(current);</div><div class='add'>+</div><div class='add'>+	err = __copy_to_user(&amp;sc-&gt;fpcsr, &amp;current-&gt;thread.fpcsr, sizeof(unsigned long));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+#define save_fp_state(sc) (0)</div><div class='add'>+#define restore_fp_state(sc) (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int restore_sigcontext(struct pt_regs *regs,</div><div class='ctx'> 			      struct sigcontext __user *sc)</div><div class='ctx'> {</div><div class='hunk'>@@ -55,7 +87,7 @@ static int restore_sigcontext(struct pt_regs *regs,</div><div class='ctx'> 	err |= __copy_from_user(regs, sc-&gt;regs.gpr, 32 * sizeof(unsigned long));</div><div class='ctx'> 	err |= __copy_from_user(&amp;regs-&gt;pc, &amp;sc-&gt;regs.pc, sizeof(unsigned long));</div><div class='ctx'> 	err |= __copy_from_user(&amp;regs-&gt;sr, &amp;sc-&gt;regs.sr, sizeof(unsigned long));</div><div class='del'>-	err |= __copy_from_user(&amp;regs-&gt;fpcsr, &amp;sc-&gt;fpcsr, sizeof(unsigned long));</div><div class='add'>+	err |= restore_fp_state(sc);</div><div class='ctx'> </div><div class='ctx'> 	/* make sure the SM-bit is cleared so user-mode cannot fool us */</div><div class='ctx'> 	regs-&gt;sr &amp;= ~SPR_SR_SM;</div><div class='hunk'>@@ -118,7 +150,7 @@ static int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)</div><div class='ctx'> 	err |= __copy_to_user(sc-&gt;regs.gpr, regs, 32 * sizeof(unsigned long));</div><div class='ctx'> 	err |= __copy_to_user(&amp;sc-&gt;regs.pc, &amp;regs-&gt;pc, sizeof(unsigned long));</div><div class='ctx'> 	err |= __copy_to_user(&amp;sc-&gt;regs.sr, &amp;regs-&gt;sr, sizeof(unsigned long));</div><div class='del'>-	err |= __copy_to_user(&amp;sc-&gt;fpcsr, &amp;regs-&gt;fpcsr, sizeof(unsigned long));</div><div class='add'>+	err |= save_fp_state(sc);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c<br/>index 9370888c9a7e..c195be9cc9fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/traps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/openrisc/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/openrisc/kernel/traps.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bug.h&gt;</div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/unwinder.h&gt;</div><div class='hunk'>@@ -51,16 +52,16 @@ static void print_trace(void *data, unsigned long addr, int reliable)</div><div class='ctx'> {</div><div class='ctx'> 	const char *loglvl = data;</div><div class='ctx'> </div><div class='del'>-	printk("%s[&lt;%p&gt;] %s%pS\n", loglvl, (void *) addr, reliable ? "" : "? ",</div><div class='del'>-	       (void *) addr);</div><div class='add'>+	pr_info("%s[&lt;%p&gt;] %s%pS\n", loglvl, (void *) addr, reliable ? "" : "? ",</div><div class='add'>+		(void *) addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void print_data(unsigned long base_addr, unsigned long word, int i)</div><div class='ctx'> {</div><div class='ctx'> 	if (i == 0)</div><div class='del'>-		printk("(%08lx:)\t%08lx", base_addr + (i * 4), word);</div><div class='add'>+		pr_info("(%08lx:)\t%08lx", base_addr + (i * 4), word);</div><div class='ctx'> 	else</div><div class='del'>-		printk(" %08lx:\t%08lx", base_addr + (i * 4), word);</div><div class='add'>+		pr_info(" %08lx:\t%08lx", base_addr + (i * 4), word);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* displays a short stack trace */</div><div class='hunk'>@@ -69,7 +70,7 @@ void show_stack(struct task_struct *task, unsigned long *esp, const char *loglvl</div><div class='ctx'> 	if (esp == NULL)</div><div class='ctx'> 		esp = (unsigned long *)&amp;esp;</div><div class='ctx'> </div><div class='del'>-	printk("%sCall trace:\n", loglvl);</div><div class='add'>+	pr_info("%sCall trace:\n", loglvl);</div><div class='ctx'> 	unwind_stack((void *)loglvl, esp, print_trace);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -83,57 +84,56 @@ void show_registers(struct pt_regs *regs)</div><div class='ctx'> 	if (user_mode(regs))</div><div class='ctx'> 		in_kernel = 0;</div><div class='ctx'> </div><div class='del'>-	printk("CPU #: %d\n"</div><div class='del'>-	       "   PC: %08lx    SR: %08lx    SP: %08lx FPCSR: %08lx\n",</div><div class='del'>-	       smp_processor_id(), regs-&gt;pc, regs-&gt;sr, regs-&gt;sp,</div><div class='del'>-	       regs-&gt;fpcsr);</div><div class='del'>-	printk("GPR00: %08lx GPR01: %08lx GPR02: %08lx GPR03: %08lx\n",</div><div class='del'>-	       0L, regs-&gt;gpr[1], regs-&gt;gpr[2], regs-&gt;gpr[3]);</div><div class='del'>-	printk("GPR04: %08lx GPR05: %08lx GPR06: %08lx GPR07: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[4], regs-&gt;gpr[5], regs-&gt;gpr[6], regs-&gt;gpr[7]);</div><div class='del'>-	printk("GPR08: %08lx GPR09: %08lx GPR10: %08lx GPR11: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[8], regs-&gt;gpr[9], regs-&gt;gpr[10], regs-&gt;gpr[11]);</div><div class='del'>-	printk("GPR12: %08lx GPR13: %08lx GPR14: %08lx GPR15: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[12], regs-&gt;gpr[13], regs-&gt;gpr[14], regs-&gt;gpr[15]);</div><div class='del'>-	printk("GPR16: %08lx GPR17: %08lx GPR18: %08lx GPR19: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[16], regs-&gt;gpr[17], regs-&gt;gpr[18], regs-&gt;gpr[19]);</div><div class='del'>-	printk("GPR20: %08lx GPR21: %08lx GPR22: %08lx GPR23: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[20], regs-&gt;gpr[21], regs-&gt;gpr[22], regs-&gt;gpr[23]);</div><div class='del'>-	printk("GPR24: %08lx GPR25: %08lx GPR26: %08lx GPR27: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[24], regs-&gt;gpr[25], regs-&gt;gpr[26], regs-&gt;gpr[27]);</div><div class='del'>-	printk("GPR28: %08lx GPR29: %08lx GPR30: %08lx GPR31: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[28], regs-&gt;gpr[29], regs-&gt;gpr[30], regs-&gt;gpr[31]);</div><div class='del'>-	printk("  RES: %08lx oGPR11: %08lx\n",</div><div class='del'>-	       regs-&gt;gpr[11], regs-&gt;orig_gpr11);</div><div class='del'>-</div><div class='del'>-	printk("Process %s (pid: %d, stackpage=%08lx)\n",</div><div class='del'>-	       current-&gt;comm, current-&gt;pid, (unsigned long)current);</div><div class='add'>+	pr_info("CPU #: %d\n"</div><div class='add'>+		"   PC: %08lx    SR: %08lx    SP: %08lx\n",</div><div class='add'>+		smp_processor_id(), regs-&gt;pc, regs-&gt;sr, regs-&gt;sp);</div><div class='add'>+	pr_info("GPR00: %08lx GPR01: %08lx GPR02: %08lx GPR03: %08lx\n",</div><div class='add'>+		0L, regs-&gt;gpr[1], regs-&gt;gpr[2], regs-&gt;gpr[3]);</div><div class='add'>+	pr_info("GPR04: %08lx GPR05: %08lx GPR06: %08lx GPR07: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[4], regs-&gt;gpr[5], regs-&gt;gpr[6], regs-&gt;gpr[7]);</div><div class='add'>+	pr_info("GPR08: %08lx GPR09: %08lx GPR10: %08lx GPR11: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[8], regs-&gt;gpr[9], regs-&gt;gpr[10], regs-&gt;gpr[11]);</div><div class='add'>+	pr_info("GPR12: %08lx GPR13: %08lx GPR14: %08lx GPR15: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[12], regs-&gt;gpr[13], regs-&gt;gpr[14], regs-&gt;gpr[15]);</div><div class='add'>+	pr_info("GPR16: %08lx GPR17: %08lx GPR18: %08lx GPR19: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[16], regs-&gt;gpr[17], regs-&gt;gpr[18], regs-&gt;gpr[19]);</div><div class='add'>+	pr_info("GPR20: %08lx GPR21: %08lx GPR22: %08lx GPR23: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[20], regs-&gt;gpr[21], regs-&gt;gpr[22], regs-&gt;gpr[23]);</div><div class='add'>+	pr_info("GPR24: %08lx GPR25: %08lx GPR26: %08lx GPR27: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[24], regs-&gt;gpr[25], regs-&gt;gpr[26], regs-&gt;gpr[27]);</div><div class='add'>+	pr_info("GPR28: %08lx GPR29: %08lx GPR30: %08lx GPR31: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[28], regs-&gt;gpr[29], regs-&gt;gpr[30], regs-&gt;gpr[31]);</div><div class='add'>+	pr_info("  RES: %08lx oGPR11: %08lx\n",</div><div class='add'>+		regs-&gt;gpr[11], regs-&gt;orig_gpr11);</div><div class='add'>+</div><div class='add'>+	pr_info("Process %s (pid: %d, stackpage=%08lx)\n",</div><div class='add'>+		current-&gt;comm, current-&gt;pid, (unsigned long)current);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When in-kernel, we also print out the stack and code at the</div><div class='ctx'> 	 * time of the fault..</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (in_kernel) {</div><div class='ctx'> </div><div class='del'>-		printk("\nStack: ");</div><div class='add'>+		pr_info("\nStack: ");</div><div class='ctx'> 		show_stack(NULL, (unsigned long *)esp, KERN_EMERG);</div><div class='ctx'> </div><div class='ctx'> 		if (esp &lt; PAGE_OFFSET)</div><div class='ctx'> 			goto bad_stack;</div><div class='ctx'> </div><div class='del'>-		printk("\n");</div><div class='add'>+		pr_info("\n");</div><div class='ctx'> 		for (i = -8; i &lt; 24; i += 1) {</div><div class='ctx'> 			unsigned long word;</div><div class='ctx'> </div><div class='ctx'> 			if (__get_user(word, &amp;((unsigned long *)esp)[i])) {</div><div class='ctx'> bad_stack:</div><div class='del'>-				printk(" Bad Stack value.");</div><div class='add'>+				pr_info(" Bad Stack value.");</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			print_data(esp, word, i);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		printk("\nCode: ");</div><div class='add'>+		pr_info("\nCode: ");</div><div class='ctx'> 		if (regs-&gt;pc &lt; PAGE_OFFSET)</div><div class='ctx'> 			goto bad;</div><div class='ctx'> </div><div class='hunk'>@@ -142,14 +142,14 @@ bad_stack:</div><div class='ctx'> </div><div class='ctx'> 			if (__get_user(word, &amp;((unsigned long *)regs-&gt;pc)[i])) {</div><div class='ctx'> bad:</div><div class='del'>-				printk(" Bad PC value.");</div><div class='add'>+				pr_info(" Bad PC value.");</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			print_data(regs-&gt;pc, word, i);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	printk("\n");</div><div class='add'>+	pr_info("\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This is normally the 'Oops' routine */</div><div class='hunk'>@@ -157,10 +157,10 @@ void __noreturn die(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	console_verbose();</div><div class='del'>-	printk("\n%s#: %04lx\n", str, err &amp; 0xffff);</div><div class='add'>+	pr_emerg("\n%s#: %04lx\n", str, err &amp; 0xffff);</div><div class='ctx'> 	show_registers(regs);</div><div class='ctx'> #ifdef CONFIG_JUMP_UPON_UNHANDLED_EXCEPTION</div><div class='del'>-	printk("\n\nUNHANDLED_EXCEPTION: entering infinite loop\n");</div><div class='add'>+	pr_emerg("\n\nUNHANDLED_EXCEPTION: entering infinite loop\n");</div><div class='ctx'> </div><div class='ctx'> 	/* shut down interrupts */</div><div class='ctx'> 	local_irq_disable();</div><div class='hunk'>@@ -173,36 +173,51 @@ void __noreturn die(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> </div><div class='ctx'> asmlinkage void unhandled_exception(struct pt_regs *regs, int ea, int vector)</div><div class='ctx'> {</div><div class='del'>-	printk("Unable to handle exception at EA =0x%x, vector 0x%x",</div><div class='del'>-	       ea, vector);</div><div class='add'>+	pr_emerg("Unable to handle exception at EA =0x%x, vector 0x%x",</div><div class='add'>+		 ea, vector);</div><div class='ctx'> 	die("Oops", regs, 9);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)</div><div class='ctx'> {</div><div class='del'>-	int code = FPE_FLTUNK;</div><div class='del'>-	unsigned long fpcsr = regs-&gt;fpcsr;</div><div class='del'>-</div><div class='del'>-	if (fpcsr &amp; SPR_FPCSR_IVF)</div><div class='del'>-		code = FPE_FLTINV;</div><div class='del'>-	else if (fpcsr &amp; SPR_FPCSR_OVF)</div><div class='del'>-		code = FPE_FLTOVF;</div><div class='del'>-	else if (fpcsr &amp; SPR_FPCSR_UNF)</div><div class='del'>-		code = FPE_FLTUND;</div><div class='del'>-	else if (fpcsr &amp; SPR_FPCSR_DZF)</div><div class='del'>-		code = FPE_FLTDIV;</div><div class='del'>-	else if (fpcsr &amp; SPR_FPCSR_IXF)</div><div class='del'>-		code = FPE_FLTRES;</div><div class='del'>-</div><div class='del'>-	/* Clear all flags */</div><div class='del'>-	regs-&gt;fpcsr &amp;= ~SPR_FPCSR_ALLF;</div><div class='del'>-</div><div class='del'>-	force_sig_fault(SIGFPE, code, (void __user *)regs-&gt;pc);</div><div class='add'>+	if (user_mode(regs)) {</div><div class='add'>+		int code = FPE_FLTUNK;</div><div class='add'>+#ifdef CONFIG_FPU</div><div class='add'>+		unsigned long fpcsr;</div><div class='add'>+</div><div class='add'>+		save_fpu(current);</div><div class='add'>+		fpcsr = current-&gt;thread.fpcsr;</div><div class='add'>+</div><div class='add'>+		if (fpcsr &amp; SPR_FPCSR_IVF)</div><div class='add'>+			code = FPE_FLTINV;</div><div class='add'>+		else if (fpcsr &amp; SPR_FPCSR_OVF)</div><div class='add'>+			code = FPE_FLTOVF;</div><div class='add'>+		else if (fpcsr &amp; SPR_FPCSR_UNF)</div><div class='add'>+			code = FPE_FLTUND;</div><div class='add'>+		else if (fpcsr &amp; SPR_FPCSR_DZF)</div><div class='add'>+			code = FPE_FLTDIV;</div><div class='add'>+		else if (fpcsr &amp; SPR_FPCSR_IXF)</div><div class='add'>+			code = FPE_FLTRES;</div><div class='add'>+</div><div class='add'>+		/* Clear all flags */</div><div class='add'>+		current-&gt;thread.fpcsr &amp;= ~SPR_FPCSR_ALLF;</div><div class='add'>+		restore_fpu(current);</div><div class='add'>+#endif</div><div class='add'>+		force_sig_fault(SIGFPE, code, (void __user *)regs-&gt;pc);</div><div class='add'>+	} else {</div><div class='add'>+		pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs-&gt;pc);</div><div class='add'>+		die("Die:", regs, SIGFPE);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_trap(struct pt_regs *regs, unsigned long address)</div><div class='ctx'> {</div><div class='del'>-	force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs-&gt;pc);</div><div class='add'>+	if (user_mode(regs)) {</div><div class='add'>+		force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs-&gt;pc);</div><div class='add'>+	} else {</div><div class='add'>+		pr_emerg("KERNEL: Illegal trap exception 0x%.8lx\n", regs-&gt;pc);</div><div class='add'>+		die("Die:", regs, SIGILL);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_unaligned_access(struct pt_regs *regs, unsigned long address)</div><div class='hunk'>@@ -211,8 +226,7 @@ asmlinkage void do_unaligned_access(struct pt_regs *regs, unsigned long address)</div><div class='ctx'> 		/* Send a SIGBUS */</div><div class='ctx'> 		force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)address);</div><div class='ctx'> 	} else {</div><div class='del'>-		printk("KERNEL: Unaligned Access 0x%.8lx\n", address);</div><div class='del'>-		show_registers(regs);</div><div class='add'>+		pr_emerg("KERNEL: Unaligned Access 0x%.8lx\n", address);</div><div class='ctx'> 		die("Die:", regs, address);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -224,8 +238,7 @@ asmlinkage void do_bus_fault(struct pt_regs *regs, unsigned long address)</div><div class='ctx'> 		/* Send a SIGBUS */</div><div class='ctx'> 		force_sig_fault(SIGBUS, BUS_ADRERR, (void __user *)address);</div><div class='ctx'> 	} else {		/* Kernel mode */</div><div class='del'>-		printk("KERNEL: Bus error (SIGBUS) 0x%.8lx\n", address);</div><div class='del'>-		show_registers(regs);</div><div class='add'>+		pr_emerg("KERNEL: Bus error (SIGBUS) 0x%.8lx\n", address);</div><div class='ctx'> 		die("Die:", regs, address);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -419,9 +432,8 @@ asmlinkage void do_illegal_instruction(struct pt_regs *regs,</div><div class='ctx'> 		/* Send a SIGILL */</div><div class='ctx'> 		force_sig_fault(SIGILL, ILL_ILLOPC, (void __user *)address);</div><div class='ctx'> 	} else {		/* Kernel mode */</div><div class='del'>-		printk("KERNEL: Illegal instruction (SIGILL) 0x%.8lx\n",</div><div class='del'>-		       address);</div><div class='del'>-		show_registers(regs);</div><div class='add'>+		pr_emerg("KERNEL: Illegal instruction (SIGILL) 0x%.8lx\n",</div><div class='add'>+			 address);</div><div class='ctx'> 		die("Die:", regs, address);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/parisc/configs/generic-32bit_defconfig b/arch/parisc/configs/generic-32bit_defconfig<br/>index ee4febb30386..5ce258f3fffa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/configs/generic-32bit_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/configs/generic-32bit_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/configs/generic-32bit_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/configs/generic-32bit_defconfig</a></div><div class='hunk'>@@ -131,7 +131,7 @@ CONFIG_PPDEV=m</div><div class='ctx'> CONFIG_I2C=y</div><div class='ctx'> CONFIG_HWMON=m</div><div class='ctx'> CONFIG_DRM=m</div><div class='del'>-CONFIG_DRM_DP_CEC=y</div><div class='add'>+CONFIG_DRM_DISPLAY_DP_AUX_CEC=y</div><div class='ctx'> # CONFIG_DRM_I2C_CH7006 is not set</div><div class='ctx'> # CONFIG_DRM_I2C_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_RADEON=m</div><div class='head'>diff --git a/arch/parisc/include/asm/cmpxchg.h b/arch/parisc/include/asm/cmpxchg.h<br/>index c1d776bb16b4..bf0a0f1189eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/include/asm/cmpxchg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/include/asm/cmpxchg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -56,26 +56,24 @@ __arch_xchg(unsigned long x, volatile void *ptr, int size)</div><div class='ctx'> /* bug catcher for when unsupported size is used - won't link */</div><div class='ctx'> extern void __cmpxchg_called_with_bad_pointer(void);</div><div class='ctx'> </div><div class='del'>-/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */</div><div class='del'>-extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old,</div><div class='del'>-				   unsigned int new_);</div><div class='del'>-extern u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new_);</div><div class='add'>+/* __cmpxchg_u... defined in arch/parisc/lib/bitops.c */</div><div class='ctx'> extern u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new_);</div><div class='add'>+extern u16 __cmpxchg_u16(volatile u16 *ptr, u16 old, u16 new_);</div><div class='add'>+extern u32 __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);</div><div class='add'>+extern u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new_);</div><div class='ctx'> </div><div class='ctx'> /* don't worry...optimizer will get rid of most of this */</div><div class='ctx'> static inline unsigned long</div><div class='ctx'> __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)</div><div class='ctx'> {</div><div class='del'>-	switch (size) {</div><div class='add'>+	return</div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='del'>-	case 8: return __cmpxchg_u64((u64 *)ptr, old, new_);</div><div class='add'>+		size == 8 ? __cmpxchg_u64(ptr, old, new_) :</div><div class='ctx'> #endif</div><div class='del'>-	case 4: return __cmpxchg_u32((unsigned int *)ptr,</div><div class='del'>-				     (unsigned int)old, (unsigned int)new_);</div><div class='del'>-	case 1: return __cmpxchg_u8((u8 *)ptr, old &amp; 0xff, new_ &amp; 0xff);</div><div class='del'>-	}</div><div class='del'>-	__cmpxchg_called_with_bad_pointer();</div><div class='del'>-	return old;</div><div class='add'>+		size == 4 ? __cmpxchg_u32(ptr, old, new_) :</div><div class='add'>+		size == 2 ? __cmpxchg_u16(ptr, old, new_) :</div><div class='add'>+		size == 1 ? __cmpxchg_u8(ptr, old, new_) :</div><div class='add'>+			(__cmpxchg_called_with_bad_pointer(), old);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define arch_cmpxchg(ptr, o, n)						 \</div><div class='head'>diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c<br/>index d214bbe3c2af..4e5d991b2b65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/kernel/module.c</a></div><div class='hunk'>@@ -41,7 +41,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -173,17 +172,6 @@ static inline int reassemble_22(int as22)</div><div class='ctx'> 		((as22 &amp; 0x0003ff) &lt;&lt; 3));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	/* using RWX means less protection for modules, but it's</div><div class='del'>-	 * easier than trying to map the text, data, init_text and</div><div class='del'>-	 * init_data correctly */</div><div class='del'>-	return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END,</div><div class='del'>-				    GFP_KERNEL,</div><div class='del'>-				    PAGE_KERNEL_RWX, 0, NUMA_NO_NODE,</div><div class='del'>-				    __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifndef CONFIG_64BIT</div><div class='ctx'> static inline unsigned long count_gots(const Elf_Rela *rela, unsigned long n)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c<br/>index 6f0c92e8149d..c1587aa35beb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/kernel/parisc_ksyms.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/kernel/parisc_ksyms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/kernel/parisc_ksyms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/kernel/parisc_ksyms.c</a></div><div class='hunk'>@@ -22,6 +22,8 @@ EXPORT_SYMBOL(memset);</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> EXPORT_SYMBOL(__xchg8);</div><div class='ctx'> EXPORT_SYMBOL(__xchg32);</div><div class='add'>+EXPORT_SYMBOL(__cmpxchg_u8);</div><div class='add'>+EXPORT_SYMBOL(__cmpxchg_u16);</div><div class='ctx'> EXPORT_SYMBOL(__cmpxchg_u32);</div><div class='ctx'> EXPORT_SYMBOL(__cmpxchg_u64);</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='head'>diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c<br/>index 444154271f23..800eb64e91ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/kernel/smp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/kernel/smp.c</a></div><div class='hunk'>@@ -344,7 +344,7 @@ static int smp_boot_one_cpu(int cpuid, struct task_struct *idle)</div><div class='ctx'> 		struct irq_desc *desc = irq_to_desc(i);</div><div class='ctx'> </div><div class='ctx'> 		if (desc &amp;&amp; desc-&gt;kstat_irqs)</div><div class='del'>-			*per_cpu_ptr(desc-&gt;kstat_irqs, cpuid) = 0;</div><div class='add'>+			*per_cpu_ptr(desc-&gt;kstat_irqs, cpuid) = (struct irqstat) { };</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/lib/bitops.c b/arch/parisc/lib/bitops.c<br/>index 36a314199074..9df810050642 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/lib/bitops.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/lib/bitops.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/lib/bitops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/lib/bitops.c</a></div><div class='hunk'>@@ -56,38 +56,20 @@ unsigned long notrace __xchg8(char x, volatile char *ptr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-u64 notrace __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u64 prev;</div><div class='del'>-</div><div class='del'>-	_atomic_spin_lock_irqsave(ptr, flags);</div><div class='del'>-	if ((prev = *ptr) == old)</div><div class='del'>-		*ptr = new;</div><div class='del'>-	_atomic_spin_unlock_irqrestore(ptr, flags);</div><div class='del'>-	return prev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long notrace __cmpxchg_u32(volatile unsigned int *ptr, unsigned int old, unsigned int new)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int prev;</div><div class='del'>-</div><div class='del'>-	_atomic_spin_lock_irqsave(ptr, flags);</div><div class='del'>-	if ((prev = *ptr) == old)</div><div class='del'>-		*ptr = new;</div><div class='del'>-	_atomic_spin_unlock_irqrestore(ptr, flags);</div><div class='del'>-	return (unsigned long)prev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u8 notrace __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u8 prev;</div><div class='del'>-</div><div class='del'>-	_atomic_spin_lock_irqsave(ptr, flags);</div><div class='del'>-	if ((prev = *ptr) == old)</div><div class='del'>-		*ptr = new;</div><div class='del'>-	_atomic_spin_unlock_irqrestore(ptr, flags);</div><div class='del'>-	return prev;</div><div class='del'>-}</div><div class='add'>+#define CMPXCHG(T)						\</div><div class='add'>+	T notrace __cmpxchg_##T(volatile T *ptr, T old, T new)	\</div><div class='add'>+	{							\</div><div class='add'>+		unsigned long flags;				\</div><div class='add'>+		T prev;						\</div><div class='add'>+								\</div><div class='add'>+		_atomic_spin_lock_irqsave(ptr, flags);		\</div><div class='add'>+		if ((prev = *ptr) == old)			\</div><div class='add'>+			*ptr = new;				\</div><div class='add'>+		_atomic_spin_unlock_irqrestore(ptr, flags);	\</div><div class='add'>+		return prev;					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+CMPXCHG(u64)</div><div class='add'>+CMPXCHG(u32)</div><div class='add'>+CMPXCHG(u16)</div><div class='add'>+CMPXCHG(u8)</div><div class='head'>diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c<br/>index f876af56e13f..34d91cb8b259 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/mm/init.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/nodemask.h&gt;	/* for node_online_map */</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;	/* for release_pages */</div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='hunk'>@@ -481,7 +482,7 @@ void free_initmem(void)</div><div class='ctx'> 	/* finally dump all the instructions which were cached, since the</div><div class='ctx'> 	 * pages are no-longer executable */</div><div class='ctx'> 	flush_icache_range(init_begin, init_end);</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	free_initmem_default(POISON_FREE_INITMEM);</div><div class='ctx'> </div><div class='ctx'> 	/* set up a new led state on systems shipped LED State panel */</div><div class='hunk'>@@ -992,3 +993,23 @@ static const pgprot_t protection_map[16] = {</div><div class='ctx'> 	[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ]	= PAGE_RWX</div><div class='ctx'> };</div><div class='ctx'> DECLARE_VM_GET_PAGE_PROT</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= VMALLOC_START,</div><div class='add'>+				.end	= VMALLOC_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL_RWX,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/parisc/net/bpf_jit_core.c b/arch/parisc/net/bpf_jit_core.c<br/>index d6ee2fd45550..979f45d4d1fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/parisc/net/bpf_jit_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/parisc/net/bpf_jit_core.c</a></div><div class='hunk'>@@ -167,7 +167,13 @@ skip_init_ctx:</div><div class='ctx'> 	bpf_flush_icache(jit_data-&gt;header, ctx-&gt;insns + ctx-&gt;ninsns);</div><div class='ctx'> </div><div class='ctx'> 	if (!prog-&gt;is_func || extra_pass) {</div><div class='del'>-		bpf_jit_binary_lock_ro(jit_data-&gt;header);</div><div class='add'>+		if (bpf_jit_binary_lock_ro(jit_data-&gt;header)) {</div><div class='add'>+			bpf_jit_binary_free(jit_data-&gt;header);</div><div class='add'>+			prog-&gt;bpf_func = NULL;</div><div class='add'>+			prog-&gt;jited = 0;</div><div class='add'>+			prog-&gt;jited_len = 0;</div><div class='add'>+			goto out_offset;</div><div class='add'>+		}</div><div class='ctx'> 		prologue_len = ctx-&gt;epilogue_offset - ctx-&gt;body_len;</div><div class='ctx'> 		for (i = 0; i &lt; prog-&gt;len; i++)</div><div class='ctx'> 			ctx-&gt;offset[i] += prologue_len;</div><div class='head'>diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig<br/>index 1c4be3373686..c7076e223fcd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/Kconfig</a></div><div class='hunk'>@@ -156,6 +156,7 @@ config PPC</div><div class='ctx'> 	select ARCH_HAS_UACCESS_FLUSHCACHE</div><div class='ctx'> 	select ARCH_HAS_UBSAN</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select ARCH_HAVE_EXTRA_ELF_NOTES        if SPU_BASE</div><div class='ctx'> 	select ARCH_KEEP_MEMBLOCK</div><div class='ctx'> 	select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE	if PPC_RADIX_MMU</div><div class='ctx'> 	select ARCH_MIGHT_HAVE_PC_PARPORT</div><div class='hunk'>@@ -285,7 +286,7 @@ config PPC</div><div class='ctx'> 	select IOMMU_HELPER			if PPC64</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='ctx'> 	select IRQ_FORCED_THREADING</div><div class='del'>-	select KASAN_VMALLOC			if KASAN &amp;&amp; MODULES</div><div class='add'>+	select KASAN_VMALLOC			if KASAN &amp;&amp; EXECMEM</div><div class='ctx'> 	select LOCK_MM_AND_FIND_VMA</div><div class='ctx'> 	select MMU_GATHER_PAGE_SIZE</div><div class='ctx'> 	select MMU_GATHER_RCU_TABLE_FREE</div><div class='head'>diff --git a/arch/powerpc/configs/adder875_defconfig b/arch/powerpc/configs/adder875_defconfig<br/>index 7f35d5bc1229..97f4d4851735 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/adder875_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/adder875_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/adder875_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/configs/adder875_defconfig</a></div><div class='hunk'>@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/powerpc/configs/ep88xc_defconfig b/arch/powerpc/configs/ep88xc_defconfig<br/>index a98ef6a4abef..50cc59eb36cf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ep88xc_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/ep88xc_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ep88xc_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/configs/ep88xc_defconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig<br/>index 5c56d36cdfc5..6f449411abf7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc866_ads_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/mpc866_ads_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc866_ads_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/configs/mpc866_ads_defconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_BUG is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig<br/>index 56b876e418e9..77306be62e9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc885_ads_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/mpc885_ads_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc885_ads_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/configs/mpc885_ads_defconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='head'>diff --git a/arch/powerpc/configs/tqm8xx_defconfig b/arch/powerpc/configs/tqm8xx_defconfig<br/>index 083c2e57520a..383c0966e92f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/tqm8xx_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/configs/tqm8xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/tqm8xx_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/configs/tqm8xx_defconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> CONFIG_MODULES=y</div><div class='head'>diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild<br/>index 61a8d5555cd7..e5fdc336c9b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/Kbuild?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/Kbuild?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/include/asm/Kbuild</a></div><div class='hunk'>@@ -6,5 +6,4 @@ generic-y += agp.h</div><div class='ctx'> generic-y += kvm_types.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += qrwlock.h</div><div class='del'>-generic-y += vtime.h</div><div class='ctx'> generic-y += early_ioremap.h</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h<br/>index 4961fb38e438..aff858ca99c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/cputime.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/cputime.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/cputime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/include/asm/cputime.h</a></div><div class='hunk'>@@ -32,23 +32,10 @@</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> #define get_accounting(tsk)	(&amp;get_paca()-&gt;accounting)</div><div class='ctx'> #define raw_get_accounting(tsk)	(&amp;local_paca-&gt;accounting)</div><div class='del'>-static inline void arch_vtime_task_switch(struct task_struct *tsk) { }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> #define get_accounting(tsk)	(&amp;task_thread_info(tsk)-&gt;accounting)</div><div class='ctx'> #define raw_get_accounting(tsk)	get_accounting(tsk)</div><div class='del'>-/*</div><div class='del'>- * Called from the context switch with interrupts disabled, to charge all</div><div class='del'>- * accumulated times to the current process, and to prepare accounting on</div><div class='del'>- * the next process.</div><div class='del'>- */</div><div class='del'>-static inline void arch_vtime_task_switch(struct task_struct *prev)</div><div class='del'>-{</div><div class='del'>-	struct cpu_accounting_data *acct = get_accounting(current);</div><div class='del'>-	struct cpu_accounting_data *acct0 = get_accounting(prev);</div><div class='del'>-</div><div class='del'>-	acct-&gt;starttime = acct0-&gt;starttime;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h<br/>index 79f1c480b5eb..bb4b94444d3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/elf.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/elf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/elf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/include/asm/elf.h</a></div><div class='hunk'>@@ -127,8 +127,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,</div><div class='ctx'> /* Notes used in ET_CORE. Note name is "SPU/&lt;fd&gt;/&lt;filename&gt;". */</div><div class='ctx'> #define NT_SPU		1</div><div class='ctx'> </div><div class='del'>-#define ARCH_HAVE_EXTRA_ELF_NOTES</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_SPU_BASE */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='head'>diff --git a/arch/powerpc/include/asm/kasan.h b/arch/powerpc/include/asm/kasan.h<br/>index 365d2720097c..b5bbb94c51f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/kasan.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/kasan.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/kasan.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/include/asm/kasan.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> #define KASAN_SHADOW_SCALE_SHIFT	3</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MODULES) &amp;&amp; defined(CONFIG_PPC32)</div><div class='add'>+#if defined(CONFIG_EXECMEM) &amp;&amp; defined(CONFIG_PPC32)</div><div class='ctx'> #define KASAN_KERN_START	ALIGN_DOWN(PAGE_OFFSET - SZ_256M, SZ_256M)</div><div class='ctx'> #else</div><div class='ctx'> #define KASAN_KERN_START	PAGE_OFFSET</div><div class='head'>diff --git a/arch/powerpc/include/asm/plpks.h b/arch/powerpc/include/asm/plpks.h<br/>index 23b77027c916..7a84069759b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/plpks.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/plpks.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/plpks.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/include/asm/plpks.h</a></div><div class='hunk'>@@ -44,9 +44,8 @@</div><div class='ctx'> #define PLPKS_MAX_DATA_SIZE		4000</div><div class='ctx'> </div><div class='ctx'> // Timeouts for PLPKS operations</div><div class='del'>-#define PLPKS_MAX_TIMEOUT		5000 // msec</div><div class='del'>-#define PLPKS_FLUSH_SLEEP		10 // msec</div><div class='del'>-#define PLPKS_FLUSH_SLEEP_RANGE		400</div><div class='add'>+#define PLPKS_MAX_TIMEOUT		(5 * USEC_PER_SEC)</div><div class='add'>+#define PLPKS_FLUSH_SLEEP		10000 // usec</div><div class='ctx'> </div><div class='ctx'> struct plpks_var {</div><div class='ctx'> 	char *component;</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso/gettimeofday.h b/arch/powerpc/include/asm/vdso/gettimeofday.h<br/>index 78302f6c2580..c6390890a60c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -13,6 +13,17 @@</div><div class='ctx'> </div><div class='ctx'> #define VDSO_HAS_TIME			1</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * powerpc specific delta calculation.</div><div class='add'>+ *</div><div class='add'>+ * This variant removes the masking of the subtraction because the</div><div class='add'>+ * clocksource mask of all VDSO capable clocksources on powerpc is U64_MAX</div><div class='add'>+ * which would result in a pointless operation. The compiler cannot</div><div class='add'>+ * optimize it away as the mask comes from the vdso data and is not compile</div><div class='add'>+ * time constant.</div><div class='add'>+ */</div><div class='add'>+#define VDSO_DELTA_NOMASK		1</div><div class='add'>+</div><div class='ctx'> static __always_inline int do_syscall_2(const unsigned long _r0, const unsigned long _r3,</div><div class='ctx'> 					const unsigned long _r4)</div><div class='ctx'> {</div><div class='hunk'>@@ -104,21 +115,6 @@ static inline bool vdso_clocksource_ok(const struct vdso_data *vd)</div><div class='ctx'> }</div><div class='ctx'> #define vdso_clocksource_ok vdso_clocksource_ok</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * powerpc specific delta calculation.</div><div class='del'>- *</div><div class='del'>- * This variant removes the masking of the subtraction because the</div><div class='del'>- * clocksource mask of all VDSO capable clocksources on powerpc is U64_MAX</div><div class='del'>- * which would result in a pointless operation. The compiler cannot</div><div class='del'>- * optimize it away as the mask comes from the vdso data and is not compile</div><div class='del'>- * time constant.</div><div class='del'>- */</div><div class='del'>-static __always_inline u64 vdso_calc_delta(u64 cycles, u64 last, u64 mask, u32 mult)</div><div class='del'>-{</div><div class='del'>-	return (cycles - last) * mult;</div><div class='del'>-}</div><div class='del'>-#define vdso_calc_delta vdso_calc_delta</div><div class='del'>-</div><div class='ctx'> #ifndef __powerpc64__</div><div class='ctx'> static __always_inline u64 vdso_shift_ns(u64 ns, unsigned long shift)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S<br/>index 647b0b445e89..edc479a7c2bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/head_8xx.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/head_8xx.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/head_8xx.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/kernel/head_8xx.S</a></div><div class='hunk'>@@ -199,12 +199,12 @@ instruction_counter:</div><div class='ctx'> 	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */</div><div class='ctx'> 	INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)</div><div class='ctx'> 	mtspr	SPRN_MD_EPN, r10</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='ctx'> 	mfcr	r11</div><div class='ctx'> 	compare_to_kernel_boundary r10, r10</div><div class='ctx'> #endif</div><div class='ctx'> 	mfspr	r10, SPRN_M_TWB	/* Get level 1 table */</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='ctx'> 	blt+	3f</div><div class='ctx'> 	rlwinm	r10, r10, 0, 20, 31</div><div class='ctx'> 	oris	r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha</div><div class='head'>diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S<br/>index c1d89764dd22..57196883a00e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/head_book3s_32.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/head_book3s_32.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/head_book3s_32.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/kernel/head_book3s_32.S</a></div><div class='hunk'>@@ -419,14 +419,14 @@ InstructionTLBMiss:</div><div class='ctx'>  */</div><div class='ctx'> 	/* Get PTE (linux-style) and check access */</div><div class='ctx'> 	mfspr	r3,SPRN_IMISS</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='ctx'> 	lis	r1, TASK_SIZE@h		/* check if kernel address */</div><div class='ctx'> 	cmplw	0,r1,r3</div><div class='ctx'> #endif</div><div class='ctx'> 	mfspr	r2, SPRN_SDR1</div><div class='ctx'> 	li	r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC</div><div class='ctx'> 	rlwinm	r2, r2, 28, 0xfffff000</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='ctx'> 	li	r0, 3</div><div class='ctx'> 	bgt-	112f</div><div class='ctx'> 	lis	r2, (swapper_pg_dir - PAGE_OFFSET)@ha	/* if kernel address, use */</div><div class='hunk'>@@ -442,7 +442,7 @@ InstructionTLBMiss:</div><div class='ctx'> 	andc.	r1,r1,r2		/* check access &amp; ~permission */</div><div class='ctx'> 	bne-	InstructionAddressInvalid /* return if access not permitted */</div><div class='ctx'> 	/* Convert linux-style PTE to low word of PPC-style PTE */</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='ctx'> 	rlwimi	r2, r0, 0, 31, 31	/* userspace ? -&gt; PP lsb */</div><div class='ctx'> #endif</div><div class='ctx'> 	ori	r1, r1, 0xe06		/* clear out reserved bits */</div><div class='head'>diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c<br/>index bbca90a5e2ec..14c5ddec3056 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/kprobes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/kprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/kernel/kprobes.c</a></div><div class='hunk'>@@ -19,8 +19,8 @@</div><div class='ctx'> #include &lt;linux/extable.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/set_memory.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> #include &lt;asm/code-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/sstep.h&gt;</div><div class='hunk'>@@ -126,26 +126,6 @@ kprobe_opcode_t *arch_adjust_kprobe_addr(unsigned long addr, unsigned long offse</div><div class='ctx'> 	return (kprobe_opcode_t *)(addr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *alloc_insn_page(void)</div><div class='del'>-{</div><div class='del'>-	void *page;</div><div class='del'>-</div><div class='del'>-	page = module_alloc(PAGE_SIZE);</div><div class='del'>-	if (!page)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (strict_module_rwx_enabled()) {</div><div class='del'>-		int err = set_memory_rox((unsigned long)page, 1);</div><div class='del'>-</div><div class='del'>-		if (err)</div><div class='del'>-			goto error;</div><div class='del'>-	}</div><div class='del'>-	return page;</div><div class='del'>-error:</div><div class='del'>-	module_memfree(page);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int arch_prepare_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='head'>diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c<br/>index f6d6ae0a1692..77ea82e9dc5f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/kernel/module.c</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;asm/module.h&gt;</div><div class='hunk'>@@ -88,40 +87,3 @@ int module_finalize(const Elf_Ehdr *hdr,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static __always_inline void *</div><div class='del'>-__module_alloc(unsigned long size, unsigned long start, unsigned long end, bool nowarn)</div><div class='del'>-{</div><div class='del'>-	pgprot_t prot = strict_module_rwx_enabled() ? PAGE_KERNEL : PAGE_KERNEL_EXEC;</div><div class='del'>-	gfp_t gfp = GFP_KERNEL | (nowarn ? __GFP_NOWARN : 0);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Don't do huge page allocations for modules yet until more testing</div><div class='del'>-	 * is done. STRICT_MODULE_RWX may require extra work to support this</div><div class='del'>-	 * too.</div><div class='del'>-	 */</div><div class='del'>-	return __vmalloc_node_range(size, 1, start, end, gfp, prot,</div><div class='del'>-				    VM_FLUSH_RESET_PERMS,</div><div class='del'>-				    NUMA_NO_NODE, __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-#ifdef MODULES_VADDR</div><div class='del'>-	unsigned long limit = (unsigned long)_etext - SZ_32M;</div><div class='del'>-	void *ptr = NULL;</div><div class='del'>-</div><div class='del'>-	BUILD_BUG_ON(TASK_SIZE &gt; MODULES_VADDR);</div><div class='del'>-</div><div class='del'>-	/* First try within 32M limit from _etext to avoid branch trampolines */</div><div class='del'>-	if (MODULES_VADDR &lt; PAGE_OFFSET &amp;&amp; MODULES_END &gt; limit)</div><div class='del'>-		ptr = __module_alloc(size, limit, MODULES_END, true);</div><div class='del'>-</div><div class='del'>-	if (!ptr)</div><div class='del'>-		ptr = __module_alloc(size, MODULES_VADDR, MODULES_END, false);</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='del'>-#else</div><div class='del'>-	return __module_alloc(size, VMALLOC_START, VMALLOC_END, false);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c<br/>index df20cf201f74..c0fdc6d94fee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/time.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kernel/time.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/time.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/kernel/time.c</a></div><div class='hunk'>@@ -354,6 +354,28 @@ void vtime_flush(struct task_struct *tsk)</div><div class='ctx'> 	acct-&gt;hardirq_time = 0;</div><div class='ctx'> 	acct-&gt;softirq_time = 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from the context switch with interrupts disabled, to charge all</div><div class='add'>+ * accumulated times to the current process, and to prepare accounting on</div><div class='add'>+ * the next process.</div><div class='add'>+ */</div><div class='add'>+void vtime_task_switch(struct task_struct *prev)</div><div class='add'>+{</div><div class='add'>+	if (is_idle_task(prev))</div><div class='add'>+		vtime_account_idle(prev);</div><div class='add'>+	else</div><div class='add'>+		vtime_account_kernel(prev);</div><div class='add'>+</div><div class='add'>+	vtime_flush(prev);</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_PPC64)) {</div><div class='add'>+		struct cpu_accounting_data *acct = get_accounting(current);</div><div class='add'>+		struct cpu_accounting_data *acct0 = get_accounting(prev);</div><div class='add'>+</div><div class='add'>+		acct-&gt;starttime = acct0-&gt;starttime;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */</div><div class='ctx'> </div><div class='ctx'> void __no_kcsan __delay(unsigned long loops)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c<br/>index e42984878503..f2636414d82a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/book3s_hv_rm_xics.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/kvm/book3s_hv_rm_xics.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/book3s_hv_rm_xics.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/kvm/book3s_hv_rm_xics.c</a></div><div class='hunk'>@@ -837,7 +837,7 @@ static inline void this_cpu_inc_rm(unsigned int __percpu *addr)</div><div class='ctx'>  */</div><div class='ctx'> static void kvmppc_rm_handle_irq_desc(struct irq_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	this_cpu_inc_rm(desc-&gt;kstat_irqs);</div><div class='add'>+	this_cpu_inc_rm(&amp;desc-&gt;kstat_irqs-&gt;cnt);</div><div class='ctx'> 	__this_cpu_inc(kstat.irqs_sum);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c<br/>index c6ab46156cda..7af791446ddf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/code-patching.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/lib/code-patching.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/code-patching.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/lib/code-patching.c</a></div><div class='hunk'>@@ -225,7 +225,7 @@ void __init poking_init(void)</div><div class='ctx'> </div><div class='ctx'> static unsigned long get_patch_pfn(void *addr)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ENABLED(CONFIG_MODULES) &amp;&amp; is_vmalloc_or_module_addr(addr))</div><div class='add'>+	if (IS_ENABLED(CONFIG_EXECMEM) &amp;&amp; is_vmalloc_or_module_addr(addr))</div><div class='ctx'> 		return vmalloc_to_pfn(addr);</div><div class='ctx'> 	else</div><div class='ctx'> 		return __pa_symbol(addr) &gt;&gt; PAGE_SHIFT;</div><div class='head'>diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c<br/>index 100f999871bc..625fe7d08e06 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/mm/book3s32/mmu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/mm/book3s32/mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/mm/book3s32/mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/mm/book3s32/mmu.c</a></div><div class='hunk'>@@ -184,7 +184,7 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)</div><div class='ctx'> </div><div class='ctx'> static bool is_module_segment(unsigned long addr)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ENABLED(CONFIG_MODULES))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_EXECMEM))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (addr &lt; ALIGN_DOWN(MODULES_VADDR, SZ_256M))</div><div class='ctx'> 		return false;</div><div class='head'>diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c<br/>index 3a440004b97d..5de62a3c1d4b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/mm/mem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/mm/mem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/mm/mem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/mm/mem.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/dma-direct.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/swiotlb.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='hunk'>@@ -406,3 +407,66 @@ int devmem_is_allowed(unsigned long pfn)</div><div class='ctx'>  * the EHEA driver. Drop this when drivers/net/ethernet/ibm/ehea is removed.</div><div class='ctx'>  */</div><div class='ctx'> EXPORT_SYMBOL_GPL(walk_system_ram_range);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	pgprot_t kprobes_prot = strict_module_rwx_enabled() ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;</div><div class='add'>+	pgprot_t prot = strict_module_rwx_enabled() ? PAGE_KERNEL : PAGE_KERNEL_EXEC;</div><div class='add'>+	unsigned long fallback_start = 0, fallback_end = 0;</div><div class='add'>+	unsigned long start, end;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * BOOK3S_32 and 8xx define MODULES_VADDR for text allocations and</div><div class='add'>+	 * allow allocating data in the entire vmalloc space</div><div class='add'>+	 */</div><div class='add'>+#ifdef MODULES_VADDR</div><div class='add'>+	unsigned long limit = (unsigned long)_etext - SZ_32M;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(TASK_SIZE &gt; MODULES_VADDR);</div><div class='add'>+</div><div class='add'>+	/* First try within 32M limit from _etext to avoid branch trampolines */</div><div class='add'>+	if (MODULES_VADDR &lt; PAGE_OFFSET &amp;&amp; MODULES_END &gt; limit) {</div><div class='add'>+		start = limit;</div><div class='add'>+		fallback_start = MODULES_VADDR;</div><div class='add'>+		fallback_end = MODULES_END;</div><div class='add'>+	} else {</div><div class='add'>+		start = MODULES_VADDR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	end = MODULES_END;</div><div class='add'>+#else</div><div class='add'>+	start = VMALLOC_START;</div><div class='add'>+	end = VMALLOC_END;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= start,</div><div class='add'>+				.end	= end,</div><div class='add'>+				.pgprot	= prot,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+				.fallback_start	= fallback_start,</div><div class='add'>+				.fallback_end	= fallback_end,</div><div class='add'>+			},</div><div class='add'>+			[EXECMEM_KPROBES] = {</div><div class='add'>+				.start	= VMALLOC_START,</div><div class='add'>+				.end	= VMALLOC_END,</div><div class='add'>+				.pgprot	= kprobes_prot,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+			[EXECMEM_MODULE_DATA] = {</div><div class='add'>+				.start	= VMALLOC_START,</div><div class='add'>+				.end	= VMALLOC_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c<br/>index e8c4129697b1..b1e6d275cda9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/iommu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/platforms/pseries/iommu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/iommu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/platforms/pseries/iommu.c</a></div><div class='hunk'>@@ -786,8 +786,16 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)</div><div class='ctx'> 	 * parent bus. During reboot, there will be ibm,dma-window property to</div><div class='ctx'> 	 * define DMA window. For kdump, there will at least be default window or DDW</div><div class='ctx'> 	 * or both.</div><div class='add'>+	 * There is an exception to the above. In case the PE goes into frozen</div><div class='add'>+	 * state, firmware may not provide ibm,dma-window property at the time</div><div class='add'>+	 * of LPAR boot up.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	if (!pdn) {</div><div class='add'>+		pr_debug("  no ibm,dma-window property !\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ppci = PCI_DN(pdn);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("  parent is %pOF, iommu_table: 0x%p\n",</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/plpks.c b/arch/powerpc/platforms/pseries/plpks.c<br/>index febe18f251d0..4a595493d28a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/plpks.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/powerpc/platforms/pseries/plpks.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/plpks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/powerpc/platforms/pseries/plpks.c</a></div><div class='hunk'>@@ -415,8 +415,7 @@ static int plpks_confirm_object_flushed(struct label *label,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		usleep_range(PLPKS_FLUSH_SLEEP,</div><div class='del'>-			     PLPKS_FLUSH_SLEEP + PLPKS_FLUSH_SLEEP_RANGE);</div><div class='add'>+		fsleep(PLPKS_FLUSH_SLEEP);</div><div class='ctx'> 		timeout = timeout + PLPKS_FLUSH_SLEEP;</div><div class='ctx'> 	} while (timeout &lt; PLPKS_MAX_TIMEOUT);</div><div class='ctx'> </div><div class='hunk'>@@ -464,9 +463,10 @@ int plpks_signed_update_var(struct plpks_var *var, u64 flags)</div><div class='ctx'> </div><div class='ctx'> 		continuetoken = retbuf[0];</div><div class='ctx'> 		if (pseries_status_to_err(rc) == -EBUSY) {</div><div class='del'>-			int delay_ms = get_longbusy_msecs(rc);</div><div class='del'>-			mdelay(delay_ms);</div><div class='del'>-			timeout += delay_ms;</div><div class='add'>+			int delay_us = get_longbusy_msecs(rc) * 1000;</div><div class='add'>+</div><div class='add'>+			fsleep(delay_us);</div><div class='add'>+			timeout += delay_us;</div><div class='ctx'> 		}</div><div class='ctx'> 		rc = pseries_status_to_err(rc);</div><div class='ctx'> 	} while (rc == -EBUSY &amp;&amp; timeout &lt; PLPKS_MAX_TIMEOUT);</div><div class='head'>diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig<br/>index be09c8836d56..9e87287942dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/Kconfig</a></div><div class='hunk'>@@ -173,6 +173,8 @@ config RISCV</div><div class='ctx'> 	select PCI_DOMAINS_GENERIC if PCI</div><div class='ctx'> 	select PCI_MSI if PCI</div><div class='ctx'> 	select RISCV_ALTERNATIVE if !XIP_KERNEL</div><div class='add'>+	select RISCV_APLIC</div><div class='add'>+	select RISCV_IMSIC</div><div class='ctx'> 	select RISCV_INTC</div><div class='ctx'> 	select RISCV_TIMER if RISCV_SBI</div><div class='ctx'> 	select SIFIVE_PLIC</div><div class='head'>diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata<br/>index 910ba8837add..2acc7d876e1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/Kconfig.errata?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Kconfig.errata</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/Kconfig.errata?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/Kconfig.errata</a></div><div class='hunk'>@@ -82,14 +82,14 @@ config ERRATA_THEAD</div><div class='ctx'> </div><div class='ctx'> 	  Otherwise, please say "N" here to avoid unnecessary overhead.</div><div class='ctx'> </div><div class='del'>-config ERRATA_THEAD_PBMT</div><div class='del'>-	bool "Apply T-Head memory type errata"</div><div class='add'>+config ERRATA_THEAD_MAE</div><div class='add'>+	bool "Apply T-Head's memory attribute extension (XTheadMae) errata"</div><div class='ctx'> 	depends on ERRATA_THEAD &amp;&amp; 64BIT &amp;&amp; MMU</div><div class='ctx'> 	select RISCV_ALTERNATIVE_EARLY</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  This will apply the memory type errata to handle the non-standard</div><div class='del'>-	  memory type bits in page-table-entries on T-Head SoCs.</div><div class='add'>+	  This will apply the memory attribute extension errata to handle the</div><div class='add'>+	  non-standard PTE utilization on T-Head SoCs (XTheadMae).</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say "Y".</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs<br/>index 623de5f8a208..f51bb24bc84c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/Kconfig.socs?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Kconfig.socs</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/Kconfig.socs?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/Kconfig.socs</a></div><div class='hunk'>@@ -1,12 +1,12 @@</div><div class='ctx'> menu "SoC selection"</div><div class='ctx'> </div><div class='ctx'> config ARCH_MICROCHIP_POLARFIRE</div><div class='del'>-	def_bool SOC_MICROCHIP_POLARFIRE</div><div class='add'>+	def_bool ARCH_MICROCHIP</div><div class='ctx'> </div><div class='del'>-config SOC_MICROCHIP_POLARFIRE</div><div class='del'>-	bool "Microchip PolarFire SoCs"</div><div class='add'>+config ARCH_MICROCHIP</div><div class='add'>+	bool "Microchip SoCs"</div><div class='ctx'> 	help</div><div class='del'>-	  This enables support for Microchip PolarFire SoC platforms.</div><div class='add'>+	  This enables support for Microchip SoC platforms.</div><div class='ctx'> </div><div class='ctx'> config ARCH_RENESAS</div><div class='ctx'> 	bool "Renesas RISC-V SoCs"</div><div class='hunk'>@@ -14,9 +14,6 @@ config ARCH_RENESAS</div><div class='ctx'> 	  This enables support for the RISC-V based Renesas SoCs.</div><div class='ctx'> </div><div class='ctx'> config ARCH_SIFIVE</div><div class='del'>-	def_bool SOC_SIFIVE</div><div class='del'>-</div><div class='del'>-config SOC_SIFIVE</div><div class='ctx'> 	bool "SiFive SoCs"</div><div class='ctx'> 	select ERRATA_SIFIVE if !XIP_KERNEL</div><div class='ctx'> 	help</div><div class='hunk'>@@ -55,9 +52,6 @@ config ARCH_THEAD</div><div class='ctx'> 	  This enables support for the RISC-V based T-HEAD SoCs.</div><div class='ctx'> </div><div class='ctx'> config ARCH_VIRT</div><div class='del'>-	def_bool SOC_VIRT</div><div class='del'>-</div><div class='del'>-config SOC_VIRT</div><div class='ctx'> 	bool "QEMU Virt Machine"</div><div class='ctx'> 	select CLINT_TIMER if RISCV_M_MODE</div><div class='ctx'> 	select POWER_RESET</div><div class='hunk'>@@ -72,11 +66,13 @@ config SOC_VIRT</div><div class='ctx'> 	  This enables support for QEMU Virt Machine.</div><div class='ctx'> </div><div class='ctx'> config ARCH_CANAAN</div><div class='del'>-	def_bool SOC_CANAAN</div><div class='add'>+	bool "Canaan Kendryte SoC"</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Canaan Kendryte series SoC platform hardware.</div><div class='ctx'> </div><div class='del'>-config SOC_CANAAN</div><div class='add'>+config SOC_CANAAN_K210</div><div class='ctx'> 	bool "Canaan Kendryte K210 SoC"</div><div class='del'>-	depends on !MMU</div><div class='add'>+	depends on !MMU &amp;&amp; ARCH_CANAAN</div><div class='ctx'> 	select CLINT_TIMER if RISCV_M_MODE</div><div class='ctx'> 	select ARCH_HAS_RESET_CONTROLLER</div><div class='ctx'> 	select PINCTRL</div><div class='head'>diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile<br/>index 5b3115a19852..1e002d8003c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/Makefile</a></div><div class='hunk'>@@ -154,7 +154,7 @@ vdso-install-y			+= arch/riscv/kernel/vdso/vdso.so.dbg</div><div class='ctx'> vdso-install-$(CONFIG_COMPAT)	+= arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg</div><div class='ctx'> </div><div class='ctx'> ifneq ($(CONFIG_XIP_KERNEL),y)</div><div class='del'>-ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)</div><div class='add'>+ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN_K210),yy)</div><div class='ctx'> KBUILD_IMAGE := $(boot)/loader.bin</div><div class='ctx'> else</div><div class='ctx'> ifeq ($(CONFIG_EFI_ZBOOT),)</div><div class='head'>diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi<br/>index f35324b9173c..e0ddf8f602c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/renesas/r9a07g043f.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/boot/dts/renesas/r9a07g043f.dtsi</a></div><div class='hunk'>@@ -54,6 +54,81 @@</div><div class='ctx'> 	dma-noncoherent;</div><div class='ctx'> 	interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'> </div><div class='add'>+	irqc: interrupt-controller@110a0000 {</div><div class='add'>+		compatible = "renesas,r9a07g043f-irqc";</div><div class='add'>+		reg = &lt;0 0x110a0000 0 0x20000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;476 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;477 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;478 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;479 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;480 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;481 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;482 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;483 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;484 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;485 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;486 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;487 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;488 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;489 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;490 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;491 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;492 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;493 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;494 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;495 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;496 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;497 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;498 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;499 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;500 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;501 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;502 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;503 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;504 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;505 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;506 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;507 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;66 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;67 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;68 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;69 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;70 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;71 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupt-names = "nmi",</div><div class='add'>+				  "irq0", "irq1", "irq2", "irq3",</div><div class='add'>+				  "irq4", "irq5", "irq6", "irq7",</div><div class='add'>+				  "tint0", "tint1", "tint2", "tint3",</div><div class='add'>+				  "tint4", "tint5", "tint6", "tint7",</div><div class='add'>+				  "tint8", "tint9", "tint10", "tint11",</div><div class='add'>+				  "tint12", "tint13", "tint14", "tint15",</div><div class='add'>+				  "tint16", "tint17", "tint18", "tint19",</div><div class='add'>+				  "tint20", "tint21", "tint22", "tint23",</div><div class='add'>+				  "tint24", "tint25", "tint26", "tint27",</div><div class='add'>+				  "tint28", "tint29", "tint30", "tint31",</div><div class='add'>+				  "bus-err", "ec7tie1-0", "ec7tie2-0",</div><div class='add'>+				  "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1",</div><div class='add'>+				  "ec7tiovf-1";</div><div class='add'>+		clocks = &lt;&amp;cpg CPG_MOD R9A07G043_IAX45_CLK&gt;,</div><div class='add'>+			 &lt;&amp;cpg CPG_MOD R9A07G043_IAX45_PCLK&gt;;</div><div class='add'>+		clock-names = "clk", "pclk";</div><div class='add'>+		power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+		resets = &lt;&amp;cpg R9A07G043_IAX45_RESETN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	plic: interrupt-controller@12c00000 {</div><div class='ctx'> 		compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi<br/>index 433ab5c6a626..5e808242649e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi</a></div><div class='hunk'>@@ -6,19 +6,3 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;arm64/renesas/rzg2ul-smarc-som.dtsi&gt;</div><div class='del'>-</div><div class='del'>-#if (!SW_ET0_EN_N)</div><div class='del'>-&amp;eth0 {</div><div class='del'>-	phy0: ethernet-phy@7 {</div><div class='del'>-		/delete-property/ interrupt-parent;</div><div class='del'>-		/delete-property/ interrupts;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-&amp;eth1 {</div><div class='del'>-	phy1: ethernet-phy@7 {</div><div class='del'>-		/delete-property/ interrupt-parent;</div><div class='del'>-		/delete-property/ interrupts;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts<br/>index 3af9e34b3bc7..cd013588adc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts</a></div><div class='hunk'>@@ -23,9 +23,15 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory@80000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x80000000 0x3f40000&gt;;</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		coprocessor_rtos: region@83f40000 {</div><div class='add'>+			reg = &lt;0x83f40000 0xc0000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -33,6 +39,14 @@</div><div class='ctx'> 	clock-frequency = &lt;25000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi<br/>index 165e9e320a8c..ec9530972ae2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv1800b.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv1800b.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv1800b.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/boot/dts/sophgo/cv1800b.dtsi</a></div><div class='hunk'>@@ -7,6 +7,11 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "sophgo,cv1800b";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;plic {</div><div class='hunk'>@@ -16,3 +21,7 @@</div><div class='ctx'> &amp;clint {</div><div class='ctx'> 	compatible = "sophgo,cv1800b-clint", "thead,c900-clint";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;clk {</div><div class='add'>+	compatible = "sophgo,cv1800-clk";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi<br/>index 3e7a942f5c1a..7fa4c1e2d1da 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv1812h.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv1812h.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv1812h.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/boot/dts/sophgo/cv1812h.dtsi</a></div><div class='hunk'>@@ -22,3 +22,7 @@</div><div class='ctx'> &amp;clint {</div><div class='ctx'> 	compatible = "sophgo,cv1812h-clint", "thead,c900-clint";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;clk {</div><div class='add'>+	compatible = "sophgo,cv1810-clk";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi<br/>index 2d6f4a4b1e58..891932ae470f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  * Copyright (C) 2023 Inochi Amaoto &lt;inochiama@outlook.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/sophgo,cv1800.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -53,6 +55,12 @@</div><div class='ctx'> 		dma-noncoherent;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		clk: clock-controller@3002000 {</div><div class='add'>+			reg = &lt;0x03002000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpio0: gpio@3020000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0x3020000 0x1000&gt;;</div><div class='hunk'>@@ -125,11 +133,67 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		i2c0: i2c@4000000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x04000000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C0&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			interrupts = &lt;49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@4010000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x04010000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C1&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			interrupts = &lt;50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@4020000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x04020000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C2&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			interrupts = &lt;51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@4030000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x04030000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C3&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			interrupts = &lt;52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@4040000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x04040000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C4&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			interrupts = &lt;53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@4140000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04140000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_UART0&gt;, &lt;&amp;clk CLK_APB_UART0&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -139,7 +203,8 @@</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04150000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_UART1&gt;, &lt;&amp;clk CLK_APB_UART1&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -149,7 +214,8 @@</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04160000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_UART2&gt;, &lt;&amp;clk CLK_APB_UART2&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -159,22 +225,78 @@</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04170000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_UART3&gt;, &lt;&amp;clk CLK_APB_UART3&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi0: spi@4180000 {</div><div class='add'>+			compatible = "snps,dw-apb-ssi";</div><div class='add'>+			reg = &lt;0x04180000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI0&gt;;</div><div class='add'>+			clock-names = "ssi_clk", "pclk";</div><div class='add'>+			interrupts = &lt;54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@4190000 {</div><div class='add'>+			compatible = "snps,dw-apb-ssi";</div><div class='add'>+			reg = &lt;0x04190000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI1&gt;;</div><div class='add'>+			clock-names = "ssi_clk", "pclk";</div><div class='add'>+			interrupts = &lt;55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@41a0000 {</div><div class='add'>+			compatible = "snps,dw-apb-ssi";</div><div class='add'>+			reg = &lt;0x041a0000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI2&gt;;</div><div class='add'>+			clock-names = "ssi_clk", "pclk";</div><div class='add'>+			interrupts = &lt;56 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi3: spi@41b0000 {</div><div class='add'>+			compatible = "snps,dw-apb-ssi";</div><div class='add'>+			reg = &lt;0x041b0000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI3&gt;;</div><div class='add'>+			clock-names = "ssi_clk", "pclk";</div><div class='add'>+			interrupts = &lt;57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart4: serial@41c0000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x041c0000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_UART4&gt;, &lt;&amp;clk CLK_APB_UART4&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdhci0: mmc@4310000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-dwcmshc";</div><div class='add'>+			reg = &lt;0x4310000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_AXI4_SD0&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_SD0&gt;;</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		plic: interrupt-controller@70000000 {</div><div class='ctx'> 			reg = &lt;0x70000000 0x4000000&gt;;</div><div class='ctx'> 			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;;</div><div class='head'>diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig<br/>index fc0ec2ee13bc..3cae018f9315 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/configs/defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/configs/defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/configs/defconfig</a></div><div class='hunk'>@@ -25,14 +25,15 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='del'>-CONFIG_SOC_MICROCHIP_POLARFIRE=y</div><div class='add'>+CONFIG_ARCH_MICROCHIP=y</div><div class='ctx'> CONFIG_ARCH_RENESAS=y</div><div class='del'>-CONFIG_SOC_SIFIVE=y</div><div class='add'>+CONFIG_ARCH_SIFIVE=y</div><div class='ctx'> CONFIG_ARCH_SOPHGO=y</div><div class='ctx'> CONFIG_SOC_STARFIVE=y</div><div class='ctx'> CONFIG_ARCH_SUNXI=y</div><div class='ctx'> CONFIG_ARCH_THEAD=y</div><div class='del'>-CONFIG_SOC_VIRT=y</div><div class='add'>+CONFIG_ARCH_VIRT=y</div><div class='add'>+CONFIG_ARCH_CANAAN=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_HOTPLUG_CPU=y</div><div class='ctx'> CONFIG_PM=y</div><div class='head'>diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig<br/>index 7e75200543f4..af9601da4643 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/configs/nommu_k210_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/nommu_k210_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/configs/nommu_k210_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/configs/nommu_k210_defconfig</a></div><div class='hunk'>@@ -11,7 +11,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> # CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> # CONFIG_FHANDLE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -27,7 +27,8 @@ CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_SLUB=y</div><div class='ctx'> CONFIG_SLUB_TINY=y</div><div class='ctx'> # CONFIG_MMU is not set</div><div class='del'>-CONFIG_SOC_CANAAN=y</div><div class='add'>+CONFIG_ARCH_CANAAN=y</div><div class='add'>+CONFIG_SOC_CANAAN_K210=y</div><div class='ctx'> CONFIG_NONPORTABLE=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_NR_CPUS=2</div><div class='head'>diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig<br/>index 0ba353e9ca71..dd460c649152 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/configs/nommu_k210_sdcard_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/nommu_k210_sdcard_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/configs/nommu_k210_sdcard_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/configs/nommu_k210_sdcard_defconfig</a></div><div class='hunk'>@@ -3,7 +3,7 @@ CONFIG_LOG_BUF_SHIFT=13</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> # CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> # CONFIG_FHANDLE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='hunk'>@@ -19,7 +19,8 @@ CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_SLUB=y</div><div class='ctx'> CONFIG_SLUB_TINY=y</div><div class='ctx'> # CONFIG_MMU is not set</div><div class='del'>-CONFIG_SOC_CANAAN=y</div><div class='add'>+CONFIG_ARCH_CANAAN=y</div><div class='add'>+CONFIG_SOC_CANAAN_K210=y</div><div class='ctx'> CONFIG_NONPORTABLE=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_NR_CPUS=2</div><div class='head'>diff --git a/arch/riscv/configs/nommu_virt_defconfig b/arch/riscv/configs/nommu_virt_defconfig<br/>index b794e2f8144e..d4b03dc3c2c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/configs/nommu_virt_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/configs/nommu_virt_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/configs/nommu_virt_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/configs/nommu_virt_defconfig</a></div><div class='hunk'>@@ -10,7 +10,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> # CONFIG_FHANDLE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='ctx'> # CONFIG_TIMERFD is not set</div><div class='hunk'>@@ -24,7 +24,7 @@ CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_SLUB=y</div><div class='ctx'> CONFIG_SLUB_TINY=y</div><div class='ctx'> # CONFIG_MMU is not set</div><div class='del'>-CONFIG_SOC_VIRT=y</div><div class='add'>+CONFIG_ARCH_VIRT=y</div><div class='ctx'> CONFIG_NONPORTABLE=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"</div><div class='head'>diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c<br/>index b1c410bbc1ae..bf6a0a6318ee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/errata/thead/errata.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/errata/thead/errata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/errata/thead/errata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/errata/thead/errata.c</a></div><div class='hunk'>@@ -19,20 +19,26 @@</div><div class='ctx'> #include &lt;asm/patch.h&gt;</div><div class='ctx'> #include &lt;asm/vendorid_list.h&gt;</div><div class='ctx'> </div><div class='del'>-static bool errata_probe_pbmt(unsigned int stage,</div><div class='del'>-			      unsigned long arch_id, unsigned long impid)</div><div class='add'>+#define CSR_TH_SXSTATUS		0x5c0</div><div class='add'>+#define SXSTATUS_MAEE		_AC(0x200000, UL)</div><div class='add'>+</div><div class='add'>+static bool errata_probe_mae(unsigned int stage,</div><div class='add'>+			     unsigned long arch_id, unsigned long impid)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_MAE))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (arch_id != 0 || impid != 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT ||</div><div class='del'>-	    stage == RISCV_ALTERNATIVES_MODULE)</div><div class='del'>-		return true;</div><div class='add'>+	if (stage != RISCV_ALTERNATIVES_EARLY_BOOT &amp;&amp;</div><div class='add'>+	    stage != RISCV_ALTERNATIVES_MODULE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!(csr_read(CSR_TH_SXSTATUS) &amp; SXSTATUS_MAEE))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -140,8 +146,8 @@ static u32 thead_errata_probe(unsigned int stage,</div><div class='ctx'> {</div><div class='ctx'> 	u32 cpu_req_errata = 0;</div><div class='ctx'> </div><div class='del'>-	if (errata_probe_pbmt(stage, archid, impid))</div><div class='del'>-		cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);</div><div class='add'>+	if (errata_probe_mae(stage, archid, impid))</div><div class='add'>+		cpu_req_errata |= BIT(ERRATA_THEAD_MAE);</div><div class='ctx'> </div><div class='ctx'> 	errata_probe_cmo(stage, archid, impid);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h<br/>index 1f2dbfb8a8bf..efd851e1b483 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/errata_list.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/asm/errata_list.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/errata_list.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/include/asm/errata_list.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ERRATA_THEAD</div><div class='del'>-#define	ERRATA_THEAD_PBMT 0</div><div class='add'>+#define	ERRATA_THEAD_MAE 0</div><div class='ctx'> #define	ERRATA_THEAD_PMU 1</div><div class='ctx'> #define	ERRATA_THEAD_NUMBER 2</div><div class='ctx'> #endif</div><div class='hunk'>@@ -53,20 +53,20 @@ asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID,	\</div><div class='ctx'>  * in the default case.</div><div class='ctx'>  */</div><div class='ctx'> #define ALT_SVPBMT_SHIFT 61</div><div class='del'>-#define ALT_THEAD_PBMT_SHIFT 59</div><div class='add'>+#define ALT_THEAD_MAE_SHIFT 59</div><div class='ctx'> #define ALT_SVPBMT(_val, prot)						\</div><div class='ctx'> asm(ALTERNATIVE_2("li %0, 0\t\nnop",					\</div><div class='ctx'> 		  "li %0, %1\t\nslli %0,%0,%3", 0,			\</div><div class='ctx'> 			RISCV_ISA_EXT_SVPBMT, CONFIG_RISCV_ISA_SVPBMT,	\</div><div class='ctx'> 		  "li %0, %2\t\nslli %0,%0,%4", THEAD_VENDOR_ID,	\</div><div class='del'>-			ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT)	\</div><div class='add'>+			ERRATA_THEAD_MAE, CONFIG_ERRATA_THEAD_MAE)	\</div><div class='ctx'> 		: "=r"(_val)						\</div><div class='ctx'> 		: "I"(prot##_SVPBMT &gt;&gt; ALT_SVPBMT_SHIFT),		\</div><div class='del'>-		  "I"(prot##_THEAD &gt;&gt; ALT_THEAD_PBMT_SHIFT),		\</div><div class='add'>+		  "I"(prot##_THEAD &gt;&gt; ALT_THEAD_MAE_SHIFT),		\</div><div class='ctx'> 		  "I"(ALT_SVPBMT_SHIFT),				\</div><div class='del'>-		  "I"(ALT_THEAD_PBMT_SHIFT))</div><div class='add'>+		  "I"(ALT_THEAD_MAE_SHIFT))</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ERRATA_THEAD_PBMT</div><div class='add'>+#ifdef CONFIG_ERRATA_THEAD_MAE</div><div class='ctx'> /*</div><div class='ctx'>  * IO/NOCACHE memory types are handled together with svpbmt,</div><div class='ctx'>  * so on T-Head chips, check if no other memory type is set,</div><div class='hunk'>@@ -83,11 +83,11 @@ asm volatile(ALTERNATIVE(						\</div><div class='ctx'> 	"slli    t3, t3, %3\n\t"					\</div><div class='ctx'> 	"or      %0, %0, t3\n\t"					\</div><div class='ctx'> 	"2:",  THEAD_VENDOR_ID,						\</div><div class='del'>-		ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT)		\</div><div class='add'>+		ERRATA_THEAD_MAE, CONFIG_ERRATA_THEAD_MAE)		\</div><div class='ctx'> 	: "+r"(_val)							\</div><div class='del'>-	: "I"(_PAGE_MTMASK_THEAD &gt;&gt; ALT_THEAD_PBMT_SHIFT),		\</div><div class='del'>-	  "I"(_PAGE_PMA_THEAD &gt;&gt; ALT_THEAD_PBMT_SHIFT),			\</div><div class='del'>-	  "I"(ALT_THEAD_PBMT_SHIFT)					\</div><div class='add'>+	: "I"(_PAGE_MTMASK_THEAD &gt;&gt; ALT_THEAD_MAE_SHIFT),		\</div><div class='add'>+	  "I"(_PAGE_PMA_THEAD &gt;&gt; ALT_THEAD_MAE_SHIFT),			\</div><div class='add'>+	  "I"(ALT_THEAD_MAE_SHIFT)					\</div><div class='ctx'> 	: "t3")</div><div class='ctx'> #else</div><div class='ctx'> #define ALT_THEAD_PMA(_val)</div><div class='head'>diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h<br/>index 2947423b5082..115ac98b8d72 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/page.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/page.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/include/asm/page.h</a></div><div class='hunk'>@@ -89,7 +89,7 @@ typedef struct page *pgtable_t;</div><div class='ctx'> #define PTE_FMT "%08lx"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_64BIT</div><div class='add'>+#if defined(CONFIG_64BIT) &amp;&amp; defined(CONFIG_MMU)</div><div class='ctx'> /*</div><div class='ctx'>  * We override this value as its generic definition uses __pa too early in</div><div class='ctx'>  * the boot process (before kernel_map.va_pa_offset is set).</div><div class='head'>diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h<br/>index 9f8ea0e33eb1..381137ce70d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/pgtable.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/include/asm/pgtable.h</a></div><div class='hunk'>@@ -55,6 +55,9 @@</div><div class='ctx'> #define MODULES_LOWEST_VADDR	(KERNEL_LINK_ADDR - SZ_2G)</div><div class='ctx'> #define MODULES_VADDR		(PFN_ALIGN((unsigned long)&amp;_end) - SZ_2G)</div><div class='ctx'> #define MODULES_END		(PFN_ALIGN((unsigned long)&amp;_start))</div><div class='add'>+#else</div><div class='add'>+#define MODULES_VADDR		VMALLOC_START</div><div class='add'>+#define MODULES_END		VMALLOC_END</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -896,7 +899,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> #define PAGE_SHARED		__pgprot(0)</div><div class='ctx'> #define PAGE_KERNEL		__pgprot(0)</div><div class='ctx'> #define swapper_pg_dir		NULL</div><div class='del'>-#define TASK_SIZE		0xffffffffUL</div><div class='add'>+#define TASK_SIZE		_AC(-1, UL)</div><div class='ctx'> #define VMALLOC_START		_AC(0, UL)</div><div class='ctx'> #define VMALLOC_END		TASK_SIZE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h<br/>index 9f2a8e3ff204..2902f68dc913 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/uapi/asm/hwprobe.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/include/uapi/asm/hwprobe.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/uapi/asm/hwprobe.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/include/uapi/asm/hwprobe.h</a></div><div class='hunk'>@@ -54,7 +54,7 @@ struct riscv_hwprobe {</div><div class='ctx'> #define		RISCV_HWPROBE_EXT_ZFHMIN	(1 &lt;&lt; 28)</div><div class='ctx'> #define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 &lt;&lt; 29)</div><div class='ctx'> #define		RISCV_HWPROBE_EXT_ZVFH		(1 &lt;&lt; 30)</div><div class='del'>-#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 &lt;&lt; 31)</div><div class='add'>+#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1ULL &lt;&lt; 31)</div><div class='ctx'> #define		RISCV_HWPROBE_EXT_ZFA		(1ULL &lt;&lt; 32)</div><div class='ctx'> #define		RISCV_HWPROBE_EXT_ZTSO		(1ULL &lt;&lt; 33)</div><div class='ctx'> #define		RISCV_HWPROBE_EXT_ZACAS		(1ULL &lt;&lt; 34)</div><div class='head'>diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c<br/>index 5e5a82644451..906f9a3a5d65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/kernel/module.c</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='hunk'>@@ -905,17 +904,6 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MMU) &amp;&amp; defined(CONFIG_64BIT)</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return __vmalloc_node_range(size, 1, MODULES_VADDR,</div><div class='del'>-				    MODULES_END, GFP_KERNEL,</div><div class='del'>-				    PAGE_KERNEL, VM_FLUSH_RESET_PERMS,</div><div class='del'>-				    NUMA_NO_NODE,</div><div class='del'>-				    __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> int module_finalize(const Elf_Ehdr *hdr,</div><div class='ctx'> 		    const Elf_Shdr *sechdrs,</div><div class='ctx'> 		    struct module *me)</div><div class='head'>diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c<br/>index 2f08c14a933d..e64f2f3064eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/probes/kprobes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/kernel/probes/kprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/probes/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/kernel/probes/kprobes.c</a></div><div class='hunk'>@@ -104,16 +104,6 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-void *alloc_insn_page(void)</div><div class='del'>-{</div><div class='del'>-	return  __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, VMALLOC_END,</div><div class='del'>-				     GFP_KERNEL, PAGE_KERNEL_READ_EXEC,</div><div class='del'>-				     VM_FLUSH_RESET_PERMS, NUMA_NO_NODE,</div><div class='del'>-				     __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* install breakpoint in text */</div><div class='ctx'> void __kprobes arch_arm_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c<br/>index fe8e159394d8..9940171c79f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/mm/init.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> #include &lt;linux/kfence.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -231,7 +232,7 @@ static void __init setup_bootmem(void)</div><div class='ctx'> 	 * In 64-bit, any use of __va/__pa before this point is wrong as we</div><div class='ctx'> 	 * did not know the start of DRAM before.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_64BIT))</div><div class='add'>+	if (IS_ENABLED(CONFIG_64BIT) &amp;&amp; IS_ENABLED(CONFIG_MMU))</div><div class='ctx'> 		kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1481,3 +1482,37 @@ void __init pgtable_cache_init(void)</div><div class='ctx'> 		preallocate_pgd_pages_range(MODULES_VADDR, MODULES_END, "bpf/modules");</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= MODULES_VADDR,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+			[EXECMEM_KPROBES] = {</div><div class='add'>+				.start	= VMALLOC_START,</div><div class='add'>+				.end	= VMALLOC_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL_READ_EXEC,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+			[EXECMEM_BPF] = {</div><div class='add'>+				.start	= BPF_JIT_REGION_START,</div><div class='add'>+				.end	= BPF_JIT_REGION_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = PAGE_SIZE,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MMU */</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/riscv/net/bpf_jit.h b/arch/riscv/net/bpf_jit.h<br/>index f4b6b3b9edda..fdbf88ca8b70 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/net/bpf_jit.h</a></div><div class='hunk'>@@ -81,6 +81,8 @@ struct rv_jit_context {</div><div class='ctx'> 	int nexentries;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int stack_size;</div><div class='add'>+	u64 arena_vm_start;</div><div class='add'>+	u64 user_vm_start;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Convert from ninsns to bytes. */</div><div class='hunk'>@@ -606,7 +608,7 @@ static inline u32 rv_nop(void)</div><div class='ctx'> 	return rv_i_insn(0, 0, 0, 0, 0x13);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* RVC instrutions. */</div><div class='add'>+/* RVC instructions. */</div><div class='ctx'> </div><div class='ctx'> static inline u16 rvc_addi4spn(u8 rd, u32 imm10)</div><div class='ctx'> {</div><div class='hunk'>@@ -735,7 +737,7 @@ static inline u16 rvc_swsp(u32 imm8, u8 rs2)</div><div class='ctx'> 	return rv_css_insn(0x6, imm, rs2, 0x2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* RVZBB instrutions. */</div><div class='add'>+/* RVZBB instructions. */</div><div class='ctx'> static inline u32 rvzbb_sextb(u8 rd, u8 rs1)</div><div class='ctx'> {</div><div class='ctx'> 	return rv_i_insn(0x604, rs1, 1, rd, 0x13);</div><div class='head'>diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c<br/>index 1adf2f39ce59..79a001d5533e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_comp64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/net/bpf_jit_comp64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_comp64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/net/bpf_jit_comp64.c</a></div><div class='hunk'>@@ -12,12 +12,14 @@</div><div class='ctx'> #include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> #include &lt;asm/patch.h&gt;</div><div class='ctx'> #include &lt;asm/cfi.h&gt;</div><div class='add'>+#include &lt;asm/percpu.h&gt;</div><div class='ctx'> #include "bpf_jit.h"</div><div class='ctx'> </div><div class='ctx'> #define RV_FENTRY_NINSNS 2</div><div class='ctx'> </div><div class='ctx'> #define RV_REG_TCC RV_REG_A6</div><div class='ctx'> #define RV_REG_TCC_SAVED RV_REG_S6 /* Store A6 in S6 if program do calls */</div><div class='add'>+#define RV_REG_ARENA RV_REG_S7 /* For storing arena_vm_start */</div><div class='ctx'> </div><div class='ctx'> static const int regmap[] = {</div><div class='ctx'> 	[BPF_REG_0] =	RV_REG_A5,</div><div class='hunk'>@@ -255,6 +257,10 @@ static void __build_epilogue(bool is_tail_call, struct rv_jit_context *ctx)</div><div class='ctx'> 		emit_ld(RV_REG_S6, store_offset, RV_REG_SP, ctx);</div><div class='ctx'> 		store_offset -= 8;</div><div class='ctx'> 	}</div><div class='add'>+	if (ctx-&gt;arena_vm_start) {</div><div class='add'>+		emit_ld(RV_REG_ARENA, store_offset, RV_REG_SP, ctx);</div><div class='add'>+		store_offset -= 8;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	emit_addi(RV_REG_SP, RV_REG_SP, stack_adjust, ctx);</div><div class='ctx'> 	/* Set return value. */</div><div class='hunk'>@@ -498,33 +504,33 @@ static void emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64,</div><div class='ctx'> 		break;</div><div class='ctx'> 	/* src_reg = atomic_fetch_&lt;op&gt;(dst_reg + off16, src_reg) */</div><div class='ctx'> 	case BPF_ADD | BPF_FETCH:</div><div class='del'>-		emit(is64 ? rv_amoadd_d(rs, rs, rd, 0, 0) :</div><div class='del'>-		     rv_amoadd_w(rs, rs, rd, 0, 0), ctx);</div><div class='add'>+		emit(is64 ? rv_amoadd_d(rs, rs, rd, 1, 1) :</div><div class='add'>+		     rv_amoadd_w(rs, rs, rd, 1, 1), ctx);</div><div class='ctx'> 		if (!is64)</div><div class='ctx'> 			emit_zextw(rs, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_AND | BPF_FETCH:</div><div class='del'>-		emit(is64 ? rv_amoand_d(rs, rs, rd, 0, 0) :</div><div class='del'>-		     rv_amoand_w(rs, rs, rd, 0, 0), ctx);</div><div class='add'>+		emit(is64 ? rv_amoand_d(rs, rs, rd, 1, 1) :</div><div class='add'>+		     rv_amoand_w(rs, rs, rd, 1, 1), ctx);</div><div class='ctx'> 		if (!is64)</div><div class='ctx'> 			emit_zextw(rs, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_OR | BPF_FETCH:</div><div class='del'>-		emit(is64 ? rv_amoor_d(rs, rs, rd, 0, 0) :</div><div class='del'>-		     rv_amoor_w(rs, rs, rd, 0, 0), ctx);</div><div class='add'>+		emit(is64 ? rv_amoor_d(rs, rs, rd, 1, 1) :</div><div class='add'>+		     rv_amoor_w(rs, rs, rd, 1, 1), ctx);</div><div class='ctx'> 		if (!is64)</div><div class='ctx'> 			emit_zextw(rs, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_XOR | BPF_FETCH:</div><div class='del'>-		emit(is64 ? rv_amoxor_d(rs, rs, rd, 0, 0) :</div><div class='del'>-		     rv_amoxor_w(rs, rs, rd, 0, 0), ctx);</div><div class='add'>+		emit(is64 ? rv_amoxor_d(rs, rs, rd, 1, 1) :</div><div class='add'>+		     rv_amoxor_w(rs, rs, rd, 1, 1), ctx);</div><div class='ctx'> 		if (!is64)</div><div class='ctx'> 			emit_zextw(rs, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	/* src_reg = atomic_xchg(dst_reg + off16, src_reg); */</div><div class='ctx'> 	case BPF_XCHG:</div><div class='del'>-		emit(is64 ? rv_amoswap_d(rs, rs, rd, 0, 0) :</div><div class='del'>-		     rv_amoswap_w(rs, rs, rd, 0, 0), ctx);</div><div class='add'>+		emit(is64 ? rv_amoswap_d(rs, rs, rd, 1, 1) :</div><div class='add'>+		     rv_amoswap_w(rs, rs, rd, 1, 1), ctx);</div><div class='ctx'> 		if (!is64)</div><div class='ctx'> 			emit_zextw(rs, rs, ctx);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -548,6 +554,7 @@ static void emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64,</div><div class='ctx'> </div><div class='ctx'> #define BPF_FIXUP_OFFSET_MASK   GENMASK(26, 0)</div><div class='ctx'> #define BPF_FIXUP_REG_MASK      GENMASK(31, 27)</div><div class='add'>+#define REG_DONT_CLEAR_MARKER	0	/* RV_REG_ZERO unused in pt_regmap */</div><div class='ctx'> </div><div class='ctx'> bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> 		    struct pt_regs *regs)</div><div class='hunk'>@@ -555,7 +562,8 @@ bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> 	off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex-&gt;fixup);</div><div class='ctx'> 	int regs_offset = FIELD_GET(BPF_FIXUP_REG_MASK, ex-&gt;fixup);</div><div class='ctx'> </div><div class='del'>-	*(unsigned long *)((void *)regs + pt_regmap[regs_offset]) = 0;</div><div class='add'>+	if (regs_offset != REG_DONT_CLEAR_MARKER)</div><div class='add'>+		*(unsigned long *)((void *)regs + pt_regmap[regs_offset]) = 0;</div><div class='ctx'> 	regs-&gt;epc = (unsigned long)&amp;ex-&gt;fixup - offset;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -572,7 +580,8 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> 	off_t fixup_offset;</div><div class='ctx'> </div><div class='ctx'> 	if (!ctx-&gt;insns || !ctx-&gt;ro_insns || !ctx-&gt;prog-&gt;aux-&gt;extable ||</div><div class='del'>-	    (BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM &amp;&amp; BPF_MODE(insn-&gt;code) != BPF_PROBE_MEMSX))</div><div class='add'>+	    (BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM &amp;&amp; BPF_MODE(insn-&gt;code) != BPF_PROBE_MEMSX &amp;&amp;</div><div class='add'>+	     BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON_ONCE(ctx-&gt;nexentries &gt;= ctx-&gt;prog-&gt;aux-&gt;num_exentries))</div><div class='hunk'>@@ -722,6 +731,9 @@ static int invoke_bpf_prog(struct bpf_tramp_link *l, int args_off, int retval_of</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* store prog start time */</div><div class='add'>+	emit_mv(RV_REG_S1, RV_REG_A0, ctx);</div><div class='add'>+</div><div class='ctx'> 	/* if (__bpf_prog_enter(prog) == 0)</div><div class='ctx'> 	 *	goto skip_exec_of_prog;</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -729,9 +741,6 @@ static int invoke_bpf_prog(struct bpf_tramp_link *l, int args_off, int retval_of</div><div class='ctx'> 	/* nop reserved for conditional jump */</div><div class='ctx'> 	emit(rv_nop(), ctx);</div><div class='ctx'> </div><div class='del'>-	/* store prog start time */</div><div class='del'>-	emit_mv(RV_REG_S1, RV_REG_A0, ctx);</div><div class='del'>-</div><div class='ctx'> 	/* arg1: &amp;args_off */</div><div class='ctx'> 	emit_addi(RV_REG_A0, RV_REG_FP, -args_off, ctx);</div><div class='ctx'> 	if (!p-&gt;jited)</div><div class='hunk'>@@ -1073,6 +1082,33 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 	/* dst = src */</div><div class='ctx'> 	case BPF_ALU | BPF_MOV | BPF_X:</div><div class='ctx'> 	case BPF_ALU64 | BPF_MOV | BPF_X:</div><div class='add'>+		if (insn_is_cast_user(insn)) {</div><div class='add'>+			emit_mv(RV_REG_T1, rs, ctx);</div><div class='add'>+			emit_zextw(RV_REG_T1, RV_REG_T1, ctx);</div><div class='add'>+			emit_imm(rd, (ctx-&gt;user_vm_start &gt;&gt; 32) &lt;&lt; 32, ctx);</div><div class='add'>+			emit(rv_beq(RV_REG_T1, RV_REG_ZERO, 4), ctx);</div><div class='add'>+			emit_or(RV_REG_T1, rd, RV_REG_T1, ctx);</div><div class='add'>+			emit_mv(rd, RV_REG_T1, ctx);</div><div class='add'>+			break;</div><div class='add'>+		} else if (insn_is_mov_percpu_addr(insn)) {</div><div class='add'>+			if (rd != rs)</div><div class='add'>+				emit_mv(rd, rs, ctx);</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+			/* Load current CPU number in T1 */</div><div class='add'>+			emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),</div><div class='add'>+				RV_REG_TP, ctx);</div><div class='add'>+			/* &lt;&lt; 3 because offsets are 8 bytes */</div><div class='add'>+			emit_slli(RV_REG_T1, RV_REG_T1, 3, ctx);</div><div class='add'>+			/* Load address of __per_cpu_offset array in T2 */</div><div class='add'>+			emit_addr(RV_REG_T2, (u64)&amp;__per_cpu_offset, extra_pass, ctx);</div><div class='add'>+			/* Add offset of current CPU to  __per_cpu_offset */</div><div class='add'>+			emit_add(RV_REG_T1, RV_REG_T2, RV_REG_T1, ctx);</div><div class='add'>+			/* Load __per_cpu_offset[cpu] in T1 */</div><div class='add'>+			emit_ld(RV_REG_T1, 0, RV_REG_T1, ctx);</div><div class='add'>+			/* Add the offset to Rd */</div><div class='add'>+			emit_add(rd, rd, RV_REG_T1, ctx);</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='ctx'> 		if (imm == 1) {</div><div class='ctx'> 			/* Special mov32 for zext */</div><div class='ctx'> 			emit_zextw(rd, rd, ctx);</div><div class='hunk'>@@ -1457,6 +1493,22 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 		bool fixed_addr;</div><div class='ctx'> 		u64 addr;</div><div class='ctx'> </div><div class='add'>+		/* Inline calls to bpf_get_smp_processor_id()</div><div class='add'>+		 *</div><div class='add'>+		 * RV_REG_TP holds the address of the current CPU's task_struct and thread_info is</div><div class='add'>+		 * at offset 0 in task_struct.</div><div class='add'>+		 * Load cpu from thread_info:</div><div class='add'>+		 *     Set R0 to ((struct thread_info *)(RV_REG_TP))-&gt;cpu</div><div class='add'>+		 *</div><div class='add'>+		 * This replicates the implementation of raw_smp_processor_id() on RISCV</div><div class='add'>+		 */</div><div class='add'>+		if (insn-&gt;src_reg == 0 &amp;&amp; insn-&gt;imm == BPF_FUNC_get_smp_processor_id) {</div><div class='add'>+			/* Load current CPU number in R0 */</div><div class='add'>+			emit_ld(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),</div><div class='add'>+				RV_REG_TP, ctx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		mark_call(ctx);</div><div class='ctx'> 		ret = bpf_jit_get_func_addr(ctx-&gt;prog, insn, extra_pass,</div><div class='ctx'> 					    &amp;addr, &amp;fixed_addr);</div><div class='hunk'>@@ -1539,6 +1591,11 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:</div><div class='add'>+	/* LDX | PROBE_MEM32: dst = *(unsigned size *)(src + RV_REG_ARENA + off) */</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='ctx'> 	{</div><div class='ctx'> 		int insn_len, insns_start;</div><div class='ctx'> 		bool sign_ext;</div><div class='hunk'>@@ -1546,6 +1603,11 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 		sign_ext = BPF_MODE(insn-&gt;code) == BPF_MEMSX ||</div><div class='ctx'> 			   BPF_MODE(insn-&gt;code) == BPF_PROBE_MEMSX;</div><div class='ctx'> </div><div class='add'>+		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32) {</div><div class='add'>+			emit_add(RV_REG_T2, rs, RV_REG_ARENA, ctx);</div><div class='add'>+			rs = RV_REG_T2;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		switch (BPF_SIZE(code)) {</div><div class='ctx'> 		case BPF_B:</div><div class='ctx'> 			if (is_12b_int(off)) {</div><div class='hunk'>@@ -1682,6 +1744,86 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 		emit_sd(RV_REG_T2, 0, RV_REG_T1, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+	case BPF_ST | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+	{</div><div class='add'>+		int insn_len, insns_start;</div><div class='add'>+</div><div class='add'>+		emit_add(RV_REG_T3, rd, RV_REG_ARENA, ctx);</div><div class='add'>+		rd = RV_REG_T3;</div><div class='add'>+</div><div class='add'>+		/* Load imm to a register then store it */</div><div class='add'>+		emit_imm(RV_REG_T1, imm, ctx);</div><div class='add'>+</div><div class='add'>+		switch (BPF_SIZE(code)) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit(rv_sb(rd, off, RV_REG_T1), ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T2, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit(rv_sb(RV_REG_T2, 0, RV_REG_T1), ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit(rv_sh(rd, off, RV_REG_T1), ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T2, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit(rv_sh(RV_REG_T2, 0, RV_REG_T1), ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit_sw(rd, off, RV_REG_T1, ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T2, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit_sw(RV_REG_T2, 0, RV_REG_T1, ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit_sd(rd, off, RV_REG_T1, ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T2, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit_sd(RV_REG_T2, 0, RV_REG_T1, ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = add_exception_handler(insn, ctx, REG_DONT_CLEAR_MARKER,</div><div class='add'>+					    insn_len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* STX: *(size *)(dst + off) = src */</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_B:</div><div class='ctx'> 		if (is_12b_int(off)) {</div><div class='hunk'>@@ -1728,6 +1870,84 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 		emit_atomic(rd, rs, off, imm,</div><div class='ctx'> 			    BPF_SIZE(code) == BPF_DW, ctx);</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+	{</div><div class='add'>+		int insn_len, insns_start;</div><div class='add'>+</div><div class='add'>+		emit_add(RV_REG_T2, rd, RV_REG_ARENA, ctx);</div><div class='add'>+		rd = RV_REG_T2;</div><div class='add'>+</div><div class='add'>+		switch (BPF_SIZE(code)) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit(rv_sb(rd, off, rs), ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit(rv_sb(RV_REG_T1, 0, rs), ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit(rv_sh(rd, off, rs), ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit(rv_sh(RV_REG_T1, 0, rs), ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit_sw(rd, off, rs, ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit_sw(RV_REG_T1, 0, rs, ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			if (is_12b_int(off)) {</div><div class='add'>+				insns_start = ctx-&gt;ninsns;</div><div class='add'>+				emit_sd(rd, off, rs, ctx);</div><div class='add'>+				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+			emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+			insns_start = ctx-&gt;ninsns;</div><div class='add'>+			emit_sd(RV_REG_T1, 0, rs, ctx);</div><div class='add'>+			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = add_exception_handler(insn, ctx, REG_DONT_CLEAR_MARKER,</div><div class='add'>+					    insn_len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_err("bpf-jit: unknown opcode %02x\n", code);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1759,6 +1979,8 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)</div><div class='ctx'> 		stack_adjust += 8;</div><div class='ctx'> 	if (seen_reg(RV_REG_S6, ctx))</div><div class='ctx'> 		stack_adjust += 8;</div><div class='add'>+	if (ctx-&gt;arena_vm_start)</div><div class='add'>+		stack_adjust += 8;</div><div class='ctx'> </div><div class='ctx'> 	stack_adjust = round_up(stack_adjust, 16);</div><div class='ctx'> 	stack_adjust += bpf_stack_adjust;</div><div class='hunk'>@@ -1810,6 +2032,10 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)</div><div class='ctx'> 		emit_sd(RV_REG_SP, store_offset, RV_REG_S6, ctx);</div><div class='ctx'> 		store_offset -= 8;</div><div class='ctx'> 	}</div><div class='add'>+	if (ctx-&gt;arena_vm_start) {</div><div class='add'>+		emit_sd(RV_REG_SP, store_offset, RV_REG_ARENA, ctx);</div><div class='add'>+		store_offset -= 8;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	emit_addi(RV_REG_FP, RV_REG_SP, stack_adjust, ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -1823,6 +2049,9 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)</div><div class='ctx'> 		emit_mv(RV_REG_TCC_SAVED, RV_REG_TCC, ctx);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;stack_size = stack_adjust;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;arena_vm_start)</div><div class='add'>+		emit_imm(RV_REG_ARENA, ctx-&gt;arena_vm_start, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bpf_jit_build_epilogue(struct rv_jit_context *ctx)</div><div class='hunk'>@@ -1839,3 +2068,23 @@ bool bpf_jit_supports_ptr_xchg(void)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool bpf_jit_supports_arena(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_supports_percpu_insn(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_inlines_helper_call(s32 imm)</div><div class='add'>+{</div><div class='add'>+	switch (imm) {</div><div class='add'>+	case BPF_FUNC_get_smp_processor_id:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/riscv/net/bpf_jit_core.c b/arch/riscv/net/bpf_jit_core.c<br/>index 6b3acac30c06..0a96abdaca65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/riscv/net/bpf_jit_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/riscv/net/bpf_jit_core.c</a></div><div class='hunk'>@@ -80,6 +80,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 		goto skip_init_ctx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ctx-&gt;arena_vm_start = bpf_arena_get_kern_vm_start(prog-&gt;aux-&gt;arena);</div><div class='add'>+	ctx-&gt;user_vm_start = bpf_arena_get_user_vm_start(prog-&gt;aux-&gt;arena);</div><div class='ctx'> 	ctx-&gt;prog = prog;</div><div class='ctx'> 	ctx-&gt;offset = kcalloc(prog-&gt;len, sizeof(int), GFP_KERNEL);</div><div class='ctx'> 	if (!ctx-&gt;offset) {</div><div class='hunk'>@@ -219,19 +221,6 @@ u64 bpf_jit_alloc_exec_limit(void)</div><div class='ctx'> 	return BPF_JIT_REGION_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *bpf_jit_alloc_exec(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return __vmalloc_node_range(size, PAGE_SIZE, BPF_JIT_REGION_START,</div><div class='del'>-				    BPF_JIT_REGION_END, GFP_KERNEL,</div><div class='del'>-				    PAGE_KERNEL, 0, NUMA_NO_NODE,</div><div class='del'>-				    __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void bpf_jit_free_exec(void *addr)</div><div class='del'>-{</div><div class='del'>-	return vfree(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void *bpf_arch_text_copy(void *dst, void *src, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig<br/>index 8f01ada6845e..7e7fe89c9b25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/Kconfig</a></div><div class='hunk'>@@ -17,6 +17,9 @@ config ARCH_HAS_ILOG2_U32</div><div class='ctx'> config ARCH_HAS_ILOG2_U64</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='add'>+config ARCH_PROC_KCORE_TEXT</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -552,7 +555,7 @@ config EXPOLINE</div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> config EXPOLINE_EXTERN</div><div class='del'>-	def_bool n</div><div class='add'>+	def_bool y if EXPOLINE</div><div class='ctx'> 	depends on EXPOLINE</div><div class='ctx'> 	depends on CC_IS_GCC &amp;&amp; GCC_VERSION &gt;= 110200</div><div class='ctx'> 	depends on $(success,$(srctree)/arch/s390/tools/gcc-thunk-extern.sh $(CC))</div><div class='hunk'>@@ -590,18 +593,6 @@ config RELOCATABLE</div><div class='ctx'> 	  Note: this option exists only for documentation purposes, please do</div><div class='ctx'> 	  not remove it.</div><div class='ctx'> </div><div class='del'>-config PIE_BUILD</div><div class='del'>-	def_bool CC_IS_CLANG &amp;&amp; !$(cc-option,-munaligned-symbols)</div><div class='del'>-	help</div><div class='del'>-	  If the compiler is unable to generate code that can manage unaligned</div><div class='del'>-	  symbols, the kernel is linked as a position-independent executable</div><div class='del'>-	  (PIE) and includes dynamic relocations that are processed early</div><div class='del'>-	  during bootup.</div><div class='del'>-</div><div class='del'>-	  For kpatch functionality, it is recommended to build the kernel</div><div class='del'>-	  without the PIE_BUILD option. PIE_BUILD is only enabled when the</div><div class='del'>-	  compiler lacks proper support for handling unaligned symbols.</div><div class='del'>-</div><div class='ctx'> config RANDOMIZE_BASE</div><div class='ctx'> 	bool "Randomize the address of the kernel image (KASLR)"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -611,6 +602,25 @@ config RANDOMIZE_BASE</div><div class='ctx'> 	  as a security feature that deters exploit attempts relying on</div><div class='ctx'> 	  knowledge of the location of kernel internals.</div><div class='ctx'> </div><div class='add'>+config KERNEL_IMAGE_BASE</div><div class='add'>+	hex "Kernel image base address"</div><div class='add'>+	range 0x100000 0x1FFFFFE0000000 if !KASAN</div><div class='add'>+	range 0x100000 0x1BFFFFE0000000 if KASAN</div><div class='add'>+	default 0x3FFE0000000 if !KASAN</div><div class='add'>+	default 0x7FFFE0000000 if KASAN</div><div class='add'>+	help</div><div class='add'>+	  This is the address at which the kernel image is loaded in case</div><div class='add'>+	  Kernel Address Space Layout Randomization (KASLR) is disabled.</div><div class='add'>+</div><div class='add'>+	  In case the Protected virtualization guest support is enabled the</div><div class='add'>+	  Ultravisor imposes a virtual address limit. If the value of this</div><div class='add'>+	  option leads to the kernel image exceeding the Ultravisor limit,</div><div class='add'>+	  this option is ignored and the image is loaded below the limit.</div><div class='add'>+</div><div class='add'>+	  If the value of this option leads to the kernel image overlapping</div><div class='add'>+	  the virtual memory where other data structures are located, this</div><div class='add'>+	  option is ignored and the image is loaded above the structures.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> menu "Memory setup"</div><div class='hunk'>@@ -724,6 +734,33 @@ config EADM_SCH</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called eadm_sch.</div><div class='ctx'> </div><div class='add'>+config AP</div><div class='add'>+	def_tristate y</div><div class='add'>+	prompt "Support for Adjunct Processors (ap)"</div><div class='add'>+	help</div><div class='add'>+	  This driver allows usage to Adjunct Processor (AP) devices via</div><div class='add'>+	  the ap bus, cards and queues. Supported Adjunct Processors are</div><div class='add'>+	  the CryptoExpress Cards (CEX).</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called ap.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y (default).</div><div class='add'>+</div><div class='add'>+config AP_DEBUG</div><div class='add'>+	def_bool n</div><div class='add'>+	prompt "Enable debug features for Adjunct Processor (ap) devices"</div><div class='add'>+	depends on AP</div><div class='add'>+	help</div><div class='add'>+	  Say 'Y' here to enable some additional debug features for Adjunct</div><div class='add'>+	  Processor (ap) devices.</div><div class='add'>+</div><div class='add'>+	  There will be some more sysfs attributes displayed for ap queues.</div><div class='add'>+</div><div class='add'>+	  Do not enable on production level kernel build.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config VFIO_CCW</div><div class='ctx'> 	def_tristate n</div><div class='ctx'> 	prompt "Support for VFIO-CCW subchannels"</div><div class='hunk'>@@ -740,7 +777,7 @@ config VFIO_AP</div><div class='ctx'> 	prompt "VFIO support for AP devices"</div><div class='ctx'> 	depends on KVM</div><div class='ctx'> 	depends on VFIO</div><div class='del'>-	depends on ZCRYPT</div><div class='add'>+	depends on AP</div><div class='ctx'> 	select VFIO_MDEV</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver grants access to Adjunct Processor (AP) devices</div><div class='head'>diff --git a/arch/s390/Makefile b/arch/s390/Makefile<br/>index 2dbb2d2f22f9..f2b21c7a70ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/Makefile</a></div><div class='hunk'>@@ -14,14 +14,9 @@ KBUILD_AFLAGS_MODULE += -fPIC</div><div class='ctx'> KBUILD_CFLAGS_MODULE += -fPIC</div><div class='ctx'> KBUILD_AFLAGS	+= -m64</div><div class='ctx'> KBUILD_CFLAGS	+= -m64</div><div class='del'>-ifdef CONFIG_PIE_BUILD</div><div class='del'>-KBUILD_CFLAGS	+= -fPIE</div><div class='del'>-LDFLAGS_vmlinux	:= -pie -z notext</div><div class='del'>-else</div><div class='del'>-KBUILD_CFLAGS	+= $(call cc-option,-munaligned-symbols,)</div><div class='del'>-LDFLAGS_vmlinux	:= --emit-relocs --discard-none</div><div class='add'>+KBUILD_CFLAGS	+= -fPIC</div><div class='add'>+LDFLAGS_vmlinux	:= -no-pie --emit-relocs --discard-none</div><div class='ctx'> extra_tools	:= relocs</div><div class='del'>-endif</div><div class='ctx'> aflags_dwarf	:= -Wa,-gdwarf-2</div><div class='ctx'> KBUILD_AFLAGS_DECOMPRESSOR := $(CLANG_FLAGS) -m64 -D__ASSEMBLY__</div><div class='ctx'> ifndef CONFIG_AS_IS_LLVM</div><div class='hunk'>@@ -88,7 +83,6 @@ endif</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_EXPOLINE</div><div class='ctx'>   ifdef CONFIG_EXPOLINE_EXTERN</div><div class='del'>-    KBUILD_LDFLAGS_MODULE += arch/s390/lib/expoline/expoline.o</div><div class='ctx'>     CC_FLAGS_EXPOLINE := -mindirect-branch=thunk-extern</div><div class='ctx'>     CC_FLAGS_EXPOLINE += -mfunction-return=thunk-extern</div><div class='ctx'>   else</div><div class='hunk'>@@ -167,11 +161,6 @@ vdso_prepare: prepare0</div><div class='ctx'> vdso-install-y			+= arch/s390/kernel/vdso64/vdso64.so.dbg</div><div class='ctx'> vdso-install-$(CONFIG_COMPAT)	+= arch/s390/kernel/vdso32/vdso32.so.dbg</div><div class='ctx'> </div><div class='del'>-ifdef CONFIG_EXPOLINE_EXTERN</div><div class='del'>-modules_prepare: expoline_prepare</div><div class='del'>-expoline_prepare: scripts</div><div class='del'>-	$(Q)$(MAKE) $(build)=arch/s390/lib/expoline arch/s390/lib/expoline/expoline.o</div><div class='del'>-endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # Don't use tabs in echo arguments</div><div class='head'>diff --git a/arch/s390/boot/Makefile b/arch/s390/boot/Makefile<br/>index 294f08a8811a..070c9b2e905f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/Makefile</a></div><div class='hunk'>@@ -37,8 +37,7 @@ CFLAGS_sclp_early_core.o += -I$(srctree)/drivers/s390/char</div><div class='ctx'> </div><div class='ctx'> obj-y	:= head.o als.o startup.o physmem_info.o ipl_parm.o ipl_report.o vmem.o</div><div class='ctx'> obj-y	+= string.o ebcdic.o sclp_early_core.o mem.o ipl_vmparm.o cmdline.o</div><div class='del'>-obj-y	+= version.o pgm_check_info.o ctype.o ipl_data.o</div><div class='del'>-obj-y	+= $(if $(CONFIG_PIE_BUILD),machine_kexec_reloc.o,relocs.o)</div><div class='add'>+obj-y	+= version.o pgm_check_info.o ctype.o ipl_data.o relocs.o</div><div class='ctx'> obj-$(findstring y, $(CONFIG_PROTECTED_VIRTUALIZATION_GUEST) $(CONFIG_PGSTE))	+= uv.o</div><div class='ctx'> obj-$(CONFIG_RANDOMIZE_BASE)	+= kaslr.o</div><div class='ctx'> obj-y	+= $(if $(CONFIG_KERNEL_UNCOMPRESSED),,decompressor.o) info.o</div><div class='hunk'>@@ -49,9 +48,7 @@ targets	:= bzImage section_cmp.boot.data section_cmp.boot.preserved.data $(obj-y</div><div class='ctx'> targets	+= vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2</div><div class='ctx'> targets += vmlinux.bin.xz vmlinux.bin.lzma vmlinux.bin.lzo vmlinux.bin.lz4</div><div class='ctx'> targets += vmlinux.bin.zst info.bin syms.bin vmlinux.syms $(obj-all)</div><div class='del'>-ifndef CONFIG_PIE_BUILD</div><div class='ctx'> targets += relocs.S</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> OBJECTS := $(addprefix $(obj)/,$(obj-y))</div><div class='ctx'> OBJECTS_ALL := $(addprefix $(obj)/,$(obj-all))</div><div class='hunk'>@@ -110,13 +107,11 @@ OBJCOPYFLAGS_vmlinux.bin := -O binary --remove-section=.comment --remove-section</div><div class='ctx'> $(obj)/vmlinux.bin: vmlinux FORCE</div><div class='ctx'> 	$(call if_changed,objcopy)</div><div class='ctx'> </div><div class='del'>-ifndef CONFIG_PIE_BUILD</div><div class='ctx'> CMD_RELOCS=arch/s390/tools/relocs</div><div class='del'>-quiet_cmd_relocs = RELOCS $@</div><div class='add'>+quiet_cmd_relocs = RELOCS  $@</div><div class='ctx'> 	cmd_relocs = $(CMD_RELOCS) $&lt; &gt; $@</div><div class='ctx'> $(obj)/relocs.S: vmlinux FORCE</div><div class='ctx'> 	$(call if_changed,relocs)</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> suffix-$(CONFIG_KERNEL_GZIP)  := .gz</div><div class='ctx'> suffix-$(CONFIG_KERNEL_BZIP2) := .bz2</div><div class='head'>diff --git a/arch/s390/boot/boot.h b/arch/s390/boot/boot.h<br/>index 567d60f78bbc..18027fdc92b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/boot.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/boot.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/boot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/boot.h</a></div><div class='hunk'>@@ -17,7 +17,6 @@ struct machine_info {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct vmlinux_info {</div><div class='del'>-	unsigned long default_lma;</div><div class='ctx'> 	unsigned long entry;</div><div class='ctx'> 	unsigned long image_size;	/* does not include .bss */</div><div class='ctx'> 	unsigned long bss_size;		/* uncompressed image .bss size */</div><div class='hunk'>@@ -25,14 +24,8 @@ struct vmlinux_info {</div><div class='ctx'> 	unsigned long bootdata_size;</div><div class='ctx'> 	unsigned long bootdata_preserved_off;</div><div class='ctx'> 	unsigned long bootdata_preserved_size;</div><div class='del'>-#ifdef CONFIG_PIE_BUILD</div><div class='del'>-	unsigned long dynsym_start;</div><div class='del'>-	unsigned long rela_dyn_start;</div><div class='del'>-	unsigned long rela_dyn_end;</div><div class='del'>-#else</div><div class='ctx'> 	unsigned long got_start;</div><div class='ctx'> 	unsigned long got_end;</div><div class='del'>-#endif</div><div class='ctx'> 	unsigned long amode31_size;</div><div class='ctx'> 	unsigned long init_mm_off;</div><div class='ctx'> 	unsigned long swapper_pg_dir_off;</div><div class='hunk'>@@ -74,10 +67,11 @@ void sclp_early_setup_buffer(void);</div><div class='ctx'> void print_pgm_check_info(void);</div><div class='ctx'> unsigned long randomize_within_range(unsigned long size, unsigned long align,</div><div class='ctx'> 				     unsigned long min, unsigned long max);</div><div class='del'>-void setup_vmem(unsigned long asce_limit);</div><div class='add'>+void setup_vmem(unsigned long kernel_start, unsigned long kernel_end, unsigned long asce_limit);</div><div class='ctx'> void __printf(1, 2) decompressor_printk(const char *fmt, ...);</div><div class='ctx'> void print_stacktrace(unsigned long sp);</div><div class='ctx'> void error(char *m);</div><div class='add'>+int get_random(unsigned long limit, unsigned long *value);</div><div class='ctx'> </div><div class='ctx'> extern struct machine_info machine;</div><div class='ctx'> </div><div class='hunk'>@@ -98,6 +92,10 @@ extern struct vmlinux_info _vmlinux_info;</div><div class='ctx'> #define vmlinux _vmlinux_info</div><div class='ctx'> </div><div class='ctx'> #define __abs_lowcore_pa(x)	(((unsigned long)(x) - __abs_lowcore) % sizeof(struct lowcore))</div><div class='add'>+#define __kernel_va(x)		((void *)((unsigned long)(x) - __kaslr_offset_phys + __kaslr_offset))</div><div class='add'>+#define __kernel_pa(x)		((unsigned long)(x) - __kaslr_offset + __kaslr_offset_phys)</div><div class='add'>+#define __identity_va(x)	((void *)((unsigned long)(x) + __identity_base))</div><div class='add'>+#define __identity_pa(x)	((unsigned long)(x) - __identity_base)</div><div class='ctx'> </div><div class='ctx'> static inline bool intersects(unsigned long addr0, unsigned long size0,</div><div class='ctx'> 			      unsigned long addr1, unsigned long size1)</div><div class='head'>diff --git a/arch/s390/boot/decompressor.c b/arch/s390/boot/decompressor.c<br/>index d762733a0753..f478e8e9cbda 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/decompressor.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/decompressor.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/decompressor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/decompressor.c</a></div><div class='hunk'>@@ -63,24 +63,13 @@ static unsigned long free_mem_end_ptr = (unsigned long) _end + BOOT_HEAP_SIZE;</div><div class='ctx'> #include "../../../../lib/decompress_unzstd.c"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define decompress_offset ALIGN((unsigned long)_end + BOOT_HEAP_SIZE, PAGE_SIZE)</div><div class='del'>-</div><div class='ctx'> unsigned long mem_safe_offset(void)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * due to 4MB HEAD_SIZE for bzip2</div><div class='del'>-	 * 'decompress_offset + vmlinux.image_size' could be larger than</div><div class='del'>-	 * kernel at final position + its .bss, so take the larger of two</div><div class='del'>-	 */</div><div class='del'>-	return max(decompress_offset + vmlinux.image_size,</div><div class='del'>-		   vmlinux.default_lma + vmlinux.image_size + vmlinux.bss_size);</div><div class='add'>+	return ALIGN(free_mem_end_ptr, PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *decompress_kernel(void)</div><div class='add'>+void deploy_kernel(void *output)</div><div class='ctx'> {</div><div class='del'>-	void *output = (void *)decompress_offset;</div><div class='del'>-</div><div class='ctx'> 	__decompress(_compressed_start, _compressed_end - _compressed_start,</div><div class='ctx'> 		     NULL, NULL, output, vmlinux.image_size, NULL, error);</div><div class='del'>-	return output;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/boot/decompressor.h b/arch/s390/boot/decompressor.h<br/>index 92b81d2ea35d..4f966f06bd65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/decompressor.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/decompressor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/decompressor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/decompressor.h</a></div><div class='hunk'>@@ -2,11 +2,9 @@</div><div class='ctx'> #ifndef BOOT_COMPRESSED_DECOMPRESSOR_H</div><div class='ctx'> #define BOOT_COMPRESSED_DECOMPRESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KERNEL_UNCOMPRESSED</div><div class='del'>-static inline void *decompress_kernel(void) { return NULL; }</div><div class='del'>-#else</div><div class='del'>-void *decompress_kernel(void);</div><div class='del'>-#endif</div><div class='add'>+#ifndef CONFIG_KERNEL_UNCOMPRESSED</div><div class='ctx'> unsigned long mem_safe_offset(void);</div><div class='add'>+void deploy_kernel(void *output);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* BOOT_COMPRESSED_DECOMPRESSOR_H */</div><div class='head'>diff --git a/arch/s390/boot/kaslr.c b/arch/s390/boot/kaslr.c<br/>index 90602101e2ae..bd3bf5ef472d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/kaslr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/kaslr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/kaslr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/kaslr.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ static int check_prng(void)</div><div class='ctx'> 		return PRNG_MODE_TDES;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_random(unsigned long limit, unsigned long *value)</div><div class='add'>+int get_random(unsigned long limit, unsigned long *value)</div><div class='ctx'> {</div><div class='ctx'> 	struct prng_parm prng = {</div><div class='ctx'> 		/* initial parameter block for tdes mode, copied from libica */</div><div class='head'>diff --git a/arch/s390/boot/pgm_check_info.c b/arch/s390/boot/pgm_check_info.c<br/>index 97244cd7a206..ea96275b0380 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/pgm_check_info.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/pgm_check_info.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/pgm_check_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/pgm_check_info.c</a></div><div class='hunk'>@@ -153,8 +153,10 @@ void print_pgm_check_info(void)</div><div class='ctx'> 		decompressor_printk("Kernel command line: %s\n", early_command_line);</div><div class='ctx'> 	decompressor_printk("Kernel fault: interruption code %04x ilc:%x\n",</div><div class='ctx'> 			    S390_lowcore.pgm_code, S390_lowcore.pgm_ilc &gt;&gt; 1);</div><div class='del'>-	if (kaslr_enabled())</div><div class='add'>+	if (kaslr_enabled()) {</div><div class='ctx'> 		decompressor_printk("Kernel random base: %lx\n", __kaslr_offset);</div><div class='add'>+		decompressor_printk("Kernel random base phys: %lx\n", __kaslr_offset_phys);</div><div class='add'>+	}</div><div class='ctx'> 	decompressor_printk("PSW : %016lx %016lx (%pS)\n",</div><div class='ctx'> 			    S390_lowcore.psw_save_area.mask,</div><div class='ctx'> 			    S390_lowcore.psw_save_area.addr,</div><div class='head'>diff --git a/arch/s390/boot/startup.c b/arch/s390/boot/startup.c<br/>index 6cf89314209a..467283b112cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/startup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/startup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/startup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/startup.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;asm/page-states.h&gt;</div><div class='ctx'> #include &lt;asm/boot_data.h&gt;</div><div class='add'>+#include &lt;asm/extmem.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/maccess.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_mf.h&gt;</div><div class='hunk'>@@ -18,7 +19,7 @@</div><div class='ctx'> #include "boot.h"</div><div class='ctx'> #include "uv.h"</div><div class='ctx'> </div><div class='del'>-unsigned long __bootdata_preserved(__kaslr_offset);</div><div class='add'>+struct vm_layout __bootdata_preserved(vm_layout);</div><div class='ctx'> unsigned long __bootdata_preserved(__abs_lowcore);</div><div class='ctx'> unsigned long __bootdata_preserved(__memcpy_real_area);</div><div class='ctx'> pte_t *__bootdata_preserved(memcpy_real_ptep);</div><div class='hunk'>@@ -29,7 +30,6 @@ unsigned long __bootdata_preserved(vmemmap_size);</div><div class='ctx'> unsigned long __bootdata_preserved(MODULES_VADDR);</div><div class='ctx'> unsigned long __bootdata_preserved(MODULES_END);</div><div class='ctx'> unsigned long __bootdata_preserved(max_mappable);</div><div class='del'>-unsigned long __bootdata(ident_map_size);</div><div class='ctx'> </div><div class='ctx'> u64 __bootdata_preserved(stfle_fac_list[16]);</div><div class='ctx'> u64 __bootdata_preserved(alt_stfle_fac_list[16]);</div><div class='hunk'>@@ -109,9 +109,19 @@ static void setup_lpp(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KERNEL_UNCOMPRESSED</div><div class='del'>-unsigned long mem_safe_offset(void)</div><div class='add'>+static unsigned long mem_safe_offset(void)</div><div class='ctx'> {</div><div class='del'>-	return vmlinux.default_lma + vmlinux.image_size + vmlinux.bss_size;</div><div class='add'>+	return (unsigned long)_compressed_start;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deploy_kernel(void *output)</div><div class='add'>+{</div><div class='add'>+	void *uncompressed_start = (void *)_compressed_start;</div><div class='add'>+</div><div class='add'>+	if (output == uncompressed_start)</div><div class='add'>+		return;</div><div class='add'>+	memmove(output, uncompressed_start, vmlinux.image_size);</div><div class='add'>+	memset(uncompressed_start, 0, vmlinux.image_size);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -141,70 +151,18 @@ static void copy_bootdata(void)</div><div class='ctx'> 	memcpy((void *)vmlinux.bootdata_preserved_off, __boot_data_preserved_start, vmlinux.bootdata_preserved_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PIE_BUILD</div><div class='del'>-static void kaslr_adjust_relocs(unsigned long min_addr, unsigned long max_addr, unsigned long offset)</div><div class='del'>-{</div><div class='del'>-	Elf64_Rela *rela_start, *rela_end, *rela;</div><div class='del'>-	int r_type, r_sym, rc;</div><div class='del'>-	Elf64_Addr loc, val;</div><div class='del'>-	Elf64_Sym *dynsym;</div><div class='del'>-</div><div class='del'>-	rela_start = (Elf64_Rela *) vmlinux.rela_dyn_start;</div><div class='del'>-	rela_end = (Elf64_Rela *) vmlinux.rela_dyn_end;</div><div class='del'>-	dynsym = (Elf64_Sym *) vmlinux.dynsym_start;</div><div class='del'>-	for (rela = rela_start; rela &lt; rela_end; rela++) {</div><div class='del'>-		loc = rela-&gt;r_offset + offset;</div><div class='del'>-		val = rela-&gt;r_addend;</div><div class='del'>-		r_sym = ELF64_R_SYM(rela-&gt;r_info);</div><div class='del'>-		if (r_sym) {</div><div class='del'>-			if (dynsym[r_sym].st_shndx != SHN_UNDEF)</div><div class='del'>-				val += dynsym[r_sym].st_value + offset;</div><div class='del'>-		} else {</div><div class='del'>-			/*</div><div class='del'>-			 * 0 == undefined symbol table index (STN_UNDEF),</div><div class='del'>-			 * used for R_390_RELATIVE, only add KASLR offset</div><div class='del'>-			 */</div><div class='del'>-			val += offset;</div><div class='del'>-		}</div><div class='del'>-		r_type = ELF64_R_TYPE(rela-&gt;r_info);</div><div class='del'>-		rc = arch_kexec_do_relocs(r_type, (void *) loc, val, 0);</div><div class='del'>-		if (rc)</div><div class='del'>-			error("Unknown relocation type");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kaslr_adjust_got(unsigned long offset) {}</div><div class='del'>-static void rescue_relocs(void) {}</div><div class='del'>-static void free_relocs(void) {}</div><div class='del'>-#else</div><div class='del'>-static int *vmlinux_relocs_64_start;</div><div class='del'>-static int *vmlinux_relocs_64_end;</div><div class='del'>-</div><div class='del'>-static void rescue_relocs(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long size = __vmlinux_relocs_64_end - __vmlinux_relocs_64_start;</div><div class='del'>-</div><div class='del'>-	vmlinux_relocs_64_start = (void *)physmem_alloc_top_down(RR_RELOC, size, 0);</div><div class='del'>-	vmlinux_relocs_64_end = (void *)vmlinux_relocs_64_start + size;</div><div class='del'>-	memmove(vmlinux_relocs_64_start, __vmlinux_relocs_64_start, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void free_relocs(void)</div><div class='del'>-{</div><div class='del'>-	physmem_free(RR_RELOC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kaslr_adjust_relocs(unsigned long min_addr, unsigned long max_addr, unsigned long offset)</div><div class='add'>+static void kaslr_adjust_relocs(unsigned long min_addr, unsigned long max_addr,</div><div class='add'>+				unsigned long offset, unsigned long phys_offset)</div><div class='ctx'> {</div><div class='ctx'> 	int *reloc;</div><div class='ctx'> 	long loc;</div><div class='ctx'> </div><div class='ctx'> 	/* Adjust R_390_64 relocations */</div><div class='del'>-	for (reloc = vmlinux_relocs_64_start; reloc &lt; vmlinux_relocs_64_end; reloc++) {</div><div class='del'>-		loc = (long)*reloc + offset;</div><div class='add'>+	for (reloc = (int *)__vmlinux_relocs_64_start; reloc &lt; (int *)__vmlinux_relocs_64_end; reloc++) {</div><div class='add'>+		loc = (long)*reloc + phys_offset;</div><div class='ctx'> 		if (loc &lt; min_addr || loc &gt; max_addr)</div><div class='ctx'> 			error("64-bit relocation outside of kernel!\n");</div><div class='del'>-		*(u64 *)loc += offset;</div><div class='add'>+		*(u64 *)loc += offset - __START_KERNEL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -217,9 +175,8 @@ static void kaslr_adjust_got(unsigned long offset)</div><div class='ctx'> 	 * reason. Adjust the GOT entries.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (entry = (u64 *)vmlinux.got_start; entry &lt; (u64 *)vmlinux.got_end; entry++)</div><div class='del'>-		*entry += offset;</div><div class='add'>+		*entry += offset - __START_KERNEL;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Merge information from several sources into a single ident_map_size value.</div><div class='hunk'>@@ -261,9 +218,26 @@ static void setup_ident_map_size(unsigned long max_physmem_end)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long setup_kernel_memory_layout(void)</div><div class='add'>+#define FIXMAP_SIZE	round_up(MEMCPY_REAL_SIZE + ABS_LOWCORE_MAP_SIZE, sizeof(struct lowcore))</div><div class='add'>+</div><div class='add'>+static unsigned long get_vmem_size(unsigned long identity_size,</div><div class='add'>+				   unsigned long vmemmap_size,</div><div class='add'>+				   unsigned long vmalloc_size,</div><div class='add'>+				   unsigned long rte_size)</div><div class='add'>+{</div><div class='add'>+	unsigned long max_mappable, vsize;</div><div class='add'>+</div><div class='add'>+	max_mappable = max(identity_size, MAX_DCSS_ADDR);</div><div class='add'>+	vsize = round_up(SZ_2G + max_mappable, rte_size) +</div><div class='add'>+		round_up(vmemmap_size, rte_size) +</div><div class='add'>+		FIXMAP_SIZE + MODULES_LEN + KASLR_LEN;</div><div class='add'>+	return size_add(vsize, vmalloc_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long setup_kernel_memory_layout(unsigned long kernel_size)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long vmemmap_start;</div><div class='add'>+	unsigned long kernel_start;</div><div class='ctx'> 	unsigned long asce_limit;</div><div class='ctx'> 	unsigned long rte_size;</div><div class='ctx'> 	unsigned long pages;</div><div class='hunk'>@@ -275,12 +249,19 @@ static unsigned long setup_kernel_memory_layout(void)</div><div class='ctx'> 	vmemmap_size = SECTION_ALIGN_UP(pages) * sizeof(struct page);</div><div class='ctx'> </div><div class='ctx'> 	/* choose kernel address space layout: 4 or 3 levels. */</div><div class='del'>-	vsize = round_up(ident_map_size, _REGION3_SIZE) + vmemmap_size +</div><div class='del'>-		MODULES_LEN + MEMCPY_REAL_SIZE + ABS_LOWCORE_MAP_SIZE;</div><div class='del'>-	vsize = size_add(vsize, vmalloc_size);</div><div class='del'>-	if (IS_ENABLED(CONFIG_KASAN) || (vsize &gt; _REGION2_SIZE)) {</div><div class='add'>+	BUILD_BUG_ON(!IS_ALIGNED(__START_KERNEL, THREAD_SIZE));</div><div class='add'>+	BUILD_BUG_ON(!IS_ALIGNED(__NO_KASLR_START_KERNEL, THREAD_SIZE));</div><div class='add'>+	BUILD_BUG_ON(__NO_KASLR_END_KERNEL &gt; _REGION1_SIZE);</div><div class='add'>+	vsize = get_vmem_size(ident_map_size, vmemmap_size, vmalloc_size, _REGION3_SIZE);</div><div class='add'>+	if (IS_ENABLED(CONFIG_KASAN) || __NO_KASLR_END_KERNEL &gt; _REGION2_SIZE ||</div><div class='add'>+	    (vsize &gt; _REGION2_SIZE &amp;&amp; kaslr_enabled())) {</div><div class='ctx'> 		asce_limit = _REGION1_SIZE;</div><div class='del'>-		rte_size = _REGION2_SIZE;</div><div class='add'>+		if (__NO_KASLR_END_KERNEL &gt; _REGION2_SIZE) {</div><div class='add'>+			rte_size = _REGION2_SIZE;</div><div class='add'>+			vsize = get_vmem_size(ident_map_size, vmemmap_size, vmalloc_size, _REGION2_SIZE);</div><div class='add'>+		} else {</div><div class='add'>+			rte_size = _REGION3_SIZE;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		asce_limit = _REGION2_SIZE;</div><div class='ctx'> 		rte_size = _REGION3_SIZE;</div><div class='hunk'>@@ -290,38 +271,67 @@ static unsigned long setup_kernel_memory_layout(void)</div><div class='ctx'> 	 * Forcing modules and vmalloc area under the ultravisor</div><div class='ctx'> 	 * secure storage limit, so that any vmalloc allocation</div><div class='ctx'> 	 * we do could be used to back secure guest storage.</div><div class='add'>+	 *</div><div class='add'>+	 * Assume the secure storage limit always exceeds _REGION2_SIZE,</div><div class='add'>+	 * otherwise asce_limit and rte_size would have been adjusted.</div><div class='ctx'> 	 */</div><div class='ctx'> 	vmax = adjust_to_uv_max(asce_limit);</div><div class='ctx'> #ifdef CONFIG_KASAN</div><div class='add'>+	BUILD_BUG_ON(__NO_KASLR_END_KERNEL &gt; KASAN_SHADOW_START);</div><div class='ctx'> 	/* force vmalloc and modules below kasan shadow */</div><div class='ctx'> 	vmax = min(vmax, KASAN_SHADOW_START);</div><div class='ctx'> #endif</div><div class='del'>-	__memcpy_real_area = round_down(vmax - MEMCPY_REAL_SIZE, PAGE_SIZE);</div><div class='del'>-	__abs_lowcore = round_down(__memcpy_real_area - ABS_LOWCORE_MAP_SIZE,</div><div class='del'>-				   sizeof(struct lowcore));</div><div class='del'>-	MODULES_END = round_down(__abs_lowcore, _SEGMENT_SIZE);</div><div class='add'>+	vsize = min(vsize, vmax);</div><div class='add'>+	if (kaslr_enabled()) {</div><div class='add'>+		unsigned long kernel_end, kaslr_len, slots, pos;</div><div class='add'>+</div><div class='add'>+		kaslr_len = max(KASLR_LEN, vmax - vsize);</div><div class='add'>+		slots = DIV_ROUND_UP(kaslr_len - kernel_size, THREAD_SIZE);</div><div class='add'>+		if (get_random(slots, &amp;pos))</div><div class='add'>+			pos = 0;</div><div class='add'>+		kernel_end = vmax - pos * THREAD_SIZE;</div><div class='add'>+		kernel_start = round_down(kernel_end - kernel_size, THREAD_SIZE);</div><div class='add'>+	} else if (vmax &lt; __NO_KASLR_END_KERNEL || vsize &gt; __NO_KASLR_END_KERNEL) {</div><div class='add'>+		kernel_start = round_down(vmax - kernel_size, THREAD_SIZE);</div><div class='add'>+		decompressor_printk("The kernel base address is forced to %lx\n", kernel_start);</div><div class='add'>+	} else {</div><div class='add'>+		kernel_start = __NO_KASLR_START_KERNEL;</div><div class='add'>+	}</div><div class='add'>+	__kaslr_offset = kernel_start;</div><div class='add'>+</div><div class='add'>+	MODULES_END = round_down(kernel_start, _SEGMENT_SIZE);</div><div class='ctx'> 	MODULES_VADDR = MODULES_END - MODULES_LEN;</div><div class='ctx'> 	VMALLOC_END = MODULES_VADDR;</div><div class='ctx'> </div><div class='ctx'> 	/* allow vmalloc area to occupy up to about 1/2 of the rest virtual space left */</div><div class='del'>-	vsize = round_down(VMALLOC_END / 2, _SEGMENT_SIZE);</div><div class='add'>+	vsize = (VMALLOC_END - FIXMAP_SIZE) / 2;</div><div class='add'>+	vsize = round_down(vsize, _SEGMENT_SIZE);</div><div class='ctx'> 	vmalloc_size = min(vmalloc_size, vsize);</div><div class='ctx'> 	VMALLOC_START = VMALLOC_END - vmalloc_size;</div><div class='ctx'> </div><div class='add'>+	__memcpy_real_area = round_down(VMALLOC_START - MEMCPY_REAL_SIZE, PAGE_SIZE);</div><div class='add'>+	__abs_lowcore = round_down(__memcpy_real_area - ABS_LOWCORE_MAP_SIZE,</div><div class='add'>+				   sizeof(struct lowcore));</div><div class='add'>+</div><div class='ctx'> 	/* split remaining virtual space between 1:1 mapping &amp; vmemmap array */</div><div class='del'>-	pages = VMALLOC_START / (PAGE_SIZE + sizeof(struct page));</div><div class='add'>+	pages = __abs_lowcore / (PAGE_SIZE + sizeof(struct page));</div><div class='ctx'> 	pages = SECTION_ALIGN_UP(pages);</div><div class='ctx'> 	/* keep vmemmap_start aligned to a top level region table entry */</div><div class='del'>-	vmemmap_start = round_down(VMALLOC_START - pages * sizeof(struct page), rte_size);</div><div class='del'>-	vmemmap_start = min(vmemmap_start, 1UL &lt;&lt; MAX_PHYSMEM_BITS);</div><div class='del'>-	/* maximum mappable address as seen by arch_get_mappable_range() */</div><div class='del'>-	max_mappable = vmemmap_start;</div><div class='add'>+	vmemmap_start = round_down(__abs_lowcore - pages * sizeof(struct page), rte_size);</div><div class='ctx'> 	/* make sure identity map doesn't overlay with vmemmap */</div><div class='ctx'> 	ident_map_size = min(ident_map_size, vmemmap_start);</div><div class='ctx'> 	vmemmap_size = SECTION_ALIGN_UP(ident_map_size / PAGE_SIZE) * sizeof(struct page);</div><div class='del'>-	/* make sure vmemmap doesn't overlay with vmalloc area */</div><div class='del'>-	VMALLOC_START = max(vmemmap_start + vmemmap_size, VMALLOC_START);</div><div class='add'>+	/* make sure vmemmap doesn't overlay with absolute lowcore area */</div><div class='add'>+	if (vmemmap_start + vmemmap_size &gt; __abs_lowcore) {</div><div class='add'>+		vmemmap_size = SECTION_ALIGN_DOWN(ident_map_size / PAGE_SIZE) * sizeof(struct page);</div><div class='add'>+		ident_map_size = vmemmap_size / sizeof(struct page) * PAGE_SIZE;</div><div class='add'>+	}</div><div class='ctx'> 	vmemmap = (struct page *)vmemmap_start;</div><div class='add'>+	/* maximum address for which linear mapping could be created (DCSS, memory) */</div><div class='add'>+	BUILD_BUG_ON(MAX_DCSS_ADDR &gt; (1UL &lt;&lt; MAX_PHYSMEM_BITS));</div><div class='add'>+	max_mappable = max(ident_map_size, MAX_DCSS_ADDR);</div><div class='add'>+	max_mappable = min(max_mappable, vmemmap_start);</div><div class='add'>+	__identity_base = round_down(vmemmap_start - max_mappable, rte_size);</div><div class='ctx'> </div><div class='ctx'> 	return asce_limit;</div><div class='ctx'> }</div><div class='hunk'>@@ -329,9 +339,9 @@ static unsigned long setup_kernel_memory_layout(void)</div><div class='ctx'> /*</div><div class='ctx'>  * This function clears the BSS section of the decompressed Linux kernel and NOT the decompressor's.</div><div class='ctx'>  */</div><div class='del'>-static void clear_bss_section(unsigned long vmlinux_lma)</div><div class='add'>+static void clear_bss_section(unsigned long kernel_start)</div><div class='ctx'> {</div><div class='del'>-	memset((void *)vmlinux_lma + vmlinux.image_size, 0, vmlinux.bss_size);</div><div class='add'>+	memset((void *)kernel_start + vmlinux.image_size, 0, vmlinux.bss_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -348,19 +358,12 @@ static void setup_vmalloc_size(void)</div><div class='ctx'> 	vmalloc_size = max(size, vmalloc_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kaslr_adjust_vmlinux_info(unsigned long offset)</div><div class='add'>+static void kaslr_adjust_vmlinux_info(long offset)</div><div class='ctx'> {</div><div class='del'>-	*(unsigned long *)(&amp;vmlinux.entry) += offset;</div><div class='ctx'> 	vmlinux.bootdata_off += offset;</div><div class='ctx'> 	vmlinux.bootdata_preserved_off += offset;</div><div class='del'>-#ifdef CONFIG_PIE_BUILD</div><div class='del'>-	vmlinux.rela_dyn_start += offset;</div><div class='del'>-	vmlinux.rela_dyn_end += offset;</div><div class='del'>-	vmlinux.dynsym_start += offset;</div><div class='del'>-#else</div><div class='ctx'> 	vmlinux.got_start += offset;</div><div class='ctx'> 	vmlinux.got_end += offset;</div><div class='del'>-#endif</div><div class='ctx'> 	vmlinux.init_mm_off += offset;</div><div class='ctx'> 	vmlinux.swapper_pg_dir_off += offset;</div><div class='ctx'> 	vmlinux.invalid_pg_dir_off += offset;</div><div class='hunk'>@@ -373,23 +376,30 @@ static void kaslr_adjust_vmlinux_info(unsigned long offset)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fixup_vmlinux_info(void)</div><div class='add'>+{</div><div class='add'>+	vmlinux.entry -= __START_KERNEL;</div><div class='add'>+	kaslr_adjust_vmlinux_info(-__START_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void startup_kernel(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long max_physmem_end;</div><div class='del'>-	unsigned long vmlinux_lma = 0;</div><div class='add'>+	unsigned long kernel_size = vmlinux.image_size + vmlinux.bss_size;</div><div class='add'>+	unsigned long nokaslr_offset_phys = mem_safe_offset();</div><div class='ctx'> 	unsigned long amode31_lma = 0;</div><div class='add'>+	unsigned long max_physmem_end;</div><div class='ctx'> 	unsigned long asce_limit;</div><div class='ctx'> 	unsigned long safe_addr;</div><div class='del'>-	void *img;</div><div class='ctx'> 	psw_t psw;</div><div class='ctx'> </div><div class='add'>+	fixup_vmlinux_info();</div><div class='ctx'> 	setup_lpp();</div><div class='del'>-	safe_addr = mem_safe_offset();</div><div class='add'>+	safe_addr = PAGE_ALIGN(nokaslr_offset_phys + kernel_size);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Reserve decompressor memory together with decompression heap, buffer and</div><div class='del'>-	 * memory which might be occupied by uncompressed kernel at default 1Mb</div><div class='del'>-	 * position (if KASLR is off or failed).</div><div class='add'>+	 * Reserve decompressor memory together with decompression heap,</div><div class='add'>+	 * buffer and memory which might be occupied by uncompressed kernel</div><div class='add'>+	 * (if KASLR is off or failed).</div><div class='ctx'> 	 */</div><div class='ctx'> 	physmem_reserve(RR_DECOMPRESSOR, 0, safe_addr);</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) &amp;&amp; parmarea.initrd_size)</div><div class='hunk'>@@ -409,40 +419,39 @@ void startup_kernel(void)</div><div class='ctx'> 	max_physmem_end = detect_max_physmem_end();</div><div class='ctx'> 	setup_ident_map_size(max_physmem_end);</div><div class='ctx'> 	setup_vmalloc_size();</div><div class='del'>-	asce_limit = setup_kernel_memory_layout();</div><div class='add'>+	asce_limit = setup_kernel_memory_layout(kernel_size);</div><div class='ctx'> 	/* got final ident_map_size, physmem allocations could be performed now */</div><div class='ctx'> 	physmem_set_usable_limit(ident_map_size);</div><div class='ctx'> 	detect_physmem_online_ranges(max_physmem_end);</div><div class='ctx'> 	save_ipl_cert_comp_list();</div><div class='ctx'> 	rescue_initrd(safe_addr, ident_map_size);</div><div class='del'>-	rescue_relocs();</div><div class='ctx'> </div><div class='del'>-	if (kaslr_enabled()) {</div><div class='del'>-		vmlinux_lma = randomize_within_range(vmlinux.image_size + vmlinux.bss_size,</div><div class='del'>-						     THREAD_SIZE, vmlinux.default_lma,</div><div class='del'>-						     ident_map_size);</div><div class='del'>-		if (vmlinux_lma) {</div><div class='del'>-			__kaslr_offset = vmlinux_lma - vmlinux.default_lma;</div><div class='del'>-			kaslr_adjust_vmlinux_info(__kaslr_offset);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	vmlinux_lma = vmlinux_lma ?: vmlinux.default_lma;</div><div class='del'>-	physmem_reserve(RR_VMLINUX, vmlinux_lma, vmlinux.image_size + vmlinux.bss_size);</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_UNCOMPRESSED)) {</div><div class='del'>-		img = decompress_kernel();</div><div class='del'>-		memmove((void *)vmlinux_lma, img, vmlinux.image_size);</div><div class='del'>-	} else if (__kaslr_offset) {</div><div class='del'>-		img = (void *)vmlinux.default_lma;</div><div class='del'>-		memmove((void *)vmlinux_lma, img, vmlinux.image_size);</div><div class='del'>-		memset(img, 0, vmlinux.image_size);</div><div class='del'>-	}</div><div class='add'>+	if (kaslr_enabled())</div><div class='add'>+		__kaslr_offset_phys = randomize_within_range(kernel_size, THREAD_SIZE, 0, ident_map_size);</div><div class='add'>+	if (!__kaslr_offset_phys)</div><div class='add'>+		__kaslr_offset_phys = nokaslr_offset_phys;</div><div class='add'>+	kaslr_adjust_vmlinux_info(__kaslr_offset_phys);</div><div class='add'>+	physmem_reserve(RR_VMLINUX, __kaslr_offset_phys, kernel_size);</div><div class='add'>+	deploy_kernel((void *)__kaslr_offset_phys);</div><div class='ctx'> </div><div class='ctx'> 	/* vmlinux decompression is done, shrink reserved low memory */</div><div class='ctx'> 	physmem_reserve(RR_DECOMPRESSOR, 0, (unsigned long)_decompressor_end);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In case KASLR is enabled the randomized location of .amode31</div><div class='add'>+	 * section might overlap with .vmlinux.relocs section. To avoid that</div><div class='add'>+	 * the below randomize_within_range() could have been called with</div><div class='add'>+	 * __vmlinux_relocs_64_end as the lower range address. However,</div><div class='add'>+	 * .amode31 section is written to by the decompressed kernel - at</div><div class='add'>+	 * that time the contents of .vmlinux.relocs is not needed anymore.</div><div class='add'>+	 * Conversly, .vmlinux.relocs is read only by the decompressor, even</div><div class='add'>+	 * before the kernel started. Therefore, in case the two sections</div><div class='add'>+	 * overlap there is no risk of corrupting any data.</div><div class='add'>+	 */</div><div class='ctx'> 	if (kaslr_enabled())</div><div class='ctx'> 		amode31_lma = randomize_within_range(vmlinux.amode31_size, PAGE_SIZE, 0, SZ_2G);</div><div class='del'>-	amode31_lma = amode31_lma ?: vmlinux.default_lma - vmlinux.amode31_size;</div><div class='add'>+	if (!amode31_lma)</div><div class='add'>+		amode31_lma = __kaslr_offset_phys - vmlinux.amode31_size;</div><div class='ctx'> 	physmem_reserve(RR_AMODE31, amode31_lma, vmlinux.amode31_size);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -458,23 +467,23 @@ void startup_kernel(void)</div><div class='ctx'> 	 * - copy_bootdata() must follow setup_vmem() to propagate changes</div><div class='ctx'> 	 *   to bootdata made by setup_vmem()</div><div class='ctx'> 	 */</div><div class='del'>-	clear_bss_section(vmlinux_lma);</div><div class='del'>-	kaslr_adjust_relocs(vmlinux_lma, vmlinux_lma + vmlinux.image_size, __kaslr_offset);</div><div class='add'>+	clear_bss_section(__kaslr_offset_phys);</div><div class='add'>+	kaslr_adjust_relocs(__kaslr_offset_phys, __kaslr_offset_phys + vmlinux.image_size,</div><div class='add'>+			    __kaslr_offset, __kaslr_offset_phys);</div><div class='ctx'> 	kaslr_adjust_got(__kaslr_offset);</div><div class='del'>-	free_relocs();</div><div class='del'>-	setup_vmem(asce_limit);</div><div class='add'>+	setup_vmem(__kaslr_offset, __kaslr_offset + kernel_size, asce_limit);</div><div class='ctx'> 	copy_bootdata();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Save KASLR offset for early dumps, before vmcore_info is set.</div><div class='ctx'> 	 * Mark as uneven to distinguish from real vmcore_info pointer.</div><div class='ctx'> 	 */</div><div class='del'>-	S390_lowcore.vmcore_info = __kaslr_offset ? __kaslr_offset | 0x1UL : 0;</div><div class='add'>+	S390_lowcore.vmcore_info = __kaslr_offset_phys ? __kaslr_offset_phys | 0x1UL : 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Jump to the decompressed kernel entry point and switch DAT mode on.</div><div class='ctx'> 	 */</div><div class='del'>-	psw.addr = vmlinux.entry;</div><div class='add'>+	psw.addr = __kaslr_offset + vmlinux.entry;</div><div class='ctx'> 	psw.mask = PSW_KERNEL_BITS;</div><div class='ctx'> 	__load_psw(psw);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/boot/vmem.c b/arch/s390/boot/vmem.c<br/>index 09b10bb6e4d0..96d48b7112d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/vmem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/vmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/vmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/vmem.c</a></div><div class='hunk'>@@ -27,6 +27,8 @@ enum populate_mode {</div><div class='ctx'> 	POPULATE_NONE,</div><div class='ctx'> 	POPULATE_DIRECT,</div><div class='ctx'> 	POPULATE_ABS_LOWCORE,</div><div class='add'>+	POPULATE_IDENTITY,</div><div class='add'>+	POPULATE_KERNEL,</div><div class='ctx'> #ifdef CONFIG_KASAN</div><div class='ctx'> 	POPULATE_KASAN_MAP_SHADOW,</div><div class='ctx'> 	POPULATE_KASAN_ZERO_SHADOW,</div><div class='hunk'>@@ -54,7 +56,7 @@ static inline void kasan_populate(unsigned long start, unsigned long end, enum p</div><div class='ctx'> 	pgtable_populate(start, end, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kasan_populate_shadow(void)</div><div class='add'>+static void kasan_populate_shadow(unsigned long kernel_start, unsigned long kernel_end)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd_z = __pmd(__pa(kasan_early_shadow_pte) | _SEGMENT_ENTRY);</div><div class='ctx'> 	pud_t pud_z = __pud(__pa(kasan_early_shadow_pmd) | _REGION3_ENTRY);</div><div class='hunk'>@@ -76,44 +78,20 @@ static void kasan_populate_shadow(void)</div><div class='ctx'> 	__arch_set_page_dat(kasan_early_shadow_pmd, 1UL &lt;&lt; CRST_ALLOC_ORDER);</div><div class='ctx'> 	__arch_set_page_dat(kasan_early_shadow_pte, 1);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Current memory layout:</div><div class='del'>-	 * +- 0 -------------+	       +- shadow start -+</div><div class='del'>-	 * |1:1 ident mapping|	      /|1/8 of ident map|</div><div class='del'>-	 * |		     |	     / |		|</div><div class='del'>-	 * +-end of ident map+	    /  +----------------+</div><div class='del'>-	 * | ... gap ...     |	   /   |    kasan	|</div><div class='del'>-	 * |		     |	  /    |  zero page	|</div><div class='del'>-	 * +- vmalloc area  -+	 /     |   mapping	|</div><div class='del'>-	 * | vmalloc_size    |	/      | (untracked)	|</div><div class='del'>-	 * +- modules vaddr -+ /       +----------------+</div><div class='del'>-	 * | 2Gb	     |/        |    unmapped	| allocated per module</div><div class='del'>-	 * +- shadow start  -+	       +----------------+</div><div class='del'>-	 * | 1/8 addr space  |	       | zero pg mapping| (untracked)</div><div class='del'>-	 * +- shadow end ----+---------+- shadow end ---+</div><div class='del'>-	 *</div><div class='del'>-	 * Current memory layout (KASAN_VMALLOC):</div><div class='del'>-	 * +- 0 -------------+	       +- shadow start -+</div><div class='del'>-	 * |1:1 ident mapping|	      /|1/8 of ident map|</div><div class='del'>-	 * |		     |	     / |		|</div><div class='del'>-	 * +-end of ident map+	    /  +----------------+</div><div class='del'>-	 * | ... gap ...     |	   /   | kasan zero page| (untracked)</div><div class='del'>-	 * |		     |	  /    | mapping	|</div><div class='del'>-	 * +- vmalloc area  -+	 /     +----------------+</div><div class='del'>-	 * | vmalloc_size    |	/      |shallow populate|</div><div class='del'>-	 * +- modules vaddr -+ /       +----------------+</div><div class='del'>-	 * | 2Gb	     |/        |shallow populate|</div><div class='del'>-	 * +- shadow start  -+	       +----------------+</div><div class='del'>-	 * | 1/8 addr space  |	       | zero pg mapping| (untracked)</div><div class='del'>-	 * +- shadow end ----+---------+- shadow end ---+</div><div class='del'>-	 */</div><div class='del'>-</div><div class='ctx'> 	for_each_physmem_usable_range(i, &amp;start, &amp;end) {</div><div class='del'>-		kasan_populate(start, end, POPULATE_KASAN_MAP_SHADOW);</div><div class='del'>-		if (memgap_start &amp;&amp; physmem_info.info_source == MEM_DETECT_DIAG260)</div><div class='del'>-			kasan_populate(memgap_start, start, POPULATE_KASAN_ZERO_SHADOW);</div><div class='add'>+		kasan_populate((unsigned long)__identity_va(start),</div><div class='add'>+			       (unsigned long)__identity_va(end),</div><div class='add'>+			       POPULATE_KASAN_MAP_SHADOW);</div><div class='add'>+		if (memgap_start &amp;&amp; physmem_info.info_source == MEM_DETECT_DIAG260) {</div><div class='add'>+			kasan_populate((unsigned long)__identity_va(memgap_start),</div><div class='add'>+				       (unsigned long)__identity_va(start),</div><div class='add'>+				       POPULATE_KASAN_ZERO_SHADOW);</div><div class='add'>+		}</div><div class='ctx'> 		memgap_start = end;</div><div class='ctx'> 	}</div><div class='add'>+	kasan_populate(kernel_start, kernel_end, POPULATE_KASAN_MAP_SHADOW);</div><div class='add'>+	kasan_populate(0, (unsigned long)__identity_va(0), POPULATE_KASAN_ZERO_SHADOW);</div><div class='add'>+	kasan_populate(AMODE31_START, AMODE31_END, POPULATE_KASAN_ZERO_SHADOW);</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) {</div><div class='ctx'> 		untracked_end = VMALLOC_START;</div><div class='ctx'> 		/* shallowly populate kasan shadow for vmalloc and modules */</div><div class='hunk'>@@ -122,8 +100,9 @@ static void kasan_populate_shadow(void)</div><div class='ctx'> 		untracked_end = MODULES_VADDR;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* populate kasan shadow for untracked memory */</div><div class='del'>-	kasan_populate(ident_map_size, untracked_end, POPULATE_KASAN_ZERO_SHADOW);</div><div class='del'>-	kasan_populate(MODULES_END, _REGION1_SIZE, POPULATE_KASAN_ZERO_SHADOW);</div><div class='add'>+	kasan_populate((unsigned long)__identity_va(ident_map_size), untracked_end,</div><div class='add'>+		       POPULATE_KASAN_ZERO_SHADOW);</div><div class='add'>+	kasan_populate(kernel_end, _REGION1_SIZE, POPULATE_KASAN_ZERO_SHADOW);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool kasan_pgd_populate_zero_shadow(pgd_t *pgd, unsigned long addr,</div><div class='hunk'>@@ -180,7 +159,9 @@ static bool kasan_pte_populate_zero_shadow(pte_t *pte, enum populate_mode mode)</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-static inline void kasan_populate_shadow(void) {}</div><div class='add'>+static inline void kasan_populate_shadow(unsigned long kernel_start, unsigned long kernel_end)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static inline bool kasan_pgd_populate_zero_shadow(pgd_t *pgd, unsigned long addr,</div><div class='ctx'> 						  unsigned long end, enum populate_mode mode)</div><div class='hunk'>@@ -263,6 +244,10 @@ static unsigned long _pa(unsigned long addr, unsigned long size, enum populate_m</div><div class='ctx'> 		return addr;</div><div class='ctx'> 	case POPULATE_ABS_LOWCORE:</div><div class='ctx'> 		return __abs_lowcore_pa(addr);</div><div class='add'>+	case POPULATE_KERNEL:</div><div class='add'>+		return __kernel_pa(addr);</div><div class='add'>+	case POPULATE_IDENTITY:</div><div class='add'>+		return __identity_pa(addr);</div><div class='ctx'> #ifdef CONFIG_KASAN</div><div class='ctx'> 	case POPULATE_KASAN_MAP_SHADOW:</div><div class='ctx'> 		addr = physmem_alloc_top_down(RR_VMEM, size, size);</div><div class='hunk'>@@ -274,15 +259,22 @@ static unsigned long _pa(unsigned long addr, unsigned long size, enum populate_m</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool can_large_pud(pud_t *pu_dir, unsigned long addr, unsigned long end)</div><div class='add'>+static bool large_allowed(enum populate_mode mode)</div><div class='add'>+{</div><div class='add'>+	return (mode == POPULATE_DIRECT) || (mode == POPULATE_IDENTITY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool can_large_pud(pud_t *pu_dir, unsigned long addr, unsigned long end,</div><div class='add'>+			  enum populate_mode mode)</div><div class='ctx'> {</div><div class='del'>-	return machine.has_edat2 &amp;&amp;</div><div class='add'>+	return machine.has_edat2 &amp;&amp; large_allowed(mode) &amp;&amp;</div><div class='ctx'> 	       IS_ALIGNED(addr, PUD_SIZE) &amp;&amp; (end - addr) &gt;= PUD_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool can_large_pmd(pmd_t *pm_dir, unsigned long addr, unsigned long end)</div><div class='add'>+static bool can_large_pmd(pmd_t *pm_dir, unsigned long addr, unsigned long end,</div><div class='add'>+			  enum populate_mode mode)</div><div class='ctx'> {</div><div class='del'>-	return machine.has_edat1 &amp;&amp;</div><div class='add'>+	return machine.has_edat1 &amp;&amp; large_allowed(mode) &amp;&amp;</div><div class='ctx'> 	       IS_ALIGNED(addr, PMD_SIZE) &amp;&amp; (end - addr) &gt;= PMD_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -322,7 +314,7 @@ static void pgtable_pmd_populate(pud_t *pud, unsigned long addr, unsigned long e</div><div class='ctx'> 		if (pmd_none(*pmd)) {</div><div class='ctx'> 			if (kasan_pmd_populate_zero_shadow(pmd, addr, next, mode))</div><div class='ctx'> 				continue;</div><div class='del'>-			if (can_large_pmd(pmd, addr, next)) {</div><div class='add'>+			if (can_large_pmd(pmd, addr, next, mode)) {</div><div class='ctx'> 				entry = __pmd(_pa(addr, _SEGMENT_SIZE, mode));</div><div class='ctx'> 				entry = set_pmd_bit(entry, SEGMENT_KERNEL);</div><div class='ctx'> 				if (!machine.has_nx)</div><div class='hunk'>@@ -355,7 +347,7 @@ static void pgtable_pud_populate(p4d_t *p4d, unsigned long addr, unsigned long e</div><div class='ctx'> 		if (pud_none(*pud)) {</div><div class='ctx'> 			if (kasan_pud_populate_zero_shadow(pud, addr, next, mode))</div><div class='ctx'> 				continue;</div><div class='del'>-			if (can_large_pud(pud, addr, next)) {</div><div class='add'>+			if (can_large_pud(pud, addr, next, mode)) {</div><div class='ctx'> 				entry = __pud(_pa(addr, _REGION3_SIZE, mode));</div><div class='ctx'> 				entry = set_pud_bit(entry, REGION3_KERNEL);</div><div class='ctx'> 				if (!machine.has_nx)</div><div class='hunk'>@@ -418,11 +410,12 @@ static void pgtable_populate(unsigned long addr, unsigned long end, enum populat</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void setup_vmem(unsigned long asce_limit)</div><div class='add'>+void setup_vmem(unsigned long kernel_start, unsigned long kernel_end, unsigned long asce_limit)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long start, end;</div><div class='ctx'> 	unsigned long asce_type;</div><div class='ctx'> 	unsigned long asce_bits;</div><div class='add'>+	pgd_t *init_mm_pgd;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -433,6 +426,15 @@ void setup_vmem(unsigned long asce_limit)</div><div class='ctx'> 	for_each_physmem_online_range(i, &amp;start, &amp;end)</div><div class='ctx'> 		__arch_set_page_nodat((void *)start, (end - start) &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * init_mm-&gt;pgd contains virtual address of swapper_pg_dir.</div><div class='add'>+	 * It is unusable at this stage since DAT is yet off. Swap</div><div class='add'>+	 * it for physical address of swapper_pg_dir and restore</div><div class='add'>+	 * the virtual address after all page tables are created.</div><div class='add'>+	 */</div><div class='add'>+	init_mm_pgd = init_mm.pgd;</div><div class='add'>+	init_mm.pgd = (pgd_t *)swapper_pg_dir;</div><div class='add'>+</div><div class='ctx'> 	if (asce_limit == _REGION1_SIZE) {</div><div class='ctx'> 		asce_type = _REGION2_ENTRY_EMPTY;</div><div class='ctx'> 		asce_bits = _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;</div><div class='hunk'>@@ -453,15 +455,20 @@ void setup_vmem(unsigned long asce_limit)</div><div class='ctx'> 	 * the lowcore and create the identity mapping only afterwards.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pgtable_populate(0, sizeof(struct lowcore), POPULATE_DIRECT);</div><div class='del'>-	for_each_physmem_usable_range(i, &amp;start, &amp;end)</div><div class='del'>-		pgtable_populate(start, end, POPULATE_DIRECT);</div><div class='add'>+	for_each_physmem_usable_range(i, &amp;start, &amp;end) {</div><div class='add'>+		pgtable_populate((unsigned long)__identity_va(start),</div><div class='add'>+				 (unsigned long)__identity_va(end),</div><div class='add'>+				 POPULATE_IDENTITY);</div><div class='add'>+	}</div><div class='add'>+	pgtable_populate(kernel_start, kernel_end, POPULATE_KERNEL);</div><div class='add'>+	pgtable_populate(AMODE31_START, AMODE31_END, POPULATE_DIRECT);</div><div class='ctx'> 	pgtable_populate(__abs_lowcore, __abs_lowcore + sizeof(struct lowcore),</div><div class='ctx'> 			 POPULATE_ABS_LOWCORE);</div><div class='ctx'> 	pgtable_populate(__memcpy_real_area, __memcpy_real_area + PAGE_SIZE,</div><div class='ctx'> 			 POPULATE_NONE);</div><div class='del'>-	memcpy_real_ptep = __virt_to_kpte(__memcpy_real_area);</div><div class='add'>+	memcpy_real_ptep = __identity_va(__virt_to_kpte(__memcpy_real_area));</div><div class='ctx'> </div><div class='del'>-	kasan_populate_shadow();</div><div class='add'>+	kasan_populate_shadow(kernel_start, kernel_end);</div><div class='ctx'> </div><div class='ctx'> 	S390_lowcore.kernel_asce.val = swapper_pg_dir | asce_bits;</div><div class='ctx'> 	S390_lowcore.user_asce = s390_invalid_asce;</div><div class='hunk'>@@ -471,4 +478,5 @@ void setup_vmem(unsigned long asce_limit)</div><div class='ctx'> 	local_ctl_load(13, &amp;S390_lowcore.kernel_asce);</div><div class='ctx'> </div><div class='ctx'> 	init_mm.context.asce = S390_lowcore.kernel_asce.val;</div><div class='add'>+	init_mm.pgd = init_mm_pgd;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/boot/vmlinux.lds.S b/arch/s390/boot/vmlinux.lds.S<br/>index 3d7ea585ab99..1fe5a1d3ff60 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/vmlinux.lds.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/boot/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/boot/vmlinux.lds.S</a></div><div class='hunk'>@@ -99,8 +99,16 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	_decompressor_end = .;</div><div class='ctx'> </div><div class='add'>+	. = ALIGN(4);</div><div class='add'>+	.vmlinux.relocs : {</div><div class='add'>+		__vmlinux_relocs_64_start = .;</div><div class='add'>+		*(.vmlinux.relocs_64)</div><div class='add'>+		__vmlinux_relocs_64_end = .;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_KERNEL_UNCOMPRESSED</div><div class='del'>-	. = 0x100000;</div><div class='add'>+	. = ALIGN(PAGE_SIZE);</div><div class='add'>+	. += AMODE31_SIZE;		/* .amode31 section */</div><div class='ctx'> #else</div><div class='ctx'> 	. = ALIGN(8);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -110,24 +118,6 @@ SECTIONS</div><div class='ctx'> 		_compressed_end = .;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_PIE_BUILD</div><div class='del'>-	/*</div><div class='del'>-	 * When the kernel is built with CONFIG_KERNEL_UNCOMPRESSED, the entire</div><div class='del'>-	 * uncompressed vmlinux.bin is positioned in the bzImage decompressor</div><div class='del'>-	 * image at the default kernel LMA of 0x100000, enabling it to be</div><div class='del'>-	 * executed in-place. However, the size of .vmlinux.relocs could be</div><div class='del'>-	 * large enough to cause an overlap with the uncompressed kernel at the</div><div class='del'>-	 * address 0x100000. To address this issue, .vmlinux.relocs is</div><div class='del'>-	 * positioned after the .rodata.compressed.</div><div class='del'>-	 */</div><div class='del'>-	. = ALIGN(4);</div><div class='del'>-	.vmlinux.relocs : {</div><div class='del'>-		__vmlinux_relocs_64_start = .;</div><div class='del'>-		*(.vmlinux.relocs_64)</div><div class='del'>-		__vmlinux_relocs_64_end = .;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define SB_TRAILER_SIZE 32</div><div class='ctx'> 	/* Trailer needed for Secure Boot */</div><div class='ctx'> 	. += SB_TRAILER_SIZE; /* make sure .sb.trailer does not overwrite the previous section */</div><div class='head'>diff --git a/arch/s390/configs/debug_defconfig b/arch/s390/configs/debug_defconfig<br/>index f1fb01cd5a25..145342e46ea8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/configs/debug_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/configs/debug_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/configs/debug_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/configs/debug_defconfig</a></div><div class='hunk'>@@ -760,7 +760,6 @@ CONFIG_CRYPTO_USER_API_HASH=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='del'>-CONFIG_CRYPTO_STATS=y</div><div class='ctx'> CONFIG_CRYPTO_CRC32_S390=y</div><div class='ctx'> CONFIG_CRYPTO_SHA512_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_S390=m</div><div class='head'>diff --git a/arch/s390/configs/defconfig b/arch/s390/configs/defconfig<br/>index d33f814f78b2..dc237896f99d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/configs/defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/configs/defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/configs/defconfig</a></div><div class='hunk'>@@ -745,7 +745,6 @@ CONFIG_CRYPTO_USER_API_HASH=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='del'>-CONFIG_CRYPTO_STATS=y</div><div class='ctx'> CONFIG_CRYPTO_CRC32_S390=y</div><div class='ctx'> CONFIG_CRYPTO_SHA512_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_S390=m</div><div class='head'>diff --git a/arch/s390/crypto/paes_s390.c b/arch/s390/crypto/paes_s390.c<br/>index 99f7e1f2b70a..99ea3f12c5d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/paes_s390.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/crypto/paes_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/paes_s390.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/crypto/paes_s390.c</a></div><div class='hunk'>@@ -125,8 +125,19 @@ struct s390_pxts_ctx {</div><div class='ctx'> static inline int __paes_keyblob2pkey(struct key_blob *kb,</div><div class='ctx'> 				     struct pkey_protkey *pk)</div><div class='ctx'> {</div><div class='del'>-	return pkey_keyblob2pkey(kb-&gt;key, kb-&gt;keylen,</div><div class='del'>-				 pk-&gt;protkey, &amp;pk-&gt;len, &amp;pk-&gt;type);</div><div class='add'>+	int i, ret = -EIO;</div><div class='add'>+</div><div class='add'>+	/* try three times in case of busy card */</div><div class='add'>+	for (i = 0; ret &amp;&amp; i &lt; 3; i++) {</div><div class='add'>+		if (ret == -EBUSY &amp;&amp; in_task()) {</div><div class='add'>+			if (msleep_interruptible(1000))</div><div class='add'>+				return -EINTR;</div><div class='add'>+		}</div><div class='add'>+		ret = pkey_keyblob2pkey(kb-&gt;key, kb-&gt;keylen,</div><div class='add'>+					pk-&gt;protkey, &amp;pk-&gt;len, &amp;pk-&gt;type);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int __paes_convert_key(struct s390_paes_ctx *ctx)</div><div class='head'>diff --git a/arch/s390/include/asm/ap.h b/arch/s390/include/asm/ap.h<br/>index 43ac4a64f49b..395b02d6a133 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/ap.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/ap.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/ap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/ap.h</a></div><div class='hunk'>@@ -223,13 +223,18 @@ static inline struct ap_queue_status ap_zapq(ap_qid_t qid, int fbit)</div><div class='ctx'>  * config info as returned by the ap_qci() function.</div><div class='ctx'>  */</div><div class='ctx'> struct ap_config_info {</div><div class='del'>-	unsigned int apsc	 : 1;	/* S bit */</div><div class='del'>-	unsigned int apxa	 : 1;	/* N bit */</div><div class='del'>-	unsigned int qact	 : 1;	/* C bit */</div><div class='del'>-	unsigned int rc8a	 : 1;	/* R bit */</div><div class='del'>-	unsigned int		 : 4;</div><div class='del'>-	unsigned int apsb	 : 1;	/* B bit */</div><div class='del'>-	unsigned int		 : 23;</div><div class='add'>+	union {</div><div class='add'>+		unsigned int flags;</div><div class='add'>+		struct {</div><div class='add'>+			unsigned int apsc	 : 1;	/* S bit */</div><div class='add'>+			unsigned int apxa	 : 1;	/* N bit */</div><div class='add'>+			unsigned int qact	 : 1;	/* C bit */</div><div class='add'>+			unsigned int rc8a	 : 1;	/* R bit */</div><div class='add'>+			unsigned int		 : 4;</div><div class='add'>+			unsigned int apsb	 : 1;	/* B bit */</div><div class='add'>+			unsigned int		 : 23;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> 	unsigned char na;		/* max # of APs - 1 */</div><div class='ctx'> 	unsigned char nd;		/* max # of Domains - 1 */</div><div class='ctx'> 	unsigned char _reserved0[10];</div><div class='hunk'>@@ -544,15 +549,4 @@ static inline struct ap_queue_status ap_dqap(ap_qid_t qid,</div><div class='ctx'> 	return reg1.status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Interface to tell the AP bus code that a configuration</div><div class='del'>- * change has happened. The bus code should at least do</div><div class='del'>- * an ap bus resource rescan.</div><div class='del'>- */</div><div class='del'>-#if IS_ENABLED(CONFIG_ZCRYPT)</div><div class='del'>-void ap_bus_cfg_chg(void);</div><div class='del'>-#else</div><div class='del'>-static inline void ap_bus_cfg_chg(void){}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_S390_AP_H_ */</div><div class='head'>diff --git a/arch/s390/include/asm/asm-prototypes.h b/arch/s390/include/asm/asm-prototypes.h<br/>index 56096ae26f29..f662eb4b9246 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/asm-prototypes.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/asm-prototypes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/asm-prototypes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/asm-prototypes.h</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='add'>+#include &lt;asm/nospec-branch.h&gt;</div><div class='ctx'> #include &lt;asm-generic/asm-prototypes.h&gt;</div><div class='ctx'> </div><div class='ctx'> __int128_t __ashlti3(__int128_t a, int b);</div><div class='head'>diff --git a/arch/s390/include/asm/chsc.h b/arch/s390/include/asm/chsc.h<br/>index bb48ea380c0d..bb78159d8042 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/chsc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/chsc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/chsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/chsc.h</a></div><div class='hunk'>@@ -11,6 +11,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/chsc.h&gt;</div><div class='ctx'> </div><div class='add'>+/* struct from linux/notifier.h */</div><div class='add'>+struct notifier_block;</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Operation codes for CHSC PNSO:</div><div class='ctx'>  *    PNSO_OC_NET_BRIDGE_INFO - only addresses that are visible to a bridgeport</div><div class='hunk'>@@ -66,4 +69,16 @@ struct chsc_pnso_area {</div><div class='ctx'> 	struct chsc_pnso_naid_l2 entries[];</div><div class='ctx'> } __packed __aligned(PAGE_SIZE);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * notifier interface - registered notifiers gets called on</div><div class='add'>+ * the following events:</div><div class='add'>+ * - ap config changed (CHSC_NOTIFY_AP_CFG)</div><div class='add'>+ */</div><div class='add'>+enum chsc_notify_type {</div><div class='add'>+	CHSC_NOTIFY_AP_CFG = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int chsc_notifier_register(struct notifier_block *nb);</div><div class='add'>+int chsc_notifier_unregister(struct notifier_block *nb);</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_S390_CHSC_H */</div><div class='head'>diff --git a/arch/s390/include/asm/dwarf.h b/arch/s390/include/asm/dwarf.h<br/>index 4f21ae561e4d..390906b8e386 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/dwarf.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/dwarf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/dwarf.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/dwarf.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #define CFI_DEF_CFA_OFFSET	.cfi_def_cfa_offset</div><div class='ctx'> #define CFI_ADJUST_CFA_OFFSET	.cfi_adjust_cfa_offset</div><div class='ctx'> #define CFI_RESTORE		.cfi_restore</div><div class='add'>+#define CFI_REL_OFFSET		.cfi_rel_offset</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AS_CFI_VAL_OFFSET</div><div class='ctx'> #define CFI_VAL_OFFSET		.cfi_val_offset</div><div class='head'>diff --git a/arch/s390/include/asm/extmem.h b/arch/s390/include/asm/extmem.h<br/>index 568fd81bb77b..e0a06060afdd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/extmem.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/extmem.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/extmem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/extmem.h</a></div><div class='hunk'>@@ -8,6 +8,13 @@</div><div class='ctx'> #define _ASM_S390X_DCSS_H</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * DCSS segment is defined as a contiguous range of pages using DEFSEG command.</div><div class='add'>+ * The range start and end is a page number with a value less than or equal to</div><div class='add'>+ * 0x7ffffff (see CP Commands and Utilities Reference).</div><div class='add'>+ */</div><div class='add'>+#define MAX_DCSS_ADDR	(512UL * SZ_1G)</div><div class='add'>+</div><div class='ctx'> /* possible values for segment type as returned by segment_info */</div><div class='ctx'> #define SEG_TYPE_SW 0</div><div class='ctx'> #define SEG_TYPE_EW 1</div><div class='head'>diff --git a/arch/s390/include/asm/ftrace.h b/arch/s390/include/asm/ftrace.h<br/>index 621f23d5ae30..77e479d44f1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/ftrace.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/ftrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/ftrace.h</a></div><div class='hunk'>@@ -8,12 +8,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CC_IS_CLANG</div><div class='del'>-/* https://llvm.org/pr41424 */</div><div class='del'>-#define ftrace_return_address(n) 0UL</div><div class='del'>-#else</div><div class='del'>-#define ftrace_return_address(n) __builtin_return_address(n)</div><div class='del'>-#endif</div><div class='add'>+unsigned long return_address(unsigned int n);</div><div class='add'>+#define ftrace_return_address(n) return_address(n)</div><div class='ctx'> </div><div class='ctx'> void ftrace_caller(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/gmap.h b/arch/s390/include/asm/gmap.h<br/>index 5cc46e0dde62..9725586f4259 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/gmap.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/gmap.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/gmap.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/gmap.h</a></div><div class='hunk'>@@ -146,7 +146,7 @@ int gmap_mprotect_notify(struct gmap *, unsigned long start,</div><div class='ctx'> </div><div class='ctx'> void gmap_sync_dirty_log_pmd(struct gmap *gmap, unsigned long dirty_bitmap[4],</div><div class='ctx'> 			     unsigned long gaddr, unsigned long vmaddr);</div><div class='del'>-int gmap_mark_unmergeable(void);</div><div class='add'>+int s390_disable_cow_sharing(void);</div><div class='ctx'> void s390_unlist_old_asce(struct gmap *gmap);</div><div class='ctx'> int s390_replace_asce(struct gmap *gmap);</div><div class='ctx'> void s390_uv_destroy_pfns(unsigned long count, unsigned long *pfns);</div><div class='head'>diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h<br/>index bb1b4bef1878..4c2dc7abc285 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/mmu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/mmu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/mmu.h</a></div><div class='hunk'>@@ -32,6 +32,11 @@ typedef struct {</div><div class='ctx'> 	unsigned int uses_skeys:1;</div><div class='ctx'> 	/* The mmu context uses CMM. */</div><div class='ctx'> 	unsigned int uses_cmm:1;</div><div class='add'>+	/*</div><div class='add'>+	 * The mmu context allows COW-sharing of memory pages (KSM, zeropage).</div><div class='add'>+	 * Note that COW-sharing during fork() is currently always allowed.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int allow_cow_sharing:1;</div><div class='ctx'> 	/* The gmaps associated with this context are allowed to use huge pages. */</div><div class='ctx'> 	unsigned int allow_gmap_hpage_1m:1;</div><div class='ctx'> } mm_context_t;</div><div class='head'>diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h<br/>index 929af18b0908..a7789a9f6218 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/mmu_context.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/mmu_context.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -35,6 +35,7 @@ static inline int init_new_context(struct task_struct *tsk,</div><div class='ctx'> 	mm-&gt;context.has_pgste = 0;</div><div class='ctx'> 	mm-&gt;context.uses_skeys = 0;</div><div class='ctx'> 	mm-&gt;context.uses_cmm = 0;</div><div class='add'>+	mm-&gt;context.allow_cow_sharing = 1;</div><div class='ctx'> 	mm-&gt;context.allow_gmap_hpage_1m = 0;</div><div class='ctx'> #endif</div><div class='ctx'> 	switch (mm-&gt;context.asce_limit) {</div><div class='head'>diff --git a/arch/s390/include/asm/nospec-branch.h b/arch/s390/include/asm/nospec-branch.h<br/>index 82725cf783c7..b9c1f3cae842 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/nospec-branch.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/nospec-branch.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/nospec-branch.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/nospec-branch.h</a></div><div class='hunk'>@@ -17,6 +17,26 @@ static inline bool nospec_uses_trampoline(void)</div><div class='ctx'> 	return __is_defined(CC_USING_EXPOLINE) &amp;&amp; !nospec_disable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_EXPOLINE_EXTERN</div><div class='add'>+</div><div class='add'>+void __s390_indirect_jump_r1(void);</div><div class='add'>+void __s390_indirect_jump_r2(void);</div><div class='add'>+void __s390_indirect_jump_r3(void);</div><div class='add'>+void __s390_indirect_jump_r4(void);</div><div class='add'>+void __s390_indirect_jump_r5(void);</div><div class='add'>+void __s390_indirect_jump_r6(void);</div><div class='add'>+void __s390_indirect_jump_r7(void);</div><div class='add'>+void __s390_indirect_jump_r8(void);</div><div class='add'>+void __s390_indirect_jump_r9(void);</div><div class='add'>+void __s390_indirect_jump_r10(void);</div><div class='add'>+void __s390_indirect_jump_r11(void);</div><div class='add'>+void __s390_indirect_jump_r12(void);</div><div class='add'>+void __s390_indirect_jump_r13(void);</div><div class='add'>+void __s390_indirect_jump_r14(void);</div><div class='add'>+void __s390_indirect_jump_r15(void);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_S390_EXPOLINE_H */</div><div class='head'>diff --git a/arch/s390/include/asm/nospec-insn.h b/arch/s390/include/asm/nospec-insn.h<br/>index 7a946c42ad13..cb15dd25bf21 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/nospec-insn.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/nospec-insn.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/nospec-insn.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/nospec-insn.h</a></div><div class='hunk'>@@ -16,24 +16,25 @@</div><div class='ctx'>  */</div><div class='ctx'> 	.macro __THUNK_PROLOG_NAME name</div><div class='ctx'> #ifdef CONFIG_EXPOLINE_EXTERN</div><div class='del'>-	.pushsection .text,"ax",@progbits</div><div class='del'>-	__ALIGN</div><div class='add'>+	SYM_CODE_START(\name)</div><div class='ctx'> #else</div><div class='ctx'> 	.pushsection .text.\name,"axG",@progbits,\name,comdat</div><div class='del'>-#endif</div><div class='ctx'> 	.globl \name</div><div class='ctx'> 	.hidden \name</div><div class='ctx'> 	.type \name,@function</div><div class='ctx'> \name:</div><div class='ctx'> 	CFI_STARTPROC</div><div class='add'>+#endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro __THUNK_EPILOG_NAME name</div><div class='del'>-	CFI_ENDPROC</div><div class='ctx'> #ifdef CONFIG_EXPOLINE_EXTERN</div><div class='del'>-	.size \name, .-\name</div><div class='del'>-#endif</div><div class='add'>+	SYM_CODE_END(\name)</div><div class='add'>+	EXPORT_SYMBOL(\name)</div><div class='add'>+#else</div><div class='add'>+	CFI_ENDPROC</div><div class='ctx'> 	.popsection</div><div class='add'>+#endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro __THUNK_PROLOG_BR r1</div><div class='head'>diff --git a/arch/s390/include/asm/os_info.h b/arch/s390/include/asm/os_info.h<br/>index a4d2e103f116..3ee9e8f5ceae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/os_info.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/os_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/os_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/os_info.h</a></div><div class='hunk'>@@ -17,11 +17,25 @@</div><div class='ctx'> #define OS_INFO_VMCOREINFO	0</div><div class='ctx'> #define OS_INFO_REIPL_BLOCK	1</div><div class='ctx'> #define OS_INFO_FLAGS_ENTRY	2</div><div class='add'>+#define OS_INFO_RESERVED	3</div><div class='add'>+#define OS_INFO_IDENTITY_BASE	4</div><div class='add'>+#define OS_INFO_KASLR_OFFSET	5</div><div class='add'>+#define OS_INFO_KASLR_OFF_PHYS	6</div><div class='add'>+#define OS_INFO_VMEMMAP		7</div><div class='add'>+#define OS_INFO_AMODE31_START	8</div><div class='add'>+#define OS_INFO_AMODE31_END	9</div><div class='add'>+#define OS_INFO_IMAGE_START	10</div><div class='add'>+#define OS_INFO_IMAGE_END	11</div><div class='add'>+#define OS_INFO_IMAGE_PHYS	12</div><div class='add'>+#define OS_INFO_MAX		13</div><div class='ctx'> </div><div class='ctx'> #define OS_INFO_FLAG_REIPL_CLEAR	(1UL &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> struct os_info_entry {</div><div class='del'>-	u64	addr;</div><div class='add'>+	union {</div><div class='add'>+		u64	addr;</div><div class='add'>+		u64	val;</div><div class='add'>+	};</div><div class='ctx'> 	u64	size;</div><div class='ctx'> 	u32	csum;</div><div class='ctx'> } __packed;</div><div class='hunk'>@@ -33,17 +47,24 @@ struct os_info {</div><div class='ctx'> 	u16	version_minor;</div><div class='ctx'> 	u64	crashkernel_addr;</div><div class='ctx'> 	u64	crashkernel_size;</div><div class='del'>-	struct os_info_entry entry[3];</div><div class='del'>-	u8	reserved[4004];</div><div class='add'>+	struct os_info_entry entry[OS_INFO_MAX];</div><div class='add'>+	u8	reserved[3804];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> void os_info_init(void);</div><div class='del'>-void os_info_entry_add(int nr, void *ptr, u64 len);</div><div class='add'>+void os_info_entry_add_data(int nr, void *ptr, u64 len);</div><div class='add'>+void os_info_entry_add_val(int nr, u64 val);</div><div class='ctx'> void os_info_crashkernel_add(unsigned long base, unsigned long size);</div><div class='ctx'> u32 os_info_csum(struct os_info *os_info);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> void *os_info_old_entry(int nr, unsigned long *size);</div><div class='add'>+static inline unsigned long os_info_old_value(int nr)</div><div class='add'>+{</div><div class='add'>+	unsigned long size;</div><div class='add'>+</div><div class='add'>+	return (unsigned long)os_info_old_entry(nr, &amp;size);</div><div class='add'>+}</div><div class='ctx'> #else</div><div class='ctx'> static inline void *os_info_old_entry(int nr, unsigned long *size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h<br/>index 9381879f7ecf..224ff9d433ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/page.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/page.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/page.h</a></div><div class='hunk'>@@ -178,19 +178,52 @@ int arch_make_page_accessible(struct page *page);</div><div class='ctx'> #define HAVE_ARCH_MAKE_PAGE_ACCESSIBLE</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define __PAGE_OFFSET		0x0UL</div><div class='del'>-#define PAGE_OFFSET		0x0UL</div><div class='add'>+struct vm_layout {</div><div class='add'>+	unsigned long kaslr_offset;</div><div class='add'>+	unsigned long kaslr_offset_phys;</div><div class='add'>+	unsigned long identity_base;</div><div class='add'>+	unsigned long identity_size;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-#define __pa_nodebug(x)		((unsigned long)(x))</div><div class='add'>+extern struct vm_layout vm_layout;</div><div class='add'>+</div><div class='add'>+#define __kaslr_offset		vm_layout.kaslr_offset</div><div class='add'>+#define __kaslr_offset_phys	vm_layout.kaslr_offset_phys</div><div class='add'>+#define __identity_base		vm_layout.identity_base</div><div class='add'>+#define ident_map_size		vm_layout.identity_size</div><div class='add'>+</div><div class='add'>+static inline unsigned long kaslr_offset(void)</div><div class='add'>+{</div><div class='add'>+	return __kaslr_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern int __kaslr_enabled;</div><div class='add'>+static inline int kaslr_enabled(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))</div><div class='add'>+		return __kaslr_enabled;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __PAGE_OFFSET		__identity_base</div><div class='add'>+#define PAGE_OFFSET		__PAGE_OFFSET</div><div class='ctx'> </div><div class='ctx'> #ifdef __DECOMPRESSOR</div><div class='ctx'> </div><div class='add'>+#define __pa_nodebug(x)		((unsigned long)(x))</div><div class='ctx'> #define __pa(x)			__pa_nodebug(x)</div><div class='ctx'> #define __pa32(x)		__pa(x)</div><div class='ctx'> #define __va(x)			((void *)(unsigned long)(x))</div><div class='ctx'> </div><div class='ctx'> #else /* __DECOMPRESSOR */</div><div class='ctx'> </div><div class='add'>+static inline unsigned long __pa_nodebug(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	if (x &lt; __kaslr_offset)</div><div class='add'>+		return x - __identity_base;</div><div class='add'>+	return x - __kaslr_offset + __kaslr_offset_phys;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DEBUG_VIRTUAL</div><div class='ctx'> </div><div class='ctx'> unsigned long __phys_addr(unsigned long x, bool is_31bit);</div><div class='hunk'>@@ -206,7 +239,7 @@ static inline unsigned long __phys_addr(unsigned long x, bool is_31bit)</div><div class='ctx'> </div><div class='ctx'> #define __pa(x)			__phys_addr((unsigned long)(x), false)</div><div class='ctx'> #define __pa32(x)		__phys_addr((unsigned long)(x), true)</div><div class='del'>-#define __va(x)			((void *)(unsigned long)(x))</div><div class='add'>+#define __va(x)			((void *)((unsigned long)(x) + __identity_base))</div><div class='ctx'> </div><div class='ctx'> #endif /* __DECOMPRESSOR */</div><div class='ctx'> </div><div class='hunk'>@@ -231,7 +264,7 @@ static inline unsigned long virt_to_pfn(const void *kaddr)</div><div class='ctx'> #define virt_to_page(kaddr)	pfn_to_page(virt_to_pfn(kaddr))</div><div class='ctx'> #define page_to_virt(page)	pfn_to_virt(page_to_pfn(page))</div><div class='ctx'> </div><div class='del'>-#define virt_addr_valid(kaddr)	pfn_valid(phys_to_pfn(__pa_nodebug(kaddr)))</div><div class='add'>+#define virt_addr_valid(kaddr)	pfn_valid(phys_to_pfn(__pa_nodebug((unsigned long)(kaddr))))</div><div class='ctx'> </div><div class='ctx'> #define VM_DATA_DEFAULT_FLAGS	VM_DATA_FLAGS_NON_EXEC</div><div class='ctx'> </div><div class='hunk'>@@ -240,4 +273,11 @@ static inline unsigned long virt_to_pfn(const void *kaddr)</div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='ctx'> </div><div class='add'>+#define AMODE31_SIZE		(3 * PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define KERNEL_IMAGE_SIZE	(512 * 1024 * 1024)</div><div class='add'>+#define __START_KERNEL		0x100000</div><div class='add'>+#define __NO_KASLR_START_KERNEL	CONFIG_KERNEL_IMAGE_BASE</div><div class='add'>+#define __NO_KASLR_END_KERNEL	(__NO_KASLR_START_KERNEL + KERNEL_IMAGE_SIZE)</div><div class='add'>+</div><div class='ctx'> #endif /* _S390_PAGE_H */</div><div class='head'>diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h<br/>index 60950e7a25f5..6f11d063d545 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/pgtable.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/pgtable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/pgtable.h</a></div><div class='hunk'>@@ -107,6 +107,12 @@ static inline int is_module_addr(void *addr)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RANDOMIZE_BASE</div><div class='add'>+#define KASLR_LEN	(1UL &lt;&lt; 31)</div><div class='add'>+#else</div><div class='add'>+#define KASLR_LEN	0UL</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * A 64 bit pagetable entry of S390 has following format:</div><div class='ctx'>  * |			 PFRA			      |0IPC|  OS  |</div><div class='hunk'>@@ -566,10 +572,20 @@ static inline pud_t set_pud_bit(pud_t pud, pgprot_t prot)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * In the case that a guest uses storage keys</div><div class='del'>- * faults should no longer be backed by zero pages</div><div class='add'>+ * As soon as the guest uses storage keys or enables PV, we deduplicate all</div><div class='add'>+ * mapped shared zeropages and prevent new shared zeropages from getting</div><div class='add'>+ * mapped.</div><div class='ctx'>  */</div><div class='del'>-#define mm_forbids_zeropage mm_has_pgste</div><div class='add'>+#define mm_forbids_zeropage mm_forbids_zeropage</div><div class='add'>+static inline int mm_forbids_zeropage(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_PGSTE</div><div class='add'>+	if (!mm-&gt;context.allow_cow_sharing)</div><div class='add'>+		return 1;</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int mm_uses_skeys(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_PGSTE</div><div class='head'>diff --git a/arch/s390/include/asm/physmem_info.h b/arch/s390/include/asm/physmem_info.h<br/>index e747b067f8db..f45cfc8bc233 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/physmem_info.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/physmem_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/physmem_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/physmem_info.h</a></div><div class='hunk'>@@ -22,7 +22,6 @@ enum reserved_range_type {</div><div class='ctx'> 	RR_DECOMPRESSOR,</div><div class='ctx'> 	RR_INITRD,</div><div class='ctx'> 	RR_VMLINUX,</div><div class='del'>-	RR_RELOC,</div><div class='ctx'> 	RR_AMODE31,</div><div class='ctx'> 	RR_IPLREPORT,</div><div class='ctx'> 	RR_CERT_COMP_LIST,</div><div class='hunk'>@@ -170,4 +169,7 @@ static inline unsigned long get_physmem_reserved(enum reserved_range_type type,</div><div class='ctx'> 	return *size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define AMODE31_START	(physmem_info.reserved[RR_AMODE31].start)</div><div class='add'>+#define AMODE31_END	(physmem_info.reserved[RR_AMODE31].end)</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h<br/>index 03bcaa8effb2..32f70873e2b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/setup.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/setup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/setup.h</a></div><div class='hunk'>@@ -127,20 +127,6 @@ extern void (*_machine_restart)(char *command);</div><div class='ctx'> extern void (*_machine_halt)(void);</div><div class='ctx'> extern void (*_machine_power_off)(void);</div><div class='ctx'> </div><div class='del'>-extern unsigned long __kaslr_offset;</div><div class='del'>-static inline unsigned long kaslr_offset(void)</div><div class='del'>-{</div><div class='del'>-	return __kaslr_offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern int __kaslr_enabled;</div><div class='del'>-static inline int kaslr_enabled(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))</div><div class='del'>-		return __kaslr_enabled;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct oldmem_data {</div><div class='ctx'> 	unsigned long start;</div><div class='ctx'> 	unsigned long size;</div><div class='head'>diff --git a/arch/s390/include/asm/vdso/gettimeofday.h b/arch/s390/include/asm/vdso/gettimeofday.h<br/>index db84942eb78f..7937765ccfa5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -6,16 +6,13 @@</div><div class='ctx'> </div><div class='ctx'> #define VDSO_HAS_CLOCK_GETRES 1</div><div class='ctx'> </div><div class='add'>+#define VDSO_DELTA_NOMASK 1</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/syscall.h&gt;</div><div class='ctx'> #include &lt;asm/timex.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> </div><div class='del'>-#define vdso_calc_delta __arch_vdso_calc_delta</div><div class='del'>-static __always_inline u64 __arch_vdso_calc_delta(u64 cycles, u64 last, u64 mask, u32 mult)</div><div class='del'>-{</div><div class='del'>-	return (cycles - last) * mult;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static __always_inline const struct vdso_data *__arch_get_vdso_data(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/s390/include/asm/vtime.h b/arch/s390/include/asm/vtime.h<br/>index fe17e448c0c5..561c91c1a87c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/vtime.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/include/asm/vtime.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/vtime.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/include/asm/vtime.h</a></div><div class='hunk'>@@ -2,8 +2,6 @@</div><div class='ctx'> #ifndef _S390_VTIME_H</div><div class='ctx'> #define _S390_VTIME_H</div><div class='ctx'> </div><div class='del'>-#define __ARCH_HAS_VTIME_TASK_SWITCH</div><div class='del'>-</div><div class='ctx'> static inline void update_timer_sys(void)</div><div class='ctx'> {</div><div class='ctx'> 	S390_lowcore.system_timer += S390_lowcore.last_update_timer - S390_lowcore.exit_timer;</div><div class='head'>diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile<br/>index fa029d0dc28f..db2d9ba5a86d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/Makefile</a></div><div class='hunk'>@@ -11,6 +11,8 @@ CFLAGS_REMOVE_ftrace.o		= $(CC_FLAGS_FTRACE)</div><div class='ctx'> # Do not trace early setup code</div><div class='ctx'> CFLAGS_REMOVE_early.o		= $(CC_FLAGS_FTRACE)</div><div class='ctx'> CFLAGS_REMOVE_rethook.o		= $(CC_FLAGS_FTRACE)</div><div class='add'>+CFLAGS_REMOVE_stacktrace.o	= $(CC_FLAGS_FTRACE)</div><div class='add'>+CFLAGS_REMOVE_unwind_bc.o	= $(CC_FLAGS_FTRACE)</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/crash_dump.c b/arch/s390/kernel/crash_dump.c<br/>index d09ebb6f5262..9863ebe75019 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/crash_dump.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/crash_dump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/crash_dump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/crash_dump.c</a></div><div class='hunk'>@@ -465,7 +465,11 @@ static void *ehdr_init(Elf64_Ehdr *ehdr, int mem_chunk_cnt)</div><div class='ctx'> 	ehdr-&gt;e_phoff = sizeof(Elf64_Ehdr);</div><div class='ctx'> 	ehdr-&gt;e_ehsize = sizeof(Elf64_Ehdr);</div><div class='ctx'> 	ehdr-&gt;e_phentsize = sizeof(Elf64_Phdr);</div><div class='del'>-	ehdr-&gt;e_phnum = mem_chunk_cnt + 1;</div><div class='add'>+	/*</div><div class='add'>+	 * Number of memory chunk PT_LOAD program headers plus one kernel</div><div class='add'>+	 * image PT_LOAD program header plus one PT_NOTE program header.</div><div class='add'>+	 */</div><div class='add'>+	ehdr-&gt;e_phnum = mem_chunk_cnt + 1 + 1;</div><div class='ctx'> 	return ehdr + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -501,15 +505,16 @@ static int get_mem_chunk_cnt(void)</div><div class='ctx'>  */</div><div class='ctx'> static void loads_init(Elf64_Phdr *phdr)</div><div class='ctx'> {</div><div class='add'>+	unsigned long old_identity_base = os_info_old_value(OS_INFO_IDENTITY_BASE);</div><div class='ctx'> 	phys_addr_t start, end;</div><div class='ctx'> 	u64 idx;</div><div class='ctx'> </div><div class='ctx'> 	for_each_physmem_range(idx, &amp;oldmem_type, &amp;start, &amp;end) {</div><div class='del'>-		phdr-&gt;p_filesz = end - start;</div><div class='ctx'> 		phdr-&gt;p_type = PT_LOAD;</div><div class='add'>+		phdr-&gt;p_vaddr = old_identity_base + start;</div><div class='ctx'> 		phdr-&gt;p_offset = start;</div><div class='del'>-		phdr-&gt;p_vaddr = (unsigned long)__va(start);</div><div class='ctx'> 		phdr-&gt;p_paddr = start;</div><div class='add'>+		phdr-&gt;p_filesz = end - start;</div><div class='ctx'> 		phdr-&gt;p_memsz = end - start;</div><div class='ctx'> 		phdr-&gt;p_flags = PF_R | PF_W | PF_X;</div><div class='ctx'> 		phdr-&gt;p_align = PAGE_SIZE;</div><div class='hunk'>@@ -518,6 +523,25 @@ static void loads_init(Elf64_Phdr *phdr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Prepare PT_LOAD type program header for kernel image region</div><div class='add'>+ */</div><div class='add'>+static void text_init(Elf64_Phdr *phdr)</div><div class='add'>+{</div><div class='add'>+	unsigned long start_phys = os_info_old_value(OS_INFO_IMAGE_PHYS);</div><div class='add'>+	unsigned long start = os_info_old_value(OS_INFO_IMAGE_START);</div><div class='add'>+	unsigned long end = os_info_old_value(OS_INFO_IMAGE_END);</div><div class='add'>+</div><div class='add'>+	phdr-&gt;p_type = PT_LOAD;</div><div class='add'>+	phdr-&gt;p_vaddr = start;</div><div class='add'>+	phdr-&gt;p_filesz = end - start;</div><div class='add'>+	phdr-&gt;p_memsz = end - start;</div><div class='add'>+	phdr-&gt;p_offset = start_phys;</div><div class='add'>+	phdr-&gt;p_paddr = start_phys;</div><div class='add'>+	phdr-&gt;p_flags = PF_R | PF_W | PF_X;</div><div class='add'>+	phdr-&gt;p_align = PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Initialize notes (new kernel)</div><div class='ctx'>  */</div><div class='ctx'> static void *notes_init(Elf64_Phdr *phdr, void *ptr, u64 notes_offset)</div><div class='hunk'>@@ -557,6 +581,8 @@ static size_t get_elfcorehdr_size(int mem_chunk_cnt)</div><div class='ctx'> 	size += nt_vmcoreinfo_size();</div><div class='ctx'> 	/* nt_final */</div><div class='ctx'> 	size += sizeof(Elf64_Nhdr);</div><div class='add'>+	/* PT_LOAD type program header for kernel text region */</div><div class='add'>+	size += sizeof(Elf64_Phdr);</div><div class='ctx'> 	/* PT_LOADS */</div><div class='ctx'> 	size += mem_chunk_cnt * sizeof(Elf64_Phdr);</div><div class='ctx'> </div><div class='hunk'>@@ -568,7 +594,7 @@ static size_t get_elfcorehdr_size(int mem_chunk_cnt)</div><div class='ctx'>  */</div><div class='ctx'> int elfcorehdr_alloc(unsigned long long *addr, unsigned long long *size)</div><div class='ctx'> {</div><div class='del'>-	Elf64_Phdr *phdr_notes, *phdr_loads;</div><div class='add'>+	Elf64_Phdr *phdr_notes, *phdr_loads, *phdr_text;</div><div class='ctx'> 	size_t alloc_size;</div><div class='ctx'> 	int mem_chunk_cnt;</div><div class='ctx'> 	void *ptr, *hdr;</div><div class='hunk'>@@ -606,14 +632,19 @@ int elfcorehdr_alloc(unsigned long long *addr, unsigned long long *size)</div><div class='ctx'> 	/* Init program headers */</div><div class='ctx'> 	phdr_notes = ptr;</div><div class='ctx'> 	ptr = PTR_ADD(ptr, sizeof(Elf64_Phdr));</div><div class='add'>+	phdr_text = ptr;</div><div class='add'>+	ptr = PTR_ADD(ptr, sizeof(Elf64_Phdr));</div><div class='ctx'> 	phdr_loads = ptr;</div><div class='ctx'> 	ptr = PTR_ADD(ptr, sizeof(Elf64_Phdr) * mem_chunk_cnt);</div><div class='ctx'> 	/* Init notes */</div><div class='ctx'> 	hdr_off = PTR_DIFF(ptr, hdr);</div><div class='ctx'> 	ptr = notes_init(phdr_notes, ptr, ((unsigned long) hdr) + hdr_off);</div><div class='add'>+	/* Init kernel text program header */</div><div class='add'>+	text_init(phdr_text);</div><div class='ctx'> 	/* Init loads */</div><div class='del'>-	hdr_off = PTR_DIFF(ptr, hdr);</div><div class='ctx'> 	loads_init(phdr_loads);</div><div class='add'>+	/* Finalize program headers */</div><div class='add'>+	hdr_off = PTR_DIFF(ptr, hdr);</div><div class='ctx'> 	*addr = (unsigned long long) hdr;</div><div class='ctx'> 	*size = (unsigned long long) hdr_off;</div><div class='ctx'> 	BUG_ON(elfcorehdr_size &gt; alloc_size);</div><div class='head'>diff --git a/arch/s390/kernel/ftrace.c b/arch/s390/kernel/ftrace.c<br/>index c46381ea04ec..798249ef5646 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/ftrace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/ftrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/ftrace.c</a></div><div class='hunk'>@@ -7,13 +7,13 @@</div><div class='ctx'>  *   Author(s): Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> #include &lt;trace/syscall.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/text-patching.h&gt;</div><div class='hunk'>@@ -220,7 +220,7 @@ static int __init ftrace_plt_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *start, *end;</div><div class='ctx'> </div><div class='del'>-	ftrace_plt = module_alloc(PAGE_SIZE);</div><div class='add'>+	ftrace_plt = execmem_alloc(EXECMEM_FTRACE, PAGE_SIZE);</div><div class='ctx'> 	if (!ftrace_plt)</div><div class='ctx'> 		panic("cannot allocate ftrace plt\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c<br/>index 1486350a4177..7dc54571f18e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/ipl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/ipl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/ipl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/ipl.c</a></div><div class='hunk'>@@ -1209,8 +1209,8 @@ static struct attribute_group reipl_nss_attr_group = {</div><div class='ctx'> </div><div class='ctx'> void set_os_info_reipl_block(void)</div><div class='ctx'> {</div><div class='del'>-	os_info_entry_add(OS_INFO_REIPL_BLOCK, reipl_block_actual,</div><div class='del'>-			  reipl_block_actual-&gt;hdr.len);</div><div class='add'>+	os_info_entry_add_data(OS_INFO_REIPL_BLOCK, reipl_block_actual,</div><div class='add'>+			       reipl_block_actual-&gt;hdr.len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* reipl type */</div><div class='hunk'>@@ -1940,7 +1940,7 @@ static void dump_reipl_run(struct shutdown_trigger *trigger)</div><div class='ctx'> 	    reipl_type == IPL_TYPE_NSS ||</div><div class='ctx'> 	    reipl_type == IPL_TYPE_UNKNOWN)</div><div class='ctx'> 		os_info_flags |= OS_INFO_FLAG_REIPL_CLEAR;</div><div class='del'>-	os_info_entry_add(OS_INFO_FLAGS_ENTRY, &amp;os_info_flags, sizeof(os_info_flags));</div><div class='add'>+	os_info_entry_add_data(OS_INFO_FLAGS_ENTRY, &amp;os_info_flags, sizeof(os_info_flags));</div><div class='ctx'> 	csum = (__force unsigned int)cksm(reipl_block_actual, reipl_block_actual-&gt;hdr.len, 0);</div><div class='ctx'> 	abs_lc = get_abs_lowcore();</div><div class='ctx'> 	abs_lc-&gt;ipib = __pa(reipl_block_actual);</div><div class='head'>diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c<br/>index 6f71b0ce1068..259496fe0ef9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/irq.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='ctx'> #include &lt;asm/softirq_stack.h&gt;</div><div class='add'>+#include &lt;asm/vtime.h&gt;</div><div class='ctx'> #include "entry.h"</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);</div><div class='head'>diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c<br/>index f0cf20d4b3c5..3c1b1be744de 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/kprobes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/kprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/kprobes.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "kprobes: " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/preempt.h&gt;</div><div class='hunk'>@@ -21,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/dis.h&gt;</div><div class='hunk'>@@ -38,7 +38,7 @@ void *alloc_insn_page(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *page;</div><div class='ctx'> </div><div class='del'>-	page = module_alloc(PAGE_SIZE);</div><div class='add'>+	page = execmem_alloc(EXECMEM_KPROBES, PAGE_SIZE);</div><div class='ctx'> 	if (!page)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	set_memory_rox((unsigned long)page, 1);</div><div class='head'>diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c<br/>index 42215f9404af..91e207b50394 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/module.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/nospec-branch.h&gt;</div><div class='ctx'> #include &lt;asm/facility.h&gt;</div><div class='hunk'>@@ -36,47 +37,10 @@</div><div class='ctx'> </div><div class='ctx'> #define PLT_ENTRY_SIZE 22</div><div class='ctx'> </div><div class='del'>-static unsigned long get_module_load_offset(void)</div><div class='del'>-{</div><div class='del'>-	static DEFINE_MUTEX(module_kaslr_mutex);</div><div class='del'>-	static unsigned long module_load_offset;</div><div class='del'>-</div><div class='del'>-	if (!kaslr_enabled())</div><div class='del'>-		return 0;</div><div class='del'>-	/*</div><div class='del'>-	 * Calculate the module_load_offset the first time this code</div><div class='del'>-	 * is called. Once calculated it stays the same until reboot.</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;module_kaslr_mutex);</div><div class='del'>-	if (!module_load_offset)</div><div class='del'>-		module_load_offset = get_random_u32_inclusive(1, 1024) * PAGE_SIZE;</div><div class='del'>-	mutex_unlock(&amp;module_kaslr_mutex);</div><div class='del'>-	return module_load_offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	gfp_t gfp_mask = GFP_KERNEL;</div><div class='del'>-	void *p;</div><div class='del'>-</div><div class='del'>-	if (PAGE_ALIGN(size) &gt; MODULES_LEN)</div><div class='del'>-		return NULL;</div><div class='del'>-	p = __vmalloc_node_range(size, MODULE_ALIGN,</div><div class='del'>-				 MODULES_VADDR + get_module_load_offset(),</div><div class='del'>-				 MODULES_END, gfp_mask, PAGE_KERNEL,</div><div class='del'>-				 VM_FLUSH_RESET_PERMS | VM_DEFER_KMEMLEAK,</div><div class='del'>-				 NUMA_NO_NODE, __builtin_return_address(0));</div><div class='del'>-	if (p &amp;&amp; (kasan_alloc_module_shadow(p, size, gfp_mask) &lt; 0)) {</div><div class='del'>-		vfree(p);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	return p;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'> void module_arch_cleanup(struct module *mod)</div><div class='ctx'> {</div><div class='del'>-	module_memfree(mod-&gt;arch.trampolines_start);</div><div class='add'>+	execmem_free(mod-&gt;arch.trampolines_start);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -510,7 +474,7 @@ static int module_alloc_ftrace_hotpatch_trampolines(struct module *me,</div><div class='ctx'> </div><div class='ctx'> 	size = FTRACE_HOTPATCH_TRAMPOLINES_SIZE(s-&gt;sh_size);</div><div class='ctx'> 	numpages = DIV_ROUND_UP(size, PAGE_SIZE);</div><div class='del'>-	start = module_alloc(numpages * PAGE_SIZE);</div><div class='add'>+	start = execmem_alloc(EXECMEM_FTRACE, numpages * PAGE_SIZE);</div><div class='ctx'> 	if (!start)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	set_memory_rox((unsigned long)start, numpages);</div><div class='head'>diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c<br/>index c77382a67325..230d010bac9b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/nmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/nmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/nmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/nmi.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;asm/crw.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/pai.h&gt;</div><div class='add'>+#include &lt;asm/vtime.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct mcck_struct {</div><div class='ctx'> 	unsigned int kill_task : 1;</div><div class='head'>diff --git a/arch/s390/kernel/nospec-branch.c b/arch/s390/kernel/nospec-branch.c<br/>index d1b16d83e49a..9b8c24ebb008 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/nospec-branch.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/nospec-branch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/nospec-branch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/nospec-branch.c</a></div><div class='hunk'>@@ -114,10 +114,10 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)</div><div class='ctx'> 			type = BRASL_EXPOLINE;	/* brasl instruction */</div><div class='ctx'> 		else</div><div class='ctx'> 			continue;</div><div class='del'>-		thunk = instr + (*(int *)(instr + 2)) * 2;</div><div class='add'>+		thunk = instr + (long)(*(int *)(instr + 2)) * 2;</div><div class='ctx'> 		if (thunk[0] == 0xc6 &amp;&amp; thunk[1] == 0x00)</div><div class='ctx'> 			/* exrl %r0,&lt;target-br&gt; */</div><div class='del'>-			br = thunk + (*(int *)(thunk + 2)) * 2;</div><div class='add'>+			br = thunk + (long)(*(int *)(thunk + 2)) * 2;</div><div class='ctx'> 		else</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (br[0] != 0x07 || (br[1] &amp; 0xf0) != 0xf0)</div><div class='head'>diff --git a/arch/s390/kernel/os_info.c b/arch/s390/kernel/os_info.c<br/>index a801e6bd5341..b695f980bbde 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/os_info.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/os_info.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/os_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/os_info.c</a></div><div class='hunk'>@@ -15,8 +15,10 @@</div><div class='ctx'> #include &lt;asm/checksum.h&gt;</div><div class='ctx'> #include &lt;asm/abs_lowcore.h&gt;</div><div class='ctx'> #include &lt;asm/os_info.h&gt;</div><div class='add'>+#include &lt;asm/physmem_info.h&gt;</div><div class='ctx'> #include &lt;asm/maccess.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/ipl.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * OS info structure has to be page aligned</div><div class='hunk'>@@ -43,9 +45,9 @@ void os_info_crashkernel_add(unsigned long base, unsigned long size)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Add OS info entry and update checksum</div><div class='add'>+ * Add OS info data entry and update checksum</div><div class='ctx'>  */</div><div class='del'>-void os_info_entry_add(int nr, void *ptr, u64 size)</div><div class='add'>+void os_info_entry_add_data(int nr, void *ptr, u64 size)</div><div class='ctx'> {</div><div class='ctx'> 	os_info.entry[nr].addr = __pa(ptr);</div><div class='ctx'> 	os_info.entry[nr].size = size;</div><div class='hunk'>@@ -54,15 +56,36 @@ void os_info_entry_add(int nr, void *ptr, u64 size)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Add OS info value entry and update checksum</div><div class='add'>+ */</div><div class='add'>+void os_info_entry_add_val(int nr, u64 value)</div><div class='add'>+{</div><div class='add'>+	os_info.entry[nr].val = value;</div><div class='add'>+	os_info.entry[nr].size = 0;</div><div class='add'>+	os_info.entry[nr].csum = 0;</div><div class='add'>+	os_info.csum = os_info_csum(&amp;os_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Initialize OS info structure and set lowcore pointer</div><div class='ctx'>  */</div><div class='ctx'> void __init os_info_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct lowcore *abs_lc;</div><div class='ctx'> </div><div class='add'>+	BUILD_BUG_ON(sizeof(struct os_info) != PAGE_SIZE);</div><div class='ctx'> 	os_info.version_major = OS_INFO_VERSION_MAJOR;</div><div class='ctx'> 	os_info.version_minor = OS_INFO_VERSION_MINOR;</div><div class='ctx'> 	os_info.magic = OS_INFO_MAGIC;</div><div class='add'>+	os_info_entry_add_val(OS_INFO_IDENTITY_BASE, __identity_base);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_KASLR_OFFSET, kaslr_offset());</div><div class='add'>+	os_info_entry_add_val(OS_INFO_KASLR_OFF_PHYS, __kaslr_offset_phys);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_VMEMMAP, (unsigned long)vmemmap);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_AMODE31_START, AMODE31_START);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_AMODE31_END, AMODE31_END);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_IMAGE_START, (unsigned long)_stext);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_IMAGE_END, (unsigned long)_end);</div><div class='add'>+	os_info_entry_add_val(OS_INFO_IMAGE_PHYS, __pa_symbol(_stext));</div><div class='ctx'> 	os_info.csum = os_info_csum(&amp;os_info);</div><div class='ctx'> 	abs_lc = get_abs_lowcore();</div><div class='ctx'> 	abs_lc-&gt;os_info = __pa(&amp;os_info);</div><div class='hunk'>@@ -125,7 +148,7 @@ static void os_info_old_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (os_info_init)</div><div class='ctx'> 		return;</div><div class='del'>-	if (!oldmem_data.start)</div><div class='add'>+	if (!oldmem_data.start &amp;&amp; !is_ipl_type_dump())</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	if (copy_oldmem_kernel(&amp;addr, __LC_OS_INFO, sizeof(addr)))</div><div class='ctx'> 		goto fail;</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c<br/>index 41ed6e0f0a2a..1434642e9cba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/perf_cpum_cf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/perf_cpum_cf.c</a></div><div class='hunk'>@@ -428,7 +428,7 @@ static void cpum_cf_make_setsize(enum cpumf_ctr_set ctrset)</div><div class='ctx'> 	case CPUMF_CTR_SET_CRYPTO:</div><div class='ctx'> 		if (cpumf_ctr_info.csvn &gt;= 1 &amp;&amp; cpumf_ctr_info.csvn &lt;= 5)</div><div class='ctx'> 			ctrset_size = 16;</div><div class='del'>-		else if (cpumf_ctr_info.csvn == 6 || cpumf_ctr_info.csvn == 7)</div><div class='add'>+		else if (cpumf_ctr_info.csvn &gt;= 6)</div><div class='ctx'> 			ctrset_size = 20;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CPUMF_CTR_SET_EXT:</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_cf_events.c b/arch/s390/kernel/perf_cpum_cf_events.c<br/>index 0d64aafd158f..e4a6bfc91080 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf_events.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/perf_cpum_cf_events.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf_events.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/perf_cpum_cf_events.c</a></div><div class='hunk'>@@ -855,16 +855,11 @@ __init const struct attribute_group **cpumf_cf_event_group(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Determine version specific crypto set */</div><div class='del'>-	switch (ci.csvn) {</div><div class='del'>-	case 1 ... 5:</div><div class='add'>+	csvn = none;</div><div class='add'>+	if (ci.csvn &gt;= 1 &amp;&amp; ci.csvn &lt;= 5)</div><div class='ctx'> 		csvn = cpumcf_svn_12345_pmu_event_attr;</div><div class='del'>-		break;</div><div class='del'>-	case 6 ... 7:</div><div class='add'>+	else if (ci.csvn &gt;= 6)</div><div class='ctx'> 		csvn = cpumcf_svn_67_pmu_event_attr;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		csvn = none;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* Determine model-specific counter set(s) */</div><div class='ctx'> 	get_cpu_id(&amp;cpu_id);</div><div class='head'>diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c<br/>index 24ed33f044ec..cbd5290939df 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/setup.c</a></div><div class='hunk'>@@ -146,10 +146,10 @@ static u32 __amode31_ref *__ctl_linkage_stack = __ctl_linkage_stack_amode31;</div><div class='ctx'> static u32 __amode31_ref *__ctl_duct = __ctl_duct_amode31;</div><div class='ctx'> </div><div class='ctx'> unsigned long __bootdata_preserved(max_mappable);</div><div class='del'>-unsigned long __bootdata(ident_map_size);</div><div class='ctx'> struct physmem_info __bootdata(physmem_info);</div><div class='ctx'> </div><div class='del'>-unsigned long __bootdata_preserved(__kaslr_offset);</div><div class='add'>+struct vm_layout __bootdata_preserved(vm_layout);</div><div class='add'>+EXPORT_SYMBOL_GPL(vm_layout);</div><div class='ctx'> int __bootdata_preserved(__kaslr_enabled);</div><div class='ctx'> unsigned int __bootdata_preserved(zlib_dfltcc_support);</div><div class='ctx'> EXPORT_SYMBOL(zlib_dfltcc_support);</div><div class='hunk'>@@ -765,7 +765,7 @@ static void __init relocate_amode31_section(void)</div><div class='ctx'> 	unsigned long amode31_size = __eamode31 - __samode31;</div><div class='ctx'> 	long amode31_offset, *ptr;</div><div class='ctx'> </div><div class='del'>-	amode31_offset = physmem_info.reserved[RR_AMODE31].start - (unsigned long)__samode31;</div><div class='add'>+	amode31_offset = AMODE31_START - (unsigned long)__samode31;</div><div class='ctx'> 	pr_info("Relocating AMODE31 section of size 0x%08lx\n", amode31_size);</div><div class='ctx'> </div><div class='ctx'> 	/* Move original AMODE31 section to the new one */</div><div class='head'>diff --git a/arch/s390/kernel/stacktrace.c b/arch/s390/kernel/stacktrace.c<br/>index 94f440e38303..7c294da45bf5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/stacktrace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/stacktrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/stacktrace.c</a></div><div class='hunk'>@@ -101,3 +101,22 @@ void arch_stack_walk_user(stack_trace_consume_fn consume_entry, void *cookie,</div><div class='ctx'> 	}</div><div class='ctx'> 	pagefault_enable();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+unsigned long return_address(unsigned int n)</div><div class='add'>+{</div><div class='add'>+	struct unwind_state state;</div><div class='add'>+	unsigned long addr;</div><div class='add'>+</div><div class='add'>+	/* Increment to skip current stack entry */</div><div class='add'>+	n++;</div><div class='add'>+</div><div class='add'>+	unwind_for_each_frame(&amp;state, NULL, NULL, 0) {</div><div class='add'>+		addr = unwind_get_return_address(&amp;state);</div><div class='add'>+		if (!addr)</div><div class='add'>+			break;</div><div class='add'>+		if (!n--)</div><div class='add'>+			return addr;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(return_address);</div><div class='head'>diff --git a/arch/s390/kernel/uv.c b/arch/s390/kernel/uv.c<br/>index fc07bc39e698..265fea37e030 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/uv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/uv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/uv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/uv.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> /* the bootdata_preserved fields come from ones in arch/s390/boot/uv.c */</div><div class='ctx'> #ifdef CONFIG_PROTECTED_VIRTUALIZATION_GUEST</div><div class='ctx'> int __bootdata_preserved(prot_virt_guest);</div><div class='add'>+EXPORT_SYMBOL(prot_virt_guest);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -181,36 +182,36 @@ int uv_convert_owned_from_secure(unsigned long paddr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Calculate the expected ref_count for a page that would otherwise have no</div><div class='add'>+ * Calculate the expected ref_count for a folio that would otherwise have no</div><div class='ctx'>  * further pins. This was cribbed from similar functions in other places in</div><div class='ctx'>  * the kernel, but with some slight modifications. We know that a secure</div><div class='del'>- * page can not be a huge page for example.</div><div class='add'>+ * folio can not be a large folio, for example.</div><div class='ctx'>  */</div><div class='del'>-static int expected_page_refs(struct page *page)</div><div class='add'>+static int expected_folio_refs(struct folio *folio)</div><div class='ctx'> {</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	res = page_mapcount(page);</div><div class='del'>-	if (PageSwapCache(page)) {</div><div class='add'>+	res = folio_mapcount(folio);</div><div class='add'>+	if (folio_test_swapcache(folio)) {</div><div class='ctx'> 		res++;</div><div class='del'>-	} else if (page_mapping(page)) {</div><div class='add'>+	} else if (folio_mapping(folio)) {</div><div class='ctx'> 		res++;</div><div class='del'>-		if (page_has_private(page))</div><div class='add'>+		if (folio-&gt;private)</div><div class='ctx'> 			res++;</div><div class='ctx'> 	}</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int make_page_secure(struct page *page, struct uv_cb_header *uvcb)</div><div class='add'>+static int make_folio_secure(struct folio *folio, struct uv_cb_header *uvcb)</div><div class='ctx'> {</div><div class='ctx'> 	int expected, cc = 0;</div><div class='ctx'> </div><div class='del'>-	if (PageWriteback(page))</div><div class='add'>+	if (folio_test_writeback(folio))</div><div class='ctx'> 		return -EAGAIN;</div><div class='del'>-	expected = expected_page_refs(page);</div><div class='del'>-	if (!page_ref_freeze(page, expected))</div><div class='add'>+	expected = expected_folio_refs(folio);</div><div class='add'>+	if (!folio_ref_freeze(folio, expected))</div><div class='ctx'> 		return -EBUSY;</div><div class='del'>-	set_bit(PG_arch_1, &amp;page-&gt;flags);</div><div class='add'>+	set_bit(PG_arch_1, &amp;folio-&gt;flags);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the UVC does not succeed or fail immediately, we don't want to</div><div class='ctx'> 	 * loop for long, or we might get stall notifications.</div><div class='hunk'>@@ -220,9 +221,9 @@ static int make_page_secure(struct page *page, struct uv_cb_header *uvcb)</div><div class='ctx'> 	 * -EAGAIN and we let the callers deal with it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	cc = __uv_call(0, (u64)uvcb);</div><div class='del'>-	page_ref_unfreeze(page, expected);</div><div class='add'>+	folio_ref_unfreeze(folio, expected);</div><div class='ctx'> 	/*</div><div class='del'>-	 * Return -ENXIO if the page was not mapped, -EINVAL for other errors.</div><div class='add'>+	 * Return -ENXIO if the folio was not mapped, -EINVAL for other errors.</div><div class='ctx'> 	 * If busy or partially completed, return -EAGAIN.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cc == UVC_CC_OK)</div><div class='hunk'>@@ -277,7 +278,7 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb)</div><div class='ctx'> 	bool local_drain = false;</div><div class='ctx'> 	spinlock_t *ptelock;</div><div class='ctx'> 	unsigned long uaddr;</div><div class='del'>-	struct page *page;</div><div class='add'>+	struct folio *folio;</div><div class='ctx'> 	pte_t *ptep;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -306,15 +307,19 @@ again:</div><div class='ctx'> 	if (!ptep)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	if (pte_present(*ptep) &amp;&amp; !(pte_val(*ptep) &amp; _PAGE_INVALID) &amp;&amp; pte_write(*ptep)) {</div><div class='del'>-		page = pte_page(*ptep);</div><div class='add'>+		folio = page_folio(pte_page(*ptep));</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		if (folio_test_large(folio))</div><div class='add'>+			goto unlock;</div><div class='ctx'> 		rc = -EAGAIN;</div><div class='del'>-		if (trylock_page(page)) {</div><div class='add'>+		if (folio_trylock(folio)) {</div><div class='ctx'> 			if (should_export_before_import(uvcb, gmap-&gt;mm))</div><div class='del'>-				uv_convert_from_secure(page_to_phys(page));</div><div class='del'>-			rc = make_page_secure(page, uvcb);</div><div class='del'>-			unlock_page(page);</div><div class='add'>+				uv_convert_from_secure(PFN_PHYS(folio_pfn(folio)));</div><div class='add'>+			rc = make_folio_secure(folio, uvcb);</div><div class='add'>+			folio_unlock(folio);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+unlock:</div><div class='ctx'> 	pte_unmap_unlock(ptep, ptelock);</div><div class='ctx'> out:</div><div class='ctx'> 	mmap_read_unlock(gmap-&gt;mm);</div><div class='hunk'>@@ -324,10 +329,10 @@ out:</div><div class='ctx'> 		 * If we are here because the UVC returned busy or partial</div><div class='ctx'> 		 * completion, this is just a useless check, but it is safe.</div><div class='ctx'> 		 */</div><div class='del'>-		wait_on_page_writeback(page);</div><div class='add'>+		folio_wait_writeback(folio);</div><div class='ctx'> 	} else if (rc == -EBUSY) {</div><div class='ctx'> 		/*</div><div class='del'>-		 * If we have tried a local drain and the page refcount</div><div class='add'>+		 * If we have tried a local drain and the folio refcount</div><div class='ctx'> 		 * still does not match our expected safe value, try with a</div><div class='ctx'> 		 * system wide drain. This is needed if the pagevecs holding</div><div class='ctx'> 		 * the page are on a different CPU.</div><div class='hunk'>@@ -338,7 +343,7 @@ out:</div><div class='ctx'> 			return -EAGAIN;</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='del'>-		 * We are here if the page refcount does not match the</div><div class='add'>+		 * We are here if the folio refcount does not match the</div><div class='ctx'> 		 * expected safe value. The main culprits are usually</div><div class='ctx'> 		 * pagevecs. With lru_add_drain() we drain the pagevecs</div><div class='ctx'> 		 * on the local CPU so that hopefully the refcount will</div><div class='head'>diff --git a/arch/s390/kernel/vdso64/vdso_user_wrapper.S b/arch/s390/kernel/vdso64/vdso_user_wrapper.S<br/>index 57f62596e53b..85247ef5a41b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/vdso64/vdso_user_wrapper.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/vdso64/vdso_user_wrapper.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/vdso64/vdso_user_wrapper.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/vdso64/vdso_user_wrapper.S</a></div><div class='hunk'>@@ -24,8 +24,10 @@ __kernel_\func:</div><div class='ctx'> 	CFI_DEF_CFA_OFFSET (STACK_FRAME_OVERHEAD + WRAPPER_FRAME_SIZE)</div><div class='ctx'> 	CFI_VAL_OFFSET 15, -STACK_FRAME_OVERHEAD</div><div class='ctx'> 	stg	%r14,STACK_FRAME_OVERHEAD(%r15)</div><div class='add'>+	CFI_REL_OFFSET 14, STACK_FRAME_OVERHEAD</div><div class='ctx'> 	brasl	%r14,__s390_vdso_\func</div><div class='ctx'> 	lg	%r14,STACK_FRAME_OVERHEAD(%r15)</div><div class='add'>+	CFI_RESTORE 14</div><div class='ctx'> 	aghi	%r15,WRAPPER_FRAME_SIZE</div><div class='ctx'> 	CFI_DEF_CFA_OFFSET STACK_FRAME_OVERHEAD</div><div class='ctx'> 	CFI_RESTORE 15</div><div class='head'>diff --git a/arch/s390/kernel/vmcore_info.c b/arch/s390/kernel/vmcore_info.c<br/>index d296dfc22191..23f7d7619a99 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/vmcore_info.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/vmcore_info.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/vmcore_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/vmcore_info.c</a></div><div class='hunk'>@@ -14,7 +14,9 @@ void arch_crash_save_vmcoreinfo(void)</div><div class='ctx'> 	VMCOREINFO_LENGTH(lowcore_ptr, NR_CPUS);</div><div class='ctx'> 	vmcoreinfo_append_str("SAMODE31=%lx\n", (unsigned long)__samode31);</div><div class='ctx'> 	vmcoreinfo_append_str("EAMODE31=%lx\n", (unsigned long)__eamode31);</div><div class='add'>+	vmcoreinfo_append_str("IDENTITYBASE=%lx\n", __identity_base);</div><div class='ctx'> 	vmcoreinfo_append_str("KERNELOFFSET=%lx\n", kaslr_offset());</div><div class='add'>+	vmcoreinfo_append_str("KERNELOFFPHYS=%lx\n", __kaslr_offset_phys);</div><div class='ctx'> 	abs_lc = get_abs_lowcore();</div><div class='ctx'> 	abs_lc-&gt;vmcore_info = paddr_vmcoreinfo_note();</div><div class='ctx'> 	put_abs_lowcore(abs_lc);</div><div class='head'>diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S<br/>index 48de296e8905..a1ce3925ec71 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -39,7 +39,7 @@ PHDRS {</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	. = 0x100000;</div><div class='add'>+	. = __START_KERNEL;</div><div class='ctx'> 	.text : {</div><div class='ctx'> 		_stext = .;		/* Start of text section */</div><div class='ctx'> 		_text = .;		/* Text and read-only data */</div><div class='hunk'>@@ -183,7 +183,7 @@ SECTIONS</div><div class='ctx'> 	.amode31.data : {</div><div class='ctx'> 		*(.amode31.data)</div><div class='ctx'> 	}</div><div class='del'>-	. = ALIGN(PAGE_SIZE);</div><div class='add'>+	. = _samode31 + AMODE31_SIZE;</div><div class='ctx'> 	_eamode31 = .;</div><div class='ctx'> </div><div class='ctx'> 	/* early.c uses stsi, which requires page aligned data. */</div><div class='hunk'>@@ -192,31 +192,6 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	PERCPU_SECTION(0x100)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PIE_BUILD</div><div class='del'>-	.dynsym ALIGN(8) : {</div><div class='del'>-		__dynsym_start = .;</div><div class='del'>-		*(.dynsym)</div><div class='del'>-		__dynsym_end = .;</div><div class='del'>-	}</div><div class='del'>-	.rela.dyn ALIGN(8) : {</div><div class='del'>-		__rela_dyn_start = .;</div><div class='del'>-		*(.rela*)</div><div class='del'>-		__rela_dyn_end = .;</div><div class='del'>-	}</div><div class='del'>-	.dynamic ALIGN(8) : {</div><div class='del'>-		*(.dynamic)</div><div class='del'>-	}</div><div class='del'>-	.dynstr ALIGN(8) : {</div><div class='del'>-		*(.dynstr)</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	.hash ALIGN(8) : {</div><div class='del'>-		*(.hash)</div><div class='del'>-	}</div><div class='del'>-	.gnu.hash ALIGN(8) : {</div><div class='del'>-		*(.gnu.hash)</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='ctx'> 	__init_end = .;		/* freed after init ends here */</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +205,6 @@ SECTIONS</div><div class='ctx'> 	 * it should match struct vmlinux_info</div><div class='ctx'> 	 */</div><div class='ctx'> 	.vmlinux.info 0 (INFO) : {</div><div class='del'>-		QUAD(_stext)					/* default_lma */</div><div class='ctx'> 		QUAD(startup_continue)				/* entry */</div><div class='ctx'> 		QUAD(__bss_start - _stext)			/* image_size */</div><div class='ctx'> 		QUAD(__bss_stop - __bss_start)			/* bss_size */</div><div class='hunk'>@@ -239,14 +213,8 @@ SECTIONS</div><div class='ctx'> 		QUAD(__boot_data_preserved_start)		/* bootdata_preserved_off */</div><div class='ctx'> 		QUAD(__boot_data_preserved_end -</div><div class='ctx'> 		     __boot_data_preserved_start)		/* bootdata_preserved_size */</div><div class='del'>-#ifdef CONFIG_PIE_BUILD</div><div class='del'>-		QUAD(__dynsym_start)				/* dynsym_start */</div><div class='del'>-		QUAD(__rela_dyn_start)				/* rela_dyn_start */</div><div class='del'>-		QUAD(__rela_dyn_end)				/* rela_dyn_end */</div><div class='del'>-#else</div><div class='ctx'> 		QUAD(__got_start)				/* got_start */</div><div class='ctx'> 		QUAD(__got_end)					/* got_end */</div><div class='del'>-#endif</div><div class='ctx'> 		QUAD(_eamode31 - _samode31)			/* amode31_size */</div><div class='ctx'> 		QUAD(init_mm)</div><div class='ctx'> 		QUAD(swapper_pg_dir)</div><div class='hunk'>@@ -282,12 +250,10 @@ SECTIONS</div><div class='ctx'> 		*(.plt) *(.plt.*) *(.iplt) *(.igot .igot.plt)</div><div class='ctx'> 	}</div><div class='ctx'> 	ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")</div><div class='del'>-#ifndef CONFIG_PIE_BUILD</div><div class='ctx'> 	.rela.dyn : {</div><div class='ctx'> 		*(.rela.*) *(.rela_*)</div><div class='ctx'> 	}</div><div class='ctx'> 	ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Sections to be discarded */</div><div class='ctx'> 	DISCARDS</div><div class='head'>diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c<br/>index 5147b943a864..82e9631cd9ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kvm/kvm-s390.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kvm/kvm-s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kvm/kvm-s390.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kvm/kvm-s390.c</a></div><div class='hunk'>@@ -587,7 +587,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_S390_HPAGE_1M:</div><div class='ctx'> 		r = 0;</div><div class='del'>-		if (hpage &amp;&amp; !kvm_is_ucontrol(kvm))</div><div class='add'>+		if (hpage &amp;&amp; !(kvm &amp;&amp; kvm_is_ucontrol(kvm)))</div><div class='ctx'> 			r = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_S390_MEM_OP:</div><div class='hunk'>@@ -2631,9 +2631,7 @@ static int kvm_s390_handle_pv(struct kvm *kvm, struct kvm_pv_cmd *cmd)</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		mmap_write_lock(current-&gt;mm);</div><div class='del'>-		r = gmap_mark_unmergeable();</div><div class='del'>-		mmap_write_unlock(current-&gt;mm);</div><div class='add'>+		r = s390_disable_cow_sharing();</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kvm/vsie.c b/arch/s390/kvm/vsie.c<br/>index b2c9f010f0fe..c9ecae830634 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kvm/vsie.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/kvm/vsie.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kvm/vsie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/kvm/vsie.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/sched/signal.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/gmap.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='hunk'>@@ -361,7 +362,7 @@ end:</div><div class='ctx'> 	case -EACCES:</div><div class='ctx'> 		return set_validity_icpt(scb_s, 0x003CU);</div><div class='ctx'> 	}</div><div class='del'>-	scb_s-&gt;crycbd = ((__u32)(__u64) &amp;vsie_page-&gt;crycb) | CRYCB_FORMAT2;</div><div class='add'>+	scb_s-&gt;crycbd = (u32)virt_to_phys(&amp;vsie_page-&gt;crycb) | CRYCB_FORMAT2;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1005,7 +1006,7 @@ static int handle_stfle(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page)</div><div class='ctx'> 		if (read_guest_real(vcpu, fac, &amp;vsie_page-&gt;fac,</div><div class='ctx'> 				    stfle_size() * sizeof(u64)))</div><div class='ctx'> 			return set_validity_icpt(scb_s, 0x1090U);</div><div class='del'>-		scb_s-&gt;fac = (__u32)(__u64) &amp;vsie_page-&gt;fac;</div><div class='add'>+		scb_s-&gt;fac = (u32)virt_to_phys(&amp;vsie_page-&gt;fac);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile<br/>index 90eac15ea62a..f43f897d3fc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/lib/Makefile</a></div><div class='hunk'>@@ -23,4 +23,4 @@ obj-$(CONFIG_S390_MODULES_SANITY_TEST_HELPERS) += test_modules_helpers.o</div><div class='ctx'> </div><div class='ctx'> lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_EXPOLINE_EXTERN) += expoline/</div><div class='add'>+obj-$(CONFIG_EXPOLINE_EXTERN) += expoline.o</div><div class='head'>diff --git a/arch/s390/lib/expoline/expoline.S b/arch/s390/lib/expoline.S<br/>index 92ed8409a7a4..92ed8409a7a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/expoline/expoline.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/lib/expoline/expoline.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/expoline.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/lib/expoline.S</a></div><div class='head'>diff --git a/arch/s390/lib/expoline/Makefile b/arch/s390/lib/expoline/Makefile<br/>deleted file mode 100644<br/>index 854631d9cb03..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/expoline/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/lib/expoline/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-obj-y += expoline.o</div><div class='head'>diff --git a/arch/s390/mm/gmap.c b/arch/s390/mm/gmap.c<br/>index 094b43b121cd..474a25ca5c48 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/mm/gmap.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/gmap.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/mm/gmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/mm/gmap.c</a></div><div class='hunk'>@@ -2550,41 +2550,6 @@ static inline void thp_split_mm(struct mm_struct *mm)</div><div class='ctx'> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Remove all empty zero pages from the mapping for lazy refaulting</div><div class='del'>- * - This must be called after mm-&gt;context.has_pgste is set, to avoid</div><div class='del'>- *   future creation of zero pages</div><div class='del'>- * - This must be called after THP was disabled.</div><div class='del'>- *</div><div class='del'>- * mm contracts with s390, that even if mm were to remove a page table,</div><div class='del'>- * racing with the loop below and so causing pte_offset_map_lock() to fail,</div><div class='del'>- * it will never insert a page table containing empty zero pages once</div><div class='del'>- * mm_forbids_zeropage(mm) i.e. mm-&gt;context.has_pgste is set.</div><div class='del'>- */</div><div class='del'>-static int __zap_zero_pages(pmd_t *pmd, unsigned long start,</div><div class='del'>-			   unsigned long end, struct mm_walk *walk)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr;</div><div class='del'>-</div><div class='del'>-	for (addr = start; addr != end; addr += PAGE_SIZE) {</div><div class='del'>-		pte_t *ptep;</div><div class='del'>-		spinlock_t *ptl;</div><div class='del'>-</div><div class='del'>-		ptep = pte_offset_map_lock(walk-&gt;mm, pmd, addr, &amp;ptl);</div><div class='del'>-		if (!ptep)</div><div class='del'>-			break;</div><div class='del'>-		if (is_zero_pfn(pte_pfn(*ptep)))</div><div class='del'>-			ptep_xchg_direct(walk-&gt;mm, addr, ptep, __pte(_PAGE_INVALID));</div><div class='del'>-		pte_unmap_unlock(ptep, ptl);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct mm_walk_ops zap_zero_walk_ops = {</div><div class='del'>-	.pmd_entry	= __zap_zero_pages,</div><div class='del'>-	.walk_lock	= PGWALK_WRLOCK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * switch on pgstes for its userspace process (for kvm)</div><div class='ctx'>  */</div><div class='ctx'> int s390_enable_sie(void)</div><div class='hunk'>@@ -2601,22 +2566,142 @@ int s390_enable_sie(void)</div><div class='ctx'> 	mm-&gt;context.has_pgste = 1;</div><div class='ctx'> 	/* split thp mappings and disable thp for future mappings */</div><div class='ctx'> 	thp_split_mm(mm);</div><div class='del'>-	walk_page_range(mm, 0, TASK_SIZE, &amp;zap_zero_walk_ops, NULL);</div><div class='ctx'> 	mmap_write_unlock(mm);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(s390_enable_sie);</div><div class='ctx'> </div><div class='del'>-int gmap_mark_unmergeable(void)</div><div class='add'>+static int find_zeropage_pte_entry(pte_t *pte, unsigned long addr,</div><div class='add'>+				   unsigned long end, struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	unsigned long *found_addr = walk-&gt;private;</div><div class='add'>+</div><div class='add'>+	/* Return 1 of the page is a zeropage. */</div><div class='add'>+	if (is_zero_pfn(pte_pfn(*pte))) {</div><div class='add'>+		/*</div><div class='add'>+		 * Shared zeropage in e.g., a FS DAX mapping? We cannot do the</div><div class='add'>+		 * right thing and likely don't care: FAULT_FLAG_UNSHARE</div><div class='add'>+		 * currently only works in COW mappings, which is also where</div><div class='add'>+		 * mm_forbids_zeropage() is checked.</div><div class='add'>+		 */</div><div class='add'>+		if (!is_cow_mapping(walk-&gt;vma-&gt;vm_flags))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		*found_addr = addr;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mm_walk_ops find_zeropage_ops = {</div><div class='add'>+	.pte_entry	= find_zeropage_pte_entry,</div><div class='add'>+	.walk_lock	= PGWALK_WRLOCK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unshare all shared zeropages, replacing them by anonymous pages. Note that</div><div class='add'>+ * we cannot simply zap all shared zeropages, because this could later</div><div class='add'>+ * trigger unexpected userfaultfd missing events.</div><div class='add'>+ *</div><div class='add'>+ * This must be called after mm-&gt;context.allow_cow_sharing was</div><div class='add'>+ * set to 0, to avoid future mappings of shared zeropages.</div><div class='add'>+ *</div><div class='add'>+ * mm contracts with s390, that even if mm were to remove a page table,</div><div class='add'>+ * and racing with walk_page_range_vma() calling pte_offset_map_lock()</div><div class='add'>+ * would fail, it will never insert a page table containing empty zero</div><div class='add'>+ * pages once mm_forbids_zeropage(mm) i.e.</div><div class='add'>+ * mm-&gt;context.allow_cow_sharing is set to 0.</div><div class='add'>+ */</div><div class='add'>+static int __s390_unshare_zeropages(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	struct vm_area_struct *vma;</div><div class='add'>+	VMA_ITERATOR(vmi, mm, 0);</div><div class='add'>+	unsigned long addr;</div><div class='add'>+	vm_fault_t fault;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	for_each_vma(vmi, vma) {</div><div class='add'>+		/*</div><div class='add'>+		 * We could only look at COW mappings, but it's more future</div><div class='add'>+		 * proof to catch unexpected zeropages in other mappings and</div><div class='add'>+		 * fail.</div><div class='add'>+		 */</div><div class='add'>+		if ((vma-&gt;vm_flags &amp; VM_PFNMAP) || is_vm_hugetlb_page(vma))</div><div class='add'>+			continue;</div><div class='add'>+		addr = vma-&gt;vm_start;</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+		rc = walk_page_range_vma(vma, addr, vma-&gt;vm_end,</div><div class='add'>+					 &amp;find_zeropage_ops, &amp;addr);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+		else if (!rc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* addr was updated by find_zeropage_pte_entry() */</div><div class='add'>+		fault = handle_mm_fault(vma, addr,</div><div class='add'>+					FAULT_FLAG_UNSHARE | FAULT_FLAG_REMOTE,</div><div class='add'>+					NULL);</div><div class='add'>+		if (fault &amp; VM_FAULT_OOM)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		/*</div><div class='add'>+		 * See break_ksm(): even after handle_mm_fault() returned 0, we</div><div class='add'>+		 * must start the lookup from the current address, because</div><div class='add'>+		 * handle_mm_fault() may back out if there's any difficulty.</div><div class='add'>+		 *</div><div class='add'>+		 * VM_FAULT_SIGBUS and VM_FAULT_SIGSEGV are unexpected but</div><div class='add'>+		 * maybe they could trigger in the future on concurrent</div><div class='add'>+		 * truncation. In that case, the shared zeropage would be gone</div><div class='add'>+		 * and we can simply retry and make progress.</div><div class='add'>+		 */</div><div class='add'>+		cond_resched();</div><div class='add'>+		goto retry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __s390_disable_cow_sharing(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!mm-&gt;context.allow_cow_sharing)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mm-&gt;context.allow_cow_sharing = 0;</div><div class='add'>+</div><div class='add'>+	/* Replace all shared zeropages by anonymous pages. */</div><div class='add'>+	rc = __s390_unshare_zeropages(mm);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure to disable KSM (if enabled for the whole process or</div><div class='ctx'> 	 * individual VMAs). Note that nothing currently hinders user space</div><div class='ctx'> 	 * from re-enabling it.</div><div class='ctx'> 	 */</div><div class='del'>-	return ksm_disable(current-&gt;mm);</div><div class='add'>+	if (!rc)</div><div class='add'>+		rc = ksm_disable(mm);</div><div class='add'>+	if (rc)</div><div class='add'>+		mm-&gt;context.allow_cow_sharing = 1;</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disable most COW-sharing of memory pages for the whole process:</div><div class='add'>+ * (1) Disable KSM and unmerge/unshare any KSM pages.</div><div class='add'>+ * (2) Disallow shared zeropages and unshare any zerpages that are mapped.</div><div class='add'>+ *</div><div class='add'>+ * Not that we currently don't bother with COW-shared pages that are shared</div><div class='add'>+ * with parent/child processes due to fork().</div><div class='add'>+ */</div><div class='add'>+int s390_disable_cow_sharing(void)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mmap_write_lock(current-&gt;mm);</div><div class='add'>+	rc = __s390_disable_cow_sharing(current-&gt;mm);</div><div class='add'>+	mmap_write_unlock(current-&gt;mm);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(gmap_mark_unmergeable);</div><div class='add'>+EXPORT_SYMBOL_GPL(s390_disable_cow_sharing);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Enable storage key handling from now on and initialize the storage</div><div class='hunk'>@@ -2661,7 +2746,7 @@ static int __s390_enable_skey_hugetlb(pte_t *pte, unsigned long addr,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	start = pmd_val(*pmd) &amp; HPAGE_MASK;</div><div class='del'>-	end = start + HPAGE_SIZE - 1;</div><div class='add'>+	end = start + HPAGE_SIZE;</div><div class='ctx'> 	__storage_key_init_range(start, end);</div><div class='ctx'> 	set_bit(PG_arch_1, &amp;page-&gt;flags);</div><div class='ctx'> 	cond_resched();</div><div class='hunk'>@@ -2685,7 +2770,7 @@ int s390_enable_skey(void)</div><div class='ctx'> 		goto out_up;</div><div class='ctx'> </div><div class='ctx'> 	mm-&gt;context.uses_skeys = 1;</div><div class='del'>-	rc = gmap_mark_unmergeable();</div><div class='add'>+	rc = __s390_disable_cow_sharing(mm);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		mm-&gt;context.uses_skeys = 0;</div><div class='ctx'> 		goto out_up;</div><div class='head'>diff --git a/arch/s390/mm/hugetlbpage.c b/arch/s390/mm/hugetlbpage.c<br/>index c2e8242bd15d..dc3db86e13ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/mm/hugetlbpage.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/mm/hugetlbpage.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ static void clear_huge_pte_skeys(struct mm_struct *mm, unsigned long rste)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!test_and_set_bit(PG_arch_1, &amp;page-&gt;flags))</div><div class='del'>-		__storage_key_init_range(paddr, paddr + size - 1);</div><div class='add'>+		__storage_key_init_range(paddr, paddr + size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='head'>diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c<br/>index f6391442c0c2..e769d2726f4e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/mm/init.c</a></div><div class='hunk'>@@ -49,6 +49,7 @@</div><div class='ctx'> #include &lt;asm/uv.h&gt;</div><div class='ctx'> #include &lt;linux/virtio_anchor.h&gt;</div><div class='ctx'> #include &lt;linux/virtio_config.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(".bss..swapper_pg_dir");</div><div class='ctx'> pgd_t invalid_pg_dir[PTRS_PER_PGD] __section(".bss..invalid_pg_dir");</div><div class='hunk'>@@ -302,3 +303,32 @@ void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)</div><div class='ctx'> 	vmem_remove_mapping(start, size);</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_MEMORY_HOTPLUG */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long module_load_offset = 0;</div><div class='add'>+	unsigned long start;</div><div class='add'>+</div><div class='add'>+	if (kaslr_enabled())</div><div class='add'>+		module_load_offset = get_random_u32_inclusive(1, 1024) * PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	start = MODULES_VADDR + module_load_offset;</div><div class='add'>+</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.flags	= EXECMEM_KASAN_SHADOW,</div><div class='add'>+				.start	= start,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = MODULE_ALIGN,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c<br/>index 85cddf904cb2..41c714e21292 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/mm/vmem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/mm/vmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/mm/vmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/mm/vmem.c</a></div><div class='hunk'>@@ -13,7 +13,9 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='ctx'> #include &lt;asm/page-states.h&gt;</div><div class='add'>+#include &lt;asm/abs_lowcore.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/maccess.h&gt;</div><div class='ctx'> #include &lt;asm/nospec-branch.h&gt;</div><div class='ctx'> #include &lt;asm/ctlreg.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='hunk'>@@ -21,6 +23,7 @@</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='add'>+#include &lt;asm/physmem_info.h&gt;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_MUTEX(vmem_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -436,7 +439,7 @@ static int modify_pagetable(unsigned long start, unsigned long end, bool add,</div><div class='ctx'> 	if (WARN_ON_ONCE(!PAGE_ALIGNED(start | end)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	/* Don't mess with any tables not fully in 1:1 mapping &amp; vmemmap area */</div><div class='del'>-	if (WARN_ON_ONCE(end &gt; VMALLOC_START))</div><div class='add'>+	if (WARN_ON_ONCE(end &gt; __abs_lowcore))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	for (addr = start; addr &lt; end; addr = next) {</div><div class='ctx'> 		next = pgd_addr_end(addr, end);</div><div class='head'>diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c<br/>index 5af0402e94b8..4be8f5cadd02 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -1427,8 +1427,12 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp,</div><div class='ctx'> 	EMIT6_DISP_LH(0xeb000000, is32 ? (op32) : (op64),		\</div><div class='ctx'> 		      (insn-&gt;imm &amp; BPF_FETCH) ? src_reg : REG_W0,	\</div><div class='ctx'> 		      src_reg, dst_reg, off);				\</div><div class='del'>-	if (is32 &amp;&amp; (insn-&gt;imm &amp; BPF_FETCH))				\</div><div class='del'>-		EMIT_ZERO(src_reg);					\</div><div class='add'>+	if (insn-&gt;imm &amp; BPF_FETCH) {					\</div><div class='add'>+		/* bcr 14,0 - see atomic_fetch_{add,and,or,xor}() */	\</div><div class='add'>+		_EMIT2(0x07e0);						\</div><div class='add'>+		if (is32)                                               \</div><div class='add'>+			EMIT_ZERO(src_reg);				\</div><div class='add'>+	}								\</div><div class='ctx'> } while (0)</div><div class='ctx'> 		case BPF_ADD:</div><div class='ctx'> 		case BPF_ADD | BPF_FETCH:</div><div class='hunk'>@@ -2108,7 +2112,11 @@ skip_init_ctx:</div><div class='ctx'> 		print_fn_code(jit.prg_buf, jit.size_prg);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!fp-&gt;is_func || extra_pass) {</div><div class='del'>-		bpf_jit_binary_lock_ro(header);</div><div class='add'>+		if (bpf_jit_binary_lock_ro(header)) {</div><div class='add'>+			bpf_jit_binary_free(header);</div><div class='add'>+			fp = orig_fp;</div><div class='add'>+			goto free_addrs;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		jit_data-&gt;header = header;</div><div class='ctx'> 		jit_data-&gt;ctx = jit;</div><div class='head'>diff --git a/arch/s390/pci/pci_sysfs.c b/arch/s390/pci/pci_sysfs.c<br/>index a0b872b74fe3..0f4f1e8fc480 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/pci/pci_sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/pci/pci_sysfs.c</a></div><div class='hunk'>@@ -172,7 +172,6 @@ static ssize_t uid_is_unique_show(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(uid_is_unique);</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_DMI</div><div class='ctx'> /* analogous to smbios index */</div><div class='ctx'> static ssize_t index_show(struct device *dev,</div><div class='ctx'> 			  struct device_attribute *attr, char *buf)</div><div class='hunk'>@@ -202,7 +201,6 @@ static struct attribute_group zpci_ident_attr_group = {</div><div class='ctx'> 	.attrs = zpci_ident_attrs,</div><div class='ctx'> 	.is_visible = zpci_index_is_visible,</div><div class='ctx'> };</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static struct bin_attribute *zpci_bin_attrs[] = {</div><div class='ctx'> 	&amp;bin_attr_util_string,</div><div class='hunk'>@@ -245,8 +243,6 @@ static struct attribute_group pfip_attr_group = {</div><div class='ctx'> const struct attribute_group *zpci_attr_groups[] = {</div><div class='ctx'> 	&amp;zpci_attr_group,</div><div class='ctx'> 	&amp;pfip_attr_group,</div><div class='del'>-#ifndef CONFIG_DMI</div><div class='ctx'> 	&amp;zpci_ident_attr_group,</div><div class='del'>-#endif</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/s390/tools/relocs.c b/arch/s390/tools/relocs.c<br/>index 30a732c808f3..a74dbd5c9896 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/tools/relocs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/s390/tools/relocs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/tools/relocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/s390/tools/relocs.c</a></div><div class='hunk'>@@ -280,7 +280,7 @@ static int do_reloc(struct section *sec, Elf_Rel *rel)</div><div class='ctx'> 	case R_390_GOTOFF64:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case R_390_64:</div><div class='del'>-		add_reloc(&amp;relocs64, offset);</div><div class='add'>+		add_reloc(&amp;relocs64, offset - ehdr.e_entry);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		die("Unsupported relocation type: %d\n", r_type);</div><div class='head'>diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig<br/>index 2ad3e29f0ebe..6bc60f964f96 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/Kconfig</a></div><div class='hunk'>@@ -125,7 +125,8 @@ config ARCH_HAS_ILOG2_U64</div><div class='ctx'> </div><div class='ctx'> config NO_IOPORT_MAP</div><div class='ctx'> 	def_bool !PCI</div><div class='del'>-	depends on !SH_SHMIN &amp;&amp; !SH_HP6XX &amp;&amp; !SH_SOLUTION_ENGINE</div><div class='add'>+	depends on !SH_SHMIN &amp;&amp; !SH_HP6XX &amp;&amp; !SH_SOLUTION_ENGINE &amp;&amp; \</div><div class='add'>+		   !SH_DREAMCAST</div><div class='ctx'> </div><div class='ctx'> config IO_TRAPPED</div><div class='ctx'> 	bool</div><div class='head'>diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c<br/>index f39c8196efdf..689ea14a6678 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/board-sh7757lcr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/board-sh7757lcr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/board-sh7757lcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boards/board-sh7757lcr.c</a></div><div class='hunk'>@@ -569,7 +569,7 @@ static int __init sh7757lcr_devices_setup(void)</div><div class='ctx'> arch_initcall(sh7757lcr_devices_setup);</div><div class='ctx'> </div><div class='ctx'> /* Initialize IRQ setting */</div><div class='del'>-void __init init_sh7757lcr_IRQ(void)</div><div class='add'>+static void __init init_sh7757lcr_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	plat_irq_setup_pins(IRQ_MODE_IRQ7654);</div><div class='ctx'> 	plat_irq_setup_pins(IRQ_MODE_IRQ3210);</div><div class='head'>diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c<br/>index 77dad1e511b4..25c4968f0d8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/board-sh7785lcr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/board-sh7785lcr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/board-sh7785lcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boards/board-sh7785lcr.c</a></div><div class='hunk'>@@ -295,7 +295,7 @@ static int __init sh7785lcr_devices_setup(void)</div><div class='ctx'> device_initcall(sh7785lcr_devices_setup);</div><div class='ctx'> </div><div class='ctx'> /* Initialize IRQ setting */</div><div class='del'>-void __init init_sh7785lcr_IRQ(void)</div><div class='add'>+static void __init init_sh7785lcr_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	plat_irq_setup_pins(IRQ_MODE_IRQ7654);</div><div class='ctx'> 	plat_irq_setup_pins(IRQ_MODE_IRQ3210);</div><div class='head'>diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c<br/>index 2d966c1c2cc1..daa8455549fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-dreamcast/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/mach-dreamcast/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-dreamcast/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boards/mach-dreamcast/setup.c</a></div><div class='hunk'>@@ -25,10 +25,13 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/rtc.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='add'>+#include &lt;cpu/addrspace.h&gt;</div><div class='ctx'> #include &lt;mach/sysasic.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void __init dreamcast_setup(char **cmdline_p)</div><div class='ctx'> {</div><div class='add'>+	/* GAPS PCI bridge assumes P2 area relative addresses. */</div><div class='add'>+	__set_io_port_base(P2SEG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sh_machine_vector mv_dreamcast __initmv = {</div><div class='head'>diff --git a/arch/sh/boards/mach-highlander/pinmux-r7785rp.c b/arch/sh/boards/mach-highlander/pinmux-r7785rp.c<br/>index 703179faf652..689bd8732d9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-highlander/pinmux-r7785rp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/mach-highlander/pinmux-r7785rp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-highlander/pinmux-r7785rp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boards/mach-highlander/pinmux-r7785rp.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;cpu/sh7785.h&gt;</div><div class='add'>+#include &lt;mach/highlander.h&gt;</div><div class='ctx'> </div><div class='ctx'> void __init highlander_plat_pinmux_setup(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c<br/>index 7fb474844a2d..bc6cf995128c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-sh03/rtc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/mach-sh03/rtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-sh03/rtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boards/mach-sh03/rtc.c</a></div><div class='hunk'>@@ -120,7 +120,7 @@ static int set_rtc_mmss(struct rtc_time *tm)</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int sh03_rtc_settimeofday(struct device *dev, struct rtc_time *tm)</div><div class='add'>+static int sh03_rtc_settimeofday(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> {</div><div class='ctx'> 	return set_rtc_mmss(tm);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c<br/>index f7f3e618e85b..cc88cb8908cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/of-generic.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boards/of-generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/of-generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boards/of-generic.c</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/clock.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm/rtc.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile<br/>index 6c6c791a1d06..54efed53c891 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boot/compressed/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boot/compressed/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boot/compressed/Makefile</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> # create a compressed vmlinux image from the original vmlinux</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-OBJECTS := head_32.o misc.o cache.o piggy.o \</div><div class='add'>+OBJECTS := head_32.o misc.o piggy.o \</div><div class='ctx'>            ashiftrt.o ashldi3.o ashrsi3.o ashlsi3.o lshrsi3.o</div><div class='ctx'> </div><div class='ctx'> targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \</div><div class='head'>diff --git a/arch/sh/boot/compressed/cache.c b/arch/sh/boot/compressed/cache.c<br/>deleted file mode 100644<br/>index 31e04ff4841e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boot/compressed/cache.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/cache.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-int cache_control(unsigned int command)</div><div class='del'>-{</div><div class='del'>-	volatile unsigned int *p = (volatile unsigned int *) 0x80000000;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; (32 * 1024); i += 32) {</div><div class='del'>-		(void)*p;</div><div class='del'>-		p += (32 / sizeof(int));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c<br/>index ca05c99a3d5b..3690379cc86b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boot/compressed/misc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/compressed/misc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boot/compressed/misc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boot/compressed/misc.c</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "misc.h"</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * gzip declarations</div><div class='ctx'>  */</div><div class='hunk'>@@ -26,11 +28,6 @@</div><div class='ctx'> #undef memcpy</div><div class='ctx'> #define memzero(s, n)     memset ((s), 0, (n))</div><div class='ctx'> </div><div class='del'>-/* cache.c */</div><div class='del'>-#define CACHE_ENABLE      0</div><div class='del'>-#define CACHE_DISABLE     1</div><div class='del'>-int cache_control(unsigned int command);</div><div class='del'>-</div><div class='ctx'> extern char input_data[];</div><div class='ctx'> extern int input_len;</div><div class='ctx'> static unsigned char *output;</div><div class='hunk'>@@ -139,8 +136,6 @@ void decompress_kernel(void)</div><div class='ctx'> 	free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	puts("Uncompressing Linux... ");</div><div class='del'>-	cache_control(CACHE_ENABLE);</div><div class='ctx'> 	__decompress(input_data, input_len, NULL, NULL, output, 0, NULL, error);</div><div class='del'>-	cache_control(CACHE_DISABLE);</div><div class='ctx'> 	puts("Ok, booting the kernel.\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/boot/compressed/misc.h b/arch/sh/boot/compressed/misc.h<br/>new file mode 100644<br/>index 000000000000..2b4534faa305<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boot/compressed/misc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boot/compressed/misc.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef MISC_H</div><div class='add'>+#define MISC_H</div><div class='add'>+</div><div class='add'>+void arch_ftrace_ops_list_func(void);</div><div class='add'>+void decompress_kernel(void);</div><div class='add'>+void ftrace_stub(void);</div><div class='add'>+</div><div class='add'>+#endif /* MISC_H */</div><div class='head'>diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts<br/>index fa9562f78d53..faf884f53804 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boot/dts/j2_mimas_v2.dts?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/boot/dts/j2_mimas_v2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boot/dts/j2_mimas_v2.dts?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/boot/dts/j2_mimas_v2.dts</a></div><div class='hunk'>@@ -71,8 +71,6 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			spi-max-frequency = &lt;25000000&gt;;</div><div class='del'>-</div><div class='ctx'> 			reg = &lt;0x40 0x8&gt;;</div><div class='ctx'> </div><div class='ctx'> 			sdcard@0 {</div><div class='head'>diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig<br/>index 9ee35269bee2..ab3bf72264df 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/edosk7705_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/edosk7705_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/edosk7705_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/configs/edosk7705_defconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> # CONFIG_PRINTK is not set</div><div class='ctx'> # CONFIG_BUG is not set</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='head'>diff --git a/arch/sh/configs/se7619_defconfig b/arch/sh/configs/se7619_defconfig<br/>index 14d0f5ead502..4765966fec99 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7619_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/se7619_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7619_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/configs/se7619_defconfig</a></div><div class='hunk'>@@ -4,7 +4,7 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> # CONFIG_KALLSYMS is not set</div><div class='ctx'> # CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='head'>diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig<br/>index dc854293da43..20f07aee5bde 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7712_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/se7712_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7712_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/configs/se7712_defconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> # CONFIG_BUG is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_SHMEM is not set</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig<br/>index c891945b8a90..00862d3c030d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7721_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/se7721_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7721_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/configs/se7721_defconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> # CONFIG_BUG is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_SHMEM is not set</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/sh/configs/shmin_defconfig b/arch/sh/configs/shmin_defconfig<br/>index e078b193a78a..bfeb004f130e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/shmin_defconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/configs/shmin_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/shmin_defconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/configs/shmin_defconfig</a></div><div class='hunk'>@@ -5,7 +5,7 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> # CONFIG_HOTPLUG is not set</div><div class='ctx'> # CONFIG_BUG is not set</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-# CONFIG_BASE_FULL is not set</div><div class='add'>+CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SHMEM is not set</div><div class='head'>diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c<br/>index 89cd4a3b4cca..87e5a8928873 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/drivers/dma/dma-api.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/drivers/dma/dma-api.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/drivers/dma/dma-api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/drivers/dma/dma-api.c</a></div><div class='hunk'>@@ -41,21 +41,6 @@ struct dma_info *get_dma_info(unsigned int chan)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_dma_info);</div><div class='ctx'> </div><div class='del'>-struct dma_info *get_dma_info_by_name(const char *dmac_name)</div><div class='del'>-{</div><div class='del'>-	struct dma_info *info;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(info, &amp;registered_dmac_list, list) {</div><div class='del'>-		if (dmac_name &amp;&amp; (strcmp(dmac_name, info-&gt;name) != 0))</div><div class='del'>-			continue;</div><div class='del'>-		else</div><div class='del'>-			return info;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(get_dma_info_by_name);</div><div class='del'>-</div><div class='ctx'> static unsigned int get_nr_channels(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_info *info;</div><div class='hunk'>@@ -101,93 +86,6 @@ int get_dma_residue(unsigned int chan)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_dma_residue);</div><div class='ctx'> </div><div class='del'>-static int search_cap(const char **haystack, const char *needle)</div><div class='del'>-{</div><div class='del'>-	const char **p;</div><div class='del'>-</div><div class='del'>-	for (p = haystack; *p; p++)</div><div class='del'>-		if (strcmp(*p, needle) == 0)</div><div class='del'>-			return 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * request_dma_bycap - Allocate a DMA channel based on its capabilities</div><div class='del'>- * @dmac: List of DMA controllers to search</div><div class='del'>- * @caps: List of capabilities</div><div class='del'>- *</div><div class='del'>- * Search all channels of all DMA controllers to find a channel which</div><div class='del'>- * matches the requested capabilities. The result is the channel</div><div class='del'>- * number if a match is found, or %-ENODEV if no match is found.</div><div class='del'>- *</div><div class='del'>- * Note that not all DMA controllers export capabilities, in which</div><div class='del'>- * case they can never be allocated using this API, and so</div><div class='del'>- * request_dma() must be used specifying the channel number.</div><div class='del'>- */</div><div class='del'>-int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id)</div><div class='del'>-{</div><div class='del'>-	unsigned int found = 0;</div><div class='del'>-	struct dma_info *info;</div><div class='del'>-	const char **p;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!dmac || !caps);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(info, &amp;registered_dmac_list, list)</div><div class='del'>-		if (strcmp(*dmac, info-&gt;name) == 0) {</div><div class='del'>-			found = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	if (!found)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; info-&gt;nr_channels; i++) {</div><div class='del'>-		struct dma_channel *channel = &amp;info-&gt;channels[i];</div><div class='del'>-</div><div class='del'>-		if (unlikely(!channel-&gt;caps))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		for (p = caps; *p; p++) {</div><div class='del'>-			if (!search_cap(channel-&gt;caps, *p))</div><div class='del'>-				break;</div><div class='del'>-			if (request_dma(channel-&gt;chan, dev_id) == 0)</div><div class='del'>-				return channel-&gt;chan;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(request_dma_bycap);</div><div class='del'>-</div><div class='del'>-int dmac_search_free_channel(const char *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct dma_channel *channel = { 0 };</div><div class='del'>-	struct dma_info *info = get_dma_info(0);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; info-&gt;nr_channels; i++) {</div><div class='del'>-		channel = &amp;info-&gt;channels[i];</div><div class='del'>-		if (unlikely(!channel))</div><div class='del'>-			return -ENODEV;</div><div class='del'>-</div><div class='del'>-		if (atomic_read(&amp;channel-&gt;busy) == 0)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (info-&gt;ops-&gt;request) {</div><div class='del'>-		int result = info-&gt;ops-&gt;request(channel);</div><div class='del'>-		if (result)</div><div class='del'>-			return result;</div><div class='del'>-</div><div class='del'>-		atomic_set(&amp;channel-&gt;busy, 1);</div><div class='del'>-		return channel-&gt;chan;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENOSYS;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int request_dma(unsigned int chan, const char *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_channel *channel = { 0 };</div><div class='hunk'>@@ -240,35 +138,6 @@ void dma_wait_for_completion(unsigned int chan)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_wait_for_completion);</div><div class='ctx'> </div><div class='del'>-int register_chan_caps(const char *dmac, struct dma_chan_caps *caps)</div><div class='del'>-{</div><div class='del'>-	struct dma_info *info;</div><div class='del'>-	unsigned int found = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(info, &amp;registered_dmac_list, list)</div><div class='del'>-		if (strcmp(dmac, info-&gt;name) == 0) {</div><div class='del'>-			found = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	if (unlikely(!found))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; info-&gt;nr_channels; i++, caps++) {</div><div class='del'>-		struct dma_channel *channel;</div><div class='del'>-</div><div class='del'>-		if ((info-&gt;first_channel_nr + i) != caps-&gt;ch_num)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		channel = &amp;info-&gt;channels[i];</div><div class='del'>-		channel-&gt;caps = caps-&gt;caplist;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(register_chan_caps);</div><div class='del'>-</div><div class='ctx'> void dma_configure_channel(unsigned int chan, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_info *info = get_dma_info(chan);</div><div class='hunk'>@@ -294,18 +163,6 @@ int dma_xfer(unsigned int chan, unsigned long from,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_xfer);</div><div class='ctx'> </div><div class='del'>-int dma_extend(unsigned int chan, unsigned long op, void *param)</div><div class='del'>-{</div><div class='del'>-	struct dma_info *info = get_dma_info(chan);</div><div class='del'>-	struct dma_channel *channel = get_dma_channel(chan);</div><div class='del'>-</div><div class='del'>-	if (info-&gt;ops-&gt;extend)</div><div class='del'>-		return info-&gt;ops-&gt;extend(channel, op, param);</div><div class='del'>-</div><div class='del'>-	return -ENOSYS;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_extend);</div><div class='del'>-</div><div class='ctx'> static int dma_proc_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_info *info = v;</div><div class='head'>diff --git a/arch/sh/drivers/push-switch.c b/arch/sh/drivers/push-switch.c<br/>index 6ecba5f521eb..362e4860bf52 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/drivers/push-switch.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/drivers/push-switch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/drivers/push-switch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/drivers/push-switch.c</a></div><div class='hunk'>@@ -91,7 +91,7 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int switch_drv_remove(struct platform_device *pdev)</div><div class='add'>+static void switch_drv_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct push_switch *psw = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct push_switch_platform_info *psw_info = pdev-&gt;dev.platform_data;</div><div class='hunk'>@@ -106,13 +106,11 @@ static int switch_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 	free_irq(irq, pdev);</div><div class='ctx'> </div><div class='ctx'> 	kfree(psw);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver switch_driver = {</div><div class='ctx'> 	.probe		= switch_drv_probe,</div><div class='del'>-	.remove		= switch_drv_remove,</div><div class='add'>+	.remove_new	= switch_drv_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= DRV_NAME,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h<br/>index 51112f54552b..e6642ff14889 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/cacheflush.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/cacheflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -104,6 +104,18 @@ void kunmap_coherent(void *kvaddr);</div><div class='ctx'> </div><div class='ctx'> void cpu_cache_init(void);</div><div class='ctx'> </div><div class='add'>+void __weak l2_cache_init(void);</div><div class='add'>+</div><div class='add'>+void __weak j2_cache_init(void);</div><div class='add'>+void __weak sh2_cache_init(void);</div><div class='add'>+void __weak sh2a_cache_init(void);</div><div class='add'>+void __weak sh3_cache_init(void);</div><div class='add'>+void __weak shx3_cache_init(void);</div><div class='add'>+void __weak sh4_cache_init(void);</div><div class='add'>+void __weak sh7705_cache_init(void);</div><div class='add'>+</div><div class='add'>+void __weak sh4__flush_region_init(void);</div><div class='add'>+</div><div class='ctx'> static inline void *sh_cacheop_vaddr(void *vaddr)</div><div class='ctx'> {</div><div class='ctx'> 	if (__in_29bit_mode())</div><div class='head'>diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h<br/>index c8bee3f985a2..6b6d409956d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/dma.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/dma.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/dma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/dma.h</a></div><div class='hunk'>@@ -56,7 +56,6 @@ struct dma_ops {</div><div class='ctx'> 	int (*get_residue)(struct dma_channel *chan);</div><div class='ctx'> 	int (*xfer)(struct dma_channel *chan);</div><div class='ctx'> 	int (*configure)(struct dma_channel *chan, unsigned long flags);</div><div class='del'>-	int (*extend)(struct dma_channel *chan, unsigned long op, void *param);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dma_channel {</div><div class='hunk'>@@ -118,8 +117,6 @@ extern int dma_xfer(unsigned int chan, unsigned long from,</div><div class='ctx'> #define dma_read_page(chan, from, to)	\</div><div class='ctx'> 	dma_read(chan, from, to, PAGE_SIZE)</div><div class='ctx'> </div><div class='del'>-extern int request_dma_bycap(const char **dmac, const char **caps,</div><div class='del'>-			     const char *dev_id);</div><div class='ctx'> extern int get_dma_residue(unsigned int chan);</div><div class='ctx'> extern struct dma_info *get_dma_info(unsigned int chan);</div><div class='ctx'> extern struct dma_channel *get_dma_channel(unsigned int chan);</div><div class='hunk'>@@ -128,10 +125,6 @@ extern void dma_configure_channel(unsigned int chan, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> extern int register_dmac(struct dma_info *info);</div><div class='ctx'> extern void unregister_dmac(struct dma_info *info);</div><div class='del'>-extern struct dma_info *get_dma_info_by_name(const char *dmac_name);</div><div class='del'>-</div><div class='del'>-extern int dma_extend(unsigned int chan, unsigned long op, void *param);</div><div class='del'>-extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);</div><div class='ctx'> </div><div class='ctx'> /* arch/sh/drivers/dma/dma-sysfs.c */</div><div class='ctx'> extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);</div><div class='head'>diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h<br/>index 04584be8986c..0379f4cce5ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/fpu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/fpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/fpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/fpu.h</a></div><div class='hunk'>@@ -64,6 +64,9 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void float_raise(unsigned int flags);</div><div class='add'>+int float_rounding_mode(void);</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_SH_FPU_H */</div><div class='head'>diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h<br/>index b1c1dc0cc261..1c10e1066390 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/ftrace.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/ftrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/ftrace.h</a></div><div class='hunk'>@@ -33,6 +33,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr);</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* CONFIG_FUNCTION_TRACER */</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +45,14 @@ extern void *return_address(unsigned int);</div><div class='ctx'> </div><div class='ctx'> #define ftrace_return_address(n) return_address(n)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE</div><div class='add'>+extern void arch_ftrace_nmi_enter(void);</div><div class='add'>+extern void arch_ftrace_nmi_exit(void);</div><div class='add'>+#else</div><div class='add'>+static inline void arch_ftrace_nmi_enter(void) { }</div><div class='add'>+static inline void arch_ftrace_nmi_exit(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_SH_FTRACE_H */</div><div class='head'>diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h<br/>index 361a0f57bdeb..74a438cea655 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/hw_breakpoint.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/hw_breakpoint.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/hw_breakpoint.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/hw_breakpoint.h</a></div><div class='hunk'>@@ -52,6 +52,8 @@ struct pmu;</div><div class='ctx'> </div><div class='ctx'> /* arch/sh/kernel/hw_breakpoint.c */</div><div class='ctx'> extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw);</div><div class='add'>+extern int arch_bp_generic_fields(int sh_len, int sh_type, int *gen_len,</div><div class='add'>+				  int *gen_type);</div><div class='ctx'> extern int hw_breakpoint_arch_parse(struct perf_event *bp,</div><div class='ctx'> 				    const struct perf_event_attr *attr,</div><div class='ctx'> 				    struct arch_hw_breakpoint *hw);</div><div class='head'>diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h<br/>index fc807011187f..84bb23a771f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/setup.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/setup.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/setup.h</a></div><div class='hunk'>@@ -21,5 +21,6 @@</div><div class='ctx'> void sh_mv_setup(void);</div><div class='ctx'> void check_for_initrd(void);</div><div class='ctx'> void per_cpu_trap_init(void);</div><div class='add'>+void sh_fdt_init(phys_addr_t dt_phys);</div><div class='ctx'> </div><div class='ctx'> #endif /* _SH_SETUP_H */</div><div class='head'>diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h<br/>index 387105316d28..39240e06e8aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/syscalls.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/syscalls.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/syscalls.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/syscalls.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@ asmlinkage int old_mmap(unsigned long addr, unsigned long len,</div><div class='ctx'> asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,</div><div class='ctx'> 			  unsigned long prot, unsigned long flags,</div><div class='ctx'> 			  unsigned long fd, unsigned long pgoff);</div><div class='add'>+asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op);</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/syscalls_32.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h<br/>index aeb8915e9254..ddf324bfb9a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/include/asm/tlb.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/include/asm/tlb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/include/asm/tlb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/include/asm/tlb.h</a></div><div class='hunk'>@@ -24,6 +24,10 @@ static inline void tlb_unwire_entry(void)</div><div class='ctx'> 	BUG();</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_CPU_SH4 */</div><div class='add'>+</div><div class='add'>+asmlinkage int handle_tlbmiss(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+			      unsigned long address);</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_MMU */</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* __ASM_SH_TLB_H */</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/opcode_helper.c b/arch/sh/kernel/cpu/sh2a/opcode_helper.c<br/>index c509081d90b9..fcf53f5827eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh2a/opcode_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh2a/opcode_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh2a/opcode_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/cpu/sh2a/opcode_helper.c</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Instructions on SH are generally fixed at 16-bits, however, SH-2A</div><div class='ctx'>  * introduces some 32-bit instructions. Since there are no real</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c<br/>index 83ae1ad4a86e..d64d28c4f059 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7723.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7723.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7723.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/cpu/sh4a/setup-sh7723.c</a></div><div class='hunk'>@@ -14,9 +14,12 @@</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='ctx'> #include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='ctx'> #include &lt;asm/platform_early.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;cpu/sh7723.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Serial */</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c<br/>index 0d990ab1ba2a..ef4b26a4b3d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7724.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7724.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7724.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/cpu/sh4a/setup-sh7724.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/suspend.h&gt;</div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c<br/>index 67e330b7ea46..2ad19a0c5e04 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7757.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7757.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7757.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/cpu/sh4a/setup-sh7757.c</a></div><div class='hunk'>@@ -17,8 +17,11 @@</div><div class='ctx'> #include &lt;linux/sh_dma.h&gt;</div><div class='ctx'> #include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/usb/ohci_pdriver.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;cpu/dma-register.h&gt;</div><div class='ctx'> #include &lt;cpu/sh7757.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mmzone.h&gt;</div><div class='ctx'> #include &lt;asm/platform_early.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct plat_sci_port scif2_platform_data = {</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c<br/>index 74620f30b19b..c048842d8a58 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7786.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/cpu/sh4a/setup-sh7786.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/cpu/sh4a/setup-sh7786.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/cpu/sh4a/setup-sh7786.c</a></div><div class='hunk'>@@ -400,20 +400,6 @@ static struct platform_device *sh7786_devices[] __initdata = {</div><div class='ctx'> 	&amp;usb_ohci_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Please call this function if your platform board</div><div class='del'>- * use external clock for USB</div><div class='del'>- * */</div><div class='del'>-#define USBCTL0		0xffe70858</div><div class='del'>-#define CLOCK_MODE_MASK 0xffffff7f</div><div class='del'>-#define EXT_CLOCK_MODE  0x00000080</div><div class='del'>-</div><div class='del'>-void __init sh7786_usb_use_exclock(void)</div><div class='del'>-{</div><div class='del'>-	u32 val = __raw_readl(USBCTL0) &amp; CLOCK_MODE_MASK;</div><div class='del'>-	__raw_writel(val | EXT_CLOCK_MODE, USBCTL0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define USBINITREG1	0xffe70094</div><div class='ctx'> #define USBINITREG2	0xffe7009c</div><div class='ctx'> #define USBINITVAL1	0x00ff0040</div><div class='head'>diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c<br/>index bf8682e71830..45c8ae20d109 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/dwarf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/dwarf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/dwarf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/dwarf.c</a></div><div class='hunk'>@@ -344,7 +344,7 @@ out:</div><div class='ctx'>  *	dwarf_lookup_fde - locate the FDE that covers pc</div><div class='ctx'>  *	@pc: the program counter</div><div class='ctx'>  */</div><div class='del'>-struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)</div><div class='add'>+static struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_node **rb_node = &amp;fde_root.rb_node;</div><div class='ctx'> 	struct dwarf_fde *fde = NULL;</div><div class='head'>diff --git a/arch/sh/kernel/kprobes.c b/arch/sh/kernel/kprobes.c<br/>index aed1ea8e2c2f..49c4ffd782d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/kprobes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/kprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/kprobes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/kprobes.c</a></div><div class='hunk'>@@ -39,22 +39,17 @@ static DEFINE_PER_CPU(struct kprobe, saved_next_opcode2);</div><div class='ctx'> </div><div class='ctx'> int __kprobes arch_prepare_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='del'>-	kprobe_opcode_t opcode = *(kprobe_opcode_t *) (p-&gt;addr);</div><div class='add'>+	kprobe_opcode_t opcode = *p-&gt;addr;</div><div class='ctx'> </div><div class='ctx'> 	if (OPCODE_RTE(opcode))</div><div class='ctx'> 		return -EFAULT;	/* Bad breakpoint */</div><div class='ctx'> </div><div class='add'>+	memcpy(p-&gt;ainsn.insn, p-&gt;addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));</div><div class='ctx'> 	p-&gt;opcode = opcode;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __kprobes arch_copy_kprobe(struct kprobe *p)</div><div class='del'>-{</div><div class='del'>-	memcpy(p-&gt;ainsn.insn, p-&gt;addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));</div><div class='del'>-	p-&gt;opcode = *p-&gt;addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __kprobes arch_arm_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='ctx'> 	*p-&gt;addr = BREAKPOINT_INSTRUCTION;</div><div class='hunk'>@@ -253,7 +248,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)</div><div class='ctx'> 	p = get_kprobe(addr);</div><div class='ctx'> 	if (!p) {</div><div class='ctx'> 		/* Not one of ours: let kernel handle it */</div><div class='del'>-		if (*(kprobe_opcode_t *)addr != BREAKPOINT_INSTRUCTION) {</div><div class='add'>+		if (*addr != BREAKPOINT_INSTRUCTION) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * The breakpoint instruction was removed right</div><div class='ctx'> 			 * after we hit it. Another cpu has removed</div><div class='hunk'>@@ -301,7 +296,7 @@ static void __used kretprobe_trampoline_holder(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Called when we hit the probe point at __kretprobe_trampoline</div><div class='ctx'>  */</div><div class='del'>-int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs)</div><div class='add'>+static int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	regs-&gt;pc = __kretprobe_trampoline_handler(regs, NULL);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/kernel/return_address.c b/arch/sh/kernel/return_address.c<br/>index 8838094c9ff9..2ce22f11eab3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/return_address.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/return_address.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/return_address.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/return_address.c</a></div><div class='hunk'>@@ -7,7 +7,9 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/dwarf.h&gt;</div><div class='add'>+#include &lt;asm/ftrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DWARF_UNWINDER</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c<br/>index 5cf35a774dc7..108d808767fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/smp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/smp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/smp.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> #include &lt;linux/sched/hotplug.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/profile.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='hunk'>@@ -170,7 +172,7 @@ void native_play_dead(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-asmlinkage void start_secondary(void)</div><div class='add'>+static asmlinkage void start_secondary(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='ctx'> 	struct mm_struct *mm = &amp;init_mm;</div><div class='hunk'>@@ -320,11 +322,13 @@ void smp_message_recv(unsigned int msg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PROFILING</div><div class='ctx'> /* Not really SMP stuff ... */</div><div class='ctx'> int setup_profiling_timer(unsigned int multiplier)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c<br/>index 01884054aeb2..4339c4cafa79 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/traps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/traps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/traps.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/extable.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;	/* print_modules */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/unwinder.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -170,14 +172,6 @@ BUILD_TRAP_HANDLER(bug)</div><div class='ctx'> 	force_sig(SIGTRAP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DYNAMIC_FTRACE</div><div class='del'>-extern void arch_ftrace_nmi_enter(void);</div><div class='del'>-extern void arch_ftrace_nmi_exit(void);</div><div class='del'>-#else</div><div class='del'>-static inline void arch_ftrace_nmi_enter(void) { }</div><div class='del'>-static inline void arch_ftrace_nmi_exit(void) { }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> BUILD_TRAP_HANDLER(nmi)</div><div class='ctx'> {</div><div class='ctx'> 	TRAP_HANDLER_DECL;</div><div class='head'>diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c<br/>index 6cdda3a621a1..1271b839a107 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/kernel/traps_32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/kernel/traps_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/kernel/traps_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/kernel/traps_32.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;asm/alignment.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/kprobes.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/bl_bit.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -568,7 +569,7 @@ uspace_segv:</div><div class='ctx'> /*</div><div class='ctx'>  *	SH-DSP support gerg@snapgear.com.</div><div class='ctx'>  */</div><div class='del'>-int is_dsp_inst(struct pt_regs *regs)</div><div class='add'>+static int is_dsp_inst(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned short inst = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -590,7 +591,7 @@ int is_dsp_inst(struct pt_regs *regs)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-#define is_dsp_inst(regs)	(0)</div><div class='add'>+static inline int is_dsp_inst(struct pt_regs *regs) { return 0; }</div><div class='ctx'> #endif /* CONFIG_SH_DSP */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_SH2A</div><div class='head'>diff --git a/arch/sh/lib/checksum.S b/arch/sh/lib/checksum.S<br/>index 3e07074e0098..06fed5a21e8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/lib/checksum.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/lib/checksum.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/lib/checksum.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/lib/checksum.S</a></div><div class='hunk'>@@ -33,7 +33,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*	</div><div class='del'>- * asmlinkage __wsum csum_partial(const void *buf, int len, __wsum sum);</div><div class='add'>+ * unsigned int csum_partial(const unsigned char *buf, int len,</div><div class='add'>+ *                           unsigned int sum);</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='hunk'>@@ -45,31 +46,11 @@ ENTRY(csum_partial)</div><div class='ctx'> 	   * Fortunately, it is easy to convert 2-byte alignment to 4-byte</div><div class='ctx'> 	   * alignment for the unrolled loop.</div><div class='ctx'> 	   */</div><div class='add'>+	mov	r5, r1</div><div class='ctx'> 	mov	r4, r0</div><div class='del'>-	tst	#3, r0		! Check alignment.</div><div class='del'>-	bt/s	2f		! Jump if alignment is ok.</div><div class='del'>-	 mov	r4, r7		! Keep a copy to check for alignment</div><div class='add'>+	tst	#2, r0		! Check alignment.</div><div class='add'>+	bt	2f		! Jump if alignment is ok.</div><div class='ctx'> 	!</div><div class='del'>-	tst	#1, r0		! Check alignment.</div><div class='del'>-	bt	21f		! Jump if alignment is boundary of 2bytes.</div><div class='del'>-</div><div class='del'>-	! buf is odd</div><div class='del'>-	tst	r5, r5</div><div class='del'>-	add	#-1, r5</div><div class='del'>-	bt	9f</div><div class='del'>-	mov.b	@r4+, r0</div><div class='del'>-	extu.b	r0, r0</div><div class='del'>-	addc	r0, r6		! t=0 from previous tst</div><div class='del'>-	mov	r6, r0</div><div class='del'>-	shll8	r6</div><div class='del'>-	shlr16	r0</div><div class='del'>-	shlr8	r0</div><div class='del'>-	or	r0, r6</div><div class='del'>-	mov	r4, r0</div><div class='del'>-	tst	#2, r0</div><div class='del'>-	bt	2f</div><div class='del'>-21:</div><div class='del'>-	! buf is 2 byte aligned (len could be 0)</div><div class='ctx'> 	add	#-2, r5		! Alignment uses up two bytes.</div><div class='ctx'> 	cmp/pz	r5		!</div><div class='ctx'> 	bt/s	1f		! Jump if we had at least two bytes.</div><div class='hunk'>@@ -77,17 +58,16 @@ ENTRY(csum_partial)</div><div class='ctx'> 	bra	6f</div><div class='ctx'> 	 add	#2, r5		! r5 was &lt; 2.  Deal with it.</div><div class='ctx'> 1:</div><div class='add'>+	mov	r5, r1		! Save new len for later use.</div><div class='ctx'> 	mov.w	@r4+, r0</div><div class='ctx'> 	extu.w	r0, r0</div><div class='ctx'> 	addc	r0, r6</div><div class='ctx'> 	bf	2f</div><div class='ctx'> 	add	#1, r6</div><div class='ctx'> 2:</div><div class='del'>-	! buf is 4 byte aligned (len could be 0)</div><div class='del'>-	mov	r5, r1</div><div class='ctx'> 	mov	#-5, r0</div><div class='del'>-	shld	r0, r1</div><div class='del'>-	tst	r1, r1</div><div class='add'>+	shld	r0, r5</div><div class='add'>+	tst	r5, r5</div><div class='ctx'> 	bt/s	4f		! if it's =0, go to 4f</div><div class='ctx'> 	 clrt</div><div class='ctx'> 	.align	2</div><div class='hunk'>@@ -109,31 +89,30 @@ ENTRY(csum_partial)</div><div class='ctx'> 	addc	r0, r6</div><div class='ctx'> 	addc	r2, r6</div><div class='ctx'> 	movt	r0</div><div class='del'>-	dt	r1</div><div class='add'>+	dt	r5</div><div class='ctx'> 	bf/s	3b</div><div class='ctx'> 	 cmp/eq	#1, r0</div><div class='del'>-	! here, we know r1==0</div><div class='del'>-	addc	r1, r6			! add carry to r6</div><div class='add'>+	! here, we know r5==0</div><div class='add'>+	addc	r5, r6			! add carry to r6</div><div class='ctx'> 4:</div><div class='del'>-	mov	r5, r0</div><div class='add'>+	mov	r1, r0</div><div class='ctx'> 	and	#0x1c, r0</div><div class='ctx'> 	tst	r0, r0</div><div class='del'>-	bt	6f</div><div class='del'>-	! 4 bytes or more remaining</div><div class='del'>-	mov	r0, r1</div><div class='del'>-	shlr2	r1</div><div class='add'>+	bt/s	6f</div><div class='add'>+	 mov	r0, r5</div><div class='add'>+	shlr2	r5</div><div class='ctx'> 	mov	#0, r2</div><div class='ctx'> 5:</div><div class='ctx'> 	addc	r2, r6</div><div class='ctx'> 	mov.l	@r4+, r2</div><div class='ctx'> 	movt	r0</div><div class='del'>-	dt	r1</div><div class='add'>+	dt	r5</div><div class='ctx'> 	bf/s	5b</div><div class='ctx'> 	 cmp/eq	#1, r0</div><div class='ctx'> 	addc	r2, r6</div><div class='del'>-	addc	r1, r6		! r1==0 here, so it means add carry-bit</div><div class='add'>+	addc	r5, r6		! r5==0 here, so it means add carry-bit</div><div class='ctx'> 6:</div><div class='del'>-	! 3 bytes or less remaining</div><div class='add'>+	mov	r1, r5</div><div class='ctx'> 	mov	#3, r0</div><div class='ctx'> 	and	r0, r5</div><div class='ctx'> 	tst	r5, r5</div><div class='hunk'>@@ -159,16 +138,6 @@ ENTRY(csum_partial)</div><div class='ctx'> 	mov	#0, r0</div><div class='ctx'> 	addc	r0, r6</div><div class='ctx'> 9:</div><div class='del'>-	! Check if the buffer was misaligned, if so realign sum</div><div class='del'>-	mov	r7, r0</div><div class='del'>-	tst	#1, r0</div><div class='del'>-	bt	10f</div><div class='del'>-	mov	r6, r0</div><div class='del'>-	shll8	r6</div><div class='del'>-	shlr16	r0</div><div class='del'>-	shlr8	r0</div><div class='del'>-	or	r0, r6</div><div class='del'>-10:</div><div class='ctx'> 	rts</div><div class='ctx'> 	 mov	r6, r0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c<br/>index cdaef6501d76..b65703e06573 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/math-emu/math.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/math-emu/math.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/math-emu/math.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/math-emu/math.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c<br/>index 862046f26981..195e739ee2be 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/mm/cache-sh4.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/cache-sh4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/mm/cache-sh4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/mm/cache-sh4.c</a></div><div class='hunk'>@@ -376,8 +376,6 @@ static void __flush_cache_one(unsigned long addr, unsigned long phys,</div><div class='ctx'> 	} while (--way_count != 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void __weak sh4__flush_region_init(void);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * SH-4 has virtually indexed and physically tagged cache.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/sh/mm/cache-shx3.c b/arch/sh/mm/cache-shx3.c<br/>index 24c58b7dc022..dec039a75664 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/mm/cache-shx3.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/cache-shx3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/mm/cache-shx3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/mm/cache-shx3.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CCR_CACHE_SNM	0x40000		/* Hardware-assisted synonym avoidance */</div><div class='ctx'> #define CCR_CACHE_IBE	0x1000000	/* ICBI broadcast */</div><div class='head'>diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c<br/>index 9bcaa5619eab..ceffd3ffc81e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/mm/cache.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/cache.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/mm/cache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/mm/cache.c</a></div><div class='hunk'>@@ -320,30 +320,20 @@ void __init cpu_cache_init(void)</div><div class='ctx'> 		goto skip;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_data.type == CPU_J2) {</div><div class='del'>-		extern void __weak j2_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 		j2_cache_init();</div><div class='ctx'> 	} else if (boot_cpu_data.family == CPU_FAMILY_SH2) {</div><div class='del'>-		extern void __weak sh2_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 		sh2_cache_init();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_data.family == CPU_FAMILY_SH2A) {</div><div class='del'>-		extern void __weak sh2a_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 		sh2a_cache_init();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_data.family == CPU_FAMILY_SH3) {</div><div class='del'>-		extern void __weak sh3_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 		sh3_cache_init();</div><div class='ctx'> </div><div class='ctx'> 		if ((boot_cpu_data.type == CPU_SH7705) &amp;&amp;</div><div class='ctx'> 		    (boot_cpu_data.dcache.sets == 512)) {</div><div class='del'>-			extern void __weak sh7705_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 			sh7705_cache_init();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -351,14 +341,10 @@ void __init cpu_cache_init(void)</div><div class='ctx'> 	if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||</div><div class='ctx'> 	    (boot_cpu_data.family == CPU_FAMILY_SH4A) ||</div><div class='ctx'> 	    (boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {</div><div class='del'>-		extern void __weak sh4_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 		sh4_cache_init();</div><div class='ctx'> </div><div class='ctx'> 		if ((boot_cpu_data.type == CPU_SH7786) ||</div><div class='ctx'> 		    (boot_cpu_data.type == CPU_SHX3)) {</div><div class='del'>-			extern void __weak shx3_cache_init(void);</div><div class='del'>-</div><div class='ctx'> 			shx3_cache_init();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/sh/mm/nommu.c b/arch/sh/mm/nommu.c<br/>index 78c4b6e6d33b..fa3dc9428a73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/mm/nommu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/nommu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/mm/nommu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/mm/nommu.c</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='head'>diff --git a/arch/sh/mm/pgtable.c b/arch/sh/mm/pgtable.c<br/>index cf7ce4b57359..3a4085ea0161 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/mm/pgtable.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/mm/pgtable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/mm/pgtable.c</a></div><div class='hunk'>@@ -2,12 +2,14 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='add'>+</div><div class='ctx'> static struct kmem_cache *pgd_cachep;</div><div class='ctx'> #if PAGETABLE_LEVELS &gt; 2</div><div class='ctx'> static struct kmem_cache *pmd_cachep;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void pgd_ctor(void *x)</div><div class='add'>+static void pgd_ctor(void *x)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *pgd = x;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/mm/tlbex_32.c b/arch/sh/mm/tlbex_32.c<br/>index 1c53868632ee..7d58578c15f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/mm/tlbex_32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sh/mm/tlbex_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/mm/tlbex_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sh/mm/tlbex_32.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/tlb.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Called with interrupts disabled.</div><div class='head'>diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h<br/>index d0af82c240b7..8c1a3ca34eeb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/include/asm/cmpxchg_32.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/include/asm/cmpxchg_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/include/asm/cmpxchg_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/include/asm/cmpxchg_32.h</a></div><div class='hunk'>@@ -38,21 +38,19 @@ static __always_inline unsigned long __arch_xchg(unsigned long x, __volatile__ v</div><div class='ctx'> </div><div class='ctx'> /* bug catcher for when unsupported size is used - won't link */</div><div class='ctx'> void __cmpxchg_called_with_bad_pointer(void);</div><div class='del'>-/* we only need to support cmpxchg of a u32 on sparc */</div><div class='del'>-unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);</div><div class='add'>+u8 __cmpxchg_u8(volatile u8 *m, u8 old, u8 new_);</div><div class='add'>+u16 __cmpxchg_u16(volatile u16 *m, u16 old, u16 new_);</div><div class='add'>+u32 __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);</div><div class='ctx'> </div><div class='ctx'> /* don't worry...optimizer will get rid of most of this */</div><div class='ctx'> static inline unsigned long</div><div class='ctx'> __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)</div><div class='ctx'> {</div><div class='del'>-	switch (size) {</div><div class='del'>-	case 4:</div><div class='del'>-		return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);</div><div class='del'>-	default:</div><div class='del'>-		__cmpxchg_called_with_bad_pointer();</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return old;</div><div class='add'>+	return</div><div class='add'>+		size == 1 ? __cmpxchg_u8(ptr, old, new_) :</div><div class='add'>+		size == 2 ? __cmpxchg_u16(ptr, old, new_) :</div><div class='add'>+		size == 4 ? __cmpxchg_u32(ptr, old, new_) :</div><div class='add'>+			(__cmpxchg_called_with_bad_pointer(), old);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define arch_cmpxchg(ptr, o, n)						\</div><div class='hunk'>@@ -63,7 +61,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)</div><div class='ctx'> 			(unsigned long)_n_, sizeof(*(ptr)));		\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-u64 __cmpxchg_u64(u64 *ptr, u64 old, u64 new);</div><div class='add'>+u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new);</div><div class='ctx'> #define arch_cmpxchg64(ptr, old, new)	__cmpxchg_u64(ptr, old, new)</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/cmpxchg-local.h&gt;</div><div class='head'>diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h<br/>index 9e85d57ac3f2..62bcafe38b1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/include/asm/pgtable_32.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/include/asm/pgtable_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/include/asm/pgtable_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/include/asm/pgtable_32.h</a></div><div class='hunk'>@@ -432,6 +432,8 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> #define VMALLOC_START           _AC(0xfe600000,UL)</div><div class='ctx'> #define VMALLOC_END             _AC(0xffc00000,UL)</div><div class='add'>+#define MODULES_VADDR           VMALLOC_START</div><div class='add'>+#define MODULES_END             VMALLOC_END</div><div class='ctx'> </div><div class='ctx'> /* We provide our own get_unmapped_area to cope with VA holes for userland */</div><div class='ctx'> #define HAVE_ARCH_UNMAPPED_AREA</div><div class='head'>diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c<br/>index 66c45a2764bc..b8c51cc23d96 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/kernel/module.c</a></div><div class='hunk'>@@ -21,36 +21,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "entry.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC64</div><div class='del'>-</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-</div><div class='del'>-static void *module_map(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	if (PAGE_ALIGN(size) &gt; MODULES_LEN)</div><div class='del'>-		return NULL;</div><div class='del'>-	return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,</div><div class='del'>-				GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE,</div><div class='del'>-				__builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static void *module_map(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return vmalloc(size);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_SPARC64 */</div><div class='del'>-</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	void *ret;</div><div class='del'>-</div><div class='del'>-	ret = module_map(size);</div><div class='del'>-	if (ret)</div><div class='del'>-		memset(ret, 0, size);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Make generic code ignore STT_REGISTER dummy undefined symbols.  */</div><div class='ctx'> int module_frob_arch_sections(Elf_Ehdr *hdr,</div><div class='ctx'> 			      Elf_Shdr *sechdrs,</div><div class='head'>diff --git a/arch/sparc/lib/atomic32.c b/arch/sparc/lib/atomic32.c<br/>index cf80d1ae352b..8ae880ebf07a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/lib/atomic32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/lib/atomic32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/atomic32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/lib/atomic32.c</a></div><div class='hunk'>@@ -159,32 +159,27 @@ unsigned long sp32___change_bit(unsigned long *addr, unsigned long mask)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(sp32___change_bit);</div><div class='ctx'> </div><div class='del'>-unsigned long __cmpxchg_u32(volatile u32 *ptr, u32 old, u32 new)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 prev;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(ATOMIC_HASH(ptr), flags);</div><div class='del'>-	if ((prev = *ptr) == old)</div><div class='del'>-		*ptr = new;</div><div class='del'>-	spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags);</div><div class='del'>-</div><div class='del'>-	return (unsigned long)prev;</div><div class='del'>-}</div><div class='add'>+#define CMPXCHG(T)						\</div><div class='add'>+	T __cmpxchg_##T(volatile T *ptr, T old, T new)		\</div><div class='add'>+	{							\</div><div class='add'>+		unsigned long flags;				\</div><div class='add'>+		T prev;						\</div><div class='add'>+								\</div><div class='add'>+		spin_lock_irqsave(ATOMIC_HASH(ptr), flags);	\</div><div class='add'>+		if ((prev = *ptr) == old)			\</div><div class='add'>+			*ptr = new;				\</div><div class='add'>+		spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags);\</div><div class='add'>+								\</div><div class='add'>+		return prev;					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+CMPXCHG(u8)</div><div class='add'>+CMPXCHG(u16)</div><div class='add'>+CMPXCHG(u32)</div><div class='add'>+CMPXCHG(u64)</div><div class='add'>+EXPORT_SYMBOL(__cmpxchg_u8);</div><div class='add'>+EXPORT_SYMBOL(__cmpxchg_u16);</div><div class='ctx'> EXPORT_SYMBOL(__cmpxchg_u32);</div><div class='del'>-</div><div class='del'>-u64 __cmpxchg_u64(u64 *ptr, u64 old, u64 new)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u64 prev;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(ATOMIC_HASH(ptr), flags);</div><div class='del'>-	if ((prev = *ptr) == old)</div><div class='del'>-		*ptr = new;</div><div class='del'>-	spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags);</div><div class='del'>-</div><div class='del'>-	return prev;</div><div class='del'>-}</div><div class='ctx'> EXPORT_SYMBOL(__cmpxchg_u64);</div><div class='ctx'> </div><div class='ctx'> unsigned long __xchg_u32(volatile u32 *ptr, u32 new)</div><div class='head'>diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile<br/>index 809d993f6d88..2d1752108d77 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/mm/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/mm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/mm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/mm/Makefile</a></div><div class='hunk'>@@ -14,3 +14,5 @@ obj-$(CONFIG_SPARC32)   += leon_mm.o</div><div class='ctx'> </div><div class='ctx'> # Only used by sparc64</div><div class='ctx'> obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_EXECMEM)	+= execmem.o</div><div class='head'>diff --git a/arch/sparc/mm/execmem.c b/arch/sparc/mm/execmem.c<br/>new file mode 100644<br/>index 000000000000..0fac97dd5728<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/mm/execmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/mm/execmem.c</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='add'>+</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.start	= MODULES_VADDR,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sparc/net/bpf_jit_comp_32.c b/arch/sparc/net/bpf_jit_comp_32.c<br/>index da2df1e84ed4..bda2dbd3f4c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/net/bpf_jit_comp_32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/net/bpf_jit_comp_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/net/bpf_jit_comp_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/net/bpf_jit_comp_32.c</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='hunk'>@@ -713,7 +713,7 @@ cond_branch:			f_offset = addrs[i + filter[i].jf];</div><div class='ctx'> 				if (unlikely(proglen + ilen &gt; oldproglen)) {</div><div class='ctx'> 					pr_err("bpb_jit_compile fatal error\n");</div><div class='ctx'> 					kfree(addrs);</div><div class='del'>-					module_memfree(image);</div><div class='add'>+					execmem_free(image);</div><div class='ctx'> 					return;</div><div class='ctx'> 				}</div><div class='ctx'> 				memcpy(image + proglen, temp, ilen);</div><div class='hunk'>@@ -736,7 +736,7 @@ cond_branch:			f_offset = addrs[i + filter[i].jf];</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (proglen == oldproglen) {</div><div class='del'>-			image = module_alloc(proglen);</div><div class='add'>+			image = execmem_alloc(EXECMEM_BPF, proglen);</div><div class='ctx'> 			if (!image)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -758,7 +758,7 @@ out:</div><div class='ctx'> void bpf_jit_free(struct bpf_prog *fp)</div><div class='ctx'> {</div><div class='ctx'> 	if (fp-&gt;jited)</div><div class='del'>-		module_memfree(fp-&gt;bpf_func);</div><div class='add'>+		execmem_free(fp-&gt;bpf_func);</div><div class='ctx'> </div><div class='ctx'> 	bpf_prog_unlock_free(fp);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/net/bpf_jit_comp_64.c b/arch/sparc/net/bpf_jit_comp_64.c<br/>index fa0759bfe498..73bf0aea8baf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/net/bpf_jit_comp_64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/sparc/net/bpf_jit_comp_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/net/bpf_jit_comp_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/sparc/net/bpf_jit_comp_64.c</a></div><div class='hunk'>@@ -1602,7 +1602,11 @@ skip_init_ctx:</div><div class='ctx'> 	bpf_flush_icache(header, (u8 *)header + header-&gt;size);</div><div class='ctx'> </div><div class='ctx'> 	if (!prog-&gt;is_func || extra_pass) {</div><div class='del'>-		bpf_jit_binary_lock_ro(header);</div><div class='add'>+		if (bpf_jit_binary_lock_ro(header)) {</div><div class='add'>+			bpf_jit_binary_free(header);</div><div class='add'>+			prog = orig_prog;</div><div class='add'>+			goto out_off;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		jit_data-&gt;ctx = ctx;</div><div class='ctx'> 		jit_data-&gt;image = image_ptr;</div><div class='head'>diff --git a/arch/um/include/asm/cpufeature.h b/arch/um/include/asm/cpufeature.h<br/>index 66fe06db872f..1eb8b834fbec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/um/include/asm/cpufeature.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/um/include/asm/cpufeature.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/um/include/asm/cpufeature.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/um/include/asm/cpufeature.h</a></div><div class='hunk'>@@ -38,8 +38,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];</div><div class='ctx'> </div><div class='ctx'> #define this_cpu_has(bit)						\</div><div class='ctx'> 	(__builtin_constant_p(bit) &amp;&amp; REQUIRED_MASK_BIT_SET(bit) ? 1 :	\</div><div class='del'>-	 x86_this_cpu_test_bit(bit,					\</div><div class='del'>-		(unsigned long __percpu *)&amp;cpu_info.x86_capability))</div><div class='add'>+	 x86_this_cpu_test_bit(bit, cpu_info.x86_capability))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This macro is for detection of features which need kernel</div><div class='head'>diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig<br/>index 4474bf32d0a4..bc47bc9841ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/Kconfig</a></div><div class='hunk'>@@ -34,6 +34,7 @@ config X86_64</div><div class='ctx'> 	select SWIOTLB</div><div class='ctx'> 	select ARCH_HAS_ELFCORE_COMPAT</div><div class='ctx'> 	select ZONE_DMA32</div><div class='add'>+	select EXECMEM if DYNAMIC_FTRACE</div><div class='ctx'> </div><div class='ctx'> config FORCE_DYNAMIC_FTRACE</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -62,6 +63,7 @@ config X86</div><div class='ctx'> 	select ACPI_HOTPLUG_CPU			if ACPI_PROCESSOR &amp;&amp; HOTPLUG_CPU</div><div class='ctx'> 	select ARCH_32BIT_OFF_T			if X86_32</div><div class='ctx'> 	select ARCH_CLOCKSOURCE_INIT</div><div class='add'>+	select ARCH_CONFIGURES_CPU_MITIGATIONS</div><div class='ctx'> 	select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE</div><div class='ctx'> 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 &amp;&amp; HUGETLB_PAGE &amp;&amp; MIGRATION</div><div class='ctx'> 	select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64</div><div class='hunk'>@@ -168,6 +170,7 @@ config X86</div><div class='ctx'> 	select GENERIC_TIME_VSYSCALL</div><div class='ctx'> 	select GENERIC_GETTIMEOFDAY</div><div class='ctx'> 	select GENERIC_VDSO_TIME_NS</div><div class='add'>+	select GENERIC_VDSO_OVERFLOW_PROTECT</div><div class='ctx'> 	select GUP_GET_PXX_LOW_HIGH		if X86_PAE</div><div class='ctx'> 	select HARDIRQS_SW_RESEND</div><div class='ctx'> 	select HARDLOCKUP_CHECK_TIMESTAMP	if X86_64</div><div class='hunk'>@@ -464,6 +467,17 @@ config X86_X2APIC</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say N.</div><div class='ctx'> </div><div class='add'>+config X86_POSTED_MSI</div><div class='add'>+	bool "Enable MSI and MSI-x delivery by posted interrupts"</div><div class='add'>+	depends on X86_64 &amp;&amp; IRQ_REMAP</div><div class='add'>+	help</div><div class='add'>+	  This enables MSIs that are under interrupt remapping to be delivered as</div><div class='add'>+	  posted interrupts to the host kernel. Interrupt throughput can</div><div class='add'>+	  potentially be improved by coalescing CPU notifications during high</div><div class='add'>+	  frequency bursts.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say N.</div><div class='add'>+</div><div class='ctx'> config X86_MPPARSE</div><div class='ctx'> 	bool "Enable MPS table" if ACPI</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -500,12 +514,11 @@ config X86_FRED</div><div class='ctx'> 	  When enabled, try to use Flexible Return and Event Delivery</div><div class='ctx'> 	  instead of the legacy SYSCALL/SYSENTER/IDT architecture for</div><div class='ctx'> 	  ring transitions and exception/interrupt handling if the</div><div class='del'>-	  system supports.</div><div class='add'>+	  system supports it.</div><div class='ctx'> </div><div class='del'>-if X86_32</div><div class='ctx'> config X86_BIGSMP</div><div class='ctx'> 	bool "Support for big SMP systems with more than 8 CPUs"</div><div class='del'>-	depends on SMP</div><div class='add'>+	depends on SMP &amp;&amp; X86_32</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option is needed for the systems that have more than 8 CPUs.</div><div class='ctx'> </div><div class='hunk'>@@ -518,7 +531,10 @@ config X86_EXTENDED_PLATFORM</div><div class='ctx'> 	  systems out there.)</div><div class='ctx'> </div><div class='ctx'> 	  If you enable this option then you'll be able to select support</div><div class='del'>-	  for the following (non-PC) 32 bit x86 platforms:</div><div class='add'>+	  for the following non-PC x86 platforms, depending on the value of</div><div class='add'>+	  CONFIG_64BIT.</div><div class='add'>+</div><div class='add'>+	  32-bit platforms (CONFIG_64BIT=n):</div><div class='ctx'> 		Goldfish (Android emulator)</div><div class='ctx'> 		AMD Elan</div><div class='ctx'> 		RDC R-321x SoC</div><div class='hunk'>@@ -526,28 +542,14 @@ config X86_EXTENDED_PLATFORM</div><div class='ctx'> 		STA2X11-based (e.g. Northville)</div><div class='ctx'> 		Moorestown MID devices</div><div class='ctx'> </div><div class='del'>-	  If you have one of these systems, or if you want to build a</div><div class='del'>-	  generic distribution kernel, say Y here - otherwise say N.</div><div class='del'>-endif # X86_32</div><div class='del'>-</div><div class='del'>-if X86_64</div><div class='del'>-config X86_EXTENDED_PLATFORM</div><div class='del'>-	bool "Support for extended (non-PC) x86 platforms"</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  If you disable this option then the kernel will only support</div><div class='del'>-	  standard PC platforms. (which covers the vast majority of</div><div class='del'>-	  systems out there.)</div><div class='del'>-</div><div class='del'>-	  If you enable this option then you'll be able to select support</div><div class='del'>-	  for the following (non-PC) 64 bit x86 platforms:</div><div class='add'>+	  64-bit platforms (CONFIG_64BIT=y):</div><div class='ctx'> 		Numascale NumaChip</div><div class='ctx'> 		ScaleMP vSMP</div><div class='ctx'> 		SGI Ultraviolet</div><div class='ctx'> </div><div class='ctx'> 	  If you have one of these systems, or if you want to build a</div><div class='ctx'> 	  generic distribution kernel, say Y here - otherwise say N.</div><div class='del'>-endif # X86_64</div><div class='add'>+</div><div class='ctx'> # This is an alphabetically sorted list of 64 bit extended platforms</div><div class='ctx'> # Please maintain the alphabetic order if and when there are additions</div><div class='ctx'> config X86_NUMACHIP</div><div class='hunk'>@@ -2429,18 +2431,20 @@ source "kernel/livepatch/Kconfig"</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> config CC_HAS_NAMED_AS</div><div class='del'>-	def_bool CC_IS_GCC &amp;&amp; GCC_VERSION &gt;= 120100</div><div class='add'>+	def_bool CC_IS_GCC &amp;&amp; GCC_VERSION &gt;= 90100</div><div class='add'>+</div><div class='add'>+config CC_HAS_NAMED_AS_FIXED_SANITIZERS</div><div class='add'>+	def_bool CC_IS_GCC &amp;&amp; GCC_VERSION &gt;= 130300</div><div class='ctx'> </div><div class='ctx'> config USE_X86_SEG_SUPPORT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on CC_HAS_NAMED_AS</div><div class='ctx'> 	#</div><div class='del'>-	# -fsanitize=kernel-address (KASAN) is at the moment incompatible</div><div class='del'>-	# with named address spaces - see GCC PR sanitizer/111736.</div><div class='add'>+	# -fsanitize=kernel-address (KASAN) and -fsanitize=thread</div><div class='add'>+	# (KCSAN) are incompatible with named address spaces with</div><div class='add'>+	# GCC &lt; 13.3 - see GCC PR sanitizer/111736.</div><div class='ctx'> 	#</div><div class='del'>-	depends on !KASAN</div><div class='del'>-	# -fsanitize=thread (KCSAN) is also incompatible.</div><div class='del'>-	depends on !KCSAN</div><div class='add'>+	depends on !(KASAN || KCSAN) || CC_HAS_NAMED_AS_FIXED_SANITIZERS</div><div class='ctx'> </div><div class='ctx'> config CC_HAS_SLS</div><div class='ctx'> 	def_bool $(cc-option,-mharden-sls=all)</div><div class='hunk'>@@ -2488,17 +2492,21 @@ config PREFIX_SYMBOLS</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on CALL_PADDING &amp;&amp; !CFI_CLANG</div><div class='ctx'> </div><div class='del'>-menuconfig SPECULATION_MITIGATIONS</div><div class='del'>-	bool "Mitigations for speculative execution vulnerabilities"</div><div class='add'>+menuconfig CPU_MITIGATIONS</div><div class='add'>+	bool "Mitigations for CPU vulnerabilities"</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  Say Y here to enable options which enable mitigations for</div><div class='del'>-	  speculative execution hardware vulnerabilities.</div><div class='add'>+	  Say Y here to enable options which enable mitigations for hardware</div><div class='add'>+	  vulnerabilities (usually related to speculative execution).</div><div class='add'>+	  Mitigations can be disabled or restricted to SMT systems at runtime</div><div class='add'>+	  via the "mitigations" kernel parameter.</div><div class='add'>+</div><div class='add'>+	  If you say N, all mitigations will be disabled.  This CANNOT be</div><div class='add'>+	  overridden at runtime.</div><div class='ctx'> </div><div class='del'>-	  If you say N, all mitigations will be disabled. You really</div><div class='del'>-	  should know what you are doing to say so.</div><div class='add'>+	  Say 'Y', unless you really know what you are doing.</div><div class='ctx'> </div><div class='del'>-if SPECULATION_MITIGATIONS</div><div class='add'>+if CPU_MITIGATIONS</div><div class='ctx'> </div><div class='ctx'> config MITIGATION_PAGE_TABLE_ISOLATION</div><div class='ctx'> 	bool "Remove the kernel mapping in user mode"</div><div class='head'>diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler<br/>index 8ad41da301e5..59aedf32c4ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.assembler?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/Kconfig.assembler</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.assembler?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/Kconfig.assembler</a></div><div class='hunk'>@@ -25,6 +25,16 @@ config AS_GFNI</div><div class='ctx'> 	help</div><div class='ctx'> 	  Supported by binutils &gt;= 2.30 and LLVM integrated assembler</div><div class='ctx'> </div><div class='add'>+config AS_VAES</div><div class='add'>+	def_bool $(as-instr,vaesenc %ymm0$(comma)%ymm1$(comma)%ymm2)</div><div class='add'>+	help</div><div class='add'>+	  Supported by binutils &gt;= 2.30 and LLVM integrated assembler</div><div class='add'>+</div><div class='add'>+config AS_VPCLMULQDQ</div><div class='add'>+	def_bool $(as-instr,vpclmulqdq \$0x10$(comma)%ymm0$(comma)%ymm1$(comma)%ymm2)</div><div class='add'>+	help</div><div class='add'>+	  Supported by binutils &gt;= 2.30 and LLVM integrated assembler</div><div class='add'>+</div><div class='ctx'> config AS_WRUSS</div><div class='ctx'> 	def_bool $(as-instr,wrussq %rax$(comma)(%rbx))</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S<br/>index bf4a10a5794f..1dcb794c5479 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/head_64.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/boot/compressed/head_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/head_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/boot/compressed/head_64.S</a></div><div class='hunk'>@@ -398,6 +398,11 @@ SYM_CODE_START(startup_64)</div><div class='ctx'> 	call	sev_enable</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	/* Preserve only the CR4 bits that must be preserved, and clear the rest */</div><div class='add'>+	movq	%cr4, %rax</div><div class='add'>+	andl	$(X86_CR4_PAE | X86_CR4_MCE | X86_CR4_LA57), %eax</div><div class='add'>+	movq	%rax, %cr4</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * configure_5level_paging() updates the number of paging levels using</div><div class='ctx'> 	 * a trampoline in 32-bit addressable memory if the current number does</div><div class='head'>diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c<br/>index ec71846d28c9..0457a9d7e515 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/boot/compressed/sev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/boot/compressed/sev.c</a></div><div class='hunk'>@@ -335,26 +335,6 @@ finish:</div><div class='ctx'> 		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enforce_vmpl0(void)</div><div class='del'>-{</div><div class='del'>-	u64 attrs;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * RMPADJUST modifies RMP permissions of a lesser-privileged (numerically</div><div class='del'>-	 * higher) privilege level. Here, clear the VMPL1 permission mask of the</div><div class='del'>-	 * GHCB page. If the guest is not running at VMPL0, this will fail.</div><div class='del'>-	 *</div><div class='del'>-	 * If the guest is running at VMPL0, it will succeed. Even if that operation</div><div class='del'>-	 * modifies permission bits, it is still ok to do so currently because Linux</div><div class='del'>-	 * SNP guests are supported only on VMPL0 so VMPL1 or higher permission masks</div><div class='del'>-	 * changing is a don't-care.</div><div class='del'>-	 */</div><div class='del'>-	attrs = 1;</div><div class='del'>-	if (rmpadjust((unsigned long)&amp;boot_ghcb_page, RMP_PG_SIZE_4K, attrs))</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_NOT_VMPL0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * SNP_FEATURES_IMPL_REQ is the mask of SNP features that will need</div><div class='ctx'>  * guest side implementation for proper functioning of the guest. If any</div><div class='hunk'>@@ -413,6 +393,85 @@ void snp_check_features(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Search for Confidential Computing blob in the EFI config table. */</div><div class='add'>+static struct cc_blob_sev_info *find_cc_blob_efi(struct boot_params *bp)</div><div class='add'>+{</div><div class='add'>+	unsigned long cfg_table_pa;</div><div class='add'>+	unsigned int cfg_table_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = efi_get_conf_table(bp, &amp;cfg_table_pa, &amp;cfg_table_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return (struct cc_blob_sev_info *)efi_find_vendor_table(bp, cfg_table_pa,</div><div class='add'>+								cfg_table_len,</div><div class='add'>+								EFI_CC_BLOB_GUID);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initial set up of SNP relies on information provided by the</div><div class='add'>+ * Confidential Computing blob, which can be passed to the boot kernel</div><div class='add'>+ * by firmware/bootloader in the following ways:</div><div class='add'>+ *</div><div class='add'>+ * - via an entry in the EFI config table</div><div class='add'>+ * - via a setup_data structure, as defined by the Linux Boot Protocol</div><div class='add'>+ *</div><div class='add'>+ * Scan for the blob in that order.</div><div class='add'>+ */</div><div class='add'>+static struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp)</div><div class='add'>+{</div><div class='add'>+	struct cc_blob_sev_info *cc_info;</div><div class='add'>+</div><div class='add'>+	cc_info = find_cc_blob_efi(bp);</div><div class='add'>+	if (cc_info)</div><div class='add'>+		goto found_cc_info;</div><div class='add'>+</div><div class='add'>+	cc_info = find_cc_blob_setup_data(bp);</div><div class='add'>+	if (!cc_info)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+found_cc_info:</div><div class='add'>+	if (cc_info-&gt;magic != CC_BLOB_SEV_HDR_MAGIC)</div><div class='add'>+		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);</div><div class='add'>+</div><div class='add'>+	return cc_info;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Indicate SNP based on presence of SNP-specific CC blob. Subsequent checks</div><div class='add'>+ * will verify the SNP CPUID/MSR bits.</div><div class='add'>+ */</div><div class='add'>+static bool early_snp_init(struct boot_params *bp)</div><div class='add'>+{</div><div class='add'>+	struct cc_blob_sev_info *cc_info;</div><div class='add'>+</div><div class='add'>+	if (!bp)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	cc_info = find_cc_blob(bp);</div><div class='add'>+	if (!cc_info)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If a SNP-specific Confidential Computing blob is present, then</div><div class='add'>+	 * firmware/bootloader have indicated SNP support. Verifying this</div><div class='add'>+	 * involves CPUID checks which will be more reliable if the SNP</div><div class='add'>+	 * CPUID table is used. See comments over snp_setup_cpuid_table() for</div><div class='add'>+	 * more details.</div><div class='add'>+	 */</div><div class='add'>+	setup_cpuid_table(cc_info);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Pass run-time kernel a pointer to CC info via boot_params so EFI</div><div class='add'>+	 * config table doesn't need to be searched again during early startup</div><div class='add'>+	 * phase.</div><div class='add'>+	 */</div><div class='add'>+	bp-&gt;cc_blob_address = (u32)(unsigned long)cc_info;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * sev_check_cpu_support - Check for SEV support in the CPU capabilities</div><div class='ctx'>  *</div><div class='hunk'>@@ -463,7 +522,7 @@ void sev_enable(struct boot_params *bp)</div><div class='ctx'> 		bp-&gt;cc_blob_address = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Do an initial SEV capability check before snp_init() which</div><div class='add'>+	 * Do an initial SEV capability check before early_snp_init() which</div><div class='ctx'> 	 * loads the CPUID page and the same checks afterwards are done</div><div class='ctx'> 	 * without the hypervisor and are trustworthy.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -478,7 +537,7 @@ void sev_enable(struct boot_params *bp)</div><div class='ctx'> 	 * Setup/preliminary detection of SNP. This will be sanity-checked</div><div class='ctx'> 	 * against CPUID/MSR values later.</div><div class='ctx'> 	 */</div><div class='del'>-	snp = snp_init(bp);</div><div class='add'>+	snp = early_snp_init(bp);</div><div class='ctx'> </div><div class='ctx'> 	/* Now repeat the checks with the SNP CPUID table. */</div><div class='ctx'> </div><div class='hunk'>@@ -509,7 +568,20 @@ void sev_enable(struct boot_params *bp)</div><div class='ctx'> 		if (!(get_hv_features() &amp; GHCB_HV_FT_SNP))</div><div class='ctx'> 			sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);</div><div class='ctx'> </div><div class='del'>-		enforce_vmpl0();</div><div class='add'>+		/*</div><div class='add'>+		 * Enforce running at VMPL0.</div><div class='add'>+		 *</div><div class='add'>+		 * RMPADJUST modifies RMP permissions of a lesser-privileged (numerically</div><div class='add'>+		 * higher) privilege level. Here, clear the VMPL1 permission mask of the</div><div class='add'>+		 * GHCB page. If the guest is not running at VMPL0, this will fail.</div><div class='add'>+		 *</div><div class='add'>+		 * If the guest is running at VMPL0, it will succeed. Even if that operation</div><div class='add'>+		 * modifies permission bits, it is still ok to do so currently because Linux</div><div class='add'>+		 * SNP guests running at VMPL0 only run at VMPL0, so VMPL1 or higher</div><div class='add'>+		 * permission mask changes are a don't-care.</div><div class='add'>+		 */</div><div class='add'>+		if (rmpadjust((unsigned long)&amp;boot_ghcb_page, RMP_PG_SIZE_4K, 1))</div><div class='add'>+			sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_NOT_VMPL0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (snp &amp;&amp; !(sev_status &amp; MSR_AMD64_SEV_SNP_ENABLED))</div><div class='hunk'>@@ -535,85 +607,6 @@ u64 sev_get_status(void)</div><div class='ctx'> 	return m.q;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Search for Confidential Computing blob in the EFI config table. */</div><div class='del'>-static struct cc_blob_sev_info *find_cc_blob_efi(struct boot_params *bp)</div><div class='del'>-{</div><div class='del'>-	unsigned long cfg_table_pa;</div><div class='del'>-	unsigned int cfg_table_len;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = efi_get_conf_table(bp, &amp;cfg_table_pa, &amp;cfg_table_len);</div><div class='del'>-	if (ret)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return (struct cc_blob_sev_info *)efi_find_vendor_table(bp, cfg_table_pa,</div><div class='del'>-								cfg_table_len,</div><div class='del'>-								EFI_CC_BLOB_GUID);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial set up of SNP relies on information provided by the</div><div class='del'>- * Confidential Computing blob, which can be passed to the boot kernel</div><div class='del'>- * by firmware/bootloader in the following ways:</div><div class='del'>- *</div><div class='del'>- * - via an entry in the EFI config table</div><div class='del'>- * - via a setup_data structure, as defined by the Linux Boot Protocol</div><div class='del'>- *</div><div class='del'>- * Scan for the blob in that order.</div><div class='del'>- */</div><div class='del'>-static struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp)</div><div class='del'>-{</div><div class='del'>-	struct cc_blob_sev_info *cc_info;</div><div class='del'>-</div><div class='del'>-	cc_info = find_cc_blob_efi(bp);</div><div class='del'>-	if (cc_info)</div><div class='del'>-		goto found_cc_info;</div><div class='del'>-</div><div class='del'>-	cc_info = find_cc_blob_setup_data(bp);</div><div class='del'>-	if (!cc_info)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-found_cc_info:</div><div class='del'>-	if (cc_info-&gt;magic != CC_BLOB_SEV_HDR_MAGIC)</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);</div><div class='del'>-</div><div class='del'>-	return cc_info;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Indicate SNP based on presence of SNP-specific CC blob. Subsequent checks</div><div class='del'>- * will verify the SNP CPUID/MSR bits.</div><div class='del'>- */</div><div class='del'>-bool snp_init(struct boot_params *bp)</div><div class='del'>-{</div><div class='del'>-	struct cc_blob_sev_info *cc_info;</div><div class='del'>-</div><div class='del'>-	if (!bp)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	cc_info = find_cc_blob(bp);</div><div class='del'>-	if (!cc_info)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If a SNP-specific Confidential Computing blob is present, then</div><div class='del'>-	 * firmware/bootloader have indicated SNP support. Verifying this</div><div class='del'>-	 * involves CPUID checks which will be more reliable if the SNP</div><div class='del'>-	 * CPUID table is used. See comments over snp_setup_cpuid_table() for</div><div class='del'>-	 * more details.</div><div class='del'>-	 */</div><div class='del'>-	setup_cpuid_table(cc_info);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Pass run-time kernel a pointer to CC info via boot_params so EFI</div><div class='del'>-	 * config table doesn't need to be searched again during early startup</div><div class='del'>-	 * phase.</div><div class='del'>-	 */</div><div class='del'>-	bp-&gt;cc_blob_address = (u32)(unsigned long)cc_info;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void sev_prep_identity_maps(unsigned long top_level_pgt)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c<br/>index c4ea5258ab55..9049f390d834 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/boot/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/boot/main.c</a></div><div class='hunk'>@@ -119,8 +119,8 @@ static void init_heap(void)</div><div class='ctx'> 	char *stack_end;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_params.hdr.loadflags &amp; CAN_USE_HEAP) {</div><div class='del'>-		asm("leal %P1(%%esp),%0"</div><div class='del'>-		    : "=r" (stack_end) : "i" (-STACK_SIZE));</div><div class='add'>+		asm("leal %n1(%%esp),%0"</div><div class='add'>+		    : "=r" (stack_end) : "i" (STACK_SIZE));</div><div class='ctx'> </div><div class='ctx'> 		heap_end = (char *)</div><div class='ctx'> 			((size_t)boot_params.hdr.heap_end_ptr + 0x200);</div><div class='head'>diff --git a/arch/x86/configs/hardening.config b/arch/x86/configs/hardening.config<br/>index 7b497f3b7bc3..de319852a1e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/configs/hardening.config?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/configs/hardening.config</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/configs/hardening.config?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/configs/hardening.config</a></div><div class='hunk'>@@ -10,5 +10,8 @@ CONFIG_INTEL_IOMMU_DEFAULT_ON=y</div><div class='ctx'> CONFIG_INTEL_IOMMU_SVM=y</div><div class='ctx'> CONFIG_AMD_IOMMU=y</div><div class='ctx'> </div><div class='add'>+# Enforce CET Indirect Branch Tracking in the kernel.</div><div class='add'>+CONFIG_X86_KERNEL_IBT=y</div><div class='add'>+</div><div class='ctx'> # Enable CET Shadow Stack for userspace.</div><div class='ctx'> CONFIG_X86_USER_SHADOW_STACK=y</div><div class='head'>diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile<br/>index 9aa46093c91b..9c5ce5613738 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/Makefile</a></div><div class='hunk'>@@ -48,7 +48,8 @@ chacha-x86_64-$(CONFIG_AS_AVX512) += chacha-avx512vl-x86_64.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o</div><div class='ctx'> aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o</div><div class='del'>-aesni-intel-$(CONFIG_64BIT) += aesni-intel_avx-x86_64.o aes_ctrby8_avx-x86_64.o</div><div class='add'>+aesni-intel-$(CONFIG_64BIT) += aesni-intel_avx-x86_64.o \</div><div class='add'>+	aes_ctrby8_avx-x86_64.o aes-xts-avx-x86_64.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o</div><div class='ctx'> sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ssse3_glue.o</div><div class='head'>diff --git a/arch/x86/crypto/aes-xts-avx-x86_64.S b/arch/x86/crypto/aes-xts-avx-x86_64.S<br/>new file mode 100644<br/>index 000000000000..48f97b79f7a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aes-xts-avx-x86_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/aes-xts-avx-x86_64.S</a></div><div class='hunk'>@@ -0,0 +1,845 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * AES-XTS for modern x86_64 CPUs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ *</div><div class='add'>+ * Author: Eric Biggers &lt;ebiggers@google.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file implements AES-XTS for modern x86_64 CPUs.  To handle the</div><div class='add'>+ * complexities of coding for x86 SIMD, e.g. where every vector length needs</div><div class='add'>+ * different code, it uses a macro to generate several implementations that</div><div class='add'>+ * share similar source code but are targeted at different CPUs, listed below:</div><div class='add'>+ *</div><div class='add'>+ * AES-NI + AVX</div><div class='add'>+ *    - 128-bit vectors (1 AES block per vector)</div><div class='add'>+ *    - VEX-coded instructions</div><div class='add'>+ *    - xmm0-xmm15</div><div class='add'>+ *    - This is for older CPUs that lack VAES but do have AVX.</div><div class='add'>+ *</div><div class='add'>+ * VAES + VPCLMULQDQ + AVX2</div><div class='add'>+ *    - 256-bit vectors (2 AES blocks per vector)</div><div class='add'>+ *    - VEX-coded instructions</div><div class='add'>+ *    - ymm0-ymm15</div><div class='add'>+ *    - This is for CPUs that have VAES but lack AVX512 or AVX10,</div><div class='add'>+ *      e.g. Intel's Alder Lake and AMD's Zen 3.</div><div class='add'>+ *</div><div class='add'>+ * VAES + VPCLMULQDQ + AVX10/256 + BMI2</div><div class='add'>+ *    - 256-bit vectors (2 AES blocks per vector)</div><div class='add'>+ *    - EVEX-coded instructions</div><div class='add'>+ *    - ymm0-ymm31</div><div class='add'>+ *    - This is for CPUs that have AVX512 but where using zmm registers causes</div><div class='add'>+ *      downclocking, and for CPUs that have AVX10/256 but not AVX10/512.</div><div class='add'>+ *    - By "AVX10/256" we really mean (AVX512BW + AVX512VL) || AVX10/256.</div><div class='add'>+ *      To avoid confusion with 512-bit, we just write AVX10/256.</div><div class='add'>+ *</div><div class='add'>+ * VAES + VPCLMULQDQ + AVX10/512 + BMI2</div><div class='add'>+ *    - Same as the previous one, but upgrades to 512-bit vectors</div><div class='add'>+ *      (4 AES blocks per vector) in zmm0-zmm31.</div><div class='add'>+ *    - This is for CPUs that have good AVX512 or AVX10/512 support.</div><div class='add'>+ *</div><div class='add'>+ * This file doesn't have an implementation for AES-NI alone (without AVX), as</div><div class='add'>+ * the lack of VEX would make all the assembly code different.</div><div class='add'>+ *</div><div class='add'>+ * When we use VAES, we also use VPCLMULQDQ to parallelize the computation of</div><div class='add'>+ * the XTS tweaks.  This avoids a bottleneck.  Currently there don't seem to be</div><div class='add'>+ * any CPUs that support VAES but not VPCLMULQDQ.  If that changes, we might</div><div class='add'>+ * need to start also providing an implementation using VAES alone.</div><div class='add'>+ *</div><div class='add'>+ * The AES-XTS implementations in this file support everything required by the</div><div class='add'>+ * crypto API, including support for arbitrary input lengths and multi-part</div><div class='add'>+ * processing.  However, they are most heavily optimized for the common case of</div><div class='add'>+ * power-of-2 length inputs that are processed in a single part (disk sectors).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+</div><div class='add'>+.section .rodata</div><div class='add'>+.p2align 4</div><div class='add'>+.Lgf_poly:</div><div class='add'>+	// The low 64 bits of this value represent the polynomial x^7 + x^2 + x</div><div class='add'>+	// + 1.  It is the value that must be XOR'd into the low 64 bits of the</div><div class='add'>+	// tweak each time a 1 is carried out of the high 64 bits.</div><div class='add'>+	//</div><div class='add'>+	// The high 64 bits of this value is just the internal carry bit that</div><div class='add'>+	// exists when there's a carry out of the low 64 bits of the tweak.</div><div class='add'>+	.quad	0x87, 1</div><div class='add'>+</div><div class='add'>+	// This table contains constants for vpshufb and vpblendvb, used to</div><div class='add'>+	// handle variable byte shifts and blending during ciphertext stealing</div><div class='add'>+	// on CPUs that don't support AVX10-style masking.</div><div class='add'>+.Lcts_permute_table:</div><div class='add'>+	.byte	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80</div><div class='add'>+	.byte	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80</div><div class='add'>+	.byte	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07</div><div class='add'>+	.byte	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f</div><div class='add'>+	.byte	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80</div><div class='add'>+	.byte	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80</div><div class='add'>+.text</div><div class='add'>+</div><div class='add'>+// Function parameters</div><div class='add'>+.set	KEY,		%rdi	// Initially points to crypto_aes_ctx, then is</div><div class='add'>+				// advanced to point to 7th-from-last round key</div><div class='add'>+.set	SRC,		%rsi	// Pointer to next source data</div><div class='add'>+.set	DST,		%rdx	// Pointer to next destination data</div><div class='add'>+.set	LEN,		%ecx	// Remaining length in bytes</div><div class='add'>+.set	LEN8,		%cl</div><div class='add'>+.set	LEN64,		%rcx</div><div class='add'>+.set	TWEAK,		%r8	// Pointer to next tweak</div><div class='add'>+</div><div class='add'>+// %rax holds the AES key length in bytes.</div><div class='add'>+.set	KEYLEN,		%eax</div><div class='add'>+.set	KEYLEN64,	%rax</div><div class='add'>+</div><div class='add'>+// %r9-r11 are available as temporaries.</div><div class='add'>+</div><div class='add'>+.macro	_define_Vi	i</div><div class='add'>+.if VL == 16</div><div class='add'>+	.set	V\i,		%xmm\i</div><div class='add'>+.elseif VL == 32</div><div class='add'>+	.set	V\i,		%ymm\i</div><div class='add'>+.elseif VL == 64</div><div class='add'>+	.set	V\i,		%zmm\i</div><div class='add'>+.else</div><div class='add'>+	.error "Unsupported Vector Length (VL)"</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro _define_aliases</div><div class='add'>+	// Define register aliases V0-V15, or V0-V31 if all 32 SIMD registers</div><div class='add'>+	// are available, that map to the xmm, ymm, or zmm registers according</div><div class='add'>+	// to the selected Vector Length (VL).</div><div class='add'>+	_define_Vi	0</div><div class='add'>+	_define_Vi	1</div><div class='add'>+	_define_Vi	2</div><div class='add'>+	_define_Vi	3</div><div class='add'>+	_define_Vi	4</div><div class='add'>+	_define_Vi	5</div><div class='add'>+	_define_Vi	6</div><div class='add'>+	_define_Vi	7</div><div class='add'>+	_define_Vi	8</div><div class='add'>+	_define_Vi	9</div><div class='add'>+	_define_Vi	10</div><div class='add'>+	_define_Vi	11</div><div class='add'>+	_define_Vi	12</div><div class='add'>+	_define_Vi	13</div><div class='add'>+	_define_Vi	14</div><div class='add'>+	_define_Vi	15</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	_define_Vi	16</div><div class='add'>+	_define_Vi	17</div><div class='add'>+	_define_Vi	18</div><div class='add'>+	_define_Vi	19</div><div class='add'>+	_define_Vi	20</div><div class='add'>+	_define_Vi	21</div><div class='add'>+	_define_Vi	22</div><div class='add'>+	_define_Vi	23</div><div class='add'>+	_define_Vi	24</div><div class='add'>+	_define_Vi	25</div><div class='add'>+	_define_Vi	26</div><div class='add'>+	_define_Vi	27</div><div class='add'>+	_define_Vi	28</div><div class='add'>+	_define_Vi	29</div><div class='add'>+	_define_Vi	30</div><div class='add'>+	_define_Vi	31</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+	// V0-V3 hold the data blocks during the main loop, or temporary values</div><div class='add'>+	// otherwise.  V4-V5 hold temporary values.</div><div class='add'>+</div><div class='add'>+	// V6-V9 hold XTS tweaks.  Each 128-bit lane holds one tweak.</div><div class='add'>+	.set	TWEAK0_XMM,	%xmm6</div><div class='add'>+	.set	TWEAK0,		V6</div><div class='add'>+	.set	TWEAK1_XMM,	%xmm7</div><div class='add'>+	.set	TWEAK1,		V7</div><div class='add'>+	.set	TWEAK2,		V8</div><div class='add'>+	.set	TWEAK3,		V9</div><div class='add'>+</div><div class='add'>+	// V10-V13 are used for computing the next values of TWEAK[0-3].</div><div class='add'>+	.set	NEXT_TWEAK0,	V10</div><div class='add'>+	.set	NEXT_TWEAK1,	V11</div><div class='add'>+	.set	NEXT_TWEAK2,	V12</div><div class='add'>+	.set	NEXT_TWEAK3,	V13</div><div class='add'>+</div><div class='add'>+	// V14 holds the constant from .Lgf_poly, copied to all 128-bit lanes.</div><div class='add'>+	.set	GF_POLY_XMM,	%xmm14</div><div class='add'>+	.set	GF_POLY,	V14</div><div class='add'>+</div><div class='add'>+	// V15 holds the key for AES "round 0", copied to all 128-bit lanes.</div><div class='add'>+	.set	KEY0_XMM,	%xmm15</div><div class='add'>+	.set	KEY0,		V15</div><div class='add'>+</div><div class='add'>+	// If 32 SIMD registers are available, then V16-V29 hold the remaining</div><div class='add'>+	// AES round keys, copied to all 128-bit lanes.</div><div class='add'>+	//</div><div class='add'>+	// AES-128, AES-192, and AES-256 use different numbers of round keys.</div><div class='add'>+	// To allow handling all three variants efficiently, we align the round</div><div class='add'>+	// keys to the *end* of this register range.  I.e., AES-128 uses</div><div class='add'>+	// KEY5-KEY14, AES-192 uses KEY3-KEY14, and AES-256 uses KEY1-KEY14.</div><div class='add'>+	// (All also use KEY0 for the XOR-only "round" at the beginning.)</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	.set	KEY1_XMM,	%xmm16</div><div class='add'>+	.set	KEY1,		V16</div><div class='add'>+	.set	KEY2_XMM,	%xmm17</div><div class='add'>+	.set	KEY2,		V17</div><div class='add'>+	.set	KEY3_XMM,	%xmm18</div><div class='add'>+	.set	KEY3,		V18</div><div class='add'>+	.set	KEY4_XMM,	%xmm19</div><div class='add'>+	.set	KEY4,		V19</div><div class='add'>+	.set	KEY5_XMM,	%xmm20</div><div class='add'>+	.set	KEY5,		V20</div><div class='add'>+	.set	KEY6_XMM,	%xmm21</div><div class='add'>+	.set	KEY6,		V21</div><div class='add'>+	.set	KEY7_XMM,	%xmm22</div><div class='add'>+	.set	KEY7,		V22</div><div class='add'>+	.set	KEY8_XMM,	%xmm23</div><div class='add'>+	.set	KEY8,		V23</div><div class='add'>+	.set	KEY9_XMM,	%xmm24</div><div class='add'>+	.set	KEY9,		V24</div><div class='add'>+	.set	KEY10_XMM,	%xmm25</div><div class='add'>+	.set	KEY10,		V25</div><div class='add'>+	.set	KEY11_XMM,	%xmm26</div><div class='add'>+	.set	KEY11,		V26</div><div class='add'>+	.set	KEY12_XMM,	%xmm27</div><div class='add'>+	.set	KEY12,		V27</div><div class='add'>+	.set	KEY13_XMM,	%xmm28</div><div class='add'>+	.set	KEY13,		V28</div><div class='add'>+	.set	KEY14_XMM,	%xmm29</div><div class='add'>+	.set	KEY14,		V29</div><div class='add'>+.endif</div><div class='add'>+	// V30-V31 are currently unused.</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Move a vector between memory and a register.</div><div class='add'>+.macro	_vmovdqu	src, dst</div><div class='add'>+.if VL &lt; 64</div><div class='add'>+	vmovdqu		\src, \dst</div><div class='add'>+.else</div><div class='add'>+	vmovdqu8	\src, \dst</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Broadcast a 128-bit value into a vector.</div><div class='add'>+.macro	_vbroadcast128	src, dst</div><div class='add'>+.if VL == 16 &amp;&amp; !USE_AVX10</div><div class='add'>+	vmovdqu		\src, \dst</div><div class='add'>+.elseif VL == 32 &amp;&amp; !USE_AVX10</div><div class='add'>+	vbroadcasti128	\src, \dst</div><div class='add'>+.else</div><div class='add'>+	vbroadcasti32x4	\src, \dst</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// XOR two vectors together.</div><div class='add'>+.macro	_vpxor	src1, src2, dst</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	vpxord		\src1, \src2, \dst</div><div class='add'>+.else</div><div class='add'>+	vpxor		\src1, \src2, \dst</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// XOR three vectors together.</div><div class='add'>+.macro	_xor3	src1, src2, src3_and_dst</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	// vpternlogd with immediate 0x96 is a three-argument XOR.</div><div class='add'>+	vpternlogd	$0x96, \src1, \src2, \src3_and_dst</div><div class='add'>+.else</div><div class='add'>+	vpxor		\src1, \src3_and_dst, \src3_and_dst</div><div class='add'>+	vpxor		\src2, \src3_and_dst, \src3_and_dst</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Given a 128-bit XTS tweak in the xmm register \src, compute the next tweak</div><div class='add'>+// (by multiplying by the polynomial 'x') and write it to \dst.</div><div class='add'>+.macro	_next_tweak	src, tmp, dst</div><div class='add'>+	vpshufd		$0x13, \src, \tmp</div><div class='add'>+	vpaddq		\src, \src, \dst</div><div class='add'>+	vpsrad		$31, \tmp, \tmp</div><div class='add'>+	vpand		GF_POLY_XMM, \tmp, \tmp</div><div class='add'>+	vpxor		\tmp, \dst, \dst</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Given the XTS tweak(s) in the vector \src, compute the next vector of</div><div class='add'>+// tweak(s) (by multiplying by the polynomial 'x^(VL/16)') and write it to \dst.</div><div class='add'>+//</div><div class='add'>+// If VL &gt; 16, then there are multiple tweaks, and we use vpclmulqdq to compute</div><div class='add'>+// all tweaks in the vector in parallel.  If VL=16, we just do the regular</div><div class='add'>+// computation without vpclmulqdq, as it's the faster method for a single tweak.</div><div class='add'>+.macro	_next_tweakvec	src, tmp1, tmp2, dst</div><div class='add'>+.if VL == 16</div><div class='add'>+	_next_tweak	\src, \tmp1, \dst</div><div class='add'>+.else</div><div class='add'>+	vpsrlq		$64 - VL/16, \src, \tmp1</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, \tmp1, \tmp2</div><div class='add'>+	vpslldq		$8, \tmp1, \tmp1</div><div class='add'>+	vpsllq		$VL/16, \src, \dst</div><div class='add'>+	_xor3		\tmp1, \tmp2, \dst</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Given the first XTS tweak at (TWEAK), compute the first set of tweaks and</div><div class='add'>+// store them in the vector registers TWEAK0-TWEAK3.  Clobbers V0-V5.</div><div class='add'>+.macro	_compute_first_set_of_tweaks</div><div class='add'>+	vmovdqu		(TWEAK), TWEAK0_XMM</div><div class='add'>+	_vbroadcast128	.Lgf_poly(%rip), GF_POLY</div><div class='add'>+.if VL == 16</div><div class='add'>+	// With VL=16, multiplying by x serially is fastest.</div><div class='add'>+	_next_tweak	TWEAK0, %xmm0, TWEAK1</div><div class='add'>+	_next_tweak	TWEAK1, %xmm0, TWEAK2</div><div class='add'>+	_next_tweak	TWEAK2, %xmm0, TWEAK3</div><div class='add'>+.else</div><div class='add'>+.if VL == 32</div><div class='add'>+	// Compute the second block of TWEAK0.</div><div class='add'>+	_next_tweak	TWEAK0_XMM, %xmm0, %xmm1</div><div class='add'>+	vinserti128	$1, %xmm1, TWEAK0, TWEAK0</div><div class='add'>+.elseif VL == 64</div><div class='add'>+	// Compute the remaining blocks of TWEAK0.</div><div class='add'>+	_next_tweak	TWEAK0_XMM, %xmm0, %xmm1</div><div class='add'>+	_next_tweak	%xmm1, %xmm0, %xmm2</div><div class='add'>+	_next_tweak	%xmm2, %xmm0, %xmm3</div><div class='add'>+	vinserti32x4	$1, %xmm1, TWEAK0, TWEAK0</div><div class='add'>+	vinserti32x4	$2, %xmm2, TWEAK0, TWEAK0</div><div class='add'>+	vinserti32x4	$3, %xmm3, TWEAK0, TWEAK0</div><div class='add'>+.endif</div><div class='add'>+	// Compute TWEAK[1-3] from TWEAK0.</div><div class='add'>+	vpsrlq		$64 - 1*VL/16, TWEAK0, V0</div><div class='add'>+	vpsrlq		$64 - 2*VL/16, TWEAK0, V2</div><div class='add'>+	vpsrlq		$64 - 3*VL/16, TWEAK0, V4</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V0, V1</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V2, V3</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V4, V5</div><div class='add'>+	vpslldq		$8, V0, V0</div><div class='add'>+	vpslldq		$8, V2, V2</div><div class='add'>+	vpslldq		$8, V4, V4</div><div class='add'>+	vpsllq		$1*VL/16, TWEAK0, TWEAK1</div><div class='add'>+	vpsllq		$2*VL/16, TWEAK0, TWEAK2</div><div class='add'>+	vpsllq		$3*VL/16, TWEAK0, TWEAK3</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	vpternlogd	$0x96, V0, V1, TWEAK1</div><div class='add'>+	vpternlogd	$0x96, V2, V3, TWEAK2</div><div class='add'>+	vpternlogd	$0x96, V4, V5, TWEAK3</div><div class='add'>+.else</div><div class='add'>+	vpxor		V0, TWEAK1, TWEAK1</div><div class='add'>+	vpxor		V2, TWEAK2, TWEAK2</div><div class='add'>+	vpxor		V4, TWEAK3, TWEAK3</div><div class='add'>+	vpxor		V1, TWEAK1, TWEAK1</div><div class='add'>+	vpxor		V3, TWEAK2, TWEAK2</div><div class='add'>+	vpxor		V5, TWEAK3, TWEAK3</div><div class='add'>+.endif</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Do one step in computing the next set of tweaks using the method of just</div><div class='add'>+// multiplying by x repeatedly (the same method _next_tweak uses).</div><div class='add'>+.macro	_tweak_step_mulx	i</div><div class='add'>+.if \i == 0</div><div class='add'>+	.set PREV_TWEAK, TWEAK3</div><div class='add'>+	.set NEXT_TWEAK, NEXT_TWEAK0</div><div class='add'>+.elseif \i == 5</div><div class='add'>+	.set PREV_TWEAK, NEXT_TWEAK0</div><div class='add'>+	.set NEXT_TWEAK, NEXT_TWEAK1</div><div class='add'>+.elseif \i == 10</div><div class='add'>+	.set PREV_TWEAK, NEXT_TWEAK1</div><div class='add'>+	.set NEXT_TWEAK, NEXT_TWEAK2</div><div class='add'>+.elseif \i == 15</div><div class='add'>+	.set PREV_TWEAK, NEXT_TWEAK2</div><div class='add'>+	.set NEXT_TWEAK, NEXT_TWEAK3</div><div class='add'>+.endif</div><div class='add'>+.if \i &gt;= 0 &amp;&amp; \i &lt; 20 &amp;&amp; \i % 5 == 0</div><div class='add'>+	vpshufd		$0x13, PREV_TWEAK, V5</div><div class='add'>+.elseif \i &gt;= 0 &amp;&amp; \i &lt; 20 &amp;&amp; \i % 5 == 1</div><div class='add'>+	vpaddq		PREV_TWEAK, PREV_TWEAK, NEXT_TWEAK</div><div class='add'>+.elseif \i &gt;= 0 &amp;&amp; \i &lt; 20 &amp;&amp; \i % 5 == 2</div><div class='add'>+	vpsrad		$31, V5, V5</div><div class='add'>+.elseif \i &gt;= 0 &amp;&amp; \i &lt; 20 &amp;&amp; \i % 5 == 3</div><div class='add'>+	vpand		GF_POLY, V5, V5</div><div class='add'>+.elseif \i &gt;= 0 &amp;&amp; \i &lt; 20 &amp;&amp; \i % 5 == 4</div><div class='add'>+	vpxor		V5, NEXT_TWEAK, NEXT_TWEAK</div><div class='add'>+.elseif \i == 1000</div><div class='add'>+	vmovdqa		NEXT_TWEAK0, TWEAK0</div><div class='add'>+	vmovdqa		NEXT_TWEAK1, TWEAK1</div><div class='add'>+	vmovdqa		NEXT_TWEAK2, TWEAK2</div><div class='add'>+	vmovdqa		NEXT_TWEAK3, TWEAK3</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Do one step in computing the next set of tweaks using the VPCLMULQDQ method</div><div class='add'>+// (the same method _next_tweakvec uses for VL &gt; 16).  This means multiplying</div><div class='add'>+// each tweak by x^(4*VL/16) independently.  Since 4*VL/16 is a multiple of 8</div><div class='add'>+// when VL &gt; 16 (which it is here), the needed shift amounts are byte-aligned,</div><div class='add'>+// which allows the use of vpsrldq and vpslldq to do 128-bit wide shifts.</div><div class='add'>+.macro	_tweak_step_pclmul	i</div><div class='add'>+.if \i == 0</div><div class='add'>+	vpsrldq		$(128 - 4*VL/16) / 8, TWEAK0, NEXT_TWEAK0</div><div class='add'>+.elseif \i == 2</div><div class='add'>+	vpsrldq		$(128 - 4*VL/16) / 8, TWEAK1, NEXT_TWEAK1</div><div class='add'>+.elseif \i == 4</div><div class='add'>+	vpsrldq		$(128 - 4*VL/16) / 8, TWEAK2, NEXT_TWEAK2</div><div class='add'>+.elseif \i == 6</div><div class='add'>+	vpsrldq		$(128 - 4*VL/16) / 8, TWEAK3, NEXT_TWEAK3</div><div class='add'>+.elseif \i == 8</div><div class='add'>+	vpclmulqdq	$0x00, GF_POLY, NEXT_TWEAK0, NEXT_TWEAK0</div><div class='add'>+.elseif \i == 10</div><div class='add'>+	vpclmulqdq	$0x00, GF_POLY, NEXT_TWEAK1, NEXT_TWEAK1</div><div class='add'>+.elseif \i == 12</div><div class='add'>+	vpclmulqdq	$0x00, GF_POLY, NEXT_TWEAK2, NEXT_TWEAK2</div><div class='add'>+.elseif \i == 14</div><div class='add'>+	vpclmulqdq	$0x00, GF_POLY, NEXT_TWEAK3, NEXT_TWEAK3</div><div class='add'>+.elseif \i == 1000</div><div class='add'>+	vpslldq		$(4*VL/16) / 8, TWEAK0, TWEAK0</div><div class='add'>+	vpslldq		$(4*VL/16) / 8, TWEAK1, TWEAK1</div><div class='add'>+	vpslldq		$(4*VL/16) / 8, TWEAK2, TWEAK2</div><div class='add'>+	vpslldq		$(4*VL/16) / 8, TWEAK3, TWEAK3</div><div class='add'>+	_vpxor		NEXT_TWEAK0, TWEAK0, TWEAK0</div><div class='add'>+	_vpxor		NEXT_TWEAK1, TWEAK1, TWEAK1</div><div class='add'>+	_vpxor		NEXT_TWEAK2, TWEAK2, TWEAK2</div><div class='add'>+	_vpxor		NEXT_TWEAK3, TWEAK3, TWEAK3</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// _tweak_step does one step of the computation of the next set of tweaks from</div><div class='add'>+// TWEAK[0-3].  To complete all steps, this is invoked with increasing values of</div><div class='add'>+// \i that include at least 0 through 19, then 1000 which signals the last step.</div><div class='add'>+//</div><div class='add'>+// This is used to interleave the computation of the next set of tweaks with the</div><div class='add'>+// AES en/decryptions, which increases performance in some cases.</div><div class='add'>+.macro	_tweak_step	i</div><div class='add'>+.if VL == 16</div><div class='add'>+	_tweak_step_mulx	\i</div><div class='add'>+.else</div><div class='add'>+	_tweak_step_pclmul	\i</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro	_setup_round_keys	enc</div><div class='add'>+</div><div class='add'>+	// Select either the encryption round keys or the decryption round keys.</div><div class='add'>+.if \enc</div><div class='add'>+	.set	OFFS, 0</div><div class='add'>+.else</div><div class='add'>+	.set	OFFS, 240</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+	// Load the round key for "round 0".</div><div class='add'>+	_vbroadcast128	OFFS(KEY), KEY0</div><div class='add'>+</div><div class='add'>+	// Increment KEY to make it so that 7*16(KEY) is the last round key.</div><div class='add'>+	// For AES-128, increment by 3*16, resulting in the 10 round keys (not</div><div class='add'>+	// counting the zero-th round key which was just loaded into KEY0) being</div><div class='add'>+	// -2*16(KEY) through 7*16(KEY).  For AES-192, increment by 5*16 and use</div><div class='add'>+	// 12 round keys -4*16(KEY) through 7*16(KEY).  For AES-256, increment</div><div class='add'>+	// by 7*16 and use 14 round keys -6*16(KEY) through 7*16(KEY).</div><div class='add'>+	//</div><div class='add'>+	// This rebasing provides two benefits.  First, it makes the offset to</div><div class='add'>+	// any round key be in the range [-96, 112], fitting in a signed byte.</div><div class='add'>+	// This shortens VEX-encoded instructions that access the later round</div><div class='add'>+	// keys which otherwise would need 4-byte offsets.  Second, it makes it</div><div class='add'>+	// easy to do AES-128 and AES-192 by skipping irrelevant rounds at the</div><div class='add'>+	// beginning.  Skipping rounds at the end doesn't work as well because</div><div class='add'>+	// the last round needs different instructions.</div><div class='add'>+	//</div><div class='add'>+	// An alternative approach would be to roll up all the round loops.  We</div><div class='add'>+	// don't do that because it isn't compatible with caching the round keys</div><div class='add'>+	// in registers which we do when possible (see below), and also because</div><div class='add'>+	// it seems unwise to rely *too* heavily on the CPU's branch predictor.</div><div class='add'>+	lea		OFFS-16(KEY, KEYLEN64, 4), KEY</div><div class='add'>+</div><div class='add'>+	// If all 32 SIMD registers are available, cache all the round keys.</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	cmp		$24, KEYLEN</div><div class='add'>+	jl		.Laes128\@</div><div class='add'>+	je		.Laes192\@</div><div class='add'>+	_vbroadcast128	-6*16(KEY), KEY1</div><div class='add'>+	_vbroadcast128	-5*16(KEY), KEY2</div><div class='add'>+.Laes192\@:</div><div class='add'>+	_vbroadcast128	-4*16(KEY), KEY3</div><div class='add'>+	_vbroadcast128	-3*16(KEY), KEY4</div><div class='add'>+.Laes128\@:</div><div class='add'>+	_vbroadcast128	-2*16(KEY), KEY5</div><div class='add'>+	_vbroadcast128	-1*16(KEY), KEY6</div><div class='add'>+	_vbroadcast128	0*16(KEY), KEY7</div><div class='add'>+	_vbroadcast128	1*16(KEY), KEY8</div><div class='add'>+	_vbroadcast128	2*16(KEY), KEY9</div><div class='add'>+	_vbroadcast128	3*16(KEY), KEY10</div><div class='add'>+	_vbroadcast128	4*16(KEY), KEY11</div><div class='add'>+	_vbroadcast128	5*16(KEY), KEY12</div><div class='add'>+	_vbroadcast128	6*16(KEY), KEY13</div><div class='add'>+	_vbroadcast128	7*16(KEY), KEY14</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Do a single round of AES encryption (if \enc==1) or decryption (if \enc==0)</div><div class='add'>+// on the block(s) in \data using the round key(s) in \key.  The register length</div><div class='add'>+// determines the number of AES blocks en/decrypted.</div><div class='add'>+.macro	_vaes	enc, last, key, data</div><div class='add'>+.if \enc</div><div class='add'>+.if \last</div><div class='add'>+	vaesenclast	\key, \data, \data</div><div class='add'>+.else</div><div class='add'>+	vaesenc		\key, \data, \data</div><div class='add'>+.endif</div><div class='add'>+.else</div><div class='add'>+.if \last</div><div class='add'>+	vaesdeclast	\key, \data, \data</div><div class='add'>+.else</div><div class='add'>+	vaesdec		\key, \data, \data</div><div class='add'>+.endif</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Do a single round of AES en/decryption on the block(s) in \data, using the</div><div class='add'>+// same key for all block(s).  The round key is loaded from the appropriate</div><div class='add'>+// register or memory location for round \i.  May clobber V4.</div><div class='add'>+.macro _vaes_1x		enc, last, i, xmm_suffix, data</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	_vaes		\enc, \last, KEY\i\xmm_suffix, \data</div><div class='add'>+.else</div><div class='add'>+.ifnb \xmm_suffix</div><div class='add'>+	_vaes		\enc, \last, (\i-7)*16(KEY), \data</div><div class='add'>+.else</div><div class='add'>+	_vbroadcast128	(\i-7)*16(KEY), V4</div><div class='add'>+	_vaes		\enc, \last, V4, \data</div><div class='add'>+.endif</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Do a single round of AES en/decryption on the blocks in registers V0-V3,</div><div class='add'>+// using the same key for all blocks.  The round key is loaded from the</div><div class='add'>+// appropriate register or memory location for round \i.  In addition, does two</div><div class='add'>+// steps of the computation of the next set of tweaks.  May clobber V4.</div><div class='add'>+.macro	_vaes_4x	enc, last, i</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	_tweak_step	(2*(\i-5))</div><div class='add'>+	_vaes		\enc, \last, KEY\i, V0</div><div class='add'>+	_vaes		\enc, \last, KEY\i, V1</div><div class='add'>+	_tweak_step	(2*(\i-5) + 1)</div><div class='add'>+	_vaes		\enc, \last, KEY\i, V2</div><div class='add'>+	_vaes		\enc, \last, KEY\i, V3</div><div class='add'>+.else</div><div class='add'>+	_vbroadcast128	(\i-7)*16(KEY), V4</div><div class='add'>+	_tweak_step	(2*(\i-5))</div><div class='add'>+	_vaes		\enc, \last, V4, V0</div><div class='add'>+	_vaes		\enc, \last, V4, V1</div><div class='add'>+	_tweak_step	(2*(\i-5) + 1)</div><div class='add'>+	_vaes		\enc, \last, V4, V2</div><div class='add'>+	_vaes		\enc, \last, V4, V3</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// Do tweaked AES en/decryption (i.e., XOR with \tweak, then AES en/decrypt,</div><div class='add'>+// then XOR with \tweak again) of the block(s) in \data.  To process a single</div><div class='add'>+// block, use xmm registers and set \xmm_suffix=_XMM.  To process a vector of</div><div class='add'>+// length VL, use V* registers and leave \xmm_suffix empty.  May clobber V4.</div><div class='add'>+.macro	_aes_crypt	enc, xmm_suffix, tweak, data</div><div class='add'>+	_xor3		KEY0\xmm_suffix, \tweak, \data</div><div class='add'>+	cmp		$24, KEYLEN</div><div class='add'>+	jl		.Laes128\@</div><div class='add'>+	je		.Laes192\@</div><div class='add'>+	_vaes_1x	\enc, 0, 1, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 2, \xmm_suffix, \data</div><div class='add'>+.Laes192\@:</div><div class='add'>+	_vaes_1x	\enc, 0, 3, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 4, \xmm_suffix, \data</div><div class='add'>+.Laes128\@:</div><div class='add'>+	_vaes_1x	\enc, 0, 5, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 6, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 7, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 8, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 9, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 10, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 11, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 12, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 0, 13, \xmm_suffix, \data</div><div class='add'>+	_vaes_1x	\enc, 1, 14, \xmm_suffix, \data</div><div class='add'>+	_vpxor		\tweak, \data, \data</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro	_aes_xts_crypt	enc</div><div class='add'>+	_define_aliases</div><div class='add'>+</div><div class='add'>+.if !\enc</div><div class='add'>+	// When decrypting a message whose length isn't a multiple of the AES</div><div class='add'>+	// block length, exclude the last full block from the main loop by</div><div class='add'>+	// subtracting 16 from LEN.  This is needed because ciphertext stealing</div><div class='add'>+	// decryption uses the last two tweaks in reverse order.  We'll handle</div><div class='add'>+	// the last full block and the partial block specially at the end.</div><div class='add'>+	lea		-16(LEN), %eax</div><div class='add'>+	test		$15, LEN8</div><div class='add'>+	cmovnz		%eax, LEN</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+	// Load the AES key length: 16 (AES-128), 24 (AES-192), or 32 (AES-256).</div><div class='add'>+	movl		480(KEY), KEYLEN</div><div class='add'>+</div><div class='add'>+	// Setup the pointer to the round keys and cache as many as possible.</div><div class='add'>+	_setup_round_keys	\enc</div><div class='add'>+</div><div class='add'>+	// Compute the first set of tweaks TWEAK[0-3].</div><div class='add'>+	_compute_first_set_of_tweaks</div><div class='add'>+</div><div class='add'>+	sub		$4*VL, LEN</div><div class='add'>+	jl		.Lhandle_remainder\@</div><div class='add'>+</div><div class='add'>+.Lmain_loop\@:</div><div class='add'>+	// This is the main loop, en/decrypting 4*VL bytes per iteration.</div><div class='add'>+</div><div class='add'>+	// XOR each source block with its tweak and the zero-th round key.</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	vmovdqu8	0*VL(SRC), V0</div><div class='add'>+	vmovdqu8	1*VL(SRC), V1</div><div class='add'>+	vmovdqu8	2*VL(SRC), V2</div><div class='add'>+	vmovdqu8	3*VL(SRC), V3</div><div class='add'>+	vpternlogd	$0x96, TWEAK0, KEY0, V0</div><div class='add'>+	vpternlogd	$0x96, TWEAK1, KEY0, V1</div><div class='add'>+	vpternlogd	$0x96, TWEAK2, KEY0, V2</div><div class='add'>+	vpternlogd	$0x96, TWEAK3, KEY0, V3</div><div class='add'>+.else</div><div class='add'>+	vpxor		0*VL(SRC), KEY0, V0</div><div class='add'>+	vpxor		1*VL(SRC), KEY0, V1</div><div class='add'>+	vpxor		2*VL(SRC), KEY0, V2</div><div class='add'>+	vpxor		3*VL(SRC), KEY0, V3</div><div class='add'>+	vpxor		TWEAK0, V0, V0</div><div class='add'>+	vpxor		TWEAK1, V1, V1</div><div class='add'>+	vpxor		TWEAK2, V2, V2</div><div class='add'>+	vpxor		TWEAK3, V3, V3</div><div class='add'>+.endif</div><div class='add'>+	cmp		$24, KEYLEN</div><div class='add'>+	jl		.Laes128\@</div><div class='add'>+	je		.Laes192\@</div><div class='add'>+	// Do all the AES rounds on the data blocks, interleaved with</div><div class='add'>+	// the computation of the next set of tweaks.</div><div class='add'>+	_vaes_4x	\enc, 0, 1</div><div class='add'>+	_vaes_4x	\enc, 0, 2</div><div class='add'>+.Laes192\@:</div><div class='add'>+	_vaes_4x	\enc, 0, 3</div><div class='add'>+	_vaes_4x	\enc, 0, 4</div><div class='add'>+.Laes128\@:</div><div class='add'>+	_vaes_4x	\enc, 0, 5</div><div class='add'>+	_vaes_4x	\enc, 0, 6</div><div class='add'>+	_vaes_4x	\enc, 0, 7</div><div class='add'>+	_vaes_4x	\enc, 0, 8</div><div class='add'>+	_vaes_4x	\enc, 0, 9</div><div class='add'>+	_vaes_4x	\enc, 0, 10</div><div class='add'>+	_vaes_4x	\enc, 0, 11</div><div class='add'>+	_vaes_4x	\enc, 0, 12</div><div class='add'>+	_vaes_4x	\enc, 0, 13</div><div class='add'>+	_vaes_4x	\enc, 1, 14</div><div class='add'>+</div><div class='add'>+	// XOR in the tweaks again.</div><div class='add'>+	_vpxor		TWEAK0, V0, V0</div><div class='add'>+	_vpxor		TWEAK1, V1, V1</div><div class='add'>+	_vpxor		TWEAK2, V2, V2</div><div class='add'>+	_vpxor		TWEAK3, V3, V3</div><div class='add'>+</div><div class='add'>+	// Store the destination blocks.</div><div class='add'>+	_vmovdqu	V0, 0*VL(DST)</div><div class='add'>+	_vmovdqu	V1, 1*VL(DST)</div><div class='add'>+	_vmovdqu	V2, 2*VL(DST)</div><div class='add'>+	_vmovdqu	V3, 3*VL(DST)</div><div class='add'>+</div><div class='add'>+	// Finish computing the next set of tweaks.</div><div class='add'>+	_tweak_step	1000</div><div class='add'>+</div><div class='add'>+	add		$4*VL, SRC</div><div class='add'>+	add		$4*VL, DST</div><div class='add'>+	sub		$4*VL, LEN</div><div class='add'>+	jge		.Lmain_loop\@</div><div class='add'>+</div><div class='add'>+	// Check for the uncommon case where the data length isn't a multiple of</div><div class='add'>+	// 4*VL.  Handle it out-of-line in order to optimize for the common</div><div class='add'>+	// case.  In the common case, just fall through to the ret.</div><div class='add'>+	test		$4*VL-1, LEN8</div><div class='add'>+	jnz		.Lhandle_remainder\@</div><div class='add'>+.Ldone\@:</div><div class='add'>+	// Store the next tweak back to *TWEAK to support continuation calls.</div><div class='add'>+	vmovdqu		TWEAK0_XMM, (TWEAK)</div><div class='add'>+.if VL &gt; 16</div><div class='add'>+	vzeroupper</div><div class='add'>+.endif</div><div class='add'>+	RET</div><div class='add'>+</div><div class='add'>+.Lhandle_remainder\@:</div><div class='add'>+</div><div class='add'>+	// En/decrypt any remaining full blocks, one vector at a time.</div><div class='add'>+.if VL &gt; 16</div><div class='add'>+	add		$3*VL, LEN	// Undo extra sub of 4*VL, then sub VL.</div><div class='add'>+	jl		.Lvec_at_a_time_done\@</div><div class='add'>+.Lvec_at_a_time\@:</div><div class='add'>+	_vmovdqu	(SRC), V0</div><div class='add'>+	_aes_crypt	\enc, , TWEAK0, V0</div><div class='add'>+	_vmovdqu	V0, (DST)</div><div class='add'>+	_next_tweakvec	TWEAK0, V0, V1, TWEAK0</div><div class='add'>+	add		$VL, SRC</div><div class='add'>+	add		$VL, DST</div><div class='add'>+	sub		$VL, LEN</div><div class='add'>+	jge		.Lvec_at_a_time\@</div><div class='add'>+.Lvec_at_a_time_done\@:</div><div class='add'>+	add		$VL-16, LEN	// Undo extra sub of VL, then sub 16.</div><div class='add'>+.else</div><div class='add'>+	add		$4*VL-16, LEN	// Undo extra sub of 4*VL, then sub 16.</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+	// En/decrypt any remaining full blocks, one at a time.</div><div class='add'>+	jl		.Lblock_at_a_time_done\@</div><div class='add'>+.Lblock_at_a_time\@:</div><div class='add'>+	vmovdqu		(SRC), %xmm0</div><div class='add'>+	_aes_crypt	\enc, _XMM, TWEAK0_XMM, %xmm0</div><div class='add'>+	vmovdqu		%xmm0, (DST)</div><div class='add'>+	_next_tweak	TWEAK0_XMM, %xmm0, TWEAK0_XMM</div><div class='add'>+	add		$16, SRC</div><div class='add'>+	add		$16, DST</div><div class='add'>+	sub		$16, LEN</div><div class='add'>+	jge		.Lblock_at_a_time\@</div><div class='add'>+.Lblock_at_a_time_done\@:</div><div class='add'>+	add		$16, LEN	// Undo the extra sub of 16.</div><div class='add'>+	// Now 0 &lt;= LEN &lt;= 15.  If LEN is zero, we're done.</div><div class='add'>+	jz		.Ldone\@</div><div class='add'>+</div><div class='add'>+	// Otherwise 1 &lt;= LEN &lt;= 15, but the real remaining length is 16 + LEN.</div><div class='add'>+	// Do ciphertext stealing to process the last 16 + LEN bytes.</div><div class='add'>+</div><div class='add'>+.if \enc</div><div class='add'>+	// If encrypting, the main loop already encrypted the last full block to</div><div class='add'>+	// create the CTS intermediate ciphertext.  Prepare for the rest of CTS</div><div class='add'>+	// by rewinding the pointers and loading the intermediate ciphertext.</div><div class='add'>+	sub		$16, SRC</div><div class='add'>+	sub		$16, DST</div><div class='add'>+	vmovdqu		(DST), %xmm0</div><div class='add'>+.else</div><div class='add'>+	// If decrypting, the main loop didn't decrypt the last full block</div><div class='add'>+	// because CTS decryption uses the last two tweaks in reverse order.</div><div class='add'>+	// Do it now by advancing the tweak and decrypting the last full block.</div><div class='add'>+	_next_tweak	TWEAK0_XMM, %xmm0, TWEAK1_XMM</div><div class='add'>+	vmovdqu		(SRC), %xmm0</div><div class='add'>+	_aes_crypt	\enc, _XMM, TWEAK1_XMM, %xmm0</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+.if USE_AVX10</div><div class='add'>+	// Create a mask that has the first LEN bits set.</div><div class='add'>+	mov		$-1, %r9d</div><div class='add'>+	bzhi		LEN, %r9d, %r9d</div><div class='add'>+	kmovd		%r9d, %k1</div><div class='add'>+</div><div class='add'>+	// Swap the first LEN bytes of the en/decryption of the last full block</div><div class='add'>+	// with the partial block.  Note that to support in-place en/decryption,</div><div class='add'>+	// the load from the src partial block must happen before the store to</div><div class='add'>+	// the dst partial block.</div><div class='add'>+	vmovdqa		%xmm0, %xmm1</div><div class='add'>+	vmovdqu8	16(SRC), %xmm0{%k1}</div><div class='add'>+	vmovdqu8	%xmm1, 16(DST){%k1}</div><div class='add'>+.else</div><div class='add'>+	lea		.Lcts_permute_table(%rip), %r9</div><div class='add'>+</div><div class='add'>+	// Load the src partial block, left-aligned.  Note that to support</div><div class='add'>+	// in-place en/decryption, this must happen before the store to the dst</div><div class='add'>+	// partial block.</div><div class='add'>+	vmovdqu		(SRC, LEN64, 1), %xmm1</div><div class='add'>+</div><div class='add'>+	// Shift the first LEN bytes of the en/decryption of the last full block</div><div class='add'>+	// to the end of a register, then store it to DST+LEN.  This stores the</div><div class='add'>+	// dst partial block.  It also writes to the second part of the dst last</div><div class='add'>+	// full block, but that part is overwritten later.</div><div class='add'>+	vpshufb		(%r9, LEN64, 1), %xmm0, %xmm2</div><div class='add'>+	vmovdqu		%xmm2, (DST, LEN64, 1)</div><div class='add'>+</div><div class='add'>+	// Make xmm3 contain [16-LEN,16-LEN+1,...,14,15,0x80,0x80,...].</div><div class='add'>+	sub		LEN64, %r9</div><div class='add'>+	vmovdqu		32(%r9), %xmm3</div><div class='add'>+</div><div class='add'>+	// Shift the src partial block to the beginning of its register.</div><div class='add'>+	vpshufb		%xmm3, %xmm1, %xmm1</div><div class='add'>+</div><div class='add'>+	// Do a blend to generate the src partial block followed by the second</div><div class='add'>+	// part of the en/decryption of the last full block.</div><div class='add'>+	vpblendvb	%xmm3, %xmm0, %xmm1, %xmm0</div><div class='add'>+.endif</div><div class='add'>+	// En/decrypt again and store the last full block.</div><div class='add'>+	_aes_crypt	\enc, _XMM, TWEAK0_XMM, %xmm0</div><div class='add'>+	vmovdqu		%xmm0, (DST)</div><div class='add'>+	jmp		.Ldone\@</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+// void aes_xts_encrypt_iv(const struct crypto_aes_ctx *tweak_key,</div><div class='add'>+//			   u8 iv[AES_BLOCK_SIZE]);</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_encrypt_iv)</div><div class='add'>+	vmovdqu		(%rsi), %xmm0</div><div class='add'>+	vpxor		(%rdi), %xmm0, %xmm0</div><div class='add'>+	movl		480(%rdi), %eax		// AES key length</div><div class='add'>+	lea		-16(%rdi, %rax, 4), %rdi</div><div class='add'>+	cmp		$24, %eax</div><div class='add'>+	jl		.Lencrypt_iv_aes128</div><div class='add'>+	je		.Lencrypt_iv_aes192</div><div class='add'>+	vaesenc		-6*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		-5*16(%rdi), %xmm0, %xmm0</div><div class='add'>+.Lencrypt_iv_aes192:</div><div class='add'>+	vaesenc		-4*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		-3*16(%rdi), %xmm0, %xmm0</div><div class='add'>+.Lencrypt_iv_aes128:</div><div class='add'>+	vaesenc		-2*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		-1*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		0*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		1*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		2*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		3*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		4*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		5*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenc		6*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vaesenclast	7*16(%rdi), %xmm0, %xmm0</div><div class='add'>+	vmovdqu		%xmm0, (%rsi)</div><div class='add'>+	RET</div><div class='add'>+SYM_FUNC_END(aes_xts_encrypt_iv)</div><div class='add'>+</div><div class='add'>+// Below are the actual AES-XTS encryption and decryption functions,</div><div class='add'>+// instantiated from the above macro.  They all have the following prototype:</div><div class='add'>+//</div><div class='add'>+// void (*xts_asm_func)(const struct crypto_aes_ctx *key,</div><div class='add'>+//			const u8 *src, u8 *dst, unsigned int len,</div><div class='add'>+//			u8 tweak[AES_BLOCK_SIZE]);</div><div class='add'>+//</div><div class='add'>+// |key| is the data key.  |tweak| contains the next tweak; the encryption of</div><div class='add'>+// the original IV with the tweak key was already done.  This function supports</div><div class='add'>+// incremental computation, but |len| must always be &gt;= 16 (AES_BLOCK_SIZE), and</div><div class='add'>+// |len| must be a multiple of 16 except on the last call.  If |len| is a</div><div class='add'>+// multiple of 16, then this function updates |tweak| to contain the next tweak.</div><div class='add'>+</div><div class='add'>+.set	VL, 16</div><div class='add'>+.set	USE_AVX10, 0</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_encrypt_aesni_avx)</div><div class='add'>+	_aes_xts_crypt	1</div><div class='add'>+SYM_FUNC_END(aes_xts_encrypt_aesni_avx)</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_decrypt_aesni_avx)</div><div class='add'>+	_aes_xts_crypt	0</div><div class='add'>+SYM_FUNC_END(aes_xts_decrypt_aesni_avx)</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='add'>+.set	VL, 32</div><div class='add'>+.set	USE_AVX10, 0</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx2)</div><div class='add'>+	_aes_xts_crypt	1</div><div class='add'>+SYM_FUNC_END(aes_xts_encrypt_vaes_avx2)</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx2)</div><div class='add'>+	_aes_xts_crypt	0</div><div class='add'>+SYM_FUNC_END(aes_xts_decrypt_vaes_avx2)</div><div class='add'>+</div><div class='add'>+.set	VL, 32</div><div class='add'>+.set	USE_AVX10, 1</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx10_256)</div><div class='add'>+	_aes_xts_crypt	1</div><div class='add'>+SYM_FUNC_END(aes_xts_encrypt_vaes_avx10_256)</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx10_256)</div><div class='add'>+	_aes_xts_crypt	0</div><div class='add'>+SYM_FUNC_END(aes_xts_decrypt_vaes_avx10_256)</div><div class='add'>+</div><div class='add'>+.set	VL, 64</div><div class='add'>+.set	USE_AVX10, 1</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx10_512)</div><div class='add'>+	_aes_xts_crypt	1</div><div class='add'>+SYM_FUNC_END(aes_xts_encrypt_vaes_avx10_512)</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx10_512)</div><div class='add'>+	_aes_xts_crypt	0</div><div class='add'>+SYM_FUNC_END(aes_xts_decrypt_vaes_avx10_512)</div><div class='add'>+#endif /* CONFIG_AS_VAES &amp;&amp; CONFIG_AS_VPCLMULQDQ */</div><div class='head'>diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S<br/>index 411d8c83e88a..39066b57a70e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aesni-intel_asm.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/aesni-intel_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aesni-intel_asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/aesni-intel_asm.S</a></div><div class='hunk'>@@ -83,9 +83,6 @@ ALL_F:      .octa 0xffffffffffffffffffffffffffffffff</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define	STACK_OFFSET    8*3</div><div class='del'>-</div><div class='ctx'> #define AadHash 16*0</div><div class='ctx'> #define AadLen 16*1</div><div class='ctx'> #define InLen (16*1)+8</div><div class='hunk'>@@ -116,11 +113,6 @@ ALL_F:      .octa 0xffffffffffffffffffffffffffffffff</div><div class='ctx'> #define arg4 rcx</div><div class='ctx'> #define arg5 r8</div><div class='ctx'> #define arg6 r9</div><div class='del'>-#define arg7 STACK_OFFSET+8(%rsp)</div><div class='del'>-#define arg8 STACK_OFFSET+16(%rsp)</div><div class='del'>-#define arg9 STACK_OFFSET+24(%rsp)</div><div class='del'>-#define arg10 STACK_OFFSET+32(%rsp)</div><div class='del'>-#define arg11 STACK_OFFSET+40(%rsp)</div><div class='ctx'> #define keysize 2*15*16(%arg1)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1507,184 +1499,6 @@ _esb_loop_\@:</div><div class='ctx'> 	MOVADQ		(%r10),\TMP1</div><div class='ctx'> 	aesenclast	\TMP1,\XMM0</div><div class='ctx'> .endm</div><div class='del'>-/*****************************************************************************</div><div class='del'>-* void aesni_gcm_dec(void *aes_ctx,    // AES Key schedule. Starts on a 16 byte boundary.</div><div class='del'>-*                   struct gcm_context_data *data</div><div class='del'>-*                                      // Context data</div><div class='del'>-*                   u8 *out,           // Plaintext output. Encrypt in-place is allowed.</div><div class='del'>-*                   const u8 *in,      // Ciphertext input</div><div class='del'>-*                   u64 plaintext_len, // Length of data in bytes for decryption.</div><div class='del'>-*                   u8 *iv,            // Pre-counter block j0: 4 byte salt (from Security Association)</div><div class='del'>-*                                      // concatenated with 8 byte Initialisation Vector (from IPSec ESP Payload)</div><div class='del'>-*                                      // concatenated with 0x00000001. 16-byte aligned pointer.</div><div class='del'>-*                   u8 *hash_subkey,   // H, the Hash sub key input. Data starts on a 16-byte boundary.</div><div class='del'>-*                   const u8 *aad,     // Additional Authentication Data (AAD)</div><div class='del'>-*                   u64 aad_len,       // Length of AAD in bytes. With RFC4106 this is going to be 8 or 12 bytes</div><div class='del'>-*                   u8  *auth_tag,     // Authenticated Tag output. The driver will compare this to the</div><div class='del'>-*                                      // given authentication tag and only return the plaintext if they match.</div><div class='del'>-*                   u64 auth_tag_len); // Authenticated Tag Length in bytes. Valid values are 16</div><div class='del'>-*                                      // (most likely), 12 or 8.</div><div class='del'>-*</div><div class='del'>-* Assumptions:</div><div class='del'>-*</div><div class='del'>-* keys:</div><div class='del'>-*       keys are pre-expanded and aligned to 16 bytes. we are using the first</div><div class='del'>-*       set of 11 keys in the data structure void *aes_ctx</div><div class='del'>-*</div><div class='del'>-* iv:</div><div class='del'>-*       0                   1                   2                   3</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                             Salt  (From the SA)               |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                     Initialization Vector                     |</div><div class='del'>-*       |         (This is the sequence number from IPSec header)       |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                              0x1                              |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-* AAD:</div><div class='del'>-*       AAD padded to 128 bits with 0</div><div class='del'>-*       for example, assume AAD is a u32 vector</div><div class='del'>-*</div><div class='del'>-*       if AAD is 8 bytes:</div><div class='del'>-*       AAD[3] = {A0, A1};</div><div class='del'>-*       padded AAD in xmm register = {A1 A0 0 0}</div><div class='del'>-*</div><div class='del'>-*       0                   1                   2                   3</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                               SPI (A1)                        |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                     32-bit Sequence Number (A0)               |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                              0x0                              |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*</div><div class='del'>-*                                       AAD Format with 32-bit Sequence Number</div><div class='del'>-*</div><div class='del'>-*       if AAD is 12 bytes:</div><div class='del'>-*       AAD[3] = {A0, A1, A2};</div><div class='del'>-*       padded AAD in xmm register = {A2 A1 A0 0}</div><div class='del'>-*</div><div class='del'>-*       0                   1                   2                   3</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                               SPI (A2)                        |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                 64-bit Extended Sequence Number {A1,A0}       |</div><div class='del'>-*       |                                                               |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                              0x0                              |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*</div><div class='del'>-*                        AAD Format with 64-bit Extended Sequence Number</div><div class='del'>-*</div><div class='del'>-* poly = x^128 + x^127 + x^126 + x^121 + 1</div><div class='del'>-*</div><div class='del'>-*****************************************************************************/</div><div class='del'>-SYM_FUNC_START(aesni_gcm_dec)</div><div class='del'>-	FUNC_SAVE</div><div class='del'>-</div><div class='del'>-	GCM_INIT %arg6, arg7, arg8, arg9</div><div class='del'>-	GCM_ENC_DEC dec</div><div class='del'>-	GCM_COMPLETE arg10, arg11</div><div class='del'>-	FUNC_RESTORE</div><div class='del'>-	RET</div><div class='del'>-SYM_FUNC_END(aesni_gcm_dec)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*****************************************************************************</div><div class='del'>-* void aesni_gcm_enc(void *aes_ctx,      // AES Key schedule. Starts on a 16 byte boundary.</div><div class='del'>-*                    struct gcm_context_data *data</div><div class='del'>-*                                        // Context data</div><div class='del'>-*                    u8 *out,            // Ciphertext output. Encrypt in-place is allowed.</div><div class='del'>-*                    const u8 *in,       // Plaintext input</div><div class='del'>-*                    u64 plaintext_len,  // Length of data in bytes for encryption.</div><div class='del'>-*                    u8 *iv,             // Pre-counter block j0: 4 byte salt (from Security Association)</div><div class='del'>-*                                        // concatenated with 8 byte Initialisation Vector (from IPSec ESP Payload)</div><div class='del'>-*                                        // concatenated with 0x00000001. 16-byte aligned pointer.</div><div class='del'>-*                    u8 *hash_subkey,    // H, the Hash sub key input. Data starts on a 16-byte boundary.</div><div class='del'>-*                    const u8 *aad,      // Additional Authentication Data (AAD)</div><div class='del'>-*                    u64 aad_len,        // Length of AAD in bytes. With RFC4106 this is going to be 8 or 12 bytes</div><div class='del'>-*                    u8 *auth_tag,       // Authenticated Tag output.</div><div class='del'>-*                    u64 auth_tag_len);  // Authenticated Tag Length in bytes. Valid values are 16 (most likely),</div><div class='del'>-*                                        // 12 or 8.</div><div class='del'>-*</div><div class='del'>-* Assumptions:</div><div class='del'>-*</div><div class='del'>-* keys:</div><div class='del'>-*       keys are pre-expanded and aligned to 16 bytes. we are using the</div><div class='del'>-*       first set of 11 keys in the data structure void *aes_ctx</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-* iv:</div><div class='del'>-*       0                   1                   2                   3</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                             Salt  (From the SA)               |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                     Initialization Vector                     |</div><div class='del'>-*       |         (This is the sequence number from IPSec header)       |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                              0x1                              |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-* AAD:</div><div class='del'>-*       AAD padded to 128 bits with 0</div><div class='del'>-*       for example, assume AAD is a u32 vector</div><div class='del'>-*</div><div class='del'>-*       if AAD is 8 bytes:</div><div class='del'>-*       AAD[3] = {A0, A1};</div><div class='del'>-*       padded AAD in xmm register = {A1 A0 0 0}</div><div class='del'>-*</div><div class='del'>-*       0                   1                   2                   3</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                               SPI (A1)                        |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                     32-bit Sequence Number (A0)               |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                              0x0                              |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*</div><div class='del'>-*                                 AAD Format with 32-bit Sequence Number</div><div class='del'>-*</div><div class='del'>-*       if AAD is 12 bytes:</div><div class='del'>-*       AAD[3] = {A0, A1, A2};</div><div class='del'>-*       padded AAD in xmm register = {A2 A1 A0 0}</div><div class='del'>-*</div><div class='del'>-*       0                   1                   2                   3</div><div class='del'>-*       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                               SPI (A2)                        |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                 64-bit Extended Sequence Number {A1,A0}       |</div><div class='del'>-*       |                                                               |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*       |                              0x0                              |</div><div class='del'>-*       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+</div><div class='del'>-*</div><div class='del'>-*                         AAD Format with 64-bit Extended Sequence Number</div><div class='del'>-*</div><div class='del'>-* poly = x^128 + x^127 + x^126 + x^121 + 1</div><div class='del'>-***************************************************************************/</div><div class='del'>-SYM_FUNC_START(aesni_gcm_enc)</div><div class='del'>-	FUNC_SAVE</div><div class='del'>-</div><div class='del'>-	GCM_INIT %arg6, arg7, arg8, arg9</div><div class='del'>-	GCM_ENC_DEC enc</div><div class='del'>-</div><div class='del'>-	GCM_COMPLETE arg10, arg11</div><div class='del'>-	FUNC_RESTORE</div><div class='del'>-	RET</div><div class='del'>-SYM_FUNC_END(aesni_gcm_enc)</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'> * void aesni_gcm_init(void *aes_ctx,      // AES Key schedule. Starts on a 16 byte boundary.</div><div class='hunk'>@@ -1820,8 +1634,8 @@ SYM_FUNC_START_LOCAL(_key_expansion_256b)</div><div class='ctx'> SYM_FUNC_END(_key_expansion_256b)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,</div><div class='del'>- *                   unsigned int key_len)</div><div class='add'>+ * void aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,</div><div class='add'>+ *                    unsigned int key_len)</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(aesni_set_key)</div><div class='ctx'> 	FRAME_BEGIN</div><div class='hunk'>@@ -1926,7 +1740,6 @@ SYM_FUNC_START(aesni_set_key)</div><div class='ctx'> 	sub $0x10, UKEYP</div><div class='ctx'> 	cmp TKEYP, KEYP</div><div class='ctx'> 	jb .Ldec_key_loop</div><div class='del'>-	xor AREG, AREG</div><div class='ctx'> #ifndef __x86_64__</div><div class='ctx'> 	popl KEYP</div><div class='ctx'> #endif</div><div class='hunk'>@@ -2826,28 +2639,24 @@ SYM_FUNC_END(aesni_ctr_enc)</div><div class='ctx'> .previous</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * _aesni_gf128mul_x_ble:		internal ABI</div><div class='del'>- *	Multiply in GF(2^128) for XTS IVs</div><div class='add'>+ * _aesni_gf128mul_x_ble: Multiply in GF(2^128) for XTS IVs</div><div class='ctx'>  * input:</div><div class='ctx'>  *	IV:	current IV</div><div class='ctx'>  *	GF128MUL_MASK == mask with 0x87 and 0x01</div><div class='ctx'>  * output:</div><div class='ctx'>  *	IV:	next IV</div><div class='ctx'>  * changed:</div><div class='del'>- *	CTR:	== temporary value</div><div class='add'>+ *	KEY:	== temporary value</div><div class='ctx'>  */</div><div class='del'>-#define _aesni_gf128mul_x_ble() \</div><div class='del'>-	pshufd $0x13, IV, KEY; \</div><div class='del'>-	paddq IV, IV; \</div><div class='del'>-	psrad $31, KEY; \</div><div class='del'>-	pand GF128MUL_MASK, KEY; \</div><div class='del'>-	pxor KEY, IV;</div><div class='add'>+.macro _aesni_gf128mul_x_ble</div><div class='add'>+	pshufd $0x13, IV, KEY</div><div class='add'>+	paddq IV, IV</div><div class='add'>+	psrad $31, KEY</div><div class='add'>+	pand GF128MUL_MASK, KEY</div><div class='add'>+	pxor KEY, IV</div><div class='add'>+.endm</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * void aesni_xts_encrypt(const struct crypto_aes_ctx *ctx, u8 *dst,</div><div class='del'>- *			  const u8 *src, unsigned int len, le128 *iv)</div><div class='del'>- */</div><div class='del'>-SYM_FUNC_START(aesni_xts_encrypt)</div><div class='add'>+.macro	_aesni_xts_crypt	enc</div><div class='ctx'> 	FRAME_BEGIN</div><div class='ctx'> #ifndef __x86_64__</div><div class='ctx'> 	pushl IVP</div><div class='hunk'>@@ -2866,35 +2675,46 @@ SYM_FUNC_START(aesni_xts_encrypt)</div><div class='ctx'> 	movups (IVP), IV</div><div class='ctx'> </div><div class='ctx'> 	mov 480(KEYP), KLEN</div><div class='add'>+.if !\enc</div><div class='add'>+	add $240, KEYP</div><div class='ctx'> </div><div class='del'>-.Lxts_enc_loop4:</div><div class='add'>+	test $15, LEN</div><div class='add'>+	jz .Lxts_loop4\@</div><div class='add'>+	sub $16, LEN</div><div class='add'>+.endif</div><div class='add'>+</div><div class='add'>+.Lxts_loop4\@:</div><div class='ctx'> 	sub $64, LEN</div><div class='del'>-	jl .Lxts_enc_1x</div><div class='add'>+	jl .Lxts_1x\@</div><div class='ctx'> </div><div class='ctx'> 	movdqa IV, STATE1</div><div class='ctx'> 	movdqu 0x00(INP), IN</div><div class='ctx'> 	pxor IN, STATE1</div><div class='ctx'> 	movdqu IV, 0x00(OUTP)</div><div class='ctx'> </div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='add'>+	_aesni_gf128mul_x_ble</div><div class='ctx'> 	movdqa IV, STATE2</div><div class='ctx'> 	movdqu 0x10(INP), IN</div><div class='ctx'> 	pxor IN, STATE2</div><div class='ctx'> 	movdqu IV, 0x10(OUTP)</div><div class='ctx'> </div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='add'>+	_aesni_gf128mul_x_ble</div><div class='ctx'> 	movdqa IV, STATE3</div><div class='ctx'> 	movdqu 0x20(INP), IN</div><div class='ctx'> 	pxor IN, STATE3</div><div class='ctx'> 	movdqu IV, 0x20(OUTP)</div><div class='ctx'> </div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='add'>+	_aesni_gf128mul_x_ble</div><div class='ctx'> 	movdqa IV, STATE4</div><div class='ctx'> 	movdqu 0x30(INP), IN</div><div class='ctx'> 	pxor IN, STATE4</div><div class='ctx'> 	movdqu IV, 0x30(OUTP)</div><div class='ctx'> </div><div class='add'>+.if \enc</div><div class='ctx'> 	call _aesni_enc4</div><div class='add'>+.else</div><div class='add'>+	call _aesni_dec4</div><div class='add'>+.endif</div><div class='ctx'> </div><div class='ctx'> 	movdqu 0x00(OUTP), IN</div><div class='ctx'> 	pxor IN, STATE1</div><div class='hunk'>@@ -2912,17 +2732,17 @@ SYM_FUNC_START(aesni_xts_encrypt)</div><div class='ctx'> 	pxor IN, STATE4</div><div class='ctx'> 	movdqu STATE4, 0x30(OUTP)</div><div class='ctx'> </div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='add'>+	_aesni_gf128mul_x_ble</div><div class='ctx'> </div><div class='ctx'> 	add $64, INP</div><div class='ctx'> 	add $64, OUTP</div><div class='ctx'> 	test LEN, LEN</div><div class='del'>-	jnz .Lxts_enc_loop4</div><div class='add'>+	jnz .Lxts_loop4\@</div><div class='ctx'> </div><div class='del'>-.Lxts_enc_ret_iv:</div><div class='add'>+.Lxts_ret_iv\@:</div><div class='ctx'> 	movups IV, (IVP)</div><div class='ctx'> </div><div class='del'>-.Lxts_enc_ret:</div><div class='add'>+.Lxts_ret\@:</div><div class='ctx'> #ifndef __x86_64__</div><div class='ctx'> 	popl KLEN</div><div class='ctx'> 	popl KEYP</div><div class='hunk'>@@ -2932,201 +2752,60 @@ SYM_FUNC_START(aesni_xts_encrypt)</div><div class='ctx'> 	FRAME_END</div><div class='ctx'> 	RET</div><div class='ctx'> </div><div class='del'>-.Lxts_enc_1x:</div><div class='add'>+.Lxts_1x\@:</div><div class='ctx'> 	add $64, LEN</div><div class='del'>-	jz .Lxts_enc_ret_iv</div><div class='add'>+	jz .Lxts_ret_iv\@</div><div class='add'>+.if \enc</div><div class='ctx'> 	sub $16, LEN</div><div class='del'>-	jl .Lxts_enc_cts4</div><div class='add'>+	jl .Lxts_cts4\@</div><div class='add'>+.endif</div><div class='ctx'> </div><div class='del'>-.Lxts_enc_loop1:</div><div class='add'>+.Lxts_loop1\@:</div><div class='ctx'> 	movdqu (INP), STATE</div><div class='add'>+.if \enc</div><div class='ctx'> 	pxor IV, STATE</div><div class='ctx'> 	call _aesni_enc1</div><div class='del'>-	pxor IV, STATE</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='del'>-</div><div class='del'>-	test LEN, LEN</div><div class='del'>-	jz .Lxts_enc_out</div><div class='del'>-</div><div class='add'>+.else</div><div class='ctx'> 	add $16, INP</div><div class='ctx'> 	sub $16, LEN</div><div class='del'>-	jl .Lxts_enc_cts1</div><div class='del'>-</div><div class='del'>-	movdqu STATE, (OUTP)</div><div class='del'>-	add $16, OUTP</div><div class='del'>-	jmp .Lxts_enc_loop1</div><div class='del'>-</div><div class='del'>-.Lxts_enc_out:</div><div class='del'>-	movdqu STATE, (OUTP)</div><div class='del'>-	jmp .Lxts_enc_ret_iv</div><div class='del'>-</div><div class='del'>-.Lxts_enc_cts4:</div><div class='del'>-	movdqa STATE4, STATE</div><div class='del'>-	sub $16, OUTP</div><div class='del'>-</div><div class='del'>-.Lxts_enc_cts1:</div><div class='del'>-#ifndef __x86_64__</div><div class='del'>-	lea .Lcts_permute_table, T1</div><div class='del'>-#else</div><div class='del'>-	lea .Lcts_permute_table(%rip), T1</div><div class='del'>-#endif</div><div class='del'>-	add LEN, INP		/* rewind input pointer */</div><div class='del'>-	add $16, LEN		/* # bytes in final block */</div><div class='del'>-	movups (INP), IN1</div><div class='del'>-</div><div class='del'>-	mov T1, IVP</div><div class='del'>-	add $32, IVP</div><div class='del'>-	add LEN, T1</div><div class='del'>-	sub LEN, IVP</div><div class='del'>-	add OUTP, LEN</div><div class='del'>-</div><div class='del'>-	movups (T1), %xmm4</div><div class='del'>-	movaps STATE, IN2</div><div class='del'>-	pshufb %xmm4, STATE</div><div class='del'>-	movups STATE, (LEN)</div><div class='del'>-</div><div class='del'>-	movups (IVP), %xmm0</div><div class='del'>-	pshufb %xmm0, IN1</div><div class='del'>-	pblendvb IN2, IN1</div><div class='del'>-	movaps IN1, STATE</div><div class='del'>-</div><div class='add'>+	jl .Lxts_cts1\@</div><div class='ctx'> 	pxor IV, STATE</div><div class='del'>-	call _aesni_enc1</div><div class='add'>+	call _aesni_dec1</div><div class='add'>+.endif</div><div class='ctx'> 	pxor IV, STATE</div><div class='add'>+	_aesni_gf128mul_x_ble</div><div class='ctx'> </div><div class='del'>-	movups STATE, (OUTP)</div><div class='del'>-	jmp .Lxts_enc_ret</div><div class='del'>-SYM_FUNC_END(aesni_xts_encrypt)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * void aesni_xts_decrypt(const struct crypto_aes_ctx *ctx, u8 *dst,</div><div class='del'>- *			  const u8 *src, unsigned int len, le128 *iv)</div><div class='del'>- */</div><div class='del'>-SYM_FUNC_START(aesni_xts_decrypt)</div><div class='del'>-	FRAME_BEGIN</div><div class='del'>-#ifndef __x86_64__</div><div class='del'>-	pushl IVP</div><div class='del'>-	pushl LEN</div><div class='del'>-	pushl KEYP</div><div class='del'>-	pushl KLEN</div><div class='del'>-	movl (FRAME_OFFSET+20)(%esp), KEYP	# ctx</div><div class='del'>-	movl (FRAME_OFFSET+24)(%esp), OUTP	# dst</div><div class='del'>-	movl (FRAME_OFFSET+28)(%esp), INP	# src</div><div class='del'>-	movl (FRAME_OFFSET+32)(%esp), LEN	# len</div><div class='del'>-	movl (FRAME_OFFSET+36)(%esp), IVP	# iv</div><div class='del'>-	movdqa .Lgf128mul_x_ble_mask, GF128MUL_MASK</div><div class='del'>-#else</div><div class='del'>-	movdqa .Lgf128mul_x_ble_mask(%rip), GF128MUL_MASK</div><div class='del'>-#endif</div><div class='del'>-	movups (IVP), IV</div><div class='del'>-</div><div class='del'>-	mov 480(KEYP), KLEN</div><div class='del'>-	add $240, KEYP</div><div class='del'>-</div><div class='del'>-	test $15, LEN</div><div class='del'>-	jz .Lxts_dec_loop4</div><div class='del'>-	sub $16, LEN</div><div class='del'>-</div><div class='del'>-.Lxts_dec_loop4:</div><div class='del'>-	sub $64, LEN</div><div class='del'>-	jl .Lxts_dec_1x</div><div class='del'>-</div><div class='del'>-	movdqa IV, STATE1</div><div class='del'>-	movdqu 0x00(INP), IN</div><div class='del'>-	pxor IN, STATE1</div><div class='del'>-	movdqu IV, 0x00(OUTP)</div><div class='del'>-</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='del'>-	movdqa IV, STATE2</div><div class='del'>-	movdqu 0x10(INP), IN</div><div class='del'>-	pxor IN, STATE2</div><div class='del'>-	movdqu IV, 0x10(OUTP)</div><div class='del'>-</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='del'>-	movdqa IV, STATE3</div><div class='del'>-	movdqu 0x20(INP), IN</div><div class='del'>-	pxor IN, STATE3</div><div class='del'>-	movdqu IV, 0x20(OUTP)</div><div class='del'>-</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='del'>-	movdqa IV, STATE4</div><div class='del'>-	movdqu 0x30(INP), IN</div><div class='del'>-	pxor IN, STATE4</div><div class='del'>-	movdqu IV, 0x30(OUTP)</div><div class='del'>-</div><div class='del'>-	call _aesni_dec4</div><div class='del'>-</div><div class='del'>-	movdqu 0x00(OUTP), IN</div><div class='del'>-	pxor IN, STATE1</div><div class='del'>-	movdqu STATE1, 0x00(OUTP)</div><div class='del'>-</div><div class='del'>-	movdqu 0x10(OUTP), IN</div><div class='del'>-	pxor IN, STATE2</div><div class='del'>-	movdqu STATE2, 0x10(OUTP)</div><div class='del'>-</div><div class='del'>-	movdqu 0x20(OUTP), IN</div><div class='del'>-	pxor IN, STATE3</div><div class='del'>-	movdqu STATE3, 0x20(OUTP)</div><div class='del'>-</div><div class='del'>-	movdqu 0x30(OUTP), IN</div><div class='del'>-	pxor IN, STATE4</div><div class='del'>-	movdqu STATE4, 0x30(OUTP)</div><div class='del'>-</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='del'>-</div><div class='del'>-	add $64, INP</div><div class='del'>-	add $64, OUTP</div><div class='ctx'> 	test LEN, LEN</div><div class='del'>-	jnz .Lxts_dec_loop4</div><div class='del'>-</div><div class='del'>-.Lxts_dec_ret_iv:</div><div class='del'>-	movups IV, (IVP)</div><div class='del'>-</div><div class='del'>-.Lxts_dec_ret:</div><div class='del'>-#ifndef __x86_64__</div><div class='del'>-	popl KLEN</div><div class='del'>-	popl KEYP</div><div class='del'>-	popl LEN</div><div class='del'>-	popl IVP</div><div class='del'>-#endif</div><div class='del'>-	FRAME_END</div><div class='del'>-	RET</div><div class='del'>-</div><div class='del'>-.Lxts_dec_1x:</div><div class='del'>-	add $64, LEN</div><div class='del'>-	jz .Lxts_dec_ret_iv</div><div class='del'>-</div><div class='del'>-.Lxts_dec_loop1:</div><div class='del'>-	movdqu (INP), STATE</div><div class='add'>+	jz .Lxts_out\@</div><div class='ctx'> </div><div class='add'>+.if \enc</div><div class='ctx'> 	add $16, INP</div><div class='ctx'> 	sub $16, LEN</div><div class='del'>-	jl .Lxts_dec_cts1</div><div class='del'>-</div><div class='del'>-	pxor IV, STATE</div><div class='del'>-	call _aesni_dec1</div><div class='del'>-	pxor IV, STATE</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='del'>-</div><div class='del'>-	test LEN, LEN</div><div class='del'>-	jz .Lxts_dec_out</div><div class='add'>+	jl .Lxts_cts1\@</div><div class='add'>+.endif</div><div class='ctx'> </div><div class='ctx'> 	movdqu STATE, (OUTP)</div><div class='ctx'> 	add $16, OUTP</div><div class='del'>-	jmp .Lxts_dec_loop1</div><div class='add'>+	jmp .Lxts_loop1\@</div><div class='ctx'> </div><div class='del'>-.Lxts_dec_out:</div><div class='add'>+.Lxts_out\@:</div><div class='ctx'> 	movdqu STATE, (OUTP)</div><div class='del'>-	jmp .Lxts_dec_ret_iv</div><div class='add'>+	jmp .Lxts_ret_iv\@</div><div class='ctx'> </div><div class='del'>-.Lxts_dec_cts1:</div><div class='add'>+.if \enc</div><div class='add'>+.Lxts_cts4\@:</div><div class='add'>+	movdqa STATE4, STATE</div><div class='add'>+	sub $16, OUTP</div><div class='add'>+.Lxts_cts1\@:</div><div class='add'>+.else</div><div class='add'>+.Lxts_cts1\@:</div><div class='ctx'> 	movdqa IV, STATE4</div><div class='del'>-	_aesni_gf128mul_x_ble()</div><div class='add'>+	_aesni_gf128mul_x_ble</div><div class='ctx'> </div><div class='ctx'> 	pxor IV, STATE</div><div class='ctx'> 	call _aesni_dec1</div><div class='ctx'> 	pxor IV, STATE</div><div class='del'>-</div><div class='add'>+.endif</div><div class='ctx'> #ifndef __x86_64__</div><div class='ctx'> 	lea .Lcts_permute_table, T1</div><div class='ctx'> #else</div><div class='hunk'>@@ -3152,10 +2831,32 @@ SYM_FUNC_START(aesni_xts_decrypt)</div><div class='ctx'> 	pblendvb IN2, IN1</div><div class='ctx'> 	movaps IN1, STATE</div><div class='ctx'> </div><div class='add'>+.if \enc</div><div class='add'>+	pxor IV, STATE</div><div class='add'>+	call _aesni_enc1</div><div class='add'>+	pxor IV, STATE</div><div class='add'>+.else</div><div class='ctx'> 	pxor STATE4, STATE</div><div class='ctx'> 	call _aesni_dec1</div><div class='ctx'> 	pxor STATE4, STATE</div><div class='add'>+.endif</div><div class='ctx'> </div><div class='ctx'> 	movups STATE, (OUTP)</div><div class='del'>-	jmp .Lxts_dec_ret</div><div class='del'>-SYM_FUNC_END(aesni_xts_decrypt)</div><div class='add'>+	jmp .Lxts_ret\@</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * void aesni_xts_enc(const struct crypto_aes_ctx *ctx, u8 *dst,</div><div class='add'>+ *		      const u8 *src, unsigned int len, le128 *iv)</div><div class='add'>+ */</div><div class='add'>+SYM_FUNC_START(aesni_xts_enc)</div><div class='add'>+	_aesni_xts_crypt	1</div><div class='add'>+SYM_FUNC_END(aesni_xts_enc)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * void aesni_xts_dec(const struct crypto_aes_ctx *ctx, u8 *dst,</div><div class='add'>+ *		      const u8 *src, unsigned int len, le128 *iv)</div><div class='add'>+ */</div><div class='add'>+SYM_FUNC_START(aesni_xts_dec)</div><div class='add'>+	_aesni_xts_crypt	0</div><div class='add'>+SYM_FUNC_END(aesni_xts_dec)</div><div class='head'>diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c<br/>index b1d90c25975a..5b25d2a58aeb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aesni-intel_glue.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/aesni-intel_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aesni-intel_glue.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/aesni-intel_glue.c</a></div><div class='hunk'>@@ -40,7 +40,6 @@</div><div class='ctx'> #define AESNI_ALIGN	16</div><div class='ctx'> #define AESNI_ALIGN_ATTR __attribute__ ((__aligned__(AESNI_ALIGN)))</div><div class='ctx'> #define AES_BLOCK_MASK	(~(AES_BLOCK_SIZE - 1))</div><div class='del'>-#define RFC4106_HASH_SUBKEY_SIZE 16</div><div class='ctx'> #define AESNI_ALIGN_EXTRA ((AESNI_ALIGN - 1) &amp; ~(CRYPTO_MINALIGN - 1))</div><div class='ctx'> #define CRYPTO_AES_CTX_SIZE (sizeof(struct crypto_aes_ctx) + AESNI_ALIGN_EXTRA)</div><div class='ctx'> #define XTS_AES_CTX_SIZE (sizeof(struct aesni_xts_ctx) + AESNI_ALIGN_EXTRA)</div><div class='hunk'>@@ -87,8 +86,8 @@ static inline void *aes_align_addr(void *addr)</div><div class='ctx'> 	return PTR_ALIGN(addr, AESNI_ALIGN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,</div><div class='del'>-			     unsigned int key_len);</div><div class='add'>+asmlinkage void aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,</div><div class='add'>+			      unsigned int key_len);</div><div class='ctx'> asmlinkage void aesni_enc(const void *ctx, u8 *out, const u8 *in);</div><div class='ctx'> asmlinkage void aesni_dec(const void *ctx, u8 *out, const u8 *in);</div><div class='ctx'> asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,</div><div class='hunk'>@@ -107,11 +106,11 @@ asmlinkage void aesni_cts_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,</div><div class='ctx'> #define AVX_GEN2_OPTSIZE 640</div><div class='ctx'> #define AVX_GEN4_OPTSIZE 4096</div><div class='ctx'> </div><div class='del'>-asmlinkage void aesni_xts_encrypt(const struct crypto_aes_ctx *ctx, u8 *out,</div><div class='del'>-				  const u8 *in, unsigned int len, u8 *iv);</div><div class='add'>+asmlinkage void aesni_xts_enc(const struct crypto_aes_ctx *ctx, u8 *out,</div><div class='add'>+			      const u8 *in, unsigned int len, u8 *iv);</div><div class='ctx'> </div><div class='del'>-asmlinkage void aesni_xts_decrypt(const struct crypto_aes_ctx *ctx, u8 *out,</div><div class='del'>-				  const u8 *in, unsigned int len, u8 *iv);</div><div class='add'>+asmlinkage void aesni_xts_dec(const struct crypto_aes_ctx *ctx, u8 *out,</div><div class='add'>+			      const u8 *in, unsigned int len, u8 *iv);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> </div><div class='hunk'>@@ -233,19 +232,17 @@ static int aes_set_key_common(struct crypto_aes_ctx *ctx,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (key_len != AES_KEYSIZE_128 &amp;&amp; key_len != AES_KEYSIZE_192 &amp;&amp;</div><div class='del'>-	    key_len != AES_KEYSIZE_256)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (!crypto_simd_usable())</div><div class='del'>-		err = aes_expandkey(ctx, in_key, key_len);</div><div class='del'>-	else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		err = aesni_set_key(ctx, in_key, key_len);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='add'>+		return aes_expandkey(ctx, in_key, key_len);</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	err = aes_check_keylen(key_len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+	aesni_set_key(ctx, in_key, key_len);</div><div class='add'>+	kernel_fpu_end();</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,</div><div class='hunk'>@@ -592,23 +589,12 @@ static int xctr_crypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)</div><div class='add'>+static int aes_gcm_derive_hash_subkey(const struct crypto_aes_ctx *aes_key,</div><div class='add'>+				      u8 hash_subkey[AES_BLOCK_SIZE])</div><div class='ctx'> {</div><div class='del'>-	struct crypto_aes_ctx ctx;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = aes_expandkey(&amp;ctx, key, key_len);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Clear the data in the hash sub key container to zero.*/</div><div class='del'>-	/* We want to cipher all zeros to create the hash sub key. */</div><div class='del'>-	memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);</div><div class='del'>-</div><div class='del'>-	aes_encrypt(&amp;ctx, hash_subkey, hash_subkey);</div><div class='add'>+	static const u8 zeroes[AES_BLOCK_SIZE];</div><div class='ctx'> </div><div class='del'>-	memzero_explicit(&amp;ctx, sizeof(ctx));</div><div class='add'>+	aes_encrypt(aes_key, hash_subkey, zeroes);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -626,7 +612,8 @@ static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key,</div><div class='ctx'> 	memcpy(ctx-&gt;nonce, key + key_len, sizeof(ctx-&gt;nonce));</div><div class='ctx'> </div><div class='ctx'> 	return aes_set_key_common(&amp;ctx-&gt;aes_key_expanded, key, key_len) ?:</div><div class='del'>-	       rfc4106_set_hash_subkey(ctx-&gt;hash_subkey, key, key_len);</div><div class='add'>+	       aes_gcm_derive_hash_subkey(&amp;ctx-&gt;aes_key_expanded,</div><div class='add'>+					  ctx-&gt;hash_subkey);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This is the Integrity Check Value (aka the authentication tag) length and can</div><div class='hunk'>@@ -877,7 +864,7 @@ static int helper_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='add'>+static int xts_setkey_aesni(struct crypto_skcipher *tfm, const u8 *key,</div><div class='ctx'> 			    unsigned int keylen)</div><div class='ctx'> {</div><div class='ctx'> 	struct aesni_xts_ctx *ctx = aes_xts_ctx(tfm);</div><div class='hunk'>@@ -898,108 +885,149 @@ static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='ctx'> 	return aes_set_key_common(&amp;ctx-&gt;tweak_ctx, key + keylen, keylen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xts_crypt(struct skcipher_request *req, bool encrypt)</div><div class='add'>+typedef void (*xts_encrypt_iv_func)(const struct crypto_aes_ctx *tweak_key,</div><div class='add'>+				    u8 iv[AES_BLOCK_SIZE]);</div><div class='add'>+typedef void (*xts_crypt_func)(const struct crypto_aes_ctx *key,</div><div class='add'>+			       const u8 *src, u8 *dst, unsigned int len,</div><div class='add'>+			       u8 tweak[AES_BLOCK_SIZE]);</div><div class='add'>+</div><div class='add'>+/* This handles cases where the source and/or destination span pages. */</div><div class='add'>+static noinline int</div><div class='add'>+xts_crypt_slowpath(struct skcipher_request *req, xts_crypt_func crypt_func)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct aesni_xts_ctx *ctx = aes_xts_ctx(tfm);</div><div class='add'>+	const struct aesni_xts_ctx *ctx = aes_xts_ctx(tfm);</div><div class='ctx'> 	int tail = req-&gt;cryptlen % AES_BLOCK_SIZE;</div><div class='add'>+	struct scatterlist sg_src[2], sg_dst[2];</div><div class='ctx'> 	struct skcipher_request subreq;</div><div class='ctx'> 	struct skcipher_walk walk;</div><div class='add'>+	struct scatterlist *src, *dst;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (req-&gt;cryptlen &lt; AES_BLOCK_SIZE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	if (!walk.nbytes)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (unlikely(tail &gt; 0 &amp;&amp; walk.nbytes &lt; walk.total)) {</div><div class='del'>-		int blocks = DIV_ROUND_UP(req-&gt;cryptlen, AES_BLOCK_SIZE) - 2;</div><div class='del'>-</div><div class='del'>-		skcipher_walk_abort(&amp;walk);</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * If the message length isn't divisible by the AES block size, then</div><div class='add'>+	 * separate off the last full block and the partial block.  This ensures</div><div class='add'>+	 * that they are processed in the same call to the assembly function,</div><div class='add'>+	 * which is required for ciphertext stealing.</div><div class='add'>+	 */</div><div class='add'>+	if (tail) {</div><div class='ctx'> 		skcipher_request_set_tfm(&amp;subreq, tfm);</div><div class='ctx'> 		skcipher_request_set_callback(&amp;subreq,</div><div class='ctx'> 					      skcipher_request_flags(req),</div><div class='ctx'> 					      NULL, NULL);</div><div class='ctx'> 		skcipher_request_set_crypt(&amp;subreq, req-&gt;src, req-&gt;dst,</div><div class='del'>-					   blocks * AES_BLOCK_SIZE, req-&gt;iv);</div><div class='add'>+					   req-&gt;cryptlen - tail - AES_BLOCK_SIZE,</div><div class='add'>+					   req-&gt;iv);</div><div class='ctx'> 		req = &amp;subreq;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-		if (!walk.nbytes)</div><div class='del'>-			return err;</div><div class='del'>-	} else {</div><div class='del'>-		tail = 0;</div><div class='add'>+	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='add'>+</div><div class='add'>+	while (walk.nbytes) {</div><div class='add'>+		kernel_fpu_begin();</div><div class='add'>+		(*crypt_func)(&amp;ctx-&gt;crypt_ctx,</div><div class='add'>+			      walk.src.virt.addr, walk.dst.virt.addr,</div><div class='add'>+			      walk.nbytes &amp; ~(AES_BLOCK_SIZE - 1), req-&gt;iv);</div><div class='add'>+		kernel_fpu_end();</div><div class='add'>+		err = skcipher_walk_done(&amp;walk,</div><div class='add'>+					 walk.nbytes &amp; (AES_BLOCK_SIZE - 1));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	kernel_fpu_begin();</div><div class='add'>+	if (err || !tail)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	/* calculate first value of T */</div><div class='del'>-	aesni_enc(&amp;ctx-&gt;tweak_ctx, walk.iv, walk.iv);</div><div class='add'>+	/* Do ciphertext stealing with the last full block and partial block. */</div><div class='ctx'> </div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes &amp;= ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-		if (encrypt)</div><div class='del'>-			aesni_xts_encrypt(&amp;ctx-&gt;crypt_ctx,</div><div class='del'>-					  walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-					  nbytes, walk.iv);</div><div class='del'>-		else</div><div class='del'>-			aesni_xts_decrypt(&amp;ctx-&gt;crypt_ctx,</div><div class='del'>-					  walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-					  nbytes, walk.iv);</div><div class='del'>-		kernel_fpu_end();</div><div class='add'>+	dst = src = scatterwalk_ffwd(sg_src, req-&gt;src, req-&gt;cryptlen);</div><div class='add'>+	if (req-&gt;dst != req-&gt;src)</div><div class='add'>+		dst = scatterwalk_ffwd(sg_dst, req-&gt;dst, req-&gt;cryptlen);</div><div class='ctx'> </div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='add'>+	skcipher_request_set_crypt(req, src, dst, AES_BLOCK_SIZE + tail,</div><div class='add'>+				   req-&gt;iv);</div><div class='ctx'> </div><div class='del'>-		if (walk.nbytes &gt; 0)</div><div class='del'>-			kernel_fpu_begin();</div><div class='del'>-	}</div><div class='add'>+	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(tail &gt; 0 &amp;&amp; !err)) {</div><div class='del'>-		struct scatterlist sg_src[2], sg_dst[2];</div><div class='del'>-		struct scatterlist *src, *dst;</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+	(*crypt_func)(&amp;ctx-&gt;crypt_ctx, walk.src.virt.addr, walk.dst.virt.addr,</div><div class='add'>+		      walk.nbytes, req-&gt;iv);</div><div class='add'>+	kernel_fpu_end();</div><div class='ctx'> </div><div class='del'>-		dst = src = scatterwalk_ffwd(sg_src, req-&gt;src, req-&gt;cryptlen);</div><div class='del'>-		if (req-&gt;dst != req-&gt;src)</div><div class='del'>-			dst = scatterwalk_ffwd(sg_dst, req-&gt;dst, req-&gt;cryptlen);</div><div class='add'>+	return skcipher_walk_done(&amp;walk, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		skcipher_request_set_crypt(req, src, dst, AES_BLOCK_SIZE + tail,</div><div class='del'>-					   req-&gt;iv);</div><div class='add'>+/* __always_inline to avoid indirect call in fastpath */</div><div class='add'>+static __always_inline int</div><div class='add'>+xts_crypt(struct skcipher_request *req, xts_encrypt_iv_func encrypt_iv,</div><div class='add'>+	  xts_crypt_func crypt_func)</div><div class='add'>+{</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	const struct aesni_xts_ctx *ctx = aes_xts_ctx(tfm);</div><div class='add'>+	const unsigned int cryptlen = req-&gt;cryptlen;</div><div class='add'>+	struct scatterlist *src = req-&gt;src;</div><div class='add'>+	struct scatterlist *dst = req-&gt;dst;</div><div class='ctx'> </div><div class='del'>-		err = skcipher_walk_virt(&amp;walk, &amp;subreq, false);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+	if (unlikely(cryptlen &lt; AES_BLOCK_SIZE))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		if (encrypt)</div><div class='del'>-			aesni_xts_encrypt(&amp;ctx-&gt;crypt_ctx,</div><div class='del'>-					  walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-					  walk.nbytes, walk.iv);</div><div class='del'>-		else</div><div class='del'>-			aesni_xts_decrypt(&amp;ctx-&gt;crypt_ctx,</div><div class='del'>-					  walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-					  walk.nbytes, walk.iv);</div><div class='del'>-		kernel_fpu_end();</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+	(*encrypt_iv)(&amp;ctx-&gt;tweak_ctx, req-&gt;iv);</div><div class='ctx'> </div><div class='del'>-		err = skcipher_walk_done(&amp;walk, 0);</div><div class='add'>+	/*</div><div class='add'>+	 * In practice, virtually all XTS plaintexts and ciphertexts are either</div><div class='add'>+	 * 512 or 4096 bytes, aligned such that they don't span page boundaries.</div><div class='add'>+	 * To optimize the performance of these cases, and also any other case</div><div class='add'>+	 * where no page boundary is spanned, the below fast-path handles</div><div class='add'>+	 * single-page sources and destinations as efficiently as possible.</div><div class='add'>+	 */</div><div class='add'>+	if (likely(src-&gt;length &gt;= cryptlen &amp;&amp; dst-&gt;length &gt;= cryptlen &amp;&amp;</div><div class='add'>+		   src-&gt;offset + cryptlen &lt;= PAGE_SIZE &amp;&amp;</div><div class='add'>+		   dst-&gt;offset + cryptlen &lt;= PAGE_SIZE)) {</div><div class='add'>+		struct page *src_page = sg_page(src);</div><div class='add'>+		struct page *dst_page = sg_page(dst);</div><div class='add'>+		void *src_virt = kmap_local_page(src_page) + src-&gt;offset;</div><div class='add'>+		void *dst_virt = kmap_local_page(dst_page) + dst-&gt;offset;</div><div class='add'>+</div><div class='add'>+		(*crypt_func)(&amp;ctx-&gt;crypt_ctx, src_virt, dst_virt, cryptlen,</div><div class='add'>+			      req-&gt;iv);</div><div class='add'>+		kunmap_local(dst_virt);</div><div class='add'>+		kunmap_local(src_virt);</div><div class='add'>+		kernel_fpu_end();</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	return err;</div><div class='add'>+	kernel_fpu_end();</div><div class='add'>+	return xts_crypt_slowpath(req, crypt_func);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aesni_xts_encrypt_iv(const struct crypto_aes_ctx *tweak_key,</div><div class='add'>+				 u8 iv[AES_BLOCK_SIZE])</div><div class='add'>+{</div><div class='add'>+	aesni_enc(tweak_key, iv, iv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aesni_xts_encrypt(const struct crypto_aes_ctx *key,</div><div class='add'>+			      const u8 *src, u8 *dst, unsigned int len,</div><div class='add'>+			      u8 tweak[AES_BLOCK_SIZE])</div><div class='add'>+{</div><div class='add'>+	aesni_xts_enc(key, dst, src, len, tweak);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xts_encrypt(struct skcipher_request *req)</div><div class='add'>+static void aesni_xts_decrypt(const struct crypto_aes_ctx *key,</div><div class='add'>+			      const u8 *src, u8 *dst, unsigned int len,</div><div class='add'>+			      u8 tweak[AES_BLOCK_SIZE])</div><div class='ctx'> {</div><div class='del'>-	return xts_crypt(req, true);</div><div class='add'>+	aesni_xts_dec(key, dst, src, len, tweak);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xts_decrypt(struct skcipher_request *req)</div><div class='add'>+static int xts_encrypt_aesni(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='del'>-	return xts_crypt(req, false);</div><div class='add'>+	return xts_crypt(req, aesni_xts_encrypt_iv, aesni_xts_encrypt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xts_decrypt_aesni(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	return xts_crypt(req, aesni_xts_encrypt_iv, aesni_xts_decrypt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct crypto_alg aesni_cipher_alg = {</div><div class='hunk'>@@ -1103,9 +1131,9 @@ static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> 		.max_keysize	= 2 * AES_MAX_KEY_SIZE,</div><div class='ctx'> 		.ivsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 		.walksize	= 2 * AES_BLOCK_SIZE,</div><div class='del'>-		.setkey		= xts_aesni_setkey,</div><div class='del'>-		.encrypt	= xts_encrypt,</div><div class='del'>-		.decrypt	= xts_decrypt,</div><div class='add'>+		.setkey		= xts_setkey_aesni,</div><div class='add'>+		.encrypt	= xts_encrypt_aesni,</div><div class='add'>+		.decrypt	= xts_decrypt_aesni,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1137,7 +1165,149 @@ static struct skcipher_alg aesni_xctr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct simd_skcipher_alg *aesni_simd_xctr;</div><div class='del'>-#endif /* CONFIG_X86_64 */</div><div class='add'>+</div><div class='add'>+asmlinkage void aes_xts_encrypt_iv(const struct crypto_aes_ctx *tweak_key,</div><div class='add'>+				   u8 iv[AES_BLOCK_SIZE]);</div><div class='add'>+</div><div class='add'>+#define DEFINE_XTS_ALG(suffix, driver_name, priority)			       \</div><div class='add'>+									       \</div><div class='add'>+asmlinkage void								       \</div><div class='add'>+aes_xts_encrypt_##suffix(const struct crypto_aes_ctx *key, const u8 *src,      \</div><div class='add'>+			 u8 *dst, unsigned int len, u8 tweak[AES_BLOCK_SIZE]); \</div><div class='add'>+asmlinkage void								       \</div><div class='add'>+aes_xts_decrypt_##suffix(const struct crypto_aes_ctx *key, const u8 *src,      \</div><div class='add'>+			 u8 *dst, unsigned int len, u8 tweak[AES_BLOCK_SIZE]); \</div><div class='add'>+									       \</div><div class='add'>+static int xts_encrypt_##suffix(struct skcipher_request *req)		       \</div><div class='add'>+{									       \</div><div class='add'>+	return xts_crypt(req, aes_xts_encrypt_iv, aes_xts_encrypt_##suffix);   \</div><div class='add'>+}									       \</div><div class='add'>+									       \</div><div class='add'>+static int xts_decrypt_##suffix(struct skcipher_request *req)		       \</div><div class='add'>+{									       \</div><div class='add'>+	return xts_crypt(req, aes_xts_encrypt_iv, aes_xts_decrypt_##suffix);   \</div><div class='add'>+}									       \</div><div class='add'>+									       \</div><div class='add'>+static struct skcipher_alg aes_xts_alg_##suffix = {			       \</div><div class='add'>+	.base = {							       \</div><div class='add'>+		.cra_name		= "__xts(aes)",			       \</div><div class='add'>+		.cra_driver_name	= "__" driver_name,		       \</div><div class='add'>+		.cra_priority		= priority,			       \</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_INTERNAL,		       \</div><div class='add'>+		.cra_blocksize		= AES_BLOCK_SIZE,		       \</div><div class='add'>+		.cra_ctxsize		= XTS_AES_CTX_SIZE,		       \</div><div class='add'>+		.cra_module		= THIS_MODULE,			       \</div><div class='add'>+	},								       \</div><div class='add'>+	.min_keysize	= 2 * AES_MIN_KEY_SIZE,				       \</div><div class='add'>+	.max_keysize	= 2 * AES_MAX_KEY_SIZE,				       \</div><div class='add'>+	.ivsize		= AES_BLOCK_SIZE,				       \</div><div class='add'>+	.walksize	= 2 * AES_BLOCK_SIZE,				       \</div><div class='add'>+	.setkey		= xts_setkey_aesni,				       \</div><div class='add'>+	.encrypt	= xts_encrypt_##suffix,				       \</div><div class='add'>+	.decrypt	= xts_decrypt_##suffix,				       \</div><div class='add'>+};									       \</div><div class='add'>+									       \</div><div class='add'>+static struct simd_skcipher_alg *aes_xts_simdalg_##suffix</div><div class='add'>+</div><div class='add'>+DEFINE_XTS_ALG(aesni_avx, "xts-aes-aesni-avx", 500);</div><div class='add'>+#if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='add'>+DEFINE_XTS_ALG(vaes_avx2, "xts-aes-vaes-avx2", 600);</div><div class='add'>+DEFINE_XTS_ALG(vaes_avx10_256, "xts-aes-vaes-avx10_256", 700);</div><div class='add'>+DEFINE_XTS_ALG(vaes_avx10_512, "xts-aes-vaes-avx10_512", 800);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is a list of CPU models that are known to suffer from downclocking when</div><div class='add'>+ * zmm registers (512-bit vectors) are used.  On these CPUs, the AES-XTS</div><div class='add'>+ * implementation with zmm registers won't be used by default.  An</div><div class='add'>+ * implementation with ymm registers (256-bit vectors) will be used instead.</div><div class='add'>+ */</div><div class='add'>+static const struct x86_cpu_id zmm_exclusion_list[] = {</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_SKYLAKE_X },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_ICELAKE_X },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_ICELAKE_D },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_ICELAKE },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_ICELAKE_L },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_ICELAKE_NNPI },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_TIGERLAKE_L },</div><div class='add'>+	{ .vendor = X86_VENDOR_INTEL, .family = 6, .model = INTEL_FAM6_TIGERLAKE },</div><div class='add'>+	/* Allow Rocket Lake and later, and Sapphire Rapids and later. */</div><div class='add'>+	/* Also allow AMD CPUs (starting with Zen 4, the first with AVX-512). */</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init register_xts_algs(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_AVX))</div><div class='add'>+		return 0;</div><div class='add'>+	err = simd_register_skciphers_compat(&amp;aes_xts_alg_aesni_avx, 1,</div><div class='add'>+					     &amp;aes_xts_simdalg_aesni_avx);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+#if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_AVX2) ||</div><div class='add'>+	    !boot_cpu_has(X86_FEATURE_VAES) ||</div><div class='add'>+	    !boot_cpu_has(X86_FEATURE_VPCLMULQDQ) ||</div><div class='add'>+	    !boot_cpu_has(X86_FEATURE_PCLMULQDQ) ||</div><div class='add'>+	    !cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))</div><div class='add'>+		return 0;</div><div class='add'>+	err = simd_register_skciphers_compat(&amp;aes_xts_alg_vaes_avx2, 1,</div><div class='add'>+					     &amp;aes_xts_simdalg_vaes_avx2);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_AVX512BW) ||</div><div class='add'>+	    !boot_cpu_has(X86_FEATURE_AVX512VL) ||</div><div class='add'>+	    !boot_cpu_has(X86_FEATURE_BMI2) ||</div><div class='add'>+	    !cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM |</div><div class='add'>+			       XFEATURE_MASK_AVX512, NULL))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = simd_register_skciphers_compat(&amp;aes_xts_alg_vaes_avx10_256, 1,</div><div class='add'>+					     &amp;aes_xts_simdalg_vaes_avx10_256);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (x86_match_cpu(zmm_exclusion_list))</div><div class='add'>+		aes_xts_alg_vaes_avx10_512.base.cra_priority = 1;</div><div class='add'>+</div><div class='add'>+	err = simd_register_skciphers_compat(&amp;aes_xts_alg_vaes_avx10_512, 1,</div><div class='add'>+					     &amp;aes_xts_simdalg_vaes_avx10_512);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+#endif /* CONFIG_AS_VAES &amp;&amp; CONFIG_AS_VPCLMULQDQ */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void unregister_xts_algs(void)</div><div class='add'>+{</div><div class='add'>+	if (aes_xts_simdalg_aesni_avx)</div><div class='add'>+		simd_unregister_skciphers(&amp;aes_xts_alg_aesni_avx, 1,</div><div class='add'>+					  &amp;aes_xts_simdalg_aesni_avx);</div><div class='add'>+#if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='add'>+	if (aes_xts_simdalg_vaes_avx2)</div><div class='add'>+		simd_unregister_skciphers(&amp;aes_xts_alg_vaes_avx2, 1,</div><div class='add'>+					  &amp;aes_xts_simdalg_vaes_avx2);</div><div class='add'>+	if (aes_xts_simdalg_vaes_avx10_256)</div><div class='add'>+		simd_unregister_skciphers(&amp;aes_xts_alg_vaes_avx10_256, 1,</div><div class='add'>+					  &amp;aes_xts_simdalg_vaes_avx10_256);</div><div class='add'>+	if (aes_xts_simdalg_vaes_avx10_512)</div><div class='add'>+		simd_unregister_skciphers(&amp;aes_xts_alg_vaes_avx10_512, 1,</div><div class='add'>+					  &amp;aes_xts_simdalg_vaes_avx10_512);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+#else /* CONFIG_X86_64 */</div><div class='add'>+static int __init register_xts_algs(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void unregister_xts_algs(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif /* !CONFIG_X86_64 */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key,</div><div class='hunk'>@@ -1146,7 +1316,8 @@ static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key,</div><div class='ctx'> 	struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(aead);</div><div class='ctx'> </div><div class='ctx'> 	return aes_set_key_common(&amp;ctx-&gt;aes_key_expanded, key, key_len) ?:</div><div class='del'>-	       rfc4106_set_hash_subkey(ctx-&gt;hash_subkey, key, key_len);</div><div class='add'>+	       aes_gcm_derive_hash_subkey(&amp;ctx-&gt;aes_key_expanded,</div><div class='add'>+					  ctx-&gt;hash_subkey);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int generic_gcmaes_encrypt(struct aead_request *req)</div><div class='hunk'>@@ -1276,13 +1447,21 @@ static int __init aesni_init(void)</div><div class='ctx'> 		goto unregister_aeads;</div><div class='ctx'> #endif /* CONFIG_X86_64 */</div><div class='ctx'> </div><div class='add'>+	err = register_xts_algs();</div><div class='add'>+	if (err)</div><div class='add'>+		goto unregister_xts;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+unregister_xts:</div><div class='add'>+	unregister_xts_algs();</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='add'>+	if (aesni_simd_xctr)</div><div class='add'>+		simd_unregister_skciphers(&amp;aesni_xctr, 1, &amp;aesni_simd_xctr);</div><div class='ctx'> unregister_aeads:</div><div class='add'>+#endif /* CONFIG_X86_64 */</div><div class='ctx'> 	simd_unregister_aeads(aesni_aeads, ARRAY_SIZE(aesni_aeads),</div><div class='ctx'> 				aesni_simd_aeads);</div><div class='del'>-#endif /* CONFIG_X86_64 */</div><div class='ctx'> </div><div class='ctx'> unregister_skciphers:</div><div class='ctx'> 	simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),</div><div class='hunk'>@@ -1303,6 +1482,7 @@ static void __exit aesni_exit(void)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_AVX))</div><div class='ctx'> 		simd_unregister_skciphers(&amp;aesni_xctr, 1, &amp;aesni_simd_xctr);</div><div class='ctx'> #endif /* CONFIG_X86_64 */</div><div class='add'>+	unregister_xts_algs();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> late_initcall(aesni_init);</div><div class='head'>diff --git a/arch/x86/crypto/nh-avx2-x86_64.S b/arch/x86/crypto/nh-avx2-x86_64.S<br/>index ef73a3ab8726..791386d9a83a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/nh-avx2-x86_64.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/nh-avx2-x86_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/nh-avx2-x86_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/nh-avx2-x86_64.S</a></div><div class='hunk'>@@ -154,5 +154,6 @@ SYM_TYPED_FUNC_START(nh_avx2)</div><div class='ctx'> 	vpaddq		T1, T0, T0</div><div class='ctx'> 	vpaddq		T4, T0, T0</div><div class='ctx'> 	vmovdqu		T0, (HASH)</div><div class='add'>+	vzeroupper</div><div class='ctx'> 	RET</div><div class='ctx'> SYM_FUNC_END(nh_avx2)</div><div class='head'>diff --git a/arch/x86/crypto/sha256-avx2-asm.S b/arch/x86/crypto/sha256-avx2-asm.S<br/>index 9918212faf91..0ffb072be956 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256-avx2-asm.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/sha256-avx2-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256-avx2-asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/sha256-avx2-asm.S</a></div><div class='hunk'>@@ -716,6 +716,7 @@ SYM_TYPED_FUNC_START(sha256_transform_rorx)</div><div class='ctx'> 	popq	%r13</div><div class='ctx'> 	popq	%r12</div><div class='ctx'> 	popq	%rbx</div><div class='add'>+	vzeroupper</div><div class='ctx'> 	RET</div><div class='ctx'> SYM_FUNC_END(sha256_transform_rorx)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/sha256_ni_asm.S b/arch/x86/crypto/sha256_ni_asm.S<br/>index 537b6dcd7ed8..d515a55a3bc1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256_ni_asm.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/sha256_ni_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256_ni_asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/sha256_ni_asm.S</a></div><div class='hunk'>@@ -62,20 +62,41 @@</div><div class='ctx'> </div><div class='ctx'> #define SHA256CONSTANTS	%rax</div><div class='ctx'> </div><div class='del'>-#define MSG		%xmm0</div><div class='add'>+#define MSG		%xmm0  /* sha256rnds2 implicit operand */</div><div class='ctx'> #define STATE0		%xmm1</div><div class='ctx'> #define STATE1		%xmm2</div><div class='del'>-#define MSGTMP0		%xmm3</div><div class='del'>-#define MSGTMP1		%xmm4</div><div class='del'>-#define MSGTMP2		%xmm5</div><div class='del'>-#define MSGTMP3		%xmm6</div><div class='del'>-#define MSGTMP4		%xmm7</div><div class='add'>+#define MSG0		%xmm3</div><div class='add'>+#define MSG1		%xmm4</div><div class='add'>+#define MSG2		%xmm5</div><div class='add'>+#define MSG3		%xmm6</div><div class='add'>+#define TMP		%xmm7</div><div class='ctx'> </div><div class='ctx'> #define SHUF_MASK	%xmm8</div><div class='ctx'> </div><div class='ctx'> #define ABEF_SAVE	%xmm9</div><div class='ctx'> #define CDGH_SAVE	%xmm10</div><div class='ctx'> </div><div class='add'>+.macro do_4rounds	i, m0, m1, m2, m3</div><div class='add'>+.if \i &lt; 16</div><div class='add'>+	movdqu		\i*4(DATA_PTR), \m0</div><div class='add'>+	pshufb		SHUF_MASK, \m0</div><div class='add'>+.endif</div><div class='add'>+	movdqa		(\i-32)*4(SHA256CONSTANTS), MSG</div><div class='add'>+	paddd		\m0, MSG</div><div class='add'>+	sha256rnds2	STATE0, STATE1</div><div class='add'>+.if \i &gt;= 12 &amp;&amp; \i &lt; 60</div><div class='add'>+	movdqa		\m0, TMP</div><div class='add'>+	palignr		$4, \m3, TMP</div><div class='add'>+	paddd		TMP, \m1</div><div class='add'>+	sha256msg2	\m0, \m1</div><div class='add'>+.endif</div><div class='add'>+	punpckhqdq	MSG, MSG</div><div class='add'>+	sha256rnds2	STATE1, STATE0</div><div class='add'>+.if \i &gt;= 4 &amp;&amp; \i &lt; 52</div><div class='add'>+	sha256msg1	\m0, \m3</div><div class='add'>+.endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Intel SHA Extensions optimized implementation of a SHA-256 update function</div><div class='ctx'>  *</div><div class='hunk'>@@ -86,9 +107,6 @@</div><div class='ctx'>  * store partial blocks.  All message padding and hash value initialization must</div><div class='ctx'>  * be done outside the update function.</div><div class='ctx'>  *</div><div class='del'>- * The indented lines in the loop are instructions related to rounds processing.</div><div class='del'>- * The non-indented lines are instructions related to the message schedule.</div><div class='del'>- *</div><div class='ctx'>  * void sha256_ni_transform(uint32_t *digest, const void *data,</div><div class='ctx'> 		uint32_t numBlocks);</div><div class='ctx'>  * digest : pointer to digest</div><div class='hunk'>@@ -108,202 +126,29 @@ SYM_TYPED_FUNC_START(sha256_ni_transform)</div><div class='ctx'> 	 * Need to reorder these appropriately</div><div class='ctx'> 	 * DCBA, HGFE -&gt; ABEF, CDGH</div><div class='ctx'> 	 */</div><div class='del'>-	movdqu		0*16(DIGEST_PTR), STATE0</div><div class='del'>-	movdqu		1*16(DIGEST_PTR), STATE1</div><div class='add'>+	movdqu		0*16(DIGEST_PTR), STATE0	/* DCBA */</div><div class='add'>+	movdqu		1*16(DIGEST_PTR), STATE1	/* HGFE */</div><div class='ctx'> </div><div class='del'>-	pshufd		$0xB1, STATE0,  STATE0		/* CDAB */</div><div class='del'>-	pshufd		$0x1B, STATE1,  STATE1		/* EFGH */</div><div class='del'>-	movdqa		STATE0, MSGTMP4</div><div class='del'>-	palignr		$8, STATE1,  STATE0		/* ABEF */</div><div class='del'>-	pblendw		$0xF0, MSGTMP4, STATE1		/* CDGH */</div><div class='add'>+	movdqa		STATE0, TMP</div><div class='add'>+	punpcklqdq	STATE1, STATE0			/* FEBA */</div><div class='add'>+	punpckhqdq	TMP, STATE1			/* DCHG */</div><div class='add'>+	pshufd		$0x1B, STATE0, STATE0		/* ABEF */</div><div class='add'>+	pshufd		$0xB1, STATE1, STATE1		/* CDGH */</div><div class='ctx'> </div><div class='ctx'> 	movdqa		PSHUFFLE_BYTE_FLIP_MASK(%rip), SHUF_MASK</div><div class='del'>-	lea		K256(%rip), SHA256CONSTANTS</div><div class='add'>+	lea		K256+32*4(%rip), SHA256CONSTANTS</div><div class='ctx'> </div><div class='ctx'> .Lloop0:</div><div class='ctx'> 	/* Save hash values for addition after rounds */</div><div class='ctx'> 	movdqa		STATE0, ABEF_SAVE</div><div class='ctx'> 	movdqa		STATE1, CDGH_SAVE</div><div class='ctx'> </div><div class='del'>-	/* Rounds 0-3 */</div><div class='del'>-	movdqu		0*16(DATA_PTR), MSG</div><div class='del'>-	pshufb		SHUF_MASK, MSG</div><div class='del'>-	movdqa		MSG, MSGTMP0</div><div class='del'>-		paddd		0*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-</div><div class='del'>-	/* Rounds 4-7 */</div><div class='del'>-	movdqu		1*16(DATA_PTR), MSG</div><div class='del'>-	pshufb		SHUF_MASK, MSG</div><div class='del'>-	movdqa		MSG, MSGTMP1</div><div class='del'>-		paddd		1*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP1, MSGTMP0</div><div class='del'>-</div><div class='del'>-	/* Rounds 8-11 */</div><div class='del'>-	movdqu		2*16(DATA_PTR), MSG</div><div class='del'>-	pshufb		SHUF_MASK, MSG</div><div class='del'>-	movdqa		MSG, MSGTMP2</div><div class='del'>-		paddd		2*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP2, MSGTMP1</div><div class='del'>-</div><div class='del'>-	/* Rounds 12-15 */</div><div class='del'>-	movdqu		3*16(DATA_PTR), MSG</div><div class='del'>-	pshufb		SHUF_MASK, MSG</div><div class='del'>-	movdqa		MSG, MSGTMP3</div><div class='del'>-		paddd		3*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP3, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP2, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP0</div><div class='del'>-	sha256msg2	MSGTMP3, MSGTMP0</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP3, MSGTMP2</div><div class='del'>-</div><div class='del'>-	/* Rounds 16-19 */</div><div class='del'>-	movdqa		MSGTMP0, MSG</div><div class='del'>-		paddd		4*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP0, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP3, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP1</div><div class='del'>-	sha256msg2	MSGTMP0, MSGTMP1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP0, MSGTMP3</div><div class='del'>-</div><div class='del'>-	/* Rounds 20-23 */</div><div class='del'>-	movdqa		MSGTMP1, MSG</div><div class='del'>-		paddd		5*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP1, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP0, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP2</div><div class='del'>-	sha256msg2	MSGTMP1, MSGTMP2</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP1, MSGTMP0</div><div class='del'>-</div><div class='del'>-	/* Rounds 24-27 */</div><div class='del'>-	movdqa		MSGTMP2, MSG</div><div class='del'>-		paddd		6*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP2, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP1, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP3</div><div class='del'>-	sha256msg2	MSGTMP2, MSGTMP3</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP2, MSGTMP1</div><div class='del'>-</div><div class='del'>-	/* Rounds 28-31 */</div><div class='del'>-	movdqa		MSGTMP3, MSG</div><div class='del'>-		paddd		7*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP3, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP2, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP0</div><div class='del'>-	sha256msg2	MSGTMP3, MSGTMP0</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP3, MSGTMP2</div><div class='del'>-</div><div class='del'>-	/* Rounds 32-35 */</div><div class='del'>-	movdqa		MSGTMP0, MSG</div><div class='del'>-		paddd		8*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP0, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP3, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP1</div><div class='del'>-	sha256msg2	MSGTMP0, MSGTMP1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP0, MSGTMP3</div><div class='del'>-</div><div class='del'>-	/* Rounds 36-39 */</div><div class='del'>-	movdqa		MSGTMP1, MSG</div><div class='del'>-		paddd		9*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP1, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP0, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP2</div><div class='del'>-	sha256msg2	MSGTMP1, MSGTMP2</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP1, MSGTMP0</div><div class='del'>-</div><div class='del'>-	/* Rounds 40-43 */</div><div class='del'>-	movdqa		MSGTMP2, MSG</div><div class='del'>-		paddd		10*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP2, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP1, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP3</div><div class='del'>-	sha256msg2	MSGTMP2, MSGTMP3</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP2, MSGTMP1</div><div class='del'>-</div><div class='del'>-	/* Rounds 44-47 */</div><div class='del'>-	movdqa		MSGTMP3, MSG</div><div class='del'>-		paddd		11*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP3, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP2, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP0</div><div class='del'>-	sha256msg2	MSGTMP3, MSGTMP0</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP3, MSGTMP2</div><div class='del'>-</div><div class='del'>-	/* Rounds 48-51 */</div><div class='del'>-	movdqa		MSGTMP0, MSG</div><div class='del'>-		paddd		12*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP0, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP3, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP1</div><div class='del'>-	sha256msg2	MSGTMP0, MSGTMP1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-	sha256msg1	MSGTMP0, MSGTMP3</div><div class='del'>-</div><div class='del'>-	/* Rounds 52-55 */</div><div class='del'>-	movdqa		MSGTMP1, MSG</div><div class='del'>-		paddd		13*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP1, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP0, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP2</div><div class='del'>-	sha256msg2	MSGTMP1, MSGTMP2</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-</div><div class='del'>-	/* Rounds 56-59 */</div><div class='del'>-	movdqa		MSGTMP2, MSG</div><div class='del'>-		paddd		14*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-	movdqa		MSGTMP2, MSGTMP4</div><div class='del'>-	palignr		$4, MSGTMP1, MSGTMP4</div><div class='del'>-	paddd		MSGTMP4, MSGTMP3</div><div class='del'>-	sha256msg2	MSGTMP2, MSGTMP3</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='del'>-</div><div class='del'>-	/* Rounds 60-63 */</div><div class='del'>-	movdqa		MSGTMP3, MSG</div><div class='del'>-		paddd		15*16(SHA256CONSTANTS), MSG</div><div class='del'>-		sha256rnds2	STATE0, STATE1</div><div class='del'>-		pshufd 		$0x0E, MSG, MSG</div><div class='del'>-		sha256rnds2	STATE1, STATE0</div><div class='add'>+.irp i, 0, 16, 32, 48</div><div class='add'>+	do_4rounds	(\i + 0),  MSG0, MSG1, MSG2, MSG3</div><div class='add'>+	do_4rounds	(\i + 4),  MSG1, MSG2, MSG3, MSG0</div><div class='add'>+	do_4rounds	(\i + 8),  MSG2, MSG3, MSG0, MSG1</div><div class='add'>+	do_4rounds	(\i + 12), MSG3, MSG0, MSG1, MSG2</div><div class='add'>+.endr</div><div class='ctx'> </div><div class='ctx'> 	/* Add current hash values with previously saved */</div><div class='ctx'> 	paddd		ABEF_SAVE, STATE0</div><div class='hunk'>@@ -315,14 +160,14 @@ SYM_TYPED_FUNC_START(sha256_ni_transform)</div><div class='ctx'> 	jne		.Lloop0</div><div class='ctx'> </div><div class='ctx'> 	/* Write hash values back in the correct order */</div><div class='del'>-	pshufd		$0x1B, STATE0,  STATE0		/* FEBA */</div><div class='del'>-	pshufd		$0xB1, STATE1,  STATE1		/* DCHG */</div><div class='del'>-	movdqa		STATE0, MSGTMP4</div><div class='del'>-	pblendw		$0xF0, STATE1,  STATE0		/* DCBA */</div><div class='del'>-	palignr		$8, MSGTMP4, STATE1		/* HGFE */</div><div class='del'>-</div><div class='del'>-	movdqu		STATE0, 0*16(DIGEST_PTR)</div><div class='del'>-	movdqu		STATE1, 1*16(DIGEST_PTR)</div><div class='add'>+	movdqa		STATE0, TMP</div><div class='add'>+	punpcklqdq	STATE1, STATE0			/* GHEF */</div><div class='add'>+	punpckhqdq	TMP, STATE1			/* ABCD */</div><div class='add'>+	pshufd		$0xB1, STATE0, STATE0		/* HGFE */</div><div class='add'>+	pshufd		$0x1B, STATE1, STATE1		/* DCBA */</div><div class='add'>+</div><div class='add'>+	movdqu		STATE1, 0*16(DIGEST_PTR)</div><div class='add'>+	movdqu		STATE0, 1*16(DIGEST_PTR)</div><div class='ctx'> </div><div class='ctx'> .Ldone_hash:</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/sha512-avx2-asm.S b/arch/x86/crypto/sha512-avx2-asm.S<br/>index f08496cd6870..24973f42c43f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha512-avx2-asm.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/crypto/sha512-avx2-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha512-avx2-asm.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/crypto/sha512-avx2-asm.S</a></div><div class='hunk'>@@ -680,6 +680,7 @@ SYM_TYPED_FUNC_START(sha512_transform_rorx)</div><div class='ctx'> 	pop	%r12</div><div class='ctx'> 	pop	%rbx</div><div class='ctx'> </div><div class='add'>+	vzeroupper</div><div class='ctx'> 	RET</div><div class='ctx'> SYM_FUNC_END(sha512_transform_rorx)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/entry/Makefile b/arch/x86/entry/Makefile<br/>index c93e7f5c2a06..ce1cc1622385 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/entry/Makefile</a></div><div class='hunk'>@@ -17,7 +17,7 @@ obj-y				+= common.o</div><div class='ctx'> obj-y				+= vdso/</div><div class='ctx'> obj-y				+= vsyscall/</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_PREEMPTION)	+= thunk_$(BITS).o</div><div class='add'>+obj-$(CONFIG_PREEMPTION)	+= thunk.o</div><div class='ctx'> CFLAGS_entry_fred.o		+= -fno-stack-protector</div><div class='ctx'> CFLAGS_REMOVE_entry_fred.o	+= -pg $(CC_FLAGS_FTRACE)</div><div class='ctx'> obj-$(CONFIG_X86_FRED)		+= entry_64_fred.o entry_fred.o</div><div class='head'>diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S<br/>index c779046cc3fe..11c9b8efdc4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/entry_64_compat.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/entry_64_compat.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/entry_64_compat.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/entry/entry_64_compat.S</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/ia32_unistd.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/irqflags.h&gt;</div><div class='head'>diff --git a/arch/x86/entry/entry_fred.c b/arch/x86/entry/entry_fred.c<br/>index 89c1476fcdd9..f004a4dc74c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/entry_fred.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/entry_fred.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/entry_fred.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/entry/entry_fred.c</a></div><div class='hunk'>@@ -117,6 +117,8 @@ static idtentry_t sysvec_table[NR_SYSTEM_VECTORS] __ro_after_init = {</div><div class='ctx'> 	SYSVEC(POSTED_INTR_VECTOR,		kvm_posted_intr_ipi),</div><div class='ctx'> 	SYSVEC(POSTED_INTR_WAKEUP_VECTOR,	kvm_posted_intr_wakeup_ipi),</div><div class='ctx'> 	SYSVEC(POSTED_INTR_NESTED_VECTOR,	kvm_posted_intr_nested_ipi),</div><div class='add'>+</div><div class='add'>+	SYSVEC(POSTED_MSI_NOTIFICATION_VECTOR,	posted_msi_notification),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool fred_setup_done __initdata;</div><div class='head'>diff --git a/arch/x86/entry/syscalls/syscall_64.tbl b/arch/x86/entry/syscalls/syscall_64.tbl<br/>index 7e8d46f4147f..cc78226ffc35 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/syscalls/syscall_64.tbl?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/syscalls/syscall_64.tbl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/syscalls/syscall_64.tbl?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/entry/syscalls/syscall_64.tbl</a></div><div class='hunk'>@@ -374,7 +374,7 @@</div><div class='ctx'> 450	common	set_mempolicy_home_node	sys_set_mempolicy_home_node</div><div class='ctx'> 451	common	cachestat		sys_cachestat</div><div class='ctx'> 452	common	fchmodat2		sys_fchmodat2</div><div class='del'>-453	64	map_shadow_stack	sys_map_shadow_stack</div><div class='add'>+453	common	map_shadow_stack	sys_map_shadow_stack</div><div class='ctx'> 454	common	futex_wake		sys_futex_wake</div><div class='ctx'> 455	common	futex_wait		sys_futex_wait</div><div class='ctx'> 456	common	futex_requeue		sys_futex_requeue</div><div class='head'>diff --git a/arch/x86/entry/thunk_64.S b/arch/x86/entry/thunk.S<br/>index 119ebdc3d362..119ebdc3d362 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/thunk_64.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/thunk_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/thunk.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/entry/thunk.S</a></div><div class='head'>diff --git a/arch/x86/entry/thunk_32.S b/arch/x86/entry/thunk_32.S<br/>deleted file mode 100644<br/>index da37f42f4549..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/thunk_32.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/thunk_32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * Trampoline to trace irqs off. (otherwise CALLER_ADDR1 might crash)</div><div class='del'>- * Copyright 2008 by Steven Rostedt, Red Hat, Inc</div><div class='del'>- *  (inspired by Andi Kleen's thunk_64.S)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/asm.h&gt;</div><div class='del'>-</div><div class='del'>-#include "calling.h"</div><div class='del'>-</div><div class='del'>-THUNK preempt_schedule_thunk, preempt_schedule</div><div class='del'>-THUNK preempt_schedule_notrace_thunk, preempt_schedule_notrace</div><div class='del'>-EXPORT_SYMBOL(preempt_schedule_thunk)</div><div class='del'>-EXPORT_SYMBOL(preempt_schedule_notrace_thunk)</div><div class='del'>-</div><div class='head'>diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c<br/>index a3c0df11d0e6..2fb7d53cf333 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/vsyscall/vsyscall_64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/entry/vsyscall/vsyscall_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/vsyscall/vsyscall_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/entry/vsyscall/vsyscall_64.c</a></div><div class='hunk'>@@ -98,11 +98,6 @@ static int addr_to_vsyscall_nr(unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> static bool write_ok_or_segv(unsigned long ptr, size_t size)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * XXX: if access_ok, get_user, and put_user handled</div><div class='del'>-	 * sig_on_uaccess_err, this could go away.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='ctx'> 	if (!access_ok((void __user *)ptr, size)) {</div><div class='ctx'> 		struct thread_struct *thread = &amp;current-&gt;thread;</div><div class='ctx'> </div><div class='hunk'>@@ -120,10 +115,8 @@ static bool write_ok_or_segv(unsigned long ptr, size_t size)</div><div class='ctx'> bool emulate_vsyscall(unsigned long error_code,</div><div class='ctx'> 		      struct pt_regs *regs, unsigned long address)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *tsk;</div><div class='ctx'> 	unsigned long caller;</div><div class='ctx'> 	int vsyscall_nr, syscall_nr, tmp;</div><div class='del'>-	int prev_sig_on_uaccess_err;</div><div class='ctx'> 	long ret;</div><div class='ctx'> 	unsigned long orig_dx;</div><div class='ctx'> </div><div class='hunk'>@@ -172,8 +165,6 @@ bool emulate_vsyscall(unsigned long error_code,</div><div class='ctx'> 		goto sigsegv;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tsk = current;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check for access_ok violations and find the syscall nr.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -234,12 +225,8 @@ bool emulate_vsyscall(unsigned long error_code,</div><div class='ctx'> 		goto do_ret;  /* skip requested */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * With a real vsyscall, page faults cause SIGSEGV.  We want to</div><div class='del'>-	 * preserve that behavior to make writing exploits harder.</div><div class='add'>+	 * With a real vsyscall, page faults cause SIGSEGV.</div><div class='ctx'> 	 */</div><div class='del'>-	prev_sig_on_uaccess_err = current-&gt;thread.sig_on_uaccess_err;</div><div class='del'>-	current-&gt;thread.sig_on_uaccess_err = 1;</div><div class='del'>-</div><div class='ctx'> 	ret = -EFAULT;</div><div class='ctx'> 	switch (vsyscall_nr) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -262,23 +249,12 @@ bool emulate_vsyscall(unsigned long error_code,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	current-&gt;thread.sig_on_uaccess_err = prev_sig_on_uaccess_err;</div><div class='del'>-</div><div class='ctx'> check_fault:</div><div class='ctx'> 	if (ret == -EFAULT) {</div><div class='ctx'> 		/* Bad news -- userspace fed a bad pointer to a vsyscall. */</div><div class='ctx'> 		warn_bad_vsyscall(KERN_INFO, regs,</div><div class='ctx'> 				  "vsyscall fault (exploit attempt?)");</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If we failed to generate a signal for any reason,</div><div class='del'>-		 * generate one here.  (This should be impossible.)</div><div class='del'>-		 */</div><div class='del'>-		if (WARN_ON_ONCE(!sigismember(&amp;tsk-&gt;pending.signal, SIGBUS) &amp;&amp;</div><div class='del'>-				 !sigismember(&amp;tsk-&gt;pending.signal, SIGSEGV)))</div><div class='del'>-			goto sigsegv;</div><div class='del'>-</div><div class='del'>-		return true;  /* Don't emulate the ret. */</div><div class='add'>+		goto sigsegv;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;ax = ret;</div><div class='head'>diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c<br/>index 985ef3b47919..1fc4ce44e743 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/amd/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/amd/core.c</a></div><div class='hunk'>@@ -647,7 +647,7 @@ static void amd_pmu_cpu_dead(int cpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void amd_pmu_set_global_ctl(u64 ctl)</div><div class='add'>+static __always_inline void amd_pmu_set_global_ctl(u64 ctl)</div><div class='ctx'> {</div><div class='ctx'> 	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, ctl);</div><div class='ctx'> }</div><div class='hunk'>@@ -907,6 +907,37 @@ static int amd_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 	return amd_pmu_adjust_nmi_window(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * AMD-specific callback invoked through perf_snapshot_branch_stack static</div><div class='add'>+ * call, defined in include/linux/perf_event.h. See its definition for API</div><div class='add'>+ * details. It's up to caller to provide enough space in *entries* to fit all</div><div class='add'>+ * LBR records, otherwise returned result will be truncated to *cnt* entries.</div><div class='add'>+ */</div><div class='add'>+static int amd_pmu_v2_snapshot_branch_stack(struct perf_branch_entry *entries, unsigned int cnt)</div><div class='add'>+{</div><div class='add'>+	struct cpu_hw_events *cpuc;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The sequence of steps to freeze LBR should be completely inlined</div><div class='add'>+	 * and contain no branches to minimize contamination of LBR snapshot</div><div class='add'>+	 */</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	amd_pmu_core_disable_all();</div><div class='add'>+	__amd_pmu_lbr_disable();</div><div class='add'>+</div><div class='add'>+	cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='add'>+</div><div class='add'>+	amd_pmu_lbr_read();</div><div class='add'>+	cnt = min(cnt, x86_pmu.lbr_nr);</div><div class='add'>+	memcpy(entries, cpuc-&gt;lbr_entries, sizeof(struct perf_branch_entry) * cnt);</div><div class='add'>+</div><div class='add'>+	amd_pmu_v2_enable_all(0);</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amd_pmu_v2_handle_irq(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='hunk'>@@ -1443,6 +1474,10 @@ static int __init amd_core_pmu_init(void)</div><div class='ctx'> 		static_call_update(amd_pmu_branch_reset, amd_pmu_lbr_reset);</div><div class='ctx'> 		static_call_update(amd_pmu_branch_add, amd_pmu_lbr_add);</div><div class='ctx'> 		static_call_update(amd_pmu_branch_del, amd_pmu_lbr_del);</div><div class='add'>+</div><div class='add'>+		/* Only support branch_stack snapshot on perfmon v2 */</div><div class='add'>+		if (x86_pmu.handle_irq == amd_pmu_v2_handle_irq)</div><div class='add'>+			static_call_update(perf_snapshot_branch_stack, amd_pmu_v2_snapshot_branch_stack);</div><div class='ctx'> 	} else if (!amd_brs_init()) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * BRS requires special event constraints and flushing on ctxsw.</div><div class='head'>diff --git a/arch/x86/events/amd/lbr.c b/arch/x86/events/amd/lbr.c<br/>index 5149830c7c4f..19c7b76e21bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/lbr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/amd/lbr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/lbr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/amd/lbr.c</a></div><div class='hunk'>@@ -310,10 +310,6 @@ int amd_pmu_lbr_hw_config(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	/* LBR is not recommended in counting mode */</div><div class='del'>-	if (!is_sampling_event(event))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	ret = amd_pmu_lbr_setup_filter(event);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		event-&gt;attach_state |= PERF_ATTACH_SCHED_CB;</div><div class='hunk'>@@ -414,18 +410,11 @@ void amd_pmu_lbr_enable_all(void)</div><div class='ctx'> void amd_pmu_lbr_disable_all(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='del'>-	u64 dbg_ctl, dbg_extn_cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpuc-&gt;lbr_users || !x86_pmu.lbr_nr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);</div><div class='del'>-	wrmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg &amp; ~DBG_EXTN_CFG_LBRV2EN);</div><div class='del'>-</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_AMD_LBR_PMC_FREEZE)) {</div><div class='del'>-		rdmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl);</div><div class='del'>-		wrmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl &amp; ~DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='del'>-	}</div><div class='add'>+	__amd_pmu_lbr_disable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __init int amd_pmu_lbr_init(void)</div><div class='head'>diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c<br/>index 326c8cd5aa2d..54eb142810fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/cstate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/cstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/cstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/intel/cstate.c</a></div><div class='hunk'>@@ -696,78 +696,78 @@ static const struct cstate_model srf_cstates __initconst = {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id intel_cstates_match[] __initconst = {</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,		&amp;nhm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,		&amp;nhm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,		&amp;nhm_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,		&amp;nhm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,		&amp;nhm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,		&amp;nhm_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&amp;snb_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,		&amp;snb_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,		&amp;snb_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,		&amp;hswult_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,	&amp;slm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D,	&amp;slm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,	&amp;slm_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,		&amp;snb_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,		&amp;snb_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,		&amp;snb_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,		&amp;hswult_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,		&amp;hswult_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&amp;hswult_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&amp;hswult_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L,	&amp;cnl_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&amp;knl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,	&amp;knl_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT,	&amp;glm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D,	&amp;glm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS,	&amp;glm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&amp;glm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,	&amp;glm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	&amp;glm_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,	&amp;srf_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT,	&amp;grr_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		&amp;icl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE,		&amp;icl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&amp;icx_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&amp;icx_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&amp;icx_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&amp;icx_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,	&amp;icx_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D,	&amp;icx_cstates),</div><div class='del'>-</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&amp;icl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&amp;icl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&amp;icl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE,		&amp;adl_cstates),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,	&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_NEHALEM,		&amp;nhm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_NEHALEM_EP,		&amp;nhm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_NEHALEM_EX,		&amp;nhm_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_WESTMERE,		&amp;nhm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_WESTMERE_EP,	&amp;nhm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_WESTMERE_EX,	&amp;nhm_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_SANDYBRIDGE,	&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SANDYBRIDGE_X,	&amp;snb_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_IVYBRIDGE,		&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_IVYBRIDGE_X,	&amp;snb_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL,		&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_X,		&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_G,		&amp;snb_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_L,		&amp;hswult_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_SILVERMONT,	&amp;slm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D,	&amp;slm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_AIRMONT,	&amp;slm_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL,		&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_D,	&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_G,	&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_X,	&amp;snb_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE_L,		&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE,		&amp;snb_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE_X,		&amp;snb_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_KABYLAKE_L,		&amp;hswult_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_KABYLAKE,		&amp;hswult_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_COMETLAKE_L,	&amp;hswult_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_COMETLAKE,		&amp;hswult_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_CANNONLAKE_L,	&amp;cnl_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_XEON_PHI_KNL,	&amp;knl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_XEON_PHI_KNM,	&amp;knl_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GOLDMONT,	&amp;glm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D,	&amp;glm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS,	&amp;glm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_TREMONT_D,	&amp;glm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_TREMONT,	&amp;glm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_TREMONT_L,	&amp;glm_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,	&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X,	&amp;srf_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,	&amp;grr_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_L,		&amp;icl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE,		&amp;icl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_X,		&amp;icx_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_D,		&amp;icx_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,	&amp;icx_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,	&amp;icx_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,	&amp;icx_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_GRANITERAPIDS_D,	&amp;icx_cstates),</div><div class='add'>+</div><div class='add'>+	X86_MATCH_VFM(INTEL_TIGERLAKE_L,	&amp;icl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_TIGERLAKE,		&amp;icl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ROCKETLAKE,		&amp;icl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE,		&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE_L,	&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE,		&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,	&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_S,	&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_METEORLAKE,		&amp;adl_cstates),</div><div class='add'>+	X86_MATCH_VFM(INTEL_METEORLAKE_L,	&amp;adl_cstates),</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);</div><div class='head'>diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c<br/>index 4367aa77cb8d..dc641b50814e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/lbr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/lbr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/lbr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/intel/lbr.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1457,7 +1458,7 @@ void __init intel_pmu_lbr_init_atom(void)</div><div class='ctx'> 	 * to have an operational LBR which can freeze</div><div class='ctx'> 	 * on PMU interrupt</div><div class='ctx'> 	 */</div><div class='del'>-	if (boot_cpu_data.x86_model == 28</div><div class='add'>+	if (boot_cpu_data.x86_vfm == INTEL_ATOM_BONNELL</div><div class='ctx'> 	    &amp;&amp; boot_cpu_data.x86_stepping &lt; 10) {</div><div class='ctx'> 		pr_cont("LBR disabled due to erratum");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c<br/>index 8e2a12235e62..14db6d9d318b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/pt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/pt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/pt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/intel/pt.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/intel_pt.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> #include "pt.h"</div><div class='hunk'>@@ -211,11 +211,11 @@ static int __init pt_pmu_hw_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* model-specific quirks */</div><div class='del'>-	switch (boot_cpu_data.x86_model) {</div><div class='del'>-	case INTEL_FAM6_BROADWELL:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_D:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_G:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_X:</div><div class='add'>+	switch (boot_cpu_data.x86_vfm) {</div><div class='add'>+	case INTEL_BROADWELL:</div><div class='add'>+	case INTEL_BROADWELL_D:</div><div class='add'>+	case INTEL_BROADWELL_G:</div><div class='add'>+	case INTEL_BROADWELL_X:</div><div class='ctx'> 		/* not setting BRANCH_EN will #GP, erratum BDM106 */</div><div class='ctx'> 		pt_pmu.branch_en_always_on = true;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c<br/>index 258e2cdf28fa..419c517b8594 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/uncore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/intel/uncore.c</a></div><div class='hunk'>@@ -1829,56 +1829,56 @@ static const struct intel_uncore_init_fun generic_uncore_init __initconst = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id intel_uncore_match[] __initconst = {</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,		&amp;nhm_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,		&amp;nhm_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,		&amp;nhm_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,		&amp;nhm_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&amp;snb_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,		&amp;ivb_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL,		&amp;hsw_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,		&amp;hsw_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,		&amp;hsw_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,		&amp;bdw_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,		&amp;bdw_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&amp;snbep_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,		&amp;nhmex_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,		&amp;nhmex_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,		&amp;ivbep_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,		&amp;hswep_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,		&amp;bdx_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,		&amp;bdx_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&amp;knl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,	&amp;knl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,		&amp;skl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&amp;skl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,		&amp;skx_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,		&amp;skl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,		&amp;skl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&amp;skl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&amp;skl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		&amp;icl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI,	&amp;icl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE,		&amp;icl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&amp;icx_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&amp;icx_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&amp;tgl_l_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&amp;tgl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&amp;rkl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&amp;adl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&amp;adl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&amp;adl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&amp;adl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&amp;adl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE,		&amp;mtl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,	&amp;mtl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&amp;spr_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&amp;spr_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,	&amp;gnr_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D,	&amp;gnr_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&amp;snr_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&amp;adl_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,	&amp;gnr_uncore_init),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT,	&amp;gnr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_NEHALEM_EP,		&amp;nhm_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_NEHALEM,		&amp;nhm_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_WESTMERE,		&amp;nhm_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_WESTMERE_EP,	&amp;nhm_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SANDYBRIDGE,	&amp;snb_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_IVYBRIDGE,		&amp;ivb_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL,		&amp;hsw_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_L,		&amp;hsw_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_G,		&amp;hsw_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL,		&amp;bdw_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_G,	&amp;bdw_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SANDYBRIDGE_X,	&amp;snbep_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_NEHALEM_EX,		&amp;nhmex_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_WESTMERE_EX,	&amp;nhmex_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_IVYBRIDGE_X,	&amp;ivbep_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_X,		&amp;hswep_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_X,	&amp;bdx_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_D,	&amp;bdx_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_XEON_PHI_KNL,	&amp;knl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_XEON_PHI_KNM,	&amp;knl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE,		&amp;skl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE_L,		&amp;skl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE_X,		&amp;skx_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_KABYLAKE_L,		&amp;skl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_KABYLAKE,		&amp;skl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_COMETLAKE_L,	&amp;skl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_COMETLAKE,		&amp;skl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_L,		&amp;icl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_NNPI,	&amp;icl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE,		&amp;icl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_D,		&amp;icx_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_X,		&amp;icx_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_TIGERLAKE_L,	&amp;tgl_l_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_TIGERLAKE,		&amp;tgl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ROCKETLAKE,		&amp;rkl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE,		&amp;adl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE_L,	&amp;adl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE,		&amp;adl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,	&amp;adl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_S,	&amp;adl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_METEORLAKE,		&amp;mtl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_METEORLAKE_L,	&amp;mtl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,	&amp;spr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,	&amp;spr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,	&amp;gnr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_GRANITERAPIDS_D,	&amp;gnr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_TREMONT_D,	&amp;snr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,	&amp;adl_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X,	&amp;gnr_uncore_init),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,	&amp;gnr_uncore_init),</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);</div><div class='head'>diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c<br/>index 92da8aaa5966..466833478e81 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_nhmex.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/uncore_nhmex.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_nhmex.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/intel/uncore_nhmex.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Nehalem-EX/Westmere-EX uncore support */</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> </div><div class='ctx'> /* NHM-EX event control */</div><div class='hunk'>@@ -1217,7 +1218,7 @@ static struct intel_uncore_type *nhmex_msr_uncores[] = {</div><div class='ctx'> </div><div class='ctx'> void nhmex_uncore_cpu_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (boot_cpu_data.x86_model == 46)</div><div class='add'>+	if (boot_cpu_data.x86_vfm == INTEL_NEHALEM_EX)</div><div class='ctx'> 		uncore_nhmex = true;</div><div class='ctx'> 	else</div><div class='ctx'> 		nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;</div><div class='head'>diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c<br/>index 2eaf0f339849..74b8b21e8990 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_snbep.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/intel/uncore_snbep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_snbep.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/intel/uncore_snbep.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* SandyBridge-EP/IvyTown uncore support */</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> #include "uncore_discovery.h"</div><div class='ctx'> </div><div class='hunk'>@@ -3285,7 +3286,7 @@ void bdx_uncore_cpu_init(void)</div><div class='ctx'> 	uncore_msr_uncores = bdx_msr_uncores;</div><div class='ctx'> </div><div class='ctx'> 	/* Detect systems with no SBOXes */</div><div class='del'>-	if ((boot_cpu_data.x86_model == 86) || hswep_has_limit_sbox(BDX_PCU_DID))</div><div class='add'>+	if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_D || hswep_has_limit_sbox(BDX_PCU_DID))</div><div class='ctx'> 		uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;</div><div class='ctx'> </div><div class='ctx'> 	hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;</div><div class='hunk'>@@ -5394,7 +5395,7 @@ static int icx_iio_get_topology(struct intel_uncore_type *type)</div><div class='ctx'> static void icx_iio_set_mapping(struct intel_uncore_type *type)</div><div class='ctx'> {</div><div class='ctx'> 	/* Detect ICX-D system. This case is not supported */</div><div class='del'>-	if (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_D) {</div><div class='add'>+	if (boot_cpu_data.x86_vfm == INTEL_ICELAKE_D) {</div><div class='ctx'> 		pmu_clear_mapping_attr(type-&gt;attr_update, &amp;icx_iio_mapping_group);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c<br/>index 9e237b30f017..45b1866ff051 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/msr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/msr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/msr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/msr.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/nospec.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include "probe.h"</div><div class='ctx'> </div><div class='ctx'> enum perf_msr_id {</div><div class='hunk'>@@ -43,75 +43,75 @@ static bool test_intel(int idx, void *data)</div><div class='ctx'> 	    boot_cpu_data.x86 != 6)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	switch (boot_cpu_data.x86_model) {</div><div class='del'>-	case INTEL_FAM6_NEHALEM:</div><div class='del'>-	case INTEL_FAM6_NEHALEM_G:</div><div class='del'>-	case INTEL_FAM6_NEHALEM_EP:</div><div class='del'>-	case INTEL_FAM6_NEHALEM_EX:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_WESTMERE:</div><div class='del'>-	case INTEL_FAM6_WESTMERE_EP:</div><div class='del'>-	case INTEL_FAM6_WESTMERE_EX:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_SANDYBRIDGE:</div><div class='del'>-	case INTEL_FAM6_SANDYBRIDGE_X:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_IVYBRIDGE:</div><div class='del'>-	case INTEL_FAM6_IVYBRIDGE_X:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_HASWELL:</div><div class='del'>-	case INTEL_FAM6_HASWELL_X:</div><div class='del'>-	case INTEL_FAM6_HASWELL_L:</div><div class='del'>-	case INTEL_FAM6_HASWELL_G:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_BROADWELL:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_D:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_G:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_X:</div><div class='del'>-	case INTEL_FAM6_SAPPHIRERAPIDS_X:</div><div class='del'>-	case INTEL_FAM6_EMERALDRAPIDS_X:</div><div class='del'>-	case INTEL_FAM6_GRANITERAPIDS_X:</div><div class='del'>-	case INTEL_FAM6_GRANITERAPIDS_D:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_ATOM_SILVERMONT:</div><div class='del'>-	case INTEL_FAM6_ATOM_SILVERMONT_D:</div><div class='del'>-	case INTEL_FAM6_ATOM_AIRMONT:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT:</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT_D:</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT_PLUS:</div><div class='del'>-	case INTEL_FAM6_ATOM_TREMONT_D:</div><div class='del'>-	case INTEL_FAM6_ATOM_TREMONT:</div><div class='del'>-	case INTEL_FAM6_ATOM_TREMONT_L:</div><div class='del'>-</div><div class='del'>-	case INTEL_FAM6_XEON_PHI_KNL:</div><div class='del'>-	case INTEL_FAM6_XEON_PHI_KNM:</div><div class='add'>+	switch (boot_cpu_data.x86_vfm) {</div><div class='add'>+	case INTEL_NEHALEM:</div><div class='add'>+	case INTEL_NEHALEM_G:</div><div class='add'>+	case INTEL_NEHALEM_EP:</div><div class='add'>+	case INTEL_NEHALEM_EX:</div><div class='add'>+</div><div class='add'>+	case INTEL_WESTMERE:</div><div class='add'>+	case INTEL_WESTMERE_EP:</div><div class='add'>+	case INTEL_WESTMERE_EX:</div><div class='add'>+</div><div class='add'>+	case INTEL_SANDYBRIDGE:</div><div class='add'>+	case INTEL_SANDYBRIDGE_X:</div><div class='add'>+</div><div class='add'>+	case INTEL_IVYBRIDGE:</div><div class='add'>+	case INTEL_IVYBRIDGE_X:</div><div class='add'>+</div><div class='add'>+	case INTEL_HASWELL:</div><div class='add'>+	case INTEL_HASWELL_X:</div><div class='add'>+	case INTEL_HASWELL_L:</div><div class='add'>+	case INTEL_HASWELL_G:</div><div class='add'>+</div><div class='add'>+	case INTEL_BROADWELL:</div><div class='add'>+	case INTEL_BROADWELL_D:</div><div class='add'>+	case INTEL_BROADWELL_G:</div><div class='add'>+	case INTEL_BROADWELL_X:</div><div class='add'>+	case INTEL_SAPPHIRERAPIDS_X:</div><div class='add'>+	case INTEL_EMERALDRAPIDS_X:</div><div class='add'>+	case INTEL_GRANITERAPIDS_X:</div><div class='add'>+	case INTEL_GRANITERAPIDS_D:</div><div class='add'>+</div><div class='add'>+	case INTEL_ATOM_SILVERMONT:</div><div class='add'>+	case INTEL_ATOM_SILVERMONT_D:</div><div class='add'>+	case INTEL_ATOM_AIRMONT:</div><div class='add'>+</div><div class='add'>+	case INTEL_ATOM_GOLDMONT:</div><div class='add'>+	case INTEL_ATOM_GOLDMONT_D:</div><div class='add'>+	case INTEL_ATOM_GOLDMONT_PLUS:</div><div class='add'>+	case INTEL_ATOM_TREMONT_D:</div><div class='add'>+	case INTEL_ATOM_TREMONT:</div><div class='add'>+	case INTEL_ATOM_TREMONT_L:</div><div class='add'>+</div><div class='add'>+	case INTEL_XEON_PHI_KNL:</div><div class='add'>+	case INTEL_XEON_PHI_KNM:</div><div class='ctx'> 		if (idx == PERF_MSR_SMI)</div><div class='ctx'> 			return true;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case INTEL_FAM6_SKYLAKE_L:</div><div class='del'>-	case INTEL_FAM6_SKYLAKE:</div><div class='del'>-	case INTEL_FAM6_SKYLAKE_X:</div><div class='del'>-	case INTEL_FAM6_KABYLAKE_L:</div><div class='del'>-	case INTEL_FAM6_KABYLAKE:</div><div class='del'>-	case INTEL_FAM6_COMETLAKE_L:</div><div class='del'>-	case INTEL_FAM6_COMETLAKE:</div><div class='del'>-	case INTEL_FAM6_ICELAKE_L:</div><div class='del'>-	case INTEL_FAM6_ICELAKE:</div><div class='del'>-	case INTEL_FAM6_ICELAKE_X:</div><div class='del'>-	case INTEL_FAM6_ICELAKE_D:</div><div class='del'>-	case INTEL_FAM6_TIGERLAKE_L:</div><div class='del'>-	case INTEL_FAM6_TIGERLAKE:</div><div class='del'>-	case INTEL_FAM6_ROCKETLAKE:</div><div class='del'>-	case INTEL_FAM6_ALDERLAKE:</div><div class='del'>-	case INTEL_FAM6_ALDERLAKE_L:</div><div class='del'>-	case INTEL_FAM6_ATOM_GRACEMONT:</div><div class='del'>-	case INTEL_FAM6_RAPTORLAKE:</div><div class='del'>-	case INTEL_FAM6_RAPTORLAKE_P:</div><div class='del'>-	case INTEL_FAM6_RAPTORLAKE_S:</div><div class='del'>-	case INTEL_FAM6_METEORLAKE:</div><div class='del'>-	case INTEL_FAM6_METEORLAKE_L:</div><div class='add'>+	case INTEL_SKYLAKE_L:</div><div class='add'>+	case INTEL_SKYLAKE:</div><div class='add'>+	case INTEL_SKYLAKE_X:</div><div class='add'>+	case INTEL_KABYLAKE_L:</div><div class='add'>+	case INTEL_KABYLAKE:</div><div class='add'>+	case INTEL_COMETLAKE_L:</div><div class='add'>+	case INTEL_COMETLAKE:</div><div class='add'>+	case INTEL_ICELAKE_L:</div><div class='add'>+	case INTEL_ICELAKE:</div><div class='add'>+	case INTEL_ICELAKE_X:</div><div class='add'>+	case INTEL_ICELAKE_D:</div><div class='add'>+	case INTEL_TIGERLAKE_L:</div><div class='add'>+	case INTEL_TIGERLAKE:</div><div class='add'>+	case INTEL_ROCKETLAKE:</div><div class='add'>+	case INTEL_ALDERLAKE:</div><div class='add'>+	case INTEL_ALDERLAKE_L:</div><div class='add'>+	case INTEL_ATOM_GRACEMONT:</div><div class='add'>+	case INTEL_RAPTORLAKE:</div><div class='add'>+	case INTEL_RAPTORLAKE_P:</div><div class='add'>+	case INTEL_RAPTORLAKE_S:</div><div class='add'>+	case INTEL_METEORLAKE:</div><div class='add'>+	case INTEL_METEORLAKE_L:</div><div class='ctx'> 		if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)</div><div class='ctx'> 			return true;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h<br/>index fb56518356ec..72b022a1e16c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/perf_event.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/perf_event.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/perf_event.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/perf_event.h</a></div><div class='hunk'>@@ -1329,6 +1329,19 @@ void amd_pmu_lbr_enable_all(void);</div><div class='ctx'> void amd_pmu_lbr_disable_all(void);</div><div class='ctx'> int amd_pmu_lbr_hw_config(struct perf_event *event);</div><div class='ctx'> </div><div class='add'>+static __always_inline void __amd_pmu_lbr_disable(void)</div><div class='add'>+{</div><div class='add'>+	u64 dbg_ctl, dbg_extn_cfg;</div><div class='add'>+</div><div class='add'>+	rdmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);</div><div class='add'>+	wrmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg &amp; ~DBG_EXTN_CFG_LBRV2EN);</div><div class='add'>+</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_AMD_LBR_PMC_FREEZE)) {</div><div class='add'>+		rdmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl);</div><div class='add'>+		wrmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl &amp; ~DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PERF_EVENTS_AMD_BRS</div><div class='ctx'> </div><div class='ctx'> #define AMD_FAM19H_BRS_EVENT 0xc4 /* RETIRED_TAKEN_BRANCH_INSTRUCTIONS */</div><div class='head'>diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c<br/>index fb2b1961e5a3..ca5f687fa420 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/rapl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/events/rapl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/rapl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/events/rapl.c</a></div><div class='hunk'>@@ -675,10 +675,8 @@ static const struct attribute_group *rapl_attr_update[] = {</div><div class='ctx'> static int __init init_rapl_pmus(void)</div><div class='ctx'> {</div><div class='ctx'> 	int maxdie = topology_max_packages() * topology_max_dies_per_package();</div><div class='del'>-	size_t size;</div><div class='ctx'> </div><div class='del'>-	size = sizeof(*rapl_pmus) + maxdie * sizeof(struct rapl_pmu *);</div><div class='del'>-	rapl_pmus = kzalloc(size, GFP_KERNEL);</div><div class='add'>+	rapl_pmus = kzalloc(struct_size(rapl_pmus, pmus, maxdie), GFP_KERNEL);</div><div class='ctx'> 	if (!rapl_pmus)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -808,6 +806,9 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {</div><div class='ctx'> 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&amp;model_skl),</div><div class='ctx'> 	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE,		&amp;model_skl),</div><div class='ctx'> 	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,	&amp;model_skl),</div><div class='add'>+	X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE_H,		&amp;model_skl),</div><div class='add'>+	X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE,		&amp;model_skl),</div><div class='add'>+	X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M,		&amp;model_skl),</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(x86cpu, rapl_model_match);</div><div class='head'>diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c<br/>index 5c7de79423b8..04775346369c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_vtl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/hyperv/hv_vtl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_vtl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/hyperv/hv_vtl.c</a></div><div class='hunk'>@@ -34,7 +34,6 @@ void __init hv_vtl_init_platform(void)</div><div class='ctx'> 	/* Avoid searching for BIOS MP tables */</div><div class='ctx'> 	x86_init.mpparse.find_mptable = x86_init_noop;</div><div class='ctx'> 	x86_init.mpparse.early_parse_smp_cfg = x86_init_noop;</div><div class='del'>-	x86_init.mpparse.parse_smp_cfg = x86_init_noop;</div><div class='ctx'> </div><div class='ctx'> 	x86_platform.get_wallclock = get_rtc_noop;</div><div class='ctx'> 	x86_platform.set_wallclock = set_rtc_noop;</div><div class='head'>diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h<br/>index f896eed4516c..5af926c050f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/acpi.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/acpi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/acpi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/acpi.h</a></div><div class='hunk'>@@ -56,6 +56,8 @@ static inline void disable_acpi(void)</div><div class='ctx'> </div><div class='ctx'> extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);</div><div class='ctx'> </div><div class='add'>+extern int acpi_blacklisted(void);</div><div class='add'>+</div><div class='ctx'> static inline void acpi_noirq_set(void) { acpi_noirq = 1; }</div><div class='ctx'> static inline void acpi_disable_pci(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h<br/>index 67b68d0d17d1..ba99ef75f56c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/alternative.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/alternative.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/alternative.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/alternative.h</a></div><div class='hunk'>@@ -286,20 +286,6 @@ static inline int alternatives_text_reserved(void *start, void *end)</div><div class='ctx'> 	asm_inline volatile (ALTERNATIVE(oldinstr, newinstr, ft_flags)	\</div><div class='ctx'> 		: : "i" (0), ## input)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This is similar to alternative_input. But it has two features and</div><div class='del'>- * respective instructions.</div><div class='del'>- *</div><div class='del'>- * If CPU has feature2, newinstr2 is used.</div><div class='del'>- * Otherwise, if CPU has feature1, newinstr1 is used.</div><div class='del'>- * Otherwise, oldinstr is used.</div><div class='del'>- */</div><div class='del'>-#define alternative_input_2(oldinstr, newinstr1, ft_flags1, newinstr2,	     \</div><div class='del'>-			   ft_flags2, input...)				     \</div><div class='del'>-	asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1,     \</div><div class='del'>-		newinstr2, ft_flags2)					     \</div><div class='del'>-		: : "i" (0), ## input)</div><div class='del'>-</div><div class='ctx'> /* Like alternative_input, but with a single output argument */</div><div class='ctx'> #define alternative_io(oldinstr, newinstr, ft_flags, output, input...)	\</div><div class='ctx'> 	asm_inline volatile (ALTERNATIVE(oldinstr, newinstr, ft_flags)	\</div><div class='hunk'>@@ -307,7 +293,7 @@ static inline int alternatives_text_reserved(void *start, void *end)</div><div class='ctx'> </div><div class='ctx'> /* Like alternative_io, but for replacing a direct call with another one. */</div><div class='ctx'> #define alternative_call(oldfunc, newfunc, ft_flags, output, input...)	\</div><div class='del'>-	asm_inline volatile (ALTERNATIVE("call %P[old]", "call %P[new]", ft_flags) \</div><div class='add'>+	asm_inline volatile (ALTERNATIVE("call %c[old]", "call %c[new]", ft_flags) \</div><div class='ctx'> 		: output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -316,12 +302,12 @@ static inline int alternatives_text_reserved(void *start, void *end)</div><div class='ctx'>  * Otherwise, if CPU has feature1, function1 is used.</div><div class='ctx'>  * Otherwise, old function is used.</div><div class='ctx'>  */</div><div class='del'>-#define alternative_call_2(oldfunc, newfunc1, ft_flags1, newfunc2, ft_flags2,   \</div><div class='del'>-			   output, input...)				      \</div><div class='del'>-	asm_inline volatile (ALTERNATIVE_2("call %P[old]", "call %P[new1]", ft_flags1,\</div><div class='del'>-		"call %P[new2]", ft_flags2)				      \</div><div class='del'>-		: output, ASM_CALL_CONSTRAINT				      \</div><div class='del'>-		: [old] "i" (oldfunc), [new1] "i" (newfunc1),		      \</div><div class='add'>+#define alternative_call_2(oldfunc, newfunc1, ft_flags1, newfunc2, ft_flags2, \</div><div class='add'>+			   output, input...)				\</div><div class='add'>+	asm_inline volatile (ALTERNATIVE_2("call %c[old]", "call %c[new1]", ft_flags1, \</div><div class='add'>+		"call %c[new2]", ft_flags2)				\</div><div class='add'>+		: output, ASM_CALL_CONSTRAINT				\</div><div class='add'>+		: [old] "i" (oldfunc), [new1] "i" (newfunc1),		\</div><div class='ctx'> 		  [new2] "i" (newfunc2), ## input)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h<br/>index e6ab0cf15ed5..9327eb00e96d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/apic.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/apic.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/apic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/apic.h</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/posted_intr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ARCH_APICTIMER_STOPS_ON_C3	1</div><div class='ctx'> </div><div class='hunk'>@@ -92,7 +93,7 @@ static inline void native_apic_mem_write(u32 reg, u32 v)</div><div class='ctx'> {</div><div class='ctx'> 	volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);</div><div class='ctx'> </div><div class='del'>-	alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP,</div><div class='add'>+	alternative_io("movl %0, %1", "xchgl %0, %1", X86_BUG_11AP,</div><div class='ctx'> 		       ASM_OUTPUT2("=r" (v), "=m" (*addr)),</div><div class='ctx'> 		       ASM_OUTPUT2("0" (v), "m" (*addr)));</div><div class='ctx'> }</div><div class='hunk'>@@ -500,6 +501,11 @@ static inline bool lapic_vector_set_in_irr(unsigned int vector)</div><div class='ctx'> 	return !!(irr &amp; (1U &lt;&lt; (vector % 32)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_vector_pending(unsigned int vector)</div><div class='add'>+{</div><div class='add'>+	return lapic_vector_set_in_irr(vector) || pi_pending_this_cpu(vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Warm reset vector position:</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h<br/>index ca8eed1d496a..2bec0c89a95c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/asm.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/asm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/asm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/asm.h</a></div><div class='hunk'>@@ -229,9 +229,6 @@ register unsigned long current_stack_pointer asm(_ASM_SP);</div><div class='ctx'> #define _ASM_EXTABLE_UA(from, to)				\</div><div class='ctx'> 	_ASM_EXTABLE_TYPE(from, to, EX_TYPE_UACCESS)</div><div class='ctx'> </div><div class='del'>-#define _ASM_EXTABLE_CPY(from, to)				\</div><div class='del'>-	_ASM_EXTABLE_TYPE(from, to, EX_TYPE_COPY)</div><div class='del'>-</div><div class='ctx'> #define _ASM_EXTABLE_FAULT(from, to)				\</div><div class='ctx'> 	_ASM_EXTABLE_TYPE(from, to, EX_TYPE_FAULT)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h<br/>index 55a55ec04350..55b4d24356ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/atomic.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/atomic.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/atomic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/atomic.h</a></div><div class='hunk'>@@ -86,11 +86,7 @@ static __always_inline int arch_atomic_add_return(int i, atomic_t *v)</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic_add_return arch_atomic_add_return</div><div class='ctx'> </div><div class='del'>-static __always_inline int arch_atomic_sub_return(int i, atomic_t *v)</div><div class='del'>-{</div><div class='del'>-	return arch_atomic_add_return(-i, v);</div><div class='del'>-}</div><div class='del'>-#define arch_atomic_sub_return arch_atomic_sub_return</div><div class='add'>+#define arch_atomic_sub_return(i, v) arch_atomic_add_return(-(i), v)</div><div class='ctx'> </div><div class='ctx'> static __always_inline int arch_atomic_fetch_add(int i, atomic_t *v)</div><div class='ctx'> {</div><div class='hunk'>@@ -98,11 +94,7 @@ static __always_inline int arch_atomic_fetch_add(int i, atomic_t *v)</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic_fetch_add arch_atomic_fetch_add</div><div class='ctx'> </div><div class='del'>-static __always_inline int arch_atomic_fetch_sub(int i, atomic_t *v)</div><div class='del'>-{</div><div class='del'>-	return xadd(&amp;v-&gt;counter, -i);</div><div class='del'>-}</div><div class='del'>-#define arch_atomic_fetch_sub arch_atomic_fetch_sub</div><div class='add'>+#define arch_atomic_fetch_sub(i, v) arch_atomic_fetch_add(-(i), v)</div><div class='ctx'> </div><div class='ctx'> static __always_inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h<br/>index 3486d91b8595..8db2ec4d6cda 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/atomic64_32.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/atomic64_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/atomic64_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/atomic64_32.h</a></div><div class='hunk'>@@ -14,6 +14,32 @@ typedef struct {</div><div class='ctx'> </div><div class='ctx'> #define ATOMIC64_INIT(val)	{ (val) }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Read an atomic64_t non-atomically.</div><div class='add'>+ *</div><div class='add'>+ * This is intended to be used in cases where a subsequent atomic operation</div><div class='add'>+ * will handle the torn value, and can be used to prime the first iteration</div><div class='add'>+ * of unconditional try_cmpxchg() loops, e.g.:</div><div class='add'>+ *</div><div class='add'>+ * 	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='add'>+ * 	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val OP i);</div><div class='add'>+ *</div><div class='add'>+ * This is NOT safe to use where the value is not always checked by a</div><div class='add'>+ * subsequent atomic operation, such as in conditional try_cmpxchg() loops</div><div class='add'>+ * that can break before the atomic operation, e.g.:</div><div class='add'>+ *</div><div class='add'>+ * 	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='add'>+ * 	do {</div><div class='add'>+ * 		if (condition(val))</div><div class='add'>+ * 			break;</div><div class='add'>+ * 	} while (!arch_atomic64_try_cmpxchg(v, &amp;val, val OP i);</div><div class='add'>+ */</div><div class='add'>+static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v)</div><div class='add'>+{</div><div class='add'>+	/* See comment in arch_atomic_read(). */</div><div class='add'>+	return __READ_ONCE(v-&gt;counter);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define __ATOMIC64_DECL(sym) void atomic64_##sym(atomic64_t *, ...)</div><div class='ctx'> #ifndef ATOMIC64_EXPORT</div><div class='ctx'> #define ATOMIC64_DECL_ONE __ATOMIC64_DECL</div><div class='hunk'>@@ -24,7 +50,7 @@ typedef struct {</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_CMPXCHG64</div><div class='ctx'> #define __alternative_atomic64(f, g, out, in...) \</div><div class='del'>-	asm volatile("call %P[func]" \</div><div class='add'>+	asm volatile("call %c[func]" \</div><div class='ctx'> 		     : out : [func] "i" (atomic64_##g##_cx8), ## in)</div><div class='ctx'> </div><div class='ctx'> #define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8)</div><div class='hunk'>@@ -61,12 +87,18 @@ ATOMIC64_DECL(add_unless);</div><div class='ctx'> #undef __ATOMIC64_DECL</div><div class='ctx'> #undef ATOMIC64_EXPORT</div><div class='ctx'> </div><div class='del'>-static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n)</div><div class='add'>+static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)</div><div class='ctx'> {</div><div class='del'>-	return arch_cmpxchg64(&amp;v-&gt;counter, o, n);</div><div class='add'>+	return arch_cmpxchg64(&amp;v-&gt;counter, old, new);</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_cmpxchg arch_atomic64_cmpxchg</div><div class='ctx'> </div><div class='add'>+static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new)</div><div class='add'>+{</div><div class='add'>+	return arch_try_cmpxchg64(&amp;v-&gt;counter, old, new);</div><div class='add'>+}</div><div class='add'>+#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg</div><div class='add'>+</div><div class='ctx'> static __always_inline s64 arch_atomic64_xchg(atomic64_t *v, s64 n)</div><div class='ctx'> {</div><div class='ctx'> 	s64 o;</div><div class='hunk'>@@ -195,69 +227,62 @@ static __always_inline s64 arch_atomic64_dec_if_positive(atomic64_t *v)</div><div class='ctx'> </div><div class='ctx'> static __always_inline void arch_atomic64_and(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c &amp; i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val &amp; i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c &amp; i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val &amp; i));</div><div class='ctx'> </div><div class='del'>-	return old;</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_fetch_and arch_atomic64_fetch_and</div><div class='ctx'> </div><div class='ctx'> static __always_inline void arch_atomic64_or(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c | i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val | i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c | i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val | i));</div><div class='ctx'> </div><div class='del'>-	return old;</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_fetch_or arch_atomic64_fetch_or</div><div class='ctx'> </div><div class='ctx'> static __always_inline void arch_atomic64_xor(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c ^ i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val ^ i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c ^ i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val ^ i));</div><div class='ctx'> </div><div class='del'>-	return old;</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_fetch_xor arch_atomic64_fetch_xor</div><div class='ctx'> </div><div class='ctx'> static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='del'>-	s64 old, c = 0;</div><div class='add'>+	s64 val = arch_atomic64_read_nonatomic(v);</div><div class='ctx'> </div><div class='del'>-	while ((old = arch_atomic64_cmpxchg(v, c, c + i)) != c)</div><div class='del'>-		c = old;</div><div class='add'>+	do { } while (!arch_atomic64_try_cmpxchg(v, &amp;val, val + i));</div><div class='ctx'> </div><div class='del'>-	return old;</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_fetch_add arch_atomic64_fetch_add</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h<br/>index 3165c0feedf7..ae12acae5b06 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/atomic64_64.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/atomic64_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/atomic64_64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/atomic64_64.h</a></div><div class='hunk'>@@ -80,11 +80,7 @@ static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_add_return arch_atomic64_add_return</div><div class='ctx'> </div><div class='del'>-static __always_inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v)</div><div class='del'>-{</div><div class='del'>-	return arch_atomic64_add_return(-i, v);</div><div class='del'>-}</div><div class='del'>-#define arch_atomic64_sub_return arch_atomic64_sub_return</div><div class='add'>+#define arch_atomic64_sub_return(i, v) arch_atomic64_add_return(-(i), v)</div><div class='ctx'> </div><div class='ctx'> static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)</div><div class='ctx'> {</div><div class='hunk'>@@ -92,11 +88,7 @@ static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)</div><div class='ctx'> }</div><div class='ctx'> #define arch_atomic64_fetch_add arch_atomic64_fetch_add</div><div class='ctx'> </div><div class='del'>-static __always_inline s64 arch_atomic64_fetch_sub(s64 i, atomic64_t *v)</div><div class='del'>-{</div><div class='del'>-	return xadd(&amp;v-&gt;counter, -i);</div><div class='del'>-}</div><div class='del'>-#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub</div><div class='add'>+#define arch_atomic64_fetch_sub(i, v) arch_atomic64_fetch_add(-(i), v)</div><div class='ctx'> </div><div class='ctx'> static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h<br/>index a3e0be0470a4..3e5b111e619d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/boot.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/boot.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/boot.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/boot.h</a></div><div class='hunk'>@@ -6,11 +6,6 @@</div><div class='ctx'> #include &lt;asm/pgtable_types.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/boot.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Physical address where kernel should be loaded. */</div><div class='del'>-#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \</div><div class='del'>-				+ (CONFIG_PHYSICAL_ALIGN - 1)) \</div><div class='del'>-				&amp; ~(CONFIG_PHYSICAL_ALIGN - 1))</div><div class='del'>-</div><div class='ctx'> /* Minimum kernel alignment, as a power of two */</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> # define MIN_KERNEL_ALIGN_LG2	PMD_SHIFT</div><div class='head'>diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h<br/>index b5731c51f0f4..ed2797f132ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cmpxchg_32.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cmpxchg_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cmpxchg_32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/cmpxchg_32.h</a></div><div class='hunk'>@@ -3,103 +3,150 @@</div><div class='ctx'> #define _ASM_X86_CMPXCHG_32_H</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Note: if you use set64_bit(), __cmpxchg64(), or their variants,</div><div class='add'>+ * Note: if you use __cmpxchg64(), or their variants,</div><div class='ctx'>  *       you need to test for the feature in boot_cpu_data.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_CMPXCHG64</div><div class='del'>-#define arch_cmpxchg64(ptr, o, n)					\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64((ptr), (unsigned long long)(o), \</div><div class='del'>-					 (unsigned long long)(n)))</div><div class='del'>-#define arch_cmpxchg64_local(ptr, o, n)					\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64_local((ptr), (unsigned long long)(o), \</div><div class='del'>-					       (unsigned long long)(n)))</div><div class='del'>-#define arch_try_cmpxchg64(ptr, po, n)					\</div><div class='del'>-	__try_cmpxchg64((ptr), (unsigned long long *)(po), \</div><div class='del'>-			(unsigned long long)(n))</div><div class='del'>-#endif</div><div class='add'>+union __u64_halves {</div><div class='add'>+	u64 full;</div><div class='add'>+	struct {</div><div class='add'>+		u32 low, high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define __arch_cmpxchg64(_ptr, _old, _new, _lock)			\</div><div class='add'>+({									\</div><div class='add'>+	union __u64_halves o = { .full = (_old), },			\</div><div class='add'>+			   n = { .full = (_new), };			\</div><div class='add'>+									\</div><div class='add'>+	asm volatile(_lock "cmpxchg8b %[ptr]"				\</div><div class='add'>+		     : [ptr] "+m" (*(_ptr)),				\</div><div class='add'>+		       "+a" (o.low), "+d" (o.high)			\</div><div class='add'>+		     : "b" (n.low), "c" (n.high)			\</div><div class='add'>+		     : "memory");					\</div><div class='add'>+									\</div><div class='add'>+	o.full;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static __always_inline u64 __cmpxchg64(volatile u64 *ptr, u64 old, u64 new)</div><div class='add'>+{</div><div class='add'>+	return __arch_cmpxchg64(ptr, old, new, LOCK_PREFIX);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static inline u64 __cmpxchg64(volatile u64 *ptr, u64 old, u64 new)</div><div class='add'>+static __always_inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)</div><div class='ctx'> {</div><div class='del'>-	u64 prev;</div><div class='del'>-	asm volatile(LOCK_PREFIX "cmpxchg8b %1"</div><div class='del'>-		     : "=A" (prev),</div><div class='del'>-		       "+m" (*ptr)</div><div class='del'>-		     : "b" ((u32)new),</div><div class='del'>-		       "c" ((u32)(new &gt;&gt; 32)),</div><div class='del'>-		       "0" (old)</div><div class='del'>-		     : "memory");</div><div class='del'>-	return prev;</div><div class='add'>+	return __arch_cmpxchg64(ptr, old, new,);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)</div><div class='add'>+#define __arch_try_cmpxchg64(_ptr, _oldp, _new, _lock)			\</div><div class='add'>+({									\</div><div class='add'>+	union __u64_halves o = { .full = *(_oldp), },			\</div><div class='add'>+			   n = { .full = (_new), };			\</div><div class='add'>+	bool ret;							\</div><div class='add'>+									\</div><div class='add'>+	asm volatile(_lock "cmpxchg8b %[ptr]"				\</div><div class='add'>+		     CC_SET(e)						\</div><div class='add'>+		     : CC_OUT(e) (ret),					\</div><div class='add'>+		       [ptr] "+m" (*(_ptr)),				\</div><div class='add'>+		       "+a" (o.low), "+d" (o.high)			\</div><div class='add'>+		     : "b" (n.low), "c" (n.high)			\</div><div class='add'>+		     : "memory");					\</div><div class='add'>+									\</div><div class='add'>+	if (unlikely(!ret))						\</div><div class='add'>+		*(_oldp) = o.full;					\</div><div class='add'>+									\</div><div class='add'>+	likely(ret);							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static __always_inline bool __try_cmpxchg64(volatile u64 *ptr, u64 *oldp, u64 new)</div><div class='ctx'> {</div><div class='del'>-	u64 prev;</div><div class='del'>-	asm volatile("cmpxchg8b %1"</div><div class='del'>-		     : "=A" (prev),</div><div class='del'>-		       "+m" (*ptr)</div><div class='del'>-		     : "b" ((u32)new),</div><div class='del'>-		       "c" ((u32)(new &gt;&gt; 32)),</div><div class='del'>-		       "0" (old)</div><div class='del'>-		     : "memory");</div><div class='del'>-	return prev;</div><div class='add'>+	return __arch_try_cmpxchg64(ptr, oldp, new, LOCK_PREFIX);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool __try_cmpxchg64(volatile u64 *ptr, u64 *pold, u64 new)</div><div class='add'>+static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, u64 new)</div><div class='ctx'> {</div><div class='del'>-	bool success;</div><div class='del'>-	u64 old = *pold;</div><div class='del'>-	asm volatile(LOCK_PREFIX "cmpxchg8b %[ptr]"</div><div class='del'>-		     CC_SET(z)</div><div class='del'>-		     : CC_OUT(z) (success),</div><div class='del'>-		       [ptr] "+m" (*ptr),</div><div class='del'>-		       "+A" (old)</div><div class='del'>-		     : "b" ((u32)new),</div><div class='del'>-		       "c" ((u32)(new &gt;&gt; 32))</div><div class='del'>-		     : "memory");</div><div class='del'>-</div><div class='del'>-	if (unlikely(!success))</div><div class='del'>-		*pold = old;</div><div class='del'>-	return success;</div><div class='add'>+	return __arch_try_cmpxchg64(ptr, oldp, new,);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_X86_CMPXCHG64</div><div class='add'>+#ifdef CONFIG_X86_CMPXCHG64</div><div class='add'>+</div><div class='add'>+#define arch_cmpxchg64 __cmpxchg64</div><div class='add'>+</div><div class='add'>+#define arch_cmpxchg64_local __cmpxchg64_local</div><div class='add'>+</div><div class='add'>+#define arch_try_cmpxchg64 __try_cmpxchg64</div><div class='add'>+</div><div class='add'>+#define arch_try_cmpxchg64_local __try_cmpxchg64_local</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Building a kernel capable running on 80386 and 80486. It may be necessary</div><div class='ctx'>  * to simulate the cmpxchg8b on the 80386 and 80486 CPU.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define arch_cmpxchg64(ptr, o, n)				\</div><div class='del'>-({								\</div><div class='del'>-	__typeof__(*(ptr)) __ret;				\</div><div class='del'>-	__typeof__(*(ptr)) __old = (o);				\</div><div class='del'>-	__typeof__(*(ptr)) __new = (n);				\</div><div class='del'>-	alternative_io(LOCK_PREFIX_HERE				\</div><div class='del'>-			"call cmpxchg8b_emu",			\</div><div class='del'>-			"lock; cmpxchg8b (%%esi)" ,		\</div><div class='del'>-		       X86_FEATURE_CX8,				\</div><div class='del'>-		       "=A" (__ret),				\</div><div class='del'>-		       "S" ((ptr)), "0" (__old),		\</div><div class='del'>-		       "b" ((unsigned int)__new),		\</div><div class='del'>-		       "c" ((unsigned int)(__new&gt;&gt;32))		\</div><div class='del'>-		       : "memory");				\</div><div class='del'>-	__ret; })</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define arch_cmpxchg64_local(ptr, o, n)				\</div><div class='del'>-({								\</div><div class='del'>-	__typeof__(*(ptr)) __ret;				\</div><div class='del'>-	__typeof__(*(ptr)) __old = (o);				\</div><div class='del'>-	__typeof__(*(ptr)) __new = (n);				\</div><div class='del'>-	alternative_io("call cmpxchg8b_emu",			\</div><div class='del'>-		       "cmpxchg8b (%%esi)" ,			\</div><div class='del'>-		       X86_FEATURE_CX8,				\</div><div class='del'>-		       "=A" (__ret),				\</div><div class='del'>-		       "S" ((ptr)), "0" (__old),		\</div><div class='del'>-		       "b" ((unsigned int)__new),		\</div><div class='del'>-		       "c" ((unsigned int)(__new&gt;&gt;32))		\</div><div class='del'>-		       : "memory");				\</div><div class='del'>-	__ret; })</div><div class='add'>+#define __arch_cmpxchg64_emu(_ptr, _old, _new, _lock_loc, _lock)	\</div><div class='add'>+({									\</div><div class='add'>+	union __u64_halves o = { .full = (_old), },			\</div><div class='add'>+			   n = { .full = (_new), };			\</div><div class='add'>+									\</div><div class='add'>+	asm volatile(ALTERNATIVE(_lock_loc				\</div><div class='add'>+				 "call cmpxchg8b_emu",			\</div><div class='add'>+				 _lock "cmpxchg8b %[ptr]", X86_FEATURE_CX8) \</div><div class='add'>+		     : [ptr] "+m" (*(_ptr)),				\</div><div class='add'>+		       "+a" (o.low), "+d" (o.high)			\</div><div class='add'>+		     : "b" (n.low), "c" (n.high), "S" (_ptr)		\</div><div class='add'>+		     : "memory");					\</div><div class='add'>+									\</div><div class='add'>+	o.full;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static __always_inline u64 arch_cmpxchg64(volatile u64 *ptr, u64 old, u64 new)</div><div class='add'>+{</div><div class='add'>+	return __arch_cmpxchg64_emu(ptr, old, new, LOCK_PREFIX_HERE, "lock; ");</div><div class='add'>+}</div><div class='add'>+#define arch_cmpxchg64 arch_cmpxchg64</div><div class='add'>+</div><div class='add'>+static __always_inline u64 arch_cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)</div><div class='add'>+{</div><div class='add'>+	return __arch_cmpxchg64_emu(ptr, old, new, ,);</div><div class='add'>+}</div><div class='add'>+#define arch_cmpxchg64_local arch_cmpxchg64_local</div><div class='add'>+</div><div class='add'>+#define __arch_try_cmpxchg64_emu(_ptr, _oldp, _new, _lock_loc, _lock)	\</div><div class='add'>+({									\</div><div class='add'>+	union __u64_halves o = { .full = *(_oldp), },			\</div><div class='add'>+			   n = { .full = (_new), };			\</div><div class='add'>+	bool ret;							\</div><div class='add'>+									\</div><div class='add'>+	asm volatile(ALTERNATIVE(_lock_loc				\</div><div class='add'>+				 "call cmpxchg8b_emu",			\</div><div class='add'>+				 _lock "cmpxchg8b %[ptr]", X86_FEATURE_CX8) \</div><div class='add'>+		     CC_SET(e)						\</div><div class='add'>+		     : CC_OUT(e) (ret),					\</div><div class='add'>+		       [ptr] "+m" (*(_ptr)),				\</div><div class='add'>+		       "+a" (o.low), "+d" (o.high)			\</div><div class='add'>+		     : "b" (n.low), "c" (n.high), "S" (_ptr)		\</div><div class='add'>+		     : "memory");					\</div><div class='add'>+									\</div><div class='add'>+	if (unlikely(!ret))						\</div><div class='add'>+		*(_oldp) = o.full;					\</div><div class='add'>+									\</div><div class='add'>+	likely(ret);							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static __always_inline bool arch_try_cmpxchg64(volatile u64 *ptr, u64 *oldp, u64 new)</div><div class='add'>+{</div><div class='add'>+	return __arch_try_cmpxchg64_emu(ptr, oldp, new, LOCK_PREFIX_HERE, "lock; ");</div><div class='add'>+}</div><div class='add'>+#define arch_try_cmpxchg64 arch_try_cmpxchg64</div><div class='add'>+</div><div class='add'>+static __always_inline bool arch_try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, u64 new)</div><div class='add'>+{</div><div class='add'>+	return __arch_try_cmpxchg64_emu(ptr, oldp, new, ,);</div><div class='add'>+}</div><div class='add'>+#define arch_try_cmpxchg64_local arch_try_cmpxchg64_local</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/cmpxchg_64.h b/arch/x86/include/asm/cmpxchg_64.h<br/>index 44b08b53ab32..5e241306db26 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cmpxchg_64.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cmpxchg_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cmpxchg_64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/cmpxchg_64.h</a></div><div class='hunk'>@@ -20,6 +20,12 @@</div><div class='ctx'> 	arch_try_cmpxchg((ptr), (po), (n));				\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#define arch_try_cmpxchg64_local(ptr, po, n)				\</div><div class='add'>+({									\</div><div class='add'>+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\</div><div class='add'>+	arch_try_cmpxchg_local((ptr), (po), (n));			\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> union __u128_halves {</div><div class='ctx'> 	u128 full;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -62,7 +68,7 @@ static __always_inline u128 arch_cmpxchg128_local(volatile u128 *ptr, u128 old,</div><div class='ctx'> 	asm volatile(_lock "cmpxchg16b %[ptr]"				\</div><div class='ctx'> 		     CC_SET(e)						\</div><div class='ctx'> 		     : CC_OUT(e) (ret),					\</div><div class='del'>-		       [ptr] "+m" (*ptr),				\</div><div class='add'>+		       [ptr] "+m" (*(_ptr)),				\</div><div class='ctx'> 		       "+a" (o.low), "+d" (o.high)			\</div><div class='ctx'> 		     : "b" (n.low), "c" (n.high)			\</div><div class='ctx'> 		     : "memory");					\</div><div class='head'>diff --git a/arch/x86/include/asm/coco.h b/arch/x86/include/asm/coco.h<br/>index c086699b0d0c..aa6c8f8ca958 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/coco.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/coco.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/coco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/coco.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@ u64 cc_mkdec(u64 val);</div><div class='ctx'> void cc_random_init(void);</div><div class='ctx'> #else</div><div class='ctx'> #define cc_vendor (CC_VENDOR_NONE)</div><div class='add'>+static const u64 cc_mask = 0;</div><div class='ctx'> </div><div class='ctx'> static inline u64 cc_mkenc(u64 val)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cpu_device_id.h<br/>index eb8fcede9e3b..970a232009c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpu_device_id.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cpu_device_id.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpu_device_id.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/cpu_device_id.h</a></div><div class='hunk'>@@ -3,6 +3,39 @@</div><div class='ctx'> #define _ASM_X86_CPU_DEVICE_ID</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Can't use &lt;linux/bitfield.h&gt; because it generates expressions that</div><div class='add'>+ * cannot be used in structure initializers. Bitfield construction</div><div class='add'>+ * here must match the union in struct cpuinfo_86:</div><div class='add'>+ *	union {</div><div class='add'>+ *		struct {</div><div class='add'>+ *			__u8	x86_model;</div><div class='add'>+ *			__u8	x86;</div><div class='add'>+ *			__u8	x86_vendor;</div><div class='add'>+ *			__u8	x86_reserved;</div><div class='add'>+ *		};</div><div class='add'>+ *		__u32		x86_vfm;</div><div class='add'>+ *	};</div><div class='add'>+ */</div><div class='add'>+#define VFM_MODEL_BIT	0</div><div class='add'>+#define VFM_FAMILY_BIT	8</div><div class='add'>+#define VFM_VENDOR_BIT	16</div><div class='add'>+#define VFM_RSVD_BIT	24</div><div class='add'>+</div><div class='add'>+#define	VFM_MODEL_MASK	GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)</div><div class='add'>+#define	VFM_FAMILY_MASK	GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)</div><div class='add'>+#define	VFM_VENDOR_MASK	GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)</div><div class='add'>+</div><div class='add'>+#define VFM_MODEL(vfm)	(((vfm) &amp; VFM_MODEL_MASK) &gt;&gt; VFM_MODEL_BIT)</div><div class='add'>+#define VFM_FAMILY(vfm)	(((vfm) &amp; VFM_FAMILY_MASK) &gt;&gt; VFM_FAMILY_BIT)</div><div class='add'>+#define VFM_VENDOR(vfm)	(((vfm) &amp; VFM_VENDOR_MASK) &gt;&gt; VFM_VENDOR_BIT)</div><div class='add'>+</div><div class='add'>+#define	VFM_MAKE(_vendor, _family, _model) (	\</div><div class='add'>+	((_model) &lt;&lt; VFM_MODEL_BIT) |		\</div><div class='add'>+	((_family) &lt;&lt; VFM_FAMILY_BIT) |		\</div><div class='add'>+	((_vendor) &lt;&lt; VFM_VENDOR_BIT)		\</div><div class='add'>+)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Declare drivers belonging to specific x86 CPUs</div><div class='ctx'>  * Similar in spirit to pci_device_id and related PCI functions</div><div class='ctx'>  *</div><div class='hunk'>@@ -49,6 +82,16 @@</div><div class='ctx'> 	.driver_data	= (unsigned long) _data				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(_vendor, _family, _model, \</div><div class='add'>+						    _steppings, _feature, _data) { \</div><div class='add'>+	.vendor		= _vendor,					\</div><div class='add'>+	.family		= _family,					\</div><div class='add'>+	.model		= _model,					\</div><div class='add'>+	.steppings	= _steppings,					\</div><div class='add'>+	.feature	= _feature,					\</div><div class='add'>+	.driver_data	= (unsigned long) _data				\</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Macro for CPU matching</div><div class='ctx'>  * @_vendor:	The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY</div><div class='hunk'>@@ -164,6 +207,56 @@</div><div class='ctx'> 	X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model, \</div><div class='ctx'> 						     steppings, X86_FEATURE_ANY, data)</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * X86_MATCH_VFM - Match encoded vendor/family/model</div><div class='add'>+ * @vfm:	Encoded 8-bits each for vendor, family, model</div><div class='add'>+ * @data:	Driver specific data or NULL. The internal storage</div><div class='add'>+ *		format is unsigned long. The supplied value, pointer</div><div class='add'>+ *		etc. is cast to unsigned long internally.</div><div class='add'>+ *</div><div class='add'>+ * Stepping and feature are set to wildcards</div><div class='add'>+ */</div><div class='add'>+#define X86_MATCH_VFM(vfm, data)			\</div><div class='add'>+	X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(	\</div><div class='add'>+		VFM_VENDOR(vfm),			\</div><div class='add'>+		VFM_FAMILY(vfm),			\</div><div class='add'>+		VFM_MODEL(vfm),				\</div><div class='add'>+		X86_STEPPING_ANY, X86_FEATURE_ANY, data)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * X86_MATCH_VFM_STEPPINGS - Match encoded vendor/family/model/stepping</div><div class='add'>+ * @vfm:	Encoded 8-bits each for vendor, family, model</div><div class='add'>+ * @steppings:	Bitmask of steppings to match</div><div class='add'>+ * @data:	Driver specific data or NULL. The internal storage</div><div class='add'>+ *		format is unsigned long. The supplied value, pointer</div><div class='add'>+ *		etc. is cast to unsigned long internally.</div><div class='add'>+ *</div><div class='add'>+ * feature is set to wildcard</div><div class='add'>+ */</div><div class='add'>+#define X86_MATCH_VFM_STEPPINGS(vfm, steppings, data)	\</div><div class='add'>+	X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(	\</div><div class='add'>+		VFM_VENDOR(vfm),			\</div><div class='add'>+		VFM_FAMILY(vfm),			\</div><div class='add'>+		VFM_MODEL(vfm),				\</div><div class='add'>+		steppings, X86_FEATURE_ANY, data)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * X86_MATCH_VFM_FEATURE - Match encoded vendor/family/model/feature</div><div class='add'>+ * @vfm:	Encoded 8-bits each for vendor, family, model</div><div class='add'>+ * @feature:	A X86_FEATURE bit</div><div class='add'>+ * @data:	Driver specific data or NULL. The internal storage</div><div class='add'>+ *		format is unsigned long. The supplied value, pointer</div><div class='add'>+ *		etc. is cast to unsigned long internally.</div><div class='add'>+ *</div><div class='add'>+ * Steppings is set to wildcard</div><div class='add'>+ */</div><div class='add'>+#define X86_MATCH_VFM_FEATURE(vfm, feature, data)	\</div><div class='add'>+	X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(	\</div><div class='add'>+		VFM_VENDOR(vfm),			\</div><div class='add'>+		VFM_FAMILY(vfm),			\</div><div class='add'>+		VFM_MODEL(vfm),				\</div><div class='add'>+		X86_STEPPING_ANY, feature, data)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Match specific microcode revisions.</div><div class='ctx'>  *</div><div class='hunk'>@@ -190,6 +283,14 @@ struct x86_cpu_desc {</div><div class='ctx'> 	.x86_microcode_rev	= (revision),			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define AMD_CPU_DESC(fam, model, stepping, revision) {		\</div><div class='add'>+	.x86_family		= (fam),			\</div><div class='add'>+	.x86_vendor		= X86_VENDOR_AMD,		\</div><div class='add'>+	.x86_model		= (model),			\</div><div class='add'>+	.x86_stepping		= (stepping),			\</div><div class='add'>+	.x86_microcode_rev	= (revision),			\</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match);</div><div class='ctx'> extern bool x86_cpu_has_min_microcode_rev(const struct x86_cpu_desc *table);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h<br/>index 686e92d2663e..0b9611da6c53 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpufeature.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/cpufeature.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpufeature.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/cpufeature.h</a></div><div class='hunk'>@@ -129,8 +129,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];</div><div class='ctx'> </div><div class='ctx'> #define this_cpu_has(bit)						\</div><div class='ctx'> 	(__builtin_constant_p(bit) &amp;&amp; REQUIRED_MASK_BIT_SET(bit) ? 1 :	\</div><div class='del'>-	 x86_this_cpu_test_bit(bit,					\</div><div class='del'>-		(unsigned long __percpu *)&amp;cpu_info.x86_capability))</div><div class='add'>+	 x86_this_cpu_test_bit(bit, cpu_info.x86_capability))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This macro is for detection of features which need kernel</div><div class='hunk'>@@ -150,8 +149,12 @@ extern const char * const x86_bug_flags[NBUGINTS*32];</div><div class='ctx'> extern void setup_clear_cpu_cap(unsigned int bit);</div><div class='ctx'> extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);</div><div class='ctx'> </div><div class='del'>-#define setup_force_cpu_cap(bit) do { \</div><div class='del'>-	set_cpu_cap(&amp;boot_cpu_data, bit);	\</div><div class='add'>+#define setup_force_cpu_cap(bit) do {			\</div><div class='add'>+							\</div><div class='add'>+	if (!boot_cpu_has(bit))				\</div><div class='add'>+		WARN_ON(alternatives_patched);		\</div><div class='add'>+							\</div><div class='add'>+	set_cpu_cap(&amp;boot_cpu_data, bit);		\</div><div class='ctx'> 	set_bit(bit, (unsigned long *)cpu_caps_set);	\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='hunk'>@@ -172,11 +175,10 @@ extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);</div><div class='ctx'>  */</div><div class='ctx'> static __always_inline bool _static_cpu_has(u16 bit)</div><div class='ctx'> {</div><div class='del'>-	asm goto(</div><div class='del'>-		ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]")</div><div class='add'>+	asm goto(ALTERNATIVE_TERNARY("jmp 6f", %c[feature], "", "jmp %l[t_no]")</div><div class='ctx'> 		".pushsection .altinstr_aux,\"ax\"\n"</div><div class='ctx'> 		"6:\n"</div><div class='del'>-		" testb %[bitnum]," _ASM_RIP(%P[cap_byte]) "\n"</div><div class='add'>+		" testb %[bitnum], %a[cap_byte]\n"</div><div class='ctx'> 		" jnz %l[t_yes]\n"</div><div class='ctx'> 		" jmp %l[t_no]\n"</div><div class='ctx'> 		".popsection\n"</div><div class='head'>diff --git a/arch/x86/include/asm/e820/api.h b/arch/x86/include/asm/e820/api.h<br/>index e8f58ddd06d9..2e74a7f0e935 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/e820/api.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/e820/api.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/e820/api.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/e820/api.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@ extern bool e820__mapped_all(u64 start, u64 end, enum e820_type type);</div><div class='ctx'> extern void e820__range_add   (u64 start, u64 size, enum e820_type type);</div><div class='ctx'> extern u64  e820__range_update(u64 start, u64 size, enum e820_type old_type, enum e820_type new_type);</div><div class='ctx'> extern u64  e820__range_remove(u64 start, u64 size, enum e820_type old_type, bool check_type);</div><div class='add'>+extern u64  e820__range_update_table(struct e820_table *t, u64 start, u64 size, enum e820_type old_type, enum e820_type new_type);</div><div class='ctx'> </div><div class='ctx'> extern void e820__print_table(char *who);</div><div class='ctx'> extern int  e820__update_table(struct e820_table *table);</div><div class='head'>diff --git a/arch/x86/include/asm/extable_fixup_types.h b/arch/x86/include/asm/extable_fixup_types.h<br/>index 7acf0383be80..906b0d5541e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/extable_fixup_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/extable_fixup_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/extable_fixup_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/extable_fixup_types.h</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> #define	EX_TYPE_DEFAULT			 1</div><div class='ctx'> #define	EX_TYPE_FAULT			 2</div><div class='ctx'> #define	EX_TYPE_UACCESS			 3</div><div class='del'>-#define	EX_TYPE_COPY			 4</div><div class='add'>+/* unused, was: #define EX_TYPE_COPY	 4 */</div><div class='ctx'> #define	EX_TYPE_CLEAR_FS		 5</div><div class='ctx'> #define	EX_TYPE_FPU_RESTORE		 6</div><div class='ctx'> #define	EX_TYPE_BPF			 7</div><div class='head'>diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h<br/>index fbc7722b87d1..c67fa6ad098a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/hardirq.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/hardirq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/hardirq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/hardirq.h</a></div><div class='hunk'>@@ -44,10 +44,16 @@ typedef struct {</div><div class='ctx'> 	unsigned int irq_hv_reenlightenment_count;</div><div class='ctx'> 	unsigned int hyperv_stimer0_count;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+	unsigned int posted_msi_notification_count;</div><div class='add'>+#endif</div><div class='ctx'> } ____cacheline_aligned irq_cpustat_t;</div><div class='ctx'> </div><div class='ctx'> DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+DECLARE_PER_CPU_ALIGNED(struct pi_desc, posted_msi_pi_desc);</div><div class='add'>+#endif</div><div class='ctx'> #define __ARCH_IRQ_STAT</div><div class='ctx'> </div><div class='ctx'> #define inc_irq_stat(member)	this_cpu_inc(irq_stat.member)</div><div class='head'>diff --git a/arch/x86/include/asm/ia32.h b/arch/x86/include/asm/ia32.h<br/>index 4212c00c9708..9d69f3f8dbab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/ia32.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/ia32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/ia32.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/ia32.h</a></div><div class='hunk'>@@ -56,17 +56,6 @@ struct stat64 {</div><div class='ctx'> 	unsigned long long	st_ino;</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='del'>-#define IA32_STACK_TOP IA32_PAGE_OFFSET</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-struct linux_binprm;</div><div class='del'>-extern int ia32_setup_arg_pages(struct linux_binprm *bprm,</div><div class='del'>-				unsigned long stack_top, int exec_stack);</div><div class='del'>-struct mm_struct;</div><div class='del'>-extern void ia32_pick_mmap_layout(struct mm_struct *mm);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> extern bool __ia32_enabled;</div><div class='ctx'> </div><div class='ctx'> static __always_inline bool ia32_enabled(void)</div><div class='head'>diff --git a/arch/x86/include/asm/ia32_unistd.h b/arch/x86/include/asm/ia32_unistd.h<br/>deleted file mode 100644<br/>index aa065c94ccf5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/ia32_unistd.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/ia32_unistd.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef _ASM_X86_IA32_UNISTD_H</div><div class='del'>-#define _ASM_X86_IA32_UNISTD_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This file contains the system call numbers of the ia32 compat ABI,</div><div class='del'>- * this is for the kernel only.</div><div class='del'>- */</div><div class='del'>-#define __SYSCALL_ia32_NR(x) (x)</div><div class='del'>-#include &lt;asm/unistd_32_ia32.h&gt;</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_IA32_UNISTD_H */</div><div class='head'>diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h<br/>index 749c7411d2f1..d4f24499b256 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/idtentry.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/idtentry.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/idtentry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/idtentry.h</a></div><div class='hunk'>@@ -751,6 +751,12 @@ DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_NESTED_VECTOR,	sysvec_kvm_posted_intr_nested</div><div class='ctx'> # define fred_sysvec_kvm_posted_intr_nested_ipi		NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+# ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+DECLARE_IDTENTRY_SYSVEC(POSTED_MSI_NOTIFICATION_VECTOR,	sysvec_posted_msi_notification);</div><div class='add'>+#else</div><div class='add'>+# define fred_sysvec_posted_msi_notification		NULL</div><div class='add'>+# endif</div><div class='add'>+</div><div class='ctx'> #if IS_ENABLED(CONFIG_HYPERV)</div><div class='ctx'> DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR,	sysvec_hyperv_callback);</div><div class='ctx'> DECLARE_IDTENTRY_SYSVEC(HYPERV_REENLIGHTENMENT_VECTOR,	sysvec_hyperv_reenlightenment);</div><div class='head'>diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h<br/>index d0941f4c2724..f81a851c46dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/intel-family.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/intel-family.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/intel-family.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/intel-family.h</a></div><div class='hunk'>@@ -40,137 +40,221 @@</div><div class='ctx'>  * their own names :-(</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define IFM(_fam, _model)	VFM_MAKE(X86_VENDOR_INTEL, _fam, _model)</div><div class='add'>+</div><div class='ctx'> /* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */</div><div class='ctx'> #define INTEL_FAM6_ANY			X86_MODEL_ANY</div><div class='add'>+/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */</div><div class='add'>+#define INTEL_ANY			IFM(X86_FAMILY_ANY, X86_MODEL_ANY)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_CORE_YONAH		0x0E</div><div class='add'>+#define INTEL_CORE_YONAH		IFM(6, 0x0E)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_CORE2_MEROM		0x0F</div><div class='add'>+#define INTEL_CORE2_MEROM		IFM(6, 0x0F)</div><div class='ctx'> #define INTEL_FAM6_CORE2_MEROM_L	0x16</div><div class='add'>+#define INTEL_CORE2_MEROM_L		IFM(6, 0x16)</div><div class='ctx'> #define INTEL_FAM6_CORE2_PENRYN		0x17</div><div class='add'>+#define INTEL_CORE2_PENRYN		IFM(6, 0x17)</div><div class='ctx'> #define INTEL_FAM6_CORE2_DUNNINGTON	0x1D</div><div class='add'>+#define INTEL_CORE2_DUNNINGTON		IFM(6, 0x1D)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_NEHALEM		0x1E</div><div class='add'>+#define INTEL_NEHALEM			IFM(6, 0x1E)</div><div class='ctx'> #define INTEL_FAM6_NEHALEM_G		0x1F /* Auburndale / Havendale */</div><div class='add'>+#define INTEL_NEHALEM_G			IFM(6, 0x1F) /* Auburndale / Havendale */</div><div class='ctx'> #define INTEL_FAM6_NEHALEM_EP		0x1A</div><div class='add'>+#define INTEL_NEHALEM_EP		IFM(6, 0x1A)</div><div class='ctx'> #define INTEL_FAM6_NEHALEM_EX		0x2E</div><div class='add'>+#define INTEL_NEHALEM_EX		IFM(6, 0x2E)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_WESTMERE		0x25</div><div class='add'>+#define INTEL_WESTMERE			IFM(6, 0x25)</div><div class='ctx'> #define INTEL_FAM6_WESTMERE_EP		0x2C</div><div class='add'>+#define INTEL_WESTMERE_EP		IFM(6, 0x2C)</div><div class='ctx'> #define INTEL_FAM6_WESTMERE_EX		0x2F</div><div class='add'>+#define INTEL_WESTMERE_EX		IFM(6, 0x2F)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_SANDYBRIDGE		0x2A</div><div class='add'>+#define INTEL_SANDYBRIDGE		IFM(6, 0x2A)</div><div class='ctx'> #define INTEL_FAM6_SANDYBRIDGE_X	0x2D</div><div class='add'>+#define INTEL_SANDYBRIDGE_X		IFM(6, 0x2D)</div><div class='ctx'> #define INTEL_FAM6_IVYBRIDGE		0x3A</div><div class='add'>+#define INTEL_IVYBRIDGE			IFM(6, 0x3A)</div><div class='ctx'> #define INTEL_FAM6_IVYBRIDGE_X		0x3E</div><div class='add'>+#define INTEL_IVYBRIDGE_X		IFM(6, 0x3E)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_HASWELL		0x3C</div><div class='add'>+#define INTEL_HASWELL			IFM(6, 0x3C)</div><div class='ctx'> #define INTEL_FAM6_HASWELL_X		0x3F</div><div class='add'>+#define INTEL_HASWELL_X			IFM(6, 0x3F)</div><div class='ctx'> #define INTEL_FAM6_HASWELL_L		0x45</div><div class='add'>+#define INTEL_HASWELL_L			IFM(6, 0x45)</div><div class='ctx'> #define INTEL_FAM6_HASWELL_G		0x46</div><div class='add'>+#define INTEL_HASWELL_G			IFM(6, 0x46)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_BROADWELL		0x3D</div><div class='add'>+#define INTEL_BROADWELL			IFM(6, 0x3D)</div><div class='ctx'> #define INTEL_FAM6_BROADWELL_G		0x47</div><div class='add'>+#define INTEL_BROADWELL_G		IFM(6, 0x47)</div><div class='ctx'> #define INTEL_FAM6_BROADWELL_X		0x4F</div><div class='add'>+#define INTEL_BROADWELL_X		IFM(6, 0x4F)</div><div class='ctx'> #define INTEL_FAM6_BROADWELL_D		0x56</div><div class='add'>+#define INTEL_BROADWELL_D		IFM(6, 0x56)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_SKYLAKE_L		0x4E	/* Sky Lake             */</div><div class='add'>+#define INTEL_SKYLAKE_L			IFM(6, 0x4E) /* Sky Lake */</div><div class='ctx'> #define INTEL_FAM6_SKYLAKE		0x5E	/* Sky Lake             */</div><div class='add'>+#define INTEL_SKYLAKE			IFM(6, 0x5E) /* Sky Lake */</div><div class='ctx'> #define INTEL_FAM6_SKYLAKE_X		0x55	/* Sky Lake             */</div><div class='add'>+#define INTEL_SKYLAKE_X			IFM(6, 0x55) /* Sky Lake */</div><div class='ctx'> /*                 CASCADELAKE_X	0x55	   Sky Lake -- s: 7     */</div><div class='ctx'> /*                 COOPERLAKE_X		0x55	   Sky Lake -- s: 11    */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_KABYLAKE_L		0x8E	/* Sky Lake             */</div><div class='add'>+#define INTEL_KABYLAKE_L		IFM(6, 0x8E) /* Sky Lake */</div><div class='ctx'> /*                 AMBERLAKE_L		0x8E	   Sky Lake -- s: 9     */</div><div class='ctx'> /*                 COFFEELAKE_L		0x8E	   Sky Lake -- s: 10    */</div><div class='ctx'> /*                 WHISKEYLAKE_L	0x8E       Sky Lake -- s: 11,12 */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_KABYLAKE		0x9E	/* Sky Lake             */</div><div class='add'>+#define INTEL_KABYLAKE			IFM(6, 0x9E) /* Sky Lake */</div><div class='ctx'> /*                 COFFEELAKE		0x9E	   Sky Lake -- s: 10-13 */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_COMETLAKE		0xA5	/* Sky Lake             */</div><div class='add'>+#define INTEL_COMETLAKE			IFM(6, 0xA5) /* Sky Lake */</div><div class='ctx'> #define INTEL_FAM6_COMETLAKE_L		0xA6	/* Sky Lake             */</div><div class='add'>+#define INTEL_COMETLAKE_L		IFM(6, 0xA6) /* Sky Lake */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_CANNONLAKE_L		0x66	/* Palm Cove */</div><div class='add'>+#define INTEL_CANNONLAKE_L		IFM(6, 0x66) /* Palm Cove */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ICELAKE_X		0x6A	/* Sunny Cove */</div><div class='add'>+#define INTEL_ICELAKE_X			IFM(6, 0x6A) /* Sunny Cove */</div><div class='ctx'> #define INTEL_FAM6_ICELAKE_D		0x6C	/* Sunny Cove */</div><div class='add'>+#define INTEL_ICELAKE_D			IFM(6, 0x6C) /* Sunny Cove */</div><div class='ctx'> #define INTEL_FAM6_ICELAKE		0x7D	/* Sunny Cove */</div><div class='add'>+#define INTEL_ICELAKE			IFM(6, 0x7D) /* Sunny Cove */</div><div class='ctx'> #define INTEL_FAM6_ICELAKE_L		0x7E	/* Sunny Cove */</div><div class='add'>+#define INTEL_ICELAKE_L			IFM(6, 0x7E) /* Sunny Cove */</div><div class='ctx'> #define INTEL_FAM6_ICELAKE_NNPI		0x9D	/* Sunny Cove */</div><div class='add'>+#define INTEL_ICELAKE_NNPI		IFM(6, 0x9D) /* Sunny Cove */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ROCKETLAKE		0xA7	/* Cypress Cove */</div><div class='add'>+#define INTEL_ROCKETLAKE		IFM(6, 0xA7) /* Cypress Cove */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_TIGERLAKE_L		0x8C	/* Willow Cove */</div><div class='add'>+#define INTEL_TIGERLAKE_L		IFM(6, 0x8C) /* Willow Cove */</div><div class='ctx'> #define INTEL_FAM6_TIGERLAKE		0x8D	/* Willow Cove */</div><div class='add'>+#define INTEL_TIGERLAKE			IFM(6, 0x8D) /* Willow Cove */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F	/* Golden Cove */</div><div class='add'>+#define INTEL_SAPPHIRERAPIDS_X		IFM(6, 0x8F) /* Golden Cove */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_EMERALDRAPIDS_X	0xCF</div><div class='add'>+#define INTEL_EMERALDRAPIDS_X		IFM(6, 0xCF)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_GRANITERAPIDS_X	0xAD</div><div class='add'>+#define INTEL_GRANITERAPIDS_X		IFM(6, 0xAD)</div><div class='ctx'> #define INTEL_FAM6_GRANITERAPIDS_D	0xAE</div><div class='add'>+#define INTEL_GRANITERAPIDS_D		IFM(6, 0xAE)</div><div class='ctx'> </div><div class='ctx'> /* "Hybrid" Processors (P-Core/E-Core) */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_LAKEFIELD		0x8A	/* Sunny Cove / Tremont */</div><div class='add'>+#define INTEL_LAKEFIELD			IFM(6, 0x8A) /* Sunny Cove / Tremont */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */</div><div class='add'>+#define INTEL_ALDERLAKE			IFM(6, 0x97) /* Golden Cove / Gracemont */</div><div class='ctx'> #define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */</div><div class='add'>+#define INTEL_ALDERLAKE_L		IFM(6, 0x9A) /* Golden Cove / Gracemont */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_RAPTORLAKE		0xB7	/* Raptor Cove / Enhanced Gracemont */</div><div class='add'>+#define INTEL_RAPTORLAKE		IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */</div><div class='ctx'> #define INTEL_FAM6_RAPTORLAKE_P		0xBA</div><div class='add'>+#define INTEL_RAPTORLAKE_P		IFM(6, 0xBA)</div><div class='ctx'> #define INTEL_FAM6_RAPTORLAKE_S		0xBF</div><div class='add'>+#define INTEL_RAPTORLAKE_S		IFM(6, 0xBF)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_METEORLAKE		0xAC</div><div class='add'>+#define INTEL_METEORLAKE		IFM(6, 0xAC)</div><div class='ctx'> #define INTEL_FAM6_METEORLAKE_L		0xAA</div><div class='add'>+#define INTEL_METEORLAKE_L		IFM(6, 0xAA)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ARROWLAKE_H		0xC5</div><div class='add'>+#define INTEL_ARROWLAKE_H		IFM(6, 0xC5)</div><div class='ctx'> #define INTEL_FAM6_ARROWLAKE		0xC6</div><div class='add'>+#define INTEL_ARROWLAKE			IFM(6, 0xC6)</div><div class='ctx'> #define INTEL_FAM6_ARROWLAKE_U		0xB5</div><div class='add'>+#define INTEL_ARROWLAKE_U		IFM(6, 0xB5)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_LUNARLAKE_M		0xBD</div><div class='add'>+#define INTEL_LUNARLAKE_M		IFM(6, 0xBD)</div><div class='ctx'> </div><div class='ctx'> /* "Small Core" Processors (Atom/E-Core) */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */</div><div class='add'>+#define INTEL_ATOM_BONNELL		IFM(6, 0x1C) /* Diamondville, Pineview */</div><div class='ctx'> #define INTEL_FAM6_ATOM_BONNELL_MID	0x26 /* Silverthorne, Lincroft */</div><div class='add'>+#define INTEL_ATOM_BONNELL_MID		IFM(6, 0x26) /* Silverthorne, Lincroft */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_SALTWELL	0x36 /* Cedarview */</div><div class='add'>+#define INTEL_ATOM_SALTWELL		IFM(6, 0x36) /* Cedarview */</div><div class='ctx'> #define INTEL_FAM6_ATOM_SALTWELL_MID	0x27 /* Penwell */</div><div class='add'>+#define INTEL_ATOM_SALTWELL_MID		IFM(6, 0x27) /* Penwell */</div><div class='ctx'> #define INTEL_FAM6_ATOM_SALTWELL_TABLET	0x35 /* Cloverview */</div><div class='add'>+#define INTEL_ATOM_SALTWELL_TABLET	IFM(6, 0x35) /* Cloverview */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_SILVERMONT	0x37 /* Bay Trail, Valleyview */</div><div class='add'>+#define INTEL_ATOM_SILVERMONT		IFM(6, 0x37) /* Bay Trail, Valleyview */</div><div class='ctx'> #define INTEL_FAM6_ATOM_SILVERMONT_D	0x4D /* Avaton, Rangely */</div><div class='add'>+#define INTEL_ATOM_SILVERMONT_D		IFM(6, 0x4D) /* Avaton, Rangely */</div><div class='ctx'> #define INTEL_FAM6_ATOM_SILVERMONT_MID	0x4A /* Merriefield */</div><div class='add'>+#define INTEL_ATOM_SILVERMONT_MID	IFM(6, 0x4A) /* Merriefield */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */</div><div class='add'>+#define INTEL_ATOM_AIRMONT		IFM(6, 0x4C) /* Cherry Trail, Braswell */</div><div class='ctx'> #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */</div><div class='add'>+#define INTEL_ATOM_AIRMONT_MID		IFM(6, 0x5A) /* Moorefield */</div><div class='ctx'> #define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */</div><div class='add'>+#define INTEL_ATOM_AIRMONT_NP		IFM(6, 0x75) /* Lightning Mountain */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_GOLDMONT	0x5C /* Apollo Lake */</div><div class='add'>+#define INTEL_ATOM_GOLDMONT		IFM(6, 0x5C) /* Apollo Lake */</div><div class='ctx'> #define INTEL_FAM6_ATOM_GOLDMONT_D	0x5F /* Denverton */</div><div class='add'>+#define INTEL_ATOM_GOLDMONT_D		IFM(6, 0x5F) /* Denverton */</div><div class='ctx'> </div><div class='ctx'> /* Note: the micro-architecture is "Goldmont Plus" */</div><div class='ctx'> #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */</div><div class='add'>+#define INTEL_ATOM_GOLDMONT_PLUS	IFM(6, 0x7A) /* Gemini Lake */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_TREMONT_D	0x86 /* Jacobsville */</div><div class='add'>+#define INTEL_ATOM_TREMONT_D		IFM(6, 0x86) /* Jacobsville */</div><div class='ctx'> #define INTEL_FAM6_ATOM_TREMONT		0x96 /* Elkhart Lake */</div><div class='add'>+#define INTEL_ATOM_TREMONT		IFM(6, 0x96) /* Elkhart Lake */</div><div class='ctx'> #define INTEL_FAM6_ATOM_TREMONT_L	0x9C /* Jasper Lake */</div><div class='add'>+#define INTEL_ATOM_TREMONT_L		IFM(6, 0x9C) /* Jasper Lake */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_GRACEMONT	0xBE /* Alderlake N */</div><div class='add'>+#define INTEL_ATOM_GRACEMONT		IFM(6, 0xBE) /* Alderlake N */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_CRESTMONT_X	0xAF /* Sierra Forest */</div><div class='add'>+#define INTEL_ATOM_CRESTMONT_X		IFM(6, 0xAF) /* Sierra Forest */</div><div class='ctx'> #define INTEL_FAM6_ATOM_CRESTMONT	0xB6 /* Grand Ridge */</div><div class='add'>+#define INTEL_ATOM_CRESTMONT		IFM(6, 0xB6) /* Grand Ridge */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_ATOM_DARKMONT_X	0xDD /* Clearwater Forest */</div><div class='add'>+#define INTEL_ATOM_DARKMONT_X		IFM(6, 0xDD) /* Clearwater Forest */</div><div class='ctx'> </div><div class='ctx'> /* Xeon Phi */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_FAM6_XEON_PHI_KNL		0x57 /* Knights Landing */</div><div class='add'>+#define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */</div><div class='ctx'> #define INTEL_FAM6_XEON_PHI_KNM		0x85 /* Knights Mill */</div><div class='add'>+#define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */</div><div class='ctx'> </div><div class='ctx'> /* Family 5 */</div><div class='ctx'> #define INTEL_FAM5_QUARK_X1000		0x09 /* Quark X1000 SoC */</div><div class='add'>+#define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_INTEL_FAMILY_H */</div><div class='head'>diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h<br/>index 7a2ed154a5e1..5036f13ab69f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/irq_remapping.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/irq_remapping.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/irq_remapping.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/irq_remapping.h</a></div><div class='hunk'>@@ -50,6 +50,13 @@ static inline struct irq_domain *arch_get_ir_parent_domain(void)</div><div class='ctx'> 	return x86_vector_domain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern bool enable_posted_msi;</div><div class='add'>+</div><div class='add'>+static inline bool posted_msi_supported(void)</div><div class='add'>+{</div><div class='add'>+	return enable_posted_msi &amp;&amp; irq_remapping_cap(IRQ_POSTING_CAP);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #else  /* CONFIG_IRQ_REMAP */</div><div class='ctx'> </div><div class='ctx'> static inline bool irq_remapping_cap(enum irq_remap_cap cap) { return 0; }</div><div class='head'>diff --git a/arch/x86/include/asm/irq_stack.h b/arch/x86/include/asm/irq_stack.h<br/>index 798183867d78..b71ad173f877 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/irq_stack.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/irq_stack.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/irq_stack.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/irq_stack.h</a></div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define ASM_CALL_ARG0							\</div><div class='del'>-	"call %P[__func]				\n"		\</div><div class='add'>+	"call %c[__func]				\n"		\</div><div class='ctx'> 	ASM_REACHABLE</div><div class='ctx'> </div><div class='ctx'> #define ASM_CALL_ARG1							\</div><div class='head'>diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h<br/>index d18bfb238f66..13aea8fc3d45 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/irq_vectors.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/irq_vectors.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/irq_vectors.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/irq_vectors.h</a></div><div class='hunk'>@@ -97,10 +97,16 @@</div><div class='ctx'> </div><div class='ctx'> #define LOCAL_TIMER_VECTOR		0xec</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Posted interrupt notification vector for all device MSIs delivered to</div><div class='add'>+ * the host kernel.</div><div class='add'>+ */</div><div class='add'>+#define POSTED_MSI_NOTIFICATION_VECTOR	0xeb</div><div class='add'>+</div><div class='ctx'> #define NR_VECTORS			 256</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_LOCAL_APIC</div><div class='del'>-#define FIRST_SYSTEM_VECTOR		LOCAL_TIMER_VECTOR</div><div class='add'>+#define FIRST_SYSTEM_VECTOR		POSTED_MSI_NOTIFICATION_VECTOR</div><div class='ctx'> #else</div><div class='ctx'> #define FIRST_SYSTEM_VECTOR		NR_VECTORS</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h<br/>index de3118305838..dfd2e9699bd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mce.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/mce.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mce.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/mce.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #define MCG_CTL_P		BIT_ULL(8)   /* MCG_CTL register available */</div><div class='ctx'> #define MCG_EXT_P		BIT_ULL(9)   /* Extended registers available */</div><div class='ctx'> #define MCG_CMCI_P		BIT_ULL(10)  /* CMCI supported */</div><div class='add'>+#define MCG_SEAM_NR		BIT_ULL(12)  /* MCG_STATUS_SEAM_NR supported */</div><div class='ctx'> #define MCG_EXT_CNT_MASK	0xff0000     /* Number of Extended registers */</div><div class='ctx'> #define MCG_EXT_CNT_SHIFT	16</div><div class='ctx'> #define MCG_EXT_CNT(c)		(((c) &amp; MCG_EXT_CNT_MASK) &gt;&gt; MCG_EXT_CNT_SHIFT)</div><div class='hunk'>@@ -25,6 +26,7 @@</div><div class='ctx'> #define MCG_STATUS_EIPV		BIT_ULL(1)   /* ip points to correct instruction */</div><div class='ctx'> #define MCG_STATUS_MCIP		BIT_ULL(2)   /* machine check in progress */</div><div class='ctx'> #define MCG_STATUS_LMCES	BIT_ULL(3)   /* LMCE signaled */</div><div class='add'>+#define MCG_STATUS_SEAM_NR	BIT_ULL(12)  /* Machine check inside SEAM non-root mode */</div><div class='ctx'> </div><div class='ctx'> /* MCG_EXT_CTL register defines */</div><div class='ctx'> #define MCG_EXT_CTL_LMCE_EN	BIT_ULL(0) /* Enable LMCE */</div><div class='head'>diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h<br/>index c72c7ff78fcd..d593e52e6635 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mpspec.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/mpspec.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mpspec.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/mpspec.h</a></div><div class='hunk'>@@ -16,10 +16,10 @@ extern int pic_mode;</div><div class='ctx'>  * Summit or generic (i.e. installer) kernels need lots of bus entries.</div><div class='ctx'>  * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.</div><div class='ctx'>  */</div><div class='del'>-#if CONFIG_BASE_SMALL == 0</div><div class='del'>-# define MAX_MP_BUSSES		260</div><div class='del'>-#else</div><div class='add'>+#ifdef CONFIG_BASE_SMALL</div><div class='ctx'> # define MAX_MP_BUSSES		32</div><div class='add'>+#else</div><div class='add'>+# define MAX_MP_BUSSES		260</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define MAX_IRQ_SOURCES		256</div><div class='head'>diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h<br/>index e72c2b872957..e022e6eb766c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/msr-index.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/msr-index.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/msr-index.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/msr-index.h</a></div><div class='hunk'>@@ -170,6 +170,10 @@</div><div class='ctx'> 						 * CPU is not affected by Branch</div><div class='ctx'> 						 * History Injection.</div><div class='ctx'> 						 */</div><div class='add'>+#define ARCH_CAP_XAPIC_DISABLE		BIT(21)	/*</div><div class='add'>+						 * IA32_XAPIC_DISABLE_STATUS MSR</div><div class='add'>+						 * supported</div><div class='add'>+						 */</div><div class='ctx'> #define ARCH_CAP_PBRSB_NO		BIT(24)	/*</div><div class='ctx'> 						 * Not susceptible to Post-Barrier</div><div class='ctx'> 						 * Return Stack Buffer Predictions.</div><div class='hunk'>@@ -192,11 +196,6 @@</div><div class='ctx'> 						 * File.</div><div class='ctx'> 						 */</div><div class='ctx'> </div><div class='del'>-#define ARCH_CAP_XAPIC_DISABLE		BIT(21)	/*</div><div class='del'>-						 * IA32_XAPIC_DISABLE_STATUS MSR</div><div class='del'>-						 * supported</div><div class='del'>-						 */</div><div class='del'>-</div><div class='ctx'> #define MSR_IA32_FLUSH_CMD		0x0000010b</div><div class='ctx'> #define L1D_FLUSH			BIT(0)	/*</div><div class='ctx'> 						 * Writeback and invalidate the</div><div class='head'>diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h<br/>index 9da9c8a2f1df..52f1b4ff0cc1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/page_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/page_types.h</a></div><div class='hunk'>@@ -31,10 +31,12 @@</div><div class='ctx'> </div><div class='ctx'> #define VM_DATA_DEFAULT_FLAGS	VM_DATA_FLAGS_TSK_EXEC</div><div class='ctx'> </div><div class='del'>-#define __PHYSICAL_START	ALIGN(CONFIG_PHYSICAL_START, \</div><div class='del'>-				      CONFIG_PHYSICAL_ALIGN)</div><div class='add'>+/* Physical address where kernel should be loaded. */</div><div class='add'>+#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \</div><div class='add'>+				+ (CONFIG_PHYSICAL_ALIGN - 1)) \</div><div class='add'>+				&amp; ~(CONFIG_PHYSICAL_ALIGN - 1))</div><div class='ctx'> </div><div class='del'>-#define __START_KERNEL		(__START_KERNEL_map + __PHYSICAL_START)</div><div class='add'>+#define __START_KERNEL		(__START_KERNEL_map + LOAD_PHYSICAL_ADDR)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> #include &lt;asm/page_64_types.h&gt;</div><div class='head'>diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h<br/>index 44958ebaf626..3bedee1801e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/percpu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/percpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/percpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/percpu.h</a></div><div class='hunk'>@@ -59,36 +59,24 @@</div><div class='ctx'> #define __force_percpu_prefix	"%%"__stringify(__percpu_seg)":"</div><div class='ctx'> #define __my_cpu_offset		this_cpu_read(this_cpu_off)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_USE_X86_SEG_SUPPORT</div><div class='del'>-/*</div><div class='del'>- * Efficient implementation for cases in which the compiler supports</div><div class='del'>- * named address spaces.  Allows the compiler to perform additional</div><div class='del'>- * optimizations that can save more instructions.</div><div class='del'>- */</div><div class='del'>-#define arch_raw_cpu_ptr(ptr)					\</div><div class='del'>-({								\</div><div class='del'>-	unsigned long tcp_ptr__;				\</div><div class='del'>-	tcp_ptr__ = __raw_cpu_read(, this_cpu_off);		\</div><div class='del'>-								\</div><div class='del'>-	tcp_ptr__ += (unsigned long)(ptr);			\</div><div class='del'>-	(typeof(*(ptr)) __kernel __force *)tcp_ptr__;		\</div><div class='del'>-})</div><div class='del'>-#else /* CONFIG_USE_X86_SEG_SUPPORT */</div><div class='ctx'> /*</div><div class='ctx'>  * Compared to the generic __my_cpu_offset version, the following</div><div class='ctx'>  * saves one instruction and avoids clobbering a temp register.</div><div class='add'>+ *</div><div class='add'>+ * arch_raw_cpu_ptr should not be used in 32-bit VDSO for a 64-bit</div><div class='add'>+ * kernel, because games are played with CONFIG_X86_64 there and</div><div class='add'>+ * sizeof(this_cpu_off) becames 4.</div><div class='ctx'>  */</div><div class='del'>-#define arch_raw_cpu_ptr(ptr)					\</div><div class='add'>+#ifndef BUILD_VDSO32_64</div><div class='add'>+#define arch_raw_cpu_ptr(_ptr)					\</div><div class='ctx'> ({								\</div><div class='del'>-	unsigned long tcp_ptr__;				\</div><div class='del'>-	asm ("mov " __percpu_arg(1) ", %0"			\</div><div class='del'>-	     : "=r" (tcp_ptr__)					\</div><div class='del'>-	     : "m" (__my_cpu_var(this_cpu_off)));		\</div><div class='del'>-								\</div><div class='del'>-	tcp_ptr__ += (unsigned long)(ptr);			\</div><div class='del'>-	(typeof(*(ptr)) __kernel __force *)tcp_ptr__;		\</div><div class='add'>+	unsigned long tcp_ptr__ = raw_cpu_read_long(this_cpu_off); \</div><div class='add'>+	tcp_ptr__ += (__force unsigned long)(_ptr);		\</div><div class='add'>+	(typeof(*(_ptr)) __kernel __force *)tcp_ptr__;		\</div><div class='ctx'> })</div><div class='del'>-#endif /* CONFIG_USE_X86_SEG_SUPPORT */</div><div class='add'>+#else</div><div class='add'>+#define arch_raw_cpu_ptr(_ptr) ({ BUILD_BUG(); (typeof(_ptr))0; })</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #define PER_CPU_VAR(var)	%__percpu_seg:(var)__percpu_rel</div><div class='ctx'> </div><div class='hunk'>@@ -102,8 +90,8 @@</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> #define __my_cpu_type(var)	typeof(var) __percpu_seg_override</div><div class='del'>-#define __my_cpu_ptr(ptr)	(__my_cpu_type(*ptr) *)(uintptr_t)(ptr)</div><div class='del'>-#define __my_cpu_var(var)	(*__my_cpu_ptr(&amp;var))</div><div class='add'>+#define __my_cpu_ptr(ptr)	(__my_cpu_type(*(ptr))*)(__force uintptr_t)(ptr)</div><div class='add'>+#define __my_cpu_var(var)	(*__my_cpu_ptr(&amp;(var)))</div><div class='ctx'> #define __percpu_arg(x)		__percpu_prefix "%" #x</div><div class='ctx'> #define __force_percpu_arg(x)	__force_percpu_prefix "%" #x</div><div class='ctx'> </div><div class='hunk'>@@ -230,25 +218,26 @@ do {									\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * xchg is implemented using cmpxchg without a lock prefix. xchg is</div><div class='del'>- * expensive due to the implied lock prefix.  The processor cannot prefetch</div><div class='del'>- * cachelines if xchg is used.</div><div class='add'>+ * raw_cpu_xchg() can use a load-store since</div><div class='add'>+ * it is not required to be IRQ-safe.</div><div class='ctx'>  */</div><div class='del'>-#define percpu_xchg_op(size, qual, _var, _nval)				\</div><div class='add'>+#define raw_percpu_xchg_op(_var, _nval)					\</div><div class='ctx'> ({									\</div><div class='del'>-	__pcpu_type_##size pxo_old__;					\</div><div class='del'>-	__pcpu_type_##size pxo_new__ = __pcpu_cast_##size(_nval);	\</div><div class='del'>-	asm qual (__pcpu_op2_##size("mov", __percpu_arg([var]),		\</div><div class='del'>-				    "%[oval]")				\</div><div class='del'>-		  "\n1:\t"						\</div><div class='del'>-		  __pcpu_op2_##size("cmpxchg", "%[nval]",		\</div><div class='del'>-				    __percpu_arg([var]))		\</div><div class='del'>-		  "\n\tjnz 1b"						\</div><div class='del'>-		  : [oval] "=&amp;a" (pxo_old__),				\</div><div class='del'>-		    [var] "+m" (__my_cpu_var(_var))			\</div><div class='del'>-		  : [nval] __pcpu_reg_##size(, pxo_new__)		\</div><div class='del'>-		  : "memory");						\</div><div class='del'>-	(typeof(_var))(unsigned long) pxo_old__;			\</div><div class='add'>+	typeof(_var) pxo_old__ = raw_cpu_read(_var);			\</div><div class='add'>+	raw_cpu_write(_var, _nval);					\</div><div class='add'>+	pxo_old__;							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * this_cpu_xchg() is implemented using cmpxchg without a lock prefix.</div><div class='add'>+ * xchg is expensive due to the implied lock prefix. The processor</div><div class='add'>+ * cannot prefetch cachelines if xchg is used.</div><div class='add'>+ */</div><div class='add'>+#define this_percpu_xchg_op(_var, _nval)				\</div><div class='add'>+({									\</div><div class='add'>+	typeof(_var) pxo_old__ = this_cpu_read(_var);			\</div><div class='add'>+	do { } while (!this_cpu_try_cmpxchg(_var, &amp;pxo_old__, _nval));	\</div><div class='add'>+	pxo_old__;							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -428,10 +417,6 @@ do {									\</div><div class='ctx'>  * actually per-thread variables implemented as per-CPU variables and</div><div class='ctx'>  * thus stable for the duration of the respective task.</div><div class='ctx'>  */</div><div class='del'>-#define this_cpu_read_stable_1(pcp)	percpu_stable_op(1, "mov", pcp)</div><div class='del'>-#define this_cpu_read_stable_2(pcp)	percpu_stable_op(2, "mov", pcp)</div><div class='del'>-#define this_cpu_read_stable_4(pcp)	percpu_stable_op(4, "mov", pcp)</div><div class='del'>-#define this_cpu_read_stable_8(pcp)	percpu_stable_op(8, "mov", pcp)</div><div class='ctx'> #define this_cpu_read_stable(pcp)	__pcpu_size_call_return(this_cpu_read_stable_, pcp)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_USE_X86_SEG_SUPPORT</div><div class='hunk'>@@ -500,6 +485,10 @@ do {									\</div><div class='ctx'> #define this_cpu_read_const(pcp)	({ BUILD_BUG(); (typeof(pcp))0; })</div><div class='ctx'> #endif /* CONFIG_USE_X86_SEG_SUPPORT */</div><div class='ctx'> </div><div class='add'>+#define this_cpu_read_stable_1(pcp)	percpu_stable_op(1, "mov", pcp)</div><div class='add'>+#define this_cpu_read_stable_2(pcp)	percpu_stable_op(2, "mov", pcp)</div><div class='add'>+#define this_cpu_read_stable_4(pcp)	percpu_stable_op(4, "mov", pcp)</div><div class='add'>+</div><div class='ctx'> #define raw_cpu_add_1(pcp, val)		percpu_add_op(1, , (pcp), val)</div><div class='ctx'> #define raw_cpu_add_2(pcp, val)		percpu_add_op(2, , (pcp), val)</div><div class='ctx'> #define raw_cpu_add_4(pcp, val)		percpu_add_op(4, , (pcp), val)</div><div class='hunk'>@@ -509,18 +498,6 @@ do {									\</div><div class='ctx'> #define raw_cpu_or_1(pcp, val)		percpu_to_op(1, , "or", (pcp), val)</div><div class='ctx'> #define raw_cpu_or_2(pcp, val)		percpu_to_op(2, , "or", (pcp), val)</div><div class='ctx'> #define raw_cpu_or_4(pcp, val)		percpu_to_op(4, , "or", (pcp), val)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * raw_cpu_xchg() can use a load-store since it is not required to be</div><div class='del'>- * IRQ-safe.</div><div class='del'>- */</div><div class='del'>-#define raw_percpu_xchg_op(var, nval)					\</div><div class='del'>-({									\</div><div class='del'>-	typeof(var) pxo_ret__ = raw_cpu_read(var);			\</div><div class='del'>-	raw_cpu_write(var, (nval));					\</div><div class='del'>-	pxo_ret__;							\</div><div class='del'>-})</div><div class='del'>-</div><div class='ctx'> #define raw_cpu_xchg_1(pcp, val)	raw_percpu_xchg_op(pcp, val)</div><div class='ctx'> #define raw_cpu_xchg_2(pcp, val)	raw_percpu_xchg_op(pcp, val)</div><div class='ctx'> #define raw_cpu_xchg_4(pcp, val)	raw_percpu_xchg_op(pcp, val)</div><div class='hunk'>@@ -534,9 +511,9 @@ do {									\</div><div class='ctx'> #define this_cpu_or_1(pcp, val)		percpu_to_op(1, volatile, "or", (pcp), val)</div><div class='ctx'> #define this_cpu_or_2(pcp, val)		percpu_to_op(2, volatile, "or", (pcp), val)</div><div class='ctx'> #define this_cpu_or_4(pcp, val)		percpu_to_op(4, volatile, "or", (pcp), val)</div><div class='del'>-#define this_cpu_xchg_1(pcp, nval)	percpu_xchg_op(1, volatile, pcp, nval)</div><div class='del'>-#define this_cpu_xchg_2(pcp, nval)	percpu_xchg_op(2, volatile, pcp, nval)</div><div class='del'>-#define this_cpu_xchg_4(pcp, nval)	percpu_xchg_op(4, volatile, pcp, nval)</div><div class='add'>+#define this_cpu_xchg_1(pcp, nval)	this_percpu_xchg_op(pcp, nval)</div><div class='add'>+#define this_cpu_xchg_2(pcp, nval)	this_percpu_xchg_op(pcp, nval)</div><div class='add'>+#define this_cpu_xchg_4(pcp, nval)	this_percpu_xchg_op(pcp, nval)</div><div class='ctx'> </div><div class='ctx'> #define raw_cpu_add_return_1(pcp, val)		percpu_add_return_op(1, , pcp, val)</div><div class='ctx'> #define raw_cpu_add_return_2(pcp, val)		percpu_add_return_op(2, , pcp, val)</div><div class='hunk'>@@ -563,6 +540,8 @@ do {									\</div><div class='ctx'>  * 32 bit must fall back to generic operations.</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='add'>+#define this_cpu_read_stable_8(pcp)	percpu_stable_op(8, "mov", pcp)</div><div class='add'>+</div><div class='ctx'> #define raw_cpu_add_8(pcp, val)			percpu_add_op(8, , (pcp), val)</div><div class='ctx'> #define raw_cpu_and_8(pcp, val)			percpu_to_op(8, , "and", (pcp), val)</div><div class='ctx'> #define raw_cpu_or_8(pcp, val)			percpu_to_op(8, , "or", (pcp), val)</div><div class='hunk'>@@ -575,41 +554,41 @@ do {									\</div><div class='ctx'> #define this_cpu_and_8(pcp, val)		percpu_to_op(8, volatile, "and", (pcp), val)</div><div class='ctx'> #define this_cpu_or_8(pcp, val)			percpu_to_op(8, volatile, "or", (pcp), val)</div><div class='ctx'> #define this_cpu_add_return_8(pcp, val)		percpu_add_return_op(8, volatile, pcp, val)</div><div class='del'>-#define this_cpu_xchg_8(pcp, nval)		percpu_xchg_op(8, volatile, pcp, nval)</div><div class='add'>+#define this_cpu_xchg_8(pcp, nval)		this_percpu_xchg_op(pcp, nval)</div><div class='ctx'> #define this_cpu_cmpxchg_8(pcp, oval, nval)	percpu_cmpxchg_op(8, volatile, pcp, oval, nval)</div><div class='ctx'> #define this_cpu_try_cmpxchg_8(pcp, ovalp, nval)	percpu_try_cmpxchg_op(8, volatile, pcp, ovalp, nval)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static __always_inline bool x86_this_cpu_constant_test_bit(unsigned int nr,</div><div class='del'>-                        const unsigned long __percpu *addr)</div><div class='del'>-{</div><div class='del'>-	unsigned long __percpu *a =</div><div class='del'>-		(unsigned long __percpu *)addr + nr / BITS_PER_LONG;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-	return ((1UL &lt;&lt; (nr % BITS_PER_LONG)) &amp; raw_cpu_read_8(*a)) != 0;</div><div class='add'>+#define raw_cpu_read_long(pcp)		raw_cpu_read_8(pcp)</div><div class='ctx'> #else</div><div class='del'>-	return ((1UL &lt;&lt; (nr % BITS_PER_LONG)) &amp; raw_cpu_read_4(*a)) != 0;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='add'>+/* There is no generic 64 bit read stable operation for 32 bit targets. */</div><div class='add'>+#define this_cpu_read_stable_8(pcp)	({ BUILD_BUG(); (typeof(pcp))0; })</div><div class='ctx'> </div><div class='del'>-static inline bool x86_this_cpu_variable_test_bit(int nr,</div><div class='del'>-                        const unsigned long __percpu *addr)</div><div class='del'>-{</div><div class='del'>-	bool oldbit;</div><div class='add'>+#define raw_cpu_read_long(pcp)		raw_cpu_read_4(pcp)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	asm volatile("btl "__percpu_arg(2)",%1"</div><div class='del'>-			CC_SET(c)</div><div class='del'>-			: CC_OUT(c) (oldbit)</div><div class='del'>-			: "m" (*__my_cpu_ptr((unsigned long __percpu *)(addr))), "Ir" (nr));</div><div class='add'>+#define x86_this_cpu_constant_test_bit(_nr, _var)			\</div><div class='add'>+({									\</div><div class='add'>+	unsigned long __percpu *addr__ =				\</div><div class='add'>+		(unsigned long __percpu *)&amp;(_var) + ((_nr) / BITS_PER_LONG); \</div><div class='add'>+	!!((1UL &lt;&lt; ((_nr) % BITS_PER_LONG)) &amp; raw_cpu_read(*addr__));	\</div><div class='add'>+})</div><div class='ctx'> </div><div class='del'>-	return oldbit;</div><div class='del'>-}</div><div class='add'>+#define x86_this_cpu_variable_test_bit(_nr, _var)		\</div><div class='add'>+({								\</div><div class='add'>+	bool oldbit;						\</div><div class='add'>+								\</div><div class='add'>+	asm volatile("btl %[nr], " __percpu_arg([var])		\</div><div class='add'>+		     CC_SET(c)					\</div><div class='add'>+		     : CC_OUT(c) (oldbit)			\</div><div class='add'>+		     : [var] "m" (__my_cpu_var(_var)),		\</div><div class='add'>+		       [nr] "rI" (_nr));			\</div><div class='add'>+	oldbit;							\</div><div class='add'>+})</div><div class='ctx'> </div><div class='del'>-#define x86_this_cpu_test_bit(nr, addr)			\</div><div class='del'>-	(__builtin_constant_p((nr))			\</div><div class='del'>-	 ? x86_this_cpu_constant_test_bit((nr), (addr))	\</div><div class='del'>-	 : x86_this_cpu_variable_test_bit((nr), (addr)))</div><div class='add'>+#define x86_this_cpu_test_bit(_nr, _var)			\</div><div class='add'>+	(__builtin_constant_p(_nr)				\</div><div class='add'>+	 ? x86_this_cpu_constant_test_bit(_nr, _var)		\</div><div class='add'>+	 : x86_this_cpu_variable_test_bit(_nr, _var))</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/percpu.h&gt;</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h<br/>index 0b748ee16b3d..b78644962626 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/pgtable_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/pgtable_types.h</a></div><div class='hunk'>@@ -148,7 +148,7 @@</div><div class='ctx'> #define _COMMON_PAGE_CHG_MASK	(PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |	\</div><div class='ctx'> 				 _PAGE_SPECIAL | _PAGE_ACCESSED |	\</div><div class='ctx'> 				 _PAGE_DIRTY_BITS | _PAGE_SOFT_DIRTY |	\</div><div class='del'>-				 _PAGE_DEVMAP | _PAGE_ENC | _PAGE_UFFD_WP)</div><div class='add'>+				 _PAGE_DEVMAP | _PAGE_CC | _PAGE_UFFD_WP)</div><div class='ctx'> #define _PAGE_CHG_MASK	(_COMMON_PAGE_CHG_MASK | _PAGE_PAT)</div><div class='ctx'> #define _HPAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_PAT_LARGE)</div><div class='ctx'> </div><div class='hunk'>@@ -173,6 +173,7 @@ enum page_cache_mode {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define _PAGE_CC		(_AT(pteval_t, cc_mask))</div><div class='ctx'> #define _PAGE_ENC		(_AT(pteval_t, sme_me_mask))</div><div class='ctx'> </div><div class='ctx'> #define _PAGE_CACHE_MASK	(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)</div><div class='hunk'>@@ -566,6 +567,8 @@ static inline void update_page_count(int level, unsigned long pages) { }</div><div class='ctx'> extern pte_t *lookup_address(unsigned long address, unsigned int *level);</div><div class='ctx'> extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,</div><div class='ctx'> 				    unsigned int *level);</div><div class='add'>+pte_t *lookup_address_in_pgd_attr(pgd_t *pgd, unsigned long address,</div><div class='add'>+				  unsigned int *level, bool *nx, bool *rw);</div><div class='ctx'> extern pmd_t *lookup_pmd_address(unsigned long address);</div><div class='ctx'> extern phys_addr_t slow_virt_to_phys(void *__address);</div><div class='ctx'> extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn,</div><div class='head'>diff --git a/arch/x86/include/asm/posted_intr.h b/arch/x86/include/asm/posted_intr.h<br/>new file mode 100644<br/>index 000000000000..de788b400fba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/posted_intr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/posted_intr.h</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _X86_POSTED_INTR_H</div><div class='add'>+#define _X86_POSTED_INTR_H</div><div class='add'>+#include &lt;asm/irq_vectors.h&gt;</div><div class='add'>+</div><div class='add'>+#define POSTED_INTR_ON  0</div><div class='add'>+#define POSTED_INTR_SN  1</div><div class='add'>+</div><div class='add'>+#define PID_TABLE_ENTRY_VALID 1</div><div class='add'>+</div><div class='add'>+/* Posted-Interrupt Descriptor */</div><div class='add'>+struct pi_desc {</div><div class='add'>+	union {</div><div class='add'>+		u32 pir[8];     /* Posted interrupt requested */</div><div class='add'>+		u64 pir64[4];</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u16	notifications; /* Suppress and outstanding bits */</div><div class='add'>+			u8	nv;</div><div class='add'>+			u8	rsvd_2;</div><div class='add'>+			u32	ndst;</div><div class='add'>+		};</div><div class='add'>+		u64 control;</div><div class='add'>+	};</div><div class='add'>+	u32 rsvd[6];</div><div class='add'>+} __aligned(64);</div><div class='add'>+</div><div class='add'>+static inline bool pi_test_and_set_on(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_and_set_bit(POSTED_INTR_ON, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_and_clear_bit(POSTED_INTR_ON, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pi_test_and_clear_sn(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_and_clear_bit(POSTED_INTR_SN, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pi_test_and_set_pir(int vector, struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_and_set_bit(vector, (unsigned long *)pi_desc-&gt;pir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pi_is_pir_empty(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return bitmap_empty((unsigned long *)pi_desc-&gt;pir, NR_VECTORS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pi_set_sn(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	set_bit(POSTED_INTR_SN, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pi_set_on(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	set_bit(POSTED_INTR_ON, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pi_clear_on(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	clear_bit(POSTED_INTR_ON, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pi_clear_sn(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	clear_bit(POSTED_INTR_SN, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pi_test_on(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_bit(POSTED_INTR_ON, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool pi_test_sn(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_bit(POSTED_INTR_SN, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Non-atomic helpers */</div><div class='add'>+static inline void __pi_set_sn(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	pi_desc-&gt;notifications |= BIT(POSTED_INTR_SN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __pi_clear_sn(struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	pi_desc-&gt;notifications &amp;= ~BIT(POSTED_INTR_SN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+/*</div><div class='add'>+ * Not all external vectors are subject to interrupt remapping, e.g. IOMMU's</div><div class='add'>+ * own interrupts. Here we do not distinguish them since those vector bits in</div><div class='add'>+ * PIR will always be zero.</div><div class='add'>+ */</div><div class='add'>+static inline bool pi_pending_this_cpu(unsigned int vector)</div><div class='add'>+{</div><div class='add'>+	struct pi_desc *pid = this_cpu_ptr(&amp;posted_msi_pi_desc);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(vector &gt; NR_VECTORS || vector &lt; FIRST_EXTERNAL_VECTOR))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return test_bit(vector, (unsigned long *)pid-&gt;pir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern void intel_posted_msi_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline bool pi_pending_this_cpu(unsigned int vector) { return false; }</div><div class='add'>+</div><div class='add'>+static inline void intel_posted_msi_init(void) {};</div><div class='add'>+#endif /* X86_POSTED_MSI */</div><div class='add'>+</div><div class='add'>+#endif /* _X86_POSTED_INTR_H */</div><div class='head'>diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h<br/>index 811548f131f4..cb4f6c513c48 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/processor.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/processor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/processor.h</a></div><div class='hunk'>@@ -108,9 +108,23 @@ struct cpuinfo_topology {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cpuinfo_x86 {</div><div class='del'>-	__u8			x86;		/* CPU family */</div><div class='del'>-	__u8			x86_vendor;	/* CPU vendor */</div><div class='del'>-	__u8			x86_model;</div><div class='add'>+	union {</div><div class='add'>+		/*</div><div class='add'>+		 * The particular ordering (low-to-high) of (vendor,</div><div class='add'>+		 * family, model) is done in case range of models, like</div><div class='add'>+		 * it is usually done on AMD, need to be compared.</div><div class='add'>+		 */</div><div class='add'>+		struct {</div><div class='add'>+			__u8	x86_model;</div><div class='add'>+			/* CPU family */</div><div class='add'>+			__u8	x86;</div><div class='add'>+			/* CPU vendor */</div><div class='add'>+			__u8	x86_vendor;</div><div class='add'>+			__u8	x86_reserved;</div><div class='add'>+		};</div><div class='add'>+		/* combined vendor, family, model */</div><div class='add'>+		__u32		x86_vfm;</div><div class='add'>+	};</div><div class='ctx'> 	__u8			x86_stepping;</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	/* Number of 4K pages in DTLB/ITLB combined(in pages): */</div><div class='hunk'>@@ -472,7 +486,6 @@ struct thread_struct {</div><div class='ctx'> 	unsigned long		iopl_emul;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		iopl_warn:1;</div><div class='del'>-	unsigned int		sig_on_uaccess_err:1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Protection Keys Register for Userspace.  Loaded immediately on</div><div class='hunk'>@@ -587,7 +600,7 @@ extern char			ignore_fpu_irq;</div><div class='ctx'> # define BASE_PREFETCH		""</div><div class='ctx'> # define ARCH_HAS_PREFETCH</div><div class='ctx'> #else</div><div class='del'>-# define BASE_PREFETCH		"prefetcht0 %P1"</div><div class='add'>+# define BASE_PREFETCH		"prefetcht0 %1"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -598,7 +611,7 @@ extern char			ignore_fpu_irq;</div><div class='ctx'>  */</div><div class='ctx'> static inline void prefetch(const void *x)</div><div class='ctx'> {</div><div class='del'>-	alternative_input(BASE_PREFETCH, "prefetchnta %P1",</div><div class='add'>+	alternative_input(BASE_PREFETCH, "prefetchnta %1",</div><div class='ctx'> 			  X86_FEATURE_XMM,</div><div class='ctx'> 			  "m" (*(const char *)x));</div><div class='ctx'> }</div><div class='hunk'>@@ -610,7 +623,7 @@ static inline void prefetch(const void *x)</div><div class='ctx'>  */</div><div class='ctx'> static __always_inline void prefetchw(const void *x)</div><div class='ctx'> {</div><div class='del'>-	alternative_input(BASE_PREFETCH, "prefetchw %P1",</div><div class='add'>+	alternative_input(BASE_PREFETCH, "prefetchw %1",</div><div class='ctx'> 			  X86_FEATURE_3DNOWPREFETCH,</div><div class='ctx'> 			  "m" (*(const char *)x));</div><div class='ctx'> }</div><div class='hunk'>@@ -636,12 +649,10 @@ static __always_inline void prefetchw(const void *x)</div><div class='ctx'> #define KSTK_ESP(task)		(task_pt_regs(task)-&gt;sp)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='del'>-extern unsigned long __end_init_task[];</div><div class='add'>+extern unsigned long __top_init_kernel_stack[];</div><div class='ctx'> </div><div class='ctx'> #define INIT_THREAD {							\</div><div class='del'>-	.sp	= (unsigned long)&amp;__end_init_task -			\</div><div class='del'>-		  TOP_OF_KERNEL_STACK_PADDING -				\</div><div class='del'>-		  sizeof(struct pt_regs),				\</div><div class='add'>+	.sp	= (unsigned long)&amp;__top_init_kernel_stack,		\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern unsigned long KSTK_ESP(struct task_struct *task);</div><div class='head'>diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h<br/>index 043758a2e627..365798cb4408 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/prom.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/prom.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/prom.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/prom.h</a></div><div class='hunk'>@@ -23,19 +23,14 @@ extern int of_ioapic;</div><div class='ctx'> extern u64 initial_dtb;</div><div class='ctx'> extern void add_dtb(u64 data);</div><div class='ctx'> void x86_of_pci_init(void);</div><div class='del'>-void x86_dtb_parse_smp_config(void);</div><div class='add'>+void x86_flattree_get_config(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void add_dtb(u64 data) { }</div><div class='ctx'> static inline void x86_of_pci_init(void) { }</div><div class='del'>-static inline void x86_dtb_parse_smp_config(void) { }</div><div class='add'>+static inline void x86_flattree_get_config(void) { }</div><div class='ctx'> #define of_ioapic 0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF_EARLY_FLATTREE</div><div class='del'>-void x86_flattree_get_config(void);</div><div class='del'>-#else</div><div class='del'>-static inline void x86_flattree_get_config(void) { }</div><div class='del'>-#endif</div><div class='ctx'> extern char cmd_line[COMMAND_LINE_SIZE];</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='head'>diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinlock.h<br/>index cde8357bb226..a053c1293975 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/qspinlock.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/qspinlock.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/qspinlock.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/qspinlock.h</a></div><div class='hunk'>@@ -85,6 +85,8 @@ DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key);</div><div class='ctx'> #define virt_spin_lock virt_spin_lock</div><div class='ctx'> static inline bool virt_spin_lock(struct qspinlock *lock)</div><div class='ctx'> {</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='ctx'> 	if (!static_branch_likely(&amp;virt_spin_lock_key))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -94,10 +96,13 @@ static inline bool virt_spin_lock(struct qspinlock *lock)</div><div class='ctx'> 	 * horrible lock 'holder' preemption issues.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		while (atomic_read(&amp;lock-&gt;val) != 0)</div><div class='del'>-			cpu_relax();</div><div class='del'>-	} while (atomic_cmpxchg(&amp;lock-&gt;val, 0, _Q_LOCKED_VAL) != 0);</div><div class='add'>+ __retry:</div><div class='add'>+	val = atomic_read(&amp;lock-&gt;val);</div><div class='add'>+</div><div class='add'>+	if (val || !atomic_try_cmpxchg(&amp;lock-&gt;val, &amp;val, _Q_LOCKED_VAL)) {</div><div class='add'>+		cpu_relax();</div><div class='add'>+		goto __retry;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/qspinlock_paravirt.h b/arch/x86/include/asm/qspinlock_paravirt.h<br/>index ef9697f20129..0a985784be9b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/qspinlock_paravirt.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/qspinlock_paravirt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/qspinlock_paravirt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/qspinlock_paravirt.h</a></div><div class='hunk'>@@ -25,9 +25,9 @@ __PV_CALLEE_SAVE_REGS_THUNK(__pv_queued_spin_unlock_slowpath, ".spinlock.text");</div><div class='ctx'>  *</div><div class='ctx'>  * void __lockfunc __pv_queued_spin_unlock(struct qspinlock *lock)</div><div class='ctx'>  * {</div><div class='del'>- *	u8 lockval = cmpxchg(&amp;lock-&gt;locked, _Q_LOCKED_VAL, 0);</div><div class='add'>+ *	u8 lockval = _Q_LOCKED_VAL;</div><div class='ctx'>  *</div><div class='del'>- *	if (likely(lockval == _Q_LOCKED_VAL))</div><div class='add'>+ *	if (try_cmpxchg(&amp;lock-&gt;locked, &amp;lockval, 0))</div><div class='ctx'>  *		return;</div><div class='ctx'>  *	pv_queued_spin_unlock_slowpath(lock, lockval);</div><div class='ctx'>  * }</div><div class='hunk'>@@ -40,10 +40,9 @@ __PV_CALLEE_SAVE_REGS_THUNK(__pv_queued_spin_unlock_slowpath, ".spinlock.text");</div><div class='ctx'> #define PV_UNLOCK_ASM							\</div><div class='ctx'> 	FRAME_BEGIN							\</div><div class='ctx'> 	"push  %rdx\n\t"						\</div><div class='del'>-	"mov   $0x1,%eax\n\t"						\</div><div class='add'>+	"mov   $" __stringify(_Q_LOCKED_VAL) ",%eax\n\t"		\</div><div class='ctx'> 	"xor   %edx,%edx\n\t"						\</div><div class='ctx'> 	LOCK_PREFIX "cmpxchg %dl,(%rdi)\n\t"				\</div><div class='del'>-	"cmp   $0x1,%al\n\t"						\</div><div class='ctx'> 	"jne   .slowpath\n\t"						\</div><div class='ctx'> 	"pop   %rdx\n\t"						\</div><div class='ctx'> 	FRAME_END							\</div><div class='head'>diff --git a/arch/x86/include/asm/seccomp.h b/arch/x86/include/asm/seccomp.h<br/>index fef16e398161..42bcd42d70d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/seccomp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/seccomp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/seccomp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/seccomp.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='del'>-#include &lt;asm/ia32_unistd.h&gt;</div><div class='add'>+#include &lt;asm/unistd_32_ia32.h&gt;</div><div class='ctx'> #define __NR_seccomp_read_32		__NR_ia32_read</div><div class='ctx'> #define __NR_seccomp_write_32		__NR_ia32_write</div><div class='ctx'> #define __NR_seccomp_exit_32		__NR_ia32_exit</div><div class='head'>diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h<br/>index 7f57382afee4..ca20cc4e5826 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/sev.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/sev.h</a></div><div class='hunk'>@@ -140,7 +140,7 @@ struct secrets_os_area {</div><div class='ctx'> #define VMPCK_KEY_LEN		32</div><div class='ctx'> </div><div class='ctx'> /* See the SNP spec version 0.9 for secrets page format */</div><div class='del'>-struct snp_secrets_page_layout {</div><div class='add'>+struct snp_secrets_page {</div><div class='ctx'> 	u32 version;</div><div class='ctx'> 	u32 imien	: 1,</div><div class='ctx'> 	    rsvd1	: 31;</div><div class='hunk'>@@ -269,6 +269,7 @@ int rmp_make_private(u64 pfn, u64 gpa, enum pg_level level, u32 asid, bool immut</div><div class='ctx'> int rmp_make_shared(u64 pfn, enum pg_level level);</div><div class='ctx'> void snp_leak_pages(u64 pfn, unsigned int npages);</div><div class='ctx'> void kdump_sev_callback(void);</div><div class='add'>+void snp_fixup_e820_tables(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline bool snp_probe_rmptable_info(void) { return false; }</div><div class='ctx'> static inline int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level) { return -ENODEV; }</div><div class='hunk'>@@ -282,6 +283,7 @@ static inline int rmp_make_private(u64 pfn, u64 gpa, enum pg_level level, u32 as</div><div class='ctx'> static inline int rmp_make_shared(u64 pfn, enum pg_level level) { return -ENODEV; }</div><div class='ctx'> static inline void snp_leak_pages(u64 pfn, unsigned int npages) {}</div><div class='ctx'> static inline void kdump_sev_callback(void) { }</div><div class='add'>+static inline void snp_fixup_e820_tables(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h<br/>index 1be13b2dfe8b..64df897c0ee3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sparsemem.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/sparsemem.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sparsemem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/sparsemem.h</a></div><div class='hunk'>@@ -37,8 +37,6 @@ extern int phys_to_target_node(phys_addr_t start);</div><div class='ctx'> #define phys_to_target_node phys_to_target_node</div><div class='ctx'> extern int memory_add_physaddr_to_nid(u64 start);</div><div class='ctx'> #define memory_add_physaddr_to_nid memory_add_physaddr_to_nid</div><div class='del'>-extern int numa_fill_memblks(u64 start, u64 end);</div><div class='del'>-#define numa_fill_memblks numa_fill_memblks</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h<br/>index 2e9fc5c400cd..aec6e2d3aa1d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/special_insns.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/special_insns.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/special_insns.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/special_insns.h</a></div><div class='hunk'>@@ -182,8 +182,8 @@ static __always_inline void clflush(volatile void *__p)</div><div class='ctx'> </div><div class='ctx'> static inline void clflushopt(volatile void *__p)</div><div class='ctx'> {</div><div class='del'>-	alternative_io(".byte 0x3e; clflush %P0",</div><div class='del'>-		       ".byte 0x66; clflush %P0",</div><div class='add'>+	alternative_io(".byte 0x3e; clflush %0",</div><div class='add'>+		       ".byte 0x66; clflush %0",</div><div class='ctx'> 		       X86_FEATURE_CLFLUSHOPT,</div><div class='ctx'> 		       "+m" (*(volatile char __force *)__p));</div><div class='ctx'> }</div><div class='hunk'>@@ -205,9 +205,9 @@ static inline void clwb(volatile void *__p)</div><div class='ctx'> #ifdef CONFIG_X86_USER_SHADOW_STACK</div><div class='ctx'> static inline int write_user_shstk_64(u64 __user *addr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	asm goto("1: wrussq %[val], (%[addr])\n"</div><div class='add'>+	asm goto("1: wrussq %[val], %[addr]\n"</div><div class='ctx'> 			  _ASM_EXTABLE(1b, %l[fail])</div><div class='del'>-			  :: [addr] "r" (addr), [val] "r" (val)</div><div class='add'>+			  :: [addr] "m" (*addr), [val] "r" (val)</div><div class='ctx'> 			  :: fail);</div><div class='ctx'> 	return 0;</div><div class='ctx'> fail:</div><div class='head'>diff --git a/arch/x86/include/asm/string_64.h b/arch/x86/include/asm/string_64.h<br/>index 857d364b9888..9d0b324eab21 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/string_64.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/string_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/string_64.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/string_64.h</a></div><div class='hunk'>@@ -30,37 +30,40 @@ void *__memset(void *s, int c, size_t n);</div><div class='ctx'> #define __HAVE_ARCH_MEMSET16</div><div class='ctx'> static inline void *memset16(uint16_t *s, uint16_t v, size_t n)</div><div class='ctx'> {</div><div class='del'>-	long d0, d1;</div><div class='del'>-	asm volatile("rep\n\t"</div><div class='del'>-		     "stosw"</div><div class='del'>-		     : "=&amp;c" (d0), "=&amp;D" (d1)</div><div class='del'>-		     : "a" (v), "1" (s), "0" (n)</div><div class='del'>-		     : "memory");</div><div class='del'>-	return s;</div><div class='add'>+	const __auto_type s0 = s;</div><div class='add'>+	asm volatile (</div><div class='add'>+		"rep stosw"</div><div class='add'>+		: "+D" (s), "+c" (n)</div><div class='add'>+		: "a" (v)</div><div class='add'>+		: "memory"</div><div class='add'>+	);</div><div class='add'>+	return s0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_MEMSET32</div><div class='ctx'> static inline void *memset32(uint32_t *s, uint32_t v, size_t n)</div><div class='ctx'> {</div><div class='del'>-	long d0, d1;</div><div class='del'>-	asm volatile("rep\n\t"</div><div class='del'>-		     "stosl"</div><div class='del'>-		     : "=&amp;c" (d0), "=&amp;D" (d1)</div><div class='del'>-		     : "a" (v), "1" (s), "0" (n)</div><div class='del'>-		     : "memory");</div><div class='del'>-	return s;</div><div class='add'>+	const __auto_type s0 = s;</div><div class='add'>+	asm volatile (</div><div class='add'>+		"rep stosl"</div><div class='add'>+		: "+D" (s), "+c" (n)</div><div class='add'>+		: "a" (v)</div><div class='add'>+		: "memory"</div><div class='add'>+	);</div><div class='add'>+	return s0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_MEMSET64</div><div class='ctx'> static inline void *memset64(uint64_t *s, uint64_t v, size_t n)</div><div class='ctx'> {</div><div class='del'>-	long d0, d1;</div><div class='del'>-	asm volatile("rep\n\t"</div><div class='del'>-		     "stosq"</div><div class='del'>-		     : "=&amp;c" (d0), "=&amp;D" (d1)</div><div class='del'>-		     : "a" (v), "1" (s), "0" (n)</div><div class='del'>-		     : "memory");</div><div class='del'>-	return s;</div><div class='add'>+	const __auto_type s0 = s;</div><div class='add'>+	asm volatile (</div><div class='add'>+		"rep stosq"</div><div class='add'>+		: "+D" (s), "+c" (n)</div><div class='add'>+		: "a" (v)</div><div class='add'>+		: "memory"</div><div class='add'>+	);</div><div class='add'>+	return s0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/text-patching.h b/arch/x86/include/asm/text-patching.h<br/>index 345aafbc1964..6259f1937fe7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/text-patching.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/text-patching.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/text-patching.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/text-patching.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> extern void text_poke_early(void *addr, const void *opcode, size_t len);</div><div class='ctx'> </div><div class='del'>-extern void apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len);</div><div class='add'>+extern void apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Clear and restore the kernel write-protection flag on the local CPU.</div><div class='head'>diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h<br/>index 237dc8cdd12b..0f9bab92a43d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/uaccess.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/uaccess.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/uaccess.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/uaccess.h</a></div><div class='hunk'>@@ -78,7 +78,7 @@ extern int __get_user_bad(void);</div><div class='ctx'> 	int __ret_gu;							\</div><div class='ctx'> 	register __inttype(*(ptr)) __val_gu asm("%"_ASM_DX);		\</div><div class='ctx'> 	__chk_user_ptr(ptr);						\</div><div class='del'>-	asm volatile("call __" #fn "_%P4"				\</div><div class='add'>+	asm volatile("call __" #fn "_%c4"				\</div><div class='ctx'> 		     : "=a" (__ret_gu), "=r" (__val_gu),		\</div><div class='ctx'> 			ASM_CALL_CONSTRAINT				\</div><div class='ctx'> 		     : "0" (ptr), "i" (sizeof(*(ptr))));		\</div><div class='hunk'>@@ -177,7 +177,7 @@ extern void __put_user_nocheck_8(void);</div><div class='ctx'> 	__chk_user_ptr(__ptr);						\</div><div class='ctx'> 	__ptr_pu = __ptr;						\</div><div class='ctx'> 	__val_pu = __x;							\</div><div class='del'>-	asm volatile("call __" #fn "_%P[size]"				\</div><div class='add'>+	asm volatile("call __" #fn "_%c[size]"				\</div><div class='ctx'> 		     : "=c" (__ret_pu),					\</div><div class='ctx'> 			ASM_CALL_CONSTRAINT				\</div><div class='ctx'> 		     : "0" (__ptr_pu),					\</div><div class='head'>diff --git a/arch/x86/include/asm/vdso/gettimeofday.h b/arch/x86/include/asm/vdso/gettimeofday.h<br/>index 8e048ca980df..0ef36190abe6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vdso/gettimeofday.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -300,7 +300,7 @@ static inline bool arch_vdso_cycles_ok(u64 cycles)</div><div class='ctx'> #define vdso_cycles_ok arch_vdso_cycles_ok</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * x86 specific delta calculation.</div><div class='add'>+ * x86 specific calculation of nanoseconds for the current cycle count</div><div class='ctx'>  *</div><div class='ctx'>  * The regular implementation assumes that clocksource reads are globally</div><div class='ctx'>  * monotonic. The TSC can be slightly off across sockets which can cause</div><div class='hunk'>@@ -308,8 +308,8 @@ static inline bool arch_vdso_cycles_ok(u64 cycles)</div><div class='ctx'>  * jump.</div><div class='ctx'>  *</div><div class='ctx'>  * Therefore it needs to be verified that @cycles are greater than</div><div class='del'>- * @last. If not then use @last, which is the base time of the current</div><div class='del'>- * conversion period.</div><div class='add'>+ * @vd-&gt;cycles_last. If not then use @vd-&gt;cycles_last, which is the base</div><div class='add'>+ * time of the current conversion period.</div><div class='ctx'>  *</div><div class='ctx'>  * This variant also uses a custom mask because while the clocksource mask of</div><div class='ctx'>  * all the VDSO capable clocksources on x86 is U64_MAX, the above code uses</div><div class='hunk'>@@ -317,25 +317,37 @@ static inline bool arch_vdso_cycles_ok(u64 cycles)</div><div class='ctx'>  * declares everything with the MSB/Sign-bit set as invalid. Therefore the</div><div class='ctx'>  * effective mask is S64_MAX.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline</div><div class='del'>-u64 vdso_calc_delta(u64 cycles, u64 last, u64 mask, u32 mult)</div><div class='add'>+static __always_inline u64 vdso_calc_ns(const struct vdso_data *vd, u64 cycles, u64 base)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * Due to the MSB/Sign-bit being used as invalid marker (see</div><div class='del'>-	 * arch_vdso_cycles_valid() above), the effective mask is S64_MAX.</div><div class='del'>-	 */</div><div class='del'>-	u64 delta = (cycles - last) &amp; S64_MAX;</div><div class='add'>+	u64 delta = cycles - vd-&gt;cycle_last;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Due to the above mentioned TSC wobbles, filter out negative motion.</div><div class='del'>-	 * Per the above masking, the effective sign bit is now bit 62.</div><div class='add'>+	 * Negative motion and deltas which can cause multiplication</div><div class='add'>+	 * overflow require special treatment. This check covers both as</div><div class='add'>+	 * negative motion is guaranteed to be greater than @vd::max_cycles</div><div class='add'>+	 * due to unsigned comparison.</div><div class='add'>+	 *</div><div class='add'>+	 * Due to the MSB/Sign-bit being used as invalid marker (see</div><div class='add'>+	 * arch_vdso_cycles_valid() above), the effective mask is S64_MAX,</div><div class='add'>+	 * but that case is also unlikely and will also take the unlikely path</div><div class='add'>+	 * here.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(delta &amp; (1ULL &lt;&lt; 62)))</div><div class='del'>-		return 0;</div><div class='add'>+	if (unlikely(delta &gt; vd-&gt;max_cycles)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Due to the above mentioned TSC wobbles, filter out</div><div class='add'>+		 * negative motion.  Per the above masking, the effective</div><div class='add'>+		 * sign bit is now bit 62.</div><div class='add'>+		 */</div><div class='add'>+		if (delta &amp; (1ULL &lt;&lt; 62))</div><div class='add'>+			return base &gt;&gt; vd-&gt;shift;</div><div class='add'>+</div><div class='add'>+		/* Handle multiplication overflow gracefully */</div><div class='add'>+		return mul_u64_u32_add_u64_shr(delta &amp; S64_MAX, vd-&gt;mult, base, vd-&gt;shift);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return delta * mult;</div><div class='add'>+	return ((delta * vd-&gt;mult) + base) &gt;&gt; vd-&gt;shift;</div><div class='ctx'> }</div><div class='del'>-#define vdso_calc_delta vdso_calc_delta</div><div class='add'>+#define vdso_calc_ns vdso_calc_ns</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/vm86.h b/arch/x86/include/asm/vm86.h<br/>index 9e8ac5073ecb..62ee19909903 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vm86.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/include/asm/vm86.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vm86.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/include/asm/vm86.h</a></div><div class='hunk'>@@ -84,7 +84,7 @@ static inline int handle_vm86_trap(struct kernel_vm86_regs *a, long b, int c)</div><div class='ctx'> </div><div class='ctx'> static inline void save_v86_state(struct kernel_vm86_regs *a, int b) { }</div><div class='ctx'> </div><div class='del'>-#define free_vm86(t) do { } while(0)</div><div class='add'>+#define free_vm86(task) do { (void)(task); } while(0)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_VM86 */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile<br/>index 74077694da7d..5d128167e2e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/Makefile</a></div><div class='hunk'>@@ -62,7 +62,7 @@ obj-$(CONFIG_X86_64)	+= sys_x86_64.o</div><div class='ctx'> obj-$(CONFIG_X86_ESPFIX64)	+= espfix_64.o</div><div class='ctx'> obj-$(CONFIG_SYSFS)	+= ksysfs.o</div><div class='ctx'> obj-y			+= bootflag.o e820.o</div><div class='del'>-obj-y			+= pci-dma.o quirks.o topology.o kdebugfs.o</div><div class='add'>+obj-y			+= pci-dma.o quirks.o kdebugfs.o</div><div class='ctx'> obj-y			+= alternative.o i8253.o hw_breakpoint.o</div><div class='ctx'> obj-y			+= tsc.o tsc_msr.o io_delay.o rtc.o</div><div class='ctx'> obj-y			+= resource.o</div><div class='head'>diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c<br/>index 45a280f2161c..7555c15b7183 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/alternative.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/alternative.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/alternative.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/alternative.c</a></div><div class='hunk'>@@ -125,6 +125,20 @@ const unsigned char * const x86_nops[ASM_NOP_MAX+1] =</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Nomenclature for variable names to simplify and clarify this code and ease</div><div class='add'>+ * any potential staring at it:</div><div class='add'>+ *</div><div class='add'>+ * @instr: source address of the original instructions in the kernel text as</div><div class='add'>+ * generated by the compiler.</div><div class='add'>+ *</div><div class='add'>+ * @buf: temporary buffer on which the patching operates. This buffer is</div><div class='add'>+ * eventually text-poked into the kernel image.</div><div class='add'>+ *</div><div class='add'>+ * @replacement/@repl: pointer to the opcodes which are replacing @instr, located</div><div class='add'>+ * in the .altinstr_replacement section.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Fill the buffer with a single effective instruction of size @len.</div><div class='ctx'>  *</div><div class='ctx'>  * In order not to issue an ORC stack depth tracking CFI entry (Call Frame Info)</div><div class='hunk'>@@ -133,28 +147,28 @@ const unsigned char * const x86_nops[ASM_NOP_MAX+1] =</div><div class='ctx'>  * each single-byte NOPs). If @len to fill out is &gt; ASM_NOP_MAX, pad with INT3 and</div><div class='ctx'>  * *jump* over instead of executing long and daft NOPs.</div><div class='ctx'>  */</div><div class='del'>-static void add_nop(u8 *instr, unsigned int len)</div><div class='add'>+static void add_nop(u8 *buf, unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	u8 *target = instr + len;</div><div class='add'>+	u8 *target = buf + len;</div><div class='ctx'> </div><div class='ctx'> 	if (!len)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (len &lt;= ASM_NOP_MAX) {</div><div class='del'>-		memcpy(instr, x86_nops[len], len);</div><div class='add'>+		memcpy(buf, x86_nops[len], len);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (len &lt; 128) {</div><div class='del'>-		__text_gen_insn(instr, JMP8_INSN_OPCODE, instr, target, JMP8_INSN_SIZE);</div><div class='del'>-		instr += JMP8_INSN_SIZE;</div><div class='add'>+		__text_gen_insn(buf, JMP8_INSN_OPCODE, buf, target, JMP8_INSN_SIZE);</div><div class='add'>+		buf += JMP8_INSN_SIZE;</div><div class='ctx'> 	} else {</div><div class='del'>-		__text_gen_insn(instr, JMP32_INSN_OPCODE, instr, target, JMP32_INSN_SIZE);</div><div class='del'>-		instr += JMP32_INSN_SIZE;</div><div class='add'>+		__text_gen_insn(buf, JMP32_INSN_OPCODE, buf, target, JMP32_INSN_SIZE);</div><div class='add'>+		buf += JMP32_INSN_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (;instr &lt; target; instr++)</div><div class='del'>-		*instr = INT3_INSN_OPCODE;</div><div class='add'>+	for (;buf &lt; target; buf++)</div><div class='add'>+		*buf = INT3_INSN_OPCODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern s32 __retpoline_sites[], __retpoline_sites_end[];</div><div class='hunk'>@@ -187,12 +201,12 @@ static bool insn_is_nop(struct insn *insn)</div><div class='ctx'>  * Find the offset of the first non-NOP instruction starting at @offset</div><div class='ctx'>  * but no further than @len.</div><div class='ctx'>  */</div><div class='del'>-static int skip_nops(u8 *instr, int offset, int len)</div><div class='add'>+static int skip_nops(u8 *buf, int offset, int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct insn insn;</div><div class='ctx'> </div><div class='ctx'> 	for (; offset &lt; len; offset += insn.length) {</div><div class='del'>-		if (insn_decode_kernel(&amp;insn, &amp;instr[offset]))</div><div class='add'>+		if (insn_decode_kernel(&amp;insn, &amp;buf[offset]))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		if (!insn_is_nop(&amp;insn))</div><div class='hunk'>@@ -203,66 +217,32 @@ static int skip_nops(u8 *instr, int offset, int len)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Optimize a sequence of NOPs, possibly preceded by an unconditional jump</div><div class='del'>- * to the end of the NOP sequence into a single NOP.</div><div class='del'>- */</div><div class='del'>-static bool</div><div class='del'>-__optimize_nops(u8 *instr, size_t len, struct insn *insn, int *next, int *prev, int *target)</div><div class='del'>-{</div><div class='del'>-	int i = *next - insn-&gt;length;</div><div class='del'>-</div><div class='del'>-	switch (insn-&gt;opcode.bytes[0]) {</div><div class='del'>-	case JMP8_INSN_OPCODE:</div><div class='del'>-	case JMP32_INSN_OPCODE:</div><div class='del'>-		*prev = i;</div><div class='del'>-		*target = *next + insn-&gt;immediate.value;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (insn_is_nop(insn)) {</div><div class='del'>-		int nop = i;</div><div class='del'>-</div><div class='del'>-		*next = skip_nops(instr, *next, len);</div><div class='del'>-		if (*target &amp;&amp; *next == *target)</div><div class='del'>-			nop = *prev;</div><div class='del'>-</div><div class='del'>-		add_nop(instr + nop, *next - nop);</div><div class='del'>-		DUMP_BYTES(ALT, instr, len, "%px: [%d:%d) optimized NOPs: ", instr, nop, *next);</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*target = 0;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * "noinline" to cause control flow change and thus invalidate I$ and</div><div class='ctx'>  * cause refetch after modification.</div><div class='ctx'>  */</div><div class='del'>-static void __init_or_module noinline optimize_nops(u8 *instr, size_t len)</div><div class='add'>+static void noinline optimize_nops(const u8 * const instr, u8 *buf, size_t len)</div><div class='ctx'> {</div><div class='del'>-	int prev, target = 0;</div><div class='del'>-</div><div class='ctx'> 	for (int next, i = 0; i &lt; len; i = next) {</div><div class='ctx'> 		struct insn insn;</div><div class='ctx'> </div><div class='del'>-		if (insn_decode_kernel(&amp;insn, &amp;instr[i]))</div><div class='add'>+		if (insn_decode_kernel(&amp;insn, &amp;buf[i]))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 		next = i + insn.length;</div><div class='ctx'> </div><div class='del'>-		__optimize_nops(instr, len, &amp;insn, &amp;next, &amp;prev, &amp;target);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+		if (insn_is_nop(&amp;insn)) {</div><div class='add'>+			int nop = i;</div><div class='ctx'> </div><div class='del'>-static void __init_or_module noinline optimize_nops_inplace(u8 *instr, size_t len)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='add'>+			/* Has the NOP already been optimized? */</div><div class='add'>+			if (i + insn.length == len)</div><div class='add'>+				return;</div><div class='ctx'> </div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	optimize_nops(instr, len);</div><div class='del'>-	sync_core();</div><div class='del'>-	local_irq_restore(flags);</div><div class='add'>+			next = skip_nops(buf, next, len);</div><div class='add'>+</div><div class='add'>+			add_nop(buf + nop, next - nop);</div><div class='add'>+			DUMP_BYTES(ALT, buf, len, "%px: [%d:%d) optimized NOPs: ", instr, nop, next);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -335,11 +315,9 @@ bool need_reloc(unsigned long offset, u8 *src, size_t src_len)</div><div class='ctx'> 	return (target &lt; src || target &gt; src + src_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)</div><div class='add'>+static void __apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len)</div><div class='ctx'> {</div><div class='del'>-	int prev, target = 0;</div><div class='del'>-</div><div class='del'>-	for (int next, i = 0; i &lt; len; i = next) {</div><div class='add'>+	for (int next, i = 0; i &lt; instrlen; i = next) {</div><div class='ctx'> 		struct insn insn;</div><div class='ctx'> </div><div class='ctx'> 		if (WARN_ON_ONCE(insn_decode_kernel(&amp;insn, &amp;buf[i])))</div><div class='hunk'>@@ -347,9 +325,6 @@ void apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)</div><div class='ctx'> </div><div class='ctx'> 		next = i + insn.length;</div><div class='ctx'> </div><div class='del'>-		if (__optimize_nops(buf, len, &amp;insn, &amp;next, &amp;prev, &amp;target))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		switch (insn.opcode.bytes[0]) {</div><div class='ctx'> 		case 0x0f:</div><div class='ctx'> 			if (insn.opcode.bytes[1] &lt; 0x80 ||</div><div class='hunk'>@@ -361,10 +336,10 @@ void apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)</div><div class='ctx'> 		case JMP8_INSN_OPCODE:</div><div class='ctx'> 		case JMP32_INSN_OPCODE:</div><div class='ctx'> 		case CALL_INSN_OPCODE:</div><div class='del'>-			if (need_reloc(next + insn.immediate.value, src, src_len)) {</div><div class='add'>+			if (need_reloc(next + insn.immediate.value, repl, repl_len)) {</div><div class='ctx'> 				apply_reloc(insn.immediate.nbytes,</div><div class='ctx'> 					    buf + i + insn_offset_immediate(&amp;insn),</div><div class='del'>-					    src - dest);</div><div class='add'>+					    repl - instr);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='hunk'>@@ -372,7 +347,7 @@ void apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (insn.opcode.bytes[0] == JMP32_INSN_OPCODE) {</div><div class='ctx'> 				s32 imm = insn.immediate.value;</div><div class='del'>-				imm += src - dest;</div><div class='add'>+				imm += repl - instr;</div><div class='ctx'> 				imm += JMP32_INSN_SIZE - JMP8_INSN_SIZE;</div><div class='ctx'> 				if ((imm &gt;&gt; 31) == (imm &gt;&gt; 7)) {</div><div class='ctx'> 					buf[i+0] = JMP8_INSN_OPCODE;</div><div class='hunk'>@@ -385,15 +360,21 @@ void apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (insn_rip_relative(&amp;insn)) {</div><div class='del'>-			if (need_reloc(next + insn.displacement.value, src, src_len)) {</div><div class='add'>+			if (need_reloc(next + insn.displacement.value, repl, repl_len)) {</div><div class='ctx'> 				apply_reloc(insn.displacement.nbytes,</div><div class='ctx'> 					    buf + i + insn_offset_displacement(&amp;insn),</div><div class='del'>-					    src - dest);</div><div class='add'>+					    repl - instr);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len)</div><div class='add'>+{</div><div class='add'>+	__apply_relocation(buf, instr, instrlen, repl, repl_len);</div><div class='add'>+	optimize_nops(instr, buf, repl_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Low-level backend functions usable from alternative code replacements. */</div><div class='ctx'> DEFINE_ASM_FUNC(nop_func, "", .entry.text);</div><div class='ctx'> EXPORT_SYMBOL_GPL(nop_func);</div><div class='hunk'>@@ -464,9 +445,9 @@ static int alt_replace_call(u8 *instr, u8 *insn_buff, struct alt_instr *a)</div><div class='ctx'> void __init_or_module noinline apply_alternatives(struct alt_instr *start,</div><div class='ctx'> 						  struct alt_instr *end)</div><div class='ctx'> {</div><div class='del'>-	struct alt_instr *a;</div><div class='del'>-	u8 *instr, *replacement;</div><div class='ctx'> 	u8 insn_buff[MAX_PATCH_LEN];</div><div class='add'>+	u8 *instr, *replacement;</div><div class='add'>+	struct alt_instr *a;</div><div class='ctx'> </div><div class='ctx'> 	DPRINTK(ALT, "alt table %px, -&gt; %px", start, end);</div><div class='ctx'> </div><div class='hunk'>@@ -504,7 +485,9 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start,</div><div class='ctx'> 		 *   patch if feature is *NOT* present.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!boot_cpu_has(a-&gt;cpuid) == !(a-&gt;flags &amp; ALT_FLAG_NOT)) {</div><div class='del'>-			optimize_nops_inplace(instr, a-&gt;instrlen);</div><div class='add'>+			memcpy(insn_buff, instr, a-&gt;instrlen);</div><div class='add'>+			optimize_nops(instr, insn_buff, a-&gt;instrlen);</div><div class='add'>+			text_poke_early(instr, insn_buff, a-&gt;instrlen);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -526,7 +509,7 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start,</div><div class='ctx'> 		for (; insn_buff_sz &lt; a-&gt;instrlen; insn_buff_sz++)</div><div class='ctx'> 			insn_buff[insn_buff_sz] = 0x90;</div><div class='ctx'> </div><div class='del'>-		apply_relocation(insn_buff, a-&gt;instrlen, instr, replacement, a-&gt;replacementlen);</div><div class='add'>+		apply_relocation(insn_buff, instr, a-&gt;instrlen, replacement, a-&gt;replacementlen);</div><div class='ctx'> </div><div class='ctx'> 		DUMP_BYTES(ALT, instr, a-&gt;instrlen, "%px:   old_insn: ", instr);</div><div class='ctx'> 		DUMP_BYTES(ALT, replacement, a-&gt;replacementlen, "%px:   rpl_insn: ", replacement);</div><div class='hunk'>@@ -761,7 +744,7 @@ void __init_or_module noinline apply_retpolines(s32 *start, s32 *end)</div><div class='ctx'> </div><div class='ctx'> 		len = patch_retpoline(addr, &amp;insn, bytes);</div><div class='ctx'> 		if (len == insn.length) {</div><div class='del'>-			optimize_nops(bytes, len);</div><div class='add'>+			optimize_nops(addr, bytes, len);</div><div class='ctx'> 			DUMP_BYTES(RETPOLINE, ((u8*)addr),  len, "%px: orig: ", addr);</div><div class='ctx'> 			DUMP_BYTES(RETPOLINE, ((u8*)bytes), len, "%px: repl: ", addr);</div><div class='ctx'> 			text_poke_early(addr, bytes, len);</div><div class='head'>diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c<br/>index 5bf5f9fc5753..3cf156f70859 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_nb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/amd_nb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_nb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/amd_nb.c</a></div><div class='hunk'>@@ -95,6 +95,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F3) },</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) },</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) },</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M70H_DF_F3) },</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F3) },</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F3) },</div><div class='ctx'> 	{}</div><div class='head'>diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c<br/>index c342c4aa9c68..66fd4b2a37a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/apic.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/apic/apic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/apic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/apic/apic.c</a></div><div class='hunk'>@@ -497,32 +497,32 @@ static struct clock_event_device lapic_clockevent = {</div><div class='ctx'> static DEFINE_PER_CPU(struct clock_event_device, lapic_events);</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id deadline_match[] __initconst = {</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X,	0x0b000020),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_X,	0x0b000020),</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( HASWELL,		0x22),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L,		0x20),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_G,		0x17),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL,		0x22),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_L,		0x20),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_G,		0x17),</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL,		0x25),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_G,	0x17),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL,		0x25),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_G,	0x17),</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_L,		0xb2),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE,		0xb2),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE_L,		0xb2),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE,		0xb2),</div><div class='ctx'> </div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE_L,		0x52),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE,		0x52),</div><div class='add'>+	X86_MATCH_VFM(INTEL_KABYLAKE_L,		0x52),</div><div class='add'>+	X86_MATCH_VFM(INTEL_KABYLAKE,		0x52),</div><div class='ctx'> </div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='hunk'>@@ -631,7 +631,7 @@ void lapic_update_tsc_freq(void)</div><div class='ctx'> static __initdata int lapic_cal_loops = -1;</div><div class='ctx'> static __initdata long lapic_cal_t1, lapic_cal_t2;</div><div class='ctx'> static __initdata unsigned long long lapic_cal_tsc1, lapic_cal_tsc2;</div><div class='del'>-static __initdata unsigned long lapic_cal_pm1, lapic_cal_pm2;</div><div class='add'>+static __initdata u32 lapic_cal_pm1, lapic_cal_pm2;</div><div class='ctx'> static __initdata unsigned long lapic_cal_j1, lapic_cal_j2;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -641,7 +641,7 @@ static void __init lapic_cal_handler(struct clock_event_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long tsc = 0;</div><div class='ctx'> 	long tapic = apic_read(APIC_TMCCT);</div><div class='del'>-	unsigned long pm = acpi_pm_read_early();</div><div class='add'>+	u32 pm = acpi_pm_read_early();</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_TSC))</div><div class='ctx'> 		tsc = rdtsc();</div><div class='hunk'>@@ -666,7 +666,7 @@ static void __init lapic_cal_handler(struct clock_event_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init</div><div class='del'>-calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)</div><div class='add'>+calibrate_by_pmtimer(u32 deltapm, long *delta, long *deltatsc)</div><div class='ctx'> {</div><div class='ctx'> 	const long pm_100ms = PMTMR_TICKS_PER_SEC / 10;</div><div class='ctx'> 	const long pm_thresh = pm_100ms / 100;</div><div class='hunk'>@@ -677,7 +677,7 @@ calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)</div><div class='ctx'> 	return -1;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm);</div><div class='add'>+	apic_printk(APIC_VERBOSE, "... PM-Timer delta = %u\n", deltapm);</div><div class='ctx'> </div><div class='ctx'> 	/* Check, if the PM timer is available */</div><div class='ctx'> 	if (!deltapm)</div><div class='hunk'>@@ -1771,7 +1771,7 @@ void x2apic_setup(void)</div><div class='ctx'> 	__x2apic_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __init void apic_set_fixmap(void);</div><div class='add'>+static __init void apic_set_fixmap(bool read_apic);</div><div class='ctx'> </div><div class='ctx'> static __init void x2apic_disable(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1793,7 +1793,12 @@ static __init void x2apic_disable(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	__x2apic_disable();</div><div class='del'>-	apic_set_fixmap();</div><div class='add'>+	/*</div><div class='add'>+	 * Don't reread the APIC ID as it was already done from</div><div class='add'>+	 * check_x2apic() and the APIC driver still is a x2APIC variant,</div><div class='add'>+	 * which fails to do the read after x2APIC was disabled.</div><div class='add'>+	 */</div><div class='add'>+	apic_set_fixmap(false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __init void x2apic_enable(void)</div><div class='hunk'>@@ -2057,13 +2062,14 @@ void __init init_apic_mappings(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __init void apic_set_fixmap(void)</div><div class='add'>+static __init void apic_set_fixmap(bool read_apic)</div><div class='ctx'> {</div><div class='ctx'> 	set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);</div><div class='ctx'> 	apic_mmio_base = APIC_BASE;</div><div class='ctx'> 	apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",</div><div class='ctx'> 		    apic_mmio_base, mp_lapic_addr);</div><div class='del'>-	apic_read_boot_cpu_id(false);</div><div class='add'>+	if (read_apic)</div><div class='add'>+		apic_read_boot_cpu_id(false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init register_lapic_address(unsigned long address)</div><div class='hunk'>@@ -2073,7 +2079,7 @@ void __init register_lapic_address(unsigned long address)</div><div class='ctx'> 	mp_lapic_addr = address;</div><div class='ctx'> </div><div class='ctx'> 	if (!x2apic_mode)</div><div class='del'>-		apic_set_fixmap();</div><div class='add'>+		apic_set_fixmap(true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c<br/>index 185738c72766..9eec52925fa3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/vector.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/apic/vector.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/vector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/apic/vector.c</a></div><div class='hunk'>@@ -965,7 +965,7 @@ static void __vector_cleanup(struct vector_cleanup *cl, bool check_irr)</div><div class='ctx'> 	lockdep_assert_held(&amp;vector_lock);</div><div class='ctx'> </div><div class='ctx'> 	hlist_for_each_entry_safe(apicd, tmp, &amp;cl-&gt;head, clist) {</div><div class='del'>-		unsigned int irr, vector = apicd-&gt;prev_vector;</div><div class='add'>+		unsigned int vector = apicd-&gt;prev_vector;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Paranoia: Check if the vector that needs to be cleaned</div><div class='hunk'>@@ -979,8 +979,7 @@ static void __vector_cleanup(struct vector_cleanup *cl, bool check_irr)</div><div class='ctx'> 		 * fixup_irqs() was just called to scan IRR for set bits and</div><div class='ctx'> 		 * forward them to new destination CPUs via IPIs.</div><div class='ctx'> 		 */</div><div class='del'>-		irr = check_irr ? apic_read(APIC_IRR + (vector / 32 * 0x10)) : 0;</div><div class='del'>-		if (irr &amp; (1U &lt;&lt; (vector % 32))) {</div><div class='add'>+		if (check_irr &amp;&amp; is_vector_pending(vector)) {</div><div class='ctx'> 			pr_warn_once("Moved interrupt pending in old target APIC %u\n", apicd-&gt;irq);</div><div class='ctx'> 			rearm = true;</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c<br/>index 567dbd2fe4b6..7db83212effb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/x2apic_cluster.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/apic/x2apic_cluster.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/x2apic_cluster.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/apic/x2apic_cluster.c</a></div><div class='hunk'>@@ -178,13 +178,16 @@ static int x2apic_prepare_cpu(unsigned int cpu)</div><div class='ctx'> 	u32 phys_apicid = apic-&gt;cpu_present_to_apicid(cpu);</div><div class='ctx'> 	u32 cluster = apic_cluster(phys_apicid);</div><div class='ctx'> 	u32 logical_apicid = (cluster &lt;&lt; 16) | (1 &lt;&lt; (phys_apicid &amp; 0xf));</div><div class='add'>+	int node = cpu_to_node(cpu);</div><div class='ctx'> </div><div class='ctx'> 	x86_cpu_to_logical_apicid[cpu] = logical_apicid;</div><div class='ctx'> </div><div class='del'>-	if (alloc_clustermask(cpu, cluster, cpu_to_node(cpu)) &lt; 0)</div><div class='add'>+	if (alloc_clustermask(cpu, cluster, node) &lt; 0)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;per_cpu(ipi_mask, cpu), GFP_KERNEL))</div><div class='add'>+</div><div class='add'>+	if (!zalloc_cpumask_var_node(&amp;per_cpu(ipi_mask, cpu), GFP_KERNEL, node))</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c<br/>index e92ff0c11db8..465647456753 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/callthunks.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/callthunks.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/callthunks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/callthunks.c</a></div><div class='hunk'>@@ -185,8 +185,7 @@ static void *patch_dest(void *dest, bool direct)</div><div class='ctx'> 	u8 *pad = dest - tsize;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(insn_buff, skl_call_thunk_template, tsize);</div><div class='del'>-	apply_relocation(insn_buff, tsize, pad,</div><div class='del'>-			 skl_call_thunk_template, tsize);</div><div class='add'>+	apply_relocation(insn_buff, pad, tsize, skl_call_thunk_template, tsize);</div><div class='ctx'> </div><div class='ctx'> 	/* Already patched? */</div><div class='ctx'> 	if (!bcmp(pad, insn_buff, tsize))</div><div class='hunk'>@@ -308,8 +307,7 @@ static bool is_callthunk(void *addr)</div><div class='ctx'> 	pad = (void *)(dest - tmpl_size);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(insn_buff, skl_call_thunk_template, tmpl_size);</div><div class='del'>-	apply_relocation(insn_buff, tmpl_size, pad,</div><div class='del'>-			 skl_call_thunk_template, tmpl_size);</div><div class='add'>+	apply_relocation(insn_buff, pad, tmpl_size, skl_call_thunk_template, tmpl_size);</div><div class='ctx'> </div><div class='ctx'> 	return !bcmp(pad, insn_buff, tmpl_size);</div><div class='ctx'> }</div><div class='hunk'>@@ -327,8 +325,7 @@ int x86_call_depth_emit_accounting(u8 **pprog, void *func, void *ip)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(insn_buff, skl_call_thunk_template, tmpl_size);</div><div class='del'>-	apply_relocation(insn_buff, tmpl_size, ip,</div><div class='del'>-			 skl_call_thunk_template, tmpl_size);</div><div class='add'>+	apply_relocation(insn_buff, ip, tmpl_size, skl_call_thunk_template, tmpl_size);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(*pprog, insn_buff, tmpl_size);</div><div class='ctx'> 	*pprog += tmpl_size;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c<br/>index cb9eece55904..44df3f11e731 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/amd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/amd.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/cacheinfo.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/spec-ctrl.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/numa.h&gt;</div><div class='hunk'>@@ -459,8 +460,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> 	case 0x1a:</div><div class='ctx'> 		switch (c-&gt;x86_model) {</div><div class='del'>-		case 0x00 ... 0x0f:</div><div class='del'>-		case 0x20 ... 0x2f:</div><div class='add'>+		case 0x00 ... 0x2f:</div><div class='ctx'> 		case 0x40 ... 0x4f:</div><div class='ctx'> 		case 0x70 ... 0x7f:</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_ZEN5);</div><div class='hunk'>@@ -795,6 +795,11 @@ static void init_amd_bd(struct cpuinfo_x86 *c)</div><div class='ctx'> 	clear_rdrand_cpuid_bit(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct x86_cpu_desc erratum_1386_microcode[] = {</div><div class='add'>+	AMD_CPU_DESC(0x17,  0x1, 0x2, 0x0800126e),</div><div class='add'>+	AMD_CPU_DESC(0x17, 0x31, 0x0, 0x08301052),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void fix_erratum_1386(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -804,7 +809,13 @@ static void fix_erratum_1386(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Affected parts all have no supervisor XSAVE states, meaning that</div><div class='ctx'> 	 * the XSAVEC instruction (which works fine) is equivalent.</div><div class='add'>+	 *</div><div class='add'>+	 * Clear the feature flag only on microcode revisions which</div><div class='add'>+	 * don't have the fix.</div><div class='ctx'> 	 */</div><div class='add'>+	if (x86_cpu_has_min_microcode_rev(erratum_1386_microcode))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	clear_cpu_cap(c, X86_FEATURE_XSAVES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/aperfmperf.c b/arch/x86/kernel/cpu/aperfmperf.c<br/>index fdbb5f07448f..f9a8c7b7943f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/aperfmperf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/aperfmperf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/aperfmperf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/aperfmperf.c</a></div><div class='hunk'>@@ -124,25 +124,24 @@ static bool __init slv_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define X86_MATCH(model)					\</div><div class='del'>-	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6,		\</div><div class='del'>-		INTEL_FAM6_##model, X86_FEATURE_APERFMPERF, NULL)</div><div class='add'>+#define X86_MATCH(vfm)						\</div><div class='add'>+	X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, NULL)</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id has_knl_turbo_ratio_limits[] __initconst = {</div><div class='del'>-	X86_MATCH(XEON_PHI_KNL),</div><div class='del'>-	X86_MATCH(XEON_PHI_KNM),</div><div class='add'>+	X86_MATCH(INTEL_XEON_PHI_KNL),</div><div class='add'>+	X86_MATCH(INTEL_XEON_PHI_KNM),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id has_skx_turbo_ratio_limits[] __initconst = {</div><div class='del'>-	X86_MATCH(SKYLAKE_X),</div><div class='add'>+	X86_MATCH(INTEL_SKYLAKE_X),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id has_glm_turbo_ratio_limits[] __initconst = {</div><div class='del'>-	X86_MATCH(ATOM_GOLDMONT),</div><div class='del'>-	X86_MATCH(ATOM_GOLDMONT_D),</div><div class='del'>-	X86_MATCH(ATOM_GOLDMONT_PLUS),</div><div class='add'>+	X86_MATCH(INTEL_ATOM_GOLDMONT),</div><div class='add'>+	X86_MATCH(INTEL_ATOM_GOLDMONT_D),</div><div class='add'>+	X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c<br/>index ab18185894df..b6f927f6c567 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/bugs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/bugs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/bugs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/bugs.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/vmx.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -2391,20 +2391,20 @@ static void override_cache_bits(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (c-&gt;x86 != 6)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	switch (c-&gt;x86_model) {</div><div class='del'>-	case INTEL_FAM6_NEHALEM:</div><div class='del'>-	case INTEL_FAM6_WESTMERE:</div><div class='del'>-	case INTEL_FAM6_SANDYBRIDGE:</div><div class='del'>-	case INTEL_FAM6_IVYBRIDGE:</div><div class='del'>-	case INTEL_FAM6_HASWELL:</div><div class='del'>-	case INTEL_FAM6_HASWELL_L:</div><div class='del'>-	case INTEL_FAM6_HASWELL_G:</div><div class='del'>-	case INTEL_FAM6_BROADWELL:</div><div class='del'>-	case INTEL_FAM6_BROADWELL_G:</div><div class='del'>-	case INTEL_FAM6_SKYLAKE_L:</div><div class='del'>-	case INTEL_FAM6_SKYLAKE:</div><div class='del'>-	case INTEL_FAM6_KABYLAKE_L:</div><div class='del'>-	case INTEL_FAM6_KABYLAKE:</div><div class='add'>+	switch (c-&gt;x86_vfm) {</div><div class='add'>+	case INTEL_NEHALEM:</div><div class='add'>+	case INTEL_WESTMERE:</div><div class='add'>+	case INTEL_SANDYBRIDGE:</div><div class='add'>+	case INTEL_IVYBRIDGE:</div><div class='add'>+	case INTEL_HASWELL:</div><div class='add'>+	case INTEL_HASWELL_L:</div><div class='add'>+	case INTEL_HASWELL_G:</div><div class='add'>+	case INTEL_BROADWELL:</div><div class='add'>+	case INTEL_BROADWELL_G:</div><div class='add'>+	case INTEL_SKYLAKE_L:</div><div class='add'>+	case INTEL_SKYLAKE:</div><div class='add'>+	case INTEL_KABYLAKE_L:</div><div class='add'>+	case INTEL_KABYLAKE:</div><div class='ctx'> 		if (c-&gt;x86_cache_bits &lt; 44)</div><div class='ctx'> 			c-&gt;x86_cache_bits = 44;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c<br/>index 605c26c009c8..2b170da84f97 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/common.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/common.c</a></div><div class='hunk'>@@ -68,6 +68,7 @@</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='ctx'> #include &lt;asm/tdx.h&gt;</div><div class='add'>+#include &lt;asm/posted_intr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='hunk'>@@ -114,17 +115,17 @@ static const struct x86_cpu_id ppin_cpuids[] = {</div><div class='ctx'> 	X86_MATCH_FEATURE(X86_FEATURE_INTEL_PPIN, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='ctx'> </div><div class='ctx'> 	/* Legacy models without CPUID enumeration */</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_D, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SKYLAKE_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ICELAKE_D, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='add'>+	X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &amp;ppin_info[X86_VENDOR_INTEL]),</div><div class='ctx'> </div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='hunk'>@@ -1053,18 +1054,9 @@ void get_cpu_cap(struct cpuinfo_x86 *c)</div><div class='ctx'> void get_cpu_address_sizes(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	u32 eax, ebx, ecx, edx;</div><div class='del'>-	bool vp_bits_from_cpuid = true;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has(c, X86_FEATURE_CPUID) ||</div><div class='del'>-	    (c-&gt;extended_cpuid_level &lt; 0x80000008))</div><div class='del'>-		vp_bits_from_cpuid = false;</div><div class='del'>-</div><div class='del'>-	if (vp_bits_from_cpuid) {</div><div class='del'>-		cpuid(0x80000008, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-</div><div class='del'>-		c-&gt;x86_virt_bits = (eax &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		c-&gt;x86_phys_bits = eax &amp; 0xff;</div><div class='del'>-	} else {</div><div class='add'>+	    (c-&gt;extended_cpuid_level &lt; 0x80000008)) {</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_X86_64)) {</div><div class='ctx'> 			c-&gt;x86_clflush_size = 64;</div><div class='ctx'> 			c-&gt;x86_phys_bits = 36;</div><div class='hunk'>@@ -1078,7 +1070,13 @@ void get_cpu_address_sizes(struct cpuinfo_x86 *c)</div><div class='ctx'> 			    cpu_has(c, X86_FEATURE_PSE36))</div><div class='ctx'> 				c-&gt;x86_phys_bits = 36;</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		cpuid(0x80000008, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+</div><div class='add'>+		c-&gt;x86_virt_bits = (eax &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		c-&gt;x86_phys_bits = eax &amp; 0xff;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	c-&gt;x86_cache_bits = c-&gt;x86_phys_bits;</div><div class='ctx'> 	c-&gt;x86_cache_alignment = c-&gt;x86_clflush_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -1125,8 +1123,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)</div><div class='ctx'> #define VULNWL(vendor, family, model, whitelist)	\</div><div class='ctx'> 	X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, whitelist)</div><div class='ctx'> </div><div class='del'>-#define VULNWL_INTEL(model, whitelist)		\</div><div class='del'>-	VULNWL(INTEL, 6, INTEL_FAM6_##model, whitelist)</div><div class='add'>+#define VULNWL_INTEL(vfm, whitelist)		\</div><div class='add'>+	X86_MATCH_VFM(vfm, whitelist)</div><div class='ctx'> </div><div class='ctx'> #define VULNWL_AMD(family, whitelist)		\</div><div class='ctx'> 	VULNWL(AMD, family, X86_MODEL_ANY, whitelist)</div><div class='hunk'>@@ -1143,32 +1141,32 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {</div><div class='ctx'> 	VULNWL(VORTEX,	6, X86_MODEL_ANY,	NO_SPECULATION),</div><div class='ctx'> </div><div class='ctx'> 	/* Intel Family 6 */</div><div class='del'>-	VULNWL_INTEL(TIGERLAKE,			NO_MMIO),</div><div class='del'>-	VULNWL_INTEL(TIGERLAKE_L,		NO_MMIO),</div><div class='del'>-	VULNWL_INTEL(ALDERLAKE,			NO_MMIO),</div><div class='del'>-	VULNWL_INTEL(ALDERLAKE_L,		NO_MMIO),</div><div class='add'>+	VULNWL_INTEL(INTEL_TIGERLAKE,		NO_MMIO),</div><div class='add'>+	VULNWL_INTEL(INTEL_TIGERLAKE_L,		NO_MMIO),</div><div class='add'>+	VULNWL_INTEL(INTEL_ALDERLAKE,		NO_MMIO),</div><div class='add'>+	VULNWL_INTEL(INTEL_ALDERLAKE_L,		NO_MMIO),</div><div class='ctx'> </div><div class='del'>-	VULNWL_INTEL(ATOM_SALTWELL,		NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_SALTWELL_TABLET,	NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_SALTWELL_MID,		NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_BONNELL,		NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_BONNELL_MID,		NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_SALTWELL,	NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_SALTWELL_TABLET, NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_SALTWELL_MID,	NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_BONNELL,	NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_BONNELL_MID,	NO_SPECULATION | NO_ITLB_MULTIHIT),</div><div class='ctx'> </div><div class='del'>-	VULNWL_INTEL(ATOM_SILVERMONT,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_SILVERMONT_D,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_SILVERMONT_MID,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_AIRMONT,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(XEON_PHI_KNL,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(XEON_PHI_KNM,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_SILVERMONT,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_SILVERMONT_D,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_SILVERMONT_MID,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_AIRMONT,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_XEON_PHI_KNL,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_XEON_PHI_KNM,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='ctx'> </div><div class='del'>-	VULNWL_INTEL(CORE_YONAH,		NO_SSB),</div><div class='add'>+	VULNWL_INTEL(INTEL_CORE_YONAH,		NO_SSB),</div><div class='ctx'> </div><div class='del'>-	VULNWL_INTEL(ATOM_AIRMONT_MID,		NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='del'>-	VULNWL_INTEL(ATOM_AIRMONT_NP,		NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID,	NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP,	NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),</div><div class='ctx'> </div><div class='del'>-	VULNWL_INTEL(ATOM_GOLDMONT,		NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),</div><div class='del'>-	VULNWL_INTEL(ATOM_GOLDMONT_D,		NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),</div><div class='del'>-	VULNWL_INTEL(ATOM_GOLDMONT_PLUS,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_GOLDMONT,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_GOLDMONT_PLUS,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Technically, swapgs isn't serializing on AMD (despite it previously</div><div class='hunk'>@@ -1178,9 +1176,9 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {</div><div class='ctx'> 	 * good enough for our purposes.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	VULNWL_INTEL(ATOM_TREMONT,		NO_EIBRS_PBRSB),</div><div class='del'>-	VULNWL_INTEL(ATOM_TREMONT_L,		NO_EIBRS_PBRSB),</div><div class='del'>-	VULNWL_INTEL(ATOM_TREMONT_D,		NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_TREMONT,	NO_EIBRS_PBRSB),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_TREMONT_L,	NO_EIBRS_PBRSB),</div><div class='add'>+	VULNWL_INTEL(INTEL_ATOM_TREMONT_D,	NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB),</div><div class='ctx'> </div><div class='ctx'> 	/* AMD Family 0xf - 0x12 */</div><div class='ctx'> 	VULNWL_AMD(0x0f,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI),</div><div class='hunk'>@@ -1201,10 +1199,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {</div><div class='ctx'> #define VULNBL(vendor, family, model, blacklist)	\</div><div class='ctx'> 	X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, blacklist)</div><div class='ctx'> </div><div class='del'>-#define VULNBL_INTEL_STEPPINGS(model, steppings, issues)		   \</div><div class='del'>-	X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6,		   \</div><div class='del'>-					    INTEL_FAM6_##model, steppings, \</div><div class='del'>-					    X86_FEATURE_ANY, issues)</div><div class='add'>+#define VULNBL_INTEL_STEPPINGS(vfm, steppings, issues)		   \</div><div class='add'>+	X86_MATCH_VFM_STEPPINGS(vfm, steppings, issues)</div><div class='ctx'> </div><div class='ctx'> #define VULNBL_AMD(family, blacklist)		\</div><div class='ctx'> 	VULNBL(AMD, family, X86_MODEL_ANY, blacklist)</div><div class='hunk'>@@ -1229,43 +1225,43 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {</div><div class='ctx'> #define RFDS		BIT(7)</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(IVYBRIDGE,	X86_STEPPING_ANY,		SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(HASWELL,		X86_STEPPING_ANY,		SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(HASWELL_L,	X86_STEPPING_ANY,		SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(HASWELL_G,	X86_STEPPING_ANY,		SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(HASWELL_X,	X86_STEPPING_ANY,		MMIO),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(BROADWELL_D,	X86_STEPPING_ANY,		MMIO),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(BROADWELL_G,	X86_STEPPING_ANY,		SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(BROADWELL_X,	X86_STEPPING_ANY,		MMIO),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(BROADWELL,	X86_STEPPING_ANY,		SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(SKYLAKE_X,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(SKYLAKE_L,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(SKYLAKE,		X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(KABYLAKE_L,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(KABYLAKE,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(CANNONLAKE_L,	X86_STEPPING_ANY,		RETBLEED),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ICELAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ICELAKE_D,	X86_STEPPING_ANY,		MMIO | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ICELAKE_X,	X86_STEPPING_ANY,		MMIO | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(COMETLAKE,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(COMETLAKE_L,	X86_STEPPINGS(0x0, 0x0),	MMIO | RETBLEED),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(COMETLAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(TIGERLAKE_L,	X86_STEPPING_ANY,		GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(TIGERLAKE,	X86_STEPPING_ANY,		GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(LAKEFIELD,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ROCKETLAKE,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ALDERLAKE,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ALDERLAKE_L,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(RAPTORLAKE,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(RAPTORLAKE_P,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(RAPTORLAKE_S,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_GRACEMONT,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_TREMONT,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_D,	X86_STEPPING_ANY,		MMIO | RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT_D,	X86_STEPPING_ANY,		RFDS),</div><div class='del'>-	VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_IVYBRIDGE,		X86_STEPPING_ANY,		SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_HASWELL,		X86_STEPPING_ANY,		SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_L,		X86_STEPPING_ANY,		SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_G,		X86_STEPPING_ANY,		SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_X,		X86_STEPPING_ANY,		MMIO),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_D,	X86_STEPPING_ANY,		MMIO),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_G,	X86_STEPPING_ANY,		SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_X,	X86_STEPPING_ANY,		MMIO),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL,		X86_STEPPING_ANY,		SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_X,		X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_L,		X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE,		X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE_L,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE,		X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_CANNONLAKE_L,	X86_STEPPING_ANY,		RETBLEED),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_L,		X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_D,		X86_STEPPING_ANY,		MMIO | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_X,		X86_STEPPING_ANY,		MMIO | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE,		X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L,	X86_STEPPINGS(0x0, 0x0),	MMIO | RETBLEED),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE_L,	X86_STEPPING_ANY,		GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE,		X86_STEPPING_ANY,		GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_LAKEFIELD,		X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ROCKETLAKE,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE,		X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE_L,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_P,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_S,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GRACEMONT,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_D,	X86_STEPPING_ANY,		MMIO | RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_D,	X86_STEPPING_ANY,		RFDS),</div><div class='add'>+	VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY,		RFDS),</div><div class='ctx'> </div><div class='ctx'> 	VULNBL_AMD(0x15, RETBLEED),</div><div class='ctx'> 	VULNBL_AMD(0x16, RETBLEED),</div><div class='hunk'>@@ -2227,6 +2223,8 @@ void cpu_init(void)</div><div class='ctx'> 		barrier();</div><div class='ctx'> </div><div class='ctx'> 		x2apic_setup();</div><div class='add'>+</div><div class='add'>+		intel_posted_msi_init();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mmgrab(&amp;init_mm);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c<br/>index 946813d816bf..b7d9f530ae16 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpuid-deps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/cpuid-deps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpuid-deps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/cpuid-deps.c</a></div><div class='hunk'>@@ -114,6 +114,9 @@ static void do_clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature)</div><div class='ctx'> 	if (WARN_ON(feature &gt;= MAX_FEATURE_BITS))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (boot_cpu_has(feature))</div><div class='add'>+		WARN_ON(alternatives_patched);</div><div class='add'>+</div><div class='ctx'> 	clear_feature(c, feature);</div><div class='ctx'> </div><div class='ctx'> 	/* Collect all features to disable, handling dependencies */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c<br/>index be30d7fa2e66..3c3e7e5695ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/intel.c</a></div><div class='hunk'>@@ -228,6 +228,7 @@ static void detect_tme_early(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (!TME_ACTIVATE_LOCKED(tme_activate) || !TME_ACTIVATE_ENABLED(tme_activate)) {</div><div class='ctx'> 		pr_info_once("x86/tme: not enabled by BIOS\n");</div><div class='ctx'> 		mktme_status = MKTME_DISABLED;</div><div class='add'>+		clear_cpu_cap(c, X86_FEATURE_TME);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_epb.c<br/>index f18d35fe27a9..30b1d63b97f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel_epb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/intel_epb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel_epb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/intel_epb.c</a></div><div class='hunk'>@@ -204,12 +204,12 @@ static int intel_epb_offline(unsigned int cpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id intel_epb_normal[] = {</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,</div><div class='del'>-				   ENERGY_PERF_BIAS_NORMAL_POWERSAVE),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,</div><div class='del'>-				   ENERGY_PERF_BIAS_NORMAL_POWERSAVE),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,</div><div class='del'>-				   ENERGY_PERF_BIAS_NORMAL_POWERSAVE),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE_L,</div><div class='add'>+		      ENERGY_PERF_BIAS_NORMAL_POWERSAVE),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,</div><div class='add'>+		      ENERGY_PERF_BIAS_NORMAL_POWERSAVE),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,</div><div class='add'>+		      ENERGY_PERF_BIAS_NORMAL_POWERSAVE),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c<br/>index ad6776081e60..8651643bddae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/match.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/match.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/match.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/match.c</a></div><div class='hunk'>@@ -17,8 +17,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * A typical table entry would be to match a specific CPU</div><div class='ctx'>  *</div><div class='del'>- * X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_BROADWELL,</div><div class='del'>- *				      X86_FEATURE_ANY, NULL);</div><div class='add'>+ * X86_MATCH_VFM_FEATURE(INTEL_BROADWELL, X86_FEATURE_ANY, NULL);</div><div class='ctx'>  *</div><div class='ctx'>  * Fields can be wildcarded with %X86_VENDOR_ANY, %X86_FAMILY_ANY,</div><div class='ctx'>  * %X86_MODEL_ANY, %X86_FEATURE_ANY (except for vendor)</div><div class='hunk'>@@ -26,7 +25,7 @@</div><div class='ctx'>  * asm/cpu_device_id.h contains a set of useful macros which are shortcuts</div><div class='ctx'>  * for various common selections. The above can be shortened to:</div><div class='ctx'>  *</div><div class='del'>- * X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, NULL);</div><div class='add'>+ * X86_MATCH_VFM(INTEL_BROADWELL, NULL);</div><div class='ctx'>  *</div><div class='ctx'>  * Arrays used to match for this should also be declared using</div><div class='ctx'>  * MODULE_DEVICE_TABLE(x86cpu, ...)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c<br/>index 84d41be6d06b..ad0623b659ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/mce/core.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> #include &lt;linux/kexec.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fred.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -1593,6 +1593,24 @@ noinstr void do_machine_check(struct pt_regs *regs)</div><div class='ctx'> 		else</div><div class='ctx'> 			queue_task_work(&amp;m, msg, kill_me_maybe);</div><div class='ctx'> </div><div class='add'>+	} else if (m.mcgstatus &amp; MCG_STATUS_SEAM_NR) {</div><div class='add'>+		/*</div><div class='add'>+		 * Saved RIP on stack makes it look like the machine check</div><div class='add'>+		 * was taken in the kernel on the instruction following</div><div class='add'>+		 * the entry to SEAM mode. But MCG_STATUS_SEAM_NR indicates</div><div class='add'>+		 * that the machine check was taken inside SEAM non-root</div><div class='add'>+		 * mode.  CPU core has already marked that guest as dead.</div><div class='add'>+		 * It is OK for the kernel to resume execution at the</div><div class='add'>+		 * apparent point of the machine check as the fault did</div><div class='add'>+		 * not occur there. Mark the page as poisoned so it won't</div><div class='add'>+		 * be added to free list when the guest is terminated.</div><div class='add'>+		 */</div><div class='add'>+		if (mce_usable_address(&amp;m)) {</div><div class='add'>+			struct page *p = pfn_to_online_page(m.addr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+			if (p)</div><div class='add'>+				SetPageHWPoison(p);</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Handle an MCE which has happened in kernel space but from</div><div class='hunk'>@@ -1930,14 +1948,14 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)</div><div class='ctx'> 		if (c-&gt;x86 == 6 &amp;&amp; c-&gt;x86_model &lt;= 13 &amp;&amp; cfg-&gt;bootlog &lt; 0)</div><div class='ctx'> 			cfg-&gt;bootlog = 0;</div><div class='ctx'> </div><div class='del'>-		if (c-&gt;x86 == 6 &amp;&amp; c-&gt;x86_model == 45)</div><div class='add'>+		if (c-&gt;x86_vfm == INTEL_SANDYBRIDGE_X)</div><div class='ctx'> 			mce_flags.snb_ifu_quirk = 1;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Skylake, Cascacde Lake and Cooper Lake require a quirk on</div><div class='ctx'> 		 * rep movs.</div><div class='ctx'> 		 */</div><div class='del'>-		if (c-&gt;x86 == 6 &amp;&amp; c-&gt;x86_model == INTEL_FAM6_SKYLAKE_X)</div><div class='add'>+		if (c-&gt;x86_vfm == INTEL_SKYLAKE_X)</div><div class='ctx'> 			mce_flags.skx_repmov_quirk = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/genpool.c b/arch/x86/kernel/cpu/mce/genpool.c<br/>index fbe8b61c3413..4284749ec803 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/genpool.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/genpool.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/genpool.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/mce/genpool.c</a></div><div class='hunk'>@@ -16,14 +16,14 @@</div><div class='ctx'>  * used to save error information organized in a lock-less list.</div><div class='ctx'>  *</div><div class='ctx'>  * This memory pool is only to be used to save MCE records in MCE context.</div><div class='del'>- * MCE events are rare, so a fixed size memory pool should be enough. Use</div><div class='del'>- * 2 pages to save MCE events for now (~80 MCE records at most).</div><div class='add'>+ * MCE events are rare, so a fixed size memory pool should be enough.</div><div class='add'>+ * Allocate on a sliding scale based on number of CPUs.</div><div class='ctx'>  */</div><div class='del'>-#define MCE_POOLSZ	(2 * PAGE_SIZE)</div><div class='add'>+#define MCE_MIN_ENTRIES	80</div><div class='add'>+#define MCE_PER_CPU	2</div><div class='ctx'> </div><div class='ctx'> static struct gen_pool *mce_evt_pool;</div><div class='ctx'> static LLIST_HEAD(mce_event_llist);</div><div class='del'>-static char gen_pool_buf[MCE_POOLSZ];</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Compare the record "t" with each of the records on list "l" to see if</div><div class='hunk'>@@ -118,22 +118,32 @@ int mce_gen_pool_add(struct mce *mce)</div><div class='ctx'> </div><div class='ctx'> static int mce_gen_pool_create(void)</div><div class='ctx'> {</div><div class='del'>-	struct gen_pool *tmpp;</div><div class='add'>+	int mce_numrecords, mce_poolsz, order;</div><div class='add'>+	struct gen_pool *gpool;</div><div class='ctx'> 	int ret = -ENOMEM;</div><div class='del'>-</div><div class='del'>-	tmpp = gen_pool_create(ilog2(sizeof(struct mce_evt_llist)), -1);</div><div class='del'>-	if (!tmpp)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	ret = gen_pool_add(tmpp, (unsigned long)gen_pool_buf, MCE_POOLSZ, -1);</div><div class='add'>+	void *mce_pool;</div><div class='add'>+</div><div class='add'>+	order = order_base_2(sizeof(struct mce_evt_llist));</div><div class='add'>+	gpool = gen_pool_create(order, -1);</div><div class='add'>+	if (!gpool)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mce_numrecords = max(MCE_MIN_ENTRIES, num_possible_cpus() * MCE_PER_CPU);</div><div class='add'>+	mce_poolsz = mce_numrecords * (1 &lt;&lt; order);</div><div class='add'>+	mce_pool = kmalloc(mce_poolsz, GFP_KERNEL);</div><div class='add'>+	if (!mce_pool) {</div><div class='add'>+		gen_pool_destroy(gpool);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	ret = gen_pool_add(gpool, (unsigned long)mce_pool, mce_poolsz, -1);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		gen_pool_destroy(tmpp);</div><div class='del'>-		goto out;</div><div class='add'>+		gen_pool_destroy(gpool);</div><div class='add'>+		kfree(mce_pool);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mce_evt_pool = tmpp;</div><div class='add'>+	mce_evt_pool = gpool;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c<br/>index 399b62e223d2..f6103e6bf69a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/intel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/mce/intel.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='hunk'>@@ -455,10 +455,10 @@ static void intel_imc_init(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	u64 error_control;</div><div class='ctx'> </div><div class='del'>-	switch (c-&gt;x86_model) {</div><div class='del'>-	case INTEL_FAM6_SANDYBRIDGE_X:</div><div class='del'>-	case INTEL_FAM6_IVYBRIDGE_X:</div><div class='del'>-	case INTEL_FAM6_HASWELL_X:</div><div class='add'>+	switch (c-&gt;x86_vfm) {</div><div class='add'>+	case INTEL_SANDYBRIDGE_X:</div><div class='add'>+	case INTEL_IVYBRIDGE_X:</div><div class='add'>+	case INTEL_HASWELL_X:</div><div class='ctx'> 		if (rdmsrl_safe(MSR_ERROR_CONTROL, &amp;error_control))</div><div class='ctx'> 			return;</div><div class='ctx'> 		error_control |= 2;</div><div class='hunk'>@@ -484,12 +484,11 @@ bool intel_filter_mce(struct mce *m)</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;boot_cpu_data;</div><div class='ctx'> </div><div class='ctx'> 	/* MCE errata HSD131, HSM142, HSW131, BDM48, HSM142 and SKX37 */</div><div class='del'>-	if ((c-&gt;x86 == 6) &amp;&amp;</div><div class='del'>-	    ((c-&gt;x86_model == INTEL_FAM6_HASWELL) ||</div><div class='del'>-	     (c-&gt;x86_model == INTEL_FAM6_HASWELL_L) ||</div><div class='del'>-	     (c-&gt;x86_model == INTEL_FAM6_BROADWELL) ||</div><div class='del'>-	     (c-&gt;x86_model == INTEL_FAM6_HASWELL_G) ||</div><div class='del'>-	     (c-&gt;x86_model == INTEL_FAM6_SKYLAKE_X)) &amp;&amp;</div><div class='add'>+	if ((c-&gt;x86_vfm == INTEL_HASWELL ||</div><div class='add'>+	     c-&gt;x86_vfm == INTEL_HASWELL_L ||</div><div class='add'>+	     c-&gt;x86_vfm == INTEL_BROADWELL ||</div><div class='add'>+	     c-&gt;x86_vfm == INTEL_HASWELL_G ||</div><div class='add'>+	     c-&gt;x86_vfm == INTEL_SKYLAKE_X) &amp;&amp;</div><div class='ctx'> 	    (m-&gt;bank == 0) &amp;&amp;</div><div class='ctx'> 	    ((m-&gt;status &amp; 0xa0000000ffffffff) == 0x80000000000f0005))</div><div class='ctx'> 		return true;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/severity.c b/arch/x86/kernel/cpu/mce/severity.c<br/>index c4477162c07d..dac4d64dfb2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/severity.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/mce/severity.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/severity.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/mce/severity.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/insn-eval.h&gt;</div><div class='hunk'>@@ -39,20 +39,20 @@ static struct severity {</div><div class='ctx'> 	u64 mask;</div><div class='ctx'> 	u64 result;</div><div class='ctx'> 	unsigned char sev;</div><div class='del'>-	unsigned char mcgmask;</div><div class='del'>-	unsigned char mcgres;</div><div class='add'>+	unsigned short mcgmask;</div><div class='add'>+	unsigned short mcgres;</div><div class='ctx'> 	unsigned char ser;</div><div class='ctx'> 	unsigned char context;</div><div class='ctx'> 	unsigned char excp;</div><div class='ctx'> 	unsigned char covered;</div><div class='del'>-	unsigned char cpu_model;</div><div class='add'>+	unsigned int cpu_vfm;</div><div class='ctx'> 	unsigned char cpu_minstepping;</div><div class='ctx'> 	unsigned char bank_lo, bank_hi;</div><div class='ctx'> 	char *msg;</div><div class='ctx'> } severities[] = {</div><div class='ctx'> #define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }</div><div class='ctx'> #define BANK_RANGE(l, h) .bank_lo = l, .bank_hi = h</div><div class='del'>-#define MODEL_STEPPING(m, s) .cpu_model = m, .cpu_minstepping = s</div><div class='add'>+#define VFM_STEPPING(m, s) .cpu_vfm = m, .cpu_minstepping = s</div><div class='ctx'> #define  KERNEL		.context = IN_KERNEL</div><div class='ctx'> #define  USER		.context = IN_USER</div><div class='ctx'> #define  KERNEL_RECOV	.context = IN_KERNEL_RECOV</div><div class='hunk'>@@ -128,7 +128,7 @@ static struct severity {</div><div class='ctx'> 	MCESEV(</div><div class='ctx'> 		AO, "Uncorrected Patrol Scrub Error",</div><div class='ctx'> 		SER, MASK(MCI_STATUS_UC|MCI_ADDR|0xffffeff0, MCI_ADDR|0x001000c0),</div><div class='del'>-		MODEL_STEPPING(INTEL_FAM6_SKYLAKE_X, 4), BANK_RANGE(13, 18)</div><div class='add'>+		VFM_STEPPING(INTEL_SKYLAKE_X, 4), BANK_RANGE(13, 18)</div><div class='ctx'> 	),</div><div class='ctx'> </div><div class='ctx'> 	/* ignore OVER for UCNA */</div><div class='hunk'>@@ -174,6 +174,18 @@ static struct severity {</div><div class='ctx'> 		USER</div><div class='ctx'> 		),</div><div class='ctx'> 	MCESEV(</div><div class='add'>+		AR, "Data load error in SEAM non-root mode",</div><div class='add'>+		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),</div><div class='add'>+		MCGMASK(MCG_STATUS_SEAM_NR, MCG_STATUS_SEAM_NR),</div><div class='add'>+		KERNEL</div><div class='add'>+		),</div><div class='add'>+	MCESEV(</div><div class='add'>+		AR, "Instruction fetch error in SEAM non-root mode",</div><div class='add'>+		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),</div><div class='add'>+		MCGMASK(MCG_STATUS_SEAM_NR, MCG_STATUS_SEAM_NR),</div><div class='add'>+		KERNEL</div><div class='add'>+		),</div><div class='add'>+	MCESEV(</div><div class='ctx'> 		PANIC, "Data load in unrecoverable area of kernel",</div><div class='ctx'> 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),</div><div class='ctx'> 		KERNEL</div><div class='hunk'>@@ -290,7 +302,6 @@ static noinstr int error_context(struct mce *m, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	switch (fixup_type) {</div><div class='ctx'> 	case EX_TYPE_UACCESS:</div><div class='del'>-	case EX_TYPE_COPY:</div><div class='ctx'> 		if (!copy_user)</div><div class='ctx'> 			return IN_KERNEL;</div><div class='ctx'> 		m-&gt;kflags |= MCE_IN_KERNEL_COPYIN;</div><div class='hunk'>@@ -386,7 +397,7 @@ static noinstr int mce_severity_intel(struct mce *m, struct pt_regs *regs, char</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (s-&gt;excp &amp;&amp; excp != s-&gt;excp)</div><div class='ctx'> 			continue;</div><div class='del'>-		if (s-&gt;cpu_model &amp;&amp; boot_cpu_data.x86_model != s-&gt;cpu_model)</div><div class='add'>+		if (s-&gt;cpu_vfm &amp;&amp; boot_cpu_data.x86_vfm != s-&gt;cpu_vfm)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (s-&gt;cpu_minstepping &amp;&amp; boot_cpu_data.x86_stepping &lt; s-&gt;cpu_minstepping)</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c<br/>index 13b45b9c806d..c0d56c02b8da 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/amd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/microcode/amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/microcode/amd.c</a></div><div class='hunk'>@@ -84,8 +84,6 @@ struct microcode_amd {</div><div class='ctx'> 	unsigned int			mpb[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define PATCH_MAX_SIZE (3 * PAGE_SIZE)</div><div class='del'>-</div><div class='ctx'> static struct equiv_cpu_table {</div><div class='ctx'> 	unsigned int num_entries;</div><div class='ctx'> 	struct equiv_cpu_entry *entry;</div><div class='hunk'>@@ -465,7 +463,7 @@ static bool early_apply_microcode(u32 cpuid_1_eax, u32 old_rev, void *ucode, siz</div><div class='ctx'> 	return !__apply_microcode_amd(mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)</div><div class='add'>+static bool get_builtin_microcode(struct cpio_data *cp, u8 family)</div><div class='ctx'> {</div><div class='ctx'> 	char fw_name[36] = "amd-ucode/microcode_amd.bin";</div><div class='ctx'> 	struct firmware fw;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c<br/>index 232026a239a6..b3658d11e7b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/microcode/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/microcode/core.c</a></div><div class='hunk'>@@ -60,11 +60,6 @@ module_param(force_minrev, bool, S_IRUSR | S_IWUSR);</div><div class='ctx'>  */</div><div class='ctx'> struct ucode_cpu_info		ucode_cpu_info[NR_CPUS];</div><div class='ctx'> </div><div class='del'>-struct cpu_info_ctx {</div><div class='del'>-	struct cpu_signature	*cpu_sig;</div><div class='del'>-	int			err;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Those patch levels cannot be updated to newer ones and thus should be final.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c<br/>index 5f0414452b67..815fa67356a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/intel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/microcode/intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/microcode/intel.c</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;linux/uio.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='hunk'>@@ -577,8 +577,7 @@ static bool is_blacklisted(unsigned int cpu)</div><div class='ctx'> 	 * This behavior is documented in item BDF90, #334165 (Intel Xeon</div><div class='ctx'> 	 * Processor E7-8800/4800 v4 Product Family).</div><div class='ctx'> 	 */</div><div class='del'>-	if (c-&gt;x86 == 6 &amp;&amp;</div><div class='del'>-	    c-&gt;x86_model == INTEL_FAM6_BROADWELL_X &amp;&amp;</div><div class='add'>+	if (c-&gt;x86_vfm == INTEL_BROADWELL_X &amp;&amp;</div><div class='ctx'> 	    c-&gt;x86_stepping == 0x01 &amp;&amp;</div><div class='ctx'> 	    llc_size_per_core &gt; 2621440 &amp;&amp;</div><div class='ctx'> 	    c-&gt;microcode &lt; 0x0b000021) {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c<br/>index 83e40341583e..a113d9aba553 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/core.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include &lt;linux/cacheinfo.h&gt;</div><div class='ctx'> #include &lt;linux/cpuhotplug.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/resctrl.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='hunk'>@@ -56,14 +56,9 @@ int max_name_width, max_data_width;</div><div class='ctx'>  */</div><div class='ctx'> bool rdt_alloc_capable;</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-mba_wrmsr_intel(struct rdt_domain *d, struct msr_param *m,</div><div class='del'>-		struct rdt_resource *r);</div><div class='del'>-static void</div><div class='del'>-cat_wrmsr(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r);</div><div class='del'>-static void</div><div class='del'>-mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m,</div><div class='del'>-	      struct rdt_resource *r);</div><div class='add'>+static void mba_wrmsr_intel(struct msr_param *m);</div><div class='add'>+static void cat_wrmsr(struct msr_param *m);</div><div class='add'>+static void mba_wrmsr_amd(struct msr_param *m);</div><div class='ctx'> </div><div class='ctx'> #define domain_init(id) LIST_HEAD_INIT(rdt_resources_all[id].r_resctrl.domains)</div><div class='ctx'> </div><div class='hunk'>@@ -309,12 +304,11 @@ static void rdt_get_cdp_l2_config(void)</div><div class='ctx'> 	rdt_get_cdp_config(RDT_RESOURCE_L2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)</div><div class='add'>+static void mba_wrmsr_amd(struct msr_param *m)</div><div class='ctx'> {</div><div class='add'>+	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m-&gt;res);</div><div class='add'>+	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(m-&gt;dom);</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);</div><div class='del'>-	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);</div><div class='ctx'> </div><div class='ctx'> 	for (i = m-&gt;low; i &lt; m-&gt;high; i++)</div><div class='ctx'> 		wrmsrl(hw_res-&gt;msr_base + i, hw_dom-&gt;ctrl_val[i]);</div><div class='hunk'>@@ -334,25 +328,22 @@ static u32 delay_bw_map(unsigned long bw, struct rdt_resource *r)</div><div class='ctx'> 	return r-&gt;default_ctrl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-mba_wrmsr_intel(struct rdt_domain *d, struct msr_param *m,</div><div class='del'>-		struct rdt_resource *r)</div><div class='add'>+static void mba_wrmsr_intel(struct msr_param *m)</div><div class='ctx'> {</div><div class='add'>+	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m-&gt;res);</div><div class='add'>+	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(m-&gt;dom);</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);</div><div class='del'>-	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);</div><div class='ctx'> </div><div class='ctx'> 	/*  Write the delay values for mba. */</div><div class='ctx'> 	for (i = m-&gt;low; i &lt; m-&gt;high; i++)</div><div class='del'>-		wrmsrl(hw_res-&gt;msr_base + i, delay_bw_map(hw_dom-&gt;ctrl_val[i], r));</div><div class='add'>+		wrmsrl(hw_res-&gt;msr_base + i, delay_bw_map(hw_dom-&gt;ctrl_val[i], m-&gt;res));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-cat_wrmsr(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)</div><div class='add'>+static void cat_wrmsr(struct msr_param *m)</div><div class='ctx'> {</div><div class='add'>+	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m-&gt;res);</div><div class='add'>+	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(m-&gt;dom);</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);</div><div class='del'>-	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);</div><div class='ctx'> </div><div class='ctx'> 	for (i = m-&gt;low; i &lt; m-&gt;high; i++)</div><div class='ctx'> 		wrmsrl(hw_res-&gt;msr_base + i, hw_dom-&gt;ctrl_val[i]);</div><div class='hunk'>@@ -362,6 +353,8 @@ struct rdt_domain *get_domain_from_cpu(int cpu, struct rdt_resource *r)</div><div class='ctx'> {</div><div class='ctx'> 	struct rdt_domain *d;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_cpus_held();</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(d, &amp;r-&gt;domains, list) {</div><div class='ctx'> 		/* Find the domain that contains this CPU */</div><div class='ctx'> 		if (cpumask_test_cpu(cpu, &amp;d-&gt;cpu_mask))</div><div class='hunk'>@@ -378,19 +371,11 @@ u32 resctrl_arch_get_num_closid(struct rdt_resource *r)</div><div class='ctx'> </div><div class='ctx'> void rdt_ctrl_update(void *arg)</div><div class='ctx'> {</div><div class='add'>+	struct rdt_hw_resource *hw_res;</div><div class='ctx'> 	struct msr_param *m = arg;</div><div class='del'>-	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m-&gt;res);</div><div class='del'>-	struct rdt_resource *r = m-&gt;res;</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-	struct rdt_domain *d;</div><div class='ctx'> </div><div class='del'>-	d = get_domain_from_cpu(cpu, r);</div><div class='del'>-	if (d) {</div><div class='del'>-		hw_res-&gt;msr_update(d, m, r);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	pr_warn_once("cpu %d not found in any domain for resource %s\n",</div><div class='del'>-		     cpu, r-&gt;name);</div><div class='add'>+	hw_res = resctrl_to_arch_res(m-&gt;res);</div><div class='add'>+	hw_res-&gt;msr_update(m);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -463,9 +448,11 @@ static int domain_setup_ctrlval(struct rdt_resource *r, struct rdt_domain *d)</div><div class='ctx'> 	hw_dom-&gt;ctrl_val = dc;</div><div class='ctx'> 	setup_default_ctrlval(r, dc);</div><div class='ctx'> </div><div class='add'>+	m.res = r;</div><div class='add'>+	m.dom = d;</div><div class='ctx'> 	m.low = 0;</div><div class='ctx'> 	m.high = hw_res-&gt;num_closid;</div><div class='del'>-	hw_res-&gt;msr_update(d, &amp;m, r);</div><div class='add'>+	hw_res-&gt;msr_update(&amp;m);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -821,18 +808,18 @@ static __init bool get_rdt_mon_resources(void)</div><div class='ctx'> </div><div class='ctx'> static __init void __check_quirks_intel(void)</div><div class='ctx'> {</div><div class='del'>-	switch (boot_cpu_data.x86_model) {</div><div class='del'>-	case INTEL_FAM6_HASWELL_X:</div><div class='add'>+	switch (boot_cpu_data.x86_vfm) {</div><div class='add'>+	case INTEL_HASWELL_X:</div><div class='ctx'> 		if (!rdt_options[RDT_FLAG_L3_CAT].force_off)</div><div class='ctx'> 			cache_alloc_hsw_probe();</div><div class='ctx'> 		break;</div><div class='del'>-	case INTEL_FAM6_SKYLAKE_X:</div><div class='add'>+	case INTEL_SKYLAKE_X:</div><div class='ctx'> 		if (boot_cpu_data.x86_stepping &lt;= 4)</div><div class='ctx'> 			set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat");</div><div class='ctx'> 		else</div><div class='ctx'> 			set_rdt_options("!l3cat");</div><div class='ctx'> 		fallthrough;</div><div class='del'>-	case INTEL_FAM6_BROADWELL_X:</div><div class='add'>+	case INTEL_BROADWELL_X:</div><div class='ctx'> 		intel_rdt_mbm_apply_quirk();</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c<br/>index 7997b47743a2..b7291f60399c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a></div><div class='hunk'>@@ -272,22 +272,6 @@ static u32 get_config_index(u32 closid, enum resctrl_conf_type type)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool apply_config(struct rdt_hw_domain *hw_dom,</div><div class='del'>-			 struct resctrl_staged_config *cfg, u32 idx,</div><div class='del'>-			 cpumask_var_t cpu_mask)</div><div class='del'>-{</div><div class='del'>-	struct rdt_domain *dom = &amp;hw_dom-&gt;d_resctrl;</div><div class='del'>-</div><div class='del'>-	if (cfg-&gt;new_ctrl != hw_dom-&gt;ctrl_val[idx]) {</div><div class='del'>-		cpumask_set_cpu(cpumask_any(&amp;dom-&gt;cpu_mask), cpu_mask);</div><div class='del'>-		hw_dom-&gt;ctrl_val[idx] = cfg-&gt;new_ctrl;</div><div class='del'>-</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d,</div><div class='ctx'> 			    u32 closid, enum resctrl_conf_type t, u32 cfg_val)</div><div class='ctx'> {</div><div class='hunk'>@@ -302,9 +286,10 @@ int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d,</div><div class='ctx'> 	hw_dom-&gt;ctrl_val[idx] = cfg_val;</div><div class='ctx'> </div><div class='ctx'> 	msr_param.res = r;</div><div class='add'>+	msr_param.dom = d;</div><div class='ctx'> 	msr_param.low = idx;</div><div class='ctx'> 	msr_param.high = idx + 1;</div><div class='del'>-	hw_res-&gt;msr_update(d, &amp;msr_param, r);</div><div class='add'>+	hw_res-&gt;msr_update(&amp;msr_param);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -315,48 +300,39 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid)</div><div class='ctx'> 	struct rdt_hw_domain *hw_dom;</div><div class='ctx'> 	struct msr_param msr_param;</div><div class='ctx'> 	enum resctrl_conf_type t;</div><div class='del'>-	cpumask_var_t cpu_mask;</div><div class='ctx'> 	struct rdt_domain *d;</div><div class='ctx'> 	u32 idx;</div><div class='ctx'> </div><div class='ctx'> 	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='ctx'> 	lockdep_assert_cpus_held();</div><div class='ctx'> </div><div class='del'>-	if (!zalloc_cpumask_var(&amp;cpu_mask, GFP_KERNEL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	msr_param.res = NULL;</div><div class='ctx'> 	list_for_each_entry(d, &amp;r-&gt;domains, list) {</div><div class='ctx'> 		hw_dom = resctrl_to_arch_dom(d);</div><div class='add'>+		msr_param.res = NULL;</div><div class='ctx'> 		for (t = 0; t &lt; CDP_NUM_TYPES; t++) {</div><div class='ctx'> 			cfg = &amp;hw_dom-&gt;d_resctrl.staged_config[t];</div><div class='ctx'> 			if (!cfg-&gt;have_new_ctrl)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			idx = get_config_index(closid, t);</div><div class='del'>-			if (!apply_config(hw_dom, cfg, idx, cpu_mask))</div><div class='add'>+			if (cfg-&gt;new_ctrl == hw_dom-&gt;ctrl_val[idx])</div><div class='ctx'> 				continue;</div><div class='add'>+			hw_dom-&gt;ctrl_val[idx] = cfg-&gt;new_ctrl;</div><div class='ctx'> </div><div class='ctx'> 			if (!msr_param.res) {</div><div class='ctx'> 				msr_param.low = idx;</div><div class='ctx'> 				msr_param.high = msr_param.low + 1;</div><div class='ctx'> 				msr_param.res = r;</div><div class='add'>+				msr_param.dom = d;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				msr_param.low = min(msr_param.low, idx);</div><div class='ctx'> 				msr_param.high = max(msr_param.high, idx + 1);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		if (msr_param.res)</div><div class='add'>+			smp_call_function_any(&amp;d-&gt;cpu_mask, rdt_ctrl_update, &amp;msr_param, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpumask_empty(cpu_mask))</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	/* Update resource control msr on all the CPUs. */</div><div class='del'>-	on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &amp;msr_param, 1);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	free_cpumask_var(cpu_mask);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h<br/>index 1a8687f8073a..f1d926832ec8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/internal.h</a></div><div class='hunk'>@@ -379,11 +379,13 @@ static inline struct rdt_hw_domain *resctrl_to_arch_dom(struct rdt_domain *r)</div><div class='ctx'> /**</div><div class='ctx'>  * struct msr_param - set a range of MSRs from a domain</div><div class='ctx'>  * @res:       The resource to use</div><div class='add'>+ * @dom:       The domain to update</div><div class='ctx'>  * @low:       Beginning index from base MSR</div><div class='ctx'>  * @high:      End index</div><div class='ctx'>  */</div><div class='ctx'> struct msr_param {</div><div class='ctx'> 	struct rdt_resource	*res;</div><div class='add'>+	struct rdt_domain	*dom;</div><div class='ctx'> 	u32			low;</div><div class='ctx'> 	u32			high;</div><div class='ctx'> };</div><div class='hunk'>@@ -443,8 +445,7 @@ struct rdt_hw_resource {</div><div class='ctx'> 	struct rdt_resource	r_resctrl;</div><div class='ctx'> 	u32			num_closid;</div><div class='ctx'> 	unsigned int		msr_base;</div><div class='del'>-	void (*msr_update)	(struct rdt_domain *d, struct msr_param *m,</div><div class='del'>-				 struct rdt_resource *r);</div><div class='add'>+	void			(*msr_update)(struct msr_param *m);</div><div class='ctx'> 	unsigned int		mon_scale;</div><div class='ctx'> 	unsigned int		mbm_width;</div><div class='ctx'> 	unsigned int		mbm_cfg_mask;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c<br/>index c34a35ec0f03..2345e6836593 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/monitor.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/monitor.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/monitor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/monitor.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;asm/resctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='add'>+#include "trace.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct rmid_entry - dirty tracking for all RMID.</div><div class='hunk'>@@ -354,6 +355,16 @@ void __check_limbo(struct rdt_domain *d, bool force_free)</div><div class='ctx'> 			rmid_dirty = true;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			rmid_dirty = (val &gt;= resctrl_rmid_realloc_threshold);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * x86's CLOSID and RMID are independent numbers, so the entry's</div><div class='add'>+			 * CLOSID is an empty CLOSID (X86_RESCTRL_EMPTY_CLOSID). On Arm the</div><div class='add'>+			 * RMID (PMG) extends the CLOSID (PARTID) space with bits that aren't</div><div class='add'>+			 * used to select the configuration. It is thus necessary to track both</div><div class='add'>+			 * CLOSID and RMID because there may be dependencies between them</div><div class='add'>+			 * on some architectures.</div><div class='add'>+			 */</div><div class='add'>+			trace_mon_llc_occupancy_limbo(entry-&gt;closid, entry-&gt;rmid, d-&gt;id, val);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (force_free || !rmid_dirty) {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c<br/>index 884b88e25141..aacf236dfe3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/resctrl.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='del'>-#include "pseudo_lock_event.h"</div><div class='add'>+#include "trace.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The bits needed to disable hardware prefetching varies based on the</div><div class='hunk'>@@ -88,8 +88,8 @@ static u64 get_prefetch_disable_bits(void)</div><div class='ctx'> 	    boot_cpu_data.x86 != 6)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	switch (boot_cpu_data.x86_model) {</div><div class='del'>-	case INTEL_FAM6_BROADWELL_X:</div><div class='add'>+	switch (boot_cpu_data.x86_vfm) {</div><div class='add'>+	case INTEL_BROADWELL_X:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * SDM defines bits of MSR_MISC_FEATURE_CONTROL register</div><div class='ctx'> 		 * as:</div><div class='hunk'>@@ -100,8 +100,8 @@ static u64 get_prefetch_disable_bits(void)</div><div class='ctx'> 		 * 63:4 Reserved</div><div class='ctx'> 		 */</div><div class='ctx'> 		return 0xF;</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT:</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT_PLUS:</div><div class='add'>+	case INTEL_ATOM_GOLDMONT:</div><div class='add'>+	case INTEL_ATOM_GOLDMONT_PLUS:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * SDM defines bits of MSR_MISC_FEATURE_CONTROL register</div><div class='ctx'> 		 * as:</div><div class='hunk'>@@ -1084,9 +1084,9 @@ static int measure_l2_residency(void *_plr)</div><div class='ctx'> 	 *     L2_HIT   02H</div><div class='ctx'> 	 *     L2_MISS  10H</div><div class='ctx'> 	 */</div><div class='del'>-	switch (boot_cpu_data.x86_model) {</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT:</div><div class='del'>-	case INTEL_FAM6_ATOM_GOLDMONT_PLUS:</div><div class='add'>+	switch (boot_cpu_data.x86_vfm) {</div><div class='add'>+	case INTEL_ATOM_GOLDMONT:</div><div class='add'>+	case INTEL_ATOM_GOLDMONT_PLUS:</div><div class='ctx'> 		perf_miss_attr.config = X86_CONFIG(.event = 0xd1,</div><div class='ctx'> 						   .umask = 0x10);</div><div class='ctx'> 		perf_hit_attr.config = X86_CONFIG(.event = 0xd1,</div><div class='hunk'>@@ -1123,8 +1123,8 @@ static int measure_l3_residency(void *_plr)</div><div class='ctx'> 	 *       MISS      41H</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	switch (boot_cpu_data.x86_model) {</div><div class='del'>-	case INTEL_FAM6_BROADWELL_X:</div><div class='add'>+	switch (boot_cpu_data.x86_vfm) {</div><div class='add'>+	case INTEL_BROADWELL_X:</div><div class='ctx'> 		/* On BDW the hit event counts references, not hits */</div><div class='ctx'> 		perf_hit_attr.config = X86_CONFIG(.event = 0x2e,</div><div class='ctx'> 						  .umask = 0x4f);</div><div class='hunk'>@@ -1142,7 +1142,7 @@ static int measure_l3_residency(void *_plr)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	counts.miss_after -= counts.miss_before;</div><div class='del'>-	if (boot_cpu_data.x86_model == INTEL_FAM6_BROADWELL_X) {</div><div class='add'>+	if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_X) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * On BDW references and misses are counted, need to adjust.</div><div class='ctx'> 		 * Sometimes the "hits" counter is a bit more than the</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c<br/>index 011e17efb1a6..02f213f1c51c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/rdtgroup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/rdtgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a></div><div class='hunk'>@@ -2813,16 +2813,12 @@ static int reset_all_ctrls(struct rdt_resource *r)</div><div class='ctx'> 	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);</div><div class='ctx'> 	struct rdt_hw_domain *hw_dom;</div><div class='ctx'> 	struct msr_param msr_param;</div><div class='del'>-	cpumask_var_t cpu_mask;</div><div class='ctx'> 	struct rdt_domain *d;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='ctx'> 	lockdep_assert_cpus_held();</div><div class='ctx'> </div><div class='del'>-	if (!zalloc_cpumask_var(&amp;cpu_mask, GFP_KERNEL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	msr_param.res = r;</div><div class='ctx'> 	msr_param.low = 0;</div><div class='ctx'> 	msr_param.high = hw_res-&gt;num_closid;</div><div class='hunk'>@@ -2834,17 +2830,13 @@ static int reset_all_ctrls(struct rdt_resource *r)</div><div class='ctx'> 	 */</div><div class='ctx'> 	list_for_each_entry(d, &amp;r-&gt;domains, list) {</div><div class='ctx'> 		hw_dom = resctrl_to_arch_dom(d);</div><div class='del'>-		cpumask_set_cpu(cpumask_any(&amp;d-&gt;cpu_mask), cpu_mask);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; hw_res-&gt;num_closid; i++)</div><div class='ctx'> 			hw_dom-&gt;ctrl_val[i] = r-&gt;default_ctrl;</div><div class='add'>+		msr_param.dom = d;</div><div class='add'>+		smp_call_function_any(&amp;d-&gt;cpu_mask, rdt_ctrl_update, &amp;msr_param, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Update CBM on all the CPUs in cpu_mask */</div><div class='del'>-	on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &amp;msr_param, 1);</div><div class='del'>-</div><div class='del'>-	free_cpumask_var(cpu_mask);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock_event.h b/arch/x86/kernel/cpu/resctrl/trace.h<br/>index 428ebbd4270b..2a506316b303 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/pseudo_lock_event.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/resctrl/pseudo_lock_event.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/trace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/resctrl/trace.h</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> #undef TRACE_SYSTEM</div><div class='ctx'> #define TRACE_SYSTEM resctrl</div><div class='ctx'> </div><div class='del'>-#if !defined(_TRACE_PSEUDO_LOCK_H) || defined(TRACE_HEADER_MULTI_READ)</div><div class='del'>-#define _TRACE_PSEUDO_LOCK_H</div><div class='add'>+#if !defined(_TRACE_RESCTRL_H) || defined(TRACE_HEADER_MULTI_READ)</div><div class='add'>+#define _TRACE_RESCTRL_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/tracepoint.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -35,9 +35,25 @@ TRACE_EVENT(pseudo_lock_l3,</div><div class='ctx'> 	    TP_printk("hits=%llu miss=%llu",</div><div class='ctx'> 		      __entry-&gt;l3_hits, __entry-&gt;l3_miss));</div><div class='ctx'> </div><div class='del'>-#endif /* _TRACE_PSEUDO_LOCK_H */</div><div class='add'>+TRACE_EVENT(mon_llc_occupancy_limbo,</div><div class='add'>+	    TP_PROTO(u32 ctrl_hw_id, u32 mon_hw_id, int domain_id, u64 llc_occupancy_bytes),</div><div class='add'>+	    TP_ARGS(ctrl_hw_id, mon_hw_id, domain_id, llc_occupancy_bytes),</div><div class='add'>+	    TP_STRUCT__entry(__field(u32, ctrl_hw_id)</div><div class='add'>+			     __field(u32, mon_hw_id)</div><div class='add'>+			     __field(int, domain_id)</div><div class='add'>+			     __field(u64, llc_occupancy_bytes)),</div><div class='add'>+	    TP_fast_assign(__entry-&gt;ctrl_hw_id = ctrl_hw_id;</div><div class='add'>+			   __entry-&gt;mon_hw_id = mon_hw_id;</div><div class='add'>+			   __entry-&gt;domain_id = domain_id;</div><div class='add'>+			   __entry-&gt;llc_occupancy_bytes = llc_occupancy_bytes;),</div><div class='add'>+	    TP_printk("ctrl_hw_id=%u mon_hw_id=%u domain_id=%d llc_occupancy_bytes=%llu",</div><div class='add'>+		      __entry-&gt;ctrl_hw_id, __entry-&gt;mon_hw_id, __entry-&gt;domain_id,</div><div class='add'>+		      __entry-&gt;llc_occupancy_bytes)</div><div class='add'>+	   );</div><div class='add'>+</div><div class='add'>+#endif /* _TRACE_RESCTRL_H */</div><div class='ctx'> </div><div class='ctx'> #undef TRACE_INCLUDE_PATH</div><div class='ctx'> #define TRACE_INCLUDE_PATH .</div><div class='del'>-#define TRACE_INCLUDE_FILE pseudo_lock_event</div><div class='add'>+#define TRACE_INCLUDE_FILE trace</div><div class='ctx'> #include &lt;trace/define_trace.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topology_amd.c<br/>index a7aa6eff4ae5..d419deed6a48 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology_amd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/topology_amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology_amd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/topology_amd.c</a></div><div class='hunk'>@@ -58,7 +58,7 @@ static void store_node(struct topo_scan *tscan, u16 nr_nodes, u16 node_id)</div><div class='ctx'> 	tscan-&gt;amd_node_id = node_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool parse_8000_001e(struct topo_scan *tscan, bool has_0xb)</div><div class='add'>+static bool parse_8000_001e(struct topo_scan *tscan, bool has_topoext)</div><div class='ctx'> {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		// eax</div><div class='hunk'>@@ -86,7 +86,7 @@ static bool parse_8000_001e(struct topo_scan *tscan, bool has_0xb)</div><div class='ctx'> 	 * If leaf 0xb is available, then the domain shifts are set</div><div class='ctx'> 	 * already and nothing to do here.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!has_0xb) {</div><div class='add'>+	if (!has_topoext) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Leaf 0x80000008 set the CORE domain shift already.</div><div class='ctx'> 		 * Update the SMT domain, but do not propagate it.</div><div class='hunk'>@@ -119,7 +119,7 @@ static bool parse_8000_001e(struct topo_scan *tscan, bool has_0xb)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool parse_fam10h_node_id(struct topo_scan *tscan)</div><div class='add'>+static void parse_fam10h_node_id(struct topo_scan *tscan)</div><div class='ctx'> {</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -131,20 +131,20 @@ static bool parse_fam10h_node_id(struct topo_scan *tscan)</div><div class='ctx'> 	} nid;</div><div class='ctx'> </div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_NODEID_MSR))</div><div class='del'>-		return false;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	rdmsrl(MSR_FAM10H_NODE_ID, nid.msr);</div><div class='ctx'> 	store_node(tscan, nid.nodes_per_pkg + 1, nid.node_id);</div><div class='ctx'> 	tscan-&gt;c-&gt;topo.llc_id = nid.node_id;</div><div class='del'>-	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void legacy_set_llc(struct topo_scan *tscan)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int apicid = tscan-&gt;c-&gt;topo.initial_apicid;</div><div class='ctx'> </div><div class='del'>-	/* parse_8000_0008() set everything up except llc_id */</div><div class='del'>-	tscan-&gt;c-&gt;topo.llc_id = apicid &gt;&gt; tscan-&gt;dom_shifts[TOPO_CORE_DOMAIN];</div><div class='add'>+	/* If none of the parsers set LLC ID then use the die ID for it. */</div><div class='add'>+	if (tscan-&gt;c-&gt;topo.llc_id == BAD_APICID)</div><div class='add'>+		tscan-&gt;c-&gt;topo.llc_id = apicid &gt;&gt; tscan-&gt;dom_shifts[TOPO_CORE_DOMAIN];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void topoext_fixup(struct topo_scan *tscan)</div><div class='hunk'>@@ -169,28 +169,28 @@ static void topoext_fixup(struct topo_scan *tscan)</div><div class='ctx'> </div><div class='ctx'> static void parse_topology_amd(struct topo_scan *tscan)</div><div class='ctx'> {</div><div class='del'>-	bool has_0xb = false;</div><div class='add'>+	bool has_topoext = false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the extended topology leaf 0x8000_001e is available</div><div class='del'>-	 * try to get SMT and CORE shift from leaf 0xb first, then</div><div class='del'>-	 * try to get the CORE shift from leaf 0x8000_0008.</div><div class='add'>+	 * try to get SMT, CORE, TILE, and DIE shifts from extended</div><div class='add'>+	 * CPUID leaf 0x8000_0026 on supported processors first. If</div><div class='add'>+	 * extended CPUID leaf 0x8000_0026 is not supported, try to</div><div class='add'>+	 * get SMT and CORE shift from leaf 0xb first, then try to</div><div class='add'>+	 * get the CORE shift from leaf 0x8000_0008.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_TOPOEXT))</div><div class='del'>-		has_0xb = cpu_parse_topology_ext(tscan);</div><div class='add'>+		has_topoext = cpu_parse_topology_ext(tscan);</div><div class='ctx'> </div><div class='del'>-	if (!has_0xb &amp;&amp; !parse_8000_0008(tscan))</div><div class='add'>+	if (!has_topoext &amp;&amp; !parse_8000_0008(tscan))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Prefer leaf 0x8000001e if available */</div><div class='del'>-	if (parse_8000_001e(tscan, has_0xb))</div><div class='add'>+	if (parse_8000_001e(tscan, has_topoext))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Try the NODEID MSR */</div><div class='del'>-	if (parse_fam10h_node_id(tscan))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	legacy_set_llc(tscan);</div><div class='add'>+	parse_fam10h_node_id(tscan);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cpu_parse_topology_amd(struct topo_scan *tscan)</div><div class='hunk'>@@ -198,6 +198,7 @@ void cpu_parse_topology_amd(struct topo_scan *tscan)</div><div class='ctx'> 	tscan-&gt;amd_nodes_per_pkg = 1;</div><div class='ctx'> 	topoext_fixup(tscan);</div><div class='ctx'> 	parse_topology_amd(tscan);</div><div class='add'>+	legacy_set_llc(tscan);</div><div class='ctx'> </div><div class='ctx'> 	if (tscan-&gt;amd_nodes_per_pkg &gt; 1)</div><div class='ctx'> 		set_cpu_cap(tscan-&gt;c, X86_FEATURE_AMD_DCM);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/topology_ext.c b/arch/x86/kernel/cpu/topology_ext.c<br/>index e477228cd5b2..467b0326bf1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology_ext.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/cpu/topology_ext.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology_ext.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/cpu/topology_ext.c</a></div><div class='hunk'>@@ -13,7 +13,10 @@ enum topo_types {</div><div class='ctx'> 	CORE_TYPE		= 2,</div><div class='ctx'> 	MAX_TYPE_0B		= 3,</div><div class='ctx'> 	MODULE_TYPE		= 3,</div><div class='add'>+	AMD_CCD_TYPE		= 3,</div><div class='ctx'> 	TILE_TYPE		= 4,</div><div class='add'>+	AMD_SOCKET_TYPE		= 4,</div><div class='add'>+	MAX_TYPE_80000026	= 5,</div><div class='ctx'> 	DIE_TYPE		= 5,</div><div class='ctx'> 	DIEGRP_TYPE		= 6,</div><div class='ctx'> 	MAX_TYPE_1F		= 7,</div><div class='hunk'>@@ -32,6 +35,13 @@ static const unsigned int topo_domain_map_0b_1f[MAX_TYPE_1F] = {</div><div class='ctx'> 	[DIEGRP_TYPE]	= TOPO_DIEGRP_DOMAIN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const unsigned int topo_domain_map_80000026[MAX_TYPE_80000026] = {</div><div class='add'>+	[SMT_TYPE]		= TOPO_SMT_DOMAIN,</div><div class='add'>+	[CORE_TYPE]		= TOPO_CORE_DOMAIN,</div><div class='add'>+	[AMD_CCD_TYPE]		= TOPO_TILE_DOMAIN,</div><div class='add'>+	[AMD_SOCKET_TYPE]	= TOPO_DIE_DOMAIN,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline bool topo_subleaf(struct topo_scan *tscan, u32 leaf, u32 subleaf,</div><div class='ctx'> 				unsigned int *last_dom)</div><div class='ctx'> {</div><div class='hunk'>@@ -56,6 +66,7 @@ static inline bool topo_subleaf(struct topo_scan *tscan, u32 leaf, u32 subleaf,</div><div class='ctx'> 	switch (leaf) {</div><div class='ctx'> 	case 0x0b: maxtype = MAX_TYPE_0B; map = topo_domain_map_0b_1f; break;</div><div class='ctx'> 	case 0x1f: maxtype = MAX_TYPE_1F; map = topo_domain_map_0b_1f; break;</div><div class='add'>+	case 0x80000026: maxtype = MAX_TYPE_80000026; map = topo_domain_map_80000026; break;</div><div class='ctx'> 	default: return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -125,6 +136,10 @@ bool cpu_parse_topology_ext(struct topo_scan *tscan)</div><div class='ctx'> 	if (tscan-&gt;c-&gt;cpuid_level &gt;= 0x1f &amp;&amp; parse_topology_leaf(tscan, 0x1f))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	/* AMD: Try leaf 0x80000026 first. */</div><div class='add'>+	if (tscan-&gt;c-&gt;extended_cpuid_level &gt;= 0x80000026 &amp;&amp; parse_topology_leaf(tscan, 0x80000026))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	/* Intel/AMD: Fall back to leaf 0xB if available */</div><div class='ctx'> 	return tscan-&gt;c-&gt;cpuid_level &gt;= 0x0b &amp;&amp; parse_topology_leaf(tscan, 0x0b);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c<br/>index 003e0298f46a..8e3c53b4d070 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/devicetree.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/devicetree.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/devicetree.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/devicetree.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='add'>+#include &lt;asm/numa.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> </div><div class='ctx'> __initdata u64 initial_dtb;</div><div class='hunk'>@@ -137,6 +138,7 @@ static void __init dtb_cpu_setup(void)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		topology_register_apic(apic_id, CPU_ACPIID_INVALID, true);</div><div class='add'>+		set_apicid_to_node(apic_id, of_node_to_nid(dn));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -277,9 +279,18 @@ static void __init dtb_apic_setup(void)</div><div class='ctx'> 	dtb_ioapic_setup();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF_EARLY_FLATTREE</div><div class='add'>+static void __init x86_dtb_parse_smp_config(void)</div><div class='add'>+{</div><div class='add'>+	if (!of_have_populated_dt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dtb_setup_hpet();</div><div class='add'>+	dtb_apic_setup();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init x86_flattree_get_config(void)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_OF_EARLY_FLATTREE</div><div class='ctx'> 	u32 size, map_len;</div><div class='ctx'> 	void *dt;</div><div class='ctx'> </div><div class='hunk'>@@ -301,14 +312,7 @@ void __init x86_flattree_get_config(void)</div><div class='ctx'> </div><div class='ctx'> 	if (initial_dtb)</div><div class='ctx'> 		early_memunmap(dt, map_len);</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-void __init x86_dtb_parse_smp_config(void)</div><div class='del'>-{</div><div class='del'>-	if (!of_have_populated_dt())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dtb_setup_hpet();</div><div class='del'>-	dtb_apic_setup();</div><div class='add'>+	if (of_have_populated_dt())</div><div class='add'>+		x86_init.mpparse.parse_smp_cfg = x86_dtb_parse_smp_config;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c<br/>index 44a91ef5a23b..a7d562697e50 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/dumpstack.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/dumpstack.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/dumpstack.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/dumpstack.c</a></div><div class='hunk'>@@ -405,8 +405,8 @@ static void __die_header(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> 		pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEFAULT</div><div class='del'>-	       "%s: %04lx [#%d]%s%s%s%s%s\n", str, err &amp; 0xffff, ++die_counter,</div><div class='del'>-	       pr,</div><div class='add'>+	       "Oops: %s: %04lx [#%d]%s%s%s%s%s\n", str, err &amp; 0xffff,</div><div class='add'>+	       ++die_counter, pr,</div><div class='ctx'> 	       IS_ENABLED(CONFIG_SMP)     ? " SMP"             : "",</div><div class='ctx'> 	       debug_pagealloc_enabled()  ? " DEBUG_PAGEALLOC" : "",</div><div class='ctx'> 	       IS_ENABLED(CONFIG_KASAN)   ? " KASAN"           : "",</div><div class='head'>diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c<br/>index 6f1b379e3b38..68b09f718f10 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/e820.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/e820.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/e820.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/e820.c</a></div><div class='hunk'>@@ -532,9 +532,10 @@ u64 __init e820__range_update(u64 start, u64 size, enum e820_type old_type, enum</div><div class='ctx'> 	return __e820__range_update(e820_table, start, size, old_type, new_type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 __init e820__range_update_kexec(u64 start, u64 size, enum e820_type old_type, enum e820_type  new_type)</div><div class='add'>+u64 __init e820__range_update_table(struct e820_table *t, u64 start, u64 size,</div><div class='add'>+				    enum e820_type old_type, enum e820_type new_type)</div><div class='ctx'> {</div><div class='del'>-	return __e820__range_update(e820_table_kexec, start, size, old_type, new_type);</div><div class='add'>+	return __e820__range_update(t, start, size, old_type, new_type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Remove a range of memory from the E820 table: */</div><div class='hunk'>@@ -806,7 +807,7 @@ u64 __init e820__memblock_alloc_reserved(u64 size, u64 align)</div><div class='ctx'> </div><div class='ctx'> 	addr = memblock_phys_alloc(size, align);</div><div class='ctx'> 	if (addr) {</div><div class='del'>-		e820__range_update_kexec(addr, size, E820_TYPE_RAM, E820_TYPE_RESERVED);</div><div class='add'>+		e820__range_update_table(e820_table_kexec, addr, size, E820_TYPE_RAM, E820_TYPE_RESERVED);</div><div class='ctx'> 		pr_info("update e820_table_kexec for e820__memblock_alloc_reserved()\n");</div><div class='ctx'> 		e820__update_table_kexec();</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c<br/>index 520deb411a70..1209c7aebb21 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/fpu/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/fpu/core.c</a></div><div class='hunk'>@@ -145,8 +145,8 @@ void restore_fpregs_from_fpstate(struct fpstate *fpstate, u64 mask)</div><div class='ctx'> 		asm volatile(</div><div class='ctx'> 			"fnclex\n\t"</div><div class='ctx'> 			"emms\n\t"</div><div class='del'>-			"fildl %P[addr]"	/* set F?P to defined value */</div><div class='del'>-			: : [addr] "m" (fpstate));</div><div class='add'>+			"fildl %[addr]"	/* set F?P to defined value */</div><div class='add'>+			: : [addr] "m" (*fpstate));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (use_xsave()) {</div><div class='head'>diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c<br/>index 33a214b1a4ce..6276329f5e66 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/xstate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/fpu/xstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/xstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/fpu/xstate.c</a></div><div class='hunk'>@@ -1434,8 +1434,8 @@ static bool xstate_op_valid(struct fpstate *fpstate, u64 mask, bool rstor)</div><div class='ctx'> 		return rstor;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * XSAVE(S): clone(), fpu_swap_kvm_fpu()</div><div class='del'>-	 * XRSTORS(S): fpu_swap_kvm_fpu()</div><div class='add'>+	 * XSAVE(S): clone(), fpu_swap_kvm_fpstate()</div><div class='add'>+	 * XRSTORS(S): fpu_swap_kvm_fpstate()</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c<br/>index 70139d9d2e01..8da0e66ca22d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/ftrace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/ftrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/ftrace.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/set_memory.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;trace/syscall.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -260,25 +261,14 @@ void arch_ftrace_update_code(int command)</div><div class='ctx'> /* Currently only x86_64 supports dynamic trampolines */</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='del'>-#include &lt;linux/moduleloader.h&gt;</div><div class='del'>-/* Module allocation simplifies allocating memory for code */</div><div class='ctx'> static inline void *alloc_tramp(unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	return module_alloc(size);</div><div class='add'>+	return execmem_alloc(EXECMEM_FTRACE, size);</div><div class='ctx'> }</div><div class='ctx'> static inline void tramp_free(void *tramp)</div><div class='ctx'> {</div><div class='del'>-	module_memfree(tramp);</div><div class='add'>+	execmem_free(tramp);</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-/* Trampolines can only be created if modules are supported */</div><div class='del'>-static inline void *alloc_tramp(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-static inline void tramp_free(void *tramp) { }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /* Defined as markers to the end of the ftrace default trampolines */</div><div class='ctx'> extern void ftrace_regs_caller_end(void);</div><div class='head'>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S<br/>index b50f3641c4d6..2e42056d2306 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_32.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/head_32.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_32.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/head_32.S</a></div><div class='hunk'>@@ -44,9 +44,6 @@</div><div class='ctx'> #define X86_CAPABILITY	new_cpu_data+CPUINFO_x86_capability</div><div class='ctx'> #define X86_VENDOR_ID	new_cpu_data+CPUINFO_x86_vendor_id</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define SIZEOF_PTREGS 17*4</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Worst-case size of the kernel mapping we need to make:</div><div class='ctx'>  * a relocatable kernel can live anywhere in lowmem, so we need to be able</div><div class='hunk'>@@ -488,19 +485,13 @@ SYM_DATA_END(initial_page_table)</div><div class='ctx'> </div><div class='ctx'> .data</div><div class='ctx'> .balign 4</div><div class='del'>-/*</div><div class='del'>- * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder</div><div class='del'>- * reliably detect the end of the stack.</div><div class='del'>- */</div><div class='del'>-SYM_DATA(initial_stack,</div><div class='del'>-		.long init_thread_union + THREAD_SIZE -</div><div class='del'>-		SIZEOF_PTREGS - TOP_OF_KERNEL_STACK_PADDING)</div><div class='add'>+SYM_DATA(initial_stack, .long __top_init_kernel_stack)</div><div class='ctx'> </div><div class='ctx'> __INITRODATA</div><div class='ctx'> int_msg:</div><div class='ctx'> 	.asciz "Unknown interrupt or fault at: %p %p %p\n"</div><div class='ctx'> </div><div class='del'>-#include "../../x86/xen/xen-head.S"</div><div class='add'>+#include "../xen/xen-head.S"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The IDT and GDT 'descriptors' are a strange 48-bit object</div><div class='head'>diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S<br/>index d8198fbd70e5..330922b328bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_64.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/head_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_64.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/head_64.S</a></div><div class='hunk'>@@ -66,7 +66,7 @@ SYM_CODE_START_NOALIGN(startup_64)</div><div class='ctx'> 	mov	%rsi, %r15</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the stack for verify_cpu() */</div><div class='del'>-	leaq	(__end_init_task - TOP_OF_KERNEL_STACK_PADDING - PTREGS_SIZE)(%rip), %rsp</div><div class='add'>+	leaq	__top_init_kernel_stack(%rip), %rsp</div><div class='ctx'> </div><div class='ctx'> 	/* Setup GSBASE to allow stack canary access for C code */</div><div class='ctx'> 	movl	$MSR_GS_BASE, %ecx</div><div class='hunk'>@@ -720,7 +720,7 @@ SYM_DATA(smpboot_control,		.long 0)</div><div class='ctx'> SYM_DATA(phys_base, .quad 0x0)</div><div class='ctx'> EXPORT_SYMBOL(phys_base)</div><div class='ctx'> </div><div class='del'>-#include "../../x86/xen/xen-head.S"</div><div class='add'>+#include "../xen/xen-head.S"</div><div class='ctx'> </div><div class='ctx'> 	__PAGE_ALIGNED_BSS</div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(empty_zero_page)</div><div class='head'>diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c<br/>index fc37c8d83daf..f445bec516a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/idt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/idt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/idt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/idt.c</a></div><div class='hunk'>@@ -163,6 +163,9 @@ static const __initconst struct idt_data apic_idts[] = {</div><div class='ctx'> # endif</div><div class='ctx'> 	INTG(SPURIOUS_APIC_VECTOR,		asm_sysvec_spurious_apic_interrupt),</div><div class='ctx'> 	INTG(ERROR_APIC_VECTOR,			asm_sysvec_error_interrupt),</div><div class='add'>+# ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+	INTG(POSTED_MSI_NOTIFICATION_VECTOR,	asm_sysvec_posted_msi_notification),</div><div class='add'>+# endif</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c<br/>index 35fde0107901..385e3a5fc304 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/irq.c</a></div><div class='hunk'>@@ -22,6 +22,8 @@</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/thermal.h&gt;</div><div class='add'>+#include &lt;asm/posted_intr.h&gt;</div><div class='add'>+#include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include &lt;asm/trace/irq_vectors.h&gt;</div><div class='hunk'>@@ -182,6 +184,13 @@ int arch_show_interrupts(struct seq_file *p, int prec)</div><div class='ctx'> 			   irq_stats(j)-&gt;kvm_posted_intr_wakeup_ipis);</div><div class='ctx'> 	seq_puts(p, "  Posted-interrupt wakeup event\n");</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+	seq_printf(p, "%*s: ", prec, "PMN");</div><div class='add'>+	for_each_online_cpu(j)</div><div class='add'>+		seq_printf(p, "%10u ",</div><div class='add'>+			   irq_stats(j)-&gt;posted_msi_notification_count);</div><div class='add'>+	seq_puts(p, "  Posted MSI notification event\n");</div><div class='add'>+#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -240,24 +249,16 @@ static __always_inline void handle_irq(struct irq_desc *desc,</div><div class='ctx'> 		__handle_irq(desc, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * common_interrupt() handles all normal device IRQ's (the special SMP</div><div class='del'>- * cross-CPU interrupts have their own entry points).</div><div class='del'>- */</div><div class='del'>-DEFINE_IDTENTRY_IRQ(common_interrupt)</div><div class='add'>+static __always_inline int call_irq_handler(int vector, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='ctx'> 	struct irq_desc *desc;</div><div class='del'>-</div><div class='del'>-	/* entry code tells RCU that we're not quiescent.  Check it. */</div><div class='del'>-	RCU_LOCKDEP_WARN(!rcu_is_watching(), "IRQ failed to wake up RCU");</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	desc = __this_cpu_read(vector_irq[vector]);</div><div class='ctx'> 	if (likely(!IS_ERR_OR_NULL(desc))) {</div><div class='ctx'> 		handle_irq(desc, regs);</div><div class='ctx'> 	} else {</div><div class='del'>-		apic_eoi();</div><div class='del'>-</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		if (desc == VECTOR_UNUSED) {</div><div class='ctx'> 			pr_emerg_ratelimited("%s: %d.%u No irq handler for vector\n",</div><div class='ctx'> 					     __func__, smp_processor_id(),</div><div class='hunk'>@@ -267,6 +268,23 @@ DEFINE_IDTENTRY_IRQ(common_interrupt)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * common_interrupt() handles all normal device IRQ's (the special SMP</div><div class='add'>+ * cross-CPU interrupts have their own entry points).</div><div class='add'>+ */</div><div class='add'>+DEFINE_IDTENTRY_IRQ(common_interrupt)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='add'>+</div><div class='add'>+	/* entry code tells RCU that we're not quiescent.  Check it. */</div><div class='add'>+	RCU_LOCKDEP_WARN(!rcu_is_watching(), "IRQ failed to wake up RCU");</div><div class='add'>+</div><div class='add'>+	if (unlikely(call_irq_handler(vector, regs)))</div><div class='add'>+		apic_eoi();</div><div class='add'>+</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -334,12 +352,139 @@ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_nested_ipi)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_POSTED_MSI</div><div class='add'>+</div><div class='add'>+/* Posted Interrupt Descriptors for coalesced MSIs to be posted */</div><div class='add'>+DEFINE_PER_CPU_ALIGNED(struct pi_desc, posted_msi_pi_desc);</div><div class='add'>+</div><div class='add'>+void intel_posted_msi_init(void)</div><div class='add'>+{</div><div class='add'>+	u32 destination;</div><div class='add'>+	u32 apic_id;</div><div class='add'>+</div><div class='add'>+	this_cpu_write(posted_msi_pi_desc.nv, POSTED_MSI_NOTIFICATION_VECTOR);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * APIC destination ID is stored in bit 8:15 while in XAPIC mode.</div><div class='add'>+	 * VT-d spec. CH 9.11</div><div class='add'>+	 */</div><div class='add'>+	apic_id = this_cpu_read(x86_cpu_to_apicid);</div><div class='add'>+	destination = x2apic_enabled() ? apic_id : apic_id &lt;&lt; 8;</div><div class='add'>+	this_cpu_write(posted_msi_pi_desc.ndst, destination);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * De-multiplexing posted interrupts is on the performance path, the code</div><div class='add'>+ * below is written to optimize the cache performance based on the following</div><div class='add'>+ * considerations:</div><div class='add'>+ * 1.Posted interrupt descriptor (PID) fits in a cache line that is frequently</div><div class='add'>+ *   accessed by both CPU and IOMMU.</div><div class='add'>+ * 2.During posted MSI processing, the CPU needs to do 64-bit read and xchg</div><div class='add'>+ *   for checking and clearing posted interrupt request (PIR), a 256 bit field</div><div class='add'>+ *   within the PID.</div><div class='add'>+ * 3.On the other side, the IOMMU does atomic swaps of the entire PID cache</div><div class='add'>+ *   line when posting interrupts and setting control bits.</div><div class='add'>+ * 4.The CPU can access the cache line a magnitude faster than the IOMMU.</div><div class='add'>+ * 5.Each time the IOMMU does interrupt posting to the PIR will evict the PID</div><div class='add'>+ *   cache line. The cache line states after each operation are as follows:</div><div class='add'>+ *   CPU		IOMMU			PID Cache line state</div><div class='add'>+ *   ---------------------------------------------------------------</div><div class='add'>+ *...read64					exclusive</div><div class='add'>+ *...lock xchg64				modified</div><div class='add'>+ *...			post/atomic swap	invalid</div><div class='add'>+ *...-------------------------------------------------------------</div><div class='add'>+ *</div><div class='add'>+ * To reduce L1 data cache miss, it is important to avoid contention with</div><div class='add'>+ * IOMMU's interrupt posting/atomic swap. Therefore, a copy of PIR is used</div><div class='add'>+ * to dispatch interrupt handlers.</div><div class='add'>+ *</div><div class='add'>+ * In addition, the code is trying to keep the cache line state consistent</div><div class='add'>+ * as much as possible. e.g. when making a copy and clearing the PIR</div><div class='add'>+ * (assuming non-zero PIR bits are present in the entire PIR), it does:</div><div class='add'>+ *		read, read, read, read, xchg, xchg, xchg, xchg</div><div class='add'>+ * instead of:</div><div class='add'>+ *		read, xchg, read, xchg, read, xchg, read, xchg</div><div class='add'>+ */</div><div class='add'>+static __always_inline bool handle_pending_pir(u64 *pir, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int i, vec = FIRST_EXTERNAL_VECTOR;</div><div class='add'>+	unsigned long pir_copy[4];</div><div class='add'>+	bool handled = false;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++)</div><div class='add'>+		pir_copy[i] = pir[i];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		if (!pir_copy[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pir_copy[i] = arch_xchg(&amp;pir[i], 0);</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (handled) {</div><div class='add'>+		for_each_set_bit_from(vec, pir_copy, FIRST_SYSTEM_VECTOR)</div><div class='add'>+			call_irq_handler(vec, regs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Performance data shows that 3 is good enough to harvest 90+% of the benefit</div><div class='add'>+ * on high IRQ rate workload.</div><div class='add'>+ */</div><div class='add'>+#define MAX_POSTED_MSI_COALESCING_LOOP 3</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For MSIs that are delivered as posted interrupts, the CPU notifications</div><div class='add'>+ * can be coalesced if the MSIs arrive in high frequency bursts.</div><div class='add'>+ */</div><div class='add'>+DEFINE_IDTENTRY_SYSVEC(sysvec_posted_msi_notification)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='add'>+	struct pi_desc *pid;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	pid = this_cpu_ptr(&amp;posted_msi_pi_desc);</div><div class='add'>+</div><div class='add'>+	inc_irq_stat(posted_msi_notification_count);</div><div class='add'>+	irq_enter();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Max coalescing count includes the extra round of handle_pending_pir</div><div class='add'>+	 * after clearing the outstanding notification bit. Hence, at most</div><div class='add'>+	 * MAX_POSTED_MSI_COALESCING_LOOP - 1 loops are executed here.</div><div class='add'>+	 */</div><div class='add'>+	while (++i &lt; MAX_POSTED_MSI_COALESCING_LOOP) {</div><div class='add'>+		if (!handle_pending_pir(pid-&gt;pir64, regs))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear outstanding notification bit to allow new IRQ notifications,</div><div class='add'>+	 * do this last to maximize the window of interrupt coalescing.</div><div class='add'>+	 */</div><div class='add'>+	pi_clear_on(pid);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There could be a race of PI notification and the clearing of ON bit,</div><div class='add'>+	 * process PIR bits one last time such that handling the new interrupts</div><div class='add'>+	 * are not delayed until the next IRQ.</div><div class='add'>+	 */</div><div class='add'>+	handle_pending_pir(pid-&gt;pir64, regs);</div><div class='add'>+</div><div class='add'>+	apic_eoi();</div><div class='add'>+	irq_exit();</div><div class='add'>+	set_irq_regs(old_regs);</div><div class='add'>+}</div><div class='add'>+#endif /* X86_POSTED_MSI */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='ctx'> /* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */</div><div class='ctx'> void fixup_irqs(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int irr, vector;</div><div class='add'>+	unsigned int vector;</div><div class='ctx'> 	struct irq_desc *desc;</div><div class='ctx'> 	struct irq_data *data;</div><div class='ctx'> 	struct irq_chip *chip;</div><div class='hunk'>@@ -366,8 +511,7 @@ void fixup_irqs(void)</div><div class='ctx'> 		if (IS_ERR_OR_NULL(__this_cpu_read(vector_irq[vector])))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		irr = apic_read(APIC_IRR + (vector / 32 * 0x10));</div><div class='del'>-		if (irr  &amp; (1 &lt;&lt; (vector % 32))) {</div><div class='add'>+		if (is_vector_pending(vector)) {</div><div class='ctx'> 			desc = __this_cpu_read(vector_irq[vector]);</div><div class='ctx'> </div><div class='ctx'> 			raw_spin_lock(&amp;desc-&gt;lock);</div><div class='head'>diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c<br/>index d0e49bd7c6f3..72e6a45e7ec2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/kprobes/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/kprobes/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/kprobes/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/kprobes/core.c</a></div><div class='hunk'>@@ -40,12 +40,12 @@</div><div class='ctx'> #include &lt;linux/kgdb.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/kasan.h&gt;</div><div class='del'>-#include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/objtool.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;linux/set_memory.h&gt;</div><div class='ctx'> #include &lt;linux/cfi.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='hunk'>@@ -495,7 +495,7 @@ void *alloc_insn_page(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *page;</div><div class='ctx'> </div><div class='del'>-	page = module_alloc(PAGE_SIZE);</div><div class='add'>+	page = execmem_alloc(EXECMEM_KPROBES, PAGE_SIZE);</div><div class='ctx'> 	if (!page)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c<br/>index 7f0732bc0ccd..263f8aed4e2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/kvm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/kvm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/kvm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/kvm.c</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='ctx'> </div><div class='del'>-DEFINE_STATIC_KEY_FALSE(kvm_async_pf_enabled);</div><div class='add'>+DEFINE_STATIC_KEY_FALSE_RO(kvm_async_pf_enabled);</div><div class='ctx'> </div><div class='ctx'> static int kvmapf = 1;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/module.c b/arch/x86/kernel/module.c<br/>index e18914c0e38a..837450b6e882 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/module.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/module.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/module.c</a></div><div class='hunk'>@@ -36,57 +36,6 @@ do {							\</div><div class='ctx'> } while (0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_RANDOMIZE_BASE</div><div class='del'>-static unsigned long module_load_offset;</div><div class='del'>-</div><div class='del'>-/* Mutex protects the module_load_offset. */</div><div class='del'>-static DEFINE_MUTEX(module_kaslr_mutex);</div><div class='del'>-</div><div class='del'>-static unsigned long int get_module_load_offset(void)</div><div class='del'>-{</div><div class='del'>-	if (kaslr_enabled()) {</div><div class='del'>-		mutex_lock(&amp;module_kaslr_mutex);</div><div class='del'>-		/*</div><div class='del'>-		 * Calculate the module_load_offset the first time this</div><div class='del'>-		 * code is called. Once calculated it stays the same until</div><div class='del'>-		 * reboot.</div><div class='del'>-		 */</div><div class='del'>-		if (module_load_offset == 0)</div><div class='del'>-			module_load_offset =</div><div class='del'>-				get_random_u32_inclusive(1, 1024) * PAGE_SIZE;</div><div class='del'>-		mutex_unlock(&amp;module_kaslr_mutex);</div><div class='del'>-	}</div><div class='del'>-	return module_load_offset;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static unsigned long int get_module_load_offset(void)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void *module_alloc(unsigned long size)</div><div class='del'>-{</div><div class='del'>-	gfp_t gfp_mask = GFP_KERNEL;</div><div class='del'>-	void *p;</div><div class='del'>-</div><div class='del'>-	if (PAGE_ALIGN(size) &gt; MODULES_LEN)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	p = __vmalloc_node_range(size, MODULE_ALIGN,</div><div class='del'>-				 MODULES_VADDR + get_module_load_offset(),</div><div class='del'>-				 MODULES_END, gfp_mask, PAGE_KERNEL,</div><div class='del'>-				 VM_FLUSH_RESET_PERMS | VM_DEFER_KMEMLEAK,</div><div class='del'>-				 NUMA_NO_NODE, __builtin_return_address(0));</div><div class='del'>-</div><div class='del'>-	if (p &amp;&amp; (kasan_alloc_module_shadow(p, size, gfp_mask) &lt; 0)) {</div><div class='del'>-		vfree(p);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return p;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> int apply_relocate(Elf32_Shdr *sechdrs,</div><div class='ctx'> 		   const char *strtab,</div><div class='head'>diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c<br/>index 7062b84dd467..6d3d20e3e43a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/process_64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/process_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/process_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/process_64.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ void __show_regs(struct pt_regs *regs, enum show_regs_mode mode,</div><div class='ctx'> 		       log_lvl, d3, d6, d7);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_OSPKE))</div><div class='add'>+	if (cr4 &amp; X86_CR4_PKE)</div><div class='ctx'> 		printk("%sPKRU: %08x\n", log_lvl, read_pkru());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c<br/>index 2e7066980f3e..51a849a79c98 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/rtc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/rtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/rtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/rtc.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;asm/vsyscall.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='del'>-#include &lt;asm/intel-mid.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='head'>diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c<br/>index e125e059e2c4..55a1fc332e20 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/setup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/setup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/setup.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='ctx'> #include &lt;linux/dma-map-ops.h&gt;</div><div class='ctx'> #include &lt;linux/efi.h&gt;</div><div class='hunk'>@@ -753,6 +754,22 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	boot_cpu_data.x86_phys_bits = MAX_PHYSMEM_BITS;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_CMDLINE_BOOL</div><div class='add'>+#ifdef CONFIG_CMDLINE_OVERRIDE</div><div class='add'>+	strscpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);</div><div class='add'>+#else</div><div class='add'>+	if (builtin_cmdline[0]) {</div><div class='add'>+		/* append boot loader cmdline to builtin */</div><div class='add'>+		strlcat(builtin_cmdline, " ", COMMAND_LINE_SIZE);</div><div class='add'>+		strlcat(builtin_cmdline, boot_command_line, COMMAND_LINE_SIZE);</div><div class='add'>+		strscpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	strscpy(command_line, boot_command_line, COMMAND_LINE_SIZE);</div><div class='add'>+	*cmdline_p = command_line;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we have OLPC OFW, we might end up relocating the fixmap due to</div><div class='ctx'> 	 * reserve_top(), so do this before touching the ioremap area.</div><div class='hunk'>@@ -832,22 +849,6 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	bss_resource.start = __pa_symbol(__bss_start);</div><div class='ctx'> 	bss_resource.end = __pa_symbol(__bss_stop)-1;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CMDLINE_BOOL</div><div class='del'>-#ifdef CONFIG_CMDLINE_OVERRIDE</div><div class='del'>-	strscpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);</div><div class='del'>-#else</div><div class='del'>-	if (builtin_cmdline[0]) {</div><div class='del'>-		/* append boot loader cmdline to builtin */</div><div class='del'>-		strlcat(builtin_cmdline, " ", COMMAND_LINE_SIZE);</div><div class='del'>-		strlcat(builtin_cmdline, boot_command_line, COMMAND_LINE_SIZE);</div><div class='del'>-		strscpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	strscpy(command_line, boot_command_line, COMMAND_LINE_SIZE);</div><div class='del'>-	*cmdline_p = command_line;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * x86_configure_nx() is called before parse_early_param() to detect</div><div class='ctx'> 	 * whether hardware doesn't support NX (so that the early EHCI debug</div><div class='hunk'>@@ -1218,3 +1219,10 @@ static int __init register_kernel_offset_dumper(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> __initcall(register_kernel_offset_dumper);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+bool arch_cpu_is_hotpluggable(int cpu)</div><div class='add'>+{</div><div class='add'>+	return cpu &gt; 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_HOTPLUG_CPU */</div><div class='head'>diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c<br/>index 8b04958da5e7..b4f8fa0f722c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/sev-shared.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/sev-shared.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/sev-shared.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/sev-shared.c</a></div><div class='hunk'>@@ -1203,12 +1203,14 @@ static enum es_result vc_check_opcode_bytes(struct es_em_ctxt *ctxt,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SVM_EXIT_MONITOR:</div><div class='del'>-		if (opcode == 0x010f &amp;&amp; modrm == 0xc8)</div><div class='add'>+		/* MONITOR and MONITORX instructions generate the same error code */</div><div class='add'>+		if (opcode == 0x010f &amp;&amp; (modrm == 0xc8 || modrm == 0xfa))</div><div class='ctx'> 			return ES_OK;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SVM_EXIT_MWAIT:</div><div class='del'>-		if (opcode == 0x010f &amp;&amp; modrm == 0xc9)</div><div class='add'>+		/* MWAIT and MWAITX instructions generate the same error code */</div><div class='add'>+		if (opcode == 0x010f &amp;&amp; (modrm == 0xc9 || modrm == 0xfb))</div><div class='ctx'> 			return ES_OK;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c<br/>index 38ad066179d8..3342ed58e168 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/sev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/sev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/sev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/sev.c</a></div><div class='hunk'>@@ -648,7 +648,7 @@ static u64 __init get_secrets_page(void)</div><div class='ctx'> </div><div class='ctx'> static u64 __init get_snp_jump_table_addr(void)</div><div class='ctx'> {</div><div class='del'>-	struct snp_secrets_page_layout *layout;</div><div class='add'>+	struct snp_secrets_page *secrets;</div><div class='ctx'> 	void __iomem *mem;</div><div class='ctx'> 	u64 pa, addr;</div><div class='ctx'> </div><div class='hunk'>@@ -662,9 +662,9 @@ static u64 __init get_snp_jump_table_addr(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	layout = (__force struct snp_secrets_page_layout *)mem;</div><div class='add'>+	secrets = (__force struct snp_secrets_page *)mem;</div><div class='ctx'> </div><div class='del'>-	addr = layout-&gt;os_area.ap_jump_table_pa;</div><div class='add'>+	addr = secrets-&gt;os_area.ap_jump_table_pa;</div><div class='ctx'> 	iounmap(mem);</div><div class='ctx'> </div><div class='ctx'> 	return addr;</div><div class='hunk'>@@ -938,7 +938,7 @@ static int snp_set_vmsa(void *va, bool vmsa)</div><div class='ctx'> #define INIT_LDTR_ATTRIBS	(SVM_SELECTOR_P_MASK | 2)</div><div class='ctx'> #define INIT_TR_ATTRIBS		(SVM_SELECTOR_P_MASK | 3)</div><div class='ctx'> </div><div class='del'>-static void *snp_alloc_vmsa_page(void)</div><div class='add'>+static void *snp_alloc_vmsa_page(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *p;</div><div class='ctx'> </div><div class='hunk'>@@ -950,7 +950,7 @@ static void *snp_alloc_vmsa_page(void)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Allocate an 8k page which is also 8k-aligned.</div><div class='ctx'> 	 */</div><div class='del'>-	p = alloc_pages(GFP_KERNEL_ACCOUNT | __GFP_ZERO, 1);</div><div class='add'>+	p = alloc_pages_node(cpu_to_node(cpu), GFP_KERNEL_ACCOUNT | __GFP_ZERO, 1);</div><div class='ctx'> 	if (!p)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -1019,7 +1019,7 @@ static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)</div><div class='ctx'> 	 * #VMEXIT of that vCPU would wipe out all of the settings being done</div><div class='ctx'> 	 * here.</div><div class='ctx'> 	 */</div><div class='del'>-	vmsa = (struct sev_es_save_area *)snp_alloc_vmsa_page();</div><div class='add'>+	vmsa = (struct sev_es_save_area *)snp_alloc_vmsa_page(cpu);</div><div class='ctx'> 	if (!vmsa)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1341,7 +1341,7 @@ static void __init alloc_runtime_data(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_es_runtime_data *data;</div><div class='ctx'> </div><div class='del'>-	data = memblock_alloc(sizeof(*data), PAGE_SIZE);</div><div class='add'>+	data = memblock_alloc_node(sizeof(*data), PAGE_SIZE, cpu_to_node(cpu));</div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		panic("Can't allocate SEV-ES runtime data");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c<br/>index 59e15dd8d0f8..6f1e9883f074 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/shstk.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/shstk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/shstk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/shstk.c</a></div><div class='hunk'>@@ -163,8 +163,8 @@ static int shstk_setup(void)</div><div class='ctx'> 	if (features_enabled(ARCH_SHSTK_SHSTK))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Also not supported for 32 bit and x32 */</div><div class='del'>-	if (!cpu_feature_enabled(X86_FEATURE_USER_SHSTK) || in_32bit_syscall())</div><div class='add'>+	/* Also not supported for 32 bit */</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_USER_SHSTK) || in_ia32_syscall())</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	size = adjust_shstk_size(0);</div><div class='head'>diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal_32.c<br/>index c12624bc82a3..ef654530bf5a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/signal_32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/signal_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/signal_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/signal_32.c</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> #include &lt;asm/gsseg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IA32_EMULATION</div><div class='del'>-#include &lt;asm/ia32_unistd.h&gt;</div><div class='add'>+#include &lt;asm/unistd_32_ia32.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline void reload_segments(struct sigcontext_32 *sc)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/kernel/signal_64.c b/arch/x86/kernel/signal_64.c<br/>index 23d8aaf8d9fd..8a94053c5444 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/signal_64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/signal_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/signal_64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/signal_64.c</a></div><div class='hunk'>@@ -315,6 +315,9 @@ int x32_setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	uc_flags = frame_uc_flags(regs);</div><div class='ctx'> </div><div class='add'>+	if (setup_signal_shadow_stack(ksig))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	if (!user_access_begin(frame, sizeof(*frame)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='hunk'>@@ -377,6 +380,9 @@ COMPAT_SYSCALL_DEFINE0(x32_rt_sigreturn)</div><div class='ctx'> 	if (!restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, uc_flags))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='add'>+	if (restore_signal_shadow_stack())</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='ctx'> 	if (compat_restore_altstack(&amp;frame-&gt;uc.uc_stack))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c<br/>index 76bb65045c64..0c35207320cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/smpboot.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/smpboot.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/smpboot.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/smpboot.c</a></div><div class='hunk'>@@ -438,9 +438,9 @@ static bool match_pkg(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id intel_cod_cpu[] = {</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, 0),	/* COD */</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, 0),	/* COD */</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ANY, 1),		/* SNC */</div><div class='add'>+	X86_MATCH_VFM(INTEL_HASWELL_X,	 0),	/* COD */</div><div class='add'>+	X86_MATCH_VFM(INTEL_BROADWELL_X, 0),	/* COD */</div><div class='add'>+	X86_MATCH_VFM(INTEL_ANY,	 1),	/* SNC */</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1033,20 +1033,22 @@ static __init void disable_smp(void)</div><div class='ctx'> </div><div class='ctx'> void __init smp_prepare_cpus_common(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='add'>+	unsigned int cpu, node;</div><div class='ctx'> </div><div class='ctx'> 	/* Mark all except the boot CPU as hotpluggable */</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		if (i)</div><div class='del'>-			per_cpu(cpu_info.cpu_index, i) = nr_cpu_ids;</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		if (cpu)</div><div class='add'>+			per_cpu(cpu_info.cpu_index, cpu) = nr_cpu_ids;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		zalloc_cpumask_var(&amp;per_cpu(cpu_sibling_map, i), GFP_KERNEL);</div><div class='del'>-		zalloc_cpumask_var(&amp;per_cpu(cpu_core_map, i), GFP_KERNEL);</div><div class='del'>-		zalloc_cpumask_var(&amp;per_cpu(cpu_die_map, i), GFP_KERNEL);</div><div class='del'>-		zalloc_cpumask_var(&amp;per_cpu(cpu_llc_shared_map, i), GFP_KERNEL);</div><div class='del'>-		zalloc_cpumask_var(&amp;per_cpu(cpu_l2c_shared_map, i), GFP_KERNEL);</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		node = cpu_to_node(cpu);</div><div class='add'>+</div><div class='add'>+		zalloc_cpumask_var_node(&amp;per_cpu(cpu_sibling_map,    cpu), GFP_KERNEL, node);</div><div class='add'>+		zalloc_cpumask_var_node(&amp;per_cpu(cpu_core_map,       cpu), GFP_KERNEL, node);</div><div class='add'>+		zalloc_cpumask_var_node(&amp;per_cpu(cpu_die_map,        cpu), GFP_KERNEL, node);</div><div class='add'>+		zalloc_cpumask_var_node(&amp;per_cpu(cpu_llc_shared_map, cpu), GFP_KERNEL, node);</div><div class='add'>+		zalloc_cpumask_var_node(&amp;per_cpu(cpu_l2c_shared_map, cpu), GFP_KERNEL, node);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_cpu_sibling_map(0);</div><div class='head'>diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c<br/>deleted file mode 100644<br/>index d42c28b8bfd8..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/topology.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/topology.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Populate sysfs with topology information</div><div class='del'>- *</div><div class='del'>- * Written by: Matthew Dobson, IBM Corporation</div><div class='del'>- * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002, IBM Corp.</div><div class='del'>- *</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='del'>- * NON INFRINGEMENT.  See the GNU General Public License for more</div><div class='del'>- * details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- * Send feedback to &lt;colpatch@us.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/nodemask.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/mmzone.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;asm/io_apic.h&gt;</div><div class='del'>-#include &lt;asm/cpu.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_HOTPLUG_CPU</div><div class='del'>-bool arch_cpu_is_hotpluggable(int cpu)</div><div class='del'>-{</div><div class='del'>-	return cpu &gt; 0;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_HOTPLUG_CPU */</div><div class='head'>diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c<br/>index 5a69a49acc96..06b170759e5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/tsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/tsc.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #include &lt;asm/geode.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='del'>-#include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='ctx'> #include &lt;asm/uv/uv.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -44,7 +44,7 @@ EXPORT_SYMBOL(tsc_khz);</div><div class='ctx'> static int __read_mostly tsc_unstable;</div><div class='ctx'> static unsigned int __initdata tsc_early_khz;</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(__use_tsc);</div><div class='add'>+static DEFINE_STATIC_KEY_FALSE_RO(__use_tsc);</div><div class='ctx'> </div><div class='ctx'> int tsc_clocksource_reliable;</div><div class='ctx'> </div><div class='hunk'>@@ -682,7 +682,7 @@ unsigned long native_calibrate_tsc(void)</div><div class='ctx'> 	 * clock.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (crystal_khz == 0 &amp;&amp;</div><div class='del'>-			boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D)</div><div class='add'>+			boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D)</div><div class='ctx'> 		crystal_khz = 25000;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -713,7 +713,7 @@ unsigned long native_calibrate_tsc(void)</div><div class='ctx'> 	 * For Atom SoCs TSC is the only reliable clocksource.</div><div class='ctx'> 	 * Mark TSC reliable so no watchdog on it.</div><div class='ctx'> 	 */</div><div class='del'>-	if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)</div><div class='add'>+	if (boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT)</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_LOCAL_APIC</div><div class='head'>diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c<br/>index 6555a857a1e6..deeb02825670 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc_msr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/tsc_msr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc_msr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/tsc_msr.c</a></div><div class='hunk'>@@ -147,13 +147,13 @@ static const struct freq_desc freq_desc_lgm = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id tsc_msr_cpu_ids[] = {</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID,	&amp;freq_desc_pnw),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_TABLET,&amp;freq_desc_clv),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,	&amp;freq_desc_byt),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID,	&amp;freq_desc_tng),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,	&amp;freq_desc_cht),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID,	&amp;freq_desc_ann),</div><div class='del'>-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_NP,	&amp;freq_desc_lgm),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID,	&amp;freq_desc_pnw),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_SALTWELL_TABLET, &amp;freq_desc_clv),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_SILVERMONT,	&amp;freq_desc_byt),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID,	&amp;freq_desc_tng),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_AIRMONT,	&amp;freq_desc_cht),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID,	&amp;freq_desc_ann),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_AIRMONT_NP,	&amp;freq_desc_lgm),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c<br/>index 1123ef3ccf90..4334033658ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc_sync.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/tsc_sync.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc_sync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/tsc_sync.c</a></div><div class='hunk'>@@ -193,11 +193,9 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu)</div><div class='ctx'> 	cur-&gt;warned = false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If a non-zero TSC value for socket 0 may be valid then the default</div><div class='del'>-	 * adjusted value cannot assumed to be zero either.</div><div class='add'>+	 * The default adjust value cannot be assumed to be zero on any socket.</div><div class='ctx'> 	 */</div><div class='del'>-	if (tsc_async_resets)</div><div class='del'>-		cur-&gt;adjusted = bootval;</div><div class='add'>+	cur-&gt;adjusted = bootval;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check whether this CPU is the first in a package to come up. In</div><div class='head'>diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S<br/>index 56451fd2099e..3509afc6a672 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/vmlinux.lds.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -15,11 +15,7 @@</div><div class='ctx'>  * put it inside the section definition.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-#define LOAD_OFFSET __PAGE_OFFSET</div><div class='del'>-#else</div><div class='ctx'> #define LOAD_OFFSET __START_KERNEL_map</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define RUNTIME_DISCARD_EXIT</div><div class='ctx'> #define EMITS_PT_NOTE</div><div class='hunk'>@@ -114,11 +110,10 @@ PHDRS {</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='add'>+	. = __START_KERNEL;</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-	. = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;</div><div class='ctx'> 	phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);</div><div class='ctx'> #else</div><div class='del'>-	. = __START_KERNEL;</div><div class='ctx'> 	phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -172,6 +167,9 @@ SECTIONS</div><div class='ctx'> 		/* init_task */</div><div class='ctx'> 		INIT_TASK_DATA(THREAD_SIZE)</div><div class='ctx'> </div><div class='add'>+		/* equivalent to task_pt_regs(&amp;init_task) */</div><div class='add'>+		__top_init_kernel_stack = __end_init_stack - TOP_OF_KERNEL_STACK_PADDING - PTREGS_SIZE;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 		/* 32 bit has nosave before _edata */</div><div class='ctx'> 		NOSAVE_DATA</div><div class='head'>diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c<br/>index af662312fd07..ec08fa3caf43 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/posted_intr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kvm/vmx/posted_intr.c</a></div><div class='hunk'>@@ -107,7 +107,7 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> 		 * handle task migration (@cpu != vcpu-&gt;cpu).</div><div class='ctx'> 		 */</div><div class='ctx'> 		new.ndst = dest;</div><div class='del'>-		new.sn = 0;</div><div class='add'>+		__pi_clear_sn(&amp;new);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Restore the notification vector; in the blocking case, the</div><div class='hunk'>@@ -157,7 +157,7 @@ static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		      &amp;per_cpu(wakeup_vcpus_on_cpu, vcpu-&gt;cpu));</div><div class='ctx'> 	raw_spin_unlock(&amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu));</div><div class='ctx'> </div><div class='del'>-	WARN(pi_desc-&gt;sn, "PI descriptor SN field set before blocking");</div><div class='add'>+	WARN(pi_test_sn(pi_desc), "PI descriptor SN field set before blocking");</div><div class='ctx'> </div><div class='ctx'> 	old.control = READ_ONCE(pi_desc-&gt;control);</div><div class='ctx'> 	do {</div><div class='head'>diff --git a/arch/x86/kvm/vmx/posted_intr.h b/arch/x86/kvm/vmx/posted_intr.h<br/>index 26992076552e..6b2a0226257e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/posted_intr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kvm/vmx/posted_intr.h</a></div><div class='hunk'>@@ -1,98 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #ifndef __KVM_X86_VMX_POSTED_INTR_H</div><div class='ctx'> #define __KVM_X86_VMX_POSTED_INTR_H</div><div class='del'>-</div><div class='del'>-#define POSTED_INTR_ON  0</div><div class='del'>-#define POSTED_INTR_SN  1</div><div class='del'>-</div><div class='del'>-#define PID_TABLE_ENTRY_VALID 1</div><div class='del'>-</div><div class='del'>-/* Posted-Interrupt Descriptor */</div><div class='del'>-struct pi_desc {</div><div class='del'>-	u32 pir[8];     /* Posted interrupt requested */</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-				/* bit 256 - Outstanding Notification */</div><div class='del'>-			u16	on	: 1,</div><div class='del'>-				/* bit 257 - Suppress Notification */</div><div class='del'>-				sn	: 1,</div><div class='del'>-				/* bit 271:258 - Reserved */</div><div class='del'>-				rsvd_1	: 14;</div><div class='del'>-				/* bit 279:272 - Notification Vector */</div><div class='del'>-			u8	nv;</div><div class='del'>-				/* bit 287:280 - Reserved */</div><div class='del'>-			u8	rsvd_2;</div><div class='del'>-				/* bit 319:288 - Notification Destination */</div><div class='del'>-			u32	ndst;</div><div class='del'>-		};</div><div class='del'>-		u64 control;</div><div class='del'>-	};</div><div class='del'>-	u32 rsvd[6];</div><div class='del'>-} __aligned(64);</div><div class='del'>-</div><div class='del'>-static inline bool pi_test_and_set_on(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return test_and_set_bit(POSTED_INTR_ON,</div><div class='del'>-			(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return test_and_clear_bit(POSTED_INTR_ON,</div><div class='del'>-			(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pi_test_and_clear_sn(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return test_and_clear_bit(POSTED_INTR_SN,</div><div class='del'>-			(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pi_test_and_set_pir(int vector, struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return test_and_set_bit(vector, (unsigned long *)pi_desc-&gt;pir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pi_is_pir_empty(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return bitmap_empty((unsigned long *)pi_desc-&gt;pir, NR_VECTORS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pi_set_sn(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	set_bit(POSTED_INTR_SN,</div><div class='del'>-		(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pi_set_on(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	set_bit(POSTED_INTR_ON,</div><div class='del'>-		(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pi_clear_on(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	clear_bit(POSTED_INTR_ON,</div><div class='del'>-		(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pi_clear_sn(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	clear_bit(POSTED_INTR_SN,</div><div class='del'>-		(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pi_test_on(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return test_bit(POSTED_INTR_ON,</div><div class='del'>-			(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool pi_test_sn(struct pi_desc *pi_desc)</div><div class='del'>-{</div><div class='del'>-	return test_bit(POSTED_INTR_SN,</div><div class='del'>-			(unsigned long *)&amp;pi_desc-&gt;control);</div><div class='del'>-}</div><div class='add'>+#include &lt;asm/posted_intr.h&gt;</div><div class='ctx'> </div><div class='ctx'> void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu);</div><div class='ctx'> void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu);</div><div class='head'>diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c<br/>index 22411f4aff53..becefaf95cab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/vmx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kvm/vmx/vmx.c</a></div><div class='hunk'>@@ -70,6 +70,7 @@</div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "smm.h"</div><div class='ctx'> #include "vmx_onhyperv.h"</div><div class='add'>+#include "posted_intr.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Qumranet");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='hunk'>@@ -4844,7 +4845,7 @@ static void __vmx_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * or POSTED_INTR_WAKEUP_VECTOR.</div><div class='ctx'> 	 */</div><div class='ctx'> 	vmx-&gt;pi_desc.nv = POSTED_INTR_VECTOR;</div><div class='del'>-	vmx-&gt;pi_desc.sn = 1;</div><div class='add'>+	__pi_set_sn(&amp;vmx-&gt;pi_desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='head'>diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h<br/>index 90f9e4434646..7e483366b31e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/kvm/vmx/vmx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/kvm/vmx/vmx.h</a></div><div class='hunk'>@@ -7,10 +7,10 @@</div><div class='ctx'> #include &lt;asm/kvm.h&gt;</div><div class='ctx'> #include &lt;asm/intel_pt.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/posted_intr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "capabilities.h"</div><div class='ctx'> #include "../kvm_cache_regs.h"</div><div class='del'>-#include "posted_intr.h"</div><div class='ctx'> #include "vmcs.h"</div><div class='ctx'> #include "vmx_ops.h"</div><div class='ctx'> #include "../cpuid.h"</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_etc.c b/arch/x86/math-emu/fpu_etc.c<br/>index 1b118fd93140..39423ec409e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_etc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/math-emu/fpu_etc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_etc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/math-emu/fpu_etc.c</a></div><div class='hunk'>@@ -120,9 +120,14 @@ static void fxam(FPU_REG *st0_ptr, u_char st0tag)</div><div class='ctx'> 	setcc(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void FPU_ST0_illegal(FPU_REG *st0_ptr, u_char st0_tag)</div><div class='add'>+{</div><div class='add'>+	FPU_illegal();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static FUNC_ST0 const fp_etc_table[] = {</div><div class='del'>-	fchs, fabs, (FUNC_ST0) FPU_illegal, (FUNC_ST0) FPU_illegal,</div><div class='del'>-	ftst_, fxam, (FUNC_ST0) FPU_illegal, (FUNC_ST0) FPU_illegal</div><div class='add'>+	fchs, fabs, FPU_ST0_illegal, FPU_ST0_illegal,</div><div class='add'>+	ftst_, fxam, FPU_ST0_illegal, FPU_ST0_illegal,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void FPU_etc(void)</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_trig.c b/arch/x86/math-emu/fpu_trig.c<br/>index 990d847ae902..85daf98c81c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_trig.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/math-emu/fpu_trig.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_trig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/math-emu/fpu_trig.c</a></div><div class='hunk'>@@ -433,13 +433,13 @@ static void fxtract(FPU_REG *st0_ptr, u_char st0_tag)</div><div class='ctx'> #endif /* PARANOID */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fdecstp(void)</div><div class='add'>+static void fdecstp(FPU_REG *st0_ptr, u_char st0_tag)</div><div class='ctx'> {</div><div class='ctx'> 	clear_C1();</div><div class='ctx'> 	top--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fincstp(void)</div><div class='add'>+static void fincstp(FPU_REG *st0_ptr, u_char st0_tag)</div><div class='ctx'> {</div><div class='ctx'> 	clear_C1();</div><div class='ctx'> 	top++;</div><div class='hunk'>@@ -1631,7 +1631,7 @@ static void fscale(FPU_REG *st0_ptr, u_char st0_tag)</div><div class='ctx'> </div><div class='ctx'> static FUNC_ST0 const trig_table_a[] = {</div><div class='ctx'> 	f2xm1, fyl2x, fptan, fpatan,</div><div class='del'>-	fxtract, fprem1, (FUNC_ST0) fdecstp, (FUNC_ST0) fincstp</div><div class='add'>+	fxtract, fprem1, fdecstp, fincstp,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void FPU_triga(void)</div><div class='head'>diff --git a/arch/x86/math-emu/reg_constant.c b/arch/x86/math-emu/reg_constant.c<br/>index 742619e94bdf..003a0b2753e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/math-emu/reg_constant.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/math-emu/reg_constant.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/math-emu/reg_constant.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/math-emu/reg_constant.c</a></div><div class='hunk'>@@ -108,8 +108,13 @@ static void fldz(int rc)</div><div class='ctx'> </div><div class='ctx'> typedef void (*FUNC_RC) (int);</div><div class='ctx'> </div><div class='add'>+static void FPU_RC_illegal(int unused)</div><div class='add'>+{</div><div class='add'>+	FPU_illegal();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static FUNC_RC constants_table[] = {</div><div class='del'>-	fld1, fldl2t, fldl2e, fldpi, fldlg2, fldln2, fldz, (FUNC_RC) FPU_illegal</div><div class='add'>+	fld1, fldl2t, fldl2e, fldpi, fldlg2, fldln2, fldz, FPU_RC_illegal</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void fconst(void)</div><div class='head'>diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c<br/>index b522933bfa56..51986e8a9d35 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/extable.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/extable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/extable.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/mm/extable.c</a></div><div class='hunk'>@@ -164,13 +164,6 @@ static bool ex_handler_uaccess(const struct exception_table_entry *fixup,</div><div class='ctx'> 	return ex_handler_default(fixup, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ex_handler_copy(const struct exception_table_entry *fixup,</div><div class='del'>-			    struct pt_regs *regs, int trapnr)</div><div class='del'>-{</div><div class='del'>-	WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");</div><div class='del'>-	return ex_handler_fault(fixup, regs, trapnr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool ex_handler_msr(const struct exception_table_entry *fixup,</div><div class='ctx'> 			   struct pt_regs *regs, bool wrmsr, bool safe, int reg)</div><div class='ctx'> {</div><div class='hunk'>@@ -341,8 +334,6 @@ int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,</div><div class='ctx'> 		return ex_handler_fault(e, regs, trapnr);</div><div class='ctx'> 	case EX_TYPE_UACCESS:</div><div class='ctx'> 		return ex_handler_uaccess(e, regs, trapnr, fault_addr);</div><div class='del'>-	case EX_TYPE_COPY:</div><div class='del'>-		return ex_handler_copy(e, regs, trapnr);</div><div class='ctx'> 	case EX_TYPE_CLEAR_FS:</div><div class='ctx'> 		return ex_handler_clear_fs(e, regs);</div><div class='ctx'> 	case EX_TYPE_FPU_RESTORE:</div><div class='head'>diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c<br/>index 622d12ec7f08..f26ecabc9424 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/fault.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/fault.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/mm/fault.c</a></div><div class='hunk'>@@ -514,18 +514,19 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad</div><div class='ctx'> </div><div class='ctx'> 	if (error_code &amp; X86_PF_INSTR) {</div><div class='ctx'> 		unsigned int level;</div><div class='add'>+		bool nx, rw;</div><div class='ctx'> 		pgd_t *pgd;</div><div class='ctx'> 		pte_t *pte;</div><div class='ctx'> </div><div class='ctx'> 		pgd = __va(read_cr3_pa());</div><div class='ctx'> 		pgd += pgd_index(address);</div><div class='ctx'> </div><div class='del'>-		pte = lookup_address_in_pgd(pgd, address, &amp;level);</div><div class='add'>+		pte = lookup_address_in_pgd_attr(pgd, address, &amp;level, &amp;nx, &amp;rw);</div><div class='ctx'> </div><div class='del'>-		if (pte &amp;&amp; pte_present(*pte) &amp;&amp; !pte_exec(*pte))</div><div class='add'>+		if (pte &amp;&amp; pte_present(*pte) &amp;&amp; (!pte_exec(*pte) || nx))</div><div class='ctx'> 			pr_crit("kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n",</div><div class='ctx'> 				from_kuid(&amp;init_user_ns, current_uid()));</div><div class='del'>-		if (pte &amp;&amp; pte_present(*pte) &amp;&amp; pte_exec(*pte) &amp;&amp;</div><div class='add'>+		if (pte &amp;&amp; pte_present(*pte) &amp;&amp; pte_exec(*pte) &amp;&amp; !nx &amp;&amp;</div><div class='ctx'> 				(pgd_flags(*pgd) &amp; _PAGE_USER) &amp;&amp;</div><div class='ctx'> 				(__read_cr4() &amp; X86_CR4_SMEP))</div><div class='ctx'> 			pr_crit("unable to execute userspace code (SMEP?) (uid: %d)\n",</div><div class='hunk'>@@ -723,39 +724,8 @@ kernelmode_fixup_or_oops(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> 	WARN_ON_ONCE(user_mode(regs));</div><div class='ctx'> </div><div class='ctx'> 	/* Are we prepared to handle this kernel fault? */</div><div class='del'>-	if (fixup_exception(regs, X86_TRAP_PF, error_code, address)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Any interrupt that takes a fault gets the fixup. This makes</div><div class='del'>-		 * the below recursive fault logic only apply to a faults from</div><div class='del'>-		 * task context.</div><div class='del'>-		 */</div><div class='del'>-		if (in_interrupt())</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Per the above we're !in_interrupt(), aka. task context.</div><div class='del'>-		 *</div><div class='del'>-		 * In this case we need to make sure we're not recursively</div><div class='del'>-		 * faulting through the emulate_vsyscall() logic.</div><div class='del'>-		 */</div><div class='del'>-		if (current-&gt;thread.sig_on_uaccess_err &amp;&amp; signal) {</div><div class='del'>-			sanitize_error_code(address, &amp;error_code);</div><div class='del'>-</div><div class='del'>-			set_signal_archinfo(address, error_code);</div><div class='del'>-</div><div class='del'>-			if (si_code == SEGV_PKUERR) {</div><div class='del'>-				force_sig_pkuerr((void __user *)address, pkey);</div><div class='del'>-			} else {</div><div class='del'>-				/* XXX: hwpoison faults will set the wrong code. */</div><div class='del'>-				force_sig_fault(signal, si_code, (void __user *)address);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Barring that, we can do the fixup and be happy.</div><div class='del'>-		 */</div><div class='add'>+	if (fixup_exception(regs, X86_TRAP_PF, error_code, address))</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * AMD erratum #91 manifests as a spurious page fault on a PREFETCH</div><div class='head'>diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c<br/>index 679893ea5e68..a51f22c90a7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/mm/init.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;linux/swapops.h&gt;</div><div class='ctx'> #include &lt;linux/kmemleak.h&gt;</div><div class='ctx'> #include &lt;linux/sched/task.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='hunk'>@@ -261,21 +262,17 @@ static void __init probe_page_size_mask(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define INTEL_MATCH(_model) { .vendor  = X86_VENDOR_INTEL,	\</div><div class='del'>-			      .family  = 6,			\</div><div class='del'>-			      .model = _model,			\</div><div class='del'>-			    }</div><div class='ctx'> /*</div><div class='ctx'>  * INVLPG may not properly flush Global entries</div><div class='ctx'>  * on these CPUs when PCIDs are enabled.</div><div class='ctx'>  */</div><div class='ctx'> static const struct x86_cpu_id invlpg_miss_ids[] = {</div><div class='del'>-	INTEL_MATCH(INTEL_FAM6_ALDERLAKE   ),</div><div class='del'>-	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),</div><div class='del'>-	INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ),</div><div class='del'>-	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE  ),</div><div class='del'>-	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),</div><div class='del'>-	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE,	    0),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ALDERLAKE_L,    0),</div><div class='add'>+	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, 0),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE,	    0),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,   0),</div><div class='add'>+	X86_MATCH_VFM(INTEL_RAPTORLAKE_S,   0),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1099,3 +1096,31 @@ unsigned long arch_max_swapfile_size(void)</div><div class='ctx'> 	return pages;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXECMEM</div><div class='add'>+static struct execmem_info execmem_info __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct execmem_info __init *execmem_arch_setup(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long start, offset = 0;</div><div class='add'>+</div><div class='add'>+	if (kaslr_enabled())</div><div class='add'>+		offset = get_random_u32_inclusive(1, 1024) * PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	start = MODULES_VADDR + offset;</div><div class='add'>+</div><div class='add'>+	execmem_info = (struct execmem_info){</div><div class='add'>+		.ranges = {</div><div class='add'>+			[EXECMEM_DEFAULT] = {</div><div class='add'>+				.flags	= EXECMEM_KASAN_SHADOW,</div><div class='add'>+				.start	= start,</div><div class='add'>+				.end	= MODULES_END,</div><div class='add'>+				.pgprot	= PAGE_KERNEL,</div><div class='add'>+				.alignment = MODULE_ALIGN,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return &amp;execmem_info;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_EXECMEM */</div><div class='head'>diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c<br/>index 6f3b3e028718..0a120d85d7bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/mem_encrypt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/mem_encrypt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/mem_encrypt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/mm/mem_encrypt.c</a></div><div class='hunk'>@@ -102,6 +102,13 @@ void __init mem_encrypt_setup_arch(void)</div><div class='ctx'> 	phys_addr_t total_mem = memblock_phys_mem_size();</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Do RMP table fixups after the e820 tables have been setup by</div><div class='add'>+	 * e820__memory_setup().</div><div class='add'>+	 */</div><div class='add'>+	if (cc_platform_has(CC_ATTR_HOST_SEV_SNP))</div><div class='add'>+		snp_fixup_e820_tables();</div><div class='add'>+</div><div class='ctx'> 	if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c<br/>index 65e9a6e391c0..ce84ba86e69e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/numa.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/numa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/numa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/mm/numa.c</a></div><div class='hunk'>@@ -929,6 +929,8 @@ int memory_add_physaddr_to_nid(u64 start)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int __init cmp_memblk(const void *a, const void *b)</div><div class='ctx'> {</div><div class='ctx'> 	const struct numa_memblk *ma = *(const struct numa_memblk **)a;</div><div class='hunk'>@@ -1001,5 +1003,3 @@ int __init numa_fill_memblks(u64 start, u64 end)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c<br/>index 80c9037ffadf..19fdfbb171ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/pat/set_memory.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/mm/pat/set_memory.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/pat/set_memory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/mm/pat/set_memory.c</a></div><div class='hunk'>@@ -619,7 +619,8 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long start,</div><div class='ctx'>  * Validate strict W^X semantics.</div><div class='ctx'>  */</div><div class='ctx'> static inline pgprot_t verify_rwx(pgprot_t old, pgprot_t new, unsigned long start,</div><div class='del'>-				  unsigned long pfn, unsigned long npg)</div><div class='add'>+				  unsigned long pfn, unsigned long npg,</div><div class='add'>+				  bool nx, bool rw)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long end;</div><div class='ctx'> </div><div class='hunk'>@@ -641,6 +642,10 @@ static inline pgprot_t verify_rwx(pgprot_t old, pgprot_t new, unsigned long star</div><div class='ctx'> 	if ((pgprot_val(new) &amp; (_PAGE_RW | _PAGE_NX)) != _PAGE_RW)</div><div class='ctx'> 		return new;</div><div class='ctx'> </div><div class='add'>+	/* Non-leaf translation entries can disable writing or execution. */</div><div class='add'>+	if (!rw || nx)</div><div class='add'>+		return new;</div><div class='add'>+</div><div class='ctx'> 	end = start + npg * PAGE_SIZE - 1;</div><div class='ctx'> 	WARN_ONCE(1, "CPA detected W^X violation: %016llx -&gt; %016llx range: 0x%016lx - 0x%016lx PFN %lx\n",</div><div class='ctx'> 		  (unsigned long long)pgprot_val(old),</div><div class='hunk'>@@ -657,20 +662,26 @@ static inline pgprot_t verify_rwx(pgprot_t old, pgprot_t new, unsigned long star</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Lookup the page table entry for a virtual address in a specific pgd.</div><div class='del'>- * Return a pointer to the entry and the level of the mapping.</div><div class='add'>+ * Return a pointer to the entry, the level of the mapping, and the effective</div><div class='add'>+ * NX and RW bits of all page table levels.</div><div class='ctx'>  */</div><div class='del'>-pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,</div><div class='del'>-			     unsigned int *level)</div><div class='add'>+pte_t *lookup_address_in_pgd_attr(pgd_t *pgd, unsigned long address,</div><div class='add'>+				  unsigned int *level, bool *nx, bool *rw)</div><div class='ctx'> {</div><div class='ctx'> 	p4d_t *p4d;</div><div class='ctx'> 	pud_t *pud;</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> </div><div class='ctx'> 	*level = PG_LEVEL_NONE;</div><div class='add'>+	*nx = false;</div><div class='add'>+	*rw = true;</div><div class='ctx'> </div><div class='ctx'> 	if (pgd_none(*pgd))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	*nx |= pgd_flags(*pgd) &amp; _PAGE_NX;</div><div class='add'>+	*rw &amp;= pgd_flags(*pgd) &amp; _PAGE_RW;</div><div class='add'>+</div><div class='ctx'> 	p4d = p4d_offset(pgd, address);</div><div class='ctx'> 	if (p4d_none(*p4d))</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -679,6 +690,9 @@ pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,</div><div class='ctx'> 	if (p4d_leaf(*p4d) || !p4d_present(*p4d))</div><div class='ctx'> 		return (pte_t *)p4d;</div><div class='ctx'> </div><div class='add'>+	*nx |= p4d_flags(*p4d) &amp; _PAGE_NX;</div><div class='add'>+	*rw &amp;= p4d_flags(*p4d) &amp; _PAGE_RW;</div><div class='add'>+</div><div class='ctx'> 	pud = pud_offset(p4d, address);</div><div class='ctx'> 	if (pud_none(*pud))</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -687,6 +701,9 @@ pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,</div><div class='ctx'> 	if (pud_leaf(*pud) || !pud_present(*pud))</div><div class='ctx'> 		return (pte_t *)pud;</div><div class='ctx'> </div><div class='add'>+	*nx |= pud_flags(*pud) &amp; _PAGE_NX;</div><div class='add'>+	*rw &amp;= pud_flags(*pud) &amp; _PAGE_RW;</div><div class='add'>+</div><div class='ctx'> 	pmd = pmd_offset(pud, address);</div><div class='ctx'> 	if (pmd_none(*pmd))</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -695,12 +712,27 @@ pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,</div><div class='ctx'> 	if (pmd_leaf(*pmd) || !pmd_present(*pmd))</div><div class='ctx'> 		return (pte_t *)pmd;</div><div class='ctx'> </div><div class='add'>+	*nx |= pmd_flags(*pmd) &amp; _PAGE_NX;</div><div class='add'>+	*rw &amp;= pmd_flags(*pmd) &amp; _PAGE_RW;</div><div class='add'>+</div><div class='ctx'> 	*level = PG_LEVEL_4K;</div><div class='ctx'> </div><div class='ctx'> 	return pte_offset_kernel(pmd, address);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Lookup the page table entry for a virtual address in a specific pgd.</div><div class='add'>+ * Return a pointer to the entry and the level of the mapping.</div><div class='add'>+ */</div><div class='add'>+pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,</div><div class='add'>+			     unsigned int *level)</div><div class='add'>+{</div><div class='add'>+	bool nx, rw;</div><div class='add'>+</div><div class='add'>+	return lookup_address_in_pgd_attr(pgd, address, level, &amp;nx, &amp;rw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Lookup the page table entry for a virtual address. Return a pointer</div><div class='ctx'>  * to the entry and the level of the mapping.</div><div class='ctx'>  *</div><div class='hunk'>@@ -715,13 +747,16 @@ pte_t *lookup_address(unsigned long address, unsigned int *level)</div><div class='ctx'> EXPORT_SYMBOL_GPL(lookup_address);</div><div class='ctx'> </div><div class='ctx'> static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,</div><div class='del'>-				  unsigned int *level)</div><div class='add'>+				  unsigned int *level, bool *nx, bool *rw)</div><div class='ctx'> {</div><div class='del'>-	if (cpa-&gt;pgd)</div><div class='del'>-		return lookup_address_in_pgd(cpa-&gt;pgd + pgd_index(address),</div><div class='del'>-					       address, level);</div><div class='add'>+	pgd_t *pgd;</div><div class='add'>+</div><div class='add'>+	if (!cpa-&gt;pgd)</div><div class='add'>+		pgd = pgd_offset_k(address);</div><div class='add'>+	else</div><div class='add'>+		pgd = cpa-&gt;pgd + pgd_index(address);</div><div class='ctx'> </div><div class='del'>-	return lookup_address(address, level);</div><div class='add'>+	return lookup_address_in_pgd_attr(pgd, address, level, nx, rw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -849,12 +884,13 @@ static int __should_split_large_page(pte_t *kpte, unsigned long address,</div><div class='ctx'> 	pgprot_t old_prot, new_prot, req_prot, chk_prot;</div><div class='ctx'> 	pte_t new_pte, *tmp;</div><div class='ctx'> 	enum pg_level level;</div><div class='add'>+	bool nx, rw;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check for races, another CPU might have split this page</div><div class='ctx'> 	 * up already:</div><div class='ctx'> 	 */</div><div class='del'>-	tmp = _lookup_address_cpa(cpa, address, &amp;level);</div><div class='add'>+	tmp = _lookup_address_cpa(cpa, address, &amp;level, &amp;nx, &amp;rw);</div><div class='ctx'> 	if (tmp != kpte)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='hunk'>@@ -965,7 +1001,8 @@ static int __should_split_large_page(pte_t *kpte, unsigned long address,</div><div class='ctx'> 	new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages,</div><div class='ctx'> 				      psize, CPA_DETECT);</div><div class='ctx'> </div><div class='del'>-	new_prot = verify_rwx(old_prot, new_prot, lpaddr, old_pfn, numpages);</div><div class='add'>+	new_prot = verify_rwx(old_prot, new_prot, lpaddr, old_pfn, numpages,</div><div class='add'>+			      nx, rw);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there is a conflict, split the large page.</div><div class='hunk'>@@ -1046,6 +1083,7 @@ __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,</div><div class='ctx'> 	pte_t *pbase = (pte_t *)page_address(base);</div><div class='ctx'> 	unsigned int i, level;</div><div class='ctx'> 	pgprot_t ref_prot;</div><div class='add'>+	bool nx, rw;</div><div class='ctx'> 	pte_t *tmp;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;pgd_lock);</div><div class='hunk'>@@ -1053,7 +1091,7 @@ __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,</div><div class='ctx'> 	 * Check for races, another CPU might have split this page</div><div class='ctx'> 	 * up for us already:</div><div class='ctx'> 	 */</div><div class='del'>-	tmp = _lookup_address_cpa(cpa, address, &amp;level);</div><div class='add'>+	tmp = _lookup_address_cpa(cpa, address, &amp;level, &amp;nx, &amp;rw);</div><div class='ctx'> 	if (tmp != kpte) {</div><div class='ctx'> 		spin_unlock(&amp;pgd_lock);</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -1594,10 +1632,11 @@ static int __change_page_attr(struct cpa_data *cpa, int primary)</div><div class='ctx'> 	int do_split, err;</div><div class='ctx'> 	unsigned int level;</div><div class='ctx'> 	pte_t *kpte, old_pte;</div><div class='add'>+	bool nx, rw;</div><div class='ctx'> </div><div class='ctx'> 	address = __cpa_addr(cpa, cpa-&gt;curpage);</div><div class='ctx'> repeat:</div><div class='del'>-	kpte = _lookup_address_cpa(cpa, address, &amp;level);</div><div class='add'>+	kpte = _lookup_address_cpa(cpa, address, &amp;level, &amp;nx, &amp;rw);</div><div class='ctx'> 	if (!kpte)</div><div class='ctx'> 		return __cpa_process_fault(cpa, address, primary);</div><div class='ctx'> </div><div class='hunk'>@@ -1619,7 +1658,8 @@ repeat:</div><div class='ctx'> 		new_prot = static_protections(new_prot, address, pfn, 1, 0,</div><div class='ctx'> 					      CPA_PROTECT);</div><div class='ctx'> </div><div class='del'>-		new_prot = verify_rwx(old_prot, new_prot, address, pfn, 1);</div><div class='add'>+		new_prot = verify_rwx(old_prot, new_prot, address, pfn, 1,</div><div class='add'>+				      nx, rw);</div><div class='ctx'> </div><div class='ctx'> 		new_prot = pgprot_clear_protnone_bits(new_prot);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c<br/>index df5fac428408..5159c7a22922 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/net/bpf_jit_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -816,9 +816,10 @@ done:</div><div class='ctx'> static void emit_mov_imm64(u8 **pprog, u32 dst_reg,</div><div class='ctx'> 			   const u32 imm32_hi, const u32 imm32_lo)</div><div class='ctx'> {</div><div class='add'>+	u64 imm64 = ((u64)imm32_hi &lt;&lt; 32) | (u32)imm32_lo;</div><div class='ctx'> 	u8 *prog = *pprog;</div><div class='ctx'> </div><div class='del'>-	if (is_uimm32(((u64)imm32_hi &lt;&lt; 32) | (u32)imm32_lo)) {</div><div class='add'>+	if (is_uimm32(imm64)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * For emitting plain u32, where sign bit must not be</div><div class='ctx'> 		 * propagated LLVM tends to load imm64 over mov32</div><div class='hunk'>@@ -826,6 +827,8 @@ static void emit_mov_imm64(u8 **pprog, u32 dst_reg,</div><div class='ctx'> 		 * 'mov %eax, imm32' instead.</div><div class='ctx'> 		 */</div><div class='ctx'> 		emit_mov_imm32(&amp;prog, false, dst_reg, imm32_lo);</div><div class='add'>+	} else if (is_simm32(imm64)) {</div><div class='add'>+		emit_mov_imm32(&amp;prog, true, dst_reg, imm32_lo);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* movabsq rax, imm64 */</div><div class='ctx'> 		EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));</div><div class='hunk'>@@ -1169,6 +1172,54 @@ static int emit_atomic(u8 **pprog, u8 atomic_op,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emit_atomic_index(u8 **pprog, u8 atomic_op, u32 size,</div><div class='add'>+			     u32 dst_reg, u32 src_reg, u32 index_reg, int off)</div><div class='add'>+{</div><div class='add'>+	u8 *prog = *pprog;</div><div class='add'>+</div><div class='add'>+	EMIT1(0xF0); /* lock prefix */</div><div class='add'>+	switch (size) {</div><div class='add'>+	case BPF_W:</div><div class='add'>+		EMIT1(add_3mod(0x40, dst_reg, src_reg, index_reg));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_DW:</div><div class='add'>+		EMIT1(add_3mod(0x48, dst_reg, src_reg, index_reg));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("bpf_jit: 1 and 2 byte atomics are not supported\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* emit opcode */</div><div class='add'>+	switch (atomic_op) {</div><div class='add'>+	case BPF_ADD:</div><div class='add'>+	case BPF_AND:</div><div class='add'>+	case BPF_OR:</div><div class='add'>+	case BPF_XOR:</div><div class='add'>+		/* lock *(u32/u64*)(dst_reg + idx_reg + off) &lt;op&gt;= src_reg */</div><div class='add'>+		EMIT1(simple_alu_opcodes[atomic_op]);</div><div class='add'>+		break;</div><div class='add'>+	case BPF_ADD | BPF_FETCH:</div><div class='add'>+		/* src_reg = atomic_fetch_add(dst_reg + idx_reg + off, src_reg); */</div><div class='add'>+		EMIT2(0x0F, 0xC1);</div><div class='add'>+		break;</div><div class='add'>+	case BPF_XCHG:</div><div class='add'>+		/* src_reg = atomic_xchg(dst_reg + idx_reg + off, src_reg); */</div><div class='add'>+		EMIT1(0x87);</div><div class='add'>+		break;</div><div class='add'>+	case BPF_CMPXCHG:</div><div class='add'>+		/* r0 = atomic_cmpxchg(dst_reg + idx_reg + off, r0, src_reg); */</div><div class='add'>+		EMIT2(0x0F, 0xB1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("bpf_jit: unknown atomic opcode %02x\n", atomic_op);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+	emit_insn_suffix_SIB(&amp;prog, dst_reg, src_reg, index_reg, off);</div><div class='add'>+	*pprog = prog;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DONT_CLEAR 1</div><div class='ctx'> </div><div class='ctx'> bool ex_handler_bpf(const struct exception_table_entry *x, struct pt_regs *regs)</div><div class='hunk'>@@ -1351,8 +1402,7 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case BPF_ALU64 | BPF_MOV | BPF_X:</div><div class='del'>-			if (insn-&gt;off == BPF_ADDR_SPACE_CAST &amp;&amp;</div><div class='del'>-			    insn-&gt;imm == 1U &lt;&lt; 16) {</div><div class='add'>+			if (insn_is_cast_user(insn)) {</div><div class='ctx'> 				if (dst_reg != src_reg)</div><div class='ctx'> 					/* 32-bit mov */</div><div class='ctx'> 					emit_mov_reg(&amp;prog, false, dst_reg, src_reg);</div><div class='hunk'>@@ -1383,6 +1433,16 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image</div><div class='ctx'> 				maybe_emit_mod(&amp;prog, AUX_REG, dst_reg, true);</div><div class='ctx'> 				EMIT3(0x0F, 0x44, add_2reg(0xC0, AUX_REG, dst_reg));</div><div class='ctx'> 				break;</div><div class='add'>+			} else if (insn_is_mov_percpu_addr(insn)) {</div><div class='add'>+				/* mov &lt;dst&gt;, &lt;src&gt; (if necessary) */</div><div class='add'>+				EMIT_mov(dst_reg, src_reg);</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+				/* add &lt;dst&gt;, gs:[&lt;off&gt;] */</div><div class='add'>+				EMIT2(0x65, add_1mod(0x48, dst_reg));</div><div class='add'>+				EMIT3(0x03, add_2reg(0x04, 0, dst_reg), 0x25);</div><div class='add'>+				EMIT((u32)(unsigned long)&amp;this_cpu_off, 4);</div><div class='add'>+#endif</div><div class='add'>+				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case BPF_ALU | BPF_MOV | BPF_X:</div><div class='hunk'>@@ -1807,36 +1867,41 @@ populate_extable:</div><div class='ctx'> 			if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM ||</div><div class='ctx'> 			    BPF_MODE(insn-&gt;code) == BPF_PROBE_MEMSX) {</div><div class='ctx'> 				/* Conservatively check that src_reg + insn-&gt;off is a kernel address:</div><div class='del'>-				 *   src_reg + insn-&gt;off &gt;= TASK_SIZE_MAX + PAGE_SIZE</div><div class='del'>-				 * src_reg is used as scratch for src_reg += insn-&gt;off and restored</div><div class='del'>-				 * after emit_ldx if necessary</div><div class='add'>+				 *   src_reg + insn-&gt;off &gt; TASK_SIZE_MAX + PAGE_SIZE</div><div class='add'>+				 *   and</div><div class='add'>+				 *   src_reg + insn-&gt;off &lt; VSYSCALL_ADDR</div><div class='ctx'> 				 */</div><div class='ctx'> </div><div class='del'>-				u64 limit = TASK_SIZE_MAX + PAGE_SIZE;</div><div class='add'>+				u64 limit = TASK_SIZE_MAX + PAGE_SIZE - VSYSCALL_ADDR;</div><div class='ctx'> 				u8 *end_of_jmp;</div><div class='ctx'> </div><div class='del'>-				/* At end of these emitted checks, insn-&gt;off will have been added</div><div class='del'>-				 * to src_reg, so no need to do relative load with insn-&gt;off offset</div><div class='del'>-				 */</div><div class='del'>-				insn_off = 0;</div><div class='add'>+				/* movabsq r10, VSYSCALL_ADDR */</div><div class='add'>+				emit_mov_imm64(&amp;prog, BPF_REG_AX, (long)VSYSCALL_ADDR &gt;&gt; 32,</div><div class='add'>+					       (u32)(long)VSYSCALL_ADDR);</div><div class='ctx'> </div><div class='del'>-				/* movabsq r11, limit */</div><div class='del'>-				EMIT2(add_1mod(0x48, AUX_REG), add_1reg(0xB8, AUX_REG));</div><div class='del'>-				EMIT((u32)limit, 4);</div><div class='del'>-				EMIT(limit &gt;&gt; 32, 4);</div><div class='add'>+				/* mov src_reg, r11 */</div><div class='add'>+				EMIT_mov(AUX_REG, src_reg);</div><div class='ctx'> </div><div class='ctx'> 				if (insn-&gt;off) {</div><div class='del'>-					/* add src_reg, insn-&gt;off */</div><div class='del'>-					maybe_emit_1mod(&amp;prog, src_reg, true);</div><div class='del'>-					EMIT2_off32(0x81, add_1reg(0xC0, src_reg), insn-&gt;off);</div><div class='add'>+					/* add r11, insn-&gt;off */</div><div class='add'>+					maybe_emit_1mod(&amp;prog, AUX_REG, true);</div><div class='add'>+					EMIT2_off32(0x81, add_1reg(0xC0, AUX_REG), insn-&gt;off);</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='del'>-				/* cmp src_reg, r11 */</div><div class='del'>-				maybe_emit_mod(&amp;prog, src_reg, AUX_REG, true);</div><div class='del'>-				EMIT2(0x39, add_2reg(0xC0, src_reg, AUX_REG));</div><div class='add'>+				/* sub r11, r10 */</div><div class='add'>+				maybe_emit_mod(&amp;prog, AUX_REG, BPF_REG_AX, true);</div><div class='add'>+				EMIT2(0x29, add_2reg(0xC0, AUX_REG, BPF_REG_AX));</div><div class='add'>+</div><div class='add'>+				/* movabsq r10, limit */</div><div class='add'>+				emit_mov_imm64(&amp;prog, BPF_REG_AX, (long)limit &gt;&gt; 32,</div><div class='add'>+					       (u32)(long)limit);</div><div class='add'>+</div><div class='add'>+				/* cmp r10, r11 */</div><div class='add'>+				maybe_emit_mod(&amp;prog, AUX_REG, BPF_REG_AX, true);</div><div class='add'>+				EMIT2(0x39, add_2reg(0xC0, AUX_REG, BPF_REG_AX));</div><div class='ctx'> </div><div class='del'>-				/* if unsigned '&gt;=', goto load */</div><div class='del'>-				EMIT2(X86_JAE, 0);</div><div class='add'>+				/* if unsigned '&gt;', goto load */</div><div class='add'>+				EMIT2(X86_JA, 0);</div><div class='ctx'> 				end_of_jmp = prog;</div><div class='ctx'> </div><div class='ctx'> 				/* xor dst_reg, dst_reg */</div><div class='hunk'>@@ -1862,18 +1927,6 @@ populate_extable:</div><div class='ctx'> 				/* populate jmp_offset for JMP above */</div><div class='ctx'> 				start_of_ldx[-1] = prog - start_of_ldx;</div><div class='ctx'> </div><div class='del'>-				if (insn-&gt;off &amp;&amp; src_reg != dst_reg) {</div><div class='del'>-					/* sub src_reg, insn-&gt;off</div><div class='del'>-					 * Restore src_reg after "add src_reg, insn-&gt;off" in prev</div><div class='del'>-					 * if statement. But if src_reg == dst_reg, emit_ldx</div><div class='del'>-					 * above already clobbered src_reg, so no need to restore.</div><div class='del'>-					 * If add src_reg, insn-&gt;off was unnecessary, no need to</div><div class='del'>-					 * restore either.</div><div class='del'>-					 */</div><div class='del'>-					maybe_emit_1mod(&amp;prog, src_reg, true);</div><div class='del'>-					EMIT2_off32(0x81, add_1reg(0xE8, src_reg), insn-&gt;off);</div><div class='del'>-				}</div><div class='del'>-</div><div class='ctx'> 				if (!bpf_prog-&gt;aux-&gt;extable)</div><div class='ctx'> 					break;</div><div class='ctx'> </div><div class='hunk'>@@ -1970,6 +2023,15 @@ populate_extable:</div><div class='ctx'> 				return err;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case BPF_STX | BPF_PROBE_ATOMIC | BPF_W:</div><div class='add'>+		case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW:</div><div class='add'>+			start_of_ldx = prog;</div><div class='add'>+			err = emit_atomic_index(&amp;prog, insn-&gt;imm, BPF_SIZE(insn-&gt;code),</div><div class='add'>+						dst_reg, src_reg, X86_REG_R12, insn-&gt;off);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			goto populate_extable;</div><div class='add'>+</div><div class='ctx'> 			/* call */</div><div class='ctx'> 		case BPF_JMP | BPF_CALL: {</div><div class='ctx'> 			u8 *ip = image + addrs[i - 1];</div><div class='hunk'>@@ -3001,12 +3063,9 @@ void arch_free_bpf_trampoline(void *image, unsigned int size)</div><div class='ctx'> 	bpf_prog_pack_free(image, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void arch_protect_bpf_trampoline(void *image, unsigned int size)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void arch_unprotect_bpf_trampoline(void *image, unsigned int size)</div><div class='add'>+int arch_protect_bpf_trampoline(void *image, unsigned int size)</div><div class='ctx'> {</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *image, void *image_end,</div><div class='hunk'>@@ -3366,6 +3425,11 @@ bool bpf_jit_supports_subprog_tailcalls(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_supports_percpu_insn(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bpf_jit_free(struct bpf_prog *prog)</div><div class='ctx'> {</div><div class='ctx'> 	if (prog-&gt;jited) {</div><div class='hunk'>@@ -3469,7 +3533,28 @@ bool bpf_jit_supports_arena(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)</div><div class='add'>+{</div><div class='add'>+	if (!in_arena)</div><div class='add'>+		return true;</div><div class='add'>+	switch (insn-&gt;code) {</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='add'>+		if (insn-&gt;imm == (BPF_AND | BPF_FETCH) ||</div><div class='add'>+		    insn-&gt;imm == (BPF_OR | BPF_FETCH) ||</div><div class='add'>+		    insn-&gt;imm == (BPF_XOR | BPF_FETCH))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool bpf_jit_supports_ptr_xchg(void)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/* x86-64 JIT emits its own code to filter user addresses so return 0 here */</div><div class='add'>+u64 bpf_arch_uaddress_limit(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/net/bpf_jit_comp32.c b/arch/x86/net/bpf_jit_comp32.c<br/>index c10083a8e68e..de0f9e5f9f73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/net/bpf_jit_comp32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/net/bpf_jit_comp32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/net/bpf_jit_comp32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/net/bpf_jit_comp32.c</a></div><div class='hunk'>@@ -2600,8 +2600,7 @@ out_image:</div><div class='ctx'> 	if (bpf_jit_enable &gt; 1)</div><div class='ctx'> 		bpf_jit_dump(prog-&gt;len, proglen, pass + 1, image);</div><div class='ctx'> </div><div class='del'>-	if (image) {</div><div class='del'>-		bpf_jit_binary_lock_ro(header);</div><div class='add'>+	if (image &amp;&amp; !bpf_jit_binary_lock_ro(header)) {</div><div class='ctx'> 		prog-&gt;bpf_func = (void *)image;</div><div class='ctx'> 		prog-&gt;jited = 1;</div><div class='ctx'> 		prog-&gt;jited_len = proglen;</div><div class='head'>diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c<br/>index 87313701f069..f5dbd25651e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/pci/ce4100.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/pci/ce4100.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/pci/ce4100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/pci/ce4100.c</a></div><div class='hunk'>@@ -35,12 +35,6 @@ struct sim_dev_reg {</div><div class='ctx'> 	struct sim_reg sim_reg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct sim_reg_op {</div><div class='del'>-	void (*init)(struct sim_dev_reg *reg);</div><div class='del'>-	void (*read)(struct sim_dev_reg *reg, u32 value);</div><div class='del'>-	void (*write)(struct sim_dev_reg *reg, u32 value);</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define MB (1024 * 1024)</div><div class='ctx'> #define KB (1024)</div><div class='ctx'> #define SIZE_TO_MASK(size) (~(size - 1))</div><div class='head'>diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c<br/>index f32451bdcfdd..f8126821a94d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/ce4100/ce4100.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/ce4100/ce4100.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/ce4100/ce4100.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/platform/ce4100/ce4100.c</a></div><div class='hunk'>@@ -139,7 +139,6 @@ void __init x86_ce4100_early_setup(void)</div><div class='ctx'> 	x86_init.resources.probe_roms		= x86_init_noop;</div><div class='ctx'> 	x86_init.mpparse.find_mptable		= x86_init_noop;</div><div class='ctx'> 	x86_init.mpparse.early_parse_smp_cfg	= x86_init_noop;</div><div class='del'>-	x86_init.mpparse.parse_smp_cfg		= x86_dtb_parse_smp_config;</div><div class='ctx'> 	x86_init.pci.init			= ce4100_pci_init;</div><div class='ctx'> 	x86_init.pci.init_irq			= sdv_pci_init;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/platform/iris/iris.c b/arch/x86/platform/iris/iris.c<br/>index b42bfdab01a9..c5f3bbdbdcfe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/iris/iris.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/iris/iris.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/iris/iris.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/platform/iris/iris.c</a></div><div class='hunk'>@@ -62,11 +62,10 @@ static int iris_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iris_remove(struct platform_device *pdev)</div><div class='add'>+static void iris_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	pm_power_off = old_pm_power_off;</div><div class='ctx'> 	printk(KERN_INFO "Iris power_off handler uninstalled.\n");</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver iris_driver = {</div><div class='hunk'>@@ -74,7 +73,7 @@ static struct platform_driver iris_driver = {</div><div class='ctx'> 		.name   = "iris",</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe          = iris_probe,</div><div class='del'>-	.remove         = iris_remove,</div><div class='add'>+	.remove_new     = iris_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource iris_resources[] = {</div><div class='head'>diff --git a/arch/x86/platform/olpc/olpc-xo1-pm.c b/arch/x86/platform/olpc/olpc-xo1-pm.c<br/>index f067ac780ba7..6a9c42de74e7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/olpc/olpc-xo1-pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/platform/olpc/olpc-xo1-pm.c</a></div><div class='hunk'>@@ -144,7 +144,7 @@ static int xo1_pm_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xo1_pm_remove(struct platform_device *pdev)</div><div class='add'>+static void xo1_pm_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	if (strcmp(pdev-&gt;name, "cs5535-pms") == 0)</div><div class='ctx'> 		pms_base = 0;</div><div class='hunk'>@@ -152,7 +152,6 @@ static int xo1_pm_remove(struct platform_device *pdev)</div><div class='ctx'> 		acpi_base = 0;</div><div class='ctx'> </div><div class='ctx'> 	pm_power_off = NULL;</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver cs5535_pms_driver = {</div><div class='hunk'>@@ -160,7 +159,7 @@ static struct platform_driver cs5535_pms_driver = {</div><div class='ctx'> 		.name = "cs5535-pms",</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = xo1_pm_probe,</div><div class='del'>-	.remove = xo1_pm_remove,</div><div class='add'>+	.remove_new = xo1_pm_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver cs5535_acpi_driver = {</div><div class='hunk'>@@ -168,7 +167,7 @@ static struct platform_driver cs5535_acpi_driver = {</div><div class='ctx'> 		.name = "olpc-xo1-pm-acpi",</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = xo1_pm_probe,</div><div class='del'>-	.remove = xo1_pm_remove,</div><div class='add'>+	.remove_new = xo1_pm_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init xo1_pm_init(void)</div><div class='head'>diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c<br/>index 89f25af4b3c3..46d42ff6e18a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-sci.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/platform/olpc/olpc-xo1-sci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-sci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></div><div class='hunk'>@@ -598,7 +598,7 @@ err_ebook:</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xo1_sci_remove(struct platform_device *pdev)</div><div class='add'>+static void xo1_sci_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	free_irq(sci_irq, pdev);</div><div class='ctx'> 	cancel_work_sync(&amp;sci_work);</div><div class='hunk'>@@ -608,7 +608,6 @@ static int xo1_sci_remove(struct platform_device *pdev)</div><div class='ctx'> 	free_ebook_switch();</div><div class='ctx'> 	free_power_button();</div><div class='ctx'> 	acpi_base = 0;</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver xo1_sci_driver = {</div><div class='hunk'>@@ -617,7 +616,7 @@ static struct platform_driver xo1_sci_driver = {</div><div class='ctx'> 		.dev_groups = lid_groups,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = xo1_sci_probe,</div><div class='del'>-	.remove = xo1_sci_remove,</div><div class='add'>+	.remove_new = xo1_sci_remove,</div><div class='ctx'> 	.suspend = xo1_sci_suspend,</div><div class='ctx'> 	.resume = xo1_sci_resume,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/purgatory/Makefile b/arch/x86/purgatory/Makefile<br/>index bc31863c5ee6..a18591f6e6d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/purgatory/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/purgatory/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/purgatory/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/purgatory/Makefile</a></div><div class='hunk'>@@ -42,7 +42,8 @@ KCOV_INSTRUMENT := n</div><div class='ctx'> # make up the standalone purgatory.ro</div><div class='ctx'> </div><div class='ctx'> PURGATORY_CFLAGS_REMOVE := -mcmodel=kernel</div><div class='del'>-PURGATORY_CFLAGS := -mcmodel=large -ffreestanding -fno-zero-initialized-in-bss -g0</div><div class='add'>+PURGATORY_CFLAGS := -mcmodel=small -ffreestanding -fno-zero-initialized-in-bss -g0</div><div class='add'>+PURGATORY_CFLAGS += -fpic -fvisibility=hidden</div><div class='ctx'> PURGATORY_CFLAGS += $(DISABLE_STACKLEAK_PLUGIN) -DDISABLE_BRANCH_PROFILING</div><div class='ctx'> PURGATORY_CFLAGS += -fno-stack-protector</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/tools/relocs.c b/arch/x86/tools/relocs.c<br/>index b029fb81ebee..c101bed61940 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/tools/relocs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/tools/relocs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/tools/relocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/tools/relocs.c</a></div><div class='hunk'>@@ -11,41 +11,42 @@</div><div class='ctx'> #define Elf_Shdr		ElfW(Shdr)</div><div class='ctx'> #define Elf_Sym			ElfW(Sym)</div><div class='ctx'> </div><div class='del'>-static Elf_Ehdr		ehdr;</div><div class='del'>-static unsigned long	shnum;</div><div class='del'>-static unsigned int	shstrndx;</div><div class='del'>-static unsigned int	shsymtabndx;</div><div class='del'>-static unsigned int	shxsymtabndx;</div><div class='add'>+static Elf_Ehdr			ehdr;</div><div class='add'>+static unsigned long		shnum;</div><div class='add'>+static unsigned int		shstrndx;</div><div class='add'>+static unsigned int		shsymtabndx;</div><div class='add'>+static unsigned int		shxsymtabndx;</div><div class='ctx'> </div><div class='ctx'> static int sym_index(Elf_Sym *sym);</div><div class='ctx'> </div><div class='ctx'> struct relocs {</div><div class='del'>-	uint32_t	*offset;</div><div class='del'>-	unsigned long	count;</div><div class='del'>-	unsigned long	size;</div><div class='add'>+				uint32_t	*offset;</div><div class='add'>+				unsigned long	count;</div><div class='add'>+				unsigned long	size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct relocs relocs16;</div><div class='del'>-static struct relocs relocs32;</div><div class='add'>+static struct relocs		relocs16;</div><div class='add'>+static struct relocs		relocs32;</div><div class='add'>+</div><div class='ctx'> #if ELF_BITS == 64</div><div class='del'>-static struct relocs relocs32neg;</div><div class='del'>-static struct relocs relocs64;</div><div class='del'>-#define FMT PRIu64</div><div class='add'>+static struct relocs		relocs32neg;</div><div class='add'>+static struct relocs		relocs64;</div><div class='add'>+# define FMT PRIu64</div><div class='ctx'> #else</div><div class='del'>-#define FMT PRIu32</div><div class='add'>+# define FMT PRIu32</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> struct section {</div><div class='del'>-	Elf_Shdr       shdr;</div><div class='del'>-	struct section *link;</div><div class='del'>-	Elf_Sym        *symtab;</div><div class='del'>-	Elf32_Word     *xsymtab;</div><div class='del'>-	Elf_Rel        *reltab;</div><div class='del'>-	char           *strtab;</div><div class='add'>+				Elf_Shdr       shdr;</div><div class='add'>+				struct section *link;</div><div class='add'>+				Elf_Sym        *symtab;</div><div class='add'>+				Elf32_Word     *xsymtab;</div><div class='add'>+				Elf_Rel        *reltab;</div><div class='add'>+				char           *strtab;</div><div class='ctx'> };</div><div class='del'>-static struct section *secs;</div><div class='add'>+static struct section		*secs;</div><div class='ctx'> </div><div class='del'>-static const char * const sym_regex_kernel[S_NSYMTYPES] = {</div><div class='add'>+static const char * const	sym_regex_kernel[S_NSYMTYPES] = {</div><div class='ctx'> /*</div><div class='ctx'>  * Following symbols have been audited. There values are constant and do</div><div class='ctx'>  * not change if bzImage is loaded at a different physical address than</div><div class='hunk'>@@ -115,13 +116,13 @@ static const char * const sym_regex_realmode[S_NSYMTYPES] = {</div><div class='ctx'> 	"^pa_",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char * const *sym_regex;</div><div class='add'>+static const char * const	*sym_regex;</div><div class='add'>+</div><div class='add'>+static regex_t			sym_regex_c[S_NSYMTYPES];</div><div class='ctx'> </div><div class='del'>-static regex_t sym_regex_c[S_NSYMTYPES];</div><div class='ctx'> static int is_reloc(enum symtype type, const char *sym_name)</div><div class='ctx'> {</div><div class='del'>-	return sym_regex[type] &amp;&amp;</div><div class='del'>-		!regexec(&amp;sym_regex_c[type], sym_name, 0, NULL, 0);</div><div class='add'>+	return sym_regex[type] &amp;&amp; !regexec(&amp;sym_regex_c[type], sym_name, 0, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void regex_init(int use_real_mode)</div><div class='hunk'>@@ -139,8 +140,7 @@ static void regex_init(int use_real_mode)</div><div class='ctx'> 		if (!sym_regex[i])</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		err = regcomp(&amp;sym_regex_c[i], sym_regex[i],</div><div class='del'>-			      REG_EXTENDED|REG_NOSUB);</div><div class='add'>+		err = regcomp(&amp;sym_regex_c[i], sym_regex[i], REG_EXTENDED|REG_NOSUB);</div><div class='ctx'> </div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			regerror(err, &amp;sym_regex_c[i], errbuf, sizeof(errbuf));</div><div class='hunk'>@@ -163,9 +163,10 @@ static const char *sym_type(unsigned type)</div><div class='ctx'> #undef SYM_TYPE</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *name = "unknown sym type name";</div><div class='del'>-	if (type &lt; ARRAY_SIZE(type_name)) {</div><div class='add'>+</div><div class='add'>+	if (type &lt; ARRAY_SIZE(type_name))</div><div class='ctx'> 		name = type_name[type];</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -179,9 +180,10 @@ static const char *sym_bind(unsigned bind)</div><div class='ctx'> #undef SYM_BIND</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *name = "unknown sym bind name";</div><div class='del'>-	if (bind &lt; ARRAY_SIZE(bind_name)) {</div><div class='add'>+</div><div class='add'>+	if (bind &lt; ARRAY_SIZE(bind_name))</div><div class='ctx'> 		name = bind_name[bind];</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -196,9 +198,10 @@ static const char *sym_visibility(unsigned visibility)</div><div class='ctx'> #undef SYM_VISIBILITY</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *name = "unknown sym visibility name";</div><div class='del'>-	if (visibility &lt; ARRAY_SIZE(visibility_name)) {</div><div class='add'>+</div><div class='add'>+	if (visibility &lt; ARRAY_SIZE(visibility_name))</div><div class='ctx'> 		name = visibility_name[visibility];</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -244,9 +247,10 @@ static const char *rel_type(unsigned type)</div><div class='ctx'> #undef REL_TYPE</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *name = "unknown type rel type name";</div><div class='del'>-	if (type &lt; ARRAY_SIZE(type_name) &amp;&amp; type_name[type]) {</div><div class='add'>+</div><div class='add'>+	if (type &lt; ARRAY_SIZE(type_name) &amp;&amp; type_name[type])</div><div class='ctx'> 		name = type_name[type];</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -256,15 +260,14 @@ static const char *sec_name(unsigned shndx)</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	sec_strtab = secs[shstrndx].strtab;</div><div class='ctx'> 	name = "&lt;noname&gt;";</div><div class='del'>-	if (shndx &lt; shnum) {</div><div class='add'>+</div><div class='add'>+	if (shndx &lt; shnum)</div><div class='ctx'> 		name = sec_strtab + secs[shndx].shdr.sh_name;</div><div class='del'>-	}</div><div class='del'>-	else if (shndx == SHN_ABS) {</div><div class='add'>+	else if (shndx == SHN_ABS)</div><div class='ctx'> 		name = "ABSOLUTE";</div><div class='del'>-	}</div><div class='del'>-	else if (shndx == SHN_COMMON) {</div><div class='add'>+	else if (shndx == SHN_COMMON)</div><div class='ctx'> 		name = "COMMON";</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -272,18 +275,19 @@ static const char *sym_name(const char *sym_strtab, Elf_Sym *sym)</div><div class='ctx'> {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	name = "&lt;noname&gt;";</div><div class='del'>-	if (sym-&gt;st_name) {</div><div class='add'>+</div><div class='add'>+	if (sym-&gt;st_name)</div><div class='ctx'> 		name = sym_strtab + sym-&gt;st_name;</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='add'>+	else</div><div class='ctx'> 		name = sec_name(sym_index(sym));</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static Elf_Sym *sym_lookup(const char *symname)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='ctx'> 		long nsyms;</div><div class='hunk'>@@ -309,14 +313,15 @@ static Elf_Sym *sym_lookup(const char *symname)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if BYTE_ORDER == LITTLE_ENDIAN</div><div class='del'>-#define le16_to_cpu(val) (val)</div><div class='del'>-#define le32_to_cpu(val) (val)</div><div class='del'>-#define le64_to_cpu(val) (val)</div><div class='add'>+# define le16_to_cpu(val)	(val)</div><div class='add'>+# define le32_to_cpu(val)	(val)</div><div class='add'>+# define le64_to_cpu(val)	(val)</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='ctx'> #if BYTE_ORDER == BIG_ENDIAN</div><div class='del'>-#define le16_to_cpu(val) bswap_16(val)</div><div class='del'>-#define le32_to_cpu(val) bswap_32(val)</div><div class='del'>-#define le64_to_cpu(val) bswap_64(val)</div><div class='add'>+# define le16_to_cpu(val)	bswap_16(val)</div><div class='add'>+# define le32_to_cpu(val)	bswap_32(val)</div><div class='add'>+# define le64_to_cpu(val)	bswap_64(val)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static uint16_t elf16_to_cpu(uint16_t val)</div><div class='hunk'>@@ -337,13 +342,13 @@ static uint64_t elf64_to_cpu(uint64_t val)</div><div class='ctx'> {</div><div class='ctx'>         return le64_to_cpu(val);</div><div class='ctx'> }</div><div class='del'>-#define elf_addr_to_cpu(x)	elf64_to_cpu(x)</div><div class='del'>-#define elf_off_to_cpu(x)	elf64_to_cpu(x)</div><div class='del'>-#define elf_xword_to_cpu(x)	elf64_to_cpu(x)</div><div class='add'>+# define elf_addr_to_cpu(x)	elf64_to_cpu(x)</div><div class='add'>+# define elf_off_to_cpu(x)	elf64_to_cpu(x)</div><div class='add'>+# define elf_xword_to_cpu(x)	elf64_to_cpu(x)</div><div class='ctx'> #else</div><div class='del'>-#define elf_addr_to_cpu(x)	elf32_to_cpu(x)</div><div class='del'>-#define elf_off_to_cpu(x)	elf32_to_cpu(x)</div><div class='del'>-#define elf_xword_to_cpu(x)	elf32_to_cpu(x)</div><div class='add'>+# define elf_addr_to_cpu(x)	elf32_to_cpu(x)</div><div class='add'>+# define elf_off_to_cpu(x)	elf32_to_cpu(x)</div><div class='add'>+# define elf_xword_to_cpu(x)	elf32_to_cpu(x)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int sym_index(Elf_Sym *sym)</div><div class='hunk'>@@ -365,22 +370,17 @@ static int sym_index(Elf_Sym *sym)</div><div class='ctx'> </div><div class='ctx'> static void read_ehdr(FILE *fp)</div><div class='ctx'> {</div><div class='del'>-	if (fread(&amp;ehdr, sizeof(ehdr), 1, fp) != 1) {</div><div class='del'>-		die("Cannot read ELF header: %s\n",</div><div class='del'>-			strerror(errno));</div><div class='del'>-	}</div><div class='del'>-	if (memcmp(ehdr.e_ident, ELFMAG, SELFMAG) != 0) {</div><div class='add'>+	if (fread(&amp;ehdr, sizeof(ehdr), 1, fp) != 1)</div><div class='add'>+		die("Cannot read ELF header: %s\n", strerror(errno));</div><div class='add'>+	if (memcmp(ehdr.e_ident, ELFMAG, SELFMAG) != 0)</div><div class='ctx'> 		die("No ELF magic\n");</div><div class='del'>-	}</div><div class='del'>-	if (ehdr.e_ident[EI_CLASS] != ELF_CLASS) {</div><div class='add'>+	if (ehdr.e_ident[EI_CLASS] != ELF_CLASS)</div><div class='ctx'> 		die("Not a %d bit executable\n", ELF_BITS);</div><div class='del'>-	}</div><div class='del'>-	if (ehdr.e_ident[EI_DATA] != ELFDATA2LSB) {</div><div class='add'>+	if (ehdr.e_ident[EI_DATA] != ELFDATA2LSB)</div><div class='ctx'> 		die("Not a LSB ELF executable\n");</div><div class='del'>-	}</div><div class='del'>-	if (ehdr.e_ident[EI_VERSION] != EV_CURRENT) {</div><div class='add'>+	if (ehdr.e_ident[EI_VERSION] != EV_CURRENT)</div><div class='ctx'> 		die("Unknown ELF version\n");</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	/* Convert the fields to native endian */</div><div class='ctx'> 	ehdr.e_type      = elf_half_to_cpu(ehdr.e_type);</div><div class='ctx'> 	ehdr.e_machine   = elf_half_to_cpu(ehdr.e_machine);</div><div class='hunk'>@@ -439,19 +439,18 @@ static void read_shdrs(FILE *fp)</div><div class='ctx'> 	Elf_Shdr shdr;</div><div class='ctx'> </div><div class='ctx'> 	secs = calloc(shnum, sizeof(struct section));</div><div class='del'>-	if (!secs) {</div><div class='del'>-		die("Unable to allocate %ld section headers\n",</div><div class='del'>-		    shnum);</div><div class='del'>-	}</div><div class='del'>-	if (fseek(fp, ehdr.e_shoff, SEEK_SET) &lt; 0) {</div><div class='del'>-		die("Seek to %" FMT " failed: %s\n",</div><div class='del'>-		    ehdr.e_shoff, strerror(errno));</div><div class='del'>-	}</div><div class='add'>+	if (!secs)</div><div class='add'>+		die("Unable to allocate %ld section headers\n", shnum);</div><div class='add'>+</div><div class='add'>+	if (fseek(fp, ehdr.e_shoff, SEEK_SET) &lt; 0)</div><div class='add'>+		die("Seek to %" FMT " failed: %s\n", ehdr.e_shoff, strerror(errno));</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='add'>+</div><div class='ctx'> 		if (fread(&amp;shdr, sizeof(shdr), 1, fp) != 1)</div><div class='del'>-			die("Cannot read ELF section headers %d/%ld: %s\n",</div><div class='del'>-			    i, shnum, strerror(errno));</div><div class='add'>+			die("Cannot read ELF section headers %d/%ld: %s\n", i, shnum, strerror(errno));</div><div class='add'>+</div><div class='ctx'> 		sec-&gt;shdr.sh_name      = elf_word_to_cpu(shdr.sh_name);</div><div class='ctx'> 		sec-&gt;shdr.sh_type      = elf_word_to_cpu(shdr.sh_type);</div><div class='ctx'> 		sec-&gt;shdr.sh_flags     = elf_xword_to_cpu(shdr.sh_flags);</div><div class='hunk'>@@ -471,31 +470,28 @@ static void read_shdrs(FILE *fp)</div><div class='ctx'> static void read_strtabs(FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='del'>-		if (sec-&gt;shdr.sh_type != SHT_STRTAB) {</div><div class='add'>+</div><div class='add'>+		if (sec-&gt;shdr.sh_type != SHT_STRTAB)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		sec-&gt;strtab = malloc(sec-&gt;shdr.sh_size);</div><div class='del'>-		if (!sec-&gt;strtab) {</div><div class='del'>-			die("malloc of %" FMT " bytes for strtab failed\n",</div><div class='del'>-			    sec-&gt;shdr.sh_size);</div><div class='del'>-		}</div><div class='del'>-		if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0) {</div><div class='del'>-			die("Seek to %" FMT " failed: %s\n",</div><div class='del'>-			    sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='del'>-		}</div><div class='del'>-		if (fread(sec-&gt;strtab, 1, sec-&gt;shdr.sh_size, fp)</div><div class='del'>-		    != sec-&gt;shdr.sh_size) {</div><div class='del'>-			die("Cannot read symbol table: %s\n",</div><div class='del'>-				strerror(errno));</div><div class='del'>-		}</div><div class='add'>+		if (!sec-&gt;strtab)</div><div class='add'>+			die("malloc of %" FMT " bytes for strtab failed\n", sec-&gt;shdr.sh_size);</div><div class='add'>+</div><div class='add'>+		if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0)</div><div class='add'>+			die("Seek to %" FMT " failed: %s\n", sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='add'>+</div><div class='add'>+		if (fread(sec-&gt;strtab, 1, sec-&gt;shdr.sh_size, fp) != sec-&gt;shdr.sh_size)</div><div class='add'>+			die("Cannot read symbol table: %s\n", strerror(errno));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void read_symtabs(FILE *fp)</div><div class='ctx'> {</div><div class='del'>-	int i,j;</div><div class='add'>+	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='hunk'>@@ -504,19 +500,15 @@ static void read_symtabs(FILE *fp)</div><div class='ctx'> 		switch (sec-&gt;shdr.sh_type) {</div><div class='ctx'> 		case SHT_SYMTAB_SHNDX:</div><div class='ctx'> 			sec-&gt;xsymtab = malloc(sec-&gt;shdr.sh_size);</div><div class='del'>-			if (!sec-&gt;xsymtab) {</div><div class='del'>-				die("malloc of %" FMT " bytes for xsymtab failed\n",</div><div class='del'>-				    sec-&gt;shdr.sh_size);</div><div class='del'>-			}</div><div class='del'>-			if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0) {</div><div class='del'>-				die("Seek to %" FMT " failed: %s\n",</div><div class='del'>-				    sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='del'>-			}</div><div class='del'>-			if (fread(sec-&gt;xsymtab, 1, sec-&gt;shdr.sh_size, fp)</div><div class='del'>-			    != sec-&gt;shdr.sh_size) {</div><div class='del'>-				die("Cannot read extended symbol table: %s\n",</div><div class='del'>-				    strerror(errno));</div><div class='del'>-			}</div><div class='add'>+			if (!sec-&gt;xsymtab)</div><div class='add'>+				die("malloc of %" FMT " bytes for xsymtab failed\n", sec-&gt;shdr.sh_size);</div><div class='add'>+</div><div class='add'>+			if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0)</div><div class='add'>+				die("Seek to %" FMT " failed: %s\n", sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='add'>+</div><div class='add'>+			if (fread(sec-&gt;xsymtab, 1, sec-&gt;shdr.sh_size, fp) != sec-&gt;shdr.sh_size)</div><div class='add'>+				die("Cannot read extended symbol table: %s\n", strerror(errno));</div><div class='add'>+</div><div class='ctx'> 			shxsymtabndx = i;</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -524,19 +516,15 @@ static void read_symtabs(FILE *fp)</div><div class='ctx'> 			num_syms = sec-&gt;shdr.sh_size / sizeof(Elf_Sym);</div><div class='ctx'> </div><div class='ctx'> 			sec-&gt;symtab = malloc(sec-&gt;shdr.sh_size);</div><div class='del'>-			if (!sec-&gt;symtab) {</div><div class='del'>-				die("malloc of %" FMT " bytes for symtab failed\n",</div><div class='del'>-				    sec-&gt;shdr.sh_size);</div><div class='del'>-			}</div><div class='del'>-			if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0) {</div><div class='del'>-				die("Seek to %" FMT " failed: %s\n",</div><div class='del'>-				    sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='del'>-			}</div><div class='del'>-			if (fread(sec-&gt;symtab, 1, sec-&gt;shdr.sh_size, fp)</div><div class='del'>-			    != sec-&gt;shdr.sh_size) {</div><div class='del'>-				die("Cannot read symbol table: %s\n",</div><div class='del'>-				    strerror(errno));</div><div class='del'>-			}</div><div class='add'>+			if (!sec-&gt;symtab)</div><div class='add'>+				die("malloc of %" FMT " bytes for symtab failed\n", sec-&gt;shdr.sh_size);</div><div class='add'>+</div><div class='add'>+			if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0)</div><div class='add'>+				die("Seek to %" FMT " failed: %s\n", sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='add'>+</div><div class='add'>+			if (fread(sec-&gt;symtab, 1, sec-&gt;shdr.sh_size, fp) != sec-&gt;shdr.sh_size)</div><div class='add'>+				die("Cannot read symbol table: %s\n", strerror(errno));</div><div class='add'>+</div><div class='ctx'> 			for (j = 0; j &lt; num_syms; j++) {</div><div class='ctx'> 				Elf_Sym *sym = &amp;sec-&gt;symtab[j];</div><div class='ctx'> </div><div class='hunk'>@@ -557,28 +545,27 @@ static void read_symtabs(FILE *fp)</div><div class='ctx'> </div><div class='ctx'> static void read_relocs(FILE *fp)</div><div class='ctx'> {</div><div class='del'>-	int i,j;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='del'>-		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE) {</div><div class='add'>+</div><div class='add'>+		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		sec-&gt;reltab = malloc(sec-&gt;shdr.sh_size);</div><div class='del'>-		if (!sec-&gt;reltab) {</div><div class='del'>-			die("malloc of %" FMT " bytes for relocs failed\n",</div><div class='del'>-			    sec-&gt;shdr.sh_size);</div><div class='del'>-		}</div><div class='del'>-		if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0) {</div><div class='del'>-			die("Seek to %" FMT " failed: %s\n",</div><div class='del'>-			    sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='del'>-		}</div><div class='del'>-		if (fread(sec-&gt;reltab, 1, sec-&gt;shdr.sh_size, fp)</div><div class='del'>-		    != sec-&gt;shdr.sh_size) {</div><div class='del'>-			die("Cannot read symbol table: %s\n",</div><div class='del'>-				strerror(errno));</div><div class='del'>-		}</div><div class='add'>+		if (!sec-&gt;reltab)</div><div class='add'>+			die("malloc of %" FMT " bytes for relocs failed\n", sec-&gt;shdr.sh_size);</div><div class='add'>+</div><div class='add'>+		if (fseek(fp, sec-&gt;shdr.sh_offset, SEEK_SET) &lt; 0)</div><div class='add'>+			die("Seek to %" FMT " failed: %s\n", sec-&gt;shdr.sh_offset, strerror(errno));</div><div class='add'>+</div><div class='add'>+		if (fread(sec-&gt;reltab, 1, sec-&gt;shdr.sh_size, fp) != sec-&gt;shdr.sh_size)</div><div class='add'>+			die("Cannot read symbol table: %s\n", strerror(errno));</div><div class='add'>+</div><div class='ctx'> 		for (j = 0; j &lt; sec-&gt;shdr.sh_size/sizeof(Elf_Rel); j++) {</div><div class='ctx'> 			Elf_Rel *rel = &amp;sec-&gt;reltab[j];</div><div class='add'>+</div><div class='ctx'> 			rel-&gt;r_offset = elf_addr_to_cpu(rel-&gt;r_offset);</div><div class='ctx'> 			rel-&gt;r_info   = elf_xword_to_cpu(rel-&gt;r_info);</div><div class='ctx'> #if (SHT_REL_TYPE == SHT_RELA)</div><div class='hunk'>@@ -601,23 +588,27 @@ static void print_absolute_symbols(void)</div><div class='ctx'> </div><div class='ctx'> 	printf("Absolute symbols\n");</div><div class='ctx'> 	printf(" Num:    Value Size  Type       Bind        Visibility  Name\n");</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='ctx'> 		char *sym_strtab;</div><div class='ctx'> 		int j;</div><div class='ctx'> </div><div class='del'>-		if (sec-&gt;shdr.sh_type != SHT_SYMTAB) {</div><div class='add'>+		if (sec-&gt;shdr.sh_type != SHT_SYMTAB)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		sym_strtab = sec-&gt;link-&gt;strtab;</div><div class='add'>+</div><div class='ctx'> 		for (j = 0; j &lt; sec-&gt;shdr.sh_size/sizeof(Elf_Sym); j++) {</div><div class='ctx'> 			Elf_Sym *sym;</div><div class='ctx'> 			const char *name;</div><div class='add'>+</div><div class='ctx'> 			sym = &amp;sec-&gt;symtab[j];</div><div class='ctx'> 			name = sym_name(sym_strtab, sym);</div><div class='del'>-			if (sym-&gt;st_shndx != SHN_ABS) {</div><div class='add'>+</div><div class='add'>+			if (sym-&gt;st_shndx != SHN_ABS)</div><div class='ctx'> 				continue;</div><div class='del'>-			}</div><div class='add'>+</div><div class='ctx'> 			printf(format,</div><div class='ctx'> 				j, sym-&gt;st_value, sym-&gt;st_size,</div><div class='ctx'> 				sym_type(ELF_ST_TYPE(sym-&gt;st_info)),</div><div class='hunk'>@@ -645,34 +636,37 @@ static void print_absolute_relocs(void)</div><div class='ctx'> 		char *sym_strtab;</div><div class='ctx'> 		Elf_Sym *sh_symtab;</div><div class='ctx'> 		int j;</div><div class='del'>-		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE) {</div><div class='add'>+</div><div class='add'>+		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		sec_symtab  = sec-&gt;link;</div><div class='ctx'> 		sec_applies = &amp;secs[sec-&gt;shdr.sh_info];</div><div class='del'>-		if (!(sec_applies-&gt;shdr.sh_flags &amp; SHF_ALLOC)) {</div><div class='add'>+		if (!(sec_applies-&gt;shdr.sh_flags &amp; SHF_ALLOC))</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Do not perform relocations in .notes section; any</div><div class='ctx'> 		 * values there are meant for pre-boot consumption (e.g.</div><div class='ctx'> 		 * startup_xen).</div><div class='ctx'> 		 */</div><div class='del'>-		if (sec_applies-&gt;shdr.sh_type == SHT_NOTE) {</div><div class='add'>+		if (sec_applies-&gt;shdr.sh_type == SHT_NOTE)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		sh_symtab  = sec_symtab-&gt;symtab;</div><div class='ctx'> 		sym_strtab = sec_symtab-&gt;link-&gt;strtab;</div><div class='add'>+</div><div class='ctx'> 		for (j = 0; j &lt; sec-&gt;shdr.sh_size/sizeof(Elf_Rel); j++) {</div><div class='ctx'> 			Elf_Rel *rel;</div><div class='ctx'> 			Elf_Sym *sym;</div><div class='ctx'> 			const char *name;</div><div class='add'>+</div><div class='ctx'> 			rel = &amp;sec-&gt;reltab[j];</div><div class='ctx'> 			sym = &amp;sh_symtab[ELF_R_SYM(rel-&gt;r_info)];</div><div class='ctx'> 			name = sym_name(sym_strtab, sym);</div><div class='del'>-			if (sym-&gt;st_shndx != SHN_ABS) {</div><div class='add'>+</div><div class='add'>+			if (sym-&gt;st_shndx != SHN_ABS)</div><div class='ctx'> 				continue;</div><div class='del'>-			}</div><div class='ctx'> </div><div class='ctx'> 			/* Absolute symbols are not relocated if bzImage is</div><div class='ctx'> 			 * loaded at a non-compiled address. Display a warning</div><div class='hunk'>@@ -691,10 +685,8 @@ static void print_absolute_relocs(void)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			if (!printed) {</div><div class='del'>-				printf("WARNING: Absolute relocations"</div><div class='del'>-					" present\n");</div><div class='del'>-				printf("Offset     Info     Type     Sym.Value "</div><div class='del'>-					"Sym.Name\n");</div><div class='add'>+				printf("WARNING: Absolute relocations present\n");</div><div class='add'>+				printf("Offset     Info     Type     Sym.Value Sym.Name\n");</div><div class='ctx'> 				printed = 1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -718,8 +710,8 @@ static void add_reloc(struct relocs *r, uint32_t offset)</div><div class='ctx'> 		void *mem = realloc(r-&gt;offset, newsize * sizeof(r-&gt;offset[0]));</div><div class='ctx'> </div><div class='ctx'> 		if (!mem)</div><div class='del'>-			die("realloc of %ld entries for relocs failed\n",</div><div class='del'>-                                newsize);</div><div class='add'>+			die("realloc of %ld entries for relocs failed\n", newsize);</div><div class='add'>+</div><div class='ctx'> 		r-&gt;offset = mem;</div><div class='ctx'> 		r-&gt;size = newsize;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -730,6 +722,7 @@ static void walk_relocs(int (*process)(struct section *sec, Elf_Rel *rel,</div><div class='ctx'> 			Elf_Sym *sym, const char *symname))</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+</div><div class='ctx'> 	/* Walk through the relocations */</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		char *sym_strtab;</div><div class='hunk'>@@ -738,16 +731,25 @@ static void walk_relocs(int (*process)(struct section *sec, Elf_Rel *rel,</div><div class='ctx'> 		int j;</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='ctx'> </div><div class='del'>-		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE) {</div><div class='add'>+		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		sec_symtab  = sec-&gt;link;</div><div class='ctx'> 		sec_applies = &amp;secs[sec-&gt;shdr.sh_info];</div><div class='del'>-		if (!(sec_applies-&gt;shdr.sh_flags &amp; SHF_ALLOC)) {</div><div class='add'>+		if (!(sec_applies-&gt;shdr.sh_flags &amp; SHF_ALLOC))</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Do not perform relocations in .notes sections; any</div><div class='add'>+		 * values there are meant for pre-boot consumption (e.g.</div><div class='add'>+		 * startup_xen).</div><div class='add'>+		 */</div><div class='add'>+		if (sec_applies-&gt;shdr.sh_type == SHT_NOTE)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		sh_symtab = sec_symtab-&gt;symtab;</div><div class='ctx'> 		sym_strtab = sec_symtab-&gt;link-&gt;strtab;</div><div class='add'>+</div><div class='ctx'> 		for (j = 0; j &lt; sec-&gt;shdr.sh_size/sizeof(Elf_Rel); j++) {</div><div class='ctx'> 			Elf_Rel *rel = &amp;sec-&gt;reltab[j];</div><div class='ctx'> 			Elf_Sym *sym = &amp;sh_symtab[ELF_R_SYM(rel-&gt;r_info)];</div><div class='hunk'>@@ -781,14 +783,16 @@ static void walk_relocs(int (*process)(struct section *sec, Elf_Rel *rel,</div><div class='ctx'>  * kernel data and does not require special treatment.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-static int per_cpu_shndx	= -1;</div><div class='add'>+static int per_cpu_shndx = -1;</div><div class='ctx'> static Elf_Addr per_cpu_load_addr;</div><div class='ctx'> </div><div class='ctx'> static void percpu_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; shnum; i++) {</div><div class='ctx'> 		ElfW(Sym) *sym;</div><div class='add'>+</div><div class='ctx'> 		if (strcmp(sec_name(i), ".data..percpu"))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -801,6 +805,7 @@ static void percpu_init(void)</div><div class='ctx'> </div><div class='ctx'> 		per_cpu_shndx = i;</div><div class='ctx'> 		per_cpu_load_addr = sym-&gt;st_value;</div><div class='add'>+</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -871,8 +876,7 @@ static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym,</div><div class='ctx'> 		 * Only used by jump labels</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (is_percpu_sym(sym, symname))</div><div class='del'>-			die("Invalid R_X86_64_PC64 relocation against per-CPU symbol %s\n",</div><div class='del'>-			    symname);</div><div class='add'>+			die("Invalid R_X86_64_PC64 relocation against per-CPU symbol %s\n", symname);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case R_X86_64_32:</div><div class='hunk'>@@ -892,8 +896,7 @@ static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym,</div><div class='ctx'> 			if (is_reloc(S_ABS, symname))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-			die("Invalid absolute %s relocation: %s\n",</div><div class='del'>-			    rel_type(r_type), symname);</div><div class='add'>+			die("Invalid absolute %s relocation: %s\n", rel_type(r_type), symname);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -913,8 +916,7 @@ static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		die("Unsupported relocation type: %s (%d)\n",</div><div class='del'>-		    rel_type(r_type), r_type);</div><div class='add'>+		die("Unsupported relocation type: %s (%d)\n", rel_type(r_type), r_type);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -951,8 +953,7 @@ static int do_reloc32(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='ctx'> 			if (is_reloc(S_ABS, symname))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-			die("Invalid absolute %s relocation: %s\n",</div><div class='del'>-			    rel_type(r_type), symname);</div><div class='add'>+			die("Invalid absolute %s relocation: %s\n", rel_type(r_type), symname);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -960,16 +961,14 @@ static int do_reloc32(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		die("Unsupported relocation type: %s (%d)\n",</div><div class='del'>-		    rel_type(r_type), r_type);</div><div class='add'>+		die("Unsupported relocation type: %s (%d)\n", rel_type(r_type), r_type);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int do_reloc_real(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='del'>-			 const char *symname)</div><div class='add'>+static int do_reloc_real(struct section *sec, Elf_Rel *rel, Elf_Sym *sym, const char *symname)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned r_type = ELF32_R_TYPE(rel-&gt;r_info);</div><div class='ctx'> 	int shn_abs = (sym-&gt;st_shndx == SHN_ABS) &amp;&amp; !is_reloc(S_REL, symname);</div><div class='hunk'>@@ -1004,9 +1003,7 @@ static int do_reloc_real(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='ctx'> 			if (!is_reloc(S_LIN, symname))</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='del'>-		die("Invalid %s %s relocation: %s\n",</div><div class='del'>-		    shn_abs ? "absolute" : "relative",</div><div class='del'>-		    rel_type(r_type), symname);</div><div class='add'>+		die("Invalid %s %s relocation: %s\n", shn_abs ? "absolute" : "relative", rel_type(r_type), symname);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case R_386_32:</div><div class='hunk'>@@ -1027,14 +1024,11 @@ static int do_reloc_real(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='ctx'> 				add_reloc(&amp;relocs32, rel-&gt;r_offset);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		die("Invalid %s %s relocation: %s\n",</div><div class='del'>-		    shn_abs ? "absolute" : "relative",</div><div class='del'>-		    rel_type(r_type), symname);</div><div class='add'>+		die("Invalid %s %s relocation: %s\n", shn_abs ? "absolute" : "relative", rel_type(r_type), symname);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		die("Unsupported relocation type: %s (%d)\n",</div><div class='del'>-		    rel_type(r_type), r_type);</div><div class='add'>+		die("Unsupported relocation type: %s (%d)\n", rel_type(r_type), r_type);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1046,7 +1040,10 @@ static int do_reloc_real(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='ctx'> static int cmp_relocs(const void *va, const void *vb)</div><div class='ctx'> {</div><div class='ctx'> 	const uint32_t *a, *b;</div><div class='del'>-	a = va; b = vb;</div><div class='add'>+</div><div class='add'>+	a = va;</div><div class='add'>+	b = vb;</div><div class='add'>+</div><div class='ctx'> 	return (*a == *b)? 0 : (*a &gt; *b)? 1 : -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1060,6 +1057,7 @@ static int write32(uint32_t v, FILE *f)</div><div class='ctx'> 	unsigned char buf[4];</div><div class='ctx'> </div><div class='ctx'> 	put_unaligned_le32(v, buf);</div><div class='add'>+</div><div class='ctx'> 	return fwrite(buf, 1, 4, f) == 4 ? 0 : -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1072,8 +1070,7 @@ static void emit_relocs(int as_text, int use_real_mode)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int (*write_reloc)(uint32_t, FILE *) = write32;</div><div class='del'>-	int (*do_reloc)(struct section *sec, Elf_Rel *rel, Elf_Sym *sym,</div><div class='del'>-			const char *symname);</div><div class='add'>+	int (*do_reloc)(struct section *sec, Elf_Rel *rel, Elf_Sym *sym, const char *symname);</div><div class='ctx'> </div><div class='ctx'> #if ELF_BITS == 64</div><div class='ctx'> 	if (!use_real_mode)</div><div class='hunk'>@@ -1160,6 +1157,7 @@ static int do_reloc_info(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym,</div><div class='ctx'> 		rel_type(ELF_R_TYPE(rel-&gt;r_info)),</div><div class='ctx'> 		symname,</div><div class='ctx'> 		sec_name(sym_index(sym)));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1185,19 +1183,24 @@ void process(FILE *fp, int use_real_mode, int as_text,</div><div class='ctx'> 	read_strtabs(fp);</div><div class='ctx'> 	read_symtabs(fp);</div><div class='ctx'> 	read_relocs(fp);</div><div class='add'>+</div><div class='ctx'> 	if (ELF_BITS == 64)</div><div class='ctx'> 		percpu_init();</div><div class='add'>+</div><div class='ctx'> 	if (show_absolute_syms) {</div><div class='ctx'> 		print_absolute_symbols();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (show_absolute_relocs) {</div><div class='ctx'> 		print_absolute_relocs();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (show_reloc_info) {</div><div class='ctx'> 		print_reloc_info();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	emit_relocs(as_text, use_real_mode);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/virt/svm/sev.c b/arch/x86/virt/svm/sev.c<br/>index ab0e8448bb6e..0ae10535c699 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/svm/sev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/virt/svm/sev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/svm/sev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/virt/svm/sev.c</a></div><div class='hunk'>@@ -163,6 +163,42 @@ bool snp_probe_rmptable_info(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init __snp_fixup_e820_tables(u64 pa)</div><div class='add'>+{</div><div class='add'>+	if (IS_ALIGNED(pa, PMD_SIZE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle cases where the RMP table placement by the BIOS is not</div><div class='add'>+	 * 2M aligned and the kexec kernel could try to allocate</div><div class='add'>+	 * from within that chunk which then causes a fatal RMP fault.</div><div class='add'>+	 *</div><div class='add'>+	 * The e820_table needs to be updated as it is converted to</div><div class='add'>+	 * kernel memory resources and used by KEXEC_FILE_LOAD syscall</div><div class='add'>+	 * to load kexec segments.</div><div class='add'>+	 *</div><div class='add'>+	 * The e820_table_firmware needs to be updated as it is exposed</div><div class='add'>+	 * to sysfs and used by the KEXEC_LOAD syscall to load kexec</div><div class='add'>+	 * segments.</div><div class='add'>+	 *</div><div class='add'>+	 * The e820_table_kexec needs to be updated as it passed to</div><div class='add'>+	 * the kexec-ed kernel.</div><div class='add'>+	 */</div><div class='add'>+	pa = ALIGN_DOWN(pa, PMD_SIZE);</div><div class='add'>+	if (e820__mapped_any(pa, pa + PMD_SIZE, E820_TYPE_RAM)) {</div><div class='add'>+		pr_info("Reserving start/end of RMP table on a 2MB boundary [0x%016llx]\n", pa);</div><div class='add'>+		e820__range_update(pa, PMD_SIZE, E820_TYPE_RAM, E820_TYPE_RESERVED);</div><div class='add'>+		e820__range_update_table(e820_table_kexec, pa, PMD_SIZE, E820_TYPE_RAM, E820_TYPE_RESERVED);</div><div class='add'>+		e820__range_update_table(e820_table_firmware, pa, PMD_SIZE, E820_TYPE_RAM, E820_TYPE_RESERVED);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init snp_fixup_e820_tables(void)</div><div class='add'>+{</div><div class='add'>+	__snp_fixup_e820_tables(probed_rmp_base);</div><div class='add'>+	__snp_fixup_e820_tables(probed_rmp_base + probed_rmp_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Do the necessary preparations which are verified by the firmware as</div><div class='ctx'>  * described in the SNP_INIT_EX firmware command description in the SNP</div><div class='head'>diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c<br/>index 4d6826a76f78..49a1c6890b55 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/virt/vmx/tdx/tdx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/virt/vmx/tdx/tdx.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='del'>-#include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/special_insns.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='head'>diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c<br/>index a01ca255b0c6..5f3a69f6ec34 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/enlighten.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/xen/enlighten.c</a></div><div class='hunk'>@@ -1,8 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_XEN_BALLOON_MEMORY_HOTPLUG</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/kexec.h&gt;</div><div class='head'>diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c<br/>index ace2eb054053..9ba53814ed6a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten_pv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/enlighten_pv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten_pv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/xen/enlighten_pv.c</a></div><div class='hunk'>@@ -219,13 +219,21 @@ static __read_mostly unsigned int cpuid_leaf5_edx_val;</div><div class='ctx'> static void xen_cpuid(unsigned int *ax, unsigned int *bx,</div><div class='ctx'> 		      unsigned int *cx, unsigned int *dx)</div><div class='ctx'> {</div><div class='del'>-	unsigned maskebx = ~0;</div><div class='add'>+	unsigned int maskebx = ~0;</div><div class='add'>+	unsigned int or_ebx = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mask out inconvenient features, to try and disable as many</div><div class='ctx'> 	 * unsupported kernel subsystems as possible.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (*ax) {</div><div class='add'>+	case 0x1:</div><div class='add'>+		/* Replace initial APIC ID in bits 24-31 of EBX. */</div><div class='add'>+		/* See xen_pv_smp_config() for related topology preparations. */</div><div class='add'>+		maskebx = 0x00ffffff;</div><div class='add'>+		or_ebx = smp_processor_id() &lt;&lt; 24;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case CPUID_MWAIT_LEAF:</div><div class='ctx'> 		/* Synthesize the values.. */</div><div class='ctx'> 		*ax = 0;</div><div class='hunk'>@@ -248,6 +256,7 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,</div><div class='ctx'> 		: "0" (*ax), "2" (*cx));</div><div class='ctx'> </div><div class='ctx'> 	*bx &amp;= maskebx;</div><div class='add'>+	*bx |= or_ebx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool __init xen_check_mwait(void)</div><div class='head'>diff --git a/arch/x86/xen/smp_pv.c b/arch/x86/xen/smp_pv.c<br/>index 27d1a5b7f571..ac41d83b38d3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/smp_pv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/smp_pv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/smp_pv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/xen/smp_pv.c</a></div><div class='hunk'>@@ -154,9 +154,9 @@ static void __init xen_pv_smp_config(void)</div><div class='ctx'> 	u32 apicid = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	topology_register_boot_apic(apicid++);</div><div class='add'>+	topology_register_boot_apic(apicid);</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt; nr_cpu_ids; i++)</div><div class='add'>+	for (i = 0; i &lt; nr_cpu_ids; i++)</div><div class='ctx'> 		topology_register_apic(apicid++, CPU_ACPIID_INVALID, true);</div><div class='ctx'> </div><div class='ctx'> 	/* Pretend to be a proper enumerated system */</div><div class='head'>diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S<br/>index 04101b984f24..758bcd47b72d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/xen-head.S?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/x86/xen/xen-head.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/xen-head.S?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/x86/xen/xen-head.S</a></div><div class='hunk'>@@ -49,7 +49,7 @@ SYM_CODE_START(startup_xen)</div><div class='ctx'> 	ANNOTATE_NOENDBR</div><div class='ctx'> 	cld</div><div class='ctx'> </div><div class='del'>-	leaq	(__end_init_task - TOP_OF_KERNEL_STACK_PADDING - PTREGS_SIZE)(%rip), %rsp</div><div class='add'>+	leaq	__top_init_kernel_stack(%rip), %rsp</div><div class='ctx'> </div><div class='ctx'> 	/* Set up %gs.</div><div class='ctx'> 	 *</div><div class='head'>diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h<br/>index 38bcecb0e457..a2b6bb5429f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/include/asm/cacheflush.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/include/asm/cacheflush.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/xtensa/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -100,6 +100,10 @@ void flush_cache_range(struct vm_area_struct*, ulong, ulong);</div><div class='ctx'> void flush_icache_range(unsigned long start, unsigned long end);</div><div class='ctx'> void flush_cache_page(struct vm_area_struct*,</div><div class='ctx'> 			     unsigned long, unsigned long);</div><div class='add'>+#define flush_cache_all flush_cache_all</div><div class='add'>+#define flush_cache_range flush_cache_range</div><div class='add'>+#define flush_icache_range flush_icache_range</div><div class='add'>+#define flush_cache_page flush_cache_page</div><div class='ctx'> #else</div><div class='ctx'> #define flush_cache_all local_flush_cache_all</div><div class='ctx'> #define flush_cache_range local_flush_cache_range</div><div class='hunk'>@@ -136,20 +140,7 @@ void local_flush_cache_page(struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-#define flush_cache_all()				do { } while (0)</div><div class='del'>-#define flush_cache_mm(mm)				do { } while (0)</div><div class='del'>-#define flush_cache_dup_mm(mm)				do { } while (0)</div><div class='del'>-</div><div class='del'>-#define flush_cache_vmap(start,end)			do { } while (0)</div><div class='del'>-#define flush_cache_vmap_early(start,end)		do { } while (0)</div><div class='del'>-#define flush_cache_vunmap(start,end)			do { } while (0)</div><div class='del'>-</div><div class='del'>-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0</div><div class='del'>-#define flush_dcache_page(page)				do { } while (0)</div><div class='del'>-</div><div class='ctx'> #define flush_icache_range local_flush_icache_range</div><div class='del'>-#define flush_cache_page(vma, addr, pfn)		do { } while (0)</div><div class='del'>-#define flush_cache_range(vma, start, end)		do { } while (0)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -162,15 +153,14 @@ void local_flush_cache_page(struct vm_area_struct *vma,</div><div class='ctx'> 		__invalidate_icache_range(start,(end) - (start));	\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-#define flush_dcache_mmap_lock(mapping)			do { } while (0)</div><div class='del'>-#define flush_dcache_mmap_unlock(mapping)		do { } while (0)</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_MMU) &amp;&amp; (DCACHE_WAY_SIZE &gt; PAGE_SIZE)</div><div class='ctx'> </div><div class='ctx'> extern void copy_to_user_page(struct vm_area_struct*, struct page*,</div><div class='ctx'> 		unsigned long, void*, const void*, unsigned long);</div><div class='ctx'> extern void copy_from_user_page(struct vm_area_struct*, struct page*,</div><div class='ctx'> 		unsigned long, void*, const void*, unsigned long);</div><div class='add'>+#define copy_to_user_page copy_to_user_page</div><div class='add'>+#define copy_from_user_page copy_from_user_page</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='hunk'>@@ -186,4 +176,6 @@ extern void copy_from_user_page(struct vm_area_struct*, struct page*,</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#include &lt;asm-generic/cacheflush.h&gt;</div><div class='add'>+</div><div class='ctx'> #endif /* _XTENSA_CACHEFLUSH_H */</div><div class='head'>diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h<br/>index d008a153a2b9..7ed1a2085bd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/include/asm/processor.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/include/asm/processor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/xtensa/include/asm/processor.h</a></div><div class='hunk'>@@ -115,9 +115,9 @@</div><div class='ctx'> #define MAKE_RA_FOR_CALL(ra,ws)   (((ra) &amp; 0x3fffffff) | (ws) &lt;&lt; 30)</div><div class='ctx'> </div><div class='ctx'> /* Convert return address to a valid pc</div><div class='del'>- * Note: We assume that the stack pointer is in the same 1GB ranges as the ra</div><div class='add'>+ * Note: 'text' is the address within the same 1GB range as the ra</div><div class='ctx'>  */</div><div class='del'>-#define MAKE_PC_FROM_RA(ra,sp)    (((ra) &amp; 0x3fffffff) | ((sp) &amp; 0xc0000000))</div><div class='add'>+#define MAKE_PC_FROM_RA(ra, text) (((ra) &amp; 0x3fffffff) | ((unsigned long)(text) &amp; 0xc0000000))</div><div class='ctx'> </div><div class='ctx'> #elif defined(__XTENSA_CALL0_ABI__)</div><div class='ctx'> </div><div class='hunk'>@@ -127,9 +127,9 @@</div><div class='ctx'> #define MAKE_RA_FOR_CALL(ra, ws)   (ra)</div><div class='ctx'> </div><div class='ctx'> /* Convert return address to a valid pc</div><div class='del'>- * Note: We assume that the stack pointer is in the same 1GB ranges as the ra</div><div class='add'>+ * Note: 'text' is not used as 'ra' is always the full address</div><div class='ctx'>  */</div><div class='del'>-#define MAKE_PC_FROM_RA(ra, sp)    (ra)</div><div class='add'>+#define MAKE_PC_FROM_RA(ra, text)  (ra)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> #error Unsupported Xtensa ABI</div><div class='head'>diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h<br/>index a270467556dc..86c70117371b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/include/asm/ptrace.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/include/asm/ptrace.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/xtensa/include/asm/ptrace.h</a></div><div class='hunk'>@@ -87,7 +87,7 @@ struct pt_regs {</div><div class='ctx'> # define user_mode(regs) (((regs)-&gt;ps &amp; 0x00000020)!=0)</div><div class='ctx'> # define instruction_pointer(regs) ((regs)-&gt;pc)</div><div class='ctx'> # define return_pointer(regs) (MAKE_PC_FROM_RA((regs)-&gt;areg[0], \</div><div class='del'>-					       (regs)-&gt;areg[1]))</div><div class='add'>+					       (regs)-&gt;pc))</div><div class='ctx'> </div><div class='ctx'> # ifndef CONFIG_SMP</div><div class='ctx'> #  define profile_pc(regs) instruction_pointer(regs)</div><div class='head'>diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c<br/>index a815577d25fd..7bd66677f7b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/kernel/process.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/kernel/process.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/xtensa/kernel/process.c</a></div><div class='hunk'>@@ -47,6 +47,7 @@</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/regs.h&gt;</div><div class='ctx'> #include &lt;asm/hw_breakpoint.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void ret_from_fork(void);</div><div class='hunk'>@@ -380,7 +381,7 @@ unsigned long __get_wchan(struct task_struct *p)</div><div class='ctx'> 	int count = 0;</div><div class='ctx'> </div><div class='ctx'> 	sp = p-&gt;thread.sp;</div><div class='del'>-	pc = MAKE_PC_FROM_RA(p-&gt;thread.ra, p-&gt;thread.sp);</div><div class='add'>+	pc = MAKE_PC_FROM_RA(p-&gt;thread.ra, _text);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		if (sp &lt; stack_page + sizeof(struct task_struct) ||</div><div class='hunk'>@@ -392,7 +393,7 @@ unsigned long __get_wchan(struct task_struct *p)</div><div class='ctx'> </div><div class='ctx'> 		/* Stack layout: sp-4: ra, sp-3: sp' */</div><div class='ctx'> </div><div class='del'>-		pc = MAKE_PC_FROM_RA(SPILL_SLOT(sp, 0), sp);</div><div class='add'>+		pc = MAKE_PC_FROM_RA(SPILL_SLOT(sp, 0), _text);</div><div class='ctx'> 		sp = SPILL_SLOT(sp, 1);</div><div class='ctx'> 	} while (count++ &lt; 16);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/xtensa/kernel/stacktrace.c b/arch/xtensa/kernel/stacktrace.c<br/>index 831ffb648bda..ed324fdf2a2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/kernel/stacktrace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/kernel/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/kernel/stacktrace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/xtensa/kernel/stacktrace.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/stacktrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='hunk'>@@ -189,7 +190,7 @@ void walk_stackframe(unsigned long *sp,</div><div class='ctx'> 		if (a1 &lt;= (unsigned long)sp)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		frame.pc = MAKE_PC_FROM_RA(a0, a1);</div><div class='add'>+		frame.pc = MAKE_PC_FROM_RA(a0, _text);</div><div class='ctx'> 		frame.sp = a1;</div><div class='ctx'> </div><div class='ctx'> 		if (fn(&amp;frame, data))</div><div class='head'>diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c<br/>index 8896e691c051..abec44b687df 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/platforms/iss/console.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>arch/xtensa/platforms/iss/console.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/platforms/iss/console.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>arch/xtensa/platforms/iss/console.c</a></div><div class='hunk'>@@ -166,10 +166,8 @@ late_initcall(rs_init);</div><div class='ctx'> </div><div class='ctx'> static void iss_console_write(struct console *co, const char *s, unsigned count)</div><div class='ctx'> {</div><div class='del'>-	if (s &amp;&amp; *s != 0) {</div><div class='del'>-		int len = strlen(s);</div><div class='del'>-		simc_write(1, s, count &lt; len ? count : len);</div><div class='del'>-	}</div><div class='add'>+	if (s &amp;&amp; *s != 0)</div><div class='add'>+		simc_write(1, s, min(count, strlen(s)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct tty_driver* iss_console_device(struct console *c, int *index)</div><div class='head'>diff --git a/block/Kconfig b/block/Kconfig<br/>index 1de4682d48cc..dc12af58dbae 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/Kconfig</a></div><div class='hunk'>@@ -100,7 +100,6 @@ config BLK_DEV_WRITE_MOUNTED</div><div class='ctx'> </div><div class='ctx'> config BLK_DEV_ZONED</div><div class='ctx'> 	bool "Zoned block device support"</div><div class='del'>-	select MQ_IOSCHED_DEADLINE</div><div class='ctx'> 	help</div><div class='ctx'> 	Block layer zoned block device support. This option enables</div><div class='ctx'> 	support for ZAC/ZBC/ZNS host-managed and host-aware zoned block</div><div class='hunk'>@@ -120,17 +119,6 @@ config BLK_DEV_THROTTLING</div><div class='ctx'> </div><div class='ctx'> 	See Documentation/admin-guide/cgroup-v1/blkio-controller.rst for more information.</div><div class='ctx'> </div><div class='del'>-config BLK_DEV_THROTTLING_LOW</div><div class='del'>-	bool "Block throttling .low limit interface support (EXPERIMENTAL)"</div><div class='del'>-	depends on BLK_DEV_THROTTLING</div><div class='del'>-	help</div><div class='del'>-	Add .low limit interface for block throttling. The low limit is a best</div><div class='del'>-	effort limit to prioritize cgroups. Depending on the setting, the limit</div><div class='del'>-	can be used to protect cgroups in terms of bandwidth/iops and better</div><div class='del'>-	utilize disk resource.</div><div class='del'>-</div><div class='del'>-	Note, this is an experimental interface and could be changed someday.</div><div class='del'>-</div><div class='ctx'> config BLK_WBT</div><div class='ctx'> 	bool "Enable support for block device writeback throttling"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -198,10 +186,6 @@ config BLK_DEBUG_FS</div><div class='ctx'> 	Unless you are building a kernel for a tiny system, you should</div><div class='ctx'> 	say Y here.</div><div class='ctx'> </div><div class='del'>-config BLK_DEBUG_FS_ZONED</div><div class='del'>-       bool</div><div class='del'>-       default BLK_DEBUG_FS &amp;&amp; BLK_DEV_ZONED</div><div class='del'>-</div><div class='ctx'> config BLK_SED_OPAL</div><div class='ctx'> 	bool "Logic for interfacing with Opal enabled SEDs"</div><div class='ctx'> 	depends on KEYS</div><div class='head'>diff --git a/block/Makefile b/block/Makefile<br/>index 46ada9dc8bbf..168150b9c510 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/Makefile</a></div><div class='hunk'>@@ -33,7 +33,6 @@ obj-$(CONFIG_BLK_MQ_VIRTIO)	+= blk-mq-virtio.o</div><div class='ctx'> obj-$(CONFIG_BLK_DEV_ZONED)	+= blk-zoned.o</div><div class='ctx'> obj-$(CONFIG_BLK_WBT)		+= blk-wbt.o</div><div class='ctx'> obj-$(CONFIG_BLK_DEBUG_FS)	+= blk-mq-debugfs.o</div><div class='del'>-obj-$(CONFIG_BLK_DEBUG_FS_ZONED)+= blk-mq-debugfs-zoned.o</div><div class='ctx'> obj-$(CONFIG_BLK_SED_OPAL)	+= sed-opal.o</div><div class='ctx'> obj-$(CONFIG_BLK_PM)		+= blk-pm.o</div><div class='ctx'> obj-$(CONFIG_BLK_INLINE_ENCRYPTION)	+= blk-crypto.o blk-crypto-profile.o \</div><div class='head'>diff --git a/block/bdev.c b/block/bdev.c<br/>index 4dc94145eb53..2af3dca56f3d 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/bdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/bdev.c</a></div><div class='hunk'>@@ -882,7 +882,7 @@ int bdev_open(struct block_device *bdev, blk_mode_t mode, void *holder,</div><div class='ctx'> 		goto abort_claiming;</div><div class='ctx'> 	ret = -EBUSY;</div><div class='ctx'> 	if (!bdev_may_open(bdev, mode))</div><div class='del'>-		goto abort_claiming;</div><div class='add'>+		goto put_module;</div><div class='ctx'> 	if (bdev_is_partition(bdev))</div><div class='ctx'> 		ret = blkdev_get_part(bdev, mode);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -912,7 +912,7 @@ int bdev_open(struct block_device *bdev, blk_mode_t mode, void *holder,</div><div class='ctx'> 		disk_unblock_events(disk);</div><div class='ctx'> </div><div class='ctx'> 	bdev_file-&gt;f_flags |= O_LARGEFILE;</div><div class='del'>-	bdev_file-&gt;f_mode |= FMODE_BUF_RASYNC | FMODE_CAN_ODIRECT;</div><div class='add'>+	bdev_file-&gt;f_mode |= FMODE_CAN_ODIRECT;</div><div class='ctx'> 	if (bdev_nowait(bdev))</div><div class='ctx'> 		bdev_file-&gt;f_mode |= FMODE_NOWAIT;</div><div class='ctx'> 	if (mode &amp; BLK_OPEN_RESTRICT_WRITES)</div><div class='head'>diff --git a/block/bio.c b/block/bio.c<br/>index d24420ed1c4c..e9e809a63c59 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/bio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/bio.c</a></div><div class='hunk'>@@ -345,18 +345,29 @@ void bio_chain(struct bio *bio, struct bio *parent)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_chain);</div><div class='ctx'> </div><div class='del'>-struct bio *blk_next_bio(struct bio *bio, struct block_device *bdev,</div><div class='del'>-		unsigned int nr_pages, blk_opf_t opf, gfp_t gfp)</div><div class='add'>+/**</div><div class='add'>+ * bio_chain_and_submit - submit a bio after chaining it to another one</div><div class='add'>+ * @prev: bio to chain and submit</div><div class='add'>+ * @new: bio to chain to</div><div class='add'>+ *</div><div class='add'>+ * If @prev is non-NULL, chain it to @new and submit it.</div><div class='add'>+ *</div><div class='add'>+ * Return: @new.</div><div class='add'>+ */</div><div class='add'>+struct bio *bio_chain_and_submit(struct bio *prev, struct bio *new)</div><div class='ctx'> {</div><div class='del'>-	struct bio *new = bio_alloc(bdev, nr_pages, opf, gfp);</div><div class='del'>-</div><div class='del'>-	if (bio) {</div><div class='del'>-		bio_chain(bio, new);</div><div class='del'>-		submit_bio(bio);</div><div class='add'>+	if (prev) {</div><div class='add'>+		bio_chain(prev, new);</div><div class='add'>+		submit_bio(prev);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return new;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+struct bio *blk_next_bio(struct bio *bio, struct block_device *bdev,</div><div class='add'>+		unsigned int nr_pages, blk_opf_t opf, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	return bio_chain_and_submit(bio, bio_alloc(bdev, nr_pages, opf, gfp));</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_next_bio);</div><div class='ctx'> </div><div class='ctx'> static void bio_alloc_rescue(struct work_struct *work)</div><div class='hunk'>@@ -1125,6 +1136,7 @@ void bio_add_folio_nofail(struct bio *bio, struct folio *folio, size_t len,</div><div class='ctx'> 	WARN_ON_ONCE(off &gt; UINT_MAX);</div><div class='ctx'> 	__bio_add_page(bio, &amp;folio-&gt;page, len, off);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(bio_add_folio_nofail);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bio_add_folio - Attempt to add part of a folio to a bio.</div><div class='hunk'>@@ -1384,6 +1396,26 @@ int submit_bio_wait(struct bio *bio)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(submit_bio_wait);</div><div class='ctx'> </div><div class='add'>+static void bio_wait_end_io(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	complete(bio-&gt;bi_private);</div><div class='add'>+	bio_put(bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * bio_await_chain - ends @bio and waits for every chained bio to complete</div><div class='add'>+ */</div><div class='add'>+void bio_await_chain(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	DECLARE_COMPLETION_ONSTACK_MAP(done,</div><div class='add'>+			bio-&gt;bi_bdev-&gt;bd_disk-&gt;lockdep_map);</div><div class='add'>+</div><div class='add'>+	bio-&gt;bi_private = &amp;done;</div><div class='add'>+	bio-&gt;bi_end_io = bio_wait_end_io;</div><div class='add'>+	bio_endio(bio);</div><div class='add'>+	blk_wait_io(&amp;done);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __bio_advance(struct bio *bio, unsigned bytes)</div><div class='ctx'> {</div><div class='ctx'> 	if (bio_integrity(bio))</div><div class='hunk'>@@ -1576,6 +1608,8 @@ again:</div><div class='ctx'> 	if (!bio_integrity_endio(bio))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	blk_zone_bio_endio(bio);</div><div class='add'>+</div><div class='ctx'> 	rq_qos_done_bio(bio);</div><div class='ctx'> </div><div class='ctx'> 	if (bio-&gt;bi_bdev &amp;&amp; bio_flagged(bio, BIO_TRACE_COMPLETION)) {</div><div class='hunk'>@@ -1596,7 +1630,6 @@ again:</div><div class='ctx'> 		goto again;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	blk_throtl_bio_endio(bio);</div><div class='ctx'> 	/* release cgroup info */</div><div class='ctx'> 	bio_uninit(bio);</div><div class='ctx'> 	if (bio-&gt;bi_end_io)</div><div class='head'>diff --git a/block/blk-cgroup-rwstat.c b/block/blk-cgroup-rwstat.c<br/>index 3304e841df7c..a55fb0c53558 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-cgroup-rwstat.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-cgroup-rwstat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-cgroup-rwstat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-cgroup-rwstat.c</a></div><div class='hunk'>@@ -9,25 +9,19 @@ int blkg_rwstat_init(struct blkg_rwstat *rwstat, gfp_t gfp)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; BLKG_RWSTAT_NR; i++) {</div><div class='del'>-		ret = percpu_counter_init(&amp;rwstat-&gt;cpu_cnt[i], 0, gfp);</div><div class='del'>-		if (ret) {</div><div class='del'>-			while (--i &gt;= 0)</div><div class='del'>-				percpu_counter_destroy(&amp;rwstat-&gt;cpu_cnt[i]);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='add'>+	ret = percpu_counter_init_many(rwstat-&gt;cpu_cnt, 0, gfp, BLKG_RWSTAT_NR);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BLKG_RWSTAT_NR; i++)</div><div class='ctx'> 		atomic64_set(&amp;rwstat-&gt;aux_cnt[i], 0);</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blkg_rwstat_init);</div><div class='ctx'> </div><div class='ctx'> void blkg_rwstat_exit(struct blkg_rwstat *rwstat)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; BLKG_RWSTAT_NR; i++)</div><div class='del'>-		percpu_counter_destroy(&amp;rwstat-&gt;cpu_cnt[i]);</div><div class='add'>+	percpu_counter_destroy_many(rwstat-&gt;cpu_cnt, BLKG_RWSTAT_NR);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blkg_rwstat_exit);</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c<br/>index 059467086b13..4b1a35ab0ea4 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-cgroup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-cgroup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-cgroup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-cgroup.c</a></div><div class='hunk'>@@ -218,8 +218,7 @@ static void blkg_async_bio_workfn(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* as long as there are pending bios, @blkg can't go away */</div><div class='ctx'> 	spin_lock(&amp;blkg-&gt;async_bio_lock);</div><div class='del'>-	bio_list_merge(&amp;bios, &amp;blkg-&gt;async_bios);</div><div class='del'>-	bio_list_init(&amp;blkg-&gt;async_bios);</div><div class='add'>+	bio_list_merge_init(&amp;bios, &amp;blkg-&gt;async_bios);</div><div class='ctx'> 	spin_unlock(&amp;blkg-&gt;async_bio_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* start plug only when bio_list contains at least 2 bios */</div><div class='hunk'>@@ -1444,14 +1443,8 @@ int blkcg_init_disk(struct gendisk *disk)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_destroy_all;</div><div class='ctx'> </div><div class='del'>-	ret = blk_throtl_init(disk);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_ioprio_exit;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_ioprio_exit:</div><div class='del'>-	blk_ioprio_exit(disk);</div><div class='ctx'> err_destroy_all:</div><div class='ctx'> 	blkg_destroy_all(disk);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/block/blk-core.c b/block/blk-core.c<br/>index b795ac177281..01186333c88e 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-core.c</a></div><div class='hunk'>@@ -591,8 +591,7 @@ static inline blk_status_t blk_check_zone_append(struct request_queue *q,</div><div class='ctx'> 		return BLK_STS_NOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	/* The bio sector must point to the start of a sequential zone */</div><div class='del'>-	if (!bdev_is_zone_start(bio-&gt;bi_bdev, bio-&gt;bi_iter.bi_sector) ||</div><div class='del'>-	    !bio_zone_is_seq(bio))</div><div class='add'>+	if (!bdev_is_zone_start(bio-&gt;bi_bdev, bio-&gt;bi_iter.bi_sector))</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -604,7 +603,7 @@ static inline blk_status_t blk_check_zone_append(struct request_queue *q,</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure the BIO is small enough and will not get split */</div><div class='del'>-	if (nr_sectors &gt; q-&gt;limits.max_zone_append_sectors)</div><div class='add'>+	if (nr_sectors &gt; queue_max_zone_append_sectors(q))</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='ctx'> 	bio-&gt;bi_opf |= REQ_NOMERGE;</div><div class='hunk'>@@ -649,11 +648,13 @@ static void __submit_bio(struct bio *bio)</div><div class='ctx'> static void __submit_bio_noacct(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio_list bio_list_on_stack[2];</div><div class='add'>+	struct blk_plug plug;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(bio-&gt;bi_next);</div><div class='ctx'> </div><div class='ctx'> 	bio_list_init(&amp;bio_list_on_stack[0]);</div><div class='ctx'> 	current-&gt;bio_list = bio_list_on_stack;</div><div class='add'>+	blk_start_plug(&amp;plug);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		struct request_queue *q = bdev_get_queue(bio-&gt;bi_bdev);</div><div class='hunk'>@@ -687,19 +688,23 @@ static void __submit_bio_noacct(struct bio *bio)</div><div class='ctx'> 		bio_list_merge(&amp;bio_list_on_stack[0], &amp;bio_list_on_stack[1]);</div><div class='ctx'> 	} while ((bio = bio_list_pop(&amp;bio_list_on_stack[0])));</div><div class='ctx'> </div><div class='add'>+	blk_finish_plug(&amp;plug);</div><div class='ctx'> 	current-&gt;bio_list = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __submit_bio_noacct_mq(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio_list bio_list[2] = { };</div><div class='add'>+	struct blk_plug plug;</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;bio_list = bio_list;</div><div class='add'>+	blk_start_plug(&amp;plug);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		__submit_bio(bio);</div><div class='ctx'> 	} while ((bio = bio_list_pop(&amp;bio_list[0])));</div><div class='ctx'> </div><div class='add'>+	blk_finish_plug(&amp;plug);</div><div class='ctx'> 	current-&gt;bio_list = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -910,12 +915,6 @@ int bio_poll(struct bio *bio, struct io_comp_batch *iob, unsigned int flags)</div><div class='ctx'> 	    !test_bit(QUEUE_FLAG_POLL, &amp;q-&gt;queue_flags))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * As the requests that require a zone lock are not plugged in the</div><div class='del'>-	 * first place, directly accessing the plug instead of using</div><div class='del'>-	 * blk_mq_plug() should not have any consequences during flushing for</div><div class='del'>-	 * zoned devices.</div><div class='del'>-	 */</div><div class='ctx'> 	blk_flush_plug(current-&gt;plug, false);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -987,10 +986,11 @@ void update_io_ticks(struct block_device *part, unsigned long now, bool end)</div><div class='ctx'> 	unsigned long stamp;</div><div class='ctx'> again:</div><div class='ctx'> 	stamp = READ_ONCE(part-&gt;bd_stamp);</div><div class='del'>-	if (unlikely(time_after(now, stamp))) {</div><div class='del'>-		if (likely(try_cmpxchg(&amp;part-&gt;bd_stamp, &amp;stamp, now)))</div><div class='del'>-			__part_stat_add(part, io_ticks, end ? now - stamp : 1);</div><div class='del'>-	}</div><div class='add'>+	if (unlikely(time_after(now, stamp)) &amp;&amp;</div><div class='add'>+	    likely(try_cmpxchg(&amp;part-&gt;bd_stamp, &amp;stamp, now)) &amp;&amp;</div><div class='add'>+	    (end || part_in_flight(part)))</div><div class='add'>+		__part_stat_add(part, io_ticks, now - stamp);</div><div class='add'>+</div><div class='ctx'> 	if (part-&gt;bd_partno) {</div><div class='ctx'> 		part = bdev_whole(part);</div><div class='ctx'> 		goto again;</div><div class='head'>diff --git a/block/blk-flush.c b/block/blk-flush.c<br/>index b0f314f4bc14..c17cf8ed8113 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-flush.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-flush.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-flush.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-flush.c</a></div><div class='hunk'>@@ -130,6 +130,8 @@ static void blk_flush_restore_request(struct request *rq)</div><div class='ctx'> 	 * original @rq-&gt;bio.  Restore it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rq-&gt;bio = rq-&gt;biotail;</div><div class='add'>+	if (rq-&gt;bio)</div><div class='add'>+		rq-&gt;__sector = rq-&gt;bio-&gt;bi_iter.bi_sector;</div><div class='ctx'> </div><div class='ctx'> 	/* make @rq a normal request */</div><div class='ctx'> 	rq-&gt;rq_flags &amp;= ~RQF_FLUSH_SEQ;</div><div class='head'>diff --git a/block/blk-lib.c b/block/blk-lib.c<br/>index a6954eafb8c8..442da9dad042 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-lib.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-lib.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-lib.c</a></div><div class='hunk'>@@ -35,51 +35,39 @@ static sector_t bio_discard_limit(struct block_device *bdev, sector_t sector)</div><div class='ctx'> 	return round_down(UINT_MAX, discard_granularity) &gt;&gt; SECTOR_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __blkdev_issue_discard(struct block_device *bdev, sector_t sector,</div><div class='del'>-		sector_t nr_sects, gfp_t gfp_mask, struct bio **biop)</div><div class='add'>+struct bio *blk_alloc_discard_bio(struct block_device *bdev,</div><div class='add'>+		sector_t *sector, sector_t *nr_sects, gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='del'>-	struct bio *bio = *biop;</div><div class='del'>-	sector_t bs_mask;</div><div class='del'>-</div><div class='del'>-	if (bdev_read_only(bdev))</div><div class='del'>-		return -EPERM;</div><div class='del'>-	if (!bdev_max_discard_sectors(bdev))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* In case the discard granularity isn't set by buggy device driver */</div><div class='del'>-	if (WARN_ON_ONCE(!bdev_discard_granularity(bdev))) {</div><div class='del'>-		pr_err_ratelimited("%pg: Error: discard_granularity is 0.\n",</div><div class='del'>-				   bdev);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bs_mask = (bdev_logical_block_size(bdev) &gt;&gt; 9) - 1;</div><div class='del'>-	if ((sector | nr_sects) &amp; bs_mask)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	sector_t bio_sects = min(*nr_sects, bio_discard_limit(bdev, *sector));</div><div class='add'>+	struct bio *bio;</div><div class='ctx'> </div><div class='del'>-	if (!nr_sects)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!bio_sects)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	while (nr_sects) {</div><div class='del'>-		sector_t req_sects =</div><div class='del'>-			min(nr_sects, bio_discard_limit(bdev, sector));</div><div class='add'>+	bio = bio_alloc(bdev, 0, REQ_OP_DISCARD, gfp_mask);</div><div class='add'>+	if (!bio)</div><div class='add'>+		return NULL;</div><div class='add'>+	bio-&gt;bi_iter.bi_sector = *sector;</div><div class='add'>+	bio-&gt;bi_iter.bi_size = bio_sects &lt;&lt; SECTOR_SHIFT;</div><div class='add'>+	*sector += bio_sects;</div><div class='add'>+	*nr_sects -= bio_sects;</div><div class='add'>+	/*</div><div class='add'>+	 * We can loop for a long time in here if someone does full device</div><div class='add'>+	 * discards (like mkfs).  Be nice and allow us to schedule out to avoid</div><div class='add'>+	 * softlocking if preempt is disabled.</div><div class='add'>+	 */</div><div class='add'>+	cond_resched();</div><div class='add'>+	return bio;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		bio = blk_next_bio(bio, bdev, 0, REQ_OP_DISCARD, gfp_mask);</div><div class='del'>-		bio-&gt;bi_iter.bi_sector = sector;</div><div class='del'>-		bio-&gt;bi_iter.bi_size = req_sects &lt;&lt; 9;</div><div class='del'>-		sector += req_sects;</div><div class='del'>-		nr_sects -= req_sects;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We can loop for a long time in here, if someone does</div><div class='del'>-		 * full device discards (like mkfs). Be nice and allow</div><div class='del'>-		 * us to schedule out to avoid softlocking if preempt</div><div class='del'>-		 * is disabled.</div><div class='del'>-		 */</div><div class='del'>-		cond_resched();</div><div class='del'>-	}</div><div class='add'>+int __blkdev_issue_discard(struct block_device *bdev, sector_t sector,</div><div class='add'>+		sector_t nr_sects, gfp_t gfp_mask, struct bio **biop)</div><div class='add'>+{</div><div class='add'>+	struct bio *bio;</div><div class='ctx'> </div><div class='del'>-	*biop = bio;</div><div class='add'>+	while ((bio = blk_alloc_discard_bio(bdev, &amp;sector, &amp;nr_sects,</div><div class='add'>+			gfp_mask)))</div><div class='add'>+		*biop = bio_chain_and_submit(*biop, bio);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__blkdev_issue_discard);</div><div class='head'>diff --git a/block/blk-merge.c b/block/blk-merge.c<br/>index 4e3483a16b75..8534c35e0497 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-merge.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-merge.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-merge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-merge.c</a></div><div class='hunk'>@@ -377,6 +377,7 @@ struct bio *__bio_split_to_limits(struct bio *bio,</div><div class='ctx'> 		blkcg_bio_issue_init(split);</div><div class='ctx'> 		bio_chain(split, bio);</div><div class='ctx'> 		trace_block_split(split, bio-&gt;bi_iter.bi_sector);</div><div class='add'>+		WARN_ON_ONCE(bio_zone_write_plugging(bio));</div><div class='ctx'> 		submit_bio_noacct(bio);</div><div class='ctx'> 		return split;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -779,6 +780,8 @@ static void blk_account_io_merge_request(struct request *req)</div><div class='ctx'> 	if (blk_do_io_stat(req)) {</div><div class='ctx'> 		part_stat_lock();</div><div class='ctx'> 		part_stat_inc(req-&gt;part, merges[op_stat_group(req_op(req))]);</div><div class='add'>+		part_stat_local_dec(req-&gt;part,</div><div class='add'>+				    in_flight[op_is_write(req_op(req))]);</div><div class='ctx'> 		part_stat_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -972,13 +975,7 @@ static void blk_account_io_merge_bio(struct request *req)</div><div class='ctx'> 	part_stat_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum bio_merge_status {</div><div class='del'>-	BIO_MERGE_OK,</div><div class='del'>-	BIO_MERGE_NONE,</div><div class='del'>-	BIO_MERGE_FAILED,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static enum bio_merge_status bio_attempt_back_merge(struct request *req,</div><div class='add'>+enum bio_merge_status bio_attempt_back_merge(struct request *req,</div><div class='ctx'> 		struct bio *bio, unsigned int nr_segs)</div><div class='ctx'> {</div><div class='ctx'> 	const blk_opf_t ff = bio_failfast(bio);</div><div class='hunk'>@@ -994,6 +991,9 @@ static enum bio_merge_status bio_attempt_back_merge(struct request *req,</div><div class='ctx'> </div><div class='ctx'> 	blk_update_mixed_merge(req, bio, false);</div><div class='ctx'> </div><div class='add'>+	if (req-&gt;rq_flags &amp; RQF_ZONE_WRITE_PLUGGING)</div><div class='add'>+		blk_zone_write_plug_bio_merged(bio);</div><div class='add'>+</div><div class='ctx'> 	req-&gt;biotail-&gt;bi_next = bio;</div><div class='ctx'> 	req-&gt;biotail = bio;</div><div class='ctx'> 	req-&gt;__data_len += bio-&gt;bi_iter.bi_size;</div><div class='hunk'>@@ -1009,6 +1009,14 @@ static enum bio_merge_status bio_attempt_front_merge(struct request *req,</div><div class='ctx'> {</div><div class='ctx'> 	const blk_opf_t ff = bio_failfast(bio);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * A front merge for writes to sequential zones of a zoned block device</div><div class='add'>+	 * can happen only if the user submitted writes out of order. Do not</div><div class='add'>+	 * merge such write to let it fail.</div><div class='add'>+	 */</div><div class='add'>+	if (req-&gt;rq_flags &amp; RQF_ZONE_WRITE_PLUGGING)</div><div class='add'>+		return BIO_MERGE_FAILED;</div><div class='add'>+</div><div class='ctx'> 	if (!ll_front_merge_fn(req, bio, nr_segs))</div><div class='ctx'> 		return BIO_MERGE_FAILED;</div><div class='ctx'> </div><div class='hunk'>@@ -1107,10 +1115,9 @@ static enum bio_merge_status blk_attempt_bio_merge(struct request_queue *q,</div><div class='ctx'> bool blk_attempt_plug_merge(struct request_queue *q, struct bio *bio,</div><div class='ctx'> 		unsigned int nr_segs)</div><div class='ctx'> {</div><div class='del'>-	struct blk_plug *plug;</div><div class='add'>+	struct blk_plug *plug = current-&gt;plug;</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> </div><div class='del'>-	plug = blk_mq_plug(bio);</div><div class='ctx'> 	if (!plug || rq_list_empty(plug-&gt;mq_list))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-mq-debugfs-zoned.c b/block/blk-mq-debugfs-zoned.c<br/>deleted file mode 100644<br/>index a77b099c34b7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs-zoned.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq-debugfs-zoned.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2017 Western Digital Corporation or its affiliates.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/blkdev.h&gt;</div><div class='del'>-#include "blk-mq-debugfs.h"</div><div class='del'>-</div><div class='del'>-int queue_zone_wlock_show(void *data, struct seq_file *m)</div><div class='del'>-{</div><div class='del'>-	struct request_queue *q = data;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	if (!q-&gt;disk-&gt;seq_zones_wlock)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; q-&gt;disk-&gt;nr_zones; i++)</div><div class='del'>-		if (test_bit(i, q-&gt;disk-&gt;seq_zones_wlock))</div><div class='del'>-			seq_printf(m, "%u\n", i);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/block/blk-mq-debugfs.c b/block/blk-mq-debugfs.c<br/>index 94668e72ab09..770c0c2b72fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq-debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-mq-debugfs.c</a></div><div class='hunk'>@@ -160,7 +160,7 @@ static const struct blk_mq_debugfs_attr blk_mq_debugfs_queue_attrs[] = {</div><div class='ctx'> 	{ "requeue_list", 0400, .seq_ops = &amp;queue_requeue_list_seq_ops },</div><div class='ctx'> 	{ "pm_only", 0600, queue_pm_only_show, NULL },</div><div class='ctx'> 	{ "state", 0600, queue_state_show, queue_state_write },</div><div class='del'>-	{ "zone_wlock", 0400, queue_zone_wlock_show, NULL },</div><div class='add'>+	{ "zone_wplugs", 0400, queue_zone_wplugs_show, NULL },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -256,7 +256,6 @@ static const char *const rqf_name[] = {</div><div class='ctx'> 	RQF_NAME(HASHED),</div><div class='ctx'> 	RQF_NAME(STATS),</div><div class='ctx'> 	RQF_NAME(SPECIAL_PAYLOAD),</div><div class='del'>-	RQF_NAME(ZONE_WRITE_LOCKED),</div><div class='ctx'> 	RQF_NAME(TIMED_OUT),</div><div class='ctx'> 	RQF_NAME(RESV),</div><div class='ctx'> };</div><div class='head'>diff --git a/block/blk-mq-debugfs.h b/block/blk-mq-debugfs.h<br/>index 9c7d4b6117d4..c80e453e3014 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq-debugfs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-mq-debugfs.h</a></div><div class='hunk'>@@ -83,10 +83,10 @@ static inline void blk_mq_debugfs_unregister_rqos(struct rq_qos *rqos)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEBUG_FS_ZONED</div><div class='del'>-int queue_zone_wlock_show(void *data, struct seq_file *m);</div><div class='add'>+#if defined(CONFIG_BLK_DEV_ZONED) &amp;&amp; defined(CONFIG_BLK_DEBUG_FS)</div><div class='add'>+int queue_zone_wplugs_show(void *data, struct seq_file *m);</div><div class='ctx'> #else</div><div class='del'>-static inline int queue_zone_wlock_show(void *data, struct seq_file *m)</div><div class='add'>+static inline int queue_zone_wplugs_show(void *data, struct seq_file *m)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/block/blk-mq.c b/block/blk-mq.c<br/>index 32afb87efbd0..8e01e4b32e10 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-mq.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include &lt;linux/blk-crypto.h&gt;</div><div class='ctx'> #include &lt;linux/part_stat.h&gt;</div><div class='add'>+#include &lt;linux/sched/isolation.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;trace/events/block.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -690,6 +691,8 @@ static void blk_mq_finish_request(struct request *rq)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = rq-&gt;q;</div><div class='ctx'> </div><div class='add'>+	blk_zone_finish_request(rq);</div><div class='add'>+</div><div class='ctx'> 	if (rq-&gt;rq_flags &amp; RQF_USE_SCHED) {</div><div class='ctx'> 		q-&gt;elevator-&gt;type-&gt;ops.finish_request(rq);</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -761,31 +764,6 @@ void blk_dump_rq_flags(struct request *rq, char *msg)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(blk_dump_rq_flags);</div><div class='ctx'> </div><div class='del'>-static void req_bio_endio(struct request *rq, struct bio *bio,</div><div class='del'>-			  unsigned int nbytes, blk_status_t error)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(error)) {</div><div class='del'>-		bio-&gt;bi_status = error;</div><div class='del'>-	} else if (req_op(rq) == REQ_OP_ZONE_APPEND) {</div><div class='del'>-		/*</div><div class='del'>-		 * Partial zone append completions cannot be supported as the</div><div class='del'>-		 * BIO fragments may end up not being written sequentially.</div><div class='del'>-		 */</div><div class='del'>-		if (bio-&gt;bi_iter.bi_size != nbytes)</div><div class='del'>-			bio-&gt;bi_status = BLK_STS_IOERR;</div><div class='del'>-		else</div><div class='del'>-			bio-&gt;bi_iter.bi_sector = rq-&gt;__sector;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bio_advance(bio, nbytes);</div><div class='del'>-</div><div class='del'>-	if (unlikely(rq-&gt;rq_flags &amp; RQF_QUIET))</div><div class='del'>-		bio_set_flag(bio, BIO_QUIET);</div><div class='del'>-	/* don't actually finish bio if it's part of flush sequence */</div><div class='del'>-	if (bio-&gt;bi_iter.bi_size == 0 &amp;&amp; !(rq-&gt;rq_flags &amp; RQF_FLUSH_SEQ))</div><div class='del'>-		bio_endio(bio);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void blk_account_io_completion(struct request *req, unsigned int bytes)</div><div class='ctx'> {</div><div class='ctx'> 	if (req-&gt;part &amp;&amp; blk_do_io_stat(req)) {</div><div class='hunk'>@@ -845,8 +823,7 @@ static void blk_complete_request(struct request *req)</div><div class='ctx'> 		/* Completion has already been traced */</div><div class='ctx'> 		bio_clear_flag(bio, BIO_TRACE_COMPLETION);</div><div class='ctx'> </div><div class='del'>-		if (req_op(req) == REQ_OP_ZONE_APPEND)</div><div class='del'>-			bio-&gt;bi_iter.bi_sector = req-&gt;__sector;</div><div class='add'>+		blk_zone_update_request_bio(req, bio);</div><div class='ctx'> </div><div class='ctx'> 		if (!is_flush)</div><div class='ctx'> 			bio_endio(bio);</div><div class='hunk'>@@ -889,6 +866,8 @@ static void blk_complete_request(struct request *req)</div><div class='ctx'> bool blk_update_request(struct request *req, blk_status_t error,</div><div class='ctx'> 		unsigned int nr_bytes)</div><div class='ctx'> {</div><div class='add'>+	bool is_flush = req-&gt;rq_flags &amp; RQF_FLUSH_SEQ;</div><div class='add'>+	bool quiet = req-&gt;rq_flags &amp; RQF_QUIET;</div><div class='ctx'> 	int total_bytes;</div><div class='ctx'> </div><div class='ctx'> 	trace_block_rq_complete(req, error, nr_bytes);</div><div class='hunk'>@@ -909,9 +888,8 @@ bool blk_update_request(struct request *req, blk_status_t error,</div><div class='ctx'> 	if (blk_crypto_rq_has_keyslot(req) &amp;&amp; nr_bytes &gt;= blk_rq_bytes(req))</div><div class='ctx'> 		__blk_crypto_rq_put_keyslot(req);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(error &amp;&amp; !blk_rq_is_passthrough(req) &amp;&amp;</div><div class='del'>-		     !(req-&gt;rq_flags &amp; RQF_QUIET)) &amp;&amp;</div><div class='del'>-		     !test_bit(GD_DEAD, &amp;req-&gt;q-&gt;disk-&gt;state)) {</div><div class='add'>+	if (unlikely(error &amp;&amp; !blk_rq_is_passthrough(req) &amp;&amp; !quiet) &amp;&amp;</div><div class='add'>+	    !test_bit(GD_DEAD, &amp;req-&gt;q-&gt;disk-&gt;state)) {</div><div class='ctx'> 		blk_print_req_error(req, error);</div><div class='ctx'> 		trace_block_rq_error(req, error, nr_bytes);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -923,12 +901,33 @@ bool blk_update_request(struct request *req, blk_status_t error,</div><div class='ctx'> 		struct bio *bio = req-&gt;bio;</div><div class='ctx'> 		unsigned bio_bytes = min(bio-&gt;bi_iter.bi_size, nr_bytes);</div><div class='ctx'> </div><div class='del'>-		if (bio_bytes == bio-&gt;bi_iter.bi_size)</div><div class='add'>+		if (unlikely(error))</div><div class='add'>+			bio-&gt;bi_status = error;</div><div class='add'>+</div><div class='add'>+		if (bio_bytes == bio-&gt;bi_iter.bi_size) {</div><div class='ctx'> 			req-&gt;bio = bio-&gt;bi_next;</div><div class='add'>+		} else if (bio_is_zone_append(bio) &amp;&amp; error == BLK_STS_OK) {</div><div class='add'>+			/*</div><div class='add'>+			 * Partial zone append completions cannot be supported</div><div class='add'>+			 * as the BIO fragments may end up not being written</div><div class='add'>+			 * sequentially.</div><div class='add'>+			 */</div><div class='add'>+			bio-&gt;bi_status = BLK_STS_IOERR;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Completion has already been traced */</div><div class='ctx'> 		bio_clear_flag(bio, BIO_TRACE_COMPLETION);</div><div class='del'>-		req_bio_endio(req, bio, bio_bytes, error);</div><div class='add'>+		if (unlikely(quiet))</div><div class='add'>+			bio_set_flag(bio, BIO_QUIET);</div><div class='add'>+</div><div class='add'>+		bio_advance(bio, bio_bytes);</div><div class='add'>+</div><div class='add'>+		/* Don't actually finish bio if it's part of flush sequence */</div><div class='add'>+		if (!bio-&gt;bi_iter.bi_size) {</div><div class='add'>+			blk_zone_update_request_bio(req, bio);</div><div class='add'>+			if (!is_flush)</div><div class='add'>+				bio_endio(bio);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		total_bytes += bio_bytes;</div><div class='ctx'> 		nr_bytes -= bio_bytes;</div><div class='hunk'>@@ -997,6 +996,8 @@ static inline void blk_account_io_done(struct request *req, u64 now)</div><div class='ctx'> 		update_io_ticks(req-&gt;part, jiffies, true);</div><div class='ctx'> 		part_stat_inc(req-&gt;part, ios[sgrp]);</div><div class='ctx'> 		part_stat_add(req-&gt;part, nsecs[sgrp], now - req-&gt;start_time_ns);</div><div class='add'>+		part_stat_local_dec(req-&gt;part,</div><div class='add'>+				    in_flight[op_is_write(req_op(req))]);</div><div class='ctx'> 		part_stat_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1019,6 +1020,8 @@ static inline void blk_account_io_start(struct request *req)</div><div class='ctx'> </div><div class='ctx'> 		part_stat_lock();</div><div class='ctx'> 		update_io_ticks(req-&gt;part, jiffies, false);</div><div class='add'>+		part_stat_local_inc(req-&gt;part,</div><div class='add'>+				    in_flight[op_is_write(req_op(req))]);</div><div class='ctx'> 		part_stat_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1330,11 +1333,6 @@ void blk_execute_rq_nowait(struct request *rq, bool at_head)</div><div class='ctx'> </div><div class='ctx'> 	blk_account_io_start(rq);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * As plugging can be enabled for passthrough requests on a zoned</div><div class='del'>-	 * device, directly accessing the plug instead of using blk_mq_plug()</div><div class='del'>-	 * should not have any consequences.</div><div class='del'>-	 */</div><div class='ctx'> 	if (current-&gt;plug &amp;&amp; !at_head) {</div><div class='ctx'> 		blk_add_rq_to_plug(current-&gt;plug, rq);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1921,19 +1919,6 @@ static void blk_mq_handle_dev_resource(struct request *rq,</div><div class='ctx'> 	__blk_mq_requeue_request(rq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void blk_mq_handle_zone_resource(struct request *rq,</div><div class='del'>-					struct list_head *zone_list)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * If we end up here it is because we cannot dispatch a request to a</div><div class='del'>-	 * specific zone due to LLD level zone-write locking or other zone</div><div class='del'>-	 * related resource not being available. In this case, set the request</div><div class='del'>-	 * aside in zone_list for retrying it later.</div><div class='del'>-	 */</div><div class='del'>-	list_add(&amp;rq-&gt;queuelist, zone_list);</div><div class='del'>-	__blk_mq_requeue_request(rq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> enum prep_dispatch {</div><div class='ctx'> 	PREP_DISPATCH_OK,</div><div class='ctx'> 	PREP_DISPATCH_NO_TAG,</div><div class='hunk'>@@ -2019,7 +2004,6 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list,</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> 	int queued;</div><div class='ctx'> 	blk_status_t ret = BLK_STS_OK;</div><div class='del'>-	LIST_HEAD(zone_list);</div><div class='ctx'> 	bool needs_resource = false;</div><div class='ctx'> </div><div class='ctx'> 	if (list_empty(list))</div><div class='hunk'>@@ -2061,23 +2045,11 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list,</div><div class='ctx'> 		case BLK_STS_DEV_RESOURCE:</div><div class='ctx'> 			blk_mq_handle_dev_resource(rq, list);</div><div class='ctx'> 			goto out;</div><div class='del'>-		case BLK_STS_ZONE_RESOURCE:</div><div class='del'>-			/*</div><div class='del'>-			 * Move the request to zone_list and keep going through</div><div class='del'>-			 * the dispatch list to find more requests the drive can</div><div class='del'>-			 * accept.</div><div class='del'>-			 */</div><div class='del'>-			blk_mq_handle_zone_resource(rq, &amp;zone_list);</div><div class='del'>-			needs_resource = true;</div><div class='del'>-			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			blk_mq_end_request(rq, ret);</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (!list_empty(list));</div><div class='ctx'> out:</div><div class='del'>-	if (!list_empty(&amp;zone_list))</div><div class='del'>-		list_splice_tail_init(&amp;zone_list, list);</div><div class='del'>-</div><div class='ctx'> 	/* If we didn't flush the entire list, we could have told the driver</div><div class='ctx'> 	 * there was more coming, but that turned out to be a lie.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2164,6 +2136,15 @@ static inline int blk_mq_first_mapped_cpu(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * -&gt;next_cpu is always calculated from hctx-&gt;cpumask, so simply use</div><div class='add'>+ * it for speeding up the check</div><div class='add'>+ */</div><div class='add'>+static bool blk_mq_hctx_empty_cpumask(struct blk_mq_hw_ctx *hctx)</div><div class='add'>+{</div><div class='add'>+        return hctx-&gt;next_cpu &gt;= nr_cpu_ids;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * It'd be great if the workqueue API had a way to pass</div><div class='ctx'>  * in a mask and had some smarts for more clever placement.</div><div class='ctx'>  * For now we just round-robin here, switching for every</div><div class='hunk'>@@ -2174,7 +2155,8 @@ static int blk_mq_hctx_next_cpu(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 	bool tried = false;</div><div class='ctx'> 	int next_cpu = hctx-&gt;next_cpu;</div><div class='ctx'> </div><div class='del'>-	if (hctx-&gt;queue-&gt;nr_hw_queues == 1)</div><div class='add'>+	/* Switch to unbound if no allowable CPUs in this hctx */</div><div class='add'>+	if (hctx-&gt;queue-&gt;nr_hw_queues == 1 || blk_mq_hctx_empty_cpumask(hctx))</div><div class='ctx'> 		return WORK_CPU_UNBOUND;</div><div class='ctx'> </div><div class='ctx'> 	if (--hctx-&gt;next_cpu_batch &lt;= 0) {</div><div class='hunk'>@@ -2948,22 +2930,37 @@ static void blk_mq_use_cached_rq(struct request *rq, struct blk_plug *plug,</div><div class='ctx'> void blk_mq_submit_bio(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = bdev_get_queue(bio-&gt;bi_bdev);</div><div class='del'>-	struct blk_plug *plug = blk_mq_plug(bio);</div><div class='add'>+	struct blk_plug *plug = current-&gt;plug;</div><div class='ctx'> 	const int is_sync = op_is_sync(bio-&gt;bi_opf);</div><div class='ctx'> 	struct blk_mq_hw_ctx *hctx;</div><div class='ctx'> 	unsigned int nr_segs = 1;</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> 	blk_status_t ret;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If the plug has a cached request for this queue, try to use it.</div><div class='add'>+	 */</div><div class='add'>+	rq = blk_mq_peek_cached_request(plug, q, bio-&gt;bi_opf);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * A BIO that was released from a zone write plug has already been</div><div class='add'>+	 * through the preparation in this function, already holds a reference</div><div class='add'>+	 * on the queue usage counter, and is the only write BIO in-flight for</div><div class='add'>+	 * the target zone. Go straight to preparing a request for it.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_zone_write_plugging(bio)) {</div><div class='add'>+		nr_segs = bio-&gt;__bi_nr_segments;</div><div class='add'>+		if (rq)</div><div class='add'>+			blk_queue_exit(q);</div><div class='add'>+		goto new_request;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bio = blk_queue_bounce(bio, q);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If the plug has a cached request for this queue, try use it.</div><div class='del'>-	 *</div><div class='ctx'> 	 * The cached request already holds a q_usage_counter reference and we</div><div class='ctx'> 	 * don't have to acquire a new one if we use it.</div><div class='ctx'> 	 */</div><div class='del'>-	rq = blk_mq_peek_cached_request(plug, q, bio-&gt;bi_opf);</div><div class='ctx'> 	if (!rq) {</div><div class='ctx'> 		if (unlikely(bio_queue_enter(bio)))</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -2980,6 +2977,10 @@ void blk_mq_submit_bio(struct bio *bio)</div><div class='ctx'> 	if (blk_mq_attempt_bio_merge(q, bio, nr_segs))</div><div class='ctx'> 		goto queue_exit;</div><div class='ctx'> </div><div class='add'>+	if (blk_queue_is_zoned(q) &amp;&amp; blk_zone_plug_bio(bio, nr_segs))</div><div class='add'>+		goto queue_exit;</div><div class='add'>+</div><div class='add'>+new_request:</div><div class='ctx'> 	if (!rq) {</div><div class='ctx'> 		rq = blk_mq_get_new_requests(q, plug, bio, nr_segs);</div><div class='ctx'> 		if (unlikely(!rq))</div><div class='hunk'>@@ -3002,6 +3003,9 @@ void blk_mq_submit_bio(struct bio *bio)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (bio_zone_write_plugging(bio))</div><div class='add'>+		blk_zone_write_plug_init_request(rq);</div><div class='add'>+</div><div class='ctx'> 	if (op_is_flush(bio-&gt;bi_opf) &amp;&amp; blk_insert_flush(rq))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -3483,14 +3487,30 @@ static bool blk_mq_hctx_has_requests(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 	return data.has_rq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool blk_mq_last_cpu_in_hctx(unsigned int cpu,</div><div class='del'>-		struct blk_mq_hw_ctx *hctx)</div><div class='add'>+static bool blk_mq_hctx_has_online_cpu(struct blk_mq_hw_ctx *hctx,</div><div class='add'>+		unsigned int this_cpu)</div><div class='ctx'> {</div><div class='del'>-	if (cpumask_first_and(hctx-&gt;cpumask, cpu_online_mask) != cpu)</div><div class='del'>-		return false;</div><div class='del'>-	if (cpumask_next_and(cpu, hctx-&gt;cpumask, cpu_online_mask) &lt; nr_cpu_ids)</div><div class='del'>-		return false;</div><div class='del'>-	return true;</div><div class='add'>+	enum hctx_type type = hctx-&gt;type;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * hctx-&gt;cpumask has to rule out isolated CPUs, but userspace still</div><div class='add'>+	 * might submit IOs on these isolated CPUs, so use the queue map to</div><div class='add'>+	 * check if all CPUs mapped to this hctx are offline</div><div class='add'>+	 */</div><div class='add'>+	for_each_online_cpu(cpu) {</div><div class='add'>+		struct blk_mq_hw_ctx *h = blk_mq_map_queue_type(hctx-&gt;queue,</div><div class='add'>+				type, cpu);</div><div class='add'>+</div><div class='add'>+		if (h != hctx)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* this hctx has at least one online CPU */</div><div class='add'>+		if (this_cpu != cpu)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int blk_mq_hctx_notify_offline(unsigned int cpu, struct hlist_node *node)</div><div class='hunk'>@@ -3498,8 +3518,7 @@ static int blk_mq_hctx_notify_offline(unsigned int cpu, struct hlist_node *node)</div><div class='ctx'> 	struct blk_mq_hw_ctx *hctx = hlist_entry_safe(node,</div><div class='ctx'> 			struct blk_mq_hw_ctx, cpuhp_online);</div><div class='ctx'> </div><div class='del'>-	if (!cpumask_test_cpu(cpu, hctx-&gt;cpumask) ||</div><div class='del'>-	    !blk_mq_last_cpu_in_hctx(cpu, hctx))</div><div class='add'>+	if (blk_mq_hctx_has_online_cpu(hctx, cpu))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3907,6 +3926,8 @@ static void blk_mq_map_swqueue(struct request_queue *q)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	queue_for_each_hw_ctx(q, hctx, i) {</div><div class='add'>+		int cpu;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If no software queues are mapped to this hardware queue,</div><div class='ctx'> 		 * disable it and free the request entries.</div><div class='hunk'>@@ -3934,6 +3955,15 @@ static void blk_mq_map_swqueue(struct request_queue *q)</div><div class='ctx'> 		sbitmap_resize(&amp;hctx-&gt;ctx_map, hctx-&gt;nr_ctx);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='add'>+		 * Rule out isolated CPUs from hctx-&gt;cpumask to avoid</div><div class='add'>+		 * running block kworker on isolated CPUs</div><div class='add'>+		 */</div><div class='add'>+		for_each_cpu(cpu, hctx-&gt;cpumask) {</div><div class='add'>+			if (cpu_is_isolated(cpu))</div><div class='add'>+				cpumask_clear_cpu(cpu, hctx-&gt;cpumask);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='ctx'> 		 * Initialize batch roundrobin counts</div><div class='ctx'> 		 */</div><div class='ctx'> 		hctx-&gt;next_cpu = blk_mq_first_mapped_cpu(hctx);</div><div class='head'>diff --git a/block/blk-mq.h b/block/blk-mq.h<br/>index f75a9ecfebde..260beea8e332 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-mq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-mq.h</a></div><div class='hunk'>@@ -365,37 +365,6 @@ static inline void blk_mq_clear_mq_map(struct blk_mq_queue_map *qmap)</div><div class='ctx'> 		qmap-&gt;mq_map[cpu] = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * blk_mq_plug() - Get caller context plug</div><div class='del'>- * @bio : the bio being submitted by the caller context</div><div class='del'>- *</div><div class='del'>- * Plugging, by design, may delay the insertion of BIOs into the elevator in</div><div class='del'>- * order to increase BIO merging opportunities. This however can cause BIO</div><div class='del'>- * insertion order to change from the order in which submit_bio() is being</div><div class='del'>- * executed in the case of multiple contexts concurrently issuing BIOs to a</div><div class='del'>- * device, even if these context are synchronized to tightly control BIO issuing</div><div class='del'>- * order. While this is not a problem with regular block devices, this ordering</div><div class='del'>- * change can cause write BIO failures with zoned block devices as these</div><div class='del'>- * require sequential write patterns to zones. Prevent this from happening by</div><div class='del'>- * ignoring the plug state of a BIO issuing context if it is for a zoned block</div><div class='del'>- * device and the BIO to plug is a write operation.</div><div class='del'>- *</div><div class='del'>- * Return current-&gt;plug if the bio can be plugged and NULL otherwise</div><div class='del'>- */</div><div class='del'>-static inline struct blk_plug *blk_mq_plug( struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	/* Zoned block device write operation case: do not plug the BIO */</div><div class='del'>-	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &amp;&amp;</div><div class='del'>-	    bdev_op_is_zoned_write(bio-&gt;bi_bdev, bio_op(bio)))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For regular block devices or read operations, use the context plug</div><div class='del'>-	 * which may be NULL if blk_start_plug() was not executed.</div><div class='del'>-	 */</div><div class='del'>-	return current-&gt;plug;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Free all requests on the list */</div><div class='ctx'> static inline void blk_mq_free_requests(struct list_head *list)</div><div class='ctx'> {</div><div class='head'>diff --git a/block/blk-settings.c b/block/blk-settings.c<br/>index d2731843f2fc..a7fe8e90240a 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-settings.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-settings.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-settings.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-settings.c</a></div><div class='hunk'>@@ -188,7 +188,10 @@ static int blk_validate_limits(struct queue_limits *lim)</div><div class='ctx'> 	 * bvec and lower layer bio splitting is supposed to handle the two</div><div class='ctx'> 	 * correctly.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!lim-&gt;virt_boundary_mask) {</div><div class='add'>+	if (lim-&gt;virt_boundary_mask) {</div><div class='add'>+		if (!lim-&gt;max_segment_size)</div><div class='add'>+			lim-&gt;max_segment_size = UINT_MAX;</div><div class='add'>+	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The maximum segment size has an odd historic 64k default that</div><div class='ctx'> 		 * drivers probably should override.  Just like the I/O size we</div><div class='hunk'>@@ -280,72 +283,6 @@ int queue_limits_set(struct request_queue *q, struct queue_limits *lim)</div><div class='ctx'> EXPORT_SYMBOL_GPL(queue_limits_set);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * blk_queue_bounce_limit - set bounce buffer limit for queue</div><div class='del'>- * @q: the request queue for the device</div><div class='del'>- * @bounce: bounce limit to enforce</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- *    Force bouncing for ISA DMA ranges or highmem.</div><div class='del'>- *</div><div class='del'>- *    DEPRECATED, don't use in new code.</div><div class='del'>- **/</div><div class='del'>-void blk_queue_bounce_limit(struct request_queue *q, enum blk_bounce bounce)</div><div class='del'>-{</div><div class='del'>-	q-&gt;limits.bounce = bounce;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_bounce_limit);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_max_hw_sectors - set max sectors for a request for this queue</div><div class='del'>- * @q:  the request queue for the device</div><div class='del'>- * @max_hw_sectors:  max hardware sectors in the usual 512b unit</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- *    Enables a low level driver to set a hard upper limit,</div><div class='del'>- *    max_hw_sectors, on the size of requests.  max_hw_sectors is set by</div><div class='del'>- *    the device driver based upon the capabilities of the I/O</div><div class='del'>- *    controller.</div><div class='del'>- *</div><div class='del'>- *    max_dev_sectors is a hard limit imposed by the storage device for</div><div class='del'>- *    READ/WRITE requests. It is set by the disk driver.</div><div class='del'>- *</div><div class='del'>- *    max_sectors is a soft limit imposed by the block layer for</div><div class='del'>- *    filesystem type requests.  This value can be overridden on a</div><div class='del'>- *    per-device basis in /sys/block/&lt;device&gt;/queue/max_sectors_kb.</div><div class='del'>- *    The soft limit can not exceed max_hw_sectors.</div><div class='del'>- **/</div><div class='del'>-void blk_queue_max_hw_sectors(struct request_queue *q, unsigned int max_hw_sectors)</div><div class='del'>-{</div><div class='del'>-	struct queue_limits *limits = &amp;q-&gt;limits;</div><div class='del'>-	unsigned int max_sectors;</div><div class='del'>-</div><div class='del'>-	if ((max_hw_sectors &lt;&lt; 9) &lt; PAGE_SIZE) {</div><div class='del'>-		max_hw_sectors = 1 &lt;&lt; (PAGE_SHIFT - 9);</div><div class='del'>-		pr_info("%s: set to minimum %u\n", __func__, max_hw_sectors);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	max_hw_sectors = round_down(max_hw_sectors,</div><div class='del'>-				    limits-&gt;logical_block_size &gt;&gt; SECTOR_SHIFT);</div><div class='del'>-	limits-&gt;max_hw_sectors = max_hw_sectors;</div><div class='del'>-</div><div class='del'>-	max_sectors = min_not_zero(max_hw_sectors, limits-&gt;max_dev_sectors);</div><div class='del'>-</div><div class='del'>-	if (limits-&gt;max_user_sectors)</div><div class='del'>-		max_sectors = min(max_sectors, limits-&gt;max_user_sectors);</div><div class='del'>-	else</div><div class='del'>-		max_sectors = min(max_sectors, BLK_DEF_MAX_SECTORS_CAP);</div><div class='del'>-</div><div class='del'>-	max_sectors = round_down(max_sectors,</div><div class='del'>-				 limits-&gt;logical_block_size &gt;&gt; SECTOR_SHIFT);</div><div class='del'>-	limits-&gt;max_sectors = max_sectors;</div><div class='del'>-</div><div class='del'>-	if (!q-&gt;disk)</div><div class='del'>-		return;</div><div class='del'>-	q-&gt;disk-&gt;bdi-&gt;io_pages = max_sectors &gt;&gt; (PAGE_SHIFT - 9);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_max_hw_sectors);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * blk_queue_chunk_sectors - set size of the chunk for this queue</div><div class='ctx'>  * @q:  the request queue for the device</div><div class='ctx'>  * @chunk_sectors:  chunk sectors in the usual 512b unit</div><div class='hunk'>@@ -408,89 +345,38 @@ EXPORT_SYMBOL(blk_queue_max_write_zeroes_sectors);</div><div class='ctx'>  * blk_queue_max_zone_append_sectors - set max sectors for a single zone append</div><div class='ctx'>  * @q:  the request queue for the device</div><div class='ctx'>  * @max_zone_append_sectors: maximum number of sectors to write per command</div><div class='add'>+ *</div><div class='add'>+ * Sets the maximum number of sectors allowed for zone append commands. If</div><div class='add'>+ * Specifying 0 for @max_zone_append_sectors indicates that the queue does</div><div class='add'>+ * not natively support zone append operations and that the block layer must</div><div class='add'>+ * emulate these operations using regular writes.</div><div class='ctx'>  **/</div><div class='ctx'> void blk_queue_max_zone_append_sectors(struct request_queue *q,</div><div class='ctx'> 		unsigned int max_zone_append_sectors)</div><div class='ctx'> {</div><div class='del'>-	unsigned int max_sectors;</div><div class='add'>+	unsigned int max_sectors = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(!blk_queue_is_zoned(q)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	max_sectors = min(q-&gt;limits.max_hw_sectors, max_zone_append_sectors);</div><div class='del'>-	max_sectors = min(q-&gt;limits.chunk_sectors, max_sectors);</div><div class='add'>+	if (max_zone_append_sectors) {</div><div class='add'>+		max_sectors = min(q-&gt;limits.max_hw_sectors,</div><div class='add'>+				  max_zone_append_sectors);</div><div class='add'>+		max_sectors = min(q-&gt;limits.chunk_sectors, max_sectors);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Signal eventual driver bugs resulting in the max_zone_append sectors limit</div><div class='del'>-	 * being 0 due to a 0 argument, the chunk_sectors limit (zone size) not set,</div><div class='del'>-	 * or the max_hw_sectors limit not set.</div><div class='del'>-	 */</div><div class='del'>-	WARN_ON(!max_sectors);</div><div class='add'>+		/*</div><div class='add'>+		 * Signal eventual driver bugs resulting in the max_zone_append</div><div class='add'>+		 * sectors limit being 0 due to the chunk_sectors limit (zone</div><div class='add'>+		 * size) not set or the max_hw_sectors limit not set.</div><div class='add'>+		 */</div><div class='add'>+		WARN_ON_ONCE(!max_sectors);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	q-&gt;limits.max_zone_append_sectors = max_sectors;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_queue_max_zone_append_sectors);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * blk_queue_max_segments - set max hw segments for a request for this queue</div><div class='del'>- * @q:  the request queue for the device</div><div class='del'>- * @max_segments:  max number of segments</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- *    Enables a low level driver to set an upper limit on the number of</div><div class='del'>- *    hw data segments in a request.</div><div class='del'>- **/</div><div class='del'>-void blk_queue_max_segments(struct request_queue *q, unsigned short max_segments)</div><div class='del'>-{</div><div class='del'>-	if (!max_segments) {</div><div class='del'>-		max_segments = 1;</div><div class='del'>-		pr_info("%s: set to minimum %u\n", __func__, max_segments);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	q-&gt;limits.max_segments = max_segments;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_max_segments);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_max_discard_segments - set max segments for discard requests</div><div class='del'>- * @q:  the request queue for the device</div><div class='del'>- * @max_segments:  max number of segments</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- *    Enables a low level driver to set an upper limit on the number of</div><div class='del'>- *    segments in a discard request.</div><div class='del'>- **/</div><div class='del'>-void blk_queue_max_discard_segments(struct request_queue *q,</div><div class='del'>-		unsigned short max_segments)</div><div class='del'>-{</div><div class='del'>-	q-&gt;limits.max_discard_segments = max_segments;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blk_queue_max_discard_segments);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_max_segment_size - set max segment size for blk_rq_map_sg</div><div class='del'>- * @q:  the request queue for the device</div><div class='del'>- * @max_size:  max size of segment in bytes</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- *    Enables a low level driver to set an upper limit on the size of a</div><div class='del'>- *    coalesced segment</div><div class='del'>- **/</div><div class='del'>-void blk_queue_max_segment_size(struct request_queue *q, unsigned int max_size)</div><div class='del'>-{</div><div class='del'>-	if (max_size &lt; PAGE_SIZE) {</div><div class='del'>-		max_size = PAGE_SIZE;</div><div class='del'>-		pr_info("%s: set to minimum %u\n", __func__, max_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* see blk_queue_virt_boundary() for the explanation */</div><div class='del'>-	WARN_ON_ONCE(q-&gt;limits.virt_boundary_mask);</div><div class='del'>-</div><div class='del'>-	q-&gt;limits.max_segment_size = max_size;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_max_segment_size);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * blk_queue_logical_block_size - set logical block size for the queue</div><div class='ctx'>  * @q:  the request queue for the device</div><div class='ctx'>  * @size:  the logical block size, in bytes</div><div class='hunk'>@@ -656,29 +542,6 @@ void blk_limits_io_opt(struct queue_limits *limits, unsigned int opt)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(blk_limits_io_opt);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * blk_queue_io_opt - set optimal request size for the queue</div><div class='del'>- * @q:	the request queue for the device</div><div class='del'>- * @opt:  optimal request size in bytes</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- *   Storage devices may report an optimal I/O size, which is the</div><div class='del'>- *   device's preferred unit for sustained I/O.  This is rarely reported</div><div class='del'>- *   for disk drives.  For RAID arrays it is usually the stripe width or</div><div class='del'>- *   the internal track size.  A properly aligned multiple of</div><div class='del'>- *   optimal_io_size is the preferred request size for workloads where</div><div class='del'>- *   sustained throughput is desired.</div><div class='del'>- */</div><div class='del'>-void blk_queue_io_opt(struct request_queue *q, unsigned int opt)</div><div class='del'>-{</div><div class='del'>-	blk_limits_io_opt(&amp;q-&gt;limits, opt);</div><div class='del'>-	if (!q-&gt;disk)</div><div class='del'>-		return;</div><div class='del'>-	q-&gt;disk-&gt;bdi-&gt;ra_pages =</div><div class='del'>-		max(queue_io_opt(q) * 2 / PAGE_SIZE, VM_READAHEAD_PAGES);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_io_opt);</div><div class='del'>-</div><div class='ctx'> static int queue_limit_alignment_offset(const struct queue_limits *lim,</div><div class='ctx'> 		sector_t sector)</div><div class='ctx'> {</div><div class='hunk'>@@ -752,8 +615,8 @@ int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,</div><div class='ctx'> 	t-&gt;max_dev_sectors = min_not_zero(t-&gt;max_dev_sectors, b-&gt;max_dev_sectors);</div><div class='ctx'> 	t-&gt;max_write_zeroes_sectors = min(t-&gt;max_write_zeroes_sectors,</div><div class='ctx'> 					b-&gt;max_write_zeroes_sectors);</div><div class='del'>-	t-&gt;max_zone_append_sectors = min(t-&gt;max_zone_append_sectors,</div><div class='del'>-					b-&gt;max_zone_append_sectors);</div><div class='add'>+	t-&gt;max_zone_append_sectors = min(queue_limits_max_zone_append_sectors(t),</div><div class='add'>+					 queue_limits_max_zone_append_sectors(b));</div><div class='ctx'> 	t-&gt;bounce = max(t-&gt;bounce, b-&gt;bounce);</div><div class='ctx'> </div><div class='ctx'> 	t-&gt;seg_boundary_mask = min_not_zero(t-&gt;seg_boundary_mask,</div><div class='hunk'>@@ -929,81 +792,6 @@ void blk_queue_update_dma_pad(struct request_queue *q, unsigned int mask)</div><div class='ctx'> EXPORT_SYMBOL(blk_queue_update_dma_pad);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * blk_queue_segment_boundary - set boundary rules for segment merging</div><div class='del'>- * @q:  the request queue for the device</div><div class='del'>- * @mask:  the memory boundary mask</div><div class='del'>- **/</div><div class='del'>-void blk_queue_segment_boundary(struct request_queue *q, unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	if (mask &lt; PAGE_SIZE - 1) {</div><div class='del'>-		mask = PAGE_SIZE - 1;</div><div class='del'>-		pr_info("%s: set to minimum %lx\n", __func__, mask);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	q-&gt;limits.seg_boundary_mask = mask;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_segment_boundary);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_virt_boundary - set boundary rules for bio merging</div><div class='del'>- * @q:  the request queue for the device</div><div class='del'>- * @mask:  the memory boundary mask</div><div class='del'>- **/</div><div class='del'>-void blk_queue_virt_boundary(struct request_queue *q, unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	q-&gt;limits.virt_boundary_mask = mask;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Devices that require a virtual boundary do not support scatter/gather</div><div class='del'>-	 * I/O natively, but instead require a descriptor list entry for each</div><div class='del'>-	 * page (which might not be idential to the Linux PAGE_SIZE).  Because</div><div class='del'>-	 * of that they are not limited by our notion of "segment size".</div><div class='del'>-	 */</div><div class='del'>-	if (mask)</div><div class='del'>-		q-&gt;limits.max_segment_size = UINT_MAX;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_virt_boundary);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_dma_alignment - set dma length and memory alignment</div><div class='del'>- * @q:     the request queue for the device</div><div class='del'>- * @mask:  alignment mask</div><div class='del'>- *</div><div class='del'>- * description:</div><div class='del'>- *    set required memory and length alignment for direct dma transactions.</div><div class='del'>- *    this is used when building direct io requests for the queue.</div><div class='del'>- *</div><div class='del'>- **/</div><div class='del'>-void blk_queue_dma_alignment(struct request_queue *q, int mask)</div><div class='del'>-{</div><div class='del'>-	q-&gt;limits.dma_alignment = mask;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_dma_alignment);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_update_dma_alignment - update dma length and memory alignment</div><div class='del'>- * @q:     the request queue for the device</div><div class='del'>- * @mask:  alignment mask</div><div class='del'>- *</div><div class='del'>- * description:</div><div class='del'>- *    update required memory and length alignment for direct dma transactions.</div><div class='del'>- *    If the requested alignment is larger than the current alignment, then</div><div class='del'>- *    the current queue alignment is updated to the new value, otherwise it</div><div class='del'>- *    is left alone.  The design of this is to allow multiple objects</div><div class='del'>- *    (driver, device, transport etc) to set their respective</div><div class='del'>- *    alignments without having them interfere.</div><div class='del'>- *</div><div class='del'>- **/</div><div class='del'>-void blk_queue_update_dma_alignment(struct request_queue *q, int mask)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(mask &gt; PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	if (mask &gt; q-&gt;limits.dma_alignment)</div><div class='del'>-		q-&gt;limits.dma_alignment = mask;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(blk_queue_update_dma_alignment);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * blk_set_queue_depth - tell the block layer about the device queue depth</div><div class='ctx'>  * @q:		the request queue for the device</div><div class='ctx'>  * @depth:		queue depth</div><div class='hunk'>@@ -1041,44 +829,6 @@ void blk_queue_write_cache(struct request_queue *q, bool wc, bool fua)</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_queue_write_cache);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * blk_queue_required_elevator_features - Set a queue required elevator features</div><div class='del'>- * @q:		the request queue for the target device</div><div class='del'>- * @features:	Required elevator features OR'ed together</div><div class='del'>- *</div><div class='del'>- * Tell the block layer that for the device controlled through @q, only the</div><div class='del'>- * only elevators that can be used are those that implement at least the set of</div><div class='del'>- * features specified by @features.</div><div class='del'>- */</div><div class='del'>-void blk_queue_required_elevator_features(struct request_queue *q,</div><div class='del'>-					  unsigned int features)</div><div class='del'>-{</div><div class='del'>-	q-&gt;required_elevator_features = features;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blk_queue_required_elevator_features);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * blk_queue_can_use_dma_map_merging - configure queue for merging segments.</div><div class='del'>- * @q:		the request queue for the device</div><div class='del'>- * @dev:	the device pointer for dma</div><div class='del'>- *</div><div class='del'>- * Tell the block layer about merging the segments by dma map of @q.</div><div class='del'>- */</div><div class='del'>-bool blk_queue_can_use_dma_map_merging(struct request_queue *q,</div><div class='del'>-				       struct device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long boundary = dma_get_merge_boundary(dev);</div><div class='del'>-</div><div class='del'>-	if (!boundary)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* No need to update max_segment_size. see blk_queue_virt_boundary() */</div><div class='del'>-	blk_queue_virt_boundary(q, boundary);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blk_queue_can_use_dma_map_merging);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * disk_set_zoned - inidicate a zoned device</div><div class='ctx'>  * @disk:	gendisk to configure</div><div class='ctx'>  */</div><div class='head'>diff --git a/block/blk-stat.c b/block/blk-stat.c<br/>index e42c263e53fb..eaf60097bbe1 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-stat.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-stat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-stat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-stat.c</a></div><div class='hunk'>@@ -57,9 +57,6 @@ void blk_stat_add(struct request *rq, u64 now)</div><div class='ctx'> </div><div class='ctx'> 	value = (now &gt;= rq-&gt;io_start_time_ns) ? now - rq-&gt;io_start_time_ns : 0;</div><div class='ctx'> </div><div class='del'>-	if (req_op(rq) == REQ_OP_READ || req_op(rq) == REQ_OP_WRITE)</div><div class='del'>-		blk_throtl_stat_add(rq, value);</div><div class='del'>-</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	cpu = get_cpu();</div><div class='ctx'> 	list_for_each_entry_rcu(cb, &amp;q-&gt;stats-&gt;callbacks, list) {</div><div class='head'>diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c<br/>index 8c8f69d8ba48..f0f9314ab65c 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-sysfs.c</a></div><div class='hunk'>@@ -224,7 +224,7 @@ static ssize_t queue_zone_write_granularity_show(struct request_queue *q,</div><div class='ctx'> </div><div class='ctx'> static ssize_t queue_zone_append_max_show(struct request_queue *q, char *page)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long max_sectors = q-&gt;limits.max_zone_append_sectors;</div><div class='add'>+	unsigned long long max_sectors = queue_max_zone_append_sectors(q);</div><div class='ctx'> </div><div class='ctx'> 	return sprintf(page, "%llu\n", max_sectors &lt;&lt; SECTOR_SHIFT);</div><div class='ctx'> }</div><div class='hunk'>@@ -516,10 +516,6 @@ QUEUE_RW_ENTRY(queue_io_timeout, "io_timeout");</div><div class='ctx'> QUEUE_RO_ENTRY(queue_virt_boundary_mask, "virt_boundary_mask");</div><div class='ctx'> QUEUE_RO_ENTRY(queue_dma_alignment, "dma_alignment");</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-QUEUE_RW_ENTRY(blk_throtl_sample_time, "throttle_sample_time");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* legacy alias for logical_block_size: */</div><div class='ctx'> static struct queue_sysfs_entry queue_hw_sector_size_entry = {</div><div class='ctx'> 	.attr = {.name = "hw_sector_size", .mode = 0444 },</div><div class='hunk'>@@ -640,9 +636,6 @@ static struct attribute *queue_attrs[] = {</div><div class='ctx'> 	&amp;queue_fua_entry.attr,</div><div class='ctx'> 	&amp;queue_dax_entry.attr,</div><div class='ctx'> 	&amp;queue_poll_delay_entry.attr,</div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-	&amp;blk_throtl_sample_time_entry.attr,</div><div class='del'>-#endif</div><div class='ctx'> 	&amp;queue_virt_boundary_mask_entry.attr,</div><div class='ctx'> 	&amp;queue_dma_alignment_entry.attr,</div><div class='ctx'> 	NULL,</div><div class='hunk'>@@ -814,7 +807,6 @@ int blk_register_queue(struct gendisk *disk)</div><div class='ctx'> </div><div class='ctx'> 	blk_queue_flag_set(QUEUE_FLAG_REGISTERED, q);</div><div class='ctx'> 	wbt_enable_default(disk);</div><div class='del'>-	blk_throtl_register(disk);</div><div class='ctx'> </div><div class='ctx'> 	/* Now everything is ready and send out KOBJ_ADD uevent */</div><div class='ctx'> 	kobject_uevent(&amp;disk-&gt;queue_kobj, KOBJ_ADD);</div><div class='head'>diff --git a/block/blk-throttle.c b/block/blk-throttle.c<br/>index f4850a6f860b..80aaca18bfb0 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-throttle.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-throttle.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-throttle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-throttle.c</a></div><div class='hunk'>@@ -25,18 +25,6 @@</div><div class='ctx'> #define DFL_THROTL_SLICE_HD (HZ / 10)</div><div class='ctx'> #define DFL_THROTL_SLICE_SSD (HZ / 50)</div><div class='ctx'> #define MAX_THROTL_SLICE (HZ)</div><div class='del'>-#define MAX_IDLE_TIME (5L * 1000 * 1000) /* 5 s */</div><div class='del'>-#define MIN_THROTL_BPS (320 * 1024)</div><div class='del'>-#define MIN_THROTL_IOPS (10)</div><div class='del'>-#define DFL_LATENCY_TARGET (-1L)</div><div class='del'>-#define DFL_IDLE_THRESHOLD (0)</div><div class='del'>-#define DFL_HD_BASELINE_LATENCY (4000L) /* 4ms */</div><div class='del'>-#define LATENCY_FILTERED_SSD (0)</div><div class='del'>-/*</div><div class='del'>- * For HD, very small latency comes from sequential IO. Such IO is helpless to</div><div class='del'>- * help determine if its IO is impacted by others, hence we ignore the IO</div><div class='del'>- */</div><div class='del'>-#define LATENCY_FILTERED_HD (1000L) /* 1ms */</div><div class='ctx'> </div><div class='ctx'> /* A workqueue to queue throttle related work */</div><div class='ctx'> static struct workqueue_struct *kthrotld_workqueue;</div><div class='hunk'>@@ -70,19 +58,6 @@ struct throtl_data</div><div class='ctx'> </div><div class='ctx'> 	/* Work for dispatching throttled bios */</div><div class='ctx'> 	struct work_struct dispatch_work;</div><div class='del'>-	unsigned int limit_index;</div><div class='del'>-	bool limit_valid[LIMIT_CNT];</div><div class='del'>-</div><div class='del'>-	unsigned long low_upgrade_time;</div><div class='del'>-	unsigned long low_downgrade_time;</div><div class='del'>-</div><div class='del'>-	unsigned int scale;</div><div class='del'>-</div><div class='del'>-	struct latency_bucket tmp_buckets[2][LATENCY_BUCKET_SIZE];</div><div class='del'>-	struct avg_latency_bucket avg_buckets[2][LATENCY_BUCKET_SIZE];</div><div class='del'>-	struct latency_bucket __percpu *latency_buckets[2];</div><div class='del'>-	unsigned long last_calculate_time;</div><div class='del'>-	unsigned long filtered_latency;</div><div class='ctx'> </div><div class='ctx'> 	bool track_bio_latency;</div><div class='ctx'> };</div><div class='hunk'>@@ -126,84 +101,24 @@ static struct throtl_data *sq_to_td(struct throtl_service_queue *sq)</div><div class='ctx'> 		return container_of(sq, struct throtl_data, service_queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * cgroup's limit in LIMIT_MAX is scaled if low limit is set. This scale is to</div><div class='del'>- * make the IO dispatch more smooth.</div><div class='del'>- * Scale up: linearly scale up according to elapsed time since upgrade. For</div><div class='del'>- *           every throtl_slice, the limit scales up 1/2 .low limit till the</div><div class='del'>- *           limit hits .max limit</div><div class='del'>- * Scale down: exponentially scale down if a cgroup doesn't hit its .low limit</div><div class='del'>- */</div><div class='del'>-static uint64_t throtl_adjusted_limit(uint64_t low, struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-	/* arbitrary value to avoid too big scale */</div><div class='del'>-	if (td-&gt;scale &lt; 4096 &amp;&amp; time_after_eq(jiffies,</div><div class='del'>-	    td-&gt;low_upgrade_time + td-&gt;scale * td-&gt;throtl_slice))</div><div class='del'>-		td-&gt;scale = (jiffies - td-&gt;low_upgrade_time) / td-&gt;throtl_slice;</div><div class='del'>-</div><div class='del'>-	return low + (low &gt;&gt; 1) * td-&gt;scale;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static uint64_t tg_bps_limit(struct throtl_grp *tg, int rw)</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg_gq *blkg = tg_to_blkg(tg);</div><div class='del'>-	struct throtl_data *td;</div><div class='del'>-	uint64_t ret;</div><div class='ctx'> </div><div class='ctx'> 	if (cgroup_subsys_on_dfl(io_cgrp_subsys) &amp;&amp; !blkg-&gt;parent)</div><div class='ctx'> 		return U64_MAX;</div><div class='ctx'> </div><div class='del'>-	td = tg-&gt;td;</div><div class='del'>-	ret = tg-&gt;bps[rw][td-&gt;limit_index];</div><div class='del'>-	if (ret == 0 &amp;&amp; td-&gt;limit_index == LIMIT_LOW) {</div><div class='del'>-		/* intermediate node or iops isn't 0 */</div><div class='del'>-		if (!list_empty(&amp;blkg-&gt;blkcg-&gt;css.children) ||</div><div class='del'>-		    tg-&gt;iops[rw][td-&gt;limit_index])</div><div class='del'>-			return U64_MAX;</div><div class='del'>-		else</div><div class='del'>-			return MIN_THROTL_BPS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (td-&gt;limit_index == LIMIT_MAX &amp;&amp; tg-&gt;bps[rw][LIMIT_LOW] &amp;&amp;</div><div class='del'>-	    tg-&gt;bps[rw][LIMIT_LOW] != tg-&gt;bps[rw][LIMIT_MAX]) {</div><div class='del'>-		uint64_t adjusted;</div><div class='del'>-</div><div class='del'>-		adjusted = throtl_adjusted_limit(tg-&gt;bps[rw][LIMIT_LOW], td);</div><div class='del'>-		ret = min(tg-&gt;bps[rw][LIMIT_MAX], adjusted);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return tg-&gt;bps[rw];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int tg_iops_limit(struct throtl_grp *tg, int rw)</div><div class='ctx'> {</div><div class='ctx'> 	struct blkcg_gq *blkg = tg_to_blkg(tg);</div><div class='del'>-	struct throtl_data *td;</div><div class='del'>-	unsigned int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (cgroup_subsys_on_dfl(io_cgrp_subsys) &amp;&amp; !blkg-&gt;parent)</div><div class='ctx'> 		return UINT_MAX;</div><div class='ctx'> </div><div class='del'>-	td = tg-&gt;td;</div><div class='del'>-	ret = tg-&gt;iops[rw][td-&gt;limit_index];</div><div class='del'>-	if (ret == 0 &amp;&amp; tg-&gt;td-&gt;limit_index == LIMIT_LOW) {</div><div class='del'>-		/* intermediate node or bps isn't 0 */</div><div class='del'>-		if (!list_empty(&amp;blkg-&gt;blkcg-&gt;css.children) ||</div><div class='del'>-		    tg-&gt;bps[rw][td-&gt;limit_index])</div><div class='del'>-			return UINT_MAX;</div><div class='del'>-		else</div><div class='del'>-			return MIN_THROTL_IOPS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (td-&gt;limit_index == LIMIT_MAX &amp;&amp; tg-&gt;iops[rw][LIMIT_LOW] &amp;&amp;</div><div class='del'>-	    tg-&gt;iops[rw][LIMIT_LOW] != tg-&gt;iops[rw][LIMIT_MAX]) {</div><div class='del'>-		uint64_t adjusted;</div><div class='del'>-</div><div class='del'>-		adjusted = throtl_adjusted_limit(tg-&gt;iops[rw][LIMIT_LOW], td);</div><div class='del'>-		if (adjusted &gt; UINT_MAX)</div><div class='del'>-			adjusted = UINT_MAX;</div><div class='del'>-		ret = min_t(unsigned int, tg-&gt;iops[rw][LIMIT_MAX], adjusted);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return tg-&gt;iops[rw];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define request_bucket_index(sectors) \</div><div class='hunk'>@@ -359,20 +274,10 @@ static struct blkg_policy_data *throtl_pd_alloc(struct gendisk *disk,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	RB_CLEAR_NODE(&amp;tg-&gt;rb_node);</div><div class='del'>-	tg-&gt;bps[READ][LIMIT_MAX] = U64_MAX;</div><div class='del'>-	tg-&gt;bps[WRITE][LIMIT_MAX] = U64_MAX;</div><div class='del'>-	tg-&gt;iops[READ][LIMIT_MAX] = UINT_MAX;</div><div class='del'>-	tg-&gt;iops[WRITE][LIMIT_MAX] = UINT_MAX;</div><div class='del'>-	tg-&gt;bps_conf[READ][LIMIT_MAX] = U64_MAX;</div><div class='del'>-	tg-&gt;bps_conf[WRITE][LIMIT_MAX] = U64_MAX;</div><div class='del'>-	tg-&gt;iops_conf[READ][LIMIT_MAX] = UINT_MAX;</div><div class='del'>-	tg-&gt;iops_conf[WRITE][LIMIT_MAX] = UINT_MAX;</div><div class='del'>-	/* LIMIT_LOW will have default value 0 */</div><div class='del'>-</div><div class='del'>-	tg-&gt;latency_target = DFL_LATENCY_TARGET;</div><div class='del'>-	tg-&gt;latency_target_conf = DFL_LATENCY_TARGET;</div><div class='del'>-	tg-&gt;idletime_threshold = DFL_IDLE_THRESHOLD;</div><div class='del'>-	tg-&gt;idletime_threshold_conf = DFL_IDLE_THRESHOLD;</div><div class='add'>+	tg-&gt;bps[READ] = U64_MAX;</div><div class='add'>+	tg-&gt;bps[WRITE] = U64_MAX;</div><div class='add'>+	tg-&gt;iops[READ] = UINT_MAX;</div><div class='add'>+	tg-&gt;iops[WRITE] = UINT_MAX;</div><div class='ctx'> </div><div class='ctx'> 	return &amp;tg-&gt;pd;</div><div class='ctx'> </div><div class='hunk'>@@ -418,18 +323,15 @@ static void throtl_pd_init(struct blkg_policy_data *pd)</div><div class='ctx'> static void tg_update_has_rules(struct throtl_grp *tg)</div><div class='ctx'> {</div><div class='ctx'> 	struct throtl_grp *parent_tg = sq_to_tg(tg-&gt;service_queue.parent_sq);</div><div class='del'>-	struct throtl_data *td = tg-&gt;td;</div><div class='ctx'> 	int rw;</div><div class='ctx'> </div><div class='ctx'> 	for (rw = READ; rw &lt;= WRITE; rw++) {</div><div class='ctx'> 		tg-&gt;has_rules_iops[rw] =</div><div class='ctx'> 			(parent_tg &amp;&amp; parent_tg-&gt;has_rules_iops[rw]) ||</div><div class='del'>-			(td-&gt;limit_valid[td-&gt;limit_index] &amp;&amp;</div><div class='del'>-			  tg_iops_limit(tg, rw) != UINT_MAX);</div><div class='add'>+			tg_iops_limit(tg, rw) != UINT_MAX;</div><div class='ctx'> 		tg-&gt;has_rules_bps[rw] =</div><div class='ctx'> 			(parent_tg &amp;&amp; parent_tg-&gt;has_rules_bps[rw]) ||</div><div class='del'>-			(td-&gt;limit_valid[td-&gt;limit_index] &amp;&amp;</div><div class='del'>-			 (tg_bps_limit(tg, rw) != U64_MAX));</div><div class='add'>+			tg_bps_limit(tg, rw) != U64_MAX;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -443,49 +345,6 @@ static void throtl_pd_online(struct blkg_policy_data *pd)</div><div class='ctx'> 	tg_update_has_rules(tg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-static void blk_throtl_update_limit_valid(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-	struct cgroup_subsys_state *pos_css;</div><div class='del'>-	struct blkcg_gq *blkg;</div><div class='del'>-	bool low_valid = false;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkg_for_each_descendant_post(blkg, pos_css, td-&gt;queue-&gt;root_blkg) {</div><div class='del'>-		struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='del'>-</div><div class='del'>-		if (tg-&gt;bps[READ][LIMIT_LOW] || tg-&gt;bps[WRITE][LIMIT_LOW] ||</div><div class='del'>-		    tg-&gt;iops[READ][LIMIT_LOW] || tg-&gt;iops[WRITE][LIMIT_LOW]) {</div><div class='del'>-			low_valid = true;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	td-&gt;limit_valid[LIMIT_LOW] = low_valid;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void blk_throtl_update_limit_valid(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void throtl_upgrade_state(struct throtl_data *td);</div><div class='del'>-static void throtl_pd_offline(struct blkg_policy_data *pd)</div><div class='del'>-{</div><div class='del'>-	struct throtl_grp *tg = pd_to_tg(pd);</div><div class='del'>-</div><div class='del'>-	tg-&gt;bps[READ][LIMIT_LOW] = 0;</div><div class='del'>-	tg-&gt;bps[WRITE][LIMIT_LOW] = 0;</div><div class='del'>-	tg-&gt;iops[READ][LIMIT_LOW] = 0;</div><div class='del'>-	tg-&gt;iops[WRITE][LIMIT_LOW] = 0;</div><div class='del'>-</div><div class='del'>-	blk_throtl_update_limit_valid(tg-&gt;td);</div><div class='del'>-</div><div class='del'>-	if (!tg-&gt;td-&gt;limit_valid[tg-&gt;td-&gt;limit_index])</div><div class='del'>-		throtl_upgrade_state(tg-&gt;td);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void throtl_pd_free(struct blkg_policy_data *pd)</div><div class='ctx'> {</div><div class='ctx'> 	struct throtl_grp *tg = pd_to_tg(pd);</div><div class='hunk'>@@ -1151,8 +1010,6 @@ static int throtl_select_dispatch(struct throtl_service_queue *parent_sq)</div><div class='ctx'> 	return nr_disp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool throtl_can_upgrade(struct throtl_data *td,</div><div class='del'>-	struct throtl_grp *this_tg);</div><div class='ctx'> /**</div><div class='ctx'>  * throtl_pending_timer_fn - timer function for service_queue-&gt;pending_timer</div><div class='ctx'>  * @t: the pending_timer member of the throtl_service_queue being serviced</div><div class='hunk'>@@ -1189,9 +1046,6 @@ static void throtl_pending_timer_fn(struct timer_list *t)</div><div class='ctx'> 	if (!q-&gt;root_blkg)</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> </div><div class='del'>-	if (throtl_can_upgrade(td, NULL))</div><div class='del'>-		throtl_upgrade_state(td);</div><div class='del'>-</div><div class='ctx'> again:</div><div class='ctx'> 	parent_sq = sq-&gt;parent_sq;</div><div class='ctx'> 	dispatched = false;</div><div class='hunk'>@@ -1331,22 +1185,12 @@ static void tg_conf_updated(struct throtl_grp *tg, bool global)</div><div class='ctx'> 	blkg_for_each_descendant_pre(blkg, pos_css,</div><div class='ctx'> 			global ? tg-&gt;td-&gt;queue-&gt;root_blkg : tg_to_blkg(tg)) {</div><div class='ctx'> 		struct throtl_grp *this_tg = blkg_to_tg(blkg);</div><div class='del'>-		struct throtl_grp *parent_tg;</div><div class='ctx'> </div><div class='ctx'> 		tg_update_has_rules(this_tg);</div><div class='ctx'> 		/* ignore root/second level */</div><div class='ctx'> 		if (!cgroup_subsys_on_dfl(io_cgrp_subsys) || !blkg-&gt;parent ||</div><div class='ctx'> 		    !blkg-&gt;parent-&gt;parent)</div><div class='ctx'> 			continue;</div><div class='del'>-		parent_tg = blkg_to_tg(blkg-&gt;parent);</div><div class='del'>-		/*</div><div class='del'>-		 * make sure all children has lower idle time threshold and</div><div class='del'>-		 * higher latency target</div><div class='del'>-		 */</div><div class='del'>-		this_tg-&gt;idletime_threshold = min(this_tg-&gt;idletime_threshold,</div><div class='del'>-				parent_tg-&gt;idletime_threshold);</div><div class='del'>-		this_tg-&gt;latency_target = max(this_tg-&gt;latency_target,</div><div class='del'>-				parent_tg-&gt;latency_target);</div><div class='ctx'> 	}</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='hunk'>@@ -1367,6 +1211,53 @@ static void tg_conf_updated(struct throtl_grp *tg, bool global)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int blk_throtl_init(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	struct request_queue *q = disk-&gt;queue;</div><div class='add'>+	struct throtl_data *td;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	td = kzalloc_node(sizeof(*td), GFP_KERNEL, q-&gt;node);</div><div class='add'>+	if (!td)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;td-&gt;dispatch_work, blk_throtl_dispatch_work_fn);</div><div class='add'>+	throtl_service_queue_init(&amp;td-&gt;service_queue);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Freeze queue before activating policy, to synchronize with IO path,</div><div class='add'>+	 * which is protected by 'q_usage_counter'.</div><div class='add'>+	 */</div><div class='add'>+	blk_mq_freeze_queue(disk-&gt;queue);</div><div class='add'>+	blk_mq_quiesce_queue(disk-&gt;queue);</div><div class='add'>+</div><div class='add'>+	q-&gt;td = td;</div><div class='add'>+	td-&gt;queue = q;</div><div class='add'>+</div><div class='add'>+	/* activate policy */</div><div class='add'>+	ret = blkcg_activate_policy(disk, &amp;blkcg_policy_throtl);</div><div class='add'>+	if (ret) {</div><div class='add'>+		q-&gt;td = NULL;</div><div class='add'>+		kfree(td);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (blk_queue_nonrot(q))</div><div class='add'>+		td-&gt;throtl_slice = DFL_THROTL_SLICE_SSD;</div><div class='add'>+	else</div><div class='add'>+		td-&gt;throtl_slice = DFL_THROTL_SLICE_HD;</div><div class='add'>+	td-&gt;track_bio_latency = !queue_is_mq(q);</div><div class='add'>+	if (!td-&gt;track_bio_latency)</div><div class='add'>+		blk_stat_enable_accounting(q);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	blk_mq_unquiesce_queue(disk-&gt;queue);</div><div class='add'>+	blk_mq_unfreeze_queue(disk-&gt;queue);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static ssize_t tg_set_conf(struct kernfs_open_file *of,</div><div class='ctx'> 			   char *buf, size_t nbytes, loff_t off, bool is_u64)</div><div class='ctx'> {</div><div class='hunk'>@@ -1378,6 +1269,16 @@ static ssize_t tg_set_conf(struct kernfs_open_file *of,</div><div class='ctx'> </div><div class='ctx'> 	blkg_conf_init(&amp;ctx, buf);</div><div class='ctx'> </div><div class='add'>+	ret = blkg_conf_open_bdev(&amp;ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_finish;</div><div class='add'>+</div><div class='add'>+	if (!blk_throtl_activated(ctx.bdev-&gt;bd_queue)) {</div><div class='add'>+		ret = blk_throtl_init(ctx.bdev-&gt;bd_disk);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_finish;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = blkg_conf_prep(blkcg, &amp;blkcg_policy_throtl, &amp;ctx);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_finish;</div><div class='hunk'>@@ -1444,25 +1345,25 @@ static int tg_print_rwstat_recursive(struct seq_file *sf, void *v)</div><div class='ctx'> static struct cftype throtl_legacy_files[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "throttle.read_bps_device",</div><div class='del'>-		.private = offsetof(struct throtl_grp, bps[READ][LIMIT_MAX]),</div><div class='add'>+		.private = offsetof(struct throtl_grp, bps[READ]),</div><div class='ctx'> 		.seq_show = tg_print_conf_u64,</div><div class='ctx'> 		.write = tg_set_conf_u64,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "throttle.write_bps_device",</div><div class='del'>-		.private = offsetof(struct throtl_grp, bps[WRITE][LIMIT_MAX]),</div><div class='add'>+		.private = offsetof(struct throtl_grp, bps[WRITE]),</div><div class='ctx'> 		.seq_show = tg_print_conf_u64,</div><div class='ctx'> 		.write = tg_set_conf_u64,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "throttle.read_iops_device",</div><div class='del'>-		.private = offsetof(struct throtl_grp, iops[READ][LIMIT_MAX]),</div><div class='add'>+		.private = offsetof(struct throtl_grp, iops[READ]),</div><div class='ctx'> 		.seq_show = tg_print_conf_uint,</div><div class='ctx'> 		.write = tg_set_conf_uint,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "throttle.write_iops_device",</div><div class='del'>-		.private = offsetof(struct throtl_grp, iops[WRITE][LIMIT_MAX]),</div><div class='add'>+		.private = offsetof(struct throtl_grp, iops[WRITE]),</div><div class='ctx'> 		.seq_show = tg_print_conf_uint,</div><div class='ctx'> 		.write = tg_set_conf_uint,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1494,61 +1395,43 @@ static u64 tg_prfill_limit(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='ctx'> {</div><div class='ctx'> 	struct throtl_grp *tg = pd_to_tg(pd);</div><div class='ctx'> 	const char *dname = blkg_dev_name(pd-&gt;blkg);</div><div class='del'>-	char bufs[4][21] = { "max", "max", "max", "max" };</div><div class='ctx'> 	u64 bps_dft;</div><div class='ctx'> 	unsigned int iops_dft;</div><div class='del'>-	char idle_time[26] = "";</div><div class='del'>-	char latency_time[26] = "";</div><div class='ctx'> </div><div class='ctx'> 	if (!dname)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (off == LIMIT_LOW) {</div><div class='del'>-		bps_dft = 0;</div><div class='del'>-		iops_dft = 0;</div><div class='del'>-	} else {</div><div class='del'>-		bps_dft = U64_MAX;</div><div class='del'>-		iops_dft = UINT_MAX;</div><div class='del'>-	}</div><div class='add'>+	bps_dft = U64_MAX;</div><div class='add'>+	iops_dft = UINT_MAX;</div><div class='ctx'> </div><div class='del'>-	if (tg-&gt;bps_conf[READ][off] == bps_dft &amp;&amp;</div><div class='del'>-	    tg-&gt;bps_conf[WRITE][off] == bps_dft &amp;&amp;</div><div class='del'>-	    tg-&gt;iops_conf[READ][off] == iops_dft &amp;&amp;</div><div class='del'>-	    tg-&gt;iops_conf[WRITE][off] == iops_dft &amp;&amp;</div><div class='del'>-	    (off != LIMIT_LOW ||</div><div class='del'>-	     (tg-&gt;idletime_threshold_conf == DFL_IDLE_THRESHOLD &amp;&amp;</div><div class='del'>-	      tg-&gt;latency_target_conf == DFL_LATENCY_TARGET)))</div><div class='add'>+	if (tg-&gt;bps_conf[READ] == bps_dft &amp;&amp;</div><div class='add'>+	    tg-&gt;bps_conf[WRITE] == bps_dft &amp;&amp;</div><div class='add'>+	    tg-&gt;iops_conf[READ] == iops_dft &amp;&amp;</div><div class='add'>+	    tg-&gt;iops_conf[WRITE] == iops_dft)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (tg-&gt;bps_conf[READ][off] != U64_MAX)</div><div class='del'>-		snprintf(bufs[0], sizeof(bufs[0]), "%llu",</div><div class='del'>-			tg-&gt;bps_conf[READ][off]);</div><div class='del'>-	if (tg-&gt;bps_conf[WRITE][off] != U64_MAX)</div><div class='del'>-		snprintf(bufs[1], sizeof(bufs[1]), "%llu",</div><div class='del'>-			tg-&gt;bps_conf[WRITE][off]);</div><div class='del'>-	if (tg-&gt;iops_conf[READ][off] != UINT_MAX)</div><div class='del'>-		snprintf(bufs[2], sizeof(bufs[2]), "%u",</div><div class='del'>-			tg-&gt;iops_conf[READ][off]);</div><div class='del'>-	if (tg-&gt;iops_conf[WRITE][off] != UINT_MAX)</div><div class='del'>-		snprintf(bufs[3], sizeof(bufs[3]), "%u",</div><div class='del'>-			tg-&gt;iops_conf[WRITE][off]);</div><div class='del'>-	if (off == LIMIT_LOW) {</div><div class='del'>-		if (tg-&gt;idletime_threshold_conf == ULONG_MAX)</div><div class='del'>-			strcpy(idle_time, " idle=max");</div><div class='del'>-		else</div><div class='del'>-			snprintf(idle_time, sizeof(idle_time), " idle=%lu",</div><div class='del'>-				tg-&gt;idletime_threshold_conf);</div><div class='add'>+	seq_printf(sf, "%s", dname);</div><div class='add'>+	if (tg-&gt;bps_conf[READ] == U64_MAX)</div><div class='add'>+		seq_printf(sf, " rbps=max");</div><div class='add'>+	else</div><div class='add'>+		seq_printf(sf, " rbps=%llu", tg-&gt;bps_conf[READ]);</div><div class='ctx'> </div><div class='del'>-		if (tg-&gt;latency_target_conf == ULONG_MAX)</div><div class='del'>-			strcpy(latency_time, " latency=max");</div><div class='del'>-		else</div><div class='del'>-			snprintf(latency_time, sizeof(latency_time),</div><div class='del'>-				" latency=%lu", tg-&gt;latency_target_conf);</div><div class='del'>-	}</div><div class='add'>+	if (tg-&gt;bps_conf[WRITE] == U64_MAX)</div><div class='add'>+		seq_printf(sf, " wbps=max");</div><div class='add'>+	else</div><div class='add'>+		seq_printf(sf, " wbps=%llu", tg-&gt;bps_conf[WRITE]);</div><div class='add'>+</div><div class='add'>+	if (tg-&gt;iops_conf[READ] == UINT_MAX)</div><div class='add'>+		seq_printf(sf, " riops=max");</div><div class='add'>+	else</div><div class='add'>+		seq_printf(sf, " riops=%u", tg-&gt;iops_conf[READ]);</div><div class='ctx'> </div><div class='del'>-	seq_printf(sf, "%s rbps=%s wbps=%s riops=%s wiops=%s%s%s\n",</div><div class='del'>-		   dname, bufs[0], bufs[1], bufs[2], bufs[3], idle_time,</div><div class='del'>-		   latency_time);</div><div class='add'>+	if (tg-&gt;iops_conf[WRITE] == UINT_MAX)</div><div class='add'>+		seq_printf(sf, " wiops=max");</div><div class='add'>+	else</div><div class='add'>+		seq_printf(sf, " wiops=%u", tg-&gt;iops_conf[WRITE]);</div><div class='add'>+</div><div class='add'>+	seq_printf(sf, "\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1566,13 +1449,20 @@ static ssize_t tg_set_limit(struct kernfs_open_file *of,</div><div class='ctx'> 	struct blkg_conf_ctx ctx;</div><div class='ctx'> 	struct throtl_grp *tg;</div><div class='ctx'> 	u64 v[4];</div><div class='del'>-	unsigned long idle_time;</div><div class='del'>-	unsigned long latency_time;</div><div class='ctx'> 	int ret;</div><div class='del'>-	int index = of_cft(of)-&gt;private;</div><div class='ctx'> </div><div class='ctx'> 	blkg_conf_init(&amp;ctx, buf);</div><div class='ctx'> </div><div class='add'>+	ret = blkg_conf_open_bdev(&amp;ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_finish;</div><div class='add'>+</div><div class='add'>+	if (!blk_throtl_activated(ctx.bdev-&gt;bd_queue)) {</div><div class='add'>+		ret = blk_throtl_init(ctx.bdev-&gt;bd_disk);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_finish;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = blkg_conf_prep(blkcg, &amp;blkcg_policy_throtl, &amp;ctx);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_finish;</div><div class='hunk'>@@ -1580,13 +1470,11 @@ static ssize_t tg_set_limit(struct kernfs_open_file *of,</div><div class='ctx'> 	tg = blkg_to_tg(ctx.blkg);</div><div class='ctx'> 	tg_update_carryover(tg);</div><div class='ctx'> </div><div class='del'>-	v[0] = tg-&gt;bps_conf[READ][index];</div><div class='del'>-	v[1] = tg-&gt;bps_conf[WRITE][index];</div><div class='del'>-	v[2] = tg-&gt;iops_conf[READ][index];</div><div class='del'>-	v[3] = tg-&gt;iops_conf[WRITE][index];</div><div class='add'>+	v[0] = tg-&gt;bps[READ];</div><div class='add'>+	v[1] = tg-&gt;bps[WRITE];</div><div class='add'>+	v[2] = tg-&gt;iops[READ];</div><div class='add'>+	v[3] = tg-&gt;iops[WRITE];</div><div class='ctx'> </div><div class='del'>-	idle_time = tg-&gt;idletime_threshold_conf;</div><div class='del'>-	latency_time = tg-&gt;latency_target_conf;</div><div class='ctx'> 	while (true) {</div><div class='ctx'> 		char tok[27];	/* wiops=18446744073709551616 */</div><div class='ctx'> 		char *p;</div><div class='hunk'>@@ -1618,60 +1506,16 @@ static ssize_t tg_set_limit(struct kernfs_open_file *of,</div><div class='ctx'> 			v[2] = min_t(u64, val, UINT_MAX);</div><div class='ctx'> 		else if (!strcmp(tok, "wiops") &amp;&amp; val &gt; 1)</div><div class='ctx'> 			v[3] = min_t(u64, val, UINT_MAX);</div><div class='del'>-		else if (off == LIMIT_LOW &amp;&amp; !strcmp(tok, "idle"))</div><div class='del'>-			idle_time = val;</div><div class='del'>-		else if (off == LIMIT_LOW &amp;&amp; !strcmp(tok, "latency"))</div><div class='del'>-			latency_time = val;</div><div class='ctx'> 		else</div><div class='ctx'> 			goto out_finish;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tg-&gt;bps_conf[READ][index] = v[0];</div><div class='del'>-	tg-&gt;bps_conf[WRITE][index] = v[1];</div><div class='del'>-	tg-&gt;iops_conf[READ][index] = v[2];</div><div class='del'>-	tg-&gt;iops_conf[WRITE][index] = v[3];</div><div class='add'>+	tg-&gt;bps[READ] = v[0];</div><div class='add'>+	tg-&gt;bps[WRITE] = v[1];</div><div class='add'>+	tg-&gt;iops[READ] = v[2];</div><div class='add'>+	tg-&gt;iops[WRITE] = v[3];</div><div class='ctx'> </div><div class='del'>-	if (index == LIMIT_MAX) {</div><div class='del'>-		tg-&gt;bps[READ][index] = v[0];</div><div class='del'>-		tg-&gt;bps[WRITE][index] = v[1];</div><div class='del'>-		tg-&gt;iops[READ][index] = v[2];</div><div class='del'>-		tg-&gt;iops[WRITE][index] = v[3];</div><div class='del'>-	}</div><div class='del'>-	tg-&gt;bps[READ][LIMIT_LOW] = min(tg-&gt;bps_conf[READ][LIMIT_LOW],</div><div class='del'>-		tg-&gt;bps_conf[READ][LIMIT_MAX]);</div><div class='del'>-	tg-&gt;bps[WRITE][LIMIT_LOW] = min(tg-&gt;bps_conf[WRITE][LIMIT_LOW],</div><div class='del'>-		tg-&gt;bps_conf[WRITE][LIMIT_MAX]);</div><div class='del'>-	tg-&gt;iops[READ][LIMIT_LOW] = min(tg-&gt;iops_conf[READ][LIMIT_LOW],</div><div class='del'>-		tg-&gt;iops_conf[READ][LIMIT_MAX]);</div><div class='del'>-	tg-&gt;iops[WRITE][LIMIT_LOW] = min(tg-&gt;iops_conf[WRITE][LIMIT_LOW],</div><div class='del'>-		tg-&gt;iops_conf[WRITE][LIMIT_MAX]);</div><div class='del'>-	tg-&gt;idletime_threshold_conf = idle_time;</div><div class='del'>-	tg-&gt;latency_target_conf = latency_time;</div><div class='del'>-</div><div class='del'>-	/* force user to configure all settings for low limit  */</div><div class='del'>-	if (!(tg-&gt;bps[READ][LIMIT_LOW] || tg-&gt;iops[READ][LIMIT_LOW] ||</div><div class='del'>-	      tg-&gt;bps[WRITE][LIMIT_LOW] || tg-&gt;iops[WRITE][LIMIT_LOW]) ||</div><div class='del'>-	    tg-&gt;idletime_threshold_conf == DFL_IDLE_THRESHOLD ||</div><div class='del'>-	    tg-&gt;latency_target_conf == DFL_LATENCY_TARGET) {</div><div class='del'>-		tg-&gt;bps[READ][LIMIT_LOW] = 0;</div><div class='del'>-		tg-&gt;bps[WRITE][LIMIT_LOW] = 0;</div><div class='del'>-		tg-&gt;iops[READ][LIMIT_LOW] = 0;</div><div class='del'>-		tg-&gt;iops[WRITE][LIMIT_LOW] = 0;</div><div class='del'>-		tg-&gt;idletime_threshold = DFL_IDLE_THRESHOLD;</div><div class='del'>-		tg-&gt;latency_target = DFL_LATENCY_TARGET;</div><div class='del'>-	} else if (index == LIMIT_LOW) {</div><div class='del'>-		tg-&gt;idletime_threshold = tg-&gt;idletime_threshold_conf;</div><div class='del'>-		tg-&gt;latency_target = tg-&gt;latency_target_conf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	blk_throtl_update_limit_valid(tg-&gt;td);</div><div class='del'>-	if (tg-&gt;td-&gt;limit_valid[LIMIT_LOW]) {</div><div class='del'>-		if (index == LIMIT_LOW)</div><div class='del'>-			tg-&gt;td-&gt;limit_index = LIMIT_LOW;</div><div class='del'>-	} else</div><div class='del'>-		tg-&gt;td-&gt;limit_index = LIMIT_MAX;</div><div class='del'>-	tg_conf_updated(tg, index == LIMIT_LOW &amp;&amp;</div><div class='del'>-		tg-&gt;td-&gt;limit_valid[LIMIT_LOW]);</div><div class='add'>+	tg_conf_updated(tg, false);</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> out_finish:</div><div class='ctx'> 	blkg_conf_exit(&amp;ctx);</div><div class='hunk'>@@ -1679,21 +1523,11 @@ out_finish:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct cftype throtl_files[] = {</div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-	{</div><div class='del'>-		.name = "low",</div><div class='del'>-		.flags = CFTYPE_NOT_ON_ROOT,</div><div class='del'>-		.seq_show = tg_print_limit,</div><div class='del'>-		.write = tg_set_limit,</div><div class='del'>-		.private = LIMIT_LOW,</div><div class='del'>-	},</div><div class='del'>-#endif</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "max",</div><div class='ctx'> 		.flags = CFTYPE_NOT_ON_ROOT,</div><div class='ctx'> 		.seq_show = tg_print_limit,</div><div class='ctx'> 		.write = tg_set_limit,</div><div class='del'>-		.private = LIMIT_MAX,</div><div class='ctx'> 	},</div><div class='ctx'> 	{ }	/* terminate */</div><div class='ctx'> };</div><div class='hunk'>@@ -1712,7 +1546,6 @@ struct blkcg_policy blkcg_policy_throtl = {</div><div class='ctx'> 	.pd_alloc_fn		= throtl_pd_alloc,</div><div class='ctx'> 	.pd_init_fn		= throtl_pd_init,</div><div class='ctx'> 	.pd_online_fn		= throtl_pd_online,</div><div class='del'>-	.pd_offline_fn		= throtl_pd_offline,</div><div class='ctx'> 	.pd_free_fn		= throtl_pd_free,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1722,6 +1555,9 @@ void blk_throtl_cancel_bios(struct gendisk *disk)</div><div class='ctx'> 	struct cgroup_subsys_state *pos_css;</div><div class='ctx'> 	struct blkcg_gq *blkg;</div><div class='ctx'> </div><div class='add'>+	if (!blk_throtl_activated(q))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irq(&amp;q-&gt;queue_lock);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * queue_lock is held, rcu lock is not needed here technically.</div><div class='hunk'>@@ -1761,418 +1597,6 @@ void blk_throtl_cancel_bios(struct gendisk *disk)</div><div class='ctx'> 	spin_unlock_irq(&amp;q-&gt;queue_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-static unsigned long __tg_last_low_overflow_time(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	unsigned long rtime = jiffies, wtime = jiffies;</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;bps[READ][LIMIT_LOW] || tg-&gt;iops[READ][LIMIT_LOW])</div><div class='del'>-		rtime = tg-&gt;last_low_overflow_time[READ];</div><div class='del'>-	if (tg-&gt;bps[WRITE][LIMIT_LOW] || tg-&gt;iops[WRITE][LIMIT_LOW])</div><div class='del'>-		wtime = tg-&gt;last_low_overflow_time[WRITE];</div><div class='del'>-	return min(rtime, wtime);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long tg_last_low_overflow_time(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	struct throtl_service_queue *parent_sq;</div><div class='del'>-	struct throtl_grp *parent = tg;</div><div class='del'>-	unsigned long ret = __tg_last_low_overflow_time(tg);</div><div class='del'>-</div><div class='del'>-	while (true) {</div><div class='del'>-		parent_sq = parent-&gt;service_queue.parent_sq;</div><div class='del'>-		parent = sq_to_tg(parent_sq);</div><div class='del'>-		if (!parent)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The parent doesn't have low limit, it always reaches low</div><div class='del'>-		 * limit. Its overflow time is useless for children</div><div class='del'>-		 */</div><div class='del'>-		if (!parent-&gt;bps[READ][LIMIT_LOW] &amp;&amp;</div><div class='del'>-		    !parent-&gt;iops[READ][LIMIT_LOW] &amp;&amp;</div><div class='del'>-		    !parent-&gt;bps[WRITE][LIMIT_LOW] &amp;&amp;</div><div class='del'>-		    !parent-&gt;iops[WRITE][LIMIT_LOW])</div><div class='del'>-			continue;</div><div class='del'>-		if (time_after(__tg_last_low_overflow_time(parent), ret))</div><div class='del'>-			ret = __tg_last_low_overflow_time(parent);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_tg_is_idle(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * cgroup is idle if:</div><div class='del'>-	 * - single idle is too long, longer than a fixed value (in case user</div><div class='del'>-	 *   configure a too big threshold) or 4 times of idletime threshold</div><div class='del'>-	 * - average think time is more than threshold</div><div class='del'>-	 * - IO latency is largely below threshold</div><div class='del'>-	 */</div><div class='del'>-	unsigned long time;</div><div class='del'>-	bool ret;</div><div class='del'>-</div><div class='del'>-	time = min_t(unsigned long, MAX_IDLE_TIME, 4 * tg-&gt;idletime_threshold);</div><div class='del'>-	ret = tg-&gt;latency_target == DFL_LATENCY_TARGET ||</div><div class='del'>-	      tg-&gt;idletime_threshold == DFL_IDLE_THRESHOLD ||</div><div class='del'>-	      (blk_time_get_ns() &gt;&gt; 10) - tg-&gt;last_finish_time &gt; time ||</div><div class='del'>-	      tg-&gt;avg_idletime &gt; tg-&gt;idletime_threshold ||</div><div class='del'>-	      (tg-&gt;latency_target &amp;&amp; tg-&gt;bio_cnt &amp;&amp;</div><div class='del'>-		tg-&gt;bad_bio_cnt * 5 &lt; tg-&gt;bio_cnt);</div><div class='del'>-	throtl_log(&amp;tg-&gt;service_queue,</div><div class='del'>-		"avg_idle=%ld, idle_threshold=%ld, bad_bio=%d, total_bio=%d, is_idle=%d, scale=%d",</div><div class='del'>-		tg-&gt;avg_idletime, tg-&gt;idletime_threshold, tg-&gt;bad_bio_cnt,</div><div class='del'>-		tg-&gt;bio_cnt, ret, tg-&gt;td-&gt;scale);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_low_limit_reached(struct throtl_grp *tg, int rw)</div><div class='del'>-{</div><div class='del'>-	struct throtl_service_queue *sq = &amp;tg-&gt;service_queue;</div><div class='del'>-	bool limit = tg-&gt;bps[rw][LIMIT_LOW] || tg-&gt;iops[rw][LIMIT_LOW];</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * if low limit is zero, low limit is always reached.</div><div class='del'>-	 * if low limit is non-zero, we can check if there is any request</div><div class='del'>-	 * is queued to determine if low limit is reached as we throttle</div><div class='del'>-	 * request according to limit.</div><div class='del'>-	 */</div><div class='del'>-	return !limit || sq-&gt;nr_queued[rw];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_tg_can_upgrade(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * cgroup reaches low limit when low limit of READ and WRITE are</div><div class='del'>-	 * both reached, it's ok to upgrade to next limit if cgroup reaches</div><div class='del'>-	 * low limit</div><div class='del'>-	 */</div><div class='del'>-	if (throtl_low_limit_reached(tg, READ) &amp;&amp;</div><div class='del'>-	    throtl_low_limit_reached(tg, WRITE))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	if (time_after_eq(jiffies,</div><div class='del'>-		tg_last_low_overflow_time(tg) + tg-&gt;td-&gt;throtl_slice) &amp;&amp;</div><div class='del'>-	    throtl_tg_is_idle(tg))</div><div class='del'>-		return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_hierarchy_can_upgrade(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	while (true) {</div><div class='del'>-		if (throtl_tg_can_upgrade(tg))</div><div class='del'>-			return true;</div><div class='del'>-		tg = sq_to_tg(tg-&gt;service_queue.parent_sq);</div><div class='del'>-		if (!tg || !tg_to_blkg(tg)-&gt;parent)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_can_upgrade(struct throtl_data *td,</div><div class='del'>-	struct throtl_grp *this_tg)</div><div class='del'>-{</div><div class='del'>-	struct cgroup_subsys_state *pos_css;</div><div class='del'>-	struct blkcg_gq *blkg;</div><div class='del'>-</div><div class='del'>-	if (td-&gt;limit_index != LIMIT_LOW)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (time_before(jiffies, td-&gt;low_downgrade_time + td-&gt;throtl_slice))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkg_for_each_descendant_post(blkg, pos_css, td-&gt;queue-&gt;root_blkg) {</div><div class='del'>-		struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='del'>-</div><div class='del'>-		if (tg == this_tg)</div><div class='del'>-			continue;</div><div class='del'>-		if (!list_empty(&amp;tg_to_blkg(tg)-&gt;blkcg-&gt;css.children))</div><div class='del'>-			continue;</div><div class='del'>-		if (!throtl_hierarchy_can_upgrade(tg)) {</div><div class='del'>-			rcu_read_unlock();</div><div class='del'>-			return false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_upgrade_check(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	unsigned long now = jiffies;</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;td-&gt;limit_index != LIMIT_LOW)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (time_after(tg-&gt;last_check_time + tg-&gt;td-&gt;throtl_slice, now))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	tg-&gt;last_check_time = now;</div><div class='del'>-</div><div class='del'>-	if (!time_after_eq(now,</div><div class='del'>-	     __tg_last_low_overflow_time(tg) + tg-&gt;td-&gt;throtl_slice))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (throtl_can_upgrade(tg-&gt;td, NULL))</div><div class='del'>-		throtl_upgrade_state(tg-&gt;td);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_upgrade_state(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-	struct cgroup_subsys_state *pos_css;</div><div class='del'>-	struct blkcg_gq *blkg;</div><div class='del'>-</div><div class='del'>-	throtl_log(&amp;td-&gt;service_queue, "upgrade to max");</div><div class='del'>-	td-&gt;limit_index = LIMIT_MAX;</div><div class='del'>-	td-&gt;low_upgrade_time = jiffies;</div><div class='del'>-	td-&gt;scale = 0;</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkg_for_each_descendant_post(blkg, pos_css, td-&gt;queue-&gt;root_blkg) {</div><div class='del'>-		struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='del'>-		struct throtl_service_queue *sq = &amp;tg-&gt;service_queue;</div><div class='del'>-</div><div class='del'>-		tg-&gt;disptime = jiffies - 1;</div><div class='del'>-		throtl_select_dispatch(sq);</div><div class='del'>-		throtl_schedule_next_dispatch(sq, true);</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	throtl_select_dispatch(&amp;td-&gt;service_queue);</div><div class='del'>-	throtl_schedule_next_dispatch(&amp;td-&gt;service_queue, true);</div><div class='del'>-	queue_work(kthrotld_workqueue, &amp;td-&gt;dispatch_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_downgrade_state(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-	td-&gt;scale /= 2;</div><div class='del'>-</div><div class='del'>-	throtl_log(&amp;td-&gt;service_queue, "downgrade, scale %d", td-&gt;scale);</div><div class='del'>-	if (td-&gt;scale) {</div><div class='del'>-		td-&gt;low_upgrade_time = jiffies - td-&gt;scale * td-&gt;throtl_slice;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	td-&gt;limit_index = LIMIT_LOW;</div><div class='del'>-	td-&gt;low_downgrade_time = jiffies;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_tg_can_downgrade(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	struct throtl_data *td = tg-&gt;td;</div><div class='del'>-	unsigned long now = jiffies;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If cgroup is below low limit, consider downgrade and throttle other</div><div class='del'>-	 * cgroups</div><div class='del'>-	 */</div><div class='del'>-	if (time_after_eq(now, tg_last_low_overflow_time(tg) +</div><div class='del'>-					td-&gt;throtl_slice) &amp;&amp;</div><div class='del'>-	    (!throtl_tg_is_idle(tg) ||</div><div class='del'>-	     !list_empty(&amp;tg_to_blkg(tg)-&gt;blkcg-&gt;css.children)))</div><div class='del'>-		return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_hierarchy_can_downgrade(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	struct throtl_data *td = tg-&gt;td;</div><div class='del'>-</div><div class='del'>-	if (time_before(jiffies, td-&gt;low_upgrade_time + td-&gt;throtl_slice))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	while (true) {</div><div class='del'>-		if (!throtl_tg_can_downgrade(tg))</div><div class='del'>-			return false;</div><div class='del'>-		tg = sq_to_tg(tg-&gt;service_queue.parent_sq);</div><div class='del'>-		if (!tg || !tg_to_blkg(tg)-&gt;parent)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_downgrade_check(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	uint64_t bps;</div><div class='del'>-	unsigned int iops;</div><div class='del'>-	unsigned long elapsed_time;</div><div class='del'>-	unsigned long now = jiffies;</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;td-&gt;limit_index != LIMIT_MAX ||</div><div class='del'>-	    !tg-&gt;td-&gt;limit_valid[LIMIT_LOW])</div><div class='del'>-		return;</div><div class='del'>-	if (!list_empty(&amp;tg_to_blkg(tg)-&gt;blkcg-&gt;css.children))</div><div class='del'>-		return;</div><div class='del'>-	if (time_after(tg-&gt;last_check_time + tg-&gt;td-&gt;throtl_slice, now))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	elapsed_time = now - tg-&gt;last_check_time;</div><div class='del'>-	tg-&gt;last_check_time = now;</div><div class='del'>-</div><div class='del'>-	if (time_before(now, tg_last_low_overflow_time(tg) +</div><div class='del'>-			tg-&gt;td-&gt;throtl_slice))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;bps[READ][LIMIT_LOW]) {</div><div class='del'>-		bps = tg-&gt;last_bytes_disp[READ] * HZ;</div><div class='del'>-		do_div(bps, elapsed_time);</div><div class='del'>-		if (bps &gt;= tg-&gt;bps[READ][LIMIT_LOW])</div><div class='del'>-			tg-&gt;last_low_overflow_time[READ] = now;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;bps[WRITE][LIMIT_LOW]) {</div><div class='del'>-		bps = tg-&gt;last_bytes_disp[WRITE] * HZ;</div><div class='del'>-		do_div(bps, elapsed_time);</div><div class='del'>-		if (bps &gt;= tg-&gt;bps[WRITE][LIMIT_LOW])</div><div class='del'>-			tg-&gt;last_low_overflow_time[WRITE] = now;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;iops[READ][LIMIT_LOW]) {</div><div class='del'>-		iops = tg-&gt;last_io_disp[READ] * HZ / elapsed_time;</div><div class='del'>-		if (iops &gt;= tg-&gt;iops[READ][LIMIT_LOW])</div><div class='del'>-			tg-&gt;last_low_overflow_time[READ] = now;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;iops[WRITE][LIMIT_LOW]) {</div><div class='del'>-		iops = tg-&gt;last_io_disp[WRITE] * HZ / elapsed_time;</div><div class='del'>-		if (iops &gt;= tg-&gt;iops[WRITE][LIMIT_LOW])</div><div class='del'>-			tg-&gt;last_low_overflow_time[WRITE] = now;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If cgroup is below low limit, consider downgrade and throttle other</div><div class='del'>-	 * cgroups</div><div class='del'>-	 */</div><div class='del'>-	if (throtl_hierarchy_can_downgrade(tg))</div><div class='del'>-		throtl_downgrade_state(tg-&gt;td);</div><div class='del'>-</div><div class='del'>-	tg-&gt;last_bytes_disp[READ] = 0;</div><div class='del'>-	tg-&gt;last_bytes_disp[WRITE] = 0;</div><div class='del'>-	tg-&gt;last_io_disp[READ] = 0;</div><div class='del'>-	tg-&gt;last_io_disp[WRITE] = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void blk_throtl_update_idletime(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	unsigned long now;</div><div class='del'>-	unsigned long last_finish_time = tg-&gt;last_finish_time;</div><div class='del'>-</div><div class='del'>-	if (last_finish_time == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	now = blk_time_get_ns() &gt;&gt; 10;</div><div class='del'>-	if (now &lt;= last_finish_time ||</div><div class='del'>-	    last_finish_time == tg-&gt;checked_last_finish_time)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	tg-&gt;avg_idletime = (tg-&gt;avg_idletime * 7 + now - last_finish_time) &gt;&gt; 3;</div><div class='del'>-	tg-&gt;checked_last_finish_time = last_finish_time;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_update_latency_buckets(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-	struct avg_latency_bucket avg_latency[2][LATENCY_BUCKET_SIZE];</div><div class='del'>-	int i, cpu, rw;</div><div class='del'>-	unsigned long last_latency[2] = { 0 };</div><div class='del'>-	unsigned long latency[2];</div><div class='del'>-</div><div class='del'>-	if (!blk_queue_nonrot(td-&gt;queue) || !td-&gt;limit_valid[LIMIT_LOW])</div><div class='del'>-		return;</div><div class='del'>-	if (time_before(jiffies, td-&gt;last_calculate_time + HZ))</div><div class='del'>-		return;</div><div class='del'>-	td-&gt;last_calculate_time = jiffies;</div><div class='del'>-</div><div class='del'>-	memset(avg_latency, 0, sizeof(avg_latency));</div><div class='del'>-	for (rw = READ; rw &lt;= WRITE; rw++) {</div><div class='del'>-		for (i = 0; i &lt; LATENCY_BUCKET_SIZE; i++) {</div><div class='del'>-			struct latency_bucket *tmp = &amp;td-&gt;tmp_buckets[rw][i];</div><div class='del'>-</div><div class='del'>-			for_each_possible_cpu(cpu) {</div><div class='del'>-				struct latency_bucket *bucket;</div><div class='del'>-</div><div class='del'>-				/* this isn't race free, but ok in practice */</div><div class='del'>-				bucket = per_cpu_ptr(td-&gt;latency_buckets[rw],</div><div class='del'>-					cpu);</div><div class='del'>-				tmp-&gt;total_latency += bucket[i].total_latency;</div><div class='del'>-				tmp-&gt;samples += bucket[i].samples;</div><div class='del'>-				bucket[i].total_latency = 0;</div><div class='del'>-				bucket[i].samples = 0;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (tmp-&gt;samples &gt;= 32) {</div><div class='del'>-				int samples = tmp-&gt;samples;</div><div class='del'>-</div><div class='del'>-				latency[rw] = tmp-&gt;total_latency;</div><div class='del'>-</div><div class='del'>-				tmp-&gt;total_latency = 0;</div><div class='del'>-				tmp-&gt;samples = 0;</div><div class='del'>-				latency[rw] /= samples;</div><div class='del'>-				if (latency[rw] == 0)</div><div class='del'>-					continue;</div><div class='del'>-				avg_latency[rw][i].latency = latency[rw];</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (rw = READ; rw &lt;= WRITE; rw++) {</div><div class='del'>-		for (i = 0; i &lt; LATENCY_BUCKET_SIZE; i++) {</div><div class='del'>-			if (!avg_latency[rw][i].latency) {</div><div class='del'>-				if (td-&gt;avg_buckets[rw][i].latency &lt; last_latency[rw])</div><div class='del'>-					td-&gt;avg_buckets[rw][i].latency =</div><div class='del'>-						last_latency[rw];</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (!td-&gt;avg_buckets[rw][i].valid)</div><div class='del'>-				latency[rw] = avg_latency[rw][i].latency;</div><div class='del'>-			else</div><div class='del'>-				latency[rw] = (td-&gt;avg_buckets[rw][i].latency * 7 +</div><div class='del'>-					avg_latency[rw][i].latency) &gt;&gt; 3;</div><div class='del'>-</div><div class='del'>-			td-&gt;avg_buckets[rw][i].latency = max(latency[rw],</div><div class='del'>-				last_latency[rw]);</div><div class='del'>-			td-&gt;avg_buckets[rw][i].valid = true;</div><div class='del'>-			last_latency[rw] = td-&gt;avg_buckets[rw][i].latency;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; LATENCY_BUCKET_SIZE; i++)</div><div class='del'>-		throtl_log(&amp;td-&gt;service_queue,</div><div class='del'>-			"Latency bucket %d: read latency=%ld, read valid=%d, "</div><div class='del'>-			"write latency=%ld, write valid=%d", i,</div><div class='del'>-			td-&gt;avg_buckets[READ][i].latency,</div><div class='del'>-			td-&gt;avg_buckets[READ][i].valid,</div><div class='del'>-			td-&gt;avg_buckets[WRITE][i].latency,</div><div class='del'>-			td-&gt;avg_buckets[WRITE][i].valid);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void throtl_update_latency_buckets(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void blk_throtl_update_idletime(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_downgrade_check(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_upgrade_check(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool throtl_can_upgrade(struct throtl_data *td,</div><div class='del'>-	struct throtl_grp *this_tg)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_upgrade_state(struct throtl_data *td)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> bool __blk_throtl_bio(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = bdev_get_queue(bio-&gt;bi_bdev);</div><div class='hunk'>@@ -2185,21 +1609,12 @@ bool __blk_throtl_bio(struct bio *bio)</div><div class='ctx'> 	struct throtl_data *td = tg-&gt;td;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irq(&amp;q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	throtl_update_latency_buckets(td);</div><div class='del'>-</div><div class='del'>-	blk_throtl_update_idletime(tg);</div><div class='del'>-</div><div class='ctx'> 	sq = &amp;tg-&gt;service_queue;</div><div class='ctx'> </div><div class='del'>-again:</div><div class='ctx'> 	while (true) {</div><div class='ctx'> 		if (tg-&gt;last_low_overflow_time[rw] == 0)</div><div class='ctx'> 			tg-&gt;last_low_overflow_time[rw] = jiffies;</div><div class='del'>-		throtl_downgrade_check(tg);</div><div class='del'>-		throtl_upgrade_check(tg);</div><div class='ctx'> 		/* throtl is FIFO - if bios are already queued, should queue */</div><div class='ctx'> 		if (sq-&gt;nr_queued[rw])</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -2207,10 +1622,6 @@ again:</div><div class='ctx'> 		/* if above limits, break to queue */</div><div class='ctx'> 		if (!tg_may_dispatch(tg, bio, NULL)) {</div><div class='ctx'> 			tg-&gt;last_low_overflow_time[rw] = jiffies;</div><div class='del'>-			if (throtl_can_upgrade(td, tg)) {</div><div class='del'>-				throtl_upgrade_state(td);</div><div class='del'>-				goto again;</div><div class='del'>-			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2270,215 +1681,25 @@ again:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-	if (throttled || !td-&gt;track_bio_latency)</div><div class='del'>-		bio-&gt;bi_issue.value |= BIO_ISSUE_THROTL_SKIP_LATENCY;</div><div class='del'>-#endif</div><div class='ctx'> 	spin_unlock_irq(&amp;q-&gt;queue_lock);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> 	return throttled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-static void throtl_track_latency(struct throtl_data *td, sector_t size,</div><div class='del'>-				 enum req_op op, unsigned long time)</div><div class='del'>-{</div><div class='del'>-	const bool rw = op_is_write(op);</div><div class='del'>-	struct latency_bucket *latency;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	if (!td || td-&gt;limit_index != LIMIT_LOW ||</div><div class='del'>-	    !(op == REQ_OP_READ || op == REQ_OP_WRITE) ||</div><div class='del'>-	    !blk_queue_nonrot(td-&gt;queue))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	index = request_bucket_index(size);</div><div class='del'>-</div><div class='del'>-	latency = get_cpu_ptr(td-&gt;latency_buckets[rw]);</div><div class='del'>-	latency[index].total_latency += time;</div><div class='del'>-	latency[index].samples++;</div><div class='del'>-	put_cpu_ptr(td-&gt;latency_buckets[rw]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void blk_throtl_stat_add(struct request *rq, u64 time_ns)</div><div class='del'>-{</div><div class='del'>-	struct request_queue *q = rq-&gt;q;</div><div class='del'>-	struct throtl_data *td = q-&gt;td;</div><div class='del'>-</div><div class='del'>-	throtl_track_latency(td, blk_rq_stats_sectors(rq), req_op(rq),</div><div class='del'>-			     time_ns &gt;&gt; 10);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void blk_throtl_bio_endio(struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	struct blkcg_gq *blkg;</div><div class='del'>-	struct throtl_grp *tg;</div><div class='del'>-	u64 finish_time_ns;</div><div class='del'>-	unsigned long finish_time;</div><div class='del'>-	unsigned long start_time;</div><div class='del'>-	unsigned long lat;</div><div class='del'>-	int rw = bio_data_dir(bio);</div><div class='del'>-</div><div class='del'>-	blkg = bio-&gt;bi_blkg;</div><div class='del'>-	if (!blkg)</div><div class='del'>-		return;</div><div class='del'>-	tg = blkg_to_tg(blkg);</div><div class='del'>-	if (!tg-&gt;td-&gt;limit_valid[LIMIT_LOW])</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	finish_time_ns = blk_time_get_ns();</div><div class='del'>-	tg-&gt;last_finish_time = finish_time_ns &gt;&gt; 10;</div><div class='del'>-</div><div class='del'>-	start_time = bio_issue_time(&amp;bio-&gt;bi_issue) &gt;&gt; 10;</div><div class='del'>-	finish_time = __bio_issue_time(finish_time_ns) &gt;&gt; 10;</div><div class='del'>-	if (!start_time || finish_time &lt;= start_time)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	lat = finish_time - start_time;</div><div class='del'>-	/* this is only for bio based driver */</div><div class='del'>-	if (!(bio-&gt;bi_issue.value &amp; BIO_ISSUE_THROTL_SKIP_LATENCY))</div><div class='del'>-		throtl_track_latency(tg-&gt;td, bio_issue_size(&amp;bio-&gt;bi_issue),</div><div class='del'>-				     bio_op(bio), lat);</div><div class='del'>-</div><div class='del'>-	if (tg-&gt;latency_target &amp;&amp; lat &gt;= tg-&gt;td-&gt;filtered_latency) {</div><div class='del'>-		int bucket;</div><div class='del'>-		unsigned int threshold;</div><div class='del'>-</div><div class='del'>-		bucket = request_bucket_index(bio_issue_size(&amp;bio-&gt;bi_issue));</div><div class='del'>-		threshold = tg-&gt;td-&gt;avg_buckets[rw][bucket].latency +</div><div class='del'>-			tg-&gt;latency_target;</div><div class='del'>-		if (lat &gt; threshold)</div><div class='del'>-			tg-&gt;bad_bio_cnt++;</div><div class='del'>-		/*</div><div class='del'>-		 * Not race free, could get wrong count, which means cgroups</div><div class='del'>-		 * will be throttled</div><div class='del'>-		 */</div><div class='del'>-		tg-&gt;bio_cnt++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (time_after(jiffies, tg-&gt;bio_cnt_reset_time) || tg-&gt;bio_cnt &gt; 1024) {</div><div class='del'>-		tg-&gt;bio_cnt_reset_time = tg-&gt;td-&gt;throtl_slice + jiffies;</div><div class='del'>-		tg-&gt;bio_cnt /= 2;</div><div class='del'>-		tg-&gt;bad_bio_cnt /= 2;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-int blk_throtl_init(struct gendisk *disk)</div><div class='del'>-{</div><div class='del'>-	struct request_queue *q = disk-&gt;queue;</div><div class='del'>-	struct throtl_data *td;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	td = kzalloc_node(sizeof(*td), GFP_KERNEL, q-&gt;node);</div><div class='del'>-	if (!td)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	td-&gt;latency_buckets[READ] = __alloc_percpu(sizeof(struct latency_bucket) *</div><div class='del'>-		LATENCY_BUCKET_SIZE, __alignof__(u64));</div><div class='del'>-	if (!td-&gt;latency_buckets[READ]) {</div><div class='del'>-		kfree(td);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	td-&gt;latency_buckets[WRITE] = __alloc_percpu(sizeof(struct latency_bucket) *</div><div class='del'>-		LATENCY_BUCKET_SIZE, __alignof__(u64));</div><div class='del'>-	if (!td-&gt;latency_buckets[WRITE]) {</div><div class='del'>-		free_percpu(td-&gt;latency_buckets[READ]);</div><div class='del'>-		kfree(td);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INIT_WORK(&amp;td-&gt;dispatch_work, blk_throtl_dispatch_work_fn);</div><div class='del'>-	throtl_service_queue_init(&amp;td-&gt;service_queue);</div><div class='del'>-</div><div class='del'>-	q-&gt;td = td;</div><div class='del'>-	td-&gt;queue = q;</div><div class='del'>-</div><div class='del'>-	td-&gt;limit_valid[LIMIT_MAX] = true;</div><div class='del'>-	td-&gt;limit_index = LIMIT_MAX;</div><div class='del'>-	td-&gt;low_upgrade_time = jiffies;</div><div class='del'>-	td-&gt;low_downgrade_time = jiffies;</div><div class='del'>-</div><div class='del'>-	/* activate policy */</div><div class='del'>-	ret = blkcg_activate_policy(disk, &amp;blkcg_policy_throtl);</div><div class='del'>-	if (ret) {</div><div class='del'>-		free_percpu(td-&gt;latency_buckets[READ]);</div><div class='del'>-		free_percpu(td-&gt;latency_buckets[WRITE]);</div><div class='del'>-		kfree(td);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void blk_throtl_exit(struct gendisk *disk)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = disk-&gt;queue;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!q-&gt;td);</div><div class='add'>+	if (!blk_throtl_activated(q))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	del_timer_sync(&amp;q-&gt;td-&gt;service_queue.pending_timer);</div><div class='ctx'> 	throtl_shutdown_wq(q);</div><div class='ctx'> 	blkcg_deactivate_policy(disk, &amp;blkcg_policy_throtl);</div><div class='del'>-	free_percpu(q-&gt;td-&gt;latency_buckets[READ]);</div><div class='del'>-	free_percpu(q-&gt;td-&gt;latency_buckets[WRITE]);</div><div class='ctx'> 	kfree(q-&gt;td);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void blk_throtl_register(struct gendisk *disk)</div><div class='del'>-{</div><div class='del'>-	struct request_queue *q = disk-&gt;queue;</div><div class='del'>-	struct throtl_data *td;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	td = q-&gt;td;</div><div class='del'>-	BUG_ON(!td);</div><div class='del'>-</div><div class='del'>-	if (blk_queue_nonrot(q)) {</div><div class='del'>-		td-&gt;throtl_slice = DFL_THROTL_SLICE_SSD;</div><div class='del'>-		td-&gt;filtered_latency = LATENCY_FILTERED_SSD;</div><div class='del'>-	} else {</div><div class='del'>-		td-&gt;throtl_slice = DFL_THROTL_SLICE_HD;</div><div class='del'>-		td-&gt;filtered_latency = LATENCY_FILTERED_HD;</div><div class='del'>-		for (i = 0; i &lt; LATENCY_BUCKET_SIZE; i++) {</div><div class='del'>-			td-&gt;avg_buckets[READ][i].latency = DFL_HD_BASELINE_LATENCY;</div><div class='del'>-			td-&gt;avg_buckets[WRITE][i].latency = DFL_HD_BASELINE_LATENCY;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#ifndef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-	/* if no low limit, use previous default */</div><div class='del'>-	td-&gt;throtl_slice = DFL_THROTL_SLICE_HD;</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-	td-&gt;track_bio_latency = !queue_is_mq(q);</div><div class='del'>-	if (!td-&gt;track_bio_latency)</div><div class='del'>-		blk_stat_enable_accounting(q);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-ssize_t blk_throtl_sample_time_show(struct request_queue *q, char *page)</div><div class='del'>-{</div><div class='del'>-	if (!q-&gt;td)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return sprintf(page, "%u\n", jiffies_to_msecs(q-&gt;td-&gt;throtl_slice));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ssize_t blk_throtl_sample_time_store(struct request_queue *q,</div><div class='del'>-	const char *page, size_t count)</div><div class='del'>-{</div><div class='del'>-	unsigned long v;</div><div class='del'>-	unsigned long t;</div><div class='del'>-</div><div class='del'>-	if (!q-&gt;td)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (kstrtoul(page, 10, &amp;v))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	t = msecs_to_jiffies(v);</div><div class='del'>-	if (t == 0 || t &gt; MAX_THROTL_SLICE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	q-&gt;td-&gt;throtl_slice = t;</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int __init throtl_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	kthrotld_workqueue = alloc_workqueue("kthrotld", WQ_MEM_RECLAIM, 0);</div><div class='head'>diff --git a/block/blk-throttle.h b/block/blk-throttle.h<br/>index bffbc9cfc8ab..393c3d134b96 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-throttle.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-throttle.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-throttle.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-throttle.h</a></div><div class='hunk'>@@ -58,12 +58,6 @@ enum tg_state_flags {</div><div class='ctx'> 	THROTL_TG_CANCELING	= 1 &lt;&lt; 2,	/* starts to cancel bio */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum {</div><div class='del'>-	LIMIT_LOW,</div><div class='del'>-	LIMIT_MAX,</div><div class='del'>-	LIMIT_CNT,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct throtl_grp {</div><div class='ctx'> 	/* must be the first member */</div><div class='ctx'> 	struct blkg_policy_data pd;</div><div class='hunk'>@@ -102,14 +96,14 @@ struct throtl_grp {</div><div class='ctx'> 	bool has_rules_iops[2];</div><div class='ctx'> </div><div class='ctx'> 	/* internally used bytes per second rate limits */</div><div class='del'>-	uint64_t bps[2][LIMIT_CNT];</div><div class='add'>+	uint64_t bps[2];</div><div class='ctx'> 	/* user configured bps limits */</div><div class='del'>-	uint64_t bps_conf[2][LIMIT_CNT];</div><div class='add'>+	uint64_t bps_conf[2];</div><div class='ctx'> </div><div class='ctx'> 	/* internally used IOPS limits */</div><div class='del'>-	unsigned int iops[2][LIMIT_CNT];</div><div class='add'>+	unsigned int iops[2];</div><div class='ctx'> 	/* user configured IOPS limits */</div><div class='del'>-	unsigned int iops_conf[2][LIMIT_CNT];</div><div class='add'>+	unsigned int iops_conf[2];</div><div class='ctx'> </div><div class='ctx'> 	/* Number of bytes dispatched in current slice */</div><div class='ctx'> 	uint64_t bytes_disp[2];</div><div class='hunk'>@@ -132,22 +126,10 @@ struct throtl_grp {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long last_check_time;</div><div class='ctx'> </div><div class='del'>-	unsigned long latency_target; /* us */</div><div class='del'>-	unsigned long latency_target_conf; /* us */</div><div class='ctx'> 	/* When did we start a new slice */</div><div class='ctx'> 	unsigned long slice_start[2];</div><div class='ctx'> 	unsigned long slice_end[2];</div><div class='ctx'> </div><div class='del'>-	unsigned long last_finish_time; /* ns / 1024 */</div><div class='del'>-	unsigned long checked_last_finish_time; /* ns / 1024 */</div><div class='del'>-	unsigned long avg_idletime; /* ns / 1024 */</div><div class='del'>-	unsigned long idletime_threshold; /* us */</div><div class='del'>-	unsigned long idletime_threshold_conf; /* us */</div><div class='del'>-</div><div class='del'>-	unsigned int bio_cnt; /* total bios */</div><div class='del'>-	unsigned int bad_bio_cnt; /* bios exceeding latency threshold */</div><div class='del'>-	unsigned long bio_cnt_reset_time;</div><div class='del'>-</div><div class='ctx'> 	struct blkg_rwstat stat_bytes;</div><div class='ctx'> 	struct blkg_rwstat stat_ios;</div><div class='ctx'> };</div><div class='hunk'>@@ -168,23 +150,33 @@ static inline struct throtl_grp *blkg_to_tg(struct blkcg_gq *blkg)</div><div class='ctx'>  * Internal throttling interface</div><div class='ctx'>  */</div><div class='ctx'> #ifndef CONFIG_BLK_DEV_THROTTLING</div><div class='del'>-static inline int blk_throtl_init(struct gendisk *disk) { return 0; }</div><div class='ctx'> static inline void blk_throtl_exit(struct gendisk *disk) { }</div><div class='del'>-static inline void blk_throtl_register(struct gendisk *disk) { }</div><div class='ctx'> static inline bool blk_throtl_bio(struct bio *bio) { return false; }</div><div class='ctx'> static inline void blk_throtl_cancel_bios(struct gendisk *disk) { }</div><div class='ctx'> #else /* CONFIG_BLK_DEV_THROTTLING */</div><div class='del'>-int blk_throtl_init(struct gendisk *disk);</div><div class='ctx'> void blk_throtl_exit(struct gendisk *disk);</div><div class='del'>-void blk_throtl_register(struct gendisk *disk);</div><div class='ctx'> bool __blk_throtl_bio(struct bio *bio);</div><div class='ctx'> void blk_throtl_cancel_bios(struct gendisk *disk);</div><div class='ctx'> </div><div class='add'>+static inline bool blk_throtl_activated(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	return q-&gt;td != NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool blk_should_throtl(struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_grp *tg = blkg_to_tg(bio-&gt;bi_blkg);</div><div class='add'>+	struct throtl_grp *tg;</div><div class='ctx'> 	int rw = bio_data_dir(bio);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This is called under bio_queue_enter(), and it's synchronized with</div><div class='add'>+	 * the activation of blk-throtl, which is protected by</div><div class='add'>+	 * blk_mq_freeze_queue().</div><div class='add'>+	 */</div><div class='add'>+	if (!blk_throtl_activated(bio-&gt;bi_bdev-&gt;bd_queue))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	tg = blkg_to_tg(bio-&gt;bi_blkg);</div><div class='ctx'> 	if (!cgroup_subsys_on_dfl(io_cgrp_subsys)) {</div><div class='ctx'> 		if (!bio_flagged(bio, BIO_CGROUP_ACCT)) {</div><div class='ctx'> 			bio_set_flag(bio, BIO_CGROUP_ACCT);</div><div class='head'>diff --git a/block/blk-zoned.c b/block/blk-zoned.c<br/>index da0f4b2a8fa0..48e5e3bbb89c 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-zoned.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk-zoned.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-zoned.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk-zoned.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2016, Damien Le Moal</div><div class='ctx'>  * Copyright (c) 2016, Western Digital</div><div class='add'>+ * Copyright (c) 2024, Western Digital Corporation or its affiliates.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -16,8 +17,13 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/sched/mm.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='add'>+#include &lt;linux/mempool.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='add'>+#include "blk-mq-sched.h"</div><div class='add'>+#include "blk-mq-debugfs.h"</div><div class='ctx'> </div><div class='ctx'> #define ZONE_COND_NAME(name) [BLK_ZONE_COND_##name] = #name</div><div class='ctx'> static const char *const zone_cond_name[] = {</div><div class='hunk'>@@ -32,6 +38,64 @@ static const char *const zone_cond_name[] = {</div><div class='ctx'> };</div><div class='ctx'> #undef ZONE_COND_NAME</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Per-zone write plug.</div><div class='add'>+ * @node: hlist_node structure for managing the plug using a hash table.</div><div class='add'>+ * @link: To list the plug in the zone write plug error list of the disk.</div><div class='add'>+ * @ref: Zone write plug reference counter. A zone write plug reference is</div><div class='add'>+ *       always at least 1 when the plug is hashed in the disk plug hash table.</div><div class='add'>+ *       The reference is incremented whenever a new BIO needing plugging is</div><div class='add'>+ *       submitted and when a function needs to manipulate a plug. The</div><div class='add'>+ *       reference count is decremented whenever a plugged BIO completes and</div><div class='add'>+ *       when a function that referenced the plug returns. The initial</div><div class='add'>+ *       reference is dropped whenever the zone of the zone write plug is reset,</div><div class='add'>+ *       finished and when the zone becomes full (last write BIO to the zone</div><div class='add'>+ *       completes).</div><div class='add'>+ * @lock: Spinlock to atomically manipulate the plug.</div><div class='add'>+ * @flags: Flags indicating the plug state.</div><div class='add'>+ * @zone_no: The number of the zone the plug is managing.</div><div class='add'>+ * @wp_offset: The zone write pointer location relative to the start of the zone</div><div class='add'>+ *             as a number of 512B sectors.</div><div class='add'>+ * @bio_list: The list of BIOs that are currently plugged.</div><div class='add'>+ * @bio_work: Work struct to handle issuing of plugged BIOs</div><div class='add'>+ * @rcu_head: RCU head to free zone write plugs with an RCU grace period.</div><div class='add'>+ * @disk: The gendisk the plug belongs to.</div><div class='add'>+ */</div><div class='add'>+struct blk_zone_wplug {</div><div class='add'>+	struct hlist_node	node;</div><div class='add'>+	struct list_head	link;</div><div class='add'>+	atomic_t		ref;</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+	unsigned int		flags;</div><div class='add'>+	unsigned int		zone_no;</div><div class='add'>+	unsigned int		wp_offset;</div><div class='add'>+	struct bio_list		bio_list;</div><div class='add'>+	struct work_struct	bio_work;</div><div class='add'>+	struct rcu_head		rcu_head;</div><div class='add'>+	struct gendisk		*disk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Zone write plug flags bits:</div><div class='add'>+ *  - BLK_ZONE_WPLUG_PLUGGED: Indicates that the zone write plug is plugged,</div><div class='add'>+ *    that is, that write BIOs are being throttled due to a write BIO already</div><div class='add'>+ *    being executed or the zone write plug bio list is not empty.</div><div class='add'>+ *  - BLK_ZONE_WPLUG_ERROR: Indicates that a write error happened which will be</div><div class='add'>+ *    recovered with a report zone to update the zone write pointer offset.</div><div class='add'>+ *  - BLK_ZONE_WPLUG_UNHASHED: Indicates that the zone write plug was removed</div><div class='add'>+ *    from the disk hash table and that the initial reference to the zone</div><div class='add'>+ *    write plug set when the plug was first added to the hash table has been</div><div class='add'>+ *    dropped. This flag is set when a zone is reset, finished or become full,</div><div class='add'>+ *    to prevent new references to the zone write plug to be taken for</div><div class='add'>+ *    newly incoming BIOs. A zone write plug flagged with this flag will be</div><div class='add'>+ *    freed once all remaining references from BIOs or functions are dropped.</div><div class='add'>+ */</div><div class='add'>+#define BLK_ZONE_WPLUG_PLUGGED		(1U &lt;&lt; 0)</div><div class='add'>+#define BLK_ZONE_WPLUG_ERROR		(1U &lt;&lt; 1)</div><div class='add'>+#define BLK_ZONE_WPLUG_UNHASHED		(1U &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#define BLK_ZONE_WPLUG_BUSY	(BLK_ZONE_WPLUG_PLUGGED | BLK_ZONE_WPLUG_ERROR)</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * blk_zone_cond_str - Return string XXX in BLK_ZONE_COND_XXX.</div><div class='ctx'>  * @zone_cond: BLK_ZONE_COND_XXX.</div><div class='hunk'>@@ -51,52 +115,6 @@ const char *blk_zone_cond_str(enum blk_zone_cond zone_cond)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_zone_cond_str);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Return true if a request is a write requests that needs zone write locking.</div><div class='del'>- */</div><div class='del'>-bool blk_req_needs_zone_write_lock(struct request *rq)</div><div class='del'>-{</div><div class='del'>-	if (!rq-&gt;q-&gt;disk-&gt;seq_zones_wlock)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return blk_rq_is_seq_zoned_write(rq);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blk_req_needs_zone_write_lock);</div><div class='del'>-</div><div class='del'>-bool blk_req_zone_write_trylock(struct request *rq)</div><div class='del'>-{</div><div class='del'>-	unsigned int zno = blk_rq_zone_no(rq);</div><div class='del'>-</div><div class='del'>-	if (test_and_set_bit(zno, rq-&gt;q-&gt;disk-&gt;seq_zones_wlock))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(rq-&gt;rq_flags &amp; RQF_ZONE_WRITE_LOCKED);</div><div class='del'>-	rq-&gt;rq_flags |= RQF_ZONE_WRITE_LOCKED;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blk_req_zone_write_trylock);</div><div class='del'>-</div><div class='del'>-void __blk_req_zone_write_lock(struct request *rq)</div><div class='del'>-{</div><div class='del'>-	if (WARN_ON_ONCE(test_and_set_bit(blk_rq_zone_no(rq),</div><div class='del'>-					  rq-&gt;q-&gt;disk-&gt;seq_zones_wlock)))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(rq-&gt;rq_flags &amp; RQF_ZONE_WRITE_LOCKED);</div><div class='del'>-	rq-&gt;rq_flags |= RQF_ZONE_WRITE_LOCKED;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(__blk_req_zone_write_lock);</div><div class='del'>-</div><div class='del'>-void __blk_req_zone_write_unlock(struct request *rq)</div><div class='del'>-{</div><div class='del'>-	rq-&gt;rq_flags &amp;= ~RQF_ZONE_WRITE_LOCKED;</div><div class='del'>-	if (rq-&gt;q-&gt;disk-&gt;seq_zones_wlock)</div><div class='del'>-		WARN_ON_ONCE(!test_and_clear_bit(blk_rq_zone_no(rq),</div><div class='del'>-						 rq-&gt;q-&gt;disk-&gt;seq_zones_wlock));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(__blk_req_zone_write_unlock);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * bdev_nr_zones - Get number of zones</div><div class='ctx'>  * @bdev:	Target device</div><div class='hunk'>@@ -425,23 +443,1288 @@ fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void disk_free_zone_bitmaps(struct gendisk *disk)</div><div class='add'>+static inline bool disk_zone_is_conv(struct gendisk *disk, sector_t sector)</div><div class='add'>+{</div><div class='add'>+	if (!disk-&gt;conv_zones_bitmap)</div><div class='add'>+		return false;</div><div class='add'>+	return test_bit(disk_zone_no(disk, sector), disk-&gt;conv_zones_bitmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool disk_insert_zone_wplug(struct gendisk *disk,</div><div class='add'>+				   struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	struct blk_zone_wplug *zwplg;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int idx =</div><div class='add'>+		hash_32(zwplug-&gt;zone_no, disk-&gt;zone_wplugs_hash_bits);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Add the new zone write plug to the hash table, but carefully as we</div><div class='add'>+	 * are racing with other submission context, so we may already have a</div><div class='add'>+	 * zone write plug for the same zone.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+	hlist_for_each_entry_rcu(zwplg, &amp;disk-&gt;zone_wplugs_hash[idx], node) {</div><div class='add'>+		if (zwplg-&gt;zone_no == zwplug-&gt;zone_no) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	hlist_add_head_rcu(&amp;zwplug-&gt;node, &amp;disk-&gt;zone_wplugs_hash[idx]);</div><div class='add'>+	spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct blk_zone_wplug *disk_get_zone_wplug(struct gendisk *disk,</div><div class='add'>+						  sector_t sector)</div><div class='add'>+{</div><div class='add'>+	unsigned int zno = disk_zone_no(disk, sector);</div><div class='add'>+	unsigned int idx = hash_32(zno, disk-&gt;zone_wplugs_hash_bits);</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_rcu(zwplug, &amp;disk-&gt;zone_wplugs_hash[idx], node) {</div><div class='add'>+		if (zwplug-&gt;zone_no == zno &amp;&amp;</div><div class='add'>+		    atomic_inc_not_zero(&amp;zwplug-&gt;ref)) {</div><div class='add'>+			rcu_read_unlock();</div><div class='add'>+			return zwplug;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disk_free_zone_wplug_rcu(struct rcu_head *rcu_head)</div><div class='ctx'> {</div><div class='add'>+	struct blk_zone_wplug *zwplug =</div><div class='add'>+		container_of(rcu_head, struct blk_zone_wplug, rcu_head);</div><div class='add'>+</div><div class='add'>+	mempool_free(zwplug, zwplug-&gt;disk-&gt;zone_wplugs_pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void disk_put_zone_wplug(struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	if (atomic_dec_and_test(&amp;zwplug-&gt;ref)) {</div><div class='add'>+		WARN_ON_ONCE(!bio_list_empty(&amp;zwplug-&gt;bio_list));</div><div class='add'>+		WARN_ON_ONCE(!list_empty(&amp;zwplug-&gt;link));</div><div class='add'>+		WARN_ON_ONCE(!(zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_UNHASHED));</div><div class='add'>+</div><div class='add'>+		call_rcu(&amp;zwplug-&gt;rcu_head, disk_free_zone_wplug_rcu);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool disk_should_remove_zone_wplug(struct gendisk *disk,</div><div class='add'>+						 struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	/* If the zone write plug was already removed, we are done. */</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_UNHASHED)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* If the zone write plug is still busy, it cannot be removed. */</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_BUSY)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Completions of BIOs with blk_zone_write_plug_bio_endio() may</div><div class='add'>+	 * happen after handling a request completion with</div><div class='add'>+	 * blk_zone_write_plug_finish_request() (e.g. with split BIOs</div><div class='add'>+	 * that are chained). In such case, disk_zone_wplug_unplug_bio()</div><div class='add'>+	 * should not attempt to remove the zone write plug until all BIO</div><div class='add'>+	 * completions are seen. Check by looking at the zone write plug</div><div class='add'>+	 * reference count, which is 2 when the plug is unused (one reference</div><div class='add'>+	 * taken when the plug was allocated and another reference taken by the</div><div class='add'>+	 * caller context).</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_read(&amp;zwplug-&gt;ref) &gt; 2)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* We can remove zone write plugs for zones that are empty or full. */</div><div class='add'>+	return !zwplug-&gt;wp_offset || zwplug-&gt;wp_offset &gt;= disk-&gt;zone_capacity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disk_remove_zone_wplug(struct gendisk *disk,</div><div class='add'>+				   struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* If the zone write plug was already removed, we have nothing to do. */</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_UNHASHED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Mark the zone write plug as unhashed and drop the extra reference we</div><div class='add'>+	 * took when the plug was inserted in the hash table.</div><div class='add'>+	 */</div><div class='add'>+	zwplug-&gt;flags |= BLK_ZONE_WPLUG_UNHASHED;</div><div class='add'>+	spin_lock_irqsave(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+	hlist_del_init_rcu(&amp;zwplug-&gt;node);</div><div class='add'>+	spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blk_zone_wplug_bio_work(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get a reference on the write plug for the zone containing @sector.</div><div class='add'>+ * If the plug does not exist, it is allocated and hashed.</div><div class='add'>+ * Return a pointer to the zone write plug with the plug spinlock held.</div><div class='add'>+ */</div><div class='add'>+static struct blk_zone_wplug *disk_get_and_lock_zone_wplug(struct gendisk *disk,</div><div class='add'>+					sector_t sector, gfp_t gfp_mask,</div><div class='add'>+					unsigned long *flags)</div><div class='add'>+{</div><div class='add'>+	unsigned int zno = disk_zone_no(disk, sector);</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+</div><div class='add'>+again:</div><div class='add'>+	zwplug = disk_get_zone_wplug(disk, sector);</div><div class='add'>+	if (zwplug) {</div><div class='add'>+		/*</div><div class='add'>+		 * Check that a BIO completion or a zone reset or finish</div><div class='add'>+		 * operation has not already removed the zone write plug from</div><div class='add'>+		 * the hash table and dropped its reference count. In such case,</div><div class='add'>+		 * we need to get a new plug so start over from the beginning.</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;zwplug-&gt;lock, *flags);</div><div class='add'>+		if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_UNHASHED) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;zwplug-&gt;lock, *flags);</div><div class='add'>+			disk_put_zone_wplug(zwplug);</div><div class='add'>+			goto again;</div><div class='add'>+		}</div><div class='add'>+		return zwplug;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Allocate and initialize a zone write plug with an extra reference</div><div class='add'>+	 * so that it is not freed when the zone write plug becomes idle without</div><div class='add'>+	 * the zone being full.</div><div class='add'>+	 */</div><div class='add'>+	zwplug = mempool_alloc(disk-&gt;zone_wplugs_pool, gfp_mask);</div><div class='add'>+	if (!zwplug)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	INIT_HLIST_NODE(&amp;zwplug-&gt;node);</div><div class='add'>+	INIT_LIST_HEAD(&amp;zwplug-&gt;link);</div><div class='add'>+	atomic_set(&amp;zwplug-&gt;ref, 2);</div><div class='add'>+	spin_lock_init(&amp;zwplug-&gt;lock);</div><div class='add'>+	zwplug-&gt;flags = 0;</div><div class='add'>+	zwplug-&gt;zone_no = zno;</div><div class='add'>+	zwplug-&gt;wp_offset = sector &amp; (disk-&gt;queue-&gt;limits.chunk_sectors - 1);</div><div class='add'>+	bio_list_init(&amp;zwplug-&gt;bio_list);</div><div class='add'>+	INIT_WORK(&amp;zwplug-&gt;bio_work, blk_zone_wplug_bio_work);</div><div class='add'>+	zwplug-&gt;disk = disk;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, *flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Insert the new zone write plug in the hash table. This can fail only</div><div class='add'>+	 * if another context already inserted a plug. Retry from the beginning</div><div class='add'>+	 * in such case.</div><div class='add'>+	 */</div><div class='add'>+	if (!disk_insert_zone_wplug(disk, zwplug)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, *flags);</div><div class='add'>+		mempool_free(zwplug, disk-&gt;zone_wplugs_pool);</div><div class='add'>+		goto again;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return zwplug;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void blk_zone_wplug_bio_io_error(struct blk_zone_wplug *zwplug,</div><div class='add'>+					       struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	struct request_queue *q = zwplug-&gt;disk-&gt;queue;</div><div class='add'>+</div><div class='add'>+	bio_clear_flag(bio, BIO_ZONE_WRITE_PLUGGING);</div><div class='add'>+	bio_io_error(bio);</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+	blk_queue_exit(q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Abort (fail) all plugged BIOs of a zone write plug.</div><div class='add'>+ */</div><div class='add'>+static void disk_zone_wplug_abort(struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	struct bio *bio;</div><div class='add'>+</div><div class='add'>+	while ((bio = bio_list_pop(&amp;zwplug-&gt;bio_list)))</div><div class='add'>+		blk_zone_wplug_bio_io_error(zwplug, bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Abort (fail) all plugged BIOs of a zone write plug that are not aligned</div><div class='add'>+ * with the assumed write pointer location of the zone when the BIO will</div><div class='add'>+ * be unplugged.</div><div class='add'>+ */</div><div class='add'>+static void disk_zone_wplug_abort_unaligned(struct gendisk *disk,</div><div class='add'>+					    struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	unsigned int zone_capacity = disk-&gt;zone_capacity;</div><div class='add'>+	unsigned int wp_offset = zwplug-&gt;wp_offset;</div><div class='add'>+	struct bio_list bl = BIO_EMPTY_LIST;</div><div class='add'>+	struct bio *bio;</div><div class='add'>+</div><div class='add'>+	while ((bio = bio_list_pop(&amp;zwplug-&gt;bio_list))) {</div><div class='add'>+		if (wp_offset &gt;= zone_capacity ||</div><div class='add'>+		    (bio_op(bio) != REQ_OP_ZONE_APPEND &amp;&amp;</div><div class='add'>+		     bio_offset_from_zone_start(bio) != wp_offset)) {</div><div class='add'>+			blk_zone_wplug_bio_io_error(zwplug, bio);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wp_offset += bio_sectors(bio);</div><div class='add'>+		bio_list_add(&amp;bl, bio);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bio_list_merge(&amp;zwplug-&gt;bio_list, &amp;bl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void disk_zone_wplug_set_error(struct gendisk *disk,</div><div class='add'>+					     struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_ERROR)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * At this point, we already have a reference on the zone write plug.</div><div class='add'>+	 * However, since we are going to add the plug to the disk zone write</div><div class='add'>+	 * plugs work list, increase its reference count. This reference will</div><div class='add'>+	 * be dropped in disk_zone_wplugs_work() once the error state is</div><div class='add'>+	 * handled, or in disk_zone_wplug_clear_error() if the zone is reset or</div><div class='add'>+	 * finished.</div><div class='add'>+	 */</div><div class='add'>+	zwplug-&gt;flags |= BLK_ZONE_WPLUG_ERROR;</div><div class='add'>+	atomic_inc(&amp;zwplug-&gt;ref);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+	list_add_tail(&amp;zwplug-&gt;link, &amp;disk-&gt;zone_wplugs_err_list);</div><div class='add'>+	spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void disk_zone_wplug_clear_error(struct gendisk *disk,</div><div class='add'>+					       struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!(zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_ERROR))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We are racing with the error handling work which drops the reference</div><div class='add'>+	 * on the zone write plug after handling the error state. So remove the</div><div class='add'>+	 * plug from the error list and drop its reference count only if the</div><div class='add'>+	 * error handling has not yet started, that is, if the zone write plug</div><div class='add'>+	 * is still listed.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+	if (!list_empty(&amp;zwplug-&gt;link)) {</div><div class='add'>+		list_del_init(&amp;zwplug-&gt;link);</div><div class='add'>+		zwplug-&gt;flags &amp;= ~BLK_ZONE_WPLUG_ERROR;</div><div class='add'>+		disk_put_zone_wplug(zwplug);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set a zone write plug write pointer offset to either 0 (zone reset case)</div><div class='add'>+ * or to the zone size (zone finish case). This aborts all plugged BIOs, which</div><div class='add'>+ * is fine to do as doing a zone reset or zone finish while writes are in-flight</div><div class='add'>+ * is a mistake from the user which will most likely cause all plugged BIOs to</div><div class='add'>+ * fail anyway.</div><div class='add'>+ */</div><div class='add'>+static void disk_zone_wplug_set_wp_offset(struct gendisk *disk,</div><div class='add'>+					  struct blk_zone_wplug *zwplug,</div><div class='add'>+					  unsigned int wp_offset)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure that a BIO completion or another zone reset or finish</div><div class='add'>+	 * operation has not already removed the plug from the hash table.</div><div class='add'>+	 */</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_UNHASHED) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update the zone write pointer and abort all plugged BIOs. */</div><div class='add'>+	zwplug-&gt;wp_offset = wp_offset;</div><div class='add'>+	disk_zone_wplug_abort(zwplug);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Updating the write pointer offset puts back the zone</div><div class='add'>+	 * in a good state. So clear the error flag and decrement the</div><div class='add'>+	 * error count if we were in error state.</div><div class='add'>+	 */</div><div class='add'>+	disk_zone_wplug_clear_error(disk, zwplug);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The zone write plug now has no BIO plugged: remove it from the</div><div class='add'>+	 * hash table so that it cannot be seen. The plug will be freed</div><div class='add'>+	 * when the last reference is dropped.</div><div class='add'>+	 */</div><div class='add'>+	if (disk_should_remove_zone_wplug(disk, zwplug))</div><div class='add'>+		disk_remove_zone_wplug(disk, zwplug);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool blk_zone_wplug_handle_reset_or_finish(struct bio *bio,</div><div class='add'>+						  unsigned int wp_offset)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = bio-&gt;bi_bdev-&gt;bd_disk;</div><div class='add'>+	sector_t sector = bio-&gt;bi_iter.bi_sector;</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+</div><div class='add'>+	/* Conventional zones cannot be reset nor finished. */</div><div class='add'>+	if (disk_zone_is_conv(disk, sector)) {</div><div class='add'>+		bio_io_error(bio);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we have a zone write plug, set its write pointer offset to 0</div><div class='add'>+	 * (reset case) or to the zone size (finish case). This will abort all</div><div class='add'>+	 * BIOs plugged for the target zone. It is fine as resetting or</div><div class='add'>+	 * finishing zones while writes are still in-flight will result in the</div><div class='add'>+	 * writes failing anyway.</div><div class='add'>+	 */</div><div class='add'>+	zwplug = disk_get_zone_wplug(disk, sector);</div><div class='add'>+	if (zwplug) {</div><div class='add'>+		disk_zone_wplug_set_wp_offset(disk, zwplug, wp_offset);</div><div class='add'>+		disk_put_zone_wplug(zwplug);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool blk_zone_wplug_handle_reset_all(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = bio-&gt;bi_bdev-&gt;bd_disk;</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	sector_t sector;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set the write pointer offset of all zone write plugs to 0. This will</div><div class='add'>+	 * abort all plugged BIOs. It is fine as resetting zones while writes</div><div class='add'>+	 * are still in-flight will result in the writes failing anyway.</div><div class='add'>+	 */</div><div class='add'>+	for (sector = 0; sector &lt; get_capacity(disk);</div><div class='add'>+	     sector += disk-&gt;queue-&gt;limits.chunk_sectors) {</div><div class='add'>+		zwplug = disk_get_zone_wplug(disk, sector);</div><div class='add'>+		if (zwplug) {</div><div class='add'>+			disk_zone_wplug_set_wp_offset(disk, zwplug, 0);</div><div class='add'>+			disk_put_zone_wplug(zwplug);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void blk_zone_wplug_add_bio(struct blk_zone_wplug *zwplug,</div><div class='add'>+					  struct bio *bio, unsigned int nr_segs)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Grab an extra reference on the BIO request queue usage counter.</div><div class='add'>+	 * This reference will be reused to submit a request for the BIO for</div><div class='add'>+	 * blk-mq devices and dropped when the BIO is failed and after</div><div class='add'>+	 * it is issued in the case of BIO-based devices.</div><div class='add'>+	 */</div><div class='add'>+	percpu_ref_get(&amp;bio-&gt;bi_bdev-&gt;bd_disk-&gt;queue-&gt;q_usage_counter);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The BIO is being plugged and thus will have to wait for the on-going</div><div class='add'>+	 * write and for all other writes already plugged. So polling makes</div><div class='add'>+	 * no sense.</div><div class='add'>+	 */</div><div class='add'>+	bio_clear_polled(bio);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reuse the poll cookie field to store the number of segments when</div><div class='add'>+	 * split to the hardware limits.</div><div class='add'>+	 */</div><div class='add'>+	bio-&gt;__bi_nr_segments = nr_segs;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We always receive BIOs after they are split and ready to be issued.</div><div class='add'>+	 * The block layer passes the parts of a split BIO in order, and the</div><div class='add'>+	 * user must also issue write sequentially. So simply add the new BIO</div><div class='add'>+	 * at the tail of the list to preserve the sequential write order.</div><div class='add'>+	 */</div><div class='add'>+	bio_list_add(&amp;zwplug-&gt;bio_list, bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from bio_attempt_back_merge() when a BIO was merged with a request.</div><div class='add'>+ */</div><div class='add'>+void blk_zone_write_plug_bio_merged(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the BIO was already plugged, then we were called through</div><div class='add'>+	 * blk_zone_write_plug_init_request() -&gt; blk_attempt_bio_merge().</div><div class='add'>+	 * For this case, we already hold a reference on the zone write plug for</div><div class='add'>+	 * the BIO and blk_zone_write_plug_init_request() will handle the</div><div class='add'>+	 * zone write pointer offset update.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_flagged(bio, BIO_ZONE_WRITE_PLUGGING))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bio_set_flag(bio, BIO_ZONE_WRITE_PLUGGING);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get a reference on the zone write plug of the target zone and advance</div><div class='add'>+	 * the zone write pointer offset. Given that this is a merge, we already</div><div class='add'>+	 * have at least one request and one BIO referencing the zone write</div><div class='add'>+	 * plug. So this should not fail.</div><div class='add'>+	 */</div><div class='add'>+	zwplug = disk_get_zone_wplug(bio-&gt;bi_bdev-&gt;bd_disk,</div><div class='add'>+				     bio-&gt;bi_iter.bi_sector);</div><div class='add'>+	if (WARN_ON_ONCE(!zwplug))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+	zwplug-&gt;wp_offset += bio_sectors(bio);</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Attempt to merge plugged BIOs with a newly prepared request for a BIO that</div><div class='add'>+ * already went through zone write plugging (either a new BIO or one that was</div><div class='add'>+ * unplugged).</div><div class='add'>+ */</div><div class='add'>+void blk_zone_write_plug_init_request(struct request *req)</div><div class='add'>+{</div><div class='add'>+	sector_t req_back_sector = blk_rq_pos(req) + blk_rq_sectors(req);</div><div class='add'>+	struct request_queue *q = req-&gt;q;</div><div class='add'>+	struct gendisk *disk = q-&gt;disk;</div><div class='add'>+	unsigned int zone_capacity = disk-&gt;zone_capacity;</div><div class='add'>+	struct blk_zone_wplug *zwplug =</div><div class='add'>+		disk_get_zone_wplug(disk, blk_rq_pos(req));</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct bio *bio;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!zwplug))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Indicate that completion of this request needs to be handled with</div><div class='add'>+	 * blk_zone_write_plug_finish_request(), which will drop the reference</div><div class='add'>+	 * on the zone write plug we took above on entry to this function.</div><div class='add'>+	 */</div><div class='add'>+	req-&gt;rq_flags |= RQF_ZONE_WRITE_PLUGGING;</div><div class='add'>+</div><div class='add'>+	if (blk_queue_nomerges(q))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Walk through the list of plugged BIOs to check if they can be merged</div><div class='add'>+	 * into the back of the request.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+	while (zwplug-&gt;wp_offset &lt; zone_capacity) {</div><div class='add'>+		bio = bio_list_peek(&amp;zwplug-&gt;bio_list);</div><div class='add'>+		if (!bio)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (bio-&gt;bi_iter.bi_sector != req_back_sector ||</div><div class='add'>+		    !blk_rq_merge_ok(req, bio))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		WARN_ON_ONCE(bio_op(bio) != REQ_OP_WRITE_ZEROES &amp;&amp;</div><div class='add'>+			     !bio-&gt;__bi_nr_segments);</div><div class='add'>+</div><div class='add'>+		bio_list_pop(&amp;zwplug-&gt;bio_list);</div><div class='add'>+		if (bio_attempt_back_merge(req, bio, bio-&gt;__bi_nr_segments) !=</div><div class='add'>+		    BIO_MERGE_OK) {</div><div class='add'>+			bio_list_add_head(&amp;zwplug-&gt;bio_list, bio);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Drop the extra reference on the queue usage we got when</div><div class='add'>+		 * plugging the BIO and advance the write pointer offset.</div><div class='add'>+		 */</div><div class='add'>+		blk_queue_exit(q);</div><div class='add'>+		zwplug-&gt;wp_offset += bio_sectors(bio);</div><div class='add'>+</div><div class='add'>+		req_back_sector += bio_sectors(bio);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check and prepare a BIO for submission by incrementing the write pointer</div><div class='add'>+ * offset of its zone write plug and changing zone append operations into</div><div class='add'>+ * regular write when zone append emulation is needed.</div><div class='add'>+ */</div><div class='add'>+static bool blk_zone_wplug_prepare_bio(struct blk_zone_wplug *zwplug,</div><div class='add'>+				       struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = bio-&gt;bi_bdev-&gt;bd_disk;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check that the user is not attempting to write to a full zone.</div><div class='add'>+	 * We know such BIO will fail, and that would potentially overflow our</div><div class='add'>+	 * write pointer offset beyond the end of the zone.</div><div class='add'>+	 */</div><div class='add'>+	if (zwplug-&gt;wp_offset &gt;= disk-&gt;zone_capacity)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (bio_op(bio) == REQ_OP_ZONE_APPEND) {</div><div class='add'>+		/*</div><div class='add'>+		 * Use a regular write starting at the current write pointer.</div><div class='add'>+		 * Similarly to native zone append operations, do not allow</div><div class='add'>+		 * merging.</div><div class='add'>+		 */</div><div class='add'>+		bio-&gt;bi_opf &amp;= ~REQ_OP_MASK;</div><div class='add'>+		bio-&gt;bi_opf |= REQ_OP_WRITE | REQ_NOMERGE;</div><div class='add'>+		bio-&gt;bi_iter.bi_sector += zwplug-&gt;wp_offset;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Remember that this BIO is in fact a zone append operation</div><div class='add'>+		 * so that we can restore its operation code on completion.</div><div class='add'>+		 */</div><div class='add'>+		bio_set_flag(bio, BIO_EMULATES_ZONE_APPEND);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Check for non-sequential writes early because we avoid a</div><div class='add'>+		 * whole lot of error handling trouble if we don't send it off</div><div class='add'>+		 * to the driver.</div><div class='add'>+		 */</div><div class='add'>+		if (bio_offset_from_zone_start(bio) != zwplug-&gt;wp_offset)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Advance the zone write pointer offset. */</div><div class='add'>+	zwplug-&gt;wp_offset += bio_sectors(bio);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* We detected an invalid write BIO: schedule error recovery. */</div><div class='add'>+	disk_zone_wplug_set_error(disk, zwplug);</div><div class='add'>+	kblockd_schedule_work(&amp;disk-&gt;zone_wplugs_work);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool blk_zone_wplug_handle_write(struct bio *bio, unsigned int nr_segs)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = bio-&gt;bi_bdev-&gt;bd_disk;</div><div class='add'>+	sector_t sector = bio-&gt;bi_iter.bi_sector;</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	gfp_t gfp_mask = GFP_NOIO;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * BIOs must be fully contained within a zone so that we use the correct</div><div class='add'>+	 * zone write plug for the entire BIO. For blk-mq devices, the block</div><div class='add'>+	 * layer should already have done any splitting required to ensure this</div><div class='add'>+	 * and this BIO should thus not be straddling zone boundaries. For</div><div class='add'>+	 * BIO-based devices, it is the responsibility of the driver to split</div><div class='add'>+	 * the bio before submitting it.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON_ONCE(bio_straddles_zones(bio))) {</div><div class='add'>+		bio_io_error(bio);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Conventional zones do not need write plugging. */</div><div class='add'>+	if (disk_zone_is_conv(disk, sector)) {</div><div class='add'>+		/* Zone append to conventional zones is not allowed. */</div><div class='add'>+		if (bio_op(bio) == REQ_OP_ZONE_APPEND) {</div><div class='add'>+			bio_io_error(bio);</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bio-&gt;bi_opf &amp; REQ_NOWAIT)</div><div class='add'>+		gfp_mask = GFP_NOWAIT;</div><div class='add'>+</div><div class='add'>+	zwplug = disk_get_and_lock_zone_wplug(disk, sector, gfp_mask, &amp;flags);</div><div class='add'>+	if (!zwplug) {</div><div class='add'>+		bio_io_error(bio);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Indicate that this BIO is being handled using zone write plugging. */</div><div class='add'>+	bio_set_flag(bio, BIO_ZONE_WRITE_PLUGGING);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the zone is already plugged or has a pending error, add the BIO</div><div class='add'>+	 * to the plug BIO list. Otherwise, plug and let the BIO execute.</div><div class='add'>+	 */</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_BUSY)</div><div class='add'>+		goto plug;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If an error is detected when preparing the BIO, add it to the BIO</div><div class='add'>+	 * list so that error recovery can deal with it.</div><div class='add'>+	 */</div><div class='add'>+	if (!blk_zone_wplug_prepare_bio(zwplug, bio))</div><div class='add'>+		goto plug;</div><div class='add'>+</div><div class='add'>+	zwplug-&gt;flags |= BLK_ZONE_WPLUG_PLUGGED;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+</div><div class='add'>+plug:</div><div class='add'>+	zwplug-&gt;flags |= BLK_ZONE_WPLUG_PLUGGED;</div><div class='add'>+	blk_zone_wplug_add_bio(zwplug, bio, nr_segs);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blk_zone_plug_bio - Handle a zone write BIO with zone write plugging</div><div class='add'>+ * @bio: The BIO being submitted</div><div class='add'>+ * @nr_segs: The number of physical segments of @bio</div><div class='add'>+ *</div><div class='add'>+ * Handle write, write zeroes and zone append operations requiring emulation</div><div class='add'>+ * using zone write plugging.</div><div class='add'>+ *</div><div class='add'>+ * Return true whenever @bio execution needs to be delayed through the zone</div><div class='add'>+ * write plug. Otherwise, return false to let the submission path process</div><div class='add'>+ * @bio normally.</div><div class='add'>+ */</div><div class='add'>+bool blk_zone_plug_bio(struct bio *bio, unsigned int nr_segs)</div><div class='add'>+{</div><div class='add'>+	struct block_device *bdev = bio-&gt;bi_bdev;</div><div class='add'>+</div><div class='add'>+	if (!bdev-&gt;bd_disk-&gt;zone_wplugs_hash)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the BIO already has the plugging flag set, then it was already</div><div class='add'>+	 * handled through this path and this is a submission from the zone</div><div class='add'>+	 * plug bio submit work.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_flagged(bio, BIO_ZONE_WRITE_PLUGGING))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We do not need to do anything special for empty flush BIOs, e.g</div><div class='add'>+	 * BIOs such as issued by blkdev_issue_flush(). The is because it is</div><div class='add'>+	 * the responsibility of the user to first wait for the completion of</div><div class='add'>+	 * write operations for flush to have any effect on the persistence of</div><div class='add'>+	 * the written data.</div><div class='add'>+	 */</div><div class='add'>+	if (op_is_flush(bio-&gt;bi_opf) &amp;&amp; !bio_sectors(bio))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Regular writes and write zeroes need to be handled through the target</div><div class='add'>+	 * zone write plug. This includes writes with REQ_FUA | REQ_PREFLUSH</div><div class='add'>+	 * which may need to go through the flush machinery depending on the</div><div class='add'>+	 * target device capabilities. Plugging such writes is fine as the flush</div><div class='add'>+	 * machinery operates at the request level, below the plug, and</div><div class='add'>+	 * completion of the flush sequence will go through the regular BIO</div><div class='add'>+	 * completion, which will handle zone write plugging.</div><div class='add'>+	 * Zone append operations for devices that requested emulation must</div><div class='add'>+	 * also be plugged so that these BIOs can be changed into regular</div><div class='add'>+	 * write BIOs.</div><div class='add'>+	 * Zone reset, reset all and finish commands need special treatment</div><div class='add'>+	 * to correctly track the write pointer offset of zones. These commands</div><div class='add'>+	 * are not plugged as we do not need serialization with write</div><div class='add'>+	 * operations. It is the responsibility of the user to not issue reset</div><div class='add'>+	 * and finish commands when write operations are in flight.</div><div class='add'>+	 */</div><div class='add'>+	switch (bio_op(bio)) {</div><div class='add'>+	case REQ_OP_ZONE_APPEND:</div><div class='add'>+		if (!bdev_emulates_zone_append(bdev))</div><div class='add'>+			return false;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case REQ_OP_WRITE:</div><div class='add'>+	case REQ_OP_WRITE_ZEROES:</div><div class='add'>+		return blk_zone_wplug_handle_write(bio, nr_segs);</div><div class='add'>+	case REQ_OP_ZONE_RESET:</div><div class='add'>+		return blk_zone_wplug_handle_reset_or_finish(bio, 0);</div><div class='add'>+	case REQ_OP_ZONE_FINISH:</div><div class='add'>+		return blk_zone_wplug_handle_reset_or_finish(bio,</div><div class='add'>+						bdev_zone_sectors(bdev));</div><div class='add'>+	case REQ_OP_ZONE_RESET_ALL:</div><div class='add'>+		return blk_zone_wplug_handle_reset_all(bio);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(blk_zone_plug_bio);</div><div class='add'>+</div><div class='add'>+static void disk_zone_wplug_schedule_bio_work(struct gendisk *disk,</div><div class='add'>+					      struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Take a reference on the zone write plug and schedule the submission</div><div class='add'>+	 * of the next plugged BIO. blk_zone_wplug_bio_work() will release the</div><div class='add'>+	 * reference we take here.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON_ONCE(!(zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_PLUGGED));</div><div class='add'>+	atomic_inc(&amp;zwplug-&gt;ref);</div><div class='add'>+	queue_work(disk-&gt;zone_wplugs_wq, &amp;zwplug-&gt;bio_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disk_zone_wplug_unplug_bio(struct gendisk *disk,</div><div class='add'>+				       struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we had an error, schedule error recovery. The recovery work</div><div class='add'>+	 * will restart submission of plugged BIOs.</div><div class='add'>+	 */</div><div class='add'>+	if (zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_ERROR) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+		kblockd_schedule_work(&amp;disk-&gt;zone_wplugs_work);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Schedule submission of the next plugged BIO if we have one. */</div><div class='add'>+	if (!bio_list_empty(&amp;zwplug-&gt;bio_list)) {</div><div class='add'>+		disk_zone_wplug_schedule_bio_work(disk, zwplug);</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zwplug-&gt;flags &amp;= ~BLK_ZONE_WPLUG_PLUGGED;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the zone is full (it was fully written or finished, or empty</div><div class='add'>+	 * (it was reset), remove its zone write plug from the hash table.</div><div class='add'>+	 */</div><div class='add'>+	if (disk_should_remove_zone_wplug(disk, zwplug))</div><div class='add'>+		disk_remove_zone_wplug(disk, zwplug);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void blk_zone_write_plug_bio_endio(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = bio-&gt;bi_bdev-&gt;bd_disk;</div><div class='add'>+	struct blk_zone_wplug *zwplug =</div><div class='add'>+		disk_get_zone_wplug(disk, bio-&gt;bi_iter.bi_sector);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!zwplug))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Make sure we do not see this BIO again by clearing the plug flag. */</div><div class='add'>+	bio_clear_flag(bio, BIO_ZONE_WRITE_PLUGGING);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this is a regular write emulating a zone append operation,</div><div class='add'>+	 * restore the original operation code.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_flagged(bio, BIO_EMULATES_ZONE_APPEND)) {</div><div class='add'>+		bio-&gt;bi_opf &amp;= ~REQ_OP_MASK;</div><div class='add'>+		bio-&gt;bi_opf |= REQ_OP_ZONE_APPEND;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the BIO failed, mark the plug as having an error to trigger</div><div class='add'>+	 * recovery.</div><div class='add'>+	 */</div><div class='add'>+	if (bio-&gt;bi_status != BLK_STS_OK) {</div><div class='add'>+		spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+		disk_zone_wplug_set_error(disk, zwplug);</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Drop the reference we took when the BIO was issued. */</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For BIO-based devices, blk_zone_write_plug_finish_request()</div><div class='add'>+	 * is not called. So we need to schedule execution of the next</div><div class='add'>+	 * plugged BIO here.</div><div class='add'>+	 */</div><div class='add'>+	if (bio-&gt;bi_bdev-&gt;bd_has_submit_bio)</div><div class='add'>+		disk_zone_wplug_unplug_bio(disk, zwplug);</div><div class='add'>+</div><div class='add'>+	/* Drop the reference we took when entering this function. */</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void blk_zone_write_plug_finish_request(struct request *req)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = req-&gt;q-&gt;disk;</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+</div><div class='add'>+	zwplug = disk_get_zone_wplug(disk, req-&gt;__sector);</div><div class='add'>+	if (WARN_ON_ONCE(!zwplug))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	req-&gt;rq_flags &amp;= ~RQF_ZONE_WRITE_PLUGGING;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Drop the reference we took when the request was initialized in</div><div class='add'>+	 * blk_zone_write_plug_init_request().</div><div class='add'>+	 */</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+</div><div class='add'>+	disk_zone_wplug_unplug_bio(disk, zwplug);</div><div class='add'>+</div><div class='add'>+	/* Drop the reference we took when entering this function. */</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blk_zone_wplug_bio_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct blk_zone_wplug *zwplug =</div><div class='add'>+		container_of(work, struct blk_zone_wplug, bio_work);</div><div class='add'>+	struct block_device *bdev;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct bio *bio;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Submit the next plugged BIO. If we do not have any, clear</div><div class='add'>+	 * the plugged flag.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	bio = bio_list_pop(&amp;zwplug-&gt;bio_list);</div><div class='add'>+	if (!bio) {</div><div class='add'>+		zwplug-&gt;flags &amp;= ~BLK_ZONE_WPLUG_PLUGGED;</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+		goto put_zwplug;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!blk_zone_wplug_prepare_bio(zwplug, bio)) {</div><div class='add'>+		/* Error recovery will decide what to do with the BIO. */</div><div class='add'>+		bio_list_add_head(&amp;zwplug-&gt;bio_list, bio);</div><div class='add'>+		spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+		goto put_zwplug;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	bdev = bio-&gt;bi_bdev;</div><div class='add'>+	submit_bio_noacct_nocheck(bio);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * blk-mq devices will reuse the extra reference on the request queue</div><div class='add'>+	 * usage counter we took when the BIO was plugged, but the submission</div><div class='add'>+	 * path for BIO-based devices will not do that. So drop this extra</div><div class='add'>+	 * reference here.</div><div class='add'>+	 */</div><div class='add'>+	if (bdev-&gt;bd_has_submit_bio)</div><div class='add'>+		blk_queue_exit(bdev-&gt;bd_disk-&gt;queue);</div><div class='add'>+</div><div class='add'>+put_zwplug:</div><div class='add'>+	/* Drop the reference we took in disk_zone_wplug_schedule_bio_work(). */</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int blk_zone_wp_offset(struct blk_zone *zone)</div><div class='add'>+{</div><div class='add'>+	switch (zone-&gt;cond) {</div><div class='add'>+	case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+	case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+	case BLK_ZONE_COND_CLOSED:</div><div class='add'>+		return zone-&gt;wp - zone-&gt;start;</div><div class='add'>+	case BLK_ZONE_COND_FULL:</div><div class='add'>+		return zone-&gt;len;</div><div class='add'>+	case BLK_ZONE_COND_EMPTY:</div><div class='add'>+		return 0;</div><div class='add'>+	case BLK_ZONE_COND_NOT_WP:</div><div class='add'>+	case BLK_ZONE_COND_OFFLINE:</div><div class='add'>+	case BLK_ZONE_COND_READONLY:</div><div class='add'>+	default:</div><div class='add'>+		/*</div><div class='add'>+		 * Conventional, offline and read-only zones do not have a valid</div><div class='add'>+		 * write pointer.</div><div class='add'>+		 */</div><div class='add'>+		return UINT_MAX;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blk_zone_wplug_report_zone_cb(struct blk_zone *zone,</div><div class='add'>+					 unsigned int idx, void *data)</div><div class='add'>+{</div><div class='add'>+	struct blk_zone *zonep = data;</div><div class='add'>+</div><div class='add'>+	*zonep = *zone;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disk_zone_wplug_handle_error(struct gendisk *disk,</div><div class='add'>+					 struct blk_zone_wplug *zwplug)</div><div class='add'>+{</div><div class='add'>+	sector_t zone_start_sector =</div><div class='add'>+		bdev_zone_sectors(disk-&gt;part0) * zwplug-&gt;zone_no;</div><div class='add'>+	unsigned int noio_flag;</div><div class='add'>+	struct blk_zone zone;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Get the current zone information from the device. */</div><div class='add'>+	noio_flag = memalloc_noio_save();</div><div class='add'>+	ret = disk-&gt;fops-&gt;report_zones(disk, zone_start_sector, 1,</div><div class='add'>+				       blk_zone_wplug_report_zone_cb, &amp;zone);</div><div class='add'>+	memalloc_noio_restore(noio_flag);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * A zone reset or finish may have cleared the error already. In such</div><div class='add'>+	 * case, do nothing as the report zones may have seen the "old" write</div><div class='add'>+	 * pointer value before the reset/finish operation completed.</div><div class='add'>+	 */</div><div class='add'>+	if (!(zwplug-&gt;flags &amp; BLK_ZONE_WPLUG_ERROR))</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	zwplug-&gt;flags &amp;= ~BLK_ZONE_WPLUG_ERROR;</div><div class='add'>+</div><div class='add'>+	if (ret != 1) {</div><div class='add'>+		/*</div><div class='add'>+		 * We failed to get the zone information, meaning that something</div><div class='add'>+		 * is likely really wrong with the device. Abort all remaining</div><div class='add'>+		 * plugged BIOs as otherwise we could endup waiting forever on</div><div class='add'>+		 * plugged BIOs to complete if there is a queue freeze on-going.</div><div class='add'>+		 */</div><div class='add'>+		disk_zone_wplug_abort(zwplug);</div><div class='add'>+		goto unplug;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update the zone write pointer offset. */</div><div class='add'>+	zwplug-&gt;wp_offset = blk_zone_wp_offset(&amp;zone);</div><div class='add'>+	disk_zone_wplug_abort_unaligned(disk, zwplug);</div><div class='add'>+</div><div class='add'>+	/* Restart BIO submission if we still have any BIO left. */</div><div class='add'>+	if (!bio_list_empty(&amp;zwplug-&gt;bio_list)) {</div><div class='add'>+		disk_zone_wplug_schedule_bio_work(disk, zwplug);</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unplug:</div><div class='add'>+	zwplug-&gt;flags &amp;= ~BLK_ZONE_WPLUG_PLUGGED;</div><div class='add'>+	if (disk_should_remove_zone_wplug(disk, zwplug))</div><div class='add'>+		disk_remove_zone_wplug(disk, zwplug);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disk_zone_wplugs_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk =</div><div class='add'>+		container_of(work, struct gendisk, zone_wplugs_work);</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+</div><div class='add'>+	while (!list_empty(&amp;disk-&gt;zone_wplugs_err_list)) {</div><div class='add'>+		zwplug = list_first_entry(&amp;disk-&gt;zone_wplugs_err_list,</div><div class='add'>+					  struct blk_zone_wplug, link);</div><div class='add'>+		list_del_init(&amp;zwplug-&gt;link);</div><div class='add'>+		spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+</div><div class='add'>+		disk_zone_wplug_handle_error(disk, zwplug);</div><div class='add'>+		disk_put_zone_wplug(zwplug);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;disk-&gt;zone_wplugs_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int disk_zone_wplugs_hash_size(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	return 1U &lt;&lt; disk-&gt;zone_wplugs_hash_bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void disk_init_zone_resources(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	spin_lock_init(&amp;disk-&gt;zone_wplugs_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;disk-&gt;zone_wplugs_err_list);</div><div class='add'>+	INIT_WORK(&amp;disk-&gt;zone_wplugs_work, disk_zone_wplugs_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For the size of a disk zone write plug hash table, use the size of the</div><div class='add'>+ * zone write plug mempool, which is the maximum of the disk open zones and</div><div class='add'>+ * active zones limits. But do not exceed 4KB (512 hlist head entries), that is,</div><div class='add'>+ * 9 bits. For a disk that has no limits, mempool size defaults to 128.</div><div class='add'>+ */</div><div class='add'>+#define BLK_ZONE_WPLUG_MAX_HASH_BITS		9</div><div class='add'>+#define BLK_ZONE_WPLUG_DEFAULT_POOL_SIZE	128</div><div class='add'>+</div><div class='add'>+static int disk_alloc_zone_resources(struct gendisk *disk,</div><div class='add'>+				     unsigned int pool_size)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	disk-&gt;zone_wplugs_hash_bits =</div><div class='add'>+		min(ilog2(pool_size) + 1, BLK_ZONE_WPLUG_MAX_HASH_BITS);</div><div class='add'>+</div><div class='add'>+	disk-&gt;zone_wplugs_hash =</div><div class='add'>+		kcalloc(disk_zone_wplugs_hash_size(disk),</div><div class='add'>+			sizeof(struct hlist_head), GFP_KERNEL);</div><div class='add'>+	if (!disk-&gt;zone_wplugs_hash)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; disk_zone_wplugs_hash_size(disk); i++)</div><div class='add'>+		INIT_HLIST_HEAD(&amp;disk-&gt;zone_wplugs_hash[i]);</div><div class='add'>+</div><div class='add'>+	disk-&gt;zone_wplugs_pool = mempool_create_kmalloc_pool(pool_size,</div><div class='add'>+						sizeof(struct blk_zone_wplug));</div><div class='add'>+	if (!disk-&gt;zone_wplugs_pool)</div><div class='add'>+		goto free_hash;</div><div class='add'>+</div><div class='add'>+	disk-&gt;zone_wplugs_wq =</div><div class='add'>+		alloc_workqueue("%s_zwplugs", WQ_MEM_RECLAIM | WQ_HIGHPRI,</div><div class='add'>+				pool_size, disk-&gt;disk_name);</div><div class='add'>+	if (!disk-&gt;zone_wplugs_wq)</div><div class='add'>+		goto destroy_pool;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_pool:</div><div class='add'>+	mempool_destroy(disk-&gt;zone_wplugs_pool);</div><div class='add'>+	disk-&gt;zone_wplugs_pool = NULL;</div><div class='add'>+free_hash:</div><div class='add'>+	kfree(disk-&gt;zone_wplugs_hash);</div><div class='add'>+	disk-&gt;zone_wplugs_hash = NULL;</div><div class='add'>+	disk-&gt;zone_wplugs_hash_bits = 0;</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disk_destroy_zone_wplugs_hash_table(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (!disk-&gt;zone_wplugs_hash)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Free all the zone write plugs we have. */</div><div class='add'>+	for (i = 0; i &lt; disk_zone_wplugs_hash_size(disk); i++) {</div><div class='add'>+		while (!hlist_empty(&amp;disk-&gt;zone_wplugs_hash[i])) {</div><div class='add'>+			zwplug = hlist_entry(disk-&gt;zone_wplugs_hash[i].first,</div><div class='add'>+					     struct blk_zone_wplug, node);</div><div class='add'>+			atomic_inc(&amp;zwplug-&gt;ref);</div><div class='add'>+			disk_remove_zone_wplug(disk, zwplug);</div><div class='add'>+			disk_put_zone_wplug(zwplug);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(disk-&gt;zone_wplugs_hash);</div><div class='add'>+	disk-&gt;zone_wplugs_hash = NULL;</div><div class='add'>+	disk-&gt;zone_wplugs_hash_bits = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void disk_free_zone_resources(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	cancel_work_sync(&amp;disk-&gt;zone_wplugs_work);</div><div class='add'>+</div><div class='add'>+	if (disk-&gt;zone_wplugs_wq) {</div><div class='add'>+		destroy_workqueue(disk-&gt;zone_wplugs_wq);</div><div class='add'>+		disk-&gt;zone_wplugs_wq = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disk_destroy_zone_wplugs_hash_table(disk);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for the zone write plugs to be RCU-freed before</div><div class='add'>+	 * destorying the mempool.</div><div class='add'>+	 */</div><div class='add'>+	rcu_barrier();</div><div class='add'>+</div><div class='add'>+	mempool_destroy(disk-&gt;zone_wplugs_pool);</div><div class='add'>+	disk-&gt;zone_wplugs_pool = NULL;</div><div class='add'>+</div><div class='ctx'> 	kfree(disk-&gt;conv_zones_bitmap);</div><div class='ctx'> 	disk-&gt;conv_zones_bitmap = NULL;</div><div class='del'>-	kfree(disk-&gt;seq_zones_wlock);</div><div class='del'>-	disk-&gt;seq_zones_wlock = NULL;</div><div class='add'>+	disk-&gt;zone_capacity = 0;</div><div class='add'>+	disk-&gt;nr_zones = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool disk_need_zone_resources(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * All mq zoned devices need zone resources so that the block layer</div><div class='add'>+	 * can automatically handle write BIO plugging. BIO-based device drivers</div><div class='add'>+	 * (e.g. DM devices) are normally responsible for handling zone write</div><div class='add'>+	 * ordering and do not need zone resources, unless the driver requires</div><div class='add'>+	 * zone append emulation.</div><div class='add'>+	 */</div><div class='add'>+	return queue_is_mq(disk-&gt;queue) ||</div><div class='add'>+		queue_emulates_zone_append(disk-&gt;queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int disk_revalidate_zone_resources(struct gendisk *disk,</div><div class='add'>+					  unsigned int nr_zones)</div><div class='add'>+{</div><div class='add'>+	struct queue_limits *lim = &amp;disk-&gt;queue-&gt;limits;</div><div class='add'>+	unsigned int pool_size;</div><div class='add'>+</div><div class='add'>+	if (!disk_need_zone_resources(disk))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the device has no limit on the maximum number of open and active</div><div class='add'>+	 * zones, use BLK_ZONE_WPLUG_DEFAULT_POOL_SIZE.</div><div class='add'>+	 */</div><div class='add'>+	pool_size = max(lim-&gt;max_open_zones, lim-&gt;max_active_zones);</div><div class='add'>+	if (!pool_size)</div><div class='add'>+		pool_size = min(BLK_ZONE_WPLUG_DEFAULT_POOL_SIZE, nr_zones);</div><div class='add'>+</div><div class='add'>+	if (!disk-&gt;zone_wplugs_hash)</div><div class='add'>+		return disk_alloc_zone_resources(disk, pool_size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct blk_revalidate_zone_args {</div><div class='ctx'> 	struct gendisk	*disk;</div><div class='ctx'> 	unsigned long	*conv_zones_bitmap;</div><div class='del'>-	unsigned long	*seq_zones_wlock;</div><div class='ctx'> 	unsigned int	nr_zones;</div><div class='add'>+	unsigned int	zone_capacity;</div><div class='ctx'> 	sector_t	sector;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Update the disk zone resources information and device queue limits.</div><div class='add'>+ * The disk queue is frozen when this is executed.</div><div class='add'>+ */</div><div class='add'>+static int disk_update_zone_resources(struct gendisk *disk,</div><div class='add'>+				      struct blk_revalidate_zone_args *args)</div><div class='add'>+{</div><div class='add'>+	struct request_queue *q = disk-&gt;queue;</div><div class='add'>+	unsigned int nr_seq_zones, nr_conv_zones = 0;</div><div class='add'>+	unsigned int pool_size;</div><div class='add'>+	struct queue_limits lim;</div><div class='add'>+</div><div class='add'>+	disk-&gt;nr_zones = args-&gt;nr_zones;</div><div class='add'>+	disk-&gt;zone_capacity = args-&gt;zone_capacity;</div><div class='add'>+	swap(disk-&gt;conv_zones_bitmap, args-&gt;conv_zones_bitmap);</div><div class='add'>+	if (disk-&gt;conv_zones_bitmap)</div><div class='add'>+		nr_conv_zones = bitmap_weight(disk-&gt;conv_zones_bitmap,</div><div class='add'>+					      disk-&gt;nr_zones);</div><div class='add'>+	if (nr_conv_zones &gt;= disk-&gt;nr_zones) {</div><div class='add'>+		pr_warn("%s: Invalid number of conventional zones %u / %u\n",</div><div class='add'>+			disk-&gt;disk_name, nr_conv_zones, disk-&gt;nr_zones);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!disk-&gt;zone_wplugs_pool)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the device has no limit on the maximum number of open and active</div><div class='add'>+	 * zones, set its max open zone limit to the mempool size to indicate</div><div class='add'>+	 * to the user that there is a potential performance impact due to</div><div class='add'>+	 * dynamic zone write plug allocation when simultaneously writing to</div><div class='add'>+	 * more zones than the size of the mempool.</div><div class='add'>+	 */</div><div class='add'>+	lim = queue_limits_start_update(q);</div><div class='add'>+</div><div class='add'>+	nr_seq_zones = disk-&gt;nr_zones - nr_conv_zones;</div><div class='add'>+	pool_size = max(lim.max_open_zones, lim.max_active_zones);</div><div class='add'>+	if (!pool_size)</div><div class='add'>+		pool_size = min(BLK_ZONE_WPLUG_DEFAULT_POOL_SIZE, nr_seq_zones);</div><div class='add'>+</div><div class='add'>+	mempool_resize(disk-&gt;zone_wplugs_pool, pool_size);</div><div class='add'>+</div><div class='add'>+	if (!lim.max_open_zones &amp;&amp; !lim.max_active_zones) {</div><div class='add'>+		if (pool_size &lt; nr_seq_zones)</div><div class='add'>+			lim.max_open_zones = pool_size;</div><div class='add'>+		else</div><div class='add'>+			lim.max_open_zones = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return queue_limits_commit_update(q, &amp;lim);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blk_revalidate_conv_zone(struct blk_zone *zone, unsigned int idx,</div><div class='add'>+				    struct blk_revalidate_zone_args *args)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = args-&gt;disk;</div><div class='add'>+	struct request_queue *q = disk-&gt;queue;</div><div class='add'>+</div><div class='add'>+	if (zone-&gt;capacity != zone-&gt;len) {</div><div class='add'>+		pr_warn("%s: Invalid conventional zone capacity\n",</div><div class='add'>+			disk-&gt;disk_name);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!disk_need_zone_resources(disk))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!args-&gt;conv_zones_bitmap) {</div><div class='add'>+		args-&gt;conv_zones_bitmap =</div><div class='add'>+			blk_alloc_zone_bitmap(q-&gt;node, args-&gt;nr_zones);</div><div class='add'>+		if (!args-&gt;conv_zones_bitmap)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(idx, args-&gt;conv_zones_bitmap);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blk_revalidate_seq_zone(struct blk_zone *zone, unsigned int idx,</div><div class='add'>+				   struct blk_revalidate_zone_args *args)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk = args-&gt;disk;</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	unsigned int wp_offset;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Remember the capacity of the first sequential zone and check</div><div class='add'>+	 * if it is constant for all zones.</div><div class='add'>+	 */</div><div class='add'>+	if (!args-&gt;zone_capacity)</div><div class='add'>+		args-&gt;zone_capacity = zone-&gt;capacity;</div><div class='add'>+	if (zone-&gt;capacity != args-&gt;zone_capacity) {</div><div class='add'>+		pr_warn("%s: Invalid variable zone capacity\n",</div><div class='add'>+			disk-&gt;disk_name);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We need to track the write pointer of all zones that are not</div><div class='add'>+	 * empty nor full. So make sure we have a zone write plug for</div><div class='add'>+	 * such zone if the device has a zone write plug hash table.</div><div class='add'>+	 */</div><div class='add'>+	if (!disk-&gt;zone_wplugs_hash)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	wp_offset = blk_zone_wp_offset(zone);</div><div class='add'>+	if (!wp_offset || wp_offset &gt;= zone-&gt;capacity)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	zwplug = disk_get_and_lock_zone_wplug(disk, zone-&gt;wp, GFP_NOIO, &amp;flags);</div><div class='add'>+	if (!zwplug)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+	disk_put_zone_wplug(zwplug);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Helper function to check the validity of zones of a zoned block device.</div><div class='ctx'>  */</div><div class='ctx'> static int blk_revalidate_zone_cb(struct blk_zone *zone, unsigned int idx,</div><div class='hunk'>@@ -449,9 +1732,9 @@ static int blk_revalidate_zone_cb(struct blk_zone *zone, unsigned int idx,</div><div class='ctx'> {</div><div class='ctx'> 	struct blk_revalidate_zone_args *args = data;</div><div class='ctx'> 	struct gendisk *disk = args-&gt;disk;</div><div class='del'>-	struct request_queue *q = disk-&gt;queue;</div><div class='ctx'> 	sector_t capacity = get_capacity(disk);</div><div class='del'>-	sector_t zone_sectors = q-&gt;limits.chunk_sectors;</div><div class='add'>+	sector_t zone_sectors = disk-&gt;queue-&gt;limits.chunk_sectors;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Check for bad zones and holes in the zone report */</div><div class='ctx'> 	if (zone-&gt;start != args-&gt;sector) {</div><div class='hunk'>@@ -482,66 +1765,57 @@ static int blk_revalidate_zone_cb(struct blk_zone *zone, unsigned int idx,</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!zone-&gt;capacity || zone-&gt;capacity &gt; zone-&gt;len) {</div><div class='add'>+		pr_warn("%s: Invalid zone capacity\n",</div><div class='add'>+			disk-&gt;disk_name);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Check zone type */</div><div class='ctx'> 	switch (zone-&gt;type) {</div><div class='ctx'> 	case BLK_ZONE_TYPE_CONVENTIONAL:</div><div class='del'>-		if (!args-&gt;conv_zones_bitmap) {</div><div class='del'>-			args-&gt;conv_zones_bitmap =</div><div class='del'>-				blk_alloc_zone_bitmap(q-&gt;node, args-&gt;nr_zones);</div><div class='del'>-			if (!args-&gt;conv_zones_bitmap)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		set_bit(idx, args-&gt;conv_zones_bitmap);</div><div class='add'>+		ret = blk_revalidate_conv_zone(zone, idx, args);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BLK_ZONE_TYPE_SEQWRITE_REQ:</div><div class='del'>-		if (!args-&gt;seq_zones_wlock) {</div><div class='del'>-			args-&gt;seq_zones_wlock =</div><div class='del'>-				blk_alloc_zone_bitmap(q-&gt;node, args-&gt;nr_zones);</div><div class='del'>-			if (!args-&gt;seq_zones_wlock)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-		}</div><div class='add'>+		ret = blk_revalidate_seq_zone(zone, idx, args);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BLK_ZONE_TYPE_SEQWRITE_PREF:</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_warn("%s: Invalid zone type 0x%x at sectors %llu\n",</div><div class='ctx'> 			disk-&gt;disk_name, (int)zone-&gt;type, zone-&gt;start);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		ret = -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	args-&gt;sector += zone-&gt;len;</div><div class='del'>-	return 0;</div><div class='add'>+	if (!ret)</div><div class='add'>+		args-&gt;sector += zone-&gt;len;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * blk_revalidate_disk_zones - (re)allocate and initialize zone bitmaps</div><div class='add'>+ * blk_revalidate_disk_zones - (re)allocate and initialize zone write plugs</div><div class='ctx'>  * @disk:	Target disk</div><div class='del'>- * @update_driver_data:	Callback to update driver data on the frozen disk</div><div class='ctx'>  *</div><div class='del'>- * Helper function for low-level device drivers to check and (re) allocate and</div><div class='del'>- * initialize a disk request queue zone bitmaps. This functions should normally</div><div class='del'>- * be called within the disk -&gt;revalidate method for blk-mq based drivers.</div><div class='add'>+ * Helper function for low-level device drivers to check, (re) allocate and</div><div class='add'>+ * initialize resources used for managing zoned disks. This function should</div><div class='add'>+ * normally be called by blk-mq based drivers when a zoned gendisk is probed</div><div class='add'>+ * and when the zone configuration of the gendisk changes (e.g. after a format).</div><div class='ctx'>  * Before calling this function, the device driver must already have set the</div><div class='ctx'>  * device zone size (chunk_sector limit) and the max zone append limit.</div><div class='del'>- * For BIO based drivers, this function cannot be used. BIO based device drivers</div><div class='del'>- * only need to set disk-&gt;nr_zones so that the sysfs exposed value is correct.</div><div class='del'>- * If the @update_driver_data callback function is not NULL, the callback is</div><div class='del'>- * executed with the device request queue frozen after all zones have been</div><div class='del'>- * checked.</div><div class='add'>+ * BIO based drivers can also use this function as long as the device queue</div><div class='add'>+ * can be safely frozen.</div><div class='ctx'>  */</div><div class='del'>-int blk_revalidate_disk_zones(struct gendisk *disk,</div><div class='del'>-			      void (*update_driver_data)(struct gendisk *disk))</div><div class='add'>+int blk_revalidate_disk_zones(struct gendisk *disk)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = disk-&gt;queue;</div><div class='ctx'> 	sector_t zone_sectors = q-&gt;limits.chunk_sectors;</div><div class='ctx'> 	sector_t capacity = get_capacity(disk);</div><div class='ctx'> 	struct blk_revalidate_zone_args args = { };</div><div class='ctx'> 	unsigned int noio_flag;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON_ONCE(!blk_queue_is_zoned(q)))</div><div class='ctx'> 		return -EIO;</div><div class='del'>-	if (WARN_ON_ONCE(!queue_is_mq(q)))</div><div class='del'>-		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	if (!capacity)</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -556,7 +1830,7 @@ int blk_revalidate_disk_zones(struct gendisk *disk,</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!q-&gt;limits.max_zone_append_sectors) {</div><div class='add'>+	if (!queue_max_zone_append_sectors(q)) {</div><div class='ctx'> 		pr_warn("%s: Invalid 0 maximum zone append limit\n",</div><div class='ctx'> 			disk-&gt;disk_name);</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -569,6 +1843,11 @@ int blk_revalidate_disk_zones(struct gendisk *disk,</div><div class='ctx'> 	args.disk = disk;</div><div class='ctx'> 	args.nr_zones = (capacity + zone_sectors - 1) &gt;&gt; ilog2(zone_sectors);</div><div class='ctx'> 	noio_flag = memalloc_noio_save();</div><div class='add'>+	ret = disk_revalidate_zone_resources(disk, args.nr_zones);</div><div class='add'>+	if (ret) {</div><div class='add'>+		memalloc_noio_restore(noio_flag);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> 	ret = disk-&gt;fops-&gt;report_zones(disk, 0, UINT_MAX,</div><div class='ctx'> 				       blk_revalidate_zone_cb, &amp;args);</div><div class='ctx'> 	if (!ret) {</div><div class='hunk'>@@ -588,26 +1867,59 @@ int blk_revalidate_disk_zones(struct gendisk *disk,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Install the new bitmaps and update nr_zones only once the queue is</div><div class='del'>-	 * stopped and all I/Os are completed (i.e. a scheduler is not</div><div class='del'>-	 * referencing the bitmaps).</div><div class='add'>+	 * Set the new disk zone parameters only once the queue is frozen and</div><div class='add'>+	 * all I/Os are completed.</div><div class='ctx'> 	 */</div><div class='ctx'> 	blk_mq_freeze_queue(q);</div><div class='del'>-	if (ret &gt; 0) {</div><div class='del'>-		disk-&gt;nr_zones = args.nr_zones;</div><div class='del'>-		swap(disk-&gt;seq_zones_wlock, args.seq_zones_wlock);</div><div class='del'>-		swap(disk-&gt;conv_zones_bitmap, args.conv_zones_bitmap);</div><div class='del'>-		if (update_driver_data)</div><div class='del'>-			update_driver_data(disk);</div><div class='del'>-		ret = 0;</div><div class='del'>-	} else {</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		ret = disk_update_zone_resources(disk, &amp;args);</div><div class='add'>+	else</div><div class='ctx'> 		pr_warn("%s: failed to revalidate zones\n", disk-&gt;disk_name);</div><div class='del'>-		disk_free_zone_bitmaps(disk);</div><div class='del'>-	}</div><div class='add'>+	if (ret)</div><div class='add'>+		disk_free_zone_resources(disk);</div><div class='ctx'> 	blk_mq_unfreeze_queue(q);</div><div class='ctx'> </div><div class='del'>-	kfree(args.seq_zones_wlock);</div><div class='ctx'> 	kfree(args.conv_zones_bitmap);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_revalidate_disk_zones);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BLK_DEBUG_FS</div><div class='add'>+</div><div class='add'>+int queue_zone_wplugs_show(void *data, struct seq_file *m)</div><div class='add'>+{</div><div class='add'>+	struct request_queue *q = data;</div><div class='add'>+	struct gendisk *disk = q-&gt;disk;</div><div class='add'>+	struct blk_zone_wplug *zwplug;</div><div class='add'>+	unsigned int zwp_wp_offset, zwp_flags;</div><div class='add'>+	unsigned int zwp_zone_no, zwp_ref;</div><div class='add'>+	unsigned int zwp_bio_list_size, i;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!disk-&gt;zone_wplugs_hash)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	for (i = 0; i &lt; disk_zone_wplugs_hash_size(disk); i++) {</div><div class='add'>+		hlist_for_each_entry_rcu(zwplug,</div><div class='add'>+					 &amp;disk-&gt;zone_wplugs_hash[i], node) {</div><div class='add'>+			spin_lock_irqsave(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+			zwp_zone_no = zwplug-&gt;zone_no;</div><div class='add'>+			zwp_flags = zwplug-&gt;flags;</div><div class='add'>+			zwp_ref = atomic_read(&amp;zwplug-&gt;ref);</div><div class='add'>+			zwp_wp_offset = zwplug-&gt;wp_offset;</div><div class='add'>+			zwp_bio_list_size = bio_list_size(&amp;zwplug-&gt;bio_list);</div><div class='add'>+			spin_unlock_irqrestore(&amp;zwplug-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+			seq_printf(m, "%u 0x%x %u %u %u\n",</div><div class='add'>+				   zwp_zone_no, zwp_flags, zwp_ref,</div><div class='add'>+				   zwp_wp_offset, zwp_bio_list_size);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/block/blk.h b/block/blk.h<br/>index d9f584984bc4..6e94c10af798 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/blk.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/blk.h</a></div><div class='hunk'>@@ -38,6 +38,7 @@ void __blk_mq_unfreeze_queue(struct request_queue *q, bool force_atomic);</div><div class='ctx'> void blk_queue_start_drain(struct request_queue *q);</div><div class='ctx'> int __bio_queue_enter(struct request_queue *q, struct bio *bio);</div><div class='ctx'> void submit_bio_noacct_nocheck(struct bio *bio);</div><div class='add'>+void bio_await_chain(struct bio *bio);</div><div class='ctx'> </div><div class='ctx'> static inline bool blk_try_enter_queue(struct request_queue *q, bool pm)</div><div class='ctx'> {</div><div class='hunk'>@@ -269,6 +270,14 @@ static inline void bio_integrity_free(struct bio *bio)</div><div class='ctx'> unsigned long blk_rq_timeout(unsigned long timeout);</div><div class='ctx'> void blk_add_timer(struct request *req);</div><div class='ctx'> </div><div class='add'>+enum bio_merge_status {</div><div class='add'>+	BIO_MERGE_OK,</div><div class='add'>+	BIO_MERGE_NONE,</div><div class='add'>+	BIO_MERGE_FAILED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum bio_merge_status bio_attempt_back_merge(struct request *req,</div><div class='add'>+		struct bio *bio, unsigned int nr_segs);</div><div class='ctx'> bool blk_attempt_plug_merge(struct request_queue *q, struct bio *bio,</div><div class='ctx'> 		unsigned int nr_segs);</div><div class='ctx'> bool blk_bio_list_merge(struct request_queue *q, struct list_head *list,</div><div class='hunk'>@@ -357,6 +366,7 @@ static inline bool blk_do_io_stat(struct request *rq)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_io_ticks(struct block_device *part, unsigned long now, bool end);</div><div class='add'>+unsigned int part_in_flight(struct block_device *part);</div><div class='ctx'> </div><div class='ctx'> static inline void req_set_nomerge(struct request_queue *q, struct request *req)</div><div class='ctx'> {</div><div class='hunk'>@@ -378,17 +388,6 @@ static inline void ioc_clear_queue(struct request_queue *q)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_BLK_ICQ */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING_LOW</div><div class='del'>-extern ssize_t blk_throtl_sample_time_show(struct request_queue *q, char *page);</div><div class='del'>-extern ssize_t blk_throtl_sample_time_store(struct request_queue *q,</div><div class='del'>-	const char *page, size_t count);</div><div class='del'>-extern void blk_throtl_bio_endio(struct bio *bio);</div><div class='del'>-extern void blk_throtl_stat_add(struct request *rq, u64 time);</div><div class='del'>-#else</div><div class='del'>-static inline void blk_throtl_bio_endio(struct bio *bio) { }</div><div class='del'>-static inline void blk_throtl_stat_add(struct request *rq, u64 time) { }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct bio *__blk_queue_bounce(struct bio *bio, struct request_queue *q);</div><div class='ctx'> </div><div class='ctx'> static inline bool blk_queue_may_bounce(struct request_queue *q)</div><div class='hunk'>@@ -407,13 +406,85 @@ static inline struct bio *blk_queue_bounce(struct bio *bio,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BLK_DEV_ZONED</div><div class='del'>-void disk_free_zone_bitmaps(struct gendisk *disk);</div><div class='add'>+void disk_init_zone_resources(struct gendisk *disk);</div><div class='add'>+void disk_free_zone_resources(struct gendisk *disk);</div><div class='add'>+static inline bool bio_zone_write_plugging(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	return bio_flagged(bio, BIO_ZONE_WRITE_PLUGGING);</div><div class='add'>+}</div><div class='add'>+static inline bool bio_is_zone_append(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	return bio_op(bio) == REQ_OP_ZONE_APPEND ||</div><div class='add'>+		bio_flagged(bio, BIO_EMULATES_ZONE_APPEND);</div><div class='add'>+}</div><div class='add'>+void blk_zone_write_plug_bio_merged(struct bio *bio);</div><div class='add'>+void blk_zone_write_plug_init_request(struct request *rq);</div><div class='add'>+static inline void blk_zone_update_request_bio(struct request *rq,</div><div class='add'>+					       struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * For zone append requests, the request sector indicates the location</div><div class='add'>+	 * at which the BIO data was written. Return this value to the BIO</div><div class='add'>+	 * issuer through the BIO iter sector.</div><div class='add'>+	 * For plugged zone writes, which include emulated zone append, we need</div><div class='add'>+	 * the original BIO sector so that blk_zone_write_plug_bio_endio() can</div><div class='add'>+	 * lookup the zone write plug.</div><div class='add'>+	 */</div><div class='add'>+	if (req_op(rq) == REQ_OP_ZONE_APPEND || bio_zone_write_plugging(bio))</div><div class='add'>+		bio-&gt;bi_iter.bi_sector = rq-&gt;__sector;</div><div class='add'>+}</div><div class='add'>+void blk_zone_write_plug_bio_endio(struct bio *bio);</div><div class='add'>+static inline void blk_zone_bio_endio(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * For write BIOs to zoned devices, signal the completion of the BIO so</div><div class='add'>+	 * that the next write BIO can be submitted by zone write plugging.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_zone_write_plugging(bio))</div><div class='add'>+		blk_zone_write_plug_bio_endio(bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void blk_zone_write_plug_finish_request(struct request *rq);</div><div class='add'>+static inline void blk_zone_finish_request(struct request *rq)</div><div class='add'>+{</div><div class='add'>+	if (rq-&gt;rq_flags &amp; RQF_ZONE_WRITE_PLUGGING)</div><div class='add'>+		blk_zone_write_plug_finish_request(rq);</div><div class='add'>+}</div><div class='ctx'> int blkdev_report_zones_ioctl(struct block_device *bdev, unsigned int cmd,</div><div class='ctx'> 		unsigned long arg);</div><div class='ctx'> int blkdev_zone_mgmt_ioctl(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 		unsigned int cmd, unsigned long arg);</div><div class='ctx'> #else /* CONFIG_BLK_DEV_ZONED */</div><div class='del'>-static inline void disk_free_zone_bitmaps(struct gendisk *disk) {}</div><div class='add'>+static inline void disk_init_zone_resources(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline void disk_free_zone_resources(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline bool bio_zone_write_plugging(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+static inline bool bio_is_zone_append(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+static inline void blk_zone_write_plug_bio_merged(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline void blk_zone_write_plug_init_request(struct request *rq)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline void blk_zone_update_request_bio(struct request *rq,</div><div class='add'>+					       struct bio *bio)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline void blk_zone_bio_endio(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline void blk_zone_finish_request(struct request *rq)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> static inline int blkdev_report_zones_ioctl(struct block_device *bdev,</div><div class='ctx'> 		unsigned int cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='head'>diff --git a/block/bsg-lib.c b/block/bsg-lib.c<br/>index bcc7dee6abce..ee738d129a9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bsg-lib.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/bsg-lib.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bsg-lib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/bsg-lib.c</a></div><div class='hunk'>@@ -354,12 +354,14 @@ static const struct blk_mq_ops bsg_mq_ops = {</div><div class='ctx'>  * bsg_setup_queue - Create and add the bsg hooks so we can receive requests</div><div class='ctx'>  * @dev: device to attach bsg device to</div><div class='ctx'>  * @name: device to give bsg device</div><div class='add'>+ * @lim: queue limits for the bsg queue</div><div class='ctx'>  * @job_fn: bsg job handler</div><div class='ctx'>  * @timeout: timeout handler function pointer</div><div class='ctx'>  * @dd_job_size: size of LLD data needed for each job</div><div class='ctx'>  */</div><div class='ctx'> struct request_queue *bsg_setup_queue(struct device *dev, const char *name,</div><div class='del'>-		bsg_job_fn *job_fn, bsg_timeout_fn *timeout, int dd_job_size)</div><div class='add'>+		struct queue_limits *lim, bsg_job_fn *job_fn,</div><div class='add'>+		bsg_timeout_fn *timeout, int dd_job_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct bsg_set *bset;</div><div class='ctx'> 	struct blk_mq_tag_set *set;</div><div class='hunk'>@@ -383,7 +385,7 @@ struct request_queue *bsg_setup_queue(struct device *dev, const char *name,</div><div class='ctx'> 	if (blk_mq_alloc_tag_set(set))</div><div class='ctx'> 		goto out_tag_set;</div><div class='ctx'> </div><div class='del'>-	q = blk_mq_alloc_queue(set, NULL, NULL);</div><div class='add'>+	q = blk_mq_alloc_queue(set, lim, NULL);</div><div class='ctx'> 	if (IS_ERR(q)) {</div><div class='ctx'> 		ret = PTR_ERR(q);</div><div class='ctx'> 		goto out_queue;</div><div class='head'>diff --git a/block/elevator.c b/block/elevator.c<br/>index 5ff093cb3cf8..f64ebd726e58 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/elevator.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/elevator.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/elevator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/elevator.c</a></div><div class='hunk'>@@ -83,13 +83,6 @@ bool elv_bio_merge_ok(struct request *rq, struct bio *bio)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(elv_bio_merge_ok);</div><div class='ctx'> </div><div class='del'>-static inline bool elv_support_features(struct request_queue *q,</div><div class='del'>-		const struct elevator_type *e)</div><div class='del'>-{</div><div class='del'>-	return (q-&gt;required_elevator_features &amp; e-&gt;elevator_features) ==</div><div class='del'>-		q-&gt;required_elevator_features;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * elevator_match - Check whether @e's name or alias matches @name</div><div class='ctx'>  * @e: Scheduler to test</div><div class='hunk'>@@ -120,7 +113,7 @@ static struct elevator_type *elevator_find_get(struct request_queue *q,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;elv_list_lock);</div><div class='ctx'> 	e = __elevator_find(name);</div><div class='del'>-	if (e &amp;&amp; (!elv_support_features(q, e) || !elevator_tryget(e)))</div><div class='add'>+	if (e &amp;&amp; (!elevator_tryget(e)))</div><div class='ctx'> 		e = NULL;</div><div class='ctx'> 	spin_unlock(&amp;elv_list_lock);</div><div class='ctx'> 	return e;</div><div class='hunk'>@@ -580,34 +573,8 @@ static struct elevator_type *elevator_get_default(struct request_queue *q)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Get the first elevator providing the features required by the request queue.</div><div class='del'>- * Default to "none" if no matching elevator is found.</div><div class='del'>- */</div><div class='del'>-static struct elevator_type *elevator_get_by_features(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct elevator_type *e, *found = NULL;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;elv_list_lock);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(e, &amp;elv_list, list) {</div><div class='del'>-		if (elv_support_features(q, e)) {</div><div class='del'>-			found = e;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (found &amp;&amp; !elevator_tryget(found))</div><div class='del'>-		found = NULL;</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;elv_list_lock);</div><div class='del'>-	return found;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For a device queue that has no required features, use the default elevator</div><div class='del'>- * settings. Otherwise, use the first elevator available matching the required</div><div class='del'>- * features. If no suitable elevator is find or if the chosen elevator</div><div class='del'>- * initialization fails, fall back to the "none" elevator (no elevator).</div><div class='add'>+ * Use the default elevator settings. If the chosen elevator initialization</div><div class='add'>+ * fails, fall back to the "none" elevator (no elevator).</div><div class='ctx'>  */</div><div class='ctx'> void elevator_init_mq(struct request_queue *q)</div><div class='ctx'> {</div><div class='hunk'>@@ -622,10 +589,7 @@ void elevator_init_mq(struct request_queue *q)</div><div class='ctx'> 	if (unlikely(q-&gt;elevator))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!q-&gt;required_elevator_features)</div><div class='del'>-		e = elevator_get_default(q);</div><div class='del'>-	else</div><div class='del'>-		e = elevator_get_by_features(q);</div><div class='add'>+	e = elevator_get_default(q);</div><div class='ctx'> 	if (!e)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -781,7 +745,7 @@ ssize_t elv_iosched_show(struct request_queue *q, char *name)</div><div class='ctx'> 	list_for_each_entry(e, &amp;elv_list, list) {</div><div class='ctx'> 		if (e == cur)</div><div class='ctx'> 			len += sprintf(name+len, "[%s] ", e-&gt;elevator_name);</div><div class='del'>-		else if (elv_support_features(q, e))</div><div class='add'>+		else</div><div class='ctx'> 			len += sprintf(name+len, "%s ", e-&gt;elevator_name);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;elv_list_lock);</div><div class='head'>diff --git a/block/elevator.h b/block/elevator.h<br/>index 7ca3d7b6ed82..e9a050a96e53 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/elevator.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/elevator.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/elevator.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/elevator.h</a></div><div class='hunk'>@@ -74,7 +74,6 @@ struct elevator_type</div><div class='ctx'> 	struct elv_fs_entry *elevator_attrs;</div><div class='ctx'> 	const char *elevator_name;</div><div class='ctx'> 	const char *elevator_alias;</div><div class='del'>-	const unsigned int elevator_features;</div><div class='ctx'> 	struct module *elevator_owner;</div><div class='ctx'> #ifdef CONFIG_BLK_DEBUG_FS</div><div class='ctx'> 	const struct blk_mq_debugfs_attr *queue_debugfs_attrs;</div><div class='head'>diff --git a/block/fops.c b/block/fops.c<br/>index 679d9b752fe8..7a163f7fe2d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/fops.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/fops.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/fops.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/fops.c</a></div><div class='hunk'>@@ -44,18 +44,15 @@ static bool blkdev_dio_unaligned(struct block_device *bdev, loff_t pos,</div><div class='ctx'> #define DIO_INLINE_BIO_VECS 4</div><div class='ctx'> </div><div class='ctx'> static ssize_t __blkdev_direct_IO_simple(struct kiocb *iocb,</div><div class='del'>-		struct iov_iter *iter, unsigned int nr_pages)</div><div class='add'>+		struct iov_iter *iter, struct block_device *bdev,</div><div class='add'>+		unsigned int nr_pages)</div><div class='ctx'> {</div><div class='del'>-	struct block_device *bdev = I_BDEV(iocb-&gt;ki_filp-&gt;f_mapping-&gt;host);</div><div class='ctx'> 	struct bio_vec inline_vecs[DIO_INLINE_BIO_VECS], *vecs;</div><div class='ctx'> 	loff_t pos = iocb-&gt;ki_pos;</div><div class='ctx'> 	bool should_dirty = false;</div><div class='ctx'> 	struct bio bio;</div><div class='ctx'> 	ssize_t ret;</div><div class='ctx'> </div><div class='del'>-	if (blkdev_dio_unaligned(bdev, pos, iter))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (nr_pages &lt;= DIO_INLINE_BIO_VECS)</div><div class='ctx'> 		vecs = inline_vecs;</div><div class='ctx'> 	else {</div><div class='hunk'>@@ -161,9 +158,8 @@ static void blkdev_bio_end_io(struct bio *bio)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t __blkdev_direct_IO(struct kiocb *iocb, struct iov_iter *iter,</div><div class='del'>-		unsigned int nr_pages)</div><div class='add'>+		struct block_device *bdev, unsigned int nr_pages)</div><div class='ctx'> {</div><div class='del'>-	struct block_device *bdev = I_BDEV(iocb-&gt;ki_filp-&gt;f_mapping-&gt;host);</div><div class='ctx'> 	struct blk_plug plug;</div><div class='ctx'> 	struct blkdev_dio *dio;</div><div class='ctx'> 	struct bio *bio;</div><div class='hunk'>@@ -172,9 +168,6 @@ static ssize_t __blkdev_direct_IO(struct kiocb *iocb, struct iov_iter *iter,</div><div class='ctx'> 	loff_t pos = iocb-&gt;ki_pos;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (blkdev_dio_unaligned(bdev, pos, iter))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (iocb-&gt;ki_flags &amp; IOCB_ALLOC_CACHE)</div><div class='ctx'> 		opf |= REQ_ALLOC_CACHE;</div><div class='ctx'> 	bio = bio_alloc_bioset(bdev, nr_pages, opf, GFP_KERNEL,</div><div class='hunk'>@@ -302,9 +295,9 @@ static void blkdev_bio_end_io_async(struct bio *bio)</div><div class='ctx'> </div><div class='ctx'> static ssize_t __blkdev_direct_IO_async(struct kiocb *iocb,</div><div class='ctx'> 					struct iov_iter *iter,</div><div class='add'>+					struct block_device *bdev,</div><div class='ctx'> 					unsigned int nr_pages)</div><div class='ctx'> {</div><div class='del'>-	struct block_device *bdev = I_BDEV(iocb-&gt;ki_filp-&gt;f_mapping-&gt;host);</div><div class='ctx'> 	bool is_read = iov_iter_rw(iter) == READ;</div><div class='ctx'> 	blk_opf_t opf = is_read ? REQ_OP_READ : dio_bio_write_op(iocb);</div><div class='ctx'> 	struct blkdev_dio *dio;</div><div class='hunk'>@@ -312,9 +305,6 @@ static ssize_t __blkdev_direct_IO_async(struct kiocb *iocb,</div><div class='ctx'> 	loff_t pos = iocb-&gt;ki_pos;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (blkdev_dio_unaligned(bdev, pos, iter))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (iocb-&gt;ki_flags &amp; IOCB_ALLOC_CACHE)</div><div class='ctx'> 		opf |= REQ_ALLOC_CACHE;</div><div class='ctx'> 	bio = bio_alloc_bioset(bdev, nr_pages, opf, GFP_KERNEL,</div><div class='hunk'>@@ -368,18 +358,23 @@ static ssize_t __blkdev_direct_IO_async(struct kiocb *iocb,</div><div class='ctx'> </div><div class='ctx'> static ssize_t blkdev_direct_IO(struct kiocb *iocb, struct iov_iter *iter)</div><div class='ctx'> {</div><div class='add'>+	struct block_device *bdev = I_BDEV(iocb-&gt;ki_filp-&gt;f_mapping-&gt;host);</div><div class='ctx'> 	unsigned int nr_pages;</div><div class='ctx'> </div><div class='ctx'> 	if (!iov_iter_count(iter))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (blkdev_dio_unaligned(bdev, iocb-&gt;ki_pos, iter))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	nr_pages = bio_iov_vecs_to_alloc(iter, BIO_MAX_VECS + 1);</div><div class='ctx'> 	if (likely(nr_pages &lt;= BIO_MAX_VECS)) {</div><div class='ctx'> 		if (is_sync_kiocb(iocb))</div><div class='del'>-			return __blkdev_direct_IO_simple(iocb, iter, nr_pages);</div><div class='del'>-		return __blkdev_direct_IO_async(iocb, iter, nr_pages);</div><div class='add'>+			return __blkdev_direct_IO_simple(iocb, iter, bdev,</div><div class='add'>+							nr_pages);</div><div class='add'>+		return __blkdev_direct_IO_async(iocb, iter, bdev, nr_pages);</div><div class='ctx'> 	}</div><div class='del'>-	return __blkdev_direct_IO(iocb, iter, bio_max_segs(nr_pages));</div><div class='add'>+	return __blkdev_direct_IO(iocb, iter, bdev, bio_max_segs(nr_pages));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int blkdev_iomap_begin(struct inode *inode, loff_t offset, loff_t length,</div><div class='hunk'>@@ -390,7 +385,7 @@ static int blkdev_iomap_begin(struct inode *inode, loff_t offset, loff_t length,</div><div class='ctx'> </div><div class='ctx'> 	iomap-&gt;bdev = bdev;</div><div class='ctx'> 	iomap-&gt;offset = ALIGN_DOWN(offset, bdev_logical_block_size(bdev));</div><div class='del'>-	if (iomap-&gt;offset &gt;= isize)</div><div class='add'>+	if (offset &gt;= isize)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	iomap-&gt;type = IOMAP_MAPPED;</div><div class='ctx'> 	iomap-&gt;addr = iomap-&gt;offset;</div><div class='hunk'>@@ -863,6 +858,7 @@ const struct file_operations def_blk_fops = {</div><div class='ctx'> 	.splice_read	= filemap_splice_read,</div><div class='ctx'> 	.splice_write	= iter_file_splice_write,</div><div class='ctx'> 	.fallocate	= blkdev_fallocate,</div><div class='add'>+	.fop_flags	= FOP_BUFFER_RASYNC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __init int blkdev_init(void)</div><div class='head'>diff --git a/block/genhd.c b/block/genhd.c<br/>index bb29a68e1d67..7f39fbe60753 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/genhd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/genhd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/genhd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/genhd.c</a></div><div class='hunk'>@@ -118,7 +118,7 @@ static void part_stat_read_all(struct block_device *part,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int part_in_flight(struct block_device *part)</div><div class='add'>+unsigned int part_in_flight(struct block_device *part)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int inflight = 0;</div><div class='ctx'> 	int cpu;</div><div class='hunk'>@@ -345,9 +345,7 @@ int disk_scan_partitions(struct gendisk *disk, blk_mode_t mode)</div><div class='ctx'> 	struct file *file;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (disk-&gt;flags &amp; (GENHD_FL_NO_PART | GENHD_FL_HIDDEN))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (test_bit(GD_SUPPRESS_PART_SCAN, &amp;disk-&gt;state))</div><div class='add'>+	if (!disk_has_partscan(disk))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (disk-&gt;open_partitions)</div><div class='ctx'> 		return -EBUSY;</div><div class='hunk'>@@ -503,8 +501,7 @@ int __must_check device_add_disk(struct device *parent, struct gendisk *disk,</div><div class='ctx'> 			goto out_unregister_bdi;</div><div class='ctx'> </div><div class='ctx'> 		/* Make sure the first partition scan will be proceed */</div><div class='del'>-		if (get_capacity(disk) &amp;&amp; !(disk-&gt;flags &amp; GENHD_FL_NO_PART) &amp;&amp;</div><div class='del'>-		    !test_bit(GD_SUPPRESS_PART_SCAN, &amp;disk-&gt;state))</div><div class='add'>+		if (get_capacity(disk) &amp;&amp; disk_has_partscan(disk))</div><div class='ctx'> 			set_bit(GD_NEED_PART_SCAN, &amp;disk-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 		bdev_add(disk-&gt;part0, ddev-&gt;devt);</div><div class='hunk'>@@ -954,15 +951,10 @@ ssize_t part_stat_show(struct device *dev,</div><div class='ctx'> 		       struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct block_device *bdev = dev_to_bdev(dev);</div><div class='del'>-	struct request_queue *q = bdev_get_queue(bdev);</div><div class='ctx'> 	struct disk_stats stat;</div><div class='ctx'> 	unsigned int inflight;</div><div class='ctx'> </div><div class='del'>-	if (queue_is_mq(q))</div><div class='del'>-		inflight = blk_mq_in_flight(q, bdev);</div><div class='del'>-	else</div><div class='del'>-		inflight = part_in_flight(bdev);</div><div class='del'>-</div><div class='add'>+	inflight = part_in_flight(bdev);</div><div class='ctx'> 	if (inflight) {</div><div class='ctx'> 		part_stat_lock();</div><div class='ctx'> 		update_io_ticks(bdev, jiffies, true);</div><div class='hunk'>@@ -1047,6 +1039,12 @@ static ssize_t diskseq_show(struct device *dev,</div><div class='ctx'> 	return sprintf(buf, "%llu\n", disk-&gt;diskseq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t partscan_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	return sprintf(buf, "%u\n", disk_has_partscan(dev_to_disk(dev)));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static DEVICE_ATTR(range, 0444, disk_range_show, NULL);</div><div class='ctx'> static DEVICE_ATTR(ext_range, 0444, disk_ext_range_show, NULL);</div><div class='ctx'> static DEVICE_ATTR(removable, 0444, disk_removable_show, NULL);</div><div class='hunk'>@@ -1060,6 +1058,7 @@ static DEVICE_ATTR(stat, 0444, part_stat_show, NULL);</div><div class='ctx'> static DEVICE_ATTR(inflight, 0444, part_inflight_show, NULL);</div><div class='ctx'> static DEVICE_ATTR(badblocks, 0644, disk_badblocks_show, disk_badblocks_store);</div><div class='ctx'> static DEVICE_ATTR(diskseq, 0444, diskseq_show, NULL);</div><div class='add'>+static DEVICE_ATTR(partscan, 0444, partscan_show, NULL);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FAIL_MAKE_REQUEST</div><div class='ctx'> ssize_t part_fail_show(struct device *dev,</div><div class='hunk'>@@ -1106,6 +1105,7 @@ static struct attribute *disk_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_events_async.attr,</div><div class='ctx'> 	&amp;dev_attr_events_poll_msecs.attr,</div><div class='ctx'> 	&amp;dev_attr_diskseq.attr,</div><div class='add'>+	&amp;dev_attr_partscan.attr,</div><div class='ctx'> #ifdef CONFIG_FAIL_MAKE_REQUEST</div><div class='ctx'> 	&amp;dev_attr_fail.attr,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1182,7 +1182,7 @@ static void disk_release(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	disk_release_events(disk);</div><div class='ctx'> 	kfree(disk-&gt;random);</div><div class='del'>-	disk_free_zone_bitmaps(disk);</div><div class='add'>+	disk_free_zone_resources(disk);</div><div class='ctx'> 	xa_destroy(&amp;disk-&gt;part_tbl);</div><div class='ctx'> </div><div class='ctx'> 	disk-&gt;queue-&gt;disk = NULL;</div><div class='hunk'>@@ -1251,11 +1251,8 @@ static int diskstats_show(struct seq_file *seqf, void *v)</div><div class='ctx'> 	xa_for_each(&amp;gp-&gt;part_tbl, idx, hd) {</div><div class='ctx'> 		if (bdev_is_partition(hd) &amp;&amp; !bdev_nr_sectors(hd))</div><div class='ctx'> 			continue;</div><div class='del'>-		if (queue_is_mq(gp-&gt;queue))</div><div class='del'>-			inflight = blk_mq_in_flight(gp-&gt;queue, hd);</div><div class='del'>-		else</div><div class='del'>-			inflight = part_in_flight(hd);</div><div class='ctx'> </div><div class='add'>+		inflight = part_in_flight(hd);</div><div class='ctx'> 		if (inflight) {</div><div class='ctx'> 			part_stat_lock();</div><div class='ctx'> 			update_io_ticks(hd, jiffies, true);</div><div class='hunk'>@@ -1364,6 +1361,7 @@ struct gendisk *__alloc_disk_node(struct request_queue *q, int node_id,</div><div class='ctx'> 	if (blkcg_init_disk(disk))</div><div class='ctx'> 		goto out_erase_part0;</div><div class='ctx'> </div><div class='add'>+	disk_init_zone_resources(disk);</div><div class='ctx'> 	rand_initialize_disk(disk);</div><div class='ctx'> 	disk_to_dev(disk)-&gt;class = &amp;block_class;</div><div class='ctx'> 	disk_to_dev(disk)-&gt;type = &amp;disk_type;</div><div class='head'>diff --git a/block/ioctl.c b/block/ioctl.c<br/>index f505f9c341eb..c7db3bd2d653 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/ioctl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/ioctl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/ioctl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/ioctl.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@ static int blkpg_do_ioctl(struct block_device *bdev,</div><div class='ctx'> 	if (op == BLKPG_DEL_PARTITION)</div><div class='ctx'> 		return bdev_del_partition(disk, p.pno);</div><div class='ctx'> </div><div class='del'>-	if (p.start &lt; 0 || p.length &lt;= 0 || p.start + p.length &lt; 0)</div><div class='add'>+	if (p.start &lt; 0 || p.length &lt;= 0 || LLONG_MAX - p.length &lt; p.start)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	/* Check that the partition is aligned to the block size */</div><div class='ctx'> 	if (!IS_ALIGNED(p.start | p.length, bdev_logical_block_size(bdev)))</div><div class='hunk'>@@ -95,9 +95,12 @@ static int compat_blkpg_ioctl(struct block_device *bdev,</div><div class='ctx'> static int blk_ioctl_discard(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 		unsigned long arg)</div><div class='ctx'> {</div><div class='del'>-	uint64_t range[2];</div><div class='del'>-	uint64_t start, len, end;</div><div class='add'>+	unsigned int bs_mask = bdev_logical_block_size(bdev) - 1;</div><div class='ctx'> 	struct inode *inode = bdev-&gt;bd_inode;</div><div class='add'>+	uint64_t range[2], start, len, end;</div><div class='add'>+	struct bio *prev = NULL, *bio;</div><div class='add'>+	sector_t sector, nr_sects;</div><div class='add'>+	struct blk_plug plug;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!(mode &amp; BLK_OPEN_WRITE))</div><div class='hunk'>@@ -105,6 +108,8 @@ static int blk_ioctl_discard(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> </div><div class='ctx'> 	if (!bdev_max_discard_sectors(bdev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='add'>+	if (bdev_read_only(bdev))</div><div class='add'>+		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(range, (void __user *)arg, sizeof(range)))</div><div class='ctx'> 		return -EFAULT;</div><div class='hunk'>@@ -112,9 +117,9 @@ static int blk_ioctl_discard(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 	start = range[0];</div><div class='ctx'> 	len = range[1];</div><div class='ctx'> </div><div class='del'>-	if (start &amp; 511)</div><div class='add'>+	if (!len)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (len &amp; 511)</div><div class='add'>+	if ((start | len) &amp; bs_mask)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (check_add_overflow(start, len, &amp;end) ||</div><div class='hunk'>@@ -125,7 +130,32 @@ static int blk_ioctl_discard(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 	err = truncate_bdev_range(bdev, mode, start, start + len - 1);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto fail;</div><div class='del'>-	err = blkdev_issue_discard(bdev, start &gt;&gt; 9, len &gt;&gt; 9, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	sector = start &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+	nr_sects = len &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+</div><div class='add'>+	blk_start_plug(&amp;plug);</div><div class='add'>+	while (1) {</div><div class='add'>+		if (fatal_signal_pending(current)) {</div><div class='add'>+			if (prev)</div><div class='add'>+				bio_await_chain(prev);</div><div class='add'>+			err = -EINTR;</div><div class='add'>+			goto out_unplug;</div><div class='add'>+		}</div><div class='add'>+		bio = blk_alloc_discard_bio(bdev, &amp;sector, &amp;nr_sects,</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+		if (!bio)</div><div class='add'>+			break;</div><div class='add'>+		prev = bio_chain_and_submit(prev, bio);</div><div class='add'>+	}</div><div class='add'>+	if (prev) {</div><div class='add'>+		err = submit_bio_wait(prev);</div><div class='add'>+		if (err == -EOPNOTSUPP)</div><div class='add'>+			err = 0;</div><div class='add'>+		bio_put(prev);</div><div class='add'>+	}</div><div class='add'>+out_unplug:</div><div class='add'>+	blk_finish_plug(&amp;plug);</div><div class='ctx'> fail:</div><div class='ctx'> 	filemap_invalidate_unlock(inode-&gt;i_mapping);</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/block/mq-deadline.c b/block/mq-deadline.c<br/>index 02a916ba62ee..94eede4fb9eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/mq-deadline.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/mq-deadline.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/mq-deadline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/mq-deadline.c</a></div><div class='hunk'>@@ -102,7 +102,6 @@ struct deadline_data {</div><div class='ctx'> 	int prio_aging_expire;</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t lock;</div><div class='del'>-	spinlock_t zone_lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Maps an I/O priority class to a deadline scheduler priority. */</div><div class='hunk'>@@ -129,36 +128,7 @@ static u8 dd_rq_ioclass(struct request *rq)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * get the request before `rq' in sector-sorted order</div><div class='del'>- */</div><div class='del'>-static inline struct request *</div><div class='del'>-deadline_earlier_request(struct request *rq)</div><div class='del'>-{</div><div class='del'>-	struct rb_node *node = rb_prev(&amp;rq-&gt;rb_node);</div><div class='del'>-</div><div class='del'>-	if (node)</div><div class='del'>-		return rb_entry_rq(node);</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * get the request after `rq' in sector-sorted order</div><div class='del'>- */</div><div class='del'>-static inline struct request *</div><div class='del'>-deadline_latter_request(struct request *rq)</div><div class='del'>-{</div><div class='del'>-	struct rb_node *node = rb_next(&amp;rq-&gt;rb_node);</div><div class='del'>-</div><div class='del'>-	if (node)</div><div class='del'>-		return rb_entry_rq(node);</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the first request for which blk_rq_pos() &gt;= @pos. For zoned devices,</div><div class='del'>- * return the first request after the start of the zone containing @pos.</div><div class='add'>+ * Return the first request for which blk_rq_pos() &gt;= @pos.</div><div class='ctx'>  */</div><div class='ctx'> static inline struct request *deadline_from_pos(struct dd_per_prio *per_prio,</div><div class='ctx'> 				enum dd_data_dir data_dir, sector_t pos)</div><div class='hunk'>@@ -170,14 +140,6 @@ static inline struct request *deadline_from_pos(struct dd_per_prio *per_prio,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	rq = rb_entry_rq(node);</div><div class='del'>-	/*</div><div class='del'>-	 * A zoned write may have been requeued with a starting position that</div><div class='del'>-	 * is below that of the most recently dispatched request. Hence, for</div><div class='del'>-	 * zoned writes, start searching from the start of a zone.</div><div class='del'>-	 */</div><div class='del'>-	if (blk_rq_is_seq_zoned_write(rq))</div><div class='del'>-		pos = round_down(pos, rq-&gt;q-&gt;limits.chunk_sectors);</div><div class='del'>-</div><div class='ctx'> 	while (node) {</div><div class='ctx'> 		rq = rb_entry_rq(node);</div><div class='ctx'> 		if (blk_rq_pos(rq) &gt;= pos) {</div><div class='hunk'>@@ -309,36 +271,6 @@ static inline bool deadline_check_fifo(struct dd_per_prio *per_prio,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Check if rq has a sequential request preceding it.</div><div class='del'>- */</div><div class='del'>-static bool deadline_is_seq_write(struct deadline_data *dd, struct request *rq)</div><div class='del'>-{</div><div class='del'>-	struct request *prev = deadline_earlier_request(rq);</div><div class='del'>-</div><div class='del'>-	if (!prev)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return blk_rq_pos(prev) + blk_rq_sectors(prev) == blk_rq_pos(rq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Skip all write requests that are sequential from @rq, even if we cross</div><div class='del'>- * a zone boundary.</div><div class='del'>- */</div><div class='del'>-static struct request *deadline_skip_seq_writes(struct deadline_data *dd,</div><div class='del'>-						struct request *rq)</div><div class='del'>-{</div><div class='del'>-	sector_t pos = blk_rq_pos(rq);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		pos += blk_rq_sectors(rq);</div><div class='del'>-		rq = deadline_latter_request(rq);</div><div class='del'>-	} while (rq &amp;&amp; blk_rq_pos(rq) == pos);</div><div class='del'>-</div><div class='del'>-	return rq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * For the specified data direction, return the next request to</div><div class='ctx'>  * dispatch using arrival ordered lists.</div><div class='ctx'>  */</div><div class='hunk'>@@ -346,40 +278,10 @@ static struct request *</div><div class='ctx'> deadline_fifo_request(struct deadline_data *dd, struct dd_per_prio *per_prio,</div><div class='ctx'> 		      enum dd_data_dir data_dir)</div><div class='ctx'> {</div><div class='del'>-	struct request *rq, *rb_rq, *next;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='ctx'> 	if (list_empty(&amp;per_prio-&gt;fifo_list[data_dir]))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	rq = rq_entry_fifo(per_prio-&gt;fifo_list[data_dir].next);</div><div class='del'>-	if (data_dir == DD_READ || !blk_queue_is_zoned(rq-&gt;q))</div><div class='del'>-		return rq;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Look for a write request that can be dispatched, that is one with</div><div class='del'>-	 * an unlocked target zone. For some HDDs, breaking a sequential</div><div class='del'>-	 * write stream can lead to lower throughput, so make sure to preserve</div><div class='del'>-	 * sequential write streams, even if that stream crosses into the next</div><div class='del'>-	 * zones and these zones are unlocked.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_irqsave(&amp;dd-&gt;zone_lock, flags);</div><div class='del'>-	list_for_each_entry_safe(rq, next, &amp;per_prio-&gt;fifo_list[DD_WRITE],</div><div class='del'>-				 queuelist) {</div><div class='del'>-		/* Check whether a prior request exists for the same zone. */</div><div class='del'>-		rb_rq = deadline_from_pos(per_prio, data_dir, blk_rq_pos(rq));</div><div class='del'>-		if (rb_rq &amp;&amp; blk_rq_pos(rb_rq) &lt; blk_rq_pos(rq))</div><div class='del'>-			rq = rb_rq;</div><div class='del'>-		if (blk_req_can_dispatch_to_zone(rq) &amp;&amp;</div><div class='del'>-		    (blk_queue_nonrot(rq-&gt;q) ||</div><div class='del'>-		     !deadline_is_seq_write(dd, rq)))</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-	rq = NULL;</div><div class='del'>-out:</div><div class='del'>-	spin_unlock_irqrestore(&amp;dd-&gt;zone_lock, flags);</div><div class='del'>-</div><div class='del'>-	return rq;</div><div class='add'>+	return rq_entry_fifo(per_prio-&gt;fifo_list[data_dir].next);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -390,36 +292,8 @@ static struct request *</div><div class='ctx'> deadline_next_request(struct deadline_data *dd, struct dd_per_prio *per_prio,</div><div class='ctx'> 		      enum dd_data_dir data_dir)</div><div class='ctx'> {</div><div class='del'>-	struct request *rq;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	rq = deadline_from_pos(per_prio, data_dir,</div><div class='del'>-			       per_prio-&gt;latest_pos[data_dir]);</div><div class='del'>-	if (!rq)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (data_dir == DD_READ || !blk_queue_is_zoned(rq-&gt;q))</div><div class='del'>-		return rq;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Look for a write request that can be dispatched, that is one with</div><div class='del'>-	 * an unlocked target zone. For some HDDs, breaking a sequential</div><div class='del'>-	 * write stream can lead to lower throughput, so make sure to preserve</div><div class='del'>-	 * sequential write streams, even if that stream crosses into the next</div><div class='del'>-	 * zones and these zones are unlocked.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_irqsave(&amp;dd-&gt;zone_lock, flags);</div><div class='del'>-	while (rq) {</div><div class='del'>-		if (blk_req_can_dispatch_to_zone(rq))</div><div class='del'>-			break;</div><div class='del'>-		if (blk_queue_nonrot(rq-&gt;q))</div><div class='del'>-			rq = deadline_latter_request(rq);</div><div class='del'>-		else</div><div class='del'>-			rq = deadline_skip_seq_writes(dd, rq);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;dd-&gt;zone_lock, flags);</div><div class='del'>-</div><div class='del'>-	return rq;</div><div class='add'>+	return deadline_from_pos(per_prio, data_dir,</div><div class='add'>+				 per_prio-&gt;latest_pos[data_dir]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -525,10 +399,6 @@ dispatch_find_request:</div><div class='ctx'> 		rq = next_rq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * For a zoned block device, if we only have writes queued and none of</div><div class='del'>-	 * them can be dispatched, rq will be NULL.</div><div class='del'>-	 */</div><div class='ctx'> 	if (!rq)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -549,10 +419,6 @@ done:</div><div class='ctx'> 	prio = ioprio_class_to_prio[ioprio_class];</div><div class='ctx'> 	dd-&gt;per_prio[prio].latest_pos[data_dir] = blk_rq_pos(rq);</div><div class='ctx'> 	dd-&gt;per_prio[prio].stats.dispatched++;</div><div class='del'>-	/*</div><div class='del'>-	 * If the request needs its target zone locked, do it.</div><div class='del'>-	 */</div><div class='del'>-	blk_req_zone_write_lock(rq);</div><div class='ctx'> 	rq-&gt;rq_flags |= RQF_STARTED;</div><div class='ctx'> 	return rq;</div><div class='ctx'> }</div><div class='hunk'>@@ -722,7 +588,6 @@ static int dd_init_sched(struct request_queue *q, struct elevator_type *e)</div><div class='ctx'> 	dd-&gt;fifo_batch = fifo_batch;</div><div class='ctx'> 	dd-&gt;prio_aging_expire = prio_aging_expire;</div><div class='ctx'> 	spin_lock_init(&amp;dd-&gt;lock);</div><div class='del'>-	spin_lock_init(&amp;dd-&gt;zone_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* We dispatch from request queue wide instead of hw queue */</div><div class='ctx'> 	blk_queue_flag_set(QUEUE_FLAG_SQ_SCHED, q);</div><div class='hunk'>@@ -804,12 +669,6 @@ static void dd_insert_request(struct blk_mq_hw_ctx *hctx, struct request *rq,</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;dd-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This may be a requeue of a write request that has locked its</div><div class='del'>-	 * target zone. If it is the case, this releases the zone lock.</div><div class='del'>-	 */</div><div class='del'>-	blk_req_zone_write_unlock(rq);</div><div class='del'>-</div><div class='ctx'> 	prio = ioprio_class_to_prio[ioprio_class];</div><div class='ctx'> 	per_prio = &amp;dd-&gt;per_prio[prio];</div><div class='ctx'> 	if (!rq-&gt;elv.priv[0]) {</div><div class='hunk'>@@ -841,18 +700,6 @@ static void dd_insert_request(struct blk_mq_hw_ctx *hctx, struct request *rq,</div><div class='ctx'> 		 */</div><div class='ctx'> 		rq-&gt;fifo_time = jiffies + dd-&gt;fifo_expire[data_dir];</div><div class='ctx'> 		insert_before = &amp;per_prio-&gt;fifo_list[data_dir];</div><div class='del'>-#ifdef CONFIG_BLK_DEV_ZONED</div><div class='del'>-		/*</div><div class='del'>-		 * Insert zoned writes such that requests are sorted by</div><div class='del'>-		 * position per zone.</div><div class='del'>-		 */</div><div class='del'>-		if (blk_rq_is_seq_zoned_write(rq)) {</div><div class='del'>-			struct request *rq2 = deadline_latter_request(rq);</div><div class='del'>-</div><div class='del'>-			if (rq2 &amp;&amp; blk_rq_zone_no(rq2) == blk_rq_zone_no(rq))</div><div class='del'>-				insert_before = &amp;rq2-&gt;queuelist;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='ctx'> 		list_add_tail(&amp;rq-&gt;queuelist, insert_before);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -887,33 +734,8 @@ static void dd_prepare_request(struct request *rq)</div><div class='ctx'> 	rq-&gt;elv.priv[0] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dd_has_write_work(struct blk_mq_hw_ctx *hctx)</div><div class='del'>-{</div><div class='del'>-	struct deadline_data *dd = hctx-&gt;queue-&gt;elevator-&gt;elevator_data;</div><div class='del'>-	enum dd_prio p;</div><div class='del'>-</div><div class='del'>-	for (p = 0; p &lt;= DD_PRIO_MAX; p++)</div><div class='del'>-		if (!list_empty_careful(&amp;dd-&gt;per_prio[p].fifo_list[DD_WRITE]))</div><div class='del'>-			return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Callback from inside blk_mq_free_request().</div><div class='del'>- *</div><div class='del'>- * For zoned block devices, write unlock the target zone of</div><div class='del'>- * completed write requests. Do this while holding the zone lock</div><div class='del'>- * spinlock so that the zone is never unlocked while deadline_fifo_request()</div><div class='del'>- * or deadline_next_request() are executing. This function is called for</div><div class='del'>- * all requests, whether or not these requests complete successfully.</div><div class='del'>- *</div><div class='del'>- * For a zoned block device, __dd_dispatch_request() may have stopped</div><div class='del'>- * dispatching requests if all the queued requests are write requests directed</div><div class='del'>- * at zones that are already locked due to on-going write requests. To ensure</div><div class='del'>- * write request dispatch progress in this case, mark the queue as needing a</div><div class='del'>- * restart to ensure that the queue is run again after completion of the</div><div class='del'>- * request and zones being unlocked.</div><div class='ctx'>  */</div><div class='ctx'> static void dd_finish_request(struct request *rq)</div><div class='ctx'> {</div><div class='hunk'>@@ -928,21 +750,8 @@ static void dd_finish_request(struct request *rq)</div><div class='ctx'> 	 * called dd_insert_requests(). Skip requests that bypassed I/O</div><div class='ctx'> 	 * scheduling. See also blk_mq_request_bypass_insert().</div><div class='ctx'> 	 */</div><div class='del'>-	if (!rq-&gt;elv.priv[0])</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	atomic_inc(&amp;per_prio-&gt;stats.completed);</div><div class='del'>-</div><div class='del'>-	if (blk_queue_is_zoned(q)) {</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		spin_lock_irqsave(&amp;dd-&gt;zone_lock, flags);</div><div class='del'>-		blk_req_zone_write_unlock(rq);</div><div class='del'>-		spin_unlock_irqrestore(&amp;dd-&gt;zone_lock, flags);</div><div class='del'>-</div><div class='del'>-		if (dd_has_write_work(rq-&gt;mq_hctx))</div><div class='del'>-			blk_mq_sched_mark_restart_hctx(rq-&gt;mq_hctx);</div><div class='del'>-	}</div><div class='add'>+	if (rq-&gt;elv.priv[0])</div><div class='add'>+		atomic_inc(&amp;per_prio-&gt;stats.completed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool dd_has_work_for_prio(struct dd_per_prio *per_prio)</div><div class='hunk'>@@ -1266,7 +1075,6 @@ static struct elevator_type mq_deadline = {</div><div class='ctx'> 	.elevator_attrs = deadline_attrs,</div><div class='ctx'> 	.elevator_name = "mq-deadline",</div><div class='ctx'> 	.elevator_alias = "deadline",</div><div class='del'>-	.elevator_features = ELEVATOR_F_ZBD_SEQ_WRITE,</div><div class='ctx'> 	.elevator_owner = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> MODULE_ALIAS("mq-deadline-iosched");</div><div class='head'>diff --git a/block/partitions/cmdline.c b/block/partitions/cmdline.c<br/>index c03bc105e575..152c85df92b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/partitions/cmdline.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/partitions/cmdline.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/partitions/cmdline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/partitions/cmdline.c</a></div><div class='hunk'>@@ -70,8 +70,8 @@ static int parse_subpart(struct cmdline_subpart **subpart, char *partdef)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*partdef == '(') {</div><div class='del'>-		int length;</div><div class='del'>-		char *next = strchr(++partdef, ')');</div><div class='add'>+		partdef++;</div><div class='add'>+		char *next = strsep(&amp;partdef, ")");</div><div class='ctx'> </div><div class='ctx'> 		if (!next) {</div><div class='ctx'> 			pr_warn("cmdline partition format is invalid.");</div><div class='hunk'>@@ -79,11 +79,7 @@ static int parse_subpart(struct cmdline_subpart **subpart, char *partdef)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		length = min_t(int, next - partdef,</div><div class='del'>-			       sizeof(new_subpart-&gt;name) - 1);</div><div class='del'>-		strscpy(new_subpart-&gt;name, partdef, length);</div><div class='del'>-</div><div class='del'>-		partdef = ++next;</div><div class='add'>+		strscpy(new_subpart-&gt;name, next, sizeof(new_subpart-&gt;name));</div><div class='ctx'> 	} else</div><div class='ctx'> 		new_subpart-&gt;name[0] = '\0';</div><div class='ctx'> </div><div class='hunk'>@@ -117,14 +113,12 @@ static void free_subpart(struct cmdline_parts *parts)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int parse_parts(struct cmdline_parts **parts, const char *bdevdef)</div><div class='add'>+static int parse_parts(struct cmdline_parts **parts, char *bdevdef)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> 	char *next;</div><div class='del'>-	int length;</div><div class='ctx'> 	struct cmdline_subpart **next_subpart;</div><div class='ctx'> 	struct cmdline_parts *newparts;</div><div class='del'>-	char buf[BDEVNAME_SIZE + 32 + 4];</div><div class='ctx'> </div><div class='ctx'> 	*parts = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -132,28 +126,19 @@ static int parse_parts(struct cmdline_parts **parts, const char *bdevdef)</div><div class='ctx'> 	if (!newparts)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	next = strchr(bdevdef, ':');</div><div class='add'>+	next = strsep(&amp;bdevdef, ":");</div><div class='ctx'> 	if (!next) {</div><div class='ctx'> 		pr_warn("cmdline partition has no block device.");</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	length = min_t(int, next - bdevdef, sizeof(newparts-&gt;name) - 1);</div><div class='del'>-	strscpy(newparts-&gt;name, bdevdef, length);</div><div class='add'>+	strscpy(newparts-&gt;name, next, sizeof(newparts-&gt;name));</div><div class='ctx'> 	newparts-&gt;nr_subparts = 0;</div><div class='ctx'> </div><div class='ctx'> 	next_subpart = &amp;newparts-&gt;subpart;</div><div class='ctx'> </div><div class='del'>-	while (next &amp;&amp; *(++next)) {</div><div class='del'>-		bdevdef = next;</div><div class='del'>-		next = strchr(bdevdef, ',');</div><div class='del'>-</div><div class='del'>-		length = (!next) ? (sizeof(buf) - 1) :</div><div class='del'>-			min_t(int, next - bdevdef, sizeof(buf) - 1);</div><div class='del'>-</div><div class='del'>-		strscpy(buf, bdevdef, length);</div><div class='del'>-</div><div class='del'>-		ret = parse_subpart(next_subpart, buf);</div><div class='add'>+	while ((next = strsep(&amp;bdevdef, ","))) {</div><div class='add'>+		ret = parse_subpart(next_subpart, next);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -199,24 +184,17 @@ static int cmdline_parts_parse(struct cmdline_parts **parts,</div><div class='ctx'> </div><div class='ctx'> 	*parts = NULL;</div><div class='ctx'> </div><div class='del'>-	next = pbuf = buf = kstrdup(cmdline, GFP_KERNEL);</div><div class='add'>+	pbuf = buf = kstrdup(cmdline, GFP_KERNEL);</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	next_parts = parts;</div><div class='ctx'> </div><div class='del'>-	while (next &amp;&amp; *pbuf) {</div><div class='del'>-		next = strchr(pbuf, ';');</div><div class='del'>-		if (next)</div><div class='del'>-			*next = '\0';</div><div class='del'>-</div><div class='del'>-		ret = parse_parts(next_parts, pbuf);</div><div class='add'>+	while ((next = strsep(&amp;pbuf, ";"))) {</div><div class='add'>+		ret = parse_parts(next_parts, next);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> </div><div class='del'>-		if (next)</div><div class='del'>-			pbuf = ++next;</div><div class='del'>-</div><div class='ctx'> 		next_parts = &amp;(*next_parts)-&gt;next_parts;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +228,6 @@ static struct cmdline_parts *bdev_parts;</div><div class='ctx'> static int add_part(int slot, struct cmdline_subpart *subpart,</div><div class='ctx'> 		struct parsed_partitions *state)</div><div class='ctx'> {</div><div class='del'>-	int label_min;</div><div class='ctx'> 	struct partition_meta_info *info;</div><div class='ctx'> 	char tmp[sizeof(info-&gt;volname) + 4];</div><div class='ctx'> </div><div class='hunk'>@@ -262,9 +239,7 @@ static int add_part(int slot, struct cmdline_subpart *subpart,</div><div class='ctx'> </div><div class='ctx'> 	info = &amp;state-&gt;parts[slot].info;</div><div class='ctx'> </div><div class='del'>-	label_min = min_t(int, sizeof(info-&gt;volname) - 1,</div><div class='del'>-			  sizeof(subpart-&gt;name));</div><div class='del'>-	strscpy(info-&gt;volname, subpart-&gt;name, label_min);</div><div class='add'>+	strscpy(info-&gt;volname, subpart-&gt;name, sizeof(info-&gt;volname));</div><div class='ctx'> </div><div class='ctx'> 	snprintf(tmp, sizeof(tmp), "(%s)", info-&gt;volname);</div><div class='ctx'> 	strlcat(state-&gt;pp_buf, tmp, PAGE_SIZE);</div><div class='head'>diff --git a/block/partitions/core.c b/block/partitions/core.c<br/>index b11e88c82c8c..37b5f92d07fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/partitions/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>block/partitions/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/partitions/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>block/partitions/core.c</a></div><div class='hunk'>@@ -573,10 +573,7 @@ static int blk_add_partitions(struct gendisk *disk)</div><div class='ctx'> 	struct parsed_partitions *state;</div><div class='ctx'> 	int ret = -EAGAIN, p;</div><div class='ctx'> </div><div class='del'>-	if (disk-&gt;flags &amp; GENHD_FL_NO_PART)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (test_bit(GD_SUPPRESS_PART_SCAN, &amp;disk-&gt;state))</div><div class='add'>+	if (!disk_has_partscan(disk))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	state = check_partition(disk);</div><div class='head'>diff --git a/crypto/Kconfig b/crypto/Kconfig<br/>index 2903ce19f15c..5688d42a59c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/Kconfig</a></div><div class='hunk'>@@ -1456,26 +1456,6 @@ config CRYPTO_USER_API_ENABLE_OBSOLETE</div><div class='ctx'> 	  already been phased out from internal use by the kernel, and are</div><div class='ctx'> 	  only useful for userspace clients that still rely on them.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_STATS</div><div class='del'>-	bool "Crypto usage statistics"</div><div class='del'>-	depends on CRYPTO_USER</div><div class='del'>-	help</div><div class='del'>-	  Enable the gathering of crypto stats.</div><div class='del'>-</div><div class='del'>-	  Enabling this option reduces the performance of the crypto API.  It</div><div class='del'>-	  should only be enabled when there is actually a use case for it.</div><div class='del'>-</div><div class='del'>-	  This collects data sizes, numbers of requests, and numbers</div><div class='del'>-	  of errors processed by:</div><div class='del'>-	  - AEAD ciphers (encrypt, decrypt)</div><div class='del'>-	  - asymmetric key ciphers (encrypt, decrypt, verify, sign)</div><div class='del'>-	  - symmetric key ciphers (encrypt, decrypt)</div><div class='del'>-	  - compression algorithms (compress, decompress)</div><div class='del'>-	  - hash algorithms (hash)</div><div class='del'>-	  - key-agreement protocol primitives (setsecret, generate</div><div class='del'>-	    public key, compute shared secret)</div><div class='del'>-	  - RNG (generate, seed)</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_HASH_INFO</div><div class='head'>diff --git a/crypto/Makefile b/crypto/Makefile<br/>index 408f0a1f9ab9..edbbaa3ffef5 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/Makefile</a></div><div class='hunk'>@@ -20,6 +20,9 @@ crypto_skcipher-y += lskcipher.o</div><div class='ctx'> crypto_skcipher-y += skcipher.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SKCIPHER2) += crypto_skcipher.o</div><div class='add'>+ifeq ($(CONFIG_BPF_SYSCALL),y)</div><div class='add'>+obj-$(CONFIG_CRYPTO_SKCIPHER2) += bpf_crypto_skcipher.o</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SEQIV) += seqiv.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ECHAINIV) += echainiv.o</div><div class='hunk'>@@ -69,8 +72,6 @@ cryptomgr-y := algboss.o testmgr.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_MANAGER2) += cryptomgr.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_USER) += crypto_user.o</div><div class='del'>-crypto_user-y := crypto_user_base.o</div><div class='del'>-crypto_user-$(CONFIG_CRYPTO_STATS) += crypto_user_stat.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CMAC) += cmac.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_HMAC) += hmac.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_VMAC) += vmac.o</div><div class='head'>diff --git a/crypto/acompress.c b/crypto/acompress.c<br/>index 1c682810a484..6fdf0ff9f3c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/acompress.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/acompress.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/acompress.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/acompress.c</a></div><div class='hunk'>@@ -93,32 +93,6 @@ static unsigned int crypto_acomp_extsize(struct crypto_alg *alg)</div><div class='ctx'> 	return extsize;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __crypto_acomp_report_stat(struct sk_buff *skb,</div><div class='del'>-					     struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct comp_alg_common *calg = __crypto_comp_alg_common(alg);</div><div class='del'>-	struct crypto_istat_compress *istat = comp_get_stat(calg);</div><div class='del'>-	struct crypto_stat_compress racomp;</div><div class='del'>-</div><div class='del'>-	memset(&amp;racomp, 0, sizeof(racomp));</div><div class='del'>-</div><div class='del'>-	strscpy(racomp.type, "acomp", sizeof(racomp.type));</div><div class='del'>-	racomp.stat_compress_cnt = atomic64_read(&amp;istat-&gt;compress_cnt);</div><div class='del'>-	racomp.stat_compress_tlen = atomic64_read(&amp;istat-&gt;compress_tlen);</div><div class='del'>-	racomp.stat_decompress_cnt =  atomic64_read(&amp;istat-&gt;decompress_cnt);</div><div class='del'>-	racomp.stat_decompress_tlen = atomic64_read(&amp;istat-&gt;decompress_tlen);</div><div class='del'>-	racomp.stat_err_cnt = atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_ACOMP, sizeof(racomp), &amp;racomp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-int crypto_acomp_report_stat(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return __crypto_acomp_report_stat(skb, alg);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_acomp_type = {</div><div class='ctx'> 	.extsize = crypto_acomp_extsize,</div><div class='ctx'> 	.init_tfm = crypto_acomp_init_tfm,</div><div class='hunk'>@@ -128,9 +102,6 @@ static const struct crypto_type crypto_acomp_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_acomp_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_acomp_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_ACOMPRESS_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_ACOMPRESS,</div><div class='hunk'>@@ -184,13 +155,9 @@ EXPORT_SYMBOL_GPL(acomp_request_free);</div><div class='ctx'> </div><div class='ctx'> void comp_prepare_alg(struct comp_alg_common *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_compress *istat = comp_get_stat(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_register_acomp(struct acomp_alg *alg)</div><div class='head'>diff --git a/crypto/aead.c b/crypto/aead.c<br/>index 54906633566a..cade532413bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/aead.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/aead.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/aead.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/aead.c</a></div><div class='hunk'>@@ -20,15 +20,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_aead *aead_get_stat(struct aead_alg *alg)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	return &amp;alg-&gt;stat;</div><div class='del'>-#else</div><div class='del'>-	return NULL;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int setkey_unaligned(struct crypto_aead *tfm, const u8 *key,</div><div class='ctx'> 			    unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -45,8 +36,7 @@ static int setkey_unaligned(struct crypto_aead *tfm, const u8 *key,</div><div class='ctx'> 	alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);</div><div class='ctx'> 	memcpy(alignbuffer, key, keylen);</div><div class='ctx'> 	ret = crypto_aead_alg(tfm)-&gt;setkey(tfm, alignbuffer, keylen);</div><div class='del'>-	memset(alignbuffer, 0, keylen);</div><div class='del'>-	kfree(buffer);</div><div class='add'>+	kfree_sensitive(buffer);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -90,62 +80,28 @@ int crypto_aead_setauthsize(struct crypto_aead *tfm, unsigned int authsize)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_aead_setauthsize);</div><div class='ctx'> </div><div class='del'>-static inline int crypto_aead_errstat(struct crypto_istat_aead *istat, int err)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (err &amp;&amp; err != -EINPROGRESS &amp;&amp; err != -EBUSY)</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int crypto_aead_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	struct aead_alg *alg = crypto_aead_alg(aead);</div><div class='del'>-	struct crypto_istat_aead *istat;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	istat = aead_get_stat(alg);</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-		atomic64_add(req-&gt;cryptlen, &amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_aead_get_flags(aead) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='del'>-		ret = -ENOKEY;</div><div class='del'>-	else</div><div class='del'>-		ret = alg-&gt;encrypt(req);</div><div class='add'>+		return -ENOKEY;</div><div class='ctx'> </div><div class='del'>-	return crypto_aead_errstat(istat, ret);</div><div class='add'>+	return crypto_aead_alg(aead)-&gt;encrypt(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_aead_encrypt);</div><div class='ctx'> </div><div class='ctx'> int crypto_aead_decrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	struct aead_alg *alg = crypto_aead_alg(aead);</div><div class='del'>-	struct crypto_istat_aead *istat;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	istat = aead_get_stat(alg);</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-		atomic64_add(req-&gt;cryptlen, &amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_aead_get_flags(aead) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='del'>-		ret = -ENOKEY;</div><div class='del'>-	else if (req-&gt;cryptlen &lt; crypto_aead_authsize(aead))</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	else</div><div class='del'>-		ret = alg-&gt;decrypt(req);</div><div class='add'>+		return -ENOKEY;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;cryptlen &lt; crypto_aead_authsize(aead))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return crypto_aead_errstat(istat, ret);</div><div class='add'>+	return crypto_aead_alg(aead)-&gt;decrypt(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_aead_decrypt);</div><div class='ctx'> </div><div class='hunk'>@@ -215,26 +171,6 @@ static void crypto_aead_free_instance(struct crypto_instance *inst)</div><div class='ctx'> 	aead-&gt;free(aead);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_aead_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct aead_alg *aead = container_of(alg, struct aead_alg, base);</div><div class='del'>-	struct crypto_istat_aead *istat = aead_get_stat(aead);</div><div class='del'>-	struct crypto_stat_aead raead;</div><div class='del'>-</div><div class='del'>-	memset(&amp;raead, 0, sizeof(raead));</div><div class='del'>-</div><div class='del'>-	strscpy(raead.type, "aead", sizeof(raead.type));</div><div class='del'>-</div><div class='del'>-	raead.stat_encrypt_cnt = atomic64_read(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-	raead.stat_encrypt_tlen = atomic64_read(&amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	raead.stat_decrypt_cnt = atomic64_read(&amp;istat-&gt;decrypt_cnt);</div><div class='del'>-	raead.stat_decrypt_tlen = atomic64_read(&amp;istat-&gt;decrypt_tlen);</div><div class='del'>-	raead.stat_err_cnt = atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_AEAD, sizeof(raead), &amp;raead);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_aead_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_aead_init_tfm,</div><div class='hunk'>@@ -245,9 +181,6 @@ static const struct crypto_type crypto_aead_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_aead_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_aead_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_AEAD,</div><div class='hunk'>@@ -277,7 +210,6 @@ EXPORT_SYMBOL_GPL(crypto_has_aead);</div><div class='ctx'> </div><div class='ctx'> static int aead_prepare_alg(struct aead_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_aead *istat = aead_get_stat(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	if (max3(alg-&gt;maxauthsize, alg-&gt;ivsize, alg-&gt;chunksize) &gt;</div><div class='hunk'>@@ -291,9 +223,6 @@ static int aead_prepare_alg(struct aead_alg *alg)</div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='ctx'> 	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_AEAD;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/af_alg.c b/crypto/af_alg.c<br/>index 68cc9290cabe..5bc6d0fa7498 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/af_alg.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/af_alg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/af_alg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/af_alg.c</a></div><div class='hunk'>@@ -847,7 +847,7 @@ void af_alg_wmem_wakeup(struct sock *sk)</div><div class='ctx'> 		wake_up_interruptible_sync_poll(&amp;wq-&gt;wait, EPOLLIN |</div><div class='ctx'> 							   EPOLLRDNORM |</div><div class='ctx'> 							   EPOLLRDBAND);</div><div class='del'>-	sk_wake_async(sk, SOCK_WAKE_WAITD, POLL_IN);</div><div class='add'>+	sk_wake_async_rcu(sk, SOCK_WAKE_WAITD, POLL_IN);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(af_alg_wmem_wakeup);</div><div class='hunk'>@@ -914,7 +914,7 @@ static void af_alg_data_wakeup(struct sock *sk)</div><div class='ctx'> 		wake_up_interruptible_sync_poll(&amp;wq-&gt;wait, EPOLLOUT |</div><div class='ctx'> 							   EPOLLRDNORM |</div><div class='ctx'> 							   EPOLLRDBAND);</div><div class='del'>-	sk_wake_async(sk, SOCK_WAKE_SPACE, POLL_OUT);</div><div class='add'>+	sk_wake_async_rcu(sk, SOCK_WAKE_SPACE, POLL_OUT);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/ahash.c b/crypto/ahash.c<br/>index 0ac83f7f701d..bcd9de009a91 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ahash.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ahash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ahash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ahash.c</a></div><div class='hunk'>@@ -27,22 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> #define CRYPTO_ALG_TYPE_AHASH_MASK	0x0000000e</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_hash *ahash_get_stat(struct ahash_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return hash_get_stat(&amp;alg-&gt;halg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int crypto_ahash_errstat(struct ahash_alg *alg, int err)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (err &amp;&amp; err != -EINPROGRESS &amp;&amp; err != -EBUSY)</div><div class='del'>-		atomic64_inc(&amp;ahash_get_stat(alg)-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * For an ahash tfm that is using an shash algorithm (instead of an ahash</div><div class='ctx'>  * algorithm), this returns the underlying shash tfm.</div><div class='hunk'>@@ -344,75 +328,47 @@ static void ahash_restore_req(struct ahash_request *req, int err)</div><div class='ctx'> int crypto_ahash_update(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ahash_alg *alg;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(tfm-&gt;using_shash))</div><div class='ctx'> 		return shash_ahash_update(req, ahash_request_ctx(req));</div><div class='ctx'> </div><div class='del'>-	alg = crypto_ahash_alg(tfm);</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		atomic64_add(req-&gt;nbytes, &amp;ahash_get_stat(alg)-&gt;hash_tlen);</div><div class='del'>-	return crypto_ahash_errstat(alg, alg-&gt;update(req));</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;update(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_update);</div><div class='ctx'> </div><div class='ctx'> int crypto_ahash_final(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ahash_alg *alg;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(tfm-&gt;using_shash))</div><div class='ctx'> 		return crypto_shash_final(ahash_request_ctx(req), req-&gt;result);</div><div class='ctx'> </div><div class='del'>-	alg = crypto_ahash_alg(tfm);</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		atomic64_inc(&amp;ahash_get_stat(alg)-&gt;hash_cnt);</div><div class='del'>-	return crypto_ahash_errstat(alg, alg-&gt;final(req));</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;final(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_final);</div><div class='ctx'> </div><div class='ctx'> int crypto_ahash_finup(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ahash_alg *alg;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(tfm-&gt;using_shash))</div><div class='ctx'> 		return shash_ahash_finup(req, ahash_request_ctx(req));</div><div class='ctx'> </div><div class='del'>-	alg = crypto_ahash_alg(tfm);</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_hash *istat = ahash_get_stat(alg);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;hash_cnt);</div><div class='del'>-		atomic64_add(req-&gt;nbytes, &amp;istat-&gt;hash_tlen);</div><div class='del'>-	}</div><div class='del'>-	return crypto_ahash_errstat(alg, alg-&gt;finup(req));</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;finup(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_finup);</div><div class='ctx'> </div><div class='ctx'> int crypto_ahash_digest(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ahash_alg *alg;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(tfm-&gt;using_shash))</div><div class='ctx'> 		return shash_ahash_digest(req, prepare_shash_desc(req, tfm));</div><div class='ctx'> </div><div class='del'>-	alg = crypto_ahash_alg(tfm);</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_hash *istat = ahash_get_stat(alg);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;hash_cnt);</div><div class='del'>-		atomic64_add(req-&gt;nbytes, &amp;istat-&gt;hash_tlen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (crypto_ahash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='del'>-		err = -ENOKEY;</div><div class='del'>-	else</div><div class='del'>-		err = alg-&gt;digest(req);</div><div class='add'>+		return -ENOKEY;</div><div class='ctx'> </div><div class='del'>-	return crypto_ahash_errstat(alg, err);</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;digest(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_digest);</div><div class='ctx'> </div><div class='hunk'>@@ -571,12 +527,6 @@ static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> 		   __crypto_hash_alg_common(alg)-&gt;digestsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_ahash_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return crypto_hash_report_stat(skb, alg, "ahash");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_ahash_type = {</div><div class='ctx'> 	.extsize = crypto_ahash_extsize,</div><div class='ctx'> 	.init_tfm = crypto_ahash_init_tfm,</div><div class='hunk'>@@ -587,9 +537,6 @@ static const struct crypto_type crypto_ahash_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_ahash_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_ahash_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_AHASH_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_AHASH,</div><div class='head'>diff --git a/crypto/akcipher.c b/crypto/akcipher.c<br/>index 52813f0b19e4..e0ff5f4dda6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/akcipher.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/akcipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/akcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/akcipher.c</a></div><div class='hunk'>@@ -70,30 +70,6 @@ static void crypto_akcipher_free_instance(struct crypto_instance *inst)</div><div class='ctx'> 	akcipher-&gt;free(akcipher);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_akcipher_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct akcipher_alg *akcipher = __crypto_akcipher_alg(alg);</div><div class='del'>-	struct crypto_istat_akcipher *istat;</div><div class='del'>-	struct crypto_stat_akcipher rakcipher;</div><div class='del'>-</div><div class='del'>-	istat = akcipher_get_stat(akcipher);</div><div class='del'>-</div><div class='del'>-	memset(&amp;rakcipher, 0, sizeof(rakcipher));</div><div class='del'>-</div><div class='del'>-	strscpy(rakcipher.type, "akcipher", sizeof(rakcipher.type));</div><div class='del'>-	rakcipher.stat_encrypt_cnt = atomic64_read(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-	rakcipher.stat_encrypt_tlen = atomic64_read(&amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	rakcipher.stat_decrypt_cnt = atomic64_read(&amp;istat-&gt;decrypt_cnt);</div><div class='del'>-	rakcipher.stat_decrypt_tlen = atomic64_read(&amp;istat-&gt;decrypt_tlen);</div><div class='del'>-	rakcipher.stat_sign_cnt = atomic64_read(&amp;istat-&gt;sign_cnt);</div><div class='del'>-	rakcipher.stat_verify_cnt = atomic64_read(&amp;istat-&gt;verify_cnt);</div><div class='del'>-	rakcipher.stat_err_cnt = atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_AKCIPHER,</div><div class='del'>-		       sizeof(rakcipher), &amp;rakcipher);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_akcipher_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_akcipher_init_tfm,</div><div class='hunk'>@@ -104,9 +80,6 @@ static const struct crypto_type crypto_akcipher_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_akcipher_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_akcipher_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_AHASH_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_AKCIPHER,</div><div class='hunk'>@@ -131,15 +104,11 @@ EXPORT_SYMBOL_GPL(crypto_alloc_akcipher);</div><div class='ctx'> </div><div class='ctx'> static void akcipher_prepare_alg(struct akcipher_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_akcipher *istat = akcipher_get_stat(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_type = &amp;crypto_akcipher_type;</div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='ctx'> 	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_AKCIPHER;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int akcipher_default_op(struct akcipher_request *req)</div><div class='head'>diff --git a/crypto/algboss.c b/crypto/algboss.c<br/>index 0de1e6697949..1aa5f306998a 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/algboss.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/algboss.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/algboss.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/algboss.c</a></div><div class='hunk'>@@ -138,9 +138,6 @@ static int cryptomgr_schedule_probe(struct crypto_larval *larval)</div><div class='ctx'> 			goto err_free_param;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!i)</div><div class='del'>-		goto err_free_param;</div><div class='del'>-</div><div class='ctx'> 	param-&gt;tb[i + 1] = NULL;</div><div class='ctx'> </div><div class='ctx'> 	param-&gt;type.attr.rta_len = sizeof(param-&gt;type);</div><div class='head'>diff --git a/crypto/api.c b/crypto/api.c<br/>index 7f402107f0cc..6aa5a3b4ed5e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/api.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/api.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/api.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/api.c</a></div><div class='hunk'>@@ -202,18 +202,18 @@ static void crypto_start_test(struct crypto_larval *larval)</div><div class='ctx'> static struct crypto_alg *crypto_larval_wait(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_larval *larval = (void *)alg;</div><div class='del'>-	long timeout;</div><div class='add'>+	long time_left;</div><div class='ctx'> </div><div class='ctx'> 	if (!crypto_boot_test_finished())</div><div class='ctx'> 		crypto_start_test(larval);</div><div class='ctx'> </div><div class='del'>-	timeout = wait_for_completion_killable_timeout(</div><div class='add'>+	time_left = wait_for_completion_killable_timeout(</div><div class='ctx'> 		&amp;larval-&gt;completion, 60 * HZ);</div><div class='ctx'> </div><div class='ctx'> 	alg = larval-&gt;adult;</div><div class='del'>-	if (timeout &lt; 0)</div><div class='add'>+	if (time_left &lt; 0)</div><div class='ctx'> 		alg = ERR_PTR(-EINTR);</div><div class='del'>-	else if (!timeout)</div><div class='add'>+	else if (!time_left)</div><div class='ctx'> 		alg = ERR_PTR(-ETIMEDOUT);</div><div class='ctx'> 	else if (!alg)</div><div class='ctx'> 		alg = ERR_PTR(-ENOENT);</div><div class='head'>diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig<br/>index 59ec726b7c77..e1345b8f39f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/Kconfig</a></div><div class='hunk'>@@ -15,6 +15,7 @@ config ASYMMETRIC_PUBLIC_KEY_SUBTYPE</div><div class='ctx'> 	select MPILIB</div><div class='ctx'> 	select CRYPTO_HASH_INFO</div><div class='ctx'> 	select CRYPTO_AKCIPHER</div><div class='add'>+	select CRYPTO_SIG</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option provides support for asymmetric public key type handling.</div><div class='hunk'>@@ -85,5 +86,21 @@ config FIPS_SIGNATURE_SELFTEST</div><div class='ctx'> 	depends on ASYMMETRIC_KEY_TYPE</div><div class='ctx'> 	depends on PKCS7_MESSAGE_PARSER=X509_CERTIFICATE_PARSER</div><div class='ctx'> 	depends on X509_CERTIFICATE_PARSER</div><div class='add'>+	depends on CRYPTO_RSA</div><div class='add'>+	depends on CRYPTO_SHA256</div><div class='add'>+</div><div class='add'>+config FIPS_SIGNATURE_SELFTEST_RSA</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	depends on FIPS_SIGNATURE_SELFTEST</div><div class='add'>+	depends on CRYPTO_SHA256=y || CRYPTO_SHA256=FIPS_SIGNATURE_SELFTEST</div><div class='add'>+	depends on CRYPTO_RSA=y || CRYPTO_RSA=FIPS_SIGNATURE_SELFTEST</div><div class='add'>+</div><div class='add'>+config FIPS_SIGNATURE_SELFTEST_ECDSA</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	depends on FIPS_SIGNATURE_SELFTEST</div><div class='add'>+	depends on CRYPTO_SHA256=y || CRYPTO_SHA256=FIPS_SIGNATURE_SELFTEST</div><div class='add'>+	depends on CRYPTO_ECDSA=y || CRYPTO_ECDSA=FIPS_SIGNATURE_SELFTEST</div><div class='ctx'> </div><div class='ctx'> endif # ASYMMETRIC_KEY_TYPE</div><div class='head'>diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile<br/>index 1a273d6df3eb..bc65d3b98dcb 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/Makefile</a></div><div class='hunk'>@@ -24,6 +24,8 @@ x509_key_parser-y := \</div><div class='ctx'> 	x509_public_key.o</div><div class='ctx'> obj-$(CONFIG_FIPS_SIGNATURE_SELFTEST) += x509_selftest.o</div><div class='ctx'> x509_selftest-y += selftest.o</div><div class='add'>+x509_selftest-$(CONFIG_FIPS_SIGNATURE_SELFTEST_RSA) += selftest_rsa.o</div><div class='add'>+x509_selftest-$(CONFIG_FIPS_SIGNATURE_SELFTEST_ECDSA) += selftest_ecdsa.o</div><div class='ctx'> </div><div class='ctx'> $(obj)/x509_cert_parser.o: \</div><div class='ctx'> 	$(obj)/x509.asn1.h \</div><div class='head'>diff --git a/crypto/asymmetric_keys/public_key.c b/crypto/asymmetric_keys/public_key.c<br/>index e314fd57e6f8..3474fb34ded9 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/public_key.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/public_key.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/public_key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/public_key.c</a></div><div class='hunk'>@@ -234,6 +234,7 @@ static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 	info-&gt;key_size = len * 8;</div><div class='ctx'> </div><div class='ctx'> 	if (strncmp(pkey-&gt;pkey_algo, "ecdsa", 5) == 0) {</div><div class='add'>+		int slen = len;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * ECDSA key sizes are much smaller than RSA, and thus could</div><div class='ctx'> 		 * operate on (hashed) inputs that are larger than key size.</div><div class='hunk'>@@ -247,8 +248,19 @@ static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 		 * Verify takes ECDSA-Sig (described in RFC 5480) as input,</div><div class='ctx'> 		 * which is actually 2 'key_size'-bit integers encoded in</div><div class='ctx'> 		 * ASN.1.  Account for the ASN.1 encoding overhead here.</div><div class='add'>+		 *</div><div class='add'>+		 * NIST P192/256/384 may prepend a '0' to a coordinate to</div><div class='add'>+		 * indicate a positive integer. NIST P521 never needs it.</div><div class='ctx'> 		 */</div><div class='del'>-		info-&gt;max_sig_size = 2 * (len + 3) + 2;</div><div class='add'>+		if (strcmp(pkey-&gt;pkey_algo, "ecdsa-nist-p521") != 0)</div><div class='add'>+			slen += 1;</div><div class='add'>+		/* Length of encoding the x &amp; y coordinates */</div><div class='add'>+		slen = 2 * (slen + 2);</div><div class='add'>+		/*</div><div class='add'>+		 * If coordinate encoding takes at least 128 bytes then an</div><div class='add'>+		 * additional byte for length encoding is needed.</div><div class='add'>+		 */</div><div class='add'>+		info-&gt;max_sig_size = 1 + (slen &gt;= 128) + 1 + slen;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		info-&gt;max_data_size = len;</div><div class='ctx'> 		info-&gt;max_sig_size = len;</div><div class='head'>diff --git a/crypto/asymmetric_keys/selftest.c b/crypto/asymmetric_keys/selftest.c<br/>index c50da7ef90ae..98dc5cdfdebe 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/selftest.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/selftest.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/selftest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/selftest.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Self-testing for signature checking.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2022 Red Hat, Inc. All Rights Reserved.</div><div class='hunk'>@@ -9,179 +10,18 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/key.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include "selftest.h"</div><div class='ctx'> #include "x509_parser.h"</div><div class='ctx'> </div><div class='del'>-struct certs_test {</div><div class='del'>-	const u8	*data;</div><div class='del'>-	size_t		data_len;</div><div class='del'>-	const u8	*pkcs7;</div><div class='del'>-	size_t		pkcs7_len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set of X.509 certificates to provide public keys for the tests.  These will</div><div class='del'>- * be loaded into a temporary keyring for the duration of the testing.</div><div class='del'>- */</div><div class='del'>-static const __initconst u8 certs_selftest_keys[] = {</div><div class='del'>-	"\x30\x82\x05\x55\x30\x82\x03\x3d\xa0\x03\x02\x01\x02\x02\x14\x73"</div><div class='del'>-	"\x98\xea\x98\x2d\xd0\x2e\xa8\xb1\xcf\x57\xc7\xf2\x97\xb3\xe6\x1a"</div><div class='del'>-	"\xfc\x8c\x0a\x30\x0d\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x01\x0b"</div><div class='del'>-	"\x05\x00\x30\x34\x31\x32\x30\x30\x06\x03\x55\x04\x03\x0c\x29\x43"</div><div class='del'>-	"\x65\x72\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66"</div><div class='del'>-	"\x69\x63\x61\x74\x69\x6f\x6e\x20\x73\x65\x6c\x66\x2d\x74\x65\x73"</div><div class='del'>-	"\x74\x69\x6e\x67\x20\x6b\x65\x79\x30\x20\x17\x0d\x32\x32\x30\x35"</div><div class='del'>-	"\x31\x38\x32\x32\x33\x32\x34\x31\x5a\x18\x0f\x32\x31\x32\x32\x30"</div><div class='del'>-	"\x34\x32\x34\x32\x32\x33\x32\x34\x31\x5a\x30\x34\x31\x32\x30\x30"</div><div class='del'>-	"\x06\x03\x55\x04\x03\x0c\x29\x43\x65\x72\x74\x69\x66\x69\x63\x61"</div><div class='del'>-	"\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63\x61\x74\x69\x6f\x6e\x20"</div><div class='del'>-	"\x73\x65\x6c\x66\x2d\x74\x65\x73\x74\x69\x6e\x67\x20\x6b\x65\x79"</div><div class='del'>-	"\x30\x82\x02\x22\x30\x0d\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x01"</div><div class='del'>-	"\x01\x05\x00\x03\x82\x02\x0f\x00\x30\x82\x02\x0a\x02\x82\x02\x01"</div><div class='del'>-	"\x00\xcc\xac\x49\xdd\x3b\xca\xb0\x15\x7e\x84\x6a\xb2\x0a\x69\x5f"</div><div class='del'>-	"\x1c\x0a\x61\x82\x3b\x4f\x2c\xa3\x95\x2c\x08\x58\x4b\xb1\x5d\x99"</div><div class='del'>-	"\xe0\xc3\xc1\x79\xc2\xb3\xeb\xc0\x1e\x6d\x3e\x54\x1d\xbd\xb7\x92"</div><div class='del'>-	"\x7b\x4d\xb5\x95\x58\xb2\x52\x2e\xc6\x24\x4b\x71\x63\x80\x32\x77"</div><div class='del'>-	"\xa7\x38\x5e\xdb\x72\xae\x6e\x0d\xec\xfb\xb6\x6d\x01\x7f\xe9\x55"</div><div class='del'>-	"\x66\xdf\xbf\x1d\x76\x78\x02\x31\xe8\xe5\x07\xf8\xb7\x82\x5c\x0d"</div><div class='del'>-	"\xd4\xbb\xfb\xa2\x59\x0d\x2e\x3a\x78\x95\x3a\x8b\x46\x06\x47\x44"</div><div class='del'>-	"\x46\xd7\xcd\x06\x6a\x41\x13\xe3\x19\xf6\xbb\x6e\x38\xf4\x83\x01"</div><div class='del'>-	"\xa3\xbf\x4a\x39\x4f\xd7\x0a\xe9\x38\xb3\xf5\x94\x14\x4e\xdd\xf7"</div><div class='del'>-	"\x43\xfd\x24\xb2\x49\x3c\xa5\xf7\x7a\x7c\xd4\x45\x3d\x97\x75\x68"</div><div class='del'>-	"\xf1\xed\x4c\x42\x0b\x70\xca\x85\xf3\xde\xe5\x88\x2c\xc5\xbe\xb6"</div><div class='del'>-	"\x97\x34\xba\x24\x02\xcd\x8b\x86\x9f\xa9\x73\xca\x73\xcf\x92\x81"</div><div class='del'>-	"\xee\x75\x55\xbb\x18\x67\x5c\xff\x3f\xb5\xdd\x33\x1b\x0c\xe9\x78"</div><div class='del'>-	"\xdb\x5c\xcf\xaa\x5c\x43\x42\xdf\x5e\xa9\x6d\xec\xd7\xd7\xff\xe6"</div><div class='del'>-	"\xa1\x3a\x92\x1a\xda\xae\xf6\x8c\x6f\x7b\xd5\xb4\x6e\x06\xe9\x8f"</div><div class='del'>-	"\xe8\xde\x09\x31\x89\xed\x0e\x11\xa1\xfa\x8a\xe9\xe9\x64\x59\x62"</div><div class='del'>-	"\x53\xda\xd1\x70\xbe\x11\xd4\x99\x97\x11\xcf\x99\xde\x0b\x9d\x94"</div><div class='del'>-	"\x7e\xaa\xb8\x52\xea\x37\xdb\x90\x7e\x35\xbd\xd9\xfe\x6d\x0a\x48"</div><div class='del'>-	"\x70\x28\xdd\xd5\x0d\x7f\x03\x80\x93\x14\x23\x8f\xb9\x22\xcd\x7c"</div><div class='del'>-	"\x29\xfe\xf1\x72\xb5\x5c\x0b\x12\xcf\x9c\x15\xf6\x11\x4c\x7a\x45"</div><div class='del'>-	"\x25\x8c\x45\x0a\x34\xac\x2d\x9a\x81\xca\x0b\x13\x22\xcd\xeb\x1a"</div><div class='del'>-	"\x38\x88\x18\x97\x96\x08\x81\xaa\xcc\x8f\x0f\x8a\x32\x7b\x76\x68"</div><div class='del'>-	"\x03\x68\x43\xbf\x11\xba\x55\x60\xfd\x80\x1c\x0d\x9b\x69\xb6\x09"</div><div class='del'>-	"\x72\xbc\x0f\x41\x2f\x07\x82\xc6\xe3\xb2\x13\x91\xc4\x6d\x14\x95"</div><div class='del'>-	"\x31\xbe\x19\xbd\xbc\xed\xe1\x4c\x74\xa2\xe0\x78\x0b\xbb\x94\xec"</div><div class='del'>-	"\x4c\x53\x3a\xa2\xb5\x84\x1d\x4b\x65\x7e\xdc\xf7\xdb\x36\x7d\xbe"</div><div class='del'>-	"\x9e\x3b\x36\x66\x42\x66\x76\x35\xbf\xbe\xf0\xc1\x3c\x7c\xe9\x42"</div><div class='del'>-	"\x5c\x24\x53\x03\x05\xa8\x67\x24\x50\x02\x75\xff\x24\x46\x3b\x35"</div><div class='del'>-	"\x89\x76\xe6\x70\xda\xc5\x51\x8c\x9a\xe5\x05\xb0\x0b\xd0\x2d\xd4"</div><div class='del'>-	"\x7d\x57\x75\x94\x6b\xf9\x0a\xad\x0e\x41\x00\x15\xd0\x4f\xc0\x7f"</div><div class='del'>-	"\x90\x2d\x18\x48\x8f\x28\xfe\x5d\xa7\xcd\x99\x9e\xbd\x02\x6c\x8a"</div><div class='del'>-	"\x31\xf3\x1c\xc7\x4b\xe6\x93\xcd\x42\xa2\xe4\x68\x10\x47\x9d\xfc"</div><div class='del'>-	"\x21\x02\x03\x01\x00\x01\xa3\x5d\x30\x5b\x30\x0c\x06\x03\x55\x1d"</div><div class='del'>-	"\x13\x01\x01\xff\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04"</div><div class='del'>-	"\x04\x03\x02\x07\x80\x30\x1d\x06\x03\x55\x1d\x0e\x04\x16\x04\x14"</div><div class='del'>-	"\xf5\x87\x03\xbb\x33\xce\x1b\x73\xee\x02\xec\xcd\xee\x5b\x88\x17"</div><div class='del'>-	"\x51\x8f\xe3\xdb\x30\x1f\x06\x03\x55\x1d\x23\x04\x18\x30\x16\x80"</div><div class='del'>-	"\x14\xf5\x87\x03\xbb\x33\xce\x1b\x73\xee\x02\xec\xcd\xee\x5b\x88"</div><div class='del'>-	"\x17\x51\x8f\xe3\xdb\x30\x0d\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01"</div><div class='del'>-	"\x01\x0b\x05\x00\x03\x82\x02\x01\x00\xc0\x2e\x12\x41\x7b\x73\x85"</div><div class='del'>-	"\x16\xc8\xdb\x86\x79\xe8\xf5\xcd\x44\xf4\xc6\xe2\x81\x23\x5e\x47"</div><div class='del'>-	"\xcb\xab\x25\xf1\x1e\x58\x3e\x31\x7f\x78\xad\x85\xeb\xfe\x14\x88"</div><div class='del'>-	"\x60\xf7\x7f\xd2\x26\xa2\xf4\x98\x2a\xfd\xba\x05\x0c\x20\x33\x12"</div><div class='del'>-	"\xcc\x4d\x14\x61\x64\x81\x93\xd3\x33\xed\xc8\xff\xf1\x78\xcc\x5f"</div><div class='del'>-	"\x51\x9f\x09\xd7\xbe\x0d\x5c\x74\xfd\x9b\xdf\x52\x4a\xc9\xa8\x71"</div><div class='del'>-	"\x25\x33\x04\x10\x67\x36\xd0\xb3\x0b\xc9\xa1\x40\x72\xae\x41\x7b"</div><div class='del'>-	"\x68\xe6\xe4\x7b\xd0\x28\xf7\x6d\xe7\x3f\x50\xfc\x91\x7c\x91\x56"</div><div class='del'>-	"\xd4\xdf\xa6\xbb\xe8\x4d\x1b\x58\xaa\x28\xfa\xc1\x19\xeb\x11\x2f"</div><div class='del'>-	"\x24\x8b\x7c\xc5\xa9\x86\x26\xaa\x6e\xb7\x9b\xd5\xf8\x06\xfb\x02"</div><div class='del'>-	"\x52\x7b\x9c\x9e\xa1\xe0\x07\x8b\x5e\xe4\xb8\x55\x29\xf6\x48\x52"</div><div class='del'>-	"\x1c\x1b\x54\x2d\x46\xd8\xe5\x71\xb9\x60\xd1\x45\xb5\x92\x89\x8a"</div><div class='del'>-	"\x63\x58\x2a\xb3\xc6\xb2\x76\xe2\x3c\x82\x59\x04\xae\x5a\xc4\x99"</div><div class='del'>-	"\x7b\x2e\x4b\x46\x57\xb8\x29\x24\xb2\xfd\xee\x2c\x0d\xa4\x83\xfa"</div><div class='del'>-	"\x65\x2a\x07\x35\x8b\x97\xcf\xbd\x96\x2e\xd1\x7e\x6c\xc2\x1e\x87"</div><div class='del'>-	"\xb6\x6c\x76\x65\xb5\xb2\x62\xda\x8b\xe9\x73\xe3\xdb\x33\xdd\x13"</div><div class='del'>-	"\x3a\x17\x63\x6a\x76\xde\x8d\x8f\xe0\x47\x61\x28\x3a\x83\xff\x8f"</div><div class='del'>-	"\xe7\xc7\xe0\x4a\xa3\xe5\x07\xcf\xe9\x8c\x35\x35\x2e\xe7\x80\x66"</div><div class='del'>-	"\x31\xbf\x91\x58\x0a\xe1\x25\x3d\x38\xd3\xa4\xf0\x59\x34\x47\x07"</div><div class='del'>-	"\x62\x0f\xbe\x30\xdd\x81\x88\x58\xf0\x28\xb0\x96\xe5\x82\xf8\x05"</div><div class='del'>-	"\xb7\x13\x01\xbc\xfa\xc6\x1f\x86\x72\xcc\xf9\xee\x8e\xd9\xd6\x04"</div><div class='del'>-	"\x8c\x24\x6c\xbf\x0f\x5d\x37\x39\xcf\x45\xc1\x93\x3a\xd2\xed\x5c"</div><div class='del'>-	"\x58\x79\x74\x86\x62\x30\x7e\x8e\xbb\xdd\x7a\xa9\xed\xca\x40\xcb"</div><div class='del'>-	"\x62\x47\xf4\xb4\x9f\x52\x7f\x72\x63\xa8\xf0\x2b\xaf\x45\x2a\x48"</div><div class='del'>-	"\x19\x6d\xe3\xfb\xf9\x19\x66\x69\xc8\xcc\x62\x87\x6c\x53\x2b\x2d"</div><div class='del'>-	"\x6e\x90\x6c\x54\x3a\x82\x25\x41\xcb\x18\x6a\xa4\x22\xa8\xa1\xc4"</div><div class='del'>-	"\x47\xd7\x81\x00\x1c\x15\x51\x0f\x1a\xaf\xef\x9f\xa6\x61\x8c\xbd"</div><div class='del'>-	"\x6b\x8b\xed\xe6\xac\x0e\xb6\x3a\x4c\x92\xe6\x0f\x91\x0a\x0f\x71"</div><div class='del'>-	"\xc7\xa0\xb9\x0d\x3a\x17\x5a\x6f\x35\xc8\xe7\x50\x4f\x46\xe8\x70"</div><div class='del'>-	"\x60\x48\x06\x82\x8b\x66\x58\xe6\x73\x91\x9c\x12\x3d\x35\x8e\x46"</div><div class='del'>-	"\xad\x5a\xf5\xb3\xdb\x69\x21\x04\xfd\xd3\x1c\xdf\x94\x9d\x56\xb0"</div><div class='del'>-	"\x0a\xd1\x95\x76\x8d\xec\x9e\xdd\x0b\x15\x97\x64\xad\xe5\xf2\x62"</div><div class='del'>-	"\x02\xfc\x9e\x5f\x56\x42\x39\x05\xb3"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Signed data and detached signature blobs that form the verification tests.</div><div class='del'>- */</div><div class='del'>-static const __initconst u8 certs_selftest_1_data[] = {</div><div class='del'>-	"\x54\x68\x69\x73\x20\x69\x73\x20\x73\x6f\x6d\x65\x20\x74\x65\x73"</div><div class='del'>-	"\x74\x20\x64\x61\x74\x61\x20\x75\x73\x65\x64\x20\x66\x6f\x72\x20"</div><div class='del'>-	"\x73\x65\x6c\x66\x2d\x74\x65\x73\x74\x69\x6e\x67\x20\x63\x65\x72"</div><div class='del'>-	"\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63"</div><div class='del'>-	"\x61\x74\x69\x6f\x6e\x2e\x0a"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const __initconst u8 certs_selftest_1_pkcs7[] = {</div><div class='del'>-	"\x30\x82\x02\xab\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x07\x02\xa0"</div><div class='del'>-	"\x82\x02\x9c\x30\x82\x02\x98\x02\x01\x01\x31\x0d\x30\x0b\x06\x09"</div><div class='del'>-	"\x60\x86\x48\x01\x65\x03\x04\x02\x01\x30\x0b\x06\x09\x2a\x86\x48"</div><div class='del'>-	"\x86\xf7\x0d\x01\x07\x01\x31\x82\x02\x75\x30\x82\x02\x71\x02\x01"</div><div class='del'>-	"\x01\x30\x4c\x30\x34\x31\x32\x30\x30\x06\x03\x55\x04\x03\x0c\x29"</div><div class='del'>-	"\x43\x65\x72\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69"</div><div class='del'>-	"\x66\x69\x63\x61\x74\x69\x6f\x6e\x20\x73\x65\x6c\x66\x2d\x74\x65"</div><div class='del'>-	"\x73\x74\x69\x6e\x67\x20\x6b\x65\x79\x02\x14\x73\x98\xea\x98\x2d"</div><div class='del'>-	"\xd0\x2e\xa8\xb1\xcf\x57\xc7\xf2\x97\xb3\xe6\x1a\xfc\x8c\x0a\x30"</div><div class='del'>-	"\x0b\x06\x09\x60\x86\x48\x01\x65\x03\x04\x02\x01\x30\x0d\x06\x09"</div><div class='del'>-	"\x2a\x86\x48\x86\xf7\x0d\x01\x01\x01\x05\x00\x04\x82\x02\x00\xac"</div><div class='del'>-	"\xb0\xf2\x07\xd6\x99\x6d\xc0\xc0\xd9\x8d\x31\x0d\x7e\x04\xeb\xc3"</div><div class='del'>-	"\x88\x90\xc4\x58\x46\xd4\xe2\xa0\xa3\x25\xe3\x04\x50\x37\x85\x8c"</div><div class='del'>-	"\x91\xc6\xfc\xc5\xd4\x92\xfd\x05\xd8\xb8\xa3\xb8\xba\x89\x13\x00"</div><div class='del'>-	"\x88\x79\x99\x51\x6b\x5b\x28\x31\xc0\xb3\x1b\x7a\x68\x2c\x00\xdb"</div><div class='del'>-	"\x4b\x46\x11\xf3\xfa\x50\x8e\x19\x89\xa2\x4c\xda\x4c\x89\x01\x11"</div><div class='del'>-	"\x89\xee\xd3\xc8\xc1\xe7\xa7\xf6\xb2\xa2\xf8\x65\xb8\x35\x20\x33"</div><div class='del'>-	"\xba\x12\x62\xd5\xbd\xaa\x71\xe5\x5b\xc0\x6a\x32\xff\x6a\x2e\x23"</div><div class='del'>-	"\xef\x2b\xb6\x58\xb1\xfb\x5f\x82\x34\x40\x6d\x9f\xbc\x27\xac\x37"</div><div class='del'>-	"\x23\x99\xcf\x7d\x20\xb2\x39\x01\xc0\x12\xce\xd7\x5d\x2f\xb6\xab"</div><div class='del'>-	"\xb5\x56\x4f\xef\xf4\x72\x07\x58\x65\xa9\xeb\x1f\x75\x1c\x5f\x0c"</div><div class='del'>-	"\x88\xe0\xa4\xe2\xcd\x73\x2b\x9e\xb2\x05\x7e\x12\xf8\xd0\x66\x41"</div><div class='del'>-	"\xcc\x12\x63\xd4\xd6\xac\x9b\x1d\x14\x77\x8d\x1c\x57\xd5\x27\xc6"</div><div class='del'>-	"\x49\xa2\x41\x43\xf3\x59\x29\xe5\xcb\xd1\x75\xbc\x3a\x97\x2a\x72"</div><div class='del'>-	"\x22\x66\xc5\x3b\xc1\xba\xfc\x53\x18\x98\xe2\x21\x64\xc6\x52\x87"</div><div class='del'>-	"\x13\xd5\x7c\x42\xe8\xfb\x9c\x9a\x45\x32\xd5\xa5\x22\x62\x9d\xd4"</div><div class='del'>-	"\xcb\xa4\xfa\x77\xbb\x50\x24\x0b\x8b\x88\x99\x15\x56\xa9\x1e\x92"</div><div class='del'>-	"\xbf\x5d\x94\x77\xb6\xf1\x67\x01\x60\x06\x58\x5c\xdf\x18\x52\x79"</div><div class='del'>-	"\x37\x30\x93\x7d\x87\x04\xf1\xe0\x55\x59\x52\xf3\xc2\xb1\x1c\x5b"</div><div class='del'>-	"\x12\x7c\x49\x87\xfb\xf7\xed\xdd\x95\x71\xec\x4b\x1a\x85\x08\xb0"</div><div class='del'>-	"\xa0\x36\xc4\x7b\xab\x40\xe0\xf1\x98\xcc\xaf\x19\x40\x8f\x47\x6f"</div><div class='del'>-	"\xf0\x6c\x84\x29\x7f\x7f\x04\x46\xcb\x08\x0f\xe0\xc1\xc9\x70\x6e"</div><div class='del'>-	"\x95\x3b\xa4\xbc\x29\x2b\x53\x67\x45\x1b\x0d\xbc\x13\xa5\x76\x31"</div><div class='del'>-	"\xaf\xb9\xd0\xe0\x60\x12\xd2\xf4\xb7\x7c\x58\x7e\xf6\x2d\xbb\x24"</div><div class='del'>-	"\x14\x5a\x20\x24\xa8\x12\xdf\x25\xbd\x42\xce\x96\x7c\x2e\xba\x14"</div><div class='del'>-	"\x1b\x81\x9f\x18\x45\xa4\xc6\x70\x3e\x0e\xf0\xd3\x7b\x9c\x10\xbe"</div><div class='del'>-	"\xb8\x7a\x89\xc5\x9e\xd9\x97\xdf\xd7\xe7\xc6\x1d\xc0\x20\x6c\xb8"</div><div class='del'>-	"\x1e\x3a\x63\xb8\x39\x8e\x8e\x62\xd5\xd2\xb4\xcd\xff\x46\xfc\x8e"</div><div class='del'>-	"\xec\x07\x35\x0c\xff\xb0\x05\xe6\xf4\xe5\xfe\xa2\xe3\x0a\xe6\x36"</div><div class='del'>-	"\xa7\x4a\x7e\x62\x1d\xc4\x50\x39\x35\x4e\x28\xcb\x4a\xfb\x9d\xdb"</div><div class='del'>-	"\xdd\x23\xd6\x53\xb1\x74\x77\x12\xf7\x9c\xf0\x9a\x6b\xf7\xa9\x64"</div><div class='del'>-	"\x2d\x86\x21\x2a\xcf\xc6\x54\xf5\xc9\xad\xfa\xb5\x12\xb4\xf3\x51"</div><div class='del'>-	"\x77\x55\x3c\x6f\x0c\x32\xd3\x8c\x44\x39\x71\x25\xfe\x96\xd2"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * List of tests to be run.</div><div class='del'>- */</div><div class='del'>-#define TEST(data, pkcs7) { data, sizeof(data) - 1, pkcs7, sizeof(pkcs7) - 1 }</div><div class='del'>-static const struct certs_test certs_tests[] __initconst = {</div><div class='del'>-	TEST(certs_selftest_1_data, certs_selftest_1_pkcs7),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init fips_signature_selftest(void)</div><div class='add'>+void fips_signature_selftest(const char *name,</div><div class='add'>+			     const u8 *keys, size_t keys_len,</div><div class='add'>+			     const u8 *data, size_t data_len,</div><div class='add'>+			     const u8 *sig, size_t sig_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct key *keyring;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	pr_notice("Running certificate verification selftests\n");</div><div class='add'>+	pr_notice("Running certificate verification %s selftest\n", name);</div><div class='ctx'> </div><div class='ctx'> 	keyring = keyring_alloc(".certs_selftest",</div><div class='ctx'> 				GLOBAL_ROOT_UID, GLOBAL_ROOT_GID, current_cred(),</div><div class='hunk'>@@ -191,40 +31,41 @@ static int __init fips_signature_selftest(void)</div><div class='ctx'> 				KEY_ALLOC_NOT_IN_QUOTA,</div><div class='ctx'> 				NULL, NULL);</div><div class='ctx'> 	if (IS_ERR(keyring))</div><div class='del'>-		panic("Can't allocate certs selftest keyring: %ld\n",</div><div class='del'>-		      PTR_ERR(keyring));</div><div class='add'>+		panic("Can't allocate certs %s selftest keyring: %ld\n", name, PTR_ERR(keyring));</div><div class='ctx'> </div><div class='del'>-	ret = x509_load_certificate_list(certs_selftest_keys,</div><div class='del'>-					 sizeof(certs_selftest_keys) - 1, keyring);</div><div class='add'>+	ret = x509_load_certificate_list(keys, keys_len, keyring);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		panic("Can't allocate certs selftest keyring: %d\n", ret);</div><div class='add'>+		panic("Can't allocate certs %s selftest keyring: %d\n", name, ret);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(certs_tests); i++) {</div><div class='del'>-		const struct certs_test *test = &amp;certs_tests[i];</div><div class='del'>-		struct pkcs7_message *pkcs7;</div><div class='add'>+	struct pkcs7_message *pkcs7;</div><div class='ctx'> </div><div class='del'>-		pkcs7 = pkcs7_parse_message(test-&gt;pkcs7, test-&gt;pkcs7_len);</div><div class='del'>-		if (IS_ERR(pkcs7))</div><div class='del'>-			panic("Certs selftest %d: pkcs7_parse_message() = %d\n", i, ret);</div><div class='add'>+	pkcs7 = pkcs7_parse_message(sig, sig_len);</div><div class='add'>+	if (IS_ERR(pkcs7))</div><div class='add'>+		panic("Certs %s selftest: pkcs7_parse_message() = %d\n", name, ret);</div><div class='ctx'> </div><div class='del'>-		pkcs7_supply_detached_data(pkcs7, test-&gt;data, test-&gt;data_len);</div><div class='add'>+	pkcs7_supply_detached_data(pkcs7, data, data_len);</div><div class='ctx'> </div><div class='del'>-		ret = pkcs7_verify(pkcs7, VERIFYING_MODULE_SIGNATURE);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			panic("Certs selftest %d: pkcs7_verify() = %d\n", i, ret);</div><div class='add'>+	ret = pkcs7_verify(pkcs7, VERIFYING_MODULE_SIGNATURE);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		panic("Certs %s selftest: pkcs7_verify() = %d\n", name, ret);</div><div class='ctx'> </div><div class='del'>-		ret = pkcs7_validate_trust(pkcs7, keyring);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			panic("Certs selftest %d: pkcs7_validate_trust() = %d\n", i, ret);</div><div class='add'>+	ret = pkcs7_validate_trust(pkcs7, keyring);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		panic("Certs %s selftest: pkcs7_validate_trust() = %d\n", name, ret);</div><div class='ctx'> </div><div class='del'>-		pkcs7_free_message(pkcs7);</div><div class='del'>-	}</div><div class='add'>+	pkcs7_free_message(pkcs7);</div><div class='ctx'> </div><div class='ctx'> 	key_put(keyring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init fips_signature_selftest_init(void)</div><div class='add'>+{</div><div class='add'>+	fips_signature_selftest_rsa();</div><div class='add'>+	fips_signature_selftest_ecdsa();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(fips_signature_selftest);</div><div class='add'>+late_initcall(fips_signature_selftest_init);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("X.509 self tests");</div><div class='ctx'> MODULE_AUTHOR("Red Hat, Inc.");</div><div class='head'>diff --git a/crypto/asymmetric_keys/selftest.h b/crypto/asymmetric_keys/selftest.h<br/>new file mode 100644<br/>index 000000000000..4139f05906cb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/selftest.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/selftest.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/* Helper function for self-testing PKCS#7 signature verification.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Joachim Vandersmissen &lt;git@jvdsn.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void fips_signature_selftest(const char *name,</div><div class='add'>+			     const u8 *keys, size_t keys_len,</div><div class='add'>+			     const u8 *data, size_t data_len,</div><div class='add'>+			     const u8 *sig, size_t sig_len);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FIPS_SIGNATURE_SELFTEST_RSA</div><div class='add'>+void __init fips_signature_selftest_rsa(void);</div><div class='add'>+#else</div><div class='add'>+static inline void __init fips_signature_selftest_rsa(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FIPS_SIGNATURE_SELFTEST_ECDSA</div><div class='add'>+void __init fips_signature_selftest_ecdsa(void);</div><div class='add'>+#else</div><div class='add'>+static inline void __init fips_signature_selftest_ecdsa(void) { }</div><div class='add'>+#endif</div><div class='head'>diff --git a/crypto/asymmetric_keys/selftest_ecdsa.c b/crypto/asymmetric_keys/selftest_ecdsa.c<br/>new file mode 100644<br/>index 000000000000..20a0868b30de<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/selftest_ecdsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/selftest_ecdsa.c</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* Self-tests for PKCS#7 ECDSA signature verification.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Joachim Vandersmissen &lt;git@jvdsn.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include "selftest.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set of X.509 certificates to provide public keys for the tests. These will</div><div class='add'>+ * be loaded into a temporary keyring for the duration of the testing.</div><div class='add'>+ */</div><div class='add'>+static const u8 certs_selftest_ecdsa_keys[] __initconst = {</div><div class='add'>+	/* P-256 ECDSA certificate */</div><div class='add'>+	"\x30\x82\x01\xd4\x30\x82\x01\x7b\xa0\x03\x02\x01\x02\x02\x14\x2e"</div><div class='add'>+	"\xea\x64\x8d\x7f\x17\xe6\x2e\x9e\x58\x69\xc8\x87\xc6\x8e\x1b\xd0"</div><div class='add'>+	"\xf8\x6f\xde\x30\x0a\x06\x08\x2a\x86\x48\xce\x3d\x04\x03\x02\x30"</div><div class='add'>+	"\x3a\x31\x38\x30\x36\x06\x03\x55\x04\x03\x0c\x2f\x43\x65\x72\x74"</div><div class='add'>+	"\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63\x61"</div><div class='add'>+	"\x74\x69\x6f\x6e\x20\x45\x43\x44\x53\x41\x20\x73\x65\x6c\x66\x2d"</div><div class='add'>+	"\x74\x65\x73\x74\x69\x6e\x67\x20\x6b\x65\x79\x30\x20\x17\x0d\x32"</div><div class='add'>+	"\x34\x30\x34\x31\x33\x32\x32\x31\x36\x32\x36\x5a\x18\x0f\x32\x31"</div><div class='add'>+	"\x32\x34\x30\x33\x32\x30\x32\x32\x31\x36\x32\x36\x5a\x30\x3a\x31"</div><div class='add'>+	"\x38\x30\x36\x06\x03\x55\x04\x03\x0c\x2f\x43\x65\x72\x74\x69\x66"</div><div class='add'>+	"\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63\x61\x74\x69"</div><div class='add'>+	"\x6f\x6e\x20\x45\x43\x44\x53\x41\x20\x73\x65\x6c\x66\x2d\x74\x65"</div><div class='add'>+	"\x73\x74\x69\x6e\x67\x20\x6b\x65\x79\x30\x59\x30\x13\x06\x07\x2a"</div><div class='add'>+	"\x86\x48\xce\x3d\x02\x01\x06\x08\x2a\x86\x48\xce\x3d\x03\x01\x07"</div><div class='add'>+	"\x03\x42\x00\x04\x07\xe5\x6b\x51\xaf\xfc\x19\x41\x2c\x88\x92\x6b"</div><div class='add'>+	"\x77\x57\x71\x03\x9e\xe2\xfe\x6e\x6a\x71\x4e\xc7\x29\x9f\x90\xe1"</div><div class='add'>+	"\x77\x18\x9f\xc2\xe7\x0a\x82\xd0\x8a\xe1\x81\xa9\x71\x7c\x5a\x73"</div><div class='add'>+	"\xfb\x25\xb9\x5b\x1e\x24\x8c\x73\x9f\xf8\x38\xf8\x48\xb4\xad\x16"</div><div class='add'>+	"\x19\xc0\x22\xc6\xa3\x5d\x30\x5b\x30\x1d\x06\x03\x55\x1d\x0e\x04"</div><div class='add'>+	"\x16\x04\x14\x29\x00\xbc\xea\x1d\xeb\x7b\xc8\x47\x9a\x84\xa2\x3d"</div><div class='add'>+	"\x75\x8e\xfd\xfd\xd2\xb2\xd3\x30\x1f\x06\x03\x55\x1d\x23\x04\x18"</div><div class='add'>+	"\x30\x16\x80\x14\x29\x00\xbc\xea\x1d\xeb\x7b\xc8\x47\x9a\x84\xa2"</div><div class='add'>+	"\x3d\x75\x8e\xfd\xfd\xd2\xb2\xd3\x30\x0c\x06\x03\x55\x1d\x13\x01"</div><div class='add'>+	"\x01\xff\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04\x04\x03"</div><div class='add'>+	"\x02\x07\x80\x30\x0a\x06\x08\x2a\x86\x48\xce\x3d\x04\x03\x02\x03"</div><div class='add'>+	"\x47\x00\x30\x44\x02\x20\x1a\xd7\xac\x07\xc8\x97\x38\xf4\x89\x43"</div><div class='add'>+	"\x7e\xc7\x66\x6e\xa5\x00\x7c\x12\x1d\xb4\x09\x76\x0c\x99\x6b\x8c"</div><div class='add'>+	"\x26\x5d\xe9\x70\x5c\xb4\x02\x20\x73\xb7\xc7\x7a\x5a\xdb\x67\x0a"</div><div class='add'>+	"\x96\x42\x19\xcf\x4f\x67\x4f\x35\x6a\xee\x29\x25\xf2\x4f\xc8\x10"</div><div class='add'>+	"\x14\x9d\x79\x69\x1c\x7a\xd7\x5d"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Signed data and detached signature blobs that form the verification tests.</div><div class='add'>+ */</div><div class='add'>+static const u8 certs_selftest_ecdsa_data[] __initconst = {</div><div class='add'>+	"\x54\x68\x69\x73\x20\x69\x73\x20\x73\x6f\x6d\x65\x20\x74\x65\x73"</div><div class='add'>+	"\x74\x20\x64\x61\x74\x61\x20\x75\x73\x65\x64\x20\x66\x6f\x72\x20"</div><div class='add'>+	"\x73\x65\x6c\x66\x2d\x74\x65\x73\x74\x69\x6e\x67\x20\x63\x65\x72"</div><div class='add'>+	"\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63"</div><div class='add'>+	"\x61\x74\x69\x6f\x6e\x2e\x0a"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 certs_selftest_ecdsa_sig[] __initconst = {</div><div class='add'>+	/* ECDSA signature using SHA-256 */</div><div class='add'>+	"\x30\x81\xf4\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x07\x02\xa0\x81"</div><div class='add'>+	"\xe6\x30\x81\xe3\x02\x01\x01\x31\x0f\x30\x0d\x06\x09\x60\x86\x48"</div><div class='add'>+	"\x01\x65\x03\x04\x02\x01\x05\x00\x30\x0b\x06\x09\x2a\x86\x48\x86"</div><div class='add'>+	"\xf7\x0d\x01\x07\x01\x31\x81\xbf\x30\x81\xbc\x02\x01\x01\x30\x52"</div><div class='add'>+	"\x30\x3a\x31\x38\x30\x36\x06\x03\x55\x04\x03\x0c\x2f\x43\x65\x72"</div><div class='add'>+	"\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63"</div><div class='add'>+	"\x61\x74\x69\x6f\x6e\x20\x45\x43\x44\x53\x41\x20\x73\x65\x6c\x66"</div><div class='add'>+	"\x2d\x74\x65\x73\x74\x69\x6e\x67\x20\x6b\x65\x79\x02\x14\x2e\xea"</div><div class='add'>+	"\x64\x8d\x7f\x17\xe6\x2e\x9e\x58\x69\xc8\x87\xc6\x8e\x1b\xd0\xf8"</div><div class='add'>+	"\x6f\xde\x30\x0d\x06\x09\x60\x86\x48\x01\x65\x03\x04\x02\x01\x05"</div><div class='add'>+	"\x00\x30\x0a\x06\x08\x2a\x86\x48\xce\x3d\x04\x03\x02\x04\x48\x30"</div><div class='add'>+	"\x46\x02\x21\x00\x86\xd1\xf4\x06\xb6\x49\x79\xf9\x09\x5f\x35\x1a"</div><div class='add'>+	"\x94\x7e\x0e\x1a\x12\x4d\xd9\xe6\x2a\x2d\xcf\x2d\x0a\xee\x88\x76"</div><div class='add'>+	"\xe0\x35\xf3\xeb\x02\x21\x00\xdf\x11\x8a\xab\x31\xf6\x3c\x1f\x32"</div><div class='add'>+	"\x43\x94\xe2\xb8\x35\xc9\xf3\x12\x4e\x9b\x31\x08\x10\x5d\x8d\xe2"</div><div class='add'>+	"\x43\x0a\x5f\xf5\xfd\xa2\xf1"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init fips_signature_selftest_ecdsa(void)</div><div class='add'>+{</div><div class='add'>+	fips_signature_selftest("ECDSA",</div><div class='add'>+				certs_selftest_ecdsa_keys,</div><div class='add'>+				sizeof(certs_selftest_ecdsa_keys) - 1,</div><div class='add'>+				certs_selftest_ecdsa_data,</div><div class='add'>+				sizeof(certs_selftest_ecdsa_data) - 1,</div><div class='add'>+				certs_selftest_ecdsa_sig,</div><div class='add'>+				sizeof(certs_selftest_ecdsa_sig) - 1);</div><div class='add'>+}</div><div class='head'>diff --git a/crypto/asymmetric_keys/selftest_rsa.c b/crypto/asymmetric_keys/selftest_rsa.c<br/>new file mode 100644<br/>index 000000000000..09c9815e456a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/selftest_rsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/selftest_rsa.c</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* Self-tests for PKCS#7 RSA signature verification.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Joachim Vandersmissen &lt;git@jvdsn.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include "selftest.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set of X.509 certificates to provide public keys for the tests. These will</div><div class='add'>+ * be loaded into a temporary keyring for the duration of the testing.</div><div class='add'>+ */</div><div class='add'>+static const u8 certs_selftest_rsa_keys[] __initconst = {</div><div class='add'>+	/* 4096-bit RSA certificate */</div><div class='add'>+	"\x30\x82\x05\x55\x30\x82\x03\x3d\xa0\x03\x02\x01\x02\x02\x14\x73"</div><div class='add'>+	"\x98\xea\x98\x2d\xd0\x2e\xa8\xb1\xcf\x57\xc7\xf2\x97\xb3\xe6\x1a"</div><div class='add'>+	"\xfc\x8c\x0a\x30\x0d\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x01\x0b"</div><div class='add'>+	"\x05\x00\x30\x34\x31\x32\x30\x30\x06\x03\x55\x04\x03\x0c\x29\x43"</div><div class='add'>+	"\x65\x72\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66"</div><div class='add'>+	"\x69\x63\x61\x74\x69\x6f\x6e\x20\x73\x65\x6c\x66\x2d\x74\x65\x73"</div><div class='add'>+	"\x74\x69\x6e\x67\x20\x6b\x65\x79\x30\x20\x17\x0d\x32\x32\x30\x35"</div><div class='add'>+	"\x31\x38\x32\x32\x33\x32\x34\x31\x5a\x18\x0f\x32\x31\x32\x32\x30"</div><div class='add'>+	"\x34\x32\x34\x32\x32\x33\x32\x34\x31\x5a\x30\x34\x31\x32\x30\x30"</div><div class='add'>+	"\x06\x03\x55\x04\x03\x0c\x29\x43\x65\x72\x74\x69\x66\x69\x63\x61"</div><div class='add'>+	"\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63\x61\x74\x69\x6f\x6e\x20"</div><div class='add'>+	"\x73\x65\x6c\x66\x2d\x74\x65\x73\x74\x69\x6e\x67\x20\x6b\x65\x79"</div><div class='add'>+	"\x30\x82\x02\x22\x30\x0d\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x01"</div><div class='add'>+	"\x01\x05\x00\x03\x82\x02\x0f\x00\x30\x82\x02\x0a\x02\x82\x02\x01"</div><div class='add'>+	"\x00\xcc\xac\x49\xdd\x3b\xca\xb0\x15\x7e\x84\x6a\xb2\x0a\x69\x5f"</div><div class='add'>+	"\x1c\x0a\x61\x82\x3b\x4f\x2c\xa3\x95\x2c\x08\x58\x4b\xb1\x5d\x99"</div><div class='add'>+	"\xe0\xc3\xc1\x79\xc2\xb3\xeb\xc0\x1e\x6d\x3e\x54\x1d\xbd\xb7\x92"</div><div class='add'>+	"\x7b\x4d\xb5\x95\x58\xb2\x52\x2e\xc6\x24\x4b\x71\x63\x80\x32\x77"</div><div class='add'>+	"\xa7\x38\x5e\xdb\x72\xae\x6e\x0d\xec\xfb\xb6\x6d\x01\x7f\xe9\x55"</div><div class='add'>+	"\x66\xdf\xbf\x1d\x76\x78\x02\x31\xe8\xe5\x07\xf8\xb7\x82\x5c\x0d"</div><div class='add'>+	"\xd4\xbb\xfb\xa2\x59\x0d\x2e\x3a\x78\x95\x3a\x8b\x46\x06\x47\x44"</div><div class='add'>+	"\x46\xd7\xcd\x06\x6a\x41\x13\xe3\x19\xf6\xbb\x6e\x38\xf4\x83\x01"</div><div class='add'>+	"\xa3\xbf\x4a\x39\x4f\xd7\x0a\xe9\x38\xb3\xf5\x94\x14\x4e\xdd\xf7"</div><div class='add'>+	"\x43\xfd\x24\xb2\x49\x3c\xa5\xf7\x7a\x7c\xd4\x45\x3d\x97\x75\x68"</div><div class='add'>+	"\xf1\xed\x4c\x42\x0b\x70\xca\x85\xf3\xde\xe5\x88\x2c\xc5\xbe\xb6"</div><div class='add'>+	"\x97\x34\xba\x24\x02\xcd\x8b\x86\x9f\xa9\x73\xca\x73\xcf\x92\x81"</div><div class='add'>+	"\xee\x75\x55\xbb\x18\x67\x5c\xff\x3f\xb5\xdd\x33\x1b\x0c\xe9\x78"</div><div class='add'>+	"\xdb\x5c\xcf\xaa\x5c\x43\x42\xdf\x5e\xa9\x6d\xec\xd7\xd7\xff\xe6"</div><div class='add'>+	"\xa1\x3a\x92\x1a\xda\xae\xf6\x8c\x6f\x7b\xd5\xb4\x6e\x06\xe9\x8f"</div><div class='add'>+	"\xe8\xde\x09\x31\x89\xed\x0e\x11\xa1\xfa\x8a\xe9\xe9\x64\x59\x62"</div><div class='add'>+	"\x53\xda\xd1\x70\xbe\x11\xd4\x99\x97\x11\xcf\x99\xde\x0b\x9d\x94"</div><div class='add'>+	"\x7e\xaa\xb8\x52\xea\x37\xdb\x90\x7e\x35\xbd\xd9\xfe\x6d\x0a\x48"</div><div class='add'>+	"\x70\x28\xdd\xd5\x0d\x7f\x03\x80\x93\x14\x23\x8f\xb9\x22\xcd\x7c"</div><div class='add'>+	"\x29\xfe\xf1\x72\xb5\x5c\x0b\x12\xcf\x9c\x15\xf6\x11\x4c\x7a\x45"</div><div class='add'>+	"\x25\x8c\x45\x0a\x34\xac\x2d\x9a\x81\xca\x0b\x13\x22\xcd\xeb\x1a"</div><div class='add'>+	"\x38\x88\x18\x97\x96\x08\x81\xaa\xcc\x8f\x0f\x8a\x32\x7b\x76\x68"</div><div class='add'>+	"\x03\x68\x43\xbf\x11\xba\x55\x60\xfd\x80\x1c\x0d\x9b\x69\xb6\x09"</div><div class='add'>+	"\x72\xbc\x0f\x41\x2f\x07\x82\xc6\xe3\xb2\x13\x91\xc4\x6d\x14\x95"</div><div class='add'>+	"\x31\xbe\x19\xbd\xbc\xed\xe1\x4c\x74\xa2\xe0\x78\x0b\xbb\x94\xec"</div><div class='add'>+	"\x4c\x53\x3a\xa2\xb5\x84\x1d\x4b\x65\x7e\xdc\xf7\xdb\x36\x7d\xbe"</div><div class='add'>+	"\x9e\x3b\x36\x66\x42\x66\x76\x35\xbf\xbe\xf0\xc1\x3c\x7c\xe9\x42"</div><div class='add'>+	"\x5c\x24\x53\x03\x05\xa8\x67\x24\x50\x02\x75\xff\x24\x46\x3b\x35"</div><div class='add'>+	"\x89\x76\xe6\x70\xda\xc5\x51\x8c\x9a\xe5\x05\xb0\x0b\xd0\x2d\xd4"</div><div class='add'>+	"\x7d\x57\x75\x94\x6b\xf9\x0a\xad\x0e\x41\x00\x15\xd0\x4f\xc0\x7f"</div><div class='add'>+	"\x90\x2d\x18\x48\x8f\x28\xfe\x5d\xa7\xcd\x99\x9e\xbd\x02\x6c\x8a"</div><div class='add'>+	"\x31\xf3\x1c\xc7\x4b\xe6\x93\xcd\x42\xa2\xe4\x68\x10\x47\x9d\xfc"</div><div class='add'>+	"\x21\x02\x03\x01\x00\x01\xa3\x5d\x30\x5b\x30\x0c\x06\x03\x55\x1d"</div><div class='add'>+	"\x13\x01\x01\xff\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04"</div><div class='add'>+	"\x04\x03\x02\x07\x80\x30\x1d\x06\x03\x55\x1d\x0e\x04\x16\x04\x14"</div><div class='add'>+	"\xf5\x87\x03\xbb\x33\xce\x1b\x73\xee\x02\xec\xcd\xee\x5b\x88\x17"</div><div class='add'>+	"\x51\x8f\xe3\xdb\x30\x1f\x06\x03\x55\x1d\x23\x04\x18\x30\x16\x80"</div><div class='add'>+	"\x14\xf5\x87\x03\xbb\x33\xce\x1b\x73\xee\x02\xec\xcd\xee\x5b\x88"</div><div class='add'>+	"\x17\x51\x8f\xe3\xdb\x30\x0d\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01"</div><div class='add'>+	"\x01\x0b\x05\x00\x03\x82\x02\x01\x00\xc0\x2e\x12\x41\x7b\x73\x85"</div><div class='add'>+	"\x16\xc8\xdb\x86\x79\xe8\xf5\xcd\x44\xf4\xc6\xe2\x81\x23\x5e\x47"</div><div class='add'>+	"\xcb\xab\x25\xf1\x1e\x58\x3e\x31\x7f\x78\xad\x85\xeb\xfe\x14\x88"</div><div class='add'>+	"\x60\xf7\x7f\xd2\x26\xa2\xf4\x98\x2a\xfd\xba\x05\x0c\x20\x33\x12"</div><div class='add'>+	"\xcc\x4d\x14\x61\x64\x81\x93\xd3\x33\xed\xc8\xff\xf1\x78\xcc\x5f"</div><div class='add'>+	"\x51\x9f\x09\xd7\xbe\x0d\x5c\x74\xfd\x9b\xdf\x52\x4a\xc9\xa8\x71"</div><div class='add'>+	"\x25\x33\x04\x10\x67\x36\xd0\xb3\x0b\xc9\xa1\x40\x72\xae\x41\x7b"</div><div class='add'>+	"\x68\xe6\xe4\x7b\xd0\x28\xf7\x6d\xe7\x3f\x50\xfc\x91\x7c\x91\x56"</div><div class='add'>+	"\xd4\xdf\xa6\xbb\xe8\x4d\x1b\x58\xaa\x28\xfa\xc1\x19\xeb\x11\x2f"</div><div class='add'>+	"\x24\x8b\x7c\xc5\xa9\x86\x26\xaa\x6e\xb7\x9b\xd5\xf8\x06\xfb\x02"</div><div class='add'>+	"\x52\x7b\x9c\x9e\xa1\xe0\x07\x8b\x5e\xe4\xb8\x55\x29\xf6\x48\x52"</div><div class='add'>+	"\x1c\x1b\x54\x2d\x46\xd8\xe5\x71\xb9\x60\xd1\x45\xb5\x92\x89\x8a"</div><div class='add'>+	"\x63\x58\x2a\xb3\xc6\xb2\x76\xe2\x3c\x82\x59\x04\xae\x5a\xc4\x99"</div><div class='add'>+	"\x7b\x2e\x4b\x46\x57\xb8\x29\x24\xb2\xfd\xee\x2c\x0d\xa4\x83\xfa"</div><div class='add'>+	"\x65\x2a\x07\x35\x8b\x97\xcf\xbd\x96\x2e\xd1\x7e\x6c\xc2\x1e\x87"</div><div class='add'>+	"\xb6\x6c\x76\x65\xb5\xb2\x62\xda\x8b\xe9\x73\xe3\xdb\x33\xdd\x13"</div><div class='add'>+	"\x3a\x17\x63\x6a\x76\xde\x8d\x8f\xe0\x47\x61\x28\x3a\x83\xff\x8f"</div><div class='add'>+	"\xe7\xc7\xe0\x4a\xa3\xe5\x07\xcf\xe9\x8c\x35\x35\x2e\xe7\x80\x66"</div><div class='add'>+	"\x31\xbf\x91\x58\x0a\xe1\x25\x3d\x38\xd3\xa4\xf0\x59\x34\x47\x07"</div><div class='add'>+	"\x62\x0f\xbe\x30\xdd\x81\x88\x58\xf0\x28\xb0\x96\xe5\x82\xf8\x05"</div><div class='add'>+	"\xb7\x13\x01\xbc\xfa\xc6\x1f\x86\x72\xcc\xf9\xee\x8e\xd9\xd6\x04"</div><div class='add'>+	"\x8c\x24\x6c\xbf\x0f\x5d\x37\x39\xcf\x45\xc1\x93\x3a\xd2\xed\x5c"</div><div class='add'>+	"\x58\x79\x74\x86\x62\x30\x7e\x8e\xbb\xdd\x7a\xa9\xed\xca\x40\xcb"</div><div class='add'>+	"\x62\x47\xf4\xb4\x9f\x52\x7f\x72\x63\xa8\xf0\x2b\xaf\x45\x2a\x48"</div><div class='add'>+	"\x19\x6d\xe3\xfb\xf9\x19\x66\x69\xc8\xcc\x62\x87\x6c\x53\x2b\x2d"</div><div class='add'>+	"\x6e\x90\x6c\x54\x3a\x82\x25\x41\xcb\x18\x6a\xa4\x22\xa8\xa1\xc4"</div><div class='add'>+	"\x47\xd7\x81\x00\x1c\x15\x51\x0f\x1a\xaf\xef\x9f\xa6\x61\x8c\xbd"</div><div class='add'>+	"\x6b\x8b\xed\xe6\xac\x0e\xb6\x3a\x4c\x92\xe6\x0f\x91\x0a\x0f\x71"</div><div class='add'>+	"\xc7\xa0\xb9\x0d\x3a\x17\x5a\x6f\x35\xc8\xe7\x50\x4f\x46\xe8\x70"</div><div class='add'>+	"\x60\x48\x06\x82\x8b\x66\x58\xe6\x73\x91\x9c\x12\x3d\x35\x8e\x46"</div><div class='add'>+	"\xad\x5a\xf5\xb3\xdb\x69\x21\x04\xfd\xd3\x1c\xdf\x94\x9d\x56\xb0"</div><div class='add'>+	"\x0a\xd1\x95\x76\x8d\xec\x9e\xdd\x0b\x15\x97\x64\xad\xe5\xf2\x62"</div><div class='add'>+	"\x02\xfc\x9e\x5f\x56\x42\x39\x05\xb3"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Signed data and detached signature blobs that form the verification tests.</div><div class='add'>+ */</div><div class='add'>+static const u8 certs_selftest_rsa_data[] __initconst = {</div><div class='add'>+	"\x54\x68\x69\x73\x20\x69\x73\x20\x73\x6f\x6d\x65\x20\x74\x65\x73"</div><div class='add'>+	"\x74\x20\x64\x61\x74\x61\x20\x75\x73\x65\x64\x20\x66\x6f\x72\x20"</div><div class='add'>+	"\x73\x65\x6c\x66\x2d\x74\x65\x73\x74\x69\x6e\x67\x20\x63\x65\x72"</div><div class='add'>+	"\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69\x66\x69\x63"</div><div class='add'>+	"\x61\x74\x69\x6f\x6e\x2e\x0a"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 certs_selftest_rsa_sig[] __initconst = {</div><div class='add'>+	/* RSA signature using PKCS#1 v1.5 padding with SHA-256 */</div><div class='add'>+	"\x30\x82\x02\xab\x06\x09\x2a\x86\x48\x86\xf7\x0d\x01\x07\x02\xa0"</div><div class='add'>+	"\x82\x02\x9c\x30\x82\x02\x98\x02\x01\x01\x31\x0d\x30\x0b\x06\x09"</div><div class='add'>+	"\x60\x86\x48\x01\x65\x03\x04\x02\x01\x30\x0b\x06\x09\x2a\x86\x48"</div><div class='add'>+	"\x86\xf7\x0d\x01\x07\x01\x31\x82\x02\x75\x30\x82\x02\x71\x02\x01"</div><div class='add'>+	"\x01\x30\x4c\x30\x34\x31\x32\x30\x30\x06\x03\x55\x04\x03\x0c\x29"</div><div class='add'>+	"\x43\x65\x72\x74\x69\x66\x69\x63\x61\x74\x65\x20\x76\x65\x72\x69"</div><div class='add'>+	"\x66\x69\x63\x61\x74\x69\x6f\x6e\x20\x73\x65\x6c\x66\x2d\x74\x65"</div><div class='add'>+	"\x73\x74\x69\x6e\x67\x20\x6b\x65\x79\x02\x14\x73\x98\xea\x98\x2d"</div><div class='add'>+	"\xd0\x2e\xa8\xb1\xcf\x57\xc7\xf2\x97\xb3\xe6\x1a\xfc\x8c\x0a\x30"</div><div class='add'>+	"\x0b\x06\x09\x60\x86\x48\x01\x65\x03\x04\x02\x01\x30\x0d\x06\x09"</div><div class='add'>+	"\x2a\x86\x48\x86\xf7\x0d\x01\x01\x01\x05\x00\x04\x82\x02\x00\xac"</div><div class='add'>+	"\xb0\xf2\x07\xd6\x99\x6d\xc0\xc0\xd9\x8d\x31\x0d\x7e\x04\xeb\xc3"</div><div class='add'>+	"\x88\x90\xc4\x58\x46\xd4\xe2\xa0\xa3\x25\xe3\x04\x50\x37\x85\x8c"</div><div class='add'>+	"\x91\xc6\xfc\xc5\xd4\x92\xfd\x05\xd8\xb8\xa3\xb8\xba\x89\x13\x00"</div><div class='add'>+	"\x88\x79\x99\x51\x6b\x5b\x28\x31\xc0\xb3\x1b\x7a\x68\x2c\x00\xdb"</div><div class='add'>+	"\x4b\x46\x11\xf3\xfa\x50\x8e\x19\x89\xa2\x4c\xda\x4c\x89\x01\x11"</div><div class='add'>+	"\x89\xee\xd3\xc8\xc1\xe7\xa7\xf6\xb2\xa2\xf8\x65\xb8\x35\x20\x33"</div><div class='add'>+	"\xba\x12\x62\xd5\xbd\xaa\x71\xe5\x5b\xc0\x6a\x32\xff\x6a\x2e\x23"</div><div class='add'>+	"\xef\x2b\xb6\x58\xb1\xfb\x5f\x82\x34\x40\x6d\x9f\xbc\x27\xac\x37"</div><div class='add'>+	"\x23\x99\xcf\x7d\x20\xb2\x39\x01\xc0\x12\xce\xd7\x5d\x2f\xb6\xab"</div><div class='add'>+	"\xb5\x56\x4f\xef\xf4\x72\x07\x58\x65\xa9\xeb\x1f\x75\x1c\x5f\x0c"</div><div class='add'>+	"\x88\xe0\xa4\xe2\xcd\x73\x2b\x9e\xb2\x05\x7e\x12\xf8\xd0\x66\x41"</div><div class='add'>+	"\xcc\x12\x63\xd4\xd6\xac\x9b\x1d\x14\x77\x8d\x1c\x57\xd5\x27\xc6"</div><div class='add'>+	"\x49\xa2\x41\x43\xf3\x59\x29\xe5\xcb\xd1\x75\xbc\x3a\x97\x2a\x72"</div><div class='add'>+	"\x22\x66\xc5\x3b\xc1\xba\xfc\x53\x18\x98\xe2\x21\x64\xc6\x52\x87"</div><div class='add'>+	"\x13\xd5\x7c\x42\xe8\xfb\x9c\x9a\x45\x32\xd5\xa5\x22\x62\x9d\xd4"</div><div class='add'>+	"\xcb\xa4\xfa\x77\xbb\x50\x24\x0b\x8b\x88\x99\x15\x56\xa9\x1e\x92"</div><div class='add'>+	"\xbf\x5d\x94\x77\xb6\xf1\x67\x01\x60\x06\x58\x5c\xdf\x18\x52\x79"</div><div class='add'>+	"\x37\x30\x93\x7d\x87\x04\xf1\xe0\x55\x59\x52\xf3\xc2\xb1\x1c\x5b"</div><div class='add'>+	"\x12\x7c\x49\x87\xfb\xf7\xed\xdd\x95\x71\xec\x4b\x1a\x85\x08\xb0"</div><div class='add'>+	"\xa0\x36\xc4\x7b\xab\x40\xe0\xf1\x98\xcc\xaf\x19\x40\x8f\x47\x6f"</div><div class='add'>+	"\xf0\x6c\x84\x29\x7f\x7f\x04\x46\xcb\x08\x0f\xe0\xc1\xc9\x70\x6e"</div><div class='add'>+	"\x95\x3b\xa4\xbc\x29\x2b\x53\x67\x45\x1b\x0d\xbc\x13\xa5\x76\x31"</div><div class='add'>+	"\xaf\xb9\xd0\xe0\x60\x12\xd2\xf4\xb7\x7c\x58\x7e\xf6\x2d\xbb\x24"</div><div class='add'>+	"\x14\x5a\x20\x24\xa8\x12\xdf\x25\xbd\x42\xce\x96\x7c\x2e\xba\x14"</div><div class='add'>+	"\x1b\x81\x9f\x18\x45\xa4\xc6\x70\x3e\x0e\xf0\xd3\x7b\x9c\x10\xbe"</div><div class='add'>+	"\xb8\x7a\x89\xc5\x9e\xd9\x97\xdf\xd7\xe7\xc6\x1d\xc0\x20\x6c\xb8"</div><div class='add'>+	"\x1e\x3a\x63\xb8\x39\x8e\x8e\x62\xd5\xd2\xb4\xcd\xff\x46\xfc\x8e"</div><div class='add'>+	"\xec\x07\x35\x0c\xff\xb0\x05\xe6\xf4\xe5\xfe\xa2\xe3\x0a\xe6\x36"</div><div class='add'>+	"\xa7\x4a\x7e\x62\x1d\xc4\x50\x39\x35\x4e\x28\xcb\x4a\xfb\x9d\xdb"</div><div class='add'>+	"\xdd\x23\xd6\x53\xb1\x74\x77\x12\xf7\x9c\xf0\x9a\x6b\xf7\xa9\x64"</div><div class='add'>+	"\x2d\x86\x21\x2a\xcf\xc6\x54\xf5\xc9\xad\xfa\xb5\x12\xb4\xf3\x51"</div><div class='add'>+	"\x77\x55\x3c\x6f\x0c\x32\xd3\x8c\x44\x39\x71\x25\xfe\x96\xd2"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init fips_signature_selftest_rsa(void)</div><div class='add'>+{</div><div class='add'>+	fips_signature_selftest("RSA",</div><div class='add'>+				certs_selftest_rsa_keys,</div><div class='add'>+				sizeof(certs_selftest_rsa_keys) - 1,</div><div class='add'>+				certs_selftest_rsa_data,</div><div class='add'>+				sizeof(certs_selftest_rsa_data) - 1,</div><div class='add'>+				certs_selftest_rsa_sig,</div><div class='add'>+				sizeof(certs_selftest_rsa_sig) - 1);</div><div class='add'>+}</div><div class='head'>diff --git a/crypto/asymmetric_keys/x509_cert_parser.c b/crypto/asymmetric_keys/x509_cert_parser.c<br/>index bb0bffa271b5..25cc4273472f 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_cert_parser.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/x509_cert_parser.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_cert_parser.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/x509_cert_parser.c</a></div><div class='hunk'>@@ -60,24 +60,23 @@ EXPORT_SYMBOL_GPL(x509_free_certificate);</div><div class='ctx'>  */</div><div class='ctx'> struct x509_certificate *x509_cert_parse(const void *data, size_t datalen)</div><div class='ctx'> {</div><div class='del'>-	struct x509_certificate *cert;</div><div class='del'>-	struct x509_parse_context *ctx;</div><div class='add'>+	struct x509_certificate *cert __free(x509_free_certificate);</div><div class='add'>+	struct x509_parse_context *ctx __free(kfree) = NULL;</div><div class='ctx'> 	struct asymmetric_key_id *kid;</div><div class='ctx'> 	long ret;</div><div class='ctx'> </div><div class='del'>-	ret = -ENOMEM;</div><div class='ctx'> 	cert = kzalloc(sizeof(struct x509_certificate), GFP_KERNEL);</div><div class='ctx'> 	if (!cert)</div><div class='del'>-		goto error_no_cert;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	cert-&gt;pub = kzalloc(sizeof(struct public_key), GFP_KERNEL);</div><div class='ctx'> 	if (!cert-&gt;pub)</div><div class='del'>-		goto error_no_ctx;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	cert-&gt;sig = kzalloc(sizeof(struct public_key_signature), GFP_KERNEL);</div><div class='ctx'> 	if (!cert-&gt;sig)</div><div class='del'>-		goto error_no_ctx;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	ctx = kzalloc(sizeof(struct x509_parse_context), GFP_KERNEL);</div><div class='ctx'> 	if (!ctx)</div><div class='del'>-		goto error_no_ctx;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;cert = cert;</div><div class='ctx'> 	ctx-&gt;data = (unsigned long)data;</div><div class='hunk'>@@ -85,7 +84,7 @@ struct x509_certificate *x509_cert_parse(const void *data, size_t datalen)</div><div class='ctx'> 	/* Attempt to decode the certificate */</div><div class='ctx'> 	ret = asn1_ber_decoder(&amp;x509_decoder, ctx, data, datalen);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto error_decode;</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='ctx'> 	/* Decode the AuthorityKeyIdentifier */</div><div class='ctx'> 	if (ctx-&gt;raw_akid) {</div><div class='hunk'>@@ -95,20 +94,19 @@ struct x509_certificate *x509_cert_parse(const void *data, size_t datalen)</div><div class='ctx'> 				       ctx-&gt;raw_akid, ctx-&gt;raw_akid_size);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			pr_warn("Couldn't decode AuthKeyIdentifier\n");</div><div class='del'>-			goto error_decode;</div><div class='add'>+			return ERR_PTR(ret);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = -ENOMEM;</div><div class='ctx'> 	cert-&gt;pub-&gt;key = kmemdup(ctx-&gt;key, ctx-&gt;key_size, GFP_KERNEL);</div><div class='ctx'> 	if (!cert-&gt;pub-&gt;key)</div><div class='del'>-		goto error_decode;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	cert-&gt;pub-&gt;keylen = ctx-&gt;key_size;</div><div class='ctx'> </div><div class='ctx'> 	cert-&gt;pub-&gt;params = kmemdup(ctx-&gt;params, ctx-&gt;params_size, GFP_KERNEL);</div><div class='ctx'> 	if (!cert-&gt;pub-&gt;params)</div><div class='del'>-		goto error_decode;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	cert-&gt;pub-&gt;paramlen = ctx-&gt;params_size;</div><div class='ctx'> 	cert-&gt;pub-&gt;algo = ctx-&gt;key_algo;</div><div class='hunk'>@@ -116,33 +114,23 @@ struct x509_certificate *x509_cert_parse(const void *data, size_t datalen)</div><div class='ctx'> 	/* Grab the signature bits */</div><div class='ctx'> 	ret = x509_get_sig_params(cert);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto error_decode;</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='ctx'> 	/* Generate cert issuer + serial number key ID */</div><div class='ctx'> 	kid = asymmetric_key_generate_id(cert-&gt;raw_serial,</div><div class='ctx'> 					 cert-&gt;raw_serial_size,</div><div class='ctx'> 					 cert-&gt;raw_issuer,</div><div class='ctx'> 					 cert-&gt;raw_issuer_size);</div><div class='del'>-	if (IS_ERR(kid)) {</div><div class='del'>-		ret = PTR_ERR(kid);</div><div class='del'>-		goto error_decode;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(kid))</div><div class='add'>+		return ERR_CAST(kid);</div><div class='ctx'> 	cert-&gt;id = kid;</div><div class='ctx'> </div><div class='ctx'> 	/* Detect self-signed certificates */</div><div class='ctx'> 	ret = x509_check_for_self_signed(cert);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto error_decode;</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='del'>-	kfree(ctx);</div><div class='del'>-	return cert;</div><div class='del'>-</div><div class='del'>-error_decode:</div><div class='del'>-	kfree(ctx);</div><div class='del'>-error_no_ctx:</div><div class='del'>-	x509_free_certificate(cert);</div><div class='del'>-error_no_cert:</div><div class='del'>-	return ERR_PTR(ret);</div><div class='add'>+	return_ptr(cert);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(x509_cert_parse);</div><div class='ctx'> </div><div class='hunk'>@@ -546,6 +534,9 @@ int x509_extract_key_data(void *context, size_t hdrlen,</div><div class='ctx'> 		case OID_id_ansip384r1:</div><div class='ctx'> 			ctx-&gt;cert-&gt;pub-&gt;pkey_algo = "ecdsa-nist-p384";</div><div class='ctx'> 			break;</div><div class='add'>+		case OID_id_ansip521r1:</div><div class='add'>+			ctx-&gt;cert-&gt;pub-&gt;pkey_algo = "ecdsa-nist-p521";</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			return -ENOPKG;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/crypto/asymmetric_keys/x509_parser.h b/crypto/asymmetric_keys/x509_parser.h<br/>index 97a886cbe01c..0688c222806b 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_parser.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/x509_parser.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_parser.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/x509_parser.h</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * Written by David Howells (dhowells@redhat.com)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/cleanup.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;crypto/public_key.h&gt;</div><div class='ctx'> #include &lt;keys/asymmetric-type.h&gt;</div><div class='hunk'>@@ -44,6 +45,8 @@ struct x509_certificate {</div><div class='ctx'>  * x509_cert_parser.c</div><div class='ctx'>  */</div><div class='ctx'> extern void x509_free_certificate(struct x509_certificate *cert);</div><div class='add'>+DEFINE_FREE(x509_free_certificate, struct x509_certificate *,</div><div class='add'>+	    if (!IS_ERR(_T)) x509_free_certificate(_T))</div><div class='ctx'> extern struct x509_certificate *x509_cert_parse(const void *data, size_t datalen);</div><div class='ctx'> extern int x509_decode_time(time64_t *_t,  size_t hdrlen,</div><div class='ctx'> 			    unsigned char tag,</div><div class='head'>diff --git a/crypto/asymmetric_keys/x509_public_key.c b/crypto/asymmetric_keys/x509_public_key.c<br/>index 6a4f00be22fc..00ac7159fba2 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_public_key.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/asymmetric_keys/x509_public_key.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_public_key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/asymmetric_keys/x509_public_key.c</a></div><div class='hunk'>@@ -161,12 +161,11 @@ not_self_signed:</div><div class='ctx'>  */</div><div class='ctx'> static int x509_key_preparse(struct key_preparsed_payload *prep)</div><div class='ctx'> {</div><div class='del'>-	struct asymmetric_key_ids *kids;</div><div class='del'>-	struct x509_certificate *cert;</div><div class='add'>+	struct x509_certificate *cert __free(x509_free_certificate);</div><div class='add'>+	struct asymmetric_key_ids *kids __free(kfree) = NULL;</div><div class='add'>+	char *p, *desc __free(kfree) = NULL;</div><div class='ctx'> 	const char *q;</div><div class='ctx'> 	size_t srlen, sulen;</div><div class='del'>-	char *desc = NULL, *p;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	cert = x509_cert_parse(prep-&gt;data, prep-&gt;datalen);</div><div class='ctx'> 	if (IS_ERR(cert))</div><div class='hunk'>@@ -188,9 +187,8 @@ static int x509_key_preparse(struct key_preparsed_payload *prep)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Don't permit addition of blacklisted keys */</div><div class='del'>-	ret = -EKEYREJECTED;</div><div class='ctx'> 	if (cert-&gt;blacklisted)</div><div class='del'>-		goto error_free_cert;</div><div class='add'>+		return -EKEYREJECTED;</div><div class='ctx'> </div><div class='ctx'> 	/* Propose a description */</div><div class='ctx'> 	sulen = strlen(cert-&gt;subject);</div><div class='hunk'>@@ -202,10 +200,9 @@ static int x509_key_preparse(struct key_preparsed_payload *prep)</div><div class='ctx'> 		q = cert-&gt;raw_serial;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = -ENOMEM;</div><div class='ctx'> 	desc = kmalloc(sulen + 2 + srlen * 2 + 1, GFP_KERNEL);</div><div class='ctx'> 	if (!desc)</div><div class='del'>-		goto error_free_cert;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	p = memcpy(desc, cert-&gt;subject, sulen);</div><div class='ctx'> 	p += sulen;</div><div class='ctx'> 	*p++ = ':';</div><div class='hunk'>@@ -215,16 +212,14 @@ static int x509_key_preparse(struct key_preparsed_payload *prep)</div><div class='ctx'> </div><div class='ctx'> 	kids = kmalloc(sizeof(struct asymmetric_key_ids), GFP_KERNEL);</div><div class='ctx'> 	if (!kids)</div><div class='del'>-		goto error_free_desc;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	kids-&gt;id[0] = cert-&gt;id;</div><div class='ctx'> 	kids-&gt;id[1] = cert-&gt;skid;</div><div class='ctx'> 	kids-&gt;id[2] = asymmetric_key_generate_id(cert-&gt;raw_subject,</div><div class='ctx'> 						 cert-&gt;raw_subject_size,</div><div class='ctx'> 						 "", 0);</div><div class='del'>-	if (IS_ERR(kids-&gt;id[2])) {</div><div class='del'>-		ret = PTR_ERR(kids-&gt;id[2]);</div><div class='del'>-		goto error_free_kids;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(kids-&gt;id[2]))</div><div class='add'>+		return PTR_ERR(kids-&gt;id[2]);</div><div class='ctx'> </div><div class='ctx'> 	/* We're pinning the module by being linked against it */</div><div class='ctx'> 	__module_get(public_key_subtype.owner);</div><div class='hunk'>@@ -242,15 +237,7 @@ static int x509_key_preparse(struct key_preparsed_payload *prep)</div><div class='ctx'> 	cert-&gt;sig = NULL;</div><div class='ctx'> 	desc = NULL;</div><div class='ctx'> 	kids = NULL;</div><div class='del'>-	ret = 0;</div><div class='del'>-</div><div class='del'>-error_free_kids:</div><div class='del'>-	kfree(kids);</div><div class='del'>-error_free_desc:</div><div class='del'>-	kfree(desc);</div><div class='del'>-error_free_cert:</div><div class='del'>-	x509_free_certificate(cert);</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct asymmetric_key_parser x509_key_parser = {</div><div class='head'>diff --git a/crypto/bpf_crypto_skcipher.c b/crypto/bpf_crypto_skcipher.c<br/>new file mode 100644<br/>index 000000000000..b5e657415770<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/crypto/bpf_crypto_skcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/bpf_crypto_skcipher.c</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (c) 2024 Meta, Inc */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/bpf_crypto.h&gt;</div><div class='add'>+#include &lt;crypto/skcipher.h&gt;</div><div class='add'>+</div><div class='add'>+static void *bpf_crypto_lskcipher_alloc_tfm(const char *algo)</div><div class='add'>+{</div><div class='add'>+	return crypto_alloc_lskcipher(algo, 0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bpf_crypto_lskcipher_free_tfm(void *tfm)</div><div class='add'>+{</div><div class='add'>+	crypto_free_lskcipher(tfm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bpf_crypto_lskcipher_has_algo(const char *algo)</div><div class='add'>+{</div><div class='add'>+	return crypto_has_skcipher(algo, CRYPTO_ALG_TYPE_LSKCIPHER, CRYPTO_ALG_TYPE_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bpf_crypto_lskcipher_setkey(void *tfm, const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	return crypto_lskcipher_setkey(tfm, key, keylen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 bpf_crypto_lskcipher_get_flags(void *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_lskcipher_get_flags(tfm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int bpf_crypto_lskcipher_ivsize(void *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_lskcipher_ivsize(tfm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int bpf_crypto_lskcipher_statesize(void *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_lskcipher_statesize(tfm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bpf_crypto_lskcipher_encrypt(void *tfm, const u8 *src, u8 *dst,</div><div class='add'>+					unsigned int len, u8 *siv)</div><div class='add'>+{</div><div class='add'>+	return crypto_lskcipher_encrypt(tfm, src, dst, len, siv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bpf_crypto_lskcipher_decrypt(void *tfm, const u8 *src, u8 *dst,</div><div class='add'>+					unsigned int len, u8 *siv)</div><div class='add'>+{</div><div class='add'>+	return crypto_lskcipher_decrypt(tfm, src, dst, len, siv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct bpf_crypto_type bpf_crypto_lskcipher_type = {</div><div class='add'>+	.alloc_tfm	= bpf_crypto_lskcipher_alloc_tfm,</div><div class='add'>+	.free_tfm	= bpf_crypto_lskcipher_free_tfm,</div><div class='add'>+	.has_algo	= bpf_crypto_lskcipher_has_algo,</div><div class='add'>+	.setkey		= bpf_crypto_lskcipher_setkey,</div><div class='add'>+	.encrypt	= bpf_crypto_lskcipher_encrypt,</div><div class='add'>+	.decrypt	= bpf_crypto_lskcipher_decrypt,</div><div class='add'>+	.ivsize		= bpf_crypto_lskcipher_ivsize,</div><div class='add'>+	.statesize	= bpf_crypto_lskcipher_statesize,</div><div class='add'>+	.get_flags	= bpf_crypto_lskcipher_get_flags,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.name		= "skcipher",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init bpf_crypto_skcipher_init(void)</div><div class='add'>+{</div><div class='add'>+	return bpf_crypto_register_type(&amp;bpf_crypto_lskcipher_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit bpf_crypto_skcipher_exit(void)</div><div class='add'>+{</div><div class='add'>+	int err = bpf_crypto_unregister_type(&amp;bpf_crypto_lskcipher_type);</div><div class='add'>+	WARN_ON_ONCE(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(bpf_crypto_skcipher_init);</div><div class='add'>+module_exit(bpf_crypto_skcipher_exit);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/cipher.c b/crypto/cipher.c<br/>index 47c77a3e5978..40cae908788e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cipher.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/cipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/cipher.c</a></div><div class='hunk'>@@ -34,8 +34,7 @@ static int setkey_unaligned(struct crypto_cipher *tfm, const u8 *key,</div><div class='ctx'> 	alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);</div><div class='ctx'> 	memcpy(alignbuffer, key, keylen);</div><div class='ctx'> 	ret = cia-&gt;cia_setkey(crypto_cipher_tfm(tfm), alignbuffer, keylen);</div><div class='del'>-	memset(alignbuffer, 0, keylen);</div><div class='del'>-	kfree(buffer);</div><div class='add'>+	kfree_sensitive(buffer);</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='head'>diff --git a/crypto/compress.h b/crypto/compress.h<br/>index 19f65516d699..c3cedfb5e606 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/compress.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/compress.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/compress.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/compress.h</a></div><div class='hunk'>@@ -13,14 +13,11 @@</div><div class='ctx'> </div><div class='ctx'> struct acomp_req;</div><div class='ctx'> struct comp_alg_common;</div><div class='del'>-struct sk_buff;</div><div class='ctx'> </div><div class='ctx'> int crypto_init_scomp_ops_async(struct crypto_tfm *tfm);</div><div class='ctx'> struct acomp_req *crypto_acomp_scomp_alloc_ctx(struct acomp_req *req);</div><div class='ctx'> void crypto_acomp_scomp_free_ctx(struct acomp_req *req);</div><div class='ctx'> </div><div class='del'>-int crypto_acomp_report_stat(struct sk_buff *skb, struct crypto_alg *alg);</div><div class='del'>-</div><div class='ctx'> void comp_prepare_alg(struct comp_alg_common *alg);</div><div class='ctx'> </div><div class='ctx'> #endif	/* _LOCAL_CRYPTO_COMPRESS_H */</div><div class='head'>diff --git a/crypto/crypto_user_base.c b/crypto/crypto_user.c<br/>index 3fa20f12989f..6c571834e86a 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/crypto_user_base.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/crypto_user_base.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/crypto_user.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/crypto_user.c</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> #include &lt;crypto/internal/rng.h&gt;</div><div class='ctx'> #include &lt;crypto/akcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/kpp.h&gt;</div><div class='del'>-#include &lt;crypto/internal/cryptouser.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='hunk'>@@ -33,7 +32,7 @@ struct crypto_dump_info {</div><div class='ctx'> 	u16 nlmsg_flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct crypto_alg *crypto_alg_match(struct crypto_user_alg *p, int exact)</div><div class='add'>+static struct crypto_alg *crypto_alg_match(struct crypto_user_alg *p, int exact)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_alg *q, *alg = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -387,6 +386,13 @@ static int crypto_del_rng(struct sk_buff *skb, struct nlmsghdr *nlh,</div><div class='ctx'> 	return crypto_del_default_rng();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int crypto_reportstat(struct sk_buff *in_skb, struct nlmsghdr *in_nlh,</div><div class='add'>+			     struct nlattr **attrs)</div><div class='add'>+{</div><div class='add'>+	/* No longer supported */</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define MSGSIZE(type) sizeof(struct type)</div><div class='ctx'> </div><div class='ctx'> static const int crypto_msg_min[CRYPTO_NR_MSGTYPES] = {</div><div class='head'>diff --git a/crypto/crypto_user_stat.c b/crypto/crypto_user_stat.c<br/>deleted file mode 100644<br/>index d4f3d39b5137..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/crypto/crypto_user_stat.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/crypto_user_stat.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,176 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Crypto user configuration API.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2017-2018 Corentin Labbe &lt;clabbe@baylibre.com&gt;</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/cryptouser.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;net/netlink.h&gt;</div><div class='del'>-#include &lt;net/sock.h&gt;</div><div class='del'>-</div><div class='del'>-#define null_terminated(x)	(strnlen(x, sizeof(x)) &lt; sizeof(x))</div><div class='del'>-</div><div class='del'>-struct crypto_dump_info {</div><div class='del'>-	struct sk_buff *in_skb;</div><div class='del'>-	struct sk_buff *out_skb;</div><div class='del'>-	u32 nlmsg_seq;</div><div class='del'>-	u16 nlmsg_flags;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int crypto_report_cipher(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct crypto_stat_cipher rcipher;</div><div class='del'>-</div><div class='del'>-	memset(&amp;rcipher, 0, sizeof(rcipher));</div><div class='del'>-</div><div class='del'>-	strscpy(rcipher.type, "cipher", sizeof(rcipher.type));</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_CIPHER, sizeof(rcipher), &amp;rcipher);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_report_comp(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct crypto_stat_compress rcomp;</div><div class='del'>-</div><div class='del'>-	memset(&amp;rcomp, 0, sizeof(rcomp));</div><div class='del'>-</div><div class='del'>-	strscpy(rcomp.type, "compression", sizeof(rcomp.type));</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_COMPRESS, sizeof(rcomp), &amp;rcomp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_reportstat_one(struct crypto_alg *alg,</div><div class='del'>-				 struct crypto_user_alg *ualg,</div><div class='del'>-				 struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	memset(ualg, 0, sizeof(*ualg));</div><div class='del'>-</div><div class='del'>-	strscpy(ualg-&gt;cru_name, alg-&gt;cra_name, sizeof(ualg-&gt;cru_name));</div><div class='del'>-	strscpy(ualg-&gt;cru_driver_name, alg-&gt;cra_driver_name,</div><div class='del'>-		sizeof(ualg-&gt;cru_driver_name));</div><div class='del'>-	strscpy(ualg-&gt;cru_module_name, module_name(alg-&gt;cra_module),</div><div class='del'>-		sizeof(ualg-&gt;cru_module_name));</div><div class='del'>-</div><div class='del'>-	ualg-&gt;cru_type = 0;</div><div class='del'>-	ualg-&gt;cru_mask = 0;</div><div class='del'>-	ualg-&gt;cru_flags = alg-&gt;cra_flags;</div><div class='del'>-	ualg-&gt;cru_refcnt = refcount_read(&amp;alg-&gt;cra_refcnt);</div><div class='del'>-</div><div class='del'>-	if (nla_put_u32(skb, CRYPTOCFGA_PRIORITY_VAL, alg-&gt;cra_priority))</div><div class='del'>-		goto nla_put_failure;</div><div class='del'>-	if (alg-&gt;cra_flags &amp; CRYPTO_ALG_LARVAL) {</div><div class='del'>-		struct crypto_stat_larval rl;</div><div class='del'>-</div><div class='del'>-		memset(&amp;rl, 0, sizeof(rl));</div><div class='del'>-		strscpy(rl.type, "larval", sizeof(rl.type));</div><div class='del'>-		if (nla_put(skb, CRYPTOCFGA_STAT_LARVAL, sizeof(rl), &amp;rl))</div><div class='del'>-			goto nla_put_failure;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (alg-&gt;cra_type &amp;&amp; alg-&gt;cra_type-&gt;report_stat) {</div><div class='del'>-		if (alg-&gt;cra_type-&gt;report_stat(skb, alg))</div><div class='del'>-			goto nla_put_failure;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (alg-&gt;cra_flags &amp; (CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_LARVAL)) {</div><div class='del'>-	case CRYPTO_ALG_TYPE_CIPHER:</div><div class='del'>-		if (crypto_report_cipher(skb, alg))</div><div class='del'>-			goto nla_put_failure;</div><div class='del'>-		break;</div><div class='del'>-	case CRYPTO_ALG_TYPE_COMPRESS:</div><div class='del'>-		if (crypto_report_comp(skb, alg))</div><div class='del'>-			goto nla_put_failure;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		pr_err("ERROR: Unhandled alg %d in %s\n",</div><div class='del'>-		       alg-&gt;cra_flags &amp; (CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_LARVAL),</div><div class='del'>-		       __func__);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-nla_put_failure:</div><div class='del'>-	return -EMSGSIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_reportstat_alg(struct crypto_alg *alg,</div><div class='del'>-				 struct crypto_dump_info *info)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *in_skb = info-&gt;in_skb;</div><div class='del'>-	struct sk_buff *skb = info-&gt;out_skb;</div><div class='del'>-	struct nlmsghdr *nlh;</div><div class='del'>-	struct crypto_user_alg *ualg;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	nlh = nlmsg_put(skb, NETLINK_CB(in_skb).portid, info-&gt;nlmsg_seq,</div><div class='del'>-			CRYPTO_MSG_GETSTAT, sizeof(*ualg), info-&gt;nlmsg_flags);</div><div class='del'>-	if (!nlh) {</div><div class='del'>-		err = -EMSGSIZE;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ualg = nlmsg_data(nlh);</div><div class='del'>-</div><div class='del'>-	err = crypto_reportstat_one(alg, ualg, skb);</div><div class='del'>-	if (err) {</div><div class='del'>-		nlmsg_cancel(skb, nlh);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	nlmsg_end(skb, nlh);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto_reportstat(struct sk_buff *in_skb, struct nlmsghdr *in_nlh,</div><div class='del'>-		      struct nlattr **attrs)</div><div class='del'>-{</div><div class='del'>-	struct net *net = sock_net(in_skb-&gt;sk);</div><div class='del'>-	struct crypto_user_alg *p = nlmsg_data(in_nlh);</div><div class='del'>-	struct crypto_alg *alg;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct crypto_dump_info info;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!null_terminated(p-&gt;cru_name) || !null_terminated(p-&gt;cru_driver_name))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alg = crypto_alg_match(p, 0);</div><div class='del'>-	if (!alg)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	err = -ENOMEM;</div><div class='del'>-	skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_ATOMIC);</div><div class='del'>-	if (!skb)</div><div class='del'>-		goto drop_alg;</div><div class='del'>-</div><div class='del'>-	info.in_skb = in_skb;</div><div class='del'>-	info.out_skb = skb;</div><div class='del'>-	info.nlmsg_seq = in_nlh-&gt;nlmsg_seq;</div><div class='del'>-	info.nlmsg_flags = 0;</div><div class='del'>-</div><div class='del'>-	err = crypto_reportstat_alg(alg, &amp;info);</div><div class='del'>-</div><div class='del'>-drop_alg:</div><div class='del'>-	crypto_mod_put(alg);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		kfree_skb(skb);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return nlmsg_unicast(net-&gt;crypto_nlsk, skb, NETLINK_CB(in_skb).portid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/ecc.c b/crypto/ecc.c<br/>index f53fb4d6af99..c1d2e884be1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ecc.c</a></div><div class='hunk'>@@ -60,6 +60,8 @@ const struct ecc_curve *ecc_get_curve(unsigned int curve_id)</div><div class='ctx'> 		return &amp;nist_p256;</div><div class='ctx'> 	case ECC_CURVE_NIST_P384:</div><div class='ctx'> 		return &amp;nist_p384;</div><div class='add'>+	case ECC_CURVE_NIST_P521:</div><div class='add'>+		return &amp;nist_p521;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -689,7 +691,7 @@ static void vli_mmod_barrett(u64 *result, u64 *product, const u64 *mod,</div><div class='ctx'> static void vli_mmod_fast_192(u64 *result, const u64 *product,</div><div class='ctx'> 			      const u64 *curve_prime, u64 *tmp)</div><div class='ctx'> {</div><div class='del'>-	const unsigned int ndigits = 3;</div><div class='add'>+	const unsigned int ndigits = ECC_CURVE_NIST_P192_DIGITS;</div><div class='ctx'> 	int carry;</div><div class='ctx'> </div><div class='ctx'> 	vli_set(result, product, ndigits);</div><div class='hunk'>@@ -717,7 +719,7 @@ static void vli_mmod_fast_256(u64 *result, const u64 *product,</div><div class='ctx'> 			      const u64 *curve_prime, u64 *tmp)</div><div class='ctx'> {</div><div class='ctx'> 	int carry;</div><div class='del'>-	const unsigned int ndigits = 4;</div><div class='add'>+	const unsigned int ndigits = ECC_CURVE_NIST_P256_DIGITS;</div><div class='ctx'> </div><div class='ctx'> 	/* t */</div><div class='ctx'> 	vli_set(result, product, ndigits);</div><div class='hunk'>@@ -800,7 +802,7 @@ static void vli_mmod_fast_384(u64 *result, const u64 *product,</div><div class='ctx'> 				const u64 *curve_prime, u64 *tmp)</div><div class='ctx'> {</div><div class='ctx'> 	int carry;</div><div class='del'>-	const unsigned int ndigits = 6;</div><div class='add'>+	const unsigned int ndigits = ECC_CURVE_NIST_P384_DIGITS;</div><div class='ctx'> </div><div class='ctx'> 	/* t */</div><div class='ctx'> 	vli_set(result, product, ndigits);</div><div class='hunk'>@@ -902,6 +904,28 @@ static void vli_mmod_fast_384(u64 *result, const u64 *product,</div><div class='ctx'> #undef AND64H</div><div class='ctx'> #undef AND64L</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Computes result = product % curve_prime</div><div class='add'>+ * from "Recommendations for Discrete Logarithm-Based Cryptography:</div><div class='add'>+ *       Elliptic Curve Domain Parameters" section G.1.4</div><div class='add'>+ */</div><div class='add'>+static void vli_mmod_fast_521(u64 *result, const u64 *product,</div><div class='add'>+			      const u64 *curve_prime, u64 *tmp)</div><div class='add'>+{</div><div class='add'>+	const unsigned int ndigits = ECC_CURVE_NIST_P521_DIGITS;</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	/* Initialize result with lowest 521 bits from product */</div><div class='add'>+	vli_set(result, product, ndigits);</div><div class='add'>+	result[8] &amp;= 0x1ff;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ndigits; i++)</div><div class='add'>+		tmp[i] = (product[8 + i] &gt;&gt; 9) | (product[9 + i] &lt;&lt; 55);</div><div class='add'>+	tmp[8] &amp;= 0x1ff;</div><div class='add'>+</div><div class='add'>+	vli_mod_add(result, result, tmp, curve_prime, ndigits);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Computes result = product % curve_prime for different curve_primes.</div><div class='ctx'>  *</div><div class='ctx'>  * Note that curve_primes are distinguished just by heuristic check and</div><div class='hunk'>@@ -932,15 +956,18 @@ static bool vli_mmod_fast(u64 *result, u64 *product,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (ndigits) {</div><div class='del'>-	case 3:</div><div class='add'>+	case ECC_CURVE_NIST_P192_DIGITS:</div><div class='ctx'> 		vli_mmod_fast_192(result, product, curve_prime, tmp);</div><div class='ctx'> 		break;</div><div class='del'>-	case 4:</div><div class='add'>+	case ECC_CURVE_NIST_P256_DIGITS:</div><div class='ctx'> 		vli_mmod_fast_256(result, product, curve_prime, tmp);</div><div class='ctx'> 		break;</div><div class='del'>-	case 6:</div><div class='add'>+	case ECC_CURVE_NIST_P384_DIGITS:</div><div class='ctx'> 		vli_mmod_fast_384(result, product, curve_prime, tmp);</div><div class='ctx'> 		break;</div><div class='add'>+	case ECC_CURVE_NIST_P521_DIGITS:</div><div class='add'>+		vli_mmod_fast_521(result, product, curve_prime, tmp);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_err_ratelimited("ecc: unsupported digits size!\n");</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1295,7 +1322,10 @@ static void ecc_point_mult(struct ecc_point *result,</div><div class='ctx'> 	carry = vli_add(sk[0], scalar, curve-&gt;n, ndigits);</div><div class='ctx'> 	vli_add(sk[1], sk[0], curve-&gt;n, ndigits);</div><div class='ctx'> 	scalar = sk[!carry];</div><div class='del'>-	num_bits = sizeof(u64) * ndigits * 8 + 1;</div><div class='add'>+	if (curve-&gt;nbits == 521)	/* NIST P521 */</div><div class='add'>+		num_bits = curve-&gt;nbits + 2;</div><div class='add'>+	else</div><div class='add'>+		num_bits = sizeof(u64) * ndigits * 8 + 1;</div><div class='ctx'> </div><div class='ctx'> 	vli_set(rx[1], point-&gt;x, ndigits);</div><div class='ctx'> 	vli_set(ry[1], point-&gt;y, ndigits);</div><div class='hunk'>@@ -1416,6 +1446,12 @@ void ecc_point_mult_shamir(const struct ecc_point *result,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ecc_point_mult_shamir);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This function performs checks equivalent to Appendix A.4.2 of FIPS 186-5.</div><div class='add'>+ * Whereas A.4.2 results in an integer in the interval [1, n-1], this function</div><div class='add'>+ * ensures that the integer is in the range of [2, n-3]. We are slightly</div><div class='add'>+ * stricter because of the currently used scalar multiplication algorithm.</div><div class='add'>+ */</div><div class='ctx'> static int __ecc_is_key_valid(const struct ecc_curve *curve,</div><div class='ctx'> 			      const u64 *private_key, unsigned int ndigits)</div><div class='ctx'> {</div><div class='hunk'>@@ -1455,31 +1491,29 @@ int ecc_is_key_valid(unsigned int curve_id, unsigned int ndigits,</div><div class='ctx'> EXPORT_SYMBOL(ecc_is_key_valid);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * ECC private keys are generated using the method of extra random bits,</div><div class='del'>- * equivalent to that described in FIPS 186-4, Appendix B.4.1.</div><div class='del'>- *</div><div class='del'>- * d = (c mod(n–1)) + 1    where c is a string of random bits, 64 bits longer</div><div class='del'>- *                         than requested</div><div class='del'>- * 0 &lt;= c mod(n-1) &lt;= n-2  and implies that</div><div class='del'>- * 1 &lt;= d &lt;= n-1</div><div class='add'>+ * ECC private keys are generated using the method of rejection sampling,</div><div class='add'>+ * equivalent to that described in FIPS 186-5, Appendix A.2.2.</div><div class='ctx'>  *</div><div class='ctx'>  * This method generates a private key uniformly distributed in the range</div><div class='del'>- * [1, n-1].</div><div class='add'>+ * [2, n-3].</div><div class='ctx'>  */</div><div class='del'>-int ecc_gen_privkey(unsigned int curve_id, unsigned int ndigits, u64 *privkey)</div><div class='add'>+int ecc_gen_privkey(unsigned int curve_id, unsigned int ndigits,</div><div class='add'>+		    u64 *private_key)</div><div class='ctx'> {</div><div class='ctx'> 	const struct ecc_curve *curve = ecc_get_curve(curve_id);</div><div class='del'>-	u64 priv[ECC_MAX_DIGITS];</div><div class='ctx'> 	unsigned int nbytes = ndigits &lt;&lt; ECC_DIGITS_TO_BYTES_SHIFT;</div><div class='ctx'> 	unsigned int nbits = vli_num_bits(curve-&gt;n, ndigits);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Check that N is included in Table 1 of FIPS 186-4, section 6.1.1 */</div><div class='del'>-	if (nbits &lt; 160 || ndigits &gt; ARRAY_SIZE(priv))</div><div class='add'>+	/*</div><div class='add'>+	 * Step 1 &amp; 2: check that N is included in Table 1 of FIPS 186-5,</div><div class='add'>+	 * section 6.1.1.</div><div class='add'>+	 */</div><div class='add'>+	if (nbits &lt; 224)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * FIPS 186-4 recommends that the private key should be obtained from a</div><div class='add'>+	 * FIPS 186-5 recommends that the private key should be obtained from a</div><div class='ctx'> 	 * RBG with a security strength equal to or greater than the security</div><div class='ctx'> 	 * strength associated with N.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1492,17 +1526,17 @@ int ecc_gen_privkey(unsigned int curve_id, unsigned int ndigits, u64 *privkey)</div><div class='ctx'> 	if (crypto_get_default_rng())</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	err = crypto_rng_get_bytes(crypto_default_rng, (u8 *)priv, nbytes);</div><div class='add'>+	/* Step 3: obtain N returned_bits from the DRBG. */</div><div class='add'>+	err = crypto_rng_get_bytes(crypto_default_rng,</div><div class='add'>+				   (u8 *)private_key, nbytes);</div><div class='ctx'> 	crypto_put_default_rng();</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* Make sure the private key is in the valid range. */</div><div class='del'>-	if (__ecc_is_key_valid(curve, priv, ndigits))</div><div class='add'>+	/* Step 4: make sure the private key is in the valid range. */</div><div class='add'>+	if (__ecc_is_key_valid(curve, private_key, ndigits))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ecc_swap_digits(priv, privkey, ndigits);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ecc_gen_privkey);</div><div class='hunk'>@@ -1512,23 +1546,20 @@ int ecc_make_pub_key(unsigned int curve_id, unsigned int ndigits,</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct ecc_point *pk;</div><div class='del'>-	u64 priv[ECC_MAX_DIGITS];</div><div class='ctx'> 	const struct ecc_curve *curve = ecc_get_curve(curve_id);</div><div class='ctx'> </div><div class='del'>-	if (!private_key || !curve || ndigits &gt; ARRAY_SIZE(priv)) {</div><div class='add'>+	if (!private_key) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ecc_swap_digits(private_key, priv, ndigits);</div><div class='del'>-</div><div class='ctx'> 	pk = ecc_alloc_point(ndigits);</div><div class='ctx'> 	if (!pk) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ecc_point_mult(pk, &amp;curve-&gt;g, priv, NULL, curve, ndigits);</div><div class='add'>+	ecc_point_mult(pk, &amp;curve-&gt;g, private_key, NULL, curve, ndigits);</div><div class='ctx'> </div><div class='ctx'> 	/* SP800-56A rev 3 5.6.2.1.3 key check */</div><div class='ctx'> 	if (ecc_is_pubkey_valid_full(curve, pk)) {</div><div class='hunk'>@@ -1612,13 +1643,11 @@ int crypto_ecdh_shared_secret(unsigned int curve_id, unsigned int ndigits,</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct ecc_point *product, *pk;</div><div class='del'>-	u64 priv[ECC_MAX_DIGITS];</div><div class='ctx'> 	u64 rand_z[ECC_MAX_DIGITS];</div><div class='ctx'> 	unsigned int nbytes;</div><div class='ctx'> 	const struct ecc_curve *curve = ecc_get_curve(curve_id);</div><div class='ctx'> </div><div class='del'>-	if (!private_key || !public_key || !curve ||</div><div class='del'>-	    ndigits &gt; ARRAY_SIZE(priv) || ndigits &gt; ARRAY_SIZE(rand_z)) {</div><div class='add'>+	if (!private_key || !public_key || ndigits &gt; ARRAY_SIZE(rand_z)) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1639,15 +1668,13 @@ int crypto_ecdh_shared_secret(unsigned int curve_id, unsigned int ndigits,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_alloc_product;</div><div class='ctx'> </div><div class='del'>-	ecc_swap_digits(private_key, priv, ndigits);</div><div class='del'>-</div><div class='ctx'> 	product = ecc_alloc_point(ndigits);</div><div class='ctx'> 	if (!product) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto err_alloc_product;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ecc_point_mult(product, pk, priv, rand_z, curve, ndigits);</div><div class='add'>+	ecc_point_mult(product, pk, private_key, rand_z, curve, ndigits);</div><div class='ctx'> </div><div class='ctx'> 	if (ecc_point_is_zero(product)) {</div><div class='ctx'> 		ret = -EFAULT;</div><div class='hunk'>@@ -1657,7 +1684,6 @@ int crypto_ecdh_shared_secret(unsigned int curve_id, unsigned int ndigits,</div><div class='ctx'> 	ecc_swap_digits(product-&gt;x, secret, ndigits);</div><div class='ctx'> </div><div class='ctx'> err_validity:</div><div class='del'>-	memzero_explicit(priv, sizeof(priv));</div><div class='ctx'> 	memzero_explicit(rand_z, sizeof(rand_z));</div><div class='ctx'> 	ecc_free_point(product);</div><div class='ctx'> err_alloc_product:</div><div class='head'>diff --git a/crypto/ecc_curve_defs.h b/crypto/ecc_curve_defs.h<br/>index 9719934c9428..0ecade7d02f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecc_curve_defs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecc_curve_defs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecc_curve_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ecc_curve_defs.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@ static u64 nist_p192_b[] = { 0xFEB8DEECC146B9B1ull, 0x0FA7E9AB72243049ull,</div><div class='ctx'> 				0x64210519E59C80E7ull };</div><div class='ctx'> static struct ecc_curve nist_p192 = {</div><div class='ctx'> 	.name = "nist_192",</div><div class='add'>+	.nbits = 192,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = nist_p192_g_x,</div><div class='ctx'> 		.y = nist_p192_g_y,</div><div class='hunk'>@@ -43,6 +44,7 @@ static u64 nist_p256_b[] = { 0x3BCE3C3E27D2604Bull, 0x651D06B0CC53B0F6ull,</div><div class='ctx'> 				0xB3EBBD55769886BCull, 0x5AC635D8AA3A93E7ull };</div><div class='ctx'> static struct ecc_curve nist_p256 = {</div><div class='ctx'> 	.name = "nist_256",</div><div class='add'>+	.nbits = 256,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = nist_p256_g_x,</div><div class='ctx'> 		.y = nist_p256_g_y,</div><div class='hunk'>@@ -75,6 +77,7 @@ static u64 nist_p384_b[] = { 0x2a85c8edd3ec2aefull, 0xc656398d8a2ed19dull,</div><div class='ctx'> 				0x988e056be3f82d19ull, 0xb3312fa7e23ee7e4ull };</div><div class='ctx'> static struct ecc_curve nist_p384 = {</div><div class='ctx'> 	.name = "nist_384",</div><div class='add'>+	.nbits = 384,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = nist_p384_g_x,</div><div class='ctx'> 		.y = nist_p384_g_y,</div><div class='hunk'>@@ -86,6 +89,51 @@ static struct ecc_curve nist_p384 = {</div><div class='ctx'> 	.b = nist_p384_b</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* NIST P-521 */</div><div class='add'>+static u64 nist_p521_g_x[] = { 0xf97e7e31c2e5bd66ull, 0x3348b3c1856a429bull,</div><div class='add'>+				0xfe1dc127a2ffa8deull, 0xa14b5e77efe75928ull,</div><div class='add'>+				0xf828af606b4d3dbaull, 0x9c648139053fb521ull,</div><div class='add'>+				0x9e3ecb662395b442ull, 0x858e06b70404e9cdull,</div><div class='add'>+				0xc6ull };</div><div class='add'>+static u64 nist_p521_g_y[] = { 0x88be94769fd16650ull, 0x353c7086a272c240ull,</div><div class='add'>+				0xc550b9013fad0761ull, 0x97ee72995ef42640ull,</div><div class='add'>+				0x17afbd17273e662cull, 0x98f54449579b4468ull,</div><div class='add'>+				0x5c8a5fb42c7d1bd9ull, 0x39296a789a3bc004ull,</div><div class='add'>+				0x118ull };</div><div class='add'>+static u64 nist_p521_p[] = { 0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0x1ffull };</div><div class='add'>+static u64 nist_p521_n[] = { 0xbb6fb71e91386409ull, 0x3bb5c9b8899c47aeull,</div><div class='add'>+				0x7fcc0148f709a5d0ull, 0x51868783bf2f966bull,</div><div class='add'>+				0xfffffffffffffffaull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0x1ffull };</div><div class='add'>+static u64 nist_p521_a[] = { 0xfffffffffffffffcull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0xffffffffffffffffull, 0xffffffffffffffffull,</div><div class='add'>+				0x1ffull };</div><div class='add'>+static u64 nist_p521_b[] = { 0xef451fd46b503f00ull, 0x3573df883d2c34f1ull,</div><div class='add'>+				0x1652c0bd3bb1bf07ull, 0x56193951ec7e937bull,</div><div class='add'>+				0xb8b489918ef109e1ull, 0xa2da725b99b315f3ull,</div><div class='add'>+				0x929a21a0b68540eeull, 0x953eb9618e1c9a1full,</div><div class='add'>+				0x051ull };</div><div class='add'>+static struct ecc_curve nist_p521 = {</div><div class='add'>+	.name = "nist_521",</div><div class='add'>+	.nbits = 521,</div><div class='add'>+	.g = {</div><div class='add'>+		.x = nist_p521_g_x,</div><div class='add'>+		.y = nist_p521_g_y,</div><div class='add'>+		.ndigits = 9,</div><div class='add'>+	},</div><div class='add'>+	.p = nist_p521_p,</div><div class='add'>+	.n = nist_p521_n,</div><div class='add'>+	.a = nist_p521_a,</div><div class='add'>+	.b = nist_p521_b</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* curve25519 */</div><div class='ctx'> static u64 curve25519_g_x[] = { 0x0000000000000009, 0x0000000000000000,</div><div class='ctx'> 				0x0000000000000000, 0x0000000000000000 };</div><div class='hunk'>@@ -95,6 +143,7 @@ static u64 curve25519_a[] = { 0x000000000001DB41, 0x0000000000000000,</div><div class='ctx'> 				0x0000000000000000, 0x0000000000000000 };</div><div class='ctx'> static const struct ecc_curve ecc_25519 = {</div><div class='ctx'> 	.name = "curve25519",</div><div class='add'>+	.nbits = 255,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = curve25519_g_x,</div><div class='ctx'> 		.ndigits = 4,</div><div class='head'>diff --git a/crypto/ecdh.c b/crypto/ecdh.c<br/>index 80afee3234fb..72cfd1590156 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecdh.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecdh.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecdh.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ecdh.c</a></div><div class='hunk'>@@ -28,23 +28,28 @@ static int ecdh_set_secret(struct crypto_kpp *tfm, const void *buf,</div><div class='ctx'> {</div><div class='ctx'> 	struct ecdh_ctx *ctx = ecdh_get_ctx(tfm);</div><div class='ctx'> 	struct ecdh params;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_ecdh_decode_key(buf, len, &amp;params) &lt; 0 ||</div><div class='ctx'> 	    params.key_size &gt; sizeof(u64) * ctx-&gt;ndigits)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	memset(ctx-&gt;private_key, 0, sizeof(ctx-&gt;private_key));</div><div class='add'>+</div><div class='ctx'> 	if (!params.key || !params.key_size)</div><div class='ctx'> 		return ecc_gen_privkey(ctx-&gt;curve_id, ctx-&gt;ndigits,</div><div class='ctx'> 				       ctx-&gt;private_key);</div><div class='ctx'> </div><div class='del'>-	memcpy(ctx-&gt;private_key, params.key, params.key_size);</div><div class='add'>+	ecc_digits_from_bytes(params.key, params.key_size,</div><div class='add'>+			      ctx-&gt;private_key, ctx-&gt;ndigits);</div><div class='ctx'> </div><div class='ctx'> 	if (ecc_is_key_valid(ctx-&gt;curve_id, ctx-&gt;ndigits,</div><div class='ctx'> 			     ctx-&gt;private_key, params.key_size) &lt; 0) {</div><div class='ctx'> 		memzero_explicit(ctx-&gt;private_key, params.key_size);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ecdh_compute_value(struct kpp_request *req)</div><div class='head'>diff --git a/crypto/ecdsa.c b/crypto/ecdsa.c<br/>index fbd76498aba8..258fffbf623d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecdsa.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecdsa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecdsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ecdsa.c</a></div><div class='hunk'>@@ -35,8 +35,8 @@ struct ecdsa_signature_ctx {</div><div class='ctx'> static int ecdsa_get_signature_rs(u64 *dest, size_t hdrlen, unsigned char tag,</div><div class='ctx'> 				  const void *value, size_t vlen, unsigned int ndigits)</div><div class='ctx'> {</div><div class='del'>-	size_t keylen = ndigits * sizeof(u64);</div><div class='del'>-	ssize_t diff = vlen - keylen;</div><div class='add'>+	size_t bufsize = ndigits * sizeof(u64);</div><div class='add'>+	ssize_t diff = vlen - bufsize;</div><div class='ctx'> 	const char *d = value;</div><div class='ctx'> 	u8 rs[ECC_MAX_BYTES];</div><div class='ctx'> </div><div class='hunk'>@@ -58,7 +58,7 @@ static int ecdsa_get_signature_rs(u64 *dest, size_t hdrlen, unsigned char tag,</div><div class='ctx'> 		if (diff)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	if (-diff &gt;= keylen)</div><div class='add'>+	if (-diff &gt;= bufsize)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (diff) {</div><div class='hunk'>@@ -122,7 +122,7 @@ static int _ecdsa_verify(struct ecc_ctx *ctx, const u64 *hash, const u64 *r, con</div><div class='ctx'> </div><div class='ctx'> 	/* res.x = res.x mod n (if res.x &gt; order) */</div><div class='ctx'> 	if (unlikely(vli_cmp(res.x, curve-&gt;n, ndigits) == 1))</div><div class='del'>-		/* faster alternative for NIST p384, p256 &amp; p192 */</div><div class='add'>+		/* faster alternative for NIST p521, p384, p256 &amp; p192 */</div><div class='ctx'> 		vli_sub(res.x, res.x, curve-&gt;n, ndigits);</div><div class='ctx'> </div><div class='ctx'> 	if (!vli_cmp(res.x, r, ndigits))</div><div class='hunk'>@@ -138,7 +138,7 @@ static int ecdsa_verify(struct akcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);</div><div class='ctx'> 	struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm);</div><div class='del'>-	size_t keylen = ctx-&gt;curve-&gt;g.ndigits * sizeof(u64);</div><div class='add'>+	size_t bufsize = ctx-&gt;curve-&gt;g.ndigits * sizeof(u64);</div><div class='ctx'> 	struct ecdsa_signature_ctx sig_ctx = {</div><div class='ctx'> 		.curve = ctx-&gt;curve,</div><div class='ctx'> 	};</div><div class='hunk'>@@ -165,14 +165,14 @@ static int ecdsa_verify(struct akcipher_request *req)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	/* if the hash is shorter then we will add leading zeros to fit to ndigits */</div><div class='del'>-	diff = keylen - req-&gt;dst_len;</div><div class='add'>+	diff = bufsize - req-&gt;dst_len;</div><div class='ctx'> 	if (diff &gt;= 0) {</div><div class='ctx'> 		if (diff)</div><div class='ctx'> 			memset(rawhash, 0, diff);</div><div class='ctx'> 		memcpy(&amp;rawhash[diff], buffer + req-&gt;src_len, req-&gt;dst_len);</div><div class='ctx'> 	} else if (diff &lt; 0) {</div><div class='ctx'> 		/* given hash is longer, we take the left-most bytes */</div><div class='del'>-		memcpy(&amp;rawhash, buffer + req-&gt;src_len, keylen);</div><div class='add'>+		memcpy(&amp;rawhash, buffer + req-&gt;src_len, bufsize);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ecc_swap_digits((u64 *)rawhash, hash, ctx-&gt;curve-&gt;g.ndigits);</div><div class='hunk'>@@ -222,28 +222,32 @@ static int ecdsa_ecc_ctx_reset(struct ecc_ctx *ctx)</div><div class='ctx'> static int ecdsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm);</div><div class='add'>+	unsigned int digitlen, ndigits;</div><div class='ctx'> 	const unsigned char *d = key;</div><div class='del'>-	const u64 *digits = (const u64 *)&amp;d[1];</div><div class='del'>-	unsigned int ndigits;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = ecdsa_ecc_ctx_reset(ctx);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (keylen &lt; 1 || (((keylen - 1) &gt;&gt; 1) % sizeof(u64)) != 0)</div><div class='add'>+	if (keylen &lt; 1 || ((keylen - 1) &amp; 1) != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	/* we only accept uncompressed format indicated by '4' */</div><div class='ctx'> 	if (d[0] != 4)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	keylen--;</div><div class='del'>-	ndigits = (keylen &gt;&gt; 1) / sizeof(u64);</div><div class='add'>+	digitlen = keylen &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+	ndigits = DIV_ROUND_UP(digitlen, sizeof(u64));</div><div class='ctx'> 	if (ndigits != ctx-&gt;curve-&gt;g.ndigits)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ecc_swap_digits(digits, ctx-&gt;pub_key.x, ndigits);</div><div class='del'>-	ecc_swap_digits(&amp;digits[ndigits], ctx-&gt;pub_key.y, ndigits);</div><div class='add'>+	d++;</div><div class='add'>+</div><div class='add'>+	ecc_digits_from_bytes(d, digitlen, ctx-&gt;pub_key.x, ndigits);</div><div class='add'>+	ecc_digits_from_bytes(&amp;d[digitlen], digitlen, ctx-&gt;pub_key.y, ndigits);</div><div class='add'>+</div><div class='ctx'> 	ret = ecc_is_pubkey_valid_full(ctx-&gt;curve, &amp;ctx-&gt;pub_key);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;pub_key_set = ret == 0;</div><div class='hunk'>@@ -262,9 +266,31 @@ static unsigned int ecdsa_max_size(struct crypto_akcipher *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;pub_key.ndigits &lt;&lt; ECC_DIGITS_TO_BYTES_SHIFT;</div><div class='add'>+	return DIV_ROUND_UP(ctx-&gt;curve-&gt;nbits, 8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ecdsa_nist_p521_init_tfm(struct crypto_akcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return ecdsa_ecc_ctx_init(ctx, ECC_CURVE_NIST_P521);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct akcipher_alg ecdsa_nist_p521 = {</div><div class='add'>+	.verify = ecdsa_verify,</div><div class='add'>+	.set_pub_key = ecdsa_set_pub_key,</div><div class='add'>+	.max_size = ecdsa_max_size,</div><div class='add'>+	.init = ecdsa_nist_p521_init_tfm,</div><div class='add'>+	.exit = ecdsa_exit_tfm,</div><div class='add'>+	.base = {</div><div class='add'>+		.cra_name = "ecdsa-nist-p521",</div><div class='add'>+		.cra_driver_name = "ecdsa-nist-p521-generic",</div><div class='add'>+		.cra_priority = 100,</div><div class='add'>+		.cra_module = THIS_MODULE,</div><div class='add'>+		.cra_ctxsize = sizeof(struct ecc_ctx),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int ecdsa_nist_p384_init_tfm(struct crypto_akcipher *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm);</div><div class='hunk'>@@ -348,8 +374,15 @@ static int __init ecdsa_init(void)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto nist_p384_error;</div><div class='ctx'> </div><div class='add'>+	ret = crypto_register_akcipher(&amp;ecdsa_nist_p521);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto nist_p521_error;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+nist_p521_error:</div><div class='add'>+	crypto_unregister_akcipher(&amp;ecdsa_nist_p384);</div><div class='add'>+</div><div class='ctx'> nist_p384_error:</div><div class='ctx'> 	crypto_unregister_akcipher(&amp;ecdsa_nist_p256);</div><div class='ctx'> </div><div class='hunk'>@@ -365,6 +398,7 @@ static void __exit ecdsa_exit(void)</div><div class='ctx'> 		crypto_unregister_akcipher(&amp;ecdsa_nist_p192);</div><div class='ctx'> 	crypto_unregister_akcipher(&amp;ecdsa_nist_p256);</div><div class='ctx'> 	crypto_unregister_akcipher(&amp;ecdsa_nist_p384);</div><div class='add'>+	crypto_unregister_akcipher(&amp;ecdsa_nist_p521);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> subsys_initcall(ecdsa_init);</div><div class='hunk'>@@ -373,4 +407,8 @@ module_exit(ecdsa_exit);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Stefan Berger &lt;stefanb@linux.ibm.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("ECDSA generic algorithm");</div><div class='add'>+MODULE_ALIAS_CRYPTO("ecdsa-nist-p192");</div><div class='add'>+MODULE_ALIAS_CRYPTO("ecdsa-nist-p256");</div><div class='add'>+MODULE_ALIAS_CRYPTO("ecdsa-nist-p384");</div><div class='add'>+MODULE_ALIAS_CRYPTO("ecdsa-nist-p521");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("ecdsa-generic");</div><div class='head'>diff --git a/crypto/ecrdsa.c b/crypto/ecrdsa.c<br/>index f3c6b5e15e75..3811f3805b5d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecrdsa.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecrdsa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecrdsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ecrdsa.c</a></div><div class='hunk'>@@ -294,4 +294,5 @@ module_exit(ecrdsa_mod_fini);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Vitaly Chikunov &lt;vt@altlinux.org&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("EC-RDSA generic algorithm");</div><div class='add'>+MODULE_ALIAS_CRYPTO("ecrdsa");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("ecrdsa-generic");</div><div class='head'>diff --git a/crypto/ecrdsa_defs.h b/crypto/ecrdsa_defs.h<br/>index 0056335b9d03..1c2c2449e331 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecrdsa_defs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/ecrdsa_defs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecrdsa_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/ecrdsa_defs.h</a></div><div class='hunk'>@@ -47,6 +47,7 @@ static u64 cp256a_b[] = {</div><div class='ctx'> </div><div class='ctx'> static struct ecc_curve gost_cp256a = {</div><div class='ctx'> 	.name = "cp256a",</div><div class='add'>+	.nbits = 256,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = cp256a_g_x,</div><div class='ctx'> 		.y = cp256a_g_y,</div><div class='hunk'>@@ -80,6 +81,7 @@ static u64 cp256b_b[] = {</div><div class='ctx'> </div><div class='ctx'> static struct ecc_curve gost_cp256b = {</div><div class='ctx'> 	.name = "cp256b",</div><div class='add'>+	.nbits = 256,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = cp256b_g_x,</div><div class='ctx'> 		.y = cp256b_g_y,</div><div class='hunk'>@@ -117,6 +119,7 @@ static u64 cp256c_b[] = {</div><div class='ctx'> </div><div class='ctx'> static struct ecc_curve gost_cp256c = {</div><div class='ctx'> 	.name = "cp256c",</div><div class='add'>+	.nbits = 256,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = cp256c_g_x,</div><div class='ctx'> 		.y = cp256c_g_y,</div><div class='hunk'>@@ -166,6 +169,7 @@ static u64 tc512a_b[] = {</div><div class='ctx'> </div><div class='ctx'> static struct ecc_curve gost_tc512a = {</div><div class='ctx'> 	.name = "tc512a",</div><div class='add'>+	.nbits = 512,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = tc512a_g_x,</div><div class='ctx'> 		.y = tc512a_g_y,</div><div class='hunk'>@@ -211,6 +215,7 @@ static u64 tc512b_b[] = {</div><div class='ctx'> </div><div class='ctx'> static struct ecc_curve gost_tc512b = {</div><div class='ctx'> 	.name = "tc512b",</div><div class='add'>+	.nbits = 512,</div><div class='ctx'> 	.g = {</div><div class='ctx'> 		.x = tc512b_g_x,</div><div class='ctx'> 		.y = tc512b_g_y,</div><div class='head'>diff --git a/crypto/fips.c b/crypto/fips.c<br/>index 92fd506abb21..8a784018ebfc 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/fips.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/fips.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/fips.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/fips.c</a></div><div class='hunk'>@@ -63,7 +63,6 @@ static struct ctl_table crypto_sysctl_table[] = {</div><div class='ctx'> 		.mode		= 0444,</div><div class='ctx'> 		.proc_handler	= proc_dostring</div><div class='ctx'> 	},</div><div class='del'>-	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ctl_table_header *crypto_sysctls;</div><div class='head'>diff --git a/crypto/hash.h b/crypto/hash.h<br/>index 93f6ba0df263..cf9aee07f77d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/hash.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/hash.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/hash.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/hash.h</a></div><div class='hunk'>@@ -8,39 +8,9 @@</div><div class='ctx'> #define _LOCAL_CRYPTO_HASH_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/cryptouser.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_hash *hash_get_stat(</div><div class='del'>-	struct hash_alg_common *alg)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	return &amp;alg-&gt;stat;</div><div class='del'>-#else</div><div class='del'>-	return NULL;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int crypto_hash_report_stat(struct sk_buff *skb,</div><div class='del'>-					  struct crypto_alg *alg,</div><div class='del'>-					  const char *type)</div><div class='del'>-{</div><div class='del'>-	struct hash_alg_common *halg = __crypto_hash_alg_common(alg);</div><div class='del'>-	struct crypto_istat_hash *istat = hash_get_stat(halg);</div><div class='del'>-	struct crypto_stat_hash rhash;</div><div class='del'>-</div><div class='del'>-	memset(&amp;rhash, 0, sizeof(rhash));</div><div class='del'>-</div><div class='del'>-	strscpy(rhash.type, type, sizeof(rhash.type));</div><div class='del'>-</div><div class='del'>-	rhash.stat_hash_cnt = atomic64_read(&amp;istat-&gt;hash_cnt);</div><div class='del'>-	rhash.stat_hash_tlen = atomic64_read(&amp;istat-&gt;hash_tlen);</div><div class='del'>-	rhash.stat_err_cnt = atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_HASH, sizeof(rhash), &amp;rhash);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern const struct crypto_type crypto_shash_type;</div><div class='ctx'> </div><div class='ctx'> int hash_prepare_alg(struct hash_alg_common *alg);</div><div class='head'>diff --git a/crypto/jitterentropy-kcapi.c b/crypto/jitterentropy-kcapi.c<br/>index 76edbf8af0ac..c24d4ff2b4a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/jitterentropy-kcapi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/jitterentropy-kcapi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/jitterentropy-kcapi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/jitterentropy-kcapi.c</a></div><div class='hunk'>@@ -61,8 +61,7 @@ void *jent_kvzalloc(unsigned int len)</div><div class='ctx'> </div><div class='ctx'> void jent_kvzfree(void *ptr, unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	memzero_explicit(ptr, len);</div><div class='del'>-	kvfree(ptr);</div><div class='add'>+	kvfree_sensitive(ptr, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void *jent_zalloc(unsigned int len)</div><div class='head'>diff --git a/crypto/jitterentropy.c b/crypto/jitterentropy.c<br/>index 26a9048bc893..d7056de8c0d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/jitterentropy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/jitterentropy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/jitterentropy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/jitterentropy.c</a></div><div class='hunk'>@@ -157,8 +157,8 @@ struct rand_data {</div><div class='ctx'> /*</div><div class='ctx'>  * See the SP 800-90B comment #10b for the corrected cutoff for the SP 800-90B</div><div class='ctx'>  * APT.</div><div class='del'>- * http://www.untruth.org/~josh/sp80090b/UL%20SP800-90B-final%20comments%20v1.9%2020191212.pdf</div><div class='del'>- * In in the syntax of R, this is C = 2 + qbinom(1 − 2^(−30), 511, 2^(-1/osr)).</div><div class='add'>+ * https://www.untruth.org/~josh/sp80090b/UL%20SP800-90B-final%20comments%20v1.9%2020191212.pdf</div><div class='add'>+ * In the syntax of R, this is C = 2 + qbinom(1 − 2^(−30), 511, 2^(-1/osr)).</div><div class='ctx'>  * (The original formula wasn't correct because the first symbol must</div><div class='ctx'>  * necessarily have been observed, so there is no chance of observing 0 of these</div><div class='ctx'>  * symbols.)</div><div class='head'>diff --git a/crypto/kpp.c b/crypto/kpp.c<br/>index 33d44e59387f..ecc63a1a948d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/kpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/kpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/kpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/kpp.c</a></div><div class='hunk'>@@ -66,29 +66,6 @@ static void crypto_kpp_free_instance(struct crypto_instance *inst)</div><div class='ctx'> 	kpp-&gt;free(kpp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_kpp_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct kpp_alg *kpp = __crypto_kpp_alg(alg);</div><div class='del'>-	struct crypto_istat_kpp *istat;</div><div class='del'>-	struct crypto_stat_kpp rkpp;</div><div class='del'>-</div><div class='del'>-	istat = kpp_get_stat(kpp);</div><div class='del'>-</div><div class='del'>-	memset(&amp;rkpp, 0, sizeof(rkpp));</div><div class='del'>-</div><div class='del'>-	strscpy(rkpp.type, "kpp", sizeof(rkpp.type));</div><div class='del'>-</div><div class='del'>-	rkpp.stat_setsecret_cnt = atomic64_read(&amp;istat-&gt;setsecret_cnt);</div><div class='del'>-	rkpp.stat_generate_public_key_cnt =</div><div class='del'>-		atomic64_read(&amp;istat-&gt;generate_public_key_cnt);</div><div class='del'>-	rkpp.stat_compute_shared_secret_cnt =</div><div class='del'>-		atomic64_read(&amp;istat-&gt;compute_shared_secret_cnt);</div><div class='del'>-	rkpp.stat_err_cnt = atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_KPP, sizeof(rkpp), &amp;rkpp);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_kpp_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_kpp_init_tfm,</div><div class='hunk'>@@ -99,9 +76,6 @@ static const struct crypto_type crypto_kpp_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_kpp_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_kpp_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_KPP,</div><div class='hunk'>@@ -131,15 +105,11 @@ EXPORT_SYMBOL_GPL(crypto_has_kpp);</div><div class='ctx'> </div><div class='ctx'> static void kpp_prepare_alg(struct kpp_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_kpp *istat = kpp_get_stat(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_type = &amp;crypto_kpp_type;</div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='ctx'> 	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_KPP;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_register_kpp(struct kpp_alg *alg)</div><div class='head'>diff --git a/crypto/lskcipher.c b/crypto/lskcipher.c<br/>index 0f1bd7dcde24..cdb4897c63e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lskcipher.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/lskcipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lskcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/lskcipher.c</a></div><div class='hunk'>@@ -29,25 +29,6 @@ static inline struct lskcipher_alg *__crypto_lskcipher_alg(</div><div class='ctx'> 	return container_of(alg, struct lskcipher_alg, co.base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_cipher *lskcipher_get_stat(</div><div class='del'>-	struct lskcipher_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return skcipher_get_stat_common(&amp;alg-&gt;co);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int crypto_lskcipher_errstat(struct lskcipher_alg *alg, int err)</div><div class='del'>-{</div><div class='del'>-	struct crypto_istat_cipher *istat = lskcipher_get_stat(alg);</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int lskcipher_setkey_unaligned(struct crypto_lskcipher *tfm,</div><div class='ctx'> 				      const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -147,20 +128,13 @@ static int crypto_lskcipher_crypt(struct crypto_lskcipher *tfm, const u8 *src,</div><div class='ctx'> 					       u32 flags))</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long alignmask = crypto_lskcipher_alignmask(tfm);</div><div class='del'>-	struct lskcipher_alg *alg = crypto_lskcipher_alg(tfm);</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (((unsigned long)src | (unsigned long)dst | (unsigned long)iv) &amp;</div><div class='del'>-	    alignmask) {</div><div class='del'>-		ret = crypto_lskcipher_crypt_unaligned(tfm, src, dst, len, iv,</div><div class='del'>-						       crypt);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	    alignmask)</div><div class='add'>+		return crypto_lskcipher_crypt_unaligned(tfm, src, dst, len, iv,</div><div class='add'>+							crypt);</div><div class='ctx'> </div><div class='del'>-	ret = crypt(tfm, src, dst, len, iv, CRYPTO_LSKCIPHER_FLAG_FINAL);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return crypto_lskcipher_errstat(alg, ret);</div><div class='add'>+	return crypt(tfm, src, dst, len, iv, CRYPTO_LSKCIPHER_FLAG_FINAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_lskcipher_encrypt(struct crypto_lskcipher *tfm, const u8 *src,</div><div class='hunk'>@@ -168,13 +142,6 @@ int crypto_lskcipher_encrypt(struct crypto_lskcipher *tfm, const u8 *src,</div><div class='ctx'> {</div><div class='ctx'> 	struct lskcipher_alg *alg = crypto_lskcipher_alg(tfm);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_cipher *istat = lskcipher_get_stat(alg);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-		atomic64_add(len, &amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return crypto_lskcipher_crypt(tfm, src, dst, len, iv, alg-&gt;encrypt);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_lskcipher_encrypt);</div><div class='hunk'>@@ -184,13 +151,6 @@ int crypto_lskcipher_decrypt(struct crypto_lskcipher *tfm, const u8 *src,</div><div class='ctx'> {</div><div class='ctx'> 	struct lskcipher_alg *alg = crypto_lskcipher_alg(tfm);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_cipher *istat = lskcipher_get_stat(alg);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;decrypt_cnt);</div><div class='del'>-		atomic64_add(len, &amp;istat-&gt;decrypt_tlen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return crypto_lskcipher_crypt(tfm, src, dst, len, iv, alg-&gt;decrypt);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_lskcipher_decrypt);</div><div class='hunk'>@@ -320,28 +280,6 @@ static int __maybe_unused crypto_lskcipher_report(</div><div class='ctx'> 		       sizeof(rblkcipher), &amp;rblkcipher);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_lskcipher_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct lskcipher_alg *skcipher = __crypto_lskcipher_alg(alg);</div><div class='del'>-	struct crypto_istat_cipher *istat;</div><div class='del'>-	struct crypto_stat_cipher rcipher;</div><div class='del'>-</div><div class='del'>-	istat = lskcipher_get_stat(skcipher);</div><div class='del'>-</div><div class='del'>-	memset(&amp;rcipher, 0, sizeof(rcipher));</div><div class='del'>-</div><div class='del'>-	strscpy(rcipher.type, "cipher", sizeof(rcipher.type));</div><div class='del'>-</div><div class='del'>-	rcipher.stat_encrypt_cnt = atomic64_read(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-	rcipher.stat_encrypt_tlen = atomic64_read(&amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	rcipher.stat_decrypt_cnt =  atomic64_read(&amp;istat-&gt;decrypt_cnt);</div><div class='del'>-	rcipher.stat_decrypt_tlen = atomic64_read(&amp;istat-&gt;decrypt_tlen);</div><div class='del'>-	rcipher.stat_err_cnt =  atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_CIPHER, sizeof(rcipher), &amp;rcipher);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_lskcipher_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_lskcipher_init_tfm,</div><div class='hunk'>@@ -352,9 +290,6 @@ static const struct crypto_type crypto_lskcipher_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_lskcipher_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_lskcipher_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_LSKCIPHER,</div><div class='head'>diff --git a/crypto/rng.c b/crypto/rng.c<br/>index 279dffdebf59..9d8804e46422 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/rng.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/rng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/rng.c</a></div><div class='hunk'>@@ -30,30 +30,24 @@ static int crypto_default_rng_refcnt;</div><div class='ctx'> </div><div class='ctx'> int crypto_rng_reset(struct crypto_rng *tfm, const u8 *seed, unsigned int slen)</div><div class='ctx'> {</div><div class='del'>-	struct rng_alg *alg = crypto_rng_alg(tfm);</div><div class='ctx'> 	u8 *buf = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		atomic64_inc(&amp;rng_get_stat(alg)-&gt;seed_cnt);</div><div class='del'>-</div><div class='ctx'> 	if (!seed &amp;&amp; slen) {</div><div class='ctx'> 		buf = kmalloc(slen, GFP_KERNEL);</div><div class='del'>-		err = -ENOMEM;</div><div class='ctx'> 		if (!buf)</div><div class='del'>-			goto out;</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 		err = get_random_bytes_wait(buf, slen);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto free_buf;</div><div class='add'>+			goto out;</div><div class='ctx'> 		seed = buf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = alg-&gt;seed(tfm, seed, slen);</div><div class='del'>-free_buf:</div><div class='del'>-	kfree_sensitive(buf);</div><div class='add'>+	err = crypto_rng_alg(tfm)-&gt;seed(tfm, seed, slen);</div><div class='ctx'> out:</div><div class='del'>-	return crypto_rng_errstat(alg, err);</div><div class='add'>+	kfree_sensitive(buf);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_rng_reset);</div><div class='ctx'> </div><div class='hunk'>@@ -91,27 +85,6 @@ static void crypto_rng_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> 	seq_printf(m, "seedsize     : %u\n", seedsize(alg));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_rng_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct rng_alg *rng = __crypto_rng_alg(alg);</div><div class='del'>-	struct crypto_istat_rng *istat;</div><div class='del'>-	struct crypto_stat_rng rrng;</div><div class='del'>-</div><div class='del'>-	istat = rng_get_stat(rng);</div><div class='del'>-</div><div class='del'>-	memset(&amp;rrng, 0, sizeof(rrng));</div><div class='del'>-</div><div class='del'>-	strscpy(rrng.type, "rng", sizeof(rrng.type));</div><div class='del'>-</div><div class='del'>-	rrng.stat_generate_cnt = atomic64_read(&amp;istat-&gt;generate_cnt);</div><div class='del'>-	rrng.stat_generate_tlen = atomic64_read(&amp;istat-&gt;generate_tlen);</div><div class='del'>-	rrng.stat_seed_cnt = atomic64_read(&amp;istat-&gt;seed_cnt);</div><div class='del'>-	rrng.stat_err_cnt = atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_RNG, sizeof(rrng), &amp;rrng);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_rng_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_rng_init_tfm,</div><div class='hunk'>@@ -121,9 +94,6 @@ static const struct crypto_type crypto_rng_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_rng_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_rng_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_RNG,</div><div class='hunk'>@@ -199,7 +169,6 @@ EXPORT_SYMBOL_GPL(crypto_del_default_rng);</div><div class='ctx'> </div><div class='ctx'> int crypto_register_rng(struct rng_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_rng *istat = rng_get_stat(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	if (alg-&gt;seedsize &gt; PAGE_SIZE / 8)</div><div class='hunk'>@@ -209,9 +178,6 @@ int crypto_register_rng(struct rng_alg *alg)</div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='ctx'> 	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_RNG;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='del'>-</div><div class='ctx'> 	return crypto_register_alg(base);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_register_rng);</div><div class='head'>diff --git a/crypto/scompress.c b/crypto/scompress.c<br/>index 60bbb7ea4060..1cef6bb06a81 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/scompress.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/scompress.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/scompress.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/scompress.c</a></div><div class='hunk'>@@ -271,9 +271,6 @@ static const struct crypto_type crypto_scomp_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_scomp_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_acomp_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SCOMPRESS,</div><div class='head'>diff --git a/crypto/shash.c b/crypto/shash.c<br/>index c3f7f6a25280..301ab42bf849 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/shash.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/shash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/shash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/shash.c</a></div><div class='hunk'>@@ -16,18 +16,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "hash.h"</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_hash *shash_get_stat(struct shash_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return hash_get_stat(&amp;alg-&gt;halg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int crypto_shash_errstat(struct shash_alg *alg, int err)</div><div class='del'>-{</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS) &amp;&amp; err)</div><div class='del'>-		atomic64_inc(&amp;shash_get_stat(alg)-&gt;err_cnt);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int shash_no_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='ctx'> 		    unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -61,29 +49,13 @@ EXPORT_SYMBOL_GPL(crypto_shash_setkey);</div><div class='ctx'> int crypto_shash_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(desc-&gt;tfm);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		atomic64_add(len, &amp;shash_get_stat(shash)-&gt;hash_tlen);</div><div class='del'>-</div><div class='del'>-	err = shash-&gt;update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_errstat(shash, err);</div><div class='add'>+	return crypto_shash_alg(desc-&gt;tfm)-&gt;update(desc, data, len);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_update);</div><div class='ctx'> </div><div class='ctx'> int crypto_shash_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(desc-&gt;tfm);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		atomic64_inc(&amp;shash_get_stat(shash)-&gt;hash_cnt);</div><div class='del'>-</div><div class='del'>-	err = shash-&gt;final(desc, out);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_errstat(shash, err);</div><div class='add'>+	return crypto_shash_alg(desc-&gt;tfm)-&gt;final(desc, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_final);</div><div class='ctx'> </div><div class='hunk'>@@ -99,20 +71,7 @@ static int shash_default_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> int crypto_shash_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		       unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(tfm);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_hash *istat = shash_get_stat(shash);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;hash_cnt);</div><div class='del'>-		atomic64_add(len, &amp;istat-&gt;hash_tlen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = shash-&gt;finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_errstat(shash, err);</div><div class='add'>+	return crypto_shash_alg(desc-&gt;tfm)-&gt;finup(desc, data, len, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_finup);</div><div class='ctx'> </div><div class='hunk'>@@ -129,22 +88,11 @@ int crypto_shash_digest(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(tfm);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_hash *istat = shash_get_stat(shash);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;hash_cnt);</div><div class='del'>-		atomic64_add(len, &amp;istat-&gt;hash_tlen);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_shash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='del'>-		err = -ENOKEY;</div><div class='del'>-	else</div><div class='del'>-		err = shash-&gt;digest(desc, data, len, out);</div><div class='add'>+		return -ENOKEY;</div><div class='ctx'> </div><div class='del'>-	return crypto_shash_errstat(shash, err);</div><div class='add'>+	return crypto_shash_alg(tfm)-&gt;digest(desc, data, len, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_digest);</div><div class='ctx'> </div><div class='hunk'>@@ -265,12 +213,6 @@ static void crypto_shash_show(struct seq_file *m, struct crypto_alg *alg)</div><div class='ctx'> 	seq_printf(m, "digestsize   : %u\n", salg-&gt;digestsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_shash_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return crypto_hash_report_stat(skb, alg, "shash");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> const struct crypto_type crypto_shash_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_shash_init_tfm,</div><div class='hunk'>@@ -281,9 +223,6 @@ const struct crypto_type crypto_shash_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_shash_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_shash_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SHASH,</div><div class='hunk'>@@ -350,7 +289,6 @@ EXPORT_SYMBOL_GPL(crypto_clone_shash);</div><div class='ctx'> </div><div class='ctx'> int hash_prepare_alg(struct hash_alg_common *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_hash *istat = hash_get_stat(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	if (alg-&gt;digestsize &gt; HASH_MAX_DIGESTSIZE)</div><div class='hunk'>@@ -362,9 +300,6 @@ int hash_prepare_alg(struct hash_alg_common *alg)</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/sig.c b/crypto/sig.c<br/>index 224c47019297..7645bedf3a1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sig.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/sig.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/sig.c</a></div><div class='hunk'>@@ -45,16 +45,6 @@ static int __maybe_unused crypto_sig_report(struct sk_buff *skb,</div><div class='ctx'> 	return nla_put(skb, CRYPTOCFGA_REPORT_AKCIPHER, sizeof(rsig), &amp;rsig);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_sig_report_stat(struct sk_buff *skb,</div><div class='del'>-						 struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct crypto_stat_akcipher rsig = {};</div><div class='del'>-</div><div class='del'>-	strscpy(rsig.type, "sig", sizeof(rsig.type));</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_AKCIPHER, sizeof(rsig), &amp;rsig);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_sig_type = {</div><div class='ctx'> 	.extsize = crypto_alg_extsize,</div><div class='ctx'> 	.init_tfm = crypto_sig_init_tfm,</div><div class='hunk'>@@ -64,9 +54,6 @@ static const struct crypto_type crypto_sig_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_sig_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_sig_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_SIG_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SIG,</div><div class='head'>diff --git a/crypto/skcipher.c b/crypto/skcipher.c<br/>index bc70e159d27d..ceed7f33a67b 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/skcipher.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/skcipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/skcipher.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/skcipher.c</a></div><div class='hunk'>@@ -89,25 +89,6 @@ static inline struct skcipher_alg *__crypto_skcipher_alg(</div><div class='ctx'> 	return container_of(alg, struct skcipher_alg, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_cipher *skcipher_get_stat(</div><div class='del'>-	struct skcipher_alg *alg)</div><div class='del'>-{</div><div class='del'>-	return skcipher_get_stat_common(&amp;alg-&gt;co);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int crypto_skcipher_errstat(struct skcipher_alg *alg, int err)</div><div class='del'>-{</div><div class='del'>-	struct crypto_istat_cipher *istat = skcipher_get_stat(alg);</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (err &amp;&amp; err != -EINPROGRESS &amp;&amp; err != -EBUSY)</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int skcipher_done_slow(struct skcipher_walk *walk, unsigned int bsize)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *addr;</div><div class='hunk'>@@ -654,23 +635,12 @@ int crypto_skcipher_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='ctx'> 	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_cipher *istat = skcipher_get_stat(alg);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-		atomic64_add(req-&gt;cryptlen, &amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_skcipher_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='del'>-		ret = -ENOKEY;</div><div class='del'>-	else if (alg-&gt;co.base.cra_type != &amp;crypto_skcipher_type)</div><div class='del'>-		ret = crypto_lskcipher_encrypt_sg(req);</div><div class='del'>-	else</div><div class='del'>-		ret = alg-&gt;encrypt(req);</div><div class='del'>-</div><div class='del'>-	return crypto_skcipher_errstat(alg, ret);</div><div class='add'>+		return -ENOKEY;</div><div class='add'>+	if (alg-&gt;co.base.cra_type != &amp;crypto_skcipher_type)</div><div class='add'>+		return crypto_lskcipher_encrypt_sg(req);</div><div class='add'>+	return alg-&gt;encrypt(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_skcipher_encrypt);</div><div class='ctx'> </div><div class='hunk'>@@ -678,23 +648,12 @@ int crypto_skcipher_decrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='ctx'> 	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS)) {</div><div class='del'>-		struct crypto_istat_cipher *istat = skcipher_get_stat(alg);</div><div class='del'>-</div><div class='del'>-		atomic64_inc(&amp;istat-&gt;decrypt_cnt);</div><div class='del'>-		atomic64_add(req-&gt;cryptlen, &amp;istat-&gt;decrypt_tlen);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_skcipher_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='del'>-		ret = -ENOKEY;</div><div class='del'>-	else if (alg-&gt;co.base.cra_type != &amp;crypto_skcipher_type)</div><div class='del'>-		ret = crypto_lskcipher_decrypt_sg(req);</div><div class='del'>-	else</div><div class='del'>-		ret = alg-&gt;decrypt(req);</div><div class='del'>-</div><div class='del'>-	return crypto_skcipher_errstat(alg, ret);</div><div class='add'>+		return -ENOKEY;</div><div class='add'>+	if (alg-&gt;co.base.cra_type != &amp;crypto_skcipher_type)</div><div class='add'>+		return crypto_lskcipher_decrypt_sg(req);</div><div class='add'>+	return alg-&gt;decrypt(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_skcipher_decrypt);</div><div class='ctx'> </div><div class='hunk'>@@ -846,28 +805,6 @@ static int __maybe_unused crypto_skcipher_report(</div><div class='ctx'> 		       sizeof(rblkcipher), &amp;rblkcipher);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused crypto_skcipher_report_stat(</div><div class='del'>-	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_alg *skcipher = __crypto_skcipher_alg(alg);</div><div class='del'>-	struct crypto_istat_cipher *istat;</div><div class='del'>-	struct crypto_stat_cipher rcipher;</div><div class='del'>-</div><div class='del'>-	istat = skcipher_get_stat(skcipher);</div><div class='del'>-</div><div class='del'>-	memset(&amp;rcipher, 0, sizeof(rcipher));</div><div class='del'>-</div><div class='del'>-	strscpy(rcipher.type, "cipher", sizeof(rcipher.type));</div><div class='del'>-</div><div class='del'>-	rcipher.stat_encrypt_cnt = atomic64_read(&amp;istat-&gt;encrypt_cnt);</div><div class='del'>-	rcipher.stat_encrypt_tlen = atomic64_read(&amp;istat-&gt;encrypt_tlen);</div><div class='del'>-	rcipher.stat_decrypt_cnt =  atomic64_read(&amp;istat-&gt;decrypt_cnt);</div><div class='del'>-	rcipher.stat_decrypt_tlen = atomic64_read(&amp;istat-&gt;decrypt_tlen);</div><div class='del'>-	rcipher.stat_err_cnt =  atomic64_read(&amp;istat-&gt;err_cnt);</div><div class='del'>-</div><div class='del'>-	return nla_put(skb, CRYPTOCFGA_STAT_CIPHER, sizeof(rcipher), &amp;rcipher);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_skcipher_type = {</div><div class='ctx'> 	.extsize = crypto_skcipher_extsize,</div><div class='ctx'> 	.init_tfm = crypto_skcipher_init_tfm,</div><div class='hunk'>@@ -878,9 +815,6 @@ static const struct crypto_type crypto_skcipher_type = {</div><div class='ctx'> #if IS_ENABLED(CONFIG_CRYPTO_USER)</div><div class='ctx'> 	.report = crypto_skcipher_report,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	.report_stat = crypto_skcipher_report_stat,</div><div class='del'>-#endif</div><div class='ctx'> 	.maskclear = ~CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_SKCIPHER_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SKCIPHER,</div><div class='hunk'>@@ -935,7 +869,6 @@ EXPORT_SYMBOL_GPL(crypto_has_skcipher);</div><div class='ctx'> </div><div class='ctx'> int skcipher_prepare_alg_common(struct skcipher_alg_common *alg)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_istat_cipher *istat = skcipher_get_stat_common(alg);</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	if (alg-&gt;ivsize &gt; PAGE_SIZE / 8 || alg-&gt;chunksize &gt; PAGE_SIZE / 8 ||</div><div class='hunk'>@@ -948,9 +881,6 @@ int skcipher_prepare_alg_common(struct skcipher_alg_common *alg)</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_STATS))</div><div class='del'>-		memset(istat, 0, sizeof(*istat));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/skcipher.h b/crypto/skcipher.h<br/>index 16c9484360da..703651367dd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/skcipher.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/skcipher.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/skcipher.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/skcipher.h</a></div><div class='hunk'>@@ -10,16 +10,6 @@</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='del'>-static inline struct crypto_istat_cipher *skcipher_get_stat_common(</div><div class='del'>-	struct skcipher_alg_common *alg)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_CRYPTO_STATS</div><div class='del'>-	return &amp;alg-&gt;stat;</div><div class='del'>-#else</div><div class='del'>-	return NULL;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int crypto_lskcipher_encrypt_sg(struct skcipher_request *req);</div><div class='ctx'> int crypto_lskcipher_decrypt_sg(struct skcipher_request *req);</div><div class='ctx'> int crypto_init_lskcipher_ops_sg(struct crypto_tfm *tfm);</div><div class='head'>diff --git a/crypto/testmgr.c b/crypto/testmgr.c<br/>index 3dddd288ca02..00f5a6cf341a 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/testmgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/testmgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/testmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/testmgr.c</a></div><div class='hunk'>@@ -5098,6 +5098,13 @@ static const struct alg_test_desc alg_test_descs[] = {</div><div class='ctx'> 			.akcipher = __VECS(ecdsa_nist_p384_tv_template)</div><div class='ctx'> 		}</div><div class='ctx'> 	}, {</div><div class='add'>+		.alg = "ecdsa-nist-p521",</div><div class='add'>+		.test = alg_test_akcipher,</div><div class='add'>+		.fips_allowed = 1,</div><div class='add'>+		.suite = {</div><div class='add'>+			.akcipher = __VECS(ecdsa_nist_p521_tv_template)</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='ctx'> 		.alg = "ecrdsa",</div><div class='ctx'> 		.test = alg_test_akcipher,</div><div class='ctx'> 		.suite = {</div><div class='head'>diff --git a/crypto/testmgr.h b/crypto/testmgr.h<br/>index 12e1c892f366..5350cfd9d325 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/testmgr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>crypto/testmgr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/testmgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>crypto/testmgr.h</a></div><div class='hunk'>@@ -1071,6 +1071,152 @@ static const struct akcipher_testvec ecdsa_nist_p384_tv_template[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct akcipher_testvec ecdsa_nist_p521_tv_template[] = {</div><div class='add'>+	{</div><div class='add'>+	.key = /* secp521r1(sha224) */</div><div class='add'>+	"\x04\x01\x4f\x43\x18\xb6\xa9\xc9\x5d\x68\xd3\xa9\x42\xf8\x98\xc0"</div><div class='add'>+	"\xd2\xd1\xa9\x50\x3b\xe8\xc4\x40\xe6\x11\x78\x88\x4b\xbd\x76\xa7"</div><div class='add'>+	"\x9a\xe0\xdd\x31\xa4\x67\x78\x45\x33\x9e\x8c\xd1\xc7\x44\xac\x61"</div><div class='add'>+	"\x68\xc8\x04\xe7\x5c\x79\xb1\xf1\x41\x0c\x71\xc0\x53\xa8\xbc\xfb"</div><div class='add'>+	"\xf5\xca\xd4\x01\x40\xfd\xa3\x45\xda\x08\xe0\xb4\xcb\x28\x3b\x0a"</div><div class='add'>+	"\x02\x35\x5f\x02\x9f\x3f\xcd\xef\x08\x22\x40\x97\x74\x65\xb7\x76"</div><div class='add'>+	"\x85\xc7\xc0\x5c\xfb\x81\xe1\xa5\xde\x0c\x4e\x8b\x12\x31\xb6\x47"</div><div class='add'>+	"\xed\x37\x0f\x99\x3f\x26\xba\xa3\x8e\xff\x79\x34\x7c\x3a\xfe\x1f"</div><div class='add'>+	"\x3b\x83\x82\x2f\x14",</div><div class='add'>+	.key_len = 133,</div><div class='add'>+	.params =</div><div class='add'>+	"\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04"</div><div class='add'>+	"\x00\x23",</div><div class='add'>+	.param_len = 18,</div><div class='add'>+	.m =</div><div class='add'>+	"\xa2\x3a\x6a\x8c\x7b\x3c\xf2\x51\xf8\xbe\x5f\x4f\x3b\x15\x05\xc4"</div><div class='add'>+	"\xb5\xbc\x19\xe7\x21\x85\xe9\x23\x06\x33\x62\xfb",</div><div class='add'>+	.m_size = 28,</div><div class='add'>+	.algo = OID_id_ecdsa_with_sha224,</div><div class='add'>+	.c =</div><div class='add'>+	"\x30\x81\x86\x02\x41\x01\xd6\x43\xe7\xff\x42\xb2\xba\x74\x35\xf6"</div><div class='add'>+	"\xdc\x6d\x02\x7b\x22\xac\xe2\xef\x07\x92\xee\x60\x94\x06\xf8\x3f"</div><div class='add'>+	"\x59\x0f\x74\xf0\x3f\xd8\x18\xc6\x37\x8a\xcb\xa7\xd8\x7d\x98\x85"</div><div class='add'>+	"\x29\x88\xff\x0b\x94\x94\x6c\xa6\x9b\x89\x8b\x1e\xfd\x09\x46\x6b"</div><div class='add'>+	"\xc7\xaf\x7a\xb9\x19\x0a\x02\x41\x3a\x26\x0d\x55\xcd\x23\x1e\x7d"</div><div class='add'>+	"\xa0\x5e\xf9\x88\xf3\xd2\x32\x90\x57\x0f\xf8\x65\x97\x6b\x09\x4d"</div><div class='add'>+	"\x22\x26\x0b\x5f\x49\x32\x6b\x91\x99\x30\x90\x0f\x1c\x8f\x78\xd3"</div><div class='add'>+	"\x9f\x0e\x64\xcc\xc4\xe8\x43\xd9\x0e\x1c\xad\x22\xda\x82\x00\x35"</div><div class='add'>+	"\xa3\x50\xb1\xa5\x98\x92\x2a\xa5\x52",</div><div class='add'>+	.c_size = 137,</div><div class='add'>+	.public_key_vec = true,</div><div class='add'>+	.siggen_sigver_test = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+	.key = /* secp521r1(sha256) */</div><div class='add'>+	"\x04\x01\x05\x3a\x6b\x3b\x5a\x0f\xa7\xb9\xb7\x32\x53\x4e\xe2\xae"</div><div class='add'>+	"\x0a\x52\xc5\xda\xdd\x5a\x79\x1c\x30\x2d\x33\x07\x79\xd5\x70\x14"</div><div class='add'>+	"\x61\x0c\xec\x26\x4d\xd8\x35\x57\x04\x1d\x88\x33\x4d\xce\x05\x36"</div><div class='add'>+	"\xa5\xaf\x56\x84\xfa\x0b\x9e\xff\x7b\x30\x4b\x92\x1d\x06\xf8\x81"</div><div class='add'>+	"\x24\x1e\x51\x00\x09\x21\x51\xf7\x46\x0a\x77\xdb\xb5\x0c\xe7\x9c"</div><div class='add'>+	"\xff\x27\x3c\x02\x71\xd7\x85\x36\xf1\xaa\x11\x59\xd8\xb8\xdc\x09"</div><div class='add'>+	"\xdc\x6d\x5a\x6f\x63\x07\x6c\xe1\xe5\x4d\x6e\x0f\x6e\xfb\x7c\x05"</div><div class='add'>+	"\x8a\xe9\x53\xa8\xcf\xce\x43\x0e\x82\x20\x86\xbc\x88\x9c\xb7\xe3"</div><div class='add'>+	"\xe6\x77\x1e\x1f\x8a",</div><div class='add'>+	.key_len = 133,</div><div class='add'>+	.params =</div><div class='add'>+	"\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04"</div><div class='add'>+	"\x00\x23",</div><div class='add'>+	.param_len = 18,</div><div class='add'>+	.m =</div><div class='add'>+	"\xcc\x97\x73\x0c\x73\xa2\x53\x2b\xfa\xd7\x83\x1d\x0c\x72\x1b\x39"</div><div class='add'>+	"\x80\x71\x8d\xdd\xc5\x9b\xff\x55\x32\x98\x25\xa2\x58\x2e\xb7\x73",</div><div class='add'>+	.m_size = 32,</div><div class='add'>+	.algo = OID_id_ecdsa_with_sha256,</div><div class='add'>+	.c =</div><div class='add'>+	"\x30\x81\x88\x02\x42\x00\xcd\xa5\x5f\x57\x52\x27\x78\x3a\xb5\x06"</div><div class='add'>+	"\x0f\xfd\x83\xfc\x0e\xd9\xce\x50\x9f\x7d\x1f\xca\x8b\xa8\x2d\x56"</div><div class='add'>+	"\x3c\xf6\xf0\xd8\xe1\xb7\x5d\x95\x35\x6f\x02\x0e\xaf\xe1\x4c\xae"</div><div class='add'>+	"\xce\x54\x76\x9a\xc2\x8f\xb8\x38\x1f\x46\x0b\x04\x64\x34\x79\xde"</div><div class='add'>+	"\x7e\xd7\x59\x10\xe9\xd9\xd5\x02\x42\x01\xcf\x50\x85\x38\xf9\x15"</div><div class='add'>+	"\x83\x18\x04\x6b\x35\xae\x65\xb5\x99\x12\x0a\xa9\x79\x24\xb9\x37"</div><div class='add'>+	"\x35\xdd\xa0\xe0\x87\x2c\x44\x4b\x5a\xee\xaf\xfa\x10\xdd\x9b\xfb"</div><div class='add'>+	"\x36\x1a\x31\x03\x42\x02\x5f\x50\xf0\xa2\x0d\x1c\x57\x56\x8f\x12"</div><div class='add'>+	"\xb7\x1d\x91\x55\x38\xb6\xf6\x34\x65\xc7\xbd",</div><div class='add'>+	.c_size = 139,</div><div class='add'>+	.public_key_vec = true,</div><div class='add'>+	.siggen_sigver_test = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+	.key = /* secp521r1(sha384) */</div><div class='add'>+	"\x04\x00\x2e\xd6\x21\x04\x75\xc3\xdc\x7d\xff\x0e\xf3\x70\x25\x2b"</div><div class='add'>+	"\xad\x72\xfc\x5a\x91\xf1\xd5\x9c\x64\xf3\x1f\x47\x11\x10\x62\x33"</div><div class='add'>+	"\xfd\x2e\xe8\x32\xca\x9e\x6f\x0a\x4c\x5b\x35\x9a\x46\xc5\xe7\xd4"</div><div class='add'>+	"\x38\xda\xb2\xf0\xf4\x87\xf3\x86\xf4\xea\x70\xad\x1e\xd4\x78\x8c"</div><div class='add'>+	"\x36\x18\x17\x00\xa2\xa0\x34\x1b\x2e\x6a\xdf\x06\xd6\x99\x2d\x47"</div><div class='add'>+	"\x50\x92\x1a\x8a\x72\x9c\x23\x44\xfa\xa7\xa9\xed\xa6\xef\x26\x14"</div><div class='add'>+	"\xb3\x9d\xfe\x5e\xa3\x8c\xd8\x29\xf8\xdf\xad\xa6\xab\xfc\xdd\x46"</div><div class='add'>+	"\x22\x6e\xd7\x35\xc7\x23\xb7\x13\xae\xb6\x34\xff\xd7\x80\xe5\x39"</div><div class='add'>+	"\xb3\x3b\x5b\x1b\x94",</div><div class='add'>+	.key_len = 133,</div><div class='add'>+	.params =</div><div class='add'>+	"\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04"</div><div class='add'>+	"\x00\x23",</div><div class='add'>+	.param_len = 18,</div><div class='add'>+	.m =</div><div class='add'>+	"\x36\x98\xd6\x82\xfa\xad\xed\x3c\xb9\x40\xb6\x4d\x9e\xb7\x04\x26"</div><div class='add'>+	"\xad\x72\x34\x44\xd2\x81\xb4\x9b\xbe\x01\x04\x7a\xd8\x50\xf8\x59"</div><div class='add'>+	"\xba\xad\x23\x85\x6b\x59\xbe\xfb\xf6\x86\xd4\x67\xa8\x43\x28\x76",</div><div class='add'>+	.m_size = 48,</div><div class='add'>+	.algo = OID_id_ecdsa_with_sha384,</div><div class='add'>+	.c =</div><div class='add'>+	"\x30\x81\x88\x02\x42\x00\x93\x96\x76\x3c\x27\xea\xaa\x9c\x26\xec"</div><div class='add'>+	"\x51\xdc\xe8\x35\x5e\xae\x16\xf2\x4b\x64\x98\xf7\xec\xda\xc7\x7e"</div><div class='add'>+	"\x42\x71\x86\x57\x2d\xf1\x7d\xe4\xdf\x9b\x7d\x9e\x47\xca\x33\x32"</div><div class='add'>+	"\x76\x06\xd0\xf9\xc0\xe4\xe6\x84\x59\xfd\x1a\xc4\x40\xdd\x43\xb8"</div><div class='add'>+	"\x6a\xdd\xfb\xe6\x63\x4e\x28\x02\x42\x00\xff\xc3\x6a\x87\x6e\xb5"</div><div class='add'>+	"\x13\x1f\x20\x55\xce\x37\x97\xc9\x05\x51\xe5\xe4\x3c\xbc\x93\x65"</div><div class='add'>+	"\x57\x1c\x30\xda\xa7\xcd\x26\x28\x76\x3b\x52\xdf\xc4\xc0\xdb\x54"</div><div class='add'>+	"\xdb\x8a\x0d\x6a\xc3\xf3\x7a\xd1\xfa\xe7\xa7\xe5\x5a\x94\x56\xcf"</div><div class='add'>+	"\x8f\xb4\x22\xc6\x4f\xab\x2b\x62\xc1\x42\xb1",</div><div class='add'>+	.c_size = 139,</div><div class='add'>+	.public_key_vec = true,</div><div class='add'>+	.siggen_sigver_test = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+	.key = /* secp521r1(sha512) */</div><div class='add'>+	"\x04\x00\xc7\x65\xee\x0b\x86\x7d\x8f\x02\xf1\x74\x5b\xb0\x4c\x3f"</div><div class='add'>+	"\xa6\x35\x60\x9f\x55\x23\x11\xcc\xdf\xb8\x42\x99\xee\x6c\x96\x6a"</div><div class='add'>+	"\x27\xa2\x56\xb2\x2b\x03\xad\x0f\xe7\x97\xde\x09\x5d\xb4\xc5\x5f"</div><div class='add'>+	"\xbd\x87\x37\xbf\x5a\x16\x35\x56\x08\xfd\x6f\x06\x1a\x1c\x84\xee"</div><div class='add'>+	"\xc3\x64\xb3\x00\x9e\xbd\x6e\x60\x76\xee\x69\xfd\x3a\xb8\xcd\x7e"</div><div class='add'>+	"\x91\x68\x53\x57\x44\x13\x2e\x77\x09\x2a\xbe\x48\xbd\x91\xd8\xf6"</div><div class='add'>+	"\x21\x16\x53\x99\xd5\xf0\x40\xad\xa6\xf8\x58\x26\xb6\x9a\xf8\x77"</div><div class='add'>+	"\xfe\x3a\x05\x1a\xdb\xa9\x0f\xc0\x6c\x76\x30\x8c\xd8\xde\x44\xae"</div><div class='add'>+	"\xd0\x17\xdf\x49\x6a",</div><div class='add'>+	.key_len = 133,</div><div class='add'>+	.params =</div><div class='add'>+	"\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04"</div><div class='add'>+	"\x00\x23",</div><div class='add'>+	.param_len = 18,</div><div class='add'>+	.m =</div><div class='add'>+	"\x5c\xa6\xbc\x79\xb8\xa0\x1e\x11\x83\xf7\xe9\x05\xdf\xba\xf7\x69"</div><div class='add'>+	"\x97\x22\x32\xe4\x94\x7c\x65\xbd\x74\xc6\x9a\x8b\xbd\x0d\xdc\xed"</div><div class='add'>+	"\xf5\x9c\xeb\xe1\xc5\x68\x40\xf2\xc7\x04\xde\x9e\x0d\x76\xc5\xa3"</div><div class='add'>+	"\xf9\x3c\x6c\x98\x08\x31\xbd\x39\xe8\x42\x7f\x80\x39\x6f\xfe\x68",</div><div class='add'>+	.m_size = 64,</div><div class='add'>+	.algo = OID_id_ecdsa_with_sha512,</div><div class='add'>+	.c =</div><div class='add'>+	"\x30\x81\x88\x02\x42\x01\x5c\x71\x86\x96\xac\x21\x33\x7e\x4e\xaa"</div><div class='add'>+	"\x86\xec\xa8\x05\x03\x52\x56\x63\x0e\x02\xcc\x94\xa9\x05\xb9\xfb"</div><div class='add'>+	"\x62\x1e\x42\x03\x6c\x74\x8a\x1f\x12\x3e\xb7\x7e\x51\xff\x7f\x27"</div><div class='add'>+	"\x93\xe8\x6c\x49\x7d\x28\xfc\x80\xa6\x13\xfc\xb6\x90\xf7\xbb\x28"</div><div class='add'>+	"\xb5\x04\xb0\xb6\x33\x1c\x7e\x02\x42\x01\x70\x43\x52\x1d\xe3\xc6"</div><div class='add'>+	"\xbd\x5a\x40\x95\x35\x89\x4f\x41\x5f\x9e\x19\x88\x05\x3e\x43\x39"</div><div class='add'>+	"\x01\xbd\xb7\x7a\x76\x37\x51\x47\x49\x98\x12\x71\xd0\xe9\xca\xa7"</div><div class='add'>+	"\xc0\xcb\xaa\x00\x55\xbb\x6a\xb4\x73\x00\xd2\x72\x74\x13\x63\x39"</div><div class='add'>+	"\xa6\xe5\x25\x46\x1e\x77\x44\x78\xe0\xd1\x04",</div><div class='add'>+	.c_size = 139,</div><div class='add'>+	.public_key_vec = true,</div><div class='add'>+	.siggen_sigver_test = true,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * EC-RDSA test vectors are generated by gost-engine.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_debugfs.c b/drivers/accel/ivpu/ivpu_debugfs.c<br/>index d09d29775b3f..e07e447d08d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/ivpu/ivpu_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/ivpu/ivpu_debugfs.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'>  * Copyright (C) 2020-2023 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;drm/drm_debugfs.h&gt;</div><div class='ctx'> #include &lt;drm/drm_file.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='head'>diff --git a/drivers/accel/qaic/Makefile b/drivers/accel/qaic/Makefile<br/>index 3f7f6dfde7f2..35e883515629 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/qaic/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/Makefile</a></div><div class='hunk'>@@ -10,4 +10,7 @@ qaic-y := \</div><div class='ctx'> 	qaic_control.o \</div><div class='ctx'> 	qaic_data.o \</div><div class='ctx'> 	qaic_drv.o \</div><div class='del'>-	qaic_timesync.o</div><div class='add'>+	qaic_timesync.o \</div><div class='add'>+	sahara.o</div><div class='add'>+</div><div class='add'>+qaic-$(CONFIG_DEBUG_FS) += qaic_debugfs.o</div><div class='head'>diff --git a/drivers/accel/qaic/qaic.h b/drivers/accel/qaic/qaic.h<br/>index 9256653b3036..02561b6cecc6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/qaic.h</a></div><div class='hunk'>@@ -153,6 +153,14 @@ struct qaic_device {</div><div class='ctx'> 	struct mhi_device	*qts_ch;</div><div class='ctx'> 	/* Work queue for tasks related to MHI "QAIC_TIMESYNC" channel */</div><div class='ctx'> 	struct workqueue_struct	*qts_wq;</div><div class='add'>+	/* Head of list of page allocated by MHI bootlog device */</div><div class='add'>+	struct list_head        bootlog;</div><div class='add'>+	/* MHI bootlog channel device */</div><div class='add'>+	struct mhi_device       *bootlog_ch;</div><div class='add'>+	/* Work queue for tasks related to MHI bootlog device */</div><div class='add'>+	struct workqueue_struct *bootlog_wq;</div><div class='add'>+	/* Synchronizes access of pages in MHI bootlog device */</div><div class='add'>+	struct mutex            bootlog_mutex;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct qaic_drm_device {</div><div class='hunk'>@@ -280,6 +288,7 @@ int disable_dbc(struct qaic_device *qdev, u32 dbc_id, struct qaic_user *usr);</div><div class='ctx'> void enable_dbc(struct qaic_device *qdev, u32 dbc_id, struct qaic_user *usr);</div><div class='ctx'> void wakeup_dbc(struct qaic_device *qdev, u32 dbc_id);</div><div class='ctx'> void release_dbc(struct qaic_device *qdev, u32 dbc_id);</div><div class='add'>+void qaic_data_get_fifo_info(struct dma_bridge_chan *dbc, u32 *head, u32 *tail);</div><div class='ctx'> </div><div class='ctx'> void wake_all_cntl(struct qaic_device *qdev);</div><div class='ctx'> void qaic_dev_reset_clean_local_state(struct qaic_device *qdev);</div><div class='head'>diff --git a/drivers/accel/qaic/qaic_data.c b/drivers/accel/qaic/qaic_data.c<br/>index 2459fe4a3f95..e86e71c1cdd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/qaic_data.c</a></div><div class='hunk'>@@ -1981,3 +1981,12 @@ void release_dbc(struct qaic_device *qdev, u32 dbc_id)</div><div class='ctx'> 	dbc-&gt;in_use = false;</div><div class='ctx'> 	wake_up(&amp;dbc-&gt;dbc_release);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void qaic_data_get_fifo_info(struct dma_bridge_chan *dbc, u32 *head, u32 *tail)</div><div class='add'>+{</div><div class='add'>+	if (!dbc || !head || !tail)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	*head = readl(dbc-&gt;dbc_base + REQHP_OFF);</div><div class='add'>+	*tail = readl(dbc-&gt;dbc_base + REQTP_OFF);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/accel/qaic/qaic_debugfs.c b/drivers/accel/qaic/qaic_debugfs.c<br/>new file mode 100644<br/>index 000000000000..20b653d99e52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/qaic_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,338 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+/* Copyright (c) 2020, The Linux Foundation. All rights reserved. */</div><div class='add'>+/* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/mhi.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/overflow.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/sprintf.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qaic.h"</div><div class='add'>+#include "qaic_debugfs.h"</div><div class='add'>+</div><div class='add'>+#define BOOTLOG_POOL_SIZE		16</div><div class='add'>+#define BOOTLOG_MSG_SIZE		512</div><div class='add'>+#define QAIC_DBC_DIR_NAME		9</div><div class='add'>+</div><div class='add'>+struct bootlog_msg {</div><div class='add'>+	/* Buffer for bootlog messages */</div><div class='add'>+	char str[BOOTLOG_MSG_SIZE];</div><div class='add'>+	/* Root struct of device, used to access device resources */</div><div class='add'>+	struct qaic_device *qdev;</div><div class='add'>+	/* Work struct to schedule work coming on QAIC_LOGGING channel */</div><div class='add'>+	struct work_struct work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bootlog_page {</div><div class='add'>+	/* Node in list of bootlog pages maintained by root device struct */</div><div class='add'>+	struct list_head node;</div><div class='add'>+	/* Total size of the buffer that holds the bootlogs. It is PAGE_SIZE */</div><div class='add'>+	unsigned int size;</div><div class='add'>+	/* Offset for the next bootlog */</div><div class='add'>+	unsigned int offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int bootlog_show(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct bootlog_page *page;</div><div class='add'>+	struct qaic_device *qdev;</div><div class='add'>+	void *page_end;</div><div class='add'>+	void *log;</div><div class='add'>+</div><div class='add'>+	qdev = s-&gt;private;</div><div class='add'>+	mutex_lock(&amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+	list_for_each_entry(page, &amp;qdev-&gt;bootlog, node) {</div><div class='add'>+		log = page + 1;</div><div class='add'>+		page_end = (void *)page + page-&gt;offset;</div><div class='add'>+		while (log &lt; page_end) {</div><div class='add'>+			seq_printf(s, "%s", (char *)log);</div><div class='add'>+			log += strlen(log) + 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bootlog_fops_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, bootlog_show, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations bootlog_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = bootlog_fops_open,</div><div class='add'>+	.read = seq_read,</div><div class='add'>+	.llseek = seq_lseek,</div><div class='add'>+	.release = single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int read_dbc_fifo_size(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct dma_bridge_chan *dbc = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "%u\n", dbc-&gt;nelem);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fifo_size_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, read_dbc_fifo_size, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fifo_size_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = fifo_size_open,</div><div class='add'>+	.read = seq_read,</div><div class='add'>+	.llseek = seq_lseek,</div><div class='add'>+	.release = single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int read_dbc_queued(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct dma_bridge_chan *dbc = s-&gt;private;</div><div class='add'>+	u32 tail = 0, head = 0;</div><div class='add'>+</div><div class='add'>+	qaic_data_get_fifo_info(dbc, &amp;head, &amp;tail);</div><div class='add'>+</div><div class='add'>+	if (head == U32_MAX || tail == U32_MAX)</div><div class='add'>+		seq_printf(s, "%u\n", 0);</div><div class='add'>+	else if (head &gt; tail)</div><div class='add'>+		seq_printf(s, "%u\n", dbc-&gt;nelem - head + tail);</div><div class='add'>+	else</div><div class='add'>+		seq_printf(s, "%u\n", tail - head);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int queued_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, read_dbc_queued, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations queued_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = queued_open,</div><div class='add'>+	.read = seq_read,</div><div class='add'>+	.llseek = seq_lseek,</div><div class='add'>+	.release = single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void qaic_debugfs_init(struct qaic_drm_device *qddev)</div><div class='add'>+{</div><div class='add'>+	struct qaic_device *qdev = qddev-&gt;qdev;</div><div class='add'>+	struct dentry *debugfs_root;</div><div class='add'>+	struct dentry *debugfs_dir;</div><div class='add'>+	char name[QAIC_DBC_DIR_NAME];</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	debugfs_root = to_drm(qddev)-&gt;debugfs_root;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("bootlog", 0400, debugfs_root, qdev, &amp;bootlog_fops);</div><div class='add'>+	/*</div><div class='add'>+	 * 256 dbcs per device is likely the max we will ever see and lets static checking see a</div><div class='add'>+	 * reasonable range.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; qdev-&gt;num_dbc &amp;&amp; i &lt; 256; ++i) {</div><div class='add'>+		snprintf(name, QAIC_DBC_DIR_NAME, "dbc%03u", i);</div><div class='add'>+		debugfs_dir = debugfs_create_dir(name, debugfs_root);</div><div class='add'>+		debugfs_create_file("fifo_size", 0400, debugfs_dir, &amp;qdev-&gt;dbc[i], &amp;fifo_size_fops);</div><div class='add'>+		debugfs_create_file("queued", 0400, debugfs_dir, &amp;qdev-&gt;dbc[i], &amp;queued_fops);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bootlog_page *alloc_bootlog_page(struct qaic_device *qdev)</div><div class='add'>+{</div><div class='add'>+	struct bootlog_page *page;</div><div class='add'>+</div><div class='add'>+	page = (struct bootlog_page *)devm_get_free_pages(&amp;qdev-&gt;pdev-&gt;dev, GFP_KERNEL, 0);</div><div class='add'>+	if (!page)</div><div class='add'>+		return page;</div><div class='add'>+</div><div class='add'>+	page-&gt;size = PAGE_SIZE;</div><div class='add'>+	page-&gt;offset = sizeof(*page);</div><div class='add'>+	list_add_tail(&amp;page-&gt;node, &amp;qdev-&gt;bootlog);</div><div class='add'>+</div><div class='add'>+	return page;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int reset_bootlog(struct qaic_device *qdev)</div><div class='add'>+{</div><div class='add'>+	struct bootlog_page *page;</div><div class='add'>+	struct bootlog_page *i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+	list_for_each_entry_safe(page, i, &amp;qdev-&gt;bootlog, node) {</div><div class='add'>+		list_del(&amp;page-&gt;node);</div><div class='add'>+		devm_free_pages(&amp;qdev-&gt;pdev-&gt;dev, (unsigned long)page);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	page = alloc_bootlog_page(qdev);</div><div class='add'>+	mutex_unlock(&amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+	if (!page)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *bootlog_get_space(struct qaic_device *qdev, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	struct bootlog_page *page;</div><div class='add'>+</div><div class='add'>+	page = list_last_entry(&amp;qdev-&gt;bootlog, struct bootlog_page, node);</div><div class='add'>+</div><div class='add'>+	if (size_add(size, sizeof(*page)) &gt; page-&gt;size)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (page-&gt;offset + size &gt; page-&gt;size) {</div><div class='add'>+		page = alloc_bootlog_page(qdev);</div><div class='add'>+		if (!page)</div><div class='add'>+			return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (void *)page + page-&gt;offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bootlog_commit(struct qaic_device *qdev, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	struct bootlog_page *page;</div><div class='add'>+</div><div class='add'>+	page = list_last_entry(&amp;qdev-&gt;bootlog, struct bootlog_page, node);</div><div class='add'>+</div><div class='add'>+	page-&gt;offset += size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bootlog_log(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct bootlog_msg *msg = container_of(work, struct bootlog_msg, work);</div><div class='add'>+	unsigned int len = strlen(msg-&gt;str) + 1;</div><div class='add'>+	struct qaic_device *qdev = msg-&gt;qdev;</div><div class='add'>+	void *log;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+	log = bootlog_get_space(qdev, len);</div><div class='add'>+	if (log) {</div><div class='add'>+		memcpy(log, msg, len);</div><div class='add'>+		bootlog_commit(qdev, len);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+</div><div class='add'>+	if (mhi_queue_buf(qdev-&gt;bootlog_ch, DMA_FROM_DEVICE, msg, BOOTLOG_MSG_SIZE, MHI_EOT))</div><div class='add'>+		devm_kfree(&amp;qdev-&gt;pdev-&gt;dev, msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qaic_bootlog_mhi_probe(struct mhi_device *mhi_dev, const struct mhi_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct qaic_device *qdev = pci_get_drvdata(to_pci_dev(mhi_dev-&gt;mhi_cntrl-&gt;cntrl_dev));</div><div class='add'>+	struct bootlog_msg *msg;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	qdev-&gt;bootlog_wq = alloc_ordered_workqueue("qaic_bootlog", 0);</div><div class='add'>+	if (!qdev-&gt;bootlog_wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = reset_bootlog(qdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_workqueue;</div><div class='add'>+</div><div class='add'>+	ret = mhi_prepare_for_transfer(mhi_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_workqueue;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BOOTLOG_POOL_SIZE; i++) {</div><div class='add'>+		msg = devm_kzalloc(&amp;qdev-&gt;pdev-&gt;dev, sizeof(*msg), GFP_KERNEL);</div><div class='add'>+		if (!msg) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto mhi_unprepare;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		msg-&gt;qdev = qdev;</div><div class='add'>+		INIT_WORK(&amp;msg-&gt;work, bootlog_log);</div><div class='add'>+</div><div class='add'>+		ret = mhi_queue_buf(mhi_dev, DMA_FROM_DEVICE, msg, BOOTLOG_MSG_SIZE, MHI_EOT);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto mhi_unprepare;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mhi_dev-&gt;dev, qdev);</div><div class='add'>+	qdev-&gt;bootlog_ch = mhi_dev;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+mhi_unprepare:</div><div class='add'>+	mhi_unprepare_from_transfer(mhi_dev);</div><div class='add'>+destroy_workqueue:</div><div class='add'>+	flush_workqueue(qdev-&gt;bootlog_wq);</div><div class='add'>+	destroy_workqueue(qdev-&gt;bootlog_wq);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qaic_bootlog_mhi_remove(struct mhi_device *mhi_dev)</div><div class='add'>+{</div><div class='add'>+	struct qaic_device *qdev;</div><div class='add'>+</div><div class='add'>+	qdev = dev_get_drvdata(&amp;mhi_dev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	mhi_unprepare_from_transfer(qdev-&gt;bootlog_ch);</div><div class='add'>+	flush_workqueue(qdev-&gt;bootlog_wq);</div><div class='add'>+	destroy_workqueue(qdev-&gt;bootlog_wq);</div><div class='add'>+	qdev-&gt;bootlog_ch = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qaic_bootlog_mhi_ul_xfer_cb(struct mhi_device *mhi_dev, struct mhi_result *mhi_result)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qaic_bootlog_mhi_dl_xfer_cb(struct mhi_device *mhi_dev, struct mhi_result *mhi_result)</div><div class='add'>+{</div><div class='add'>+	struct qaic_device *qdev = dev_get_drvdata(&amp;mhi_dev-&gt;dev);</div><div class='add'>+	struct bootlog_msg *msg = mhi_result-&gt;buf_addr;</div><div class='add'>+</div><div class='add'>+	if (mhi_result-&gt;transaction_status) {</div><div class='add'>+		devm_kfree(&amp;qdev-&gt;pdev-&gt;dev, msg);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Force a null at the end of the transferred string */</div><div class='add'>+	msg-&gt;str[mhi_result-&gt;bytes_xferd - 1] = 0;</div><div class='add'>+</div><div class='add'>+	queue_work(qdev-&gt;bootlog_wq, &amp;msg-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mhi_device_id qaic_bootlog_mhi_match_table[] = {</div><div class='add'>+	{ .chan = "QAIC_LOGGING", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mhi_driver qaic_bootlog_mhi_driver = {</div><div class='add'>+	.id_table = qaic_bootlog_mhi_match_table,</div><div class='add'>+	.remove = qaic_bootlog_mhi_remove,</div><div class='add'>+	.probe = qaic_bootlog_mhi_probe,</div><div class='add'>+	.ul_xfer_cb = qaic_bootlog_mhi_ul_xfer_cb,</div><div class='add'>+	.dl_xfer_cb = qaic_bootlog_mhi_dl_xfer_cb,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "qaic_bootlog",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int qaic_bootlog_register(void)</div><div class='add'>+{</div><div class='add'>+	return mhi_driver_register(&amp;qaic_bootlog_mhi_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qaic_bootlog_unregister(void)</div><div class='add'>+{</div><div class='add'>+	mhi_driver_unregister(&amp;qaic_bootlog_mhi_driver);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/accel/qaic/qaic_debugfs.h b/drivers/accel/qaic/qaic_debugfs.h<br/>new file mode 100644<br/>index 000000000000..05e74f84cf9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_debugfs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/qaic_debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+</div><div class='add'>+/* Copyright (c) 2020, The Linux Foundation. All rights reserved. */</div><div class='add'>+/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef __QAIC_DEBUGFS_H__</div><div class='add'>+#define __QAIC_DEBUGFS_H__</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_file.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+int qaic_bootlog_register(void);</div><div class='add'>+void qaic_bootlog_unregister(void);</div><div class='add'>+void qaic_debugfs_init(struct qaic_drm_device *qddev);</div><div class='add'>+#else</div><div class='add'>+static inline int qaic_bootlog_register(void) { return 0; }</div><div class='add'>+static inline void qaic_bootlog_unregister(void) {}</div><div class='add'>+static inline void qaic_debugfs_init(struct qaic_drm_device *qddev) {}</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='add'>+#endif /* __QAIC_DEBUGFS_H__ */</div><div class='head'>diff --git a/drivers/accel/qaic/qaic_drv.c b/drivers/accel/qaic/qaic_drv.c<br/>index d1a632dbaec6..580b29ed1902 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/accel/qaic/qaic_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/qaic_drv.c</a></div><div class='hunk'>@@ -28,7 +28,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "mhi_controller.h"</div><div class='ctx'> #include "qaic.h"</div><div class='add'>+#include "qaic_debugfs.h"</div><div class='ctx'> #include "qaic_timesync.h"</div><div class='add'>+#include "sahara.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_IMPORT_NS(DMA_BUF);</div><div class='ctx'> </div><div class='hunk'>@@ -229,8 +231,12 @@ static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id)</div><div class='ctx'> 	qddev-&gt;partition_id = partition_id;</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_dev_register(drm, 0);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		pci_dbg(qdev-&gt;pdev, "drm_dev_register failed %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qaic_debugfs_init(qddev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -382,6 +388,9 @@ static struct qaic_device *create_qdev(struct pci_dev *pdev, const struct pci_de</div><div class='ctx'> 	ret = drmm_mutex_init(drm, &amp;qdev-&gt;cntl_mutex);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return NULL;</div><div class='add'>+	ret = drmm_mutex_init(drm, &amp;qdev-&gt;bootlog_mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	qdev-&gt;cntl_wq = qaicm_wq_init(drm, "qaic_cntl");</div><div class='ctx'> 	if (IS_ERR(qdev-&gt;cntl_wq))</div><div class='hunk'>@@ -399,6 +408,7 @@ static struct qaic_device *create_qdev(struct pci_dev *pdev, const struct pci_de</div><div class='ctx'> 	qddev-&gt;qdev = qdev;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;qdev-&gt;cntl_xfer_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;qdev-&gt;bootlog);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;qddev-&gt;users);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; qdev-&gt;num_dbc; ++i) {</div><div class='hunk'>@@ -635,12 +645,24 @@ static int __init qaic_init(void)</div><div class='ctx'> 		goto free_pci;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = sahara_register();</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_debug("qaic: sahara_register failed %d\n", ret);</div><div class='add'>+		goto free_mhi;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = qaic_timesync_init();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		pr_debug("qaic: qaic_timesync_init failed %d\n", ret);</div><div class='ctx'> </div><div class='add'>+	ret = qaic_bootlog_register();</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_debug("qaic: qaic_bootlog_register failed %d\n", ret);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+free_mhi:</div><div class='add'>+	mhi_driver_unregister(&amp;qaic_mhi_driver);</div><div class='ctx'> free_pci:</div><div class='ctx'> 	pci_unregister_driver(&amp;qaic_pci_driver);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -664,7 +686,9 @@ static void __exit qaic_exit(void)</div><div class='ctx'> 	 * reinitializing the link_up state after the cleanup is done.</div><div class='ctx'> 	 */</div><div class='ctx'> 	link_up = true;</div><div class='add'>+	qaic_bootlog_unregister();</div><div class='ctx'> 	qaic_timesync_deinit();</div><div class='add'>+	sahara_unregister();</div><div class='ctx'> 	mhi_driver_unregister(&amp;qaic_mhi_driver);</div><div class='ctx'> 	pci_unregister_driver(&amp;qaic_pci_driver);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/accel/qaic/sahara.c b/drivers/accel/qaic/sahara.c<br/>new file mode 100644<br/>index 000000000000..bf94bbab6be5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/sahara.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/sahara.c</a></div><div class='hunk'>@@ -0,0 +1,449 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/limits.h&gt;</div><div class='add'>+#include &lt;linux/mhi.h&gt;</div><div class='add'>+#include &lt;linux/minmax.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/overflow.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sahara.h"</div><div class='add'>+</div><div class='add'>+#define SAHARA_HELLO_CMD		0x1  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_HELLO_RESP_CMD		0x2  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_READ_DATA_CMD		0x3  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_END_OF_IMAGE_CMD		0x4  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_DONE_CMD			0x5  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_DONE_RESP_CMD		0x6  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_RESET_CMD		0x7  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_RESET_RESP_CMD		0x8  /* Min protocol version 1.0 */</div><div class='add'>+#define SAHARA_MEM_DEBUG_CMD		0x9  /* Min protocol version 2.0 */</div><div class='add'>+#define SAHARA_MEM_READ_CMD		0xa  /* Min protocol version 2.0 */</div><div class='add'>+#define SAHARA_CMD_READY_CMD		0xb  /* Min protocol version 2.1 */</div><div class='add'>+#define SAHARA_SWITCH_MODE_CMD		0xc  /* Min protocol version 2.1 */</div><div class='add'>+#define SAHARA_EXECUTE_CMD		0xd  /* Min protocol version 2.1 */</div><div class='add'>+#define SAHARA_EXECUTE_RESP_CMD		0xe  /* Min protocol version 2.1 */</div><div class='add'>+#define SAHARA_EXECUTE_DATA_CMD		0xf  /* Min protocol version 2.1 */</div><div class='add'>+#define SAHARA_MEM_DEBUG64_CMD		0x10 /* Min protocol version 2.5 */</div><div class='add'>+#define SAHARA_MEM_READ64_CMD		0x11 /* Min protocol version 2.5 */</div><div class='add'>+#define SAHARA_READ_DATA64_CMD		0x12 /* Min protocol version 2.8 */</div><div class='add'>+#define SAHARA_RESET_STATE_CMD		0x13 /* Min protocol version 2.9 */</div><div class='add'>+#define SAHARA_WRITE_DATA_CMD		0x14 /* Min protocol version 3.0 */</div><div class='add'>+</div><div class='add'>+#define SAHARA_PACKET_MAX_SIZE		0xffffU /* MHI_MAX_MTU */</div><div class='add'>+#define SAHARA_TRANSFER_MAX_SIZE	0x80000</div><div class='add'>+#define SAHARA_NUM_TX_BUF		DIV_ROUND_UP(SAHARA_TRANSFER_MAX_SIZE,\</div><div class='add'>+							SAHARA_PACKET_MAX_SIZE)</div><div class='add'>+#define SAHARA_IMAGE_ID_NONE		U32_MAX</div><div class='add'>+</div><div class='add'>+#define SAHARA_VERSION			2</div><div class='add'>+#define SAHARA_SUCCESS			0</div><div class='add'>+</div><div class='add'>+#define SAHARA_MODE_IMAGE_TX_PENDING	0x0</div><div class='add'>+#define SAHARA_MODE_IMAGE_TX_COMPLETE	0x1</div><div class='add'>+#define SAHARA_MODE_MEMORY_DEBUG	0x2</div><div class='add'>+#define SAHARA_MODE_COMMAND		0x3</div><div class='add'>+</div><div class='add'>+#define SAHARA_HELLO_LENGTH		0x30</div><div class='add'>+#define SAHARA_READ_DATA_LENGTH		0x14</div><div class='add'>+#define SAHARA_END_OF_IMAGE_LENGTH	0x10</div><div class='add'>+#define SAHARA_DONE_LENGTH		0x8</div><div class='add'>+#define SAHARA_RESET_LENGTH		0x8</div><div class='add'>+</div><div class='add'>+struct sahara_packet {</div><div class='add'>+	__le32 cmd;</div><div class='add'>+	__le32 length;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			__le32 version;</div><div class='add'>+			__le32 version_compat;</div><div class='add'>+			__le32 max_length;</div><div class='add'>+			__le32 mode;</div><div class='add'>+		} hello;</div><div class='add'>+		struct {</div><div class='add'>+			__le32 version;</div><div class='add'>+			__le32 version_compat;</div><div class='add'>+			__le32 status;</div><div class='add'>+			__le32 mode;</div><div class='add'>+		} hello_resp;</div><div class='add'>+		struct {</div><div class='add'>+			__le32 image;</div><div class='add'>+			__le32 offset;</div><div class='add'>+			__le32 length;</div><div class='add'>+		} read_data;</div><div class='add'>+		struct {</div><div class='add'>+			__le32 image;</div><div class='add'>+			__le32 status;</div><div class='add'>+		} end_of_image;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sahara_context {</div><div class='add'>+	struct sahara_packet		*tx[SAHARA_NUM_TX_BUF];</div><div class='add'>+	struct sahara_packet		*rx;</div><div class='add'>+	struct work_struct		work;</div><div class='add'>+	struct mhi_device		*mhi_dev;</div><div class='add'>+	const char			**image_table;</div><div class='add'>+	u32				table_size;</div><div class='add'>+	u32				active_image_id;</div><div class='add'>+	const struct firmware		*firmware;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *aic100_image_table[] = {</div><div class='add'>+	[1]  = "qcom/aic100/fw1.bin",</div><div class='add'>+	[2]  = "qcom/aic100/fw2.bin",</div><div class='add'>+	[4]  = "qcom/aic100/fw4.bin",</div><div class='add'>+	[5]  = "qcom/aic100/fw5.bin",</div><div class='add'>+	[6]  = "qcom/aic100/fw6.bin",</div><div class='add'>+	[8]  = "qcom/aic100/fw8.bin",</div><div class='add'>+	[9]  = "qcom/aic100/fw9.bin",</div><div class='add'>+	[10] = "qcom/aic100/fw10.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sahara_find_image(struct sahara_context *context, u32 image_id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (image_id == context-&gt;active_image_id)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (context-&gt;active_image_id != SAHARA_IMAGE_ID_NONE) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "image id %d is not valid as %d is active\n",</div><div class='add'>+			image_id, context-&gt;active_image_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (image_id &gt;= context-&gt;table_size || !context-&gt;image_table[image_id]) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "request for unknown image: %d\n", image_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This image might be optional. The device may continue without it.</div><div class='add'>+	 * Only the device knows. Suppress error messages that could suggest an</div><div class='add'>+	 * a problem when we were actually able to continue.</div><div class='add'>+	 */</div><div class='add'>+	ret = firmware_request_nowarn(&amp;context-&gt;firmware,</div><div class='add'>+				      context-&gt;image_table[image_id],</div><div class='add'>+				      &amp;context-&gt;mhi_dev-&gt;dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(&amp;context-&gt;mhi_dev-&gt;dev, "request for image id %d / file %s failed %d\n",</div><div class='add'>+			image_id, context-&gt;image_table[image_id], ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context-&gt;active_image_id = image_id;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_release_image(struct sahara_context *context)</div><div class='add'>+{</div><div class='add'>+	if (context-&gt;active_image_id != SAHARA_IMAGE_ID_NONE)</div><div class='add'>+		release_firmware(context-&gt;firmware);</div><div class='add'>+	context-&gt;active_image_id = SAHARA_IMAGE_ID_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_send_reset(struct sahara_context *context)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	context-&gt;tx[0]-&gt;cmd = cpu_to_le32(SAHARA_RESET_CMD);</div><div class='add'>+	context-&gt;tx[0]-&gt;length = cpu_to_le32(SAHARA_RESET_LENGTH);</div><div class='add'>+</div><div class='add'>+	ret = mhi_queue_buf(context-&gt;mhi_dev, DMA_TO_DEVICE, context-&gt;tx[0],</div><div class='add'>+			    SAHARA_RESET_LENGTH, MHI_EOT);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unable to send reset response %d\n", ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_hello(struct sahara_context *context)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;context-&gt;mhi_dev-&gt;dev,</div><div class='add'>+		"HELLO cmd received. length:%d version:%d version_compat:%d max_length:%d mode:%d\n",</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;length),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;hello.version),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;hello.version_compat),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;hello.max_length),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;hello.mode));</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(context-&gt;rx-&gt;length) != SAHARA_HELLO_LENGTH) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed hello packet - length %d\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;length));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (le32_to_cpu(context-&gt;rx-&gt;hello.version) != SAHARA_VERSION) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unsupported hello packet - version %d\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;hello.version));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(context-&gt;rx-&gt;hello.mode) != SAHARA_MODE_IMAGE_TX_PENDING &amp;&amp;</div><div class='add'>+	    le32_to_cpu(context-&gt;rx-&gt;hello.mode) != SAHARA_MODE_IMAGE_TX_COMPLETE) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unsupported hello packet - mode %d\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;hello.mode));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context-&gt;tx[0]-&gt;cmd = cpu_to_le32(SAHARA_HELLO_RESP_CMD);</div><div class='add'>+	context-&gt;tx[0]-&gt;length = cpu_to_le32(SAHARA_HELLO_LENGTH);</div><div class='add'>+	context-&gt;tx[0]-&gt;hello_resp.version = cpu_to_le32(SAHARA_VERSION);</div><div class='add'>+	context-&gt;tx[0]-&gt;hello_resp.version_compat = cpu_to_le32(SAHARA_VERSION);</div><div class='add'>+	context-&gt;tx[0]-&gt;hello_resp.status = cpu_to_le32(SAHARA_SUCCESS);</div><div class='add'>+	context-&gt;tx[0]-&gt;hello_resp.mode = context-&gt;rx-&gt;hello_resp.mode;</div><div class='add'>+</div><div class='add'>+	ret = mhi_queue_buf(context-&gt;mhi_dev, DMA_TO_DEVICE, context-&gt;tx[0],</div><div class='add'>+			    SAHARA_HELLO_LENGTH, MHI_EOT);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unable to send hello response %d\n", ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_read_data(struct sahara_context *context)</div><div class='add'>+{</div><div class='add'>+	u32 image_id, data_offset, data_len, pkt_data_len;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;context-&gt;mhi_dev-&gt;dev,</div><div class='add'>+		"READ_DATA cmd received. length:%d image:%d offset:%d data_length:%d\n",</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;length),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;read_data.image),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;read_data.offset),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;read_data.length));</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(context-&gt;rx-&gt;length) != SAHARA_READ_DATA_LENGTH) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed read_data packet - length %d\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;length));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	image_id = le32_to_cpu(context-&gt;rx-&gt;read_data.image);</div><div class='add'>+	data_offset = le32_to_cpu(context-&gt;rx-&gt;read_data.offset);</div><div class='add'>+	data_len = le32_to_cpu(context-&gt;rx-&gt;read_data.length);</div><div class='add'>+</div><div class='add'>+	ret = sahara_find_image(context, image_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		sahara_send_reset(context);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Image is released when the device is done with it via</div><div class='add'>+	 * SAHARA_END_OF_IMAGE_CMD. sahara_send_reset() will either cause the</div><div class='add'>+	 * device to retry the operation with a modification, or decide to be</div><div class='add'>+	 * done with the image and trigger SAHARA_END_OF_IMAGE_CMD.</div><div class='add'>+	 * release_image() is called from SAHARA_END_OF_IMAGE_CMD. processing</div><div class='add'>+	 * and is not needed here on error.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (data_len &gt; SAHARA_TRANSFER_MAX_SIZE) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed read_data packet - data len %d exceeds max xfer size %d\n",</div><div class='add'>+			data_len, SAHARA_TRANSFER_MAX_SIZE);</div><div class='add'>+		sahara_send_reset(context);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data_offset &gt;= context-&gt;firmware-&gt;size) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed read_data packet - data offset %d exceeds file size %zu\n",</div><div class='add'>+			data_offset, context-&gt;firmware-&gt;size);</div><div class='add'>+		sahara_send_reset(context);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size_add(data_offset, data_len) &gt; context-&gt;firmware-&gt;size) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed read_data packet - data offset %d and length %d exceeds file size %zu\n",</div><div class='add'>+			data_offset, data_len, context-&gt;firmware-&gt;size);</div><div class='add'>+		sahara_send_reset(context);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SAHARA_NUM_TX_BUF &amp;&amp; data_len; ++i) {</div><div class='add'>+		pkt_data_len = min(data_len, SAHARA_PACKET_MAX_SIZE);</div><div class='add'>+</div><div class='add'>+		memcpy(context-&gt;tx[i], &amp;context-&gt;firmware-&gt;data[data_offset], pkt_data_len);</div><div class='add'>+</div><div class='add'>+		data_offset += pkt_data_len;</div><div class='add'>+		data_len -= pkt_data_len;</div><div class='add'>+</div><div class='add'>+		ret = mhi_queue_buf(context-&gt;mhi_dev, DMA_TO_DEVICE,</div><div class='add'>+				    context-&gt;tx[i], pkt_data_len,</div><div class='add'>+				    !data_len ? MHI_EOT : MHI_CHAIN);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unable to send read_data response %d\n",</div><div class='add'>+				ret);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_end_of_image(struct sahara_context *context)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;context-&gt;mhi_dev-&gt;dev,</div><div class='add'>+		"END_OF_IMAGE cmd received. length:%d image:%d status:%d\n",</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;length),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;end_of_image.image),</div><div class='add'>+		le32_to_cpu(context-&gt;rx-&gt;end_of_image.status));</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(context-&gt;rx-&gt;length) != SAHARA_END_OF_IMAGE_LENGTH) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed end_of_image packet - length %d\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;length));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (context-&gt;active_image_id != SAHARA_IMAGE_ID_NONE &amp;&amp;</div><div class='add'>+	    le32_to_cpu(context-&gt;rx-&gt;end_of_image.image) != context-&gt;active_image_id) {</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Malformed end_of_image packet - image %d is not the active image\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;end_of_image.image));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sahara_release_image(context);</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(context-&gt;rx-&gt;end_of_image.status))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	context-&gt;tx[0]-&gt;cmd = cpu_to_le32(SAHARA_DONE_CMD);</div><div class='add'>+	context-&gt;tx[0]-&gt;length = cpu_to_le32(SAHARA_DONE_LENGTH);</div><div class='add'>+</div><div class='add'>+	ret = mhi_queue_buf(context-&gt;mhi_dev, DMA_TO_DEVICE, context-&gt;tx[0],</div><div class='add'>+			    SAHARA_DONE_LENGTH, MHI_EOT);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_dbg(&amp;context-&gt;mhi_dev-&gt;dev, "Unable to send done response %d\n", ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_processing(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct sahara_context *context = container_of(work, struct sahara_context, work);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (le32_to_cpu(context-&gt;rx-&gt;cmd)) {</div><div class='add'>+	case SAHARA_HELLO_CMD:</div><div class='add'>+		sahara_hello(context);</div><div class='add'>+		break;</div><div class='add'>+	case SAHARA_READ_DATA_CMD:</div><div class='add'>+		sahara_read_data(context);</div><div class='add'>+		break;</div><div class='add'>+	case SAHARA_END_OF_IMAGE_CMD:</div><div class='add'>+		sahara_end_of_image(context);</div><div class='add'>+		break;</div><div class='add'>+	case SAHARA_DONE_RESP_CMD:</div><div class='add'>+		/* Intentional do nothing as we don't need to exit an app */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unknown command %d\n",</div><div class='add'>+			le32_to_cpu(context-&gt;rx-&gt;cmd));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mhi_queue_buf(context-&gt;mhi_dev, DMA_FROM_DEVICE, context-&gt;rx,</div><div class='add'>+			    SAHARA_PACKET_MAX_SIZE, MHI_EOT);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;context-&gt;mhi_dev-&gt;dev, "Unable to requeue rx buf %d\n", ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sahara_mhi_probe(struct mhi_device *mhi_dev, const struct mhi_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct sahara_context *context;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	context = devm_kzalloc(&amp;mhi_dev-&gt;dev, sizeof(*context), GFP_KERNEL);</div><div class='add'>+	if (!context)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	context-&gt;rx = devm_kzalloc(&amp;mhi_dev-&gt;dev, SAHARA_PACKET_MAX_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!context-&gt;rx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * AIC100 defines SAHARA_TRANSFER_MAX_SIZE as the largest value it</div><div class='add'>+	 * will request for READ_DATA. This is larger than</div><div class='add'>+	 * SAHARA_PACKET_MAX_SIZE, and we need 9x SAHARA_PACKET_MAX_SIZE to</div><div class='add'>+	 * cover SAHARA_TRANSFER_MAX_SIZE. When the remote side issues a</div><div class='add'>+	 * READ_DATA, it requires a transfer of the exact size requested. We</div><div class='add'>+	 * can use MHI_CHAIN to link multiple buffers into a single transfer</div><div class='add'>+	 * but the remote side will not consume the buffers until it sees an</div><div class='add'>+	 * EOT, thus we need to allocate enough buffers to put in the tx fifo</div><div class='add'>+	 * to cover an entire READ_DATA request of the max size.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; SAHARA_NUM_TX_BUF; ++i) {</div><div class='add'>+		context-&gt;tx[i] = devm_kzalloc(&amp;mhi_dev-&gt;dev, SAHARA_PACKET_MAX_SIZE, GFP_KERNEL);</div><div class='add'>+		if (!context-&gt;tx[i])</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context-&gt;mhi_dev = mhi_dev;</div><div class='add'>+	INIT_WORK(&amp;context-&gt;work, sahara_processing);</div><div class='add'>+	context-&gt;image_table = aic100_image_table;</div><div class='add'>+	context-&gt;table_size = ARRAY_SIZE(aic100_image_table);</div><div class='add'>+	context-&gt;active_image_id = SAHARA_IMAGE_ID_NONE;</div><div class='add'>+	dev_set_drvdata(&amp;mhi_dev-&gt;dev, context);</div><div class='add'>+</div><div class='add'>+	ret = mhi_prepare_for_transfer(mhi_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mhi_queue_buf(mhi_dev, DMA_FROM_DEVICE, context-&gt;rx, SAHARA_PACKET_MAX_SIZE, MHI_EOT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mhi_unprepare_from_transfer(mhi_dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_mhi_remove(struct mhi_device *mhi_dev)</div><div class='add'>+{</div><div class='add'>+	struct sahara_context *context = dev_get_drvdata(&amp;mhi_dev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;context-&gt;work);</div><div class='add'>+	sahara_release_image(context);</div><div class='add'>+	mhi_unprepare_from_transfer(mhi_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_mhi_ul_xfer_cb(struct mhi_device *mhi_dev, struct mhi_result *mhi_result)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sahara_mhi_dl_xfer_cb(struct mhi_device *mhi_dev, struct mhi_result *mhi_result)</div><div class='add'>+{</div><div class='add'>+	struct sahara_context *context = dev_get_drvdata(&amp;mhi_dev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!mhi_result-&gt;transaction_status)</div><div class='add'>+		schedule_work(&amp;context-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mhi_device_id sahara_mhi_match_table[] = {</div><div class='add'>+	{ .chan = "QAIC_SAHARA", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mhi_driver sahara_mhi_driver = {</div><div class='add'>+	.id_table = sahara_mhi_match_table,</div><div class='add'>+	.remove = sahara_mhi_remove,</div><div class='add'>+	.probe = sahara_mhi_probe,</div><div class='add'>+	.ul_xfer_cb = sahara_mhi_ul_xfer_cb,</div><div class='add'>+	.dl_xfer_cb = sahara_mhi_dl_xfer_cb,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "sahara",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int sahara_register(void)</div><div class='add'>+{</div><div class='add'>+	return mhi_driver_register(&amp;sahara_mhi_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sahara_unregister(void)</div><div class='add'>+{</div><div class='add'>+	mhi_driver_unregister(&amp;sahara_mhi_driver);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/accel/qaic/sahara.h b/drivers/accel/qaic/sahara.h<br/>new file mode 100644<br/>index 000000000000..640208acc0d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/sahara.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/accel/qaic/sahara.h</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+</div><div class='add'>+/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef __SAHARA_H__</div><div class='add'>+#define __SAHARA_H__</div><div class='add'>+</div><div class='add'>+int sahara_register(void);</div><div class='add'>+void sahara_unregister(void);</div><div class='add'>+#endif /* __SAHARA_H__ */</div><div class='head'>diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig<br/>index ff1689bb3124..e3a7c2aedd5f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/Kconfig</a></div><div class='hunk'>@@ -469,6 +469,9 @@ config ACPI_REDUCED_HARDWARE_ONLY</div><div class='ctx'> </div><div class='ctx'> 	  If you are unsure what to do, do not enable this option.</div><div class='ctx'> </div><div class='add'>+config ACPI_NHLT</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> source "drivers/acpi/nfit/Kconfig"</div><div class='ctx'> source "drivers/acpi/numa/Kconfig"</div><div class='ctx'> source "drivers/acpi/apei/Kconfig"</div><div class='head'>diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile<br/>index 8cc8c0d9c873..39ea5cfa8326 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/Makefile</a></div><div class='hunk'>@@ -14,7 +14,6 @@ tables.o: $(src)/../../include/$(CONFIG_ACPI_CUSTOM_DSDT_FILE) ;</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ACPI)		+= tables.o</div><div class='del'>-obj-$(CONFIG_X86)		+= blacklist.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # ACPI Core Subsystem (Interpreter)</div><div class='hunk'>@@ -46,7 +45,6 @@ acpi-y				+= ec.o</div><div class='ctx'> acpi-$(CONFIG_ACPI_DOCK)	+= dock.o</div><div class='ctx'> acpi-$(CONFIG_PCI)		+= pci_root.o pci_link.o pci_irq.o</div><div class='ctx'> obj-$(CONFIG_ACPI_MCFG)		+= pci_mcfg.o</div><div class='del'>-acpi-$(CONFIG_PCI)		+= acpi_lpss.o</div><div class='ctx'> acpi-y				+= acpi_apd.o</div><div class='ctx'> acpi-y				+= acpi_platform.o</div><div class='ctx'> acpi-y				+= acpi_pnp.o</div><div class='hunk'>@@ -55,10 +53,6 @@ acpi-y				+= event.o</div><div class='ctx'> acpi-y				+= evged.o</div><div class='ctx'> acpi-y				+= sysfs.o</div><div class='ctx'> acpi-y				+= property.o</div><div class='del'>-acpi-$(CONFIG_X86)		+= acpi_cmos_rtc.o</div><div class='del'>-acpi-$(CONFIG_X86)		+= x86/apple.o</div><div class='del'>-acpi-$(CONFIG_X86)		+= x86/utils.o</div><div class='del'>-acpi-$(CONFIG_X86)		+= x86/s2idle.o</div><div class='ctx'> acpi-$(CONFIG_DEBUG_FS)		+= debugfs.o</div><div class='ctx'> acpi-y				+= acpi_lpat.o</div><div class='ctx'> acpi-$(CONFIG_ACPI_FPDT)	+= acpi_fpdt.o</div><div class='hunk'>@@ -93,6 +87,7 @@ obj-$(CONFIG_ACPI_THERMAL_LIB)	+= thermal_lib.o</div><div class='ctx'> obj-$(CONFIG_ACPI_THERMAL)	+= thermal.o</div><div class='ctx'> obj-$(CONFIG_ACPI_PLATFORM_PROFILE) 	+= platform_profile.o</div><div class='ctx'> obj-$(CONFIG_ACPI_NFIT)		+= nfit/</div><div class='add'>+obj-$(CONFIG_ACPI_NHLT)		+= nhlt.o</div><div class='ctx'> obj-$(CONFIG_ACPI_NUMA)		+= numa/</div><div class='ctx'> obj-$(CONFIG_ACPI)		+= acpi_memhotplug.o</div><div class='ctx'> obj-$(CONFIG_ACPI_HOTPLUG_IOAPIC) += ioapic.o</div><div class='hunk'>@@ -132,3 +127,4 @@ obj-$(CONFIG_ARM64)		+= arm64/</div><div class='ctx'> obj-$(CONFIG_ACPI_VIOT)		+= viot.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_RISCV)		+= riscv/</div><div class='add'>+obj-$(CONFIG_X86)		+= x86/</div><div class='head'>diff --git a/drivers/acpi/acpi_ipmi.c b/drivers/acpi/acpi_ipmi.c<br/>index 0555f68c2dfd..5fba4dab5d08 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_ipmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpi_ipmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_ipmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpi_ipmi.c</a></div><div class='hunk'>@@ -22,6 +22,8 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> /* the IPMI timeout is 5s */</div><div class='ctx'> #define IPMI_TIMEOUT			(5000)</div><div class='ctx'> #define ACPI_IPMI_MAX_MSG_LENGTH	64</div><div class='add'>+/* 2s should be suffient for SMI being selected */</div><div class='add'>+#define ACPI_IPMI_SMI_SELECTION_TIMEOUT	(2 * HZ)</div><div class='ctx'> </div><div class='ctx'> struct acpi_ipmi_device {</div><div class='ctx'> 	/* the device list attached to driver_data.ipmi_devices */</div><div class='hunk'>@@ -54,6 +56,7 @@ struct ipmi_driver_data {</div><div class='ctx'> 	 * to this selected global IPMI system interface.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct acpi_ipmi_device *selected_smi;</div><div class='add'>+	struct completion smi_selection_done;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_ipmi_msg {</div><div class='hunk'>@@ -463,8 +466,10 @@ static void ipmi_register_bmc(int iface, struct device *dev)</div><div class='ctx'> 		if (temp-&gt;handle == handle)</div><div class='ctx'> 			goto err_lock;</div><div class='ctx'> 	}</div><div class='del'>-	if (!driver_data.selected_smi)</div><div class='add'>+	if (!driver_data.selected_smi) {</div><div class='ctx'> 		driver_data.selected_smi = ipmi_device;</div><div class='add'>+		complete(&amp;driver_data.smi_selection_done);</div><div class='add'>+	}</div><div class='ctx'> 	list_add_tail(&amp;ipmi_device-&gt;head, &amp;driver_data.ipmi_devices);</div><div class='ctx'> 	mutex_unlock(&amp;driver_data.ipmi_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -578,6 +583,20 @@ out_msg:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int acpi_wait_for_acpi_ipmi(void)</div><div class='add'>+{</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_interruptible_timeout(&amp;driver_data.smi_selection_done,</div><div class='add'>+							ACPI_IPMI_SMI_SELECTION_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_wait_for_acpi_ipmi);</div><div class='add'>+</div><div class='ctx'> static int __init acpi_ipmi_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int result;</div><div class='hunk'>@@ -586,6 +605,8 @@ static int __init acpi_ipmi_init(void)</div><div class='ctx'> 	if (acpi_disabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	init_completion(&amp;driver_data.smi_selection_done);</div><div class='add'>+</div><div class='ctx'> 	status = acpi_install_address_space_handler(ACPI_ROOT_OBJECT,</div><div class='ctx'> 						    ACPI_ADR_SPACE_IPMI,</div><div class='ctx'> 						    &amp;acpi_ipmi_space_handler,</div><div class='head'>diff --git a/drivers/acpi/acpica/Makefile b/drivers/acpi/acpica/Makefile<br/>index 30f3fc13c29d..8d18af396de9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/Makefile</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> ccflags-y			:= -D_LINUX -DBUILDING_ACPICA</div><div class='ctx'> ccflags-$(CONFIG_ACPI_DEBUG)	+= -DACPI_DEBUG_OUTPUT</div><div class='add'>+CFLAGS_tbfind.o 		+= $(call cc-disable-warning, stringop-truncation)</div><div class='ctx'> </div><div class='ctx'> # use acpi.o to put all files here into acpi.o modparam namespace</div><div class='ctx'> obj-y	+= acpi.o</div><div class='head'>diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h<br/>index 82563b44af35..02012168a087 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/aclocal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/aclocal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/aclocal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/aclocal.h</a></div><div class='hunk'>@@ -547,7 +547,7 @@ struct acpi_field_info {</div><div class='ctx'> </div><div class='ctx'> struct acpi_ged_handler_info {</div><div class='ctx'> 	struct acpi_ged_handler_info *next;</div><div class='del'>-	u32 int_id;		/* The interrupt ID that triggers the execution ofthe evt_method. */</div><div class='add'>+	u32 int_id;		/* The interrupt ID that triggers the execution of the evt_method. */</div><div class='ctx'> 	struct acpi_namespace_node *evt_method;	/* The _EVT method to be executed when an interrupt with ID = int_ID is received */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h<br/>index 1bdfeee5d7c5..8fc02946d3cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acobject.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/acobject.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acobject.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/acobject.h</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 	u8                              descriptor_type;    /* To differentiate various internal objs */\</div><div class='ctx'> 	u8                              type;               /* acpi_object_type */\</div><div class='ctx'> 	u16                             reference_count;    /* For object deletion management */\</div><div class='del'>-	u8                              flags;</div><div class='add'>+	u8                              flags</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note: There are 3 bytes available here before the</div><div class='ctx'> 	 * next natural alignment boundary (for both 32/64 cases)</div><div class='hunk'>@@ -71,10 +71,12 @@</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_common {</div><div class='del'>-ACPI_OBJECT_COMMON_HEADER};</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_integer {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER u8 fill[3];	/* Prevent warning on some compilers */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	u8 fill[3];		/* Prevent warning on some compilers */</div><div class='ctx'> 	u64 value;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -86,23 +88,26 @@ struct acpi_object_integer {</div><div class='ctx'>  */</div><div class='ctx'> #define ACPI_COMMON_BUFFER_INFO(_type) \</div><div class='ctx'> 	_type                           *pointer; \</div><div class='del'>-	u32                             length;</div><div class='add'>+	u32                             length</div><div class='ctx'> </div><div class='ctx'> /* Null terminated, ASCII characters only */</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_string {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_BUFFER_INFO(char)	/* String in AML stream or allocated string */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_BUFFER_INFO(char);	/* String in AML stream or allocated string */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_buffer {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_BUFFER_INFO(u8)	/* Buffer in AML stream or allocated buffer */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_BUFFER_INFO(u8);	/* Buffer in AML stream or allocated buffer */</div><div class='ctx'> 	u32 aml_length;</div><div class='ctx'> 	u8 *aml_start;</div><div class='ctx'> 	struct acpi_namespace_node *node;	/* Link back to parent node */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_package {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER struct acpi_namespace_node *node;	/* Link back to parent node */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	struct acpi_namespace_node *node;	/* Link back to parent node */</div><div class='ctx'> 	union acpi_operand_object **elements;	/* Array of pointers to acpi_objects */</div><div class='ctx'> 	u8 *aml_start;</div><div class='ctx'> 	u32 aml_length;</div><div class='hunk'>@@ -116,11 +121,13 @@ struct acpi_object_package {</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_event {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER acpi_semaphore os_semaphore;	/* Actual OS synchronization object */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	acpi_semaphore os_semaphore;	/* Actual OS synchronization object */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_mutex {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER u8 sync_level;	/* 0-15, specified in Mutex() call */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	u8 sync_level;		/* 0-15, specified in Mutex() call */</div><div class='ctx'> 	u16 acquisition_depth;	/* Allow multiple Acquires, same thread */</div><div class='ctx'> 	acpi_mutex os_mutex;	/* Actual OS synchronization object */</div><div class='ctx'> 	acpi_thread_id thread_id;	/* Current owner of the mutex */</div><div class='hunk'>@@ -132,7 +139,8 @@ struct acpi_object_mutex {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_region {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER u8 space_id;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	u8 space_id;</div><div class='ctx'> 	struct acpi_namespace_node *node;	/* Containing namespace node */</div><div class='ctx'> 	union acpi_operand_object *handler;	/* Handler for region access */</div><div class='ctx'> 	union acpi_operand_object *next;</div><div class='hunk'>@@ -142,7 +150,8 @@ struct acpi_object_region {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_method {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER u8 info_flags;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	u8 info_flags;</div><div class='ctx'> 	u8 param_count;</div><div class='ctx'> 	u8 sync_level;</div><div class='ctx'> 	union acpi_operand_object *mutex;</div><div class='hunk'>@@ -178,33 +187,43 @@ struct acpi_object_method {</div><div class='ctx'>  */</div><div class='ctx'> #define ACPI_COMMON_NOTIFY_INFO \</div><div class='ctx'> 	union acpi_operand_object       *notify_list[2];    /* Handlers for system/device notifies */\</div><div class='del'>-	union acpi_operand_object       *handler;	/* Handler for Address space */</div><div class='add'>+	union acpi_operand_object       *handler	/* Handler for Address space */</div><div class='ctx'> </div><div class='ctx'> /* COMMON NOTIFY for POWER, PROCESSOR, DEVICE, and THERMAL */</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_notify_common {</div><div class='del'>-ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO};</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_NOTIFY_INFO;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_device {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER</div><div class='del'>-	    ACPI_COMMON_NOTIFY_INFO struct acpi_gpe_block_info *gpe_block;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_NOTIFY_INFO;</div><div class='add'>+	struct acpi_gpe_block_info *gpe_block;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_power_resource {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO u32 system_level;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_NOTIFY_INFO;</div><div class='add'>+	u32 system_level;</div><div class='ctx'> 	u32 resource_order;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_processor {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER</div><div class='del'>-	    /* The next two fields take advantage of the 3-byte space before NOTIFY_INFO */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+</div><div class='add'>+	/* The next two fields take advantage of the 3-byte space before NOTIFY_INFO */</div><div class='add'>+</div><div class='ctx'> 	u8 proc_id;</div><div class='ctx'> 	u8 length;</div><div class='del'>-	ACPI_COMMON_NOTIFY_INFO acpi_io_address address;</div><div class='add'>+	ACPI_COMMON_NOTIFY_INFO;</div><div class='add'>+	acpi_io_address address;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_thermal_zone {</div><div class='del'>-ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO};</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_NOTIFY_INFO;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='hunk'>@@ -226,17 +245,21 @@ ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO};</div><div class='ctx'> 	u32                             base_byte_offset;   /* Byte offset within containing object */\</div><div class='ctx'> 	u32                             value;              /* Value to store into the Bank or Index register */\</div><div class='ctx'> 	u8                              start_field_bit_offset;/* Bit offset within first field datum (0-63) */\</div><div class='del'>-	u8                              access_length;	/* For serial regions/fields */</div><div class='add'>+	u8                              access_length	/* For serial regions/fields */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* COMMON FIELD (for BUFFER, REGION, BANK, and INDEX fields) */</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_field_common {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO union acpi_operand_object *region_obj;	/* Parent Operation Region object (REGION/BANK fields only) */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_FIELD_INFO;</div><div class='add'>+	union acpi_operand_object *region_obj;	/* Parent Operation Region object (REGION/BANK fields only) */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_region_field {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO u16 resource_length;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_FIELD_INFO;</div><div class='add'>+	u16 resource_length;</div><div class='ctx'> 	union acpi_operand_object *region_obj;	/* Containing op_region object */</div><div class='ctx'> 	u8 *resource_buffer;	/* resource_template for serial regions/fields */</div><div class='ctx'> 	u16 pin_number_index;	/* Index relative to previous Connection/Template */</div><div class='hunk'>@@ -244,16 +267,20 @@ struct acpi_object_region_field {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_bank_field {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO union acpi_operand_object *region_obj;	/* Containing op_region object */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_FIELD_INFO;</div><div class='add'>+	union acpi_operand_object *region_obj;	/* Containing op_region object */</div><div class='ctx'> 	union acpi_operand_object *bank_obj;	/* bank_select Register object */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_index_field {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO</div><div class='del'>-	    /*</div><div class='del'>-	     * No "RegionObj" pointer needed since the Index and Data registers</div><div class='del'>-	     * are each field definitions unto themselves.</div><div class='del'>-	     */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_FIELD_INFO;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * No "RegionObj" pointer needed since the Index and Data registers</div><div class='add'>+	 * are each field definitions unto themselves.</div><div class='add'>+	 */</div><div class='ctx'> 	union acpi_operand_object *index_obj;	/* Index register */</div><div class='ctx'> 	union acpi_operand_object *data_obj;	/* Data register */</div><div class='ctx'> };</div><div class='hunk'>@@ -261,7 +288,9 @@ struct acpi_object_index_field {</div><div class='ctx'> /* The buffer_field is different in that it is part of a Buffer, not an op_region */</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_buffer_field {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO u8 is_create_field;	/* Special case for objects created by create_field() */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	ACPI_COMMON_FIELD_INFO;</div><div class='add'>+	u8 is_create_field;	/* Special case for objects created by create_field() */</div><div class='ctx'> 	union acpi_operand_object *buffer_obj;	/* Containing Buffer object */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +301,8 @@ struct acpi_object_buffer_field {</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_notify_handler {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER struct acpi_namespace_node *node;	/* Parent device */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	struct acpi_namespace_node *node;	/* Parent device */</div><div class='ctx'> 	u32 handler_type;	/* Type: Device/System/Both */</div><div class='ctx'> 	acpi_notify_handler handler;	/* Handler address */</div><div class='ctx'> 	void *context;</div><div class='hunk'>@@ -280,7 +310,8 @@ struct acpi_object_notify_handler {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_addr_handler {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER u8 space_id;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	u8 space_id;</div><div class='ctx'> 	u8 handler_flags;</div><div class='ctx'> 	acpi_adr_space_handler handler;</div><div class='ctx'> 	struct acpi_namespace_node *node;	/* Parent device */</div><div class='hunk'>@@ -307,7 +338,8 @@ struct acpi_object_addr_handler {</div><div class='ctx'>  * The Reference.Class differentiates these types.</div><div class='ctx'>  */</div><div class='ctx'> struct acpi_object_reference {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER u8 class;	/* Reference Class */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	u8 class;		/* Reference Class */</div><div class='ctx'> 	u8 target_type;		/* Used for Index Op */</div><div class='ctx'> 	u8 resolved;		/* Reference has been resolved to a value */</div><div class='ctx'> 	void *object;		/* name_op=&gt;HANDLE to obj, index_op=&gt;union acpi_operand_object */</div><div class='hunk'>@@ -340,7 +372,8 @@ typedef enum {</div><div class='ctx'>  * Currently: Region and field_unit types</div><div class='ctx'>  */</div><div class='ctx'> struct acpi_object_extra {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER struct acpi_namespace_node *method_REG;	/* _REG method for this region (if any) */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	struct acpi_namespace_node *method_REG;	/* _REG method for this region (if any) */</div><div class='ctx'> 	struct acpi_namespace_node *scope_node;</div><div class='ctx'> 	void *region_context;	/* Region-specific data */</div><div class='ctx'> 	u8 *aml_start;</div><div class='hunk'>@@ -350,14 +383,16 @@ struct acpi_object_extra {</div><div class='ctx'> /* Additional data that can be attached to namespace nodes */</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_data {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER acpi_object_handler handler;</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	acpi_object_handler handler;</div><div class='ctx'> 	void *pointer;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Structure used when objects are cached for reuse */</div><div class='ctx'> </div><div class='ctx'> struct acpi_object_cache_list {</div><div class='del'>-	ACPI_OBJECT_COMMON_HEADER union acpi_operand_object *next;	/* Link for object cache and internal lists */</div><div class='add'>+	ACPI_OBJECT_COMMON_HEADER;</div><div class='add'>+	union acpi_operand_object *next;	/* Link for object cache and internal lists */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='head'>diff --git a/drivers/acpi/acpica/evgpeinit.c b/drivers/acpi/acpica/evgpeinit.c<br/>index 0dbc4d88919a..38f408cf13ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeinit.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/evgpeinit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeinit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/evgpeinit.c</a></div><div class='hunk'>@@ -413,6 +413,7 @@ acpi_ev_match_gpe_method(acpi_handle obj_handle,</div><div class='ctx'> 	gpe_event_info-&gt;flags &amp;= ~(ACPI_GPE_DISPATCH_MASK);</div><div class='ctx'> 	gpe_event_info-&gt;flags |= (u8)(type | ACPI_GPE_DISPATCH_METHOD);</div><div class='ctx'> 	gpe_event_info-&gt;dispatch.method_node = method_node;</div><div class='add'>+	walk_info-&gt;count++;</div><div class='ctx'> </div><div class='ctx'> 	ACPI_DEBUG_PRINT((ACPI_DB_LOAD,</div><div class='ctx'> 			  "Registered GPE method %s as GPE number 0x%.2X\n",</div><div class='head'>diff --git a/drivers/acpi/acpica/tbfadt.c b/drivers/acpi/acpica/tbfadt.c<br/>index 44267a92bce5..3c126c6d306b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbfadt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/tbfadt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbfadt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/tbfadt.c</a></div><div class='hunk'>@@ -315,23 +315,19 @@ void acpi_tb_parse_fadt(void)</div><div class='ctx'> 				       ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL,</div><div class='ctx'> 				       NULL, FALSE, TRUE, &amp;acpi_gbl_dsdt_index);</div><div class='ctx'> </div><div class='del'>-	/* If Hardware Reduced flag is set, there is no FACS */</div><div class='del'>-</div><div class='del'>-	if (!acpi_gbl_reduced_hardware) {</div><div class='del'>-		if (acpi_gbl_FADT.facs) {</div><div class='del'>-			acpi_tb_install_standard_table((acpi_physical_address)</div><div class='del'>-						       acpi_gbl_FADT.facs,</div><div class='del'>-						       ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL,</div><div class='del'>-						       NULL, FALSE, TRUE,</div><div class='del'>-						       &amp;acpi_gbl_facs_index);</div><div class='del'>-		}</div><div class='del'>-		if (acpi_gbl_FADT.Xfacs) {</div><div class='del'>-			acpi_tb_install_standard_table((acpi_physical_address)</div><div class='del'>-						       acpi_gbl_FADT.Xfacs,</div><div class='del'>-						       ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL,</div><div class='del'>-						       NULL, FALSE, TRUE,</div><div class='del'>-						       &amp;acpi_gbl_xfacs_index);</div><div class='del'>-		}</div><div class='add'>+	if (acpi_gbl_FADT.facs) {</div><div class='add'>+		acpi_tb_install_standard_table((acpi_physical_address)</div><div class='add'>+					       acpi_gbl_FADT.facs,</div><div class='add'>+					       ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL,</div><div class='add'>+					       NULL, FALSE, TRUE,</div><div class='add'>+					       &amp;acpi_gbl_facs_index);</div><div class='add'>+	}</div><div class='add'>+	if (acpi_gbl_FADT.Xfacs) {</div><div class='add'>+		acpi_tb_install_standard_table((acpi_physical_address)</div><div class='add'>+					       acpi_gbl_FADT.Xfacs,</div><div class='add'>+					       ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL,</div><div class='add'>+					       NULL, FALSE, TRUE,</div><div class='add'>+					       &amp;acpi_gbl_xfacs_index);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c<br/>index bb4a56e5673a..15fa68a5ea6e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbutils.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/tbutils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbutils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/tbutils.c</a></div><div class='hunk'>@@ -36,12 +36,7 @@ acpi_status acpi_tb_initialize_facs(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_table_facs *facs;</div><div class='ctx'> </div><div class='del'>-	/* If Hardware Reduced flag is set, there is no FACS */</div><div class='del'>-</div><div class='del'>-	if (acpi_gbl_reduced_hardware) {</div><div class='del'>-		acpi_gbl_FACS = NULL;</div><div class='del'>-		return (AE_OK);</div><div class='del'>-	} else if (acpi_gbl_FADT.Xfacs &amp;&amp;</div><div class='add'>+	if (acpi_gbl_FADT.Xfacs &amp;&amp;</div><div class='ctx'> 		   (!acpi_gbl_FADT.facs</div><div class='ctx'> 		    || !acpi_gbl_use32_bit_facs_addresses)) {</div><div class='ctx'> 		(void)acpi_get_table_by_index(acpi_gbl_xfacs_index,</div><div class='head'>diff --git a/drivers/acpi/acpica/utdebug.c b/drivers/acpi/acpica/utdebug.c<br/>index c5f6c85a3a09..3d71bd9245c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdebug.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpica/utdebug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdebug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/acpica/utdebug.c</a></div><div class='hunk'>@@ -62,7 +62,12 @@ void acpi_ut_track_stack_ptr(void)</div><div class='ctx'> 	acpi_size current_sp;</div><div class='ctx'> </div><div class='ctx'> 	if (&amp;current_sp &lt; acpi_gbl_lowest_stack_pointer) {</div><div class='add'>+#pragma GCC diagnostic push</div><div class='add'>+#if defined(__GNUC__) &amp;&amp; __GNUC__ &gt;= 12</div><div class='add'>+#pragma GCC diagnostic ignored "-Wdangling-pointer="</div><div class='add'>+#endif</div><div class='ctx'> 		acpi_gbl_lowest_stack_pointer = &amp;current_sp;</div><div class='add'>+#pragma GCC diagnostic pop</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (acpi_gbl_nesting_level &gt; acpi_gbl_deepest_nesting) {</div><div class='head'>diff --git a/drivers/acpi/apei/einj-core.c b/drivers/acpi/apei/einj-core.c<br/>index 01faca3a238a..9515bcfe5e97 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/apei/einj-core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/apei/einj-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/apei/einj-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/apei/einj-core.c</a></div><div class='hunk'>@@ -851,7 +851,7 @@ err_put_table:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void einj_remove(struct platform_device *pdev)</div><div class='add'>+static void __exit einj_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct apei_exec_context ctx;</div><div class='ctx'> </div><div class='hunk'>@@ -873,8 +873,14 @@ static void einj_remove(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *einj_dev;</div><div class='del'>-static struct platform_driver einj_driver = {</div><div class='del'>-	.remove_new = einj_remove,</div><div class='add'>+/*</div><div class='add'>+ * einj_remove() lives in .exit.text. For drivers registered via</div><div class='add'>+ * platform_driver_probe() this is ok because they cannot get unbound at</div><div class='add'>+ * runtime. So mark the driver struct with __refdata to prevent modpost</div><div class='add'>+ * triggering a section mismatch warning.</div><div class='add'>+ */</div><div class='add'>+static struct platform_driver einj_driver __refdata = {</div><div class='add'>+	.remove_new = __exit_p(einj_remove),</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "acpi-einj",</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c<br/>index d9fa730416f1..787eca838410 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/bus.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/bus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/bus.c</a></div><div class='hunk'>@@ -112,6 +112,17 @@ int acpi_bus_get_status(struct acpi_device *device)</div><div class='ctx'> 	if (ACPI_FAILURE(status))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	if (!device-&gt;status.present &amp;&amp; device-&gt;status.enabled) {</div><div class='add'>+		pr_info(FW_BUG "Device [%s] status [%08x]: not present and enabled\n",</div><div class='add'>+			device-&gt;pnp.bus_id, (u32)sta);</div><div class='add'>+		device-&gt;status.enabled = 0;</div><div class='add'>+		/*</div><div class='add'>+		 * The status is clearly invalid, so clear the functional bit as</div><div class='add'>+		 * well to avoid attempting to use the device.</div><div class='add'>+		 */</div><div class='add'>+		device-&gt;status.functional = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	acpi_set_device_status(device, sta);</div><div class='ctx'> </div><div class='ctx'> 	if (device-&gt;status.functional &amp;&amp; !device-&gt;status.present) {</div><div class='hunk'>@@ -316,9 +327,14 @@ static void acpi_bus_osc_negotiate_platform_control(void)</div><div class='ctx'> 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PAD_SUPPORT;</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_ACPI_PROCESSOR))</div><div class='ctx'> 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PPC_OST_SUPPORT;</div><div class='add'>+	if (IS_ENABLED(CONFIG_ACPI_THERMAL))</div><div class='add'>+		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_FAST_THERMAL_SAMPLING_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;</div><div class='ctx'> 	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT;</div><div class='add'>+	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_OVER_16_PSTATES_SUPPORT;</div><div class='add'>+	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_GED_SUPPORT;</div><div class='add'>+	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_IRQ_RESOURCE_SOURCE_SUPPORT;</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_ACPI_PRMT))</div><div class='ctx'> 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PRM_SUPPORT;</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_ACPI_FFH))</div><div class='hunk'>@@ -990,25 +1006,26 @@ EXPORT_SYMBOL_GPL(acpi_driver_match_device);</div><div class='ctx'>    -------------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * acpi_bus_register_driver - register a driver with the ACPI bus</div><div class='add'>+ * __acpi_bus_register_driver - register a driver with the ACPI bus</div><div class='ctx'>  * @driver: driver being registered</div><div class='add'>+ * @owner: owning module/driver</div><div class='ctx'>  *</div><div class='ctx'>  * Registers a driver with the ACPI bus.  Searches the namespace for all</div><div class='ctx'>  * devices that match the driver's criteria and binds.  Returns zero for</div><div class='ctx'>  * success or a negative error status for failure.</div><div class='ctx'>  */</div><div class='del'>-int acpi_bus_register_driver(struct acpi_driver *driver)</div><div class='add'>+int __acpi_bus_register_driver(struct acpi_driver *driver, struct module *owner)</div><div class='ctx'> {</div><div class='ctx'> 	if (acpi_disabled)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	driver-&gt;drv.name = driver-&gt;name;</div><div class='ctx'> 	driver-&gt;drv.bus = &amp;acpi_bus_type;</div><div class='del'>-	driver-&gt;drv.owner = driver-&gt;owner;</div><div class='add'>+	driver-&gt;drv.owner = owner;</div><div class='ctx'> </div><div class='ctx'> 	return driver_register(&amp;driver-&gt;drv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-EXPORT_SYMBOL(acpi_bus_register_driver);</div><div class='add'>+EXPORT_SYMBOL(__acpi_bus_register_driver);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * acpi_bus_unregister_driver - unregisters a driver with the ACPI bus</div><div class='head'>diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c<br/>index 4bfbe55553f4..1d857978f5f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/cppc_acpi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/cppc_acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/cppc_acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/cppc_acpi.c</a></div><div class='hunk'>@@ -170,8 +170,8 @@ show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, wraparound_time);</div><div class='ctx'> #define GET_BIT_WIDTH(reg) ((reg)-&gt;access_width ? (8 &lt;&lt; ((reg)-&gt;access_width - 1)) : (reg)-&gt;bit_width)</div><div class='ctx'> </div><div class='ctx'> /* Shift and apply the mask for CPC reads/writes */</div><div class='del'>-#define MASK_VAL(reg, val) ((val) &gt;&gt; ((reg)-&gt;bit_offset &amp; 			\</div><div class='del'>-					GENMASK(((reg)-&gt;bit_width), 0)))</div><div class='add'>+#define MASK_VAL(reg, val) (((val) &gt;&gt; (reg)-&gt;bit_offset) &amp; 			\</div><div class='add'>+					GENMASK(((reg)-&gt;bit_width) - 1, 0))</div><div class='ctx'> </div><div class='ctx'> static ssize_t show_feedback_ctrs(struct kobject *kobj,</div><div class='ctx'> 		struct kobj_attribute *attr, char *buf)</div><div class='hunk'>@@ -686,8 +686,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)</div><div class='ctx'> </div><div class='ctx'> 	if (!osc_sb_cppc2_support_acked) {</div><div class='ctx'> 		pr_debug("CPPC v2 _OSC not acked\n");</div><div class='del'>-		if (!cpc_supported_by_cpu())</div><div class='add'>+		if (!cpc_supported_by_cpu()) {</div><div class='add'>+			pr_debug("CPPC is not supported by the CPU\n");</div><div class='ctx'> 			return -ENODEV;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Parse the ACPI _CPC table for this CPU. */</div><div class='hunk'>@@ -1002,14 +1004,14 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*val = 0;</div><div class='add'>+	size = GET_BIT_WIDTH(reg);</div><div class='ctx'> </div><div class='ctx'> 	if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_IO) {</div><div class='del'>-		u32 width = GET_BIT_WIDTH(reg);</div><div class='ctx'> 		u32 val_u32;</div><div class='ctx'> 		acpi_status status;</div><div class='ctx'> </div><div class='ctx'> 		status = acpi_os_read_port((acpi_io_address)reg-&gt;address,</div><div class='del'>-					   &amp;val_u32, width);</div><div class='add'>+					   &amp;val_u32, size);</div><div class='ctx'> 		if (ACPI_FAILURE(status)) {</div><div class='ctx'> 			pr_debug("Error: Failed to read SystemIO port %llx\n",</div><div class='ctx'> 				 reg-&gt;address);</div><div class='hunk'>@@ -1018,17 +1020,22 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val)</div><div class='ctx'> </div><div class='ctx'> 		*val = val_u32;</div><div class='ctx'> 		return 0;</div><div class='del'>-	} else if (reg-&gt;space_id == ACPI_ADR_SPACE_PLATFORM_COMM &amp;&amp; pcc_ss_id &gt;= 0)</div><div class='add'>+	} else if (reg-&gt;space_id == ACPI_ADR_SPACE_PLATFORM_COMM &amp;&amp; pcc_ss_id &gt;= 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * For registers in PCC space, the register size is determined</div><div class='add'>+		 * by the bit width field; the access size is used to indicate</div><div class='add'>+		 * the PCC subspace id.</div><div class='add'>+		 */</div><div class='add'>+		size = reg-&gt;bit_width;</div><div class='ctx'> 		vaddr = GET_PCC_VADDR(reg-&gt;address, pcc_ss_id);</div><div class='add'>+	}</div><div class='ctx'> 	else if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)</div><div class='ctx'> 		vaddr = reg_res-&gt;sys_mem_vaddr;</div><div class='ctx'> 	else if (reg-&gt;space_id == ACPI_ADR_SPACE_FIXED_HARDWARE)</div><div class='ctx'> 		return cpc_read_ffh(cpu, reg, val);</div><div class='ctx'> 	else</div><div class='ctx'> 		return acpi_os_read_memory((acpi_physical_address)reg-&gt;address,</div><div class='del'>-				val, reg-&gt;bit_width);</div><div class='del'>-</div><div class='del'>-	size = GET_BIT_WIDTH(reg);</div><div class='add'>+				val, size);</div><div class='ctx'> </div><div class='ctx'> 	switch (size) {</div><div class='ctx'> 	case 8:</div><div class='hunk'>@@ -1044,8 +1051,13 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val)</div><div class='ctx'> 		*val = readq_relaxed(vaddr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n",</div><div class='del'>-			 reg-&gt;bit_width, pcc_ss_id);</div><div class='add'>+		if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {</div><div class='add'>+			pr_debug("Error: Cannot read %u bit width from system memory: 0x%llx\n",</div><div class='add'>+				size, reg-&gt;address);</div><div class='add'>+		} else if (reg-&gt;space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {</div><div class='add'>+			pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n",</div><div class='add'>+				size, pcc_ss_id);</div><div class='add'>+		}</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1063,12 +1075,13 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)</div><div class='ctx'> 	int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);</div><div class='ctx'> 	struct cpc_reg *reg = &amp;reg_res-&gt;cpc_entry.reg;</div><div class='ctx'> </div><div class='add'>+	size = GET_BIT_WIDTH(reg);</div><div class='add'>+</div><div class='ctx'> 	if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_IO) {</div><div class='del'>-		u32 width = GET_BIT_WIDTH(reg);</div><div class='ctx'> 		acpi_status status;</div><div class='ctx'> </div><div class='ctx'> 		status = acpi_os_write_port((acpi_io_address)reg-&gt;address,</div><div class='del'>-					    (u32)val, width);</div><div class='add'>+					    (u32)val, size);</div><div class='ctx'> 		if (ACPI_FAILURE(status)) {</div><div class='ctx'> 			pr_debug("Error: Failed to write SystemIO port %llx\n",</div><div class='ctx'> 				 reg-&gt;address);</div><div class='hunk'>@@ -1076,17 +1089,22 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='del'>-	} else if (reg-&gt;space_id == ACPI_ADR_SPACE_PLATFORM_COMM &amp;&amp; pcc_ss_id &gt;= 0)</div><div class='add'>+	} else if (reg-&gt;space_id == ACPI_ADR_SPACE_PLATFORM_COMM &amp;&amp; pcc_ss_id &gt;= 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * For registers in PCC space, the register size is determined</div><div class='add'>+		 * by the bit width field; the access size is used to indicate</div><div class='add'>+		 * the PCC subspace id.</div><div class='add'>+		 */</div><div class='add'>+		size = reg-&gt;bit_width;</div><div class='ctx'> 		vaddr = GET_PCC_VADDR(reg-&gt;address, pcc_ss_id);</div><div class='add'>+	}</div><div class='ctx'> 	else if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)</div><div class='ctx'> 		vaddr = reg_res-&gt;sys_mem_vaddr;</div><div class='ctx'> 	else if (reg-&gt;space_id == ACPI_ADR_SPACE_FIXED_HARDWARE)</div><div class='ctx'> 		return cpc_write_ffh(cpu, reg, val);</div><div class='ctx'> 	else</div><div class='ctx'> 		return acpi_os_write_memory((acpi_physical_address)reg-&gt;address,</div><div class='del'>-				val, reg-&gt;bit_width);</div><div class='del'>-</div><div class='del'>-	size = GET_BIT_WIDTH(reg);</div><div class='add'>+				val, size);</div><div class='ctx'> </div><div class='ctx'> 	if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)</div><div class='ctx'> 		val = MASK_VAL(reg, val);</div><div class='hunk'>@@ -1105,8 +1123,13 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)</div><div class='ctx'> 		writeq_relaxed(val, vaddr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n",</div><div class='del'>-			 reg-&gt;bit_width, pcc_ss_id);</div><div class='add'>+		if (reg-&gt;space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {</div><div class='add'>+			pr_debug("Error: Cannot write %u bit width to system memory: 0x%llx\n",</div><div class='add'>+				size, reg-&gt;address);</div><div class='add'>+		} else if (reg-&gt;space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {</div><div class='add'>+			pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n",</div><div class='add'>+				size, pcc_ss_id);</div><div class='add'>+		}</div><div class='ctx'> 		ret_val = -EFAULT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c<br/>index a7c00ef78086..34affbda295e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/dock.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/dock.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/dock.c</a></div><div class='hunk'>@@ -88,43 +88,29 @@ static void dock_hotplug_event(struct dock_dependent_device *dd, u32 event,</div><div class='ctx'> 			       enum dock_callback_type cb_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_device *adev = dd-&gt;adev;</div><div class='add'>+	acpi_hp_fixup fixup = NULL;</div><div class='add'>+	acpi_hp_uevent uevent = NULL;</div><div class='add'>+	acpi_hp_notify notify = NULL;</div><div class='ctx'> </div><div class='ctx'> 	acpi_lock_hp_context();</div><div class='ctx'> </div><div class='del'>-	if (!adev-&gt;hp)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (cb_type == DOCK_CALL_FIXUP) {</div><div class='del'>-		void (*fixup)(struct acpi_device *);</div><div class='del'>-</div><div class='del'>-		fixup = adev-&gt;hp-&gt;fixup;</div><div class='del'>-		if (fixup) {</div><div class='del'>-			acpi_unlock_hp_context();</div><div class='del'>-			fixup(adev);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	} else if (cb_type == DOCK_CALL_UEVENT) {</div><div class='del'>-		void (*uevent)(struct acpi_device *, u32);</div><div class='del'>-</div><div class='del'>-		uevent = adev-&gt;hp-&gt;uevent;</div><div class='del'>-		if (uevent) {</div><div class='del'>-			acpi_unlock_hp_context();</div><div class='del'>-			uevent(adev, event);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		int (*notify)(struct acpi_device *, u32);</div><div class='del'>-</div><div class='del'>-		notify = adev-&gt;hp-&gt;notify;</div><div class='del'>-		if (notify) {</div><div class='del'>-			acpi_unlock_hp_context();</div><div class='del'>-			notify(adev, event);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	if (adev-&gt;hp) {</div><div class='add'>+		if (cb_type == DOCK_CALL_FIXUP)</div><div class='add'>+			fixup = adev-&gt;hp-&gt;fixup;</div><div class='add'>+		else if (cb_type == DOCK_CALL_UEVENT)</div><div class='add'>+			uevent = adev-&gt;hp-&gt;uevent;</div><div class='add'>+		else</div><div class='add'>+			notify = adev-&gt;hp-&gt;notify;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- out:</div><div class='ctx'> 	acpi_unlock_hp_context();</div><div class='add'>+</div><div class='add'>+	if (fixup)</div><div class='add'>+		fixup(adev);</div><div class='add'>+	else if (uevent)</div><div class='add'>+		uevent(adev, event);</div><div class='add'>+	else if (notify)</div><div class='add'>+		notify(adev, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct dock_station *find_dock_station(acpi_handle handle)</div><div class='head'>diff --git a/drivers/acpi/dptf/dptf_pch_fivr.c b/drivers/acpi/dptf/dptf_pch_fivr.c<br/>index 654aaa53c67f..d202730fafd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/dptf/dptf_pch_fivr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dptf/dptf_pch_fivr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/dptf/dptf_pch_fivr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/dptf/dptf_pch_fivr.c</a></div><div class='hunk'>@@ -150,6 +150,7 @@ static const struct acpi_device_id pch_fivr_device_ids[] = {</div><div class='ctx'> 	{"INTC1045", 0},</div><div class='ctx'> 	{"INTC1049", 0},</div><div class='ctx'> 	{"INTC1064", 0},</div><div class='add'>+	{"INTC106B", 0},</div><div class='ctx'> 	{"INTC10A3", 0},</div><div class='ctx'> 	{"", 0},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/acpi/dptf/dptf_power.c b/drivers/acpi/dptf/dptf_power.c<br/>index b8187babbbbb..8023b3e23315 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/dptf/dptf_power.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dptf/dptf_power.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/dptf/dptf_power.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/dptf/dptf_power.c</a></div><div class='hunk'>@@ -232,6 +232,8 @@ static const struct acpi_device_id int3407_device_ids[] = {</div><div class='ctx'> 	{"INTC1061", 0},</div><div class='ctx'> 	{"INTC1065", 0},</div><div class='ctx'> 	{"INTC1066", 0},</div><div class='add'>+	{"INTC106C", 0},</div><div class='add'>+	{"INTC106D", 0},</div><div class='ctx'> 	{"INTC10A4", 0},</div><div class='ctx'> 	{"INTC10A5", 0},</div><div class='ctx'> 	{"", 0},</div><div class='head'>diff --git a/drivers/acpi/dptf/int340x_thermal.c b/drivers/acpi/dptf/int340x_thermal.c<br/>index b7113fa92fa6..014ada759954 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/dptf/int340x_thermal.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/dptf/int340x_thermal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/dptf/int340x_thermal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/dptf/int340x_thermal.c</a></div><div class='hunk'>@@ -43,6 +43,12 @@ static const struct acpi_device_id int340x_thermal_device_ids[] = {</div><div class='ctx'> 	{"INTC1064"},</div><div class='ctx'> 	{"INTC1065"},</div><div class='ctx'> 	{"INTC1066"},</div><div class='add'>+	{"INTC1068"},</div><div class='add'>+	{"INTC1069"},</div><div class='add'>+	{"INTC106A"},</div><div class='add'>+	{"INTC106B"},</div><div class='add'>+	{"INTC106C"},</div><div class='add'>+	{"INTC106D"},</div><div class='ctx'> 	{"INTC10A0"},</div><div class='ctx'> 	{"INTC10A1"},</div><div class='ctx'> 	{"INTC10A2"},</div><div class='head'>diff --git a/drivers/acpi/fan.h b/drivers/acpi/fan.h<br/>index e7b4b4e4a55e..f89d19c922dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/fan.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/fan.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/fan.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/fan.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> 	{"INTC1044", }, /* Fan for Tiger Lake generation */ \</div><div class='ctx'> 	{"INTC1048", }, /* Fan for Alder Lake generation */ \</div><div class='ctx'> 	{"INTC1063", }, /* Fan for Meteor Lake generation */ \</div><div class='add'>+	{"INTC106A", }, /* Fan for Lunar Lake generation */ \</div><div class='ctx'> 	{"INTC10A2", }, /* Fan for Raptor Lake generation */ \</div><div class='ctx'> 	{"PNP0C0B", } /* Generic ACPI fan */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h<br/>index ca72a0dc5715..60c483836756 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/internal.h</a></div><div class='hunk'>@@ -69,7 +69,8 @@ void acpi_debugfs_init(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void acpi_debugfs_init(void) { return; }</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_PCI</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_X86) &amp;&amp; defined(CONFIG_PCI)</div><div class='ctx'> void acpi_lpss_init(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void acpi_lpss_init(void) {}</div><div class='head'>diff --git a/drivers/acpi/nhlt.c b/drivers/acpi/nhlt.c<br/>new file mode 100644<br/>index 000000000000..dc1bd0df9228<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/nhlt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/nhlt.c</a></div><div class='hunk'>@@ -0,0 +1,289 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright(c) 2023-2024 Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Authors: Cezary Rojewski &lt;cezary.rojewski@intel.com&gt;</div><div class='add'>+ *          Amadeusz Slawinski &lt;amadeuszx.slawinski@linux.intel.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "ACPI: NHLT: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/minmax.h&gt;</div><div class='add'>+#include &lt;linux/printk.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;acpi/nhlt.h&gt;</div><div class='add'>+</div><div class='add'>+static struct acpi_table_nhlt *acpi_gbl_nhlt;</div><div class='add'>+</div><div class='add'>+static struct acpi_table_nhlt empty_nhlt = {</div><div class='add'>+	.header = {</div><div class='add'>+		.signature = ACPI_SIG_NHLT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_get_gbl_table - Retrieve a pointer to the first NHLT table.</div><div class='add'>+ *</div><div class='add'>+ * If there is no NHLT in the system, acpi_gbl_nhlt will instead point to an</div><div class='add'>+ * empty table.</div><div class='add'>+ *</div><div class='add'>+ * Return: ACPI status code of the operation.</div><div class='add'>+ */</div><div class='add'>+acpi_status acpi_nhlt_get_gbl_table(void)</div><div class='add'>+{</div><div class='add'>+	acpi_status status;</div><div class='add'>+</div><div class='add'>+	status = acpi_get_table(ACPI_SIG_NHLT, 0, (struct acpi_table_header **)(&amp;acpi_gbl_nhlt));</div><div class='add'>+	if (!acpi_gbl_nhlt)</div><div class='add'>+		acpi_gbl_nhlt = &amp;empty_nhlt;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_get_gbl_table);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_put_gbl_table - Release the global NHLT table.</div><div class='add'>+ */</div><div class='add'>+void acpi_nhlt_put_gbl_table(void)</div><div class='add'>+{</div><div class='add'>+	acpi_put_table((struct acpi_table_header *)acpi_gbl_nhlt);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_put_gbl_table);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_endpoint_match - Verify if an endpoint matches criteria.</div><div class='add'>+ * @ep:			the endpoint to check.</div><div class='add'>+ * @link_type:		the hardware link type, e.g.: PDM or SSP.</div><div class='add'>+ * @dev_type:		the device type.</div><div class='add'>+ * @dir:		stream direction.</div><div class='add'>+ * @bus_id:		the ID of virtual bus hosting the endpoint.</div><div class='add'>+ *</div><div class='add'>+ * Either of @link_type, @dev_type, @dir or @bus_id may be set to a negative</div><div class='add'>+ * value to ignore the parameter when matching.</div><div class='add'>+ *</div><div class='add'>+ * Return: %true if endpoint matches specified criteria or %false otherwise.</div><div class='add'>+ */</div><div class='add'>+bool acpi_nhlt_endpoint_match(const struct acpi_nhlt_endpoint *ep,</div><div class='add'>+			      int link_type, int dev_type, int dir, int bus_id)</div><div class='add'>+{</div><div class='add'>+	return ep &amp;&amp;</div><div class='add'>+	       (link_type &lt; 0 || ep-&gt;link_type == link_type) &amp;&amp;</div><div class='add'>+	       (dev_type &lt; 0 || ep-&gt;device_type == dev_type) &amp;&amp;</div><div class='add'>+	       (bus_id &lt; 0 || ep-&gt;virtual_bus_id == bus_id) &amp;&amp;</div><div class='add'>+	       (dir &lt; 0 || ep-&gt;direction == dir);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_endpoint_match);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_tb_find_endpoint - Search a NHLT table for an endpoint.</div><div class='add'>+ * @tb:			the table to search.</div><div class='add'>+ * @link_type:		the hardware link type, e.g.: PDM or SSP.</div><div class='add'>+ * @dev_type:		the device type.</div><div class='add'>+ * @dir:		stream direction.</div><div class='add'>+ * @bus_id:		the ID of virtual bus hosting the endpoint.</div><div class='add'>+ *</div><div class='add'>+ * Either of @link_type, @dev_type, @dir or @bus_id may be set to a negative</div><div class='add'>+ * value to ignore the parameter during the search.</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to endpoint matching the criteria, %NULL if not found or</div><div class='add'>+ * an ERR_PTR() otherwise.</div><div class='add'>+ */</div><div class='add'>+struct acpi_nhlt_endpoint *</div><div class='add'>+acpi_nhlt_tb_find_endpoint(const struct acpi_table_nhlt *tb,</div><div class='add'>+			   int link_type, int dev_type, int dir, int bus_id)</div><div class='add'>+{</div><div class='add'>+	struct acpi_nhlt_endpoint *ep;</div><div class='add'>+</div><div class='add'>+	for_each_nhlt_endpoint(tb, ep)</div><div class='add'>+		if (acpi_nhlt_endpoint_match(ep, link_type, dev_type, dir, bus_id))</div><div class='add'>+			return ep;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_tb_find_endpoint);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_find_endpoint - Search all NHLT tables for an endpoint.</div><div class='add'>+ * @link_type:		the hardware link type, e.g.: PDM or SSP.</div><div class='add'>+ * @dev_type:		the device type.</div><div class='add'>+ * @dir:		stream direction.</div><div class='add'>+ * @bus_id:		the ID of virtual bus hosting the endpoint.</div><div class='add'>+ *</div><div class='add'>+ * Either of @link_type, @dev_type, @dir or @bus_id may be set to a negative</div><div class='add'>+ * value to ignore the parameter during the search.</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to endpoint matching the criteria, %NULL if not found or</div><div class='add'>+ * an ERR_PTR() otherwise.</div><div class='add'>+ */</div><div class='add'>+struct acpi_nhlt_endpoint *</div><div class='add'>+acpi_nhlt_find_endpoint(int link_type, int dev_type, int dir, int bus_id)</div><div class='add'>+{</div><div class='add'>+	/* TODO: Currently limited to table of index 0. */</div><div class='add'>+	return acpi_nhlt_tb_find_endpoint(acpi_gbl_nhlt, link_type, dev_type, dir, bus_id);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_find_endpoint);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_endpoint_find_fmtcfg - Search endpoint's formats configuration space</div><div class='add'>+ *                                  for a specific format.</div><div class='add'>+ * @ep:			the endpoint to search.</div><div class='add'>+ * @ch:			number of channels.</div><div class='add'>+ * @rate:		samples per second.</div><div class='add'>+ * @vbps:		valid bits per sample.</div><div class='add'>+ * @bps:		bits per sample.</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to format matching the criteria, %NULL if not found or</div><div class='add'>+ * an ERR_PTR() otherwise.</div><div class='add'>+ */</div><div class='add'>+struct acpi_nhlt_format_config *</div><div class='add'>+acpi_nhlt_endpoint_find_fmtcfg(const struct acpi_nhlt_endpoint *ep,</div><div class='add'>+			       u16 ch, u32 rate, u16 vbps, u16 bps)</div><div class='add'>+{</div><div class='add'>+	struct acpi_nhlt_wave_formatext *wav;</div><div class='add'>+	struct acpi_nhlt_format_config *fmt;</div><div class='add'>+</div><div class='add'>+	for_each_nhlt_endpoint_fmtcfg(ep, fmt) {</div><div class='add'>+		wav = &amp;fmt-&gt;format;</div><div class='add'>+</div><div class='add'>+		if (wav-&gt;valid_bits_per_sample == vbps &amp;&amp;</div><div class='add'>+		    wav-&gt;samples_per_sec == rate &amp;&amp;</div><div class='add'>+		    wav-&gt;bits_per_sample == bps &amp;&amp;</div><div class='add'>+		    wav-&gt;channel_count == ch)</div><div class='add'>+			return fmt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_endpoint_find_fmtcfg);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_tb_find_fmtcfg - Search a NHLT table for a specific format.</div><div class='add'>+ * @tb:			the table to search.</div><div class='add'>+ * @link_type:		the hardware link type, e.g.: PDM or SSP.</div><div class='add'>+ * @dev_type:		the device type.</div><div class='add'>+ * @dir:		stream direction.</div><div class='add'>+ * @bus_id:		the ID of virtual bus hosting the endpoint.</div><div class='add'>+ *</div><div class='add'>+ * @ch:			number of channels.</div><div class='add'>+ * @rate:		samples per second.</div><div class='add'>+ * @vbps:		valid bits per sample.</div><div class='add'>+ * @bps:		bits per sample.</div><div class='add'>+ *</div><div class='add'>+ * Either of @link_type, @dev_type, @dir or @bus_id may be set to a negative</div><div class='add'>+ * value to ignore the parameter during the search.</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to format matching the criteria, %NULL if not found or</div><div class='add'>+ * an ERR_PTR() otherwise.</div><div class='add'>+ */</div><div class='add'>+struct acpi_nhlt_format_config *</div><div class='add'>+acpi_nhlt_tb_find_fmtcfg(const struct acpi_table_nhlt *tb,</div><div class='add'>+			 int link_type, int dev_type, int dir, int bus_id,</div><div class='add'>+			 u16 ch, u32 rate, u16 vbps, u16 bps)</div><div class='add'>+{</div><div class='add'>+	struct acpi_nhlt_format_config *fmt;</div><div class='add'>+	struct acpi_nhlt_endpoint *ep;</div><div class='add'>+</div><div class='add'>+	for_each_nhlt_endpoint(tb, ep) {</div><div class='add'>+		if (!acpi_nhlt_endpoint_match(ep, link_type, dev_type, dir, bus_id))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		fmt = acpi_nhlt_endpoint_find_fmtcfg(ep, ch, rate, vbps, bps);</div><div class='add'>+		if (fmt)</div><div class='add'>+			return fmt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_tb_find_fmtcfg);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_find_fmtcfg - Search all NHLT tables for a specific format.</div><div class='add'>+ * @link_type:		the hardware link type, e.g.: PDM or SSP.</div><div class='add'>+ * @dev_type:		the device type.</div><div class='add'>+ * @dir:		stream direction.</div><div class='add'>+ * @bus_id:		the ID of virtual bus hosting the endpoint.</div><div class='add'>+ *</div><div class='add'>+ * @ch:			number of channels.</div><div class='add'>+ * @rate:		samples per second.</div><div class='add'>+ * @vbps:		valid bits per sample.</div><div class='add'>+ * @bps:		bits per sample.</div><div class='add'>+ *</div><div class='add'>+ * Either of @link_type, @dev_type, @dir or @bus_id may be set to a negative</div><div class='add'>+ * value to ignore the parameter during the search.</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to format matching the criteria, %NULL if not found or</div><div class='add'>+ * an ERR_PTR() otherwise.</div><div class='add'>+ */</div><div class='add'>+struct acpi_nhlt_format_config *</div><div class='add'>+acpi_nhlt_find_fmtcfg(int link_type, int dev_type, int dir, int bus_id,</div><div class='add'>+		      u16 ch, u32 rate, u16 vbps, u16 bps)</div><div class='add'>+{</div><div class='add'>+	/* TODO: Currently limited to table of index 0. */</div><div class='add'>+	return acpi_nhlt_tb_find_fmtcfg(acpi_gbl_nhlt, link_type, dev_type, dir, bus_id,</div><div class='add'>+					ch, rate, vbps, bps);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_find_fmtcfg);</div><div class='add'>+</div><div class='add'>+static bool acpi_nhlt_config_is_micdevice(struct acpi_nhlt_config *cfg)</div><div class='add'>+{</div><div class='add'>+	return cfg-&gt;capabilities_size &gt;= sizeof(struct acpi_nhlt_micdevice_config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool acpi_nhlt_config_is_vendor_micdevice(struct acpi_nhlt_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct acpi_nhlt_vendor_micdevice_config *devcfg = __acpi_nhlt_config_caps(cfg);</div><div class='add'>+</div><div class='add'>+	return cfg-&gt;capabilities_size &gt;= sizeof(*devcfg) &amp;&amp;</div><div class='add'>+	       cfg-&gt;capabilities_size == struct_size(devcfg, mics, devcfg-&gt;mics_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acpi_nhlt_endpoint_mic_count - Retrieve number of digital microphones for a PDM endpoint.</div><div class='add'>+ * @ep:			the endpoint to return microphones count for.</div><div class='add'>+ *</div><div class='add'>+ * Return: A number of microphones or an error code if an invalid endpoint is provided.</div><div class='add'>+ */</div><div class='add'>+int acpi_nhlt_endpoint_mic_count(const struct acpi_nhlt_endpoint *ep)</div><div class='add'>+{</div><div class='add'>+	union acpi_nhlt_device_config *devcfg;</div><div class='add'>+	struct acpi_nhlt_format_config *fmt;</div><div class='add'>+	struct acpi_nhlt_config *cfg;</div><div class='add'>+	u16 max_ch = 0;</div><div class='add'>+</div><div class='add'>+	if (!ep || ep-&gt;link_type != ACPI_NHLT_LINKTYPE_PDM)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Find max number of channels based on formats configuration. */</div><div class='add'>+	for_each_nhlt_endpoint_fmtcfg(ep, fmt)</div><div class='add'>+		max_ch = max(fmt-&gt;format.channel_count, max_ch);</div><div class='add'>+</div><div class='add'>+	cfg = __acpi_nhlt_endpoint_config(ep);</div><div class='add'>+	devcfg = __acpi_nhlt_config_caps(cfg);</div><div class='add'>+</div><div class='add'>+	/* If @ep is not a mic array, fallback to channels count. */</div><div class='add'>+	if (!acpi_nhlt_config_is_micdevice(cfg) ||</div><div class='add'>+	    devcfg-&gt;gen.config_type != ACPI_NHLT_CONFIGTYPE_MICARRAY)</div><div class='add'>+		return max_ch;</div><div class='add'>+</div><div class='add'>+	switch (devcfg-&gt;mic.array_type) {</div><div class='add'>+	case ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL:</div><div class='add'>+	case ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG:</div><div class='add'>+		return 2;</div><div class='add'>+</div><div class='add'>+	case ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1:</div><div class='add'>+	case ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED:</div><div class='add'>+	case ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2:</div><div class='add'>+		return 4;</div><div class='add'>+</div><div class='add'>+	case ACPI_NHLT_ARRAYTYPE_VENDOR:</div><div class='add'>+		if (!acpi_nhlt_config_is_vendor_micdevice(cfg))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		return devcfg-&gt;vendor_mic.mics_count;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		pr_warn("undefined mic array type: %#x\n", devcfg-&gt;mic.array_type);</div><div class='add'>+		return max_ch;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acpi_nhlt_endpoint_mic_count);</div><div class='head'>diff --git a/drivers/acpi/numa/srat.c b/drivers/acpi/numa/srat.c<br/>index e45e64993c50..e3f26e71637a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/numa/srat.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/numa/srat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/numa/srat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/numa/srat.c</a></div><div class='hunk'>@@ -208,16 +208,26 @@ int __init srat_disabled(void)</div><div class='ctx'> 	return acpi_numa &lt; 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_X86) || defined(CONFIG_ARM64) || defined(CONFIG_LOONGARCH)</div><div class='add'>+__weak int __init numa_fill_memblks(u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	return NUMA_NO_MEMBLK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Callback for SLIT parsing.  pxm_to_node() returns NUMA_NO_NODE for</div><div class='ctx'>  * I/O localities since SRAT does not list them.  I/O localities are</div><div class='ctx'>  * not supported at this point.</div><div class='ctx'>  */</div><div class='del'>-void __init acpi_numa_slit_init(struct acpi_table_slit *slit)</div><div class='add'>+static int __init acpi_parse_slit(struct acpi_table_header *table)</div><div class='ctx'> {</div><div class='add'>+	struct acpi_table_slit *slit = (struct acpi_table_slit *)table;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='add'>+	if (!slit_valid(slit)) {</div><div class='add'>+		pr_info("SLIT table looks invalid. Not used.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; slit-&gt;locality_count; i++) {</div><div class='ctx'> 		const int from_node = pxm_to_node(i);</div><div class='ctx'> </div><div class='hunk'>@@ -234,28 +244,34 @@ void __init acpi_numa_slit_init(struct acpi_table_slit *slit)</div><div class='ctx'> 				slit-&gt;entry[slit-&gt;locality_count * i + j]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Default callback for parsing of the Proximity Domain &lt;-&gt; Memory</div><div class='del'>- * Area mappings</div><div class='del'>- */</div><div class='del'>-int __init</div><div class='del'>-acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)</div><div class='add'>+static int parsed_numa_memblks __initdata;</div><div class='add'>+</div><div class='add'>+static int __init</div><div class='add'>+acpi_parse_memory_affinity(union acpi_subtable_headers *header,</div><div class='add'>+			   const unsigned long table_end)</div><div class='ctx'> {</div><div class='add'>+	struct acpi_srat_mem_affinity *ma;</div><div class='ctx'> 	u64 start, end;</div><div class='ctx'> 	u32 hotpluggable;</div><div class='ctx'> 	int node, pxm;</div><div class='ctx'> </div><div class='add'>+	ma = (struct acpi_srat_mem_affinity *)header;</div><div class='add'>+</div><div class='add'>+	acpi_table_print_srat_entry(&amp;header-&gt;common);</div><div class='add'>+</div><div class='ctx'> 	if (srat_disabled())</div><div class='del'>-		goto out_err;</div><div class='add'>+		return 0;</div><div class='ctx'> 	if (ma-&gt;header.length &lt; sizeof(struct acpi_srat_mem_affinity)) {</div><div class='ctx'> 		pr_err("SRAT: Unexpected header length: %d\n",</div><div class='ctx'> 		       ma-&gt;header.length);</div><div class='ctx'> 		goto out_err_bad_srat;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((ma-&gt;flags &amp; ACPI_SRAT_MEM_ENABLED) == 0)</div><div class='del'>-		goto out_err;</div><div class='add'>+		return 0;</div><div class='ctx'> 	hotpluggable = IS_ENABLED(CONFIG_MEMORY_HOTPLUG) &amp;&amp;</div><div class='ctx'> 		(ma-&gt;flags &amp; ACPI_SRAT_MEM_HOT_PLUGGABLE);</div><div class='ctx'> </div><div class='hunk'>@@ -293,11 +309,15 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)</div><div class='ctx'> </div><div class='ctx'> 	max_possible_pfn = max(max_possible_pfn, PFN_UP(end - 1));</div><div class='ctx'> </div><div class='add'>+	parsed_numa_memblks++;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='ctx'> out_err_bad_srat:</div><div class='add'>+	/* Just disable SRAT, but do not fail and ignore errors. */</div><div class='ctx'> 	bad_srat();</div><div class='del'>-out_err:</div><div class='del'>-	return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init acpi_parse_cfmws(union acpi_subtable_headers *header,</div><div class='hunk'>@@ -340,26 +360,6 @@ static int __init acpi_parse_cfmws(union acpi_subtable_headers *header,</div><div class='ctx'> 	(*fake_pxm)++;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static int __init acpi_parse_cfmws(union acpi_subtable_headers *header,</div><div class='del'>-				   void *arg, const unsigned long table_end)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* defined(CONFIG_X86) || defined (CONFIG_ARM64) */</div><div class='del'>-</div><div class='del'>-static int __init acpi_parse_slit(struct acpi_table_header *table)</div><div class='del'>-{</div><div class='del'>-	struct acpi_table_slit *slit = (struct acpi_table_slit *)table;</div><div class='del'>-</div><div class='del'>-	if (!slit_valid(slit)) {</div><div class='del'>-		pr_info("SLIT table looks invalid. Not used.\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	acpi_numa_slit_init(slit);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> void __init __weak</div><div class='ctx'> acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa)</div><div class='hunk'>@@ -450,24 +450,6 @@ acpi_parse_gi_affinity(union acpi_subtable_headers *header,</div><div class='ctx'> }</div><div class='ctx'> #endif /* defined(CONFIG_X86) || defined (CONFIG_ARM64) */</div><div class='ctx'> </div><div class='del'>-static int __initdata parsed_numa_memblks;</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-acpi_parse_memory_affinity(union acpi_subtable_headers * header,</div><div class='del'>-			   const unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct acpi_srat_mem_affinity *memory_affinity;</div><div class='del'>-</div><div class='del'>-	memory_affinity = (struct acpi_srat_mem_affinity *)header;</div><div class='del'>-</div><div class='del'>-	acpi_table_print_srat_entry(&amp;header-&gt;common);</div><div class='del'>-</div><div class='del'>-	/* let architecture-dependent part to do it */</div><div class='del'>-	if (!acpi_numa_memory_affinity_init(memory_affinity))</div><div class='del'>-		parsed_numa_memblks++;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init acpi_parse_srat(struct acpi_table_header *table)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_table_srat *srat = (struct acpi_table_srat *)table;</div><div class='head'>diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c<br/>index 2b73580c9f36..80a52a4e66dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/property.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/property.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/property.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/property.c</a></div><div class='hunk'>@@ -31,9 +31,14 @@ static int acpi_data_get_property_array(const struct acpi_device_data *data,</div><div class='ctx'>  * not defined without a warning. For instance if any of the properties</div><div class='ctx'>  * from different GUID appear in a property list of another, it will be</div><div class='ctx'>  * accepted by the kernel. Firmware validation tools should catch these.</div><div class='add'>+ *</div><div class='add'>+ * References:</div><div class='add'>+ *</div><div class='add'>+ * [1] UEFI DSD Guide.</div><div class='add'>+ *     https://github.com/UEFI/DSD-Guide/blob/main/src/dsd-guide.adoc</div><div class='ctx'>  */</div><div class='ctx'> static const guid_t prp_guids[] = {</div><div class='del'>-	/* ACPI _DSD device properties GUID: daffd814-6eba-4d8c-8a91-bc9bbf4aa301 */</div><div class='add'>+	/* ACPI _DSD device properties GUID [1]: daffd814-6eba-4d8c-8a91-bc9bbf4aa301 */</div><div class='ctx'> 	GUID_INIT(0xdaffd814, 0x6eba, 0x4d8c,</div><div class='ctx'> 		  0x8a, 0x91, 0xbc, 0x9b, 0xbf, 0x4a, 0xa3, 0x01),</div><div class='ctx'> 	/* Hotplug in D3 GUID: 6211e2c0-58a3-4af3-90e1-927a4e0c55a4 */</div><div class='hunk'>@@ -53,12 +58,12 @@ static const guid_t prp_guids[] = {</div><div class='ctx'> 		  0xa5, 0x61, 0x99, 0xa5, 0x18, 0x97, 0x62, 0xd0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* ACPI _DSD data subnodes GUID: dbb8e3e6-5886-4ba6-8795-1319f52a966b */</div><div class='add'>+/* ACPI _DSD data subnodes GUID [1]: dbb8e3e6-5886-4ba6-8795-1319f52a966b */</div><div class='ctx'> static const guid_t ads_guid =</div><div class='ctx'> 	GUID_INIT(0xdbb8e3e6, 0x5886, 0x4ba6,</div><div class='ctx'> 		  0x87, 0x95, 0x13, 0x19, 0xf5, 0x2a, 0x96, 0x6b);</div><div class='ctx'> </div><div class='del'>-/* ACPI _DSD data buffer GUID: edb12dd0-363d-4085-a3d2-49522ca160c4 */</div><div class='add'>+/* ACPI _DSD data buffer GUID [1]: edb12dd0-363d-4085-a3d2-49522ca160c4 */</div><div class='ctx'> static const guid_t buffer_prop_guid =</div><div class='ctx'> 	GUID_INIT(0xedb12dd0, 0x363d, 0x4085,</div><div class='ctx'> 		  0xa3, 0xd2, 0x49, 0x52, 0x2c, 0xa1, 0x60, 0xc4);</div><div class='head'>diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c<br/>index 59423fe9d0f2..b5bf8b81a050 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/resource.c</a></div><div class='hunk'>@@ -518,6 +518,13 @@ static const struct dmi_system_id irq1_level_low_skip_override[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		/* Asus Vivobook Pro N6506MV */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "N6506MV"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		/* LG Electronics 17U70P */</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"),</div><div class='hunk'>@@ -534,6 +541,12 @@ static const struct dmi_system_id irq1_level_low_skip_override[] = {</div><div class='ctx'>  */</div><div class='ctx'> static const struct dmi_system_id irq1_edge_low_force_override[] = {</div><div class='ctx'> 	{</div><div class='add'>+		/* XMG APEX 17 (M23) */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "GMxBGxx"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		/* TongFang GMxRGxx/XMG CORE 15 (M22)/TUXEDO Stellaris 15 Gen4 AMD */</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "GMxRGxx"),</div><div class='hunk'>@@ -630,6 +643,18 @@ static const struct dmi_system_id irq1_edge_low_force_override[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "X565"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		/* TongFang GXxHRXx/TUXEDO InfinityBook Pro Gen9 AMD */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "GXxHRXx"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* TongFang GMxHGxx/TUXEDO Stellaris Slim Gen1 AMD */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "GMxHGxx"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c<br/>index d1464324de95..e41fb5716bc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/scan.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/scan.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/scan.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/scan.c</a></div><div class='hunk'>@@ -73,8 +73,7 @@ void acpi_unlock_hp_context(void)</div><div class='ctx'> </div><div class='ctx'> void acpi_initialize_hp_context(struct acpi_device *adev,</div><div class='ctx'> 				struct acpi_hotplug_context *hp,</div><div class='del'>-				int (*notify)(struct acpi_device *, u32),</div><div class='del'>-				void (*uevent)(struct acpi_device *, u32))</div><div class='add'>+				acpi_hp_notify notify, acpi_hp_uevent uevent)</div><div class='ctx'> {</div><div class='ctx'> 	acpi_lock_hp_context();</div><div class='ctx'> 	hp-&gt;notify = notify;</div><div class='hunk'>@@ -428,7 +427,7 @@ void acpi_device_hotplug(struct acpi_device *adev, u32 src)</div><div class='ctx'> 	} else if (adev-&gt;flags.hotplug_notify) {</div><div class='ctx'> 		error = acpi_generic_hotplug_event(adev, src);</div><div class='ctx'> 	} else {</div><div class='del'>-		int (*notify)(struct acpi_device *, u32);</div><div class='add'>+		acpi_hp_notify notify;</div><div class='ctx'> </div><div class='ctx'> 		acpi_lock_hp_context();</div><div class='ctx'> 		notify = adev-&gt;hp ? adev-&gt;hp-&gt;notify : NULL;</div><div class='hunk'>@@ -1298,10 +1297,10 @@ const char *acpi_device_hid(struct acpi_device *device)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_hardware_id *hid;</div><div class='ctx'> </div><div class='del'>-	if (list_empty(&amp;device-&gt;pnp.ids))</div><div class='add'>+	hid = list_first_entry_or_null(&amp;device-&gt;pnp.ids, struct acpi_hardware_id, list);</div><div class='add'>+	if (!hid)</div><div class='ctx'> 		return dummy_hid;</div><div class='ctx'> </div><div class='del'>-	hid = list_first_entry(&amp;device-&gt;pnp.ids, struct acpi_hardware_id, list);</div><div class='ctx'> 	return hid-&gt;id;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(acpi_device_hid);</div><div class='hunk'>@@ -1581,12 +1580,13 @@ int acpi_iommu_fwspec_init(struct device *dev, u32 id,</div><div class='ctx'> 			   struct fwnode_handle *fwnode,</div><div class='ctx'> 			   const struct iommu_ops *ops)</div><div class='ctx'> {</div><div class='del'>-	int ret = iommu_fwspec_init(dev, fwnode, ops);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = iommu_fwspec_add_ids(dev, &amp;id, 1);</div><div class='add'>+	ret = iommu_fwspec_init(dev, fwnode, ops);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return iommu_fwspec_add_ids(dev, &amp;id, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline const struct iommu_ops *acpi_iommu_fwspec_ops(struct device *dev)</div><div class='hunk'>@@ -1625,12 +1625,11 @@ static int acpi_iommu_configure_id(struct device *dev, const u32 *id_in)</div><div class='ctx'> 	if (!err &amp;&amp; dev-&gt;bus)</div><div class='ctx'> 		err = iommu_probe_device(dev);</div><div class='ctx'> </div><div class='del'>-	/* Ignore all other errors apart from EPROBE_DEFER */</div><div class='del'>-	if (err == -EPROBE_DEFER) {</div><div class='add'>+	if (err == -EPROBE_DEFER)</div><div class='ctx'> 		return err;</div><div class='del'>-	} else if (err) {</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!acpi_iommu_fwspec_ops(dev))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -1671,13 +1670,14 @@ int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr,</div><div class='ctx'> </div><div class='ctx'> 	acpi_arch_dma_setup(dev);</div><div class='ctx'> </div><div class='add'>+	/* Ignore all other errors apart from EPROBE_DEFER */</div><div class='ctx'> 	ret = acpi_iommu_configure_id(dev, input_id);</div><div class='ctx'> 	if (ret == -EPROBE_DEFER)</div><div class='ctx'> 		return -EPROBE_DEFER;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Historically this routine doesn't fail driver probing due to errors</div><div class='del'>-	 * in acpi_iommu_configure_id()</div><div class='add'>+	 * in acpi_iommu_configure_id().</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	arch_setup_dma_ops(dev, 0, U64_MAX, attr == DEV_DMA_COHERENT);</div><div class='hunk'>@@ -1962,7 +1962,7 @@ bool acpi_device_is_present(const struct acpi_device *adev)</div><div class='ctx'> </div><div class='ctx'> bool acpi_device_is_enabled(const struct acpi_device *adev)</div><div class='ctx'> {</div><div class='del'>-	return adev-&gt;status.present &amp;&amp; adev-&gt;status.enabled;</div><div class='add'>+	return adev-&gt;status.enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool acpi_scan_handler_matching(struct acpi_scan_handler *handler,</div><div class='head'>diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c<br/>index 9fdcc620c652..2cc3821b2b16 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/video_detect.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/video_detect.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/video_detect.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/video_detect.c</a></div><div class='hunk'>@@ -499,6 +499,14 @@ static const struct dmi_system_id video_detect_dmi_table[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 	 .callback = video_detect_force_native,</div><div class='add'>+	 /* Lenovo Slim 7 16ARH7 */</div><div class='add'>+	 .matches = {</div><div class='add'>+		DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),</div><div class='add'>+		DMI_MATCH(DMI_PRODUCT_NAME, "82UX"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+	 .callback = video_detect_force_native,</div><div class='ctx'> 	 /* Lenovo ThinkPad X131e (3371 AMD version) */</div><div class='ctx'> 	 .matches = {</div><div class='ctx'> 		DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),</div><div class='head'>diff --git a/drivers/acpi/x86/Makefile b/drivers/acpi/x86/Makefile<br/>new file mode 100644<br/>index 000000000000..63c99509ed9d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/x86/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/x86/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+obj-$(CONFIG_ACPI)	+= acpi-x86.o</div><div class='add'>+acpi-x86-y		+= apple.o</div><div class='add'>+acpi-x86-y		+= cmos_rtc.o</div><div class='add'>+acpi-x86-$(CONFIG_PCI)	+= lpss.o</div><div class='add'>+acpi-x86-y		+= s2idle.o</div><div class='add'>+acpi-x86-y		+= utils.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_X86)	+= blacklist.o</div><div class='head'>diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/x86/blacklist.c<br/>index a558d24fb788..55214d0a12b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/blacklist.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/blacklist.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/x86/blacklist.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/x86/blacklist.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "internal.h"</div><div class='add'>+#include "../internal.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DMI</div><div class='ctx'> static const struct dmi_system_id acpi_rev_dmi_table[] __initconst;</div><div class='head'>diff --git a/drivers/acpi/acpi_cmos_rtc.c b/drivers/acpi/x86/cmos_rtc.c<br/>index 9b55d1593d16..51643ff6fe5f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_cmos_rtc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpi_cmos_rtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/x86/cmos_rtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/x86/cmos_rtc.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mc146818rtc.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "internal.h"</div><div class='add'>+#include "../internal.h"</div><div class='ctx'> </div><div class='ctx'> static const struct acpi_device_id acpi_cmos_rtc_ids[] = {</div><div class='ctx'> 	{ "PNP0B00" },</div><div class='head'>diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/x86/lpss.c<br/>index 04e273167e92..148e29c2c526 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_lpss.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/acpi_lpss.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/x86/lpss.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/x86/lpss.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "internal.h"</div><div class='add'>+#include "../internal.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_INTEL_LPSS</div><div class='ctx'> </div><div class='hunk'>@@ -325,6 +325,7 @@ static const struct lpss_device_desc bsw_i2c_dev_desc = {</div><div class='ctx'> </div><div class='ctx'> static const struct property_entry bsw_spi_properties[] = {</div><div class='ctx'> 	PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_BSW_SSP),</div><div class='add'>+	PROPERTY_ENTRY_U32("num-cs", 2),</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -886,10 +887,8 @@ static int acpi_lpss_activate(struct device *dev)</div><div class='ctx'> 	if (pdata-&gt;dev_desc-&gt;flags &amp; (LPSS_SAVE_CTX | LPSS_SAVE_CTX_ONCE))</div><div class='ctx'> 		lpss_deassert_reset(pdata);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='ctx'> 	if (pdata-&gt;dev_desc-&gt;flags &amp; LPSS_SAVE_CTX_ONCE)</div><div class='ctx'> 		acpi_lpss_save_ctx(dev, pdata);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c<br/>index cd84af23f7ea..dd0b40b9bbe8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/x86/s2idle.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/s2idle.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/x86/s2idle.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/x86/s2idle.c</a></div><div class='hunk'>@@ -492,16 +492,14 @@ static int lps0_device_attach(struct acpi_device *adev,</div><div class='ctx'> 			unsigned int func_mask;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='del'>-			 * Avoid evaluating the same _DSM function for two</div><div class='del'>-			 * different UUIDs and prioritize the MSFT one.</div><div class='add'>+			 * Log a message if the _DSM function sets for two</div><div class='add'>+			 * different UUIDs overlap.</div><div class='ctx'> 			 */</div><div class='ctx'> 			func_mask = lps0_dsm_func_mask &amp; lps0_dsm_func_mask_microsoft;</div><div class='del'>-			if (func_mask) {</div><div class='add'>+			if (func_mask)</div><div class='ctx'> 				acpi_handle_info(adev-&gt;handle,</div><div class='ctx'> 						 "Duplicate LPS0 _DSM functions (mask: 0x%x)\n",</div><div class='ctx'> 						 func_mask);</div><div class='del'>-				lps0_dsm_func_mask &amp;= ~func_mask;</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c<br/>index 90c3d2eab9e9..7dca73417e2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/x86/utils.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/acpi/x86/utils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/x86/utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/acpi/x86/utils.c</a></div><div class='hunk'>@@ -101,6 +101,15 @@ static const struct override_status_id override_status_ids[] = {</div><div class='ctx'> 	      }),</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * The Dell XPS 15 9550 has a SMO8110 accelerometer /</div><div class='add'>+	 * HDD freefall sensor which is wrongly marked as not present.</div><div class='add'>+	 */</div><div class='add'>+	PRESENT_ENTRY_HID("SMO8810", "1", SKYLAKE, {</div><div class='add'>+		DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+		DMI_MATCH(DMI_PRODUCT_NAME, "XPS 15 9550"),</div><div class='add'>+	      }),</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * The GPD win BIOS dated 20170221 has disabled the accelerometer, the</div><div class='ctx'> 	 * drivers sometimes cause crashes under Windows and this is how the</div><div class='ctx'> 	 * manufacturer has solved this :|  The DMI match may not seem unique,</div><div class='hunk'>@@ -260,9 +269,10 @@ bool force_storage_d3(void)</div><div class='ctx'> #define ACPI_QUIRK_SKIP_I2C_CLIENTS				BIT(0)</div><div class='ctx'> #define ACPI_QUIRK_UART1_SKIP					BIT(1)</div><div class='ctx'> #define ACPI_QUIRK_UART1_TTY_UART2_SKIP				BIT(2)</div><div class='del'>-#define ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY			BIT(3)</div><div class='del'>-#define ACPI_QUIRK_USE_ACPI_AC_AND_BATTERY			BIT(4)</div><div class='del'>-#define ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS			BIT(5)</div><div class='add'>+#define ACPI_QUIRK_PNP_UART1_SKIP				BIT(3)</div><div class='add'>+#define ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY			BIT(4)</div><div class='add'>+#define ACPI_QUIRK_USE_ACPI_AC_AND_BATTERY			BIT(5)</div><div class='add'>+#define ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS			BIT(6)</div><div class='ctx'> </div><div class='ctx'> static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -342,6 +352,7 @@ static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BIOS_VERSION, "BLADE_21"),</div><div class='ctx'> 		},</div><div class='ctx'> 		.driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS |</div><div class='add'>+					ACPI_QUIRK_PNP_UART1_SKIP |</div><div class='ctx'> 					ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY),</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -440,14 +451,18 @@ static int acpi_dmi_skip_serdev_enumeration(struct device *controller_parent, bo</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* to not match on PNP enumerated debug UARTs */</div><div class='del'>-	if (!dev_is_platform(controller_parent))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	dmi_id = dmi_first_match(acpi_quirk_skip_dmi_ids);</div><div class='ctx'> 	if (dmi_id)</div><div class='ctx'> 		quirks = (unsigned long)dmi_id-&gt;driver_data;</div><div class='ctx'> </div><div class='add'>+	if (!dev_is_platform(controller_parent)) {</div><div class='add'>+		/* PNP enumerated UARTs */</div><div class='add'>+		if ((quirks &amp; ACPI_QUIRK_PNP_UART1_SKIP) &amp;&amp; uid == 1)</div><div class='add'>+			*skip = true;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if ((quirks &amp; ACPI_QUIRK_UART1_SKIP) &amp;&amp; uid == 1)</div><div class='ctx'> 		*skip = true;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig<br/>index 928ec93c6b45..b595494ab9b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/Kconfig</a></div><div class='hunk'>@@ -556,7 +556,7 @@ comment "PATA SFF controllers with BMDMA"</div><div class='ctx'> </div><div class='ctx'> config PATA_ALI</div><div class='ctx'> 	tristate "ALi PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select PATA_TIMINGS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the ALi ATA interfaces</div><div class='hunk'>@@ -566,7 +566,7 @@ config PATA_ALI</div><div class='ctx'> </div><div class='ctx'> config PATA_AMD</div><div class='ctx'> 	tristate "AMD/NVidia PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select PATA_TIMINGS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the AMD and NVidia PATA</div><div class='hunk'>@@ -584,7 +584,7 @@ config PATA_ARASAN_CF</div><div class='ctx'> </div><div class='ctx'> config PATA_ARTOP</div><div class='ctx'> 	tristate "ARTOP 6210/6260 PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for ARTOP PATA controllers.</div><div class='ctx'> </div><div class='hunk'>@@ -611,7 +611,7 @@ config PATA_ATP867X</div><div class='ctx'> </div><div class='ctx'> config PATA_CMD64X</div><div class='ctx'> 	tristate "CMD64x PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select PATA_TIMINGS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the CMD64x series chips</div><div class='hunk'>@@ -658,7 +658,7 @@ config PATA_CS5536</div><div class='ctx'> </div><div class='ctx'> config PATA_CYPRESS</div><div class='ctx'> 	tristate "Cypress CY82C693 PATA support (Very Experimental)"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select PATA_TIMINGS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Cypress/Contaq CY82C693</div><div class='hunk'>@@ -706,7 +706,7 @@ config PATA_HPT366</div><div class='ctx'> </div><div class='ctx'> config PATA_HPT37X</div><div class='ctx'> 	tristate "HPT 370/370A/371/372/374/302 PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the majority of the later HPT</div><div class='ctx'> 	  PATA controllers via the new ATA layer.</div><div class='hunk'>@@ -715,7 +715,7 @@ config PATA_HPT37X</div><div class='ctx'> </div><div class='ctx'> config PATA_HPT3X2N</div><div class='ctx'> 	tristate "HPT 371N/372N/302N PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the N variant HPT PATA</div><div class='ctx'> 	  controllers via the new ATA layer.</div><div class='hunk'>@@ -818,7 +818,7 @@ config PATA_MPC52xx</div><div class='ctx'> </div><div class='ctx'> config PATA_NETCELL</div><div class='ctx'> 	tristate "NETCELL Revolution RAID support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Netcell Revolution RAID</div><div class='ctx'> 	  PATA controller.</div><div class='hunk'>@@ -854,7 +854,7 @@ config PATA_OLDPIIX</div><div class='ctx'> </div><div class='ctx'> config PATA_OPTIDMA</div><div class='ctx'> 	tristate "OPTI FireStar PATA support (Very Experimental)"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables DMA/PIO support for the later OPTi</div><div class='ctx'> 	  controllers found on some old motherboards and in some</div><div class='hunk'>@@ -864,7 +864,7 @@ config PATA_OPTIDMA</div><div class='ctx'> </div><div class='ctx'> config PATA_PDC2027X</div><div class='ctx'> 	tristate "Promise PATA 2027x support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for Promise PATA pdc20268 to pdc20277 host adapters.</div><div class='ctx'> </div><div class='hunk'>@@ -872,7 +872,7 @@ config PATA_PDC2027X</div><div class='ctx'> </div><div class='ctx'> config PATA_PDC_OLD</div><div class='ctx'> 	tristate "Older Promise PATA controller support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Promise 20246, 20262, 20263,</div><div class='ctx'> 	  20265 and 20267 adapters.</div><div class='hunk'>@@ -900,7 +900,7 @@ config PATA_RDC</div><div class='ctx'> </div><div class='ctx'> config PATA_SC1200</div><div class='ctx'> 	tristate "SC1200 PATA support"</div><div class='del'>-	depends on PCI &amp;&amp; (X86_32 || COMPILE_TEST)</div><div class='add'>+	depends on PCI &amp;&amp; (X86_32 || COMPILE_TEST) &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the NatSemi/AMD SC1200 SoC</div><div class='ctx'> 	  companion chip used with the Geode processor family.</div><div class='hunk'>@@ -918,7 +918,7 @@ config PATA_SCH</div><div class='ctx'> </div><div class='ctx'> config PATA_SERVERWORKS</div><div class='ctx'> 	tristate "SERVERWORKS OSB4/CSB5/CSB6/HT1000 PATA support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Serverworks OSB4/CSB5/CSB6 and</div><div class='ctx'> 	  HT1000 PATA controllers, via the new ATA layer.</div><div class='hunk'>@@ -1182,7 +1182,7 @@ config ATA_GENERIC</div><div class='ctx'> </div><div class='ctx'> config PATA_LEGACY</div><div class='ctx'> 	tristate "Legacy ISA PATA support (Experimental)"</div><div class='del'>-	depends on (ISA || PCI)</div><div class='add'>+	depends on (ISA || PCI) &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select PATA_TIMINGS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for ISA/VLB/PCI bus legacy PATA</div><div class='head'>diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h<br/>index 344c87210d8f..8f40f75ba08c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/ahci.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/ahci.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/ahci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/ahci.h</a></div><div class='hunk'>@@ -397,7 +397,7 @@ extern const struct attribute_group *ahci_sdev_groups[];</div><div class='ctx'> 	.sdev_groups		= ahci_sdev_groups,			\</div><div class='ctx'> 	.change_queue_depth     = ata_scsi_change_queue_depth,		\</div><div class='ctx'> 	.tag_alloc_policy       = BLK_TAG_ALLOC_RR,             	\</div><div class='del'>-	.slave_configure        = ata_scsi_slave_config</div><div class='add'>+	.device_configure	= ata_scsi_device_configure</div><div class='ctx'> </div><div class='ctx'> extern struct ata_port_operations ahci_ops;</div><div class='ctx'> extern struct ata_port_operations ahci_platform_ops;</div><div class='head'>diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c<br/>index c449d60d9bb9..4f35aab81a0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata-core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/libata-core.c</a></div><div class='hunk'>@@ -1480,19 +1480,19 @@ static void ata_qc_complete_internal(struct ata_queued_cmd *qc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *	ata_exec_internal_sg - execute libata internal command</div><div class='add'>+ *	ata_exec_internal - execute libata internal command</div><div class='ctx'>  *	@dev: Device to which the command is sent</div><div class='ctx'>  *	@tf: Taskfile registers for the command and the result</div><div class='ctx'>  *	@cdb: CDB for packet command</div><div class='ctx'>  *	@dma_dir: Data transfer direction of the command</div><div class='del'>- *	@sgl: sg list for the data buffer of the command</div><div class='del'>- *	@n_elem: Number of sg entries</div><div class='add'>+ *	@buf: Data buffer of the command</div><div class='add'>+ *	@buflen: Length of data buffer</div><div class='ctx'>  *	@timeout: Timeout in msecs (0 for default)</div><div class='ctx'>  *</div><div class='del'>- *	Executes libata internal command with timeout.  @tf contains</div><div class='del'>- *	command on entry and result on return.  Timeout and error</div><div class='del'>- *	conditions are reported via return value.  No recovery action</div><div class='del'>- *	is taken after a command times out.  It's caller's duty to</div><div class='add'>+ *	Executes libata internal command with timeout. @tf contains</div><div class='add'>+ *	the command on entry and the result on return. Timeout and error</div><div class='add'>+ *	conditions are reported via the return value. No recovery action</div><div class='add'>+ *	is taken after a command times out. It is the caller's duty to</div><div class='ctx'>  *	clean up after timeout.</div><div class='ctx'>  *</div><div class='ctx'>  *	LOCKING:</div><div class='hunk'>@@ -1501,34 +1501,38 @@ static void ata_qc_complete_internal(struct ata_queued_cmd *qc)</div><div class='ctx'>  *	RETURNS:</div><div class='ctx'>  *	Zero on success, AC_ERR_* mask on failure</div><div class='ctx'>  */</div><div class='del'>-static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='del'>-				     struct ata_taskfile *tf, const u8 *cdb,</div><div class='del'>-				     int dma_dir, struct scatterlist *sgl,</div><div class='del'>-				     unsigned int n_elem, unsigned int timeout)</div><div class='add'>+unsigned int ata_exec_internal(struct ata_device *dev, struct ata_taskfile *tf,</div><div class='add'>+			       const u8 *cdb, enum dma_data_direction dma_dir,</div><div class='add'>+			       void *buf, unsigned int buflen,</div><div class='add'>+			       unsigned int timeout)</div><div class='ctx'> {</div><div class='ctx'> 	struct ata_link *link = dev-&gt;link;</div><div class='ctx'> 	struct ata_port *ap = link-&gt;ap;</div><div class='ctx'> 	u8 command = tf-&gt;command;</div><div class='del'>-	int auto_timeout = 0;</div><div class='ctx'> 	struct ata_queued_cmd *qc;</div><div class='add'>+	struct scatterlist sgl;</div><div class='ctx'> 	unsigned int preempted_tag;</div><div class='ctx'> 	u32 preempted_sactive;</div><div class='ctx'> 	u64 preempted_qc_active;</div><div class='ctx'> 	int preempted_nr_active_links;</div><div class='add'>+	bool auto_timeout = false;</div><div class='ctx'> 	DECLARE_COMPLETION_ONSTACK(wait);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned int err_mask;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON(dma_dir != DMA_NONE &amp;&amp; !buf))</div><div class='add'>+		return AC_ERR_INVALID;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	/* no internal command while frozen */</div><div class='add'>+	/* No internal command while frozen */</div><div class='ctx'> 	if (ata_port_is_frozen(ap)) {</div><div class='ctx'> 		spin_unlock_irqrestore(ap-&gt;lock, flags);</div><div class='ctx'> 		return AC_ERR_SYSTEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* initialize internal qc */</div><div class='add'>+	/* Initialize internal qc */</div><div class='ctx'> 	qc = __ata_qc_from_tag(ap, ATA_TAG_INTERNAL);</div><div class='ctx'> </div><div class='ctx'> 	qc-&gt;tag = ATA_TAG_INTERNAL;</div><div class='hunk'>@@ -1547,12 +1551,12 @@ static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='ctx'> 	ap-&gt;qc_active = 0;</div><div class='ctx'> 	ap-&gt;nr_active_links = 0;</div><div class='ctx'> </div><div class='del'>-	/* prepare &amp; issue qc */</div><div class='add'>+	/* Prepare and issue qc */</div><div class='ctx'> 	qc-&gt;tf = *tf;</div><div class='ctx'> 	if (cdb)</div><div class='ctx'> 		memcpy(qc-&gt;cdb, cdb, ATAPI_CDB_LEN);</div><div class='ctx'> </div><div class='del'>-	/* some SATA bridges need us to indicate data xfer direction */</div><div class='add'>+	/* Some SATA bridges need us to indicate data xfer direction */</div><div class='ctx'> 	if (tf-&gt;protocol == ATAPI_PROT_DMA &amp;&amp; (dev-&gt;flags &amp; ATA_DFLAG_DMADIR) &amp;&amp;</div><div class='ctx'> 	    dma_dir == DMA_FROM_DEVICE)</div><div class='ctx'> 		qc-&gt;tf.feature |= ATAPI_DMADIR;</div><div class='hunk'>@@ -1560,13 +1564,8 @@ static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='ctx'> 	qc-&gt;flags |= ATA_QCFLAG_RESULT_TF;</div><div class='ctx'> 	qc-&gt;dma_dir = dma_dir;</div><div class='ctx'> 	if (dma_dir != DMA_NONE) {</div><div class='del'>-		unsigned int i, buflen = 0;</div><div class='del'>-		struct scatterlist *sg;</div><div class='del'>-</div><div class='del'>-		for_each_sg(sgl, sg, n_elem, i)</div><div class='del'>-			buflen += sg-&gt;length;</div><div class='del'>-</div><div class='del'>-		ata_sg_init(qc, sgl, n_elem);</div><div class='add'>+		sg_init_one(&amp;sgl, buf, buflen);</div><div class='add'>+		ata_sg_init(qc, &amp;sgl, 1);</div><div class='ctx'> 		qc-&gt;nbytes = buflen;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1578,11 +1577,11 @@ static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='ctx'> 	spin_unlock_irqrestore(ap-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (!timeout) {</div><div class='del'>-		if (ata_probe_timeout)</div><div class='add'>+		if (ata_probe_timeout) {</div><div class='ctx'> 			timeout = ata_probe_timeout * 1000;</div><div class='del'>-		else {</div><div class='add'>+		} else {</div><div class='ctx'> 			timeout = ata_internal_cmd_timeout(dev, command);</div><div class='del'>-			auto_timeout = 1;</div><div class='add'>+			auto_timeout = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1595,30 +1594,25 @@ static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='ctx'> 	ata_sff_flush_pio_task(ap);</div><div class='ctx'> </div><div class='ctx'> 	if (!rc) {</div><div class='del'>-		spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-		/* We're racing with irq here.  If we lose, the</div><div class='del'>-		 * following test prevents us from completing the qc</div><div class='del'>-		 * twice.  If we win, the port is frozen and will be</div><div class='del'>-		 * cleaned up by -&gt;post_internal_cmd().</div><div class='add'>+		/*</div><div class='add'>+		 * We are racing with irq here. If we lose, the following test</div><div class='add'>+		 * prevents us from completing the qc twice. If we win, the port</div><div class='add'>+		 * is frozen and will be cleaned up by -&gt;post_internal_cmd().</div><div class='ctx'> 		 */</div><div class='add'>+		spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='ctx'> 		if (qc-&gt;flags &amp; ATA_QCFLAG_ACTIVE) {</div><div class='ctx'> 			qc-&gt;err_mask |= AC_ERR_TIMEOUT;</div><div class='del'>-</div><div class='ctx'> 			ata_port_freeze(ap);</div><div class='del'>-</div><div class='ctx'> 			ata_dev_warn(dev, "qc timeout after %u msecs (cmd 0x%x)\n",</div><div class='ctx'> 				     timeout, command);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 		spin_unlock_irqrestore(ap-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* do post_internal_cmd */</div><div class='ctx'> 	if (ap-&gt;ops-&gt;post_internal_cmd)</div><div class='ctx'> 		ap-&gt;ops-&gt;post_internal_cmd(qc);</div><div class='ctx'> </div><div class='del'>-	/* perform minimal error analysis */</div><div class='add'>+	/* Perform minimal error analysis */</div><div class='ctx'> 	if (qc-&gt;flags &amp; ATA_QCFLAG_EH) {</div><div class='ctx'> 		if (qc-&gt;result_tf.status &amp; (ATA_ERR | ATA_DF))</div><div class='ctx'> 			qc-&gt;err_mask |= AC_ERR_DEV;</div><div class='hunk'>@@ -1632,7 +1626,7 @@ static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='ctx'> 		qc-&gt;result_tf.status |= ATA_SENSE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* finish up */</div><div class='add'>+	/* Finish up */</div><div class='ctx'> 	spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	*tf = qc-&gt;result_tf;</div><div class='hunk'>@@ -1653,44 +1647,6 @@ static unsigned ata_exec_internal_sg(struct ata_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *	ata_exec_internal - execute libata internal command</div><div class='del'>- *	@dev: Device to which the command is sent</div><div class='del'>- *	@tf: Taskfile registers for the command and the result</div><div class='del'>- *	@cdb: CDB for packet command</div><div class='del'>- *	@dma_dir: Data transfer direction of the command</div><div class='del'>- *	@buf: Data buffer of the command</div><div class='del'>- *	@buflen: Length of data buffer</div><div class='del'>- *	@timeout: Timeout in msecs (0 for default)</div><div class='del'>- *</div><div class='del'>- *	Wrapper around ata_exec_internal_sg() which takes simple</div><div class='del'>- *	buffer instead of sg list.</div><div class='del'>- *</div><div class='del'>- *	LOCKING:</div><div class='del'>- *	None.  Should be called with kernel context, might sleep.</div><div class='del'>- *</div><div class='del'>- *	RETURNS:</div><div class='del'>- *	Zero on success, AC_ERR_* mask on failure</div><div class='del'>- */</div><div class='del'>-unsigned ata_exec_internal(struct ata_device *dev,</div><div class='del'>-			   struct ata_taskfile *tf, const u8 *cdb,</div><div class='del'>-			   int dma_dir, void *buf, unsigned int buflen,</div><div class='del'>-			   unsigned int timeout)</div><div class='del'>-{</div><div class='del'>-	struct scatterlist *psg = NULL, sg;</div><div class='del'>-	unsigned int n_elem = 0;</div><div class='del'>-</div><div class='del'>-	if (dma_dir != DMA_NONE) {</div><div class='del'>-		WARN_ON(!buf);</div><div class='del'>-		sg_init_one(&amp;sg, buf, buflen);</div><div class='del'>-		psg = &amp;sg;</div><div class='del'>-		n_elem++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,</div><div class='del'>-				    timeout);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  *	ata_pio_need_iordy	-	check if iordy needed</div><div class='ctx'>  *	@adev: ATA device</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/ata/libata-sata.c b/drivers/ata/libata-sata.c<br/>index 0fb1934875f2..9e047bf912b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata-sata.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-sata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata-sata.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/libata-sata.c</a></div><div class='hunk'>@@ -848,80 +848,143 @@ DEVICE_ATTR(link_power_management_policy, S_IRUGO | S_IWUSR,</div><div class='ctx'> 	    ata_scsi_lpm_show, ata_scsi_lpm_store);</div><div class='ctx'> EXPORT_SYMBOL_GPL(dev_attr_link_power_management_policy);</div><div class='ctx'> </div><div class='del'>-static ssize_t ata_ncq_prio_supported_show(struct device *device,</div><div class='del'>-					   struct device_attribute *attr,</div><div class='del'>-					   char *buf)</div><div class='add'>+/**</div><div class='add'>+ *	ata_ncq_prio_supported - Check if device supports NCQ Priority</div><div class='add'>+ *	@ap: ATA port of the target device</div><div class='add'>+ *	@sdev: SCSI device</div><div class='add'>+ *	@supported: Address of a boolean to store the result</div><div class='add'>+ *</div><div class='add'>+ *	Helper to check if device supports NCQ Priority feature.</div><div class='add'>+ *</div><div class='add'>+ *	Context: Any context. Takes and releases @ap-&gt;lock.</div><div class='add'>+ *</div><div class='add'>+ *	Return:</div><div class='add'>+ *	* %0		- OK. Status is stored into @supported</div><div class='add'>+ *	* %-ENODEV	- Failed to find the ATA device</div><div class='add'>+ */</div><div class='add'>+int ata_ncq_prio_supported(struct ata_port *ap, struct scsi_device *sdev,</div><div class='add'>+			   bool *supported)</div><div class='ctx'> {</div><div class='del'>-	struct scsi_device *sdev = to_scsi_device(device);</div><div class='del'>-	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='ctx'> 	struct ata_device *dev;</div><div class='del'>-	bool ncq_prio_supported;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(ap-&gt;lock);</div><div class='add'>+	spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='ctx'> 	dev = ata_scsi_find_dev(ap, sdev);</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 	else</div><div class='del'>-		ncq_prio_supported = dev-&gt;flags &amp; ATA_DFLAG_NCQ_PRIO;</div><div class='del'>-	spin_unlock_irq(ap-&gt;lock);</div><div class='add'>+		*supported = dev-&gt;flags &amp; ATA_DFLAG_NCQ_PRIO;</div><div class='add'>+	spin_unlock_irqrestore(ap-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_ncq_prio_supported);</div><div class='add'>+</div><div class='add'>+static ssize_t ata_ncq_prio_supported_show(struct device *device,</div><div class='add'>+					   struct device_attribute *attr,</div><div class='add'>+					   char *buf)</div><div class='add'>+{</div><div class='add'>+	struct scsi_device *sdev = to_scsi_device(device);</div><div class='add'>+	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='add'>+	bool supported;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ata_ncq_prio_supported(ap, sdev, &amp;supported);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='del'>-	return rc ? rc : sysfs_emit(buf, "%u\n", ncq_prio_supported);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", supported);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> DEVICE_ATTR(ncq_prio_supported, S_IRUGO, ata_ncq_prio_supported_show, NULL);</div><div class='ctx'> EXPORT_SYMBOL_GPL(dev_attr_ncq_prio_supported);</div><div class='ctx'> </div><div class='del'>-static ssize_t ata_ncq_prio_enable_show(struct device *device,</div><div class='del'>-					struct device_attribute *attr,</div><div class='del'>-					char *buf)</div><div class='add'>+/**</div><div class='add'>+ *	ata_ncq_prio_enabled - Check if NCQ Priority is enabled</div><div class='add'>+ *	@ap: ATA port of the target device</div><div class='add'>+ *	@sdev: SCSI device</div><div class='add'>+ *	@enabled: Address of a boolean to store the result</div><div class='add'>+ *</div><div class='add'>+ *	Helper to check if NCQ Priority feature is enabled.</div><div class='add'>+ *</div><div class='add'>+ *	Context: Any context. Takes and releases @ap-&gt;lock.</div><div class='add'>+ *</div><div class='add'>+ *	Return:</div><div class='add'>+ *	* %0		- OK. Status is stored into @enabled</div><div class='add'>+ *	* %-ENODEV	- Failed to find the ATA device</div><div class='add'>+ */</div><div class='add'>+int ata_ncq_prio_enabled(struct ata_port *ap, struct scsi_device *sdev,</div><div class='add'>+			 bool *enabled)</div><div class='ctx'> {</div><div class='del'>-	struct scsi_device *sdev = to_scsi_device(device);</div><div class='del'>-	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='ctx'> 	struct ata_device *dev;</div><div class='del'>-	bool ncq_prio_enable;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(ap-&gt;lock);</div><div class='add'>+	spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='ctx'> 	dev = ata_scsi_find_dev(ap, sdev);</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 	else</div><div class='del'>-		ncq_prio_enable = dev-&gt;flags &amp; ATA_DFLAG_NCQ_PRIO_ENABLED;</div><div class='del'>-	spin_unlock_irq(ap-&gt;lock);</div><div class='add'>+		*enabled = dev-&gt;flags &amp; ATA_DFLAG_NCQ_PRIO_ENABLED;</div><div class='add'>+	spin_unlock_irqrestore(ap-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	return rc ? rc : sysfs_emit(buf, "%u\n", ncq_prio_enable);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_ncq_prio_enabled);</div><div class='ctx'> </div><div class='del'>-static ssize_t ata_ncq_prio_enable_store(struct device *device,</div><div class='del'>-					 struct device_attribute *attr,</div><div class='del'>-					 const char *buf, size_t len)</div><div class='add'>+static ssize_t ata_ncq_prio_enable_show(struct device *device,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct scsi_device *sdev = to_scsi_device(device);</div><div class='del'>-	struct ata_port *ap;</div><div class='del'>-	struct ata_device *dev;</div><div class='del'>-	long int input;</div><div class='del'>-	int rc = 0;</div><div class='add'>+	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='add'>+	bool enabled;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	rc = kstrtol(buf, 10, &amp;input);</div><div class='add'>+	rc = ata_ncq_prio_enabled(ap, sdev, &amp;enabled);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='del'>-	if ((input &lt; 0) || (input &gt; 1))</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ap = ata_shost_to_port(sdev-&gt;host);</div><div class='del'>-	dev = ata_scsi_find_dev(ap, sdev);</div><div class='del'>-	if (unlikely(!dev))</div><div class='del'>-		return  -ENODEV;</div><div class='add'>+	return sysfs_emit(buf, "%d\n", enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *	ata_ncq_prio_enable - Enable/disable NCQ Priority</div><div class='add'>+ *	@ap: ATA port of the target device</div><div class='add'>+ *	@sdev: SCSI device</div><div class='add'>+ *	@enable: true - enable NCQ Priority, false - disable NCQ Priority</div><div class='add'>+ *</div><div class='add'>+ *	Helper to enable/disable NCQ Priority feature.</div><div class='add'>+ *</div><div class='add'>+ *	Context: Any context. Takes and releases @ap-&gt;lock.</div><div class='add'>+ *</div><div class='add'>+ *	Return:</div><div class='add'>+ *	* %0		- OK. Status is stored into @enabled</div><div class='add'>+ *	* %-ENODEV	- Failed to find the ATA device</div><div class='add'>+ *	* %-EINVAL	- NCQ Priority is not supported or CDL is enabled</div><div class='add'>+ */</div><div class='add'>+int ata_ncq_prio_enable(struct ata_port *ap, struct scsi_device *sdev,</div><div class='add'>+			bool enable)</div><div class='add'>+{</div><div class='add'>+	struct ata_device *dev;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(ap-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(ap-&gt;lock);</div><div class='add'>+	dev = ata_scsi_find_dev(ap, sdev);</div><div class='add'>+	if (!dev) {</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!(dev-&gt;flags &amp; ATA_DFLAG_NCQ_PRIO)) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (input) {</div><div class='add'>+	if (enable) {</div><div class='ctx'> 		if (dev-&gt;flags &amp; ATA_DFLAG_CDL_ENABLED) {</div><div class='ctx'> 			ata_dev_err(dev,</div><div class='ctx'> 				"CDL must be disabled to enable NCQ priority\n");</div><div class='hunk'>@@ -934,9 +997,30 @@ static ssize_t ata_ncq_prio_enable_store(struct device *device,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='del'>-	spin_unlock_irq(ap-&gt;lock);</div><div class='add'>+	spin_unlock_irqrestore(ap-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_ncq_prio_enable);</div><div class='add'>+</div><div class='add'>+static ssize_t ata_ncq_prio_enable_store(struct device *device,</div><div class='add'>+					 struct device_attribute *attr,</div><div class='add'>+					 const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct scsi_device *sdev = to_scsi_device(device);</div><div class='add'>+	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='add'>+	bool enable;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = kstrtobool(buf, &amp;enable);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = ata_ncq_prio_enable(ap, sdev, enable);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='del'>-	return rc ? rc : len;</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> DEVICE_ATTR(ncq_prio_enable, S_IRUGO | S_IWUSR,</div><div class='hunk'>@@ -1170,21 +1254,24 @@ void ata_sas_tport_delete(struct ata_port *ap)</div><div class='ctx'> EXPORT_SYMBOL_GPL(ata_sas_tport_delete);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *	ata_sas_slave_configure - Default slave_config routine for libata devices</div><div class='add'>+ *	ata_sas_device_configure - Default device_configure routine for libata</div><div class='add'>+ *				   devices</div><div class='ctx'>  *	@sdev: SCSI device to configure</div><div class='add'>+ *	@lim: queue limits</div><div class='ctx'>  *	@ap: ATA port to which SCSI device is attached</div><div class='ctx'>  *</div><div class='ctx'>  *	RETURNS:</div><div class='ctx'>  *	Zero.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int ata_sas_slave_configure(struct scsi_device *sdev, struct ata_port *ap)</div><div class='add'>+int ata_sas_device_configure(struct scsi_device *sdev, struct queue_limits *lim,</div><div class='add'>+		struct ata_port *ap)</div><div class='ctx'> {</div><div class='ctx'> 	ata_scsi_sdev_config(sdev);</div><div class='ctx'> </div><div class='del'>-	return ata_scsi_dev_config(sdev, ap-&gt;link.device);</div><div class='add'>+	return ata_scsi_dev_config(sdev, lim, ap-&gt;link.device);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(ata_sas_slave_configure);</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_sas_device_configure);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	ata_sas_queuecmd - Issue SCSI cdb to libata-managed device</div><div class='head'>diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c<br/>index e954976891a9..cdf29b178ddc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata-scsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-scsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata-scsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/libata-scsi.c</a></div><div class='hunk'>@@ -1021,7 +1021,8 @@ bool ata_scsi_dma_need_drain(struct request *rq)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ata_scsi_dma_need_drain);</div><div class='ctx'> </div><div class='del'>-int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev)</div><div class='add'>+int ata_scsi_dev_config(struct scsi_device *sdev, struct queue_limits *lim,</div><div class='add'>+		struct ata_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = sdev-&gt;request_queue;</div><div class='ctx'> 	int depth = 1;</div><div class='hunk'>@@ -1031,7 +1032,7 @@ int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* configure max sectors */</div><div class='ctx'> 	dev-&gt;max_sectors = min(dev-&gt;max_sectors, sdev-&gt;host-&gt;max_sectors);</div><div class='del'>-	blk_queue_max_hw_sectors(q, dev-&gt;max_sectors);</div><div class='add'>+	lim-&gt;max_hw_sectors = dev-&gt;max_sectors;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;class == ATA_DEV_ATAPI) {</div><div class='ctx'> 		sdev-&gt;sector_size = ATA_SECT_SIZE;</div><div class='hunk'>@@ -1040,7 +1041,7 @@ int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev)</div><div class='ctx'> 		blk_queue_update_dma_pad(q, ATA_DMA_PAD_SZ - 1);</div><div class='ctx'> </div><div class='ctx'> 		/* make room for appending the drain */</div><div class='del'>-		blk_queue_max_segments(q, queue_max_segments(q) - 1);</div><div class='add'>+		lim-&gt;max_segments--;</div><div class='ctx'> </div><div class='ctx'> 		sdev-&gt;dma_drain_len = ATAPI_MAX_DRAIN;</div><div class='ctx'> 		sdev-&gt;dma_drain_buf = kmalloc(sdev-&gt;dma_drain_len, GFP_NOIO);</div><div class='hunk'>@@ -1077,7 +1078,7 @@ int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev)</div><div class='ctx'> 			"sector_size=%u &gt; PAGE_SIZE, PIO may malfunction\n",</div><div class='ctx'> 			sdev-&gt;sector_size);</div><div class='ctx'> </div><div class='del'>-	blk_queue_update_dma_alignment(q, sdev-&gt;sector_size - 1);</div><div class='add'>+	lim-&gt;dma_alignment = sdev-&gt;sector_size - 1;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; ATA_DFLAG_AN)</div><div class='ctx'> 		set_bit(SDEV_EVT_MEDIA_CHANGE, sdev-&gt;supported_events);</div><div class='hunk'>@@ -1131,8 +1132,9 @@ int ata_scsi_slave_alloc(struct scsi_device *sdev)</div><div class='ctx'> EXPORT_SYMBOL_GPL(ata_scsi_slave_alloc);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *	ata_scsi_slave_config - Set SCSI device attributes</div><div class='add'>+ *	ata_scsi_device_configure - Set SCSI device attributes</div><div class='ctx'>  *	@sdev: SCSI device to examine</div><div class='add'>+ *	@lim: queue limits</div><div class='ctx'>  *</div><div class='ctx'>  *	This is called before we actually start reading</div><div class='ctx'>  *	and writing to the device, to configure certain</div><div class='hunk'>@@ -1142,17 +1144,18 @@ EXPORT_SYMBOL_GPL(ata_scsi_slave_alloc);</div><div class='ctx'>  *	Defined by SCSI layer.  We don't really care.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int ata_scsi_slave_config(struct scsi_device *sdev)</div><div class='add'>+int ata_scsi_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim)</div><div class='ctx'> {</div><div class='ctx'> 	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='ctx'> 	struct ata_device *dev = __ata_scsi_find_dev(ap, sdev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev)</div><div class='del'>-		return ata_scsi_dev_config(sdev, dev);</div><div class='add'>+		return ata_scsi_dev_config(sdev, lim, dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(ata_scsi_slave_config);</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_scsi_device_configure);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	ata_scsi_slave_destroy - SCSI device is about to be destroyed</div><div class='head'>diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c<br/>index 95a19c4ef2a1..250f7dae05fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata-sff.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata-sff.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata-sff.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/libata-sff.c</a></div><div class='hunk'>@@ -3032,6 +3032,7 @@ EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);</div><div class='ctx'>  */</div><div class='ctx'> int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_HAS_IOPORT</div><div class='ctx'> 	unsigned long bmdma = pci_resource_start(pdev, 4);</div><div class='ctx'> 	u8 simplex;</div><div class='ctx'> </div><div class='hunk'>@@ -3044,6 +3045,9 @@ int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)</div><div class='ctx'> 	if (simplex &amp; 0x80)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	return 0;</div><div class='add'>+#else</div><div class='add'>+	return -ENOENT;</div><div class='add'>+#endif /* CONFIG_HAS_IOPORT */</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h<br/>index 5c685bb1939e..38ce13b55474 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/libata.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/libata.h</a></div><div class='hunk'>@@ -50,10 +50,10 @@ extern int ata_build_rw_tf(struct ata_queued_cmd *qc, u64 block, u32 n_block,</div><div class='ctx'> 			   unsigned int tf_flags, int dld, int class);</div><div class='ctx'> extern u64 ata_tf_read_block(const struct ata_taskfile *tf,</div><div class='ctx'> 			     struct ata_device *dev);</div><div class='del'>-extern unsigned ata_exec_internal(struct ata_device *dev,</div><div class='del'>-				  struct ata_taskfile *tf, const u8 *cdb,</div><div class='del'>-				  int dma_dir, void *buf, unsigned int buflen,</div><div class='del'>-				  unsigned int timeout);</div><div class='add'>+unsigned int ata_exec_internal(struct ata_device *dev, struct ata_taskfile *tf,</div><div class='add'>+			       const u8 *cdb, enum dma_data_direction dma_dir,</div><div class='add'>+			       void *buf, unsigned int buflen,</div><div class='add'>+			       unsigned int timeout);</div><div class='ctx'> extern int ata_wait_ready(struct ata_link *link, unsigned long deadline,</div><div class='ctx'> 			  int (*check_ready)(struct ata_link *link));</div><div class='ctx'> extern int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,</div><div class='hunk'>@@ -131,7 +131,8 @@ extern void ata_scsi_dev_rescan(struct work_struct *work);</div><div class='ctx'> extern int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel,</div><div class='ctx'> 			      unsigned int id, u64 lun);</div><div class='ctx'> void ata_scsi_sdev_config(struct scsi_device *sdev);</div><div class='del'>-int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev);</div><div class='add'>+int ata_scsi_dev_config(struct scsi_device *sdev, struct queue_limits *lim,</div><div class='add'>+		struct ata_device *dev);</div><div class='ctx'> int __ata_scsi_queuecmd(struct scsi_cmnd *scmd, struct ata_device *dev);</div><div class='ctx'> </div><div class='ctx'> /* libata-eh.c */</div><div class='head'>diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c<br/>index 448a511cbc17..e7ac142c2423 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/pata_legacy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/pata_legacy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/pata_legacy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/pata_legacy.c</a></div><div class='hunk'>@@ -173,8 +173,6 @@ static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };</div><div class='ctx'> static struct legacy_probe probe_list[NR_HOST];</div><div class='ctx'> static struct legacy_data legacy_data[NR_HOST];</div><div class='ctx'> static struct ata_host *legacy_host[NR_HOST];</div><div class='del'>-static int nr_legacy_host;</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	legacy_probe_add	-	Add interface to probe list</div><div class='hunk'>@@ -1276,9 +1274,11 @@ static __exit void legacy_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nr_legacy_host; i++) {</div><div class='add'>+	for (i = 0; i &lt; NR_HOST; i++) {</div><div class='ctx'> 		struct legacy_data *ld = &amp;legacy_data[i];</div><div class='del'>-		ata_host_detach(legacy_host[i]);</div><div class='add'>+</div><div class='add'>+		if (legacy_host[i])</div><div class='add'>+			ata_host_detach(legacy_host[i]);</div><div class='ctx'> 		platform_device_unregister(ld-&gt;platform_dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/ata/pata_macio.c b/drivers/ata/pata_macio.c<br/>index 88b2e9817f49..817838e2f70e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/pata_macio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/pata_macio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/pata_macio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/pata_macio.c</a></div><div class='hunk'>@@ -796,7 +796,8 @@ static void pata_macio_reset_hw(struct pata_macio_priv *priv, int resume)</div><div class='ctx'> /* Hook the standard slave config to fixup some HW related alignment</div><div class='ctx'>  * restrictions</div><div class='ctx'>  */</div><div class='del'>-static int pata_macio_slave_config(struct scsi_device *sdev)</div><div class='add'>+static int pata_macio_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim)</div><div class='ctx'> {</div><div class='ctx'> 	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='ctx'> 	struct pata_macio_priv *priv = ap-&gt;private_data;</div><div class='hunk'>@@ -805,7 +806,7 @@ static int pata_macio_slave_config(struct scsi_device *sdev)</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* First call original */</div><div class='del'>-	rc = ata_scsi_slave_config(sdev);</div><div class='add'>+	rc = ata_scsi_device_configure(sdev, lim);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='hunk'>@@ -814,7 +815,7 @@ static int pata_macio_slave_config(struct scsi_device *sdev)</div><div class='ctx'> </div><div class='ctx'> 	/* OHare has issues with non cache aligned DMA on some chipsets */</div><div class='ctx'> 	if (priv-&gt;kind == controller_ohare) {</div><div class='del'>-		blk_queue_update_dma_alignment(sdev-&gt;request_queue, 31);</div><div class='add'>+		lim-&gt;dma_alignment = 31;</div><div class='ctx'> 		blk_queue_update_dma_pad(sdev-&gt;request_queue, 31);</div><div class='ctx'> </div><div class='ctx'> 		/* Tell the world about it */</div><div class='hunk'>@@ -829,7 +830,7 @@ static int pata_macio_slave_config(struct scsi_device *sdev)</div><div class='ctx'> 	/* Shasta and K2 seem to have "issues" with reads ... */</div><div class='ctx'> 	if (priv-&gt;kind == controller_sh_ata6 || priv-&gt;kind == controller_k2_ata6) {</div><div class='ctx'> 		/* Allright these are bad, apply restrictions */</div><div class='del'>-		blk_queue_update_dma_alignment(sdev-&gt;request_queue, 15);</div><div class='add'>+		lim-&gt;dma_alignment = 15;</div><div class='ctx'> 		blk_queue_update_dma_pad(sdev-&gt;request_queue, 15);</div><div class='ctx'> </div><div class='ctx'> 		/* We enable MWI and hack cache line size directly here, this</div><div class='hunk'>@@ -918,7 +919,7 @@ static const struct scsi_host_template pata_macio_sht = {</div><div class='ctx'> 	 * use 64K minus 256</div><div class='ctx'> 	 */</div><div class='ctx'> 	.max_segment_size	= MAX_DBDMA_SEG,</div><div class='del'>-	.slave_configure	= pata_macio_slave_config,</div><div class='add'>+	.device_configure	= pata_macio_device_configure,</div><div class='ctx'> 	.sdev_groups		= ata_common_sdev_groups,</div><div class='ctx'> 	.can_queue		= ATA_DEF_QUEUE,</div><div class='ctx'> 	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,</div><div class='head'>diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c<br/>index 9bec0aee92e0..05c905827dc5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/sata_mv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/sata_mv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/sata_mv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/sata_mv.c</a></div><div class='hunk'>@@ -673,7 +673,7 @@ static const struct scsi_host_template mv6_sht = {</div><div class='ctx'> 	.sdev_groups		= ata_ncq_sdev_groups,</div><div class='ctx'> 	.change_queue_depth	= ata_scsi_change_queue_depth,</div><div class='ctx'> 	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,</div><div class='del'>-	.slave_configure	= ata_scsi_slave_config</div><div class='add'>+	.device_configure	= ata_scsi_device_configure</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ata_port_operations mv5_ops = {</div><div class='head'>diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c<br/>index 0a0cee755bde..36d99043ef50 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/sata_nv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/sata_nv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/sata_nv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/sata_nv.c</a></div><div class='hunk'>@@ -296,7 +296,8 @@ static void nv_nf2_freeze(struct ata_port *ap);</div><div class='ctx'> static void nv_nf2_thaw(struct ata_port *ap);</div><div class='ctx'> static void nv_ck804_freeze(struct ata_port *ap);</div><div class='ctx'> static void nv_ck804_thaw(struct ata_port *ap);</div><div class='del'>-static int nv_adma_slave_config(struct scsi_device *sdev);</div><div class='add'>+static int nv_adma_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim);</div><div class='ctx'> static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc);</div><div class='ctx'> static enum ata_completion_errors nv_adma_qc_prep(struct ata_queued_cmd *qc);</div><div class='ctx'> static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc);</div><div class='hunk'>@@ -318,7 +319,8 @@ static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf);</div><div class='ctx'> static void nv_mcp55_thaw(struct ata_port *ap);</div><div class='ctx'> static void nv_mcp55_freeze(struct ata_port *ap);</div><div class='ctx'> static void nv_swncq_error_handler(struct ata_port *ap);</div><div class='del'>-static int nv_swncq_slave_config(struct scsi_device *sdev);</div><div class='add'>+static int nv_swncq_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim);</div><div class='ctx'> static int nv_swncq_port_start(struct ata_port *ap);</div><div class='ctx'> static enum ata_completion_errors nv_swncq_qc_prep(struct ata_queued_cmd *qc);</div><div class='ctx'> static void nv_swncq_fill_sg(struct ata_queued_cmd *qc);</div><div class='hunk'>@@ -380,7 +382,7 @@ static const struct scsi_host_template nv_adma_sht = {</div><div class='ctx'> 	.can_queue		= NV_ADMA_MAX_CPBS,</div><div class='ctx'> 	.sg_tablesize		= NV_ADMA_SGTBL_TOTAL_LEN,</div><div class='ctx'> 	.dma_boundary		= NV_ADMA_DMA_BOUNDARY,</div><div class='del'>-	.slave_configure	= nv_adma_slave_config,</div><div class='add'>+	.device_configure	= nv_adma_device_configure,</div><div class='ctx'> 	.sdev_groups		= ata_ncq_sdev_groups,</div><div class='ctx'> 	.change_queue_depth     = ata_scsi_change_queue_depth,</div><div class='ctx'> 	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,</div><div class='hunk'>@@ -391,7 +393,7 @@ static const struct scsi_host_template nv_swncq_sht = {</div><div class='ctx'> 	.can_queue		= ATA_MAX_QUEUE - 1,</div><div class='ctx'> 	.sg_tablesize		= LIBATA_MAX_PRD,</div><div class='ctx'> 	.dma_boundary		= ATA_DMA_BOUNDARY,</div><div class='del'>-	.slave_configure	= nv_swncq_slave_config,</div><div class='add'>+	.device_configure	= nv_swncq_device_configure,</div><div class='ctx'> 	.sdev_groups		= ata_ncq_sdev_groups,</div><div class='ctx'> 	.change_queue_depth     = ata_scsi_change_queue_depth,</div><div class='ctx'> 	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,</div><div class='hunk'>@@ -661,7 +663,8 @@ static void nv_adma_mode(struct ata_port *ap)</div><div class='ctx'> 	pp-&gt;flags &amp;= ~NV_ADMA_PORT_REGISTER_MODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nv_adma_slave_config(struct scsi_device *sdev)</div><div class='add'>+static int nv_adma_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim)</div><div class='ctx'> {</div><div class='ctx'> 	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='ctx'> 	struct nv_adma_port_priv *pp = ap-&gt;private_data;</div><div class='hunk'>@@ -673,7 +676,7 @@ static int nv_adma_slave_config(struct scsi_device *sdev)</div><div class='ctx'> 	int adma_enable;</div><div class='ctx'> 	u32 current_reg, new_reg, config_mask;</div><div class='ctx'> </div><div class='del'>-	rc = ata_scsi_slave_config(sdev);</div><div class='add'>+	rc = ata_scsi_device_configure(sdev, lim);</div><div class='ctx'> </div><div class='ctx'> 	if (sdev-&gt;id &gt;= ATA_MAX_DEVICES || sdev-&gt;channel || sdev-&gt;lun)</div><div class='ctx'> 		/* Not a proper libata device, ignore */</div><div class='hunk'>@@ -740,8 +743,8 @@ static int nv_adma_slave_config(struct scsi_device *sdev)</div><div class='ctx'> 		rc = dma_set_mask(&amp;pdev-&gt;dev, pp-&gt;adma_dma_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	blk_queue_segment_boundary(sdev-&gt;request_queue, segment_boundary);</div><div class='del'>-	blk_queue_max_segments(sdev-&gt;request_queue, sg_tablesize);</div><div class='add'>+	lim-&gt;seg_boundary_mask = segment_boundary;</div><div class='add'>+	lim-&gt;max_segments = sg_tablesize;</div><div class='ctx'> 	ata_port_info(ap,</div><div class='ctx'> 		      "DMA mask 0x%llX, segment boundary 0x%lX, hw segs %hu\n",</div><div class='ctx'> 		      (unsigned long long)*ap-&gt;host-&gt;dev-&gt;dma_mask,</div><div class='hunk'>@@ -1868,7 +1871,8 @@ static void nv_swncq_host_init(struct ata_host *host)</div><div class='ctx'> 	writel(~0x0, mmio + NV_INT_STATUS_MCP55);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nv_swncq_slave_config(struct scsi_device *sdev)</div><div class='add'>+static int nv_swncq_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim)</div><div class='ctx'> {</div><div class='ctx'> 	struct ata_port *ap = ata_shost_to_port(sdev-&gt;host);</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(ap-&gt;host-&gt;dev);</div><div class='hunk'>@@ -1878,7 +1882,7 @@ static int nv_swncq_slave_config(struct scsi_device *sdev)</div><div class='ctx'> 	u8 check_maxtor = 0;</div><div class='ctx'> 	unsigned char model_num[ATA_ID_PROD_LEN + 1];</div><div class='ctx'> </div><div class='del'>-	rc = ata_scsi_slave_config(sdev);</div><div class='add'>+	rc = ata_scsi_device_configure(sdev, lim);</div><div class='ctx'> 	if (sdev-&gt;id &gt;= ATA_MAX_DEVICES || sdev-&gt;channel || sdev-&gt;lun)</div><div class='ctx'> 		/* Not a proper libata device, ignore */</div><div class='ctx'> 		return rc;</div><div class='head'>diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c<br/>index 142e70bfc498..72c03cbdaff4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/sata_sil24.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/ata/sata_sil24.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/sata_sil24.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/ata/sata_sil24.c</a></div><div class='hunk'>@@ -381,7 +381,7 @@ static const struct scsi_host_template sil24_sht = {</div><div class='ctx'> 	.tag_alloc_policy	= BLK_TAG_ALLOC_FIFO,</div><div class='ctx'> 	.sdev_groups		= ata_ncq_sdev_groups,</div><div class='ctx'> 	.change_queue_depth	= ata_scsi_change_queue_depth,</div><div class='del'>-	.slave_configure	= ata_scsi_slave_config</div><div class='add'>+	.device_configure	= ata_scsi_device_configure</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ata_port_operations sil24_ops = {</div><div class='head'>diff --git a/drivers/atm/fore200e.c b/drivers/atm/fore200e.c<br/>index 9fb1575f8d88..cb00f8244e41 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/atm/fore200e.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/atm/fore200e.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/atm/fore200e.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/atm/fore200e.c</a></div><div class='hunk'>@@ -94,9 +94,6 @@</div><div class='ctx'> </div><div class='ctx'> static const struct atmdev_ops   fore200e_ops;</div><div class='ctx'> </div><div class='del'>-static LIST_HEAD(fore200e_boards);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");</div><div class='ctx'> MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/atm/fore200e.h b/drivers/atm/fore200e.h<br/>index caf0ea6a328a..5d95fe9fd836 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/atm/fore200e.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/atm/fore200e.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/atm/fore200e.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/atm/fore200e.h</a></div><div class='hunk'>@@ -830,7 +830,6 @@ typedef struct fore200e_vc_map {</div><div class='ctx'> /* per-device data */</div><div class='ctx'> </div><div class='ctx'> typedef struct fore200e {</div><div class='del'>-    struct       list_head     entry;                  /* next device                        */</div><div class='ctx'>     const struct fore200e_bus* bus;                    /* bus-dependent code and data        */</div><div class='ctx'>     union        fore200e_regs regs;                   /* bus-dependent registers            */</div><div class='ctx'>     struct       atm_dev*      atm_dev;                /* ATM device                         */</div><div class='head'>diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig<br/>index 151d95f96b11..69d2138d7efb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/auxdisplay/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/auxdisplay/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/auxdisplay/Kconfig</a></div><div class='hunk'>@@ -16,6 +16,9 @@ menuconfig AUXDISPLAY</div><div class='ctx'> </div><div class='ctx'> if AUXDISPLAY</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# Character LCD section</div><div class='add'>+#</div><div class='ctx'> config CHARLCD</div><div class='ctx'> 	tristate "Character LCD core support" if COMPILE_TEST</div><div class='ctx'> 	help</div><div class='hunk'>@@ -25,12 +28,6 @@ config CHARLCD</div><div class='ctx'> 	  This is some character LCD core interface that multiple drivers can</div><div class='ctx'> 	  use.</div><div class='ctx'> </div><div class='del'>-config LINEDISP</div><div class='del'>-	tristate "Character line display core support" if COMPILE_TEST</div><div class='del'>-	help</div><div class='del'>-	  This is the core support for single-line character displays, to be</div><div class='del'>-	  selected by drivers that use it.</div><div class='del'>-</div><div class='ctx'> config HD44780_COMMON</div><div class='ctx'> 	tristate "Common functions for HD44780 (and compatibles) LCD displays" if COMPILE_TEST</div><div class='ctx'> 	select CHARLCD</div><div class='hunk'>@@ -52,145 +49,6 @@ config HD44780</div><div class='ctx'> 	  kernel and started at boot.</div><div class='ctx'> 	  If you don't understand what all this is about, say N.</div><div class='ctx'> </div><div class='del'>-config KS0108</div><div class='del'>-	tristate "KS0108 LCD Controller"</div><div class='del'>-	depends on PARPORT_PC</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  If you have a LCD controlled by one or more KS0108</div><div class='del'>-	  controllers, say Y. You will need also another more specific</div><div class='del'>-	  driver for your LCD.</div><div class='del'>-</div><div class='del'>-	  Depends on Parallel Port support. If you say Y at</div><div class='del'>-	  parport, you will be able to compile this as a module (M)</div><div class='del'>-	  and built-in as well (Y).</div><div class='del'>-</div><div class='del'>-	  To compile this as a module, choose M here:</div><div class='del'>-	  the module will be called ks0108.</div><div class='del'>-</div><div class='del'>-	  If unsure, say N.</div><div class='del'>-</div><div class='del'>-config KS0108_PORT</div><div class='del'>-	hex "Parallel port where the LCD is connected"</div><div class='del'>-	depends on KS0108</div><div class='del'>-	default 0x378</div><div class='del'>-	help</div><div class='del'>-	  The address of the parallel port where the LCD is connected.</div><div class='del'>-</div><div class='del'>-	  The first  standard parallel port address is 0x378.</div><div class='del'>-	  The second standard parallel port address is 0x278.</div><div class='del'>-	  The third  standard parallel port address is 0x3BC.</div><div class='del'>-</div><div class='del'>-	  You can specify a different address if you need.</div><div class='del'>-</div><div class='del'>-	  If you don't know what I'm talking about, load the parport module,</div><div class='del'>-	  and execute "dmesg" or "cat /proc/ioports". You can see there how</div><div class='del'>-	  many parallel ports are present and which address each one has.</div><div class='del'>-</div><div class='del'>-	  Usually you only need to use 0x378.</div><div class='del'>-</div><div class='del'>-	  If you compile this as a module, you can still override this</div><div class='del'>-	  using the module parameters.</div><div class='del'>-</div><div class='del'>-config KS0108_DELAY</div><div class='del'>-	int "Delay between each control writing (microseconds)"</div><div class='del'>-	depends on KS0108</div><div class='del'>-	default "2"</div><div class='del'>-	help</div><div class='del'>-	  Amount of time the ks0108 should wait between each control write</div><div class='del'>-	  to the parallel port.</div><div class='del'>-</div><div class='del'>-	  If your LCD seems to miss random writings, increment this.</div><div class='del'>-</div><div class='del'>-	  If you don't know what I'm talking about, ignore it.</div><div class='del'>-</div><div class='del'>-	  If you compile this as a module, you can still override this</div><div class='del'>-	  value using the module parameters.</div><div class='del'>-</div><div class='del'>-config CFAG12864B</div><div class='del'>-	tristate "CFAG12864B LCD"</div><div class='del'>-	depends on X86</div><div class='del'>-	depends on FB</div><div class='del'>-	depends on KS0108</div><div class='del'>-	select FB_SYSMEM_HELPERS</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  If you have a Crystalfontz 128x64 2-color LCD, cfag12864b Series,</div><div class='del'>-	  say Y. You also need the ks0108 LCD Controller driver.</div><div class='del'>-</div><div class='del'>-	  For help about how to wire your LCD to the parallel port,</div><div class='del'>-	  check Documentation/admin-guide/auxdisplay/cfag12864b.rst</div><div class='del'>-</div><div class='del'>-	  Depends on the x86 arch and the framebuffer support.</div><div class='del'>-</div><div class='del'>-	  The LCD framebuffer driver can be attached to a console.</div><div class='del'>-	  It will work fine. However, you can't attach it to the fbdev driver</div><div class='del'>-	  of the xorg server.</div><div class='del'>-</div><div class='del'>-	  To compile this as a module, choose M here:</div><div class='del'>-	  the modules will be called cfag12864b and cfag12864bfb.</div><div class='del'>-</div><div class='del'>-	  If unsure, say N.</div><div class='del'>-</div><div class='del'>-config CFAG12864B_RATE</div><div class='del'>-	int "Refresh rate (hertz)"</div><div class='del'>-	depends on CFAG12864B</div><div class='del'>-	default "20"</div><div class='del'>-	help</div><div class='del'>-	  Refresh rate of the LCD.</div><div class='del'>-</div><div class='del'>-	  As the LCD is not memory mapped, the driver has to make the work by</div><div class='del'>-	  software. This means you should be careful setting this value higher.</div><div class='del'>-	  If your CPUs are really slow or you feel the system is slowed down,</div><div class='del'>-	  decrease the value.</div><div class='del'>-</div><div class='del'>-	  Be careful modifying this value to a very high value:</div><div class='del'>-	  You can freeze the computer, or the LCD maybe can't draw as fast as you</div><div class='del'>-	  are requesting.</div><div class='del'>-</div><div class='del'>-	  If you don't know what I'm talking about, ignore it.</div><div class='del'>-</div><div class='del'>-	  If you compile this as a module, you can still override this</div><div class='del'>-	  value using the module parameters.</div><div class='del'>-</div><div class='del'>-config IMG_ASCII_LCD</div><div class='del'>-	tristate "Imagination Technologies ASCII LCD Display"</div><div class='del'>-	depends on HAS_IOMEM</div><div class='del'>-	default y if MIPS_MALTA</div><div class='del'>-	select MFD_SYSCON</div><div class='del'>-	select LINEDISP</div><div class='del'>-	help</div><div class='del'>-	  Enable this to support the simple ASCII LCD displays found on</div><div class='del'>-	  development boards such as the MIPS Boston, MIPS Malta &amp; MIPS SEAD3</div><div class='del'>-	  from Imagination Technologies.</div><div class='del'>-</div><div class='del'>-config HT16K33</div><div class='del'>-	tristate "Holtek Ht16K33 LED controller with keyscan"</div><div class='del'>-	depends on FB &amp;&amp; I2C &amp;&amp; INPUT</div><div class='del'>-	select FB_SYSMEM_HELPERS</div><div class='del'>-	select INPUT_MATRIXKMAP</div><div class='del'>-	select FB_BACKLIGHT</div><div class='del'>-	select NEW_LEDS</div><div class='del'>-	select LEDS_CLASS</div><div class='del'>-	select LINEDISP</div><div class='del'>-	help</div><div class='del'>-	  Say yes here to add support for Holtek HT16K33, RAM mapping 16*8</div><div class='del'>-	  LED controller driver with keyscan.</div><div class='del'>-</div><div class='del'>-config MAX6959</div><div class='del'>-	tristate "Maxim MAX6958/6959 7-segment LED controller"</div><div class='del'>-	depends on I2C</div><div class='del'>-	select REGMAP_I2C</div><div class='del'>-	select LINEDISP</div><div class='del'>-	help</div><div class='del'>-	  If you say yes here you get support for the following Maxim chips</div><div class='del'>-	  (I2C 7-segment LED display controller):</div><div class='del'>-	  - MAX6958</div><div class='del'>-	  - MAX6959 (input support)</div><div class='del'>-</div><div class='del'>-	  This driver can also be built as a module. If so, the module</div><div class='del'>-	  will be called max6959.</div><div class='del'>-</div><div class='ctx'> config LCD2S</div><div class='ctx'> 	tristate "lcd2s 20x4 character display over I2C console"</div><div class='ctx'> 	depends on I2C</div><div class='hunk'>@@ -201,27 +59,6 @@ config LCD2S</div><div class='ctx'> 	  is a simple single color character display. You have to connect it</div><div class='ctx'> 	  to an I2C bus.</div><div class='ctx'> </div><div class='del'>-config ARM_CHARLCD</div><div class='del'>-	bool "ARM Ltd. Character LCD Driver"</div><div class='del'>-	depends on PLAT_VERSATILE</div><div class='del'>-	help</div><div class='del'>-	  This is a driver for the character LCD found on the ARM Ltd.</div><div class='del'>-	  Versatile and RealView Platform Baseboards. It doesn't do</div><div class='del'>-	  very much more than display the text "ARM Linux" on the first</div><div class='del'>-	  line and the Linux version on the second line, but that's</div><div class='del'>-	  still useful.</div><div class='del'>-</div><div class='del'>-config SEG_LED_GPIO</div><div class='del'>-	tristate "Generic 7-segment LED display"</div><div class='del'>-	depends on GPIOLIB || COMPILE_TEST</div><div class='del'>-	select LINEDISP</div><div class='del'>-	help</div><div class='del'>-	  This driver supports a generic 7-segment LED display made up</div><div class='del'>-	  of GPIO pins connected to the individual segments.</div><div class='del'>-</div><div class='del'>-	  This driver can also be built as a module. If so, the module</div><div class='del'>-	  will be called seg-led-gpio.</div><div class='del'>-</div><div class='ctx'> menuconfig PARPORT_PANEL</div><div class='ctx'> 	tristate "Parallel port LCD/Keypad Panel support"</div><div class='ctx'> 	depends on PARPORT</div><div class='hunk'>@@ -480,7 +317,6 @@ endif # PARPORT_PANEL</div><div class='ctx'> config PANEL_CHANGE_MESSAGE</div><div class='ctx'> 	bool "Change LCD initialization message ?"</div><div class='ctx'> 	depends on CHARLCD</div><div class='del'>-	default "n"</div><div class='ctx'> 	help</div><div class='ctx'> 	  This allows you to replace the boot message indicating the kernel version</div><div class='ctx'> 	  and the driver version with a custom message. This is useful on appliances</div><div class='hunk'>@@ -529,8 +365,184 @@ choice</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# Samsung KS0108 LCD controller section</div><div class='add'>+#</div><div class='add'>+config KS0108</div><div class='add'>+	tristate "KS0108 LCD Controller"</div><div class='add'>+	depends on PARPORT_PC</div><div class='add'>+	help</div><div class='add'>+	  If you have a LCD controlled by one or more KS0108</div><div class='add'>+	  controllers, say Y. You will need also another more specific</div><div class='add'>+	  driver for your LCD.</div><div class='add'>+</div><div class='add'>+	  Depends on Parallel Port support. If you say Y at</div><div class='add'>+	  parport, you will be able to compile this as a module (M)</div><div class='add'>+	  and built-in as well (Y).</div><div class='add'>+</div><div class='add'>+	  To compile this as a module, choose M here:</div><div class='add'>+	  the module will be called ks0108.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+config KS0108_PORT</div><div class='add'>+	hex "Parallel port where the LCD is connected"</div><div class='add'>+	depends on KS0108</div><div class='add'>+	default 0x378</div><div class='add'>+	help</div><div class='add'>+	  The address of the parallel port where the LCD is connected.</div><div class='add'>+</div><div class='add'>+	  The first  standard parallel port address is 0x378.</div><div class='add'>+	  The second standard parallel port address is 0x278.</div><div class='add'>+	  The third  standard parallel port address is 0x3BC.</div><div class='add'>+</div><div class='add'>+	  You can specify a different address if you need.</div><div class='add'>+</div><div class='add'>+	  If you don't know what I'm talking about, load the parport module,</div><div class='add'>+	  and execute "dmesg" or "cat /proc/ioports". You can see there how</div><div class='add'>+	  many parallel ports are present and which address each one has.</div><div class='add'>+</div><div class='add'>+	  Usually you only need to use 0x378.</div><div class='add'>+</div><div class='add'>+	  If you compile this as a module, you can still override this</div><div class='add'>+	  using the module parameters.</div><div class='add'>+</div><div class='add'>+config KS0108_DELAY</div><div class='add'>+	int "Delay between each control writing (microseconds)"</div><div class='add'>+	depends on KS0108</div><div class='add'>+	default "2"</div><div class='add'>+	help</div><div class='add'>+	  Amount of time the ks0108 should wait between each control write</div><div class='add'>+	  to the parallel port.</div><div class='add'>+</div><div class='add'>+	  If your LCD seems to miss random writings, increment this.</div><div class='add'>+</div><div class='add'>+	  If you don't know what I'm talking about, ignore it.</div><div class='add'>+</div><div class='add'>+	  If you compile this as a module, you can still override this</div><div class='add'>+	  value using the module parameters.</div><div class='add'>+</div><div class='add'>+config CFAG12864B</div><div class='add'>+	tristate "CFAG12864B LCD"</div><div class='add'>+	depends on X86</div><div class='add'>+	depends on FB</div><div class='add'>+	depends on KS0108</div><div class='add'>+	select FB_SYSMEM_HELPERS</div><div class='add'>+	help</div><div class='add'>+	  If you have a Crystalfontz 128x64 2-color LCD, cfag12864b Series,</div><div class='add'>+	  say Y. You also need the ks0108 LCD Controller driver.</div><div class='add'>+</div><div class='add'>+	  For help about how to wire your LCD to the parallel port,</div><div class='add'>+	  check Documentation/admin-guide/auxdisplay/cfag12864b.rst</div><div class='add'>+</div><div class='add'>+	  Depends on the x86 arch and the framebuffer support.</div><div class='add'>+</div><div class='add'>+	  The LCD framebuffer driver can be attached to a console.</div><div class='add'>+	  It will work fine. However, you can't attach it to the fbdev driver</div><div class='add'>+	  of the xorg server.</div><div class='add'>+</div><div class='add'>+	  To compile this as a module, choose M here:</div><div class='add'>+	  the modules will be called cfag12864b and cfag12864bfb.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+config CFAG12864B_RATE</div><div class='add'>+	int "Refresh rate (hertz)"</div><div class='add'>+	depends on CFAG12864B</div><div class='add'>+	default "20"</div><div class='add'>+	help</div><div class='add'>+	  Refresh rate of the LCD.</div><div class='add'>+</div><div class='add'>+	  As the LCD is not memory mapped, the driver has to make the work by</div><div class='add'>+	  software. This means you should be careful setting this value higher.</div><div class='add'>+	  If your CPUs are really slow or you feel the system is slowed down,</div><div class='add'>+	  decrease the value.</div><div class='add'>+</div><div class='add'>+	  Be careful modifying this value to a very high value:</div><div class='add'>+	  You can freeze the computer, or the LCD maybe can't draw as fast as you</div><div class='add'>+	  are requesting.</div><div class='add'>+</div><div class='add'>+	  If you don't know what I'm talking about, ignore it.</div><div class='add'>+</div><div class='add'>+	  If you compile this as a module, you can still override this</div><div class='add'>+	  value using the module parameters.</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Single character line display section</div><div class='add'>+#</div><div class='add'>+config LINEDISP</div><div class='add'>+	tristate "Character line display core support" if COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  This is the core support for single-line character displays, to be</div><div class='add'>+	  selected by drivers that use it.</div><div class='add'>+</div><div class='add'>+config IMG_ASCII_LCD</div><div class='add'>+	tristate "Imagination Technologies ASCII LCD Display"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	default y if MIPS_MALTA</div><div class='add'>+	select MFD_SYSCON</div><div class='add'>+	select LINEDISP</div><div class='add'>+	help</div><div class='add'>+	  Enable this to support the simple ASCII LCD displays found on</div><div class='add'>+	  development boards such as the MIPS Boston, MIPS Malta &amp; MIPS SEAD3</div><div class='add'>+	  from Imagination Technologies.</div><div class='add'>+</div><div class='add'>+config HT16K33</div><div class='add'>+	tristate "Holtek Ht16K33 LED controller with keyscan"</div><div class='add'>+	depends on FB &amp;&amp; I2C &amp;&amp; INPUT</div><div class='add'>+	select FB_SYSMEM_HELPERS</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='add'>+	select FB_BACKLIGHT</div><div class='add'>+	select NEW_LEDS</div><div class='add'>+	select LEDS_CLASS</div><div class='add'>+	select LINEDISP</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to add support for Holtek HT16K33, RAM mapping 16*8</div><div class='add'>+	  LED controller driver with keyscan.</div><div class='add'>+</div><div class='add'>+config MAX6959</div><div class='add'>+	tristate "Maxim MAX6958/6959 7-segment LED controller"</div><div class='add'>+	depends on I2C</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	select LINEDISP</div><div class='add'>+	help</div><div class='add'>+	  If you say yes here you get support for the following Maxim chips</div><div class='add'>+	  (I2C 7-segment LED display controller):</div><div class='add'>+	  - MAX6958</div><div class='add'>+	  - MAX6959 (input support)</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module</div><div class='add'>+	  will be called max6959.</div><div class='add'>+</div><div class='add'>+config SEG_LED_GPIO</div><div class='add'>+	tristate "Generic 7-segment LED display"</div><div class='add'>+	depends on GPIOLIB || COMPILE_TEST</div><div class='add'>+	select LINEDISP</div><div class='add'>+	help</div><div class='add'>+	  This driver supports a generic 7-segment LED display made up</div><div class='add'>+	  of GPIO pins connected to the individual segments.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module</div><div class='add'>+	  will be called seg-led-gpio.</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Character LCD with non-conforming interface section</div><div class='add'>+#</div><div class='add'>+config ARM_CHARLCD</div><div class='add'>+	bool "ARM Ltd. Character LCD Driver"</div><div class='add'>+	depends on PLAT_VERSATILE</div><div class='add'>+	help</div><div class='add'>+	  This is a driver for the character LCD found on the ARM Ltd.</div><div class='add'>+	  Versatile and RealView Platform Baseboards. It doesn't do</div><div class='add'>+	  very much more than display the text "ARM Linux" on the first</div><div class='add'>+	  line and the Linux version on the second line, but that's</div><div class='add'>+	  still useful.</div><div class='add'>+</div><div class='ctx'> endif # AUXDISPLAY</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# Deprecated options</div><div class='add'>+#</div><div class='ctx'> config PANEL</div><div class='ctx'> 	tristate "Parallel port LCD/Keypad Panel support (OLD OPTION)"</div><div class='ctx'> 	depends on PARPORT</div><div class='head'>diff --git a/drivers/auxdisplay/Makefile b/drivers/auxdisplay/Makefile<br/>index 4a8ea41b0550..f5c13ed1cd4f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/auxdisplay/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/auxdisplay/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/auxdisplay/Makefile</a></div><div class='hunk'>@@ -3,16 +3,16 @@</div><div class='ctx'> # Makefile for the kernel auxiliary displays device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CHARLCD)		+= charlcd.o</div><div class='del'>-obj-$(CONFIG_HD44780_COMMON)	+= hd44780_common.o</div><div class='ctx'> obj-$(CONFIG_ARM_CHARLCD)	+= arm-charlcd.o</div><div class='del'>-obj-$(CONFIG_KS0108)		+= ks0108.o</div><div class='ctx'> obj-$(CONFIG_CFAG12864B)	+= cfag12864b.o cfag12864bfb.o</div><div class='del'>-obj-$(CONFIG_IMG_ASCII_LCD)	+= img-ascii-lcd.o</div><div class='add'>+obj-$(CONFIG_CHARLCD)		+= charlcd.o</div><div class='add'>+obj-$(CONFIG_HD44780_COMMON)	+= hd44780_common.o</div><div class='ctx'> obj-$(CONFIG_HD44780)		+= hd44780.o</div><div class='ctx'> obj-$(CONFIG_HT16K33)		+= ht16k33.o</div><div class='del'>-obj-$(CONFIG_PARPORT_PANEL)	+= panel.o</div><div class='add'>+obj-$(CONFIG_IMG_ASCII_LCD)	+= img-ascii-lcd.o</div><div class='add'>+obj-$(CONFIG_KS0108)		+= ks0108.o</div><div class='ctx'> obj-$(CONFIG_LCD2S)		+= lcd2s.o</div><div class='ctx'> obj-$(CONFIG_LINEDISP)		+= line-display.o</div><div class='ctx'> obj-$(CONFIG_MAX6959)		+= max6959.o</div><div class='add'>+obj-$(CONFIG_PARPORT_PANEL)	+= panel.o</div><div class='ctx'> obj-$(CONFIG_SEG_LED_GPIO)	+= seg-led-gpio.o</div><div class='head'>diff --git a/drivers/auxdisplay/charlcd.c b/drivers/auxdisplay/charlcd.c<br/>index 6d309e4971b6..bb9463814454 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/auxdisplay/charlcd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/charlcd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/auxdisplay/charlcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/auxdisplay/charlcd.c</a></div><div class='hunk'>@@ -17,7 +17,9 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_PANEL_BOOT_MESSAGE</div><div class='ctx'> #include &lt;generated/utsrelease.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #include "charlcd.h"</div><div class='ctx'> </div><div class='hunk'>@@ -678,4 +680,5 @@ int charlcd_unregister(struct charlcd *lcd)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(charlcd_unregister);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("Character LCD core support");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/auxdisplay/seg-led-gpio.c b/drivers/auxdisplay/seg-led-gpio.c<br/>index 35a8dbb1e9d2..183ab3011cbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/auxdisplay/seg-led-gpio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/auxdisplay/seg-led-gpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/auxdisplay/seg-led-gpio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/auxdisplay/seg-led-gpio.c</a></div><div class='hunk'>@@ -81,14 +81,12 @@ static int seg_led_probe(struct platform_device *pdev)</div><div class='ctx'> 	return linedisp_register(&amp;priv-&gt;linedisp, dev, 1, &amp;seg_led_linedisp_ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int seg_led_remove(struct platform_device *pdev)</div><div class='add'>+static void seg_led_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct seg_led_priv *priv = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;priv-&gt;work);</div><div class='ctx'> 	linedisp_unregister(&amp;priv-&gt;linedisp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id seg_led_of_match[] = {</div><div class='hunk'>@@ -99,7 +97,7 @@ MODULE_DEVICE_TABLE(of, seg_led_of_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver seg_led_driver = {</div><div class='ctx'> 	.probe = seg_led_probe,</div><div class='del'>-	.remove = seg_led_remove,</div><div class='add'>+	.remove_new = seg_led_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "seg-led-gpio",</div><div class='ctx'> 		.of_match_table = seg_led_of_match,</div><div class='head'>diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c<br/>index 024b78a0cfc1..0248912ff687 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/arch_topology.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/arch_topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/arch_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/arch_topology.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include &lt;linux/units.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='del'>-#include &lt;trace/events/thermal_pressure.h&gt;</div><div class='add'>+#include &lt;trace/events/hw_pressure.h&gt;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_PER_CPU(struct scale_freq_data __rcu *, sft_data);</div><div class='ctx'> static struct cpumask scale_freq_counters_mask;</div><div class='hunk'>@@ -160,26 +160,26 @@ void topology_set_cpu_scale(unsigned int cpu, unsigned long capacity)</div><div class='ctx'> 	per_cpu(cpu_scale, cpu) = capacity;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU(unsigned long, thermal_pressure);</div><div class='add'>+DEFINE_PER_CPU(unsigned long, hw_pressure);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * topology_update_thermal_pressure() - Update thermal pressure for CPUs</div><div class='add'>+ * topology_update_hw_pressure() - Update HW pressure for CPUs</div><div class='ctx'>  * @cpus        : The related CPUs for which capacity has been reduced</div><div class='ctx'>  * @capped_freq : The maximum allowed frequency that CPUs can run at</div><div class='ctx'>  *</div><div class='del'>- * Update the value of thermal pressure for all @cpus in the mask. The</div><div class='add'>+ * Update the value of HW pressure for all @cpus in the mask. The</div><div class='ctx'>  * cpumask should include all (online+offline) affected CPUs, to avoid</div><div class='ctx'>  * operating on stale data when hot-plug is used for some CPUs. The</div><div class='ctx'>  * @capped_freq reflects the currently allowed max CPUs frequency due to</div><div class='del'>- * thermal capping. It might be also a boost frequency value, which is bigger</div><div class='add'>+ * HW capping. It might be also a boost frequency value, which is bigger</div><div class='ctx'>  * than the internal 'capacity_freq_ref' max frequency. In such case the</div><div class='ctx'>  * pressure value should simply be removed, since this is an indication that</div><div class='del'>- * there is no thermal throttling. The @capped_freq must be provided in kHz.</div><div class='add'>+ * there is no HW throttling. The @capped_freq must be provided in kHz.</div><div class='ctx'>  */</div><div class='del'>-void topology_update_thermal_pressure(const struct cpumask *cpus,</div><div class='add'>+void topology_update_hw_pressure(const struct cpumask *cpus,</div><div class='ctx'> 				      unsigned long capped_freq)</div><div class='ctx'> {</div><div class='del'>-	unsigned long max_capacity, capacity, th_pressure;</div><div class='add'>+	unsigned long max_capacity, capacity, hw_pressure;</div><div class='ctx'> 	u32 max_freq;</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -189,21 +189,21 @@ void topology_update_thermal_pressure(const struct cpumask *cpus,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Handle properly the boost frequencies, which should simply clean</div><div class='del'>-	 * the thermal pressure value.</div><div class='add'>+	 * the HW pressure value.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (max_freq &lt;= capped_freq)</div><div class='ctx'> 		capacity = max_capacity;</div><div class='ctx'> 	else</div><div class='ctx'> 		capacity = mult_frac(max_capacity, capped_freq, max_freq);</div><div class='ctx'> </div><div class='del'>-	th_pressure = max_capacity - capacity;</div><div class='add'>+	hw_pressure = max_capacity - capacity;</div><div class='ctx'> </div><div class='del'>-	trace_thermal_pressure_update(cpu, th_pressure);</div><div class='add'>+	trace_hw_pressure_update(cpu, hw_pressure);</div><div class='ctx'> </div><div class='ctx'> 	for_each_cpu(cpu, cpus)</div><div class='del'>-		WRITE_ONCE(per_cpu(thermal_pressure, cpu), th_pressure);</div><div class='add'>+		WRITE_ONCE(per_cpu(hw_pressure, cpu), hw_pressure);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(topology_update_thermal_pressure);</div><div class='add'>+EXPORT_SYMBOL_GPL(topology_update_hw_pressure);</div><div class='ctx'> </div><div class='ctx'> static ssize_t cpu_capacity_show(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr,</div><div class='head'>diff --git a/drivers/base/devcoredump.c b/drivers/base/devcoredump.c<br/>index 7e2d1f0d903a..82aeb09b3d1b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/devcoredump.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/devcoredump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/devcoredump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/devcoredump.c</a></div><div class='hunk'>@@ -305,6 +305,29 @@ static ssize_t devcd_read_from_sgtable(char *buffer, loff_t offset,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * dev_coredump_put - remove device coredump</div><div class='add'>+ * @dev: the struct device for the crashed device</div><div class='add'>+ *</div><div class='add'>+ * dev_coredump_put() removes coredump, if exists, for a given device from</div><div class='add'>+ * the file system and free its associated data otherwise, does nothing.</div><div class='add'>+ *</div><div class='add'>+ * It is useful for modules that do not want to keep coredump</div><div class='add'>+ * available after its unload.</div><div class='add'>+ */</div><div class='add'>+void dev_coredump_put(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct device *existing;</div><div class='add'>+</div><div class='add'>+	existing = class_find_device(&amp;devcd_class, NULL, dev,</div><div class='add'>+				     devcd_match_failing);</div><div class='add'>+	if (existing) {</div><div class='add'>+		devcd_free(existing, NULL);</div><div class='add'>+		put_device(existing);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(dev_coredump_put);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * dev_coredumpm - create device coredump with read/free methods</div><div class='ctx'>  * @dev: the struct device for the crashed device</div><div class='ctx'>  * @owner: the module that contains the read/free functions, use %THIS_MODULE</div><div class='head'>diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c<br/>index 5679f966f676..4a67e83300e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/power/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/power/main.c</a></div><div class='hunk'>@@ -208,7 +208,7 @@ static ktime_t initcall_debug_start(struct device *dev, void *cb)</div><div class='ctx'> 	if (!pm_print_times_enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	dev_info(dev, "calling %pS @ %i, parent: %s\n", cb,</div><div class='add'>+	dev_info(dev, "calling %ps @ %i, parent: %s\n", cb,</div><div class='ctx'> 		 task_pid_nr(current),</div><div class='ctx'> 		 dev-&gt;parent ? dev_name(dev-&gt;parent) : "none");</div><div class='ctx'> 	return ktime_get();</div><div class='hunk'>@@ -223,7 +223,7 @@ static void initcall_debug_report(struct device *dev, ktime_t calltime,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rettime = ktime_get();</div><div class='del'>-	dev_info(dev, "%pS returned %d after %Ld usecs\n", cb, error,</div><div class='add'>+	dev_info(dev, "%ps returned %d after %Ld usecs\n", cb, error,</div><div class='ctx'> 		 (unsigned long long)ktime_us_delta(rettime, calltime));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1927,7 +1927,7 @@ EXPORT_SYMBOL_GPL(dpm_suspend_start);</div><div class='ctx'> void __suspend_report_result(const char *function, struct device *dev, void *fn, int ret)</div><div class='ctx'> {</div><div class='ctx'> 	if (ret)</div><div class='del'>-		dev_err(dev, "%s(): %pS returns %d\n", function, fn, ret);</div><div class='add'>+		dev_err(dev, "%s(): %ps returns %d\n", function, fn, ret);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__suspend_report_result);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c<br/>index a917219feea6..752b417e8129 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/wakeup.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/power/wakeup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/wakeup.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/power/wakeup.c</a></div><div class='hunk'>@@ -451,16 +451,15 @@ static struct wakeup_source *device_wakeup_detach(struct device *dev)</div><div class='ctx'>  * Detach the @dev's wakeup source object from it, unregister this wakeup source</div><div class='ctx'>  * object and destroy it.</div><div class='ctx'>  */</div><div class='del'>-int device_wakeup_disable(struct device *dev)</div><div class='add'>+void device_wakeup_disable(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wakeup_source *ws;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev || !dev-&gt;power.can_wakeup)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	ws = device_wakeup_detach(dev);</div><div class='ctx'> 	wakeup_source_unregister(ws);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(device_wakeup_disable);</div><div class='ctx'> </div><div class='hunk'>@@ -502,7 +501,11 @@ EXPORT_SYMBOL_GPL(device_set_wakeup_capable);</div><div class='ctx'>  */</div><div class='ctx'> int device_set_wakeup_enable(struct device *dev, bool enable)</div><div class='ctx'> {</div><div class='del'>-	return enable ? device_wakeup_enable(dev) : device_wakeup_disable(dev);</div><div class='add'>+	if (enable)</div><div class='add'>+		return device_wakeup_enable(dev);</div><div class='add'>+</div><div class='add'>+	device_wakeup_disable(dev);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(device_set_wakeup_enable);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h<br/>index bcdb25bec77c..83acccdc1008 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/internal.h</a></div><div class='hunk'>@@ -326,20 +326,22 @@ struct regmap_ram_data {</div><div class='ctx'>  * Create a test register map with data stored in RAM, not intended</div><div class='ctx'>  * for practical use.</div><div class='ctx'>  */</div><div class='del'>-struct regmap *__regmap_init_ram(const struct regmap_config *config,</div><div class='add'>+struct regmap *__regmap_init_ram(struct device *dev,</div><div class='add'>+				 const struct regmap_config *config,</div><div class='ctx'> 				 struct regmap_ram_data *data,</div><div class='ctx'> 				 struct lock_class_key *lock_key,</div><div class='ctx'> 				 const char *lock_name);</div><div class='ctx'> </div><div class='del'>-#define regmap_init_ram(config, data)					\</div><div class='del'>-	__regmap_lockdep_wrapper(__regmap_init_ram, #config, config, data)</div><div class='add'>+#define regmap_init_ram(dev, config, data)					\</div><div class='add'>+	__regmap_lockdep_wrapper(__regmap_init_ram, #dev, dev, config, data)</div><div class='ctx'> </div><div class='del'>-struct regmap *__regmap_init_raw_ram(const struct regmap_config *config,</div><div class='add'>+struct regmap *__regmap_init_raw_ram(struct device *dev,</div><div class='add'>+				     const struct regmap_config *config,</div><div class='ctx'> 				     struct regmap_ram_data *data,</div><div class='ctx'> 				     struct lock_class_key *lock_key,</div><div class='ctx'> 				     const char *lock_name);</div><div class='ctx'> </div><div class='del'>-#define regmap_init_raw_ram(config, data)				\</div><div class='del'>-	__regmap_lockdep_wrapper(__regmap_init_raw_ram, #config, config, data)</div><div class='add'>+#define regmap_init_raw_ram(dev, config, data)				\</div><div class='add'>+	__regmap_lockdep_wrapper(__regmap_init_raw_ram, #dev, dev, config, data)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/base/regmap/regcache-maple.c b/drivers/base/regmap/regcache-maple.c<br/>index 55999a50ccc0..e42433404854 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regcache-maple.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regcache-maple.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regcache-maple.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regcache-maple.c</a></div><div class='hunk'>@@ -294,7 +294,7 @@ static int regcache_maple_exit(struct regmap *map)</div><div class='ctx'> {</div><div class='ctx'> 	struct maple_tree *mt = map-&gt;cache;</div><div class='ctx'> 	MA_STATE(mas, mt, 0, UINT_MAX);</div><div class='del'>-	unsigned int *entry;;</div><div class='add'>+	unsigned int *entry;</div><div class='ctx'> </div><div class='ctx'> 	/* if we've already been called then just return */</div><div class='ctx'> 	if (!mt)</div><div class='head'>diff --git a/drivers/base/regmap/regmap-i3c.c b/drivers/base/regmap/regmap-i3c.c<br/>index 0328b0b34284..b5300b7c477e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-i3c.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-i3c.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-i3c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-i3c.c</a></div><div class='hunk'>@@ -56,5 +56,5 @@ struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,</div><div class='ctx'> EXPORT_SYMBOL_GPL(__devm_regmap_init_i3c);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Vitor Soares &lt;vitor.soares@synopsys.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Regmap I3C Module");</div><div class='add'>+MODULE_DESCRIPTION("regmap I3C Module");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/base/regmap/regmap-kunit.c b/drivers/base/regmap/regmap-kunit.c<br/>index bb2ab6129f38..9c5314785fc2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-kunit.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-kunit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-kunit.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-kunit.c</a></div><div class='hunk'>@@ -4,11 +4,26 @@</div><div class='ctx'> //</div><div class='ctx'> // Copyright 2023 Arm Ltd</div><div class='ctx'> </div><div class='add'>+#include &lt;kunit/device.h&gt;</div><div class='add'>+#include &lt;kunit/resource.h&gt;</div><div class='ctx'> #include &lt;kunit/test.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='ctx'> #define BLOCK_TEST_SIZE 12</div><div class='ctx'> </div><div class='add'>+KUNIT_DEFINE_ACTION_WRAPPER(regmap_exit_action, regmap_exit, struct regmap *);</div><div class='add'>+</div><div class='add'>+struct regmap_test_priv {</div><div class='add'>+	struct device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct regmap_test_param {</div><div class='add'>+	enum regcache_type cache;</div><div class='add'>+	enum regmap_endian val_endian;</div><div class='add'>+</div><div class='add'>+	unsigned int from_reg;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void get_changed_bytes(void *orig, void *new, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	char *o = orig;</div><div class='hunk'>@@ -27,57 +42,128 @@ static void get_changed_bytes(void *orig, void *new, size_t size)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct regmap_config test_regmap_config = {</div><div class='del'>-	.max_register = BLOCK_TEST_SIZE,</div><div class='ctx'> 	.reg_stride = 1,</div><div class='ctx'> 	.val_bits = sizeof(unsigned int) * 8,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct regcache_types {</div><div class='del'>-	enum regcache_type type;</div><div class='del'>-	const char *name;</div><div class='del'>-};</div><div class='add'>+static const char *regcache_type_name(enum regcache_type type)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case REGCACHE_NONE:</div><div class='add'>+		return "none";</div><div class='add'>+	case REGCACHE_FLAT:</div><div class='add'>+		return "flat";</div><div class='add'>+	case REGCACHE_RBTREE:</div><div class='add'>+		return "rbtree";</div><div class='add'>+	case REGCACHE_MAPLE:</div><div class='add'>+		return "maple";</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *regmap_endian_name(enum regmap_endian endian)</div><div class='add'>+{</div><div class='add'>+	switch (endian) {</div><div class='add'>+	case REGMAP_ENDIAN_BIG:</div><div class='add'>+		return "big";</div><div class='add'>+	case REGMAP_ENDIAN_LITTLE:</div><div class='add'>+		return "little";</div><div class='add'>+	case REGMAP_ENDIAN_DEFAULT:</div><div class='add'>+		return "default";</div><div class='add'>+	case REGMAP_ENDIAN_NATIVE:</div><div class='add'>+		return "native";</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static void case_to_desc(const struct regcache_types *t, char *desc)</div><div class='add'>+static void param_to_desc(const struct regmap_test_param *param, char *desc)</div><div class='ctx'> {</div><div class='del'>-	strcpy(desc, t-&gt;name);</div><div class='add'>+	snprintf(desc, KUNIT_PARAM_DESC_SIZE, "%s-%s @%#x",</div><div class='add'>+		 regcache_type_name(param-&gt;cache),</div><div class='add'>+		 regmap_endian_name(param-&gt;val_endian),</div><div class='add'>+		 param-&gt;from_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct regcache_types regcache_types_list[] = {</div><div class='del'>-	{ REGCACHE_NONE, "none" },</div><div class='del'>-	{ REGCACHE_FLAT, "flat" },</div><div class='del'>-	{ REGCACHE_RBTREE, "rbtree" },</div><div class='del'>-	{ REGCACHE_MAPLE, "maple" },</div><div class='add'>+static const struct regmap_test_param regcache_types_list[] = {</div><div class='add'>+	{ .cache = REGCACHE_NONE },</div><div class='add'>+	{ .cache = REGCACHE_FLAT },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-KUNIT_ARRAY_PARAM(regcache_types, regcache_types_list, case_to_desc);</div><div class='add'>+KUNIT_ARRAY_PARAM(regcache_types, regcache_types_list, param_to_desc);</div><div class='ctx'> </div><div class='del'>-static const struct regcache_types real_cache_types_list[] = {</div><div class='del'>-	{ REGCACHE_FLAT, "flat" },</div><div class='del'>-	{ REGCACHE_RBTREE, "rbtree" },</div><div class='del'>-	{ REGCACHE_MAPLE, "maple" },</div><div class='add'>+static const struct regmap_test_param real_cache_types_only_list[] = {</div><div class='add'>+	{ .cache = REGCACHE_FLAT },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-KUNIT_ARRAY_PARAM(real_cache_types, real_cache_types_list, case_to_desc);</div><div class='add'>+KUNIT_ARRAY_PARAM(real_cache_types_only, real_cache_types_only_list, param_to_desc);</div><div class='add'>+</div><div class='add'>+static const struct regmap_test_param real_cache_types_list[] = {</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .from_reg = 0 },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .from_reg = 0x2001 },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .from_reg = 0x2002 },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .from_reg = 0x2003 },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .from_reg = 0x2004 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2001 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2002 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2003 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2004 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2001 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2002 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2003 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2004 },</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static const struct regcache_types sparse_cache_types_list[] = {</div><div class='del'>-	{ REGCACHE_RBTREE, "rbtree" },</div><div class='del'>-	{ REGCACHE_MAPLE, "maple" },</div><div class='add'>+KUNIT_ARRAY_PARAM(real_cache_types, real_cache_types_list, param_to_desc);</div><div class='add'>+</div><div class='add'>+static const struct regmap_test_param sparse_cache_types_list[] = {</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2001 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2002 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2003 },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .from_reg = 0x2004 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2001 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2002 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2003 },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .from_reg = 0x2004 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-KUNIT_ARRAY_PARAM(sparse_cache_types, sparse_cache_types_list, case_to_desc);</div><div class='add'>+KUNIT_ARRAY_PARAM(sparse_cache_types, sparse_cache_types_list, param_to_desc);</div><div class='ctx'> </div><div class='del'>-static struct regmap *gen_regmap(struct regmap_config *config,</div><div class='add'>+static struct regmap *gen_regmap(struct kunit *test,</div><div class='add'>+				 struct regmap_config *config,</div><div class='ctx'> 				 struct regmap_ram_data **data)</div><div class='ctx'> {</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap_test_priv *priv = test-&gt;priv;</div><div class='ctx'> 	unsigned int *buf;</div><div class='ctx'> 	struct regmap *ret;</div><div class='del'>-	size_t size = (config-&gt;max_register + 1) * sizeof(unsigned int);</div><div class='add'>+	size_t size;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct reg_default *defaults;</div><div class='ctx'> </div><div class='add'>+	config-&gt;cache_type = param-&gt;cache;</div><div class='ctx'> 	config-&gt;disable_locking = config-&gt;cache_type == REGCACHE_RBTREE ||</div><div class='ctx'> 					config-&gt;cache_type == REGCACHE_MAPLE;</div><div class='ctx'> </div><div class='add'>+	if (config-&gt;max_register == 0) {</div><div class='add'>+		config-&gt;max_register = param-&gt;from_reg;</div><div class='add'>+		if (config-&gt;num_reg_defaults)</div><div class='add'>+			config-&gt;max_register += (config-&gt;num_reg_defaults - 1) *</div><div class='add'>+						config-&gt;reg_stride;</div><div class='add'>+		else</div><div class='add'>+			config-&gt;max_register += (BLOCK_TEST_SIZE * config-&gt;reg_stride);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = (config-&gt;max_register + 1) * sizeof(unsigned int);</div><div class='ctx'> 	buf = kmalloc(size, GFP_KERNEL);</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='hunk'>@@ -98,37 +184,40 @@ static struct regmap *gen_regmap(struct regmap_config *config,</div><div class='ctx'> 		config-&gt;reg_defaults = defaults;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; config-&gt;num_reg_defaults; i++) {</div><div class='del'>-			defaults[i].reg = i * config-&gt;reg_stride;</div><div class='del'>-			defaults[i].def = buf[i * config-&gt;reg_stride];</div><div class='add'>+			defaults[i].reg = param-&gt;from_reg + (i * config-&gt;reg_stride);</div><div class='add'>+			defaults[i].def = buf[param-&gt;from_reg + (i * config-&gt;reg_stride)];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = regmap_init_ram(config, *data);</div><div class='add'>+	ret = regmap_init_ram(priv-&gt;dev, config, *data);</div><div class='ctx'> 	if (IS_ERR(ret)) {</div><div class='ctx'> 		kfree(buf);</div><div class='ctx'> 		kfree(*data);</div><div class='add'>+	} else {</div><div class='add'>+		kunit_add_action(test, regmap_exit_action, ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool reg_5_false(struct device *context, unsigned int reg)</div><div class='add'>+static bool reg_5_false(struct device *dev, unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	return reg != 5;</div><div class='add'>+	struct kunit *test = dev_get_drvdata(dev);</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+</div><div class='add'>+	return reg != (param-&gt;from_reg + 5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void basic_read_write(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='ctx'> 	unsigned int val, rval;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -141,14 +230,11 @@ static void basic_read_write(struct kunit *test)</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, val, rval);</div><div class='ctx'> </div><div class='ctx'> 	/* If using a cache the cache satisfied the read */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE, data-&gt;read[0]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE, data-&gt;read[0]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bulk_write(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -156,9 +242,8 @@ static void bulk_write(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -178,14 +263,11 @@ static void bulk_write(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* If using a cache the cache satisfied the read */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bulk_read(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -193,9 +275,8 @@ static void bulk_read(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -211,14 +292,140 @@ static void bulk_read(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* If using a cache the cache satisfied the read */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	regmap_exit(map);</div><div class='add'>+static void read_bypassed(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int val[BLOCK_TEST_SIZE], rval;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_FALSE(test, map-&gt;cache_bypass);</div><div class='add'>+</div><div class='add'>+	get_random_bytes(&amp;val, sizeof(val));</div><div class='add'>+</div><div class='add'>+	/* Write some test values */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, param-&gt;from_reg, val, ARRAY_SIZE(val)));</div><div class='add'>+</div><div class='add'>+	regcache_cache_only(map, true);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * While in cache-only regmap_read_bypassed() should return the register</div><div class='add'>+	 * value and leave the map in cache-only.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); i++) {</div><div class='add'>+		/* Put inverted bits in rval to prove we really read the value */</div><div class='add'>+		rval = ~val[i];</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, val[i], rval);</div><div class='add'>+</div><div class='add'>+		rval = ~val[i];</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read_bypassed(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, val[i], rval);</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, map-&gt;cache_only);</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, map-&gt;cache_bypass);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Change the underlying register values to prove it is returning</div><div class='add'>+	 * real values not cached values.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); i++) {</div><div class='add'>+		val[i] = ~val[i];</div><div class='add'>+		data-&gt;vals[param-&gt;from_reg + i] = val[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); i++) {</div><div class='add'>+		rval = ~val[i];</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+		KUNIT_EXPECT_NE(test, val[i], rval);</div><div class='add'>+</div><div class='add'>+		rval = ~val[i];</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read_bypassed(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, val[i], rval);</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, map-&gt;cache_only);</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, map-&gt;cache_bypass);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void read_bypassed_volatile(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int val[BLOCK_TEST_SIZE], rval;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+	/* All registers except #5 volatile */</div><div class='add'>+	config.volatile_reg = reg_5_false;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_FALSE(test, map-&gt;cache_bypass);</div><div class='add'>+</div><div class='add'>+	get_random_bytes(&amp;val, sizeof(val));</div><div class='add'>+</div><div class='add'>+	/* Write some test values */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, param-&gt;from_reg, val, ARRAY_SIZE(val)));</div><div class='add'>+</div><div class='add'>+	regcache_cache_only(map, true);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * While in cache-only regmap_read_bypassed() should return the register</div><div class='add'>+	 * value and leave the map in cache-only.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); i++) {</div><div class='add'>+		/* Register #5 is non-volatile so should read from cache */</div><div class='add'>+		KUNIT_EXPECT_EQ(test, (i == 5) ? 0 : -EBUSY,</div><div class='add'>+				regmap_read(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+</div><div class='add'>+		/* Put inverted bits in rval to prove we really read the value */</div><div class='add'>+		rval = ~val[i];</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read_bypassed(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, val[i], rval);</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, map-&gt;cache_only);</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, map-&gt;cache_bypass);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Change the underlying register values to prove it is returning</div><div class='add'>+	 * real values not cached values.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); i++) {</div><div class='add'>+		val[i] = ~val[i];</div><div class='add'>+		data-&gt;vals[param-&gt;from_reg + i] = val[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); i++) {</div><div class='add'>+		if (i == 5)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rval = ~val[i];</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read_bypassed(map, param-&gt;from_reg + i, &amp;rval));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, val[i], rval);</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, map-&gt;cache_only);</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, map-&gt;cache_bypass);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void write_readonly(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -226,11 +433,10 @@ static void write_readonly(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='ctx'> 	config.writeable_reg = reg_5_false;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -247,13 +453,10 @@ static void write_readonly(struct kunit *test)</div><div class='ctx'> 	/* Did that match what we see on the device? */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, i != 5, data-&gt;written[i]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void read_writeonly(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -261,10 +464,9 @@ static void read_writeonly(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.readable_reg = reg_5_false;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -277,7 +479,7 @@ static void read_writeonly(struct kunit *test)</div><div class='ctx'> 	 * fail if we aren't using the flat cache.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++) {</div><div class='del'>-		if (t-&gt;type != REGCACHE_FLAT) {</div><div class='add'>+		if (config.cache_type != REGCACHE_FLAT) {</div><div class='ctx'> 			KUNIT_EXPECT_EQ(test, i != 5,</div><div class='ctx'> 					regmap_read(map, i, &amp;val) == 0);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -287,13 +489,10 @@ static void read_writeonly(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* Did we trigger a hardware access? */</div><div class='ctx'> 	KUNIT_EXPECT_FALSE(test, data-&gt;read[5]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void reg_defaults(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -301,10 +500,9 @@ static void reg_defaults(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -316,12 +514,11 @@ static void reg_defaults(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* The data should have been read from cache if there was one */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void reg_defaults_read_dev(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -329,17 +526,16 @@ static void reg_defaults_read_dev(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults_raw = BLOCK_TEST_SIZE;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* We should have read the cache defaults back from the map */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++) {</div><div class='del'>-		KUNIT_EXPECT_EQ(test, t-&gt;type != REGCACHE_NONE, data-&gt;read[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, config.cache_type != REGCACHE_NONE, data-&gt;read[i]);</div><div class='ctx'> 		data-&gt;read[i] = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -350,12 +546,11 @@ static void reg_defaults_read_dev(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* The data should have been read from cache if there was one */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void register_patch(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -365,10 +560,9 @@ static void register_patch(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* We need defaults so readback works */</div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -401,13 +595,10 @@ static void register_patch(struct kunit *test)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void stride(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -415,11 +606,10 @@ static void stride(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.reg_stride = 2;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE / 2;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -437,15 +627,13 @@ static void stride(struct kunit *test)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &amp;rval));</div><div class='ctx'> 			KUNIT_EXPECT_EQ(test, data-&gt;vals[i], rval);</div><div class='del'>-			KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE,</div><div class='add'>+			KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE,</div><div class='ctx'> 					data-&gt;read[i]);</div><div class='ctx'> </div><div class='ctx'> 			KUNIT_EXPECT_EQ(test, 0, regmap_write(map, i, rval));</div><div class='ctx'> 			KUNIT_EXPECT_TRUE(test, data-&gt;written[i]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regmap_range_cfg test_range = {</div><div class='hunk'>@@ -481,7 +669,6 @@ static bool test_range_all_volatile(struct device *dev, unsigned int reg)</div><div class='ctx'> </div><div class='ctx'> static void basic_ranges(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -489,13 +676,12 @@ static void basic_ranges(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.volatile_reg = test_range_all_volatile;</div><div class='ctx'> 	config.ranges = &amp;test_range;</div><div class='ctx'> 	config.num_ranges = 1;</div><div class='ctx'> 	config.max_register = test_range.range_max;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -546,14 +732,11 @@ static void basic_ranges(struct kunit *test)</div><div class='ctx'> 		KUNIT_EXPECT_FALSE(test, data-&gt;read[i]);</div><div class='ctx'> 		KUNIT_EXPECT_FALSE(test, data-&gt;written[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Try to stress dynamic creation of cache data structures */</div><div class='ctx'> static void stress_insert(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -562,10 +745,9 @@ static void stress_insert(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.max_register = 300;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -599,24 +781,21 @@ static void stress_insert(struct kunit *test)</div><div class='ctx'> 	for (i = 0; i &lt; config.max_register; i ++) {</div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &amp;rval));</div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, rval, vals[i]);</div><div class='del'>-		KUNIT_EXPECT_EQ(test, t-&gt;type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, config.cache_type == REGCACHE_NONE, data-&gt;read[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cache_bypass(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='ctx'> 	unsigned int val, rval;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -624,28 +803,26 @@ static void cache_bypass(struct kunit *test)</div><div class='ctx'> 	get_random_bytes(&amp;val, sizeof(val));</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure the cache has a value in it */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 0, val));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg, val));</div><div class='ctx'> </div><div class='ctx'> 	/* Bypass then write a different value */</div><div class='ctx'> 	regcache_cache_bypass(map, true);</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 0, val + 1));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg, val + 1));</div><div class='ctx'> </div><div class='ctx'> 	/* Read the bypassed value */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 0, &amp;rval));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg, &amp;rval));</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, val + 1, rval);</div><div class='del'>-	KUNIT_EXPECT_EQ(test, data-&gt;vals[0], rval);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, data-&gt;vals[param-&gt;from_reg], rval);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable bypass, the cache should still return the original value */</div><div class='ctx'> 	regcache_cache_bypass(map, false);</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 0, &amp;rval));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg, &amp;rval));</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, val, rval);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cache_sync(struct kunit *test)</div><div class='add'>+static void cache_sync_marked_dirty(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -653,9 +830,8 @@ static void cache_sync(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -663,10 +839,10 @@ static void cache_sync(struct kunit *test)</div><div class='ctx'> 	get_random_bytes(&amp;val, sizeof(val));</div><div class='ctx'> </div><div class='ctx'> 	/* Put some data into the cache */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, 0, val,</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, param-&gt;from_reg, val,</div><div class='ctx'> 						   BLOCK_TEST_SIZE));</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		data-&gt;written[i] = false;</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Trash the data on the device itself then resync */</div><div class='ctx'> 	regcache_mark_dirty(map);</div><div class='hunk'>@@ -674,16 +850,63 @@ static void cache_sync(struct kunit *test)</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='ctx'> </div><div class='ctx'> 	/* Did we just write the correct data out? */</div><div class='del'>-	KUNIT_EXPECT_MEMEQ(test, data-&gt;vals, val, sizeof(val));</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], val, sizeof(val));</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, true, data-&gt;written[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, true, data-&gt;written[param-&gt;from_reg + i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cache_sync_after_cache_only(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int val[BLOCK_TEST_SIZE];</div><div class='add'>+	unsigned int val_mask;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	regmap_exit(map);</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	val_mask = GENMASK(config.val_bits - 1, 0);</div><div class='add'>+	get_random_bytes(&amp;val, sizeof(val));</div><div class='add'>+</div><div class='add'>+	/* Put some data into the cache */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, param-&gt;from_reg, val,</div><div class='add'>+						   BLOCK_TEST_SIZE));</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+</div><div class='add'>+	/* Set cache-only and change the values */</div><div class='add'>+	regcache_cache_only(map, true);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(val); ++i)</div><div class='add'>+		val[i] = ~val[i] &amp; val_mask;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, param-&gt;from_reg, val,</div><div class='add'>+						   BLOCK_TEST_SIZE));</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[param-&gt;from_reg + i]);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMNEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], val, sizeof(val));</div><div class='add'>+</div><div class='add'>+	/* Exit cache-only and sync the cache without marking hardware registers dirty */</div><div class='add'>+	regcache_cache_only(map, false);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+</div><div class='add'>+	/* Did we just write the correct data out? */</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], val, sizeof(val));</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, data-&gt;written[param-&gt;from_reg + i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cache_sync_defaults(struct kunit *test)</div><div class='add'>+static void cache_sync_defaults_marked_dirty(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -691,10 +914,9 @@ static void cache_sync_defaults(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -702,24 +924,85 @@ static void cache_sync_defaults(struct kunit *test)</div><div class='ctx'> 	get_random_bytes(&amp;val, sizeof(val));</div><div class='ctx'> </div><div class='ctx'> 	/* Change the value of one register */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 2, val));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg + 2, val));</div><div class='ctx'> </div><div class='ctx'> 	/* Resync */</div><div class='ctx'> 	regcache_mark_dirty(map);</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		data-&gt;written[i] = false;</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='ctx'> </div><div class='ctx'> 	/* Did we just sync the one register we touched? */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, i == 2, data-&gt;written[i]);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, i == 2, data-&gt;written[param-&gt;from_reg + i]);</div><div class='add'>+</div><div class='add'>+	/* Rewrite registers back to their defaults */</div><div class='add'>+	for (i = 0; i &lt; config.num_reg_defaults; ++i)</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, config.reg_defaults[i].reg,</div><div class='add'>+						      config.reg_defaults[i].def));</div><div class='ctx'> </div><div class='del'>-	regmap_exit(map);</div><div class='add'>+	/*</div><div class='add'>+	 * Resync after regcache_mark_dirty() should not write out registers</div><div class='add'>+	 * that are at default value</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+	regcache_mark_dirty(map);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[param-&gt;from_reg + i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cache_sync_default_after_cache_only(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int orig_val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg + 2, &amp;orig_val));</div><div class='add'>+</div><div class='add'>+	/* Enter cache-only and change the value of one register */</div><div class='add'>+	regcache_cache_only(map, true);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg + 2, orig_val + 1));</div><div class='add'>+</div><div class='add'>+	/* Exit cache-only and resync, should write out the changed register */</div><div class='add'>+	regcache_cache_only(map, false);</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+</div><div class='add'>+	/* Was the register written out? */</div><div class='add'>+	KUNIT_EXPECT_TRUE(test, data-&gt;written[param-&gt;from_reg + 2]);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, data-&gt;vals[param-&gt;from_reg + 2], orig_val + 1);</div><div class='add'>+</div><div class='add'>+	/* Enter cache-only and write register back to its default value */</div><div class='add'>+	regcache_cache_only(map, true);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg + 2, orig_val));</div><div class='add'>+</div><div class='add'>+	/* Resync should write out the new value */</div><div class='add'>+	regcache_cache_only(map, false);</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+	KUNIT_EXPECT_TRUE(test, data-&gt;written[param-&gt;from_reg + 2]);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, data-&gt;vals[param-&gt;from_reg + 2], orig_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cache_sync_readonly(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -727,40 +1010,37 @@ static void cache_sync_readonly(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.writeable_reg = reg_5_false;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Read all registers to fill the cache */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &amp;val));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg + i, &amp;val));</div><div class='ctx'> </div><div class='ctx'> 	/* Change the value of all registers, readonly should fail */</div><div class='ctx'> 	get_random_bytes(&amp;val, sizeof(val));</div><div class='ctx'> 	regcache_cache_only(map, true);</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, i != 5, regmap_write(map, i, val) == 0);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, i != 5, regmap_write(map, param-&gt;from_reg + i, val) == 0);</div><div class='ctx'> 	regcache_cache_only(map, false);</div><div class='ctx'> </div><div class='ctx'> 	/* Resync */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		data-&gt;written[i] = false;</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='ctx'> </div><div class='ctx'> 	/* Did that match what we see on the device? */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, i != 5, data-&gt;written[i]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, i != 5, data-&gt;written[param-&gt;from_reg + i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cache_sync_patch(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -770,23 +1050,22 @@ static void cache_sync_patch(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* We need defaults so readback works */</div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Stash the original values */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, 0, rval,</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, param-&gt;from_reg, rval,</div><div class='ctx'> 						  BLOCK_TEST_SIZE));</div><div class='ctx'> </div><div class='ctx'> 	/* Patch a couple of values */</div><div class='del'>-	patch[0].reg = 2;</div><div class='add'>+	patch[0].reg = param-&gt;from_reg + 2;</div><div class='ctx'> 	patch[0].def = rval[2] + 1;</div><div class='ctx'> 	patch[0].delay_us = 0;</div><div class='del'>-	patch[1].reg = 5;</div><div class='add'>+	patch[1].reg = param-&gt;from_reg + 5;</div><div class='ctx'> 	patch[1].def = rval[5] + 1;</div><div class='ctx'> 	patch[1].delay_us = 0;</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regmap_register_patch(map, patch,</div><div class='hunk'>@@ -795,33 +1074,31 @@ static void cache_sync_patch(struct kunit *test)</div><div class='ctx'> 	/* Sync the cache */</div><div class='ctx'> 	regcache_mark_dirty(map);</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		data-&gt;written[i] = false;</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='ctx'> </div><div class='ctx'> 	/* The patch should be on the device but not in the cache */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++) {</div><div class='del'>-		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &amp;val));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg + i, &amp;val));</div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, val, rval[i]);</div><div class='ctx'> </div><div class='ctx'> 		switch (i) {</div><div class='ctx'> 		case 2:</div><div class='ctx'> 		case 5:</div><div class='del'>-			KUNIT_EXPECT_EQ(test, true, data-&gt;written[i]);</div><div class='del'>-			KUNIT_EXPECT_EQ(test, data-&gt;vals[i], rval[i] + 1);</div><div class='add'>+			KUNIT_EXPECT_EQ(test, true, data-&gt;written[param-&gt;from_reg + i]);</div><div class='add'>+			KUNIT_EXPECT_EQ(test, data-&gt;vals[param-&gt;from_reg + i], rval[i] + 1);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			KUNIT_EXPECT_EQ(test, false, data-&gt;written[i]);</div><div class='del'>-			KUNIT_EXPECT_EQ(test, data-&gt;vals[i], rval[i]);</div><div class='add'>+			KUNIT_EXPECT_EQ(test, false, data-&gt;written[param-&gt;from_reg + i]);</div><div class='add'>+			KUNIT_EXPECT_EQ(test, data-&gt;vals[param-&gt;from_reg + i], rval[i]);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cache_drop(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -829,41 +1106,267 @@ static void cache_drop(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure the data is read from the cache */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		data-&gt;read[i] = false;</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, 0, rval,</div><div class='add'>+		data-&gt;read[param-&gt;from_reg + i] = false;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, param-&gt;from_reg, rval,</div><div class='ctx'> 						  BLOCK_TEST_SIZE));</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++) {</div><div class='del'>-		KUNIT_EXPECT_FALSE(test, data-&gt;read[i]);</div><div class='del'>-		data-&gt;read[i] = false;</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;read[param-&gt;from_reg + i]);</div><div class='add'>+		data-&gt;read[param-&gt;from_reg + i] = false;</div><div class='ctx'> 	}</div><div class='del'>-	KUNIT_EXPECT_MEMEQ(test, data-&gt;vals, rval, sizeof(rval));</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], rval, sizeof(rval));</div><div class='ctx'> </div><div class='ctx'> 	/* Drop some registers */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 3, 5));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, param-&gt;from_reg + 3,</div><div class='add'>+						      param-&gt;from_reg + 5));</div><div class='ctx'> </div><div class='ctx'> 	/* Reread and check only the dropped registers hit the device. */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, 0, rval,</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, param-&gt;from_reg, rval,</div><div class='ctx'> 						  BLOCK_TEST_SIZE));</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, data-&gt;read[i], i &gt;= 3 &amp;&amp; i &lt;= 5);</div><div class='del'>-	KUNIT_EXPECT_MEMEQ(test, data-&gt;vals, rval, sizeof(rval));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, data-&gt;read[param-&gt;from_reg + i], i &gt;= 3 &amp;&amp; i &lt;= 5);</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], rval, sizeof(rval));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cache_drop_with_non_contiguous_ranges(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int val[4][BLOCK_TEST_SIZE];</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	const int num_ranges = ARRAY_SIZE(val) * 2;</div><div class='add'>+	int rangeidx, i;</div><div class='ctx'> </div><div class='del'>-	regmap_exit(map);</div><div class='add'>+	static_assert(ARRAY_SIZE(val) == 4);</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+	config.max_register = param-&gt;from_reg + (num_ranges * BLOCK_TEST_SIZE);</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; config.max_register + 1; i++)</div><div class='add'>+		data-&gt;written[i] = false;</div><div class='add'>+</div><div class='add'>+	/* Create non-contiguous cache blocks by writing every other range */</div><div class='add'>+	get_random_bytes(&amp;val, sizeof(val));</div><div class='add'>+	for (rangeidx = 0; rangeidx &lt; num_ranges; rangeidx += 2) {</div><div class='add'>+		reg = param-&gt;from_reg + (rangeidx * BLOCK_TEST_SIZE);</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_bulk_write(map, reg,</div><div class='add'>+							   &amp;val[rangeidx / 2],</div><div class='add'>+							   BLOCK_TEST_SIZE));</div><div class='add'>+		KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[reg],</div><div class='add'>+				   &amp;val[rangeidx / 2], sizeof(val[rangeidx / 2]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that odd ranges weren't written */</div><div class='add'>+	for (rangeidx = 1; rangeidx &lt; num_ranges; rangeidx += 2) {</div><div class='add'>+		reg = param-&gt;from_reg + (rangeidx * BLOCK_TEST_SIZE);</div><div class='add'>+		for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+			KUNIT_EXPECT_FALSE(test, data-&gt;written[reg + i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Drop range 2 */</div><div class='add'>+	reg = param-&gt;from_reg + (2 * BLOCK_TEST_SIZE);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, reg, reg + BLOCK_TEST_SIZE - 1));</div><div class='add'>+</div><div class='add'>+	/* Drop part of range 4 */</div><div class='add'>+	reg = param-&gt;from_reg + (4 * BLOCK_TEST_SIZE);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, reg + 3, reg + 5));</div><div class='add'>+</div><div class='add'>+	/* Mark dirty and reset mock registers to 0 */</div><div class='add'>+	regcache_mark_dirty(map);</div><div class='add'>+	for (i = 0; i &lt; config.max_register + 1; i++) {</div><div class='add'>+		data-&gt;vals[i] = 0;</div><div class='add'>+		data-&gt;written[i] = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The registers that were dropped from range 4 should now remain at 0 */</div><div class='add'>+	val[4 / 2][3] = 0;</div><div class='add'>+	val[4 / 2][4] = 0;</div><div class='add'>+	val[4 / 2][5] = 0;</div><div class='add'>+</div><div class='add'>+	/* Sync and check that the expected register ranges were written */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+</div><div class='add'>+	/* Check that odd ranges weren't written */</div><div class='add'>+	for (rangeidx = 1; rangeidx &lt; num_ranges; rangeidx += 2) {</div><div class='add'>+		reg = param-&gt;from_reg + (rangeidx * BLOCK_TEST_SIZE);</div><div class='add'>+		for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+			KUNIT_EXPECT_FALSE(test, data-&gt;written[reg + i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that even ranges (except 2 and 4) were written */</div><div class='add'>+	for (rangeidx = 0; rangeidx &lt; num_ranges; rangeidx += 2) {</div><div class='add'>+		if ((rangeidx == 2) || (rangeidx == 4))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		reg = param-&gt;from_reg + (rangeidx * BLOCK_TEST_SIZE);</div><div class='add'>+		for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+			KUNIT_EXPECT_TRUE(test, data-&gt;written[reg + i]);</div><div class='add'>+</div><div class='add'>+		KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[reg],</div><div class='add'>+				   &amp;val[rangeidx / 2], sizeof(val[rangeidx / 2]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that range 2 wasn't written */</div><div class='add'>+	reg = param-&gt;from_reg + (2 * BLOCK_TEST_SIZE);</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[reg + i]);</div><div class='add'>+</div><div class='add'>+	/* Check that range 4 was partially written */</div><div class='add'>+	reg = param-&gt;from_reg + (4 * BLOCK_TEST_SIZE);</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_EQ(test, data-&gt;written[reg + i], i &lt; 3 || i &gt; 5);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[reg], &amp;val[4 / 2], sizeof(val[4 / 2]));</div><div class='add'>+</div><div class='add'>+	/* Nothing before param-&gt;from_reg should have been written */</div><div class='add'>+	for (i = 0; i &lt; param-&gt;from_reg; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cache_drop_all_and_sync_marked_dirty(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int rval[BLOCK_TEST_SIZE];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Ensure the data is read from the cache */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;read[param-&gt;from_reg + i] = false;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, param-&gt;from_reg, rval,</div><div class='add'>+						  BLOCK_TEST_SIZE));</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], rval, sizeof(rval));</div><div class='add'>+</div><div class='add'>+	/* Change all values in cache from defaults */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg + i, rval[i] + 1));</div><div class='add'>+</div><div class='add'>+	/* Drop all registers */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 0, config.max_register));</div><div class='add'>+</div><div class='add'>+	/* Mark dirty and cache sync should not write anything. */</div><div class='add'>+	regcache_mark_dirty(map);</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+	for (i = 0; i &lt;= config.max_register; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cache_drop_all_and_sync_no_defaults(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int rval[BLOCK_TEST_SIZE];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Ensure the data is read from the cache */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;read[param-&gt;from_reg + i] = false;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, param-&gt;from_reg, rval,</div><div class='add'>+						  BLOCK_TEST_SIZE));</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], rval, sizeof(rval));</div><div class='add'>+</div><div class='add'>+	/* Change all values in cache */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg + i, rval[i] + 1));</div><div class='add'>+</div><div class='add'>+	/* Drop all registers */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 0, config.max_register));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sync cache without marking it dirty. All registers were dropped</div><div class='add'>+	 * so the cache should not have any entries to write out.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+	for (i = 0; i &lt;= config.max_register; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cache_drop_all_and_sync_has_defaults(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct regmap_config config;</div><div class='add'>+	struct regmap_ram_data *data;</div><div class='add'>+	unsigned int rval[BLOCK_TEST_SIZE];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	config = test_regmap_config;</div><div class='add'>+	config.num_reg_defaults = BLOCK_TEST_SIZE;</div><div class='add'>+</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='add'>+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='add'>+	if (IS_ERR(map))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Ensure the data is read from the cache */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;read[param-&gt;from_reg + i] = false;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regmap_bulk_read(map, param-&gt;from_reg, rval,</div><div class='add'>+						  BLOCK_TEST_SIZE));</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, &amp;data-&gt;vals[param-&gt;from_reg], rval, sizeof(rval));</div><div class='add'>+</div><div class='add'>+	/* Change all values in cache from defaults */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param-&gt;from_reg + i, rval[i] + 1));</div><div class='add'>+</div><div class='add'>+	/* Drop all registers */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 0, config.max_register));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sync cache without marking it dirty. All registers were dropped</div><div class='add'>+	 * so the cache should not have any entries to write out.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='add'>+		data-&gt;written[param-&gt;from_reg + i] = false;</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));</div><div class='add'>+	for (i = 0; i &lt;= config.max_register; i++)</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, data-&gt;written[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cache_present(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -871,39 +1374,35 @@ static void cache_present(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		data-&gt;read[i] = false;</div><div class='add'>+		data-&gt;read[param-&gt;from_reg + i] = false;</div><div class='ctx'> </div><div class='ctx'> 	/* No defaults so no registers cached. */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, i));</div><div class='add'>+		KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, param-&gt;from_reg + i));</div><div class='ctx'> </div><div class='ctx'> 	/* We didn't trigger any reads */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_ASSERT_FALSE(test, data-&gt;read[i]);</div><div class='add'>+		KUNIT_ASSERT_FALSE(test, data-&gt;read[param-&gt;from_reg + i]);</div><div class='ctx'> </div><div class='ctx'> 	/* Fill the cache */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &amp;val));</div><div class='add'>+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param-&gt;from_reg + i, &amp;val));</div><div class='ctx'> </div><div class='ctx'> 	/* Now everything should be cached */</div><div class='ctx'> 	for (i = 0; i &lt; BLOCK_TEST_SIZE; i++)</div><div class='del'>-		KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, i));</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='add'>+		KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, param-&gt;from_reg + i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Check that caching the window register works with sync */</div><div class='ctx'> static void cache_range_window_reg(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct regcache_types *t = (struct regcache_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -911,13 +1410,12 @@ static void cache_range_window_reg(struct kunit *test)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	config = test_regmap_config;</div><div class='del'>-	config.cache_type = t-&gt;type;</div><div class='ctx'> 	config.volatile_reg = test_range_window_volatile;</div><div class='ctx'> 	config.ranges = &amp;test_range;</div><div class='ctx'> 	config.num_ranges = 1;</div><div class='ctx'> 	config.max_register = test_range.range_max;</div><div class='ctx'> </div><div class='del'>-	map = gen_regmap(&amp;config, &amp;data);</div><div class='add'>+	map = gen_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -953,41 +1451,29 @@ static void cache_range_window_reg(struct kunit *test)</div><div class='ctx'> 	KUNIT_ASSERT_EQ(test, val, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct raw_test_types {</div><div class='del'>-	const char *name;</div><div class='del'>-</div><div class='del'>-	enum regcache_type cache_type;</div><div class='del'>-	enum regmap_endian val_endian;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void raw_to_desc(const struct raw_test_types *t, char *desc)</div><div class='del'>-{</div><div class='del'>-	strcpy(desc, t-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct raw_test_types raw_types_list[] = {</div><div class='del'>-	{ "none-little",   REGCACHE_NONE,   REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "none-big",      REGCACHE_NONE,   REGMAP_ENDIAN_BIG },</div><div class='del'>-	{ "flat-little",   REGCACHE_FLAT,   REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "flat-big",      REGCACHE_FLAT,   REGMAP_ENDIAN_BIG },</div><div class='del'>-	{ "rbtree-little", REGCACHE_RBTREE, REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "rbtree-big",    REGCACHE_RBTREE, REGMAP_ENDIAN_BIG },</div><div class='del'>-	{ "maple-little",  REGCACHE_MAPLE,  REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "maple-big",     REGCACHE_MAPLE,  REGMAP_ENDIAN_BIG },</div><div class='add'>+static const struct regmap_test_param raw_types_list[] = {</div><div class='add'>+	{ .cache = REGCACHE_NONE,   .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_NONE,   .val_endian = REGMAP_ENDIAN_BIG },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .val_endian = REGMAP_ENDIAN_BIG },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .val_endian = REGMAP_ENDIAN_BIG },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .val_endian = REGMAP_ENDIAN_BIG },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-KUNIT_ARRAY_PARAM(raw_test_types, raw_types_list, raw_to_desc);</div><div class='add'>+KUNIT_ARRAY_PARAM(raw_test_types, raw_types_list, param_to_desc);</div><div class='ctx'> </div><div class='del'>-static const struct raw_test_types raw_cache_types_list[] = {</div><div class='del'>-	{ "flat-little",   REGCACHE_FLAT,   REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "flat-big",      REGCACHE_FLAT,   REGMAP_ENDIAN_BIG },</div><div class='del'>-	{ "rbtree-little", REGCACHE_RBTREE, REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "rbtree-big",    REGCACHE_RBTREE, REGMAP_ENDIAN_BIG },</div><div class='del'>-	{ "maple-little",  REGCACHE_MAPLE,  REGMAP_ENDIAN_LITTLE },</div><div class='del'>-	{ "maple-big",     REGCACHE_MAPLE,  REGMAP_ENDIAN_BIG },</div><div class='add'>+static const struct regmap_test_param raw_cache_types_list[] = {</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_FLAT,   .val_endian = REGMAP_ENDIAN_BIG },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_RBTREE, .val_endian = REGMAP_ENDIAN_BIG },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .val_endian = REGMAP_ENDIAN_LITTLE },</div><div class='add'>+	{ .cache = REGCACHE_MAPLE,  .val_endian = REGMAP_ENDIAN_BIG },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-KUNIT_ARRAY_PARAM(raw_test_cache_types, raw_cache_types_list, raw_to_desc);</div><div class='add'>+KUNIT_ARRAY_PARAM(raw_test_cache_types, raw_cache_types_list, param_to_desc);</div><div class='ctx'> </div><div class='ctx'> static const struct regmap_config raw_regmap_config = {</div><div class='ctx'> 	.max_register = BLOCK_TEST_SIZE,</div><div class='hunk'>@@ -997,18 +1483,20 @@ static const struct regmap_config raw_regmap_config = {</div><div class='ctx'> 	.val_bits = 16,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regmap *gen_raw_regmap(struct regmap_config *config,</div><div class='del'>-				     struct raw_test_types *test_type,</div><div class='add'>+static struct regmap *gen_raw_regmap(struct kunit *test,</div><div class='add'>+				     struct regmap_config *config,</div><div class='ctx'> 				     struct regmap_ram_data **data)</div><div class='ctx'> {</div><div class='add'>+	struct regmap_test_priv *priv = test-&gt;priv;</div><div class='add'>+	const struct regmap_test_param *param = test-&gt;param_value;</div><div class='ctx'> 	u16 *buf;</div><div class='ctx'> 	struct regmap *ret;</div><div class='ctx'> 	size_t size = (config-&gt;max_register + 1) * config-&gt;reg_bits / 8;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct reg_default *defaults;</div><div class='ctx'> </div><div class='del'>-	config-&gt;cache_type = test_type-&gt;cache_type;</div><div class='del'>-	config-&gt;val_format_endian = test_type-&gt;val_endian;</div><div class='add'>+	config-&gt;cache_type = param-&gt;cache;</div><div class='add'>+	config-&gt;val_format_endian = param-&gt;val_endian;</div><div class='ctx'> 	config-&gt;disable_locking = config-&gt;cache_type == REGCACHE_RBTREE ||</div><div class='ctx'> 					config-&gt;cache_type == REGCACHE_MAPLE;</div><div class='ctx'> </div><div class='hunk'>@@ -1033,7 +1521,7 @@ static struct regmap *gen_raw_regmap(struct regmap_config *config,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; config-&gt;num_reg_defaults; i++) {</div><div class='ctx'> 		defaults[i].reg = i;</div><div class='del'>-		switch (test_type-&gt;val_endian) {</div><div class='add'>+		switch (param-&gt;val_endian) {</div><div class='ctx'> 		case REGMAP_ENDIAN_LITTLE:</div><div class='ctx'> 			defaults[i].def = le16_to_cpu(buf[i]);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1052,10 +1540,12 @@ static struct regmap *gen_raw_regmap(struct regmap_config *config,</div><div class='ctx'> 	if (config-&gt;cache_type == REGCACHE_NONE)</div><div class='ctx'> 		config-&gt;num_reg_defaults = 0;</div><div class='ctx'> </div><div class='del'>-	ret = regmap_init_raw_ram(config, *data);</div><div class='add'>+	ret = regmap_init_raw_ram(priv-&gt;dev, config, *data);</div><div class='ctx'> 	if (IS_ERR(ret)) {</div><div class='ctx'> 		kfree(buf);</div><div class='ctx'> 		kfree(*data);</div><div class='add'>+	} else {</div><div class='add'>+		kunit_add_action(test, regmap_exit_action, ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1063,7 +1553,6 @@ static struct regmap *gen_raw_regmap(struct regmap_config *config,</div><div class='ctx'> </div><div class='ctx'> static void raw_read_defaults_single(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1072,7 +1561,7 @@ static void raw_read_defaults_single(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	config = raw_regmap_config;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1082,13 +1571,10 @@ static void raw_read_defaults_single(struct kunit *test)</div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &amp;rval));</div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, config.reg_defaults[i].def, rval);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void raw_read_defaults(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1099,35 +1585,31 @@ static void raw_read_defaults(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	config = raw_regmap_config;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	val_len = sizeof(*rval) * (config.max_register + 1);</div><div class='del'>-	rval = kmalloc(val_len, GFP_KERNEL);</div><div class='add'>+	rval = kunit_kmalloc(test, val_len, GFP_KERNEL);</div><div class='ctx'> 	KUNIT_ASSERT_TRUE(test, rval != NULL);</div><div class='ctx'> 	if (!rval)</div><div class='ctx'> 		return;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	/* Check that we can read the defaults via the API */</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regmap_raw_read(map, 0, rval, val_len));</div><div class='ctx'> 	for (i = 0; i &lt; config.max_register + 1; i++) {</div><div class='ctx'> 		def = config.reg_defaults[i].def;</div><div class='ctx'> 		if (config.val_format_endian == REGMAP_ENDIAN_BIG) {</div><div class='del'>-			KUNIT_EXPECT_EQ(test, def, be16_to_cpu(rval[i]));</div><div class='add'>+			KUNIT_EXPECT_EQ(test, def, be16_to_cpu((__force __be16)rval[i]));</div><div class='ctx'> 		} else {</div><div class='del'>-			KUNIT_EXPECT_EQ(test, def, le16_to_cpu(rval[i]));</div><div class='add'>+			KUNIT_EXPECT_EQ(test, def, le16_to_cpu((__force __le16)rval[i]));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	</div><div class='del'>-	kfree(rval);</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void raw_write_read_single(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1136,7 +1618,7 @@ static void raw_write_read_single(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	config = raw_regmap_config;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1147,13 +1629,10 @@ static void raw_write_read_single(struct kunit *test)</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 0, val));</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 0, &amp;rval));</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, val, rval);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void raw_write(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1164,7 +1643,7 @@ static void raw_write(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	config = raw_regmap_config;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1185,10 +1664,10 @@ static void raw_write(struct kunit *test)</div><div class='ctx'> 		case 3:</div><div class='ctx'> 			if (config.val_format_endian == REGMAP_ENDIAN_BIG) {</div><div class='ctx'> 				KUNIT_EXPECT_EQ(test, rval,</div><div class='del'>-						be16_to_cpu(val[i % 2]));</div><div class='add'>+						be16_to_cpu((__force __be16)val[i % 2]));</div><div class='ctx'> 			} else {</div><div class='ctx'> 				KUNIT_EXPECT_EQ(test, rval,</div><div class='del'>-						le16_to_cpu(val[i % 2]));</div><div class='add'>+						le16_to_cpu((__force __le16)val[i % 2]));</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -1199,8 +1678,6 @@ static void raw_write(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* The values should appear in the "hardware" */</div><div class='ctx'> 	KUNIT_EXPECT_MEMEQ(test, &amp;hw_buf[2], val, sizeof(val));</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool reg_zero(struct device *dev, unsigned int reg)</div><div class='hunk'>@@ -1215,7 +1692,6 @@ static bool ram_reg_zero(struct regmap_ram_data *data, unsigned int reg)</div><div class='ctx'> </div><div class='ctx'> static void raw_noinc_write(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1228,7 +1704,7 @@ static void raw_noinc_write(struct kunit *test)</div><div class='ctx'> 	config.writeable_noinc_reg = reg_zero;</div><div class='ctx'> 	config.readable_noinc_reg = reg_zero;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1259,13 +1735,10 @@ static void raw_noinc_write(struct kunit *test)</div><div class='ctx'> 	/* Make sure we didn't touch the register after the noinc register */</div><div class='ctx'> 	KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 1, &amp;val));</div><div class='ctx'> 	KUNIT_ASSERT_EQ(test, val_test, val);</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void raw_sync(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1276,7 +1749,7 @@ static void raw_sync(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	config = raw_regmap_config;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1300,10 +1773,10 @@ static void raw_sync(struct kunit *test)</div><div class='ctx'> 		case 3:</div><div class='ctx'> 			if (config.val_format_endian == REGMAP_ENDIAN_BIG) {</div><div class='ctx'> 				KUNIT_EXPECT_EQ(test, rval,</div><div class='del'>-						be16_to_cpu(val[i - 2]));</div><div class='add'>+						be16_to_cpu((__force __be16)val[i - 2]));</div><div class='ctx'> 			} else {</div><div class='ctx'> 				KUNIT_EXPECT_EQ(test, rval,</div><div class='del'>-						le16_to_cpu(val[i - 2]));</div><div class='add'>+						le16_to_cpu((__force __le16)val[i - 2]));</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4:</div><div class='hunk'>@@ -1323,7 +1796,7 @@ static void raw_sync(struct kunit *test)</div><div class='ctx'> 		val[2] = cpu_to_be16(val[2]);</div><div class='ctx'> 	else</div><div class='ctx'> 		val[2] = cpu_to_le16(val[2]);</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	/* The values should not appear in the "hardware" */</div><div class='ctx'> 	KUNIT_EXPECT_MEMNEQ(test, &amp;hw_buf[2], &amp;val[0], sizeof(val));</div><div class='ctx'> </div><div class='hunk'>@@ -1337,13 +1810,10 @@ static void raw_sync(struct kunit *test)</div><div class='ctx'> </div><div class='ctx'> 	/* The values should now appear in the "hardware" */</div><div class='ctx'> 	KUNIT_EXPECT_MEMEQ(test, &amp;hw_buf[2], &amp;val[0], sizeof(val));</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void raw_ranges(struct kunit *test)</div><div class='ctx'> {</div><div class='del'>-	struct raw_test_types *t = (struct raw_test_types *)test-&gt;param_value;</div><div class='ctx'> 	struct regmap *map;</div><div class='ctx'> 	struct regmap_config config;</div><div class='ctx'> 	struct regmap_ram_data *data;</div><div class='hunk'>@@ -1356,7 +1826,7 @@ static void raw_ranges(struct kunit *test)</div><div class='ctx'> 	config.num_ranges = 1;</div><div class='ctx'> 	config.max_register = test_range.range_max;</div><div class='ctx'> </div><div class='del'>-	map = gen_raw_regmap(&amp;config, t, &amp;data);</div><div class='add'>+	map = gen_raw_regmap(test, &amp;config, &amp;data);</div><div class='ctx'> 	KUNIT_ASSERT_FALSE(test, IS_ERR(map));</div><div class='ctx'> 	if (IS_ERR(map))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1402,12 +1872,12 @@ static void raw_ranges(struct kunit *test)</div><div class='ctx'> 		KUNIT_EXPECT_FALSE(test, data-&gt;read[i]);</div><div class='ctx'> 		KUNIT_EXPECT_FALSE(test, data-&gt;written[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	regmap_exit(map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct kunit_case regmap_test_cases[] = {</div><div class='ctx'> 	KUNIT_CASE_PARAM(basic_read_write, regcache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(read_bypassed, real_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(read_bypassed_volatile, real_cache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(bulk_write, regcache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(bulk_read, regcache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(write_readonly, regcache_types_gen_params),</div><div class='hunk'>@@ -1419,13 +1889,19 @@ static struct kunit_case regmap_test_cases[] = {</div><div class='ctx'> 	KUNIT_CASE_PARAM(basic_ranges, regcache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(stress_insert, regcache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(cache_bypass, real_cache_types_gen_params),</div><div class='del'>-	KUNIT_CASE_PARAM(cache_sync, real_cache_types_gen_params),</div><div class='del'>-	KUNIT_CASE_PARAM(cache_sync_defaults, real_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_sync_marked_dirty, real_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_sync_after_cache_only, real_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_sync_defaults_marked_dirty, real_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_sync_default_after_cache_only, real_cache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(cache_sync_readonly, real_cache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(cache_sync_patch, real_cache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(cache_drop, sparse_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_drop_with_non_contiguous_ranges, sparse_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_drop_all_and_sync_marked_dirty, sparse_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_drop_all_and_sync_no_defaults, sparse_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_drop_all_and_sync_has_defaults, sparse_cache_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(cache_present, sparse_cache_types_gen_params),</div><div class='del'>-	KUNIT_CASE_PARAM(cache_range_window_reg, real_cache_types_gen_params),</div><div class='add'>+	KUNIT_CASE_PARAM(cache_range_window_reg, real_cache_types_only_gen_params),</div><div class='ctx'> </div><div class='ctx'> 	KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params),</div><div class='ctx'> 	KUNIT_CASE_PARAM(raw_read_defaults, raw_test_types_gen_params),</div><div class='hunk'>@@ -1437,8 +1913,40 @@ static struct kunit_case regmap_test_cases[] = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int regmap_test_init(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct regmap_test_priv *priv;</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	priv = kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	test-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	dev = kunit_device_register(test, "regmap_test");</div><div class='add'>+	if (IS_ERR(dev))</div><div class='add'>+		return PTR_ERR(dev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = get_device(dev);</div><div class='add'>+	dev_set_drvdata(dev, test);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void regmap_test_exit(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct regmap_test_priv *priv = test-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Destroy the dummy struct device */</div><div class='add'>+	if (priv &amp;&amp; priv-&gt;dev)</div><div class='add'>+		put_device(priv-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct kunit_suite regmap_test_suite = {</div><div class='ctx'> 	.name = "regmap",</div><div class='add'>+	.init = regmap_test_init,</div><div class='add'>+	.exit = regmap_test_exit,</div><div class='ctx'> 	.test_cases = regmap_test_cases,</div><div class='ctx'> };</div><div class='ctx'> kunit_test_suite(regmap_test_suite);</div><div class='head'>diff --git a/drivers/base/regmap/regmap-mdio.c b/drivers/base/regmap/regmap-mdio.c<br/>index 6aa6a2409478..9573bf3b52f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-mdio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-mdio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-mdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-mdio.c</a></div><div class='hunk'>@@ -117,5 +117,5 @@ struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,</div><div class='ctx'> EXPORT_SYMBOL_GPL(__devm_regmap_init_mdio);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Sander Vanheule &lt;sander@svanheule.net&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Regmap MDIO Module");</div><div class='add'>+MODULE_DESCRIPTION("regmap MDIO Module");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/base/regmap/regmap-ram.c b/drivers/base/regmap/regmap-ram.c<br/>index 192d6b131dff..5b4cbf982a11 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-ram.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-ram.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-ram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-ram.c</a></div><div class='hunk'>@@ -53,7 +53,8 @@ static const struct regmap_bus regmap_ram = {</div><div class='ctx'> 	.free_context = regmap_ram_free_context,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct regmap *__regmap_init_ram(const struct regmap_config *config,</div><div class='add'>+struct regmap *__regmap_init_ram(struct device *dev,</div><div class='add'>+				 const struct regmap_config *config,</div><div class='ctx'> 				 struct regmap_ram_data *data,</div><div class='ctx'> 				 struct lock_class_key *lock_key,</div><div class='ctx'> 				 const char *lock_name)</div><div class='hunk'>@@ -75,7 +76,7 @@ struct regmap *__regmap_init_ram(const struct regmap_config *config,</div><div class='ctx'> 	if (!data-&gt;written)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	map = __regmap_init(NULL, &amp;regmap_ram, data, config,</div><div class='add'>+	map = __regmap_init(dev, &amp;regmap_ram, data, config,</div><div class='ctx'> 			    lock_key, lock_name);</div><div class='ctx'> </div><div class='ctx'> 	return map;</div><div class='head'>diff --git a/drivers/base/regmap/regmap-raw-ram.c b/drivers/base/regmap/regmap-raw-ram.c<br/>index 93ae07b503fd..69eabfb89eda 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-raw-ram.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-raw-ram.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-raw-ram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-raw-ram.c</a></div><div class='hunk'>@@ -107,7 +107,8 @@ static const struct regmap_bus regmap_raw_ram = {</div><div class='ctx'> 	.free_context = regmap_raw_ram_free_context,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct regmap *__regmap_init_raw_ram(const struct regmap_config *config,</div><div class='add'>+struct regmap *__regmap_init_raw_ram(struct device *dev,</div><div class='add'>+				     const struct regmap_config *config,</div><div class='ctx'> 				     struct regmap_ram_data *data,</div><div class='ctx'> 				     struct lock_class_key *lock_key,</div><div class='ctx'> 				     const char *lock_name)</div><div class='hunk'>@@ -134,7 +135,7 @@ struct regmap *__regmap_init_raw_ram(const struct regmap_config *config,</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;reg_endian = config-&gt;reg_format_endian;</div><div class='ctx'> </div><div class='del'>-	map = __regmap_init(NULL, &amp;regmap_raw_ram, data, config,</div><div class='add'>+	map = __regmap_init(dev, &amp;regmap_raw_ram, data, config,</div><div class='ctx'> 			    lock_key, lock_name);</div><div class='ctx'> </div><div class='ctx'> 	return map;</div><div class='head'>diff --git a/drivers/base/regmap/regmap-sdw-mbq.c b/drivers/base/regmap/regmap-sdw-mbq.c<br/>index 388c3a087bd9..c99eada83780 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-sdw-mbq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-sdw-mbq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-sdw-mbq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-sdw-mbq.c</a></div><div class='hunk'>@@ -97,5 +97,5 @@ struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__devm_regmap_init_sdw_mbq);</div><div class='ctx'> </div><div class='del'>-MODULE_DESCRIPTION("Regmap SoundWire MBQ Module");</div><div class='add'>+MODULE_DESCRIPTION("regmap SoundWire MBQ Module");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/base/regmap/regmap-sdw.c b/drivers/base/regmap/regmap-sdw.c<br/>index 159c0b740b00..ea631ac7c7ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-sdw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-sdw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-sdw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-sdw.c</a></div><div class='hunk'>@@ -98,5 +98,5 @@ struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__devm_regmap_init_sdw);</div><div class='ctx'> </div><div class='del'>-MODULE_DESCRIPTION("Regmap SoundWire Module");</div><div class='add'>+MODULE_DESCRIPTION("regmap SoundWire Module");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/base/regmap/regmap-spi.c b/drivers/base/regmap/regmap-spi.c<br/>index 37ab23a9d034..094cf2a2ca3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-spi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap-spi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-spi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap-spi.c</a></div><div class='hunk'>@@ -165,4 +165,5 @@ struct regmap *__devm_regmap_init_spi(struct spi_device *spi,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__devm_regmap_init_spi);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("regmap SPI Module");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c<br/>index 5cb425f6f02d..0a34dd3c4f38 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/base/regmap/regmap.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/base/regmap/regmap.c</a></div><div class='hunk'>@@ -2839,6 +2839,43 @@ int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)</div><div class='ctx'> EXPORT_SYMBOL_GPL(regmap_read);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * regmap_read_bypassed() - Read a value from a single register direct</div><div class='add'>+ *			    from the device, bypassing the cache</div><div class='add'>+ *</div><div class='add'>+ * @map: Register map to read from</div><div class='add'>+ * @reg: Register to be read from</div><div class='add'>+ * @val: Pointer to store read value</div><div class='add'>+ *</div><div class='add'>+ * A value of zero will be returned on success, a negative errno will</div><div class='add'>+ * be returned in error cases.</div><div class='add'>+ */</div><div class='add'>+int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	bool bypass, cache_only;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALIGNED(reg, map-&gt;reg_stride))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	map-&gt;lock(map-&gt;lock_arg);</div><div class='add'>+</div><div class='add'>+	bypass = map-&gt;cache_bypass;</div><div class='add'>+	cache_only = map-&gt;cache_only;</div><div class='add'>+	map-&gt;cache_bypass = true;</div><div class='add'>+	map-&gt;cache_only = false;</div><div class='add'>+</div><div class='add'>+	ret = _regmap_read(map, reg, val);</div><div class='add'>+</div><div class='add'>+	map-&gt;cache_bypass = bypass;</div><div class='add'>+	map-&gt;cache_only = cache_only;</div><div class='add'>+</div><div class='add'>+	map-&gt;unlock(map-&gt;lock_arg);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regmap_read_bypassed);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * regmap_raw_read() - Read raw data from the device</div><div class='ctx'>  *</div><div class='ctx'>  * @map: Register map to read from</div><div class='head'>diff --git a/drivers/bcma/host_soc.c b/drivers/bcma/host_soc.c<br/>index 90d5bdc12e03..8ae0b918e740 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bcma/host_soc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bcma/host_soc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bcma/host_soc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bcma/host_soc.c</a></div><div class='hunk'>@@ -240,15 +240,13 @@ err_unmap_mmio:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcma_host_soc_remove(struct platform_device *pdev)</div><div class='add'>+static void bcma_host_soc_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcma_bus *bus = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	bcma_bus_unregister(bus);</div><div class='ctx'> 	iounmap(bus-&gt;mmio);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id bcma_host_soc_of_match[] = {</div><div class='hunk'>@@ -263,7 +261,7 @@ static struct platform_driver bcma_host_soc_driver = {</div><div class='ctx'> 		.of_match_table = bcma_host_soc_of_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= bcma_host_soc_probe,</div><div class='del'>-	.remove		= bcma_host_soc_remove,</div><div class='add'>+	.remove_new	= bcma_host_soc_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init bcma_host_soc_register_driver(void)</div><div class='head'>diff --git a/drivers/block/brd.c b/drivers/block/brd.c<br/>index e322cef6596b..b900fe9e0030 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/brd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/brd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/brd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/block/brd.c</a></div><div class='hunk'>@@ -29,10 +29,7 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Each block ramdisk device has a xarray brd_pages of pages that stores</div><div class='del'>- * the pages containing the block device's contents. A brd page's -&gt;index is</div><div class='del'>- * its offset in PAGE_SIZE units. This is similar to, but in no way connected</div><div class='del'>- * with, the kernel's pagecache or buffer cache (which sit above our block</div><div class='del'>- * device).</div><div class='add'>+ * the pages containing the block device's contents.</div><div class='ctx'>  */</div><div class='ctx'> struct brd_device {</div><div class='ctx'> 	int			brd_number;</div><div class='hunk'>@@ -51,15 +48,7 @@ struct brd_device {</div><div class='ctx'>  */</div><div class='ctx'> static struct page *brd_lookup_page(struct brd_device *brd, sector_t sector)</div><div class='ctx'> {</div><div class='del'>-	pgoff_t idx;</div><div class='del'>-	struct page *page;</div><div class='del'>-</div><div class='del'>-	idx = sector &gt;&gt; PAGE_SECTORS_SHIFT; /* sector to page index */</div><div class='del'>-	page = xa_load(&amp;brd-&gt;brd_pages, idx);</div><div class='del'>-</div><div class='del'>-	BUG_ON(page &amp;&amp; page-&gt;index != idx);</div><div class='del'>-</div><div class='del'>-	return page;</div><div class='add'>+	return xa_load(&amp;brd-&gt;brd_pages, sector &gt;&gt; PAGE_SECTORS_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -67,8 +56,8 @@ static struct page *brd_lookup_page(struct brd_device *brd, sector_t sector)</div><div class='ctx'>  */</div><div class='ctx'> static int brd_insert_page(struct brd_device *brd, sector_t sector, gfp_t gfp)</div><div class='ctx'> {</div><div class='del'>-	pgoff_t idx;</div><div class='del'>-	struct page *page, *cur;</div><div class='add'>+	pgoff_t idx = sector &gt;&gt; PAGE_SECTORS_SHIFT;</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	page = brd_lookup_page(brd, sector);</div><div class='hunk'>@@ -80,23 +69,16 @@ static int brd_insert_page(struct brd_device *brd, sector_t sector, gfp_t gfp)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	xa_lock(&amp;brd-&gt;brd_pages);</div><div class='del'>-</div><div class='del'>-	idx = sector &gt;&gt; PAGE_SECTORS_SHIFT;</div><div class='del'>-	page-&gt;index = idx;</div><div class='del'>-</div><div class='del'>-	cur = __xa_cmpxchg(&amp;brd-&gt;brd_pages, idx, NULL, page, gfp);</div><div class='del'>-</div><div class='del'>-	if (unlikely(cur)) {</div><div class='del'>-		__free_page(page);</div><div class='del'>-		ret = xa_err(cur);</div><div class='del'>-		if (!ret &amp;&amp; (cur-&gt;index != idx))</div><div class='del'>-			ret = -EIO;</div><div class='del'>-	} else {</div><div class='add'>+	ret = __xa_insert(&amp;brd-&gt;brd_pages, idx, page, gfp);</div><div class='add'>+	if (!ret)</div><div class='ctx'> 		brd-&gt;brd_nr_pages++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	xa_unlock(&amp;brd-&gt;brd_pages);</div><div class='ctx'> </div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		__free_page(page);</div><div class='add'>+		if (ret == -EBUSY)</div><div class='add'>+			ret = 0;</div><div class='add'>+	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/block/null_blk/main.c b/drivers/block/null_blk/main.c<br/>index ed33cf7192d2..4005a8b685e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/null_blk/main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/null_blk/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/null_blk/main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/block/null_blk/main.c</a></div><div class='hunk'>@@ -225,6 +225,10 @@ static unsigned long g_cache_size;</div><div class='ctx'> module_param_named(cache_size, g_cache_size, ulong, 0444);</div><div class='ctx'> MODULE_PARM_DESC(mbps, "Cache size in MiB for memory-backed device. Default: 0 (none)");</div><div class='ctx'> </div><div class='add'>+static bool g_fua = true;</div><div class='add'>+module_param_named(fua, g_fua, bool, 0444);</div><div class='add'>+MODULE_PARM_DESC(zoned, "Enable/disable FUA support when cache_size is used. Default: true");</div><div class='add'>+</div><div class='ctx'> static unsigned int g_mbps;</div><div class='ctx'> module_param_named(mbps, g_mbps, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(mbps, "Limit maximum bandwidth (in MiB/s). Default: 0 (no limit)");</div><div class='hunk'>@@ -253,6 +257,11 @@ static unsigned int g_zone_max_active;</div><div class='ctx'> module_param_named(zone_max_active, g_zone_max_active, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(zone_max_active, "Maximum number of active zones when block device is zoned. Default: 0 (no limit)");</div><div class='ctx'> </div><div class='add'>+static int g_zone_append_max_sectors = INT_MAX;</div><div class='add'>+module_param_named(zone_append_max_sectors, g_zone_append_max_sectors, int, 0444);</div><div class='add'>+MODULE_PARM_DESC(zone_append_max_sectors,</div><div class='add'>+		 "Maximum size of a zone append command (in 512B sectors). Specify 0 for zone append emulation");</div><div class='add'>+</div><div class='ctx'> static struct nullb_device *null_alloc_dev(void);</div><div class='ctx'> static void null_free_dev(struct nullb_device *dev);</div><div class='ctx'> static void null_del_dev(struct nullb *nullb);</div><div class='hunk'>@@ -436,10 +445,12 @@ NULLB_DEVICE_ATTR(zone_capacity, ulong, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(zone_nr_conv, uint, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(zone_max_open, uint, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(zone_max_active, uint, NULL);</div><div class='add'>+NULLB_DEVICE_ATTR(zone_append_max_sectors, uint, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(virt_boundary, bool, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(no_sched, bool, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(shared_tags, bool, NULL);</div><div class='ctx'> NULLB_DEVICE_ATTR(shared_tag_bitmap, bool, NULL);</div><div class='add'>+NULLB_DEVICE_ATTR(fua, bool, NULL);</div><div class='ctx'> </div><div class='ctx'> static ssize_t nullb_device_power_show(struct config_item *item, char *page)</div><div class='ctx'> {</div><div class='hunk'>@@ -580,12 +591,14 @@ static struct configfs_attribute *nullb_device_attrs[] = {</div><div class='ctx'> 	&amp;nullb_device_attr_zone_nr_conv,</div><div class='ctx'> 	&amp;nullb_device_attr_zone_max_open,</div><div class='ctx'> 	&amp;nullb_device_attr_zone_max_active,</div><div class='add'>+	&amp;nullb_device_attr_zone_append_max_sectors,</div><div class='ctx'> 	&amp;nullb_device_attr_zone_readonly,</div><div class='ctx'> 	&amp;nullb_device_attr_zone_offline,</div><div class='ctx'> 	&amp;nullb_device_attr_virt_boundary,</div><div class='ctx'> 	&amp;nullb_device_attr_no_sched,</div><div class='ctx'> 	&amp;nullb_device_attr_shared_tags,</div><div class='ctx'> 	&amp;nullb_device_attr_shared_tag_bitmap,</div><div class='add'>+	&amp;nullb_device_attr_fua,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -664,14 +677,14 @@ nullb_group_drop_item(struct config_group *group, struct config_item *item)</div><div class='ctx'> static ssize_t memb_group_features_show(struct config_item *item, char *page)</div><div class='ctx'> {</div><div class='ctx'> 	return snprintf(page, PAGE_SIZE,</div><div class='del'>-			"badblocks,blocking,blocksize,cache_size,"</div><div class='add'>+			"badblocks,blocking,blocksize,cache_size,fua,"</div><div class='ctx'> 			"completion_nsec,discard,home_node,hw_queue_depth,"</div><div class='ctx'> 			"irqmode,max_sectors,mbps,memory_backed,no_sched,"</div><div class='ctx'> 			"poll_queues,power,queue_mode,shared_tag_bitmap,"</div><div class='ctx'> 			"shared_tags,size,submit_queues,use_per_node_hctx,"</div><div class='ctx'> 			"virt_boundary,zoned,zone_capacity,zone_max_active,"</div><div class='ctx'> 			"zone_max_open,zone_nr_conv,zone_offline,zone_readonly,"</div><div class='del'>-			"zone_size\n");</div><div class='add'>+			"zone_size,zone_append_max_sectors\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> CONFIGFS_ATTR_RO(memb_group_, features);</div><div class='hunk'>@@ -751,10 +764,13 @@ static struct nullb_device *null_alloc_dev(void)</div><div class='ctx'> 	dev-&gt;zone_nr_conv = g_zone_nr_conv;</div><div class='ctx'> 	dev-&gt;zone_max_open = g_zone_max_open;</div><div class='ctx'> 	dev-&gt;zone_max_active = g_zone_max_active;</div><div class='add'>+	dev-&gt;zone_append_max_sectors = g_zone_append_max_sectors;</div><div class='ctx'> 	dev-&gt;virt_boundary = g_virt_boundary;</div><div class='ctx'> 	dev-&gt;no_sched = g_no_sched;</div><div class='ctx'> 	dev-&gt;shared_tags = g_shared_tags;</div><div class='ctx'> 	dev-&gt;shared_tag_bitmap = g_shared_tag_bitmap;</div><div class='add'>+	dev-&gt;fua = g_fua;</div><div class='add'>+</div><div class='ctx'> 	return dev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1151,7 +1167,7 @@ blk_status_t null_handle_discard(struct nullb_device *dev,</div><div class='ctx'> 	return BLK_STS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int null_handle_flush(struct nullb *nullb)</div><div class='add'>+static blk_status_t null_handle_flush(struct nullb *nullb)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1168,7 +1184,7 @@ static int null_handle_flush(struct nullb *nullb)</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(!radix_tree_empty(&amp;nullb-&gt;dev-&gt;cache));</div><div class='ctx'> 	spin_unlock_irq(&amp;nullb-&gt;lock);</div><div class='del'>-	return err;</div><div class='add'>+	return errno_to_blk_status(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int null_transfer(struct nullb *nullb, struct page *page,</div><div class='hunk'>@@ -1206,7 +1222,7 @@ static int null_handle_rq(struct nullb_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct request *rq = blk_mq_rq_from_pdu(cmd);</div><div class='ctx'> 	struct nullb *nullb = cmd-&gt;nq-&gt;dev-&gt;nullb;</div><div class='del'>-	int err;</div><div class='add'>+	int err = 0;</div><div class='ctx'> 	unsigned int len;</div><div class='ctx'> 	sector_t sector = blk_rq_pos(rq);</div><div class='ctx'> 	struct req_iterator iter;</div><div class='hunk'>@@ -1218,15 +1234,13 @@ static int null_handle_rq(struct nullb_cmd *cmd)</div><div class='ctx'> 		err = null_transfer(nullb, bvec.bv_page, len, bvec.bv_offset,</div><div class='ctx'> 				     op_is_write(req_op(rq)), sector,</div><div class='ctx'> 				     rq-&gt;cmd_flags &amp; REQ_FUA);</div><div class='del'>-		if (err) {</div><div class='del'>-			spin_unlock_irq(&amp;nullb-&gt;lock);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='ctx'> 		sector += len &gt;&gt; SECTOR_SHIFT;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irq(&amp;nullb-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return errno_to_blk_status(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline blk_status_t null_handle_throttled(struct nullb_cmd *cmd)</div><div class='hunk'>@@ -1273,8 +1287,8 @@ static inline blk_status_t null_handle_memory_backed(struct nullb_cmd *cmd,</div><div class='ctx'> </div><div class='ctx'> 	if (op == REQ_OP_DISCARD)</div><div class='ctx'> 		return null_handle_discard(dev, sector, nr_sectors);</div><div class='del'>-	return errno_to_blk_status(null_handle_rq(cmd));</div><div class='ctx'> </div><div class='add'>+	return null_handle_rq(cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nullb_zero_read_cmd_buffer(struct nullb_cmd *cmd)</div><div class='hunk'>@@ -1343,7 +1357,7 @@ static void null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,</div><div class='ctx'> 	blk_status_t sts;</div><div class='ctx'> </div><div class='ctx'> 	if (op == REQ_OP_FLUSH) {</div><div class='del'>-		cmd-&gt;error = errno_to_blk_status(null_handle_flush(nullb));</div><div class='add'>+		cmd-&gt;error = null_handle_flush(nullb);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1912,7 +1926,7 @@ static int null_add_dev(struct nullb_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;cache_size &gt; 0) {</div><div class='ctx'> 		set_bit(NULLB_DEV_FL_CACHE, &amp;nullb-&gt;dev-&gt;flags);</div><div class='del'>-		blk_queue_write_cache(nullb-&gt;q, true, true);</div><div class='add'>+		blk_queue_write_cache(nullb-&gt;q, true, dev-&gt;fua);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nullb-&gt;q-&gt;queuedata = nullb;</div><div class='hunk'>@@ -2113,10 +2127,13 @@ static void __exit null_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	if (tag_set.ops)</div><div class='ctx'> 		blk_mq_free_tag_set(&amp;tag_set);</div><div class='add'>+</div><div class='add'>+	mutex_destroy(&amp;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(null_init);</div><div class='ctx'> module_exit(null_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Jens Axboe &lt;axboe@kernel.dk&gt;");</div><div class='add'>+MODULE_DESCRIPTION("multi queue aware block test driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/block/null_blk/null_blk.h b/drivers/block/null_blk/null_blk.h<br/>index 477b97746823..3234e6c85eed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/null_blk/null_blk.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/null_blk/null_blk.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/null_blk/null_blk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/block/null_blk/null_blk.h</a></div><div class='hunk'>@@ -82,6 +82,7 @@ struct nullb_device {</div><div class='ctx'> 	unsigned int zone_nr_conv; /* number of conventional zones */</div><div class='ctx'> 	unsigned int zone_max_open; /* max number of open zones */</div><div class='ctx'> 	unsigned int zone_max_active; /* max number of active zones */</div><div class='add'>+	unsigned int zone_append_max_sectors; /* Max sectors per zone append command */</div><div class='ctx'> 	unsigned int submit_queues; /* number of submission queues */</div><div class='ctx'> 	unsigned int prev_submit_queues; /* number of submission queues before change */</div><div class='ctx'> 	unsigned int poll_queues; /* number of IOPOLL submission queues */</div><div class='hunk'>@@ -104,6 +105,7 @@ struct nullb_device {</div><div class='ctx'> 	bool no_sched; /* no IO scheduler for the device */</div><div class='ctx'> 	bool shared_tags; /* share tag set between devices for blk-mq */</div><div class='ctx'> 	bool shared_tag_bitmap; /* use hostwide shared tags */</div><div class='add'>+	bool fua; /* Support FUA */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct nullb {</div><div class='head'>diff --git a/drivers/block/null_blk/zoned.c b/drivers/block/null_blk/zoned.c<br/>index 1689e2584104..5b5a63adacc1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/null_blk/zoned.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/null_blk/zoned.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/null_blk/zoned.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/block/null_blk/zoned.c</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #undef pr_fmt</div><div class='ctx'> #define pr_fmt(fmt)	"null_blk: " fmt</div><div class='ctx'> </div><div class='add'>+#define NULL_ZONE_INVALID_WP	((sector_t)-1)</div><div class='add'>+</div><div class='ctx'> static inline sector_t mb_to_sects(unsigned long mb)</div><div class='ctx'> {</div><div class='ctx'> 	return ((sector_t)mb * SZ_1M) &gt;&gt; SECTOR_SHIFT;</div><div class='hunk'>@@ -19,18 +21,6 @@ static inline unsigned int null_zone_no(struct nullb_device *dev, sector_t sect)</div><div class='ctx'> 	return sect &gt;&gt; ilog2(dev-&gt;zone_size_sects);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void null_lock_zone_res(struct nullb_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (dev-&gt;need_zone_res_mgmt)</div><div class='del'>-		spin_lock_irq(&amp;dev-&gt;zone_res_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void null_unlock_zone_res(struct nullb_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (dev-&gt;need_zone_res_mgmt)</div><div class='del'>-		spin_unlock_irq(&amp;dev-&gt;zone_res_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void null_init_zone_lock(struct nullb_device *dev,</div><div class='ctx'> 				       struct nullb_zone *zone)</div><div class='ctx'> {</div><div class='hunk'>@@ -103,6 +93,11 @@ int null_init_zoned_dev(struct nullb_device *dev,</div><div class='ctx'> 			dev-&gt;zone_nr_conv);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dev-&gt;zone_append_max_sectors =</div><div class='add'>+		min(ALIGN_DOWN(dev-&gt;zone_append_max_sectors,</div><div class='add'>+			       dev-&gt;blocksize &gt;&gt; SECTOR_SHIFT),</div><div class='add'>+		    zone_capacity_sects);</div><div class='add'>+</div><div class='ctx'> 	/* Max active zones has to be &lt; nbr of seq zones in order to be enforceable */</div><div class='ctx'> 	if (dev-&gt;zone_max_active &gt;= dev-&gt;nr_zones - dev-&gt;zone_nr_conv) {</div><div class='ctx'> 		dev-&gt;zone_max_active = 0;</div><div class='hunk'>@@ -154,7 +149,7 @@ int null_init_zoned_dev(struct nullb_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	lim-&gt;zoned = true;</div><div class='ctx'> 	lim-&gt;chunk_sectors = dev-&gt;zone_size_sects;</div><div class='del'>-	lim-&gt;max_zone_append_sectors = dev-&gt;zone_size_sects;</div><div class='add'>+	lim-&gt;max_zone_append_sectors = dev-&gt;zone_append_max_sectors;</div><div class='ctx'> 	lim-&gt;max_open_zones = dev-&gt;zone_max_open;</div><div class='ctx'> 	lim-&gt;max_active_zones = dev-&gt;zone_max_active;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -163,11 +158,16 @@ int null_init_zoned_dev(struct nullb_device *dev,</div><div class='ctx'> int null_register_zoned_dev(struct nullb *nullb)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = nullb-&gt;q;</div><div class='add'>+	struct gendisk *disk = nullb-&gt;disk;</div><div class='ctx'> </div><div class='ctx'> 	blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, q);</div><div class='del'>-	blk_queue_required_elevator_features(q, ELEVATOR_F_ZBD_SEQ_WRITE);</div><div class='del'>-	nullb-&gt;disk-&gt;nr_zones = bdev_nr_zones(nullb-&gt;disk-&gt;part0);</div><div class='del'>-	return blk_revalidate_disk_zones(nullb-&gt;disk, NULL);</div><div class='add'>+	disk-&gt;nr_zones = bdev_nr_zones(disk-&gt;part0);</div><div class='add'>+</div><div class='add'>+	pr_info("%s: using %s zone append\n",</div><div class='add'>+		disk-&gt;disk_name,</div><div class='add'>+		queue_emulates_zone_append(q) ? "emulated" : "native");</div><div class='add'>+</div><div class='add'>+	return blk_revalidate_disk_zones(disk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void null_free_zoned_dev(struct nullb_device *dev)</div><div class='hunk'>@@ -241,35 +241,6 @@ size_t null_zone_valid_read_len(struct nullb *nullb,</div><div class='ctx'> 	return (zone-&gt;wp - sector) &lt;&lt; SECTOR_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static blk_status_t __null_close_zone(struct nullb_device *dev,</div><div class='del'>-				      struct nullb_zone *zone)</div><div class='del'>-{</div><div class='del'>-	switch (zone-&gt;cond) {</div><div class='del'>-	case BLK_ZONE_COND_CLOSED:</div><div class='del'>-		/* close operation on closed is not an error */</div><div class='del'>-		return BLK_STS_OK;</div><div class='del'>-	case BLK_ZONE_COND_IMP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_imp_open--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_EXP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_exp_open--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_EMPTY:</div><div class='del'>-	case BLK_ZONE_COND_FULL:</div><div class='del'>-	default:</div><div class='del'>-		return BLK_STS_IOERR;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (zone-&gt;wp == zone-&gt;start) {</div><div class='del'>-		zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='del'>-	} else {</div><div class='del'>-		zone-&gt;cond = BLK_ZONE_COND_CLOSED;</div><div class='del'>-		dev-&gt;nr_zones_closed++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return BLK_STS_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void null_close_imp_open_zone(struct nullb_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct nullb_zone *zone;</div><div class='hunk'>@@ -286,7 +257,13 @@ static void null_close_imp_open_zone(struct nullb_device *dev)</div><div class='ctx'> 			zno = dev-&gt;zone_nr_conv;</div><div class='ctx'> </div><div class='ctx'> 		if (zone-&gt;cond == BLK_ZONE_COND_IMP_OPEN) {</div><div class='del'>-			__null_close_zone(dev, zone);</div><div class='add'>+			dev-&gt;nr_zones_imp_open--;</div><div class='add'>+			if (zone-&gt;wp == zone-&gt;start) {</div><div class='add'>+				zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='add'>+			} else {</div><div class='add'>+				zone-&gt;cond = BLK_ZONE_COND_CLOSED;</div><div class='add'>+				dev-&gt;nr_zones_closed++;</div><div class='add'>+			}</div><div class='ctx'> 			dev-&gt;imp_close_zone_no = zno;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -374,73 +351,73 @@ static blk_status_t null_zone_write(struct nullb_cmd *cmd, sector_t sector,</div><div class='ctx'> </div><div class='ctx'> 	null_lock_zone(dev, zone);</div><div class='ctx'> </div><div class='del'>-	if (zone-&gt;cond == BLK_ZONE_COND_FULL ||</div><div class='del'>-	    zone-&gt;cond == BLK_ZONE_COND_READONLY ||</div><div class='del'>-	    zone-&gt;cond == BLK_ZONE_COND_OFFLINE) {</div><div class='del'>-		/* Cannot write to the zone */</div><div class='del'>-		ret = BLK_STS_IOERR;</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * Regular writes must be at the write pointer position.</div><div class='del'>-	 * Zone append writes are automatically issued at the write</div><div class='del'>-	 * pointer and the position returned using the request or BIO</div><div class='del'>-	 * sector.</div><div class='add'>+	 * Regular writes must be at the write pointer position. Zone append</div><div class='add'>+	 * writes are automatically issued at the write pointer and the position</div><div class='add'>+	 * returned using the request sector. Note that we do not check the zone</div><div class='add'>+	 * condition because for FULL, READONLY and OFFLINE zones, the sector</div><div class='add'>+	 * check against the zone write pointer will always result in failing</div><div class='add'>+	 * the command.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (append) {</div><div class='add'>+		if (WARN_ON_ONCE(!dev-&gt;zone_append_max_sectors) ||</div><div class='add'>+		    zone-&gt;wp == NULL_ZONE_INVALID_WP) {</div><div class='add'>+			ret = BLK_STS_IOERR;</div><div class='add'>+			goto unlock_zone;</div><div class='add'>+		}</div><div class='ctx'> 		sector = zone-&gt;wp;</div><div class='ctx'> 		blk_mq_rq_from_pdu(cmd)-&gt;__sector = sector;</div><div class='del'>-	} else if (sector != zone-&gt;wp) {</div><div class='del'>-		ret = BLK_STS_IOERR;</div><div class='del'>-		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (zone-&gt;wp + nr_sectors &gt; zone-&gt;start + zone-&gt;capacity) {</div><div class='add'>+	if (sector != zone-&gt;wp ||</div><div class='add'>+	    zone-&gt;wp + nr_sectors &gt; zone-&gt;start + zone-&gt;capacity) {</div><div class='ctx'> 		ret = BLK_STS_IOERR;</div><div class='del'>-		goto unlock;</div><div class='add'>+		goto unlock_zone;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (zone-&gt;cond == BLK_ZONE_COND_CLOSED ||</div><div class='ctx'> 	    zone-&gt;cond == BLK_ZONE_COND_EMPTY) {</div><div class='del'>-		null_lock_zone_res(dev);</div><div class='add'>+		if (dev-&gt;need_zone_res_mgmt) {</div><div class='add'>+			spin_lock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> </div><div class='del'>-		ret = null_check_zone_resources(dev, zone);</div><div class='del'>-		if (ret != BLK_STS_OK) {</div><div class='del'>-			null_unlock_zone_res(dev);</div><div class='del'>-			goto unlock;</div><div class='del'>-		}</div><div class='del'>-		if (zone-&gt;cond == BLK_ZONE_COND_CLOSED) {</div><div class='del'>-			dev-&gt;nr_zones_closed--;</div><div class='del'>-			dev-&gt;nr_zones_imp_open++;</div><div class='del'>-		} else if (zone-&gt;cond == BLK_ZONE_COND_EMPTY) {</div><div class='del'>-			dev-&gt;nr_zones_imp_open++;</div><div class='del'>-		}</div><div class='add'>+			ret = null_check_zone_resources(dev, zone);</div><div class='add'>+			if (ret != BLK_STS_OK) {</div><div class='add'>+				spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+				goto unlock_zone;</div><div class='add'>+			}</div><div class='add'>+			if (zone-&gt;cond == BLK_ZONE_COND_CLOSED) {</div><div class='add'>+				dev-&gt;nr_zones_closed--;</div><div class='add'>+				dev-&gt;nr_zones_imp_open++;</div><div class='add'>+			} else if (zone-&gt;cond == BLK_ZONE_COND_EMPTY) {</div><div class='add'>+				dev-&gt;nr_zones_imp_open++;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		if (zone-&gt;cond != BLK_ZONE_COND_EXP_OPEN)</div><div class='del'>-			zone-&gt;cond = BLK_ZONE_COND_IMP_OPEN;</div><div class='add'>+			spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		null_unlock_zone_res(dev);</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_IMP_OPEN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors);</div><div class='ctx'> 	if (ret != BLK_STS_OK)</div><div class='del'>-		goto unlock;</div><div class='add'>+		goto unlock_zone;</div><div class='ctx'> </div><div class='ctx'> 	zone-&gt;wp += nr_sectors;</div><div class='ctx'> 	if (zone-&gt;wp == zone-&gt;start + zone-&gt;capacity) {</div><div class='del'>-		null_lock_zone_res(dev);</div><div class='del'>-		if (zone-&gt;cond == BLK_ZONE_COND_EXP_OPEN)</div><div class='del'>-			dev-&gt;nr_zones_exp_open--;</div><div class='del'>-		else if (zone-&gt;cond == BLK_ZONE_COND_IMP_OPEN)</div><div class='del'>-			dev-&gt;nr_zones_imp_open--;</div><div class='add'>+		if (dev-&gt;need_zone_res_mgmt) {</div><div class='add'>+			spin_lock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+			if (zone-&gt;cond == BLK_ZONE_COND_EXP_OPEN)</div><div class='add'>+				dev-&gt;nr_zones_exp_open--;</div><div class='add'>+			else if (zone-&gt;cond == BLK_ZONE_COND_IMP_OPEN)</div><div class='add'>+				dev-&gt;nr_zones_imp_open--;</div><div class='add'>+			spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+		}</div><div class='ctx'> 		zone-&gt;cond = BLK_ZONE_COND_FULL;</div><div class='del'>-		null_unlock_zone_res(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = BLK_STS_OK;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='add'>+unlock_zone:</div><div class='ctx'> 	null_unlock_zone(dev, zone);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -454,54 +431,100 @@ static blk_status_t null_open_zone(struct nullb_device *dev,</div><div class='ctx'> 	if (zone-&gt;type == BLK_ZONE_TYPE_CONVENTIONAL)</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='del'>-	null_lock_zone_res(dev);</div><div class='del'>-</div><div class='ctx'> 	switch (zone-&gt;cond) {</div><div class='ctx'> 	case BLK_ZONE_COND_EXP_OPEN:</div><div class='del'>-		/* open operation on exp open is not an error */</div><div class='del'>-		goto unlock;</div><div class='add'>+		/* Open operation on exp open is not an error */</div><div class='add'>+		return BLK_STS_OK;</div><div class='ctx'> 	case BLK_ZONE_COND_EMPTY:</div><div class='del'>-		ret = null_check_zone_resources(dev, zone);</div><div class='del'>-		if (ret != BLK_STS_OK)</div><div class='del'>-			goto unlock;</div><div class='del'>-		break;</div><div class='ctx'> 	case BLK_ZONE_COND_IMP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_imp_open--;</div><div class='del'>-		break;</div><div class='ctx'> 	case BLK_ZONE_COND_CLOSED:</div><div class='del'>-		ret = null_check_zone_resources(dev, zone);</div><div class='del'>-		if (ret != BLK_STS_OK)</div><div class='del'>-			goto unlock;</div><div class='del'>-		dev-&gt;nr_zones_closed--;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BLK_ZONE_COND_FULL:</div><div class='ctx'> 	default:</div><div class='del'>-		ret = BLK_STS_IOERR;</div><div class='del'>-		goto unlock;</div><div class='add'>+		return BLK_STS_IOERR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	zone-&gt;cond = BLK_ZONE_COND_EXP_OPEN;</div><div class='del'>-	dev-&gt;nr_zones_exp_open++;</div><div class='add'>+	if (dev-&gt;need_zone_res_mgmt) {</div><div class='add'>+		spin_lock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	null_unlock_zone_res(dev);</div><div class='add'>+		switch (zone-&gt;cond) {</div><div class='add'>+		case BLK_ZONE_COND_EMPTY:</div><div class='add'>+			ret = null_check_zone_resources(dev, zone);</div><div class='add'>+			if (ret != BLK_STS_OK) {</div><div class='add'>+				spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_imp_open--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_CLOSED:</div><div class='add'>+			ret = null_check_zone_resources(dev, zone);</div><div class='add'>+			if (ret != BLK_STS_OK) {</div><div class='add'>+				spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			dev-&gt;nr_zones_closed--;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+		dev-&gt;nr_zones_exp_open++;</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zone-&gt;cond = BLK_ZONE_COND_EXP_OPEN;</div><div class='add'>+</div><div class='add'>+	return BLK_STS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static blk_status_t null_close_zone(struct nullb_device *dev,</div><div class='ctx'> 				    struct nullb_zone *zone)</div><div class='ctx'> {</div><div class='del'>-	blk_status_t ret;</div><div class='del'>-</div><div class='ctx'> 	if (zone-&gt;type == BLK_ZONE_TYPE_CONVENTIONAL)</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='del'>-	null_lock_zone_res(dev);</div><div class='del'>-	ret = __null_close_zone(dev, zone);</div><div class='del'>-	null_unlock_zone_res(dev);</div><div class='add'>+	switch (zone-&gt;cond) {</div><div class='add'>+	case BLK_ZONE_COND_CLOSED:</div><div class='add'>+		/* close operation on closed is not an error */</div><div class='add'>+		return BLK_STS_OK;</div><div class='add'>+	case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+	case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+		break;</div><div class='add'>+	case BLK_ZONE_COND_EMPTY:</div><div class='add'>+	case BLK_ZONE_COND_FULL:</div><div class='add'>+	default:</div><div class='add'>+		return BLK_STS_IOERR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;need_zone_res_mgmt) {</div><div class='add'>+		spin_lock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+		switch (zone-&gt;cond) {</div><div class='add'>+		case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_imp_open--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_exp_open--;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (zone-&gt;wp &gt; zone-&gt;start)</div><div class='add'>+			dev-&gt;nr_zones_closed++;</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (zone-&gt;wp == zone-&gt;start)</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='add'>+	else</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_CLOSED;</div><div class='add'>+</div><div class='add'>+	return BLK_STS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static blk_status_t null_finish_zone(struct nullb_device *dev,</div><div class='hunk'>@@ -512,41 +535,47 @@ static blk_status_t null_finish_zone(struct nullb_device *dev,</div><div class='ctx'> 	if (zone-&gt;type == BLK_ZONE_TYPE_CONVENTIONAL)</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='del'>-	null_lock_zone_res(dev);</div><div class='add'>+	if (dev-&gt;need_zone_res_mgmt) {</div><div class='add'>+		spin_lock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> </div><div class='del'>-	switch (zone-&gt;cond) {</div><div class='del'>-	case BLK_ZONE_COND_FULL:</div><div class='del'>-		/* finish operation on full is not an error */</div><div class='del'>-		goto unlock;</div><div class='del'>-	case BLK_ZONE_COND_EMPTY:</div><div class='del'>-		ret = null_check_zone_resources(dev, zone);</div><div class='del'>-		if (ret != BLK_STS_OK)</div><div class='del'>-			goto unlock;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_IMP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_imp_open--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_EXP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_exp_open--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_CLOSED:</div><div class='del'>-		ret = null_check_zone_resources(dev, zone);</div><div class='del'>-		if (ret != BLK_STS_OK)</div><div class='del'>-			goto unlock;</div><div class='del'>-		dev-&gt;nr_zones_closed--;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = BLK_STS_IOERR;</div><div class='del'>-		goto unlock;</div><div class='add'>+		switch (zone-&gt;cond) {</div><div class='add'>+		case BLK_ZONE_COND_FULL:</div><div class='add'>+			/* Finish operation on full is not an error */</div><div class='add'>+			spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+			return BLK_STS_OK;</div><div class='add'>+		case BLK_ZONE_COND_EMPTY:</div><div class='add'>+			ret = null_check_zone_resources(dev, zone);</div><div class='add'>+			if (ret != BLK_STS_OK) {</div><div class='add'>+				spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_imp_open--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_exp_open--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_CLOSED:</div><div class='add'>+			ret = null_check_zone_resources(dev, zone);</div><div class='add'>+			if (ret != BLK_STS_OK) {</div><div class='add'>+				spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			dev-&gt;nr_zones_closed--;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+			return BLK_STS_IOERR;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	zone-&gt;cond = BLK_ZONE_COND_FULL;</div><div class='ctx'> 	zone-&gt;wp = zone-&gt;start + zone-&gt;len;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	null_unlock_zone_res(dev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return BLK_STS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static blk_status_t null_reset_zone(struct nullb_device *dev,</div><div class='hunk'>@@ -555,34 +584,33 @@ static blk_status_t null_reset_zone(struct nullb_device *dev,</div><div class='ctx'> 	if (zone-&gt;type == BLK_ZONE_TYPE_CONVENTIONAL)</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='del'>-	null_lock_zone_res(dev);</div><div class='add'>+	if (dev-&gt;need_zone_res_mgmt) {</div><div class='add'>+		spin_lock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> </div><div class='del'>-	switch (zone-&gt;cond) {</div><div class='del'>-	case BLK_ZONE_COND_EMPTY:</div><div class='del'>-		/* reset operation on empty is not an error */</div><div class='del'>-		null_unlock_zone_res(dev);</div><div class='del'>-		return BLK_STS_OK;</div><div class='del'>-	case BLK_ZONE_COND_IMP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_imp_open--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_EXP_OPEN:</div><div class='del'>-		dev-&gt;nr_zones_exp_open--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_CLOSED:</div><div class='del'>-		dev-&gt;nr_zones_closed--;</div><div class='del'>-		break;</div><div class='del'>-	case BLK_ZONE_COND_FULL:</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		null_unlock_zone_res(dev);</div><div class='del'>-		return BLK_STS_IOERR;</div><div class='add'>+		switch (zone-&gt;cond) {</div><div class='add'>+		case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_imp_open--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+			dev-&gt;nr_zones_exp_open--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_CLOSED:</div><div class='add'>+			dev-&gt;nr_zones_closed--;</div><div class='add'>+			break;</div><div class='add'>+		case BLK_ZONE_COND_EMPTY:</div><div class='add'>+		case BLK_ZONE_COND_FULL:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='add'>+			return BLK_STS_IOERR;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;dev-&gt;zone_res_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='ctx'> 	zone-&gt;wp = zone-&gt;start;</div><div class='ctx'> </div><div class='del'>-	null_unlock_zone_res(dev);</div><div class='del'>-</div><div class='ctx'> 	if (dev-&gt;memory_backed)</div><div class='ctx'> 		return null_handle_discard(dev, zone-&gt;start, zone-&gt;len);</div><div class='ctx'> </div><div class='hunk'>@@ -711,7 +739,7 @@ static void null_set_zone_cond(struct nullb_device *dev,</div><div class='ctx'> 		    zone-&gt;cond != BLK_ZONE_COND_OFFLINE)</div><div class='ctx'> 			null_finish_zone(dev, zone);</div><div class='ctx'> 		zone-&gt;cond = cond;</div><div class='del'>-		zone-&gt;wp = (sector_t)-1;</div><div class='add'>+		zone-&gt;wp = NULL_ZONE_INVALID_WP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	null_unlock_zone(dev, zone);</div><div class='head'>diff --git a/drivers/block/ublk_drv.c b/drivers/block/ublk_drv.c<br/>index bea3d5cf8a83..176657dce3e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/ublk_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/ublk_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/ublk_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/block/ublk_drv.c</a></div><div class='hunk'>@@ -221,7 +221,7 @@ static int ublk_get_nr_zones(const struct ublk_device *ub)</div><div class='ctx'> </div><div class='ctx'> static int ublk_revalidate_disk_zones(struct ublk_device *ub)</div><div class='ctx'> {</div><div class='del'>-	return blk_revalidate_disk_zones(ub-&gt;ub_disk, NULL);</div><div class='add'>+	return blk_revalidate_disk_zones(ub-&gt;ub_disk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_dev_param_zoned_validate(const struct ublk_device *ub)</div><div class='hunk'>@@ -249,8 +249,7 @@ static int ublk_dev_param_zoned_validate(const struct ublk_device *ub)</div><div class='ctx'> static void ublk_dev_param_zoned_apply(struct ublk_device *ub)</div><div class='ctx'> {</div><div class='ctx'> 	blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-	blk_queue_required_elevator_features(ub-&gt;ub_disk-&gt;queue,</div><div class='del'>-					     ELEVATOR_F_ZBD_SEQ_WRITE);</div><div class='add'>+</div><div class='ctx'> 	ub-&gt;ub_disk-&gt;nr_zones = ublk_get_nr_zones(ub);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2177,7 +2176,8 @@ static int ublk_ctrl_start_dev(struct ublk_device *ub, struct io_uring_cmd *cmd)</div><div class='ctx'> 		.max_hw_sectors		= p-&gt;max_sectors,</div><div class='ctx'> 		.chunk_sectors		= p-&gt;chunk_sectors,</div><div class='ctx'> 		.virt_boundary_mask	= p-&gt;virt_boundary_mask,</div><div class='del'>-</div><div class='add'>+		.max_segments		= USHRT_MAX,</div><div class='add'>+		.max_segment_size	= UINT_MAX,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct gendisk *disk;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='head'>diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c<br/>index 42dea7601d87..c1af0a7d56c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/virtio_blk.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/block/virtio_blk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/virtio_blk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/block/virtio_blk.c</a></div><div class='hunk'>@@ -1543,7 +1543,7 @@ static int virtblk_probe(struct virtio_device *vdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &amp;&amp; lim.zoned) {</div><div class='ctx'> 		blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, vblk-&gt;disk-&gt;queue);</div><div class='del'>-		err = blk_revalidate_disk_zones(vblk-&gt;disk, NULL);</div><div class='add'>+		err = blk_revalidate_disk_zones(vblk-&gt;disk);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out_cleanup_disk;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig<br/>index bc211c324206..0b5f218ac505 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/Kconfig</a></div><div class='hunk'>@@ -478,5 +478,16 @@ config BT_NXPUART</div><div class='ctx'> 	  Say Y here to compile support for NXP Bluetooth UART device into</div><div class='ctx'> 	  the kernel, or say M here to compile as a module (btnxpuart).</div><div class='ctx'> </div><div class='add'>+config BT_INTEL_PCIE</div><div class='add'>+	tristate "Intel HCI PCIe driver"</div><div class='add'>+	depends on PCI</div><div class='add'>+	select BT_INTEL</div><div class='add'>+	select FW_LOADER</div><div class='add'>+	help</div><div class='add'>+	  Intel Bluetooth transport driver for PCIe.</div><div class='add'>+	  This driver is required if you want to use Intel Bluetooth device</div><div class='add'>+	  with PCIe interface.</div><div class='ctx'> </div><div class='add'>+	  Say Y here to compiler support for Intel Bluetooth PCIe device into</div><div class='add'>+	  the kernel or say M to compile it as module (btintel_pcie)</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile<br/>index 7a5967e9ac48..0730d6684d1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/Makefile</a></div><div class='hunk'>@@ -17,6 +17,7 @@ obj-$(CONFIG_BT_HCIBTUSB)	+= btusb.o</div><div class='ctx'> obj-$(CONFIG_BT_HCIBTSDIO)	+= btsdio.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_BT_INTEL)		+= btintel.o</div><div class='add'>+obj-$(CONFIG_BT_INTEL_PCIE)	+= btintel_pcie.o btintel.o</div><div class='ctx'> obj-$(CONFIG_BT_ATH3K)		+= ath3k.o</div><div class='ctx'> obj-$(CONFIG_BT_MRVL)		+= btmrvl.o</div><div class='ctx'> obj-$(CONFIG_BT_MRVL_SDIO)	+= btmrvl_sdio.o</div><div class='head'>diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c<br/>index 88262d3a9392..ce97b336fbfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/ath3k.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/ath3k.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/ath3k.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/ath3k.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'>  * Copyright (c) 2008-2009 Atheros Communications Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -128,7 +127,6 @@ MODULE_DEVICE_TABLE(usb, ath3k_table);</div><div class='ctx'>  * for AR3012</div><div class='ctx'>  */</div><div class='ctx'> static const struct usb_device_id ath3k_blist_tbl[] = {</div><div class='del'>-</div><div class='ctx'> 	/* Atheros AR3012 with sflash firmware*/</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe04e), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe04d), .driver_info = BTUSB_ATH3012 },</div><div class='hunk'>@@ -202,7 +200,7 @@ static inline void ath3k_log_failed_loading(int err, int len, int size,</div><div class='ctx'> #define TIMEGAP_USEC_MAX	100</div><div class='ctx'> </div><div class='ctx'> static int ath3k_load_firmware(struct usb_device *udev,</div><div class='del'>-				const struct firmware *firmware)</div><div class='add'>+			       const struct firmware *firmware)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *send_buf;</div><div class='ctx'> 	int len = 0;</div><div class='hunk'>@@ -237,9 +235,9 @@ static int ath3k_load_firmware(struct usb_device *udev,</div><div class='ctx'> 		memcpy(send_buf, firmware-&gt;data + sent, size);</div><div class='ctx'> </div><div class='ctx'> 		err = usb_bulk_msg(udev, pipe, send_buf, size,</div><div class='del'>-					&amp;len, 3000);</div><div class='add'>+				   &amp;len, 3000);</div><div class='ctx'> </div><div class='del'>-		if (err || (len != size)) {</div><div class='add'>+		if (err || len != size) {</div><div class='ctx'> 			ath3k_log_failed_loading(err, len, size, count);</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -262,7 +260,7 @@ static int ath3k_get_state(struct usb_device *udev, unsigned char *state)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath3k_get_version(struct usb_device *udev,</div><div class='del'>-			struct ath3k_version *version)</div><div class='add'>+			     struct ath3k_version *version)</div><div class='ctx'> {</div><div class='ctx'> 	return usb_control_msg_recv(udev, 0, ATH3K_GETVERSION,</div><div class='ctx'> 				    USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,</div><div class='hunk'>@@ -271,7 +269,7 @@ static int ath3k_get_version(struct usb_device *udev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath3k_load_fwfile(struct usb_device *udev,</div><div class='del'>-		const struct firmware *firmware)</div><div class='add'>+			     const struct firmware *firmware)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *send_buf;</div><div class='ctx'> 	int len = 0;</div><div class='hunk'>@@ -310,8 +308,8 @@ static int ath3k_load_fwfile(struct usb_device *udev,</div><div class='ctx'> 		memcpy(send_buf, firmware-&gt;data + sent, size);</div><div class='ctx'> </div><div class='ctx'> 		err = usb_bulk_msg(udev, pipe, send_buf, size,</div><div class='del'>-					&amp;len, 3000);</div><div class='del'>-		if (err || (len != size)) {</div><div class='add'>+				   &amp;len, 3000);</div><div class='add'>+		if (err || len != size) {</div><div class='ctx'> 			ath3k_log_failed_loading(err, len, size, count);</div><div class='ctx'> 			kfree(send_buf);</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -425,7 +423,6 @@ static int ath3k_load_syscfg(struct usb_device *udev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (fw_version.ref_clock) {</div><div class='del'>-</div><div class='ctx'> 	case ATH3K_XTAL_FREQ_26M:</div><div class='ctx'> 		clk_value = 26;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -441,7 +438,7 @@ static int ath3k_load_syscfg(struct usb_device *udev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	snprintf(filename, ATH3K_NAME_LEN, "ar3k/ramps_0x%08x_%d%s",</div><div class='del'>-		le32_to_cpu(fw_version.rom_version), clk_value, ".dfu");</div><div class='add'>+		 le32_to_cpu(fw_version.rom_version), clk_value, ".dfu");</div><div class='ctx'> </div><div class='ctx'> 	ret = request_firmware(&amp;firmware, filename, &amp;udev-&gt;dev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -456,7 +453,7 @@ static int ath3k_load_syscfg(struct usb_device *udev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath3k_probe(struct usb_interface *intf,</div><div class='del'>-			const struct usb_device_id *id)</div><div class='add'>+		       const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	const struct firmware *firmware;</div><div class='ctx'> 	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='hunk'>@@ -505,10 +502,10 @@ static int ath3k_probe(struct usb_interface *intf,</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		if (ret == -ENOENT)</div><div class='ctx'> 			BT_ERR("Firmware file \"%s\" not found",</div><div class='del'>-							ATH3K_FIRMWARE);</div><div class='add'>+			       ATH3K_FIRMWARE);</div><div class='ctx'> 		else</div><div class='ctx'> 			BT_ERR("Firmware file \"%s\" request failed (err=%d)",</div><div class='del'>-							ATH3K_FIRMWARE, ret);</div><div class='add'>+			       ATH3K_FIRMWARE, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bluetooth/btintel.c b/drivers/bluetooth/btintel.c<br/>index 6ba7f5d1b837..0c855c3ee1c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btintel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btintel.c</a></div><div class='hunk'>@@ -245,7 +245,7 @@ static int btintel_set_diag_combined(struct hci_dev *hdev, bool enable)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void btintel_hw_error(struct hci_dev *hdev, u8 code)</div><div class='add'>+void btintel_hw_error(struct hci_dev *hdev, u8 code)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u8 type = 0x00;</div><div class='hunk'>@@ -277,6 +277,7 @@ static void btintel_hw_error(struct hci_dev *hdev, u8 code)</div><div class='ctx'> </div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btintel_hw_error);</div><div class='ctx'> </div><div class='ctx'> int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver)</div><div class='ctx'> {</div><div class='hunk'>@@ -455,8 +456,8 @@ int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(btintel_read_version);</div><div class='ctx'> </div><div class='del'>-static int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='del'>-				    struct intel_version_tlv *version)</div><div class='add'>+int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='add'>+			     struct intel_version_tlv *version)</div><div class='ctx'> {</div><div class='ctx'> 	const char *variant;</div><div class='ctx'> </div><div class='hunk'>@@ -481,6 +482,7 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='ctx'> 	case 0x19:	/* Slr-F */</div><div class='ctx'> 	case 0x1b:      /* Mgr */</div><div class='ctx'> 	case 0x1c:	/* Gale Peak (GaP) */</div><div class='add'>+	case 0x1e:	/* BlazarI (Bzr) */</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		bt_dev_err(hdev, "Unsupported Intel hardware variant (0x%x)",</div><div class='hunk'>@@ -489,7 +491,7 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (version-&gt;img_type) {</div><div class='del'>-	case 0x01:</div><div class='add'>+	case BTINTEL_IMG_BOOTLOADER:</div><div class='ctx'> 		variant = "Bootloader";</div><div class='ctx'> 		/* It is required that every single firmware fragment is acknowledged</div><div class='ctx'> 		 * with a command complete event. If the boot parameters indicate</div><div class='hunk'>@@ -521,7 +523,10 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='ctx'> 			    version-&gt;min_fw_build_nn, version-&gt;min_fw_build_cw,</div><div class='ctx'> 			    2000 + version-&gt;min_fw_build_yy);</div><div class='ctx'> 		break;</div><div class='del'>-	case 0x03:</div><div class='add'>+	case BTINTEL_IMG_IML:</div><div class='add'>+		variant = "Intermediate loader";</div><div class='add'>+		break;</div><div class='add'>+	case BTINTEL_IMG_OP:</div><div class='ctx'> 		variant = "Firmware";</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -535,15 +540,16 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='ctx'> 	bt_dev_info(hdev, "%s timestamp %u.%u buildtype %u build %u", variant,</div><div class='ctx'> 		    2000 + (version-&gt;timestamp &gt;&gt; 8), version-&gt;timestamp &amp; 0xff,</div><div class='ctx'> 		    version-&gt;build_type, version-&gt;build_num);</div><div class='del'>-	if (version-&gt;img_type == 0x03)</div><div class='add'>+	if (version-&gt;img_type == BTINTEL_IMG_OP)</div><div class='ctx'> 		bt_dev_info(hdev, "Firmware SHA1: 0x%8.8x", version-&gt;git_sha1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btintel_version_info_tlv);</div><div class='ctx'> </div><div class='del'>-static int btintel_parse_version_tlv(struct hci_dev *hdev,</div><div class='del'>-				     struct intel_version_tlv *version,</div><div class='del'>-				     struct sk_buff *skb)</div><div class='add'>+int btintel_parse_version_tlv(struct hci_dev *hdev,</div><div class='add'>+			      struct intel_version_tlv *version,</div><div class='add'>+			      struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	/* Consume Command Complete Status field */</div><div class='ctx'> 	skb_pull(skb, 1);</div><div class='hunk'>@@ -645,6 +651,7 @@ static int btintel_parse_version_tlv(struct hci_dev *hdev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btintel_parse_version_tlv);</div><div class='ctx'> </div><div class='ctx'> static int btintel_read_version_tlv(struct hci_dev *hdev,</div><div class='ctx'> 				    struct intel_version_tlv *version)</div><div class='hunk'>@@ -1172,7 +1179,7 @@ static int btintel_download_fw_tlv(struct hci_dev *hdev,</div><div class='ctx'> 	 * If the firmware version has changed that means it needs to be reset</div><div class='ctx'> 	 * to bootloader when operational so the new firmware can be loaded.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ver-&gt;img_type == 0x03)</div><div class='add'>+	if (ver-&gt;img_type == BTINTEL_IMG_OP)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* iBT hardware variants 0x0b, 0x0c, 0x11, 0x12, 0x13, 0x14 support</div><div class='hunk'>@@ -2194,10 +2201,26 @@ static void btintel_get_fw_name_tlv(const struct intel_version_tlv *ver,</div><div class='ctx'> 				    char *fw_name, size_t len,</div><div class='ctx'> 				    const char *suffix)</div><div class='ctx'> {</div><div class='add'>+	const char *format;</div><div class='ctx'> 	/* The firmware file name for new generation controllers will be</div><div class='ctx'> 	 * ibt-&lt;cnvi_top type+cnvi_top step&gt;-&lt;cnvr_top type+cnvr_top step&gt;</div><div class='ctx'> 	 */</div><div class='del'>-	snprintf(fw_name, len, "intel/ibt-%04x-%04x.%s",</div><div class='add'>+	switch (ver-&gt;cnvi_top &amp; 0xfff) {</div><div class='add'>+	/* Only Blazar  product supports downloading of intermediate loader</div><div class='add'>+	 * image</div><div class='add'>+	 */</div><div class='add'>+	case BTINTEL_CNVI_BLAZARI:</div><div class='add'>+		if (ver-&gt;img_type == BTINTEL_IMG_BOOTLOADER)</div><div class='add'>+			format = "intel/ibt-%04x-%04x-iml.%s";</div><div class='add'>+		else</div><div class='add'>+			format = "intel/ibt-%04x-%04x.%s";</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+			format = "intel/ibt-%04x-%04x.%s";</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(fw_name, len, format,</div><div class='ctx'> 		 INTEL_CNVX_TOP_PACK_SWAB(INTEL_CNVX_TOP_TYPE(ver-&gt;cnvi_top),</div><div class='ctx'> 					  INTEL_CNVX_TOP_STEP(ver-&gt;cnvi_top)),</div><div class='ctx'> 		 INTEL_CNVX_TOP_PACK_SWAB(INTEL_CNVX_TOP_TYPE(ver-&gt;cnvr_top),</div><div class='hunk'>@@ -2230,7 +2253,7 @@ static int btintel_prepare_fw_download_tlv(struct hci_dev *hdev,</div><div class='ctx'> 	 * It is not possible to use the Secure Boot Parameters in this</div><div class='ctx'> 	 * case since that command is only available in bootloader mode.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ver-&gt;img_type == 0x03) {</div><div class='add'>+	if (ver-&gt;img_type == BTINTEL_IMG_OP) {</div><div class='ctx'> 		btintel_clear_flag(hdev, INTEL_BOOTLOADER);</div><div class='ctx'> 		btintel_check_bdaddr(hdev);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -2577,8 +2600,8 @@ static void btintel_set_dsm_reset_method(struct hci_dev *hdev,</div><div class='ctx'> 	data-&gt;acpi_reset_method = btintel_acpi_reset_method;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int btintel_bootloader_setup_tlv(struct hci_dev *hdev,</div><div class='del'>-					struct intel_version_tlv *ver)</div><div class='add'>+int btintel_bootloader_setup_tlv(struct hci_dev *hdev,</div><div class='add'>+				 struct intel_version_tlv *ver)</div><div class='ctx'> {</div><div class='ctx'> 	u32 boot_param;</div><div class='ctx'> 	char ddcname[64];</div><div class='hunk'>@@ -2600,13 +2623,30 @@ static int btintel_bootloader_setup_tlv(struct hci_dev *hdev,</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* check if controller is already having an operational firmware */</div><div class='del'>-	if (ver-&gt;img_type == 0x03)</div><div class='add'>+	if (ver-&gt;img_type == BTINTEL_IMG_OP)</div><div class='ctx'> 		goto finish;</div><div class='ctx'> </div><div class='ctx'> 	err = btintel_boot(hdev, boot_param);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = btintel_read_version_tlv(hdev, ver);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If image type returned is BTINTEL_IMG_IML, then controller supports</div><div class='add'>+	 * intermediae loader image</div><div class='add'>+	 */</div><div class='add'>+	if (ver-&gt;img_type == BTINTEL_IMG_IML) {</div><div class='add'>+		err = btintel_prepare_fw_download_tlv(hdev, ver, &amp;boot_param);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = btintel_boot(hdev, boot_param);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	btintel_clear_flag(hdev, INTEL_BOOTLOADER);</div><div class='ctx'> </div><div class='ctx'> 	btintel_get_fw_name_tlv(ver, ddcname, sizeof(ddcname), "ddc");</div><div class='hunk'>@@ -2645,8 +2685,9 @@ finish:</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btintel_bootloader_setup_tlv);</div><div class='ctx'> </div><div class='del'>-static void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)</div><div class='add'>+void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)</div><div class='ctx'> {</div><div class='ctx'> 	switch (hw_variant) {</div><div class='ctx'> 	/* Legacy bootloader devices that supports MSFT Extension */</div><div class='hunk'>@@ -2662,6 +2703,7 @@ static void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)</div><div class='ctx'> 	case 0x19:</div><div class='ctx'> 	case 0x1b:</div><div class='ctx'> 	case 0x1c:</div><div class='add'>+	case 0x1e:</div><div class='ctx'> 		hci_set_msft_opcode(hdev, 0xFC1E);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2669,6 +2711,7 @@ static void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btintel_set_msft_opcode);</div><div class='ctx'> </div><div class='ctx'> static void btintel_print_fseq_info(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -2920,6 +2963,11 @@ static int btintel_setup_combined(struct hci_dev *hdev)</div><div class='ctx'> 			err = -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		hci_set_hw_info(hdev,</div><div class='add'>+				"INTEL platform=%u variant=%u revision=%u",</div><div class='add'>+				ver.hw_platform, ver.hw_variant,</div><div class='add'>+				ver.hw_revision);</div><div class='add'>+</div><div class='ctx'> 		goto exit_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2996,6 +3044,7 @@ static int btintel_setup_combined(struct hci_dev *hdev)</div><div class='ctx'> 	case 0x19:</div><div class='ctx'> 	case 0x1b:</div><div class='ctx'> 	case 0x1c:</div><div class='add'>+	case 0x1e:</div><div class='ctx'> 		/* Display version information of TLV type */</div><div class='ctx'> 		btintel_version_info_tlv(hdev, &amp;ver_tlv);</div><div class='ctx'> </div><div class='hunk'>@@ -3024,13 +3073,17 @@ static int btintel_setup_combined(struct hci_dev *hdev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	hci_set_hw_info(hdev, "INTEL platform=%u variant=%u",</div><div class='add'>+			INTEL_HW_PLATFORM(ver_tlv.cnvi_bt),</div><div class='add'>+			INTEL_HW_VARIANT(ver_tlv.cnvi_bt));</div><div class='add'>+</div><div class='ctx'> exit_error:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int btintel_shutdown_combined(struct hci_dev *hdev)</div><div class='add'>+int btintel_shutdown_combined(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -3064,6 +3117,7 @@ static int btintel_shutdown_combined(struct hci_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btintel_shutdown_combined);</div><div class='ctx'> </div><div class='ctx'> int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/bluetooth/btintel.h b/drivers/bluetooth/btintel.h<br/>index d19fcdb9ff0b..b5fea735e260 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btintel.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btintel.h</a></div><div class='hunk'>@@ -51,6 +51,12 @@ struct intel_tlv {</div><div class='ctx'> 	u8 val[];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+#define BTINTEL_CNVI_BLAZARI		0x900</div><div class='add'>+</div><div class='add'>+#define BTINTEL_IMG_BOOTLOADER		0x01	/* Bootloader image */</div><div class='add'>+#define BTINTEL_IMG_IML			0x02	/* Intermediate image */</div><div class='add'>+#define BTINTEL_IMG_OP			0x03	/* Operational image */</div><div class='add'>+</div><div class='ctx'> struct intel_version_tlv {</div><div class='ctx'> 	u32	cnvi_top;</div><div class='ctx'> 	u32	cnvr_top;</div><div class='hunk'>@@ -203,7 +209,7 @@ struct btintel_data {</div><div class='ctx'> #define btintel_wait_on_flag_timeout(hdev, nr, m, to)			\</div><div class='ctx'> 		wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)</div><div class='ctx'> </div><div class='del'>-#if IS_ENABLED(CONFIG_BT_INTEL)</div><div class='add'>+#if IS_ENABLED(CONFIG_BT_INTEL) || IS_ENABLED(CONFIG_BT_INTEL_PCIE)</div><div class='ctx'> </div><div class='ctx'> int btintel_check_bdaddr(struct hci_dev *hdev);</div><div class='ctx'> int btintel_enter_mfg(struct hci_dev *hdev);</div><div class='hunk'>@@ -228,6 +234,16 @@ void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);</div><div class='ctx'> void btintel_secure_send_result(struct hci_dev *hdev,</div><div class='ctx'> 				const void *ptr, unsigned int len);</div><div class='ctx'> int btintel_set_quality_report(struct hci_dev *hdev, bool enable);</div><div class='add'>+int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='add'>+			     struct intel_version_tlv *version);</div><div class='add'>+int btintel_parse_version_tlv(struct hci_dev *hdev,</div><div class='add'>+			      struct intel_version_tlv *version,</div><div class='add'>+			      struct sk_buff *skb);</div><div class='add'>+void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant);</div><div class='add'>+int btintel_bootloader_setup_tlv(struct hci_dev *hdev,</div><div class='add'>+				 struct intel_version_tlv *ver);</div><div class='add'>+int btintel_shutdown_combined(struct hci_dev *hdev);</div><div class='add'>+void btintel_hw_error(struct hci_dev *hdev, u8 code);</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> static inline int btintel_check_bdaddr(struct hci_dev *hdev)</div><div class='hunk'>@@ -324,4 +340,37 @@ static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline int btintel_version_info_tlv(struct hci_dev *hdev,</div><div class='add'>+					   struct intel_version_tlv *version)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int btintel_parse_version_tlv(struct hci_dev *hdev,</div><div class='add'>+					    struct intel_version_tlv *version,</div><div class='add'>+					    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int btintel_bootloader_setup_tlv(struct hci_dev *hdev,</div><div class='add'>+					       struct intel_version_tlv *ver)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int btintel_shutdown_combined(struct hci_dev *hdev)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void btintel_hw_error(struct hci_dev *hdev, u8 code)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/bluetooth/btintel_pcie.c b/drivers/bluetooth/btintel_pcie.c<br/>new file mode 100644<br/>index 000000000000..5b6805d87fcf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel_pcie.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btintel_pcie.c</a></div><div class='hunk'>@@ -0,0 +1,1357 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ *  Bluetooth support for Intel PCIe devices</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2024  Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/bluetooth/bluetooth.h&gt;</div><div class='add'>+#include &lt;net/bluetooth/hci_core.h&gt;</div><div class='add'>+</div><div class='add'>+#include "btintel.h"</div><div class='add'>+#include "btintel_pcie.h"</div><div class='add'>+</div><div class='add'>+#define VERSION "0.1"</div><div class='add'>+</div><div class='add'>+#define BTINTEL_PCI_DEVICE(dev, subdev)	\</div><div class='add'>+	.vendor = PCI_VENDOR_ID_INTEL,	\</div><div class='add'>+	.device = (dev),		\</div><div class='add'>+	.subvendor = PCI_ANY_ID,	\</div><div class='add'>+	.subdevice = (subdev),		\</div><div class='add'>+	.driver_data = 0</div><div class='add'>+</div><div class='add'>+#define POLL_INTERVAL_US	10</div><div class='add'>+</div><div class='add'>+/* Intel Bluetooth PCIe device id table */</div><div class='add'>+static const struct pci_device_id btintel_pcie_table[] = {</div><div class='add'>+	{ BTINTEL_PCI_DEVICE(0xA876, PCI_ANY_ID) },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, btintel_pcie_table);</div><div class='add'>+</div><div class='add'>+/* Intel PCIe uses 4 bytes of HCI type instead of 1 byte BT SIG HCI type */</div><div class='add'>+#define BTINTEL_PCIE_HCI_TYPE_LEN	4</div><div class='add'>+#define BTINTEL_PCIE_HCI_CMD_PKT	0x00000001</div><div class='add'>+#define BTINTEL_PCIE_HCI_ACL_PKT	0x00000002</div><div class='add'>+#define BTINTEL_PCIE_HCI_SCO_PKT	0x00000003</div><div class='add'>+#define BTINTEL_PCIE_HCI_EVT_PKT	0x00000004</div><div class='add'>+</div><div class='add'>+static inline void ipc_print_ia_ring(struct hci_dev *hdev, struct ia *ia,</div><div class='add'>+				     u16 queue_num)</div><div class='add'>+{</div><div class='add'>+	bt_dev_dbg(hdev, "IA: %s: tr-h:%02u  tr-t:%02u  cr-h:%02u  cr-t:%02u",</div><div class='add'>+		   queue_num == BTINTEL_PCIE_TXQ_NUM ? "TXQ" : "RXQ",</div><div class='add'>+		   ia-&gt;tr_hia[queue_num], ia-&gt;tr_tia[queue_num],</div><div class='add'>+		   ia-&gt;cr_hia[queue_num], ia-&gt;cr_tia[queue_num]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ipc_print_urbd1(struct hci_dev *hdev, struct urbd1 *urbd1,</div><div class='add'>+				   u16 index)</div><div class='add'>+{</div><div class='add'>+	bt_dev_dbg(hdev, "RXQ:urbd1(%u) frbd_tag:%u status: 0x%x fixed:0x%x",</div><div class='add'>+		   index, urbd1-&gt;frbd_tag, urbd1-&gt;status, urbd1-&gt;fixed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_poll_bit(struct btintel_pcie_data *data, u32 offset,</div><div class='add'>+				 u32 bits, u32 mask, int timeout_us)</div><div class='add'>+{</div><div class='add'>+	int t = 0;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		reg = btintel_pcie_rd_reg32(data, offset);</div><div class='add'>+</div><div class='add'>+		if ((reg &amp; mask) == (bits &amp; mask))</div><div class='add'>+			return t;</div><div class='add'>+		udelay(POLL_INTERVAL_US);</div><div class='add'>+		t += POLL_INTERVAL_US;</div><div class='add'>+	} while (t &lt; timeout_us);</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct btintel_pcie_data *btintel_pcie_get_data(struct msix_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u8 queue = entry-&gt;entry;</div><div class='add'>+	struct msix_entry *entries = entry - queue;</div><div class='add'>+</div><div class='add'>+	return container_of(entries, struct btintel_pcie_data, msix_entries[0]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set the doorbell for TXQ to notify the device that @index (actually index-1)</div><div class='add'>+ * of the TFD is updated and ready to transmit.</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_set_tx_db(struct btintel_pcie_data *data, u16 index)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = index;</div><div class='add'>+	val |= (BTINTEL_PCIE_TX_DB_VEC &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_HBUS_TARG_WRPTR, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Copy the data to next(@tfd_index) data buffer and update the TFD(transfer</div><div class='add'>+ * descriptor) with the data length and the DMA address of the data buffer.</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_prepare_tx(struct txq *txq, u16 tfd_index,</div><div class='add'>+				    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct data_buf *buf;</div><div class='add'>+	struct tfd *tfd;</div><div class='add'>+</div><div class='add'>+	tfd = &amp;txq-&gt;tfds[tfd_index];</div><div class='add'>+	memset(tfd, 0, sizeof(*tfd));</div><div class='add'>+</div><div class='add'>+	buf = &amp;txq-&gt;bufs[tfd_index];</div><div class='add'>+</div><div class='add'>+	tfd-&gt;size = skb-&gt;len;</div><div class='add'>+	tfd-&gt;addr = buf-&gt;data_p_addr;</div><div class='add'>+</div><div class='add'>+	/* Copy the outgoing data to DMA buffer */</div><div class='add'>+	memcpy(buf-&gt;data, skb-&gt;data, tfd-&gt;size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_send_sync(struct btintel_pcie_data *data,</div><div class='add'>+				  struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 tfd_index;</div><div class='add'>+	struct txq *txq = &amp;data-&gt;txq;</div><div class='add'>+</div><div class='add'>+	tfd_index = data-&gt;ia.tr_hia[BTINTEL_PCIE_TXQ_NUM];</div><div class='add'>+</div><div class='add'>+	if (tfd_index &gt; txq-&gt;count)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* Prepare for TX. It updates the TFD with the length of data and</div><div class='add'>+	 * address of the DMA buffer, and copy the data to the DMA buffer</div><div class='add'>+	 */</div><div class='add'>+	btintel_pcie_prepare_tx(txq, tfd_index, skb);</div><div class='add'>+</div><div class='add'>+	tfd_index = (tfd_index + 1) % txq-&gt;count;</div><div class='add'>+	data-&gt;ia.tr_hia[BTINTEL_PCIE_TXQ_NUM] = tfd_index;</div><div class='add'>+</div><div class='add'>+	/* Arm wait event condition */</div><div class='add'>+	data-&gt;tx_wait_done = false;</div><div class='add'>+</div><div class='add'>+	/* Set the doorbell to notify the device */</div><div class='add'>+	btintel_pcie_set_tx_db(data, tfd_index);</div><div class='add'>+</div><div class='add'>+	/* Wait for the complete interrupt - URBD0 */</div><div class='add'>+	ret = wait_event_timeout(data-&gt;tx_wait_q, data-&gt;tx_wait_done,</div><div class='add'>+				 msecs_to_jiffies(BTINTEL_PCIE_TX_WAIT_TIMEOUT_MS));</div><div class='add'>+	if (!ret)</div><div class='add'>+		return -ETIME;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set the doorbell for RXQ to notify the device that @index (actually index-1)</div><div class='add'>+ * is available to receive the data</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_set_rx_db(struct btintel_pcie_data *data, u16 index)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = index;</div><div class='add'>+	val |= (BTINTEL_PCIE_RX_DB_VEC &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_HBUS_TARG_WRPTR, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Update the FRBD (free buffer descriptor) with the @frbd_index and the</div><div class='add'>+ * DMA address of the free buffer.</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_prepare_rx(struct rxq *rxq, u16 frbd_index)</div><div class='add'>+{</div><div class='add'>+	struct data_buf *buf;</div><div class='add'>+	struct frbd *frbd;</div><div class='add'>+</div><div class='add'>+	/* Get the buffer of the FRBD for DMA */</div><div class='add'>+	buf = &amp;rxq-&gt;bufs[frbd_index];</div><div class='add'>+</div><div class='add'>+	frbd = &amp;rxq-&gt;frbds[frbd_index];</div><div class='add'>+	memset(frbd, 0, sizeof(*frbd));</div><div class='add'>+</div><div class='add'>+	/* Update FRBD */</div><div class='add'>+	frbd-&gt;tag = frbd_index;</div><div class='add'>+	frbd-&gt;addr = buf-&gt;data_p_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_submit_rx(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	u16 frbd_index;</div><div class='add'>+	struct rxq *rxq = &amp;data-&gt;rxq;</div><div class='add'>+</div><div class='add'>+	frbd_index = data-&gt;ia.tr_hia[BTINTEL_PCIE_RXQ_NUM];</div><div class='add'>+</div><div class='add'>+	if (frbd_index &gt; rxq-&gt;count)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* Prepare for RX submit. It updates the FRBD with the address of DMA</div><div class='add'>+	 * buffer</div><div class='add'>+	 */</div><div class='add'>+	btintel_pcie_prepare_rx(rxq, frbd_index);</div><div class='add'>+</div><div class='add'>+	frbd_index = (frbd_index + 1) % rxq-&gt;count;</div><div class='add'>+	data-&gt;ia.tr_hia[BTINTEL_PCIE_RXQ_NUM] = frbd_index;</div><div class='add'>+	ipc_print_ia_ring(data-&gt;hdev, &amp;data-&gt;ia, BTINTEL_PCIE_RXQ_NUM);</div><div class='add'>+</div><div class='add'>+	/* Set the doorbell to notify the device */</div><div class='add'>+	btintel_pcie_set_rx_db(data, frbd_index);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_start_rx(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BTINTEL_PCIE_RX_MAX_QUEUE; i++) {</div><div class='add'>+		ret = btintel_pcie_submit_rx(data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_reset_ia(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	memset(data-&gt;ia.tr_hia, 0, sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES);</div><div class='add'>+	memset(data-&gt;ia.tr_tia, 0, sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES);</div><div class='add'>+	memset(data-&gt;ia.cr_hia, 0, sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES);</div><div class='add'>+	memset(data-&gt;ia.cr_tia, 0, sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_reset_bt(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,</div><div class='add'>+			      BTINTEL_PCIE_CSR_FUNC_CTRL_SW_RESET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function enables BT function by setting BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_INIT bit in</div><div class='add'>+ * BTINTEL_PCIE_CSR_FUNC_CTRL_REG register and wait for MSI-X with</div><div class='add'>+ * BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0.</div><div class='add'>+ * Then the host reads firmware version from BTINTEL_CSR_F2D_MBX and the boot stage</div><div class='add'>+ * from BTINTEL_PCIE_CSR_BOOT_STAGE_REG.</div><div class='add'>+ */</div><div class='add'>+static int btintel_pcie_enable_bt(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	data-&gt;gp0_received = false;</div><div class='add'>+</div><div class='add'>+	/* Update the DMA address of CI struct to CSR */</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_CI_ADDR_LSB_REG,</div><div class='add'>+			      data-&gt;ci_p_addr &amp; 0xffffffff);</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_CI_ADDR_MSB_REG,</div><div class='add'>+			      (u64)data-&gt;ci_p_addr &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	/* Reset the cached value of boot stage. it is updated by the MSI-X</div><div class='add'>+	 * gp0 interrupt handler.</div><div class='add'>+	 */</div><div class='add'>+	data-&gt;boot_stage_cache = 0x0;</div><div class='add'>+</div><div class='add'>+	/* Set MAC_INIT bit to start primary bootloader */</div><div class='add'>+	btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_set_reg_bits(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,</div><div class='add'>+				  BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_INIT);</div><div class='add'>+</div><div class='add'>+	/* Wait until MAC_ACCESS is granted */</div><div class='add'>+	err = btintel_pcie_poll_bit(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,</div><div class='add'>+				    BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_ACCESS_STS,</div><div class='add'>+				    BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_ACCESS_STS,</div><div class='add'>+				    BTINTEL_DEFAULT_MAC_ACCESS_TIMEOUT_US);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* MAC is ready. Enable BT FUNC */</div><div class='add'>+	btintel_pcie_set_reg_bits(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,</div><div class='add'>+				  BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_ENA |</div><div class='add'>+				  BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_INIT);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG);</div><div class='add'>+</div><div class='add'>+	/* wait for interrupt from the device after booting up to primary</div><div class='add'>+	 * bootloader.</div><div class='add'>+	 */</div><div class='add'>+	err = wait_event_timeout(data-&gt;gp0_wait_q, data-&gt;gp0_received,</div><div class='add'>+				 msecs_to_jiffies(BTINTEL_DEFAULT_INTR_TIMEOUT));</div><div class='add'>+	if (!err)</div><div class='add'>+		return -ETIME;</div><div class='add'>+</div><div class='add'>+	/* Check cached boot stage is BTINTEL_PCIE_CSR_BOOT_STAGE_ROM(BIT(0)) */</div><div class='add'>+	if (~data-&gt;boot_stage_cache &amp; BTINTEL_PCIE_CSR_BOOT_STAGE_ROM)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function handles the MSI-X interrupt for gp0 cause (bit 0 in</div><div class='add'>+ * BTINTEL_PCIE_CSR_MSIX_HW_INT_CAUSES) which is sent for boot stage and image response.</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_msix_gp0_handler(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* This interrupt is for three different causes and it is not easy to</div><div class='add'>+	 * know what causes the interrupt. So, it compares each register value</div><div class='add'>+	 * with cached value and update it before it wake up the queue.</div><div class='add'>+	 */</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_BOOT_STAGE_REG);</div><div class='add'>+	if (reg != data-&gt;boot_stage_cache)</div><div class='add'>+		data-&gt;boot_stage_cache = reg;</div><div class='add'>+</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_IMG_RESPONSE_REG);</div><div class='add'>+	if (reg != data-&gt;img_resp_cache)</div><div class='add'>+		data-&gt;img_resp_cache = reg;</div><div class='add'>+</div><div class='add'>+	data-&gt;gp0_received = true;</div><div class='add'>+</div><div class='add'>+	/* If the boot stage is OP or IML, reset IA and start RX again */</div><div class='add'>+	if (data-&gt;boot_stage_cache &amp; BTINTEL_PCIE_CSR_BOOT_STAGE_OPFW ||</div><div class='add'>+	    data-&gt;boot_stage_cache &amp; BTINTEL_PCIE_CSR_BOOT_STAGE_IML) {</div><div class='add'>+		btintel_pcie_reset_ia(data);</div><div class='add'>+		btintel_pcie_start_rx(data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wake_up(&amp;data-&gt;gp0_wait_q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function handles the MSX-X interrupt for rx queue 0 which is for TX</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_msix_tx_handle(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	u16 cr_tia, cr_hia;</div><div class='add'>+	struct txq *txq;</div><div class='add'>+	struct urbd0 *urbd0;</div><div class='add'>+</div><div class='add'>+	cr_tia = data-&gt;ia.cr_tia[BTINTEL_PCIE_TXQ_NUM];</div><div class='add'>+	cr_hia = data-&gt;ia.cr_hia[BTINTEL_PCIE_TXQ_NUM];</div><div class='add'>+</div><div class='add'>+	if (cr_tia == cr_hia)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	txq = &amp;data-&gt;txq;</div><div class='add'>+</div><div class='add'>+	while (cr_tia != cr_hia) {</div><div class='add'>+		data-&gt;tx_wait_done = true;</div><div class='add'>+		wake_up(&amp;data-&gt;tx_wait_q);</div><div class='add'>+</div><div class='add'>+		urbd0 = &amp;txq-&gt;urbd0s[cr_tia];</div><div class='add'>+</div><div class='add'>+		if (urbd0-&gt;tfd_index &gt; txq-&gt;count)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		cr_tia = (cr_tia + 1) % txq-&gt;count;</div><div class='add'>+		data-&gt;ia.cr_tia[BTINTEL_PCIE_TXQ_NUM] = cr_tia;</div><div class='add'>+		ipc_print_ia_ring(data-&gt;hdev, &amp;data-&gt;ia, BTINTEL_PCIE_TXQ_NUM);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Process the received rx data</div><div class='add'>+ * It check the frame header to identify the data type and create skb</div><div class='add'>+ * and calling HCI API</div><div class='add'>+ */</div><div class='add'>+static int btintel_pcie_recv_frame(struct btintel_pcie_data *data,</div><div class='add'>+				       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 pkt_type;</div><div class='add'>+	u16 plen;</div><div class='add'>+	u32 pcie_pkt_type;</div><div class='add'>+	struct sk_buff *new_skb;</div><div class='add'>+	void *pdata;</div><div class='add'>+	struct hci_dev *hdev = data-&gt;hdev;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;data-&gt;hci_rx_lock);</div><div class='add'>+</div><div class='add'>+	/* The first 4 bytes indicates the Intel PCIe specific packet type */</div><div class='add'>+	pdata = skb_pull_data(skb, BTINTEL_PCIE_HCI_TYPE_LEN);</div><div class='add'>+	if (!data) {</div><div class='add'>+		bt_dev_err(hdev, "Corrupted packet received");</div><div class='add'>+		ret = -EILSEQ;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pcie_pkt_type = get_unaligned_le32(pdata);</div><div class='add'>+</div><div class='add'>+	switch (pcie_pkt_type) {</div><div class='add'>+	case BTINTEL_PCIE_HCI_ACL_PKT:</div><div class='add'>+		if (skb-&gt;len &gt;= HCI_ACL_HDR_SIZE) {</div><div class='add'>+			plen = HCI_ACL_HDR_SIZE + __le16_to_cpu(hci_acl_hdr(skb)-&gt;dlen);</div><div class='add'>+			pkt_type = HCI_ACLDATA_PKT;</div><div class='add'>+		} else {</div><div class='add'>+			bt_dev_err(hdev, "ACL packet is too short");</div><div class='add'>+			ret = -EILSEQ;</div><div class='add'>+			goto exit_error;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BTINTEL_PCIE_HCI_SCO_PKT:</div><div class='add'>+		if (skb-&gt;len &gt;= HCI_SCO_HDR_SIZE) {</div><div class='add'>+			plen = HCI_SCO_HDR_SIZE + hci_sco_hdr(skb)-&gt;dlen;</div><div class='add'>+			pkt_type = HCI_SCODATA_PKT;</div><div class='add'>+		} else {</div><div class='add'>+			bt_dev_err(hdev, "SCO packet is too short");</div><div class='add'>+			ret = -EILSEQ;</div><div class='add'>+			goto exit_error;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BTINTEL_PCIE_HCI_EVT_PKT:</div><div class='add'>+		if (skb-&gt;len &gt;= HCI_EVENT_HDR_SIZE) {</div><div class='add'>+			plen = HCI_EVENT_HDR_SIZE + hci_event_hdr(skb)-&gt;plen;</div><div class='add'>+			pkt_type = HCI_EVENT_PKT;</div><div class='add'>+		} else {</div><div class='add'>+			bt_dev_err(hdev, "Event packet is too short");</div><div class='add'>+			ret = -EILSEQ;</div><div class='add'>+			goto exit_error;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bt_dev_err(hdev, "Invalid packet type received: 0x%4.4x",</div><div class='add'>+			   pcie_pkt_type);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len &lt; plen) {</div><div class='add'>+		bt_dev_err(hdev, "Received corrupted packet. type: 0x%2.2x",</div><div class='add'>+			   pkt_type);</div><div class='add'>+		ret = -EILSEQ;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bt_dev_dbg(hdev, "pkt_type: 0x%2.2x len: %u", pkt_type, plen);</div><div class='add'>+</div><div class='add'>+	new_skb = bt_skb_alloc(plen, GFP_ATOMIC);</div><div class='add'>+	if (!new_skb) {</div><div class='add'>+		bt_dev_err(hdev, "Failed to allocate memory for skb of len: %u",</div><div class='add'>+			   skb-&gt;len);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hci_skb_pkt_type(new_skb) = pkt_type;</div><div class='add'>+	skb_put_data(new_skb, skb-&gt;data, plen);</div><div class='add'>+	hdev-&gt;stat.byte_rx += plen;</div><div class='add'>+</div><div class='add'>+	if (pcie_pkt_type == BTINTEL_PCIE_HCI_EVT_PKT)</div><div class='add'>+		ret = btintel_recv_event(hdev, new_skb);</div><div class='add'>+	else</div><div class='add'>+		ret = hci_recv_frame(hdev, new_skb);</div><div class='add'>+</div><div class='add'>+exit_error:</div><div class='add'>+	if (ret)</div><div class='add'>+		hdev-&gt;stat.err_rx++;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;data-&gt;hci_rx_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_rx_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct btintel_pcie_data *data = container_of(work,</div><div class='add'>+					struct btintel_pcie_data, rx_work);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int err;</div><div class='add'>+	struct hci_dev *hdev = data-&gt;hdev;</div><div class='add'>+</div><div class='add'>+	/* Process the sk_buf in queue and send to the HCI layer */</div><div class='add'>+	while ((skb = skb_dequeue(&amp;data-&gt;rx_skb_q))) {</div><div class='add'>+		err = btintel_pcie_recv_frame(data, skb);</div><div class='add'>+		if (err)</div><div class='add'>+			bt_dev_err(hdev, "Failed to send received frame: %d",</div><div class='add'>+				   err);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* create sk_buff with data and save it to queue and start RX work */</div><div class='add'>+static int btintel_pcie_submit_rx_work(struct btintel_pcie_data *data, u8 status,</div><div class='add'>+				       void *buf)</div><div class='add'>+{</div><div class='add'>+	int ret, len;</div><div class='add'>+	struct rfh_hdr *rfh_hdr;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	rfh_hdr = buf;</div><div class='add'>+</div><div class='add'>+	len = rfh_hdr-&gt;packet_len;</div><div class='add'>+	if (len &lt;= 0) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto resubmit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Remove RFH header */</div><div class='add'>+	buf += sizeof(*rfh_hdr);</div><div class='add'>+</div><div class='add'>+	skb = alloc_skb(len, GFP_ATOMIC);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto resubmit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_put_data(skb, buf, len);</div><div class='add'>+	skb_queue_tail(&amp;data-&gt;rx_skb_q, skb);</div><div class='add'>+	queue_work(data-&gt;workqueue, &amp;data-&gt;rx_work);</div><div class='add'>+</div><div class='add'>+resubmit:</div><div class='add'>+	ret = btintel_pcie_submit_rx(data);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Handles the MSI-X interrupt for rx queue 1 which is for RX */</div><div class='add'>+static void btintel_pcie_msix_rx_handle(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	u16 cr_hia, cr_tia;</div><div class='add'>+	struct rxq *rxq;</div><div class='add'>+	struct urbd1 *urbd1;</div><div class='add'>+	struct data_buf *buf;</div><div class='add'>+	int ret;</div><div class='add'>+	struct hci_dev *hdev = data-&gt;hdev;</div><div class='add'>+</div><div class='add'>+	cr_hia = data-&gt;ia.cr_hia[BTINTEL_PCIE_RXQ_NUM];</div><div class='add'>+	cr_tia = data-&gt;ia.cr_tia[BTINTEL_PCIE_RXQ_NUM];</div><div class='add'>+</div><div class='add'>+	bt_dev_dbg(hdev, "RXQ: cr_hia: %u  cr_tia: %u", cr_hia, cr_tia);</div><div class='add'>+</div><div class='add'>+	/* Check CR_TIA and CR_HIA for change */</div><div class='add'>+	if (cr_tia == cr_hia) {</div><div class='add'>+		bt_dev_warn(hdev, "RXQ: no new CD found");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rxq = &amp;data-&gt;rxq;</div><div class='add'>+</div><div class='add'>+	/* The firmware sends multiple CD in a single MSI-X and it needs to</div><div class='add'>+	 * process all received CDs in this interrupt.</div><div class='add'>+	 */</div><div class='add'>+	while (cr_tia != cr_hia) {</div><div class='add'>+		urbd1 = &amp;rxq-&gt;urbd1s[cr_tia];</div><div class='add'>+		ipc_print_urbd1(data-&gt;hdev, urbd1, cr_tia);</div><div class='add'>+</div><div class='add'>+		buf = &amp;rxq-&gt;bufs[urbd1-&gt;frbd_tag];</div><div class='add'>+		if (!buf) {</div><div class='add'>+			bt_dev_err(hdev, "RXQ: failed to get the DMA buffer for %d",</div><div class='add'>+				   urbd1-&gt;frbd_tag);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = btintel_pcie_submit_rx_work(data, urbd1-&gt;status,</div><div class='add'>+						  buf-&gt;data);</div><div class='add'>+		if (ret) {</div><div class='add'>+			bt_dev_err(hdev, "RXQ: failed to submit rx request");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cr_tia = (cr_tia + 1) % rxq-&gt;count;</div><div class='add'>+		data-&gt;ia.cr_tia[BTINTEL_PCIE_RXQ_NUM] = cr_tia;</div><div class='add'>+		ipc_print_ia_ring(data-&gt;hdev, &amp;data-&gt;ia, BTINTEL_PCIE_RXQ_NUM);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t btintel_pcie_msix_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	return IRQ_WAKE_THREAD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t btintel_pcie_irq_msix_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct msix_entry *entry = dev_id;</div><div class='add'>+	struct btintel_pcie_data *data = btintel_pcie_get_data(entry);</div><div class='add'>+	u32 intr_fh, intr_hw;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;data-&gt;irq_lock);</div><div class='add'>+	intr_fh = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_MSIX_FH_INT_CAUSES);</div><div class='add'>+	intr_hw = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_MSIX_HW_INT_CAUSES);</div><div class='add'>+</div><div class='add'>+	/* Clear causes registers to avoid being handling the same cause */</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_MSIX_FH_INT_CAUSES, intr_fh);</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_MSIX_HW_INT_CAUSES, intr_hw);</div><div class='add'>+	spin_unlock(&amp;data-&gt;irq_lock);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!(intr_fh | intr_hw))) {</div><div class='add'>+		/* Ignore interrupt, inta == 0 */</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This interrupt is triggered by the firmware after updating</div><div class='add'>+	 * boot_stage register and image_response register</div><div class='add'>+	 */</div><div class='add'>+	if (intr_hw &amp; BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0)</div><div class='add'>+		btintel_pcie_msix_gp0_handler(data);</div><div class='add'>+</div><div class='add'>+	/* For TX */</div><div class='add'>+	if (intr_fh &amp; BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0)</div><div class='add'>+		btintel_pcie_msix_tx_handle(data);</div><div class='add'>+</div><div class='add'>+	/* For RX */</div><div class='add'>+	if (intr_fh &amp; BTINTEL_PCIE_MSIX_FH_INT_CAUSES_1)</div><div class='add'>+		btintel_pcie_msix_rx_handle(data);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Before sending the interrupt the HW disables it to prevent a nested</div><div class='add'>+	 * interrupt. This is done by writing 1 to the corresponding bit in</div><div class='add'>+	 * the mask register. After handling the interrupt, it should be</div><div class='add'>+	 * re-enabled by clearing this bit. This register is defined as write 1</div><div class='add'>+	 * clear (W1C) register, meaning that it's cleared by writing 1</div><div class='add'>+	 * to the bit.</div><div class='add'>+	 */</div><div class='add'>+	btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_MSIX_AUTOMASK_ST,</div><div class='add'>+			      BIT(entry-&gt;entry));</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function requests the irq for MSI-X and registers the handlers per irq.</div><div class='add'>+ * Currently, it requests only 1 irq for all interrupt causes.</div><div class='add'>+ */</div><div class='add'>+static int btintel_pcie_setup_irq(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	int num_irqs, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BTINTEL_PCIE_MSIX_VEC_MAX; i++)</div><div class='add'>+		data-&gt;msix_entries[i].entry = i;</div><div class='add'>+</div><div class='add'>+	num_irqs = pci_alloc_irq_vectors(data-&gt;pdev, BTINTEL_PCIE_MSIX_VEC_MIN,</div><div class='add'>+					 BTINTEL_PCIE_MSIX_VEC_MAX, PCI_IRQ_MSIX);</div><div class='add'>+	if (num_irqs &lt; 0)</div><div class='add'>+		return num_irqs;</div><div class='add'>+</div><div class='add'>+	data-&gt;alloc_vecs = num_irqs;</div><div class='add'>+	data-&gt;msix_enabled = 1;</div><div class='add'>+	data-&gt;def_irq = 0;</div><div class='add'>+</div><div class='add'>+	/* setup irq handler */</div><div class='add'>+	for (i = 0; i &lt; data-&gt;alloc_vecs; i++) {</div><div class='add'>+		struct msix_entry *msix_entry;</div><div class='add'>+</div><div class='add'>+		msix_entry = &amp;data-&gt;msix_entries[i];</div><div class='add'>+		msix_entry-&gt;vector = pci_irq_vector(data-&gt;pdev, i);</div><div class='add'>+</div><div class='add'>+		err = devm_request_threaded_irq(&amp;data-&gt;pdev-&gt;dev,</div><div class='add'>+						msix_entry-&gt;vector,</div><div class='add'>+						btintel_pcie_msix_isr,</div><div class='add'>+						btintel_pcie_irq_msix_handler,</div><div class='add'>+						IRQF_SHARED,</div><div class='add'>+						KBUILD_MODNAME,</div><div class='add'>+						msix_entry);</div><div class='add'>+		if (err) {</div><div class='add'>+			pci_free_irq_vectors(data-&gt;pdev);</div><div class='add'>+			data-&gt;alloc_vecs = 0;</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct btintel_pcie_causes_list {</div><div class='add'>+	u32 cause;</div><div class='add'>+	u32 mask_reg;</div><div class='add'>+	u8 cause_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct btintel_pcie_causes_list causes_list[] = {</div><div class='add'>+	{ BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0,	BTINTEL_PCIE_CSR_MSIX_FH_INT_MASK,	0x00 },</div><div class='add'>+	{ BTINTEL_PCIE_MSIX_FH_INT_CAUSES_1,	BTINTEL_PCIE_CSR_MSIX_FH_INT_MASK,	0x01 },</div><div class='add'>+	{ BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0, BTINTEL_PCIE_CSR_MSIX_HW_INT_MASK,	0x20 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This function configures the interrupt masks for both HW_INT_CAUSES and</div><div class='add'>+ * FH_INT_CAUSES which are meaningful to us.</div><div class='add'>+ *</div><div class='add'>+ * After resetting BT function via PCIE FLR or FUNC_CTRL reset, the driver</div><div class='add'>+ * need to call this function again to configure since the masks</div><div class='add'>+ * are reset to 0xFFFFFFFF after reset.</div><div class='add'>+ */</div><div class='add'>+static void btintel_pcie_config_msix(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int val = data-&gt;def_irq | BTINTEL_PCIE_MSIX_NON_AUTO_CLEAR_CAUSE;</div><div class='add'>+</div><div class='add'>+	/* Set Non Auto Clear Cause */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(causes_list); i++) {</div><div class='add'>+		btintel_pcie_wr_reg8(data,</div><div class='add'>+				     BTINTEL_PCIE_CSR_MSIX_IVAR(causes_list[i].cause_num),</div><div class='add'>+				     val);</div><div class='add'>+		btintel_pcie_clr_reg_bits(data,</div><div class='add'>+					  causes_list[i].mask_reg,</div><div class='add'>+					  causes_list[i].cause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Save the initial interrupt mask */</div><div class='add'>+	data-&gt;fh_init_mask = ~btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_MSIX_FH_INT_MASK);</div><div class='add'>+	data-&gt;hw_init_mask = ~btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_MSIX_HW_INT_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_config_pcie(struct pci_dev *pdev,</div><div class='add'>+				    struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pcim_enable_device(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (err) {</div><div class='add'>+		err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	data-&gt;base_addr = pcim_iomap_table(pdev)[0];</div><div class='add'>+	if (!data-&gt;base_addr)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	err = btintel_pcie_setup_irq(data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure MSI-X with causes list */</div><div class='add'>+	btintel_pcie_config_msix(data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_init_ci(struct btintel_pcie_data *data,</div><div class='add'>+				 struct ctx_info *ci)</div><div class='add'>+{</div><div class='add'>+	ci-&gt;version = 0x1;</div><div class='add'>+	ci-&gt;size = sizeof(*ci);</div><div class='add'>+	ci-&gt;config = 0x0000;</div><div class='add'>+	ci-&gt;addr_cr_hia = data-&gt;ia.cr_hia_p_addr;</div><div class='add'>+	ci-&gt;addr_tr_tia = data-&gt;ia.tr_tia_p_addr;</div><div class='add'>+	ci-&gt;addr_cr_tia = data-&gt;ia.cr_tia_p_addr;</div><div class='add'>+	ci-&gt;addr_tr_hia = data-&gt;ia.tr_hia_p_addr;</div><div class='add'>+	ci-&gt;num_cr_ia = BTINTEL_PCIE_NUM_QUEUES;</div><div class='add'>+	ci-&gt;num_tr_ia = BTINTEL_PCIE_NUM_QUEUES;</div><div class='add'>+	ci-&gt;addr_urbdq0 = data-&gt;txq.urbd0s_p_addr;</div><div class='add'>+	ci-&gt;addr_tfdq = data-&gt;txq.tfds_p_addr;</div><div class='add'>+	ci-&gt;num_tfdq = data-&gt;txq.count;</div><div class='add'>+	ci-&gt;num_urbdq0 = data-&gt;txq.count;</div><div class='add'>+	ci-&gt;tfdq_db_vec = BTINTEL_PCIE_TXQ_NUM;</div><div class='add'>+	ci-&gt;urbdq0_db_vec = BTINTEL_PCIE_TXQ_NUM;</div><div class='add'>+	ci-&gt;rbd_size = BTINTEL_PCIE_RBD_SIZE_4K;</div><div class='add'>+	ci-&gt;addr_frbdq = data-&gt;rxq.frbds_p_addr;</div><div class='add'>+	ci-&gt;num_frbdq = data-&gt;rxq.count;</div><div class='add'>+	ci-&gt;frbdq_db_vec = BTINTEL_PCIE_RXQ_NUM;</div><div class='add'>+	ci-&gt;addr_urbdq1 = data-&gt;rxq.urbd1s_p_addr;</div><div class='add'>+	ci-&gt;num_urbdq1 = data-&gt;rxq.count;</div><div class='add'>+	ci-&gt;urbdq_db_vec = BTINTEL_PCIE_RXQ_NUM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_free_txq_bufs(struct btintel_pcie_data *data,</div><div class='add'>+				       struct txq *txq)</div><div class='add'>+{</div><div class='add'>+	/* Free data buffers first */</div><div class='add'>+	dma_free_coherent(&amp;data-&gt;pdev-&gt;dev, txq-&gt;count * BTINTEL_PCIE_BUFFER_SIZE,</div><div class='add'>+			  txq-&gt;buf_v_addr, txq-&gt;buf_p_addr);</div><div class='add'>+	kfree(txq-&gt;bufs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_setup_txq_bufs(struct btintel_pcie_data *data,</div><div class='add'>+				       struct txq *txq)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct data_buf *buf;</div><div class='add'>+</div><div class='add'>+	/* Allocate the same number of buffers as the descriptor */</div><div class='add'>+	txq-&gt;bufs = kmalloc_array(txq-&gt;count, sizeof(*buf), GFP_KERNEL);</div><div class='add'>+	if (!txq-&gt;bufs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Allocate full chunk of data buffer for DMA first and do indexing and</div><div class='add'>+	 * initialization next, so it can be freed easily</div><div class='add'>+	 */</div><div class='add'>+	txq-&gt;buf_v_addr = dma_alloc_coherent(&amp;data-&gt;pdev-&gt;dev,</div><div class='add'>+					     txq-&gt;count * BTINTEL_PCIE_BUFFER_SIZE,</div><div class='add'>+					     &amp;txq-&gt;buf_p_addr,</div><div class='add'>+					     GFP_KERNEL | __GFP_NOWARN);</div><div class='add'>+	if (!txq-&gt;buf_v_addr) {</div><div class='add'>+		kfree(txq-&gt;bufs);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(txq-&gt;buf_v_addr, 0, txq-&gt;count * BTINTEL_PCIE_BUFFER_SIZE);</div><div class='add'>+</div><div class='add'>+	/* Setup the allocated DMA buffer to bufs. Each data_buf should</div><div class='add'>+	 * have virtual address and physical address</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; txq-&gt;count; i++) {</div><div class='add'>+		buf = &amp;txq-&gt;bufs[i];</div><div class='add'>+		buf-&gt;data_p_addr = txq-&gt;buf_p_addr + (i * BTINTEL_PCIE_BUFFER_SIZE);</div><div class='add'>+		buf-&gt;data = txq-&gt;buf_v_addr + (i * BTINTEL_PCIE_BUFFER_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_free_rxq_bufs(struct btintel_pcie_data *data,</div><div class='add'>+				       struct rxq *rxq)</div><div class='add'>+{</div><div class='add'>+	/* Free data buffers first */</div><div class='add'>+	dma_free_coherent(&amp;data-&gt;pdev-&gt;dev, rxq-&gt;count * BTINTEL_PCIE_BUFFER_SIZE,</div><div class='add'>+			  rxq-&gt;buf_v_addr, rxq-&gt;buf_p_addr);</div><div class='add'>+	kfree(rxq-&gt;bufs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_setup_rxq_bufs(struct btintel_pcie_data *data,</div><div class='add'>+				       struct rxq *rxq)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct data_buf *buf;</div><div class='add'>+</div><div class='add'>+	/* Allocate the same number of buffers as the descriptor */</div><div class='add'>+	rxq-&gt;bufs = kmalloc_array(rxq-&gt;count, sizeof(*buf), GFP_KERNEL);</div><div class='add'>+	if (!rxq-&gt;bufs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Allocate full chunk of data buffer for DMA first and do indexing and</div><div class='add'>+	 * initialization next, so it can be freed easily</div><div class='add'>+	 */</div><div class='add'>+	rxq-&gt;buf_v_addr = dma_alloc_coherent(&amp;data-&gt;pdev-&gt;dev,</div><div class='add'>+					     rxq-&gt;count * BTINTEL_PCIE_BUFFER_SIZE,</div><div class='add'>+					     &amp;rxq-&gt;buf_p_addr,</div><div class='add'>+					     GFP_KERNEL | __GFP_NOWARN);</div><div class='add'>+	if (!rxq-&gt;buf_v_addr) {</div><div class='add'>+		kfree(rxq-&gt;bufs);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(rxq-&gt;buf_v_addr, 0, rxq-&gt;count * BTINTEL_PCIE_BUFFER_SIZE);</div><div class='add'>+</div><div class='add'>+	/* Setup the allocated DMA buffer to bufs. Each data_buf should</div><div class='add'>+	 * have virtual address and physical address</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; rxq-&gt;count; i++) {</div><div class='add'>+		buf = &amp;rxq-&gt;bufs[i];</div><div class='add'>+		buf-&gt;data_p_addr = rxq-&gt;buf_p_addr + (i * BTINTEL_PCIE_BUFFER_SIZE);</div><div class='add'>+		buf-&gt;data = rxq-&gt;buf_v_addr + (i * BTINTEL_PCIE_BUFFER_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_setup_ia(struct btintel_pcie_data *data,</div><div class='add'>+				  dma_addr_t p_addr, void *v_addr,</div><div class='add'>+				  struct ia *ia)</div><div class='add'>+{</div><div class='add'>+	/* TR Head Index Array */</div><div class='add'>+	ia-&gt;tr_hia_p_addr = p_addr;</div><div class='add'>+	ia-&gt;tr_hia = v_addr;</div><div class='add'>+</div><div class='add'>+	/* TR Tail Index Array */</div><div class='add'>+	ia-&gt;tr_tia_p_addr = p_addr + sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES;</div><div class='add'>+	ia-&gt;tr_tia = v_addr + sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES;</div><div class='add'>+</div><div class='add'>+	/* CR Head index Array */</div><div class='add'>+	ia-&gt;cr_hia_p_addr = p_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 2);</div><div class='add'>+	ia-&gt;cr_hia = v_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 2);</div><div class='add'>+</div><div class='add'>+	/* CR Tail Index Array */</div><div class='add'>+	ia-&gt;cr_tia_p_addr = p_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 3);</div><div class='add'>+	ia-&gt;cr_tia = v_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_free(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	btintel_pcie_free_rxq_bufs(data, &amp;data-&gt;rxq);</div><div class='add'>+	btintel_pcie_free_txq_bufs(data, &amp;data-&gt;txq);</div><div class='add'>+</div><div class='add'>+	dma_pool_free(data-&gt;dma_pool, data-&gt;dma_v_addr, data-&gt;dma_p_addr);</div><div class='add'>+	dma_pool_destroy(data-&gt;dma_pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Allocate tx and rx queues, any related data structures and buffers.</div><div class='add'>+ */</div><div class='add'>+static int btintel_pcie_alloc(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	size_t total;</div><div class='add'>+	dma_addr_t p_addr;</div><div class='add'>+	void *v_addr;</div><div class='add'>+</div><div class='add'>+	/* Allocate the chunk of DMA memory for descriptors, index array, and</div><div class='add'>+	 * context information, instead of allocating individually.</div><div class='add'>+	 * The DMA memory for data buffer is allocated while setting up the</div><div class='add'>+	 * each queue.</div><div class='add'>+	 *</div><div class='add'>+	 * Total size is sum of the following</div><div class='add'>+	 *  + size of TFD * Number of descriptors in queue</div><div class='add'>+	 *  + size of URBD0 * Number of descriptors in queue</div><div class='add'>+	 *  + size of FRBD * Number of descriptors in queue</div><div class='add'>+	 *  + size of URBD1 * Number of descriptors in queue</div><div class='add'>+	 *  + size of index * Number of queues(2) * type of index array(4)</div><div class='add'>+	 *  + size of context information</div><div class='add'>+	 */</div><div class='add'>+	total = (sizeof(struct tfd) + sizeof(struct urbd0) + sizeof(struct frbd)</div><div class='add'>+		+ sizeof(struct urbd1)) * BTINTEL_DESCS_COUNT;</div><div class='add'>+</div><div class='add'>+	/* Add the sum of size of index array and size of ci struct */</div><div class='add'>+	total += (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4) + sizeof(struct ctx_info);</div><div class='add'>+</div><div class='add'>+	/* Allocate DMA Pool */</div><div class='add'>+	data-&gt;dma_pool = dma_pool_create(KBUILD_MODNAME, &amp;data-&gt;pdev-&gt;dev,</div><div class='add'>+					 total, BTINTEL_PCIE_DMA_POOL_ALIGNMENT, 0);</div><div class='add'>+	if (!data-&gt;dma_pool) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v_addr = dma_pool_zalloc(data-&gt;dma_pool, GFP_KERNEL | __GFP_NOWARN,</div><div class='add'>+				 &amp;p_addr);</div><div class='add'>+	if (!v_addr) {</div><div class='add'>+		dma_pool_destroy(data-&gt;dma_pool);</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data-&gt;dma_p_addr = p_addr;</div><div class='add'>+	data-&gt;dma_v_addr = v_addr;</div><div class='add'>+</div><div class='add'>+	/* Setup descriptor count */</div><div class='add'>+	data-&gt;txq.count = BTINTEL_DESCS_COUNT;</div><div class='add'>+	data-&gt;rxq.count = BTINTEL_DESCS_COUNT;</div><div class='add'>+</div><div class='add'>+	/* Setup tfds */</div><div class='add'>+	data-&gt;txq.tfds_p_addr = p_addr;</div><div class='add'>+	data-&gt;txq.tfds = v_addr;</div><div class='add'>+</div><div class='add'>+	p_addr += (sizeof(struct tfd) * BTINTEL_DESCS_COUNT);</div><div class='add'>+	v_addr += (sizeof(struct tfd) * BTINTEL_DESCS_COUNT);</div><div class='add'>+</div><div class='add'>+	/* Setup urbd0 */</div><div class='add'>+	data-&gt;txq.urbd0s_p_addr = p_addr;</div><div class='add'>+	data-&gt;txq.urbd0s = v_addr;</div><div class='add'>+</div><div class='add'>+	p_addr += (sizeof(struct urbd0) * BTINTEL_DESCS_COUNT);</div><div class='add'>+	v_addr += (sizeof(struct urbd0) * BTINTEL_DESCS_COUNT);</div><div class='add'>+</div><div class='add'>+	/* Setup FRBD*/</div><div class='add'>+	data-&gt;rxq.frbds_p_addr = p_addr;</div><div class='add'>+	data-&gt;rxq.frbds = v_addr;</div><div class='add'>+</div><div class='add'>+	p_addr += (sizeof(struct frbd) * BTINTEL_DESCS_COUNT);</div><div class='add'>+	v_addr += (sizeof(struct frbd) * BTINTEL_DESCS_COUNT);</div><div class='add'>+</div><div class='add'>+	/* Setup urbd1 */</div><div class='add'>+	data-&gt;rxq.urbd1s_p_addr = p_addr;</div><div class='add'>+	data-&gt;rxq.urbd1s = v_addr;</div><div class='add'>+</div><div class='add'>+	p_addr += (sizeof(struct urbd1) * BTINTEL_DESCS_COUNT);</div><div class='add'>+	v_addr += (sizeof(struct urbd1) * BTINTEL_DESCS_COUNT);</div><div class='add'>+</div><div class='add'>+	/* Setup data buffers for txq */</div><div class='add'>+	err = btintel_pcie_setup_txq_bufs(data, &amp;data-&gt;txq);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error_pool;</div><div class='add'>+</div><div class='add'>+	/* Setup data buffers for rxq */</div><div class='add'>+	err = btintel_pcie_setup_rxq_bufs(data, &amp;data-&gt;rxq);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error_txq;</div><div class='add'>+</div><div class='add'>+	/* Setup Index Array */</div><div class='add'>+	btintel_pcie_setup_ia(data, p_addr, v_addr, &amp;data-&gt;ia);</div><div class='add'>+</div><div class='add'>+	/* Setup Context Information */</div><div class='add'>+	p_addr += sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4;</div><div class='add'>+	v_addr += sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4;</div><div class='add'>+</div><div class='add'>+	data-&gt;ci = v_addr;</div><div class='add'>+	data-&gt;ci_p_addr = p_addr;</div><div class='add'>+</div><div class='add'>+	/* Initialize the CI */</div><div class='add'>+	btintel_pcie_init_ci(data, data-&gt;ci);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+exit_error_txq:</div><div class='add'>+	btintel_pcie_free_txq_bufs(data, &amp;data-&gt;txq);</div><div class='add'>+exit_error_pool:</div><div class='add'>+	dma_pool_free(data-&gt;dma_pool, data-&gt;dma_v_addr, data-&gt;dma_p_addr);</div><div class='add'>+	dma_pool_destroy(data-&gt;dma_pool);</div><div class='add'>+exit_error:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_open(struct hci_dev *hdev)</div><div class='add'>+{</div><div class='add'>+	bt_dev_dbg(hdev, "");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_close(struct hci_dev *hdev)</div><div class='add'>+{</div><div class='add'>+	bt_dev_dbg(hdev, "");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_inject_cmd_complete(struct hci_dev *hdev, __u16 opcode)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct hci_event_hdr *hdr;</div><div class='add'>+	struct hci_ev_cmd_complete *evt;</div><div class='add'>+</div><div class='add'>+	skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hdr = (struct hci_event_hdr *)skb_put(skb, sizeof(*hdr));</div><div class='add'>+	hdr-&gt;evt = HCI_EV_CMD_COMPLETE;</div><div class='add'>+	hdr-&gt;plen = sizeof(*evt) + 1;</div><div class='add'>+</div><div class='add'>+	evt = (struct hci_ev_cmd_complete *)skb_put(skb, sizeof(*evt));</div><div class='add'>+	evt-&gt;ncmd = 0x01;</div><div class='add'>+	evt-&gt;opcode = cpu_to_le16(opcode);</div><div class='add'>+</div><div class='add'>+	*(u8 *)skb_put(skb, 1) = 0x00;</div><div class='add'>+</div><div class='add'>+	hci_skb_pkt_type(skb) = HCI_EVENT_PKT;</div><div class='add'>+</div><div class='add'>+	return hci_recv_frame(hdev, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_send_frame(struct hci_dev *hdev,</div><div class='add'>+				       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct btintel_pcie_data *data = hci_get_drvdata(hdev);</div><div class='add'>+	int ret;</div><div class='add'>+	u32 type;</div><div class='add'>+</div><div class='add'>+	/* Due to the fw limitation, the type header of the packet should be</div><div class='add'>+	 * 4 bytes unlike 1 byte for UART. In UART, the firmware can read</div><div class='add'>+	 * the first byte to get the packet type and redirect the rest of data</div><div class='add'>+	 * packet to the right handler.</div><div class='add'>+	 *</div><div class='add'>+	 * But for PCIe, THF(Transfer Flow Handler) fetches the 4 bytes of data</div><div class='add'>+	 * from DMA memory and by the time it reads the first 4 bytes, it has</div><div class='add'>+	 * already consumed some part of packet. Thus the packet type indicator</div><div class='add'>+	 * for iBT PCIe is 4 bytes.</div><div class='add'>+	 *</div><div class='add'>+	 * Luckily, when HCI core creates the skb, it allocates 8 bytes of</div><div class='add'>+	 * head room for profile and driver use, and before sending the data</div><div class='add'>+	 * to the device, append the iBT PCIe packet type in the front.</div><div class='add'>+	 */</div><div class='add'>+	switch (hci_skb_pkt_type(skb)) {</div><div class='add'>+	case HCI_COMMAND_PKT:</div><div class='add'>+		type = BTINTEL_PCIE_HCI_CMD_PKT;</div><div class='add'>+		if (btintel_test_flag(hdev, INTEL_BOOTLOADER)) {</div><div class='add'>+			struct hci_command_hdr *cmd = (void *)skb-&gt;data;</div><div class='add'>+			__u16 opcode = le16_to_cpu(cmd-&gt;opcode);</div><div class='add'>+</div><div class='add'>+			/* When the 0xfc01 command is issued to boot into</div><div class='add'>+			 * the operational firmware, it will actually not</div><div class='add'>+			 * send a command complete event. To keep the flow</div><div class='add'>+			 * control working inject that event here.</div><div class='add'>+			 */</div><div class='add'>+			if (opcode == 0xfc01)</div><div class='add'>+				btintel_pcie_inject_cmd_complete(hdev, opcode);</div><div class='add'>+		}</div><div class='add'>+		hdev-&gt;stat.cmd_tx++;</div><div class='add'>+		break;</div><div class='add'>+	case HCI_ACLDATA_PKT:</div><div class='add'>+		type = BTINTEL_PCIE_HCI_ACL_PKT;</div><div class='add'>+		hdev-&gt;stat.acl_tx++;</div><div class='add'>+		break;</div><div class='add'>+	case HCI_SCODATA_PKT:</div><div class='add'>+		type = BTINTEL_PCIE_HCI_SCO_PKT;</div><div class='add'>+		hdev-&gt;stat.sco_tx++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bt_dev_err(hdev, "Unknown HCI packet type");</div><div class='add'>+		return -EILSEQ;</div><div class='add'>+	}</div><div class='add'>+	memcpy(skb_push(skb, BTINTEL_PCIE_HCI_TYPE_LEN), &amp;type,</div><div class='add'>+	       BTINTEL_PCIE_HCI_TYPE_LEN);</div><div class='add'>+</div><div class='add'>+	ret = btintel_pcie_send_sync(data, skb);</div><div class='add'>+	if (ret) {</div><div class='add'>+		hdev-&gt;stat.err_tx++;</div><div class='add'>+		bt_dev_err(hdev, "Failed to send frame (%d)", ret);</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+	hdev-&gt;stat.byte_tx += skb-&gt;len;</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+exit_error:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_release_hdev(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	struct hci_dev *hdev;</div><div class='add'>+</div><div class='add'>+	hdev = data-&gt;hdev;</div><div class='add'>+	hci_unregister_dev(hdev);</div><div class='add'>+	hci_free_dev(hdev);</div><div class='add'>+	data-&gt;hdev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_setup(struct hci_dev *hdev)</div><div class='add'>+{</div><div class='add'>+	const u8 param[1] = { 0xFF };</div><div class='add'>+	struct intel_version_tlv ver_tlv;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	BT_DBG("%s", hdev-&gt;name);</div><div class='add'>+</div><div class='add'>+	skb = __hci_cmd_sync(hdev, 0xfc05, 1, param, HCI_CMD_TIMEOUT);</div><div class='add'>+	if (IS_ERR(skb)) {</div><div class='add'>+		bt_dev_err(hdev, "Reading Intel version command failed (%ld)",</div><div class='add'>+			   PTR_ERR(skb));</div><div class='add'>+		return PTR_ERR(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check the status */</div><div class='add'>+	if (skb-&gt;data[0]) {</div><div class='add'>+		bt_dev_err(hdev, "Intel Read Version command failed (%02x)",</div><div class='add'>+			   skb-&gt;data[0]);</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Apply the common HCI quirks for Intel device */</div><div class='add'>+	set_bit(HCI_QUIRK_STRICT_DUPLICATE_FILTER, &amp;hdev-&gt;quirks);</div><div class='add'>+	set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &amp;hdev-&gt;quirks);</div><div class='add'>+	set_bit(HCI_QUIRK_NON_PERSISTENT_DIAG, &amp;hdev-&gt;quirks);</div><div class='add'>+</div><div class='add'>+	/* Set up the quality report callback for Intel devices */</div><div class='add'>+	hdev-&gt;set_quality_report = btintel_set_quality_report;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ver_tlv, 0, sizeof(ver_tlv));</div><div class='add'>+	/* For TLV type device, parse the tlv data */</div><div class='add'>+	err = btintel_parse_version_tlv(hdev, &amp;ver_tlv, skb);</div><div class='add'>+	if (err) {</div><div class='add'>+		bt_dev_err(hdev, "Failed to parse TLV version information");</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (INTEL_HW_PLATFORM(ver_tlv.cnvi_bt)) {</div><div class='add'>+	case 0x37:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bt_dev_err(hdev, "Unsupported Intel hardware platform (0x%2x)",</div><div class='add'>+			   INTEL_HW_PLATFORM(ver_tlv.cnvi_bt));</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for supported iBT hardware variants of this firmware</div><div class='add'>+	 * loading method.</div><div class='add'>+	 *</div><div class='add'>+	 * This check has been put in place to ensure correct forward</div><div class='add'>+	 * compatibility options when newer hardware variants come</div><div class='add'>+	 * along.</div><div class='add'>+	 */</div><div class='add'>+	switch (INTEL_HW_VARIANT(ver_tlv.cnvi_bt)) {</div><div class='add'>+	case 0x1e:	/* BzrI */</div><div class='add'>+		/* Display version information of TLV type */</div><div class='add'>+		btintel_version_info_tlv(hdev, &amp;ver_tlv);</div><div class='add'>+</div><div class='add'>+		/* Apply the device specific HCI quirks for TLV based devices</div><div class='add'>+		 *</div><div class='add'>+		 * All TLV based devices support WBS</div><div class='add'>+		 */</div><div class='add'>+		set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &amp;hdev-&gt;quirks);</div><div class='add'>+</div><div class='add'>+		/* Apply LE States quirk from solar onwards */</div><div class='add'>+		set_bit(HCI_QUIRK_VALID_LE_STATES, &amp;hdev-&gt;quirks);</div><div class='add'>+</div><div class='add'>+		/* Setup MSFT Extension support */</div><div class='add'>+		btintel_set_msft_opcode(hdev,</div><div class='add'>+					INTEL_HW_VARIANT(ver_tlv.cnvi_bt));</div><div class='add'>+</div><div class='add'>+		err = btintel_bootloader_setup_tlv(hdev, &amp;ver_tlv);</div><div class='add'>+		if (err)</div><div class='add'>+			goto exit_error;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bt_dev_err(hdev, "Unsupported Intel hw variant (%u)",</div><div class='add'>+			   INTEL_HW_VARIANT(ver_tlv.cnvi_bt));</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit_error:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_setup_hdev(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	struct hci_dev *hdev;</div><div class='add'>+</div><div class='add'>+	hdev = hci_alloc_dev();</div><div class='add'>+	if (!hdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hdev-&gt;bus = HCI_PCI;</div><div class='add'>+	hci_set_drvdata(hdev, data);</div><div class='add'>+</div><div class='add'>+	data-&gt;hdev = hdev;</div><div class='add'>+	SET_HCIDEV_DEV(hdev, &amp;data-&gt;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	hdev-&gt;manufacturer = 2;</div><div class='add'>+	hdev-&gt;open = btintel_pcie_open;</div><div class='add'>+	hdev-&gt;close = btintel_pcie_close;</div><div class='add'>+	hdev-&gt;send = btintel_pcie_send_frame;</div><div class='add'>+	hdev-&gt;setup = btintel_pcie_setup;</div><div class='add'>+	hdev-&gt;shutdown = btintel_shutdown_combined;</div><div class='add'>+	hdev-&gt;hw_error = btintel_hw_error;</div><div class='add'>+	hdev-&gt;set_diag = btintel_set_diag;</div><div class='add'>+	hdev-&gt;set_bdaddr = btintel_set_bdaddr;</div><div class='add'>+</div><div class='add'>+	err = hci_register_dev(hdev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		BT_ERR("Failed to register to hdev (%d)", err);</div><div class='add'>+		goto exit_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+exit_error:</div><div class='add'>+	hci_free_dev(hdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btintel_pcie_probe(struct pci_dev *pdev,</div><div class='add'>+			      const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	struct btintel_pcie_data *data;</div><div class='add'>+</div><div class='add'>+	if (!pdev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	data = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*data), GFP_KERNEL);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	data-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;data-&gt;irq_lock);</div><div class='add'>+	spin_lock_init(&amp;data-&gt;hci_rx_lock);</div><div class='add'>+</div><div class='add'>+	init_waitqueue_head(&amp;data-&gt;gp0_wait_q);</div><div class='add'>+	data-&gt;gp0_received = false;</div><div class='add'>+</div><div class='add'>+	init_waitqueue_head(&amp;data-&gt;tx_wait_q);</div><div class='add'>+	data-&gt;tx_wait_done = false;</div><div class='add'>+</div><div class='add'>+	data-&gt;workqueue = alloc_ordered_workqueue(KBUILD_MODNAME, WQ_HIGHPRI);</div><div class='add'>+	if (!data-&gt;workqueue)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	skb_queue_head_init(&amp;data-&gt;rx_skb_q);</div><div class='add'>+	INIT_WORK(&amp;data-&gt;rx_work, btintel_pcie_rx_work);</div><div class='add'>+</div><div class='add'>+	data-&gt;boot_stage_cache = 0x00;</div><div class='add'>+	data-&gt;img_resp_cache = 0x00;</div><div class='add'>+</div><div class='add'>+	err = btintel_pcie_config_pcie(pdev, data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, data);</div><div class='add'>+</div><div class='add'>+	err = btintel_pcie_alloc(data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error;</div><div class='add'>+</div><div class='add'>+	err = btintel_pcie_enable_bt(data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error;</div><div class='add'>+</div><div class='add'>+	/* CNV information (CNVi and CNVr) is in CSR */</div><div class='add'>+	data-&gt;cnvi = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_HW_REV_REG);</div><div class='add'>+</div><div class='add'>+	data-&gt;cnvr = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_RF_ID_REG);</div><div class='add'>+</div><div class='add'>+	err = btintel_pcie_start_rx(data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error;</div><div class='add'>+</div><div class='add'>+	err = btintel_pcie_setup_hdev(data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_error;</div><div class='add'>+</div><div class='add'>+	bt_dev_dbg(data-&gt;hdev, "cnvi: 0x%8.8x cnvr: 0x%8.8x", data-&gt;cnvi,</div><div class='add'>+		   data-&gt;cnvr);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+exit_error:</div><div class='add'>+	/* reset device before exit */</div><div class='add'>+	btintel_pcie_reset_bt(data);</div><div class='add'>+</div><div class='add'>+	pci_clear_master(pdev);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct btintel_pcie_data *data;</div><div class='add'>+</div><div class='add'>+	data = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_reset_bt(data);</div><div class='add'>+</div><div class='add'>+	pci_free_irq_vectors(pdev);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_release_hdev(data);</div><div class='add'>+</div><div class='add'>+	flush_work(&amp;data-&gt;rx_work);</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(data-&gt;workqueue);</div><div class='add'>+</div><div class='add'>+	btintel_pcie_free(data);</div><div class='add'>+</div><div class='add'>+	pci_clear_master(pdev);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver btintel_pcie_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.id_table = btintel_pcie_table,</div><div class='add'>+	.probe = btintel_pcie_probe,</div><div class='add'>+	.remove = btintel_pcie_remove,</div><div class='add'>+};</div><div class='add'>+module_pci_driver(btintel_pcie_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Tedd Ho-Jeong An &lt;tedd.an@intel.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Intel Bluetooth PCIe transport driver ver " VERSION);</div><div class='add'>+MODULE_VERSION(VERSION);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/bluetooth/btintel_pcie.h b/drivers/bluetooth/btintel_pcie.h<br/>new file mode 100644<br/>index 000000000000..baaff70420f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel_pcie.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btintel_pcie.h</a></div><div class='hunk'>@@ -0,0 +1,430 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ *  Bluetooth support for Intel PCIe devices</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2024  Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Control and Status Register(BTINTEL_PCIE_CSR) */</div><div class='add'>+#define BTINTEL_PCIE_CSR_BASE			(0x000)</div><div class='add'>+#define BTINTEL_PCIE_CSR_FUNC_CTRL_REG		(BTINTEL_PCIE_CSR_BASE + 0x024)</div><div class='add'>+#define BTINTEL_PCIE_CSR_HW_REV_REG		(BTINTEL_PCIE_CSR_BASE + 0x028)</div><div class='add'>+#define BTINTEL_PCIE_CSR_RF_ID_REG		(BTINTEL_PCIE_CSR_BASE + 0x09C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_REG		(BTINTEL_PCIE_CSR_BASE + 0x108)</div><div class='add'>+#define BTINTEL_PCIE_CSR_CI_ADDR_LSB_REG	(BTINTEL_PCIE_CSR_BASE + 0x118)</div><div class='add'>+#define BTINTEL_PCIE_CSR_CI_ADDR_MSB_REG	(BTINTEL_PCIE_CSR_BASE + 0x11C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_IMG_RESPONSE_REG	(BTINTEL_PCIE_CSR_BASE + 0x12C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_HBUS_TARG_WRPTR	(BTINTEL_PCIE_CSR_BASE + 0x460)</div><div class='add'>+</div><div class='add'>+/* BTINTEL_PCIE_CSR Function Control Register */</div><div class='add'>+#define BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_ENA		(BIT(0))</div><div class='add'>+#define BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_INIT		(BIT(6))</div><div class='add'>+#define BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_INIT		(BIT(7))</div><div class='add'>+#define BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_ACCESS_STS	(BIT(20))</div><div class='add'>+#define BTINTEL_PCIE_CSR_FUNC_CTRL_SW_RESET		(BIT(31))</div><div class='add'>+</div><div class='add'>+/* Value for BTINTEL_PCIE_CSR_BOOT_STAGE register */</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_ROM		(BIT(0))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_IML		(BIT(1))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_OPFW		(BIT(2))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_ROM_LOCKDOWN	(BIT(10))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_IML_LOCKDOWN	(BIT(11))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_MAC_ACCESS_ON	(BIT(16))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_ALIVE		(BIT(23))</div><div class='add'>+</div><div class='add'>+/* Registers for MSI-X */</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_BASE		(0x2000)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_FH_INT_CAUSES	(BTINTEL_PCIE_CSR_MSIX_BASE + 0x0800)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_FH_INT_MASK	(BTINTEL_PCIE_CSR_MSIX_BASE + 0x0804)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_HW_INT_CAUSES	(BTINTEL_PCIE_CSR_MSIX_BASE + 0x0808)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_HW_INT_MASK	(BTINTEL_PCIE_CSR_MSIX_BASE + 0x080C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_AUTOMASK_ST	(BTINTEL_PCIE_CSR_MSIX_BASE + 0x0810)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_AUTOMASK_EN	(BTINTEL_PCIE_CSR_MSIX_BASE + 0x0814)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_IVAR_BASE		(BTINTEL_PCIE_CSR_MSIX_BASE + 0x0880)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MSIX_IVAR(cause)	(BTINTEL_PCIE_CSR_MSIX_IVAR_BASE + (cause))</div><div class='add'>+</div><div class='add'>+/* Causes for the FH register interrupts */</div><div class='add'>+enum msix_fh_int_causes {</div><div class='add'>+	BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0	= BIT(0),	/* cause 0 */</div><div class='add'>+	BTINTEL_PCIE_MSIX_FH_INT_CAUSES_1	= BIT(1),	/* cause 1 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Causes for the HW register interrupts */</div><div class='add'>+enum msix_hw_int_causes {</div><div class='add'>+	BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0	= BIT(0),	/* cause 32 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BTINTEL_PCIE_MSIX_NON_AUTO_CLEAR_CAUSE	BIT(7)</div><div class='add'>+</div><div class='add'>+/* Minimum and Maximum number of MSI-X Vector</div><div class='add'>+ * Intel Bluetooth PCIe support only 1 vector</div><div class='add'>+ */</div><div class='add'>+#define BTINTEL_PCIE_MSIX_VEC_MAX	1</div><div class='add'>+#define BTINTEL_PCIE_MSIX_VEC_MIN	1</div><div class='add'>+</div><div class='add'>+/* Default poll time for MAC access during init */</div><div class='add'>+#define BTINTEL_DEFAULT_MAC_ACCESS_TIMEOUT_US	200000</div><div class='add'>+</div><div class='add'>+/* Default interrupt timeout in msec */</div><div class='add'>+#define BTINTEL_DEFAULT_INTR_TIMEOUT	3000</div><div class='add'>+</div><div class='add'>+/* The number of descriptors in TX/RX queues */</div><div class='add'>+#define BTINTEL_DESCS_COUNT	16</div><div class='add'>+</div><div class='add'>+/* Number of Queue for TX and RX</div><div class='add'>+ * It indicates the index of the IA(Index Array)</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	BTINTEL_PCIE_TXQ_NUM = 0,</div><div class='add'>+	BTINTEL_PCIE_RXQ_NUM = 1,</div><div class='add'>+	BTINTEL_PCIE_NUM_QUEUES = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The size of DMA buffer for TX and RX in bytes */</div><div class='add'>+#define BTINTEL_PCIE_BUFFER_SIZE	4096</div><div class='add'>+</div><div class='add'>+/* DMA allocation alignment */</div><div class='add'>+#define BTINTEL_PCIE_DMA_POOL_ALIGNMENT	256</div><div class='add'>+</div><div class='add'>+#define BTINTEL_PCIE_TX_WAIT_TIMEOUT_MS		500</div><div class='add'>+</div><div class='add'>+/* Doorbell vector for TFD */</div><div class='add'>+#define BTINTEL_PCIE_TX_DB_VEC	0</div><div class='add'>+</div><div class='add'>+/* Number of pending RX requests for downlink */</div><div class='add'>+#define BTINTEL_PCIE_RX_MAX_QUEUE	6</div><div class='add'>+</div><div class='add'>+/* Doorbell vector for FRBD */</div><div class='add'>+#define BTINTEL_PCIE_RX_DB_VEC	513</div><div class='add'>+</div><div class='add'>+/* RBD buffer size mapping */</div><div class='add'>+#define BTINTEL_PCIE_RBD_SIZE_4K	0x04</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Struct for Context Information (v2)</div><div class='add'>+ *</div><div class='add'>+ * All members are write-only for host and read-only for device.</div><div class='add'>+ *</div><div class='add'>+ * @version: Version of context information</div><div class='add'>+ * @size: Size of context information</div><div class='add'>+ * @config: Config with which host wants peripheral to execute</div><div class='add'>+ *	Subset of capability register published by device</div><div class='add'>+ * @addr_tr_hia: Address of TR Head Index Array</div><div class='add'>+ * @addr_tr_tia: Address of TR Tail Index Array</div><div class='add'>+ * @addr_cr_hia: Address of CR Head Index Array</div><div class='add'>+ * @addr_cr_tia: Address of CR Tail Index Array</div><div class='add'>+ * @num_tr_ia: Number of entries in TR Index Arrays</div><div class='add'>+ * @num_cr_ia: Number of entries in CR Index Arrays</div><div class='add'>+ * @rbd_siz: RBD Size { 0x4=4K }</div><div class='add'>+ * @addr_tfdq: Address of TFD Queue(tx)</div><div class='add'>+ * @addr_urbdq0: Address of URBD Queue(tx)</div><div class='add'>+ * @num_tfdq: Number of TFD in TFD Queue(tx)</div><div class='add'>+ * @num_urbdq0: Number of URBD in URBD Queue(tx)</div><div class='add'>+ * @tfdq_db_vec: Queue number of TFD</div><div class='add'>+ * @urbdq0_db_vec: Queue number of URBD</div><div class='add'>+ * @addr_frbdq: Address of FRBD Queue(rx)</div><div class='add'>+ * @addr_urbdq1: Address of URBD Queue(rx)</div><div class='add'>+ * @num_frbdq: Number of FRBD in FRBD Queue(rx)</div><div class='add'>+ * @frbdq_db_vec: Queue number of FRBD</div><div class='add'>+ * @num_urbdq1: Number of URBD in URBD Queue(rx)</div><div class='add'>+ * @urbdq_db_vec: Queue number of URBDQ1</div><div class='add'>+ * @tr_msi_vec: Transfer Ring MSI-X Vector</div><div class='add'>+ * @cr_msi_vec: Completion Ring MSI-X Vector</div><div class='add'>+ * @dbgc_addr: DBGC first fragment address</div><div class='add'>+ * @dbgc_size: DBGC buffer size</div><div class='add'>+ * @early_enable: Enarly debug enable</div><div class='add'>+ * @dbg_output_mode: Debug output mode</div><div class='add'>+ *	Bit[4] DBGC O/P { 0=SRAM, 1=DRAM(not relevant for NPK) }</div><div class='add'>+ *	Bit[5] DBGC I/P { 0=BDBG, 1=DBGI }</div><div class='add'>+ *	Bits[6:7] DBGI O/P(relevant if bit[5] = 1)</div><div class='add'>+ *	 0=BT DBGC, 1=WiFi DBGC, 2=NPK }</div><div class='add'>+ * @dbg_preset: Debug preset</div><div class='add'>+ * @ext_addr: Address of context information extension</div><div class='add'>+ * @ext_size: Size of context information part</div><div class='add'>+ *</div><div class='add'>+ * Total 38 DWords</div><div class='add'>+ */</div><div class='add'>+struct ctx_info {</div><div class='add'>+	u16	version;</div><div class='add'>+	u16	size;</div><div class='add'>+	u32	config;</div><div class='add'>+	u32	reserved_dw02;</div><div class='add'>+	u32	reserved_dw03;</div><div class='add'>+	u64	addr_tr_hia;</div><div class='add'>+	u64	addr_tr_tia;</div><div class='add'>+	u64	addr_cr_hia;</div><div class='add'>+	u64	addr_cr_tia;</div><div class='add'>+	u16	num_tr_ia;</div><div class='add'>+	u16	num_cr_ia;</div><div class='add'>+	u32	rbd_size:4,</div><div class='add'>+		reserved_dw13:28;</div><div class='add'>+	u64	addr_tfdq;</div><div class='add'>+	u64	addr_urbdq0;</div><div class='add'>+	u16	num_tfdq;</div><div class='add'>+	u16	num_urbdq0;</div><div class='add'>+	u16	tfdq_db_vec;</div><div class='add'>+	u16	urbdq0_db_vec;</div><div class='add'>+	u64	addr_frbdq;</div><div class='add'>+	u64	addr_urbdq1;</div><div class='add'>+	u16	num_frbdq;</div><div class='add'>+	u16	frbdq_db_vec;</div><div class='add'>+	u16	num_urbdq1;</div><div class='add'>+	u16	urbdq_db_vec;</div><div class='add'>+	u16	tr_msi_vec;</div><div class='add'>+	u16	cr_msi_vec;</div><div class='add'>+	u32	reserved_dw27;</div><div class='add'>+	u64	dbgc_addr;</div><div class='add'>+	u32	dbgc_size;</div><div class='add'>+	u32	early_enable:1,</div><div class='add'>+		reserved_dw31:3,</div><div class='add'>+		dbg_output_mode:4,</div><div class='add'>+		dbg_preset:8,</div><div class='add'>+		reserved2_dw31:16;</div><div class='add'>+	u64	ext_addr;</div><div class='add'>+	u32	ext_size;</div><div class='add'>+	u32	test_param;</div><div class='add'>+	u32	reserved_dw36;</div><div class='add'>+	u32	reserved_dw37;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Transfer Descriptor for TX</div><div class='add'>+ * @type: Not in use. Set to 0x0</div><div class='add'>+ * @size: Size of data in the buffer</div><div class='add'>+ * @addr: DMA Address of buffer</div><div class='add'>+ */</div><div class='add'>+struct tfd {</div><div class='add'>+	u8	type;</div><div class='add'>+	u16	size;</div><div class='add'>+	u8	reserved;</div><div class='add'>+	u64	addr;</div><div class='add'>+	u32	reserved1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* URB Descriptor for TX</div><div class='add'>+ * @tfd_index: Index of TFD in TFDQ + 1</div><div class='add'>+ * @num_txq: Queue index of TFD Queue</div><div class='add'>+ * @cmpl_count: Completion count. Always 0x01</div><div class='add'>+ * @immediate_cmpl: Immediate completion flag: Always 0x01</div><div class='add'>+ */</div><div class='add'>+struct urbd0 {</div><div class='add'>+	u32	tfd_index:16,</div><div class='add'>+		num_txq:8,</div><div class='add'>+		cmpl_count:4,</div><div class='add'>+		reserved:3,</div><div class='add'>+		immediate_cmpl:1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* FRB Descriptor for RX</div><div class='add'>+ * @tag: RX buffer tag (index of RX buffer queue)</div><div class='add'>+ * @addr: Address of buffer</div><div class='add'>+ */</div><div class='add'>+struct frbd {</div><div class='add'>+	u32	tag:16,</div><div class='add'>+		reserved:16;</div><div class='add'>+	u32	reserved2;</div><div class='add'>+	u64	addr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* URB Descriptor for RX</div><div class='add'>+ * @frbd_tag: Tag from FRBD</div><div class='add'>+ * @status: Status</div><div class='add'>+ */</div><div class='add'>+struct urbd1 {</div><div class='add'>+	u32	frbd_tag:16,</div><div class='add'>+		status:1,</div><div class='add'>+		reserved:14,</div><div class='add'>+		fixed:1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* RFH header in RX packet</div><div class='add'>+ * @packet_len: Length of the data in the buffer</div><div class='add'>+ * @rxq: RX Queue number</div><div class='add'>+ * @cmd_id: Command ID. Not in Use</div><div class='add'>+ */</div><div class='add'>+struct rfh_hdr {</div><div class='add'>+	u64	packet_len:16,</div><div class='add'>+		rxq:6,</div><div class='add'>+		reserved:10,</div><div class='add'>+		cmd_id:16,</div><div class='add'>+		reserved1:16;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Internal data buffer</div><div class='add'>+ * @data: pointer to the data buffer</div><div class='add'>+ * @p_addr: physical address of data buffer</div><div class='add'>+ */</div><div class='add'>+struct data_buf {</div><div class='add'>+	u8		*data;</div><div class='add'>+	dma_addr_t	data_p_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Index Array */</div><div class='add'>+struct ia {</div><div class='add'>+	dma_addr_t	tr_hia_p_addr;</div><div class='add'>+	u16		*tr_hia;</div><div class='add'>+	dma_addr_t	tr_tia_p_addr;</div><div class='add'>+	u16		*tr_tia;</div><div class='add'>+	dma_addr_t	cr_hia_p_addr;</div><div class='add'>+	u16		*cr_hia;</div><div class='add'>+	dma_addr_t	cr_tia_p_addr;</div><div class='add'>+	u16		*cr_tia;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Structure for TX Queue</div><div class='add'>+ * @count: Number of descriptors</div><div class='add'>+ * @tfds: Array of TFD</div><div class='add'>+ * @urbd0s: Array of URBD0</div><div class='add'>+ * @buf: Array of data_buf structure</div><div class='add'>+ */</div><div class='add'>+struct txq {</div><div class='add'>+	u16		count;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	tfds_p_addr;</div><div class='add'>+	struct tfd	*tfds;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	urbd0s_p_addr;</div><div class='add'>+	struct urbd0	*urbd0s;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	buf_p_addr;</div><div class='add'>+	void		*buf_v_addr;</div><div class='add'>+	struct data_buf	*bufs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Structure for RX Queue</div><div class='add'>+ * @count: Number of descriptors</div><div class='add'>+ * @frbds: Array of FRBD</div><div class='add'>+ * @urbd1s: Array of URBD1</div><div class='add'>+ * @buf: Array of data_buf structure</div><div class='add'>+ */</div><div class='add'>+struct rxq {</div><div class='add'>+	u16		count;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	frbds_p_addr;</div><div class='add'>+	struct frbd	*frbds;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	urbd1s_p_addr;</div><div class='add'>+	struct urbd1	*urbd1s;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	buf_p_addr;</div><div class='add'>+	void		*buf_v_addr;</div><div class='add'>+	struct data_buf	*bufs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* struct btintel_pcie_data</div><div class='add'>+ * @pdev: pci device</div><div class='add'>+ * @hdev: hdev device</div><div class='add'>+ * @flags: driver state</div><div class='add'>+ * @irq_lock: spinlock for MSI-X</div><div class='add'>+ * @hci_rx_lock: spinlock for HCI RX flow</div><div class='add'>+ * @base_addr: pci base address (from BAR)</div><div class='add'>+ * @msix_entries: array of MSI-X entries</div><div class='add'>+ * @msix_enabled: true if MSI-X is enabled;</div><div class='add'>+ * @alloc_vecs: number of interrupt vectors allocated</div><div class='add'>+ * @def_irq: default irq for all causes</div><div class='add'>+ * @fh_init_mask: initial unmasked rxq causes</div><div class='add'>+ * @hw_init_mask: initial unmaksed hw causes</div><div class='add'>+ * @boot_stage_cache: cached value of boot stage register</div><div class='add'>+ * @img_resp_cache: cached value of image response register</div><div class='add'>+ * @cnvi: CNVi register value</div><div class='add'>+ * @cnvr: CNVr register value</div><div class='add'>+ * @gp0_received: condition for gp0 interrupt</div><div class='add'>+ * @gp0_wait_q: wait_q for gp0 interrupt</div><div class='add'>+ * @tx_wait_done: condition for tx interrupt</div><div class='add'>+ * @tx_wait_q: wait_q for tx interrupt</div><div class='add'>+ * @workqueue: workqueue for RX work</div><div class='add'>+ * @rx_skb_q: SKB queue for RX packet</div><div class='add'>+ * @rx_work: RX work struct to process the RX packet in @rx_skb_q</div><div class='add'>+ * @dma_pool: DMA pool for descriptors, index array and ci</div><div class='add'>+ * @dma_p_addr: DMA address for pool</div><div class='add'>+ * @dma_v_addr: address of pool</div><div class='add'>+ * @ci_p_addr: DMA address for CI struct</div><div class='add'>+ * @ci: CI struct</div><div class='add'>+ * @ia: Index Array struct</div><div class='add'>+ * @txq: TX Queue struct</div><div class='add'>+ * @rxq: RX Queue struct</div><div class='add'>+ */</div><div class='add'>+struct btintel_pcie_data {</div><div class='add'>+	struct pci_dev	*pdev;</div><div class='add'>+	struct hci_dev	*hdev;</div><div class='add'>+</div><div class='add'>+	unsigned long	flags;</div><div class='add'>+	/* lock used in MSI-X interrupt */</div><div class='add'>+	spinlock_t	irq_lock;</div><div class='add'>+	/* lock to serialize rx events */</div><div class='add'>+	spinlock_t	hci_rx_lock;</div><div class='add'>+</div><div class='add'>+	void __iomem	*base_addr;</div><div class='add'>+</div><div class='add'>+	struct msix_entry	msix_entries[BTINTEL_PCIE_MSIX_VEC_MAX];</div><div class='add'>+	bool	msix_enabled;</div><div class='add'>+	u32	alloc_vecs;</div><div class='add'>+	u32	def_irq;</div><div class='add'>+</div><div class='add'>+	u32	fh_init_mask;</div><div class='add'>+	u32	hw_init_mask;</div><div class='add'>+</div><div class='add'>+	u32	boot_stage_cache;</div><div class='add'>+	u32	img_resp_cache;</div><div class='add'>+</div><div class='add'>+	u32	cnvi;</div><div class='add'>+	u32	cnvr;</div><div class='add'>+</div><div class='add'>+	bool	gp0_received;</div><div class='add'>+	wait_queue_head_t	gp0_wait_q;</div><div class='add'>+</div><div class='add'>+	bool	tx_wait_done;</div><div class='add'>+	wait_queue_head_t	tx_wait_q;</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct	*workqueue;</div><div class='add'>+	struct sk_buff_head	rx_skb_q;</div><div class='add'>+	struct work_struct	rx_work;</div><div class='add'>+</div><div class='add'>+	struct dma_pool	*dma_pool;</div><div class='add'>+	dma_addr_t	dma_p_addr;</div><div class='add'>+	void		*dma_v_addr;</div><div class='add'>+</div><div class='add'>+	dma_addr_t	ci_p_addr;</div><div class='add'>+	struct ctx_info	*ci;</div><div class='add'>+	struct ia	ia;</div><div class='add'>+	struct txq	txq;</div><div class='add'>+	struct rxq	rxq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 btintel_pcie_rd_reg32(struct btintel_pcie_data *data,</div><div class='add'>+					u32 offset)</div><div class='add'>+{</div><div class='add'>+	return ioread32(data-&gt;base_addr + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void btintel_pcie_wr_reg8(struct btintel_pcie_data *data,</div><div class='add'>+					u32 offset, u8 val)</div><div class='add'>+{</div><div class='add'>+	iowrite8(val, data-&gt;base_addr + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void btintel_pcie_wr_reg32(struct btintel_pcie_data *data,</div><div class='add'>+					 u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	iowrite32(val, data-&gt;base_addr + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void btintel_pcie_set_reg_bits(struct btintel_pcie_data *data,</div><div class='add'>+					     u32 offset, u32 bits)</div><div class='add'>+{</div><div class='add'>+	u32 r;</div><div class='add'>+</div><div class='add'>+	r = ioread32(data-&gt;base_addr + offset);</div><div class='add'>+	r |= bits;</div><div class='add'>+	iowrite32(r, data-&gt;base_addr + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void btintel_pcie_clr_reg_bits(struct btintel_pcie_data *data,</div><div class='add'>+					     u32 offset, u32 bits)</div><div class='add'>+{</div><div class='add'>+	u32 r;</div><div class='add'>+</div><div class='add'>+	r = ioread32(data-&gt;base_addr + offset);</div><div class='add'>+	r &amp;= ~bits;</div><div class='add'>+	iowrite32(r, data-&gt;base_addr + offset);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/bluetooth/btmrvl_main.c b/drivers/bluetooth/btmrvl_main.c<br/>index 9658b33c824a..18f34998a120 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmrvl_main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btmrvl_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmrvl_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btmrvl_main.c</a></div><div class='hunk'>@@ -121,13 +121,6 @@ int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb)</div><div class='ctx'> 				((event-&gt;data[2] == MODULE_BROUGHT_UP) ||</div><div class='ctx'> 				(event-&gt;data[2] == MODULE_ALREADY_UP)) ?</div><div class='ctx'> 				"Bring-up succeed" : "Bring-up failed");</div><div class='del'>-</div><div class='del'>-			if (event-&gt;length &gt; 3 &amp;&amp; event-&gt;data[3])</div><div class='del'>-				priv-&gt;btmrvl_dev.dev_type = HCI_AMP;</div><div class='del'>-			else</div><div class='del'>-				priv-&gt;btmrvl_dev.dev_type = HCI_PRIMARY;</div><div class='del'>-</div><div class='del'>-			BT_DBG("dev_type: %d", priv-&gt;btmrvl_dev.dev_type);</div><div class='ctx'> 		} else if (priv-&gt;btmrvl_dev.sendcmdflag &amp;&amp;</div><div class='ctx'> 				event-&gt;data[1] == MODULE_SHUTDOWN_REQ) {</div><div class='ctx'> 			BT_DBG("EVENT:%s", (event-&gt;data[2]) ?</div><div class='hunk'>@@ -686,8 +679,6 @@ int btmrvl_register_hdev(struct btmrvl_private *priv)</div><div class='ctx'> 	hdev-&gt;wakeup = btmrvl_wakeup;</div><div class='ctx'> 	SET_HCIDEV_DEV(hdev, &amp;card-&gt;func-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	hdev-&gt;dev_type = priv-&gt;btmrvl_dev.dev_type;</div><div class='del'>-</div><div class='ctx'> 	ret = hci_register_dev(hdev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		BT_ERR("Can not register HCI device");</div><div class='head'>diff --git a/drivers/bluetooth/btmtk.c b/drivers/bluetooth/btmtk.c<br/>index ac8ebccd3507..812fd2a8f853 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmtk.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btmtk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmtk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btmtk.c</a></div><div class='hunk'>@@ -380,8 +380,10 @@ int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> 	switch (data-&gt;cd_info.state) {</div><div class='ctx'> 	case HCI_DEVCOREDUMP_IDLE:</div><div class='ctx'> 		err = hci_devcd_init(hdev, MTK_COREDUMP_SIZE);</div><div class='del'>-		if (err &lt; 0)</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			kfree_skb(skb);</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> 		data-&gt;cd_info.cnt = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* It is supposed coredump can be done within 5 seconds */</div><div class='hunk'>@@ -407,9 +409,6 @@ int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		kfree_skb(skb);</div><div class='del'>-</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(btmtk_process_coredump);</div><div class='head'>diff --git a/drivers/bluetooth/btqca.c b/drivers/bluetooth/btqca.c<br/>index 19cfc342fc7b..dfbbac92242a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqca.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btqca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btqca.c</a></div><div class='hunk'>@@ -13,8 +13,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "btqca.h"</div><div class='ctx'> </div><div class='del'>-#define VERSION "0.1"</div><div class='del'>-</div><div class='ctx'> int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,</div><div class='ctx'> 			 enum qca_btsoc_type soc_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -55,11 +53,6 @@ int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	edl = (struct edl_event_hdr *)(skb-&gt;data);</div><div class='del'>-	if (!edl) {</div><div class='del'>-		bt_dev_err(hdev, "QCA TLV with no header");</div><div class='del'>-		err = -EILSEQ;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (edl-&gt;cresp != EDL_CMD_REQ_RES_EVT ||</div><div class='ctx'> 	    edl-&gt;rtype != rtype) {</div><div class='hunk'>@@ -99,7 +92,8 @@ static int qca_read_fw_build_info(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct edl_event_hdr *edl;</div><div class='del'>-	char cmd, build_label[QCA_FW_BUILD_VER_LEN];</div><div class='add'>+	char *build_label;</div><div class='add'>+	char cmd;</div><div class='ctx'> 	int build_lbl_len, err = 0;</div><div class='ctx'> </div><div class='ctx'> 	bt_dev_dbg(hdev, "QCA read fw build info");</div><div class='hunk'>@@ -114,13 +108,13 @@ static int qca_read_fw_build_info(struct hci_dev *hdev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	edl = (struct edl_event_hdr *)(skb-&gt;data);</div><div class='del'>-	if (!edl) {</div><div class='del'>-		bt_dev_err(hdev, "QCA read fw build info with no header");</div><div class='add'>+	if (skb-&gt;len &lt; sizeof(*edl)) {</div><div class='ctx'> 		err = -EILSEQ;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	edl = (struct edl_event_hdr *)(skb-&gt;data);</div><div class='add'>+</div><div class='ctx'> 	if (edl-&gt;cresp != EDL_CMD_REQ_RES_EVT ||</div><div class='ctx'> 	    edl-&gt;rtype != EDL_GET_BUILD_INFO_CMD) {</div><div class='ctx'> 		bt_dev_err(hdev, "QCA Wrong packet received %d %d", edl-&gt;cresp,</div><div class='hunk'>@@ -129,14 +123,27 @@ static int qca_read_fw_build_info(struct hci_dev *hdev)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (skb-&gt;len &lt; sizeof(*edl) + 1) {</div><div class='add'>+		err = -EILSEQ;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	build_lbl_len = edl-&gt;data[0];</div><div class='del'>-	if (build_lbl_len &lt;= QCA_FW_BUILD_VER_LEN - 1) {</div><div class='del'>-		memcpy(build_label, edl-&gt;data + 1, build_lbl_len);</div><div class='del'>-		*(build_label + build_lbl_len) = '\0';</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len &lt; sizeof(*edl) + 1 + build_lbl_len) {</div><div class='add'>+		err = -EILSEQ;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	build_label = kstrndup(&amp;edl-&gt;data[1], build_lbl_len, GFP_KERNEL);</div><div class='add'>+	if (!build_label) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hci_set_fw_info(hdev, "%s", build_label);</div><div class='ctx'> </div><div class='add'>+	kfree(build_label);</div><div class='ctx'> out:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -166,11 +173,6 @@ static int qca_send_patch_config_cmd(struct hci_dev *hdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	edl = (struct edl_event_hdr *)(skb-&gt;data);</div><div class='del'>-	if (!edl) {</div><div class='del'>-		bt_dev_err(hdev, "QCA Patch config with no header");</div><div class='del'>-		err = -EILSEQ;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (edl-&gt;cresp != EDL_PATCH_CONFIG_RES_EVT || edl-&gt;rtype != EDL_PATCH_CONFIG_CMD) {</div><div class='ctx'> 		bt_dev_err(hdev, "QCA Wrong packet received %d %d", edl-&gt;cresp,</div><div class='hunk'>@@ -235,6 +237,11 @@ static int qca_read_fw_board_id(struct hci_dev *hdev, u16 *bid)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (skb-&gt;len &lt; 3) {</div><div class='add'>+		err = -EILSEQ;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	*bid = (edl-&gt;data[1] &lt;&lt; 8) + edl-&gt;data[2];</div><div class='ctx'> 	bt_dev_dbg(hdev, "%s: bid = %x", __func__, *bid);</div><div class='ctx'> </div><div class='hunk'>@@ -265,9 +272,10 @@ int qca_send_pre_shutdown_cmd(struct hci_dev *hdev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(qca_send_pre_shutdown_cmd);</div><div class='ctx'> </div><div class='del'>-static void qca_tlv_check_data(struct hci_dev *hdev,</div><div class='add'>+static int qca_tlv_check_data(struct hci_dev *hdev,</div><div class='ctx'> 			       struct qca_fw_config *config,</div><div class='del'>-		u8 *fw_data, enum qca_btsoc_type soc_type)</div><div class='add'>+			       u8 *fw_data, size_t fw_size,</div><div class='add'>+			       enum qca_btsoc_type soc_type)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 *data;</div><div class='ctx'> 	u32 type_len;</div><div class='hunk'>@@ -277,12 +285,16 @@ static void qca_tlv_check_data(struct hci_dev *hdev,</div><div class='ctx'> 	struct tlv_type_patch *tlv_patch;</div><div class='ctx'> 	struct tlv_type_nvm *tlv_nvm;</div><div class='ctx'> 	uint8_t nvm_baud_rate = config-&gt;user_baud_rate;</div><div class='add'>+	u8 type;</div><div class='ctx'> </div><div class='ctx'> 	config-&gt;dnld_mode = QCA_SKIP_EVT_NONE;</div><div class='ctx'> 	config-&gt;dnld_type = QCA_SKIP_EVT_NONE;</div><div class='ctx'> </div><div class='ctx'> 	switch (config-&gt;type) {</div><div class='ctx'> 	case ELF_TYPE_PATCH:</div><div class='add'>+		if (fw_size &lt; 7)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 		config-&gt;dnld_mode = QCA_SKIP_EVT_VSE_CC;</div><div class='ctx'> 		config-&gt;dnld_type = QCA_SKIP_EVT_VSE_CC;</div><div class='ctx'> </div><div class='hunk'>@@ -291,6 +303,9 @@ static void qca_tlv_check_data(struct hci_dev *hdev,</div><div class='ctx'> 		bt_dev_dbg(hdev, "File version      : 0x%x", fw_data[6]);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TLV_TYPE_PATCH:</div><div class='add'>+		if (fw_size &lt; sizeof(struct tlv_type_hdr) + sizeof(struct tlv_type_patch))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 		tlv = (struct tlv_type_hdr *)fw_data;</div><div class='ctx'> 		type_len = le32_to_cpu(tlv-&gt;type_len);</div><div class='ctx'> 		tlv_patch = (struct tlv_type_patch *)tlv-&gt;data;</div><div class='hunk'>@@ -330,25 +345,64 @@ static void qca_tlv_check_data(struct hci_dev *hdev,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TLV_TYPE_NVM:</div><div class='add'>+		if (fw_size &lt; sizeof(struct tlv_type_hdr))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 		tlv = (struct tlv_type_hdr *)fw_data;</div><div class='ctx'> </div><div class='ctx'> 		type_len = le32_to_cpu(tlv-&gt;type_len);</div><div class='del'>-		length = (type_len &gt;&gt; 8) &amp; 0x00ffffff;</div><div class='add'>+		length = type_len &gt;&gt; 8;</div><div class='add'>+		type = type_len &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-		BT_DBG("TLV Type\t\t : 0x%x", type_len &amp; 0x000000ff);</div><div class='add'>+		/* Some NVM files have more than one set of tags, only parse</div><div class='add'>+		 * the first set when it has type 2 for now. When there is</div><div class='add'>+		 * more than one set there is an enclosing header of type 4.</div><div class='add'>+		 */</div><div class='add'>+		if (type == 4) {</div><div class='add'>+			if (fw_size &lt; 2 * sizeof(struct tlv_type_hdr))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			tlv++;</div><div class='add'>+</div><div class='add'>+			type_len = le32_to_cpu(tlv-&gt;type_len);</div><div class='add'>+			length = type_len &gt;&gt; 8;</div><div class='add'>+			type = type_len &amp; 0xff;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		BT_DBG("TLV Type\t\t : 0x%x", type);</div><div class='ctx'> 		BT_DBG("Length\t\t : %d bytes", length);</div><div class='ctx'> </div><div class='add'>+		if (type != 2)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (fw_size &lt; length + (tlv-&gt;data - fw_data))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 		idx = 0;</div><div class='ctx'> 		data = tlv-&gt;data;</div><div class='del'>-		while (idx &lt; length) {</div><div class='add'>+		while (idx &lt; length - sizeof(struct tlv_type_nvm)) {</div><div class='ctx'> 			tlv_nvm = (struct tlv_type_nvm *)(data + idx);</div><div class='ctx'> </div><div class='ctx'> 			tag_id = le16_to_cpu(tlv_nvm-&gt;tag_id);</div><div class='ctx'> 			tag_len = le16_to_cpu(tlv_nvm-&gt;tag_len);</div><div class='ctx'> </div><div class='add'>+			if (length &lt; idx + sizeof(struct tlv_type_nvm) + tag_len)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 			/* Update NVM tags as needed */</div><div class='ctx'> 			switch (tag_id) {</div><div class='add'>+			case EDL_TAG_ID_BD_ADDR:</div><div class='add'>+				if (tag_len != sizeof(bdaddr_t))</div><div class='add'>+					return -EINVAL;</div><div class='add'>+</div><div class='add'>+				memcpy(&amp;config-&gt;bdaddr, tlv_nvm-&gt;data, sizeof(bdaddr_t));</div><div class='add'>+</div><div class='add'>+				break;</div><div class='add'>+</div><div class='ctx'> 			case EDL_TAG_ID_HCI:</div><div class='add'>+				if (tag_len &lt; 3)</div><div class='add'>+					return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 				/* HCI transport layer parameters</div><div class='ctx'> 				 * enabling software inband sleep</div><div class='ctx'> 				 * onto controller side.</div><div class='hunk'>@@ -364,6 +418,9 @@ static void qca_tlv_check_data(struct hci_dev *hdev,</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case EDL_TAG_ID_DEEP_SLEEP:</div><div class='add'>+				if (tag_len &lt; 1)</div><div class='add'>+					return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 				/* Sleep enable mask</div><div class='ctx'> 				 * enabling deep sleep feature on controller.</div><div class='ctx'> 				 */</div><div class='hunk'>@@ -372,14 +429,16 @@ static void qca_tlv_check_data(struct hci_dev *hdev,</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			idx += (sizeof(u16) + sizeof(u16) + 8 + tag_len);</div><div class='add'>+			idx += sizeof(struct tlv_type_nvm) + tag_len;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		BT_ERR("Unknown TLV type %d", config-&gt;type);</div><div class='del'>-		break;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qca_tlv_send_segment(struct hci_dev *hdev, int seg_size,</div><div class='hunk'>@@ -428,11 +487,6 @@ static int qca_tlv_send_segment(struct hci_dev *hdev, int seg_size,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	edl = (struct edl_event_hdr *)(skb-&gt;data);</div><div class='del'>-	if (!edl) {</div><div class='del'>-		bt_dev_err(hdev, "TLV with no header");</div><div class='del'>-		err = -EILSEQ;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (edl-&gt;cresp != EDL_CMD_REQ_RES_EVT || edl-&gt;rtype != rtype) {</div><div class='ctx'> 		bt_dev_err(hdev, "QCA TLV with error stat 0x%x rtype 0x%x",</div><div class='hunk'>@@ -529,7 +583,9 @@ static int qca_download_firmware(struct hci_dev *hdev,</div><div class='ctx'> 	memcpy(data, fw-&gt;data, size);</div><div class='ctx'> 	release_firmware(fw);</div><div class='ctx'> </div><div class='del'>-	qca_tlv_check_data(hdev, config, data, soc_type);</div><div class='add'>+	ret = qca_tlv_check_data(hdev, config, data, size, soc_type);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	segment = data;</div><div class='ctx'> 	remain = size;</div><div class='hunk'>@@ -612,6 +668,38 @@ int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(qca_set_bdaddr_rome);</div><div class='ctx'> </div><div class='add'>+static int qca_check_bdaddr(struct hci_dev *hdev, const struct qca_fw_config *config)</div><div class='add'>+{</div><div class='add'>+	struct hci_rp_read_bd_addr *bda;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (bacmp(&amp;hdev-&gt;public_addr, BDADDR_ANY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL,</div><div class='add'>+			     HCI_INIT_TIMEOUT);</div><div class='add'>+	if (IS_ERR(skb)) {</div><div class='add'>+		err = PTR_ERR(skb);</div><div class='add'>+		bt_dev_err(hdev, "Failed to read device address (%d)", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len != sizeof(*bda)) {</div><div class='add'>+		bt_dev_err(hdev, "Device address length mismatch");</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bda = (struct hci_rp_read_bd_addr *)skb-&gt;data;</div><div class='add'>+	if (!bacmp(&amp;bda-&gt;bdaddr, &amp;config-&gt;bdaddr))</div><div class='add'>+		set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &amp;hdev-&gt;quirks);</div><div class='add'>+</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void qca_generate_hsp_nvm_name(char *fwname, size_t max_size,</div><div class='ctx'> 		struct qca_btsoc_version ver, u8 rom_ver, u16 bid)</div><div class='ctx'> {</div><div class='hunk'>@@ -629,11 +717,24 @@ static void qca_generate_hsp_nvm_name(char *fwname, size_t max_size,</div><div class='ctx'> 		snprintf(fwname, max_size, "qca/hpnv%02x%s.%x", rom_ver, variant, bid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void qca_get_nvm_name_generic(struct qca_fw_config *cfg,</div><div class='add'>+					    const char *stem, u8 rom_ver, u16 bid)</div><div class='add'>+{</div><div class='add'>+	if (bid == 0x0)</div><div class='add'>+		snprintf(cfg-&gt;fwname, sizeof(cfg-&gt;fwname), "qca/%snv%02x.bin", stem, rom_ver);</div><div class='add'>+	else if (bid &amp; 0xff00)</div><div class='add'>+		snprintf(cfg-&gt;fwname, sizeof(cfg-&gt;fwname),</div><div class='add'>+			 "qca/%snv%02x.b%x", stem, rom_ver, bid);</div><div class='add'>+	else</div><div class='add'>+		snprintf(cfg-&gt;fwname, sizeof(cfg-&gt;fwname),</div><div class='add'>+			 "qca/%snv%02x.b%02x", stem, rom_ver, bid);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,</div><div class='ctx'> 		   enum qca_btsoc_type soc_type, struct qca_btsoc_version ver,</div><div class='ctx'> 		   const char *firmware_name)</div><div class='ctx'> {</div><div class='del'>-	struct qca_fw_config config;</div><div class='add'>+	struct qca_fw_config config = {};</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u8 rom_ver = 0;</div><div class='ctx'> 	u32 soc_ver;</div><div class='hunk'>@@ -709,7 +810,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,</div><div class='ctx'> 	/* Give the controller some time to get ready to receive the NVM */</div><div class='ctx'> 	msleep(10);</div><div class='ctx'> </div><div class='del'>-	if (soc_type == QCA_QCA2066)</div><div class='add'>+	if (soc_type == QCA_QCA2066 || soc_type == QCA_WCN7850)</div><div class='ctx'> 		qca_read_fw_board_id(hdev, &amp;boardid);</div><div class='ctx'> </div><div class='ctx'> 	/* Download NVM configuration */</div><div class='hunk'>@@ -751,8 +852,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,</div><div class='ctx'> 				 "qca/hpnv%02x.bin", rom_ver);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case QCA_WCN7850:</div><div class='del'>-			snprintf(config.fwname, sizeof(config.fwname),</div><div class='del'>-				 "qca/hmtnv%02x.bin", rom_ver);</div><div class='add'>+			qca_get_nvm_name_generic(&amp;config, "hmt", rom_ver, boardid);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='hunk'>@@ -818,6 +918,10 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = qca_check_bdaddr(hdev, &amp;config);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	bt_dev_info(hdev, "QCA setup on UART is completed");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -849,6 +953,5 @@ EXPORT_SYMBOL_GPL(qca_set_bdaddr);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Ben Young Tae Kim &lt;ytkim@qca.qualcomm.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Bluetooth support for Qualcomm Atheros family ver " VERSION);</div><div class='del'>-MODULE_VERSION(VERSION);</div><div class='add'>+MODULE_DESCRIPTION("Bluetooth support for Qualcomm Atheros family");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/bluetooth/btqca.h b/drivers/bluetooth/btqca.h<br/>index dc31984f71dc..bb5207d7a8c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqca.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btqca.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btqca.h</a></div><div class='hunk'>@@ -5,32 +5,33 @@</div><div class='ctx'>  *  Copyright (c) 2015 The Linux Foundation. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define EDL_PATCH_CMD_OPCODE		(0xFC00)</div><div class='del'>-#define EDL_NVM_ACCESS_OPCODE		(0xFC0B)</div><div class='del'>-#define EDL_WRITE_BD_ADDR_OPCODE	(0xFC14)</div><div class='del'>-#define EDL_PATCH_CMD_LEN		(1)</div><div class='del'>-#define EDL_PATCH_VER_REQ_CMD		(0x19)</div><div class='del'>-#define EDL_PATCH_TLV_REQ_CMD		(0x1E)</div><div class='del'>-#define EDL_GET_BUILD_INFO_CMD		(0x20)</div><div class='del'>-#define EDL_GET_BID_REQ_CMD			(0x23)</div><div class='del'>-#define EDL_NVM_ACCESS_SET_REQ_CMD	(0x01)</div><div class='del'>-#define EDL_PATCH_CONFIG_CMD		(0x28)</div><div class='del'>-#define MAX_SIZE_PER_TLV_SEGMENT	(243)</div><div class='del'>-#define QCA_PRE_SHUTDOWN_CMD		(0xFC08)</div><div class='del'>-#define QCA_DISABLE_LOGGING		(0xFC17)</div><div class='del'>-</div><div class='del'>-#define EDL_CMD_REQ_RES_EVT		(0x00)</div><div class='del'>-#define EDL_PATCH_VER_RES_EVT		(0x19)</div><div class='del'>-#define EDL_APP_VER_RES_EVT		(0x02)</div><div class='del'>-#define EDL_TVL_DNLD_RES_EVT		(0x04)</div><div class='del'>-#define EDL_CMD_EXE_STATUS_EVT		(0x00)</div><div class='del'>-#define EDL_SET_BAUDRATE_RSP_EVT	(0x92)</div><div class='del'>-#define EDL_NVM_ACCESS_CODE_EVT		(0x0B)</div><div class='del'>-#define EDL_PATCH_CONFIG_RES_EVT	(0x00)</div><div class='del'>-#define QCA_DISABLE_LOGGING_SUB_OP	(0x14)</div><div class='del'>-</div><div class='del'>-#define EDL_TAG_ID_HCI			(17)</div><div class='del'>-#define EDL_TAG_ID_DEEP_SLEEP		(27)</div><div class='add'>+#define EDL_PATCH_CMD_OPCODE		0xFC00</div><div class='add'>+#define EDL_NVM_ACCESS_OPCODE		0xFC0B</div><div class='add'>+#define EDL_WRITE_BD_ADDR_OPCODE	0xFC14</div><div class='add'>+#define EDL_PATCH_CMD_LEN		1</div><div class='add'>+#define EDL_PATCH_VER_REQ_CMD		0x19</div><div class='add'>+#define EDL_PATCH_TLV_REQ_CMD		0x1E</div><div class='add'>+#define EDL_GET_BUILD_INFO_CMD		0x20</div><div class='add'>+#define EDL_GET_BID_REQ_CMD		0x23</div><div class='add'>+#define EDL_NVM_ACCESS_SET_REQ_CMD	0x01</div><div class='add'>+#define EDL_PATCH_CONFIG_CMD		0x28</div><div class='add'>+#define MAX_SIZE_PER_TLV_SEGMENT	243</div><div class='add'>+#define QCA_PRE_SHUTDOWN_CMD		0xFC08</div><div class='add'>+#define QCA_DISABLE_LOGGING		0xFC17</div><div class='add'>+</div><div class='add'>+#define EDL_CMD_REQ_RES_EVT		0x00</div><div class='add'>+#define EDL_PATCH_VER_RES_EVT		0x19</div><div class='add'>+#define EDL_APP_VER_RES_EVT		0x02</div><div class='add'>+#define EDL_TVL_DNLD_RES_EVT		0x04</div><div class='add'>+#define EDL_CMD_EXE_STATUS_EVT		0x00</div><div class='add'>+#define EDL_SET_BAUDRATE_RSP_EVT	0x92</div><div class='add'>+#define EDL_NVM_ACCESS_CODE_EVT		0x0B</div><div class='add'>+#define EDL_PATCH_CONFIG_RES_EVT	0x00</div><div class='add'>+#define QCA_DISABLE_LOGGING_SUB_OP	0x14</div><div class='add'>+</div><div class='add'>+#define EDL_TAG_ID_BD_ADDR		2</div><div class='add'>+#define EDL_TAG_ID_HCI			17</div><div class='add'>+#define EDL_TAG_ID_DEEP_SLEEP		27</div><div class='ctx'> </div><div class='ctx'> #define QCA_WCN3990_POWERON_PULSE	0xFC</div><div class='ctx'> #define QCA_WCN3990_POWEROFF_PULSE	0xC0</div><div class='hunk'>@@ -38,7 +39,7 @@</div><div class='ctx'> #define QCA_HCI_CC_OPCODE		0xFC00</div><div class='ctx'> #define QCA_HCI_CC_SUCCESS		0x00</div><div class='ctx'> </div><div class='del'>-#define QCA_WCN3991_SOC_ID		(0x40014320)</div><div class='add'>+#define QCA_WCN3991_SOC_ID		0x40014320</div><div class='ctx'> </div><div class='ctx'> /* QCA chipset version can be decided by patch and SoC</div><div class='ctx'>  * version, combination with upper 2 bytes from SoC</div><div class='hunk'>@@ -47,12 +48,11 @@</div><div class='ctx'> #define get_soc_ver(soc_id, rom_ver)	\</div><div class='ctx'> 	((le32_to_cpu(soc_id) &lt;&lt; 16) | (le16_to_cpu(rom_ver)))</div><div class='ctx'> </div><div class='del'>-#define QCA_FW_BUILD_VER_LEN		255</div><div class='del'>-#define QCA_HSP_GF_SOC_ID			0x1200</div><div class='del'>-#define QCA_HSP_GF_SOC_MASK			0x0000ff00</div><div class='add'>+#define QCA_HSP_GF_SOC_ID		0x1200</div><div class='add'>+#define QCA_HSP_GF_SOC_MASK		0x0000ff00</div><div class='ctx'> </div><div class='ctx'> enum qca_baudrate {</div><div class='del'>-	QCA_BAUDRATE_115200 	= 0,</div><div class='add'>+	QCA_BAUDRATE_115200	= 0,</div><div class='ctx'> 	QCA_BAUDRATE_57600,</div><div class='ctx'> 	QCA_BAUDRATE_38400,</div><div class='ctx'> 	QCA_BAUDRATE_19200,</div><div class='hunk'>@@ -71,7 +71,7 @@ enum qca_baudrate {</div><div class='ctx'> 	QCA_BAUDRATE_1600000,</div><div class='ctx'> 	QCA_BAUDRATE_3200000,</div><div class='ctx'> 	QCA_BAUDRATE_3500000,</div><div class='del'>-	QCA_BAUDRATE_AUTO 	= 0xFE,</div><div class='add'>+	QCA_BAUDRATE_AUTO	= 0xFE,</div><div class='ctx'> 	QCA_BAUDRATE_RESERVED</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -94,6 +94,7 @@ struct qca_fw_config {</div><div class='ctx'> 	uint8_t user_baud_rate;</div><div class='ctx'> 	enum qca_tlv_dnld_mode dnld_mode;</div><div class='ctx'> 	enum qca_tlv_dnld_mode dnld_type;</div><div class='add'>+	bdaddr_t bdaddr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct edl_event_hdr {</div><div class='head'>diff --git a/drivers/bluetooth/btqcomsmd.c b/drivers/bluetooth/btqcomsmd.c<br/>index 11c7e04bf394..88dbb2f3fabf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqcomsmd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btqcomsmd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqcomsmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btqcomsmd.c</a></div><div class='hunk'>@@ -197,7 +197,7 @@ destroy_acl_channel:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int btqcomsmd_remove(struct platform_device *pdev)</div><div class='add'>+static void btqcomsmd_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct btqcomsmd *btq = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -206,8 +206,6 @@ static int btqcomsmd_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	rpmsg_destroy_ept(btq-&gt;cmd_channel);</div><div class='ctx'> 	rpmsg_destroy_ept(btq-&gt;acl_channel);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id btqcomsmd_of_match[] = {</div><div class='hunk'>@@ -218,7 +216,7 @@ MODULE_DEVICE_TABLE(of, btqcomsmd_of_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver btqcomsmd_driver = {</div><div class='ctx'> 	.probe = btqcomsmd_probe,</div><div class='del'>-	.remove = btqcomsmd_remove,</div><div class='add'>+	.remove_new = btqcomsmd_remove,</div><div class='ctx'> 	.driver  = {</div><div class='ctx'> 		.name  = "btqcomsmd",</div><div class='ctx'> 		.of_match_table = btqcomsmd_of_match,</div><div class='head'>diff --git a/drivers/bluetooth/btrsi.c b/drivers/bluetooth/btrsi.c<br/>index 634cf8f5ed2d..0c91d7635ac3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btrsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btrsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btrsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btrsi.c</a></div><div class='hunk'>@@ -134,7 +134,6 @@ static int rsi_hci_attach(void *priv, struct rsi_proto_ops *ops)</div><div class='ctx'> 		hdev-&gt;bus = HCI_USB;</div><div class='ctx'> </div><div class='ctx'> 	hci_set_drvdata(hdev, h_adapter);</div><div class='del'>-	hdev-&gt;dev_type = HCI_PRIMARY;</div><div class='ctx'> 	hdev-&gt;open = rsi_hci_open;</div><div class='ctx'> 	hdev-&gt;close = rsi_hci_close;</div><div class='ctx'> 	hdev-&gt;flush = rsi_hci_flush;</div><div class='head'>diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c<br/>index cc50de69e8dc..4f1e37b4f780 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btrtl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btrtl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btrtl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btrtl.c</a></div><div class='hunk'>@@ -1339,6 +1339,13 @@ int btrtl_setup_realtek(struct hci_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 	btrtl_set_quirks(hdev, btrtl_dev);</div><div class='ctx'> </div><div class='add'>+	hci_set_hw_info(hdev,</div><div class='add'>+			"RTL lmp_subver=%u hci_rev=%u hci_ver=%u hci_bus=%u",</div><div class='add'>+			btrtl_dev-&gt;ic_info-&gt;lmp_subver,</div><div class='add'>+			btrtl_dev-&gt;ic_info-&gt;hci_rev,</div><div class='add'>+			btrtl_dev-&gt;ic_info-&gt;hci_ver,</div><div class='add'>+			btrtl_dev-&gt;ic_info-&gt;hci_bus);</div><div class='add'>+</div><div class='ctx'> 	btrtl_free(btrtl_dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/bluetooth/btsdio.c b/drivers/bluetooth/btsdio.c<br/>index f19d31ee37ea..fdcfe9c50313 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btsdio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btsdio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btsdio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btsdio.c</a></div><div class='hunk'>@@ -32,9 +32,6 @@ static const struct sdio_device_id btsdio_table[] = {</div><div class='ctx'> 	/* Generic Bluetooth Type-B SDIO device */</div><div class='ctx'> 	{ SDIO_DEVICE_CLASS(SDIO_CLASS_BT_B) },</div><div class='ctx'> </div><div class='del'>-	/* Generic Bluetooth AMP controller */</div><div class='del'>-	{ SDIO_DEVICE_CLASS(SDIO_CLASS_BT_AMP) },</div><div class='del'>-</div><div class='ctx'> 	{ }	/* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -319,11 +316,6 @@ static int btsdio_probe(struct sdio_func *func,</div><div class='ctx'> 	hdev-&gt;bus = HCI_SDIO;</div><div class='ctx'> 	hci_set_drvdata(hdev, data);</div><div class='ctx'> </div><div class='del'>-	if (id-&gt;class == SDIO_CLASS_BT_AMP)</div><div class='del'>-		hdev-&gt;dev_type = HCI_AMP;</div><div class='del'>-	else</div><div class='del'>-		hdev-&gt;dev_type = HCI_PRIMARY;</div><div class='del'>-</div><div class='ctx'> 	data-&gt;hdev = hdev;</div><div class='ctx'> </div><div class='ctx'> 	SET_HCIDEV_DEV(hdev, &amp;func-&gt;dev);</div><div class='head'>diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c<br/>index 06e915b57283..e384ef6ff050 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btusb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/btusb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btusb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/btusb.c</a></div><div class='hunk'>@@ -477,6 +477,7 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x8087, 0x0033), .driver_info = BTUSB_INTEL_COMBINED },</div><div class='ctx'> 	{ USB_DEVICE(0x8087, 0x0035), .driver_info = BTUSB_INTEL_COMBINED },</div><div class='ctx'> 	{ USB_DEVICE(0x8087, 0x0036), .driver_info = BTUSB_INTEL_COMBINED },</div><div class='add'>+	{ USB_DEVICE(0x8087, 0x0037), .driver_info = BTUSB_INTEL_COMBINED },</div><div class='ctx'> 	{ USB_DEVICE(0x8087, 0x0038), .driver_info = BTUSB_INTEL_COMBINED },</div><div class='ctx'> 	{ USB_DEVICE(0x8087, 0x07da), .driver_info = BTUSB_CSR },</div><div class='ctx'> 	{ USB_DEVICE(0x8087, 0x07dc), .driver_info = BTUSB_INTEL_COMBINED |</div><div class='hunk'>@@ -542,6 +543,8 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	/* Realtek 8852BE Bluetooth devices */</div><div class='ctx'> 	{ USB_DEVICE(0x0cb8, 0xc559), .driver_info = BTUSB_REALTEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='add'>+	{ USB_DEVICE(0x0bda, 0x4853), .driver_info = BTUSB_REALTEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x0bda, 0x887b), .driver_info = BTUSB_REALTEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x0bda, 0xb85b), .driver_info = BTUSB_REALTEK |</div><div class='hunk'>@@ -586,6 +589,9 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe0c8), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xe0cd), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe0e0), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='hunk'>@@ -595,6 +601,9 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x04ca, 0x3802), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x0e8d, 0x0608), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3563), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='hunk'>@@ -610,10 +619,12 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3583), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='del'>-	{ USB_DEVICE(0x0489, 0xe0cd), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3606), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='del'>-	{ USB_DEVICE(0x0e8d, 0x0608), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+</div><div class='add'>+	/* MediaTek MT7922 Bluetooth devices */</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3585), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> </div><div class='hunk'>@@ -624,12 +635,6 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe0d9), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='del'>-	{ USB_DEVICE(0x0489, 0xe0f5), .driver_info = BTUSB_MEDIATEK |</div><div class='del'>-						     BTUSB_WIDEBAND_SPEECH |</div><div class='del'>-						     BTUSB_VALID_LE_STATES },</div><div class='del'>-	{ USB_DEVICE(0x13d3, 0x3568), .driver_info = BTUSB_MEDIATEK |</div><div class='del'>-						     BTUSB_WIDEBAND_SPEECH |</div><div class='del'>-						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe0e2), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='hunk'>@@ -654,14 +659,38 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x04ca, 0x3804), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x04ca, 0x38e4), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3568), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3605), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3607), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3614), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3615), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> 	{ USB_DEVICE(0x35f5, 0x7922), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> </div><div class='ctx'> 	/* Additional MediaTek MT7925 Bluetooth devices */</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xe113), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3602), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH |</div><div class='ctx'> 						     BTUSB_VALID_LE_STATES },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3603), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH |</div><div class='add'>+						     BTUSB_VALID_LE_STATES },</div><div class='ctx'> </div><div class='ctx'> 	/* Additional Realtek 8723AE Bluetooth devices */</div><div class='ctx'> 	{ USB_DEVICE(0x0930, 0x021d), .driver_info = BTUSB_REALTEK },</div><div class='hunk'>@@ -2949,7 +2978,7 @@ static int btusb_mtk_uhw_reg_read(struct btusb_data *data, u32 reg, u32 *val)</div><div class='ctx'> 	err = usb_control_msg(data-&gt;udev, pipe, 0x01,</div><div class='ctx'> 			      0xDE,</div><div class='ctx'> 			      reg &gt;&gt; 16, reg &amp; 0xffff,</div><div class='del'>-			      buf, 4, USB_CTRL_SET_TIMEOUT);</div><div class='add'>+			      buf, 4, USB_CTRL_GET_TIMEOUT);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		bt_dev_err(hdev, "Failed to read uhw reg(%d)", err);</div><div class='ctx'> 		goto err_free_buf;</div><div class='hunk'>@@ -2977,7 +3006,7 @@ static int btusb_mtk_reg_read(struct btusb_data *data, u32 reg, u32 *val)</div><div class='ctx'> 	err = usb_control_msg(data-&gt;udev, pipe, 0x63,</div><div class='ctx'> 			      USB_TYPE_VENDOR | USB_DIR_IN,</div><div class='ctx'> 			      reg &gt;&gt; 16, reg &amp; 0xffff,</div><div class='del'>-			      buf, size, USB_CTRL_SET_TIMEOUT);</div><div class='add'>+			      buf, size, USB_CTRL_GET_TIMEOUT);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err_free_buf;</div><div class='ctx'> </div><div class='hunk'>@@ -3116,6 +3145,7 @@ static int btusb_mtk_setup(struct hci_dev *hdev)</div><div class='ctx'> 			bt_dev_err(hdev, "Failed to get fw flavor (%d)", err);</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='add'>+		fw_flavor = (fw_flavor &amp; 0x00000080) &gt;&gt; 7;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mediatek = hci_get_priv(hdev);</div><div class='hunk'>@@ -3480,13 +3510,12 @@ static void btusb_dump_hdr_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> static void btusb_coredump_qca(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='add'>+	int err;</div><div class='ctx'> 	static const u8 param[] = { 0x26 };</div><div class='del'>-	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	skb = __hci_cmd_sync(hdev, 0xfc0c, 1, param, HCI_CMD_TIMEOUT);</div><div class='del'>-	if (IS_ERR(skb))</div><div class='del'>-		bt_dev_err(hdev, "%s: triggle crash failed (%ld)", __func__, PTR_ERR(skb));</div><div class='del'>-	kfree_skb(skb);</div><div class='add'>+	err = __hci_cmd_send(hdev, 0xfc0c, 1, param);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		bt_dev_err(hdev, "%s: triggle crash failed (%d)", __func__, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3692,7 +3721,7 @@ static int btusb_qca_send_vendor_req(struct usb_device *udev, u8 request,</div><div class='ctx'> 	 */</div><div class='ctx'> 	pipe = usb_rcvctrlpipe(udev, 0);</div><div class='ctx'> 	err = usb_control_msg(udev, pipe, request, USB_TYPE_VENDOR | USB_DIR_IN,</div><div class='del'>-			      0, 0, buf, size, USB_CTRL_SET_TIMEOUT);</div><div class='add'>+			      0, 0, buf, size, USB_CTRL_GET_TIMEOUT);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;udev-&gt;dev, "Failed to access otp area (%d)", err);</div><div class='ctx'> 		goto done;</div><div class='hunk'>@@ -4330,11 +4359,6 @@ static int btusb_probe(struct usb_interface *intf,</div><div class='ctx'> 	hdev-&gt;bus = HCI_USB;</div><div class='ctx'> 	hci_set_drvdata(hdev, data);</div><div class='ctx'> </div><div class='del'>-	if (id-&gt;driver_info &amp; BTUSB_AMP)</div><div class='del'>-		hdev-&gt;dev_type = HCI_AMP;</div><div class='del'>-	else</div><div class='del'>-		hdev-&gt;dev_type = HCI_PRIMARY;</div><div class='del'>-</div><div class='ctx'> 	data-&gt;hdev = hdev;</div><div class='ctx'> </div><div class='ctx'> 	SET_HCIDEV_DEV(hdev, &amp;intf-&gt;dev);</div><div class='head'>diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c<br/>index 874d23089b39..89d4c2224546 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_bcm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_bcm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_bcm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_bcm.c</a></div><div class='hunk'>@@ -1293,7 +1293,7 @@ static int bcm_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_remove(struct platform_device *pdev)</div><div class='add'>+static void bcm_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcm_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1302,8 +1302,6 @@ static int bcm_remove(struct platform_device *pdev)</div><div class='ctx'> 	mutex_unlock(&amp;bcm_device_lock);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s device unregistered.\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct hci_uart_proto bcm_proto = {</div><div class='hunk'>@@ -1487,7 +1485,7 @@ static const struct acpi_device_id bcm_acpi_match[] = {</div><div class='ctx'> 	{ "BCM2EA1" },</div><div class='ctx'> 	{ "BCM2EA2", (long)&amp;bcm43430_device_data },</div><div class='ctx'> 	{ "BCM2EA3", (long)&amp;bcm43430_device_data },</div><div class='del'>-	{ "BCM2EA4" },</div><div class='add'>+	{ "BCM2EA4", (long)&amp;bcm43430_device_data }, /* bcm43455 */</div><div class='ctx'> 	{ "BCM2EA5" },</div><div class='ctx'> 	{ "BCM2EA6" },</div><div class='ctx'> 	{ "BCM2EA7" },</div><div class='hunk'>@@ -1509,7 +1507,7 @@ static const struct dev_pm_ops bcm_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver bcm_driver = {</div><div class='ctx'> 	.probe = bcm_probe,</div><div class='del'>-	.remove = bcm_remove,</div><div class='add'>+	.remove_new = bcm_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "hci_bcm",</div><div class='ctx'> 		.acpi_match_table = ACPI_PTR(bcm_acpi_match),</div><div class='head'>diff --git a/drivers/bluetooth/hci_bcm4377.c b/drivers/bluetooth/hci_bcm4377.c<br/>index 9a7243d5db71..0c2f15235b4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_bcm4377.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_bcm4377.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_bcm4377.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_bcm4377.c</a></div><div class='hunk'>@@ -2361,7 +2361,6 @@ static int bcm4377_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	bcm4377-&gt;hdev = hdev;</div><div class='ctx'> </div><div class='ctx'> 	hdev-&gt;bus = HCI_PCI;</div><div class='del'>-	hdev-&gt;dev_type = HCI_PRIMARY;</div><div class='ctx'> 	hdev-&gt;open = bcm4377_hci_open;</div><div class='ctx'> 	hdev-&gt;close = bcm4377_hci_close;</div><div class='ctx'> 	hdev-&gt;send = bcm4377_hci_send_frame;</div><div class='head'>diff --git a/drivers/bluetooth/hci_intel.c b/drivers/bluetooth/hci_intel.c<br/>index 78afb9a348e7..999ccd5bb4f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_intel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_intel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_intel.c</a></div><div class='hunk'>@@ -537,7 +537,7 @@ static int intel_setup(struct hci_uart *hu)</div><div class='ctx'> 	int speed_change = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	bt_dev_dbg(hdev, "start intel_setup");</div><div class='add'>+	bt_dev_dbg(hdev, "");</div><div class='ctx'> </div><div class='ctx'> 	hu-&gt;hdev-&gt;set_diag = btintel_set_diag;</div><div class='ctx'> 	hu-&gt;hdev-&gt;set_bdaddr = btintel_set_bdaddr;</div><div class='hunk'>@@ -591,12 +591,12 @@ static int intel_setup(struct hci_uart *hu)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-        /* Check for supported iBT hardware variants of this firmware</div><div class='del'>-         * loading method.</div><div class='del'>-         *</div><div class='del'>-         * This check has been put in place to ensure correct forward</div><div class='del'>-         * compatibility options when newer hardware variants come along.</div><div class='del'>-         */</div><div class='add'>+	/* Check for supported iBT hardware variants of this firmware</div><div class='add'>+	 * loading method.</div><div class='add'>+	 *</div><div class='add'>+	 * This check has been put in place to ensure correct forward</div><div class='add'>+	 * compatibility options when newer hardware variants come along.</div><div class='add'>+	 */</div><div class='ctx'> 	switch (ver.hw_variant) {</div><div class='ctx'> 	case 0x0b:	/* LnP */</div><div class='ctx'> 	case 0x0c:	/* WsP */</div><div class='hunk'>@@ -777,7 +777,7 @@ static int intel_setup(struct hci_uart *hu)</div><div class='ctx'> </div><div class='ctx'> 	rettime = ktime_get();</div><div class='ctx'> 	delta = ktime_sub(rettime, calltime);</div><div class='del'>-	duration = (unsigned long long) ktime_to_ns(delta) &gt;&gt; 10;</div><div class='add'>+	duration = (unsigned long long)ktime_to_ns(delta) &gt;&gt; 10;</div><div class='ctx'> </div><div class='ctx'> 	bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);</div><div class='ctx'> </div><div class='hunk'>@@ -822,7 +822,7 @@ done:</div><div class='ctx'> </div><div class='ctx'> 	rettime = ktime_get();</div><div class='ctx'> 	delta = ktime_sub(rettime, calltime);</div><div class='del'>-	duration = (unsigned long long) ktime_to_ns(delta) &gt;&gt; 10;</div><div class='add'>+	duration = (unsigned long long)ktime_to_ns(delta) &gt;&gt; 10;</div><div class='ctx'> </div><div class='ctx'> 	bt_dev_info(hdev, "Device booted in %llu usecs", duration);</div><div class='ctx'> </div><div class='hunk'>@@ -977,6 +977,7 @@ static int intel_recv(struct hci_uart *hu, const void *data, int count)</div><div class='ctx'> 				    ARRAY_SIZE(intel_recv_pkts));</div><div class='ctx'> 	if (IS_ERR(intel-&gt;rx_skb)) {</div><div class='ctx'> 		int err = PTR_ERR(intel-&gt;rx_skb);</div><div class='add'>+</div><div class='ctx'> 		bt_dev_err(hu-&gt;hdev, "Frame reassembly failed (%d)", err);</div><div class='ctx'> 		intel-&gt;rx_skb = NULL;</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -1190,7 +1191,7 @@ no_irq:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int intel_remove(struct platform_device *pdev)</div><div class='add'>+static void intel_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_device *idev = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1201,13 +1202,11 @@ static int intel_remove(struct platform_device *pdev)</div><div class='ctx'> 	mutex_unlock(&amp;intel_device_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "unregistered.\n");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver intel_driver = {</div><div class='ctx'> 	.probe = intel_probe,</div><div class='del'>-	.remove = intel_remove,</div><div class='add'>+	.remove_new = intel_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "hci_intel",</div><div class='ctx'> 		.acpi_match_table = ACPI_PTR(intel_acpi_match),</div><div class='head'>diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c<br/>index a26367e9fb19..17a2f158a0df 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_ldisc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_ldisc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_ldisc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_ldisc.c</a></div><div class='hunk'>@@ -667,11 +667,6 @@ static int hci_uart_register_dev(struct hci_uart *hu)</div><div class='ctx'> 	if (!test_bit(HCI_UART_RESET_ON_INIT, &amp;hu-&gt;hdev_flags))</div><div class='ctx'> 		set_bit(HCI_QUIRK_RESET_ON_CLOSE, &amp;hdev-&gt;quirks);</div><div class='ctx'> </div><div class='del'>-	if (test_bit(HCI_UART_CREATE_AMP, &amp;hu-&gt;hdev_flags))</div><div class='del'>-		hdev-&gt;dev_type = HCI_AMP;</div><div class='del'>-	else</div><div class='del'>-		hdev-&gt;dev_type = HCI_PRIMARY;</div><div class='del'>-</div><div class='ctx'> 	/* Only call open() for the protocol after hdev is fully initialized as</div><div class='ctx'> 	 * open() (or a timer/workqueue it starts) may attempt to reference it.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -722,7 +717,6 @@ static int hci_uart_set_flags(struct hci_uart *hu, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long valid_flags = BIT(HCI_UART_RAW_DEVICE) |</div><div class='ctx'> 				    BIT(HCI_UART_RESET_ON_INIT) |</div><div class='del'>-				    BIT(HCI_UART_CREATE_AMP) |</div><div class='ctx'> 				    BIT(HCI_UART_INIT_PENDING) |</div><div class='ctx'> 				    BIT(HCI_UART_EXT_CONFIG) |</div><div class='ctx'> 				    BIT(HCI_UART_VND_DETECT);</div><div class='head'>diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c<br/>index ecbc52eaf101..0c9c9ee56592 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_qca.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_qca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_qca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_qca.c</a></div><div class='hunk'>@@ -1672,6 +1672,9 @@ static bool qca_wakeup(struct hci_dev *hdev)</div><div class='ctx'> 	struct hci_uart *hu = hci_get_drvdata(hdev);</div><div class='ctx'> 	bool wakeup;</div><div class='ctx'> </div><div class='add'>+	if (!hu-&gt;serdev)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	/* BT SoC attached through the serial bus is handled by the serdev driver.</div><div class='ctx'> 	 * So we need to use the device handle of the serdev driver to get the</div><div class='ctx'> 	 * status of device may wakeup.</div><div class='hunk'>@@ -1905,8 +1908,6 @@ retry:</div><div class='ctx'> 	case QCA_WCN6750:</div><div class='ctx'> 	case QCA_WCN6855:</div><div class='ctx'> 	case QCA_WCN7850:</div><div class='del'>-		set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &amp;hdev-&gt;quirks);</div><div class='del'>-</div><div class='ctx'> 		qcadev = serdev_device_get_drvdata(hu-&gt;serdev);</div><div class='ctx'> 		if (qcadev-&gt;bdaddr_property_broken)</div><div class='ctx'> 			set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &amp;hdev-&gt;quirks);</div><div class='hunk'>@@ -1957,8 +1958,10 @@ retry:</div><div class='ctx'> 		qca_debugfs_init(hdev);</div><div class='ctx'> 		hu-&gt;hdev-&gt;hw_error = qca_hw_error;</div><div class='ctx'> 		hu-&gt;hdev-&gt;cmd_timeout = qca_cmd_timeout;</div><div class='del'>-		if (device_can_wakeup(hu-&gt;serdev-&gt;ctrl-&gt;dev.parent))</div><div class='del'>-			hu-&gt;hdev-&gt;wakeup = qca_wakeup;</div><div class='add'>+		if (hu-&gt;serdev) {</div><div class='add'>+			if (device_can_wakeup(hu-&gt;serdev-&gt;ctrl-&gt;dev.parent))</div><div class='add'>+				hu-&gt;hdev-&gt;wakeup = qca_wakeup;</div><div class='add'>+		}</div><div class='ctx'> 	} else if (ret == -ENOENT) {</div><div class='ctx'> 		/* No patch/nvm-config found, run with original fw/config */</div><div class='ctx'> 		set_bit(QCA_ROM_FW, &amp;qca-&gt;flags);</div><div class='hunk'>@@ -2329,16 +2332,21 @@ static int qca_serdev_probe(struct serdev_device *serdev)</div><div class='ctx'> 		    (data-&gt;soc_type == QCA_WCN6750 ||</div><div class='ctx'> 		     data-&gt;soc_type == QCA_WCN6855)) {</div><div class='ctx'> 			dev_err(&amp;serdev-&gt;dev, "failed to acquire BT_EN gpio\n");</div><div class='del'>-			power_ctrl_enabled = false;</div><div class='add'>+			return PTR_ERR(qcadev-&gt;bt_en);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (!qcadev-&gt;bt_en)</div><div class='add'>+			power_ctrl_enabled = false;</div><div class='add'>+</div><div class='ctx'> 		qcadev-&gt;sw_ctrl = devm_gpiod_get_optional(&amp;serdev-&gt;dev, "swctrl",</div><div class='ctx'> 					       GPIOD_IN);</div><div class='ctx'> 		if (IS_ERR(qcadev-&gt;sw_ctrl) &amp;&amp;</div><div class='ctx'> 		    (data-&gt;soc_type == QCA_WCN6750 ||</div><div class='ctx'> 		     data-&gt;soc_type == QCA_WCN6855 ||</div><div class='del'>-		     data-&gt;soc_type == QCA_WCN7850))</div><div class='del'>-			dev_warn(&amp;serdev-&gt;dev, "failed to acquire SW_CTRL gpio\n");</div><div class='add'>+		     data-&gt;soc_type == QCA_WCN7850)) {</div><div class='add'>+			dev_err(&amp;serdev-&gt;dev, "failed to acquire SW_CTRL gpio\n");</div><div class='add'>+			return PTR_ERR(qcadev-&gt;sw_ctrl);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		qcadev-&gt;susclk = devm_clk_get_optional(&amp;serdev-&gt;dev, NULL);</div><div class='ctx'> 		if (IS_ERR(qcadev-&gt;susclk)) {</div><div class='hunk'>@@ -2357,10 +2365,13 @@ static int qca_serdev_probe(struct serdev_device *serdev)</div><div class='ctx'> 		qcadev-&gt;bt_en = devm_gpiod_get_optional(&amp;serdev-&gt;dev, "enable",</div><div class='ctx'> 					       GPIOD_OUT_LOW);</div><div class='ctx'> 		if (IS_ERR(qcadev-&gt;bt_en)) {</div><div class='del'>-			dev_warn(&amp;serdev-&gt;dev, "failed to acquire enable gpio\n");</div><div class='del'>-			power_ctrl_enabled = false;</div><div class='add'>+			dev_err(&amp;serdev-&gt;dev, "failed to acquire enable gpio\n");</div><div class='add'>+			return PTR_ERR(qcadev-&gt;bt_en);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (!qcadev-&gt;bt_en)</div><div class='add'>+			power_ctrl_enabled = false;</div><div class='add'>+</div><div class='ctx'> 		qcadev-&gt;susclk = devm_clk_get_optional(&amp;serdev-&gt;dev, NULL);</div><div class='ctx'> 		if (IS_ERR(qcadev-&gt;susclk)) {</div><div class='ctx'> 			dev_warn(&amp;serdev-&gt;dev, "failed to acquire clk\n");</div><div class='head'>diff --git a/drivers/bluetooth/hci_serdev.c b/drivers/bluetooth/hci_serdev.c<br/>index 85c0d9b68f5f..89a22e9b3253 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_serdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_serdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_serdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_serdev.c</a></div><div class='hunk'>@@ -366,11 +366,6 @@ int hci_uart_register_device_priv(struct hci_uart *hu,</div><div class='ctx'> 	if (test_bit(HCI_UART_EXT_CONFIG, &amp;hu-&gt;hdev_flags))</div><div class='ctx'> 		set_bit(HCI_QUIRK_EXTERNAL_CONFIG, &amp;hdev-&gt;quirks);</div><div class='ctx'> </div><div class='del'>-	if (test_bit(HCI_UART_CREATE_AMP, &amp;hu-&gt;hdev_flags))</div><div class='del'>-		hdev-&gt;dev_type = HCI_AMP;</div><div class='del'>-	else</div><div class='del'>-		hdev-&gt;dev_type = HCI_PRIMARY;</div><div class='del'>-</div><div class='ctx'> 	if (test_bit(HCI_UART_INIT_PENDING, &amp;hu-&gt;hdev_flags))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bluetooth/hci_uart.h b/drivers/bluetooth/hci_uart.h<br/>index 68c8c7e95d64..00bf7ae82c5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_uart.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_uart.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_uart.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_uart.h</a></div><div class='hunk'>@@ -37,7 +37,6 @@</div><div class='ctx'> </div><div class='ctx'> #define HCI_UART_RAW_DEVICE	0</div><div class='ctx'> #define HCI_UART_RESET_ON_INIT	1</div><div class='del'>-#define HCI_UART_CREATE_AMP	2</div><div class='ctx'> #define HCI_UART_INIT_PENDING	3</div><div class='ctx'> #define HCI_UART_EXT_CONFIG	4</div><div class='ctx'> #define HCI_UART_VND_DETECT	5</div><div class='head'>diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c<br/>index 572d68d52965..28750a40f0ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_vhci.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/hci_vhci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_vhci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/hci_vhci.c</a></div><div class='hunk'>@@ -384,17 +384,10 @@ static int __vhci_create_device(struct vhci_data *data, __u8 opcode)</div><div class='ctx'> {</div><div class='ctx'> 	struct hci_dev *hdev;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	__u8 dev_type;</div><div class='ctx'> </div><div class='ctx'> 	if (data-&gt;hdev)</div><div class='ctx'> 		return -EBADFD;</div><div class='ctx'> </div><div class='del'>-	/* bits 0-1 are dev_type (Primary or AMP) */</div><div class='del'>-	dev_type = opcode &amp; 0x03;</div><div class='del'>-</div><div class='del'>-	if (dev_type != HCI_PRIMARY &amp;&amp; dev_type != HCI_AMP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	/* bits 2-5 are reserved (must be zero) */</div><div class='ctx'> 	if (opcode &amp; 0x3c)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -412,7 +405,6 @@ static int __vhci_create_device(struct vhci_data *data, __u8 opcode)</div><div class='ctx'> 	data-&gt;hdev = hdev;</div><div class='ctx'> </div><div class='ctx'> 	hdev-&gt;bus = HCI_VIRTUAL;</div><div class='del'>-	hdev-&gt;dev_type = dev_type;</div><div class='ctx'> 	hci_set_drvdata(hdev, data);</div><div class='ctx'> </div><div class='ctx'> 	hdev-&gt;open  = vhci_open_dev;</div><div class='hunk'>@@ -634,7 +626,7 @@ static void vhci_open_timeout(struct work_struct *work)</div><div class='ctx'> 	struct vhci_data *data = container_of(work, struct vhci_data,</div><div class='ctx'> 					      open_timeout.work);</div><div class='ctx'> </div><div class='del'>-	vhci_create_device(data, amp ? HCI_AMP : HCI_PRIMARY);</div><div class='add'>+	vhci_create_device(data, 0x00);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vhci_open(struct inode *inode, struct file *file)</div><div class='head'>diff --git a/drivers/bluetooth/virtio_bt.c b/drivers/bluetooth/virtio_bt.c<br/>index 2ac70b560c46..18208e152a36 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/virtio_bt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bluetooth/virtio_bt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/virtio_bt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bluetooth/virtio_bt.c</a></div><div class='hunk'>@@ -274,7 +274,6 @@ static int virtbt_probe(struct virtio_device *vdev)</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case VIRTIO_BT_CONFIG_TYPE_PRIMARY:</div><div class='del'>-	case VIRTIO_BT_CONFIG_TYPE_AMP:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -303,7 +302,6 @@ static int virtbt_probe(struct virtio_device *vdev)</div><div class='ctx'> 	vbt-&gt;hdev = hdev;</div><div class='ctx'> </div><div class='ctx'> 	hdev-&gt;bus = HCI_VIRTIO;</div><div class='del'>-	hdev-&gt;dev_type = type;</div><div class='ctx'> 	hci_set_drvdata(hdev, vbt);</div><div class='ctx'> </div><div class='ctx'> 	hdev-&gt;open  = virtbt_open;</div><div class='head'>diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig<br/>index d5e7fa9173a1..64cd2ee03aa3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/Kconfig</a></div><div class='hunk'>@@ -163,6 +163,16 @@ config QCOM_SSC_BLOCK_BUS</div><div class='ctx'> 	  i2c/spi/uart controllers, a hexagon core, and a clock controller</div><div class='ctx'> 	  which provides clocks for the above.</div><div class='ctx'> </div><div class='add'>+config STM32_FIREWALL</div><div class='add'>+	bool "STM32 Firewall framework"</div><div class='add'>+	depends on (ARCH_STM32 || COMPILE_TEST) &amp;&amp; OF</div><div class='add'>+	select OF_DYNAMIC</div><div class='add'>+	help</div><div class='add'>+	  Say y to enable STM32 firewall framework and its services. Firewall</div><div class='add'>+	  controllers will be able to register to the framework. Access for</div><div class='add'>+	  hardware resources linked to a firewall controller can be requested</div><div class='add'>+	  through this STM32 framework.</div><div class='add'>+</div><div class='ctx'> config SUN50I_DE2_BUS</div><div class='ctx'> 	bool "Allwinner A64 DE2 Bus Driver"</div><div class='ctx'> 	  default ARM64</div><div class='head'>diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile<br/>index d90eed189a65..cddd4984d6af 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/Makefile</a></div><div class='hunk'>@@ -26,6 +26,7 @@ obj-$(CONFIG_OMAP_INTERCONNECT)	+= omap_l3_smx.o omap_l3_noc.o</div><div class='ctx'> obj-$(CONFIG_OMAP_OCP2SCP)	+= omap-ocp2scp.o</div><div class='ctx'> obj-$(CONFIG_QCOM_EBI2)		+= qcom-ebi2.o</div><div class='ctx'> obj-$(CONFIG_QCOM_SSC_BLOCK_BUS)	+= qcom-ssc-block-bus.o</div><div class='add'>+obj-$(CONFIG_STM32_FIREWALL)	+= stm32_firewall.o stm32_rifsc.o stm32_etzpc.o</div><div class='ctx'> obj-$(CONFIG_SUN50I_DE2_BUS)	+= sun50i-de2.o</div><div class='ctx'> obj-$(CONFIG_SUNXI_RSB)		+= sunxi-rsb.o</div><div class='ctx'> obj-$(CONFIG_OF)		+= simple-pm-bus.o</div><div class='head'>diff --git a/drivers/bus/brcmstb_gisb.c b/drivers/bus/brcmstb_gisb.c<br/>index 65ae758f3194..ee29162da4ee 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/brcmstb_gisb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/brcmstb_gisb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/brcmstb_gisb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/brcmstb_gisb.c</a></div><div class='hunk'>@@ -410,6 +410,7 @@ static const struct of_device_id brcmstb_gisb_arb_of_match[] = {</div><div class='ctx'> 	{ .compatible = "brcm,bcm74165-gisb-arb", .data = gisb_offsets_bcm74165 },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(of, brcmstb_gisb_arb_of_match);</div><div class='ctx'> </div><div class='ctx'> static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h<br/>index 5fe49311b8eb..aaad40a07f69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/mhi/host/internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/mhi/host/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/mhi/host/internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/mhi/host/internal.h</a></div><div class='hunk'>@@ -80,6 +80,7 @@ enum dev_st_transition {</div><div class='ctx'> 	DEV_ST_TRANSITION_FP,</div><div class='ctx'> 	DEV_ST_TRANSITION_SYS_ERR,</div><div class='ctx'> 	DEV_ST_TRANSITION_DISABLE,</div><div class='add'>+	DEV_ST_TRANSITION_DISABLE_DESTROY_DEVICE,</div><div class='ctx'> 	DEV_ST_TRANSITION_MAX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -90,7 +91,8 @@ enum dev_st_transition {</div><div class='ctx'> 	dev_st_trans(MISSION_MODE,	"MISSION MODE")		\</div><div class='ctx'> 	dev_st_trans(FP,		"FLASH PROGRAMMER")	\</div><div class='ctx'> 	dev_st_trans(SYS_ERR,		"SYS ERROR")		\</div><div class='del'>-	dev_st_trans_end(DISABLE,	"DISABLE")</div><div class='add'>+	dev_st_trans(DISABLE,		"DISABLE")		\</div><div class='add'>+	dev_st_trans_end(DISABLE_DESTROY_DEVICE, "DISABLE (DESTROY DEVICE)")</div><div class='ctx'> </div><div class='ctx'> extern const char * const dev_state_tran_str[DEV_ST_TRANSITION_MAX];</div><div class='ctx'> #define TO_DEV_STATE_TRANS_STR(state) (((state) &gt;= DEV_ST_TRANSITION_MAX) ? \</div><div class='head'>diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c<br/>index 8b40d3f01acc..11c0e751f223 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/mhi/host/pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/mhi/host/pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/mhi/host/pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/mhi/host/pm.c</a></div><div class='hunk'>@@ -468,7 +468,8 @@ error_mission_mode:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Handle shutdown transitions */</div><div class='del'>-static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl)</div><div class='add'>+static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,</div><div class='add'>+				      bool destroy_device)</div><div class='ctx'> {</div><div class='ctx'> 	enum mhi_pm_state cur_state;</div><div class='ctx'> 	struct mhi_event *mhi_event;</div><div class='hunk'>@@ -530,8 +531,16 @@ skip_mhi_reset:</div><div class='ctx'> 	dev_dbg(dev, "Waiting for all pending threads to complete\n");</div><div class='ctx'> 	wake_up_all(&amp;mhi_cntrl-&gt;state_event);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dev, "Reset all active channels and remove MHI devices\n");</div><div class='del'>-	device_for_each_child(&amp;mhi_cntrl-&gt;mhi_dev-&gt;dev, NULL, mhi_destroy_device);</div><div class='add'>+	/*</div><div class='add'>+	 * Only destroy the 'struct device' for channels if indicated by the</div><div class='add'>+	 * 'destroy_device' flag. Because, during system suspend or hibernation</div><div class='add'>+	 * state, there is no need to destroy the 'struct device' as the endpoint</div><div class='add'>+	 * device would still be physically attached to the machine.</div><div class='add'>+	 */</div><div class='add'>+	if (destroy_device) {</div><div class='add'>+		dev_dbg(dev, "Reset all active channels and remove MHI devices\n");</div><div class='add'>+		device_for_each_child(&amp;mhi_cntrl-&gt;mhi_dev-&gt;dev, NULL, mhi_destroy_device);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mhi_cntrl-&gt;pm_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -821,7 +830,10 @@ void mhi_pm_st_worker(struct work_struct *work)</div><div class='ctx'> 			mhi_pm_sys_error_transition(mhi_cntrl);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case DEV_ST_TRANSITION_DISABLE:</div><div class='del'>-			mhi_pm_disable_transition(mhi_cntrl);</div><div class='add'>+			mhi_pm_disable_transition(mhi_cntrl, false);</div><div class='add'>+			break;</div><div class='add'>+		case DEV_ST_TRANSITION_DISABLE_DESTROY_DEVICE:</div><div class='add'>+			mhi_pm_disable_transition(mhi_cntrl, true);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1175,7 +1187,8 @@ error_exit:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mhi_async_power_up);</div><div class='ctx'> </div><div class='del'>-void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful)</div><div class='add'>+static void __mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful,</div><div class='add'>+			     bool destroy_device)</div><div class='ctx'> {</div><div class='ctx'> 	enum mhi_pm_state cur_state, transition_state;</div><div class='ctx'> 	struct device *dev = &amp;mhi_cntrl-&gt;mhi_dev-&gt;dev;</div><div class='hunk'>@@ -1211,15 +1224,32 @@ void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful)</div><div class='ctx'> 	write_unlock_irq(&amp;mhi_cntrl-&gt;pm_lock);</div><div class='ctx'> 	mutex_unlock(&amp;mhi_cntrl-&gt;pm_mutex);</div><div class='ctx'> </div><div class='del'>-	mhi_queue_state_transition(mhi_cntrl, DEV_ST_TRANSITION_DISABLE);</div><div class='add'>+	if (destroy_device)</div><div class='add'>+		mhi_queue_state_transition(mhi_cntrl,</div><div class='add'>+					   DEV_ST_TRANSITION_DISABLE_DESTROY_DEVICE);</div><div class='add'>+	else</div><div class='add'>+		mhi_queue_state_transition(mhi_cntrl,</div><div class='add'>+					   DEV_ST_TRANSITION_DISABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for shutdown to complete */</div><div class='ctx'> 	flush_work(&amp;mhi_cntrl-&gt;st_worker);</div><div class='ctx'> </div><div class='ctx'> 	disable_irq(mhi_cntrl-&gt;irq[0]);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful)</div><div class='add'>+{</div><div class='add'>+	__mhi_power_down(mhi_cntrl, graceful, true);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(mhi_power_down);</div><div class='ctx'> </div><div class='add'>+void mhi_power_down_keep_dev(struct mhi_controller *mhi_cntrl,</div><div class='add'>+			       bool graceful)</div><div class='add'>+{</div><div class='add'>+	__mhi_power_down(mhi_cntrl, graceful, false);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mhi_power_down_keep_dev);</div><div class='add'>+</div><div class='ctx'> int mhi_sync_power_up(struct mhi_controller *mhi_cntrl)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = mhi_async_power_up(mhi_cntrl);</div><div class='head'>diff --git a/drivers/bus/stm32_etzpc.c b/drivers/bus/stm32_etzpc.c<br/>new file mode 100644<br/>index 000000000000..7fc0f16960be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/stm32_etzpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/stm32_etzpc.c</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stm32_firewall.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ETZPC registers</div><div class='add'>+ */</div><div class='add'>+#define ETZPC_DECPROT			0x10</div><div class='add'>+#define ETZPC_HWCFGR			0x3F0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * HWCFGR register</div><div class='add'>+ */</div><div class='add'>+#define ETZPC_HWCFGR_NUM_TZMA		GENMASK(7, 0)</div><div class='add'>+#define ETZPC_HWCFGR_NUM_PER_SEC	GENMASK(15, 8)</div><div class='add'>+#define ETZPC_HWCFGR_NUM_AHB_SEC	GENMASK(23, 16)</div><div class='add'>+#define ETZPC_HWCFGR_CHUNKS1N4		GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ETZPC miscellaneous</div><div class='add'>+ */</div><div class='add'>+#define ETZPC_PROT_MASK			GENMASK(1, 0)</div><div class='add'>+#define ETZPC_PROT_A7NS			0x3</div><div class='add'>+#define ETZPC_DECPROT_SHIFT		1</div><div class='add'>+</div><div class='add'>+#define IDS_PER_DECPROT_REGS		16</div><div class='add'>+</div><div class='add'>+static int stm32_etzpc_grant_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)</div><div class='add'>+{</div><div class='add'>+	u32 offset, reg_offset, sec_val;</div><div class='add'>+</div><div class='add'>+	if (firewall_id &gt;= ctrl-&gt;max_entries) {</div><div class='add'>+		dev_err(ctrl-&gt;dev, "Invalid sys bus ID %u", firewall_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check access configuration, 16 peripherals per register */</div><div class='add'>+	reg_offset = ETZPC_DECPROT + 0x4 * (firewall_id / IDS_PER_DECPROT_REGS);</div><div class='add'>+	offset = (firewall_id % IDS_PER_DECPROT_REGS) &lt;&lt; ETZPC_DECPROT_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* Verify peripheral is non-secure and attributed to cortex A7 */</div><div class='add'>+	sec_val = (readl(ctrl-&gt;mmio + reg_offset) &gt;&gt; offset) &amp; ETZPC_PROT_MASK;</div><div class='add'>+	if (sec_val != ETZPC_PROT_A7NS) {</div><div class='add'>+		dev_dbg(ctrl-&gt;dev, "Invalid bus configuration: reg_offset %#x, value %d\n",</div><div class='add'>+			reg_offset, sec_val);</div><div class='add'>+		return -EACCES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stm32_etzpc_release_access(struct stm32_firewall_controller *ctrl __maybe_unused,</div><div class='add'>+				       u32 firewall_id __maybe_unused)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_etzpc_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *etzpc_controller;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	u32 nb_per, nb_master;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	void __iomem *mmio;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	etzpc_controller = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*etzpc_controller), GFP_KERNEL);</div><div class='add'>+	if (!etzpc_controller)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;res);</div><div class='add'>+	if (IS_ERR(mmio))</div><div class='add'>+		return PTR_ERR(mmio);</div><div class='add'>+</div><div class='add'>+	etzpc_controller-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	etzpc_controller-&gt;mmio = mmio;</div><div class='add'>+	etzpc_controller-&gt;name = dev_driver_string(etzpc_controller-&gt;dev);</div><div class='add'>+	etzpc_controller-&gt;type = STM32_PERIPHERAL_FIREWALL | STM32_MEMORY_FIREWALL;</div><div class='add'>+	etzpc_controller-&gt;grant_access = stm32_etzpc_grant_access;</div><div class='add'>+	etzpc_controller-&gt;release_access = stm32_etzpc_release_access;</div><div class='add'>+</div><div class='add'>+	/* Get number of etzpc entries*/</div><div class='add'>+	nb_per = FIELD_GET(ETZPC_HWCFGR_NUM_PER_SEC,</div><div class='add'>+			   readl(etzpc_controller-&gt;mmio + ETZPC_HWCFGR));</div><div class='add'>+	nb_master = FIELD_GET(ETZPC_HWCFGR_NUM_AHB_SEC,</div><div class='add'>+			      readl(etzpc_controller-&gt;mmio + ETZPC_HWCFGR));</div><div class='add'>+	etzpc_controller-&gt;max_entries = nb_per + nb_master;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, etzpc_controller);</div><div class='add'>+</div><div class='add'>+	rc = stm32_firewall_controller_register(etzpc_controller);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(etzpc_controller-&gt;dev, "Couldn't register as a firewall controller: %d",</div><div class='add'>+			rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = stm32_firewall_populate_bus(etzpc_controller);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(etzpc_controller-&gt;dev, "Couldn't populate ETZPC bus: %d",</div><div class='add'>+			rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Populate all allowed nodes */</div><div class='add'>+	return of_platform_populate(np, NULL, NULL, &amp;pdev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id stm32_etzpc_of_match[] = {</div><div class='add'>+	{ .compatible = "st,stm32-etzpc" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, stm32_etzpc_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver stm32_etzpc_driver = {</div><div class='add'>+	.probe  = stm32_etzpc_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "stm32-etzpc",</div><div class='add'>+		.of_match_table = stm32_etzpc_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(stm32_etzpc_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Gatien Chevallier &lt;gatien.chevallier@foss.st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("STMicroelectronics ETZPC driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/bus/stm32_firewall.c b/drivers/bus/stm32_firewall.c<br/>new file mode 100644<br/>index 000000000000..2fc9761dadec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/stm32_firewall.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/stm32_firewall.c</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/bus/stm32_firewall_device.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stm32_firewall.h"</div><div class='add'>+</div><div class='add'>+/* Corresponds to STM32_FIREWALL_MAX_EXTRA_ARGS + firewall ID */</div><div class='add'>+#define STM32_FIREWALL_MAX_ARGS		(STM32_FIREWALL_MAX_EXTRA_ARGS + 1)</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(firewall_controller_list);</div><div class='add'>+static DEFINE_MUTEX(firewall_controller_list_lock);</div><div class='add'>+</div><div class='add'>+/* Firewall device API */</div><div class='add'>+</div><div class='add'>+int stm32_firewall_get_firewall(struct device_node *np, struct stm32_firewall *firewall,</div><div class='add'>+				unsigned int nb_firewall)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *ctrl;</div><div class='add'>+	struct of_phandle_iterator it;</div><div class='add'>+	unsigned int i, j = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!firewall || !nb_firewall)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Parse property with phandle parsed out */</div><div class='add'>+	of_for_each_phandle(&amp;it, err, np, "access-controllers", "#access-controller-cells", 0) {</div><div class='add'>+		struct of_phandle_args provider_args;</div><div class='add'>+		struct device_node *provider = it.node;</div><div class='add'>+		const char *fw_entry;</div><div class='add'>+		bool match = false;</div><div class='add'>+</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_err("Unable to get access-controllers property for node %s\n, err: %d",</div><div class='add'>+			       np-&gt;full_name, err);</div><div class='add'>+			of_node_put(provider);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (j &gt;= nb_firewall) {</div><div class='add'>+			pr_err("Too many firewall controllers");</div><div class='add'>+			of_node_put(provider);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		provider_args.args_count = of_phandle_iterator_args(&amp;it, provider_args.args,</div><div class='add'>+								    STM32_FIREWALL_MAX_ARGS);</div><div class='add'>+</div><div class='add'>+		/* Check if the parsed phandle corresponds to a registered firewall controller */</div><div class='add'>+		mutex_lock(&amp;firewall_controller_list_lock);</div><div class='add'>+		list_for_each_entry(ctrl, &amp;firewall_controller_list, entry) {</div><div class='add'>+			if (ctrl-&gt;dev-&gt;of_node-&gt;phandle == it.phandle) {</div><div class='add'>+				match = true;</div><div class='add'>+				firewall[j].firewall_ctrl = ctrl;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;firewall_controller_list_lock);</div><div class='add'>+</div><div class='add'>+		if (!match) {</div><div class='add'>+			firewall[j].firewall_ctrl = NULL;</div><div class='add'>+			pr_err("No firewall controller registered for %s\n", np-&gt;full_name);</div><div class='add'>+			of_node_put(provider);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = of_property_read_string_index(np, "access-controller-names", j, &amp;fw_entry);</div><div class='add'>+		if (err == 0)</div><div class='add'>+			firewall[j].entry = fw_entry;</div><div class='add'>+</div><div class='add'>+		/* Handle the case when there are no arguments given along with the phandle */</div><div class='add'>+		if (provider_args.args_count &lt; 0 ||</div><div class='add'>+		    provider_args.args_count &gt; STM32_FIREWALL_MAX_ARGS) {</div><div class='add'>+			of_node_put(provider);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		} else if (provider_args.args_count == 0) {</div><div class='add'>+			firewall[j].extra_args_size = 0;</div><div class='add'>+			firewall[j].firewall_id = U32_MAX;</div><div class='add'>+			j++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The firewall ID is always the first argument */</div><div class='add'>+		firewall[j].firewall_id = provider_args.args[0];</div><div class='add'>+</div><div class='add'>+		/* Extra args start at the second argument */</div><div class='add'>+		for (i = 0; i &lt; provider_args.args_count - 1; i++)</div><div class='add'>+			firewall[j].extra_args[i] = provider_args.args[i + 1];</div><div class='add'>+</div><div class='add'>+		/* Remove the firewall ID arg that is not an extra argument */</div><div class='add'>+		firewall[j].extra_args_size = provider_args.args_count - 1;</div><div class='add'>+</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_get_firewall);</div><div class='add'>+</div><div class='add'>+int stm32_firewall_grant_access(struct stm32_firewall *firewall)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *firewall_controller;</div><div class='add'>+</div><div class='add'>+	if (!firewall || firewall-&gt;firewall_id == U32_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	firewall_controller = firewall-&gt;firewall_ctrl;</div><div class='add'>+</div><div class='add'>+	if (!firewall_controller)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return firewall_controller-&gt;grant_access(firewall_controller, firewall-&gt;firewall_id);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_grant_access);</div><div class='add'>+</div><div class='add'>+int stm32_firewall_grant_access_by_id(struct stm32_firewall *firewall, u32 subsystem_id)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *firewall_controller;</div><div class='add'>+</div><div class='add'>+	if (!firewall || subsystem_id == U32_MAX || firewall-&gt;firewall_id == U32_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	firewall_controller = firewall-&gt;firewall_ctrl;</div><div class='add'>+</div><div class='add'>+	if (!firewall_controller)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return firewall_controller-&gt;grant_access(firewall_controller, subsystem_id);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_grant_access_by_id);</div><div class='add'>+</div><div class='add'>+void stm32_firewall_release_access(struct stm32_firewall *firewall)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *firewall_controller;</div><div class='add'>+</div><div class='add'>+	if (!firewall || firewall-&gt;firewall_id == U32_MAX) {</div><div class='add'>+		pr_debug("Incorrect arguments when releasing a firewall access\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	firewall_controller = firewall-&gt;firewall_ctrl;</div><div class='add'>+</div><div class='add'>+	if (!firewall_controller) {</div><div class='add'>+		pr_debug("No firewall controller to release\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	firewall_controller-&gt;release_access(firewall_controller, firewall-&gt;firewall_id);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_release_access);</div><div class='add'>+</div><div class='add'>+void stm32_firewall_release_access_by_id(struct stm32_firewall *firewall, u32 subsystem_id)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *firewall_controller;</div><div class='add'>+</div><div class='add'>+	if (!firewall || subsystem_id == U32_MAX || firewall-&gt;firewall_id == U32_MAX) {</div><div class='add'>+		pr_debug("Incorrect arguments when releasing a firewall access");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	firewall_controller = firewall-&gt;firewall_ctrl;</div><div class='add'>+</div><div class='add'>+	if (!firewall_controller) {</div><div class='add'>+		pr_debug("No firewall controller to release");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	firewall_controller-&gt;release_access(firewall_controller, subsystem_id);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_release_access_by_id);</div><div class='add'>+</div><div class='add'>+/* Firewall controller API */</div><div class='add'>+</div><div class='add'>+int stm32_firewall_controller_register(struct stm32_firewall_controller *firewall_controller)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *ctrl;</div><div class='add'>+</div><div class='add'>+	if (!firewall_controller)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	pr_info("Registering %s firewall controller\n", firewall_controller-&gt;name);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;firewall_controller_list_lock);</div><div class='add'>+	list_for_each_entry(ctrl, &amp;firewall_controller_list, entry) {</div><div class='add'>+		if (ctrl == firewall_controller) {</div><div class='add'>+			pr_debug("%s firewall controller already registered\n",</div><div class='add'>+				 firewall_controller-&gt;name);</div><div class='add'>+			mutex_unlock(&amp;firewall_controller_list_lock);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	list_add_tail(&amp;firewall_controller-&gt;entry, &amp;firewall_controller_list);</div><div class='add'>+	mutex_unlock(&amp;firewall_controller_list_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_controller_register);</div><div class='add'>+</div><div class='add'>+void stm32_firewall_controller_unregister(struct stm32_firewall_controller *firewall_controller)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *ctrl;</div><div class='add'>+	bool controller_removed = false;</div><div class='add'>+</div><div class='add'>+	if (!firewall_controller) {</div><div class='add'>+		pr_debug("Null reference while unregistering firewall controller\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;firewall_controller_list_lock);</div><div class='add'>+	list_for_each_entry(ctrl, &amp;firewall_controller_list, entry) {</div><div class='add'>+		if (ctrl == firewall_controller) {</div><div class='add'>+			controller_removed = true;</div><div class='add'>+			list_del_init(&amp;ctrl-&gt;entry);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;firewall_controller_list_lock);</div><div class='add'>+</div><div class='add'>+	if (!controller_removed)</div><div class='add'>+		pr_debug("There was no firewall controller named %s to unregister\n",</div><div class='add'>+			 firewall_controller-&gt;name);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_controller_unregister);</div><div class='add'>+</div><div class='add'>+int stm32_firewall_populate_bus(struct stm32_firewall_controller *firewall_controller)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall *firewalls;</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	struct device *parent;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	parent = firewall_controller-&gt;dev;</div><div class='add'>+</div><div class='add'>+	dev_dbg(parent, "Populating %s system bus\n", dev_name(firewall_controller-&gt;dev));</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(dev_of_node(parent), child) {</div><div class='add'>+		/* The access-controllers property is mandatory for firewall bus devices */</div><div class='add'>+		len = of_count_phandle_with_args(child, "access-controllers",</div><div class='add'>+						 "#access-controller-cells");</div><div class='add'>+		if (len &lt;= 0) {</div><div class='add'>+			of_node_put(child);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		firewalls = kcalloc(len, sizeof(*firewalls), GFP_KERNEL);</div><div class='add'>+		if (!firewalls) {</div><div class='add'>+			of_node_put(child);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = stm32_firewall_get_firewall(child, firewalls, (unsigned int)len);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(firewalls);</div><div class='add'>+			of_node_put(child);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; len; i++) {</div><div class='add'>+			if (firewall_controller-&gt;grant_access(firewall_controller,</div><div class='add'>+							      firewalls[i].firewall_id)) {</div><div class='add'>+				/*</div><div class='add'>+				 * Peripheral access not allowed or not defined.</div><div class='add'>+				 * Mark the node as populated so platform bus won't probe it</div><div class='add'>+				 */</div><div class='add'>+				of_detach_node(child);</div><div class='add'>+				dev_err(parent, "%s: Device driver will not be probed\n",</div><div class='add'>+					child-&gt;full_name);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kfree(firewalls);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stm32_firewall_populate_bus);</div><div class='head'>diff --git a/drivers/bus/stm32_firewall.h b/drivers/bus/stm32_firewall.h<br/>new file mode 100644<br/>index 000000000000..e5fac85fe346<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/stm32_firewall.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/stm32_firewall.h</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _STM32_FIREWALL_H</div><div class='add'>+#define _STM32_FIREWALL_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * STM32_PERIPHERAL_FIREWALL:		This type of firewall protects peripherals</div><div class='add'>+ * STM32_MEMORY_FIREWALL:		This type of firewall protects memories/subsets of memory</div><div class='add'>+ *					zones</div><div class='add'>+ * STM32_NOTYPE_FIREWALL:		Undefined firewall type</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define STM32_PERIPHERAL_FIREWALL	BIT(1)</div><div class='add'>+#define STM32_MEMORY_FIREWALL		BIT(2)</div><div class='add'>+#define STM32_NOTYPE_FIREWALL		BIT(3)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct stm32_firewall_controller - Information on firewall controller supplying services</div><div class='add'>+ *</div><div class='add'>+ * @name:			Name of the firewall controller</div><div class='add'>+ * @dev:			Device reference of the firewall controller</div><div class='add'>+ * @mmio:			Base address of the firewall controller</div><div class='add'>+ * @entry:			List entry of the firewall controller list</div><div class='add'>+ * @type:			Type of firewall</div><div class='add'>+ * @max_entries:		Number of entries covered by the firewall</div><div class='add'>+ * @grant_access:		Callback used to grant access for a device access against a</div><div class='add'>+ *				firewall controller</div><div class='add'>+ * @release_access:		Callback used to release resources taken by a device when access was</div><div class='add'>+ *				granted</div><div class='add'>+ * @grant_memory_range_access:	Callback used to grant access for a device to a given memory region</div><div class='add'>+ */</div><div class='add'>+struct stm32_firewall_controller {</div><div class='add'>+	const char *name;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	void __iomem *mmio;</div><div class='add'>+	struct list_head entry;</div><div class='add'>+	unsigned int type;</div><div class='add'>+	unsigned int max_entries;</div><div class='add'>+</div><div class='add'>+	int (*grant_access)(struct stm32_firewall_controller *ctrl, u32 id);</div><div class='add'>+	void (*release_access)(struct stm32_firewall_controller *ctrl, u32 id);</div><div class='add'>+	int (*grant_memory_range_access)(struct stm32_firewall_controller *ctrl, phys_addr_t paddr,</div><div class='add'>+					 size_t size);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stm32_firewall_controller_register - Register a firewall controller to the STM32 firewall</div><div class='add'>+ *					framework</div><div class='add'>+ * @firewall_controller:	Firewall controller to register</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 in case of success or -ENODEV if no controller was given.</div><div class='add'>+ */</div><div class='add'>+int stm32_firewall_controller_register(struct stm32_firewall_controller *firewall_controller);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stm32_firewall_controller_unregister - Unregister a firewall controller from the STM32</div><div class='add'>+ *					  firewall framework</div><div class='add'>+ * @firewall_controller:	Firewall controller to unregister</div><div class='add'>+ */</div><div class='add'>+void stm32_firewall_controller_unregister(struct stm32_firewall_controller *firewall_controller);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stm32_firewall_populate_bus - Populate device tree nodes that have a correct firewall</div><div class='add'>+ *				 configuration. This is used at boot-time only, as a sanity check</div><div class='add'>+ *				 between device tree and firewalls hardware configurations to</div><div class='add'>+ *				 prevent a kernel crash when a device driver is not granted access</div><div class='add'>+ *</div><div class='add'>+ * @firewall_controller:	Firewall controller which nodes will be populated or not</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 in case of success or appropriate errno code if error occurred.</div><div class='add'>+ */</div><div class='add'>+int stm32_firewall_populate_bus(struct stm32_firewall_controller *firewall_controller);</div><div class='add'>+</div><div class='add'>+#endif /* _STM32_FIREWALL_H */</div><div class='head'>diff --git a/drivers/bus/stm32_rifsc.c b/drivers/bus/stm32_rifsc.c<br/>new file mode 100644<br/>index 000000000000..4cf1b60014b7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/stm32_rifsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/stm32_rifsc.c</a></div><div class='hunk'>@@ -0,0 +1,252 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stm32_firewall.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RIFSC offset register</div><div class='add'>+ */</div><div class='add'>+#define RIFSC_RISC_SECCFGR0		0x10</div><div class='add'>+#define RIFSC_RISC_PRIVCFGR0		0x30</div><div class='add'>+#define RIFSC_RISC_PER0_CIDCFGR		0x100</div><div class='add'>+#define RIFSC_RISC_PER0_SEMCR		0x104</div><div class='add'>+#define RIFSC_RISC_HWCFGR2		0xFEC</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SEMCR register</div><div class='add'>+ */</div><div class='add'>+#define SEMCR_MUTEX			BIT(0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * HWCFGR2 register</div><div class='add'>+ */</div><div class='add'>+#define HWCFGR2_CONF1_MASK		GENMASK(15, 0)</div><div class='add'>+#define HWCFGR2_CONF2_MASK		GENMASK(23, 16)</div><div class='add'>+#define HWCFGR2_CONF3_MASK		GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RIFSC miscellaneous</div><div class='add'>+ */</div><div class='add'>+#define RIFSC_RISC_CFEN_MASK		BIT(0)</div><div class='add'>+#define RIFSC_RISC_SEM_EN_MASK		BIT(1)</div><div class='add'>+#define RIFSC_RISC_SCID_MASK		GENMASK(6, 4)</div><div class='add'>+#define RIFSC_RISC_SEML_SHIFT		16</div><div class='add'>+#define RIFSC_RISC_SEMWL_MASK		GENMASK(23, 16)</div><div class='add'>+#define RIFSC_RISC_PER_ID_MASK		GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+#define RIFSC_RISC_PERx_CID_MASK	(RIFSC_RISC_CFEN_MASK | \</div><div class='add'>+					 RIFSC_RISC_SEM_EN_MASK | \</div><div class='add'>+					 RIFSC_RISC_SCID_MASK | \</div><div class='add'>+					 RIFSC_RISC_SEMWL_MASK)</div><div class='add'>+</div><div class='add'>+#define IDS_PER_RISC_SEC_PRIV_REGS	32</div><div class='add'>+</div><div class='add'>+/* RIF miscellaneous */</div><div class='add'>+/*</div><div class='add'>+ * CIDCFGR register fields</div><div class='add'>+ */</div><div class='add'>+#define CIDCFGR_CFEN			BIT(0)</div><div class='add'>+#define CIDCFGR_SEMEN			BIT(1)</div><div class='add'>+#define CIDCFGR_SEMWL(x)		BIT(RIFSC_RISC_SEML_SHIFT + (x))</div><div class='add'>+</div><div class='add'>+#define SEMWL_SHIFT			16</div><div class='add'>+</div><div class='add'>+/* Compartiment IDs */</div><div class='add'>+#define RIF_CID0			0x0</div><div class='add'>+#define RIF_CID1			0x1</div><div class='add'>+</div><div class='add'>+static bool stm32_rifsc_is_semaphore_available(void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return !(readl(addr) &amp; SEMCR_MUTEX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_rif_acquire_semaphore(struct stm32_firewall_controller *stm32_firewall_controller,</div><div class='add'>+				       int id)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = stm32_firewall_controller-&gt;mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id;</div><div class='add'>+</div><div class='add'>+	writel(SEMCR_MUTEX, addr);</div><div class='add'>+</div><div class='add'>+	/* Check that CID1 has the semaphore */</div><div class='add'>+	if (stm32_rifsc_is_semaphore_available(addr) ||</div><div class='add'>+	    FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) != RIF_CID1)</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stm32_rif_release_semaphore(struct stm32_firewall_controller *stm32_firewall_controller,</div><div class='add'>+					int id)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = stm32_firewall_controller-&gt;mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id;</div><div class='add'>+</div><div class='add'>+	if (stm32_rifsc_is_semaphore_available(addr))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	writel(SEMCR_MUTEX, addr);</div><div class='add'>+</div><div class='add'>+	/* Ok if another compartment takes the semaphore before the check */</div><div class='add'>+	WARN_ON(!stm32_rifsc_is_semaphore_available(addr) &amp;&amp;</div><div class='add'>+		FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) == RIF_CID1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_rifsc_grant_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *rifsc_controller = ctrl;</div><div class='add'>+	u32 reg_offset, reg_id, sec_reg_value, cid_reg_value;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (firewall_id &gt;= rifsc_controller-&gt;max_entries) {</div><div class='add'>+		dev_err(rifsc_controller-&gt;dev, "Invalid sys bus ID %u", firewall_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * RIFSC_RISC_PRIVCFGRx and RIFSC_RISC_SECCFGRx both handle configuration access for</div><div class='add'>+	 * 32 peripherals. On the other hand, there is one _RIFSC_RISC_PERx_CIDCFGR register</div><div class='add'>+	 * per peripheral</div><div class='add'>+	 */</div><div class='add'>+	reg_id = firewall_id / IDS_PER_RISC_SEC_PRIV_REGS;</div><div class='add'>+	reg_offset = firewall_id % IDS_PER_RISC_SEC_PRIV_REGS;</div><div class='add'>+	sec_reg_value = readl(rifsc_controller-&gt;mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id);</div><div class='add'>+	cid_reg_value = readl(rifsc_controller-&gt;mmio + RIFSC_RISC_PER0_CIDCFGR + 0x8 * firewall_id);</div><div class='add'>+</div><div class='add'>+	/* First check conditions for semaphore mode, which doesn't take into account static CID. */</div><div class='add'>+	if ((cid_reg_value &amp; CIDCFGR_SEMEN) &amp;&amp; (cid_reg_value &amp; CIDCFGR_CFEN)) {</div><div class='add'>+		if (cid_reg_value &amp; BIT(RIF_CID1 + SEMWL_SHIFT)) {</div><div class='add'>+			/* Static CID is irrelevant if semaphore mode */</div><div class='add'>+			goto skip_cid_check;</div><div class='add'>+		} else {</div><div class='add'>+			dev_dbg(rifsc_controller-&gt;dev,</div><div class='add'>+				"Invalid bus semaphore configuration: index %d\n", firewall_id);</div><div class='add'>+			return -EACCES;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Skip CID check if CID filtering isn't enabled or filtering is enabled on CID0, which</div><div class='add'>+	 * corresponds to whatever CID.</div><div class='add'>+	 */</div><div class='add'>+	if (!(cid_reg_value &amp; CIDCFGR_CFEN) ||</div><div class='add'>+	    FIELD_GET(RIFSC_RISC_SCID_MASK, cid_reg_value) == RIF_CID0)</div><div class='add'>+		goto skip_cid_check;</div><div class='add'>+</div><div class='add'>+	/* Coherency check with the CID configuration */</div><div class='add'>+	if (FIELD_GET(RIFSC_RISC_SCID_MASK, cid_reg_value) != RIF_CID1) {</div><div class='add'>+		dev_dbg(rifsc_controller-&gt;dev, "Invalid CID configuration for peripheral: %d\n",</div><div class='add'>+			firewall_id);</div><div class='add'>+		return -EACCES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+skip_cid_check:</div><div class='add'>+	/* Check security configuration */</div><div class='add'>+	if (sec_reg_value &amp; BIT(reg_offset)) {</div><div class='add'>+		dev_dbg(rifsc_controller-&gt;dev,</div><div class='add'>+			"Invalid security configuration for peripheral: %d\n", firewall_id);</div><div class='add'>+		return -EACCES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the peripheral is in semaphore mode, take the semaphore so that</div><div class='add'>+	 * the CID1 has the ownership.</div><div class='add'>+	 */</div><div class='add'>+	if ((cid_reg_value &amp; CIDCFGR_SEMEN) &amp;&amp; (cid_reg_value &amp; CIDCFGR_CFEN)) {</div><div class='add'>+		rc = stm32_rif_acquire_semaphore(rifsc_controller, firewall_id);</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(rifsc_controller-&gt;dev,</div><div class='add'>+				"Couldn't acquire semaphore for peripheral: %d\n", firewall_id);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stm32_rifsc_release_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)</div><div class='add'>+{</div><div class='add'>+	stm32_rif_release_semaphore(ctrl, firewall_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_rifsc_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct stm32_firewall_controller *rifsc_controller;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	u32 nb_risup, nb_rimu, nb_risal;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	void __iomem *mmio;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rifsc_controller = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*rifsc_controller), GFP_KERNEL);</div><div class='add'>+	if (!rifsc_controller)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;res);</div><div class='add'>+	if (IS_ERR(mmio))</div><div class='add'>+		return PTR_ERR(mmio);</div><div class='add'>+</div><div class='add'>+	rifsc_controller-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	rifsc_controller-&gt;mmio = mmio;</div><div class='add'>+	rifsc_controller-&gt;name = dev_driver_string(rifsc_controller-&gt;dev);</div><div class='add'>+	rifsc_controller-&gt;type = STM32_PERIPHERAL_FIREWALL | STM32_MEMORY_FIREWALL;</div><div class='add'>+	rifsc_controller-&gt;grant_access = stm32_rifsc_grant_access;</div><div class='add'>+	rifsc_controller-&gt;release_access = stm32_rifsc_release_access;</div><div class='add'>+</div><div class='add'>+	/* Get number of RIFSC entries*/</div><div class='add'>+	nb_risup = readl(rifsc_controller-&gt;mmio + RIFSC_RISC_HWCFGR2) &amp; HWCFGR2_CONF1_MASK;</div><div class='add'>+	nb_rimu = readl(rifsc_controller-&gt;mmio + RIFSC_RISC_HWCFGR2) &amp; HWCFGR2_CONF2_MASK;</div><div class='add'>+	nb_risal = readl(rifsc_controller-&gt;mmio + RIFSC_RISC_HWCFGR2) &amp; HWCFGR2_CONF3_MASK;</div><div class='add'>+	rifsc_controller-&gt;max_entries = nb_risup + nb_rimu + nb_risal;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, rifsc_controller);</div><div class='add'>+</div><div class='add'>+	rc = stm32_firewall_controller_register(rifsc_controller);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(rifsc_controller-&gt;dev, "Couldn't register as a firewall controller: %d",</div><div class='add'>+			rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = stm32_firewall_populate_bus(rifsc_controller);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(rifsc_controller-&gt;dev, "Couldn't populate RIFSC bus: %d",</div><div class='add'>+			rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Populate all allowed nodes */</div><div class='add'>+	return of_platform_populate(np, NULL, NULL, &amp;pdev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id stm32_rifsc_of_match[] = {</div><div class='add'>+	{ .compatible = "st,stm32mp25-rifsc" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, stm32_rifsc_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver stm32_rifsc_driver = {</div><div class='add'>+	.probe  = stm32_rifsc_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "stm32-rifsc",</div><div class='add'>+		.of_match_table = stm32_rifsc_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(stm32_rifsc_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Gatien Chevallier &lt;gatien.chevallier@foss.st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("STMicroelectronics RIFSC driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c<br/>index 41d33f39efe5..8767e04d6c89 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/ti-sysc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/bus/ti-sysc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/ti-sysc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/bus/ti-sysc.c</a></div><div class='hunk'>@@ -1,6 +1,17 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /*</div><div class='ctx'>  * ti-sysc.c - Texas Instruments sysc interconnect target driver</div><div class='add'>+ *</div><div class='add'>+ * TI SoCs have an interconnect target wrapper IP for many devices. The wrapper</div><div class='add'>+ * IP manages clock gating, resets, and PM capabilities for the connected devices.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * Many features are based on the earlier omap_hwmod arch code with thanks to all</div><div class='add'>+ * the people who developed and debugged the code over the years:</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009-2011 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2011-2021 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -1458,8 +1469,7 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	ddata = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-	if (ddata-&gt;cfg.quirks &amp;</div><div class='del'>-	    (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))</div><div class='add'>+	if (ddata-&gt;cfg.quirks &amp; SYSC_QUIRK_NO_IDLE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!ddata-&gt;enabled)</div><div class='hunk'>@@ -1477,8 +1487,7 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	ddata = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-	if (ddata-&gt;cfg.quirks &amp;</div><div class='del'>-	    (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))</div><div class='add'>+	if (ddata-&gt;cfg.quirks &amp; SYSC_QUIRK_NO_IDLE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ddata-&gt;cfg.quirks &amp; SYSC_QUIRK_REINIT_ON_RESUME) {</div><div class='hunk'>@@ -1529,19 +1538,6 @@ struct sysc_revision_quirk {</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> static const struct sysc_revision_quirk sysc_revision_quirks[] = {</div><div class='del'>-	/* These drivers need to be fixed to not use pm_runtime_irq_safe() */</div><div class='del'>-	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,</div><div class='del'>-		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),</div><div class='del'>-	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,</div><div class='del'>-		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),</div><div class='del'>-	/* Uarts on omap4 and later */</div><div class='del'>-	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,</div><div class='del'>-		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),</div><div class='del'>-	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,</div><div class='del'>-		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),</div><div class='del'>-	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff,</div><div class='del'>-		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),</div><div class='del'>-</div><div class='ctx'> 	/* Quirks that need to be set based on the module address */</div><div class='ctx'> 	SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,</div><div class='ctx'> 		   SYSC_QUIRK_EXT_OPT_CLOCK | SYSC_QUIRK_NO_RESET_ON_INIT |</div><div class='hunk'>@@ -1599,6 +1595,17 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {</div><div class='ctx'> 		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),</div><div class='ctx'> 	SYSC_QUIRK("sata", 0, 0xfc, 0x1100, -ENODEV, 0x5e412000, 0xffffffff,</div><div class='ctx'> 		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),</div><div class='add'>+	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,</div><div class='add'>+		   SYSC_QUIRK_SWSUP_SIDLE_ACT),</div><div class='add'>+	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,</div><div class='add'>+		   SYSC_QUIRK_SWSUP_SIDLE_ACT),</div><div class='add'>+	/* Uarts on omap4 and later */</div><div class='add'>+	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,</div><div class='add'>+		   SYSC_QUIRK_SWSUP_SIDLE_ACT),</div><div class='add'>+	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,</div><div class='add'>+		   SYSC_QUIRK_SWSUP_SIDLE_ACT),</div><div class='add'>+	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff,</div><div class='add'>+		   SYSC_QUIRK_SWSUP_SIDLE_ACT),</div><div class='ctx'> 	SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff,</div><div class='ctx'> 		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),</div><div class='ctx'> 	SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff,</div><div class='hunk'>@@ -2145,8 +2152,7 @@ static int sysc_reset(struct sysc *ddata)</div><div class='ctx'> 	sysc_offset = ddata-&gt;offsets[SYSC_SYSCONFIG];</div><div class='ctx'> </div><div class='ctx'> 	if (ddata-&gt;legacy_mode ||</div><div class='del'>-	    ddata-&gt;cap-&gt;regbits-&gt;srst_shift &lt; 0 ||</div><div class='del'>-	    ddata-&gt;cfg.quirks &amp; SYSC_QUIRK_NO_RESET_ON_INIT)</div><div class='add'>+	    ddata-&gt;cap-&gt;regbits-&gt;srst_shift &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	sysc_mask = BIT(ddata-&gt;cap-&gt;regbits-&gt;srst_shift);</div><div class='hunk'>@@ -2240,12 +2246,14 @@ static int sysc_init_module(struct sysc *ddata)</div><div class='ctx'> 			goto err_main_clocks;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	error = sysc_reset(ddata);</div><div class='del'>-	if (error)</div><div class='del'>-		dev_err(ddata-&gt;dev, "Reset failed with %d\n", error);</div><div class='add'>+	if (!(ddata-&gt;cfg.quirks &amp; SYSC_QUIRK_NO_RESET_ON_INIT)) {</div><div class='add'>+		error = sysc_reset(ddata);</div><div class='add'>+		if (error)</div><div class='add'>+			dev_err(ddata-&gt;dev, "Reset failed with %d\n", error);</div><div class='ctx'> </div><div class='del'>-	if (error &amp;&amp; !ddata-&gt;legacy_mode)</div><div class='del'>-		sysc_disable_module(ddata-&gt;dev);</div><div class='add'>+		if (error &amp;&amp; !ddata-&gt;legacy_mode)</div><div class='add'>+			sysc_disable_module(ddata-&gt;dev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> err_main_clocks:</div><div class='ctx'> 	if (error)</div><div class='hunk'>@@ -2447,89 +2455,6 @@ static int __maybe_unused sysc_child_runtime_resume(struct device *dev)</div><div class='ctx'> 	return pm_generic_runtime_resume(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='del'>-static int sysc_child_suspend_noirq(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct sysc *ddata;</div><div class='del'>-	int error;</div><div class='del'>-</div><div class='del'>-	ddata = sysc_child_to_parent(dev);</div><div class='del'>-</div><div class='del'>-	dev_dbg(ddata-&gt;dev, "%s %s\n", __func__,</div><div class='del'>-		ddata-&gt;name ? ddata-&gt;name : "");</div><div class='del'>-</div><div class='del'>-	error = pm_generic_suspend_noirq(dev);</div><div class='del'>-	if (error) {</div><div class='del'>-		dev_err(dev, "%s error at %i: %i\n",</div><div class='del'>-			__func__, __LINE__, error);</div><div class='del'>-</div><div class='del'>-		return error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!pm_runtime_status_suspended(dev)) {</div><div class='del'>-		error = pm_generic_runtime_suspend(dev);</div><div class='del'>-		if (error) {</div><div class='del'>-			dev_dbg(dev, "%s busy at %i: %i\n",</div><div class='del'>-				__func__, __LINE__, error);</div><div class='del'>-</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		error = sysc_runtime_suspend(ddata-&gt;dev);</div><div class='del'>-		if (error) {</div><div class='del'>-			dev_err(dev, "%s error at %i: %i\n",</div><div class='del'>-				__func__, __LINE__, error);</div><div class='del'>-</div><div class='del'>-			return error;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ddata-&gt;child_needs_resume = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sysc_child_resume_noirq(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct sysc *ddata;</div><div class='del'>-	int error;</div><div class='del'>-</div><div class='del'>-	ddata = sysc_child_to_parent(dev);</div><div class='del'>-</div><div class='del'>-	dev_dbg(ddata-&gt;dev, "%s %s\n", __func__,</div><div class='del'>-		ddata-&gt;name ? ddata-&gt;name : "");</div><div class='del'>-</div><div class='del'>-	if (ddata-&gt;child_needs_resume) {</div><div class='del'>-		ddata-&gt;child_needs_resume = false;</div><div class='del'>-</div><div class='del'>-		error = sysc_runtime_resume(ddata-&gt;dev);</div><div class='del'>-		if (error)</div><div class='del'>-			dev_err(ddata-&gt;dev,</div><div class='del'>-				"%s runtime resume error: %i\n",</div><div class='del'>-				__func__, error);</div><div class='del'>-</div><div class='del'>-		error = pm_generic_runtime_resume(dev);</div><div class='del'>-		if (error)</div><div class='del'>-			dev_err(ddata-&gt;dev,</div><div class='del'>-				"%s generic runtime resume: %i\n",</div><div class='del'>-				__func__, error);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return pm_generic_resume_noirq(dev);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static struct dev_pm_domain sysc_child_pm_domain = {</div><div class='del'>-	.ops = {</div><div class='del'>-		SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,</div><div class='del'>-				   sysc_child_runtime_resume,</div><div class='del'>-				   NULL)</div><div class='del'>-		USE_PLATFORM_PM_SLEEP_OPS</div><div class='del'>-		SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,</div><div class='del'>-					      sysc_child_resume_noirq)</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Caller needs to take list_lock if ever used outside of cpu_pm */</div><div class='ctx'> static void sysc_reinit_modules(struct sysc_soc_info *soc)</div><div class='ctx'> {</div><div class='hunk'>@@ -2600,25 +2525,6 @@ out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;sysc_soc-&gt;list_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * sysc_legacy_idle_quirk - handle children in omap_device compatible way</div><div class='del'>- * @ddata: device driver data</div><div class='del'>- * @child: child device driver</div><div class='del'>- *</div><div class='del'>- * Allow idle for child devices as done with _od_runtime_suspend().</div><div class='del'>- * Otherwise many child devices will not idle because of the permanent</div><div class='del'>- * parent usecount set in pm_runtime_irq_safe().</div><div class='del'>- *</div><div class='del'>- * Note that the long term solution is to just modify the child device</div><div class='del'>- * drivers to not set pm_runtime_irq_safe() and then this can be just</div><div class='del'>- * dropped.</div><div class='del'>- */</div><div class='del'>-static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)</div><div class='del'>-{</div><div class='del'>-	if (ddata-&gt;cfg.quirks &amp; SYSC_QUIRK_LEGACY_IDLE)</div><div class='del'>-		dev_pm_domain_set(child, &amp;sysc_child_pm_domain);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sysc_notifier_call(struct notifier_block *nb,</div><div class='ctx'> 			      unsigned long event, void *device)</div><div class='ctx'> {</div><div class='hunk'>@@ -2635,7 +2541,6 @@ static int sysc_notifier_call(struct notifier_block *nb,</div><div class='ctx'> 		error = sysc_child_add_clocks(ddata, dev);</div><div class='ctx'> 		if (error)</div><div class='ctx'> 			return error;</div><div class='del'>-		sysc_legacy_idle_quirk(ddata, dev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2859,8 +2764,7 @@ static const struct sysc_capabilities sysc_34xx_sr = {</div><div class='ctx'> 	.type = TI_SYSC_OMAP34XX_SR,</div><div class='ctx'> 	.sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,</div><div class='ctx'> 	.regbits = &amp;sysc_regbits_omap34xx_sr,</div><div class='del'>-	.mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |</div><div class='del'>-		      SYSC_QUIRK_LEGACY_IDLE,</div><div class='add'>+	.mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2881,13 +2785,12 @@ static const struct sysc_capabilities sysc_36xx_sr = {</div><div class='ctx'> 	.type = TI_SYSC_OMAP36XX_SR,</div><div class='ctx'> 	.sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,</div><div class='ctx'> 	.regbits = &amp;sysc_regbits_omap36xx_sr,</div><div class='del'>-	.mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,</div><div class='add'>+	.mod_quirks = SYSC_QUIRK_UNCACHED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct sysc_capabilities sysc_omap4_sr = {</div><div class='ctx'> 	.type = TI_SYSC_OMAP4_SR,</div><div class='ctx'> 	.regbits = &amp;sysc_regbits_omap36xx_sr,</div><div class='del'>-	.mod_quirks = SYSC_QUIRK_LEGACY_IDLE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c<br/>index e9cc8b4786fb..6874b72ec59d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cache/sifive_ccache.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cache/sifive_ccache.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cache/sifive_ccache.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cache/sifive_ccache.c</a></div><div class='hunk'>@@ -290,7 +290,7 @@ static int __init sifive_ccache_init(void)</div><div class='ctx'> 	struct device_node *np;</div><div class='ctx'> 	struct resource res;</div><div class='ctx'> 	const struct of_device_id *match;</div><div class='del'>-	unsigned long quirks;</div><div class='add'>+	unsigned long quirks __maybe_unused;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	np = of_find_matching_node_and_match(NULL, sifive_ccache_ids, &amp;match);</div><div class='head'>diff --git a/drivers/char/agp/alpha-agp.c b/drivers/char/agp/alpha-agp.c<br/>index c9bf2c219841..f0d0c044731c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/agp/alpha-agp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/agp/alpha-agp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/agp/alpha-agp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/agp/alpha-agp.c</a></div><div class='hunk'>@@ -149,7 +149,7 @@ struct agp_bridge_driver alpha_core_agp_driver = {</div><div class='ctx'> </div><div class='ctx'> struct agp_bridge_data *alpha_bridge;</div><div class='ctx'> </div><div class='del'>-int __init</div><div class='add'>+static int __init</div><div class='ctx'> alpha_core_agp_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	alpha_agp_info *agp = alpha_mv.agp_info();</div><div class='head'>diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c<br/>index a3bbdd6e60fc..f5c71a617a99 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/hw_random/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/hw_random/core.c</a></div><div class='hunk'>@@ -382,7 +382,7 @@ static ssize_t rng_current_show(struct device *dev,</div><div class='ctx'> 	if (IS_ERR(rng))</div><div class='ctx'> 		return PTR_ERR(rng);</div><div class='ctx'> </div><div class='del'>-	ret = snprintf(buf, PAGE_SIZE, "%s\n", rng ? rng-&gt;name : "none");</div><div class='add'>+	ret = sysfs_emit(buf, "%s\n", rng ? rng-&gt;name : "none");</div><div class='ctx'> 	put_rng(rng);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/char/hw_random/mxc-rnga.c b/drivers/char/hw_random/mxc-rnga.c<br/>index 07ec000e4cd7..94ee18a1120a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/mxc-rnga.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/hw_random/mxc-rnga.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/mxc-rnga.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/hw_random/mxc-rnga.c</a></div><div class='hunk'>@@ -131,7 +131,7 @@ static void mxc_rnga_cleanup(struct hwrng *rng)</div><div class='ctx'> 	__raw_writel(ctrl &amp; ~RNGA_CONTROL_GO, mxc_rng-&gt;mem + RNGA_CONTROL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init mxc_rnga_probe(struct platform_device *pdev)</div><div class='add'>+static int mxc_rnga_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct mxc_rng *mxc_rng;</div><div class='hunk'>@@ -176,7 +176,7 @@ err_ioremap:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __exit mxc_rnga_remove(struct platform_device *pdev)</div><div class='add'>+static void mxc_rnga_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mxc_rng *mxc_rng = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -197,10 +197,11 @@ static struct platform_driver mxc_rnga_driver = {</div><div class='ctx'> 		.name = "mxc_rnga",</div><div class='ctx'> 		.of_match_table = mxc_rnga_of_match,</div><div class='ctx'> 	},</div><div class='del'>-	.remove_new = __exit_p(mxc_rnga_remove),</div><div class='add'>+	.probe = mxc_rnga_probe,</div><div class='add'>+	.remove_new = mxc_rnga_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-module_platform_driver_probe(mxc_rnga_driver, mxc_rnga_probe);</div><div class='add'>+module_platform_driver(mxc_rnga_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Freescale Semiconductor, Inc.");</div><div class='ctx'> MODULE_DESCRIPTION("H/W RNGA driver for i.MX");</div><div class='head'>diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c<br/>index 379bc245c520..0e903d6e22e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/stm32-rng.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/hw_random/stm32-rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/stm32-rng.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/hw_random/stm32-rng.c</a></div><div class='hunk'>@@ -220,7 +220,8 @@ static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)</div><div class='ctx'> 				if (err &amp;&amp; i &gt; RNG_NB_RECOVER_TRIES) {</div><div class='ctx'> 					dev_err((struct device *)priv-&gt;rng.priv,</div><div class='ctx'> 						"Couldn't recover from seed error\n");</div><div class='del'>-					return -ENOTRECOVERABLE;</div><div class='add'>+					retval = -ENOTRECOVERABLE;</div><div class='add'>+					goto exit_rpm;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -238,7 +239,8 @@ static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)</div><div class='ctx'> 			if (err &amp;&amp; i &gt; RNG_NB_RECOVER_TRIES) {</div><div class='ctx'> 				dev_err((struct device *)priv-&gt;rng.priv,</div><div class='ctx'> 					"Couldn't recover from seed error");</div><div class='del'>-				return -ENOTRECOVERABLE;</div><div class='add'>+				retval = -ENOTRECOVERABLE;</div><div class='add'>+				goto exit_rpm;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -250,6 +252,7 @@ static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)</div><div class='ctx'> 		max -= sizeof(u32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+exit_rpm:</div><div class='ctx'> 	pm_runtime_mark_last_busy((struct device *) priv-&gt;rng.priv);</div><div class='ctx'> 	pm_runtime_put_sync_autosuspend((struct device *) priv-&gt;rng.priv);</div><div class='ctx'> </div><div class='hunk'>@@ -353,13 +356,15 @@ static int stm32_rng_init(struct hwrng *rng)</div><div class='ctx'> 	err = readl_relaxed_poll_timeout_atomic(priv-&gt;base + RNG_SR, reg,</div><div class='ctx'> 						reg &amp; RNG_SR_DRDY,</div><div class='ctx'> 						10, 100000);</div><div class='del'>-	if (err | (reg &amp; ~RNG_SR_DRDY)) {</div><div class='add'>+	if (err || (reg &amp; ~RNG_SR_DRDY)) {</div><div class='ctx'> 		clk_disable_unprepare(priv-&gt;clk);</div><div class='ctx'> 		dev_err((struct device *)priv-&gt;rng.priv,</div><div class='ctx'> 			"%s: timeout:%x SR: %x!\n", __func__, err, reg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -384,6 +389,11 @@ static int __maybe_unused stm32_rng_runtime_suspend(struct device *dev)</div><div class='ctx'> static int __maybe_unused stm32_rng_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_rng_private *priv = dev_get_drvdata(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;data-&gt;has_cond_reset) {</div><div class='ctx'> 		priv-&gt;pm_conf.nscr = readl_relaxed(priv-&gt;base + RNG_NSCR);</div><div class='hunk'>@@ -465,6 +475,8 @@ static int __maybe_unused stm32_rng_resume(struct device *dev)</div><div class='ctx'> 		writel_relaxed(reg, priv-&gt;base + RNG_CR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig<br/>index 927088b2c3d3..e63a6a17793c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/Kconfig</a></div><div class='hunk'>@@ -27,6 +27,20 @@ menuconfig TCG_TPM</div><div class='ctx'> </div><div class='ctx'> if TCG_TPM</div><div class='ctx'> </div><div class='add'>+config TCG_TPM2_HMAC</div><div class='add'>+	bool "Use HMAC and encrypted transactions on the TPM bus"</div><div class='add'>+	default y</div><div class='add'>+	select CRYPTO_ECDH</div><div class='add'>+	select CRYPTO_LIB_AESCFB</div><div class='add'>+	select CRYPTO_LIB_SHA256</div><div class='add'>+	help</div><div class='add'>+	  Setting this causes us to deploy a scheme which uses request</div><div class='add'>+	  and response HMACs in addition to encryption for</div><div class='add'>+	  communicating with the TPM to prevent or detect bus snooping</div><div class='add'>+	  and interposer attacks (see tpm-security.rst).  Saying Y</div><div class='add'>+	  here adds some encryption overhead to all kernel to TPM</div><div class='add'>+	  transactions.</div><div class='add'>+</div><div class='ctx'> config HW_RANDOM_TPM</div><div class='ctx'> 	bool "TPM HW Random Number Generator support"</div><div class='ctx'> 	depends on TCG_TPM &amp;&amp; HW_RANDOM &amp;&amp; !(TCG_TPM=y &amp;&amp; HW_RANDOM=m)</div><div class='hunk'>@@ -149,6 +163,7 @@ config TCG_NSC</div><div class='ctx'> config TCG_ATMEL</div><div class='ctx'> 	tristate "Atmel TPM Interface"</div><div class='ctx'> 	depends on PPC64 || HAS_IOPORT_MAP</div><div class='add'>+	depends on HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you have a TPM security chip from Atmel say Yes and it </div><div class='ctx'> 	  will be accessible from within Linux.  To compile this driver </div><div class='hunk'>@@ -156,7 +171,7 @@ config TCG_ATMEL</div><div class='ctx'> </div><div class='ctx'> config TCG_INFINEON</div><div class='ctx'> 	tristate "Infineon Technologies TPM Interface"</div><div class='del'>-	depends on PNP</div><div class='add'>+	depends on PNP || COMPILE_TEST</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you have a TPM security chip from Infineon Technologies</div><div class='ctx'> 	  (either SLD 9630 TT 1.1 or SLB 9635 TT 1.2) say Yes and it</div><div class='head'>diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile<br/>index 0222b1ddb310..4c695b0388f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/Makefile</a></div><div class='hunk'>@@ -15,7 +15,9 @@ tpm-y += tpm-sysfs.o</div><div class='ctx'> tpm-y += eventlog/common.o</div><div class='ctx'> tpm-y += eventlog/tpm1.o</div><div class='ctx'> tpm-y += eventlog/tpm2.o</div><div class='add'>+tpm-y += tpm-buf.o</div><div class='ctx'> </div><div class='add'>+tpm-$(CONFIG_TCG_TPM2_HMAC) += tpm2-sessions.o</div><div class='ctx'> tpm-$(CONFIG_ACPI) += tpm_ppi.o eventlog/acpi.o</div><div class='ctx'> tpm-$(CONFIG_EFI) += eventlog/efi.o</div><div class='ctx'> tpm-$(CONFIG_OF) += eventlog/of.o</div><div class='head'>diff --git a/drivers/char/tpm/eventlog/acpi.c b/drivers/char/tpm/eventlog/acpi.c<br/>index bd757d836c5c..69533d0bfb51 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/eventlog/acpi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/eventlog/acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/eventlog/acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/eventlog/acpi.c</a></div><div class='hunk'>@@ -142,7 +142,6 @@ int tpm_read_log_acpi(struct tpm_chip *chip)</div><div class='ctx'> </div><div class='ctx'> 	log-&gt;bios_event_log_end = log-&gt;bios_event_log + len;</div><div class='ctx'> </div><div class='del'>-	ret = -EIO;</div><div class='ctx'> 	virt = acpi_os_map_iomem(start, len);</div><div class='ctx'> 	if (!virt) {</div><div class='ctx'> 		dev_warn(&amp;chip-&gt;dev, "%s: Failed to map ACPI memory\n", __func__);</div><div class='head'>diff --git a/drivers/char/tpm/tpm-buf.c b/drivers/char/tpm/tpm-buf.c<br/>new file mode 100644<br/>index 000000000000..647c6ca92ac3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-buf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm-buf.c</a></div><div class='hunk'>@@ -0,0 +1,252 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Handling of TPM command and other buffers.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/tpm_command.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/tpm.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_init() - Allocate and initialize a TPM command</div><div class='add'>+ * @buf:	A &amp;tpm_buf</div><div class='add'>+ * @tag:	TPM_TAG_RQU_COMMAND, TPM2_ST_NO_SESSIONS or TPM2_ST_SESSIONS</div><div class='add'>+ * @ordinal:	A command ordinal</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or -ENOMEM</div><div class='add'>+ */</div><div class='add'>+int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal)</div><div class='add'>+{</div><div class='add'>+	buf-&gt;data = (u8 *)__get_free_page(GFP_KERNEL);</div><div class='add'>+	if (!buf-&gt;data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tpm_buf_reset(buf, tag, ordinal);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_init);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_reset() - Initialize a TPM command</div><div class='add'>+ * @buf:	A &amp;tpm_buf</div><div class='add'>+ * @tag:	TPM_TAG_RQU_COMMAND, TPM2_ST_NO_SESSIONS or TPM2_ST_SESSIONS</div><div class='add'>+ * @ordinal:	A command ordinal</div><div class='add'>+ */</div><div class='add'>+void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal)</div><div class='add'>+{</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+</div><div class='add'>+	WARN_ON(tag != TPM_TAG_RQU_COMMAND &amp;&amp; tag != TPM2_ST_NO_SESSIONS &amp;&amp;</div><div class='add'>+		tag != TPM2_ST_SESSIONS &amp;&amp; tag != 0);</div><div class='add'>+</div><div class='add'>+	buf-&gt;flags = 0;</div><div class='add'>+	buf-&gt;length = sizeof(*head);</div><div class='add'>+	head-&gt;tag = cpu_to_be16(tag);</div><div class='add'>+	head-&gt;length = cpu_to_be32(sizeof(*head));</div><div class='add'>+	head-&gt;ordinal = cpu_to_be32(ordinal);</div><div class='add'>+	buf-&gt;handles = 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_reset);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_init_sized() - Allocate and initialize a sized (TPM2B) buffer</div><div class='add'>+ * @buf:	A @tpm_buf</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or -ENOMEM</div><div class='add'>+ */</div><div class='add'>+int tpm_buf_init_sized(struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	buf-&gt;data = (u8 *)__get_free_page(GFP_KERNEL);</div><div class='add'>+	if (!buf-&gt;data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tpm_buf_reset_sized(buf);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_init_sized);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_reset_sized() - Initialize a sized buffer</div><div class='add'>+ * @buf:	A &amp;tpm_buf</div><div class='add'>+ */</div><div class='add'>+void tpm_buf_reset_sized(struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	buf-&gt;flags = TPM_BUF_TPM2B;</div><div class='add'>+	buf-&gt;length = 2;</div><div class='add'>+	buf-&gt;data[0] = 0;</div><div class='add'>+	buf-&gt;data[1] = 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_reset_sized);</div><div class='add'>+</div><div class='add'>+void tpm_buf_destroy(struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	free_page((unsigned long)buf-&gt;data);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_destroy);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_length() - Return the number of bytes consumed by the data</div><div class='add'>+ * @buf:	A &amp;tpm_buf</div><div class='add'>+ *</div><div class='add'>+ * Return: The number of bytes consumed by the buffer</div><div class='add'>+ */</div><div class='add'>+u32 tpm_buf_length(struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	return buf-&gt;length;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_length);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_append() - Append data to an initialized buffer</div><div class='add'>+ * @buf:	A &amp;tpm_buf</div><div class='add'>+ * @new_data:	A data blob</div><div class='add'>+ * @new_length:	Size of the appended data</div><div class='add'>+ */</div><div class='add'>+void tpm_buf_append(struct tpm_buf *buf, const u8 *new_data, u16 new_length)</div><div class='add'>+{</div><div class='add'>+	/* Return silently if overflow has already happened. */</div><div class='add'>+	if (buf-&gt;flags &amp; TPM_BUF_OVERFLOW)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if ((buf-&gt;length + new_length) &gt; PAGE_SIZE) {</div><div class='add'>+		WARN(1, "tpm_buf: write overflow\n");</div><div class='add'>+		buf-&gt;flags |= TPM_BUF_OVERFLOW;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;buf-&gt;data[buf-&gt;length], new_data, new_length);</div><div class='add'>+	buf-&gt;length += new_length;</div><div class='add'>+</div><div class='add'>+	if (buf-&gt;flags &amp; TPM_BUF_TPM2B)</div><div class='add'>+		((__be16 *)buf-&gt;data)[0] = cpu_to_be16(buf-&gt;length - 2);</div><div class='add'>+	else</div><div class='add'>+		((struct tpm_header *)buf-&gt;data)-&gt;length = cpu_to_be32(buf-&gt;length);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_append);</div><div class='add'>+</div><div class='add'>+void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value)</div><div class='add'>+{</div><div class='add'>+	tpm_buf_append(buf, &amp;value, 1);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_append_u8);</div><div class='add'>+</div><div class='add'>+void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value)</div><div class='add'>+{</div><div class='add'>+	__be16 value2 = cpu_to_be16(value);</div><div class='add'>+</div><div class='add'>+	tpm_buf_append(buf, (u8 *)&amp;value2, 2);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_append_u16);</div><div class='add'>+</div><div class='add'>+void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value)</div><div class='add'>+{</div><div class='add'>+	__be32 value2 = cpu_to_be32(value);</div><div class='add'>+</div><div class='add'>+	tpm_buf_append(buf, (u8 *)&amp;value2, 4);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_append_u32);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_read() - Read from a TPM buffer</div><div class='add'>+ * @buf:	&amp;tpm_buf instance</div><div class='add'>+ * @offset:	offset within the buffer</div><div class='add'>+ * @count:	the number of bytes to read</div><div class='add'>+ * @output:	the output buffer</div><div class='add'>+ */</div><div class='add'>+static void tpm_buf_read(struct tpm_buf *buf, off_t *offset, size_t count, void *output)</div><div class='add'>+{</div><div class='add'>+	off_t next_offset;</div><div class='add'>+</div><div class='add'>+	/* Return silently if overflow has already happened. */</div><div class='add'>+	if (buf-&gt;flags &amp; TPM_BUF_BOUNDARY_ERROR)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	next_offset = *offset + count;</div><div class='add'>+	if (next_offset &gt; buf-&gt;length) {</div><div class='add'>+		WARN(1, "tpm_buf: read out of boundary\n");</div><div class='add'>+		buf-&gt;flags |= TPM_BUF_BOUNDARY_ERROR;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(output, &amp;buf-&gt;data[*offset], count);</div><div class='add'>+	*offset = next_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_read_u8() - Read 8-bit word from a TPM buffer</div><div class='add'>+ * @buf:	&amp;tpm_buf instance</div><div class='add'>+ * @offset:	offset within the buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: next 8-bit word</div><div class='add'>+ */</div><div class='add'>+u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset)</div><div class='add'>+{</div><div class='add'>+	u8 value;</div><div class='add'>+</div><div class='add'>+	tpm_buf_read(buf, offset, sizeof(value), &amp;value);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_read_u8);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_read_u16() - Read 16-bit word from a TPM buffer</div><div class='add'>+ * @buf:	&amp;tpm_buf instance</div><div class='add'>+ * @offset:	offset within the buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: next 16-bit word</div><div class='add'>+ */</div><div class='add'>+u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset)</div><div class='add'>+{</div><div class='add'>+	u16 value;</div><div class='add'>+</div><div class='add'>+	tpm_buf_read(buf, offset, sizeof(value), &amp;value);</div><div class='add'>+</div><div class='add'>+	return be16_to_cpu(value);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_read_u16);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_read_u32() - Read 32-bit word from a TPM buffer</div><div class='add'>+ * @buf:	&amp;tpm_buf instance</div><div class='add'>+ * @offset:	offset within the buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: next 32-bit word</div><div class='add'>+ */</div><div class='add'>+u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	tpm_buf_read(buf, offset, sizeof(value), &amp;value);</div><div class='add'>+</div><div class='add'>+	return be32_to_cpu(value);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tpm_buf_read_u32);</div><div class='add'>+</div><div class='add'>+static u16 tpm_buf_tag(struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+</div><div class='add'>+	return be16_to_cpu(head-&gt;tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_parameters - return the TPM response parameters area of the tpm_buf</div><div class='add'>+ * @buf: tpm_buf to use</div><div class='add'>+ *</div><div class='add'>+ * Where the parameters are located depends on the tag of a TPM</div><div class='add'>+ * command (it's immediately after the header for TPM_ST_NO_SESSIONS</div><div class='add'>+ * or 4 bytes after for TPM_ST_SESSIONS). Evaluate this and return a</div><div class='add'>+ * pointer to the first byte of the parameters area.</div><div class='add'>+ *</div><div class='add'>+ * @return: pointer to parameters area</div><div class='add'>+ */</div><div class='add'>+u8 *tpm_buf_parameters(struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	int offset = TPM_HEADER_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tpm_buf_tag(buf) == TPM2_ST_SESSIONS)</div><div class='add'>+		offset += 4;</div><div class='add'>+</div><div class='add'>+	return &amp;buf-&gt;data[offset];</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c<br/>index 42b1062e33cd..854546000c92 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-chip.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-chip.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-chip.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm-chip.c</a></div><div class='hunk'>@@ -158,6 +158,9 @@ int tpm_try_get_ops(struct tpm_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = -EIO;</div><div class='ctx'> </div><div class='add'>+	if (chip-&gt;flags &amp; TPM_CHIP_FLAG_DISABLE)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='ctx'> 	get_device(&amp;chip-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;chip-&gt;ops_sem);</div><div class='hunk'>@@ -275,6 +278,9 @@ static void tpm_dev_release(struct device *dev)</div><div class='ctx'> 	kfree(chip-&gt;work_space.context_buf);</div><div class='ctx'> 	kfree(chip-&gt;work_space.session_buf);</div><div class='ctx'> 	kfree(chip-&gt;allocated_banks);</div><div class='add'>+#ifdef CONFIG_TCG_TPM2_HMAC</div><div class='add'>+	kfree(chip-&gt;auth);</div><div class='add'>+#endif</div><div class='ctx'> 	kfree(chip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c<br/>index 757336324c90..5da134f12c9a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-interface.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-interface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-interface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm-interface.c</a></div><div class='hunk'>@@ -232,6 +232,7 @@ ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,</div><div class='ctx'> 	if (len &lt; min_rsp_body_length + TPM_HEADER_SIZE)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='add'>+	buf-&gt;length = len;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(tpm_transmit_cmd);</div><div class='hunk'>@@ -342,31 +343,6 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(tpm_pcr_extend);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * tpm_send - send a TPM command</div><div class='del'>- * @chip:	a &amp;struct tpm_chip instance, %NULL for the default chip</div><div class='del'>- * @cmd:	a TPM command buffer</div><div class='del'>- * @buflen:	the length of the TPM command buffer</div><div class='del'>- *</div><div class='del'>- * Return: same as with tpm_transmit_cmd()</div><div class='del'>- */</div><div class='del'>-int tpm_send(struct tpm_chip *chip, void *cmd, size_t buflen)</div><div class='del'>-{</div><div class='del'>-	struct tpm_buf buf;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	chip = tpm_find_get_ops(chip);</div><div class='del'>-	if (!chip)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	buf.data = cmd;</div><div class='del'>-	rc = tpm_transmit_cmd(chip, &amp;buf, 0, "attempting to a send a command");</div><div class='del'>-</div><div class='del'>-	tpm_put_ops(chip);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(tpm_send);</div><div class='del'>-</div><div class='ctx'> int tpm_auto_startup(struct tpm_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='head'>diff --git a/drivers/char/tpm/tpm-sysfs.c b/drivers/char/tpm/tpm-sysfs.c<br/>index 54c71473aa29..94231f052ea7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm-sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm-sysfs.c</a></div><div class='hunk'>@@ -309,6 +309,21 @@ static ssize_t tpm_version_major_show(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(tpm_version_major);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_TCG_TPM2_HMAC</div><div class='add'>+static ssize_t null_name_show(struct device *dev, struct device_attribute *attr,</div><div class='add'>+			      char *buf)</div><div class='add'>+{</div><div class='add'>+	struct tpm_chip *chip = to_tpm_chip(dev);</div><div class='add'>+	int size = TPM2_NAME_SIZE;</div><div class='add'>+</div><div class='add'>+	bin2hex(buf, chip-&gt;null_key_name, size);</div><div class='add'>+	size *= 2;</div><div class='add'>+	buf[size++] = '\n';</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(null_name);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct attribute *tpm1_dev_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_pubek.attr,</div><div class='ctx'> 	&amp;dev_attr_pcrs.attr,</div><div class='hunk'>@@ -326,6 +341,9 @@ static struct attribute *tpm1_dev_attrs[] = {</div><div class='ctx'> </div><div class='ctx'> static struct attribute *tpm2_dev_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_tpm_version_major.attr,</div><div class='add'>+#ifdef CONFIG_TCG_TPM2_HMAC</div><div class='add'>+	&amp;dev_attr_null_name.attr,</div><div class='add'>+#endif</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h<br/>index 61445f1dc46d..6b8b9956ba69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm.h</a></div><div class='hunk'>@@ -312,9 +312,23 @@ int tpm2_commit_space(struct tpm_chip *chip, struct tpm_space *space, void *buf,</div><div class='ctx'> 		      size_t *bufsiz);</div><div class='ctx'> int tpm_devs_add(struct tpm_chip *chip);</div><div class='ctx'> void tpm_devs_remove(struct tpm_chip *chip);</div><div class='add'>+int tpm2_save_context(struct tpm_chip *chip, u32 handle, u8 *buf,</div><div class='add'>+		      unsigned int buf_size, unsigned int *offset);</div><div class='add'>+int tpm2_load_context(struct tpm_chip *chip, u8 *buf,</div><div class='add'>+		      unsigned int *offset, u32 *handle);</div><div class='ctx'> </div><div class='ctx'> void tpm_bios_log_setup(struct tpm_chip *chip);</div><div class='ctx'> void tpm_bios_log_teardown(struct tpm_chip *chip);</div><div class='ctx'> int tpm_dev_common_init(void);</div><div class='ctx'> void tpm_dev_common_exit(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TCG_TPM2_HMAC</div><div class='add'>+int tpm2_sessions_init(struct tpm_chip *chip);</div><div class='add'>+#else</div><div class='add'>+static inline int tpm2_sessions_init(struct tpm_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c<br/>index 93545be190a5..0cdf892ec2a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-cmd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm2-cmd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-cmd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm2-cmd.c</a></div><div class='hunk'>@@ -216,13 +216,6 @@ out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct tpm2_null_auth_area {</div><div class='del'>-	__be32  handle;</div><div class='del'>-	__be16  nonce_size;</div><div class='del'>-	u8  attributes;</div><div class='del'>-	__be16  auth_size;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * tpm2_pcr_extend() - extend a PCR value</div><div class='ctx'>  *</div><div class='hunk'>@@ -236,24 +229,22 @@ int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,</div><div class='ctx'> 		    struct tpm_digest *digests)</div><div class='ctx'> {</div><div class='ctx'> 	struct tpm_buf buf;</div><div class='del'>-	struct tpm2_null_auth_area auth_area;</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	rc = tpm_buf_init(&amp;buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND);</div><div class='add'>+	rc = tpm2_start_auth_session(chip);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	tpm_buf_append_u32(&amp;buf, pcr_idx);</div><div class='add'>+	rc = tpm_buf_init(&amp;buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND);</div><div class='add'>+	if (rc) {</div><div class='add'>+		tpm2_end_auth_session(chip);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	auth_area.handle = cpu_to_be32(TPM2_RS_PW);</div><div class='del'>-	auth_area.nonce_size = 0;</div><div class='del'>-	auth_area.attributes = 0;</div><div class='del'>-	auth_area.auth_size = 0;</div><div class='add'>+	tpm_buf_append_name(chip, &amp;buf, pcr_idx, NULL);</div><div class='add'>+	tpm_buf_append_hmac_session(chip, &amp;buf, 0, NULL, 0);</div><div class='ctx'> </div><div class='del'>-	tpm_buf_append_u32(&amp;buf, sizeof(struct tpm2_null_auth_area));</div><div class='del'>-	tpm_buf_append(&amp;buf, (const unsigned char *)&amp;auth_area,</div><div class='del'>-		       sizeof(auth_area));</div><div class='ctx'> 	tpm_buf_append_u32(&amp;buf, chip-&gt;nr_allocated_banks);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; chip-&gt;nr_allocated_banks; i++) {</div><div class='hunk'>@@ -262,7 +253,9 @@ int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,</div><div class='ctx'> 			       chip-&gt;allocated_banks[i].digest_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	tpm_buf_fill_hmac_session(chip, &amp;buf);</div><div class='ctx'> 	rc = tpm_transmit_cmd(chip, &amp;buf, 0, "attempting extend a PCR value");</div><div class='add'>+	rc = tpm_buf_check_hmac_response(chip, &amp;buf, rc);</div><div class='ctx'> </div><div class='ctx'> 	tpm_buf_destroy(&amp;buf);</div><div class='ctx'> </div><div class='hunk'>@@ -299,25 +292,35 @@ int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max)</div><div class='ctx'> 	if (!num_bytes || max &gt; TPM_MAX_RNG_DATA)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	err = tpm_buf_init(&amp;buf, 0, 0);</div><div class='add'>+	err = tpm2_start_auth_session(chip);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = tpm_buf_init(&amp;buf, 0, 0);</div><div class='add'>+	if (err) {</div><div class='add'>+		tpm2_end_auth_session(chip);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	do {</div><div class='del'>-		tpm_buf_reset(&amp;buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_RANDOM);</div><div class='add'>+		tpm_buf_reset(&amp;buf, TPM2_ST_SESSIONS, TPM2_CC_GET_RANDOM);</div><div class='add'>+		tpm_buf_append_hmac_session_opt(chip, &amp;buf, TPM2_SA_ENCRYPT</div><div class='add'>+						| TPM2_SA_CONTINUE_SESSION,</div><div class='add'>+						NULL, 0);</div><div class='ctx'> 		tpm_buf_append_u16(&amp;buf, num_bytes);</div><div class='add'>+		tpm_buf_fill_hmac_session(chip, &amp;buf);</div><div class='ctx'> 		err = tpm_transmit_cmd(chip, &amp;buf,</div><div class='ctx'> 				       offsetof(struct tpm2_get_random_out,</div><div class='ctx'> 						buffer),</div><div class='ctx'> 				       "attempting get random");</div><div class='add'>+		err = tpm_buf_check_hmac_response(chip, &amp;buf, err);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			if (err &gt; 0)</div><div class='ctx'> 				err = -EIO;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		out = (struct tpm2_get_random_out *)</div><div class='del'>-			&amp;buf.data[TPM_HEADER_SIZE];</div><div class='add'>+		out = (struct tpm2_get_random_out *)tpm_buf_parameters(&amp;buf);</div><div class='ctx'> 		recd = min_t(u32, be16_to_cpu(out-&gt;size), num_bytes);</div><div class='ctx'> 		if (tpm_buf_length(&amp;buf) &lt;</div><div class='ctx'> 		    TPM_HEADER_SIZE +</div><div class='hunk'>@@ -334,9 +337,12 @@ int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max)</div><div class='ctx'> 	} while (retries-- &amp;&amp; total &lt; max);</div><div class='ctx'> </div><div class='ctx'> 	tpm_buf_destroy(&amp;buf);</div><div class='add'>+	tpm2_end_auth_session(chip);</div><div class='add'>+</div><div class='ctx'> 	return total ? total : -EIO;</div><div class='ctx'> out:</div><div class='ctx'> 	tpm_buf_destroy(&amp;buf);</div><div class='add'>+	tpm2_end_auth_session(chip);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -759,6 +765,11 @@ int tpm2_auto_startup(struct tpm_chip *chip)</div><div class='ctx'> 		rc = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = tpm2_sessions_init(chip);</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Infineon TPM in field upgrade mode will return no data for the number</div><div class='head'>diff --git a/drivers/char/tpm/tpm2-sessions.c b/drivers/char/tpm/tpm2-sessions.c<br/>new file mode 100644<br/>index 000000000000..ea8860661876<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-sessions.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm2-sessions.c</a></div><div class='hunk'>@@ -0,0 +1,1286 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2018 James.Bottomley@HansenPartnership.com</div><div class='add'>+ *</div><div class='add'>+ * Cryptographic helper routines for handling TPM2 sessions for</div><div class='add'>+ * authorization HMAC and request response encryption.</div><div class='add'>+ *</div><div class='add'>+ * The idea is to ensure that every TPM command is HMAC protected by a</div><div class='add'>+ * session, meaning in-flight tampering would be detected and in</div><div class='add'>+ * addition all sensitive inputs and responses should be encrypted.</div><div class='add'>+ *</div><div class='add'>+ * The basic way this works is to use a TPM feature called salted</div><div class='add'>+ * sessions where a random secret used in session construction is</div><div class='add'>+ * encrypted to the public part of a known TPM key.  The problem is we</div><div class='add'>+ * have no known keys, so initially a primary Elliptic Curve key is</div><div class='add'>+ * derived from the NULL seed (we use EC because most TPMs generate</div><div class='add'>+ * these keys much faster than RSA ones).  The curve used is NIST_P256</div><div class='add'>+ * because that's now mandated to be present in 'TCG TPM v2.0</div><div class='add'>+ * Provisioning Guidance'</div><div class='add'>+ *</div><div class='add'>+ * Threat problems: the initial TPM2_CreatePrimary is not (and cannot</div><div class='add'>+ * be) session protected, so a clever Man in the Middle could return a</div><div class='add'>+ * public key they control to this command and from there intercept</div><div class='add'>+ * and decode all subsequent session based transactions.  The kernel</div><div class='add'>+ * cannot mitigate this threat but, after boot, userspace can get</div><div class='add'>+ * proof this has not happened by asking the TPM to certify the NULL</div><div class='add'>+ * key.  This certification would chain back to the TPM Endorsement</div><div class='add'>+ * Certificate and prove the NULL seed primary had not been tampered</div><div class='add'>+ * with and thus all sessions must have been cryptographically secure.</div><div class='add'>+ * To assist with this, the initial NULL seed public key name is made</div><div class='add'>+ * available in a sysfs file.</div><div class='add'>+ *</div><div class='add'>+ * Use of these functions:</div><div class='add'>+ *</div><div class='add'>+ * The design is all the crypto, hash and hmac gunk is confined in this</div><div class='add'>+ * file and never needs to be seen even by the kernel internal user.  To</div><div class='add'>+ * the user there's an init function tpm2_sessions_init() that needs to</div><div class='add'>+ * be called once per TPM which generates the NULL seed primary key.</div><div class='add'>+ *</div><div class='add'>+ * These are the usage functions:</div><div class='add'>+ *</div><div class='add'>+ * tpm2_start_auth_session() which allocates the opaque auth structure</div><div class='add'>+ *	and gets a session from the TPM.  This must be called before</div><div class='add'>+ *	any of the following functions.  The session is protected by a</div><div class='add'>+ *	session_key which is derived from a random salt value</div><div class='add'>+ *	encrypted to the NULL seed.</div><div class='add'>+ * tpm2_end_auth_session() kills the session and frees the resources.</div><div class='add'>+ *	Under normal operation this function is done by</div><div class='add'>+ *	tpm_buf_check_hmac_response(), so this is only to be used on</div><div class='add'>+ *	error legs where the latter is not executed.</div><div class='add'>+ * tpm_buf_append_name() to add a handle to the buffer.  This must be</div><div class='add'>+ *	used in place of the usual tpm_buf_append_u32() for adding</div><div class='add'>+ *	handles because handles have to be processed specially when</div><div class='add'>+ *	calculating the HMAC.  In particular, for NV, volatile and</div><div class='add'>+ *	permanent objects you now need to provide the name.</div><div class='add'>+ * tpm_buf_append_hmac_session() which appends the hmac session to the</div><div class='add'>+ *	buf in the same way tpm_buf_append_auth does().</div><div class='add'>+ * tpm_buf_fill_hmac_session() This calculates the correct hash and</div><div class='add'>+ *	places it in the buffer.  It must be called after the complete</div><div class='add'>+ *	command buffer is finalized so it can fill in the correct HMAC</div><div class='add'>+ *	based on the parameters.</div><div class='add'>+ * tpm_buf_check_hmac_response() which checks the session response in</div><div class='add'>+ *	the buffer and calculates what it should be.  If there's a</div><div class='add'>+ *	mismatch it will log a warning and return an error.  If</div><div class='add'>+ *	tpm_buf_append_hmac_session() did not specify</div><div class='add'>+ *	TPM_SA_CONTINUE_SESSION then the session will be closed (if it</div><div class='add'>+ *	hasn't been consumed) and the auth structure freed.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "tpm.h"</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='add'>+#include &lt;crypto/kpp.h&gt;</div><div class='add'>+#include &lt;crypto/ecdh.h&gt;</div><div class='add'>+#include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;crypto/hmac.h&gt;</div><div class='add'>+</div><div class='add'>+/* maximum number of names the TPM must remember for authorization */</div><div class='add'>+#define AUTH_MAX_NAMES	3</div><div class='add'>+</div><div class='add'>+static int tpm2_create_primary(struct tpm_chip *chip, u32 hierarchy,</div><div class='add'>+			       u32 *handle, u8 *name);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is the structure that carries all the auth information (like</div><div class='add'>+ * session handle, nonces, session key and auth) from use to use it is</div><div class='add'>+ * designed to be opaque to anything outside.</div><div class='add'>+ */</div><div class='add'>+struct tpm2_auth {</div><div class='add'>+	u32 handle;</div><div class='add'>+	/*</div><div class='add'>+	 * This has two meanings: before tpm_buf_fill_hmac_session()</div><div class='add'>+	 * it marks the offset in the buffer of the start of the</div><div class='add'>+	 * sessions (i.e. after all the handles).  Once the buffer has</div><div class='add'>+	 * been filled it markes the session number of our auth</div><div class='add'>+	 * session so we can find it again in the response buffer.</div><div class='add'>+	 *</div><div class='add'>+	 * The two cases are distinguished because the first offset</div><div class='add'>+	 * must always be greater than TPM_HEADER_SIZE and the second</div><div class='add'>+	 * must be less than or equal to 5.</div><div class='add'>+	 */</div><div class='add'>+	u32 session;</div><div class='add'>+	/*</div><div class='add'>+	 * the size here is variable and set by the size of our_nonce</div><div class='add'>+	 * which must be between 16 and the name hash length. we set</div><div class='add'>+	 * the maximum sha256 size for the greatest protection</div><div class='add'>+	 */</div><div class='add'>+	u8 our_nonce[SHA256_DIGEST_SIZE];</div><div class='add'>+	u8 tpm_nonce[SHA256_DIGEST_SIZE];</div><div class='add'>+	/*</div><div class='add'>+	 * the salt is only used across the session command/response</div><div class='add'>+	 * after that it can be used as a scratch area</div><div class='add'>+	 */</div><div class='add'>+	union {</div><div class='add'>+		u8 salt[EC_PT_SZ];</div><div class='add'>+		/* scratch for key + IV */</div><div class='add'>+		u8 scratch[AES_KEY_BYTES + AES_BLOCK_SIZE];</div><div class='add'>+	};</div><div class='add'>+	/*</div><div class='add'>+	 * the session key and passphrase are the same size as the</div><div class='add'>+	 * name digest (sha256 again).  The session key is constant</div><div class='add'>+	 * for the use of the session and the passphrase can change</div><div class='add'>+	 * with every invocation.</div><div class='add'>+	 *</div><div class='add'>+	 * Note: these fields must be adjacent and in this order</div><div class='add'>+	 * because several HMAC/KDF schemes use the combination of the</div><div class='add'>+	 * session_key and passphrase.</div><div class='add'>+	 */</div><div class='add'>+	u8 session_key[SHA256_DIGEST_SIZE];</div><div class='add'>+	u8 passphrase[SHA256_DIGEST_SIZE];</div><div class='add'>+	int passphrase_len;</div><div class='add'>+	struct crypto_aes_ctx aes_ctx;</div><div class='add'>+	/* saved session attributes: */</div><div class='add'>+	u8 attrs;</div><div class='add'>+	__be32 ordinal;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * memory for three authorization handles.  We know them by</div><div class='add'>+	 * handle, but they are part of the session by name, which</div><div class='add'>+	 * we must compute and remember</div><div class='add'>+	 */</div><div class='add'>+	u32 name_h[AUTH_MAX_NAMES];</div><div class='add'>+	u8 name[AUTH_MAX_NAMES][2 + SHA512_DIGEST_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Name Size based on TPM algorithm (assumes no hash bigger than 255)</div><div class='add'>+ */</div><div class='add'>+static u8 name_size(const u8 *name)</div><div class='add'>+{</div><div class='add'>+	static u8 size_map[] = {</div><div class='add'>+		[TPM_ALG_SHA1] = SHA1_DIGEST_SIZE,</div><div class='add'>+		[TPM_ALG_SHA256] = SHA256_DIGEST_SIZE,</div><div class='add'>+		[TPM_ALG_SHA384] = SHA384_DIGEST_SIZE,</div><div class='add'>+		[TPM_ALG_SHA512] = SHA512_DIGEST_SIZE,</div><div class='add'>+	};</div><div class='add'>+	u16 alg = get_unaligned_be16(name);</div><div class='add'>+	return size_map[alg] + 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * It turns out the crypto hmac(sha256) is hard for us to consume</div><div class='add'>+ * because it assumes a fixed key and the TPM seems to change the key</div><div class='add'>+ * on every operation, so we weld the hmac init and final functions in</div><div class='add'>+ * here to give it the same usage characteristics as a regular hash</div><div class='add'>+ */</div><div class='add'>+static void tpm2_hmac_init(struct sha256_state *sctx, u8 *key, u32 key_len)</div><div class='add'>+{</div><div class='add'>+	u8 pad[SHA256_BLOCK_SIZE];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	sha256_init(sctx);</div><div class='add'>+	for (i = 0; i &lt; sizeof(pad); i++) {</div><div class='add'>+		if (i &lt; key_len)</div><div class='add'>+			pad[i] = key[i];</div><div class='add'>+		else</div><div class='add'>+			pad[i] = 0;</div><div class='add'>+		pad[i] ^= HMAC_IPAD_VALUE;</div><div class='add'>+	}</div><div class='add'>+	sha256_update(sctx, pad, sizeof(pad));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tpm2_hmac_final(struct sha256_state *sctx, u8 *key, u32 key_len,</div><div class='add'>+			    u8 *out)</div><div class='add'>+{</div><div class='add'>+	u8 pad[SHA256_BLOCK_SIZE];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(pad); i++) {</div><div class='add'>+		if (i &lt; key_len)</div><div class='add'>+			pad[i] = key[i];</div><div class='add'>+		else</div><div class='add'>+			pad[i] = 0;</div><div class='add'>+		pad[i] ^= HMAC_OPAD_VALUE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* collect the final hash;  use out as temporary storage */</div><div class='add'>+	sha256_final(sctx, out);</div><div class='add'>+</div><div class='add'>+	sha256_init(sctx);</div><div class='add'>+	sha256_update(sctx, pad, sizeof(pad));</div><div class='add'>+	sha256_update(sctx, out, SHA256_DIGEST_SIZE);</div><div class='add'>+	sha256_final(sctx, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * assume hash sha256 and nonces u, v of size SHA256_DIGEST_SIZE but</div><div class='add'>+ * otherwise standard tpm2_KDFa.  Note output is in bytes not bits.</div><div class='add'>+ */</div><div class='add'>+static void tpm2_KDFa(u8 *key, u32 key_len, const char *label, u8 *u,</div><div class='add'>+		      u8 *v, u32 bytes, u8 *out)</div><div class='add'>+{</div><div class='add'>+	u32 counter = 1;</div><div class='add'>+	const __be32 bits = cpu_to_be32(bytes * 8);</div><div class='add'>+</div><div class='add'>+	while (bytes &gt; 0) {</div><div class='add'>+		struct sha256_state sctx;</div><div class='add'>+		__be32 c = cpu_to_be32(counter);</div><div class='add'>+</div><div class='add'>+		tpm2_hmac_init(&amp;sctx, key, key_len);</div><div class='add'>+		sha256_update(&amp;sctx, (u8 *)&amp;c, sizeof(c));</div><div class='add'>+		sha256_update(&amp;sctx, label, strlen(label)+1);</div><div class='add'>+		sha256_update(&amp;sctx, u, SHA256_DIGEST_SIZE);</div><div class='add'>+		sha256_update(&amp;sctx, v, SHA256_DIGEST_SIZE);</div><div class='add'>+		sha256_update(&amp;sctx, (u8 *)&amp;bits, sizeof(bits));</div><div class='add'>+		tpm2_hmac_final(&amp;sctx, key, key_len, out);</div><div class='add'>+</div><div class='add'>+		bytes -= SHA256_DIGEST_SIZE;</div><div class='add'>+		counter++;</div><div class='add'>+		out += SHA256_DIGEST_SIZE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Somewhat of a bastardization of the real KDFe.  We're assuming</div><div class='add'>+ * we're working with known point sizes for the input parameters and</div><div class='add'>+ * the hash algorithm is fixed at sha256.  Because we know that the</div><div class='add'>+ * point size is 32 bytes like the hash size, there's no need to loop</div><div class='add'>+ * in this KDF.</div><div class='add'>+ */</div><div class='add'>+static void tpm2_KDFe(u8 z[EC_PT_SZ], const char *str, u8 *pt_u, u8 *pt_v,</div><div class='add'>+		      u8 *out)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state sctx;</div><div class='add'>+	/*</div><div class='add'>+	 * this should be an iterative counter, but because we know</div><div class='add'>+	 *  we're only taking 32 bytes for the point using a sha256</div><div class='add'>+	 *  hash which is also 32 bytes, there's only one loop</div><div class='add'>+	 */</div><div class='add'>+	__be32 c = cpu_to_be32(1);</div><div class='add'>+</div><div class='add'>+	sha256_init(&amp;sctx);</div><div class='add'>+	/* counter (BE) */</div><div class='add'>+	sha256_update(&amp;sctx, (u8 *)&amp;c, sizeof(c));</div><div class='add'>+	/* secret value */</div><div class='add'>+	sha256_update(&amp;sctx, z, EC_PT_SZ);</div><div class='add'>+	/* string including trailing zero */</div><div class='add'>+	sha256_update(&amp;sctx, str, strlen(str)+1);</div><div class='add'>+	sha256_update(&amp;sctx, pt_u, EC_PT_SZ);</div><div class='add'>+	sha256_update(&amp;sctx, pt_v, EC_PT_SZ);</div><div class='add'>+	sha256_final(&amp;sctx, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tpm_buf_append_salt(struct tpm_buf *buf, struct tpm_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct crypto_kpp *kpp;</div><div class='add'>+	struct kpp_request *req;</div><div class='add'>+	struct scatterlist s[2], d[1];</div><div class='add'>+	struct ecdh p = {0};</div><div class='add'>+	u8 encoded_key[EC_PT_SZ], *x, *y;</div><div class='add'>+	unsigned int buf_len;</div><div class='add'>+</div><div class='add'>+	/* secret is two sized points */</div><div class='add'>+	tpm_buf_append_u16(buf, (EC_PT_SZ + 2)*2);</div><div class='add'>+	/*</div><div class='add'>+	 * we cheat here and append uninitialized data to form</div><div class='add'>+	 * the points.  All we care about is getting the two</div><div class='add'>+	 * co-ordinate pointers, which will be used to overwrite</div><div class='add'>+	 * the uninitialized data</div><div class='add'>+	 */</div><div class='add'>+	tpm_buf_append_u16(buf, EC_PT_SZ);</div><div class='add'>+	x = &amp;buf-&gt;data[tpm_buf_length(buf)];</div><div class='add'>+	tpm_buf_append(buf, encoded_key, EC_PT_SZ);</div><div class='add'>+	tpm_buf_append_u16(buf, EC_PT_SZ);</div><div class='add'>+	y = &amp;buf-&gt;data[tpm_buf_length(buf)];</div><div class='add'>+	tpm_buf_append(buf, encoded_key, EC_PT_SZ);</div><div class='add'>+	sg_init_table(s, 2);</div><div class='add'>+	sg_set_buf(&amp;s[0], x, EC_PT_SZ);</div><div class='add'>+	sg_set_buf(&amp;s[1], y, EC_PT_SZ);</div><div class='add'>+</div><div class='add'>+	kpp = crypto_alloc_kpp("ecdh-nist-p256", CRYPTO_ALG_INTERNAL, 0);</div><div class='add'>+	if (IS_ERR(kpp)) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "crypto ecdh allocation failed\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf_len = crypto_ecdh_key_len(&amp;p);</div><div class='add'>+	if (sizeof(encoded_key) &lt; buf_len) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "salt buffer too small needs %d\n",</div><div class='add'>+			buf_len);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	crypto_ecdh_encode_key(encoded_key, buf_len, &amp;p);</div><div class='add'>+	/* this generates a random private key */</div><div class='add'>+	crypto_kpp_set_secret(kpp, encoded_key, buf_len);</div><div class='add'>+</div><div class='add'>+	/* salt is now the public point of this private key */</div><div class='add'>+	req = kpp_request_alloc(kpp, GFP_KERNEL);</div><div class='add'>+	if (!req)</div><div class='add'>+		goto out;</div><div class='add'>+	kpp_request_set_input(req, NULL, 0);</div><div class='add'>+	kpp_request_set_output(req, s, EC_PT_SZ*2);</div><div class='add'>+	crypto_kpp_generate_public_key(req);</div><div class='add'>+	/*</div><div class='add'>+	 * we're not done: now we have to compute the shared secret</div><div class='add'>+	 * which is our private key multiplied by the tpm_key public</div><div class='add'>+	 * point, we actually only take the x point and discard the y</div><div class='add'>+	 * point and feed it through KDFe to get the final secret salt</div><div class='add'>+	 */</div><div class='add'>+	sg_set_buf(&amp;s[0], chip-&gt;null_ec_key_x, EC_PT_SZ);</div><div class='add'>+	sg_set_buf(&amp;s[1], chip-&gt;null_ec_key_y, EC_PT_SZ);</div><div class='add'>+	kpp_request_set_input(req, s, EC_PT_SZ*2);</div><div class='add'>+	sg_init_one(d, chip-&gt;auth-&gt;salt, EC_PT_SZ);</div><div class='add'>+	kpp_request_set_output(req, d, EC_PT_SZ);</div><div class='add'>+	crypto_kpp_compute_shared_secret(req);</div><div class='add'>+	kpp_request_free(req);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * pass the shared secret through KDFe for salt. Note salt</div><div class='add'>+	 * area is used both for input shared secret and output salt.</div><div class='add'>+	 * This works because KDFe fully consumes the secret before it</div><div class='add'>+	 * writes the salt</div><div class='add'>+	 */</div><div class='add'>+	tpm2_KDFe(chip-&gt;auth-&gt;salt, "SECRET", x, chip-&gt;null_ec_key_x,</div><div class='add'>+		  chip-&gt;auth-&gt;salt);</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	crypto_free_kpp(kpp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_append_hmac_session() - Append a TPM session element</div><div class='add'>+ * @chip: the TPM chip structure</div><div class='add'>+ * @buf: The buffer to be appended</div><div class='add'>+ * @attributes: The session attributes</div><div class='add'>+ * @passphrase: The session authority (NULL if none)</div><div class='add'>+ * @passphrase_len: The length of the session authority (0 if none)</div><div class='add'>+ *</div><div class='add'>+ * This fills in a session structure in the TPM command buffer, except</div><div class='add'>+ * for the HMAC which cannot be computed until the command buffer is</div><div class='add'>+ * complete.  The type of session is controlled by the @attributes,</div><div class='add'>+ * the main ones of which are TPM2_SA_CONTINUE_SESSION which means the</div><div class='add'>+ * session won't terminate after tpm_buf_check_hmac_response(),</div><div class='add'>+ * TPM2_SA_DECRYPT which means this buffers first parameter should be</div><div class='add'>+ * encrypted with a session key and TPM2_SA_ENCRYPT, which means the</div><div class='add'>+ * response buffer's first parameter needs to be decrypted (confusing,</div><div class='add'>+ * but the defines are written from the point of view of the TPM).</div><div class='add'>+ *</div><div class='add'>+ * Any session appended by this command must be finalized by calling</div><div class='add'>+ * tpm_buf_fill_hmac_session() otherwise the HMAC will be incorrect</div><div class='add'>+ * and the TPM will reject the command.</div><div class='add'>+ *</div><div class='add'>+ * As with most tpm_buf operations, success is assumed because failure</div><div class='add'>+ * will be caused by an incorrect programming model and indicated by a</div><div class='add'>+ * kernel message.</div><div class='add'>+ */</div><div class='add'>+void tpm_buf_append_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf,</div><div class='add'>+				 u8 attributes, u8 *passphrase,</div><div class='add'>+				 int passphrase_len)</div><div class='add'>+{</div><div class='add'>+	u8 nonce[SHA256_DIGEST_SIZE];</div><div class='add'>+	u32 len;</div><div class='add'>+	struct tpm2_auth *auth = chip-&gt;auth;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The Architecture Guide requires us to strip trailing zeros</div><div class='add'>+	 * before computing the HMAC</div><div class='add'>+	 */</div><div class='add'>+	while (passphrase &amp;&amp; passphrase_len &gt; 0</div><div class='add'>+	       &amp;&amp; passphrase[passphrase_len - 1] == '\0')</div><div class='add'>+		passphrase_len--;</div><div class='add'>+</div><div class='add'>+	auth-&gt;attrs = attributes;</div><div class='add'>+	auth-&gt;passphrase_len = passphrase_len;</div><div class='add'>+	if (passphrase_len)</div><div class='add'>+		memcpy(auth-&gt;passphrase, passphrase, passphrase_len);</div><div class='add'>+</div><div class='add'>+	if (auth-&gt;session != tpm_buf_length(buf)) {</div><div class='add'>+		/* we're not the first session */</div><div class='add'>+		len = get_unaligned_be32(&amp;buf-&gt;data[auth-&gt;session]);</div><div class='add'>+		if (4 + len + auth-&gt;session != tpm_buf_length(buf)) {</div><div class='add'>+			WARN(1, "session length mismatch, cannot append");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* add our new session */</div><div class='add'>+		len += 9 + 2 * SHA256_DIGEST_SIZE;</div><div class='add'>+		put_unaligned_be32(len, &amp;buf-&gt;data[auth-&gt;session]);</div><div class='add'>+	} else {</div><div class='add'>+		tpm_buf_append_u32(buf, 9 + 2 * SHA256_DIGEST_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* random number for our nonce */</div><div class='add'>+	get_random_bytes(nonce, sizeof(nonce));</div><div class='add'>+	memcpy(auth-&gt;our_nonce, nonce, sizeof(nonce));</div><div class='add'>+	tpm_buf_append_u32(buf, auth-&gt;handle);</div><div class='add'>+	/* our new nonce */</div><div class='add'>+	tpm_buf_append_u16(buf, SHA256_DIGEST_SIZE);</div><div class='add'>+	tpm_buf_append(buf, nonce, SHA256_DIGEST_SIZE);</div><div class='add'>+	tpm_buf_append_u8(buf, auth-&gt;attrs);</div><div class='add'>+	/* and put a placeholder for the hmac */</div><div class='add'>+	tpm_buf_append_u16(buf, SHA256_DIGEST_SIZE);</div><div class='add'>+	tpm_buf_append(buf, nonce, SHA256_DIGEST_SIZE);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tpm_buf_append_hmac_session);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_fill_hmac_session() - finalize the session HMAC</div><div class='add'>+ * @chip: the TPM chip structure</div><div class='add'>+ * @buf: The buffer to be appended</div><div class='add'>+ *</div><div class='add'>+ * This command must not be called until all of the parameters have</div><div class='add'>+ * been appended to @buf otherwise the computed HMAC will be</div><div class='add'>+ * incorrect.</div><div class='add'>+ *</div><div class='add'>+ * This function computes and fills in the session HMAC using the</div><div class='add'>+ * session key and, if TPM2_SA_DECRYPT was specified, computes the</div><div class='add'>+ * encryption key and encrypts the first parameter of the command</div><div class='add'>+ * buffer with it.</div><div class='add'>+ *</div><div class='add'>+ * As with most tpm_buf operations, success is assumed because failure</div><div class='add'>+ * will be caused by an incorrect programming model and indicated by a</div><div class='add'>+ * kernel message.</div><div class='add'>+ */</div><div class='add'>+void tpm_buf_fill_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	u32 cc, handles, val;</div><div class='add'>+	struct tpm2_auth *auth = chip-&gt;auth;</div><div class='add'>+	int i;</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+	off_t offset_s = TPM_HEADER_SIZE, offset_p;</div><div class='add'>+	u8 *hmac = NULL;</div><div class='add'>+	u32 attrs;</div><div class='add'>+	u8 cphash[SHA256_DIGEST_SIZE];</div><div class='add'>+	struct sha256_state sctx;</div><div class='add'>+</div><div class='add'>+	/* save the command code in BE format */</div><div class='add'>+	auth-&gt;ordinal = head-&gt;ordinal;</div><div class='add'>+</div><div class='add'>+	cc = be32_to_cpu(head-&gt;ordinal);</div><div class='add'>+</div><div class='add'>+	i = tpm2_find_cc(chip, cc);</div><div class='add'>+	if (i &lt; 0) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "Command 0x%x not found in TPM\n", cc);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	attrs = chip-&gt;cc_attrs_tbl[i];</div><div class='add'>+</div><div class='add'>+	handles = (attrs &gt;&gt; TPM2_CC_ATTR_CHANDLES) &amp; GENMASK(2, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * just check the names, it's easy to make mistakes.  This</div><div class='add'>+	 * would happen if someone added a handle via</div><div class='add'>+	 * tpm_buf_append_u32() instead of tpm_buf_append_name()</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; handles; i++) {</div><div class='add'>+		u32 handle = tpm_buf_read_u32(buf, &amp;offset_s);</div><div class='add'>+</div><div class='add'>+		if (auth-&gt;name_h[i] != handle) {</div><div class='add'>+			dev_err(&amp;chip-&gt;dev, "TPM: handle %d wrong for name\n",</div><div class='add'>+				  i);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* point offset_s to the start of the sessions */</div><div class='add'>+	val = tpm_buf_read_u32(buf, &amp;offset_s);</div><div class='add'>+	/* point offset_p to the start of the parameters */</div><div class='add'>+	offset_p = offset_s + val;</div><div class='add'>+	for (i = 1; offset_s &lt; offset_p; i++) {</div><div class='add'>+		u32 handle = tpm_buf_read_u32(buf, &amp;offset_s);</div><div class='add'>+		u16 len;</div><div class='add'>+		u8 a;</div><div class='add'>+</div><div class='add'>+		/* nonce (already in auth) */</div><div class='add'>+		len = tpm_buf_read_u16(buf, &amp;offset_s);</div><div class='add'>+		offset_s += len;</div><div class='add'>+</div><div class='add'>+		a = tpm_buf_read_u8(buf, &amp;offset_s);</div><div class='add'>+</div><div class='add'>+		len = tpm_buf_read_u16(buf, &amp;offset_s);</div><div class='add'>+		if (handle == auth-&gt;handle &amp;&amp; auth-&gt;attrs == a) {</div><div class='add'>+			hmac = &amp;buf-&gt;data[offset_s];</div><div class='add'>+			/*</div><div class='add'>+			 * save our session number so we know which</div><div class='add'>+			 * session in the response belongs to us</div><div class='add'>+			 */</div><div class='add'>+			auth-&gt;session = i;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		offset_s += len;</div><div class='add'>+	}</div><div class='add'>+	if (offset_s != offset_p) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "TPM session length is incorrect\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (!hmac) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "TPM could not find HMAC session\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* encrypt before HMAC */</div><div class='add'>+	if (auth-&gt;attrs &amp; TPM2_SA_DECRYPT) {</div><div class='add'>+		u16 len;</div><div class='add'>+</div><div class='add'>+		/* need key and IV */</div><div class='add'>+		tpm2_KDFa(auth-&gt;session_key, SHA256_DIGEST_SIZE</div><div class='add'>+			  + auth-&gt;passphrase_len, "CFB", auth-&gt;our_nonce,</div><div class='add'>+			  auth-&gt;tpm_nonce, AES_KEY_BYTES + AES_BLOCK_SIZE,</div><div class='add'>+			  auth-&gt;scratch);</div><div class='add'>+</div><div class='add'>+		len = tpm_buf_read_u16(buf, &amp;offset_p);</div><div class='add'>+		aes_expandkey(&amp;auth-&gt;aes_ctx, auth-&gt;scratch, AES_KEY_BYTES);</div><div class='add'>+		aescfb_encrypt(&amp;auth-&gt;aes_ctx, &amp;buf-&gt;data[offset_p],</div><div class='add'>+			       &amp;buf-&gt;data[offset_p], len,</div><div class='add'>+			       auth-&gt;scratch + AES_KEY_BYTES);</div><div class='add'>+		/* reset p to beginning of parameters for HMAC */</div><div class='add'>+		offset_p -= 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sha256_init(&amp;sctx);</div><div class='add'>+	/* ordinal is already BE */</div><div class='add'>+	sha256_update(&amp;sctx, (u8 *)&amp;head-&gt;ordinal, sizeof(head-&gt;ordinal));</div><div class='add'>+	/* add the handle names */</div><div class='add'>+	for (i = 0; i &lt; handles; i++) {</div><div class='add'>+		enum tpm2_mso_type mso = tpm2_handle_mso(auth-&gt;name_h[i]);</div><div class='add'>+</div><div class='add'>+		if (mso == TPM2_MSO_PERSISTENT ||</div><div class='add'>+		    mso == TPM2_MSO_VOLATILE ||</div><div class='add'>+		    mso == TPM2_MSO_NVRAM) {</div><div class='add'>+			sha256_update(&amp;sctx, auth-&gt;name[i],</div><div class='add'>+				      name_size(auth-&gt;name[i]));</div><div class='add'>+		} else {</div><div class='add'>+			__be32 h = cpu_to_be32(auth-&gt;name_h[i]);</div><div class='add'>+</div><div class='add'>+			sha256_update(&amp;sctx, (u8 *)&amp;h, 4);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (offset_s != tpm_buf_length(buf))</div><div class='add'>+		sha256_update(&amp;sctx, &amp;buf-&gt;data[offset_s],</div><div class='add'>+			      tpm_buf_length(buf) - offset_s);</div><div class='add'>+	sha256_final(&amp;sctx, cphash);</div><div class='add'>+</div><div class='add'>+	/* now calculate the hmac */</div><div class='add'>+	tpm2_hmac_init(&amp;sctx, auth-&gt;session_key, sizeof(auth-&gt;session_key)</div><div class='add'>+		       + auth-&gt;passphrase_len);</div><div class='add'>+	sha256_update(&amp;sctx, cphash, sizeof(cphash));</div><div class='add'>+	sha256_update(&amp;sctx, auth-&gt;our_nonce, sizeof(auth-&gt;our_nonce));</div><div class='add'>+	sha256_update(&amp;sctx, auth-&gt;tpm_nonce, sizeof(auth-&gt;tpm_nonce));</div><div class='add'>+	sha256_update(&amp;sctx, &amp;auth-&gt;attrs, 1);</div><div class='add'>+	tpm2_hmac_final(&amp;sctx, auth-&gt;session_key, sizeof(auth-&gt;session_key)</div><div class='add'>+			+ auth-&gt;passphrase_len, hmac);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tpm_buf_fill_hmac_session);</div><div class='add'>+</div><div class='add'>+static int tpm2_parse_read_public(char *name, struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+	off_t offset = TPM_HEADER_SIZE;</div><div class='add'>+	u32 tot_len = be32_to_cpu(head-&gt;length);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* we're starting after the header so adjust the length */</div><div class='add'>+	tot_len -= TPM_HEADER_SIZE;</div><div class='add'>+</div><div class='add'>+	/* skip public */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset);</div><div class='add'>+	if (val &gt; tot_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	offset += val;</div><div class='add'>+	/* name */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset);</div><div class='add'>+	if (val != name_size(&amp;buf-&gt;data[offset]))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(name, &amp;buf-&gt;data[offset], val);</div><div class='add'>+	/* forget the rest */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tpm2_read_public(struct tpm_chip *chip, u32 handle, char *name)</div><div class='add'>+{</div><div class='add'>+	struct tpm_buf buf;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = tpm_buf_init(&amp;buf, TPM2_ST_NO_SESSIONS, TPM2_CC_READ_PUBLIC);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	tpm_buf_append_u32(&amp;buf, handle);</div><div class='add'>+	rc = tpm_transmit_cmd(chip, &amp;buf, 0, "read public");</div><div class='add'>+	if (rc == TPM2_RC_SUCCESS)</div><div class='add'>+		rc = tpm2_parse_read_public(name, &amp;buf);</div><div class='add'>+</div><div class='add'>+	tpm_buf_destroy(&amp;buf);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_append_name() - add a handle area to the buffer</div><div class='add'>+ * @chip: the TPM chip structure</div><div class='add'>+ * @buf: The buffer to be appended</div><div class='add'>+ * @handle: The handle to be appended</div><div class='add'>+ * @name: The name of the handle (may be NULL)</div><div class='add'>+ *</div><div class='add'>+ * In order to compute session HMACs, we need to know the names of the</div><div class='add'>+ * objects pointed to by the handles.  For most objects, this is simply</div><div class='add'>+ * the actual 4 byte handle or an empty buf (in these cases @name</div><div class='add'>+ * should be NULL) but for volatile objects, permanent objects and NV</div><div class='add'>+ * areas, the name is defined as the hash (according to the name</div><div class='add'>+ * algorithm which should be set to sha256) of the public area to</div><div class='add'>+ * which the two byte algorithm id has been appended.  For these</div><div class='add'>+ * objects, the @name pointer should point to this.  If a name is</div><div class='add'>+ * required but @name is NULL, then TPM2_ReadPublic() will be called</div><div class='add'>+ * on the handle to obtain the name.</div><div class='add'>+ *</div><div class='add'>+ * As with most tpm_buf operations, success is assumed because failure</div><div class='add'>+ * will be caused by an incorrect programming model and indicated by a</div><div class='add'>+ * kernel message.</div><div class='add'>+ */</div><div class='add'>+void tpm_buf_append_name(struct tpm_chip *chip, struct tpm_buf *buf,</div><div class='add'>+			 u32 handle, u8 *name)</div><div class='add'>+{</div><div class='add'>+	enum tpm2_mso_type mso = tpm2_handle_mso(handle);</div><div class='add'>+	struct tpm2_auth *auth = chip-&gt;auth;</div><div class='add'>+	int slot;</div><div class='add'>+</div><div class='add'>+	slot = (tpm_buf_length(buf) - TPM_HEADER_SIZE)/4;</div><div class='add'>+	if (slot &gt;= AUTH_MAX_NAMES) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "TPM: too many handles\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	WARN(auth-&gt;session != tpm_buf_length(buf),</div><div class='add'>+	     "name added in wrong place\n");</div><div class='add'>+	tpm_buf_append_u32(buf, handle);</div><div class='add'>+	auth-&gt;session += 4;</div><div class='add'>+</div><div class='add'>+	if (mso == TPM2_MSO_PERSISTENT ||</div><div class='add'>+	    mso == TPM2_MSO_VOLATILE ||</div><div class='add'>+	    mso == TPM2_MSO_NVRAM) {</div><div class='add'>+		if (!name)</div><div class='add'>+			tpm2_read_public(chip, handle, auth-&gt;name[slot]);</div><div class='add'>+	} else {</div><div class='add'>+		if (name)</div><div class='add'>+			dev_err(&amp;chip-&gt;dev, "TPM: Handle does not require name but one is specified\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	auth-&gt;name_h[slot] = handle;</div><div class='add'>+	if (name)</div><div class='add'>+		memcpy(auth-&gt;name[slot], name, name_size(name));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tpm_buf_append_name);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm_buf_check_hmac_response() - check the TPM return HMAC for correctness</div><div class='add'>+ * @chip: the TPM chip structure</div><div class='add'>+ * @buf: the original command buffer (which now contains the response)</div><div class='add'>+ * @rc: the return code from tpm_transmit_cmd</div><div class='add'>+ *</div><div class='add'>+ * If @rc is non zero, @buf may not contain an actual return, so @rc</div><div class='add'>+ * is passed through as the return and the session cleaned up and</div><div class='add'>+ * de-allocated if required (this is required if</div><div class='add'>+ * TPM2_SA_CONTINUE_SESSION was not specified as a session flag).</div><div class='add'>+ *</div><div class='add'>+ * If @rc is zero, the response HMAC is computed against the returned</div><div class='add'>+ * @buf and matched to the TPM one in the session area.  If there is a</div><div class='add'>+ * mismatch, an error is logged and -EINVAL returned.</div><div class='add'>+ *</div><div class='add'>+ * The reason for this is that the command issue and HMAC check</div><div class='add'>+ * sequence should look like:</div><div class='add'>+ *</div><div class='add'>+ *	rc = tpm_transmit_cmd(...);</div><div class='add'>+ *	rc = tpm_buf_check_hmac_response(&amp;buf, auth, rc);</div><div class='add'>+ *	if (rc)</div><div class='add'>+ *		...</div><div class='add'>+ *</div><div class='add'>+ * Which is easily layered into the current contrl flow.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or an error.</div><div class='add'>+ */</div><div class='add'>+int tpm_buf_check_hmac_response(struct tpm_chip *chip, struct tpm_buf *buf,</div><div class='add'>+				int rc)</div><div class='add'>+{</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+	struct tpm2_auth *auth = chip-&gt;auth;</div><div class='add'>+	off_t offset_s, offset_p;</div><div class='add'>+	u8 rphash[SHA256_DIGEST_SIZE];</div><div class='add'>+	u32 attrs;</div><div class='add'>+	struct sha256_state sctx;</div><div class='add'>+	u16 tag = be16_to_cpu(head-&gt;tag);</div><div class='add'>+	u32 cc = be32_to_cpu(auth-&gt;ordinal);</div><div class='add'>+	int parm_len, len, i, handles;</div><div class='add'>+</div><div class='add'>+	if (auth-&gt;session &gt;= TPM_HEADER_SIZE) {</div><div class='add'>+		WARN(1, "tpm session not filled correctly\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc != 0)</div><div class='add'>+		/* pass non success rc through and close the session */</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = -EINVAL;</div><div class='add'>+	if (tag != TPM2_ST_SESSIONS) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "TPM: HMAC response check has no sessions tag\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = tpm2_find_cc(chip, cc);</div><div class='add'>+	if (i &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+	attrs = chip-&gt;cc_attrs_tbl[i];</div><div class='add'>+	handles = (attrs &gt;&gt; TPM2_CC_ATTR_RHANDLE) &amp; 1;</div><div class='add'>+</div><div class='add'>+	/* point to area beyond handles */</div><div class='add'>+	offset_s = TPM_HEADER_SIZE + handles * 4;</div><div class='add'>+	parm_len = tpm_buf_read_u32(buf, &amp;offset_s);</div><div class='add'>+	offset_p = offset_s;</div><div class='add'>+	offset_s += parm_len;</div><div class='add'>+	/* skip over any sessions before ours */</div><div class='add'>+	for (i = 0; i &lt; auth-&gt;session - 1; i++) {</div><div class='add'>+		len = tpm_buf_read_u16(buf, &amp;offset_s);</div><div class='add'>+		offset_s += len + 1;</div><div class='add'>+		len = tpm_buf_read_u16(buf, &amp;offset_s);</div><div class='add'>+		offset_s += len;</div><div class='add'>+	}</div><div class='add'>+	/* TPM nonce */</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_s);</div><div class='add'>+	if (offset_s + len &gt; tpm_buf_length(buf))</div><div class='add'>+		goto out;</div><div class='add'>+	if (len != SHA256_DIGEST_SIZE)</div><div class='add'>+		goto out;</div><div class='add'>+	memcpy(auth-&gt;tpm_nonce, &amp;buf-&gt;data[offset_s], len);</div><div class='add'>+	offset_s += len;</div><div class='add'>+	attrs = tpm_buf_read_u8(buf, &amp;offset_s);</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_s);</div><div class='add'>+	if (offset_s + len != tpm_buf_length(buf))</div><div class='add'>+		goto out;</div><div class='add'>+	if (len != SHA256_DIGEST_SIZE)</div><div class='add'>+		goto out;</div><div class='add'>+	/*</div><div class='add'>+	 * offset_s points to the HMAC. now calculate comparison, beginning</div><div class='add'>+	 * with rphash</div><div class='add'>+	 */</div><div class='add'>+	sha256_init(&amp;sctx);</div><div class='add'>+	/* yes, I know this is now zero, but it's what the standard says */</div><div class='add'>+	sha256_update(&amp;sctx, (u8 *)&amp;head-&gt;return_code,</div><div class='add'>+		      sizeof(head-&gt;return_code));</div><div class='add'>+	/* ordinal is already BE */</div><div class='add'>+	sha256_update(&amp;sctx, (u8 *)&amp;auth-&gt;ordinal, sizeof(auth-&gt;ordinal));</div><div class='add'>+	sha256_update(&amp;sctx, &amp;buf-&gt;data[offset_p], parm_len);</div><div class='add'>+	sha256_final(&amp;sctx, rphash);</div><div class='add'>+</div><div class='add'>+	/* now calculate the hmac */</div><div class='add'>+	tpm2_hmac_init(&amp;sctx, auth-&gt;session_key, sizeof(auth-&gt;session_key)</div><div class='add'>+		       + auth-&gt;passphrase_len);</div><div class='add'>+	sha256_update(&amp;sctx, rphash, sizeof(rphash));</div><div class='add'>+	sha256_update(&amp;sctx, auth-&gt;tpm_nonce, sizeof(auth-&gt;tpm_nonce));</div><div class='add'>+	sha256_update(&amp;sctx, auth-&gt;our_nonce, sizeof(auth-&gt;our_nonce));</div><div class='add'>+	sha256_update(&amp;sctx, &amp;auth-&gt;attrs, 1);</div><div class='add'>+	/* we're done with the rphash, so put our idea of the hmac there */</div><div class='add'>+	tpm2_hmac_final(&amp;sctx, auth-&gt;session_key, sizeof(auth-&gt;session_key)</div><div class='add'>+			+ auth-&gt;passphrase_len, rphash);</div><div class='add'>+	if (memcmp(rphash, &amp;buf-&gt;data[offset_s], SHA256_DIGEST_SIZE) == 0) {</div><div class='add'>+		rc = 0;</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "TPM: HMAC check failed\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* now do response decryption */</div><div class='add'>+	if (auth-&gt;attrs &amp; TPM2_SA_ENCRYPT) {</div><div class='add'>+		/* need key and IV */</div><div class='add'>+		tpm2_KDFa(auth-&gt;session_key, SHA256_DIGEST_SIZE</div><div class='add'>+			  + auth-&gt;passphrase_len, "CFB", auth-&gt;tpm_nonce,</div><div class='add'>+			  auth-&gt;our_nonce, AES_KEY_BYTES + AES_BLOCK_SIZE,</div><div class='add'>+			  auth-&gt;scratch);</div><div class='add'>+</div><div class='add'>+		len = tpm_buf_read_u16(buf, &amp;offset_p);</div><div class='add'>+		aes_expandkey(&amp;auth-&gt;aes_ctx, auth-&gt;scratch, AES_KEY_BYTES);</div><div class='add'>+		aescfb_decrypt(&amp;auth-&gt;aes_ctx, &amp;buf-&gt;data[offset_p],</div><div class='add'>+			       &amp;buf-&gt;data[offset_p], len,</div><div class='add'>+			       auth-&gt;scratch + AES_KEY_BYTES);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	if ((auth-&gt;attrs &amp; TPM2_SA_CONTINUE_SESSION) == 0) {</div><div class='add'>+		if (rc)</div><div class='add'>+			/* manually close the session if it wasn't consumed */</div><div class='add'>+			tpm2_flush_context(chip, auth-&gt;handle);</div><div class='add'>+		memzero_explicit(auth, sizeof(*auth));</div><div class='add'>+	} else {</div><div class='add'>+		/* reset for next use  */</div><div class='add'>+		auth-&gt;session = TPM_HEADER_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tpm_buf_check_hmac_response);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm2_end_auth_session() - kill the allocated auth session</div><div class='add'>+ * @chip: the TPM chip structure</div><div class='add'>+ *</div><div class='add'>+ * ends the session started by tpm2_start_auth_session and frees all</div><div class='add'>+ * the resources.  Under normal conditions,</div><div class='add'>+ * tpm_buf_check_hmac_response() will correctly end the session if</div><div class='add'>+ * required, so this function is only for use in error legs that will</div><div class='add'>+ * bypass the normal invocation of tpm_buf_check_hmac_response().</div><div class='add'>+ */</div><div class='add'>+void tpm2_end_auth_session(struct tpm_chip *chip)</div><div class='add'>+{</div><div class='add'>+	tpm2_flush_context(chip, chip-&gt;auth-&gt;handle);</div><div class='add'>+	memzero_explicit(chip-&gt;auth, sizeof(*chip-&gt;auth));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tpm2_end_auth_session);</div><div class='add'>+</div><div class='add'>+static int tpm2_parse_start_auth_session(struct tpm2_auth *auth,</div><div class='add'>+					 struct tpm_buf *buf)</div><div class='add'>+{</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+	u32 tot_len = be32_to_cpu(head-&gt;length);</div><div class='add'>+	off_t offset = TPM_HEADER_SIZE;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* we're starting after the header so adjust the length */</div><div class='add'>+	tot_len -= TPM_HEADER_SIZE;</div><div class='add'>+</div><div class='add'>+	/* should have handle plus nonce */</div><div class='add'>+	if (tot_len != 4 + 2 + sizeof(auth-&gt;tpm_nonce))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	auth-&gt;handle = tpm_buf_read_u32(buf, &amp;offset);</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset);</div><div class='add'>+	if (val != sizeof(auth-&gt;tpm_nonce))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(auth-&gt;tpm_nonce, &amp;buf-&gt;data[offset], sizeof(auth-&gt;tpm_nonce));</div><div class='add'>+	/* now compute the session key from the nonces */</div><div class='add'>+	tpm2_KDFa(auth-&gt;salt, sizeof(auth-&gt;salt), "ATH", auth-&gt;tpm_nonce,</div><div class='add'>+		  auth-&gt;our_nonce, sizeof(auth-&gt;session_key),</div><div class='add'>+		  auth-&gt;session_key);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tpm2_load_null(struct tpm_chip *chip, u32 *null_key)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	unsigned int offset = 0; /* dummy offset for null seed context */</div><div class='add'>+	u8 name[SHA256_DIGEST_SIZE + 2];</div><div class='add'>+</div><div class='add'>+	rc = tpm2_load_context(chip, chip-&gt;null_key_context, &amp;offset,</div><div class='add'>+			       null_key);</div><div class='add'>+	if (rc != -EINVAL)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* an integrity failure may mean the TPM has been reset */</div><div class='add'>+	dev_err(&amp;chip-&gt;dev, "NULL key integrity failure!\n");</div><div class='add'>+	/* check the null name against what we know */</div><div class='add'>+	tpm2_create_primary(chip, TPM2_RH_NULL, NULL, name);</div><div class='add'>+	if (memcmp(name, chip-&gt;null_key_name, sizeof(name)) == 0)</div><div class='add'>+		/* name unchanged, assume transient integrity failure */</div><div class='add'>+		return rc;</div><div class='add'>+	/*</div><div class='add'>+	 * Fatal TPM failure: the NULL seed has actually changed, so</div><div class='add'>+	 * the TPM must have been illegally reset.  All in-kernel TPM</div><div class='add'>+	 * operations will fail because the NULL primary can't be</div><div class='add'>+	 * loaded to salt the sessions, but disable the TPM anyway so</div><div class='add'>+	 * userspace programmes can't be compromised by it.</div><div class='add'>+	 */</div><div class='add'>+	dev_err(&amp;chip-&gt;dev, "NULL name has changed, disabling TPM due to interference\n");</div><div class='add'>+	chip-&gt;flags |= TPM_CHIP_FLAG_DISABLE;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm2_start_auth_session() - create a HMAC authentication session with the TPM</div><div class='add'>+ * @chip: the TPM chip structure to create the session with</div><div class='add'>+ *</div><div class='add'>+ * This function loads the NULL seed from its saved context and starts</div><div class='add'>+ * an authentication session on the null seed, fills in the</div><div class='add'>+ * @chip-&gt;auth structure to contain all the session details necessary</div><div class='add'>+ * for performing the HMAC, encrypt and decrypt operations and</div><div class='add'>+ * returns.  The NULL seed is flushed before this function returns.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success or actual error encountered.</div><div class='add'>+ */</div><div class='add'>+int tpm2_start_auth_session(struct tpm_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct tpm_buf buf;</div><div class='add'>+	struct tpm2_auth *auth = chip-&gt;auth;</div><div class='add'>+	int rc;</div><div class='add'>+	u32 null_key;</div><div class='add'>+</div><div class='add'>+	rc = tpm2_load_null(chip, &amp;null_key);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	auth-&gt;session = TPM_HEADER_SIZE;</div><div class='add'>+</div><div class='add'>+	rc = tpm_buf_init(&amp;buf, TPM2_ST_NO_SESSIONS, TPM2_CC_START_AUTH_SESS);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* salt key handle */</div><div class='add'>+	tpm_buf_append_u32(&amp;buf, null_key);</div><div class='add'>+	/* bind key handle */</div><div class='add'>+	tpm_buf_append_u32(&amp;buf, TPM2_RH_NULL);</div><div class='add'>+	/* nonce caller */</div><div class='add'>+	get_random_bytes(auth-&gt;our_nonce, sizeof(auth-&gt;our_nonce));</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, sizeof(auth-&gt;our_nonce));</div><div class='add'>+	tpm_buf_append(&amp;buf, auth-&gt;our_nonce, sizeof(auth-&gt;our_nonce));</div><div class='add'>+</div><div class='add'>+	/* append encrypted salt and squirrel away unencrypted in auth */</div><div class='add'>+	tpm_buf_append_salt(&amp;buf, chip);</div><div class='add'>+	/* session type (HMAC, audit or policy) */</div><div class='add'>+	tpm_buf_append_u8(&amp;buf, TPM2_SE_HMAC);</div><div class='add'>+</div><div class='add'>+	/* symmetric encryption parameters */</div><div class='add'>+	/* symmetric algorithm */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, TPM_ALG_AES);</div><div class='add'>+	/* bits for symmetric algorithm */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, AES_KEY_BITS);</div><div class='add'>+	/* symmetric algorithm mode (must be CFB) */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, TPM_ALG_CFB);</div><div class='add'>+	/* hash algorithm for session */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, TPM_ALG_SHA256);</div><div class='add'>+</div><div class='add'>+	rc = tpm_transmit_cmd(chip, &amp;buf, 0, "start auth session");</div><div class='add'>+	tpm2_flush_context(chip, null_key);</div><div class='add'>+</div><div class='add'>+	if (rc == TPM2_RC_SUCCESS)</div><div class='add'>+		rc = tpm2_parse_start_auth_session(auth, &amp;buf);</div><div class='add'>+</div><div class='add'>+	tpm_buf_destroy(&amp;buf);</div><div class='add'>+</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tpm2_start_auth_session);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm2_parse_create_primary() - parse the data returned from TPM_CC_CREATE_PRIMARY</div><div class='add'>+ *</div><div class='add'>+ * @chip:	The TPM the primary was created under</div><div class='add'>+ * @buf:	The response buffer from the chip</div><div class='add'>+ * @handle:	pointer to be filled in with the return handle of the primary</div><div class='add'>+ * @hierarchy:	The hierarchy the primary was created for</div><div class='add'>+ * @name:	pointer to be filled in with the primary key name</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0		- OK</div><div class='add'>+ * * -errno	- A system error</div><div class='add'>+ * * TPM_RC	- A TPM error</div><div class='add'>+ */</div><div class='add'>+static int tpm2_parse_create_primary(struct tpm_chip *chip, struct tpm_buf *buf,</div><div class='add'>+				     u32 *handle, u32 hierarchy, u8 *name)</div><div class='add'>+{</div><div class='add'>+	struct tpm_header *head = (struct tpm_header *)buf-&gt;data;</div><div class='add'>+	off_t offset_r = TPM_HEADER_SIZE, offset_t;</div><div class='add'>+	u16 len = TPM_HEADER_SIZE;</div><div class='add'>+	u32 total_len = be32_to_cpu(head-&gt;length);</div><div class='add'>+	u32 val, param_len, keyhandle;</div><div class='add'>+</div><div class='add'>+	keyhandle = tpm_buf_read_u32(buf, &amp;offset_r);</div><div class='add'>+	if (handle)</div><div class='add'>+		*handle = keyhandle;</div><div class='add'>+	else</div><div class='add'>+		tpm2_flush_context(chip, keyhandle);</div><div class='add'>+</div><div class='add'>+	param_len = tpm_buf_read_u32(buf, &amp;offset_r);</div><div class='add'>+	/*</div><div class='add'>+	 * param_len doesn't include the header, but all the other</div><div class='add'>+	 * lengths and offsets do, so add it to parm len to make</div><div class='add'>+	 * the comparisons easier</div><div class='add'>+	 */</div><div class='add'>+	param_len += TPM_HEADER_SIZE;</div><div class='add'>+</div><div class='add'>+	if (param_len + 8 &gt; total_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_r);</div><div class='add'>+	offset_t = offset_r;</div><div class='add'>+	if (name) {</div><div class='add'>+		/*</div><div class='add'>+		 * now we have the public area, compute the name of</div><div class='add'>+		 * the object</div><div class='add'>+		 */</div><div class='add'>+		put_unaligned_be16(TPM_ALG_SHA256, name);</div><div class='add'>+		sha256(&amp;buf-&gt;data[offset_r], len, name + 2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* validate the public key */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+</div><div class='add'>+	/* key type (must be what we asked for) */</div><div class='add'>+	if (val != TPM_ALG_ECC)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+</div><div class='add'>+	/* name algorithm */</div><div class='add'>+	if (val != TPM_ALG_SHA256)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	val = tpm_buf_read_u32(buf, &amp;offset_t);</div><div class='add'>+</div><div class='add'>+	/* object properties */</div><div class='add'>+	if (val != TPM2_OA_TMPL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* auth policy (empty) */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* symmetric key parameters */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != TPM_ALG_AES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* symmetric key length */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != AES_KEY_BITS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* symmetric encryption scheme */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != TPM_ALG_CFB)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* signing scheme */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != TPM_ALG_NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* ECC Curve */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != TPM2_ECC_NIST_P256)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* KDF Scheme */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != TPM_ALG_NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* extract public key (x and y points) */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != EC_PT_SZ)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(chip-&gt;null_ec_key_x, &amp;buf-&gt;data[offset_t], val);</div><div class='add'>+	offset_t += val;</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_t);</div><div class='add'>+	if (val != EC_PT_SZ)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(chip-&gt;null_ec_key_y, &amp;buf-&gt;data[offset_t], val);</div><div class='add'>+	offset_t += val;</div><div class='add'>+</div><div class='add'>+	/* original length of the whole TPM2B */</div><div class='add'>+	offset_r += len;</div><div class='add'>+</div><div class='add'>+	/* should have exactly consumed the TPM2B public structure */</div><div class='add'>+	if (offset_t != offset_r)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (offset_r &gt; param_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* creation data (skip) */</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_r);</div><div class='add'>+	offset_r += len;</div><div class='add'>+	if (offset_r &gt; param_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* creation digest (must be sha256) */</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_r);</div><div class='add'>+	offset_r += len;</div><div class='add'>+	if (len != SHA256_DIGEST_SIZE || offset_r &gt; param_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* TPMT_TK_CREATION follows */</div><div class='add'>+	/* tag, must be TPM_ST_CREATION (0x8021) */</div><div class='add'>+	val = tpm_buf_read_u16(buf, &amp;offset_r);</div><div class='add'>+	if (val != TPM2_ST_CREATION || offset_r &gt; param_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* hierarchy */</div><div class='add'>+	val = tpm_buf_read_u32(buf, &amp;offset_r);</div><div class='add'>+	if (val != hierarchy || offset_r &gt; param_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* the ticket digest HMAC (might not be sha256) */</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_r);</div><div class='add'>+	offset_r += len;</div><div class='add'>+	if (offset_r &gt; param_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * finally we have the name, which is a sha256 digest plus a 2</div><div class='add'>+	 * byte algorithm type</div><div class='add'>+	 */</div><div class='add'>+	len = tpm_buf_read_u16(buf, &amp;offset_r);</div><div class='add'>+	if (offset_r + len != param_len + 8)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (len != SHA256_DIGEST_SIZE + 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (memcmp(chip-&gt;null_key_name, &amp;buf-&gt;data[offset_r],</div><div class='add'>+		   SHA256_DIGEST_SIZE + 2) != 0) {</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "NULL Seed name comparison failed\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm2_create_primary() - create a primary key using a fixed P-256 template</div><div class='add'>+ *</div><div class='add'>+ * @chip:      the TPM chip to create under</div><div class='add'>+ * @hierarchy: The hierarchy handle to create under</div><div class='add'>+ * @handle:    The returned volatile handle on success</div><div class='add'>+ * @name:      The name of the returned key</div><div class='add'>+ *</div><div class='add'>+ * For platforms that might not have a persistent primary, this can be</div><div class='add'>+ * used to create one quickly on the fly (it uses Elliptic Curve not</div><div class='add'>+ * RSA, so even slow TPMs can create one fast).  The template uses the</div><div class='add'>+ * TCG mandated H one for non-endorsement ECC primaries, i.e. P-256</div><div class='add'>+ * elliptic curve (the only current one all TPM2s are required to</div><div class='add'>+ * have) a sha256 name hash and no policy.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0		- OK</div><div class='add'>+ * * -errno	- A system error</div><div class='add'>+ * * TPM_RC	- A TPM error</div><div class='add'>+ */</div><div class='add'>+static int tpm2_create_primary(struct tpm_chip *chip, u32 hierarchy,</div><div class='add'>+			       u32 *handle, u8 *name)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	struct tpm_buf buf;</div><div class='add'>+	struct tpm_buf template;</div><div class='add'>+</div><div class='add'>+	rc = tpm_buf_init(&amp;buf, TPM2_ST_SESSIONS, TPM2_CC_CREATE_PRIMARY);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = tpm_buf_init_sized(&amp;template);</div><div class='add'>+	if (rc) {</div><div class='add'>+		tpm_buf_destroy(&amp;buf);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * create the template.  Note: in order for userspace to</div><div class='add'>+	 * verify the security of the system, it will have to create</div><div class='add'>+	 * and certify this NULL primary, meaning all the template</div><div class='add'>+	 * parameters will have to be identical, so conform exactly to</div><div class='add'>+	 * the TCG TPM v2.0 Provisioning Guidance for the SRK ECC</div><div class='add'>+	 * key H template (H has zero size unique points)</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* key type */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM_ALG_ECC);</div><div class='add'>+</div><div class='add'>+	/* name algorithm */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM_ALG_SHA256);</div><div class='add'>+</div><div class='add'>+	/* object properties */</div><div class='add'>+	tpm_buf_append_u32(&amp;template, TPM2_OA_TMPL);</div><div class='add'>+</div><div class='add'>+	/* sauth policy (empty) */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, 0);</div><div class='add'>+</div><div class='add'>+	/* BEGIN parameters: key specific; for ECC*/</div><div class='add'>+</div><div class='add'>+	/* symmetric algorithm */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM_ALG_AES);</div><div class='add'>+</div><div class='add'>+	/* bits for symmetric algorithm */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, AES_KEY_BITS);</div><div class='add'>+</div><div class='add'>+	/* algorithm mode (must be CFB) */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM_ALG_CFB);</div><div class='add'>+</div><div class='add'>+	/* scheme (NULL means any scheme) */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM_ALG_NULL);</div><div class='add'>+</div><div class='add'>+	/* ECC Curve ID */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM2_ECC_NIST_P256);</div><div class='add'>+</div><div class='add'>+	/* KDF Scheme */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, TPM_ALG_NULL);</div><div class='add'>+</div><div class='add'>+	/* unique: key specific; for ECC it is two zero size points */</div><div class='add'>+	tpm_buf_append_u16(&amp;template, 0);</div><div class='add'>+	tpm_buf_append_u16(&amp;template, 0);</div><div class='add'>+</div><div class='add'>+	/* END parameters */</div><div class='add'>+</div><div class='add'>+	/* primary handle */</div><div class='add'>+	tpm_buf_append_u32(&amp;buf, hierarchy);</div><div class='add'>+	tpm_buf_append_empty_auth(&amp;buf, TPM2_RS_PW);</div><div class='add'>+</div><div class='add'>+	/* sensitive create size is 4 for two empty buffers */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, 4);</div><div class='add'>+</div><div class='add'>+	/* sensitive create auth data (empty) */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, 0);</div><div class='add'>+</div><div class='add'>+	/* sensitive create sensitive data (empty) */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, 0);</div><div class='add'>+</div><div class='add'>+	/* the public template */</div><div class='add'>+	tpm_buf_append(&amp;buf, template.data, template.length);</div><div class='add'>+	tpm_buf_destroy(&amp;template);</div><div class='add'>+</div><div class='add'>+	/* outside info (empty) */</div><div class='add'>+	tpm_buf_append_u16(&amp;buf, 0);</div><div class='add'>+</div><div class='add'>+	/* creation PCR (none) */</div><div class='add'>+	tpm_buf_append_u32(&amp;buf, 0);</div><div class='add'>+</div><div class='add'>+	rc = tpm_transmit_cmd(chip, &amp;buf, 0,</div><div class='add'>+			      "attempting to create NULL primary");</div><div class='add'>+</div><div class='add'>+	if (rc == TPM2_RC_SUCCESS)</div><div class='add'>+		rc = tpm2_parse_create_primary(chip, &amp;buf, handle, hierarchy,</div><div class='add'>+					       name);</div><div class='add'>+</div><div class='add'>+	tpm_buf_destroy(&amp;buf);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tpm2_create_null_primary(struct tpm_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u32 null_key;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = tpm2_create_primary(chip, TPM2_RH_NULL, &amp;null_key,</div><div class='add'>+				 chip-&gt;null_key_name);</div><div class='add'>+</div><div class='add'>+	if (rc == TPM2_RC_SUCCESS) {</div><div class='add'>+		unsigned int offset = 0; /* dummy offset for null key context */</div><div class='add'>+</div><div class='add'>+		rc = tpm2_save_context(chip, null_key, chip-&gt;null_key_context,</div><div class='add'>+				       sizeof(chip-&gt;null_key_context), &amp;offset);</div><div class='add'>+		tpm2_flush_context(chip, null_key);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * tpm2_sessions_init() - start of day initialization for the sessions code</div><div class='add'>+ * @chip: TPM chip</div><div class='add'>+ *</div><div class='add'>+ * Derive and context save the null primary and allocate memory in the</div><div class='add'>+ * struct tpm_chip for the authorizations.</div><div class='add'>+ */</div><div class='add'>+int tpm2_sessions_init(struct tpm_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = tpm2_create_null_primary(chip);</div><div class='add'>+	if (rc)</div><div class='add'>+		dev_err(&amp;chip-&gt;dev, "TPM: security failed (NULL seed derivation): %d\n", rc);</div><div class='add'>+</div><div class='add'>+	chip-&gt;auth = kmalloc(sizeof(*chip-&gt;auth), GFP_KERNEL);</div><div class='add'>+	if (!chip-&gt;auth)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/char/tpm/tpm2-space.c b/drivers/char/tpm/tpm2-space.c<br/>index 363afdd4d1d3..4892d491da8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-space.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm2-space.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-space.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm2-space.c</a></div><div class='hunk'>@@ -68,8 +68,8 @@ void tpm2_del_space(struct tpm_chip *chip, struct tpm_space *space)</div><div class='ctx'> 	kfree(space-&gt;session_buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tpm2_load_context(struct tpm_chip *chip, u8 *buf,</div><div class='del'>-			     unsigned int *offset, u32 *handle)</div><div class='add'>+int tpm2_load_context(struct tpm_chip *chip, u8 *buf,</div><div class='add'>+		      unsigned int *offset, u32 *handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct tpm_buf tbuf;</div><div class='ctx'> 	struct tpm2_context *ctx;</div><div class='hunk'>@@ -105,6 +105,9 @@ static int tpm2_load_context(struct tpm_chip *chip, u8 *buf,</div><div class='ctx'> 		*handle = 0;</div><div class='ctx'> 		tpm_buf_destroy(&amp;tbuf);</div><div class='ctx'> 		return -ENOENT;</div><div class='add'>+	} else if (tpm2_rc_value(rc) == TPM2_RC_INTEGRITY) {</div><div class='add'>+		tpm_buf_destroy(&amp;tbuf);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	} else if (rc &gt; 0) {</div><div class='ctx'> 		dev_warn(&amp;chip-&gt;dev, "%s: failed with a TPM error 0x%04X\n",</div><div class='ctx'> 			 __func__, rc);</div><div class='hunk'>@@ -119,8 +122,8 @@ static int tpm2_load_context(struct tpm_chip *chip, u8 *buf,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tpm2_save_context(struct tpm_chip *chip, u32 handle, u8 *buf,</div><div class='del'>-			     unsigned int buf_size, unsigned int *offset)</div><div class='add'>+int tpm2_save_context(struct tpm_chip *chip, u32 handle, u8 *buf,</div><div class='add'>+		      unsigned int buf_size, unsigned int *offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct tpm_buf tbuf;</div><div class='ctx'> 	unsigned int body_size;</div><div class='head'>diff --git a/drivers/char/tpm/tpm_infineon.c b/drivers/char/tpm/tpm_infineon.c<br/>index 9c924a1440a9..2d2ae37153ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_infineon.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm_infineon.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_infineon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm_infineon.c</a></div><div class='hunk'>@@ -51,34 +51,40 @@ static struct tpm_inf_dev tpm_dev;</div><div class='ctx'> </div><div class='ctx'> static inline void tpm_data_out(unsigned char data, unsigned char offset)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_HAS_IOPORT</div><div class='ctx'> 	if (tpm_dev.iotype == TPM_INF_IO_PORT)</div><div class='ctx'> 		outb(data, tpm_dev.data_regs + offset);</div><div class='ctx'> 	else</div><div class='add'>+#endif</div><div class='ctx'> 		writeb(data, tpm_dev.mem_base + tpm_dev.data_regs + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned char tpm_data_in(unsigned char offset)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_HAS_IOPORT</div><div class='ctx'> 	if (tpm_dev.iotype == TPM_INF_IO_PORT)</div><div class='ctx'> 		return inb(tpm_dev.data_regs + offset);</div><div class='del'>-	else</div><div class='del'>-		return readb(tpm_dev.mem_base + tpm_dev.data_regs + offset);</div><div class='add'>+#endif</div><div class='add'>+	return readb(tpm_dev.mem_base + tpm_dev.data_regs + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void tpm_config_out(unsigned char data, unsigned char offset)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_HAS_IOPORT</div><div class='ctx'> 	if (tpm_dev.iotype == TPM_INF_IO_PORT)</div><div class='ctx'> 		outb(data, tpm_dev.config_port + offset);</div><div class='ctx'> 	else</div><div class='add'>+#endif</div><div class='ctx'> 		writeb(data, tpm_dev.mem_base + tpm_dev.index_off + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned char tpm_config_in(unsigned char offset)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_HAS_IOPORT</div><div class='ctx'> 	if (tpm_dev.iotype == TPM_INF_IO_PORT)</div><div class='ctx'> 		return inb(tpm_dev.config_port + offset);</div><div class='del'>-	else</div><div class='del'>-		return readb(tpm_dev.mem_base + tpm_dev.index_off + offset);</div><div class='add'>+#endif</div><div class='add'>+	return readb(tpm_dev.mem_base + tpm_dev.index_off + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* TPM header definitions */</div><div class='head'>diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c<br/>index 714070ebb6e7..176cd8dbf1db 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_tis_core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/char/tpm/tpm_tis_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_tis_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/char/tpm/tpm_tis_core.c</a></div><div class='hunk'>@@ -1057,11 +1057,6 @@ static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)</div><div class='ctx'> 		clkrun_val &amp;= ~LPC_CLKRUN_EN;</div><div class='ctx'> 		iowrite32(clkrun_val, data-&gt;ilb_base_addr + LPC_CNTRL_OFFSET);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Write any random value on port 0x80 which is on LPC, to make</div><div class='del'>-		 * sure LPC clock is running before sending any TPM command.</div><div class='del'>-		 */</div><div class='del'>-		outb(0xCC, 0x80);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		data-&gt;clkrun_enabled--;</div><div class='ctx'> 		if (data-&gt;clkrun_enabled)</div><div class='hunk'>@@ -1072,13 +1067,15 @@ static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)</div><div class='ctx'> 		/* Enable LPC CLKRUN# */</div><div class='ctx'> 		clkrun_val |= LPC_CLKRUN_EN;</div><div class='ctx'> 		iowrite32(clkrun_val, data-&gt;ilb_base_addr + LPC_CNTRL_OFFSET);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Write any random value on port 0x80 which is on LPC, to make</div><div class='del'>-		 * sure LPC clock is running before sending any TPM command.</div><div class='del'>-		 */</div><div class='del'>-		outb(0xCC, 0x80);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HAS_IOPORT</div><div class='add'>+	/*</div><div class='add'>+	 * Write any random value on port 0x80 which is on LPC, to make</div><div class='add'>+	 * sure LPC clock is running before sending any TPM command.</div><div class='add'>+	 */</div><div class='add'>+	outb(0xCC, 0x80);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct tpm_class_ops tpm_tis = {</div><div class='head'>diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig<br/>index 50af5fc7f570..7517a0dfd15c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/Kconfig</a></div><div class='hunk'>@@ -451,8 +451,8 @@ config COMMON_CLK_FIXED_MMIO</div><div class='ctx'> </div><div class='ctx'> config COMMON_CLK_K210</div><div class='ctx'> 	bool "Clock driver for the Canaan Kendryte K210 SoC"</div><div class='del'>-	depends on OF &amp;&amp; RISCV &amp;&amp; SOC_CANAAN</div><div class='del'>-	default SOC_CANAAN</div><div class='add'>+	depends on OF &amp;&amp; RISCV &amp;&amp; SOC_CANAAN_K210</div><div class='add'>+	default SOC_CANAAN_K210</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the Canaan Kendryte K210 RISC-V SoC clocks.</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c<br/>index 8602c02047d0..45c5255bcd11 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/qcom/clk-smd-rpm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/qcom/clk-smd-rpm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/qcom/clk-smd-rpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/qcom/clk-smd-rpm.c</a></div><div class='hunk'>@@ -768,6 +768,7 @@ static struct clk_smd_rpm *msm8976_clks[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {</div><div class='ctx'> 	.clks = msm8976_clks,</div><div class='add'>+	.num_clks = ARRAY_SIZE(msm8976_clks),</div><div class='ctx'> 	.icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks,</div><div class='ctx'> 	.num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks),</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c<br/>index e7a4068b9f39..df9618ab7eea 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/qcom/gdsc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/qcom/gdsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/qcom/gdsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/qcom/gdsc.c</a></div><div class='hunk'>@@ -487,9 +487,14 @@ int gdsc_register(struct gdsc_desc *desc,</div><div class='ctx'> 		if (!scs[i] || !scs[i]-&gt;supply)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		scs[i]-&gt;rsupply = devm_regulator_get(dev, scs[i]-&gt;supply);</div><div class='del'>-		if (IS_ERR(scs[i]-&gt;rsupply))</div><div class='del'>-			return PTR_ERR(scs[i]-&gt;rsupply);</div><div class='add'>+		scs[i]-&gt;rsupply = devm_regulator_get_optional(dev, scs[i]-&gt;supply);</div><div class='add'>+		if (IS_ERR(scs[i]-&gt;rsupply)) {</div><div class='add'>+			ret = PTR_ERR(scs[i]-&gt;rsupply);</div><div class='add'>+			if (ret != -ENODEV)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			scs[i]-&gt;rsupply = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;num_domains = num;</div><div class='head'>diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clkout.c<br/>index 3484e6cc80ad..503c6f5b20d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/samsung/clk-exynos-clkout.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/samsung/clk-exynos-clkout.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/samsung/clk-exynos-clkout.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/samsung/clk-exynos-clkout.c</a></div><div class='hunk'>@@ -13,9 +13,9 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm.h&gt;</div><div class='del'>-#include &lt;linux/property.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS_CLKOUT_NR_CLKS		1</div><div class='ctx'> #define EXYNOS_CLKOUT_PARENTS		32</div><div class='hunk'>@@ -84,17 +84,24 @@ MODULE_DEVICE_TABLE(of, exynos_clkout_ids);</div><div class='ctx'> static int exynos_clkout_match_parent_dev(struct device *dev, u32 *mux_mask)</div><div class='ctx'> {</div><div class='ctx'> 	const struct exynos_clkout_variant *variant;</div><div class='add'>+	const struct of_device_id *match;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;parent) {</div><div class='ctx'> 		dev_err(dev, "not instantiated from MFD\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	variant = device_get_match_data(dev-&gt;parent);</div><div class='del'>-	if (!variant) {</div><div class='add'>+	/*</div><div class='add'>+	 * 'exynos_clkout_ids' arrays is not the ids array matched by</div><div class='add'>+	 * the dev-&gt;parent driver, so of_device_get_match_data() or</div><div class='add'>+	 * device_get_match_data() cannot be used here.</div><div class='add'>+	 */</div><div class='add'>+	match = of_match_device(exynos_clkout_ids, dev-&gt;parent);</div><div class='add'>+	if (!match) {</div><div class='ctx'> 		dev_err(dev, "cannot match parent device\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	variant = match-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	*mux_mask = variant-&gt;mux_mask;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br/>index 8951ffc14ff5..6a4b2b9ef30a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu-sun50i-a64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu-sun50i-a64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu-sun50i-a64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/sunxi-ng/ccu-sun50i-a64.c</a></div><div class='hunk'>@@ -182,6 +182,8 @@ static struct ccu_nkm pll_mipi_clk = {</div><div class='ctx'> 					      &amp;ccu_nkm_ops,</div><div class='ctx'> 					      CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),</div><div class='ctx'> 		.features	= CCU_FEATURE_CLOSEST_RATE,</div><div class='add'>+		.min_rate	= 500000000,</div><div class='add'>+		.max_rate	= 1400000000,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c<br/>index 42568c616181..892df807275c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu-sun50i-h6.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu-sun50i-h6.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu-sun50i-h6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/sunxi-ng/ccu-sun50i-h6.c</a></div><div class='hunk'>@@ -1181,11 +1181,18 @@ static const u32 usb2_clk_regs[] = {</div><div class='ctx'> 	SUN50I_H6_USB3_CLK_REG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct ccu_mux_nb sun50i_h6_cpu_nb = {</div><div class='add'>+	.common		= &amp;cpux_clk.common,</div><div class='add'>+	.cm		= &amp;cpux_clk.mux,</div><div class='add'>+	.delay_us       = 1,</div><div class='add'>+	.bypass_index   = 0, /* index of 24 MHz oscillator */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int sun50i_h6_ccu_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *reg;</div><div class='add'>+	int i, ret;</div><div class='ctx'> 	u32 val;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	reg = devm_platform_ioremap_resource(pdev, 0);</div><div class='ctx'> 	if (IS_ERR(reg))</div><div class='hunk'>@@ -1252,7 +1259,15 @@ static int sun50i_h6_ccu_probe(struct platform_device *pdev)</div><div class='ctx'> 	val |= BIT(24);</div><div class='ctx'> 	writel(val, reg + SUN50I_H6_HDMI_CEC_CLK_REG);</div><div class='ctx'> </div><div class='del'>-	return devm_sunxi_ccu_probe(&amp;pdev-&gt;dev, reg, &amp;sun50i_h6_ccu_desc);</div><div class='add'>+	ret = devm_sunxi_ccu_probe(&amp;pdev-&gt;dev, reg, &amp;sun50i_h6_ccu_desc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reparent CPU during PLL CPUX rate changes */</div><div class='add'>+	ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,</div><div class='add'>+				  &amp;sun50i_h6_cpu_nb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id sun50i_h6_ccu_ids[] = {</div><div class='head'>diff --git a/drivers/clk/sunxi-ng/ccu_common.c b/drivers/clk/sunxi-ng/ccu_common.c<br/>index 8babce55302f..ac0091b4ce24 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu_common.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/sunxi-ng/ccu_common.c</a></div><div class='hunk'>@@ -44,6 +44,16 @@ bool ccu_is_better_rate(struct ccu_common *common,</div><div class='ctx'> 			unsigned long current_rate,</div><div class='ctx'> 			unsigned long best_rate)</div><div class='ctx'> {</div><div class='add'>+	unsigned long min_rate, max_rate;</div><div class='add'>+</div><div class='add'>+	clk_hw_get_rate_range(&amp;common-&gt;hw, &amp;min_rate, &amp;max_rate);</div><div class='add'>+</div><div class='add'>+	if (current_rate &gt; max_rate)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (current_rate &lt; min_rate)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	if (common-&gt;features &amp; CCU_FEATURE_CLOSEST_RATE)</div><div class='ctx'> 		return abs(current_rate - target_rate) &lt; abs(best_rate - target_rate);</div><div class='ctx'> </div><div class='hunk'>@@ -122,6 +132,7 @@ static int sunxi_ccu_probe(struct sunxi_ccu *ccu, struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; desc-&gt;hw_clks-&gt;num ; i++) {</div><div class='ctx'> 		struct clk_hw *hw = desc-&gt;hw_clks-&gt;hws[i];</div><div class='add'>+		struct ccu_common *common = hw_to_ccu_common(hw);</div><div class='ctx'> 		const char *name;</div><div class='ctx'> </div><div class='ctx'> 		if (!hw)</div><div class='hunk'>@@ -136,6 +147,14 @@ static int sunxi_ccu_probe(struct sunxi_ccu *ccu, struct device *dev,</div><div class='ctx'> 			pr_err("Couldn't register clock %d - %s\n", i, name);</div><div class='ctx'> 			goto err_clk_unreg;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (common-&gt;max_rate)</div><div class='add'>+			clk_hw_set_rate_range(hw, common-&gt;min_rate,</div><div class='add'>+					      common-&gt;max_rate);</div><div class='add'>+		else</div><div class='add'>+			WARN(common-&gt;min_rate,</div><div class='add'>+			     "No max_rate, ignoring min_rate of clock %d - %s\n",</div><div class='add'>+			     i, name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,</div><div class='head'>diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h<br/>index 942a72c09437..329734f8cf42 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu_common.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clk/sunxi-ng/ccu_common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu_common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clk/sunxi-ng/ccu_common.h</a></div><div class='hunk'>@@ -31,6 +31,9 @@ struct ccu_common {</div><div class='ctx'> 	u16		lock_reg;</div><div class='ctx'> 	u32		prediv;</div><div class='ctx'> </div><div class='add'>+	unsigned long	min_rate;</div><div class='add'>+	unsigned long	max_rate;</div><div class='add'>+</div><div class='ctx'> 	unsigned long	features;</div><div class='ctx'> 	spinlock_t	*lock;</div><div class='ctx'> 	struct clk_hw	hw;</div><div class='head'>diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c<br/>index 8d4a52056684..5bb43cc1a8df 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/arm_arch_timer.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clocksource/arm_arch_timer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/arm_arch_timer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clocksource/arm_arch_timer.c</a></div><div class='hunk'>@@ -331,7 +331,7 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)</div><div class='ctx'> 	return __hisi_161010101_read_reg(cntvct_el0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ate_acpi_oem_info hisi_161010101_oem_info[] = {</div><div class='add'>+static const struct ate_acpi_oem_info hisi_161010101_oem_info[] = {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note that trailing spaces are required to properly match</div><div class='ctx'> 	 * the OEM table information.</div><div class='head'>diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c<br/>index 8da972dc1713..3fcbd02b2483 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/renesas-ostm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clocksource/renesas-ostm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/renesas-ostm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clocksource/renesas-ostm.c</a></div><div class='hunk'>@@ -210,6 +210,7 @@ static int __init ostm_init(struct device_node *np)</div><div class='ctx'> 		pr_info("%pOF: used for clock events\n", np);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	of_node_set_flag(np, OF_POPULATED);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_cleanup:</div><div class='hunk'>@@ -224,7 +225,7 @@ err_free:</div><div class='ctx'> </div><div class='ctx'> TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_RZG2L</div><div class='add'>+#if defined(CONFIG_ARCH_RZG2L) || defined(CONFIG_ARCH_R9A09G057)</div><div class='ctx'> static int __init ostm_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='head'>diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c<br/>index 56acf2617262..b7a34b1a975e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/timer-ti-dm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/clocksource/timer-ti-dm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/timer-ti-dm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/clocksource/timer-ti-dm.c</a></div><div class='hunk'>@@ -129,7 +129,6 @@ struct dmtimer {</div><div class='ctx'> 	void __iomem	*func_base;	/* function register base */</div><div class='ctx'> </div><div class='ctx'> 	atomic_t enabled;</div><div class='del'>-	unsigned long rate;</div><div class='ctx'> 	unsigned reserved:1;</div><div class='ctx'> 	unsigned posted:1;</div><div class='ctx'> 	unsigned omap1:1;</div><div class='head'>diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c<br/>index 2015c9fcc3c9..6a342b0c0140 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/amd-pstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/amd-pstate.c</a></div><div class='hunk'>@@ -50,7 +50,8 @@</div><div class='ctx'> </div><div class='ctx'> #define AMD_PSTATE_TRANSITION_LATENCY	20000</div><div class='ctx'> #define AMD_PSTATE_TRANSITION_DELAY	1000</div><div class='del'>-#define AMD_PSTATE_PREFCORE_THRESHOLD	166</div><div class='add'>+#define CPPC_HIGHEST_PERF_PERFORMANCE	196</div><div class='add'>+#define CPPC_HIGHEST_PERF_DEFAULT	166</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * TODO: We need more time to fine tune processors with shared memory solution</div><div class='hunk'>@@ -67,6 +68,7 @@ static struct cpufreq_driver amd_pstate_epp_driver;</div><div class='ctx'> static int cppc_state = AMD_PSTATE_UNDEFINED;</div><div class='ctx'> static bool cppc_enabled;</div><div class='ctx'> static bool amd_pstate_prefcore = true;</div><div class='add'>+static struct quirk_entry *quirks;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * AMD Energy Preference Performance (EPP)</div><div class='hunk'>@@ -111,6 +113,41 @@ static unsigned int epp_values[] = {</div><div class='ctx'> </div><div class='ctx'> typedef int (*cppc_mode_transition_fn)(int);</div><div class='ctx'> </div><div class='add'>+static struct quirk_entry quirk_amd_7k62 = {</div><div class='add'>+	.nominal_freq = 2600,</div><div class='add'>+	.lowest_freq = 550,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init dmi_matched_7k62_bios_bug(const struct dmi_system_id *dmi)</div><div class='add'>+{</div><div class='add'>+	/**</div><div class='add'>+	 * match the broken bios for family 17h processor support CPPC V2</div><div class='add'>+	 * broken BIOS lack of nominal_freq and lowest_freq capabilities</div><div class='add'>+	 * definition in ACPI tables</div><div class='add'>+	 */</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_ZEN2)) {</div><div class='add'>+		quirks = dmi-&gt;driver_data;</div><div class='add'>+		pr_info("Overriding nominal and lowest frequencies for %s\n", dmi-&gt;ident);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {</div><div class='add'>+	{</div><div class='add'>+		.callback = dmi_matched_7k62_bios_bug,</div><div class='add'>+		.ident = "AMD EPYC 7K62",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BIOS_VERSION, "5.14"),</div><div class='add'>+			DMI_MATCH(DMI_BIOS_RELEASE, "12/12/2019"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;quirk_amd_7k62,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);</div><div class='add'>+</div><div class='ctx'> static inline int get_mode_idx_from_str(const char *str, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -290,6 +327,21 @@ static inline int amd_pstate_enable(bool enable)</div><div class='ctx'> 	return static_call(amd_pstate_enable)(enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata)</div><div class='add'>+{</div><div class='add'>+	struct cpuinfo_x86 *c = &amp;cpu_data(0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f,</div><div class='add'>+	 * the highest performance level is set to 196.</div><div class='add'>+	 * https://bugzilla.kernel.org/show_bug.cgi?id=218759</div><div class='add'>+	 */</div><div class='add'>+	if (c-&gt;x86 == 0x19 &amp;&amp; (c-&gt;x86_model &gt;= 0x70 &amp;&amp; c-&gt;x86_model &lt;= 0x7f))</div><div class='add'>+		return CPPC_HIGHEST_PERF_PERFORMANCE;</div><div class='add'>+</div><div class='add'>+	return CPPC_HIGHEST_PERF_DEFAULT;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pstate_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cap1;</div><div class='hunk'>@@ -306,7 +358,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> 	 * the default max perf.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpudata-&gt;hw_prefcore)</div><div class='del'>-		highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;</div><div class='add'>+		highest_perf = amd_pstate_highest_perf_set(cpudata);</div><div class='ctx'> 	else</div><div class='ctx'> 		highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);</div><div class='ctx'> </div><div class='hunk'>@@ -330,7 +382,7 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (cpudata-&gt;hw_prefcore)</div><div class='del'>-		highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;</div><div class='add'>+		highest_perf = amd_pstate_highest_perf_set(cpudata);</div><div class='ctx'> 	else</div><div class='ctx'> 		highest_perf = cppc_perf.highest_perf;</div><div class='ctx'> </div><div class='hunk'>@@ -604,78 +656,6 @@ static void amd_pstate_adjust_perf(unsigned int cpu,</div><div class='ctx'> 	cpufreq_cpu_put(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amd_get_min_freq(struct amd_cpudata *cpudata)</div><div class='del'>-{</div><div class='del'>-	struct cppc_perf_caps cppc_perf;</div><div class='del'>-</div><div class='del'>-	int ret = cppc_get_perf_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Switch to khz */</div><div class='del'>-	return cppc_perf.lowest_freq * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int amd_get_max_freq(struct amd_cpudata *cpudata)</div><div class='del'>-{</div><div class='del'>-	struct cppc_perf_caps cppc_perf;</div><div class='del'>-	u32 max_perf, max_freq, nominal_freq, nominal_perf;</div><div class='del'>-	u64 boost_ratio;</div><div class='del'>-</div><div class='del'>-	int ret = cppc_get_perf_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	nominal_freq = cppc_perf.nominal_freq;</div><div class='del'>-	nominal_perf = READ_ONCE(cpudata-&gt;nominal_perf);</div><div class='del'>-	max_perf = READ_ONCE(cpudata-&gt;highest_perf);</div><div class='del'>-</div><div class='del'>-	boost_ratio = div_u64(max_perf &lt;&lt; SCHED_CAPACITY_SHIFT,</div><div class='del'>-			      nominal_perf);</div><div class='del'>-</div><div class='del'>-	max_freq = nominal_freq * boost_ratio &gt;&gt; SCHED_CAPACITY_SHIFT;</div><div class='del'>-</div><div class='del'>-	/* Switch to khz */</div><div class='del'>-	return max_freq * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int amd_get_nominal_freq(struct amd_cpudata *cpudata)</div><div class='del'>-{</div><div class='del'>-	struct cppc_perf_caps cppc_perf;</div><div class='del'>-</div><div class='del'>-	int ret = cppc_get_perf_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Switch to khz */</div><div class='del'>-	return cppc_perf.nominal_freq * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)</div><div class='del'>-{</div><div class='del'>-	struct cppc_perf_caps cppc_perf;</div><div class='del'>-	u32 lowest_nonlinear_freq, lowest_nonlinear_perf,</div><div class='del'>-	    nominal_freq, nominal_perf;</div><div class='del'>-	u64 lowest_nonlinear_ratio;</div><div class='del'>-</div><div class='del'>-	int ret = cppc_get_perf_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	nominal_freq = cppc_perf.nominal_freq;</div><div class='del'>-	nominal_perf = READ_ONCE(cpudata-&gt;nominal_perf);</div><div class='del'>-</div><div class='del'>-	lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;</div><div class='del'>-</div><div class='del'>-	lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf &lt;&lt; SCHED_CAPACITY_SHIFT,</div><div class='del'>-					 nominal_perf);</div><div class='del'>-</div><div class='del'>-	lowest_nonlinear_freq = nominal_freq * lowest_nonlinear_ratio &gt;&gt; SCHED_CAPACITY_SHIFT;</div><div class='del'>-</div><div class='del'>-	/* Switch to khz */</div><div class='del'>-	return lowest_nonlinear_freq * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='hunk'>@@ -828,9 +808,93 @@ free_cpufreq_put:</div><div class='ctx'> 	mutex_unlock(&amp;amd_pstate_driver_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Get pstate transition delay time from ACPI tables that firmware set</div><div class='add'>+ * instead of using hardcode value directly.</div><div class='add'>+ */</div><div class='add'>+static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	u32 transition_delay_ns;</div><div class='add'>+</div><div class='add'>+	transition_delay_ns = cppc_get_transition_latency(cpu);</div><div class='add'>+	if (transition_delay_ns == CPUFREQ_ETERNAL)</div><div class='add'>+		return AMD_PSTATE_TRANSITION_DELAY;</div><div class='add'>+</div><div class='add'>+	return transition_delay_ns / NSEC_PER_USEC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get pstate transition latency value from ACPI tables that firmware</div><div class='add'>+ * set instead of using hardcode value directly.</div><div class='add'>+ */</div><div class='add'>+static u32 amd_pstate_get_transition_latency(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	u32 transition_latency;</div><div class='add'>+</div><div class='add'>+	transition_latency = cppc_get_transition_latency(cpu);</div><div class='add'>+	if (transition_latency  == CPUFREQ_ETERNAL)</div><div class='add'>+		return AMD_PSTATE_TRANSITION_LATENCY;</div><div class='add'>+</div><div class='add'>+	return transition_latency;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * amd_pstate_init_freq: Initialize the max_freq, min_freq,</div><div class='add'>+ *                       nominal_freq and lowest_nonlinear_freq for</div><div class='add'>+ *                       the @cpudata object.</div><div class='add'>+ *</div><div class='add'>+ *  Requires: highest_perf, lowest_perf, nominal_perf and</div><div class='add'>+ *            lowest_nonlinear_perf members of @cpudata to be</div><div class='add'>+ *            initialized.</div><div class='add'>+ *</div><div class='add'>+ *  Returns 0 on success, non-zero value on failure.</div><div class='add'>+ */</div><div class='add'>+static int amd_pstate_init_freq(struct amd_cpudata *cpudata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 min_freq;</div><div class='add'>+	u32 highest_perf, max_freq;</div><div class='add'>+	u32 nominal_perf, nominal_freq;</div><div class='add'>+	u32 lowest_nonlinear_perf, lowest_nonlinear_freq;</div><div class='add'>+	u32 boost_ratio, lowest_nonlinear_ratio;</div><div class='add'>+	struct cppc_perf_caps cppc_perf;</div><div class='add'>+</div><div class='add'>+	ret = cppc_get_perf_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (quirks &amp;&amp; quirks-&gt;lowest_freq)</div><div class='add'>+		min_freq = quirks-&gt;lowest_freq * 1000;</div><div class='add'>+	else</div><div class='add'>+		min_freq = cppc_perf.lowest_freq * 1000;</div><div class='add'>+</div><div class='add'>+	if (quirks &amp;&amp; quirks-&gt;nominal_freq)</div><div class='add'>+		nominal_freq = quirks-&gt;nominal_freq ;</div><div class='add'>+	else</div><div class='add'>+		nominal_freq = cppc_perf.nominal_freq;</div><div class='add'>+</div><div class='add'>+	nominal_perf = READ_ONCE(cpudata-&gt;nominal_perf);</div><div class='add'>+</div><div class='add'>+	highest_perf = READ_ONCE(cpudata-&gt;highest_perf);</div><div class='add'>+	boost_ratio = div_u64(highest_perf &lt;&lt; SCHED_CAPACITY_SHIFT, nominal_perf);</div><div class='add'>+	max_freq = (nominal_freq * boost_ratio &gt;&gt; SCHED_CAPACITY_SHIFT) * 1000;</div><div class='add'>+</div><div class='add'>+	lowest_nonlinear_perf = READ_ONCE(cpudata-&gt;lowest_nonlinear_perf);</div><div class='add'>+	lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf &lt;&lt; SCHED_CAPACITY_SHIFT,</div><div class='add'>+					 nominal_perf);</div><div class='add'>+	lowest_nonlinear_freq = (nominal_freq * lowest_nonlinear_ratio &gt;&gt; SCHED_CAPACITY_SHIFT) * 1000;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(cpudata-&gt;min_freq, min_freq);</div><div class='add'>+	WRITE_ONCE(cpudata-&gt;lowest_nonlinear_freq, lowest_nonlinear_freq);</div><div class='add'>+	WRITE_ONCE(cpudata-&gt;nominal_freq, nominal_freq);</div><div class='add'>+	WRITE_ONCE(cpudata-&gt;max_freq, max_freq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amd_pstate_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;</div><div class='add'>+	int min_freq, max_freq, nominal_freq, ret;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct amd_cpudata *cpudata;</div><div class='ctx'> </div><div class='hunk'>@@ -855,20 +919,25 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto free_cpudata1;</div><div class='ctx'> </div><div class='del'>-	min_freq = amd_get_min_freq(cpudata);</div><div class='del'>-	max_freq = amd_get_max_freq(cpudata);</div><div class='del'>-	nominal_freq = amd_get_nominal_freq(cpudata);</div><div class='del'>-	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);</div><div class='add'>+	ret = amd_pstate_init_freq(cpudata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_cpudata1;</div><div class='add'>+</div><div class='add'>+	min_freq = READ_ONCE(cpudata-&gt;min_freq);</div><div class='add'>+	max_freq = READ_ONCE(cpudata-&gt;max_freq);</div><div class='add'>+	nominal_freq = READ_ONCE(cpudata-&gt;nominal_freq);</div><div class='ctx'> </div><div class='del'>-	if (min_freq &lt; 0 || max_freq &lt; 0 || min_freq &gt; max_freq) {</div><div class='del'>-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",</div><div class='del'>-			min_freq, max_freq);</div><div class='add'>+	if (min_freq &lt;= 0 || max_freq &lt;= 0 ||</div><div class='add'>+	    nominal_freq &lt;= 0 || min_freq &gt; max_freq) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"min_freq(%d) or max_freq(%d) or nominal_freq (%d) value is incorrect, check _CPC in ACPI tables\n",</div><div class='add'>+			min_freq, max_freq, nominal_freq);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto free_cpudata1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	policy-&gt;cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY;</div><div class='del'>-	policy-&gt;transition_delay_us = AMD_PSTATE_TRANSITION_DELAY;</div><div class='add'>+	policy-&gt;cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy-&gt;cpu);</div><div class='add'>+	policy-&gt;transition_delay_us = amd_pstate_get_transition_delay_us(policy-&gt;cpu);</div><div class='ctx'> </div><div class='ctx'> 	policy-&gt;min = min_freq;</div><div class='ctx'> 	policy-&gt;max = max_freq;</div><div class='hunk'>@@ -896,13 +965,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 		goto free_cpudata2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initial processor data capability frequencies */</div><div class='del'>-	cpudata-&gt;max_freq = max_freq;</div><div class='del'>-	cpudata-&gt;min_freq = min_freq;</div><div class='ctx'> 	cpudata-&gt;max_limit_freq = max_freq;</div><div class='ctx'> 	cpudata-&gt;min_limit_freq = min_freq;</div><div class='del'>-	cpudata-&gt;nominal_freq = nominal_freq;</div><div class='del'>-	cpudata-&gt;lowest_nonlinear_freq = lowest_nonlinear_freq;</div><div class='ctx'> </div><div class='ctx'> 	policy-&gt;driver_data = cpudata;</div><div class='ctx'> </div><div class='hunk'>@@ -966,7 +1030,7 @@ static ssize_t show_amd_pstate_max_freq(struct cpufreq_policy *policy,</div><div class='ctx'> 	int max_freq;</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='ctx'> </div><div class='del'>-	max_freq = amd_get_max_freq(cpudata);</div><div class='add'>+	max_freq = READ_ONCE(cpudata-&gt;max_freq);</div><div class='ctx'> 	if (max_freq &lt; 0)</div><div class='ctx'> 		return max_freq;</div><div class='ctx'> </div><div class='hunk'>@@ -979,7 +1043,7 @@ static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli</div><div class='ctx'> 	int freq;</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='ctx'> </div><div class='del'>-	freq = amd_get_lowest_nonlinear_freq(cpudata);</div><div class='add'>+	freq = READ_ONCE(cpudata-&gt;lowest_nonlinear_freq);</div><div class='ctx'> 	if (freq &lt; 0)</div><div class='ctx'> 		return freq;</div><div class='ctx'> </div><div class='hunk'>@@ -1290,7 +1354,7 @@ static bool amd_pstate_acpi_pm_profile_undefined(void)</div><div class='ctx'> </div><div class='ctx'> static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;</div><div class='add'>+	int min_freq, max_freq, nominal_freq, ret;</div><div class='ctx'> 	struct amd_cpudata *cpudata;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	u64 value;</div><div class='hunk'>@@ -1317,13 +1381,18 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto free_cpudata1;</div><div class='ctx'> </div><div class='del'>-	min_freq = amd_get_min_freq(cpudata);</div><div class='del'>-	max_freq = amd_get_max_freq(cpudata);</div><div class='del'>-	nominal_freq = amd_get_nominal_freq(cpudata);</div><div class='del'>-	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);</div><div class='del'>-	if (min_freq &lt; 0 || max_freq &lt; 0 || min_freq &gt; max_freq) {</div><div class='del'>-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",</div><div class='del'>-				min_freq, max_freq);</div><div class='add'>+	ret = amd_pstate_init_freq(cpudata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_cpudata1;</div><div class='add'>+</div><div class='add'>+	min_freq = READ_ONCE(cpudata-&gt;min_freq);</div><div class='add'>+	max_freq = READ_ONCE(cpudata-&gt;max_freq);</div><div class='add'>+	nominal_freq = READ_ONCE(cpudata-&gt;nominal_freq);</div><div class='add'>+	if (min_freq &lt;= 0 || max_freq &lt;= 0 ||</div><div class='add'>+	    nominal_freq &lt;= 0 || min_freq &gt; max_freq) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"min_freq(%d) or max_freq(%d) or nominal_freq(%d) value is incorrect, check _CPC in ACPI tables\n",</div><div class='add'>+			min_freq, max_freq, nominal_freq);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto free_cpudata1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1333,12 +1402,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 	/* It will be updated by governor */</div><div class='ctx'> 	policy-&gt;cur = policy-&gt;cpuinfo.min_freq;</div><div class='ctx'> </div><div class='del'>-	/* Initial processor data capability frequencies */</div><div class='del'>-	cpudata-&gt;max_freq = max_freq;</div><div class='del'>-	cpudata-&gt;min_freq = min_freq;</div><div class='del'>-	cpudata-&gt;nominal_freq = nominal_freq;</div><div class='del'>-	cpudata-&gt;lowest_nonlinear_freq = lowest_nonlinear_freq;</div><div class='del'>-</div><div class='ctx'> 	policy-&gt;driver_data = cpudata;</div><div class='ctx'> </div><div class='ctx'> 	cpudata-&gt;epp_cached = amd_pstate_get_epp(cpudata, 0);</div><div class='hunk'>@@ -1656,6 +1719,11 @@ static int __init amd_pstate_init(void)</div><div class='ctx'> 	if (cpufreq_get_current_driver())</div><div class='ctx'> 		return -EEXIST;</div><div class='ctx'> </div><div class='add'>+	quirks = NULL;</div><div class='add'>+</div><div class='add'>+	/* check if this machine need CPPC quirks */</div><div class='add'>+	dmi_check_system(amd_pstate_quirks_table);</div><div class='add'>+</div><div class='ctx'> 	switch (cppc_state) {</div><div class='ctx'> 	case AMD_PSTATE_UNDEFINED:</div><div class='ctx'> 		/* Disable on the following configs by default:</div><div class='head'>diff --git a/drivers/cpufreq/brcmstb-avs-cpufreq.c b/drivers/cpufreq/brcmstb-avs-cpufreq.c<br/>index 1a1857b0a6f4..ea8438550b49 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/brcmstb-avs-cpufreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/brcmstb-avs-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/brcmstb-avs-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/brcmstb-avs-cpufreq.c</a></div><div class='hunk'>@@ -481,9 +481,12 @@ static bool brcm_avs_is_firmware_loaded(struct private_data *priv)</div><div class='ctx'> static unsigned int brcm_avs_cpufreq_get(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='add'>+	struct private_data *priv;</div><div class='add'>+</div><div class='ctx'> 	if (!policy)</div><div class='ctx'> 		return 0;</div><div class='del'>-	struct private_data *priv = policy-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	priv = policy-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	cpufreq_cpu_put(policy);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c<br/>index 64420d9cfd1e..15f1d41920a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cppc_cpufreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cppc_cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cppc_cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/cppc_cpufreq.c</a></div><div class='hunk'>@@ -741,10 +741,15 @@ static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};</div><div class='ctx'> 	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	struct cppc_cpudata *cpu_data = policy-&gt;driver_data;</div><div class='add'>+	struct cppc_cpudata *cpu_data;</div><div class='ctx'> 	u64 delivered_perf;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!policy)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	cpu_data = policy-&gt;driver_data;</div><div class='add'>+</div><div class='ctx'> 	cpufreq_cpu_put(policy);</div><div class='ctx'> </div><div class='ctx'> 	ret = cppc_get_perf_ctrs(cpu, &amp;fb_ctrs_t0);</div><div class='hunk'>@@ -822,10 +827,15 @@ static struct cpufreq_driver cppc_cpufreq_driver = {</div><div class='ctx'> static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	struct cppc_cpudata *cpu_data = policy-&gt;driver_data;</div><div class='add'>+	struct cppc_cpudata *cpu_data;</div><div class='ctx'> 	u64 desired_perf;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!policy)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	cpu_data = policy-&gt;driver_data;</div><div class='add'>+</div><div class='ctx'> 	cpufreq_cpu_put(policy);</div><div class='ctx'> </div><div class='ctx'> 	ret = cppc_get_desired_perf(cpu, &amp;desired_perf);</div><div class='head'>diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c<br/>index b993a498084b..c74dd1e01e0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq-dt-platdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cpufreq-dt-platdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq-dt-platdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/cpufreq-dt-platdev.c</a></div><div class='hunk'>@@ -104,6 +104,9 @@ static const struct of_device_id allowlist[] __initconst = {</div><div class='ctx'>  */</div><div class='ctx'> static const struct of_device_id blocklist[] __initconst = {</div><div class='ctx'> 	{ .compatible = "allwinner,sun50i-h6", },</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h616", },</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h618", },</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h700", },</div><div class='ctx'> </div><div class='ctx'> 	{ .compatible = "apple,arm-platform", },</div><div class='ctx'> </div><div class='hunk'>@@ -195,19 +198,18 @@ static const struct of_device_id blocklist[] __initconst = {</div><div class='ctx'> </div><div class='ctx'> static bool __init cpu0_node_has_opp_v2_prop(void)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np = of_cpu_device_node_get(0);</div><div class='add'>+	struct device_node *np __free(device_node) = of_cpu_device_node_get(0);</div><div class='ctx'> 	bool ret = false;</div><div class='ctx'> </div><div class='ctx'> 	if (of_property_present(np, "operating-points-v2"))</div><div class='ctx'> 		ret = true;</div><div class='ctx'> </div><div class='del'>-	of_node_put(np);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init cpufreq_dt_platdev_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np = of_find_node_by_path("/");</div><div class='add'>+	struct device_node *np __free(device_node) = of_find_node_by_path("/");</div><div class='ctx'> 	const struct of_device_id *match;</div><div class='ctx'> 	const void *data = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -223,11 +225,9 @@ static int __init cpufreq_dt_platdev_init(void)</div><div class='ctx'> 	if (cpu0_node_has_opp_v2_prop() &amp;&amp; !of_match_node(blocklist, np))</div><div class='ctx'> 		goto create_pdev;</div><div class='ctx'> </div><div class='del'>-	of_node_put(np);</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> create_pdev:</div><div class='del'>-	of_node_put(np);</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",</div><div class='ctx'> 			       -1, data,</div><div class='ctx'> 			       sizeof(struct cpufreq_dt_platform_data)));</div><div class='head'>diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c<br/>index 2d83bbc65dd0..907e22632fda 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq-dt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cpufreq-dt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq-dt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/cpufreq-dt.c</a></div><div class='hunk'>@@ -68,12 +68,9 @@ static int set_target(struct cpufreq_policy *policy, unsigned int index)</div><div class='ctx'>  */</div><div class='ctx'> static const char *find_supply_name(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np;</div><div class='add'>+	struct device_node *np __free(device_node) = of_node_get(dev-&gt;of_node);</div><div class='ctx'> 	struct property *pp;</div><div class='ctx'> 	int cpu = dev-&gt;id;</div><div class='del'>-	const char *name = NULL;</div><div class='del'>-</div><div class='del'>-	np = of_node_get(dev-&gt;of_node);</div><div class='ctx'> </div><div class='ctx'> 	/* This must be valid for sure */</div><div class='ctx'> 	if (WARN_ON(!np))</div><div class='hunk'>@@ -82,22 +79,16 @@ static const char *find_supply_name(struct device *dev)</div><div class='ctx'> 	/* Try "cpu0" for older DTs */</div><div class='ctx'> 	if (!cpu) {</div><div class='ctx'> 		pp = of_find_property(np, "cpu0-supply", NULL);</div><div class='del'>-		if (pp) {</div><div class='del'>-			name = "cpu0";</div><div class='del'>-			goto node_put;</div><div class='del'>-		}</div><div class='add'>+		if (pp)</div><div class='add'>+			return "cpu0";</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pp = of_find_property(np, "cpu-supply", NULL);</div><div class='del'>-	if (pp) {</div><div class='del'>-		name = "cpu";</div><div class='del'>-		goto node_put;</div><div class='del'>-	}</div><div class='add'>+	if (pp)</div><div class='add'>+		return "cpu";</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "no regulator for cpu%d\n", cpu);</div><div class='del'>-node_put:</div><div class='del'>-	of_node_put(np);</div><div class='del'>-	return name;</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpufreq_init(struct cpufreq_policy *policy)</div><div class='head'>diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c<br/>index 66e10a19d76a..a45aac17c20f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/cpufreq.c</a></div><div class='hunk'>@@ -1679,10 +1679,13 @@ static void __cpufreq_offline(unsigned int cpu, struct cpufreq_policy *policy)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpufreq_driver-&gt;offline) {</div><div class='ctx'> 		cpufreq_driver-&gt;offline(policy);</div><div class='del'>-	} else if (cpufreq_driver-&gt;exit) {</div><div class='del'>-		cpufreq_driver-&gt;exit(policy);</div><div class='del'>-		policy-&gt;freq_table = NULL;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (cpufreq_driver-&gt;exit)</div><div class='add'>+		cpufreq_driver-&gt;exit(policy);</div><div class='add'>+</div><div class='add'>+	policy-&gt;freq_table = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpufreq_offline(unsigned int cpu)</div><div class='hunk'>@@ -1740,7 +1743,7 @@ static void cpufreq_remove_dev(struct device *dev, struct subsys_interface *sif)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* We did light-weight exit earlier, do full tear down now */</div><div class='del'>-	if (cpufreq_driver-&gt;offline)</div><div class='add'>+	if (cpufreq_driver-&gt;offline &amp;&amp; cpufreq_driver-&gt;exit)</div><div class='ctx'> 		cpufreq_driver-&gt;exit(policy);</div><div class='ctx'> </div><div class='ctx'> 	up_write(&amp;policy-&gt;rwsem);</div><div class='hunk'>@@ -2582,6 +2585,40 @@ int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cpufreq_get_policy);</div><div class='ctx'> </div><div class='add'>+DEFINE_PER_CPU(unsigned long, cpufreq_pressure);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cpufreq_update_pressure() - Update cpufreq pressure for CPUs</div><div class='add'>+ * @policy: cpufreq policy of the CPUs.</div><div class='add'>+ *</div><div class='add'>+ * Update the value of cpufreq pressure for all @cpus in the policy.</div><div class='add'>+ */</div><div class='add'>+static void cpufreq_update_pressure(struct cpufreq_policy *policy)</div><div class='add'>+{</div><div class='add'>+	unsigned long max_capacity, capped_freq, pressure;</div><div class='add'>+	u32 max_freq;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	cpu = cpumask_first(policy-&gt;related_cpus);</div><div class='add'>+	max_freq = arch_scale_freq_ref(cpu);</div><div class='add'>+	capped_freq = policy-&gt;max;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle properly the boost frequencies, which should simply clean</div><div class='add'>+	 * the cpufreq pressure value.</div><div class='add'>+	 */</div><div class='add'>+	if (max_freq &lt;= capped_freq) {</div><div class='add'>+		pressure = 0;</div><div class='add'>+	} else {</div><div class='add'>+		max_capacity = arch_scale_cpu_capacity(cpu);</div><div class='add'>+		pressure = max_capacity -</div><div class='add'>+			   mult_frac(max_capacity, capped_freq, max_freq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_cpu(cpu, policy-&gt;related_cpus)</div><div class='add'>+		WRITE_ONCE(per_cpu(cpufreq_pressure, cpu), pressure);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * cpufreq_set_policy - Modify cpufreq policy parameters.</div><div class='ctx'>  * @policy: Policy object to modify.</div><div class='hunk'>@@ -2637,6 +2674,8 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy,</div><div class='ctx'> 	policy-&gt;max = __resolve_freq(policy, policy-&gt;max, CPUFREQ_RELATION_H);</div><div class='ctx'> 	trace_cpu_frequency_limits(policy);</div><div class='ctx'> </div><div class='add'>+	cpufreq_update_pressure(policy);</div><div class='add'>+</div><div class='ctx'> 	policy-&gt;cached_target_freq = UINT_MAX;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("new min and max freqs are %u - %u kHz\n",</div><div class='head'>diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c<br/>index c17dc51a5a02..10e80d912b8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/freq_table.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/freq_table.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/freq_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/freq_table.c</a></div><div class='hunk'>@@ -70,7 +70,7 @@ int cpufreq_frequency_table_verify(struct cpufreq_policy_data *policy,</div><div class='ctx'> 				   struct cpufreq_frequency_table *table)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_frequency_table *pos;</div><div class='del'>-	unsigned int freq, next_larger = ~0;</div><div class='add'>+	unsigned int freq, prev_smaller = 0;</div><div class='ctx'> 	bool found = false;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("request for verification of policy (%u - %u kHz) for cpu %u\n",</div><div class='hunk'>@@ -86,12 +86,12 @@ int cpufreq_frequency_table_verify(struct cpufreq_policy_data *policy,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if ((next_larger &gt; freq) &amp;&amp; (freq &gt; policy-&gt;max))</div><div class='del'>-			next_larger = freq;</div><div class='add'>+		if ((prev_smaller &lt; freq) &amp;&amp; (freq &lt;= policy-&gt;max))</div><div class='add'>+			prev_smaller = freq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!found) {</div><div class='del'>-		policy-&gt;max = next_larger;</div><div class='add'>+		policy-&gt;max = prev_smaller;</div><div class='ctx'> 		cpufreq_verify_within_cpu_limits(policy);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -194,7 +194,7 @@ int cpufreq_table_index_unsorted(struct cpufreq_policy *policy,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (optimal.driver_data &gt; i) {</div><div class='ctx'> 		if (suboptimal.driver_data &gt; i) {</div><div class='del'>-			WARN(1, "Invalid frequency table: %d\n", policy-&gt;cpu);</div><div class='add'>+			WARN(1, "Invalid frequency table: %u\n", policy-&gt;cpu);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -254,7 +254,7 @@ static ssize_t show_available_freqs(struct cpufreq_policy *policy, char *buf,</div><div class='ctx'> 		if (show_boost ^ (pos-&gt;flags &amp; CPUFREQ_BOOST_FREQ))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		count += sprintf(&amp;buf[count], "%d ", pos-&gt;frequency);</div><div class='add'>+		count += sprintf(&amp;buf[count], "%u ", pos-&gt;frequency);</div><div class='ctx'> 	}</div><div class='ctx'> 	count += sprintf(&amp;buf[count], "\n");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c<br/>index dbbf299f4219..4b986c044741 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/intel_pstate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/intel_pstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/intel_pstate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/intel_pstate.c</a></div><div class='hunk'>@@ -173,7 +173,6 @@ struct vid_data {</div><div class='ctx'>  *			based on the MSR_IA32_MISC_ENABLE value and whether or</div><div class='ctx'>  *			not the maximum reported turbo P-state is different from</div><div class='ctx'>  *			the maximum reported non-turbo one.</div><div class='del'>- * @turbo_disabled_mf:	The @turbo_disabled value reflected by cpuinfo.max_freq.</div><div class='ctx'>  * @min_perf_pct:	Minimum capacity limit in percent of the maximum turbo</div><div class='ctx'>  *			P-state capacity.</div><div class='ctx'>  * @max_perf_pct:	Maximum capacity limit in percent of the maximum turbo</div><div class='hunk'>@@ -182,7 +181,6 @@ struct vid_data {</div><div class='ctx'> struct global_params {</div><div class='ctx'> 	bool no_turbo;</div><div class='ctx'> 	bool turbo_disabled;</div><div class='del'>-	bool turbo_disabled_mf;</div><div class='ctx'> 	int max_perf_pct;</div><div class='ctx'> 	int min_perf_pct;</div><div class='ctx'> };</div><div class='hunk'>@@ -213,7 +211,7 @@ struct global_params {</div><div class='ctx'>  * @epp_policy:		Last saved policy used to set EPP/EPB</div><div class='ctx'>  * @epp_default:	Power on default HWP energy performance</div><div class='ctx'>  *			preference/bias</div><div class='del'>- * @epp_cached		Cached HWP energy-performance preference value</div><div class='add'>+ * @epp_cached:		Cached HWP energy-performance preference value</div><div class='ctx'>  * @hwp_req_cached:	Cached value of the last HWP Request MSR</div><div class='ctx'>  * @hwp_cap_cached:	Cached value of the last HWP Capabilities MSR</div><div class='ctx'>  * @last_io_update:	Last time when IO wake flag was set</div><div class='hunk'>@@ -292,11 +290,11 @@ struct pstate_funcs {</div><div class='ctx'> </div><div class='ctx'> static struct pstate_funcs pstate_funcs __read_mostly;</div><div class='ctx'> </div><div class='del'>-static int hwp_active __read_mostly;</div><div class='del'>-static int hwp_mode_bdw __read_mostly;</div><div class='del'>-static bool per_cpu_limits __read_mostly;</div><div class='add'>+static bool hwp_active __ro_after_init;</div><div class='add'>+static int hwp_mode_bdw __ro_after_init;</div><div class='add'>+static bool per_cpu_limits __ro_after_init;</div><div class='add'>+static bool hwp_forced __ro_after_init;</div><div class='ctx'> static bool hwp_boost __read_mostly;</div><div class='del'>-static bool hwp_forced __read_mostly;</div><div class='ctx'> </div><div class='ctx'> static struct cpufreq_driver *intel_pstate_driver __read_mostly;</div><div class='ctx'> </div><div class='hunk'>@@ -594,12 +592,13 @@ static void intel_pstate_hybrid_hwp_adjust(struct cpudata *cpu)</div><div class='ctx'> 	cpu-&gt;pstate.min_pstate = intel_pstate_freq_to_hwp(cpu, freq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void update_turbo_state(void)</div><div class='add'>+static bool turbo_is_disabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 misc_en;</div><div class='ctx'> </div><div class='ctx'> 	rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);</div><div class='del'>-	global.turbo_disabled = misc_en &amp; MSR_IA32_MISC_ENABLE_TURBO_DISABLE;</div><div class='add'>+</div><div class='add'>+	return !!(misc_en &amp; MSR_IA32_MISC_ENABLE_TURBO_DISABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int min_perf_pct_min(void)</div><div class='hunk'>@@ -1154,12 +1153,15 @@ static void intel_pstate_update_policies(void)</div><div class='ctx'> static void __intel_pstate_update_max_freq(struct cpudata *cpudata,</div><div class='ctx'> 					   struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	policy-&gt;cpuinfo.max_freq = global.turbo_disabled_mf ?</div><div class='add'>+	intel_pstate_get_hwp_cap(cpudata);</div><div class='add'>+</div><div class='add'>+	policy-&gt;cpuinfo.max_freq = READ_ONCE(global.no_turbo) ?</div><div class='ctx'> 			cpudata-&gt;pstate.max_freq : cpudata-&gt;pstate.turbo_freq;</div><div class='add'>+</div><div class='ctx'> 	refresh_frequency_limits(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_pstate_update_max_freq(unsigned int cpu)</div><div class='add'>+static void intel_pstate_update_limits(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -1171,25 +1173,12 @@ static void intel_pstate_update_max_freq(unsigned int cpu)</div><div class='ctx'> 	cpufreq_cpu_release(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_pstate_update_limits(unsigned int cpu)</div><div class='add'>+static void intel_pstate_update_limits_for_all(void)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;intel_pstate_driver_lock);</div><div class='del'>-</div><div class='del'>-	update_turbo_state();</div><div class='del'>-	/*</div><div class='del'>-	 * If turbo has been turned on or off globally, policy limits for</div><div class='del'>-	 * all CPUs need to be updated to reflect that.</div><div class='del'>-	 */</div><div class='del'>-	if (global.turbo_disabled_mf != global.turbo_disabled) {</div><div class='del'>-		global.turbo_disabled_mf = global.turbo_disabled;</div><div class='del'>-		arch_set_max_freq_ratio(global.turbo_disabled);</div><div class='del'>-		for_each_possible_cpu(cpu)</div><div class='del'>-			intel_pstate_update_max_freq(cpu);</div><div class='del'>-	} else {</div><div class='del'>-		cpufreq_update_policy(cpu);</div><div class='del'>-	}</div><div class='add'>+	int cpu;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='add'>+	for_each_possible_cpu(cpu)</div><div class='add'>+		intel_pstate_update_limits(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /************************** sysfs begin ************************/</div><div class='hunk'>@@ -1287,11 +1276,7 @@ static ssize_t show_no_turbo(struct kobject *kobj,</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='del'>-	if (global.turbo_disabled)</div><div class='del'>-		ret = sprintf(buf, "%u\n", global.turbo_disabled);</div><div class='del'>-	else</div><div class='del'>-		ret = sprintf(buf, "%u\n", global.no_turbo);</div><div class='add'>+	ret = sprintf(buf, "%u\n", global.no_turbo);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1302,32 +1287,34 @@ static ssize_t store_no_turbo(struct kobject *a, struct kobj_attribute *b,</div><div class='ctx'> 			      const char *buf, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int input;</div><div class='del'>-	int ret;</div><div class='add'>+	bool no_turbo;</div><div class='ctx'> </div><div class='del'>-	ret = sscanf(buf, "%u", &amp;input);</div><div class='del'>-	if (ret != 1)</div><div class='add'>+	if (sscanf(buf, "%u", &amp;input) != 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;intel_pstate_driver_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_pstate_driver) {</div><div class='del'>-		mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='del'>-		return -EAGAIN;</div><div class='add'>+		count = -EAGAIN;</div><div class='add'>+		goto unlock_driver;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;intel_pstate_limits_lock);</div><div class='add'>+	no_turbo = !!clamp_t(int, input, 0, 1);</div><div class='add'>+</div><div class='add'>+	if (no_turbo == global.no_turbo)</div><div class='add'>+		goto unlock_driver;</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='ctx'> 	if (global.turbo_disabled) {</div><div class='ctx'> 		pr_notice_once("Turbo disabled by BIOS or unavailable on processor\n");</div><div class='del'>-		mutex_unlock(&amp;intel_pstate_limits_lock);</div><div class='del'>-		mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='del'>-		return -EPERM;</div><div class='add'>+		count = -EPERM;</div><div class='add'>+		goto unlock_driver;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	global.no_turbo = clamp_t(int, input, 0, 1);</div><div class='add'>+	WRITE_ONCE(global.no_turbo, no_turbo);</div><div class='ctx'> </div><div class='del'>-	if (global.no_turbo) {</div><div class='add'>+	mutex_lock(&amp;intel_pstate_limits_lock);</div><div class='add'>+</div><div class='add'>+	if (no_turbo) {</div><div class='ctx'> 		struct cpudata *cpu = all_cpu_data[0];</div><div class='ctx'> 		int pct = cpu-&gt;pstate.max_pstate * 100 / cpu-&gt;pstate.turbo_pstate;</div><div class='ctx'> </div><div class='hunk'>@@ -1338,9 +1325,10 @@ static ssize_t store_no_turbo(struct kobject *a, struct kobj_attribute *b,</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;intel_pstate_limits_lock);</div><div class='ctx'> </div><div class='del'>-	intel_pstate_update_policies();</div><div class='del'>-	arch_set_max_freq_ratio(global.no_turbo);</div><div class='add'>+	intel_pstate_update_limits_for_all();</div><div class='add'>+	arch_set_max_freq_ratio(no_turbo);</div><div class='ctx'> </div><div class='add'>+unlock_driver:</div><div class='ctx'> 	mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='hunk'>@@ -1621,7 +1609,6 @@ static void intel_pstate_notify_work(struct work_struct *work)</div><div class='ctx'> 	struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpudata-&gt;cpu);</div><div class='ctx'> </div><div class='ctx'> 	if (policy) {</div><div class='del'>-		intel_pstate_get_hwp_cap(cpudata);</div><div class='ctx'> 		__intel_pstate_update_max_freq(cpudata, policy);</div><div class='ctx'> </div><div class='ctx'> 		cpufreq_cpu_release(policy);</div><div class='hunk'>@@ -1636,11 +1623,10 @@ static cpumask_t hwp_intr_enable_mask;</div><div class='ctx'> void notify_hwp_interrupt(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int this_cpu = smp_processor_id();</div><div class='del'>-	struct cpudata *cpudata;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	if (!READ_ONCE(hwp_active) || !boot_cpu_has(X86_FEATURE_HWP_NOTIFY))</div><div class='add'>+	if (!hwp_active || !boot_cpu_has(X86_FEATURE_HWP_NOTIFY))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rdmsrl_safe(MSR_HWP_STATUS, &amp;value);</div><div class='hunk'>@@ -1652,24 +1638,8 @@ void notify_hwp_interrupt(void)</div><div class='ctx'> 	if (!cpumask_test_cpu(this_cpu, &amp;hwp_intr_enable_mask))</div><div class='ctx'> 		goto ack_intr;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Currently we never free all_cpu_data. And we can't reach here</div><div class='del'>-	 * without this allocated. But for safety for future changes, added</div><div class='del'>-	 * check.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(!READ_ONCE(all_cpu_data)))</div><div class='del'>-		goto ack_intr;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The free is done during cleanup, when cpufreq registry is failed.</div><div class='del'>-	 * We wouldn't be here if it fails on init or switch status. But for</div><div class='del'>-	 * future changes, added check.</div><div class='del'>-	 */</div><div class='del'>-	cpudata = READ_ONCE(all_cpu_data[this_cpu]);</div><div class='del'>-	if (unlikely(!cpudata))</div><div class='del'>-		goto ack_intr;</div><div class='del'>-</div><div class='del'>-	schedule_delayed_work(&amp;cpudata-&gt;hwp_notify_work, msecs_to_jiffies(10));</div><div class='add'>+	schedule_delayed_work(&amp;all_cpu_data[this_cpu]-&gt;hwp_notify_work,</div><div class='add'>+			      msecs_to_jiffies(10));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;hwp_notify_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1682,7 +1652,7 @@ ack_intr:</div><div class='ctx'> </div><div class='ctx'> static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	bool cancel_work;</div><div class='ctx'> </div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_HWP_NOTIFY))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1690,22 +1660,22 @@ static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata)</div><div class='ctx'> 	/* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */</div><div class='ctx'> 	wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, 0x00);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;hwp_notify_lock, flags);</div><div class='del'>-	if (cpumask_test_and_clear_cpu(cpudata-&gt;cpu, &amp;hwp_intr_enable_mask))</div><div class='del'>-		cancel_delayed_work(&amp;cpudata-&gt;hwp_notify_work);</div><div class='del'>-	spin_unlock_irqrestore(&amp;hwp_notify_lock, flags);</div><div class='add'>+	spin_lock_irq(&amp;hwp_notify_lock);</div><div class='add'>+	cancel_work = cpumask_test_and_clear_cpu(cpudata-&gt;cpu, &amp;hwp_intr_enable_mask);</div><div class='add'>+	spin_unlock_irq(&amp;hwp_notify_lock);</div><div class='add'>+</div><div class='add'>+	if (cancel_work)</div><div class='add'>+		cancel_delayed_work_sync(&amp;cpudata-&gt;hwp_notify_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pstate_enable_hwp_interrupt(struct cpudata *cpudata)</div><div class='ctx'> {</div><div class='ctx'> 	/* Enable HWP notification interrupt for guaranteed performance change */</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_HWP_NOTIFY)) {</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		spin_lock_irqsave(&amp;hwp_notify_lock, flags);</div><div class='add'>+		spin_lock_irq(&amp;hwp_notify_lock);</div><div class='ctx'> 		INIT_DELAYED_WORK(&amp;cpudata-&gt;hwp_notify_work, intel_pstate_notify_work);</div><div class='ctx'> 		cpumask_set_cpu(cpudata-&gt;cpu, &amp;hwp_intr_enable_mask);</div><div class='del'>-		spin_unlock_irqrestore(&amp;hwp_notify_lock, flags);</div><div class='add'>+		spin_unlock_irq(&amp;hwp_notify_lock);</div><div class='ctx'> </div><div class='ctx'> 		/* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */</div><div class='ctx'> 		wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, 0x01);</div><div class='hunk'>@@ -1791,7 +1761,7 @@ static u64 atom_get_val(struct cpudata *cpudata, int pstate)</div><div class='ctx'> 	u32 vid;</div><div class='ctx'> </div><div class='ctx'> 	val = (u64)pstate &lt;&lt; 8;</div><div class='del'>-	if (global.no_turbo &amp;&amp; !global.turbo_disabled)</div><div class='add'>+	if (READ_ONCE(global.no_turbo) &amp;&amp; !global.turbo_disabled)</div><div class='ctx'> 		val |= (u64)1 &lt;&lt; 32;</div><div class='ctx'> </div><div class='ctx'> 	vid_fp = cpudata-&gt;vid.min + mul_fp(</div><div class='hunk'>@@ -1956,7 +1926,7 @@ static u64 core_get_val(struct cpudata *cpudata, int pstate)</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	val = (u64)pstate &lt;&lt; 8;</div><div class='del'>-	if (global.no_turbo &amp;&amp; !global.turbo_disabled)</div><div class='add'>+	if (READ_ONCE(global.no_turbo) &amp;&amp; !global.turbo_disabled)</div><div class='ctx'> 		val |= (u64)1 &lt;&lt; 32;</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -2029,14 +1999,6 @@ static void intel_pstate_set_min_pstate(struct cpudata *cpu)</div><div class='ctx'> 	intel_pstate_set_pstate(cpu, cpu-&gt;pstate.min_pstate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_pstate_max_within_limits(struct cpudata *cpu)</div><div class='del'>-{</div><div class='del'>-	int pstate = max(cpu-&gt;pstate.min_pstate, cpu-&gt;max_perf_ratio);</div><div class='del'>-</div><div class='del'>-	update_turbo_state();</div><div class='del'>-	intel_pstate_set_pstate(cpu, pstate);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)</div><div class='ctx'> {</div><div class='ctx'> 	int perf_ctl_max_phys = pstate_funcs.get_max_physical(cpu-&gt;cpu);</div><div class='hunk'>@@ -2262,7 +2224,7 @@ static inline int32_t get_target_pstate(struct cpudata *cpu)</div><div class='ctx'> </div><div class='ctx'> 	sample-&gt;busy_scaled = busy_frac * 100;</div><div class='ctx'> </div><div class='del'>-	target = global.no_turbo || global.turbo_disabled ?</div><div class='add'>+	target = READ_ONCE(global.no_turbo) ?</div><div class='ctx'> 			cpu-&gt;pstate.max_pstate : cpu-&gt;pstate.turbo_pstate;</div><div class='ctx'> 	target += target &gt;&gt; 2;</div><div class='ctx'> 	target = mul_fp(target, busy_frac);</div><div class='hunk'>@@ -2306,8 +2268,6 @@ static void intel_pstate_adjust_pstate(struct cpudata *cpu)</div><div class='ctx'> 	struct sample *sample;</div><div class='ctx'> 	int target_pstate;</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='del'>-</div><div class='ctx'> 	target_pstate = get_target_pstate(cpu);</div><div class='ctx'> 	target_pstate = intel_pstate_prepare_request(cpu, target_pstate);</div><div class='ctx'> 	trace_cpu_frequency(target_pstate * cpu-&gt;pstate.scaling, cpu-&gt;cpu);</div><div class='hunk'>@@ -2437,6 +2397,7 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='ctx'> static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {</div><div class='ctx'> 	X86_MATCH(BROADWELL_D,		core_funcs),</div><div class='ctx'> 	X86_MATCH(BROADWELL_X,		core_funcs),</div><div class='hunk'>@@ -2445,6 +2406,7 @@ static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {</div><div class='ctx'> 	X86_MATCH(SAPPHIRERAPIDS_X,	core_funcs),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {</div><div class='ctx'> 	X86_MATCH(KABYLAKE,		core_funcs),</div><div class='hunk'>@@ -2526,7 +2488,7 @@ static void intel_pstate_clear_update_util_hook(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> static int intel_pstate_get_max_freq(struct cpudata *cpu)</div><div class='ctx'> {</div><div class='del'>-	return global.turbo_disabled || global.no_turbo ?</div><div class='add'>+	return READ_ONCE(global.no_turbo) ?</div><div class='ctx'> 			cpu-&gt;pstate.max_freq : cpu-&gt;pstate.turbo_freq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2611,12 +2573,14 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy)</div><div class='ctx'> 	intel_pstate_update_perf_limits(cpu, policy-&gt;min, policy-&gt;max);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu-&gt;policy == CPUFREQ_POLICY_PERFORMANCE) {</div><div class='add'>+		int pstate = max(cpu-&gt;pstate.min_pstate, cpu-&gt;max_perf_ratio);</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * NOHZ_FULL CPUs need this as the governor callback may not</div><div class='ctx'> 		 * be invoked on them.</div><div class='ctx'> 		 */</div><div class='ctx'> 		intel_pstate_clear_update_util_hook(policy-&gt;cpu);</div><div class='del'>-		intel_pstate_max_within_limits(cpu);</div><div class='add'>+		intel_pstate_set_pstate(cpu, pstate);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		intel_pstate_set_update_util_hook(policy-&gt;cpu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2659,10 +2623,9 @@ static void intel_pstate_verify_cpu_policy(struct cpudata *cpu,</div><div class='ctx'> {</div><div class='ctx'> 	int max_freq;</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='ctx'> 	if (hwp_active) {</div><div class='ctx'> 		intel_pstate_get_hwp_cap(cpu);</div><div class='del'>-		max_freq = global.no_turbo || global.turbo_disabled ?</div><div class='add'>+		max_freq = READ_ONCE(global.no_turbo) ?</div><div class='ctx'> 				cpu-&gt;pstate.max_freq : cpu-&gt;pstate.turbo_freq;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		max_freq = intel_pstate_get_max_freq(cpu);</div><div class='hunk'>@@ -2756,9 +2719,7 @@ static int __intel_pstate_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> </div><div class='ctx'> 	/* cpuinfo and default policy values */</div><div class='ctx'> 	policy-&gt;cpuinfo.min_freq = cpu-&gt;pstate.min_freq;</div><div class='del'>-	update_turbo_state();</div><div class='del'>-	global.turbo_disabled_mf = global.turbo_disabled;</div><div class='del'>-	policy-&gt;cpuinfo.max_freq = global.turbo_disabled ?</div><div class='add'>+	policy-&gt;cpuinfo.max_freq = READ_ONCE(global.no_turbo) ?</div><div class='ctx'> 			cpu-&gt;pstate.max_freq : cpu-&gt;pstate.turbo_freq;</div><div class='ctx'> </div><div class='ctx'> 	policy-&gt;min = policy-&gt;cpuinfo.min_freq;</div><div class='hunk'>@@ -2923,8 +2884,6 @@ static int intel_cpufreq_target(struct cpufreq_policy *policy,</div><div class='ctx'> 	struct cpufreq_freqs freqs;</div><div class='ctx'> 	int target_pstate;</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='del'>-</div><div class='ctx'> 	freqs.old = policy-&gt;cur;</div><div class='ctx'> 	freqs.new = target_freq;</div><div class='ctx'> </div><div class='hunk'>@@ -2946,8 +2905,6 @@ static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy *policy,</div><div class='ctx'> 	struct cpudata *cpu = all_cpu_data[policy-&gt;cpu];</div><div class='ctx'> 	int target_pstate;</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='del'>-</div><div class='ctx'> 	target_pstate = intel_pstate_freq_to_hwp(cpu, target_freq);</div><div class='ctx'> </div><div class='ctx'> 	target_pstate = intel_cpufreq_update_pstate(policy, target_pstate, true);</div><div class='hunk'>@@ -2965,9 +2922,9 @@ static void intel_cpufreq_adjust_perf(unsigned int cpunum,</div><div class='ctx'> 	int old_pstate = cpu-&gt;pstate.current_pstate;</div><div class='ctx'> 	int cap_pstate, min_pstate, max_pstate, target_pstate;</div><div class='ctx'> </div><div class='del'>-	update_turbo_state();</div><div class='del'>-	cap_pstate = global.turbo_disabled ? HWP_GUARANTEED_PERF(hwp_cap) :</div><div class='del'>-					     HWP_HIGHEST_PERF(hwp_cap);</div><div class='add'>+	cap_pstate = READ_ONCE(global.no_turbo) ?</div><div class='add'>+					HWP_GUARANTEED_PERF(hwp_cap) :</div><div class='add'>+					HWP_HIGHEST_PERF(hwp_cap);</div><div class='ctx'> </div><div class='ctx'> 	/* Optimization: Avoid unnecessary divisions. */</div><div class='ctx'> </div><div class='hunk'>@@ -3135,10 +3092,8 @@ static void intel_pstate_driver_cleanup(void)</div><div class='ctx'> 			if (intel_pstate_driver == &amp;intel_pstate)</div><div class='ctx'> 				intel_pstate_clear_update_util_hook(cpu);</div><div class='ctx'> </div><div class='del'>-			spin_lock(&amp;hwp_notify_lock);</div><div class='ctx'> 			kfree(all_cpu_data[cpu]);</div><div class='ctx'> 			WRITE_ONCE(all_cpu_data[cpu], NULL);</div><div class='del'>-			spin_unlock(&amp;hwp_notify_lock);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	cpus_read_unlock();</div><div class='hunk'>@@ -3155,6 +3110,10 @@ static int intel_pstate_register_driver(struct cpufreq_driver *driver)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;global, 0, sizeof(global));</div><div class='ctx'> 	global.max_perf_pct = 100;</div><div class='add'>+	global.turbo_disabled = turbo_is_disabled();</div><div class='add'>+	global.no_turbo = global.turbo_disabled;</div><div class='add'>+</div><div class='add'>+	arch_set_max_freq_ratio(global.turbo_disabled);</div><div class='ctx'> </div><div class='ctx'> 	intel_pstate_driver = driver;</div><div class='ctx'> 	ret = cpufreq_register_driver(intel_pstate_driver);</div><div class='hunk'>@@ -3466,7 +3425,7 @@ static int __init intel_pstate_init(void)</div><div class='ctx'> 		 * deal with it.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if ((!no_hwp &amp;&amp; boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {</div><div class='del'>-			WRITE_ONCE(hwp_active, 1);</div><div class='add'>+			hwp_active = true;</div><div class='ctx'> 			hwp_mode_bdw = id-&gt;driver_data;</div><div class='ctx'> 			intel_pstate.attr = hwp_cpufreq_attrs;</div><div class='ctx'> 			intel_cpufreq.attr = hwp_cpufreq_attrs;</div><div class='head'>diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c<br/>index a0a61919bc4c..518606adf14e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/mediatek-cpufreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/mediatek-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/mediatek-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/mediatek-cpufreq.c</a></div><div class='hunk'>@@ -707,6 +707,15 @@ static const struct mtk_cpufreq_platform_data mt7623_platform_data = {</div><div class='ctx'> 	.ccifreq_supported = false,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct mtk_cpufreq_platform_data mt7988_platform_data = {</div><div class='add'>+	.min_volt_shift = 100000,</div><div class='add'>+	.max_volt_shift = 200000,</div><div class='add'>+	.proc_max_volt = 900000,</div><div class='add'>+	.sram_min_volt = 0,</div><div class='add'>+	.sram_max_volt = 1150000,</div><div class='add'>+	.ccifreq_supported = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct mtk_cpufreq_platform_data mt8183_platform_data = {</div><div class='ctx'> 	.min_volt_shift = 100000,</div><div class='ctx'> 	.max_volt_shift = 200000,</div><div class='hunk'>@@ -740,6 +749,7 @@ static const struct of_device_id mtk_cpufreq_machines[] __initconst = {</div><div class='ctx'> 	{ .compatible = "mediatek,mt2712", .data = &amp;mt2701_platform_data },</div><div class='ctx'> 	{ .compatible = "mediatek,mt7622", .data = &amp;mt7622_platform_data },</div><div class='ctx'> 	{ .compatible = "mediatek,mt7623", .data = &amp;mt7623_platform_data },</div><div class='add'>+	{ .compatible = "mediatek,mt7988a", .data = &amp;mt7988_platform_data },</div><div class='ctx'> 	{ .compatible = "mediatek,mt8167", .data = &amp;mt8516_platform_data },</div><div class='ctx'> 	{ .compatible = "mediatek,mt817x", .data = &amp;mt2701_platform_data },</div><div class='ctx'> 	{ .compatible = "mediatek,mt8173", .data = &amp;mt2701_platform_data },</div><div class='head'>diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c<br/>index 70b0f21968a0..ec8df5496a0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/qcom-cpufreq-hw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/qcom-cpufreq-hw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/qcom-cpufreq-hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/qcom-cpufreq-hw.c</a></div><div class='hunk'>@@ -347,8 +347,8 @@ static void qcom_lmh_dcvs_notify(struct qcom_cpufreq_data *data)</div><div class='ctx'> </div><div class='ctx'> 	throttled_freq = freq_hz / HZ_PER_KHZ;</div><div class='ctx'> </div><div class='del'>-	/* Update thermal pressure (the boost frequencies are accepted) */</div><div class='del'>-	arch_update_thermal_pressure(policy-&gt;related_cpus, throttled_freq);</div><div class='add'>+	/* Update HW pressure (the boost frequencies are accepted) */</div><div class='add'>+	arch_update_hw_pressure(policy-&gt;related_cpus, throttled_freq);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * In the unlikely case policy is unregistered do not enable</div><div class='head'>diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c<br/>index 32a9c88f8ff6..0b882765cd66 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/sun50i-cpufreq-nvmem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/sun50i-cpufreq-nvmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/sun50i-cpufreq-nvmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/sun50i-cpufreq-nvmem.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/arm-smccc.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/nvmem-consumer.h&gt;</div><div class='hunk'>@@ -18,26 +19,155 @@</div><div class='ctx'> #include &lt;linux/pm_opp.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#define MAX_NAME_LEN	7</div><div class='del'>-</div><div class='ctx'> #define NVMEM_MASK	0x7</div><div class='ctx'> #define NVMEM_SHIFT	5</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;</div><div class='ctx'> </div><div class='add'>+struct sunxi_cpufreq_data {</div><div class='add'>+	u32 (*efuse_xlate)(u32 speedbin);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 sun50i_h6_efuse_xlate(u32 speedbin)</div><div class='add'>+{</div><div class='add'>+	u32 efuse_value;</div><div class='add'>+</div><div class='add'>+	efuse_value = (speedbin &gt;&gt; NVMEM_SHIFT) &amp; NVMEM_MASK;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We treat unexpected efuse values as if the SoC was from</div><div class='add'>+	 * the slowest bin. Expected efuse values are 1-3, slowest</div><div class='add'>+	 * to fastest.</div><div class='add'>+	 */</div><div class='add'>+	if (efuse_value &gt;= 1 &amp;&amp; efuse_value &lt;= 3)</div><div class='add'>+		return efuse_value - 1;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_soc_id_revision(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY</div><div class='add'>+	return arm_smccc_get_soc_id_revision();</div><div class='add'>+#else</div><div class='add'>+	return SMCCC_RET_NOT_SUPPORTED;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Judging by the OPP tables in the vendor BSP, the quality order of the</div><div class='add'>+ * returned speedbin index is 4 -&gt; 0/2 -&gt; 3 -&gt; 1, from worst to best.</div><div class='add'>+ * 0 and 2 seem identical from the OPP tables' point of view.</div><div class='add'>+ */</div><div class='add'>+static u32 sun50i_h616_efuse_xlate(u32 speedbin)</div><div class='add'>+{</div><div class='add'>+	int ver_bits = get_soc_id_revision();</div><div class='add'>+	u32 value = 0;</div><div class='add'>+</div><div class='add'>+	switch (speedbin &amp; 0xffff) {</div><div class='add'>+	case 0x2000:</div><div class='add'>+		value = 0;</div><div class='add'>+		break;</div><div class='add'>+	case 0x2400:</div><div class='add'>+	case 0x7400:</div><div class='add'>+	case 0x2c00:</div><div class='add'>+	case 0x7c00:</div><div class='add'>+		if (ver_bits != SMCCC_RET_NOT_SUPPORTED &amp;&amp; ver_bits &lt;= 1) {</div><div class='add'>+			/* ic version A/B */</div><div class='add'>+			value = 1;</div><div class='add'>+		} else {</div><div class='add'>+			/* ic version C and later version */</div><div class='add'>+			value = 2;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 0x5000:</div><div class='add'>+	case 0x5400:</div><div class='add'>+	case 0x6000:</div><div class='add'>+		value = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 0x5c00:</div><div class='add'>+		value = 4;</div><div class='add'>+		break;</div><div class='add'>+	case 0x5d00:</div><div class='add'>+		value = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",</div><div class='add'>+			speedbin &amp; 0xffff);</div><div class='add'>+		value = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = {</div><div class='add'>+	.efuse_xlate = sun50i_h6_efuse_xlate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data = {</div><div class='add'>+	.efuse_xlate = sun50i_h616_efuse_xlate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id cpu_opp_match_list[] = {</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h6-operating-points",</div><div class='add'>+	  .data = &amp;sun50i_h6_cpufreq_data,</div><div class='add'>+	},</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h616-operating-points",</div><div class='add'>+	  .data = &amp;sun50i_h616_cpufreq_data,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dt_has_supported_hw() - Check if any OPPs use opp-supported-hw</div><div class='add'>+ *</div><div class='add'>+ * If we ask the cpufreq framework to use the opp-supported-hw feature, it</div><div class='add'>+ * will ignore every OPP node without that DT property. If none of the OPPs</div><div class='add'>+ * have it, the driver will fail probing, due to the lack of OPPs.</div><div class='add'>+ *</div><div class='add'>+ * Returns true if we have at least one OPP with the opp-supported-hw property.</div><div class='add'>+ */</div><div class='add'>+static bool dt_has_supported_hw(void)</div><div class='add'>+{</div><div class='add'>+	bool has_opp_supported_hw = false;</div><div class='add'>+	struct device_node *np, *opp;</div><div class='add'>+	struct device *cpu_dev;</div><div class='add'>+</div><div class='add'>+	cpu_dev = get_cpu_device(0);</div><div class='add'>+	if (!cpu_dev)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);</div><div class='add'>+	if (!np)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(np, opp) {</div><div class='add'>+		if (of_find_property(opp, "opp-supported-hw", NULL)) {</div><div class='add'>+			has_opp_supported_hw = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	return has_opp_supported_hw;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value</div><div class='del'>- * @versions: Set to the value parsed from efuse</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if success.</div><div class='add'>+ * Returns non-negative speed bin index on success, a negative error</div><div class='add'>+ * value otherwise.</div><div class='ctx'>  */</div><div class='del'>-static int sun50i_cpufreq_get_efuse(u32 *versions)</div><div class='add'>+static int sun50i_cpufreq_get_efuse(void)</div><div class='ctx'> {</div><div class='add'>+	const struct sunxi_cpufreq_data *opp_data;</div><div class='ctx'> 	struct nvmem_cell *speedbin_nvmem;</div><div class='add'>+	const struct of_device_id *match;</div><div class='ctx'> 	struct device_node *np;</div><div class='ctx'> 	struct device *cpu_dev;</div><div class='del'>-	u32 *speedbin, efuse_value;</div><div class='del'>-	size_t len;</div><div class='add'>+	u32 *speedbin;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	cpu_dev = get_cpu_device(0);</div><div class='hunk'>@@ -48,12 +178,12 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)</div><div class='ctx'> 	if (!np)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	ret = of_device_is_compatible(np,</div><div class='del'>-				      "allwinner,sun50i-h6-operating-points");</div><div class='del'>-	if (!ret) {</div><div class='add'>+	match = of_match_node(cpu_opp_match_list, np);</div><div class='add'>+	if (!match) {</div><div class='ctx'> 		of_node_put(np);</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='add'>+	opp_data = match-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	speedbin_nvmem = of_nvmem_cell_get(np, NULL);</div><div class='ctx'> 	of_node_put(np);</div><div class='hunk'>@@ -61,33 +191,25 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)</div><div class='ctx'> 		return dev_err_probe(cpu_dev, PTR_ERR(speedbin_nvmem),</div><div class='ctx'> 				     "Could not get nvmem cell\n");</div><div class='ctx'> </div><div class='del'>-	speedbin = nvmem_cell_read(speedbin_nvmem, &amp;len);</div><div class='add'>+	speedbin = nvmem_cell_read(speedbin_nvmem, NULL);</div><div class='ctx'> 	nvmem_cell_put(speedbin_nvmem);</div><div class='ctx'> 	if (IS_ERR(speedbin))</div><div class='ctx'> 		return PTR_ERR(speedbin);</div><div class='ctx'> </div><div class='del'>-	efuse_value = (*speedbin &gt;&gt; NVMEM_SHIFT) &amp; NVMEM_MASK;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We treat unexpected efuse values as if the SoC was from</div><div class='del'>-	 * the slowest bin. Expected efuse values are 1-3, slowest</div><div class='del'>-	 * to fastest.</div><div class='del'>-	 */</div><div class='del'>-	if (efuse_value &gt;= 1 &amp;&amp; efuse_value &lt;= 3)</div><div class='del'>-		*versions = efuse_value - 1;</div><div class='del'>-	else</div><div class='del'>-		*versions = 0;</div><div class='add'>+	ret = opp_data-&gt;efuse_xlate(*speedbin);</div><div class='ctx'> </div><div class='ctx'> 	kfree(speedbin);</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int *opp_tokens;</div><div class='del'>-	char name[MAX_NAME_LEN];</div><div class='del'>-	unsigned int cpu;</div><div class='del'>-	u32 speed = 0;</div><div class='add'>+	char name[] = "speedXXXXXXXXXXX"; /* Integers can take 11 chars max */</div><div class='add'>+	unsigned int cpu, supported_hw;</div><div class='add'>+	struct dev_pm_opp_config config = {};</div><div class='add'>+	int speed;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),</div><div class='hunk'>@@ -95,13 +217,24 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!opp_tokens)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = sun50i_cpufreq_get_efuse(&amp;speed);</div><div class='del'>-	if (ret) {</div><div class='add'>+	speed = sun50i_cpufreq_get_efuse();</div><div class='add'>+	if (speed &lt; 0) {</div><div class='ctx'> 		kfree(opp_tokens);</div><div class='del'>-		return ret;</div><div class='add'>+		return speed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	snprintf(name, MAX_NAME_LEN, "speed%d", speed);</div><div class='add'>+	/*</div><div class='add'>+	 * We need at least one OPP with the "opp-supported-hw" property,</div><div class='add'>+	 * or else the upper layers will ignore every OPP and will bail out.</div><div class='add'>+	 */</div><div class='add'>+	if (dt_has_supported_hw()) {</div><div class='add'>+		supported_hw = 1U &lt;&lt; speed;</div><div class='add'>+		config.supported_hw = &amp;supported_hw;</div><div class='add'>+		config.supported_hw_count = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(name, sizeof(name), "speed%d", speed);</div><div class='add'>+	config.prop_name = name;</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='ctx'> 		struct device *cpu_dev = get_cpu_device(cpu);</div><div class='hunk'>@@ -111,12 +244,11 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)</div><div class='ctx'> 			goto free_opp;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		opp_tokens[cpu] = dev_pm_opp_set_prop_name(cpu_dev, name);</div><div class='del'>-		if (opp_tokens[cpu] &lt; 0) {</div><div class='del'>-			ret = opp_tokens[cpu];</div><div class='del'>-			pr_err("Failed to set prop name\n");</div><div class='add'>+		ret = dev_pm_opp_set_config(cpu_dev, &amp;config);</div><div class='add'>+		if (ret &lt; 0)</div><div class='ctx'> 			goto free_opp;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		opp_tokens[cpu] = ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,</div><div class='hunk'>@@ -131,7 +263,7 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> free_opp:</div><div class='ctx'> 	for_each_possible_cpu(cpu)</div><div class='del'>-		dev_pm_opp_put_prop_name(opp_tokens[cpu]);</div><div class='add'>+		dev_pm_opp_clear_config(opp_tokens[cpu]);</div><div class='ctx'> 	kfree(opp_tokens);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -145,7 +277,7 @@ static void sun50i_cpufreq_nvmem_remove(struct platform_device *pdev)</div><div class='ctx'> 	platform_device_unregister(cpufreq_dt_pdev);</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu)</div><div class='del'>-		dev_pm_opp_put_prop_name(opp_tokens[cpu]);</div><div class='add'>+		dev_pm_opp_clear_config(opp_tokens[cpu]);</div><div class='ctx'> </div><div class='ctx'> 	kfree(opp_tokens);</div><div class='ctx'> }</div><div class='hunk'>@@ -160,6 +292,9 @@ static struct platform_driver sun50i_cpufreq_driver = {</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id sun50i_cpufreq_match_list[] = {</div><div class='ctx'> 	{ .compatible = "allwinner,sun50i-h6" },</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h616" },</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h618" },</div><div class='add'>+	{ .compatible = "allwinner,sun50i-h700" },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);</div><div class='head'>diff --git a/drivers/cpufreq/tegra124-cpufreq.c b/drivers/cpufreq/tegra124-cpufreq.c<br/>index aae951d4e77c..514146d98bca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/tegra124-cpufreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/tegra124-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/tegra124-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/tegra124-cpufreq.c</a></div><div class='hunk'>@@ -52,12 +52,15 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int tegra124_cpufreq_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *np __free(device_node) = of_cpu_device_node_get(0);</div><div class='ctx'> 	struct tegra124_cpufreq_priv *priv;</div><div class='del'>-	struct device_node *np;</div><div class='ctx'> 	struct device *cpu_dev;</div><div class='ctx'> 	struct platform_device_info cpufreq_dt_devinfo = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!np)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -66,15 +69,9 @@ static int tegra124_cpufreq_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!cpu_dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	np = of_cpu_device_node_get(0);</div><div class='del'>-	if (!np)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;cpu_clk = of_clk_get_by_name(np, "cpu_g");</div><div class='del'>-	if (IS_ERR(priv-&gt;cpu_clk)) {</div><div class='del'>-		ret = PTR_ERR(priv-&gt;cpu_clk);</div><div class='del'>-		goto out_put_np;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(priv-&gt;cpu_clk))</div><div class='add'>+		return PTR_ERR(priv-&gt;cpu_clk);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;dfll_clk = of_clk_get_by_name(np, "dfll");</div><div class='ctx'> 	if (IS_ERR(priv-&gt;dfll_clk)) {</div><div class='hunk'>@@ -110,8 +107,6 @@ static int tegra124_cpufreq_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, priv);</div><div class='ctx'> </div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_put_pllp_clk:</div><div class='hunk'>@@ -122,8 +117,6 @@ out_put_dfll_clk:</div><div class='ctx'> 	clk_put(priv-&gt;dfll_clk);</div><div class='ctx'> out_put_cpu_clk:</div><div class='ctx'> 	clk_put(priv-&gt;cpu_clk);</div><div class='del'>-out_put_np:</div><div class='del'>-	of_node_put(np);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c<br/>index 46c41e2ca727..714ed53753fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/ti-cpufreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpufreq/ti-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/ti-cpufreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpufreq/ti-cpufreq.c</a></div><div class='hunk'>@@ -347,12 +347,10 @@ static const struct of_device_id ti_cpufreq_of_match[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id *ti_cpufreq_match_node(void)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np;</div><div class='add'>+	struct device_node *np __free(device_node) = of_find_node_by_path("/");</div><div class='ctx'> 	const struct of_device_id *match;</div><div class='ctx'> </div><div class='del'>-	np = of_find_node_by_path("/");</div><div class='ctx'> 	match = of_match_node(ti_cpufreq_of_match, np);</div><div class='del'>-	of_node_put(np);</div><div class='ctx'> </div><div class='ctx'> 	return match;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/cpuidle/coupled.c b/drivers/cpuidle/coupled.c<br/>index 9acde71558d5..bb8761c8a42e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/coupled.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpuidle/coupled.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/coupled.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpuidle/coupled.c</a></div><div class='hunk'>@@ -439,13 +439,8 @@ static int cpuidle_coupled_clear_pokes(int cpu)</div><div class='ctx'> </div><div class='ctx'> static bool cpuidle_coupled_any_pokes_pending(struct cpuidle_coupled *coupled)</div><div class='ctx'> {</div><div class='del'>-	cpumask_t cpus;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	cpumask_and(&amp;cpus, cpu_online_mask, &amp;coupled-&gt;coupled_cpus);</div><div class='del'>-	ret = cpumask_and(&amp;cpus, &amp;cpuidle_coupled_poke_pending, &amp;cpus);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return cpumask_first_and_and(cpu_online_mask, &amp;coupled-&gt;coupled_cpus,</div><div class='add'>+				     &amp;cpuidle_coupled_poke_pending) &lt; nr_cpu_ids;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -626,9 +621,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void cpuidle_coupled_update_online_cpus(struct cpuidle_coupled *coupled)</div><div class='ctx'> {</div><div class='del'>-	cpumask_t cpus;</div><div class='del'>-	cpumask_and(&amp;cpus, cpu_online_mask, &amp;coupled-&gt;coupled_cpus);</div><div class='del'>-	coupled-&gt;online_count = cpumask_weight(&amp;cpus);</div><div class='add'>+	coupled-&gt;online_count = cpumask_weight_and(cpu_online_mask, &amp;coupled-&gt;coupled_cpus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/cpuidle/cpuidle-kirkwood.c b/drivers/cpuidle/cpuidle-kirkwood.c<br/>index 13bf743f885b..602c4dfdd7e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-kirkwood.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpuidle/cpuidle-kirkwood.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-kirkwood.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpuidle/cpuidle-kirkwood.c</a></div><div class='hunk'>@@ -59,15 +59,14 @@ static int kirkwood_cpuidle_probe(struct platform_device *pdev)</div><div class='ctx'> 	return cpuidle_register(&amp;kirkwood_idle_driver, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kirkwood_cpuidle_remove(struct platform_device *pdev)</div><div class='add'>+static void kirkwood_cpuidle_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	cpuidle_unregister(&amp;kirkwood_idle_driver);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver kirkwood_cpuidle_driver = {</div><div class='ctx'> 	.probe = kirkwood_cpuidle_probe,</div><div class='del'>-	.remove = kirkwood_cpuidle_remove,</div><div class='add'>+	.remove_new = kirkwood_cpuidle_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = "kirkwood_cpuidle",</div><div class='ctx'> 		   },</div><div class='head'>diff --git a/drivers/cpuidle/governors/ladder.c b/drivers/cpuidle/governors/ladder.c<br/>index 8e9058c4ea63..6617eb494a11 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/governors/ladder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cpuidle/governors/ladder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/governors/ladder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cpuidle/governors/ladder.c</a></div><div class='hunk'>@@ -44,6 +44,7 @@ static DEFINE_PER_CPU(struct ladder_device, ladder_devices);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ladder_do_selection - prepares private data for a state change</div><div class='add'>+ * @dev: the CPU</div><div class='ctx'>  * @ldev: the ladder device</div><div class='ctx'>  * @old_idx: the current state index</div><div class='ctx'>  * @new_idx: the new target state index</div><div class='head'>diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig<br/>index 3d02702456a5..94f23c6fc93b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/Kconfig</a></div><div class='hunk'>@@ -67,6 +67,7 @@ config CRYPTO_DEV_GEODE</div><div class='ctx'> config ZCRYPT</div><div class='ctx'> 	tristate "Support for s390 cryptographic adapters"</div><div class='ctx'> 	depends on S390</div><div class='add'>+	depends on AP</div><div class='ctx'> 	select HW_RANDOM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this option if you want to enable support for</div><div class='hunk'>@@ -74,23 +75,6 @@ config ZCRYPT</div><div class='ctx'> 	  to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP)</div><div class='ctx'> 	  or Accelerator (CEXxA) mode.</div><div class='ctx'> </div><div class='del'>-config ZCRYPT_DEBUG</div><div class='del'>-	bool "Enable debug features for s390 cryptographic adapters"</div><div class='del'>-	default n</div><div class='del'>-	depends on DEBUG_KERNEL</div><div class='del'>-	depends on ZCRYPT</div><div class='del'>-	help</div><div class='del'>-	  Say 'Y' here to enable some additional debug features on the</div><div class='del'>-	  s390 cryptographic adapters driver.</div><div class='del'>-</div><div class='del'>-	  There will be some more sysfs attributes displayed for ap cards</div><div class='del'>-	  and queues and some flags on crypto requests are interpreted as</div><div class='del'>-	  debugging messages to force error injection.</div><div class='del'>-</div><div class='del'>-	  Do not enable on production level kernel build.</div><div class='del'>-</div><div class='del'>-	  If unsure, say N.</div><div class='del'>-</div><div class='ctx'> config PKEY</div><div class='ctx'> 	tristate "Kernel API for protected key handling"</div><div class='ctx'> 	depends on S390</div><div class='hunk'>@@ -660,6 +644,14 @@ config CRYPTO_DEV_ROCKCHIP_DEBUG</div><div class='ctx'> 	  This will create /sys/kernel/debug/rk3288_crypto/stats for displaying</div><div class='ctx'> 	  the number of requests per algorithm and other internal stats.</div><div class='ctx'> </div><div class='add'>+config CRYPTO_DEV_TEGRA</div><div class='add'>+	tristate "Enable Tegra Security Engine"</div><div class='add'>+	depends on TEGRA_HOST1X</div><div class='add'>+	select CRYPTO_ENGINE</div><div class='add'>+</div><div class='add'>+	help</div><div class='add'>+	  Select this to enable Tegra Security Engine which accelerates various</div><div class='add'>+	  AES encryption/decryption and HASH algorithms.</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_DEV_ZYNQMP_AES</div><div class='ctx'> 	tristate "Support for Xilinx ZynqMP AES hw accelerator"</div><div class='head'>diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile<br/>index 95331bc6456b..ad4ccef67d12 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/Makefile</a></div><div class='hunk'>@@ -41,6 +41,7 @@ obj-$(CONFIG_CRYPTO_DEV_SAHARA) += sahara.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_SL3516) += gemini/</div><div class='ctx'> obj-y += stm32/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_TEGRA) += tegra/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_VIRTIO) += virtio/</div><div class='ctx'> #obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_BCM_SPU) += bcm/</div><div class='head'>diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c<br/>index 83a9093eff25..a895e4289efa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-i2c.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/atmel-i2c.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/atmel-i2c.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ static void atmel_i2c_checksum(struct atmel_i2c_cmd *cmd)</div><div class='ctx'> 	*__crc16 = cpu_to_le16(bitrev16(crc16(0, data, len)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void atmel_i2c_init_read_cmd(struct atmel_i2c_cmd *cmd)</div><div class='add'>+void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	cmd-&gt;word_addr = COMMAND;</div><div class='ctx'> 	cmd-&gt;opcode = OPCODE_READ;</div><div class='hunk'>@@ -68,7 +68,31 @@ void atmel_i2c_init_read_cmd(struct atmel_i2c_cmd *cmd)</div><div class='ctx'> 	cmd-&gt;msecs = MAX_EXEC_TIME_READ;</div><div class='ctx'> 	cmd-&gt;rxsize = READ_RSP_SIZE;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(atmel_i2c_init_read_cmd);</div><div class='add'>+EXPORT_SYMBOL(atmel_i2c_init_read_config_cmd);</div><div class='add'>+</div><div class='add'>+int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr)</div><div class='add'>+{</div><div class='add'>+	if (addr &lt; 0 || addr &gt; OTP_ZONE_SIZE)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;word_addr = COMMAND;</div><div class='add'>+	cmd-&gt;opcode = OPCODE_READ;</div><div class='add'>+	/*</div><div class='add'>+	 * Read the word from OTP zone that may contain e.g. serial</div><div class='add'>+	 * numbers or similar if persistently pre-initialized and locked</div><div class='add'>+	 */</div><div class='add'>+	cmd-&gt;param1 = OTP_ZONE;</div><div class='add'>+	cmd-&gt;param2 = cpu_to_le16(addr);</div><div class='add'>+	cmd-&gt;count = READ_COUNT;</div><div class='add'>+</div><div class='add'>+	atmel_i2c_checksum(cmd);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;msecs = MAX_EXEC_TIME_READ;</div><div class='add'>+	cmd-&gt;rxsize = READ_RSP_SIZE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(atmel_i2c_init_read_otp_cmd);</div><div class='ctx'> </div><div class='ctx'> void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -301,7 +325,7 @@ static int device_sanity_check(struct i2c_client *client)</div><div class='ctx'> 	if (!cmd)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	atmel_i2c_init_read_cmd(cmd);</div><div class='add'>+	atmel_i2c_init_read_config_cmd(cmd);</div><div class='ctx'> </div><div class='ctx'> 	ret = atmel_i2c_send_receive(client, cmd);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h<br/>index c0bd429ee2c7..72f04c15682f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-i2c.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/atmel-i2c.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-i2c.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/atmel-i2c.h</a></div><div class='hunk'>@@ -64,6 +64,10 @@ struct atmel_i2c_cmd {</div><div class='ctx'> </div><div class='ctx'> /* Definitions for eeprom organization */</div><div class='ctx'> #define CONFIGURATION_ZONE		0</div><div class='add'>+#define OTP_ZONE			1</div><div class='add'>+</div><div class='add'>+/* Definitions for eeprom zone sizes */</div><div class='add'>+#define OTP_ZONE_SIZE			64</div><div class='ctx'> </div><div class='ctx'> /* Definitions for Indexes common to all commands */</div><div class='ctx'> #define RSP_DATA_IDX			1 /* buffer index of data in response */</div><div class='hunk'>@@ -124,6 +128,7 @@ struct atmel_ecc_driver_data {</div><div class='ctx'>  * @wake_token          : wake token array of zeros</div><div class='ctx'>  * @wake_token_sz       : size in bytes of the wake_token</div><div class='ctx'>  * @tfm_count           : number of active crypto transformations on i2c client</div><div class='add'>+ * @hwrng               : hold the hardware generated rng</div><div class='ctx'>  *</div><div class='ctx'>  * Reads and writes from/to the i2c client are sequential. The first byte</div><div class='ctx'>  * transmitted to the device is treated as the byte size. Any attempt to send</div><div class='hunk'>@@ -177,7 +182,8 @@ void atmel_i2c_flush_queue(void);</div><div class='ctx'> </div><div class='ctx'> int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd);</div><div class='ctx'> </div><div class='del'>-void atmel_i2c_init_read_cmd(struct atmel_i2c_cmd *cmd);</div><div class='add'>+void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd);</div><div class='add'>+int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr);</div><div class='ctx'> void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd);</div><div class='ctx'> void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid);</div><div class='ctx'> int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,</div><div class='head'>diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c<br/>index c77f482d2a97..24ffdf505023 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-sha204a.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/atmel-sha204a.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-sha204a.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/atmel-sha204a.c</a></div><div class='hunk'>@@ -91,6 +91,62 @@ static int atmel_sha204a_rng_read(struct hwrng *rng, void *data, size_t max,</div><div class='ctx'> 	return max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int atmel_sha204a_otp_read(struct i2c_client *client, u16 addr, u8 *otp)</div><div class='add'>+{</div><div class='add'>+	struct atmel_i2c_cmd cmd;</div><div class='add'>+	int ret = -1;</div><div class='add'>+</div><div class='add'>+	if (atmel_i2c_init_read_otp_cmd(&amp;cmd, addr) &lt; 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "failed, invalid otp address %04X\n",</div><div class='add'>+			addr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = atmel_i2c_send_receive(client, &amp;cmd);</div><div class='add'>+</div><div class='add'>+	if (cmd.data[0] == 0xff) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "failed, device not ready\n");</div><div class='add'>+		return -ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(otp, cmd.data+1, 4);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t otp_show(struct device *dev,</div><div class='add'>+			struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	u16 addr;</div><div class='add'>+	u8 otp[OTP_ZONE_SIZE];</div><div class='add'>+	char *str = buf;</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (addr = 0; addr &lt; OTP_ZONE_SIZE/4; addr++) {</div><div class='add'>+		if (atmel_sha204a_otp_read(client, addr, otp + addr * 4) &lt; 0) {</div><div class='add'>+			dev_err(dev, "failed to read otp zone\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; addr*2; i++)</div><div class='add'>+		str += sprintf(str, "%02X", otp[i]);</div><div class='add'>+	str += sprintf(str, "\n");</div><div class='add'>+	return str - buf;</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(otp);</div><div class='add'>+</div><div class='add'>+static struct attribute *atmel_sha204a_attrs[] = {</div><div class='add'>+	&amp;dev_attr_otp.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group atmel_sha204a_groups = {</div><div class='add'>+	.name = "atsha204a",</div><div class='add'>+	.attrs = atmel_sha204a_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int atmel_sha204a_probe(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct atmel_i2c_client_priv *i2c_priv;</div><div class='hunk'>@@ -111,6 +167,16 @@ static int atmel_sha204a_probe(struct i2c_client *client)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_warn(&amp;client-&gt;dev, "failed to register RNG (%d)\n", ret);</div><div class='ctx'> </div><div class='add'>+	/* otp read out */</div><div class='add'>+	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_I2C))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = sysfs_create_group(&amp;client-&gt;dev.kobj, &amp;atmel_sha204a_groups);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "failed to register sysfs entry\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -123,6 +189,8 @@ static void atmel_sha204a_remove(struct i2c_client *client)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	sysfs_remove_group(&amp;client-&gt;dev.kobj, &amp;atmel_sha204a_groups);</div><div class='add'>+</div><div class='ctx'> 	kfree((void *)i2c_priv-&gt;hwrng.priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/bcm/spu2.c b/drivers/crypto/bcm/spu2.c<br/>index 07989bb8c220..3fdc64b5a65e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/bcm/spu2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/bcm/spu2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/bcm/spu2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/bcm/spu2.c</a></div><div class='hunk'>@@ -495,7 +495,7 @@ static void spu2_dump_omd(u8 *omd, u16 hash_key_len, u16 ciph_key_len,</div><div class='ctx'> 	if (hash_iv_len) {</div><div class='ctx'> 		packet_log("  Hash IV Length %u bytes\n", hash_iv_len);</div><div class='ctx'> 		packet_dump("  hash IV: ", ptr, hash_iv_len);</div><div class='del'>-		ptr += ciph_key_len;</div><div class='add'>+		ptr += hash_iv_len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ciph_iv_len) {</div><div class='head'>diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c<br/>index bdf367f3f679..bd418dea586d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/caam/ctrl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/caam/ctrl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/caam/ctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/caam/ctrl.c</a></div><div class='hunk'>@@ -512,6 +512,7 @@ static const struct of_device_id caam_match[] = {</div><div class='ctx'> MODULE_DEVICE_TABLE(of, caam_match);</div><div class='ctx'> </div><div class='ctx'> struct caam_imx_data {</div><div class='add'>+	bool page0_access;</div><div class='ctx'> 	const struct clk_bulk_data *clks;</div><div class='ctx'> 	int num_clks;</div><div class='ctx'> };</div><div class='hunk'>@@ -524,6 +525,7 @@ static const struct clk_bulk_data caam_imx6_clks[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct caam_imx_data caam_imx6_data = {</div><div class='add'>+	.page0_access = true,</div><div class='ctx'> 	.clks = caam_imx6_clks,</div><div class='ctx'> 	.num_clks = ARRAY_SIZE(caam_imx6_clks),</div><div class='ctx'> };</div><div class='hunk'>@@ -534,6 +536,7 @@ static const struct clk_bulk_data caam_imx7_clks[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct caam_imx_data caam_imx7_data = {</div><div class='add'>+	.page0_access = true,</div><div class='ctx'> 	.clks = caam_imx7_clks,</div><div class='ctx'> 	.num_clks = ARRAY_SIZE(caam_imx7_clks),</div><div class='ctx'> };</div><div class='hunk'>@@ -545,6 +548,7 @@ static const struct clk_bulk_data caam_imx6ul_clks[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct caam_imx_data caam_imx6ul_data = {</div><div class='add'>+	.page0_access = true,</div><div class='ctx'> 	.clks = caam_imx6ul_clks,</div><div class='ctx'> 	.num_clks = ARRAY_SIZE(caam_imx6ul_clks),</div><div class='ctx'> };</div><div class='hunk'>@@ -554,15 +558,19 @@ static const struct clk_bulk_data caam_vf610_clks[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct caam_imx_data caam_vf610_data = {</div><div class='add'>+	.page0_access = true,</div><div class='ctx'> 	.clks = caam_vf610_clks,</div><div class='ctx'> 	.num_clks = ARRAY_SIZE(caam_vf610_clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct caam_imx_data caam_imx8ulp_data;</div><div class='add'>+</div><div class='ctx'> static const struct soc_device_attribute caam_imx_soc_table[] = {</div><div class='ctx'> 	{ .soc_id = "i.MX6UL", .data = &amp;caam_imx6ul_data },</div><div class='ctx'> 	{ .soc_id = "i.MX6*",  .data = &amp;caam_imx6_data },</div><div class='ctx'> 	{ .soc_id = "i.MX7*",  .data = &amp;caam_imx7_data },</div><div class='ctx'> 	{ .soc_id = "i.MX8M*", .data = &amp;caam_imx7_data },</div><div class='add'>+	{ .soc_id = "i.MX8ULP", .data = &amp;caam_imx8ulp_data },</div><div class='ctx'> 	{ .soc_id = "VF*",     .data = &amp;caam_vf610_data },</div><div class='ctx'> 	{ .family = "Freescale i.MX" },</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='hunk'>@@ -860,6 +868,7 @@ static int caam_probe(struct platform_device *pdev)</div><div class='ctx'> 	int pg_size;</div><div class='ctx'> 	int BLOCK_OFFSET = 0;</div><div class='ctx'> 	bool reg_access = true;</div><div class='add'>+	const struct caam_imx_data *imx_soc_data;</div><div class='ctx'> </div><div class='ctx'> 	ctrlpriv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*ctrlpriv), GFP_KERNEL);</div><div class='ctx'> 	if (!ctrlpriv)</div><div class='hunk'>@@ -894,12 +903,20 @@ static int caam_probe(struct platform_device *pdev)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		imx_soc_data = imx_soc_match-&gt;data;</div><div class='add'>+		reg_access = reg_access &amp;&amp; imx_soc_data-&gt;page0_access;</div><div class='add'>+		/*</div><div class='add'>+		 * CAAM clocks cannot be controlled from kernel.</div><div class='add'>+		 */</div><div class='add'>+		if (!imx_soc_data-&gt;num_clks)</div><div class='add'>+			goto iomap_ctrl;</div><div class='add'>+</div><div class='ctx'> 		ret = init_clocks(dev, imx_soc_match-&gt;data);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+iomap_ctrl:</div><div class='ctx'> 	/* Get configuration properties from device tree */</div><div class='ctx'> 	/* First, get register page */</div><div class='ctx'> 	ctrl = devm_of_iomap(dev, nprop, 0, NULL);</div><div class='head'>diff --git a/drivers/crypto/ccp/sp-platform.c b/drivers/crypto/ccp/sp-platform.c<br/>index 473301237760..ff6ceb4feee0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/sp-platform.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/ccp/sp-platform.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/sp-platform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/ccp/sp-platform.c</a></div><div class='hunk'>@@ -39,44 +39,38 @@ static const struct sp_dev_vdata dev_vdata[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='ctx'> static const struct acpi_device_id sp_acpi_match[] = {</div><div class='ctx'> 	{ "AMDI0C00", (kernel_ulong_t)&amp;dev_vdata[0] },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(acpi, sp_acpi_match);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF</div><div class='ctx'> static const struct of_device_id sp_of_match[] = {</div><div class='ctx'> 	{ .compatible = "amd,ccp-seattle-v1a",</div><div class='ctx'> 	  .data = (const void *)&amp;dev_vdata[0] },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, sp_of_match);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static struct sp_dev_vdata *sp_get_of_version(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_OF</div><div class='ctx'> 	const struct of_device_id *match;</div><div class='ctx'> </div><div class='ctx'> 	match = of_match_node(sp_of_match, pdev-&gt;dev.of_node);</div><div class='ctx'> 	if (match &amp;&amp; match-&gt;data)</div><div class='ctx'> 		return (struct sp_dev_vdata *)match-&gt;data;</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sp_dev_vdata *sp_get_acpi_version(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='ctx'> 	const struct acpi_device_id *match;</div><div class='ctx'> </div><div class='ctx'> 	match = acpi_match_device(sp_acpi_match, &amp;pdev-&gt;dev);</div><div class='ctx'> 	if (match &amp;&amp; match-&gt;driver_data)</div><div class='ctx'> 		return (struct sp_dev_vdata *)match-&gt;driver_data;</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -212,12 +206,8 @@ static int sp_platform_resume(struct platform_device *pdev)</div><div class='ctx'> static struct platform_driver sp_platform_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "ccp",</div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='ctx'> 		.acpi_match_table = sp_acpi_match,</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_OF</div><div class='ctx'> 		.of_match_table = sp_of_match,</div><div class='del'>-#endif</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = sp_platform_probe,</div><div class='ctx'> 	.remove_new = sp_platform_remove,</div><div class='head'>diff --git a/drivers/crypto/hisilicon/debugfs.c b/drivers/crypto/hisilicon/debugfs.c<br/>index cd67fa348ca7..1b9b7bccdeff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/debugfs.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #define QM_DFX_COMMON_LEN		0xC3</div><div class='ctx'> #define QM_DFX_REGS_LEN			4UL</div><div class='ctx'> #define QM_DBG_TMP_BUF_LEN		22</div><div class='add'>+#define QM_XQC_ADDR_MASK		GENMASK(31, 0)</div><div class='ctx'> #define CURRENT_FUN_MASK		GENMASK(5, 0)</div><div class='ctx'> #define CURRENT_Q_MASK			GENMASK(31, 16)</div><div class='ctx'> #define QM_SQE_ADDR_MASK		GENMASK(7, 0)</div><div class='hunk'>@@ -167,7 +168,6 @@ static void dump_show(struct hisi_qm *qm, void *info,</div><div class='ctx'> static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;qm-&gt;pdev-&gt;dev;</div><div class='del'>-	struct qm_sqc *sqc_curr;</div><div class='ctx'> 	struct qm_sqc sqc;</div><div class='ctx'> 	u32 qp_id;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -183,6 +183,8 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> </div><div class='ctx'> 	ret = qm_set_and_get_xqc(qm, QM_MB_CMD_SQC, &amp;sqc, qp_id, 1);</div><div class='ctx'> 	if (!ret) {</div><div class='add'>+		sqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+		sqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='ctx'> 		dump_show(qm, &amp;sqc, sizeof(struct qm_sqc), name);</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -190,9 +192,10 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;qm-&gt;qps_lock);</div><div class='ctx'> 	if (qm-&gt;sqc) {</div><div class='del'>-		sqc_curr = qm-&gt;sqc + qp_id;</div><div class='del'>-</div><div class='del'>-		dump_show(qm, sqc_curr, sizeof(*sqc_curr), "SOFT SQC");</div><div class='add'>+		memcpy(&amp;sqc, qm-&gt;sqc + qp_id * sizeof(struct qm_sqc), sizeof(struct qm_sqc));</div><div class='add'>+		sqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+		sqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+		dump_show(qm, &amp;sqc, sizeof(struct qm_sqc), "SOFT SQC");</div><div class='ctx'> 	}</div><div class='ctx'> 	up_read(&amp;qm-&gt;qps_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -202,7 +205,6 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;qm-&gt;pdev-&gt;dev;</div><div class='del'>-	struct qm_cqc *cqc_curr;</div><div class='ctx'> 	struct qm_cqc cqc;</div><div class='ctx'> 	u32 qp_id;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -218,6 +220,8 @@ static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> </div><div class='ctx'> 	ret = qm_set_and_get_xqc(qm, QM_MB_CMD_CQC, &amp;cqc, qp_id, 1);</div><div class='ctx'> 	if (!ret) {</div><div class='add'>+		cqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+		cqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='ctx'> 		dump_show(qm, &amp;cqc, sizeof(struct qm_cqc), name);</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -225,9 +229,10 @@ static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;qm-&gt;qps_lock);</div><div class='ctx'> 	if (qm-&gt;cqc) {</div><div class='del'>-		cqc_curr = qm-&gt;cqc + qp_id;</div><div class='del'>-</div><div class='del'>-		dump_show(qm, cqc_curr, sizeof(*cqc_curr), "SOFT CQC");</div><div class='add'>+		memcpy(&amp;cqc, qm-&gt;cqc + qp_id * sizeof(struct qm_cqc), sizeof(struct qm_cqc));</div><div class='add'>+		cqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+		cqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+		dump_show(qm, &amp;cqc, sizeof(struct qm_cqc), "SOFT CQC");</div><div class='ctx'> 	}</div><div class='ctx'> 	up_read(&amp;qm-&gt;qps_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -263,6 +268,10 @@ static int qm_eqc_aeqc_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	aeqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+	aeqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+	eqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='add'>+	eqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);</div><div class='ctx'> 	dump_show(qm, xeqc, size, name);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -310,27 +319,26 @@ static int q_dump_param_parse(struct hisi_qm *qm, char *s,</div><div class='ctx'> </div><div class='ctx'> static int qm_sq_dump(struct hisi_qm *qm, char *s, char *name)</div><div class='ctx'> {</div><div class='del'>-	u16 sq_depth = qm-&gt;qp_array-&gt;cq_depth;</div><div class='del'>-	void *sqe, *sqe_curr;</div><div class='add'>+	u16 sq_depth = qm-&gt;qp_array-&gt;sq_depth;</div><div class='ctx'> 	struct hisi_qp *qp;</div><div class='ctx'> 	u32 qp_id, sqe_id;</div><div class='add'>+	void *sqe;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = q_dump_param_parse(qm, s, &amp;sqe_id, &amp;qp_id, sq_depth);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	sqe = kzalloc(qm-&gt;sqe_size * sq_depth, GFP_KERNEL);</div><div class='add'>+	sqe = kzalloc(qm-&gt;sqe_size, GFP_KERNEL);</div><div class='ctx'> 	if (!sqe)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	qp = &amp;qm-&gt;qp_array[qp_id];</div><div class='del'>-	memcpy(sqe, qp-&gt;sqe, qm-&gt;sqe_size * sq_depth);</div><div class='del'>-	sqe_curr = sqe + (u32)(sqe_id * qm-&gt;sqe_size);</div><div class='del'>-	memset(sqe_curr + qm-&gt;debug.sqe_mask_offset, QM_SQE_ADDR_MASK,</div><div class='add'>+	memcpy(sqe, qp-&gt;sqe + sqe_id * qm-&gt;sqe_size, qm-&gt;sqe_size);</div><div class='add'>+	memset(sqe + qm-&gt;debug.sqe_mask_offset, QM_SQE_ADDR_MASK,</div><div class='ctx'> 	       qm-&gt;debug.sqe_mask_len);</div><div class='ctx'> </div><div class='del'>-	dump_show(qm, sqe_curr, qm-&gt;sqe_size, name);</div><div class='add'>+	dump_show(qm, sqe, qm-&gt;sqe_size, name);</div><div class='ctx'> </div><div class='ctx'> 	kfree(sqe);</div><div class='ctx'> </div><div class='hunk'>@@ -809,8 +817,14 @@ static void dfx_regs_uninit(struct hisi_qm *qm,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (!dregs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* Setting the pointer is NULL to prevent double free */</div><div class='ctx'> 	for (i = 0; i &lt; reg_len; i++) {</div><div class='add'>+		if (!dregs[i].regs)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		kfree(dregs[i].regs);</div><div class='ctx'> 		dregs[i].regs = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -860,14 +874,21 @@ alloc_error:</div><div class='ctx'> static int qm_diff_regs_init(struct hisi_qm *qm,</div><div class='ctx'> 		struct dfx_diff_registers *dregs, u32 reg_len)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	qm-&gt;debug.qm_diff_regs = dfx_regs_init(qm, qm_diff_regs, ARRAY_SIZE(qm_diff_regs));</div><div class='del'>-	if (IS_ERR(qm-&gt;debug.qm_diff_regs))</div><div class='del'>-		return PTR_ERR(qm-&gt;debug.qm_diff_regs);</div><div class='add'>+	if (IS_ERR(qm-&gt;debug.qm_diff_regs)) {</div><div class='add'>+		ret = PTR_ERR(qm-&gt;debug.qm_diff_regs);</div><div class='add'>+		qm-&gt;debug.qm_diff_regs = NULL;</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	qm-&gt;debug.acc_diff_regs = dfx_regs_init(qm, dregs, reg_len);</div><div class='ctx'> 	if (IS_ERR(qm-&gt;debug.acc_diff_regs)) {</div><div class='ctx'> 		dfx_regs_uninit(qm, qm-&gt;debug.qm_diff_regs, ARRAY_SIZE(qm_diff_regs));</div><div class='del'>-		return PTR_ERR(qm-&gt;debug.acc_diff_regs);</div><div class='add'>+		ret = PTR_ERR(qm-&gt;debug.acc_diff_regs);</div><div class='add'>+		qm-&gt;debug.acc_diff_regs = NULL;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -908,7 +929,9 @@ static int qm_last_regs_init(struct hisi_qm *qm)</div><div class='ctx'> static void qm_diff_regs_uninit(struct hisi_qm *qm, u32 reg_len)</div><div class='ctx'> {</div><div class='ctx'> 	dfx_regs_uninit(qm, qm-&gt;debug.acc_diff_regs, reg_len);</div><div class='add'>+	qm-&gt;debug.acc_diff_regs = NULL;</div><div class='ctx'> 	dfx_regs_uninit(qm, qm-&gt;debug.qm_diff_regs, ARRAY_SIZE(qm_diff_regs));</div><div class='add'>+	qm-&gt;debug.qm_diff_regs = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1075,12 +1098,12 @@ static void qm_create_debugfs_file(struct hisi_qm *qm, struct dentry *dir,</div><div class='ctx'> {</div><div class='ctx'> 	struct debugfs_file *file = qm-&gt;debug.files + index;</div><div class='ctx'> </div><div class='del'>-	debugfs_create_file(qm_debug_file_name[index], 0600, dir, file,</div><div class='del'>-			    &amp;qm_debug_fops);</div><div class='del'>-</div><div class='ctx'> 	file-&gt;index = index;</div><div class='ctx'> 	mutex_init(&amp;file-&gt;lock);</div><div class='ctx'> 	file-&gt;debug = &amp;qm-&gt;debug;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file(qm_debug_file_name[index], 0600, dir, file,</div><div class='add'>+			    &amp;qm_debug_fops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qm_debugfs_atomic64_set(void *data, u64 val)</div><div class='head'>diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c<br/>index d93aa6630a57..10aa4da93323 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/hpre/hpre_main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/hpre/hpre_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/hpre/hpre_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/hpre/hpre_main.c</a></div><div class='hunk'>@@ -106,7 +106,7 @@</div><div class='ctx'> #define HPRE_SHAPER_TYPE_RATE		640</div><div class='ctx'> #define HPRE_VIA_MSI_DSM		1</div><div class='ctx'> #define HPRE_SQE_MASK_OFFSET		8</div><div class='del'>-#define HPRE_SQE_MASK_LEN		24</div><div class='add'>+#define HPRE_SQE_MASK_LEN		44</div><div class='ctx'> #define HPRE_CTX_Q_NUM_DEF		1</div><div class='ctx'> </div><div class='ctx'> #define HPRE_DFX_BASE		0x301000</div><div class='hunk'>@@ -1074,41 +1074,40 @@ static int hpre_debugfs_init(struct hisi_qm *qm)</div><div class='ctx'> 	struct device *dev = &amp;qm-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	qm-&gt;debug.debug_root = debugfs_create_dir(dev_name(dev),</div><div class='del'>-						  hpre_debugfs_root);</div><div class='del'>-</div><div class='del'>-	qm-&gt;debug.sqe_mask_offset = HPRE_SQE_MASK_OFFSET;</div><div class='del'>-	qm-&gt;debug.sqe_mask_len = HPRE_SQE_MASK_LEN;</div><div class='ctx'> 	ret = hisi_qm_regs_debugfs_init(qm, hpre_diff_regs, ARRAY_SIZE(hpre_diff_regs));</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_warn(dev, "Failed to init HPRE diff regs!\n");</div><div class='del'>-		goto debugfs_remove;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	qm-&gt;debug.debug_root = debugfs_create_dir(dev_name(dev),</div><div class='add'>+							hpre_debugfs_root);</div><div class='add'>+	qm-&gt;debug.sqe_mask_offset = HPRE_SQE_MASK_OFFSET;</div><div class='add'>+	qm-&gt;debug.sqe_mask_len = HPRE_SQE_MASK_LEN;</div><div class='add'>+</div><div class='ctx'> 	hisi_qm_debug_init(qm);</div><div class='ctx'> </div><div class='ctx'> 	if (qm-&gt;pdev-&gt;device == PCI_DEVICE_ID_HUAWEI_HPRE_PF) {</div><div class='ctx'> 		ret = hpre_ctrl_debug_init(qm);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto failed_to_create;</div><div class='add'>+			goto debugfs_remove;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hpre_dfx_debug_init(qm);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-failed_to_create:</div><div class='del'>-	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));</div><div class='ctx'> debugfs_remove:</div><div class='ctx'> 	debugfs_remove_recursive(qm-&gt;debug.debug_root);</div><div class='add'>+	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hpre_debugfs_exit(struct hisi_qm *qm)</div><div class='ctx'> {</div><div class='del'>-	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));</div><div class='del'>-</div><div class='ctx'> 	debugfs_remove_recursive(qm-&gt;debug.debug_root);</div><div class='add'>+</div><div class='add'>+	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hpre_pre_store_cap_reg(struct hisi_qm *qm)</div><div class='head'>diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c<br/>index 92f0a1d9b4a6..3dac8d8e8568 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/qm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/qm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/qm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/qm.c</a></div><div class='hunk'>@@ -645,6 +645,9 @@ int qm_set_and_get_xqc(struct hisi_qm *qm, u8 cmd, void *xqc, u32 qp_id, bool op</div><div class='ctx'> 		tmp_xqc = qm-&gt;xqc_buf.aeqc;</div><div class='ctx'> 		xqc_dma = qm-&gt;xqc_buf.aeqc_dma;</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;qm-&gt;pdev-&gt;dev, "unknown mailbox cmd %u\n", cmd);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setting xqc will fail if master OOO is blocked. */</div><div class='hunk'>@@ -2893,12 +2896,9 @@ void hisi_qm_uninit(struct hisi_qm *qm)</div><div class='ctx'> 	hisi_qm_set_state(qm, QM_NOT_READY);</div><div class='ctx'> 	up_write(&amp;qm-&gt;qps_lock);</div><div class='ctx'> </div><div class='add'>+	qm_remove_uacce(qm);</div><div class='ctx'> 	qm_irqs_unregister(qm);</div><div class='ctx'> 	hisi_qm_pci_uninit(qm);</div><div class='del'>-	if (qm-&gt;use_sva) {</div><div class='del'>-		uacce_remove(qm-&gt;uacce);</div><div class='del'>-		qm-&gt;uacce = NULL;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hisi_qm_uninit);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/hisilicon/sec2/sec_crypto.c b/drivers/crypto/hisilicon/sec2/sec_crypto.c<br/>index 93a972fcbf63..0558f98e221f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/sec2/sec_crypto.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/sec2/sec_crypto.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/sec2/sec_crypto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/sec2/sec_crypto.c</a></div><div class='hunk'>@@ -481,8 +481,10 @@ static void sec_alg_resource_free(struct sec_ctx *ctx,</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;pbuf_supported)</div><div class='ctx'> 		sec_free_pbuf_resource(dev, qp_ctx-&gt;res);</div><div class='del'>-	if (ctx-&gt;alg_type == SEC_AEAD)</div><div class='add'>+	if (ctx-&gt;alg_type == SEC_AEAD) {</div><div class='ctx'> 		sec_free_mac_resource(dev, qp_ctx-&gt;res);</div><div class='add'>+		sec_free_aiv_resource(dev, qp_ctx-&gt;res);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sec_alloc_qp_ctx_resource(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx)</div><div class='head'>diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c<br/>index c290d8937b19..75aad04ffe5e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/sec2/sec_main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/sec2/sec_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/sec2/sec_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/sec2/sec_main.c</a></div><div class='hunk'>@@ -99,8 +99,8 @@</div><div class='ctx'> #define SEC_DBGFS_VAL_MAX_LEN		20</div><div class='ctx'> #define SEC_SINGLE_PORT_MAX_TRANS	0x2060</div><div class='ctx'> </div><div class='del'>-#define SEC_SQE_MASK_OFFSET		64</div><div class='del'>-#define SEC_SQE_MASK_LEN		48</div><div class='add'>+#define SEC_SQE_MASK_OFFSET		16</div><div class='add'>+#define SEC_SQE_MASK_LEN		108</div><div class='ctx'> #define SEC_SHAPER_TYPE_RATE		400</div><div class='ctx'> </div><div class='ctx'> #define SEC_DFX_BASE		0x301000</div><div class='hunk'>@@ -152,7 +152,7 @@ static const struct hisi_qm_cap_info sec_basic_info[] = {</div><div class='ctx'> 	{SEC_CORE_TYPE_NUM_CAP, 0x313c, 16, GENMASK(3, 0), 0x1, 0x1, 0x1},</div><div class='ctx'> 	{SEC_CORE_NUM_CAP, 0x313c, 8, GENMASK(7, 0), 0x4, 0x4, 0x4},</div><div class='ctx'> 	{SEC_CORES_PER_CLUSTER_NUM_CAP, 0x313c, 0, GENMASK(7, 0), 0x4, 0x4, 0x4},</div><div class='del'>-	{SEC_CORE_ENABLE_BITMAP, 0x3140, 32, GENMASK(31, 0), 0x17F, 0x17F, 0xF},</div><div class='add'>+	{SEC_CORE_ENABLE_BITMAP, 0x3140, 0, GENMASK(31, 0), 0x17F, 0x17F, 0xF},</div><div class='ctx'> 	{SEC_DRV_ALG_BITMAP_LOW, 0x3144, 0, GENMASK(31, 0), 0x18050CB, 0x18050CB, 0x18670CF},</div><div class='ctx'> 	{SEC_DRV_ALG_BITMAP_HIGH, 0x3148, 0, GENMASK(31, 0), 0x395C, 0x395C, 0x395C},</div><div class='ctx'> 	{SEC_DEV_ALG_BITMAP_LOW, 0x314c, 0, GENMASK(31, 0), 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF},</div><div class='hunk'>@@ -901,37 +901,36 @@ static int sec_debugfs_init(struct hisi_qm *qm)</div><div class='ctx'> 	struct device *dev = &amp;qm-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	qm-&gt;debug.debug_root = debugfs_create_dir(dev_name(dev),</div><div class='del'>-						  sec_debugfs_root);</div><div class='del'>-	qm-&gt;debug.sqe_mask_offset = SEC_SQE_MASK_OFFSET;</div><div class='del'>-	qm-&gt;debug.sqe_mask_len = SEC_SQE_MASK_LEN;</div><div class='del'>-</div><div class='ctx'> 	ret = hisi_qm_regs_debugfs_init(qm, sec_diff_regs, ARRAY_SIZE(sec_diff_regs));</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_warn(dev, "Failed to init SEC diff regs!\n");</div><div class='del'>-		goto debugfs_remove;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	qm-&gt;debug.debug_root = debugfs_create_dir(dev_name(dev),</div><div class='add'>+							sec_debugfs_root);</div><div class='add'>+	qm-&gt;debug.sqe_mask_offset = SEC_SQE_MASK_OFFSET;</div><div class='add'>+	qm-&gt;debug.sqe_mask_len = SEC_SQE_MASK_LEN;</div><div class='add'>+</div><div class='ctx'> 	hisi_qm_debug_init(qm);</div><div class='ctx'> </div><div class='ctx'> 	ret = sec_debug_init(qm);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto failed_to_create;</div><div class='add'>+		goto debugfs_remove;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-failed_to_create:</div><div class='del'>-	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(sec_diff_regs));</div><div class='ctx'> debugfs_remove:</div><div class='del'>-	debugfs_remove_recursive(sec_debugfs_root);</div><div class='add'>+	debugfs_remove_recursive(qm-&gt;debug.debug_root);</div><div class='add'>+	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(sec_diff_regs));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sec_debugfs_exit(struct hisi_qm *qm)</div><div class='ctx'> {</div><div class='del'>-	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(sec_diff_regs));</div><div class='del'>-</div><div class='ctx'> 	debugfs_remove_recursive(qm-&gt;debug.debug_root);</div><div class='add'>+</div><div class='add'>+	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(sec_diff_regs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sec_show_last_regs_init(struct hisi_qm *qm)</div><div class='hunk'>@@ -1324,7 +1323,8 @@ static struct pci_driver sec_pci_driver = {</div><div class='ctx'> 	.probe = sec_probe,</div><div class='ctx'> 	.remove = sec_remove,</div><div class='ctx'> 	.err_handler = &amp;sec_err_handler,</div><div class='del'>-	.sriov_configure = hisi_qm_sriov_configure,</div><div class='add'>+	.sriov_configure = IS_ENABLED(CONFIG_PCI_IOV) ?</div><div class='add'>+				hisi_qm_sriov_configure : NULL,</div><div class='ctx'> 	.shutdown = hisi_qm_dev_shutdown,</div><div class='ctx'> 	.driver.pm = &amp;sec_pm_ops,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/hisilicon/sgl.c b/drivers/crypto/hisilicon/sgl.c<br/>index 0beca257c20b..568acd0aee3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/sgl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/sgl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/sgl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/sgl.c</a></div><div class='hunk'>@@ -161,9 +161,6 @@ static struct hisi_acc_hw_sgl *acc_get_sgl(struct hisi_acc_sgl_pool *pool,</div><div class='ctx'> 	struct mem_block *block;</div><div class='ctx'> 	u32 block_index, offset;</div><div class='ctx'> </div><div class='del'>-	if (!pool || !hw_sgl_dma || index &gt;= pool-&gt;count)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='del'>-</div><div class='ctx'> 	block = pool-&gt;mem_block;</div><div class='ctx'> 	block_index = index / pool-&gt;sgl_num_per_block;</div><div class='ctx'> 	offset = index % pool-&gt;sgl_num_per_block;</div><div class='hunk'>@@ -230,7 +227,7 @@ hisi_acc_sg_buf_map_to_hw_sgl(struct device *dev,</div><div class='ctx'> 	struct scatterlist *sg;</div><div class='ctx'> 	int sg_n;</div><div class='ctx'> </div><div class='del'>-	if (!dev || !sgl || !pool || !hw_sgl_dma)</div><div class='add'>+	if (!dev || !sgl || !pool || !hw_sgl_dma || index &gt;= pool-&gt;count)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='ctx'> 	sg_n = sg_nents(sgl);</div><div class='head'>diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c<br/>index c065fd867161..c94a7b20d07e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/zip/zip_main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/hisilicon/zip/zip_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/zip/zip_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/hisilicon/zip/zip_main.c</a></div><div class='hunk'>@@ -887,36 +887,34 @@ static int hisi_zip_ctrl_debug_init(struct hisi_qm *qm)</div><div class='ctx'> static int hisi_zip_debugfs_init(struct hisi_qm *qm)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;qm-&gt;pdev-&gt;dev;</div><div class='del'>-	struct dentry *dev_d;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dev_d = debugfs_create_dir(dev_name(dev), hzip_debugfs_root);</div><div class='del'>-</div><div class='del'>-	qm-&gt;debug.sqe_mask_offset = HZIP_SQE_MASK_OFFSET;</div><div class='del'>-	qm-&gt;debug.sqe_mask_len = HZIP_SQE_MASK_LEN;</div><div class='del'>-	qm-&gt;debug.debug_root = dev_d;</div><div class='ctx'> 	ret = hisi_qm_regs_debugfs_init(qm, hzip_diff_regs, ARRAY_SIZE(hzip_diff_regs));</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_warn(dev, "Failed to init ZIP diff regs!\n");</div><div class='del'>-		goto debugfs_remove;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	qm-&gt;debug.sqe_mask_offset = HZIP_SQE_MASK_OFFSET;</div><div class='add'>+	qm-&gt;debug.sqe_mask_len = HZIP_SQE_MASK_LEN;</div><div class='add'>+	qm-&gt;debug.debug_root = debugfs_create_dir(dev_name(dev),</div><div class='add'>+							hzip_debugfs_root);</div><div class='add'>+</div><div class='ctx'> 	hisi_qm_debug_init(qm);</div><div class='ctx'> </div><div class='ctx'> 	if (qm-&gt;fun_type == QM_HW_PF) {</div><div class='ctx'> 		ret = hisi_zip_ctrl_debug_init(qm);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto failed_to_create;</div><div class='add'>+			goto debugfs_remove;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hisi_zip_dfx_debug_init(qm);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-failed_to_create:</div><div class='del'>-	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));</div><div class='ctx'> debugfs_remove:</div><div class='del'>-	debugfs_remove_recursive(hzip_debugfs_root);</div><div class='add'>+	debugfs_remove_recursive(qm-&gt;debug.debug_root);</div><div class='add'>+	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -940,10 +938,10 @@ static void hisi_zip_debug_regs_clear(struct hisi_qm *qm)</div><div class='ctx'> </div><div class='ctx'> static void hisi_zip_debugfs_exit(struct hisi_qm *qm)</div><div class='ctx'> {</div><div class='del'>-	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));</div><div class='del'>-</div><div class='ctx'> 	debugfs_remove_recursive(qm-&gt;debug.debug_root);</div><div class='ctx'> </div><div class='add'>+	hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));</div><div class='add'>+</div><div class='ctx'> 	if (qm-&gt;fun_type == QM_HW_PF) {</div><div class='ctx'> 		hisi_zip_debug_regs_clear(qm);</div><div class='ctx'> 		qm-&gt;debug.curr_qm_qp_num = 0;</div><div class='head'>diff --git a/drivers/crypto/intel/iaa/iaa_crypto.h b/drivers/crypto/intel/iaa/iaa_crypto.h<br/>index 2524091a5f70..56985e395263 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/iaa/iaa_crypto.h</a></div><div class='hunk'>@@ -49,10 +49,10 @@ struct iaa_wq {</div><div class='ctx'> </div><div class='ctx'> 	struct iaa_device	*iaa_device;</div><div class='ctx'> </div><div class='del'>-	u64			comp_calls;</div><div class='del'>-	u64			comp_bytes;</div><div class='del'>-	u64			decomp_calls;</div><div class='del'>-	u64			decomp_bytes;</div><div class='add'>+	atomic64_t		comp_calls;</div><div class='add'>+	atomic64_t		comp_bytes;</div><div class='add'>+	atomic64_t		decomp_calls;</div><div class='add'>+	atomic64_t		decomp_bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct iaa_device_compression_mode {</div><div class='hunk'>@@ -73,10 +73,10 @@ struct iaa_device {</div><div class='ctx'> 	int				n_wq;</div><div class='ctx'> 	struct list_head		wqs;</div><div class='ctx'> </div><div class='del'>-	u64				comp_calls;</div><div class='del'>-	u64				comp_bytes;</div><div class='del'>-	u64				decomp_calls;</div><div class='del'>-	u64				decomp_bytes;</div><div class='add'>+	atomic64_t			comp_calls;</div><div class='add'>+	atomic64_t			comp_bytes;</div><div class='add'>+	atomic64_t			decomp_calls;</div><div class='add'>+	atomic64_t			decomp_bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wq_table_entry {</div><div class='head'>diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/intel/iaa/iaa_crypto_main.c<br/>index b2191ade9011..e810d286ee8c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/iaa/iaa_crypto_main.c</a></div><div class='hunk'>@@ -347,18 +347,16 @@ int add_iaa_compression_mode(const char *name,</div><div class='ctx'> 		goto free;</div><div class='ctx'> </div><div class='ctx'> 	if (ll_table) {</div><div class='del'>-		mode-&gt;ll_table = kzalloc(ll_table_size, GFP_KERNEL);</div><div class='add'>+		mode-&gt;ll_table = kmemdup(ll_table, ll_table_size, GFP_KERNEL);</div><div class='ctx'> 		if (!mode-&gt;ll_table)</div><div class='ctx'> 			goto free;</div><div class='del'>-		memcpy(mode-&gt;ll_table, ll_table, ll_table_size);</div><div class='ctx'> 		mode-&gt;ll_table_size = ll_table_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (d_table) {</div><div class='del'>-		mode-&gt;d_table = kzalloc(d_table_size, GFP_KERNEL);</div><div class='add'>+		mode-&gt;d_table = kmemdup(d_table, d_table_size, GFP_KERNEL);</div><div class='ctx'> 		if (!mode-&gt;d_table)</div><div class='ctx'> 			goto free;</div><div class='del'>-		memcpy(mode-&gt;d_table, d_table, d_table_size);</div><div class='ctx'> 		mode-&gt;d_table_size = d_table_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -922,7 +920,7 @@ static void rebalance_wq_table(void)</div><div class='ctx'> 	for_each_node_with_cpus(node) {</div><div class='ctx'> 		node_cpus = cpumask_of_node(node);</div><div class='ctx'> </div><div class='del'>-		for (cpu = 0; cpu &lt; nr_cpus_per_node; cpu++) {</div><div class='add'>+		for (cpu = 0; cpu &lt;  cpumask_weight(node_cpus); cpu++) {</div><div class='ctx'> 			int node_cpu = cpumask_nth(cpu, node_cpus);</div><div class='ctx'> </div><div class='ctx'> 			if (WARN_ON(node_cpu &gt;= nr_cpu_ids)) {</div><div class='hunk'>@@ -1079,8 +1077,8 @@ static void iaa_desc_complete(struct idxd_desc *idxd_desc,</div><div class='ctx'> 		update_total_comp_bytes_out(ctx-&gt;req-&gt;dlen);</div><div class='ctx'> 		update_wq_comp_bytes(iaa_wq-&gt;wq, ctx-&gt;req-&gt;dlen);</div><div class='ctx'> 	} else {</div><div class='del'>-		update_total_decomp_bytes_in(ctx-&gt;req-&gt;dlen);</div><div class='del'>-		update_wq_decomp_bytes(iaa_wq-&gt;wq, ctx-&gt;req-&gt;dlen);</div><div class='add'>+		update_total_decomp_bytes_in(ctx-&gt;req-&gt;slen);</div><div class='add'>+		update_wq_decomp_bytes(iaa_wq-&gt;wq, ctx-&gt;req-&gt;slen);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;compress &amp;&amp; compression_ctx-&gt;verify_compress) {</div><div class='hunk'>@@ -1498,7 +1496,6 @@ static int iaa_comp_acompress(struct acomp_req *req)</div><div class='ctx'> 	u32 compression_crc;</div><div class='ctx'> 	struct idxd_wq *wq;</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	u64 start_time_ns;</div><div class='ctx'> 	int order = -1;</div><div class='ctx'> </div><div class='ctx'> 	compression_ctx = crypto_tfm_ctx(tfm);</div><div class='hunk'>@@ -1572,10 +1569,8 @@ static int iaa_comp_acompress(struct acomp_req *req)</div><div class='ctx'> 		" req-&gt;dlen %d, sg_dma_len(sg) %d\n", dst_addr, nr_sgs,</div><div class='ctx'> 		req-&gt;dst, req-&gt;dlen, sg_dma_len(req-&gt;dst));</div><div class='ctx'> </div><div class='del'>-	start_time_ns = iaa_get_ts();</div><div class='ctx'> 	ret = iaa_compress(tfm, req, wq, src_addr, req-&gt;slen, dst_addr,</div><div class='ctx'> 			   &amp;req-&gt;dlen, &amp;compression_crc, disable_async);</div><div class='del'>-	update_max_comp_delay_ns(start_time_ns);</div><div class='ctx'> 	if (ret == -EINPROGRESS)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1622,7 +1617,6 @@ static int iaa_comp_adecompress_alloc_dest(struct acomp_req *req)</div><div class='ctx'> 	struct iaa_wq *iaa_wq;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct idxd_wq *wq;</div><div class='del'>-	u64 start_time_ns;</div><div class='ctx'> 	int order = -1;</div><div class='ctx'> </div><div class='ctx'> 	cpu = get_cpu();</div><div class='hunk'>@@ -1679,10 +1673,8 @@ alloc_dest:</div><div class='ctx'> 	dev_dbg(dev, "dma_map_sg, dst_addr %llx, nr_sgs %d, req-&gt;dst %p,"</div><div class='ctx'> 		" req-&gt;dlen %d, sg_dma_len(sg) %d\n", dst_addr, nr_sgs,</div><div class='ctx'> 		req-&gt;dst, req-&gt;dlen, sg_dma_len(req-&gt;dst));</div><div class='del'>-	start_time_ns = iaa_get_ts();</div><div class='ctx'> 	ret = iaa_decompress(tfm, req, wq, src_addr, req-&gt;slen,</div><div class='ctx'> 			     dst_addr, &amp;req-&gt;dlen, true);</div><div class='del'>-	update_max_decomp_delay_ns(start_time_ns);</div><div class='ctx'> 	if (ret == -EOVERFLOW) {</div><div class='ctx'> 		dma_unmap_sg(dev, req-&gt;dst, sg_nents(req-&gt;dst), DMA_FROM_DEVICE);</div><div class='ctx'> 		req-&gt;dlen *= 2;</div><div class='hunk'>@@ -1713,7 +1705,6 @@ static int iaa_comp_adecompress(struct acomp_req *req)</div><div class='ctx'> 	int nr_sgs, cpu, ret = 0;</div><div class='ctx'> 	struct iaa_wq *iaa_wq;</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	u64 start_time_ns;</div><div class='ctx'> 	struct idxd_wq *wq;</div><div class='ctx'> </div><div class='ctx'> 	if (!iaa_crypto_enabled) {</div><div class='hunk'>@@ -1773,10 +1764,8 @@ static int iaa_comp_adecompress(struct acomp_req *req)</div><div class='ctx'> 		" req-&gt;dlen %d, sg_dma_len(sg) %d\n", dst_addr, nr_sgs,</div><div class='ctx'> 		req-&gt;dst, req-&gt;dlen, sg_dma_len(req-&gt;dst));</div><div class='ctx'> </div><div class='del'>-	start_time_ns = iaa_get_ts();</div><div class='ctx'> 	ret = iaa_decompress(tfm, req, wq, src_addr, req-&gt;slen,</div><div class='ctx'> 			     dst_addr, &amp;req-&gt;dlen, false);</div><div class='del'>-	update_max_decomp_delay_ns(start_time_ns);</div><div class='ctx'> 	if (ret == -EINPROGRESS)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2014,7 +2003,7 @@ static int __init iaa_crypto_init_module(void)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int node;</div><div class='ctx'> </div><div class='del'>-	nr_cpus = num_online_cpus();</div><div class='add'>+	nr_cpus = num_possible_cpus();</div><div class='ctx'> 	for_each_node_with_cpus(node)</div><div class='ctx'> 		nr_nodes++;</div><div class='ctx'> 	if (!nr_nodes) {</div><div class='head'>diff --git a/drivers/crypto/intel/iaa/iaa_crypto_stats.c b/drivers/crypto/intel/iaa/iaa_crypto_stats.c<br/>index c9f83af4b307..f5cc3d29ca19 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_stats.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto_stats.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_stats.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/iaa/iaa_crypto_stats.c</a></div><div class='hunk'>@@ -17,141 +17,117 @@</div><div class='ctx'> #include "iaa_crypto.h"</div><div class='ctx'> #include "iaa_crypto_stats.h"</div><div class='ctx'> </div><div class='del'>-static u64 total_comp_calls;</div><div class='del'>-static u64 total_decomp_calls;</div><div class='del'>-static u64 total_sw_decomp_calls;</div><div class='del'>-static u64 max_comp_delay_ns;</div><div class='del'>-static u64 max_decomp_delay_ns;</div><div class='del'>-static u64 total_comp_bytes_out;</div><div class='del'>-static u64 total_decomp_bytes_in;</div><div class='del'>-static u64 total_completion_einval_errors;</div><div class='del'>-static u64 total_completion_timeout_errors;</div><div class='del'>-static u64 total_completion_comp_buf_overflow_errors;</div><div class='add'>+static atomic64_t total_comp_calls;</div><div class='add'>+static atomic64_t total_decomp_calls;</div><div class='add'>+static atomic64_t total_sw_decomp_calls;</div><div class='add'>+static atomic64_t total_comp_bytes_out;</div><div class='add'>+static atomic64_t total_decomp_bytes_in;</div><div class='add'>+static atomic64_t total_completion_einval_errors;</div><div class='add'>+static atomic64_t total_completion_timeout_errors;</div><div class='add'>+static atomic64_t total_completion_comp_buf_overflow_errors;</div><div class='ctx'> </div><div class='ctx'> static struct dentry *iaa_crypto_debugfs_root;</div><div class='ctx'> </div><div class='ctx'> void update_total_comp_calls(void)</div><div class='ctx'> {</div><div class='del'>-	total_comp_calls++;</div><div class='add'>+	atomic64_inc(&amp;total_comp_calls);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_total_comp_bytes_out(int n)</div><div class='ctx'> {</div><div class='del'>-	total_comp_bytes_out += n;</div><div class='add'>+	atomic64_add(n, &amp;total_comp_bytes_out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_total_decomp_calls(void)</div><div class='ctx'> {</div><div class='del'>-	total_decomp_calls++;</div><div class='add'>+	atomic64_inc(&amp;total_decomp_calls);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_total_sw_decomp_calls(void)</div><div class='ctx'> {</div><div class='del'>-	total_sw_decomp_calls++;</div><div class='add'>+	atomic64_inc(&amp;total_sw_decomp_calls);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_total_decomp_bytes_in(int n)</div><div class='ctx'> {</div><div class='del'>-	total_decomp_bytes_in += n;</div><div class='add'>+	atomic64_add(n, &amp;total_decomp_bytes_in);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_completion_einval_errs(void)</div><div class='ctx'> {</div><div class='del'>-	total_completion_einval_errors++;</div><div class='add'>+	atomic64_inc(&amp;total_completion_einval_errors);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_completion_timeout_errs(void)</div><div class='ctx'> {</div><div class='del'>-	total_completion_timeout_errors++;</div><div class='add'>+	atomic64_inc(&amp;total_completion_timeout_errors);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_completion_comp_buf_overflow_errs(void)</div><div class='ctx'> {</div><div class='del'>-	total_completion_comp_buf_overflow_errors++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void update_max_comp_delay_ns(u64 start_time_ns)</div><div class='del'>-{</div><div class='del'>-	u64 time_diff;</div><div class='del'>-</div><div class='del'>-	time_diff = ktime_get_ns() - start_time_ns;</div><div class='del'>-</div><div class='del'>-	if (time_diff &gt; max_comp_delay_ns)</div><div class='del'>-		max_comp_delay_ns = time_diff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void update_max_decomp_delay_ns(u64 start_time_ns)</div><div class='del'>-{</div><div class='del'>-	u64 time_diff;</div><div class='del'>-</div><div class='del'>-	time_diff = ktime_get_ns() - start_time_ns;</div><div class='del'>-</div><div class='del'>-	if (time_diff &gt; max_decomp_delay_ns)</div><div class='del'>-		max_decomp_delay_ns = time_diff;</div><div class='add'>+	atomic64_inc(&amp;total_completion_comp_buf_overflow_errors);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_wq_comp_calls(struct idxd_wq *idxd_wq)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_wq *wq = idxd_wq_get_private(idxd_wq);</div><div class='ctx'> </div><div class='del'>-	wq-&gt;comp_calls++;</div><div class='del'>-	wq-&gt;iaa_device-&gt;comp_calls++;</div><div class='add'>+	atomic64_inc(&amp;wq-&gt;comp_calls);</div><div class='add'>+	atomic64_inc(&amp;wq-&gt;iaa_device-&gt;comp_calls);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_wq_comp_bytes(struct idxd_wq *idxd_wq, int n)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_wq *wq = idxd_wq_get_private(idxd_wq);</div><div class='ctx'> </div><div class='del'>-	wq-&gt;comp_bytes += n;</div><div class='del'>-	wq-&gt;iaa_device-&gt;comp_bytes += n;</div><div class='add'>+	atomic64_add(n, &amp;wq-&gt;comp_bytes);</div><div class='add'>+	atomic64_add(n, &amp;wq-&gt;iaa_device-&gt;comp_bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_wq_decomp_calls(struct idxd_wq *idxd_wq)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_wq *wq = idxd_wq_get_private(idxd_wq);</div><div class='ctx'> </div><div class='del'>-	wq-&gt;decomp_calls++;</div><div class='del'>-	wq-&gt;iaa_device-&gt;decomp_calls++;</div><div class='add'>+	atomic64_inc(&amp;wq-&gt;decomp_calls);</div><div class='add'>+	atomic64_inc(&amp;wq-&gt;iaa_device-&gt;decomp_calls);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void update_wq_decomp_bytes(struct idxd_wq *idxd_wq, int n)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_wq *wq = idxd_wq_get_private(idxd_wq);</div><div class='ctx'> </div><div class='del'>-	wq-&gt;decomp_bytes += n;</div><div class='del'>-	wq-&gt;iaa_device-&gt;decomp_bytes += n;</div><div class='add'>+	atomic64_add(n, &amp;wq-&gt;decomp_bytes);</div><div class='add'>+	atomic64_add(n, &amp;wq-&gt;iaa_device-&gt;decomp_bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void reset_iaa_crypto_stats(void)</div><div class='ctx'> {</div><div class='del'>-	total_comp_calls = 0;</div><div class='del'>-	total_decomp_calls = 0;</div><div class='del'>-	total_sw_decomp_calls = 0;</div><div class='del'>-	max_comp_delay_ns = 0;</div><div class='del'>-	max_decomp_delay_ns = 0;</div><div class='del'>-	total_comp_bytes_out = 0;</div><div class='del'>-	total_decomp_bytes_in = 0;</div><div class='del'>-	total_completion_einval_errors = 0;</div><div class='del'>-	total_completion_timeout_errors = 0;</div><div class='del'>-	total_completion_comp_buf_overflow_errors = 0;</div><div class='add'>+	atomic64_set(&amp;total_comp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;total_decomp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;total_sw_decomp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;total_comp_bytes_out, 0);</div><div class='add'>+	atomic64_set(&amp;total_decomp_bytes_in, 0);</div><div class='add'>+	atomic64_set(&amp;total_completion_einval_errors, 0);</div><div class='add'>+	atomic64_set(&amp;total_completion_timeout_errors, 0);</div><div class='add'>+	atomic64_set(&amp;total_completion_comp_buf_overflow_errors, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void reset_wq_stats(struct iaa_wq *wq)</div><div class='ctx'> {</div><div class='del'>-	wq-&gt;comp_calls = 0;</div><div class='del'>-	wq-&gt;comp_bytes = 0;</div><div class='del'>-	wq-&gt;decomp_calls = 0;</div><div class='del'>-	wq-&gt;decomp_bytes = 0;</div><div class='add'>+	atomic64_set(&amp;wq-&gt;comp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;wq-&gt;comp_bytes, 0);</div><div class='add'>+	atomic64_set(&amp;wq-&gt;decomp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;wq-&gt;decomp_bytes, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void reset_device_stats(struct iaa_device *iaa_device)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_wq *iaa_wq;</div><div class='ctx'> </div><div class='del'>-	iaa_device-&gt;comp_calls = 0;</div><div class='del'>-	iaa_device-&gt;comp_bytes = 0;</div><div class='del'>-	iaa_device-&gt;decomp_calls = 0;</div><div class='del'>-	iaa_device-&gt;decomp_bytes = 0;</div><div class='add'>+	atomic64_set(&amp;iaa_device-&gt;comp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;iaa_device-&gt;comp_bytes, 0);</div><div class='add'>+	atomic64_set(&amp;iaa_device-&gt;decomp_calls, 0);</div><div class='add'>+	atomic64_set(&amp;iaa_device-&gt;decomp_bytes, 0);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(iaa_wq, &amp;iaa_device-&gt;wqs, list)</div><div class='ctx'> 		reset_wq_stats(iaa_wq);</div><div class='hunk'>@@ -160,10 +136,14 @@ static void reset_device_stats(struct iaa_device *iaa_device)</div><div class='ctx'> static void wq_show(struct seq_file *m, struct iaa_wq *iaa_wq)</div><div class='ctx'> {</div><div class='ctx'> 	seq_printf(m, "    name: %s\n", iaa_wq-&gt;wq-&gt;name);</div><div class='del'>-	seq_printf(m, "    comp_calls: %llu\n", iaa_wq-&gt;comp_calls);</div><div class='del'>-	seq_printf(m, "    comp_bytes: %llu\n", iaa_wq-&gt;comp_bytes);</div><div class='del'>-	seq_printf(m, "    decomp_calls: %llu\n", iaa_wq-&gt;decomp_calls);</div><div class='del'>-	seq_printf(m, "    decomp_bytes: %llu\n\n", iaa_wq-&gt;decomp_bytes);</div><div class='add'>+	seq_printf(m, "    comp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_wq-&gt;comp_calls));</div><div class='add'>+	seq_printf(m, "    comp_bytes: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_wq-&gt;comp_bytes));</div><div class='add'>+	seq_printf(m, "    decomp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_wq-&gt;decomp_calls));</div><div class='add'>+	seq_printf(m, "    decomp_bytes: %llu\n\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_wq-&gt;decomp_bytes));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void device_stats_show(struct seq_file *m, struct iaa_device *iaa_device)</div><div class='hunk'>@@ -173,30 +153,41 @@ static void device_stats_show(struct seq_file *m, struct iaa_device *iaa_device)</div><div class='ctx'> 	seq_puts(m, "iaa device:\n");</div><div class='ctx'> 	seq_printf(m, "  id: %d\n", iaa_device-&gt;idxd-&gt;id);</div><div class='ctx'> 	seq_printf(m, "  n_wqs: %d\n", iaa_device-&gt;n_wq);</div><div class='del'>-	seq_printf(m, "  comp_calls: %llu\n", iaa_device-&gt;comp_calls);</div><div class='del'>-	seq_printf(m, "  comp_bytes: %llu\n", iaa_device-&gt;comp_bytes);</div><div class='del'>-	seq_printf(m, "  decomp_calls: %llu\n", iaa_device-&gt;decomp_calls);</div><div class='del'>-	seq_printf(m, "  decomp_bytes: %llu\n", iaa_device-&gt;decomp_bytes);</div><div class='add'>+	seq_printf(m, "  comp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_device-&gt;comp_calls));</div><div class='add'>+	seq_printf(m, "  comp_bytes: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_device-&gt;comp_bytes));</div><div class='add'>+	seq_printf(m, "  decomp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_device-&gt;decomp_calls));</div><div class='add'>+	seq_printf(m, "  decomp_bytes: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;iaa_device-&gt;decomp_bytes));</div><div class='ctx'> 	seq_puts(m, "  wqs:\n");</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(iaa_wq, &amp;iaa_device-&gt;wqs, list)</div><div class='ctx'> 		wq_show(m, iaa_wq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void global_stats_show(struct seq_file *m)</div><div class='add'>+static int global_stats_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	seq_puts(m, "global stats:\n");</div><div class='del'>-	seq_printf(m, "  total_comp_calls: %llu\n", total_comp_calls);</div><div class='del'>-	seq_printf(m, "  total_decomp_calls: %llu\n", total_decomp_calls);</div><div class='del'>-	seq_printf(m, "  total_sw_decomp_calls: %llu\n", total_sw_decomp_calls);</div><div class='del'>-	seq_printf(m, "  total_comp_bytes_out: %llu\n", total_comp_bytes_out);</div><div class='del'>-	seq_printf(m, "  total_decomp_bytes_in: %llu\n", total_decomp_bytes_in);</div><div class='add'>+	seq_printf(m, "  total_comp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;total_comp_calls));</div><div class='add'>+	seq_printf(m, "  total_decomp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;total_decomp_calls));</div><div class='add'>+	seq_printf(m, "  total_sw_decomp_calls: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;total_sw_decomp_calls));</div><div class='add'>+	seq_printf(m, "  total_comp_bytes_out: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;total_comp_bytes_out));</div><div class='add'>+	seq_printf(m, "  total_decomp_bytes_in: %llu\n",</div><div class='add'>+		   atomic64_read(&amp;total_decomp_bytes_in));</div><div class='ctx'> 	seq_printf(m, "  total_completion_einval_errors: %llu\n",</div><div class='del'>-		   total_completion_einval_errors);</div><div class='add'>+		   atomic64_read(&amp;total_completion_einval_errors));</div><div class='ctx'> 	seq_printf(m, "  total_completion_timeout_errors: %llu\n",</div><div class='del'>-		   total_completion_timeout_errors);</div><div class='add'>+		   atomic64_read(&amp;total_completion_timeout_errors));</div><div class='ctx'> 	seq_printf(m, "  total_completion_comp_buf_overflow_errors: %llu\n\n",</div><div class='del'>-		   total_completion_comp_buf_overflow_errors);</div><div class='add'>+		   atomic64_read(&amp;total_completion_comp_buf_overflow_errors));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wq_stats_show(struct seq_file *m, void *v)</div><div class='hunk'>@@ -205,8 +196,6 @@ static int wq_stats_show(struct seq_file *m, void *v)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;iaa_devices_lock);</div><div class='ctx'> </div><div class='del'>-	global_stats_show(m);</div><div class='del'>-</div><div class='ctx'> 	list_for_each_entry(iaa_device, &amp;iaa_devices, list)</div><div class='ctx'> 		device_stats_show(m, iaa_device);</div><div class='ctx'> </div><div class='hunk'>@@ -243,6 +232,18 @@ static const struct file_operations wq_stats_fops = {</div><div class='ctx'> 	.release = single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int global_stats_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, global_stats_show, file);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations global_stats_fops = {</div><div class='add'>+	.open = global_stats_open,</div><div class='add'>+	.read = seq_read,</div><div class='add'>+	.llseek = seq_lseek,</div><div class='add'>+	.release = single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> DEFINE_DEBUGFS_ATTRIBUTE(wq_stats_reset_fops, NULL, iaa_crypto_stats_reset, "%llu\n");</div><div class='ctx'> </div><div class='ctx'> int __init iaa_crypto_debugfs_init(void)</div><div class='hunk'>@@ -252,20 +253,8 @@ int __init iaa_crypto_debugfs_init(void)</div><div class='ctx'> </div><div class='ctx'> 	iaa_crypto_debugfs_root = debugfs_create_dir("iaa_crypto", NULL);</div><div class='ctx'> </div><div class='del'>-	debugfs_create_u64("max_comp_delay_ns", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;max_comp_delay_ns);</div><div class='del'>-	debugfs_create_u64("max_decomp_delay_ns", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;max_decomp_delay_ns);</div><div class='del'>-	debugfs_create_u64("total_comp_calls", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;total_comp_calls);</div><div class='del'>-	debugfs_create_u64("total_decomp_calls", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;total_decomp_calls);</div><div class='del'>-	debugfs_create_u64("total_sw_decomp_calls", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;total_sw_decomp_calls);</div><div class='del'>-	debugfs_create_u64("total_comp_bytes_out", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;total_comp_bytes_out);</div><div class='del'>-	debugfs_create_u64("total_decomp_bytes_in", 0644,</div><div class='del'>-			   iaa_crypto_debugfs_root, &amp;total_decomp_bytes_in);</div><div class='add'>+	debugfs_create_file("global_stats", 0644, iaa_crypto_debugfs_root, NULL,</div><div class='add'>+			    &amp;global_stats_fops);</div><div class='ctx'> 	debugfs_create_file("wq_stats", 0644, iaa_crypto_debugfs_root, NULL,</div><div class='ctx'> 			    &amp;wq_stats_fops);</div><div class='ctx'> 	debugfs_create_file("stats_reset", 0644, iaa_crypto_debugfs_root, NULL,</div><div class='head'>diff --git a/drivers/crypto/intel/iaa/iaa_crypto_stats.h b/drivers/crypto/intel/iaa/iaa_crypto_stats.h<br/>index c916ca83f070..3787a5f507eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_stats.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/iaa/iaa_crypto_stats.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_stats.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/iaa/iaa_crypto_stats.h</a></div><div class='hunk'>@@ -13,8 +13,6 @@ void	update_total_comp_bytes_out(int n);</div><div class='ctx'> void	update_total_decomp_calls(void);</div><div class='ctx'> void	update_total_sw_decomp_calls(void);</div><div class='ctx'> void	update_total_decomp_bytes_in(int n);</div><div class='del'>-void	update_max_comp_delay_ns(u64 start_time_ns);</div><div class='del'>-void	update_max_decomp_delay_ns(u64 start_time_ns);</div><div class='ctx'> void	update_completion_einval_errs(void);</div><div class='ctx'> void	update_completion_timeout_errs(void);</div><div class='ctx'> void	update_completion_comp_buf_overflow_errs(void);</div><div class='hunk'>@@ -24,8 +22,6 @@ void	update_wq_comp_bytes(struct idxd_wq *idxd_wq, int n);</div><div class='ctx'> void	update_wq_decomp_calls(struct idxd_wq *idxd_wq);</div><div class='ctx'> void	update_wq_decomp_bytes(struct idxd_wq *idxd_wq, int n);</div><div class='ctx'> </div><div class='del'>-static inline u64	iaa_get_ts(void) { return ktime_get_ns(); }</div><div class='del'>-</div><div class='ctx'> #else</div><div class='ctx'> static inline int	iaa_crypto_debugfs_init(void) { return 0; }</div><div class='ctx'> static inline void	iaa_crypto_debugfs_cleanup(void) {}</div><div class='hunk'>@@ -35,8 +31,6 @@ static inline void	update_total_comp_bytes_out(int n) {}</div><div class='ctx'> static inline void	update_total_decomp_calls(void) {}</div><div class='ctx'> static inline void	update_total_sw_decomp_calls(void) {}</div><div class='ctx'> static inline void	update_total_decomp_bytes_in(int n) {}</div><div class='del'>-static inline void	update_max_comp_delay_ns(u64 start_time_ns) {}</div><div class='del'>-static inline void	update_max_decomp_delay_ns(u64 start_time_ns) {}</div><div class='ctx'> static inline void	update_completion_einval_errs(void) {}</div><div class='ctx'> static inline void	update_completion_timeout_errs(void) {}</div><div class='ctx'> static inline void	update_completion_comp_buf_overflow_errs(void) {}</div><div class='hunk'>@@ -46,8 +40,6 @@ static inline void	update_wq_comp_bytes(struct idxd_wq *idxd_wq, int n) {}</div><div class='ctx'> static inline void	update_wq_decomp_calls(struct idxd_wq *idxd_wq) {}</div><div class='ctx'> static inline void	update_wq_decomp_bytes(struct idxd_wq *idxd_wq, int n) {}</div><div class='ctx'> </div><div class='del'>-static inline u64	iaa_get_ts(void) { return 0; }</div><div class='del'>-</div><div class='ctx'> #endif // CONFIG_CRYPTO_DEV_IAA_CRYPTO_STATS</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c b/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c<br/>index 1102c47f8293..78f0ea49254d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c</a></div><div class='hunk'>@@ -10,12 +10,14 @@</div><div class='ctx'> #include &lt;adf_fw_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen4_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pm.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_ras.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_timer.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_tl.h&gt;</div><div class='add'>+#include &lt;adf_gen4_vf_mig.h&gt;</div><div class='ctx'> #include "adf_420xx_hw_data.h"</div><div class='ctx'> #include "icp_qat_hw.h"</div><div class='ctx'> </div><div class='hunk'>@@ -296,7 +298,7 @@ static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (adf_gen4_init_thd2arb_map(accel_dev))</div><div class='ctx'> 		dev_warn(&amp;GET_DEV(accel_dev),</div><div class='del'>-			 "Generate of the thread to arbiter map failed");</div><div class='add'>+			 "Failed to generate thread to arbiter mapping");</div><div class='ctx'> </div><div class='ctx'> 	return GET_HW_DATA(accel_dev)-&gt;thd_to_arb_map;</div><div class='ctx'> }</div><div class='hunk'>@@ -487,6 +489,7 @@ void adf_init_hw_data_420xx(struct adf_hw_device_data *hw_data, u32 dev_id)</div><div class='ctx'> 	adf_gen4_init_dc_ops(&amp;hw_data-&gt;dc_ops);</div><div class='ctx'> 	adf_gen4_init_ras_ops(&amp;hw_data-&gt;ras_ops);</div><div class='ctx'> 	adf_gen4_init_tl_data(&amp;hw_data-&gt;tl_data);</div><div class='add'>+	adf_gen4_init_vf_mig_ops(&amp;hw_data-&gt;vfmig_ops);</div><div class='ctx'> 	adf_init_rl_data(&amp;hw_data-&gt;rl_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c<br/>index 927506cf271d..9fd7ec53b9f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c</a></div><div class='hunk'>@@ -10,12 +10,14 @@</div><div class='ctx'> #include &lt;adf_fw_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen4_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pm.h&gt;</div><div class='ctx'> #include "adf_gen4_ras.h"</div><div class='ctx'> #include &lt;adf_gen4_timer.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_tl.h&gt;</div><div class='add'>+#include &lt;adf_gen4_vf_mig.h&gt;</div><div class='ctx'> #include "adf_4xxx_hw_data.h"</div><div class='ctx'> #include "icp_qat_hw.h"</div><div class='ctx'> </div><div class='hunk'>@@ -208,7 +210,7 @@ static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (adf_gen4_init_thd2arb_map(accel_dev))</div><div class='ctx'> 		dev_warn(&amp;GET_DEV(accel_dev),</div><div class='del'>-			 "Generate of the thread to arbiter map failed");</div><div class='add'>+			 "Failed to generate thread to arbiter mapping");</div><div class='ctx'> </div><div class='ctx'> 	return GET_HW_DATA(accel_dev)-&gt;thd_to_arb_map;</div><div class='ctx'> }</div><div class='hunk'>@@ -454,6 +456,8 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id)</div><div class='ctx'> 	hw_data-&gt;get_ring_to_svc_map = adf_gen4_get_ring_to_svc_map;</div><div class='ctx'> 	hw_data-&gt;disable_iov = adf_disable_sriov;</div><div class='ctx'> 	hw_data-&gt;ring_pair_reset = adf_gen4_ring_pair_reset;</div><div class='add'>+	hw_data-&gt;bank_state_save = adf_gen4_bank_state_save;</div><div class='add'>+	hw_data-&gt;bank_state_restore = adf_gen4_bank_state_restore;</div><div class='ctx'> 	hw_data-&gt;enable_pm = adf_gen4_enable_pm;</div><div class='ctx'> 	hw_data-&gt;handle_pm_interrupt = adf_gen4_handle_pm_interrupt;</div><div class='ctx'> 	hw_data-&gt;dev_config = adf_gen4_dev_config;</div><div class='hunk'>@@ -469,6 +473,7 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id)</div><div class='ctx'> 	adf_gen4_init_dc_ops(&amp;hw_data-&gt;dc_ops);</div><div class='ctx'> 	adf_gen4_init_ras_ops(&amp;hw_data-&gt;ras_ops);</div><div class='ctx'> 	adf_gen4_init_tl_data(&amp;hw_data-&gt;tl_data);</div><div class='add'>+	adf_gen4_init_vf_mig_ops(&amp;hw_data-&gt;vfmig_ops);</div><div class='ctx'> 	adf_init_rl_data(&amp;hw_data-&gt;rl_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c<br/>index 9762f2bf7727..d26564cebdec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_4xxx/adf_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_4xxx/adf_drv.c</a></div><div class='hunk'>@@ -197,7 +197,9 @@ module_pci_driver(adf_driver);</div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='ctx'> MODULE_AUTHOR("Intel");</div><div class='ctx'> MODULE_FIRMWARE(ADF_4XXX_FW);</div><div class='add'>+MODULE_FIRMWARE(ADF_402XX_FW);</div><div class='ctx'> MODULE_FIRMWARE(ADF_4XXX_MMP);</div><div class='add'>+MODULE_FIRMWARE(ADF_402XX_MMP);</div><div class='ctx'> MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");</div><div class='ctx'> MODULE_VERSION(ADF_DRV_VERSION);</div><div class='ctx'> MODULE_SOFTDEP("pre: crypto-intel_qat");</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c<br/>index a882e0ea2279..201f9412c582 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='ctx'> #include "adf_c3xxx_hw_data.h"</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c<br/>index 84d9486e04de..a512ca4efd3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_pfvf_vf_msg.h&gt;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c<br/>index 48cf3eb7c734..6b5b0cf9c7c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='ctx'> #include "adf_c62x_hw_data.h"</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c b/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c<br/>index 751d7aa57fc7..4aaaaf921734 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_pfvf_vf_msg.h&gt;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile<br/>index 5915cde8a7aa..6f9266edc9f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/Makefile</a></div><div class='hunk'>@@ -14,16 +14,20 @@ intel_qat-objs := adf_cfg.o \</div><div class='ctx'> 	adf_hw_arbiter.o \</div><div class='ctx'> 	adf_sysfs.o \</div><div class='ctx'> 	adf_sysfs_ras_counters.o \</div><div class='add'>+	adf_gen2_hw_csr_data.o \</div><div class='ctx'> 	adf_gen2_hw_data.o \</div><div class='ctx'> 	adf_gen2_config.o \</div><div class='ctx'> 	adf_gen4_config.o \</div><div class='add'>+	adf_gen4_hw_csr_data.o \</div><div class='ctx'> 	adf_gen4_hw_data.o \</div><div class='add'>+	adf_gen4_vf_mig.o \</div><div class='ctx'> 	adf_gen4_pm.o \</div><div class='ctx'> 	adf_gen2_dc.o \</div><div class='ctx'> 	adf_gen4_dc.o \</div><div class='ctx'> 	adf_gen4_ras.o \</div><div class='ctx'> 	adf_gen4_timer.o \</div><div class='ctx'> 	adf_clock.o \</div><div class='add'>+	adf_mstate_mgr.o \</div><div class='ctx'> 	qat_crypto.o \</div><div class='ctx'> 	qat_compression.o \</div><div class='ctx'> 	qat_comp_algs.o \</div><div class='hunk'>@@ -52,6 +56,6 @@ intel_qat-$(CONFIG_DEBUG_FS) += adf_transport_debug.o \</div><div class='ctx'> intel_qat-$(CONFIG_PCI_IOV) += adf_sriov.o adf_vf_isr.o adf_pfvf_utils.o \</div><div class='ctx'> 			       adf_pfvf_pf_msg.o adf_pfvf_pf_proto.o \</div><div class='ctx'> 			       adf_pfvf_vf_msg.o adf_pfvf_vf_proto.o \</div><div class='del'>-			       adf_gen2_pfvf.o adf_gen4_pfvf.o</div><div class='add'>+			       adf_gen2_pfvf.o adf_gen4_pfvf.o qat_mig_dev.o</div><div class='ctx'> </div><div class='ctx'> intel_qat-$(CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION) += adf_heartbeat_inject.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h<br/>index 08658c3a01e9..7830ecb1a1f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_accel_devices.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_accel_devices.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/qat/qat_mig_dev.h&gt;</div><div class='ctx'> #include "adf_cfg_common.h"</div><div class='ctx'> #include "adf_rl.h"</div><div class='ctx'> #include "adf_telemetry.h"</div><div class='hunk'>@@ -140,6 +141,40 @@ struct admin_info {</div><div class='ctx'> 	u32 mailbox_offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ring_config {</div><div class='add'>+	u64 base;</div><div class='add'>+	u32 config;</div><div class='add'>+	u32 head;</div><div class='add'>+	u32 tail;</div><div class='add'>+	u32 reserved0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bank_state {</div><div class='add'>+	u32 ringstat0;</div><div class='add'>+	u32 ringstat1;</div><div class='add'>+	u32 ringuostat;</div><div class='add'>+	u32 ringestat;</div><div class='add'>+	u32 ringnestat;</div><div class='add'>+	u32 ringnfstat;</div><div class='add'>+	u32 ringfstat;</div><div class='add'>+	u32 ringcstat0;</div><div class='add'>+	u32 ringcstat1;</div><div class='add'>+	u32 ringcstat2;</div><div class='add'>+	u32 ringcstat3;</div><div class='add'>+	u32 iaintflagen;</div><div class='add'>+	u32 iaintflagreg;</div><div class='add'>+	u32 iaintflagsrcsel0;</div><div class='add'>+	u32 iaintflagsrcsel1;</div><div class='add'>+	u32 iaintcolen;</div><div class='add'>+	u32 iaintcolctl;</div><div class='add'>+	u32 iaintflagandcolen;</div><div class='add'>+	u32 ringexpstat;</div><div class='add'>+	u32 ringexpintenable;</div><div class='add'>+	u32 ringsrvarben;</div><div class='add'>+	u32 reserved0;</div><div class='add'>+	struct ring_config rings[ADF_ETR_MAX_RINGS_PER_BANK];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct adf_hw_csr_ops {</div><div class='ctx'> 	u64 (*build_csr_ring_base_addr)(dma_addr_t addr, u32 size);</div><div class='ctx'> 	u32 (*read_csr_ring_head)(void __iomem *csr_base_addr, u32 bank,</div><div class='hunk'>@@ -150,22 +185,49 @@ struct adf_hw_csr_ops {</div><div class='ctx'> 				  u32 ring);</div><div class='ctx'> 	void (*write_csr_ring_tail)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 				    u32 ring, u32 value);</div><div class='add'>+	u32 (*read_csr_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_uo_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='ctx'> 	u32 (*read_csr_e_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_ne_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_nf_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_f_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_c_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_exp_stat)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	u32 (*read_csr_exp_int_en)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	void (*write_csr_exp_int_en)(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				     u32 value);</div><div class='add'>+	u32 (*read_csr_ring_config)(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				    u32 ring);</div><div class='ctx'> 	void (*write_csr_ring_config)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 				      u32 ring, u32 value);</div><div class='add'>+	dma_addr_t (*read_csr_ring_base)(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+					 u32 ring);</div><div class='ctx'> 	void (*write_csr_ring_base)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 				    u32 ring, dma_addr_t addr);</div><div class='add'>+	u32 (*read_csr_int_en)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	void (*write_csr_int_en)(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				 u32 value);</div><div class='add'>+	u32 (*read_csr_int_flag)(void __iomem *csr_base_addr, u32 bank);</div><div class='ctx'> 	void (*write_csr_int_flag)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 				   u32 value);</div><div class='add'>+	u32 (*read_csr_int_srcsel)(void __iomem *csr_base_addr, u32 bank);</div><div class='ctx'> 	void (*write_csr_int_srcsel)(void __iomem *csr_base_addr, u32 bank);</div><div class='add'>+	void (*write_csr_int_srcsel_w_val)(void __iomem *csr_base_addr,</div><div class='add'>+					   u32 bank, u32 value);</div><div class='add'>+	u32 (*read_csr_int_col_en)(void __iomem *csr_base_addr, u32 bank);</div><div class='ctx'> 	void (*write_csr_int_col_en)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 				     u32 value);</div><div class='add'>+	u32 (*read_csr_int_col_ctl)(void __iomem *csr_base_addr, u32 bank);</div><div class='ctx'> 	void (*write_csr_int_col_ctl)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 				      u32 value);</div><div class='add'>+	u32 (*read_csr_int_flag_and_col)(void __iomem *csr_base_addr,</div><div class='add'>+					 u32 bank);</div><div class='ctx'> 	void (*write_csr_int_flag_and_col)(void __iomem *csr_base_addr,</div><div class='ctx'> 					   u32 bank, u32 value);</div><div class='add'>+	u32 (*read_csr_ring_srv_arb_en)(void __iomem *csr_base_addr, u32 bank);</div><div class='ctx'> 	void (*write_csr_ring_srv_arb_en)(void __iomem *csr_base_addr, u32 bank,</div><div class='ctx'> 					  u32 value);</div><div class='add'>+	u32 (*get_int_col_ctl_enable_mask)(void);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct adf_cfg_device_data;</div><div class='hunk'>@@ -197,6 +259,20 @@ struct adf_dc_ops {</div><div class='ctx'> 	void (*build_deflate_ctx)(void *ctx);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct qat_migdev_ops {</div><div class='add'>+	int (*init)(struct qat_mig_dev *mdev);</div><div class='add'>+	void (*cleanup)(struct qat_mig_dev *mdev);</div><div class='add'>+	void (*reset)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*open)(struct qat_mig_dev *mdev);</div><div class='add'>+	void (*close)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*suspend)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*resume)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*save_state)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*save_setup)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*load_state)(struct qat_mig_dev *mdev);</div><div class='add'>+	int (*load_setup)(struct qat_mig_dev *mdev, int size);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct adf_dev_err_mask {</div><div class='ctx'> 	u32 cppagentcmdpar_mask;</div><div class='ctx'> 	u32 parerr_ath_cph_mask;</div><div class='hunk'>@@ -244,6 +320,10 @@ struct adf_hw_device_data {</div><div class='ctx'> 	void (*enable_ints)(struct adf_accel_dev *accel_dev);</div><div class='ctx'> 	void (*set_ssm_wdtimer)(struct adf_accel_dev *accel_dev);</div><div class='ctx'> 	int (*ring_pair_reset)(struct adf_accel_dev *accel_dev, u32 bank_nr);</div><div class='add'>+	int (*bank_state_save)(struct adf_accel_dev *accel_dev, u32 bank_number,</div><div class='add'>+			       struct bank_state *state);</div><div class='add'>+	int (*bank_state_restore)(struct adf_accel_dev *accel_dev,</div><div class='add'>+				  u32 bank_number, struct bank_state *state);</div><div class='ctx'> 	void (*reset_device)(struct adf_accel_dev *accel_dev);</div><div class='ctx'> 	void (*set_msix_rttable)(struct adf_accel_dev *accel_dev);</div><div class='ctx'> 	const char *(*uof_get_name)(struct adf_accel_dev *accel_dev, u32 obj_num);</div><div class='hunk'>@@ -260,6 +340,7 @@ struct adf_hw_device_data {</div><div class='ctx'> 	struct adf_dev_err_mask dev_err_mask;</div><div class='ctx'> 	struct adf_rl_hw_data rl_data;</div><div class='ctx'> 	struct adf_tl_hw_data tl_data;</div><div class='add'>+	struct qat_migdev_ops vfmig_ops;</div><div class='ctx'> 	const char *fw_name;</div><div class='ctx'> 	const char *fw_mmp_name;</div><div class='ctx'> 	u32 fuses;</div><div class='hunk'>@@ -316,6 +397,7 @@ struct adf_hw_device_data {</div><div class='ctx'> #define GET_CSR_OPS(accel_dev) (&amp;(accel_dev)-&gt;hw_device-&gt;csr_ops)</div><div class='ctx'> #define GET_PFVF_OPS(accel_dev) (&amp;(accel_dev)-&gt;hw_device-&gt;pfvf_ops)</div><div class='ctx'> #define GET_DC_OPS(accel_dev) (&amp;(accel_dev)-&gt;hw_device-&gt;dc_ops)</div><div class='add'>+#define GET_VFMIG_OPS(accel_dev) (&amp;(accel_dev)-&gt;hw_device-&gt;vfmig_ops)</div><div class='ctx'> #define GET_TL_DATA(accel_dev) GET_HW_DATA(accel_dev)-&gt;tl_data</div><div class='ctx'> #define accel_to_pci_dev(accel_ptr) accel_ptr-&gt;accel_pci_dev.pci_dev</div><div class='ctx'> </div><div class='hunk'>@@ -330,11 +412,17 @@ struct adf_fw_loader_data {</div><div class='ctx'> struct adf_accel_vf_info {</div><div class='ctx'> 	struct adf_accel_dev *accel_dev;</div><div class='ctx'> 	struct mutex pf2vf_lock; /* protect CSR access for PF2VF messages */</div><div class='add'>+	struct mutex pfvf_mig_lock; /* protects PFVF state for migration */</div><div class='ctx'> 	struct ratelimit_state vf2pf_ratelimit;</div><div class='ctx'> 	u32 vf_nr;</div><div class='ctx'> 	bool init;</div><div class='ctx'> 	bool restarting;</div><div class='ctx'> 	u8 vf_compat_ver;</div><div class='add'>+	/*</div><div class='add'>+	 * Private area used for device migration.</div><div class='add'>+	 * Memory allocation and free is managed by migration driver.</div><div class='add'>+	 */</div><div class='add'>+	void *mig_priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct adf_dc_data {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h<br/>index 57328249c89e..3bec9e20bad0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_common_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_common_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_common_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_common_drv.h</a></div><div class='hunk'>@@ -248,6 +248,16 @@ static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 	return pmisc-&gt;virt_addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void __iomem *adf_get_etr_base(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_bar *etr;</div><div class='add'>+</div><div class='add'>+	etr = &amp;GET_BARS(accel_dev)[hw_data-&gt;get_etr_bar_id(hw_data)];</div><div class='add'>+</div><div class='add'>+	return etr-&gt;virt_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void __iomem *adf_get_aram_base(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.c b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.c<br/>new file mode 100644<br/>index 000000000000..650c9edd8a66<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.c</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include "adf_gen2_hw_csr_data.h"</div><div class='add'>+</div><div class='add'>+static u64 build_csr_ring_base_addr(dma_addr_t addr, u32 size)</div><div class='add'>+{</div><div class='add'>+	return BUILD_RING_BASE_ADDR(addr, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_TAIL(csr_base_addr, bank, ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_E_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_config(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				  u32 ring, u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				dma_addr_t addr)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_flag(void __iomem *csr_base_addr, u32 bank, u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_FLAG(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_SRCSEL(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				 u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				  u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				       u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				      u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops)</div><div class='add'>+{</div><div class='add'>+	csr_ops-&gt;build_csr_ring_base_addr = build_csr_ring_base_addr;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_head = read_csr_ring_head;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_head = write_csr_ring_head;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_tail = read_csr_ring_tail;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_tail = write_csr_ring_tail;</div><div class='add'>+	csr_ops-&gt;read_csr_e_stat = read_csr_e_stat;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_config = write_csr_ring_config;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_base = write_csr_ring_base;</div><div class='add'>+	csr_ops-&gt;write_csr_int_flag = write_csr_int_flag;</div><div class='add'>+	csr_ops-&gt;write_csr_int_srcsel = write_csr_int_srcsel;</div><div class='add'>+	csr_ops-&gt;write_csr_int_col_en = write_csr_int_col_en;</div><div class='add'>+	csr_ops-&gt;write_csr_int_col_ctl = write_csr_int_col_ctl;</div><div class='add'>+	csr_ops-&gt;write_csr_int_flag_and_col = write_csr_int_flag_and_col;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen2_init_hw_csr_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.h<br/>new file mode 100644<br/>index 000000000000..55058b0f9e52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_csr_data.h</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#ifndef ADF_GEN2_HW_CSR_DATA_H_</div><div class='add'>+#define ADF_GEN2_HW_CSR_DATA_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include "adf_accel_devices.h"</div><div class='add'>+</div><div class='add'>+#define ADF_BANK_INT_SRC_SEL_MASK_0	0x4444444CUL</div><div class='add'>+#define ADF_BANK_INT_SRC_SEL_MASK_X	0x44444444UL</div><div class='add'>+#define ADF_RING_CSR_RING_CONFIG	0x000</div><div class='add'>+#define ADF_RING_CSR_RING_LBASE		0x040</div><div class='add'>+#define ADF_RING_CSR_RING_UBASE		0x080</div><div class='add'>+#define ADF_RING_CSR_RING_HEAD		0x0C0</div><div class='add'>+#define ADF_RING_CSR_RING_TAIL		0x100</div><div class='add'>+#define ADF_RING_CSR_E_STAT		0x14C</div><div class='add'>+#define ADF_RING_CSR_INT_FLAG		0x170</div><div class='add'>+#define ADF_RING_CSR_INT_SRCSEL		0x174</div><div class='add'>+#define ADF_RING_CSR_INT_SRCSEL_2	0x178</div><div class='add'>+#define ADF_RING_CSR_INT_COL_EN		0x17C</div><div class='add'>+#define ADF_RING_CSR_INT_COL_CTL	0x180</div><div class='add'>+#define ADF_RING_CSR_INT_FLAG_AND_COL	0x184</div><div class='add'>+#define ADF_RING_CSR_INT_COL_CTL_ENABLE	0x80000000</div><div class='add'>+#define ADF_RING_BUNDLE_SIZE		0x1000</div><div class='add'>+#define ADF_ARB_REG_SLOT		0x1000</div><div class='add'>+#define ADF_ARB_RINGSRVARBEN_OFFSET	0x19C</div><div class='add'>+</div><div class='add'>+#define BUILD_RING_BASE_ADDR(addr, size) \</div><div class='add'>+	(((addr) &gt;&gt; 6) &amp; (GENMASK_ULL(63, 0) &lt;&lt; (size)))</div><div class='add'>+#define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \</div><div class='add'>+	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2))</div><div class='add'>+#define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \</div><div class='add'>+	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2))</div><div class='add'>+#define READ_CSR_E_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_E_STAT)</div><div class='add'>+#define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_CONFIG + ((ring) &lt;&lt; 2), value)</div><div class='add'>+#define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \</div><div class='add'>+do { \</div><div class='add'>+	u32 l_base = 0, u_base = 0; \</div><div class='add'>+	l_base = (u32)((value) &amp; 0xFFFFFFFF); \</div><div class='add'>+	u_base = (u32)(((value) &amp; 0xFFFFFFFF00000000ULL) &gt;&gt; 32); \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_LBASE + ((ring) &lt;&lt; 2), l_base); \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_UBASE + ((ring) &lt;&lt; 2), u_base); \</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2), value)</div><div class='add'>+#define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2), value)</div><div class='add'>+#define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_INT_FLAG, value)</div><div class='add'>+#define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \</div><div class='add'>+do { \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+	ADF_RING_CSR_INT_SRCSEL, ADF_BANK_INT_SRC_SEL_MASK_0); \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+	ADF_RING_CSR_INT_SRCSEL_2, ADF_BANK_INT_SRC_SEL_MASK_X); \</div><div class='add'>+} while (0)</div><div class='add'>+#define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_INT_COL_EN, value)</div><div class='add'>+#define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_INT_COL_CTL, \</div><div class='add'>+		   ADF_RING_CSR_INT_COL_CTL_ENABLE | (value))</div><div class='add'>+#define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='add'>+		   ADF_RING_CSR_INT_FLAG_AND_COL, value)</div><div class='add'>+</div><div class='add'>+#define WRITE_CSR_RING_SRV_ARB_EN(csr_addr, index, value) \</div><div class='add'>+	ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \</div><div class='add'>+	(ADF_ARB_REG_SLOT * (index)), value)</div><div class='add'>+</div><div class='add'>+void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c<br/>index d1884547b5a1..1f64bf49b221 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c</a></div><div class='hunk'>@@ -111,103 +111,6 @@ void adf_gen2_enable_ints(struct adf_accel_dev *accel_dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(adf_gen2_enable_ints);</div><div class='ctx'> </div><div class='del'>-static u64 build_csr_ring_base_addr(dma_addr_t addr, u32 size)</div><div class='del'>-{</div><div class='del'>-	return BUILD_RING_BASE_ADDR(addr, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='del'>-{</div><div class='del'>-	return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='del'>-{</div><div class='del'>-	return READ_CSR_RING_TAIL(csr_base_addr, bank, ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='del'>-{</div><div class='del'>-	return READ_CSR_E_STAT(csr_base_addr, bank);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_config(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				  u32 ring, u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				dma_addr_t addr)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_flag(void __iomem *csr_base_addr, u32 bank, u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_FLAG(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_SRCSEL(csr_base_addr, bank);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				 u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				  u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				       u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				      u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops)</div><div class='del'>-{</div><div class='del'>-	csr_ops-&gt;build_csr_ring_base_addr = build_csr_ring_base_addr;</div><div class='del'>-	csr_ops-&gt;read_csr_ring_head = read_csr_ring_head;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_head = write_csr_ring_head;</div><div class='del'>-	csr_ops-&gt;read_csr_ring_tail = read_csr_ring_tail;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_tail = write_csr_ring_tail;</div><div class='del'>-	csr_ops-&gt;read_csr_e_stat = read_csr_e_stat;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_config = write_csr_ring_config;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_base = write_csr_ring_base;</div><div class='del'>-	csr_ops-&gt;write_csr_int_flag = write_csr_int_flag;</div><div class='del'>-	csr_ops-&gt;write_csr_int_srcsel = write_csr_int_srcsel;</div><div class='del'>-	csr_ops-&gt;write_csr_int_col_en = write_csr_int_col_en;</div><div class='del'>-	csr_ops-&gt;write_csr_int_col_ctl = write_csr_int_col_ctl;</div><div class='del'>-	csr_ops-&gt;write_csr_int_flag_and_col = write_csr_int_flag_and_col;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(adf_gen2_init_hw_csr_ops);</div><div class='del'>-</div><div class='ctx'> u32 adf_gen2_get_accel_cap(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h<br/>index 6bd341061de4..708e9186127b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h</a></div><div class='hunk'>@@ -6,78 +6,9 @@</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_cfg_common.h"</div><div class='ctx'> </div><div class='del'>-/* Transport access */</div><div class='del'>-#define ADF_BANK_INT_SRC_SEL_MASK_0	0x4444444CUL</div><div class='del'>-#define ADF_BANK_INT_SRC_SEL_MASK_X	0x44444444UL</div><div class='del'>-#define ADF_RING_CSR_RING_CONFIG	0x000</div><div class='del'>-#define ADF_RING_CSR_RING_LBASE		0x040</div><div class='del'>-#define ADF_RING_CSR_RING_UBASE		0x080</div><div class='del'>-#define ADF_RING_CSR_RING_HEAD		0x0C0</div><div class='del'>-#define ADF_RING_CSR_RING_TAIL		0x100</div><div class='del'>-#define ADF_RING_CSR_E_STAT		0x14C</div><div class='del'>-#define ADF_RING_CSR_INT_FLAG		0x170</div><div class='del'>-#define ADF_RING_CSR_INT_SRCSEL		0x174</div><div class='del'>-#define ADF_RING_CSR_INT_SRCSEL_2	0x178</div><div class='del'>-#define ADF_RING_CSR_INT_COL_EN		0x17C</div><div class='del'>-#define ADF_RING_CSR_INT_COL_CTL	0x180</div><div class='del'>-#define ADF_RING_CSR_INT_FLAG_AND_COL	0x184</div><div class='del'>-#define ADF_RING_CSR_INT_COL_CTL_ENABLE	0x80000000</div><div class='del'>-#define ADF_RING_BUNDLE_SIZE		0x1000</div><div class='ctx'> #define ADF_GEN2_RX_RINGS_OFFSET	8</div><div class='ctx'> #define ADF_GEN2_TX_RINGS_MASK		0xFF</div><div class='ctx'> </div><div class='del'>-#define BUILD_RING_BASE_ADDR(addr, size) \</div><div class='del'>-	(((addr) &gt;&gt; 6) &amp; (GENMASK_ULL(63, 0) &lt;&lt; (size)))</div><div class='del'>-#define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \</div><div class='del'>-	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2))</div><div class='del'>-#define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \</div><div class='del'>-	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2))</div><div class='del'>-#define READ_CSR_E_STAT(csr_base_addr, bank) \</div><div class='del'>-	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_E_STAT)</div><div class='del'>-#define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_CONFIG + ((ring) &lt;&lt; 2), value)</div><div class='del'>-#define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \</div><div class='del'>-do { \</div><div class='del'>-	u32 l_base = 0, u_base = 0; \</div><div class='del'>-	l_base = (u32)((value) &amp; 0xFFFFFFFF); \</div><div class='del'>-	u_base = (u32)(((value) &amp; 0xFFFFFFFF00000000ULL) &gt;&gt; 32); \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_LBASE + ((ring) &lt;&lt; 2), l_base); \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_UBASE + ((ring) &lt;&lt; 2), u_base); \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2), value)</div><div class='del'>-#define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2), value)</div><div class='del'>-#define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_INT_FLAG, value)</div><div class='del'>-#define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \</div><div class='del'>-do { \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-	ADF_RING_CSR_INT_SRCSEL, ADF_BANK_INT_SRC_SEL_MASK_0); \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-	ADF_RING_CSR_INT_SRCSEL_2, ADF_BANK_INT_SRC_SEL_MASK_X); \</div><div class='del'>-} while (0)</div><div class='del'>-#define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_INT_COL_EN, value)</div><div class='del'>-#define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_INT_COL_CTL, \</div><div class='del'>-		   ADF_RING_CSR_INT_COL_CTL_ENABLE | (value))</div><div class='del'>-#define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \</div><div class='del'>-		   ADF_RING_CSR_INT_FLAG_AND_COL, value)</div><div class='del'>-</div><div class='ctx'> /* AE to function map */</div><div class='ctx'> #define AE2FUNCTION_MAP_A_OFFSET	(0x3A400 + 0x190)</div><div class='ctx'> #define AE2FUNCTION_MAP_B_OFFSET	(0x3A400 + 0x310)</div><div class='hunk'>@@ -106,12 +37,6 @@ do { \</div><div class='ctx'> #define ADF_ARB_OFFSET			0x30000</div><div class='ctx'> #define ADF_ARB_WRK_2_SER_MAP_OFFSET	0x180</div><div class='ctx'> #define ADF_ARB_CONFIG			(BIT(31) | BIT(6) | BIT(0))</div><div class='del'>-#define ADF_ARB_REG_SLOT		0x1000</div><div class='del'>-#define ADF_ARB_RINGSRVARBEN_OFFSET	0x19C</div><div class='del'>-</div><div class='del'>-#define WRITE_CSR_RING_SRV_ARB_EN(csr_addr, index, value) \</div><div class='del'>-	ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \</div><div class='del'>-	(ADF_ARB_REG_SLOT * (index)), value)</div><div class='ctx'> </div><div class='ctx'> /* Power gating */</div><div class='ctx'> #define ADF_POWERGATE_DC		BIT(23)</div><div class='hunk'>@@ -158,7 +83,6 @@ u32 adf_gen2_get_num_aes(struct adf_hw_device_data *self);</div><div class='ctx'> void adf_gen2_enable_error_correction(struct adf_accel_dev *accel_dev);</div><div class='ctx'> void adf_gen2_cfg_iov_thds(struct adf_accel_dev *accel_dev, bool enable,</div><div class='ctx'> 			   int num_a_regs, int num_b_regs);</div><div class='del'>-void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);</div><div class='ctx'> void adf_gen2_get_admin_info(struct admin_info *admin_csrs_info);</div><div class='ctx'> void adf_gen2_get_arb_info(struct arb_info *arb_info);</div><div class='ctx'> void adf_gen2_enable_ints(struct adf_accel_dev *accel_dev);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.c<br/>new file mode 100644<br/>index 000000000000..6609c248aaba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.c</a></div><div class='hunk'>@@ -0,0 +1,231 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include "adf_gen4_hw_csr_data.h"</div><div class='add'>+</div><div class='add'>+static u64 build_csr_ring_base_addr(dma_addr_t addr, u32 size)</div><div class='add'>+{</div><div class='add'>+	return BUILD_RING_BASE_ADDR(addr, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_TAIL(csr_base_addr, bank, ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_uo_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_UO_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_E_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ne_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_NE_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_nf_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_NF_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_f_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_F_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_c_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_C_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_exp_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_EXP_STAT(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_exp_int_en(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_EXP_INT_EN(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_exp_int_en(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				 u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_EXP_INT_EN(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ring_config(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				u32 ring)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_CONFIG(csr_base_addr, bank, ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				  u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_addr_t read_csr_ring_base(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				     u32 ring)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_BASE(csr_base_addr, bank, ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='add'>+				dma_addr_t addr)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_int_en(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_INT_EN(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_en(void __iomem *csr_base_addr, u32 bank, u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_EN(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_int_flag(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_INT_FLAG(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_flag(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+			       u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_FLAG(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_INT_SRCSEL(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_SRCSEL(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_srcsel_w_val(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				       u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_SRCSEL_W_VAL(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_int_col_en(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_INT_COL_EN(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank, u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_INT_COL_CTL(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				  u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_INT_FLAG_AND_COL(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				       u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 read_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank)</div><div class='add'>+{</div><div class='add'>+	return READ_CSR_RING_SRV_ARB_EN(csr_base_addr, bank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank,</div><div class='add'>+				      u32 value)</div><div class='add'>+{</div><div class='add'>+	WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_int_col_ctl_enable_mask(void)</div><div class='add'>+{</div><div class='add'>+	return ADF_RING_CSR_INT_COL_CTL_ENABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops)</div><div class='add'>+{</div><div class='add'>+	csr_ops-&gt;build_csr_ring_base_addr = build_csr_ring_base_addr;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_head = read_csr_ring_head;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_head = write_csr_ring_head;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_tail = read_csr_ring_tail;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_tail = write_csr_ring_tail;</div><div class='add'>+	csr_ops-&gt;read_csr_stat = read_csr_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_uo_stat = read_csr_uo_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_e_stat = read_csr_e_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_ne_stat = read_csr_ne_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_nf_stat = read_csr_nf_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_f_stat = read_csr_f_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_c_stat = read_csr_c_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_exp_stat = read_csr_exp_stat;</div><div class='add'>+	csr_ops-&gt;read_csr_exp_int_en = read_csr_exp_int_en;</div><div class='add'>+	csr_ops-&gt;write_csr_exp_int_en = write_csr_exp_int_en;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_config = read_csr_ring_config;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_config = write_csr_ring_config;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_base = read_csr_ring_base;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_base = write_csr_ring_base;</div><div class='add'>+	csr_ops-&gt;read_csr_int_en = read_csr_int_en;</div><div class='add'>+	csr_ops-&gt;write_csr_int_en = write_csr_int_en;</div><div class='add'>+	csr_ops-&gt;read_csr_int_flag = read_csr_int_flag;</div><div class='add'>+	csr_ops-&gt;write_csr_int_flag = write_csr_int_flag;</div><div class='add'>+	csr_ops-&gt;read_csr_int_srcsel = read_csr_int_srcsel;</div><div class='add'>+	csr_ops-&gt;write_csr_int_srcsel = write_csr_int_srcsel;</div><div class='add'>+	csr_ops-&gt;write_csr_int_srcsel_w_val = write_csr_int_srcsel_w_val;</div><div class='add'>+	csr_ops-&gt;read_csr_int_col_en = read_csr_int_col_en;</div><div class='add'>+	csr_ops-&gt;write_csr_int_col_en = write_csr_int_col_en;</div><div class='add'>+	csr_ops-&gt;read_csr_int_col_ctl = read_csr_int_col_ctl;</div><div class='add'>+	csr_ops-&gt;write_csr_int_col_ctl = write_csr_int_col_ctl;</div><div class='add'>+	csr_ops-&gt;read_csr_int_flag_and_col = read_csr_int_flag_and_col;</div><div class='add'>+	csr_ops-&gt;write_csr_int_flag_and_col = write_csr_int_flag_and_col;</div><div class='add'>+	csr_ops-&gt;read_csr_ring_srv_arb_en = read_csr_ring_srv_arb_en;</div><div class='add'>+	csr_ops-&gt;write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en;</div><div class='add'>+	csr_ops-&gt;get_int_col_ctl_enable_mask = get_int_col_ctl_enable_mask;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen4_init_hw_csr_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.h<br/>new file mode 100644<br/>index 000000000000..6f33e7c87c2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_csr_data.h</a></div><div class='hunk'>@@ -0,0 +1,188 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#ifndef ADF_GEN4_HW_CSR_DATA_H_</div><div class='add'>+#define ADF_GEN4_HW_CSR_DATA_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include "adf_accel_devices.h"</div><div class='add'>+</div><div class='add'>+#define ADF_BANK_INT_SRC_SEL_MASK	0x44UL</div><div class='add'>+#define ADF_RING_CSR_RING_CONFIG	0x1000</div><div class='add'>+#define ADF_RING_CSR_RING_LBASE		0x1040</div><div class='add'>+#define ADF_RING_CSR_RING_UBASE		0x1080</div><div class='add'>+#define ADF_RING_CSR_RING_HEAD		0x0C0</div><div class='add'>+#define ADF_RING_CSR_RING_TAIL		0x100</div><div class='add'>+#define ADF_RING_CSR_STAT		0x140</div><div class='add'>+#define ADF_RING_CSR_UO_STAT		0x148</div><div class='add'>+#define ADF_RING_CSR_E_STAT		0x14C</div><div class='add'>+#define ADF_RING_CSR_NE_STAT		0x150</div><div class='add'>+#define ADF_RING_CSR_NF_STAT		0x154</div><div class='add'>+#define ADF_RING_CSR_F_STAT		0x158</div><div class='add'>+#define ADF_RING_CSR_C_STAT		0x15C</div><div class='add'>+#define ADF_RING_CSR_INT_FLAG_EN	0x16C</div><div class='add'>+#define ADF_RING_CSR_INT_FLAG		0x170</div><div class='add'>+#define ADF_RING_CSR_INT_SRCSEL		0x174</div><div class='add'>+#define ADF_RING_CSR_INT_COL_EN		0x17C</div><div class='add'>+#define ADF_RING_CSR_INT_COL_CTL	0x180</div><div class='add'>+#define ADF_RING_CSR_INT_FLAG_AND_COL	0x184</div><div class='add'>+#define ADF_RING_CSR_EXP_STAT		0x188</div><div class='add'>+#define ADF_RING_CSR_EXP_INT_EN		0x18C</div><div class='add'>+#define ADF_RING_CSR_INT_COL_CTL_ENABLE	0x80000000</div><div class='add'>+#define ADF_RING_CSR_ADDR_OFFSET	0x100000</div><div class='add'>+#define ADF_RING_BUNDLE_SIZE		0x2000</div><div class='add'>+#define ADF_RING_CSR_RING_SRV_ARB_EN	0x19C</div><div class='add'>+</div><div class='add'>+#define BUILD_RING_BASE_ADDR(addr, size) \</div><div class='add'>+	((((addr) &gt;&gt; 6) &amp; (GENMASK_ULL(63, 0) &lt;&lt; (size))) &lt;&lt; 6)</div><div class='add'>+#define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2))</div><div class='add'>+#define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2))</div><div class='add'>+#define READ_CSR_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_STAT)</div><div class='add'>+#define READ_CSR_UO_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_UO_STAT)</div><div class='add'>+#define READ_CSR_E_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_E_STAT)</div><div class='add'>+#define READ_CSR_NE_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_NE_STAT)</div><div class='add'>+#define READ_CSR_NF_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_NF_STAT)</div><div class='add'>+#define READ_CSR_F_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_F_STAT)</div><div class='add'>+#define READ_CSR_C_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_C_STAT)</div><div class='add'>+#define READ_CSR_EXP_STAT(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_EXP_STAT)</div><div class='add'>+#define READ_CSR_EXP_INT_EN(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_EXP_INT_EN)</div><div class='add'>+#define WRITE_CSR_EXP_INT_EN(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_EXP_INT_EN, value)</div><div class='add'>+#define READ_CSR_RING_CONFIG(csr_base_addr, bank, ring) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_CONFIG + ((ring) &lt;&lt; 2))</div><div class='add'>+#define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_CONFIG + ((ring) &lt;&lt; 2), value)</div><div class='add'>+#define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value)	\</div><div class='add'>+do { \</div><div class='add'>+	void __iomem *_csr_base_addr = csr_base_addr; \</div><div class='add'>+	u32 _bank = bank;						\</div><div class='add'>+	u32 _ring = ring;						\</div><div class='add'>+	dma_addr_t _value = value;					\</div><div class='add'>+	u32 l_base = 0, u_base = 0;					\</div><div class='add'>+	l_base = lower_32_bits(_value);					\</div><div class='add'>+	u_base = upper_32_bits(_value);					\</div><div class='add'>+	ADF_CSR_WR((_csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET,		\</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (_bank) +			\</div><div class='add'>+		   ADF_RING_CSR_RING_LBASE + ((_ring) &lt;&lt; 2), l_base);	\</div><div class='add'>+	ADF_CSR_WR((_csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET,		\</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (_bank) +			\</div><div class='add'>+		   ADF_RING_CSR_RING_UBASE + ((_ring) &lt;&lt; 2), u_base);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+static inline u64 read_base(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='add'>+{</div><div class='add'>+	u32 l_base, u_base;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Use special IO wrapper for ring base as LBASE and UBASE are</div><div class='add'>+	 * not physically contigious</div><div class='add'>+	 */</div><div class='add'>+	l_base = ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) +</div><div class='add'>+			    ADF_RING_CSR_RING_LBASE + (ring &lt;&lt; 2));</div><div class='add'>+	u_base = ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) +</div><div class='add'>+			    ADF_RING_CSR_RING_UBASE + (ring &lt;&lt; 2));</div><div class='add'>+</div><div class='add'>+	return (u64)u_base &lt;&lt; 32 | (u64)l_base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define READ_CSR_RING_BASE(csr_base_addr, bank, ring) \</div><div class='add'>+	read_base((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, (bank), (ring))</div><div class='add'>+</div><div class='add'>+#define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2), value)</div><div class='add'>+#define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2), value)</div><div class='add'>+#define READ_CSR_INT_EN(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_INT_FLAG_EN)</div><div class='add'>+#define WRITE_CSR_INT_EN(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_FLAG_EN, (value))</div><div class='add'>+#define READ_CSR_INT_FLAG(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_INT_FLAG)</div><div class='add'>+#define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_FLAG, (value))</div><div class='add'>+#define READ_CSR_INT_SRCSEL(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_INT_SRCSEL)</div><div class='add'>+#define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_SRCSEL, ADF_BANK_INT_SRC_SEL_MASK)</div><div class='add'>+#define WRITE_CSR_INT_SRCSEL_W_VAL(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_SRCSEL, (value))</div><div class='add'>+#define READ_CSR_INT_COL_EN(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_INT_COL_EN)</div><div class='add'>+#define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_COL_EN, (value))</div><div class='add'>+#define READ_CSR_INT_COL_CTL(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_INT_COL_CTL)</div><div class='add'>+#define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_COL_CTL, \</div><div class='add'>+		   ADF_RING_CSR_INT_COL_CTL_ENABLE | (value))</div><div class='add'>+#define READ_CSR_INT_FLAG_AND_COL(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_FLAG_AND_COL)</div><div class='add'>+#define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_INT_FLAG_AND_COL, (value))</div><div class='add'>+</div><div class='add'>+#define READ_CSR_RING_SRV_ARB_EN(csr_base_addr, bank) \</div><div class='add'>+	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_SRV_ARB_EN)</div><div class='add'>+#define WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value) \</div><div class='add'>+	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='add'>+		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='add'>+		   ADF_RING_CSR_RING_SRV_ARB_EN, (value))</div><div class='add'>+</div><div class='add'>+void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c<br/>index d28e1921940a..41a0979e68c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)</div><div class='ctx'> /* Copyright(c) 2020 Intel Corporation */</div><div class='ctx'> #include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;asm/div64.h&gt;</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_cfg_services.h"</div><div class='ctx'> #include "adf_common_drv.h"</div><div class='hunk'>@@ -8,103 +9,6 @@</div><div class='ctx'> #include "adf_gen4_hw_data.h"</div><div class='ctx'> #include "adf_gen4_pm.h"</div><div class='ctx'> </div><div class='del'>-static u64 build_csr_ring_base_addr(dma_addr_t addr, u32 size)</div><div class='del'>-{</div><div class='del'>-	return BUILD_RING_BASE_ADDR(addr, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='del'>-{</div><div class='del'>-	return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring)</div><div class='del'>-{</div><div class='del'>-	return READ_CSR_RING_TAIL(csr_base_addr, bank, ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank)</div><div class='del'>-{</div><div class='del'>-	return READ_CSR_E_STAT(csr_base_addr, bank);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				  u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring,</div><div class='del'>-				dma_addr_t addr)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_flag(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-			       u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_FLAG(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_SRCSEL(csr_base_addr, bank);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank, u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				  u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				       u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void write_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank,</div><div class='del'>-				      u32 value)</div><div class='del'>-{</div><div class='del'>-	WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops)</div><div class='del'>-{</div><div class='del'>-	csr_ops-&gt;build_csr_ring_base_addr = build_csr_ring_base_addr;</div><div class='del'>-	csr_ops-&gt;read_csr_ring_head = read_csr_ring_head;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_head = write_csr_ring_head;</div><div class='del'>-	csr_ops-&gt;read_csr_ring_tail = read_csr_ring_tail;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_tail = write_csr_ring_tail;</div><div class='del'>-	csr_ops-&gt;read_csr_e_stat = read_csr_e_stat;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_config = write_csr_ring_config;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_base = write_csr_ring_base;</div><div class='del'>-	csr_ops-&gt;write_csr_int_flag = write_csr_int_flag;</div><div class='del'>-	csr_ops-&gt;write_csr_int_srcsel = write_csr_int_srcsel;</div><div class='del'>-	csr_ops-&gt;write_csr_int_col_en = write_csr_int_col_en;</div><div class='del'>-	csr_ops-&gt;write_csr_int_col_ctl = write_csr_int_col_ctl;</div><div class='del'>-	csr_ops-&gt;write_csr_int_flag_and_col = write_csr_int_flag_and_col;</div><div class='del'>-	csr_ops-&gt;write_csr_ring_srv_arb_en = write_csr_ring_srv_arb_en;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(adf_gen4_init_hw_csr_ops);</div><div class='del'>-</div><div class='ctx'> u32 adf_gen4_get_accel_mask(struct adf_hw_device_data *self)</div><div class='ctx'> {</div><div class='ctx'> 	return ADF_GEN4_ACCELERATORS_MASK;</div><div class='hunk'>@@ -321,8 +225,7 @@ static int reset_ring_pair(void __iomem *csr, u32 bank_number)</div><div class='ctx'> int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='del'>-	u32 etr_bar_id = hw_data-&gt;get_etr_bar_id(hw_data);</div><div class='del'>-	void __iomem *csr;</div><div class='add'>+	void __iomem *csr = adf_get_etr_base(accel_dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (bank_number &gt;= hw_data-&gt;num_banks)</div><div class='hunk'>@@ -331,7 +234,6 @@ int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number)</div><div class='ctx'> 	dev_dbg(&amp;GET_DEV(accel_dev),</div><div class='ctx'> 		"ring pair reset for bank:%d\n", bank_number);</div><div class='ctx'> </div><div class='del'>-	csr = (&amp;GET_BARS(accel_dev)[etr_bar_id])-&gt;virt_addr;</div><div class='ctx'> 	ret = reset_ring_pair(csr, bank_number);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_err(&amp;GET_DEV(accel_dev),</div><div class='hunk'>@@ -489,3 +391,281 @@ set_mask:</div><div class='ctx'> 	return ring_to_svc_map;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(adf_gen4_get_ring_to_svc_map);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * adf_gen4_bank_quiesce_coal_timer() - quiesce bank coalesced interrupt timer</div><div class='add'>+ * @accel_dev: Pointer to the device structure</div><div class='add'>+ * @bank_idx: Offset to the bank within this device</div><div class='add'>+ * @timeout_ms: Timeout in milliseconds for the operation</div><div class='add'>+ *</div><div class='add'>+ * This function tries to quiesce the coalesced interrupt timer of a bank if</div><div class='add'>+ * it has been enabled and triggered.</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, error code otherwise</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+int adf_gen4_bank_quiesce_coal_timer(struct adf_accel_dev *accel_dev,</div><div class='add'>+				     u32 bank_idx, int timeout_ms)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);</div><div class='add'>+	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev);</div><div class='add'>+	void __iomem *csr_misc = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	void __iomem *csr_etr = adf_get_etr_base(accel_dev);</div><div class='add'>+	u32 int_col_ctl, int_col_mask, int_col_en;</div><div class='add'>+	u32 e_stat, intsrc;</div><div class='add'>+	u64 wait_us;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (timeout_ms &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	int_col_ctl = csr_ops-&gt;read_csr_int_col_ctl(csr_etr, bank_idx);</div><div class='add'>+	int_col_mask = csr_ops-&gt;get_int_col_ctl_enable_mask();</div><div class='add'>+	if (!(int_col_ctl &amp; int_col_mask))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	int_col_en = csr_ops-&gt;read_csr_int_col_en(csr_etr, bank_idx);</div><div class='add'>+	int_col_en &amp;= BIT(ADF_WQM_CSR_RP_IDX_RX);</div><div class='add'>+</div><div class='add'>+	e_stat = csr_ops-&gt;read_csr_e_stat(csr_etr, bank_idx);</div><div class='add'>+	if (!(~e_stat &amp; int_col_en))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	wait_us = 2 * ((int_col_ctl &amp; ~int_col_mask) &lt;&lt; 8) * USEC_PER_SEC;</div><div class='add'>+	do_div(wait_us, hw_data-&gt;clock_frequency);</div><div class='add'>+	wait_us = min(wait_us, (u64)timeout_ms * USEC_PER_MSEC);</div><div class='add'>+	dev_dbg(&amp;GET_DEV(accel_dev),</div><div class='add'>+		"wait for bank %d - coalesced timer expires in %llu us (max=%u ms estat=0x%x intcolen=0x%x)\n",</div><div class='add'>+		bank_idx, wait_us, timeout_ms, e_stat, int_col_en);</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(ADF_CSR_RD, intsrc, intsrc,</div><div class='add'>+				ADF_COALESCED_POLL_DELAY_US, wait_us, true,</div><div class='add'>+				csr_misc, ADF_WQM_CSR_RPINTSOU(bank_idx));</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev),</div><div class='add'>+			 "coalesced timer for bank %d expired (%llu us)\n",</div><div class='add'>+			 bank_idx, wait_us);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen4_bank_quiesce_coal_timer);</div><div class='add'>+</div><div class='add'>+static int drain_bank(void __iomem *csr, u32 bank_number, int timeout_us)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_WQM_CSR_RPRESETCTL(bank_number),</div><div class='add'>+		   ADF_WQM_CSR_RPRESETCTL_DRAIN);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(ADF_CSR_RD, status,</div><div class='add'>+				status &amp; ADF_WQM_CSR_RPRESETSTS_STATUS,</div><div class='add'>+				ADF_RPRESET_POLL_DELAY_US, timeout_us, true,</div><div class='add'>+				csr, ADF_WQM_CSR_RPRESETSTS(bank_number));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen4_bank_drain_finish(struct adf_accel_dev *accel_dev,</div><div class='add'>+				u32 bank_number)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_etr_base(accel_dev);</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_WQM_CSR_RPRESETSTS(bank_number),</div><div class='add'>+		   ADF_WQM_CSR_RPRESETSTS_STATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int adf_gen4_bank_drain_start(struct adf_accel_dev *accel_dev,</div><div class='add'>+			      u32 bank_number, int timeout_us)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_etr_base(accel_dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;GET_DEV(accel_dev), "Drain bank %d\n", bank_number);</div><div class='add'>+</div><div class='add'>+	ret = drain_bank(csr, bank_number, timeout_us);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Bank drain failed (timeout)\n");</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(&amp;GET_DEV(accel_dev), "Bank drain successful\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bank_state_save(struct adf_hw_csr_ops *ops, void __iomem *base,</div><div class='add'>+			    u32 bank, struct bank_state *state, u32 num_rings)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	state-&gt;ringstat0 = ops-&gt;read_csr_stat(base, bank);</div><div class='add'>+	state-&gt;ringuostat = ops-&gt;read_csr_uo_stat(base, bank);</div><div class='add'>+	state-&gt;ringestat = ops-&gt;read_csr_e_stat(base, bank);</div><div class='add'>+	state-&gt;ringnestat = ops-&gt;read_csr_ne_stat(base, bank);</div><div class='add'>+	state-&gt;ringnfstat = ops-&gt;read_csr_nf_stat(base, bank);</div><div class='add'>+	state-&gt;ringfstat = ops-&gt;read_csr_f_stat(base, bank);</div><div class='add'>+	state-&gt;ringcstat0 = ops-&gt;read_csr_c_stat(base, bank);</div><div class='add'>+	state-&gt;iaintflagen = ops-&gt;read_csr_int_en(base, bank);</div><div class='add'>+	state-&gt;iaintflagreg = ops-&gt;read_csr_int_flag(base, bank);</div><div class='add'>+	state-&gt;iaintflagsrcsel0 = ops-&gt;read_csr_int_srcsel(base, bank);</div><div class='add'>+	state-&gt;iaintcolen = ops-&gt;read_csr_int_col_en(base, bank);</div><div class='add'>+	state-&gt;iaintcolctl = ops-&gt;read_csr_int_col_ctl(base, bank);</div><div class='add'>+	state-&gt;iaintflagandcolen = ops-&gt;read_csr_int_flag_and_col(base, bank);</div><div class='add'>+	state-&gt;ringexpstat = ops-&gt;read_csr_exp_stat(base, bank);</div><div class='add'>+	state-&gt;ringexpintenable = ops-&gt;read_csr_exp_int_en(base, bank);</div><div class='add'>+	state-&gt;ringsrvarben = ops-&gt;read_csr_ring_srv_arb_en(base, bank);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_rings; i++) {</div><div class='add'>+		state-&gt;rings[i].head = ops-&gt;read_csr_ring_head(base, bank, i);</div><div class='add'>+		state-&gt;rings[i].tail = ops-&gt;read_csr_ring_tail(base, bank, i);</div><div class='add'>+		state-&gt;rings[i].config = ops-&gt;read_csr_ring_config(base, bank, i);</div><div class='add'>+		state-&gt;rings[i].base = ops-&gt;read_csr_ring_base(base, bank, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define CHECK_STAT(op, expect_val, name, args...) \</div><div class='add'>+({ \</div><div class='add'>+	u32 __expect_val = (expect_val); \</div><div class='add'>+	u32 actual_val = op(args); \</div><div class='add'>+	(__expect_val == actual_val) ? 0 : \</div><div class='add'>+		(pr_err("QAT: Fail to restore %s register. Expected 0x%x, actual 0x%x\n", \</div><div class='add'>+			name, __expect_val, actual_val), -EINVAL); \</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static int bank_state_restore(struct adf_hw_csr_ops *ops, void __iomem *base,</div><div class='add'>+			      u32 bank, struct bank_state *state, u32 num_rings,</div><div class='add'>+			      int tx_rx_gap)</div><div class='add'>+{</div><div class='add'>+	u32 val, tmp_val, i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_rings; i++)</div><div class='add'>+		ops-&gt;write_csr_ring_base(base, bank, i, state-&gt;rings[i].base);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_rings; i++)</div><div class='add'>+		ops-&gt;write_csr_ring_config(base, bank, i, state-&gt;rings[i].config);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_rings / 2; i++) {</div><div class='add'>+		int tx = i * (tx_rx_gap + 1);</div><div class='add'>+		int rx = tx + tx_rx_gap;</div><div class='add'>+</div><div class='add'>+		ops-&gt;write_csr_ring_head(base, bank, tx, state-&gt;rings[tx].head);</div><div class='add'>+		ops-&gt;write_csr_ring_tail(base, bank, tx, state-&gt;rings[tx].tail);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The TX ring head needs to be updated again to make sure that</div><div class='add'>+		 * the HW will not consider the ring as full when it is empty</div><div class='add'>+		 * and the correct state flags are set to match the recovered state.</div><div class='add'>+		 */</div><div class='add'>+		if (state-&gt;ringestat &amp; BIT(tx)) {</div><div class='add'>+			val = ops-&gt;read_csr_int_srcsel(base, bank);</div><div class='add'>+			val |= ADF_RP_INT_SRC_SEL_F_RISE_MASK;</div><div class='add'>+			ops-&gt;write_csr_int_srcsel_w_val(base, bank, val);</div><div class='add'>+			ops-&gt;write_csr_ring_head(base, bank, tx, state-&gt;rings[tx].head);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ops-&gt;write_csr_ring_tail(base, bank, rx, state-&gt;rings[rx].tail);</div><div class='add'>+		val = ops-&gt;read_csr_int_srcsel(base, bank);</div><div class='add'>+		val |= ADF_RP_INT_SRC_SEL_F_RISE_MASK &lt;&lt; ADF_RP_INT_SRC_SEL_RANGE_WIDTH;</div><div class='add'>+		ops-&gt;write_csr_int_srcsel_w_val(base, bank, val);</div><div class='add'>+</div><div class='add'>+		ops-&gt;write_csr_ring_head(base, bank, rx, state-&gt;rings[rx].head);</div><div class='add'>+		val = ops-&gt;read_csr_int_srcsel(base, bank);</div><div class='add'>+		val |= ADF_RP_INT_SRC_SEL_F_FALL_MASK &lt;&lt; ADF_RP_INT_SRC_SEL_RANGE_WIDTH;</div><div class='add'>+		ops-&gt;write_csr_int_srcsel_w_val(base, bank, val);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The RX ring tail needs to be updated again to make sure that</div><div class='add'>+		 * the HW will not consider the ring as empty when it is full</div><div class='add'>+		 * and the correct state flags are set to match the recovered state.</div><div class='add'>+		 */</div><div class='add'>+		if (state-&gt;ringfstat &amp; BIT(rx))</div><div class='add'>+			ops-&gt;write_csr_ring_tail(base, bank, rx, state-&gt;rings[rx].tail);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ops-&gt;write_csr_int_flag_and_col(base, bank, state-&gt;iaintflagandcolen);</div><div class='add'>+	ops-&gt;write_csr_int_en(base, bank, state-&gt;iaintflagen);</div><div class='add'>+	ops-&gt;write_csr_int_col_en(base, bank, state-&gt;iaintcolen);</div><div class='add'>+	ops-&gt;write_csr_int_srcsel_w_val(base, bank, state-&gt;iaintflagsrcsel0);</div><div class='add'>+	ops-&gt;write_csr_exp_int_en(base, bank, state-&gt;ringexpintenable);</div><div class='add'>+	ops-&gt;write_csr_int_col_ctl(base, bank, state-&gt;iaintcolctl);</div><div class='add'>+	ops-&gt;write_csr_ring_srv_arb_en(base, bank, state-&gt;ringsrvarben);</div><div class='add'>+</div><div class='add'>+	/* Check that all ring statuses match the saved state. */</div><div class='add'>+	ret = CHECK_STAT(ops-&gt;read_csr_stat, state-&gt;ringstat0, "ringstat",</div><div class='add'>+			 base, bank);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = CHECK_STAT(ops-&gt;read_csr_e_stat, state-&gt;ringestat, "ringestat",</div><div class='add'>+			 base, bank);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = CHECK_STAT(ops-&gt;read_csr_ne_stat, state-&gt;ringnestat, "ringnestat",</div><div class='add'>+			 base, bank);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = CHECK_STAT(ops-&gt;read_csr_nf_stat, state-&gt;ringnfstat, "ringnfstat",</div><div class='add'>+			 base, bank);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = CHECK_STAT(ops-&gt;read_csr_f_stat, state-&gt;ringfstat, "ringfstat",</div><div class='add'>+			 base, bank);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = CHECK_STAT(ops-&gt;read_csr_c_stat, state-&gt;ringcstat0, "ringcstat",</div><div class='add'>+			 base, bank);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tmp_val = ops-&gt;read_csr_exp_stat(base, bank);</div><div class='add'>+	val = state-&gt;ringexpstat;</div><div class='add'>+	if (tmp_val &amp;&amp; !val) {</div><div class='add'>+		pr_err("QAT: Bank was restored with exception: 0x%x\n", val);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int adf_gen4_bank_state_save(struct adf_accel_dev *accel_dev, u32 bank_number,</div><div class='add'>+			     struct bank_state *state)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);</div><div class='add'>+	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev);</div><div class='add'>+	void __iomem *csr_base = adf_get_etr_base(accel_dev);</div><div class='add'>+</div><div class='add'>+	if (bank_number &gt;= hw_data-&gt;num_banks || !state)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;GET_DEV(accel_dev), "Saving state of bank %d\n", bank_number);</div><div class='add'>+</div><div class='add'>+	bank_state_save(csr_ops, csr_base, bank_number, state,</div><div class='add'>+			hw_data-&gt;num_rings_per_bank);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen4_bank_state_save);</div><div class='add'>+</div><div class='add'>+int adf_gen4_bank_state_restore(struct adf_accel_dev *accel_dev, u32 bank_number,</div><div class='add'>+				struct bank_state *state)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);</div><div class='add'>+	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev);</div><div class='add'>+	void __iomem *csr_base = adf_get_etr_base(accel_dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (bank_number &gt;= hw_data-&gt;num_banks  || !state)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;GET_DEV(accel_dev), "Restoring state of bank %d\n", bank_number);</div><div class='add'>+</div><div class='add'>+	ret = bank_state_restore(csr_ops, csr_base, bank_number, state,</div><div class='add'>+				 hw_data-&gt;num_rings_per_bank, hw_data-&gt;tx_rx_gap);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Unable to restore state of bank %d\n", bank_number);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen4_bank_state_restore);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h<br/>index c6e80df5a85a..8b10926cedba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */</div><div class='ctx'> /* Copyright(c) 2020 Intel Corporation */</div><div class='del'>-#ifndef ADF_GEN4_HW_CSR_DATA_H_</div><div class='del'>-#define ADF_GEN4_HW_CSR_DATA_H_</div><div class='add'>+#ifndef ADF_GEN4_HW_DATA_H_</div><div class='add'>+#define ADF_GEN4_HW_DATA_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/units.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -54,95 +54,6 @@</div><div class='ctx'> #define ADF_GEN4_ADMINMSGLR_OFFSET	0x500578</div><div class='ctx'> #define ADF_GEN4_MAILBOX_BASE_OFFSET	0x600970</div><div class='ctx'> </div><div class='del'>-/* Transport access */</div><div class='del'>-#define ADF_BANK_INT_SRC_SEL_MASK	0x44UL</div><div class='del'>-#define ADF_RING_CSR_RING_CONFIG	0x1000</div><div class='del'>-#define ADF_RING_CSR_RING_LBASE		0x1040</div><div class='del'>-#define ADF_RING_CSR_RING_UBASE		0x1080</div><div class='del'>-#define ADF_RING_CSR_RING_HEAD		0x0C0</div><div class='del'>-#define ADF_RING_CSR_RING_TAIL		0x100</div><div class='del'>-#define ADF_RING_CSR_E_STAT		0x14C</div><div class='del'>-#define ADF_RING_CSR_INT_FLAG		0x170</div><div class='del'>-#define ADF_RING_CSR_INT_SRCSEL		0x174</div><div class='del'>-#define ADF_RING_CSR_INT_COL_CTL	0x180</div><div class='del'>-#define ADF_RING_CSR_INT_FLAG_AND_COL	0x184</div><div class='del'>-#define ADF_RING_CSR_INT_COL_CTL_ENABLE	0x80000000</div><div class='del'>-#define ADF_RING_CSR_INT_COL_EN		0x17C</div><div class='del'>-#define ADF_RING_CSR_ADDR_OFFSET	0x100000</div><div class='del'>-#define ADF_RING_BUNDLE_SIZE		0x2000</div><div class='del'>-</div><div class='del'>-#define BUILD_RING_BASE_ADDR(addr, size) \</div><div class='del'>-	((((addr) &gt;&gt; 6) &amp; (GENMASK_ULL(63, 0) &lt;&lt; (size))) &lt;&lt; 6)</div><div class='del'>-#define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \</div><div class='del'>-	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2))</div><div class='del'>-#define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \</div><div class='del'>-	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2))</div><div class='del'>-#define READ_CSR_E_STAT(csr_base_addr, bank) \</div><div class='del'>-	ADF_CSR_RD((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_E_STAT)</div><div class='del'>-#define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_RING_CONFIG + ((ring) &lt;&lt; 2), value)</div><div class='del'>-#define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value)	\</div><div class='del'>-do { \</div><div class='del'>-	void __iomem *_csr_base_addr = csr_base_addr; \</div><div class='del'>-	u32 _bank = bank;						\</div><div class='del'>-	u32 _ring = ring;						\</div><div class='del'>-	dma_addr_t _value = value;					\</div><div class='del'>-	u32 l_base = 0, u_base = 0;					\</div><div class='del'>-	l_base = lower_32_bits(_value);					\</div><div class='del'>-	u_base = upper_32_bits(_value);					\</div><div class='del'>-	ADF_CSR_WR((_csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET,		\</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (_bank) +			\</div><div class='del'>-		   ADF_RING_CSR_RING_LBASE + ((_ring) &lt;&lt; 2), l_base);	\</div><div class='del'>-	ADF_CSR_WR((_csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET,		\</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (_bank) +			\</div><div class='del'>-		   ADF_RING_CSR_RING_UBASE + ((_ring) &lt;&lt; 2), u_base);	\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_RING_HEAD + ((ring) &lt;&lt; 2), value)</div><div class='del'>-#define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_RING_TAIL + ((ring) &lt;&lt; 2), value)</div><div class='del'>-#define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_INT_FLAG, (value))</div><div class='del'>-#define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_INT_SRCSEL, ADF_BANK_INT_SRC_SEL_MASK)</div><div class='del'>-#define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_INT_COL_EN, (value))</div><div class='del'>-#define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_INT_COL_CTL, \</div><div class='del'>-		   ADF_RING_CSR_INT_COL_CTL_ENABLE | (value))</div><div class='del'>-#define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_INT_FLAG_AND_COL, (value))</div><div class='del'>-</div><div class='del'>-/* Arbiter configuration */</div><div class='del'>-#define ADF_RING_CSR_RING_SRV_ARB_EN 0x19C</div><div class='del'>-</div><div class='del'>-#define WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value) \</div><div class='del'>-	ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \</div><div class='del'>-		   ADF_RING_BUNDLE_SIZE * (bank) + \</div><div class='del'>-		   ADF_RING_CSR_RING_SRV_ARB_EN, (value))</div><div class='del'>-</div><div class='ctx'> /* Default ring mapping */</div><div class='ctx'> #define ADF_GEN4_DEFAULT_RING_TO_SRV_MAP \</div><div class='ctx'> 	(ASYM &lt;&lt; ADF_CFG_SERV_RING_PAIR_0_SHIFT | \</div><div class='hunk'>@@ -166,10 +77,20 @@ do { \</div><div class='ctx'> #define ADF_RPRESET_POLL_TIMEOUT_US	(5 * USEC_PER_SEC)</div><div class='ctx'> #define ADF_RPRESET_POLL_DELAY_US	20</div><div class='ctx'> #define ADF_WQM_CSR_RPRESETCTL_RESET	BIT(0)</div><div class='add'>+#define ADF_WQM_CSR_RPRESETCTL_DRAIN	BIT(2)</div><div class='ctx'> #define ADF_WQM_CSR_RPRESETCTL(bank)	(0x6000 + ((bank) &lt;&lt; 3))</div><div class='ctx'> #define ADF_WQM_CSR_RPRESETSTS_STATUS	BIT(0)</div><div class='ctx'> #define ADF_WQM_CSR_RPRESETSTS(bank)	(ADF_WQM_CSR_RPRESETCTL(bank) + 4)</div><div class='ctx'> </div><div class='add'>+/* Ring interrupt */</div><div class='add'>+#define ADF_RP_INT_SRC_SEL_F_RISE_MASK	BIT(2)</div><div class='add'>+#define ADF_RP_INT_SRC_SEL_F_FALL_MASK	GENMASK(2, 0)</div><div class='add'>+#define ADF_RP_INT_SRC_SEL_RANGE_WIDTH	4</div><div class='add'>+#define ADF_COALESCED_POLL_TIMEOUT_US	(1 * USEC_PER_SEC)</div><div class='add'>+#define ADF_COALESCED_POLL_DELAY_US	1000</div><div class='add'>+#define ADF_WQM_CSR_RPINTSOU(bank)	(0x200000 + ((bank) &lt;&lt; 12))</div><div class='add'>+#define ADF_WQM_CSR_RP_IDX_RX		1</div><div class='add'>+</div><div class='ctx'> /* Error source registers */</div><div class='ctx'> #define ADF_GEN4_ERRSOU0	(0x41A200)</div><div class='ctx'> #define ADF_GEN4_ERRSOU1	(0x41A204)</div><div class='hunk'>@@ -197,6 +118,19 @@ do { \</div><div class='ctx'> /* Arbiter threads mask with error value */</div><div class='ctx'> #define ADF_GEN4_ENA_THD_MASK_ERROR	GENMASK(ADF_NUM_THREADS_PER_AE, 0)</div><div class='ctx'> </div><div class='add'>+/* PF2VM communication channel */</div><div class='add'>+#define ADF_GEN4_PF2VM_OFFSET(i)	(0x40B010 + (i) * 0x20)</div><div class='add'>+#define ADF_GEN4_VM2PF_OFFSET(i)	(0x40B014 + (i) * 0x20)</div><div class='add'>+#define ADF_GEN4_VINTMSKPF2VM_OFFSET(i)	(0x40B00C + (i) * 0x20)</div><div class='add'>+#define ADF_GEN4_VINTSOUPF2VM_OFFSET(i)	(0x40B008 + (i) * 0x20)</div><div class='add'>+#define ADF_GEN4_VINTMSK_OFFSET(i)	(0x40B004 + (i) * 0x20)</div><div class='add'>+#define ADF_GEN4_VINTSOU_OFFSET(i)	(0x40B000 + (i) * 0x20)</div><div class='add'>+</div><div class='add'>+struct adf_gen4_vfmig {</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr;</div><div class='add'>+	bool bank_stopped[ADF_GEN4_NUM_BANKS_PER_VF];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev);</div><div class='ctx'> </div><div class='ctx'> enum icp_qat_gen4_slice_mask {</div><div class='hunk'>@@ -230,11 +164,20 @@ u32 adf_gen4_get_num_aes(struct adf_hw_device_data *self);</div><div class='ctx'> enum dev_sku_info adf_gen4_get_sku(struct adf_hw_device_data *self);</div><div class='ctx'> u32 adf_gen4_get_sram_bar_id(struct adf_hw_device_data *self);</div><div class='ctx'> int adf_gen4_init_device(struct adf_accel_dev *accel_dev);</div><div class='del'>-void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);</div><div class='ctx'> int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number);</div><div class='ctx'> void adf_gen4_set_msix_default_rttable(struct adf_accel_dev *accel_dev);</div><div class='ctx'> void adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev);</div><div class='ctx'> int adf_gen4_init_thd2arb_map(struct adf_accel_dev *accel_dev);</div><div class='ctx'> u16 adf_gen4_get_ring_to_svc_map(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_gen4_bank_quiesce_coal_timer(struct adf_accel_dev *accel_dev,</div><div class='add'>+				     u32 bank_idx, int timeout_ms);</div><div class='add'>+int adf_gen4_bank_drain_start(struct adf_accel_dev *accel_dev,</div><div class='add'>+			      u32 bank_number, int timeout_us);</div><div class='add'>+void adf_gen4_bank_drain_finish(struct adf_accel_dev *accel_dev,</div><div class='add'>+				u32 bank_number);</div><div class='add'>+int adf_gen4_bank_state_save(struct adf_accel_dev *accel_dev, u32 bank_number,</div><div class='add'>+			     struct bank_state *state);</div><div class='add'>+int adf_gen4_bank_state_restore(struct adf_accel_dev *accel_dev,</div><div class='add'>+				u32 bank_number, struct bank_state *state);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c<br/>index 8e8efe93f3ee..21474d402d09 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c</a></div><div class='hunk'>@@ -6,12 +6,10 @@</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_common_drv.h"</div><div class='ctx'> #include "adf_gen4_pfvf.h"</div><div class='add'>+#include "adf_gen4_hw_data.h"</div><div class='ctx'> #include "adf_pfvf_pf_proto.h"</div><div class='ctx'> #include "adf_pfvf_utils.h"</div><div class='ctx'> </div><div class='del'>-#define ADF_4XXX_PF2VM_OFFSET(i)	(0x40B010 + ((i) * 0x20))</div><div class='del'>-#define ADF_4XXX_VM2PF_OFFSET(i)	(0x40B014 + ((i) * 0x20))</div><div class='del'>-</div><div class='ctx'> /* VF2PF interrupt source registers */</div><div class='ctx'> #define ADF_4XXX_VM2PF_SOU		0x41A180</div><div class='ctx'> #define ADF_4XXX_VM2PF_MSK		0x41A1C0</div><div class='hunk'>@@ -29,12 +27,12 @@ static const struct pfvf_csr_format csr_gen4_fmt = {</div><div class='ctx'> </div><div class='ctx'> static u32 adf_gen4_pf_get_pf2vf_offset(u32 i)</div><div class='ctx'> {</div><div class='del'>-	return ADF_4XXX_PF2VM_OFFSET(i);</div><div class='add'>+	return ADF_GEN4_PF2VM_OFFSET(i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 adf_gen4_pf_get_vf2pf_offset(u32 i)</div><div class='ctx'> {</div><div class='del'>-	return ADF_4XXX_VM2PF_OFFSET(i);</div><div class='add'>+	return ADF_GEN4_VM2PF_OFFSET(i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void adf_gen4_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c<br/>index 7fc7a77f6aed..c7ad8cf07863 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c</a></div><div class='hunk'>@@ -149,5 +149,6 @@ void adf_gen4_init_tl_data(struct adf_tl_hw_data *tl_data)</div><div class='ctx'> 	tl_data-&gt;sl_exec_counters = sl_exec_counters;</div><div class='ctx'> 	tl_data-&gt;rp_counters = rp_counters;</div><div class='ctx'> 	tl_data-&gt;num_rp_counters = ARRAY_SIZE(rp_counters);</div><div class='add'>+	tl_data-&gt;max_sl_cnt = ADF_GEN4_TL_MAX_SLICES_PER_TYPE;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(adf_gen4_init_tl_data);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c<br/>new file mode 100644<br/>index 000000000000..a62eb5e8dbe6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c</a></div><div class='hunk'>@@ -0,0 +1,1010 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dev_printk.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='add'>+</div><div class='add'>+#include "adf_accel_devices.h"</div><div class='add'>+#include "adf_common_drv.h"</div><div class='add'>+#include "adf_gen4_hw_data.h"</div><div class='add'>+#include "adf_gen4_pfvf.h"</div><div class='add'>+#include "adf_pfvf_utils.h"</div><div class='add'>+#include "adf_mstate_mgr.h"</div><div class='add'>+#include "adf_gen4_vf_mig.h"</div><div class='add'>+</div><div class='add'>+#define ADF_GEN4_VF_MSTATE_SIZE		4096</div><div class='add'>+#define ADF_GEN4_PFVF_RSP_TIMEOUT_US	5000</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_setup(struct qat_mig_dev *mdev);</div><div class='add'>+static int adf_gen4_vfmig_load_setup(struct qat_mig_dev *mdev, int len);</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_init_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	u8 *state;</div><div class='add'>+</div><div class='add'>+	state = kmalloc(ADF_GEN4_VF_MSTATE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!state)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;state = state;</div><div class='add'>+	mdev-&gt;state_size = ADF_GEN4_VF_MSTATE_SIZE;</div><div class='add'>+	mdev-&gt;setup_size = 0;</div><div class='add'>+	mdev-&gt;remote_setup_size = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen4_vfmig_cleanup_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	kfree(mdev-&gt;state);</div><div class='add'>+	mdev-&gt;state = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen4_vfmig_reset_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	mdev-&gt;setup_size = 0;</div><div class='add'>+	mdev-&gt;remote_setup_size = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_open_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[mdev-&gt;vf_id];</div><div class='add'>+</div><div class='add'>+	vfmig = kzalloc(sizeof(*vfmig), GFP_KERNEL);</div><div class='add'>+	if (!vfmig)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	vfmig-&gt;mstate_mgr = adf_mstate_mgr_new(mdev-&gt;state, mdev-&gt;state_size);</div><div class='add'>+	if (!vfmig-&gt;mstate_mgr) {</div><div class='add'>+		kfree(vfmig);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	vf_info-&gt;mig_priv = vfmig;</div><div class='add'>+	mdev-&gt;setup_size = 0;</div><div class='add'>+	mdev-&gt;remote_setup_size = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen4_vfmig_close_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[mdev-&gt;vf_id];</div><div class='add'>+	if (vf_info-&gt;mig_priv) {</div><div class='add'>+		vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+		adf_mstate_mgr_destroy(vfmig-&gt;mstate_mgr);</div><div class='add'>+		kfree(vfmig);</div><div class='add'>+		vf_info-&gt;mig_priv = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_suspend_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vf_mig;</div><div class='add'>+	u32 vf_nr = mdev-&gt;vf_id;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	vf_mig = vf_info-&gt;mig_priv;</div><div class='add'>+</div><div class='add'>+	/* Stop all inflight jobs */</div><div class='add'>+	for (i = 0; i &lt; hw_data-&gt;num_banks_per_vf; i++) {</div><div class='add'>+		u32 pf_bank_nr = i + vf_nr * hw_data-&gt;num_banks_per_vf;</div><div class='add'>+</div><div class='add'>+		ret = adf_gen4_bank_drain_start(accel_dev, pf_bank_nr,</div><div class='add'>+						ADF_RPRESET_POLL_TIMEOUT_US);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+				"Failed to drain bank %d for vf_nr %d\n", i,</div><div class='add'>+				vf_nr);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		vf_mig-&gt;bank_stopped[i] = true;</div><div class='add'>+</div><div class='add'>+		adf_gen4_bank_quiesce_coal_timer(accel_dev, pf_bank_nr,</div><div class='add'>+						 ADF_COALESCED_POLL_TIMEOUT_US);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_resume_device(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vf_mig;</div><div class='add'>+	u32 vf_nr = mdev-&gt;vf_id;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	vf_mig = vf_info-&gt;mig_priv;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; hw_data-&gt;num_banks_per_vf; i++) {</div><div class='add'>+		u32 pf_bank_nr = i + vf_nr * hw_data-&gt;num_banks_per_vf;</div><div class='add'>+</div><div class='add'>+		if (vf_mig-&gt;bank_stopped[i]) {</div><div class='add'>+			adf_gen4_bank_drain_finish(accel_dev, pf_bank_nr);</div><div class='add'>+			vf_mig-&gt;bank_stopped[i] = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct adf_vf_bank_info {</div><div class='add'>+	struct adf_accel_dev *accel_dev;</div><div class='add'>+	u32 vf_nr;</div><div class='add'>+	u32 bank_nr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mig_user_sla {</div><div class='add'>+	enum adf_base_services srv;</div><div class='add'>+	u64 rp_mask;</div><div class='add'>+	u32 cir;</div><div class='add'>+	u32 pir;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int adf_mstate_sla_check(struct adf_mstate_mgr *sub_mgr, u8 *src_buf,</div><div class='add'>+				u32 src_size, void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_vreginfo _sinfo = { src_buf, src_size };</div><div class='add'>+	struct adf_mstate_vreginfo *sinfo = &amp;_sinfo, *dinfo = opaque;</div><div class='add'>+	u32 src_sla_cnt = sinfo-&gt;size / sizeof(struct mig_user_sla);</div><div class='add'>+	u32 dst_sla_cnt = dinfo-&gt;size / sizeof(struct mig_user_sla);</div><div class='add'>+	struct mig_user_sla *src_slas = sinfo-&gt;addr;</div><div class='add'>+	struct mig_user_sla *dst_slas = dinfo-&gt;addr;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; src_sla_cnt; i++) {</div><div class='add'>+		for (j = 0; j &lt; dst_sla_cnt; j++) {</div><div class='add'>+			if (src_slas[i].srv != dst_slas[j].srv ||</div><div class='add'>+			    src_slas[i].rp_mask != dst_slas[j].rp_mask)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (src_slas[i].cir &gt; dst_slas[j].cir ||</div><div class='add'>+			    src_slas[i].pir &gt; dst_slas[j].pir) {</div><div class='add'>+				pr_err("QAT: DST VF rate limiting mismatch.\n");</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (j == dst_sla_cnt) {</div><div class='add'>+			pr_err("QAT: SRC VF rate limiting mismatch - SRC srv %d and rp_mask 0x%llx.\n",</div><div class='add'>+			       src_slas[i].srv, src_slas[i].rp_mask);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int adf_mstate_check_cap_size(u32 src_sz, u32 dst_sz, u32 max_sz)</div><div class='add'>+{</div><div class='add'>+	if (src_sz &gt; max_sz || dst_sz &gt; max_sz)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_mstate_compatver_check(struct adf_mstate_mgr *sub_mgr,</div><div class='add'>+				      u8 *src_buf, u32 src_sz, void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_vreginfo *info = opaque;</div><div class='add'>+	u8 compat = 0;</div><div class='add'>+	u8 *pcompat;</div><div class='add'>+</div><div class='add'>+	if (src_sz != info-&gt;size) {</div><div class='add'>+		pr_debug("QAT: State mismatch (compat version size), current %u, expected %u\n",</div><div class='add'>+			 src_sz, info-&gt;size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(info-&gt;addr, src_buf, info-&gt;size);</div><div class='add'>+	pcompat = info-&gt;addr;</div><div class='add'>+	if (*pcompat == 0) {</div><div class='add'>+		pr_warn("QAT: Unable to determine the version of VF\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	compat = adf_vf_compat_checker(*pcompat);</div><div class='add'>+	if (compat == ADF_PF2VF_VF_INCOMPATIBLE) {</div><div class='add'>+		pr_debug("QAT: SRC VF driver (ver=%u) is incompatible with DST PF driver (ver=%u)\n",</div><div class='add'>+			 *pcompat, ADF_PFVF_COMPAT_THIS_VERSION);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (compat == ADF_PF2VF_VF_COMPAT_UNKNOWN)</div><div class='add'>+		pr_debug("QAT: SRC VF driver (ver=%u) is newer than DST PF driver (ver=%u)\n",</div><div class='add'>+			 *pcompat, ADF_PFVF_COMPAT_THIS_VERSION);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * adf_mstate_capmask_compare() - compare QAT device capability mask</div><div class='add'>+ * @sinfo:	Pointer to source capability info</div><div class='add'>+ * @dinfo:	Pointer to target capability info</div><div class='add'>+ *</div><div class='add'>+ * This function compares the capability mask between source VF and target VF</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if target capability mask is identical to source capability mask,</div><div class='add'>+ * 1 if target mask can represent all the capabilities represented by source mask,</div><div class='add'>+ * -1 if target mask can't represent all the capabilities represented by source</div><div class='add'>+ * mask.</div><div class='add'>+ */</div><div class='add'>+static int adf_mstate_capmask_compare(struct adf_mstate_vreginfo *sinfo,</div><div class='add'>+				      struct adf_mstate_vreginfo *dinfo)</div><div class='add'>+{</div><div class='add'>+	u64 src = 0, dst = 0;</div><div class='add'>+</div><div class='add'>+	if (adf_mstate_check_cap_size(sinfo-&gt;size, dinfo-&gt;size, sizeof(u64))) {</div><div class='add'>+		pr_debug("QAT: Unexpected capability size %u %u %zu\n",</div><div class='add'>+			 sinfo-&gt;size, dinfo-&gt;size, sizeof(u64));</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;src, sinfo-&gt;addr, sinfo-&gt;size);</div><div class='add'>+	memcpy(&amp;dst, dinfo-&gt;addr, dinfo-&gt;size);</div><div class='add'>+</div><div class='add'>+	pr_debug("QAT: Check cap compatibility of cap %llu %llu\n", src, dst);</div><div class='add'>+</div><div class='add'>+	if (src == dst)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((src | dst) == dst)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_mstate_capmask_superset(struct adf_mstate_mgr *sub_mgr, u8 *buf,</div><div class='add'>+				       u32 size, void *opa)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_vreginfo sinfo = { buf, size };</div><div class='add'>+</div><div class='add'>+	if (adf_mstate_capmask_compare(&amp;sinfo, opa) &gt;= 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_mstate_capmask_equal(struct adf_mstate_mgr *sub_mgr, u8 *buf,</div><div class='add'>+				    u32 size, void *opa)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_vreginfo sinfo = { buf, size };</div><div class='add'>+</div><div class='add'>+	if (adf_mstate_capmask_compare(&amp;sinfo, opa) == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_mstate_set_vreg(struct adf_mstate_mgr *sub_mgr, u8 *buf,</div><div class='add'>+			       u32 size, void *opa)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_vreginfo *info = opa;</div><div class='add'>+</div><div class='add'>+	if (size != info-&gt;size) {</div><div class='add'>+		pr_debug("QAT: Unexpected cap size %u %u\n", size, info-&gt;size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	memcpy(info-&gt;addr, buf, info-&gt;size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 adf_gen4_vfmig_get_slas(struct adf_accel_dev *accel_dev, u32 vf_nr,</div><div class='add'>+				   struct mig_user_sla *pmig_slas)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_rl *rl_data = accel_dev-&gt;rate_limiting;</div><div class='add'>+	struct rl_sla **sla_type_arr = NULL;</div><div class='add'>+	u64 rp_mask, rp_index;</div><div class='add'>+	u32 max_num_sla;</div><div class='add'>+	u32 sla_cnt = 0;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	if (!accel_dev-&gt;rate_limiting)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rp_index = vf_nr * hw_data-&gt;num_banks_per_vf;</div><div class='add'>+	max_num_sla = adf_rl_get_sla_arr_of_type(rl_data, RL_LEAF, &amp;sla_type_arr);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_num_sla; i++) {</div><div class='add'>+		if (!sla_type_arr[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rp_mask = 0;</div><div class='add'>+		for (j = 0; j &lt; sla_type_arr[i]-&gt;ring_pairs_cnt; j++)</div><div class='add'>+			rp_mask |= BIT(sla_type_arr[i]-&gt;ring_pairs_ids[j]);</div><div class='add'>+</div><div class='add'>+		if (rp_mask &amp; GENMASK_ULL(rp_index + 3, rp_index)) {</div><div class='add'>+			pmig_slas-&gt;rp_mask = rp_mask;</div><div class='add'>+			pmig_slas-&gt;cir = sla_type_arr[i]-&gt;cir;</div><div class='add'>+			pmig_slas-&gt;pir = sla_type_arr[i]-&gt;pir;</div><div class='add'>+			pmig_slas-&gt;srv = sla_type_arr[i]-&gt;srv;</div><div class='add'>+			pmig_slas++;</div><div class='add'>+			sla_cnt++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sla_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_etr_regs(struct adf_mstate_mgr *sub_mgr,</div><div class='add'>+					u8 *state, u32 size, void *opa)</div><div class='add'>+{</div><div class='add'>+	struct adf_vf_bank_info *vf_bank_info = opa;</div><div class='add'>+	struct adf_accel_dev *accel_dev = vf_bank_info-&gt;accel_dev;</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	u32 pf_bank_nr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pf_bank_nr = vf_bank_info-&gt;bank_nr + vf_bank_info-&gt;vf_nr * hw_data-&gt;num_banks_per_vf;</div><div class='add'>+	ret = hw_data-&gt;bank_state_restore(accel_dev, pf_bank_nr,</div><div class='add'>+					  (struct bank_state *)state);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to load regs for vf%d bank%d\n",</div><div class='add'>+			vf_bank_info-&gt;vf_nr, vf_bank_info-&gt;bank_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_etr_bank(struct adf_accel_dev *accel_dev,</div><div class='add'>+					u32 vf_nr, u32 bank_nr,</div><div class='add'>+					struct adf_mstate_mgr *mstate_mgr)</div><div class='add'>+{</div><div class='add'>+	struct adf_vf_bank_info vf_bank_info = {accel_dev, vf_nr, bank_nr};</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	char bank_ids[ADF_MSTATE_ID_LEN];</div><div class='add'>+</div><div class='add'>+	snprintf(bank_ids, sizeof(bank_ids), ADF_MSTATE_BANK_IDX_IDS "%x", bank_nr);</div><div class='add'>+	subsec = adf_mstate_sect_lookup(mstate_mgr, bank_ids, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to lookup sec %s for vf%d bank%d\n",</div><div class='add'>+			ADF_MSTATE_BANK_IDX_IDS, vf_nr, bank_nr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_psect(&amp;sub_sects_mgr, subsec);</div><div class='add'>+	l2_subsec = adf_mstate_sect_lookup(&amp;sub_sects_mgr, ADF_MSTATE_ETR_REGS_IDS,</div><div class='add'>+					   adf_gen4_vfmig_load_etr_regs,</div><div class='add'>+					   &amp;vf_bank_info);</div><div class='add'>+	if (!l2_subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to add sec %s for vf%d bank%d\n",</div><div class='add'>+			ADF_MSTATE_ETR_REGS_IDS, vf_nr, bank_nr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_etr(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_lookup(mstate_mgr, ADF_MSTATE_ETRB_IDS, NULL,</div><div class='add'>+					NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to load sec %s\n",</div><div class='add'>+			ADF_MSTATE_ETRB_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_psect(&amp;sub_sects_mgr, subsec);</div><div class='add'>+	for (i = 0; i &lt; hw_data-&gt;num_banks_per_vf; i++) {</div><div class='add'>+		ret = adf_gen4_vfmig_load_etr_bank(accel_dev, vf_nr, i,</div><div class='add'>+						   &amp;sub_sects_mgr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_misc(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct {</div><div class='add'>+		char *id;</div><div class='add'>+		u64 ofs;</div><div class='add'>+	} misc_states[] = {</div><div class='add'>+		{ADF_MSTATE_VINTMSK_IDS, ADF_GEN4_VINTMSK_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_VINTMSK_PF2VM_IDS, ADF_GEN4_VINTMSKPF2VM_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_PF2VM_IDS, ADF_GEN4_PF2VM_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_VM2PF_IDS, ADF_GEN4_VM2PF_OFFSET(vf_nr)},</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_lookup(mstate_mgr, ADF_MSTATE_MISCB_IDS, NULL,</div><div class='add'>+					NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to load sec %s\n",</div><div class='add'>+			ADF_MSTATE_MISCB_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_psect(&amp;sub_sects_mgr, subsec);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(misc_states); i++) {</div><div class='add'>+		struct adf_mstate_vreginfo info;</div><div class='add'>+		u32 regv;</div><div class='add'>+</div><div class='add'>+		info.addr = &amp;regv;</div><div class='add'>+		info.size = sizeof(regv);</div><div class='add'>+		l2_subsec = adf_mstate_sect_lookup(&amp;sub_sects_mgr,</div><div class='add'>+						   misc_states[i].id,</div><div class='add'>+						   adf_mstate_set_vreg,</div><div class='add'>+						   &amp;info);</div><div class='add'>+		if (!l2_subsec) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+				"Failed to load sec %s\n", misc_states[i].id);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		ADF_CSR_WR(csr, misc_states[i].ofs, regv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_generic(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct mig_user_sla dst_slas[RL_RP_CNT_PER_LEAF_MAX] = { };</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	u32 dst_sla_cnt;</div><div class='add'>+	struct {</div><div class='add'>+		char *id;</div><div class='add'>+		int (*action)(struct adf_mstate_mgr *sub_mgr, u8 *buf, u32 size, void *opa);</div><div class='add'>+		struct adf_mstate_vreginfo info;</div><div class='add'>+	} gen_states[] = {</div><div class='add'>+		{ADF_MSTATE_IOV_INIT_IDS, adf_mstate_set_vreg,</div><div class='add'>+		{&amp;vf_info-&gt;init, sizeof(vf_info-&gt;init)}},</div><div class='add'>+		{ADF_MSTATE_COMPAT_VER_IDS, adf_mstate_compatver_check,</div><div class='add'>+		{&amp;vf_info-&gt;vf_compat_ver, sizeof(vf_info-&gt;vf_compat_ver)}},</div><div class='add'>+		{ADF_MSTATE_SLA_IDS, adf_mstate_sla_check, {dst_slas, 0}},</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_lookup(mstate_mgr, ADF_MSTATE_GEN_IDS, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to load sec %s\n",</div><div class='add'>+			ADF_MSTATE_GEN_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_psect(&amp;sub_sects_mgr, subsec);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(gen_states); i++) {</div><div class='add'>+		if (gen_states[i].info.addr == dst_slas) {</div><div class='add'>+			dst_sla_cnt = adf_gen4_vfmig_get_slas(accel_dev, vf_nr, dst_slas);</div><div class='add'>+			gen_states[i].info.size = dst_sla_cnt * sizeof(struct mig_user_sla);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		l2_subsec = adf_mstate_sect_lookup(&amp;sub_sects_mgr,</div><div class='add'>+						   gen_states[i].id,</div><div class='add'>+						   gen_states[i].action,</div><div class='add'>+						   &amp;gen_states[i].info);</div><div class='add'>+		if (!l2_subsec) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Failed to load sec %s\n",</div><div class='add'>+				gen_states[i].id);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_config(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct {</div><div class='add'>+		char *id;</div><div class='add'>+		int (*action)(struct adf_mstate_mgr *sub_mgr, u8 *buf, u32 size, void *opa);</div><div class='add'>+		struct adf_mstate_vreginfo info;</div><div class='add'>+	} setups[] = {</div><div class='add'>+		{ADF_MSTATE_GEN_CAP_IDS, adf_mstate_capmask_superset,</div><div class='add'>+		{&amp;hw_data-&gt;accel_capabilities_mask, sizeof(hw_data-&gt;accel_capabilities_mask)}},</div><div class='add'>+		{ADF_MSTATE_GEN_SVCMAP_IDS, adf_mstate_capmask_equal,</div><div class='add'>+		{&amp;hw_data-&gt;ring_to_svc_map, sizeof(hw_data-&gt;ring_to_svc_map)}},</div><div class='add'>+		{ADF_MSTATE_GEN_EXTDC_IDS, adf_mstate_capmask_superset,</div><div class='add'>+		{&amp;hw_data-&gt;extended_dc_capabilities, sizeof(hw_data-&gt;extended_dc_capabilities)}},</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_lookup(mstate_mgr, ADF_MSTATE_CONFIG_IDS, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to load sec %s\n",</div><div class='add'>+			ADF_MSTATE_CONFIG_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_psect(&amp;sub_sects_mgr, subsec);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(setups); i++) {</div><div class='add'>+		l2_subsec = adf_mstate_sect_lookup(&amp;sub_sects_mgr, setups[i].id,</div><div class='add'>+						   setups[i].action, &amp;setups[i].info);</div><div class='add'>+		if (!l2_subsec) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Failed to load sec %s\n",</div><div class='add'>+				setups[i].id);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_etr_regs(struct adf_mstate_mgr *subs, u8 *state,</div><div class='add'>+					u32 size, void *opa)</div><div class='add'>+{</div><div class='add'>+	struct adf_vf_bank_info *vf_bank_info = opa;</div><div class='add'>+	struct adf_accel_dev *accel_dev = vf_bank_info-&gt;accel_dev;</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	u32 pf_bank_nr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pf_bank_nr = vf_bank_info-&gt;bank_nr;</div><div class='add'>+	pf_bank_nr += vf_bank_info-&gt;vf_nr * hw_data-&gt;num_banks_per_vf;</div><div class='add'>+</div><div class='add'>+	ret = hw_data-&gt;bank_state_save(accel_dev, pf_bank_nr,</div><div class='add'>+				       (struct bank_state *)state);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to save regs for vf%d bank%d\n",</div><div class='add'>+			vf_bank_info-&gt;vf_nr, vf_bank_info-&gt;bank_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sizeof(struct bank_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_etr_bank(struct adf_accel_dev *accel_dev,</div><div class='add'>+					u32 vf_nr, u32 bank_nr,</div><div class='add'>+					struct adf_mstate_mgr *mstate_mgr)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct adf_vf_bank_info vf_bank_info;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	char bank_ids[ADF_MSTATE_ID_LEN];</div><div class='add'>+</div><div class='add'>+	snprintf(bank_ids, sizeof(bank_ids), ADF_MSTATE_BANK_IDX_IDS "%x", bank_nr);</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_add(mstate_mgr, bank_ids, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to add sec %s for vf%d bank%d\n",</div><div class='add'>+			ADF_MSTATE_BANK_IDX_IDS, vf_nr, bank_nr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_parent(&amp;sub_sects_mgr, mstate_mgr);</div><div class='add'>+	vf_bank_info.accel_dev = accel_dev;</div><div class='add'>+	vf_bank_info.vf_nr = vf_nr;</div><div class='add'>+	vf_bank_info.bank_nr = bank_nr;</div><div class='add'>+	l2_subsec = adf_mstate_sect_add(&amp;sub_sects_mgr, ADF_MSTATE_ETR_REGS_IDS,</div><div class='add'>+					adf_gen4_vfmig_save_etr_regs,</div><div class='add'>+					&amp;vf_bank_info);</div><div class='add'>+	if (!l2_subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to add sec %s for vf%d bank%d\n",</div><div class='add'>+			ADF_MSTATE_ETR_REGS_IDS, vf_nr, bank_nr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	adf_mstate_sect_update(mstate_mgr, &amp;sub_sects_mgr, subsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_etr(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_add(mstate_mgr, ADF_MSTATE_ETRB_IDS, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+			ADF_MSTATE_ETRB_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_parent(&amp;sub_sects_mgr, mstate_mgr);</div><div class='add'>+	for (i = 0; i &lt; hw_data-&gt;num_banks_per_vf; i++) {</div><div class='add'>+		ret = adf_gen4_vfmig_save_etr_bank(accel_dev, vf_nr, i,</div><div class='add'>+						   &amp;sub_sects_mgr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	adf_mstate_sect_update(mstate_mgr, &amp;sub_sects_mgr, subsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_misc(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct {</div><div class='add'>+		char *id;</div><div class='add'>+		u64 offset;</div><div class='add'>+	} misc_states[] = {</div><div class='add'>+		{ADF_MSTATE_VINTSRC_IDS, ADF_GEN4_VINTSOU_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_VINTMSK_IDS, ADF_GEN4_VINTMSK_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_VINTSRC_PF2VM_IDS, ADF_GEN4_VINTSOUPF2VM_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_VINTMSK_PF2VM_IDS, ADF_GEN4_VINTMSKPF2VM_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_PF2VM_IDS, ADF_GEN4_PF2VM_OFFSET(vf_nr)},</div><div class='add'>+		{ADF_MSTATE_VM2PF_IDS, ADF_GEN4_VM2PF_OFFSET(vf_nr)},</div><div class='add'>+	};</div><div class='add'>+	ktime_t time_exp;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_add(mstate_mgr, ADF_MSTATE_MISCB_IDS, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+			ADF_MSTATE_MISCB_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	time_exp = ktime_add_us(ktime_get(), ADF_GEN4_PFVF_RSP_TIMEOUT_US);</div><div class='add'>+	while (!mutex_trylock(&amp;vf_info-&gt;pfvf_mig_lock)) {</div><div class='add'>+		if (ktime_after(ktime_get(), time_exp)) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Failed to get pfvf mig lock\n");</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+		usleep_range(500, 1000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_parent(&amp;sub_sects_mgr, mstate_mgr);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(misc_states); i++) {</div><div class='add'>+		struct adf_mstate_vreginfo info;</div><div class='add'>+		u32 regv;</div><div class='add'>+</div><div class='add'>+		info.addr = &amp;regv;</div><div class='add'>+		info.size = sizeof(regv);</div><div class='add'>+		regv = ADF_CSR_RD(csr, misc_states[i].offset);</div><div class='add'>+</div><div class='add'>+		l2_subsec = adf_mstate_sect_add_vreg(&amp;sub_sects_mgr,</div><div class='add'>+						     misc_states[i].id,</div><div class='add'>+						     &amp;info);</div><div class='add'>+		if (!l2_subsec) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+				misc_states[i].id);</div><div class='add'>+			mutex_unlock(&amp;vf_info-&gt;pfvf_mig_lock);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;vf_info-&gt;pfvf_mig_lock);</div><div class='add'>+	adf_mstate_sect_update(mstate_mgr, &amp;sub_sects_mgr, subsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_generic(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct mig_user_sla src_slas[RL_RP_CNT_PER_LEAF_MAX] = { };</div><div class='add'>+	u32 src_sla_cnt;</div><div class='add'>+	struct {</div><div class='add'>+		char *id;</div><div class='add'>+		struct adf_mstate_vreginfo info;</div><div class='add'>+	} gen_states[] = {</div><div class='add'>+		{ADF_MSTATE_IOV_INIT_IDS,</div><div class='add'>+		{&amp;vf_info-&gt;init, sizeof(vf_info-&gt;init)}},</div><div class='add'>+		{ADF_MSTATE_COMPAT_VER_IDS,</div><div class='add'>+		{&amp;vf_info-&gt;vf_compat_ver, sizeof(vf_info-&gt;vf_compat_ver)}},</div><div class='add'>+		{ADF_MSTATE_SLA_IDS, {src_slas, 0}},</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_add(mstate_mgr, ADF_MSTATE_GEN_IDS, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+			ADF_MSTATE_GEN_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_parent(&amp;sub_sects_mgr, mstate_mgr);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(gen_states); i++) {</div><div class='add'>+		if (gen_states[i].info.addr == src_slas) {</div><div class='add'>+			src_sla_cnt = adf_gen4_vfmig_get_slas(accel_dev, vf_nr, src_slas);</div><div class='add'>+			gen_states[i].info.size = src_sla_cnt * sizeof(struct mig_user_sla);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		l2_subsec = adf_mstate_sect_add_vreg(&amp;sub_sects_mgr,</div><div class='add'>+						     gen_states[i].id,</div><div class='add'>+						     &amp;gen_states[i].info);</div><div class='add'>+		if (!l2_subsec) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+				gen_states[i].id);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	adf_mstate_sect_update(mstate_mgr, &amp;sub_sects_mgr, subsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_config(struct adf_accel_dev *accel_dev, u32 vf_nr)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_vf_info *vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+	struct adf_mstate_mgr *mstate_mgr = vfmig-&gt;mstate_mgr;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *subsec, *l2_subsec;</div><div class='add'>+	struct {</div><div class='add'>+		char *id;</div><div class='add'>+		struct adf_mstate_vreginfo info;</div><div class='add'>+	} setups[] = {</div><div class='add'>+		{ADF_MSTATE_GEN_CAP_IDS,</div><div class='add'>+		{&amp;hw_data-&gt;accel_capabilities_mask, sizeof(hw_data-&gt;accel_capabilities_mask)}},</div><div class='add'>+		{ADF_MSTATE_GEN_SVCMAP_IDS,</div><div class='add'>+		{&amp;hw_data-&gt;ring_to_svc_map, sizeof(hw_data-&gt;ring_to_svc_map)}},</div><div class='add'>+		{ADF_MSTATE_GEN_EXTDC_IDS,</div><div class='add'>+		{&amp;hw_data-&gt;extended_dc_capabilities, sizeof(hw_data-&gt;extended_dc_capabilities)}},</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	subsec = adf_mstate_sect_add(mstate_mgr, ADF_MSTATE_CONFIG_IDS, NULL, NULL);</div><div class='add'>+	if (!subsec) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+			ADF_MSTATE_CONFIG_IDS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_parent(&amp;sub_sects_mgr, mstate_mgr);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(setups); i++) {</div><div class='add'>+		l2_subsec = adf_mstate_sect_add_vreg(&amp;sub_sects_mgr, setups[i].id,</div><div class='add'>+						     &amp;setups[i].info);</div><div class='add'>+		if (!l2_subsec) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Failed to add sec %s\n",</div><div class='add'>+				setups[i].id);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	adf_mstate_sect_update(mstate_mgr, &amp;sub_sects_mgr, subsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_state(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig;</div><div class='add'>+	u32 vf_nr = mdev-&gt;vf_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_save_setup(mdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to save setup for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init(vfmig-&gt;mstate_mgr, mdev-&gt;state + mdev-&gt;setup_size,</div><div class='add'>+			    mdev-&gt;state_size - mdev-&gt;setup_size);</div><div class='add'>+	if (!adf_mstate_preamble_add(vfmig-&gt;mstate_mgr))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_save_generic(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to save generic state for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_save_misc(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to save misc bar state for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_save_etr(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to save etr bar state for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_preamble_update(vfmig-&gt;mstate_mgr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_state(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig;</div><div class='add'>+	u32 vf_nr = mdev-&gt;vf_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_load_setup(mdev, mdev-&gt;state_size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to load setup for vf_nr %d\n",</div><div class='add'>+			vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adf_mstate_mgr_init_from_remote(vfmig-&gt;mstate_mgr,</div><div class='add'>+					      mdev-&gt;state + mdev-&gt;remote_setup_size,</div><div class='add'>+					      mdev-&gt;state_size - mdev-&gt;remote_setup_size,</div><div class='add'>+					      NULL, NULL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Invalid state for vf_nr %d\n",</div><div class='add'>+			vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_load_generic(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to load general state for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_load_misc(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to load misc bar state for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_load_etr(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to load etr bar state for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_save_setup(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig;</div><div class='add'>+	u32 vf_nr = mdev-&gt;vf_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;setup_size)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init(vfmig-&gt;mstate_mgr, mdev-&gt;state, mdev-&gt;state_size);</div><div class='add'>+	if (!adf_mstate_preamble_add(vfmig-&gt;mstate_mgr))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_save_config(accel_dev, mdev-&gt;vf_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	adf_mstate_preamble_update(vfmig-&gt;mstate_mgr);</div><div class='add'>+	mdev-&gt;setup_size = adf_mstate_state_size(vfmig-&gt;mstate_mgr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_vfmig_load_setup(struct qat_mig_dev *mdev, int len)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+	struct adf_accel_vf_info *vf_info;</div><div class='add'>+	struct adf_gen4_vfmig *vfmig;</div><div class='add'>+	u32 vf_nr = mdev-&gt;vf_id;</div><div class='add'>+	u32 setup_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vf_info = &amp;accel_dev-&gt;pf.vf_info[vf_nr];</div><div class='add'>+	vfmig = vf_info-&gt;mig_priv;</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;remote_setup_size)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (len &lt; sizeof(struct adf_mstate_preh))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init(vfmig-&gt;mstate_mgr, mdev-&gt;state, mdev-&gt;state_size);</div><div class='add'>+	setup_size = adf_mstate_state_size_from_remote(vfmig-&gt;mstate_mgr);</div><div class='add'>+	if (setup_size &gt; mdev-&gt;state_size)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (len &lt; setup_size)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	ret = adf_mstate_mgr_init_from_remote(vfmig-&gt;mstate_mgr, mdev-&gt;state,</div><div class='add'>+					      setup_size, NULL, NULL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Invalid setup for vf_nr %d\n",</div><div class='add'>+			vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdev-&gt;remote_setup_size = setup_size;</div><div class='add'>+</div><div class='add'>+	ret = adf_gen4_vfmig_load_config(accel_dev, vf_nr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Failed to load config for vf_nr %d\n", vf_nr);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen4_init_vf_mig_ops(struct qat_migdev_ops *vfmig_ops)</div><div class='add'>+{</div><div class='add'>+	vfmig_ops-&gt;init = adf_gen4_vfmig_init_device;</div><div class='add'>+	vfmig_ops-&gt;cleanup = adf_gen4_vfmig_cleanup_device;</div><div class='add'>+	vfmig_ops-&gt;reset = adf_gen4_vfmig_reset_device;</div><div class='add'>+	vfmig_ops-&gt;open = adf_gen4_vfmig_open_device;</div><div class='add'>+	vfmig_ops-&gt;close = adf_gen4_vfmig_close_device;</div><div class='add'>+	vfmig_ops-&gt;suspend = adf_gen4_vfmig_suspend_device;</div><div class='add'>+	vfmig_ops-&gt;resume = adf_gen4_vfmig_resume_device;</div><div class='add'>+	vfmig_ops-&gt;save_state = adf_gen4_vfmig_save_state;</div><div class='add'>+	vfmig_ops-&gt;load_state = adf_gen4_vfmig_load_state;</div><div class='add'>+	vfmig_ops-&gt;load_setup = adf_gen4_vfmig_load_setup;</div><div class='add'>+	vfmig_ops-&gt;save_setup = adf_gen4_vfmig_save_setup;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen4_init_vf_mig_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.h<br/>new file mode 100644<br/>index 000000000000..72216d078ee1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.h</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#ifndef ADF_GEN4_VF_MIG_H_</div><div class='add'>+#define ADF_GEN4_VF_MIG_H_</div><div class='add'>+</div><div class='add'>+#include "adf_accel_devices.h"</div><div class='add'>+</div><div class='add'>+void adf_gen4_init_vf_mig_ops(struct qat_migdev_ops *vfmig_ops);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.c b/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.c<br/>new file mode 100644<br/>index 000000000000..41cc763a74aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.c</a></div><div class='hunk'>@@ -0,0 +1,318 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include "adf_mstate_mgr.h"</div><div class='add'>+</div><div class='add'>+#define ADF_MSTATE_MAGIC	0xADF5CAEA</div><div class='add'>+#define ADF_MSTATE_VERSION	0x1</div><div class='add'>+</div><div class='add'>+struct adf_mstate_sect_h {</div><div class='add'>+	u8 id[ADF_MSTATE_ID_LEN];</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 sub_sects;</div><div class='add'>+	u8 state[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 adf_mstate_state_size(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	return mgr-&gt;state - mgr-&gt;buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 adf_mstate_avail_room(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	return mgr-&gt;buf + mgr-&gt;size - mgr-&gt;state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_mstate_mgr_init(struct adf_mstate_mgr *mgr, u8 *buf, u32 size)</div><div class='add'>+{</div><div class='add'>+	mgr-&gt;buf = buf;</div><div class='add'>+	mgr-&gt;state = buf;</div><div class='add'>+	mgr-&gt;size = size;</div><div class='add'>+	mgr-&gt;n_sects = 0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adf_mstate_mgr *adf_mstate_mgr_new(u8 *buf, u32 size)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_mgr *mgr;</div><div class='add'>+</div><div class='add'>+	mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);</div><div class='add'>+	if (!mgr)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init(mgr, buf, size);</div><div class='add'>+</div><div class='add'>+	return mgr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_mstate_mgr_destroy(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	kfree(mgr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_mstate_mgr_init_from_parent(struct adf_mstate_mgr *mgr,</div><div class='add'>+				     struct adf_mstate_mgr *p_mgr)</div><div class='add'>+{</div><div class='add'>+	adf_mstate_mgr_init(mgr, p_mgr-&gt;state,</div><div class='add'>+			    p_mgr-&gt;size - adf_mstate_state_size(p_mgr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_mstate_mgr_init_from_psect(struct adf_mstate_mgr *mgr,</div><div class='add'>+				    struct adf_mstate_sect_h *p_sect)</div><div class='add'>+{</div><div class='add'>+	adf_mstate_mgr_init(mgr, p_sect-&gt;state, p_sect-&gt;size);</div><div class='add'>+	mgr-&gt;n_sects = p_sect-&gt;sub_sects;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_mstate_preamble_init(struct adf_mstate_preh *preamble)</div><div class='add'>+{</div><div class='add'>+	preamble-&gt;magic = ADF_MSTATE_MAGIC;</div><div class='add'>+	preamble-&gt;version = ADF_MSTATE_VERSION;</div><div class='add'>+	preamble-&gt;preh_len = sizeof(*preamble);</div><div class='add'>+	preamble-&gt;size = 0;</div><div class='add'>+	preamble-&gt;n_sects = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* default preambles checker */</div><div class='add'>+static int adf_mstate_preamble_def_checker(struct adf_mstate_preh *preamble,</div><div class='add'>+					   void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_mgr *mgr = opaque;</div><div class='add'>+</div><div class='add'>+	if (preamble-&gt;magic != ADF_MSTATE_MAGIC ||</div><div class='add'>+	    preamble-&gt;version &gt; ADF_MSTATE_VERSION ||</div><div class='add'>+	    preamble-&gt;preh_len &gt; mgr-&gt;size) {</div><div class='add'>+		pr_debug("QAT: LM - Invalid state (magic=%#x, version=%#x, hlen=%u), state_size=%u\n",</div><div class='add'>+			 preamble-&gt;magic, preamble-&gt;version, preamble-&gt;preh_len,</div><div class='add'>+			 mgr-&gt;size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct adf_mstate_preh *adf_mstate_preamble_add(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_preh *pre = (struct adf_mstate_preh *)mgr-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (adf_mstate_avail_room(mgr) &lt; sizeof(*pre)) {</div><div class='add'>+		pr_err("QAT: LM - Not enough space for preamble\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_mstate_preamble_init(pre);</div><div class='add'>+	mgr-&gt;state += pre-&gt;preh_len;</div><div class='add'>+</div><div class='add'>+	return pre;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int adf_mstate_preamble_update(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_preh *preamble = (struct adf_mstate_preh *)mgr-&gt;buf;</div><div class='add'>+</div><div class='add'>+	preamble-&gt;size = adf_mstate_state_size(mgr) - preamble-&gt;preh_len;</div><div class='add'>+	preamble-&gt;n_sects = mgr-&gt;n_sects;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_mstate_dump_sect(struct adf_mstate_sect_h *sect,</div><div class='add'>+				 const char *prefix)</div><div class='add'>+{</div><div class='add'>+	pr_debug("QAT: LM - %s QAT state section %s\n", prefix, sect-&gt;id);</div><div class='add'>+	print_hex_dump_debug("h-", DUMP_PREFIX_OFFSET, 16, 2, sect,</div><div class='add'>+			     sizeof(*sect), true);</div><div class='add'>+	print_hex_dump_debug("s-", DUMP_PREFIX_OFFSET, 16, 2, sect-&gt;state,</div><div class='add'>+			     sect-&gt;size, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __adf_mstate_sect_update(struct adf_mstate_mgr *mgr,</div><div class='add'>+					    struct adf_mstate_sect_h *sect,</div><div class='add'>+					    u32 size,</div><div class='add'>+					    u32 n_subsects)</div><div class='add'>+{</div><div class='add'>+	sect-&gt;size += size;</div><div class='add'>+	sect-&gt;sub_sects += n_subsects;</div><div class='add'>+	mgr-&gt;n_sects++;</div><div class='add'>+	mgr-&gt;state += sect-&gt;size;</div><div class='add'>+</div><div class='add'>+	adf_mstate_dump_sect(sect, "Add");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_mstate_sect_update(struct adf_mstate_mgr *p_mgr,</div><div class='add'>+			    struct adf_mstate_mgr *curr_mgr,</div><div class='add'>+			    struct adf_mstate_sect_h *sect)</div><div class='add'>+{</div><div class='add'>+	__adf_mstate_sect_update(p_mgr, sect, adf_mstate_state_size(curr_mgr),</div><div class='add'>+				 curr_mgr-&gt;n_sects);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct adf_mstate_sect_h *adf_mstate_sect_add_header(struct adf_mstate_mgr *mgr,</div><div class='add'>+							    const char *id)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_sect_h *sect = (struct adf_mstate_sect_h *)(mgr-&gt;state);</div><div class='add'>+</div><div class='add'>+	if (adf_mstate_avail_room(mgr) &lt; sizeof(*sect)) {</div><div class='add'>+		pr_debug("QAT: LM - Not enough space for header of QAT state sect %s\n", id);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	strscpy(sect-&gt;id, id, sizeof(sect-&gt;id));</div><div class='add'>+	sect-&gt;size = 0;</div><div class='add'>+	sect-&gt;sub_sects = 0;</div><div class='add'>+	mgr-&gt;state += sizeof(*sect);</div><div class='add'>+</div><div class='add'>+	return sect;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct adf_mstate_sect_h *adf_mstate_sect_add_vreg(struct adf_mstate_mgr *mgr,</div><div class='add'>+						   const char *id,</div><div class='add'>+						   struct adf_mstate_vreginfo *info)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_sect_h *sect;</div><div class='add'>+</div><div class='add'>+	sect = adf_mstate_sect_add_header(mgr, id);</div><div class='add'>+	if (!sect)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (adf_mstate_avail_room(mgr) &lt; info-&gt;size) {</div><div class='add'>+		pr_debug("QAT: LM - Not enough space for QAT state sect %s, requires %u\n",</div><div class='add'>+			 id, info-&gt;size);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(sect-&gt;state, info-&gt;addr, info-&gt;size);</div><div class='add'>+	__adf_mstate_sect_update(mgr, sect, info-&gt;size, 0);</div><div class='add'>+</div><div class='add'>+	return sect;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct adf_mstate_sect_h *adf_mstate_sect_add(struct adf_mstate_mgr *mgr,</div><div class='add'>+					      const char *id,</div><div class='add'>+					      adf_mstate_populate populate,</div><div class='add'>+					      void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	struct adf_mstate_sect_h *sect;</div><div class='add'>+	int avail_room, size;</div><div class='add'>+</div><div class='add'>+	sect = adf_mstate_sect_add_header(mgr, id);</div><div class='add'>+	if (!sect)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!populate)</div><div class='add'>+		return sect;</div><div class='add'>+</div><div class='add'>+	avail_room = adf_mstate_avail_room(mgr);</div><div class='add'>+	adf_mstate_mgr_init_from_parent(&amp;sub_sects_mgr, mgr);</div><div class='add'>+</div><div class='add'>+	size = (*populate)(&amp;sub_sects_mgr, sect-&gt;state, avail_room, opaque);</div><div class='add'>+	if (size &lt; 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	size += adf_mstate_state_size(&amp;sub_sects_mgr);</div><div class='add'>+	if (avail_room &lt; size) {</div><div class='add'>+		pr_debug("QAT: LM - Not enough space for QAT state sect %s, requires %u\n",</div><div class='add'>+			 id, size);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	__adf_mstate_sect_update(mgr, sect, size, sub_sects_mgr.n_sects);</div><div class='add'>+</div><div class='add'>+	return sect;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_mstate_sect_validate(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_sect_h *start = (struct adf_mstate_sect_h *)mgr-&gt;state;</div><div class='add'>+	struct adf_mstate_sect_h *sect = start;</div><div class='add'>+	u64 end;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	end = (uintptr_t)mgr-&gt;buf + mgr-&gt;size;</div><div class='add'>+	for (i = 0; i &lt; mgr-&gt;n_sects; i++) {</div><div class='add'>+		uintptr_t s_start = (uintptr_t)sect-&gt;state;</div><div class='add'>+		uintptr_t s_end = s_start + sect-&gt;size;</div><div class='add'>+</div><div class='add'>+		if (s_end &lt; s_start || s_end &gt; end) {</div><div class='add'>+			pr_debug("QAT: LM - Corrupted state section (index=%u, size=%u) in state_mgr (size=%u, secs=%u)\n",</div><div class='add'>+				 i, sect-&gt;size, mgr-&gt;size, mgr-&gt;n_sects);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		sect = (struct adf_mstate_sect_h *)s_end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("QAT: LM - Scanned section (last child=%s, size=%lu) in state_mgr (size=%u, secs=%u)\n",</div><div class='add'>+		 start-&gt;id, sizeof(struct adf_mstate_sect_h) * (ulong)(sect - start),</div><div class='add'>+		 mgr-&gt;size, mgr-&gt;n_sects);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 adf_mstate_state_size_from_remote(struct adf_mstate_mgr *mgr)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_preh *preh = (struct adf_mstate_preh *)mgr-&gt;buf;</div><div class='add'>+</div><div class='add'>+	return preh-&gt;preh_len + preh-&gt;size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int adf_mstate_mgr_init_from_remote(struct adf_mstate_mgr *mgr, u8 *buf, u32 size,</div><div class='add'>+				    adf_mstate_preamble_checker pre_checker,</div><div class='add'>+				    void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_preh *pre;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init(mgr, buf, size);</div><div class='add'>+	pre = (struct adf_mstate_preh *)(mgr-&gt;buf);</div><div class='add'>+</div><div class='add'>+	pr_debug("QAT: LM - Dump state preambles\n");</div><div class='add'>+	print_hex_dump_debug("", DUMP_PREFIX_OFFSET, 16, 2, pre, pre-&gt;preh_len, 0);</div><div class='add'>+</div><div class='add'>+	if (pre_checker)</div><div class='add'>+		ret = (*pre_checker)(pre, opaque);</div><div class='add'>+	else</div><div class='add'>+		ret = adf_mstate_preamble_def_checker(pre, mgr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mgr-&gt;state = mgr-&gt;buf + pre-&gt;preh_len;</div><div class='add'>+	mgr-&gt;n_sects = pre-&gt;n_sects;</div><div class='add'>+</div><div class='add'>+	return adf_mstate_sect_validate(mgr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct adf_mstate_sect_h *adf_mstate_sect_lookup(struct adf_mstate_mgr *mgr,</div><div class='add'>+						 const char *id,</div><div class='add'>+						 adf_mstate_action action,</div><div class='add'>+						 void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct adf_mstate_sect_h *sect = (struct adf_mstate_sect_h *)mgr-&gt;state;</div><div class='add'>+	struct adf_mstate_mgr sub_sects_mgr;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mgr-&gt;n_sects; i++) {</div><div class='add'>+		if (!strncmp(sect-&gt;id, id, sizeof(sect-&gt;id)))</div><div class='add'>+			goto found;</div><div class='add'>+</div><div class='add'>+		sect = (struct adf_mstate_sect_h *)(sect-&gt;state + sect-&gt;size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+</div><div class='add'>+found:</div><div class='add'>+	adf_mstate_dump_sect(sect, "Found");</div><div class='add'>+</div><div class='add'>+	adf_mstate_mgr_init_from_psect(&amp;sub_sects_mgr, sect);</div><div class='add'>+	if (sect-&gt;sub_sects &amp;&amp; adf_mstate_sect_validate(&amp;sub_sects_mgr))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!action)</div><div class='add'>+		return sect;</div><div class='add'>+</div><div class='add'>+	ret = (*action)(&amp;sub_sects_mgr, sect-&gt;state, sect-&gt;size, opaque);</div><div class='add'>+	if (ret)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return sect;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.h b/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.h<br/>new file mode 100644<br/>index 000000000000..81d263a596c5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_mstate_mgr.h</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef ADF_MSTATE_MGR_H</div><div class='add'>+#define ADF_MSTATE_MGR_H</div><div class='add'>+</div><div class='add'>+#define ADF_MSTATE_ID_LEN		8</div><div class='add'>+</div><div class='add'>+#define ADF_MSTATE_ETRB_IDS		"ETRBAR"</div><div class='add'>+#define ADF_MSTATE_MISCB_IDS		"MISCBAR"</div><div class='add'>+#define ADF_MSTATE_EXTB_IDS		"EXTBAR"</div><div class='add'>+#define ADF_MSTATE_GEN_IDS		"GENER"</div><div class='add'>+#define ADF_MSTATE_CONFIG_IDS		"CONFIG"</div><div class='add'>+#define ADF_MSTATE_SECTION_NUM		5</div><div class='add'>+</div><div class='add'>+#define ADF_MSTATE_BANK_IDX_IDS		"bnk"</div><div class='add'>+</div><div class='add'>+#define ADF_MSTATE_ETR_REGS_IDS		"mregs"</div><div class='add'>+#define ADF_MSTATE_VINTSRC_IDS		"visrc"</div><div class='add'>+#define ADF_MSTATE_VINTMSK_IDS		"vimsk"</div><div class='add'>+#define ADF_MSTATE_SLA_IDS		"sla"</div><div class='add'>+#define ADF_MSTATE_IOV_INIT_IDS		"iovinit"</div><div class='add'>+#define ADF_MSTATE_COMPAT_VER_IDS	"compver"</div><div class='add'>+#define ADF_MSTATE_GEN_CAP_IDS		"gencap"</div><div class='add'>+#define ADF_MSTATE_GEN_SVCMAP_IDS	"svcmap"</div><div class='add'>+#define ADF_MSTATE_GEN_EXTDC_IDS	"extdc"</div><div class='add'>+#define ADF_MSTATE_VINTSRC_PF2VM_IDS	"vispv"</div><div class='add'>+#define ADF_MSTATE_VINTMSK_PF2VM_IDS	"vimpv"</div><div class='add'>+#define ADF_MSTATE_VM2PF_IDS		"vm2pf"</div><div class='add'>+#define ADF_MSTATE_PF2VM_IDS		"pf2vm"</div><div class='add'>+</div><div class='add'>+struct adf_mstate_mgr {</div><div class='add'>+	u8 *buf;</div><div class='add'>+	u8 *state;</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 n_sects;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adf_mstate_preh {</div><div class='add'>+	u32 magic;</div><div class='add'>+	u32 version;</div><div class='add'>+	u16 preh_len;</div><div class='add'>+	u16 n_sects;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adf_mstate_vreginfo {</div><div class='add'>+	void *addr;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adf_mstate_sect_h;</div><div class='add'>+</div><div class='add'>+typedef int (*adf_mstate_preamble_checker)(struct adf_mstate_preh *preamble, void *opa);</div><div class='add'>+typedef int (*adf_mstate_populate)(struct adf_mstate_mgr *sub_mgr, u8 *buf,</div><div class='add'>+				   u32 size, void *opa);</div><div class='add'>+typedef int (*adf_mstate_action)(struct adf_mstate_mgr *sub_mgr, u8 *buf, u32 size,</div><div class='add'>+				 void *opa);</div><div class='add'>+</div><div class='add'>+struct adf_mstate_mgr *adf_mstate_mgr_new(u8 *buf, u32 size);</div><div class='add'>+void adf_mstate_mgr_destroy(struct adf_mstate_mgr *mgr);</div><div class='add'>+void adf_mstate_mgr_init(struct adf_mstate_mgr *mgr, u8 *buf, u32 size);</div><div class='add'>+void adf_mstate_mgr_init_from_parent(struct adf_mstate_mgr *mgr,</div><div class='add'>+				     struct adf_mstate_mgr *p_mgr);</div><div class='add'>+void adf_mstate_mgr_init_from_psect(struct adf_mstate_mgr *mgr,</div><div class='add'>+				    struct adf_mstate_sect_h *p_sect);</div><div class='add'>+int adf_mstate_mgr_init_from_remote(struct adf_mstate_mgr *mgr,</div><div class='add'>+				    u8 *buf, u32 size,</div><div class='add'>+				    adf_mstate_preamble_checker checker,</div><div class='add'>+				    void *opaque);</div><div class='add'>+struct adf_mstate_preh *adf_mstate_preamble_add(struct adf_mstate_mgr *mgr);</div><div class='add'>+int adf_mstate_preamble_update(struct adf_mstate_mgr *mgr);</div><div class='add'>+u32 adf_mstate_state_size(struct adf_mstate_mgr *mgr);</div><div class='add'>+u32 adf_mstate_state_size_from_remote(struct adf_mstate_mgr *mgr);</div><div class='add'>+void adf_mstate_sect_update(struct adf_mstate_mgr *p_mgr,</div><div class='add'>+			    struct adf_mstate_mgr *curr_mgr,</div><div class='add'>+			    struct adf_mstate_sect_h *sect);</div><div class='add'>+struct adf_mstate_sect_h *adf_mstate_sect_add_vreg(struct adf_mstate_mgr *mgr,</div><div class='add'>+						   const char *id,</div><div class='add'>+						   struct adf_mstate_vreginfo *info);</div><div class='add'>+struct adf_mstate_sect_h *adf_mstate_sect_add(struct adf_mstate_mgr *mgr,</div><div class='add'>+					      const char *id,</div><div class='add'>+					      adf_mstate_populate populate,</div><div class='add'>+					      void *opaque);</div><div class='add'>+struct adf_mstate_sect_h *adf_mstate_sect_lookup(struct adf_mstate_mgr *mgr,</div><div class='add'>+						 const char *id,</div><div class='add'>+						 adf_mstate_action action,</div><div class='add'>+						 void *opaque);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c b/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c<br/>index 9ab93fbfefde..b9b5e744a3f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c</a></div><div class='hunk'>@@ -242,13 +242,7 @@ static int adf_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u8 vf_nr,</div><div class='ctx'> 			"VersionRequest received from VF%d (vers %d) to PF (vers %d)\n",</div><div class='ctx'> 			vf_nr, vf_compat_ver, ADF_PFVF_COMPAT_THIS_VERSION);</div><div class='ctx'> </div><div class='del'>-		if (vf_compat_ver == 0)</div><div class='del'>-			compat = ADF_PF2VF_VF_INCOMPATIBLE;</div><div class='del'>-		else if (vf_compat_ver &lt;= ADF_PFVF_COMPAT_THIS_VERSION)</div><div class='del'>-			compat = ADF_PF2VF_VF_COMPATIBLE;</div><div class='del'>-		else</div><div class='del'>-			compat = ADF_PF2VF_VF_COMPAT_UNKNOWN;</div><div class='del'>-</div><div class='add'>+		compat = adf_vf_compat_checker(vf_compat_ver);</div><div class='ctx'> 		vf_info-&gt;vf_compat_ver = vf_compat_ver;</div><div class='ctx'> </div><div class='ctx'> 		resp-&gt;type = ADF_PF2VF_MSGTYPE_VERSION_RESP;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h b/drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h<br/>index 2be048e2287b..1a044297d873 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_pfvf_utils.h</a></div><div class='hunk'>@@ -28,4 +28,15 @@ u32 adf_pfvf_csr_msg_of(struct adf_accel_dev *accel_dev, struct pfvf_message msg</div><div class='ctx'> struct pfvf_message adf_pfvf_message_of(struct adf_accel_dev *accel_dev, u32 raw_msg,</div><div class='ctx'> 					const struct pfvf_csr_format *fmt);</div><div class='ctx'> </div><div class='add'>+static inline u8 adf_vf_compat_checker(u8 vf_compat_ver)</div><div class='add'>+{</div><div class='add'>+	if (vf_compat_ver == 0)</div><div class='add'>+		return ADF_PF2VF_VF_INCOMPATIBLE;</div><div class='add'>+</div><div class='add'>+	if (vf_compat_ver &lt;= ADF_PFVF_COMPAT_THIS_VERSION)</div><div class='add'>+		return ADF_PF2VF_VF_COMPATIBLE;</div><div class='add'>+</div><div class='add'>+	return ADF_PF2VF_VF_COMPAT_UNKNOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* ADF_PFVF_UTILS_H */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl.c b/drivers/crypto/intel/qat/qat_common/adf_rl.c<br/>index d4f2db3c53d8..346ef8bee99d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_rl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_rl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_rl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_rl.c</a></div><div class='hunk'>@@ -183,14 +183,14 @@ static enum adf_cfg_service_type srv_to_cfg_svc_type(enum adf_base_services rl_s</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * get_sla_arr_of_type() - Returns a pointer to SLA type specific array</div><div class='add'>+ * adf_rl_get_sla_arr_of_type() - Returns a pointer to SLA type specific array</div><div class='ctx'>  * @rl_data: pointer to ratelimiting data</div><div class='ctx'>  * @type: SLA type</div><div class='ctx'>  * @sla_arr: pointer to variable where requested pointer will be stored</div><div class='ctx'>  *</div><div class='ctx'>  * Return: Max number of elements allowed for the returned array</div><div class='ctx'>  */</div><div class='del'>-static u32 get_sla_arr_of_type(struct adf_rl *rl_data, enum rl_node_type type,</div><div class='add'>+u32 adf_rl_get_sla_arr_of_type(struct adf_rl *rl_data, enum rl_node_type type,</div><div class='ctx'> 			       struct rl_sla ***sla_arr)</div><div class='ctx'> {</div><div class='ctx'> 	switch (type) {</div><div class='hunk'>@@ -778,7 +778,7 @@ static void clear_sla(struct adf_rl *rl_data, struct rl_sla *sla)</div><div class='ctx'> 		rp_in_use[sla-&gt;ring_pairs_ids[i]] = false;</div><div class='ctx'> </div><div class='ctx'> 	update_budget(sla, old_cir, true);</div><div class='del'>-	get_sla_arr_of_type(rl_data, sla-&gt;type, &amp;sla_type_arr);</div><div class='add'>+	adf_rl_get_sla_arr_of_type(rl_data, sla-&gt;type, &amp;sla_type_arr);</div><div class='ctx'> 	assign_node_to_parent(rl_data-&gt;accel_dev, sla, true);</div><div class='ctx'> 	adf_rl_send_admin_delete_msg(rl_data-&gt;accel_dev, node_id, sla-&gt;type);</div><div class='ctx'> 	mark_rps_usage(sla, rl_data-&gt;rp_in_use, false);</div><div class='hunk'>@@ -875,7 +875,7 @@ static int add_update_sla(struct adf_accel_dev *accel_dev,</div><div class='ctx'> </div><div class='ctx'> 	if (!is_update) {</div><div class='ctx'> 		mark_rps_usage(sla, rl_data-&gt;rp_in_use, true);</div><div class='del'>-		get_sla_arr_of_type(rl_data, sla-&gt;type, &amp;sla_type_arr);</div><div class='add'>+		adf_rl_get_sla_arr_of_type(rl_data, sla-&gt;type, &amp;sla_type_arr);</div><div class='ctx'> 		sla_type_arr[sla-&gt;node_id] = sla;</div><div class='ctx'> 		rl_data-&gt;sla[sla-&gt;sla_id] = sla;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1065,7 +1065,7 @@ void adf_rl_remove_sla_all(struct adf_accel_dev *accel_dev, bool incl_default)</div><div class='ctx'> </div><div class='ctx'> 	/* Unregister and remove all SLAs */</div><div class='ctx'> 	for (j = RL_LEAF; j &gt;= end_type; j--) {</div><div class='del'>-		max_id = get_sla_arr_of_type(rl_data, j, &amp;sla_type_arr);</div><div class='add'>+		max_id = adf_rl_get_sla_arr_of_type(rl_data, j, &amp;sla_type_arr);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; max_id; i++) {</div><div class='ctx'> 			if (!sla_type_arr[i])</div><div class='hunk'>@@ -1125,7 +1125,7 @@ int adf_rl_start(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((fw_caps &amp; RL_CAPABILITY_MASK) != RL_CAPABILITY_VALUE) {</div><div class='del'>-		dev_info(&amp;GET_DEV(accel_dev), "not supported\n");</div><div class='add'>+		dev_info(&amp;GET_DEV(accel_dev), "feature not supported by FW\n");</div><div class='ctx'> 		ret = -EOPNOTSUPP;</div><div class='ctx'> 		goto ret_free;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl.h b/drivers/crypto/intel/qat/qat_common/adf_rl.h<br/>index 269c6656fb90..bfe750ea0e83 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_rl.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_rl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_rl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_rl.h</a></div><div class='hunk'>@@ -151,6 +151,8 @@ struct rl_sla {</div><div class='ctx'> 	u16 ring_pairs_cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+u32 adf_rl_get_sla_arr_of_type(struct adf_rl *rl_data, enum rl_node_type type,</div><div class='add'>+			       struct rl_sla ***sla_arr);</div><div class='ctx'> int adf_rl_add_sla(struct adf_accel_dev *accel_dev,</div><div class='ctx'> 		   struct adf_rl_sla_input_data *sla_in);</div><div class='ctx'> int adf_rl_update_sla(struct adf_accel_dev *accel_dev,</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_sriov.c b/drivers/crypto/intel/qat/qat_common/adf_sriov.c<br/>index 87a70c00c41e..8d645e7e04aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_sriov.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_sriov.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_sriov.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_sriov.c</a></div><div class='hunk'>@@ -26,10 +26,12 @@ static void adf_iov_send_resp(struct work_struct *work)</div><div class='ctx'> 	u32 vf_nr = vf_info-&gt;vf_nr;</div><div class='ctx'> 	bool ret;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;vf_info-&gt;pfvf_mig_lock);</div><div class='ctx'> 	ret = adf_recv_and_handle_vf2pf_msg(accel_dev, vf_nr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		/* re-enable interrupt on PF from this VF */</div><div class='ctx'> 		adf_enable_vf2pf_interrupts(accel_dev, 1 &lt;&lt; vf_nr);</div><div class='add'>+	mutex_unlock(&amp;vf_info-&gt;pfvf_mig_lock);</div><div class='ctx'> </div><div class='ctx'> 	kfree(pf2vf_resp);</div><div class='ctx'> }</div><div class='hunk'>@@ -62,6 +64,7 @@ static int adf_enable_sriov(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 		vf_info-&gt;vf_nr = i;</div><div class='ctx'> </div><div class='ctx'> 		mutex_init(&amp;vf_info-&gt;pf2vf_lock);</div><div class='add'>+		mutex_init(&amp;vf_info-&gt;pfvf_mig_lock);</div><div class='ctx'> 		ratelimit_state_init(&amp;vf_info-&gt;vf2pf_ratelimit,</div><div class='ctx'> 				     ADF_VF2PF_RATELIMIT_INTERVAL,</div><div class='ctx'> 				     ADF_VF2PF_RATELIMIT_BURST);</div><div class='hunk'>@@ -138,8 +141,10 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 	if (hw_data-&gt;configure_iov_threads)</div><div class='ctx'> 		hw_data-&gt;configure_iov_threads(accel_dev, false);</div><div class='ctx'> </div><div class='del'>-	for (i = 0, vf = accel_dev-&gt;pf.vf_info; i &lt; totalvfs; i++, vf++)</div><div class='add'>+	for (i = 0, vf = accel_dev-&gt;pf.vf_info; i &lt; totalvfs; i++, vf++) {</div><div class='ctx'> 		mutex_destroy(&amp;vf-&gt;pf2vf_lock);</div><div class='add'>+		mutex_destroy(&amp;vf-&gt;pfvf_mig_lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(ADF_STATUS_RESTARTING, &amp;accel_dev-&gt;status)) {</div><div class='ctx'> 		kfree(accel_dev-&gt;pf.vf_info);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_telemetry.c b/drivers/crypto/intel/qat/qat_common/adf_telemetry.c<br/>index 2ff714d11bd2..74fb0c2ed241 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_telemetry.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_telemetry.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_telemetry.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_telemetry.c</a></div><div class='hunk'>@@ -41,6 +41,20 @@ static int validate_tl_data(struct adf_tl_hw_data *tl_data)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int validate_tl_slice_counters(struct icp_qat_fw_init_admin_slice_cnt *slice_count,</div><div class='add'>+				      u8 max_slices_per_type)</div><div class='add'>+{</div><div class='add'>+	u8 *sl_counter = (u8 *)slice_count;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ADF_TL_SL_CNT_COUNT; i++) {</div><div class='add'>+		if (sl_counter[i] &gt; max_slices_per_type)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int adf_tl_alloc_mem(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_tl_hw_data *tl_data = &amp;GET_TL_DATA(accel_dev);</div><div class='hunk'>@@ -214,6 +228,13 @@ int adf_tl_run(struct adf_accel_dev *accel_dev, int state)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = validate_tl_slice_counters(&amp;telemetry-&gt;slice_cnt, tl_data-&gt;max_sl_cnt);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "invalid value returned by FW\n");</div><div class='add'>+		adf_send_admin_tl_stop(accel_dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	telemetry-&gt;hbuffs = state;</div><div class='ctx'> 	atomic_set(&amp;telemetry-&gt;state, state);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_telemetry.h b/drivers/crypto/intel/qat/qat_common/adf_telemetry.h<br/>index 9be81cd3b886..e54a406cc1b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_telemetry.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_telemetry.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_telemetry.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_telemetry.h</a></div><div class='hunk'>@@ -40,6 +40,7 @@ struct adf_tl_hw_data {</div><div class='ctx'> 	u8 num_dev_counters;</div><div class='ctx'> 	u8 num_rp_counters;</div><div class='ctx'> 	u8 max_rp;</div><div class='add'>+	u8 max_sl_cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct adf_telemetry {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_transport.c b/drivers/crypto/intel/qat/qat_common/adf_transport.c<br/>index 630d0483c4e0..1efdf46490f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_transport.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/adf_transport.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_transport.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/adf_transport.c</a></div><div class='hunk'>@@ -474,7 +474,6 @@ err:</div><div class='ctx'> int adf_init_etr_data(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_etr_data *etr_data;</div><div class='del'>-	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='ctx'> 	void __iomem *csr_addr;</div><div class='ctx'> 	u32 size;</div><div class='ctx'> 	u32 num_banks = 0;</div><div class='hunk'>@@ -495,8 +494,7 @@ int adf_init_etr_data(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	accel_dev-&gt;transport = etr_data;</div><div class='del'>-	i = hw_data-&gt;get_etr_bar_id(hw_data);</div><div class='del'>-	csr_addr = accel_dev-&gt;accel_pci_dev.pci_bars[i].virt_addr;</div><div class='add'>+	csr_addr = adf_get_etr_base(accel_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* accel_dev-&gt;debugfs_dir should always be non-NULL here */</div><div class='ctx'> 	etr_data-&gt;debug = debugfs_create_dir("transport",</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c b/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c<br/>index 4128200a9032..85c682e248fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_asym_algs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/qat_asym_algs.c</a></div><div class='hunk'>@@ -110,6 +110,8 @@ struct qat_dh_ctx {</div><div class='ctx'> 	unsigned int p_size;</div><div class='ctx'> 	bool g2;</div><div class='ctx'> 	struct qat_crypto_instance *inst;</div><div class='add'>+	struct crypto_kpp *ftfm;</div><div class='add'>+	bool fallback;</div><div class='ctx'> } __packed __aligned(64);</div><div class='ctx'> </div><div class='ctx'> struct qat_asym_request {</div><div class='hunk'>@@ -381,6 +383,36 @@ unmap_src:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qat_dh_generate_public_key(struct kpp_request *req)</div><div class='add'>+{</div><div class='add'>+	struct kpp_request *nreq = kpp_request_ctx(req);</div><div class='add'>+	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);</div><div class='add'>+	struct qat_dh_ctx *ctx = kpp_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback) {</div><div class='add'>+		memcpy(nreq, req, sizeof(*req));</div><div class='add'>+		kpp_request_set_tfm(nreq, ctx-&gt;ftfm);</div><div class='add'>+		return crypto_kpp_generate_public_key(nreq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return qat_dh_compute_value(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qat_dh_compute_shared_secret(struct kpp_request *req)</div><div class='add'>+{</div><div class='add'>+	struct kpp_request *nreq = kpp_request_ctx(req);</div><div class='add'>+	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);</div><div class='add'>+	struct qat_dh_ctx *ctx = kpp_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback) {</div><div class='add'>+		memcpy(nreq, req, sizeof(*req));</div><div class='add'>+		kpp_request_set_tfm(nreq, ctx-&gt;ftfm);</div><div class='add'>+		return crypto_kpp_compute_shared_secret(nreq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return qat_dh_compute_value(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int qat_dh_check_params_length(unsigned int p_len)</div><div class='ctx'> {</div><div class='ctx'> 	switch (p_len) {</div><div class='hunk'>@@ -398,9 +430,6 @@ static int qat_dh_set_params(struct qat_dh_ctx *ctx, struct dh *params)</div><div class='ctx'> 	struct qat_crypto_instance *inst = ctx-&gt;inst;</div><div class='ctx'> 	struct device *dev = &amp;GET_DEV(inst-&gt;accel_dev);</div><div class='ctx'> </div><div class='del'>-	if (qat_dh_check_params_length(params-&gt;p_size &lt;&lt; 3))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;p_size = params-&gt;p_size;</div><div class='ctx'> 	ctx-&gt;p = dma_alloc_coherent(dev, ctx-&gt;p_size, &amp;ctx-&gt;dma_p, GFP_KERNEL);</div><div class='ctx'> 	if (!ctx-&gt;p)</div><div class='hunk'>@@ -454,6 +483,13 @@ static int qat_dh_set_secret(struct crypto_kpp *tfm, const void *buf,</div><div class='ctx'> 	if (crypto_dh_decode_key(buf, len, &amp;params) &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (qat_dh_check_params_length(params.p_size &lt;&lt; 3)) {</div><div class='add'>+		ctx-&gt;fallback = true;</div><div class='add'>+		return crypto_kpp_set_secret(ctx-&gt;ftfm, buf, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;fallback = false;</div><div class='add'>+</div><div class='ctx'> 	/* Free old secret if any */</div><div class='ctx'> 	qat_dh_clear_ctx(dev, ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -481,6 +517,9 @@ static unsigned int qat_dh_max_size(struct crypto_kpp *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct qat_dh_ctx *ctx = kpp_tfm_ctx(tfm);</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return crypto_kpp_maxsize(ctx-&gt;ftfm);</div><div class='add'>+</div><div class='ctx'> 	return ctx-&gt;p_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -489,11 +528,22 @@ static int qat_dh_init_tfm(struct crypto_kpp *tfm)</div><div class='ctx'> 	struct qat_dh_ctx *ctx = kpp_tfm_ctx(tfm);</div><div class='ctx'> 	struct qat_crypto_instance *inst =</div><div class='ctx'> 			qat_crypto_get_instance_node(numa_node_id());</div><div class='add'>+	const char *alg = kpp_alg_name(tfm);</div><div class='add'>+	unsigned int reqsize;</div><div class='ctx'> </div><div class='ctx'> 	if (!inst)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	kpp_set_reqsize(tfm, sizeof(struct qat_asym_request) + 64);</div><div class='add'>+	ctx-&gt;ftfm = crypto_alloc_kpp(alg, 0, CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+	if (IS_ERR(ctx-&gt;ftfm))</div><div class='add'>+		return PTR_ERR(ctx-&gt;ftfm);</div><div class='add'>+</div><div class='add'>+	crypto_kpp_set_flags(ctx-&gt;ftfm, crypto_kpp_get_flags(tfm));</div><div class='add'>+</div><div class='add'>+	reqsize = max(sizeof(struct qat_asym_request) + 64,</div><div class='add'>+		      sizeof(struct kpp_request) + crypto_kpp_reqsize(ctx-&gt;ftfm));</div><div class='add'>+</div><div class='add'>+	kpp_set_reqsize(tfm, reqsize);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;p_size = 0;</div><div class='ctx'> 	ctx-&gt;g2 = false;</div><div class='hunk'>@@ -506,6 +556,9 @@ static void qat_dh_exit_tfm(struct crypto_kpp *tfm)</div><div class='ctx'> 	struct qat_dh_ctx *ctx = kpp_tfm_ctx(tfm);</div><div class='ctx'> 	struct device *dev = &amp;GET_DEV(ctx-&gt;inst-&gt;accel_dev);</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;ftfm)</div><div class='add'>+		crypto_free_kpp(ctx-&gt;ftfm);</div><div class='add'>+</div><div class='ctx'> 	qat_dh_clear_ctx(dev, ctx);</div><div class='ctx'> 	qat_crypto_put_instance(ctx-&gt;inst);</div><div class='ctx'> }</div><div class='hunk'>@@ -1265,8 +1318,8 @@ static struct akcipher_alg rsa = {</div><div class='ctx'> </div><div class='ctx'> static struct kpp_alg dh = {</div><div class='ctx'> 	.set_secret = qat_dh_set_secret,</div><div class='del'>-	.generate_public_key = qat_dh_compute_value,</div><div class='del'>-	.compute_shared_secret = qat_dh_compute_value,</div><div class='add'>+	.generate_public_key = qat_dh_generate_public_key,</div><div class='add'>+	.compute_shared_secret = qat_dh_compute_shared_secret,</div><div class='ctx'> 	.max_size = qat_dh_max_size,</div><div class='ctx'> 	.init = qat_dh_init_tfm,</div><div class='ctx'> 	.exit = qat_dh_exit_tfm,</div><div class='hunk'>@@ -1276,6 +1329,7 @@ static struct kpp_alg dh = {</div><div class='ctx'> 		.cra_priority = 1000,</div><div class='ctx'> 		.cra_module = THIS_MODULE,</div><div class='ctx'> 		.cra_ctxsize = sizeof(struct qat_dh_ctx),</div><div class='add'>+		.cra_flags = CRYPTO_ALG_NEED_FALLBACK,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_bl.c b/drivers/crypto/intel/qat/qat_common/qat_bl.c<br/>index 76baed0a76c0..338acf29c487 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_bl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_bl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_bl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/qat_bl.c</a></div><div class='hunk'>@@ -81,7 +81,8 @@ static int __qat_bl_sgl_to_bufl(struct adf_accel_dev *accel_dev,</div><div class='ctx'> 		if (unlikely(!bufl))</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	} else {</div><div class='del'>-		bufl = &amp;buf-&gt;sgl_src.sgl_hdr;</div><div class='add'>+		bufl = container_of(&amp;buf-&gt;sgl_src.sgl_hdr,</div><div class='add'>+				    struct qat_alg_buf_list, hdr);</div><div class='ctx'> 		memset(bufl, 0, sizeof(struct qat_alg_buf_list));</div><div class='ctx'> 		buf-&gt;sgl_src_valid = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -139,7 +140,8 @@ static int __qat_bl_sgl_to_bufl(struct adf_accel_dev *accel_dev,</div><div class='ctx'> 			if (unlikely(!buflout))</div><div class='ctx'> 				goto err_in;</div><div class='ctx'> 		} else {</div><div class='del'>-			buflout = &amp;buf-&gt;sgl_dst.sgl_hdr;</div><div class='add'>+			buflout = container_of(&amp;buf-&gt;sgl_dst.sgl_hdr,</div><div class='add'>+					       struct qat_alg_buf_list, hdr);</div><div class='ctx'> 			memset(buflout, 0, sizeof(struct qat_alg_buf_list));</div><div class='ctx'> 			buf-&gt;sgl_dst_valid = true;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_bl.h b/drivers/crypto/intel/qat/qat_common/qat_bl.h<br/>index d87e4f35ac39..85bc32a9ec0e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_bl.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_common/qat_bl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_bl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/qat_bl.h</a></div><div class='hunk'>@@ -15,14 +15,17 @@ struct qat_alg_buf {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct qat_alg_buf_list {</div><div class='del'>-	u64 resrvd;</div><div class='del'>-	u32 num_bufs;</div><div class='del'>-	u32 num_mapped_bufs;</div><div class='add'>+	/* New members must be added within the __struct_group() macro below. */</div><div class='add'>+	__struct_group(qat_alg_buf_list_hdr, hdr, __packed,</div><div class='add'>+		u64 resrvd;</div><div class='add'>+		u32 num_bufs;</div><div class='add'>+		u32 num_mapped_bufs;</div><div class='add'>+	);</div><div class='ctx'> 	struct qat_alg_buf buffers[];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct qat_alg_fixed_buf_list {</div><div class='del'>-	struct qat_alg_buf_list sgl_hdr;</div><div class='add'>+	struct qat_alg_buf_list_hdr sgl_hdr;</div><div class='ctx'> 	struct qat_alg_buf descriptors[QAT_MAX_BUFF_DESC];</div><div class='ctx'> } __packed __aligned(64);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_mig_dev.c b/drivers/crypto/intel/qat/qat_common/qat_mig_dev.c<br/>new file mode 100644<br/>index 000000000000..892c2283a50e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_mig_dev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_common/qat_mig_dev.c</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation */</div><div class='add'>+#include &lt;linux/dev_printk.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/qat/qat_mig_dev.h&gt;</div><div class='add'>+#include "adf_accel_devices.h"</div><div class='add'>+#include "adf_common_drv.h"</div><div class='add'>+</div><div class='add'>+struct qat_mig_dev *qat_vfmig_create(struct pci_dev *pdev, int vf_id)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev;</div><div class='add'>+	struct qat_migdev_ops *ops;</div><div class='add'>+	struct qat_mig_dev *mdev;</div><div class='add'>+</div><div class='add'>+	accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+	if (!accel_dev)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+</div><div class='add'>+	ops = GET_VFMIG_OPS(accel_dev);</div><div class='add'>+	if (!ops || !ops-&gt;init || !ops-&gt;cleanup || !ops-&gt;reset || !ops-&gt;open ||</div><div class='add'>+	    !ops-&gt;close || !ops-&gt;suspend || !ops-&gt;resume || !ops-&gt;save_state ||</div><div class='add'>+	    !ops-&gt;load_state || !ops-&gt;save_setup || !ops-&gt;load_setup)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	mdev = kmalloc(sizeof(*mdev), GFP_KERNEL);</div><div class='add'>+	if (!mdev)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	mdev-&gt;vf_id = vf_id;</div><div class='add'>+	mdev-&gt;parent_accel_dev = accel_dev;</div><div class='add'>+</div><div class='add'>+	return mdev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_create);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_init(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;init(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_init);</div><div class='add'>+</div><div class='add'>+void qat_vfmig_cleanup(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;cleanup(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_cleanup);</div><div class='add'>+</div><div class='add'>+void qat_vfmig_reset(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;reset(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_reset);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_open(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;open(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_open);</div><div class='add'>+</div><div class='add'>+void qat_vfmig_close(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	GET_VFMIG_OPS(accel_dev)-&gt;close(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_close);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_suspend(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;suspend(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_suspend);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_resume(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;resume(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_resume);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_save_state(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;save_state(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_save_state);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_save_setup(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;save_setup(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_save_setup);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_load_state(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;load_state(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_load_state);</div><div class='add'>+</div><div class='add'>+int qat_vfmig_load_setup(struct qat_mig_dev *mdev, int size)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = mdev-&gt;parent_accel_dev;</div><div class='add'>+</div><div class='add'>+	return GET_VFMIG_OPS(accel_dev)-&gt;load_setup(mdev, size);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_load_setup);</div><div class='add'>+</div><div class='add'>+void qat_vfmig_destroy(struct qat_mig_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	kfree(mdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qat_vfmig_destroy);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c<br/>index af14090cc4be..6e24d57e6b98 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='ctx'> #include "adf_dh895xcc_hw_data.h"</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c<br/>index 70e56cc16ece..f4ee4c2e00da 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_dc.h&gt;</div><div class='add'>+#include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_pfvf_vf_msg.h&gt;</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/cn10k_cpt.c b/drivers/crypto/marvell/octeontx2/cn10k_cpt.c<br/>index 79b4e74804f6..6bfc59e67747 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/cn10k_cpt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/marvell/octeontx2/cn10k_cpt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/cn10k_cpt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/marvell/octeontx2/cn10k_cpt.c</a></div><div class='hunk'>@@ -138,6 +138,10 @@ int cn10k_cpt_hw_ctx_init(struct pci_dev *pdev,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	cptr_dma = dma_map_single(&amp;pdev-&gt;dev, hctx, CN10K_CPT_HW_CTX_SIZE,</div><div class='ctx'> 				  DMA_BIDIRECTIONAL);</div><div class='add'>+	if (dma_mapping_error(&amp;pdev-&gt;dev, cptr_dma)) {</div><div class='add'>+		kfree(hctx);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	cn10k_cpt_hw_ctx_set(hctx, 1);</div><div class='ctx'> 	er_ctx-&gt;hw_ctx = hctx;</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c b/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c<br/>index d2b8d26db968..215a1a8ba7e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c</a></div><div class='hunk'>@@ -4,7 +4,8 @@</div><div class='ctx'> #include "otx2_cpt_devlink.h"</div><div class='ctx'> </div><div class='ctx'> static int otx2_cpt_dl_egrp_create(struct devlink *dl, u32 id,</div><div class='del'>-				   struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);</div><div class='ctx'> 	struct otx2_cptpf_dev *cptpf = cpt_dl-&gt;cptpf;</div><div class='hunk'>@@ -13,7 +14,8 @@ static int otx2_cpt_dl_egrp_create(struct devlink *dl, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int otx2_cpt_dl_egrp_delete(struct devlink *dl, u32 id,</div><div class='del'>-				   struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);</div><div class='ctx'> 	struct otx2_cptpf_dev *cptpf = cpt_dl-&gt;cptpf;</div><div class='hunk'>@@ -45,7 +47,8 @@ static int otx2_cpt_dl_t106_mode_get(struct devlink *dl, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int otx2_cpt_dl_t106_mode_set(struct devlink *dl, u32 id,</div><div class='del'>-				     struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);</div><div class='ctx'> 	struct otx2_cptpf_dev *cptpf = cpt_dl-&gt;cptpf;</div><div class='head'>diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c<br/>index 2b3ebe0db3a6..057d73c370b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/mxs-dcp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/mxs-dcp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/mxs-dcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/mxs-dcp.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/stmp_device.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;soc/fsl/dcp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='hunk'>@@ -101,6 +102,7 @@ struct dcp_async_ctx {</div><div class='ctx'> 	struct crypto_skcipher		*fallback;</div><div class='ctx'> 	unsigned int			key_len;</div><div class='ctx'> 	uint8_t				key[AES_KEYSIZE_128];</div><div class='add'>+	bool				key_referenced;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dcp_aes_req_ctx {</div><div class='hunk'>@@ -155,6 +157,7 @@ static struct dcp *global_sdcp;</div><div class='ctx'> #define MXS_DCP_CONTROL0_HASH_TERM		(1 &lt;&lt; 13)</div><div class='ctx'> #define MXS_DCP_CONTROL0_HASH_INIT		(1 &lt;&lt; 12)</div><div class='ctx'> #define MXS_DCP_CONTROL0_PAYLOAD_KEY		(1 &lt;&lt; 11)</div><div class='add'>+#define MXS_DCP_CONTROL0_OTP_KEY		(1 &lt;&lt; 10)</div><div class='ctx'> #define MXS_DCP_CONTROL0_CIPHER_ENCRYPT		(1 &lt;&lt; 8)</div><div class='ctx'> #define MXS_DCP_CONTROL0_CIPHER_INIT		(1 &lt;&lt; 9)</div><div class='ctx'> #define MXS_DCP_CONTROL0_ENABLE_HASH		(1 &lt;&lt; 6)</div><div class='hunk'>@@ -168,6 +171,8 @@ static struct dcp *global_sdcp;</div><div class='ctx'> #define MXS_DCP_CONTROL1_CIPHER_MODE_ECB	(0 &lt;&lt; 4)</div><div class='ctx'> #define MXS_DCP_CONTROL1_CIPHER_SELECT_AES128	(0 &lt;&lt; 0)</div><div class='ctx'> </div><div class='add'>+#define MXS_DCP_CONTROL1_KEY_SELECT_SHIFT	8</div><div class='add'>+</div><div class='ctx'> static int mxs_dcp_start_dma(struct dcp_async_ctx *actx)</div><div class='ctx'> {</div><div class='ctx'> 	int dma_err;</div><div class='hunk'>@@ -224,13 +229,16 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,</div><div class='ctx'> 	struct dcp *sdcp = global_sdcp;</div><div class='ctx'> 	struct dcp_dma_desc *desc = &amp;sdcp-&gt;coh-&gt;desc[actx-&gt;chan];</div><div class='ctx'> 	struct dcp_aes_req_ctx *rctx = skcipher_request_ctx(req);</div><div class='add'>+	bool key_referenced = actx-&gt;key_referenced;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	key_phys = dma_map_single(sdcp-&gt;dev, sdcp-&gt;coh-&gt;aes_key,</div><div class='del'>-				  2 * AES_KEYSIZE_128, DMA_TO_DEVICE);</div><div class='del'>-	ret = dma_mapping_error(sdcp-&gt;dev, key_phys);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (!key_referenced) {</div><div class='add'>+		key_phys = dma_map_single(sdcp-&gt;dev, sdcp-&gt;coh-&gt;aes_key,</div><div class='add'>+					  2 * AES_KEYSIZE_128, DMA_TO_DEVICE);</div><div class='add'>+		ret = dma_mapping_error(sdcp-&gt;dev, key_phys);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	src_phys = dma_map_single(sdcp-&gt;dev, sdcp-&gt;coh-&gt;aes_in_buf,</div><div class='ctx'> 				  DCP_BUF_SZ, DMA_TO_DEVICE);</div><div class='hunk'>@@ -255,8 +263,12 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,</div><div class='ctx'> 		    MXS_DCP_CONTROL0_INTERRUPT |</div><div class='ctx'> 		    MXS_DCP_CONTROL0_ENABLE_CIPHER;</div><div class='ctx'> </div><div class='del'>-	/* Payload contains the key. */</div><div class='del'>-	desc-&gt;control0 |= MXS_DCP_CONTROL0_PAYLOAD_KEY;</div><div class='add'>+	if (key_referenced)</div><div class='add'>+		/* Set OTP key bit to select the key via KEY_SELECT. */</div><div class='add'>+		desc-&gt;control0 |= MXS_DCP_CONTROL0_OTP_KEY;</div><div class='add'>+	else</div><div class='add'>+		/* Payload contains the key. */</div><div class='add'>+		desc-&gt;control0 |= MXS_DCP_CONTROL0_PAYLOAD_KEY;</div><div class='ctx'> </div><div class='ctx'> 	if (rctx-&gt;enc)</div><div class='ctx'> 		desc-&gt;control0 |= MXS_DCP_CONTROL0_CIPHER_ENCRYPT;</div><div class='hunk'>@@ -270,6 +282,9 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,</div><div class='ctx'> 	else</div><div class='ctx'> 		desc-&gt;control1 |= MXS_DCP_CONTROL1_CIPHER_MODE_CBC;</div><div class='ctx'> </div><div class='add'>+	if (key_referenced)</div><div class='add'>+		desc-&gt;control1 |= sdcp-&gt;coh-&gt;aes_key[0] &lt;&lt; MXS_DCP_CONTROL1_KEY_SELECT_SHIFT;</div><div class='add'>+</div><div class='ctx'> 	desc-&gt;next_cmd_addr = 0;</div><div class='ctx'> 	desc-&gt;source = src_phys;</div><div class='ctx'> 	desc-&gt;destination = dst_phys;</div><div class='hunk'>@@ -284,9 +299,9 @@ aes_done_run:</div><div class='ctx'> err_dst:</div><div class='ctx'> 	dma_unmap_single(sdcp-&gt;dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE);</div><div class='ctx'> err_src:</div><div class='del'>-	dma_unmap_single(sdcp-&gt;dev, key_phys, 2 * AES_KEYSIZE_128,</div><div class='del'>-			 DMA_TO_DEVICE);</div><div class='del'>-</div><div class='add'>+	if (!key_referenced)</div><div class='add'>+		dma_unmap_single(sdcp-&gt;dev, key_phys, 2 * AES_KEYSIZE_128,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -453,7 +468,7 @@ static int mxs_dcp_aes_enqueue(struct skcipher_request *req, int enc, int ecb)</div><div class='ctx'> 	struct dcp_aes_req_ctx *rctx = skcipher_request_ctx(req);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(actx-&gt;key_len != AES_KEYSIZE_128))</div><div class='add'>+	if (unlikely(actx-&gt;key_len != AES_KEYSIZE_128 &amp;&amp; !actx-&gt;key_referenced))</div><div class='ctx'> 		return mxs_dcp_block_fallback(req, enc);</div><div class='ctx'> </div><div class='ctx'> 	rctx-&gt;enc = enc;</div><div class='hunk'>@@ -500,6 +515,7 @@ static int mxs_dcp_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='ctx'> 	 * there can still be an operation in progress.</div><div class='ctx'> 	 */</div><div class='ctx'> 	actx-&gt;key_len = len;</div><div class='add'>+	actx-&gt;key_referenced = false;</div><div class='ctx'> 	if (len == AES_KEYSIZE_128) {</div><div class='ctx'> 		memcpy(actx-&gt;key, key, len);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -516,6 +532,32 @@ static int mxs_dcp_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='ctx'> 	return crypto_skcipher_setkey(actx-&gt;fallback, key, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mxs_dcp_aes_setrefkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='add'>+				 unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct dcp_async_ctx *actx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (len != DCP_PAES_KEYSIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (key[0]) {</div><div class='add'>+	case DCP_PAES_KEY_SLOT0:</div><div class='add'>+	case DCP_PAES_KEY_SLOT1:</div><div class='add'>+	case DCP_PAES_KEY_SLOT2:</div><div class='add'>+	case DCP_PAES_KEY_SLOT3:</div><div class='add'>+	case DCP_PAES_KEY_UNIQUE:</div><div class='add'>+	case DCP_PAES_KEY_OTP:</div><div class='add'>+		memcpy(actx-&gt;key, key, len);</div><div class='add'>+		actx-&gt;key_len = len;</div><div class='add'>+		actx-&gt;key_referenced = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mxs_dcp_aes_fallback_init_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	const char *name = crypto_tfm_alg_name(crypto_skcipher_tfm(tfm));</div><div class='hunk'>@@ -539,6 +581,13 @@ static void mxs_dcp_aes_fallback_exit_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> 	crypto_free_skcipher(actx-&gt;fallback);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mxs_dcp_paes_init_tfm(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	crypto_skcipher_set_reqsize(tfm, sizeof(struct dcp_aes_req_ctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Hashing (SHA1/SHA256)</div><div class='ctx'>  */</div><div class='hunk'>@@ -889,6 +938,39 @@ static struct skcipher_alg dcp_aes_algs[] = {</div><div class='ctx'> 		.ivsize			= AES_BLOCK_SIZE,</div><div class='ctx'> 		.init			= mxs_dcp_aes_fallback_init_tfm,</div><div class='ctx'> 		.exit			= mxs_dcp_aes_fallback_exit_tfm,</div><div class='add'>+	}, {</div><div class='add'>+		.base.cra_name		= "ecb(paes)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-paes-dcp",</div><div class='add'>+		.base.cra_priority	= 401,</div><div class='add'>+		.base.cra_alignmask	= 15,</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_ASYNC | CRYPTO_ALG_INTERNAL,</div><div class='add'>+		.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct dcp_async_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= DCP_PAES_KEYSIZE,</div><div class='add'>+		.max_keysize		= DCP_PAES_KEYSIZE,</div><div class='add'>+		.setkey			= mxs_dcp_aes_setrefkey,</div><div class='add'>+		.encrypt		= mxs_dcp_aes_ecb_encrypt,</div><div class='add'>+		.decrypt		= mxs_dcp_aes_ecb_decrypt,</div><div class='add'>+		.init			= mxs_dcp_paes_init_tfm,</div><div class='add'>+	}, {</div><div class='add'>+		.base.cra_name		= "cbc(paes)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-paes-dcp",</div><div class='add'>+		.base.cra_priority	= 401,</div><div class='add'>+		.base.cra_alignmask	= 15,</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_ASYNC | CRYPTO_ALG_INTERNAL,</div><div class='add'>+		.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct dcp_async_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= DCP_PAES_KEYSIZE,</div><div class='add'>+		.max_keysize		= DCP_PAES_KEYSIZE,</div><div class='add'>+		.setkey			= mxs_dcp_aes_setrefkey,</div><div class='add'>+		.encrypt		= mxs_dcp_aes_cbc_encrypt,</div><div class='add'>+		.decrypt		= mxs_dcp_aes_cbc_decrypt,</div><div class='add'>+		.ivsize			= AES_BLOCK_SIZE,</div><div class='add'>+		.init			= mxs_dcp_paes_init_tfm,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/nx/nx-842.c b/drivers/crypto/nx/nx-842.c<br/>index 2ab90ec10e61..82214cde2bcd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-842.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/nx/nx-842.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-842.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/nx/nx-842.c</a></div><div class='hunk'>@@ -251,7 +251,9 @@ int nx842_crypto_compress(struct crypto_tfm *tfm,</div><div class='ctx'> 			  u8 *dst, unsigned int *dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct nx842_crypto_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-	struct nx842_crypto_header *hdr = &amp;ctx-&gt;header;</div><div class='add'>+	struct nx842_crypto_header *hdr =</div><div class='add'>+				container_of(&amp;ctx-&gt;header,</div><div class='add'>+					     struct nx842_crypto_header, hdr);</div><div class='ctx'> 	struct nx842_crypto_param p;</div><div class='ctx'> 	struct nx842_constraints c = *ctx-&gt;driver-&gt;constraints;</div><div class='ctx'> 	unsigned int groups, hdrsize, h;</div><div class='hunk'>@@ -490,7 +492,7 @@ int nx842_crypto_decompress(struct crypto_tfm *tfm,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(&amp;ctx-&gt;header, src, hdr_len);</div><div class='del'>-	hdr = &amp;ctx-&gt;header;</div><div class='add'>+	hdr = container_of(&amp;ctx-&gt;header, struct nx842_crypto_header, hdr);</div><div class='ctx'> </div><div class='ctx'> 	for (n = 0; n &lt; hdr-&gt;groups; n++) {</div><div class='ctx'> 		/* ignore applies to last group */</div><div class='head'>diff --git a/drivers/crypto/nx/nx-842.h b/drivers/crypto/nx/nx-842.h<br/>index 7590bfb24d79..25fa70b2112c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-842.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/nx/nx-842.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-842.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/nx/nx-842.h</a></div><div class='hunk'>@@ -157,9 +157,11 @@ struct nx842_crypto_header_group {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct nx842_crypto_header {</div><div class='del'>-	__be16 magic;		/* NX842_CRYPTO_MAGIC */</div><div class='del'>-	__be16 ignore;		/* decompressed end bytes to ignore */</div><div class='del'>-	u8 groups;		/* total groups in this header */</div><div class='add'>+	struct_group_tagged(nx842_crypto_header_hdr, hdr,</div><div class='add'>+		__be16 magic;		/* NX842_CRYPTO_MAGIC */</div><div class='add'>+		__be16 ignore;		/* decompressed end bytes to ignore */</div><div class='add'>+		u8 groups;		/* total groups in this header */</div><div class='add'>+	);</div><div class='ctx'> 	struct nx842_crypto_header_group group[];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +173,7 @@ struct nx842_crypto_ctx {</div><div class='ctx'> 	u8 *wmem;</div><div class='ctx'> 	u8 *sbounce, *dbounce;</div><div class='ctx'> </div><div class='del'>-	struct nx842_crypto_header header;</div><div class='add'>+	struct nx842_crypto_header_hdr header;</div><div class='ctx'> 	struct nx842_crypto_header_group group[NX842_CRYPTO_GROUP_MAX];</div><div class='ctx'> </div><div class='ctx'> 	struct nx842_driver *driver;</div><div class='head'>diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.c<br/>index 3423b5cde1c7..96d4af5d48a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/sahara.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/sahara.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/sahara.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/sahara.c</a></div><div class='hunk'>@@ -559,7 +559,7 @@ static int sahara_aes_process(struct skcipher_request *req)</div><div class='ctx'> 	struct sahara_ctx *ctx;</div><div class='ctx'> 	struct sahara_aes_reqctx *rctx;</div><div class='ctx'> 	int ret;</div><div class='del'>-	unsigned long timeout;</div><div class='add'>+	unsigned long time_left;</div><div class='ctx'> </div><div class='ctx'> 	/* Request is ready to be dispatched by the device */</div><div class='ctx'> 	dev_dbg(dev-&gt;device,</div><div class='hunk'>@@ -597,15 +597,15 @@ static int sahara_aes_process(struct skcipher_request *req)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	timeout = wait_for_completion_timeout(&amp;dev-&gt;dma_completion,</div><div class='del'>-				msecs_to_jiffies(SAHARA_TIMEOUT_MS));</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;dev-&gt;dma_completion,</div><div class='add'>+						msecs_to_jiffies(SAHARA_TIMEOUT_MS));</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_sg(dev-&gt;device, dev-&gt;out_sg, dev-&gt;nb_out_sg,</div><div class='ctx'> 		DMA_FROM_DEVICE);</div><div class='ctx'> 	dma_unmap_sg(dev-&gt;device, dev-&gt;in_sg, dev-&gt;nb_in_sg,</div><div class='ctx'> 		DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-	if (!timeout) {</div><div class='add'>+	if (!time_left) {</div><div class='ctx'> 		dev_err(dev-&gt;device, "AES timeout\n");</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -931,7 +931,7 @@ static int sahara_sha_process(struct ahash_request *req)</div><div class='ctx'> 	struct sahara_dev *dev = dev_ptr;</div><div class='ctx'> 	struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='ctx'> 	int ret;</div><div class='del'>-	unsigned long timeout;</div><div class='add'>+	unsigned long time_left;</div><div class='ctx'> </div><div class='ctx'> 	ret = sahara_sha_prepare_request(req);</div><div class='ctx'> 	if (!ret)</div><div class='hunk'>@@ -963,14 +963,14 @@ static int sahara_sha_process(struct ahash_request *req)</div><div class='ctx'> </div><div class='ctx'> 	sahara_write(dev, dev-&gt;hw_phys_desc[0], SAHARA_REG_DAR);</div><div class='ctx'> </div><div class='del'>-	timeout = wait_for_completion_timeout(&amp;dev-&gt;dma_completion,</div><div class='del'>-				msecs_to_jiffies(SAHARA_TIMEOUT_MS));</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;dev-&gt;dma_completion,</div><div class='add'>+						msecs_to_jiffies(SAHARA_TIMEOUT_MS));</div><div class='ctx'> </div><div class='ctx'> 	if (rctx-&gt;sg_in_idx)</div><div class='ctx'> 		dma_unmap_sg(dev-&gt;device, dev-&gt;in_sg, dev-&gt;nb_in_sg,</div><div class='ctx'> 			     DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-	if (!timeout) {</div><div class='add'>+	if (!time_left) {</div><div class='ctx'> 		dev_err(dev-&gt;device, "SHA timeout\n");</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/crypto/starfive/Kconfig b/drivers/crypto/starfive/Kconfig<br/>index cb59357b58b2..0fe389e9f932 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/starfive/Kconfig</a></div><div class='hunk'>@@ -14,6 +14,10 @@ config CRYPTO_DEV_JH7110</div><div class='ctx'> 	select CRYPTO_RSA</div><div class='ctx'> 	select CRYPTO_AES</div><div class='ctx'> 	select CRYPTO_CCM</div><div class='add'>+	select CRYPTO_GCM</div><div class='add'>+	select CRYPTO_ECB</div><div class='add'>+	select CRYPTO_CBC</div><div class='add'>+	select CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for StarFive JH7110 crypto hardware acceleration engine.</div><div class='ctx'> 	  This module provides acceleration for public key algo,</div><div class='head'>diff --git a/drivers/crypto/starfive/jh7110-aes.c b/drivers/crypto/starfive/jh7110-aes.c<br/>index 1ac15cc4ef3c..86a1a1fa9f8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-aes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-aes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-aes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/starfive/jh7110-aes.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@ static inline int is_gcm(struct starfive_cryp_dev *cryp)</div><div class='ctx'> 	return (cryp-&gt;flags &amp; FLG_MODE_MASK) == STARFIVE_AES_MODE_GCM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int is_encrypt(struct starfive_cryp_dev *cryp)</div><div class='add'>+static inline bool is_encrypt(struct starfive_cryp_dev *cryp)</div><div class='ctx'> {</div><div class='ctx'> 	return cryp-&gt;flags &amp; FLG_ENCRYPT;</div><div class='ctx'> }</div><div class='hunk'>@@ -103,16 +103,6 @@ static void starfive_aes_aead_hw_start(struct starfive_cryp_ctx *ctx, u32 hw_mod</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void starfive_aes_set_ivlen(struct starfive_cryp_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='del'>-</div><div class='del'>-	if (is_gcm(cryp))</div><div class='del'>-		writel(GCM_AES_IV_SIZE, cryp-&gt;base + STARFIVE_AES_IVLEN);</div><div class='del'>-	else</div><div class='del'>-		writel(AES_BLOCK_SIZE, cryp-&gt;base + STARFIVE_AES_IVLEN);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void starfive_aes_set_alen(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='hunk'>@@ -261,7 +251,6 @@ static int starfive_aes_hw_init(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> </div><div class='ctx'> 	rctx-&gt;csr.aes.mode  = hw_mode;</div><div class='ctx'> 	rctx-&gt;csr.aes.cmode = !is_encrypt(cryp);</div><div class='del'>-	rctx-&gt;csr.aes.ie = 1;</div><div class='ctx'> 	rctx-&gt;csr.aes.stmode = STARFIVE_AES_MODE_XFB_1;</div><div class='ctx'> </div><div class='ctx'> 	if (cryp-&gt;side_chan) {</div><div class='hunk'>@@ -279,7 +268,7 @@ static int starfive_aes_hw_init(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> 	case STARFIVE_AES_MODE_GCM:</div><div class='ctx'> 		starfive_aes_set_alen(ctx);</div><div class='ctx'> 		starfive_aes_set_mlen(ctx);</div><div class='del'>-		starfive_aes_set_ivlen(ctx);</div><div class='add'>+		writel(GCM_AES_IV_SIZE, cryp-&gt;base + STARFIVE_AES_IVLEN);</div><div class='ctx'> 		starfive_aes_aead_hw_start(ctx, hw_mode);</div><div class='ctx'> 		starfive_aes_write_iv(ctx, (void *)cryp-&gt;req.areq-&gt;iv);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -300,52 +289,49 @@ static int starfive_aes_hw_init(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> 	return cryp-&gt;err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_aes_read_authtag(struct starfive_cryp_dev *cryp)</div><div class='add'>+static int starfive_aes_read_authtag(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	int i, start_addr;</div><div class='add'>+	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='add'>+	struct starfive_cryp_request_ctx *rctx = ctx-&gt;rctx;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (starfive_aes_wait_busy(cryp))</div><div class='ctx'> 		return dev_err_probe(cryp-&gt;dev, -ETIMEDOUT,</div><div class='ctx'> 				     "Timeout waiting for tag generation.");</div><div class='ctx'> </div><div class='del'>-	start_addr = STARFIVE_AES_NONCE0;</div><div class='del'>-</div><div class='del'>-	if (is_gcm(cryp))</div><div class='del'>-		for (i = 0; i &lt; AES_BLOCK_32; i++, start_addr += 4)</div><div class='del'>-			cryp-&gt;tag_out[i] = readl(cryp-&gt;base + start_addr);</div><div class='del'>-	else</div><div class='add'>+	if ((cryp-&gt;flags &amp; FLG_MODE_MASK) == STARFIVE_AES_MODE_GCM) {</div><div class='add'>+		cryp-&gt;tag_out[0] = readl(cryp-&gt;base + STARFIVE_AES_NONCE0);</div><div class='add'>+		cryp-&gt;tag_out[1] = readl(cryp-&gt;base + STARFIVE_AES_NONCE1);</div><div class='add'>+		cryp-&gt;tag_out[2] = readl(cryp-&gt;base + STARFIVE_AES_NONCE2);</div><div class='add'>+		cryp-&gt;tag_out[3] = readl(cryp-&gt;base + STARFIVE_AES_NONCE3);</div><div class='add'>+	} else {</div><div class='ctx'> 		for (i = 0; i &lt; AES_BLOCK_32; i++)</div><div class='ctx'> 			cryp-&gt;tag_out[i] = readl(cryp-&gt;base + STARFIVE_AES_AESDIO0R);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (is_encrypt(cryp)) {</div><div class='del'>-		scatterwalk_copychunks(cryp-&gt;tag_out, &amp;cryp-&gt;out_walk, cryp-&gt;authsize, 1);</div><div class='add'>+		scatterwalk_map_and_copy(cryp-&gt;tag_out, rctx-&gt;out_sg,</div><div class='add'>+					 cryp-&gt;total_in, cryp-&gt;authsize, 1);</div><div class='ctx'> 	} else {</div><div class='del'>-		scatterwalk_copychunks(cryp-&gt;tag_in, &amp;cryp-&gt;in_walk, cryp-&gt;authsize, 0);</div><div class='del'>-</div><div class='ctx'> 		if (crypto_memneq(cryp-&gt;tag_in, cryp-&gt;tag_out, cryp-&gt;authsize))</div><div class='del'>-			return dev_err_probe(cryp-&gt;dev, -EBADMSG, "Failed tag verification\n");</div><div class='add'>+			return -EBADMSG;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void starfive_aes_finish_req(struct starfive_cryp_dev *cryp)</div><div class='add'>+static void starfive_aes_finish_req(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	union starfive_aes_csr csr;</div><div class='add'>+	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='ctx'> 	int err = cryp-&gt;err;</div><div class='ctx'> </div><div class='ctx'> 	if (!err &amp;&amp; cryp-&gt;authsize)</div><div class='del'>-		err = starfive_aes_read_authtag(cryp);</div><div class='add'>+		err = starfive_aes_read_authtag(ctx);</div><div class='ctx'> </div><div class='ctx'> 	if (!err &amp;&amp; ((cryp-&gt;flags &amp; FLG_MODE_MASK) == STARFIVE_AES_MODE_CBC ||</div><div class='ctx'> 		     (cryp-&gt;flags &amp; FLG_MODE_MASK) == STARFIVE_AES_MODE_CTR))</div><div class='ctx'> 		starfive_aes_get_iv(cryp, (void *)cryp-&gt;req.sreq-&gt;iv);</div><div class='ctx'> </div><div class='del'>-	/* reset irq flags*/</div><div class='del'>-	csr.v = 0;</div><div class='del'>-	csr.aesrst = 1;</div><div class='del'>-	writel(csr.v, cryp-&gt;base + STARFIVE_AES_CSR);</div><div class='del'>-</div><div class='ctx'> 	if (cryp-&gt;authsize)</div><div class='ctx'> 		crypto_finalize_aead_request(cryp-&gt;engine, cryp-&gt;req.areq, err);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -353,39 +339,6 @@ static void starfive_aes_finish_req(struct starfive_cryp_dev *cryp)</div><div class='ctx'> 						 err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void starfive_aes_done_task(unsigned long param)</div><div class='del'>-{</div><div class='del'>-	struct starfive_cryp_dev *cryp = (struct starfive_cryp_dev *)param;</div><div class='del'>-	u32 block[AES_BLOCK_32];</div><div class='del'>-	u32 stat;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; AES_BLOCK_32; i++)</div><div class='del'>-		block[i] = readl(cryp-&gt;base + STARFIVE_AES_AESDIO0R);</div><div class='del'>-</div><div class='del'>-	scatterwalk_copychunks(block, &amp;cryp-&gt;out_walk, min_t(size_t, AES_BLOCK_SIZE,</div><div class='del'>-							     cryp-&gt;total_out), 1);</div><div class='del'>-</div><div class='del'>-	cryp-&gt;total_out -= min_t(size_t, AES_BLOCK_SIZE, cryp-&gt;total_out);</div><div class='del'>-</div><div class='del'>-	if (!cryp-&gt;total_out) {</div><div class='del'>-		starfive_aes_finish_req(cryp);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(block, 0, AES_BLOCK_SIZE);</div><div class='del'>-	scatterwalk_copychunks(block, &amp;cryp-&gt;in_walk, min_t(size_t, AES_BLOCK_SIZE,</div><div class='del'>-							    cryp-&gt;total_in), 0);</div><div class='del'>-	cryp-&gt;total_in -= min_t(size_t, AES_BLOCK_SIZE, cryp-&gt;total_in);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; AES_BLOCK_32; i++)</div><div class='del'>-		writel(block[i], cryp-&gt;base + STARFIVE_AES_AESDIO0R);</div><div class='del'>-</div><div class='del'>-	stat = readl(cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-	stat &amp;= ~STARFIVE_IE_MASK_AES_DONE;</div><div class='del'>-	writel(stat, cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int starfive_aes_gcm_write_adata(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='hunk'>@@ -451,60 +404,165 @@ static int starfive_aes_ccm_write_adata(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_aes_prepare_req(struct skcipher_request *req,</div><div class='del'>-				    struct aead_request *areq)</div><div class='add'>+static void starfive_aes_dma_done(void *param)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx;</div><div class='del'>-	struct starfive_cryp_request_ctx *rctx;</div><div class='del'>-	struct starfive_cryp_dev *cryp;</div><div class='add'>+	struct starfive_cryp_dev *cryp = param;</div><div class='ctx'> </div><div class='del'>-	if (!req &amp;&amp; !areq)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	complete(&amp;cryp-&gt;dma_done);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ctx = req ? crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)) :</div><div class='del'>-		    crypto_aead_ctx(crypto_aead_reqtfm(areq));</div><div class='add'>+static void starfive_aes_dma_init(struct starfive_cryp_dev *cryp)</div><div class='add'>+{</div><div class='add'>+	cryp-&gt;cfg_in.direction = DMA_MEM_TO_DEV;</div><div class='add'>+	cryp-&gt;cfg_in.src_addr_width = DMA_SLAVE_BUSWIDTH_16_BYTES;</div><div class='add'>+	cryp-&gt;cfg_in.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+	cryp-&gt;cfg_in.src_maxburst = cryp-&gt;dma_maxburst;</div><div class='add'>+	cryp-&gt;cfg_in.dst_maxburst = cryp-&gt;dma_maxburst;</div><div class='add'>+	cryp-&gt;cfg_in.dst_addr = cryp-&gt;phys_base + STARFIVE_ALG_FIFO_OFFSET;</div><div class='ctx'> </div><div class='del'>-	cryp = ctx-&gt;cryp;</div><div class='del'>-	rctx = req ? skcipher_request_ctx(req) : aead_request_ctx(areq);</div><div class='add'>+	dmaengine_slave_config(cryp-&gt;tx, &amp;cryp-&gt;cfg_in);</div><div class='ctx'> </div><div class='del'>-	if (req) {</div><div class='del'>-		cryp-&gt;req.sreq = req;</div><div class='del'>-		cryp-&gt;total_in = req-&gt;cryptlen;</div><div class='del'>-		cryp-&gt;total_out = req-&gt;cryptlen;</div><div class='del'>-		cryp-&gt;assoclen = 0;</div><div class='del'>-		cryp-&gt;authsize = 0;</div><div class='del'>-	} else {</div><div class='del'>-		cryp-&gt;req.areq = areq;</div><div class='del'>-		cryp-&gt;assoclen = areq-&gt;assoclen;</div><div class='del'>-		cryp-&gt;authsize = crypto_aead_authsize(crypto_aead_reqtfm(areq));</div><div class='del'>-		if (is_encrypt(cryp)) {</div><div class='del'>-			cryp-&gt;total_in = areq-&gt;cryptlen;</div><div class='del'>-			cryp-&gt;total_out = areq-&gt;cryptlen;</div><div class='del'>-		} else {</div><div class='del'>-			cryp-&gt;total_in = areq-&gt;cryptlen - cryp-&gt;authsize;</div><div class='del'>-			cryp-&gt;total_out = cryp-&gt;total_in;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	cryp-&gt;cfg_out.direction = DMA_DEV_TO_MEM;</div><div class='add'>+	cryp-&gt;cfg_out.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+	cryp-&gt;cfg_out.dst_addr_width = DMA_SLAVE_BUSWIDTH_16_BYTES;</div><div class='add'>+	cryp-&gt;cfg_out.src_maxburst = 4;</div><div class='add'>+	cryp-&gt;cfg_out.dst_maxburst = 4;</div><div class='add'>+	cryp-&gt;cfg_out.src_addr = cryp-&gt;phys_base + STARFIVE_ALG_FIFO_OFFSET;</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;in_sg = req ? req-&gt;src : areq-&gt;src;</div><div class='del'>-	scatterwalk_start(&amp;cryp-&gt;in_walk, rctx-&gt;in_sg);</div><div class='add'>+	dmaengine_slave_config(cryp-&gt;rx, &amp;cryp-&gt;cfg_out);</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;out_sg = req ? req-&gt;dst : areq-&gt;dst;</div><div class='del'>-	scatterwalk_start(&amp;cryp-&gt;out_walk, rctx-&gt;out_sg);</div><div class='add'>+	init_completion(&amp;cryp-&gt;dma_done);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (cryp-&gt;assoclen) {</div><div class='del'>-		rctx-&gt;adata = kzalloc(cryp-&gt;assoclen + AES_BLOCK_SIZE, GFP_KERNEL);</div><div class='del'>-		if (!rctx-&gt;adata)</div><div class='del'>-			return dev_err_probe(cryp-&gt;dev, -ENOMEM,</div><div class='del'>-					     "Failed to alloc memory for adata");</div><div class='add'>+static int starfive_aes_dma_xfer(struct starfive_cryp_dev *cryp,</div><div class='add'>+				 struct scatterlist *src,</div><div class='add'>+				 struct scatterlist *dst,</div><div class='add'>+				 int len)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *in_desc, *out_desc;</div><div class='add'>+	union starfive_alg_cr alg_cr;</div><div class='add'>+	int ret = 0, in_save, out_save;</div><div class='add'>+</div><div class='add'>+	alg_cr.v = 0;</div><div class='add'>+	alg_cr.start = 1;</div><div class='add'>+	alg_cr.aes_dma_en = 1;</div><div class='add'>+	writel(alg_cr.v, cryp-&gt;base + STARFIVE_ALG_CR_OFFSET);</div><div class='add'>+</div><div class='add'>+	in_save = sg_dma_len(src);</div><div class='add'>+	out_save = sg_dma_len(dst);</div><div class='ctx'> </div><div class='del'>-		scatterwalk_copychunks(rctx-&gt;adata, &amp;cryp-&gt;in_walk, cryp-&gt;assoclen, 0);</div><div class='del'>-		scatterwalk_copychunks(NULL, &amp;cryp-&gt;out_walk, cryp-&gt;assoclen, 2);</div><div class='add'>+	writel(ALIGN(len, AES_BLOCK_SIZE), cryp-&gt;base + STARFIVE_DMA_IN_LEN_OFFSET);</div><div class='add'>+	writel(ALIGN(len, AES_BLOCK_SIZE), cryp-&gt;base + STARFIVE_DMA_OUT_LEN_OFFSET);</div><div class='add'>+</div><div class='add'>+	sg_dma_len(src) = ALIGN(len, AES_BLOCK_SIZE);</div><div class='add'>+	sg_dma_len(dst) = ALIGN(len, AES_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	out_desc = dmaengine_prep_slave_sg(cryp-&gt;rx, dst, 1, DMA_DEV_TO_MEM,</div><div class='add'>+					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);</div><div class='add'>+	if (!out_desc) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto dma_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;rctx = rctx;</div><div class='add'>+	out_desc-&gt;callback = starfive_aes_dma_done;</div><div class='add'>+	out_desc-&gt;callback_param = cryp;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;cryp-&gt;dma_done);</div><div class='add'>+	dmaengine_submit(out_desc);</div><div class='add'>+	dma_async_issue_pending(cryp-&gt;rx);</div><div class='add'>+</div><div class='add'>+	in_desc = dmaengine_prep_slave_sg(cryp-&gt;tx, src, 1, DMA_MEM_TO_DEV,</div><div class='add'>+					  DMA_PREP_INTERRUPT | DMA_CTRL_ACK);</div><div class='add'>+	if (!in_desc) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto dma_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dmaengine_submit(in_desc);</div><div class='add'>+	dma_async_issue_pending(cryp-&gt;tx);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;cryp-&gt;dma_done,</div><div class='add'>+					 msecs_to_jiffies(1000)))</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+dma_err:</div><div class='add'>+	sg_dma_len(src) = in_save;</div><div class='add'>+	sg_dma_len(dst) = out_save;</div><div class='add'>+</div><div class='add'>+	alg_cr.v = 0;</div><div class='add'>+	alg_cr.clear = 1;</div><div class='add'>+	writel(alg_cr.v, cryp-&gt;base + STARFIVE_ALG_CR_OFFSET);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int starfive_aes_map_sg(struct starfive_cryp_dev *cryp,</div><div class='add'>+			       struct scatterlist *src,</div><div class='add'>+			       struct scatterlist *dst)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *stsg, *dtsg;</div><div class='add'>+	struct scatterlist _src[2], _dst[2];</div><div class='add'>+	unsigned int remain = cryp-&gt;total_in;</div><div class='add'>+	unsigned int len, src_nents, dst_nents;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (src == dst) {</div><div class='add'>+		for (stsg = src, dtsg = dst; remain &gt; 0;</div><div class='add'>+		     stsg = sg_next(stsg), dtsg = sg_next(dtsg)) {</div><div class='add'>+			src_nents = dma_map_sg(cryp-&gt;dev, stsg, 1, DMA_BIDIRECTIONAL);</div><div class='add'>+			if (src_nents == 0)</div><div class='add'>+				return dev_err_probe(cryp-&gt;dev, -ENOMEM,</div><div class='add'>+						     "dma_map_sg error\n");</div><div class='add'>+</div><div class='add'>+			dst_nents = src_nents;</div><div class='add'>+			len = min(sg_dma_len(stsg), remain);</div><div class='add'>+</div><div class='add'>+			ret = starfive_aes_dma_xfer(cryp, stsg, dtsg, len);</div><div class='add'>+			dma_unmap_sg(cryp-&gt;dev, stsg, 1, DMA_BIDIRECTIONAL);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			remain -= len;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for (stsg = src, dtsg = dst;;) {</div><div class='add'>+			src_nents = dma_map_sg(cryp-&gt;dev, stsg, 1, DMA_TO_DEVICE);</div><div class='add'>+			if (src_nents == 0)</div><div class='add'>+				return dev_err_probe(cryp-&gt;dev, -ENOMEM,</div><div class='add'>+						     "dma_map_sg src error\n");</div><div class='add'>+</div><div class='add'>+			dst_nents = dma_map_sg(cryp-&gt;dev, dtsg, 1, DMA_FROM_DEVICE);</div><div class='add'>+			if (dst_nents == 0)</div><div class='add'>+				return dev_err_probe(cryp-&gt;dev, -ENOMEM,</div><div class='add'>+						     "dma_map_sg dst error\n");</div><div class='add'>+</div><div class='add'>+			len = min(sg_dma_len(stsg), sg_dma_len(dtsg));</div><div class='add'>+			len = min(len, remain);</div><div class='add'>+</div><div class='add'>+			ret = starfive_aes_dma_xfer(cryp, stsg, dtsg, len);</div><div class='add'>+			dma_unmap_sg(cryp-&gt;dev, stsg, 1, DMA_TO_DEVICE);</div><div class='add'>+			dma_unmap_sg(cryp-&gt;dev, dtsg, 1, DMA_FROM_DEVICE);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			remain -= len;</div><div class='add'>+			if (remain == 0)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (sg_dma_len(stsg) - len) {</div><div class='add'>+				stsg = scatterwalk_ffwd(_src, stsg, len);</div><div class='add'>+				dtsg = sg_next(dtsg);</div><div class='add'>+			} else if (sg_dma_len(dtsg) - len) {</div><div class='add'>+				dtsg = scatterwalk_ffwd(_dst, dtsg, len);</div><div class='add'>+				stsg = sg_next(stsg);</div><div class='add'>+			} else {</div><div class='add'>+				stsg = sg_next(stsg);</div><div class='add'>+				dtsg = sg_next(dtsg);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return starfive_aes_hw_init(ctx);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_aes_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='hunk'>@@ -513,35 +571,42 @@ static int starfive_aes_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='ctx'> 		container_of(areq, struct skcipher_request, base);</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx =</div><div class='ctx'> 		crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));</div><div class='add'>+	struct starfive_cryp_request_ctx *rctx = skcipher_request_ctx(req);</div><div class='ctx'> 	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='del'>-	u32 block[AES_BLOCK_32];</div><div class='del'>-	u32 stat;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	err = starfive_aes_prepare_req(req, NULL);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	cryp-&gt;req.sreq = req;</div><div class='add'>+	cryp-&gt;total_in = req-&gt;cryptlen;</div><div class='add'>+	cryp-&gt;total_out = req-&gt;cryptlen;</div><div class='add'>+	cryp-&gt;assoclen = 0;</div><div class='add'>+	cryp-&gt;authsize = 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Write first plain/ciphertext block to start the module</div><div class='del'>-	 * then let irq tasklet handle the rest of the data blocks.</div><div class='del'>-	 */</div><div class='del'>-	scatterwalk_copychunks(block, &amp;cryp-&gt;in_walk, min_t(size_t, AES_BLOCK_SIZE,</div><div class='del'>-							    cryp-&gt;total_in), 0);</div><div class='del'>-	cryp-&gt;total_in -= min_t(size_t, AES_BLOCK_SIZE, cryp-&gt;total_in);</div><div class='add'>+	rctx-&gt;in_sg = req-&gt;src;</div><div class='add'>+	rctx-&gt;out_sg = req-&gt;dst;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;rctx = rctx;</div><div class='add'>+</div><div class='add'>+	ret = starfive_aes_hw_init(ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; AES_BLOCK_32; i++)</div><div class='del'>-		writel(block[i], cryp-&gt;base + STARFIVE_AES_AESDIO0R);</div><div class='add'>+	if (!cryp-&gt;total_in)</div><div class='add'>+		goto finish_req;</div><div class='ctx'> </div><div class='del'>-	stat = readl(cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-	stat &amp;= ~STARFIVE_IE_MASK_AES_DONE;</div><div class='del'>-	writel(stat, cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='add'>+	starfive_aes_dma_init(cryp);</div><div class='add'>+</div><div class='add'>+	ret = starfive_aes_map_sg(cryp, rctx-&gt;in_sg, rctx-&gt;out_sg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+finish_req:</div><div class='add'>+	starfive_aes_finish_req(ctx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_aes_init_tfm(struct crypto_skcipher *tfm)</div><div class='add'>+static int starfive_aes_init_tfm(struct crypto_skcipher *tfm,</div><div class='add'>+				 const char *alg_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='hunk'>@@ -549,12 +614,26 @@ static int starfive_aes_init_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> 	if (!ctx-&gt;cryp)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	ctx-&gt;skcipher_fbk = crypto_alloc_skcipher(alg_name, 0,</div><div class='add'>+						  CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+	if (IS_ERR(ctx-&gt;skcipher_fbk))</div><div class='add'>+		return dev_err_probe(ctx-&gt;cryp-&gt;dev, PTR_ERR(ctx-&gt;skcipher_fbk),</div><div class='add'>+				     "%s() failed to allocate fallback for %s\n",</div><div class='add'>+				     __func__, alg_name);</div><div class='add'>+</div><div class='ctx'> 	crypto_skcipher_set_reqsize(tfm, sizeof(struct starfive_cryp_request_ctx) +</div><div class='del'>-				    sizeof(struct skcipher_request));</div><div class='add'>+				    crypto_skcipher_reqsize(ctx-&gt;skcipher_fbk));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void starfive_aes_exit_tfm(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	crypto_free_skcipher(ctx-&gt;skcipher_fbk);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='ctx'> {</div><div class='ctx'> 	struct aead_request *req =</div><div class='hunk'>@@ -562,79 +641,99 @@ static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areq</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx =</div><div class='ctx'> 		crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='ctx'> 	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='del'>-	struct starfive_cryp_request_ctx *rctx;</div><div class='del'>-	u32 block[AES_BLOCK_32];</div><div class='del'>-	u32 stat;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='add'>+	struct starfive_cryp_request_ctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct scatterlist _src[2], _dst[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cryp-&gt;req.areq = req;</div><div class='add'>+	cryp-&gt;assoclen = req-&gt;assoclen;</div><div class='add'>+	cryp-&gt;authsize = crypto_aead_authsize(crypto_aead_reqtfm(req));</div><div class='add'>+</div><div class='add'>+	rctx-&gt;in_sg = scatterwalk_ffwd(_src, req-&gt;src, cryp-&gt;assoclen);</div><div class='add'>+	if (req-&gt;src == req-&gt;dst)</div><div class='add'>+		rctx-&gt;out_sg = rctx-&gt;in_sg;</div><div class='add'>+	else</div><div class='add'>+		rctx-&gt;out_sg = scatterwalk_ffwd(_dst, req-&gt;dst, cryp-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	if (is_encrypt(cryp)) {</div><div class='add'>+		cryp-&gt;total_in = req-&gt;cryptlen;</div><div class='add'>+		cryp-&gt;total_out = req-&gt;cryptlen;</div><div class='add'>+	} else {</div><div class='add'>+		cryp-&gt;total_in = req-&gt;cryptlen - cryp-&gt;authsize;</div><div class='add'>+		cryp-&gt;total_out = cryp-&gt;total_in;</div><div class='add'>+		scatterwalk_map_and_copy(cryp-&gt;tag_in, req-&gt;src,</div><div class='add'>+					 cryp-&gt;total_in + cryp-&gt;assoclen,</div><div class='add'>+					 cryp-&gt;authsize, 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	err = starfive_aes_prepare_req(NULL, req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	if (cryp-&gt;assoclen) {</div><div class='add'>+		rctx-&gt;adata = kzalloc(cryp-&gt;assoclen + AES_BLOCK_SIZE, GFP_KERNEL);</div><div class='add'>+		if (!rctx-&gt;adata)</div><div class='add'>+			return dev_err_probe(cryp-&gt;dev, -ENOMEM,</div><div class='add'>+					     "Failed to alloc memory for adata");</div><div class='add'>+</div><div class='add'>+		if (sg_copy_to_buffer(req-&gt;src, sg_nents_for_len(req-&gt;src, cryp-&gt;assoclen),</div><div class='add'>+				      rctx-&gt;adata, cryp-&gt;assoclen) != cryp-&gt;assoclen)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cryp-&gt;total_in)</div><div class='add'>+		sg_zero_buffer(rctx-&gt;in_sg, sg_nents(rctx-&gt;in_sg),</div><div class='add'>+			       sg_dma_len(rctx-&gt;in_sg) - cryp-&gt;total_in,</div><div class='add'>+			       cryp-&gt;total_in);</div><div class='ctx'> </div><div class='del'>-	rctx = ctx-&gt;rctx;</div><div class='add'>+	ctx-&gt;rctx = rctx;</div><div class='add'>+</div><div class='add'>+	ret = starfive_aes_hw_init(ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!cryp-&gt;assoclen)</div><div class='ctx'> 		goto write_text;</div><div class='ctx'> </div><div class='ctx'> 	if ((cryp-&gt;flags &amp; FLG_MODE_MASK) == STARFIVE_AES_MODE_CCM)</div><div class='del'>-		cryp-&gt;err = starfive_aes_ccm_write_adata(ctx);</div><div class='add'>+		ret = starfive_aes_ccm_write_adata(ctx);</div><div class='ctx'> 	else</div><div class='del'>-		cryp-&gt;err = starfive_aes_gcm_write_adata(ctx);</div><div class='add'>+		ret = starfive_aes_gcm_write_adata(ctx);</div><div class='ctx'> </div><div class='ctx'> 	kfree(rctx-&gt;adata);</div><div class='ctx'> </div><div class='del'>-	if (cryp-&gt;err)</div><div class='del'>-		return cryp-&gt;err;</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> write_text:</div><div class='ctx'> 	if (!cryp-&gt;total_in)</div><div class='ctx'> 		goto finish_req;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Write first plain/ciphertext block to start the module</div><div class='del'>-	 * then let irq tasklet handle the rest of the data blocks.</div><div class='del'>-	 */</div><div class='del'>-	scatterwalk_copychunks(block, &amp;cryp-&gt;in_walk, min_t(size_t, AES_BLOCK_SIZE,</div><div class='del'>-							    cryp-&gt;total_in), 0);</div><div class='del'>-	cryp-&gt;total_in -= min_t(size_t, AES_BLOCK_SIZE, cryp-&gt;total_in);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; AES_BLOCK_32; i++)</div><div class='del'>-		writel(block[i], cryp-&gt;base + STARFIVE_AES_AESDIO0R);</div><div class='del'>-</div><div class='del'>-	stat = readl(cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-	stat &amp;= ~STARFIVE_IE_MASK_AES_DONE;</div><div class='del'>-	writel(stat, cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='add'>+	starfive_aes_dma_init(cryp);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	ret = starfive_aes_map_sg(cryp, rctx-&gt;in_sg, rctx-&gt;out_sg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> finish_req:</div><div class='del'>-	starfive_aes_finish_req(cryp);</div><div class='add'>+	starfive_aes_finish_req(ctx);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_aes_aead_init_tfm(struct crypto_aead *tfm)</div><div class='add'>+static int starfive_aes_aead_init_tfm(struct crypto_aead *tfm,</div><div class='add'>+				      const char *alg_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='del'>-	struct crypto_tfm *aead = crypto_aead_tfm(tfm);</div><div class='del'>-	struct crypto_alg *alg = aead-&gt;__crt_alg;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;cryp = starfive_cryp_find_dev(ctx);</div><div class='ctx'> 	if (!ctx-&gt;cryp)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (alg-&gt;cra_flags &amp; CRYPTO_ALG_NEED_FALLBACK) {</div><div class='del'>-		ctx-&gt;aead_fbk = crypto_alloc_aead(alg-&gt;cra_name, 0,</div><div class='del'>-						  CRYPTO_ALG_NEED_FALLBACK);</div><div class='del'>-		if (IS_ERR(ctx-&gt;aead_fbk))</div><div class='del'>-			return dev_err_probe(cryp-&gt;dev, PTR_ERR(ctx-&gt;aead_fbk),</div><div class='del'>-					     "%s() failed to allocate fallback for %s\n",</div><div class='del'>-					     __func__, alg-&gt;cra_name);</div><div class='del'>-	}</div><div class='add'>+	ctx-&gt;aead_fbk = crypto_alloc_aead(alg_name, 0,</div><div class='add'>+					  CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+	if (IS_ERR(ctx-&gt;aead_fbk))</div><div class='add'>+		return dev_err_probe(ctx-&gt;cryp-&gt;dev, PTR_ERR(ctx-&gt;aead_fbk),</div><div class='add'>+				     "%s() failed to allocate fallback for %s\n",</div><div class='add'>+				     __func__, alg_name);</div><div class='ctx'> </div><div class='del'>-	crypto_aead_set_reqsize(tfm, sizeof(struct starfive_cryp_ctx) +</div><div class='del'>-				sizeof(struct aead_request));</div><div class='add'>+	crypto_aead_set_reqsize(tfm, sizeof(struct starfive_cryp_request_ctx) +</div><div class='add'>+				crypto_aead_reqsize(ctx-&gt;aead_fbk));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -646,6 +745,46 @@ static void starfive_aes_aead_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	crypto_free_aead(ctx-&gt;aead_fbk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool starfive_aes_check_unaligned(struct starfive_cryp_dev *cryp,</div><div class='add'>+					 struct scatterlist *src,</div><div class='add'>+					 struct scatterlist *dst)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *tsg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_sg(src, tsg, sg_nents(src), i)</div><div class='add'>+		if (!IS_ALIGNED(tsg-&gt;offset, sizeof(u32)) ||</div><div class='add'>+		    (!IS_ALIGNED(tsg-&gt;length, AES_BLOCK_SIZE) &amp;&amp;</div><div class='add'>+		     !sg_is_last(tsg)))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+	if (src != dst)</div><div class='add'>+		for_each_sg(dst, tsg, sg_nents(dst), i)</div><div class='add'>+			if (!IS_ALIGNED(tsg-&gt;offset, sizeof(u32)) ||</div><div class='add'>+			    (!IS_ALIGNED(tsg-&gt;length, AES_BLOCK_SIZE) &amp;&amp;</div><div class='add'>+			     !sg_is_last(tsg)))</div><div class='add'>+				return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int starfive_aes_do_fallback(struct skcipher_request *req, bool enc)</div><div class='add'>+{</div><div class='add'>+	struct starfive_cryp_ctx *ctx =</div><div class='add'>+		crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));</div><div class='add'>+	struct skcipher_request *subreq = skcipher_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	skcipher_request_set_tfm(subreq, ctx-&gt;skcipher_fbk);</div><div class='add'>+	skcipher_request_set_callback(subreq, req-&gt;base.flags,</div><div class='add'>+				      req-&gt;base.complete,</div><div class='add'>+				      req-&gt;base.data);</div><div class='add'>+	skcipher_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+				   req-&gt;cryptlen, req-&gt;iv);</div><div class='add'>+</div><div class='add'>+	return enc ? crypto_skcipher_encrypt(subreq) :</div><div class='add'>+		     crypto_skcipher_decrypt(subreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int starfive_aes_crypt(struct skcipher_request *req, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='hunk'>@@ -660,32 +799,54 @@ static int starfive_aes_crypt(struct skcipher_request *req, unsigned long flags)</div><div class='ctx'> 		if (req-&gt;cryptlen &amp; blocksize_align)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (starfive_aes_check_unaligned(cryp, req-&gt;src, req-&gt;dst))</div><div class='add'>+		return starfive_aes_do_fallback(req, is_encrypt(cryp));</div><div class='add'>+</div><div class='ctx'> 	return crypto_transfer_skcipher_request_to_engine(cryp-&gt;engine, req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int starfive_aes_aead_do_fallback(struct aead_request *req, bool enc)</div><div class='add'>+{</div><div class='add'>+	struct starfive_cryp_ctx *ctx =</div><div class='add'>+		crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='add'>+	struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	aead_request_set_tfm(subreq, ctx-&gt;aead_fbk);</div><div class='add'>+	aead_request_set_callback(subreq, req-&gt;base.flags,</div><div class='add'>+				  req-&gt;base.complete,</div><div class='add'>+				  req-&gt;base.data);</div><div class='add'>+	aead_request_set_crypt(subreq, req-&gt;src, req-&gt;dst,</div><div class='add'>+			       req-&gt;cryptlen, req-&gt;iv);</div><div class='add'>+	aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	return enc ? crypto_aead_encrypt(subreq) :</div><div class='add'>+		     crypto_aead_decrypt(subreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int starfive_aes_aead_crypt(struct aead_request *req, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='ctx'> 	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='add'>+	struct scatterlist *src, *dst, _src[2], _dst[2];</div><div class='ctx'> </div><div class='ctx'> 	cryp-&gt;flags = flags;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * HW engine could not perform CCM tag verification on</div><div class='del'>-	 * non-blocksize aligned text, use fallback algo instead</div><div class='add'>+	/* aes-ccm does not support tag verification for non-aligned text,</div><div class='add'>+	 * use fallback for ccm decryption instead.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ctx-&gt;aead_fbk &amp;&amp; !is_encrypt(cryp)) {</div><div class='del'>-		struct aead_request *subreq = aead_request_ctx(req);</div><div class='add'>+	if (((cryp-&gt;flags &amp; FLG_MODE_MASK) == STARFIVE_AES_MODE_CCM) &amp;&amp;</div><div class='add'>+	    !is_encrypt(cryp))</div><div class='add'>+		return starfive_aes_aead_do_fallback(req, 0);</div><div class='ctx'> </div><div class='del'>-		aead_request_set_tfm(subreq, ctx-&gt;aead_fbk);</div><div class='del'>-		aead_request_set_callback(subreq, req-&gt;base.flags,</div><div class='del'>-					  req-&gt;base.complete, req-&gt;base.data);</div><div class='del'>-		aead_request_set_crypt(subreq, req-&gt;src,</div><div class='del'>-				       req-&gt;dst, req-&gt;cryptlen, req-&gt;iv);</div><div class='del'>-		aead_request_set_ad(subreq, req-&gt;assoclen);</div><div class='add'>+	src = scatterwalk_ffwd(_src, req-&gt;src, req-&gt;assoclen);</div><div class='ctx'> </div><div class='del'>-		return crypto_aead_decrypt(subreq);</div><div class='del'>-	}</div><div class='add'>+	if (req-&gt;src == req-&gt;dst)</div><div class='add'>+		dst = src;</div><div class='add'>+	else</div><div class='add'>+		dst = scatterwalk_ffwd(_dst, req-&gt;dst, req-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	if (starfive_aes_check_unaligned(cryp, src, dst))</div><div class='add'>+		return starfive_aes_aead_do_fallback(req, is_encrypt(cryp));</div><div class='ctx'> </div><div class='ctx'> 	return crypto_transfer_aead_request_to_engine(cryp-&gt;engine, req);</div><div class='ctx'> }</div><div class='hunk'>@@ -706,7 +867,7 @@ static int starfive_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='ctx'> 	memcpy(ctx-&gt;key, key, keylen);</div><div class='ctx'> 	ctx-&gt;keylen = keylen;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return crypto_skcipher_setkey(ctx-&gt;skcipher_fbk, key, keylen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_aes_aead_setkey(struct crypto_aead *tfm, const u8 *key,</div><div class='hunk'>@@ -725,16 +886,20 @@ static int starfive_aes_aead_setkey(struct crypto_aead *tfm, const u8 *key,</div><div class='ctx'> 	memcpy(ctx-&gt;key, key, keylen);</div><div class='ctx'> 	ctx-&gt;keylen = keylen;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;aead_fbk)</div><div class='del'>-		return crypto_aead_setkey(ctx-&gt;aead_fbk, key, keylen);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return crypto_aead_setkey(ctx-&gt;aead_fbk, key, keylen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_aes_gcm_setauthsize(struct crypto_aead *tfm,</div><div class='ctx'> 					unsigned int authsize)</div><div class='ctx'> {</div><div class='del'>-	return crypto_gcm_check_authsize(authsize);</div><div class='add'>+	struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = crypto_gcm_check_authsize(authsize);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return crypto_aead_setauthsize(ctx-&gt;aead_fbk, authsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_aes_ccm_setauthsize(struct crypto_aead *tfm,</div><div class='hunk'>@@ -820,9 +985,35 @@ static int starfive_aes_ccm_decrypt(struct aead_request *req)</div><div class='ctx'> 	return starfive_aes_aead_crypt(req, STARFIVE_AES_MODE_CCM);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int starfive_aes_ecb_init_tfm(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	return starfive_aes_init_tfm(tfm, "ecb(aes-generic)");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int starfive_aes_cbc_init_tfm(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	return starfive_aes_init_tfm(tfm, "cbc(aes-generic)");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int starfive_aes_ctr_init_tfm(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	return starfive_aes_init_tfm(tfm, "ctr(aes-generic)");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int starfive_aes_ccm_init_tfm(struct crypto_aead *tfm)</div><div class='add'>+{</div><div class='add'>+	return starfive_aes_aead_init_tfm(tfm, "ccm_base(ctr(aes-generic),cbcmac(aes-generic))");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int starfive_aes_gcm_init_tfm(struct crypto_aead *tfm)</div><div class='add'>+{</div><div class='add'>+	return starfive_aes_aead_init_tfm(tfm, "gcm_base(ctr(aes-generic),ghash-generic)");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct skcipher_engine_alg skcipher_algs[] = {</div><div class='ctx'> {</div><div class='del'>-	.base.init			= starfive_aes_init_tfm,</div><div class='add'>+	.base.init			= starfive_aes_ecb_init_tfm,</div><div class='add'>+	.base.exit			= starfive_aes_exit_tfm,</div><div class='ctx'> 	.base.setkey			= starfive_aes_setkey,</div><div class='ctx'> 	.base.encrypt			= starfive_aes_ecb_encrypt,</div><div class='ctx'> 	.base.decrypt			= starfive_aes_ecb_decrypt,</div><div class='hunk'>@@ -832,7 +1023,8 @@ static struct skcipher_engine_alg skcipher_algs[] = {</div><div class='ctx'> 		.cra_name		= "ecb(aes)",</div><div class='ctx'> 		.cra_driver_name	= "starfive-ecb-aes",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_ASYNC,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_ASYNC |</div><div class='add'>+					  CRYPTO_ALG_NEED_FALLBACK,</div><div class='ctx'> 		.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct starfive_cryp_ctx),</div><div class='ctx'> 		.cra_alignmask		= 0xf,</div><div class='hunk'>@@ -842,7 +1034,8 @@ static struct skcipher_engine_alg skcipher_algs[] = {</div><div class='ctx'> 		.do_one_request = starfive_aes_do_one_req,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='del'>-	.base.init			= starfive_aes_init_tfm,</div><div class='add'>+	.base.init			= starfive_aes_cbc_init_tfm,</div><div class='add'>+	.base.exit			= starfive_aes_exit_tfm,</div><div class='ctx'> 	.base.setkey			= starfive_aes_setkey,</div><div class='ctx'> 	.base.encrypt			= starfive_aes_cbc_encrypt,</div><div class='ctx'> 	.base.decrypt			= starfive_aes_cbc_decrypt,</div><div class='hunk'>@@ -853,7 +1046,8 @@ static struct skcipher_engine_alg skcipher_algs[] = {</div><div class='ctx'> 		.cra_name		= "cbc(aes)",</div><div class='ctx'> 		.cra_driver_name	= "starfive-cbc-aes",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_ASYNC,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_ASYNC |</div><div class='add'>+					  CRYPTO_ALG_NEED_FALLBACK,</div><div class='ctx'> 		.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct starfive_cryp_ctx),</div><div class='ctx'> 		.cra_alignmask		= 0xf,</div><div class='hunk'>@@ -863,7 +1057,8 @@ static struct skcipher_engine_alg skcipher_algs[] = {</div><div class='ctx'> 		.do_one_request = starfive_aes_do_one_req,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='del'>-	.base.init			= starfive_aes_init_tfm,</div><div class='add'>+	.base.init			= starfive_aes_ctr_init_tfm,</div><div class='add'>+	.base.exit			= starfive_aes_exit_tfm,</div><div class='ctx'> 	.base.setkey			= starfive_aes_setkey,</div><div class='ctx'> 	.base.encrypt			= starfive_aes_ctr_encrypt,</div><div class='ctx'> 	.base.decrypt			= starfive_aes_ctr_decrypt,</div><div class='hunk'>@@ -874,7 +1069,8 @@ static struct skcipher_engine_alg skcipher_algs[] = {</div><div class='ctx'> 		.cra_name		= "ctr(aes)",</div><div class='ctx'> 		.cra_driver_name	= "starfive-ctr-aes",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_ASYNC,</div><div class='add'>+		.cra_flags		= CRYPTO_ALG_ASYNC |</div><div class='add'>+					  CRYPTO_ALG_NEED_FALLBACK,</div><div class='ctx'> 		.cra_blocksize		= 1,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct starfive_cryp_ctx),</div><div class='ctx'> 		.cra_alignmask		= 0xf,</div><div class='hunk'>@@ -892,7 +1088,7 @@ static struct aead_engine_alg aead_algs[] = {</div><div class='ctx'> 	.base.setauthsize		= starfive_aes_gcm_setauthsize,</div><div class='ctx'> 	.base.encrypt			= starfive_aes_gcm_encrypt,</div><div class='ctx'> 	.base.decrypt			= starfive_aes_gcm_decrypt,</div><div class='del'>-	.base.init			= starfive_aes_aead_init_tfm,</div><div class='add'>+	.base.init			= starfive_aes_gcm_init_tfm,</div><div class='ctx'> 	.base.exit			= starfive_aes_aead_exit_tfm,</div><div class='ctx'> 	.base.ivsize			= GCM_AES_IV_SIZE,</div><div class='ctx'> 	.base.maxauthsize		= AES_BLOCK_SIZE,</div><div class='hunk'>@@ -900,7 +1096,8 @@ static struct aead_engine_alg aead_algs[] = {</div><div class='ctx'> 		.cra_name               = "gcm(aes)",</div><div class='ctx'> 		.cra_driver_name        = "starfive-gcm-aes",</div><div class='ctx'> 		.cra_priority           = 200,</div><div class='del'>-		.cra_flags              = CRYPTO_ALG_ASYNC,</div><div class='add'>+		.cra_flags              = CRYPTO_ALG_ASYNC |</div><div class='add'>+					  CRYPTO_ALG_NEED_FALLBACK,</div><div class='ctx'> 		.cra_blocksize          = 1,</div><div class='ctx'> 		.cra_ctxsize            = sizeof(struct starfive_cryp_ctx),</div><div class='ctx'> 		.cra_alignmask          = 0xf,</div><div class='hunk'>@@ -914,7 +1111,7 @@ static struct aead_engine_alg aead_algs[] = {</div><div class='ctx'> 	.base.setauthsize		= starfive_aes_ccm_setauthsize,</div><div class='ctx'> 	.base.encrypt			= starfive_aes_ccm_encrypt,</div><div class='ctx'> 	.base.decrypt			= starfive_aes_ccm_decrypt,</div><div class='del'>-	.base.init			= starfive_aes_aead_init_tfm,</div><div class='add'>+	.base.init			= starfive_aes_ccm_init_tfm,</div><div class='ctx'> 	.base.exit			= starfive_aes_aead_exit_tfm,</div><div class='ctx'> 	.base.ivsize			= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.maxauthsize		= AES_BLOCK_SIZE,</div><div class='head'>diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c<br/>index 425fddf3a8ab..e4dfed7ee0b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-cryp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-cryp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-cryp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/starfive/jh7110-cryp.c</a></div><div class='hunk'>@@ -89,34 +89,10 @@ static void starfive_dma_cleanup(struct starfive_cryp_dev *cryp)</div><div class='ctx'> 	dma_release_channel(cryp-&gt;rx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t starfive_cryp_irq(int irq, void *priv)</div><div class='del'>-{</div><div class='del'>-	u32 status;</div><div class='del'>-	u32 mask;</div><div class='del'>-	struct starfive_cryp_dev *cryp = (struct starfive_cryp_dev *)priv;</div><div class='del'>-</div><div class='del'>-	mask = readl(cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-	status = readl(cryp-&gt;base + STARFIVE_IE_FLAG_OFFSET);</div><div class='del'>-	if (status &amp; STARFIVE_IE_FLAG_AES_DONE) {</div><div class='del'>-		mask |= STARFIVE_IE_MASK_AES_DONE;</div><div class='del'>-		writel(mask, cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-		tasklet_schedule(&amp;cryp-&gt;aes_done);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (status &amp; STARFIVE_IE_FLAG_HASH_DONE) {</div><div class='del'>-		mask |= STARFIVE_IE_MASK_HASH_DONE;</div><div class='del'>-		writel(mask, cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-		tasklet_schedule(&amp;cryp-&gt;hash_done);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int starfive_cryp_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_dev *cryp;</div><div class='ctx'> 	struct resource *res;</div><div class='del'>-	int irq;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	cryp = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*cryp), GFP_KERNEL);</div><div class='hunk'>@@ -131,9 +107,6 @@ static int starfive_cryp_probe(struct platform_device *pdev)</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(cryp-&gt;base),</div><div class='ctx'> 				     "Error remapping memory for platform device\n");</div><div class='ctx'> </div><div class='del'>-	tasklet_init(&amp;cryp-&gt;aes_done, starfive_aes_done_task, (unsigned long)cryp);</div><div class='del'>-	tasklet_init(&amp;cryp-&gt;hash_done, starfive_hash_done_task, (unsigned long)cryp);</div><div class='del'>-</div><div class='ctx'> 	cryp-&gt;phys_base = res-&gt;start;</div><div class='ctx'> 	cryp-&gt;dma_maxburst = 32;</div><div class='ctx'> 	cryp-&gt;side_chan = side_chan;</div><div class='hunk'>@@ -153,16 +126,6 @@ static int starfive_cryp_probe(struct platform_device *pdev)</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(cryp-&gt;rst),</div><div class='ctx'> 				     "Error getting hardware reset line\n");</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (irq &lt; 0)</div><div class='del'>-		return irq;</div><div class='del'>-</div><div class='del'>-	ret = devm_request_irq(&amp;pdev-&gt;dev, irq, starfive_cryp_irq, 0, pdev-&gt;name,</div><div class='del'>-			       (void *)cryp);</div><div class='del'>-	if (ret)</div><div class='del'>-		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='del'>-				     "Failed to register interrupt handler\n");</div><div class='del'>-</div><div class='ctx'> 	clk_prepare_enable(cryp-&gt;hclk);</div><div class='ctx'> 	clk_prepare_enable(cryp-&gt;ahb);</div><div class='ctx'> 	reset_control_deassert(cryp-&gt;rst);</div><div class='hunk'>@@ -219,9 +182,6 @@ err_dma_init:</div><div class='ctx'> 	clk_disable_unprepare(cryp-&gt;ahb);</div><div class='ctx'> 	reset_control_assert(cryp-&gt;rst);</div><div class='ctx'> </div><div class='del'>-	tasklet_kill(&amp;cryp-&gt;aes_done);</div><div class='del'>-	tasklet_kill(&amp;cryp-&gt;hash_done);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -233,9 +193,6 @@ static void starfive_cryp_remove(struct platform_device *pdev)</div><div class='ctx'> 	starfive_hash_unregister_algs();</div><div class='ctx'> 	starfive_rsa_unregister_algs();</div><div class='ctx'> </div><div class='del'>-	tasklet_kill(&amp;cryp-&gt;aes_done);</div><div class='del'>-	tasklet_kill(&amp;cryp-&gt;hash_done);</div><div class='del'>-</div><div class='ctx'> 	crypto_engine_stop(cryp-&gt;engine);</div><div class='ctx'> 	crypto_engine_exit(cryp-&gt;engine);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h<br/>index 6cdf6db5d904..494a74f52706 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-cryp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-cryp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-cryp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/starfive/jh7110-cryp.h</a></div><div class='hunk'>@@ -91,6 +91,7 @@ union starfive_hash_csr {</div><div class='ctx'> #define STARFIVE_HASH_KEY_DONE			BIT(13)</div><div class='ctx'> 		u32 key_done			:1;</div><div class='ctx'> 		u32 key_flag			:1;</div><div class='add'>+#define STARFIVE_HASH_HMAC_DONE			BIT(15)</div><div class='ctx'> 		u32 hmac_done			:1;</div><div class='ctx'> #define STARFIVE_HASH_BUSY			BIT(16)</div><div class='ctx'> 		u32 busy			:1;</div><div class='hunk'>@@ -168,6 +169,7 @@ struct starfive_cryp_ctx {</div><div class='ctx'> 	struct crypto_akcipher			*akcipher_fbk;</div><div class='ctx'> 	struct crypto_ahash			*ahash_fbk;</div><div class='ctx'> 	struct crypto_aead			*aead_fbk;</div><div class='add'>+	struct crypto_skcipher			*skcipher_fbk;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct starfive_cryp_dev {</div><div class='hunk'>@@ -185,11 +187,8 @@ struct starfive_cryp_dev {</div><div class='ctx'> 	struct dma_chan				*rx;</div><div class='ctx'> 	struct dma_slave_config			cfg_in;</div><div class='ctx'> 	struct dma_slave_config			cfg_out;</div><div class='del'>-	struct scatter_walk			in_walk;</div><div class='del'>-	struct scatter_walk			out_walk;</div><div class='ctx'> 	struct crypto_engine			*engine;</div><div class='del'>-	struct tasklet_struct			aes_done;</div><div class='del'>-	struct tasklet_struct			hash_done;</div><div class='add'>+	struct completion			dma_done;</div><div class='ctx'> 	size_t					assoclen;</div><div class='ctx'> 	size_t					total_in;</div><div class='ctx'> 	size_t					total_out;</div><div class='hunk'>@@ -236,7 +235,4 @@ void starfive_rsa_unregister_algs(void);</div><div class='ctx'> </div><div class='ctx'> int starfive_aes_register_algs(void);</div><div class='ctx'> void starfive_aes_unregister_algs(void);</div><div class='del'>-</div><div class='del'>-void starfive_hash_done_task(unsigned long param);</div><div class='del'>-void starfive_aes_done_task(unsigned long param);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/starfive/jh7110-hash.c b/drivers/crypto/starfive/jh7110-hash.c<br/>index b6d1808012ca..2c60a1047bc3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-hash.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-hash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/starfive/jh7110-hash.c</a></div><div class='hunk'>@@ -36,15 +36,22 @@</div><div class='ctx'> #define STARFIVE_HASH_BUFLEN		SHA512_BLOCK_SIZE</div><div class='ctx'> #define STARFIVE_HASH_RESET		0x2</div><div class='ctx'> </div><div class='del'>-static inline int starfive_hash_wait_busy(struct starfive_cryp_ctx *ctx)</div><div class='add'>+static inline int starfive_hash_wait_busy(struct starfive_cryp_dev *cryp)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='ctx'> 	u32 status;</div><div class='ctx'> </div><div class='ctx'> 	return readl_relaxed_poll_timeout(cryp-&gt;base + STARFIVE_HASH_SHACSR, status,</div><div class='ctx'> 					  !(status &amp; STARFIVE_HASH_BUSY), 10, 100000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int starfive_hash_wait_hmac_done(struct starfive_cryp_dev *cryp)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	return readl_relaxed_poll_timeout(cryp-&gt;base + STARFIVE_HASH_SHACSR, status,</div><div class='add'>+					  (status &amp; STARFIVE_HASH_HMAC_DONE), 10, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int starfive_hash_wait_key_done(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='hunk'>@@ -84,64 +91,26 @@ static int starfive_hash_hmac_key(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void starfive_hash_start(void *param)</div><div class='add'>+static void starfive_hash_start(struct starfive_cryp_dev *cryp)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx = param;</div><div class='del'>-	struct starfive_cryp_request_ctx *rctx = ctx-&gt;rctx;</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='del'>-	union starfive_alg_cr alg_cr;</div><div class='ctx'> 	union starfive_hash_csr csr;</div><div class='del'>-	u32 stat;</div><div class='del'>-</div><div class='del'>-	dma_unmap_sg(cryp-&gt;dev, rctx-&gt;in_sg, rctx-&gt;in_sg_len, DMA_TO_DEVICE);</div><div class='del'>-</div><div class='del'>-	alg_cr.v = 0;</div><div class='del'>-	alg_cr.clear = 1;</div><div class='del'>-</div><div class='del'>-	writel(alg_cr.v, cryp-&gt;base + STARFIVE_ALG_CR_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	csr.v = readl(cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='ctx'> 	csr.firstb = 0;</div><div class='ctx'> 	csr.final = 1;</div><div class='del'>-</div><div class='del'>-	stat = readl(cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='del'>-	stat &amp;= ~STARFIVE_IE_MASK_HASH_DONE;</div><div class='del'>-	writel(stat, cryp-&gt;base + STARFIVE_IE_MASK_OFFSET);</div><div class='ctx'> 	writel(csr.v, cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_hash_xmit_dma(struct starfive_cryp_ctx *ctx)</div><div class='add'>+static void starfive_hash_dma_callback(void *param)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_request_ctx *rctx = ctx-&gt;rctx;</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='del'>-	struct dma_async_tx_descriptor	*in_desc;</div><div class='del'>-	union  starfive_alg_cr alg_cr;</div><div class='del'>-	int total_len;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!rctx-&gt;total) {</div><div class='del'>-		starfive_hash_start(ctx);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	struct starfive_cryp_dev *cryp = param;</div><div class='ctx'> </div><div class='del'>-	writel(rctx-&gt;total, cryp-&gt;base + STARFIVE_DMA_IN_LEN_OFFSET);</div><div class='del'>-</div><div class='del'>-	total_len = rctx-&gt;total;</div><div class='del'>-	total_len = (total_len &amp; 0x3) ? (((total_len &gt;&gt; 2) + 1) &lt;&lt; 2) : total_len;</div><div class='del'>-	sg_dma_len(rctx-&gt;in_sg) = total_len;</div><div class='del'>-</div><div class='del'>-	alg_cr.v = 0;</div><div class='del'>-	alg_cr.start = 1;</div><div class='del'>-	alg_cr.hash_dma_en = 1;</div><div class='del'>-</div><div class='del'>-	writel(alg_cr.v, cryp-&gt;base + STARFIVE_ALG_CR_OFFSET);</div><div class='del'>-</div><div class='del'>-	ret = dma_map_sg(cryp-&gt;dev, rctx-&gt;in_sg, rctx-&gt;in_sg_len, DMA_TO_DEVICE);</div><div class='del'>-	if (!ret)</div><div class='del'>-		return dev_err_probe(cryp-&gt;dev, -EINVAL, "dma_map_sg() error\n");</div><div class='add'>+	complete(&amp;cryp-&gt;dma_done);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	cryp-&gt;cfg_in.direction = DMA_MEM_TO_DEV;</div><div class='del'>-	cryp-&gt;cfg_in.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+static void starfive_hash_dma_init(struct starfive_cryp_dev *cryp)</div><div class='add'>+{</div><div class='add'>+	cryp-&gt;cfg_in.src_addr_width = DMA_SLAVE_BUSWIDTH_16_BYTES;</div><div class='ctx'> 	cryp-&gt;cfg_in.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='ctx'> 	cryp-&gt;cfg_in.src_maxburst = cryp-&gt;dma_maxburst;</div><div class='ctx'> 	cryp-&gt;cfg_in.dst_maxburst = cryp-&gt;dma_maxburst;</div><div class='hunk'>@@ -149,50 +118,48 @@ static int starfive_hash_xmit_dma(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> </div><div class='ctx'> 	dmaengine_slave_config(cryp-&gt;tx, &amp;cryp-&gt;cfg_in);</div><div class='ctx'> </div><div class='del'>-	in_desc = dmaengine_prep_slave_sg(cryp-&gt;tx, rctx-&gt;in_sg,</div><div class='del'>-					  ret, DMA_MEM_TO_DEV,</div><div class='del'>-					  DMA_PREP_INTERRUPT  |  DMA_CTRL_ACK);</div><div class='del'>-</div><div class='del'>-	if (!in_desc)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	in_desc-&gt;callback = starfive_hash_start;</div><div class='del'>-	in_desc-&gt;callback_param = ctx;</div><div class='del'>-</div><div class='del'>-	dmaengine_submit(in_desc);</div><div class='del'>-	dma_async_issue_pending(cryp-&gt;tx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	init_completion(&amp;cryp-&gt;dma_done);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_hash_xmit(struct starfive_cryp_ctx *ctx)</div><div class='add'>+static int starfive_hash_dma_xfer(struct starfive_cryp_dev *cryp,</div><div class='add'>+				  struct scatterlist *sg)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_request_ctx *rctx = ctx-&gt;rctx;</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='add'>+	struct dma_async_tx_descriptor *in_desc;</div><div class='add'>+	union starfive_alg_cr alg_cr;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;csr.hash.v = 0;</div><div class='del'>-	rctx-&gt;csr.hash.reset = 1;</div><div class='del'>-	writel(rctx-&gt;csr.hash.v, cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='del'>-</div><div class='del'>-	if (starfive_hash_wait_busy(ctx))</div><div class='del'>-		return dev_err_probe(cryp-&gt;dev, -ETIMEDOUT, "Error resetting engine.\n");</div><div class='add'>+	alg_cr.v = 0;</div><div class='add'>+	alg_cr.start = 1;</div><div class='add'>+	alg_cr.hash_dma_en = 1;</div><div class='add'>+	writel(alg_cr.v, cryp-&gt;base + STARFIVE_ALG_CR_OFFSET);</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;csr.hash.v = 0;</div><div class='del'>-	rctx-&gt;csr.hash.mode = ctx-&gt;hash_mode;</div><div class='del'>-	rctx-&gt;csr.hash.ie = 1;</div><div class='add'>+	writel(sg_dma_len(sg), cryp-&gt;base + STARFIVE_DMA_IN_LEN_OFFSET);</div><div class='add'>+	sg_dma_len(sg) = ALIGN(sg_dma_len(sg), sizeof(u32));</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;is_hmac) {</div><div class='del'>-		ret = starfive_hash_hmac_key(ctx);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	} else {</div><div class='del'>-		rctx-&gt;csr.hash.start = 1;</div><div class='del'>-		rctx-&gt;csr.hash.firstb = 1;</div><div class='del'>-		writel(rctx-&gt;csr.hash.v, cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='add'>+	in_desc = dmaengine_prep_slave_sg(cryp-&gt;tx, sg, 1, DMA_MEM_TO_DEV,</div><div class='add'>+					  DMA_PREP_INTERRUPT | DMA_CTRL_ACK);</div><div class='add'>+	if (!in_desc) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto end;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return starfive_hash_xmit_dma(ctx);</div><div class='add'>+	reinit_completion(&amp;cryp-&gt;dma_done);</div><div class='add'>+	in_desc-&gt;callback = starfive_hash_dma_callback;</div><div class='add'>+	in_desc-&gt;callback_param = cryp;</div><div class='add'>+</div><div class='add'>+	dmaengine_submit(in_desc);</div><div class='add'>+	dma_async_issue_pending(cryp-&gt;tx);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;cryp-&gt;dma_done,</div><div class='add'>+					 msecs_to_jiffies(1000)))</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	alg_cr.v = 0;</div><div class='add'>+	alg_cr.clear = 1;</div><div class='add'>+	writel(alg_cr.v, cryp-&gt;base + STARFIVE_ALG_CR_OFFSET);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hash_copy_hash(struct ahash_request *req)</div><div class='hunk'>@@ -215,58 +182,74 @@ static int starfive_hash_copy_hash(struct ahash_request *req)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void starfive_hash_done_task(unsigned long param)</div><div class='add'>+static void starfive_hash_done_task(struct starfive_cryp_dev *cryp)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_dev *cryp = (struct starfive_cryp_dev *)param;</div><div class='ctx'> 	int err = cryp-&gt;err;</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		err = starfive_hash_copy_hash(cryp-&gt;req.hreq);</div><div class='ctx'> </div><div class='del'>-	/* Reset to clear hash_done in irq register*/</div><div class='del'>-	writel(STARFIVE_HASH_RESET, cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='del'>-</div><div class='ctx'> 	crypto_finalize_hash_request(cryp-&gt;engine, cryp-&gt;req.hreq, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_hash_check_aligned(struct scatterlist *sg, size_t total, size_t align)</div><div class='add'>+static int starfive_hash_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> {</div><div class='del'>-	int len = 0;</div><div class='add'>+	struct ahash_request *req = container_of(areq, struct ahash_request,</div><div class='add'>+						 base);</div><div class='add'>+	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));</div><div class='add'>+	struct starfive_cryp_request_ctx *rctx = ctx-&gt;rctx;</div><div class='add'>+	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='add'>+	struct scatterlist *tsg;</div><div class='add'>+	int ret, src_nents, i;</div><div class='ctx'> </div><div class='del'>-	if (!total)</div><div class='del'>-		return 0;</div><div class='add'>+	writel(STARFIVE_HASH_RESET, cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='ctx'> </div><div class='del'>-	if (!IS_ALIGNED(total, align))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (starfive_hash_wait_busy(cryp))</div><div class='add'>+		return dev_err_probe(cryp-&gt;dev, -ETIMEDOUT, "Error resetting hardware\n");</div><div class='ctx'> </div><div class='del'>-	while (sg) {</div><div class='del'>-		if (!IS_ALIGNED(sg-&gt;offset, sizeof(u32)))</div><div class='del'>-			return -EINVAL;</div><div class='add'>+	rctx-&gt;csr.hash.v = 0;</div><div class='add'>+	rctx-&gt;csr.hash.mode = ctx-&gt;hash_mode;</div><div class='ctx'> </div><div class='del'>-		if (!IS_ALIGNED(sg-&gt;length, align))</div><div class='del'>-			return -EINVAL;</div><div class='add'>+	if (ctx-&gt;is_hmac) {</div><div class='add'>+		ret = starfive_hash_hmac_key(ctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		rctx-&gt;csr.hash.start = 1;</div><div class='add'>+		rctx-&gt;csr.hash.firstb = 1;</div><div class='add'>+		writel(rctx-&gt;csr.hash.v, cryp-&gt;base + STARFIVE_HASH_SHACSR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No input message, get digest and end. */</div><div class='add'>+	if (!rctx-&gt;total)</div><div class='add'>+		goto hash_start;</div><div class='add'>+</div><div class='add'>+	starfive_hash_dma_init(cryp);</div><div class='add'>+</div><div class='add'>+	for_each_sg(rctx-&gt;in_sg, tsg, rctx-&gt;in_sg_len, i) {</div><div class='add'>+		src_nents = dma_map_sg(cryp-&gt;dev, tsg, 1, DMA_TO_DEVICE);</div><div class='add'>+		if (src_nents == 0)</div><div class='add'>+			return dev_err_probe(cryp-&gt;dev, -ENOMEM,</div><div class='add'>+					     "dma_map_sg error\n");</div><div class='ctx'> </div><div class='del'>-		len += sg-&gt;length;</div><div class='del'>-		sg = sg_next(sg);</div><div class='add'>+		ret = starfive_hash_dma_xfer(cryp, tsg);</div><div class='add'>+		dma_unmap_sg(cryp-&gt;dev, tsg, 1, DMA_TO_DEVICE);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (len != total)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+hash_start:</div><div class='add'>+	starfive_hash_start(cryp);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	if (starfive_hash_wait_busy(cryp))</div><div class='add'>+		return dev_err_probe(cryp-&gt;dev, -ETIMEDOUT, "Error generating digest\n");</div><div class='ctx'> </div><div class='del'>-static int starfive_hash_one_request(struct crypto_engine *engine, void *areq)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *req = container_of(areq, struct ahash_request,</div><div class='del'>-						 base);</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));</div><div class='del'>-	struct starfive_cryp_dev *cryp = ctx-&gt;cryp;</div><div class='add'>+	if (ctx-&gt;is_hmac)</div><div class='add'>+		cryp-&gt;err = starfive_hash_wait_hmac_done(cryp);</div><div class='ctx'> </div><div class='del'>-	if (!cryp)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	starfive_hash_done_task(cryp);</div><div class='ctx'> </div><div class='del'>-	return starfive_hash_xmit(ctx);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hash_init(struct ahash_request *req)</div><div class='hunk'>@@ -337,22 +320,6 @@ static int starfive_hash_finup(struct ahash_request *req)</div><div class='ctx'> 	return crypto_ahash_finup(&amp;rctx-&gt;ahash_fbk_req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfive_hash_digest_fb(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct starfive_cryp_request_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;ahash_fbk_req, ctx-&gt;ahash_fbk);</div><div class='del'>-	ahash_request_set_callback(&amp;rctx-&gt;ahash_fbk_req, req-&gt;base.flags,</div><div class='del'>-				   req-&gt;base.complete, req-&gt;base.data);</div><div class='del'>-</div><div class='del'>-	ahash_request_set_crypt(&amp;rctx-&gt;ahash_fbk_req, req-&gt;src,</div><div class='del'>-				req-&gt;result, req-&gt;nbytes);</div><div class='del'>-</div><div class='del'>-	return crypto_ahash_digest(&amp;rctx-&gt;ahash_fbk_req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int starfive_hash_digest(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='hunk'>@@ -370,9 +337,6 @@ static int starfive_hash_digest(struct ahash_request *req)</div><div class='ctx'> 	rctx-&gt;in_sg_len = sg_nents_for_len(rctx-&gt;in_sg, rctx-&gt;total);</div><div class='ctx'> 	ctx-&gt;rctx = rctx;</div><div class='ctx'> </div><div class='del'>-	if (starfive_hash_check_aligned(rctx-&gt;in_sg, rctx-&gt;total, rctx-&gt;blksize))</div><div class='del'>-		return starfive_hash_digest_fb(req);</div><div class='del'>-</div><div class='ctx'> 	return crypto_transfer_hash_request_to_engine(cryp-&gt;engine, req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -406,7 +370,8 @@ static int starfive_hash_import(struct ahash_request *req, const void *in)</div><div class='ctx'> </div><div class='ctx'> static int starfive_hash_init_tfm(struct crypto_ahash *hash,</div><div class='ctx'> 				  const char *alg_name,</div><div class='del'>-				  unsigned int mode)</div><div class='add'>+				  unsigned int mode,</div><div class='add'>+				  bool is_hmac)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash);</div><div class='ctx'> </div><div class='hunk'>@@ -426,7 +391,7 @@ static int starfive_hash_init_tfm(struct crypto_ahash *hash,</div><div class='ctx'> 	crypto_ahash_set_reqsize(hash, sizeof(struct starfive_cryp_request_ctx) +</div><div class='ctx'> 				 crypto_ahash_reqsize(ctx-&gt;ahash_fbk));</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;keylen = 0;</div><div class='add'>+	ctx-&gt;is_hmac = is_hmac;</div><div class='ctx'> 	ctx-&gt;hash_mode = mode;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -529,81 +494,61 @@ static int starfive_hash_setkey(struct crypto_ahash *hash,</div><div class='ctx'> static int starfive_sha224_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "sha224-generic",</div><div class='del'>-				      STARFIVE_HASH_SHA224);</div><div class='add'>+				      STARFIVE_HASH_SHA224, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_sha256_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "sha256-generic",</div><div class='del'>-				      STARFIVE_HASH_SHA256);</div><div class='add'>+				      STARFIVE_HASH_SHA256, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_sha384_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "sha384-generic",</div><div class='del'>-				      STARFIVE_HASH_SHA384);</div><div class='add'>+				      STARFIVE_HASH_SHA384, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_sha512_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "sha512-generic",</div><div class='del'>-				      STARFIVE_HASH_SHA512);</div><div class='add'>+				      STARFIVE_HASH_SHA512, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_sm3_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "sm3-generic",</div><div class='del'>-				      STARFIVE_HASH_SM3);</div><div class='add'>+				      STARFIVE_HASH_SM3, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hmac_sha224_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;is_hmac = true;</div><div class='del'>-</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "hmac(sha224-generic)",</div><div class='del'>-				      STARFIVE_HASH_SHA224);</div><div class='add'>+				      STARFIVE_HASH_SHA224, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hmac_sha256_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;is_hmac = true;</div><div class='del'>-</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "hmac(sha256-generic)",</div><div class='del'>-				      STARFIVE_HASH_SHA256);</div><div class='add'>+				      STARFIVE_HASH_SHA256, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hmac_sha384_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;is_hmac = true;</div><div class='del'>-</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "hmac(sha384-generic)",</div><div class='del'>-				      STARFIVE_HASH_SHA384);</div><div class='add'>+				      STARFIVE_HASH_SHA384, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hmac_sha512_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;is_hmac = true;</div><div class='del'>-</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "hmac(sha512-generic)",</div><div class='del'>-				      STARFIVE_HASH_SHA512);</div><div class='add'>+				      STARFIVE_HASH_SHA512, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int starfive_hmac_sm3_init_tfm(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='del'>-	struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;is_hmac = true;</div><div class='del'>-</div><div class='ctx'> 	return starfive_hash_init_tfm(hash, "hmac(sm3-generic)",</div><div class='del'>-				      STARFIVE_HASH_SM3);</div><div class='add'>+				      STARFIVE_HASH_SM3, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct ahash_engine_alg algs_sha2_sm3[] = {</div><div class='head'>diff --git a/drivers/crypto/starfive/jh7110-rsa.c b/drivers/crypto/starfive/jh7110-rsa.c<br/>index cf8bda7f0855..33093ba4b13a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-rsa.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/starfive/jh7110-rsa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/starfive/jh7110-rsa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/starfive/jh7110-rsa.c</a></div><div class='hunk'>@@ -45,6 +45,9 @@ static inline int starfive_pka_wait_done(struct starfive_cryp_ctx *ctx)</div><div class='ctx'> </div><div class='ctx'> static void starfive_rsa_free_key(struct starfive_rsa_key *key)</div><div class='ctx'> {</div><div class='add'>+	if (!key-&gt;key_sz)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	kfree_sensitive(key-&gt;d);</div><div class='ctx'> 	kfree_sensitive(key-&gt;e);</div><div class='ctx'> 	kfree_sensitive(key-&gt;n);</div><div class='hunk'>@@ -273,7 +276,6 @@ static int starfive_rsa_enc_core(struct starfive_cryp_ctx *ctx, int enc)</div><div class='ctx'> </div><div class='ctx'> err_rsa_crypt:</div><div class='ctx'> 	writel(STARFIVE_RSA_RESET, cryp-&gt;base + STARFIVE_PKA_CACR_OFFSET);</div><div class='del'>-	kfree(rctx-&gt;rsa_data);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -534,16 +536,14 @@ static int starfive_rsa_init_tfm(struct crypto_akcipher *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_cryp_ctx *ctx = akcipher_tfm_ctx(tfm);</div><div class='ctx'> </div><div class='add'>+	ctx-&gt;cryp = starfive_cryp_find_dev(ctx);</div><div class='add'>+	if (!ctx-&gt;cryp)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	ctx-&gt;akcipher_fbk = crypto_alloc_akcipher("rsa-generic", 0, 0);</div><div class='ctx'> 	if (IS_ERR(ctx-&gt;akcipher_fbk))</div><div class='ctx'> 		return PTR_ERR(ctx-&gt;akcipher_fbk);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;cryp = starfive_cryp_find_dev(ctx);</div><div class='del'>-	if (!ctx-&gt;cryp) {</div><div class='del'>-		crypto_free_akcipher(ctx-&gt;akcipher_fbk);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	akcipher_set_reqsize(tfm, sizeof(struct starfive_cryp_request_ctx) +</div><div class='ctx'> 			     sizeof(struct crypto_akcipher) + 32);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c<br/>index 34e0d7e381a8..351827372ea6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/stm32/stm32-hash.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/crypto/stm32/stm32-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/stm32/stm32-hash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/stm32/stm32-hash.c</a></div><div class='hunk'>@@ -94,6 +94,7 @@</div><div class='ctx'> #define HASH_FLAGS_ERRORS		BIT(21)</div><div class='ctx'> #define HASH_FLAGS_EMPTY		BIT(22)</div><div class='ctx'> #define HASH_FLAGS_HMAC			BIT(23)</div><div class='add'>+#define HASH_FLAGS_SGS_COPIED		BIT(24)</div><div class='ctx'> </div><div class='ctx'> #define HASH_OP_UPDATE			1</div><div class='ctx'> #define HASH_OP_FINAL			2</div><div class='hunk'>@@ -145,7 +146,7 @@ struct stm32_hash_state {</div><div class='ctx'> 	u16			bufcnt;</div><div class='ctx'> 	u16			blocklen;</div><div class='ctx'> </div><div class='del'>-	u8 buffer[HASH_BUFLEN] __aligned(4);</div><div class='add'>+	u8 buffer[HASH_BUFLEN] __aligned(sizeof(u32));</div><div class='ctx'> </div><div class='ctx'> 	/* hash state */</div><div class='ctx'> 	u32			hw_context[3 + HASH_CSR_NB_MAX];</div><div class='hunk'>@@ -158,8 +159,8 @@ struct stm32_hash_request_ctx {</div><div class='ctx'> 	u8 digest[SHA512_DIGEST_SIZE] __aligned(sizeof(u32));</div><div class='ctx'> 	size_t			digcnt;</div><div class='ctx'> </div><div class='del'>-	/* DMA */</div><div class='ctx'> 	struct scatterlist	*sg;</div><div class='add'>+	struct scatterlist	sgl[2]; /* scatterlist used to realize alignment */</div><div class='ctx'> 	unsigned int		offset;</div><div class='ctx'> 	unsigned int		total;</div><div class='ctx'> 	struct scatterlist	sg_key;</div><div class='hunk'>@@ -184,6 +185,7 @@ struct stm32_hash_pdata {</div><div class='ctx'> 	size_t					algs_info_size;</div><div class='ctx'> 	bool					has_sr;</div><div class='ctx'> 	bool					has_mdmat;</div><div class='add'>+	bool					context_secured;</div><div class='ctx'> 	bool					broken_emptymsg;</div><div class='ctx'> 	bool					ux500;</div><div class='ctx'> };</div><div class='hunk'>@@ -195,6 +197,7 @@ struct stm32_hash_dev {</div><div class='ctx'> 	struct reset_control	*rst;</div><div class='ctx'> 	void __iomem		*io_base;</div><div class='ctx'> 	phys_addr_t		phys_base;</div><div class='add'>+	u8			xmit_buf[HASH_BUFLEN] __aligned(sizeof(u32));</div><div class='ctx'> 	u32			dma_mode;</div><div class='ctx'> 	bool			polled;</div><div class='ctx'> </div><div class='hunk'>@@ -220,6 +223,8 @@ static struct stm32_hash_drv stm32_hash = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void stm32_hash_dma_callback(void *param);</div><div class='add'>+static int stm32_hash_prepare_request(struct ahash_request *req);</div><div class='add'>+static void stm32_hash_unprepare_request(struct ahash_request *req);</div><div class='ctx'> </div><div class='ctx'> static inline u32 stm32_hash_read(struct stm32_hash_dev *hdev, u32 offset)</div><div class='ctx'> {</div><div class='hunk'>@@ -232,6 +237,11 @@ static inline void stm32_hash_write(struct stm32_hash_dev *hdev,</div><div class='ctx'> 	writel_relaxed(value, hdev-&gt;io_base + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * stm32_hash_wait_busy - wait until hash processor is available. It return an</div><div class='add'>+ * error if the hash core is processing a block of data for more than 10 ms.</div><div class='add'>+ * @hdev: the stm32_hash_dev device.</div><div class='add'>+ */</div><div class='ctx'> static inline int stm32_hash_wait_busy(struct stm32_hash_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 status;</div><div class='hunk'>@@ -245,6 +255,11 @@ static inline int stm32_hash_wait_busy(struct stm32_hash_dev *hdev)</div><div class='ctx'> 				   !(status &amp; HASH_SR_BUSY), 10, 10000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * stm32_hash_set_nblw - set the number of valid bytes in the last word.</div><div class='add'>+ * @hdev: the stm32_hash_dev device.</div><div class='add'>+ * @length: the length of the final word.</div><div class='add'>+ */</div><div class='ctx'> static void stm32_hash_set_nblw(struct stm32_hash_dev *hdev, int length)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='hunk'>@@ -282,6 +297,11 @@ static int stm32_hash_write_key(struct stm32_hash_dev *hdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * stm32_hash_write_ctrl - Initialize the hash processor, only if</div><div class='add'>+ * HASH_FLAGS_INIT is set.</div><div class='add'>+ * @hdev: the stm32_hash_dev device</div><div class='add'>+ */</div><div class='ctx'> static void stm32_hash_write_ctrl(struct stm32_hash_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev-&gt;req);</div><div class='hunk'>@@ -469,9 +489,7 @@ static int stm32_hash_update_cpu(struct stm32_hash_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev-&gt;req);</div><div class='ctx'> 	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='del'>-	u32 *preg = state-&gt;hw_context;</div><div class='ctx'> 	int bufcnt, err = 0, final;</div><div class='del'>-	int i, swap_reg;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(hdev-&gt;dev, "%s flags %x\n", __func__, state-&gt;flags);</div><div class='ctx'> </div><div class='hunk'>@@ -495,34 +513,23 @@ static int stm32_hash_update_cpu(struct stm32_hash_dev *hdev)</div><div class='ctx'> 		return stm32_hash_xmit_cpu(hdev, state-&gt;buffer, bufcnt, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(hdev-&gt;flags &amp; HASH_FLAGS_INIT))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (stm32_hash_wait_busy(hdev))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	swap_reg = hash_swap_reg(rctx);</div><div class='del'>-</div><div class='del'>-	if (!hdev-&gt;pdata-&gt;ux500)</div><div class='del'>-		*preg++ = stm32_hash_read(hdev, HASH_IMR);</div><div class='del'>-	*preg++ = stm32_hash_read(hdev, HASH_STR);</div><div class='del'>-	*preg++ = stm32_hash_read(hdev, HASH_CR);</div><div class='del'>-	for (i = 0; i &lt; swap_reg; i++)</div><div class='del'>-		*preg++ = stm32_hash_read(hdev, HASH_CSR(i));</div><div class='del'>-</div><div class='del'>-	state-&gt;flags |= HASH_FLAGS_INIT;</div><div class='del'>-</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev,</div><div class='del'>-			       struct scatterlist *sg, int length, int mdma)</div><div class='add'>+			       struct scatterlist *sg, int length, int mdmat)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_async_tx_descriptor *in_desc;</div><div class='ctx'> 	dma_cookie_t cookie;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	dev_dbg(hdev-&gt;dev, "%s mdmat: %x length: %d\n", __func__, mdmat, length);</div><div class='add'>+</div><div class='add'>+	/* do not use dma if there is no data to send */</div><div class='add'>+	if (length &lt;= 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	in_desc = dmaengine_prep_slave_sg(hdev-&gt;dma_lch, sg, 1,</div><div class='ctx'> 					  DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT |</div><div class='ctx'> 					  DMA_CTRL_ACK);</div><div class='hunk'>@@ -535,13 +542,12 @@ static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev,</div><div class='ctx'> 	in_desc-&gt;callback = stm32_hash_dma_callback;</div><div class='ctx'> 	in_desc-&gt;callback_param = hdev;</div><div class='ctx'> </div><div class='del'>-	hdev-&gt;flags |= HASH_FLAGS_FINAL;</div><div class='ctx'> 	hdev-&gt;flags |= HASH_FLAGS_DMA_ACTIVE;</div><div class='ctx'> </div><div class='ctx'> 	reg = stm32_hash_read(hdev, HASH_CR);</div><div class='ctx'> </div><div class='ctx'> 	if (hdev-&gt;pdata-&gt;has_mdmat) {</div><div class='del'>-		if (mdma)</div><div class='add'>+		if (mdmat)</div><div class='ctx'> 			reg |= HASH_CR_MDMAT;</div><div class='ctx'> 		else</div><div class='ctx'> 			reg &amp;= ~HASH_CR_MDMAT;</div><div class='hunk'>@@ -550,7 +556,6 @@ static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev,</div><div class='ctx'> </div><div class='ctx'> 	stm32_hash_write(hdev, HASH_CR, reg);</div><div class='ctx'> </div><div class='del'>-	stm32_hash_set_nblw(hdev, length);</div><div class='ctx'> </div><div class='ctx'> 	cookie = dmaengine_submit(in_desc);</div><div class='ctx'> 	err = dma_submit_error(cookie);</div><div class='hunk'>@@ -590,7 +595,7 @@ static int stm32_hash_hmac_dma_send(struct stm32_hash_dev *hdev)</div><div class='ctx'> 	struct stm32_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;keylen &lt; rctx-&gt;state.blocklen || hdev-&gt;dma_mode == 1) {</div><div class='add'>+	if (ctx-&gt;keylen &lt; rctx-&gt;state.blocklen || hdev-&gt;dma_mode &gt; 0) {</div><div class='ctx'> 		err = stm32_hash_write_key(hdev);</div><div class='ctx'> 		if (stm32_hash_wait_busy(hdev))</div><div class='ctx'> 			return -ETIMEDOUT;</div><div class='hunk'>@@ -655,18 +660,20 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)</div><div class='ctx'> 	struct scatterlist sg[1], *tsg;</div><div class='ctx'> 	int err = 0, reg, ncp = 0;</div><div class='ctx'> 	unsigned int i, len = 0, bufcnt = 0;</div><div class='add'>+	bool final = hdev-&gt;flags &amp; HASH_FLAGS_FINAL;</div><div class='ctx'> 	bool is_last = false;</div><div class='add'>+	u32 last_word;</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;sg = hdev-&gt;req-&gt;src;</div><div class='del'>-	rctx-&gt;total = hdev-&gt;req-&gt;nbytes;</div><div class='add'>+	dev_dbg(hdev-&gt;dev, "%s total: %d bufcnt: %d final: %d\n",</div><div class='add'>+		__func__, rctx-&gt;total, rctx-&gt;state.bufcnt, final);</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;nents = sg_nents(rctx-&gt;sg);</div><div class='ctx'> 	if (rctx-&gt;nents &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	stm32_hash_write_ctrl(hdev);</div><div class='ctx'> </div><div class='del'>-	if (hdev-&gt;flags &amp; HASH_FLAGS_HMAC) {</div><div class='add'>+	if (hdev-&gt;flags &amp; HASH_FLAGS_HMAC &amp;&amp; (!(hdev-&gt;flags &amp; HASH_FLAGS_HMAC_KEY))) {</div><div class='add'>+		hdev-&gt;flags |= HASH_FLAGS_HMAC_KEY;</div><div class='ctx'> 		err = stm32_hash_hmac_dma_send(hdev);</div><div class='ctx'> 		if (err != -EINPROGRESS)</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -677,22 +684,36 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)</div><div class='ctx'> 		len = sg-&gt;length;</div><div class='ctx'> </div><div class='ctx'> 		if (sg_is_last(sg) || (bufcnt + sg[0].length) &gt;= rctx-&gt;total) {</div><div class='del'>-			sg-&gt;length = rctx-&gt;total - bufcnt;</div><div class='del'>-			is_last = true;</div><div class='del'>-			if (hdev-&gt;dma_mode == 1) {</div><div class='del'>-				len = (ALIGN(sg-&gt;length, 16) - 16);</div><div class='del'>-</div><div class='del'>-				ncp = sg_pcopy_to_buffer(</div><div class='del'>-					rctx-&gt;sg, rctx-&gt;nents,</div><div class='del'>-					rctx-&gt;state.buffer, sg-&gt;length - len,</div><div class='del'>-					rctx-&gt;total - sg-&gt;length + len);</div><div class='del'>-</div><div class='del'>-				sg-&gt;length = len;</div><div class='add'>+			if (!final) {</div><div class='add'>+				/* Always manually put the last word of a non-final transfer. */</div><div class='add'>+				len -= sizeof(u32);</div><div class='add'>+				sg_pcopy_to_buffer(rctx-&gt;sg, rctx-&gt;nents, &amp;last_word, 4, len);</div><div class='add'>+				sg-&gt;length -= sizeof(u32);</div><div class='ctx'> 			} else {</div><div class='del'>-				if (!(IS_ALIGNED(sg-&gt;length, sizeof(u32)))) {</div><div class='del'>-					len = sg-&gt;length;</div><div class='del'>-					sg-&gt;length = ALIGN(sg-&gt;length,</div><div class='del'>-							   sizeof(u32));</div><div class='add'>+				/*</div><div class='add'>+				 * In Multiple DMA mode, DMA must be aborted before the final</div><div class='add'>+				 * transfer.</div><div class='add'>+				 */</div><div class='add'>+				sg-&gt;length = rctx-&gt;total - bufcnt;</div><div class='add'>+				if (hdev-&gt;dma_mode &gt; 0) {</div><div class='add'>+					len = (ALIGN(sg-&gt;length, 16) - 16);</div><div class='add'>+</div><div class='add'>+					ncp = sg_pcopy_to_buffer(rctx-&gt;sg, rctx-&gt;nents,</div><div class='add'>+								 rctx-&gt;state.buffer,</div><div class='add'>+								 sg-&gt;length - len,</div><div class='add'>+								 rctx-&gt;total - sg-&gt;length + len);</div><div class='add'>+</div><div class='add'>+					if (!len)</div><div class='add'>+						break;</div><div class='add'>+</div><div class='add'>+					sg-&gt;length = len;</div><div class='add'>+				} else {</div><div class='add'>+					is_last = true;</div><div class='add'>+					if (!(IS_ALIGNED(sg-&gt;length, sizeof(u32)))) {</div><div class='add'>+						len = sg-&gt;length;</div><div class='add'>+						sg-&gt;length = ALIGN(sg-&gt;length,</div><div class='add'>+								   sizeof(u32));</div><div class='add'>+					}</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -706,43 +727,67 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 		err = stm32_hash_xmit_dma(hdev, sg, len, !is_last);</div><div class='ctx'> </div><div class='add'>+		/* The last word of a non final transfer is sent manually. */</div><div class='add'>+		if (!final) {</div><div class='add'>+			stm32_hash_write(hdev, HASH_DIN, last_word);</div><div class='add'>+			len += sizeof(u32);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rctx-&gt;total -= len;</div><div class='add'>+</div><div class='ctx'> 		bufcnt += sg[0].length;</div><div class='ctx'> 		dma_unmap_sg(hdev-&gt;dev, sg, 1, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-		if (err == -ENOMEM)</div><div class='add'>+		if (err == -ENOMEM || err == -ETIMEDOUT)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		if (is_last)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hdev-&gt;dma_mode == 1) {</div><div class='del'>-		if (stm32_hash_wait_busy(hdev))</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-		reg = stm32_hash_read(hdev, HASH_CR);</div><div class='del'>-		reg &amp;= ~HASH_CR_DMAE;</div><div class='del'>-		reg |= HASH_CR_DMAA;</div><div class='del'>-		stm32_hash_write(hdev, HASH_CR, reg);</div><div class='add'>+	/*</div><div class='add'>+	 * When the second last block transfer of 4 words is performed by the DMA,</div><div class='add'>+	 * the software must set the DMA Abort bit (DMAA) to 1 before completing the</div><div class='add'>+	 * last transfer of 4 words or less.</div><div class='add'>+	 */</div><div class='add'>+	if (final) {</div><div class='add'>+		if (hdev-&gt;dma_mode &gt; 0) {</div><div class='add'>+			if (stm32_hash_wait_busy(hdev))</div><div class='add'>+				return -ETIMEDOUT;</div><div class='add'>+			reg = stm32_hash_read(hdev, HASH_CR);</div><div class='add'>+			reg &amp;= ~HASH_CR_DMAE;</div><div class='add'>+			reg |= HASH_CR_DMAA;</div><div class='add'>+			stm32_hash_write(hdev, HASH_CR, reg);</div><div class='add'>+</div><div class='add'>+			if (ncp) {</div><div class='add'>+				memset(buffer + ncp, 0, 4 - DIV_ROUND_UP(ncp, sizeof(u32)));</div><div class='add'>+				writesl(hdev-&gt;io_base + HASH_DIN, buffer,</div><div class='add'>+					DIV_ROUND_UP(ncp, sizeof(u32)));</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		if (ncp) {</div><div class='del'>-			memset(buffer + ncp, 0,</div><div class='del'>-			       DIV_ROUND_UP(ncp, sizeof(u32)) - ncp);</div><div class='del'>-			writesl(hdev-&gt;io_base + HASH_DIN, buffer,</div><div class='del'>-				DIV_ROUND_UP(ncp, sizeof(u32)));</div><div class='add'>+			stm32_hash_set_nblw(hdev, ncp);</div><div class='add'>+			reg = stm32_hash_read(hdev, HASH_STR);</div><div class='add'>+			reg |= HASH_STR_DCAL;</div><div class='add'>+			stm32_hash_write(hdev, HASH_STR, reg);</div><div class='add'>+			err = -EINPROGRESS;</div><div class='ctx'> 		}</div><div class='del'>-		stm32_hash_set_nblw(hdev, ncp);</div><div class='del'>-		reg = stm32_hash_read(hdev, HASH_STR);</div><div class='del'>-		reg |= HASH_STR_DCAL;</div><div class='del'>-		stm32_hash_write(hdev, HASH_STR, reg);</div><div class='del'>-		err = -EINPROGRESS;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (hdev-&gt;flags &amp; HASH_FLAGS_HMAC) {</div><div class='del'>-		if (stm32_hash_wait_busy(hdev))</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-		err = stm32_hash_hmac_dma_send(hdev);</div><div class='add'>+		/*</div><div class='add'>+		 * The hash processor needs the key to be loaded a second time in order</div><div class='add'>+		 * to process the HMAC.</div><div class='add'>+		 */</div><div class='add'>+		if (hdev-&gt;flags &amp; HASH_FLAGS_HMAC) {</div><div class='add'>+			if (stm32_hash_wait_busy(hdev))</div><div class='add'>+				return -ETIMEDOUT;</div><div class='add'>+			err = stm32_hash_hmac_dma_send(hdev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	if (err != -EINPROGRESS)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct stm32_hash_dev *stm32_hash_find_dev(struct stm32_hash_ctx *ctx)</div><div class='hunk'>@@ -765,33 +810,6 @@ static struct stm32_hash_dev *stm32_hash_find_dev(struct stm32_hash_ctx *ctx)</div><div class='ctx'> 	return hdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool stm32_hash_dma_aligned_data(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct scatterlist *sg;</div><div class='del'>-	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct stm32_hash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));</div><div class='del'>-	struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!hdev-&gt;dma_lch || req-&gt;nbytes &lt;= rctx-&gt;state.blocklen)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (sg_nents(req-&gt;src) &gt; 1) {</div><div class='del'>-		if (hdev-&gt;dma_mode == 1)</div><div class='del'>-			return false;</div><div class='del'>-		for_each_sg(req-&gt;src, sg, sg_nents(req-&gt;src), i) {</div><div class='del'>-			if ((!IS_ALIGNED(sg-&gt;length, sizeof(u32))) &amp;&amp;</div><div class='del'>-			    (!sg_is_last(sg)))</div><div class='del'>-				return false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (req-&gt;src-&gt;offset % 4)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int stm32_hash_init(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='hunk'>@@ -802,8 +820,10 @@ static int stm32_hash_init(struct ahash_request *req)</div><div class='ctx'> 	bool sha3_mode = ctx-&gt;flags &amp; HASH_FLAGS_SHA3_MODE;</div><div class='ctx'> </div><div class='ctx'> 	rctx-&gt;hdev = hdev;</div><div class='add'>+	state-&gt;flags = 0;</div><div class='ctx'> </div><div class='del'>-	state-&gt;flags = HASH_FLAGS_CPU;</div><div class='add'>+	if (!(hdev-&gt;dma_lch &amp;&amp;  hdev-&gt;pdata-&gt;has_mdmat))</div><div class='add'>+		state-&gt;flags |= HASH_FLAGS_CPU;</div><div class='ctx'> </div><div class='ctx'> 	if (sha3_mode)</div><div class='ctx'> 		state-&gt;flags |= HASH_FLAGS_SHA3_MODE;</div><div class='hunk'>@@ -857,6 +877,7 @@ static int stm32_hash_init(struct ahash_request *req)</div><div class='ctx'> 		dev_err(hdev-&gt;dev, "Error, block too large");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	rctx-&gt;nents = 0;</div><div class='ctx'> 	rctx-&gt;total = 0;</div><div class='ctx'> 	rctx-&gt;offset = 0;</div><div class='ctx'> 	rctx-&gt;data_type = HASH_DATA_8_BITS;</div><div class='hunk'>@@ -874,6 +895,9 @@ static int stm32_hash_update_req(struct stm32_hash_dev *hdev)</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev-&gt;req);</div><div class='ctx'> 	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='ctx'> </div><div class='add'>+	dev_dbg(hdev-&gt;dev, "update_req: total: %u, digcnt: %zd, final: 0",</div><div class='add'>+		rctx-&gt;total, rctx-&gt;digcnt);</div><div class='add'>+</div><div class='ctx'> 	if (!(state-&gt;flags &amp; HASH_FLAGS_CPU))</div><div class='ctx'> 		return stm32_hash_dma_send(hdev);</div><div class='ctx'> </div><div class='hunk'>@@ -887,6 +911,11 @@ static int stm32_hash_final_req(struct stm32_hash_dev *hdev)</div><div class='ctx'> 	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='ctx'> 	int buflen = state-&gt;bufcnt;</div><div class='ctx'> </div><div class='add'>+	if (!(state-&gt;flags &amp; HASH_FLAGS_CPU)) {</div><div class='add'>+		hdev-&gt;flags |= HASH_FLAGS_FINAL;</div><div class='add'>+		return stm32_hash_dma_send(hdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (state-&gt;flags &amp; HASH_FLAGS_FINUP)</div><div class='ctx'> 		return stm32_hash_update_req(hdev);</div><div class='ctx'> </div><div class='hunk'>@@ -968,15 +997,21 @@ static int stm32_hash_finish(struct ahash_request *req)</div><div class='ctx'> static void stm32_hash_finish_req(struct ahash_request *req, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='ctx'> 	struct stm32_hash_dev *hdev = rctx-&gt;hdev;</div><div class='ctx'> </div><div class='add'>+	if (hdev-&gt;flags &amp; HASH_FLAGS_DMA_ACTIVE)</div><div class='add'>+		state-&gt;flags |= HASH_FLAGS_DMA_ACTIVE;</div><div class='add'>+	else</div><div class='add'>+		state-&gt;flags &amp;= ~HASH_FLAGS_DMA_ACTIVE;</div><div class='add'>+</div><div class='ctx'> 	if (!err &amp;&amp; (HASH_FLAGS_FINAL &amp; hdev-&gt;flags)) {</div><div class='ctx'> 		stm32_hash_copy_hash(req);</div><div class='ctx'> 		err = stm32_hash_finish(req);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(hdev-&gt;dev);</div><div class='del'>-	pm_runtime_put_autosuspend(hdev-&gt;dev);</div><div class='add'>+	/* Finalized request mist be unprepared here */</div><div class='add'>+	stm32_hash_unprepare_request(req);</div><div class='ctx'> </div><div class='ctx'> 	crypto_finalize_hash_request(hdev-&gt;engine, req, err);</div><div class='ctx'> }</div><div class='hunk'>@@ -1006,6 +1041,10 @@ static int stm32_hash_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_sync(hdev-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	err = stm32_hash_prepare_request(req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	hdev-&gt;req = req;</div><div class='ctx'> 	hdev-&gt;flags = 0;</div><div class='ctx'> 	swap_reg = hash_swap_reg(rctx);</div><div class='hunk'>@@ -1030,6 +1069,12 @@ static int stm32_hash_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> 		if (state-&gt;flags &amp; HASH_FLAGS_HMAC)</div><div class='ctx'> 			hdev-&gt;flags |= HASH_FLAGS_HMAC |</div><div class='ctx'> 				       HASH_FLAGS_HMAC_KEY;</div><div class='add'>+</div><div class='add'>+		if (state-&gt;flags &amp; HASH_FLAGS_CPU)</div><div class='add'>+			hdev-&gt;flags |= HASH_FLAGS_CPU;</div><div class='add'>+</div><div class='add'>+		if (state-&gt;flags &amp; HASH_FLAGS_DMA_ACTIVE)</div><div class='add'>+			hdev-&gt;flags |= HASH_FLAGS_DMA_ACTIVE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rctx-&gt;op == HASH_OP_UPDATE)</div><div class='hunk'>@@ -1054,6 +1099,284 @@ static int stm32_hash_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int stm32_hash_copy_sgs(struct stm32_hash_request_ctx *rctx,</div><div class='add'>+			       struct scatterlist *sg, int bs,</div><div class='add'>+			       unsigned int new_len)</div><div class='add'>+{</div><div class='add'>+	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='add'>+	int pages;</div><div class='add'>+	void *buf;</div><div class='add'>+</div><div class='add'>+	pages = get_order(new_len);</div><div class='add'>+</div><div class='add'>+	buf = (void *)__get_free_pages(GFP_ATOMIC, pages);</div><div class='add'>+	if (!buf) {</div><div class='add'>+		pr_err("Couldn't allocate pages for unaligned cases.\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (state-&gt;bufcnt)</div><div class='add'>+		memcpy(buf, rctx-&gt;hdev-&gt;xmit_buf, state-&gt;bufcnt);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(buf + state-&gt;bufcnt, sg, rctx-&gt;offset,</div><div class='add'>+				 min(new_len, rctx-&gt;total) - state-&gt;bufcnt, 0);</div><div class='add'>+	sg_init_table(rctx-&gt;sgl, 1);</div><div class='add'>+	sg_set_buf(rctx-&gt;sgl, buf, new_len);</div><div class='add'>+	rctx-&gt;sg = rctx-&gt;sgl;</div><div class='add'>+	state-&gt;flags |= HASH_FLAGS_SGS_COPIED;</div><div class='add'>+	rctx-&gt;nents = 1;</div><div class='add'>+	rctx-&gt;offset += new_len - state-&gt;bufcnt;</div><div class='add'>+	state-&gt;bufcnt = 0;</div><div class='add'>+	rctx-&gt;total = new_len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_hash_align_sgs(struct scatterlist *sg,</div><div class='add'>+				int nbytes, int bs, bool init, bool final,</div><div class='add'>+				struct stm32_hash_request_ctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='add'>+	struct stm32_hash_dev *hdev = rctx-&gt;hdev;</div><div class='add'>+	struct scatterlist *sg_tmp = sg;</div><div class='add'>+	int offset = rctx-&gt;offset;</div><div class='add'>+	int new_len;</div><div class='add'>+	int n = 0;</div><div class='add'>+	int bufcnt = state-&gt;bufcnt;</div><div class='add'>+	bool secure_ctx = hdev-&gt;pdata-&gt;context_secured;</div><div class='add'>+	bool aligned = true;</div><div class='add'>+</div><div class='add'>+	if (!sg || !sg-&gt;length || !nbytes) {</div><div class='add'>+		if (bufcnt) {</div><div class='add'>+			bufcnt = DIV_ROUND_UP(bufcnt, bs) * bs;</div><div class='add'>+			sg_init_table(rctx-&gt;sgl, 1);</div><div class='add'>+			sg_set_buf(rctx-&gt;sgl, rctx-&gt;hdev-&gt;xmit_buf, bufcnt);</div><div class='add'>+			rctx-&gt;sg = rctx-&gt;sgl;</div><div class='add'>+			rctx-&gt;nents = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new_len = nbytes;</div><div class='add'>+</div><div class='add'>+	if (offset)</div><div class='add'>+		aligned = false;</div><div class='add'>+</div><div class='add'>+	if (final) {</div><div class='add'>+		new_len = DIV_ROUND_UP(new_len, bs) * bs;</div><div class='add'>+	} else {</div><div class='add'>+		new_len = (new_len - 1) / bs * bs; // return n block - 1 block</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Context save in some version of HASH IP can only be done when the</div><div class='add'>+		 * FIFO is ready to get a new block. This implies to send n block plus a</div><div class='add'>+		 * 32 bit word in the first DMA send.</div><div class='add'>+		 */</div><div class='add'>+		if (init &amp;&amp; secure_ctx) {</div><div class='add'>+			new_len += sizeof(u32);</div><div class='add'>+			if (unlikely(new_len &gt; nbytes))</div><div class='add'>+				new_len -= bs;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!new_len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (nbytes != new_len)</div><div class='add'>+		aligned = false;</div><div class='add'>+</div><div class='add'>+	while (nbytes &gt; 0 &amp;&amp; sg_tmp) {</div><div class='add'>+		n++;</div><div class='add'>+</div><div class='add'>+		if (bufcnt) {</div><div class='add'>+			if (!IS_ALIGNED(bufcnt, bs)) {</div><div class='add'>+				aligned = false;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			nbytes -= bufcnt;</div><div class='add'>+			bufcnt = 0;</div><div class='add'>+			if (!nbytes)</div><div class='add'>+				aligned = false;</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (offset &lt; sg_tmp-&gt;length) {</div><div class='add'>+			if (!IS_ALIGNED(offset + sg_tmp-&gt;offset, 4)) {</div><div class='add'>+				aligned = false;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!IS_ALIGNED(sg_tmp-&gt;length - offset, bs)) {</div><div class='add'>+				aligned = false;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (offset) {</div><div class='add'>+			offset -= sg_tmp-&gt;length;</div><div class='add'>+			if (offset &lt; 0) {</div><div class='add'>+				nbytes += offset;</div><div class='add'>+				offset = 0;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			nbytes -= sg_tmp-&gt;length;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sg_tmp = sg_next(sg_tmp);</div><div class='add'>+</div><div class='add'>+		if (nbytes &lt; 0) {</div><div class='add'>+			aligned = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!aligned)</div><div class='add'>+		return stm32_hash_copy_sgs(rctx, sg, bs, new_len);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;total = new_len;</div><div class='add'>+	rctx-&gt;offset += new_len;</div><div class='add'>+	rctx-&gt;nents = n;</div><div class='add'>+	if (state-&gt;bufcnt) {</div><div class='add'>+		sg_init_table(rctx-&gt;sgl, 2);</div><div class='add'>+		sg_set_buf(rctx-&gt;sgl, rctx-&gt;hdev-&gt;xmit_buf, state-&gt;bufcnt);</div><div class='add'>+		sg_chain(rctx-&gt;sgl, 2, sg);</div><div class='add'>+		rctx-&gt;sg = rctx-&gt;sgl;</div><div class='add'>+	} else {</div><div class='add'>+		rctx-&gt;sg = sg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_hash_prepare_request(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct stm32_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx);</div><div class='add'>+	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='add'>+	unsigned int nbytes;</div><div class='add'>+	int ret, hash_later, bs;</div><div class='add'>+	bool update = rctx-&gt;op &amp; HASH_OP_UPDATE;</div><div class='add'>+	bool init = !(state-&gt;flags &amp; HASH_FLAGS_INIT);</div><div class='add'>+	bool finup = state-&gt;flags &amp; HASH_FLAGS_FINUP;</div><div class='add'>+	bool final = state-&gt;flags &amp; HASH_FLAGS_FINAL;</div><div class='add'>+</div><div class='add'>+	if (!hdev-&gt;dma_lch || state-&gt;flags &amp; HASH_FLAGS_CPU)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bs = crypto_ahash_blocksize(tfm);</div><div class='add'>+</div><div class='add'>+	nbytes = state-&gt;bufcnt;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In case of update request nbytes must correspond to the content of the</div><div class='add'>+	 * buffer + the offset minus the content of the request already in the</div><div class='add'>+	 * buffer.</div><div class='add'>+	 */</div><div class='add'>+	if (update || finup)</div><div class='add'>+		nbytes += req-&gt;nbytes - rctx-&gt;offset;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hdev-&gt;dev,</div><div class='add'>+		"%s: nbytes=%d, bs=%d, total=%d, offset=%d, bufcnt=%d\n",</div><div class='add'>+		__func__, nbytes, bs, rctx-&gt;total, rctx-&gt;offset, state-&gt;bufcnt);</div><div class='add'>+</div><div class='add'>+	if (!nbytes)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;total = nbytes;</div><div class='add'>+</div><div class='add'>+	if (update &amp;&amp; req-&gt;nbytes &amp;&amp; (!IS_ALIGNED(state-&gt;bufcnt, bs))) {</div><div class='add'>+		int len = bs - state-&gt;bufcnt % bs;</div><div class='add'>+</div><div class='add'>+		if (len &gt; req-&gt;nbytes)</div><div class='add'>+			len = req-&gt;nbytes;</div><div class='add'>+		scatterwalk_map_and_copy(state-&gt;buffer + state-&gt;bufcnt, req-&gt;src,</div><div class='add'>+					 0, len, 0);</div><div class='add'>+		state-&gt;bufcnt += len;</div><div class='add'>+		rctx-&gt;offset = len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* copy buffer in a temporary one that is used for sg alignment */</div><div class='add'>+	if (state-&gt;bufcnt)</div><div class='add'>+		memcpy(hdev-&gt;xmit_buf, state-&gt;buffer, state-&gt;bufcnt);</div><div class='add'>+</div><div class='add'>+	ret = stm32_hash_align_sgs(req-&gt;src, nbytes, bs, init, final, rctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	hash_later = nbytes - rctx-&gt;total;</div><div class='add'>+	if (hash_later &lt; 0)</div><div class='add'>+		hash_later = 0;</div><div class='add'>+</div><div class='add'>+	if (hash_later &amp;&amp; hash_later &lt;= state-&gt;blocklen) {</div><div class='add'>+		scatterwalk_map_and_copy(state-&gt;buffer,</div><div class='add'>+					 req-&gt;src,</div><div class='add'>+					 req-&gt;nbytes - hash_later,</div><div class='add'>+					 hash_later, 0);</div><div class='add'>+</div><div class='add'>+		state-&gt;bufcnt = hash_later;</div><div class='add'>+	} else {</div><div class='add'>+		state-&gt;bufcnt = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hash_later &gt; state-&gt;blocklen) {</div><div class='add'>+		/* FIXME: add support of this case */</div><div class='add'>+		pr_err("Buffer contains more than one block.\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rctx-&gt;total = min(nbytes, rctx-&gt;total);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stm32_hash_unprepare_request(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='add'>+	struct stm32_hash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));</div><div class='add'>+	struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx);</div><div class='add'>+	u32 *preg = state-&gt;hw_context;</div><div class='add'>+	int swap_reg, i;</div><div class='add'>+</div><div class='add'>+	if (hdev-&gt;dma_lch)</div><div class='add'>+		dmaengine_terminate_sync(hdev-&gt;dma_lch);</div><div class='add'>+</div><div class='add'>+	if (state-&gt;flags &amp; HASH_FLAGS_SGS_COPIED)</div><div class='add'>+		free_pages((unsigned long)sg_virt(rctx-&gt;sg), get_order(rctx-&gt;sg-&gt;length));</div><div class='add'>+</div><div class='add'>+	rctx-&gt;sg = NULL;</div><div class='add'>+	rctx-&gt;offset = 0;</div><div class='add'>+</div><div class='add'>+	state-&gt;flags &amp;= ~(HASH_FLAGS_SGS_COPIED);</div><div class='add'>+</div><div class='add'>+	if (!(hdev-&gt;flags &amp; HASH_FLAGS_INIT))</div><div class='add'>+		goto pm_runtime;</div><div class='add'>+</div><div class='add'>+	state-&gt;flags |= HASH_FLAGS_INIT;</div><div class='add'>+</div><div class='add'>+	if (stm32_hash_wait_busy(hdev)) {</div><div class='add'>+		dev_warn(hdev-&gt;dev, "Wait busy failed.");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	swap_reg = hash_swap_reg(rctx);</div><div class='add'>+</div><div class='add'>+	if (!hdev-&gt;pdata-&gt;ux500)</div><div class='add'>+		*preg++ = stm32_hash_read(hdev, HASH_IMR);</div><div class='add'>+	*preg++ = stm32_hash_read(hdev, HASH_STR);</div><div class='add'>+	*preg++ = stm32_hash_read(hdev, HASH_CR);</div><div class='add'>+	for (i = 0; i &lt; swap_reg; i++)</div><div class='add'>+		*preg++ = stm32_hash_read(hdev, HASH_CSR(i));</div><div class='add'>+</div><div class='add'>+pm_runtime:</div><div class='add'>+	pm_runtime_mark_last_busy(hdev-&gt;dev);</div><div class='add'>+	pm_runtime_put_autosuspend(hdev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int stm32_hash_enqueue(struct ahash_request *req, unsigned int op)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='hunk'>@@ -1070,16 +1393,26 @@ static int stm32_hash_update(struct ahash_request *req)</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='ctx'> 	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='ctx'> </div><div class='del'>-	if (!req-&gt;nbytes || !(state-&gt;flags &amp; HASH_FLAGS_CPU))</div><div class='add'>+	if (!req-&gt;nbytes)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;total = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;sg = req-&gt;src;</div><div class='del'>-	rctx-&gt;offset = 0;</div><div class='ctx'> </div><div class='del'>-	if ((state-&gt;bufcnt + rctx-&gt;total &lt; state-&gt;blocklen)) {</div><div class='del'>-		stm32_hash_append_sg(rctx);</div><div class='del'>-		return 0;</div><div class='add'>+	if (state-&gt;flags &amp; HASH_FLAGS_CPU) {</div><div class='add'>+		rctx-&gt;total = req-&gt;nbytes;</div><div class='add'>+		rctx-&gt;sg = req-&gt;src;</div><div class='add'>+		rctx-&gt;offset = 0;</div><div class='add'>+</div><div class='add'>+		if ((state-&gt;bufcnt + rctx-&gt;total &lt; state-&gt;blocklen)) {</div><div class='add'>+			stm32_hash_append_sg(rctx);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} else { /* DMA mode */</div><div class='add'>+		if (state-&gt;bufcnt + req-&gt;nbytes &lt;= state-&gt;blocklen) {</div><div class='add'>+			scatterwalk_map_and_copy(state-&gt;buffer + state-&gt;bufcnt, req-&gt;src,</div><div class='add'>+						 0, req-&gt;nbytes, 0);</div><div class='add'>+			state-&gt;bufcnt += req-&gt;nbytes;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return stm32_hash_enqueue(req, HASH_OP_UPDATE);</div><div class='hunk'>@@ -1098,20 +1431,18 @@ static int stm32_hash_final(struct ahash_request *req)</div><div class='ctx'> static int stm32_hash_finup(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct stm32_hash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));</div><div class='del'>-	struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx);</div><div class='ctx'> 	struct stm32_hash_state *state = &amp;rctx-&gt;state;</div><div class='ctx'> </div><div class='ctx'> 	if (!req-&gt;nbytes)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;flags |= HASH_FLAGS_FINUP;</div><div class='del'>-	rctx-&gt;total = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;sg = req-&gt;src;</div><div class='del'>-	rctx-&gt;offset = 0;</div><div class='ctx'> </div><div class='del'>-	if (hdev-&gt;dma_lch &amp;&amp; stm32_hash_dma_aligned_data(req))</div><div class='del'>-		state-&gt;flags &amp;= ~HASH_FLAGS_CPU;</div><div class='add'>+	if ((state-&gt;flags &amp; HASH_FLAGS_CPU)) {</div><div class='add'>+		rctx-&gt;total = req-&gt;nbytes;</div><div class='add'>+		rctx-&gt;sg = req-&gt;src;</div><div class='add'>+		rctx-&gt;offset = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return stm32_hash_final(req);</div><div class='hunk'>@@ -1215,7 +1546,6 @@ static int stm32_hash_cra_sha3_hmac_init(struct crypto_tfm *tfm)</div><div class='ctx'> 					HASH_FLAGS_HMAC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void stm32_hash_cra_exit(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='hunk'>@@ -1228,14 +1558,9 @@ static irqreturn_t stm32_hash_irq_thread(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_hash_dev *hdev = dev_id;</div><div class='ctx'> </div><div class='del'>-	if (HASH_FLAGS_CPU &amp; hdev-&gt;flags) {</div><div class='del'>-		if (HASH_FLAGS_OUTPUT_READY &amp; hdev-&gt;flags) {</div><div class='del'>-			hdev-&gt;flags &amp;= ~HASH_FLAGS_OUTPUT_READY;</div><div class='del'>-			goto finish;</div><div class='del'>-		}</div><div class='del'>-	} else if (HASH_FLAGS_DMA_ACTIVE &amp; hdev-&gt;flags) {</div><div class='del'>-		hdev-&gt;flags &amp;= ~HASH_FLAGS_DMA_ACTIVE;</div><div class='del'>-			goto finish;</div><div class='add'>+	if (HASH_FLAGS_OUTPUT_READY &amp; hdev-&gt;flags) {</div><div class='add'>+		hdev-&gt;flags &amp;= ~HASH_FLAGS_OUTPUT_READY;</div><div class='add'>+		goto finish;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -1984,6 +2309,7 @@ static const struct stm32_hash_pdata stm32_hash_pdata_stm32mp13 = {</div><div class='ctx'> 	.algs_info_size	= ARRAY_SIZE(stm32_hash_algs_info_stm32mp13),</div><div class='ctx'> 	.has_sr		= true,</div><div class='ctx'> 	.has_mdmat	= true,</div><div class='add'>+	.context_secured = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id stm32_hash_of_match[] = {</div><div class='head'>diff --git a/drivers/crypto/tegra/Makefile b/drivers/crypto/tegra/Makefile<br/>new file mode 100644<br/>index 000000000000..a32001e58eb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/tegra/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+tegra-se-objs := tegra-se-key.o tegra-se-main.o</div><div class='add'>+</div><div class='add'>+tegra-se-y += tegra-se-aes.o</div><div class='add'>+tegra-se-y += tegra-se-hash.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_TEGRA) += tegra-se.o</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se-aes.c b/drivers/crypto/tegra/tegra-se-aes.c<br/>new file mode 100644<br/>index 000000000000..ae7a0f8435fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-aes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/tegra/tegra-se-aes.c</a></div><div class='hunk'>@@ -0,0 +1,1933 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+/*</div><div class='add'>+ * Crypto driver to handle block cipher algorithms using NVIDIA Security Engine.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/engine.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra-se.h"</div><div class='add'>+</div><div class='add'>+struct tegra_aes_ctx {</div><div class='add'>+	struct tegra_se *se;</div><div class='add'>+	u32 alg;</div><div class='add'>+	u32 ivsize;</div><div class='add'>+	u32 key1_id;</div><div class='add'>+	u32 key2_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_aes_reqctx {</div><div class='add'>+	struct tegra_se_datbuf datbuf;</div><div class='add'>+	bool encrypt;</div><div class='add'>+	u32 config;</div><div class='add'>+	u32 crypto_config;</div><div class='add'>+	u32 len;</div><div class='add'>+	u32 *iv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_aead_ctx {</div><div class='add'>+	struct tegra_se *se;</div><div class='add'>+	unsigned int authsize;</div><div class='add'>+	u32 alg;</div><div class='add'>+	u32 keylen;</div><div class='add'>+	u32 key_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_aead_reqctx {</div><div class='add'>+	struct tegra_se_datbuf inbuf;</div><div class='add'>+	struct tegra_se_datbuf outbuf;</div><div class='add'>+	struct scatterlist *src_sg;</div><div class='add'>+	struct scatterlist *dst_sg;</div><div class='add'>+	unsigned int assoclen;</div><div class='add'>+	unsigned int cryptlen;</div><div class='add'>+	unsigned int authsize;</div><div class='add'>+	bool encrypt;</div><div class='add'>+	u32 config;</div><div class='add'>+	u32 crypto_config;</div><div class='add'>+	u32 key_id;</div><div class='add'>+	u32 iv[4];</div><div class='add'>+	u8 authdata[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_cmac_ctx {</div><div class='add'>+	struct tegra_se *se;</div><div class='add'>+	unsigned int alg;</div><div class='add'>+	u32 key_id;</div><div class='add'>+	struct crypto_shash *fallback_tfm;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_cmac_reqctx {</div><div class='add'>+	struct scatterlist *src_sg;</div><div class='add'>+	struct tegra_se_datbuf datbuf;</div><div class='add'>+	struct tegra_se_datbuf residue;</div><div class='add'>+	unsigned int total_len;</div><div class='add'>+	unsigned int blk_size;</div><div class='add'>+	unsigned int task;</div><div class='add'>+	u32 crypto_config;</div><div class='add'>+	u32 config;</div><div class='add'>+	u32 key_id;</div><div class='add'>+	u32 *iv;</div><div class='add'>+	u32 result[CMAC_RESULT_REG_COUNT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* increment counter (128-bit int) */</div><div class='add'>+static void ctr_iv_inc(__u8 *counter, __u8 bits, __u32 nums)</div><div class='add'>+{</div><div class='add'>+	do {</div><div class='add'>+		--bits;</div><div class='add'>+		nums += counter[bits];</div><div class='add'>+		counter[bits] = nums &amp; 0xff;</div><div class='add'>+		nums &gt;&gt;= 8;</div><div class='add'>+	} while (bits &amp;&amp; nums);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_cbc_iv_copyback(struct skcipher_request *req, struct tegra_aes_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aes_reqctx *rctx = skcipher_request_ctx(req);</div><div class='add'>+	unsigned int offset;</div><div class='add'>+</div><div class='add'>+	offset = req-&gt;cryptlen - ctx-&gt;ivsize;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;encrypt)</div><div class='add'>+		memcpy(req-&gt;iv, rctx-&gt;datbuf.buf + offset, ctx-&gt;ivsize);</div><div class='add'>+	else</div><div class='add'>+		scatterwalk_map_and_copy(req-&gt;iv, req-&gt;src, offset, ctx-&gt;ivsize, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_aes_update_iv(struct skcipher_request *req, struct tegra_aes_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int num;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;alg == SE_ALG_CBC) {</div><div class='add'>+		tegra_cbc_iv_copyback(req, ctx);</div><div class='add'>+	} else if (ctx-&gt;alg == SE_ALG_CTR) {</div><div class='add'>+		num = req-&gt;cryptlen / ctx-&gt;ivsize;</div><div class='add'>+		if (req-&gt;cryptlen % ctx-&gt;ivsize)</div><div class='add'>+			num++;</div><div class='add'>+</div><div class='add'>+		ctr_iv_inc(req-&gt;iv, ctx-&gt;ivsize, num);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra234_aes_crypto_cfg(u32 alg, bool encrypt)</div><div class='add'>+{</div><div class='add'>+	switch (alg) {</div><div class='add'>+	case SE_ALG_CMAC:</div><div class='add'>+	case SE_ALG_GMAC:</div><div class='add'>+	case SE_ALG_GCM:</div><div class='add'>+	case SE_ALG_GCM_FINAL:</div><div class='add'>+		return 0;</div><div class='add'>+	case SE_ALG_CBC:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CRYPTO_CFG_CBC_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CRYPTO_CFG_CBC_DECRYPT;</div><div class='add'>+	case SE_ALG_ECB:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CRYPTO_CFG_ECB_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CRYPTO_CFG_ECB_DECRYPT;</div><div class='add'>+	case SE_ALG_XTS:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CRYPTO_CFG_XTS_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CRYPTO_CFG_XTS_DECRYPT;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_CTR:</div><div class='add'>+		return SE_CRYPTO_CFG_CTR;</div><div class='add'>+	case SE_ALG_CBC_MAC:</div><div class='add'>+		return SE_CRYPTO_CFG_CBC_MAC;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra234_aes_cfg(u32 alg, bool encrypt)</div><div class='add'>+{</div><div class='add'>+	switch (alg) {</div><div class='add'>+	case SE_ALG_CBC:</div><div class='add'>+	case SE_ALG_ECB:</div><div class='add'>+	case SE_ALG_XTS:</div><div class='add'>+	case SE_ALG_CTR:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CFG_AES_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CFG_AES_DECRYPT;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_GMAC:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CFG_GMAC_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CFG_GMAC_DECRYPT;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_GCM:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CFG_GCM_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CFG_GCM_DECRYPT;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_GCM_FINAL:</div><div class='add'>+		if (encrypt)</div><div class='add'>+			return SE_CFG_GCM_FINAL_ENCRYPT;</div><div class='add'>+		else</div><div class='add'>+			return SE_CFG_GCM_FINAL_DECRYPT;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_CMAC:</div><div class='add'>+		return SE_CFG_CMAC;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_CBC_MAC:</div><div class='add'>+		return SE_AES_ENC_ALG_AES_ENC |</div><div class='add'>+		       SE_AES_DST_HASH_REG;</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_aes_prep_cmd(struct tegra_aes_ctx *ctx,</div><div class='add'>+				       struct tegra_aes_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int data_count, res_bits, i = 0, j;</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+	dma_addr_t addr = rctx-&gt;datbuf.addr;</div><div class='add'>+</div><div class='add'>+	data_count = rctx-&gt;len / AES_BLOCK_SIZE;</div><div class='add'>+	res_bits = (rctx-&gt;len % AES_BLOCK_SIZE) * 8;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware processes data_count + 1 blocks.</div><div class='add'>+	 * Reduce 1 block if there is no residue</div><div class='add'>+	 */</div><div class='add'>+	if (!res_bits)</div><div class='add'>+		data_count--;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;iv) {</div><div class='add'>+		cpuvaddr[i++] = host1x_opcode_setpayload(SE_CRYPTO_CTR_REG_COUNT);</div><div class='add'>+		cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;linear_ctr);</div><div class='add'>+		for (j = 0; j &lt; SE_CRYPTO_CTR_REG_COUNT; j++)</div><div class='add'>+			cpuvaddr[i++] = rctx-&gt;iv[j];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;last_blk, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_LAST_BLOCK_VAL(data_count) |</div><div class='add'>+			SE_LAST_BLOCK_RES_BITS(res_bits);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 6);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+</div><div class='add'>+	/* Source address setting */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(addr)) | SE_ADDR_HI_SZ(rctx-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* Destination address setting */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;len);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_AES_OP_WRSTALL | SE_AES_OP_LASTBUF |</div><div class='add'>+			SE_AES_OP_START;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(se-&gt;dev, "cfg %#x crypto cfg %#x\n", rctx-&gt;config, rctx-&gt;crypto_config);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='add'>+{</div><div class='add'>+	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);</div><div class='add'>+	struct tegra_aes_ctx *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));</div><div class='add'>+	struct tegra_aes_reqctx *rctx = skcipher_request_ctx(req);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	unsigned int cmdlen;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;datbuf.buf = dma_alloc_coherent(se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+					      &amp;rctx-&gt;datbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;datbuf.buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;datbuf.size = SE_AES_BUFLEN;</div><div class='add'>+	rctx-&gt;iv = (u32 *)req-&gt;iv;</div><div class='add'>+	rctx-&gt;len = req-&gt;cryptlen;</div><div class='add'>+</div><div class='add'>+	/* Pad input to AES Block size */</div><div class='add'>+	if (ctx-&gt;alg != SE_ALG_XTS) {</div><div class='add'>+		if (rctx-&gt;len % AES_BLOCK_SIZE)</div><div class='add'>+			rctx-&gt;len += AES_BLOCK_SIZE - (rctx-&gt;len % AES_BLOCK_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;datbuf.buf, req-&gt;src, 0, req-&gt;cryptlen, 0);</div><div class='add'>+</div><div class='add'>+	/* Prepare the command and submit for execution */</div><div class='add'>+	cmdlen = tegra_aes_prep_cmd(ctx, rctx);</div><div class='add'>+	ret = tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+</div><div class='add'>+	/* Copy the result */</div><div class='add'>+	tegra_aes_update_iv(req, ctx);</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;datbuf.buf, req-&gt;dst, 0, req-&gt;cryptlen, 1);</div><div class='add'>+</div><div class='add'>+	/* Free the buffer */</div><div class='add'>+	dma_free_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+			  rctx-&gt;datbuf.buf, rctx-&gt;datbuf.addr);</div><div class='add'>+</div><div class='add'>+	crypto_finalize_skcipher_request(se-&gt;engine, req, ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_cra_init(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);</div><div class='add'>+	struct tegra_se_alg *se_alg;</div><div class='add'>+	const char *algname;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	se_alg = container_of(alg, struct tegra_se_alg, alg.skcipher.base);</div><div class='add'>+</div><div class='add'>+	crypto_skcipher_set_reqsize(tfm, sizeof(struct tegra_aes_reqctx));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;ivsize = crypto_skcipher_ivsize(tfm);</div><div class='add'>+	ctx-&gt;se = se_alg-&gt;se_dev;</div><div class='add'>+	ctx-&gt;key1_id = 0;</div><div class='add'>+	ctx-&gt;key2_id = 0;</div><div class='add'>+</div><div class='add'>+	algname = crypto_tfm_alg_name(&amp;tfm-&gt;base);</div><div class='add'>+	ret = se_algname_to_algid(algname);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ctx-&gt;se-&gt;dev, "invalid algorithm\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;alg = ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_aes_cra_exit(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aes_ctx *ctx = crypto_tfm_ctx(&amp;tfm-&gt;base);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;key1_id)</div><div class='add'>+		tegra_key_invalidate(ctx-&gt;se, ctx-&gt;key1_id, ctx-&gt;alg);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;key2_id)</div><div class='add'>+		tegra_key_invalidate(ctx-&gt;se, ctx-&gt;key2_id, ctx-&gt;alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_setkey(struct crypto_skcipher *tfm,</div><div class='add'>+			    const u8 *key, u32 keylen)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (aes_check_keylen(keylen)) {</div><div class='add'>+		dev_dbg(ctx-&gt;se-&gt;dev, "invalid key length (%d)\n", keylen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tegra_key_submit(ctx-&gt;se, key, keylen, ctx-&gt;alg, &amp;ctx-&gt;key1_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_xts_setkey(struct crypto_skcipher *tfm,</div><div class='add'>+			    const u8 *key, u32 keylen)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	u32 len = keylen / 2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xts_verify_key(tfm, key, keylen);</div><div class='add'>+	if (ret || aes_check_keylen(len)) {</div><div class='add'>+		dev_dbg(ctx-&gt;se-&gt;dev, "invalid key length (%d)\n", keylen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tegra_key_submit(ctx-&gt;se, key, len,</div><div class='add'>+			       ctx-&gt;alg, &amp;ctx-&gt;key1_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return tegra_key_submit(ctx-&gt;se, key + len, len,</div><div class='add'>+			       ctx-&gt;alg, &amp;ctx-&gt;key2_id);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_kac_manifest(u32 user, u32 alg, u32 keylen)</div><div class='add'>+{</div><div class='add'>+	int manifest;</div><div class='add'>+</div><div class='add'>+	manifest = SE_KAC_USER_NS;</div><div class='add'>+</div><div class='add'>+	switch (alg) {</div><div class='add'>+	case SE_ALG_CBC:</div><div class='add'>+	case SE_ALG_ECB:</div><div class='add'>+	case SE_ALG_CTR:</div><div class='add'>+		manifest |= SE_KAC_ENC;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_XTS:</div><div class='add'>+		manifest |= SE_KAC_XTS;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_GCM:</div><div class='add'>+		manifest |= SE_KAC_GCM;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_CMAC:</div><div class='add'>+		manifest |= SE_KAC_CMAC;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_CBC_MAC:</div><div class='add'>+		manifest |= SE_KAC_ENC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (keylen) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		manifest |= SE_KAC_SIZE_128;</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		manifest |= SE_KAC_SIZE_192;</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+		manifest |= SE_KAC_SIZE_256;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return manifest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_crypt(struct skcipher_request *req, bool encrypt)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	struct crypto_skcipher *tfm;</div><div class='add'>+	struct tegra_aes_ctx *ctx;</div><div class='add'>+	struct tegra_aes_reqctx *rctx;</div><div class='add'>+</div><div class='add'>+	tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	ctx  = crypto_skcipher_ctx(tfm);</div><div class='add'>+	rctx = skcipher_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;alg != SE_ALG_XTS) {</div><div class='add'>+		if (!IS_ALIGNED(req-&gt;cryptlen, crypto_skcipher_blocksize(tfm))) {</div><div class='add'>+			dev_dbg(ctx-&gt;se-&gt;dev, "invalid length (%d)", req-&gt;cryptlen);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else if (req-&gt;cryptlen &lt; XTS_BLOCK_SIZE) {</div><div class='add'>+		dev_dbg(ctx-&gt;se-&gt;dev, "invalid length (%d)", req-&gt;cryptlen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!req-&gt;cryptlen)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;encrypt = encrypt;</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(ctx-&gt;alg, encrypt);</div><div class='add'>+	rctx-&gt;crypto_config = tegra234_aes_crypto_cfg(ctx-&gt;alg, encrypt);</div><div class='add'>+	rctx-&gt;crypto_config |= SE_AES_KEY_INDEX(ctx-&gt;key1_id);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;key2_id)</div><div class='add'>+		rctx-&gt;crypto_config |= SE_AES_KEY2_INDEX(ctx-&gt;key2_id);</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_skcipher_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_encrypt(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	return tegra_aes_crypt(req, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aes_decrypt(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	return tegra_aes_crypt(req, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tegra_se_alg tegra_aes_algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.alg.skcipher.op.do_one_request	= tegra_aes_do_one_req,</div><div class='add'>+		.alg.skcipher.base = {</div><div class='add'>+			.init = tegra_aes_cra_init,</div><div class='add'>+			.exit = tegra_aes_cra_exit,</div><div class='add'>+			.setkey	= tegra_aes_setkey,</div><div class='add'>+			.encrypt = tegra_aes_encrypt,</div><div class='add'>+			.decrypt = tegra_aes_decrypt,</div><div class='add'>+			.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize	= AES_BLOCK_SIZE,</div><div class='add'>+			.base = {</div><div class='add'>+				.cra_name = "cbc(aes)",</div><div class='add'>+				.cra_driver_name = "cbc-aes-tegra",</div><div class='add'>+				.cra_priority = 500,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+				.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_aes_ctx),</div><div class='add'>+				.cra_alignmask = 0xf,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.skcipher.op.do_one_request	= tegra_aes_do_one_req,</div><div class='add'>+		.alg.skcipher.base = {</div><div class='add'>+			.init = tegra_aes_cra_init,</div><div class='add'>+			.exit = tegra_aes_cra_exit,</div><div class='add'>+			.setkey	= tegra_aes_setkey,</div><div class='add'>+			.encrypt = tegra_aes_encrypt,</div><div class='add'>+			.decrypt = tegra_aes_decrypt,</div><div class='add'>+			.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+			.base = {</div><div class='add'>+				.cra_name = "ecb(aes)",</div><div class='add'>+				.cra_driver_name = "ecb-aes-tegra",</div><div class='add'>+				.cra_priority = 500,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+				.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_aes_ctx),</div><div class='add'>+				.cra_alignmask = 0xf,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.skcipher.op.do_one_request	= tegra_aes_do_one_req,</div><div class='add'>+		.alg.skcipher.base = {</div><div class='add'>+			.init = tegra_aes_cra_init,</div><div class='add'>+			.exit = tegra_aes_cra_exit,</div><div class='add'>+			.setkey = tegra_aes_setkey,</div><div class='add'>+			.encrypt = tegra_aes_encrypt,</div><div class='add'>+			.decrypt = tegra_aes_decrypt,</div><div class='add'>+			.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize	= AES_BLOCK_SIZE,</div><div class='add'>+			.base = {</div><div class='add'>+				.cra_name = "ctr(aes)",</div><div class='add'>+				.cra_driver_name = "ctr-aes-tegra",</div><div class='add'>+				.cra_priority = 500,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+				.cra_blocksize = 1,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_aes_ctx),</div><div class='add'>+				.cra_alignmask = 0xf,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.skcipher.op.do_one_request	= tegra_aes_do_one_req,</div><div class='add'>+		.alg.skcipher.base = {</div><div class='add'>+			.init = tegra_aes_cra_init,</div><div class='add'>+			.exit = tegra_aes_cra_exit,</div><div class='add'>+			.setkey	= tegra_xts_setkey,</div><div class='add'>+			.encrypt = tegra_aes_encrypt,</div><div class='add'>+			.decrypt = tegra_aes_decrypt,</div><div class='add'>+			.min_keysize = 2 * AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize = 2 * AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize	= AES_BLOCK_SIZE,</div><div class='add'>+			.base = {</div><div class='add'>+				.cra_name = "xts(aes)",</div><div class='add'>+				.cra_driver_name = "xts-aes-tegra",</div><div class='add'>+				.cra_priority = 500,</div><div class='add'>+				.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize	   = sizeof(struct tegra_aes_ctx),</div><div class='add'>+				.cra_alignmask	   = (__alignof__(u64) - 1),</div><div class='add'>+				.cra_module	   = THIS_MODULE,</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_gmac_prep_cmd(struct tegra_aead_ctx *ctx,</div><div class='add'>+					struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int data_count, res_bits, i = 0;</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+</div><div class='add'>+	data_count = (rctx-&gt;assoclen / AES_BLOCK_SIZE);</div><div class='add'>+	res_bits = (rctx-&gt;assoclen % AES_BLOCK_SIZE) * 8;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware processes data_count + 1 blocks.</div><div class='add'>+	 * Reduce 1 block if there is no residue</div><div class='add'>+	 */</div><div class='add'>+	if (!res_bits)</div><div class='add'>+		data_count--;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;last_blk, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_LAST_BLOCK_VAL(data_count) |</div><div class='add'>+			SE_LAST_BLOCK_RES_BITS(res_bits);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 4);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;inbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;inbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;assoclen);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_AES_OP_WRSTALL | SE_AES_OP_FINAL |</div><div class='add'>+			SE_AES_OP_INIT | SE_AES_OP_LASTBUF |</div><div class='add'>+			SE_AES_OP_START;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_gcm_crypt_prep_cmd(struct tegra_aead_ctx *ctx,</div><div class='add'>+					     struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int data_count, res_bits, i = 0, j;</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr, op;</div><div class='add'>+</div><div class='add'>+	data_count = (rctx-&gt;cryptlen / AES_BLOCK_SIZE);</div><div class='add'>+	res_bits = (rctx-&gt;cryptlen % AES_BLOCK_SIZE) * 8;</div><div class='add'>+	op = SE_AES_OP_WRSTALL | SE_AES_OP_FINAL |</div><div class='add'>+	     SE_AES_OP_LASTBUF | SE_AES_OP_START;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If there is no assoc data,</div><div class='add'>+	 * this will be the init command</div><div class='add'>+	 */</div><div class='add'>+	if (!rctx-&gt;assoclen)</div><div class='add'>+		op |= SE_AES_OP_INIT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware processes data_count + 1 blocks.</div><div class='add'>+	 * Reduce 1 block if there is no residue</div><div class='add'>+	 */</div><div class='add'>+	if (!res_bits)</div><div class='add'>+		data_count--;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(SE_CRYPTO_CTR_REG_COUNT);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;linear_ctr);</div><div class='add'>+	for (j = 0; j &lt; SE_CRYPTO_CTR_REG_COUNT; j++)</div><div class='add'>+		cpuvaddr[i++] = rctx-&gt;iv[j];</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;last_blk, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_LAST_BLOCK_VAL(data_count) |</div><div class='add'>+			SE_LAST_BLOCK_RES_BITS(res_bits);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 6);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+</div><div class='add'>+	/* Source Address */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;inbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;inbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;cryptlen);</div><div class='add'>+</div><div class='add'>+	/* Destination Address */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;outbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;outbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;cryptlen);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = op;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(se-&gt;dev, "cfg %#x crypto cfg %#x\n", rctx-&gt;config, rctx-&gt;crypto_config);</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_prep_final_cmd(struct tegra_se *se, u32 *cpuvaddr,</div><div class='add'>+				    struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0, j;</div><div class='add'>+	u32 op;</div><div class='add'>+</div><div class='add'>+	op = SE_AES_OP_WRSTALL | SE_AES_OP_FINAL |</div><div class='add'>+	     SE_AES_OP_LASTBUF | SE_AES_OP_START;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set init for zero sized vector</div><div class='add'>+	 */</div><div class='add'>+	if (!rctx-&gt;assoclen &amp;&amp; !rctx-&gt;cryptlen)</div><div class='add'>+		op |= SE_AES_OP_INIT;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;aad_len, 2);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;assoclen * 8;</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;cryp_msg_len, 2);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;cryptlen * 8;</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(SE_CRYPTO_CTR_REG_COUNT);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;linear_ctr);</div><div class='add'>+	for (j = 0; j &lt; SE_CRYPTO_CTR_REG_COUNT; j++)</div><div class='add'>+		cpuvaddr[i++] = rctx-&gt;iv[j];</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 6);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+</div><div class='add'>+	/* Destination Address */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;outbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;outbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(0x10); /* HW always generates 128-bit tag */</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = op;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(se-&gt;dev, "cfg %#x crypto cfg %#x\n", rctx-&gt;config, rctx-&gt;crypto_config);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_do_gmac(struct tegra_aead_ctx *ctx, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	unsigned int cmdlen;</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;inbuf.buf,</div><div class='add'>+				 rctx-&gt;src_sg, 0, rctx-&gt;assoclen, 0);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_GMAC, rctx-&gt;encrypt);</div><div class='add'>+	rctx-&gt;crypto_config = tegra234_aes_crypto_cfg(SE_ALG_GMAC, rctx-&gt;encrypt) |</div><div class='add'>+			      SE_AES_KEY_INDEX(ctx-&gt;key_id);</div><div class='add'>+</div><div class='add'>+	cmdlen = tegra_gmac_prep_cmd(ctx, rctx);</div><div class='add'>+</div><div class='add'>+	return tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_do_crypt(struct tegra_aead_ctx *ctx, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	int cmdlen, ret;</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;inbuf.buf, rctx-&gt;src_sg,</div><div class='add'>+				 rctx-&gt;assoclen, rctx-&gt;cryptlen, 0);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_GCM, rctx-&gt;encrypt);</div><div class='add'>+	rctx-&gt;crypto_config = tegra234_aes_crypto_cfg(SE_ALG_GCM, rctx-&gt;encrypt) |</div><div class='add'>+			      SE_AES_KEY_INDEX(ctx-&gt;key_id);</div><div class='add'>+</div><div class='add'>+	/* Prepare command and submit */</div><div class='add'>+	cmdlen = tegra_gcm_crypt_prep_cmd(ctx, rctx);</div><div class='add'>+	ret = tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Copy the result */</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;outbuf.buf, rctx-&gt;dst_sg,</div><div class='add'>+				 rctx-&gt;assoclen, rctx-&gt;cryptlen, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_do_final(struct tegra_aead_ctx *ctx, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+	int cmdlen, ret, offset;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_GCM_FINAL, rctx-&gt;encrypt);</div><div class='add'>+	rctx-&gt;crypto_config = tegra234_aes_crypto_cfg(SE_ALG_GCM_FINAL, rctx-&gt;encrypt) |</div><div class='add'>+			      SE_AES_KEY_INDEX(ctx-&gt;key_id);</div><div class='add'>+</div><div class='add'>+	/* Prepare command and submit */</div><div class='add'>+	cmdlen = tegra_gcm_prep_final_cmd(se, cpuvaddr, rctx);</div><div class='add'>+	ret = tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;encrypt) {</div><div class='add'>+		/* Copy the result */</div><div class='add'>+		offset = rctx-&gt;assoclen + rctx-&gt;cryptlen;</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;outbuf.buf, rctx-&gt;dst_sg,</div><div class='add'>+					 offset, rctx-&gt;authsize, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_do_verify(struct tegra_se *se, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	u8 mac[16];</div><div class='add'>+</div><div class='add'>+	offset = rctx-&gt;assoclen + rctx-&gt;cryptlen;</div><div class='add'>+	scatterwalk_map_and_copy(mac, rctx-&gt;src_sg, offset, rctx-&gt;authsize, 0);</div><div class='add'>+</div><div class='add'>+	if (crypto_memneq(rctx-&gt;outbuf.buf, mac, rctx-&gt;authsize))</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tegra_ccm_check_iv(const u8 *iv)</div><div class='add'>+{</div><div class='add'>+	/* iv[0] gives value of q-1</div><div class='add'>+	 * 2 &lt;= q &lt;= 8 as per NIST 800-38C notation</div><div class='add'>+	 * 2 &lt;= L &lt;= 8, so 1 &lt;= L' &lt;= 7. as per rfc 3610 notation</div><div class='add'>+	 */</div><div class='add'>+	if (iv[0] &lt; 1 || iv[0] &gt; 7) {</div><div class='add'>+		pr_debug("ccm_check_iv failed %d\n", iv[0]);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_cbcmac_prep_cmd(struct tegra_aead_ctx *ctx,</div><div class='add'>+					  struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int data_count, i = 0;</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+</div><div class='add'>+	data_count = (rctx-&gt;inbuf.size / AES_BLOCK_SIZE) - 1;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;last_blk, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_LAST_BLOCK_VAL(data_count);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 6);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;inbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;inbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;inbuf.size);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;outbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;outbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(0x10); /* HW always generates 128 bit tag */</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_AES_OP_WRSTALL |</div><div class='add'>+			SE_AES_OP_LASTBUF | SE_AES_OP_START;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_ctr_prep_cmd(struct tegra_aead_ctx *ctx,</div><div class='add'>+				       struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0, j;</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(SE_CRYPTO_CTR_REG_COUNT);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;linear_ctr);</div><div class='add'>+	for (j = 0; j &lt; SE_CRYPTO_CTR_REG_COUNT; j++)</div><div class='add'>+		cpuvaddr[i++] = rctx-&gt;iv[j];</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;last_blk, 1);</div><div class='add'>+	cpuvaddr[i++] = (rctx-&gt;inbuf.size / AES_BLOCK_SIZE) - 1;</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 6);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+</div><div class='add'>+	/* Source address setting */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;inbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;inbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;inbuf.size);</div><div class='add'>+</div><div class='add'>+	/* Destination address setting */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;outbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;outbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;inbuf.size);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_AES_OP_WRSTALL | SE_AES_OP_LASTBUF |</div><div class='add'>+			SE_AES_OP_START;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(se-&gt;dev, "cfg %#x crypto cfg %#x\n",</div><div class='add'>+		rctx-&gt;config, rctx-&gt;crypto_config);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_do_cbcmac(struct tegra_aead_ctx *ctx, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	int cmdlen;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_CBC_MAC, rctx-&gt;encrypt);</div><div class='add'>+	rctx-&gt;crypto_config = tegra234_aes_crypto_cfg(SE_ALG_CBC_MAC,</div><div class='add'>+						      rctx-&gt;encrypt) |</div><div class='add'>+						      SE_AES_KEY_INDEX(ctx-&gt;key_id);</div><div class='add'>+</div><div class='add'>+	/* Prepare command and submit */</div><div class='add'>+	cmdlen = tegra_cbcmac_prep_cmd(ctx, rctx);</div><div class='add'>+</div><div class='add'>+	return tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)</div><div class='add'>+{</div><div class='add'>+	__be32 data;</div><div class='add'>+</div><div class='add'>+	memset(block, 0, csize);</div><div class='add'>+	block += csize;</div><div class='add'>+</div><div class='add'>+	if (csize &gt;= 4)</div><div class='add'>+		csize = 4;</div><div class='add'>+	else if (msglen &gt; (1 &lt;&lt; (8 * csize)))</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+</div><div class='add'>+	data = cpu_to_be32(msglen);</div><div class='add'>+	memcpy(block - csize, (u8 *)&amp;data + 4 - csize, csize);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_format_nonce(struct tegra_aead_reqctx *rctx, u8 *nonce)</div><div class='add'>+{</div><div class='add'>+	unsigned int q, t;</div><div class='add'>+	u8 *q_ptr, *iv = (u8 *)rctx-&gt;iv;</div><div class='add'>+</div><div class='add'>+	memcpy(nonce, rctx-&gt;iv, 16);</div><div class='add'>+</div><div class='add'>+	/*** 1. Prepare Flags Octet ***/</div><div class='add'>+</div><div class='add'>+	/* Encode t (mac length) */</div><div class='add'>+	t = rctx-&gt;authsize;</div><div class='add'>+	nonce[0] |= (((t - 2) / 2) &lt;&lt; 3);</div><div class='add'>+</div><div class='add'>+	/* Adata */</div><div class='add'>+	if (rctx-&gt;assoclen)</div><div class='add'>+		nonce[0] |= (1 &lt;&lt; 6);</div><div class='add'>+</div><div class='add'>+	/*** Encode Q - message length ***/</div><div class='add'>+	q = iv[0] + 1;</div><div class='add'>+	q_ptr = nonce + 16 - q;</div><div class='add'>+</div><div class='add'>+	return tegra_ccm_set_msg_len(q_ptr, rctx-&gt;cryptlen, q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_format_adata(u8 *adata, unsigned int a)</div><div class='add'>+{</div><div class='add'>+	int len = 0;</div><div class='add'>+</div><div class='add'>+	/* add control info for associated data</div><div class='add'>+	 * RFC 3610 and NIST Special Publication 800-38C</div><div class='add'>+	 */</div><div class='add'>+	if (a &lt; 65280) {</div><div class='add'>+		*(__be16 *)adata = cpu_to_be16(a);</div><div class='add'>+		len = 2;</div><div class='add'>+	} else	{</div><div class='add'>+		*(__be16 *)adata = cpu_to_be16(0xfffe);</div><div class='add'>+		*(__be32 *)&amp;adata[2] = cpu_to_be32(a);</div><div class='add'>+		len = 6;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_add_padding(u8 *buf, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	unsigned int padlen = 16 - (len % 16);</div><div class='add'>+	u8 padding[16] = {0};</div><div class='add'>+</div><div class='add'>+	if (padlen == 16)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	memcpy(buf, padding, padlen);</div><div class='add'>+</div><div class='add'>+	return padlen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_format_blocks(struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int alen = 0, offset = 0;</div><div class='add'>+	u8 nonce[16], adata[16];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = tegra_ccm_format_nonce(rctx, nonce);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memcpy(rctx-&gt;inbuf.buf, nonce, 16);</div><div class='add'>+	offset = 16;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;assoclen) {</div><div class='add'>+		alen = tegra_ccm_format_adata(adata, rctx-&gt;assoclen);</div><div class='add'>+		memcpy(rctx-&gt;inbuf.buf + offset, adata, alen);</div><div class='add'>+		offset += alen;</div><div class='add'>+</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;inbuf.buf + offset,</div><div class='add'>+					 rctx-&gt;src_sg, 0, rctx-&gt;assoclen, 0);</div><div class='add'>+</div><div class='add'>+		offset += rctx-&gt;assoclen;</div><div class='add'>+		offset += tegra_ccm_add_padding(rctx-&gt;inbuf.buf + offset,</div><div class='add'>+					 rctx-&gt;assoclen + alen);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_mac_result(struct tegra_se *se, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	u32 result[16];</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* Read and clear Result */</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		result[i] = readl(se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		writel(0, se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;encrypt) {</div><div class='add'>+		memcpy(rctx-&gt;authdata, result, rctx-&gt;authsize);</div><div class='add'>+	} else {</div><div class='add'>+		ret = crypto_memneq(rctx-&gt;authdata, result, rctx-&gt;authsize);</div><div class='add'>+		if (ret)</div><div class='add'>+			return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_ctr_result(struct tegra_se *se, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	/* Copy result */</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;outbuf.buf + 16, rctx-&gt;dst_sg,</div><div class='add'>+				 rctx-&gt;assoclen, rctx-&gt;cryptlen, 1);</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;encrypt)</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;outbuf.buf, rctx-&gt;dst_sg,</div><div class='add'>+					 rctx-&gt;assoclen + rctx-&gt;cryptlen,</div><div class='add'>+					 rctx-&gt;authsize, 1);</div><div class='add'>+	else</div><div class='add'>+		memcpy(rctx-&gt;authdata, rctx-&gt;outbuf.buf, rctx-&gt;authsize);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_compute_auth(struct tegra_aead_ctx *ctx, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	int offset, ret;</div><div class='add'>+</div><div class='add'>+	offset = tegra_ccm_format_blocks(rctx);</div><div class='add'>+	if (offset &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Copy plain text to the buffer */</div><div class='add'>+	sg = rctx-&gt;encrypt ? rctx-&gt;src_sg : rctx-&gt;dst_sg;</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;inbuf.buf + offset,</div><div class='add'>+				 sg, rctx-&gt;assoclen,</div><div class='add'>+				 rctx-&gt;cryptlen, 0);</div><div class='add'>+	offset += rctx-&gt;cryptlen;</div><div class='add'>+	offset += tegra_ccm_add_padding(rctx-&gt;inbuf.buf + offset, rctx-&gt;cryptlen);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;inbuf.size = offset;</div><div class='add'>+</div><div class='add'>+	ret = tegra_ccm_do_cbcmac(ctx, rctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return tegra_ccm_mac_result(se, rctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_do_ctr(struct tegra_aead_ctx *ctx, struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	unsigned int cmdlen, offset = 0;</div><div class='add'>+	struct scatterlist *sg = rctx-&gt;src_sg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_CTR, rctx-&gt;encrypt);</div><div class='add'>+	rctx-&gt;crypto_config = tegra234_aes_crypto_cfg(SE_ALG_CTR, rctx-&gt;encrypt) |</div><div class='add'>+			      SE_AES_KEY_INDEX(ctx-&gt;key_id);</div><div class='add'>+</div><div class='add'>+	/* Copy authdata in the top of buffer for encryption/decryption */</div><div class='add'>+	if (rctx-&gt;encrypt)</div><div class='add'>+		memcpy(rctx-&gt;inbuf.buf, rctx-&gt;authdata, rctx-&gt;authsize);</div><div class='add'>+	else</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;inbuf.buf, sg,</div><div class='add'>+					 rctx-&gt;assoclen + rctx-&gt;cryptlen,</div><div class='add'>+					 rctx-&gt;authsize, 0);</div><div class='add'>+</div><div class='add'>+	offset += rctx-&gt;authsize;</div><div class='add'>+	offset += tegra_ccm_add_padding(rctx-&gt;inbuf.buf + offset, rctx-&gt;authsize);</div><div class='add'>+</div><div class='add'>+	/* If there is no cryptlen, proceed to submit the task */</div><div class='add'>+	if (rctx-&gt;cryptlen) {</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;inbuf.buf + offset, sg,</div><div class='add'>+					 rctx-&gt;assoclen, rctx-&gt;cryptlen, 0);</div><div class='add'>+		offset += rctx-&gt;cryptlen;</div><div class='add'>+		offset += tegra_ccm_add_padding(rctx-&gt;inbuf.buf + offset, rctx-&gt;cryptlen);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rctx-&gt;inbuf.size = offset;</div><div class='add'>+</div><div class='add'>+	/* Prepare command and submit */</div><div class='add'>+	cmdlen = tegra_ctr_prep_cmd(ctx, rctx);</div><div class='add'>+	ret = tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return tegra_ccm_ctr_result(se, rctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_crypt_init(struct aead_request *req, struct tegra_se *se,</div><div class='add'>+				struct tegra_aead_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='add'>+	u8 *iv = (u8 *)rctx-&gt;iv;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;src_sg = req-&gt;src;</div><div class='add'>+	rctx-&gt;dst_sg = req-&gt;dst;</div><div class='add'>+	rctx-&gt;assoclen = req-&gt;assoclen;</div><div class='add'>+	rctx-&gt;authsize = crypto_aead_authsize(tfm);</div><div class='add'>+</div><div class='add'>+	memcpy(iv, req-&gt;iv, 16);</div><div class='add'>+</div><div class='add'>+	ret = tegra_ccm_check_iv(iv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Note: rfc 3610 and NIST 800-38C require counter (ctr_0) of</div><div class='add'>+	 * zero to encrypt auth tag.</div><div class='add'>+	 * req-&gt;iv has the formatted ctr_0 (i.e. Flags || N || 0).</div><div class='add'>+	 */</div><div class='add'>+	memset(iv + 15 - iv[0], 0, iv[0] + 1);</div><div class='add'>+</div><div class='add'>+	/* Clear any previous result */</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		writel(0, se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = container_of(areq, struct aead_request, base);</div><div class='add'>+	struct tegra_aead_reqctx *rctx = aead_request_ctx(req);</div><div class='add'>+	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate buffers required */</div><div class='add'>+	rctx-&gt;inbuf.buf = dma_alloc_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+					     &amp;rctx-&gt;inbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;inbuf.buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;inbuf.size = SE_AES_BUFLEN;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;outbuf.buf = dma_alloc_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+					      &amp;rctx-&gt;outbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;outbuf.buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto outbuf_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rctx-&gt;outbuf.size = SE_AES_BUFLEN;</div><div class='add'>+</div><div class='add'>+	ret = tegra_ccm_crypt_init(req, se, rctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;encrypt) {</div><div class='add'>+		rctx-&gt;cryptlen = req-&gt;cryptlen;</div><div class='add'>+</div><div class='add'>+		/* CBC MAC Operation */</div><div class='add'>+		ret = tegra_ccm_compute_auth(ctx, rctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* CTR operation */</div><div class='add'>+		ret = tegra_ccm_do_ctr(ctx, rctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	} else {</div><div class='add'>+		rctx-&gt;cryptlen = req-&gt;cryptlen - ctx-&gt;authsize;</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* CTR operation */</div><div class='add'>+		ret = tegra_ccm_do_ctr(ctx, rctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* CBC MAC Operation */</div><div class='add'>+		ret = tegra_ccm_compute_auth(ctx, rctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dma_free_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+			  rctx-&gt;outbuf.buf, rctx-&gt;outbuf.addr);</div><div class='add'>+</div><div class='add'>+outbuf_err:</div><div class='add'>+	dma_free_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+			  rctx-&gt;inbuf.buf, rctx-&gt;inbuf.addr);</div><div class='add'>+</div><div class='add'>+	crypto_finalize_aead_request(ctx-&gt;se-&gt;engine, req, ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='add'>+{</div><div class='add'>+	struct aead_request *req = container_of(areq, struct aead_request, base);</div><div class='add'>+	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	struct tegra_aead_reqctx *rctx = aead_request_ctx(req);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate buffers required */</div><div class='add'>+	rctx-&gt;inbuf.buf = dma_alloc_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+					     &amp;rctx-&gt;inbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;inbuf.buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;inbuf.size = SE_AES_BUFLEN;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;outbuf.buf = dma_alloc_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+					      &amp;rctx-&gt;outbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;outbuf.buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto outbuf_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rctx-&gt;outbuf.size = SE_AES_BUFLEN;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;src_sg = req-&gt;src;</div><div class='add'>+	rctx-&gt;dst_sg = req-&gt;dst;</div><div class='add'>+	rctx-&gt;assoclen = req-&gt;assoclen;</div><div class='add'>+	rctx-&gt;authsize = crypto_aead_authsize(tfm);</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;encrypt)</div><div class='add'>+		rctx-&gt;cryptlen = req-&gt;cryptlen;</div><div class='add'>+	else</div><div class='add'>+		rctx-&gt;cryptlen = req-&gt;cryptlen - ctx-&gt;authsize;</div><div class='add'>+</div><div class='add'>+	memcpy(rctx-&gt;iv, req-&gt;iv, GCM_AES_IV_SIZE);</div><div class='add'>+	rctx-&gt;iv[3] = (1 &lt;&lt; 24);</div><div class='add'>+</div><div class='add'>+	/* If there is associated data perform GMAC operation */</div><div class='add'>+	if (rctx-&gt;assoclen) {</div><div class='add'>+		ret = tegra_gcm_do_gmac(ctx, rctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* GCM Encryption/Decryption operation */</div><div class='add'>+	if (rctx-&gt;cryptlen) {</div><div class='add'>+		ret = tegra_gcm_do_crypt(ctx, rctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* GCM_FINAL operation */</div><div class='add'>+	ret = tegra_gcm_do_final(ctx, rctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!rctx-&gt;encrypt)</div><div class='add'>+		ret = tegra_gcm_do_verify(ctx-&gt;se, rctx);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dma_free_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+			  rctx-&gt;outbuf.buf, rctx-&gt;outbuf.addr);</div><div class='add'>+</div><div class='add'>+outbuf_err:</div><div class='add'>+	dma_free_coherent(ctx-&gt;se-&gt;dev, SE_AES_BUFLEN,</div><div class='add'>+			  rctx-&gt;inbuf.buf, rctx-&gt;inbuf.addr);</div><div class='add'>+</div><div class='add'>+	/* Finalize the request if there are no errors */</div><div class='add'>+	crypto_finalize_aead_request(ctx-&gt;se-&gt;engine, req, ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aead_cra_init(struct crypto_aead *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	struct aead_alg *alg = crypto_aead_alg(tfm);</div><div class='add'>+	struct tegra_se_alg *se_alg;</div><div class='add'>+	const char *algname;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	algname = crypto_tfm_alg_name(&amp;tfm-&gt;base);</div><div class='add'>+</div><div class='add'>+	se_alg = container_of(alg, struct tegra_se_alg, alg.aead.base);</div><div class='add'>+</div><div class='add'>+	crypto_aead_set_reqsize(tfm, sizeof(struct tegra_aead_reqctx));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;se = se_alg-&gt;se_dev;</div><div class='add'>+	ctx-&gt;key_id = 0;</div><div class='add'>+</div><div class='add'>+	ret = se_algname_to_algid(algname);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ctx-&gt;se-&gt;dev, "invalid algorithm\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;alg = ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ccm_setauthsize(struct crypto_aead *tfm,  unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	switch (authsize) {</div><div class='add'>+	case 4:</div><div class='add'>+	case 6:</div><div class='add'>+	case 8:</div><div class='add'>+	case 10:</div><div class='add'>+	case 12:</div><div class='add'>+	case 14:</div><div class='add'>+	case 16:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;authsize = authsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_gcm_setauthsize(struct crypto_aead *tfm,  unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = crypto_gcm_check_authsize(authsize);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;authsize = authsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_aead_cra_exit(struct crypto_aead *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_tfm_ctx(&amp;tfm-&gt;base);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;key_id)</div><div class='add'>+		tegra_key_invalidate(ctx-&gt;se, ctx-&gt;key_id, ctx-&gt;alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aead_crypt(struct aead_request *req, bool encrypt)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	struct tegra_aead_reqctx *rctx = aead_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;encrypt = encrypt;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_aead_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aead_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	return tegra_aead_crypt(req, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aead_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	return tegra_aead_crypt(req, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_aead_setkey(struct crypto_aead *tfm,</div><div class='add'>+			     const u8 *key, u32 keylen)</div><div class='add'>+{</div><div class='add'>+	struct tegra_aead_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (aes_check_keylen(keylen)) {</div><div class='add'>+		dev_dbg(ctx-&gt;se-&gt;dev, "invalid key length (%d)\n", keylen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tegra_key_submit(ctx-&gt;se, key, keylen, ctx-&gt;alg, &amp;ctx-&gt;key_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_cmac_prep_cmd(struct tegra_cmac_ctx *ctx,</div><div class='add'>+					struct tegra_cmac_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	unsigned int data_count, res_bits = 0, i = 0, j;</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr, op;</div><div class='add'>+</div><div class='add'>+	data_count = (rctx-&gt;datbuf.size / AES_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	op = SE_AES_OP_WRSTALL | SE_AES_OP_START | SE_AES_OP_LASTBUF;</div><div class='add'>+</div><div class='add'>+	if (!(rctx-&gt;task &amp; SHA_UPDATE)) {</div><div class='add'>+		op |= SE_AES_OP_FINAL;</div><div class='add'>+		res_bits = (rctx-&gt;datbuf.size % AES_BLOCK_SIZE) * 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!res_bits &amp;&amp; data_count)</div><div class='add'>+		data_count--;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_FIRST) {</div><div class='add'>+		rctx-&gt;task &amp;= ~SHA_FIRST;</div><div class='add'>+</div><div class='add'>+		cpuvaddr[i++] = host1x_opcode_setpayload(SE_CRYPTO_CTR_REG_COUNT);</div><div class='add'>+		cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;linear_ctr);</div><div class='add'>+		/* Load 0 IV */</div><div class='add'>+		for (j = 0; j &lt; SE_CRYPTO_CTR_REG_COUNT; j++)</div><div class='add'>+			cpuvaddr[i++] = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;last_blk, 1);</div><div class='add'>+	cpuvaddr[i++] = SE_LAST_BLOCK_VAL(data_count) |</div><div class='add'>+			SE_LAST_BLOCK_RES_BITS(res_bits);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr(se-&gt;hw-&gt;regs-&gt;config, 6);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;crypto_config;</div><div class='add'>+</div><div class='add'>+	/* Source Address */</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(rctx-&gt;datbuf.addr);</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;datbuf.addr)) |</div><div class='add'>+			SE_ADDR_HI_SZ(rctx-&gt;datbuf.size);</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+	cpuvaddr[i++] = SE_ADDR_HI_SZ(AES_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(se-&gt;hw-&gt;regs-&gt;op, 1);</div><div class='add'>+	cpuvaddr[i++] = op;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_cmac_copy_result(struct tegra_se *se, struct tegra_cmac_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		rctx-&gt;result[i] = readl(se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_cmac_paste_result(struct tegra_se *se, struct tegra_cmac_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		writel(rctx-&gt;result[i],</div><div class='add'>+		       se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_do_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	unsigned int nblks, nresidue, cmdlen;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!req-&gt;nbytes)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nresidue = (req-&gt;nbytes + rctx-&gt;residue.size) % rctx-&gt;blk_size;</div><div class='add'>+	nblks = (req-&gt;nbytes + rctx-&gt;residue.size) / rctx-&gt;blk_size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reserve the last block as residue during final() to process.</div><div class='add'>+	 */</div><div class='add'>+	if (!nresidue &amp;&amp; nblks) {</div><div class='add'>+		nresidue += rctx-&gt;blk_size;</div><div class='add'>+		nblks--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rctx-&gt;src_sg = req-&gt;src;</div><div class='add'>+	rctx-&gt;datbuf.size = (req-&gt;nbytes + rctx-&gt;residue.size) - nresidue;</div><div class='add'>+	rctx-&gt;total_len += rctx-&gt;datbuf.size;</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_CMAC, 0);</div><div class='add'>+	rctx-&gt;crypto_config = SE_AES_KEY_INDEX(ctx-&gt;key_id);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Keep one block and residue bytes in residue and</div><div class='add'>+	 * return. The bytes will be processed in final()</div><div class='add'>+	 */</div><div class='add'>+	if (nblks &lt; 1) {</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;residue.buf + rctx-&gt;residue.size,</div><div class='add'>+					 rctx-&gt;src_sg, 0, req-&gt;nbytes, 0);</div><div class='add'>+</div><div class='add'>+		rctx-&gt;residue.size += req-&gt;nbytes;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Copy the previous residue first */</div><div class='add'>+	if (rctx-&gt;residue.size)</div><div class='add'>+		memcpy(rctx-&gt;datbuf.buf, rctx-&gt;residue.buf, rctx-&gt;residue.size);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;datbuf.buf + rctx-&gt;residue.size,</div><div class='add'>+				 rctx-&gt;src_sg, 0, req-&gt;nbytes - nresidue, 0);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;residue.buf, rctx-&gt;src_sg,</div><div class='add'>+				 req-&gt;nbytes - nresidue, nresidue, 0);</div><div class='add'>+</div><div class='add'>+	/* Update residue value with the residue after current block */</div><div class='add'>+	rctx-&gt;residue.size = nresidue;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this is not the first 'update' call, paste the previous copied</div><div class='add'>+	 * intermediate results to the registers so that it gets picked up.</div><div class='add'>+	 * This is to support the import/export functionality.</div><div class='add'>+	 */</div><div class='add'>+	if (!(rctx-&gt;task &amp; SHA_FIRST))</div><div class='add'>+		tegra_cmac_paste_result(ctx-&gt;se, rctx);</div><div class='add'>+</div><div class='add'>+	cmdlen = tegra_cmac_prep_cmd(ctx, rctx);</div><div class='add'>+</div><div class='add'>+	ret = tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+	/*</div><div class='add'>+	 * If this is not the final update, copy the intermediate results</div><div class='add'>+	 * from the registers so that it can be used in the next 'update'</div><div class='add'>+	 * call. This is to support the import/export functionality.</div><div class='add'>+	 */</div><div class='add'>+	if (!(rctx-&gt;task &amp; SHA_FINAL))</div><div class='add'>+		tegra_cmac_copy_result(ctx-&gt;se, rctx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_do_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *result = (u32 *)req-&gt;result;</div><div class='add'>+	int ret = 0, i, cmdlen;</div><div class='add'>+</div><div class='add'>+	if (!req-&gt;nbytes &amp;&amp; !rctx-&gt;total_len &amp;&amp; ctx-&gt;fallback_tfm) {</div><div class='add'>+		return crypto_shash_tfm_digest(ctx-&gt;fallback_tfm,</div><div class='add'>+					rctx-&gt;datbuf.buf, 0, req-&gt;result);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(rctx-&gt;datbuf.buf, rctx-&gt;residue.buf, rctx-&gt;residue.size);</div><div class='add'>+	rctx-&gt;datbuf.size = rctx-&gt;residue.size;</div><div class='add'>+	rctx-&gt;total_len += rctx-&gt;residue.size;</div><div class='add'>+	rctx-&gt;config = tegra234_aes_cfg(SE_ALG_CMAC, 0);</div><div class='add'>+</div><div class='add'>+	/* Prepare command and submit */</div><div class='add'>+	cmdlen = tegra_cmac_prep_cmd(ctx, rctx);</div><div class='add'>+	ret = tegra_se_host1x_submit(se, cmdlen);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Read and clear Result register */</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		result[i] = readl(se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		writel(0, se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dma_free_coherent(se-&gt;dev, SE_SHA_BUFLEN,</div><div class='add'>+			  rctx-&gt;datbuf.buf, rctx-&gt;datbuf.addr);</div><div class='add'>+	dma_free_coherent(se-&gt;dev, crypto_ahash_blocksize(tfm) * 2,</div><div class='add'>+			  rctx-&gt;residue.buf, rctx-&gt;residue.addr);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='add'>+{</div><div class='add'>+	struct ahash_request *req = ahash_request_cast(areq);</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_UPDATE) {</div><div class='add'>+		ret = tegra_cmac_do_update(req);</div><div class='add'>+		rctx-&gt;task &amp;= ~SHA_UPDATE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_FINAL) {</div><div class='add'>+		ret = tegra_cmac_do_final(req);</div><div class='add'>+		rctx-&gt;task &amp;= ~SHA_FINAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crypto_finalize_hash_request(se-&gt;engine, req, ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_cmac_init_fallback(struct crypto_ahash *tfm, struct tegra_cmac_ctx *ctx,</div><div class='add'>+				     const char *algname)</div><div class='add'>+{</div><div class='add'>+	unsigned int statesize;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;fallback_tfm = crypto_alloc_shash(algname, 0, CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(ctx-&gt;fallback_tfm)) {</div><div class='add'>+		dev_warn(ctx-&gt;se-&gt;dev, "failed to allocate fallback for %s\n", algname);</div><div class='add'>+		ctx-&gt;fallback_tfm = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	statesize = crypto_shash_statesize(ctx-&gt;fallback_tfm);</div><div class='add'>+</div><div class='add'>+	if (statesize &gt; sizeof(struct tegra_cmac_reqctx))</div><div class='add'>+		crypto_ahash_set_statesize(tfm, statesize);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_cra_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_ahash *ahash_tfm = __crypto_ahash_cast(tfm);</div><div class='add'>+	struct ahash_alg *alg = __crypto_ahash_alg(tfm-&gt;__crt_alg);</div><div class='add'>+	struct tegra_se_alg *se_alg;</div><div class='add'>+	const char *algname;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	algname = crypto_tfm_alg_name(tfm);</div><div class='add'>+	se_alg = container_of(alg, struct tegra_se_alg, alg.ahash.base);</div><div class='add'>+</div><div class='add'>+	crypto_ahash_set_reqsize(ahash_tfm, sizeof(struct tegra_cmac_reqctx));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;se = se_alg-&gt;se_dev;</div><div class='add'>+	ctx-&gt;key_id = 0;</div><div class='add'>+</div><div class='add'>+	ret = se_algname_to_algid(algname);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ctx-&gt;se-&gt;dev, "invalid algorithm\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;alg = ret;</div><div class='add'>+</div><div class='add'>+	tegra_cmac_init_fallback(ahash_tfm, ctx, algname);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_cmac_cra_exit(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback_tfm)</div><div class='add'>+		crypto_free_shash(ctx-&gt;fallback_tfm);</div><div class='add'>+</div><div class='add'>+	tegra_key_invalidate(ctx-&gt;se, ctx-&gt;key_id, ctx-&gt;alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;total_len = 0;</div><div class='add'>+	rctx-&gt;datbuf.size = 0;</div><div class='add'>+	rctx-&gt;residue.size = 0;</div><div class='add'>+	rctx-&gt;task = SHA_FIRST;</div><div class='add'>+	rctx-&gt;blk_size = crypto_ahash_blocksize(tfm);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;residue.buf = dma_alloc_coherent(se-&gt;dev, rctx-&gt;blk_size * 2,</div><div class='add'>+					       &amp;rctx-&gt;residue.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;residue.buf)</div><div class='add'>+		goto resbuf_fail;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;residue.size = 0;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;datbuf.buf = dma_alloc_coherent(se-&gt;dev, SE_SHA_BUFLEN,</div><div class='add'>+					      &amp;rctx-&gt;datbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;datbuf.buf)</div><div class='add'>+		goto datbuf_fail;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;datbuf.size = 0;</div><div class='add'>+</div><div class='add'>+	/* Clear any previous result */</div><div class='add'>+	for (i = 0; i &lt; CMAC_RESULT_REG_COUNT; i++)</div><div class='add'>+		writel(0, se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+datbuf_fail:</div><div class='add'>+	dma_free_coherent(se-&gt;dev, rctx-&gt;blk_size, rctx-&gt;residue.buf,</div><div class='add'>+			  rctx-&gt;residue.addr);</div><div class='add'>+resbuf_fail:</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_setkey(struct crypto_ahash *tfm, const u8 *key,</div><div class='add'>+			     unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (aes_check_keylen(keylen)) {</div><div class='add'>+		dev_dbg(ctx-&gt;se-&gt;dev, "invalid key length (%d)\n", keylen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback_tfm)</div><div class='add'>+		crypto_shash_setkey(ctx-&gt;fallback_tfm, key, keylen);</div><div class='add'>+</div><div class='add'>+	return tegra_key_submit(ctx-&gt;se, key, keylen, ctx-&gt;alg, &amp;ctx-&gt;key_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;task |= SHA_UPDATE;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;task |= SHA_FINAL;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_finup(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;task |= SHA_UPDATE | SHA_FINAL;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_cmac_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	tegra_cmac_init(req);</div><div class='add'>+	rctx-&gt;task |= SHA_UPDATE | SHA_FINAL;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_export(struct ahash_request *req, void *out)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	memcpy(out, rctx, sizeof(*rctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_cmac_import(struct ahash_request *req, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct tegra_cmac_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	memcpy(rctx, in, sizeof(*rctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tegra_se_alg tegra_aead_algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.alg.aead.op.do_one_request = tegra_gcm_do_one_req,</div><div class='add'>+		.alg.aead.base = {</div><div class='add'>+			.init = tegra_aead_cra_init,</div><div class='add'>+			.exit = tegra_aead_cra_exit,</div><div class='add'>+			.setkey = tegra_aead_setkey,</div><div class='add'>+			.setauthsize = tegra_gcm_setauthsize,</div><div class='add'>+			.encrypt = tegra_aead_encrypt,</div><div class='add'>+			.decrypt = tegra_aead_decrypt,</div><div class='add'>+			.maxauthsize = AES_BLOCK_SIZE,</div><div class='add'>+			.ivsize	= GCM_AES_IV_SIZE,</div><div class='add'>+			.base = {</div><div class='add'>+				.cra_name = "gcm(aes)",</div><div class='add'>+				.cra_driver_name = "gcm-aes-tegra",</div><div class='add'>+				.cra_priority = 500,</div><div class='add'>+				.cra_blocksize = 1,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_aead_ctx),</div><div class='add'>+				.cra_alignmask = 0xf,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.aead.op.do_one_request = tegra_ccm_do_one_req,</div><div class='add'>+		.alg.aead.base = {</div><div class='add'>+			.init = tegra_aead_cra_init,</div><div class='add'>+			.exit = tegra_aead_cra_exit,</div><div class='add'>+			.setkey	= tegra_aead_setkey,</div><div class='add'>+			.setauthsize = tegra_ccm_setauthsize,</div><div class='add'>+			.encrypt = tegra_aead_encrypt,</div><div class='add'>+			.decrypt = tegra_aead_decrypt,</div><div class='add'>+			.maxauthsize = AES_BLOCK_SIZE,</div><div class='add'>+			.ivsize	= AES_BLOCK_SIZE,</div><div class='add'>+			.chunksize = AES_BLOCK_SIZE,</div><div class='add'>+			.base = {</div><div class='add'>+				.cra_name = "ccm(aes)",</div><div class='add'>+				.cra_driver_name = "ccm-aes-tegra",</div><div class='add'>+				.cra_priority = 500,</div><div class='add'>+				.cra_blocksize = 1,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_aead_ctx),</div><div class='add'>+				.cra_alignmask = 0xf,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct tegra_se_alg tegra_cmac_algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_cmac_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_cmac_init,</div><div class='add'>+			.setkey	= tegra_cmac_setkey,</div><div class='add'>+			.update = tegra_cmac_update,</div><div class='add'>+			.final = tegra_cmac_final,</div><div class='add'>+			.finup = tegra_cmac_finup,</div><div class='add'>+			.digest = tegra_cmac_digest,</div><div class='add'>+			.export = tegra_cmac_export,</div><div class='add'>+			.import = tegra_cmac_import,</div><div class='add'>+			.halg.digestsize = AES_BLOCK_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_cmac_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "cmac(aes)",</div><div class='add'>+				.cra_driver_name = "tegra-se-cmac",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_cmac_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_cmac_cra_init,</div><div class='add'>+				.cra_exit = tegra_cmac_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int tegra_init_aes(struct tegra_se *se)</div><div class='add'>+{</div><div class='add'>+	struct aead_engine_alg *aead_alg;</div><div class='add'>+	struct ahash_engine_alg *ahash_alg;</div><div class='add'>+	struct skcipher_engine_alg *sk_alg;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	se-&gt;manifest = tegra_aes_kac_manifest;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_aes_algs); i++) {</div><div class='add'>+		sk_alg = &amp;tegra_aes_algs[i].alg.skcipher;</div><div class='add'>+		tegra_aes_algs[i].se_dev = se;</div><div class='add'>+</div><div class='add'>+		ret = crypto_engine_register_skcipher(sk_alg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(se-&gt;dev, "failed to register %s\n",</div><div class='add'>+				sk_alg-&gt;base.base.cra_name);</div><div class='add'>+			goto err_aes;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_aead_algs); i++) {</div><div class='add'>+		aead_alg = &amp;tegra_aead_algs[i].alg.aead;</div><div class='add'>+		tegra_aead_algs[i].se_dev = se;</div><div class='add'>+</div><div class='add'>+		ret = crypto_engine_register_aead(aead_alg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(se-&gt;dev, "failed to register %s\n",</div><div class='add'>+				aead_alg-&gt;base.base.cra_name);</div><div class='add'>+			goto err_aead;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_cmac_algs); i++) {</div><div class='add'>+		ahash_alg = &amp;tegra_cmac_algs[i].alg.ahash;</div><div class='add'>+		tegra_cmac_algs[i].se_dev = se;</div><div class='add'>+</div><div class='add'>+		ret = crypto_engine_register_ahash(ahash_alg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(se-&gt;dev, "failed to register %s\n",</div><div class='add'>+				ahash_alg-&gt;base.halg.base.cra_name);</div><div class='add'>+			goto err_cmac;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_cmac:</div><div class='add'>+	while (i--)</div><div class='add'>+		crypto_engine_unregister_ahash(&amp;tegra_cmac_algs[i].alg.ahash);</div><div class='add'>+</div><div class='add'>+	i = ARRAY_SIZE(tegra_aead_algs);</div><div class='add'>+err_aead:</div><div class='add'>+	while (i--)</div><div class='add'>+		crypto_engine_unregister_aead(&amp;tegra_aead_algs[i].alg.aead);</div><div class='add'>+</div><div class='add'>+	i = ARRAY_SIZE(tegra_aes_algs);</div><div class='add'>+err_aes:</div><div class='add'>+	while (i--)</div><div class='add'>+		crypto_engine_unregister_skcipher(&amp;tegra_aes_algs[i].alg.skcipher);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tegra_deinit_aes(struct tegra_se *se)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_aes_algs); i++)</div><div class='add'>+		crypto_engine_unregister_skcipher(&amp;tegra_aes_algs[i].alg.skcipher);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_aead_algs); i++)</div><div class='add'>+		crypto_engine_unregister_aead(&amp;tegra_aead_algs[i].alg.aead);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_cmac_algs); i++)</div><div class='add'>+		crypto_engine_unregister_ahash(&amp;tegra_cmac_algs[i].alg.ahash);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se-hash.c b/drivers/crypto/tegra/tegra-se-hash.c<br/>new file mode 100644<br/>index 000000000000..4d4bd727f498<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-hash.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/tegra/tegra-se-hash.c</a></div><div class='hunk'>@@ -0,0 +1,1060 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+/*</div><div class='add'>+ * Crypto driver to handle HASH algorithms using NVIDIA Security Engine.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/sha1.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;crypto/sha3.h&gt;</div><div class='add'>+#include &lt;crypto/internal/des.h&gt;</div><div class='add'>+#include &lt;crypto/engine.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra-se.h"</div><div class='add'>+</div><div class='add'>+struct tegra_sha_ctx {</div><div class='add'>+	struct tegra_se *se;</div><div class='add'>+	unsigned int alg;</div><div class='add'>+	bool fallback;</div><div class='add'>+	u32 key_id;</div><div class='add'>+	struct crypto_ahash *fallback_tfm;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_sha_reqctx {</div><div class='add'>+	struct scatterlist *src_sg;</div><div class='add'>+	struct tegra_se_datbuf datbuf;</div><div class='add'>+	struct tegra_se_datbuf residue;</div><div class='add'>+	struct tegra_se_datbuf digest;</div><div class='add'>+	unsigned int alg;</div><div class='add'>+	unsigned int config;</div><div class='add'>+	unsigned int total_len;</div><div class='add'>+	unsigned int blk_size;</div><div class='add'>+	unsigned int task;</div><div class='add'>+	u32 key_id;</div><div class='add'>+	u32 result[HASH_RESULT_REG_COUNT];</div><div class='add'>+	struct ahash_request fallback_req;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tegra_sha_get_config(u32 alg)</div><div class='add'>+{</div><div class='add'>+	int cfg = 0;</div><div class='add'>+</div><div class='add'>+	switch (alg) {</div><div class='add'>+	case SE_ALG_SHA1:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_HMAC_SHA224:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_HMAC;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SE_ALG_SHA224:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA224;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_HMAC_SHA256:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_HMAC;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SE_ALG_SHA256:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA256;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_HMAC_SHA384:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_HMAC;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SE_ALG_SHA384:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA384;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_HMAC_SHA512:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_HMAC;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SE_ALG_SHA512:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA512;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SE_ALG_SHA3_224:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA3_224;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_SHA3_256:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA3_256;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_SHA3_384:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA3_384;</div><div class='add'>+		break;</div><div class='add'>+	case SE_ALG_SHA3_512:</div><div class='add'>+		cfg |= SE_SHA_ENC_ALG_SHA;</div><div class='add'>+		cfg |= SE_SHA_ENC_MODE_SHA3_512;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cfg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='add'>+	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_final(&amp;rctx-&gt;fallback_req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_finup(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='add'>+	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_finup(&amp;rctx-&gt;fallback_req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='add'>+	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_digest(&amp;rctx-&gt;fallback_req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_import(struct ahash_request *req, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_fallback_export(struct ahash_request *req, void *out)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='add'>+	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='add'>+					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+</div><div class='add'>+	return crypto_ahash_export(&amp;rctx-&gt;fallback_req, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_prep_cmd(struct tegra_se *se, u32 *cpuvaddr,</div><div class='add'>+			      struct tegra_sha_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	u64 msg_len, msg_left;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	msg_len = rctx-&gt;total_len * 8;</div><div class='add'>+	msg_left = rctx-&gt;datbuf.size * 8;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If IN_ADDR_HI_0.SZ &gt; SHA_MSG_LEFT_[0-3] to the HASH engine,</div><div class='add'>+	 * HW treats it as the last buffer and process the data.</div><div class='add'>+	 * Therefore, add an extra byte to msg_left if it is not the</div><div class='add'>+	 * last buffer.</div><div class='add'>+	 */</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_UPDATE) {</div><div class='add'>+		msg_left += 8;</div><div class='add'>+		msg_len += 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(8);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(SE_SHA_MSG_LENGTH);</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(msg_len);</div><div class='add'>+	cpuvaddr[i++] = upper_32_bits(msg_len);</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+	cpuvaddr[i++] = lower_32_bits(msg_left);</div><div class='add'>+	cpuvaddr[i++] = upper_32_bits(msg_left);</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+	cpuvaddr[i++] = 0;</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(6);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(SE_SHA_CFG);</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;config;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_FIRST) {</div><div class='add'>+		cpuvaddr[i++] = SE_SHA_TASK_HASH_INIT;</div><div class='add'>+		rctx-&gt;task &amp;= ~SHA_FIRST;</div><div class='add'>+	} else {</div><div class='add'>+		cpuvaddr[i++] = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;datbuf.addr;</div><div class='add'>+	cpuvaddr[i++] = (u32)(SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;datbuf.addr)) |</div><div class='add'>+				SE_ADDR_HI_SZ(rctx-&gt;datbuf.size));</div><div class='add'>+	cpuvaddr[i++] = rctx-&gt;digest.addr;</div><div class='add'>+	cpuvaddr[i++] = (u32)(SE_ADDR_HI_MSB(upper_32_bits(rctx-&gt;digest.addr)) |</div><div class='add'>+				SE_ADDR_HI_SZ(rctx-&gt;digest.size));</div><div class='add'>+	if (rctx-&gt;key_id) {</div><div class='add'>+		cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+		cpuvaddr[i++] = se_host1x_opcode_nonincr_w(SE_SHA_CRYPTO_CFG);</div><div class='add'>+		cpuvaddr[i++] = SE_AES_KEY_INDEX(rctx-&gt;key_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr_w(SE_SHA_OPERATION);</div><div class='add'>+	cpuvaddr[i++] = SE_SHA_OP_WRSTALL |</div><div class='add'>+			SE_SHA_OP_START |</div><div class='add'>+			SE_SHA_OP_LASTBUF;</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(se-&gt;dev, "msg len %llu msg left %llu cfg %#x",</div><div class='add'>+		msg_len, msg_left, rctx-&gt;config);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_sha_copy_hash_result(struct tegra_se *se, struct tegra_sha_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HASH_RESULT_REG_COUNT; i++)</div><div class='add'>+		rctx-&gt;result[i] = readl(se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_sha_paste_hash_result(struct tegra_se *se, struct tegra_sha_reqctx *rctx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HASH_RESULT_REG_COUNT; i++)</div><div class='add'>+		writel(rctx-&gt;result[i],</div><div class='add'>+		       se-&gt;base + se-&gt;hw-&gt;regs-&gt;result + (i * 4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_do_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	unsigned int nblks, nresidue, size, ret;</div><div class='add'>+	u32 *cpuvaddr = ctx-&gt;se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+</div><div class='add'>+	nresidue = (req-&gt;nbytes + rctx-&gt;residue.size) % rctx-&gt;blk_size;</div><div class='add'>+	nblks = (req-&gt;nbytes + rctx-&gt;residue.size) / rctx-&gt;blk_size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If nbytes is a multiple of block size and there is no residue,</div><div class='add'>+	 * then reserve the last block as residue during final() to process.</div><div class='add'>+	 */</div><div class='add'>+	if (!nresidue &amp;&amp; nblks) {</div><div class='add'>+		nresidue = rctx-&gt;blk_size;</div><div class='add'>+		nblks--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rctx-&gt;src_sg = req-&gt;src;</div><div class='add'>+	rctx-&gt;datbuf.size = (req-&gt;nbytes + rctx-&gt;residue.size) - nresidue;</div><div class='add'>+	rctx-&gt;total_len += rctx-&gt;datbuf.size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If nbytes are less than a block size, copy it residue and</div><div class='add'>+	 * return. The bytes will be processed in final()</div><div class='add'>+	 */</div><div class='add'>+	if (nblks &lt; 1) {</div><div class='add'>+		scatterwalk_map_and_copy(rctx-&gt;residue.buf + rctx-&gt;residue.size,</div><div class='add'>+					 rctx-&gt;src_sg, 0, req-&gt;nbytes, 0);</div><div class='add'>+</div><div class='add'>+		rctx-&gt;residue.size += req-&gt;nbytes;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Copy the previous residue first */</div><div class='add'>+	if (rctx-&gt;residue.size)</div><div class='add'>+		memcpy(rctx-&gt;datbuf.buf, rctx-&gt;residue.buf, rctx-&gt;residue.size);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;datbuf.buf + rctx-&gt;residue.size,</div><div class='add'>+				 rctx-&gt;src_sg, 0, req-&gt;nbytes - nresidue, 0);</div><div class='add'>+</div><div class='add'>+	scatterwalk_map_and_copy(rctx-&gt;residue.buf, rctx-&gt;src_sg,</div><div class='add'>+				 req-&gt;nbytes - nresidue, nresidue, 0);</div><div class='add'>+</div><div class='add'>+	/* Update residue value with the residue after current block */</div><div class='add'>+	rctx-&gt;residue.size = nresidue;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra_sha_get_config(rctx-&gt;alg) |</div><div class='add'>+			SE_SHA_DST_HASH_REG;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this is not the first 'update' call, paste the previous copied</div><div class='add'>+	 * intermediate results to the registers so that it gets picked up.</div><div class='add'>+	 * This is to support the import/export functionality.</div><div class='add'>+	 */</div><div class='add'>+	if (!(rctx-&gt;task &amp; SHA_FIRST))</div><div class='add'>+		tegra_sha_paste_hash_result(ctx-&gt;se, rctx);</div><div class='add'>+</div><div class='add'>+	size = tegra_sha_prep_cmd(ctx-&gt;se, cpuvaddr, rctx);</div><div class='add'>+</div><div class='add'>+	ret = tegra_se_host1x_submit(ctx-&gt;se, size);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this is not the final update, copy the intermediate results</div><div class='add'>+	 * from the registers so that it can be used in the next 'update'</div><div class='add'>+	 * call. This is to support the import/export functionality.</div><div class='add'>+	 */</div><div class='add'>+	if (!(rctx-&gt;task &amp; SHA_FINAL))</div><div class='add'>+		tegra_sha_copy_hash_result(ctx-&gt;se, rctx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_do_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	u32 *cpuvaddr = se-&gt;cmdbuf-&gt;addr;</div><div class='add'>+	int size, ret = 0;</div><div class='add'>+</div><div class='add'>+	memcpy(rctx-&gt;datbuf.buf, rctx-&gt;residue.buf, rctx-&gt;residue.size);</div><div class='add'>+	rctx-&gt;datbuf.size = rctx-&gt;residue.size;</div><div class='add'>+	rctx-&gt;total_len += rctx-&gt;residue.size;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;config = tegra_sha_get_config(rctx-&gt;alg) |</div><div class='add'>+		       SE_SHA_DST_MEMORY;</div><div class='add'>+</div><div class='add'>+	size = tegra_sha_prep_cmd(se, cpuvaddr, rctx);</div><div class='add'>+</div><div class='add'>+	ret = tegra_se_host1x_submit(se, size);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Copy result */</div><div class='add'>+	memcpy(req-&gt;result, rctx-&gt;digest.buf, rctx-&gt;digest.size);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dma_free_coherent(se-&gt;dev, SE_SHA_BUFLEN,</div><div class='add'>+			  rctx-&gt;datbuf.buf, rctx-&gt;datbuf.addr);</div><div class='add'>+	dma_free_coherent(se-&gt;dev, crypto_ahash_blocksize(tfm),</div><div class='add'>+			  rctx-&gt;residue.buf, rctx-&gt;residue.addr);</div><div class='add'>+	dma_free_coherent(se-&gt;dev, rctx-&gt;digest.size, rctx-&gt;digest.buf,</div><div class='add'>+			  rctx-&gt;digest.addr);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='add'>+{</div><div class='add'>+	struct ahash_request *req = ahash_request_cast(areq);</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_UPDATE) {</div><div class='add'>+		ret = tegra_sha_do_update(req);</div><div class='add'>+		rctx-&gt;task &amp;= ~SHA_UPDATE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rctx-&gt;task &amp; SHA_FINAL) {</div><div class='add'>+		ret = tegra_sha_do_final(req);</div><div class='add'>+		rctx-&gt;task &amp;= ~SHA_FINAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crypto_finalize_hash_request(se-&gt;engine, req, ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_sha_init_fallback(struct crypto_ahash *tfm, struct tegra_sha_ctx *ctx,</div><div class='add'>+				    const char *algname)</div><div class='add'>+{</div><div class='add'>+	unsigned int statesize;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;fallback_tfm = crypto_alloc_ahash(algname, 0, CRYPTO_ALG_ASYNC |</div><div class='add'>+						CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(ctx-&gt;fallback_tfm)) {</div><div class='add'>+		dev_warn(ctx-&gt;se-&gt;dev,</div><div class='add'>+			 "failed to allocate fallback for %s\n", algname);</div><div class='add'>+		ctx-&gt;fallback_tfm = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	statesize = crypto_ahash_statesize(ctx-&gt;fallback_tfm);</div><div class='add'>+</div><div class='add'>+	if (statesize &gt; sizeof(struct tegra_sha_reqctx))</div><div class='add'>+		crypto_ahash_set_statesize(tfm, statesize);</div><div class='add'>+</div><div class='add'>+	/* Update reqsize if fallback is added */</div><div class='add'>+	crypto_ahash_set_reqsize(tfm,</div><div class='add'>+				 sizeof(struct tegra_sha_reqctx) +</div><div class='add'>+			crypto_ahash_reqsize(ctx-&gt;fallback_tfm));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_cra_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_ahash *ahash_tfm = __crypto_ahash_cast(tfm);</div><div class='add'>+	struct ahash_alg *alg = __crypto_ahash_alg(tfm-&gt;__crt_alg);</div><div class='add'>+	struct tegra_se_alg *se_alg;</div><div class='add'>+	const char *algname;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	algname = crypto_tfm_alg_name(tfm);</div><div class='add'>+	se_alg = container_of(alg, struct tegra_se_alg, alg.ahash.base);</div><div class='add'>+</div><div class='add'>+	crypto_ahash_set_reqsize(ahash_tfm, sizeof(struct tegra_sha_reqctx));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;se = se_alg-&gt;se_dev;</div><div class='add'>+	ctx-&gt;fallback = false;</div><div class='add'>+	ctx-&gt;key_id = 0;</div><div class='add'>+</div><div class='add'>+	ret = se_algname_to_algid(algname);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ctx-&gt;se-&gt;dev, "invalid algorithm\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (se_alg-&gt;alg_base)</div><div class='add'>+		tegra_sha_init_fallback(ahash_tfm, ctx, algname);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;alg = ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_sha_cra_exit(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback_tfm)</div><div class='add'>+		crypto_free_ahash(ctx-&gt;fallback_tfm);</div><div class='add'>+</div><div class='add'>+	tegra_key_invalidate(ctx-&gt;se, ctx-&gt;key_id, ctx-&gt;alg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct tegra_se *se = ctx-&gt;se;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_init(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;total_len = 0;</div><div class='add'>+	rctx-&gt;datbuf.size = 0;</div><div class='add'>+	rctx-&gt;residue.size = 0;</div><div class='add'>+	rctx-&gt;key_id = ctx-&gt;key_id;</div><div class='add'>+	rctx-&gt;task = SHA_FIRST;</div><div class='add'>+	rctx-&gt;alg = ctx-&gt;alg;</div><div class='add'>+	rctx-&gt;blk_size = crypto_ahash_blocksize(tfm);</div><div class='add'>+	rctx-&gt;digest.size = crypto_ahash_digestsize(tfm);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;digest.buf = dma_alloc_coherent(se-&gt;dev, rctx-&gt;digest.size,</div><div class='add'>+					      &amp;rctx-&gt;digest.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;digest.buf)</div><div class='add'>+		goto digbuf_fail;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;residue.buf = dma_alloc_coherent(se-&gt;dev, rctx-&gt;blk_size,</div><div class='add'>+					       &amp;rctx-&gt;residue.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;residue.buf)</div><div class='add'>+		goto resbuf_fail;</div><div class='add'>+</div><div class='add'>+	rctx-&gt;datbuf.buf = dma_alloc_coherent(se-&gt;dev, SE_SHA_BUFLEN,</div><div class='add'>+					      &amp;rctx-&gt;datbuf.addr, GFP_KERNEL);</div><div class='add'>+	if (!rctx-&gt;datbuf.buf)</div><div class='add'>+		goto datbuf_fail;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+datbuf_fail:</div><div class='add'>+	dma_free_coherent(se-&gt;dev, rctx-&gt;blk_size, rctx-&gt;residue.buf,</div><div class='add'>+			  rctx-&gt;residue.addr);</div><div class='add'>+resbuf_fail:</div><div class='add'>+	dma_free_coherent(se-&gt;dev, SE_SHA_BUFLEN, rctx-&gt;datbuf.buf,</div><div class='add'>+			  rctx-&gt;datbuf.addr);</div><div class='add'>+digbuf_fail:</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_hmac_fallback_setkey(struct tegra_sha_ctx *ctx, const u8 *key,</div><div class='add'>+				      unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	if (!ctx-&gt;fallback_tfm) {</div><div class='add'>+		dev_dbg(ctx-&gt;se-&gt;dev, "invalid key length (%d)\n", keylen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;fallback = true;</div><div class='add'>+	return crypto_ahash_setkey(ctx-&gt;fallback_tfm, key, keylen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,</div><div class='add'>+			     unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (aes_check_keylen(keylen))</div><div class='add'>+		return tegra_hmac_fallback_setkey(ctx, key, keylen);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;fallback = false;</div><div class='add'>+</div><div class='add'>+	return tegra_key_submit(ctx-&gt;se, key, keylen, ctx-&gt;alg, &amp;ctx-&gt;key_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_update(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;task |= SHA_UPDATE;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_final(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;task |= SHA_FINAL;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_finup(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_finup(req);</div><div class='add'>+</div><div class='add'>+	rctx-&gt;task |= SHA_UPDATE | SHA_FINAL;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_digest(req);</div><div class='add'>+</div><div class='add'>+	tegra_sha_init(req);</div><div class='add'>+	rctx-&gt;task |= SHA_UPDATE | SHA_FINAL;</div><div class='add'>+</div><div class='add'>+	return crypto_transfer_hash_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_export(struct ahash_request *req, void *out)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_export(req, out);</div><div class='add'>+</div><div class='add'>+	memcpy(out, rctx, sizeof(*rctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_sha_import(struct ahash_request *req, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct tegra_sha_reqctx *rctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fallback)</div><div class='add'>+		return tegra_sha_fallback_import(req, in);</div><div class='add'>+</div><div class='add'>+	memcpy(rctx, in, sizeof(*rctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tegra_se_alg tegra_hash_algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA1_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha1",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha1",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA1_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA224_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha224",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha224",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA224_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA256_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha256",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha256",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA256_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA384_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha384",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha384",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA384_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA512_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha512",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha512",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA512_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA3_224_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha3-224",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha3-224",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA3_224_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA3_256_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha3-256",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha3-256",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA3_256_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA3_384_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha3-384",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha3-384",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA3_384_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.halg.digestsize = SHA3_512_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "sha3-512",</div><div class='add'>+				.cra_driver_name = "tegra-se-sha3-512",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH,</div><div class='add'>+				.cra_blocksize = SHA3_512_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg_base = "sha224",</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.setkey = tegra_hmac_setkey,</div><div class='add'>+			.halg.digestsize = SHA224_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "hmac(sha224)",</div><div class='add'>+				.cra_driver_name = "tegra-se-hmac-sha224",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+				.cra_blocksize = SHA224_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg_base = "sha256",</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.setkey = tegra_hmac_setkey,</div><div class='add'>+			.halg.digestsize = SHA256_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "hmac(sha256)",</div><div class='add'>+				.cra_driver_name = "tegra-se-hmac-sha256",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+				.cra_blocksize = SHA256_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg_base = "sha384",</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.setkey = tegra_hmac_setkey,</div><div class='add'>+			.halg.digestsize = SHA384_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "hmac(sha384)",</div><div class='add'>+				.cra_driver_name = "tegra-se-hmac-sha384",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+				.cra_blocksize = SHA384_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}, {</div><div class='add'>+		.alg_base = "sha512",</div><div class='add'>+		.alg.ahash.op.do_one_request = tegra_sha_do_one_req,</div><div class='add'>+		.alg.ahash.base = {</div><div class='add'>+			.init = tegra_sha_init,</div><div class='add'>+			.update = tegra_sha_update,</div><div class='add'>+			.final = tegra_sha_final,</div><div class='add'>+			.finup = tegra_sha_finup,</div><div class='add'>+			.digest = tegra_sha_digest,</div><div class='add'>+			.export = tegra_sha_export,</div><div class='add'>+			.import = tegra_sha_import,</div><div class='add'>+			.setkey = tegra_hmac_setkey,</div><div class='add'>+			.halg.digestsize = SHA512_DIGEST_SIZE,</div><div class='add'>+			.halg.statesize = sizeof(struct tegra_sha_reqctx),</div><div class='add'>+			.halg.base = {</div><div class='add'>+				.cra_name = "hmac(sha512)",</div><div class='add'>+				.cra_driver_name = "tegra-se-hmac-sha512",</div><div class='add'>+				.cra_priority = 300,</div><div class='add'>+				.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+				.cra_blocksize = SHA512_BLOCK_SIZE,</div><div class='add'>+				.cra_ctxsize = sizeof(struct tegra_sha_ctx),</div><div class='add'>+				.cra_alignmask = 0,</div><div class='add'>+				.cra_module = THIS_MODULE,</div><div class='add'>+				.cra_init = tegra_sha_cra_init,</div><div class='add'>+				.cra_exit = tegra_sha_cra_exit,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tegra_hash_kac_manifest(u32 user, u32 alg, u32 keylen)</div><div class='add'>+{</div><div class='add'>+	int manifest;</div><div class='add'>+</div><div class='add'>+	manifest = SE_KAC_USER_NS;</div><div class='add'>+</div><div class='add'>+	switch (alg) {</div><div class='add'>+	case SE_ALG_HMAC_SHA224:</div><div class='add'>+	case SE_ALG_HMAC_SHA256:</div><div class='add'>+	case SE_ALG_HMAC_SHA384:</div><div class='add'>+	case SE_ALG_HMAC_SHA512:</div><div class='add'>+		manifest |= SE_KAC_HMAC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (keylen) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		manifest |= SE_KAC_SIZE_128;</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		manifest |= SE_KAC_SIZE_192;</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+	default:</div><div class='add'>+		manifest |= SE_KAC_SIZE_256;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return manifest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tegra_init_hash(struct tegra_se *se)</div><div class='add'>+{</div><div class='add'>+	struct ahash_engine_alg *alg;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	se-&gt;manifest = tegra_hash_kac_manifest;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_hash_algs); i++) {</div><div class='add'>+		tegra_hash_algs[i].se_dev = se;</div><div class='add'>+		alg = &amp;tegra_hash_algs[i].alg.ahash;</div><div class='add'>+</div><div class='add'>+		ret = crypto_engine_register_ahash(alg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(se-&gt;dev, "failed to register %s\n",</div><div class='add'>+				alg-&gt;base.halg.base.cra_name);</div><div class='add'>+			goto sha_err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+sha_err:</div><div class='add'>+	while (i--)</div><div class='add'>+		crypto_engine_unregister_ahash(&amp;tegra_hash_algs[i].alg.ahash);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tegra_deinit_hash(struct tegra_se *se)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_hash_algs); i++)</div><div class='add'>+		crypto_engine_unregister_ahash(&amp;tegra_hash_algs[i].alg.ahash);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se-key.c b/drivers/crypto/tegra/tegra-se-key.c<br/>new file mode 100644<br/>index 000000000000..ac14678dbd30<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-key.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/tegra/tegra-se-key.c</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+/*</div><div class='add'>+ * Crypto driver file to manage keys of NVIDIA Security Engine.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra-se.h"</div><div class='add'>+</div><div class='add'>+#define SE_KEY_FULL_MASK		GENMASK(SE_MAX_KEYSLOT, 0)</div><div class='add'>+</div><div class='add'>+/* Reserve keyslot 0, 14, 15 */</div><div class='add'>+#define SE_KEY_RSVD_MASK		(BIT(0) | BIT(14) | BIT(15))</div><div class='add'>+#define SE_KEY_VALID_MASK		(SE_KEY_FULL_MASK &amp; ~SE_KEY_RSVD_MASK)</div><div class='add'>+</div><div class='add'>+/* Mutex lock to guard keyslots */</div><div class='add'>+static DEFINE_MUTEX(kslt_lock);</div><div class='add'>+</div><div class='add'>+/* Keyslot bitmask (0 = available, 1 = in use/not available) */</div><div class='add'>+static u16 tegra_se_keyslots = SE_KEY_RSVD_MASK;</div><div class='add'>+</div><div class='add'>+static u16 tegra_keyslot_alloc(void)</div><div class='add'>+{</div><div class='add'>+	u16 keyid;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kslt_lock);</div><div class='add'>+	/* Check if all key slots are full */</div><div class='add'>+	if (tegra_se_keyslots == GENMASK(SE_MAX_KEYSLOT, 0)) {</div><div class='add'>+		mutex_unlock(&amp;kslt_lock);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	keyid = ffz(tegra_se_keyslots);</div><div class='add'>+	tegra_se_keyslots |= BIT(keyid);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;kslt_lock);</div><div class='add'>+</div><div class='add'>+	return keyid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_keyslot_free(u16 slot)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;kslt_lock);</div><div class='add'>+	tegra_se_keyslots &amp;= ~(BIT(slot));</div><div class='add'>+	mutex_unlock(&amp;kslt_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tegra_key_prep_ins_cmd(struct tegra_se *se, u32 *cpuvaddr,</div><div class='add'>+					   const u32 *key, u32 keylen, u16 slot, u32 alg)</div><div class='add'>+{</div><div class='add'>+	int i = 0, j;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;op);</div><div class='add'>+	cpuvaddr[i++] = SE_AES_OP_WRSTALL | SE_AES_OP_DUMMY;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;manifest);</div><div class='add'>+	cpuvaddr[i++] = se-&gt;manifest(se-&gt;owner, alg, keylen);</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;key_dst);</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = SE_AES_KEY_DST_INDEX(slot);</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; keylen / 4; j++) {</div><div class='add'>+		/* Set key address */</div><div class='add'>+		cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+		cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;key_addr);</div><div class='add'>+		cpuvaddr[i++] = j;</div><div class='add'>+</div><div class='add'>+		/* Set key data */</div><div class='add'>+		cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+		cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;key_data);</div><div class='add'>+		cpuvaddr[i++] = key[j];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;config);</div><div class='add'>+	cpuvaddr[i++] = SE_CFG_INS;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = host1x_opcode_setpayload(1);</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_incr_w(se-&gt;hw-&gt;regs-&gt;op);</div><div class='add'>+	cpuvaddr[i++] = SE_AES_OP_WRSTALL | SE_AES_OP_START |</div><div class='add'>+			SE_AES_OP_LASTBUF;</div><div class='add'>+</div><div class='add'>+	cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);</div><div class='add'>+	cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |</div><div class='add'>+			host1x_uclass_incr_syncpt_indx_f(se-&gt;syncpt_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(se-&gt;dev, "key-slot %u key-manifest %#x\n",</div><div class='add'>+		slot, se-&gt;manifest(se-&gt;owner, alg, keylen));</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool tegra_key_in_kslt(u32 keyid)</div><div class='add'>+{</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	if (keyid &gt; SE_MAX_KEYSLOT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kslt_lock);</div><div class='add'>+	ret = ((BIT(keyid) &amp; SE_KEY_VALID_MASK) &amp;&amp;</div><div class='add'>+		(BIT(keyid) &amp; tegra_se_keyslots));</div><div class='add'>+	mutex_unlock(&amp;kslt_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_key_insert(struct tegra_se *se, const u8 *key,</div><div class='add'>+			    u32 keylen, u16 slot, u32 alg)</div><div class='add'>+{</div><div class='add'>+	const u32 *keyval = (u32 *)key;</div><div class='add'>+	u32 *addr = se-&gt;cmdbuf-&gt;addr, size;</div><div class='add'>+</div><div class='add'>+	size = tegra_key_prep_ins_cmd(se, addr, keyval, keylen, slot, alg);</div><div class='add'>+</div><div class='add'>+	return tegra_se_host1x_submit(se, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tegra_key_invalidate(struct tegra_se *se, u32 keyid, u32 alg)</div><div class='add'>+{</div><div class='add'>+	u8 zkey[AES_MAX_KEY_SIZE] = {0};</div><div class='add'>+</div><div class='add'>+	if (!keyid)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Overwrite the key with 0s */</div><div class='add'>+	tegra_key_insert(se, zkey, AES_MAX_KEY_SIZE, keyid, alg);</div><div class='add'>+</div><div class='add'>+	tegra_keyslot_free(keyid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tegra_key_submit(struct tegra_se *se, const u8 *key, u32 keylen, u32 alg, u32 *keyid)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Use the existing slot if it is already allocated */</div><div class='add'>+	if (!tegra_key_in_kslt(*keyid)) {</div><div class='add'>+		*keyid = tegra_keyslot_alloc();</div><div class='add'>+		if (!(*keyid)) {</div><div class='add'>+			dev_err(se-&gt;dev, "failed to allocate key slot\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tegra_key_insert(se, key, keylen, *keyid, alg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se-main.c b/drivers/crypto/tegra/tegra-se-main.c<br/>new file mode 100644<br/>index 000000000000..9955874b3dc3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/tegra/tegra-se-main.c</a></div><div class='hunk'>@@ -0,0 +1,437 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+/*</div><div class='add'>+ * Crypto driver for NVIDIA Security Engine in Tegra Chips</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/engine.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra-se.h"</div><div class='add'>+</div><div class='add'>+static struct host1x_bo *tegra_se_cmdbuf_get(struct host1x_bo *host_bo)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf = container_of(host_bo, struct tegra_se_cmdbuf, bo);</div><div class='add'>+</div><div class='add'>+	kref_get(&amp;cmdbuf-&gt;ref);</div><div class='add'>+</div><div class='add'>+	return host_bo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_se_cmdbuf_release(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf = container_of(ref, struct tegra_se_cmdbuf, ref);</div><div class='add'>+</div><div class='add'>+	dma_free_attrs(cmdbuf-&gt;dev, cmdbuf-&gt;size, cmdbuf-&gt;addr,</div><div class='add'>+		       cmdbuf-&gt;iova, 0);</div><div class='add'>+</div><div class='add'>+	kfree(cmdbuf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_se_cmdbuf_put(struct host1x_bo *host_bo)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf = container_of(host_bo, struct tegra_se_cmdbuf, bo);</div><div class='add'>+</div><div class='add'>+	kref_put(&amp;cmdbuf-&gt;ref, tegra_se_cmdbuf_release);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct host1x_bo_mapping *</div><div class='add'>+tegra_se_cmdbuf_pin(struct device *dev, struct host1x_bo *bo, enum dma_data_direction direction)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf = container_of(bo, struct tegra_se_cmdbuf, bo);</div><div class='add'>+	struct host1x_bo_mapping *map;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	map = kzalloc(sizeof(*map), GFP_KERNEL);</div><div class='add'>+	if (!map)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	kref_init(&amp;map-&gt;ref);</div><div class='add'>+	map-&gt;bo = host1x_bo_get(bo);</div><div class='add'>+	map-&gt;direction = direction;</div><div class='add'>+	map-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	map-&gt;sgt = kzalloc(sizeof(*map-&gt;sgt), GFP_KERNEL);</div><div class='add'>+	if (!map-&gt;sgt) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = dma_get_sgtable(dev, map-&gt;sgt, cmdbuf-&gt;addr,</div><div class='add'>+			      cmdbuf-&gt;iova, cmdbuf-&gt;words * 4);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_sgt;</div><div class='add'>+</div><div class='add'>+	err = dma_map_sgtable(dev, map-&gt;sgt, direction, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_sgt;</div><div class='add'>+</div><div class='add'>+	map-&gt;phys = sg_dma_address(map-&gt;sgt-&gt;sgl);</div><div class='add'>+	map-&gt;size = cmdbuf-&gt;words * 4;</div><div class='add'>+	map-&gt;chunks = err;</div><div class='add'>+</div><div class='add'>+	return map;</div><div class='add'>+</div><div class='add'>+free_sgt:</div><div class='add'>+	sg_free_table(map-&gt;sgt);</div><div class='add'>+	kfree(map-&gt;sgt);</div><div class='add'>+free:</div><div class='add'>+	kfree(map);</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_se_cmdbuf_unpin(struct host1x_bo_mapping *map)</div><div class='add'>+{</div><div class='add'>+	if (!map)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dma_unmap_sgtable(map-&gt;dev, map-&gt;sgt, map-&gt;direction, 0);</div><div class='add'>+	sg_free_table(map-&gt;sgt);</div><div class='add'>+	kfree(map-&gt;sgt);</div><div class='add'>+	host1x_bo_put(map-&gt;bo);</div><div class='add'>+</div><div class='add'>+	kfree(map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *tegra_se_cmdbuf_mmap(struct host1x_bo *host_bo)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf = container_of(host_bo, struct tegra_se_cmdbuf, bo);</div><div class='add'>+</div><div class='add'>+	return cmdbuf-&gt;addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_se_cmdbuf_munmap(struct host1x_bo *host_bo, void *addr)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct host1x_bo_ops tegra_se_cmdbuf_ops = {</div><div class='add'>+	.get = tegra_se_cmdbuf_get,</div><div class='add'>+	.put = tegra_se_cmdbuf_put,</div><div class='add'>+	.pin = tegra_se_cmdbuf_pin,</div><div class='add'>+	.unpin = tegra_se_cmdbuf_unpin,</div><div class='add'>+	.mmap = tegra_se_cmdbuf_mmap,</div><div class='add'>+	.munmap = tegra_se_cmdbuf_munmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct tegra_se_cmdbuf *tegra_se_host1x_bo_alloc(struct tegra_se *se, ssize_t size)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf;</div><div class='add'>+	struct device *dev = se-&gt;dev-&gt;parent;</div><div class='add'>+</div><div class='add'>+	cmdbuf = kzalloc(sizeof(*cmdbuf), GFP_KERNEL);</div><div class='add'>+	if (!cmdbuf)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	cmdbuf-&gt;addr = dma_alloc_attrs(dev, size, &amp;cmdbuf-&gt;iova,</div><div class='add'>+				       GFP_KERNEL, 0);</div><div class='add'>+	if (!cmdbuf-&gt;addr)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	cmdbuf-&gt;size = size;</div><div class='add'>+	cmdbuf-&gt;dev  = dev;</div><div class='add'>+</div><div class='add'>+	host1x_bo_init(&amp;cmdbuf-&gt;bo, &amp;tegra_se_cmdbuf_ops);</div><div class='add'>+	kref_init(&amp;cmdbuf-&gt;ref);</div><div class='add'>+</div><div class='add'>+	return cmdbuf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tegra_se_host1x_submit(struct tegra_se *se, u32 size)</div><div class='add'>+{</div><div class='add'>+	struct host1x_job *job;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	job = host1x_job_alloc(se-&gt;channel, 1, 0, true);</div><div class='add'>+	if (!job) {</div><div class='add'>+		dev_err(se-&gt;dev, "failed to allocate host1x job\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	job-&gt;syncpt = host1x_syncpt_get(se-&gt;syncpt);</div><div class='add'>+	job-&gt;syncpt_incrs = 1;</div><div class='add'>+	job-&gt;client = &amp;se-&gt;client;</div><div class='add'>+	job-&gt;class = se-&gt;client.class;</div><div class='add'>+	job-&gt;serialize = true;</div><div class='add'>+	job-&gt;engine_fallback_streamid = se-&gt;stream_id;</div><div class='add'>+	job-&gt;engine_streamid_offset = SE_STREAM_ID;</div><div class='add'>+</div><div class='add'>+	se-&gt;cmdbuf-&gt;words = size;</div><div class='add'>+</div><div class='add'>+	host1x_job_add_gather(job, &amp;se-&gt;cmdbuf-&gt;bo, size, 0);</div><div class='add'>+</div><div class='add'>+	ret = host1x_job_pin(job, se-&gt;dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(se-&gt;dev, "failed to pin host1x job\n");</div><div class='add'>+		goto job_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = host1x_job_submit(job);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(se-&gt;dev, "failed to submit host1x job\n");</div><div class='add'>+		goto job_unpin;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = host1x_syncpt_wait(job-&gt;syncpt, job-&gt;syncpt_end,</div><div class='add'>+				 MAX_SCHEDULE_TIMEOUT, NULL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(se-&gt;dev, "host1x job timed out\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	host1x_job_put(job);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+job_unpin:</div><div class='add'>+	host1x_job_unpin(job);</div><div class='add'>+job_put:</div><div class='add'>+	host1x_job_put(job);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_se_client_init(struct host1x_client *client)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = container_of(client, struct tegra_se, client);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	se-&gt;channel = host1x_channel_request(&amp;se-&gt;client);</div><div class='add'>+	if (!se-&gt;channel) {</div><div class='add'>+		dev_err(se-&gt;dev, "host1x channel map failed\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	se-&gt;syncpt = host1x_syncpt_request(&amp;se-&gt;client, 0);</div><div class='add'>+	if (!se-&gt;syncpt) {</div><div class='add'>+		dev_err(se-&gt;dev, "host1x syncpt allocation failed\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto channel_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	se-&gt;syncpt_id =  host1x_syncpt_id(se-&gt;syncpt);</div><div class='add'>+</div><div class='add'>+	se-&gt;cmdbuf = tegra_se_host1x_bo_alloc(se, SZ_4K);</div><div class='add'>+	if (!se-&gt;cmdbuf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto syncpt_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = se-&gt;hw-&gt;init_alg(se);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(se-&gt;dev, "failed to register algorithms\n");</div><div class='add'>+		goto cmdbuf_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+cmdbuf_put:</div><div class='add'>+	tegra_se_cmdbuf_put(&amp;se-&gt;cmdbuf-&gt;bo);</div><div class='add'>+syncpt_put:</div><div class='add'>+	host1x_syncpt_put(se-&gt;syncpt);</div><div class='add'>+channel_put:</div><div class='add'>+	host1x_channel_put(se-&gt;channel);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_se_client_deinit(struct host1x_client *client)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = container_of(client, struct tegra_se, client);</div><div class='add'>+</div><div class='add'>+	se-&gt;hw-&gt;deinit_alg(se);</div><div class='add'>+	tegra_se_cmdbuf_put(&amp;se-&gt;cmdbuf-&gt;bo);</div><div class='add'>+	host1x_syncpt_put(se-&gt;syncpt);</div><div class='add'>+	host1x_channel_put(se-&gt;channel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct host1x_client_ops tegra_se_client_ops = {</div><div class='add'>+	.init = tegra_se_client_init,</div><div class='add'>+	.exit = tegra_se_client_deinit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tegra_se_host1x_register(struct tegra_se *se)</div><div class='add'>+{</div><div class='add'>+	INIT_LIST_HEAD(&amp;se-&gt;client.list);</div><div class='add'>+	se-&gt;client.dev = se-&gt;dev;</div><div class='add'>+	se-&gt;client.ops = &amp;tegra_se_client_ops;</div><div class='add'>+	se-&gt;client.class = se-&gt;hw-&gt;host1x_class;</div><div class='add'>+	se-&gt;client.num_syncpts = 1;</div><div class='add'>+</div><div class='add'>+	host1x_client_register(&amp;se-&gt;client);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_se_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct tegra_se *se;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	se = devm_kzalloc(dev, sizeof(*se), GFP_KERNEL);</div><div class='add'>+	if (!se)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	se-&gt;dev = dev;</div><div class='add'>+	se-&gt;owner = TEGRA_GPSE_ID;</div><div class='add'>+	se-&gt;hw = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	se-&gt;base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(se-&gt;base))</div><div class='add'>+		return PTR_ERR(se-&gt;base);</div><div class='add'>+</div><div class='add'>+	dma_set_mask_and_coherent(dev, DMA_BIT_MASK(39));</div><div class='add'>+	platform_set_drvdata(pdev, se);</div><div class='add'>+</div><div class='add'>+	se-&gt;clk = devm_clk_get_enabled(se-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(se-&gt;clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(se-&gt;clk),</div><div class='add'>+				"failed to enable clocks\n");</div><div class='add'>+</div><div class='add'>+	if (!tegra_dev_iommu_get_stream_id(dev, &amp;se-&gt;stream_id))</div><div class='add'>+		return dev_err_probe(dev, -ENODEV,</div><div class='add'>+				"failed to get IOMMU stream ID\n");</div><div class='add'>+</div><div class='add'>+	writel(se-&gt;stream_id, se-&gt;base + SE_STREAM_ID);</div><div class='add'>+</div><div class='add'>+	se-&gt;engine = crypto_engine_alloc_init(dev, 0);</div><div class='add'>+	if (!se-&gt;engine)</div><div class='add'>+		return dev_err_probe(dev, -ENOMEM, "failed to init crypto engine\n");</div><div class='add'>+</div><div class='add'>+	ret = crypto_engine_start(se-&gt;engine);</div><div class='add'>+	if (ret) {</div><div class='add'>+		crypto_engine_exit(se-&gt;engine);</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to start crypto engine\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tegra_se_host1x_register(se);</div><div class='add'>+	if (ret) {</div><div class='add'>+		crypto_engine_stop(se-&gt;engine);</div><div class='add'>+		crypto_engine_exit(se-&gt;engine);</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to init host1x params\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tegra_se_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct tegra_se *se = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	crypto_engine_stop(se-&gt;engine);</div><div class='add'>+	crypto_engine_exit(se-&gt;engine);</div><div class='add'>+	iommu_fwspec_free(se-&gt;dev);</div><div class='add'>+	host1x_client_unregister(&amp;se-&gt;client);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct tegra_se_regs tegra234_aes1_regs = {</div><div class='add'>+	.config = SE_AES1_CFG,</div><div class='add'>+	.op = SE_AES1_OPERATION,</div><div class='add'>+	.last_blk = SE_AES1_LAST_BLOCK,</div><div class='add'>+	.linear_ctr = SE_AES1_LINEAR_CTR,</div><div class='add'>+	.aad_len = SE_AES1_AAD_LEN,</div><div class='add'>+	.cryp_msg_len = SE_AES1_CRYPTO_MSG_LEN,</div><div class='add'>+	.manifest = SE_AES1_KEYMANIFEST,</div><div class='add'>+	.key_addr = SE_AES1_KEY_ADDR,</div><div class='add'>+	.key_data = SE_AES1_KEY_DATA,</div><div class='add'>+	.key_dst = SE_AES1_KEY_DST,</div><div class='add'>+	.result = SE_AES1_CMAC_RESULT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct tegra_se_regs tegra234_hash_regs = {</div><div class='add'>+	.config = SE_SHA_CFG,</div><div class='add'>+	.op = SE_SHA_OPERATION,</div><div class='add'>+	.manifest = SE_SHA_KEYMANIFEST,</div><div class='add'>+	.key_addr = SE_SHA_KEY_ADDR,</div><div class='add'>+	.key_data = SE_SHA_KEY_DATA,</div><div class='add'>+	.key_dst = SE_SHA_KEY_DST,</div><div class='add'>+	.result = SE_SHA_HASH_RESULT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct tegra_se_hw tegra234_aes_hw = {</div><div class='add'>+	.regs = &amp;tegra234_aes1_regs,</div><div class='add'>+	.kac_ver = 1,</div><div class='add'>+	.host1x_class = 0x3b,</div><div class='add'>+	.init_alg = tegra_init_aes,</div><div class='add'>+	.deinit_alg = tegra_deinit_aes,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct tegra_se_hw tegra234_hash_hw = {</div><div class='add'>+	.regs = &amp;tegra234_hash_regs,</div><div class='add'>+	.kac_ver = 1,</div><div class='add'>+	.host1x_class = 0x3d,</div><div class='add'>+	.init_alg = tegra_init_hash,</div><div class='add'>+	.deinit_alg = tegra_deinit_hash,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id tegra_se_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "nvidia,tegra234-se-aes",</div><div class='add'>+		.data = &amp;tegra234_aes_hw</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "nvidia,tegra234-se-hash",</div><div class='add'>+		.data = &amp;tegra234_hash_hw,</div><div class='add'>+	},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, tegra_se_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra_se_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "tegra-se",</div><div class='add'>+		.of_match_table = tegra_se_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe		= tegra_se_probe,</div><div class='add'>+	.remove_new	= tegra_se_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tegra_se_host1x_probe(struct host1x_device *dev)</div><div class='add'>+{</div><div class='add'>+	return host1x_device_init(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_se_host1x_remove(struct host1x_device *dev)</div><div class='add'>+{</div><div class='add'>+	host1x_device_exit(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct host1x_driver tegra_se_host1x_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "tegra-se-host1x",</div><div class='add'>+	},</div><div class='add'>+	.probe = tegra_se_host1x_probe,</div><div class='add'>+	.remove = tegra_se_host1x_remove,</div><div class='add'>+	.subdevs = tegra_se_of_match,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init tegra_se_module_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = host1x_driver_register(&amp;tegra_se_host1x_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return platform_driver_register(&amp;tegra_se_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit tegra_se_module_exit(void)</div><div class='add'>+{</div><div class='add'>+	host1x_driver_unregister(&amp;tegra_se_host1x_driver);</div><div class='add'>+	platform_driver_unregister(&amp;tegra_se_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(tegra_se_module_init);</div><div class='add'>+module_exit(tegra_se_module_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("NVIDIA Tegra Security Engine Driver");</div><div class='add'>+MODULE_AUTHOR("Akhil R &lt;akhilrajeev@nvidia.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se.h b/drivers/crypto/tegra/tegra-se.h<br/>new file mode 100644<br/>index 000000000000..b9dd7ceb8783<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/crypto/tegra/tegra-se.h</a></div><div class='hunk'>@@ -0,0 +1,560 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * Header file for NVIDIA Security Engine driver.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _TEGRA_SE_H</div><div class='add'>+#define _TEGRA_SE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/iommu.h&gt;</div><div class='add'>+#include &lt;linux/host1x.h&gt;</div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;crypto/engine.h&gt;</div><div class='add'>+#include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha1.h&gt;</div><div class='add'>+#include &lt;crypto/sha3.h&gt;</div><div class='add'>+#include &lt;crypto/skcipher.h&gt;</div><div class='add'>+</div><div class='add'>+#define SE_OWNERSHIP					0x14</div><div class='add'>+#define SE_OWNERSHIP_UID(x)				FIELD_GET(GENMASK(7, 0), x)</div><div class='add'>+#define TEGRA_GPSE_ID					3</div><div class='add'>+</div><div class='add'>+#define SE_STREAM_ID					0x90</div><div class='add'>+</div><div class='add'>+#define SE_SHA_CFG					0x4004</div><div class='add'>+#define SE_SHA_KEY_ADDR					0x4094</div><div class='add'>+#define SE_SHA_KEY_DATA					0x4098</div><div class='add'>+#define SE_SHA_KEYMANIFEST				0x409c</div><div class='add'>+#define SE_SHA_CRYPTO_CFG				0x40a4</div><div class='add'>+#define SE_SHA_KEY_DST					0x40a8</div><div class='add'>+#define SE_SHA_SRC_KSLT					0x4180</div><div class='add'>+#define SE_SHA_TGT_KSLT					0x4184</div><div class='add'>+#define SE_SHA_MSG_LENGTH				0x401c</div><div class='add'>+#define SE_SHA_OPERATION				0x407c</div><div class='add'>+#define SE_SHA_HASH_RESULT				0x40b0</div><div class='add'>+</div><div class='add'>+#define SE_SHA_ENC_MODE(x)				FIELD_PREP(GENMASK(31, 24), x)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA1				SE_SHA_ENC_MODE(0)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA224				SE_SHA_ENC_MODE(4)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA256				SE_SHA_ENC_MODE(5)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA384				SE_SHA_ENC_MODE(6)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA512				SE_SHA_ENC_MODE(7)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA_CTX_INTEGRITY		SE_SHA_ENC_MODE(8)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA3_224			SE_SHA_ENC_MODE(9)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA3_256			SE_SHA_ENC_MODE(10)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA3_384			SE_SHA_ENC_MODE(11)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHA3_512			SE_SHA_ENC_MODE(12)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHAKE128			SE_SHA_ENC_MODE(13)</div><div class='add'>+#define SE_SHA_ENC_MODE_SHAKE256			SE_SHA_ENC_MODE(14)</div><div class='add'>+#define SE_SHA_ENC_MODE_HMAC_SHA256_1KEY		SE_SHA_ENC_MODE(0)</div><div class='add'>+#define SE_SHA_ENC_MODE_HMAC_SHA256_2KEY		SE_SHA_ENC_MODE(1)</div><div class='add'>+#define SE_SHA_ENC_MODE_SM3_256				SE_SHA_ENC_MODE(0)</div><div class='add'>+</div><div class='add'>+#define SE_SHA_CFG_ENC_ALG(x)				FIELD_PREP(GENMASK(15, 12), x)</div><div class='add'>+#define SE_SHA_ENC_ALG_NOP				SE_SHA_CFG_ENC_ALG(0)</div><div class='add'>+#define SE_SHA_ENC_ALG_SHA_ENC				SE_SHA_CFG_ENC_ALG(1)</div><div class='add'>+#define SE_SHA_ENC_ALG_RNG				SE_SHA_CFG_ENC_ALG(2)</div><div class='add'>+#define SE_SHA_ENC_ALG_SHA				SE_SHA_CFG_ENC_ALG(3)</div><div class='add'>+#define SE_SHA_ENC_ALG_SM3				SE_SHA_CFG_ENC_ALG(4)</div><div class='add'>+#define SE_SHA_ENC_ALG_HMAC				SE_SHA_CFG_ENC_ALG(7)</div><div class='add'>+#define SE_SHA_ENC_ALG_KDF				SE_SHA_CFG_ENC_ALG(8)</div><div class='add'>+#define SE_SHA_ENC_ALG_KEY_INVLD			SE_SHA_CFG_ENC_ALG(10)</div><div class='add'>+#define SE_SHA_ENC_ALG_KEY_INQUIRE			SE_SHA_CFG_ENC_ALG(12)</div><div class='add'>+#define SE_SHA_ENC_ALG_INS				SE_SHA_CFG_ENC_ALG(13)</div><div class='add'>+</div><div class='add'>+#define SE_SHA_OP_LASTBUF				FIELD_PREP(BIT(16), 1)</div><div class='add'>+#define SE_SHA_OP_WRSTALL				FIELD_PREP(BIT(15), 1)</div><div class='add'>+</div><div class='add'>+#define SE_SHA_OP_OP(x)					FIELD_PREP(GENMASK(2, 0), x)</div><div class='add'>+#define SE_SHA_OP_START					SE_SHA_OP_OP(1)</div><div class='add'>+#define SE_SHA_OP_RESTART_OUT				SE_SHA_OP_OP(2)</div><div class='add'>+#define SE_SHA_OP_RESTART_IN				SE_SHA_OP_OP(4)</div><div class='add'>+#define SE_SHA_OP_RESTART_INOUT				SE_SHA_OP_OP(5)</div><div class='add'>+#define SE_SHA_OP_DUMMY					SE_SHA_OP_OP(6)</div><div class='add'>+</div><div class='add'>+#define SE_SHA_CFG_DEC_ALG(x)				FIELD_PREP(GENMASK(11, 8), x)</div><div class='add'>+#define SE_SHA_DEC_ALG_NOP				SE_SHA_CFG_DEC_ALG(0)</div><div class='add'>+#define SE_SHA_DEC_ALG_AES_DEC				SE_SHA_CFG_DEC_ALG(1)</div><div class='add'>+#define SE_SHA_DEC_ALG_HMAC				SE_SHA_CFG_DEC_ALG(7)</div><div class='add'>+#define SE_SHA_DEC_ALG_HMAC_VERIFY			SE_SHA_CFG_DEC_ALG(9)</div><div class='add'>+</div><div class='add'>+#define SE_SHA_CFG_DST(x)				FIELD_PREP(GENMASK(4, 2), x)</div><div class='add'>+#define SE_SHA_DST_MEMORY				SE_SHA_CFG_DST(0)</div><div class='add'>+#define SE_SHA_DST_HASH_REG				SE_SHA_CFG_DST(1)</div><div class='add'>+#define SE_SHA_DST_KEYTABLE				SE_SHA_CFG_DST(2)</div><div class='add'>+#define SE_SHA_DST_SRK					SE_SHA_CFG_DST(3)</div><div class='add'>+</div><div class='add'>+#define SE_SHA_TASK_HASH_INIT				BIT(0)</div><div class='add'>+</div><div class='add'>+/* AES Configuration */</div><div class='add'>+#define SE_AES0_CFG					0x1004</div><div class='add'>+#define SE_AES0_CRYPTO_CONFIG				0x1008</div><div class='add'>+#define SE_AES0_KEY_DST					0x1030</div><div class='add'>+#define SE_AES0_OPERATION				0x1038</div><div class='add'>+#define SE_AES0_LINEAR_CTR				0x101c</div><div class='add'>+#define SE_AES0_LAST_BLOCK				0x102c</div><div class='add'>+#define SE_AES0_KEY_ADDR				0x10bc</div><div class='add'>+#define SE_AES0_KEY_DATA				0x10c0</div><div class='add'>+#define SE_AES0_CMAC_RESULT				0x10c4</div><div class='add'>+#define SE_AES0_SRC_KSLT				0x1100</div><div class='add'>+#define SE_AES0_TGT_KSLT				0x1104</div><div class='add'>+#define SE_AES0_KEYMANIFEST				0x1114</div><div class='add'>+#define SE_AES0_AAD_LEN					0x112c</div><div class='add'>+#define SE_AES0_CRYPTO_MSG_LEN				0x1134</div><div class='add'>+</div><div class='add'>+#define SE_AES1_CFG					0x2004</div><div class='add'>+#define SE_AES1_CRYPTO_CONFIG				0x2008</div><div class='add'>+#define SE_AES1_KEY_DST					0x2030</div><div class='add'>+#define SE_AES1_OPERATION				0x2038</div><div class='add'>+#define SE_AES1_LINEAR_CTR				0x201c</div><div class='add'>+#define SE_AES1_LAST_BLOCK				0x202c</div><div class='add'>+#define SE_AES1_KEY_ADDR				0x20bc</div><div class='add'>+#define SE_AES1_KEY_DATA				0x20c0</div><div class='add'>+#define SE_AES1_CMAC_RESULT				0x20c4</div><div class='add'>+#define SE_AES1_SRC_KSLT				0x2100</div><div class='add'>+#define SE_AES1_TGT_KSLT				0x2104</div><div class='add'>+#define SE_AES1_KEYMANIFEST				0x2114</div><div class='add'>+#define SE_AES1_AAD_LEN					0x212c</div><div class='add'>+#define SE_AES1_CRYPTO_MSG_LEN				0x2134</div><div class='add'>+</div><div class='add'>+#define SE_AES_CFG_ENC_MODE(x)				FIELD_PREP(GENMASK(31, 24), x)</div><div class='add'>+#define SE_AES_ENC_MODE_GMAC				SE_AES_CFG_ENC_MODE(3)</div><div class='add'>+#define SE_AES_ENC_MODE_GCM				SE_AES_CFG_ENC_MODE(4)</div><div class='add'>+#define SE_AES_ENC_MODE_GCM_FINAL			SE_AES_CFG_ENC_MODE(5)</div><div class='add'>+#define SE_AES_ENC_MODE_CMAC				SE_AES_CFG_ENC_MODE(7)</div><div class='add'>+#define SE_AES_ENC_MODE_CBC_MAC				SE_AES_CFG_ENC_MODE(12)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CFG_DEC_MODE(x)				FIELD_PREP(GENMASK(23, 16), x)</div><div class='add'>+#define SE_AES_DEC_MODE_GMAC				SE_AES_CFG_DEC_MODE(3)</div><div class='add'>+#define SE_AES_DEC_MODE_GCM				SE_AES_CFG_DEC_MODE(4)</div><div class='add'>+#define SE_AES_DEC_MODE_GCM_FINAL			SE_AES_CFG_DEC_MODE(5)</div><div class='add'>+#define SE_AES_DEC_MODE_CBC_MAC				SE_AES_CFG_DEC_MODE(12)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CFG_ENC_ALG(x)				FIELD_PREP(GENMASK(15, 12), x)</div><div class='add'>+#define SE_AES_ENC_ALG_NOP				SE_AES_CFG_ENC_ALG(0)</div><div class='add'>+#define SE_AES_ENC_ALG_AES_ENC				SE_AES_CFG_ENC_ALG(1)</div><div class='add'>+#define SE_AES_ENC_ALG_RNG				SE_AES_CFG_ENC_ALG(2)</div><div class='add'>+#define SE_AES_ENC_ALG_SHA				SE_AES_CFG_ENC_ALG(3)</div><div class='add'>+#define SE_AES_ENC_ALG_HMAC				SE_AES_CFG_ENC_ALG(7)</div><div class='add'>+#define SE_AES_ENC_ALG_KDF				SE_AES_CFG_ENC_ALG(8)</div><div class='add'>+#define SE_AES_ENC_ALG_INS				SE_AES_CFG_ENC_ALG(13)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CFG_DEC_ALG(x)				FIELD_PREP(GENMASK(11, 8), x)</div><div class='add'>+#define SE_AES_DEC_ALG_NOP				SE_AES_CFG_DEC_ALG(0)</div><div class='add'>+#define SE_AES_DEC_ALG_AES_DEC				SE_AES_CFG_DEC_ALG(1)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CFG_DST(x)				FIELD_PREP(GENMASK(4, 2), x)</div><div class='add'>+#define SE_AES_DST_MEMORY				SE_AES_CFG_DST(0)</div><div class='add'>+#define SE_AES_DST_HASH_REG				SE_AES_CFG_DST(1)</div><div class='add'>+#define SE_AES_DST_KEYTABLE				SE_AES_CFG_DST(2)</div><div class='add'>+#define SE_AES_DST_SRK					SE_AES_CFG_DST(3)</div><div class='add'>+</div><div class='add'>+/* AES Crypto Configuration */</div><div class='add'>+#define SE_AES_KEY2_INDEX(x)				FIELD_PREP(GENMASK(31, 28), x)</div><div class='add'>+#define SE_AES_KEY_INDEX(x)				FIELD_PREP(GENMASK(27, 24), x)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_SCC_DIS			FIELD_PREP(BIT(20), 1)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_CTR_CNTN(x)			FIELD_PREP(GENMASK(18, 11), x)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_IV_MODE(x)			FIELD_PREP(BIT(10), x)</div><div class='add'>+#define SE_AES_IV_MODE_SWIV				SE_AES_CRYPTO_CFG_IV_MODE(0)</div><div class='add'>+#define SE_AES_IV_MODE_HWIV				SE_AES_CRYPTO_CFG_IV_MODE(1)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_CORE_SEL(x)			FIELD_PREP(BIT(9), x)</div><div class='add'>+#define SE_AES_CORE_SEL_DECRYPT				SE_AES_CRYPTO_CFG_CORE_SEL(0)</div><div class='add'>+#define SE_AES_CORE_SEL_ENCRYPT				SE_AES_CRYPTO_CFG_CORE_SEL(1)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_IV_SEL(x)			FIELD_PREP(GENMASK(8, 7), x)</div><div class='add'>+#define SE_AES_IV_SEL_UPDATED				SE_AES_CRYPTO_CFG_IV_SEL(1)</div><div class='add'>+#define SE_AES_IV_SEL_REG				SE_AES_CRYPTO_CFG_IV_SEL(2)</div><div class='add'>+#define SE_AES_IV_SEL_RANDOM				SE_AES_CRYPTO_CFG_IV_SEL(3)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_VCTRAM_SEL(x)			FIELD_PREP(GENMASK(6, 5), x)</div><div class='add'>+#define SE_AES_VCTRAM_SEL_MEMORY			SE_AES_CRYPTO_CFG_VCTRAM_SEL(0)</div><div class='add'>+#define SE_AES_VCTRAM_SEL_TWEAK				SE_AES_CRYPTO_CFG_VCTRAM_SEL(1)</div><div class='add'>+#define SE_AES_VCTRAM_SEL_AESOUT			SE_AES_CRYPTO_CFG_VCTRAM_SEL(2)</div><div class='add'>+#define SE_AES_VCTRAM_SEL_PREV_MEM			SE_AES_CRYPTO_CFG_VCTRAM_SEL(3)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_INPUT_SEL(x)			FIELD_PREP(GENMASK(4, 3), x)</div><div class='add'>+#define SE_AES_INPUT_SEL_MEMORY				SE_AES_CRYPTO_CFG_INPUT_SEL(0)</div><div class='add'>+#define SE_AES_INPUT_SEL_RANDOM				SE_AES_CRYPTO_CFG_INPUT_SEL(1)</div><div class='add'>+#define SE_AES_INPUT_SEL_AESOUT				SE_AES_CRYPTO_CFG_INPUT_SEL(2)</div><div class='add'>+#define SE_AES_INPUT_SEL_LINEAR_CTR			SE_AES_CRYPTO_CFG_INPUT_SEL(3)</div><div class='add'>+#define SE_AES_INPUT_SEL_REG				SE_AES_CRYPTO_CFG_INPUT_SEL(1)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_XOR_POS(x)			FIELD_PREP(GENMASK(2, 1), x)</div><div class='add'>+#define SE_AES_XOR_POS_BYPASS				SE_AES_CRYPTO_CFG_XOR_POS(0)</div><div class='add'>+#define SE_AES_XOR_POS_BOTH				SE_AES_CRYPTO_CFG_XOR_POS(1)</div><div class='add'>+#define SE_AES_XOR_POS_TOP				SE_AES_CRYPTO_CFG_XOR_POS(2)</div><div class='add'>+#define SE_AES_XOR_POS_BOTTOM				SE_AES_CRYPTO_CFG_XOR_POS(3)</div><div class='add'>+</div><div class='add'>+#define SE_AES_CRYPTO_CFG_HASH_EN(x)			FIELD_PREP(BIT(0), x)</div><div class='add'>+#define SE_AES_HASH_DISABLE				SE_AES_CRYPTO_CFG_HASH_EN(0)</div><div class='add'>+#define SE_AES_HASH_ENABLE				SE_AES_CRYPTO_CFG_HASH_EN(1)</div><div class='add'>+</div><div class='add'>+#define SE_LAST_BLOCK_VAL(x)				FIELD_PREP(GENMASK(19, 0), x)</div><div class='add'>+#define SE_LAST_BLOCK_RES_BITS(x)			FIELD_PREP(GENMASK(26, 20), x)</div><div class='add'>+</div><div class='add'>+#define SE_AES_OP_LASTBUF				FIELD_PREP(BIT(16), 1)</div><div class='add'>+#define SE_AES_OP_WRSTALL				FIELD_PREP(BIT(15), 1)</div><div class='add'>+#define SE_AES_OP_FINAL					FIELD_PREP(BIT(5), 1)</div><div class='add'>+#define SE_AES_OP_INIT					FIELD_PREP(BIT(4), 1)</div><div class='add'>+</div><div class='add'>+#define SE_AES_OP_OP(x)					FIELD_PREP(GENMASK(2, 0), x)</div><div class='add'>+#define SE_AES_OP_START					SE_AES_OP_OP(1)</div><div class='add'>+#define SE_AES_OP_RESTART_OUT				SE_AES_OP_OP(2)</div><div class='add'>+#define SE_AES_OP_RESTART_IN				SE_AES_OP_OP(4)</div><div class='add'>+#define SE_AES_OP_RESTART_INOUT				SE_AES_OP_OP(5)</div><div class='add'>+#define SE_AES_OP_DUMMY					SE_AES_OP_OP(6)</div><div class='add'>+</div><div class='add'>+#define SE_KAC_SIZE(x)					FIELD_PREP(GENMASK(15, 14), x)</div><div class='add'>+#define SE_KAC_SIZE_128					SE_KAC_SIZE(0)</div><div class='add'>+#define SE_KAC_SIZE_192					SE_KAC_SIZE(1)</div><div class='add'>+#define SE_KAC_SIZE_256					SE_KAC_SIZE(2)</div><div class='add'>+</div><div class='add'>+#define SE_KAC_EXPORTABLE				FIELD_PREP(BIT(12), 1)</div><div class='add'>+</div><div class='add'>+#define SE_KAC_PURPOSE(x)				FIELD_PREP(GENMASK(11, 8), x)</div><div class='add'>+#define SE_KAC_ENC					SE_KAC_PURPOSE(0)</div><div class='add'>+#define SE_KAC_CMAC					SE_KAC_PURPOSE(1)</div><div class='add'>+#define SE_KAC_HMAC					SE_KAC_PURPOSE(2)</div><div class='add'>+#define SE_KAC_GCM_KW					SE_KAC_PURPOSE(3)</div><div class='add'>+#define SE_KAC_HMAC_KDK					SE_KAC_PURPOSE(6)</div><div class='add'>+#define SE_KAC_HMAC_KDD					SE_KAC_PURPOSE(7)</div><div class='add'>+#define SE_KAC_HMAC_KDD_KUW				SE_KAC_PURPOSE(8)</div><div class='add'>+#define SE_KAC_XTS					SE_KAC_PURPOSE(9)</div><div class='add'>+#define SE_KAC_GCM					SE_KAC_PURPOSE(10)</div><div class='add'>+</div><div class='add'>+#define SE_KAC_USER_NS					FIELD_PREP(GENMASK(6, 4), 3)</div><div class='add'>+</div><div class='add'>+#define SE_AES_KEY_DST_INDEX(x)				FIELD_PREP(GENMASK(11, 8), x)</div><div class='add'>+#define SE_ADDR_HI_MSB(x)				FIELD_PREP(GENMASK(31, 24), x)</div><div class='add'>+#define SE_ADDR_HI_SZ(x)				FIELD_PREP(GENMASK(23, 0), x)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_AES_ENCRYPT				(SE_AES_ENC_ALG_AES_ENC | \</div><div class='add'>+							 SE_AES_DEC_ALG_NOP | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_AES_DECRYPT				(SE_AES_ENC_ALG_NOP | \</div><div class='add'>+							 SE_AES_DEC_ALG_AES_DEC | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_GMAC_ENCRYPT				(SE_AES_ENC_ALG_AES_ENC | \</div><div class='add'>+							 SE_AES_DEC_ALG_NOP | \</div><div class='add'>+							 SE_AES_ENC_MODE_GMAC | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_GMAC_DECRYPT				(SE_AES_ENC_ALG_NOP | \</div><div class='add'>+							 SE_AES_DEC_ALG_AES_DEC | \</div><div class='add'>+							 SE_AES_DEC_MODE_GMAC | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_GCM_ENCRYPT				(SE_AES_ENC_ALG_AES_ENC | \</div><div class='add'>+							 SE_AES_DEC_ALG_NOP | \</div><div class='add'>+							 SE_AES_ENC_MODE_GCM | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_GCM_DECRYPT				(SE_AES_ENC_ALG_NOP | \</div><div class='add'>+							 SE_AES_DEC_ALG_AES_DEC | \</div><div class='add'>+							 SE_AES_DEC_MODE_GCM | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_GCM_FINAL_ENCRYPT			(SE_AES_ENC_ALG_AES_ENC | \</div><div class='add'>+							 SE_AES_DEC_ALG_NOP | \</div><div class='add'>+							 SE_AES_ENC_MODE_GCM_FINAL | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_GCM_FINAL_DECRYPT			(SE_AES_ENC_ALG_NOP | \</div><div class='add'>+							 SE_AES_DEC_ALG_AES_DEC | \</div><div class='add'>+							 SE_AES_DEC_MODE_GCM_FINAL | \</div><div class='add'>+							 SE_AES_DST_MEMORY)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_CMAC					(SE_AES_ENC_ALG_AES_ENC | \</div><div class='add'>+							 SE_AES_ENC_MODE_CMAC | \</div><div class='add'>+							 SE_AES_DST_HASH_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_CBC_MAC					(SE_AES_ENC_ALG_AES_ENC | \</div><div class='add'>+							 SE_AES_ENC_MODE_CBC_MAC)</div><div class='add'>+</div><div class='add'>+#define SE_CFG_INS					(SE_AES_ENC_ALG_INS | \</div><div class='add'>+							 SE_AES_DEC_ALG_NOP)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_ECB_ENCRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_XOR_POS_BYPASS | \</div><div class='add'>+							 SE_AES_CORE_SEL_ENCRYPT)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_ECB_DECRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_XOR_POS_BYPASS | \</div><div class='add'>+							 SE_AES_CORE_SEL_DECRYPT)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_CBC_ENCRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_AESOUT | \</div><div class='add'>+							 SE_AES_XOR_POS_TOP | \</div><div class='add'>+							 SE_AES_CORE_SEL_ENCRYPT | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_CBC_DECRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_PREV_MEM | \</div><div class='add'>+							 SE_AES_XOR_POS_BOTTOM | \</div><div class='add'>+							 SE_AES_CORE_SEL_DECRYPT | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_CTR				(SE_AES_INPUT_SEL_LINEAR_CTR | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_XOR_POS_BOTTOM | \</div><div class='add'>+							 SE_AES_CORE_SEL_ENCRYPT | \</div><div class='add'>+							 SE_AES_CRYPTO_CFG_CTR_CNTN(1) | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_XTS_ENCRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_TWEAK | \</div><div class='add'>+							 SE_AES_XOR_POS_BOTH | \</div><div class='add'>+							 SE_AES_CORE_SEL_ENCRYPT | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_XTS_DECRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_TWEAK | \</div><div class='add'>+							 SE_AES_XOR_POS_BOTH | \</div><div class='add'>+							 SE_AES_CORE_SEL_DECRYPT | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_XTS_DECRYPT			(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_TWEAK | \</div><div class='add'>+							 SE_AES_XOR_POS_BOTH | \</div><div class='add'>+							 SE_AES_CORE_SEL_DECRYPT | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CFG_CBC_MAC				(SE_AES_INPUT_SEL_MEMORY | \</div><div class='add'>+							 SE_AES_VCTRAM_SEL_AESOUT | \</div><div class='add'>+							 SE_AES_XOR_POS_TOP | \</div><div class='add'>+							 SE_AES_CORE_SEL_ENCRYPT | \</div><div class='add'>+							 SE_AES_HASH_ENABLE | \</div><div class='add'>+							 SE_AES_IV_SEL_REG)</div><div class='add'>+</div><div class='add'>+#define HASH_RESULT_REG_COUNT				50</div><div class='add'>+#define CMAC_RESULT_REG_COUNT				4</div><div class='add'>+</div><div class='add'>+#define SE_CRYPTO_CTR_REG_COUNT			4</div><div class='add'>+#define SE_MAX_KEYSLOT				15</div><div class='add'>+#define SE_MAX_MEM_ALLOC			SZ_4M</div><div class='add'>+#define SE_AES_BUFLEN				0x8000</div><div class='add'>+#define SE_SHA_BUFLEN				0x2000</div><div class='add'>+</div><div class='add'>+#define SHA_FIRST	BIT(0)</div><div class='add'>+#define SHA_UPDATE	BIT(1)</div><div class='add'>+#define SHA_FINAL	BIT(2)</div><div class='add'>+</div><div class='add'>+/* Security Engine operation modes */</div><div class='add'>+enum se_aes_alg {</div><div class='add'>+	SE_ALG_CBC,		/* Cipher Block Chaining (CBC) mode */</div><div class='add'>+	SE_ALG_ECB,		/* Electronic Codebook (ECB) mode */</div><div class='add'>+	SE_ALG_CTR,		/* Counter (CTR) mode */</div><div class='add'>+	SE_ALG_XTS,		/* XTS mode */</div><div class='add'>+	SE_ALG_GMAC,		/* GMAC mode */</div><div class='add'>+	SE_ALG_GCM,		/* GCM mode */</div><div class='add'>+	SE_ALG_GCM_FINAL,	/* GCM FINAL mode */</div><div class='add'>+	SE_ALG_CMAC,	/* Cipher-based MAC (CMAC) mode */</div><div class='add'>+	SE_ALG_CBC_MAC,	/* CBC MAC mode */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum se_hash_alg {</div><div class='add'>+	SE_ALG_RNG_DRBG,	/* Deterministic Random Bit Generator */</div><div class='add'>+	SE_ALG_SHA1,		/* Secure Hash Algorithm-1 (SHA1) mode */</div><div class='add'>+	SE_ALG_SHA224,		/* Secure Hash Algorithm-224  (SHA224) mode */</div><div class='add'>+	SE_ALG_SHA256,		/* Secure Hash Algorithm-256  (SHA256) mode */</div><div class='add'>+	SE_ALG_SHA384,		/* Secure Hash Algorithm-384  (SHA384) mode */</div><div class='add'>+	SE_ALG_SHA512,		/* Secure Hash Algorithm-512  (SHA512) mode */</div><div class='add'>+	SE_ALG_SHA3_224,	/* Secure Hash Algorithm3-224 (SHA3-224) mode */</div><div class='add'>+	SE_ALG_SHA3_256,	/* Secure Hash Algorithm3-256 (SHA3-256) mode */</div><div class='add'>+	SE_ALG_SHA3_384,	/* Secure Hash Algorithm3-384 (SHA3-384) mode */</div><div class='add'>+	SE_ALG_SHA3_512,	/* Secure Hash Algorithm3-512 (SHA3-512) mode */</div><div class='add'>+	SE_ALG_SHAKE128,	/* Secure Hash Algorithm3 (SHAKE128) mode */</div><div class='add'>+	SE_ALG_SHAKE256,	/* Secure Hash Algorithm3 (SHAKE256) mode */</div><div class='add'>+	SE_ALG_HMAC_SHA224,	/* Hash based MAC (HMAC) - 224 */</div><div class='add'>+	SE_ALG_HMAC_SHA256,	/* Hash based MAC (HMAC) - 256 */</div><div class='add'>+	SE_ALG_HMAC_SHA384,	/* Hash based MAC (HMAC) - 384 */</div><div class='add'>+	SE_ALG_HMAC_SHA512,	/* Hash based MAC (HMAC) - 512 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_se_alg {</div><div class='add'>+	struct tegra_se *se_dev;</div><div class='add'>+	const char *alg_base;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct skcipher_engine_alg skcipher;</div><div class='add'>+		struct aead_engine_alg aead;</div><div class='add'>+		struct ahash_engine_alg ahash;</div><div class='add'>+	} alg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_se_regs {</div><div class='add'>+	u32 op;</div><div class='add'>+	u32 config;</div><div class='add'>+	u32 last_blk;</div><div class='add'>+	u32 linear_ctr;</div><div class='add'>+	u32 out_addr;</div><div class='add'>+	u32 aad_len;</div><div class='add'>+	u32 cryp_msg_len;</div><div class='add'>+	u32 manifest;</div><div class='add'>+	u32 key_addr;</div><div class='add'>+	u32 key_data;</div><div class='add'>+	u32 key_dst;</div><div class='add'>+	u32 result;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_se_hw {</div><div class='add'>+	const struct tegra_se_regs *regs;</div><div class='add'>+	int (*init_alg)(struct tegra_se *se);</div><div class='add'>+	void (*deinit_alg)(struct tegra_se *se);</div><div class='add'>+	bool support_sm_alg;</div><div class='add'>+	u32 host1x_class;</div><div class='add'>+	u32 kac_ver;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_se {</div><div class='add'>+	int (*manifest)(u32 user, u32 alg, u32 keylen);</div><div class='add'>+	const struct tegra_se_hw *hw;</div><div class='add'>+	struct host1x_client client;</div><div class='add'>+	struct host1x_channel *channel;</div><div class='add'>+	struct tegra_se_cmdbuf *cmdbuf;</div><div class='add'>+	struct crypto_engine *engine;</div><div class='add'>+	struct host1x_syncpt *syncpt;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	unsigned int opcode_addr;</div><div class='add'>+	unsigned int stream_id;</div><div class='add'>+	unsigned int syncpt_id;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 owner;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_se_cmdbuf {</div><div class='add'>+	dma_addr_t iova;</div><div class='add'>+	u32 *addr;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct kref ref;</div><div class='add'>+	struct host1x_bo bo;</div><div class='add'>+	ssize_t size;</div><div class='add'>+	u32 words;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_se_datbuf {</div><div class='add'>+	u8 *buf;</div><div class='add'>+	dma_addr_t addr;</div><div class='add'>+	ssize_t size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline int se_algname_to_algid(const char *name)</div><div class='add'>+{</div><div class='add'>+	if (!strcmp(name, "cbc(aes)"))</div><div class='add'>+		return SE_ALG_CBC;</div><div class='add'>+	else if (!strcmp(name, "ecb(aes)"))</div><div class='add'>+		return SE_ALG_ECB;</div><div class='add'>+	else if (!strcmp(name, "ctr(aes)"))</div><div class='add'>+		return SE_ALG_CTR;</div><div class='add'>+	else if (!strcmp(name, "xts(aes)"))</div><div class='add'>+		return SE_ALG_XTS;</div><div class='add'>+	else if (!strcmp(name, "cmac(aes)"))</div><div class='add'>+		return SE_ALG_CMAC;</div><div class='add'>+	else if (!strcmp(name, "gcm(aes)"))</div><div class='add'>+		return SE_ALG_GCM;</div><div class='add'>+	else if (!strcmp(name, "ccm(aes)"))</div><div class='add'>+		return SE_ALG_CBC_MAC;</div><div class='add'>+</div><div class='add'>+	else if (!strcmp(name, "sha1"))</div><div class='add'>+		return SE_ALG_SHA1;</div><div class='add'>+	else if (!strcmp(name, "sha224"))</div><div class='add'>+		return SE_ALG_SHA224;</div><div class='add'>+	else if (!strcmp(name, "sha256"))</div><div class='add'>+		return SE_ALG_SHA256;</div><div class='add'>+	else if (!strcmp(name, "sha384"))</div><div class='add'>+		return SE_ALG_SHA384;</div><div class='add'>+	else if (!strcmp(name, "sha512"))</div><div class='add'>+		return SE_ALG_SHA512;</div><div class='add'>+	else if (!strcmp(name, "sha3-224"))</div><div class='add'>+		return SE_ALG_SHA3_224;</div><div class='add'>+	else if (!strcmp(name, "sha3-256"))</div><div class='add'>+		return SE_ALG_SHA3_256;</div><div class='add'>+	else if (!strcmp(name, "sha3-384"))</div><div class='add'>+		return SE_ALG_SHA3_384;</div><div class='add'>+	else if (!strcmp(name, "sha3-512"))</div><div class='add'>+		return SE_ALG_SHA3_512;</div><div class='add'>+	else if (!strcmp(name, "hmac(sha224)"))</div><div class='add'>+		return SE_ALG_HMAC_SHA224;</div><div class='add'>+	else if (!strcmp(name, "hmac(sha256)"))</div><div class='add'>+		return SE_ALG_HMAC_SHA256;</div><div class='add'>+	else if (!strcmp(name, "hmac(sha384)"))</div><div class='add'>+		return SE_ALG_HMAC_SHA384;</div><div class='add'>+	else if (!strcmp(name, "hmac(sha512)"))</div><div class='add'>+		return SE_ALG_HMAC_SHA512;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Functions */</div><div class='add'>+int tegra_init_aes(struct tegra_se *se);</div><div class='add'>+int tegra_init_hash(struct tegra_se *se);</div><div class='add'>+void tegra_deinit_aes(struct tegra_se *se);</div><div class='add'>+void tegra_deinit_hash(struct tegra_se *se);</div><div class='add'>+int tegra_key_submit(struct tegra_se *se, const u8 *key,</div><div class='add'>+		     u32 keylen, u32 alg, u32 *keyid);</div><div class='add'>+void tegra_key_invalidate(struct tegra_se *se, u32 keyid, u32 alg);</div><div class='add'>+int tegra_se_host1x_submit(struct tegra_se *se, u32 size);</div><div class='add'>+</div><div class='add'>+/* HOST1x OPCODES */</div><div class='add'>+static inline u32 host1x_opcode_setpayload(unsigned int payload)</div><div class='add'>+{</div><div class='add'>+	return (9 &lt;&lt; 28) | payload;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_opcode_incr_w(unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	/* 22-bit offset supported */</div><div class='add'>+	return (10 &lt;&lt; 28) | offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_opcode_nonincr_w(unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	/* 22-bit offset supported */</div><div class='add'>+	return (11 &lt;&lt; 28) | offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_opcode_incr(unsigned int offset, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	return (1 &lt;&lt; 28) | (offset &lt;&lt; 16) | count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_opcode_nonincr(unsigned int offset, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	return (2 &lt;&lt; 28) | (offset &lt;&lt; 16) | count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v)</div><div class='add'>+{</div><div class='add'>+	return (v &amp; 0xff) &lt;&lt; 10;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v)</div><div class='add'>+{</div><div class='add'>+	return (v &amp; 0x3ff) &lt;&lt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_uclass_wait_syncpt_r(void)</div><div class='add'>+{</div><div class='add'>+	return 0x8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 host1x_uclass_incr_syncpt_r(void)</div><div class='add'>+{</div><div class='add'>+	return 0x0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define se_host1x_opcode_incr_w(x) host1x_opcode_incr_w((x) / 4)</div><div class='add'>+#define se_host1x_opcode_nonincr_w(x) host1x_opcode_nonincr_w((x) / 4)</div><div class='add'>+#define se_host1x_opcode_incr(x, y) host1x_opcode_incr((x) / 4, y)</div><div class='add'>+#define se_host1x_opcode_nonincr(x, y) host1x_opcode_nonincr((x) / 4, y)</div><div class='add'>+</div><div class='add'>+#endif /*_TEGRA_SE_H*/</div><div class='head'>diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c<br/>index f0f54aeccc87..65185c9fa001 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/mbox.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cxl/core/mbox.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/mbox.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cxl/core/mbox.c</a></div><div class='hunk'>@@ -946,25 +946,22 @@ static void cxl_mem_get_records_log(struct cxl_memdev_state *mds,</div><div class='ctx'> 	struct cxl_memdev *cxlmd = mds-&gt;cxlds.cxlmd;</div><div class='ctx'> 	struct device *dev = mds-&gt;cxlds.dev;</div><div class='ctx'> 	struct cxl_get_event_payload *payload;</div><div class='del'>-	struct cxl_mbox_cmd mbox_cmd;</div><div class='ctx'> 	u8 log_type = type;</div><div class='ctx'> 	u16 nr_rec;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mds-&gt;event.log_lock);</div><div class='ctx'> 	payload = mds-&gt;event.buf;</div><div class='ctx'> </div><div class='del'>-	mbox_cmd = (struct cxl_mbox_cmd) {</div><div class='del'>-		.opcode = CXL_MBOX_OP_GET_EVENT_RECORD,</div><div class='del'>-		.payload_in = &amp;log_type,</div><div class='del'>-		.size_in = sizeof(log_type),</div><div class='del'>-		.payload_out = payload,</div><div class='del'>-		.min_out = struct_size(payload, records, 0),</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='ctx'> 		int rc, i;</div><div class='del'>-</div><div class='del'>-		mbox_cmd.size_out = mds-&gt;payload_size;</div><div class='add'>+		struct cxl_mbox_cmd mbox_cmd = (struct cxl_mbox_cmd) {</div><div class='add'>+			.opcode = CXL_MBOX_OP_GET_EVENT_RECORD,</div><div class='add'>+			.payload_in = &amp;log_type,</div><div class='add'>+			.size_in = sizeof(log_type),</div><div class='add'>+			.payload_out = payload,</div><div class='add'>+			.size_out = mds-&gt;payload_size,</div><div class='add'>+			.min_out = struct_size(payload, records, 0),</div><div class='add'>+		};</div><div class='ctx'> </div><div class='ctx'> 		rc = cxl_internal_send_cmd(mds, &amp;mbox_cmd);</div><div class='ctx'> 		if (rc) {</div><div class='hunk'>@@ -1297,7 +1294,6 @@ int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,</div><div class='ctx'> 	struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd-&gt;cxlds);</div><div class='ctx'> 	struct cxl_mbox_poison_out *po;</div><div class='ctx'> 	struct cxl_mbox_poison_in pi;</div><div class='del'>-	struct cxl_mbox_cmd mbox_cmd;</div><div class='ctx'> 	int nr_records = 0;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -1309,16 +1305,16 @@ int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,</div><div class='ctx'> 	pi.offset = cpu_to_le64(offset);</div><div class='ctx'> 	pi.length = cpu_to_le64(len / CXL_POISON_LEN_MULT);</div><div class='ctx'> </div><div class='del'>-	mbox_cmd = (struct cxl_mbox_cmd) {</div><div class='del'>-		.opcode = CXL_MBOX_OP_GET_POISON,</div><div class='del'>-		.size_in = sizeof(pi),</div><div class='del'>-		.payload_in = &amp;pi,</div><div class='del'>-		.size_out = mds-&gt;payload_size,</div><div class='del'>-		.payload_out = po,</div><div class='del'>-		.min_out = struct_size(po, record, 0),</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='add'>+		struct cxl_mbox_cmd mbox_cmd = (struct cxl_mbox_cmd){</div><div class='add'>+			.opcode = CXL_MBOX_OP_GET_POISON,</div><div class='add'>+			.size_in = sizeof(pi),</div><div class='add'>+			.payload_in = &amp;pi,</div><div class='add'>+			.size_out = mds-&gt;payload_size,</div><div class='add'>+			.payload_out = po,</div><div class='add'>+			.min_out = struct_size(po, record, 0),</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rc = cxl_internal_send_cmd(mds, &amp;mbox_cmd);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c<br/>index 762783bb091a..887ed6e358fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/port.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/cxl/core/port.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/port.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/cxl/core/port.c</a></div><div class='hunk'>@@ -2184,6 +2184,7 @@ static bool parent_port_is_cxl_root(struct cxl_port *port)</div><div class='ctx'> int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,</div><div class='ctx'> 				      struct access_coordinate *coord)</div><div class='ctx'> {</div><div class='add'>+	struct cxl_memdev *cxlmd = to_cxl_memdev(port-&gt;uport_dev);</div><div class='ctx'> 	struct access_coordinate c[] = {</div><div class='ctx'> 		{</div><div class='ctx'> 			.read_bandwidth = UINT_MAX,</div><div class='hunk'>@@ -2197,6 +2198,7 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,</div><div class='ctx'> 	struct cxl_port *iter = port;</div><div class='ctx'> 	struct cxl_dport *dport;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	unsigned int bw;</div><div class='ctx'> 	bool is_cxl_root;</div><div class='ctx'> </div><div class='hunk'>@@ -2204,6 +2206,13 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Skip calculation for RCD. Expectation is HMAT already covers RCD case</div><div class='add'>+	 * since RCH does not support hotplug.</div><div class='add'>+	 */</div><div class='add'>+	if (cxlmd-&gt;cxlds-&gt;rcd)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Exit the loop when the parent port of the current iter port is cxl</div><div class='ctx'> 	 * root. The iterative loop starts at the endpoint and gathers the</div><div class='ctx'> 	 * latency of the CXL link from the current device/port to the connected</div><div class='hunk'>@@ -2232,8 +2241,12 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	cxl_coordinates_combine(c, c, dport-&gt;coord);</div><div class='ctx'> </div><div class='add'>+	dev = port-&gt;uport_dev-&gt;parent;</div><div class='add'>+	if (!dev_is_pci(dev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	/* Get the calculated PCI paths bandwidth */</div><div class='del'>-	pdev = to_pci_dev(port-&gt;uport_dev-&gt;parent);</div><div class='add'>+	pdev = to_pci_dev(dev);</div><div class='ctx'> 	bw = pcie_bandwidth_available(pdev, NULL, NULL, NULL);</div><div class='ctx'> 	if (bw == 0)</div><div class='ctx'> 		return -ENXIO;</div><div class='head'>diff --git a/drivers/dax/device.c b/drivers/dax/device.c<br/>index 93ebedc5ec8c..c24ef4d3cf31 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dax/device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dax/device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dax/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dax/device.c</a></div><div class='hunk'>@@ -377,7 +377,7 @@ static const struct file_operations dax_fops = {</div><div class='ctx'> 	.release = dax_release,</div><div class='ctx'> 	.get_unmapped_area = dax_get_unmapped_area,</div><div class='ctx'> 	.mmap = dax_mmap,</div><div class='del'>-	.mmap_supported_flags = MAP_SYNC,</div><div class='add'>+	.fop_flags = FOP_MMAP_SYNC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void dev_dax_cdev_del(void *cdev)</div><div class='head'>diff --git a/drivers/devfreq/event/exynos-nocp.c b/drivers/devfreq/event/exynos-nocp.c<br/>index c1cc23bcb995..5edc522f715c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/devfreq/event/exynos-nocp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/event/exynos-nocp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/devfreq/event/exynos-nocp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/devfreq/event/exynos-nocp.c</a></div><div class='hunk'>@@ -275,18 +275,16 @@ static int exynos_nocp_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int exynos_nocp_remove(struct platform_device *pdev)</div><div class='add'>+static void exynos_nocp_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct exynos_nocp *nocp = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	clk_disable_unprepare(nocp-&gt;clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver exynos_nocp_driver = {</div><div class='ctx'> 	.probe	= exynos_nocp_probe,</div><div class='del'>-	.remove	= exynos_nocp_remove,</div><div class='add'>+	.remove_new = exynos_nocp_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "exynos-nocp",</div><div class='ctx'> 		.of_match_table = exynos_nocp_id_match,</div><div class='head'>diff --git a/drivers/devfreq/event/exynos-ppmu.c b/drivers/devfreq/event/exynos-ppmu.c<br/>index 56bac4702006..7002df20a49e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/devfreq/event/exynos-ppmu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/event/exynos-ppmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/devfreq/event/exynos-ppmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/devfreq/event/exynos-ppmu.c</a></div><div class='hunk'>@@ -692,18 +692,16 @@ static int exynos_ppmu_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int exynos_ppmu_remove(struct platform_device *pdev)</div><div class='add'>+static void exynos_ppmu_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct exynos_ppmu *info = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	clk_disable_unprepare(info-&gt;ppmu.clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver exynos_ppmu_driver = {</div><div class='ctx'> 	.probe	= exynos_ppmu_probe,</div><div class='del'>-	.remove	= exynos_ppmu_remove,</div><div class='add'>+	.remove_new = exynos_ppmu_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "exynos-ppmu",</div><div class='ctx'> 		.of_match_table = exynos_ppmu_id_match,</div><div class='head'>diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c<br/>index 245898f1a88e..00118580905a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/devfreq/exynos-bus.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/exynos-bus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/devfreq/exynos-bus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/devfreq/exynos-bus.c</a></div><div class='hunk'>@@ -467,7 +467,6 @@ static void exynos_bus_shutdown(struct platform_device *pdev)</div><div class='ctx'> 	devfreq_suspend_device(bus-&gt;devfreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static int exynos_bus_resume(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct exynos_bus *bus = dev_get_drvdata(dev);</div><div class='hunk'>@@ -495,11 +494,9 @@ static int exynos_bus_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-static const struct dev_pm_ops exynos_bus_pm = {</div><div class='del'>-	SET_SYSTEM_SLEEP_PM_OPS(exynos_bus_suspend, exynos_bus_resume)</div><div class='del'>-};</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(exynos_bus_pm,</div><div class='add'>+				exynos_bus_suspend, exynos_bus_resume);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id exynos_bus_of_match[] = {</div><div class='ctx'> 	{ .compatible = "samsung,exynos-bus", },</div><div class='hunk'>@@ -512,7 +509,7 @@ static struct platform_driver exynos_bus_platdrv = {</div><div class='ctx'> 	.shutdown	= exynos_bus_shutdown,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "exynos-bus",</div><div class='del'>-		.pm	= &amp;exynos_bus_pm,</div><div class='add'>+		.pm	= pm_sleep_ptr(&amp;exynos_bus_pm),</div><div class='ctx'> 		.of_match_table = exynos_bus_of_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/devfreq/mtk-cci-devfreq.c b/drivers/devfreq/mtk-cci-devfreq.c<br/>index 11bc3d03494c..7ad5225b0381 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/devfreq/mtk-cci-devfreq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/mtk-cci-devfreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/devfreq/mtk-cci-devfreq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/devfreq/mtk-cci-devfreq.c</a></div><div class='hunk'>@@ -392,7 +392,7 @@ out_free_resources:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_ccifreq_remove(struct platform_device *pdev)</div><div class='add'>+static void mtk_ccifreq_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct mtk_ccifreq_drv *drv;</div><div class='hunk'>@@ -405,8 +405,6 @@ static int mtk_ccifreq_remove(struct platform_device *pdev)</div><div class='ctx'> 	regulator_disable(drv-&gt;proc_reg);</div><div class='ctx'> 	if (drv-&gt;sram_reg)</div><div class='ctx'> 		regulator_disable(drv-&gt;sram_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct mtk_ccifreq_platform_data mt8183_platform_data = {</div><div class='hunk'>@@ -432,7 +430,7 @@ MODULE_DEVICE_TABLE(of, mtk_ccifreq_machines);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver mtk_ccifreq_platdrv = {</div><div class='ctx'> 	.probe	= mtk_ccifreq_probe,</div><div class='del'>-	.remove	= mtk_ccifreq_remove,</div><div class='add'>+	.remove_new = mtk_ccifreq_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "mtk-ccifreq",</div><div class='ctx'> 		.of_match_table = mtk_ccifreq_machines,</div><div class='head'>diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c<br/>index fd2c5ffedf41..d405cee92c25 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/devfreq/rk3399_dmc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/rk3399_dmc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/devfreq/rk3399_dmc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/devfreq/rk3399_dmc.c</a></div><div class='hunk'>@@ -459,13 +459,11 @@ err_edev:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rk3399_dmcfreq_remove(struct platform_device *pdev)</div><div class='add'>+static void rk3399_dmcfreq_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rk3399_dmcfreq *dmcfreq = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	devfreq_event_disable_edev(dmcfreq-&gt;edev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id rk3399dmc_devfreq_of_match[] = {</div><div class='hunk'>@@ -476,7 +474,7 @@ MODULE_DEVICE_TABLE(of, rk3399dmc_devfreq_of_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver rk3399_dmcfreq_driver = {</div><div class='ctx'> 	.probe	= rk3399_dmcfreq_probe,</div><div class='del'>-	.remove = rk3399_dmcfreq_remove,</div><div class='add'>+	.remove_new = rk3399_dmcfreq_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "rk3399-dmc-freq",</div><div class='ctx'> 		.pm	= &amp;rk3399_dmcfreq_pm,</div><div class='head'>diff --git a/drivers/devfreq/sun8i-a33-mbus.c b/drivers/devfreq/sun8i-a33-mbus.c<br/>index 13d32213139f..bcf654f4ff96 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/devfreq/sun8i-a33-mbus.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/devfreq/sun8i-a33-mbus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/devfreq/sun8i-a33-mbus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/devfreq/sun8i-a33-mbus.c</a></div><div class='hunk'>@@ -458,7 +458,7 @@ err_disable_bus:</div><div class='ctx'> 	return dev_err_probe(dev, ret, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sun8i_a33_mbus_remove(struct platform_device *pdev)</div><div class='add'>+static void sun8i_a33_mbus_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sun8i_a33_mbus *priv = platform_get_drvdata(pdev);</div><div class='ctx'> 	unsigned long initial_freq = priv-&gt;profile.initial_freq;</div><div class='hunk'>@@ -475,8 +475,6 @@ static int sun8i_a33_mbus_remove(struct platform_device *pdev)</div><div class='ctx'> 	clk_rate_exclusive_put(priv-&gt;clk_mbus);</div><div class='ctx'> 	clk_rate_exclusive_put(priv-&gt;clk_dram);</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;clk_bus);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct sun8i_a33_mbus_variant sun50i_a64_mbus = {</div><div class='hunk'>@@ -497,7 +495,7 @@ static SIMPLE_DEV_PM_OPS(sun8i_a33_mbus_pm_ops,</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver sun8i_a33_mbus_driver = {</div><div class='ctx'> 	.probe	= sun8i_a33_mbus_probe,</div><div class='del'>-	.remove	= sun8i_a33_mbus_remove,</div><div class='add'>+	.remove_new = sun8i_a33_mbus_remove,</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name		= "sun8i-a33-mbus",</div><div class='ctx'> 		.of_match_table	= sun8i_a33_mbus_of_match,</div><div class='head'>diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c<br/>index 8fe5aa67b167..8892bc701a66 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-buf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma-buf/dma-buf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-buf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma-buf/dma-buf.c</a></div><div class='hunk'>@@ -35,12 +35,35 @@</div><div class='ctx'> </div><div class='ctx'> static inline int is_dma_buf_file(struct file *);</div><div class='ctx'> </div><div class='del'>-struct dma_buf_list {</div><div class='del'>-	struct list_head head;</div><div class='del'>-	struct mutex lock;</div><div class='del'>-};</div><div class='add'>+#if IS_ENABLED(CONFIG_DEBUG_FS)</div><div class='add'>+static DEFINE_MUTEX(debugfs_list_mutex);</div><div class='add'>+static LIST_HEAD(debugfs_list);</div><div class='ctx'> </div><div class='del'>-static struct dma_buf_list db_list;</div><div class='add'>+static void __dma_buf_debugfs_list_add(struct dma_buf *dmabuf)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;debugfs_list_mutex);</div><div class='add'>+	list_add(&amp;dmabuf-&gt;list_node, &amp;debugfs_list);</div><div class='add'>+	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dma_buf_debugfs_list_del(struct dma_buf *dmabuf)</div><div class='add'>+{</div><div class='add'>+	if (!dmabuf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;debugfs_list_mutex);</div><div class='add'>+	list_del(&amp;dmabuf-&gt;list_node);</div><div class='add'>+	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void __dma_buf_debugfs_list_add(struct dma_buf *dmabuf)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dma_buf_debugfs_list_del(struct file *file)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen)</div><div class='ctx'> {</div><div class='hunk'>@@ -89,17 +112,10 @@ static void dma_buf_release(struct dentry *dentry)</div><div class='ctx'> </div><div class='ctx'> static int dma_buf_file_release(struct inode *inode, struct file *file)</div><div class='ctx'> {</div><div class='del'>-	struct dma_buf *dmabuf;</div><div class='del'>-</div><div class='ctx'> 	if (!is_dma_buf_file(file))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	dmabuf = file-&gt;private_data;</div><div class='del'>-	if (dmabuf) {</div><div class='del'>-		mutex_lock(&amp;db_list.lock);</div><div class='del'>-		list_del(&amp;dmabuf-&gt;list_node);</div><div class='del'>-		mutex_unlock(&amp;db_list.lock);</div><div class='del'>-	}</div><div class='add'>+	__dma_buf_debugfs_list_del(file-&gt;private_data);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -672,9 +688,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info)</div><div class='ctx'> 	file-&gt;f_path.dentry-&gt;d_fsdata = dmabuf;</div><div class='ctx'> 	dmabuf-&gt;file = file;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;db_list.lock);</div><div class='del'>-	list_add(&amp;dmabuf-&gt;list_node, &amp;db_list.head);</div><div class='del'>-	mutex_unlock(&amp;db_list.lock);</div><div class='add'>+	__dma_buf_debugfs_list_add(dmabuf);</div><div class='ctx'> </div><div class='ctx'> 	return dmabuf;</div><div class='ctx'> </div><div class='hunk'>@@ -1611,7 +1625,7 @@ static int dma_buf_debug_show(struct seq_file *s, void *unused)</div><div class='ctx'> 	size_t size = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = mutex_lock_interruptible(&amp;db_list.lock);</div><div class='add'>+	ret = mutex_lock_interruptible(&amp;debugfs_list_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1620,7 +1634,7 @@ static int dma_buf_debug_show(struct seq_file *s, void *unused)</div><div class='ctx'> 	seq_printf(s, "%-8s\t%-8s\t%-8s\t%-8s\texp_name\t%-8s\tname\n",</div><div class='ctx'> 		   "size", "flags", "mode", "count", "ino");</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(buf_obj, &amp;db_list.head, list_node) {</div><div class='add'>+	list_for_each_entry(buf_obj, &amp;debugfs_list, list_node) {</div><div class='ctx'> </div><div class='ctx'> 		ret = dma_resv_lock_interruptible(buf_obj-&gt;resv, NULL);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -1657,11 +1671,11 @@ static int dma_buf_debug_show(struct seq_file *s, void *unused)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(s, "\nTotal %d objects, %zu bytes\n", count, size);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;db_list.lock);</div><div class='add'>+	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error_unlock:</div><div class='del'>-	mutex_unlock(&amp;db_list.lock);</div><div class='add'>+	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1718,8 +1732,6 @@ static int __init dma_buf_init(void)</div><div class='ctx'> 	if (IS_ERR(dma_buf_mnt))</div><div class='ctx'> 		return PTR_ERR(dma_buf_mnt);</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;db_list.lock);</div><div class='del'>-	INIT_LIST_HEAD(&amp;db_list.head);</div><div class='ctx'> 	dma_buf_init_debugfs();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/dma/idma64.c b/drivers/dma/idma64.c<br/>index 78a938969d7d..1398814d8fbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idma64.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idma64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idma64.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idma64.c</a></div><div class='hunk'>@@ -171,6 +171,10 @@ static irqreturn_t idma64_irq(int irq, void *dev)</div><div class='ctx'> 	u32 status_err;</div><div class='ctx'> 	unsigned short i;</div><div class='ctx'> </div><div class='add'>+	/* Since IRQ may be shared, check if DMA controller is powered on */</div><div class='add'>+	if (status == GENMASK(31, 0))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='ctx'> 	dev_vdbg(idma64-&gt;dma.dev, "%s: status=%#x\n", __func__, status);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if we have any interrupt from the DMA controller */</div><div class='head'>diff --git a/drivers/dma/idxd/cdev.c b/drivers/dma/idxd/cdev.c<br/>index 8078ab9acfbc..39935071174a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/cdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/cdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/cdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/cdev.c</a></div><div class='hunk'>@@ -342,7 +342,7 @@ static void idxd_cdev_evl_drain_pasid(struct idxd_wq *wq, u32 pasid)</div><div class='ctx'> 	if (!evl)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_lock(&amp;evl-&gt;lock);</div><div class='ctx'> 	status.bits = ioread64(idxd-&gt;reg_base + IDXD_EVLSTATUS_OFFSET);</div><div class='ctx'> 	t = status.tail;</div><div class='ctx'> 	h = status.head;</div><div class='hunk'>@@ -354,9 +354,8 @@ static void idxd_cdev_evl_drain_pasid(struct idxd_wq *wq, u32 pasid)</div><div class='ctx'> 			set_bit(h, evl-&gt;bmap);</div><div class='ctx'> 		h = (h + 1) % size;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;evl-&gt;lock);</div><div class='del'>-</div><div class='ctx'> 	drain_workqueue(wq-&gt;wq);</div><div class='add'>+	mutex_unlock(&amp;evl-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int idxd_cdev_release(struct inode *node, struct file *filep)</div><div class='hunk'>@@ -401,6 +400,18 @@ static int idxd_cdev_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "%s called\n", __func__);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Due to an erratum in some of the devices supported by the driver,</div><div class='add'>+	 * direct user submission to the device can be unsafe.</div><div class='add'>+	 * (See the INTEL-SA-01084 security advisory)</div><div class='add'>+	 *</div><div class='add'>+	 * For the devices that exhibit this behavior, require that the user</div><div class='add'>+	 * has CAP_SYS_RAWIO capabilities.</div><div class='add'>+	 */</div><div class='add'>+	if (!idxd-&gt;user_submission_safe &amp;&amp; !capable(CAP_SYS_RAWIO))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	rc = check_vma(wq, vma, __func__);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		return rc;</div><div class='hunk'>@@ -415,6 +426,70 @@ static int idxd_cdev_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 			vma-&gt;vm_page_prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int idxd_submit_user_descriptor(struct idxd_user_context *ctx,</div><div class='add'>+				       struct dsa_hw_desc __user *udesc)</div><div class='add'>+{</div><div class='add'>+	struct idxd_wq *wq = ctx-&gt;wq;</div><div class='add'>+	struct idxd_dev *idxd_dev = &amp;wq-&gt;idxd-&gt;idxd_dev;</div><div class='add'>+	const uint64_t comp_addr_align = is_dsa_dev(idxd_dev) ? 0x20 : 0x40;</div><div class='add'>+	void __iomem *portal = idxd_wq_portal_addr(wq);</div><div class='add'>+	struct dsa_hw_desc descriptor __aligned(64);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = copy_from_user(&amp;descriptor, udesc, sizeof(descriptor));</div><div class='add'>+	if (rc)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DSA devices are capable of indirect ("batch") command submission.</div><div class='add'>+	 * On devices where direct user submissions are not safe, we cannot</div><div class='add'>+	 * allow this since there is no good way for us to verify these</div><div class='add'>+	 * indirect commands.</div><div class='add'>+	 */</div><div class='add'>+	if (is_dsa_dev(idxd_dev) &amp;&amp; descriptor.opcode == DSA_OPCODE_BATCH &amp;&amp;</div><div class='add'>+		!wq-&gt;idxd-&gt;user_submission_safe)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	/*</div><div class='add'>+	 * As per the programming specification, the completion address must be</div><div class='add'>+	 * aligned to 32 or 64 bytes. If this is violated the hardware</div><div class='add'>+	 * engine can get very confused (security issue).</div><div class='add'>+	 */</div><div class='add'>+	if (!IS_ALIGNED(descriptor.completion_addr, comp_addr_align))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (wq_dedicated(wq))</div><div class='add'>+		iosubmit_cmds512(portal, &amp;descriptor, 1);</div><div class='add'>+	else {</div><div class='add'>+		descriptor.priv = 0;</div><div class='add'>+		descriptor.pasid = ctx-&gt;pasid;</div><div class='add'>+		rc = idxd_enqcmds(wq, portal, &amp;descriptor);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t idxd_cdev_write(struct file *filp, const char __user *buf, size_t len,</div><div class='add'>+			       loff_t *unused)</div><div class='add'>+{</div><div class='add'>+	struct dsa_hw_desc __user *udesc = (struct dsa_hw_desc __user *)buf;</div><div class='add'>+	struct idxd_user_context *ctx = filp-&gt;private_data;</div><div class='add'>+	ssize_t written = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len/sizeof(struct dsa_hw_desc); i++) {</div><div class='add'>+		int rc = idxd_submit_user_descriptor(ctx, udesc + i);</div><div class='add'>+</div><div class='add'>+		if (rc)</div><div class='add'>+			return written ? written : rc;</div><div class='add'>+</div><div class='add'>+		written += sizeof(struct dsa_hw_desc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return written;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __poll_t idxd_cdev_poll(struct file *filp,</div><div class='ctx'> 			       struct poll_table_struct *wait)</div><div class='ctx'> {</div><div class='hunk'>@@ -437,6 +512,7 @@ static const struct file_operations idxd_cdev_fops = {</div><div class='ctx'> 	.open = idxd_cdev_open,</div><div class='ctx'> 	.release = idxd_cdev_release,</div><div class='ctx'> 	.mmap = idxd_cdev_mmap,</div><div class='add'>+	.write = idxd_cdev_write,</div><div class='ctx'> 	.poll = idxd_cdev_poll,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/idxd/debugfs.c b/drivers/dma/idxd/debugfs.c<br/>index f3f25ee676f3..ad4245cb301d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/debugfs.c</a></div><div class='hunk'>@@ -66,7 +66,7 @@ static int debugfs_evl_show(struct seq_file *s, void *d)</div><div class='ctx'> 	if (!evl || !evl-&gt;log)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_lock(&amp;evl-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	evl_status.bits = ioread64(idxd-&gt;reg_base + IDXD_EVLSTATUS_OFFSET);</div><div class='ctx'> 	t = evl_status.tail;</div><div class='hunk'>@@ -87,7 +87,7 @@ static int debugfs_evl_show(struct seq_file *s, void *d)</div><div class='ctx'> 		dump_event_entry(idxd, s, i, &amp;count, processed);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_unlock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;evl-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c<br/>index ecfdf4a8f1f8..c41ef195eeb9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/device.c</a></div><div class='hunk'>@@ -775,7 +775,7 @@ static int idxd_device_evl_setup(struct idxd_device *idxd)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_lock(&amp;evl-&gt;lock);</div><div class='ctx'> 	evl-&gt;log = addr;</div><div class='ctx'> 	evl-&gt;dma = dma_addr;</div><div class='ctx'> 	evl-&gt;log_size = size;</div><div class='hunk'>@@ -796,7 +796,7 @@ static int idxd_device_evl_setup(struct idxd_device *idxd)</div><div class='ctx'> 	gencfg.evl_en = 1;</div><div class='ctx'> 	iowrite32(gencfg.bits, idxd-&gt;reg_base + IDXD_GENCFG_OFFSET);</div><div class='ctx'> </div><div class='del'>-	spin_unlock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;evl-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_alloc:</div><div class='hunk'>@@ -819,7 +819,7 @@ static void idxd_device_evl_free(struct idxd_device *idxd)</div><div class='ctx'> 	if (!gencfg.evl_en)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_lock(&amp;evl-&gt;lock);</div><div class='ctx'> 	gencfg.evl_en = 0;</div><div class='ctx'> 	iowrite32(gencfg.bits, idxd-&gt;reg_base + IDXD_GENCFG_OFFSET);</div><div class='ctx'> </div><div class='hunk'>@@ -836,7 +836,7 @@ static void idxd_device_evl_free(struct idxd_device *idxd)</div><div class='ctx'> 	evl_dma = evl-&gt;dma;</div><div class='ctx'> 	evl-&gt;log = NULL;</div><div class='ctx'> 	evl-&gt;size = IDXD_EVL_SIZE_MIN;</div><div class='del'>-	spin_unlock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;evl-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	dma_free_coherent(dev, evl_log_size, evl_log, evl_dma);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h<br/>index a4099a1e2340..868b724a3b75 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/idxd.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/idxd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/idxd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/idxd.h</a></div><div class='hunk'>@@ -288,12 +288,13 @@ struct idxd_driver_data {</div><div class='ctx'> 	int evl_cr_off;</div><div class='ctx'> 	int cr_status_off;</div><div class='ctx'> 	int cr_result_off;</div><div class='add'>+	bool user_submission_safe;</div><div class='ctx'> 	load_device_defaults_fn_t load_device_defaults;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct idxd_evl {</div><div class='ctx'> 	/* Lock to protect event log access. */</div><div class='del'>-	spinlock_t lock;</div><div class='add'>+	struct mutex lock;</div><div class='ctx'> 	void *log;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	/* Total size of event log = number of entries * entry size. */</div><div class='hunk'>@@ -374,6 +375,8 @@ struct idxd_device {</div><div class='ctx'> </div><div class='ctx'> 	struct dentry *dbgfs_dir;</div><div class='ctx'> 	struct dentry *dbgfs_evl_file;</div><div class='add'>+</div><div class='add'>+	bool user_submission_safe;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int evl_ent_size(struct idxd_device *idxd)</div><div class='head'>diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c<br/>index 4954adc6bb60..a7295943fa22 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/init.c</a></div><div class='hunk'>@@ -47,6 +47,7 @@ static struct idxd_driver_data idxd_driver_data[] = {</div><div class='ctx'> 		.align = 32,</div><div class='ctx'> 		.dev_type = &amp;dsa_device_type,</div><div class='ctx'> 		.evl_cr_off = offsetof(struct dsa_evl_entry, cr),</div><div class='add'>+		.user_submission_safe = false, /* See INTEL-SA-01084 security advisory */</div><div class='ctx'> 		.cr_status_off = offsetof(struct dsa_completion_record, status),</div><div class='ctx'> 		.cr_result_off = offsetof(struct dsa_completion_record, result),</div><div class='ctx'> 	},</div><div class='hunk'>@@ -57,6 +58,7 @@ static struct idxd_driver_data idxd_driver_data[] = {</div><div class='ctx'> 		.align = 64,</div><div class='ctx'> 		.dev_type = &amp;iax_device_type,</div><div class='ctx'> 		.evl_cr_off = offsetof(struct iax_evl_entry, cr),</div><div class='add'>+		.user_submission_safe = false, /* See INTEL-SA-01084 security advisory */</div><div class='ctx'> 		.cr_status_off = offsetof(struct iax_completion_record, status),</div><div class='ctx'> 		.cr_result_off = offsetof(struct iax_completion_record, error_code),</div><div class='ctx'> 		.load_device_defaults = idxd_load_iaa_device_defaults,</div><div class='hunk'>@@ -354,7 +356,7 @@ static int idxd_init_evl(struct idxd_device *idxd)</div><div class='ctx'> 	if (!evl)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_init(&amp;evl-&gt;lock);</div><div class='ctx'> 	evl-&gt;size = IDXD_EVL_SIZE_MIN;</div><div class='ctx'> </div><div class='ctx'> 	idxd_name = dev_name(idxd_confdev(idxd));</div><div class='hunk'>@@ -774,6 +776,8 @@ static int idxd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "Intel(R) Accelerator Device (v%x)\n",</div><div class='ctx'> 		 idxd-&gt;hw.version);</div><div class='ctx'> </div><div class='add'>+	idxd-&gt;user_submission_safe = data-&gt;user_submission_safe;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  err_dev_register:</div><div class='head'>diff --git a/drivers/dma/idxd/irq.c b/drivers/dma/idxd/irq.c<br/>index 348aa21389a9..8dc029c86551 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/irq.c</a></div><div class='hunk'>@@ -363,7 +363,7 @@ static void process_evl_entries(struct idxd_device *idxd)</div><div class='ctx'> 	evl_status.bits = 0;</div><div class='ctx'> 	evl_status.int_pending = 1;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_lock(&amp;evl-&gt;lock);</div><div class='ctx'> 	/* Clear interrupt pending bit */</div><div class='ctx'> 	iowrite32(evl_status.bits_upper32,</div><div class='ctx'> 		  idxd-&gt;reg_base + IDXD_EVLSTATUS_OFFSET + sizeof(u32));</div><div class='hunk'>@@ -380,7 +380,7 @@ static void process_evl_entries(struct idxd_device *idxd)</div><div class='ctx'> </div><div class='ctx'> 	evl_status.head = h;</div><div class='ctx'> 	iowrite32(evl_status.bits_lower32, idxd-&gt;reg_base + IDXD_EVLSTATUS_OFFSET);</div><div class='del'>-	spin_unlock(&amp;evl-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;evl-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> irqreturn_t idxd_misc_thread(int vec, void *data)</div><div class='head'>diff --git a/drivers/dma/idxd/perfmon.c b/drivers/dma/idxd/perfmon.c<br/>index fdda6d604262..5e94247e1ea7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/perfmon.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/perfmon.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/perfmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/perfmon.c</a></div><div class='hunk'>@@ -528,14 +528,11 @@ static int perf_event_cpu_offline(unsigned int cpu, struct hlist_node *node)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	target = cpumask_any_but(cpu_online_mask, cpu);</div><div class='del'>-</div><div class='ctx'> 	/* migrate events if there is a valid target */</div><div class='del'>-	if (target &lt; nr_cpu_ids)</div><div class='add'>+	if (target &lt; nr_cpu_ids) {</div><div class='ctx'> 		cpumask_set_cpu(target, &amp;perfmon_dsa_cpu_mask);</div><div class='del'>-	else</div><div class='del'>-		target = -1;</div><div class='del'>-</div><div class='del'>-	perf_pmu_migrate_context(&amp;idxd_pmu-&gt;pmu, cpu, target);</div><div class='add'>+		perf_pmu_migrate_context(&amp;idxd_pmu-&gt;pmu, cpu, target);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/dma/idxd/registers.h b/drivers/dma/idxd/registers.h<br/>index 315c004f58e4..e16dbf9ab324 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/registers.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/registers.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/registers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/registers.h</a></div><div class='hunk'>@@ -6,9 +6,6 @@</div><div class='ctx'> #include &lt;uapi/linux/idxd.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* PCI Config */</div><div class='del'>-#define PCI_DEVICE_ID_INTEL_DSA_SPR0	0x0b25</div><div class='del'>-#define PCI_DEVICE_ID_INTEL_IAX_SPR0	0x0cfe</div><div class='del'>-</div><div class='ctx'> #define DEVICE_VERSION_1		0x100</div><div class='ctx'> #define DEVICE_VERSION_2		0x200</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/idxd/sysfs.c b/drivers/dma/idxd/sysfs.c<br/>index 7f28f01be672..f706eae0e76b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/idxd/sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/idxd/sysfs.c</a></div><div class='hunk'>@@ -1197,12 +1197,35 @@ static ssize_t wq_enqcmds_retries_store(struct device *dev, struct device_attrib</div><div class='ctx'> static struct device_attribute dev_attr_wq_enqcmds_retries =</div><div class='ctx'> 		__ATTR(enqcmds_retries, 0644, wq_enqcmds_retries_show, wq_enqcmds_retries_store);</div><div class='ctx'> </div><div class='add'>+static ssize_t op_cap_show_common(struct device *dev, char *buf, unsigned long *opcap_bmap)</div><div class='add'>+{</div><div class='add'>+	ssize_t pos;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pos = 0;</div><div class='add'>+	for (i = IDXD_MAX_OPCAP_BITS/64 - 1; i &gt;= 0; i--) {</div><div class='add'>+		unsigned long val = opcap_bmap[i];</div><div class='add'>+</div><div class='add'>+		/* On systems where direct user submissions are not safe, we need to clear out</div><div class='add'>+		 * the BATCH capability from the capability mask in sysfs since we cannot support</div><div class='add'>+		 * that command on such systems.</div><div class='add'>+		 */</div><div class='add'>+		if (i == DSA_OPCODE_BATCH/64 &amp;&amp; !confdev_to_idxd(dev)-&gt;user_submission_safe)</div><div class='add'>+			clear_bit(DSA_OPCODE_BATCH % 64, &amp;val);</div><div class='add'>+</div><div class='add'>+		pos += sysfs_emit_at(buf, pos, "%*pb", 64, &amp;val);</div><div class='add'>+		pos += sysfs_emit_at(buf, pos, "%c", i == 0 ? '\n' : ',');</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pos;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t wq_op_config_show(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct idxd_wq *wq = confdev_to_wq(dev);</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%*pb\n", IDXD_MAX_OPCAP_BITS, wq-&gt;opcap_bmap);</div><div class='add'>+	return op_cap_show_common(dev, buf, wq-&gt;opcap_bmap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int idxd_verify_supported_opcap(struct idxd_device *idxd, unsigned long *opmask)</div><div class='hunk'>@@ -1455,7 +1478,7 @@ static ssize_t op_cap_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct idxd_device *idxd = confdev_to_idxd(dev);</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%*pb\n", IDXD_MAX_OPCAP_BITS, idxd-&gt;opcap_bmap);</div><div class='add'>+	return op_cap_show_common(dev, buf, idxd-&gt;opcap_bmap);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(op_cap);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c<br/>index 4e76c4ec2d39..e001f4f7aa64 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/owl-dma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/owl-dma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/owl-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/owl-dma.c</a></div><div class='hunk'>@@ -250,7 +250,7 @@ static void pchan_update(struct owl_dma_pchan *pchan, u32 reg,</div><div class='ctx'> 	else</div><div class='ctx'> 		regval &amp;= ~val;</div><div class='ctx'> </div><div class='del'>-	writel(val, pchan-&gt;base + reg);</div><div class='add'>+	writel(regval, pchan-&gt;base + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pchan_writel(struct owl_dma_pchan *pchan, u32 reg, u32 data)</div><div class='hunk'>@@ -274,7 +274,7 @@ static void dma_update(struct owl_dma *od, u32 reg, u32 val, bool state)</div><div class='ctx'> 	else</div><div class='ctx'> 		regval &amp;= ~val;</div><div class='ctx'> </div><div class='del'>-	writel(val, od-&gt;base + reg);</div><div class='add'>+	writel(regval, od-&gt;base + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dma_writel(struct owl_dma *od, u32 reg, u32 data)</div><div class='head'>diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c<br/>index 5f6d7f1e095f..ad8e3da1b2cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/pl330.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/pl330.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/pl330.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/pl330.c</a></div><div class='hunk'>@@ -1053,9 +1053,6 @@ static bool _trigger(struct pl330_thread *thrd)</div><div class='ctx'> </div><div class='ctx'> 	thrd-&gt;req_running = idx;</div><div class='ctx'> </div><div class='del'>-	if (desc-&gt;rqtype == DMA_MEM_TO_DEV || desc-&gt;rqtype == DMA_DEV_TO_MEM)</div><div class='del'>-		UNTIL(thrd, PL330_STATE_WFP);</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c<br/>index 88547a23825b..3642508e88bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/tegra186-gpc-dma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/tegra186-gpc-dma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/tegra186-gpc-dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/tegra186-gpc-dma.c</a></div><div class='hunk'>@@ -746,6 +746,9 @@ static int tegra_dma_get_residual(struct tegra_dma_channel *tdc)</div><div class='ctx'> 	bytes_xfer = dma_desc-&gt;bytes_xfer +</div><div class='ctx'> 		     sg_req[dma_desc-&gt;sg_idx].len - (wcount * 4);</div><div class='ctx'> </div><div class='add'>+	if (dma_desc-&gt;bytes_req == bytes_xfer)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	residual = dma_desc-&gt;bytes_req - (bytes_xfer % dma_desc-&gt;bytes_req);</div><div class='ctx'> </div><div class='ctx'> 	return residual;</div><div class='head'>diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h<br/>index 98f5f6fb9ff9..6ad08878e938 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/xilinx/xdma-regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/xilinx/xdma-regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/xilinx/xdma-regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/xilinx/xdma-regs.h</a></div><div class='hunk'>@@ -117,6 +117,9 @@ struct xdma_hw_desc {</div><div class='ctx'> 			 CHAN_CTRL_IE_WRITE_ERROR |			\</div><div class='ctx'> 			 CHAN_CTRL_IE_DESC_ERROR)</div><div class='ctx'> </div><div class='add'>+/* bits of the channel status register */</div><div class='add'>+#define XDMA_CHAN_STATUS_BUSY			BIT(0)</div><div class='add'>+</div><div class='ctx'> #define XDMA_CHAN_STATUS_MASK CHAN_CTRL_START</div><div class='ctx'> </div><div class='ctx'> #define XDMA_CHAN_ERROR_MASK (CHAN_CTRL_IE_DESC_ALIGN_MISMATCH |	\</div><div class='head'>diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c<br/>index 170017ff2aad..313b217388fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/xilinx/xdma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/xilinx/xdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/xilinx/xdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/xilinx/xdma.c</a></div><div class='hunk'>@@ -71,6 +71,8 @@ struct xdma_chan {</div><div class='ctx'> 	enum dma_transfer_direction	dir;</div><div class='ctx'> 	struct dma_slave_config		cfg;</div><div class='ctx'> 	u32				irq;</div><div class='add'>+	struct completion		last_interrupt;</div><div class='add'>+	bool				stop_requested;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -376,6 +378,8 @@ static int xdma_xfer_start(struct xdma_chan *xchan)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	xchan-&gt;busy = true;</div><div class='add'>+	xchan-&gt;stop_requested = false;</div><div class='add'>+	reinit_completion(&amp;xchan-&gt;last_interrupt);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -387,7 +391,6 @@ static int xdma_xfer_start(struct xdma_chan *xchan)</div><div class='ctx'> static int xdma_xfer_stop(struct xdma_chan *xchan)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	u32 val;</div><div class='ctx'> 	struct xdma_device *xdev = xchan-&gt;xdev_hdl;</div><div class='ctx'> </div><div class='ctx'> 	/* clear run stop bit to prevent any further auto-triggering */</div><div class='hunk'>@@ -395,13 +398,7 @@ static int xdma_xfer_stop(struct xdma_chan *xchan)</div><div class='ctx'> 			   CHAN_CTRL_RUN_STOP);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-</div><div class='del'>-	/* Clear the channel status register */</div><div class='del'>-	ret = regmap_read(xdev-&gt;rmap, xchan-&gt;base + XDMA_CHAN_STATUS_RC, &amp;val);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -474,6 +471,8 @@ static int xdma_alloc_channels(struct xdma_device *xdev,</div><div class='ctx'> 		xchan-&gt;xdev_hdl = xdev;</div><div class='ctx'> 		xchan-&gt;base = base + i * XDMA_CHAN_STRIDE;</div><div class='ctx'> 		xchan-&gt;dir = dir;</div><div class='add'>+		xchan-&gt;stop_requested = false;</div><div class='add'>+		init_completion(&amp;xchan-&gt;last_interrupt);</div><div class='ctx'> </div><div class='ctx'> 		ret = xdma_channel_init(xchan);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -521,6 +520,7 @@ static int xdma_terminate_all(struct dma_chan *chan)</div><div class='ctx'> 	spin_lock_irqsave(&amp;xdma_chan-&gt;vchan.lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	xdma_chan-&gt;busy = false;</div><div class='add'>+	xdma_chan-&gt;stop_requested = true;</div><div class='ctx'> 	vd = vchan_next_desc(&amp;xdma_chan-&gt;vchan);</div><div class='ctx'> 	if (vd) {</div><div class='ctx'> 		list_del(&amp;vd-&gt;node);</div><div class='hunk'>@@ -542,17 +542,26 @@ static int xdma_terminate_all(struct dma_chan *chan)</div><div class='ctx'> static void xdma_synchronize(struct dma_chan *chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct xdma_chan *xdma_chan = to_xdma_chan(chan);</div><div class='add'>+	struct xdma_device *xdev = xdma_chan-&gt;xdev_hdl;</div><div class='add'>+	int st = 0;</div><div class='add'>+</div><div class='add'>+	/* If the engine continues running, wait for the last interrupt */</div><div class='add'>+	regmap_read(xdev-&gt;rmap, xdma_chan-&gt;base + XDMA_CHAN_STATUS, &amp;st);</div><div class='add'>+	if (st &amp; XDMA_CHAN_STATUS_BUSY)</div><div class='add'>+		wait_for_completion_timeout(&amp;xdma_chan-&gt;last_interrupt, msecs_to_jiffies(1000));</div><div class='ctx'> </div><div class='ctx'> 	vchan_synchronize(&amp;xdma_chan-&gt;vchan);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * xdma_fill_descs - Fill hardware descriptors with contiguous memory block addresses</div><div class='del'>- * @sw_desc: tx descriptor state container</div><div class='del'>- * @src_addr: Value for a -&gt;src_addr field of a first descriptor</div><div class='del'>- * @dst_addr: Value for a -&gt;dst_addr field of a first descriptor</div><div class='del'>- * @size: Total size of a contiguous memory block</div><div class='del'>- * @filled_descs_num: Number of filled hardware descriptors for corresponding sw_desc</div><div class='add'>+ * xdma_fill_descs() - Fill hardware descriptors for one contiguous memory chunk.</div><div class='add'>+ *		       More than one descriptor will be used if the size is bigger</div><div class='add'>+ *		       than XDMA_DESC_BLEN_MAX.</div><div class='add'>+ * @sw_desc: Descriptor container</div><div class='add'>+ * @src_addr: First value for the -&gt;src_addr field</div><div class='add'>+ * @dst_addr: First value for the -&gt;dst_addr field</div><div class='add'>+ * @size: Size of the contiguous memory block</div><div class='add'>+ * @filled_descs_num: Index of the first descriptor to take care of in @sw_desc</div><div class='ctx'>  */</div><div class='ctx'> static inline u32 xdma_fill_descs(struct xdma_desc *sw_desc, u64 src_addr,</div><div class='ctx'> 				  u64 dst_addr, u32 size, u32 filled_descs_num)</div><div class='hunk'>@@ -704,7 +713,7 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t address,</div><div class='ctx'> 	desc_num = 0;</div><div class='ctx'> 	for (i = 0; i &lt; periods; i++) {</div><div class='ctx'> 		desc_num += xdma_fill_descs(sw_desc, *src, *dst, period_size, desc_num);</div><div class='del'>-		addr += i * period_size;</div><div class='add'>+		addr += period_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tx_desc = vchan_tx_prep(&amp;xdma_chan-&gt;vchan, &amp;sw_desc-&gt;vdesc, flags);</div><div class='hunk'>@@ -876,6 +885,9 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)</div><div class='ctx'> 	u32 st;</div><div class='ctx'> 	bool repeat_tx;</div><div class='ctx'> </div><div class='add'>+	if (xchan-&gt;stop_requested)</div><div class='add'>+		complete(&amp;xchan-&gt;last_interrupt);</div><div class='add'>+</div><div class='ctx'> 	spin_lock(&amp;xchan-&gt;vchan.lock);</div><div class='ctx'> </div><div class='ctx'> 	/* get submitted request */</div><div class='head'>diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c<br/>index b82815e64d24..eb0637d90342 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/xilinx/xilinx_dpdma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dma/xilinx/xilinx_dpdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/xilinx/xilinx_dpdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dma/xilinx/xilinx_dpdma.c</a></div><div class='hunk'>@@ -214,7 +214,8 @@ struct xilinx_dpdma_tx_desc {</div><div class='ctx'>  * @running: true if the channel is running</div><div class='ctx'>  * @first_frame: flag for the first frame of stream</div><div class='ctx'>  * @video_group: flag if multi-channel operation is needed for video channels</div><div class='del'>- * @lock: lock to access struct xilinx_dpdma_chan</div><div class='add'>+ * @lock: lock to access struct xilinx_dpdma_chan. Must be taken before</div><div class='add'>+ *        @vchan.lock, if both are to be held.</div><div class='ctx'>  * @desc_pool: descriptor allocation pool</div><div class='ctx'>  * @err_task: error IRQ bottom half handler</div><div class='ctx'>  * @desc: References to descriptors being processed</div><div class='hunk'>@@ -1097,12 +1098,14 @@ static void xilinx_dpdma_chan_vsync_irq(struct  xilinx_dpdma_chan *chan)</div><div class='ctx'> 	 * Complete the active descriptor, if any, promote the pending</div><div class='ctx'> 	 * descriptor to active, and queue the next transfer, if any.</div><div class='ctx'> 	 */</div><div class='add'>+	spin_lock(&amp;chan-&gt;vchan.lock);</div><div class='ctx'> 	if (chan-&gt;desc.active)</div><div class='ctx'> 		vchan_cookie_complete(&amp;chan-&gt;desc.active-&gt;vdesc);</div><div class='ctx'> 	chan-&gt;desc.active = pending;</div><div class='ctx'> 	chan-&gt;desc.pending = NULL;</div><div class='ctx'> </div><div class='ctx'> 	xilinx_dpdma_chan_queue_transfer(chan);</div><div class='add'>+	spin_unlock(&amp;chan-&gt;vchan.lock);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chan-&gt;lock, flags);</div><div class='hunk'>@@ -1264,10 +1267,12 @@ static void xilinx_dpdma_issue_pending(struct dma_chan *dchan)</div><div class='ctx'> 	struct xilinx_dpdma_chan *chan = to_xilinx_chan(dchan);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;chan-&gt;vchan.lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;chan-&gt;lock, flags);</div><div class='add'>+	spin_lock(&amp;chan-&gt;vchan.lock);</div><div class='ctx'> 	if (vchan_issue_pending(&amp;chan-&gt;vchan))</div><div class='ctx'> 		xilinx_dpdma_chan_queue_transfer(chan);</div><div class='del'>-	spin_unlock_irqrestore(&amp;chan-&gt;vchan.lock, flags);</div><div class='add'>+	spin_unlock(&amp;chan-&gt;vchan.lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;chan-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xilinx_dpdma_config(struct dma_chan *dchan,</div><div class='hunk'>@@ -1495,7 +1500,9 @@ static void xilinx_dpdma_chan_err_task(struct tasklet_struct *t)</div><div class='ctx'> 		    XILINX_DPDMA_EINTR_CHAN_ERR_MASK &lt;&lt; chan-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;chan-&gt;lock, flags);</div><div class='add'>+	spin_lock(&amp;chan-&gt;vchan.lock);</div><div class='ctx'> 	xilinx_dpdma_chan_queue_transfer(chan);</div><div class='add'>+	spin_unlock(&amp;chan-&gt;vchan.lock);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chan-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c<br/>index 64eaca80d736..32019dc33cca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dpll/dpll_core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/dpll/dpll_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dpll/dpll_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/dpll/dpll_core.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@ struct dpll_pin_registration {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	const struct dpll_pin_ops *ops;</div><div class='ctx'> 	void *priv;</div><div class='add'>+	void *cookie;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dpll_device *dpll_device_get_by_id(int id)</div><div class='hunk'>@@ -54,12 +55,14 @@ struct dpll_device *dpll_device_get_by_id(int id)</div><div class='ctx'> </div><div class='ctx'> static struct dpll_pin_registration *</div><div class='ctx'> dpll_pin_registration_find(struct dpll_pin_ref *ref,</div><div class='del'>-			   const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+			   const struct dpll_pin_ops *ops, void *priv,</div><div class='add'>+			   void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpll_pin_registration *reg;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(reg, &amp;ref-&gt;registration_list, list) {</div><div class='del'>-		if (reg-&gt;ops == ops &amp;&amp; reg-&gt;priv == priv)</div><div class='add'>+		if (reg-&gt;ops == ops &amp;&amp; reg-&gt;priv == priv &amp;&amp;</div><div class='add'>+		    reg-&gt;cookie == cookie)</div><div class='ctx'> 			return reg;</div><div class='ctx'> 	}</div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -67,7 +70,8 @@ dpll_pin_registration_find(struct dpll_pin_ref *ref,</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='del'>-		    const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+		    const struct dpll_pin_ops *ops, void *priv,</div><div class='add'>+		    void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpll_pin_registration *reg;</div><div class='ctx'> 	struct dpll_pin_ref *ref;</div><div class='hunk'>@@ -78,7 +82,7 @@ dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='ctx'> 	xa_for_each(xa_pins, i, ref) {</div><div class='ctx'> 		if (ref-&gt;pin != pin)</div><div class='ctx'> 			continue;</div><div class='del'>-		reg = dpll_pin_registration_find(ref, ops, priv);</div><div class='add'>+		reg = dpll_pin_registration_find(ref, ops, priv, cookie);</div><div class='ctx'> 		if (reg) {</div><div class='ctx'> 			refcount_inc(&amp;ref-&gt;refcount);</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -111,6 +115,7 @@ dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='ctx'> 	}</div><div class='ctx'> 	reg-&gt;ops = ops;</div><div class='ctx'> 	reg-&gt;priv = priv;</div><div class='add'>+	reg-&gt;cookie = cookie;</div><div class='ctx'> 	if (ref_exists)</div><div class='ctx'> 		refcount_inc(&amp;ref-&gt;refcount);</div><div class='ctx'> 	list_add_tail(&amp;reg-&gt;list, &amp;ref-&gt;registration_list);</div><div class='hunk'>@@ -119,7 +124,8 @@ dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='del'>-			       const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+			       const struct dpll_pin_ops *ops, void *priv,</div><div class='add'>+			       void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpll_pin_registration *reg;</div><div class='ctx'> 	struct dpll_pin_ref *ref;</div><div class='hunk'>@@ -128,7 +134,7 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='ctx'> 	xa_for_each(xa_pins, i, ref) {</div><div class='ctx'> 		if (ref-&gt;pin != pin)</div><div class='ctx'> 			continue;</div><div class='del'>-		reg = dpll_pin_registration_find(ref, ops, priv);</div><div class='add'>+		reg = dpll_pin_registration_find(ref, ops, priv, cookie);</div><div class='ctx'> 		if (WARN_ON(!reg))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		list_del(&amp;reg-&gt;list);</div><div class='hunk'>@@ -146,7 +152,7 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,</div><div class='del'>-		     const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+		     const struct dpll_pin_ops *ops, void *priv, void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpll_pin_registration *reg;</div><div class='ctx'> 	struct dpll_pin_ref *ref;</div><div class='hunk'>@@ -157,7 +163,7 @@ dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,</div><div class='ctx'> 	xa_for_each(xa_dplls, i, ref) {</div><div class='ctx'> 		if (ref-&gt;dpll != dpll)</div><div class='ctx'> 			continue;</div><div class='del'>-		reg = dpll_pin_registration_find(ref, ops, priv);</div><div class='add'>+		reg = dpll_pin_registration_find(ref, ops, priv, cookie);</div><div class='ctx'> 		if (reg) {</div><div class='ctx'> 			refcount_inc(&amp;ref-&gt;refcount);</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -190,6 +196,7 @@ dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,</div><div class='ctx'> 	}</div><div class='ctx'> 	reg-&gt;ops = ops;</div><div class='ctx'> 	reg-&gt;priv = priv;</div><div class='add'>+	reg-&gt;cookie = cookie;</div><div class='ctx'> 	if (ref_exists)</div><div class='ctx'> 		refcount_inc(&amp;ref-&gt;refcount);</div><div class='ctx'> 	list_add_tail(&amp;reg-&gt;list, &amp;ref-&gt;registration_list);</div><div class='hunk'>@@ -199,7 +206,7 @@ dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll,</div><div class='del'>-		     const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+		     const struct dpll_pin_ops *ops, void *priv, void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpll_pin_registration *reg;</div><div class='ctx'> 	struct dpll_pin_ref *ref;</div><div class='hunk'>@@ -208,7 +215,7 @@ dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll,</div><div class='ctx'> 	xa_for_each(xa_dplls, i, ref) {</div><div class='ctx'> 		if (ref-&gt;dpll != dpll)</div><div class='ctx'> 			continue;</div><div class='del'>-		reg = dpll_pin_registration_find(ref, ops, priv);</div><div class='add'>+		reg = dpll_pin_registration_find(ref, ops, priv, cookie);</div><div class='ctx'> 		if (WARN_ON(!reg))</div><div class='ctx'> 			return;</div><div class='ctx'> 		list_del(&amp;reg-&gt;list);</div><div class='hunk'>@@ -442,7 +449,7 @@ static int dpll_pin_prop_dup(const struct dpll_pin_properties *src,</div><div class='ctx'> 				   sizeof(*src-&gt;freq_supported);</div><div class='ctx'> 		dst-&gt;freq_supported = kmemdup(src-&gt;freq_supported,</div><div class='ctx'> 					      freq_size, GFP_KERNEL);</div><div class='del'>-		if (!src-&gt;freq_supported)</div><div class='add'>+		if (!dst-&gt;freq_supported)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (src-&gt;board_label) {</div><div class='hunk'>@@ -594,14 +601,14 @@ EXPORT_SYMBOL_GPL(dpll_pin_put);</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,</div><div class='del'>-		    const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+		    const struct dpll_pin_ops *ops, void *priv, void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = dpll_xa_ref_pin_add(&amp;dpll-&gt;pin_refs, pin, ops, priv);</div><div class='add'>+	ret = dpll_xa_ref_pin_add(&amp;dpll-&gt;pin_refs, pin, ops, priv, cookie);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	ret = dpll_xa_ref_dpll_add(&amp;pin-&gt;dpll_refs, dpll, ops, priv);</div><div class='add'>+	ret = dpll_xa_ref_dpll_add(&amp;pin-&gt;dpll_refs, dpll, ops, priv, cookie);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto ref_pin_del;</div><div class='ctx'> 	xa_set_mark(&amp;dpll_pin_xa, pin-&gt;id, DPLL_REGISTERED);</div><div class='hunk'>@@ -610,7 +617,7 @@ __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> ref_pin_del:</div><div class='del'>-	dpll_xa_ref_pin_del(&amp;dpll-&gt;pin_refs, pin, ops, priv);</div><div class='add'>+	dpll_xa_ref_pin_del(&amp;dpll-&gt;pin_refs, pin, ops, priv, cookie);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -642,7 +649,7 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,</div><div class='ctx'> 		      dpll-&gt;clock_id == pin-&gt;clock_id)))</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 	else</div><div class='del'>-		ret = __dpll_pin_register(dpll, pin, ops, priv);</div><div class='add'>+		ret = __dpll_pin_register(dpll, pin, ops, priv, NULL);</div><div class='ctx'> 	mutex_unlock(&amp;dpll_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -651,11 +658,11 @@ EXPORT_SYMBOL_GPL(dpll_pin_register);</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> __dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,</div><div class='del'>-		      const struct dpll_pin_ops *ops, void *priv)</div><div class='add'>+		      const struct dpll_pin_ops *ops, void *priv, void *cookie)</div><div class='ctx'> {</div><div class='ctx'> 	ASSERT_DPLL_PIN_REGISTERED(pin);</div><div class='del'>-	dpll_xa_ref_pin_del(&amp;dpll-&gt;pin_refs, pin, ops, priv);</div><div class='del'>-	dpll_xa_ref_dpll_del(&amp;pin-&gt;dpll_refs, dpll, ops, priv);</div><div class='add'>+	dpll_xa_ref_pin_del(&amp;dpll-&gt;pin_refs, pin, ops, priv, cookie);</div><div class='add'>+	dpll_xa_ref_dpll_del(&amp;pin-&gt;dpll_refs, dpll, ops, priv, cookie);</div><div class='ctx'> 	if (xa_empty(&amp;pin-&gt;dpll_refs))</div><div class='ctx'> 		xa_clear_mark(&amp;dpll_pin_xa, pin-&gt;id, DPLL_REGISTERED);</div><div class='ctx'> }</div><div class='hunk'>@@ -680,7 +687,7 @@ void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dpll_lock);</div><div class='ctx'> 	dpll_pin_delete_ntf(pin);</div><div class='del'>-	__dpll_pin_unregister(dpll, pin, ops, priv);</div><div class='add'>+	__dpll_pin_unregister(dpll, pin, ops, priv, NULL);</div><div class='ctx'> 	mutex_unlock(&amp;dpll_lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(dpll_pin_unregister);</div><div class='hunk'>@@ -716,12 +723,12 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dpll_lock);</div><div class='del'>-	ret = dpll_xa_ref_pin_add(&amp;pin-&gt;parent_refs, parent, ops, priv);</div><div class='add'>+	ret = dpll_xa_ref_pin_add(&amp;pin-&gt;parent_refs, parent, ops, priv, pin);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	refcount_inc(&amp;pin-&gt;refcount);</div><div class='ctx'> 	xa_for_each(&amp;parent-&gt;dpll_refs, i, ref) {</div><div class='del'>-		ret = __dpll_pin_register(ref-&gt;dpll, pin, ops, priv);</div><div class='add'>+		ret = __dpll_pin_register(ref-&gt;dpll, pin, ops, priv, parent);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			stop = i;</div><div class='ctx'> 			goto dpll_unregister;</div><div class='hunk'>@@ -735,11 +742,12 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,</div><div class='ctx'> dpll_unregister:</div><div class='ctx'> 	xa_for_each(&amp;parent-&gt;dpll_refs, i, ref)</div><div class='ctx'> 		if (i &lt; stop) {</div><div class='del'>-			__dpll_pin_unregister(ref-&gt;dpll, pin, ops, priv);</div><div class='add'>+			__dpll_pin_unregister(ref-&gt;dpll, pin, ops, priv,</div><div class='add'>+					      parent);</div><div class='ctx'> 			dpll_pin_delete_ntf(pin);</div><div class='ctx'> 		}</div><div class='ctx'> 	refcount_dec(&amp;pin-&gt;refcount);</div><div class='del'>-	dpll_xa_ref_pin_del(&amp;pin-&gt;parent_refs, parent, ops, priv);</div><div class='add'>+	dpll_xa_ref_pin_del(&amp;pin-&gt;parent_refs, parent, ops, priv, pin);</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;dpll_lock);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -764,10 +772,10 @@ void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dpll_lock);</div><div class='ctx'> 	dpll_pin_delete_ntf(pin);</div><div class='del'>-	dpll_xa_ref_pin_del(&amp;pin-&gt;parent_refs, parent, ops, priv);</div><div class='add'>+	dpll_xa_ref_pin_del(&amp;pin-&gt;parent_refs, parent, ops, priv, pin);</div><div class='ctx'> 	refcount_dec(&amp;pin-&gt;refcount);</div><div class='ctx'> 	xa_for_each(&amp;pin-&gt;dpll_refs, i, ref)</div><div class='del'>-		__dpll_pin_unregister(ref-&gt;dpll, pin, ops, priv);</div><div class='add'>+		__dpll_pin_unregister(ref-&gt;dpll, pin, ops, priv, parent);</div><div class='ctx'> 	mutex_unlock(&amp;dpll_lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(dpll_pin_on_pin_unregister);</div><div class='head'>diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c<br/>index ae17ce4d9722..fe89f5c4837f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/altera_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/altera_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/altera_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/altera_edac.c</a></div><div class='hunk'>@@ -737,8 +737,7 @@ static int altr_edac_device_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dci = edac_device_alloc_ctl_info(sizeof(*drvdata), ecc_name,</div><div class='del'>-					 1, ecc_name, 1, 0, NULL, 0,</div><div class='del'>-					 dev_instance++);</div><div class='add'>+					 1, ecc_name, 1, 0, dev_instance++);</div><div class='ctx'> </div><div class='ctx'> 	if (!dci) {</div><div class='ctx'> 		edac_printk(KERN_ERR, EDAC_DEVICE,</div><div class='hunk'>@@ -1514,7 +1513,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)</div><div class='ctx'> 	/* Create the PortB EDAC device */</div><div class='ctx'> 	edac_idx = edac_device_alloc_index();</div><div class='ctx'> 	dci = edac_device_alloc_ctl_info(sizeof(*altdev), ecc_name, 1,</div><div class='del'>-					 ecc_name, 1, 0, NULL, 0, edac_idx);</div><div class='add'>+					 ecc_name, 1, 0, edac_idx);</div><div class='ctx'> 	if (!dci) {</div><div class='ctx'> 		edac_printk(KERN_ERR, EDAC_DEVICE,</div><div class='ctx'> 			    "%s: Unable to allocate PortB EDAC device\n",</div><div class='hunk'>@@ -1921,8 +1920,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,</div><div class='ctx'> </div><div class='ctx'> 	edac_idx = edac_device_alloc_index();</div><div class='ctx'> 	dci = edac_device_alloc_ctl_info(sizeof(*altdev), ecc_name,</div><div class='del'>-					 1, ecc_name, 1, 0, NULL, 0,</div><div class='del'>-					 edac_idx);</div><div class='add'>+					 1, ecc_name, 1, 0, edac_idx);</div><div class='ctx'> </div><div class='ctx'> 	if (!dci) {</div><div class='ctx'> 		edac_printk(KERN_ERR, EDAC_DEVICE,</div><div class='head'>diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h<br/>index 1665f7932bac..b879b12971e7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/amd64_edac.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/amd64_edac.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/amd64_edac.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/amd64_edac.h</a></div><div class='hunk'>@@ -345,7 +345,6 @@ struct amd64_pvt {</div><div class='ctx'> 	u32 dchr1;		/* DRAM Configuration High DCT1 reg */</div><div class='ctx'> 	u32 nbcap;		/* North Bridge Capabilities */</div><div class='ctx'> 	u32 nbcfg;		/* F10 North Bridge Configuration */</div><div class='del'>-	u32 ext_nbcfg;		/* Extended F10 North Bridge Configuration */</div><div class='ctx'> 	u32 dhar;		/* DRAM Hoist reg */</div><div class='ctx'> 	u32 dbam0;		/* DRAM Base Address Mapping reg for DCT0 */</div><div class='ctx'> 	u32 dbam1;		/* DRAM Base Address Mapping reg for DCT1 */</div><div class='head'>diff --git a/drivers/edac/amd8111_edac.c b/drivers/edac/amd8111_edac.c<br/>index ca718f63fcbc..a6d3013d5823 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/amd8111_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/amd8111_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/amd8111_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/amd8111_edac.c</a></div><div class='hunk'>@@ -366,8 +366,7 @@ static int amd8111_dev_probe(struct pci_dev *dev,</div><div class='ctx'> 	dev_info-&gt;edac_idx = edac_device_alloc_index();</div><div class='ctx'> 	dev_info-&gt;edac_dev =</div><div class='ctx'> 		edac_device_alloc_ctl_info(0, dev_info-&gt;ctl_name, 1,</div><div class='del'>-					   NULL, 0, 0,</div><div class='del'>-					   NULL, 0, dev_info-&gt;edac_idx);</div><div class='add'>+					   NULL, 0, 0, dev_info-&gt;edac_idx);</div><div class='ctx'> 	if (!dev_info-&gt;edac_dev) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto err_dev_put;</div><div class='head'>diff --git a/drivers/edac/armada_xp_edac.c b/drivers/edac/armada_xp_edac.c<br/>index 25517c99b3ea..589bc81f1249 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/armada_xp_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/armada_xp_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/armada_xp_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/armada_xp_edac.c</a></div><div class='hunk'>@@ -523,7 +523,7 @@ static int aurora_l2_probe(struct platform_device *pdev)</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "data ECC is not enabled\n");</div><div class='ctx'> </div><div class='ctx'> 	dci = edac_device_alloc_ctl_info(sizeof(*drvdata),</div><div class='del'>-					 "cpu", 1, "L", 1, 2, NULL, 0, 0);</div><div class='add'>+					 "cpu", 1, "L", 1, 2, 0);</div><div class='ctx'> 	if (!dci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c<br/>index 5075dc7526e3..eb702bc3aa29 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/cpc925_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/cpc925_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/cpc925_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/cpc925_edac.c</a></div><div class='hunk'>@@ -797,7 +797,7 @@ static void cpc925_add_edac_devices(void __iomem *vbase)</div><div class='ctx'> 		dev_info-&gt;edac_idx = edac_device_alloc_index();</div><div class='ctx'> 		dev_info-&gt;edac_dev =</div><div class='ctx'> 			edac_device_alloc_ctl_info(0, dev_info-&gt;ctl_name,</div><div class='del'>-				1, NULL, 0, 0, NULL, 0, dev_info-&gt;edac_idx);</div><div class='add'>+				1, NULL, 0, 0, dev_info-&gt;edac_idx);</div><div class='ctx'> 		if (!dev_info-&gt;edac_dev) {</div><div class='ctx'> 			cpc925_printk(KERN_ERR, "No memory for edac device\n");</div><div class='ctx'> 			goto err1;</div><div class='head'>diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c<br/>index 0689e1510721..621dc2a5d034 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/edac_device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/edac_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/edac_device.c</a></div><div class='hunk'>@@ -56,14 +56,12 @@ static void edac_device_dump_device(struct edac_device_ctl_info *edac_dev)</div><div class='ctx'> struct edac_device_ctl_info *</div><div class='ctx'> edac_device_alloc_ctl_info(unsigned pvt_sz, char *dev_name, unsigned nr_instances,</div><div class='ctx'> 			   char *blk_name, unsigned nr_blocks, unsigned off_val,</div><div class='del'>-			   struct edac_dev_sysfs_block_attribute *attrib_spec,</div><div class='del'>-			   unsigned nr_attrib, int device_index)</div><div class='add'>+			   int device_index)</div><div class='ctx'> {</div><div class='del'>-	struct edac_dev_sysfs_block_attribute *dev_attrib, *attrib_p, *attrib;</div><div class='ctx'> 	struct edac_device_block *dev_blk, *blk_p, *blk;</div><div class='ctx'> 	struct edac_device_instance *dev_inst, *inst;</div><div class='ctx'> 	struct edac_device_ctl_info *dev_ctl;</div><div class='del'>-	unsigned instance, block, attr;</div><div class='add'>+	unsigned instance, block;</div><div class='ctx'> 	void *pvt;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -85,15 +83,6 @@ edac_device_alloc_ctl_info(unsigned pvt_sz, char *dev_name, unsigned nr_instance</div><div class='ctx'> </div><div class='ctx'> 	dev_ctl-&gt;blocks = dev_blk;</div><div class='ctx'> </div><div class='del'>-	if (nr_attrib) {</div><div class='del'>-		dev_attrib = kcalloc(nr_attrib, sizeof(struct edac_dev_sysfs_block_attribute),</div><div class='del'>-				     GFP_KERNEL);</div><div class='del'>-		if (!dev_attrib)</div><div class='del'>-			goto free;</div><div class='del'>-</div><div class='del'>-		dev_ctl-&gt;attribs = dev_attrib;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (pvt_sz) {</div><div class='ctx'> 		pvt = kzalloc(pvt_sz, GFP_KERNEL);</div><div class='ctx'> 		if (!pvt)</div><div class='hunk'>@@ -132,44 +121,6 @@ edac_device_alloc_ctl_info(unsigned pvt_sz, char *dev_name, unsigned nr_instance</div><div class='ctx'> </div><div class='ctx'> 			edac_dbg(4, "instance=%d inst_p=%p block=#%d block_p=%p name='%s'\n",</div><div class='ctx'> 				 instance, inst, block, blk, blk-&gt;name);</div><div class='del'>-</div><div class='del'>-			/* if there are NO attributes OR no attribute pointer</div><div class='del'>-			 * then continue on to next block iteration</div><div class='del'>-			 */</div><div class='del'>-			if ((nr_attrib == 0) || (attrib_spec == NULL))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			/* setup the attribute array for this block */</div><div class='del'>-			blk-&gt;nr_attribs = nr_attrib;</div><div class='del'>-			attrib_p = &amp;dev_attrib[block*nr_instances*nr_attrib];</div><div class='del'>-			blk-&gt;block_attributes = attrib_p;</div><div class='del'>-</div><div class='del'>-			edac_dbg(4, "THIS BLOCK_ATTRIB=%p\n",</div><div class='del'>-				 blk-&gt;block_attributes);</div><div class='del'>-</div><div class='del'>-			/* Initialize every user specified attribute in this</div><div class='del'>-			 * block with the data the caller passed in</div><div class='del'>-			 * Each block gets its own copy of pointers,</div><div class='del'>-			 * and its unique 'value'</div><div class='del'>-			 */</div><div class='del'>-			for (attr = 0; attr &lt; nr_attrib; attr++) {</div><div class='del'>-				attrib = &amp;attrib_p[attr];</div><div class='del'>-</div><div class='del'>-				/* populate the unique per attrib</div><div class='del'>-				 * with the code pointers and info</div><div class='del'>-				 */</div><div class='del'>-				attrib-&gt;attr = attrib_spec[attr].attr;</div><div class='del'>-				attrib-&gt;show = attrib_spec[attr].show;</div><div class='del'>-				attrib-&gt;store = attrib_spec[attr].store;</div><div class='del'>-</div><div class='del'>-				attrib-&gt;block = blk;	/* up link */</div><div class='del'>-</div><div class='del'>-				edac_dbg(4, "alloc-attrib=%p attrib_name='%s' attrib-spec=%p spec-name=%s\n",</div><div class='del'>-					 attrib, attrib-&gt;attr.name,</div><div class='del'>-					 &amp;attrib_spec[attr],</div><div class='del'>-					 attrib_spec[attr].attr.name</div><div class='del'>-					);</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/edac_device.h b/drivers/edac/edac_device.h<br/>index 7db22a4c83ef..034711d71ebf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/edac_device.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_device.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/edac_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/edac_device.h</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #ifndef _EDAC_DEVICE_H_</div><div class='ctx'> #define _EDAC_DEVICE_H_</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/edac.h&gt;</div><div class='ctx'> #include &lt;linux/kobject.h&gt;</div><div class='hunk'>@@ -95,22 +94,13 @@ struct edac_dev_sysfs_attribute {</div><div class='ctx'>  *</div><div class='ctx'>  *	used in leaf 'block' nodes for adding controls/attributes</div><div class='ctx'>  *</div><div class='del'>- *	each block in each instance of the containing control structure</div><div class='del'>- *	can have an array of the following. The show and store functions</div><div class='del'>- *	will be filled in with the show/store function in the</div><div class='del'>- *	low level driver.</div><div class='del'>- *</div><div class='del'>- *	The 'value' field will be the actual value field used for</div><div class='del'>- *	counting</div><div class='add'>+ *	each block in each instance of the containing control structure can</div><div class='add'>+ *	have an array of the following. The show function will be filled in</div><div class='add'>+ *	with the show function in the low level driver.</div><div class='ctx'>  */</div><div class='ctx'> struct edac_dev_sysfs_block_attribute {</div><div class='ctx'> 	struct attribute attr;</div><div class='ctx'> 	ssize_t (*show)(struct kobject *, struct attribute *, char *);</div><div class='del'>-	ssize_t (*store)(struct kobject *, struct attribute *,</div><div class='del'>-			const char *, size_t);</div><div class='del'>-	struct edac_device_block *block;</div><div class='del'>-</div><div class='del'>-	unsigned int value;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* device block control structure */</div><div class='hunk'>@@ -200,8 +190,6 @@ struct edac_device_ctl_info {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long start_time;	/* edac_device load start time (jiffies) */</div><div class='ctx'> </div><div class='del'>-	struct completion removal_complete;</div><div class='del'>-</div><div class='ctx'> 	/* sysfs top name under 'edac' directory</div><div class='ctx'> 	 * and instance name:</div><div class='ctx'> 	 *      cpu/cpu0/...</div><div class='hunk'>@@ -217,7 +205,6 @@ struct edac_device_ctl_info {</div><div class='ctx'> 	u32 nr_instances;</div><div class='ctx'> 	struct edac_device_instance *instances;</div><div class='ctx'> 	struct edac_device_block *blocks;</div><div class='del'>-	struct edac_dev_sysfs_block_attribute *attribs;</div><div class='ctx'> </div><div class='ctx'> 	/* Event counters for the this whole EDAC Device */</div><div class='ctx'> 	struct edac_device_counter counters;</div><div class='hunk'>@@ -245,8 +232,6 @@ extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(</div><div class='ctx'> 		char *edac_device_name, unsigned nr_instances,</div><div class='ctx'> 		char *edac_block_name, unsigned nr_blocks,</div><div class='ctx'> 		unsigned offset_value,</div><div class='del'>-		struct edac_dev_sysfs_block_attribute *block_attributes,</div><div class='del'>-		unsigned nr_attribs,</div><div class='ctx'> 		int device_index);</div><div class='ctx'> </div><div class='ctx'> /* The offset value can be:</div><div class='hunk'>@@ -356,7 +341,6 @@ static inline void __edac_device_free_ctl_info(struct edac_device_ctl_info *ci)</div><div class='ctx'> {</div><div class='ctx'> 	if (ci) {</div><div class='ctx'> 		kfree(ci-&gt;pvt_info);</div><div class='del'>-		kfree(ci-&gt;attribs);</div><div class='ctx'> 		kfree(ci-&gt;blocks);</div><div class='ctx'> 		kfree(ci-&gt;instances);</div><div class='ctx'> 		kfree(ci);</div><div class='head'>diff --git a/drivers/edac/edac_device_sysfs.c b/drivers/edac/edac_device_sysfs.c<br/>index 237a542e045a..fcebc4ffea26 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/edac_device_sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_device_sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/edac_device_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/edac_device_sysfs.c</a></div><div class='hunk'>@@ -457,35 +457,19 @@ static ssize_t edac_dev_block_show(struct kobject *kobj,</div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Function to 'store' fields into the edac_dev 'block' structure */</div><div class='del'>-static ssize_t edac_dev_block_store(struct kobject *kobj,</div><div class='del'>-				struct attribute *attr,</div><div class='del'>-				const char *buffer, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct edac_dev_sysfs_block_attribute *block_attr;</div><div class='del'>-</div><div class='del'>-	block_attr = to_block_attr(attr);</div><div class='del'>-</div><div class='del'>-	if (block_attr-&gt;store)</div><div class='del'>-		return block_attr-&gt;store(kobj, attr, buffer, count);</div><div class='del'>-	return -EIO;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* edac_dev file operations for a 'block' */</div><div class='ctx'> static const struct sysfs_ops device_block_ops = {</div><div class='ctx'> 	.show = edac_dev_block_show,</div><div class='del'>-	.store = edac_dev_block_store</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define BLOCK_ATTR(_name,_mode,_show,_store)        \</div><div class='add'>+#define BLOCK_ATTR(_name,_mode,_show)        \</div><div class='ctx'> static struct edac_dev_sysfs_block_attribute attr_block_##_name = {	\</div><div class='ctx'> 	.attr = {.name = __stringify(_name), .mode = _mode },   \</div><div class='ctx'> 	.show   = _show,                                        \</div><div class='del'>-	.store  = _store,                                       \</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-BLOCK_ATTR(ce_count, S_IRUGO, block_ce_count_show, NULL);</div><div class='del'>-BLOCK_ATTR(ue_count, S_IRUGO, block_ue_count_show, NULL);</div><div class='add'>+BLOCK_ATTR(ce_count, S_IRUGO, block_ce_count_show);</div><div class='add'>+BLOCK_ATTR(ue_count, S_IRUGO, block_ue_count_show);</div><div class='ctx'> </div><div class='ctx'> /* list of edac_dev 'block' attributes */</div><div class='ctx'> static struct attribute *device_block_attrs[] = {</div><div class='head'>diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c<br/>index 5116873c3330..4200aec04831 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/edac_mc_sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_mc_sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/edac_mc_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/edac_mc_sysfs.c</a></div><div class='hunk'>@@ -146,7 +146,7 @@ static ssize_t csrow_ue_count_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow = to_csrow(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", csrow-&gt;ue_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", csrow-&gt;ue_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_ce_count_show(struct device *dev,</div><div class='hunk'>@@ -154,7 +154,7 @@ static ssize_t csrow_ce_count_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow = to_csrow(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", csrow-&gt;ce_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", csrow-&gt;ce_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_size_show(struct device *dev,</div><div class='hunk'>@@ -166,7 +166,7 @@ static ssize_t csrow_size_show(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; csrow-&gt;nr_channels; i++)</div><div class='ctx'> 		nr_pages += csrow-&gt;channels[i]-&gt;dimm-&gt;nr_pages;</div><div class='del'>-	return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));</div><div class='add'>+	return sysfs_emit(data, "%u\n", PAGES_TO_MiB(nr_pages));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_mem_type_show(struct device *dev,</div><div class='hunk'>@@ -174,7 +174,7 @@ static ssize_t csrow_mem_type_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow = to_csrow(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", edac_mem_types[csrow-&gt;channels[0]-&gt;dimm-&gt;mtype]);</div><div class='add'>+	return sysfs_emit(data, "%s\n", edac_mem_types[csrow-&gt;channels[0]-&gt;dimm-&gt;mtype]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_dev_type_show(struct device *dev,</div><div class='hunk'>@@ -182,7 +182,7 @@ static ssize_t csrow_dev_type_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow = to_csrow(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", dev_types[csrow-&gt;channels[0]-&gt;dimm-&gt;dtype]);</div><div class='add'>+	return sysfs_emit(data, "%s\n", dev_types[csrow-&gt;channels[0]-&gt;dimm-&gt;dtype]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_edac_mode_show(struct device *dev,</div><div class='hunk'>@@ -191,7 +191,7 @@ static ssize_t csrow_edac_mode_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow = to_csrow(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", edac_caps[csrow-&gt;channels[0]-&gt;dimm-&gt;edac_mode]);</div><div class='add'>+	return sysfs_emit(data, "%s\n", edac_caps[csrow-&gt;channels[0]-&gt;dimm-&gt;edac_mode]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* show/store functions for DIMM Label attributes */</div><div class='hunk'>@@ -207,8 +207,7 @@ static ssize_t channel_dimm_label_show(struct device *dev,</div><div class='ctx'> 	if (!rank-&gt;dimm-&gt;label[0])</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return snprintf(data, sizeof(rank-&gt;dimm-&gt;label) + 1, "%s\n",</div><div class='del'>-			rank-&gt;dimm-&gt;label);</div><div class='add'>+	return sysfs_emit(data, "%s\n", rank-&gt;dimm-&gt;label);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t channel_dimm_label_store(struct device *dev,</div><div class='hunk'>@@ -243,7 +242,7 @@ static ssize_t channel_ce_count_show(struct device *dev,</div><div class='ctx'> 	unsigned int chan = to_channel(mattr);</div><div class='ctx'> 	struct rank_info *rank = csrow-&gt;channels[chan];</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", rank-&gt;ce_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", rank-&gt;ce_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* cwrow&lt;id&gt;/attribute files */</div><div class='hunk'>@@ -515,7 +514,7 @@ static ssize_t dimmdev_label_show(struct device *dev,</div><div class='ctx'> 	if (!dimm-&gt;label[0])</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return snprintf(data, sizeof(dimm-&gt;label) + 1, "%s\n", dimm-&gt;label);</div><div class='add'>+	return sysfs_emit(data, "%s\n", dimm-&gt;label);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dimmdev_label_store(struct device *dev,</div><div class='hunk'>@@ -546,7 +545,7 @@ static ssize_t dimmdev_size_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct dimm_info *dimm = to_dimm(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", PAGES_TO_MiB(dimm-&gt;nr_pages));</div><div class='add'>+	return sysfs_emit(data, "%u\n", PAGES_TO_MiB(dimm-&gt;nr_pages));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dimmdev_mem_type_show(struct device *dev,</div><div class='hunk'>@@ -554,7 +553,7 @@ static ssize_t dimmdev_mem_type_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct dimm_info *dimm = to_dimm(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", edac_mem_types[dimm-&gt;mtype]);</div><div class='add'>+	return sysfs_emit(data, "%s\n", edac_mem_types[dimm-&gt;mtype]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dimmdev_dev_type_show(struct device *dev,</div><div class='hunk'>@@ -562,7 +561,7 @@ static ssize_t dimmdev_dev_type_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct dimm_info *dimm = to_dimm(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", dev_types[dimm-&gt;dtype]);</div><div class='add'>+	return sysfs_emit(data, "%s\n", dev_types[dimm-&gt;dtype]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dimmdev_edac_mode_show(struct device *dev,</div><div class='hunk'>@@ -571,7 +570,7 @@ static ssize_t dimmdev_edac_mode_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct dimm_info *dimm = to_dimm(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", edac_caps[dimm-&gt;edac_mode]);</div><div class='add'>+	return sysfs_emit(data, "%s\n", edac_caps[dimm-&gt;edac_mode]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dimmdev_ce_count_show(struct device *dev,</div><div class='hunk'>@@ -580,7 +579,7 @@ static ssize_t dimmdev_ce_count_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct dimm_info *dimm = to_dimm(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", dimm-&gt;ce_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", dimm-&gt;ce_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dimmdev_ue_count_show(struct device *dev,</div><div class='hunk'>@@ -589,7 +588,7 @@ static ssize_t dimmdev_ue_count_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct dimm_info *dimm = to_dimm(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", dimm-&gt;ue_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", dimm-&gt;ue_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* dimm/rank attribute files */</div><div class='hunk'>@@ -758,7 +757,7 @@ static ssize_t mci_sdram_scrub_rate_show(struct device *dev,</div><div class='ctx'> 		return bandwidth;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%d\n", bandwidth);</div><div class='add'>+	return sysfs_emit(data, "%d\n", bandwidth);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* default attribute files for the MCI object */</div><div class='hunk'>@@ -768,7 +767,7 @@ static ssize_t mci_ue_count_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = to_mci(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", mci-&gt;ue_mc);</div><div class='add'>+	return sysfs_emit(data, "%u\n", mci-&gt;ue_mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_ce_count_show(struct device *dev,</div><div class='hunk'>@@ -777,7 +776,7 @@ static ssize_t mci_ce_count_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = to_mci(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", mci-&gt;ce_mc);</div><div class='add'>+	return sysfs_emit(data, "%u\n", mci-&gt;ce_mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_ce_noinfo_show(struct device *dev,</div><div class='hunk'>@@ -786,7 +785,7 @@ static ssize_t mci_ce_noinfo_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = to_mci(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", mci-&gt;ce_noinfo_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", mci-&gt;ce_noinfo_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_ue_noinfo_show(struct device *dev,</div><div class='hunk'>@@ -795,7 +794,7 @@ static ssize_t mci_ue_noinfo_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = to_mci(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", mci-&gt;ue_noinfo_count);</div><div class='add'>+	return sysfs_emit(data, "%u\n", mci-&gt;ue_noinfo_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_seconds_show(struct device *dev,</div><div class='hunk'>@@ -804,7 +803,7 @@ static ssize_t mci_seconds_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = to_mci(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%ld\n", (jiffies - mci-&gt;start_time) / HZ);</div><div class='add'>+	return sysfs_emit(data, "%ld\n", (jiffies - mci-&gt;start_time) / HZ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_ctl_name_show(struct device *dev,</div><div class='hunk'>@@ -813,7 +812,7 @@ static ssize_t mci_ctl_name_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = to_mci(dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%s\n", mci-&gt;ctl_name);</div><div class='add'>+	return sysfs_emit(data, "%s\n", mci-&gt;ctl_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_size_mb_show(struct device *dev,</div><div class='hunk'>@@ -833,7 +832,7 @@ static ssize_t mci_size_mb_show(struct device *dev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));</div><div class='add'>+	return sysfs_emit(data, "%u\n", PAGES_TO_MiB(total_pages));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_max_location_show(struct device *dev,</div><div class='head'>diff --git a/drivers/edac/edac_pci.h b/drivers/edac/edac_pci.h<br/>index 5175f5724cfa..3f47cd9b2b03 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/edac_pci.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/edac_pci.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/edac_pci.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/edac_pci.h</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #ifndef _EDAC_PCI_H_</div><div class='ctx'> #define _EDAC_PCI_H_</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/edac.h&gt;</div><div class='ctx'> #include &lt;linux/kobject.h&gt;</div><div class='hunk'>@@ -48,8 +47,6 @@ struct edac_pci_ctl_info {</div><div class='ctx'> </div><div class='ctx'> 	int pci_idx;</div><div class='ctx'> </div><div class='del'>-	struct bus_type *edac_subsys;	/* pointer to subsystem */</div><div class='del'>-</div><div class='ctx'> 	/* the internal state of this controller instance */</div><div class='ctx'> 	int op_state;</div><div class='ctx'> 	/* work struct for this instance */</div><div class='hunk'>@@ -72,8 +69,6 @@ struct edac_pci_ctl_info {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long start_time;	/* edac_pci load start time (jiffies) */</div><div class='ctx'> </div><div class='del'>-	struct completion complete;</div><div class='del'>-</div><div class='ctx'> 	/* sysfs top name under 'edac' directory</div><div class='ctx'> 	 * and instance name:</div><div class='ctx'> 	 *      cpu/cpu0/...</div><div class='head'>diff --git a/drivers/edac/highbank_l2_edac.c b/drivers/edac/highbank_l2_edac.c<br/>index 5646c049a934..282ca6535f8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/highbank_l2_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/highbank_l2_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/highbank_l2_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/highbank_l2_edac.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ static int highbank_l2_err_probe(struct platform_device *pdev)</div><div class='ctx'> 	int res = 0;</div><div class='ctx'> </div><div class='ctx'> 	dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",</div><div class='del'>-		1, "L", 1, 2, NULL, 0, 0);</div><div class='add'>+					 1, "L", 1, 2, 0);</div><div class='ctx'> 	if (!dci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c<br/>index c1bc53f4e184..e8945d4adbad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/mpc85xx_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/mpc85xx_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/mpc85xx_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/mpc85xx_edac.c</a></div><div class='hunk'>@@ -496,7 +496,7 @@ static int mpc85xx_l2_err_probe(struct platform_device *op)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	edac_dev = edac_device_alloc_ctl_info(sizeof(*pdata),</div><div class='del'>-					      "cpu", 1, "L", 1, 2, NULL, 0,</div><div class='add'>+					      "cpu", 1, "L", 1, 2,</div><div class='ctx'> 					      edac_dev_idx);</div><div class='ctx'> 	if (!edac_dev) {</div><div class='ctx'> 		devres_release_group(&amp;op-&gt;dev, mpc85xx_l2_err_probe);</div><div class='head'>diff --git a/drivers/edac/octeon_edac-l2c.c b/drivers/edac/octeon_edac-l2c.c<br/>index 4015eb9af6fe..919095d10528 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/octeon_edac-l2c.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/octeon_edac-l2c.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/octeon_edac-l2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/octeon_edac-l2c.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ static int octeon_l2c_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* 'Tags' are block 0, 'Data' is block 1*/</div><div class='ctx'> 	l2c = edac_device_alloc_ctl_info(0, "l2c", num_tads, "l2c", 2, 0,</div><div class='del'>-					 NULL, 0, edac_device_alloc_index());</div><div class='add'>+					 edac_device_alloc_index());</div><div class='ctx'> 	if (!l2c)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/octeon_edac-pc.c b/drivers/edac/octeon_edac-pc.c<br/>index ea8a8e337b1e..b8404cc7b65f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/octeon_edac-pc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/octeon_edac-pc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/octeon_edac-pc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/octeon_edac-pc.c</a></div><div class='hunk'>@@ -92,7 +92,7 @@ static int co_cache_error_probe(struct platform_device *pdev)</div><div class='ctx'> 	platform_set_drvdata(pdev, p);</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;ed = edac_device_alloc_ctl_info(0, "cpu", num_possible_cpus(),</div><div class='del'>-					   "cache", 2, 0, NULL, 0,</div><div class='add'>+					   "cache", 2, 0,</div><div class='ctx'> 					   edac_device_alloc_index());</div><div class='ctx'> 	if (!p-&gt;ed)</div><div class='ctx'> 		goto err;</div><div class='head'>diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c<br/>index 5539917c01dd..d3cd4cc54ace 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/qcom_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/qcom_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/qcom_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/qcom_edac.c</a></div><div class='hunk'>@@ -349,7 +349,6 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Allocate edac control info */</div><div class='ctx'> 	edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank",</div><div class='ctx'> 					      llcc_driv_data-&gt;num_banks, 1,</div><div class='del'>-					      NULL, 0,</div><div class='ctx'> 					      edac_device_alloc_index());</div><div class='ctx'> </div><div class='ctx'> 	if (!edev_ctl)</div><div class='head'>diff --git a/drivers/edac/sifive_edac.c b/drivers/edac/sifive_edac.c<br/>index b844e2626fd5..a2b193dc6604 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/sifive_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/sifive_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/sifive_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/sifive_edac.c</a></div><div class='hunk'>@@ -52,8 +52,7 @@ static int ecc_register(struct platform_device *pdev)</div><div class='ctx'> 	platform_set_drvdata(pdev, p);</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;dci = edac_device_alloc_ctl_info(0, "sifive_ecc", 1, "sifive_ecc",</div><div class='del'>-					    1, 1, NULL, 0,</div><div class='del'>-					    edac_device_alloc_index());</div><div class='add'>+					    1, 1, edac_device_alloc_index());</div><div class='ctx'> 	if (!p-&gt;dci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/skx_common.c b/drivers/edac/skx_common.c<br/>index 9c5b6f8bd8bd..27996b7924c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/skx_common.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/skx_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/skx_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/skx_common.c</a></div><div class='hunk'>@@ -648,7 +648,7 @@ int skx_mce_check_error(struct notifier_block *nb, unsigned long val,</div><div class='ctx'> 	memset(&amp;res, 0, sizeof(res));</div><div class='ctx'> 	res.mce  = mce;</div><div class='ctx'> 	res.addr = mce-&gt;addr &amp; MCI_ADDR_PHYSADDR;</div><div class='del'>-	if (!pfn_to_online_page(res.addr &gt;&gt; PAGE_SHIFT)) {</div><div class='add'>+	if (!pfn_to_online_page(res.addr &gt;&gt; PAGE_SHIFT) &amp;&amp; !arch_is_platform_page(res.addr)) {</div><div class='ctx'> 		pr_err("Invalid address 0x%llx in IA32_MC%d_ADDR\n", mce-&gt;addr, mce-&gt;bank);</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c<br/>index 5527055b0964..ea7a9a342dd3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/synopsys_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/synopsys_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/synopsys_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/synopsys_edac.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/edac.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -299,6 +300,7 @@ struct synps_ecc_status {</div><div class='ctx'> /**</div><div class='ctx'>  * struct synps_edac_priv - DDR memory controller private instance data.</div><div class='ctx'>  * @baseaddr:		Base address of the DDR controller.</div><div class='add'>+ * @reglock:		Concurrent CSRs access lock.</div><div class='ctx'>  * @message:		Buffer for framing the event specific info.</div><div class='ctx'>  * @stat:		ECC status information.</div><div class='ctx'>  * @p_data:		Platform data.</div><div class='hunk'>@@ -313,6 +315,7 @@ struct synps_ecc_status {</div><div class='ctx'>  */</div><div class='ctx'> struct synps_edac_priv {</div><div class='ctx'> 	void __iomem *baseaddr;</div><div class='add'>+	spinlock_t reglock;</div><div class='ctx'> 	char message[SYNPS_EDAC_MSG_SIZE];</div><div class='ctx'> 	struct synps_ecc_status stat;</div><div class='ctx'> 	const struct synps_platform_data *p_data;</div><div class='hunk'>@@ -408,7 +411,8 @@ out:</div><div class='ctx'> static int zynqmp_get_error_info(struct synps_edac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct synps_ecc_status *p;</div><div class='del'>-	u32 regval, clearval = 0;</div><div class='add'>+	u32 regval, clearval;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> </div><div class='ctx'> 	base = priv-&gt;baseaddr;</div><div class='hunk'>@@ -452,10 +456,14 @@ ue_err:</div><div class='ctx'> 	p-&gt;ueinfo.blknr = (regval &amp; ECC_CEADDR1_BLKNR_MASK);</div><div class='ctx'> 	p-&gt;ueinfo.data = readl(base + ECC_UESYND0_OFST);</div><div class='ctx'> out:</div><div class='del'>-	clearval = ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT;</div><div class='del'>-	clearval |= ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT;</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reglock, flags);</div><div class='add'>+</div><div class='add'>+	clearval = readl(base + ECC_CLR_OFST) |</div><div class='add'>+		   ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT |</div><div class='add'>+		   ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT;</div><div class='ctx'> 	writel(clearval, base + ECC_CLR_OFST);</div><div class='del'>-	writel(0x0, base + ECC_CLR_OFST);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reglock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -515,24 +523,41 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p)</div><div class='ctx'> </div><div class='ctx'> static void enable_intr(struct synps_edac_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='ctx'> 	/* Enable UE/CE Interrupts */</div><div class='del'>-	if (priv-&gt;p_data-&gt;quirks &amp; DDR_ECC_INTR_SELF_CLEAR)</div><div class='del'>-		writel(DDR_UE_MASK | DDR_CE_MASK,</div><div class='del'>-		       priv-&gt;baseaddr + ECC_CLR_OFST);</div><div class='del'>-	else</div><div class='add'>+	if (!(priv-&gt;p_data-&gt;quirks &amp; DDR_ECC_INTR_SELF_CLEAR)) {</div><div class='ctx'> 		writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,</div><div class='ctx'> 		       priv-&gt;baseaddr + DDR_QOS_IRQ_EN_OFST);</div><div class='ctx'> </div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reglock, flags);</div><div class='add'>+</div><div class='add'>+	writel(DDR_UE_MASK | DDR_CE_MASK,</div><div class='add'>+	       priv-&gt;baseaddr + ECC_CLR_OFST);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reglock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void disable_intr(struct synps_edac_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='ctx'> 	/* Disable UE/CE Interrupts */</div><div class='del'>-	if (priv-&gt;p_data-&gt;quirks &amp; DDR_ECC_INTR_SELF_CLEAR)</div><div class='del'>-		writel(0x0, priv-&gt;baseaddr + ECC_CLR_OFST);</div><div class='del'>-	else</div><div class='add'>+	if (!(priv-&gt;p_data-&gt;quirks &amp; DDR_ECC_INTR_SELF_CLEAR)) {</div><div class='ctx'> 		writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,</div><div class='ctx'> 		       priv-&gt;baseaddr + DDR_QOS_IRQ_DB_OFST);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reglock, flags);</div><div class='add'>+</div><div class='add'>+	writel(0, priv-&gt;baseaddr + ECC_CLR_OFST);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reglock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -576,8 +601,6 @@ static irqreturn_t intr_handler(int irq, void *dev_id)</div><div class='ctx'> 	/* v3.0 of the controller does not have this register */</div><div class='ctx'> 	if (!(priv-&gt;p_data-&gt;quirks &amp; DDR_ECC_INTR_SELF_CLEAR))</div><div class='ctx'> 		writel(regval, priv-&gt;baseaddr + DDR_QOS_IRQ_STAT_OFST);</div><div class='del'>-	else</div><div class='del'>-		enable_intr(priv);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -1357,6 +1380,7 @@ static int mc_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv = mci-&gt;pvt_info;</div><div class='ctx'> 	priv-&gt;baseaddr = baseaddr;</div><div class='ctx'> 	priv-&gt;p_data = p_data;</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;reglock);</div><div class='ctx'> </div><div class='ctx'> 	mc_init(mci, pdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/thunderx_edac.c b/drivers/edac/thunderx_edac.c<br/>index 90d46e5c4ff0..fab9891e569a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/thunderx_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/thunderx_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/thunderx_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/thunderx_edac.c</a></div><div class='hunk'>@@ -1365,8 +1365,7 @@ static int thunderx_ocx_probe(struct pci_dev *pdev,</div><div class='ctx'> 	idx = edac_device_alloc_index();</div><div class='ctx'> 	snprintf(name, sizeof(name), "OCX%d", idx);</div><div class='ctx'> 	edac_dev = edac_device_alloc_ctl_info(sizeof(struct thunderx_ocx),</div><div class='del'>-					      name, 1, "CCPI", 1,</div><div class='del'>-					      0, NULL, 0, idx);</div><div class='add'>+					      name, 1, "CCPI", 1, 0, idx);</div><div class='ctx'> 	if (!edac_dev) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot allocate EDAC device\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2004,8 +2003,7 @@ static int thunderx_l2c_probe(struct pci_dev *pdev,</div><div class='ctx'> 	snprintf(name, sizeof(name), fmt, idx);</div><div class='ctx'> </div><div class='ctx'> 	edac_dev = edac_device_alloc_ctl_info(sizeof(struct thunderx_l2c),</div><div class='del'>-					      name, 1, "L2C", 1, 0,</div><div class='del'>-					      NULL, 0, idx);</div><div class='add'>+					      name, 1, "L2C", 1, 0, idx);</div><div class='ctx'> 	if (!edac_dev) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot allocate EDAC device\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/edac/versal_edac.c b/drivers/edac/versal_edac.c<br/>index 1688a5050f63..a556d23e8261 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/versal_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/versal_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/versal_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/versal_edac.c</a></div><div class='hunk'>@@ -425,7 +425,7 @@ static void handle_error(struct mem_ctl_info *mci, struct ecc_status *stat)</div><div class='ctx'> 			 convert_to_physical(priv, pinf), pinf.burstpos);</div><div class='ctx'> </div><div class='ctx'> 		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='del'>-				     priv-&gt;ce_cnt, 0, 0, 0, 0, 0, -1,</div><div class='add'>+				     1, 0, 0, 0, 0, 0, -1,</div><div class='ctx'> 				     priv-&gt;message, "");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -438,7 +438,7 @@ static void handle_error(struct mem_ctl_info *mci, struct ecc_status *stat)</div><div class='ctx'> 			 convert_to_physical(priv, pinf), pinf.burstpos);</div><div class='ctx'> </div><div class='ctx'> 		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='del'>-				     priv-&gt;ue_cnt, 0, 0, 0, 0, 0, -1,</div><div class='add'>+				     1, 0, 0, 0, 0, 0, -1,</div><div class='ctx'> 				     priv-&gt;message, "");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -865,6 +865,9 @@ static ssize_t inject_data_ue_store(struct file *file, const char __user *data,</div><div class='ctx'> 	for (i = 0; i &lt; NUM_UE_BITPOS; i++)</div><div class='ctx'> 		token[i] = strsep(&amp;pbuf, ",");</div><div class='ctx'> </div><div class='add'>+	if (!token[0] || !token[1])</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	ret = kstrtou8(token[0], 0, &amp;ue0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1135,8 +1138,7 @@ static int mc_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rc = xlnx_register_event(PM_NOTIFY_CB, VERSAL_EVENT_ERROR_PMC_ERR1,</div><div class='del'>-				 XPM_EVENT_ERROR_MASK_DDRMC_CR | XPM_EVENT_ERROR_MASK_DDRMC_NCR |</div><div class='del'>-				 XPM_EVENT_ERROR_MASK_NOC_CR | XPM_EVENT_ERROR_MASK_NOC_NCR,</div><div class='add'>+				 XPM_EVENT_ERROR_MASK_DDRMC_CR | XPM_EVENT_ERROR_MASK_DDRMC_NCR,</div><div class='ctx'> 				 false, err_callback, mci);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		if (rc == -EACCES)</div><div class='hunk'>@@ -1173,8 +1175,6 @@ static void mc_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	xlnx_unregister_event(PM_NOTIFY_CB, VERSAL_EVENT_ERROR_PMC_ERR1,</div><div class='ctx'> 			      XPM_EVENT_ERROR_MASK_DDRMC_CR |</div><div class='del'>-			      XPM_EVENT_ERROR_MASK_NOC_CR |</div><div class='del'>-			      XPM_EVENT_ERROR_MASK_NOC_NCR |</div><div class='ctx'> 			      XPM_EVENT_ERROR_MASK_DDRMC_NCR, err_callback, mci);</div><div class='ctx'> 	edac_mc_del_mc(&amp;pdev-&gt;dev);</div><div class='ctx'> 	edac_mc_free(mci);</div><div class='head'>diff --git a/drivers/edac/xgene_edac.c b/drivers/edac/xgene_edac.c<br/>index 1b50f8160013..fd87f1b2c145 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/xgene_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/xgene_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/xgene_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/xgene_edac.c</a></div><div class='hunk'>@@ -913,8 +913,8 @@ static int xgene_edac_pmd_add(struct xgene_edac *edac, struct device_node *np,</div><div class='ctx'> </div><div class='ctx'> 	snprintf(edac_name, sizeof(edac_name), "l2c%d", pmd);</div><div class='ctx'> 	edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx),</div><div class='del'>-					      edac_name, 1, "l2c", 1, 2, NULL,</div><div class='del'>-					      0, edac_device_alloc_index());</div><div class='add'>+					      edac_name, 1, "l2c", 1, 2,</div><div class='add'>+					      edac_device_alloc_index());</div><div class='ctx'> 	if (!edac_dev) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto err_group;</div><div class='hunk'>@@ -1208,8 +1208,7 @@ static int xgene_edac_l3_add(struct xgene_edac *edac, struct device_node *np,</div><div class='ctx'> </div><div class='ctx'> 	edac_idx = edac_device_alloc_index();</div><div class='ctx'> 	edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx),</div><div class='del'>-					      "l3c", 1, "l3c", 1, 0, NULL, 0,</div><div class='del'>-					      edac_idx);</div><div class='add'>+					      "l3c", 1, "l3c", 1, 0, edac_idx);</div><div class='ctx'> 	if (!edac_dev) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto err_release_group;</div><div class='hunk'>@@ -1748,8 +1747,7 @@ static int xgene_edac_soc_add(struct xgene_edac *edac, struct device_node *np,</div><div class='ctx'> </div><div class='ctx'> 	edac_idx = edac_device_alloc_index();</div><div class='ctx'> 	edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx),</div><div class='del'>-					      "SOC", 1, "SOC", 1, 2, NULL, 0,</div><div class='del'>-					      edac_idx);</div><div class='add'>+					      "SOC", 1, "SOC", 1, 2, edac_idx);</div><div class='ctx'> 	if (!edac_dev) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto err_release_group;</div><div class='head'>diff --git a/drivers/edac/zynqmp_edac.c b/drivers/edac/zynqmp_edac.c<br/>index 2d9a5cfd8931..c9dc78d8c824 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/zynqmp_edac.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/edac/zynqmp_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/zynqmp_edac.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/edac/zynqmp_edac.c</a></div><div class='hunk'>@@ -381,7 +381,7 @@ static int edac_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dci = edac_device_alloc_ctl_info(sizeof(*priv), ZYNQMP_OCM_EDAC_STRING,</div><div class='del'>-					 1, ZYNQMP_OCM_EDAC_STRING, 1, 0, NULL, 0,</div><div class='add'>+					 1, ZYNQMP_OCM_EDAC_STRING, 1, 0,</div><div class='ctx'> 					 edac_device_alloc_index());</div><div class='ctx'> 	if (!dci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/eisa/Kconfig b/drivers/eisa/Kconfig<br/>index c8bbf90209f5..a66b3be502a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/eisa/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/eisa/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/eisa/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/eisa/Kconfig</a></div><div class='hunk'>@@ -44,17 +44,16 @@ config EISA_PCI_EISA</div><div class='ctx'> </div><div class='ctx'> 	  When in doubt, say Y.</div><div class='ctx'> </div><div class='del'>-# Using EISA_VIRTUAL_ROOT on something other than an Alpha or</div><div class='del'>-# an X86 may lead to crashes...</div><div class='add'>+# Using EISA_VIRTUAL_ROOT on something other than an X86 may lead</div><div class='add'>+# to crashes...</div><div class='ctx'> </div><div class='ctx'> config EISA_VIRTUAL_ROOT</div><div class='ctx'> 	bool "EISA virtual root device"</div><div class='del'>-	depends on EISA &amp;&amp; (ALPHA || X86)</div><div class='add'>+	depends on EISA &amp;&amp; X86</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Activate this option if your system only have EISA bus</div><div class='del'>-	  (no PCI slots). The Alpha Jensen is an example of such</div><div class='del'>-	  a system.</div><div class='add'>+	  (no PCI slots).</div><div class='ctx'> </div><div class='ctx'> 	  When in doubt, say Y.</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/eisa/virtual_root.c b/drivers/eisa/virtual_root.c<br/>index 37e6dd219c37..cd9515d9d8f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/eisa/virtual_root.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/eisa/virtual_root.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/eisa/virtual_root.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/eisa/virtual_root.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_JENSEN) || defined(CONFIG_EISA_VLB_PRIMING)</div><div class='add'>+#if defined(CONFIG_EISA_VLB_PRIMING)</div><div class='ctx'> #define EISA_FORCE_PROBE_DEFAULT 1</div><div class='ctx'> #else</div><div class='ctx'> #define EISA_FORCE_PROBE_DEFAULT 0</div><div class='head'>diff --git a/drivers/firewire/.kunitconfig b/drivers/firewire/.kunitconfig<br/>index 76444a2d5e12..60d9e7c35417 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/.kunitconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/.kunitconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/.kunitconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/.kunitconfig</a></div><div class='hunk'>@@ -3,3 +3,4 @@ CONFIG_PCI=y</div><div class='ctx'> CONFIG_FIREWIRE=y</div><div class='ctx'> CONFIG_FIREWIRE_KUNIT_UAPI_TEST=y</div><div class='ctx'> CONFIG_FIREWIRE_KUNIT_DEVICE_ATTRIBUTE_TEST=y</div><div class='add'>+CONFIG_FIREWIRE_KUNIT_PACKET_SERDES_TEST=y</div><div class='head'>diff --git a/drivers/firewire/Kconfig b/drivers/firewire/Kconfig<br/>index 552a39df8cbd..869598b20e3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/Kconfig</a></div><div class='hunk'>@@ -50,6 +50,22 @@ config FIREWIRE_KUNIT_DEVICE_ATTRIBUTE_TEST</div><div class='ctx'> 	  For more information on KUnit and unit tests in general, refer</div><div class='ctx'> 	  to the KUnit documentation in Documentation/dev-tools/kunit/.</div><div class='ctx'> </div><div class='add'>+config FIREWIRE_KUNIT_PACKET_SERDES_TEST</div><div class='add'>+	tristate "KUnit tests for packet serialization/deserialization" if !KUNIT_ALL_TESTS</div><div class='add'>+	depends on FIREWIRE &amp;&amp; KUNIT</div><div class='add'>+	default KUNIT_ALL_TESTS</div><div class='add'>+	help</div><div class='add'>+	  This builds the KUnit tests for packet serialization and</div><div class='add'>+	  deserialization.</div><div class='add'>+</div><div class='add'>+	  KUnit tests run during boot and output the results to the debug</div><div class='add'>+	  log in TAP format (https://testanything.org/). Only useful for</div><div class='add'>+	  kernel devs running KUnit test harness and are not for inclusion</div><div class='add'>+	  into a production build.</div><div class='add'>+</div><div class='add'>+	  For more information on KUnit and unit tests in general, refer</div><div class='add'>+	  to the KUnit documentation in Documentation/dev-tools/kunit/.</div><div class='add'>+</div><div class='ctx'> config FIREWIRE_OHCI</div><div class='ctx'> 	tristate "OHCI-1394 controllers"</div><div class='ctx'> 	depends on PCI &amp;&amp; FIREWIRE &amp;&amp; MMU</div><div class='head'>diff --git a/drivers/firewire/Makefile b/drivers/firewire/Makefile<br/>index b24b2879ac34..75c47d046925 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # Makefile for the Linux IEEE 1394 implementation</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-firewire-core-y += core-card.o core-cdev.o core-device.o \</div><div class='add'>+firewire-core-y += core-trace.o core-card.o core-cdev.o core-device.o \</div><div class='ctx'>                    core-iso.o core-topology.o core-transaction.o</div><div class='ctx'> firewire-ohci-y += ohci.o</div><div class='ctx'> firewire-sbp2-y += sbp2.o</div><div class='hunk'>@@ -16,5 +16,5 @@ obj-$(CONFIG_FIREWIRE_NET)  += firewire-net.o</div><div class='ctx'> obj-$(CONFIG_FIREWIRE_NOSY) += nosy.o</div><div class='ctx'> obj-$(CONFIG_PROVIDE_OHCI1394_DMA_INIT) += init_ohci1394_dma.o</div><div class='ctx'> </div><div class='del'>-firewire-uapi-test-objs += uapi-test.o</div><div class='del'>-obj-$(CONFIG_FIREWIRE_KUNIT_UAPI_TEST) += firewire-uapi-test.o</div><div class='add'>+obj-$(CONFIG_FIREWIRE_KUNIT_UAPI_TEST) += uapi-test.o</div><div class='add'>+obj-$(CONFIG_FIREWIRE_KUNIT_PACKET_SERDES_TEST) += packet-serdes-test.o</div><div class='head'>diff --git a/drivers/firewire/core-card.c b/drivers/firewire/core-card.c<br/>index 401a77e3b5fa..127d87e3a153 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/core-card.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-card.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core-card.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/core-card.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='add'>+#include &lt;trace/events/firewire.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define define_fw_printk_level(func, kern_level)		\</div><div class='ctx'> void func(const struct fw_card *card, const char *fmt, ...)	\</div><div class='hunk'>@@ -221,11 +222,15 @@ static int reset_bus(struct fw_card *card, bool short_reset)</div><div class='ctx'> 	int reg = short_reset ? 5 : 1;</div><div class='ctx'> 	int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET;</div><div class='ctx'> </div><div class='add'>+	trace_bus_reset_initiate(card-&gt;generation, short_reset);</div><div class='add'>+</div><div class='ctx'> 	return card-&gt;driver-&gt;update_phy_reg(card, reg, 0, bit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fw_schedule_bus_reset(struct fw_card *card, bool delayed, bool short_reset)</div><div class='ctx'> {</div><div class='add'>+	trace_bus_reset_schedule(card-&gt;generation, short_reset);</div><div class='add'>+</div><div class='ctx'> 	/* We don't try hard to sort out requests of long vs. short resets. */</div><div class='ctx'> 	card-&gt;br_short = short_reset;</div><div class='ctx'> </div><div class='hunk'>@@ -244,6 +249,8 @@ static void br_work(struct work_struct *work)</div><div class='ctx'> 	/* Delay for 2s after last reset per IEEE 1394 clause 8.2.1. */</div><div class='ctx'> 	if (card-&gt;reset_jiffies != 0 &amp;&amp;</div><div class='ctx'> 	    time_before64(get_jiffies_64(), card-&gt;reset_jiffies + 2 * HZ)) {</div><div class='add'>+		trace_bus_reset_postpone(card-&gt;generation, card-&gt;br_short);</div><div class='add'>+</div><div class='ctx'> 		if (!queue_delayed_work(fw_workqueue, &amp;card-&gt;br_work, 2 * HZ))</div><div class='ctx'> 			fw_card_put(card);</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/firewire/core-cdev.c b/drivers/firewire/core-cdev.c<br/>index 6274b86eb943..55993c9e0b90 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/core-cdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-cdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core-cdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/core-cdev.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='add'>+#include &lt;trace/events/firewire.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ABI version history is documented in linux/firewire-cdev.h.</div><div class='hunk'>@@ -1558,6 +1559,9 @@ static void outbound_phy_packet_callback(struct fw_packet *packet,</div><div class='ctx'> 	struct client *e_client = e-&gt;client;</div><div class='ctx'> 	u32 rcode;</div><div class='ctx'> </div><div class='add'>+	trace_async_phy_outbound_complete((uintptr_t)packet, status, packet-&gt;generation,</div><div class='add'>+					  packet-&gt;timestamp);</div><div class='add'>+</div><div class='ctx'> 	switch (status) {</div><div class='ctx'> 	// expected:</div><div class='ctx'> 	case ACK_COMPLETE:</div><div class='hunk'>@@ -1655,6 +1659,9 @@ static int ioctl_send_phy_packet(struct client *client, union ioctl_arg *arg)</div><div class='ctx'> 		memcpy(pp-&gt;data, a-&gt;data, sizeof(a-&gt;data));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	trace_async_phy_outbound_initiate((uintptr_t)&amp;e-&gt;p, e-&gt;p.generation, e-&gt;p.header[1],</div><div class='add'>+					  e-&gt;p.header[2]);</div><div class='add'>+</div><div class='ctx'> 	card-&gt;driver-&gt;send_request(card, &amp;e-&gt;p);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/firewire/core-topology.c b/drivers/firewire/core-topology.c<br/>index f40c81534381..837cc44d8d9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/core-topology.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core-topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/core-topology.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='add'>+#include &lt;trace/events/firewire.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define SELF_ID_PHY_ID(q)		(((q) &gt;&gt; 24) &amp; 0x3f)</div><div class='ctx'> #define SELF_ID_EXTENDED(q)		(((q) &gt;&gt; 23) &amp; 0x01)</div><div class='hunk'>@@ -507,6 +508,8 @@ void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation,</div><div class='ctx'> 	struct fw_node *local_node;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	trace_bus_reset_handle(generation, node_id, bm_abdicate, self_ids, self_id_count);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/firewire/core-trace.c b/drivers/firewire/core-trace.c<br/>new file mode 100644<br/>index 000000000000..96cbd9d384dc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core-trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/core-trace.c</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+// Copyright (c) 2024 Takashi Sakamoto</div><div class='add'>+</div><div class='add'>+#define CREATE_TRACE_POINTS</div><div class='add'>+#include &lt;trace/events/firewire.h&gt;</div><div class='head'>diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c<br/>index 130b95aca629..571fdff65c2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/core-transaction.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core-transaction.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core-transaction.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/core-transaction.c</a></div><div class='hunk'>@@ -29,29 +29,11 @@</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='add'>+#include &lt;trace/events/firewire.h&gt;</div><div class='add'>+#include "packet-header-definitions.h"</div><div class='ctx'> </div><div class='del'>-#define HEADER_PRI(pri)			((pri) &lt;&lt; 0)</div><div class='del'>-#define HEADER_TCODE(tcode)		((tcode) &lt;&lt; 4)</div><div class='del'>-#define HEADER_RETRY(retry)		((retry) &lt;&lt; 8)</div><div class='del'>-#define HEADER_TLABEL(tlabel)		((tlabel) &lt;&lt; 10)</div><div class='del'>-#define HEADER_DESTINATION(destination)	((destination) &lt;&lt; 16)</div><div class='del'>-#define HEADER_SOURCE(source)		((source) &lt;&lt; 16)</div><div class='del'>-#define HEADER_RCODE(rcode)		((rcode) &lt;&lt; 12)</div><div class='del'>-#define HEADER_OFFSET_HIGH(offset_high)	((offset_high) &lt;&lt; 0)</div><div class='del'>-#define HEADER_DATA_LENGTH(length)	((length) &lt;&lt; 16)</div><div class='del'>-#define HEADER_EXTENDED_TCODE(tcode)	((tcode) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define HEADER_GET_TCODE(q)		(((q) &gt;&gt; 4) &amp; 0x0f)</div><div class='del'>-#define HEADER_GET_TLABEL(q)		(((q) &gt;&gt; 10) &amp; 0x3f)</div><div class='del'>-#define HEADER_GET_RCODE(q)		(((q) &gt;&gt; 12) &amp; 0x0f)</div><div class='del'>-#define HEADER_GET_DESTINATION(q)	(((q) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_SOURCE(q)		(((q) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_OFFSET_HIGH(q)	(((q) &gt;&gt; 0) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_DATA_LENGTH(q)	(((q) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_EXTENDED_TCODE(q)	(((q) &gt;&gt; 0) &amp; 0xffff)</div><div class='del'>-</div><div class='del'>-#define HEADER_DESTINATION_IS_BROADCAST(q) \</div><div class='del'>-	(((q) &amp; HEADER_DESTINATION(0x3f)) == HEADER_DESTINATION(0x3f))</div><div class='add'>+#define HEADER_DESTINATION_IS_BROADCAST(header) \</div><div class='add'>+	((async_header_get_destination(header) &amp; 0x3f) == 0x3f)</div><div class='ctx'> </div><div class='ctx'> #define PHY_PACKET_CONFIG	0x0</div><div class='ctx'> #define PHY_PACKET_LINK_ON	0x1</div><div class='hunk'>@@ -192,6 +174,9 @@ static void transmit_complete_callback(struct fw_packet *packet,</div><div class='ctx'> 	struct fw_transaction *t =</div><div class='ctx'> 	    container_of(packet, struct fw_transaction, packet);</div><div class='ctx'> </div><div class='add'>+	trace_async_request_outbound_complete((uintptr_t)t, packet-&gt;generation, packet-&gt;speed,</div><div class='add'>+					      status, packet-&gt;timestamp);</div><div class='add'>+</div><div class='ctx'> 	switch (status) {</div><div class='ctx'> 	case ACK_COMPLETE:</div><div class='ctx'> 		close_transaction(t, card, RCODE_COMPLETE, packet-&gt;timestamp);</div><div class='hunk'>@@ -231,10 +216,11 @@ static void fw_fill_request(struct fw_packet *packet, int tcode, int tlabel,</div><div class='ctx'> 	int ext_tcode;</div><div class='ctx'> </div><div class='ctx'> 	if (tcode == TCODE_STREAM_DATA) {</div><div class='del'>-		packet-&gt;header[0] =</div><div class='del'>-			HEADER_DATA_LENGTH(length) |</div><div class='del'>-			destination_id |</div><div class='del'>-			HEADER_TCODE(TCODE_STREAM_DATA);</div><div class='add'>+		// The value of destination_id argument should include tag, channel, and sy fields</div><div class='add'>+		// as isochronous packet header has.</div><div class='add'>+		packet-&gt;header[0] = destination_id;</div><div class='add'>+		isoc_header_set_data_length(packet-&gt;header, length);</div><div class='add'>+		isoc_header_set_tcode(packet-&gt;header, TCODE_STREAM_DATA);</div><div class='ctx'> 		packet-&gt;header_length = 4;</div><div class='ctx'> 		packet-&gt;payload = payload;</div><div class='ctx'> 		packet-&gt;payload_length = length;</div><div class='hunk'>@@ -248,28 +234,24 @@ static void fw_fill_request(struct fw_packet *packet, int tcode, int tlabel,</div><div class='ctx'> 	} else</div><div class='ctx'> 		ext_tcode = 0;</div><div class='ctx'> </div><div class='del'>-	packet-&gt;header[0] =</div><div class='del'>-		HEADER_RETRY(RETRY_X) |</div><div class='del'>-		HEADER_TLABEL(tlabel) |</div><div class='del'>-		HEADER_TCODE(tcode) |</div><div class='del'>-		HEADER_DESTINATION(destination_id);</div><div class='del'>-	packet-&gt;header[1] =</div><div class='del'>-		HEADER_OFFSET_HIGH(offset &gt;&gt; 32) | HEADER_SOURCE(source_id);</div><div class='del'>-	packet-&gt;header[2] =</div><div class='del'>-		offset;</div><div class='add'>+	async_header_set_retry(packet-&gt;header, RETRY_X);</div><div class='add'>+	async_header_set_tlabel(packet-&gt;header, tlabel);</div><div class='add'>+	async_header_set_tcode(packet-&gt;header, tcode);</div><div class='add'>+	async_header_set_destination(packet-&gt;header, destination_id);</div><div class='add'>+	async_header_set_source(packet-&gt;header, source_id);</div><div class='add'>+	async_header_set_offset(packet-&gt;header, offset);</div><div class='ctx'> </div><div class='ctx'> 	switch (tcode) {</div><div class='ctx'> 	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='del'>-		packet-&gt;header[3] = *(u32 *)payload;</div><div class='add'>+		async_header_set_quadlet_data(packet-&gt;header, *(u32 *)payload);</div><div class='ctx'> 		packet-&gt;header_length = 16;</div><div class='ctx'> 		packet-&gt;payload_length = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_LOCK_REQUEST:</div><div class='ctx'> 	case TCODE_WRITE_BLOCK_REQUEST:</div><div class='del'>-		packet-&gt;header[3] =</div><div class='del'>-			HEADER_DATA_LENGTH(length) |</div><div class='del'>-			HEADER_EXTENDED_TCODE(ext_tcode);</div><div class='add'>+		async_header_set_data_length(packet-&gt;header, length);</div><div class='add'>+		async_header_set_extended_tcode(packet-&gt;header, ext_tcode);</div><div class='ctx'> 		packet-&gt;header_length = 16;</div><div class='ctx'> 		packet-&gt;payload = payload;</div><div class='ctx'> 		packet-&gt;payload_length = length;</div><div class='hunk'>@@ -281,9 +263,8 @@ static void fw_fill_request(struct fw_packet *packet, int tcode, int tlabel,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_READ_BLOCK_REQUEST:</div><div class='del'>-		packet-&gt;header[3] =</div><div class='del'>-			HEADER_DATA_LENGTH(length) |</div><div class='del'>-			HEADER_EXTENDED_TCODE(ext_tcode);</div><div class='add'>+		async_header_set_data_length(packet-&gt;header, length);</div><div class='add'>+		async_header_set_extended_tcode(packet-&gt;header, ext_tcode);</div><div class='ctx'> 		packet-&gt;header_length = 16;</div><div class='ctx'> 		packet-&gt;payload_length = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -417,6 +398,9 @@ void __fw_send_request(struct fw_card *card, struct fw_transaction *t, int tcode</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='ctx'> </div><div class='add'>+	trace_async_request_outbound_initiate((uintptr_t)t, generation, speed, t-&gt;packet.header, payload,</div><div class='add'>+					      tcode_is_read_request(tcode) ? 0 : length / 4);</div><div class='add'>+</div><div class='ctx'> 	card-&gt;driver-&gt;send_request(card, &amp;t-&gt;packet);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__fw_send_request);</div><div class='hunk'>@@ -479,6 +463,8 @@ static DECLARE_COMPLETION(phy_config_done);</div><div class='ctx'> static void transmit_phy_packet_callback(struct fw_packet *packet,</div><div class='ctx'> 					 struct fw_card *card, int status)</div><div class='ctx'> {</div><div class='add'>+	trace_async_phy_outbound_complete((uintptr_t)packet, packet-&gt;generation, status,</div><div class='add'>+					  packet-&gt;timestamp);</div><div class='ctx'> 	complete(&amp;phy_config_done);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -517,6 +503,10 @@ void fw_send_phy_config(struct fw_card *card,</div><div class='ctx'> 	phy_config_packet.generation = generation;</div><div class='ctx'> 	reinit_completion(&amp;phy_config_done);</div><div class='ctx'> </div><div class='add'>+	trace_async_phy_outbound_initiate((uintptr_t)&amp;phy_config_packet,</div><div class='add'>+					  phy_config_packet.generation, phy_config_packet.header[1],</div><div class='add'>+					  phy_config_packet.header[2]);</div><div class='add'>+</div><div class='ctx'> 	card-&gt;driver-&gt;send_request(card, &amp;phy_config_packet);</div><div class='ctx'> 	wait_for_completion_timeout(&amp;phy_config_done, timeout);</div><div class='ctx'> </div><div class='hunk'>@@ -655,7 +645,7 @@ EXPORT_SYMBOL(fw_core_remove_address_handler);</div><div class='ctx'> struct fw_request {</div><div class='ctx'> 	struct kref kref;</div><div class='ctx'> 	struct fw_packet response;</div><div class='del'>-	u32 request_header[4];</div><div class='add'>+	u32 request_header[ASYNC_HEADER_QUADLET_COUNT];</div><div class='ctx'> 	int ack;</div><div class='ctx'> 	u32 timestamp;</div><div class='ctx'> 	u32 length;</div><div class='hunk'>@@ -684,6 +674,9 @@ static void free_response_callback(struct fw_packet *packet,</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_request *request = container_of(packet, struct fw_request, response);</div><div class='ctx'> </div><div class='add'>+	trace_async_response_outbound_complete((uintptr_t)request, packet-&gt;generation,</div><div class='add'>+					       packet-&gt;speed, status, packet-&gt;timestamp);</div><div class='add'>+</div><div class='ctx'> 	// Decrease the reference count since not at in-flight.</div><div class='ctx'> 	fw_request_put(request);</div><div class='ctx'> </div><div class='hunk'>@@ -695,7 +688,7 @@ int fw_get_response_length(struct fw_request *r)</div><div class='ctx'> {</div><div class='ctx'> 	int tcode, ext_tcode, data_length;</div><div class='ctx'> </div><div class='del'>-	tcode = HEADER_GET_TCODE(r-&gt;request_header[0]);</div><div class='add'>+	tcode = async_header_get_tcode(r-&gt;request_header);</div><div class='ctx'> </div><div class='ctx'> 	switch (tcode) {</div><div class='ctx'> 	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='hunk'>@@ -706,12 +699,12 @@ int fw_get_response_length(struct fw_request *r)</div><div class='ctx'> 		return 4;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_READ_BLOCK_REQUEST:</div><div class='del'>-		data_length = HEADER_GET_DATA_LENGTH(r-&gt;request_header[3]);</div><div class='add'>+		data_length = async_header_get_data_length(r-&gt;request_header);</div><div class='ctx'> 		return data_length;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_LOCK_REQUEST:</div><div class='del'>-		ext_tcode = HEADER_GET_EXTENDED_TCODE(r-&gt;request_header[3]);</div><div class='del'>-		data_length = HEADER_GET_DATA_LENGTH(r-&gt;request_header[3]);</div><div class='add'>+		ext_tcode = async_header_get_extended_tcode(r-&gt;request_header);</div><div class='add'>+		data_length = async_header_get_data_length(r-&gt;request_header);</div><div class='ctx'> 		switch (ext_tcode) {</div><div class='ctx'> 		case EXTCODE_FETCH_ADD:</div><div class='ctx'> 		case EXTCODE_LITTLE_ADD:</div><div class='hunk'>@@ -731,46 +724,42 @@ void fw_fill_response(struct fw_packet *response, u32 *request_header,</div><div class='ctx'> {</div><div class='ctx'> 	int tcode, tlabel, extended_tcode, source, destination;</div><div class='ctx'> </div><div class='del'>-	tcode          = HEADER_GET_TCODE(request_header[0]);</div><div class='del'>-	tlabel         = HEADER_GET_TLABEL(request_header[0]);</div><div class='del'>-	source         = HEADER_GET_DESTINATION(request_header[0]);</div><div class='del'>-	destination    = HEADER_GET_SOURCE(request_header[1]);</div><div class='del'>-	extended_tcode = HEADER_GET_EXTENDED_TCODE(request_header[3]);</div><div class='del'>-</div><div class='del'>-	response-&gt;header[0] =</div><div class='del'>-		HEADER_RETRY(RETRY_1) |</div><div class='del'>-		HEADER_TLABEL(tlabel) |</div><div class='del'>-		HEADER_DESTINATION(destination);</div><div class='del'>-	response-&gt;header[1] =</div><div class='del'>-		HEADER_SOURCE(source) |</div><div class='del'>-		HEADER_RCODE(rcode);</div><div class='del'>-	response-&gt;header[2] = 0;</div><div class='add'>+	tcode = async_header_get_tcode(request_header);</div><div class='add'>+	tlabel = async_header_get_tlabel(request_header);</div><div class='add'>+	source = async_header_get_destination(request_header); // Exchange.</div><div class='add'>+	destination = async_header_get_source(request_header); // Exchange.</div><div class='add'>+	extended_tcode = async_header_get_extended_tcode(request_header);</div><div class='add'>+</div><div class='add'>+	async_header_set_retry(response-&gt;header, RETRY_1);</div><div class='add'>+	async_header_set_tlabel(response-&gt;header, tlabel);</div><div class='add'>+	async_header_set_destination(response-&gt;header, destination);</div><div class='add'>+	async_header_set_source(response-&gt;header, source);</div><div class='add'>+	async_header_set_rcode(response-&gt;header, rcode);</div><div class='add'>+	response-&gt;header[2] = 0;	// The field is reserved.</div><div class='ctx'> </div><div class='ctx'> 	switch (tcode) {</div><div class='ctx'> 	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='ctx'> 	case TCODE_WRITE_BLOCK_REQUEST:</div><div class='del'>-		response-&gt;header[0] |= HEADER_TCODE(TCODE_WRITE_RESPONSE);</div><div class='add'>+		async_header_set_tcode(response-&gt;header, TCODE_WRITE_RESPONSE);</div><div class='ctx'> 		response-&gt;header_length = 12;</div><div class='ctx'> 		response-&gt;payload_length = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_READ_QUADLET_REQUEST:</div><div class='del'>-		response-&gt;header[0] |=</div><div class='del'>-			HEADER_TCODE(TCODE_READ_QUADLET_RESPONSE);</div><div class='add'>+		async_header_set_tcode(response-&gt;header, TCODE_READ_QUADLET_RESPONSE);</div><div class='ctx'> 		if (payload != NULL)</div><div class='del'>-			response-&gt;header[3] = *(u32 *)payload;</div><div class='add'>+			async_header_set_quadlet_data(response-&gt;header, *(u32 *)payload);</div><div class='ctx'> 		else</div><div class='del'>-			response-&gt;header[3] = 0;</div><div class='add'>+			async_header_set_quadlet_data(response-&gt;header, 0);</div><div class='ctx'> 		response-&gt;header_length = 16;</div><div class='ctx'> 		response-&gt;payload_length = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_READ_BLOCK_REQUEST:</div><div class='ctx'> 	case TCODE_LOCK_REQUEST:</div><div class='del'>-		response-&gt;header[0] |= HEADER_TCODE(tcode + 2);</div><div class='del'>-		response-&gt;header[3] =</div><div class='del'>-			HEADER_DATA_LENGTH(length) |</div><div class='del'>-			HEADER_EXTENDED_TCODE(extended_tcode);</div><div class='add'>+		async_header_set_tcode(response-&gt;header, tcode + 2);</div><div class='add'>+		async_header_set_data_length(response-&gt;header, length);</div><div class='add'>+		async_header_set_extended_tcode(response-&gt;header, extended_tcode);</div><div class='ctx'> 		response-&gt;header_length = 16;</div><div class='ctx'> 		response-&gt;payload = payload;</div><div class='ctx'> 		response-&gt;payload_length = length;</div><div class='hunk'>@@ -807,7 +796,7 @@ static struct fw_request *allocate_request(struct fw_card *card,</div><div class='ctx'> 	u32 *data, length;</div><div class='ctx'> 	int request_tcode;</div><div class='ctx'> </div><div class='del'>-	request_tcode = HEADER_GET_TCODE(p-&gt;header[0]);</div><div class='add'>+	request_tcode = async_header_get_tcode(p-&gt;header);</div><div class='ctx'> 	switch (request_tcode) {</div><div class='ctx'> 	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='ctx'> 		data = &amp;p-&gt;header[3];</div><div class='hunk'>@@ -817,7 +806,7 @@ static struct fw_request *allocate_request(struct fw_card *card,</div><div class='ctx'> 	case TCODE_WRITE_BLOCK_REQUEST:</div><div class='ctx'> 	case TCODE_LOCK_REQUEST:</div><div class='ctx'> 		data = p-&gt;payload;</div><div class='del'>-		length = HEADER_GET_DATA_LENGTH(p-&gt;header[3]);</div><div class='add'>+		length = async_header_get_data_length(p-&gt;header);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_READ_QUADLET_REQUEST:</div><div class='hunk'>@@ -827,7 +816,7 @@ static struct fw_request *allocate_request(struct fw_card *card,</div><div class='ctx'> </div><div class='ctx'> 	case TCODE_READ_BLOCK_REQUEST:</div><div class='ctx'> 		data = NULL;</div><div class='del'>-		length = HEADER_GET_DATA_LENGTH(p-&gt;header[3]);</div><div class='add'>+		length = async_header_get_data_length(p-&gt;header);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -870,24 +859,30 @@ static struct fw_request *allocate_request(struct fw_card *card,</div><div class='ctx'> void fw_send_response(struct fw_card *card,</div><div class='ctx'> 		      struct fw_request *request, int rcode)</div><div class='ctx'> {</div><div class='add'>+	u32 *data = NULL;</div><div class='add'>+	unsigned int data_length = 0;</div><div class='add'>+</div><div class='ctx'> 	/* unified transaction or broadcast transaction: don't respond */</div><div class='ctx'> 	if (request-&gt;ack != ACK_PENDING ||</div><div class='del'>-	    HEADER_DESTINATION_IS_BROADCAST(request-&gt;request_header[0])) {</div><div class='add'>+	    HEADER_DESTINATION_IS_BROADCAST(request-&gt;request_header)) {</div><div class='ctx'> 		fw_request_put(request);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rcode == RCODE_COMPLETE)</div><div class='del'>-		fw_fill_response(&amp;request-&gt;response, request-&gt;request_header,</div><div class='del'>-				 rcode, request-&gt;data,</div><div class='del'>-				 fw_get_response_length(request));</div><div class='del'>-	else</div><div class='del'>-		fw_fill_response(&amp;request-&gt;response, request-&gt;request_header,</div><div class='del'>-				 rcode, NULL, 0);</div><div class='add'>+	if (rcode == RCODE_COMPLETE) {</div><div class='add'>+		data = request-&gt;data;</div><div class='add'>+		data_length = fw_get_response_length(request);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fw_fill_response(&amp;request-&gt;response, request-&gt;request_header, rcode, data, data_length);</div><div class='ctx'> </div><div class='ctx'> 	// Increase the reference count so that the object is kept during in-flight.</div><div class='ctx'> 	fw_request_get(request);</div><div class='ctx'> </div><div class='add'>+	trace_async_response_outbound_initiate((uintptr_t)request, request-&gt;response.generation,</div><div class='add'>+					       request-&gt;response.speed, request-&gt;response.header,</div><div class='add'>+					       data, data ? data_length / 4 : 0);</div><div class='add'>+</div><div class='ctx'> 	card-&gt;driver-&gt;send_response(card, &amp;request-&gt;response);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fw_send_response);</div><div class='hunk'>@@ -926,11 +921,11 @@ static void handle_exclusive_region_request(struct fw_card *card,</div><div class='ctx'> 	struct fw_address_handler *handler;</div><div class='ctx'> 	int tcode, destination, source;</div><div class='ctx'> </div><div class='del'>-	destination = HEADER_GET_DESTINATION(p-&gt;header[0]);</div><div class='del'>-	source      = HEADER_GET_SOURCE(p-&gt;header[1]);</div><div class='del'>-	tcode       = HEADER_GET_TCODE(p-&gt;header[0]);</div><div class='add'>+	destination = async_header_get_destination(p-&gt;header);</div><div class='add'>+	source = async_header_get_source(p-&gt;header);</div><div class='add'>+	tcode = async_header_get_tcode(p-&gt;header);</div><div class='ctx'> 	if (tcode == TCODE_LOCK_REQUEST)</div><div class='del'>-		tcode = 0x10 + HEADER_GET_EXTENDED_TCODE(p-&gt;header[3]);</div><div class='add'>+		tcode = 0x10 + async_header_get_extended_tcode(p-&gt;header);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	handler = lookup_enclosing_address_handler(&amp;address_handler_list,</div><div class='hunk'>@@ -963,9 +958,9 @@ static void handle_fcp_region_request(struct fw_card *card,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tcode       = HEADER_GET_TCODE(p-&gt;header[0]);</div><div class='del'>-	destination = HEADER_GET_DESTINATION(p-&gt;header[0]);</div><div class='del'>-	source      = HEADER_GET_SOURCE(p-&gt;header[1]);</div><div class='add'>+	tcode = async_header_get_tcode(p-&gt;header);</div><div class='add'>+	destination = async_header_get_destination(p-&gt;header);</div><div class='add'>+	source = async_header_get_source(p-&gt;header);</div><div class='ctx'> </div><div class='ctx'> 	if (tcode != TCODE_WRITE_QUADLET_REQUEST &amp;&amp;</div><div class='ctx'> 	    tcode != TCODE_WRITE_BLOCK_REQUEST) {</div><div class='hunk'>@@ -993,11 +988,15 @@ void fw_core_handle_request(struct fw_card *card, struct fw_packet *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_request *request;</div><div class='ctx'> 	unsigned long long offset;</div><div class='add'>+	unsigned int tcode;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;ack != ACK_PENDING &amp;&amp; p-&gt;ack != ACK_COMPLETE)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (TCODE_IS_LINK_INTERNAL(HEADER_GET_TCODE(p-&gt;header[0]))) {</div><div class='add'>+	tcode = async_header_get_tcode(p-&gt;header);</div><div class='add'>+	if (tcode_is_link_internal(tcode)) {</div><div class='add'>+		trace_async_phy_inbound((uintptr_t)p, p-&gt;generation, p-&gt;ack, p-&gt;timestamp,</div><div class='add'>+					 p-&gt;header[1], p-&gt;header[2]);</div><div class='ctx'> 		fw_cdev_handle_phy_packet(card, p);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1008,8 +1007,11 @@ void fw_core_handle_request(struct fw_card *card, struct fw_packet *p)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	offset = ((u64)HEADER_GET_OFFSET_HIGH(p-&gt;header[1]) &lt;&lt; 32) |</div><div class='del'>-		p-&gt;header[2];</div><div class='add'>+	trace_async_request_inbound((uintptr_t)request, p-&gt;generation, p-&gt;speed, p-&gt;ack,</div><div class='add'>+				    p-&gt;timestamp, p-&gt;header, request-&gt;data,</div><div class='add'>+				    tcode_is_read_request(tcode) ? 0 : request-&gt;length / 4);</div><div class='add'>+</div><div class='add'>+	offset = async_header_get_offset(p-&gt;header);</div><div class='ctx'> </div><div class='ctx'> 	if (!is_in_fcp_region(offset, request-&gt;length))</div><div class='ctx'> 		handle_exclusive_region_request(card, p, request, offset);</div><div class='hunk'>@@ -1027,37 +1029,15 @@ void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)</div><div class='ctx'> 	size_t data_length;</div><div class='ctx'> 	int tcode, tlabel, source, rcode;</div><div class='ctx'> </div><div class='del'>-	tcode	= HEADER_GET_TCODE(p-&gt;header[0]);</div><div class='del'>-	tlabel	= HEADER_GET_TLABEL(p-&gt;header[0]);</div><div class='del'>-	source	= HEADER_GET_SOURCE(p-&gt;header[1]);</div><div class='del'>-	rcode	= HEADER_GET_RCODE(p-&gt;header[1]);</div><div class='add'>+	tcode = async_header_get_tcode(p-&gt;header);</div><div class='add'>+	tlabel = async_header_get_tlabel(p-&gt;header);</div><div class='add'>+	source = async_header_get_source(p-&gt;header);</div><div class='add'>+	rcode = async_header_get_rcode(p-&gt;header);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='del'>-	list_for_each_entry(iter, &amp;card-&gt;transaction_list, link) {</div><div class='del'>-		if (iter-&gt;node_id == source &amp;&amp; iter-&gt;tlabel == tlabel) {</div><div class='del'>-			if (!try_cancel_split_timeout(iter)) {</div><div class='del'>-				spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='del'>-				goto timed_out;</div><div class='del'>-			}</div><div class='del'>-			list_del_init(&amp;iter-&gt;link);</div><div class='del'>-			card-&gt;tlabel_mask &amp;= ~(1ULL &lt;&lt; iter-&gt;tlabel);</div><div class='del'>-			t = iter;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (!t) {</div><div class='del'>- timed_out:</div><div class='del'>-		fw_notice(card, "unsolicited response (source %x, tlabel %x)\n",</div><div class='del'>-			  source, tlabel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: sanity check packet, is length correct, does tcodes</div><div class='del'>-	 * and addresses match.</div><div class='del'>-	 */</div><div class='add'>+	// FIXME: sanity check packet, is length correct, does tcodes</div><div class='add'>+	// and addresses match to the transaction request queried later.</div><div class='add'>+	//</div><div class='add'>+	// For the tracepoints event, let us decode the header here against the concern.</div><div class='ctx'> </div><div class='ctx'> 	switch (tcode) {</div><div class='ctx'> 	case TCODE_READ_QUADLET_RESPONSE:</div><div class='hunk'>@@ -1073,7 +1053,7 @@ void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)</div><div class='ctx'> 	case TCODE_READ_BLOCK_RESPONSE:</div><div class='ctx'> 	case TCODE_LOCK_RESPONSE:</div><div class='ctx'> 		data = p-&gt;payload;</div><div class='del'>-		data_length = HEADER_GET_DATA_LENGTH(p-&gt;header[3]);</div><div class='add'>+		data_length = async_header_get_data_length(p-&gt;header);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1083,6 +1063,31 @@ void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(iter, &amp;card-&gt;transaction_list, link) {</div><div class='add'>+		if (iter-&gt;node_id == source &amp;&amp; iter-&gt;tlabel == tlabel) {</div><div class='add'>+			if (!try_cancel_split_timeout(iter)) {</div><div class='add'>+				spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='add'>+				goto timed_out;</div><div class='add'>+			}</div><div class='add'>+			list_del_init(&amp;iter-&gt;link);</div><div class='add'>+			card-&gt;tlabel_mask &amp;= ~(1ULL &lt;&lt; iter-&gt;tlabel);</div><div class='add'>+			t = iter;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	trace_async_response_inbound((uintptr_t)t, p-&gt;generation, p-&gt;speed, p-&gt;ack, p-&gt;timestamp,</div><div class='add'>+				     p-&gt;header, data, data_length / 4);</div><div class='add'>+</div><div class='add'>+	if (!t) {</div><div class='add'>+ timed_out:</div><div class='add'>+		fw_notice(card, "unsolicited response (source %x, tlabel %x)\n",</div><div class='add'>+			  source, tlabel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The response handler may be executed while the request handler</div><div class='ctx'> 	 * is still pending.  Cancel the request handler.</div><div class='hunk'>@@ -1135,7 +1140,7 @@ static void handle_topology_map(struct fw_card *card, struct fw_request *request</div><div class='ctx'> {</div><div class='ctx'> 	int start;</div><div class='ctx'> </div><div class='del'>-	if (!TCODE_IS_READ_REQUEST(tcode)) {</div><div class='add'>+	if (!tcode_is_read_request(tcode)) {</div><div class='ctx'> 		fw_send_response(card, request, RCODE_TYPE_ERROR);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/firewire/core.h b/drivers/firewire/core.h<br/>index 95c10f3d2282..7c36d2628e37 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/core.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/core.h</a></div><div class='hunk'>@@ -225,13 +225,20 @@ static inline bool is_next_generation(int new_generation, int old_generation)</div><div class='ctx'> </div><div class='ctx'> #define TCODE_LINK_INTERNAL		0xe</div><div class='ctx'> </div><div class='del'>-#define TCODE_IS_READ_REQUEST(tcode)	(((tcode) &amp; ~1) == 4)</div><div class='del'>-#define TCODE_IS_BLOCK_PACKET(tcode)	(((tcode) &amp;  1) != 0)</div><div class='del'>-#define TCODE_IS_LINK_INTERNAL(tcode)	((tcode) == TCODE_LINK_INTERNAL)</div><div class='del'>-#define TCODE_IS_REQUEST(tcode)		(((tcode) &amp;  2) == 0)</div><div class='del'>-#define TCODE_IS_RESPONSE(tcode)	(((tcode) &amp;  2) != 0)</div><div class='del'>-#define TCODE_HAS_REQUEST_DATA(tcode)	(((tcode) &amp; 12) != 4)</div><div class='del'>-#define TCODE_HAS_RESPONSE_DATA(tcode)	(((tcode) &amp; 12) != 0)</div><div class='add'>+static inline bool tcode_is_read_request(unsigned int tcode)</div><div class='add'>+{</div><div class='add'>+	return (tcode &amp; ~1u) == 4u;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool tcode_is_block_packet(unsigned int tcode)</div><div class='add'>+{</div><div class='add'>+	return (tcode &amp; 1u) != 0u;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool tcode_is_link_internal(unsigned int tcode)</div><div class='add'>+{</div><div class='add'>+	return (tcode == TCODE_LINK_INTERNAL);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define LOCAL_BUS 0xffc0</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firewire/nosy.c b/drivers/firewire/nosy.c<br/>index b0d671db178a..ea31ac7ac1ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/nosy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/nosy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/nosy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/nosy.c</a></div><div class='hunk'>@@ -148,10 +148,12 @@ packet_buffer_get(struct client *client, char __user *data, size_t user_length)</div><div class='ctx'> 	if (atomic_read(&amp;buffer-&gt;size) == 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	/* FIXME: Check length &lt;= user_length. */</div><div class='add'>+	length = buffer-&gt;head-&gt;length;</div><div class='add'>+</div><div class='add'>+	if (length &gt; user_length)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	end = buffer-&gt;data + buffer-&gt;capacity;</div><div class='del'>-	length = buffer-&gt;head-&gt;length;</div><div class='ctx'> </div><div class='ctx'> 	if (&amp;buffer-&gt;head-&gt;data[length] &lt; end) {</div><div class='ctx'> 		if (copy_to_user(data, buffer-&gt;head-&gt;data, length))</div><div class='head'>diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c<br/>index 38d19410a2be..f6de0b3a9a55 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/ohci.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/ohci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/ohci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/ohci.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "ohci.h"</div><div class='add'>+#include "packet-header-definitions.h"</div><div class='ctx'> </div><div class='ctx'> #define ohci_info(ohci, f, args...)	dev_info(ohci-&gt;card.device, f, ##args)</div><div class='ctx'> #define ohci_notice(ohci, f, args...)	dev_notice(ohci-&gt;card.device, f, ##args)</div><div class='hunk'>@@ -393,7 +394,6 @@ MODULE_PARM_DESC(quirks, "Chip quirks (default = 0"</div><div class='ctx'> #define OHCI_PARAM_DEBUG_AT_AR		1</div><div class='ctx'> #define OHCI_PARAM_DEBUG_SELFIDS	2</div><div class='ctx'> #define OHCI_PARAM_DEBUG_IRQS		4</div><div class='del'>-#define OHCI_PARAM_DEBUG_BUSRESETS	8 /* only effective before chip init */</div><div class='ctx'> </div><div class='ctx'> static int param_debug;</div><div class='ctx'> module_param_named(debug, param_debug, int, 0644);</div><div class='hunk'>@@ -401,7 +401,6 @@ MODULE_PARM_DESC(debug, "Verbose logging (default = 0"</div><div class='ctx'> 	", AT/AR events = "	__stringify(OHCI_PARAM_DEBUG_AT_AR)</div><div class='ctx'> 	", self-IDs = "		__stringify(OHCI_PARAM_DEBUG_SELFIDS)</div><div class='ctx'> 	", IRQs = "		__stringify(OHCI_PARAM_DEBUG_IRQS)</div><div class='del'>-	", busReset events = "	__stringify(OHCI_PARAM_DEBUG_BUSRESETS)</div><div class='ctx'> 	", or a combination, or all = -1)");</div><div class='ctx'> </div><div class='ctx'> static bool param_remote_dma;</div><div class='hunk'>@@ -410,12 +409,7 @@ MODULE_PARM_DESC(remote_dma, "Enable unfiltered remote DMA (default = N)");</div><div class='ctx'> </div><div class='ctx'> static void log_irqs(struct fw_ohci *ohci, u32 evt)</div><div class='ctx'> {</div><div class='del'>-	if (likely(!(param_debug &amp;</div><div class='del'>-			(OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS))))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!(param_debug &amp; OHCI_PARAM_DEBUG_IRQS) &amp;&amp;</div><div class='del'>-	    !(evt &amp; OHCI1394_busReset))</div><div class='add'>+	if (likely(!(param_debug &amp; OHCI_PARAM_DEBUG_IRQS)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ohci_notice(ohci, "IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt,</div><div class='hunk'>@@ -516,14 +510,14 @@ static const char *tcodes[] = {</div><div class='ctx'> static void log_ar_at_event(struct fw_ohci *ohci,</div><div class='ctx'> 			    char dir, int speed, u32 *header, int evt)</div><div class='ctx'> {</div><div class='del'>-	int tcode = header[0] &gt;&gt; 4 &amp; 0xf;</div><div class='add'>+	int tcode = async_header_get_tcode(header);</div><div class='ctx'> 	char specific[12];</div><div class='ctx'> </div><div class='ctx'> 	if (likely(!(param_debug &amp; OHCI_PARAM_DEBUG_AT_AR)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(evt &gt;= ARRAY_SIZE(evts)))</div><div class='del'>-			evt = 0x1f;</div><div class='add'>+		evt = 0x1f;</div><div class='ctx'> </div><div class='ctx'> 	if (evt == OHCI1394_evt_bus_reset) {</div><div class='ctx'> 		ohci_notice(ohci, "A%c evt_bus_reset, generation %d\n",</div><div class='hunk'>@@ -532,20 +526,27 @@ static void log_ar_at_event(struct fw_ohci *ohci,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (tcode) {</div><div class='del'>-	case 0x0: case 0x6: case 0x8:</div><div class='add'>+	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='add'>+	case TCODE_READ_QUADLET_RESPONSE:</div><div class='add'>+	case TCODE_CYCLE_START:</div><div class='ctx'> 		snprintf(specific, sizeof(specific), " = %08x",</div><div class='ctx'> 			 be32_to_cpu((__force __be32)header[3]));</div><div class='ctx'> 		break;</div><div class='del'>-	case 0x1: case 0x5: case 0x7: case 0x9: case 0xb:</div><div class='add'>+	case TCODE_WRITE_BLOCK_REQUEST:</div><div class='add'>+	case TCODE_READ_BLOCK_REQUEST:</div><div class='add'>+	case TCODE_READ_BLOCK_RESPONSE:</div><div class='add'>+	case TCODE_LOCK_REQUEST:</div><div class='add'>+	case TCODE_LOCK_RESPONSE:</div><div class='ctx'> 		snprintf(specific, sizeof(specific), " %x,%x",</div><div class='del'>-			 header[3] &gt;&gt; 16, header[3] &amp; 0xffff);</div><div class='add'>+			 async_header_get_data_length(header),</div><div class='add'>+			 async_header_get_extended_tcode(header));</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		specific[0] = '\0';</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (tcode) {</div><div class='del'>-	case 0xa:</div><div class='add'>+	case TCODE_STREAM_DATA:</div><div class='ctx'> 		ohci_notice(ohci, "A%c %s, %s\n",</div><div class='ctx'> 			    dir, evts[evt], tcodes[tcode]);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -553,19 +554,23 @@ static void log_ar_at_event(struct fw_ohci *ohci,</div><div class='ctx'> 		ohci_notice(ohci, "A%c %s, PHY %08x %08x\n",</div><div class='ctx'> 			    dir, evts[evt], header[1], header[2]);</div><div class='ctx'> 		break;</div><div class='del'>-	case 0x0: case 0x1: case 0x4: case 0x5: case 0x9:</div><div class='add'>+	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='add'>+	case TCODE_WRITE_BLOCK_REQUEST:</div><div class='add'>+	case TCODE_READ_QUADLET_REQUEST:</div><div class='add'>+	case TCODE_READ_BLOCK_REQUEST:</div><div class='add'>+	case TCODE_LOCK_REQUEST:</div><div class='ctx'> 		ohci_notice(ohci,</div><div class='del'>-			    "A%c spd %x tl %02x, %04x -&gt; %04x, %s, %s, %04x%08x%s\n",</div><div class='del'>-			    dir, speed, header[0] &gt;&gt; 10 &amp; 0x3f,</div><div class='del'>-			    header[1] &gt;&gt; 16, header[0] &gt;&gt; 16, evts[evt],</div><div class='del'>-			    tcodes[tcode], header[1] &amp; 0xffff, header[2], specific);</div><div class='add'>+			    "A%c spd %x tl %02x, %04x -&gt; %04x, %s, %s, %012llx%s\n",</div><div class='add'>+			    dir, speed, async_header_get_tlabel(header),</div><div class='add'>+			    async_header_get_source(header), async_header_get_destination(header),</div><div class='add'>+			    evts[evt], tcodes[tcode], async_header_get_offset(header), specific);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ohci_notice(ohci,</div><div class='ctx'> 			    "A%c spd %x tl %02x, %04x -&gt; %04x, %s, %s%s\n",</div><div class='del'>-			    dir, speed, header[0] &gt;&gt; 10 &amp; 0x3f,</div><div class='del'>-			    header[1] &gt;&gt; 16, header[0] &gt;&gt; 16, evts[evt],</div><div class='del'>-			    tcodes[tcode], specific);</div><div class='add'>+			    dir, speed, async_header_get_tlabel(header),</div><div class='add'>+			    async_header_get_source(header), async_header_get_destination(header),</div><div class='add'>+			    evts[evt], tcodes[tcode], specific);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -853,7 +858,7 @@ static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer)</div><div class='ctx'> 	p.header[1] = cond_le32_to_cpu(buffer[1]);</div><div class='ctx'> 	p.header[2] = cond_le32_to_cpu(buffer[2]);</div><div class='ctx'> </div><div class='del'>-	tcode = (p.header[0] &gt;&gt; 4) &amp; 0x0f;</div><div class='add'>+	tcode = async_header_get_tcode(p.header);</div><div class='ctx'> 	switch (tcode) {</div><div class='ctx'> 	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='ctx'> 	case TCODE_READ_QUADLET_RESPONSE:</div><div class='hunk'>@@ -874,7 +879,7 @@ static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer)</div><div class='ctx'> 	case TCODE_LOCK_RESPONSE:</div><div class='ctx'> 		p.header[3] = cond_le32_to_cpu(buffer[3]);</div><div class='ctx'> 		p.header_length = 16;</div><div class='del'>-		p.payload_length = p.header[3] &gt;&gt; 16;</div><div class='add'>+		p.payload_length = async_header_get_data_length(p.header);</div><div class='ctx'> 		if (p.payload_length &gt; MAX_ASYNC_PAYLOAD) {</div><div class='ctx'> 			ar_context_abort(ctx, "invalid packet length");</div><div class='ctx'> 			return NULL;</div><div class='hunk'>@@ -911,8 +916,7 @@ static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer)</div><div class='ctx'> 	 * Several controllers, notably from NEC and VIA, forget to</div><div class='ctx'> 	 * write ack_complete status at PHY packet reception.</div><div class='ctx'> 	 */</div><div class='del'>-	if (evt == OHCI1394_evt_no_status &amp;&amp;</div><div class='del'>-	    (p.header[0] &amp; 0xff) == (OHCI1394_phy_tcode &lt;&lt; 4))</div><div class='add'>+	if (evt == OHCI1394_evt_no_status &amp;&amp; tcode == OHCI1394_phy_tcode)</div><div class='ctx'> 		p.ack = ACK_COMPLETE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1353,7 +1357,7 @@ static int at_context_queue_packet(struct context *ctx,</div><div class='ctx'> 	 * accordingly.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	tcode = (packet-&gt;header[0] &gt;&gt; 4) &amp; 0x0f;</div><div class='add'>+	tcode = async_header_get_tcode(packet-&gt;header);</div><div class='ctx'> 	header = (__le32 *) &amp;d[1];</div><div class='ctx'> 	switch (tcode) {</div><div class='ctx'> 	case TCODE_WRITE_QUADLET_REQUEST:</div><div class='hunk'>@@ -1371,7 +1375,7 @@ static int at_context_queue_packet(struct context *ctx,</div><div class='ctx'> 					(packet-&gt;header[0] &amp; 0xffff0000));</div><div class='ctx'> 		header[2] = cpu_to_le32(packet-&gt;header[2]);</div><div class='ctx'> </div><div class='del'>-		if (TCODE_IS_BLOCK_PACKET(tcode))</div><div class='add'>+		if (tcode_is_block_packet(tcode))</div><div class='ctx'> 			header[3] = cpu_to_le32(packet-&gt;header[3]);</div><div class='ctx'> 		else</div><div class='ctx'> 			header[3] = (__force __le32) packet-&gt;header[3];</div><div class='hunk'>@@ -1550,11 +1554,7 @@ static int handle_at_packet(struct context *context,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define HEADER_GET_DESTINATION(q)	(((q) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_TCODE(q)		(((q) &gt;&gt; 4) &amp; 0x0f)</div><div class='del'>-#define HEADER_GET_OFFSET_HIGH(q)	(((q) &gt;&gt; 0) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_DATA_LENGTH(q)	(((q) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define HEADER_GET_EXTENDED_TCODE(q)	(((q) &gt;&gt; 0) &amp; 0xffff)</div><div class='add'>+static u32 get_cycle_time(struct fw_ohci *ohci);</div><div class='ctx'> </div><div class='ctx'> static void handle_local_rom(struct fw_ohci *ohci,</div><div class='ctx'> 			     struct fw_packet *packet, u32 csr)</div><div class='hunk'>@@ -1562,9 +1562,9 @@ static void handle_local_rom(struct fw_ohci *ohci,</div><div class='ctx'> 	struct fw_packet response;</div><div class='ctx'> 	int tcode, length, i;</div><div class='ctx'> </div><div class='del'>-	tcode = HEADER_GET_TCODE(packet-&gt;header[0]);</div><div class='del'>-	if (TCODE_IS_BLOCK_PACKET(tcode))</div><div class='del'>-		length = HEADER_GET_DATA_LENGTH(packet-&gt;header[3]);</div><div class='add'>+	tcode = async_header_get_tcode(packet-&gt;header);</div><div class='add'>+	if (tcode_is_block_packet(tcode))</div><div class='add'>+		length = async_header_get_data_length(packet-&gt;header);</div><div class='ctx'> 	else</div><div class='ctx'> 		length = 4;</div><div class='ctx'> </div><div class='hunk'>@@ -1572,7 +1572,7 @@ static void handle_local_rom(struct fw_ohci *ohci,</div><div class='ctx'> 	if (i + length &gt; CONFIG_ROM_SIZE) {</div><div class='ctx'> 		fw_fill_response(&amp;response, packet-&gt;header,</div><div class='ctx'> 				 RCODE_ADDRESS_ERROR, NULL, 0);</div><div class='del'>-	} else if (!TCODE_IS_READ_REQUEST(tcode)) {</div><div class='add'>+	} else if (!tcode_is_read_request(tcode)) {</div><div class='ctx'> 		fw_fill_response(&amp;response, packet-&gt;header,</div><div class='ctx'> 				 RCODE_TYPE_ERROR, NULL, 0);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1580,6 +1580,8 @@ static void handle_local_rom(struct fw_ohci *ohci,</div><div class='ctx'> 				 (void *) ohci-&gt;config_rom + i, length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	// Timestamping on behalf of the hardware.</div><div class='add'>+	response.timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci));</div><div class='ctx'> 	fw_core_handle_response(&amp;ohci-&gt;card, &amp;response);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1591,10 +1593,10 @@ static void handle_local_lock(struct fw_ohci *ohci,</div><div class='ctx'> 	__be32 *payload, lock_old;</div><div class='ctx'> 	u32 lock_arg, lock_data;</div><div class='ctx'> </div><div class='del'>-	tcode = HEADER_GET_TCODE(packet-&gt;header[0]);</div><div class='del'>-	length = HEADER_GET_DATA_LENGTH(packet-&gt;header[3]);</div><div class='add'>+	tcode = async_header_get_tcode(packet-&gt;header);</div><div class='add'>+	length = async_header_get_data_length(packet-&gt;header);</div><div class='ctx'> 	payload = packet-&gt;payload;</div><div class='del'>-	ext_tcode = HEADER_GET_EXTENDED_TCODE(packet-&gt;header[3]);</div><div class='add'>+	ext_tcode = async_header_get_extended_tcode(packet-&gt;header);</div><div class='ctx'> </div><div class='ctx'> 	if (tcode == TCODE_LOCK_REQUEST &amp;&amp;</div><div class='ctx'> 	    ext_tcode == EXTCODE_COMPARE_SWAP &amp;&amp; length == 8) {</div><div class='hunk'>@@ -1628,6 +1630,8 @@ static void handle_local_lock(struct fw_ohci *ohci,</div><div class='ctx'> 	fw_fill_response(&amp;response, packet-&gt;header, RCODE_BUSY, NULL, 0);</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='add'>+	// Timestamping on behalf of the hardware.</div><div class='add'>+	response.timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci));</div><div class='ctx'> 	fw_core_handle_response(&amp;ohci-&gt;card, &amp;response);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1640,10 +1644,7 @@ static void handle_local_request(struct context *ctx, struct fw_packet *packet)</div><div class='ctx'> 		packet-&gt;callback(packet, &amp;ctx-&gt;ohci-&gt;card, packet-&gt;ack);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	offset =</div><div class='del'>-		((unsigned long long)</div><div class='del'>-		 HEADER_GET_OFFSET_HIGH(packet-&gt;header[1]) &lt;&lt; 32) |</div><div class='del'>-		packet-&gt;header[2];</div><div class='add'>+	offset = async_header_get_offset(packet-&gt;header);</div><div class='ctx'> 	csr = offset - CSR_REGISTER_BASE;</div><div class='ctx'> </div><div class='ctx'> 	/* Handle config rom reads. */</div><div class='hunk'>@@ -1670,8 +1671,6 @@ static void handle_local_request(struct context *ctx, struct fw_packet *packet)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 get_cycle_time(struct fw_ohci *ohci);</div><div class='del'>-</div><div class='ctx'> static void at_context_transmit(struct context *ctx, struct fw_packet *packet)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1679,7 +1678,7 @@ static void at_context_transmit(struct context *ctx, struct fw_packet *packet)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ctx-&gt;ohci-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (HEADER_GET_DESTINATION(packet-&gt;header[0]) == ctx-&gt;ohci-&gt;node_id &amp;&amp;</div><div class='add'>+	if (async_header_get_destination(packet-&gt;header) == ctx-&gt;ohci-&gt;node_id &amp;&amp;</div><div class='ctx'> 	    ctx-&gt;ohci-&gt;generation == packet-&gt;generation) {</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ctx-&gt;ohci-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -2060,8 +2059,7 @@ static void bus_reset_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	ohci-&gt;generation = generation;</div><div class='ctx'> 	reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset);</div><div class='del'>-	if (param_debug &amp; OHCI_PARAM_DEBUG_BUSRESETS)</div><div class='del'>-		reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset);</div><div class='add'>+	reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset);</div><div class='ctx'> </div><div class='ctx'> 	if (ohci-&gt;quirks &amp; QUIRK_RESET_PACKET)</div><div class='ctx'> 		ohci-&gt;request_generation = generation;</div><div class='hunk'>@@ -2133,6 +2131,7 @@ static irqreturn_t irq_handler(int irq, void *data)</div><div class='ctx'> 	reg_write(ohci, OHCI1394_IntEventClear,</div><div class='ctx'> 		  event &amp; ~(OHCI1394_busReset | OHCI1394_postedWriteErr));</div><div class='ctx'> 	log_irqs(ohci, event);</div><div class='add'>+	// The flag is masked again at bus_reset_work() scheduled by selfID event.</div><div class='ctx'> 	if (event &amp; OHCI1394_busReset)</div><div class='ctx'> 		reg_write(ohci, OHCI1394_IntMaskClear, OHCI1394_busReset);</div><div class='ctx'> </div><div class='hunk'>@@ -2472,9 +2471,8 @@ static int ohci_enable(struct fw_card *card,</div><div class='ctx'> 		OHCI1394_cycleInconsistent |</div><div class='ctx'> 		OHCI1394_unrecoverableError |</div><div class='ctx'> 		OHCI1394_cycleTooLong |</div><div class='del'>-		OHCI1394_masterIntEnable;</div><div class='del'>-	if (param_debug &amp; OHCI_PARAM_DEBUG_BUSRESETS)</div><div class='del'>-		irqs |= OHCI1394_busReset;</div><div class='add'>+		OHCI1394_masterIntEnable |</div><div class='add'>+		OHCI1394_busReset;</div><div class='ctx'> 	reg_write(ohci, OHCI1394_IntMaskSet, irqs);</div><div class='ctx'> </div><div class='ctx'> 	reg_write(ohci, OHCI1394_HCControlSet,</div><div class='hunk'>@@ -3627,7 +3625,7 @@ static int pci_probe(struct pci_dev *dev,</div><div class='ctx'> 	struct fw_ohci *ohci;</div><div class='ctx'> 	u32 bus_options, max_receive, link_speed, version;</div><div class='ctx'> 	u64 guid;</div><div class='del'>-	int i, err;</div><div class='add'>+	int i, flags, irq, err;</div><div class='ctx'> 	size_t size;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;vendor == PCI_VENDOR_ID_PINNACLE_SYSTEMS) {</div><div class='hunk'>@@ -3752,18 +3750,29 @@ static int pci_probe(struct pci_dev *dev,</div><div class='ctx'> 	guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) &lt;&lt; 32) |</div><div class='ctx'> 		reg_read(ohci, OHCI1394_GUIDLo);</div><div class='ctx'> </div><div class='add'>+	flags = PCI_IRQ_INTX;</div><div class='ctx'> 	if (!(ohci-&gt;quirks &amp; QUIRK_NO_MSI))</div><div class='del'>-		pci_enable_msi(dev);</div><div class='del'>-	err = devm_request_irq(&amp;dev-&gt;dev, dev-&gt;irq, irq_handler,</div><div class='del'>-			       pci_dev_msi_enabled(dev) ? 0 : IRQF_SHARED, ohci_driver_name, ohci);</div><div class='add'>+		flags |= PCI_IRQ_MSI;</div><div class='add'>+	err = pci_alloc_irq_vectors(dev, 1, 1, flags);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+	irq = pci_irq_vector(dev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		err = irq;</div><div class='add'>+		goto fail_msi;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(irq, irq_handler, NULL,</div><div class='add'>+				   pci_dev_msi_enabled(dev) ? 0 : IRQF_SHARED, ohci_driver_name,</div><div class='add'>+				   ohci);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='del'>-		ohci_err(ohci, "failed to allocate interrupt %d\n", dev-&gt;irq);</div><div class='add'>+		ohci_err(ohci, "failed to allocate interrupt %d\n", irq);</div><div class='ctx'> 		goto fail_msi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = fw_card_add(&amp;ohci-&gt;card, max_receive, link_speed, guid);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto fail_msi;</div><div class='add'>+		goto fail_irq;</div><div class='ctx'> </div><div class='ctx'> 	version = reg_read(ohci, OHCI1394_Version) &amp; 0x00ff00ff;</div><div class='ctx'> 	ohci_notice(ohci,</div><div class='hunk'>@@ -3776,9 +3785,10 @@ static int pci_probe(struct pci_dev *dev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+ fail_irq:</div><div class='add'>+	free_irq(irq, ohci);</div><div class='ctx'>  fail_msi:</div><div class='del'>-	devm_free_irq(&amp;dev-&gt;dev, dev-&gt;irq, ohci);</div><div class='del'>-	pci_disable_msi(dev);</div><div class='add'>+	pci_free_irq_vectors(dev);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -3786,6 +3796,7 @@ static int pci_probe(struct pci_dev *dev,</div><div class='ctx'> static void pci_remove(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_ohci *ohci = pci_get_drvdata(dev);</div><div class='add'>+	int irq;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the removal is happening from the suspend state, LPS won't be</div><div class='hunk'>@@ -3805,8 +3816,10 @@ static void pci_remove(struct pci_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	software_reset(ohci);</div><div class='ctx'> </div><div class='del'>-	devm_free_irq(&amp;dev-&gt;dev, dev-&gt;irq, ohci);</div><div class='del'>-	pci_disable_msi(dev);</div><div class='add'>+	irq = pci_irq_vector(dev, 0);</div><div class='add'>+	if (irq &gt;= 0)</div><div class='add'>+		free_irq(irq, ohci);</div><div class='add'>+	pci_free_irq_vectors(dev);</div><div class='ctx'> </div><div class='ctx'> 	dev_notice(&amp;dev-&gt;dev, "removing fw-ohci device\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/firewire/packet-header-definitions.h b/drivers/firewire/packet-header-definitions.h<br/>new file mode 100644<br/>index 000000000000..ab9d0fa790d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/packet-header-definitions.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/packet-header-definitions.h</a></div><div class='hunk'>@@ -0,0 +1,234 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+//</div><div class='add'>+// packet-header-definitions.h - The definitions of header fields for IEEE 1394 packet.</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2024 Takashi Sakamoto</div><div class='add'>+</div><div class='add'>+#ifndef _FIREWIRE_PACKET_HEADER_DEFINITIONS_H</div><div class='add'>+#define _FIREWIRE_PACKET_HEADER_DEFINITIONS_H</div><div class='add'>+</div><div class='add'>+#define ASYNC_HEADER_QUADLET_COUNT		4</div><div class='add'>+</div><div class='add'>+#define ASYNC_HEADER_Q0_DESTINATION_SHIFT	16</div><div class='add'>+#define ASYNC_HEADER_Q0_DESTINATION_MASK	0xffff0000</div><div class='add'>+#define ASYNC_HEADER_Q0_TLABEL_SHIFT		10</div><div class='add'>+#define ASYNC_HEADER_Q0_TLABEL_MASK		0x0000fc00</div><div class='add'>+#define ASYNC_HEADER_Q0_RETRY_SHIFT		8</div><div class='add'>+#define ASYNC_HEADER_Q0_RETRY_MASK		0x00000300</div><div class='add'>+#define ASYNC_HEADER_Q0_TCODE_SHIFT		4</div><div class='add'>+#define ASYNC_HEADER_Q0_TCODE_MASK		0x000000f0</div><div class='add'>+#define ASYNC_HEADER_Q0_PRIORITY_SHIFT		0</div><div class='add'>+#define ASYNC_HEADER_Q0_PRIORITY_MASK		0x0000000f</div><div class='add'>+#define ASYNC_HEADER_Q1_SOURCE_SHIFT		16</div><div class='add'>+#define ASYNC_HEADER_Q1_SOURCE_MASK		0xffff0000</div><div class='add'>+#define ASYNC_HEADER_Q1_RCODE_SHIFT		12</div><div class='add'>+#define ASYNC_HEADER_Q1_RCODE_MASK		0x0000f000</div><div class='add'>+#define ASYNC_HEADER_Q1_RCODE_SHIFT		12</div><div class='add'>+#define ASYNC_HEADER_Q1_RCODE_MASK		0x0000f000</div><div class='add'>+#define ASYNC_HEADER_Q1_OFFSET_HIGH_SHIFT	0</div><div class='add'>+#define ASYNC_HEADER_Q1_OFFSET_HIGH_MASK	0x0000ffff</div><div class='add'>+#define ASYNC_HEADER_Q3_DATA_LENGTH_SHIFT	16</div><div class='add'>+#define ASYNC_HEADER_Q3_DATA_LENGTH_MASK	0xffff0000</div><div class='add'>+#define ASYNC_HEADER_Q3_EXTENDED_TCODE_SHIFT	0</div><div class='add'>+#define ASYNC_HEADER_Q3_EXTENDED_TCODE_MASK	0x0000ffff</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_destination(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[0] &amp; ASYNC_HEADER_Q0_DESTINATION_MASK) &gt;&gt; ASYNC_HEADER_Q0_DESTINATION_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_tlabel(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[0] &amp; ASYNC_HEADER_Q0_TLABEL_MASK) &gt;&gt; ASYNC_HEADER_Q0_TLABEL_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_retry(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[0] &amp; ASYNC_HEADER_Q0_RETRY_MASK) &gt;&gt; ASYNC_HEADER_Q0_RETRY_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_tcode(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[0] &amp; ASYNC_HEADER_Q0_TCODE_MASK) &gt;&gt; ASYNC_HEADER_Q0_TCODE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_priority(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[0] &amp; ASYNC_HEADER_Q0_PRIORITY_MASK) &gt;&gt; ASYNC_HEADER_Q0_PRIORITY_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_source(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[1] &amp; ASYNC_HEADER_Q1_SOURCE_MASK) &gt;&gt; ASYNC_HEADER_Q1_SOURCE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_rcode(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[1] &amp; ASYNC_HEADER_Q1_RCODE_MASK) &gt;&gt; ASYNC_HEADER_Q1_RCODE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 async_header_get_offset(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	u32 hi = (header[1] &amp; ASYNC_HEADER_Q1_OFFSET_HIGH_MASK) &gt;&gt; ASYNC_HEADER_Q1_OFFSET_HIGH_SHIFT;</div><div class='add'>+	return (((u64)hi) &lt;&lt; 32) | ((u64)header[2]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 async_header_get_quadlet_data(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return header[3];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_data_length(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[3] &amp; ASYNC_HEADER_Q3_DATA_LENGTH_MASK) &gt;&gt; ASYNC_HEADER_Q3_DATA_LENGTH_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int async_header_get_extended_tcode(const u32 header[ASYNC_HEADER_QUADLET_COUNT])</div><div class='add'>+{</div><div class='add'>+	return (header[3] &amp; ASYNC_HEADER_Q3_EXTENDED_TCODE_MASK) &gt;&gt; ASYNC_HEADER_Q3_EXTENDED_TCODE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_destination(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						unsigned int destination)</div><div class='add'>+{</div><div class='add'>+	header[0] &amp;= ~ASYNC_HEADER_Q0_DESTINATION_MASK;</div><div class='add'>+	header[0] |= (((u32)destination) &lt;&lt; ASYNC_HEADER_Q0_DESTINATION_SHIFT) &amp; ASYNC_HEADER_Q0_DESTINATION_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_tlabel(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					   unsigned int tlabel)</div><div class='add'>+{</div><div class='add'>+	header[0] &amp;= ~ASYNC_HEADER_Q0_TLABEL_MASK;</div><div class='add'>+	header[0] |= (((u32)tlabel) &lt;&lt; ASYNC_HEADER_Q0_TLABEL_SHIFT) &amp; ASYNC_HEADER_Q0_TLABEL_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_retry(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					  unsigned int retry)</div><div class='add'>+{</div><div class='add'>+	header[0] &amp;= ~ASYNC_HEADER_Q0_RETRY_MASK;</div><div class='add'>+	header[0] |= (((u32)retry) &lt;&lt; ASYNC_HEADER_Q0_RETRY_SHIFT) &amp; ASYNC_HEADER_Q0_RETRY_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_tcode(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					  unsigned int tcode)</div><div class='add'>+{</div><div class='add'>+	header[0] &amp;= ~ASYNC_HEADER_Q0_TCODE_MASK;</div><div class='add'>+	header[0] |= (((u32)tcode) &lt;&lt; ASYNC_HEADER_Q0_TCODE_SHIFT) &amp; ASYNC_HEADER_Q0_TCODE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_priority(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					     unsigned int priority)</div><div class='add'>+{</div><div class='add'>+	header[0] &amp;= ~ASYNC_HEADER_Q0_PRIORITY_MASK;</div><div class='add'>+	header[0] |= (((u32)priority) &lt;&lt; ASYNC_HEADER_Q0_PRIORITY_SHIFT) &amp; ASYNC_HEADER_Q0_PRIORITY_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_source(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					   unsigned int source)</div><div class='add'>+{</div><div class='add'>+	header[1] &amp;= ~ASYNC_HEADER_Q1_SOURCE_MASK;</div><div class='add'>+	header[1] |= (((u32)source) &lt;&lt; ASYNC_HEADER_Q1_SOURCE_SHIFT) &amp; ASYNC_HEADER_Q1_SOURCE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_rcode(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					  unsigned int rcode)</div><div class='add'>+{</div><div class='add'>+	header[1] &amp;= ~ASYNC_HEADER_Q1_RCODE_MASK;</div><div class='add'>+	header[1] |= (((u32)rcode) &lt;&lt; ASYNC_HEADER_Q1_RCODE_SHIFT) &amp; ASYNC_HEADER_Q1_RCODE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_offset(u32 header[ASYNC_HEADER_QUADLET_COUNT], u64 offset)</div><div class='add'>+{</div><div class='add'>+	u32 hi = (u32)(offset &gt;&gt; 32);</div><div class='add'>+	header[1] &amp;= ~ASYNC_HEADER_Q1_OFFSET_HIGH_MASK;</div><div class='add'>+	header[1] |= (hi &lt;&lt; ASYNC_HEADER_Q1_OFFSET_HIGH_SHIFT) &amp; ASYNC_HEADER_Q1_OFFSET_HIGH_MASK;</div><div class='add'>+	header[2] = (u32)(offset &amp; 0x00000000ffffffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_quadlet_data(u32 header[ASYNC_HEADER_QUADLET_COUNT], u32 quadlet_data)</div><div class='add'>+{</div><div class='add'>+	header[3] = quadlet_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_data_length(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						unsigned int data_length)</div><div class='add'>+{</div><div class='add'>+	header[3] &amp;= ~ASYNC_HEADER_Q3_DATA_LENGTH_MASK;</div><div class='add'>+	header[3] |= (((u32)data_length) &lt;&lt; ASYNC_HEADER_Q3_DATA_LENGTH_SHIFT) &amp; ASYNC_HEADER_Q3_DATA_LENGTH_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void async_header_set_extended_tcode(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						   unsigned int extended_tcode)</div><div class='add'>+{</div><div class='add'>+	header[3] &amp;= ~ASYNC_HEADER_Q3_EXTENDED_TCODE_MASK;</div><div class='add'>+	header[3] |= (((u32)extended_tcode) &lt;&lt; ASYNC_HEADER_Q3_EXTENDED_TCODE_SHIFT) &amp; ASYNC_HEADER_Q3_EXTENDED_TCODE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ISOC_HEADER_DATA_LENGTH_SHIFT		16</div><div class='add'>+#define ISOC_HEADER_DATA_LENGTH_MASK		0xffff0000</div><div class='add'>+#define ISOC_HEADER_TAG_SHIFT			14</div><div class='add'>+#define ISOC_HEADER_TAG_MASK			0x0000c000</div><div class='add'>+#define ISOC_HEADER_CHANNEL_SHIFT		8</div><div class='add'>+#define ISOC_HEADER_CHANNEL_MASK		0x00003f00</div><div class='add'>+#define ISOC_HEADER_TCODE_SHIFT			4</div><div class='add'>+#define ISOC_HEADER_TCODE_MASK			0x000000f0</div><div class='add'>+#define ISOC_HEADER_SY_SHIFT			0</div><div class='add'>+#define ISOC_HEADER_SY_MASK			0x0000000f</div><div class='add'>+</div><div class='add'>+static inline unsigned int isoc_header_get_data_length(u32 header)</div><div class='add'>+{</div><div class='add'>+	return (header &amp; ISOC_HEADER_DATA_LENGTH_MASK) &gt;&gt; ISOC_HEADER_DATA_LENGTH_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int isoc_header_get_tag(u32 header)</div><div class='add'>+{</div><div class='add'>+	return (header &amp; ISOC_HEADER_TAG_MASK) &gt;&gt; ISOC_HEADER_TAG_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int isoc_header_get_channel(u32 header)</div><div class='add'>+{</div><div class='add'>+	return (header &amp; ISOC_HEADER_CHANNEL_MASK) &gt;&gt; ISOC_HEADER_CHANNEL_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int isoc_header_get_tcode(u32 header)</div><div class='add'>+{</div><div class='add'>+	return (header &amp; ISOC_HEADER_TCODE_MASK) &gt;&gt; ISOC_HEADER_TCODE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int isoc_header_get_sy(u32 header)</div><div class='add'>+{</div><div class='add'>+	return (header &amp; ISOC_HEADER_SY_MASK) &gt;&gt; ISOC_HEADER_SY_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void isoc_header_set_data_length(u32 *header, unsigned int data_length)</div><div class='add'>+{</div><div class='add'>+	*header &amp;= ~ISOC_HEADER_DATA_LENGTH_MASK;</div><div class='add'>+	*header |= (((u32)data_length) &lt;&lt; ISOC_HEADER_DATA_LENGTH_SHIFT) &amp; ISOC_HEADER_DATA_LENGTH_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void isoc_header_set_tag(u32 *header, unsigned int tag)</div><div class='add'>+{</div><div class='add'>+	*header &amp;= ~ISOC_HEADER_TAG_MASK;</div><div class='add'>+	*header |= (((u32)tag) &lt;&lt; ISOC_HEADER_TAG_SHIFT) &amp; ISOC_HEADER_TAG_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void isoc_header_set_channel(u32 *header, unsigned int channel)</div><div class='add'>+{</div><div class='add'>+	*header &amp;= ~ISOC_HEADER_CHANNEL_MASK;</div><div class='add'>+	*header |= (((u32)channel) &lt;&lt; ISOC_HEADER_CHANNEL_SHIFT) &amp; ISOC_HEADER_CHANNEL_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void isoc_header_set_tcode(u32 *header, unsigned int tcode)</div><div class='add'>+{</div><div class='add'>+	*header &amp;= ~ISOC_HEADER_TCODE_MASK;</div><div class='add'>+	*header |= (((u32)tcode) &lt;&lt; ISOC_HEADER_TCODE_SHIFT) &amp; ISOC_HEADER_TCODE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void isoc_header_set_sy(u32 *header, unsigned int sy)</div><div class='add'>+{</div><div class='add'>+	*header &amp;= ~ISOC_HEADER_SY_MASK;</div><div class='add'>+	*header |= (((u32)sy) &lt;&lt; ISOC_HEADER_SY_SHIFT) &amp; ISOC_HEADER_SY_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif // _FIREWIRE_PACKET_HEADER_DEFINITIONS_H</div><div class='head'>diff --git a/drivers/firewire/packet-serdes-test.c b/drivers/firewire/packet-serdes-test.c<br/>new file mode 100644<br/>index 000000000000..f93c966e794d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/packet-serdes-test.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/packet-serdes-test.c</a></div><div class='hunk'>@@ -0,0 +1,582 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+//</div><div class='add'>+// packet-serdes-test.c - An application of Kunit to check serialization/deserialization of packets</div><div class='add'>+//			  defined by IEEE 1394.</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2024 Takashi Sakamoto</div><div class='add'>+</div><div class='add'>+#include &lt;kunit/test.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/firewire-constants.h&gt;</div><div class='add'>+</div><div class='add'>+#include "packet-header-definitions.h"</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_common(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					  unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+					  unsigned int retry, unsigned int tcode,</div><div class='add'>+					  unsigned int priority, unsigned int src_id)</div><div class='add'>+{</div><div class='add'>+	async_header_set_destination(header, dst_id);</div><div class='add'>+	async_header_set_tlabel(header, tlabel);</div><div class='add'>+	async_header_set_retry(header, retry);</div><div class='add'>+	async_header_set_tcode(header, tcode);</div><div class='add'>+	async_header_set_priority(header, priority);</div><div class='add'>+	async_header_set_source(header, src_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_request(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					   unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+					   unsigned int retry, unsigned int tcode,</div><div class='add'>+					   unsigned int priority, unsigned int src_id, u64 offset)</div><div class='add'>+{</div><div class='add'>+	serialize_async_header_common(header, dst_id, tlabel, retry, tcode, priority, src_id);</div><div class='add'>+	async_header_set_offset(header, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_quadlet_request(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						   unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+						   unsigned int retry, unsigned int tcode,</div><div class='add'>+						   unsigned int priority, unsigned int src_id,</div><div class='add'>+						   u64 offset)</div><div class='add'>+{</div><div class='add'>+	serialize_async_header_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+				       offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_block_request(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						 unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+						 unsigned int retry, unsigned int tcode,</div><div class='add'>+						 unsigned int priority, unsigned int src_id,</div><div class='add'>+						 u64 offset, unsigned int data_length,</div><div class='add'>+						 unsigned int extended_tcode)</div><div class='add'>+{</div><div class='add'>+	serialize_async_header_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+				       offset);</div><div class='add'>+	async_header_set_data_length(header, data_length);</div><div class='add'>+	async_header_set_extended_tcode(header, extended_tcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_response(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					    unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+					    unsigned int retry, unsigned int tcode,</div><div class='add'>+					    unsigned int priority, unsigned int src_id,</div><div class='add'>+					    unsigned int rcode)</div><div class='add'>+{</div><div class='add'>+	serialize_async_header_common(header, dst_id, tlabel, retry, tcode, priority, src_id);</div><div class='add'>+	async_header_set_rcode(header, rcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_quadlet_response(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						    unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+						    unsigned int retry, unsigned int tcode,</div><div class='add'>+						    unsigned int priority, unsigned int src_id,</div><div class='add'>+						    unsigned int rcode)</div><div class='add'>+{</div><div class='add'>+	serialize_async_header_response(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					rcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_async_header_block_response(u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						  unsigned int dst_id, unsigned int tlabel,</div><div class='add'>+						  unsigned int retry, unsigned int tcode,</div><div class='add'>+						  unsigned int priority, unsigned int src_id,</div><div class='add'>+						  unsigned int rcode, unsigned int data_length,</div><div class='add'>+						  unsigned int extended_tcode)</div><div class='add'>+{</div><div class='add'>+	serialize_async_header_response(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					rcode);</div><div class='add'>+	async_header_set_data_length(header, data_length);</div><div class='add'>+	async_header_set_extended_tcode(header, extended_tcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_common(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					    unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+					    unsigned int *retry, unsigned int *tcode,</div><div class='add'>+					    unsigned int *priority, unsigned int *src_id)</div><div class='add'>+{</div><div class='add'>+	*dst_id = async_header_get_destination(header);</div><div class='add'>+	*tlabel = async_header_get_tlabel(header);</div><div class='add'>+	*retry = async_header_get_retry(header);</div><div class='add'>+	*tcode = async_header_get_tcode(header);</div><div class='add'>+	*priority = async_header_get_priority(header);</div><div class='add'>+	*src_id = async_header_get_source(header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_request(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					     unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+					     unsigned int *retry, unsigned int *tcode,</div><div class='add'>+					     unsigned int *priority, unsigned int *src_id,</div><div class='add'>+					     u64 *offset)</div><div class='add'>+{</div><div class='add'>+	deserialize_async_header_common(header, dst_id, tlabel, retry, tcode, priority, src_id);</div><div class='add'>+	*offset = async_header_get_offset(header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_quadlet_request(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						     unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+						     unsigned int *retry, unsigned int *tcode,</div><div class='add'>+						     unsigned int *priority, unsigned int *src_id,</div><div class='add'>+						     u64 *offset)</div><div class='add'>+{</div><div class='add'>+	deserialize_async_header_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					 offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_block_request(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						   unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+						   unsigned int *retry, unsigned int *tcode,</div><div class='add'>+						   unsigned int *priority, unsigned int *src_id,</div><div class='add'>+						   u64 *offset,</div><div class='add'>+						   unsigned int *data_length,</div><div class='add'>+						   unsigned int *extended_tcode)</div><div class='add'>+{</div><div class='add'>+	deserialize_async_header_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					 offset);</div><div class='add'>+	*data_length = async_header_get_data_length(header);</div><div class='add'>+	*extended_tcode = async_header_get_extended_tcode(header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_response(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+					      unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+					      unsigned int *retry, unsigned int *tcode,</div><div class='add'>+					      unsigned int *priority, unsigned int *src_id,</div><div class='add'>+					      unsigned int *rcode)</div><div class='add'>+{</div><div class='add'>+	deserialize_async_header_common(header, dst_id, tlabel, retry, tcode, priority, src_id);</div><div class='add'>+	*rcode = async_header_get_rcode(header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_quadlet_response(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						      unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+						      unsigned int *retry, unsigned int *tcode,</div><div class='add'>+						      unsigned int *priority, unsigned int *src_id,</div><div class='add'>+						      unsigned int *rcode)</div><div class='add'>+{</div><div class='add'>+	deserialize_async_header_response(header, dst_id, tlabel, retry, tcode, priority, src_id, rcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_async_header_block_response(const u32 header[ASYNC_HEADER_QUADLET_COUNT],</div><div class='add'>+						    unsigned int *dst_id, unsigned int *tlabel,</div><div class='add'>+						    unsigned int *retry, unsigned int *tcode,</div><div class='add'>+						    unsigned int *priority, unsigned int *src_id,</div><div class='add'>+						    unsigned int *rcode, unsigned int *data_length,</div><div class='add'>+						    unsigned int *extended_tcode)</div><div class='add'>+{</div><div class='add'>+	deserialize_async_header_response(header, dst_id, tlabel, retry, tcode, priority, src_id, rcode);</div><div class='add'>+	*data_length = async_header_get_data_length(header);</div><div class='add'>+	*extended_tcode = async_header_get_extended_tcode(header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void serialize_isoc_header(u32 *header, unsigned int data_length, unsigned int tag,</div><div class='add'>+				  unsigned int channel, unsigned int tcode, unsigned int sy)</div><div class='add'>+{</div><div class='add'>+	isoc_header_set_data_length(header, data_length);</div><div class='add'>+	isoc_header_set_tag(header, tag);</div><div class='add'>+	isoc_header_set_channel(header, channel);</div><div class='add'>+	isoc_header_set_tcode(header, tcode);</div><div class='add'>+	isoc_header_set_sy(header, sy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deserialize_isoc_header(u32 header, unsigned int *data_length, unsigned int *tag,</div><div class='add'>+				    unsigned int *channel, unsigned int *tcode, unsigned int *sy)</div><div class='add'>+{</div><div class='add'>+	*data_length = isoc_header_get_data_length(header);</div><div class='add'>+	*tag = isoc_header_get_tag(header);</div><div class='add'>+	*channel = isoc_header_get_channel(header);</div><div class='add'>+	*tcode = isoc_header_get_tcode(header);</div><div class='add'>+	*sy = isoc_header_get_sy(header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_write_quadlet_request(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc05100,</div><div class='add'>+		0xffc1ffff,</div><div class='add'>+		0xf0000234,</div><div class='add'>+		0x1f0000c0,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	u64 offset;</div><div class='add'>+	u32 quadlet_data;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_quadlet_request(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+						 &amp;priority, &amp;src_id, &amp;offset);</div><div class='add'>+	quadlet_data = async_header_get_quadlet_data(expected);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x14, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_WRITE_QUADLET_REQUEST, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xfffff0000234, offset);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x1f0000c0, quadlet_data);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_quadlet_request(header, dst_id, tlabel, retry, tcode, priority,</div><div class='add'>+					       src_id, offset);</div><div class='add'>+	async_header_set_quadlet_data(header, quadlet_data);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_write_block_request(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc06510,</div><div class='add'>+		0xffc1ecc0,</div><div class='add'>+		0x00000000,</div><div class='add'>+		0x00180000,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	u64 offset;</div><div class='add'>+	unsigned int data_length;</div><div class='add'>+	unsigned int extended_tcode;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_block_request(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+					       &amp;priority, &amp;src_id, &amp;offset, &amp;data_length,</div><div class='add'>+					       &amp;extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x19, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_WRITE_BLOCK_REQUEST, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xecc000000000, offset);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0018, data_length);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0000, extended_tcode);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_block_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					     offset, data_length, extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_write_response(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc15120,</div><div class='add'>+		0xffc00000,</div><div class='add'>+		0x00000000,</div><div class='add'>+		0x00000000,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	unsigned int rcode;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_quadlet_response(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+						  &amp;priority, &amp;src_id, &amp;rcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x14, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_WRITE_RESPONSE, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, RCODE_COMPLETE, rcode);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_quadlet_response(header, dst_id, tlabel, retry, tcode, priority,</div><div class='add'>+						src_id, rcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected) - sizeof(expected[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_read_quadlet_request(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc0f140,</div><div class='add'>+		0xffc1ffff,</div><div class='add'>+		0xf0000984,</div><div class='add'>+		0x00000000,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	u64 offset;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_quadlet_request(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+						 &amp;priority, &amp;src_id, &amp;offset);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x3c, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_READ_QUADLET_REQUEST, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xfffff0000984, offset);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_quadlet_request(header, dst_id, tlabel, retry, tcode, priority,</div><div class='add'>+					       src_id, offset);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_read_quadlet_response(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc1f160,</div><div class='add'>+		0xffc00000,</div><div class='add'>+		0x00000000,</div><div class='add'>+		0x00000180,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	unsigned int rcode;</div><div class='add'>+	u32 quadlet_data;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_quadlet_response(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+						  &amp;priority, &amp;src_id, &amp;rcode);</div><div class='add'>+	quadlet_data = async_header_get_quadlet_data(expected);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x3c, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_READ_QUADLET_RESPONSE, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, RCODE_COMPLETE, rcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00000180, quadlet_data);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_quadlet_response(header, dst_id, tlabel, retry, tcode, priority,</div><div class='add'>+						src_id, rcode);</div><div class='add'>+	async_header_set_quadlet_data(header, quadlet_data);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_read_block_request(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc0e150,</div><div class='add'>+		0xffc1ffff,</div><div class='add'>+		0xf0000400,</div><div class='add'>+		0x00200000,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	u64 offset;</div><div class='add'>+	unsigned int data_length;</div><div class='add'>+	unsigned int extended_tcode;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_block_request(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+					       &amp;priority, &amp;src_id, &amp;offset, &amp;data_length,</div><div class='add'>+					       &amp;extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x38, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_READ_BLOCK_REQUEST, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xfffff0000400, offset);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0020, data_length);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0000, extended_tcode);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_block_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					     offset, data_length, extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_read_block_response(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc1e170,</div><div class='add'>+		0xffc00000,</div><div class='add'>+		0x00000000,</div><div class='add'>+		0x00200000,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	unsigned int rcode;</div><div class='add'>+	unsigned int data_length;</div><div class='add'>+	unsigned int extended_tcode;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_block_response(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+						&amp;priority, &amp;src_id, &amp;rcode, &amp;data_length,</div><div class='add'>+						&amp;extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x38, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_READ_BLOCK_RESPONSE, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, RCODE_COMPLETE, rcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0020, data_length);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0000, extended_tcode);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_block_response(header, dst_id, tlabel, retry, tcode, priority,</div><div class='add'>+					      src_id, rcode, data_length, extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_lock_request(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc02d90,</div><div class='add'>+		0xffc1ffff,</div><div class='add'>+		0xf0000984,</div><div class='add'>+		0x00080002,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	u64 offset;</div><div class='add'>+	unsigned int data_length;</div><div class='add'>+	unsigned int extended_tcode;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_block_request(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+					       &amp;priority, &amp;src_id, &amp;offset, &amp;data_length,</div><div class='add'>+					       &amp;extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0b, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_LOCK_REQUEST, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xfffff0000984, offset);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0008, data_length);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, EXTCODE_COMPARE_SWAP, extended_tcode);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_block_request(header, dst_id, tlabel, retry, tcode, priority, src_id,</div><div class='add'>+					     offset, data_length, extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_async_header_lock_response(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	static const u32 expected[ASYNC_HEADER_QUADLET_COUNT] = {</div><div class='add'>+		0xffc12db0,</div><div class='add'>+		0xffc00000,</div><div class='add'>+		0x00000000,</div><div class='add'>+		0x00040002,</div><div class='add'>+	};</div><div class='add'>+	u32 header[ASYNC_HEADER_QUADLET_COUNT] = {0, 0, 0, 0};</div><div class='add'>+</div><div class='add'>+	unsigned int dst_id;</div><div class='add'>+	unsigned int tlabel;</div><div class='add'>+	unsigned int retry;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int priority;</div><div class='add'>+	unsigned int src_id;</div><div class='add'>+	unsigned int rcode;</div><div class='add'>+	unsigned int data_length;</div><div class='add'>+	unsigned int extended_tcode;</div><div class='add'>+</div><div class='add'>+	deserialize_async_header_block_response(expected, &amp;dst_id, &amp;tlabel, &amp;retry, &amp;tcode,</div><div class='add'>+						&amp;priority, &amp;src_id, &amp;rcode, &amp;data_length,</div><div class='add'>+						&amp;extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc1, dst_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0b, tlabel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x01, retry);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, TCODE_LOCK_RESPONSE, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x00, priority);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xffc0, src_id);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, RCODE_COMPLETE, rcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0004, data_length);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, EXTCODE_COMPARE_SWAP, extended_tcode);</div><div class='add'>+</div><div class='add'>+	serialize_async_header_block_response(header, dst_id, tlabel, retry, tcode, priority,</div><div class='add'>+					      src_id, rcode, data_length, extended_tcode);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_MEMEQ(test, header, expected, sizeof(expected));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_isoc_header(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	const u32 expected = 0x00d08dec;</div><div class='add'>+	u32 header = 0;</div><div class='add'>+</div><div class='add'>+	unsigned int data_length;</div><div class='add'>+	unsigned int tag;</div><div class='add'>+	unsigned int channel;</div><div class='add'>+	unsigned int tcode;</div><div class='add'>+	unsigned int sy;</div><div class='add'>+</div><div class='add'>+	deserialize_isoc_header(expected, &amp;data_length, &amp;tag, &amp;channel, &amp;tcode, &amp;sy);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0xd0, data_length);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x02, tag);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0d, channel);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0e, tcode);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, 0x0c, sy);</div><div class='add'>+</div><div class='add'>+	serialize_isoc_header(&amp;header, data_length, tag, channel, tcode, sy);</div><div class='add'>+</div><div class='add'>+	KUNIT_EXPECT_EQ(test, header, expected);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kunit_case packet_serdes_test_cases[] = {</div><div class='add'>+	KUNIT_CASE(test_async_header_write_quadlet_request),</div><div class='add'>+	KUNIT_CASE(test_async_header_write_block_request),</div><div class='add'>+	KUNIT_CASE(test_async_header_write_response),</div><div class='add'>+	KUNIT_CASE(test_async_header_read_quadlet_request),</div><div class='add'>+	KUNIT_CASE(test_async_header_read_quadlet_response),</div><div class='add'>+	KUNIT_CASE(test_async_header_read_block_request),</div><div class='add'>+	KUNIT_CASE(test_async_header_read_block_response),</div><div class='add'>+	KUNIT_CASE(test_async_header_lock_request),</div><div class='add'>+	KUNIT_CASE(test_async_header_lock_response),</div><div class='add'>+	KUNIT_CASE(test_isoc_header),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct kunit_suite packet_serdes_test_suite = {</div><div class='add'>+	.name = "firewire-packet-serdes",</div><div class='add'>+	.test_cases = packet_serdes_test_cases,</div><div class='add'>+};</div><div class='add'>+kunit_test_suite(packet_serdes_test_suite);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/firewire/sbp2.c b/drivers/firewire/sbp2.c<br/>index e779d866022b..827dee0f57dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/sbp2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firewire/sbp2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/sbp2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firewire/sbp2.c</a></div><div class='hunk'>@@ -1500,19 +1500,14 @@ static int sbp2_scsi_slave_alloc(struct scsi_device *sdev)</div><div class='ctx'> </div><div class='ctx'> 	sdev-&gt;allow_restart = 1;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * SBP-2 does not require any alignment, but we set it anyway</div><div class='del'>-	 * for compatibility with earlier versions of this driver.</div><div class='del'>-	 */</div><div class='del'>-	blk_queue_update_dma_alignment(sdev-&gt;request_queue, 4 - 1);</div><div class='del'>-</div><div class='ctx'> 	if (lu-&gt;tgt-&gt;workarounds &amp; SBP2_WORKAROUND_INQUIRY_36)</div><div class='ctx'> 		sdev-&gt;inquiry_len = 36;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sbp2_scsi_slave_configure(struct scsi_device *sdev)</div><div class='add'>+static int sbp2_scsi_device_configure(struct scsi_device *sdev,</div><div class='add'>+		struct queue_limits *lim)</div><div class='ctx'> {</div><div class='ctx'> 	struct sbp2_logical_unit *lu = sdev-&gt;hostdata;</div><div class='ctx'> </div><div class='hunk'>@@ -1538,7 +1533,7 @@ static int sbp2_scsi_slave_configure(struct scsi_device *sdev)</div><div class='ctx'> 		sdev-&gt;start_stop_pwr_cond = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (lu-&gt;tgt-&gt;workarounds &amp; SBP2_WORKAROUND_128K_MAX_TRANS)</div><div class='del'>-		blk_queue_max_hw_sectors(sdev-&gt;request_queue, 128 * 1024 / 512);</div><div class='add'>+		lim-&gt;max_hw_sectors = 128 * 1024 / 512;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1596,7 +1591,7 @@ static const struct scsi_host_template scsi_driver_template = {</div><div class='ctx'> 	.proc_name		= "sbp2",</div><div class='ctx'> 	.queuecommand		= sbp2_scsi_queuecommand,</div><div class='ctx'> 	.slave_alloc		= sbp2_scsi_slave_alloc,</div><div class='del'>-	.slave_configure	= sbp2_scsi_slave_configure,</div><div class='add'>+	.device_configure	= sbp2_scsi_device_configure,</div><div class='ctx'> 	.eh_abort_handler	= sbp2_scsi_abort,</div><div class='ctx'> 	.this_id		= -1,</div><div class='ctx'> 	.sg_tablesize		= SG_ALL,</div><div class='head'>diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/driver.c<br/>index 9bc2e10381af..1609247cfafc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_ffa/driver.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_ffa/driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_ffa/driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_ffa/driver.c</a></div><div class='hunk'>@@ -101,11 +101,12 @@ struct ffa_drv_info {</div><div class='ctx'> 	bool bitmap_created;</div><div class='ctx'> 	bool notif_enabled;</div><div class='ctx'> 	unsigned int sched_recv_irq;</div><div class='add'>+	unsigned int notif_pend_irq;</div><div class='ctx'> 	unsigned int cpuhp_state;</div><div class='ctx'> 	struct ffa_pcpu_irq __percpu *irq_pcpu;</div><div class='ctx'> 	struct workqueue_struct *notif_pcpu_wq;</div><div class='ctx'> 	struct work_struct notif_pcpu_work;</div><div class='del'>-	struct work_struct irq_work;</div><div class='add'>+	struct work_struct sched_recv_irq_work;</div><div class='ctx'> 	struct xarray partition_info;</div><div class='ctx'> 	DECLARE_HASHTABLE(notifier_hash, ilog2(FFA_MAX_NOTIFICATIONS));</div><div class='ctx'> 	struct mutex notify_lock; /* lock to protect notifier hashtable  */</div><div class='hunk'>@@ -344,6 +345,38 @@ static int ffa_msg_send_direct_req(u16 src_id, u16 dst_id, bool mode_32bit,</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ffa_msg_send2(u16 src_id, u16 dst_id, void *buf, size_t sz)</div><div class='add'>+{</div><div class='add'>+	u32 src_dst_ids = PACK_TARGET_INFO(src_id, dst_id);</div><div class='add'>+	struct ffa_indirect_msg_hdr *msg;</div><div class='add'>+	ffa_value_t ret;</div><div class='add'>+	int retval = 0;</div><div class='add'>+</div><div class='add'>+	if (sz &gt; (RXTX_BUFFER_SIZE - sizeof(*msg)))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;drv_info-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	msg = drv_info-&gt;tx_buffer;</div><div class='add'>+	msg-&gt;flags = 0;</div><div class='add'>+	msg-&gt;res0 = 0;</div><div class='add'>+	msg-&gt;offset = sizeof(*msg);</div><div class='add'>+	msg-&gt;send_recv_id = src_dst_ids;</div><div class='add'>+	msg-&gt;size = sz;</div><div class='add'>+	memcpy((u8 *)msg + msg-&gt;offset, buf, sz);</div><div class='add'>+</div><div class='add'>+	/* flags = 0, sender VMID = 0 works for both physical/virtual NS */</div><div class='add'>+	invoke_ffa_fn((ffa_value_t){</div><div class='add'>+		      .a0 = FFA_MSG_SEND2, .a1 = 0, .a2 = 0</div><div class='add'>+		      }, &amp;ret);</div><div class='add'>+</div><div class='add'>+	if (ret.a0 == FFA_ERROR)</div><div class='add'>+		retval = ffa_to_linux_errno((int)ret.a2);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;drv_info-&gt;tx_lock);</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ffa_mem_first_frag(u32 func_id, phys_addr_t buf, u32 buf_sz,</div><div class='ctx'> 			      u32 frag_len, u32 len, u64 *handle)</div><div class='ctx'> {</div><div class='hunk'>@@ -870,6 +903,11 @@ static int ffa_sync_send_receive(struct ffa_device *dev,</div><div class='ctx'> 				       dev-&gt;mode_32bit, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ffa_indirect_msg_send(struct ffa_device *dev, void *buf, size_t sz)</div><div class='add'>+{</div><div class='add'>+	return ffa_msg_send2(drv_info-&gt;vm_id, dev-&gt;vm_id, buf, sz);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ffa_memory_share(struct ffa_mem_ops_args *args)</div><div class='ctx'> {</div><div class='ctx'> 	if (drv_info-&gt;mem_ops_native)</div><div class='hunk'>@@ -1108,7 +1146,7 @@ static void handle_notif_callbacks(u64 bitmap, enum notify_type type)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void notif_pcpu_irq_work_fn(struct work_struct *work)</div><div class='add'>+static void notif_get_and_handle(void *unused)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	struct ffa_notify_bitmaps bitmaps;</div><div class='hunk'>@@ -1131,10 +1169,17 @@ ffa_self_notif_handle(u16 vcpu, bool is_per_vcpu, void *cb_data)</div><div class='ctx'> 	struct ffa_drv_info *info = cb_data;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_per_vcpu)</div><div class='del'>-		notif_pcpu_irq_work_fn(&amp;info-&gt;notif_pcpu_work);</div><div class='add'>+		notif_get_and_handle(info);</div><div class='ctx'> 	else</div><div class='del'>-		queue_work_on(vcpu, info-&gt;notif_pcpu_wq,</div><div class='del'>-			      &amp;info-&gt;notif_pcpu_work);</div><div class='add'>+		smp_call_function_single(vcpu, notif_get_and_handle, info, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void notif_pcpu_irq_work_fn(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ffa_drv_info *info = container_of(work, struct ffa_drv_info,</div><div class='add'>+						 notif_pcpu_work);</div><div class='add'>+</div><div class='add'>+	ffa_self_notif_handle(smp_processor_id(), true, info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ffa_info_ops ffa_drv_info_ops = {</div><div class='hunk'>@@ -1145,6 +1190,7 @@ static const struct ffa_info_ops ffa_drv_info_ops = {</div><div class='ctx'> static const struct ffa_msg_ops ffa_drv_msg_ops = {</div><div class='ctx'> 	.mode_32bit_set = ffa_mode_32bit_set,</div><div class='ctx'> 	.sync_send_receive = ffa_sync_send_receive,</div><div class='add'>+	.indirect_send = ffa_indirect_msg_send,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ffa_mem_ops ffa_drv_mem_ops = {</div><div class='hunk'>@@ -1227,6 +1273,8 @@ static int ffa_setup_partitions(void)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		ffa_dev-&gt;properties = tpbuf-&gt;properties;</div><div class='add'>+</div><div class='ctx'> 		if (drv_info-&gt;version &gt; FFA_VERSION_1_0 &amp;&amp;</div><div class='ctx'> 		    !(tpbuf-&gt;properties &amp; FFA_PARTITION_AARCH64_EXEC))</div><div class='ctx'> 			ffa_mode_32bit_set(ffa_dev);</div><div class='hunk'>@@ -1291,12 +1339,23 @@ static void ffa_partitions_cleanup(void)</div><div class='ctx'> #define FFA_FEAT_SCHEDULE_RECEIVER_INT		(2)</div><div class='ctx'> #define FFA_FEAT_MANAGED_EXIT_INT		(3)</div><div class='ctx'> </div><div class='del'>-static irqreturn_t irq_handler(int irq, void *irq_data)</div><div class='add'>+static irqreturn_t ffa_sched_recv_irq_handler(int irq, void *irq_data)</div><div class='add'>+{</div><div class='add'>+	struct ffa_pcpu_irq *pcpu = irq_data;</div><div class='add'>+	struct ffa_drv_info *info = pcpu-&gt;info;</div><div class='add'>+</div><div class='add'>+	queue_work(info-&gt;notif_pcpu_wq, &amp;info-&gt;sched_recv_irq_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t notif_pend_irq_handler(int irq, void *irq_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct ffa_pcpu_irq *pcpu = irq_data;</div><div class='ctx'> 	struct ffa_drv_info *info = pcpu-&gt;info;</div><div class='ctx'> </div><div class='del'>-	queue_work(info-&gt;notif_pcpu_wq, &amp;info-&gt;irq_work);</div><div class='add'>+	queue_work_on(smp_processor_id(), info-&gt;notif_pcpu_wq,</div><div class='add'>+		      &amp;info-&gt;notif_pcpu_work);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -1306,15 +1365,23 @@ static void ffa_sched_recv_irq_work_fn(struct work_struct *work)</div><div class='ctx'> 	ffa_notification_info_get();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ffa_sched_recv_irq_map(void)</div><div class='add'>+static int ffa_irq_map(u32 id)</div><div class='ctx'> {</div><div class='del'>-	int ret, irq, sr_intid;</div><div class='add'>+	char *err_str;</div><div class='add'>+	int ret, irq, intid;</div><div class='ctx'> </div><div class='del'>-	/* The returned sr_intid is assumed to be SGI donated to NS world */</div><div class='del'>-	ret = ffa_features(FFA_FEAT_SCHEDULE_RECEIVER_INT, 0, &amp;sr_intid, NULL);</div><div class='add'>+	if (id == FFA_FEAT_NOTIFICATION_PENDING_INT)</div><div class='add'>+		err_str = "Notification Pending Interrupt";</div><div class='add'>+	else if (id == FFA_FEAT_SCHEDULE_RECEIVER_INT)</div><div class='add'>+		err_str = "Schedule Receiver Interrupt";</div><div class='add'>+	else</div><div class='add'>+		err_str = "Unknown ID";</div><div class='add'>+</div><div class='add'>+	/* The returned intid is assumed to be SGI donated to NS world */</div><div class='add'>+	ret = ffa_features(id, 0, &amp;intid, NULL);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		if (ret != -EOPNOTSUPP)</div><div class='del'>-			pr_err("Failed to retrieve scheduler Rx interrupt\n");</div><div class='add'>+			pr_err("Failed to retrieve FF-A %s %u\n", err_str, id);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1329,12 +1396,12 @@ static int ffa_sched_recv_irq_map(void)</div><div class='ctx'> </div><div class='ctx'> 		oirq.np = gic;</div><div class='ctx'> 		oirq.args_count = 1;</div><div class='del'>-		oirq.args[0] = sr_intid;</div><div class='add'>+		oirq.args[0] = intid;</div><div class='ctx'> 		irq = irq_create_of_mapping(&amp;oirq);</div><div class='ctx'> 		of_node_put(gic);</div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	} else {</div><div class='del'>-		irq = acpi_register_gsi(NULL, sr_intid, ACPI_EDGE_SENSITIVE,</div><div class='add'>+		irq = acpi_register_gsi(NULL, intid, ACPI_EDGE_SENSITIVE,</div><div class='ctx'> 					ACPI_ACTIVE_HIGH);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1347,23 +1414,28 @@ static int ffa_sched_recv_irq_map(void)</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_sched_recv_irq_unmap(void)</div><div class='add'>+static void ffa_irq_unmap(unsigned int irq)</div><div class='ctx'> {</div><div class='del'>-	if (drv_info-&gt;sched_recv_irq) {</div><div class='del'>-		irq_dispose_mapping(drv_info-&gt;sched_recv_irq);</div><div class='del'>-		drv_info-&gt;sched_recv_irq = 0;</div><div class='del'>-	}</div><div class='add'>+	if (!irq)</div><div class='add'>+		return;</div><div class='add'>+	irq_dispose_mapping(irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ffa_cpuhp_pcpu_irq_enable(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	enable_percpu_irq(drv_info-&gt;sched_recv_irq, IRQ_TYPE_NONE);</div><div class='add'>+	if (drv_info-&gt;sched_recv_irq)</div><div class='add'>+		enable_percpu_irq(drv_info-&gt;sched_recv_irq, IRQ_TYPE_NONE);</div><div class='add'>+	if (drv_info-&gt;notif_pend_irq)</div><div class='add'>+		enable_percpu_irq(drv_info-&gt;notif_pend_irq, IRQ_TYPE_NONE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ffa_cpuhp_pcpu_irq_disable(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	disable_percpu_irq(drv_info-&gt;sched_recv_irq);</div><div class='add'>+	if (drv_info-&gt;sched_recv_irq)</div><div class='add'>+		disable_percpu_irq(drv_info-&gt;sched_recv_irq);</div><div class='add'>+	if (drv_info-&gt;notif_pend_irq)</div><div class='add'>+		disable_percpu_irq(drv_info-&gt;notif_pend_irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1382,13 +1454,16 @@ static void ffa_uninit_pcpu_irq(void)</div><div class='ctx'> 	if (drv_info-&gt;sched_recv_irq)</div><div class='ctx'> 		free_percpu_irq(drv_info-&gt;sched_recv_irq, drv_info-&gt;irq_pcpu);</div><div class='ctx'> </div><div class='add'>+	if (drv_info-&gt;notif_pend_irq)</div><div class='add'>+		free_percpu_irq(drv_info-&gt;notif_pend_irq, drv_info-&gt;irq_pcpu);</div><div class='add'>+</div><div class='ctx'> 	if (drv_info-&gt;irq_pcpu) {</div><div class='ctx'> 		free_percpu(drv_info-&gt;irq_pcpu);</div><div class='ctx'> 		drv_info-&gt;irq_pcpu = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ffa_init_pcpu_irq(unsigned int irq)</div><div class='add'>+static int ffa_init_pcpu_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct ffa_pcpu_irq __percpu *irq_pcpu;</div><div class='ctx'> 	int ret, cpu;</div><div class='hunk'>@@ -1402,13 +1477,31 @@ static int ffa_init_pcpu_irq(unsigned int irq)</div><div class='ctx'> </div><div class='ctx'> 	drv_info-&gt;irq_pcpu = irq_pcpu;</div><div class='ctx'> </div><div class='del'>-	ret = request_percpu_irq(irq, irq_handler, "ARM-FFA", irq_pcpu);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("Error registering notification IRQ %d: %d\n", irq, ret);</div><div class='del'>-		return ret;</div><div class='add'>+	if (drv_info-&gt;sched_recv_irq) {</div><div class='add'>+		ret = request_percpu_irq(drv_info-&gt;sched_recv_irq,</div><div class='add'>+					 ffa_sched_recv_irq_handler,</div><div class='add'>+					 "ARM-FFA-SRI", irq_pcpu);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("Error registering percpu SRI nIRQ %d : %d\n",</div><div class='add'>+			       drv_info-&gt;sched_recv_irq, ret);</div><div class='add'>+			drv_info-&gt;sched_recv_irq = 0;</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	INIT_WORK(&amp;drv_info-&gt;irq_work, ffa_sched_recv_irq_work_fn);</div><div class='add'>+	if (drv_info-&gt;notif_pend_irq) {</div><div class='add'>+		ret = request_percpu_irq(drv_info-&gt;notif_pend_irq,</div><div class='add'>+					 notif_pend_irq_handler,</div><div class='add'>+					 "ARM-FFA-NPI", irq_pcpu);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("Error registering percpu NPI nIRQ %d : %d\n",</div><div class='add'>+			       drv_info-&gt;notif_pend_irq, ret);</div><div class='add'>+			drv_info-&gt;notif_pend_irq = 0;</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;drv_info-&gt;sched_recv_irq_work, ffa_sched_recv_irq_work_fn);</div><div class='ctx'> 	INIT_WORK(&amp;drv_info-&gt;notif_pcpu_work, notif_pcpu_irq_work_fn);</div><div class='ctx'> 	drv_info-&gt;notif_pcpu_wq = create_workqueue("ffa_pcpu_irq_notification");</div><div class='ctx'> 	if (!drv_info-&gt;notif_pcpu_wq)</div><div class='hunk'>@@ -1428,7 +1521,10 @@ static int ffa_init_pcpu_irq(unsigned int irq)</div><div class='ctx'> static void ffa_notifications_cleanup(void)</div><div class='ctx'> {</div><div class='ctx'> 	ffa_uninit_pcpu_irq();</div><div class='del'>-	ffa_sched_recv_irq_unmap();</div><div class='add'>+	ffa_irq_unmap(drv_info-&gt;sched_recv_irq);</div><div class='add'>+	drv_info-&gt;sched_recv_irq = 0;</div><div class='add'>+	ffa_irq_unmap(drv_info-&gt;notif_pend_irq);</div><div class='add'>+	drv_info-&gt;notif_pend_irq = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (drv_info-&gt;bitmap_created) {</div><div class='ctx'> 		ffa_notification_bitmap_destroy();</div><div class='hunk'>@@ -1439,30 +1535,31 @@ static void ffa_notifications_cleanup(void)</div><div class='ctx'> </div><div class='ctx'> static void ffa_notifications_setup(void)</div><div class='ctx'> {</div><div class='del'>-	int ret, irq;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = ffa_features(FFA_NOTIFICATION_BITMAP_CREATE, 0, NULL, NULL);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_info("Notifications not supported, continuing with it ..\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (!ret) {</div><div class='add'>+		ret = ffa_notification_bitmap_create();</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("Notification bitmap create error %d\n", ret);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	ret = ffa_notification_bitmap_create();</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_info("Notification bitmap create error %d\n", ret);</div><div class='del'>-		return;</div><div class='add'>+		drv_info-&gt;bitmap_created = true;</div><div class='ctx'> 	}</div><div class='del'>-	drv_info-&gt;bitmap_created = true;</div><div class='ctx'> </div><div class='del'>-	irq = ffa_sched_recv_irq_map();</div><div class='del'>-	if (irq &lt;= 0) {</div><div class='del'>-		ret = irq;</div><div class='del'>-		goto cleanup;</div><div class='del'>-	}</div><div class='add'>+	ret = ffa_irq_map(FFA_FEAT_SCHEDULE_RECEIVER_INT);</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		drv_info-&gt;sched_recv_irq = ret;</div><div class='add'>+</div><div class='add'>+	ret = ffa_irq_map(FFA_FEAT_NOTIFICATION_PENDING_INT);</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		drv_info-&gt;notif_pend_irq = ret;</div><div class='ctx'> </div><div class='del'>-	drv_info-&gt;sched_recv_irq = irq;</div><div class='add'>+	if (!drv_info-&gt;sched_recv_irq &amp;&amp; !drv_info-&gt;notif_pend_irq)</div><div class='add'>+		goto cleanup;</div><div class='ctx'> </div><div class='del'>-	ret = ffa_init_pcpu_irq(irq);</div><div class='add'>+	ret = ffa_init_pcpu_irq();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto cleanup;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/Makefile b/drivers/firmware/arm_scmi/Makefile<br/>index a7bc4796519c..fd59f58ce8a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/Makefile</a></div><div class='hunk'>@@ -10,7 +10,8 @@ scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_SMC) += smc.o</div><div class='ctx'> scmi-transport-$(CONFIG_ARM_SCMI_HAVE_MSG) += msg.o</div><div class='ctx'> scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_VIRTIO) += virtio.o</div><div class='ctx'> scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_OPTEE) += optee.o</div><div class='del'>-scmi-protocols-y = base.o clock.o perf.o power.o reset.o sensors.o system.o voltage.o powercap.o</div><div class='add'>+scmi-protocols-y := base.o clock.o perf.o power.o reset.o sensors.o system.o voltage.o powercap.o</div><div class='add'>+scmi-protocols-y += pinctrl.o</div><div class='ctx'> scmi-module-objs := $(scmi-driver-y) $(scmi-protocols-y) $(scmi-transport-y)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ARM_SCMI_PROTOCOL) += scmi-core.o</div><div class='head'>diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h<br/>index 6affbfdd1dec..b5ac25dbc1ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/common.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/common.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/common.h</a></div><div class='hunk'>@@ -301,6 +301,17 @@ extern const struct scmi_desc scmi_optee_desc;</div><div class='ctx'> </div><div class='ctx'> void scmi_rx_callback(struct scmi_chan_info *cinfo, u32 msg_hdr, void *priv);</div><div class='ctx'> </div><div class='add'>+enum scmi_bad_msg {</div><div class='add'>+	MSG_UNEXPECTED = -1,</div><div class='add'>+	MSG_INVALID = -2,</div><div class='add'>+	MSG_UNKNOWN = -3,</div><div class='add'>+	MSG_NOMEM = -4,</div><div class='add'>+	MSG_MBOX_SPURIOUS = -5,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void scmi_bad_message_trace(struct scmi_chan_info *cinfo, u32 msg_hdr,</div><div class='add'>+			    enum scmi_bad_msg err);</div><div class='add'>+</div><div class='ctx'> /* shmem related declarations */</div><div class='ctx'> struct scmi_shared_mem;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c<br/>index 2709598f3008..6b6957f4743f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/driver.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/driver.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;linux/processor.h&gt;</div><div class='ctx'> #include &lt;linux/refcount.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/xarray.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "notify.h"</div><div class='hunk'>@@ -44,8 +45,7 @@</div><div class='ctx'> </div><div class='ctx'> static DEFINE_IDA(scmi_id);</div><div class='ctx'> </div><div class='del'>-static DEFINE_IDR(scmi_protocols);</div><div class='del'>-static DEFINE_SPINLOCK(protocol_lock);</div><div class='add'>+static DEFINE_XARRAY(scmi_protocols);</div><div class='ctx'> </div><div class='ctx'> /* List of all SCMI devices active in system */</div><div class='ctx'> static LIST_HEAD(scmi_list);</div><div class='hunk'>@@ -194,11 +194,94 @@ struct scmi_info {</div><div class='ctx'> #define bus_nb_to_scmi_info(nb)	container_of(nb, struct scmi_info, bus_nb)</div><div class='ctx'> #define req_nb_to_scmi_info(nb)	container_of(nb, struct scmi_info, dev_req_nb)</div><div class='ctx'> </div><div class='del'>-static const struct scmi_protocol *scmi_protocol_get(int protocol_id)</div><div class='add'>+static unsigned long</div><div class='add'>+scmi_vendor_protocol_signature(unsigned int protocol_id, char *vendor_id,</div><div class='add'>+			       char *sub_vendor_id, u32 impl_ver)</div><div class='ctx'> {</div><div class='del'>-	const struct scmi_protocol *proto;</div><div class='add'>+	char *signature, *p;</div><div class='add'>+	unsigned long hash = 0;</div><div class='ctx'> </div><div class='del'>-	proto = idr_find(&amp;scmi_protocols, protocol_id);</div><div class='add'>+	/* vendor_id/sub_vendor_id guaranteed &lt;= SCMI_SHORT_NAME_MAX_SIZE */</div><div class='add'>+	signature = kasprintf(GFP_KERNEL, "%02X|%s|%s|0x%08X", protocol_id,</div><div class='add'>+			      vendor_id ?: "", sub_vendor_id ?: "", impl_ver);</div><div class='add'>+	if (!signature)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	p = signature;</div><div class='add'>+	while (*p)</div><div class='add'>+		hash = partial_name_hash(tolower(*p++), hash);</div><div class='add'>+	hash = end_name_hash(hash);</div><div class='add'>+</div><div class='add'>+	kfree(signature);</div><div class='add'>+</div><div class='add'>+	return hash;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long</div><div class='add'>+scmi_protocol_key_calculate(int protocol_id, char *vendor_id,</div><div class='add'>+			    char *sub_vendor_id, u32 impl_ver)</div><div class='add'>+{</div><div class='add'>+	if (protocol_id &lt; SCMI_PROTOCOL_VENDOR_BASE)</div><div class='add'>+		return protocol_id;</div><div class='add'>+	else</div><div class='add'>+		return scmi_vendor_protocol_signature(protocol_id, vendor_id,</div><div class='add'>+						      sub_vendor_id, impl_ver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct scmi_protocol *</div><div class='add'>+__scmi_vendor_protocol_lookup(int protocol_id, char *vendor_id,</div><div class='add'>+			      char *sub_vendor_id, u32 impl_ver)</div><div class='add'>+{</div><div class='add'>+	unsigned long key;</div><div class='add'>+	struct scmi_protocol *proto = NULL;</div><div class='add'>+</div><div class='add'>+	key = scmi_protocol_key_calculate(protocol_id, vendor_id,</div><div class='add'>+					  sub_vendor_id, impl_ver);</div><div class='add'>+	if (key)</div><div class='add'>+		proto = xa_load(&amp;scmi_protocols, key);</div><div class='add'>+</div><div class='add'>+	return proto;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct scmi_protocol *</div><div class='add'>+scmi_vendor_protocol_lookup(int protocol_id, char *vendor_id,</div><div class='add'>+			    char *sub_vendor_id, u32 impl_ver)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_protocol *proto = NULL;</div><div class='add'>+</div><div class='add'>+	/* Searching for closest match ...*/</div><div class='add'>+	proto = __scmi_vendor_protocol_lookup(protocol_id, vendor_id,</div><div class='add'>+					      sub_vendor_id, impl_ver);</div><div class='add'>+	if (proto)</div><div class='add'>+		return proto;</div><div class='add'>+</div><div class='add'>+	/* Any match just on vendor/sub_vendor ? */</div><div class='add'>+	if (impl_ver) {</div><div class='add'>+		proto = __scmi_vendor_protocol_lookup(protocol_id, vendor_id,</div><div class='add'>+						      sub_vendor_id, 0);</div><div class='add'>+		if (proto)</div><div class='add'>+			return proto;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Any match just on the vendor ? */</div><div class='add'>+	if (sub_vendor_id)</div><div class='add'>+		proto = __scmi_vendor_protocol_lookup(protocol_id, vendor_id,</div><div class='add'>+						      NULL, 0);</div><div class='add'>+	return proto;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct scmi_protocol *</div><div class='add'>+scmi_protocol_get(int protocol_id, struct scmi_revision_info *version)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_protocol *proto = NULL;</div><div class='add'>+</div><div class='add'>+	if (protocol_id &lt; SCMI_PROTOCOL_VENDOR_BASE)</div><div class='add'>+		proto = xa_load(&amp;scmi_protocols, protocol_id);</div><div class='add'>+	else</div><div class='add'>+		proto = scmi_vendor_protocol_lookup(protocol_id,</div><div class='add'>+						    version-&gt;vendor_id,</div><div class='add'>+						    version-&gt;sub_vendor_id,</div><div class='add'>+						    version-&gt;impl_ver);</div><div class='ctx'> 	if (!proto || !try_module_get(proto-&gt;owner)) {</div><div class='ctx'> 		pr_warn("SCMI Protocol 0x%x not found!\n", protocol_id);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -206,21 +289,46 @@ static const struct scmi_protocol *scmi_protocol_get(int protocol_id)</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Found SCMI Protocol 0x%x\n", protocol_id);</div><div class='ctx'> </div><div class='add'>+	if (protocol_id &gt;= SCMI_PROTOCOL_VENDOR_BASE)</div><div class='add'>+		pr_info("Loaded SCMI Vendor Protocol 0x%x - %s %s %X\n",</div><div class='add'>+			protocol_id, proto-&gt;vendor_id ?: "",</div><div class='add'>+			proto-&gt;sub_vendor_id ?: "", proto-&gt;impl_ver);</div><div class='add'>+</div><div class='ctx'> 	return proto;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void scmi_protocol_put(int protocol_id)</div><div class='add'>+static void scmi_protocol_put(const struct scmi_protocol *proto)</div><div class='ctx'> {</div><div class='del'>-	const struct scmi_protocol *proto;</div><div class='del'>-</div><div class='del'>-	proto = idr_find(&amp;scmi_protocols, protocol_id);</div><div class='ctx'> 	if (proto)</div><div class='ctx'> 		module_put(proto-&gt;owner);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int scmi_vendor_protocol_check(const struct scmi_protocol *proto)</div><div class='add'>+{</div><div class='add'>+	if (!proto-&gt;vendor_id) {</div><div class='add'>+		pr_err("missing vendor_id for protocol 0x%x\n", proto-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (strlen(proto-&gt;vendor_id) &gt;= SCMI_SHORT_NAME_MAX_SIZE) {</div><div class='add'>+		pr_err("malformed vendor_id for protocol 0x%x\n", proto-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (proto-&gt;sub_vendor_id &amp;&amp;</div><div class='add'>+	    strlen(proto-&gt;sub_vendor_id) &gt;= SCMI_SHORT_NAME_MAX_SIZE) {</div><div class='add'>+		pr_err("malformed sub_vendor_id for protocol 0x%x\n",</div><div class='add'>+		       proto-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int scmi_protocol_register(const struct scmi_protocol *proto)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+	unsigned long key;</div><div class='ctx'> </div><div class='ctx'> 	if (!proto) {</div><div class='ctx'> 		pr_err("invalid protocol\n");</div><div class='hunk'>@@ -232,12 +340,23 @@ int scmi_protocol_register(const struct scmi_protocol *proto)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;protocol_lock);</div><div class='del'>-	ret = idr_alloc(&amp;scmi_protocols, (void *)proto,</div><div class='del'>-			proto-&gt;id, proto-&gt;id + 1, GFP_ATOMIC);</div><div class='del'>-	spin_unlock(&amp;protocol_lock);</div><div class='del'>-	if (ret != proto-&gt;id) {</div><div class='del'>-		pr_err("unable to allocate SCMI idr slot for 0x%x - err %d\n",</div><div class='add'>+	if (proto-&gt;id &gt;= SCMI_PROTOCOL_VENDOR_BASE &amp;&amp;</div><div class='add'>+	    scmi_vendor_protocol_check(proto))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate a protocol key to register this protocol with the core;</div><div class='add'>+	 * key value 0 is considered invalid.</div><div class='add'>+	 */</div><div class='add'>+	key = scmi_protocol_key_calculate(proto-&gt;id, proto-&gt;vendor_id,</div><div class='add'>+					  proto-&gt;sub_vendor_id,</div><div class='add'>+					  proto-&gt;impl_ver);</div><div class='add'>+	if (!key)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = xa_insert(&amp;scmi_protocols, key, (void *)proto, GFP_KERNEL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("unable to allocate SCMI protocol slot for 0x%x - err %d\n",</div><div class='ctx'> 		       proto-&gt;id, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -250,9 +369,15 @@ EXPORT_SYMBOL_GPL(scmi_protocol_register);</div><div class='ctx'> </div><div class='ctx'> void scmi_protocol_unregister(const struct scmi_protocol *proto)</div><div class='ctx'> {</div><div class='del'>-	spin_lock(&amp;protocol_lock);</div><div class='del'>-	idr_remove(&amp;scmi_protocols, proto-&gt;id);</div><div class='del'>-	spin_unlock(&amp;protocol_lock);</div><div class='add'>+	unsigned long key;</div><div class='add'>+</div><div class='add'>+	key = scmi_protocol_key_calculate(proto-&gt;id, proto-&gt;vendor_id,</div><div class='add'>+					  proto-&gt;sub_vendor_id,</div><div class='add'>+					  proto-&gt;impl_ver);</div><div class='add'>+	if (!key)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xa_erase(&amp;scmi_protocols, key);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Unregistered SCMI Protocol 0x%x\n", proto-&gt;id);</div><div class='ctx'> }</div><div class='hunk'>@@ -697,6 +822,45 @@ scmi_xfer_lookup_unlocked(struct scmi_xfers_info *minfo, u16 xfer_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * scmi_bad_message_trace  - A helper to trace weird messages</div><div class='add'>+ *</div><div class='add'>+ * @cinfo: A reference to the channel descriptor on which the message was</div><div class='add'>+ *	   received</div><div class='add'>+ * @msg_hdr: Message header to track</div><div class='add'>+ * @err: A specific error code used as a status value in traces.</div><div class='add'>+ *</div><div class='add'>+ * This helper can be used to trace any kind of weird, incomplete, unexpected,</div><div class='add'>+ * timed-out message that arrives and as such, can be traced only referring to</div><div class='add'>+ * the header content, since the payload is missing/unreliable.</div><div class='add'>+ */</div><div class='add'>+void scmi_bad_message_trace(struct scmi_chan_info *cinfo, u32 msg_hdr,</div><div class='add'>+			    enum scmi_bad_msg err)</div><div class='add'>+{</div><div class='add'>+	char *tag;</div><div class='add'>+	struct scmi_info *info = handle_to_scmi_info(cinfo-&gt;handle);</div><div class='add'>+</div><div class='add'>+	switch (MSG_XTRACT_TYPE(msg_hdr)) {</div><div class='add'>+	case MSG_TYPE_COMMAND:</div><div class='add'>+		tag = "!RESP";</div><div class='add'>+		break;</div><div class='add'>+	case MSG_TYPE_DELAYED_RESP:</div><div class='add'>+		tag = "!DLYD";</div><div class='add'>+		break;</div><div class='add'>+	case MSG_TYPE_NOTIFICATION:</div><div class='add'>+		tag = "!NOTI";</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		tag = "!UNKN";</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	trace_scmi_msg_dump(info-&gt;id, cinfo-&gt;id,</div><div class='add'>+			    MSG_XTRACT_PROT_ID(msg_hdr),</div><div class='add'>+			    MSG_XTRACT_ID(msg_hdr), tag,</div><div class='add'>+			    MSG_XTRACT_TOKEN(msg_hdr), err, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * scmi_msg_response_validate  - Validate message type against state of related</div><div class='ctx'>  * xfer</div><div class='ctx'>  *</div><div class='hunk'>@@ -822,6 +986,9 @@ scmi_xfer_command_acquire(struct scmi_chan_info *cinfo, u32 msg_hdr)</div><div class='ctx'> 			"Message for %d type %d is not expected!\n",</div><div class='ctx'> 			xfer_id, msg_type);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;minfo-&gt;xfer_lock, flags);</div><div class='add'>+</div><div class='add'>+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_UNEXPECTED);</div><div class='add'>+</div><div class='ctx'> 		return xfer;</div><div class='ctx'> 	}</div><div class='ctx'> 	refcount_inc(&amp;xfer-&gt;users);</div><div class='hunk'>@@ -846,6 +1013,9 @@ scmi_xfer_command_acquire(struct scmi_chan_info *cinfo, u32 msg_hdr)</div><div class='ctx'> 		dev_err(cinfo-&gt;dev,</div><div class='ctx'> 			"Invalid message type:%d for %d - HDR:0x%X  state:%d\n",</div><div class='ctx'> 			msg_type, xfer_id, msg_hdr, xfer-&gt;state);</div><div class='add'>+</div><div class='add'>+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_INVALID);</div><div class='add'>+</div><div class='ctx'> 		/* On error the refcount incremented above has to be dropped */</div><div class='ctx'> 		__scmi_xfer_put(minfo, xfer);</div><div class='ctx'> 		xfer = ERR_PTR(-EINVAL);</div><div class='hunk'>@@ -882,6 +1052,9 @@ static void scmi_handle_notification(struct scmi_chan_info *cinfo,</div><div class='ctx'> 	if (IS_ERR(xfer)) {</div><div class='ctx'> 		dev_err(dev, "failed to get free message slot (%ld)\n",</div><div class='ctx'> 			PTR_ERR(xfer));</div><div class='add'>+</div><div class='add'>+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_NOMEM);</div><div class='add'>+</div><div class='ctx'> 		scmi_clear_channel(info, cinfo);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1001,6 +1174,7 @@ void scmi_rx_callback(struct scmi_chan_info *cinfo, u32 msg_hdr, void *priv)</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ONCE(1, "received unknown msg_type:%d\n", msg_type);</div><div class='add'>+		scmi_bad_message_trace(cinfo, msg_hdr, MSG_UNKNOWN);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1489,6 +1663,20 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * scmi_common_get_max_msg_size  - Get maximum message size</div><div class='add'>+ * @ph: A protocol handle reference.</div><div class='add'>+ *</div><div class='add'>+ * Return: Maximum message size for the current protocol.</div><div class='add'>+ */</div><div class='add'>+static int scmi_common_get_max_msg_size(const struct scmi_protocol_handle *ph)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_protocol_instance *pi = ph_to_pi(ph);</div><div class='add'>+	struct scmi_info *info = handle_to_scmi_info(pi-&gt;handle);</div><div class='add'>+</div><div class='add'>+	return info-&gt;desc-&gt;max_msg_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct scmi_iterator  - Iterator descriptor</div><div class='ctx'>  * @msg: A reference to the message TX buffer; filled by @prepare_message with</div><div class='ctx'>  *	 a proper custom command payload for each multi-part command request.</div><div class='hunk'>@@ -1799,6 +1987,7 @@ static int scmi_protocol_msg_check(const struct scmi_protocol_handle *ph,</div><div class='ctx'> </div><div class='ctx'> static const struct scmi_proto_helpers_ops helpers_ops = {</div><div class='ctx'> 	.extended_name_get = scmi_common_extended_name_get,</div><div class='add'>+	.get_max_msg_size = scmi_common_get_max_msg_size,</div><div class='ctx'> 	.iter_response_init = scmi_iterator_init,</div><div class='ctx'> 	.iter_response_run = scmi_iterator_run,</div><div class='ctx'> 	.protocol_msg_check = scmi_protocol_msg_check,</div><div class='hunk'>@@ -1891,7 +2080,7 @@ scmi_alloc_init_protocol_instance(struct scmi_info *info,</div><div class='ctx'> 	/* Protocol specific devres group */</div><div class='ctx'> 	gid = devres_open_group(handle-&gt;dev, NULL, GFP_KERNEL);</div><div class='ctx'> 	if (!gid) {</div><div class='del'>-		scmi_protocol_put(proto-&gt;id);</div><div class='add'>+		scmi_protocol_put(proto);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1955,7 +2144,7 @@ scmi_alloc_init_protocol_instance(struct scmi_info *info,</div><div class='ctx'> </div><div class='ctx'> clean:</div><div class='ctx'> 	/* Take care to put the protocol module's owner before releasing all */</div><div class='del'>-	scmi_protocol_put(proto-&gt;id);</div><div class='add'>+	scmi_protocol_put(proto);</div><div class='ctx'> 	devres_release_group(handle-&gt;dev, gid);</div><div class='ctx'> out:</div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='hunk'>@@ -1989,7 +2178,7 @@ scmi_get_protocol_instance(const struct scmi_handle *handle, u8 protocol_id)</div><div class='ctx'> 		const struct scmi_protocol *proto;</div><div class='ctx'> </div><div class='ctx'> 		/* Fails if protocol not registered on bus */</div><div class='del'>-		proto = scmi_protocol_get(protocol_id);</div><div class='add'>+		proto = scmi_protocol_get(protocol_id, &amp;info-&gt;version);</div><div class='ctx'> 		if (proto)</div><div class='ctx'> 			pi = scmi_alloc_init_protocol_instance(info, proto);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -2044,7 +2233,7 @@ void scmi_protocol_release(const struct scmi_handle *handle, u8 protocol_id)</div><div class='ctx'> </div><div class='ctx'> 		idr_remove(&amp;info-&gt;protocols, protocol_id);</div><div class='ctx'> </div><div class='del'>-		scmi_protocol_put(protocol_id);</div><div class='add'>+		scmi_protocol_put(pi-&gt;proto);</div><div class='ctx'> </div><div class='ctx'> 		devres_release_group(handle-&gt;dev, gid);</div><div class='ctx'> 		dev_dbg(handle-&gt;dev, "De-Initialized protocol: 0x%X\n",</div><div class='hunk'>@@ -2491,6 +2680,10 @@ scmi_txrx_setup(struct scmi_info *info, struct device_node *of_node,</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(info-&gt;dev,</div><div class='add'>+			"failed to setup channel for protocol:0x%X\n", prot_id);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2760,6 +2953,7 @@ static int scmi_debugfs_raw_mode_setup(struct scmi_info *info)</div><div class='ctx'> static int scmi_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+	char *err_str = "probe failure\n";</div><div class='ctx'> 	struct scmi_handle *handle;</div><div class='ctx'> 	const struct scmi_desc *desc;</div><div class='ctx'> 	struct scmi_info *info;</div><div class='hunk'>@@ -2810,27 +3004,37 @@ static int scmi_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (desc-&gt;ops-&gt;link_supplier) {</div><div class='ctx'> 		ret = desc-&gt;ops-&gt;link_supplier(dev);</div><div class='del'>-		if (ret)</div><div class='add'>+		if (ret) {</div><div class='add'>+			err_str = "transport not ready\n";</div><div class='ctx'> 			goto clear_ida;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup all channels described in the DT at first */</div><div class='ctx'> 	ret = scmi_channels_setup(info);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		err_str = "failed to setup channels\n";</div><div class='ctx'> 		goto clear_ida;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = bus_register_notifier(&amp;scmi_bus_type, &amp;info-&gt;bus_nb);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		err_str = "failed to register bus notifier\n";</div><div class='ctx'> 		goto clear_txrx_setup;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = blocking_notifier_chain_register(&amp;scmi_requested_devices_nh,</div><div class='ctx'> 					       &amp;info-&gt;dev_req_nb);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		err_str = "failed to register device notifier\n";</div><div class='ctx'> 		goto clear_bus_notifier;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = scmi_xfer_info_init(info);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		err_str = "failed to init xfers pool\n";</div><div class='ctx'> 		goto clear_dev_req_notifier;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (scmi_top_dentry) {</div><div class='ctx'> 		info-&gt;dbg = scmi_debugfs_common_setup(info);</div><div class='hunk'>@@ -2867,9 +3071,11 @@ static int scmi_probe(struct platform_device *pdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = scmi_protocol_acquire(handle, SCMI_PROTOCOL_BASE);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(dev, "unable to communicate with SCMI\n");</div><div class='del'>-		if (coex)</div><div class='add'>+		err_str = "unable to communicate with SCMI\n";</div><div class='add'>+		if (coex) {</div><div class='add'>+			dev_err(dev, "%s", err_str);</div><div class='ctx'> 			return 0;</div><div class='add'>+		}</div><div class='ctx'> 		goto notification_exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2923,7 +3129,8 @@ clear_txrx_setup:</div><div class='ctx'> 	scmi_cleanup_txrx_channels(info);</div><div class='ctx'> clear_ida:</div><div class='ctx'> 	ida_free(&amp;scmi_id, info-&gt;id);</div><div class='del'>-	return ret;</div><div class='add'>+</div><div class='add'>+	return dev_err_probe(dev, ret, "%s", err_str);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void scmi_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -3127,6 +3334,7 @@ static int __init scmi_driver_init(void)</div><div class='ctx'> 	scmi_voltage_register();</div><div class='ctx'> 	scmi_system_register();</div><div class='ctx'> 	scmi_powercap_register();</div><div class='add'>+	scmi_pinctrl_register();</div><div class='ctx'> </div><div class='ctx'> 	return platform_driver_register(&amp;scmi_driver);</div><div class='ctx'> }</div><div class='hunk'>@@ -3144,6 +3352,7 @@ static void __exit scmi_driver_exit(void)</div><div class='ctx'> 	scmi_voltage_unregister();</div><div class='ctx'> 	scmi_system_unregister();</div><div class='ctx'> 	scmi_powercap_unregister();</div><div class='add'>+	scmi_pinctrl_unregister();</div><div class='ctx'> </div><div class='ctx'> 	scmi_transports_exit();</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/mailbox.c b/drivers/firmware/arm_scmi/mailbox.c<br/>index b8d470417e8f..615a3b2ad83d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/mailbox.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/mailbox.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/mailbox.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/mailbox.c</a></div><div class='hunk'>@@ -56,6 +56,9 @@ static void rx_callback(struct mbox_client *cl, void *m)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cl-&gt;knows_txdone &amp;&amp; !shmem_channel_free(smbox-&gt;shmem)) {</div><div class='ctx'> 		dev_warn(smbox-&gt;cinfo-&gt;dev, "Ignoring spurious A2P IRQ !\n");</div><div class='add'>+		scmi_bad_message_trace(smbox-&gt;cinfo,</div><div class='add'>+				       shmem_read_header(smbox-&gt;shmem),</div><div class='add'>+				       MSG_MBOX_SPURIOUS);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/notify.c b/drivers/firmware/arm_scmi/notify.c<br/>index 27c52531194d..e160ecb22948 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/notify.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/notify.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/notify.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/notify.c</a></div><div class='hunk'>@@ -1513,17 +1513,12 @@ static int scmi_devm_notifier_register(struct scmi_device *sdev,</div><div class='ctx'> static int scmi_devm_notifier_match(struct device *dev, void *res, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct scmi_notifier_devres *dres = res;</div><div class='del'>-	struct scmi_notifier_devres *xres = data;</div><div class='add'>+	struct notifier_block *nb = data;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!dres || !xres))</div><div class='add'>+	if (WARN_ON(!dres || !nb))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return dres-&gt;proto_id == xres-&gt;proto_id &amp;&amp;</div><div class='del'>-		dres-&gt;evt_id == xres-&gt;evt_id &amp;&amp;</div><div class='del'>-		dres-&gt;nb == xres-&gt;nb &amp;&amp;</div><div class='del'>-		((!dres-&gt;src_id &amp;&amp; !xres-&gt;src_id) ||</div><div class='del'>-		  (dres-&gt;src_id &amp;&amp; xres-&gt;src_id &amp;&amp;</div><div class='del'>-		   dres-&gt;__src_id == xres-&gt;__src_id));</div><div class='add'>+	return dres-&gt;nb == nb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1531,10 +1526,6 @@ static int scmi_devm_notifier_match(struct device *dev, void *res, void *data)</div><div class='ctx'>  * notifier_block for an event</div><div class='ctx'>  * @sdev: A reference to an scmi_device whose embedded struct device is to</div><div class='ctx'>  *	  be used for devres accounting.</div><div class='del'>- * @proto_id: Protocol ID</div><div class='del'>- * @evt_id: Event ID</div><div class='del'>- * @src_id: Source ID, when NULL register for events coming form ALL possible</div><div class='del'>- *	    sources</div><div class='ctx'>  * @nb: A standard notifier block to register for the specified event</div><div class='ctx'>  *</div><div class='ctx'>  * Generic devres managed helper to explicitly un-register a notifier_block</div><div class='hunk'>@@ -1544,25 +1535,12 @@ static int scmi_devm_notifier_match(struct device *dev, void *res, void *data)</div><div class='ctx'>  * Return: 0 on Success</div><div class='ctx'>  */</div><div class='ctx'> static int scmi_devm_notifier_unregister(struct scmi_device *sdev,</div><div class='del'>-					 u8 proto_id, u8 evt_id,</div><div class='del'>-					 const u32 *src_id,</div><div class='ctx'> 					 struct notifier_block *nb)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct scmi_notifier_devres dres;</div><div class='del'>-</div><div class='del'>-	dres.handle = sdev-&gt;handle;</div><div class='del'>-	dres.proto_id = proto_id;</div><div class='del'>-	dres.evt_id = evt_id;</div><div class='del'>-	if (src_id) {</div><div class='del'>-		dres.__src_id = *src_id;</div><div class='del'>-		dres.src_id = &amp;dres.__src_id;</div><div class='del'>-	} else {</div><div class='del'>-		dres.src_id = NULL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = devres_release(&amp;sdev-&gt;dev, scmi_devm_release_notifier,</div><div class='del'>-			     scmi_devm_notifier_match, &amp;dres);</div><div class='add'>+			     scmi_devm_notifier_match, nb);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(ret);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/perf.c b/drivers/firmware/arm_scmi/perf.c<br/>index 345fff167b52..4b7f1cbb9b04 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/perf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/perf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/perf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/perf.c</a></div><div class='hunk'>@@ -387,8 +387,8 @@ process_response_opp(struct device *dev, struct perf_dom_info *dom,</div><div class='ctx'> </div><div class='ctx'> 	ret = xa_insert(&amp;dom-&gt;opps_by_lvl, opp-&gt;perf, opp, GFP_KERNEL);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		dev_warn(dev, "Failed to add opps_by_lvl at %d - ret:%d\n",</div><div class='del'>-			 opp-&gt;perf, ret);</div><div class='add'>+		dev_warn(dev, "Failed to add opps_by_lvl at %d for %s - ret:%d\n",</div><div class='add'>+			 opp-&gt;perf, dom-&gt;info.name, ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -405,8 +405,8 @@ process_response_opp_v4(struct device *dev, struct perf_dom_info *dom,</div><div class='ctx'> </div><div class='ctx'> 	ret = xa_insert(&amp;dom-&gt;opps_by_lvl, opp-&gt;perf, opp, GFP_KERNEL);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		dev_warn(dev, "Failed to add opps_by_lvl at %d - ret:%d\n",</div><div class='del'>-			 opp-&gt;perf, ret);</div><div class='add'>+		dev_warn(dev, "Failed to add opps_by_lvl at %d for %s - ret:%d\n",</div><div class='add'>+			 opp-&gt;perf, dom-&gt;info.name, ret);</div><div class='ctx'> </div><div class='ctx'> 	/* Note that PERF v4 reports always five 32-bit words */</div><div class='ctx'> 	opp-&gt;indicative_freq = le32_to_cpu(r-&gt;opp[loop_idx].indicative_freq);</div><div class='hunk'>@@ -417,8 +417,8 @@ process_response_opp_v4(struct device *dev, struct perf_dom_info *dom,</div><div class='ctx'> 				GFP_KERNEL);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			dev_warn(dev,</div><div class='del'>-				 "Failed to add opps_by_idx at %d - ret:%d\n",</div><div class='del'>-				 opp-&gt;level_index, ret);</div><div class='add'>+				 "Failed to add opps_by_idx at %d for %s - ret:%d\n",</div><div class='add'>+				 opp-&gt;level_index, dom-&gt;info.name, ret);</div><div class='ctx'> </div><div class='ctx'> 		hash_add(dom-&gt;opps_by_freq, &amp;opp-&gt;hash, opp-&gt;indicative_freq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -879,7 +879,8 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph,</div><div class='ctx'> </div><div class='ctx'> 		ret = dev_pm_opp_add_dynamic(dev, &amp;data);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			dev_warn(dev, "failed to add opp %luHz\n", freq);</div><div class='add'>+			dev_warn(dev, "[%d][%s]: Failed to add OPP[%d] %lu\n",</div><div class='add'>+				 domain, dom-&gt;info.name, idx, freq);</div><div class='ctx'> 			dev_pm_opp_remove_all_dynamic(dev);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/firmware/arm_scmi/pinctrl.c b/drivers/firmware/arm_scmi/pinctrl.c<br/>new file mode 100644<br/>index 000000000000..a2a7f880d6a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/pinctrl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/pinctrl.c</a></div><div class='hunk'>@@ -0,0 +1,916 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * System Control and Management Interface (SCMI) Pinctrl Protocol</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 EPAM</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/scmi_protocol.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+#include "protocols.h"</div><div class='add'>+</div><div class='add'>+/* Updated only after ALL the mandatory features for that version are merged */</div><div class='add'>+#define SCMI_PROTOCOL_SUPPORTED_VERSION		0x10000</div><div class='add'>+</div><div class='add'>+#define GET_GROUPS_NR(x)	le32_get_bits((x), GENMASK(31, 16))</div><div class='add'>+#define GET_PINS_NR(x)		le32_get_bits((x), GENMASK(15, 0))</div><div class='add'>+#define GET_FUNCTIONS_NR(x)	le32_get_bits((x), GENMASK(15, 0))</div><div class='add'>+</div><div class='add'>+#define EXT_NAME_FLAG(x)	le32_get_bits((x), BIT(31))</div><div class='add'>+#define NUM_ELEMS(x)		le32_get_bits((x), GENMASK(15, 0))</div><div class='add'>+</div><div class='add'>+#define REMAINING(x)		le32_get_bits((x), GENMASK(31, 16))</div><div class='add'>+#define RETURNED(x)		le32_get_bits((x), GENMASK(11, 0))</div><div class='add'>+</div><div class='add'>+#define CONFIG_FLAG_MASK	GENMASK(19, 18)</div><div class='add'>+#define SELECTOR_MASK		GENMASK(17, 16)</div><div class='add'>+#define SKIP_CONFIGS_MASK	GENMASK(15, 8)</div><div class='add'>+#define CONFIG_TYPE_MASK	GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+enum scmi_pinctrl_protocol_cmd {</div><div class='add'>+	PINCTRL_ATTRIBUTES = 0x3,</div><div class='add'>+	PINCTRL_LIST_ASSOCIATIONS = 0x4,</div><div class='add'>+	PINCTRL_SETTINGS_GET = 0x5,</div><div class='add'>+	PINCTRL_SETTINGS_CONFIGURE = 0x6,</div><div class='add'>+	PINCTRL_REQUEST = 0x7,</div><div class='add'>+	PINCTRL_RELEASE = 0x8,</div><div class='add'>+	PINCTRL_NAME_GET = 0x9,</div><div class='add'>+	PINCTRL_SET_PERMISSIONS = 0xa,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_msg_settings_conf {</div><div class='add'>+	__le32 identifier;</div><div class='add'>+	__le32 function_id;</div><div class='add'>+	__le32 attributes;</div><div class='add'>+	__le32 configs[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_msg_settings_get {</div><div class='add'>+	__le32 identifier;</div><div class='add'>+	__le32 attributes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_resp_settings_get {</div><div class='add'>+	__le32 function_selected;</div><div class='add'>+	__le32 num_configs;</div><div class='add'>+	__le32 configs[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_msg_pinctrl_protocol_attributes {</div><div class='add'>+	__le32 attributes_low;</div><div class='add'>+	__le32 attributes_high;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_msg_pinctrl_attributes {</div><div class='add'>+	__le32 identifier;</div><div class='add'>+	__le32 flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_resp_pinctrl_attributes {</div><div class='add'>+	__le32 attributes;</div><div class='add'>+	u8 name[SCMI_SHORT_NAME_MAX_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_msg_pinctrl_list_assoc {</div><div class='add'>+	__le32 identifier;</div><div class='add'>+	__le32 flags;</div><div class='add'>+	__le32 index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_resp_pinctrl_list_assoc {</div><div class='add'>+	__le32 flags;</div><div class='add'>+	__le16 array[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_msg_request {</div><div class='add'>+	__le32 identifier;</div><div class='add'>+	__le32 flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_group_info {</div><div class='add'>+	char name[SCMI_MAX_STR_SIZE];</div><div class='add'>+	bool present;</div><div class='add'>+	u32 *group_pins;</div><div class='add'>+	u32 nr_pins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_function_info {</div><div class='add'>+	char name[SCMI_MAX_STR_SIZE];</div><div class='add'>+	bool present;</div><div class='add'>+	u32 *groups;</div><div class='add'>+	u32 nr_groups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_pin_info {</div><div class='add'>+	char name[SCMI_MAX_STR_SIZE];</div><div class='add'>+	bool present;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct scmi_pinctrl_info {</div><div class='add'>+	u32 version;</div><div class='add'>+	int nr_groups;</div><div class='add'>+	int nr_functions;</div><div class='add'>+	int nr_pins;</div><div class='add'>+	struct scmi_group_info *groups;</div><div class='add'>+	struct scmi_function_info *functions;</div><div class='add'>+	struct scmi_pin_info *pins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_attributes_get(const struct scmi_protocol_handle *ph,</div><div class='add'>+				       struct scmi_pinctrl_info *pi)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct scmi_xfer *t;</div><div class='add'>+	struct scmi_msg_pinctrl_protocol_attributes *attr;</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, sizeof(*attr), &amp;t);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	attr = t-&gt;rx.buf;</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;do_xfer(ph, t);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		pi-&gt;nr_functions = GET_FUNCTIONS_NR(attr-&gt;attributes_high);</div><div class='add'>+		pi-&gt;nr_groups = GET_GROUPS_NR(attr-&gt;attributes_low);</div><div class='add'>+		pi-&gt;nr_pins = GET_PINS_NR(attr-&gt;attributes_low);</div><div class='add'>+		if (pi-&gt;nr_pins == 0) {</div><div class='add'>+			dev_warn(ph-&gt;dev, "returned zero pins\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ph-&gt;xops-&gt;xfer_put(ph, t);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_count_get(const struct scmi_protocol_handle *ph,</div><div class='add'>+				  enum scmi_pinctrl_selector_type type)</div><div class='add'>+{</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PIN_TYPE:</div><div class='add'>+		return pi-&gt;nr_pins;</div><div class='add'>+	case GROUP_TYPE:</div><div class='add'>+		return pi-&gt;nr_groups;</div><div class='add'>+	case FUNCTION_TYPE:</div><div class='add'>+		return pi-&gt;nr_functions;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_validate_id(const struct scmi_protocol_handle *ph,</div><div class='add'>+				    u32 selector,</div><div class='add'>+				    enum scmi_pinctrl_selector_type type)</div><div class='add'>+{</div><div class='add'>+	int value;</div><div class='add'>+</div><div class='add'>+	value = scmi_pinctrl_count_get(ph, type);</div><div class='add'>+	if (value &lt; 0)</div><div class='add'>+		return value;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= value || value == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_attributes(const struct scmi_protocol_handle *ph,</div><div class='add'>+				   enum scmi_pinctrl_selector_type type,</div><div class='add'>+				   u32 selector, char *name,</div><div class='add'>+				   u32 *n_elems)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct scmi_xfer *t;</div><div class='add'>+	struct scmi_msg_pinctrl_attributes *tx;</div><div class='add'>+	struct scmi_resp_pinctrl_attributes *rx;</div><div class='add'>+	bool ext_name_flag;</div><div class='add'>+</div><div class='add'>+	if (!name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_validate_id(ph, selector, type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;xfer_get_init(ph, PINCTRL_ATTRIBUTES, sizeof(*tx),</div><div class='add'>+				      sizeof(*rx), &amp;t);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tx = t-&gt;tx.buf;</div><div class='add'>+	rx = t-&gt;rx.buf;</div><div class='add'>+	tx-&gt;identifier = cpu_to_le32(selector);</div><div class='add'>+	tx-&gt;flags = cpu_to_le32(type);</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;do_xfer(ph, t);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		if (n_elems)</div><div class='add'>+			*n_elems = NUM_ELEMS(rx-&gt;attributes);</div><div class='add'>+</div><div class='add'>+		strscpy(name, rx-&gt;name, SCMI_SHORT_NAME_MAX_SIZE);</div><div class='add'>+</div><div class='add'>+		ext_name_flag = !!EXT_NAME_FLAG(rx-&gt;attributes);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ph-&gt;xops-&gt;xfer_put(ph, t);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	/*</div><div class='add'>+	 * If supported overwrite short name with the extended one;</div><div class='add'>+	 * on error just carry on and use already provided short name.</div><div class='add'>+	 */</div><div class='add'>+	if (ext_name_flag)</div><div class='add'>+		ret = ph-&gt;hops-&gt;extended_name_get(ph, PINCTRL_NAME_GET,</div><div class='add'>+						  selector, (u32 *)&amp;type, name,</div><div class='add'>+						  SCMI_MAX_STR_SIZE);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct scmi_pinctrl_ipriv {</div><div class='add'>+	u32 selector;</div><div class='add'>+	enum scmi_pinctrl_selector_type type;</div><div class='add'>+	u32 *array;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void iter_pinctrl_assoc_prepare_message(void *message,</div><div class='add'>+					       u32 desc_index,</div><div class='add'>+					       const void *priv)</div><div class='add'>+{</div><div class='add'>+	struct scmi_msg_pinctrl_list_assoc *msg = message;</div><div class='add'>+	const struct scmi_pinctrl_ipriv *p = priv;</div><div class='add'>+</div><div class='add'>+	msg-&gt;identifier = cpu_to_le32(p-&gt;selector);</div><div class='add'>+	msg-&gt;flags = cpu_to_le32(p-&gt;type);</div><div class='add'>+	msg-&gt;index = cpu_to_le32(desc_index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iter_pinctrl_assoc_update_state(struct scmi_iterator_state *st,</div><div class='add'>+					   const void *response, void *priv)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_resp_pinctrl_list_assoc *r = response;</div><div class='add'>+</div><div class='add'>+	st-&gt;num_returned = RETURNED(r-&gt;flags);</div><div class='add'>+	st-&gt;num_remaining = REMAINING(r-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+iter_pinctrl_assoc_process_response(const struct scmi_protocol_handle *ph,</div><div class='add'>+				    const void *response,</div><div class='add'>+				    struct scmi_iterator_state *st, void *priv)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_resp_pinctrl_list_assoc *r = response;</div><div class='add'>+	struct scmi_pinctrl_ipriv *p = priv;</div><div class='add'>+</div><div class='add'>+	p-&gt;array[st-&gt;desc_index + st-&gt;loop_idx] =</div><div class='add'>+		le16_to_cpu(r-&gt;array[st-&gt;loop_idx]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_list_associations(const struct scmi_protocol_handle *ph,</div><div class='add'>+					  u32 selector,</div><div class='add'>+					  enum scmi_pinctrl_selector_type type,</div><div class='add'>+					  u16 size, u32 *array)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	void *iter;</div><div class='add'>+	struct scmi_iterator_ops ops = {</div><div class='add'>+		.prepare_message = iter_pinctrl_assoc_prepare_message,</div><div class='add'>+		.update_state = iter_pinctrl_assoc_update_state,</div><div class='add'>+		.process_response = iter_pinctrl_assoc_process_response,</div><div class='add'>+	};</div><div class='add'>+	struct scmi_pinctrl_ipriv ipriv = {</div><div class='add'>+		.selector = selector,</div><div class='add'>+		.type = type,</div><div class='add'>+		.array = array,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!array || !size || type == PIN_TYPE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_validate_id(ph, selector, type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	iter = ph-&gt;hops-&gt;iter_response_init(ph, &amp;ops, size,</div><div class='add'>+					    PINCTRL_LIST_ASSOCIATIONS,</div><div class='add'>+					    sizeof(struct scmi_msg_pinctrl_list_assoc),</div><div class='add'>+					    &amp;ipriv);</div><div class='add'>+	if (IS_ERR(iter))</div><div class='add'>+		return PTR_ERR(iter);</div><div class='add'>+</div><div class='add'>+	return ph-&gt;hops-&gt;iter_response_run(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct scmi_settings_get_ipriv {</div><div class='add'>+	u32 selector;</div><div class='add'>+	enum scmi_pinctrl_selector_type type;</div><div class='add'>+	bool get_all;</div><div class='add'>+	unsigned int *nr_configs;</div><div class='add'>+	enum scmi_pinctrl_conf_type *config_types;</div><div class='add'>+	u32 *config_values;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+iter_pinctrl_settings_get_prepare_message(void *message, u32 desc_index,</div><div class='add'>+					  const void *priv)</div><div class='add'>+{</div><div class='add'>+	struct scmi_msg_settings_get *msg = message;</div><div class='add'>+	const struct scmi_settings_get_ipriv *p = priv;</div><div class='add'>+	u32 attributes;</div><div class='add'>+</div><div class='add'>+	attributes = FIELD_PREP(SELECTOR_MASK, p-&gt;type);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;get_all) {</div><div class='add'>+		attributes |= FIELD_PREP(CONFIG_FLAG_MASK, 1) |</div><div class='add'>+			FIELD_PREP(SKIP_CONFIGS_MASK, desc_index);</div><div class='add'>+	} else {</div><div class='add'>+		attributes |= FIELD_PREP(CONFIG_TYPE_MASK, p-&gt;config_types[0]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg-&gt;attributes = cpu_to_le32(attributes);</div><div class='add'>+	msg-&gt;identifier = cpu_to_le32(p-&gt;selector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+iter_pinctrl_settings_get_update_state(struct scmi_iterator_state *st,</div><div class='add'>+				       const void *response, void *priv)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_resp_settings_get *r = response;</div><div class='add'>+	struct scmi_settings_get_ipriv *p = priv;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;get_all) {</div><div class='add'>+		st-&gt;num_returned = le32_get_bits(r-&gt;num_configs, GENMASK(7, 0));</div><div class='add'>+		st-&gt;num_remaining = le32_get_bits(r-&gt;num_configs, GENMASK(31, 24));</div><div class='add'>+	} else {</div><div class='add'>+		st-&gt;num_returned = 1;</div><div class='add'>+		st-&gt;num_remaining = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+iter_pinctrl_settings_get_process_response(const struct scmi_protocol_handle *ph,</div><div class='add'>+					   const void *response,</div><div class='add'>+					   struct scmi_iterator_state *st,</div><div class='add'>+					   void *priv)</div><div class='add'>+{</div><div class='add'>+	const struct scmi_resp_settings_get *r = response;</div><div class='add'>+	struct scmi_settings_get_ipriv *p = priv;</div><div class='add'>+	u32 type = le32_get_bits(r-&gt;configs[st-&gt;loop_idx * 2], GENMASK(7, 0));</div><div class='add'>+	u32 val = le32_to_cpu(r-&gt;configs[st-&gt;loop_idx * 2 + 1]);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;get_all) {</div><div class='add'>+		p-&gt;config_types[st-&gt;desc_index + st-&gt;loop_idx] = type;</div><div class='add'>+	} else {</div><div class='add'>+		if (p-&gt;config_types[0] != type)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;config_values[st-&gt;desc_index + st-&gt;loop_idx] = val;</div><div class='add'>+	++*p-&gt;nr_configs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+scmi_pinctrl_settings_get(const struct scmi_protocol_handle *ph, u32 selector,</div><div class='add'>+			  enum scmi_pinctrl_selector_type type,</div><div class='add'>+			  unsigned int *nr_configs,</div><div class='add'>+			  enum scmi_pinctrl_conf_type *config_types,</div><div class='add'>+			  u32 *config_values)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	void *iter;</div><div class='add'>+	unsigned int max_configs = *nr_configs;</div><div class='add'>+	struct scmi_iterator_ops ops = {</div><div class='add'>+		.prepare_message = iter_pinctrl_settings_get_prepare_message,</div><div class='add'>+		.update_state = iter_pinctrl_settings_get_update_state,</div><div class='add'>+		.process_response = iter_pinctrl_settings_get_process_response,</div><div class='add'>+	};</div><div class='add'>+	struct scmi_settings_get_ipriv ipriv = {</div><div class='add'>+		.selector = selector,</div><div class='add'>+		.type = type,</div><div class='add'>+		.get_all = (max_configs &gt; 1),</div><div class='add'>+		.nr_configs = nr_configs,</div><div class='add'>+		.config_types = config_types,</div><div class='add'>+		.config_values = config_values,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!config_types || !config_values || type == FUNCTION_TYPE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_validate_id(ph, selector, type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Prepare to count returned configs */</div><div class='add'>+	*nr_configs = 0;</div><div class='add'>+	iter = ph-&gt;hops-&gt;iter_response_init(ph, &amp;ops, max_configs,</div><div class='add'>+					    PINCTRL_SETTINGS_GET,</div><div class='add'>+					    sizeof(struct scmi_msg_settings_get),</div><div class='add'>+					    &amp;ipriv);</div><div class='add'>+	if (IS_ERR(iter))</div><div class='add'>+		return PTR_ERR(iter);</div><div class='add'>+</div><div class='add'>+	return ph-&gt;hops-&gt;iter_response_run(iter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_settings_get_one(const struct scmi_protocol_handle *ph,</div><div class='add'>+					 u32 selector,</div><div class='add'>+					 enum scmi_pinctrl_selector_type type,</div><div class='add'>+					 enum scmi_pinctrl_conf_type config_type,</div><div class='add'>+					 u32 *config_value)</div><div class='add'>+{</div><div class='add'>+	unsigned int nr_configs = 1;</div><div class='add'>+</div><div class='add'>+	return scmi_pinctrl_settings_get(ph, selector, type, &amp;nr_configs,</div><div class='add'>+					 &amp;config_type, config_value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_settings_get_all(const struct scmi_protocol_handle *ph,</div><div class='add'>+					 u32 selector,</div><div class='add'>+					 enum scmi_pinctrl_selector_type type,</div><div class='add'>+					 unsigned int *nr_configs,</div><div class='add'>+					 enum scmi_pinctrl_conf_type *config_types,</div><div class='add'>+					 u32 *config_values)</div><div class='add'>+{</div><div class='add'>+	if (!nr_configs || *nr_configs == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return scmi_pinctrl_settings_get(ph, selector, type, nr_configs,</div><div class='add'>+					 config_types, config_values);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+scmi_pinctrl_settings_conf(const struct scmi_protocol_handle *ph,</div><div class='add'>+			   u32 selector,</div><div class='add'>+			   enum scmi_pinctrl_selector_type type,</div><div class='add'>+			   u32 nr_configs,</div><div class='add'>+			   enum scmi_pinctrl_conf_type *config_type,</div><div class='add'>+			   u32 *config_value)</div><div class='add'>+{</div><div class='add'>+	struct scmi_xfer *t;</div><div class='add'>+	struct scmi_msg_settings_conf *tx;</div><div class='add'>+	u32 attributes;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u32 configs_in_chunk, conf_num = 0;</div><div class='add'>+	u32 chunk;</div><div class='add'>+	int max_msg_size = ph-&gt;hops-&gt;get_max_msg_size(ph);</div><div class='add'>+</div><div class='add'>+	if (!config_type || !config_value || type == FUNCTION_TYPE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_validate_id(ph, selector, type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	configs_in_chunk = (max_msg_size - sizeof(*tx)) / (sizeof(__le32) * 2);</div><div class='add'>+	while (conf_num &lt; nr_configs) {</div><div class='add'>+		chunk = (nr_configs - conf_num &gt; configs_in_chunk) ?</div><div class='add'>+			configs_in_chunk : nr_configs - conf_num;</div><div class='add'>+</div><div class='add'>+		ret = ph-&gt;xops-&gt;xfer_get_init(ph, PINCTRL_SETTINGS_CONFIGURE,</div><div class='add'>+					      sizeof(*tx) +</div><div class='add'>+					      chunk * 2 * sizeof(__le32), 0, &amp;t);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		tx = t-&gt;tx.buf;</div><div class='add'>+		tx-&gt;identifier = cpu_to_le32(selector);</div><div class='add'>+		tx-&gt;function_id = cpu_to_le32(0xFFFFFFFF);</div><div class='add'>+		attributes = FIELD_PREP(GENMASK(1, 0), type) |</div><div class='add'>+			FIELD_PREP(GENMASK(9, 2), chunk);</div><div class='add'>+		tx-&gt;attributes = cpu_to_le32(attributes);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; chunk; i++) {</div><div class='add'>+			tx-&gt;configs[i * 2] =</div><div class='add'>+				cpu_to_le32(config_type[conf_num + i]);</div><div class='add'>+			tx-&gt;configs[i * 2 + 1] =</div><div class='add'>+				cpu_to_le32(config_value[conf_num + i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = ph-&gt;xops-&gt;do_xfer(ph, t);</div><div class='add'>+</div><div class='add'>+		ph-&gt;xops-&gt;xfer_put(ph, t);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		conf_num += chunk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_function_select(const struct scmi_protocol_handle *ph,</div><div class='add'>+					u32 group,</div><div class='add'>+					enum scmi_pinctrl_selector_type type,</div><div class='add'>+					u32 function_id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct scmi_xfer *t;</div><div class='add'>+	struct scmi_msg_settings_conf *tx;</div><div class='add'>+	u32 attributes;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_validate_id(ph, group, type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;xfer_get_init(ph, PINCTRL_SETTINGS_CONFIGURE,</div><div class='add'>+				      sizeof(*tx), 0, &amp;t);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tx = t-&gt;tx.buf;</div><div class='add'>+	tx-&gt;identifier = cpu_to_le32(group);</div><div class='add'>+	tx-&gt;function_id = cpu_to_le32(function_id);</div><div class='add'>+	attributes = FIELD_PREP(GENMASK(1, 0), type) | BIT(10);</div><div class='add'>+	tx-&gt;attributes = cpu_to_le32(attributes);</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;do_xfer(ph, t);</div><div class='add'>+	ph-&gt;xops-&gt;xfer_put(ph, t);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_request_free(const struct scmi_protocol_handle *ph,</div><div class='add'>+				     u32 identifier,</div><div class='add'>+				     enum scmi_pinctrl_selector_type type,</div><div class='add'>+				     enum scmi_pinctrl_protocol_cmd cmd)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct scmi_xfer *t;</div><div class='add'>+	struct scmi_msg_request *tx;</div><div class='add'>+</div><div class='add'>+	if (type == FUNCTION_TYPE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (cmd != PINCTRL_REQUEST &amp;&amp; cmd != PINCTRL_RELEASE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_validate_id(ph, identifier, type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;xfer_get_init(ph, cmd, sizeof(*tx), 0, &amp;t);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tx = t-&gt;tx.buf;</div><div class='add'>+	tx-&gt;identifier = cpu_to_le32(identifier);</div><div class='add'>+	tx-&gt;flags = cpu_to_le32(type);</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;do_xfer(ph, t);</div><div class='add'>+	ph-&gt;xops-&gt;xfer_put(ph, t);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_pin_request(const struct scmi_protocol_handle *ph,</div><div class='add'>+				    u32 pin)</div><div class='add'>+{</div><div class='add'>+	return scmi_pinctrl_request_free(ph, pin, PIN_TYPE, PINCTRL_REQUEST);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_pin_free(const struct scmi_protocol_handle *ph, u32 pin)</div><div class='add'>+{</div><div class='add'>+	return scmi_pinctrl_request_free(ph, pin, PIN_TYPE, PINCTRL_RELEASE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_get_group_info(const struct scmi_protocol_handle *ph,</div><div class='add'>+				       u32 selector,</div><div class='add'>+				       struct scmi_group_info *group)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_attributes(ph, GROUP_TYPE, selector, group-&gt;name,</div><div class='add'>+				      &amp;group-&gt;nr_pins);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!group-&gt;nr_pins) {</div><div class='add'>+		dev_err(ph-&gt;dev, "Group %d has 0 elements", selector);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	group-&gt;group_pins = kmalloc_array(group-&gt;nr_pins,</div><div class='add'>+					  sizeof(*group-&gt;group_pins),</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+	if (!group-&gt;group_pins)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_list_associations(ph, selector, GROUP_TYPE,</div><div class='add'>+					     group-&gt;nr_pins, group-&gt;group_pins);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(group-&gt;group_pins);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	group-&gt;present = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_get_group_name(const struct scmi_protocol_handle *ph,</div><div class='add'>+				       u32 selector, const char **name)</div><div class='add'>+{</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	if (!name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= pi-&gt;nr_groups || pi-&gt;nr_groups == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pi-&gt;groups[selector].present) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = scmi_pinctrl_get_group_info(ph, selector,</div><div class='add'>+						  &amp;pi-&gt;groups[selector]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*name = pi-&gt;groups[selector].name;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_group_pins_get(const struct scmi_protocol_handle *ph,</div><div class='add'>+				       u32 selector, const u32 **pins,</div><div class='add'>+				       u32 *nr_pins)</div><div class='add'>+{</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	if (!pins || !nr_pins)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= pi-&gt;nr_groups || pi-&gt;nr_groups == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pi-&gt;groups[selector].present) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = scmi_pinctrl_get_group_info(ph, selector,</div><div class='add'>+						  &amp;pi-&gt;groups[selector]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*pins = pi-&gt;groups[selector].group_pins;</div><div class='add'>+	*nr_pins = pi-&gt;groups[selector].nr_pins;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_get_function_info(const struct scmi_protocol_handle *ph,</div><div class='add'>+					  u32 selector,</div><div class='add'>+					  struct scmi_function_info *func)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_attributes(ph, FUNCTION_TYPE, selector, func-&gt;name,</div><div class='add'>+				      &amp;func-&gt;nr_groups);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!func-&gt;nr_groups) {</div><div class='add'>+		dev_err(ph-&gt;dev, "Function %d has 0 elements", selector);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	func-&gt;groups = kmalloc_array(func-&gt;nr_groups, sizeof(*func-&gt;groups),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+	if (!func-&gt;groups)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_list_associations(ph, selector, FUNCTION_TYPE,</div><div class='add'>+					     func-&gt;nr_groups, func-&gt;groups);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(func-&gt;groups);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	func-&gt;present = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_get_function_name(const struct scmi_protocol_handle *ph,</div><div class='add'>+					  u32 selector, const char **name)</div><div class='add'>+{</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	if (!name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= pi-&gt;nr_functions || pi-&gt;nr_functions == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pi-&gt;functions[selector].present) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = scmi_pinctrl_get_function_info(ph, selector,</div><div class='add'>+						     &amp;pi-&gt;functions[selector]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*name = pi-&gt;functions[selector].name;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+scmi_pinctrl_function_groups_get(const struct scmi_protocol_handle *ph,</div><div class='add'>+				 u32 selector, u32 *nr_groups,</div><div class='add'>+				 const u32 **groups)</div><div class='add'>+{</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	if (!groups || !nr_groups)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= pi-&gt;nr_functions || pi-&gt;nr_functions == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pi-&gt;functions[selector].present) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = scmi_pinctrl_get_function_info(ph, selector,</div><div class='add'>+						     &amp;pi-&gt;functions[selector]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*groups = pi-&gt;functions[selector].groups;</div><div class='add'>+	*nr_groups = pi-&gt;functions[selector].nr_groups;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_mux_set(const struct scmi_protocol_handle *ph,</div><div class='add'>+				u32 selector, u32 group)</div><div class='add'>+{</div><div class='add'>+	return scmi_pinctrl_function_select(ph, group, GROUP_TYPE, selector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_get_pin_info(const struct scmi_protocol_handle *ph,</div><div class='add'>+				     u32 selector, struct scmi_pin_info *pin)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pin)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_attributes(ph, PIN_TYPE, selector, pin-&gt;name, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pin-&gt;present = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_get_pin_name(const struct scmi_protocol_handle *ph,</div><div class='add'>+				     u32 selector, const char **name)</div><div class='add'>+{</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	if (!name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= pi-&gt;nr_pins)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pi-&gt;pins[selector].present) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = scmi_pinctrl_get_pin_info(ph, selector, &amp;pi-&gt;pins[selector]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*name = pi-&gt;pins[selector].name;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_name_get(const struct scmi_protocol_handle *ph,</div><div class='add'>+				 u32 selector,</div><div class='add'>+				 enum scmi_pinctrl_selector_type type,</div><div class='add'>+				 const char **name)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PIN_TYPE:</div><div class='add'>+		return scmi_pinctrl_get_pin_name(ph, selector, name);</div><div class='add'>+	case GROUP_TYPE:</div><div class='add'>+		return scmi_pinctrl_get_group_name(ph, selector, name);</div><div class='add'>+	case FUNCTION_TYPE:</div><div class='add'>+		return scmi_pinctrl_get_function_name(ph, selector, name);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct scmi_pinctrl_proto_ops pinctrl_proto_ops = {</div><div class='add'>+	.count_get = scmi_pinctrl_count_get,</div><div class='add'>+	.name_get = scmi_pinctrl_name_get,</div><div class='add'>+	.group_pins_get = scmi_pinctrl_group_pins_get,</div><div class='add'>+	.function_groups_get = scmi_pinctrl_function_groups_get,</div><div class='add'>+	.mux_set = scmi_pinctrl_mux_set,</div><div class='add'>+	.settings_get_one = scmi_pinctrl_settings_get_one,</div><div class='add'>+	.settings_get_all = scmi_pinctrl_settings_get_all,</div><div class='add'>+	.settings_conf = scmi_pinctrl_settings_conf,</div><div class='add'>+	.pin_request = scmi_pinctrl_pin_request,</div><div class='add'>+	.pin_free = scmi_pinctrl_pin_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_protocol_init(const struct scmi_protocol_handle *ph)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 version;</div><div class='add'>+	struct scmi_pinctrl_info *pinfo;</div><div class='add'>+</div><div class='add'>+	ret = ph-&gt;xops-&gt;version_get(ph, &amp;version);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ph-&gt;dev, "Pinctrl Version %d.%d\n",</div><div class='add'>+		PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));</div><div class='add'>+</div><div class='add'>+	pinfo = devm_kzalloc(ph-&gt;dev, sizeof(*pinfo), GFP_KERNEL);</div><div class='add'>+	if (!pinfo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = scmi_pinctrl_attributes_get(ph, pinfo);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pinfo-&gt;pins = devm_kcalloc(ph-&gt;dev, pinfo-&gt;nr_pins,</div><div class='add'>+				   sizeof(*pinfo-&gt;pins), GFP_KERNEL);</div><div class='add'>+	if (!pinfo-&gt;pins)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pinfo-&gt;groups = devm_kcalloc(ph-&gt;dev, pinfo-&gt;nr_groups,</div><div class='add'>+				     sizeof(*pinfo-&gt;groups), GFP_KERNEL);</div><div class='add'>+	if (!pinfo-&gt;groups)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pinfo-&gt;functions = devm_kcalloc(ph-&gt;dev, pinfo-&gt;nr_functions,</div><div class='add'>+					sizeof(*pinfo-&gt;functions), GFP_KERNEL);</div><div class='add'>+	if (!pinfo-&gt;functions)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pinfo-&gt;version = version;</div><div class='add'>+</div><div class='add'>+	return ph-&gt;set_priv(ph, pinfo, version);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int scmi_pinctrl_protocol_deinit(const struct scmi_protocol_handle *ph)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct scmi_pinctrl_info *pi = ph-&gt;get_priv(ph);</div><div class='add'>+</div><div class='add'>+	/* Free groups_pins allocated in scmi_pinctrl_get_group_info */</div><div class='add'>+	for (i = 0; i &lt; pi-&gt;nr_groups; i++) {</div><div class='add'>+		if (pi-&gt;groups[i].present) {</div><div class='add'>+			kfree(pi-&gt;groups[i].group_pins);</div><div class='add'>+			pi-&gt;groups[i].present = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Free groups allocated in scmi_pinctrl_get_function_info */</div><div class='add'>+	for (i = 0; i &lt; pi-&gt;nr_functions; i++) {</div><div class='add'>+		if (pi-&gt;functions[i].present) {</div><div class='add'>+			kfree(pi-&gt;functions[i].groups);</div><div class='add'>+			pi-&gt;functions[i].present = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct scmi_protocol scmi_pinctrl = {</div><div class='add'>+	.id = SCMI_PROTOCOL_PINCTRL,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.instance_init = &amp;scmi_pinctrl_protocol_init,</div><div class='add'>+	.instance_deinit = &amp;scmi_pinctrl_protocol_deinit,</div><div class='add'>+	.ops = &amp;pinctrl_proto_ops,</div><div class='add'>+	.supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION,</div><div class='add'>+};</div><div class='add'>+DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(pinctrl, scmi_pinctrl)</div><div class='head'>diff --git a/drivers/firmware/arm_scmi/protocols.h b/drivers/firmware/arm_scmi/protocols.h<br/>index 317d3fb32676..8e95f53bd7b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/protocols.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/arm_scmi/protocols.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/protocols.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/arm_scmi/protocols.h</a></div><div class='hunk'>@@ -29,6 +29,8 @@</div><div class='ctx'> #define PROTOCOL_REV_MAJOR(x)	((u16)(FIELD_GET(PROTOCOL_REV_MAJOR_MASK, (x))))</div><div class='ctx'> #define PROTOCOL_REV_MINOR(x)	((u16)(FIELD_GET(PROTOCOL_REV_MINOR_MASK, (x))))</div><div class='ctx'> </div><div class='add'>+#define SCMI_PROTOCOL_VENDOR_BASE	0x80</div><div class='add'>+</div><div class='ctx'> enum scmi_common_cmd {</div><div class='ctx'> 	PROTOCOL_VERSION = 0x0,</div><div class='ctx'> 	PROTOCOL_ATTRIBUTES = 0x1,</div><div class='hunk'>@@ -258,6 +260,7 @@ struct scmi_fc_info {</div><div class='ctx'>  * @fastchannel_init: A common helper used to initialize FC descriptors by</div><div class='ctx'>  *		      gathering FC descriptions from the SCMI platform server.</div><div class='ctx'>  * @fastchannel_db_ring: A common helper to ring a FC doorbell.</div><div class='add'>+ * @get_max_msg_size: A common helper to get the maximum message size.</div><div class='ctx'>  */</div><div class='ctx'> struct scmi_proto_helpers_ops {</div><div class='ctx'> 	int (*extended_name_get)(const struct scmi_protocol_handle *ph,</div><div class='hunk'>@@ -277,6 +280,7 @@ struct scmi_proto_helpers_ops {</div><div class='ctx'> 				 struct scmi_fc_db_info **p_db,</div><div class='ctx'> 				 u32 *rate_limit);</div><div class='ctx'> 	void (*fastchannel_db_ring)(struct scmi_fc_db_info *db);</div><div class='add'>+	int (*get_max_msg_size)(const struct scmi_protocol_handle *ph);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -323,6 +327,16 @@ typedef int (*scmi_prot_init_ph_fn_t)(const struct scmi_protocol_handle *);</div><div class='ctx'>  *		       protocol by the agent. Each protocol implementation</div><div class='ctx'>  *		       in the agent is supposed to downgrade to match the</div><div class='ctx'>  *		       protocol version supported by the platform.</div><div class='add'>+ * @vendor_id: A firmware vendor string for vendor protocols matching.</div><div class='add'>+ *	       Ignored when @id identifies a standard protocol, cannot be NULL</div><div class='add'>+ *	       otherwise.</div><div class='add'>+ * @sub_vendor_id: A firmware sub_vendor string for vendor protocols matching.</div><div class='add'>+ *		   Ignored if NULL or when @id identifies a standard protocol.</div><div class='add'>+ * @impl_ver: A firmware implementation version for vendor protocols matching.</div><div class='add'>+ *	      Ignored if zero or if @id identifies a standard protocol.</div><div class='add'>+ *</div><div class='add'>+ * Note that vendor protocols matching at load time is performed by attempting</div><div class='add'>+ * the closest match first against the tuple (vendor, sub_vendor, impl_ver)</div><div class='ctx'>  */</div><div class='ctx'> struct scmi_protocol {</div><div class='ctx'> 	const u8				id;</div><div class='hunk'>@@ -332,6 +346,9 @@ struct scmi_protocol {</div><div class='ctx'> 	const void				*ops;</div><div class='ctx'> 	const struct scmi_protocol_events	*events;</div><div class='ctx'> 	unsigned int				supported_version;</div><div class='add'>+	char					*vendor_id;</div><div class='add'>+	char					*sub_vendor_id;</div><div class='add'>+	u32					impl_ver;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(name, proto)	\</div><div class='hunk'>@@ -353,6 +370,7 @@ void __exit scmi_##name##_unregister(void)			\</div><div class='ctx'> DECLARE_SCMI_REGISTER_UNREGISTER(base);</div><div class='ctx'> DECLARE_SCMI_REGISTER_UNREGISTER(clock);</div><div class='ctx'> DECLARE_SCMI_REGISTER_UNREGISTER(perf);</div><div class='add'>+DECLARE_SCMI_REGISTER_UNREGISTER(pinctrl);</div><div class='ctx'> DECLARE_SCMI_REGISTER_UNREGISTER(power);</div><div class='ctx'> DECLARE_SCMI_REGISTER_UNREGISTER(reset);</div><div class='ctx'> DECLARE_SCMI_REGISTER_UNREGISTER(sensors);</div><div class='head'>diff --git a/drivers/firmware/cirrus/cs_dsp.c b/drivers/firmware/cirrus/cs_dsp.c<br/>index 9f3d665cfdcf..0d139e4de37c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/cs_dsp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/cirrus/cs_dsp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/cs_dsp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/cirrus/cs_dsp.c</a></div><div class='hunk'>@@ -819,6 +819,33 @@ int cs_dsp_coeff_write_ctrl(struct cs_dsp_coeff_ctl *ctl,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(cs_dsp_coeff_write_ctrl, FW_CS_DSP);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * cs_dsp_coeff_lock_and_write_ctrl() - Writes the given buffer to the given coefficient control</div><div class='add'>+ * @ctl: pointer to coefficient control</div><div class='add'>+ * @off: word offset at which data should be written</div><div class='add'>+ * @buf: the buffer to write to the given control</div><div class='add'>+ * @len: the length of the buffer in bytes</div><div class='add'>+ *</div><div class='add'>+ * Same as cs_dsp_coeff_write_ctrl() but takes pwr_lock.</div><div class='add'>+ *</div><div class='add'>+ * Return: A negative number on error, 1 when the control value changed and 0 when it has not.</div><div class='add'>+ */</div><div class='add'>+int cs_dsp_coeff_lock_and_write_ctrl(struct cs_dsp_coeff_ctl *ctl,</div><div class='add'>+				     unsigned int off, const void *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct cs_dsp *dsp = ctl-&gt;dsp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_not_held(&amp;dsp-&gt;pwr_lock);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dsp-&gt;pwr_lock);</div><div class='add'>+	ret = cs_dsp_coeff_write_ctrl(ctl, off, buf, len);</div><div class='add'>+	mutex_unlock(&amp;dsp-&gt;pwr_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cs_dsp_coeff_lock_and_write_ctrl);</div><div class='add'>+</div><div class='ctx'> static int cs_dsp_coeff_read_ctrl_raw(struct cs_dsp_coeff_ctl *ctl,</div><div class='ctx'> 				      unsigned int off, void *buf, size_t len)</div><div class='ctx'> {</div><div class='hunk'>@@ -891,6 +918,33 @@ int cs_dsp_coeff_read_ctrl(struct cs_dsp_coeff_ctl *ctl,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(cs_dsp_coeff_read_ctrl, FW_CS_DSP);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * cs_dsp_coeff_lock_and_read_ctrl() - Reads the given coefficient control into the given buffer</div><div class='add'>+ * @ctl: pointer to coefficient control</div><div class='add'>+ * @off: word offset at which data should be read</div><div class='add'>+ * @buf: the buffer to store to the given control</div><div class='add'>+ * @len: the length of the buffer in bytes</div><div class='add'>+ *</div><div class='add'>+ * Same as cs_dsp_coeff_read_ctrl() but takes pwr_lock.</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero for success, a negative number on error.</div><div class='add'>+ */</div><div class='add'>+int cs_dsp_coeff_lock_and_read_ctrl(struct cs_dsp_coeff_ctl *ctl,</div><div class='add'>+				    unsigned int off, void *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct cs_dsp *dsp = ctl-&gt;dsp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_not_held(&amp;dsp-&gt;pwr_lock);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dsp-&gt;pwr_lock);</div><div class='add'>+	ret = cs_dsp_coeff_read_ctrl(ctl, off, buf, len);</div><div class='add'>+	mutex_unlock(&amp;dsp-&gt;pwr_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cs_dsp_coeff_lock_and_read_ctrl);</div><div class='add'>+</div><div class='ctx'> static int cs_dsp_coeff_init_control_caches(struct cs_dsp *dsp)</div><div class='ctx'> {</div><div class='ctx'> 	struct cs_dsp_coeff_ctl *ctl;</div><div class='head'>diff --git a/drivers/firmware/efi/efi-pstore.c b/drivers/firmware/efi/efi-pstore.c<br/>index 833cbb995dd3..5b9dc26e6bcb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/efi-pstore.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/efi-pstore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/efi-pstore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/efi/efi-pstore.c</a></div><div class='hunk'>@@ -162,7 +162,15 @@ static ssize_t efi_pstore_read(struct pstore_record *record)</div><div class='ctx'> 	efi_status_t status;</div><div class='ctx'> </div><div class='ctx'> 	for (;;) {</div><div class='del'>-		varname_size = 1024;</div><div class='add'>+		/*</div><div class='add'>+		 * A small set of old UEFI implementations reject sizes</div><div class='add'>+		 * above a certain threshold, the lowest seen in the wild</div><div class='add'>+		 * is 512.</div><div class='add'>+		 *</div><div class='add'>+		 * TODO: Commonize with the iteration implementation in</div><div class='add'>+		 *       fs/efivarfs to keep all the quirks in one place.</div><div class='add'>+		 */</div><div class='add'>+		varname_size = 512;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If this is the first read() call in the pstore enumeration,</div><div class='head'>diff --git a/drivers/firmware/efi/libstub/fdt.c b/drivers/firmware/efi/libstub/fdt.c<br/>index 70e9789ff9de..6a337f1f8787 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/fdt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/libstub/fdt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/fdt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/efi/libstub/fdt.c</a></div><div class='hunk'>@@ -335,8 +335,8 @@ fail_free_new_fdt:</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='ctx'> 	efi_free(fdt_size, fdt_addr);</div><div class='del'>-</div><div class='del'>-	efi_bs_call(free_pool, priv.runtime_map);</div><div class='add'>+	if (!efi_novamap)</div><div class='add'>+		efi_bs_call(free_pool, priv.runtime_map);</div><div class='ctx'> </div><div class='ctx'> 	return EFI_LOAD_ERROR;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/firmware/efi/unaccepted_memory.c b/drivers/firmware/efi/unaccepted_memory.c<br/>index 5b439d04079c..50f6503fe49f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/unaccepted_memory.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/unaccepted_memory.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/unaccepted_memory.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/efi/unaccepted_memory.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='add'>+#include &lt;linux/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/unaccepted_memory.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Protects unaccepted memory bitmap and accepting_list */</div><div class='hunk'>@@ -149,6 +150,9 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_del(&amp;range.list);</div><div class='add'>+</div><div class='add'>+	touch_softlockup_watchdog();</div><div class='add'>+</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;unaccepted_memory_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/efi/vars.c b/drivers/firmware/efi/vars.c<br/>index f654e6f6af87..4056ba7f3440 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/vars.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/efi/vars.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/vars.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/efi/vars.c</a></div><div class='hunk'>@@ -215,7 +215,7 @@ efi_status_t efivar_set_variable_locked(efi_char16_t *name, efi_guid_t *vendor,</div><div class='ctx'> </div><div class='ctx'> 	if (data_size &gt; 0) {</div><div class='ctx'> 		status = check_var_size(nonblocking, attr,</div><div class='del'>-					data_size + ucs2_strsize(name, 1024));</div><div class='add'>+					data_size + ucs2_strsize(name, EFI_VAR_NAME_LEN));</div><div class='ctx'> 		if (status != EFI_SUCCESS)</div><div class='ctx'> 			return status;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/firmware/google/cbmem.c b/drivers/firmware/google/cbmem.c<br/>index c2bffdc352a3..6f810d720f4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/google/cbmem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/google/cbmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/google/cbmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/google/cbmem.c</a></div><div class='hunk'>@@ -124,7 +124,6 @@ static struct coreboot_driver cbmem_entry_driver = {</div><div class='ctx'> 	.probe = cbmem_entry_probe,</div><div class='ctx'> 	.drv = {</div><div class='ctx'> 		.name = "cbmem",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.dev_groups = dev_groups,</div><div class='ctx'> 	},</div><div class='ctx'> 	.id_table = cbmem_ids,</div><div class='head'>diff --git a/drivers/firmware/google/coreboot_table.c b/drivers/firmware/google/coreboot_table.c<br/>index d4b6e581a6c6..fa7752f6e89b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/google/coreboot_table.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/google/coreboot_table.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/google/coreboot_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/google/coreboot_table.c</a></div><div class='hunk'>@@ -85,13 +85,15 @@ static void coreboot_device_release(struct device *dev)</div><div class='ctx'> 	kfree(device);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int coreboot_driver_register(struct coreboot_driver *driver)</div><div class='add'>+int __coreboot_driver_register(struct coreboot_driver *driver,</div><div class='add'>+			       struct module *owner)</div><div class='ctx'> {</div><div class='ctx'> 	driver-&gt;drv.bus = &amp;coreboot_bus_type;</div><div class='add'>+	driver-&gt;drv.owner = owner;</div><div class='ctx'> </div><div class='ctx'> 	return driver_register(&amp;driver-&gt;drv);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(coreboot_driver_register);</div><div class='add'>+EXPORT_SYMBOL(__coreboot_driver_register);</div><div class='ctx'> </div><div class='ctx'> void coreboot_driver_unregister(struct coreboot_driver *driver)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/firmware/google/coreboot_table.h b/drivers/firmware/google/coreboot_table.h<br/>index 86427989c57f..bb6f0f7299b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/google/coreboot_table.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/google/coreboot_table.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/google/coreboot_table.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/google/coreboot_table.h</a></div><div class='hunk'>@@ -97,8 +97,12 @@ struct coreboot_driver {</div><div class='ctx'> 	const struct coreboot_device_id *id_table;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* use a macro to avoid include chaining to get THIS_MODULE */</div><div class='add'>+#define coreboot_driver_register(driver) \</div><div class='add'>+	__coreboot_driver_register(driver, THIS_MODULE)</div><div class='ctx'> /* Register a driver that uses the data from a coreboot table. */</div><div class='del'>-int coreboot_driver_register(struct coreboot_driver *driver);</div><div class='add'>+int __coreboot_driver_register(struct coreboot_driver *driver,</div><div class='add'>+			       struct module *owner);</div><div class='ctx'> </div><div class='ctx'> /* Unregister a driver that uses the data from a coreboot table. */</div><div class='ctx'> void coreboot_driver_unregister(struct coreboot_driver *driver);</div><div class='head'>diff --git a/drivers/firmware/microchip/mpfs-auto-update.c b/drivers/firmware/microchip/mpfs-auto-update.c<br/>index fbeeaee4ac85..835a19a7a3a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/microchip/mpfs-auto-update.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/microchip/mpfs-auto-update.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/microchip/mpfs-auto-update.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/microchip/mpfs-auto-update.c</a></div><div class='hunk'>@@ -206,10 +206,12 @@ static int mpfs_auto_update_verify_image(struct fw_upload *fw_uploader)</div><div class='ctx'> 	if (ret | response-&gt;resp_status) {</div><div class='ctx'> 		dev_warn(priv-&gt;dev, "Verification of Upgrade Image failed!\n");</div><div class='ctx'> 		ret = ret ? ret : -EBADMSG;</div><div class='add'>+		goto free_message;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(priv-&gt;dev, "Verification of Upgrade Image passed!\n");</div><div class='ctx'> </div><div class='add'>+free_message:</div><div class='ctx'> 	devm_kfree(priv-&gt;dev, message);</div><div class='ctx'> free_response:</div><div class='ctx'> 	devm_kfree(priv-&gt;dev, response);</div><div class='hunk'>@@ -265,7 +267,7 @@ static int mpfs_auto_update_set_image_address(struct mpfs_auto_update_priv *priv</div><div class='ctx'> 	       AUTO_UPDATE_DIRECTORY_WIDTH);</div><div class='ctx'> 	memset(buffer + AUTO_UPDATE_BLANK_DIRECTORY, 0x0, AUTO_UPDATE_DIRECTORY_WIDTH);</div><div class='ctx'> </div><div class='del'>-	dev_info(priv-&gt;dev, "Writing the image address (%x) to the flash directory (%llx)\n",</div><div class='add'>+	dev_info(priv-&gt;dev, "Writing the image address (0x%x) to the flash directory (0x%llx)\n",</div><div class='ctx'> 		 image_address, directory_address);</div><div class='ctx'> </div><div class='ctx'> 	ret = mtd_write(priv-&gt;flash, 0x0, erase_size, &amp;bytes_written, (u_char *)buffer);</div><div class='hunk'>@@ -313,7 +315,7 @@ static int mpfs_auto_update_write_bitstream(struct fw_upload *fw_uploader, const</div><div class='ctx'> 	erase.len = round_up(size, (size_t)priv-&gt;flash-&gt;erasesize);</div><div class='ctx'> 	erase.addr = image_address;</div><div class='ctx'> </div><div class='del'>-	dev_info(priv-&gt;dev, "Erasing the flash at address (%x)\n", image_address);</div><div class='add'>+	dev_info(priv-&gt;dev, "Erasing the flash at address (0x%x)\n", image_address);</div><div class='ctx'> 	ret = mtd_erase(priv-&gt;flash, &amp;erase);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -323,7 +325,7 @@ static int mpfs_auto_update_write_bitstream(struct fw_upload *fw_uploader, const</div><div class='ctx'> 	 * will do all of that itself - including verifying that the bitstream</div><div class='ctx'> 	 * is valid.</div><div class='ctx'> 	 */</div><div class='del'>-	dev_info(priv-&gt;dev, "Writing the image to the flash at address (%x)\n", image_address);</div><div class='add'>+	dev_info(priv-&gt;dev, "Writing the image to the flash at address (0x%x)\n", image_address);</div><div class='ctx'> 	ret = mtd_write(priv-&gt;flash, (loff_t)image_address, size, &amp;bytes_written, data);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c b/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c<br/>index 32188f098ef3..bc550ad0dbe0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/qcom/qcom_qseecom_uefisecapp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/qcom/qcom_qseecom_uefisecapp.c</a></div><div class='hunk'>@@ -221,6 +221,19 @@ struct qsee_rsp_uefi_query_variable_info {</div><div class='ctx'>  * alignment of 8 bytes (64 bits) for GUIDs. Our definition of efi_guid_t,</div><div class='ctx'>  * however, has an alignment of 4 byte (32 bits). So far, this seems to work</div><div class='ctx'>  * fine here. See also the comment on the typedef of efi_guid_t.</div><div class='add'>+ *</div><div class='add'>+ * Note: It looks like uefisecapp is quite picky about how the memory passed to</div><div class='add'>+ * it is structured and aligned. In particular the request/response setup used</div><div class='add'>+ * for QSEE_CMD_UEFI_GET_VARIABLE. While qcom_qseecom_app_send(), in theory,</div><div class='add'>+ * accepts separate buffers/addresses for the request and response parts, in</div><div class='add'>+ * practice, however, it seems to expect them to be both part of a larger</div><div class='add'>+ * contiguous block. We initially allocated separate buffers for the request</div><div class='add'>+ * and response but this caused the QSEE_CMD_UEFI_GET_VARIABLE command to</div><div class='add'>+ * either not write any response to the response buffer or outright crash the</div><div class='add'>+ * device. Therefore, we now allocate a single contiguous block of DMA memory</div><div class='add'>+ * for both and properly align the data using the macros below. In particular,</div><div class='add'>+ * request and response structs are aligned at 8 byte (via __reqdata_offs()),</div><div class='add'>+ * following the driver that this has been reverse-engineered from.</div><div class='ctx'>  */</div><div class='ctx'> #define qcuefi_buf_align_fields(fields...)					\</div><div class='ctx'> 	({									\</div><div class='hunk'>@@ -244,6 +257,12 @@ struct qsee_rsp_uefi_query_variable_info {</div><div class='ctx'> #define __array_offs(type, count, offset)					\</div><div class='ctx'> 	__field_impl(sizeof(type) * (count), __alignof__(type), offset)</div><div class='ctx'> </div><div class='add'>+#define __array_offs_aligned(type, count, align, offset)			\</div><div class='add'>+	__field_impl(sizeof(type) * (count), align, offset)</div><div class='add'>+</div><div class='add'>+#define __reqdata_offs(size, offset)						\</div><div class='add'>+	__array_offs_aligned(u8, size, 8, offset)</div><div class='add'>+</div><div class='ctx'> #define __array(type, count)		__array_offs(type, count, NULL)</div><div class='ctx'> #define __field_offs(type, offset)	__array_offs(type, 1, offset)</div><div class='ctx'> #define __field(type)			__array_offs(type, 1, NULL)</div><div class='hunk'>@@ -277,10 +296,15 @@ static efi_status_t qsee_uefi_get_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 	unsigned long buffer_size = *data_size;</div><div class='ctx'> 	efi_status_t efi_status = EFI_SUCCESS;</div><div class='ctx'> 	unsigned long name_length;</div><div class='add'>+	dma_addr_t cmd_buf_dma;</div><div class='add'>+	size_t cmd_buf_size;</div><div class='add'>+	void *cmd_buf;</div><div class='ctx'> 	size_t guid_offs;</div><div class='ctx'> 	size_t name_offs;</div><div class='ctx'> 	size_t req_size;</div><div class='ctx'> 	size_t rsp_size;</div><div class='add'>+	size_t req_offs;</div><div class='add'>+	size_t rsp_offs;</div><div class='ctx'> 	ssize_t status;</div><div class='ctx'> </div><div class='ctx'> 	if (!name || !guid)</div><div class='hunk'>@@ -304,17 +328,19 @@ static efi_status_t qsee_uefi_get_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 		__array(u8, buffer_size)</div><div class='ctx'> 	);</div><div class='ctx'> </div><div class='del'>-	req_data = kzalloc(req_size, GFP_KERNEL);</div><div class='del'>-	if (!req_data) {</div><div class='add'>+	cmd_buf_size = qcuefi_buf_align_fields(</div><div class='add'>+		__reqdata_offs(req_size, &amp;req_offs)</div><div class='add'>+		__reqdata_offs(rsp_size, &amp;rsp_offs)</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	cmd_buf = qseecom_dma_alloc(qcuefi-&gt;client, cmd_buf_size, &amp;cmd_buf_dma, GFP_KERNEL);</div><div class='add'>+	if (!cmd_buf) {</div><div class='ctx'> 		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rsp_data = kzalloc(rsp_size, GFP_KERNEL);</div><div class='del'>-	if (!rsp_data) {</div><div class='del'>-		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='del'>-		goto out_free_req;</div><div class='del'>-	}</div><div class='add'>+	req_data = cmd_buf + req_offs;</div><div class='add'>+	rsp_data = cmd_buf + rsp_offs;</div><div class='ctx'> </div><div class='ctx'> 	req_data-&gt;command_id = QSEE_CMD_UEFI_GET_VARIABLE;</div><div class='ctx'> 	req_data-&gt;data_size = buffer_size;</div><div class='hunk'>@@ -332,7 +358,9 @@ static efi_status_t qsee_uefi_get_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> </div><div class='ctx'> 	memcpy(((void *)req_data) + req_data-&gt;guid_offset, guid, req_data-&gt;guid_size);</div><div class='ctx'> </div><div class='del'>-	status = qcom_qseecom_app_send(qcuefi-&gt;client, req_data, req_size, rsp_data, rsp_size);</div><div class='add'>+	status = qcom_qseecom_app_send(qcuefi-&gt;client,</div><div class='add'>+				       cmd_buf_dma + req_offs, req_size,</div><div class='add'>+				       cmd_buf_dma + rsp_offs, rsp_size);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		efi_status = EFI_DEVICE_ERROR;</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -407,9 +435,7 @@ static efi_status_t qsee_uefi_get_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 	memcpy(data, ((void *)rsp_data) + rsp_data-&gt;data_offset, rsp_data-&gt;data_size);</div><div class='ctx'> </div><div class='ctx'> out_free:</div><div class='del'>-	kfree(rsp_data);</div><div class='del'>-out_free_req:</div><div class='del'>-	kfree(req_data);</div><div class='add'>+	qseecom_dma_free(qcuefi-&gt;client, cmd_buf_size, cmd_buf, cmd_buf_dma);</div><div class='ctx'> out:</div><div class='ctx'> 	return efi_status;</div><div class='ctx'> }</div><div class='hunk'>@@ -422,10 +448,15 @@ static efi_status_t qsee_uefi_set_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 	struct qsee_rsp_uefi_set_variable *rsp_data;</div><div class='ctx'> 	efi_status_t efi_status = EFI_SUCCESS;</div><div class='ctx'> 	unsigned long name_length;</div><div class='add'>+	dma_addr_t cmd_buf_dma;</div><div class='add'>+	size_t cmd_buf_size;</div><div class='add'>+	void *cmd_buf;</div><div class='ctx'> 	size_t name_offs;</div><div class='ctx'> 	size_t guid_offs;</div><div class='ctx'> 	size_t data_offs;</div><div class='ctx'> 	size_t req_size;</div><div class='add'>+	size_t req_offs;</div><div class='add'>+	size_t rsp_offs;</div><div class='ctx'> 	ssize_t status;</div><div class='ctx'> </div><div class='ctx'> 	if (!name || !guid)</div><div class='hunk'>@@ -450,17 +481,19 @@ static efi_status_t qsee_uefi_set_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 		__array_offs(u8, data_size, &amp;data_offs)</div><div class='ctx'> 	);</div><div class='ctx'> </div><div class='del'>-	req_data = kzalloc(req_size, GFP_KERNEL);</div><div class='del'>-	if (!req_data) {</div><div class='add'>+	cmd_buf_size = qcuefi_buf_align_fields(</div><div class='add'>+		__reqdata_offs(req_size, &amp;req_offs)</div><div class='add'>+		__reqdata_offs(sizeof(*rsp_data), &amp;rsp_offs)</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	cmd_buf = qseecom_dma_alloc(qcuefi-&gt;client, cmd_buf_size, &amp;cmd_buf_dma, GFP_KERNEL);</div><div class='add'>+	if (!cmd_buf) {</div><div class='ctx'> 		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rsp_data = kzalloc(sizeof(*rsp_data), GFP_KERNEL);</div><div class='del'>-	if (!rsp_data) {</div><div class='del'>-		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='del'>-		goto out_free_req;</div><div class='del'>-	}</div><div class='add'>+	req_data = cmd_buf + req_offs;</div><div class='add'>+	rsp_data = cmd_buf + rsp_offs;</div><div class='ctx'> </div><div class='ctx'> 	req_data-&gt;command_id = QSEE_CMD_UEFI_SET_VARIABLE;</div><div class='ctx'> 	req_data-&gt;attributes = attributes;</div><div class='hunk'>@@ -483,8 +516,9 @@ static efi_status_t qsee_uefi_set_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 	if (data_size)</div><div class='ctx'> 		memcpy(((void *)req_data) + req_data-&gt;data_offset, data, req_data-&gt;data_size);</div><div class='ctx'> </div><div class='del'>-	status = qcom_qseecom_app_send(qcuefi-&gt;client, req_data, req_size, rsp_data,</div><div class='del'>-				       sizeof(*rsp_data));</div><div class='add'>+	status = qcom_qseecom_app_send(qcuefi-&gt;client,</div><div class='add'>+				       cmd_buf_dma + req_offs, req_size,</div><div class='add'>+				       cmd_buf_dma + rsp_offs, sizeof(*rsp_data));</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		efi_status = EFI_DEVICE_ERROR;</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -507,9 +541,7 @@ static efi_status_t qsee_uefi_set_variable(struct qcuefi_client *qcuefi, const e</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out_free:</div><div class='del'>-	kfree(rsp_data);</div><div class='del'>-out_free_req:</div><div class='del'>-	kfree(req_data);</div><div class='add'>+	qseecom_dma_free(qcuefi-&gt;client, cmd_buf_size, cmd_buf, cmd_buf_dma);</div><div class='ctx'> out:</div><div class='ctx'> 	return efi_status;</div><div class='ctx'> }</div><div class='hunk'>@@ -521,10 +553,15 @@ static efi_status_t qsee_uefi_get_next_variable(struct qcuefi_client *qcuefi,</div><div class='ctx'> 	struct qsee_req_uefi_get_next_variable *req_data;</div><div class='ctx'> 	struct qsee_rsp_uefi_get_next_variable *rsp_data;</div><div class='ctx'> 	efi_status_t efi_status = EFI_SUCCESS;</div><div class='add'>+	dma_addr_t cmd_buf_dma;</div><div class='add'>+	size_t cmd_buf_size;</div><div class='add'>+	void *cmd_buf;</div><div class='ctx'> 	size_t guid_offs;</div><div class='ctx'> 	size_t name_offs;</div><div class='ctx'> 	size_t req_size;</div><div class='ctx'> 	size_t rsp_size;</div><div class='add'>+	size_t req_offs;</div><div class='add'>+	size_t rsp_offs;</div><div class='ctx'> 	ssize_t status;</div><div class='ctx'> </div><div class='ctx'> 	if (!name_size || !name || !guid)</div><div class='hunk'>@@ -545,17 +582,19 @@ static efi_status_t qsee_uefi_get_next_variable(struct qcuefi_client *qcuefi,</div><div class='ctx'> 		__array(*name, *name_size / sizeof(*name))</div><div class='ctx'> 	);</div><div class='ctx'> </div><div class='del'>-	req_data = kzalloc(req_size, GFP_KERNEL);</div><div class='del'>-	if (!req_data) {</div><div class='add'>+	cmd_buf_size = qcuefi_buf_align_fields(</div><div class='add'>+		__reqdata_offs(req_size, &amp;req_offs)</div><div class='add'>+		__reqdata_offs(rsp_size, &amp;rsp_offs)</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	cmd_buf = qseecom_dma_alloc(qcuefi-&gt;client, cmd_buf_size, &amp;cmd_buf_dma, GFP_KERNEL);</div><div class='add'>+	if (!cmd_buf) {</div><div class='ctx'> 		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rsp_data = kzalloc(rsp_size, GFP_KERNEL);</div><div class='del'>-	if (!rsp_data) {</div><div class='del'>-		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='del'>-		goto out_free_req;</div><div class='del'>-	}</div><div class='add'>+	req_data = cmd_buf + req_offs;</div><div class='add'>+	rsp_data = cmd_buf + rsp_offs;</div><div class='ctx'> </div><div class='ctx'> 	req_data-&gt;command_id = QSEE_CMD_UEFI_GET_NEXT_VARIABLE;</div><div class='ctx'> 	req_data-&gt;guid_offset = guid_offs;</div><div class='hunk'>@@ -572,7 +611,9 @@ static efi_status_t qsee_uefi_get_next_variable(struct qcuefi_client *qcuefi,</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = qcom_qseecom_app_send(qcuefi-&gt;client, req_data, req_size, rsp_data, rsp_size);</div><div class='add'>+	status = qcom_qseecom_app_send(qcuefi-&gt;client,</div><div class='add'>+				       cmd_buf_dma + req_offs, req_size,</div><div class='add'>+				       cmd_buf_dma + rsp_offs, rsp_size);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		efi_status = EFI_DEVICE_ERROR;</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -645,9 +686,7 @@ static efi_status_t qsee_uefi_get_next_variable(struct qcuefi_client *qcuefi,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out_free:</div><div class='del'>-	kfree(rsp_data);</div><div class='del'>-out_free_req:</div><div class='del'>-	kfree(req_data);</div><div class='add'>+	qseecom_dma_free(qcuefi-&gt;client, cmd_buf_size, cmd_buf, cmd_buf_dma);</div><div class='ctx'> out:</div><div class='ctx'> 	return efi_status;</div><div class='ctx'> }</div><div class='hunk'>@@ -659,26 +698,34 @@ static efi_status_t qsee_uefi_query_variable_info(struct qcuefi_client *qcuefi,</div><div class='ctx'> 	struct qsee_req_uefi_query_variable_info *req_data;</div><div class='ctx'> 	struct qsee_rsp_uefi_query_variable_info *rsp_data;</div><div class='ctx'> 	efi_status_t efi_status = EFI_SUCCESS;</div><div class='add'>+	dma_addr_t cmd_buf_dma;</div><div class='add'>+	size_t cmd_buf_size;</div><div class='add'>+	void *cmd_buf;</div><div class='add'>+	size_t req_offs;</div><div class='add'>+	size_t rsp_offs;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	req_data = kzalloc(sizeof(*req_data), GFP_KERNEL);</div><div class='del'>-	if (!req_data) {</div><div class='add'>+	cmd_buf_size = qcuefi_buf_align_fields(</div><div class='add'>+		__reqdata_offs(sizeof(*req_data), &amp;req_offs)</div><div class='add'>+		__reqdata_offs(sizeof(*rsp_data), &amp;rsp_offs)</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	cmd_buf = qseecom_dma_alloc(qcuefi-&gt;client, cmd_buf_size, &amp;cmd_buf_dma, GFP_KERNEL);</div><div class='add'>+	if (!cmd_buf) {</div><div class='ctx'> 		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rsp_data = kzalloc(sizeof(*rsp_data), GFP_KERNEL);</div><div class='del'>-	if (!rsp_data) {</div><div class='del'>-		efi_status = EFI_OUT_OF_RESOURCES;</div><div class='del'>-		goto out_free_req;</div><div class='del'>-	}</div><div class='add'>+	req_data = cmd_buf + req_offs;</div><div class='add'>+	rsp_data = cmd_buf + rsp_offs;</div><div class='ctx'> </div><div class='ctx'> 	req_data-&gt;command_id = QSEE_CMD_UEFI_QUERY_VARIABLE_INFO;</div><div class='ctx'> 	req_data-&gt;attributes = attr;</div><div class='ctx'> 	req_data-&gt;length = sizeof(*req_data);</div><div class='ctx'> </div><div class='del'>-	status = qcom_qseecom_app_send(qcuefi-&gt;client, req_data, sizeof(*req_data), rsp_data,</div><div class='del'>-				       sizeof(*rsp_data));</div><div class='add'>+	status = qcom_qseecom_app_send(qcuefi-&gt;client,</div><div class='add'>+				       cmd_buf_dma + req_offs, sizeof(*req_data),</div><div class='add'>+				       cmd_buf_dma + rsp_offs, sizeof(*rsp_data));</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		efi_status = EFI_DEVICE_ERROR;</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -711,9 +758,7 @@ static efi_status_t qsee_uefi_query_variable_info(struct qcuefi_client *qcuefi,</div><div class='ctx'> 		*max_variable_size = rsp_data-&gt;max_variable_size;</div><div class='ctx'> </div><div class='ctx'> out_free:</div><div class='del'>-	kfree(rsp_data);</div><div class='del'>-out_free_req:</div><div class='del'>-	kfree(req_data);</div><div class='add'>+	qseecom_dma_free(qcuefi-&gt;client, cmd_buf_size, cmd_buf, cmd_buf_dma);</div><div class='ctx'> out:</div><div class='ctx'> 	return efi_status;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c<br/>index 520de9b5633a..68f4df7e6c3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/qcom/qcom_scm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/qcom/qcom_scm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/qcom/qcom_scm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/qcom/qcom_scm.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/arm-smccc.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/completion.h&gt;</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='hunk'>@@ -114,6 +116,10 @@ static const u8 qcom_scm_cpu_warm_bits[QCOM_SCM_BOOT_MAX_CPUS] = {</div><div class='ctx'> #define QCOM_SMC_WAITQ_FLAG_WAKE_ONE	BIT(0)</div><div class='ctx'> #define QCOM_SMC_WAITQ_FLAG_WAKE_ALL	BIT(1)</div><div class='ctx'> </div><div class='add'>+#define QCOM_DLOAD_MASK		GENMASK(5, 4)</div><div class='add'>+#define QCOM_DLOAD_NODUMP	0</div><div class='add'>+#define QCOM_DLOAD_FULLDUMP	1</div><div class='add'>+</div><div class='ctx'> static const char * const qcom_scm_convention_names[] = {</div><div class='ctx'> 	[SMC_CONVENTION_UNKNOWN] = "unknown",</div><div class='ctx'> 	[SMC_CONVENTION_ARM_32] = "smc arm 32",</div><div class='hunk'>@@ -163,9 +169,6 @@ static int qcom_scm_bw_enable(void)</div><div class='ctx'> 	if (!__scm-&gt;path)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(__scm-&gt;path))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;__scm-&gt;scm_bw_lock);</div><div class='ctx'> 	if (!__scm-&gt;scm_vote_count) {</div><div class='ctx'> 		ret = icc_set_bw(__scm-&gt;path, 0, UINT_MAX);</div><div class='hunk'>@@ -183,7 +186,7 @@ err_bw:</div><div class='ctx'> </div><div class='ctx'> static void qcom_scm_bw_disable(void)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(__scm-&gt;path))</div><div class='add'>+	if (!__scm-&gt;path)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;__scm-&gt;scm_bw_lock);</div><div class='hunk'>@@ -496,19 +499,32 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)</div><div class='ctx'> 	return qcom_scm_call_atomic(__scm-&gt;dev, &amp;desc, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qcom_scm_io_rmw(phys_addr_t addr, unsigned int mask, unsigned int val)</div><div class='add'>+{</div><div class='add'>+	unsigned int old;</div><div class='add'>+	unsigned int new;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qcom_scm_io_readl(addr, &amp;old);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	new = (old &amp; ~mask) | (val &amp; mask);</div><div class='add'>+</div><div class='add'>+	return qcom_scm_io_writel(addr, new);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void qcom_scm_set_download_mode(bool enable)</div><div class='ctx'> {</div><div class='del'>-	bool avail;</div><div class='add'>+	u32 val = enable ? QCOM_DLOAD_FULLDUMP : QCOM_DLOAD_NODUMP;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	avail = __qcom_scm_is_call_available(__scm-&gt;dev,</div><div class='del'>-					     QCOM_SCM_SVC_BOOT,</div><div class='del'>-					     QCOM_SCM_BOOT_SET_DLOAD_MODE);</div><div class='del'>-	if (avail) {</div><div class='add'>+	if (__scm-&gt;dload_mode_addr) {</div><div class='add'>+		ret = qcom_scm_io_rmw(__scm-&gt;dload_mode_addr, QCOM_DLOAD_MASK,</div><div class='add'>+				      FIELD_PREP(QCOM_DLOAD_MASK, val));</div><div class='add'>+	} else if (__qcom_scm_is_call_available(__scm-&gt;dev, QCOM_SCM_SVC_BOOT,</div><div class='add'>+						QCOM_SCM_BOOT_SET_DLOAD_MODE)) {</div><div class='ctx'> 		ret = __qcom_scm_set_dload_mode(__scm-&gt;dev, enable);</div><div class='del'>-	} else if (__scm-&gt;dload_mode_addr) {</div><div class='del'>-		ret = qcom_scm_io_writel(__scm-&gt;dload_mode_addr,</div><div class='del'>-				enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_err(__scm-&gt;dev,</div><div class='ctx'> 			"No available mechanism for setting download mode\n");</div><div class='hunk'>@@ -557,10 +573,9 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,</div><div class='ctx'> 	 */</div><div class='ctx'> 	mdata_buf = dma_alloc_coherent(__scm-&gt;dev, size, &amp;mdata_phys,</div><div class='ctx'> 				       GFP_KERNEL);</div><div class='del'>-	if (!mdata_buf) {</div><div class='del'>-		dev_err(__scm-&gt;dev, "Allocation of metadata buffer failed.\n");</div><div class='add'>+	if (!mdata_buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	memcpy(mdata_buf, metadata, size);</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_clk_enable();</div><div class='hunk'>@@ -569,13 +584,14 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_bw_enable();</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto disable_clk;</div><div class='ctx'> </div><div class='ctx'> 	desc.args[1] = mdata_phys;</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_call(__scm-&gt;dev, &amp;desc, &amp;res);</div><div class='del'>-</div><div class='ctx'> 	qcom_scm_bw_disable();</div><div class='add'>+</div><div class='add'>+disable_clk:</div><div class='ctx'> 	qcom_scm_clk_disable();</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -637,10 +653,12 @@ int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_bw_enable();</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto disable_clk;</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_call(__scm-&gt;dev, &amp;desc, &amp;res);</div><div class='ctx'> 	qcom_scm_bw_disable();</div><div class='add'>+</div><div class='add'>+disable_clk:</div><div class='ctx'> 	qcom_scm_clk_disable();</div><div class='ctx'> </div><div class='ctx'> 	return ret ? : res.result[0];</div><div class='hunk'>@@ -672,10 +690,12 @@ int qcom_scm_pas_auth_and_reset(u32 peripheral)</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_bw_enable();</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto disable_clk;</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_call(__scm-&gt;dev, &amp;desc, &amp;res);</div><div class='ctx'> 	qcom_scm_bw_disable();</div><div class='add'>+</div><div class='add'>+disable_clk:</div><div class='ctx'> 	qcom_scm_clk_disable();</div><div class='ctx'> </div><div class='ctx'> 	return ret ? : res.result[0];</div><div class='hunk'>@@ -706,11 +726,12 @@ int qcom_scm_pas_shutdown(u32 peripheral)</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_bw_enable();</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto disable_clk;</div><div class='ctx'> </div><div class='ctx'> 	ret = qcom_scm_call(__scm-&gt;dev, &amp;desc, &amp;res);</div><div class='del'>-</div><div class='ctx'> 	qcom_scm_bw_disable();</div><div class='add'>+</div><div class='add'>+disable_clk:</div><div class='ctx'> 	qcom_scm_clk_disable();</div><div class='ctx'> </div><div class='ctx'> 	return ret ? : res.result[0];</div><div class='hunk'>@@ -1576,9 +1597,9 @@ EXPORT_SYMBOL_GPL(qcom_scm_qseecom_app_get_id);</div><div class='ctx'> /**</div><div class='ctx'>  * qcom_scm_qseecom_app_send() - Send to and receive data from a given QSEE app.</div><div class='ctx'>  * @app_id:   The ID of the target app.</div><div class='del'>- * @req:      Request buffer sent to the app (must be DMA-mappable).</div><div class='add'>+ * @req:      DMA address of the request buffer sent to the app.</div><div class='ctx'>  * @req_size: Size of the request buffer.</div><div class='del'>- * @rsp:      Response buffer, written to by the app (must be DMA-mappable).</div><div class='add'>+ * @rsp:      DMA address of the response buffer, written to by the app.</div><div class='ctx'>  * @rsp_size: Size of the response buffer.</div><div class='ctx'>  *</div><div class='ctx'>  * Sends a request to the QSEE app associated with the given ID and read back</div><div class='hunk'>@@ -1589,33 +1610,13 @@ EXPORT_SYMBOL_GPL(qcom_scm_qseecom_app_get_id);</div><div class='ctx'>  *</div><div class='ctx'>  * Return: Zero on success, nonzero on failure.</div><div class='ctx'>  */</div><div class='del'>-int qcom_scm_qseecom_app_send(u32 app_id, void *req, size_t req_size, void *rsp,</div><div class='del'>-			      size_t rsp_size)</div><div class='add'>+int qcom_scm_qseecom_app_send(u32 app_id, dma_addr_t req, size_t req_size,</div><div class='add'>+			      dma_addr_t rsp, size_t rsp_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct qcom_scm_qseecom_resp res = {};</div><div class='ctx'> 	struct qcom_scm_desc desc = {};</div><div class='del'>-	dma_addr_t req_phys;</div><div class='del'>-	dma_addr_t rsp_phys;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	/* Map request buffer */</div><div class='del'>-	req_phys = dma_map_single(__scm-&gt;dev, req, req_size, DMA_TO_DEVICE);</div><div class='del'>-	status = dma_mapping_error(__scm-&gt;dev, req_phys);</div><div class='del'>-	if (status) {</div><div class='del'>-		dev_err(__scm-&gt;dev, "qseecom: failed to map request buffer\n");</div><div class='del'>-		return status;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Map response buffer */</div><div class='del'>-	rsp_phys = dma_map_single(__scm-&gt;dev, rsp, rsp_size, DMA_FROM_DEVICE);</div><div class='del'>-	status = dma_mapping_error(__scm-&gt;dev, rsp_phys);</div><div class='del'>-	if (status) {</div><div class='del'>-		dma_unmap_single(__scm-&gt;dev, req_phys, req_size, DMA_TO_DEVICE);</div><div class='del'>-		dev_err(__scm-&gt;dev, "qseecom: failed to map response buffer\n");</div><div class='del'>-		return status;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set up SCM call data */</div><div class='ctx'> 	desc.owner = QSEECOM_TZ_OWNER_TZ_APPS;</div><div class='ctx'> 	desc.svc = QSEECOM_TZ_SVC_APP_ID_PLACEHOLDER;</div><div class='ctx'> 	desc.cmd = QSEECOM_TZ_CMD_APP_SEND;</div><div class='hunk'>@@ -1623,18 +1624,13 @@ int qcom_scm_qseecom_app_send(u32 app_id, void *req, size_t req_size, void *rsp,</div><div class='ctx'> 				     QCOM_SCM_RW, QCOM_SCM_VAL,</div><div class='ctx'> 				     QCOM_SCM_RW, QCOM_SCM_VAL);</div><div class='ctx'> 	desc.args[0] = app_id;</div><div class='del'>-	desc.args[1] = req_phys;</div><div class='add'>+	desc.args[1] = req;</div><div class='ctx'> 	desc.args[2] = req_size;</div><div class='del'>-	desc.args[3] = rsp_phys;</div><div class='add'>+	desc.args[3] = rsp;</div><div class='ctx'> 	desc.args[4] = rsp_size;</div><div class='ctx'> </div><div class='del'>-	/* Perform call */</div><div class='ctx'> 	status = qcom_scm_qseecom_call(&amp;desc, &amp;res);</div><div class='ctx'> </div><div class='del'>-	/* Unmap buffers */</div><div class='del'>-	dma_unmap_single(__scm-&gt;dev, rsp_phys, rsp_size, DMA_FROM_DEVICE);</div><div class='del'>-	dma_unmap_single(__scm-&gt;dev, req_phys, req_size, DMA_TO_DEVICE);</div><div class='del'>-</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='hunk'>@@ -1649,8 +1645,10 @@ EXPORT_SYMBOL_GPL(qcom_scm_qseecom_app_send);</div><div class='ctx'>  * We do not yet support re-entrant calls via the qseecom interface. To prevent</div><div class='ctx'>  + any potential issues with this, only allow validated machines for now.</div><div class='ctx'>  */</div><div class='del'>-static const struct of_device_id qcom_scm_qseecom_allowlist[] = {</div><div class='add'>+static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = {</div><div class='add'>+	{ .compatible = "lenovo,flex-5g" },</div><div class='ctx'> 	{ .compatible = "lenovo,thinkpad-x13s", },</div><div class='add'>+	{ .compatible = "qcom,sc8180x-primus" },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1738,7 +1736,7 @@ static int qcom_scm_qseecom_init(struct qcom_scm *scm)</div><div class='ctx'>  */</div><div class='ctx'> bool qcom_scm_is_available(void)</div><div class='ctx'> {</div><div class='del'>-	return !!__scm;</div><div class='add'>+	return !!READ_ONCE(__scm);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(qcom_scm_is_available);</div><div class='ctx'> </div><div class='hunk'>@@ -1769,7 +1767,7 @@ int qcom_scm_wait_for_wq_completion(u32 wq_ctx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qcom_scm_waitq_wakeup(struct qcom_scm *scm, unsigned int wq_ctx)</div><div class='add'>+static int qcom_scm_waitq_wakeup(unsigned int wq_ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1801,7 +1799,7 @@ static irqreturn_t qcom_scm_irq_handler(int irq, void *data)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = qcom_scm_waitq_wakeup(scm, wq_ctx);</div><div class='add'>+		ret = qcom_scm_waitq_wakeup(wq_ctx);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	} while (more_pending);</div><div class='hunk'>@@ -1819,10 +1817,12 @@ static int qcom_scm_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!scm)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	scm-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	ret = qcom_scm_find_dload_address(&amp;pdev-&gt;dev, &amp;scm-&gt;dload_mode_addr);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	init_completion(&amp;scm-&gt;waitq_comp);</div><div class='ctx'> 	mutex_init(&amp;scm-&gt;scm_bw_lock);</div><div class='ctx'> </div><div class='ctx'> 	scm-&gt;path = devm_of_icc_get(&amp;pdev-&gt;dev, NULL);</div><div class='hunk'>@@ -1854,10 +1854,8 @@ static int qcom_scm_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	__scm = scm;</div><div class='del'>-	__scm-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	init_completion(&amp;__scm-&gt;waitq_comp);</div><div class='add'>+	/* Let all above stores be available after this */</div><div class='add'>+	smp_store_release(&amp;__scm, scm);</div><div class='ctx'> </div><div class='ctx'> 	irq = platform_get_irq_optional(pdev, 0);</div><div class='ctx'> 	if (irq &lt; 0) {</div><div class='head'>diff --git a/drivers/firmware/raspberrypi.c b/drivers/firmware/raspberrypi.c<br/>index 322aada20f74..ac34876a97f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/raspberrypi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/raspberrypi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/raspberrypi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/raspberrypi.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/kref.h&gt;</div><div class='ctx'> #include &lt;linux/mailbox_client.h&gt;</div><div class='add'>+#include &lt;linux/mailbox_controller.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='hunk'>@@ -97,8 +98,8 @@ int rpi_firmware_property_list(struct rpi_firmware *fw,</div><div class='ctx'> 	if (size &amp; 3)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	buf = dma_alloc_coherent(fw-&gt;cl.dev, PAGE_ALIGN(size), &amp;bus_addr,</div><div class='del'>-				 GFP_ATOMIC);</div><div class='add'>+	buf = dma_alloc_coherent(fw-&gt;chan-&gt;mbox-&gt;dev, PAGE_ALIGN(size),</div><div class='add'>+				 &amp;bus_addr, GFP_ATOMIC);</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -126,7 +127,7 @@ int rpi_firmware_property_list(struct rpi_firmware *fw,</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dma_free_coherent(fw-&gt;cl.dev, PAGE_ALIGN(size), buf, bus_addr);</div><div class='add'>+	dma_free_coherent(fw-&gt;chan-&gt;mbox-&gt;dev, PAGE_ALIGN(size), buf, bus_addr);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/firmware/smccc/smccc.c b/drivers/firmware/smccc/smccc.c<br/>index db818f9dcb8e..d670635914ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/smccc/smccc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/smccc/smccc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/smccc/smccc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/smccc/smccc.c</a></div><div class='hunk'>@@ -69,6 +69,7 @@ s32 arm_smccc_get_soc_id_revision(void)</div><div class='ctx'> {</div><div class='ctx'> 	return smccc_soc_id_revision;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(arm_smccc_get_soc_id_revision);</div><div class='ctx'> </div><div class='ctx'> static int __init smccc_devices_init(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c<br/>index 8b9a2556de16..160968301b1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/ti_sci.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/firmware/ti_sci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/ti_sci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/firmware/ti_sci.c</a></div><div class='hunk'>@@ -87,7 +87,6 @@ struct ti_sci_desc {</div><div class='ctx'>  * struct ti_sci_info - Structure representing a TI SCI instance</div><div class='ctx'>  * @dev:	Device pointer</div><div class='ctx'>  * @desc:	SoC description for this instance</div><div class='del'>- * @nb:	Reboot Notifier block</div><div class='ctx'>  * @d:		Debugfs file entry</div><div class='ctx'>  * @debug_region: Memory region where the debug message are available</div><div class='ctx'>  * @debug_region_size: Debug region size</div><div class='hunk'>@@ -103,7 +102,6 @@ struct ti_sci_desc {</div><div class='ctx'>  */</div><div class='ctx'> struct ti_sci_info {</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	struct notifier_block nb;</div><div class='ctx'> 	const struct ti_sci_desc *desc;</div><div class='ctx'> 	struct dentry *d;</div><div class='ctx'> 	void __iomem *debug_region;</div><div class='hunk'>@@ -122,7 +120,6 @@ struct ti_sci_info {</div><div class='ctx'> </div><div class='ctx'> #define cl_to_ti_sci_info(c)	container_of(c, struct ti_sci_info, cl)</div><div class='ctx'> #define handle_to_ti_sci_info(h) container_of(h, struct ti_sci_info, handle)</div><div class='del'>-#define reboot_to_ti_sci_info(n) container_of(n, struct ti_sci_info, nb)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> </div><div class='hunk'>@@ -3254,10 +3251,9 @@ devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_ti_sci_get_resource);</div><div class='ctx'> </div><div class='del'>-static int tisci_reboot_handler(struct notifier_block *nb, unsigned long mode,</div><div class='del'>-				void *cmd)</div><div class='add'>+static int tisci_reboot_handler(struct sys_off_data *data)</div><div class='ctx'> {</div><div class='del'>-	struct ti_sci_info *info = reboot_to_ti_sci_info(nb);</div><div class='add'>+	struct ti_sci_info *info = data-&gt;cb_data;</div><div class='ctx'> 	const struct ti_sci_handle *handle = &amp;info-&gt;handle;</div><div class='ctx'> </div><div class='ctx'> 	ti_sci_cmd_core_reboot(handle);</div><div class='hunk'>@@ -3303,7 +3299,6 @@ static int ti_sci_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct mbox_client *cl;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> 	int i;</div><div class='del'>-	int reboot = 0;</div><div class='ctx'> 	u32 h_id;</div><div class='ctx'> </div><div class='ctx'> 	desc = device_get_match_data(dev);</div><div class='hunk'>@@ -3327,8 +3322,6 @@ static int ti_sci_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	reboot = of_property_read_bool(dev-&gt;of_node,</div><div class='del'>-				       "ti,system-reboot-controller");</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;info-&gt;node);</div><div class='ctx'> 	minfo = &amp;info-&gt;minfo;</div><div class='ctx'> </div><div class='hunk'>@@ -3399,15 +3392,10 @@ static int ti_sci_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ti_sci_setup_ops(info);</div><div class='ctx'> </div><div class='del'>-	if (reboot) {</div><div class='del'>-		info-&gt;nb.notifier_call = tisci_reboot_handler;</div><div class='del'>-		info-&gt;nb.priority = 128;</div><div class='del'>-</div><div class='del'>-		ret = register_restart_handler(&amp;info-&gt;nb);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "reboot registration fail(%d)\n", ret);</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	ret = devm_register_restart_handler(dev, tisci_reboot_handler, info);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "reboot registration fail(%d)\n", ret);</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(dev, "ABI: %d.%d (firmware rev 0x%04x '%s')\n",</div><div class='head'>diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c<br/>index 98b8fd16183e..80cac3a5f976 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/fpga/dfl-pci.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/fpga/dfl-pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/fpga/dfl-pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/fpga/dfl-pci.c</a></div><div class='hunk'>@@ -78,6 +78,7 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)</div><div class='ctx'> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011	0x1001</div><div class='ctx'> #define PCIE_DEVICE_ID_INTEL_DFL		0xbcce</div><div class='ctx'> /* PCI Subdevice ID for PCIE_DEVICE_ID_INTEL_DFL */</div><div class='add'>+#define PCIE_SUBDEVICE_ID_INTEL_D5005		0x138d</div><div class='ctx'> #define PCIE_SUBDEVICE_ID_INTEL_N6000		0x1770</div><div class='ctx'> #define PCIE_SUBDEVICE_ID_INTEL_N6001		0x1771</div><div class='ctx'> #define PCIE_SUBDEVICE_ID_INTEL_C6100		0x17d4</div><div class='hunk'>@@ -102,6 +103,8 @@ static struct pci_device_id cci_pcie_id_tbl[] = {</div><div class='ctx'> 	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},</div><div class='ctx'> 	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},</div><div class='ctx'> 	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,</div><div class='add'>+			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_D5005),},</div><div class='add'>+	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,</div><div class='ctx'> 			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},</div><div class='ctx'> 	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,</div><div class='ctx'> 			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},</div><div class='head'>diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig<br/>index b50d0b470849..3dbddec07028 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/Kconfig</a></div><div class='hunk'>@@ -103,6 +103,15 @@ config GPIO_REGMAP</div><div class='ctx'> 	select REGMAP</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='add'>+config GPIO_SWNODE_UNDEFINED</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  This adds a special place holder for software nodes to contain an</div><div class='add'>+	  undefined GPIO reference, this is primarily used by SPI to allow a</div><div class='add'>+	  list of GPIO chip selects to mark a certain chip select as being</div><div class='add'>+	  controlled the SPI device's internal chip select mechanism and not</div><div class='add'>+	  a GPIO.</div><div class='add'>+</div><div class='ctx'> # put drivers in the right section, in alphabetical order</div><div class='ctx'> </div><div class='ctx'> # This symbol is selected by both I2C and SPI expanders</div><div class='hunk'>@@ -312,6 +321,24 @@ config GPIO_GENERIC_PLATFORM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support basic platform_device memory-mapped GPIO controllers.</div><div class='ctx'> </div><div class='add'>+config GPIO_GRANITERAPIDS</div><div class='add'>+	tristate "Intel Granite Rapids-D vGPIO support"</div><div class='add'>+	depends on X86 || COMPILE_TEST</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='add'>+	help</div><div class='add'>+	  Select this to enable virtual GPIO support on platforms with the</div><div class='add'>+	  following SoCs:</div><div class='add'>+</div><div class='add'>+	  - Intel Granite Rapids-D</div><div class='add'>+</div><div class='add'>+	  The driver enables basic GPIO functionality and implements interrupt</div><div class='add'>+	  support. The virtual GPIO driver controls GPIO lines via a firmware</div><div class='add'>+	  interface. The physical GPIO pins reside on device that is external</div><div class='add'>+	  from the main SoC package, such as a BMC or a CPLD.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module will</div><div class='add'>+	  be called gpio-graniterapids.</div><div class='add'>+</div><div class='ctx'> config GPIO_GRGPIO</div><div class='ctx'> 	tristate "Aeroflex Gaisler GRGPIO support"</div><div class='ctx'> 	depends on OF_GPIO</div><div class='head'>diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile<br/>index fdd28c58d890..e2a53013780e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/Makefile</a></div><div class='hunk'>@@ -66,6 +66,7 @@ obj-$(CONFIG_GPIO_FTGPIO010)		+= gpio-ftgpio010.o</div><div class='ctx'> obj-$(CONFIG_GPIO_FXL6408)		+= gpio-fxl6408.o</div><div class='ctx'> obj-$(CONFIG_GPIO_GE_FPGA)		+= gpio-ge.o</div><div class='ctx'> obj-$(CONFIG_GPIO_GPIO_MM)		+= gpio-gpio-mm.o</div><div class='add'>+obj-$(CONFIG_GPIO_GRANITERAPIDS)	+= gpio-graniterapids.o</div><div class='ctx'> obj-$(CONFIG_GPIO_GRGPIO)		+= gpio-grgpio.o</div><div class='ctx'> obj-$(CONFIG_GPIO_GW_PLD)		+= gpio-gw-pld.o</div><div class='ctx'> obj-$(CONFIG_GPIO_HISI)                 += gpio-hisi.o</div><div class='head'>diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c<br/>index a789af4a5c85..8dce78ea7139 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-brcmstb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-brcmstb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-brcmstb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-brcmstb.c</a></div><div class='hunk'>@@ -50,7 +50,6 @@ struct brcmstb_gpio_priv {</div><div class='ctx'> 	struct irq_domain *irq_domain;</div><div class='ctx'> 	struct irq_chip irq_chip;</div><div class='ctx'> 	int parent_irq;</div><div class='del'>-	int gpio_base;</div><div class='ctx'> 	int num_gpios;</div><div class='ctx'> 	int parent_wake_irq;</div><div class='ctx'> };</div><div class='hunk'>@@ -92,7 +91,7 @@ brcmstb_gpio_get_active_irqs(struct brcmstb_gpio_bank *bank)</div><div class='ctx'> static int brcmstb_gpio_hwirq_to_offset(irq_hw_number_t hwirq,</div><div class='ctx'> 					struct brcmstb_gpio_bank *bank)</div><div class='ctx'> {</div><div class='del'>-	return hwirq - (bank-&gt;gc.base - bank-&gt;parent_priv-&gt;gpio_base);</div><div class='add'>+	return hwirq - bank-&gt;gc.offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,</div><div class='hunk'>@@ -118,7 +117,7 @@ static int brcmstb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);</div><div class='ctx'> 	/* gc_offset is relative to this gpio_chip; want real offset */</div><div class='del'>-	int hwirq = offset + (gc-&gt;base - priv-&gt;gpio_base);</div><div class='add'>+	int hwirq = offset + gc-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	if (hwirq &gt;= priv-&gt;num_gpios)</div><div class='ctx'> 		return -ENXIO;</div><div class='hunk'>@@ -263,7 +262,7 @@ static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)</div><div class='ctx'> {</div><div class='ctx'> 	struct brcmstb_gpio_priv *priv = bank-&gt;parent_priv;</div><div class='ctx'> 	struct irq_domain *domain = priv-&gt;irq_domain;</div><div class='del'>-	int hwbase = bank-&gt;gc.base - priv-&gt;gpio_base;</div><div class='add'>+	int hwbase = bank-&gt;gc.offset;</div><div class='ctx'> 	unsigned long status;</div><div class='ctx'> </div><div class='ctx'> 	while ((status = brcmstb_gpio_get_active_irqs(bank))) {</div><div class='hunk'>@@ -412,7 +411,7 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,</div><div class='ctx'> 	if (WARN_ON(gpiospec-&gt;args_count &lt; gc-&gt;of_gpio_n_cells))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	offset = gpiospec-&gt;args[0] - (gc-&gt;base - priv-&gt;gpio_base);</div><div class='add'>+	offset = gpiospec-&gt;args[0] - bank-&gt;gc.offset;</div><div class='ctx'> 	if (offset &gt;= gc-&gt;ngpio || offset &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -596,8 +595,8 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	const __be32 *p;</div><div class='ctx'> 	u32 bank_width;</div><div class='ctx'> 	int num_banks = 0;</div><div class='add'>+	int num_gpios = 0;</div><div class='ctx'> 	int err;</div><div class='del'>-	static int gpio_base;</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> 	bool need_wakeup_event = false;</div><div class='ctx'> </div><div class='hunk'>@@ -611,7 +610,6 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(reg_base))</div><div class='ctx'> 		return PTR_ERR(reg_base);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;gpio_base = gpio_base;</div><div class='ctx'> 	priv-&gt;reg_base = reg_base;</div><div class='ctx'> 	priv-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='hunk'>@@ -651,7 +649,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 			dev_dbg(dev, "Width 0 found: Empty bank @ %d\n",</div><div class='ctx'> 				num_banks);</div><div class='ctx'> 			num_banks++;</div><div class='del'>-			gpio_base += MAX_GPIO_PER_BANK;</div><div class='add'>+			num_gpios += MAX_GPIO_PER_BANK;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -691,12 +689,13 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='del'>-		gc-&gt;base = gpio_base;</div><div class='ctx'> 		gc-&gt;of_gpio_n_cells = 2;</div><div class='ctx'> 		gc-&gt;of_xlate = brcmstb_gpio_of_xlate;</div><div class='ctx'> 		/* not all ngpio lines are valid, will use bank width later */</div><div class='ctx'> 		gc-&gt;ngpio = MAX_GPIO_PER_BANK;</div><div class='ctx'> 		gc-&gt;offset = bank-&gt;id * MAX_GPIO_PER_BANK;</div><div class='add'>+		gc-&gt;request = gpiochip_generic_request;</div><div class='add'>+		gc-&gt;free = gpiochip_generic_free;</div><div class='ctx'> 		if (priv-&gt;parent_irq &gt; 0)</div><div class='ctx'> 			gc-&gt;to_irq = brcmstb_gpio_to_irq;</div><div class='ctx'> </div><div class='hunk'>@@ -713,7 +712,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 					bank-&gt;id);</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='del'>-		gpio_base += gc-&gt;ngpio;</div><div class='add'>+		num_gpios += gc-&gt;ngpio;</div><div class='ctx'> </div><div class='ctx'> 		dev_dbg(dev, "bank=%d, base=%d, ngpio=%d, width=%d\n", bank-&gt;id,</div><div class='ctx'> 			gc-&gt;base, gc-&gt;ngpio, bank-&gt;width);</div><div class='hunk'>@@ -724,7 +723,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		num_banks++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;num_gpios = gpio_base - priv-&gt;gpio_base;</div><div class='add'>+	priv-&gt;num_gpios = num_gpios;</div><div class='ctx'> 	if (priv-&gt;parent_irq &gt; 0) {</div><div class='ctx'> 		err = brcmstb_gpio_irq_setup(pdev, priv);</div><div class='ctx'> 		if (err)</div><div class='head'>diff --git a/drivers/gpio/gpio-cros-ec.c b/drivers/gpio/gpio-cros-ec.c<br/>index 842e1c060414..0c09bb54dc0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-cros-ec.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-cros-ec.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-cros-ec.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-cros-ec.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/cros_ec_commands.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/cros_ec_proto.h&gt;</div><div class='hunk'>@@ -197,11 +198,18 @@ static int cros_ec_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	return devm_gpiochip_add_data(dev, gc, cros_ec);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct platform_device_id cros_ec_gpio_id[] = {</div><div class='add'>+	{ "cros-ec-gpio", 0 },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, cros_ec_gpio_id);</div><div class='add'>+</div><div class='ctx'> static struct platform_driver cros_ec_gpio_driver = {</div><div class='ctx'> 	.probe = cros_ec_gpio_probe,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "cros-ec-gpio",</div><div class='ctx'> 	},</div><div class='add'>+	.id_table = cros_ec_gpio_id,</div><div class='ctx'> };</div><div class='ctx'> module_platform_driver(cros_ec_gpio_driver);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c<br/>new file mode 100644<br/>index 000000000000..c693fe05d50f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-graniterapids.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-graniterapids.c</a></div><div class='hunk'>@@ -0,0 +1,383 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Intel Granite Rapids-D vGPIO driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Intel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Author: Aapo Vienamo &lt;aapo.vienamo@linux.intel.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/cleanup.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/gfp_types.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/math.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/overflow.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+</div><div class='add'>+#define GNR_NUM_PINS 128</div><div class='add'>+#define GNR_PINS_PER_REG 32</div><div class='add'>+#define GNR_NUM_REGS DIV_ROUND_UP(GNR_NUM_PINS, GNR_PINS_PER_REG)</div><div class='add'>+</div><div class='add'>+#define GNR_CFG_BAR		0x00</div><div class='add'>+#define GNR_CFG_LOCK_OFFSET	0x04</div><div class='add'>+#define GNR_GPI_STATUS_OFFSET	0x20</div><div class='add'>+#define GNR_GPI_ENABLE_OFFSET	0x24</div><div class='add'>+</div><div class='add'>+#define GNR_CFG_DW_RX_MASK	GENMASK(25, 22)</div><div class='add'>+#define GNR_CFG_DW_RX_DISABLE	FIELD_PREP(GNR_CFG_DW_RX_MASK, 2)</div><div class='add'>+#define GNR_CFG_DW_RX_EDGE	FIELD_PREP(GNR_CFG_DW_RX_MASK, 1)</div><div class='add'>+#define GNR_CFG_DW_RX_LEVEL	FIELD_PREP(GNR_CFG_DW_RX_MASK, 0)</div><div class='add'>+#define GNR_CFG_DW_RXDIS	BIT(4)</div><div class='add'>+#define GNR_CFG_DW_TXDIS	BIT(3)</div><div class='add'>+#define GNR_CFG_DW_RXSTATE	BIT(1)</div><div class='add'>+#define GNR_CFG_DW_TXSTATE	BIT(0)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct gnr_gpio - Intel Granite Rapids-D vGPIO driver state</div><div class='add'>+ * @gc: GPIO controller interface</div><div class='add'>+ * @reg_base: base address of the GPIO registers</div><div class='add'>+ * @ro_bitmap: bitmap of read-only pins</div><div class='add'>+ * @lock: guard the registers</div><div class='add'>+ * @pad_backup: backup of the register state for suspend</div><div class='add'>+ */</div><div class='add'>+struct gnr_gpio {</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	void __iomem *reg_base;</div><div class='add'>+	DECLARE_BITMAP(ro_bitmap, GNR_NUM_PINS);</div><div class='add'>+	raw_spinlock_t lock;</div><div class='add'>+	u32 pad_backup[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __iomem *gnr_gpio_get_padcfg_addr(const struct gnr_gpio *priv,</div><div class='add'>+					      unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;reg_base + gpio * sizeof(u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_configure_line(struct gpio_chip *gc, unsigned int gpio,</div><div class='add'>+				   u32 clear_mask, u32 set_mask)</div><div class='add'>+{</div><div class='add'>+	struct gnr_gpio *priv = gpiochip_get_data(gc);</div><div class='add'>+	void __iomem *addr = gnr_gpio_get_padcfg_addr(priv, gpio);</div><div class='add'>+	u32 dw;</div><div class='add'>+</div><div class='add'>+	if (test_bit(gpio, priv-&gt;ro_bitmap))</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	dw = readl(addr);</div><div class='add'>+	dw &amp;= ~clear_mask;</div><div class='add'>+	dw |= set_mask;</div><div class='add'>+	writel(dw, addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	const struct gnr_gpio *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 dw;</div><div class='add'>+</div><div class='add'>+	dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));</div><div class='add'>+</div><div class='add'>+	return !!(dw &amp; GNR_CFG_DW_RXSTATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gnr_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+{</div><div class='add'>+	u32 clear = 0;</div><div class='add'>+	u32 set = 0;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		set = GNR_CFG_DW_TXSTATE;</div><div class='add'>+	else</div><div class='add'>+		clear = GNR_CFG_DW_TXSTATE;</div><div class='add'>+</div><div class='add'>+	gnr_gpio_configure_line(gc, gpio, clear, set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	struct gnr_gpio *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 dw;</div><div class='add'>+</div><div class='add'>+	dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));</div><div class='add'>+</div><div class='add'>+	if (dw &amp; GNR_CFG_DW_TXDIS)</div><div class='add'>+		return GPIO_LINE_DIRECTION_IN;</div><div class='add'>+</div><div class='add'>+	return GPIO_LINE_DIRECTION_OUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_direction_input(struct gpio_chip *gc, unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	return gnr_gpio_configure_line(gc, gpio, GNR_CFG_DW_RXDIS, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+{</div><div class='add'>+	u32 clear = GNR_CFG_DW_TXDIS;</div><div class='add'>+	u32 set = value ? GNR_CFG_DW_TXSTATE : 0;</div><div class='add'>+</div><div class='add'>+	return gnr_gpio_configure_line(gc, gpio, clear, set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct gpio_chip gnr_gpio_chip = {</div><div class='add'>+	.owner		  = THIS_MODULE,</div><div class='add'>+	.get		  = gnr_gpio_get,</div><div class='add'>+	.set		  = gnr_gpio_set,</div><div class='add'>+	.get_direction    = gnr_gpio_get_direction,</div><div class='add'>+	.direction_input  = gnr_gpio_direction_input,</div><div class='add'>+	.direction_output = gnr_gpio_direction_output,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __iomem *gnr_gpio_get_reg_addr(const struct gnr_gpio *priv,</div><div class='add'>+					   unsigned int base,</div><div class='add'>+					   unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;reg_base + base + gpio * sizeof(u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gnr_gpio_irq_ack(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct gnr_gpio *priv = gpiochip_get_data(gc);</div><div class='add'>+	irq_hw_number_t gpio = irqd_to_hwirq(d);</div><div class='add'>+	unsigned int reg_idx = gpio / GNR_PINS_PER_REG;</div><div class='add'>+	unsigned int bit_idx = gpio % GNR_PINS_PER_REG;</div><div class='add'>+	void __iomem *addr = gnr_gpio_get_reg_addr(priv, GNR_GPI_STATUS_OFFSET, reg_idx);</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	reg = readl(addr);</div><div class='add'>+	reg &amp;= ~BIT(bit_idx);</div><div class='add'>+	writel(reg, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gnr_gpio_irq_mask_unmask(struct gpio_chip *gc, unsigned long gpio, bool mask)</div><div class='add'>+{</div><div class='add'>+	struct gnr_gpio *priv = gpiochip_get_data(gc);</div><div class='add'>+	unsigned int reg_idx = gpio / GNR_PINS_PER_REG;</div><div class='add'>+	unsigned int bit_idx = gpio % GNR_PINS_PER_REG;</div><div class='add'>+	void __iomem *addr = gnr_gpio_get_reg_addr(priv, GNR_GPI_ENABLE_OFFSET, reg_idx);</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	reg = readl(addr);</div><div class='add'>+	if (mask)</div><div class='add'>+		reg &amp;= ~BIT(bit_idx);</div><div class='add'>+	else</div><div class='add'>+		reg |= BIT(bit_idx);</div><div class='add'>+	writel(reg, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gnr_gpio_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	gnr_gpio_irq_mask_unmask(gc, hwirq, true);</div><div class='add'>+	gpiochip_disable_irq(gc, hwirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gnr_gpio_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_enable_irq(gc, hwirq);</div><div class='add'>+	gnr_gpio_irq_mask_unmask(gc, hwirq, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t pin = irqd_to_hwirq(d);</div><div class='add'>+	u32 mask = GNR_CFG_DW_RX_MASK;</div><div class='add'>+	u32 set;</div><div class='add'>+</div><div class='add'>+	/* Falling edge and level low triggers not supported by the GPIO controller */</div><div class='add'>+	switch (type) {</div><div class='add'>+	case IRQ_TYPE_NONE:</div><div class='add'>+		set = GNR_CFG_DW_RX_DISABLE;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_EDGE_RISING:</div><div class='add'>+		set = GNR_CFG_DW_RX_EDGE;</div><div class='add'>+		irq_set_handler_locked(d, handle_edge_irq);</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_LEVEL_HIGH:</div><div class='add'>+		set = GNR_CFG_DW_RX_LEVEL;</div><div class='add'>+		irq_set_handler_locked(d, handle_level_irq);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return gnr_gpio_configure_line(gc, pin, mask, set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip gnr_gpio_irq_chip = {</div><div class='add'>+	.irq_ack	= gnr_gpio_irq_ack,</div><div class='add'>+	.irq_mask	= gnr_gpio_irq_mask,</div><div class='add'>+	.irq_unmask	= gnr_gpio_irq_unmask,</div><div class='add'>+	.irq_set_type	= gnr_gpio_irq_set_type,</div><div class='add'>+	.flags		= IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gnr_gpio_init_pin_ro_bits(struct device *dev,</div><div class='add'>+				      const void __iomem *cfg_lock_base,</div><div class='add'>+				      unsigned long *ro_bitmap)</div><div class='add'>+{</div><div class='add'>+	u32 tmp[GNR_NUM_REGS];</div><div class='add'>+</div><div class='add'>+	memcpy_fromio(tmp, cfg_lock_base, sizeof(tmp));</div><div class='add'>+	bitmap_from_arr32(ro_bitmap, tmp, GNR_NUM_PINS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t gnr_gpio_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct gnr_gpio *priv = data;</div><div class='add'>+	unsigned int handled = 0;</div><div class='add'>+</div><div class='add'>+	for (unsigned int i = 0; i &lt; GNR_NUM_REGS; i++) {</div><div class='add'>+		const void __iomem *reg = priv-&gt;reg_base + i * sizeof(u32);</div><div class='add'>+		unsigned long pending;</div><div class='add'>+		unsigned long enabled;</div><div class='add'>+		unsigned int bit_idx;</div><div class='add'>+</div><div class='add'>+		scoped_guard(raw_spinlock, &amp;priv-&gt;lock) {</div><div class='add'>+			pending = readl(reg + GNR_GPI_STATUS_OFFSET);</div><div class='add'>+			enabled = readl(reg + GNR_GPI_ENABLE_OFFSET);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Only enabled interrupts */</div><div class='add'>+		pending &amp;= enabled;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(bit_idx, &amp;pending, GNR_PINS_PER_REG) {</div><div class='add'>+			unsigned int hwirq = i * GNR_PINS_PER_REG + bit_idx;</div><div class='add'>+</div><div class='add'>+			generic_handle_domain_irq(priv-&gt;gc.irq.domain, hwirq);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		handled += pending ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	return IRQ_RETVAL(handled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	size_t num_backup_pins = IS_ENABLED(CONFIG_PM_SLEEP) ? GNR_NUM_PINS : 0;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct gpio_irq_chip *girq;</div><div class='add'>+	struct gnr_gpio *priv;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	int irq, ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, struct_size(priv, pad_backup, num_backup_pins), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(regs))</div><div class='add'>+		return PTR_ERR(regs);</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+</div><div class='add'>+	ret = devm_request_irq(dev, irq, gnr_gpio_irq, IRQF_SHARED | IRQF_NO_THREAD,</div><div class='add'>+			       dev_name(dev), priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to request interrupt\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_base = regs + readl(regs + GNR_CFG_BAR);</div><div class='add'>+</div><div class='add'>+	gnr_gpio_init_pin_ro_bits(dev, priv-&gt;reg_base + GNR_CFG_LOCK_OFFSET,</div><div class='add'>+				  priv-&gt;ro_bitmap);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gc	= gnr_gpio_chip;</div><div class='add'>+	priv-&gt;gc.label	= dev_name(dev);</div><div class='add'>+	priv-&gt;gc.parent	= dev;</div><div class='add'>+	priv-&gt;gc.ngpio	= GNR_NUM_PINS;</div><div class='add'>+	priv-&gt;gc.base	= -1;</div><div class='add'>+</div><div class='add'>+	girq = &amp;priv-&gt;gc.irq;</div><div class='add'>+	gpio_irq_chip_set_chip(girq, &amp;gnr_gpio_irq_chip);</div><div class='add'>+	girq-&gt;chip-&gt;name	= dev_name(dev);</div><div class='add'>+	girq-&gt;parent_handler	= NULL;</div><div class='add'>+	girq-&gt;num_parents	= 0;</div><div class='add'>+	girq-&gt;parents		= NULL;</div><div class='add'>+	girq-&gt;default_type	= IRQ_TYPE_NONE;</div><div class='add'>+	girq-&gt;handler		= handle_bad_irq;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(dev, &amp;priv-&gt;gc, priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct gnr_gpio *priv = dev_get_drvdata(dev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	for_each_clear_bit(i, priv-&gt;ro_bitmap, priv-&gt;gc.ngpio)</div><div class='add'>+		priv-&gt;pad_backup[i] = readl(gnr_gpio_get_padcfg_addr(priv, i));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gnr_gpio_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct gnr_gpio *priv = dev_get_drvdata(dev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	for_each_clear_bit(i, priv-&gt;ro_bitmap, priv-&gt;gc.ngpio)</div><div class='add'>+		writel(priv-&gt;pad_backup[i], gnr_gpio_get_padcfg_addr(priv, i));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(gnr_gpio_pm_ops, gnr_gpio_suspend, gnr_gpio_resume);</div><div class='add'>+</div><div class='add'>+static const struct acpi_device_id gnr_gpio_acpi_match[] = {</div><div class='add'>+	{ "INTC1109" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(acpi, gnr_gpio_acpi_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver gnr_gpio_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		  = "gpio-graniterapids",</div><div class='add'>+		.pm		  = pm_sleep_ptr(&amp;gnr_gpio_pm_ops),</div><div class='add'>+		.acpi_match_table = gnr_gpio_acpi_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = gnr_gpio_probe,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(gnr_gpio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Aapo Vienamo &lt;aapo.vienamo@linux.intel.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Intel Granite Rapids-D vGPIO driver");</div><div class='head'>diff --git a/drivers/gpio/gpio-npcm-sgpio.c b/drivers/gpio/gpio-npcm-sgpio.c<br/>index d31788b43abc..260570614543 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-npcm-sgpio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-npcm-sgpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-npcm-sgpio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-npcm-sgpio.c</a></div><div class='hunk'>@@ -434,7 +434,7 @@ static void npcm_sgpio_irq_handler(struct irq_desc *desc)</div><div class='ctx'> 	struct gpio_chip *gc = irq_desc_get_handler_data(desc);</div><div class='ctx'> 	struct irq_chip *ic = irq_desc_get_chip(desc);</div><div class='ctx'> 	struct npcm_sgpio *gpio = gpiochip_get_data(gc);</div><div class='del'>-	unsigned int i, j, girq;</div><div class='add'>+	unsigned int i, j;</div><div class='ctx'> 	unsigned long reg;</div><div class='ctx'> </div><div class='ctx'> 	chained_irq_enter(ic, desc);</div><div class='hunk'>@@ -443,11 +443,9 @@ static void npcm_sgpio_irq_handler(struct irq_desc *desc)</div><div class='ctx'> 		const struct npcm_sgpio_bank *bank = &amp;npcm_sgpio_banks[i];</div><div class='ctx'> </div><div class='ctx'> 		reg = ioread8(bank_reg(gpio, bank, EVENT_STS));</div><div class='del'>-		for_each_set_bit(j, &amp;reg, 8) {</div><div class='del'>-			girq = irq_find_mapping(gc-&gt;irq.domain,</div><div class='del'>-						i * 8 + gpio-&gt;nout_sgpio + j);</div><div class='del'>-			generic_handle_domain_irq(gc-&gt;irq.domain, girq);</div><div class='del'>-		}</div><div class='add'>+		for_each_set_bit(j, &amp;reg, 8)</div><div class='add'>+			generic_handle_domain_irq(gc-&gt;irq.domain,</div><div class='add'>+						  i * 8 + gpio-&gt;nout_sgpio + j);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	chained_irq_exit(ic, desc);</div><div class='head'>diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c<br/>index 00ffa168e405..77a2812f2974 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pca953x.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-pca953x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pca953x.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-pca953x.c</a></div><div class='hunk'>@@ -144,7 +144,7 @@ static int pca953x_acpi_get_irq(struct device *dev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_warn(dev, "can't add GPIO ACPI mapping\n");</div><div class='ctx'> </div><div class='del'>-	ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0);</div><div class='add'>+	ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq", 0);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c<br/>index 2efd1b1a0805..7f7f95ad4343 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pcie-idio-24.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-pcie-idio-24.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pcie-idio-24.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-pcie-idio-24.c</a></div><div class='hunk'>@@ -267,7 +267,7 @@ static int idio_24_reg_mask_xlate(struct gpio_regmap *const gpio, const unsigned</div><div class='ctx'> 	case IDIO_24_CONTROL_REG:</div><div class='ctx'> 		/* We can only set direction for TTL/CMOS lines */</div><div class='ctx'> 		if (offset &lt; 48)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='add'>+			return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		*reg = IDIO_24_CONTROL_REG;</div><div class='ctx'> 		*mask = CONTROL_REG_OUT_MODE;</div><div class='head'>diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c<br/>index c08c8e528867..71684dee2ca5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-regmap.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-regmap.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-regmap.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-regmap.c</a></div><div class='hunk'>@@ -129,7 +129,7 @@ static int gpio_regmap_get_direction(struct gpio_chip *chip,</div><div class='ctx'> 		base = gpio_regmap_addr(gpio-&gt;reg_dir_in_base);</div><div class='ctx'> 		invert = 1;</div><div class='ctx'> 	} else {</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return -ENOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = gpio-&gt;reg_mask_xlate(gpio, base, offset, &amp;reg, &amp;mask);</div><div class='hunk'>@@ -160,7 +160,7 @@ static int gpio_regmap_set_direction(struct gpio_chip *chip,</div><div class='ctx'> 		base = gpio_regmap_addr(gpio-&gt;reg_dir_in_base);</div><div class='ctx'> 		invert = 1;</div><div class='ctx'> 	} else {</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return -ENOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = gpio-&gt;reg_mask_xlate(gpio, base, offset, &amp;reg, &amp;mask);</div><div class='head'>diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c<br/>index e48392074e4b..ff0341b1222f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-sch.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-sch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-sch.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-sch.c</a></div><div class='hunk'>@@ -38,8 +38,8 @@</div><div class='ctx'> </div><div class='ctx'> struct sch_gpio {</div><div class='ctx'> 	struct gpio_chip chip;</div><div class='add'>+	void __iomem *regs;</div><div class='ctx'> 	spinlock_t lock;</div><div class='del'>-	unsigned short iobase;</div><div class='ctx'> 	unsigned short resume_base;</div><div class='ctx'> </div><div class='ctx'> 	/* GPE handling */</div><div class='hunk'>@@ -75,7 +75,7 @@ static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned int gpio, unsigned in</div><div class='ctx'> 	offset = sch_gpio_offset(sch, gpio, reg);</div><div class='ctx'> 	bit = sch_gpio_bit(sch, gpio);</div><div class='ctx'> </div><div class='del'>-	reg_val = !!(inb(sch-&gt;iobase + offset) &amp; BIT(bit));</div><div class='add'>+	reg_val = !!(ioread8(sch-&gt;regs + offset) &amp; BIT(bit));</div><div class='ctx'> </div><div class='ctx'> 	return reg_val;</div><div class='ctx'> }</div><div class='hunk'>@@ -89,12 +89,14 @@ static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned int gpio, unsigned i</div><div class='ctx'> 	offset = sch_gpio_offset(sch, gpio, reg);</div><div class='ctx'> 	bit = sch_gpio_bit(sch, gpio);</div><div class='ctx'> </div><div class='del'>-	reg_val = inb(sch-&gt;iobase + offset);</div><div class='add'>+	reg_val = ioread8(sch-&gt;regs + offset);</div><div class='ctx'> </div><div class='ctx'> 	if (val)</div><div class='del'>-		outb(reg_val | BIT(bit), sch-&gt;iobase + offset);</div><div class='add'>+		reg_val |= BIT(bit);</div><div class='ctx'> 	else</div><div class='del'>-		outb((reg_val &amp; ~BIT(bit)), sch-&gt;iobase + offset);</div><div class='add'>+		reg_val &amp;= ~BIT(bit);</div><div class='add'>+</div><div class='add'>+	iowrite8(reg_val, sch-&gt;regs + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned int gpio_num)</div><div class='hunk'>@@ -267,8 +269,8 @@ static u32 sch_gpio_gpe_handler(acpi_handle gpe_device, u32 gpe, void *context)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;sch-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	core_status = inl(sch-&gt;iobase + CORE_BANK_OFFSET + GTS);</div><div class='del'>-	resume_status = inl(sch-&gt;iobase + RESUME_BANK_OFFSET + GTS);</div><div class='add'>+	core_status = ioread32(sch-&gt;regs + CORE_BANK_OFFSET + GTS);</div><div class='add'>+	resume_status = ioread32(sch-&gt;regs + RESUME_BANK_OFFSET + GTS);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sch-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -319,12 +321,14 @@ static int sch_gpio_install_gpe_handler(struct sch_gpio *sch)</div><div class='ctx'> </div><div class='ctx'> static int sch_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct gpio_irq_chip *girq;</div><div class='ctx'> 	struct sch_gpio *sch;</div><div class='ctx'> 	struct resource *res;</div><div class='add'>+	void __iomem *regs;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	sch = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*sch), GFP_KERNEL);</div><div class='add'>+	sch = devm_kzalloc(dev, sizeof(*sch), GFP_KERNEL);</div><div class='ctx'> 	if (!sch)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -332,15 +336,16 @@ static int sch_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!res)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	if (!devm_request_region(&amp;pdev-&gt;dev, res-&gt;start, resource_size(res),</div><div class='del'>-				 pdev-&gt;name))</div><div class='add'>+	regs = devm_ioport_map(dev, res-&gt;start, resource_size(res));</div><div class='add'>+	if (!regs)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='add'>+	sch-&gt;regs = regs;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_init(&amp;sch-&gt;lock);</div><div class='del'>-	sch-&gt;iobase = res-&gt;start;</div><div class='ctx'> 	sch-&gt;chip = sch_gpio_chip;</div><div class='del'>-	sch-&gt;chip.label = dev_name(&amp;pdev-&gt;dev);</div><div class='del'>-	sch-&gt;chip.parent = &amp;pdev-&gt;dev;</div><div class='add'>+	sch-&gt;chip.label = dev_name(dev);</div><div class='add'>+	sch-&gt;chip.parent = dev;</div><div class='ctx'> </div><div class='ctx'> 	switch (pdev-&gt;id) {</div><div class='ctx'> 	case PCI_DEVICE_ID_INTEL_SCH_LPC:</div><div class='hunk'>@@ -394,9 +399,9 @@ static int sch_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = sch_gpio_install_gpe_handler(sch);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		dev_warn(&amp;pdev-&gt;dev, "Can't setup GPE, no IRQ support\n");</div><div class='add'>+		dev_warn(dev, "Can't setup GPE, no IRQ support\n");</div><div class='ctx'> </div><div class='del'>-	return devm_gpiochip_add_data(&amp;pdev-&gt;dev, &amp;sch-&gt;chip, sch);</div><div class='add'>+	return devm_gpiochip_add_data(dev, &amp;sch-&gt;chip, sch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver sch_gpio_driver = {</div><div class='head'>diff --git a/drivers/gpio/gpio-tangier.c b/drivers/gpio/gpio-tangier.c<br/>index b75e0b12087a..4b29abafecf6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tangier.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-tangier.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tangier.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-tangier.c</a></div><div class='hunk'>@@ -195,7 +195,8 @@ static int tng_gpio_set_config(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> </div><div class='ctx'> static void tng_irq_ack(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct tng_gpio *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct tng_gpio *priv = gpiochip_get_data(gc);</div><div class='ctx'> 	irq_hw_number_t gpio = irqd_to_hwirq(d);</div><div class='ctx'> 	void __iomem *gisr;</div><div class='ctx'> 	u8 shift;</div><div class='hunk'>@@ -227,7 +228,8 @@ static void tng_irq_unmask_mask(struct tng_gpio *priv, u32 gpio, bool unmask)</div><div class='ctx'> </div><div class='ctx'> static void tng_irq_mask(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct tng_gpio *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct tng_gpio *priv = gpiochip_get_data(gc);</div><div class='ctx'> 	irq_hw_number_t gpio = irqd_to_hwirq(d);</div><div class='ctx'> </div><div class='ctx'> 	tng_irq_unmask_mask(priv, gpio, false);</div><div class='hunk'>@@ -236,7 +238,8 @@ static void tng_irq_mask(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> static void tng_irq_unmask(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct tng_gpio *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct tng_gpio *priv = gpiochip_get_data(gc);</div><div class='ctx'> 	irq_hw_number_t gpio = irqd_to_hwirq(d);</div><div class='ctx'> </div><div class='ctx'> 	gpiochip_enable_irq(&amp;priv-&gt;chip, gpio);</div><div class='head'>diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c<br/>index d87dd06db40d..9130c691a2dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tegra186.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpio-tegra186.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tegra186.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpio-tegra186.c</a></div><div class='hunk'>@@ -36,12 +36,6 @@</div><div class='ctx'> #define  TEGRA186_GPIO_SCR_SEC_REN		BIT(27)</div><div class='ctx'> #define  TEGRA186_GPIO_SCR_SEC_G1W		BIT(9)</div><div class='ctx'> #define  TEGRA186_GPIO_SCR_SEC_G1R		BIT(1)</div><div class='del'>-#define  TEGRA186_GPIO_FULL_ACCESS		(TEGRA186_GPIO_SCR_SEC_WEN | \</div><div class='del'>-						 TEGRA186_GPIO_SCR_SEC_REN | \</div><div class='del'>-						 TEGRA186_GPIO_SCR_SEC_G1R | \</div><div class='del'>-						 TEGRA186_GPIO_SCR_SEC_G1W)</div><div class='del'>-#define  TEGRA186_GPIO_SCR_SEC_ENABLE		(TEGRA186_GPIO_SCR_SEC_WEN | \</div><div class='del'>-						 TEGRA186_GPIO_SCR_SEC_REN)</div><div class='ctx'> </div><div class='ctx'> /* control registers */</div><div class='ctx'> #define TEGRA186_GPIO_ENABLE_CONFIG 0x00</div><div class='hunk'>@@ -177,10 +171,18 @@ static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned</div><div class='ctx'> </div><div class='ctx'> 	value = __raw_readl(secure + TEGRA186_GPIO_SCR);</div><div class='ctx'> </div><div class='del'>-	if ((value &amp; TEGRA186_GPIO_SCR_SEC_ENABLE) == 0)</div><div class='del'>-		return true;</div><div class='add'>+	/*</div><div class='add'>+	 * When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the</div><div class='add'>+	 * registers for given GPIO pin.</div><div class='add'>+	 * When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying</div><div class='add'>+	 * SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given</div><div class='add'>+	 * GPIO pin.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='del'>-	if ((value &amp; TEGRA186_GPIO_FULL_ACCESS) == TEGRA186_GPIO_FULL_ACCESS)</div><div class='add'>+	if (((value &amp; TEGRA186_GPIO_SCR_SEC_REN) == 0 ||</div><div class='add'>+	     ((value &amp; TEGRA186_GPIO_SCR_SEC_REN) &amp;&amp; (value &amp; TEGRA186_GPIO_SCR_SEC_G1R))) &amp;&amp;</div><div class='add'>+	     ((value &amp; TEGRA186_GPIO_SCR_SEC_WEN) == 0 ||</div><div class='add'>+	     ((value &amp; TEGRA186_GPIO_SCR_SEC_WEN) &amp;&amp; (value &amp; TEGRA186_GPIO_SCR_SEC_G1W))))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='head'>diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c<br/>index 7f140df40f35..553a5f94c00a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib-acpi.c</a></div><div class='hunk'>@@ -873,9 +873,6 @@ static struct gpio_desc *acpi_get_gpiod_by_index(struct acpi_device *adev,</div><div class='ctx'> 	struct acpi_gpio_lookup lookup;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!adev)</div><div class='del'>-		return ERR_PTR(-ENODEV);</div><div class='del'>-</div><div class='ctx'> 	memset(&amp;lookup, 0, sizeof(lookup));</div><div class='ctx'> 	lookup.index = index;</div><div class='ctx'> </div><div class='hunk'>@@ -948,14 +945,11 @@ static bool acpi_can_fallback_to_crs(struct acpi_device *adev,</div><div class='ctx'> 	return con_id == NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct gpio_desc *acpi_find_gpio(struct fwnode_handle *fwnode,</div><div class='del'>-				 const char *con_id,</div><div class='del'>-				 unsigned int idx,</div><div class='del'>-				 enum gpiod_flags *dflags,</div><div class='del'>-				 unsigned long *lookupflags)</div><div class='add'>+static struct gpio_desc *</div><div class='add'>+__acpi_find_gpio(struct fwnode_handle *fwnode, const char *con_id, unsigned int idx,</div><div class='add'>+		 bool can_fallback, struct acpi_gpio_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_device *adev = to_acpi_device_node(fwnode);</div><div class='del'>-	struct acpi_gpio_info info;</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='ctx'> 	char propname[32];</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -972,25 +966,38 @@ struct gpio_desc *acpi_find_gpio(struct fwnode_handle *fwnode,</div><div class='ctx'> </div><div class='ctx'> 		if (adev)</div><div class='ctx'> 			desc = acpi_get_gpiod_by_index(adev,</div><div class='del'>-						       propname, idx, &amp;info);</div><div class='add'>+						       propname, idx, info);</div><div class='ctx'> 		else</div><div class='ctx'> 			desc = acpi_get_gpiod_from_data(fwnode,</div><div class='del'>-						        propname, idx, &amp;info);</div><div class='del'>-		if (!IS_ERR(desc))</div><div class='del'>-			break;</div><div class='add'>+							propname, idx, info);</div><div class='ctx'> 		if (PTR_ERR(desc) == -EPROBE_DEFER)</div><div class='ctx'> 			return ERR_CAST(desc);</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR(desc))</div><div class='add'>+			return desc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Then from plain _CRS GPIOs */</div><div class='del'>-	if (IS_ERR(desc)) {</div><div class='del'>-		if (!adev || !acpi_can_fallback_to_crs(adev, con_id))</div><div class='del'>-			return ERR_PTR(-ENOENT);</div><div class='add'>+	if (!adev || !can_fallback)</div><div class='add'>+		return ERR_PTR(-ENOENT);</div><div class='ctx'> </div><div class='del'>-		desc = acpi_get_gpiod_by_index(adev, NULL, idx, &amp;info);</div><div class='del'>-		if (IS_ERR(desc))</div><div class='del'>-			return desc;</div><div class='del'>-	}</div><div class='add'>+	return acpi_get_gpiod_by_index(adev, NULL, idx, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct gpio_desc *acpi_find_gpio(struct fwnode_handle *fwnode,</div><div class='add'>+				 const char *con_id,</div><div class='add'>+				 unsigned int idx,</div><div class='add'>+				 enum gpiod_flags *dflags,</div><div class='add'>+				 unsigned long *lookupflags)</div><div class='add'>+{</div><div class='add'>+	struct acpi_device *adev = to_acpi_device_node(fwnode);</div><div class='add'>+	bool can_fallback = acpi_can_fallback_to_crs(adev, con_id);</div><div class='add'>+	struct acpi_gpio_info info;</div><div class='add'>+	struct gpio_desc *desc;</div><div class='add'>+</div><div class='add'>+	desc = __acpi_find_gpio(fwnode, con_id, idx, can_fallback, &amp;info);</div><div class='add'>+	if (IS_ERR(desc))</div><div class='add'>+		return desc;</div><div class='ctx'> </div><div class='ctx'> 	if (info.gpioint &amp;&amp;</div><div class='ctx'> 	    (*dflags == GPIOD_OUT_LOW || *dflags == GPIOD_OUT_HIGH)) {</div><div class='hunk'>@@ -1006,7 +1013,7 @@ struct gpio_desc *acpi_find_gpio(struct fwnode_handle *fwnode,</div><div class='ctx'> /**</div><div class='ctx'>  * acpi_dev_gpio_irq_wake_get_by() - Find GpioInt and translate it to Linux IRQ number</div><div class='ctx'>  * @adev: pointer to a ACPI device to get IRQ from</div><div class='del'>- * @name: optional name of GpioInt resource</div><div class='add'>+ * @con_id: optional name of GpioInt resource</div><div class='ctx'>  * @index: index of GpioInt resource (starting from %0)</div><div class='ctx'>  * @wake_capable: Set to true if the IRQ is wake capable</div><div class='ctx'>  *</div><div class='hunk'>@@ -1017,17 +1024,18 @@ struct gpio_desc *acpi_find_gpio(struct fwnode_handle *fwnode,</div><div class='ctx'>  * The function is idempotent, though each time it runs it will configure GPIO</div><div class='ctx'>  * pin direction according to the flags in GpioInt resource.</div><div class='ctx'>  *</div><div class='del'>- * The function takes optional @name parameter. If the resource has a property</div><div class='del'>- * name, then only those will be taken into account.</div><div class='add'>+ * The function takes optional @con_id parameter. If the resource has</div><div class='add'>+ * a @con_id in a property, then only those will be taken into account.</div><div class='ctx'>  *</div><div class='ctx'>  * The GPIO is considered wake capable if the GpioInt resource specifies</div><div class='ctx'>  * SharedAndWake or ExclusiveAndWake.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: Linux IRQ number (&gt; %0) on success, negative errno on failure.</div><div class='ctx'>  */</div><div class='del'>-int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, const char *name, int index,</div><div class='add'>+int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, const char *con_id, int index,</div><div class='ctx'> 				  bool *wake_capable)</div><div class='ctx'> {</div><div class='add'>+	struct fwnode_handle *fwnode = acpi_fwnode_handle(adev);</div><div class='ctx'> 	int idx, i;</div><div class='ctx'> 	unsigned int irq_flags;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1036,9 +1044,8 @@ int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, const char *name, in</div><div class='ctx'> 		struct acpi_gpio_info info;</div><div class='ctx'> 		struct gpio_desc *desc;</div><div class='ctx'> </div><div class='del'>-		desc = acpi_get_gpiod_by_index(adev, name, i, &amp;info);</div><div class='del'>-</div><div class='ctx'> 		/* Ignore -EPROBE_DEFER, it only matters if idx matches */</div><div class='add'>+		desc = __acpi_find_gpio(fwnode, con_id, i, true, &amp;info);</div><div class='ctx'> 		if (IS_ERR(desc) &amp;&amp; PTR_ERR(desc) != -EPROBE_DEFER)</div><div class='ctx'> 			return PTR_ERR(desc);</div><div class='ctx'> </div><div class='hunk'>@@ -1058,7 +1065,11 @@ int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, const char *name, in</div><div class='ctx'> 			acpi_gpio_update_gpiod_flags(&amp;dflags, &amp;info);</div><div class='ctx'> 			acpi_gpio_update_gpiod_lookup_flags(&amp;lflags, &amp;info);</div><div class='ctx'> </div><div class='del'>-			snprintf(label, sizeof(label), "GpioInt() %d", index);</div><div class='add'>+			snprintf(label, sizeof(label), "%pfwP GpioInt(%d)", fwnode, index);</div><div class='add'>+			ret = gpiod_set_consumer_name(desc, con_id ?: label);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='ctx'> 			ret = gpiod_configure_flags(desc, label, lflags, dflags);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				return ret;</div><div class='head'>diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c<br/>index d09c7d728365..9dad67ea2597 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-cdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-cdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-cdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib-cdev.c</a></div><div class='hunk'>@@ -1193,6 +1193,8 @@ static int edge_detector_update(struct line *line,</div><div class='ctx'> 				struct gpio_v2_line_config *lc,</div><div class='ctx'> 				unsigned int line_idx, u64 edflags)</div><div class='ctx'> {</div><div class='add'>+	u64 eflags;</div><div class='add'>+	int ret;</div><div class='ctx'> 	u64 active_edflags = READ_ONCE(line-&gt;edflags);</div><div class='ctx'> 	unsigned int debounce_period_us =</div><div class='ctx'> 			gpio_v2_line_config_debounce_period(lc, line_idx);</div><div class='hunk'>@@ -1204,6 +1206,18 @@ static int edge_detector_update(struct line *line,</div><div class='ctx'> 	/* sw debounced and still will be...*/</div><div class='ctx'> 	if (debounce_period_us &amp;&amp; READ_ONCE(line-&gt;sw_debounced)) {</div><div class='ctx'> 		line_set_debounce_period(line, debounce_period_us);</div><div class='add'>+		/*</div><div class='add'>+		 * ensure event fifo is initialised if edge detection</div><div class='add'>+		 * is now enabled.</div><div class='add'>+		 */</div><div class='add'>+		eflags = edflags &amp; GPIO_V2_LINE_EDGE_FLAGS;</div><div class='add'>+		if (eflags &amp;&amp; !kfifo_initialized(&amp;line-&gt;req-&gt;events)) {</div><div class='add'>+			ret = kfifo_alloc(&amp;line-&gt;req-&gt;events,</div><div class='add'>+					  line-&gt;req-&gt;event_buffer_size,</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2351,7 +2365,7 @@ static void gpio_desc_to_lineinfo(struct gpio_desc *desc,</div><div class='ctx'> </div><div class='ctx'> 	dflags = READ_ONCE(desc-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	scoped_guard(srcu, &amp;desc-&gt;srcu) {</div><div class='add'>+	scoped_guard(srcu, &amp;desc-&gt;gdev-&gt;desc_srcu) {</div><div class='ctx'> 		label = gpiod_get_label(desc);</div><div class='ctx'> 		if (label &amp;&amp; test_bit(FLAG_REQUESTED, &amp;dflags))</div><div class='ctx'> 			strscpy(info-&gt;consumer, label,</div><div class='hunk'>@@ -2799,11 +2813,11 @@ static int gpio_chrdev_release(struct inode *inode, struct file *file)</div><div class='ctx'> 	struct gpio_chardev_data *cdev = file-&gt;private_data;</div><div class='ctx'> 	struct gpio_device *gdev = cdev-&gt;gdev;</div><div class='ctx'> </div><div class='del'>-	bitmap_free(cdev-&gt;watched_lines);</div><div class='ctx'> 	blocking_notifier_chain_unregister(&amp;gdev-&gt;device_notifier,</div><div class='ctx'> 					   &amp;cdev-&gt;device_unregistered_nb);</div><div class='ctx'> 	blocking_notifier_chain_unregister(&amp;gdev-&gt;line_state_notifier,</div><div class='ctx'> 					   &amp;cdev-&gt;lineinfo_changed_nb);</div><div class='add'>+	bitmap_free(cdev-&gt;watched_lines);</div><div class='ctx'> 	gpio_device_put(gdev);</div><div class='ctx'> 	kfree(cdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpiolib-legacy.c b/drivers/gpio/gpiolib-legacy.c<br/>index b138682fec3d..5a9911ae9125 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-legacy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-legacy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-legacy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib-legacy.c</a></div><div class='hunk'>@@ -28,10 +28,9 @@ int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	desc = gpio_to_desc(gpio);</div><div class='del'>-</div><div class='ctx'> 	/* Compatibility: assume unavailable "valid" GPIOs will appear later */</div><div class='del'>-	if (!desc &amp;&amp; gpio_is_valid(gpio))</div><div class='add'>+	desc = gpio_to_desc(gpio);</div><div class='add'>+	if (!desc)</div><div class='ctx'> 		return -EPROBE_DEFER;</div><div class='ctx'> </div><div class='ctx'> 	err = gpiod_request(desc, label);</div><div class='hunk'>@@ -63,51 +62,13 @@ EXPORT_SYMBOL_GPL(gpio_request_one);</div><div class='ctx'>  */</div><div class='ctx'> int gpio_request(unsigned gpio, const char *label)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_desc *desc = gpio_to_desc(gpio);</div><div class='add'>+	struct gpio_desc *desc;</div><div class='ctx'> </div><div class='ctx'> 	/* Compatibility: assume unavailable "valid" GPIOs will appear later */</div><div class='del'>-	if (!desc &amp;&amp; gpio_is_valid(gpio))</div><div class='add'>+	desc = gpio_to_desc(gpio);</div><div class='add'>+	if (!desc)</div><div class='ctx'> 		return -EPROBE_DEFER;</div><div class='ctx'> </div><div class='ctx'> 	return gpiod_request(desc, label);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpio_request);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * gpio_request_array - request multiple GPIOs in a single call</div><div class='del'>- * @array:	array of the 'struct gpio'</div><div class='del'>- * @num:	how many GPIOs in the array</div><div class='del'>- *</div><div class='del'>- * **DEPRECATED** This function is deprecated and must not be used in new code.</div><div class='del'>- */</div><div class='del'>-int gpio_request_array(const struct gpio *array, size_t num)</div><div class='del'>-{</div><div class='del'>-	int i, err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num; i++, array++) {</div><div class='del'>-		err = gpio_request_one(array-&gt;gpio, array-&gt;flags, array-&gt;label);</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_free;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_free:</div><div class='del'>-	while (i--)</div><div class='del'>-		gpio_free((--array)-&gt;gpio);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(gpio_request_array);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * gpio_free_array - release multiple GPIOs in a single call</div><div class='del'>- * @array:	array of the 'struct gpio'</div><div class='del'>- * @num:	how many GPIOs in the array</div><div class='del'>- *</div><div class='del'>- * **DEPRECATED** This function is deprecated and must not be used in new code.</div><div class='del'>- */</div><div class='del'>-void gpio_free_array(const struct gpio *array, size_t num)</div><div class='del'>-{</div><div class='del'>-	while (num--)</div><div class='del'>-		gpio_free((array++)-&gt;gpio);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(gpio_free_array);</div><div class='head'>diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c<br/>index cb0cefaec37e..d75f6ee37028 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-of.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-of.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-of.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib-of.c</a></div><div class='hunk'>@@ -1037,7 +1037,7 @@ static int of_gpiochip_add_pin_range(struct gpio_chip *chip)</div><div class='ctx'> 	struct of_phandle_args pinspec;</div><div class='ctx'> 	struct pinctrl_dev *pctldev;</div><div class='ctx'> 	struct device_node *np;</div><div class='del'>-	int index = 0, ret;</div><div class='add'>+	int index = 0, ret, trim;</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	static const char group_names_propname[] = "gpio-ranges-group-names";</div><div class='ctx'> 	struct property *group_names;</div><div class='hunk'>@@ -1059,7 +1059,14 @@ static int of_gpiochip_add_pin_range(struct gpio_chip *chip)</div><div class='ctx'> 		if (!pctldev)</div><div class='ctx'> 			return -EPROBE_DEFER;</div><div class='ctx'> </div><div class='add'>+		/* Ignore ranges outside of this GPIO chip */</div><div class='add'>+		if (pinspec.args[0] &gt;= (chip-&gt;offset + chip-&gt;ngpio))</div><div class='add'>+			continue;</div><div class='add'>+		if (pinspec.args[0] + pinspec.args[2] &lt;= chip-&gt;offset)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		if (pinspec.args[2]) {</div><div class='add'>+			/* npins != 0: linear range */</div><div class='ctx'> 			if (group_names) {</div><div class='ctx'> 				of_property_read_string_index(np,</div><div class='ctx'> 						group_names_propname,</div><div class='hunk'>@@ -1070,7 +1077,19 @@ static int of_gpiochip_add_pin_range(struct gpio_chip *chip)</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='del'>-			/* npins != 0: linear range */</div><div class='add'>+</div><div class='add'>+			/* Trim the range to fit this GPIO chip */</div><div class='add'>+			if (chip-&gt;offset &gt; pinspec.args[0]) {</div><div class='add'>+				trim = chip-&gt;offset - pinspec.args[0];</div><div class='add'>+				pinspec.args[2] -= trim;</div><div class='add'>+				pinspec.args[1] += trim;</div><div class='add'>+				pinspec.args[0] = 0;</div><div class='add'>+			} else {</div><div class='add'>+				pinspec.args[0] -= chip-&gt;offset;</div><div class='add'>+			}</div><div class='add'>+			if ((pinspec.args[0] + pinspec.args[2]) &gt; chip-&gt;ngpio)</div><div class='add'>+				pinspec.args[2] = chip-&gt;ngpio - pinspec.args[0];</div><div class='add'>+</div><div class='ctx'> 			ret = gpiochip_add_pin_range(chip,</div><div class='ctx'> 					pinctrl_dev_get_devname(pctldev),</div><div class='ctx'> 					pinspec.args[0],</div><div class='head'>diff --git a/drivers/gpio/gpiolib-swnode.c b/drivers/gpio/gpiolib-swnode.c<br/>index fa52bdb1a29a..cec1ab878af8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-swnode.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-swnode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-swnode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib-swnode.c</a></div><div class='hunk'>@@ -4,8 +4,13 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2022 Google LLC</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "gpiolib: swnode: " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='hunk'>@@ -17,6 +22,8 @@</div><div class='ctx'> #include "gpiolib.h"</div><div class='ctx'> #include "gpiolib-swnode.h"</div><div class='ctx'> </div><div class='add'>+#define GPIOLIB_SWNODE_UNDEFINED_NAME "swnode-gpio-undefined"</div><div class='add'>+</div><div class='ctx'> static void swnode_format_propname(const char *con_id, char *propname,</div><div class='ctx'> 				   size_t max_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -40,6 +47,14 @@ static struct gpio_device *swnode_get_gpio_device(struct fwnode_handle *fwnode)</div><div class='ctx'> 	if (!gdev_node || !gdev_node-&gt;name)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Check for a special node that identifies undefined GPIOs, this is</div><div class='add'>+	 * primarily used as a key for internal chip selects in SPI bindings.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_GPIO_SWNODE_UNDEFINED) &amp;&amp;</div><div class='add'>+	    !strcmp(gdev_node-&gt;name, GPIOLIB_SWNODE_UNDEFINED_NAME))</div><div class='add'>+		return ERR_PTR(-ENOENT);</div><div class='add'>+</div><div class='ctx'> 	gdev = gpio_device_find_by_label(gdev_node-&gt;name);</div><div class='ctx'> 	return gdev ?: ERR_PTR(-EPROBE_DEFER);</div><div class='ctx'> }</div><div class='hunk'>@@ -121,3 +136,32 @@ int swnode_gpio_count(const struct fwnode_handle *fwnode, const char *con_id)</div><div class='ctx'> </div><div class='ctx'> 	return count ?: -ENOENT;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_GPIO_SWNODE_UNDEFINED)</div><div class='add'>+/*</div><div class='add'>+ * A special node that identifies undefined GPIOs, this is primarily used as</div><div class='add'>+ * a key for internal chip selects in SPI bindings.</div><div class='add'>+ */</div><div class='add'>+const struct software_node swnode_gpio_undefined = {</div><div class='add'>+	.name = GPIOLIB_SWNODE_UNDEFINED_NAME,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(swnode_gpio_undefined, GPIO_SWNODE);</div><div class='add'>+</div><div class='add'>+static int __init swnode_gpio_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = software_node_register(&amp;swnode_gpio_undefined);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		pr_err("failed to register swnode: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(swnode_gpio_init);</div><div class='add'>+</div><div class='add'>+static void __exit swnode_gpio_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	software_node_unregister(&amp;swnode_gpio_undefined);</div><div class='add'>+}</div><div class='add'>+__exitcall(swnode_gpio_cleanup);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c<br/>index 6853ecd98bcb..26202586fd39 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib-sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib-sysfs.c</a></div><div class='hunk'>@@ -412,7 +412,7 @@ static ssize_t base_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	const struct gpio_device *gdev = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%d\n", gdev-&gt;base);</div><div class='add'>+	return sysfs_emit(buf, "%u\n", gdev-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(base);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c<br/>index 94903fc1c145..fa62367ee929 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib.c</a></div><div class='hunk'>@@ -101,6 +101,7 @@ static bool gpiolib_initialized;</div><div class='ctx'> </div><div class='ctx'> const char *gpiod_get_label(struct gpio_desc *desc)</div><div class='ctx'> {</div><div class='add'>+	struct gpio_desc_label *label;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	flags = READ_ONCE(desc-&gt;flags);</div><div class='hunk'>@@ -108,23 +109,36 @@ const char *gpiod_get_label(struct gpio_desc *desc)</div><div class='ctx'> 	    !test_bit(FLAG_REQUESTED, &amp;flags))</div><div class='ctx'> 		return "interrupt";</div><div class='ctx'> </div><div class='del'>-	return test_bit(FLAG_REQUESTED, &amp;flags) ?</div><div class='del'>-			srcu_dereference(desc-&gt;label, &amp;desc-&gt;srcu) : NULL;</div><div class='add'>+	if (!test_bit(FLAG_REQUESTED, &amp;flags))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	label = srcu_dereference_check(desc-&gt;label, &amp;desc-&gt;gdev-&gt;desc_srcu,</div><div class='add'>+				srcu_read_lock_held(&amp;desc-&gt;gdev-&gt;desc_srcu));</div><div class='add'>+</div><div class='add'>+	return label-&gt;str;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void desc_free_label(struct rcu_head *rh)</div><div class='add'>+{</div><div class='add'>+	kfree(container_of(rh, struct gpio_desc_label, rh));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int desc_set_label(struct gpio_desc *desc, const char *label)</div><div class='ctx'> {</div><div class='del'>-	const char *new = NULL, *old;</div><div class='add'>+	struct gpio_desc_label *new = NULL, *old;</div><div class='ctx'> </div><div class='ctx'> 	if (label) {</div><div class='del'>-		new = kstrdup_const(label, GFP_KERNEL);</div><div class='add'>+		new = kzalloc(struct_size(new, str, strlen(label) + 1),</div><div class='add'>+			      GFP_KERNEL);</div><div class='ctx'> 		if (!new)</div><div class='ctx'> 			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		strcpy(new-&gt;str, label);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	old = rcu_replace_pointer(desc-&gt;label, new, 1);</div><div class='del'>-	synchronize_srcu(&amp;desc-&gt;srcu);</div><div class='del'>-	kfree_const(old);</div><div class='add'>+	if (old)</div><div class='add'>+		call_srcu(&amp;desc-&gt;gdev-&gt;desc_srcu, &amp;old-&gt;rh, desc_free_label);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -150,9 +164,6 @@ struct gpio_desc *gpio_to_desc(unsigned gpio)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!gpio_is_valid(gpio))</div><div class='del'>-		pr_warn("invalid GPIO %d\n", gpio);</div><div class='del'>-</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpio_to_desc);</div><div class='hunk'>@@ -297,10 +308,10 @@ struct gpio_chip *gpio_device_get_chip(struct gpio_device *gdev)</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpio_device_get_chip);</div><div class='ctx'> </div><div class='ctx'> /* dynamic allocation of GPIOs, e.g. on a hotplugged device */</div><div class='del'>-static int gpiochip_find_base_unlocked(int ngpio)</div><div class='add'>+static int gpiochip_find_base_unlocked(u16 ngpio)</div><div class='ctx'> {</div><div class='add'>+	unsigned int base = GPIO_DYNAMIC_BASE;</div><div class='ctx'> 	struct gpio_device *gdev;</div><div class='del'>-	int base = GPIO_DYNAMIC_BASE;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_srcu(gdev, &amp;gpio_devices, list,</div><div class='ctx'> 				 lockdep_is_held(&amp;gpio_devices_lock)) {</div><div class='hunk'>@@ -311,9 +322,11 @@ static int gpiochip_find_base_unlocked(int ngpio)</div><div class='ctx'> 		base = gdev-&gt;base + gdev-&gt;ngpio;</div><div class='ctx'> 		if (base &lt; GPIO_DYNAMIC_BASE)</div><div class='ctx'> 			base = GPIO_DYNAMIC_BASE;</div><div class='add'>+		if (base &gt; GPIO_DYNAMIC_MAX - ngpio)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (gpio_is_valid(base)) {</div><div class='add'>+	if (base &lt;= GPIO_DYNAMIC_MAX - ngpio) {</div><div class='ctx'> 		pr_debug("%s: found new base at %d\n", __func__, base);</div><div class='ctx'> 		return base;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -365,7 +378,10 @@ int gpiod_get_direction(struct gpio_desc *desc)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */</div><div class='add'>+	/*</div><div class='add'>+	 * GPIO_LINE_DIRECTION_IN or other positive,</div><div class='add'>+	 * otherwise GPIO_LINE_DIRECTION_OUT.</div><div class='add'>+	 */</div><div class='ctx'> 	if (ret &gt; 0)</div><div class='ctx'> 		ret = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -695,10 +711,10 @@ EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);</div><div class='ctx'> static void gpiodev_release(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpio_device *gdev = to_gpio_device(dev);</div><div class='del'>-	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; gdev-&gt;ngpio; i++)</div><div class='del'>-		cleanup_srcu_struct(&amp;gdev-&gt;descs[i].srcu);</div><div class='add'>+	/* Call pending kfree()s for descriptor labels. */</div><div class='add'>+	synchronize_srcu(&amp;gdev-&gt;desc_srcu);</div><div class='add'>+	cleanup_srcu_struct(&amp;gdev-&gt;desc_srcu);</div><div class='ctx'> </div><div class='ctx'> 	ida_free(&amp;gpio_ida, gdev-&gt;id);</div><div class='ctx'> 	kfree_const(gdev-&gt;label);</div><div class='hunk'>@@ -746,7 +762,7 @@ static int gpiochip_setup_dev(struct gpio_device *gdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_remove_device;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;gdev-&gt;dev, "registered GPIOs %d to %d on %s\n", gdev-&gt;base,</div><div class='add'>+	dev_dbg(&amp;gdev-&gt;dev, "registered GPIOs %u to %u on %s\n", gdev-&gt;base,</div><div class='ctx'> 		gdev-&gt;base + gdev-&gt;ngpio - 1, gdev-&gt;label);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -975,6 +991,10 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_remove_from_list;</div><div class='ctx'> </div><div class='add'>+	ret = init_srcu_struct(&amp;gdev-&gt;desc_srcu);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_cleanup_gdev_srcu;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PINCTRL</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;gdev-&gt;pin_ranges);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -982,23 +1002,19 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,</div><div class='ctx'> 	if (gc-&gt;names) {</div><div class='ctx'> 		ret = gpiochip_set_desc_names(gc);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_cleanup_gdev_srcu;</div><div class='add'>+			goto err_cleanup_desc_srcu;</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = gpiochip_set_names(gc);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_cleanup_gdev_srcu;</div><div class='add'>+		goto err_cleanup_desc_srcu;</div><div class='ctx'> </div><div class='ctx'> 	ret = gpiochip_init_valid_mask(gc);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_cleanup_gdev_srcu;</div><div class='add'>+		goto err_cleanup_desc_srcu;</div><div class='ctx'> </div><div class='ctx'> 	for (desc_index = 0; desc_index &lt; gc-&gt;ngpio; desc_index++) {</div><div class='ctx'> 		struct gpio_desc *desc = &amp;gdev-&gt;descs[desc_index];</div><div class='ctx'> </div><div class='del'>-		ret = init_srcu_struct(&amp;desc-&gt;srcu);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_cleanup_desc_srcu;</div><div class='del'>-</div><div class='ctx'> 		if (gc-&gt;get_direction &amp;&amp; gpiochip_line_is_valid(gc, desc_index)) {</div><div class='ctx'> 			assign_bit(FLAG_IS_OUT,</div><div class='ctx'> 				   &amp;desc-&gt;flags, !gc-&gt;get_direction(gc, desc_index));</div><div class='hunk'>@@ -1010,7 +1026,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,</div><div class='ctx'> </div><div class='ctx'> 	ret = of_gpiochip_add(gc);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_cleanup_desc_srcu;</div><div class='add'>+		goto err_free_valid_mask;</div><div class='ctx'> </div><div class='ctx'> 	ret = gpiochip_add_pin_ranges(gc);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1057,10 +1073,10 @@ err_free_hogs:</div><div class='ctx'> 	gpiochip_remove_pin_ranges(gc);</div><div class='ctx'> err_remove_of_chip:</div><div class='ctx'> 	of_gpiochip_remove(gc);</div><div class='del'>-err_cleanup_desc_srcu:</div><div class='del'>-	while (desc_index--)</div><div class='del'>-		cleanup_srcu_struct(&amp;gdev-&gt;descs[desc_index].srcu);</div><div class='add'>+err_free_valid_mask:</div><div class='ctx'> 	gpiochip_free_valid_mask(gc);</div><div class='add'>+err_cleanup_desc_srcu:</div><div class='add'>+	cleanup_srcu_struct(&amp;gdev-&gt;desc_srcu);</div><div class='ctx'> err_cleanup_gdev_srcu:</div><div class='ctx'> 	cleanup_srcu_struct(&amp;gdev-&gt;srcu);</div><div class='ctx'> err_remove_from_list:</div><div class='hunk'>@@ -2390,7 +2406,7 @@ char *gpiochip_dup_line_label(struct gpio_chip *gc, unsigned int offset)</div><div class='ctx'> 	if (!test_bit(FLAG_REQUESTED, &amp;desc-&gt;flags))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	guard(srcu)(&amp;desc-&gt;srcu);</div><div class='add'>+	guard(srcu)(&amp;desc-&gt;gdev-&gt;desc_srcu);</div><div class='ctx'> </div><div class='ctx'> 	label = kstrdup(gpiod_get_label(desc), GFP_KERNEL);</div><div class='ctx'> 	if (!label)</div><div class='hunk'>@@ -4240,7 +4256,7 @@ struct gpio_desc *gpiod_find_and_request(struct device *consumer,</div><div class='ctx'> 	ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		gpiod_put(desc);</div><div class='del'>-		dev_dbg(consumer, "setup of GPIO %s failed\n", name);</div><div class='add'>+		dev_err(consumer, "setup of GPIO %s failed: %d\n", name, ret);</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4781,21 +4797,21 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_gpio_desc(gc, desc) {</div><div class='del'>-		guard(srcu)(&amp;desc-&gt;srcu);</div><div class='add'>+		guard(srcu)(&amp;desc-&gt;gdev-&gt;desc_srcu);</div><div class='ctx'> 		if (test_bit(FLAG_REQUESTED, &amp;desc-&gt;flags)) {</div><div class='ctx'> 			gpiod_get_direction(desc);</div><div class='ctx'> 			is_out = test_bit(FLAG_IS_OUT, &amp;desc-&gt;flags);</div><div class='ctx'> 			value = gpio_chip_get_value(gc, desc);</div><div class='ctx'> 			is_irq = test_bit(FLAG_USED_AS_IRQ, &amp;desc-&gt;flags);</div><div class='ctx'> 			active_low = test_bit(FLAG_ACTIVE_LOW, &amp;desc-&gt;flags);</div><div class='del'>-			seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",</div><div class='add'>+			seq_printf(s, " gpio-%-3u (%-20.20s|%-20.20s) %s %s %s%s\n",</div><div class='ctx'> 				   gpio, desc-&gt;name ?: "", gpiod_get_label(desc),</div><div class='ctx'> 				   is_out ? "out" : "in ",</div><div class='ctx'> 				   value &gt;= 0 ? (value ? "hi" : "lo") : "?  ",</div><div class='ctx'> 				   is_irq ? "IRQ " : "",</div><div class='ctx'> 				   active_low ? "ACTIVE LOW" : "");</div><div class='ctx'> 		} else if (desc-&gt;name) {</div><div class='del'>-			seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc-&gt;name);</div><div class='add'>+			seq_printf(s, " gpio-%-3u (%-20.20s)\n", gpio, desc-&gt;name);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		gpio++;</div><div class='hunk'>@@ -4867,7 +4883,7 @@ static int gpiolib_seq_show(struct seq_file *s, void *v)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	seq_printf(s, "%s%s: GPIOs %d-%d", priv-&gt;newline ? "\n" : "",</div><div class='add'>+	seq_printf(s, "%s%s: GPIOs %u-%u", priv-&gt;newline ? "\n" : "",</div><div class='ctx'> 		   dev_name(&amp;gdev-&gt;dev),</div><div class='ctx'> 		   gdev-&gt;base, gdev-&gt;base + gdev-&gt;ngpio - 1);</div><div class='ctx'> 	parent = gc-&gt;parent;</div><div class='head'>diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h<br/>index f67d5991ab1c..48e086c2f416 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpio/gpiolib.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpio/gpiolib.h</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'>  * @chip: pointer to the corresponding gpiochip, holding static</div><div class='ctx'>  * data for this device</div><div class='ctx'>  * @descs: array of ngpio descriptors.</div><div class='add'>+ * @desc_srcu: ensures consistent state of GPIO descriptors exposed to users</div><div class='ctx'>  * @ngpio: the number of GPIO lines on this GPIO device, equal to the size</div><div class='ctx'>  * of the @descs array.</div><div class='ctx'>  * @can_sleep: indicate whether the GPIO chip driver's callbacks can sleep</div><div class='hunk'>@@ -61,7 +62,8 @@ struct gpio_device {</div><div class='ctx'> 	struct module		*owner;</div><div class='ctx'> 	struct gpio_chip __rcu	*chip;</div><div class='ctx'> 	struct gpio_desc	*descs;</div><div class='del'>-	int			base;</div><div class='add'>+	struct srcu_struct	desc_srcu;</div><div class='add'>+	unsigned int		base;</div><div class='ctx'> 	u16			ngpio;</div><div class='ctx'> 	bool			can_sleep;</div><div class='ctx'> 	const char		*label;</div><div class='hunk'>@@ -137,6 +139,11 @@ int gpiod_set_transitory(struct gpio_desc *desc, bool transitory);</div><div class='ctx'> </div><div class='ctx'> void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action);</div><div class='ctx'> </div><div class='add'>+struct gpio_desc_label {</div><div class='add'>+	struct rcu_head rh;</div><div class='add'>+	char str[];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct gpio_desc - Opaque descriptor for a GPIO</div><div class='ctx'>  *</div><div class='hunk'>@@ -145,7 +152,6 @@ void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action);</div><div class='ctx'>  * @label:		Name of the consumer</div><div class='ctx'>  * @name:		Line name</div><div class='ctx'>  * @hog:		Pointer to the device node that hogs this line (if any)</div><div class='del'>- * @srcu:		SRCU struct protecting the label pointer.</div><div class='ctx'>  *</div><div class='ctx'>  * These are obtained using gpiod_get() and are preferable to the old</div><div class='ctx'>  * integer-based handles.</div><div class='hunk'>@@ -177,13 +183,12 @@ struct gpio_desc {</div><div class='ctx'> #define FLAG_EVENT_CLOCK_HTE		19 /* GPIO CDEV reports hardware timestamps in events */</div><div class='ctx'> </div><div class='ctx'> 	/* Connection label */</div><div class='del'>-	const char __rcu	*label;</div><div class='add'>+	struct gpio_desc_label __rcu *label;</div><div class='ctx'> 	/* Name of the GPIO */</div><div class='ctx'> 	const char		*name;</div><div class='ctx'> #ifdef CONFIG_OF_DYNAMIC</div><div class='ctx'> 	struct device_node	*hog;</div><div class='ctx'> #endif</div><div class='del'>-	struct srcu_struct	srcu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define gpiod_not_found(desc)		(IS_ERR(desc) &amp;&amp; PTR_ERR(desc) == -ENOENT)</div><div class='hunk'>@@ -251,7 +256,7 @@ static inline int gpio_chip_hwgpio(const struct gpio_desc *desc)</div><div class='ctx'> </div><div class='ctx'> #define gpiod_err(desc, fmt, ...) \</div><div class='ctx'> do { \</div><div class='del'>-	scoped_guard(srcu, &amp;desc-&gt;srcu) { \</div><div class='add'>+	scoped_guard(srcu, &amp;desc-&gt;gdev-&gt;desc_srcu) { \</div><div class='ctx'> 		pr_err("gpio-%d (%s): " fmt, desc_to_gpio(desc), \</div><div class='ctx'> 		       gpiod_get_label(desc) ? : "?", ##__VA_ARGS__); \</div><div class='ctx'> 	} \</div><div class='hunk'>@@ -259,7 +264,7 @@ do { \</div><div class='ctx'> </div><div class='ctx'> #define gpiod_warn(desc, fmt, ...) \</div><div class='ctx'> do { \</div><div class='del'>-	scoped_guard(srcu, &amp;desc-&gt;srcu) { \</div><div class='add'>+	scoped_guard(srcu, &amp;desc-&gt;gdev-&gt;desc_srcu) { \</div><div class='ctx'> 		pr_warn("gpio-%d (%s): " fmt, desc_to_gpio(desc), \</div><div class='ctx'> 			gpiod_get_label(desc) ? : "?", ##__VA_ARGS__); \</div><div class='ctx'> 	} \</div><div class='hunk'>@@ -267,7 +272,7 @@ do { \</div><div class='ctx'> </div><div class='ctx'> #define gpiod_dbg(desc, fmt, ...) \</div><div class='ctx'> do { \</div><div class='del'>-	scoped_guard(srcu, &amp;desc-&gt;srcu) { \</div><div class='add'>+	scoped_guard(srcu, &amp;desc-&gt;gdev-&gt;desc_srcu) { \</div><div class='ctx'> 		pr_debug("gpio-%d (%s): " fmt, desc_to_gpio(desc), \</div><div class='ctx'> 			 gpiod_get_label(desc) ? : "?", ##__VA_ARGS__); \</div><div class='ctx'> 	} \</div><div class='head'>diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig<br/>index 5a0c476361c3..026444eeb5c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/Kconfig</a></div><div class='hunk'>@@ -29,6 +29,8 @@ menuconfig DRM</div><div class='ctx'> 	  details.  You should also select and configure AGP</div><div class='ctx'> 	  (/dev/agpgart) support if it is available for your platform.</div><div class='ctx'> </div><div class='add'>+if DRM</div><div class='add'>+</div><div class='ctx'> config DRM_MIPI_DBI</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on DRM</div><div class='hunk'>@@ -102,6 +104,38 @@ config DRM_KMS_HELPER</div><div class='ctx'> 	help</div><div class='ctx'> 	  CRTC helpers for KMS drivers.</div><div class='ctx'> </div><div class='add'>+config DRM_PANIC</div><div class='add'>+	bool "Display a user-friendly message when a kernel panic occurs"</div><div class='add'>+	depends on DRM &amp;&amp; !FRAMEBUFFER_CONSOLE</div><div class='add'>+	select DRM_KMS_HELPER</div><div class='add'>+	select FONT_SUPPORT</div><div class='add'>+	help</div><div class='add'>+	  Enable a drm panic handler, which will display a user-friendly message</div><div class='add'>+	  when a kernel panic occurs. It's useful when using a user-space</div><div class='add'>+	  console instead of fbcon.</div><div class='add'>+	  It will only work if your graphic driver supports this feature.</div><div class='add'>+	  To support Hi-DPI Display, you can enable bigger fonts like</div><div class='add'>+	  FONT_TER16x32</div><div class='add'>+</div><div class='add'>+config DRM_PANIC_FOREGROUND_COLOR</div><div class='add'>+	hex "Drm panic screen foreground color, in RGB"</div><div class='add'>+	depends on DRM_PANIC</div><div class='add'>+	default 0xffffff</div><div class='add'>+</div><div class='add'>+config DRM_PANIC_BACKGROUND_COLOR</div><div class='add'>+	hex "Drm panic screen background color, in RGB"</div><div class='add'>+	depends on DRM_PANIC</div><div class='add'>+	default 0x000000</div><div class='add'>+</div><div class='add'>+config DRM_PANIC_DEBUG</div><div class='add'>+	bool "Add a debug fs entry to trigger drm_panic"</div><div class='add'>+	depends on DRM_PANIC &amp;&amp; DEBUG_FS</div><div class='add'>+	help</div><div class='add'>+	  Add dri/[device]/drm_panic_plane_x in the kernel debugfs, to force the</div><div class='add'>+	  panic handler to write the panic message to this plane scanout buffer.</div><div class='add'>+	  This is unsafe and should not be enabled on a production build.</div><div class='add'>+	  If in doubt, say "N".</div><div class='add'>+</div><div class='ctx'> config DRM_DEBUG_DP_MST_TOPOLOGY_REFS</div><div class='ctx'>         bool "Enable refcount backtrace history in the DP MST helpers"</div><div class='ctx'> 	depends on STACKTRACE_SUPPORT</div><div class='hunk'>@@ -371,6 +405,8 @@ source "drivers/gpu/drm/lima/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/panfrost/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "drivers/gpu/drm/panthor/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "drivers/gpu/drm/aspeed/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/mcde/Kconfig"</div><div class='hunk'>@@ -403,10 +439,6 @@ config DRM_HYPERV</div><div class='ctx'> config DRM_EXPORT_FOR_TESTS</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-# Separate option because drm_panel_orientation_quirks.c is shared with fbdev</div><div class='del'>-config DRM_PANEL_ORIENTATION_QUIRKS</div><div class='del'>-	tristate</div><div class='del'>-</div><div class='ctx'> config DRM_LIB_RANDOM</div><div class='ctx'> 	bool</div><div class='ctx'> 	default n</div><div class='hunk'>@@ -414,3 +446,22 @@ config DRM_LIB_RANDOM</div><div class='ctx'> config DRM_PRIVACY_SCREEN</div><div class='ctx'> 	bool</div><div class='ctx'> 	default n</div><div class='add'>+</div><div class='add'>+config DRM_WERROR</div><div class='add'>+	bool "Compile the drm subsystem with warnings as errors"</div><div class='add'>+	depends on DRM &amp;&amp; EXPERT</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  A kernel build should not cause any compiler warnings, and this</div><div class='add'>+	  enables the '-Werror' flag to enforce that rule in the drm subsystem.</div><div class='add'>+</div><div class='add'>+	  The drm subsystem enables more warnings than the kernel default, so</div><div class='add'>+	  this config option is disabled by default.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say N.</div><div class='add'>+</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+# Separate option because drm_panel_orientation_quirks.c is shared with fbdev</div><div class='add'>+config DRM_PANEL_ORIENTATION_QUIRKS</div><div class='add'>+	tristate</div><div class='head'>diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile<br/>index 104b42df2e95..f9ca4f8fa6c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/Makefile</a></div><div class='hunk'>@@ -5,6 +5,34 @@</div><div class='ctx'> </div><div class='ctx'> CFLAGS-$(CONFIG_DRM_USE_DYNAMIC_DEBUG)	+= -DDYNAMIC_DEBUG_MODULE</div><div class='ctx'> </div><div class='add'>+# Unconditionally enable W=1 warnings locally</div><div class='add'>+# --- begin copy-paste W=1 warnings from scripts/Makefile.extrawarn</div><div class='add'>+subdir-ccflags-y += -Wextra -Wunused -Wno-unused-parameter</div><div class='add'>+subdir-ccflags-y += $(call cc-option, -Wrestrict)</div><div class='add'>+subdir-ccflags-y += -Wmissing-format-attribute</div><div class='add'>+subdir-ccflags-y += -Wold-style-definition</div><div class='add'>+subdir-ccflags-y += -Wmissing-include-dirs</div><div class='add'>+subdir-ccflags-y += $(call cc-option, -Wunused-but-set-variable)</div><div class='add'>+subdir-ccflags-y += $(call cc-option, -Wunused-const-variable)</div><div class='add'>+subdir-ccflags-y += $(call cc-option, -Wpacked-not-aligned)</div><div class='add'>+subdir-ccflags-y += $(call cc-option, -Wformat-overflow)</div><div class='add'>+# FIXME: fix -Wformat-truncation warnings and uncomment</div><div class='add'>+#subdir-ccflags-y += $(call cc-option, -Wformat-truncation)</div><div class='add'>+subdir-ccflags-y += $(call cc-option, -Wstringop-truncation)</div><div class='add'>+# The following turn off the warnings enabled by -Wextra</div><div class='add'>+ifeq ($(findstring 2, $(KBUILD_EXTRA_WARN)),)</div><div class='add'>+subdir-ccflags-y += -Wno-missing-field-initializers</div><div class='add'>+subdir-ccflags-y += -Wno-type-limits</div><div class='add'>+subdir-ccflags-y += -Wno-shift-negative-value</div><div class='add'>+endif</div><div class='add'>+ifeq ($(findstring 3, $(KBUILD_EXTRA_WARN)),)</div><div class='add'>+subdir-ccflags-y += -Wno-sign-compare</div><div class='add'>+endif</div><div class='add'>+# --- end copy-paste</div><div class='add'>+</div><div class='add'>+# Enable -Werror in CI and development</div><div class='add'>+subdir-ccflags-$(CONFIG_DRM_WERROR) += -Werror</div><div class='add'>+</div><div class='ctx'> drm-y := \</div><div class='ctx'> 	drm_aperture.o \</div><div class='ctx'> 	drm_atomic.o \</div><div class='hunk'>@@ -60,6 +88,7 @@ drm-$(CONFIG_DRM_PRIVACY_SCREEN) += \</div><div class='ctx'> 	drm_privacy_screen.o \</div><div class='ctx'> 	drm_privacy_screen_x86.o</div><div class='ctx'> drm-$(CONFIG_DRM_ACCEL) += ../../accel/drm_accel.o</div><div class='add'>+drm-$(CONFIG_DRM_PANIC) += drm_panic.o</div><div class='ctx'> obj-$(CONFIG_DRM)	+= drm.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += drm_panel_orientation_quirks.o</div><div class='hunk'>@@ -179,6 +208,7 @@ obj-$(CONFIG_DRM_XEN) += xen/</div><div class='ctx'> obj-$(CONFIG_DRM_VBOXVIDEO) += vboxvideo/</div><div class='ctx'> obj-$(CONFIG_DRM_LIMA)  += lima/</div><div class='ctx'> obj-$(CONFIG_DRM_PANFROST) += panfrost/</div><div class='add'>+obj-$(CONFIG_DRM_PANTHOR) += panthor/</div><div class='ctx'> obj-$(CONFIG_DRM_ASPEED_GFX) += aspeed/</div><div class='ctx'> obj-$(CONFIG_DRM_MCDE) += mcde/</div><div class='ctx'> obj-$(CONFIG_DRM_TIDSS) += tidss/</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile<br/>index 4536c8ad0e11..1f6b56ec99f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/Makefile</a></div><div class='hunk'>@@ -70,7 +70,8 @@ amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o amdgpu_kms.o \</div><div class='ctx'> 	amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o \</div><div class='ctx'> 	atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \</div><div class='ctx'> 	atombios_encoders.o amdgpu_sa.o atombios_i2c.o \</div><div class='del'>-	amdgpu_dma_buf.o amdgpu_vm.o amdgpu_vm_pt.o amdgpu_ib.o amdgpu_pll.o \</div><div class='add'>+	amdgpu_dma_buf.o amdgpu_vm.o amdgpu_vm_pt.o amdgpu_vm_tlb_fence.o \</div><div class='add'>+	amdgpu_ib.o amdgpu_pll.o \</div><div class='ctx'> 	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \</div><div class='ctx'> 	amdgpu_gtt_mgr.o amdgpu_preempt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o \</div><div class='ctx'> 	amdgpu_atomfirmware.o amdgpu_vf_error.o amdgpu_sched.o \</div><div class='hunk'>@@ -80,7 +81,7 @@ amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o amdgpu_kms.o \</div><div class='ctx'> 	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \</div><div class='ctx'> 	amdgpu_fw_attestation.o amdgpu_securedisplay.o \</div><div class='ctx'> 	amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \</div><div class='del'>-	amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o</div><div class='add'>+	amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o amdgpu_dev_coredump.o</div><div class='ctx'> </div><div class='ctx'> amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o</div><div class='ctx'> </div><div class='hunk'>@@ -247,7 +248,8 @@ amdgpu-y += \</div><div class='ctx'> 	smuio_v11_0_6.o \</div><div class='ctx'> 	smuio_v13_0.o \</div><div class='ctx'> 	smuio_v13_0_3.o \</div><div class='del'>-	smuio_v13_0_6.o</div><div class='add'>+	smuio_v13_0_6.o \</div><div class='add'>+	smuio_v14_0_2.o</div><div class='ctx'> </div><div class='ctx'> # add reset block</div><div class='ctx'> amdgpu-y += \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/aldebaran.c b/drivers/gpu/drm/amd/amdgpu/aldebaran.c<br/>index 576067d66bb9..d0a8da67dc2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/aldebaran.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/aldebaran.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/aldebaran.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/aldebaran.c</a></div><div class='hunk'>@@ -97,7 +97,7 @@ static int aldebaran_mode2_suspend_ip(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;ip_blocks[i].status.hw = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return r;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br/>index b3b84647207e..f87d53e183c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a></div><div class='hunk'>@@ -139,6 +139,14 @@ enum amdgpu_ss {</div><div class='ctx'> 	AMDGPU_SS_DRV_UNLOAD</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct amdgpu_hwip_reg_entry {</div><div class='add'>+	u32		hwip;</div><div class='add'>+	u32		inst;</div><div class='add'>+	u32		seg;</div><div class='add'>+	u32		reg_offset;</div><div class='add'>+	const char	*reg_name;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct amdgpu_watchdog_timer {</div><div class='ctx'> 	bool timeout_fatal_disable;</div><div class='ctx'> 	uint32_t period; /* maxCycles = (1 &lt;&lt; period), the number of cycles before a timeout */</div><div class='hunk'>@@ -494,6 +502,7 @@ struct amdgpu_wb {</div><div class='ctx'> 	uint64_t		gpu_addr;</div><div class='ctx'> 	u32			num_wb;	/* Number of wb slots actually reserved for amdgpu. */</div><div class='ctx'> 	unsigned long		used[DIV_ROUND_UP(AMDGPU_MAX_WB, BITS_PER_LONG)];</div><div class='add'>+	spinlock_t		lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);</div><div class='hunk'>@@ -606,7 +615,7 @@ struct amdgpu_asic_funcs {</div><div class='ctx'> 	/* PCIe replay counter */</div><div class='ctx'> 	uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);</div><div class='ctx'> 	/* device supports BACO */</div><div class='del'>-	bool (*supports_baco)(struct amdgpu_device *adev);</div><div class='add'>+	int (*supports_baco)(struct amdgpu_device *adev);</div><div class='ctx'> 	/* pre asic_init quirks */</div><div class='ctx'> 	void (*pre_asic_init)(struct amdgpu_device *adev);</div><div class='ctx'> 	/* enter/exit umd stable pstate */</div><div class='hunk'>@@ -1408,7 +1417,8 @@ bool amdgpu_device_supports_atpx(struct drm_device *dev);</div><div class='ctx'> bool amdgpu_device_supports_px(struct drm_device *dev);</div><div class='ctx'> bool amdgpu_device_supports_boco(struct drm_device *dev);</div><div class='ctx'> bool amdgpu_device_supports_smart_shift(struct drm_device *dev);</div><div class='del'>-bool amdgpu_device_supports_baco(struct drm_device *dev);</div><div class='add'>+int amdgpu_device_supports_baco(struct drm_device *dev);</div><div class='add'>+void amdgpu_device_detect_runtime_pm_mode(struct amdgpu_device *adev);</div><div class='ctx'> bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,</div><div class='ctx'> 				      struct amdgpu_device *peer_adev);</div><div class='ctx'> int amdgpu_device_baco_enter(struct drm_device *dev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c<br/>index 493982f94649..c50202215f6b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> </div><div class='ctx'> #define ACA_BANK_HWID(type, hwid, mcatype) [ACA_HWIP_TYPE_##type] = {hwid, mcatype}</div><div class='ctx'> </div><div class='del'>-typedef int bank_handler_t(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type, void *data);</div><div class='add'>+typedef int bank_handler_t(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type, void *data);</div><div class='ctx'> </div><div class='ctx'> struct aca_banks {</div><div class='ctx'> 	int nr_banks;</div><div class='hunk'>@@ -86,7 +86,7 @@ static void aca_banks_release(struct aca_banks *banks)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev, enum aca_error_type type, u32 *count)</div><div class='add'>+static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev, enum aca_smu_type type, u32 *count)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='ctx'> 	const struct aca_smu_funcs *smu_funcs = aca-&gt;smu_funcs;</div><div class='hunk'>@@ -116,20 +116,22 @@ static struct aca_regs_dump {</div><div class='ctx'> 	{"CONTROL_MASK",	ACA_REG_IDX_CTL_MASK},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void aca_smu_bank_dump(struct amdgpu_device *adev, int idx, int total, struct aca_bank *bank)</div><div class='add'>+static void aca_smu_bank_dump(struct amdgpu_device *adev, int idx, int total, struct aca_bank *bank,</div><div class='add'>+			      struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='add'>+	u64 event_id = qctx ? qctx-&gt;event_id : 0ULL;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "Accelerator Check Architecture events logged\n");</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "Accelerator Check Architecture events logged\n");</div><div class='ctx'> 	/* plus 1 for output format, e.g: ACA[08/08]: xxxx */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(aca_regs); i++)</div><div class='del'>-		dev_info(adev-&gt;dev, HW_ERR "ACA[%02d/%02d].%s=0x%016llx\n",</div><div class='del'>-			 idx + 1, total, aca_regs[i].name, bank-&gt;regs[aca_regs[i].reg_idx]);</div><div class='add'>+		RAS_EVENT_LOG(adev, event_id, HW_ERR "ACA[%02d/%02d].%s=0x%016llx\n",</div><div class='add'>+			      idx + 1, total, aca_regs[i].name, bank-&gt;regs[aca_regs[i].reg_idx]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum aca_error_type type,</div><div class='add'>+static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum aca_smu_type type,</div><div class='ctx'> 				       int start, int count,</div><div class='del'>-				       struct aca_banks *banks)</div><div class='add'>+				       struct aca_banks *banks, struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='ctx'> 	const struct aca_smu_funcs *smu_funcs = aca-&gt;smu_funcs;</div><div class='hunk'>@@ -143,13 +145,12 @@ static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum aca_erro</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='del'>-	case ACA_ERROR_TYPE_UE:</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='ctx'> 		max_count = smu_funcs-&gt;max_ue_bank_count;</div><div class='ctx'> 		break;</div><div class='del'>-	case ACA_ERROR_TYPE_CE:</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='ctx'> 		max_count = smu_funcs-&gt;max_ce_bank_count;</div><div class='ctx'> 		break;</div><div class='del'>-	case ACA_ERROR_TYPE_DEFERRED:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -164,7 +165,9 @@ static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum aca_erro</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		aca_smu_bank_dump(adev, i, count, &amp;bank);</div><div class='add'>+		bank.type = type;</div><div class='add'>+</div><div class='add'>+		aca_smu_bank_dump(adev, i, count, &amp;bank, qctx);</div><div class='ctx'> </div><div class='ctx'> 		ret = aca_banks_add_bank(banks, &amp;bank);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -195,7 +198,7 @@ static bool aca_bank_hwip_is_matched(struct aca_bank *bank, enum aca_hwip_type t</div><div class='ctx'> 	return hwip-&gt;hwid == hwid &amp;&amp; hwip-&gt;mcatype == mcatype;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type)</div><div class='add'>+static bool aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type)</div><div class='ctx'> {</div><div class='ctx'> 	const struct aca_bank_ops *bank_ops = handle-&gt;bank_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -273,59 +276,49 @@ static struct aca_bank_error *get_bank_error(struct aca_error *aerr, struct aca_</div><div class='ctx'> 	return new_bank_error(aerr, info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_log_errors(struct aca_handle *handle, enum aca_error_type type,</div><div class='del'>-			  struct aca_bank_report *report)</div><div class='add'>+int aca_error_cache_log_bank_error(struct aca_handle *handle, struct aca_bank_info *info,</div><div class='add'>+				   enum aca_error_type type, u64 count)</div><div class='ctx'> {</div><div class='ctx'> 	struct aca_error_cache *error_cache = &amp;handle-&gt;error_cache;</div><div class='ctx'> 	struct aca_bank_error *bank_error;</div><div class='ctx'> 	struct aca_error *aerr;</div><div class='ctx'> </div><div class='del'>-	if (!handle || !report)</div><div class='add'>+	if (!handle || !info || type &gt;= ACA_ERROR_TYPE_COUNT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!report-&gt;count[type])</div><div class='add'>+	if (!count)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	aerr = &amp;error_cache-&gt;errors[type];</div><div class='del'>-	bank_error = get_bank_error(aerr, &amp;report-&gt;info);</div><div class='add'>+	bank_error = get_bank_error(aerr, info);</div><div class='ctx'> 	if (!bank_error)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	bank_error-&gt;count[type] += report-&gt;count[type];</div><div class='add'>+	bank_error-&gt;count += count;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_generate_bank_report(struct aca_handle *handle, struct aca_bank *bank,</div><div class='del'>-				    enum aca_error_type type, struct aca_bank_report *report)</div><div class='add'>+static int aca_bank_parser(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type)</div><div class='ctx'> {</div><div class='ctx'> 	const struct aca_bank_ops *bank_ops = handle-&gt;bank_ops;</div><div class='ctx'> </div><div class='del'>-	if (!bank || !report)</div><div class='add'>+	if (!bank)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!bank_ops-&gt;aca_bank_generate_report)</div><div class='add'>+	if (!bank_ops-&gt;aca_bank_parser)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	memset(report, 0, sizeof(*report));</div><div class='del'>-	return bank_ops-&gt;aca_bank_generate_report(handle, bank, type,</div><div class='del'>-						  report, handle-&gt;data);</div><div class='add'>+	return bank_ops-&gt;aca_bank_parser(handle, bank, type,</div><div class='add'>+					 handle-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int handler_aca_log_bank_error(struct aca_handle *handle, struct aca_bank *bank,</div><div class='del'>-				      enum aca_error_type type, void *data)</div><div class='add'>+				      enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct aca_bank_report report;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = aca_generate_bank_report(handle, bank, type, &amp;report);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!report.count[type])</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	ret = aca_log_errors(handle, type, &amp;report);</div><div class='add'>+	ret = aca_bank_parser(handle, bank, type);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -333,7 +326,7 @@ static int handler_aca_log_bank_error(struct aca_handle *handle, struct aca_bank</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_dispatch_bank(struct aca_handle_manager *mgr, struct aca_bank *bank,</div><div class='del'>-			     enum aca_error_type type, bank_handler_t handler, void *data)</div><div class='add'>+			     enum aca_smu_type type, bank_handler_t handler, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct aca_handle *handle;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -354,7 +347,7 @@ static int aca_dispatch_bank(struct aca_handle_manager *mgr, struct aca_bank *ba</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_dispatch_banks(struct aca_handle_manager *mgr, struct aca_banks *banks,</div><div class='del'>-			      enum aca_error_type type, bank_handler_t handler, void *data)</div><div class='add'>+			      enum aca_smu_type type, bank_handler_t handler, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct aca_bank_node *node;</div><div class='ctx'> 	struct aca_bank *bank;</div><div class='hunk'>@@ -378,8 +371,28 @@ static int aca_dispatch_banks(struct aca_handle_manager *mgr, struct aca_banks *</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_banks_update(struct amdgpu_device *adev, enum aca_error_type type,</div><div class='del'>-			    bank_handler_t handler, void *data)</div><div class='add'>+static bool aca_bank_should_update(struct amdgpu_device *adev, enum aca_smu_type type)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='add'>+	bool ret = true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Because the UE Valid MCA count will only be cleared after reset,</div><div class='add'>+	 * in order to avoid repeated counting of the error count,</div><div class='add'>+	 * the aca bank is only updated once during the gpu recovery stage.</div><div class='add'>+	 */</div><div class='add'>+	if (type == ACA_SMU_TYPE_UE) {</div><div class='add'>+		if (amdgpu_ras_intr_triggered())</div><div class='add'>+			ret = atomic_cmpxchg(&amp;aca-&gt;ue_update_flag, 0, 1) == 0;</div><div class='add'>+		else</div><div class='add'>+			atomic_set(&amp;aca-&gt;ue_update_flag, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aca_banks_update(struct amdgpu_device *adev, enum aca_smu_type type,</div><div class='add'>+			    bank_handler_t handler, struct ras_query_context *qctx, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='ctx'> 	struct aca_banks banks;</div><div class='hunk'>@@ -389,9 +402,8 @@ static int aca_banks_update(struct amdgpu_device *adev, enum aca_error_type type</div><div class='ctx'> 	if (list_empty(&amp;aca-&gt;mgr.list))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* NOTE: pmfw is only support UE and CE */</div><div class='del'>-	if (type == ACA_ERROR_TYPE_DEFERRED)</div><div class='del'>-		type = ACA_ERROR_TYPE_CE;</div><div class='add'>+	if (!aca_bank_should_update(adev, type))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = aca_smu_get_valid_aca_count(adev, type, &amp;count);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -402,7 +414,7 @@ static int aca_banks_update(struct amdgpu_device *adev, enum aca_error_type type</div><div class='ctx'> </div><div class='ctx'> 	aca_banks_init(&amp;banks);</div><div class='ctx'> </div><div class='del'>-	ret = aca_smu_get_valid_aca_banks(adev, type, 0, count, &amp;banks);</div><div class='add'>+	ret = aca_smu_get_valid_aca_banks(adev, type, 0, count, &amp;banks, qctx);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_release_banks;</div><div class='ctx'> </div><div class='hunk'>@@ -431,7 +443,7 @@ static int aca_log_aca_error_data(struct aca_bank_error *bank_error, enum aca_er</div><div class='ctx'> 	if (type &gt;= ACA_ERROR_TYPE_COUNT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	count = bank_error-&gt;count[type];</div><div class='add'>+	count = bank_error-&gt;count;</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -447,6 +459,8 @@ static int aca_log_aca_error_data(struct aca_bank_error *bank_error, enum aca_er</div><div class='ctx'> 		amdgpu_ras_error_statistic_ce_count(err_data, &amp;mcm_info, NULL, count);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ACA_ERROR_TYPE_DEFERRED:</div><div class='add'>+		amdgpu_ras_error_statistic_de_count(err_data, &amp;mcm_info, NULL, count);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -477,12 +491,25 @@ out_unlock:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *handle, enum aca_error_type type,</div><div class='del'>-				struct ras_err_data *err_data)</div><div class='add'>+				struct ras_err_data *err_data, struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='add'>+	enum aca_smu_type smu_type;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	switch (type) {</div><div class='add'>+	case ACA_ERROR_TYPE_UE:</div><div class='add'>+		smu_type = ACA_SMU_TYPE_UE;</div><div class='add'>+		break;</div><div class='add'>+	case ACA_ERROR_TYPE_CE:</div><div class='add'>+	case ACA_ERROR_TYPE_DEFERRED:</div><div class='add'>+		smu_type = ACA_SMU_TYPE_CE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* udpate aca bank to aca source error_cache first */</div><div class='del'>-	ret = aca_banks_update(adev, type, handler_aca_log_bank_error, NULL);</div><div class='add'>+	ret = aca_banks_update(adev, smu_type, handler_aca_log_bank_error, qctx, NULL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -498,10 +525,9 @@ static bool aca_handle_is_valid(struct aca_handle *handle)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *handle,</div><div class='del'>-			      enum aca_error_type type, void *data)</div><div class='add'>+			      enum aca_error_type type, struct ras_err_data *err_data,</div><div class='add'>+			      struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='del'>-	struct ras_err_data *err_data = (struct ras_err_data *)data;</div><div class='del'>-</div><div class='ctx'> 	if (!handle || !err_data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -511,7 +537,7 @@ int amdgpu_aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *han</div><div class='ctx'> 	if (!(BIT(type) &amp; handle-&gt;mask))</div><div class='ctx'> 		return  0;</div><div class='ctx'> </div><div class='del'>-	return __aca_get_error_data(adev, handle, type, err_data);</div><div class='add'>+	return __aca_get_error_data(adev, handle, type, err_data, qctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void aca_error_init(struct aca_error *aerr, enum aca_error_type type)</div><div class='hunk'>@@ -668,6 +694,8 @@ int amdgpu_aca_init(struct amdgpu_device *adev)</div><div class='ctx'> 	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	atomic_set(&amp;aca-&gt;ue_update_flag, 0);</div><div class='add'>+</div><div class='ctx'> 	ret = aca_manager_init(&amp;aca-&gt;mgr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -680,6 +708,8 @@ void amdgpu_aca_fini(struct amdgpu_device *adev)</div><div class='ctx'> 	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='ctx'> </div><div class='ctx'> 	aca_manager_fini(&amp;aca-&gt;mgr);</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;aca-&gt;ue_update_flag, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_aca_reset(struct amdgpu_device *adev)</div><div class='hunk'>@@ -723,23 +753,13 @@ int aca_bank_info_decode(struct aca_bank *bank, struct aca_bank_info *info)</div><div class='ctx'> </div><div class='ctx'> static int aca_bank_get_error_code(struct amdgpu_device *adev, struct aca_bank *bank)</div><div class='ctx'> {</div><div class='del'>-	int error_code;</div><div class='del'>-</div><div class='del'>-	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {</div><div class='del'>-	case IP_VERSION(13, 0, 6):</div><div class='del'>-		if (!(adev-&gt;flags &amp; AMD_IS_APU) &amp;&amp; adev-&gt;pm.fw_version &gt;= 0x00555600) {</div><div class='del'>-			error_code = ACA_REG__SYND__ERRORINFORMATION(bank-&gt;regs[ACA_REG_IDX_SYND]);</div><div class='del'>-			return error_code &amp; 0xff;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	struct amdgpu_aca *aca = &amp;adev-&gt;aca;</div><div class='add'>+	const struct aca_smu_funcs *smu_funcs = aca-&gt;smu_funcs;</div><div class='ctx'> </div><div class='del'>-	/* NOTE: the true error code is encoded in status.errorcode[0:7] */</div><div class='del'>-	error_code = ACA_REG__STATUS__ERRORCODE(bank-&gt;regs[ACA_REG_IDX_STATUS]);</div><div class='add'>+	if (!smu_funcs || !smu_funcs-&gt;parse_error_code)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return error_code &amp; 0xff;</div><div class='add'>+	return smu_funcs-&gt;parse_error_code(adev, bank);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int aca_bank_check_error_codes(struct amdgpu_device *adev, struct aca_bank *bank, int *err_codes, int size)</div><div class='hunk'>@@ -750,6 +770,9 @@ int aca_bank_check_error_codes(struct amdgpu_device *adev, struct aca_bank *bank</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	error_code = aca_bank_get_error_code(adev, bank);</div><div class='add'>+	if (error_code &lt; 0)</div><div class='add'>+		return error_code;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; size; i++) {</div><div class='ctx'> 		if (err_codes[i] == error_code)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -784,7 +807,7 @@ static int amdgpu_aca_smu_debug_mode_set(void *data, u64 val)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void aca_dump_entry(struct seq_file *m, struct aca_bank *bank, enum aca_error_type type, int idx)</div><div class='add'>+static void aca_dump_entry(struct seq_file *m, struct aca_bank *bank, enum aca_smu_type type, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct aca_bank_info info;</div><div class='ctx'> 	int i, ret;</div><div class='hunk'>@@ -793,7 +816,7 @@ static void aca_dump_entry(struct seq_file *m, struct aca_bank *bank, enum aca_e</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	seq_printf(m, "aca entry[%d].type: %s\n", idx, type ==  ACA_ERROR_TYPE_UE ? "UE" : "CE");</div><div class='add'>+	seq_printf(m, "aca entry[%d].type: %s\n", idx, type ==  ACA_SMU_TYPE_UE ? "UE" : "CE");</div><div class='ctx'> 	seq_printf(m, "aca entry[%d].info: socketid:%d aid:%d hwid:0x%03x mcatype:0x%04x\n",</div><div class='ctx'> 		   idx, info.socket_id, info.die_id, info.hwid, info.mcatype);</div><div class='ctx'> </div><div class='hunk'>@@ -807,7 +830,7 @@ struct aca_dump_context {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int handler_aca_bank_dump(struct aca_handle *handle, struct aca_bank *bank,</div><div class='del'>-				 enum aca_error_type type, void *data)</div><div class='add'>+				 enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct aca_dump_context *ctx = (struct aca_dump_context *)data;</div><div class='ctx'> </div><div class='hunk'>@@ -816,7 +839,7 @@ static int handler_aca_bank_dump(struct aca_handle *handle, struct aca_bank *ban</div><div class='ctx'> 	return handler_aca_log_bank_error(handle, bank, type, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_dump_show(struct seq_file *m, enum aca_error_type type)</div><div class='add'>+static int aca_dump_show(struct seq_file *m, enum aca_smu_type type)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)m-&gt;private;</div><div class='ctx'> 	struct aca_dump_context context = {</div><div class='hunk'>@@ -824,12 +847,12 @@ static int aca_dump_show(struct seq_file *m, enum aca_error_type type)</div><div class='ctx'> 		.idx = 0,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return aca_banks_update(adev, type, handler_aca_bank_dump, (void *)&amp;context);</div><div class='add'>+	return aca_banks_update(adev, type, handler_aca_bank_dump, NULL, (void *)&amp;context);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_dump_ce_show(struct seq_file *m, void *unused)</div><div class='ctx'> {</div><div class='del'>-	return aca_dump_show(m, ACA_ERROR_TYPE_CE);</div><div class='add'>+	return aca_dump_show(m, ACA_SMU_TYPE_CE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_dump_ce_open(struct inode *inode, struct file *file)</div><div class='hunk'>@@ -847,7 +870,7 @@ static const struct file_operations aca_ce_dump_debug_fops = {</div><div class='ctx'> </div><div class='ctx'> static int aca_dump_ue_show(struct seq_file *m, void *unused)</div><div class='ctx'> {</div><div class='del'>-	return aca_dump_show(m, ACA_ERROR_TYPE_UE);</div><div class='add'>+	return aca_dump_show(m, ACA_SMU_TYPE_UE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_dump_ue_open(struct inode *inode, struct file *file)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h<br/>index 2da50e095883..5ef6b745f222 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> </div><div class='add'>+struct ras_err_data;</div><div class='add'>+struct ras_query_context;</div><div class='add'>+</div><div class='ctx'> #define ACA_MAX_REGS_COUNT	(16)</div><div class='ctx'> </div><div class='ctx'> #define ACA_REG_FIELD(x, h, l)			(((x) &amp; GENMASK_ULL(h, l)) &gt;&gt; l)</div><div class='hunk'>@@ -99,7 +102,14 @@ enum aca_error_type {</div><div class='ctx'> 	ACA_ERROR_TYPE_COUNT</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum aca_smu_type {</div><div class='add'>+	ACA_SMU_TYPE_UE = 0,</div><div class='add'>+	ACA_SMU_TYPE_CE,</div><div class='add'>+	ACA_SMU_TYPE_COUNT,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct aca_bank {</div><div class='add'>+	enum aca_smu_type type;</div><div class='ctx'> 	u64 regs[ACA_MAX_REGS_COUNT];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -115,15 +125,10 @@ struct aca_bank_info {</div><div class='ctx'> 	int mcatype;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct aca_bank_report {</div><div class='del'>-	struct aca_bank_info info;</div><div class='del'>-	u64 count[ACA_ERROR_TYPE_COUNT];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct aca_bank_error {</div><div class='ctx'> 	struct list_head node;</div><div class='ctx'> 	struct aca_bank_info info;</div><div class='del'>-	u64 count[ACA_ERROR_TYPE_COUNT];</div><div class='add'>+	u64 count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct aca_error {</div><div class='hunk'>@@ -157,9 +162,8 @@ struct aca_handle {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct aca_bank_ops {</div><div class='del'>-	int (*aca_bank_generate_report)(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type,</div><div class='del'>-					struct aca_bank_report *report, void *data);</div><div class='del'>-	bool (*aca_bank_is_valid)(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type,</div><div class='add'>+	int (*aca_bank_parser)(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type, void *data);</div><div class='add'>+	bool (*aca_bank_is_valid)(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type,</div><div class='ctx'> 				  void *data);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -167,13 +171,15 @@ struct aca_smu_funcs {</div><div class='ctx'> 	int max_ue_bank_count;</div><div class='ctx'> 	int max_ce_bank_count;</div><div class='ctx'> 	int (*set_debug_mode)(struct amdgpu_device *adev, bool enable);</div><div class='del'>-	int (*get_valid_aca_count)(struct amdgpu_device *adev, enum aca_error_type type, u32 *count);</div><div class='del'>-	int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum aca_error_type type, int idx, struct aca_bank *bank);</div><div class='add'>+	int (*get_valid_aca_count)(struct amdgpu_device *adev, enum aca_smu_type type, u32 *count);</div><div class='add'>+	int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum aca_smu_type type, int idx, struct aca_bank *bank);</div><div class='add'>+	int (*parse_error_code)(struct amdgpu_device *adev, struct aca_bank *bank);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_aca {</div><div class='ctx'> 	struct aca_handle_manager mgr;</div><div class='ctx'> 	const struct aca_smu_funcs *smu_funcs;</div><div class='add'>+	atomic_t ue_update_flag;</div><div class='ctx'> 	bool is_enabled;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +202,10 @@ int amdgpu_aca_add_handle(struct amdgpu_device *adev, struct aca_handle *handle,</div><div class='ctx'> 			  const char *name, const struct aca_info *aca_info, void *data);</div><div class='ctx'> void amdgpu_aca_remove_handle(struct aca_handle *handle);</div><div class='ctx'> int amdgpu_aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *handle,</div><div class='del'>-				     enum aca_error_type type, void *data);</div><div class='add'>+			      enum aca_error_type type, struct ras_err_data *err_data,</div><div class='add'>+			      struct ras_query_context *qctx);</div><div class='ctx'> int amdgpu_aca_smu_set_debug_mode(struct amdgpu_device *adev, bool en);</div><div class='ctx'> void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root);</div><div class='add'>+int aca_error_cache_log_bank_error(struct aca_handle *handle, struct aca_bank_info *info,</div><div class='add'>+				   enum aca_error_type type, u64 count);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c<br/>index 6d72355ac492..bf6c4a0d0525 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c</a></div><div class='hunk'>@@ -637,6 +637,8 @@ static const struct amd_ip_funcs acp_ip_funcs = {</div><div class='ctx'> 	.soft_reset = acp_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = acp_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = acp_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version acp_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c<br/>index 35dd6effa9a3..7ba05f030dd1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c</a></div><div class='hunk'>@@ -747,10 +747,17 @@ bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev)</div><div class='ctx'> 	return amdgpu_ras_get_fed_status(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void amdgpu_amdkfd_ras_pasid_poison_consumption_handler(struct amdgpu_device *adev,</div><div class='add'>+				enum amdgpu_ras_block block, uint16_t pasid,</div><div class='add'>+				pasid_notify pasid_fn, void *data, uint32_t reset)</div><div class='add'>+{</div><div class='add'>+	amdgpu_umc_pasid_poison_handler(adev, block, pasid, pasid_fn, data, reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,</div><div class='del'>-	enum amdgpu_ras_block block, bool reset)</div><div class='add'>+	enum amdgpu_ras_block block, uint32_t reset)</div><div class='ctx'> {</div><div class='del'>-	amdgpu_umc_poison_handler(adev, block, reset);</div><div class='add'>+	amdgpu_umc_pasid_poison_handler(adev, block, 0, NULL, NULL, reset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,</div><div class='hunk'>@@ -769,12 +776,20 @@ int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev)</div><div class='add'>+bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev,</div><div class='add'>+			int hub_inst, int hub_type)</div><div class='ctx'> {</div><div class='del'>-	if (adev-&gt;gfx.ras &amp;&amp; adev-&gt;gfx.ras-&gt;query_utcl2_poison_status)</div><div class='del'>-		return adev-&gt;gfx.ras-&gt;query_utcl2_poison_status(adev);</div><div class='del'>-	else</div><div class='del'>-		return false;</div><div class='add'>+	if (!hub_type) {</div><div class='add'>+		if (adev-&gt;gfxhub.funcs-&gt;query_utcl2_poison_status)</div><div class='add'>+			return adev-&gt;gfxhub.funcs-&gt;query_utcl2_poison_status(adev, hub_inst);</div><div class='add'>+		else</div><div class='add'>+			return false;</div><div class='add'>+	} else {</div><div class='add'>+		if (adev-&gt;mmhub.funcs-&gt;query_utcl2_poison_status)</div><div class='add'>+			return adev-&gt;mmhub.funcs-&gt;query_utcl2_poison_status(adev, hub_inst);</div><div class='add'>+		else</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h<br/>index 0ef223c2affb..1de021ebdd46 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h</a></div><div class='hunk'>@@ -336,12 +336,18 @@ void amdgpu_amdkfd_debug_mem_fence(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,</div><div class='ctx'> 				struct tile_config *config);</div><div class='ctx'> void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,</div><div class='del'>-			enum amdgpu_ras_block block, bool reset);</div><div class='add'>+			enum amdgpu_ras_block block, uint32_t reset);</div><div class='add'>+</div><div class='add'>+void amdgpu_amdkfd_ras_pasid_poison_consumption_handler(struct amdgpu_device *adev,</div><div class='add'>+			enum amdgpu_ras_block block, uint16_t pasid,</div><div class='add'>+			pasid_notify pasid_fn, void *data, uint32_t reset);</div><div class='add'>+</div><div class='ctx'> bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);</div><div class='ctx'> bool amdgpu_amdkfd_bo_mapped_to_dev(struct amdgpu_device *adev, struct kgd_mem *mem);</div><div class='ctx'> void amdgpu_amdkfd_block_mmu_notifications(void *p);</div><div class='ctx'> int amdgpu_amdkfd_criu_resume(void *p);</div><div class='del'>-bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev);</div><div class='add'>+bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev,</div><div class='add'>+			int hub_inst, int hub_type);</div><div class='ctx'> int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,</div><div class='ctx'> 		uint64_t size, u32 alloc_flag, int8_t xcp_id);</div><div class='ctx'> void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c<br/>index 69810b3f1c63..3ab6c3aa0ad1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c</a></div><div class='hunk'>@@ -881,6 +881,7 @@ uint32_t kgd_gfx_v10_set_wave_launch_mode(struct amdgpu_device *adev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define TCP_WATCH_STRIDE (mmTCP_WATCH1_ADDR_H - mmTCP_WATCH0_ADDR_H)</div><div class='add'>+#define SQ_WATCH_STRIDE (mmSQ_WATCH1_ADDR_H - mmSQ_WATCH0_ADDR_H)</div><div class='ctx'> uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device *adev,</div><div class='ctx'> 					uint64_t watch_address,</div><div class='ctx'> 					uint32_t watch_address_mask,</div><div class='hunk'>@@ -889,55 +890,93 @@ uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device *adev,</div><div class='ctx'> 					uint32_t debug_vmid,</div><div class='ctx'> 					uint32_t inst)</div><div class='ctx'> {</div><div class='add'>+	/* SQ_WATCH?_ADDR_* and TCP_WATCH?_ADDR_* are programmed with the</div><div class='add'>+	 * same values.</div><div class='add'>+	 */</div><div class='ctx'> 	uint32_t watch_address_high;</div><div class='ctx'> 	uint32_t watch_address_low;</div><div class='del'>-	uint32_t watch_address_cntl;</div><div class='del'>-</div><div class='del'>-	watch_address_cntl = 0;</div><div class='add'>+	uint32_t tcp_watch_address_cntl;</div><div class='add'>+	uint32_t sq_watch_address_cntl;</div><div class='ctx'> </div><div class='ctx'> 	watch_address_low = lower_32_bits(watch_address);</div><div class='ctx'> 	watch_address_high = upper_32_bits(watch_address) &amp; 0xffff;</div><div class='ctx'> </div><div class='del'>-	watch_address_cntl = REG_SET_FIELD(watch_address_cntl,</div><div class='add'>+	tcp_watch_address_cntl = 0;</div><div class='add'>+	tcp_watch_address_cntl = REG_SET_FIELD(tcp_watch_address_cntl,</div><div class='ctx'> 			TCP_WATCH0_CNTL,</div><div class='ctx'> 			VMID,</div><div class='ctx'> 			debug_vmid);</div><div class='del'>-	watch_address_cntl = REG_SET_FIELD(watch_address_cntl,</div><div class='add'>+	tcp_watch_address_cntl = REG_SET_FIELD(tcp_watch_address_cntl,</div><div class='ctx'> 			TCP_WATCH0_CNTL,</div><div class='ctx'> 			MODE,</div><div class='ctx'> 			watch_mode);</div><div class='del'>-	watch_address_cntl = REG_SET_FIELD(watch_address_cntl,</div><div class='add'>+	tcp_watch_address_cntl = REG_SET_FIELD(tcp_watch_address_cntl,</div><div class='ctx'> 			TCP_WATCH0_CNTL,</div><div class='ctx'> 			MASK,</div><div class='ctx'> 			watch_address_mask &gt;&gt; 7);</div><div class='ctx'> </div><div class='add'>+	sq_watch_address_cntl = 0;</div><div class='add'>+	sq_watch_address_cntl = REG_SET_FIELD(sq_watch_address_cntl,</div><div class='add'>+			SQ_WATCH0_CNTL,</div><div class='add'>+			VMID,</div><div class='add'>+			debug_vmid);</div><div class='add'>+	sq_watch_address_cntl = REG_SET_FIELD(sq_watch_address_cntl,</div><div class='add'>+			SQ_WATCH0_CNTL,</div><div class='add'>+			MODE,</div><div class='add'>+			watch_mode);</div><div class='add'>+	sq_watch_address_cntl = REG_SET_FIELD(sq_watch_address_cntl,</div><div class='add'>+			SQ_WATCH0_CNTL,</div><div class='add'>+			MASK,</div><div class='add'>+			watch_address_mask &gt;&gt; 6);</div><div class='add'>+</div><div class='ctx'> 	/* Turning off this watch point until we set all the registers */</div><div class='del'>-	watch_address_cntl = REG_SET_FIELD(watch_address_cntl,</div><div class='add'>+	tcp_watch_address_cntl = REG_SET_FIELD(tcp_watch_address_cntl,</div><div class='ctx'> 			TCP_WATCH0_CNTL,</div><div class='ctx'> 			VALID,</div><div class='ctx'> 			0);</div><div class='del'>-</div><div class='ctx'> 	WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +</div><div class='ctx'> 			(watch_id * TCP_WATCH_STRIDE)),</div><div class='del'>-			watch_address_cntl);</div><div class='add'>+			tcp_watch_address_cntl);</div><div class='add'>+</div><div class='add'>+	sq_watch_address_cntl = REG_SET_FIELD(sq_watch_address_cntl,</div><div class='add'>+			SQ_WATCH0_CNTL,</div><div class='add'>+			VALID,</div><div class='add'>+			0);</div><div class='add'>+	WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +</div><div class='add'>+			(watch_id * SQ_WATCH_STRIDE)),</div><div class='add'>+			sq_watch_address_cntl);</div><div class='ctx'> </div><div class='add'>+	/* Program {TCP,SQ}_WATCH?_ADDR* */</div><div class='ctx'> 	WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) +</div><div class='ctx'> 			(watch_id * TCP_WATCH_STRIDE)),</div><div class='ctx'> 			watch_address_high);</div><div class='del'>-</div><div class='ctx'> 	WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_L) +</div><div class='ctx'> 			(watch_id * TCP_WATCH_STRIDE)),</div><div class='ctx'> 			watch_address_low);</div><div class='ctx'> </div><div class='add'>+	WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_ADDR_H) +</div><div class='add'>+			(watch_id * SQ_WATCH_STRIDE)),</div><div class='add'>+			watch_address_high);</div><div class='add'>+	WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_ADDR_L) +</div><div class='add'>+			(watch_id * SQ_WATCH_STRIDE)),</div><div class='add'>+			watch_address_low);</div><div class='add'>+</div><div class='ctx'> 	/* Enable the watch point */</div><div class='del'>-	watch_address_cntl = REG_SET_FIELD(watch_address_cntl,</div><div class='add'>+	tcp_watch_address_cntl = REG_SET_FIELD(tcp_watch_address_cntl,</div><div class='ctx'> 			TCP_WATCH0_CNTL,</div><div class='ctx'> 			VALID,</div><div class='ctx'> 			1);</div><div class='del'>-</div><div class='ctx'> 	WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +</div><div class='ctx'> 			(watch_id * TCP_WATCH_STRIDE)),</div><div class='del'>-			watch_address_cntl);</div><div class='add'>+			tcp_watch_address_cntl);</div><div class='add'>+</div><div class='add'>+	sq_watch_address_cntl = REG_SET_FIELD(sq_watch_address_cntl,</div><div class='add'>+			SQ_WATCH0_CNTL,</div><div class='add'>+			VALID,</div><div class='add'>+			1);</div><div class='add'>+	WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +</div><div class='add'>+			(watch_id * SQ_WATCH_STRIDE)),</div><div class='add'>+			sq_watch_address_cntl);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -953,8 +992,14 @@ uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu_device *adev,</div><div class='ctx'> 			(watch_id * TCP_WATCH_STRIDE)),</div><div class='ctx'> 			watch_address_cntl);</div><div class='ctx'> </div><div class='add'>+	WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +</div><div class='add'>+			(watch_id * SQ_WATCH_STRIDE)),</div><div class='add'>+			watch_address_cntl);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#undef TCP_WATCH_STRIDE</div><div class='add'>+#undef SQ_WATCH_STRIDE</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* kgd_gfx_v10_get_iq_wait_times: Returns the mmCP_IQ_WAIT_TIME1/2 values</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c<br/>index df58a6a1a67e..e4d4e55c08ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c</a></div><div class='hunk'>@@ -220,7 +220,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,</div><div class='ctx'> 	    (kfd_mem_limit.ttm_mem_used + ttm_mem_needed &gt;</div><div class='ctx'> 	     kfd_mem_limit.max_ttm_mem_limit) ||</div><div class='ctx'> 	    (adev &amp;&amp; xcp_id &gt;= 0 &amp;&amp; adev-&gt;kfd.vram_used[xcp_id] + vram_needed &gt;</div><div class='del'>-	     vram_size - reserved_for_pt)) {</div><div class='add'>+	     vram_size - reserved_for_pt - atomic64_read(&amp;adev-&gt;vram_pin_size))) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto release;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1854,6 +1854,7 @@ err_node_allow:</div><div class='ctx'> err_bo_create:</div><div class='ctx'> 	amdgpu_amdkfd_unreserve_mem_limit(adev, aligned_size, flags, xcp_id);</div><div class='ctx'> err_reserve_limit:</div><div class='add'>+	amdgpu_sync_free(&amp;(*mem)-&gt;sync);</div><div class='ctx'> 	mutex_destroy(&amp;(*mem)-&gt;lock);</div><div class='ctx'> 	if (gobj)</div><div class='ctx'> 		drm_gem_object_put(gobj);</div><div class='hunk'>@@ -2900,13 +2901,12 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu *</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_sync_create(&amp;sync_obj);</div><div class='ctx'> </div><div class='del'>-	/* Validate BOs and map them to GPUVM (update VM page tables). */</div><div class='add'>+	/* Validate BOs managed by KFD */</div><div class='ctx'> 	list_for_each_entry(mem, &amp;process_info-&gt;kfd_bo_list,</div><div class='ctx'> 			    validate_list) {</div><div class='ctx'> </div><div class='ctx'> 		struct amdgpu_bo *bo = mem-&gt;bo;</div><div class='ctx'> 		uint32_t domain = mem-&gt;domain;</div><div class='del'>-		struct kfd_mem_attachment *attachment;</div><div class='ctx'> 		struct dma_resv_iter cursor;</div><div class='ctx'> 		struct dma_fence *fence;</div><div class='ctx'> </div><div class='hunk'>@@ -2931,6 +2931,25 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu *</div><div class='ctx'> 				goto validate_map_fail;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (failed_size)</div><div class='add'>+		pr_debug("0x%lx/0x%lx in system\n", failed_size, total_size);</div><div class='add'>+</div><div class='add'>+	/* Validate PDs, PTs and evicted DMABuf imports last. Otherwise BO</div><div class='add'>+	 * validations above would invalidate DMABuf imports again.</div><div class='add'>+	 */</div><div class='add'>+	ret = process_validate_vms(process_info, &amp;exec.ticket);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_debug("Validating VMs failed, ret: %d\n", ret);</div><div class='add'>+		goto validate_map_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update mappings managed by KFD. */</div><div class='add'>+	list_for_each_entry(mem, &amp;process_info-&gt;kfd_bo_list,</div><div class='add'>+			    validate_list) {</div><div class='add'>+		struct kfd_mem_attachment *attachment;</div><div class='add'>+</div><div class='ctx'> 		list_for_each_entry(attachment, &amp;mem-&gt;attachments, list) {</div><div class='ctx'> 			if (!attachment-&gt;is_mapped)</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -2947,18 +2966,6 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu *</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (failed_size)</div><div class='del'>-		pr_debug("0x%lx/0x%lx in system\n", failed_size, total_size);</div><div class='del'>-</div><div class='del'>-	/* Validate PDs, PTs and evicted DMABuf imports last. Otherwise BO</div><div class='del'>-	 * validations above would invalidate DMABuf imports again.</div><div class='del'>-	 */</div><div class='del'>-	ret = process_validate_vms(process_info, &amp;exec.ticket);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_debug("Validating VMs failed, ret: %d\n", ret);</div><div class='del'>-		goto validate_map_fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Update mappings not managed by KFD */</div><div class='ctx'> 	list_for_each_entry(peer_vm, &amp;process_info-&gt;vm_list_head,</div><div class='ctx'> 			vm_list_node) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c<br/>index 6857c586ded7..a6d64bdbbb14 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@ union firmware_info {</div><div class='ctx'> 	struct atom_firmware_info_v3_2 v32;</div><div class='ctx'> 	struct atom_firmware_info_v3_3 v33;</div><div class='ctx'> 	struct atom_firmware_info_v3_4 v34;</div><div class='add'>+	struct atom_firmware_info_v3_5 v35;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -872,6 +873,10 @@ int amdgpu_atomfirmware_get_fw_reserved_fb_size(struct amdgpu_device *adev)</div><div class='ctx'> 		fw_reserved_fb_size =</div><div class='ctx'> 			(firmware_info-&gt;v34.fw_reserved_size_in_kb &lt;&lt; 10);</div><div class='ctx'> 		break;</div><div class='add'>+	case 5:</div><div class='add'>+		fw_reserved_fb_size =</div><div class='add'>+			(firmware_info-&gt;v35.fw_reserved_size_in_kb &lt;&lt; 10);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		fw_reserved_fb_size = 0;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c<br/>index edc6377ec5ff..199693369c7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size,</div><div class='ctx'> 	for (i = 0; i &lt; n; i++) {</div><div class='ctx'> 		struct amdgpu_ring *ring = adev-&gt;mman.buffer_funcs_ring;</div><div class='ctx'> 		r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &amp;fence,</div><div class='del'>-				       false, false, false);</div><div class='add'>+				       false, false, 0);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			goto exit_do_move;</div><div class='ctx'> 		r = dma_fence_wait(fence, false);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c<br/>index f5d0fa207a88..b62ae3c91a9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c</a></div><div class='hunk'>@@ -2065,12 +2065,13 @@ static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)-&gt;i_private;</div><div class='ctx'> 	char reg_offset[11];</div><div class='ctx'> 	uint32_t *new = NULL, *tmp = NULL;</div><div class='del'>-	int ret, i = 0, len = 0;</div><div class='add'>+	unsigned int len = 0;</div><div class='add'>+	int ret, i = 0;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		memset(reg_offset, 0, 11);</div><div class='ctx'> 		if (copy_from_user(reg_offset, buf + len,</div><div class='del'>-					min(10, ((int)size-len)))) {</div><div class='add'>+					min(10, (size-len)))) {</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 			goto error_free;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c<br/>new file mode 100644<br/>index 000000000000..c1cb62683695<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c</a></div><div class='hunk'>@@ -0,0 +1,360 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;generated/utsrelease.h&gt;</div><div class='add'>+#include &lt;linux/devcoredump.h&gt;</div><div class='add'>+#include "amdgpu_dev_coredump.h"</div><div class='add'>+#include "atom.h"</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_DEV_COREDUMP</div><div class='add'>+void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,</div><div class='add'>+		     struct amdgpu_reset_context *reset_context)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+const char *hw_ip_names[MAX_HWIP] = {</div><div class='add'>+	[GC_HWIP]		= "GC",</div><div class='add'>+	[HDP_HWIP]		= "HDP",</div><div class='add'>+	[SDMA0_HWIP]		= "SDMA0",</div><div class='add'>+	[SDMA1_HWIP]		= "SDMA1",</div><div class='add'>+	[SDMA2_HWIP]		= "SDMA2",</div><div class='add'>+	[SDMA3_HWIP]		= "SDMA3",</div><div class='add'>+	[SDMA4_HWIP]		= "SDMA4",</div><div class='add'>+	[SDMA5_HWIP]		= "SDMA5",</div><div class='add'>+	[SDMA6_HWIP]		= "SDMA6",</div><div class='add'>+	[SDMA7_HWIP]		= "SDMA7",</div><div class='add'>+	[LSDMA_HWIP]		= "LSDMA",</div><div class='add'>+	[MMHUB_HWIP]		= "MMHUB",</div><div class='add'>+	[ATHUB_HWIP]		= "ATHUB",</div><div class='add'>+	[NBIO_HWIP]		= "NBIO",</div><div class='add'>+	[MP0_HWIP]		= "MP0",</div><div class='add'>+	[MP1_HWIP]		= "MP1",</div><div class='add'>+	[UVD_HWIP]		= "UVD/JPEG/VCN",</div><div class='add'>+	[VCN1_HWIP]		= "VCN1",</div><div class='add'>+	[VCE_HWIP]		= "VCE",</div><div class='add'>+	[VPE_HWIP]		= "VPE",</div><div class='add'>+	[DF_HWIP]		= "DF",</div><div class='add'>+	[DCE_HWIP]		= "DCE",</div><div class='add'>+	[OSSSYS_HWIP]		= "OSSSYS",</div><div class='add'>+	[SMUIO_HWIP]		= "SMUIO",</div><div class='add'>+	[PWR_HWIP]		= "PWR",</div><div class='add'>+	[NBIF_HWIP]		= "NBIF",</div><div class='add'>+	[THM_HWIP]		= "THM",</div><div class='add'>+	[CLK_HWIP]		= "CLK",</div><div class='add'>+	[UMC_HWIP]		= "UMC",</div><div class='add'>+	[RSMU_HWIP]		= "RSMU",</div><div class='add'>+	[XGMI_HWIP]		= "XGMI",</div><div class='add'>+	[DCI_HWIP]		= "DCI",</div><div class='add'>+	[PCIE_HWIP]		= "PCIE",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void amdgpu_devcoredump_fw_info(struct amdgpu_device *adev,</div><div class='add'>+				       struct drm_printer *p)</div><div class='add'>+{</div><div class='add'>+	uint32_t version;</div><div class='add'>+	uint32_t feature;</div><div class='add'>+	uint8_t smu_program, smu_major, smu_minor, smu_debug;</div><div class='add'>+	struct atom_context *ctx = adev-&gt;mode_info.atom_context;</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "VCE feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;vce.fb_version, adev-&gt;vce.fw_version);</div><div class='add'>+	drm_printf(p, "UVD feature version: %u, fw version: 0x%08x\n", 0,</div><div class='add'>+		   adev-&gt;uvd.fw_version);</div><div class='add'>+	drm_printf(p, "GMC feature version: %u, fw version: 0x%08x\n", 0,</div><div class='add'>+		   adev-&gt;gmc.fw_version);</div><div class='add'>+	drm_printf(p, "ME feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.me_feature_version, adev-&gt;gfx.me_fw_version);</div><div class='add'>+	drm_printf(p, "PFP feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.pfp_feature_version, adev-&gt;gfx.pfp_fw_version);</div><div class='add'>+	drm_printf(p, "CE feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.ce_feature_version, adev-&gt;gfx.ce_fw_version);</div><div class='add'>+	drm_printf(p, "RLC feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.rlc_feature_version, adev-&gt;gfx.rlc_fw_version);</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "RLC SRLC feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.rlc_srlc_feature_version,</div><div class='add'>+		   adev-&gt;gfx.rlc_srlc_fw_version);</div><div class='add'>+	drm_printf(p, "RLC SRLG feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.rlc_srlg_feature_version,</div><div class='add'>+		   adev-&gt;gfx.rlc_srlg_fw_version);</div><div class='add'>+	drm_printf(p, "RLC SRLS feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.rlc_srls_feature_version,</div><div class='add'>+		   adev-&gt;gfx.rlc_srls_fw_version);</div><div class='add'>+	drm_printf(p, "RLCP feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.rlcp_ucode_feature_version,</div><div class='add'>+		   adev-&gt;gfx.rlcp_ucode_version);</div><div class='add'>+	drm_printf(p, "RLCV feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.rlcv_ucode_feature_version,</div><div class='add'>+		   adev-&gt;gfx.rlcv_ucode_version);</div><div class='add'>+	drm_printf(p, "MEC feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;gfx.mec_feature_version, adev-&gt;gfx.mec_fw_version);</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;gfx.mec2_fw)</div><div class='add'>+		drm_printf(p, "MEC2 feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+			   adev-&gt;gfx.mec2_feature_version,</div><div class='add'>+			   adev-&gt;gfx.mec2_fw_version);</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "IMU feature version: %u, fw version: 0x%08x\n", 0,</div><div class='add'>+		   adev-&gt;gfx.imu_fw_version);</div><div class='add'>+	drm_printf(p, "PSP SOS feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.sos.feature_version, adev-&gt;psp.sos.fw_version);</div><div class='add'>+	drm_printf(p, "PSP ASD feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.asd_context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.asd_context.bin_desc.fw_version);</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "TA XGMI feature version: 0x%08x, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.xgmi_context.context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.xgmi_context.context.bin_desc.fw_version);</div><div class='add'>+	drm_printf(p, "TA RAS feature version: 0x%08x, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.ras_context.context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.ras_context.context.bin_desc.fw_version);</div><div class='add'>+	drm_printf(p, "TA HDCP feature version: 0x%08x, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.hdcp_context.context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.hdcp_context.context.bin_desc.fw_version);</div><div class='add'>+	drm_printf(p, "TA DTM feature version: 0x%08x, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.dtm_context.context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.dtm_context.context.bin_desc.fw_version);</div><div class='add'>+	drm_printf(p, "TA RAP feature version: 0x%08x, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.rap_context.context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.rap_context.context.bin_desc.fw_version);</div><div class='add'>+	drm_printf(p,</div><div class='add'>+		   "TA SECURE DISPLAY feature version: 0x%08x, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.securedisplay_context.context.bin_desc.feature_version,</div><div class='add'>+		   adev-&gt;psp.securedisplay_context.context.bin_desc.fw_version);</div><div class='add'>+</div><div class='add'>+	/* SMC firmware */</div><div class='add'>+	version = adev-&gt;pm.fw_version;</div><div class='add'>+</div><div class='add'>+	smu_program = (version &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+	smu_major = (version &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	smu_minor = (version &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	smu_debug = (version &gt;&gt; 0) &amp; 0xff;</div><div class='add'>+	drm_printf(p,</div><div class='add'>+		   "SMC feature version: %u, program: %d, fw version: 0x%08x (%d.%d.%d)\n",</div><div class='add'>+		   0, smu_program, version, smu_major, smu_minor, smu_debug);</div><div class='add'>+</div><div class='add'>+	/* SDMA firmware */</div><div class='add'>+	for (int i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+		drm_printf(p,</div><div class='add'>+			   "SDMA%d feature version: %u, firmware version: 0x%08x\n",</div><div class='add'>+			   i, adev-&gt;sdma.instance[i].feature_version,</div><div class='add'>+			   adev-&gt;sdma.instance[i].fw_version);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "VCN feature version: %u, fw version: 0x%08x\n", 0,</div><div class='add'>+		   adev-&gt;vcn.fw_version);</div><div class='add'>+	drm_printf(p, "DMCU feature version: %u, fw version: 0x%08x\n", 0,</div><div class='add'>+		   adev-&gt;dm.dmcu_fw_version);</div><div class='add'>+	drm_printf(p, "DMCUB feature version: %u, fw version: 0x%08x\n", 0,</div><div class='add'>+		   adev-&gt;dm.dmcub_fw_version);</div><div class='add'>+	drm_printf(p, "PSP TOC feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;psp.toc.feature_version, adev-&gt;psp.toc.fw_version);</div><div class='add'>+</div><div class='add'>+	version = adev-&gt;mes.kiq_version &amp; AMDGPU_MES_VERSION_MASK;</div><div class='add'>+	feature = (adev-&gt;mes.kiq_version &amp; AMDGPU_MES_FEAT_VERSION_MASK) &gt;&gt;</div><div class='add'>+		  AMDGPU_MES_FEAT_VERSION_SHIFT;</div><div class='add'>+	drm_printf(p, "MES_KIQ feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   feature, version);</div><div class='add'>+</div><div class='add'>+	version = adev-&gt;mes.sched_version &amp; AMDGPU_MES_VERSION_MASK;</div><div class='add'>+	feature = (adev-&gt;mes.sched_version &amp; AMDGPU_MES_FEAT_VERSION_MASK) &gt;&gt;</div><div class='add'>+		  AMDGPU_MES_FEAT_VERSION_SHIFT;</div><div class='add'>+	drm_printf(p, "MES feature version: %u, fw version: 0x%08x\n", feature,</div><div class='add'>+		   version);</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "VPE feature version: %u, fw version: 0x%08x\n",</div><div class='add'>+		   adev-&gt;vpe.feature_version, adev-&gt;vpe.fw_version);</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "\nVBIOS Information\n");</div><div class='add'>+	drm_printf(p, "vbios name       : %s\n", ctx-&gt;name);</div><div class='add'>+	drm_printf(p, "vbios pn         : %s\n", ctx-&gt;vbios_pn);</div><div class='add'>+	drm_printf(p, "vbios version    : %d\n", ctx-&gt;version);</div><div class='add'>+	drm_printf(p, "vbios ver_str    : %s\n", ctx-&gt;vbios_ver_str);</div><div class='add'>+	drm_printf(p, "vbios date       : %s\n", ctx-&gt;date);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,</div><div class='add'>+			void *data, size_t datalen)</div><div class='add'>+{</div><div class='add'>+	struct drm_printer p;</div><div class='add'>+	struct amdgpu_coredump_info *coredump = data;</div><div class='add'>+	struct drm_print_iterator iter;</div><div class='add'>+	struct amdgpu_vm_fault_info *fault_info;</div><div class='add'>+	int i, ver;</div><div class='add'>+</div><div class='add'>+	iter.data = buffer;</div><div class='add'>+	iter.offset = 0;</div><div class='add'>+	iter.start = offset;</div><div class='add'>+	iter.remain = count;</div><div class='add'>+</div><div class='add'>+	p = drm_coredump_printer(&amp;iter);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "**** AMDGPU Device Coredump ****\n");</div><div class='add'>+	drm_printf(&amp;p, "version: " AMDGPU_COREDUMP_VERSION "\n");</div><div class='add'>+	drm_printf(&amp;p, "kernel: " UTS_RELEASE "\n");</div><div class='add'>+	drm_printf(&amp;p, "module: " KBUILD_MODNAME "\n");</div><div class='add'>+	drm_printf(&amp;p, "time: %lld.%09ld\n", coredump-&gt;reset_time.tv_sec,</div><div class='add'>+		   coredump-&gt;reset_time.tv_nsec);</div><div class='add'>+</div><div class='add'>+	if (coredump-&gt;reset_task_info.pid)</div><div class='add'>+		drm_printf(&amp;p, "process_name: %s PID: %d\n",</div><div class='add'>+			   coredump-&gt;reset_task_info.process_name,</div><div class='add'>+			   coredump-&gt;reset_task_info.pid);</div><div class='add'>+</div><div class='add'>+	/* GPU IP's information of the SOC */</div><div class='add'>+	drm_printf(&amp;p, "\nIP Information\n");</div><div class='add'>+	drm_printf(&amp;p, "SOC Family: %d\n", coredump-&gt;adev-&gt;family);</div><div class='add'>+	drm_printf(&amp;p, "SOC Revision id: %d\n", coredump-&gt;adev-&gt;rev_id);</div><div class='add'>+	drm_printf(&amp;p, "SOC External Revision id: %d\n", coredump-&gt;adev-&gt;external_rev_id);</div><div class='add'>+</div><div class='add'>+	for (int i = 1; i &lt; MAX_HWIP; i++) {</div><div class='add'>+		for (int j = 0; j &lt; HWIP_MAX_INSTANCE; j++) {</div><div class='add'>+			ver = coredump-&gt;adev-&gt;ip_versions[i][j];</div><div class='add'>+			if (ver)</div><div class='add'>+				drm_printf(&amp;p, "HWIP: %s[%d][%d]: v%d.%d.%d.%d.%d\n",</div><div class='add'>+					   hw_ip_names[i], i, j,</div><div class='add'>+					   IP_VERSION_MAJ(ver),</div><div class='add'>+					   IP_VERSION_MIN(ver),</div><div class='add'>+					   IP_VERSION_REV(ver),</div><div class='add'>+					   IP_VERSION_VARIANT(ver),</div><div class='add'>+					   IP_VERSION_SUBREV(ver));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* IP firmware information */</div><div class='add'>+	drm_printf(&amp;p, "\nIP Firmwares\n");</div><div class='add'>+	amdgpu_devcoredump_fw_info(coredump-&gt;adev, &amp;p);</div><div class='add'>+</div><div class='add'>+	if (coredump-&gt;ring) {</div><div class='add'>+		drm_printf(&amp;p, "\nRing timed out details\n");</div><div class='add'>+		drm_printf(&amp;p, "IP Type: %d Ring Name: %s\n",</div><div class='add'>+			   coredump-&gt;ring-&gt;funcs-&gt;type,</div><div class='add'>+			   coredump-&gt;ring-&gt;name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add page fault information */</div><div class='add'>+	fault_info = &amp;coredump-&gt;adev-&gt;vm_manager.fault_info;</div><div class='add'>+	drm_printf(&amp;p, "\n[%s] Page fault observed\n",</div><div class='add'>+		   fault_info-&gt;vmhub ? "mmhub" : "gfxhub");</div><div class='add'>+	drm_printf(&amp;p, "Faulty page starting at address: 0x%016llx\n", fault_info-&gt;addr);</div><div class='add'>+	drm_printf(&amp;p, "Protection fault status register: 0x%x\n\n", fault_info-&gt;status);</div><div class='add'>+</div><div class='add'>+	/* dump the ip state for each ip */</div><div class='add'>+	drm_printf(&amp;p, "IP Dump\n");</div><div class='add'>+	for (int i = 0; i &lt; coredump-&gt;adev-&gt;num_ip_blocks; i++) {</div><div class='add'>+		if (coredump-&gt;adev-&gt;ip_blocks[i].version-&gt;funcs-&gt;print_ip_state) {</div><div class='add'>+			drm_printf(&amp;p, "IP: %s\n",</div><div class='add'>+				   coredump-&gt;adev-&gt;ip_blocks[i]</div><div class='add'>+					   .version-&gt;funcs-&gt;name);</div><div class='add'>+			coredump-&gt;adev-&gt;ip_blocks[i]</div><div class='add'>+				.version-&gt;funcs-&gt;print_ip_state(</div><div class='add'>+					(void *)coredump-&gt;adev, &amp;p);</div><div class='add'>+			drm_printf(&amp;p, "\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add ring buffer information */</div><div class='add'>+	drm_printf(&amp;p, "Ring buffer information\n");</div><div class='add'>+	for (int i = 0; i &lt; coredump-&gt;adev-&gt;num_rings; i++) {</div><div class='add'>+		int j = 0;</div><div class='add'>+		struct amdgpu_ring *ring = coredump-&gt;adev-&gt;rings[i];</div><div class='add'>+</div><div class='add'>+		drm_printf(&amp;p, "ring name: %s\n", ring-&gt;name);</div><div class='add'>+		drm_printf(&amp;p, "Rptr: 0x%llx Wptr: 0x%llx RB mask: %x\n",</div><div class='add'>+			   amdgpu_ring_get_rptr(ring),</div><div class='add'>+			   amdgpu_ring_get_wptr(ring),</div><div class='add'>+			   ring-&gt;buf_mask);</div><div class='add'>+		drm_printf(&amp;p, "Ring size in dwords: %d\n",</div><div class='add'>+			   ring-&gt;ring_size / 4);</div><div class='add'>+		drm_printf(&amp;p, "Ring contents\n");</div><div class='add'>+		drm_printf(&amp;p, "Offset \t Value\n");</div><div class='add'>+</div><div class='add'>+		while (j &lt; ring-&gt;ring_size) {</div><div class='add'>+			drm_printf(&amp;p, "0x%x \t 0x%x\n", j, ring-&gt;ring[j / 4]);</div><div class='add'>+			j += 4;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (coredump-&gt;reset_vram_lost)</div><div class='add'>+		drm_printf(&amp;p, "VRAM is lost due to GPU reset!\n");</div><div class='add'>+	if (coredump-&gt;adev-&gt;reset_info.num_regs) {</div><div class='add'>+		drm_printf(&amp;p, "AMDGPU register dumps:\nOffset:     Value:\n");</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; coredump-&gt;adev-&gt;reset_info.num_regs; i++)</div><div class='add'>+			drm_printf(&amp;p, "0x%08x: 0x%08x\n",</div><div class='add'>+				   coredump-&gt;adev-&gt;reset_info.reset_dump_reg_list[i],</div><div class='add'>+				   coredump-&gt;adev-&gt;reset_info.reset_dump_reg_value[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count - iter.remain;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_devcoredump_free(void *data)</div><div class='add'>+{</div><div class='add'>+	kfree(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,</div><div class='add'>+		     struct amdgpu_reset_context *reset_context)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_coredump_info *coredump;</div><div class='add'>+	struct drm_device *dev = adev_to_drm(adev);</div><div class='add'>+	struct amdgpu_job *job = reset_context-&gt;job;</div><div class='add'>+	struct drm_sched_job *s_job;</div><div class='add'>+</div><div class='add'>+	coredump = kzalloc(sizeof(*coredump), GFP_NOWAIT);</div><div class='add'>+</div><div class='add'>+	if (!coredump) {</div><div class='add'>+		DRM_ERROR("%s: failed to allocate memory for coredump\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	coredump-&gt;reset_vram_lost = vram_lost;</div><div class='add'>+</div><div class='add'>+	if (reset_context-&gt;job &amp;&amp; reset_context-&gt;job-&gt;vm) {</div><div class='add'>+		struct amdgpu_task_info *ti;</div><div class='add'>+		struct amdgpu_vm *vm = reset_context-&gt;job-&gt;vm;</div><div class='add'>+</div><div class='add'>+		ti = amdgpu_vm_get_task_info_vm(vm);</div><div class='add'>+		if (ti) {</div><div class='add'>+			coredump-&gt;reset_task_info = *ti;</div><div class='add'>+			amdgpu_vm_put_task_info(ti);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (job) {</div><div class='add'>+		s_job = &amp;job-&gt;base;</div><div class='add'>+		coredump-&gt;ring = to_amdgpu_ring(s_job-&gt;sched);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	coredump-&gt;adev = adev;</div><div class='add'>+</div><div class='add'>+	ktime_get_ts64(&amp;coredump-&gt;reset_time);</div><div class='add'>+</div><div class='add'>+	dev_coredumpm(dev-&gt;dev, THIS_MODULE, coredump, 0, GFP_NOWAIT,</div><div class='add'>+		      amdgpu_devcoredump_read, amdgpu_devcoredump_free);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.h<br/>new file mode 100644<br/>index 000000000000..52459512cb2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.h</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __AMDGPU_DEV_COREDUMP_H__</div><div class='add'>+#define __AMDGPU_DEV_COREDUMP_H__</div><div class='add'>+</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_reset.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEV_COREDUMP</div><div class='add'>+</div><div class='add'>+#define AMDGPU_COREDUMP_VERSION "1"</div><div class='add'>+</div><div class='add'>+struct amdgpu_coredump_info {</div><div class='add'>+	struct amdgpu_device            *adev;</div><div class='add'>+	struct amdgpu_task_info         reset_task_info;</div><div class='add'>+	struct timespec64               reset_time;</div><div class='add'>+	bool                            reset_vram_lost;</div><div class='add'>+	struct amdgpu_ring              *ring;</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,</div><div class='add'>+		     struct amdgpu_reset_context *reset_context);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br/>index 7753a2e64d41..861ccff78af9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a></div><div class='hunk'>@@ -74,6 +74,7 @@</div><div class='ctx'> #include "amdgpu_fru_eeprom.h"</div><div class='ctx'> #include "amdgpu_reset.h"</div><div class='ctx'> #include "amdgpu_virt.h"</div><div class='add'>+#include "amdgpu_dev_coredump.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;drm/task_barrier.h&gt;</div><div class='hunk'>@@ -143,6 +144,8 @@ const char *amdgpu_asic_name[] = {</div><div class='ctx'> 	"LAST",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline void amdgpu_device_stop_pending_resets(struct amdgpu_device *adev);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * DOC: pcie_replay_count</div><div class='ctx'>  *</div><div class='hunk'>@@ -335,16 +338,93 @@ bool amdgpu_device_supports_boco(struct drm_device *dev)</div><div class='ctx'>  *</div><div class='ctx'>  * @dev: drm_device pointer</div><div class='ctx'>  *</div><div class='del'>- * Returns true if the device supporte BACO,</div><div class='del'>- * otherwise return false.</div><div class='add'>+ * Return:</div><div class='add'>+ * 1 if the device supporte BACO;</div><div class='add'>+ * 3 if the device support MACO (only works if BACO is supported)</div><div class='add'>+ * otherwise return 0.</div><div class='ctx'>  */</div><div class='del'>-bool amdgpu_device_supports_baco(struct drm_device *dev)</div><div class='add'>+int amdgpu_device_supports_baco(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='ctx'> </div><div class='ctx'> 	return amdgpu_asic_supports_baco(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void amdgpu_device_detect_runtime_pm_mode(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev;</div><div class='add'>+	int bamaco_support;</div><div class='add'>+</div><div class='add'>+	dev = adev_to_drm(adev);</div><div class='add'>+</div><div class='add'>+	adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_NONE;</div><div class='add'>+	bamaco_support = amdgpu_device_supports_baco(dev);</div><div class='add'>+</div><div class='add'>+	switch (amdgpu_runtime_pm) {</div><div class='add'>+	case 2:</div><div class='add'>+		if (bamaco_support &amp; MACO_SUPPORT) {</div><div class='add'>+			adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BAMACO;</div><div class='add'>+			dev_info(adev-&gt;dev, "Forcing BAMACO for runtime pm\n");</div><div class='add'>+		} else if (bamaco_support == BACO_SUPPORT) {</div><div class='add'>+			adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='add'>+			dev_info(adev-&gt;dev, "Requested mode BAMACO not available,fallback to use BACO\n");</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		if (bamaco_support &amp; BACO_SUPPORT) {</div><div class='add'>+			adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='add'>+			dev_info(adev-&gt;dev, "Forcing BACO for runtime pm\n");</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case -1:</div><div class='add'>+	case -2:</div><div class='add'>+		if (amdgpu_device_supports_px(dev)) { /* enable PX as runtime mode */</div><div class='add'>+			adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_PX;</div><div class='add'>+			dev_info(adev-&gt;dev, "Using ATPX for runtime pm\n");</div><div class='add'>+		} else if (amdgpu_device_supports_boco(dev)) { /* enable boco as runtime mode */</div><div class='add'>+			adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BOCO;</div><div class='add'>+			dev_info(adev-&gt;dev, "Using BOCO for runtime pm\n");</div><div class='add'>+		} else {</div><div class='add'>+			if (!bamaco_support)</div><div class='add'>+				goto no_runtime_pm;</div><div class='add'>+</div><div class='add'>+			switch (adev-&gt;asic_type) {</div><div class='add'>+			case CHIP_VEGA20:</div><div class='add'>+			case CHIP_ARCTURUS:</div><div class='add'>+				/* BACO are not supported on vega20 and arctrus */</div><div class='add'>+				break;</div><div class='add'>+			case CHIP_VEGA10:</div><div class='add'>+				/* enable BACO as runpm mode if noretry=0 */</div><div class='add'>+				if (!adev-&gt;gmc.noretry)</div><div class='add'>+					adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				/* enable BACO as runpm mode on CI+ */</div><div class='add'>+				adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) {</div><div class='add'>+				if (bamaco_support &amp; MACO_SUPPORT) {</div><div class='add'>+					adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BAMACO;</div><div class='add'>+					dev_info(adev-&gt;dev, "Using BAMACO for runtime pm\n");</div><div class='add'>+				} else {</div><div class='add'>+					dev_info(adev-&gt;dev, "Using BACO for runtime pm\n");</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 0:</div><div class='add'>+		dev_info(adev-&gt;dev, "runtime pm is manually disabled\n");</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+no_runtime_pm:</div><div class='add'>+	if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_NONE)</div><div class='add'>+		dev_info(adev-&gt;dev, "Runtime PM not available\n");</div><div class='add'>+}</div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_device_supports_smart_shift - Is the device dGPU with</div><div class='ctx'>  * smart shift support</div><div class='hunk'>@@ -1402,13 +1482,17 @@ static int amdgpu_device_wb_init(struct amdgpu_device *adev)</div><div class='ctx'>  */</div><div class='ctx'> int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb)</div><div class='ctx'> {</div><div class='del'>-	unsigned long offset = find_first_zero_bit(adev-&gt;wb.used, adev-&gt;wb.num_wb);</div><div class='add'>+	unsigned long flags, offset;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;adev-&gt;wb.lock, flags);</div><div class='add'>+	offset = find_first_zero_bit(adev-&gt;wb.used, adev-&gt;wb.num_wb);</div><div class='ctx'> 	if (offset &lt; adev-&gt;wb.num_wb) {</div><div class='ctx'> 		__set_bit(offset, adev-&gt;wb.used);</div><div class='add'>+		spin_unlock_irqrestore(&amp;adev-&gt;wb.lock, flags);</div><div class='ctx'> 		*wb = offset &lt;&lt; 3; /* convert to dw offset */</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	} else {</div><div class='add'>+		spin_unlock_irqrestore(&amp;adev-&gt;wb.lock, flags);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1423,9 +1507,13 @@ int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb)</div><div class='ctx'>  */</div><div class='ctx'> void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb)</div><div class='ctx'> {</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='ctx'> 	wb &gt;&gt;= 3;</div><div class='add'>+	spin_lock_irqsave(&amp;adev-&gt;wb.lock, flags);</div><div class='ctx'> 	if (wb &lt; adev-&gt;wb.num_wb)</div><div class='ctx'> 		__clear_bit(wb, adev-&gt;wb.used);</div><div class='add'>+	spin_unlock_irqrestore(&amp;adev-&gt;wb.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1455,7 +1543,7 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	/* PCI_EXT_CAP_ID_VNDR extended capability is located at 0x100 */</div><div class='ctx'> 	if (!pci_find_ext_capability(adev-&gt;pdev, PCI_EXT_CAP_ID_VNDR))</div><div class='del'>-		DRM_WARN("System can't access extended configuration space,please check!!\n");</div><div class='add'>+		DRM_WARN("System can't access extended configuration space, please check!!\n");</div><div class='ctx'> </div><div class='ctx'> 	/* skip if the bios has already enabled large BAR */</div><div class='ctx'> 	if (adev-&gt;gmc.real_vram_size &amp;&amp;</div><div class='hunk'>@@ -3981,6 +4069,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,</div><div class='ctx'> 	spin_lock_init(&amp;adev-&gt;se_cac_idx_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adev-&gt;audio_endpt_idx_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adev-&gt;mm_stats.lock);</div><div class='add'>+	spin_lock_init(&amp;adev-&gt;wb.lock);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;adev-&gt;shadow_list);</div><div class='ctx'> 	mutex_init(&amp;adev-&gt;shadow_list_lock);</div><div class='hunk'>@@ -4069,6 +4158,13 @@ int amdgpu_device_init(struct amdgpu_device *adev,</div><div class='ctx'> 	/* Enable TMZ based on IP_VERSION */</div><div class='ctx'> 	amdgpu_gmc_tmz_set(adev);</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_vf(adev) &amp;&amp;</div><div class='add'>+	    amdgpu_ip_version(adev, GC_HWIP, 0) &gt;= IP_VERSION(10, 3, 0))</div><div class='add'>+		/* VF MMIO access (except mailbox range) from CPU</div><div class='add'>+		 * will be blocked during sriov runtime</div><div class='add'>+		 */</div><div class='add'>+		adev-&gt;virt.caps |= AMDGPU_VF_MMIO_ACCESS_PROTECT;</div><div class='add'>+</div><div class='ctx'> 	amdgpu_gmc_noretry_set(adev);</div><div class='ctx'> 	/* Need to get xgmi info early to decide the reset behavior*/</div><div class='ctx'> 	if (adev-&gt;gmc.xgmi.supported) {</div><div class='hunk'>@@ -4974,12 +5070,15 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev,</div><div class='ctx'> retry:</div><div class='ctx'> 	amdgpu_amdkfd_pre_reset(adev);</div><div class='ctx'> </div><div class='add'>+	amdgpu_device_stop_pending_resets(adev);</div><div class='add'>+</div><div class='ctx'> 	if (from_hypervisor)</div><div class='ctx'> 		r = amdgpu_virt_request_full_gpu(adev, true);</div><div class='ctx'> 	else</div><div class='ctx'> 		r = amdgpu_virt_reset_gpu(adev);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='add'>+	amdgpu_ras_set_fed(adev, false);</div><div class='ctx'> 	amdgpu_irq_gpu_reset_resume_helper(adev);</div><div class='ctx'> </div><div class='ctx'> 	/* some sw clean up VF needs to do before recover */</div><div class='hunk'>@@ -5263,11 +5362,21 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle,</div><div class='ctx'> 	struct amdgpu_device *tmp_adev = NULL;</div><div class='ctx'> 	bool need_full_reset, skip_hw_reset, vram_lost = false;</div><div class='ctx'> 	int r = 0;</div><div class='add'>+	uint32_t i;</div><div class='ctx'> </div><div class='ctx'> 	/* Try reset handler method first */</div><div class='ctx'> 	tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device,</div><div class='ctx'> 				    reset_list);</div><div class='del'>-	amdgpu_reset_reg_dumps(tmp_adev);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(AMDGPU_SKIP_COREDUMP, &amp;reset_context-&gt;flags)) {</div><div class='add'>+		amdgpu_reset_reg_dumps(tmp_adev);</div><div class='add'>+</div><div class='add'>+		/* Trigger ip dump before we reset the asic */</div><div class='add'>+		for (i = 0; i &lt; tmp_adev-&gt;num_ip_blocks; i++)</div><div class='add'>+			if (tmp_adev-&gt;ip_blocks[i].version-&gt;funcs-&gt;dump_ip_state)</div><div class='add'>+				tmp_adev-&gt;ip_blocks[i].version-&gt;funcs</div><div class='add'>+				-&gt;dump_ip_state((void *)tmp_adev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	reset_context-&gt;reset_device_list = device_list_handle;</div><div class='ctx'> 	r = amdgpu_reset_perform_reset(tmp_adev, reset_context);</div><div class='hunk'>@@ -5340,7 +5449,8 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle,</div><div class='ctx'> </div><div class='ctx'> 				vram_lost = amdgpu_device_check_vram_lost(tmp_adev);</div><div class='ctx'> </div><div class='del'>-				amdgpu_coredump(tmp_adev, vram_lost, reset_context);</div><div class='add'>+				if (!test_bit(AMDGPU_SKIP_COREDUMP, &amp;reset_context-&gt;flags))</div><div class='add'>+					amdgpu_coredump(tmp_adev, vram_lost, reset_context);</div><div class='ctx'> </div><div class='ctx'> 				if (vram_lost) {</div><div class='ctx'> 					DRM_INFO("VRAM is lost due to GPU reset!\n");</div><div class='hunk'>@@ -5538,6 +5648,23 @@ static inline void amdgpu_device_stop_pending_resets(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int amdgpu_device_health_check(struct list_head *device_list_handle)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *tmp_adev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(tmp_adev, device_list_handle, reset_list) {</div><div class='add'>+		pci_read_config_dword(tmp_adev-&gt;pdev, PCI_COMMAND, &amp;status);</div><div class='add'>+		if (PCI_POSSIBLE_ERROR(status)) {</div><div class='add'>+			dev_err(tmp_adev-&gt;dev, "device lost from bus!");</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_device_gpu_recover - reset the asic and recover scheduler</div><div class='ctx'>  *</div><div class='hunk'>@@ -5609,6 +5736,12 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,</div><div class='ctx'> 		device_list_handle = &amp;device_list;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!amdgpu_sriov_vf(adev)) {</div><div class='add'>+		r = amdgpu_device_health_check(device_list_handle);</div><div class='add'>+		if (r)</div><div class='add'>+			goto end_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* We need to lock reset domain only once both for XGMI and single device */</div><div class='ctx'> 	tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device,</div><div class='ctx'> 				    reset_list);</div><div class='hunk'>@@ -5691,11 +5824,12 @@ retry:	/* Rest of adevs pre asic reset from XGMI hive. */</div><div class='ctx'> 			tmp_adev-&gt;asic_reset_res = r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Drop all pending non scheduler resets. Scheduler resets</div><div class='del'>-		 * were already dropped during drm_sched_stop</div><div class='del'>-		 */</div><div class='del'>-		amdgpu_device_stop_pending_resets(tmp_adev);</div><div class='add'>+		if (!amdgpu_sriov_vf(tmp_adev))</div><div class='add'>+			/*</div><div class='add'>+			* Drop all pending non scheduler resets. Scheduler resets</div><div class='add'>+			* were already dropped during drm_sched_stop</div><div class='add'>+			*/</div><div class='add'>+			amdgpu_device_stop_pending_resets(tmp_adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Actual ASIC resets if needed.*/</div><div class='hunk'>@@ -5774,6 +5908,7 @@ skip_sched_resume:</div><div class='ctx'> 					    reset_list);</div><div class='ctx'> 	amdgpu_device_unlock_reset_domain(tmp_adev-&gt;reset_domain);</div><div class='ctx'> </div><div class='add'>+end_reset:</div><div class='ctx'> 	if (hive) {</div><div class='ctx'> 		mutex_unlock(&amp;hive-&gt;hive_lock);</div><div class='ctx'> 		amdgpu_put_xgmi_hive(hive);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br/>index ac5bf01fe8d2..0e31bdb4b7cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c</a></div><div class='hunk'>@@ -97,6 +97,7 @@</div><div class='ctx'> #include "smuio_v13_0.h"</div><div class='ctx'> #include "smuio_v13_0_3.h"</div><div class='ctx'> #include "smuio_v13_0_6.h"</div><div class='add'>+#include "smuio_v14_0_2.h"</div><div class='ctx'> #include "vcn_v5_0_0.h"</div><div class='ctx'> #include "jpeg_v5_0_0.h"</div><div class='ctx'> </div><div class='hunk'>@@ -245,6 +246,9 @@ static int amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device *adev,</div><div class='ctx'> 	return -ENOENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define IP_DISCOVERY_V2		2</div><div class='add'>+#define IP_DISCOVERY_V4		4</div><div class='add'>+</div><div class='ctx'> static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,</div><div class='ctx'> 						 uint8_t *binary)</div><div class='ctx'> {</div><div class='hunk'>@@ -259,14 +263,14 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,</div><div class='ctx'> 	 * wait for this to complete.  Once the C2PMSG is updated, we can</div><div class='ctx'> 	 * continue.</div><div class='ctx'> 	 */</div><div class='del'>-	if (dev_is_removable(&amp;adev-&gt;pdev-&gt;dev)) {</div><div class='del'>-		for (i = 0; i &lt; 1000; i++) {</div><div class='del'>-			msg = RREG32(mmMP0_SMN_C2PMSG_33);</div><div class='del'>-			if (msg &amp; 0x80000000)</div><div class='del'>-				break;</div><div class='del'>-			msleep(1);</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 1000; i++) {</div><div class='add'>+		msg = RREG32(mmMP0_SMN_C2PMSG_33);</div><div class='add'>+		if (msg &amp; 0x80000000)</div><div class='add'>+			break;</div><div class='add'>+		usleep_range(1000, 1100);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) &lt;&lt; 20;</div><div class='ctx'> </div><div class='ctx'> 	if (vram_size) {</div><div class='hunk'>@@ -1897,6 +1901,8 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IP_VERSION(14, 0, 0):</div><div class='ctx'> 	case IP_VERSION(14, 0, 1):</div><div class='add'>+	case IP_VERSION(14, 0, 2):</div><div class='add'>+	case IP_VERSION(14, 0, 3):</div><div class='ctx'> 		amdgpu_device_ip_block_add(adev, &amp;smu_v14_0_ip_block);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2678,6 +2684,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)</div><div class='ctx'> 	case IP_VERSION(14, 0, 1):</div><div class='ctx'> 		adev-&gt;smuio.funcs = &amp;smuio_v13_0_6_funcs;</div><div class='ctx'> 		break;</div><div class='add'>+	case IP_VERSION(14, 0, 2):</div><div class='add'>+		adev-&gt;smuio.funcs = &amp;smuio_v14_0_2_funcs;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br/>index e4277298cf1a..ea14f1c8f430 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a></div><div class='hunk'>@@ -925,7 +925,7 @@ module_param_named(freesync_video, amdgpu_freesync_vid_mode, uint, 0444);</div><div class='ctx'>  * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)</div><div class='ctx'>  */</div><div class='ctx'> MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)");</div><div class='del'>-module_param_named(reset_method, amdgpu_reset_method, int, 0444);</div><div class='add'>+module_param_named(reset_method, amdgpu_reset_method, int, 0644);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * DOC: bad_page_threshold (int) Bad page threshold is specifies the</div><div class='hunk'>@@ -2481,6 +2481,7 @@ static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* Use a common context, just need to make sure full reset is done */</div><div class='ctx'> 	set_bit(AMDGPU_SKIP_HW_RESET, &amp;reset_context.flags);</div><div class='add'>+	set_bit(AMDGPU_SKIP_COREDUMP, &amp;reset_context.flags);</div><div class='ctx'> 	r = amdgpu_do_asic_reset(&amp;device_list, &amp;reset_context);</div><div class='ctx'> </div><div class='ctx'> 	if (r) {</div><div class='hunk'>@@ -2744,7 +2745,8 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)</div><div class='ctx'> 		drm_dev-&gt;switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;</div><div class='ctx'> 	} else if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BOCO) {</div><div class='ctx'> 		/* nothing to do */</div><div class='del'>-	} else if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) {</div><div class='add'>+	} else if ((adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) ||</div><div class='add'>+			(adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO)) {</div><div class='ctx'> 		amdgpu_device_baco_enter(drm_dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2784,7 +2786,8 @@ static int amdgpu_pmops_runtime_resume(struct device *dev)</div><div class='ctx'> 		 * PCI core handles it for _PR3.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='del'>-	} else if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) {</div><div class='add'>+	} else if ((adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) ||</div><div class='add'>+			(adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO)) {</div><div class='ctx'> 		amdgpu_device_baco_exit(drm_dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = amdgpu_device_resume(drm_dev, false);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br/>index 55d5508987ff..1d955652f3ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a></div><div class='hunk'>@@ -1206,7 +1206,8 @@ void amdgpu_gfx_cp_init_microcode(struct amdgpu_device *adev,</div><div class='ctx'> 		fw_size = le32_to_cpu(cp_hdr_v2_0-&gt;data_size_bytes);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		break;</div><div class='add'>+		dev_err(adev-&gt;dev, "Invalid ucode id %u\n", ucode_id);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;firmware.load_type == AMDGPU_FW_LOAD_PSP) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h<br/>index 8fcf889ddce9..64f197bbc866 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a></div><div class='hunk'>@@ -259,7 +259,6 @@ struct amdgpu_cu_info {</div><div class='ctx'> struct amdgpu_gfx_ras {</div><div class='ctx'> 	struct amdgpu_ras_block_object  ras_block;</div><div class='ctx'> 	void (*enable_watchdog_timer)(struct amdgpu_device *adev);</div><div class='del'>-	bool (*query_utcl2_poison_status)(struct amdgpu_device *adev);</div><div class='ctx'> 	int (*rlc_gc_fed_irq)(struct amdgpu_device *adev,</div><div class='ctx'> 				struct amdgpu_irq_src *source,</div><div class='ctx'> 				struct amdgpu_iv_entry *entry);</div><div class='hunk'>@@ -434,6 +433,10 @@ struct amdgpu_gfx {</div><div class='ctx'> 	uint32_t			num_xcc_per_xcp;</div><div class='ctx'> 	struct mutex			partition_mutex;</div><div class='ctx'> 	bool				mcbp; /* mid command buffer preemption */</div><div class='add'>+</div><div class='add'>+	/* IP reg dump */</div><div class='add'>+	uint32_t			*ip_dump;</div><div class='add'>+	uint32_t			reg_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_gfx_ras_reg_entry {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h<br/>index c7b44aeb671b..103a837ccc71 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h</a></div><div class='hunk'>@@ -38,6 +38,8 @@ struct amdgpu_gfxhub_funcs {</div><div class='ctx'> 	void (*mode2_save_regs)(struct amdgpu_device *adev);</div><div class='ctx'> 	void (*mode2_restore_regs)(struct amdgpu_device *adev);</div><div class='ctx'> 	void (*halt)(struct amdgpu_device *adev);</div><div class='add'>+	bool (*query_utcl2_poison_status)(struct amdgpu_device *adev,</div><div class='add'>+			int xcc_id);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_gfxhub {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c<br/>index d79cb13e1aa8..00d6211e0fbf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c</a></div><div class='hunk'>@@ -279,7 +279,7 @@ amdgpu_i2c_lookup(struct amdgpu_device *adev,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus,</div><div class='add'>+static int amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus,</div><div class='ctx'> 				 u8 slave_addr,</div><div class='ctx'> 				 u8 addr,</div><div class='ctx'> 				 u8 *val)</div><div class='hunk'>@@ -304,16 +304,18 @@ static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus,</div><div class='ctx'> 	out_buf[0] = addr;</div><div class='ctx'> 	out_buf[1] = 0;</div><div class='ctx'> </div><div class='del'>-	if (i2c_transfer(&amp;i2c_bus-&gt;adapter, msgs, 2) == 2) {</div><div class='del'>-		*val = in_buf[0];</div><div class='del'>-		DRM_DEBUG("val = 0x%02x\n", *val);</div><div class='del'>-	} else {</div><div class='del'>-		DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n",</div><div class='del'>-			  addr, *val);</div><div class='add'>+	if (i2c_transfer(&amp;i2c_bus-&gt;adapter, msgs, 2) != 2) {</div><div class='add'>+		DRM_DEBUG("i2c 0x%02x read failed\n", addr);</div><div class='add'>+		return -EIO;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	*val = in_buf[0];</div><div class='add'>+	DRM_DEBUG("val = 0x%02x\n", *val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus,</div><div class='add'>+static int amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus,</div><div class='ctx'> 				 u8 slave_addr,</div><div class='ctx'> 				 u8 addr,</div><div class='ctx'> 				 u8 val)</div><div class='hunk'>@@ -329,9 +331,12 @@ static void amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus,</div><div class='ctx'> 	out_buf[0] = addr;</div><div class='ctx'> 	out_buf[1] = val;</div><div class='ctx'> </div><div class='del'>-	if (i2c_transfer(&amp;i2c_bus-&gt;adapter, &amp;msg, 1) != 1)</div><div class='del'>-		DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n",</div><div class='del'>-			  addr, val);</div><div class='add'>+	if (i2c_transfer(&amp;i2c_bus-&gt;adapter, &amp;msg, 1) != 1) {</div><div class='add'>+		DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", addr, val);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ddc router switching */</div><div class='hunk'>@@ -346,16 +351,18 @@ amdgpu_i2c_router_select_ddc_port(const struct amdgpu_connector *amdgpu_connecto</div><div class='ctx'> 	if (!amdgpu_connector-&gt;router_bus)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='add'>+	if (amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='ctx'> 			    amdgpu_connector-&gt;router.i2c_addr,</div><div class='del'>-			    0x3, &amp;val);</div><div class='add'>+			    0x3, &amp;val))</div><div class='add'>+		return;</div><div class='ctx'> 	val &amp;= ~amdgpu_connector-&gt;router.ddc_mux_control_pin;</div><div class='ctx'> 	amdgpu_i2c_put_byte(amdgpu_connector-&gt;router_bus,</div><div class='ctx'> 			    amdgpu_connector-&gt;router.i2c_addr,</div><div class='ctx'> 			    0x3, val);</div><div class='del'>-	amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='add'>+	if (amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='ctx'> 			    amdgpu_connector-&gt;router.i2c_addr,</div><div class='del'>-			    0x1, &amp;val);</div><div class='add'>+			    0x1, &amp;val))</div><div class='add'>+		return;</div><div class='ctx'> 	val &amp;= ~amdgpu_connector-&gt;router.ddc_mux_control_pin;</div><div class='ctx'> 	val |= amdgpu_connector-&gt;router.ddc_mux_state;</div><div class='ctx'> 	amdgpu_i2c_put_byte(amdgpu_connector-&gt;router_bus,</div><div class='hunk'>@@ -375,16 +382,18 @@ amdgpu_i2c_router_select_cd_port(const struct amdgpu_connector *amdgpu_connector</div><div class='ctx'> 	if (!amdgpu_connector-&gt;router_bus)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='add'>+	if (amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='ctx'> 			    amdgpu_connector-&gt;router.i2c_addr,</div><div class='del'>-			    0x3, &amp;val);</div><div class='add'>+			    0x3, &amp;val))</div><div class='add'>+		return;</div><div class='ctx'> 	val &amp;= ~amdgpu_connector-&gt;router.cd_mux_control_pin;</div><div class='ctx'> 	amdgpu_i2c_put_byte(amdgpu_connector-&gt;router_bus,</div><div class='ctx'> 			    amdgpu_connector-&gt;router.i2c_addr,</div><div class='ctx'> 			    0x3, val);</div><div class='del'>-	amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='add'>+	if (amdgpu_i2c_get_byte(amdgpu_connector-&gt;router_bus,</div><div class='ctx'> 			    amdgpu_connector-&gt;router.i2c_addr,</div><div class='del'>-			    0x1, &amp;val);</div><div class='add'>+			    0x1, &amp;val))</div><div class='add'>+		return;</div><div class='ctx'> 	val &amp;= ~amdgpu_connector-&gt;router.cd_mux_control_pin;</div><div class='ctx'> 	val |= amdgpu_connector-&gt;router.cd_mux_state;</div><div class='ctx'> 	amdgpu_i2c_put_byte(amdgpu_connector-&gt;router_bus,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br/>index 7e6d09730e6d..665c63f55278 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a></div><div class='hunk'>@@ -445,6 +445,14 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	entry.ih = ih;</div><div class='ctx'> 	entry.iv_entry = (const uint32_t *)&amp;ih-&gt;ring[ring_index];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * timestamp is not supported on some legacy SOCs (cik, cz, iceland,</div><div class='add'>+	 * si and tonga), so initialize timestamp and timestamp_src to 0</div><div class='add'>+	 */</div><div class='add'>+	entry.timestamp = 0;</div><div class='add'>+	entry.timestamp_src = 0;</div><div class='add'>+</div><div class='ctx'> 	amdgpu_ih_decode_iv(adev, &amp;entry);</div><div class='ctx'> </div><div class='ctx'> 	trace_amdgpu_iv(ih - &amp;adev-&gt;irq.ih, &amp;entry);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c<br/>index a2df3025a754..a0ea6fe8d060 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a></div><div class='hunk'>@@ -149,38 +149,7 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_NONE;</div><div class='del'>-	if (amdgpu_device_supports_px(dev) &amp;&amp;</div><div class='del'>-	    (amdgpu_runtime_pm != 0)) { /* enable PX as runtime mode */</div><div class='del'>-		adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_PX;</div><div class='del'>-		dev_info(adev-&gt;dev, "Using ATPX for runtime pm\n");</div><div class='del'>-	} else if (amdgpu_device_supports_boco(dev) &amp;&amp;</div><div class='del'>-		   (amdgpu_runtime_pm != 0)) { /* enable boco as runtime mode */</div><div class='del'>-		adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BOCO;</div><div class='del'>-		dev_info(adev-&gt;dev, "Using BOCO for runtime pm\n");</div><div class='del'>-	} else if (amdgpu_device_supports_baco(dev) &amp;&amp;</div><div class='del'>-		   (amdgpu_runtime_pm != 0)) {</div><div class='del'>-		switch (adev-&gt;asic_type) {</div><div class='del'>-		case CHIP_VEGA20:</div><div class='del'>-		case CHIP_ARCTURUS:</div><div class='del'>-			/* enable BACO as runpm mode if runpm=1 */</div><div class='del'>-			if (amdgpu_runtime_pm &gt; 0)</div><div class='del'>-				adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='del'>-			break;</div><div class='del'>-		case CHIP_VEGA10:</div><div class='del'>-			/* enable BACO as runpm mode if noretry=0 */</div><div class='del'>-			if (!adev-&gt;gmc.noretry)</div><div class='del'>-				adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			/* enable BACO as runpm mode on CI+ */</div><div class='del'>-			adev-&gt;pm.rpm_mode = AMDGPU_RUNPM_BACO;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO)</div><div class='del'>-			dev_info(adev-&gt;dev, "Using BACO for runtime pm\n");</div><div class='del'>-	}</div><div class='add'>+	amdgpu_device_detect_runtime_pm_mode(adev);</div><div class='ctx'> </div><div class='ctx'> 	/* Call ACPI methods: require modeset init</div><div class='ctx'> 	 * but failure is not fatal</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c<br/>index 24ad4b97177b..0734490347db 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c</a></div><div class='hunk'>@@ -210,22 +210,26 @@ int amdgpu_mca_smu_set_debug_mode(struct amdgpu_device *adev, bool enable)</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdgpu_mca_smu_mca_bank_dump(struct amdgpu_device *adev, int idx, struct mca_bank_entry *entry)</div><div class='add'>+static void amdgpu_mca_smu_mca_bank_dump(struct amdgpu_device *adev, int idx, struct mca_bank_entry *entry,</div><div class='add'>+					 struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "Accelerator Check Architecture events logged\n");</div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "aca entry[%02d].STATUS=0x%016llx\n",</div><div class='del'>-		 idx, entry-&gt;regs[MCA_REG_IDX_STATUS]);</div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "aca entry[%02d].ADDR=0x%016llx\n",</div><div class='del'>-		 idx, entry-&gt;regs[MCA_REG_IDX_ADDR]);</div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "aca entry[%02d].MISC0=0x%016llx\n",</div><div class='del'>-		 idx, entry-&gt;regs[MCA_REG_IDX_MISC0]);</div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "aca entry[%02d].IPID=0x%016llx\n",</div><div class='del'>-		 idx, entry-&gt;regs[MCA_REG_IDX_IPID]);</div><div class='del'>-	dev_info(adev-&gt;dev, HW_ERR "aca entry[%02d].SYND=0x%016llx\n",</div><div class='del'>-		 idx, entry-&gt;regs[MCA_REG_IDX_SYND]);</div><div class='add'>+	u64 event_id = qctx-&gt;event_id;</div><div class='add'>+</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "Accelerator Check Architecture events logged\n");</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "aca entry[%02d].STATUS=0x%016llx\n",</div><div class='add'>+		      idx, entry-&gt;regs[MCA_REG_IDX_STATUS]);</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "aca entry[%02d].ADDR=0x%016llx\n",</div><div class='add'>+		      idx, entry-&gt;regs[MCA_REG_IDX_ADDR]);</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "aca entry[%02d].MISC0=0x%016llx\n",</div><div class='add'>+		      idx, entry-&gt;regs[MCA_REG_IDX_MISC0]);</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "aca entry[%02d].IPID=0x%016llx\n",</div><div class='add'>+		      idx, entry-&gt;regs[MCA_REG_IDX_IPID]);</div><div class='add'>+	RAS_EVENT_LOG(adev, event_id, HW_ERR "aca entry[%02d].SYND=0x%016llx\n",</div><div class='add'>+		      idx, entry-&gt;regs[MCA_REG_IDX_SYND]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type, struct ras_err_data *err_data)</div><div class='add'>+int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,</div><div class='add'>+				 struct ras_err_data *err_data, struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_smuio_mcm_config_info mcm_info;</div><div class='ctx'> 	struct ras_err_addr err_addr = {0};</div><div class='hunk'>@@ -244,7 +248,7 @@ int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_blo</div><div class='ctx'> 	list_for_each_entry(node, &amp;mca_set.list, node) {</div><div class='ctx'> 		entry = &amp;node-&gt;entry;</div><div class='ctx'> </div><div class='del'>-		amdgpu_mca_smu_mca_bank_dump(adev, i++, entry);</div><div class='add'>+		amdgpu_mca_smu_mca_bank_dump(adev, i++, entry, qctx);</div><div class='ctx'> </div><div class='ctx'> 		count = 0;</div><div class='ctx'> 		ret = amdgpu_mca_smu_parse_mca_error_count(adev, blk, type, entry, &amp;count);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h<br/>index b964110ed1e0..e5bf07ce3451 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h</a></div><div class='hunk'>@@ -169,6 +169,7 @@ void amdgpu_mca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root</div><div class='ctx'> void amdgpu_mca_bank_set_init(struct mca_bank_set *mca_set);</div><div class='ctx'> int amdgpu_mca_bank_set_add_entry(struct mca_bank_set *mca_set, struct mca_bank_entry *entry);</div><div class='ctx'> void amdgpu_mca_bank_set_release(struct mca_bank_set *mca_set);</div><div class='del'>-int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type, struct ras_err_data *err_data);</div><div class='add'>+int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,</div><div class='add'>+				 struct ras_err_data *err_data, struct ras_query_context *qctx);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br/>index a00cf4756ad0..5ca5c47ab54e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c</a></div><div class='hunk'>@@ -32,6 +32,18 @@</div><div class='ctx'> #define AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS 1024</div><div class='ctx'> #define AMDGPU_ONE_DOORBELL_SIZE 8</div><div class='ctx'> </div><div class='add'>+signed long amdgpu_mes_fence_wait_polling(u64 *fence,</div><div class='add'>+					  u64 wait_seq,</div><div class='add'>+					  signed long timeout)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	while ((s64)(wait_seq - *fence) &gt; 0 &amp;&amp; timeout &gt; 0) {</div><div class='add'>+		udelay(2);</div><div class='add'>+		timeout -= 2;</div><div class='add'>+	}</div><div class='add'>+	return timeout &gt; 0 ? timeout : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_mes_doorbell_process_slice(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	return roundup(AMDGPU_ONE_DOORBELL_SIZE *</div><div class='hunk'>@@ -40,7 +52,6 @@ int amdgpu_mes_doorbell_process_slice(struct amdgpu_device *adev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amdgpu_mes_kernel_doorbell_get(struct amdgpu_device *adev,</div><div class='del'>-					 struct amdgpu_mes_process *process,</div><div class='ctx'> 					 int ip_type, uint64_t *doorbell_index)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int offset, found;</div><div class='hunk'>@@ -65,7 +76,6 @@ static int amdgpu_mes_kernel_doorbell_get(struct amdgpu_device *adev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void amdgpu_mes_kernel_doorbell_free(struct amdgpu_device *adev,</div><div class='del'>-					   struct amdgpu_mes_process *process,</div><div class='ctx'> 					   uint32_t doorbell_index)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int old, rel_index;</div><div class='hunk'>@@ -656,7 +666,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,</div><div class='ctx'> 	*queue_id = queue-&gt;queue_id = r;</div><div class='ctx'> </div><div class='ctx'> 	/* allocate a doorbell index for the queue */</div><div class='del'>-	r = amdgpu_mes_kernel_doorbell_get(adev, gang-&gt;process,</div><div class='add'>+	r = amdgpu_mes_kernel_doorbell_get(adev,</div><div class='ctx'> 					  qprops-&gt;queue_type,</div><div class='ctx'> 					  &amp;qprops-&gt;doorbell_off);</div><div class='ctx'> 	if (r)</div><div class='hunk'>@@ -714,8 +724,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> clean_up_doorbell:</div><div class='del'>-	amdgpu_mes_kernel_doorbell_free(adev, gang-&gt;process,</div><div class='del'>-				       qprops-&gt;doorbell_off);</div><div class='add'>+	amdgpu_mes_kernel_doorbell_free(adev, qprops-&gt;doorbell_off);</div><div class='ctx'> clean_up_queue_id:</div><div class='ctx'> 	spin_lock_irqsave(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='ctx'> 	idr_remove(&amp;adev-&gt;mes.queue_id_idr, queue-&gt;queue_id);</div><div class='hunk'>@@ -769,8 +778,7 @@ int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id)</div><div class='ctx'> 			  queue_id);</div><div class='ctx'> </div><div class='ctx'> 	list_del(&amp;queue-&gt;list);</div><div class='del'>-	amdgpu_mes_kernel_doorbell_free(adev, gang-&gt;process,</div><div class='del'>-				       queue-&gt;doorbell_off);</div><div class='add'>+	amdgpu_mes_kernel_doorbell_free(adev, queue-&gt;doorbell_off);</div><div class='ctx'> 	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_mes_queue_free_mqd(queue);</div><div class='hunk'>@@ -778,6 +786,28 @@ int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,</div><div class='add'>+				struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct mes_map_legacy_queue_input queue_input;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	memset(&amp;queue_input, 0, sizeof(queue_input));</div><div class='add'>+</div><div class='add'>+	queue_input.queue_type = ring-&gt;funcs-&gt;type;</div><div class='add'>+	queue_input.doorbell_offset = ring-&gt;doorbell_index;</div><div class='add'>+	queue_input.pipe_id = ring-&gt;pipe;</div><div class='add'>+	queue_input.queue_id = ring-&gt;queue;</div><div class='add'>+	queue_input.mqd_addr = amdgpu_bo_gpu_offset(ring-&gt;mqd_obj);</div><div class='add'>+	queue_input.wptr_addr = ring-&gt;wptr_gpu_addr;</div><div class='add'>+</div><div class='add'>+	r = adev-&gt;mes.funcs-&gt;map_legacy_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='add'>+	if (r)</div><div class='add'>+		DRM_ERROR("failed to map legacy queue\n");</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,</div><div class='ctx'> 				  struct amdgpu_ring *ring,</div><div class='ctx'> 				  enum amdgpu_unmap_queues_action action,</div><div class='hunk'>@@ -1132,6 +1162,7 @@ void amdgpu_mes_remove_ring(struct amdgpu_device *adev,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_mes_remove_hw_queue(adev, ring-&gt;hw_queue_id);</div><div class='add'>+	del_timer_sync(&amp;ring-&gt;fence_drv.fallback_timer);</div><div class='ctx'> 	amdgpu_ring_fini(ring);</div><div class='ctx'> 	kfree(ring);</div><div class='ctx'> }</div><div class='hunk'>@@ -1474,7 +1505,7 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)</div><div class='ctx'> 	const struct mes_firmware_header_v1_0 *mes_hdr;</div><div class='ctx'> 	struct amdgpu_firmware_info *info;</div><div class='ctx'> 	char ucode_prefix[30];</div><div class='del'>-	char fw_name[40];</div><div class='add'>+	char fw_name[50];</div><div class='ctx'> 	bool need_retry = false;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br/>index 4c8fc3117ef8..df9f0404d842 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h</a></div><div class='hunk'>@@ -141,6 +141,12 @@ struct amdgpu_mes {</div><div class='ctx'> </div><div class='ctx'> 	/* ip specific functions */</div><div class='ctx'> 	const struct amdgpu_mes_funcs   *funcs;</div><div class='add'>+</div><div class='add'>+	/* mes resource_1 bo*/</div><div class='add'>+	struct amdgpu_bo    *resource_1;</div><div class='add'>+	uint64_t            resource_1_gpu_addr;</div><div class='add'>+	void                *resource_1_addr;</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_mes_process {</div><div class='hunk'>@@ -242,6 +248,15 @@ struct mes_remove_queue_input {</div><div class='ctx'> 	uint64_t	gang_context_addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mes_map_legacy_queue_input {</div><div class='add'>+	uint32_t                           queue_type;</div><div class='add'>+	uint32_t                           doorbell_offset;</div><div class='add'>+	uint32_t                           pipe_id;</div><div class='add'>+	uint32_t                           queue_id;</div><div class='add'>+	uint64_t                           mqd_addr;</div><div class='add'>+	uint64_t                           wptr_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mes_unmap_legacy_queue_input {</div><div class='ctx'> 	enum amdgpu_unmap_queues_action    action;</div><div class='ctx'> 	uint32_t                           queue_type;</div><div class='hunk'>@@ -318,6 +333,9 @@ struct amdgpu_mes_funcs {</div><div class='ctx'> 	int (*remove_hw_queue)(struct amdgpu_mes *mes,</div><div class='ctx'> 			       struct mes_remove_queue_input *input);</div><div class='ctx'> </div><div class='add'>+	int (*map_legacy_queue)(struct amdgpu_mes *mes,</div><div class='add'>+				struct mes_map_legacy_queue_input *input);</div><div class='add'>+</div><div class='ctx'> 	int (*unmap_legacy_queue)(struct amdgpu_mes *mes,</div><div class='ctx'> 				  struct mes_unmap_legacy_queue_input *input);</div><div class='ctx'> </div><div class='hunk'>@@ -334,6 +352,10 @@ struct amdgpu_mes_funcs {</div><div class='ctx'> #define amdgpu_mes_kiq_hw_init(adev) (adev)-&gt;mes.kiq_hw_init((adev))</div><div class='ctx'> #define amdgpu_mes_kiq_hw_fini(adev) (adev)-&gt;mes.kiq_hw_fini((adev))</div><div class='ctx'> </div><div class='add'>+signed long amdgpu_mes_fence_wait_polling(u64 *fence,</div><div class='add'>+					  u64 wait_seq,</div><div class='add'>+					  signed long timeout);</div><div class='add'>+</div><div class='ctx'> int amdgpu_mes_ctx_get_offs(struct amdgpu_ring *ring, unsigned int id_offs);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe);</div><div class='hunk'>@@ -357,6 +379,8 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,</div><div class='ctx'> 			    int *queue_id);</div><div class='ctx'> int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id);</div><div class='ctx'> </div><div class='add'>+int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,</div><div class='add'>+				struct amdgpu_ring *ring);</div><div class='ctx'> int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,</div><div class='ctx'> 				  struct amdgpu_ring *ring,</div><div class='ctx'> 				  enum amdgpu_unmap_queues_action action,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h<br/>index 1ca9d4ed8063..95d676ee207f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h</a></div><div class='hunk'>@@ -63,6 +63,8 @@ struct amdgpu_mmhub_funcs {</div><div class='ctx'> 				uint64_t page_table_base);</div><div class='ctx'> 	void (*update_power_gating)(struct amdgpu_device *adev,</div><div class='ctx'>                                 bool enable);</div><div class='add'>+	bool (*query_utcl2_poison_status)(struct amdgpu_device *adev,</div><div class='add'>+				int hub_inst);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_mmhub {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br/>index 2099159a693f..8d8c39be6129 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_trace.h"</div><div class='ctx'> #include "amdgpu_amdkfd.h"</div><div class='add'>+#include "amdgpu_vram_mgr.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * DOC: amdgpu_object</div><div class='hunk'>@@ -153,8 +154,10 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)</div><div class='ctx'> 		else</div><div class='ctx'> 			places[c].flags |= TTM_PL_FLAG_TOPDOWN;</div><div class='ctx'> </div><div class='del'>-		if (flags &amp; AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)</div><div class='add'>+		if (abo-&gt;tbo.type == ttm_bo_type_kernel &amp;&amp;</div><div class='add'>+		    flags &amp; AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)</div><div class='ctx'> 			places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;</div><div class='add'>+</div><div class='ctx'> 		c++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -173,6 +176,12 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)</div><div class='ctx'> 			abo-&gt;flags &amp; AMDGPU_GEM_CREATE_PREEMPTIBLE ?</div><div class='ctx'> 			AMDGPU_PL_PREEMPT : TTM_PL_TT;</div><div class='ctx'> 		places[c].flags = 0;</div><div class='add'>+		/*</div><div class='add'>+		 * When GTT is just an alternative to VRAM make sure that we</div><div class='add'>+		 * only use it as fallback and still try to fill up VRAM first.</div><div class='add'>+		 */</div><div class='add'>+		if (domain &amp; abo-&gt;preferred_domains &amp; AMDGPU_GEM_DOMAIN_VRAM)</div><div class='add'>+			places[c].flags |= TTM_PL_FLAG_FALLBACK;</div><div class='ctx'> 		c++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -595,8 +604,7 @@ int amdgpu_bo_create(struct amdgpu_device *adev,</div><div class='ctx'> 	if (!amdgpu_bo_support_uswc(bo-&gt;flags))</div><div class='ctx'> 		bo-&gt;flags &amp;= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;ras_enabled)</div><div class='del'>-		bo-&gt;flags |= AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE;</div><div class='add'>+	bo-&gt;flags |= AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE;</div><div class='ctx'> </div><div class='ctx'> 	bo-&gt;tbo.bdev = &amp;adev-&gt;mman.bdev;</div><div class='ctx'> 	if (bp-&gt;domain &amp; (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA |</div><div class='hunk'>@@ -605,6 +613,8 @@ int amdgpu_bo_create(struct amdgpu_device *adev,</div><div class='ctx'> 	else</div><div class='ctx'> 		amdgpu_bo_placement_from_domain(bo, bp-&gt;domain);</div><div class='ctx'> 	if (bp-&gt;type == ttm_bo_type_kernel)</div><div class='add'>+		bo-&gt;tbo.priority = 2;</div><div class='add'>+	else if (!(bp-&gt;flags &amp; AMDGPU_GEM_CREATE_DISCARDABLE))</div><div class='ctx'> 		bo-&gt;tbo.priority = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (!bp-&gt;destroy)</div><div class='hunk'>@@ -627,7 +637,7 @@ int amdgpu_bo_create(struct amdgpu_device *adev,</div><div class='ctx'> 	    bo-&gt;tbo.resource-&gt;mem_type == TTM_PL_VRAM) {</div><div class='ctx'> 		struct dma_fence *fence;</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_fill_buffer(bo, 0, bo-&gt;tbo.base.resv, &amp;fence, true);</div><div class='add'>+		r = amdgpu_ttm_clear_buffer(bo, bo-&gt;tbo.base.resv, &amp;fence);</div><div class='ctx'> 		if (unlikely(r))</div><div class='ctx'> 			goto fail_unreserve;</div><div class='ctx'> </div><div class='hunk'>@@ -757,7 +767,7 @@ int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, struct dma_fence **fence)</div><div class='ctx'> </div><div class='ctx'> 	return amdgpu_copy_buffer(ring, shadow_addr, parent_addr,</div><div class='ctx'> 				  amdgpu_bo_size(shadow), NULL, fence,</div><div class='del'>-				  true, false, false);</div><div class='add'>+				  true, false, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -959,6 +969,10 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,</div><div class='ctx'> 		if (!bo-&gt;placements[i].lpfn ||</div><div class='ctx'> 		    (lpfn &amp;&amp; lpfn &lt; bo-&gt;placements[i].lpfn))</div><div class='ctx'> 			bo-&gt;placements[i].lpfn = lpfn;</div><div class='add'>+</div><div class='add'>+		if (bo-&gt;flags &amp; AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS &amp;&amp;</div><div class='add'>+		    bo-&gt;placements[i].mem_type == TTM_PL_VRAM)</div><div class='add'>+			bo-&gt;placements[i].flags |= TTM_PL_FLAG_CONTIGUOUS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = ttm_bo_validate(&amp;bo-&gt;tbo, &amp;bo-&gt;placement, &amp;ctx);</div><div class='hunk'>@@ -1241,14 +1255,18 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,</div><div class='ctx'>  * amdgpu_bo_move_notify - notification about a memory move</div><div class='ctx'>  * @bo: pointer to a buffer object</div><div class='ctx'>  * @evict: if this move is evicting the buffer from the graphics address space</div><div class='add'>+ * @new_mem: new resource for backing the BO</div><div class='ctx'>  *</div><div class='ctx'>  * Marks the corresponding &amp;amdgpu_bo buffer object as invalid, also performs</div><div class='ctx'>  * bookkeeping.</div><div class='ctx'>  * TTM driver callback which is called when ttm moves a buffer.</div><div class='ctx'>  */</div><div class='del'>-void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict)</div><div class='add'>+void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,</div><div class='add'>+			   bool evict,</div><div class='add'>+			   struct ttm_resource *new_mem)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo-&gt;bdev);</div><div class='add'>+	struct ttm_resource *old_mem = bo-&gt;resource;</div><div class='ctx'> 	struct amdgpu_bo *abo;</div><div class='ctx'> </div><div class='ctx'> 	if (!amdgpu_bo_is_amdgpu_bo(bo))</div><div class='hunk'>@@ -1260,12 +1278,12 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict)</div><div class='ctx'> 	amdgpu_bo_kunmap(abo);</div><div class='ctx'> </div><div class='ctx'> 	if (abo-&gt;tbo.base.dma_buf &amp;&amp; !abo-&gt;tbo.base.import_attach &amp;&amp;</div><div class='del'>-	    bo-&gt;resource-&gt;mem_type != TTM_PL_SYSTEM)</div><div class='add'>+	    old_mem &amp;&amp; old_mem-&gt;mem_type != TTM_PL_SYSTEM)</div><div class='ctx'> 		dma_buf_move_notify(abo-&gt;tbo.base.dma_buf);</div><div class='ctx'> </div><div class='del'>-	/* remember the eviction */</div><div class='del'>-	if (evict)</div><div class='del'>-		atomic64_inc(&amp;adev-&gt;num_evictions);</div><div class='add'>+	/* move_notify is called before move happens */</div><div class='add'>+	trace_amdgpu_bo_move(abo, new_mem ? new_mem-&gt;mem_type : -1,</div><div class='add'>+			     old_mem ? old_mem-&gt;mem_type : -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void amdgpu_bo_get_memory(struct amdgpu_bo *bo,</div><div class='hunk'>@@ -1360,8 +1378,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)</div><div class='ctx'> 	if (WARN_ON_ONCE(!dma_resv_trylock(bo-&gt;base.resv)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	r = amdgpu_fill_buffer(abo, AMDGPU_POISON, bo-&gt;base.resv, &amp;fence, true);</div><div class='add'>+	r = amdgpu_fill_buffer(abo, 0, bo-&gt;base.resv, &amp;fence, true);</div><div class='ctx'> 	if (!WARN_ON(r)) {</div><div class='add'>+		amdgpu_vram_mgr_set_cleared(bo-&gt;resource);</div><div class='ctx'> 		amdgpu_bo_fence(abo, fence, false);</div><div class='ctx'> 		dma_fence_put(fence);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h<br/>index fa03d9e4874c..bc42ccbde659 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.h</a></div><div class='hunk'>@@ -328,7 +328,9 @@ int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,</div><div class='ctx'> int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,</div><div class='ctx'> 			   size_t buffer_size, uint32_t *metadata_size,</div><div class='ctx'> 			   uint64_t *flags);</div><div class='del'>-void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict);</div><div class='add'>+void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,</div><div class='add'>+			   bool evict,</div><div class='add'>+			   struct ttm_resource *new_mem);</div><div class='ctx'> void amdgpu_bo_release_notify(struct ttm_buffer_object *bo);</div><div class='ctx'> vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);</div><div class='ctx'> void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br/>index 94b310fdb719..4bd4602d11b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c</a></div><div class='hunk'>@@ -1053,6 +1053,11 @@ static int psp_asd_initialize(struct psp_context *psp)</div><div class='ctx'> 	if (amdgpu_sriov_vf(psp-&gt;adev) || !psp-&gt;asd_context.bin_desc.size_bytes)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/* bypass asd if display hardware is not available */</div><div class='add'>+	if (!amdgpu_device_has_display_hardware(psp-&gt;adev) &amp;&amp;</div><div class='add'>+	    amdgpu_ip_version(psp-&gt;adev, MP0_HWIP, 0) &gt;= IP_VERSION(13, 0, 10))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	psp-&gt;asd_context.mem_context.shared_mc_addr  = 0;</div><div class='ctx'> 	psp-&gt;asd_context.mem_context.shared_mem_size = PSP_ASD_SHARED_MEM_SIZE;</div><div class='ctx'> 	psp-&gt;asd_context.ta_load_type                = GFX_CMD_ID_LOAD_ASD;</div><div class='hunk'>@@ -2260,6 +2265,15 @@ static int psp_hw_start(struct psp_context *psp)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if ((is_psp_fw_valid(psp-&gt;ipkeymgr_drv)) &amp;&amp;</div><div class='add'>+		    (psp-&gt;funcs-&gt;bootloader_load_ipkeymgr_drv != NULL)) {</div><div class='add'>+			ret = psp_bootloader_load_ipkeymgr_drv(psp);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(adev-&gt;dev, "PSP load ipkeymgr_drv failed!\n");</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if ((is_psp_fw_valid(psp-&gt;sos)) &amp;&amp;</div><div class='ctx'> 		    (psp-&gt;funcs-&gt;bootloader_load_sos != NULL)) {</div><div class='ctx'> 			ret = psp_bootloader_load_sos(psp);</div><div class='hunk'>@@ -2617,7 +2631,8 @@ static int psp_load_p2s_table(struct psp_context *psp)</div><div class='ctx'> 	struct amdgpu_firmware_info *ucode =</div><div class='ctx'> 		&amp;adev-&gt;firmware.ucode[AMDGPU_UCODE_ID_P2S_TABLE];</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;in_runpm &amp;&amp; (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO))</div><div class='add'>+	if (adev-&gt;in_runpm &amp;&amp; ((adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) ||</div><div class='add'>+				(adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6)) {</div><div class='hunk'>@@ -2647,7 +2662,8 @@ static int psp_load_smu_fw(struct psp_context *psp)</div><div class='ctx'> 	 * Skip SMU FW reloading in case of using BACO for runpm only,</div><div class='ctx'> 	 * as SMU is always alive.</div><div class='ctx'> 	 */</div><div class='del'>-	if (adev-&gt;in_runpm &amp;&amp; (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO))</div><div class='add'>+	if (adev-&gt;in_runpm &amp;&amp; ((adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BACO) ||</div><div class='add'>+				(adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!ucode-&gt;fw || amdgpu_sriov_vf(psp-&gt;adev))</div><div class='hunk'>@@ -3273,6 +3289,12 @@ static int parse_sos_bin_descriptor(struct psp_context *psp,</div><div class='ctx'> 		psp-&gt;ras_drv.size_bytes         = le32_to_cpu(desc-&gt;size_bytes);</div><div class='ctx'> 		psp-&gt;ras_drv.start_addr         = ucode_start_addr;</div><div class='ctx'> 		break;</div><div class='add'>+	case PSP_FW_TYPE_PSP_IPKEYMGR_DRV:</div><div class='add'>+		psp-&gt;ipkeymgr_drv.fw_version         = le32_to_cpu(desc-&gt;fw_version);</div><div class='add'>+		psp-&gt;ipkeymgr_drv.feature_version    = le32_to_cpu(desc-&gt;fw_version);</div><div class='add'>+		psp-&gt;ipkeymgr_drv.size_bytes         = le32_to_cpu(desc-&gt;size_bytes);</div><div class='add'>+		psp-&gt;ipkeymgr_drv.start_addr         = ucode_start_addr;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(psp-&gt;adev-&gt;dev, "Unsupported PSP FW type: %d\n", desc-&gt;fw_type);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h<br/>index ee16f134ae92..3635303e6548 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h</a></div><div class='hunk'>@@ -73,8 +73,10 @@ enum psp_bootloader_cmd {</div><div class='ctx'> 	PSP_BL__LOAD_KEY_DATABASE	= 0x80000,</div><div class='ctx'> 	PSP_BL__LOAD_SOCDRV             = 0xB0000,</div><div class='ctx'> 	PSP_BL__LOAD_DBGDRV             = 0xC0000,</div><div class='add'>+	PSP_BL__LOAD_HADDRV		= PSP_BL__LOAD_DBGDRV,</div><div class='ctx'> 	PSP_BL__LOAD_INTFDRV		= 0xD0000,</div><div class='del'>-	PSP_BL__LOAD_RASDRV		    = 0xE0000,</div><div class='add'>+	PSP_BL__LOAD_RASDRV		= 0xE0000,</div><div class='add'>+	PSP_BL__LOAD_IPKEYMGRDRV	= 0xF0000,</div><div class='ctx'> 	PSP_BL__DRAM_LONG_TRAIN		= 0x100000,</div><div class='ctx'> 	PSP_BL__DRAM_SHORT_TRAIN	= 0x200000,</div><div class='ctx'> 	PSP_BL__LOAD_TOS_SPL_TABLE	= 0x10000000,</div><div class='hunk'>@@ -117,6 +119,7 @@ struct psp_funcs {</div><div class='ctx'> 	int (*bootloader_load_intf_drv)(struct psp_context *psp);</div><div class='ctx'> 	int (*bootloader_load_dbg_drv)(struct psp_context *psp);</div><div class='ctx'> 	int (*bootloader_load_ras_drv)(struct psp_context *psp);</div><div class='add'>+	int (*bootloader_load_ipkeymgr_drv)(struct psp_context *psp);</div><div class='ctx'> 	int (*bootloader_load_sos)(struct psp_context *psp);</div><div class='ctx'> 	int (*ring_create)(struct psp_context *psp,</div><div class='ctx'> 			   enum psp_ring_type ring_type);</div><div class='hunk'>@@ -336,6 +339,7 @@ struct psp_context {</div><div class='ctx'> 	struct psp_bin_desc		intf_drv;</div><div class='ctx'> 	struct psp_bin_desc		dbg_drv;</div><div class='ctx'> 	struct psp_bin_desc		ras_drv;</div><div class='add'>+	struct psp_bin_desc		ipkeymgr_drv;</div><div class='ctx'> </div><div class='ctx'> 	/* tmr buffer */</div><div class='ctx'> 	struct amdgpu_bo		*tmr_bo;</div><div class='hunk'>@@ -424,6 +428,9 @@ struct amdgpu_psp_funcs {</div><div class='ctx'> #define psp_bootloader_load_ras_drv(psp) \</div><div class='ctx'> 		((psp)-&gt;funcs-&gt;bootloader_load_ras_drv ? \</div><div class='ctx'> 		(psp)-&gt;funcs-&gt;bootloader_load_ras_drv((psp)) : 0)</div><div class='add'>+#define psp_bootloader_load_ipkeymgr_drv(psp) \</div><div class='add'>+		((psp)-&gt;funcs-&gt;bootloader_load_ipkeymgr_drv ? \</div><div class='add'>+		 (psp)-&gt;funcs-&gt;bootloader_load_ipkeymgr_drv((psp)) : 0)</div><div class='ctx'> #define psp_bootloader_load_sos(psp) \</div><div class='ctx'> 		((psp)-&gt;funcs-&gt;bootloader_load_sos ? (psp)-&gt;funcs-&gt;bootloader_load_sos((psp)) : 0)</div><div class='ctx'> #define psp_smu_reload_quirk(psp) \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c<br/>index 8ebab6f22e5a..1adc81a55734 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c</a></div><div class='hunk'>@@ -122,6 +122,8 @@ const char *get_ras_block_str(struct ras_common_if *ras_block)</div><div class='ctx'> </div><div class='ctx'> #define MAX_UMC_POISON_POLLING_TIME_ASYNC  100  //ms</div><div class='ctx'> </div><div class='add'>+#define AMDGPU_RAS_RETIRE_PAGE_INTERVAL 100  //ms</div><div class='add'>+</div><div class='ctx'> enum amdgpu_ras_retire_page_reservation {</div><div class='ctx'> 	AMDGPU_RAS_RETIRE_PAGE_RESERVED,</div><div class='ctx'> 	AMDGPU_RAS_RETIRE_PAGE_PENDING,</div><div class='hunk'>@@ -1045,6 +1047,7 @@ static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct ras_err_d</div><div class='ctx'> static void amdgpu_ras_error_print_error_data(struct amdgpu_device *adev,</div><div class='ctx'> 					      struct ras_manager *ras_mgr,</div><div class='ctx'> 					      struct ras_err_data *err_data,</div><div class='add'>+					      struct ras_query_context *qctx,</div><div class='ctx'> 					      const char *blk_name,</div><div class='ctx'> 					      bool is_ue,</div><div class='ctx'> 					      bool is_de)</div><div class='hunk'>@@ -1052,27 +1055,28 @@ static void amdgpu_ras_error_print_error_data(struct amdgpu_device *adev,</div><div class='ctx'> 	struct amdgpu_smuio_mcm_config_info *mcm_info;</div><div class='ctx'> 	struct ras_err_node *err_node;</div><div class='ctx'> 	struct ras_err_info *err_info;</div><div class='add'>+	u64 event_id = qctx-&gt;event_id;</div><div class='ctx'> </div><div class='ctx'> 	if (is_ue) {</div><div class='ctx'> 		for_each_ras_error(err_node, err_data) {</div><div class='ctx'> 			err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 			mcm_info = &amp;err_info-&gt;mcm_info;</div><div class='ctx'> 			if (err_info-&gt;ue_count) {</div><div class='del'>-				dev_info(adev-&gt;dev, "socket: %d, die: %d, "</div><div class='del'>-					 "%lld new uncorrectable hardware errors detected in %s block\n",</div><div class='del'>-					 mcm_info-&gt;socket_id,</div><div class='del'>-					 mcm_info-&gt;die_id,</div><div class='del'>-					 err_info-&gt;ue_count,</div><div class='del'>-					 blk_name);</div><div class='add'>+				RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d, "</div><div class='add'>+					      "%lld new uncorrectable hardware errors detected in %s block\n",</div><div class='add'>+					      mcm_info-&gt;socket_id,</div><div class='add'>+					      mcm_info-&gt;die_id,</div><div class='add'>+					      err_info-&gt;ue_count,</div><div class='add'>+					      blk_name);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		for_each_ras_error(err_node, &amp;ras_mgr-&gt;err_data) {</div><div class='ctx'> 			err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 			mcm_info = &amp;err_info-&gt;mcm_info;</div><div class='del'>-			dev_info(adev-&gt;dev, "socket: %d, die: %d, "</div><div class='del'>-				 "%lld uncorrectable hardware errors detected in total in %s block\n",</div><div class='del'>-				 mcm_info-&gt;socket_id, mcm_info-&gt;die_id, err_info-&gt;ue_count, blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d, "</div><div class='add'>+				      "%lld uncorrectable hardware errors detected in total in %s block\n",</div><div class='add'>+				      mcm_info-&gt;socket_id, mcm_info-&gt;die_id, err_info-&gt;ue_count, blk_name);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1081,44 +1085,44 @@ static void amdgpu_ras_error_print_error_data(struct amdgpu_device *adev,</div><div class='ctx'> 				err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 				mcm_info = &amp;err_info-&gt;mcm_info;</div><div class='ctx'> 				if (err_info-&gt;de_count) {</div><div class='del'>-					dev_info(adev-&gt;dev, "socket: %d, die: %d, "</div><div class='del'>-						"%lld new deferred hardware errors detected in %s block\n",</div><div class='del'>-						mcm_info-&gt;socket_id,</div><div class='del'>-						mcm_info-&gt;die_id,</div><div class='del'>-						err_info-&gt;de_count,</div><div class='del'>-						blk_name);</div><div class='add'>+					RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d, "</div><div class='add'>+						      "%lld new deferred hardware errors detected in %s block\n",</div><div class='add'>+						      mcm_info-&gt;socket_id,</div><div class='add'>+						      mcm_info-&gt;die_id,</div><div class='add'>+						      err_info-&gt;de_count,</div><div class='add'>+						      blk_name);</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			for_each_ras_error(err_node, &amp;ras_mgr-&gt;err_data) {</div><div class='ctx'> 				err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 				mcm_info = &amp;err_info-&gt;mcm_info;</div><div class='del'>-				dev_info(adev-&gt;dev, "socket: %d, die: %d, "</div><div class='del'>-					"%lld deferred hardware errors detected in total in %s block\n",</div><div class='del'>-					mcm_info-&gt;socket_id, mcm_info-&gt;die_id,</div><div class='del'>-					err_info-&gt;de_count, blk_name);</div><div class='add'>+				RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d, "</div><div class='add'>+					      "%lld deferred hardware errors detected in total in %s block\n",</div><div class='add'>+					      mcm_info-&gt;socket_id, mcm_info-&gt;die_id,</div><div class='add'>+					      err_info-&gt;de_count, blk_name);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			for_each_ras_error(err_node, err_data) {</div><div class='ctx'> 				err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 				mcm_info = &amp;err_info-&gt;mcm_info;</div><div class='ctx'> 				if (err_info-&gt;ce_count) {</div><div class='del'>-					dev_info(adev-&gt;dev, "socket: %d, die: %d, "</div><div class='del'>-						"%lld new correctable hardware errors detected in %s block\n",</div><div class='del'>-						mcm_info-&gt;socket_id,</div><div class='del'>-						mcm_info-&gt;die_id,</div><div class='del'>-						err_info-&gt;ce_count,</div><div class='del'>-						blk_name);</div><div class='add'>+					RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d, "</div><div class='add'>+						      "%lld new correctable hardware errors detected in %s block\n",</div><div class='add'>+						      mcm_info-&gt;socket_id,</div><div class='add'>+						      mcm_info-&gt;die_id,</div><div class='add'>+						      err_info-&gt;ce_count,</div><div class='add'>+						      blk_name);</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			for_each_ras_error(err_node, &amp;ras_mgr-&gt;err_data) {</div><div class='ctx'> 				err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 				mcm_info = &amp;err_info-&gt;mcm_info;</div><div class='del'>-				dev_info(adev-&gt;dev, "socket: %d, die: %d, "</div><div class='del'>-					"%lld correctable hardware errors detected in total in %s block\n",</div><div class='del'>-					mcm_info-&gt;socket_id, mcm_info-&gt;die_id,</div><div class='del'>-					err_info-&gt;ce_count, blk_name);</div><div class='add'>+				RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d, "</div><div class='add'>+					      "%lld correctable hardware errors detected in total in %s block\n",</div><div class='add'>+					      mcm_info-&gt;socket_id, mcm_info-&gt;die_id,</div><div class='add'>+					      err_info-&gt;ce_count, blk_name);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1131,77 +1135,79 @@ static inline bool err_data_has_source_info(struct ras_err_data *data)</div><div class='ctx'> </div><div class='ctx'> static void amdgpu_ras_error_generate_report(struct amdgpu_device *adev,</div><div class='ctx'> 					     struct ras_query_if *query_if,</div><div class='del'>-					     struct ras_err_data *err_data)</div><div class='add'>+					     struct ras_err_data *err_data,</div><div class='add'>+					     struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_manager *ras_mgr = amdgpu_ras_find_obj(adev, &amp;query_if-&gt;head);</div><div class='ctx'> 	const char *blk_name = get_ras_block_str(&amp;query_if-&gt;head);</div><div class='add'>+	u64 event_id = qctx-&gt;event_id;</div><div class='ctx'> </div><div class='ctx'> 	if (err_data-&gt;ce_count) {</div><div class='ctx'> 		if (err_data_has_source_info(err_data)) {</div><div class='del'>-			amdgpu_ras_error_print_error_data(adev, ras_mgr, err_data,</div><div class='add'>+			amdgpu_ras_error_print_error_data(adev, ras_mgr, err_data, qctx,</div><div class='ctx'> 							  blk_name, false, false);</div><div class='ctx'> 		} else if (!adev-&gt;aid_mask &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs-&gt;get_socket_id &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs-&gt;get_die_id) {</div><div class='del'>-			dev_info(adev-&gt;dev, "socket: %d, die: %d "</div><div class='del'>-				 "%ld correctable hardware errors "</div><div class='del'>-				 "detected in %s block\n",</div><div class='del'>-				 adev-&gt;smuio.funcs-&gt;get_socket_id(adev),</div><div class='del'>-				 adev-&gt;smuio.funcs-&gt;get_die_id(adev),</div><div class='del'>-				 ras_mgr-&gt;err_data.ce_count,</div><div class='del'>-				 blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d "</div><div class='add'>+				      "%ld correctable hardware errors "</div><div class='add'>+				      "detected in %s block\n",</div><div class='add'>+				      adev-&gt;smuio.funcs-&gt;get_socket_id(adev),</div><div class='add'>+				      adev-&gt;smuio.funcs-&gt;get_die_id(adev),</div><div class='add'>+				      ras_mgr-&gt;err_data.ce_count,</div><div class='add'>+				      blk_name);</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_info(adev-&gt;dev, "%ld correctable hardware errors "</div><div class='del'>-				 "detected in %s block\n",</div><div class='del'>-				 ras_mgr-&gt;err_data.ce_count,</div><div class='del'>-				 blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "%ld correctable hardware errors "</div><div class='add'>+				      "detected in %s block\n",</div><div class='add'>+				      ras_mgr-&gt;err_data.ce_count,</div><div class='add'>+				      blk_name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (err_data-&gt;ue_count) {</div><div class='ctx'> 		if (err_data_has_source_info(err_data)) {</div><div class='del'>-			amdgpu_ras_error_print_error_data(adev, ras_mgr, err_data,</div><div class='add'>+			amdgpu_ras_error_print_error_data(adev, ras_mgr, err_data, qctx,</div><div class='ctx'> 							  blk_name, true, false);</div><div class='ctx'> 		} else if (!adev-&gt;aid_mask &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs-&gt;get_socket_id &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs-&gt;get_die_id) {</div><div class='del'>-			dev_info(adev-&gt;dev, "socket: %d, die: %d "</div><div class='del'>-				 "%ld uncorrectable hardware errors "</div><div class='del'>-				 "detected in %s block\n",</div><div class='del'>-				 adev-&gt;smuio.funcs-&gt;get_socket_id(adev),</div><div class='del'>-				 adev-&gt;smuio.funcs-&gt;get_die_id(adev),</div><div class='del'>-				 ras_mgr-&gt;err_data.ue_count,</div><div class='del'>-				 blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d "</div><div class='add'>+				      "%ld uncorrectable hardware errors "</div><div class='add'>+				      "detected in %s block\n",</div><div class='add'>+				      adev-&gt;smuio.funcs-&gt;get_socket_id(adev),</div><div class='add'>+				      adev-&gt;smuio.funcs-&gt;get_die_id(adev),</div><div class='add'>+				      ras_mgr-&gt;err_data.ue_count,</div><div class='add'>+				      blk_name);</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_info(adev-&gt;dev, "%ld uncorrectable hardware errors "</div><div class='del'>-				 "detected in %s block\n",</div><div class='del'>-				 ras_mgr-&gt;err_data.ue_count,</div><div class='del'>-				 blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "%ld uncorrectable hardware errors "</div><div class='add'>+				      "detected in %s block\n",</div><div class='add'>+				      ras_mgr-&gt;err_data.ue_count,</div><div class='add'>+				      blk_name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (err_data-&gt;de_count) {</div><div class='ctx'> 		if (err_data_has_source_info(err_data)) {</div><div class='del'>-			amdgpu_ras_error_print_error_data(adev, ras_mgr, err_data,</div><div class='add'>+			amdgpu_ras_error_print_error_data(adev, ras_mgr, err_data, qctx,</div><div class='ctx'> 							  blk_name, false, true);</div><div class='ctx'> 		} else if (!adev-&gt;aid_mask &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs-&gt;get_socket_id &amp;&amp;</div><div class='ctx'> 			   adev-&gt;smuio.funcs-&gt;get_die_id) {</div><div class='del'>-			dev_info(adev-&gt;dev, "socket: %d, die: %d "</div><div class='del'>-				 "%ld deferred hardware errors "</div><div class='del'>-				 "detected in %s block\n",</div><div class='del'>-				 adev-&gt;smuio.funcs-&gt;get_socket_id(adev),</div><div class='del'>-				 adev-&gt;smuio.funcs-&gt;get_die_id(adev),</div><div class='del'>-				 ras_mgr-&gt;err_data.de_count,</div><div class='del'>-				 blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "socket: %d, die: %d "</div><div class='add'>+				      "%ld deferred hardware errors "</div><div class='add'>+				      "detected in %s block\n",</div><div class='add'>+				      adev-&gt;smuio.funcs-&gt;get_socket_id(adev),</div><div class='add'>+				      adev-&gt;smuio.funcs-&gt;get_die_id(adev),</div><div class='add'>+				      ras_mgr-&gt;err_data.de_count,</div><div class='add'>+				      blk_name);</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_info(adev-&gt;dev, "%ld deferred hardware errors "</div><div class='del'>-				 "detected in %s block\n",</div><div class='del'>-				 ras_mgr-&gt;err_data.de_count,</div><div class='del'>-				 blk_name);</div><div class='add'>+			RAS_EVENT_LOG(adev, event_id, "%ld deferred hardware errors "</div><div class='add'>+				      "detected in %s block\n",</div><div class='add'>+				      ras_mgr-&gt;err_data.de_count,</div><div class='add'>+				      blk_name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1244,6 +1250,10 @@ int amdgpu_ras_bind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk,</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_manager *obj;</div><div class='ctx'> </div><div class='add'>+	/* in resume phase, no need to create aca fs node */</div><div class='add'>+	if (adev-&gt;in_suspend || amdgpu_in_reset(adev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	obj = get_ras_manager(adev, blk);</div><div class='ctx'> 	if (!obj)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1265,7 +1275,8 @@ int amdgpu_ras_unbind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amdgpu_aca_log_ras_error_data(struct amdgpu_device *adev, enum amdgpu_ras_block blk,</div><div class='del'>-					 enum aca_error_type type, struct ras_err_data *err_data)</div><div class='add'>+					 enum aca_error_type type, struct ras_err_data *err_data,</div><div class='add'>+					 struct ras_query_context *qctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_manager *obj;</div><div class='ctx'> </div><div class='hunk'>@@ -1273,7 +1284,7 @@ static int amdgpu_aca_log_ras_error_data(struct amdgpu_device *adev, enum amdgpu</div><div class='ctx'> 	if (!obj)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return amdgpu_aca_get_error_data(adev, &amp;obj-&gt;aca_handle, type, err_data);</div><div class='add'>+	return amdgpu_aca_get_error_data(adev, &amp;obj-&gt;aca_handle, type, err_data, qctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> ssize_t amdgpu_ras_aca_sysfs_read(struct device *dev, struct device_attribute *attr,</div><div class='hunk'>@@ -1287,13 +1298,14 @@ ssize_t amdgpu_ras_aca_sysfs_read(struct device *dev, struct device_attribute *a</div><div class='ctx'> 	if (amdgpu_ras_query_error_status(obj-&gt;adev, &amp;info))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%s: %lu\n%s: %lu\n", "ue", info.ue_count,</div><div class='del'>-			  "ce", info.ce_count);</div><div class='add'>+	return sysfs_emit(buf, "%s: %lu\n%s: %lu\n%s: %lu\n", "ue", info.ue_count,</div><div class='add'>+			  "ce", info.ce_count, "de", info.ue_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amdgpu_ras_query_error_status_helper(struct amdgpu_device *adev,</div><div class='ctx'> 						struct ras_query_if *info,</div><div class='ctx'> 						struct ras_err_data *err_data,</div><div class='add'>+						struct ras_query_context *qctx,</div><div class='ctx'> 						unsigned int error_query_mode)</div><div class='ctx'> {</div><div class='ctx'> 	enum amdgpu_ras_block blk = info ? info-&gt;head.block : AMDGPU_RAS_BLOCK_COUNT;</div><div class='hunk'>@@ -1329,17 +1341,21 @@ static int amdgpu_ras_query_error_status_helper(struct amdgpu_device *adev,</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (amdgpu_aca_is_enabled(adev)) {</div><div class='del'>-			ret = amdgpu_aca_log_ras_error_data(adev, blk, ACA_ERROR_TYPE_UE, err_data);</div><div class='add'>+			ret = amdgpu_aca_log_ras_error_data(adev, blk, ACA_ERROR_TYPE_UE, err_data, qctx);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			ret = amdgpu_aca_log_ras_error_data(adev, blk, ACA_ERROR_TYPE_CE, err_data, qctx);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='del'>-			ret = amdgpu_aca_log_ras_error_data(adev, blk, ACA_ERROR_TYPE_CE, err_data);</div><div class='add'>+			ret = amdgpu_aca_log_ras_error_data(adev, blk, ACA_ERROR_TYPE_DEFERRED, err_data, qctx);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* FIXME: add code to check return value later */</div><div class='del'>-			amdgpu_mca_smu_log_ras_error(adev, blk, AMDGPU_MCA_ERROR_TYPE_UE, err_data);</div><div class='del'>-			amdgpu_mca_smu_log_ras_error(adev, blk, AMDGPU_MCA_ERROR_TYPE_CE, err_data);</div><div class='add'>+			amdgpu_mca_smu_log_ras_error(adev, blk, AMDGPU_MCA_ERROR_TYPE_UE, err_data, qctx);</div><div class='add'>+			amdgpu_mca_smu_log_ras_error(adev, blk, AMDGPU_MCA_ERROR_TYPE_CE, err_data, qctx);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1351,6 +1367,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev, struct ras_query_i</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_manager *obj = amdgpu_ras_find_obj(adev, &amp;info-&gt;head);</div><div class='ctx'> 	struct ras_err_data err_data;</div><div class='add'>+	struct ras_query_context qctx;</div><div class='ctx'> 	unsigned int error_query_mode;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1364,8 +1381,12 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev, struct ras_query_i</div><div class='ctx'> 	if (!amdgpu_ras_get_error_query_mode(adev, &amp;error_query_mode))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	memset(&amp;qctx, 0, sizeof(qctx));</div><div class='add'>+	qctx.event_id = amdgpu_ras_acquire_event_id(adev, amdgpu_ras_intr_triggered() ?</div><div class='add'>+						   RAS_EVENT_TYPE_ISR : RAS_EVENT_TYPE_INVALID);</div><div class='ctx'> 	ret = amdgpu_ras_query_error_status_helper(adev, info,</div><div class='ctx'> 						   &amp;err_data,</div><div class='add'>+						   &amp;qctx,</div><div class='ctx'> 						   error_query_mode);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_fini_err_data;</div><div class='hunk'>@@ -1376,7 +1397,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev, struct ras_query_i</div><div class='ctx'> 	info-&gt;ce_count = obj-&gt;err_data.ce_count;</div><div class='ctx'> 	info-&gt;de_count = obj-&gt;err_data.de_count;</div><div class='ctx'> </div><div class='del'>-	amdgpu_ras_error_generate_report(adev, info, &amp;err_data);</div><div class='add'>+	amdgpu_ras_error_generate_report(adev, info, &amp;err_data, &amp;qctx);</div><div class='ctx'> </div><div class='ctx'> out_fini_err_data:</div><div class='ctx'> 	amdgpu_ras_error_data_fini(&amp;err_data);</div><div class='hunk'>@@ -2041,7 +2062,7 @@ static void amdgpu_ras_interrupt_poison_consumption_handler(struct ras_manager *</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	amdgpu_umc_poison_handler(adev, obj-&gt;head.block, false);</div><div class='add'>+	amdgpu_umc_poison_handler(adev, obj-&gt;head.block, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (block_obj-&gt;hw_ops &amp;&amp; block_obj-&gt;hw_ops-&gt;handle_poison_consumption)</div><div class='ctx'> 		poison_stat = block_obj-&gt;hw_ops-&gt;handle_poison_consumption(adev);</div><div class='hunk'>@@ -2061,6 +2082,17 @@ static void amdgpu_ras_interrupt_poison_creation_handler(struct ras_manager *obj</div><div class='ctx'> {</div><div class='ctx'> 	dev_info(obj-&gt;adev-&gt;dev,</div><div class='ctx'> 		"Poison is created\n");</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ip_version(obj-&gt;adev, UMC_HWIP, 0) &gt;= IP_VERSION(12, 0, 0)) {</div><div class='add'>+		struct amdgpu_ras *con = amdgpu_ras_get_context(obj-&gt;adev);</div><div class='add'>+</div><div class='add'>+		amdgpu_ras_put_poison_req(obj-&gt;adev,</div><div class='add'>+			AMDGPU_RAS_BLOCK__UMC, 0, NULL, NULL, false);</div><div class='add'>+</div><div class='add'>+		atomic_inc(&amp;con-&gt;page_retirement_req_cnt);</div><div class='add'>+</div><div class='add'>+		wake_up(&amp;con-&gt;page_retirement_wq);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void amdgpu_ras_interrupt_umc_handler(struct ras_manager *obj,</div><div class='hunk'>@@ -2371,7 +2403,7 @@ static int amdgpu_ras_badpages_read(struct amdgpu_device *adev,</div><div class='ctx'> 			.flags = AMDGPU_RAS_RETIRE_PAGE_RESERVED,</div><div class='ctx'> 		};</div><div class='ctx'> 		status = amdgpu_vram_mgr_query_page_status(&amp;adev-&gt;mman.vram_mgr,</div><div class='del'>-				data-&gt;bps[i].retired_page);</div><div class='add'>+				data-&gt;bps[i].retired_page &lt;&lt; AMDGPU_GPU_PAGE_SHIFT);</div><div class='ctx'> 		if (status == -EBUSY)</div><div class='ctx'> 			(*bps)[i].flags = AMDGPU_RAS_RETIRE_PAGE_PENDING;</div><div class='ctx'> 		else if (status == -ENOENT)</div><div class='hunk'>@@ -2384,6 +2416,19 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void amdgpu_ras_set_fed_all(struct amdgpu_device *adev,</div><div class='add'>+				   struct amdgpu_hive_info *hive, bool status)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *tmp_adev;</div><div class='add'>+</div><div class='add'>+	if (hive) {</div><div class='add'>+		list_for_each_entry(tmp_adev, &amp;hive-&gt;device_list, gmc.xgmi.head)</div><div class='add'>+			amdgpu_ras_set_fed(tmp_adev, status);</div><div class='add'>+	} else {</div><div class='add'>+		amdgpu_ras_set_fed(adev, status);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void amdgpu_ras_do_recovery(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_ras *ras =</div><div class='hunk'>@@ -2393,8 +2438,21 @@ static void amdgpu_ras_do_recovery(struct work_struct *work)</div><div class='ctx'> 	struct list_head device_list, *device_list_handle =  NULL;</div><div class='ctx'> 	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);</div><div class='ctx'> </div><div class='del'>-	if (hive)</div><div class='add'>+	if (hive) {</div><div class='ctx'> 		atomic_set(&amp;hive-&gt;ras_recovery, 1);</div><div class='add'>+</div><div class='add'>+		/* If any device which is part of the hive received RAS fatal</div><div class='add'>+		 * error interrupt, set fatal error status on all. This</div><div class='add'>+		 * condition will need a recovery, and flag will be cleared</div><div class='add'>+		 * as part of recovery.</div><div class='add'>+		 */</div><div class='add'>+		list_for_each_entry(remote_adev, &amp;hive-&gt;device_list,</div><div class='add'>+				    gmc.xgmi.head)</div><div class='add'>+			if (amdgpu_ras_get_fed_status(remote_adev)) {</div><div class='add'>+				amdgpu_ras_set_fed_all(adev, hive, true);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+	}</div><div class='ctx'> 	if (!ras-&gt;disable_ras_err_cnt_harvest) {</div><div class='ctx'> </div><div class='ctx'> 		/* Build list of devices to query RAS related errors */</div><div class='hunk'>@@ -2439,18 +2497,6 @@ static void amdgpu_ras_do_recovery(struct work_struct *work)</div><div class='ctx'> 				ras-&gt;gpu_reset_flags &amp;= ~AMDGPU_RAS_GPU_RESET_MODE1_RESET;</div><div class='ctx'> 				set_bit(AMDGPU_NEED_FULL_RESET, &amp;reset_context.flags);</div><div class='ctx'> </div><div class='del'>-				/* For any RAS error that needs a full reset to</div><div class='del'>-				 * recover, set the fatal error status</div><div class='del'>-				 */</div><div class='del'>-				if (hive) {</div><div class='del'>-					list_for_each_entry(remote_adev,</div><div class='del'>-							    &amp;hive-&gt;device_list,</div><div class='del'>-							    gmc.xgmi.head)</div><div class='del'>-						amdgpu_ras_set_fed(remote_adev,</div><div class='del'>-								   true);</div><div class='del'>-				} else {</div><div class='del'>-					amdgpu_ras_set_fed(adev, true);</div><div class='del'>-				}</div><div class='ctx'> 				psp_fatal_error_recovery_quirk(&amp;adev-&gt;psp);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2516,9 +2562,7 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		amdgpu_vram_mgr_reserve_range(&amp;adev-&gt;mman.vram_mgr,</div><div class='del'>-			bps[i].retired_page &lt;&lt; AMDGPU_GPU_PAGE_SHIFT,</div><div class='del'>-			AMDGPU_GPU_PAGE_SIZE);</div><div class='add'>+		amdgpu_ras_reserve_page(adev, bps[i].retired_page);</div><div class='ctx'> </div><div class='ctx'> 		memcpy(&amp;data-&gt;bps[data-&gt;count], &amp;bps[i], sizeof(*data-&gt;bps));</div><div class='ctx'> 		data-&gt;count++;</div><div class='hunk'>@@ -2674,10 +2718,167 @@ static void amdgpu_ras_validate_threshold(struct amdgpu_device *adev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amdgpu_ras_put_poison_req(struct amdgpu_device *adev,</div><div class='add'>+		enum amdgpu_ras_block block, uint16_t pasid,</div><div class='add'>+		pasid_notify pasid_fn, void *data, uint32_t reset)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct ras_poison_msg poison_msg;</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+</div><div class='add'>+	memset(&amp;poison_msg, 0, sizeof(poison_msg));</div><div class='add'>+	poison_msg.block = block;</div><div class='add'>+	poison_msg.pasid = pasid;</div><div class='add'>+	poison_msg.reset = reset;</div><div class='add'>+	poison_msg.pasid_fn = pasid_fn;</div><div class='add'>+	poison_msg.data = data;</div><div class='add'>+</div><div class='add'>+	ret = kfifo_put(&amp;con-&gt;poison_fifo, poison_msg);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		dev_err(adev-&gt;dev, "Poison message fifo is full!\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_ras_get_poison_req(struct amdgpu_device *adev,</div><div class='add'>+		struct ras_poison_msg *poison_msg)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+</div><div class='add'>+	return kfifo_get(&amp;con-&gt;poison_fifo, poison_msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_ras_ecc_log_init(struct ras_ecc_log_info *ecc_log)</div><div class='add'>+{</div><div class='add'>+	mutex_init(&amp;ecc_log-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Set any value as siphash key */</div><div class='add'>+	memset(&amp;ecc_log-&gt;ecc_key, 0xad, sizeof(ecc_log-&gt;ecc_key));</div><div class='add'>+</div><div class='add'>+	INIT_RADIX_TREE(&amp;ecc_log-&gt;de_page_tree, GFP_KERNEL);</div><div class='add'>+	ecc_log-&gt;de_updated = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_ras_ecc_log_fini(struct ras_ecc_log_info *ecc_log)</div><div class='add'>+{</div><div class='add'>+	struct radix_tree_iter iter;</div><div class='add'>+	void __rcu **slot;</div><div class='add'>+	struct ras_ecc_err *ecc_err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ecc_log-&gt;lock);</div><div class='add'>+	radix_tree_for_each_slot(slot, &amp;ecc_log-&gt;de_page_tree, &amp;iter, 0) {</div><div class='add'>+		ecc_err = radix_tree_deref_slot(slot);</div><div class='add'>+		kfree(ecc_err-&gt;err_pages.pfn);</div><div class='add'>+		kfree(ecc_err);</div><div class='add'>+		radix_tree_iter_delete(&amp;ecc_log-&gt;de_page_tree, &amp;iter, slot);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ecc_log-&gt;lock);</div><div class='add'>+</div><div class='add'>+	mutex_destroy(&amp;ecc_log-&gt;lock);</div><div class='add'>+	ecc_log-&gt;de_updated = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_ras_do_page_retirement(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = container_of(work, struct amdgpu_ras,</div><div class='add'>+					      page_retirement_dwork.work);</div><div class='add'>+	struct amdgpu_device *adev = con-&gt;adev;</div><div class='add'>+	struct ras_err_data err_data;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_in_reset(adev) || atomic_read(&amp;con-&gt;in_recovery))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	amdgpu_ras_error_data_init(&amp;err_data);</div><div class='add'>+</div><div class='add'>+	amdgpu_umc_handle_bad_pages(adev, &amp;err_data);</div><div class='add'>+</div><div class='add'>+	amdgpu_ras_error_data_fini(&amp;err_data);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;con-&gt;umc_ecc_log.lock);</div><div class='add'>+	if (radix_tree_tagged(&amp;con-&gt;umc_ecc_log.de_page_tree,</div><div class='add'>+				UMC_ECC_NEW_DETECTED_TAG))</div><div class='add'>+		schedule_delayed_work(&amp;con-&gt;page_retirement_dwork,</div><div class='add'>+			msecs_to_jiffies(AMDGPU_RAS_RETIRE_PAGE_INTERVAL));</div><div class='add'>+	mutex_unlock(&amp;con-&gt;umc_ecc_log.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_ras_query_ecc_status(struct amdgpu_device *adev,</div><div class='add'>+			enum amdgpu_ras_block ras_block, uint32_t timeout_ms)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct ras_ecc_log_info *ecc_log;</div><div class='add'>+	struct ras_query_if info;</div><div class='add'>+	uint32_t timeout = timeout_ms;</div><div class='add'>+	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='add'>+</div><div class='add'>+	memset(&amp;info, 0, sizeof(info));</div><div class='add'>+	info.head.block = ras_block;</div><div class='add'>+</div><div class='add'>+	ecc_log = &amp;ras-&gt;umc_ecc_log;</div><div class='add'>+	ecc_log-&gt;de_updated = false;</div><div class='add'>+	do {</div><div class='add'>+		ret = amdgpu_ras_query_error_status(adev, &amp;info);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(adev-&gt;dev, "Failed to query ras error! ret:%d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (timeout &amp;&amp; !ecc_log-&gt;de_updated) {</div><div class='add'>+			msleep(1);</div><div class='add'>+			timeout--;</div><div class='add'>+		}</div><div class='add'>+	} while (timeout &amp;&amp; !ecc_log-&gt;de_updated);</div><div class='add'>+</div><div class='add'>+	if (timeout_ms &amp;&amp; !timeout) {</div><div class='add'>+		dev_warn(adev-&gt;dev, "Can't find deferred error\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_ras_poison_creation_handler(struct amdgpu_device *adev,</div><div class='add'>+					uint32_t timeout)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_ras_query_ecc_status(adev, AMDGPU_RAS_BLOCK__UMC, timeout);</div><div class='add'>+	if (!ret)</div><div class='add'>+		schedule_delayed_work(&amp;con-&gt;page_retirement_dwork, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_ras_poison_consumption_handler(struct amdgpu_device *adev,</div><div class='add'>+			struct ras_poison_msg *poison_msg)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	uint32_t reset = poison_msg-&gt;reset;</div><div class='add'>+	uint16_t pasid = poison_msg-&gt;pasid;</div><div class='add'>+</div><div class='add'>+	kgd2kfd_set_sram_ecc_flag(adev-&gt;kfd.dev);</div><div class='add'>+</div><div class='add'>+	if (poison_msg-&gt;pasid_fn)</div><div class='add'>+		poison_msg-&gt;pasid_fn(adev, pasid, poison_msg-&gt;data);</div><div class='add'>+</div><div class='add'>+	if (reset) {</div><div class='add'>+		flush_delayed_work(&amp;con-&gt;page_retirement_dwork);</div><div class='add'>+</div><div class='add'>+		con-&gt;gpu_reset_flags |= reset;</div><div class='add'>+		amdgpu_ras_reset_gpu(adev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amdgpu_ras_page_retirement_thread(void *param)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)param;</div><div class='ctx'> 	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	struct ras_poison_msg poison_msg;</div><div class='add'>+	enum amdgpu_ras_block ras_block;</div><div class='add'>+	bool poison_creation_is_handled = false;</div><div class='ctx'> </div><div class='ctx'> 	while (!kthread_should_stop()) {</div><div class='ctx'> </div><div class='hunk'>@@ -2688,13 +2889,34 @@ static int amdgpu_ras_page_retirement_thread(void *param)</div><div class='ctx'> 		if (kthread_should_stop())</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		dev_info(adev-&gt;dev, "Start processing page retirement. request:%d\n",</div><div class='del'>-			atomic_read(&amp;con-&gt;page_retirement_req_cnt));</div><div class='del'>-</div><div class='ctx'> 		atomic_dec(&amp;con-&gt;page_retirement_req_cnt);</div><div class='ctx'> </div><div class='del'>-		amdgpu_umc_bad_page_polling_timeout(adev,</div><div class='del'>-				false, MAX_UMC_POISON_POLLING_TIME_ASYNC);</div><div class='add'>+		if (!amdgpu_ras_get_poison_req(adev, &amp;poison_msg))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ras_block = poison_msg.block;</div><div class='add'>+</div><div class='add'>+		dev_info(adev-&gt;dev, "Start processing ras block %s(%d)\n",</div><div class='add'>+				ras_block_str(ras_block), ras_block);</div><div class='add'>+</div><div class='add'>+		if (ras_block == AMDGPU_RAS_BLOCK__UMC) {</div><div class='add'>+			amdgpu_ras_poison_creation_handler(adev,</div><div class='add'>+				MAX_UMC_POISON_POLLING_TIME_ASYNC);</div><div class='add'>+			poison_creation_is_handled = true;</div><div class='add'>+		} else {</div><div class='add'>+			/* poison_creation_is_handled:</div><div class='add'>+			 *   false: no poison creation interrupt, but it has poison</div><div class='add'>+			 *          consumption interrupt.</div><div class='add'>+			 *   true: It has poison creation interrupt at the beginning,</div><div class='add'>+			 *         but it has no poison creation interrupt later.</div><div class='add'>+			 */</div><div class='add'>+			amdgpu_ras_poison_creation_handler(adev,</div><div class='add'>+					poison_creation_is_handled ?</div><div class='add'>+					0 : MAX_UMC_POISON_POLLING_TIME_ASYNC);</div><div class='add'>+</div><div class='add'>+			amdgpu_ras_poison_consumption_handler(adev, &amp;poison_msg);</div><div class='add'>+			poison_creation_is_handled = false;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2763,6 +2985,8 @@ int amdgpu_ras_recovery_init(struct amdgpu_device *adev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;con-&gt;page_rsv_lock);</div><div class='add'>+	INIT_KFIFO(con-&gt;poison_fifo);</div><div class='ctx'> 	mutex_init(&amp;con-&gt;page_retirement_lock);</div><div class='ctx'> 	init_waitqueue_head(&amp;con-&gt;page_retirement_wq);</div><div class='ctx'> 	atomic_set(&amp;con-&gt;page_retirement_req_cnt, 0);</div><div class='hunk'>@@ -2773,6 +2997,8 @@ int amdgpu_ras_recovery_init(struct amdgpu_device *adev)</div><div class='ctx'> 		dev_warn(adev-&gt;dev, "Failed to create umc_page_retirement thread!!!\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	INIT_DELAYED_WORK(&amp;con-&gt;page_retirement_dwork, amdgpu_ras_do_page_retirement);</div><div class='add'>+	amdgpu_ras_ecc_log_init(&amp;con-&gt;umc_ecc_log);</div><div class='ctx'> #ifdef CONFIG_X86_MCE_AMD</div><div class='ctx'> 	if ((adev-&gt;asic_type == CHIP_ALDEBARAN) &amp;&amp;</div><div class='ctx'> 	    (adev-&gt;gmc.xgmi.connected_to_cpu))</div><div class='hunk'>@@ -2813,8 +3039,14 @@ static int amdgpu_ras_recovery_fini(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;con-&gt;page_retirement_req_cnt, 0);</div><div class='ctx'> </div><div class='add'>+	mutex_destroy(&amp;con-&gt;page_rsv_lock);</div><div class='add'>+</div><div class='ctx'> 	cancel_work_sync(&amp;con-&gt;recovery_work);</div><div class='ctx'> </div><div class='add'>+	cancel_delayed_work_sync(&amp;con-&gt;page_retirement_dwork);</div><div class='add'>+</div><div class='add'>+	amdgpu_ras_ecc_log_fini(&amp;con-&gt;umc_ecc_log);</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;con-&gt;recovery_lock);</div><div class='ctx'> 	con-&gt;eh_data = NULL;</div><div class='ctx'> 	kfree(data-&gt;bps);</div><div class='hunk'>@@ -3036,6 +3268,35 @@ static int amdgpu_get_ras_schema(struct amdgpu_device *adev)</div><div class='ctx'> 			AMDGPU_RAS_ERROR__PARITY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ras_event_mgr_init(struct ras_event_manager *mgr)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mgr-&gt;seqnos); i++)</div><div class='add'>+		atomic64_set(&amp;mgr-&gt;seqnos[i], 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_ras_event_mgr_init(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='add'>+	struct amdgpu_hive_info *hive;</div><div class='add'>+</div><div class='add'>+	if (!ras)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hive = amdgpu_get_xgmi_hive(adev);</div><div class='add'>+	ras-&gt;event_mgr = hive ? &amp;hive-&gt;event_mgr : &amp;ras-&gt;__event_mgr;</div><div class='add'>+</div><div class='add'>+	/* init event manager with node 0 on xgmi system */</div><div class='add'>+	if (!amdgpu_in_reset(adev)) {</div><div class='add'>+		if (!hive || adev-&gt;gmc.xgmi.node_id == 0)</div><div class='add'>+			ras_event_mgr_init(ras-&gt;event_mgr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hive)</div><div class='add'>+		amdgpu_put_xgmi_hive(hive);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_ras_init(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='hunk'>@@ -3356,6 +3617,8 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev)</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	amdgpu_ras_event_mgr_init(adev);</div><div class='add'>+</div><div class='ctx'> 	if (amdgpu_aca_is_enabled(adev)) {</div><div class='ctx'> 		if (amdgpu_in_reset(adev))</div><div class='ctx'> 			r = amdgpu_aca_reset(adev);</div><div class='hunk'>@@ -3472,14 +3735,39 @@ void amdgpu_ras_set_fed(struct amdgpu_device *adev, bool status)</div><div class='ctx'> 		atomic_set(&amp;ras-&gt;fed, !!status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool amdgpu_ras_event_id_is_valid(struct amdgpu_device *adev, u64 id)</div><div class='add'>+{</div><div class='add'>+	return !(id &amp; BIT_ULL(63));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 amdgpu_ras_acquire_event_id(struct amdgpu_device *adev, enum ras_event_type type)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='add'>+	u64 id;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case RAS_EVENT_TYPE_ISR:</div><div class='add'>+		id = (u64)atomic64_read(&amp;ras-&gt;event_mgr-&gt;seqnos[type]);</div><div class='add'>+		break;</div><div class='add'>+	case RAS_EVENT_TYPE_INVALID:</div><div class='add'>+	default:</div><div class='add'>+		id = BIT_ULL(63) | 0ULL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return id;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void amdgpu_ras_global_ras_isr(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	if (atomic_cmpxchg(&amp;amdgpu_ras_in_intr, 0, 1) == 0) {</div><div class='ctx'> 		struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='add'>+		u64 event_id = (u64)atomic64_inc_return(&amp;ras-&gt;event_mgr-&gt;seqnos[RAS_EVENT_TYPE_ISR]);</div><div class='ctx'> </div><div class='del'>-		dev_info(adev-&gt;dev, "uncorrectable hardware error"</div><div class='del'>-			"(ERREVENT_ATHUB_INTERRUPT) detected!\n");</div><div class='add'>+		RAS_EVENT_LOG(adev, event_id, "uncorrectable hardware error"</div><div class='add'>+			      "(ERREVENT_ATHUB_INTERRUPT) detected!\n");</div><div class='ctx'> </div><div class='add'>+		amdgpu_ras_set_fed(adev, true);</div><div class='ctx'> 		ras-&gt;gpu_reset_flags |= AMDGPU_RAS_GPU_RESET_MODE1_RESET;</div><div class='ctx'> 		amdgpu_ras_reset_gpu(adev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3998,6 +4286,8 @@ void amdgpu_ras_add_mca_err_addr(struct ras_err_info *err_info, struct ras_err_a</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_err_addr *mca_err_addr;</div><div class='ctx'> </div><div class='add'>+	/* This function will be retired. */</div><div class='add'>+	return;</div><div class='ctx'> 	mca_err_addr = kzalloc(sizeof(*mca_err_addr), GFP_KERNEL);</div><div class='ctx'> 	if (!mca_err_addr)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -4195,3 +4485,19 @@ void amdgpu_ras_query_boot_status(struct amdgpu_device *adev, u32 num_instances)</div><div class='ctx'> 			amdgpu_ras_boot_time_error_reporting(adev, i, boot_error);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int amdgpu_ras_reserve_page(struct amdgpu_device *adev, uint64_t pfn)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	struct amdgpu_vram_mgr *mgr = &amp;adev-&gt;mman.vram_mgr;</div><div class='add'>+	uint64_t start = pfn &lt;&lt; AMDGPU_GPU_PAGE_SHIFT;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;con-&gt;page_rsv_lock);</div><div class='add'>+	ret = amdgpu_vram_mgr_query_page_status(mgr, start);</div><div class='add'>+	if (ret == -ENOENT)</div><div class='add'>+		ret = amdgpu_vram_mgr_reserve_range(mgr, start, AMDGPU_GPU_PAGE_SIZE);</div><div class='add'>+	mutex_unlock(&amp;con-&gt;page_rsv_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h<br/>index e0f8ce9d8440..c8980d5f6540 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/kfifo.h&gt;</div><div class='add'>+#include &lt;linux/radix-tree.h&gt;</div><div class='add'>+#include &lt;linux/siphash.h&gt;</div><div class='ctx'> #include "ta_ras_if.h"</div><div class='ctx'> #include "amdgpu_ras_eeprom.h"</div><div class='ctx'> #include "amdgpu_smuio.h"</div><div class='hunk'>@@ -64,6 +67,14 @@ struct amdgpu_iv_entry;</div><div class='ctx'> /* The high three bits indicates socketid */</div><div class='ctx'> #define AMDGPU_RAS_GET_FEATURES(val)  ((val) &amp; ~AMDGPU_RAS_FEATURES_SOCKETID_MASK)</div><div class='ctx'> </div><div class='add'>+#define RAS_EVENT_LOG(_adev, _id, _fmt, ...)				\</div><div class='add'>+do {									\</div><div class='add'>+	if (amdgpu_ras_event_id_is_valid((_adev), (_id)))			\</div><div class='add'>+	    dev_info((_adev)-&gt;dev, "{%llu}" _fmt, (_id), ##__VA_ARGS__);	\</div><div class='add'>+	else								\</div><div class='add'>+	    dev_info((_adev)-&gt;dev, _fmt, ##__VA_ARGS__);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> enum amdgpu_ras_block {</div><div class='ctx'> 	AMDGPU_RAS_BLOCK__UMC = 0,</div><div class='ctx'> 	AMDGPU_RAS_BLOCK__SDMA,</div><div class='hunk'>@@ -419,6 +430,52 @@ struct umc_ecc_info {</div><div class='ctx'> 	int record_ce_addr_supported;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ras_event_type {</div><div class='add'>+	RAS_EVENT_TYPE_INVALID = -1,</div><div class='add'>+	RAS_EVENT_TYPE_ISR = 0,</div><div class='add'>+	RAS_EVENT_TYPE_COUNT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ras_event_manager {</div><div class='add'>+	atomic64_t seqnos[RAS_EVENT_TYPE_COUNT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ras_query_context {</div><div class='add'>+	enum ras_event_type type;</div><div class='add'>+	u64 event_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef int (*pasid_notify)(struct amdgpu_device *adev,</div><div class='add'>+		uint16_t pasid, void *data);</div><div class='add'>+</div><div class='add'>+struct ras_poison_msg {</div><div class='add'>+	enum amdgpu_ras_block block;</div><div class='add'>+	uint16_t pasid;</div><div class='add'>+	uint32_t reset;</div><div class='add'>+	pasid_notify pasid_fn;</div><div class='add'>+	void *data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ras_err_pages {</div><div class='add'>+	uint32_t count;</div><div class='add'>+	uint64_t *pfn;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ras_ecc_err {</div><div class='add'>+	u64 hash_index;</div><div class='add'>+	uint64_t status;</div><div class='add'>+	uint64_t ipid;</div><div class='add'>+	uint64_t addr;</div><div class='add'>+	struct ras_err_pages err_pages;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ras_ecc_log_info {</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	siphash_key_t ecc_key;</div><div class='add'>+	struct radix_tree_root de_page_tree;</div><div class='add'>+	bool	de_updated;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct amdgpu_ras {</div><div class='ctx'> 	/* ras infrastructure */</div><div class='ctx'> 	/* for ras itself. */</div><div class='hunk'>@@ -477,8 +534,18 @@ struct amdgpu_ras {</div><div class='ctx'> 	wait_queue_head_t page_retirement_wq;</div><div class='ctx'> 	struct mutex page_retirement_lock;</div><div class='ctx'> 	atomic_t page_retirement_req_cnt;</div><div class='add'>+	struct mutex page_rsv_lock;</div><div class='add'>+	DECLARE_KFIFO(poison_fifo, struct ras_poison_msg, 128);</div><div class='add'>+	struct ras_ecc_log_info  umc_ecc_log;</div><div class='add'>+	struct delayed_work page_retirement_dwork;</div><div class='add'>+</div><div class='ctx'> 	/* Fatal error detected flag */</div><div class='ctx'> 	atomic_t fed;</div><div class='add'>+</div><div class='add'>+	/* RAS event manager */</div><div class='add'>+	struct ras_event_manager __event_mgr;</div><div class='add'>+	struct ras_event_manager *event_mgr;</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ras_fs_data {</div><div class='hunk'>@@ -512,6 +579,7 @@ struct ras_err_data {</div><div class='ctx'> 	unsigned long de_count;</div><div class='ctx'> 	unsigned long err_addr_cnt;</div><div class='ctx'> 	struct eeprom_table_record *err_addr;</div><div class='add'>+	unsigned long err_addr_len;</div><div class='ctx'> 	u32 err_list_count;</div><div class='ctx'> 	struct list_head err_node_list;</div><div class='ctx'> };</div><div class='hunk'>@@ -879,4 +947,13 @@ void amdgpu_ras_del_mca_err_addr(struct ras_err_info *err_info,</div><div class='ctx'> void amdgpu_ras_set_fed(struct amdgpu_device *adev, bool status);</div><div class='ctx'> bool amdgpu_ras_get_fed_status(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='add'>+bool amdgpu_ras_event_id_is_valid(struct amdgpu_device *adev, u64 id);</div><div class='add'>+u64 amdgpu_ras_acquire_event_id(struct amdgpu_device *adev, enum ras_event_type type);</div><div class='add'>+</div><div class='add'>+int amdgpu_ras_reserve_page(struct amdgpu_device *adev, uint64_t pfn);</div><div class='add'>+</div><div class='add'>+int amdgpu_ras_put_poison_req(struct amdgpu_device *adev,</div><div class='add'>+		enum amdgpu_ras_block block, uint16_t pasid,</div><div class='add'>+		pasid_notify pasid_fn, void *data, uint32_t reset);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c<br/>index b12808c0c331..06a62a8a992e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c</a></div><div class='hunk'>@@ -404,6 +404,22 @@ static int amdgpu_ras_eeprom_correct_header_tag(</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void amdgpu_ras_set_eeprom_table_version(struct amdgpu_ras_eeprom_control *control)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = to_amdgpu_device(control);</div><div class='add'>+	struct amdgpu_ras_eeprom_table_header *hdr = &amp;control-&gt;tbl_hdr;</div><div class='add'>+</div><div class='add'>+	switch (amdgpu_ip_version(adev, UMC_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(8, 10, 0):</div><div class='add'>+	case IP_VERSION(12, 0, 0):</div><div class='add'>+		hdr-&gt;version = RAS_TABLE_VER_V2_1;</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		hdr-&gt;version = RAS_TABLE_VER_V1;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_ras_eeprom_reset_table -- Reset the RAS EEPROM table</div><div class='ctx'>  * @control: pointer to control structure</div><div class='hunk'>@@ -423,11 +439,7 @@ int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)</div><div class='ctx'> 	mutex_lock(&amp;control-&gt;ras_tbl_mutex);</div><div class='ctx'> </div><div class='ctx'> 	hdr-&gt;header = RAS_TABLE_HDR_VAL;</div><div class='del'>-	if (adev-&gt;umc.ras &amp;&amp;</div><div class='del'>-	    adev-&gt;umc.ras-&gt;set_eeprom_table_version)</div><div class='del'>-		adev-&gt;umc.ras-&gt;set_eeprom_table_version(hdr);</div><div class='del'>-	else</div><div class='del'>-		hdr-&gt;version = RAS_TABLE_VER_V1;</div><div class='add'>+	amdgpu_ras_set_eeprom_table_version(control);</div><div class='ctx'> </div><div class='ctx'> 	if (hdr-&gt;version == RAS_TABLE_VER_V2_1) {</div><div class='ctx'> 		hdr-&gt;first_rec_offset = RAS_RECORD_START_V2_1;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h<br/>index 381101d2bf05..50fcd86e1033 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h</a></div><div class='hunk'>@@ -164,4 +164,29 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * amdgpu_res_cleared - check if blocks are cleared</div><div class='add'>+ *</div><div class='add'>+ * @cur: the cursor to extract the block</div><div class='add'>+ *</div><div class='add'>+ * Check if the @cur block is cleared</div><div class='add'>+ */</div><div class='add'>+static inline bool amdgpu_res_cleared(struct amdgpu_res_cursor *cur)</div><div class='add'>+{</div><div class='add'>+	struct drm_buddy_block *block;</div><div class='add'>+</div><div class='add'>+	switch (cur-&gt;mem_type) {</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		block = cur-&gt;node;</div><div class='add'>+</div><div class='add'>+		if (!amdgpu_vram_mgr_is_cleared(block))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c<br/>index 147100c27c2d..ea4873f6ccd1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c</a></div><div class='hunk'>@@ -21,9 +21,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/devcoredump.h&gt;</div><div class='del'>-#include &lt;generated/utsrelease.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "amdgpu_reset.h"</div><div class='ctx'> #include "aldebaran.h"</div><div class='ctx'> #include "sienna_cichlid.h"</div><div class='hunk'>@@ -161,105 +158,3 @@ void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain)</div><div class='ctx'> 	atomic_set(&amp;reset_domain-&gt;in_gpu_reset, 0);</div><div class='ctx'> 	up_write(&amp;reset_domain-&gt;sem);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_DEV_COREDUMP</div><div class='del'>-void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,</div><div class='del'>-		     struct amdgpu_reset_context *reset_context)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static ssize_t</div><div class='del'>-amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,</div><div class='del'>-			void *data, size_t datalen)</div><div class='del'>-{</div><div class='del'>-	struct drm_printer p;</div><div class='del'>-	struct amdgpu_coredump_info *coredump = data;</div><div class='del'>-	struct drm_print_iterator iter;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	iter.data = buffer;</div><div class='del'>-	iter.offset = 0;</div><div class='del'>-	iter.start = offset;</div><div class='del'>-	iter.remain = count;</div><div class='del'>-</div><div class='del'>-	p = drm_coredump_printer(&amp;iter);</div><div class='del'>-</div><div class='del'>-	drm_printf(&amp;p, "**** AMDGPU Device Coredump ****\n");</div><div class='del'>-	drm_printf(&amp;p, "version: " AMDGPU_COREDUMP_VERSION "\n");</div><div class='del'>-	drm_printf(&amp;p, "kernel: " UTS_RELEASE "\n");</div><div class='del'>-	drm_printf(&amp;p, "module: " KBUILD_MODNAME "\n");</div><div class='del'>-	drm_printf(&amp;p, "time: %lld.%09ld\n", coredump-&gt;reset_time.tv_sec,</div><div class='del'>-			coredump-&gt;reset_time.tv_nsec);</div><div class='del'>-</div><div class='del'>-	if (coredump-&gt;reset_task_info.pid)</div><div class='del'>-		drm_printf(&amp;p, "process_name: %s PID: %d\n",</div><div class='del'>-			   coredump-&gt;reset_task_info.process_name,</div><div class='del'>-			   coredump-&gt;reset_task_info.pid);</div><div class='del'>-</div><div class='del'>-	if (coredump-&gt;ring) {</div><div class='del'>-		drm_printf(&amp;p, "\nRing timed out details\n");</div><div class='del'>-		drm_printf(&amp;p, "IP Type: %d Ring Name: %s\n",</div><div class='del'>-			   coredump-&gt;ring-&gt;funcs-&gt;type,</div><div class='del'>-			   coredump-&gt;ring-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (coredump-&gt;reset_vram_lost)</div><div class='del'>-		drm_printf(&amp;p, "VRAM is lost due to GPU reset!\n");</div><div class='del'>-	if (coredump-&gt;adev-&gt;reset_info.num_regs) {</div><div class='del'>-		drm_printf(&amp;p, "AMDGPU register dumps:\nOffset:     Value:\n");</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; coredump-&gt;adev-&gt;reset_info.num_regs; i++)</div><div class='del'>-			drm_printf(&amp;p, "0x%08x: 0x%08x\n",</div><div class='del'>-				   coredump-&gt;adev-&gt;reset_info.reset_dump_reg_list[i],</div><div class='del'>-				   coredump-&gt;adev-&gt;reset_info.reset_dump_reg_value[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return count - iter.remain;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void amdgpu_devcoredump_free(void *data)</div><div class='del'>-{</div><div class='del'>-	kfree(data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,</div><div class='del'>-		     struct amdgpu_reset_context *reset_context)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_coredump_info *coredump;</div><div class='del'>-	struct drm_device *dev = adev_to_drm(adev);</div><div class='del'>-	struct amdgpu_job *job = reset_context-&gt;job;</div><div class='del'>-	struct drm_sched_job *s_job;</div><div class='del'>-</div><div class='del'>-	coredump = kzalloc(sizeof(*coredump), GFP_NOWAIT);</div><div class='del'>-</div><div class='del'>-	if (!coredump) {</div><div class='del'>-		DRM_ERROR("%s: failed to allocate memory for coredump\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	coredump-&gt;reset_vram_lost = vram_lost;</div><div class='del'>-</div><div class='del'>-	if (reset_context-&gt;job &amp;&amp; reset_context-&gt;job-&gt;vm) {</div><div class='del'>-		struct amdgpu_task_info *ti;</div><div class='del'>-		struct amdgpu_vm *vm = reset_context-&gt;job-&gt;vm;</div><div class='del'>-</div><div class='del'>-		ti = amdgpu_vm_get_task_info_vm(vm);</div><div class='del'>-		if (ti) {</div><div class='del'>-			coredump-&gt;reset_task_info = *ti;</div><div class='del'>-			amdgpu_vm_put_task_info(ti);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (job) {</div><div class='del'>-		s_job = &amp;job-&gt;base;</div><div class='del'>-		coredump-&gt;ring = to_amdgpu_ring(s_job-&gt;sched);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	coredump-&gt;adev = adev;</div><div class='del'>-</div><div class='del'>-	ktime_get_ts64(&amp;coredump-&gt;reset_time);</div><div class='del'>-</div><div class='del'>-	dev_coredumpm(dev-&gt;dev, THIS_MODULE, coredump, 0, GFP_NOWAIT,</div><div class='del'>-		      amdgpu_devcoredump_read, amdgpu_devcoredump_free);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h<br/>index 60522963aaca..b11d190ece53 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h</a></div><div class='hunk'>@@ -32,6 +32,7 @@ enum AMDGPU_RESET_FLAGS {</div><div class='ctx'> </div><div class='ctx'> 	AMDGPU_NEED_FULL_RESET = 0,</div><div class='ctx'> 	AMDGPU_SKIP_HW_RESET = 1,</div><div class='add'>+	AMDGPU_SKIP_COREDUMP = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_reset_context {</div><div class='hunk'>@@ -88,19 +89,6 @@ struct amdgpu_reset_domain {</div><div class='ctx'> 	atomic_t reset_res;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DEV_COREDUMP</div><div class='del'>-</div><div class='del'>-#define AMDGPU_COREDUMP_VERSION "1"</div><div class='del'>-</div><div class='del'>-struct amdgpu_coredump_info {</div><div class='del'>-	struct amdgpu_device		*adev;</div><div class='del'>-	struct amdgpu_task_info         reset_task_info;</div><div class='del'>-	struct timespec64               reset_time;</div><div class='del'>-	bool                            reset_vram_lost;</div><div class='del'>-	struct amdgpu_ring			*ring;</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> int amdgpu_reset_init(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_reset_fini(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='hunk'>@@ -141,9 +129,6 @@ void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain);</div><div class='ctx'> </div><div class='ctx'> void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain);</div><div class='ctx'> </div><div class='del'>-void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,</div><div class='del'>-		     struct amdgpu_reset_context *reset_context);</div><div class='del'>-</div><div class='ctx'> #define for_each_handler(i, handler, reset_ctl)                  \</div><div class='ctx'> 	for (i = 0; (i &lt; AMDGPU_RESET_MAX_HANDLERS) &amp;&amp;           \</div><div class='ctx'> 		    (handler = (*reset_ctl-&gt;reset_handlers)[i]); \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h<br/>index 173a2a308078..b51a82e711df 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h</a></div><div class='hunk'>@@ -132,7 +132,7 @@ struct amdgpu_buffer_funcs {</div><div class='ctx'> 				 uint64_t dst_offset,</div><div class='ctx'> 				 /* number of byte to transfer */</div><div class='ctx'> 				 uint32_t byte_count,</div><div class='del'>-				 bool tmz);</div><div class='add'>+				 uint32_t copy_flags);</div><div class='ctx'> </div><div class='ctx'> 	/* maximum bytes in a single operation */</div><div class='ctx'> 	uint32_t	fill_max_bytes;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h<br/>index ff4435181055..ec9d12f85f39 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ struct amdgpu_smuio_funcs {</div><div class='ctx'> 	u32 (*get_socket_id)(struct amdgpu_device *adev);</div><div class='ctx'> 	enum amdgpu_pkg_type (*get_pkg_type)(struct amdgpu_device *adev);</div><div class='ctx'> 	bool (*is_host_gpu_xgmi_supported)(struct amdgpu_device *adev);</div><div class='add'>+	u64 (*get_gpu_clock_counter)(struct amdgpu_device *adev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_smuio {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c<br/>index 1d71729e3f6b..e785f128411d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a></div><div class='hunk'>@@ -236,7 +236,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo,</div><div class='ctx'> 	dst_addr = amdgpu_bo_gpu_offset(adev-&gt;gart.bo);</div><div class='ctx'> 	dst_addr += window * AMDGPU_GTT_MAX_TRANSFER_SIZE * 8;</div><div class='ctx'> 	amdgpu_emit_copy_buffer(adev, &amp;job-&gt;ibs[0], src_addr,</div><div class='del'>-				dst_addr, num_bytes, false);</div><div class='add'>+				dst_addr, num_bytes, 0);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_ring_pad_ib(ring, &amp;job-&gt;ibs[0]);</div><div class='ctx'> 	WARN_ON(job-&gt;ibs[0].length_dw &gt; num_dw);</div><div class='hunk'>@@ -296,6 +296,8 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,</div><div class='ctx'> 	struct dma_fence *fence = NULL;</div><div class='ctx'> 	int r = 0;</div><div class='ctx'> </div><div class='add'>+	uint32_t copy_flags = 0;</div><div class='add'>+</div><div class='ctx'> 	if (!adev-&gt;mman.buffer_funcs_enabled) {</div><div class='ctx'> 		DRM_ERROR("Trying to move memory with ring turned off.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -323,8 +325,11 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			goto error;</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_copy_buffer(ring, from, to, cur_size,</div><div class='del'>-				       resv, &amp;next, false, true, tmz);</div><div class='add'>+		if (tmz)</div><div class='add'>+			copy_flags |= AMDGPU_COPY_FLAGS_TMZ;</div><div class='add'>+</div><div class='add'>+		r = amdgpu_copy_buffer(ring, from, to, cur_size, resv,</div><div class='add'>+				       &amp;next, false, true, copy_flags);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			goto error;</div><div class='ctx'> </div><div class='hunk'>@@ -378,11 +383,12 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,</div><div class='ctx'> 	    (abo-&gt;flags &amp; AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {</div><div class='ctx'> 		struct dma_fence *wipe_fence = NULL;</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_fill_buffer(abo, AMDGPU_POISON, NULL, &amp;wipe_fence,</div><div class='del'>-					false);</div><div class='add'>+		r = amdgpu_fill_buffer(abo, 0, NULL, &amp;wipe_fence,</div><div class='add'>+				       false);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		} else if (wipe_fence) {</div><div class='add'>+			amdgpu_vram_mgr_set_cleared(bo-&gt;resource);</div><div class='ctx'> 			dma_fence_put(fence);</div><div class='ctx'> 			fence = wipe_fence;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -419,7 +425,7 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (res-&gt;mem_type == TTM_PL_SYSTEM || res-&gt;mem_type == TTM_PL_TT ||</div><div class='del'>-	    res-&gt;mem_type == AMDGPU_PL_PREEMPT)</div><div class='add'>+	    res-&gt;mem_type == AMDGPU_PL_PREEMPT || res-&gt;mem_type == AMDGPU_PL_DOORBELL)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	if (res-&gt;mem_type != TTM_PL_VRAM)</div><div class='hunk'>@@ -427,7 +433,7 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_res_first(res, 0, res-&gt;size, &amp;cursor);</div><div class='ctx'> 	while (cursor.remaining) {</div><div class='del'>-		if ((cursor.start + cursor.size) &gt;= adev-&gt;gmc.visible_vram_size)</div><div class='add'>+		if ((cursor.start + cursor.size) &gt; adev-&gt;gmc.visible_vram_size)</div><div class='ctx'> 			return false;</div><div class='ctx'> 		amdgpu_res_next(&amp;cursor, cursor.size);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -481,14 +487,16 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,</div><div class='ctx'> </div><div class='ctx'> 	if (!old_mem || (old_mem-&gt;mem_type == TTM_PL_SYSTEM &amp;&amp;</div><div class='ctx'> 			 bo-&gt;ttm == NULL)) {</div><div class='add'>+		amdgpu_bo_move_notify(bo, evict, new_mem);</div><div class='ctx'> 		ttm_bo_move_null(bo, new_mem);</div><div class='del'>-		goto out;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (old_mem-&gt;mem_type == TTM_PL_SYSTEM &amp;&amp;</div><div class='ctx'> 	    (new_mem-&gt;mem_type == TTM_PL_TT ||</div><div class='ctx'> 	     new_mem-&gt;mem_type == AMDGPU_PL_PREEMPT)) {</div><div class='add'>+		amdgpu_bo_move_notify(bo, evict, new_mem);</div><div class='ctx'> 		ttm_bo_move_null(bo, new_mem);</div><div class='del'>-		goto out;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((old_mem-&gt;mem_type == TTM_PL_TT ||</div><div class='ctx'> 	     old_mem-&gt;mem_type == AMDGPU_PL_PREEMPT) &amp;&amp;</div><div class='hunk'>@@ -498,9 +506,10 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,</div><div class='ctx'> 			return r;</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_ttm_backend_unbind(bo-&gt;bdev, bo-&gt;ttm);</div><div class='add'>+		amdgpu_bo_move_notify(bo, evict, new_mem);</div><div class='ctx'> 		ttm_resource_free(bo, &amp;bo-&gt;resource);</div><div class='ctx'> 		ttm_bo_assign_mem(bo, new_mem);</div><div class='del'>-		goto out;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (old_mem-&gt;mem_type == AMDGPU_PL_GDS ||</div><div class='hunk'>@@ -512,8 +521,9 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,</div><div class='ctx'> 	    new_mem-&gt;mem_type == AMDGPU_PL_OA ||</div><div class='ctx'> 	    new_mem-&gt;mem_type == AMDGPU_PL_DOORBELL) {</div><div class='ctx'> 		/* Nothing to save here */</div><div class='add'>+		amdgpu_bo_move_notify(bo, evict, new_mem);</div><div class='ctx'> 		ttm_bo_move_null(bo, new_mem);</div><div class='del'>-		goto out;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (bo-&gt;type == ttm_bo_type_device &amp;&amp;</div><div class='hunk'>@@ -525,22 +535,23 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,</div><div class='ctx'> 		abo-&gt;flags &amp;= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;mman.buffer_funcs_enabled) {</div><div class='del'>-		if (((old_mem-&gt;mem_type == TTM_PL_SYSTEM &amp;&amp;</div><div class='del'>-		      new_mem-&gt;mem_type == TTM_PL_VRAM) ||</div><div class='del'>-		     (old_mem-&gt;mem_type == TTM_PL_VRAM &amp;&amp;</div><div class='del'>-		      new_mem-&gt;mem_type == TTM_PL_SYSTEM))) {</div><div class='del'>-			hop-&gt;fpfn = 0;</div><div class='del'>-			hop-&gt;lpfn = 0;</div><div class='del'>-			hop-&gt;mem_type = TTM_PL_TT;</div><div class='del'>-			hop-&gt;flags = TTM_PL_FLAG_TEMPORARY;</div><div class='del'>-			return -EMULTIHOP;</div><div class='del'>-		}</div><div class='add'>+	if (adev-&gt;mman.buffer_funcs_enabled &amp;&amp;</div><div class='add'>+	    ((old_mem-&gt;mem_type == TTM_PL_SYSTEM &amp;&amp;</div><div class='add'>+	      new_mem-&gt;mem_type == TTM_PL_VRAM) ||</div><div class='add'>+	     (old_mem-&gt;mem_type == TTM_PL_VRAM &amp;&amp;</div><div class='add'>+	      new_mem-&gt;mem_type == TTM_PL_SYSTEM))) {</div><div class='add'>+		hop-&gt;fpfn = 0;</div><div class='add'>+		hop-&gt;lpfn = 0;</div><div class='add'>+		hop-&gt;mem_type = TTM_PL_TT;</div><div class='add'>+		hop-&gt;flags = TTM_PL_FLAG_TEMPORARY;</div><div class='add'>+		return -EMULTIHOP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	amdgpu_bo_move_notify(bo, evict, new_mem);</div><div class='add'>+	if (adev-&gt;mman.buffer_funcs_enabled)</div><div class='ctx'> 		r = amdgpu_move_blit(bo, evict, new_mem, old_mem);</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		r = -ENODEV;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		/* Check that all memory is CPU accessible */</div><div class='hunk'>@@ -555,11 +566,10 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	trace_amdgpu_bo_move(abo, new_mem-&gt;mem_type, old_mem-&gt;mem_type);</div><div class='del'>-out:</div><div class='del'>-	/* update statistics */</div><div class='add'>+	/* update statistics after the move */</div><div class='add'>+	if (evict)</div><div class='add'>+		atomic64_inc(&amp;adev-&gt;num_evictions);</div><div class='ctx'> 	atomic64_add(bo-&gt;base.size, &amp;adev-&gt;num_bytes_moved);</div><div class='del'>-	amdgpu_bo_move_notify(bo, evict);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1488,7 +1498,7 @@ static int amdgpu_ttm_access_memory_sdma(struct ttm_buffer_object *bo,</div><div class='ctx'> 		swap(src_addr, dst_addr);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_emit_copy_buffer(adev, &amp;job-&gt;ibs[0], src_addr, dst_addr,</div><div class='del'>-				PAGE_SIZE, false);</div><div class='add'>+				PAGE_SIZE, 0);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_ring_pad_ib(adev-&gt;mman.buffer_funcs_ring, &amp;job-&gt;ibs[0]);</div><div class='ctx'> 	WARN_ON(job-&gt;ibs[0].length_dw &gt; num_dw);</div><div class='hunk'>@@ -1559,7 +1569,7 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo,</div><div class='ctx'> static void</div><div class='ctx'> amdgpu_bo_delete_mem_notify(struct ttm_buffer_object *bo)</div><div class='ctx'> {</div><div class='del'>-	amdgpu_bo_move_notify(bo, false);</div><div class='add'>+	amdgpu_bo_move_notify(bo, false, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct ttm_device_funcs amdgpu_bo_driver = {</div><div class='hunk'>@@ -2139,7 +2149,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,</div><div class='ctx'> 		       uint64_t dst_offset, uint32_t byte_count,</div><div class='ctx'> 		       struct dma_resv *resv,</div><div class='ctx'> 		       struct dma_fence **fence, bool direct_submit,</div><div class='del'>-		       bool vm_needs_flush, bool tmz)</div><div class='add'>+		       bool vm_needs_flush, uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	unsigned int num_loops, num_dw;</div><div class='hunk'>@@ -2165,8 +2175,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,</div><div class='ctx'> 		uint32_t cur_size_in_bytes = min(byte_count, max_bytes);</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_emit_copy_buffer(adev, &amp;job-&gt;ibs[0], src_offset,</div><div class='del'>-					dst_offset, cur_size_in_bytes, tmz);</div><div class='del'>-</div><div class='add'>+					dst_offset, cur_size_in_bytes, copy_flags);</div><div class='ctx'> 		src_offset += cur_size_in_bytes;</div><div class='ctx'> 		dst_offset += cur_size_in_bytes;</div><div class='ctx'> 		byte_count -= cur_size_in_bytes;</div><div class='hunk'>@@ -2226,6 +2235,71 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_ring *ring, uint32_t src_data,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * amdgpu_ttm_clear_buffer - clear memory buffers</div><div class='add'>+ * @bo: amdgpu buffer object</div><div class='add'>+ * @resv: reservation object</div><div class='add'>+ * @fence: dma_fence associated with the operation</div><div class='add'>+ *</div><div class='add'>+ * Clear the memory buffer resource.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * 0 for success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,</div><div class='add'>+			    struct dma_resv *resv,</div><div class='add'>+			    struct dma_fence **fence)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = amdgpu_ttm_adev(bo-&gt;tbo.bdev);</div><div class='add'>+	struct amdgpu_ring *ring = adev-&gt;mman.buffer_funcs_ring;</div><div class='add'>+	struct amdgpu_res_cursor cursor;</div><div class='add'>+	u64 addr;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (!adev-&gt;mman.buffer_funcs_enabled)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!fence)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*fence = dma_fence_get_stub();</div><div class='add'>+</div><div class='add'>+	amdgpu_res_first(bo-&gt;tbo.resource, 0, amdgpu_bo_size(bo), &amp;cursor);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;mman.gtt_window_lock);</div><div class='add'>+	while (cursor.remaining) {</div><div class='add'>+		struct dma_fence *next = NULL;</div><div class='add'>+		u64 size;</div><div class='add'>+</div><div class='add'>+		if (amdgpu_res_cleared(&amp;cursor)) {</div><div class='add'>+			amdgpu_res_next(&amp;cursor, cursor.size);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Never clear more than 256MiB at once to avoid timeouts */</div><div class='add'>+		size = min(cursor.size, 256ULL &lt;&lt; 20);</div><div class='add'>+</div><div class='add'>+		r = amdgpu_ttm_map_buffer(&amp;bo-&gt;tbo, bo-&gt;tbo.resource, &amp;cursor,</div><div class='add'>+					  1, ring, false, &amp;size, &amp;addr);</div><div class='add'>+		if (r)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		r = amdgpu_ttm_fill_mem(ring, 0, addr, size, resv,</div><div class='add'>+					&amp;next, true, true);</div><div class='add'>+		if (r)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		dma_fence_put(*fence);</div><div class='add'>+		*fence = next;</div><div class='add'>+</div><div class='add'>+		amdgpu_res_next(&amp;cursor, size);</div><div class='add'>+	}</div><div class='add'>+err:</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;mman.gtt_window_lock);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_fill_buffer(struct amdgpu_bo *bo,</div><div class='ctx'> 			uint32_t src_data,</div><div class='ctx'> 			struct dma_resv *resv,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h<br/>index 32cf6b6f6efd..b6f53129dea3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h</a></div><div class='hunk'>@@ -38,8 +38,6 @@</div><div class='ctx'> #define AMDGPU_GTT_MAX_TRANSFER_SIZE	512</div><div class='ctx'> #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2</div><div class='ctx'> </div><div class='del'>-#define AMDGPU_POISON	0xd0bed0be</div><div class='del'>-</div><div class='ctx'> extern const struct attribute_group amdgpu_vram_mgr_attr_group;</div><div class='ctx'> extern const struct attribute_group amdgpu_gtt_mgr_attr_group;</div><div class='ctx'> </div><div class='hunk'>@@ -111,6 +109,8 @@ struct amdgpu_copy_mem {</div><div class='ctx'> 	unsigned long			offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define AMDGPU_COPY_FLAGS_TMZ		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);</div><div class='ctx'> void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);</div><div class='hunk'>@@ -151,13 +151,16 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,</div><div class='ctx'> 		       uint64_t dst_offset, uint32_t byte_count,</div><div class='ctx'> 		       struct dma_resv *resv,</div><div class='ctx'> 		       struct dma_fence **fence, bool direct_submit,</div><div class='del'>-		       bool vm_needs_flush, bool tmz);</div><div class='add'>+		       bool vm_needs_flush, uint32_t copy_flags);</div><div class='ctx'> int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,</div><div class='ctx'> 			       const struct amdgpu_copy_mem *src,</div><div class='ctx'> 			       const struct amdgpu_copy_mem *dst,</div><div class='ctx'> 			       uint64_t size, bool tmz,</div><div class='ctx'> 			       struct dma_resv *resv,</div><div class='ctx'> 			       struct dma_fence **f);</div><div class='add'>+int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,</div><div class='add'>+			    struct dma_resv *resv,</div><div class='add'>+			    struct dma_fence **fence);</div><div class='ctx'> int amdgpu_fill_buffer(struct amdgpu_bo *bo,</div><div class='ctx'> 			uint32_t src_data,</div><div class='ctx'> 			struct dma_resv *resv,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h<br/>index 619445760037..105d4de0613a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a></div><div class='hunk'>@@ -125,6 +125,7 @@ enum psp_fw_type {</div><div class='ctx'> 	PSP_FW_TYPE_PSP_INTF_DRV,</div><div class='ctx'> 	PSP_FW_TYPE_PSP_DBG_DRV,</div><div class='ctx'> 	PSP_FW_TYPE_PSP_RAS_DRV,</div><div class='add'>+	PSP_FW_TYPE_PSP_IPKEYMGR_DRV,</div><div class='ctx'> 	PSP_FW_TYPE_MAX_INDEX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c<br/>index 20436f81856a..540e0f066b26 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c</a></div><div class='hunk'>@@ -21,10 +21,13 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/sort.h&gt;</div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "umc_v6_7.h"</div><div class='ctx'> #define MAX_UMC_POISON_POLLING_TIME_SYNC   20  //ms</div><div class='ctx'> </div><div class='add'>+#define MAX_UMC_HASH_STRING_SIZE  256</div><div class='add'>+</div><div class='ctx'> static int amdgpu_umc_convert_error_address(struct amdgpu_device *adev,</div><div class='ctx'> 				    struct ras_err_data *err_data, uint64_t err_addr,</div><div class='ctx'> 				    uint32_t ch_inst, uint32_t umc_inst)</div><div class='hunk'>@@ -63,6 +66,8 @@ int amdgpu_umc_page_retirement_mca(struct amdgpu_device *adev,</div><div class='ctx'> 		goto out_fini_err_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err_data.err_addr_len = adev-&gt;umc.max_ras_err_cnt_per_query;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Translate UMC channel address to Physical address</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -86,7 +91,7 @@ out_fini_err_data:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='add'>+void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 			void *ras_error_status)</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;</div><div class='hunk'>@@ -118,6 +123,8 @@ static void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 			if(!err_data-&gt;err_addr)</div><div class='ctx'> 				dev_warn(adev-&gt;dev, "Failed to alloc memory for "</div><div class='ctx'> 						"umc error address record!\n");</div><div class='add'>+			else</div><div class='add'>+				err_data-&gt;err_addr_len = adev-&gt;umc.max_ras_err_cnt_per_query;</div><div class='ctx'> </div><div class='ctx'> 			/* umc query_ras_error_address is also responsible for clearing</div><div class='ctx'> 			 * error status</div><div class='hunk'>@@ -143,6 +150,8 @@ static void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 			if(!err_data-&gt;err_addr)</div><div class='ctx'> 				dev_warn(adev-&gt;dev, "Failed to alloc memory for "</div><div class='ctx'> 						"umc error address record!\n");</div><div class='add'>+			else</div><div class='add'>+				err_data-&gt;err_addr_len = adev-&gt;umc.max_ras_err_cnt_per_query;</div><div class='ctx'> </div><div class='ctx'> 			/* umc query_ras_error_address is also responsible for clearing</div><div class='ctx'> 			 * error status</div><div class='hunk'>@@ -170,6 +179,7 @@ static void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(err_data-&gt;err_addr);</div><div class='add'>+	err_data-&gt;err_addr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;con-&gt;page_retirement_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -177,7 +187,7 @@ static void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> static int amdgpu_umc_do_page_retirement(struct amdgpu_device *adev,</div><div class='ctx'> 		void *ras_error_status,</div><div class='ctx'> 		struct amdgpu_iv_entry *entry,</div><div class='del'>-		bool reset)</div><div class='add'>+		uint32_t reset)</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;</div><div class='ctx'> 	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='hunk'>@@ -186,9 +196,7 @@ static int amdgpu_umc_do_page_retirement(struct amdgpu_device *adev,</div><div class='ctx'> 	amdgpu_umc_handle_bad_pages(adev, ras_error_status);</div><div class='ctx'> </div><div class='ctx'> 	if (err_data-&gt;ue_count &amp;&amp; reset) {</div><div class='del'>-		/* use mode-2 reset for poison consumption */</div><div class='del'>-		if (!entry)</div><div class='del'>-			con-&gt;gpu_reset_flags |= AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='add'>+		con-&gt;gpu_reset_flags |= reset;</div><div class='ctx'> 		amdgpu_ras_reset_gpu(adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +204,7 @@ static int amdgpu_umc_do_page_retirement(struct amdgpu_device *adev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_umc_bad_page_polling_timeout(struct amdgpu_device *adev,</div><div class='del'>-			bool reset, uint32_t timeout_ms)</div><div class='add'>+			uint32_t reset, uint32_t timeout_ms)</div><div class='ctx'> {</div><div class='ctx'> 	struct ras_err_data err_data;</div><div class='ctx'> 	struct ras_common_if head = {</div><div class='hunk'>@@ -238,16 +246,16 @@ int amdgpu_umc_bad_page_polling_timeout(struct amdgpu_device *adev,</div><div class='ctx'> 	if (reset) {</div><div class='ctx'> 		struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='ctx'> </div><div class='del'>-		/* use mode-2 reset for poison consumption */</div><div class='del'>-		con-&gt;gpu_reset_flags |= AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='add'>+		con-&gt;gpu_reset_flags |= reset;</div><div class='ctx'> 		amdgpu_ras_reset_gpu(adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int amdgpu_umc_poison_handler(struct amdgpu_device *adev,</div><div class='del'>-			enum amdgpu_ras_block block, bool reset)</div><div class='add'>+int amdgpu_umc_pasid_poison_handler(struct amdgpu_device *adev,</div><div class='add'>+			enum amdgpu_ras_block block, uint16_t pasid,</div><div class='add'>+			pasid_notify pasid_fn, void *data, uint32_t reset)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = AMDGPU_RAS_SUCCESS;</div><div class='ctx'> </div><div class='hunk'>@@ -285,16 +293,14 @@ int amdgpu_umc_poison_handler(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 			amdgpu_ras_error_data_fini(&amp;err_data);</div><div class='ctx'> 		} else {</div><div class='del'>-			if (reset) {</div><div class='del'>-				amdgpu_umc_bad_page_polling_timeout(adev,</div><div class='del'>-							reset, MAX_UMC_POISON_POLLING_TIME_SYNC);</div><div class='del'>-			} else {</div><div class='ctx'> 				struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='ctx'> </div><div class='add'>+				amdgpu_ras_put_poison_req(adev,</div><div class='add'>+					block, pasid, pasid_fn, data, reset);</div><div class='add'>+</div><div class='ctx'> 				atomic_inc(&amp;con-&gt;page_retirement_req_cnt);</div><div class='ctx'> </div><div class='ctx'> 				wake_up(&amp;con-&gt;page_retirement_wq);</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (adev-&gt;virt.ops &amp;&amp; adev-&gt;virt.ops-&gt;ras_poison_handler)</div><div class='hunk'>@@ -307,11 +313,19 @@ int amdgpu_umc_poison_handler(struct amdgpu_device *adev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amdgpu_umc_poison_handler(struct amdgpu_device *adev,</div><div class='add'>+			enum amdgpu_ras_block block, uint32_t reset)</div><div class='add'>+{</div><div class='add'>+	return amdgpu_umc_pasid_poison_handler(adev,</div><div class='add'>+				block, 0, NULL, NULL, reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,</div><div class='ctx'> 		void *ras_error_status,</div><div class='ctx'> 		struct amdgpu_iv_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	return amdgpu_umc_do_page_retirement(adev, ras_error_status, entry, true);</div><div class='add'>+	return amdgpu_umc_do_page_retirement(adev, ras_error_status, entry,</div><div class='add'>+				AMDGPU_RAS_GPU_RESET_MODE1_RESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_umc_ras_sw_init(struct amdgpu_device *adev)</div><div class='hunk'>@@ -388,14 +402,20 @@ int amdgpu_umc_process_ecc_irq(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void amdgpu_umc_fill_error_record(struct ras_err_data *err_data,</div><div class='add'>+int amdgpu_umc_fill_error_record(struct ras_err_data *err_data,</div><div class='ctx'> 		uint64_t err_addr,</div><div class='ctx'> 		uint64_t retired_page,</div><div class='ctx'> 		uint32_t channel_index,</div><div class='ctx'> 		uint32_t umc_inst)</div><div class='ctx'> {</div><div class='del'>-	struct eeprom_table_record *err_rec =</div><div class='del'>-		&amp;err_data-&gt;err_addr[err_data-&gt;err_addr_cnt];</div><div class='add'>+	struct eeprom_table_record *err_rec;</div><div class='add'>+</div><div class='add'>+	if (!err_data ||</div><div class='add'>+	    !err_data-&gt;err_addr ||</div><div class='add'>+	    (err_data-&gt;err_addr_cnt &gt;= err_data-&gt;err_addr_len))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err_rec = &amp;err_data-&gt;err_addr[err_data-&gt;err_addr_cnt];</div><div class='ctx'> </div><div class='ctx'> 	err_rec-&gt;address = err_addr;</div><div class='ctx'> 	/* page frame address is saved */</div><div class='hunk'>@@ -407,6 +427,8 @@ void amdgpu_umc_fill_error_record(struct ras_err_data *err_data,</div><div class='ctx'> 	err_rec-&gt;mcumc_id = umc_inst;</div><div class='ctx'> </div><div class='ctx'> 	err_data-&gt;err_addr_cnt++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_umc_loop_channels(struct amdgpu_device *adev,</div><div class='hunk'>@@ -439,3 +461,76 @@ int amdgpu_umc_loop_channels(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int amdgpu_umc_update_ecc_status(struct amdgpu_device *adev,</div><div class='add'>+				uint64_t status, uint64_t ipid, uint64_t addr)</div><div class='add'>+{</div><div class='add'>+	if (adev-&gt;umc.ras-&gt;update_ecc_status)</div><div class='add'>+		return adev-&gt;umc.ras-&gt;update_ecc_status(adev,</div><div class='add'>+					status, ipid, addr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_umc_uint64_cmp(const void *a, const void *b)</div><div class='add'>+{</div><div class='add'>+	uint64_t *addr_a = (uint64_t *)a;</div><div class='add'>+	uint64_t *addr_b = (uint64_t *)b;</div><div class='add'>+</div><div class='add'>+	if (*addr_a &gt; *addr_b)</div><div class='add'>+		return 1;</div><div class='add'>+	else if (*addr_a &lt; *addr_b)</div><div class='add'>+		return -1;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Use string hash to avoid logging the same bad pages repeatedly */</div><div class='add'>+int amdgpu_umc_build_pages_hash(struct amdgpu_device *adev,</div><div class='add'>+		uint64_t *pfns, int len, uint64_t *val)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	char buf[MAX_UMC_HASH_STRING_SIZE] = {0};</div><div class='add'>+	int offset = 0, i = 0;</div><div class='add'>+	uint64_t hash_val;</div><div class='add'>+</div><div class='add'>+	if (!pfns || !len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	sort(pfns, len, sizeof(uint64_t), amdgpu_umc_uint64_cmp, NULL);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++)</div><div class='add'>+		offset += snprintf(&amp;buf[offset], sizeof(buf) - offset, "%llx", pfns[i]);</div><div class='add'>+</div><div class='add'>+	hash_val = siphash(buf, offset, &amp;con-&gt;umc_ecc_log.ecc_key);</div><div class='add'>+</div><div class='add'>+	*val = hash_val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev,</div><div class='add'>+		struct radix_tree_root *ecc_tree, struct ras_ecc_err *ecc_err)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	struct ras_ecc_log_info *ecc_log;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ecc_log = &amp;con-&gt;umc_ecc_log;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ecc_log-&gt;lock);</div><div class='add'>+	ret = radix_tree_insert(ecc_tree, ecc_err-&gt;hash_index, ecc_err);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		struct ras_err_pages *err_pages = &amp;ecc_err-&gt;err_pages;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		/* Reserve memory */</div><div class='add'>+		for (i = 0; i &lt; err_pages-&gt;count; i++)</div><div class='add'>+			amdgpu_ras_reserve_page(adev, err_pages-&gt;pfn[i]);</div><div class='add'>+</div><div class='add'>+		radix_tree_tag_set(ecc_tree,</div><div class='add'>+			ecc_err-&gt;hash_index, UMC_ECC_NEW_DETECTED_TAG);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ecc_log-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h<br/>index 26d2ae498daf..5f50c69c3cec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h</a></div><div class='hunk'>@@ -52,6 +52,8 @@</div><div class='ctx'> #define LOOP_UMC_EACH_NODE_INST_AND_CH(node_inst, umc_inst, ch_inst) \</div><div class='ctx'> 		LOOP_UMC_NODE_INST((node_inst)) LOOP_UMC_INST_AND_CH((umc_inst), (ch_inst))</div><div class='ctx'> </div><div class='add'>+/* Page retirement tag */</div><div class='add'>+#define UMC_ECC_NEW_DETECTED_TAG       0x1</div><div class='ctx'> </div><div class='ctx'> typedef int (*umc_func)(struct amdgpu_device *adev, uint32_t node_inst,</div><div class='ctx'> 			uint32_t umc_inst, uint32_t ch_inst, void *data);</div><div class='hunk'>@@ -66,8 +68,8 @@ struct amdgpu_umc_ras {</div><div class='ctx'> 					void *ras_error_status);</div><div class='ctx'> 	bool (*check_ecc_err_status)(struct amdgpu_device *adev,</div><div class='ctx'> 			enum amdgpu_mca_error_type type, void *ras_error_status);</div><div class='del'>-	/* support different eeprom table version for different asic */</div><div class='del'>-	void (*set_eeprom_table_version)(struct amdgpu_ras_eeprom_table_header *hdr);</div><div class='add'>+	int (*update_ecc_status)(struct amdgpu_device *adev,</div><div class='add'>+			uint64_t status, uint64_t ipid, uint64_t addr);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_umc_funcs {</div><div class='hunk'>@@ -103,11 +105,14 @@ struct amdgpu_umc {</div><div class='ctx'> int amdgpu_umc_ras_sw_init(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);</div><div class='ctx'> int amdgpu_umc_poison_handler(struct amdgpu_device *adev,</div><div class='del'>-			enum amdgpu_ras_block block, bool reset);</div><div class='add'>+			enum amdgpu_ras_block block, uint32_t reset);</div><div class='add'>+int amdgpu_umc_pasid_poison_handler(struct amdgpu_device *adev,</div><div class='add'>+			enum amdgpu_ras_block block, uint16_t pasid,</div><div class='add'>+			pasid_notify pasid_fn, void *data, uint32_t reset);</div><div class='ctx'> int amdgpu_umc_process_ecc_irq(struct amdgpu_device *adev,</div><div class='ctx'> 		struct amdgpu_irq_src *source,</div><div class='ctx'> 		struct amdgpu_iv_entry *entry);</div><div class='del'>-void amdgpu_umc_fill_error_record(struct ras_err_data *err_data,</div><div class='add'>+int amdgpu_umc_fill_error_record(struct ras_err_data *err_data,</div><div class='ctx'> 		uint64_t err_addr,</div><div class='ctx'> 		uint64_t retired_page,</div><div class='ctx'> 		uint32_t channel_index,</div><div class='hunk'>@@ -123,5 +128,15 @@ int amdgpu_umc_loop_channels(struct amdgpu_device *adev,</div><div class='ctx'> 			umc_func func, void *data);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_umc_bad_page_polling_timeout(struct amdgpu_device *adev,</div><div class='del'>-			bool reset, uint32_t timeout_ms);</div><div class='add'>+			uint32_t reset, uint32_t timeout_ms);</div><div class='add'>+</div><div class='add'>+int amdgpu_umc_update_ecc_status(struct amdgpu_device *adev,</div><div class='add'>+				uint64_t status, uint64_t ipid, uint64_t addr);</div><div class='add'>+int amdgpu_umc_build_pages_hash(struct amdgpu_device *adev,</div><div class='add'>+		uint64_t *pfns, int len, uint64_t *val);</div><div class='add'>+int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev,</div><div class='add'>+		struct radix_tree_root *ecc_tree, struct ras_ecc_err *ecc_err);</div><div class='add'>+</div><div class='add'>+void amdgpu_umc_handle_bad_pages(struct amdgpu_device *adev,</div><div class='add'>+			void *ras_error_status);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c<br/>index 0df97c3e3a70..e01c1c8e64c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c</a></div><div class='hunk'>@@ -774,6 +774,9 @@ static int umsch_mm_late_init(void *handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_in_reset(adev) || adev-&gt;in_s0ix || adev-&gt;in_suspend)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	return umsch_mm_test(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -875,6 +878,8 @@ static const struct amd_ip_funcs umsch_mm_v4_0_ip_funcs = {</div><div class='ctx'> 	.hw_fini = umsch_mm_hw_fini,</div><div class='ctx'> 	.suspend = umsch_mm_suspend,</div><div class='ctx'> 	.resume = umsch_mm_resume,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version umsch_mm_v4_0_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c<br/>index 59acf424a078..968ca2c84ef7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c</a></div><div class='hunk'>@@ -743,7 +743,8 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p,</div><div class='ctx'> 	uint32_t created = 0;</div><div class='ctx'> 	uint32_t allocated = 0;</div><div class='ctx'> 	uint32_t tmp, handle = 0;</div><div class='del'>-	uint32_t *size = &amp;tmp;</div><div class='add'>+	uint32_t dummy = 0xffffffff;</div><div class='add'>+	uint32_t *size = &amp;dummy;</div><div class='ctx'> 	unsigned int idx;</div><div class='ctx'> 	int i, r = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br/>index 9c514a606a2f..677eb141554e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c</a></div><div class='hunk'>@@ -93,7 +93,7 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_vcn_early_init(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	char ucode_prefix[30];</div><div class='add'>+	char ucode_prefix[25];</div><div class='ctx'> 	char fw_name[40];</div><div class='ctx'> 	int r, i;</div><div class='ctx'> </div><div class='hunk'>@@ -185,7 +185,10 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	if (adev-&gt;firmware.load_type != AMDGPU_FW_LOAD_PSP)</div><div class='ctx'> 		bo_size += AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr-&gt;ucode_size_bytes) + 8);</div><div class='ctx'> </div><div class='del'>-	if (amdgpu_ip_version(adev, UVD_HWIP, 0) &gt;= IP_VERSION(4, 0, 0)) {</div><div class='add'>+	if (amdgpu_ip_version(adev, UVD_HWIP, 0) &gt;= IP_VERSION(5, 0, 0)) {</div><div class='add'>+		fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn5_fw_shared));</div><div class='add'>+		log_offset = offsetof(struct amdgpu_vcn5_fw_shared, fw_log);</div><div class='add'>+	} else if (amdgpu_ip_version(adev, UVD_HWIP, 0) &gt;= IP_VERSION(4, 0, 0)) {</div><div class='ctx'> 		fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared));</div><div class='ctx'> 		log_offset = offsetof(struct amdgpu_vcn4_fw_shared, fw_log);</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br/>index a418393d89ec..9f06def236fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h</a></div><div class='hunk'>@@ -454,6 +454,16 @@ struct amdgpu_vcn_rb_metadata {</div><div class='ctx'> 	uint8_t pad[26];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct amdgpu_vcn5_fw_shared {</div><div class='add'>+	uint32_t present_flag_0;</div><div class='add'>+	uint8_t pad[12];</div><div class='add'>+	struct amdgpu_fw_shared_unified_queue_struct sq;</div><div class='add'>+	uint8_t pad1[8];</div><div class='add'>+	struct amdgpu_fw_shared_fw_logging fw_log;</div><div class='add'>+	struct amdgpu_fw_shared_rb_setup rb_setup;</div><div class='add'>+	uint8_t pad2[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define VCN_BLOCK_ENCODE_DISABLE_MASK 0x80</div><div class='ctx'> #define VCN_BLOCK_DECODE_DISABLE_MASK 0x40</div><div class='ctx'> #define VCN_BLOCK_QUEUE_DISABLE_MASK 0xC0</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c<br/>index 7a4eae36778a..54ab51a4ada7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_ras.h"</div><div class='add'>+#include "amdgpu_reset.h"</div><div class='ctx'> #include "vi.h"</div><div class='ctx'> #include "soc15.h"</div><div class='ctx'> #include "nv.h"</div><div class='hunk'>@@ -424,7 +425,7 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (pf2vf_info-&gt;size &gt; 1024) {</div><div class='del'>-		DRM_ERROR("invalid pf2vf message size\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "invalid pf2vf message size: 0x%x\n", pf2vf_info-&gt;size);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -435,7 +436,9 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)</div><div class='ctx'> 			adev-&gt;virt.fw_reserve.p_pf2vf, pf2vf_info-&gt;size,</div><div class='ctx'> 			adev-&gt;virt.fw_reserve.checksum_key, checksum);</div><div class='ctx'> 		if (checksum != checkval) {</div><div class='del'>-			DRM_ERROR("invalid pf2vf message\n");</div><div class='add'>+			dev_err(adev-&gt;dev,</div><div class='add'>+				"invalid pf2vf message: header checksum=0x%x calculated checksum=0x%x\n",</div><div class='add'>+				checksum, checkval);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -449,7 +452,9 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)</div><div class='ctx'> 			adev-&gt;virt.fw_reserve.p_pf2vf, pf2vf_info-&gt;size,</div><div class='ctx'> 			0, checksum);</div><div class='ctx'> 		if (checksum != checkval) {</div><div class='del'>-			DRM_ERROR("invalid pf2vf message\n");</div><div class='add'>+			dev_err(adev-&gt;dev,</div><div class='add'>+				"invalid pf2vf message: header checksum=0x%x calculated checksum=0x%x\n",</div><div class='add'>+				checksum, checkval);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -485,7 +490,7 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)</div><div class='ctx'> 			((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)-&gt;uuid;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		DRM_ERROR("invalid pf2vf version\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "invalid pf2vf version: 0x%x\n", pf2vf_info-&gt;version);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -571,6 +576,11 @@ static int amdgpu_virt_write_vf2pf_data(struct amdgpu_device *adev)</div><div class='ctx'> 	vf2pf_info-&gt;decode_usage = 0;</div><div class='ctx'> </div><div class='ctx'> 	vf2pf_info-&gt;dummy_page_addr = (uint64_t)adev-&gt;dummy_page_addr;</div><div class='add'>+	vf2pf_info-&gt;mes_info_addr = (uint64_t)adev-&gt;mes.resource_1_gpu_addr;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;mes.resource_1) {</div><div class='add'>+		vf2pf_info-&gt;mes_info_size = adev-&gt;mes.resource_1-&gt;tbo.base.size;</div><div class='add'>+	}</div><div class='ctx'> 	vf2pf_info-&gt;checksum =</div><div class='ctx'> 		amd_sriov_msg_checksum(</div><div class='ctx'> 		vf2pf_info, vf2pf_info-&gt;header.size, 0, 0);</div><div class='hunk'>@@ -584,8 +594,22 @@ static void amdgpu_virt_update_vf2pf_work_item(struct work_struct *work)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = amdgpu_virt_read_pf2vf_data(adev);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		adev-&gt;virt.vf2pf_update_retry_cnt++;</div><div class='add'>+		if ((adev-&gt;virt.vf2pf_update_retry_cnt &gt;= AMDGPU_VF2PF_UPDATE_MAX_RETRY_LIMIT) &amp;&amp;</div><div class='add'>+		    amdgpu_sriov_runtime(adev) &amp;&amp; !amdgpu_in_reset(adev)) {</div><div class='add'>+			amdgpu_ras_set_fed(adev, true);</div><div class='add'>+			if (amdgpu_reset_domain_schedule(adev-&gt;reset_domain,</div><div class='add'>+							  &amp;adev-&gt;virt.flr_work))</div><div class='add'>+				return;</div><div class='add'>+			else</div><div class='add'>+				dev_err(adev-&gt;dev, "Failed to queue work! at %s", __func__);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adev-&gt;virt.vf2pf_update_retry_cnt = 0;</div><div class='ctx'> 	amdgpu_virt_write_vf2pf_data(adev);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -606,6 +630,7 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev)</div><div class='ctx'> 	adev-&gt;virt.fw_reserve.p_pf2vf = NULL;</div><div class='ctx'> 	adev-&gt;virt.fw_reserve.p_vf2pf = NULL;</div><div class='ctx'> 	adev-&gt;virt.vf2pf_update_interval_ms = 0;</div><div class='add'>+	adev-&gt;virt.vf2pf_update_retry_cnt = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;mman.fw_vram_usage_va &amp;&amp; adev-&gt;mman.drv_vram_usage_va) {</div><div class='ctx'> 		DRM_WARN("Currently fw_vram and drv_vram should not have values at the same time!");</div><div class='hunk'>@@ -705,12 +730,6 @@ void amdgpu_detect_virtualization(struct amdgpu_device *adev)</div><div class='ctx'> 			adev-&gt;virt.caps |= AMDGPU_PASSTHROUGH_MODE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (amdgpu_sriov_vf(adev) &amp;&amp; adev-&gt;asic_type == CHIP_SIENNA_CICHLID)</div><div class='del'>-		/* VF MMIO access (except mailbox range) from CPU</div><div class='del'>-		 * will be blocked during sriov runtime</div><div class='del'>-		 */</div><div class='del'>-		adev-&gt;virt.caps |= AMDGPU_VF_MMIO_ACCESS_PROTECT;</div><div class='del'>-</div><div class='ctx'> 	/* we have the ability to check now */</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 		switch (adev-&gt;asic_type) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h<br/>index 3f59b7b5523f..642f1fd287d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h</a></div><div class='hunk'>@@ -52,6 +52,8 @@</div><div class='ctx'> /* tonga/fiji use this offset */</div><div class='ctx'> #define mmBIF_IOV_FUNC_IDENTIFIER 0x1503</div><div class='ctx'> </div><div class='add'>+#define AMDGPU_VF2PF_UPDATE_MAX_RETRY_LIMIT 5</div><div class='add'>+</div><div class='ctx'> enum amdgpu_sriov_vf_mode {</div><div class='ctx'> 	SRIOV_VF_MODE_BARE_METAL = 0,</div><div class='ctx'> 	SRIOV_VF_MODE_ONE_VF,</div><div class='hunk'>@@ -130,6 +132,8 @@ enum AMDGIM_FEATURE_FLAG {</div><div class='ctx'> 	AMDGIM_FEATURE_AV1_SUPPORT = (1 &lt;&lt; 6),</div><div class='ctx'> 	/* VCN RB decouple */</div><div class='ctx'> 	AMDGIM_FEATURE_VCN_RB_DECOUPLE = (1 &lt;&lt; 7),</div><div class='add'>+	/* MES info */</div><div class='add'>+	AMDGIM_FEATURE_MES_INFO_ENABLE = (1 &lt;&lt; 8),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum AMDGIM_REG_ACCESS_FLAG {</div><div class='hunk'>@@ -257,6 +261,7 @@ struct amdgpu_virt {</div><div class='ctx'> 	/* vf2pf message */</div><div class='ctx'> 	struct delayed_work vf2pf_work;</div><div class='ctx'> 	uint32_t vf2pf_update_interval_ms;</div><div class='add'>+	int vf2pf_update_retry_cnt;</div><div class='ctx'> </div><div class='ctx'> 	/* multimedia bandwidth config */</div><div class='ctx'> 	bool     is_mm_bw_enabled;</div><div class='hunk'>@@ -332,6 +337,8 @@ static inline bool is_virtual_machine(void)</div><div class='ctx'> 	((adev)-&gt;virt.gim_feature &amp; AMDGIM_FEATURE_AV1_SUPPORT)</div><div class='ctx'> #define amdgpu_sriov_is_vcn_rb_decouple(adev) \</div><div class='ctx'> 	((adev)-&gt;virt.gim_feature &amp; AMDGIM_FEATURE_VCN_RB_DECOUPLE)</div><div class='add'>+#define amdgpu_sriov_is_mes_info_enable(adev) \</div><div class='add'>+	((adev)-&gt;virt.gim_feature &amp; AMDGIM_FEATURE_MES_INFO_ENABLE)</div><div class='ctx'> bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev);</div><div class='ctx'> void amdgpu_virt_init_setting(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c<br/>index 8baa2e0935cc..e30eecd02ae1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c</a></div><div class='hunk'>@@ -658,6 +658,8 @@ static const struct amd_ip_funcs amdgpu_vkms_ip_funcs = {</div><div class='ctx'> 	.soft_reset = amdgpu_vkms_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = amdgpu_vkms_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = amdgpu_vkms_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version amdgpu_vkms_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br/>index 94089069c9ad..4e2391c83d7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a></div><div class='hunk'>@@ -886,6 +886,44 @@ static void amdgpu_vm_tlb_seq_cb(struct dma_fence *fence,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * amdgpu_vm_tlb_flush - prepare TLB flush</div><div class='add'>+ *</div><div class='add'>+ * @params: parameters for update</div><div class='add'>+ * @fence: input fence to sync TLB flush with</div><div class='add'>+ * @tlb_cb: the callback structure</div><div class='add'>+ *</div><div class='add'>+ * Increments the tlb sequence to make sure that future CS execute a VM flush.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,</div><div class='add'>+		    struct dma_fence **fence,</div><div class='add'>+		    struct amdgpu_vm_tlb_seq_struct *tlb_cb)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_vm *vm = params-&gt;vm;</div><div class='add'>+</div><div class='add'>+	if (!fence || !*fence)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tlb_cb-&gt;vm = vm;</div><div class='add'>+	if (!dma_fence_add_callback(*fence, &amp;tlb_cb-&gt;cb,</div><div class='add'>+				    amdgpu_vm_tlb_seq_cb)) {</div><div class='add'>+		dma_fence_put(vm-&gt;last_tlb_flush);</div><div class='add'>+		vm-&gt;last_tlb_flush = dma_fence_get(*fence);</div><div class='add'>+	} else {</div><div class='add'>+		amdgpu_vm_tlb_seq_cb(NULL, &amp;tlb_cb-&gt;cb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Prepare a TLB flush fence to be attached to PTs */</div><div class='add'>+	if (!params-&gt;unlocked &amp;&amp; vm-&gt;is_compute_context) {</div><div class='add'>+		amdgpu_vm_tlb_fence_create(params-&gt;adev, vm, fence);</div><div class='add'>+</div><div class='add'>+		/* Makes sure no PD/PT is freed before the flush */</div><div class='add'>+		dma_resv_add_fence(vm-&gt;root.bo-&gt;tbo.base.resv, *fence,</div><div class='add'>+				   DMA_RESV_USAGE_BOOKKEEP);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * amdgpu_vm_update_range - update a range in the vm page table</div><div class='ctx'>  *</div><div class='ctx'>  * @adev: amdgpu_device pointer to use for commands</div><div class='hunk'>@@ -916,8 +954,8 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 			   struct ttm_resource *res, dma_addr_t *pages_addr,</div><div class='ctx'> 			   struct dma_fence **fence)</div><div class='ctx'> {</div><div class='del'>-	struct amdgpu_vm_update_params params;</div><div class='ctx'> 	struct amdgpu_vm_tlb_seq_struct *tlb_cb;</div><div class='add'>+	struct amdgpu_vm_update_params params;</div><div class='ctx'> 	struct amdgpu_res_cursor cursor;</div><div class='ctx'> 	enum amdgpu_sync_mode sync_mode;</div><div class='ctx'> 	int r, idx;</div><div class='hunk'>@@ -927,8 +965,8 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> </div><div class='ctx'> 	tlb_cb = kmalloc(sizeof(*tlb_cb), GFP_KERNEL);</div><div class='ctx'> 	if (!tlb_cb) {</div><div class='del'>-		r = -ENOMEM;</div><div class='del'>-		goto error_unlock;</div><div class='add'>+		drm_dev_exit(idx);</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Vega20+XGMI where PTEs get inadvertently cached in L2 texture cache,</div><div class='hunk'>@@ -948,7 +986,9 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 	params.immediate = immediate;</div><div class='ctx'> 	params.pages_addr = pages_addr;</div><div class='ctx'> 	params.unlocked = unlocked;</div><div class='add'>+	params.needs_flush = flush_tlb;</div><div class='ctx'> 	params.allow_override = allow_override;</div><div class='add'>+	INIT_LIST_HEAD(&amp;params.tlb_flush_waitlist);</div><div class='ctx'> </div><div class='ctx'> 	/* Implicitly sync to command submissions in the same VM before</div><div class='ctx'> 	 * unmapping. Sync to moving fences before mapping.</div><div class='hunk'>@@ -1031,24 +1071,18 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = vm-&gt;update_funcs-&gt;commit(&amp;params, fence);</div><div class='add'>+	if (r)</div><div class='add'>+		goto error_free;</div><div class='ctx'> </div><div class='del'>-	if (flush_tlb || params.table_freed) {</div><div class='del'>-		tlb_cb-&gt;vm = vm;</div><div class='del'>-		if (fence &amp;&amp; *fence &amp;&amp;</div><div class='del'>-		    !dma_fence_add_callback(*fence, &amp;tlb_cb-&gt;cb,</div><div class='del'>-					   amdgpu_vm_tlb_seq_cb)) {</div><div class='del'>-			dma_fence_put(vm-&gt;last_tlb_flush);</div><div class='del'>-			vm-&gt;last_tlb_flush = dma_fence_get(*fence);</div><div class='del'>-		} else {</div><div class='del'>-			amdgpu_vm_tlb_seq_cb(NULL, &amp;tlb_cb-&gt;cb);</div><div class='del'>-		}</div><div class='add'>+	if (params.needs_flush) {</div><div class='add'>+		amdgpu_vm_tlb_flush(&amp;params, fence, tlb_cb);</div><div class='ctx'> 		tlb_cb = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	amdgpu_vm_pt_free_list(adev, &amp;params);</div><div class='add'>+</div><div class='ctx'> error_free:</div><div class='ctx'> 	kfree(tlb_cb);</div><div class='del'>-</div><div class='del'>-error_unlock:</div><div class='ctx'> 	amdgpu_vm_eviction_unlock(vm);</div><div class='ctx'> 	drm_dev_exit(idx);</div><div class='ctx'> 	return r;</div><div class='hunk'>@@ -2411,6 +2445,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;vm-&gt;eviction_lock);</div><div class='ctx'> 	vm-&gt;evicting = false;</div><div class='add'>+	vm-&gt;tlb_fence_context = dma_fence_context_alloc(1);</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_vm_pt_create(adev, vm, adev-&gt;vm_manager.root_level,</div><div class='ctx'> 				false, &amp;root, xcp_id);</div><div class='hunk'>@@ -2944,6 +2979,14 @@ void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev,</div><div class='ctx'> 	if (vm &amp;&amp; status) {</div><div class='ctx'> 		vm-&gt;fault_info.addr = addr;</div><div class='ctx'> 		vm-&gt;fault_info.status = status;</div><div class='add'>+		/*</div><div class='add'>+		 * Update the fault information globally for later usage</div><div class='add'>+		 * when vm could be stale or freed.</div><div class='add'>+		 */</div><div class='add'>+		adev-&gt;vm_manager.fault_info.addr = addr;</div><div class='add'>+		adev-&gt;vm_manager.fault_info.vmhub = vmhub;</div><div class='add'>+		adev-&gt;vm_manager.fault_info.status = status;</div><div class='add'>+</div><div class='ctx'> 		if (AMDGPU_IS_GFXHUB(vmhub)) {</div><div class='ctx'> 			vm-&gt;fault_info.vmhub = AMDGPU_VMHUB_TYPE_GFX;</div><div class='ctx'> 			vm-&gt;fault_info.vmhub |=</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h<br/>index 047ec1930d12..54d7da396de0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h</a></div><div class='hunk'>@@ -257,15 +257,20 @@ struct amdgpu_vm_update_params {</div><div class='ctx'> 	unsigned int num_dw_left;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='del'>-	 * @table_freed: return true if page table is freed when updating</div><div class='add'>+	 * @needs_flush: true whenever we need to invalidate the TLB</div><div class='ctx'> 	 */</div><div class='del'>-	bool table_freed;</div><div class='add'>+	bool needs_flush;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='ctx'> 	 * @allow_override: true for memory that is not uncached: allows MTYPE</div><div class='ctx'> 	 * to be overridden for NUMA local memory.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool allow_override;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @tlb_flush_waitlist: temporary storage for BOs until tlb_flush</div><div class='add'>+	 */</div><div class='add'>+	struct list_head tlb_flush_waitlist;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_vm_update_funcs {</div><div class='hunk'>@@ -342,6 +347,7 @@ struct amdgpu_vm {</div><div class='ctx'> 	atomic64_t		tlb_seq;</div><div class='ctx'> 	struct dma_fence	*last_tlb_flush;</div><div class='ctx'> 	atomic64_t		kfd_last_flushed_seq;</div><div class='add'>+	uint64_t		tlb_fence_context;</div><div class='ctx'> </div><div class='ctx'> 	/* How many times we had to re-generate the page tables */</div><div class='ctx'> 	uint64_t		generation;</div><div class='hunk'>@@ -422,6 +428,8 @@ struct amdgpu_vm_manager {</div><div class='ctx'> 	 * look up VM of a page fault</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct xarray				pasids;</div><div class='add'>+	/* Global registration of recent page fault information */</div><div class='add'>+	struct amdgpu_vm_fault_info	fault_info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_bo_va_mapping;</div><div class='hunk'>@@ -544,6 +552,8 @@ int amdgpu_vm_ptes_update(struct amdgpu_vm_update_params *params,</div><div class='ctx'> 			  uint64_t start, uint64_t end,</div><div class='ctx'> 			  uint64_t dst, uint64_t flags);</div><div class='ctx'> void amdgpu_vm_pt_free_work(struct work_struct *work);</div><div class='add'>+void amdgpu_vm_pt_free_list(struct amdgpu_device *adev,</div><div class='add'>+			    struct amdgpu_vm_update_params *params);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m);</div><div class='hunk'>@@ -609,5 +619,8 @@ void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev,</div><div class='ctx'> 				  uint64_t addr,</div><div class='ctx'> 				  uint32_t status,</div><div class='ctx'> 				  unsigned int vmhub);</div><div class='add'>+void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev,</div><div class='add'>+				 struct amdgpu_vm *vm,</div><div class='add'>+				 struct dma_fence **fence);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c<br/>index 6e31621452de..3895bd7d176a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c</a></div><div class='hunk'>@@ -108,7 +108,9 @@ static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,</div><div class='ctx'> static int amdgpu_vm_cpu_commit(struct amdgpu_vm_update_params *p,</div><div class='ctx'> 				struct dma_fence **fence)</div><div class='ctx'> {</div><div class='del'>-	/* Flush HDP */</div><div class='add'>+	if (p-&gt;needs_flush)</div><div class='add'>+		atomic64_inc(&amp;p-&gt;vm-&gt;tlb_seq);</div><div class='add'>+</div><div class='ctx'> 	mb();</div><div class='ctx'> 	amdgpu_device_flush_hdp(p-&gt;adev, NULL);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c<br/>index 124389a6bf48..7fdd306a48a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c</a></div><div class='hunk'>@@ -622,40 +622,58 @@ void amdgpu_vm_pt_free_work(struct work_struct *work)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * amdgpu_vm_pt_free_dfs - free PD/PT levels</div><div class='add'>+ * amdgpu_vm_pt_free_list - free PD/PT levels</div><div class='ctx'>  *</div><div class='ctx'>  * @adev: amdgpu device structure</div><div class='del'>- * @vm: amdgpu vm structure</div><div class='del'>- * @start: optional cursor where to start freeing PDs/PTs</div><div class='del'>- * @unlocked: vm resv unlock status</div><div class='add'>+ * @params: see amdgpu_vm_update_params definition</div><div class='ctx'>  *</div><div class='del'>- * Free the page directory or page table level and all sub levels.</div><div class='add'>+ * Free the page directory objects saved in the flush list</div><div class='ctx'>  */</div><div class='del'>-static void amdgpu_vm_pt_free_dfs(struct amdgpu_device *adev,</div><div class='del'>-				  struct amdgpu_vm *vm,</div><div class='del'>-				  struct amdgpu_vm_pt_cursor *start,</div><div class='del'>-				  bool unlocked)</div><div class='add'>+void amdgpu_vm_pt_free_list(struct amdgpu_device *adev,</div><div class='add'>+			    struct amdgpu_vm_update_params *params)</div><div class='ctx'> {</div><div class='del'>-	struct amdgpu_vm_pt_cursor cursor;</div><div class='del'>-	struct amdgpu_vm_bo_base *entry;</div><div class='add'>+	struct amdgpu_vm_bo_base *entry, *next;</div><div class='add'>+	struct amdgpu_vm *vm = params-&gt;vm;</div><div class='add'>+	bool unlocked = params-&gt;unlocked;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;params-&gt;tlb_flush_waitlist))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	if (unlocked) {</div><div class='ctx'> 		spin_lock(&amp;vm-&gt;status_lock);</div><div class='del'>-		for_each_amdgpu_vm_pt_dfs_safe(adev, vm, start, cursor, entry)</div><div class='del'>-			list_move(&amp;entry-&gt;vm_status, &amp;vm-&gt;pt_freed);</div><div class='del'>-</div><div class='del'>-		if (start)</div><div class='del'>-			list_move(&amp;start-&gt;entry-&gt;vm_status, &amp;vm-&gt;pt_freed);</div><div class='add'>+		list_splice_init(&amp;params-&gt;tlb_flush_waitlist, &amp;vm-&gt;pt_freed);</div><div class='ctx'> 		spin_unlock(&amp;vm-&gt;status_lock);</div><div class='ctx'> 		schedule_work(&amp;vm-&gt;pt_free_work);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_amdgpu_vm_pt_dfs_safe(adev, vm, start, cursor, entry)</div><div class='add'>+	list_for_each_entry_safe(entry, next, &amp;params-&gt;tlb_flush_waitlist, vm_status)</div><div class='ctx'> 		amdgpu_vm_pt_free(entry);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (start)</div><div class='del'>-		amdgpu_vm_pt_free(start-&gt;entry);</div><div class='add'>+/**</div><div class='add'>+ * amdgpu_vm_pt_add_list - add PD/PT level to the flush list</div><div class='add'>+ *</div><div class='add'>+ * @params: parameters for the update</div><div class='add'>+ * @cursor: first PT entry to start DF search from, non NULL</div><div class='add'>+ *</div><div class='add'>+ * This list will be freed after TLB flush.</div><div class='add'>+ */</div><div class='add'>+static void amdgpu_vm_pt_add_list(struct amdgpu_vm_update_params *params,</div><div class='add'>+				  struct amdgpu_vm_pt_cursor *cursor)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_vm_pt_cursor seek;</div><div class='add'>+	struct amdgpu_vm_bo_base *entry;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;params-&gt;vm-&gt;status_lock);</div><div class='add'>+	for_each_amdgpu_vm_pt_dfs_safe(params-&gt;adev, params-&gt;vm, cursor, seek, entry) {</div><div class='add'>+		if (entry &amp;&amp; entry-&gt;bo)</div><div class='add'>+			list_move(&amp;entry-&gt;vm_status, &amp;params-&gt;tlb_flush_waitlist);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enter start node now */</div><div class='add'>+	list_move(&amp;cursor-&gt;entry-&gt;vm_status, &amp;params-&gt;tlb_flush_waitlist);</div><div class='add'>+	spin_unlock(&amp;params-&gt;vm-&gt;status_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -667,7 +685,13 @@ static void amdgpu_vm_pt_free_dfs(struct amdgpu_device *adev,</div><div class='ctx'>  */</div><div class='ctx'> void amdgpu_vm_pt_free_root(struct amdgpu_device *adev, struct amdgpu_vm *vm)</div><div class='ctx'> {</div><div class='del'>-	amdgpu_vm_pt_free_dfs(adev, vm, NULL, false);</div><div class='add'>+	struct amdgpu_vm_pt_cursor cursor;</div><div class='add'>+	struct amdgpu_vm_bo_base *entry;</div><div class='add'>+</div><div class='add'>+	for_each_amdgpu_vm_pt_dfs_safe(adev, vm, NULL, cursor, entry) {</div><div class='add'>+		if (entry)</div><div class='add'>+			amdgpu_vm_pt_free(entry);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -972,10 +996,8 @@ int amdgpu_vm_ptes_update(struct amdgpu_vm_update_params *params,</div><div class='ctx'> 			while (cursor.pfn &lt; frag_start) {</div><div class='ctx'> 				/* Make sure previous mapping is freed */</div><div class='ctx'> 				if (cursor.entry-&gt;bo) {</div><div class='del'>-					params-&gt;table_freed = true;</div><div class='del'>-					amdgpu_vm_pt_free_dfs(adev, params-&gt;vm,</div><div class='del'>-							      &amp;cursor,</div><div class='del'>-							      params-&gt;unlocked);</div><div class='add'>+					params-&gt;needs_flush = true;</div><div class='add'>+					amdgpu_vm_pt_add_list(params, &amp;cursor);</div><div class='ctx'> 				}</div><div class='ctx'> 				amdgpu_vm_pt_next(adev, &amp;cursor);</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c<br/>index 349416e176a1..66e8a016126b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c</a></div><div class='hunk'>@@ -126,6 +126,10 @@ static int amdgpu_vm_sdma_commit(struct amdgpu_vm_update_params *p,</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(ib-&gt;length_dw == 0);</div><div class='ctx'> 	amdgpu_ring_pad_ib(ring, ib);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;needs_flush)</div><div class='add'>+		atomic64_inc(&amp;p-&gt;vm-&gt;tlb_seq);</div><div class='add'>+</div><div class='ctx'> 	WARN_ON(ib-&gt;length_dw &gt; p-&gt;num_dw_left);</div><div class='ctx'> 	f = amdgpu_job_submit(p-&gt;job);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c<br/>new file mode 100644<br/>index 000000000000..51cddfa3f1e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-fence.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_vm.h"</div><div class='add'>+#include "amdgpu_gmc.h"</div><div class='add'>+</div><div class='add'>+struct amdgpu_tlb_fence {</div><div class='add'>+	struct dma_fence	base;</div><div class='add'>+	struct amdgpu_device	*adev;</div><div class='add'>+	struct dma_fence	*dependency;</div><div class='add'>+	struct work_struct	work;</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+	uint16_t		pasid;</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *amdgpu_tlb_fence_get_driver_name(struct dma_fence *fence)</div><div class='add'>+{</div><div class='add'>+	return "amdgpu tlb fence";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *amdgpu_tlb_fence_get_timeline_name(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	return "amdgpu tlb timeline";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_tlb_fence_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_tlb_fence *f = container_of(work, typeof(*f), work);</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;dependency) {</div><div class='add'>+		dma_fence_wait(f-&gt;dependency, false);</div><div class='add'>+		dma_fence_put(f-&gt;dependency);</div><div class='add'>+		f-&gt;dependency = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_gmc_flush_gpu_tlb_pasid(f-&gt;adev, f-&gt;pasid, 2, true, 0);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(f-&gt;adev-&gt;dev, "TLB flush failed for PASID %d.\n",</div><div class='add'>+			f-&gt;pasid);</div><div class='add'>+		dma_fence_set_error(&amp;f-&gt;base, r);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_fence_signal(&amp;f-&gt;base);</div><div class='add'>+	dma_fence_put(&amp;f-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dma_fence_ops amdgpu_tlb_fence_ops = {</div><div class='add'>+	.use_64bit_seqno = true,</div><div class='add'>+	.get_driver_name = amdgpu_tlb_fence_get_driver_name,</div><div class='add'>+	.get_timeline_name = amdgpu_tlb_fence_get_timeline_name</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='add'>+				struct dma_fence **fence)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_tlb_fence *f;</div><div class='add'>+</div><div class='add'>+	f = kmalloc(sizeof(*f), GFP_KERNEL);</div><div class='add'>+	if (!f) {</div><div class='add'>+		/*</div><div class='add'>+		 * We can't fail since the PDEs and PTEs are already updated, so</div><div class='add'>+		 * just block for the dependency and execute the TLB flush</div><div class='add'>+		 */</div><div class='add'>+		if (*fence)</div><div class='add'>+			dma_fence_wait(*fence, false);</div><div class='add'>+</div><div class='add'>+		amdgpu_gmc_flush_gpu_tlb_pasid(adev, vm-&gt;pasid, 2, true, 0);</div><div class='add'>+		*fence = dma_fence_get_stub();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f-&gt;adev = adev;</div><div class='add'>+	f-&gt;dependency = *fence;</div><div class='add'>+	f-&gt;pasid = vm-&gt;pasid;</div><div class='add'>+	INIT_WORK(&amp;f-&gt;work, amdgpu_tlb_fence_work);</div><div class='add'>+	spin_lock_init(&amp;f-&gt;lock);</div><div class='add'>+</div><div class='add'>+	dma_fence_init(&amp;f-&gt;base, &amp;amdgpu_tlb_fence_ops, &amp;f-&gt;lock,</div><div class='add'>+		       vm-&gt;tlb_fence_context, atomic64_read(&amp;vm-&gt;tlb_seq));</div><div class='add'>+</div><div class='add'>+	/* TODO: We probably need a separate wq here */</div><div class='add'>+	dma_fence_get(&amp;f-&gt;base);</div><div class='add'>+	schedule_work(&amp;f-&gt;work);</div><div class='add'>+</div><div class='add'>+	*fence = &amp;f-&gt;base;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c<br/>index 6695481f870f..c23d97d34b7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c</a></div><div class='hunk'>@@ -205,7 +205,7 @@ disable_dpm:</div><div class='ctx'> 	dpm_ctl &amp;= 0xfffffffe; /* Disable DPM */</div><div class='ctx'> 	WREG32(vpe_get_reg_offset(vpe, 0, vpe-&gt;regs.dpm_enable), dpm_ctl);</div><div class='ctx'> 	dev_dbg(adev-&gt;dev, "%s: disable vpe dpm\n", __func__);</div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int amdgpu_vpe_psp_update_sram(struct amdgpu_device *adev)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c<br/>index 8db880244324..6c30eceec896 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c</a></div><div class='hunk'>@@ -450,6 +450,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);</div><div class='ctx'> 	struct amdgpu_device *adev = to_amdgpu_device(mgr);</div><div class='add'>+	struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);</div><div class='ctx'> 	u64 vis_usage = 0, max_bytes, min_block_size;</div><div class='ctx'> 	struct amdgpu_vram_mgr_resource *vres;</div><div class='ctx'> 	u64 size, remaining_size, lpfn, fpfn;</div><div class='hunk'>@@ -468,7 +469,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,</div><div class='ctx'> 	if (tbo-&gt;type != ttm_bo_type_kernel)</div><div class='ctx'> 		max_bytes -= AMDGPU_VM_RESERVED_VRAM;</div><div class='ctx'> </div><div class='del'>-	if (place-&gt;flags &amp; TTM_PL_FLAG_CONTIGUOUS) {</div><div class='add'>+	if (bo-&gt;flags &amp; AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS) {</div><div class='ctx'> 		pages_per_block = ~0ul;</div><div class='ctx'> 	} else {</div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='hunk'>@@ -477,7 +478,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,</div><div class='ctx'> 		/* default to 2MB */</div><div class='ctx'> 		pages_per_block = 2UL &lt;&lt; (20UL - PAGE_SHIFT);</div><div class='ctx'> #endif</div><div class='del'>-		pages_per_block = max_t(uint32_t, pages_per_block,</div><div class='add'>+		pages_per_block = max_t(u32, pages_per_block,</div><div class='ctx'> 					tbo-&gt;page_alignment);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -498,9 +499,12 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,</div><div class='ctx'> 	if (place-&gt;flags &amp; TTM_PL_FLAG_TOPDOWN)</div><div class='ctx'> 		vres-&gt;flags |= DRM_BUDDY_TOPDOWN_ALLOCATION;</div><div class='ctx'> </div><div class='del'>-	if (place-&gt;flags &amp; TTM_PL_FLAG_CONTIGUOUS)</div><div class='add'>+	if (bo-&gt;flags &amp; AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)</div><div class='ctx'> 		vres-&gt;flags |= DRM_BUDDY_CONTIGUOUS_ALLOCATION;</div><div class='ctx'> </div><div class='add'>+	if (bo-&gt;flags &amp; AMDGPU_GEM_CREATE_VRAM_CLEARED)</div><div class='add'>+		vres-&gt;flags |= DRM_BUDDY_CLEAR_ALLOCATION;</div><div class='add'>+</div><div class='ctx'> 	if (fpfn || lpfn != mgr-&gt;mm.size)</div><div class='ctx'> 		/* Allocate blocks in desired range */</div><div class='ctx'> 		vres-&gt;flags |= DRM_BUDDY_RANGE_ALLOCATION;</div><div class='hunk'>@@ -514,21 +518,31 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,</div><div class='ctx'> 		else</div><div class='ctx'> 			min_block_size = mgr-&gt;default_page_size;</div><div class='ctx'> </div><div class='del'>-		BUG_ON(min_block_size &lt; mm-&gt;chunk_size);</div><div class='del'>-</div><div class='ctx'> 		/* Limit maximum size to 2GiB due to SG table limitations */</div><div class='ctx'> 		size = min(remaining_size, 2ULL &lt;&lt; 30);</div><div class='ctx'> </div><div class='ctx'> 		if ((size &gt;= (u64)pages_per_block &lt;&lt; PAGE_SHIFT) &amp;&amp;</div><div class='del'>-				!(size &amp; (((u64)pages_per_block &lt;&lt; PAGE_SHIFT) - 1)))</div><div class='add'>+		    !(size &amp; (((u64)pages_per_block &lt;&lt; PAGE_SHIFT) - 1)))</div><div class='ctx'> 			min_block_size = (u64)pages_per_block &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='add'>+		BUG_ON(min_block_size &lt; mm-&gt;chunk_size);</div><div class='add'>+</div><div class='ctx'> 		r = drm_buddy_alloc_blocks(mm, fpfn,</div><div class='ctx'> 					   lpfn,</div><div class='ctx'> 					   size,</div><div class='ctx'> 					   min_block_size,</div><div class='ctx'> 					   &amp;vres-&gt;blocks,</div><div class='ctx'> 					   vres-&gt;flags);</div><div class='add'>+</div><div class='add'>+		if (unlikely(r == -ENOSPC) &amp;&amp; pages_per_block == ~0ul &amp;&amp;</div><div class='add'>+		    !(place-&gt;flags &amp; TTM_PL_FLAG_CONTIGUOUS)) {</div><div class='add'>+			vres-&gt;flags &amp;= ~DRM_BUDDY_CONTIGUOUS_ALLOCATION;</div><div class='add'>+			pages_per_block = max_t(u32, 2UL &lt;&lt; (20UL - PAGE_SHIFT),</div><div class='add'>+						tbo-&gt;page_alignment);</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (unlikely(r))</div><div class='ctx'> 			goto error_free_blocks;</div><div class='ctx'> </div><div class='hunk'>@@ -571,7 +585,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error_free_blocks:</div><div class='del'>-	drm_buddy_free_list(mm, &amp;vres-&gt;blocks);</div><div class='add'>+	drm_buddy_free_list(mm, &amp;vres-&gt;blocks, 0);</div><div class='ctx'> 	mutex_unlock(&amp;mgr-&gt;lock);</div><div class='ctx'> error_fini:</div><div class='ctx'> 	ttm_resource_fini(man, &amp;vres-&gt;base);</div><div class='hunk'>@@ -604,7 +618,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_vram_mgr_do_reserve(man);</div><div class='ctx'> </div><div class='del'>-	drm_buddy_free_list(mm, &amp;vres-&gt;blocks);</div><div class='add'>+	drm_buddy_free_list(mm, &amp;vres-&gt;blocks, vres-&gt;flags);</div><div class='ctx'> 	mutex_unlock(&amp;mgr-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	atomic64_sub(vis_usage, &amp;mgr-&gt;vis_usage);</div><div class='hunk'>@@ -912,7 +926,7 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)</div><div class='ctx'> 		kfree(rsv);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe(rsv, temp, &amp;mgr-&gt;reserved_pages, blocks) {</div><div class='del'>-		drm_buddy_free_list(&amp;mgr-&gt;mm, &amp;rsv-&gt;allocated);</div><div class='add'>+		drm_buddy_free_list(&amp;mgr-&gt;mm, &amp;rsv-&gt;allocated, 0);</div><div class='ctx'> 		kfree(rsv);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!adev-&gt;gmc.is_app_apu)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h<br/>index 0e04e42cf809..b256cbc2bc27 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h</a></div><div class='hunk'>@@ -53,10 +53,20 @@ static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)</div><div class='ctx'> 	return (u64)PAGE_SIZE &lt;&lt; drm_buddy_block_order(block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool amdgpu_vram_mgr_is_cleared(struct drm_buddy_block *block)</div><div class='add'>+{</div><div class='add'>+	return drm_buddy_block_is_clear(block);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline struct amdgpu_vram_mgr_resource *</div><div class='ctx'> to_amdgpu_vram_mgr_resource(struct ttm_resource *res)</div><div class='ctx'> {</div><div class='ctx'> 	return container_of(res, struct amdgpu_vram_mgr_resource, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void amdgpu_vram_mgr_set_cleared(struct ttm_resource *res)</div><div class='add'>+{</div><div class='add'>+	to_amdgpu_vram_mgr_resource(res)-&gt;flags |= DRM_BUDDY_CLEARED;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c<br/>index 20d51f6c9bb8..dd2ec48cf5c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c</a></div><div class='hunk'>@@ -1035,15 +1035,16 @@ int amdgpu_xgmi_remove_device(struct amdgpu_device *adev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgmi_v6_4_0_aca_bank_generate_report(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type,</div><div class='del'>-						struct aca_bank_report *report, void *data)</div><div class='add'>+static int xgmi_v6_4_0_aca_bank_parser(struct aca_handle *handle, struct aca_bank *bank,</div><div class='add'>+				       enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = handle-&gt;adev;</div><div class='add'>+	struct aca_bank_info info;</div><div class='ctx'> 	const char *error_str;</div><div class='del'>-	u64 status;</div><div class='add'>+	u64 status, count;</div><div class='ctx'> 	int ret, ext_error_code;</div><div class='ctx'> </div><div class='del'>-	ret = aca_bank_info_decode(bank, &amp;report-&gt;info);</div><div class='add'>+	ret = aca_bank_info_decode(bank, &amp;info);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1055,15 +1056,28 @@ static int xgmi_v6_4_0_aca_bank_generate_report(struct aca_handle *handle, struc</div><div class='ctx'> 	if (error_str)</div><div class='ctx'> 		dev_info(adev-&gt;dev, "%s detected\n", error_str);</div><div class='ctx'> </div><div class='del'>-	if ((type == ACA_ERROR_TYPE_UE &amp;&amp; ext_error_code == 0) ||</div><div class='del'>-	    (type == ACA_ERROR_TYPE_CE &amp;&amp; ext_error_code == 6))</div><div class='del'>-		report-&gt;count[type] = ACA_REG__MISC0__ERRCNT(bank-&gt;regs[ACA_REG_IDX_MISC0]);</div><div class='add'>+	count = ACA_REG__MISC0__ERRCNT(bank-&gt;regs[ACA_REG_IDX_MISC0]);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	switch (type) {</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='add'>+		if (ext_error_code != 0 &amp;&amp; ext_error_code != 9)</div><div class='add'>+			count = 0ULL;</div><div class='add'>+</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info, ACA_ERROR_TYPE_UE, count);</div><div class='add'>+		break;</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='add'>+		count = ext_error_code == 6 ? count : 0ULL;</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info, ACA_ERROR_TYPE_CE, count);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct aca_bank_ops xgmi_v6_4_0_aca_bank_ops = {</div><div class='del'>-	.aca_bank_generate_report = xgmi_v6_4_0_aca_bank_generate_report,</div><div class='add'>+	.aca_bank_parser = xgmi_v6_4_0_aca_bank_parser,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct aca_info xgmi_v6_4_0_aca_info = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h<br/>index 1592c63b3099..a3bfc16de6d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ struct amdgpu_hive_info {</div><div class='ctx'> </div><div class='ctx'> 	struct amdgpu_reset_domain *reset_domain;</div><div class='ctx'> 	atomic_t ras_recovery;</div><div class='add'>+	struct ras_event_manager event_mgr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_pcs_ras_field {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h<br/>index 51a14f6d93bd..fb2b394bb9c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h</a></div><div class='hunk'>@@ -94,7 +94,8 @@ union amd_sriov_msg_feature_flags {</div><div class='ctx'> 		uint32_t reg_indirect_acc  : 1;</div><div class='ctx'> 		uint32_t av1_support       : 1;</div><div class='ctx'> 		uint32_t vcn_rb_decouple   : 1;</div><div class='del'>-		uint32_t reserved          : 24;</div><div class='add'>+		uint32_t mes_info_enable   : 1;</div><div class='add'>+		uint32_t reserved          : 23;</div><div class='ctx'> 	} flags;</div><div class='ctx'> 	uint32_t all;</div><div class='ctx'> };</div><div class='hunk'>@@ -157,7 +158,7 @@ struct amd_sriov_msg_pf2vf_info_header {</div><div class='ctx'> 	uint32_t reserved[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE (48)</div><div class='add'>+#define AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE (49)</div><div class='ctx'> struct amd_sriov_msg_pf2vf_info {</div><div class='ctx'> 	/* header contains size and version */</div><div class='ctx'> 	struct amd_sriov_msg_pf2vf_info_header header;</div><div class='hunk'>@@ -208,6 +209,8 @@ struct amd_sriov_msg_pf2vf_info {</div><div class='ctx'> 	struct amd_sriov_msg_uuid_info uuid_info;</div><div class='ctx'> 	/* PCIE atomic ops support flag */</div><div class='ctx'> 	uint32_t pcie_atomic_ops_support_flags;</div><div class='add'>+	/* Portion of GPU memory occupied by VF.  MAX value is 65535, but set to uint32_t to maintain alignment with reserved size */</div><div class='add'>+	uint32_t gpu_capacity;</div><div class='ctx'> 	/* reserved */</div><div class='ctx'> 	uint32_t reserved[256 - AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE];</div><div class='ctx'> };</div><div class='hunk'>@@ -221,7 +224,7 @@ struct amd_sriov_msg_vf2pf_info_header {</div><div class='ctx'> 	uint32_t reserved[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define AMD_SRIOV_MSG_VF2PF_INFO_FILLED_SIZE (70)</div><div class='add'>+#define AMD_SRIOV_MSG_VF2PF_INFO_FILLED_SIZE (73)</div><div class='ctx'> struct amd_sriov_msg_vf2pf_info {</div><div class='ctx'> 	/* header contains size and version */</div><div class='ctx'> 	struct amd_sriov_msg_vf2pf_info_header header;</div><div class='hunk'>@@ -265,7 +268,9 @@ struct amd_sriov_msg_vf2pf_info {</div><div class='ctx'> 		uint32_t version;</div><div class='ctx'> 	} ucode_info[AMD_SRIOV_MSG_RESERVE_UCODE];</div><div class='ctx'> 	uint64_t dummy_page_addr;</div><div class='del'>-</div><div class='add'>+	/* FB allocated for guest MES to record UQ info */</div><div class='add'>+	uint64_t mes_info_addr;</div><div class='add'>+	uint32_t mes_info_size;</div><div class='ctx'> 	/* reserved */</div><div class='ctx'> 	uint32_t reserved[256 - AMD_SRIOV_MSG_VF2PF_INFO_FILLED_SIZE];</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c<br/>index fbb43ae7624f..414ea3f560a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c</a></div><div class='hunk'>@@ -630,7 +630,7 @@ static int aqua_vanjaram_xcp_mgr_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	u32 mask, inst_mask = adev-&gt;sdma.sdma_mask;</div><div class='add'>+	u32 mask, avail_inst, inst_mask = adev-&gt;sdma.sdma_mask;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	/* generally 1 AID supports 4 instances */</div><div class='hunk'>@@ -642,7 +642,9 @@ int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	for (mask = (1 &lt;&lt; adev-&gt;sdma.num_inst_per_aid) - 1; inst_mask;</div><div class='ctx'> 	     inst_mask &gt;&gt;= adev-&gt;sdma.num_inst_per_aid, ++i) {</div><div class='del'>-		if ((inst_mask &amp; mask) == mask)</div><div class='add'>+		avail_inst = inst_mask &amp; mask;</div><div class='add'>+		if (avail_inst == mask || avail_inst == 0x3 ||</div><div class='add'>+		    avail_inst == 0xc)</div><div class='ctx'> 			adev-&gt;aid_mask |= (1 &lt;&lt; i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c b/drivers/gpu/drm/amd/amdgpu/atom.c<br/>index 72362df352f6..d552e013354c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/atom.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/atom.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/atom.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/atom.c</a></div><div class='hunk'>@@ -1243,6 +1243,7 @@ static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index,</div><div class='ctx'> 	ectx.ps_size = params_size;</div><div class='ctx'> 	ectx.abort = false;</div><div class='ctx'> 	ectx.last_jump = 0;</div><div class='add'>+	ectx.last_jump_jiffies = 0;</div><div class='ctx'> 	if (ws) {</div><div class='ctx'> 		ectx.ws = kcalloc(4, ws, GFP_KERNEL);</div><div class='ctx'> 		ectx.ws_size = ws;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c<br/>index a3a643254d7a..cf1d5d462b67 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cik.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/cik.c</a></div><div class='hunk'>@@ -1375,14 +1375,14 @@ static int cik_asic_pci_config_reset(struct amdgpu_device *adev)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool cik_asic_supports_baco(struct amdgpu_device *adev)</div><div class='add'>+static int cik_asic_supports_baco(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	switch (adev-&gt;asic_type) {</div><div class='ctx'> 	case CHIP_BONAIRE:</div><div class='ctx'> 	case CHIP_HAWAII:</div><div class='ctx'> 		return amdgpu_dpm_is_baco_supported(adev);</div><div class='ctx'> 	default:</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2210,6 +2210,8 @@ static const struct amd_ip_funcs cik_common_ip_funcs = {</div><div class='ctx'> 	.soft_reset = cik_common_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = cik_common_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = cik_common_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ip_block_version cik_common_ip_block =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c b/drivers/gpu/drm/amd/amdgpu/cik_ih.c<br/>index f24e34dc33d1..576baa9dbb0e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik_ih.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cik_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/cik_ih.c</a></div><div class='hunk'>@@ -435,6 +435,8 @@ static const struct amd_ip_funcs cik_ih_ip_funcs = {</div><div class='ctx'> 	.soft_reset = cik_ih_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = cik_ih_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = cik_ih_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs cik_ih_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c<br/>index a3fccc4c1f43..6948ebda0fa2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a></div><div class='hunk'>@@ -1228,6 +1228,8 @@ static const struct amd_ip_funcs cik_sdma_ip_funcs = {</div><div class='ctx'> 	.soft_reset = cik_sdma_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = cik_sdma_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = cik_sdma_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = {</div><div class='hunk'>@@ -1290,7 +1292,7 @@ static void cik_sdma_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: is this a secure operation</div><div class='add'>+ * @copy_flags: unused</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine (CIK).</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1300,7 +1302,7 @@ static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				      uint64_t src_offset,</div><div class='ctx'> 				      uint64_t dst_offset,</div><div class='ctx'> 				      uint32_t byte_count,</div><div class='del'>-				      bool tmz)</div><div class='add'>+				      uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = byte_count;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c<br/>index c19681492efa..072643787384 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cz_ih.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/cz_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cz_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/cz_ih.c</a></div><div class='hunk'>@@ -433,6 +433,8 @@ static const struct amd_ip_funcs cz_ih_ip_funcs = {</div><div class='ctx'> 	.soft_reset = cz_ih_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = cz_ih_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = cz_ih_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs cz_ih_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c<br/>index 221af054d874..b44fce44c066 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a></div><div class='hunk'>@@ -3333,6 +3333,8 @@ static const struct amd_ip_funcs dce_v10_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = dce_v10_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = dce_v10_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = dce_v10_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c<br/>index 69e8b0db6cf7..80b2e7f79acf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a></div><div class='hunk'>@@ -3464,6 +3464,8 @@ static const struct amd_ip_funcs dce_v11_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = dce_v11_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = dce_v11_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = dce_v11_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c<br/>index 60d40201fdd1..db20012600f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/dce_v6_0.c</a></div><div class='hunk'>@@ -3154,6 +3154,8 @@ static const struct amd_ip_funcs dce_v6_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = dce_v6_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = dce_v6_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = dce_v6_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c<br/>index 5a5fcc45e452..5b56100ec902 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a></div><div class='hunk'>@@ -3242,6 +3242,8 @@ static const struct amd_ip_funcs dce_v8_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = dce_v8_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = dce_v8_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = dce_v8_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br/>index f90905ef32c7..536287ddd2ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c</a></div><div class='hunk'>@@ -276,6 +276,99 @@ MODULE_FIRMWARE("amdgpu/gc_10_3_7_mec.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/gc_10_3_7_mec2.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/gc_10_3_7_rlc.bin");</div><div class='ctx'> </div><div class='add'>+static const struct amdgpu_hwip_reg_entry gc_reg_list_10_1[] = {</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS3),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_STALLED_STAT1),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_STALLED_STAT2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STALLED_STAT1),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_STALLED_STAT1),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_BUSY_STAT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_BUSY_STAT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_BUSY_STAT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_BUSY_STAT2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_BUSY_STAT2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_ERROR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HPD_STATUS0),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_BASE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_RPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_BASE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_RPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_WPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_BASE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_RPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_WPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_BASE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_WPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_WPTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_CMD_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_CMD_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_CMD_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_CMD_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_LO),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_HI),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BASE_LO),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BASE_HI),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BASE_LO),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BASE_HI),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BASE_LO),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BASE_HI),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BUFSZ),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCPF_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCPC_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCPG_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGDS_PROTECTION_FAULT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGDS_VM_PROTECTION_FAULT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_STATUS_2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmPA_CL_CNTL_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRMI_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmSQC_DCACHE_UTCL0_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmSQC_ICACHE_UTCL0_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmSQG_UTCL0_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmTCP_UTCL0_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmWD_UTCL1_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGCVM_L2_PROTECTION_FAULT_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_DEBUG),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_CNTL),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_CNTL),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC1_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC2_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_DEBUG_INTERRUPT_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_INSTR_PNTR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_STAT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_COMMAND),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_MESSAGE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_1),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_3),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_4),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmSMU_RLC_RESPONSE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SAFE_MODE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_SAFE_MODE),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_RLCS_GPM_STAT_2),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SPP_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_RLCS_BOOTLOAD_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_INT_STAT),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_GENERAL_6),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_A),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_B),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_ADDR),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_LX6_CORE_PDEBUG_INST)</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct soc15_reg_golden golden_settings_gc_10_1[] = {</div><div class='ctx'> 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0xffffffff, 0x00400014),</div><div class='ctx'> 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_CPF_CLK_CTRL, 0xfcff8fff, 0xf8000100),</div><div class='hunk'>@@ -3964,7 +4057,7 @@ static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	char fw_name[40];</div><div class='add'>+	char fw_name[53];</div><div class='ctx'> 	char ucode_prefix[30];</div><div class='ctx'> 	const char *wks = "";</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -4490,6 +4583,22 @@ static int gfx_v10_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,</div><div class='ctx'> 			     hw_prio, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gfx_v10_0_alloc_dump_mem(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);</div><div class='add'>+	uint32_t *ptr;</div><div class='add'>+</div><div class='add'>+	ptr = kcalloc(reg_count, sizeof(uint32_t), GFP_KERNEL);</div><div class='add'>+	if (ptr == NULL) {</div><div class='add'>+		DRM_ERROR("Failed to allocate memory for IP Dump\n");</div><div class='add'>+		adev-&gt;gfx.ip_dump = NULL;</div><div class='add'>+		adev-&gt;gfx.reg_count = 0;</div><div class='add'>+	} else {</div><div class='add'>+		adev-&gt;gfx.ip_dump = ptr;</div><div class='add'>+		adev-&gt;gfx.reg_count = reg_count;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v10_0_sw_init(void *handle)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j, k, r, ring_id = 0;</div><div class='hunk'>@@ -4518,7 +4627,7 @@ static int gfx_v10_0_sw_init(void *handle)</div><div class='ctx'> 	case IP_VERSION(10, 3, 3):</div><div class='ctx'> 	case IP_VERSION(10, 3, 7):</div><div class='ctx'> 		adev-&gt;gfx.me.num_me = 1;</div><div class='del'>-		adev-&gt;gfx.me.num_pipe_per_me = 1;</div><div class='add'>+		adev-&gt;gfx.me.num_pipe_per_me = 2;</div><div class='ctx'> 		adev-&gt;gfx.me.num_queue_per_pipe = 1;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_mec = 2;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_pipe_per_mec = 4;</div><div class='hunk'>@@ -4642,6 +4751,8 @@ static int gfx_v10_0_sw_init(void *handle)</div><div class='ctx'> </div><div class='ctx'> 	gfx_v10_0_gpu_early_init(adev);</div><div class='ctx'> </div><div class='add'>+	gfx_v10_0_alloc_dump_mem(adev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4694,6 +4805,8 @@ static int gfx_v10_0_sw_fini(void *handle)</div><div class='ctx'> </div><div class='ctx'> 	gfx_v10_0_free_microcode(adev);</div><div class='ctx'> </div><div class='add'>+	kfree(adev-&gt;gfx.ip_dump);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -8317,7 +8430,7 @@ static void gfx_v10_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)</div><div class='ctx'> 		}</div><div class='ctx'> 		reg_mem_engine = 0;</div><div class='ctx'> 	} else {</div><div class='del'>-		ref_and_mask = nbio_hf_reg-&gt;ref_and_mask_cp0;</div><div class='add'>+		ref_and_mask = nbio_hf_reg-&gt;ref_and_mask_cp0 &lt;&lt; ring-&gt;pipe;</div><div class='ctx'> 		reg_mem_engine = 1; /* pfp */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9154,6 +9267,36 @@ static void gfx_v10_0_emit_mem_sync(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_ring_write(ring, gcr_cntl); /* GCR_CNTL */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gfx_v10_ip_print(void *handle, struct drm_printer *p)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = (struct amdgpu_device *)handle;</div><div class='add'>+	uint32_t i;</div><div class='add'>+	uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);</div><div class='add'>+</div><div class='add'>+	if (!adev-&gt;gfx.ip_dump)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; reg_count; i++)</div><div class='add'>+		drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+			   gc_reg_list_10_1[i].reg_name,</div><div class='add'>+			   adev-&gt;gfx.ip_dump[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gfx_v10_ip_dump(void *handle)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = (struct amdgpu_device *)handle;</div><div class='add'>+	uint32_t i;</div><div class='add'>+	uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);</div><div class='add'>+</div><div class='add'>+	if (!adev-&gt;gfx.ip_dump)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	amdgpu_gfx_off_ctrl(adev, false);</div><div class='add'>+	for (i = 0; i &lt; reg_count; i++)</div><div class='add'>+		adev-&gt;gfx.ip_dump[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));</div><div class='add'>+	amdgpu_gfx_off_ctrl(adev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct amd_ip_funcs gfx_v10_0_ip_funcs = {</div><div class='ctx'> 	.name = "gfx_v10_0",</div><div class='ctx'> 	.early_init = gfx_v10_0_early_init,</div><div class='hunk'>@@ -9170,6 +9313,8 @@ static const struct amd_ip_funcs gfx_v10_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = gfx_v10_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v10_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = gfx_v10_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = gfx_v10_ip_dump,</div><div class='add'>+	.print_ip_state = gfx_v10_ip_print,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = {</div><div class='hunk'>@@ -9186,7 +9331,7 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = {</div><div class='ctx'> 		7 + /* PIPELINE_SYNC */</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +</div><div class='del'>-		2 + /* VM_FLUSH */</div><div class='add'>+		4 + /* VM_FLUSH */</div><div class='ctx'> 		8 + /* FENCE for VM_FLUSH */</div><div class='ctx'> 		20 + /* GDS switch */</div><div class='ctx'> 		4 + /* double SWITCH_BUFFER,</div><div class='hunk'>@@ -9276,7 +9421,6 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_kiq = {</div><div class='ctx'> 		7 + /* gfx_v10_0_ring_emit_pipeline_sync */</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +</div><div class='del'>-		2 + /* gfx_v10_0_ring_emit_vm_flush */</div><div class='ctx'> 		8 + 8 + 8, /* gfx_v10_0_ring_emit_fence_kiq x3 for user fence, vm fence */</div><div class='ctx'> 	.emit_ib_size =	7, /* gfx_v10_0_ring_emit_ib_compute */</div><div class='ctx'> 	.emit_ib = gfx_v10_0_ring_emit_ib_compute,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c<br/>index f7325b02a191..ad6431013c73 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c</a></div><div class='hunk'>@@ -510,7 +510,7 @@ static void gfx_v11_0_check_fw_cp_gfx_shadow(struct amdgpu_device *adev)</div><div class='ctx'> static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	char fw_name[40];</div><div class='del'>-	char ucode_prefix[30];</div><div class='add'>+	char ucode_prefix[25];</div><div class='ctx'> 	int err;</div><div class='ctx'> 	const struct rlc_firmware_header_v2_0 *rlc_hdr;</div><div class='ctx'> 	uint16_t version_major;</div><div class='hunk'>@@ -4506,14 +4506,11 @@ static int gfx_v11_0_soft_reset(void *handle)</div><div class='ctx'> </div><div class='ctx'> 	gfx_v11_0_set_safe_mode(adev, 0);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;gfx.mec.num_mec; ++i) {</div><div class='ctx'> 		for (j = 0; j &lt; adev-&gt;gfx.mec.num_queue_per_pipe; j++) {</div><div class='ctx'> 			for (k = 0; k &lt; adev-&gt;gfx.mec.num_pipe_per_mec; k++) {</div><div class='del'>-				tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL);</div><div class='del'>-				tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, MEID, i);</div><div class='del'>-				tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, QUEUEID, j);</div><div class='del'>-				tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, PIPEID, k);</div><div class='del'>-				WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);</div><div class='add'>+				soc21_grbm_select(adev, i, k, j, 0);</div><div class='ctx'> </div><div class='ctx'> 				WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);</div><div class='ctx'> 				WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);</div><div class='hunk'>@@ -4523,16 +4520,14 @@ static int gfx_v11_0_soft_reset(void *handle)</div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;gfx.me.num_me; ++i) {</div><div class='ctx'> 		for (j = 0; j &lt; adev-&gt;gfx.me.num_queue_per_pipe; j++) {</div><div class='ctx'> 			for (k = 0; k &lt; adev-&gt;gfx.me.num_pipe_per_me; k++) {</div><div class='del'>-				tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL);</div><div class='del'>-				tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, MEID, i);</div><div class='del'>-				tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, QUEUEID, j);</div><div class='del'>-				tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, PIPEID, k);</div><div class='del'>-				WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);</div><div class='add'>+				soc21_grbm_select(adev, i, k, j, 0);</div><div class='ctx'> </div><div class='ctx'> 				WREG32_SOC15(GC, 0, regCP_GFX_HQD_DEQUEUE_REQUEST, 0x1);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	soc21_grbm_select(adev, 0, 0, 0, 0);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Try to acquire the gfx mutex before access to CP_VMID_RESET */</div><div class='ctx'> 	r = gfx_v11_0_request_gfx_index_mutex(adev, 1);</div><div class='hunk'>@@ -6174,6 +6169,8 @@ static const struct amd_ip_funcs gfx_v11_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = gfx_v11_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v11_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = gfx_v11_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_gfx = {</div><div class='hunk'>@@ -6192,7 +6189,7 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_gfx = {</div><div class='ctx'> 		7 + /* PIPELINE_SYNC */</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +</div><div class='del'>-		2 + /* VM_FLUSH */</div><div class='add'>+		4 + /* VM_FLUSH */</div><div class='ctx'> 		8 + /* FENCE for VM_FLUSH */</div><div class='ctx'> 		20 + /* GDS switch */</div><div class='ctx'> 		5 + /* COND_EXEC */</div><div class='hunk'>@@ -6278,7 +6275,6 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_kiq = {</div><div class='ctx'> 		7 + /* gfx_v11_0_ring_emit_pipeline_sync */</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +</div><div class='del'>-		2 + /* gfx_v11_0_ring_emit_vm_flush */</div><div class='ctx'> 		8 + 8 + 8, /* gfx_v11_0_ring_emit_fence_kiq x3 for user fence, vm fence */</div><div class='ctx'> 	.emit_ib_size =	7, /* gfx_v11_0_ring_emit_ib_compute */</div><div class='ctx'> 	.emit_ib = gfx_v11_0_ring_emit_ib_compute,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c<br/>index 34f9211b2679..d0992ce9fb47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c</a></div><div class='hunk'>@@ -3457,6 +3457,8 @@ static const struct amd_ip_funcs gfx_v6_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = gfx_v6_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = gfx_v6_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v6_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c<br/>index 86a4865b1ae5..541dbd70d8c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a></div><div class='hunk'>@@ -4977,6 +4977,8 @@ static const struct amd_ip_funcs gfx_v7_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = gfx_v7_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = gfx_v7_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v7_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c<br/>index 202ddda57f98..2f0e72caee1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a></div><div class='hunk'>@@ -6878,6 +6878,8 @@ static const struct amd_ip_funcs gfx_v8_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = gfx_v8_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v8_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = gfx_v8_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c<br/>index 6f97a6d0e6d0..3c8c5abf35ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c</a></div><div class='hunk'>@@ -1249,7 +1249,7 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)</div><div class='ctx'> static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev,</div><div class='ctx'> 					  char *chip_name)</div><div class='ctx'> {</div><div class='del'>-	char fw_name[30];</div><div class='add'>+	char fw_name[50];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", chip_name);</div><div class='hunk'>@@ -1282,7 +1282,7 @@ out:</div><div class='ctx'> static int gfx_v9_0_init_rlc_microcode(struct amdgpu_device *adev,</div><div class='ctx'> 				       char *chip_name)</div><div class='ctx'> {</div><div class='del'>-	char fw_name[30];</div><div class='add'>+	char fw_name[53];</div><div class='ctx'> 	int err;</div><div class='ctx'> 	const struct rlc_firmware_header_v2_0 *rlc_hdr;</div><div class='ctx'> 	uint16_t version_major;</div><div class='hunk'>@@ -1337,7 +1337,7 @@ static bool gfx_v9_0_load_mec2_fw_bin_support(struct amdgpu_device *adev)</div><div class='ctx'> static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,</div><div class='ctx'> 					      char *chip_name)</div><div class='ctx'> {</div><div class='del'>-	char fw_name[30];</div><div class='add'>+	char fw_name[50];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(adev) &amp;&amp; (adev-&gt;asic_type == CHIP_ALDEBARAN))</div><div class='hunk'>@@ -6856,6 +6856,8 @@ static const struct amd_ip_funcs gfx_v9_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = gfx_v9_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v9_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = gfx_v9_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_gfx = {</div><div class='hunk'>@@ -6981,7 +6983,6 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = {</div><div class='ctx'> 		7 + /* gfx_v9_0_ring_emit_pipeline_sync */</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +</div><div class='del'>-		2 + /* gfx_v9_0_ring_emit_vm_flush */</div><div class='ctx'> 		8 + 8 + 8 + /* gfx_v9_0_ring_emit_fence x3 for user fence, vm fence */</div><div class='ctx'> 		7 + /* gfx_v9_0_emit_mem_sync */</div><div class='ctx'> 		5 + /* gfx_v9_0_emit_wave_limit for updating mmSPI_WCL_PIPE_PERCENT_GFX register */</div><div class='hunk'>@@ -7019,7 +7020,6 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {</div><div class='ctx'> 		7 + /* gfx_v9_0_ring_emit_pipeline_sync */</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +</div><div class='ctx'> 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +</div><div class='del'>-		2 + /* gfx_v9_0_ring_emit_vm_flush */</div><div class='ctx'> 		8 + 8 + 8, /* gfx_v9_0_ring_emit_fence_kiq x3 for user fence, vm fence */</div><div class='ctx'> 	.emit_ib_size =	7, /* gfx_v9_0_ring_emit_ib_compute */</div><div class='ctx'> 	.emit_fence = gfx_v9_0_ring_emit_fence_kiq,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c<br/>index 065b2bd5f5a6..3f4fd2f08163 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c</a></div><div class='hunk'>@@ -1909,18 +1909,7 @@ static void gfx_v9_4_2_reset_sq_timeout_status(struct amdgpu_device *adev)</div><div class='ctx'> 	mutex_unlock(&amp;adev-&gt;grbm_idx_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool gfx_v9_4_2_query_uctl2_poison_status(struct amdgpu_device *adev)</div><div class='del'>-{</div><div class='del'>-	u32 status = 0;</div><div class='del'>-	struct amdgpu_vmhub *hub;</div><div class='del'>-</div><div class='del'>-	hub = &amp;adev-&gt;vmhub[AMDGPU_GFXHUB(0)];</div><div class='del'>-	status = RREG32(hub-&gt;vm_l2_pro_fault_status);</div><div class='del'>-	/* reset page fault status */</div><div class='del'>-	WREG32_P(hub-&gt;vm_l2_pro_fault_cntl, 1, ~1);</div><div class='ctx'> </div><div class='del'>-	return REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_ras_block_hw_ops  gfx_v9_4_2_ras_ops = {</div><div class='ctx'> 		.query_ras_error_count = &amp;gfx_v9_4_2_query_ras_error_count,</div><div class='hunk'>@@ -1934,5 +1923,4 @@ struct amdgpu_gfx_ras gfx_v9_4_2_ras = {</div><div class='ctx'> 		.hw_ops = &amp;gfx_v9_4_2_ras_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.enable_watchdog_timer = &amp;gfx_v9_4_2_enable_watchdog_timer,</div><div class='del'>-	.query_utcl2_poison_status = gfx_v9_4_2_query_uctl2_poison_status,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c<br/>index b53c8fd4e8cf..7b16e8cca86a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c</a></div><div class='hunk'>@@ -431,16 +431,16 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int gfx_v9_4_3_init_microcode(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	const char *chip_name;</div><div class='add'>+	char ucode_prefix[15];</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	chip_name = "gc_9_4_3";</div><div class='add'>+	amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));</div><div class='ctx'> </div><div class='del'>-	r = gfx_v9_4_3_init_rlc_microcode(adev, chip_name);</div><div class='add'>+	r = gfx_v9_4_3_init_rlc_microcode(adev, ucode_prefix);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = gfx_v9_4_3_init_cp_compute_microcode(adev, chip_name);</div><div class='add'>+	r = gfx_v9_4_3_init_cp_compute_microcode(adev, ucode_prefix);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='hunk'>@@ -680,38 +680,44 @@ static const struct amdgpu_gfx_funcs gfx_v9_4_3_gfx_funcs = {</div><div class='ctx'> 	.ih_node_to_logical_xcc = &amp;gfx_v9_4_3_ih_to_xcc_inst,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int gfx_v9_4_3_aca_bank_generate_report(struct aca_handle *handle,</div><div class='del'>-					       struct aca_bank *bank, enum aca_error_type type,</div><div class='del'>-					       struct aca_bank_report *report, void *data)</div><div class='add'>+static int gfx_v9_4_3_aca_bank_parser(struct aca_handle *handle,</div><div class='add'>+				      struct aca_bank *bank, enum aca_smu_type type,</div><div class='add'>+				      void *data)</div><div class='ctx'> {</div><div class='del'>-	u64 status, misc0;</div><div class='add'>+	struct aca_bank_info info;</div><div class='add'>+	u64 misc0;</div><div class='ctx'> 	u32 instlo;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	status = bank-&gt;regs[ACA_REG_IDX_STATUS];</div><div class='del'>-	if ((type == ACA_ERROR_TYPE_UE &amp;&amp;</div><div class='del'>-	     ACA_REG__STATUS__ERRORCODEEXT(status) == ACA_EXTERROR_CODE_FAULT) ||</div><div class='del'>-	    (type == ACA_ERROR_TYPE_CE &amp;&amp;</div><div class='del'>-	     ACA_REG__STATUS__ERRORCODEEXT(status) == ACA_EXTERROR_CODE_CE)) {</div><div class='add'>+	ret = aca_bank_info_decode(bank, &amp;info);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		ret = aca_bank_info_decode(bank, &amp;report-&gt;info);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	/* NOTE: overwrite info.die_id with xcd id for gfx */</div><div class='add'>+	instlo = ACA_REG__IPID__INSTANCEIDLO(bank-&gt;regs[ACA_REG_IDX_IPID]);</div><div class='add'>+	instlo &amp;= GENMASK(31, 1);</div><div class='add'>+	info.die_id = instlo == mmSMNAID_XCD0_MCA_SMU ? 0 : 1;</div><div class='ctx'> </div><div class='del'>-		/* NOTE: overwrite info.die_id with xcd id for gfx */</div><div class='del'>-		instlo = ACA_REG__IPID__INSTANCEIDLO(bank-&gt;regs[ACA_REG_IDX_IPID]);</div><div class='del'>-		instlo &amp;= GENMASK(31, 1);</div><div class='del'>-		report-&gt;info.die_id = instlo == mmSMNAID_XCD0_MCA_SMU ? 0 : 1;</div><div class='add'>+	misc0 = bank-&gt;regs[ACA_REG_IDX_MISC0];</div><div class='ctx'> </div><div class='del'>-		misc0 = bank-&gt;regs[ACA_REG_IDX_MISC0];</div><div class='del'>-		report-&gt;count[type] = ACA_REG__MISC0__ERRCNT(misc0);</div><div class='add'>+	switch (type) {</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info,</div><div class='add'>+						     ACA_ERROR_TYPE_UE, 1ULL);</div><div class='add'>+		break;</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info,</div><div class='add'>+						     ACA_ERROR_TYPE_CE, ACA_REG__MISC0__ERRCNT(misc0));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool gfx_v9_4_3_aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank,</div><div class='del'>-					 enum aca_error_type type, void *data)</div><div class='add'>+					 enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	u32 instlo;</div><div class='ctx'> </div><div class='hunk'>@@ -730,7 +736,7 @@ static bool gfx_v9_4_3_aca_bank_is_valid(struct aca_handle *handle, struct aca_b</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct aca_bank_ops gfx_v9_4_3_aca_bank_ops = {</div><div class='del'>-	.aca_bank_generate_report = gfx_v9_4_3_aca_bank_generate_report,</div><div class='add'>+	.aca_bank_parser = gfx_v9_4_3_aca_bank_parser,</div><div class='ctx'> 	.aca_bank_is_valid = gfx_v9_4_3_aca_bank_is_valid,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2398,10 +2404,10 @@ gfx_v9_4_3_xcc_update_coarse_grain_clock_gating(struct amdgpu_device *adev,</div><div class='ctx'> 		if (def != data)</div><div class='ctx'> 			WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);</div><div class='ctx'> </div><div class='del'>-		/* enable cgcg FSM(0x0000363F) */</div><div class='add'>+		/* CGCG Hysteresis: 400us */</div><div class='ctx'> 		def = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL);</div><div class='ctx'> </div><div class='del'>-		data = (0x36</div><div class='add'>+		data = (0x2710</div><div class='ctx'> 			&lt;&lt; RLC_CGCG_CGLS_CTRL__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |</div><div class='ctx'> 		       RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK;</div><div class='ctx'> 		if (adev-&gt;cg_flags &amp; AMD_CG_SUPPORT_GFX_CGLS)</div><div class='hunk'>@@ -2410,10 +2416,10 @@ gfx_v9_4_3_xcc_update_coarse_grain_clock_gating(struct amdgpu_device *adev,</div><div class='ctx'> 		if (def != data)</div><div class='ctx'> 			WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, data);</div><div class='ctx'> </div><div class='del'>-		/* set IDLE_POLL_COUNT(0x00900100) */</div><div class='add'>+		/* set IDLE_POLL_COUNT(0x33450100)*/</div><div class='ctx'> 		def = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_WPTR_POLL_CNTL);</div><div class='ctx'> 		data = (0x0100 &lt;&lt; CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) |</div><div class='del'>-			(0x0090 &lt;&lt; CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT__SHIFT);</div><div class='add'>+			(0x3345 &lt;&lt; CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT__SHIFT);</div><div class='ctx'> 		if (def != data)</div><div class='ctx'> 			WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_WPTR_POLL_CNTL, data);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -4010,6 +4016,8 @@ static const struct amd_ip_funcs gfx_v9_4_3_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = gfx_v9_4_3_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gfx_v9_4_3_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = gfx_v9_4_3_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs gfx_v9_4_3_ring_funcs_compute = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c<br/>index 22175da0e16a..d200310d1731 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c</a></div><div class='hunk'>@@ -443,6 +443,22 @@ static void gfxhub_v1_0_init(struct amdgpu_device *adev)</div><div class='ctx'> 		mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool gfxhub_v1_0_query_utcl2_poison_status(struct amdgpu_device *adev,</div><div class='add'>+				int xcc_id)</div><div class='add'>+{</div><div class='add'>+	u32 status = 0;</div><div class='add'>+	struct amdgpu_vmhub *hub;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	hub = &amp;adev-&gt;vmhub[AMDGPU_GFXHUB(0)];</div><div class='add'>+	status = RREG32(hub-&gt;vm_l2_pro_fault_status);</div><div class='add'>+	/* reset page fault status */</div><div class='add'>+	WREG32_P(hub-&gt;vm_l2_pro_fault_cntl, 1, ~1);</div><div class='add'>+</div><div class='add'>+	return REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = {</div><div class='ctx'> 	.get_mc_fb_offset = gfxhub_v1_0_get_mc_fb_offset,</div><div class='hunk'>@@ -452,4 +468,5 @@ const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = {</div><div class='ctx'> 	.set_fault_enable_default = gfxhub_v1_0_set_fault_enable_default,</div><div class='ctx'> 	.init = gfxhub_v1_0_init,</div><div class='ctx'> 	.get_xgmi_info = gfxhub_v1_1_get_xgmi_info,</div><div class='add'>+	.query_utcl2_poison_status = gfxhub_v1_0_query_utcl2_poison_status,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c<br/>index 49aecdcee006..77df8c9cbad2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c</a></div><div class='hunk'>@@ -620,6 +620,20 @@ static int gfxhub_v1_2_get_xgmi_info(struct amdgpu_device *adev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool gfxhub_v1_2_query_utcl2_poison_status(struct amdgpu_device *adev,</div><div class='add'>+				int xcc_id)</div><div class='add'>+{</div><div class='add'>+	u32 fed, status;</div><div class='add'>+</div><div class='add'>+	status = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regVM_L2_PROTECTION_FAULT_STATUS);</div><div class='add'>+	fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);</div><div class='add'>+	/* reset page fault status */</div><div class='add'>+	WREG32_P(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),</div><div class='add'>+			regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);</div><div class='add'>+</div><div class='add'>+	return fed;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = {</div><div class='ctx'> 	.get_mc_fb_offset = gfxhub_v1_2_get_mc_fb_offset,</div><div class='ctx'> 	.setup_vm_pt_regs = gfxhub_v1_2_setup_vm_pt_regs,</div><div class='hunk'>@@ -628,6 +642,7 @@ const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = {</div><div class='ctx'> 	.set_fault_enable_default = gfxhub_v1_2_set_fault_enable_default,</div><div class='ctx'> 	.init = gfxhub_v1_2_init,</div><div class='ctx'> 	.get_xgmi_info = gfxhub_v1_2_get_xgmi_info,</div><div class='add'>+	.query_utcl2_poison_status = gfxhub_v1_2_query_utcl2_poison_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c<br/>index 23b478639921..3e38d8bfcb69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c</a></div><div class='hunk'>@@ -1115,6 +1115,8 @@ static const struct amd_ip_funcs gmc_v6_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = gmc_v6_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = gmc_v6_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gmc_v6_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_gmc_funcs gmc_v6_0_gmc_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c<br/>index 3da7b6a2b00d..85df8fc81065 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a></div><div class='hunk'>@@ -1354,6 +1354,8 @@ static const struct amd_ip_funcs gmc_v7_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = gmc_v7_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = gmc_v7_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gmc_v7_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_gmc_funcs gmc_v7_0_gmc_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c<br/>index d20e5f20ee31..fc97757e33d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c</a></div><div class='hunk'>@@ -1717,6 +1717,8 @@ static const struct amd_ip_funcs gmc_v8_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = gmc_v8_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = gmc_v8_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = gmc_v8_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_gmc_funcs gmc_v8_0_gmc_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br/>index 47b63a4ce68b..c4ec1358f3aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c</a></div><div class='hunk'>@@ -548,7 +548,7 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev,</div><div class='ctx'> {</div><div class='ctx'> 	bool retry_fault = !!(entry-&gt;src_data[1] &amp; 0x80);</div><div class='ctx'> 	bool write_fault = !!(entry-&gt;src_data[1] &amp; 0x20);</div><div class='del'>-	uint32_t status = 0, cid = 0, rw = 0;</div><div class='add'>+	uint32_t status = 0, cid = 0, rw = 0, fed = 0;</div><div class='ctx'> 	struct amdgpu_task_info *task_info;</div><div class='ctx'> 	struct amdgpu_vmhub *hub;</div><div class='ctx'> 	const char *mmhub_cid;</div><div class='hunk'>@@ -664,6 +664,13 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev,</div><div class='ctx'> 	status = RREG32(hub-&gt;vm_l2_pro_fault_status);</div><div class='ctx'> 	cid = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, CID);</div><div class='ctx'> 	rw = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, RW);</div><div class='add'>+	fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);</div><div class='add'>+</div><div class='add'>+	/* for fed error, kfd will handle it, return directly */</div><div class='add'>+	if (fed &amp;&amp; amdgpu_ras_is_poison_mode_supported(adev) &amp;&amp;</div><div class='add'>+	    (amdgpu_ip_version(adev, GC_HWIP, 0) &gt;= IP_VERSION(9, 4, 2)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	WREG32_P(hub-&gt;vm_l2_pro_fault_cntl, 1, ~1);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_vm_update_fault_cache(adev, entry-&gt;pasid, addr, status, vmhub);</div><div class='hunk'>@@ -1450,7 +1457,6 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;umc.channel_offs = UMC_V12_0_PER_CHANNEL_OFFSET;</div><div class='ctx'> 		adev-&gt;umc.active_mask = adev-&gt;aid_mask;</div><div class='ctx'> 		adev-&gt;umc.retire_unit = UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL;</div><div class='del'>-		adev-&gt;umc.channel_idx_tbl = &amp;umc_v12_0_channel_idx_tbl[0][0][0];</div><div class='ctx'> 		if (!adev-&gt;gmc.xgmi.connected_to_cpu &amp;&amp; !adev-&gt;gmc.is_app_apu)</div><div class='ctx'> 			adev-&gt;umc.ras = &amp;umc_v12_0_ras;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c<br/>index 2c02ae69883d..07984f7c3ae7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/iceland_ih.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/iceland_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/iceland_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/iceland_ih.c</a></div><div class='hunk'>@@ -425,6 +425,8 @@ static const struct amd_ip_funcs iceland_ih_ip_funcs = {</div><div class='ctx'> 	.soft_reset = iceland_ih_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = iceland_ih_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = iceland_ih_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs iceland_ih_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c<br/>index ad4ad39f128f..3cb64c8f7175 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ih_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/ih_v6_0.c</a></div><div class='hunk'>@@ -346,6 +346,21 @@ static int ih_v6_0_irq_init(struct amdgpu_device *adev)</div><div class='ctx'> 			    DELAY, 3);</div><div class='ctx'> 	WREG32_SOC15(OSSSYS, 0, regIH_MSI_STORM_CTRL, tmp);</div><div class='ctx'> </div><div class='add'>+	/* Redirect the interrupts to IH RB1 for dGPU */</div><div class='add'>+	if (adev-&gt;irq.ih1.ring_size) {</div><div class='add'>+		tmp = RREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_INDEX, INDEX, 0);</div><div class='add'>+		WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX, tmp);</div><div class='add'>+</div><div class='add'>+		tmp = RREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_DATA, CLIENT_ID, 0xa);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_DATA, SOURCE_ID, 0x0);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_DATA,</div><div class='add'>+				    SOURCE_ID_MATCH_ENABLE, 0x1);</div><div class='add'>+</div><div class='add'>+		WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA, tmp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pci_set_master(adev-&gt;pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* enable interrupts */</div><div class='hunk'>@@ -549,8 +564,15 @@ static int ih_v6_0_sw_init(void *handle)</div><div class='ctx'> 	adev-&gt;irq.ih.use_doorbell = true;</div><div class='ctx'> 	adev-&gt;irq.ih.doorbell_index = adev-&gt;doorbell_index.ih &lt;&lt; 1;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;irq.ih1.ring_size = 0;</div><div class='del'>-	adev-&gt;irq.ih2.ring_size = 0;</div><div class='add'>+	if (!(adev-&gt;flags &amp; AMD_IS_APU)) {</div><div class='add'>+		r = amdgpu_ih_ring_init(adev, &amp;adev-&gt;irq.ih1, IH_RING_SIZE,</div><div class='add'>+					use_bus_addr);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		adev-&gt;irq.ih1.use_doorbell = true;</div><div class='add'>+		adev-&gt;irq.ih1.doorbell_index = (adev-&gt;doorbell_index.ih + 1) &lt;&lt; 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* initialize ih control register offset */</div><div class='ctx'> 	ih_v6_0_init_register_offset(adev);</div><div class='hunk'>@@ -748,6 +770,8 @@ static const struct amd_ip_funcs ih_v6_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = ih_v6_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = ih_v6_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = ih_v6_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs ih_v6_0_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c<br/>index b8da0fc29378..0fbf5fa7b0f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ih_v6_1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/ih_v6_1.c</a></div><div class='hunk'>@@ -346,6 +346,21 @@ static int ih_v6_1_irq_init(struct amdgpu_device *adev)</div><div class='ctx'> 			    DELAY, 3);</div><div class='ctx'> 	WREG32_SOC15(OSSSYS, 0, regIH_MSI_STORM_CTRL, tmp);</div><div class='ctx'> </div><div class='add'>+	/* Redirect the interrupts to IH RB1 for dGPU */</div><div class='add'>+	if (adev-&gt;irq.ih1.ring_size) {</div><div class='add'>+		tmp = RREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_INDEX, INDEX, 0);</div><div class='add'>+		WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX, tmp);</div><div class='add'>+</div><div class='add'>+		tmp = RREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_DATA, CLIENT_ID, 0xa);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_DATA, SOURCE_ID, 0x0);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, IH_RING1_CLIENT_CFG_DATA,</div><div class='add'>+				    SOURCE_ID_MATCH_ENABLE, 0x1);</div><div class='add'>+</div><div class='add'>+		WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA, tmp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pci_set_master(adev-&gt;pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* enable interrupts */</div><div class='hunk'>@@ -550,8 +565,15 @@ static int ih_v6_1_sw_init(void *handle)</div><div class='ctx'> 	adev-&gt;irq.ih.use_doorbell = true;</div><div class='ctx'> 	adev-&gt;irq.ih.doorbell_index = adev-&gt;doorbell_index.ih &lt;&lt; 1;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;irq.ih1.ring_size = 0;</div><div class='del'>-	adev-&gt;irq.ih2.ring_size = 0;</div><div class='add'>+	if (!(adev-&gt;flags &amp; AMD_IS_APU)) {</div><div class='add'>+		r = amdgpu_ih_ring_init(adev, &amp;adev-&gt;irq.ih1, IH_RING_SIZE,</div><div class='add'>+					use_bus_addr);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		adev-&gt;irq.ih1.use_doorbell = true;</div><div class='add'>+		adev-&gt;irq.ih1.doorbell_index = (adev-&gt;doorbell_index.ih + 1) &lt;&lt; 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* initialize ih control register offset */</div><div class='ctx'> 	ih_v6_1_init_register_offset(adev);</div><div class='hunk'>@@ -753,6 +775,8 @@ static const struct amd_ip_funcs ih_v6_1_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = ih_v6_1_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = ih_v6_1_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = ih_v6_1_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs ih_v6_1_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c<br/>index 7aed96fa10a9..aa6235dd4f2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ih_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/ih_v7_0.c</a></div><div class='hunk'>@@ -749,6 +749,8 @@ static const struct amd_ip_funcs ih_v7_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = ih_v7_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = ih_v7_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = ih_v7_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs ih_v7_0_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c<br/>index 1c8116d75f63..ef3e42f6b841 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c</a></div><div class='hunk'>@@ -759,6 +759,8 @@ static const struct amd_ip_funcs jpeg_v2_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v2_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v2_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c<br/>index 99cd49ee8ef6..afeaf3c64e27 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c</a></div><div class='hunk'>@@ -632,6 +632,8 @@ static const struct amd_ip_funcs jpeg_v2_5_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v2_5_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v2_5_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amd_ip_funcs jpeg_v2_6_ip_funcs = {</div><div class='hunk'>@@ -652,6 +654,8 @@ static const struct amd_ip_funcs jpeg_v2_6_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v2_5_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v2_5_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v2_5_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c<br/>index a92481da60cd..1c7cf4800bf7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c</a></div><div class='hunk'>@@ -557,6 +557,8 @@ static const struct amd_ip_funcs jpeg_v3_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v3_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v3_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v3_0_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c<br/>index 88ea58d5c4ab..237fe5df5a8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c</a></div><div class='hunk'>@@ -719,6 +719,8 @@ static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v4_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v4_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c<br/>index 32caeb37cef9..d66af11aa66c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c</a></div><div class='hunk'>@@ -1053,6 +1053,8 @@ static const struct amd_ip_funcs jpeg_v4_0_3_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v4_0_3_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v4_0_3_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v4_0_3_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c<br/>index edf5bcdd2bc9..da6bb9022b80 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c</a></div><div class='hunk'>@@ -762,6 +762,8 @@ static const struct amd_ip_funcs jpeg_v4_0_5_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v4_0_5_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v4_0_5_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v4_0_5_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c<br/>index e70200f97555..64c856bfe0cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c</a></div><div class='hunk'>@@ -513,6 +513,8 @@ static const struct amd_ip_funcs jpeg_v5_0_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = jpeg_v5_0_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = jpeg_v5_0_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs jpeg_v5_0_0_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br/>index 1e5ad1e08d2a..a626bf904926 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mes_v10_1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/mes_v10_1.c</a></div><div class='hunk'>@@ -1176,6 +1176,8 @@ static const struct amd_ip_funcs mes_v10_1_ip_funcs = {</div><div class='ctx'> 	.hw_fini = mes_v10_1_hw_fini,</div><div class='ctx'> 	.suspend = mes_v10_1_suspend,</div><div class='ctx'> 	.resume = mes_v10_1_resume,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version mes_v10_1_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br/>index 63f281a9984d..0d1407f25005 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mes_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/mes_v11_0.c</a></div><div class='hunk'>@@ -100,18 +100,76 @@ static const struct amdgpu_ring_funcs mes_v11_0_ring_funcs = {</div><div class='ctx'> 	.insert_nop = amdgpu_ring_insert_nop,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const char *mes_v11_0_opcodes[] = {</div><div class='add'>+	"SET_HW_RSRC",</div><div class='add'>+	"SET_SCHEDULING_CONFIG",</div><div class='add'>+	"ADD_QUEUE",</div><div class='add'>+	"REMOVE_QUEUE",</div><div class='add'>+	"PERFORM_YIELD",</div><div class='add'>+	"SET_GANG_PRIORITY_LEVEL",</div><div class='add'>+	"SUSPEND",</div><div class='add'>+	"RESUME",</div><div class='add'>+	"RESET",</div><div class='add'>+	"SET_LOG_BUFFER",</div><div class='add'>+	"CHANGE_GANG_PRORITY",</div><div class='add'>+	"QUERY_SCHEDULER_STATUS",</div><div class='add'>+	"PROGRAM_GDS",</div><div class='add'>+	"SET_DEBUG_VMID",</div><div class='add'>+	"MISC",</div><div class='add'>+	"UPDATE_ROOT_PAGE_TABLE",</div><div class='add'>+	"AMD_LOG",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *mes_v11_0_misc_opcodes[] = {</div><div class='add'>+	"WRITE_REG",</div><div class='add'>+	"INV_GART",</div><div class='add'>+	"QUERY_STATUS",</div><div class='add'>+	"READ_REG",</div><div class='add'>+	"WAIT_REG_MEM",</div><div class='add'>+	"SET_SHADER_DEBUGGER",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *mes_v11_0_get_op_string(union MESAPI__MISC *x_pkt)</div><div class='add'>+{</div><div class='add'>+	const char *op_str = NULL;</div><div class='add'>+</div><div class='add'>+	if (x_pkt-&gt;header.opcode &lt; ARRAY_SIZE(mes_v11_0_opcodes))</div><div class='add'>+		op_str = mes_v11_0_opcodes[x_pkt-&gt;header.opcode];</div><div class='add'>+</div><div class='add'>+	return op_str;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *mes_v11_0_get_misc_op_string(union MESAPI__MISC *x_pkt)</div><div class='add'>+{</div><div class='add'>+	const char *op_str = NULL;</div><div class='add'>+</div><div class='add'>+	if ((x_pkt-&gt;header.opcode == MES_SCH_API_MISC) &amp;&amp;</div><div class='add'>+	    (x_pkt-&gt;opcode &lt; ARRAY_SIZE(mes_v11_0_misc_opcodes)))</div><div class='add'>+		op_str = mes_v11_0_misc_opcodes[x_pkt-&gt;opcode];</div><div class='add'>+</div><div class='add'>+	return op_str;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,</div><div class='ctx'> 						    void *pkt, int size,</div><div class='ctx'> 						    int api_status_off)</div><div class='ctx'> {</div><div class='ctx'> 	int ndw = size / 4;</div><div class='ctx'> 	signed long r;</div><div class='del'>-	union MESAPI__ADD_QUEUE *x_pkt = pkt;</div><div class='add'>+	union MESAPI__MISC *x_pkt = pkt;</div><div class='ctx'> 	struct MES_API_STATUS *api_status;</div><div class='ctx'> 	struct amdgpu_device *adev = mes-&gt;adev;</div><div class='ctx'> 	struct amdgpu_ring *ring = &amp;mes-&gt;ring;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	signed long timeout = adev-&gt;usec_timeout;</div><div class='add'>+	signed long timeout = 3000000; /* 3000 ms */</div><div class='add'>+	const char *op_str, *misc_op_str;</div><div class='add'>+	u32 fence_offset;</div><div class='add'>+	u64 fence_gpu_addr;</div><div class='add'>+	u64 *fence_ptr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (x_pkt-&gt;header.opcode &gt;= MES_SCH_API_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode) {</div><div class='ctx'> 		timeout *= 100;</div><div class='hunk'>@@ -121,27 +179,52 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,</div><div class='ctx'> 	}</div><div class='ctx'> 	BUG_ON(size % 4 != 0);</div><div class='ctx'> </div><div class='add'>+	ret = amdgpu_device_wb_get(adev, &amp;fence_offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	fence_gpu_addr =</div><div class='add'>+		adev-&gt;wb.gpu_addr + (fence_offset * 4);</div><div class='add'>+	fence_ptr = (u64 *)&amp;adev-&gt;wb.wb[fence_offset];</div><div class='add'>+	*fence_ptr = 0;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;mes-&gt;ring_lock, flags);</div><div class='ctx'> 	if (amdgpu_ring_alloc(ring, ndw)) {</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;mes-&gt;ring_lock, flags);</div><div class='add'>+		amdgpu_device_wb_free(adev, fence_offset);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	api_status = (struct MES_API_STATUS *)((char *)pkt + api_status_off);</div><div class='del'>-	api_status-&gt;api_completion_fence_addr = mes-&gt;ring.fence_drv.gpu_addr;</div><div class='del'>-	api_status-&gt;api_completion_fence_value = ++mes-&gt;ring.fence_drv.sync_seq;</div><div class='add'>+	api_status-&gt;api_completion_fence_addr = fence_gpu_addr;</div><div class='add'>+	api_status-&gt;api_completion_fence_value = 1;</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_ring_write_multiple(ring, pkt, ndw);</div><div class='ctx'> 	amdgpu_ring_commit(ring);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;mes-&gt;ring_lock, flags);</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG("MES msg=%d was emitted\n", x_pkt-&gt;header.opcode);</div><div class='add'>+	op_str = mes_v11_0_get_op_string(x_pkt);</div><div class='add'>+	misc_op_str = mes_v11_0_get_misc_op_string(x_pkt);</div><div class='add'>+</div><div class='add'>+	if (misc_op_str)</div><div class='add'>+		dev_dbg(adev-&gt;dev, "MES msg=%s (%s) was emitted\n", op_str, misc_op_str);</div><div class='add'>+	else if (op_str)</div><div class='add'>+		dev_dbg(adev-&gt;dev, "MES msg=%s was emitted\n", op_str);</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(adev-&gt;dev, "MES msg=%d was emitted\n", x_pkt-&gt;header.opcode);</div><div class='ctx'> </div><div class='del'>-	r = amdgpu_fence_wait_polling(ring, ring-&gt;fence_drv.sync_seq,</div><div class='del'>-		      timeout);</div><div class='add'>+	r = amdgpu_mes_fence_wait_polling(fence_ptr, (u64)1, timeout);</div><div class='add'>+	amdgpu_device_wb_free(adev, fence_offset);</div><div class='ctx'> 	if (r &lt; 1) {</div><div class='del'>-		DRM_ERROR("MES failed to response msg=%d\n",</div><div class='del'>-			  x_pkt-&gt;header.opcode);</div><div class='add'>+</div><div class='add'>+		if (misc_op_str)</div><div class='add'>+			dev_err(adev-&gt;dev, "MES failed to respond to msg=%s (%s)\n",</div><div class='add'>+				op_str, misc_op_str);</div><div class='add'>+		else if (op_str)</div><div class='add'>+			dev_err(adev-&gt;dev, "MES failed to respond to msg=%s\n",</div><div class='add'>+				op_str);</div><div class='add'>+		else</div><div class='add'>+			dev_err(adev-&gt;dev, "MES failed to respond to msg=%d\n",</div><div class='add'>+				x_pkt-&gt;header.opcode);</div><div class='ctx'> </div><div class='ctx'> 		while (halt_if_hws_hang)</div><div class='ctx'> 			schedule();</div><div class='hunk'>@@ -422,6 +505,36 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)</div><div class='ctx'> 			offsetof(union MESAPI_SET_HW_RESOURCES, api_status));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mes_v11_0_set_hw_resources_1(struct amdgpu_mes *mes)</div><div class='add'>+{</div><div class='add'>+	int size = 128 * PAGE_SIZE;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct amdgpu_device *adev = mes-&gt;adev;</div><div class='add'>+	union MESAPI_SET_HW_RESOURCES_1 mes_set_hw_res_pkt;</div><div class='add'>+	memset(&amp;mes_set_hw_res_pkt, 0, sizeof(mes_set_hw_res_pkt));</div><div class='add'>+</div><div class='add'>+	mes_set_hw_res_pkt.header.type = MES_API_TYPE_SCHEDULER;</div><div class='add'>+	mes_set_hw_res_pkt.header.opcode = MES_SCH_API_SET_HW_RSRC_1;</div><div class='add'>+	mes_set_hw_res_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;</div><div class='add'>+	mes_set_hw_res_pkt.enable_mes_info_ctx = 1;</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,</div><div class='add'>+				AMDGPU_GEM_DOMAIN_VRAM,</div><div class='add'>+				&amp;mes-&gt;resource_1,</div><div class='add'>+				&amp;mes-&gt;resource_1_gpu_addr,</div><div class='add'>+				&amp;mes-&gt;resource_1_addr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) failed to create mes resource_1 bo\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mes_set_hw_res_pkt.mes_info_ctx_mc_addr = mes-&gt;resource_1_gpu_addr;</div><div class='add'>+	mes_set_hw_res_pkt.mes_info_ctx_size = mes-&gt;resource_1-&gt;tbo.base.size;</div><div class='add'>+	return mes_v11_0_submit_pkt_and_poll_completion(mes,</div><div class='add'>+			&amp;mes_set_hw_res_pkt, sizeof(mes_set_hw_res_pkt),</div><div class='add'>+			offsetof(union MESAPI_SET_HW_RESOURCES_1, api_status));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct amdgpu_mes_funcs mes_v11_0_funcs = {</div><div class='ctx'> 	.add_hw_queue = mes_v11_0_add_hw_queue,</div><div class='ctx'> 	.remove_hw_queue = mes_v11_0_remove_hw_queue,</div><div class='hunk'>@@ -1203,6 +1316,14 @@ static int mes_v11_0_hw_init(void *handle)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		goto failure;</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_is_mes_info_enable(adev)) {</div><div class='add'>+		r = mes_v11_0_set_hw_resources_1(&amp;adev-&gt;mes);</div><div class='add'>+		if (r) {</div><div class='add'>+			DRM_ERROR("failed mes_v11_0_set_hw_resources_1, r=%d\n", r);</div><div class='add'>+			goto failure;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	r = mes_v11_0_query_sched_status(&amp;adev-&gt;mes);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("MES is busy\n");</div><div class='hunk'>@@ -1226,6 +1347,11 @@ failure:</div><div class='ctx'> </div><div class='ctx'> static int mes_v11_0_hw_fini(void *handle)</div><div class='ctx'> {</div><div class='add'>+	struct amdgpu_device *adev = (struct amdgpu_device *)handle;</div><div class='add'>+	if (amdgpu_sriov_is_mes_info_enable(adev)) {</div><div class='add'>+		amdgpu_bo_free_kernel(&amp;adev-&gt;mes.resource_1, &amp;adev-&gt;mes.resource_1_gpu_addr,</div><div class='add'>+					&amp;adev-&gt;mes.resource_1_addr);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1291,6 +1417,8 @@ static const struct amd_ip_funcs mes_v11_0_ip_funcs = {</div><div class='ctx'> 	.hw_fini = mes_v11_0_hw_fini,</div><div class='ctx'> 	.suspend = mes_v11_0_suspend,</div><div class='ctx'> 	.resume = mes_v11_0_resume,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version mes_v11_0_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c<br/>index c0fc44cdd658..7a1ff298417a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c</a></div><div class='hunk'>@@ -559,6 +559,20 @@ static void mmhub_v1_8_get_clockgating(struct amdgpu_device *adev, u64 *flags)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool mmhub_v1_8_query_utcl2_poison_status(struct amdgpu_device *adev,</div><div class='add'>+				int hub_inst)</div><div class='add'>+{</div><div class='add'>+	u32 fed, status;</div><div class='add'>+</div><div class='add'>+	status = RREG32_SOC15(MMHUB, hub_inst, regVM_L2_PROTECTION_FAULT_STATUS);</div><div class='add'>+	fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);</div><div class='add'>+	/* reset page fault status */</div><div class='add'>+	WREG32_P(SOC15_REG_OFFSET(MMHUB, hub_inst,</div><div class='add'>+			regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);</div><div class='add'>+</div><div class='add'>+	return fed;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = {</div><div class='ctx'> 	.get_fb_location = mmhub_v1_8_get_fb_location,</div><div class='ctx'> 	.init = mmhub_v1_8_init,</div><div class='hunk'>@@ -568,6 +582,7 @@ const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = {</div><div class='ctx'> 	.setup_vm_pt_regs = mmhub_v1_8_setup_vm_pt_regs,</div><div class='ctx'> 	.set_clockgating = mmhub_v1_8_set_clockgating,</div><div class='ctx'> 	.get_clockgating = mmhub_v1_8_get_clockgating,</div><div class='add'>+	.query_utcl2_poison_status = mmhub_v1_8_query_utcl2_poison_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ras_err_status_reg_entry mmhub_v1_8_ce_reg_list[] = {</div><div class='hunk'>@@ -706,28 +721,32 @@ static const struct amdgpu_ras_block_hw_ops mmhub_v1_8_ras_hw_ops = {</div><div class='ctx'> 	.reset_ras_error_count = mmhub_v1_8_reset_ras_error_count,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int mmhub_v1_8_aca_bank_generate_report(struct aca_handle *handle,</div><div class='del'>-					       struct aca_bank *bank, enum aca_error_type type,</div><div class='del'>-					       struct aca_bank_report *report, void *data)</div><div class='add'>+static int mmhub_v1_8_aca_bank_parser(struct aca_handle *handle, struct aca_bank *bank,</div><div class='add'>+				      enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='del'>-	u64 status, misc0;</div><div class='add'>+	struct aca_bank_info info;</div><div class='add'>+	u64 misc0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	status = bank-&gt;regs[ACA_REG_IDX_STATUS];</div><div class='del'>-	if ((type == ACA_ERROR_TYPE_UE &amp;&amp;</div><div class='del'>-	     ACA_REG__STATUS__ERRORCODEEXT(status) == ACA_EXTERROR_CODE_FAULT) ||</div><div class='del'>-	    (type == ACA_ERROR_TYPE_CE &amp;&amp;</div><div class='del'>-	     ACA_REG__STATUS__ERRORCODEEXT(status) == ACA_EXTERROR_CODE_CE)) {</div><div class='del'>-</div><div class='del'>-		ret = aca_bank_info_decode(bank, &amp;report-&gt;info);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		misc0 = bank-&gt;regs[ACA_REG_IDX_MISC0];</div><div class='del'>-		report-&gt;count[type] = ACA_REG__MISC0__ERRCNT(misc0);</div><div class='add'>+	ret = aca_bank_info_decode(bank, &amp;info);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	misc0 = bank-&gt;regs[ACA_REG_IDX_MISC0];</div><div class='add'>+	switch (type) {</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info, ACA_ERROR_TYPE_UE,</div><div class='add'>+						     1ULL);</div><div class='add'>+		break;</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info, ACA_ERROR_TYPE_CE,</div><div class='add'>+						     ACA_REG__MISC0__ERRCNT(misc0));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* reference to smu driver if header file */</div><div class='hunk'>@@ -741,7 +760,7 @@ static int mmhub_v1_8_err_codes[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool mmhub_v1_8_aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank,</div><div class='del'>-					 enum aca_error_type type, void *data)</div><div class='add'>+					 enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	u32 instlo;</div><div class='ctx'> </div><div class='hunk'>@@ -760,7 +779,7 @@ static bool mmhub_v1_8_aca_bank_is_valid(struct aca_handle *handle, struct aca_b</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct aca_bank_ops mmhub_v1_8_aca_bank_ops = {</div><div class='del'>-	.aca_bank_generate_report = mmhub_v1_8_aca_bank_generate_report,</div><div class='add'>+	.aca_bank_parser = mmhub_v1_8_aca_bank_parser,</div><div class='ctx'> 	.aca_bank_is_valid = mmhub_v1_8_aca_bank_is_valid,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c<br/>index a2bd2c3b1ef9..0c7275bca8f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c</a></div><div class='hunk'>@@ -276,6 +276,8 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> 		timeout -= 10;</div><div class='ctx'> 	} while (timeout &gt; 1);</div><div class='ctx'> </div><div class='add'>+	dev_warn(adev-&gt;dev, "waiting IDH_FLR_NOTIFICATION_CMPL timeout\n");</div><div class='add'>+</div><div class='ctx'> flr_done:</div><div class='ctx'> 	atomic_set(&amp;adev-&gt;reset_domain-&gt;in_gpu_reset, 0);</div><div class='ctx'> 	up_write(&amp;adev-&gt;reset_domain-&gt;sem);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c<br/>index 77f5b55decf9..aba00d961627 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c</a></div><div class='hunk'>@@ -309,6 +309,8 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> 		timeout -= 10;</div><div class='ctx'> 	} while (timeout &gt; 1);</div><div class='ctx'> </div><div class='add'>+	dev_warn(adev-&gt;dev, "waiting IDH_FLR_NOTIFICATION_CMPL timeout\n");</div><div class='add'>+</div><div class='ctx'> flr_done:</div><div class='ctx'> 	atomic_set(&amp;adev-&gt;reset_domain-&gt;in_gpu_reset, 0);</div><div class='ctx'> 	up_write(&amp;adev-&gt;reset_domain-&gt;sem);</div><div class='hunk'>@@ -444,7 +446,6 @@ static void xgpu_nv_ras_poison_handler(struct amdgpu_device *adev,</div><div class='ctx'> 		amdgpu_virt_fini_data_exchange(adev);</div><div class='ctx'> 		xgpu_nv_send_access_requests_with_param(adev,</div><div class='ctx'> 					IDH_RAS_POISON,	block, 0, 0);</div><div class='del'>-		amdgpu_virt_init_data_exchange(adev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c<br/>index 4178f4e5dad7..b281462093f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/navi10_ih.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/navi10_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/navi10_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/navi10_ih.c</a></div><div class='hunk'>@@ -713,6 +713,8 @@ static const struct amd_ip_funcs navi10_ih_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = navi10_ih_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = navi10_ih_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = navi10_ih_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs navi10_ih_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c<br/>index 4d7976b77767..12e54047bf79 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/nv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/nv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/nv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/nv.c</a></div><div class='hunk'>@@ -110,7 +110,7 @@ static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn0[]</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='hunk'>@@ -121,7 +121,7 @@ static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn1[]</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -199,7 +199,7 @@ static const struct amdgpu_video_codec_info yc_video_codecs_decode_array[] = {</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1131,4 +1131,6 @@ static const struct amd_ip_funcs nv_common_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = nv_common_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = nv_common_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = nv_common_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c<br/>index 78a95f8f370b..f08a32c18694 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/psp_v14_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/psp_v14_0.c</a></div><div class='hunk'>@@ -169,7 +169,8 @@ static int psp_v14_0_bootloader_load_intf_drv(struct psp_context *psp)</div><div class='ctx'> </div><div class='ctx'> static int psp_v14_0_bootloader_load_dbg_drv(struct psp_context *psp)</div><div class='ctx'> {</div><div class='del'>-	return psp_v14_0_bootloader_load_component(psp, &amp;psp-&gt;dbg_drv, PSP_BL__LOAD_DBGDRV);</div><div class='add'>+	/* dbg_drv was renamed to had_drv in psp v14 */</div><div class='add'>+	return psp_v14_0_bootloader_load_component(psp, &amp;psp-&gt;dbg_drv, PSP_BL__LOAD_HADDRV);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int psp_v14_0_bootloader_load_ras_drv(struct psp_context *psp)</div><div class='hunk'>@@ -177,6 +178,10 @@ static int psp_v14_0_bootloader_load_ras_drv(struct psp_context *psp)</div><div class='ctx'> 	return psp_v14_0_bootloader_load_component(psp, &amp;psp-&gt;ras_drv, PSP_BL__LOAD_RASDRV);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int psp_v14_0_bootloader_load_ipkeymgr_drv(struct psp_context *psp)</div><div class='add'>+{</div><div class='add'>+	return psp_v14_0_bootloader_load_component(psp, &amp;psp-&gt;ipkeymgr_drv, PSP_BL__LOAD_IPKEYMGRDRV);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int psp_v14_0_bootloader_load_sos(struct psp_context *psp)</div><div class='ctx'> {</div><div class='hunk'>@@ -653,6 +658,7 @@ static const struct psp_funcs psp_v14_0_funcs = {</div><div class='ctx'> 	.bootloader_load_intf_drv = psp_v14_0_bootloader_load_intf_drv,</div><div class='ctx'> 	.bootloader_load_dbg_drv = psp_v14_0_bootloader_load_dbg_drv,</div><div class='ctx'> 	.bootloader_load_ras_drv = psp_v14_0_bootloader_load_ras_drv,</div><div class='add'>+	.bootloader_load_ipkeymgr_drv = psp_v14_0_bootloader_load_ipkeymgr_drv,</div><div class='ctx'> 	.bootloader_load_sos = psp_v14_0_bootloader_load_sos,</div><div class='ctx'> 	.ring_create = psp_v14_0_ring_create,</div><div class='ctx'> 	.ring_stop = psp_v14_0_ring_stop,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c<br/>index 07e19caf2bc1..ac8a9b9b3e52 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c</a></div><div class='hunk'>@@ -1113,6 +1113,8 @@ static const struct amd_ip_funcs sdma_v2_4_ip_funcs = {</div><div class='ctx'> 	.soft_reset = sdma_v2_4_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = sdma_v2_4_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = sdma_v2_4_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = {</div><div class='hunk'>@@ -1176,7 +1178,7 @@ static void sdma_v2_4_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: unused</div><div class='add'>+ * @copy_flags: unused</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine (VI).</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1186,7 +1188,7 @@ static void sdma_v2_4_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br/>index 2ad615be4bb3..b8ebdc4ae6f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c</a></div><div class='hunk'>@@ -1553,6 +1553,8 @@ static const struct amd_ip_funcs sdma_v3_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = sdma_v3_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = sdma_v3_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = sdma_v3_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {</div><div class='hunk'>@@ -1616,7 +1618,7 @@ static void sdma_v3_0_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: unused</div><div class='add'>+ * @copy_flags: unused</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine (VI).</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1626,7 +1628,7 @@ static void sdma_v3_0_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br/>index 43775cb67ff5..101038395c3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c</a></div><div class='hunk'>@@ -2021,6 +2021,9 @@ static int sdma_v4_0_process_trap_irq(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("IH: SDMA trap\n");</div><div class='ctx'> 	instance = sdma_v4_0_irq_id_to_seq(entry-&gt;client_id);</div><div class='add'>+	if (instance &lt; 0)</div><div class='add'>+		return instance;</div><div class='add'>+</div><div class='ctx'> 	switch (entry-&gt;ring_id) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		amdgpu_fence_process(&amp;adev-&gt;sdma.instance[instance].ring);</div><div class='hunk'>@@ -2448,7 +2451,7 @@ static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: if a secure copy should be used</div><div class='add'>+ * @copy_flags: copy flags for the buffers</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine (VEGA10/12).</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -2458,11 +2461,11 @@ static void sdma_v4_0_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |</div><div class='del'>-		SDMA_PKT_COPY_LINEAR_HEADER_TMZ(tmz ? 1 : 0);</div><div class='add'>+		SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags &amp; AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0);</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = byte_count - 1;</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = 0; /* src/dst endian swap */</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = lower_32_bits(src_offset);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c<br/>index 82eab49be82b..341b24d8320b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c</a></div><div class='hunk'>@@ -368,7 +368,8 @@ static void sdma_v4_4_2_ring_emit_hdp_flush(struct amdgpu_ring *ring)</div><div class='ctx'> 	u32 ref_and_mask = 0;</div><div class='ctx'> 	const struct nbio_hdp_flush_reg *nbio_hf_reg = adev-&gt;nbio.hdp_flush_reg;</div><div class='ctx'> </div><div class='del'>-	ref_and_mask = nbio_hf_reg-&gt;ref_and_mask_sdma0 &lt;&lt; ring-&gt;me;</div><div class='add'>+	ref_and_mask = nbio_hf_reg-&gt;ref_and_mask_sdma0</div><div class='add'>+		       &lt;&lt; (ring-&gt;me % adev-&gt;sdma.num_inst_per_aid);</div><div class='ctx'> </div><div class='ctx'> 	sdma_v4_4_2_wait_reg_mem(ring, 0, 1,</div><div class='ctx'> 			       adev-&gt;nbio.funcs-&gt;get_hdp_flush_done_offset(adev),</div><div class='hunk'>@@ -1944,7 +1945,7 @@ static void sdma_v4_4_2_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: if a secure copy should be used</div><div class='add'>+ * @copy_flags: copy flags for the buffers</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine.</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1954,11 +1955,11 @@ static void sdma_v4_4_2_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |</div><div class='del'>-		SDMA_PKT_COPY_LINEAR_HEADER_TMZ(tmz ? 1 : 0);</div><div class='add'>+		SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags &amp; AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0);</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = byte_count - 1;</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = 0; /* src/dst endian swap */</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = lower_32_bits(src_offset);</div><div class='hunk'>@@ -2179,35 +2180,39 @@ static const struct amdgpu_ras_block_hw_ops sdma_v4_4_2_ras_hw_ops = {</div><div class='ctx'> 	.reset_ras_error_count = sdma_v4_4_2_reset_ras_error_count,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int sdma_v4_4_2_aca_bank_generate_report(struct aca_handle *handle,</div><div class='del'>-						struct aca_bank *bank, enum aca_error_type type,</div><div class='del'>-						struct aca_bank_report *report, void *data)</div><div class='add'>+static int sdma_v4_4_2_aca_bank_parser(struct aca_handle *handle, struct aca_bank *bank,</div><div class='add'>+				       enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='del'>-	u64 status, misc0;</div><div class='add'>+	struct aca_bank_info info;</div><div class='add'>+	u64 misc0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	status = bank-&gt;regs[ACA_REG_IDX_STATUS];</div><div class='del'>-	if ((type == ACA_ERROR_TYPE_UE &amp;&amp;</div><div class='del'>-	     ACA_REG__STATUS__ERRORCODEEXT(status) == ACA_EXTERROR_CODE_FAULT) ||</div><div class='del'>-	    (type == ACA_ERROR_TYPE_CE &amp;&amp;</div><div class='del'>-	     ACA_REG__STATUS__ERRORCODEEXT(status) == ACA_EXTERROR_CODE_CE)) {</div><div class='add'>+	ret = aca_bank_info_decode(bank, &amp;info);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		ret = aca_bank_info_decode(bank, &amp;report-&gt;info);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		misc0 = bank-&gt;regs[ACA_REG_IDX_MISC0];</div><div class='del'>-		report-&gt;count[type] = ACA_REG__MISC0__ERRCNT(misc0);</div><div class='add'>+	misc0 = bank-&gt;regs[ACA_REG_IDX_MISC0];</div><div class='add'>+	switch (type) {</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info, ACA_ERROR_TYPE_UE,</div><div class='add'>+						     1ULL);</div><div class='add'>+		break;</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='add'>+		ret = aca_error_cache_log_bank_error(handle, &amp;info, ACA_ERROR_TYPE_CE,</div><div class='add'>+						     ACA_REG__MISC0__ERRCNT(misc0));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* CODE_SDMA0 - CODE_SDMA4, reference to smu driver if header file */</div><div class='ctx'> static int sdma_v4_4_2_err_codes[] = { 33, 34, 35, 36 };</div><div class='ctx'> </div><div class='ctx'> static bool sdma_v4_4_2_aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank,</div><div class='del'>-					  enum aca_error_type type, void *data)</div><div class='add'>+					  enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	u32 instlo;</div><div class='ctx'> </div><div class='hunk'>@@ -2226,7 +2231,7 @@ static bool sdma_v4_4_2_aca_bank_is_valid(struct aca_handle *handle, struct aca_</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct aca_bank_ops sdma_v4_4_2_aca_bank_ops = {</div><div class='del'>-	.aca_bank_generate_report = sdma_v4_4_2_aca_bank_generate_report,</div><div class='add'>+	.aca_bank_parser = sdma_v4_4_2_aca_bank_parser,</div><div class='ctx'> 	.aca_bank_is_valid = sdma_v4_4_2_aca_bank_is_valid,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br/>index 883e8a1b8a40..b7d33d78bce0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c</a></div><div class='hunk'>@@ -999,7 +999,8 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 20);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+		if (!ring-&gt;is_mes_queue)</div><div class='add'>+			amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1805,7 +1806,7 @@ static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: if a secure copy should be used</div><div class='add'>+ * @copy_flags: copy flags for the buffers</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine (NAVI10).</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1815,11 +1816,11 @@ static void sdma_v5_0_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |</div><div class='del'>-		SDMA_PKT_COPY_LINEAR_HEADER_TMZ(tmz ? 1 : 0);</div><div class='add'>+		SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags &amp; AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0);</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = byte_count - 1;</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = 0; /* src/dst endian swap */</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = lower_32_bits(src_offset);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br/>index 42f4bd250def..cc9e961f0078 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c</a></div><div class='hunk'>@@ -280,17 +280,21 @@ static void sdma_v5_2_ring_emit_hdp_flush(struct amdgpu_ring *ring)</div><div class='ctx'> 	u32 ref_and_mask = 0;</div><div class='ctx'> 	const struct nbio_hdp_flush_reg *nbio_hf_reg = adev-&gt;nbio.hdp_flush_reg;</div><div class='ctx'> </div><div class='del'>-	ref_and_mask = nbio_hf_reg-&gt;ref_and_mask_sdma0 &lt;&lt; ring-&gt;me;</div><div class='del'>-</div><div class='del'>-	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |</div><div class='del'>-			  SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(1) |</div><div class='del'>-			  SDMA_PKT_POLL_REGMEM_HEADER_FUNC(3)); /* == */</div><div class='del'>-	amdgpu_ring_write(ring, (adev-&gt;nbio.funcs-&gt;get_hdp_flush_done_offset(adev)) &lt;&lt; 2);</div><div class='del'>-	amdgpu_ring_write(ring, (adev-&gt;nbio.funcs-&gt;get_hdp_flush_req_offset(adev)) &lt;&lt; 2);</div><div class='del'>-	amdgpu_ring_write(ring, ref_and_mask); /* reference */</div><div class='del'>-	amdgpu_ring_write(ring, ref_and_mask); /* mask */</div><div class='del'>-	amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |</div><div class='del'>-			  SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry count, poll interval */</div><div class='add'>+	if (ring-&gt;me &gt; 1) {</div><div class='add'>+		amdgpu_asic_flush_hdp(adev, ring);</div><div class='add'>+	} else {</div><div class='add'>+		ref_and_mask = nbio_hf_reg-&gt;ref_and_mask_sdma0 &lt;&lt; ring-&gt;me;</div><div class='add'>+</div><div class='add'>+		amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |</div><div class='add'>+				  SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(1) |</div><div class='add'>+				  SDMA_PKT_POLL_REGMEM_HEADER_FUNC(3)); /* == */</div><div class='add'>+		amdgpu_ring_write(ring, (adev-&gt;nbio.funcs-&gt;get_hdp_flush_done_offset(adev)) &lt;&lt; 2);</div><div class='add'>+		amdgpu_ring_write(ring, (adev-&gt;nbio.funcs-&gt;get_hdp_flush_req_offset(adev)) &lt;&lt; 2);</div><div class='add'>+		amdgpu_ring_write(ring, ref_and_mask); /* reference */</div><div class='add'>+		amdgpu_ring_write(ring, ref_and_mask); /* mask */</div><div class='add'>+		amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |</div><div class='add'>+				  SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry count, poll interval */</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -835,7 +839,8 @@ static int sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 20);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+		if (!ring-&gt;is_mes_queue)</div><div class='add'>+			amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1747,7 +1752,7 @@ static void sdma_v5_2_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: if a secure copy should be used</div><div class='add'>+ * @copy_flags: copy flags for the buffers</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine.</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1757,11 +1762,11 @@ static void sdma_v5_2_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |</div><div class='del'>-		SDMA_PKT_COPY_LINEAR_HEADER_TMZ(tmz ? 1 : 0);</div><div class='add'>+		SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags &amp; AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0);</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = byte_count - 1;</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = 0; /* src/dst endian swap */</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = lower_32_bits(src_offset);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c<br/>index 361835a61f2e..c833b6b8373b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c</a></div><div class='hunk'>@@ -507,6 +507,13 @@ static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)</div><div class='ctx'> 		/* set minor_ptr_update to 0 after wptr programed */</div><div class='ctx'> 		WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0);</div><div class='ctx'> </div><div class='add'>+		/* Set up sdma hang watchdog */</div><div class='add'>+		temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));</div><div class='add'>+		/* 100ms per unit */</div><div class='add'>+		temp = REG_SET_FIELD(temp, SDMA0_WATCHDOG_CNTL, QUEUE_HANG_COUNT,</div><div class='add'>+				     max(adev-&gt;usec_timeout/100000, 1));</div><div class='add'>+		WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL), temp);</div><div class='add'>+</div><div class='ctx'> 		/* Set up RESP_MODE to non-copy addresses */</div><div class='ctx'> 		temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));</div><div class='ctx'> 		temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, RESP_MODE, 3);</div><div class='hunk'>@@ -854,7 +861,8 @@ static int sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 5);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+		if (!ring-&gt;is_mes_queue)</div><div class='add'>+			amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1567,7 +1575,7 @@ static void sdma_v6_0_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: if a secure copy should be used</div><div class='add'>+ * @copy_flags: copy flags for the buffers</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine.</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -1577,11 +1585,11 @@ static void sdma_v6_0_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) |</div><div class='ctx'> 		SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |</div><div class='del'>-		SDMA_PKT_COPY_LINEAR_HEADER_TMZ(tmz ? 1 : 0);</div><div class='add'>+		SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags &amp; AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0);</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = byte_count - 1;</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = 0; /* src/dst endian swap */</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = lower_32_bits(src_offset);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c<br/>index 23e4ef4fff7c..85235470e872 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/si.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/si.c</a></div><div class='hunk'>@@ -1409,9 +1409,9 @@ static int si_gpu_pci_config_reset(struct amdgpu_device *adev)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool si_asic_supports_baco(struct amdgpu_device *adev)</div><div class='add'>+static int si_asic_supports_baco(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	return false;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum amd_reset_method</div><div class='hunk'>@@ -2706,6 +2706,8 @@ static const struct amd_ip_funcs si_common_ip_funcs = {</div><div class='ctx'> 	.soft_reset = si_common_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = si_common_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = si_common_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ip_block_version si_common_ip_block =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c<br/>index 9aa0e11ee673..11db5b755832 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_dma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/si_dma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_dma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/si_dma.c</a></div><div class='hunk'>@@ -708,6 +708,8 @@ static const struct amd_ip_funcs si_dma_ip_funcs = {</div><div class='ctx'> 	.soft_reset = si_dma_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = si_dma_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = si_dma_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs si_dma_ring_funcs = {</div><div class='hunk'>@@ -761,7 +763,7 @@ static void si_dma_set_irq_funcs(struct amdgpu_device *adev)</div><div class='ctx'>  * @src_offset: src GPU address</div><div class='ctx'>  * @dst_offset: dst GPU address</div><div class='ctx'>  * @byte_count: number of bytes to xfer</div><div class='del'>- * @tmz: is this a secure operation</div><div class='add'>+ * @copy_flags: unused</div><div class='ctx'>  *</div><div class='ctx'>  * Copy GPU buffers using the DMA engine (VI).</div><div class='ctx'>  * Used by the amdgpu ttm implementation to move pages if</div><div class='hunk'>@@ -771,7 +773,7 @@ static void si_dma_emit_copy_buffer(struct amdgpu_ib *ib,</div><div class='ctx'> 				       uint64_t src_offset,</div><div class='ctx'> 				       uint64_t dst_offset,</div><div class='ctx'> 				       uint32_t byte_count,</div><div class='del'>-				       bool tmz)</div><div class='add'>+				       uint32_t copy_flags)</div><div class='ctx'> {</div><div class='ctx'> 	ib-&gt;ptr[ib-&gt;length_dw++] = DMA_PACKET(DMA_PACKET_COPY,</div><div class='ctx'> 					      1, 0, 0, byte_count);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c<br/>index cada9f300a7f..5237395e4fab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_ih.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/si_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/si_ih.c</a></div><div class='hunk'>@@ -296,6 +296,8 @@ static const struct amd_ip_funcs si_ih_ip_funcs = {</div><div class='ctx'> 	.soft_reset = si_ih_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = si_ih_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = si_ih_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs si_ih_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c b/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c<br/>index 93f6772d1b24..481217c32d85 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c</a></div><div class='hunk'>@@ -92,7 +92,7 @@ static int sienna_cichlid_mode2_suspend_ip(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;ip_blocks[i].status.hw = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return r;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c b/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c<br/>new file mode 100644<br/>index 000000000000..2a51a70d4846<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "smuio_v14_0_2.h"</div><div class='add'>+#include "smuio/smuio_14_0_2_offset.h"</div><div class='add'>+#include "smuio/smuio_14_0_2_sh_mask.h"</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+</div><div class='add'>+static u32 smuio_v14_0_2_get_rom_index_offset(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	return SOC15_REG_OFFSET(SMUIO, 0, regROM_INDEX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 smuio_v14_0_2_get_rom_data_offset(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	return SOC15_REG_OFFSET(SMUIO, 0, regROM_DATA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 smuio_v14_0_2_get_gpu_clock_counter(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	u64 clock;</div><div class='add'>+	u64 clock_counter_lo, clock_counter_hi_pre, clock_counter_hi_after;</div><div class='add'>+</div><div class='add'>+	preempt_disable();</div><div class='add'>+	clock_counter_hi_pre = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);</div><div class='add'>+	clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);</div><div class='add'>+	/* the clock counter may be udpated during polling the counters */</div><div class='add'>+	clock_counter_hi_after = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);</div><div class='add'>+	if (clock_counter_hi_pre != clock_counter_hi_after)</div><div class='add'>+		clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);</div><div class='add'>+	preempt_enable();</div><div class='add'>+</div><div class='add'>+	clock = clock_counter_lo | (clock_counter_hi_after &lt;&lt; 32ULL);</div><div class='add'>+</div><div class='add'>+	return clock;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct amdgpu_smuio_funcs smuio_v14_0_2_funcs = {</div><div class='add'>+	.get_rom_index_offset = smuio_v14_0_2_get_rom_index_offset,</div><div class='add'>+	.get_rom_data_offset = smuio_v14_0_2_get_rom_data_offset,</div><div class='add'>+	.get_gpu_clock_counter = smuio_v14_0_2_get_gpu_clock_counter,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.h b/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.h<br/>new file mode 100644<br/>index 000000000000..6e617f832d90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.h</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#ifndef __SMUIO_V14_0_2_H__</div><div class='add'>+#define __SMUIO_V14_0_2_H__</div><div class='add'>+</div><div class='add'>+#include "soc15_common.h"</div><div class='add'>+</div><div class='add'>+extern const struct amdgpu_smuio_funcs smuio_v14_0_2_funcs;</div><div class='add'>+</div><div class='add'>+#endif /* __SMUIO_V14_0_2_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c<br/>index dec81ccf6240..170f02e96717 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/soc15.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/soc15.c</a></div><div class='hunk'>@@ -143,7 +143,7 @@ static const struct amdgpu_video_codec_info rn_video_codecs_decode_array[] =</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -156,7 +156,7 @@ static const struct amdgpu_video_codecs rn_video_codecs_decode =</div><div class='ctx'> static const struct amdgpu_video_codec_info vcn_4_0_3_video_codecs_decode_array[] = {</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='hunk'>@@ -502,7 +502,7 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)</div><div class='ctx'> static enum amd_reset_method</div><div class='ctx'> soc15_asic_reset_method(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	bool baco_reset = false;</div><div class='add'>+	int baco_reset = 0;</div><div class='ctx'> 	bool connected_to_cpu = false;</div><div class='ctx'> 	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -540,7 +540,7 @@ soc15_asic_reset_method(struct amdgpu_device *adev)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (ras &amp;&amp; adev-&gt;ras_enabled &amp;&amp;</div><div class='ctx'> 			    adev-&gt;pm.fw_version &lt;= 0x283400)</div><div class='del'>-				baco_reset = false;</div><div class='add'>+				baco_reset = 0;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			baco_reset = amdgpu_dpm_is_baco_supported(adev);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -620,7 +620,7 @@ static int soc15_asic_reset(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool soc15_supports_baco(struct amdgpu_device *adev)</div><div class='add'>+static int soc15_supports_baco(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {</div><div class='ctx'> 	case IP_VERSION(9, 0, 0):</div><div class='hunk'>@@ -628,13 +628,13 @@ static bool soc15_supports_baco(struct amdgpu_device *adev)</div><div class='ctx'> 		if (adev-&gt;asic_type == CHIP_VEGA20) {</div><div class='ctx'> 			if (adev-&gt;psp.sos.fw_version &gt;= 0x80067)</div><div class='ctx'> 				return amdgpu_dpm_is_baco_supported(adev);</div><div class='del'>-			return false;</div><div class='add'>+			return 0;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			return amdgpu_dpm_is_baco_supported(adev);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1501,4 +1501,6 @@ static const struct amd_ip_funcs soc15_common_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = soc15_common_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = soc15_common_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state= soc15_common_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h<br/>index 1444b7765e4b..282584a48be0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/soc15.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/soc15.h</a></div><div class='hunk'>@@ -88,6 +88,8 @@ struct soc15_ras_field_entry {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define SOC15_REG_ENTRY(ip, inst, reg)	ip##_HWIP, inst, reg##_BASE_IDX, reg</div><div class='add'>+#define SOC15_REG_ENTRY_STR(ip, inst, reg) \</div><div class='add'>+	{ ip##_HWIP, inst, reg##_BASE_IDX, reg, #reg }</div><div class='ctx'> </div><div class='ctx'> #define SOC15_REG_ENTRY_OFFSET(entry)	(adev-&gt;reg_offset[entry.hwip][entry.inst][entry.seg] + entry.reg_offset)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c<br/>index 43ca63fe85ac..fb6797467571 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc21.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/soc21.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc21.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/soc21.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_encode_vcn1 = {</div><div class='ctx'> static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array_vcn0[] = {</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='hunk'>@@ -80,7 +80,7 @@ static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array_</div><div class='ctx'> static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array_vcn1[] = {</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},</div><div class='del'>-	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},</div><div class='add'>+	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)},</div><div class='ctx'> 	{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -985,4 +985,6 @@ static const struct amd_ip_funcs soc21_common_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = soc21_common_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = soc21_common_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = soc21_common_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h<br/>index 056d4df8fa1f..3ac56a9645eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/ta_ras_if.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/ta_ras_if.h</a></div><div class='hunk'>@@ -146,6 +146,7 @@ struct ta_ras_mca_addr {</div><div class='ctx'> 	uint32_t ch_inst;</div><div class='ctx'> 	uint32_t umc_inst;</div><div class='ctx'> 	uint32_t node_inst;</div><div class='add'>+	uint32_t socket_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ta_ras_phy_addr {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c<br/>index 450b6e831509..24d49d813607 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/tonga_ih.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/tonga_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/tonga_ih.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/tonga_ih.c</a></div><div class='hunk'>@@ -486,6 +486,8 @@ static const struct amd_ip_funcs tonga_ih_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = tonga_ih_post_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = tonga_ih_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = tonga_ih_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ih_funcs tonga_ih_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c<br/>index 77af4e25ff46..bfe61d86ee6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.c</a></div><div class='hunk'>@@ -28,27 +28,7 @@</div><div class='ctx'> #include "umc/umc_12_0_0_sh_mask.h"</div><div class='ctx'> #include "mp/mp_13_0_6_sh_mask.h"</div><div class='ctx'> </div><div class='del'>-const uint32_t</div><div class='del'>-	umc_v12_0_channel_idx_tbl[]</div><div class='del'>-			[UMC_V12_0_UMC_INSTANCE_NUM]</div><div class='del'>-			[UMC_V12_0_CHANNEL_INSTANCE_NUM] = {</div><div class='del'>-		{{3,   7,   11,  15,  2,   6,   10,  14},  {1,   5,   9,   13,  0,   4,   8,   12},</div><div class='del'>-		 {19,  23,  27,  31,  18,  22,  26,  30},  {17,  21,  25,  29,  16,  20,  24,  28}},</div><div class='del'>-		{{47,  43,  39,  35,  46,  42,  38,  34},  {45,  41,  37,  33,  44,  40,  36,  32},</div><div class='del'>-		 {63,  59,  55,  51,  62,  58,  54,  50},  {61,  57,  53,  49,  60,  56,  52,  48}},</div><div class='del'>-		{{79,  75,  71,  67,  78,  74,  70,  66},  {77,  73,  69,  65,  76,  72,  68,  64},</div><div class='del'>-		 {95,  91,  87,  83,  94,  90,  86,  82},  {93,  89,  85,  81,  92,  88,  84,  80}},</div><div class='del'>-		{{99,  103, 107, 111, 98,  102, 106, 110}, {97,  101, 105, 109, 96,  100, 104, 108},</div><div class='del'>-		 {115, 119, 123, 127, 114, 118, 122, 126}, {113, 117, 121, 125, 112, 116, 120, 124}}</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-/* mapping of MCA error address to normalized address */</div><div class='del'>-static const uint32_t umc_v12_0_ma2na_mapping[] = {</div><div class='del'>-	0,  5,  6,  8,  9,  14, 12, 13,</div><div class='del'>-	10, 11, 15, 16, 17, 18, 19, 20,</div><div class='del'>-	21, 22, 23, 24, 25, 26, 27, 28,</div><div class='del'>-	24, 7,  29, 30,</div><div class='del'>-};</div><div class='add'>+#define MAX_ECC_NUM_PER_RETIREMENT  32</div><div class='ctx'> </div><div class='ctx'> static inline uint64_t get_umc_v12_0_reg_offset(struct amdgpu_device *adev,</div><div class='ctx'> 					    uint32_t node_inst,</div><div class='hunk'>@@ -192,99 +172,74 @@ static void umc_v12_0_query_ras_error_count(struct amdgpu_device *adev,</div><div class='ctx'> 	umc_v12_0_reset_error_count(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool umc_v12_0_bit_wise_xor(uint32_t val)</div><div class='add'>+static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,</div><div class='add'>+					struct ras_err_data *err_data,</div><div class='add'>+					struct ta_ras_query_address_input *addr_in)</div><div class='ctx'> {</div><div class='del'>-	bool result = 0;</div><div class='del'>-	int i;</div><div class='add'>+	uint32_t col, row, row_xor, bank, channel_index;</div><div class='add'>+	uint64_t soc_pa, retired_page, column, err_addr;</div><div class='add'>+	struct ta_ras_query_address_output addr_out;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 32; i++)</div><div class='del'>-		result = result ^ ((val &gt;&gt; i) &amp; 0x1);</div><div class='add'>+	err_addr = addr_in-&gt;ma.err_addr;</div><div class='add'>+	addr_in-&gt;addr_type = TA_RAS_MCA_TO_PA;</div><div class='add'>+	if (psp_ras_query_address(&amp;adev-&gt;psp, addr_in, &amp;addr_out)) {</div><div class='add'>+		dev_warn(adev-&gt;dev, "Failed to query RAS physical address for 0x%llx",</div><div class='add'>+			err_addr);</div><div class='ctx'> </div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	soc_pa = addr_out.pa.pa;</div><div class='add'>+	bank = addr_out.pa.bank;</div><div class='add'>+	channel_index = addr_out.pa.channel_idx;</div><div class='ctx'> </div><div class='del'>-static void umc_v12_0_mca_addr_to_pa(struct amdgpu_device *adev,</div><div class='del'>-					uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst,</div><div class='del'>-					uint32_t node_inst,</div><div class='del'>-					struct ta_ras_query_address_output *addr_out)</div><div class='del'>-{</div><div class='del'>-	uint32_t channel_index, i;</div><div class='del'>-	uint64_t na, soc_pa;</div><div class='del'>-	uint32_t bank_hash0, bank_hash1, bank_hash2, bank_hash3, col, row;</div><div class='del'>-	uint32_t bank0, bank1, bank2, bank3, bank;</div><div class='del'>-</div><div class='del'>-	bank_hash0 = (err_addr &gt;&gt; UMC_V12_0_MCA_B0_BIT) &amp; 0x1ULL;</div><div class='del'>-	bank_hash1 = (err_addr &gt;&gt; UMC_V12_0_MCA_B1_BIT) &amp; 0x1ULL;</div><div class='del'>-	bank_hash2 = (err_addr &gt;&gt; UMC_V12_0_MCA_B2_BIT) &amp; 0x1ULL;</div><div class='del'>-	bank_hash3 = (err_addr &gt;&gt; UMC_V12_0_MCA_B3_BIT) &amp; 0x1ULL;</div><div class='ctx'> 	col = (err_addr &gt;&gt; 1) &amp; 0x1fULL;</div><div class='ctx'> 	row = (err_addr &gt;&gt; 10) &amp; 0x3fffULL;</div><div class='add'>+	row_xor = row ^ (0x1ULL &lt;&lt; 13);</div><div class='add'>+	/* clear [C3 C2] in soc physical address */</div><div class='add'>+	soc_pa &amp;= ~(0x3ULL &lt;&lt; UMC_V12_0_PA_C2_BIT);</div><div class='add'>+	/* clear [C4] in soc physical address */</div><div class='add'>+	soc_pa &amp;= ~(0x1ULL &lt;&lt; UMC_V12_0_PA_C4_BIT);</div><div class='add'>+</div><div class='add'>+	/* loop for all possibilities of [C4 C3 C2] */</div><div class='add'>+	for (column = 0; column &lt; UMC_V12_0_NA_MAP_PA_NUM; column++) {</div><div class='add'>+		retired_page = soc_pa | ((column &amp; 0x3) &lt;&lt; UMC_V12_0_PA_C2_BIT);</div><div class='add'>+		retired_page |= (((column &amp; 0x4) &gt;&gt; 2) &lt;&lt; UMC_V12_0_PA_C4_BIT);</div><div class='add'>+		/* include column bit 0 and 1 */</div><div class='add'>+		col &amp;= 0x3;</div><div class='add'>+		col |= (column &lt;&lt; 2);</div><div class='add'>+		dev_info(adev-&gt;dev,</div><div class='add'>+			"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",</div><div class='add'>+			retired_page, row, col, bank, channel_index);</div><div class='add'>+		amdgpu_umc_fill_error_record(err_data, err_addr,</div><div class='add'>+			retired_page, channel_index, addr_in-&gt;ma.umc_inst);</div><div class='ctx'> </div><div class='del'>-	/* apply bank hash algorithm */</div><div class='del'>-	bank0 =</div><div class='del'>-		bank_hash0 ^ (UMC_V12_0_XOR_EN0 &amp;</div><div class='del'>-		(umc_v12_0_bit_wise_xor(col &amp; UMC_V12_0_COL_XOR0) ^</div><div class='del'>-		(umc_v12_0_bit_wise_xor(row &amp; UMC_V12_0_ROW_XOR0))));</div><div class='del'>-	bank1 =</div><div class='del'>-		bank_hash1 ^ (UMC_V12_0_XOR_EN1 &amp;</div><div class='del'>-		(umc_v12_0_bit_wise_xor(col &amp; UMC_V12_0_COL_XOR1) ^</div><div class='del'>-		(umc_v12_0_bit_wise_xor(row &amp; UMC_V12_0_ROW_XOR1))));</div><div class='del'>-	bank2 =</div><div class='del'>-		bank_hash2 ^ (UMC_V12_0_XOR_EN2 &amp;</div><div class='del'>-		(umc_v12_0_bit_wise_xor(col &amp; UMC_V12_0_COL_XOR2) ^</div><div class='del'>-		(umc_v12_0_bit_wise_xor(row &amp; UMC_V12_0_ROW_XOR2))));</div><div class='del'>-	bank3 =</div><div class='del'>-		bank_hash3 ^ (UMC_V12_0_XOR_EN3 &amp;</div><div class='del'>-		(umc_v12_0_bit_wise_xor(col &amp; UMC_V12_0_COL_XOR3) ^</div><div class='del'>-		(umc_v12_0_bit_wise_xor(row &amp; UMC_V12_0_ROW_XOR3))));</div><div class='del'>-</div><div class='del'>-	bank = bank0 | (bank1 &lt;&lt; 1) | (bank2 &lt;&lt; 2) | (bank3 &lt;&lt; 3);</div><div class='del'>-	err_addr &amp;= ~0x3c0ULL;</div><div class='del'>-	err_addr |= (bank &lt;&lt; UMC_V12_0_MCA_B0_BIT);</div><div class='del'>-</div><div class='del'>-	na = 0x0;</div><div class='del'>-	/* convert mca error address to normalized address */</div><div class='del'>-	for (i = 1; i &lt; ARRAY_SIZE(umc_v12_0_ma2na_mapping); i++)</div><div class='del'>-		na |= ((err_addr &gt;&gt; i) &amp; 0x1ULL) &lt;&lt; umc_v12_0_ma2na_mapping[i];</div><div class='del'>-</div><div class='del'>-	channel_index =</div><div class='del'>-		adev-&gt;umc.channel_idx_tbl[node_inst * adev-&gt;umc.umc_inst_num *</div><div class='del'>-			adev-&gt;umc.channel_inst_num +</div><div class='del'>-			umc_inst * adev-&gt;umc.channel_inst_num +</div><div class='del'>-			ch_inst];</div><div class='del'>-	/* translate umc channel address to soc pa, 3 parts are included */</div><div class='del'>-	soc_pa = ADDR_OF_32KB_BLOCK(na) |</div><div class='del'>-		ADDR_OF_256B_BLOCK(channel_index) |</div><div class='del'>-		OFFSET_IN_256B_BLOCK(na);</div><div class='del'>-</div><div class='del'>-	/* the umc channel bits are not original values, they are hashed */</div><div class='del'>-	UMC_V12_0_SET_CHANNEL_HASH(channel_index, soc_pa);</div><div class='del'>-</div><div class='del'>-	addr_out-&gt;pa.pa = soc_pa;</div><div class='del'>-	addr_out-&gt;pa.bank = bank;</div><div class='del'>-	addr_out-&gt;pa.channel_idx = channel_index;</div><div class='add'>+		/* shift R13 bit */</div><div class='add'>+		retired_page ^= (0x1ULL &lt;&lt; UMC_V12_0_PA_R13_BIT);</div><div class='add'>+		dev_info(adev-&gt;dev,</div><div class='add'>+			"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",</div><div class='add'>+			retired_page, row_xor, col, bank, channel_index);</div><div class='add'>+		amdgpu_umc_fill_error_record(err_data, err_addr,</div><div class='add'>+			retired_page, channel_index, addr_in-&gt;ma.umc_inst);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,</div><div class='del'>-					    struct ras_err_data *err_data, uint64_t err_addr,</div><div class='del'>-					    uint32_t ch_inst, uint32_t umc_inst,</div><div class='del'>-					    uint32_t node_inst)</div><div class='add'>+static int umc_v12_0_convert_err_addr(struct amdgpu_device *adev,</div><div class='add'>+				struct ta_ras_query_address_input *addr_in,</div><div class='add'>+				uint64_t *pfns, int len)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t col, row, row_xor, bank, channel_index;</div><div class='del'>-	uint64_t soc_pa, retired_page, column;</div><div class='del'>-	struct ta_ras_query_address_input addr_in;</div><div class='add'>+	uint64_t soc_pa, retired_page, column, err_addr;</div><div class='ctx'> 	struct ta_ras_query_address_output addr_out;</div><div class='add'>+	uint32_t pos = 0;</div><div class='ctx'> </div><div class='del'>-	addr_in.addr_type = TA_RAS_MCA_TO_PA;</div><div class='del'>-	addr_in.ma.err_addr = err_addr;</div><div class='del'>-	addr_in.ma.ch_inst = ch_inst;</div><div class='del'>-	addr_in.ma.umc_inst = umc_inst;</div><div class='del'>-	addr_in.ma.node_inst = node_inst;</div><div class='del'>-</div><div class='del'>-	if (psp_ras_query_address(&amp;adev-&gt;psp, &amp;addr_in, &amp;addr_out))</div><div class='del'>-		/* fallback to old path if fail to get pa from psp */</div><div class='del'>-		umc_v12_0_mca_addr_to_pa(adev, err_addr, ch_inst, umc_inst,</div><div class='del'>-				node_inst, &amp;addr_out);</div><div class='add'>+	err_addr = addr_in-&gt;ma.err_addr;</div><div class='add'>+	addr_in-&gt;addr_type = TA_RAS_MCA_TO_PA;</div><div class='add'>+	if (psp_ras_query_address(&amp;adev-&gt;psp, addr_in, &amp;addr_out)) {</div><div class='add'>+		dev_warn(adev-&gt;dev, "Failed to query RAS physical address for 0x%llx",</div><div class='add'>+			err_addr);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	soc_pa = addr_out.pa.pa;</div><div class='ctx'> 	bank = addr_out.pa.bank;</div><div class='hunk'>@@ -302,33 +257,42 @@ static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,</div><div class='ctx'> 	for (column = 0; column &lt; UMC_V12_0_NA_MAP_PA_NUM; column++) {</div><div class='ctx'> 		retired_page = soc_pa | ((column &amp; 0x3) &lt;&lt; UMC_V12_0_PA_C2_BIT);</div><div class='ctx'> 		retired_page |= (((column &amp; 0x4) &gt;&gt; 2) &lt;&lt; UMC_V12_0_PA_C4_BIT);</div><div class='add'>+</div><div class='add'>+		if (pos &gt;= len)</div><div class='add'>+			return 0;</div><div class='add'>+		pfns[pos++] = retired_page &gt;&gt; AMDGPU_GPU_PAGE_SHIFT;</div><div class='add'>+</div><div class='ctx'> 		/* include column bit 0 and 1 */</div><div class='ctx'> 		col &amp;= 0x3;</div><div class='ctx'> 		col |= (column &lt;&lt; 2);</div><div class='ctx'> 		dev_info(adev-&gt;dev,</div><div class='ctx'> 			"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",</div><div class='ctx'> 			retired_page, row, col, bank, channel_index);</div><div class='del'>-		amdgpu_umc_fill_error_record(err_data, err_addr,</div><div class='del'>-			retired_page, channel_index, umc_inst);</div><div class='ctx'> </div><div class='ctx'> 		/* shift R13 bit */</div><div class='ctx'> 		retired_page ^= (0x1ULL &lt;&lt; UMC_V12_0_PA_R13_BIT);</div><div class='add'>+</div><div class='add'>+		if (pos &gt;= len)</div><div class='add'>+			return 0;</div><div class='add'>+		pfns[pos++] = retired_page &gt;&gt; AMDGPU_GPU_PAGE_SHIFT;</div><div class='add'>+</div><div class='ctx'> 		dev_info(adev-&gt;dev,</div><div class='ctx'> 			"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",</div><div class='ctx'> 			retired_page, row_xor, col, bank, channel_index);</div><div class='del'>-		amdgpu_umc_fill_error_record(err_data, err_addr,</div><div class='del'>-			retired_page, channel_index, umc_inst);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return pos;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int umc_v12_0_query_error_address(struct amdgpu_device *adev,</div><div class='ctx'> 					uint32_t node_inst, uint32_t umc_inst,</div><div class='ctx'> 					uint32_t ch_inst, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct ras_err_data *err_data = (struct ras_err_data *)data;</div><div class='add'>+	struct ta_ras_query_address_input addr_in;</div><div class='ctx'> 	uint64_t mc_umc_status_addr;</div><div class='ctx'> 	uint64_t mc_umc_status, err_addr;</div><div class='ctx'> 	uint64_t mc_umc_addrt0;</div><div class='del'>-	struct ras_err_data *err_data = (struct ras_err_data *)data;</div><div class='ctx'> 	uint64_t umc_reg_offset =</div><div class='ctx'> 		get_umc_v12_0_reg_offset(adev, node_inst, umc_inst, ch_inst);</div><div class='ctx'> </div><div class='hunk'>@@ -357,8 +321,19 @@ static int umc_v12_0_query_error_address(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 		err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);</div><div class='ctx'> </div><div class='del'>-		umc_v12_0_convert_error_address(adev, err_data, err_addr,</div><div class='del'>-					ch_inst, umc_inst, node_inst);</div><div class='add'>+		if (!adev-&gt;aid_mask &amp;&amp;</div><div class='add'>+		    adev-&gt;smuio.funcs &amp;&amp;</div><div class='add'>+		    adev-&gt;smuio.funcs-&gt;get_socket_id)</div><div class='add'>+			addr_in.ma.socket_id = adev-&gt;smuio.funcs-&gt;get_socket_id(adev);</div><div class='add'>+		else</div><div class='add'>+			addr_in.ma.socket_id = 0;</div><div class='add'>+</div><div class='add'>+		addr_in.ma.err_addr = err_addr;</div><div class='add'>+		addr_in.ma.ch_inst = ch_inst;</div><div class='add'>+		addr_in.ma.umc_inst = umc_inst;</div><div class='add'>+		addr_in.ma.node_inst = node_inst;</div><div class='add'>+</div><div class='add'>+		umc_v12_0_convert_error_address(adev, err_data, &amp;addr_in);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* clear umc status */</div><div class='hunk'>@@ -401,13 +376,20 @@ static int umc_v12_0_err_cnt_init_per_channel(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef TO_BE_REMOVED</div><div class='ctx'> static void umc_v12_0_ecc_info_query_ras_error_count(struct amdgpu_device *adev,</div><div class='ctx'> 					void *ras_error_status)</div><div class='ctx'> {</div><div class='add'>+	struct ras_query_context qctx;</div><div class='add'>+</div><div class='add'>+	memset(&amp;qctx, 0, sizeof(qctx));</div><div class='add'>+	qctx.event_id = amdgpu_ras_acquire_event_id(adev, amdgpu_ras_intr_triggered() ?</div><div class='add'>+						    RAS_EVENT_TYPE_ISR : RAS_EVENT_TYPE_INVALID);</div><div class='add'>+</div><div class='ctx'> 	amdgpu_mca_smu_log_ras_error(adev,</div><div class='del'>-		AMDGPU_RAS_BLOCK__UMC, AMDGPU_MCA_ERROR_TYPE_CE, ras_error_status);</div><div class='add'>+		AMDGPU_RAS_BLOCK__UMC, AMDGPU_MCA_ERROR_TYPE_CE, ras_error_status, &amp;qctx);</div><div class='ctx'> 	amdgpu_mca_smu_log_ras_error(adev,</div><div class='del'>-		AMDGPU_RAS_BLOCK__UMC, AMDGPU_MCA_ERROR_TYPE_UE, ras_error_status);</div><div class='add'>+		AMDGPU_RAS_BLOCK__UMC, AMDGPU_MCA_ERROR_TYPE_UE, ras_error_status, &amp;qctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void umc_v12_0_ecc_info_query_ras_error_address(struct amdgpu_device *adev,</div><div class='hunk'>@@ -418,12 +400,16 @@ static void umc_v12_0_ecc_info_query_ras_error_address(struct amdgpu_device *ade</div><div class='ctx'> 	struct ras_err_info *err_info;</div><div class='ctx'> 	struct ras_err_addr *mca_err_addr, *tmp;</div><div class='ctx'> 	struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;</div><div class='add'>+	struct ta_ras_query_address_input addr_in;</div><div class='ctx'> </div><div class='ctx'> 	for_each_ras_error(err_node, err_data) {</div><div class='ctx'> 		err_info = &amp;err_node-&gt;err_info;</div><div class='ctx'> 		if (list_empty(&amp;err_info-&gt;err_addr_list))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		addr_in.ma.node_inst = err_info-&gt;mcm_info.die_id;</div><div class='add'>+		addr_in.ma.socket_id = err_info-&gt;mcm_info.socket_id;</div><div class='add'>+</div><div class='ctx'> 		list_for_each_entry_safe(mca_err_addr, tmp, &amp;err_info-&gt;err_addr_list, node) {</div><div class='ctx'> 			mc_umc_status = mca_err_addr-&gt;err_status;</div><div class='ctx'> 			if (mc_umc_status &amp;&amp;</div><div class='hunk'>@@ -439,6 +425,10 @@ static void umc_v12_0_ecc_info_query_ras_error_address(struct amdgpu_device *ade</div><div class='ctx'> 							MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);</div><div class='ctx'> 				InstanceIdLo = REG_GET_FIELD(mca_ipid, MCMP1_IPIDT0, InstanceIdLo);</div><div class='ctx'> </div><div class='add'>+				addr_in.ma.err_addr = err_addr;</div><div class='add'>+				addr_in.ma.ch_inst = MCA_IPID_LO_2_UMC_CH(InstanceIdLo);</div><div class='add'>+				addr_in.ma.umc_inst = MCA_IPID_LO_2_UMC_INST(InstanceIdLo);</div><div class='add'>+</div><div class='ctx'> 				dev_info(adev-&gt;dev, "UMC:IPID:0x%llx, aid:%d, inst:%d, ch:%d, err_addr:0x%llx\n",</div><div class='ctx'> 					mca_ipid,</div><div class='ctx'> 					err_info-&gt;mcm_info.die_id,</div><div class='hunk'>@@ -447,10 +437,7 @@ static void umc_v12_0_ecc_info_query_ras_error_address(struct amdgpu_device *ade</div><div class='ctx'> 					err_addr);</div><div class='ctx'> </div><div class='ctx'> 				umc_v12_0_convert_error_address(adev,</div><div class='del'>-					err_data, err_addr,</div><div class='del'>-					MCA_IPID_LO_2_UMC_CH(InstanceIdLo),</div><div class='del'>-					MCA_IPID_LO_2_UMC_INST(InstanceIdLo),</div><div class='del'>-					err_info-&gt;mcm_info.die_id);</div><div class='add'>+					err_data, &amp;addr_in);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Delete error address node from list and free memory */</div><div class='hunk'>@@ -458,6 +445,7 @@ static void umc_v12_0_ecc_info_query_ras_error_address(struct amdgpu_device *ade</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static bool umc_v12_0_check_ecc_err_status(struct amdgpu_device *adev,</div><div class='ctx'> 			enum amdgpu_mca_error_type type, void *ras_error_status)</div><div class='hunk'>@@ -498,43 +486,49 @@ const struct amdgpu_ras_block_hw_ops umc_v12_0_ras_hw_ops = {</div><div class='ctx'> 	.query_ras_error_address = umc_v12_0_query_ras_error_address,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int umc_v12_0_aca_bank_generate_report(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type,</div><div class='del'>-					      struct aca_bank_report *report, void *data)</div><div class='add'>+static int umc_v12_0_aca_bank_parser(struct aca_handle *handle, struct aca_bank *bank,</div><div class='add'>+				     enum aca_smu_type type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = handle-&gt;adev;</div><div class='del'>-	u64 status;</div><div class='add'>+	struct aca_bank_info info;</div><div class='add'>+	enum aca_error_type err_type;</div><div class='add'>+	u64 status, count;</div><div class='add'>+	u32 ext_error_code;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = aca_bank_info_decode(bank, &amp;report-&gt;info);</div><div class='add'>+	status = bank-&gt;regs[ACA_REG_IDX_STATUS];</div><div class='add'>+	if (umc_v12_0_is_deferred_error(adev, status))</div><div class='add'>+		err_type = ACA_ERROR_TYPE_DEFERRED;</div><div class='add'>+	else if (umc_v12_0_is_uncorrectable_error(adev, status))</div><div class='add'>+		err_type = ACA_ERROR_TYPE_UE;</div><div class='add'>+	else if (umc_v12_0_is_correctable_error(adev, status))</div><div class='add'>+		err_type = ACA_ERROR_TYPE_CE;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = aca_bank_info_decode(bank, &amp;info);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	status = bank-&gt;regs[ACA_REG_IDX_STATUS];</div><div class='del'>-	switch (type) {</div><div class='del'>-	case ACA_ERROR_TYPE_UE:</div><div class='del'>-		if (umc_v12_0_is_uncorrectable_error(adev, status)) {</div><div class='del'>-			report-&gt;count[type] = 1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case ACA_ERROR_TYPE_CE:</div><div class='del'>-		if (umc_v12_0_is_correctable_error(adev, status)) {</div><div class='del'>-			report-&gt;count[type] = 1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	amdgpu_umc_update_ecc_status(adev,</div><div class='add'>+		bank-&gt;regs[ACA_REG_IDX_STATUS],</div><div class='add'>+		bank-&gt;regs[ACA_REG_IDX_IPID],</div><div class='add'>+		bank-&gt;regs[ACA_REG_IDX_ADDR]);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	ext_error_code = ACA_REG__STATUS__ERRORCODEEXT(status);</div><div class='add'>+	count = ext_error_code == 0 ?</div><div class='add'>+		ACA_REG__MISC0__ERRCNT(bank-&gt;regs[ACA_REG_IDX_MISC0]) : 1ULL;</div><div class='add'>+</div><div class='add'>+	return aca_error_cache_log_bank_error(handle, &amp;info, err_type, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct aca_bank_ops umc_v12_0_aca_bank_ops = {</div><div class='del'>-	.aca_bank_generate_report = umc_v12_0_aca_bank_generate_report,</div><div class='add'>+	.aca_bank_parser = umc_v12_0_aca_bank_parser,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct aca_info umc_v12_0_aca_info = {</div><div class='ctx'> 	.hwip = ACA_HWIP_TYPE_UMC,</div><div class='del'>-	.mask = ACA_ERROR_UE_MASK | ACA_ERROR_CE_MASK,</div><div class='add'>+	.mask = ACA_ERROR_UE_MASK | ACA_ERROR_CE_MASK | ACA_ERROR_DEFERRED_MASK,</div><div class='ctx'> 	.bank_ops = &amp;umc_v12_0_aca_bank_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -554,6 +548,152 @@ static int umc_v12_0_ras_late_init(struct amdgpu_device *adev, struct ras_common</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int umc_v12_0_update_ecc_status(struct amdgpu_device *adev,</div><div class='add'>+			uint64_t status, uint64_t ipid, uint64_t addr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	uint16_t hwid, mcatype;</div><div class='add'>+	struct ta_ras_query_address_input addr_in;</div><div class='add'>+	uint64_t page_pfn[UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL];</div><div class='add'>+	uint64_t err_addr, hash_val = 0;</div><div class='add'>+	struct ras_ecc_err *ecc_err;</div><div class='add'>+	int count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hwid = REG_GET_FIELD(ipid, MCMP1_IPIDT0, HardwareID);</div><div class='add'>+	mcatype = REG_GET_FIELD(ipid, MCMP1_IPIDT0, McaType);</div><div class='add'>+</div><div class='add'>+	if ((hwid != MCA_UMC_HWID_V12_0) || (mcatype != MCA_UMC_MCATYPE_V12_0))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!status)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!umc_v12_0_is_deferred_error(adev, status))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err_addr = REG_GET_FIELD(addr,</div><div class='add'>+				MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev,</div><div class='add'>+		"UMC:IPID:0x%llx, socket:%llu, aid:%llu, inst:%llu, ch:%llu, err_addr:0x%llx\n",</div><div class='add'>+		ipid,</div><div class='add'>+		MCA_IPID_2_SOCKET_ID(ipid),</div><div class='add'>+		MCA_IPID_2_DIE_ID(ipid),</div><div class='add'>+		MCA_IPID_2_UMC_INST(ipid),</div><div class='add'>+		MCA_IPID_2_UMC_CH(ipid),</div><div class='add'>+		err_addr);</div><div class='add'>+</div><div class='add'>+	memset(page_pfn, 0, sizeof(page_pfn));</div><div class='add'>+</div><div class='add'>+	memset(&amp;addr_in, 0, sizeof(addr_in));</div><div class='add'>+	addr_in.ma.err_addr = err_addr;</div><div class='add'>+	addr_in.ma.ch_inst = MCA_IPID_2_UMC_CH(ipid);</div><div class='add'>+	addr_in.ma.umc_inst = MCA_IPID_2_UMC_INST(ipid);</div><div class='add'>+	addr_in.ma.node_inst = MCA_IPID_2_DIE_ID(ipid);</div><div class='add'>+	addr_in.ma.socket_id = MCA_IPID_2_SOCKET_ID(ipid);</div><div class='add'>+</div><div class='add'>+	count = umc_v12_0_convert_err_addr(adev,</div><div class='add'>+				&amp;addr_in, page_pfn, ARRAY_SIZE(page_pfn));</div><div class='add'>+	if (count &lt;= 0) {</div><div class='add'>+		dev_warn(adev-&gt;dev, "Fail to convert error address! count:%d\n", count);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_umc_build_pages_hash(adev,</div><div class='add'>+			page_pfn, count, &amp;hash_val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(adev-&gt;dev, "Fail to build error pages hash\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ecc_err = kzalloc(sizeof(*ecc_err), GFP_KERNEL);</div><div class='add'>+	if (!ecc_err)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ecc_err-&gt;err_pages.pfn = kcalloc(count, sizeof(*ecc_err-&gt;err_pages.pfn), GFP_KERNEL);</div><div class='add'>+	if (!ecc_err-&gt;err_pages.pfn) {</div><div class='add'>+		kfree(ecc_err);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(ecc_err-&gt;err_pages.pfn, page_pfn, count * sizeof(*ecc_err-&gt;err_pages.pfn));</div><div class='add'>+	ecc_err-&gt;err_pages.count = count;</div><div class='add'>+</div><div class='add'>+	ecc_err-&gt;hash_index = hash_val;</div><div class='add'>+	ecc_err-&gt;status = status;</div><div class='add'>+	ecc_err-&gt;ipid = ipid;</div><div class='add'>+	ecc_err-&gt;addr = addr;</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_umc_logs_ecc_err(adev, &amp;con-&gt;umc_ecc_log.de_page_tree, ecc_err);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret == -EEXIST)</div><div class='add'>+			con-&gt;umc_ecc_log.de_updated = true;</div><div class='add'>+		else</div><div class='add'>+			dev_err(adev-&gt;dev, "Fail to log ecc error! ret:%d\n", ret);</div><div class='add'>+</div><div class='add'>+		kfree(ecc_err-&gt;err_pages.pfn);</div><div class='add'>+		kfree(ecc_err);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	con-&gt;umc_ecc_log.de_updated = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int umc_v12_0_fill_error_record(struct amdgpu_device *adev,</div><div class='add'>+				struct ras_ecc_err *ecc_err, void *ras_error_status)</div><div class='add'>+{</div><div class='add'>+	struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;</div><div class='add'>+	uint32_t i = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!err_data || !ecc_err)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ecc_err-&gt;err_pages.count; i++) {</div><div class='add'>+		ret = amdgpu_umc_fill_error_record(err_data,</div><div class='add'>+				ecc_err-&gt;addr,</div><div class='add'>+				ecc_err-&gt;err_pages.pfn[i] &lt;&lt; AMDGPU_GPU_PAGE_SHIFT,</div><div class='add'>+				MCA_IPID_2_UMC_CH(ecc_err-&gt;ipid),</div><div class='add'>+				MCA_IPID_2_UMC_INST(ecc_err-&gt;ipid));</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err_data-&gt;de_count++;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void umc_v12_0_query_ras_ecc_err_addr(struct amdgpu_device *adev,</div><div class='add'>+					void *ras_error_status)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);</div><div class='add'>+	struct ras_ecc_err *entries[MAX_ECC_NUM_PER_RETIREMENT];</div><div class='add'>+	struct radix_tree_root *ecc_tree;</div><div class='add'>+	int new_detected, ret, i;</div><div class='add'>+</div><div class='add'>+	ecc_tree = &amp;con-&gt;umc_ecc_log.de_page_tree;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;con-&gt;umc_ecc_log.lock);</div><div class='add'>+	new_detected = radix_tree_gang_lookup_tag(ecc_tree, (void **)entries,</div><div class='add'>+			0, ARRAY_SIZE(entries), UMC_ECC_NEW_DETECTED_TAG);</div><div class='add'>+	for (i = 0; i &lt; new_detected; i++) {</div><div class='add'>+		if (!entries[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = umc_v12_0_fill_error_record(adev, entries[i], ras_error_status);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(adev-&gt;dev, "Fail to fill umc error record, ret:%d\n", ret);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		radix_tree_tag_clear(ecc_tree, entries[i]-&gt;hash_index, UMC_ECC_NEW_DETECTED_TAG);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;con-&gt;umc_ecc_log.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct amdgpu_umc_ras umc_v12_0_ras = {</div><div class='ctx'> 	.ras_block = {</div><div class='ctx'> 		.hw_ops = &amp;umc_v12_0_ras_hw_ops,</div><div class='hunk'>@@ -561,8 +701,8 @@ struct amdgpu_umc_ras umc_v12_0_ras = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.err_cnt_init = umc_v12_0_err_cnt_init,</div><div class='ctx'> 	.query_ras_poison_mode = umc_v12_0_query_ras_poison_mode,</div><div class='del'>-	.ecc_info_query_ras_error_count = umc_v12_0_ecc_info_query_ras_error_count,</div><div class='del'>-	.ecc_info_query_ras_error_address = umc_v12_0_ecc_info_query_ras_error_address,</div><div class='add'>+	.ecc_info_query_ras_error_address = umc_v12_0_query_ras_ecc_err_addr,</div><div class='ctx'> 	.check_ecc_err_status = umc_v12_0_check_ecc_err_status,</div><div class='add'>+	.update_ecc_status = umc_v12_0_update_ecc_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h<br/>index 5973bfb14fce..b4974793850b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.h</a></div><div class='hunk'>@@ -55,83 +55,38 @@</div><div class='ctx'> #define UMC_V12_0_NA_MAP_PA_NUM        8</div><div class='ctx'> /* R13 bit shift should be considered, double the number */</div><div class='ctx'> #define UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL (UMC_V12_0_NA_MAP_PA_NUM * 2)</div><div class='del'>-/* bank bits in MCA error address */</div><div class='del'>-#define UMC_V12_0_MCA_B0_BIT 6</div><div class='del'>-#define UMC_V12_0_MCA_B1_BIT 7</div><div class='del'>-#define UMC_V12_0_MCA_B2_BIT 8</div><div class='del'>-#define UMC_V12_0_MCA_B3_BIT 9</div><div class='add'>+</div><div class='ctx'> /* column bits in SOC physical address */</div><div class='ctx'> #define UMC_V12_0_PA_C2_BIT 15</div><div class='ctx'> #define UMC_V12_0_PA_C4_BIT 21</div><div class='ctx'> /* row bits in SOC physical address */</div><div class='ctx'> #define UMC_V12_0_PA_R13_BIT 35</div><div class='del'>-/* channel index bits in SOC physical address */</div><div class='del'>-#define UMC_V12_0_PA_CH4_BIT 12</div><div class='del'>-#define UMC_V12_0_PA_CH5_BIT 13</div><div class='del'>-#define UMC_V12_0_PA_CH6_BIT 14</div><div class='del'>-</div><div class='del'>-/* bank hash settings */</div><div class='del'>-#define UMC_V12_0_XOR_EN0 1</div><div class='del'>-#define UMC_V12_0_XOR_EN1 1</div><div class='del'>-#define UMC_V12_0_XOR_EN2 1</div><div class='del'>-#define UMC_V12_0_XOR_EN3 1</div><div class='del'>-#define UMC_V12_0_COL_XOR0 0x0</div><div class='del'>-#define UMC_V12_0_COL_XOR1 0x0</div><div class='del'>-#define UMC_V12_0_COL_XOR2 0x800</div><div class='del'>-#define UMC_V12_0_COL_XOR3 0x1000</div><div class='del'>-#define UMC_V12_0_ROW_XOR0 0x11111</div><div class='del'>-#define UMC_V12_0_ROW_XOR1 0x22222</div><div class='del'>-#define UMC_V12_0_ROW_XOR2 0x4444</div><div class='del'>-#define UMC_V12_0_ROW_XOR3 0x8888</div><div class='del'>-</div><div class='del'>-/* channel hash settings */</div><div class='del'>-#define UMC_V12_0_HASH_4K 0</div><div class='del'>-#define UMC_V12_0_HASH_64K 1</div><div class='del'>-#define UMC_V12_0_HASH_2M 1</div><div class='del'>-#define UMC_V12_0_HASH_1G 1</div><div class='del'>-#define UMC_V12_0_HASH_1T 1</div><div class='del'>-</div><div class='del'>-/* XOR some bits of PA into CH4~CH6 bits (bits 12~14 of PA),</div><div class='del'>- * hash bit is only effective when related setting is enabled</div><div class='del'>- */</div><div class='del'>-#define UMC_V12_0_CHANNEL_HASH_CH4(channel_idx, pa) ((((channel_idx) &gt;&gt; 5) &amp; 0x1) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 20) &amp; 0x1ULL &amp; UMC_V12_0_HASH_64K) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 27) &amp; 0x1ULL &amp; UMC_V12_0_HASH_2M) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 34) &amp; 0x1ULL &amp; UMC_V12_0_HASH_1G) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 41) &amp; 0x1ULL &amp; UMC_V12_0_HASH_1T))</div><div class='del'>-#define UMC_V12_0_CHANNEL_HASH_CH5(channel_idx, pa) ((((channel_idx) &gt;&gt; 6) &amp; 0x1) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 21) &amp; 0x1ULL &amp; UMC_V12_0_HASH_64K) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 28) &amp; 0x1ULL &amp; UMC_V12_0_HASH_2M) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 35) &amp; 0x1ULL &amp; UMC_V12_0_HASH_1G) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 42) &amp; 0x1ULL &amp; UMC_V12_0_HASH_1T))</div><div class='del'>-#define UMC_V12_0_CHANNEL_HASH_CH6(channel_idx, pa) ((((channel_idx) &gt;&gt; 4) &amp; 0x1) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 19) &amp; 0x1ULL &amp; UMC_V12_0_HASH_64K) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 26) &amp; 0x1ULL &amp; UMC_V12_0_HASH_2M) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 33) &amp; 0x1ULL &amp; UMC_V12_0_HASH_1G) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 40) &amp; 0x1ULL &amp; UMC_V12_0_HASH_1T) ^ \</div><div class='del'>-				(((pa)  &gt;&gt; 47) &amp; 0x1ULL &amp; UMC_V12_0_HASH_4K))</div><div class='del'>-#define UMC_V12_0_SET_CHANNEL_HASH(channel_idx, pa) do { \</div><div class='del'>-		(pa) &amp;= ~(0x7ULL &lt;&lt; UMC_V12_0_PA_CH4_BIT); \</div><div class='del'>-		(pa) |= (UMC_V12_0_CHANNEL_HASH_CH4(channel_idx, pa) &lt;&lt; UMC_V12_0_PA_CH4_BIT); \</div><div class='del'>-		(pa) |= (UMC_V12_0_CHANNEL_HASH_CH5(channel_idx, pa) &lt;&lt; UMC_V12_0_PA_CH5_BIT); \</div><div class='del'>-		(pa) |= (UMC_V12_0_CHANNEL_HASH_CH6(channel_idx, pa) &lt;&lt; UMC_V12_0_PA_CH6_BIT); \</div><div class='del'>-	} while (0)</div><div class='add'>+</div><div class='add'>+#define MCA_UMC_HWID_V12_0     0x96</div><div class='add'>+#define MCA_UMC_MCATYPE_V12_0  0x0</div><div class='ctx'> </div><div class='ctx'> #define MCA_IPID_LO_2_UMC_CH(_ipid_lo) (((((_ipid_lo) &gt;&gt; 20) &amp; 0x1) * 4) + \</div><div class='ctx'> 			(((_ipid_lo) &gt;&gt; 12) &amp; 0xF))</div><div class='ctx'> #define MCA_IPID_LO_2_UMC_INST(_ipid_lo) (((_ipid_lo) &gt;&gt; 21) &amp; 0x7)</div><div class='ctx'> </div><div class='add'>+#define MCA_IPID_2_DIE_ID(ipid)  ((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi) &gt;&gt; 2) &amp; 0x03)</div><div class='add'>+</div><div class='add'>+#define MCA_IPID_2_UMC_CH(ipid) \</div><div class='add'>+	(MCA_IPID_LO_2_UMC_CH(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo)))</div><div class='add'>+</div><div class='add'>+#define MCA_IPID_2_UMC_INST(ipid) \</div><div class='add'>+	(MCA_IPID_LO_2_UMC_INST(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo)))</div><div class='add'>+</div><div class='add'>+#define MCA_IPID_2_SOCKET_ID(ipid) \</div><div class='add'>+	(((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo) &amp; 0x1) &lt;&lt; 2) | \</div><div class='add'>+	 (REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi) &amp; 0x03))</div><div class='add'>+</div><div class='ctx'> bool umc_v12_0_is_deferred_error(struct amdgpu_device *adev, uint64_t mc_umc_status);</div><div class='ctx'> bool umc_v12_0_is_uncorrectable_error(struct amdgpu_device *adev, uint64_t mc_umc_status);</div><div class='ctx'> bool umc_v12_0_is_correctable_error(struct amdgpu_device *adev, uint64_t mc_umc_status);</div><div class='ctx'> </div><div class='ctx'> typedef bool (*check_error_type_func)(struct amdgpu_device *adev, uint64_t mc_umc_status);</div><div class='ctx'> </div><div class='del'>-extern const uint32_t</div><div class='del'>-	umc_v12_0_channel_idx_tbl[]</div><div class='del'>-			[UMC_V12_0_UMC_INSTANCE_NUM]</div><div class='del'>-			[UMC_V12_0_CHANNEL_INSTANCE_NUM];</div><div class='del'>-</div><div class='ctx'> extern struct amdgpu_umc_ras umc_v12_0_ras;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c b/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c<br/>index c4c77257710c..a32f87992f20 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/umc_v8_10.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/umc_v8_10.c</a></div><div class='hunk'>@@ -442,11 +442,6 @@ static void umc_v8_10_ecc_info_query_ras_error_address(struct amdgpu_device *ade</div><div class='ctx'> 		umc_v8_10_ecc_info_query_error_address, ras_error_status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void umc_v8_10_set_eeprom_table_version(struct amdgpu_ras_eeprom_table_header *hdr)</div><div class='del'>-{</div><div class='del'>-	hdr-&gt;version = RAS_TABLE_VER_V2_1;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> const struct amdgpu_ras_block_hw_ops umc_v8_10_ras_hw_ops = {</div><div class='ctx'> 	.query_ras_error_count = umc_v8_10_query_ras_error_count,</div><div class='ctx'> 	.query_ras_error_address = umc_v8_10_query_ras_error_address,</div><div class='hunk'>@@ -460,5 +455,4 @@ struct amdgpu_umc_ras umc_v8_10_ras = {</div><div class='ctx'> 	.query_ras_poison_mode = umc_v8_10_query_ras_poison_mode,</div><div class='ctx'> 	.ecc_info_query_ras_error_count = umc_v8_10_ecc_info_query_ras_error_count,</div><div class='ctx'> 	.ecc_info_query_ras_error_address = umc_v8_10_ecc_info_query_ras_error_address,</div><div class='del'>-	.set_eeprom_table_version = umc_v8_10_set_eeprom_table_version,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c<br/>index a6006f231c65..805d6662c88b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c</a></div><div class='hunk'>@@ -819,6 +819,8 @@ static const struct amd_ip_funcs uvd_v3_1_ip_funcs = {</div><div class='ctx'> 	.soft_reset = uvd_v3_1_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = uvd_v3_1_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = uvd_v3_1_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version uvd_v3_1_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c<br/>index 1aa09ad7bbe3..3f19c606f4de 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c</a></div><div class='hunk'>@@ -769,6 +769,8 @@ static const struct amd_ip_funcs uvd_v4_2_ip_funcs = {</div><div class='ctx'> 	.soft_reset = uvd_v4_2_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = uvd_v4_2_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = uvd_v4_2_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c<br/>index f8b229b75435..efd903c21d48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c</a></div><div class='hunk'>@@ -877,6 +877,8 @@ static const struct amd_ip_funcs uvd_v5_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = uvd_v5_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = uvd_v5_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = uvd_v5_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c<br/>index a9a6880f44e3..495de5068455 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c</a></div><div class='hunk'>@@ -1545,6 +1545,8 @@ static const struct amd_ip_funcs uvd_v6_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = uvd_v6_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = uvd_v6_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = uvd_v6_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c<br/>index a08e7abca423..66fada199bda 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vce_v2_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vce_v2_0.c</a></div><div class='hunk'>@@ -626,6 +626,8 @@ static const struct amd_ip_funcs vce_v2_0_ip_funcs = {</div><div class='ctx'> 	.soft_reset = vce_v2_0_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = vce_v2_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vce_v2_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c<br/>index f4760748d349..32517c364cf7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vce_v3_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vce_v3_0.c</a></div><div class='hunk'>@@ -913,6 +913,8 @@ static const struct amd_ip_funcs vce_v3_0_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = vce_v3_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vce_v3_0_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = vce_v3_0_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c<br/>index aaceecd558cf..cb253bd3a2a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c</a></div><div class='hunk'>@@ -1902,6 +1902,8 @@ static const struct amd_ip_funcs vcn_v1_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL /* vcn_v1_0_post_soft_reset */,</div><div class='ctx'> 	.set_clockgating_state = vcn_v1_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v1_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c<br/>index e357d8cf0c01..f18fd61c435e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c</a></div><div class='hunk'>@@ -2008,6 +2008,8 @@ static const struct amd_ip_funcs vcn_v2_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v2_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v2_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ring_funcs vcn_v2_0_dec_ring_vm_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c<br/>index 1cd8a94b0fbc..baec14bde2a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c</a></div><div class='hunk'>@@ -1901,6 +1901,8 @@ static const struct amd_ip_funcs vcn_v2_5_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v2_5_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v2_5_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amd_ip_funcs vcn_v2_6_ip_funcs = {</div><div class='hunk'>@@ -1921,6 +1923,8 @@ static const struct amd_ip_funcs vcn_v2_6_ip_funcs = {</div><div class='ctx'>         .post_soft_reset = NULL,</div><div class='ctx'>         .set_clockgating_state = vcn_v2_5_set_clockgating_state,</div><div class='ctx'>         .set_powergating_state = vcn_v2_5_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version vcn_v2_5_ip_block =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br/>index 8f82fb887e9c..6b31cf4b8aac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</a></div><div class='hunk'>@@ -359,6 +359,7 @@ static int vcn_v3_0_hw_init(void *handle)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='ctx'> done:</div><div class='ctx'> 	if (!r)</div><div class='ctx'> 		DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",</div><div class='hunk'>@@ -2230,6 +2231,8 @@ static const struct amd_ip_funcs vcn_v3_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v3_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v3_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version vcn_v3_0_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c<br/>index 832d15f7b5f6..ac1b8ead03b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c</a></div><div class='hunk'>@@ -288,6 +288,7 @@ static int vcn_v4_0_hw_init(void *handle)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='ctx'> done:</div><div class='ctx'> 	if (!r)</div><div class='ctx'> 		DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",</div><div class='hunk'>@@ -2130,6 +2131,8 @@ static const struct amd_ip_funcs vcn_v4_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v4_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v4_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version vcn_v4_0_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c<br/>index 203fa988322b..2279d8fce03d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c</a></div><div class='hunk'>@@ -1660,6 +1660,8 @@ static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v4_0_3_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v4_0_3_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version vcn_v4_0_3_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c<br/>index 501e53e69f2a..81fb99729f37 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c</a></div><div class='hunk'>@@ -237,6 +237,7 @@ static int vcn_v4_0_5_hw_init(void *handle)</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='ctx'> done:</div><div class='ctx'> 	if (!r)</div><div class='ctx'> 		DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",</div><div class='hunk'>@@ -1752,6 +1753,8 @@ static const struct amd_ip_funcs vcn_v4_0_5_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v4_0_5_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v4_0_5_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version vcn_v4_0_5_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c<br/>index bc60c554eb32..851975b5ce29 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ static int vcn_v5_0_0_sw_init(void *handle)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; i++) {</div><div class='del'>-		volatile struct amdgpu_vcn4_fw_shared *fw_shared;</div><div class='add'>+		volatile struct amdgpu_vcn5_fw_shared *fw_shared;</div><div class='ctx'> </div><div class='ctx'> 		if (adev-&gt;vcn.harvest_config &amp; (1 &lt;&lt; i))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -154,7 +154,7 @@ static int vcn_v5_0_0_sw_fini(void *handle)</div><div class='ctx'> </div><div class='ctx'> 	if (drm_dev_enter(adev_to_drm(adev), &amp;idx)) {</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; i++) {</div><div class='del'>-			volatile struct amdgpu_vcn4_fw_shared *fw_shared;</div><div class='add'>+			volatile struct amdgpu_vcn5_fw_shared *fw_shared;</div><div class='ctx'> </div><div class='ctx'> 			if (adev-&gt;vcn.harvest_config &amp; (1 &lt;&lt; i))</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -203,6 +203,7 @@ static int vcn_v5_0_0_hw_init(void *handle)</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='ctx'> done:</div><div class='ctx'> 	if (!r)</div><div class='ctx'> 		DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",</div><div class='hunk'>@@ -334,7 +335,7 @@ static void vcn_v5_0_0_mc_resume(struct amdgpu_device *adev, int inst)</div><div class='ctx'> 		upper_32_bits(adev-&gt;vcn.inst[inst].fw_shared.gpu_addr));</div><div class='ctx'> 	WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);</div><div class='ctx'> 	WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0,</div><div class='del'>-		AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)));</div><div class='add'>+		AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn5_fw_shared)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -438,7 +439,7 @@ static void vcn_v5_0_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_i</div><div class='ctx'> 		VCN, inst_idx, regUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect);</div><div class='ctx'> 	WREG32_SOC24_DPG_MODE(inst_idx, SOC24_DPG_MODE_OFFSET(</div><div class='ctx'> 		VCN, inst_idx, regUVD_VCPU_NONCACHE_SIZE0),</div><div class='del'>-		AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect);</div><div class='add'>+		AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn5_fw_shared)), 0, indirect);</div><div class='ctx'> </div><div class='ctx'> 	/* VCN global tiling registers */</div><div class='ctx'> 	WREG32_SOC24_DPG_MODE(inst_idx, SOC24_DPG_MODE_OFFSET(</div><div class='hunk'>@@ -615,7 +616,7 @@ static void vcn_v5_0_0_enable_clock_gating(struct amdgpu_device *adev, int inst)</div><div class='ctx'>  */</div><div class='ctx'> static int vcn_v5_0_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect)</div><div class='ctx'> {</div><div class='del'>-	volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev-&gt;vcn.inst[inst_idx].fw_shared.cpu_addr;</div><div class='add'>+	volatile struct amdgpu_vcn5_fw_shared *fw_shared = adev-&gt;vcn.inst[inst_idx].fw_shared.cpu_addr;</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='ctx'> 	uint32_t tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -712,7 +713,7 @@ static int vcn_v5_0_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, b</div><div class='ctx'>  */</div><div class='ctx'> static int vcn_v5_0_0_start(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	volatile struct amdgpu_vcn4_fw_shared *fw_shared;</div><div class='add'>+	volatile struct amdgpu_vcn5_fw_shared *fw_shared;</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='ctx'> 	uint32_t tmp;</div><div class='ctx'> 	int i, j, k, r;</div><div class='hunk'>@@ -893,7 +894,7 @@ static void vcn_v5_0_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx)</div><div class='ctx'>  */</div><div class='ctx'> static int vcn_v5_0_0_stop(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	volatile struct amdgpu_vcn4_fw_shared *fw_shared;</div><div class='add'>+	volatile struct amdgpu_vcn5_fw_shared *fw_shared;</div><div class='ctx'> 	uint32_t tmp;</div><div class='ctx'> 	int i, r = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1328,6 +1329,8 @@ static const struct amd_ip_funcs vcn_v5_0_0_ip_funcs = {</div><div class='ctx'> 	.post_soft_reset = NULL,</div><div class='ctx'> 	.set_clockgating_state = vcn_v5_0_0_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vcn_v5_0_0_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version vcn_v5_0_0_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c<br/>index 1a98812981f4..d39c670f6220 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vi.c</a></div><div class='hunk'>@@ -897,7 +897,7 @@ static int vi_asic_pci_config_reset(struct amdgpu_device *adev)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool vi_asic_supports_baco(struct amdgpu_device *adev)</div><div class='add'>+static int vi_asic_supports_baco(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	switch (adev-&gt;asic_type) {</div><div class='ctx'> 	case CHIP_FIJI:</div><div class='hunk'>@@ -908,14 +908,14 @@ static bool vi_asic_supports_baco(struct amdgpu_device *adev)</div><div class='ctx'> 	case CHIP_TOPAZ:</div><div class='ctx'> 		return amdgpu_dpm_is_baco_supported(adev);</div><div class='ctx'> 	default:</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum amd_reset_method</div><div class='ctx'> vi_asic_reset_method(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	bool baco_reset;</div><div class='add'>+	int baco_reset;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_reset_method == AMD_RESET_METHOD_LEGACY ||</div><div class='ctx'> 	    amdgpu_reset_method == AMD_RESET_METHOD_BACO)</div><div class='hunk'>@@ -935,7 +935,7 @@ vi_asic_reset_method(struct amdgpu_device *adev)</div><div class='ctx'> 		baco_reset = amdgpu_dpm_is_baco_supported(adev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		baco_reset = false;</div><div class='add'>+		baco_reset = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2058,6 +2058,8 @@ static const struct amd_ip_funcs vi_common_ip_funcs = {</div><div class='ctx'> 	.set_clockgating_state = vi_common_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = vi_common_set_powergating_state,</div><div class='ctx'> 	.get_clockgating_state = vi_common_get_clockgating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_ip_block_version vi_common_ip_block =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c b/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c<br/>index 769eb8f7bb3c..09315dd5a1ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c</a></div><div class='hunk'>@@ -144,6 +144,12 @@ static int vpe_v6_1_load_microcode(struct amdgpu_vpe *vpe)</div><div class='ctx'> 			WREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL), ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* setup collaborate mode */</div><div class='add'>+	vpe_v6_1_set_collaborate_mode(vpe, true);</div><div class='add'>+	/* setup DPM */</div><div class='add'>+	if (amdgpu_vpe_configure_dpm(vpe))</div><div class='add'>+		dev_warn(adev-&gt;dev, "VPE failed to enable DPM\n");</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For VPE 6.1.1, still only need to add master's offset, and psp will apply it to slave as well.</div><div class='ctx'> 	 * Here use instance 0 as master.</div><div class='hunk'>@@ -159,11 +165,7 @@ static int vpe_v6_1_load_microcode(struct amdgpu_vpe *vpe)</div><div class='ctx'> 		adev-&gt;vpe.cmdbuf_cpu_addr[0] = f32_offset;</div><div class='ctx'> 		adev-&gt;vpe.cmdbuf_cpu_addr[1] = f32_cntl;</div><div class='ctx'> </div><div class='del'>-		amdgpu_vpe_psp_update_sram(adev);</div><div class='del'>-		vpe_v6_1_set_collaborate_mode(vpe, true);</div><div class='del'>-		amdgpu_vpe_configure_dpm(vpe);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='add'>+		return amdgpu_vpe_psp_update_sram(adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vpe_hdr = (const struct vpe_firmware_header_v1_0 *)adev-&gt;vpe.fw-&gt;data;</div><div class='hunk'>@@ -196,8 +198,6 @@ static int vpe_v6_1_load_microcode(struct amdgpu_vpe *vpe)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vpe_v6_1_halt(vpe, false);</div><div class='del'>-	vpe_v6_1_set_collaborate_mode(vpe, true);</div><div class='del'>-	amdgpu_vpe_configure_dpm(vpe);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c<br/>index 55aa74cbc532..fdf171ad4a3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_chardev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_chardev.c</a></div><div class='hunk'>@@ -371,6 +371,11 @@ static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,</div><div class='ctx'> 			err = -EINVAL;</div><div class='ctx'> 			goto err_wptr_map_gart;</div><div class='ctx'> 		}</div><div class='add'>+		if (dev-&gt;adev != amdgpu_ttm_adev(wptr_bo-&gt;tbo.bdev)) {</div><div class='add'>+			pr_err("Queue memory allocated to wrong device\n");</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto err_wptr_map_gart;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		err = amdgpu_amdkfd_map_gtt_bo_to_gart(wptr_bo);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -1139,7 +1144,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,</div><div class='ctx'> 			goto err_unlock;</div><div class='ctx'> 		}</div><div class='ctx'> 		offset = dev-&gt;adev-&gt;rmmio_remap.bus_addr;</div><div class='del'>-		if (!offset) {</div><div class='add'>+		if (!offset || (PAGE_SIZE &gt; 4096)) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto err_unlock;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2307,7 +2312,7 @@ static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		offset = pdd-&gt;dev-&gt;adev-&gt;rmmio_remap.bus_addr;</div><div class='del'>-		if (!offset) {</div><div class='add'>+		if (!offset || (PAGE_SIZE &gt; 4096)) {</div><div class='ctx'> 			pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3349,6 +3354,9 @@ static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process,</div><div class='ctx'> 	if (vma-&gt;vm_end - vma-&gt;vm_start != PAGE_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (PAGE_SIZE &gt; 4096)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	address = dev-&gt;adev-&gt;rmmio_remap.bus_addr;</div><div class='ctx'> </div><div class='ctx'> 	vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c<br/>index 719d6d365e15..9596bca57212 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a></div><div class='hunk'>@@ -435,12 +435,12 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)</div><div class='ctx'> </div><div class='ctx'> 	if (!f2g) {</div><div class='ctx'> 		if (amdgpu_ip_version(adev, GC_HWIP, 0))</div><div class='del'>-			dev_err(kfd_device,</div><div class='add'>+			dev_info(kfd_device,</div><div class='ctx'> 				"GC IP %06x %s not supported in kfd\n",</div><div class='ctx'> 				amdgpu_ip_version(adev, GC_HWIP, 0),</div><div class='ctx'> 				vf ? "VF" : "");</div><div class='ctx'> 		else</div><div class='del'>-			dev_err(kfd_device, "%s %s not supported in kfd\n",</div><div class='add'>+			dev_info(kfd_device, "%s %s not supported in kfd\n",</div><div class='ctx'> 				amdgpu_asic_name[adev-&gt;asic_type], vf ? "VF" : "");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c<br/>index 0b655555e167..c08b6ee25289 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a></div><div class='hunk'>@@ -1997,8 +1997,7 @@ static int unmap_queues_cpsch(struct device_queue_manager *dqm,</div><div class='ctx'> 	 * check those fields</div><div class='ctx'> 	 */</div><div class='ctx'> 	mqd_mgr = dqm-&gt;mqd_mgrs[KFD_MQD_TYPE_HIQ];</div><div class='del'>-	if (mqd_mgr-&gt;read_doorbell_id(dqm-&gt;packet_mgr.priv_queue-&gt;queue-&gt;mqd)) {</div><div class='del'>-		dev_err(dev, "HIQ MQD's queue_doorbell_id0 is not 0, Queue preemption time out\n");</div><div class='add'>+	if (mqd_mgr-&gt;check_preemption_failed(mqd_mgr, dqm-&gt;packet_mgr.priv_queue-&gt;queue-&gt;mqd)) {</div><div class='ctx'> 		while (halt_if_hws_hang)</div><div class='ctx'> 			schedule();</div><div class='ctx'> 		kfd_hws_hang(dqm);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c<br/>index 40a21be6c07c..8e0d0356e810 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c</a></div><div class='hunk'>@@ -134,6 +134,7 @@ static void event_interrupt_poison_consumption(struct kfd_node *dev,</div><div class='ctx'> {</div><div class='ctx'> 	enum amdgpu_ras_block block = 0;</div><div class='ctx'> 	int old_poison, ret = -EINVAL;</div><div class='add'>+	uint32_t reset = 0;</div><div class='ctx'> 	struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);</div><div class='ctx'> </div><div class='ctx'> 	if (!p)</div><div class='hunk'>@@ -153,6 +154,8 @@ static void event_interrupt_poison_consumption(struct kfd_node *dev,</div><div class='ctx'> 	case SOC15_IH_CLIENTID_UTCL2:</div><div class='ctx'> 		ret = kfd_dqm_evict_pasid(dev-&gt;dqm, pasid);</div><div class='ctx'> 		block = AMDGPU_RAS_BLOCK__GFX;</div><div class='add'>+		if (ret)</div><div class='add'>+			reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA0:</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA1:</div><div class='hunk'>@@ -160,6 +163,7 @@ static void event_interrupt_poison_consumption(struct kfd_node *dev,</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA3:</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA4:</div><div class='ctx'> 		block = AMDGPU_RAS_BLOCK__SDMA;</div><div class='add'>+		reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -170,17 +174,16 @@ static void event_interrupt_poison_consumption(struct kfd_node *dev,</div><div class='ctx'> 	/* resetting queue passes, do page retirement without gpu reset</div><div class='ctx'> 	 * resetting queue fails, fallback to gpu reset solution</div><div class='ctx'> 	 */</div><div class='del'>-	if (!ret) {</div><div class='add'>+	if (!ret)</div><div class='ctx'> 		dev_warn(dev-&gt;adev-&gt;dev,</div><div class='ctx'> 			"RAS poison consumption, unmap queue flow succeeded: client id %d\n",</div><div class='ctx'> 			client_id);</div><div class='del'>-		amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, false);</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		dev_warn(dev-&gt;adev-&gt;dev,</div><div class='ctx'> 			"RAS poison consumption, fall back to gpu reset flow: client id %d\n",</div><div class='ctx'> 			client_id);</div><div class='del'>-		amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, true);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, reset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool event_interrupt_isr_v10(struct kfd_node *dev,</div><div class='hunk'>@@ -368,10 +371,25 @@ static void event_interrupt_wq_v10(struct kfd_node *dev,</div><div class='ctx'> 		   client_id == SOC15_IH_CLIENTID_UTCL2) {</div><div class='ctx'> 		struct kfd_vm_fault_info info = {0};</div><div class='ctx'> 		uint16_t ring_id = SOC15_RING_ID_FROM_IH_ENTRY(ih_ring_entry);</div><div class='add'>+		uint32_t node_id = SOC15_NODEID_FROM_IH_ENTRY(ih_ring_entry);</div><div class='add'>+		uint32_t vmid_type = SOC15_VMID_TYPE_FROM_IH_ENTRY(ih_ring_entry);</div><div class='add'>+		int hub_inst = 0;</div><div class='ctx'> 		struct kfd_hsa_memory_exception_data exception_data;</div><div class='ctx'> </div><div class='del'>-		if (client_id == SOC15_IH_CLIENTID_UTCL2 &amp;&amp;</div><div class='del'>-				amdgpu_amdkfd_ras_query_utcl2_poison_status(dev-&gt;adev)) {</div><div class='add'>+		/* gfxhub */</div><div class='add'>+		if (!vmid_type &amp;&amp; dev-&gt;adev-&gt;gfx.funcs-&gt;ih_node_to_logical_xcc) {</div><div class='add'>+			hub_inst = dev-&gt;adev-&gt;gfx.funcs-&gt;ih_node_to_logical_xcc(dev-&gt;adev,</div><div class='add'>+				node_id);</div><div class='add'>+			if (hub_inst &lt; 0)</div><div class='add'>+				hub_inst = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* mmhub */</div><div class='add'>+		if (vmid_type &amp;&amp; client_id == SOC15_IH_CLIENTID_VMC)</div><div class='add'>+			hub_inst = node_id / 4;</div><div class='add'>+</div><div class='add'>+		if (amdgpu_amdkfd_ras_query_utcl2_poison_status(dev-&gt;adev,</div><div class='add'>+					hub_inst, vmid_type)) {</div><div class='ctx'> 			event_interrupt_poison_consumption(dev, pasid, client_id);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c<br/>index fe2ad0c0de95..f524a55eee11 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c</a></div><div class='hunk'>@@ -193,6 +193,7 @@ static void event_interrupt_poison_consumption_v11(struct kfd_node *dev,</div><div class='ctx'> {</div><div class='ctx'> 	enum amdgpu_ras_block block = 0;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='add'>+	uint32_t reset = 0;</div><div class='ctx'> 	struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);</div><div class='ctx'> </div><div class='ctx'> 	if (!p)</div><div class='hunk'>@@ -212,10 +213,13 @@ static void event_interrupt_poison_consumption_v11(struct kfd_node *dev,</div><div class='ctx'> 		if (dev-&gt;dqm-&gt;ops.reset_queues)</div><div class='ctx'> 			ret = dev-&gt;dqm-&gt;ops.reset_queues(dev-&gt;dqm, pasid);</div><div class='ctx'> 		block = AMDGPU_RAS_BLOCK__GFX;</div><div class='add'>+		if (ret)</div><div class='add'>+			reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SOC21_INTSRC_SDMA_ECC:</div><div class='ctx'> 	default:</div><div class='ctx'> 		block = AMDGPU_RAS_BLOCK__GFX;</div><div class='add'>+		reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -223,10 +227,7 @@ static void event_interrupt_poison_consumption_v11(struct kfd_node *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* resetting queue passes, do page retirement without gpu reset</div><div class='ctx'> 	   resetting queue fails, fallback to gpu reset solution */</div><div class='del'>-	if (!ret)</div><div class='del'>-		amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, false);</div><div class='del'>-	else</div><div class='del'>-		amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, true);</div><div class='add'>+	amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, reset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool event_interrupt_isr_v11(struct kfd_node *dev,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c<br/>index c4c6a29052ac..e1c21d250611 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c</a></div><div class='hunk'>@@ -144,7 +144,8 @@ static void event_interrupt_poison_consumption_v9(struct kfd_node *dev,</div><div class='ctx'> 				uint16_t pasid, uint16_t client_id)</div><div class='ctx'> {</div><div class='ctx'> 	enum amdgpu_ras_block block = 0;</div><div class='del'>-	int old_poison, ret = -EINVAL;</div><div class='add'>+	int old_poison;</div><div class='add'>+	uint32_t reset = 0;</div><div class='ctx'> 	struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);</div><div class='ctx'> </div><div class='ctx'> 	if (!p)</div><div class='hunk'>@@ -162,8 +163,13 @@ static void event_interrupt_poison_consumption_v9(struct kfd_node *dev,</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SE2SH:</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SE3SH:</div><div class='ctx'> 	case SOC15_IH_CLIENTID_UTCL2:</div><div class='del'>-		ret = kfd_dqm_evict_pasid(dev-&gt;dqm, pasid);</div><div class='ctx'> 		block = AMDGPU_RAS_BLOCK__GFX;</div><div class='add'>+		reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='add'>+		break;</div><div class='add'>+	case SOC15_IH_CLIENTID_VMC:</div><div class='add'>+	case SOC15_IH_CLIENTID_VMC1:</div><div class='add'>+		block = AMDGPU_RAS_BLOCK__MMHUB;</div><div class='add'>+		reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA0:</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA1:</div><div class='hunk'>@@ -171,27 +177,21 @@ static void event_interrupt_poison_consumption_v9(struct kfd_node *dev,</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA3:</div><div class='ctx'> 	case SOC15_IH_CLIENTID_SDMA4:</div><div class='ctx'> 		block = AMDGPU_RAS_BLOCK__SDMA;</div><div class='add'>+		reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		break;</div><div class='add'>+		dev_warn(dev-&gt;adev-&gt;dev,</div><div class='add'>+			 "client %d does not support poison consumption\n", client_id);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfd_signal_poison_consumed_event(dev, pasid);</div><div class='ctx'> </div><div class='del'>-	/* resetting queue passes, do page retirement without gpu reset</div><div class='del'>-	 * resetting queue fails, fallback to gpu reset solution</div><div class='del'>-	 */</div><div class='del'>-	if (!ret) {</div><div class='del'>-		dev_warn(dev-&gt;adev-&gt;dev,</div><div class='del'>-			"RAS poison consumption, unmap queue flow succeeded: client id %d\n",</div><div class='del'>-			client_id);</div><div class='del'>-		amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, false);</div><div class='del'>-	} else {</div><div class='del'>-		dev_warn(dev-&gt;adev-&gt;dev,</div><div class='del'>-			"RAS poison consumption, fall back to gpu reset flow: client id %d\n",</div><div class='del'>-			client_id);</div><div class='del'>-		amdgpu_amdkfd_ras_poison_consumption_handler(dev-&gt;adev, block, true);</div><div class='del'>-	}</div><div class='add'>+	dev_warn(dev-&gt;adev-&gt;dev,</div><div class='add'>+		 "poison is consumed by client %d, kick off gpu reset flow\n", client_id);</div><div class='add'>+</div><div class='add'>+	amdgpu_amdkfd_ras_pasid_poison_consumption_handler(dev-&gt;adev,</div><div class='add'>+		block, pasid, NULL, NULL, reset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool context_id_expected(struct kfd_dev *dev)</div><div class='hunk'>@@ -414,10 +414,25 @@ static void event_interrupt_wq_v9(struct kfd_node *dev,</div><div class='ctx'> 		   client_id == SOC15_IH_CLIENTID_UTCL2) {</div><div class='ctx'> 		struct kfd_vm_fault_info info = {0};</div><div class='ctx'> 		uint16_t ring_id = SOC15_RING_ID_FROM_IH_ENTRY(ih_ring_entry);</div><div class='add'>+		uint32_t node_id = SOC15_NODEID_FROM_IH_ENTRY(ih_ring_entry);</div><div class='add'>+		uint32_t vmid_type = SOC15_VMID_TYPE_FROM_IH_ENTRY(ih_ring_entry);</div><div class='add'>+		int hub_inst = 0;</div><div class='ctx'> 		struct kfd_hsa_memory_exception_data exception_data;</div><div class='ctx'> </div><div class='del'>-		if (client_id == SOC15_IH_CLIENTID_UTCL2 &amp;&amp;</div><div class='del'>-		    amdgpu_amdkfd_ras_query_utcl2_poison_status(dev-&gt;adev)) {</div><div class='add'>+		/* gfxhub */</div><div class='add'>+		if (!vmid_type &amp;&amp; dev-&gt;adev-&gt;gfx.funcs-&gt;ih_node_to_logical_xcc) {</div><div class='add'>+			hub_inst = dev-&gt;adev-&gt;gfx.funcs-&gt;ih_node_to_logical_xcc(dev-&gt;adev,</div><div class='add'>+				node_id);</div><div class='add'>+			if (hub_inst &lt; 0)</div><div class='add'>+				hub_inst = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* mmhub */</div><div class='add'>+		if (vmid_type &amp;&amp; client_id == SOC15_IH_CLIENTID_VMC)</div><div class='add'>+			hub_inst = node_id / 4;</div><div class='add'>+</div><div class='add'>+		if (amdgpu_amdkfd_ras_query_utcl2_poison_status(dev-&gt;adev,</div><div class='add'>+					hub_inst, vmid_type)) {</div><div class='ctx'> 			event_interrupt_poison_consumption_v9(dev, pasid, client_id);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c b/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c<br/>index dd3c43c1ad70..9b6b6e882593 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c</a></div><div class='hunk'>@@ -104,6 +104,8 @@ void kfd_interrupt_exit(struct kfd_node *node)</div><div class='ctx'> 	 */</div><div class='ctx'> 	flush_workqueue(node-&gt;ih_wq);</div><div class='ctx'> </div><div class='add'>+	destroy_workqueue(node-&gt;ih_wq);</div><div class='add'>+</div><div class='ctx'> 	kfifo_free(&amp;node-&gt;ih_fifo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c<br/>index bdc01ca9609a..4bcfbeac48fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_migrate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_migrate.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@ svm_migrate_gart_map(struct amdgpu_ring *ring, uint64_t npages,</div><div class='ctx'> </div><div class='ctx'> 	dst_addr = amdgpu_bo_gpu_offset(adev-&gt;gart.bo);</div><div class='ctx'> 	amdgpu_emit_copy_buffer(adev, &amp;job-&gt;ibs[0], src_addr,</div><div class='del'>-				dst_addr, num_bytes, false);</div><div class='add'>+				dst_addr, num_bytes, 0);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_ring_pad_ib(ring, &amp;job-&gt;ibs[0]);</div><div class='ctx'> 	WARN_ON(job-&gt;ibs[0].length_dw &gt; num_dw);</div><div class='hunk'>@@ -153,7 +153,7 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *adev, dma_addr_t *sys,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		r = amdgpu_copy_buffer(ring, gart_s, gart_d, size * PAGE_SIZE,</div><div class='del'>-				       NULL, &amp;next, false, true, false);</div><div class='add'>+				       NULL, &amp;next, false, true, 0);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_err(adev-&gt;dev, "fail %d to copy memory\n", r);</div><div class='ctx'> 			goto out_unlock;</div><div class='hunk'>@@ -509,10 +509,19 @@ svm_migrate_ram_to_vram(struct svm_range *prange, uint32_t best_loc,</div><div class='ctx'> 	start = start_mgr &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	end = (last_mgr + 1) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='add'>+	r = amdgpu_amdkfd_reserve_mem_limit(node-&gt;adev,</div><div class='add'>+					prange-&gt;npages * PAGE_SIZE,</div><div class='add'>+					KFD_IOC_ALLOC_MEM_FLAGS_VRAM,</div><div class='add'>+					node-&gt;xcp ? node-&gt;xcp-&gt;id : 0);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_dbg(node-&gt;adev-&gt;dev, "failed to reserve VRAM, r: %ld\n", r);</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	r = svm_range_vram_node_new(node, prange, true);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		dev_dbg(node-&gt;adev-&gt;dev, "fail %ld to alloc vram\n", r);</div><div class='del'>-		return r;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	ttm_res_offset = (start_mgr - prange-&gt;start + prange-&gt;offset) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='hunk'>@@ -545,6 +554,11 @@ svm_migrate_ram_to_vram(struct svm_range *prange, uint32_t best_loc,</div><div class='ctx'> 		svm_range_vram_node_free(prange);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	amdgpu_amdkfd_unreserve_mem_limit(node-&gt;adev,</div><div class='add'>+					prange-&gt;npages * PAGE_SIZE,</div><div class='add'>+					KFD_IOC_ALLOC_MEM_FLAGS_VRAM,</div><div class='add'>+					node-&gt;xcp ? node-&gt;xcp-&gt;id : 0);</div><div class='ctx'> 	return r &lt; 0 ? r : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c<br/>index 050a6936ff84..8746a61a852d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c</a></div><div class='hunk'>@@ -290,3 +290,21 @@ uint64_t kfd_mqd_stride(struct mqd_manager *mm,</div><div class='ctx'> {</div><div class='ctx'> 	return mm-&gt;mqd_size;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool kfd_check_hiq_mqd_doorbell_id(struct kfd_node *node, uint32_t doorbell_id,</div><div class='add'>+				   uint32_t inst)</div><div class='add'>+{</div><div class='add'>+	if (doorbell_id) {</div><div class='add'>+		struct device *dev = node-&gt;adev-&gt;dev;</div><div class='add'>+</div><div class='add'>+		if (node-&gt;adev-&gt;xcp_mgr &amp;&amp; node-&gt;adev-&gt;xcp_mgr-&gt;num_xcps &gt; 0)</div><div class='add'>+			dev_err(dev, "XCC %d: Queue preemption failed for queue with doorbell_id: %x\n",</div><div class='add'>+							inst, doorbell_id);</div><div class='add'>+		else</div><div class='add'>+			dev_err(dev, "Queue preemption failed for queue with doorbell_id: %x\n",</div><div class='add'>+							doorbell_id);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h<br/>index e5cc697a3ca8..17cc1f25c8d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h</a></div><div class='hunk'>@@ -119,7 +119,7 @@ struct mqd_manager {</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> 	int	(*debugfs_show_mqd)(struct seq_file *m, void *data);</div><div class='ctx'> #endif</div><div class='del'>-	uint32_t (*read_doorbell_id)(void *mqd);</div><div class='add'>+	bool (*check_preemption_failed)(struct mqd_manager *mm, void *mqd);</div><div class='ctx'> 	uint64_t (*mqd_stride)(struct mqd_manager *mm,</div><div class='ctx'> 				struct queue_properties *p);</div><div class='ctx'> </div><div class='hunk'>@@ -198,4 +198,6 @@ void kfd_get_hiq_xcc_mqd(struct kfd_node *dev,</div><div class='ctx'> uint64_t kfd_hiq_mqd_stride(struct kfd_node *dev);</div><div class='ctx'> uint64_t kfd_mqd_stride(struct mqd_manager *mm,</div><div class='ctx'> 			struct queue_properties *q);</div><div class='add'>+bool kfd_check_hiq_mqd_doorbell_id(struct kfd_node *node, uint32_t doorbell_id,</div><div class='add'>+				   uint32_t inst);</div><div class='ctx'> #endif /* KFD_MQD_MANAGER_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c<br/>index 1a4a69943c71..05f3ac2eaef9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c</a></div><div class='hunk'>@@ -206,11 +206,11 @@ static void __update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> 	q-&gt;is_active = QUEUE_IS_ACTIVE(*q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static uint32_t read_doorbell_id(void *mqd)</div><div class='add'>+static bool check_preemption_failed(struct mqd_manager *mm, void *mqd)</div><div class='ctx'> {</div><div class='ctx'> 	struct cik_mqd *m = (struct cik_mqd *)mqd;</div><div class='ctx'> </div><div class='del'>-	return m-&gt;queue_doorbell_id0;</div><div class='add'>+	return kfd_check_hiq_mqd_doorbell_id(mm-&gt;dev, m-&gt;queue_doorbell_id0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='hunk'>@@ -423,7 +423,7 @@ struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> 		mqd-&gt;debugfs_show_mqd = debugfs_show_mqd;</div><div class='ctx'> #endif</div><div class='del'>-		mqd-&gt;read_doorbell_id = read_doorbell_id;</div><div class='add'>+		mqd-&gt;check_preemption_failed = check_preemption_failed;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KFD_MQD_TYPE_DIQ:</div><div class='ctx'> 		mqd-&gt;allocate_mqd = allocate_mqd;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c<br/>index 22cbfa1bdadd..2eff37aaf827 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c</a></div><div class='hunk'>@@ -224,11 +224,11 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> 	q-&gt;is_active = QUEUE_IS_ACTIVE(*q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static uint32_t read_doorbell_id(void *mqd)</div><div class='add'>+static bool check_preemption_failed(struct mqd_manager *mm, void *mqd)</div><div class='ctx'> {</div><div class='ctx'> 	struct v10_compute_mqd *m = (struct v10_compute_mqd *)mqd;</div><div class='ctx'> </div><div class='del'>-	return m-&gt;queue_doorbell_id0;</div><div class='add'>+	return kfd_check_hiq_mqd_doorbell_id(mm-&gt;dev, m-&gt;queue_doorbell_id0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int get_wave_state(struct mqd_manager *mm, void *mqd,</div><div class='hunk'>@@ -488,7 +488,7 @@ struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type,</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> 		mqd-&gt;debugfs_show_mqd = debugfs_show_mqd;</div><div class='ctx'> #endif</div><div class='del'>-		mqd-&gt;read_doorbell_id = read_doorbell_id;</div><div class='add'>+		mqd-&gt;check_preemption_failed = check_preemption_failed;</div><div class='ctx'> 		pr_debug("%s@%i\n", __func__, __LINE__);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KFD_MQD_TYPE_DIQ:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c<br/>index 826bc4f6c8a7..68dbc0399c87 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c</a></div><div class='hunk'>@@ -278,11 +278,11 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> 	q-&gt;is_active = QUEUE_IS_ACTIVE(*q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static uint32_t read_doorbell_id(void *mqd)</div><div class='add'>+static bool check_preemption_failed(struct mqd_manager *mm, void *mqd)</div><div class='ctx'> {</div><div class='ctx'> 	struct v11_compute_mqd *m = (struct v11_compute_mqd *)mqd;</div><div class='ctx'> </div><div class='del'>-	return m-&gt;queue_doorbell_id0;</div><div class='add'>+	return kfd_check_hiq_mqd_doorbell_id(mm-&gt;dev, m-&gt;queue_doorbell_id0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int get_wave_state(struct mqd_manager *mm, void *mqd,</div><div class='hunk'>@@ -517,7 +517,7 @@ struct mqd_manager *mqd_manager_init_v11(enum KFD_MQD_TYPE type,</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> 		mqd-&gt;debugfs_show_mqd = debugfs_show_mqd;</div><div class='ctx'> #endif</div><div class='del'>-		mqd-&gt;read_doorbell_id = read_doorbell_id;</div><div class='add'>+		mqd-&gt;check_preemption_failed = check_preemption_failed;</div><div class='ctx'> 		pr_debug("%s@%i\n", __func__, __LINE__);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KFD_MQD_TYPE_DIQ:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c<br/>index 697b6d530d12..6bddc16808d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c</a></div><div class='hunk'>@@ -316,11 +316,11 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static uint32_t read_doorbell_id(void *mqd)</div><div class='add'>+static bool check_preemption_failed(struct mqd_manager *mm, void *mqd)</div><div class='ctx'> {</div><div class='ctx'> 	struct v9_mqd *m = (struct v9_mqd *)mqd;</div><div class='ctx'> </div><div class='del'>-	return m-&gt;queue_doorbell_id0;</div><div class='add'>+	return kfd_check_hiq_mqd_doorbell_id(mm-&gt;dev, m-&gt;queue_doorbell_id0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int get_wave_state(struct mqd_manager *mm, void *mqd,</div><div class='hunk'>@@ -607,6 +607,24 @@ static int destroy_hiq_mqd_v9_4_3(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool check_preemption_failed_v9_4_3(struct mqd_manager *mm, void *mqd)</div><div class='add'>+{</div><div class='add'>+	uint64_t hiq_mqd_size = kfd_hiq_mqd_stride(mm-&gt;dev);</div><div class='add'>+	uint32_t xcc_mask = mm-&gt;dev-&gt;xcc_mask;</div><div class='add'>+	int inst = 0, xcc_id;</div><div class='add'>+	struct v9_mqd *m;</div><div class='add'>+	bool ret = false;</div><div class='add'>+</div><div class='add'>+	for_each_inst(xcc_id, xcc_mask) {</div><div class='add'>+		m = get_mqd(mqd + hiq_mqd_size * inst);</div><div class='add'>+		ret |= kfd_check_hiq_mqd_doorbell_id(mm-&gt;dev,</div><div class='add'>+					m-&gt;queue_doorbell_id0, inst);</div><div class='add'>+		++inst;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void get_xcc_mqd(struct kfd_mem_obj *mqd_mem_obj,</div><div class='ctx'> 			       struct kfd_mem_obj *xcc_mqd_mem_obj,</div><div class='ctx'> 			       uint64_t offset)</div><div class='hunk'>@@ -881,15 +899,16 @@ struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> 		mqd-&gt;debugfs_show_mqd = debugfs_show_mqd;</div><div class='ctx'> #endif</div><div class='del'>-		mqd-&gt;read_doorbell_id = read_doorbell_id;</div><div class='ctx'> 		if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) {</div><div class='ctx'> 			mqd-&gt;init_mqd = init_mqd_hiq_v9_4_3;</div><div class='ctx'> 			mqd-&gt;load_mqd = hiq_load_mqd_kiq_v9_4_3;</div><div class='ctx'> 			mqd-&gt;destroy_mqd = destroy_hiq_mqd_v9_4_3;</div><div class='add'>+			mqd-&gt;check_preemption_failed = check_preemption_failed_v9_4_3;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			mqd-&gt;init_mqd = init_mqd_hiq;</div><div class='ctx'> 			mqd-&gt;load_mqd = kfd_hiq_load_mqd_kiq;</div><div class='ctx'> 			mqd-&gt;destroy_mqd = destroy_hiq_mqd;</div><div class='add'>+			mqd-&gt;check_preemption_failed = check_preemption_failed;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KFD_MQD_TYPE_DIQ:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c<br/>index 3e1a574d4ea6..c1fafc502515 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c</a></div><div class='hunk'>@@ -237,11 +237,11 @@ static void __update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> 	q-&gt;is_active = QUEUE_IS_ACTIVE(*q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static uint32_t read_doorbell_id(void *mqd)</div><div class='add'>+static bool check_preemption_failed(struct mqd_manager *mm, void *mqd)</div><div class='ctx'> {</div><div class='ctx'> 	struct vi_mqd *m = (struct vi_mqd *)mqd;</div><div class='ctx'> </div><div class='del'>-	return m-&gt;queue_doorbell_id0;</div><div class='add'>+	return kfd_check_hiq_mqd_doorbell_id(mm-&gt;dev, m-&gt;queue_doorbell_id0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_mqd(struct mqd_manager *mm, void *mqd,</div><div class='hunk'>@@ -482,7 +482,7 @@ struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> 		mqd-&gt;debugfs_show_mqd = debugfs_show_mqd;</div><div class='ctx'> #endif</div><div class='del'>-		mqd-&gt;read_doorbell_id = read_doorbell_id;</div><div class='add'>+		mqd-&gt;check_preemption_failed = check_preemption_failed;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KFD_MQD_TYPE_DIQ:</div><div class='ctx'> 		mqd-&gt;allocate_mqd = allocate_mqd;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c<br/>index b79986412cd8..451bb058cc62 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_process.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_process.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a></div><div class='hunk'>@@ -829,6 +829,14 @@ struct kfd_process *kfd_create_process(struct task_struct *thread)</div><div class='ctx'> 	if (process) {</div><div class='ctx'> 		pr_debug("Process already found\n");</div><div class='ctx'> 	} else {</div><div class='add'>+		/* If the process just called exec(3), it is possible that the</div><div class='add'>+		 * cleanup of the kfd_process (following the release of the mm</div><div class='add'>+		 * of the old process image) is still in the cleanup work queue.</div><div class='add'>+		 * Make sure to drain any job before trying to recreate any</div><div class='add'>+		 * resource for this process.</div><div class='add'>+		 */</div><div class='add'>+		flush_workqueue(kfd_process_wq);</div><div class='add'>+</div><div class='ctx'> 		process = create_process(thread);</div><div class='ctx'> 		if (IS_ERR(process))</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -1922,6 +1930,8 @@ static int signal_eviction_fence(struct kfd_process *p)</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	ef = dma_fence_get_rcu_safe(&amp;p-&gt;ef);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='add'>+	if (!ef)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = dma_fence_signal(ef);</div><div class='ctx'> 	dma_fence_put(ef);</div><div class='hunk'>@@ -1949,10 +1959,9 @@ static void evict_process_worker(struct work_struct *work)</div><div class='ctx'> 		 * they are responsible stopping the queues and scheduling</div><div class='ctx'> 		 * the restore work.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!signal_eviction_fence(p))</div><div class='del'>-			queue_delayed_work(kfd_restore_wq, &amp;p-&gt;restore_work,</div><div class='del'>-				msecs_to_jiffies(PROCESS_RESTORE_TIME_MS));</div><div class='del'>-		else</div><div class='add'>+		if (signal_eviction_fence(p) ||</div><div class='add'>+		    mod_delayed_work(kfd_restore_wq, &amp;p-&gt;restore_work,</div><div class='add'>+				     msecs_to_jiffies(PROCESS_RESTORE_TIME_MS)))</div><div class='ctx'> 			kfd_process_restore_queues(p);</div><div class='ctx'> </div><div class='ctx'> 		pr_debug("Finished evicting pasid 0x%x\n", p-&gt;pasid);</div><div class='hunk'>@@ -2011,9 +2020,9 @@ static void restore_process_worker(struct work_struct *work)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_debug("Failed to restore BOs of pasid 0x%x, retry after %d ms\n",</div><div class='ctx'> 			 p-&gt;pasid, PROCESS_BACK_OFF_TIME_MS);</div><div class='del'>-		ret = queue_delayed_work(kfd_restore_wq, &amp;p-&gt;restore_work,</div><div class='del'>-				msecs_to_jiffies(PROCESS_BACK_OFF_TIME_MS));</div><div class='del'>-		WARN(!ret, "reschedule restore work failed\n");</div><div class='add'>+		if (mod_delayed_work(kfd_restore_wq, &amp;p-&gt;restore_work,</div><div class='add'>+				     msecs_to_jiffies(PROCESS_RESTORE_TIME_MS)))</div><div class='add'>+			kfd_process_restore_queues(p);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c<br/>index f0f7f48af413..386875e6eb96 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_svm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_svm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_svm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_svm.c</a></div><div class='hunk'>@@ -3426,7 +3426,7 @@ svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,</div><div class='ctx'> 				mm, KFD_MIGRATE_TRIGGER_PREFETCH);</div><div class='ctx'> 	*migrated = !r;</div><div class='ctx'> </div><div class='del'>-	return r;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c<br/>index c51f131eaa2f..bc9eb847ecfe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_topology.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/amdkfd/kfd_topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/amdkfd/kfd_topology.c</a></div><div class='hunk'>@@ -1997,9 +1997,8 @@ int kfd_topology_add_device(struct kfd_node *gpu)</div><div class='ctx'> 			HSA_CAP_ASIC_REVISION_MASK);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;node_props.location_id = pci_dev_id(gpu-&gt;adev-&gt;pdev);</div><div class='del'>-	/* On multi-partition nodes, node id = location_id[31:28] */</div><div class='del'>-	if (gpu-&gt;kfd-&gt;num_nodes &gt; 1)</div><div class='del'>-		dev-&gt;node_props.location_id |= (dev-&gt;gpu-&gt;node_id &lt;&lt; 28);</div><div class='add'>+	if (KFD_GC_VERSION(dev-&gt;gpu-&gt;kfd) == IP_VERSION(9, 4, 3))</div><div class='add'>+		dev-&gt;node_props.location_id |= dev-&gt;gpu-&gt;node_id;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;node_props.domain = pci_domain_nr(gpu-&gt;adev-&gt;pdev-&gt;bus);</div><div class='ctx'> 	dev-&gt;node_props.max_engine_clk_fcompute =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/Makefile b/drivers/gpu/drm/amd/display/Makefile<br/>index 92a5c5efcf92..9a5bcafbf730 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/Makefile</a></div><div class='hunk'>@@ -33,6 +33,7 @@ subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/hwss</div><div class='ctx'> subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/resource</div><div class='ctx'> subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/dsc</div><div class='ctx'> subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/optc</div><div class='add'>+subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/dpp</div><div class='ctx'> subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/inc</div><div class='ctx'> subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/freesync</div><div class='ctx'> subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/color</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br/>index 6d2f60c61dec..f1d67c6f4b98 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</a></div><div class='hunk'>@@ -274,7 +274,7 @@ static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc)</div><div class='ctx'> static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,</div><div class='ctx'> 				  u32 *vbl, u32 *position)</div><div class='ctx'> {</div><div class='del'>-	u32 v_blank_start, v_blank_end, h_position, v_position;</div><div class='add'>+	u32 v_blank_start = 0, v_blank_end = 0, h_position = 0, v_position = 0;</div><div class='ctx'> 	struct amdgpu_crtc *acrtc = NULL;</div><div class='ctx'> 	struct dc *dc = adev-&gt;dm.dc;</div><div class='ctx'> </div><div class='hunk'>@@ -848,7 +848,7 @@ static void dm_handle_hpd_work(struct work_struct *work)</div><div class='ctx'>  */</div><div class='ctx'> static void dm_dmub_outbox1_low_irq(void *interrupt_params)</div><div class='ctx'> {</div><div class='del'>-	struct dmub_notification notify;</div><div class='add'>+	struct dmub_notification notify = {0};</div><div class='ctx'> 	struct common_irq_params *irq_params = interrupt_params;</div><div class='ctx'> 	struct amdgpu_device *adev = irq_params-&gt;adev;</div><div class='ctx'> 	struct amdgpu_display_manager *dm = &amp;adev-&gt;dm;</div><div class='hunk'>@@ -1230,6 +1230,15 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(3, 5, 0):</div><div class='add'>+	case IP_VERSION(3, 5, 1):</div><div class='add'>+		hw_params.ips_sequential_ono = adev-&gt;external_rev_id &gt; 0x10;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	status = dmub_srv_hw_init(dmub_srv, &amp;hw_params);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='ctx'> 		DRM_ERROR("Error initializing DMUB HW: %d\n", status);</div><div class='hunk'>@@ -1726,8 +1735,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_dc_debug_mask &amp; DC_DISABLE_IPS)</div><div class='ctx'> 		init_data.flags.disable_ips = DMUB_IPS_DISABLE_ALL;</div><div class='add'>+	else</div><div class='add'>+		init_data.flags.disable_ips = DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF;</div><div class='ctx'> </div><div class='del'>-	init_data.flags.disable_ips_in_vpb = 1;</div><div class='add'>+	init_data.flags.disable_ips_in_vpb = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable DWB for tested platforms only */</div><div class='ctx'> 	if (amdgpu_ip_version(adev, DCE_HWIP, 0) &gt;= IP_VERSION(3, 0, 0))</div><div class='hunk'>@@ -2629,6 +2640,7 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct dc_stream_state *del_streams[MAX_PIPES];</div><div class='ctx'> 	int del_streams_count = 0;</div><div class='add'>+	struct dc_commit_streams_params params = {};</div><div class='ctx'> </div><div class='ctx'> 	memset(del_streams, 0, sizeof(del_streams));</div><div class='ctx'> </div><div class='hunk'>@@ -2655,7 +2667,9 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = dc_commit_streams(dc, context-&gt;streams, context-&gt;stream_count);</div><div class='add'>+	params.streams = context-&gt;streams;</div><div class='add'>+	params.stream_count = context-&gt;stream_count;</div><div class='add'>+	res = dc_commit_streams(dc, &amp;params);</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='ctx'> 	dc_state_release(context);</div><div class='hunk'>@@ -2877,6 +2891,7 @@ static int dm_resume(void *handle)</div><div class='ctx'> 	struct dc_state *dc_state;</div><div class='ctx'> 	int i, r, j, ret;</div><div class='ctx'> 	bool need_hotplug = false;</div><div class='add'>+	struct dc_commit_streams_params commit_params = {};</div><div class='ctx'> </div><div class='ctx'> 	if (dm-&gt;dc-&gt;caps.ips_support) {</div><div class='ctx'> 		dc_dmub_srv_apply_idle_power_optimizations(dm-&gt;dc, false);</div><div class='hunk'>@@ -2926,7 +2941,9 @@ static int dm_resume(void *handle)</div><div class='ctx'> 			dc_enable_dmub_outbox(adev-&gt;dm.dc);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		WARN_ON(!dc_commit_streams(dm-&gt;dc, dc_state-&gt;streams, dc_state-&gt;stream_count));</div><div class='add'>+		commit_params.streams = dc_state-&gt;streams;</div><div class='add'>+		commit_params.stream_count = dc_state-&gt;stream_count;</div><div class='add'>+		WARN_ON(!dc_commit_streams(dm-&gt;dc, &amp;commit_params));</div><div class='ctx'> </div><div class='ctx'> 		dm_gpureset_commit_state(dm-&gt;cached_dc_state, dm);</div><div class='ctx'> </div><div class='hunk'>@@ -2943,7 +2960,7 @@ static int dm_resume(void *handle)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Recreate dc_state - DC invalidates it when setting power state to S3. */</div><div class='ctx'> 	dc_state_release(dm_state-&gt;context);</div><div class='del'>-	dm_state-&gt;context = dc_state_create(dm-&gt;dc);</div><div class='add'>+	dm_state-&gt;context = dc_state_create(dm-&gt;dc, NULL);</div><div class='ctx'> 	/* TODO: Remove dc_state-&gt;dccg, use dc-&gt;dccg directly. */</div><div class='ctx'> </div><div class='ctx'> 	/* Before powering on DC we need to re-initialize DMUB. */</div><div class='hunk'>@@ -3029,6 +3046,7 @@ static int dm_resume(void *handle)</div><div class='ctx'> 			dc_stream_release(dm_new_crtc_state-&gt;stream);</div><div class='ctx'> 			dm_new_crtc_state-&gt;stream = NULL;</div><div class='ctx'> 		}</div><div class='add'>+		dm_new_crtc_state-&gt;base.color_mgmt_changed = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_new_plane_in_state(dm-&gt;cached_state, plane, new_plane_state, i) {</div><div class='hunk'>@@ -3103,6 +3121,8 @@ static const struct amd_ip_funcs amdgpu_dm_funcs = {</div><div class='ctx'> 	.soft_reset = dm_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = dm_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = dm_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version dm_ip_block = {</div><div class='hunk'>@@ -4536,15 +4556,18 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 	/* Determine whether to enable Replay support by default. */</div><div class='ctx'> 	if (!(amdgpu_dc_debug_mask &amp; DC_DISABLE_REPLAY)) {</div><div class='ctx'> 		switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {</div><div class='del'>-		case IP_VERSION(3, 1, 4):</div><div class='del'>-		case IP_VERSION(3, 1, 5):</div><div class='del'>-		case IP_VERSION(3, 1, 6):</div><div class='del'>-		case IP_VERSION(3, 2, 0):</div><div class='del'>-		case IP_VERSION(3, 2, 1):</div><div class='del'>-		case IP_VERSION(3, 5, 0):</div><div class='del'>-		case IP_VERSION(3, 5, 1):</div><div class='del'>-			replay_feature_enabled = true;</div><div class='del'>-			break;</div><div class='add'>+/*</div><div class='add'>+ * Disabled by default due to https://gitlab.freedesktop.org/drm/amd/-/issues/3344</div><div class='add'>+ *		case IP_VERSION(3, 1, 4):</div><div class='add'>+ *		case IP_VERSION(3, 1, 5):</div><div class='add'>+ *		case IP_VERSION(3, 1, 6):</div><div class='add'>+ *		case IP_VERSION(3, 2, 0):</div><div class='add'>+ *		case IP_VERSION(3, 2, 1):</div><div class='add'>+ *		case IP_VERSION(3, 5, 0):</div><div class='add'>+ *		case IP_VERSION(3, 5, 1):</div><div class='add'>+ *			replay_feature_enabled = true;</div><div class='add'>+ *			break;</div><div class='add'>+ */</div><div class='ctx'> 		default:</div><div class='ctx'> 			replay_feature_enabled = amdgpu_dc_feature_mask &amp; DC_REPLAY_MASK;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -5709,8 +5732,8 @@ static void fill_stream_properties_from_drm_display_mode(</div><div class='ctx'> </div><div class='ctx'> 	timing_out-&gt;aspect_ratio = get_aspect_ratio(mode_in);</div><div class='ctx'> </div><div class='del'>-	stream-&gt;out_transfer_func-&gt;type = TF_TYPE_PREDEFINED;</div><div class='del'>-	stream-&gt;out_transfer_func-&gt;tf = TRANSFER_FUNCTION_SRGB;</div><div class='add'>+	stream-&gt;out_transfer_func.type = TF_TYPE_PREDEFINED;</div><div class='add'>+	stream-&gt;out_transfer_func.tf = TRANSFER_FUNCTION_SRGB;</div><div class='ctx'> 	if (stream-&gt;signal == SIGNAL_TYPE_HDMI_TYPE_A) {</div><div class='ctx'> 		if (!adjust_colour_depth_from_display_info(timing_out, info) &amp;&amp;</div><div class='ctx'> 		    drm_mode_is_420_also(info, mode_in) &amp;&amp;</div><div class='hunk'>@@ -6328,7 +6351,7 @@ create_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 		stream-&gt;use_vsc_sdp_for_colorimetry = stream-&gt;link-&gt;dpcd_caps.dpcd_rev.raw &gt;= 0x14 &amp;&amp;</div><div class='ctx'> 						      stream-&gt;link-&gt;dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED;</div><div class='ctx'> </div><div class='del'>-		if (stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_GAMMA22)</div><div class='add'>+		if (stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22)</div><div class='ctx'> 			tf = TRANSFER_FUNC_GAMMA_22;</div><div class='ctx'> 		mod_build_vsc_infopacket(stream, &amp;stream-&gt;vsc_infopacket, stream-&gt;output_color_space, tf);</div><div class='ctx'> 		aconnector-&gt;psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;</div><div class='hunk'>@@ -6799,7 +6822,7 @@ static enum dc_status dm_validate_stream_and_context(struct dc *dc,</div><div class='ctx'> 	if (!dc_plane_state)</div><div class='ctx'> 		goto cleanup;</div><div class='ctx'> </div><div class='del'>-	dc_state = dc_state_create(dc);</div><div class='add'>+	dc_state = dc_state_create(dc, NULL);</div><div class='ctx'> 	if (!dc_state)</div><div class='ctx'> 		goto cleanup;</div><div class='ctx'> </div><div class='hunk'>@@ -7188,7 +7211,7 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,</div><div class='ctx'> 	struct amdgpu_dm_connector *aconnector;</div><div class='ctx'> 	struct dm_connector_state *dm_conn_state;</div><div class='ctx'> 	int i, j, ret;</div><div class='del'>-	int vcpi, pbn_div, pbn, slot_num = 0;</div><div class='add'>+	int vcpi, pbn_div, pbn = 0, slot_num = 0;</div><div class='ctx'> </div><div class='ctx'> 	for_each_new_connector_in_state(state, connector, new_con_state, i) {</div><div class='ctx'> </div><div class='hunk'>@@ -8401,13 +8424,13 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 		bundle-&gt;surface_updates[planes_count].surface = dc_plane;</div><div class='ctx'> 		if (new_pcrtc_state-&gt;color_mgmt_changed) {</div><div class='del'>-			bundle-&gt;surface_updates[planes_count].gamma = dc_plane-&gt;gamma_correction;</div><div class='del'>-			bundle-&gt;surface_updates[planes_count].in_transfer_func = dc_plane-&gt;in_transfer_func;</div><div class='add'>+			bundle-&gt;surface_updates[planes_count].gamma = &amp;dc_plane-&gt;gamma_correction;</div><div class='add'>+			bundle-&gt;surface_updates[planes_count].in_transfer_func = &amp;dc_plane-&gt;in_transfer_func;</div><div class='ctx'> 			bundle-&gt;surface_updates[planes_count].gamut_remap_matrix = &amp;dc_plane-&gt;gamut_remap_matrix;</div><div class='ctx'> 			bundle-&gt;surface_updates[planes_count].hdr_mult = dc_plane-&gt;hdr_mult;</div><div class='del'>-			bundle-&gt;surface_updates[planes_count].func_shaper = dc_plane-&gt;in_shaper_func;</div><div class='del'>-			bundle-&gt;surface_updates[planes_count].lut3d_func = dc_plane-&gt;lut3d_func;</div><div class='del'>-			bundle-&gt;surface_updates[planes_count].blend_tf = dc_plane-&gt;blend_tf;</div><div class='add'>+			bundle-&gt;surface_updates[planes_count].func_shaper = &amp;dc_plane-&gt;in_shaper_func;</div><div class='add'>+			bundle-&gt;surface_updates[planes_count].lut3d_func = &amp;dc_plane-&gt;lut3d_func;</div><div class='add'>+			bundle-&gt;surface_updates[planes_count].blend_tf = &amp;dc_plane-&gt;blend_tf;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_dm_plane_fill_dc_scaling_info(dm-&gt;adev, new_plane_state,</div><div class='hunk'>@@ -8620,7 +8643,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,</div><div class='ctx'> 			bundle-&gt;stream_update.output_csc_transform =</div><div class='ctx'> 				&amp;acrtc_state-&gt;stream-&gt;csc_color_matrix;</div><div class='ctx'> 			bundle-&gt;stream_update.out_transfer_func =</div><div class='del'>-				acrtc_state-&gt;stream-&gt;out_transfer_func;</div><div class='add'>+				&amp;acrtc_state-&gt;stream-&gt;out_transfer_func;</div><div class='ctx'> 			bundle-&gt;stream_update.lut3d_func =</div><div class='ctx'> 				(struct dc_3dlut *) acrtc_state-&gt;stream-&gt;lut3d_func;</div><div class='ctx'> 			bundle-&gt;stream_update.func_shaper =</div><div class='hunk'>@@ -8854,6 +8877,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state,</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='ctx'> 	bool mode_set_reset_required = false;</div><div class='ctx'> 	u32 i;</div><div class='add'>+	struct dc_commit_streams_params params = {dc_state-&gt;streams, dc_state-&gt;stream_count};</div><div class='ctx'> </div><div class='ctx'> 	/* Disable writeback */</div><div class='ctx'> 	for_each_old_connector_in_state(state, connector, old_con_state, i) {</div><div class='hunk'>@@ -8990,7 +9014,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 	dm_enable_per_frame_crtc_master_sync(dc_state);</div><div class='ctx'> 	mutex_lock(&amp;dm-&gt;dc_lock);</div><div class='del'>-	WARN_ON(!dc_commit_streams(dm-&gt;dc, dc_state-&gt;streams, dc_state-&gt;stream_count));</div><div class='add'>+	WARN_ON(!dc_commit_streams(dm-&gt;dc, &amp;params));</div><div class='ctx'> </div><div class='ctx'> 	/* Allow idle optimization when vblank count is 0 for display off */</div><div class='ctx'> 	if (dm-&gt;active_vblank_irq_count == 0)</div><div class='hunk'>@@ -10594,7 +10618,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,</div><div class='ctx'> 	struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;</div><div class='ctx'> 	struct drm_dp_mst_topology_mgr *mgr;</div><div class='ctx'> 	struct drm_dp_mst_topology_state *mst_state;</div><div class='del'>-	struct dsc_mst_fairness_vars vars[MAX_PIPES];</div><div class='add'>+	struct dsc_mst_fairness_vars vars[MAX_PIPES] = {0};</div><div class='ctx'> </div><div class='ctx'> 	trace_amdgpu_dm_atomic_check_begin(state);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c<br/>index c87b64e464ed..ebabfe3a512f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c</a></div><div class='hunk'>@@ -571,7 +571,7 @@ static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,</div><div class='ctx'> 					uint32_t regamma_size, bool has_rom,</div><div class='ctx'> 					enum dc_transfer_func_predefined tf)</div><div class='ctx'> {</div><div class='del'>-	struct dc_transfer_func *out_tf = stream-&gt;out_transfer_func;</div><div class='add'>+	struct dc_transfer_func *out_tf = &amp;stream-&gt;out_transfer_func;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (regamma_size || tf != TRANSFER_FUNCTION_LINEAR) {</div><div class='hunk'>@@ -954,8 +954,8 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc)</div><div class='ctx'> 		 * inverse color ramp in legacy userspace.</div><div class='ctx'> 		 */</div><div class='ctx'> 		crtc-&gt;cm_is_degamma_srgb = true;</div><div class='del'>-		stream-&gt;out_transfer_func-&gt;type = TF_TYPE_DISTRIBUTED_POINTS;</div><div class='del'>-		stream-&gt;out_transfer_func-&gt;tf = TRANSFER_FUNCTION_SRGB;</div><div class='add'>+		stream-&gt;out_transfer_func.type = TF_TYPE_DISTRIBUTED_POINTS;</div><div class='add'>+		stream-&gt;out_transfer_func.tf = TRANSFER_FUNCTION_SRGB;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Note: although we pass has_rom as parameter here, we never</div><div class='ctx'> 		 * actually use ROM because the color module only takes the ROM</div><div class='hunk'>@@ -963,7 +963,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc)</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * See more in mod_color_calculate_regamma_params()</div><div class='ctx'> 		 */</div><div class='del'>-		r = __set_legacy_tf(stream-&gt;out_transfer_func, regamma_lut,</div><div class='add'>+		r = __set_legacy_tf(&amp;stream-&gt;out_transfer_func, regamma_lut,</div><div class='ctx'> 				    regamma_size, has_rom);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -1034,7 +1034,7 @@ map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,</div><div class='ctx'> 						 &amp;degamma_size);</div><div class='ctx'> 		ASSERT(degamma_size == MAX_COLOR_LUT_ENTRIES);</div><div class='ctx'> </div><div class='del'>-		dc_plane_state-&gt;in_transfer_func-&gt;type = TF_TYPE_DISTRIBUTED_POINTS;</div><div class='add'>+		dc_plane_state-&gt;in_transfer_func.type = TF_TYPE_DISTRIBUTED_POINTS;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This case isn't fully correct, but also fairly</div><div class='hunk'>@@ -1061,12 +1061,12 @@ map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,</div><div class='ctx'> 		 * map these to the atomic one instead.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (crtc-&gt;cm_is_degamma_srgb)</div><div class='del'>-			dc_plane_state-&gt;in_transfer_func-&gt;tf = tf;</div><div class='add'>+			dc_plane_state-&gt;in_transfer_func.tf = tf;</div><div class='ctx'> 		else</div><div class='del'>-			dc_plane_state-&gt;in_transfer_func-&gt;tf =</div><div class='add'>+			dc_plane_state-&gt;in_transfer_func.tf =</div><div class='ctx'> 				TRANSFER_FUNCTION_LINEAR;</div><div class='ctx'> </div><div class='del'>-		r = __set_input_tf(caps, dc_plane_state-&gt;in_transfer_func,</div><div class='add'>+		r = __set_input_tf(caps, &amp;dc_plane_state-&gt;in_transfer_func,</div><div class='ctx'> 				   degamma_lut, degamma_size);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -1075,12 +1075,12 @@ map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,</div><div class='ctx'> 		 * For legacy gamma support we need the regamma input</div><div class='ctx'> 		 * in linear space. Assume that the input is sRGB.</div><div class='ctx'> 		 */</div><div class='del'>-		dc_plane_state-&gt;in_transfer_func-&gt;type = TF_TYPE_PREDEFINED;</div><div class='del'>-		dc_plane_state-&gt;in_transfer_func-&gt;tf = tf;</div><div class='add'>+		dc_plane_state-&gt;in_transfer_func.type = TF_TYPE_PREDEFINED;</div><div class='add'>+		dc_plane_state-&gt;in_transfer_func.tf = tf;</div><div class='ctx'> </div><div class='ctx'> 		if (tf != TRANSFER_FUNCTION_SRGB &amp;&amp;</div><div class='ctx'> 		    !mod_color_calculate_degamma_params(caps,</div><div class='del'>-							dc_plane_state-&gt;in_transfer_func,</div><div class='add'>+							&amp;dc_plane_state-&gt;in_transfer_func,</div><div class='ctx'> 							NULL, false))</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1114,24 +1114,24 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state,</div><div class='ctx'> 	if (!has_degamma_lut &amp;&amp; tf == AMDGPU_TRANSFER_FUNCTION_DEFAULT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	dc_plane_state-&gt;in_transfer_func-&gt;tf = amdgpu_tf_to_dc_tf(tf);</div><div class='add'>+	dc_plane_state-&gt;in_transfer_func.tf = amdgpu_tf_to_dc_tf(tf);</div><div class='ctx'> </div><div class='ctx'> 	if (has_degamma_lut) {</div><div class='ctx'> 		ASSERT(degamma_size == MAX_COLOR_LUT_ENTRIES);</div><div class='ctx'> </div><div class='del'>-		dc_plane_state-&gt;in_transfer_func-&gt;type =</div><div class='add'>+		dc_plane_state-&gt;in_transfer_func.type =</div><div class='ctx'> 			TF_TYPE_DISTRIBUTED_POINTS;</div><div class='ctx'> </div><div class='del'>-		ret = __set_input_tf(color_caps, dc_plane_state-&gt;in_transfer_func,</div><div class='add'>+		ret = __set_input_tf(color_caps, &amp;dc_plane_state-&gt;in_transfer_func,</div><div class='ctx'> 				     degamma_lut, degamma_size);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'>        } else {</div><div class='del'>-		dc_plane_state-&gt;in_transfer_func-&gt;type =</div><div class='add'>+		dc_plane_state-&gt;in_transfer_func.type =</div><div class='ctx'> 			TF_TYPE_PREDEFINED;</div><div class='ctx'> </div><div class='ctx'> 		if (!mod_color_calculate_degamma_params(color_caps,</div><div class='del'>-		    dc_plane_state-&gt;in_transfer_func, NULL, false))</div><div class='add'>+		    &amp;dc_plane_state-&gt;in_transfer_func, NULL, false))</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1156,11 +1156,11 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,</div><div class='ctx'> 	lut3d = __extract_blob_lut(dm_plane_state-&gt;lut3d, &amp;lut3d_size);</div><div class='ctx'> 	lut3d_size = lut3d != NULL ? lut3d_size : 0;</div><div class='ctx'> </div><div class='del'>-	amdgpu_dm_atomic_lut3d(lut3d, lut3d_size, dc_plane_state-&gt;lut3d_func);</div><div class='add'>+	amdgpu_dm_atomic_lut3d(lut3d, lut3d_size, &amp;dc_plane_state-&gt;lut3d_func);</div><div class='ctx'> 	ret = amdgpu_dm_atomic_shaper_lut(shaper_lut, false,</div><div class='ctx'> 					  amdgpu_tf_to_dc_tf(shaper_tf),</div><div class='ctx'> 					  shaper_size,</div><div class='del'>-					  dc_plane_state-&gt;in_shaper_func);</div><div class='add'>+					  &amp;dc_plane_state-&gt;in_shaper_func);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		drm_dbg_kms(plane_state-&gt;plane-&gt;dev,</div><div class='ctx'> 			    "setting plane %d shaper LUT failed.\n",</div><div class='hunk'>@@ -1175,7 +1175,7 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,</div><div class='ctx'> </div><div class='ctx'> 	ret = amdgpu_dm_atomic_blend_lut(blend_lut, false,</div><div class='ctx'> 					 amdgpu_tf_to_dc_tf(blend_tf),</div><div class='del'>-					 blend_size, dc_plane_state-&gt;blend_tf);</div><div class='add'>+					 blend_size, &amp;dc_plane_state-&gt;blend_tf);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		drm_dbg_kms(plane_state-&gt;plane-&gt;dev,</div><div class='ctx'> 			    "setting plane %d gamma lut failed.\n",</div><div class='hunk'>@@ -1221,8 +1221,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,</div><div class='ctx'> 		color_caps = &amp;dc_plane_state-&gt;ctx-&gt;dc-&gt;caps.color;</div><div class='ctx'> </div><div class='ctx'> 	/* Initially, we can just bypass the DGM block. */</div><div class='del'>-	dc_plane_state-&gt;in_transfer_func-&gt;type = TF_TYPE_BYPASS;</div><div class='del'>-	dc_plane_state-&gt;in_transfer_func-&gt;tf = TRANSFER_FUNCTION_LINEAR;</div><div class='add'>+	dc_plane_state-&gt;in_transfer_func.type = TF_TYPE_BYPASS;</div><div class='add'>+	dc_plane_state-&gt;in_transfer_func.tf = TRANSFER_FUNCTION_LINEAR;</div><div class='ctx'> </div><div class='ctx'> 	/* After, we start to update values according to color props */</div><div class='ctx'> 	has_crtc_cm_degamma = (crtc-&gt;cm_has_degamma || crtc-&gt;cm_is_degamma_srgb);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c<br/>index eee4945653e2..4d7a5d470b1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c</a></div><div class='hunk'>@@ -1249,7 +1249,7 @@ static ssize_t dp_sdp_message_debugfs_write(struct file *f, const char __user *b</div><div class='ctx'> 				 size_t size, loff_t *pos)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='del'>-	uint8_t data[36];</div><div class='add'>+	uint8_t data[36] = {0};</div><div class='ctx'> 	struct amdgpu_dm_connector *connector = file_inode(f)-&gt;i_private;</div><div class='ctx'> 	struct dm_crtc_state *acrtc_state;</div><div class='ctx'> 	uint32_t write_size = 36;</div><div class='hunk'>@@ -1495,7 +1495,9 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1596,7 +1598,9 @@ static ssize_t dp_dsc_clock_en_write(struct file *f, const char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1681,7 +1685,9 @@ static ssize_t dp_dsc_slice_width_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1780,7 +1786,9 @@ static ssize_t dp_dsc_slice_width_write(struct file *f, const char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1865,7 +1873,9 @@ static ssize_t dp_dsc_slice_height_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1964,7 +1974,9 @@ static ssize_t dp_dsc_slice_height_write(struct file *f, const char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2045,7 +2057,9 @@ static ssize_t dp_dsc_bits_per_pixel_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2141,7 +2155,9 @@ static ssize_t dp_dsc_bits_per_pixel_write(struct file *f, const char __user *bu</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2220,7 +2236,9 @@ static ssize_t dp_dsc_pic_width_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2276,7 +2294,9 @@ static ssize_t dp_dsc_pic_height_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2347,7 +2367,9 @@ static ssize_t dp_dsc_chunk_size_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2418,7 +2440,9 @@ static ssize_t dp_dsc_slice_bpg_offset_read(struct file *f, char __user *buf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		pipe_ctx = &amp;aconnector-&gt;dc_link-&gt;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> 		if (pipe_ctx-&gt;stream &amp;&amp;</div><div class='del'>-		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link)</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;link == aconnector-&gt;dc_link &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink &amp;&amp;</div><div class='add'>+		    pipe_ctx-&gt;stream-&gt;sink == aconnector-&gt;dc_sink)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2936,7 +2960,7 @@ static int psr_read_residency(void *data, u64 *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_dm_connector *connector = data;</div><div class='ctx'> 	struct dc_link *link = connector-&gt;dc_link;</div><div class='del'>-	u32 residency;</div><div class='add'>+	u32 residency = 0;</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;dc-&gt;link_srv-&gt;edp_get_psr_residency(link, &amp;residency);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c<br/>index 941e96f100f4..35733d5c5193 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c</a></div><div class='hunk'>@@ -791,25 +791,12 @@ struct dsc_mst_fairness_params {</div><div class='ctx'> 	struct amdgpu_dm_connector *aconnector;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static uint16_t get_fec_overhead_multiplier(struct dc_link *dc_link)</div><div class='del'>-{</div><div class='del'>-	u8 link_coding_cap;</div><div class='del'>-	uint16_t fec_overhead_multiplier_x1000 = PBN_FEC_OVERHEAD_MULTIPLIER_8B_10B;</div><div class='del'>-</div><div class='del'>-	link_coding_cap = dc_link_dp_mst_decide_link_encoding_format(dc_link);</div><div class='del'>-	if (link_coding_cap == DP_128b_132b_ENCODING)</div><div class='del'>-		fec_overhead_multiplier_x1000 = PBN_FEC_OVERHEAD_MULTIPLIER_128B_132B;</div><div class='del'>-</div><div class='del'>-	return fec_overhead_multiplier_x1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kbps_to_peak_pbn(int kbps, uint16_t fec_overhead_multiplier_x1000)</div><div class='add'>+static int kbps_to_peak_pbn(int kbps)</div><div class='ctx'> {</div><div class='ctx'> 	u64 peak_kbps = kbps;</div><div class='ctx'> </div><div class='ctx'> 	peak_kbps *= 1006;</div><div class='del'>-	peak_kbps *= fec_overhead_multiplier_x1000;</div><div class='del'>-	peak_kbps = div_u64(peak_kbps, 1000 * 1000);</div><div class='add'>+	peak_kbps = div_u64(peak_kbps, 1000);</div><div class='ctx'> 	return (int) DIV64_U64_ROUND_UP(peak_kbps * 64, (54 * 8 * 1000));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -910,12 +897,11 @@ static int increase_dsc_bpp(struct drm_atomic_state *state,</div><div class='ctx'> 	int link_timeslots_used;</div><div class='ctx'> 	int fair_pbn_alloc;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='ctx'> 		if (vars[i + k].dsc_enabled) {</div><div class='ctx'> 			initial_slack[i] =</div><div class='del'>-			kbps_to_peak_pbn(params[i].bw_range.max_kbps, fec_overhead_multiplier_x1000) - vars[i + k].pbn;</div><div class='add'>+			kbps_to_peak_pbn(params[i].bw_range.max_kbps) - vars[i + k].pbn;</div><div class='ctx'> 			bpp_increased[i] = false;</div><div class='ctx'> 			remaining_to_increase += 1;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1011,7 +997,6 @@ static int try_disable_dsc(struct drm_atomic_state *state,</div><div class='ctx'> 	int next_index;</div><div class='ctx'> 	int remaining_to_try = 0;</div><div class='ctx'> 	int ret;</div><div class='del'>-	uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='ctx'> 		if (vars[i + k].dsc_enabled</div><div class='hunk'>@@ -1041,7 +1026,7 @@ static int try_disable_dsc(struct drm_atomic_state *state,</div><div class='ctx'> 		if (next_index == -1)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps, fec_overhead_multiplier_x1000);</div><div class='add'>+		vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps);</div><div class='ctx'> 		ret = drm_dp_atomic_find_time_slots(state,</div><div class='ctx'> 						    params[next_index].port-&gt;mgr,</div><div class='ctx'> 						    params[next_index].port,</div><div class='hunk'>@@ -1054,7 +1039,8 @@ static int try_disable_dsc(struct drm_atomic_state *state,</div><div class='ctx'> 			vars[next_index].dsc_enabled = false;</div><div class='ctx'> 			vars[next_index].bpp_x16 = 0;</div><div class='ctx'> 		} else {</div><div class='del'>-			vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.max_kbps, fec_overhead_multiplier_x1000);</div><div class='add'>+			vars[next_index].pbn = kbps_to_peak_pbn(</div><div class='add'>+				params[next_index].bw_range.max_kbps);</div><div class='ctx'> 			ret = drm_dp_atomic_find_time_slots(state,</div><div class='ctx'> 							    params[next_index].port-&gt;mgr,</div><div class='ctx'> 							    params[next_index].port,</div><div class='hunk'>@@ -1083,7 +1069,6 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,</div><div class='ctx'> 	int count = 0;</div><div class='ctx'> 	int i, k, ret;</div><div class='ctx'> 	bool debugfs_overwrite = false;</div><div class='del'>-	uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);</div><div class='ctx'> </div><div class='ctx'> 	memset(params, 0, sizeof(params));</div><div class='ctx'> </div><div class='hunk'>@@ -1148,7 +1133,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,</div><div class='ctx'> 	/* Try no compression */</div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='ctx'> 		vars[i + k].aconnector = params[i].aconnector;</div><div class='del'>-		vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps, fec_overhead_multiplier_x1000);</div><div class='add'>+		vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);</div><div class='ctx'> 		vars[i + k].dsc_enabled = false;</div><div class='ctx'> 		vars[i + k].bpp_x16 = 0;</div><div class='ctx'> 		ret = drm_dp_atomic_find_time_slots(state, params[i].port-&gt;mgr, params[i].port,</div><div class='hunk'>@@ -1167,7 +1152,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,</div><div class='ctx'> 	/* Try max compression */</div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='ctx'> 		if (params[i].compression_possible &amp;&amp; params[i].clock_force_enable != DSC_CLK_FORCE_DISABLE) {</div><div class='del'>-			vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps, fec_overhead_multiplier_x1000);</div><div class='add'>+			vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps);</div><div class='ctx'> 			vars[i + k].dsc_enabled = true;</div><div class='ctx'> 			vars[i + k].bpp_x16 = params[i].bw_range.min_target_bpp_x16;</div><div class='ctx'> 			ret = drm_dp_atomic_find_time_slots(state, params[i].port-&gt;mgr,</div><div class='hunk'>@@ -1175,7 +1160,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				return ret;</div><div class='ctx'> 		} else {</div><div class='del'>-			vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps, fec_overhead_multiplier_x1000);</div><div class='add'>+			vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);</div><div class='ctx'> 			vars[i + k].dsc_enabled = false;</div><div class='ctx'> 			vars[i + k].bpp_x16 = 0;</div><div class='ctx'> 			ret = drm_dp_atomic_find_time_slots(state, params[i].port-&gt;mgr,</div><div class='hunk'>@@ -1219,8 +1204,10 @@ static bool is_dsc_need_re_compute(</div><div class='ctx'> 	if (dc_link-&gt;type != dc_connection_mst_branch)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!(dc_link-&gt;dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||</div><div class='del'>-		dc_link-&gt;dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))</div><div class='add'>+	/* add a check for older MST DSC with no virtual DPCDs */</div><div class='add'>+	if (needs_dsc_aux_workaround(dc_link)  &amp;&amp;</div><div class='add'>+		(!(dc_link-&gt;dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||</div><div class='add'>+		dc_link-&gt;dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++)</div><div class='hunk'>@@ -1240,7 +1227,15 @@ static bool is_dsc_need_re_compute(</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		aconnector = (struct amdgpu_dm_connector *) stream-&gt;dm_stream_context;</div><div class='del'>-		if (!aconnector)</div><div class='add'>+		if (!aconnector || !aconnector-&gt;dsc_aux)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 *	check if cached virtual MST DSC caps are available and DSC is supported</div><div class='add'>+		 *	as per specifications in their Virtual DPCD registers.</div><div class='add'>+		*/</div><div class='add'>+		if (!(aconnector-&gt;dc_sink-&gt;dsc_caps.dsc_dec_caps.is_dsc_supported ||</div><div class='add'>+			aconnector-&gt;dc_link-&gt;dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		stream_on_link[new_stream_on_link_num] = aconnector;</div><div class='hunk'>@@ -1601,7 +1596,7 @@ enum dc_status dm_dp_mst_is_port_support_mode(</div><div class='ctx'> 	struct amdgpu_dm_connector *aconnector,</div><div class='ctx'> 	struct dc_stream_state *stream)</div><div class='ctx'> {</div><div class='del'>-	int bpp, pbn, branch_max_throughput_mps = 0;</div><div class='add'>+	int pbn, branch_max_throughput_mps = 0;</div><div class='ctx'> 	struct dc_link_settings cur_link_settings;</div><div class='ctx'> 	unsigned int end_to_end_bw_in_kbps = 0;</div><div class='ctx'> 	unsigned int upper_link_bw_in_kbps = 0, down_link_bw_in_kbps = 0;</div><div class='hunk'>@@ -1651,11 +1646,34 @@ enum dc_status dm_dp_mst_is_port_support_mode(</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		/* check if mode could be supported within full_pbn */</div><div class='del'>-		bpp = convert_dc_color_depth_into_bpc(stream-&gt;timing.display_color_depth) * 3;</div><div class='del'>-		pbn = drm_dp_calc_pbn_mode(stream-&gt;timing.pix_clk_100hz / 10, bpp &lt;&lt; 4);</div><div class='del'>-		if (pbn &gt; aconnector-&gt;mst_output_port-&gt;full_pbn)</div><div class='add'>+		/* Check if mode could be supported within max slot</div><div class='add'>+		 * number of current mst link and full_pbn of mst links.</div><div class='add'>+		 */</div><div class='add'>+		int pbn_div, slot_num, max_slot_num;</div><div class='add'>+		enum dc_link_encoding_format link_encoding;</div><div class='add'>+		uint32_t stream_kbps =</div><div class='add'>+			dc_bandwidth_in_kbps_from_timing(&amp;stream-&gt;timing,</div><div class='add'>+				dc_link_get_highest_encoding_format(stream-&gt;link));</div><div class='add'>+</div><div class='add'>+		pbn = kbps_to_peak_pbn(stream_kbps);</div><div class='add'>+		pbn_div = dm_mst_get_pbn_divider(stream-&gt;link);</div><div class='add'>+		slot_num = DIV_ROUND_UP(pbn, pbn_div);</div><div class='add'>+</div><div class='add'>+		link_encoding = dc_link_get_highest_encoding_format(stream-&gt;link);</div><div class='add'>+		if (link_encoding == DC_LINK_ENCODING_DP_8b_10b)</div><div class='add'>+			max_slot_num = 63;</div><div class='add'>+		else if (link_encoding == DC_LINK_ENCODING_DP_128b_132b)</div><div class='add'>+			max_slot_num = 64;</div><div class='add'>+		else {</div><div class='add'>+			DRM_DEBUG_DRIVER("Invalid link encoding format\n");</div><div class='ctx'> 			return DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (slot_num &gt; max_slot_num ||</div><div class='add'>+			pbn &gt; aconnector-&gt;mst_output_port-&gt;full_pbn) {</div><div class='add'>+			DRM_DEBUG_DRIVER("Mode can not be supported within mst links!");</div><div class='add'>+			return DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check is mst dsc output bandwidth branch_overall_throughput_0_mps */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h<br/>index 37c820ab0fdb..fa84d34b7373 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h</a></div><div class='hunk'>@@ -46,9 +46,6 @@</div><div class='ctx'> #define SYNAPTICS_CASCADED_HUB_ID  0x5A</div><div class='ctx'> #define IS_SYNAPTICS_CASCADED_PANAMERA(devName, data) ((IS_SYNAPTICS_PANAMERA(devName) &amp;&amp; ((int)data[2] == SYNAPTICS_CASCADED_HUB_ID)) ? 1 : 0)</div><div class='ctx'> </div><div class='del'>-#define PBN_FEC_OVERHEAD_MULTIPLIER_8B_10B	1031</div><div class='del'>-#define PBN_FEC_OVERHEAD_MULTIPLIER_128B_132B	1000</div><div class='del'>-</div><div class='ctx'> enum mst_msg_ready_type {</div><div class='ctx'> 	NONE_MSG_RDY_EVENT = 0,</div><div class='ctx'> 	DOWN_REP_MSG_RDY_EVENT = 1,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c<br/>index 286ecd28cc6e..bfa090432ce2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c</a></div><div class='hunk'>@@ -212,7 +212,7 @@ bool amdgpu_dm_psr_disable(struct dc_stream_state *stream)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * amdgpu_dm_psr_disable() - disable psr f/w</div><div class='add'>+ * amdgpu_dm_psr_disable_all() - disable psr f/w for all streams</div><div class='ctx'>  * if psr is enabled on any stream</div><div class='ctx'>  *</div><div class='ctx'>  * Return: true if success</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c<br/>index d9e33c6bccd9..0005f5f8f34f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c</a></div><div class='hunk'>@@ -52,4 +52,12 @@ void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc</div><div class='ctx'> 				    func_name, line);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**** power component interfaces ****/</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/Makefile b/drivers/gpu/drm/amd/display/dc/Makefile<br/>index 7991ae468f75..4e9fb1742877 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/Makefile</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for Display Core (dc) component.</div><div class='ctx'> </div><div class='del'>-DC_LIBS = basics bios dml clk_mgr dce gpio hwss irq link virtual dsc resource optc</div><div class='add'>+DC_LIBS = basics bios dml clk_mgr dce gpio hwss irq link virtual dsc resource optc dpp</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_DRM_AMD_DC_FP</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c<br/>index 6450853fea94..bc16db69a663 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/bios_parser.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/bios/bios_parser.c</a></div><div class='hunk'>@@ -44,8 +44,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "bios_parser_common.h"</div><div class='ctx'> </div><div class='del'>-#include "dc.h"</div><div class='del'>-</div><div class='ctx'> #define THREE_PERCENT_OF_10000 300</div><div class='ctx'> </div><div class='ctx'> #define LAST_RECORD_TYPE 0xff</div><div class='hunk'>@@ -1731,6 +1729,7 @@ static uint32_t get_ss_entry_number_from_internal_ss_info_tbl_v2_1(</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * get_ss_entry_number_from_internal_ss_info_tbl_V3_1</div><div class='ctx'>  * Get Number of SpreadSpectrum Entry from the ASIC_InternalSS_Info table of</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c<br/>index 05f392501c0a..9fe0020bcb9c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c</a></div><div class='hunk'>@@ -1594,8 +1594,6 @@ static bool bios_parser_is_device_id_supported(</div><div class='ctx'> 		return (le16_to_cpu(bp-&gt;object_info_tbl.v1_5-&gt;supporteddevices) &amp; mask) != 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static uint32_t bios_parser_get_ss_entry_number(</div><div class='hunk'>@@ -2948,6 +2946,7 @@ static enum bp_result construct_integrated_info(</div><div class='ctx'> 				result = get_integrated_info_v2_1(bp, info);</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 2:</div><div class='add'>+			case 3:</div><div class='ctx'> 				result = get_integrated_info_v2_2(bp, info);</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c<br/>index 86f9198e7501..2bcae0643e61 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/command_table.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/command_table.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/command_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/bios/command_table.c</a></div><div class='hunk'>@@ -399,7 +399,7 @@ static enum bp_result transmitter_control_v1_6(</div><div class='ctx'> static void init_transmitter_control(struct bios_parser *bp)</div><div class='ctx'> {</div><div class='ctx'> 	uint8_t frev;</div><div class='del'>-	uint8_t crev;</div><div class='add'>+	uint8_t crev = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (BIOS_CMD_TABLE_REVISION(UNIPHYTransmitterControl,</div><div class='ctx'> 			frev, crev) == false)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c<br/>index cbae1be7b009..cc000833d300 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/command_table2.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/bios/command_table2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/command_table2.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/bios/command_table2.c</a></div><div class='hunk'>@@ -225,7 +225,7 @@ static enum bp_result transmitter_control_fallback(</div><div class='ctx'> static void init_transmitter_control(struct bios_parser *bp)</div><div class='ctx'> {</div><div class='ctx'> 	uint8_t frev;</div><div class='del'>-	uint8_t crev;</div><div class='add'>+	uint8_t crev = 0;</div><div class='ctx'> </div><div class='ctx'> 	BIOS_CMD_TABLE_REVISION(dig1transmittercontrol, frev, crev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c<br/>index 9f0f25aee426..a2b4ff2cff16 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c</a></div><div class='hunk'>@@ -272,7 +272,7 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p</div><div class='ctx'> 			dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);</div><div class='ctx'> 			return &amp;clk_mgr-&gt;base;</div><div class='ctx'> 		}</div><div class='del'>-		if (asic_id.chip_id == DEVICE_ID_NV_13FE) {</div><div class='add'>+		if (ctx-&gt;dce_version == DCN_VERSION_2_01) {</div><div class='ctx'> 			dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);</div><div class='ctx'> 			return &amp;clk_mgr-&gt;base;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -329,15 +329,14 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p</div><div class='ctx'> 	}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_FAMILY_GC_11_0_0: {</div><div class='del'>-	    struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	    if (clk_mgr == NULL) {</div><div class='del'>-		BREAK_TO_DEBUGGER();</div><div class='del'>-		return NULL;</div><div class='del'>-	    }</div><div class='add'>+		struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-	    dcn32_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);</div><div class='del'>-	    return &amp;clk_mgr-&gt;base;</div><div class='add'>+		if (clk_mgr == NULL) {</div><div class='add'>+			BREAK_TO_DEBUGGER();</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		dcn32_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);</div><div class='add'>+		return &amp;clk_mgr-&gt;base;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	case AMDGPU_FAMILY_GC_11_0_1: {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c<br/>index b77804cfde0f..2a5dd3a296b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c</a></div><div class='hunk'>@@ -131,8 +131,8 @@ int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)</div><div class='ctx'> 	struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);</div><div class='ctx'> 	int dprefclk_wdivider;</div><div class='ctx'> 	int dprefclk_src_sel;</div><div class='del'>-	int dp_ref_clk_khz;</div><div class='del'>-	int target_div = 600000;</div><div class='add'>+	int dp_ref_clk_khz = 600000;</div><div class='add'>+	int target_div;</div><div class='ctx'> </div><div class='ctx'> 	/* ASSERT DP Reference Clock source is from DFS*/</div><div class='ctx'> 	REG_GET(DPREFCLK_CNTL, DPREFCLK_SRC_SEL, &amp;dprefclk_src_sel);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c<br/>index 2a74e2d74909..369421e46c52 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "reg_helper.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "clk_mgr_internal.h"</div><div class='ctx'> #include "rv1_clk_mgr.h"</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c<br/>index 89b79dd39628..19897fa52e7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "clk_mgr_internal.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "rv1_clk_mgr_vbios_smu.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c<br/>index 5ee87965a078..bb4f3bd7532e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c</a></div><div class='hunk'>@@ -503,7 +503,7 @@ static void dcn2_notify_link_rate_change(struct clk_mgr *clk_mgr_base, struct dc</div><div class='ctx'> </div><div class='ctx'> 	clk_mgr-&gt;cur_phyclk_req_table[link-&gt;link_index] = link-&gt;cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_PIPES * 2; i++) {</div><div class='add'>+	for (i = 0; i &lt; MAX_LINKS; i++) {</div><div class='ctx'> 		if (clk_mgr-&gt;cur_phyclk_req_table[i] &gt; max_phyclk_req)</div><div class='ctx'> 			max_phyclk_req = clk_mgr-&gt;cur_phyclk_req_table[i];</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c<br/>index 9c90090e7351..f77840dd051e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c</a></div><div class='hunk'>@@ -100,7 +100,15 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> </div><div class='ctx'> 	if (clk_mgr_base-&gt;clks.dispclk_khz == 0 ||</div><div class='ctx'> 	    dc-&gt;debug.force_clock_mode &amp; 0x1) {</div><div class='add'>+		/* this is from resume or boot up, if forced_clock cfg option</div><div class='add'>+		 * used, we bypass program dispclk and DPPCLK, but need set them</div><div class='add'>+		 * for S3.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='ctx'> 		force_reset = true;</div><div class='add'>+		/* force_clock_mode 0x1:  force reset the clock even it is the</div><div class='add'>+		 * same clock as long as it is in Passive level.</div><div class='add'>+		 */</div><div class='ctx'> </div><div class='ctx'> 		dcn2_read_clocks_from_hw_dentist(clk_mgr_base);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -150,11 +158,14 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;config.forced_clocks == false || (force_reset &amp;&amp; safe_to_lower)) {</div><div class='ctx'> 		if (dpp_clock_lowered) {</div><div class='add'>+			// if clock is being lowered, increase DTO before lowering refclk</div><div class='ctx'> 			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);</div><div class='ctx'> 			dcn20_update_clocks_update_dentist(clk_mgr, context);</div><div class='ctx'> 		} else {</div><div class='add'>+			// if clock is being raised, increase refclk before lowering DTO</div><div class='ctx'> 			if (update_dppclk || update_dispclk)</div><div class='ctx'> 				dcn20_update_clocks_update_dentist(clk_mgr, context);</div><div class='add'>+			// always update dtos unless clock is lowered and not safe to lower</div><div class='ctx'> 			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c<br/>index e3e1940198a9..5ef0879f6ad9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c</a></div><div class='hunk'>@@ -548,7 +548,7 @@ static void rn_notify_link_rate_change(struct clk_mgr *clk_mgr_base, struct dc_l</div><div class='ctx'> </div><div class='ctx'> 	clk_mgr-&gt;cur_phyclk_req_table[link-&gt;link_index] = link-&gt;cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_PIPES * 2; i++) {</div><div class='add'>+	for (i = 0; i &lt; MAX_LINKS; i++) {</div><div class='ctx'> 		if (clk_mgr-&gt;cur_phyclk_req_table[i] &gt; max_phyclk_req)</div><div class='ctx'> 			max_phyclk_req = clk_mgr-&gt;cur_phyclk_req_table[i];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -642,7 +642,8 @@ static void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params</div><div class='ctx'> </div><div class='ctx'> 	j = -1;</div><div class='ctx'> </div><div class='del'>-	ASSERT(PP_SMU_NUM_FCLK_DPM_LEVELS &lt;= MAX_NUM_DPM_LVL);</div><div class='add'>+	static_assert(PP_SMU_NUM_FCLK_DPM_LEVELS &lt;= MAX_NUM_DPM_LVL,</div><div class='add'>+		"number of reported FCLK DPM levels exceed maximum");</div><div class='ctx'> </div><div class='ctx'> 	/* Find lowest DPM, FCLK is filled in reverse order*/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c<br/>index 3271c8c7905d..8083a553c60e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c</a></div><div class='hunk'>@@ -474,7 +474,7 @@ static void dcn30_notify_link_rate_change(struct clk_mgr *clk_mgr_base, struct d</div><div class='ctx'> </div><div class='ctx'> 	clk_mgr-&gt;cur_phyclk_req_table[link-&gt;link_index] = link-&gt;cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_PIPES * 2; i++) {</div><div class='add'>+	for (i = 0; i &lt; MAX_LINKS; i++) {</div><div class='ctx'> 		if (clk_mgr-&gt;cur_phyclk_req_table[i] &gt; max_phyclk_req)</div><div class='ctx'> 			max_phyclk_req = clk_mgr-&gt;cur_phyclk_req_table[i];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -560,11 +560,19 @@ void dcn3_clk_mgr_construct(</div><div class='ctx'> 	dce_clock_read_ss_info(clk_mgr);</div><div class='ctx'> </div><div class='ctx'> 	clk_mgr-&gt;base.bw_params = kzalloc(sizeof(*clk_mgr-&gt;base.bw_params), GFP_KERNEL);</div><div class='add'>+	if (!clk_mgr-&gt;base.bw_params) {</div><div class='add'>+		BREAK_TO_DEBUGGER();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* need physical address of table to give to PMFW */</div><div class='ctx'> 	clk_mgr-&gt;wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr-&gt;base.ctx,</div><div class='ctx'> 			DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t),</div><div class='ctx'> 			&amp;clk_mgr-&gt;wm_range_table_addr);</div><div class='add'>+	if (!clk_mgr-&gt;wm_range_table) {</div><div class='add'>+		BREAK_TO_DEBUGGER();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn3_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c<br/>index bdbf18306698..3253115a153d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include "dcn30_clk_mgr_smu_msg.h"</div><div class='ctx'> </div><div class='ctx'> #include "clk_mgr_internal.h"</div><div class='hunk'>@@ -54,6 +53,7 @@</div><div class='ctx'>  */</div><div class='ctx'> static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries)</div><div class='ctx'> {</div><div class='add'>+	const uint32_t initial_max_retries = max_retries;</div><div class='ctx'> 	uint32_t reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='hunk'>@@ -69,7 +69,7 @@ static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, un</div><div class='ctx'> </div><div class='ctx'> 	/* handle DALSMC_Result_CmdRejectedBusy? */</div><div class='ctx'> </div><div class='del'>-	/* Log? */</div><div class='add'>+	TRACE_SMU_DELAY(delay_us * (initial_max_retries - max_retries), clk_mgr-&gt;base.ctx);</div><div class='ctx'> </div><div class='ctx'> 	return reg;</div><div class='ctx'> }</div><div class='hunk'>@@ -89,6 +89,8 @@ static bool dcn30_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint</div><div class='ctx'> 	/* Trigger the message transaction by writing the message ID */</div><div class='ctx'> 	REG_WRITE(DAL_MSG_REG, msg_id);</div><div class='ctx'> </div><div class='add'>+	TRACE_SMU_MSG(msg_id, param_in, clk_mgr-&gt;base.ctx);</div><div class='add'>+</div><div class='ctx'> 	result = dcn30_smu_wait_for_response(clk_mgr, 10, 200000);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_SMU_TIMEOUT(result)) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c<br/>index aa9fd1dc550a..191d8b969d19 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c</a></div><div class='hunk'>@@ -566,7 +566,8 @@ static void vg_clk_mgr_helper_populate_bw_params(</div><div class='ctx'> </div><div class='ctx'> 	j = -1;</div><div class='ctx'> </div><div class='del'>-	ASSERT(VG_NUM_FCLK_DPM_LEVELS &lt;= MAX_NUM_DPM_LVL);</div><div class='add'>+	static_assert(VG_NUM_FCLK_DPM_LEVELS &lt;= MAX_NUM_DPM_LVL,</div><div class='add'>+		"number of reported FCLK DPM levels exceeds maximum");</div><div class='ctx'> </div><div class='ctx'> 	/* Find lowest DPM, FCLK is filled in reverse order*/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c<br/>index ce1386e22576..12a7752758b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c</a></div><div class='hunk'>@@ -562,7 +562,8 @@ static void dcn31_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk</div><div class='ctx'> </div><div class='ctx'> 	j = -1;</div><div class='ctx'> </div><div class='del'>-	ASSERT(NUM_DF_PSTATE_LEVELS &lt;= MAX_NUM_DPM_LVL);</div><div class='add'>+	static_assert(NUM_DF_PSTATE_LEVELS &lt;= MAX_NUM_DPM_LVL,</div><div class='add'>+		"number of reported pstate levels exceeds maximum");</div><div class='ctx'> </div><div class='ctx'> 	/* Find lowest DPM, FCLK is filled in reverse order*/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c<br/>index 6904e95113c1..f201628e4e98 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "clk_mgr_internal.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h<br/>index 047d19ea919c..78ca1e5c5e9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h</a></div><div class='hunk'>@@ -37,34 +37,34 @@ typedef enum {</div><div class='ctx'> } WCK_RATIO_e;</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='del'>-  uint32_t FClk;</div><div class='del'>-  uint32_t MemClk;</div><div class='del'>-  uint32_t Voltage;</div><div class='del'>-  uint8_t  WckRatio;</div><div class='del'>-  uint8_t  Spare[3];</div><div class='add'>+	uint32_t FClk;</div><div class='add'>+	uint32_t MemClk;</div><div class='add'>+	uint32_t Voltage;</div><div class='add'>+	uint8_t  WckRatio;</div><div class='add'>+	uint8_t  Spare[3];</div><div class='ctx'> } DfPstateTable314_t;</div><div class='ctx'> </div><div class='ctx'> //Freq in MHz</div><div class='ctx'> //Voltage in milli volts with 2 fractional bits</div><div class='ctx'> typedef struct {</div><div class='del'>-  uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];</div><div class='del'>-  uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];</div><div class='del'>-  uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];</div><div class='del'>-  uint32_t SocClocks[NUM_SOCCLK_DPM_LEVELS];</div><div class='del'>-  uint32_t VClocks[NUM_VCN_DPM_LEVELS];</div><div class='del'>-  uint32_t DClocks[NUM_VCN_DPM_LEVELS];</div><div class='del'>-  uint32_t SocVoltage[NUM_SOC_VOLTAGE_LEVELS];</div><div class='del'>-  DfPstateTable314_t DfPstateTable[NUM_DF_PSTATE_LEVELS];</div><div class='add'>+	uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];</div><div class='add'>+	uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];</div><div class='add'>+	uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];</div><div class='add'>+	uint32_t SocClocks[NUM_SOCCLK_DPM_LEVELS];</div><div class='add'>+	uint32_t VClocks[NUM_VCN_DPM_LEVELS];</div><div class='add'>+	uint32_t DClocks[NUM_VCN_DPM_LEVELS];</div><div class='add'>+	uint32_t SocVoltage[NUM_SOC_VOLTAGE_LEVELS];</div><div class='add'>+	DfPstateTable314_t DfPstateTable[NUM_DF_PSTATE_LEVELS];</div><div class='ctx'> </div><div class='del'>-  uint8_t  NumDcfClkLevelsEnabled;</div><div class='del'>-  uint8_t  NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk</div><div class='del'>-  uint8_t  NumSocClkLevelsEnabled;</div><div class='del'>-  uint8_t  VcnClkLevelsEnabled;     //Applies to both Vclk and Dclk</div><div class='del'>-  uint8_t  NumDfPstatesEnabled;</div><div class='del'>-  uint8_t  spare[3];</div><div class='add'>+	uint8_t  NumDcfClkLevelsEnabled;</div><div class='add'>+	uint8_t  NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk</div><div class='add'>+	uint8_t  NumSocClkLevelsEnabled;</div><div class='add'>+	uint8_t  VcnClkLevelsEnabled;     //Applies to both Vclk and Dclk</div><div class='add'>+	uint8_t  NumDfPstatesEnabled;</div><div class='add'>+	uint8_t  spare[3];</div><div class='ctx'> </div><div class='del'>-  uint32_t MinGfxClk;</div><div class='del'>-  uint32_t MaxGfxClk;</div><div class='add'>+	uint32_t MinGfxClk;</div><div class='add'>+	uint32_t MaxGfxClk;</div><div class='ctx'> } DpmClocks314_t;</div><div class='ctx'> </div><div class='ctx'> struct dcn314_watermarks {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c<br/>index 644da4637320..5506cf9b3672 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c</a></div><div class='hunk'>@@ -145,6 +145,10 @@ static void dcn315_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> 	 */</div><div class='ctx'> 	clk_mgr_base-&gt;clks.zstate_support = new_clocks-&gt;zstate_support;</div><div class='ctx'> 	if (safe_to_lower) {</div><div class='add'>+		if (clk_mgr_base-&gt;clks.dtbclk_en &amp;&amp; !new_clocks-&gt;dtbclk_en) {</div><div class='add'>+			dcn315_smu_set_dtbclk(clk_mgr, false);</div><div class='add'>+			clk_mgr_base-&gt;clks.dtbclk_en = new_clocks-&gt;dtbclk_en;</div><div class='add'>+		}</div><div class='ctx'> 		/* check that we're not already in lower */</div><div class='ctx'> 		if (clk_mgr_base-&gt;clks.pwr_state != DCN_PWR_STATE_LOW_POWER) {</div><div class='ctx'> 			display_count = dcn315_get_active_display_cnt_wa(dc, context);</div><div class='hunk'>@@ -160,6 +164,10 @@ static void dcn315_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='add'>+		if (!clk_mgr_base-&gt;clks.dtbclk_en &amp;&amp; new_clocks-&gt;dtbclk_en) {</div><div class='add'>+			dcn315_smu_set_dtbclk(clk_mgr, true);</div><div class='add'>+			clk_mgr_base-&gt;clks.dtbclk_en = new_clocks-&gt;dtbclk_en;</div><div class='add'>+		}</div><div class='ctx'> 		/* check that we're not already in D0 */</div><div class='ctx'> 		if (clk_mgr_base-&gt;clks.pwr_state != DCN_PWR_STATE_MISSION_MODE) {</div><div class='ctx'> 			union display_idle_optimization_u idle_info = { 0 };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c<br/>index 879f1494c4cd..2d14346b680e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include "dm_helpers.h"</div><div class='ctx'> #include "dcn315_smu.h"</div><div class='ctx'> #include "mp/mp_13_0_5_offset.h"</div><div class='add'>+#include "logger_types.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_INSTANCE                                        6</div><div class='ctx'> #define MAX_SEGMENT                                         6</div><div class='hunk'>@@ -69,7 +70,6 @@ static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D</div><div class='ctx'> #define REG_NBIO(reg_name) \</div><div class='ctx'> 	(NBIO_BASE.instance[0].segment[regBIF_BX_PF2_ ## reg_name ## _BASE_IDX] + regBIF_BX_PF2_ ## reg_name)</div><div class='ctx'> </div><div class='del'>-#include "logger_types.h"</div><div class='ctx'> #undef DC_LOGGER</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	CTX-&gt;logger</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c<br/>index 6ad4f4efec5d..20ca7afa9cb4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c</a></div><div class='hunk'>@@ -485,7 +485,8 @@ static void dcn316_clk_mgr_helper_populate_bw_params(</div><div class='ctx'> </div><div class='ctx'> 	j = -1;</div><div class='ctx'> </div><div class='del'>-	ASSERT(NUM_DF_PSTATE_LEVELS &lt;= MAX_NUM_DPM_LVL);</div><div class='add'>+	static_assert(NUM_DF_PSTATE_LEVELS &lt;= MAX_NUM_DPM_LVL,</div><div class='add'>+		"number of reported pstate levels exceeds maximum");</div><div class='ctx'> </div><div class='ctx'> 	/* Find lowest DPM, FCLK is filled in reverse order*/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c<br/>index bec252e1dd27..ff5fdc7b1198 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include "dcn20/dcn20_clk_mgr.h"</div><div class='ctx'> #include "dce100/dce_clk_mgr.h"</div><div class='ctx'> #include "dcn31/dcn31_clk_mgr.h"</div><div class='add'>+#include "dcn32/dcn32_clk_mgr.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "dm_helpers.h"</div><div class='hunk'>@@ -40,7 +41,6 @@</div><div class='ctx'> #include "dcn/dcn_3_2_0_offset.h"</div><div class='ctx'> #include "dcn/dcn_3_2_0_sh_mask.h"</div><div class='ctx'> </div><div class='del'>-#include "dcn32/dcn32_clk_mgr.h"</div><div class='ctx'> #include "dml/dcn32/dcn32_fpu.h"</div><div class='ctx'> </div><div class='ctx'> #define DCN_BASE__INST0_SEG1                       0x000000C0</div><div class='hunk'>@@ -712,8 +712,12 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> 					 * since we calculate mode support based on softmax being the max UCLK</div><div class='ctx'> 					 * frequency.</div><div class='ctx'> 					 */</div><div class='del'>-					dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,</div><div class='del'>-							dc-&gt;clk_mgr-&gt;bw_params-&gt;dc_mode_softmax_memclk);</div><div class='add'>+					if (dc-&gt;debug.disable_dc_mode_overwrite) {</div><div class='add'>+						dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, dc-&gt;clk_mgr-&gt;bw_params-&gt;max_memclk_mhz);</div><div class='add'>+						dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc-&gt;clk_mgr-&gt;bw_params-&gt;max_memclk_mhz);</div><div class='add'>+					} else</div><div class='add'>+						dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,</div><div class='add'>+								dc-&gt;clk_mgr-&gt;bw_params-&gt;dc_mode_softmax_memclk);</div><div class='ctx'> 				} else {</div><div class='ctx'> 					dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc-&gt;clk_mgr-&gt;bw_params-&gt;max_memclk_mhz);</div><div class='ctx'> 				}</div><div class='hunk'>@@ -746,8 +750,13 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> 		/* set UCLK to requested value if P-State switching is supported, or to re-enable P-State switching */</div><div class='ctx'> 		if (clk_mgr_base-&gt;clks.p_state_change_support &amp;&amp;</div><div class='ctx'> 				(update_uclk || !clk_mgr_base-&gt;clks.prev_p_state_change_support) &amp;&amp;</div><div class='del'>-				!dc-&gt;work_arounds.clock_update_disable_mask.uclk)</div><div class='add'>+				!dc-&gt;work_arounds.clock_update_disable_mask.uclk) {</div><div class='add'>+			if (dc-&gt;clk_mgr-&gt;dc_mode_softmax_enabled &amp;&amp; dc-&gt;debug.disable_dc_mode_overwrite)</div><div class='add'>+				dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK,</div><div class='add'>+						max((int)dc-&gt;clk_mgr-&gt;bw_params-&gt;dc_mode_softmax_memclk, khz_to_mhz_ceil(clk_mgr_base-&gt;clks.dramclk_khz)));</div><div class='add'>+</div><div class='ctx'> 			dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base-&gt;clks.dramclk_khz));</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (clk_mgr_base-&gt;clks.num_ways != new_clocks-&gt;num_ways &amp;&amp;</div><div class='ctx'> 				clk_mgr_base-&gt;clks.num_ways &gt; new_clocks-&gt;num_ways) {</div><div class='hunk'>@@ -829,7 +838,7 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> 		dmcu-&gt;funcs-&gt;set_psr_wait_loop(dmcu,</div><div class='ctx'> 				clk_mgr_base-&gt;clks.dispclk_khz / 1000 / 7);</div><div class='ctx'> </div><div class='del'>-	if (dc-&gt;config.enable_auto_dpm_test_logs &amp;&amp; safe_to_lower) {</div><div class='add'>+	if (dc-&gt;config.enable_auto_dpm_test_logs) {</div><div class='ctx'> 	    dcn32_auto_dpm_test_log(new_clocks, clk_mgr, context);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1199,11 +1208,19 @@ void dcn32_clk_mgr_construct(</div><div class='ctx'> 	clk_mgr-&gt;smu_present = false;</div><div class='ctx'> </div><div class='ctx'> 	clk_mgr-&gt;base.bw_params = kzalloc(sizeof(*clk_mgr-&gt;base.bw_params), GFP_KERNEL);</div><div class='add'>+	if (!clk_mgr-&gt;base.bw_params) {</div><div class='add'>+		BREAK_TO_DEBUGGER();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* need physical address of table to give to PMFW */</div><div class='ctx'> 	clk_mgr-&gt;wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr-&gt;base.ctx,</div><div class='ctx'> 			DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t),</div><div class='ctx'> 			&amp;clk_mgr-&gt;wm_range_table_addr);</div><div class='add'>+	if (!clk_mgr-&gt;wm_range_table) {</div><div class='add'>+		BREAK_TO_DEBUGGER();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn32_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c<br/>index df244b175fdb..f2f60478b1a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c</a></div><div class='hunk'>@@ -49,6 +49,7 @@</div><div class='ctx'>  */</div><div class='ctx'> static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries)</div><div class='ctx'> {</div><div class='add'>+	const uint32_t initial_max_retries = max_retries;</div><div class='ctx'> 	uint32_t reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='hunk'>@@ -62,6 +63,8 @@ static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, un</div><div class='ctx'> 			udelay(delay_us);</div><div class='ctx'> 	} while (max_retries--);</div><div class='ctx'> </div><div class='add'>+	TRACE_SMU_DELAY(delay_us * (initial_max_retries - max_retries), clk_mgr-&gt;base.ctx);</div><div class='add'>+</div><div class='ctx'> 	return reg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -79,6 +82,8 @@ static bool dcn32_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint</div><div class='ctx'> 	/* Trigger the message transaction by writing the message ID */</div><div class='ctx'> 	REG_WRITE(DAL_MSG_REG, msg_id);</div><div class='ctx'> </div><div class='add'>+	TRACE_SMU_MSG(msg_id, param_in, clk_mgr-&gt;base.ctx);</div><div class='add'>+</div><div class='ctx'> 	/* Wait for response */</div><div class='ctx'> 	if (dcn32_smu_wait_for_response(clk_mgr, 10, 200000) == DALSMC_Result_OK) {</div><div class='ctx'> 		if (param_out)</div><div class='hunk'>@@ -115,6 +120,8 @@ static uint32_t dcn32_smu_wait_for_response_delay(struct clk_mgr_internal *clk_m</div><div class='ctx'> 		*total_delay_us += delay_us;</div><div class='ctx'> 	} while (max_retries--);</div><div class='ctx'> </div><div class='add'>+	TRACE_SMU_DELAY(*total_delay_us, clk_mgr-&gt;base.ctx);</div><div class='add'>+</div><div class='ctx'> 	return reg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -135,6 +142,8 @@ static bool dcn32_smu_send_msg_with_param_delay(struct clk_mgr_internal *clk_mgr</div><div class='ctx'> 	/* Trigger the message transaction by writing the message ID */</div><div class='ctx'> 	REG_WRITE(DAL_MSG_REG, msg_id);</div><div class='ctx'> </div><div class='add'>+	TRACE_SMU_MSG(msg_id, param_in, clk_mgr-&gt;base.ctx);</div><div class='add'>+</div><div class='ctx'> 	/* Wait for response */</div><div class='ctx'> 	if (dcn32_smu_wait_for_response_delay(clk_mgr, 10, 200000, &amp;delay2_us) == DALSMC_Result_OK) {</div><div class='ctx'> 		if (param_out)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h<br/>index c76352a817de..5c44ab0e8667 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h</a></div><div class='hunk'>@@ -37,10 +37,9 @@</div><div class='ctx'> #define DALSMC_Result_OK				0x1</div><div class='ctx'> </div><div class='ctx'> void dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable);</div><div class='del'>-void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);</div><div class='del'>-void dcn32_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways);</div><div class='ctx'> void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);</div><div class='add'>+void dcn32_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz);</div><div class='ctx'> void dcn32_smu_wait_for_dmub_ack_mclk(struct clk_mgr_internal *clk_mgr, bool enable);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c<br/>index d9c5692c86c2..6c9b4e6491a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c</a></div><div class='hunk'>@@ -252,7 +252,8 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (clk_mgr_base-&gt;clks.dtbclk_en &amp;&amp; !new_clocks-&gt;dtbclk_en) {</div><div class='del'>-			dcn35_smu_set_dtbclk(clk_mgr, false);</div><div class='add'>+			if (clk_mgr-&gt;base.ctx-&gt;dc-&gt;config.allow_0_dtb_clk)</div><div class='add'>+				dcn35_smu_set_dtbclk(clk_mgr, false);</div><div class='ctx'> 			clk_mgr_base-&gt;clks.dtbclk_en = new_clocks-&gt;dtbclk_en;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* check that we're not already in lower */</div><div class='hunk'>@@ -889,35 +890,6 @@ static void dcn35_set_low_power_state(struct clk_mgr *clk_mgr_base)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dcn35_set_ips_idle_state(struct clk_mgr *clk_mgr_base, bool allow_idle)</div><div class='del'>-{</div><div class='del'>-	struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);</div><div class='del'>-	struct dc *dc = clk_mgr_base-&gt;ctx-&gt;dc;</div><div class='del'>-	uint32_t val = dcn35_smu_read_ips_scratch(clk_mgr);</div><div class='del'>-</div><div class='del'>-	if (dc-&gt;config.disable_ips == DMUB_IPS_ENABLE ||</div><div class='del'>-		dc-&gt;config.disable_ips == DMUB_IPS_DISABLE_DYNAMIC) {</div><div class='del'>-		val = val &amp; ~DMUB_IPS1_ALLOW_MASK;</div><div class='del'>-		val = val &amp; ~DMUB_IPS2_ALLOW_MASK;</div><div class='del'>-	} else if (dc-&gt;config.disable_ips == DMUB_IPS_DISABLE_IPS1) {</div><div class='del'>-		val |= DMUB_IPS1_ALLOW_MASK;</div><div class='del'>-		val |= DMUB_IPS2_ALLOW_MASK;</div><div class='del'>-	} else if (dc-&gt;config.disable_ips == DMUB_IPS_DISABLE_IPS2) {</div><div class='del'>-		val = val &amp; ~DMUB_IPS1_ALLOW_MASK;</div><div class='del'>-		val |= DMUB_IPS2_ALLOW_MASK;</div><div class='del'>-	} else if (dc-&gt;config.disable_ips == DMUB_IPS_DISABLE_IPS2_Z10) {</div><div class='del'>-		val = val &amp; ~DMUB_IPS1_ALLOW_MASK;</div><div class='del'>-		val = val &amp; ~DMUB_IPS2_ALLOW_MASK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!allow_idle) {</div><div class='del'>-		val |= DMUB_IPS1_ALLOW_MASK;</div><div class='del'>-		val |= DMUB_IPS2_ALLOW_MASK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dcn35_smu_write_ips_scratch(clk_mgr, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dcn35_exit_low_power_state(struct clk_mgr *clk_mgr_base)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);</div><div class='hunk'>@@ -937,13 +909,6 @@ static bool dcn35_is_ips_supported(struct clk_mgr *clk_mgr_base)</div><div class='ctx'> 	return ips_supported;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static uint32_t dcn35_get_ips_idle_state(struct clk_mgr *clk_mgr_base)</div><div class='del'>-{</div><div class='del'>-	struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);</div><div class='del'>-</div><div class='del'>-	return dcn35_smu_read_ips_scratch(clk_mgr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dcn35_init_clocks_fpga(struct clk_mgr *clk_mgr)</div><div class='ctx'> {</div><div class='ctx'> 	init_clk_states(clk_mgr);</div><div class='hunk'>@@ -1031,8 +996,6 @@ static struct clk_mgr_funcs dcn35_funcs = {</div><div class='ctx'> 	.set_low_power_state = dcn35_set_low_power_state,</div><div class='ctx'> 	.exit_low_power_state = dcn35_exit_low_power_state,</div><div class='ctx'> 	.is_ips_supported = dcn35_is_ips_supported,</div><div class='del'>-	.set_idle_state = dcn35_set_ips_idle_state,</div><div class='del'>-	.get_idle_state = dcn35_get_ips_idle_state</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct clk_mgr_funcs dcn35_fpga_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c<br/>index 9e588c56c570..1399b41dfd1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c</a></div><div class='hunk'>@@ -487,24 +487,3 @@ int dcn35_smu_get_ips_supported(struct clk_mgr_internal *clk_mgr)</div><div class='ctx'> 	//smu_print("%s: VBIOSSMC_MSG_QueryIPS2Support return = %x\n", __func__, retv);</div><div class='ctx'> 	return retv;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void dcn35_smu_write_ips_scratch(struct clk_mgr_internal *clk_mgr, uint32_t param)</div><div class='del'>-{</div><div class='del'>-	if (!clk_mgr-&gt;smu_present)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	REG_WRITE(MP1_SMN_C2PMSG_71, param);</div><div class='del'>-	//smu_print("%s: write_ips_scratch = %x\n", __func__, param);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-uint32_t dcn35_smu_read_ips_scratch(struct clk_mgr_internal *clk_mgr)</div><div class='del'>-{</div><div class='del'>-	uint32_t retv;</div><div class='del'>-</div><div class='del'>-	if (!clk_mgr-&gt;smu_present)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	retv = REG_READ(MP1_SMN_C2PMSG_71);</div><div class='del'>-	//smu_print("%s: dcn35_smu_read_ips_scratch = %x\n",  __func__, retv);</div><div class='del'>-	return retv;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h<br/>index 2b8e6959a03d..06cd3cc6d36e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h</a></div><div class='hunk'>@@ -198,6 +198,4 @@ int dcn35_smu_exit_low_power_state(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> int dcn35_smu_get_ips_supported(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> int dcn35_smu_get_dtbclk(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> int dcn35_smu_get_dprefclk(struct clk_mgr_internal *clk_mgr);</div><div class='del'>-void dcn35_smu_write_ips_scratch(struct clk_mgr_internal *clk_mgr, uint32_t param);</div><div class='del'>-uint32_t dcn35_smu_read_ips_scratch(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> #endif /* DAL_DC_35_SMU_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c<br/>index 03b554e912a2..236876d95185 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include "resource.h"</div><div class='ctx'> #include "dc_state.h"</div><div class='ctx'> #include "dc_state_priv.h"</div><div class='add'>+#include "dc_plane_priv.h"</div><div class='ctx'> </div><div class='ctx'> #include "gpio_service_interface.h"</div><div class='ctx'> #include "clk_mgr.h"</div><div class='hunk'>@@ -212,7 +213,8 @@ static bool create_links(</div><div class='ctx'> 		connectors_num,</div><div class='ctx'> 		num_virtual_links);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; connectors_num; i++) {</div><div class='add'>+	// condition loop on link_count to allow skipping invalid indices</div><div class='add'>+	for (i = 0; dc-&gt;link_count &lt; connectors_num &amp;&amp; i &lt; MAX_LINKS; i++) {</div><div class='ctx'> 		struct link_init_data link_init_params = {0};</div><div class='ctx'> 		struct dc_link *link;</div><div class='ctx'> </div><div class='hunk'>@@ -386,6 +388,30 @@ static void dc_perf_trace_destroy(struct dc_perf_trace **perf_trace)</div><div class='ctx'> 	*perf_trace = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool set_long_vtotal(struct dc *dc, struct dc_stream_state *stream, struct dc_crtc_timing_adjust *adjust)</div><div class='add'>+{</div><div class='add'>+	if (!dc || !stream || !adjust)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!dc-&gt;current_state)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='add'>+		struct pipe_ctx *pipe = &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+</div><div class='add'>+		if (pipe-&gt;stream == stream &amp;&amp; pipe-&gt;stream_res.tg) {</div><div class='add'>+			if (dc-&gt;hwss.set_long_vtotal)</div><div class='add'>+				dc-&gt;hwss.set_long_vtotal(&amp;pipe, 1, adjust-&gt;v_total_min, adjust-&gt;v_total_max);</div><div class='add'>+</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *  dc_stream_adjust_vmin_vmax - look up pipe context &amp; update parts of DRR</div><div class='ctx'>  *  @dc:     dc reference</div><div class='hunk'>@@ -420,6 +446,15 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,</div><div class='ctx'> 	stream-&gt;adjust.v_total_mid = adjust-&gt;v_total_mid;</div><div class='ctx'> 	stream-&gt;adjust.v_total_mid_frame_num = adjust-&gt;v_total_mid_frame_num;</div><div class='ctx'> 	stream-&gt;adjust.v_total_min = adjust-&gt;v_total_min;</div><div class='add'>+	stream-&gt;adjust.allow_otg_v_count_halt = adjust-&gt;allow_otg_v_count_halt;</div><div class='add'>+</div><div class='add'>+	if (dc-&gt;caps.max_v_total != 0 &amp;&amp;</div><div class='add'>+		(adjust-&gt;v_total_max &gt; dc-&gt;caps.max_v_total || adjust-&gt;v_total_min &gt; dc-&gt;caps.max_v_total)) {</div><div class='add'>+		if (adjust-&gt;allow_otg_v_count_halt)</div><div class='add'>+			return set_long_vtotal(dc, stream, adjust);</div><div class='add'>+		else</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='ctx'> 		struct pipe_ctx *pipe = &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='hunk'>@@ -1055,8 +1090,7 @@ static bool dc_construct(struct dc *dc,</div><div class='ctx'> 	 * is initialized in dc_create_resource_pool because</div><div class='ctx'> 	 * on creation it copies the contents of dc-&gt;dml</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	dc-&gt;current_state = dc_state_create(dc);</div><div class='add'>+	dc-&gt;current_state = dc_state_create(dc, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (!dc-&gt;current_state) {</div><div class='ctx'> 		dm_error("%s: failed to create validate ctx\n", __func__);</div><div class='hunk'>@@ -1272,7 +1306,7 @@ static void disable_vbios_mode_if_required(</div><div class='ctx'> </div><div class='ctx'> 		if (link != NULL &amp;&amp; link-&gt;link_enc-&gt;funcs-&gt;is_dig_enabled(link-&gt;link_enc)) {</div><div class='ctx'> 			unsigned int enc_inst, tg_inst = 0;</div><div class='del'>-			unsigned int pix_clk_100hz;</div><div class='add'>+			unsigned int pix_clk_100hz = 0;</div><div class='ctx'> </div><div class='ctx'> 			enc_inst = link-&gt;link_enc-&gt;funcs-&gt;get_dig_frontend(link-&gt;link_enc);</div><div class='ctx'> 			if (enc_inst != ENGINE_ID_UNKNOWN) {</div><div class='hunk'>@@ -1759,7 +1793,7 @@ bool dc_validate_boot_timing(const struct dc *dc,</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (dc_is_dp_signal(link-&gt;connector_signal)) {</div><div class='del'>-		unsigned int pix_clk_100hz;</div><div class='add'>+		unsigned int pix_clk_100hz = 0;</div><div class='ctx'> 		uint32_t numOdmPipes = 1;</div><div class='ctx'> 		uint32_t id_src[4] = {0};</div><div class='ctx'> </div><div class='hunk'>@@ -1801,6 +1835,9 @@ bool dc_validate_boot_timing(const struct dc *dc,</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (link-&gt;dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	if (dc-&gt;link_srv-&gt;edp_is_ilr_optimization_required(link, crtc_timing)) {</div><div class='ctx'> 		DC_LOG_EVENT_LINK_TRAINING("Seamless boot disabled to optimize eDP link rate\n");</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -2085,15 +2122,14 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool commit_minimal_transition_state_legacy(struct dc *dc,</div><div class='add'>+static bool commit_minimal_transition_state(struct dc *dc,</div><div class='ctx'> 		struct dc_state *transition_base_context);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * dc_commit_streams - Commit current stream state</div><div class='ctx'>  *</div><div class='ctx'>  * @dc: DC object with the commit state to be configured in the hardware</div><div class='del'>- * @streams: Array with a list of stream state</div><div class='del'>- * @stream_count: Total of streams</div><div class='add'>+ * @params: Parameters for the commit, including the streams to be committed</div><div class='ctx'>  *</div><div class='ctx'>  * Function responsible for commit streams change to the hardware.</div><div class='ctx'>  *</div><div class='hunk'>@@ -2101,9 +2137,7 @@ static bool commit_minimal_transition_state_legacy(struct dc *dc,</div><div class='ctx'>  * Return DC_OK if everything work as expected, otherwise, return a dc_status</div><div class='ctx'>  * code.</div><div class='ctx'>  */</div><div class='del'>-enum dc_status dc_commit_streams(struct dc *dc,</div><div class='del'>-				 struct dc_stream_state *streams[],</div><div class='del'>-				 uint8_t stream_count)</div><div class='add'>+enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	struct dc_state *context;</div><div class='hunk'>@@ -2112,18 +2146,22 @@ enum dc_status dc_commit_streams(struct dc *dc,</div><div class='ctx'> 	struct pipe_ctx *pipe;</div><div class='ctx'> 	bool handle_exit_odm2to1 = false;</div><div class='ctx'> </div><div class='add'>+	if (!params)</div><div class='add'>+		return DC_ERROR_UNEXPECTED;</div><div class='add'>+</div><div class='ctx'> 	if (dc-&gt;ctx-&gt;dce_environment == DCE_ENV_VIRTUAL_HW)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='del'>-	if (!streams_changed(dc, streams, stream_count))</div><div class='add'>+	if (!streams_changed(dc, params-&gt;streams, params-&gt;stream_count) &amp;&amp;</div><div class='add'>+			dc-&gt;current_state-&gt;power_source == params-&gt;power_source)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='ctx'> 	dc_exit_ips_for_hw_access(dc);</div><div class='ctx'> </div><div class='del'>-	DC_LOG_DC("%s: %d streams\n", __func__, stream_count);</div><div class='add'>+	DC_LOG_DC("%s: %d streams\n", __func__, params-&gt;stream_count);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; stream_count; i++) {</div><div class='del'>-		struct dc_stream_state *stream = streams[i];</div><div class='add'>+	for (i = 0; i &lt; params-&gt;stream_count; i++) {</div><div class='add'>+		struct dc_stream_state *stream = params-&gt;streams[i];</div><div class='ctx'> 		struct dc_stream_status *status = dc_stream_get_status(stream);</div><div class='ctx'> </div><div class='ctx'> 		dc_stream_log(dc, stream);</div><div class='hunk'>@@ -2141,7 +2179,7 @@ enum dc_status dc_commit_streams(struct dc *dc,</div><div class='ctx'> 	 * scenario, it uses extra pipes than needed to reduce power consumption</div><div class='ctx'> 	 * We need to switch off this feature to make room for new streams.</div><div class='ctx'> 	 */</div><div class='del'>-	if (stream_count &gt; dc-&gt;current_state-&gt;stream_count &amp;&amp;</div><div class='add'>+	if (params-&gt;stream_count &gt; dc-&gt;current_state-&gt;stream_count &amp;&amp;</div><div class='ctx'> 			dc-&gt;current_state-&gt;stream_count == 1) {</div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 			pipe = &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='hunk'>@@ -2151,13 +2189,15 @@ enum dc_status dc_commit_streams(struct dc *dc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (handle_exit_odm2to1)</div><div class='del'>-		res = commit_minimal_transition_state_legacy(dc, dc-&gt;current_state);</div><div class='add'>+		res = commit_minimal_transition_state(dc, dc-&gt;current_state);</div><div class='ctx'> </div><div class='ctx'> 	context = dc_state_create_current_copy(dc);</div><div class='ctx'> 	if (!context)</div><div class='ctx'> 		goto context_alloc_fail;</div><div class='ctx'> </div><div class='del'>-	res = dc_validate_with_context(dc, set, stream_count, context, false);</div><div class='add'>+	context-&gt;power_source = params-&gt;power_source;</div><div class='add'>+</div><div class='add'>+	res = dc_validate_with_context(dc, set, params-&gt;stream_count, context, false);</div><div class='ctx'> 	if (res != DC_OK) {</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -2165,16 +2205,16 @@ enum dc_status dc_commit_streams(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	res = dc_commit_state_no_check(dc, context);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; stream_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; params-&gt;stream_count; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; context-&gt;stream_count; j++) {</div><div class='del'>-			if (streams[i]-&gt;stream_id == context-&gt;streams[j]-&gt;stream_id)</div><div class='del'>-				streams[i]-&gt;out.otg_offset = context-&gt;stream_status[j].primary_otg_inst;</div><div class='add'>+			if (params-&gt;streams[i]-&gt;stream_id == context-&gt;streams[j]-&gt;stream_id)</div><div class='add'>+				params-&gt;streams[i]-&gt;out.otg_offset = context-&gt;stream_status[j].primary_otg_inst;</div><div class='ctx'> </div><div class='del'>-			if (dc_is_embedded_signal(streams[i]-&gt;signal)) {</div><div class='del'>-				struct dc_stream_status *status = dc_state_get_stream_status(context, streams[i]);</div><div class='add'>+			if (dc_is_embedded_signal(params-&gt;streams[i]-&gt;signal)) {</div><div class='add'>+				struct dc_stream_status *status = dc_state_get_stream_status(context, params-&gt;streams[i]);</div><div class='ctx'> </div><div class='ctx'> 				if (dc-&gt;hwss.is_abm_supported)</div><div class='del'>-					status-&gt;is_abm_supported = dc-&gt;hwss.is_abm_supported(dc, context, streams[i]);</div><div class='add'>+					status-&gt;is_abm_supported = dc-&gt;hwss.is_abm_supported(dc, context, params-&gt;streams[i]);</div><div class='ctx'> 				else</div><div class='ctx'> 					status-&gt;is_abm_supported = true;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2818,55 +2858,45 @@ static void copy_surface_update_to_plane(</div><div class='ctx'> 				srf_update-&gt;plane_info-&gt;layer_index;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (srf_update-&gt;gamma &amp;&amp;</div><div class='del'>-			(surface-&gt;gamma_correction !=</div><div class='del'>-					srf_update-&gt;gamma)) {</div><div class='del'>-		memcpy(&amp;surface-&gt;gamma_correction-&gt;entries,</div><div class='add'>+	if (srf_update-&gt;gamma) {</div><div class='add'>+		memcpy(&amp;surface-&gt;gamma_correction.entries,</div><div class='ctx'> 			&amp;srf_update-&gt;gamma-&gt;entries,</div><div class='ctx'> 			sizeof(struct dc_gamma_entries));</div><div class='del'>-		surface-&gt;gamma_correction-&gt;is_identity =</div><div class='add'>+		surface-&gt;gamma_correction.is_identity =</div><div class='ctx'> 			srf_update-&gt;gamma-&gt;is_identity;</div><div class='del'>-		surface-&gt;gamma_correction-&gt;num_entries =</div><div class='add'>+		surface-&gt;gamma_correction.num_entries =</div><div class='ctx'> 			srf_update-&gt;gamma-&gt;num_entries;</div><div class='del'>-		surface-&gt;gamma_correction-&gt;type =</div><div class='add'>+		surface-&gt;gamma_correction.type =</div><div class='ctx'> 			srf_update-&gt;gamma-&gt;type;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (srf_update-&gt;in_transfer_func &amp;&amp;</div><div class='del'>-			(surface-&gt;in_transfer_func !=</div><div class='del'>-				srf_update-&gt;in_transfer_func)) {</div><div class='del'>-		surface-&gt;in_transfer_func-&gt;sdr_ref_white_level =</div><div class='add'>+	if (srf_update-&gt;in_transfer_func) {</div><div class='add'>+		surface-&gt;in_transfer_func.sdr_ref_white_level =</div><div class='ctx'> 			srf_update-&gt;in_transfer_func-&gt;sdr_ref_white_level;</div><div class='del'>-		surface-&gt;in_transfer_func-&gt;tf =</div><div class='add'>+		surface-&gt;in_transfer_func.tf =</div><div class='ctx'> 			srf_update-&gt;in_transfer_func-&gt;tf;</div><div class='del'>-		surface-&gt;in_transfer_func-&gt;type =</div><div class='add'>+		surface-&gt;in_transfer_func.type =</div><div class='ctx'> 			srf_update-&gt;in_transfer_func-&gt;type;</div><div class='del'>-		memcpy(&amp;surface-&gt;in_transfer_func-&gt;tf_pts,</div><div class='add'>+		memcpy(&amp;surface-&gt;in_transfer_func.tf_pts,</div><div class='ctx'> 			&amp;srf_update-&gt;in_transfer_func-&gt;tf_pts,</div><div class='ctx'> 			sizeof(struct dc_transfer_func_distributed_points));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (srf_update-&gt;func_shaper &amp;&amp;</div><div class='del'>-			(surface-&gt;in_shaper_func !=</div><div class='del'>-			srf_update-&gt;func_shaper))</div><div class='del'>-		memcpy(surface-&gt;in_shaper_func, srf_update-&gt;func_shaper,</div><div class='del'>-		sizeof(*surface-&gt;in_shaper_func));</div><div class='add'>+	if (srf_update-&gt;func_shaper)</div><div class='add'>+		memcpy(&amp;surface-&gt;in_shaper_func, srf_update-&gt;func_shaper,</div><div class='add'>+		sizeof(surface-&gt;in_shaper_func));</div><div class='ctx'> </div><div class='del'>-	if (srf_update-&gt;lut3d_func &amp;&amp;</div><div class='del'>-			(surface-&gt;lut3d_func !=</div><div class='del'>-			srf_update-&gt;lut3d_func))</div><div class='del'>-		memcpy(surface-&gt;lut3d_func, srf_update-&gt;lut3d_func,</div><div class='del'>-		sizeof(*surface-&gt;lut3d_func));</div><div class='add'>+	if (srf_update-&gt;lut3d_func)</div><div class='add'>+		memcpy(&amp;surface-&gt;lut3d_func, srf_update-&gt;lut3d_func,</div><div class='add'>+		sizeof(surface-&gt;lut3d_func));</div><div class='ctx'> </div><div class='ctx'> 	if (srf_update-&gt;hdr_mult.value)</div><div class='ctx'> 		surface-&gt;hdr_mult =</div><div class='ctx'> 				srf_update-&gt;hdr_mult;</div><div class='ctx'> </div><div class='del'>-	if (srf_update-&gt;blend_tf &amp;&amp;</div><div class='del'>-			(surface-&gt;blend_tf !=</div><div class='del'>-			srf_update-&gt;blend_tf))</div><div class='del'>-		memcpy(surface-&gt;blend_tf, srf_update-&gt;blend_tf,</div><div class='del'>-		sizeof(*surface-&gt;blend_tf));</div><div class='add'>+	if (srf_update-&gt;blend_tf)</div><div class='add'>+		memcpy(&amp;surface-&gt;blend_tf, srf_update-&gt;blend_tf,</div><div class='add'>+		sizeof(surface-&gt;blend_tf));</div><div class='ctx'> </div><div class='ctx'> 	if (srf_update-&gt;input_csc_color_matrix)</div><div class='ctx'> 		surface-&gt;input_csc_color_matrix =</div><div class='hunk'>@@ -2897,14 +2927,13 @@ static void copy_stream_update_to_stream(struct dc *dc,</div><div class='ctx'> 	if (update-&gt;dst.height &amp;&amp; update-&gt;dst.width)</div><div class='ctx'> 		stream-&gt;dst = update-&gt;dst;</div><div class='ctx'> </div><div class='del'>-	if (update-&gt;out_transfer_func &amp;&amp;</div><div class='del'>-	    stream-&gt;out_transfer_func != update-&gt;out_transfer_func) {</div><div class='del'>-		stream-&gt;out_transfer_func-&gt;sdr_ref_white_level =</div><div class='add'>+	if (update-&gt;out_transfer_func) {</div><div class='add'>+		stream-&gt;out_transfer_func.sdr_ref_white_level =</div><div class='ctx'> 			update-&gt;out_transfer_func-&gt;sdr_ref_white_level;</div><div class='del'>-		stream-&gt;out_transfer_func-&gt;tf = update-&gt;out_transfer_func-&gt;tf;</div><div class='del'>-		stream-&gt;out_transfer_func-&gt;type =</div><div class='add'>+		stream-&gt;out_transfer_func.tf = update-&gt;out_transfer_func-&gt;tf;</div><div class='add'>+		stream-&gt;out_transfer_func.type =</div><div class='ctx'> 			update-&gt;out_transfer_func-&gt;type;</div><div class='del'>-		memcpy(&amp;stream-&gt;out_transfer_func-&gt;tf_pts,</div><div class='add'>+		memcpy(&amp;stream-&gt;out_transfer_func.tf_pts,</div><div class='ctx'> 		       &amp;update-&gt;out_transfer_func-&gt;tf_pts,</div><div class='ctx'> 		       sizeof(struct dc_transfer_func_distributed_points));</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3017,15 +3046,8 @@ static void backup_planes_and_stream_state(</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; status-&gt;plane_count; i++) {</div><div class='ctx'> 		scratch-&gt;plane_states[i] = *status-&gt;plane_states[i];</div><div class='del'>-		scratch-&gt;gamma_correction[i] = *status-&gt;plane_states[i]-&gt;gamma_correction;</div><div class='del'>-		scratch-&gt;in_transfer_func[i] = *status-&gt;plane_states[i]-&gt;in_transfer_func;</div><div class='del'>-		scratch-&gt;lut3d_func[i] = *status-&gt;plane_states[i]-&gt;lut3d_func;</div><div class='del'>-		scratch-&gt;in_shaper_func[i] = *status-&gt;plane_states[i]-&gt;in_shaper_func;</div><div class='del'>-		scratch-&gt;blend_tf[i] = *status-&gt;plane_states[i]-&gt;blend_tf;</div><div class='ctx'> 	}</div><div class='ctx'> 	scratch-&gt;stream_state = *stream;</div><div class='del'>-	if (stream-&gt;out_transfer_func)</div><div class='del'>-		scratch-&gt;out_transfer_func = *stream-&gt;out_transfer_func;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void restore_planes_and_stream_state(</div><div class='hunk'>@@ -3040,17 +3062,67 @@ static void restore_planes_and_stream_state(</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; status-&gt;plane_count; i++) {</div><div class='ctx'> 		*status-&gt;plane_states[i] = scratch-&gt;plane_states[i];</div><div class='del'>-		*status-&gt;plane_states[i]-&gt;gamma_correction = scratch-&gt;gamma_correction[i];</div><div class='del'>-		*status-&gt;plane_states[i]-&gt;in_transfer_func = scratch-&gt;in_transfer_func[i];</div><div class='del'>-		*status-&gt;plane_states[i]-&gt;lut3d_func = scratch-&gt;lut3d_func[i];</div><div class='del'>-		*status-&gt;plane_states[i]-&gt;in_shaper_func = scratch-&gt;in_shaper_func[i];</div><div class='del'>-		*status-&gt;plane_states[i]-&gt;blend_tf = scratch-&gt;blend_tf[i];</div><div class='ctx'> 	}</div><div class='ctx'> 	*stream = scratch-&gt;stream_state;</div><div class='del'>-	if (stream-&gt;out_transfer_func)</div><div class='del'>-		*stream-&gt;out_transfer_func = scratch-&gt;out_transfer_func;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * update_seamless_boot_flags() - Helper function for updating seamless boot flags</div><div class='add'>+ *</div><div class='add'>+ * @dc: Current DC state</div><div class='add'>+ * @context: New DC state to be programmed</div><div class='add'>+ * @surface_count: Number of surfaces that have an updated</div><div class='add'>+ * @stream: Corresponding stream to be updated in the current flip</div><div class='add'>+ *</div><div class='add'>+ * Updating seamless boot flags do not need to be part of the commit sequence. This</div><div class='add'>+ * helper function will update the seamless boot flags on each flip (if required)</div><div class='add'>+ * outside of the HW commit sequence (fast or slow).</div><div class='add'>+ *</div><div class='add'>+ * Return: void</div><div class='add'>+ */</div><div class='add'>+static void update_seamless_boot_flags(struct dc *dc,</div><div class='add'>+		struct dc_state *context,</div><div class='add'>+		int surface_count,</div><div class='add'>+		struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	if (get_seamless_boot_stream_count(context) &gt; 0 &amp;&amp; surface_count &gt; 0) {</div><div class='add'>+		/* Optimize seamless boot flag keeps clocks and watermarks high until</div><div class='add'>+		 * first flip. After first flip, optimization is required to lower</div><div class='add'>+		 * bandwidth. Important to note that it is expected UEFI will</div><div class='add'>+		 * only light up a single display on POST, therefore we only expect</div><div class='add'>+		 * one stream with seamless boot flag set.</div><div class='add'>+		 */</div><div class='add'>+		if (stream-&gt;apply_seamless_boot_optimization) {</div><div class='add'>+			stream-&gt;apply_seamless_boot_optimization = false;</div><div class='add'>+</div><div class='add'>+			if (get_seamless_boot_stream_count(context) == 0)</div><div class='add'>+				dc-&gt;optimized_required = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * update_planes_and_stream_state() - The function takes planes and stream</div><div class='add'>+ * updates as inputs and determines the appropriate update type. If update type</div><div class='add'>+ * is FULL, the function allocates a new context, populates and validates it.</div><div class='add'>+ * Otherwise, it updates current dc context. The function will return both</div><div class='add'>+ * new_context and new_update_type back to the caller. The function also backs</div><div class='add'>+ * up both current and new contexts into corresponding dc state scratch memory.</div><div class='add'>+ * TODO: The function does too many things, and even conditionally allocates dc</div><div class='add'>+ * context memory implicitly. We should consider to break it down.</div><div class='add'>+ *</div><div class='add'>+ * @dc: Current DC state</div><div class='add'>+ * @srf_updates: an array of surface updates</div><div class='add'>+ * @surface_count: surface update count</div><div class='add'>+ * @stream: Corresponding stream to be updated</div><div class='add'>+ * @stream_update: stream update</div><div class='add'>+ * @new_update_type: [out] determined update type by the function</div><div class='add'>+ * @new_context: [out] new context allocated and validated if update type is</div><div class='add'>+ * FULL, reference to current context if update type is less than FULL.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if a valid update is populated into new_context, false</div><div class='add'>+ * otherwise.</div><div class='add'>+ */</div><div class='ctx'> static bool update_planes_and_stream_state(struct dc *dc,</div><div class='ctx'> 		struct dc_surface_update *srf_updates, int surface_count,</div><div class='ctx'> 		struct dc_stream_state *stream,</div><div class='hunk'>@@ -3074,9 +3146,10 @@ static bool update_planes_and_stream_state(struct dc *dc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	context = dc-&gt;current_state;</div><div class='del'>-	backup_planes_and_stream_state(&amp;dc-&gt;current_state-&gt;scratch, stream);</div><div class='ctx'> 	update_type = dc_check_update_surfaces_for_stream(</div><div class='ctx'> 			dc, srf_updates, surface_count, stream_update, stream_status);</div><div class='add'>+	if (update_type == UPDATE_TYPE_FULL)</div><div class='add'>+		backup_planes_and_stream_state(&amp;dc-&gt;scratch.current_state, stream);</div><div class='ctx'> </div><div class='ctx'> 	/* update current stream with the new updates */</div><div class='ctx'> 	copy_stream_update_to_stream(dc, context, stream, stream_update);</div><div class='hunk'>@@ -3145,7 +3218,10 @@ static bool update_planes_and_stream_state(struct dc *dc,</div><div class='ctx'> 	for (i = 0; i &lt; surface_count; i++) {</div><div class='ctx'> 		struct dc_plane_state *surface = srf_updates[i].surface;</div><div class='ctx'> </div><div class='del'>-		if (update_type &gt;= UPDATE_TYPE_MED) {</div><div class='add'>+		if (update_type != UPDATE_TYPE_MED)</div><div class='add'>+			continue;</div><div class='add'>+		if (surface-&gt;update_flags.bits.clip_size_change ||</div><div class='add'>+				surface-&gt;update_flags.bits.position_change) {</div><div class='ctx'> 			for (j = 0; j &lt; dc-&gt;res_pool-&gt;pipe_count; j++) {</div><div class='ctx'> 				struct pipe_ctx *pipe_ctx = &amp;context-&gt;res_ctx.pipe_ctx[j];</div><div class='ctx'> </div><div class='hunk'>@@ -3162,19 +3238,13 @@ static bool update_planes_and_stream_state(struct dc *dc,</div><div class='ctx'> 			BREAK_TO_DEBUGGER();</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='del'>-			struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&amp;context-&gt;res_ctx,</div><div class='del'>-					context-&gt;streams[i]);</div><div class='del'>-</div><div class='del'>-			if (otg_master &amp;&amp; otg_master-&gt;stream-&gt;test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE)</div><div class='del'>-				resource_build_test_pattern_params(&amp;context-&gt;res_ctx, otg_master);</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='add'>+	update_seamless_boot_flags(dc, context, surface_count, stream);</div><div class='ctx'> </div><div class='ctx'> 	*new_context = context;</div><div class='ctx'> 	*new_update_type = update_type;</div><div class='del'>-	backup_planes_and_stream_state(&amp;context-&gt;scratch, stream);</div><div class='add'>+	if (update_type == UPDATE_TYPE_FULL)</div><div class='add'>+		backup_planes_and_stream_state(&amp;dc-&gt;scratch.new_state, stream);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> </div><div class='hunk'>@@ -3263,12 +3333,26 @@ static void commit_planes_do_stream_update(struct dc *dc,</div><div class='ctx'>  			}</div><div class='ctx'> </div><div class='ctx'> 			if (stream_update-&gt;pending_test_pattern) {</div><div class='del'>-				dc_link_dp_set_test_pattern(stream-&gt;link,</div><div class='add'>+				/*</div><div class='add'>+				 * test pattern params depends on ODM topology</div><div class='add'>+				 * changes that we could be applying to front</div><div class='add'>+				 * end. Since at the current stage front end</div><div class='add'>+				 * changes are not yet applied. We can only</div><div class='add'>+				 * apply test pattern in hw based on current</div><div class='add'>+				 * state and populate the final test pattern</div><div class='add'>+				 * params in new state. If current and new test</div><div class='add'>+				 * pattern params are different as result of</div><div class='add'>+				 * different ODM topology being used, it will be</div><div class='add'>+				 * detected and handle during front end</div><div class='add'>+				 * programming update.</div><div class='add'>+				 */</div><div class='add'>+				dc-&gt;link_srv-&gt;dp_set_test_pattern(stream-&gt;link,</div><div class='ctx'> 					stream-&gt;test_pattern.type,</div><div class='ctx'> 					stream-&gt;test_pattern.color_space,</div><div class='ctx'> 					stream-&gt;test_pattern.p_link_settings,</div><div class='ctx'> 					stream-&gt;test_pattern.p_custom_pattern,</div><div class='ctx'> 					stream-&gt;test_pattern.cust_pattern_size);</div><div class='add'>+				resource_build_test_pattern_params(&amp;context-&gt;res_ctx, pipe_ctx);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (stream_update-&gt;dpms_off) {</div><div class='hunk'>@@ -3365,6 +3449,7 @@ void dc_dmub_update_dirty_rect(struct dc *dc,</div><div class='ctx'> 		if (srf_updates[i].surface-&gt;flip_immediate)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		update_dirty_rect-&gt;cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;</div><div class='ctx'> 		update_dirty_rect-&gt;dirty_rect_count = flip_addr-&gt;dirty_rect_count;</div><div class='ctx'> 		memcpy(update_dirty_rect-&gt;src_dirty_rects, flip_addr-&gt;dirty_rects,</div><div class='ctx'> 				sizeof(flip_addr-&gt;dirty_rects));</div><div class='hunk'>@@ -3481,6 +3566,7 @@ static void commit_planes_for_stream_fast(struct dc *dc,</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	struct pipe_ctx *top_pipe_to_program = NULL;</div><div class='ctx'> 	struct dc_stream_status *stream_status = NULL;</div><div class='add'>+</div><div class='ctx'> 	dc_exit_ips_for_hw_access(dc);</div><div class='ctx'> </div><div class='ctx'> 	dc_z10_restore(dc);</div><div class='hunk'>@@ -3538,7 +3624,8 @@ static void commit_planes_for_stream_fast(struct dc *dc,</div><div class='ctx'> 			context-&gt;block_sequence,</div><div class='ctx'> 			&amp;(context-&gt;block_sequence_steps),</div><div class='ctx'> 			top_pipe_to_program,</div><div class='del'>-			stream_status);</div><div class='add'>+			stream_status,</div><div class='add'>+			context);</div><div class='ctx'> 	hwss_execute_sequence(dc,</div><div class='ctx'> 			context-&gt;block_sequence,</div><div class='ctx'> 			context-&gt;block_sequence_steps);</div><div class='hunk'>@@ -4067,24 +4154,14 @@ struct pipe_split_policy_backup {</div><div class='ctx'> 	bool dynamic_odm_policy;</div><div class='ctx'> 	bool subvp_policy;</div><div class='ctx'> 	enum pipe_split_policy mpc_policy;</div><div class='add'>+	char force_odm[MAX_PIPES];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void release_minimal_transition_state(struct dc *dc,</div><div class='del'>-		struct dc_state *context, struct pipe_split_policy_backup *policy)</div><div class='del'>-{</div><div class='del'>-	dc_state_release(context);</div><div class='del'>-	/* restore previous pipe split and odm policy */</div><div class='del'>-	if (!dc-&gt;config.is_vmin_only_asic)</div><div class='del'>-		dc-&gt;debug.pipe_split_policy = policy-&gt;mpc_policy;</div><div class='del'>-	dc-&gt;debug.enable_single_display_2to1_odm_policy = policy-&gt;dynamic_odm_policy;</div><div class='del'>-	dc-&gt;debug.force_disable_subvp = policy-&gt;subvp_policy;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct dc_state *create_minimal_transition_state(struct dc *dc,</div><div class='del'>-		struct dc_state *base_context, struct pipe_split_policy_backup *policy)</div><div class='add'>+static void backup_and_set_minimal_pipe_split_policy(struct dc *dc,</div><div class='add'>+		struct dc_state *context,</div><div class='add'>+		struct pipe_split_policy_backup *policy)</div><div class='ctx'> {</div><div class='del'>-	struct dc_state *minimal_transition_context = NULL;</div><div class='del'>-	unsigned int i, j;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!dc-&gt;config.is_vmin_only_asic) {</div><div class='ctx'> 		policy-&gt;mpc_policy = dc-&gt;debug.pipe_split_policy;</div><div class='hunk'>@@ -4094,97 +4171,257 @@ static struct dc_state *create_minimal_transition_state(struct dc *dc,</div><div class='ctx'> 	dc-&gt;debug.enable_single_display_2to1_odm_policy = false;</div><div class='ctx'> 	policy-&gt;subvp_policy = dc-&gt;debug.force_disable_subvp;</div><div class='ctx'> 	dc-&gt;debug.force_disable_subvp = true;</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+		policy-&gt;force_odm[i] = context-&gt;streams[i]-&gt;debug.force_odm_combine_segments;</div><div class='add'>+		context-&gt;streams[i]-&gt;debug.force_odm_combine_segments = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void restore_minimal_pipe_split_policy(struct dc *dc,</div><div class='add'>+		struct dc_state *context,</div><div class='add'>+		struct pipe_split_policy_backup *policy)</div><div class='add'>+{</div><div class='add'>+	uint8_t i;</div><div class='add'>+</div><div class='add'>+	if (!dc-&gt;config.is_vmin_only_asic)</div><div class='add'>+		dc-&gt;debug.pipe_split_policy = policy-&gt;mpc_policy;</div><div class='add'>+	dc-&gt;debug.enable_single_display_2to1_odm_policy =</div><div class='add'>+			policy-&gt;dynamic_odm_policy;</div><div class='add'>+	dc-&gt;debug.force_disable_subvp = policy-&gt;subvp_policy;</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++)</div><div class='add'>+		context-&gt;streams[i]-&gt;debug.force_odm_combine_segments = policy-&gt;force_odm[i];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void release_minimal_transition_state(struct dc *dc,</div><div class='add'>+		struct dc_state *minimal_transition_context,</div><div class='add'>+		struct dc_state *base_context,</div><div class='add'>+		struct pipe_split_policy_backup *policy)</div><div class='add'>+{</div><div class='add'>+	restore_minimal_pipe_split_policy(dc, base_context, policy);</div><div class='add'>+	dc_state_release(minimal_transition_context);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void force_vsync_flip_in_minimal_transition_context(struct dc_state *context)</div><div class='add'>+{</div><div class='add'>+	uint8_t i;</div><div class='add'>+	int j;</div><div class='add'>+	struct dc_stream_status *stream_status;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+		stream_status = &amp;context-&gt;stream_status[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; stream_status-&gt;plane_count; j++)</div><div class='add'>+			stream_status-&gt;plane_states[j]-&gt;flip_immediate = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dc_state *create_minimal_transition_state(struct dc *dc,</div><div class='add'>+		struct dc_state *base_context, struct pipe_split_policy_backup *policy)</div><div class='add'>+{</div><div class='add'>+	struct dc_state *minimal_transition_context = NULL;</div><div class='ctx'> </div><div class='ctx'> 	minimal_transition_context = dc_state_create_copy(base_context);</div><div class='ctx'> 	if (!minimal_transition_context)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	backup_and_set_minimal_pipe_split_policy(dc, base_context, policy);</div><div class='ctx'> 	/* commit minimal state */</div><div class='ctx'> 	if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, minimal_transition_context, false)) {</div><div class='del'>-		for (i = 0; i &lt; minimal_transition_context-&gt;stream_count; i++) {</div><div class='del'>-			struct dc_stream_status *stream_status = &amp;minimal_transition_context-&gt;stream_status[i];</div><div class='del'>-</div><div class='del'>-			for (j = 0; j &lt; stream_status-&gt;plane_count; j++) {</div><div class='del'>-				struct dc_plane_state *plane_state = stream_status-&gt;plane_states[j];</div><div class='del'>-</div><div class='del'>-				/* force vsync flip when reconfiguring pipes to prevent underflow</div><div class='del'>-				 * and corruption</div><div class='del'>-				 */</div><div class='del'>-				plane_state-&gt;flip_immediate = false;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		/* prevent underflow and corruption when reconfiguring pipes */</div><div class='add'>+		force_vsync_flip_in_minimal_transition_context(minimal_transition_context);</div><div class='ctx'> 	} else {</div><div class='del'>-		/* this should never happen */</div><div class='del'>-		release_minimal_transition_state(dc, minimal_transition_context, policy);</div><div class='add'>+		/*</div><div class='add'>+		 * This should never happen, minimal transition state should</div><div class='add'>+		 * always be validated first before adding pipe split features.</div><div class='add'>+		 */</div><div class='add'>+		release_minimal_transition_state(dc, minimal_transition_context, base_context, policy);</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='ctx'> 		minimal_transition_context = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return minimal_transition_context;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_pipe_topology_transition_seamless_with_intermediate_step(</div><div class='add'>+		struct dc *dc,</div><div class='add'>+		struct dc_state *initial_state,</div><div class='add'>+		struct dc_state *intermediate_state,</div><div class='add'>+		struct dc_state *final_state)</div><div class='add'>+{</div><div class='add'>+	return dc-&gt;hwss.is_pipe_topology_transition_seamless(dc, initial_state,</div><div class='add'>+			intermediate_state) &amp;&amp;</div><div class='add'>+			dc-&gt;hwss.is_pipe_topology_transition_seamless(dc,</div><div class='add'>+					intermediate_state, final_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void swap_and_release_current_context(struct dc *dc,</div><div class='add'>+		struct dc_state *new_context, struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	int i;</div><div class='add'>+	struct dc_state *old = dc-&gt;current_state;</div><div class='add'>+	struct pipe_ctx *pipe_ctx;</div><div class='add'>+</div><div class='add'>+	/* Since memory free requires elevated IRQ, an interrupt</div><div class='add'>+	 * request is generated by mem free. If this happens</div><div class='add'>+	 * between freeing and reassigning the context, our vsync</div><div class='add'>+	 * interrupt will call into dc and cause a memory</div><div class='add'>+	 * corruption. Hence, we first reassign the context,</div><div class='add'>+	 * then free the old context.</div><div class='add'>+	 */</div><div class='add'>+	dc-&gt;current_state = new_context;</div><div class='add'>+	dc_state_release(old);</div><div class='add'>+</div><div class='add'>+	// clear any forced full updates</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+		pipe_ctx = &amp;new_context-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+</div><div class='add'>+		if (pipe_ctx-&gt;plane_state &amp;&amp; pipe_ctx-&gt;stream == stream)</div><div class='add'>+			pipe_ctx-&gt;plane_state-&gt;force_full_update = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int initialize_empty_surface_updates(</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_surface_update *srf_updates)</div><div class='add'>+{</div><div class='add'>+	struct dc_stream_status *status = dc_stream_get_status(stream);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!status)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; status-&gt;plane_count; i++)</div><div class='add'>+		srf_updates[i].surface = status-&gt;plane_states[i];</div><div class='add'>+</div><div class='add'>+	return status-&gt;plane_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool commit_minimal_transition_based_on_new_context(struct dc *dc,</div><div class='add'>+		struct dc_state *new_context,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_surface_update *srf_updates,</div><div class='add'>+		int surface_count)</div><div class='add'>+{</div><div class='add'>+	bool success = false;</div><div class='add'>+	struct pipe_split_policy_backup policy;</div><div class='add'>+	struct dc_state *intermediate_context =</div><div class='add'>+			create_minimal_transition_state(dc, new_context,</div><div class='add'>+					&amp;policy);</div><div class='add'>+</div><div class='add'>+	if (intermediate_context) {</div><div class='add'>+		if (is_pipe_topology_transition_seamless_with_intermediate_step(</div><div class='add'>+				dc,</div><div class='add'>+				dc-&gt;current_state,</div><div class='add'>+				intermediate_context,</div><div class='add'>+				new_context)) {</div><div class='add'>+			DC_LOG_DC("commit minimal transition state: base = new state\n");</div><div class='add'>+			commit_planes_for_stream(dc, srf_updates,</div><div class='add'>+					surface_count, stream, NULL,</div><div class='add'>+					UPDATE_TYPE_FULL, intermediate_context);</div><div class='add'>+			swap_and_release_current_context(</div><div class='add'>+					dc, intermediate_context, stream);</div><div class='add'>+			dc_state_retain(dc-&gt;current_state);</div><div class='add'>+			success = true;</div><div class='add'>+		}</div><div class='add'>+		release_minimal_transition_state(</div><div class='add'>+				dc, intermediate_context, new_context, &amp;policy);</div><div class='add'>+	}</div><div class='add'>+	return success;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool commit_minimal_transition_based_on_current_context(struct dc *dc,</div><div class='add'>+		struct dc_state *new_context, struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	bool success = false;</div><div class='add'>+	struct pipe_split_policy_backup policy;</div><div class='add'>+	struct dc_state *intermediate_context;</div><div class='add'>+	struct dc_state *old_current_state = dc-&gt;current_state;</div><div class='add'>+	struct dc_surface_update srf_updates[MAX_SURFACE_NUM] = {0};</div><div class='add'>+	int surface_count;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Both current and new contexts share the same stream and plane state</div><div class='add'>+	 * pointers. When new context is validated, stream and planes get</div><div class='add'>+	 * populated with new updates such as new plane addresses. This makes</div><div class='add'>+	 * the current context no longer valid because stream and planes are</div><div class='add'>+	 * modified from the original. We backup current stream and plane states</div><div class='add'>+	 * into scratch space whenever we are populating new context. So we can</div><div class='add'>+	 * restore the original values back by calling the restore function now.</div><div class='add'>+	 * This restores back the original stream and plane states associated</div><div class='add'>+	 * with the current state.</div><div class='add'>+	 */</div><div class='add'>+	restore_planes_and_stream_state(&amp;dc-&gt;scratch.current_state, stream);</div><div class='add'>+	dc_state_retain(old_current_state);</div><div class='add'>+	intermediate_context = create_minimal_transition_state(dc,</div><div class='add'>+			old_current_state, &amp;policy);</div><div class='add'>+</div><div class='add'>+	if (intermediate_context) {</div><div class='add'>+		if (is_pipe_topology_transition_seamless_with_intermediate_step(</div><div class='add'>+				dc,</div><div class='add'>+				dc-&gt;current_state,</div><div class='add'>+				intermediate_context,</div><div class='add'>+				new_context)) {</div><div class='add'>+			DC_LOG_DC("commit minimal transition state: base = current state\n");</div><div class='add'>+			surface_count = initialize_empty_surface_updates(</div><div class='add'>+					stream, srf_updates);</div><div class='add'>+			commit_planes_for_stream(dc, srf_updates,</div><div class='add'>+					surface_count, stream, NULL,</div><div class='add'>+					UPDATE_TYPE_FULL, intermediate_context);</div><div class='add'>+			swap_and_release_current_context(</div><div class='add'>+					dc, intermediate_context, stream);</div><div class='add'>+			dc_state_retain(dc-&gt;current_state);</div><div class='add'>+			success = true;</div><div class='add'>+		}</div><div class='add'>+		release_minimal_transition_state(dc, intermediate_context,</div><div class='add'>+				old_current_state, &amp;policy);</div><div class='add'>+	}</div><div class='add'>+	dc_state_release(old_current_state);</div><div class='add'>+	/*</div><div class='add'>+	 * Restore stream and plane states back to the values associated with</div><div class='add'>+	 * new context.</div><div class='add'>+	 */</div><div class='add'>+	restore_planes_and_stream_state(&amp;dc-&gt;scratch.new_state, stream);</div><div class='add'>+	return success;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * commit_minimal_transition_state - Commit a minimal state based on current or new context</div><div class='add'>+ * commit_minimal_transition_state_in_dc_update - Commit a minimal state based</div><div class='add'>+ * on current or new context</div><div class='ctx'>  *</div><div class='ctx'>  * @dc: DC structure, used to get the current state</div><div class='del'>- * @context: New context</div><div class='add'>+ * @new_context: New context</div><div class='ctx'>  * @stream: Stream getting the update for the flip</div><div class='add'>+ * @srf_updates: Surface updates</div><div class='add'>+ * @surface_count: Number of surfaces</div><div class='ctx'>  *</div><div class='del'>- * The function takes in current state and new state and determine a minimal transition state</div><div class='del'>- * as the intermediate step which could make the transition between current and new states</div><div class='del'>- * seamless. If found, it will commit the minimal transition state and update current state to</div><div class='del'>- * this minimal transition state and return true, if not, it will return false.</div><div class='add'>+ * The function takes in current state and new state and determine a minimal</div><div class='add'>+ * transition state as the intermediate step which could make the transition</div><div class='add'>+ * between current and new states seamless. If found, it will commit the minimal</div><div class='add'>+ * transition state and update current state to this minimal transition state</div><div class='add'>+ * and return true, if not, it will return false.</div><div class='ctx'>  *</div><div class='ctx'>  * Return:</div><div class='ctx'>  * Return True if the minimal transition succeeded, false otherwise</div><div class='ctx'>  */</div><div class='del'>-static bool commit_minimal_transition_state(struct dc *dc,</div><div class='del'>-		struct dc_state *context,</div><div class='del'>-		struct dc_stream_state *stream)</div><div class='del'>-{</div><div class='del'>-	bool success = false;</div><div class='del'>-	struct dc_state *minimal_transition_context;</div><div class='del'>-	struct pipe_split_policy_backup policy;</div><div class='del'>-</div><div class='del'>-	/* commit based on new context */</div><div class='del'>-	minimal_transition_context = create_minimal_transition_state(dc,</div><div class='del'>-			context, &amp;policy);</div><div class='del'>-	if (minimal_transition_context) {</div><div class='del'>-		if (dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='del'>-					dc, dc-&gt;current_state, minimal_transition_context) &amp;&amp;</div><div class='del'>-			dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='del'>-					dc, minimal_transition_context, context)) {</div><div class='del'>-			DC_LOG_DC("%s base = new state\n", __func__);</div><div class='del'>-</div><div class='del'>-			success = dc_commit_state_no_check(dc, minimal_transition_context) == DC_OK;</div><div class='del'>-		}</div><div class='del'>-		release_minimal_transition_state(dc, minimal_transition_context, &amp;policy);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!success) {</div><div class='del'>-		/* commit based on current context */</div><div class='del'>-		restore_planes_and_stream_state(&amp;dc-&gt;current_state-&gt;scratch, stream);</div><div class='del'>-		minimal_transition_context = create_minimal_transition_state(dc,</div><div class='del'>-				dc-&gt;current_state, &amp;policy);</div><div class='del'>-		if (minimal_transition_context) {</div><div class='del'>-			if (dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='del'>-					dc, dc-&gt;current_state, minimal_transition_context) &amp;&amp;</div><div class='del'>-				dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='del'>-						dc, minimal_transition_context, context)) {</div><div class='del'>-				DC_LOG_DC("%s base = current state\n", __func__);</div><div class='del'>-				success = dc_commit_state_no_check(dc, minimal_transition_context) == DC_OK;</div><div class='del'>-			}</div><div class='del'>-			release_minimal_transition_state(dc, minimal_transition_context, &amp;policy);</div><div class='del'>-		}</div><div class='del'>-		restore_planes_and_stream_state(&amp;context-&gt;scratch, stream);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ASSERT(success);</div><div class='add'>+static bool commit_minimal_transition_state_in_dc_update(struct dc *dc,</div><div class='add'>+		struct dc_state *new_context,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_surface_update *srf_updates,</div><div class='add'>+		int surface_count)</div><div class='add'>+{</div><div class='add'>+	bool success = commit_minimal_transition_based_on_new_context(</div><div class='add'>+				dc, new_context, stream, srf_updates,</div><div class='add'>+				surface_count);</div><div class='add'>+	if (!success)</div><div class='add'>+		success = commit_minimal_transition_based_on_current_context(dc,</div><div class='add'>+				new_context, stream);</div><div class='add'>+	if (!success)</div><div class='add'>+		DC_LOG_ERROR("Fail to commit a seamless minimal transition state between current and new states.\nThis pipe topology update is non-seamless!\n");</div><div class='ctx'> 	return success;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * commit_minimal_transition_state_legacy - Create a transition pipe split state</div><div class='add'>+ * commit_minimal_transition_state - Create a transition pipe split state</div><div class='ctx'>  *</div><div class='ctx'>  * @dc: Used to get the current state status</div><div class='ctx'>  * @transition_base_context: New transition state</div><div class='hunk'>@@ -4201,7 +4438,7 @@ static bool commit_minimal_transition_state(struct dc *dc,</div><div class='ctx'>  * Return:</div><div class='ctx'>  * Return false if something is wrong in the transition state.</div><div class='ctx'>  */</div><div class='del'>-static bool commit_minimal_transition_state_legacy(struct dc *dc,</div><div class='add'>+static bool commit_minimal_transition_state(struct dc *dc,</div><div class='ctx'> 		struct dc_state *transition_base_context)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_state *transition_context;</div><div class='hunk'>@@ -4262,12 +4499,14 @@ static bool commit_minimal_transition_state_legacy(struct dc *dc,</div><div class='ctx'> 			dc-&gt;debug.pipe_split_policy != MPC_SPLIT_AVOID ? "MPC in Use" :</div><div class='ctx'> 			"Unknown");</div><div class='ctx'> </div><div class='add'>+	dc_state_retain(transition_base_context);</div><div class='ctx'> 	transition_context = create_minimal_transition_state(dc,</div><div class='ctx'> 			transition_base_context, &amp;policy);</div><div class='ctx'> 	if (transition_context) {</div><div class='ctx'> 		ret = dc_commit_state_no_check(dc, transition_context);</div><div class='del'>-		release_minimal_transition_state(dc, transition_context, &amp;policy);</div><div class='add'>+		release_minimal_transition_state(dc, transition_context, transition_base_context, &amp;policy);</div><div class='ctx'> 	}</div><div class='add'>+	dc_state_release(transition_base_context);</div><div class='ctx'> </div><div class='ctx'> 	if (ret != DC_OK) {</div><div class='ctx'> 		/* this should never happen */</div><div class='hunk'>@@ -4285,41 +4524,6 @@ static bool commit_minimal_transition_state_legacy(struct dc *dc,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * update_seamless_boot_flags() - Helper function for updating seamless boot flags</div><div class='del'>- *</div><div class='del'>- * @dc: Current DC state</div><div class='del'>- * @context: New DC state to be programmed</div><div class='del'>- * @surface_count: Number of surfaces that have an updated</div><div class='del'>- * @stream: Corresponding stream to be updated in the current flip</div><div class='del'>- *</div><div class='del'>- * Updating seamless boot flags do not need to be part of the commit sequence. This</div><div class='del'>- * helper function will update the seamless boot flags on each flip (if required)</div><div class='del'>- * outside of the HW commit sequence (fast or slow).</div><div class='del'>- *</div><div class='del'>- * Return: void</div><div class='del'>- */</div><div class='del'>-static void update_seamless_boot_flags(struct dc *dc,</div><div class='del'>-		struct dc_state *context,</div><div class='del'>-		int surface_count,</div><div class='del'>-		struct dc_stream_state *stream)</div><div class='del'>-{</div><div class='del'>-	if (get_seamless_boot_stream_count(context) &gt; 0 &amp;&amp; surface_count &gt; 0) {</div><div class='del'>-		/* Optimize seamless boot flag keeps clocks and watermarks high until</div><div class='del'>-		 * first flip. After first flip, optimization is required to lower</div><div class='del'>-		 * bandwidth. Important to note that it is expected UEFI will</div><div class='del'>-		 * only light up a single display on POST, therefore we only expect</div><div class='del'>-		 * one stream with seamless boot flag set.</div><div class='del'>-		 */</div><div class='del'>-		if (stream-&gt;apply_seamless_boot_optimization) {</div><div class='del'>-			stream-&gt;apply_seamless_boot_optimization = false;</div><div class='del'>-</div><div class='del'>-			if (get_seamless_boot_stream_count(context) == 0)</div><div class='del'>-				dc-&gt;optimized_required = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void populate_fast_updates(struct dc_fast_update *fast_update,</div><div class='ctx'> 		struct dc_surface_update *srf_updates,</div><div class='ctx'> 		int surface_count,</div><div class='hunk'>@@ -4439,123 +4643,9 @@ static bool fast_update_only(struct dc *dc,</div><div class='ctx'> 			&amp;&amp; !full_update_required(dc, srf_updates, surface_count, stream_update, stream);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dc_update_planes_and_stream(struct dc *dc,</div><div class='add'>+static bool update_planes_and_stream_v1(struct dc *dc,</div><div class='ctx'> 		struct dc_surface_update *srf_updates, int surface_count,</div><div class='ctx'> 		struct dc_stream_state *stream,</div><div class='del'>-		struct dc_stream_update *stream_update)</div><div class='del'>-{</div><div class='del'>-	struct dc_state *context;</div><div class='del'>-	enum surface_update_type update_type;</div><div class='del'>-	int i;</div><div class='del'>-	struct dc_fast_update fast_update[MAX_SURFACES] = {0};</div><div class='del'>-</div><div class='del'>-	/* In cases where MPO and split or ODM are used transitions can</div><div class='del'>-	 * cause underflow. Apply stream configuration with minimal pipe</div><div class='del'>-	 * split first to avoid unsupported transitions for active pipes.</div><div class='del'>-	 */</div><div class='del'>-	bool force_minimal_pipe_splitting = 0;</div><div class='del'>-	bool is_plane_addition = 0;</div><div class='del'>-	bool is_fast_update_only;</div><div class='del'>-</div><div class='del'>-	dc_exit_ips_for_hw_access(dc);</div><div class='del'>-</div><div class='del'>-	populate_fast_updates(fast_update, srf_updates, surface_count, stream_update);</div><div class='del'>-	is_fast_update_only = fast_update_only(dc, fast_update, srf_updates,</div><div class='del'>-			surface_count, stream_update, stream);</div><div class='del'>-	force_minimal_pipe_splitting = could_mpcc_tree_change_for_active_pipes(</div><div class='del'>-			dc,</div><div class='del'>-			stream,</div><div class='del'>-			srf_updates,</div><div class='del'>-			surface_count,</div><div class='del'>-			&amp;is_plane_addition);</div><div class='del'>-</div><div class='del'>-	/* on plane addition, minimal state is the current one */</div><div class='del'>-	if (force_minimal_pipe_splitting &amp;&amp; is_plane_addition &amp;&amp;</div><div class='del'>-		!commit_minimal_transition_state_legacy(dc, dc-&gt;current_state))</div><div class='del'>-				return false;</div><div class='del'>-</div><div class='del'>-	if (!update_planes_and_stream_state(</div><div class='del'>-			dc,</div><div class='del'>-			srf_updates,</div><div class='del'>-			surface_count,</div><div class='del'>-			stream,</div><div class='del'>-			stream_update,</div><div class='del'>-			&amp;update_type,</div><div class='del'>-			&amp;context))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* on plane removal, minimal state is the new one */</div><div class='del'>-	if (force_minimal_pipe_splitting &amp;&amp; !is_plane_addition) {</div><div class='del'>-		if (!commit_minimal_transition_state_legacy(dc, context)) {</div><div class='del'>-			dc_state_release(context);</div><div class='del'>-			return false;</div><div class='del'>-		}</div><div class='del'>-		update_type = UPDATE_TYPE_FULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dc-&gt;hwss.is_pipe_topology_transition_seamless &amp;&amp;</div><div class='del'>-			!dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='del'>-					dc, dc-&gt;current_state, context)) {</div><div class='del'>-		commit_minimal_transition_state(dc,</div><div class='del'>-				context, stream);</div><div class='del'>-	}</div><div class='del'>-	update_seamless_boot_flags(dc, context, surface_count, stream);</div><div class='del'>-	if (is_fast_update_only &amp;&amp; !dc-&gt;debug.enable_legacy_fast_update) {</div><div class='del'>-		commit_planes_for_stream_fast(dc,</div><div class='del'>-				srf_updates,</div><div class='del'>-				surface_count,</div><div class='del'>-				stream,</div><div class='del'>-				stream_update,</div><div class='del'>-				update_type,</div><div class='del'>-				context);</div><div class='del'>-	} else {</div><div class='del'>-		if (!stream_update &amp;&amp;</div><div class='del'>-				dc-&gt;hwss.is_pipe_topology_transition_seamless &amp;&amp;</div><div class='del'>-				!dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='del'>-						dc, dc-&gt;current_state, context)) {</div><div class='del'>-			DC_LOG_ERROR("performing non-seamless pipe topology transition with surface only update!\n");</div><div class='del'>-			BREAK_TO_DEBUGGER();</div><div class='del'>-		}</div><div class='del'>-		commit_planes_for_stream(</div><div class='del'>-				dc,</div><div class='del'>-				srf_updates,</div><div class='del'>-				surface_count,</div><div class='del'>-				stream,</div><div class='del'>-				stream_update,</div><div class='del'>-				update_type,</div><div class='del'>-				context);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dc-&gt;current_state != context) {</div><div class='del'>-</div><div class='del'>-		/* Since memory free requires elevated IRQL, an interrupt</div><div class='del'>-		 * request is generated by mem free. If this happens</div><div class='del'>-		 * between freeing and reassigning the context, our vsync</div><div class='del'>-		 * interrupt will call into dc and cause a memory</div><div class='del'>-		 * corruption BSOD. Hence, we first reassign the context,</div><div class='del'>-		 * then free the old context.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		struct dc_state *old = dc-&gt;current_state;</div><div class='del'>-</div><div class='del'>-		dc-&gt;current_state = context;</div><div class='del'>-		dc_state_release(old);</div><div class='del'>-</div><div class='del'>-		// clear any forced full updates</div><div class='del'>-		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='del'>-			struct pipe_ctx *pipe_ctx = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='del'>-</div><div class='del'>-			if (pipe_ctx-&gt;plane_state &amp;&amp; pipe_ctx-&gt;stream == stream)</div><div class='del'>-				pipe_ctx-&gt;plane_state-&gt;force_full_update = false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dc_commit_updates_for_stream(struct dc *dc,</div><div class='del'>-		struct dc_surface_update *srf_updates,</div><div class='del'>-		int surface_count,</div><div class='del'>-		struct dc_stream_state *stream,</div><div class='ctx'> 		struct dc_stream_update *stream_update,</div><div class='ctx'> 		struct dc_state *state)</div><div class='ctx'> {</div><div class='hunk'>@@ -4575,35 +4665,13 @@ void dc_commit_updates_for_stream(struct dc *dc,</div><div class='ctx'> 	update_type = dc_check_update_surfaces_for_stream(</div><div class='ctx'> 				dc, srf_updates, surface_count, stream_update, stream_status);</div><div class='ctx'> </div><div class='del'>-	/* TODO: Since change commit sequence can have a huge impact,</div><div class='del'>-	 * we decided to only enable it for DCN3x. However, as soon as</div><div class='del'>-	 * we get more confident about this change we'll need to enable</div><div class='del'>-	 * the new sequence for all ASICs.</div><div class='del'>-	 */</div><div class='del'>-	if (dc-&gt;ctx-&gt;dce_version &gt;= DCN_VERSION_3_2) {</div><div class='del'>-		/*</div><div class='del'>-		 * Previous frame finished and HW is ready for optimization.</div><div class='del'>-		 */</div><div class='del'>-		if (update_type == UPDATE_TYPE_FAST)</div><div class='del'>-			dc_post_update_surfaces_to_stream(dc);</div><div class='del'>-</div><div class='del'>-		dc_update_planes_and_stream(dc, srf_updates,</div><div class='del'>-					    surface_count, stream,</div><div class='del'>-					    stream_update);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (update_type &gt;= update_surface_trace_level)</div><div class='del'>-		update_surface_trace(dc, srf_updates, surface_count);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	if (update_type &gt;= UPDATE_TYPE_FULL) {</div><div class='ctx'> </div><div class='ctx'> 		/* initialize scratch memory for building context */</div><div class='ctx'> 		context = dc_state_create_copy(state);</div><div class='ctx'> 		if (context == NULL) {</div><div class='ctx'> 			DC_ERROR("Failed to allocate new validate context!\n");</div><div class='del'>-			return;</div><div class='add'>+			return false;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='hunk'>@@ -4620,7 +4688,6 @@ void dc_commit_updates_for_stream(struct dc *dc,</div><div class='ctx'> 		dc_post_update_surfaces_to_stream(dc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; surface_count; i++) {</div><div class='ctx'> 		struct dc_plane_state *surface = srf_updates[i].surface;</div><div class='ctx'> </div><div class='hunk'>@@ -4645,13 +4712,12 @@ void dc_commit_updates_for_stream(struct dc *dc,</div><div class='ctx'> 		if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false)) {</div><div class='ctx'> 			DC_ERROR("Mode validation failed for stream update!\n");</div><div class='ctx'> 			dc_state_release(context);</div><div class='del'>-			return;</div><div class='add'>+			return false;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	TRACE_DC_PIPE_STATE(pipe_ctx, i, MAX_PIPES);</div><div class='ctx'> </div><div class='del'>-	update_seamless_boot_flags(dc, context, surface_count, stream);</div><div class='ctx'> 	if (fast_update_only(dc, fast_update, srf_updates, surface_count, stream_update, stream) &amp;&amp;</div><div class='ctx'> 			!dc-&gt;debug.enable_legacy_fast_update) {</div><div class='ctx'> 		commit_planes_for_stream_fast(dc,</div><div class='hunk'>@@ -4692,9 +4758,252 @@ void dc_commit_updates_for_stream(struct dc *dc,</div><div class='ctx'> 		dc_post_update_surfaces_to_stream(dc);</div><div class='ctx'> 		TRACE_DCE_CLOCK_STATE(&amp;context-&gt;bw_ctx.bw.dce);</div><div class='ctx'> 	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool update_planes_and_stream_v2(struct dc *dc,</div><div class='add'>+		struct dc_surface_update *srf_updates, int surface_count,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_update *stream_update)</div><div class='add'>+{</div><div class='add'>+	struct dc_state *context;</div><div class='add'>+	enum surface_update_type update_type;</div><div class='add'>+	struct dc_fast_update fast_update[MAX_SURFACES] = {0};</div><div class='add'>+</div><div class='add'>+	/* In cases where MPO and split or ODM are used transitions can</div><div class='add'>+	 * cause underflow. Apply stream configuration with minimal pipe</div><div class='add'>+	 * split first to avoid unsupported transitions for active pipes.</div><div class='add'>+	 */</div><div class='add'>+	bool force_minimal_pipe_splitting = 0;</div><div class='add'>+	bool is_plane_addition = 0;</div><div class='add'>+	bool is_fast_update_only;</div><div class='add'>+</div><div class='add'>+	populate_fast_updates(fast_update, srf_updates, surface_count, stream_update);</div><div class='add'>+	is_fast_update_only = fast_update_only(dc, fast_update, srf_updates,</div><div class='add'>+			surface_count, stream_update, stream);</div><div class='add'>+	force_minimal_pipe_splitting = could_mpcc_tree_change_for_active_pipes(</div><div class='add'>+			dc,</div><div class='add'>+			stream,</div><div class='add'>+			srf_updates,</div><div class='add'>+			surface_count,</div><div class='add'>+			&amp;is_plane_addition);</div><div class='add'>+</div><div class='add'>+	/* on plane addition, minimal state is the current one */</div><div class='add'>+	if (force_minimal_pipe_splitting &amp;&amp; is_plane_addition &amp;&amp;</div><div class='add'>+		!commit_minimal_transition_state(dc, dc-&gt;current_state))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!update_planes_and_stream_state(</div><div class='add'>+			dc,</div><div class='add'>+			srf_updates,</div><div class='add'>+			surface_count,</div><div class='add'>+			stream,</div><div class='add'>+			stream_update,</div><div class='add'>+			&amp;update_type,</div><div class='add'>+			&amp;context))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* on plane removal, minimal state is the new one */</div><div class='add'>+	if (force_minimal_pipe_splitting &amp;&amp; !is_plane_addition) {</div><div class='add'>+		if (!commit_minimal_transition_state(dc, context)) {</div><div class='add'>+			dc_state_release(context);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+		update_type = UPDATE_TYPE_FULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	if (dc-&gt;hwss.is_pipe_topology_transition_seamless &amp;&amp;</div><div class='add'>+			!dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='add'>+					dc, dc-&gt;current_state, context))</div><div class='add'>+		commit_minimal_transition_state_in_dc_update(dc, context, stream,</div><div class='add'>+				srf_updates, surface_count);</div><div class='ctx'> </div><div class='add'>+	if (is_fast_update_only &amp;&amp; !dc-&gt;debug.enable_legacy_fast_update) {</div><div class='add'>+		commit_planes_for_stream_fast(dc,</div><div class='add'>+				srf_updates,</div><div class='add'>+				surface_count,</div><div class='add'>+				stream,</div><div class='add'>+				stream_update,</div><div class='add'>+				update_type,</div><div class='add'>+				context);</div><div class='add'>+	} else {</div><div class='add'>+		if (!stream_update &amp;&amp;</div><div class='add'>+				dc-&gt;hwss.is_pipe_topology_transition_seamless &amp;&amp;</div><div class='add'>+				!dc-&gt;hwss.is_pipe_topology_transition_seamless(</div><div class='add'>+						dc, dc-&gt;current_state, context)) {</div><div class='add'>+			DC_LOG_ERROR("performing non-seamless pipe topology transition with surface only update!\n");</div><div class='add'>+			BREAK_TO_DEBUGGER();</div><div class='add'>+		}</div><div class='add'>+		commit_planes_for_stream(</div><div class='add'>+				dc,</div><div class='add'>+				srf_updates,</div><div class='add'>+				surface_count,</div><div class='add'>+				stream,</div><div class='add'>+				stream_update,</div><div class='add'>+				update_type,</div><div class='add'>+				context);</div><div class='add'>+	}</div><div class='add'>+	if (dc-&gt;current_state != context)</div><div class='add'>+		swap_and_release_current_context(dc, context, stream);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void commit_planes_and_stream_update_on_current_context(struct dc *dc,</div><div class='add'>+		struct dc_surface_update *srf_updates, int surface_count,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_update *stream_update,</div><div class='add'>+		enum surface_update_type update_type)</div><div class='add'>+{</div><div class='add'>+	struct dc_fast_update fast_update[MAX_SURFACES] = {0};</div><div class='add'>+</div><div class='add'>+	ASSERT(update_type &lt; UPDATE_TYPE_FULL);</div><div class='add'>+	populate_fast_updates(fast_update, srf_updates, surface_count,</div><div class='add'>+			stream_update);</div><div class='add'>+	if (fast_update_only(dc, fast_update, srf_updates, surface_count,</div><div class='add'>+			stream_update, stream) &amp;&amp;</div><div class='add'>+			!dc-&gt;debug.enable_legacy_fast_update)</div><div class='add'>+		commit_planes_for_stream_fast(dc,</div><div class='add'>+				srf_updates,</div><div class='add'>+				surface_count,</div><div class='add'>+				stream,</div><div class='add'>+				stream_update,</div><div class='add'>+				update_type,</div><div class='add'>+				dc-&gt;current_state);</div><div class='add'>+	else</div><div class='add'>+		commit_planes_for_stream(</div><div class='add'>+				dc,</div><div class='add'>+				srf_updates,</div><div class='add'>+				surface_count,</div><div class='add'>+				stream,</div><div class='add'>+				stream_update,</div><div class='add'>+				update_type,</div><div class='add'>+				dc-&gt;current_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void commit_planes_and_stream_update_with_new_context(struct dc *dc,</div><div class='add'>+		struct dc_surface_update *srf_updates, int surface_count,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_update *stream_update,</div><div class='add'>+		enum surface_update_type update_type,</div><div class='add'>+		struct dc_state *new_context)</div><div class='add'>+{</div><div class='add'>+	ASSERT(update_type &gt;= UPDATE_TYPE_FULL);</div><div class='add'>+	if (!dc-&gt;hwss.is_pipe_topology_transition_seamless(dc,</div><div class='add'>+			dc-&gt;current_state, new_context))</div><div class='add'>+		/*</div><div class='add'>+		 * It is required by the feature design that all pipe topologies</div><div class='add'>+		 * using extra free pipes for power saving purposes such as</div><div class='add'>+		 * dynamic ODM or SubVp shall only be enabled when it can be</div><div class='add'>+		 * transitioned seamlessly to AND from its minimal transition</div><div class='add'>+		 * state. A minimal transition state is defined as the same dc</div><div class='add'>+		 * state but with all power saving features disabled. So it uses</div><div class='add'>+		 * the minimum pipe topology. When we can't seamlessly</div><div class='add'>+		 * transition from state A to state B, we will insert the</div><div class='add'>+		 * minimal transition state A' or B' in between so seamless</div><div class='add'>+		 * transition between A and B can be made possible.</div><div class='add'>+		 */</div><div class='add'>+		commit_minimal_transition_state_in_dc_update(dc, new_context,</div><div class='add'>+				stream, srf_updates, surface_count);</div><div class='add'>+</div><div class='add'>+	commit_planes_for_stream(</div><div class='add'>+			dc,</div><div class='add'>+			srf_updates,</div><div class='add'>+			surface_count,</div><div class='add'>+			stream,</div><div class='add'>+			stream_update,</div><div class='add'>+			update_type,</div><div class='add'>+			new_context);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool update_planes_and_stream_v3(struct dc *dc,</div><div class='add'>+		struct dc_surface_update *srf_updates, int surface_count,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_update *stream_update)</div><div class='add'>+{</div><div class='add'>+	struct dc_state *new_context;</div><div class='add'>+	enum surface_update_type update_type;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When this function returns true and new_context is not equal to</div><div class='add'>+	 * current state, the function allocates and validates a new dc state</div><div class='add'>+	 * and assigns it to new_context. The function expects that the caller</div><div class='add'>+	 * is responsible to free this memory when new_context is no longer</div><div class='add'>+	 * used. We swap current with new context and free current instead. So</div><div class='add'>+	 * new_context's memory will live until the next full update after it is</div><div class='add'>+	 * replaced by a newer context. Refer to the use of</div><div class='add'>+	 * swap_and_free_current_context below.</div><div class='add'>+	 */</div><div class='add'>+	if (!update_planes_and_stream_state(dc, srf_updates, surface_count,</div><div class='add'>+				stream, stream_update, &amp;update_type,</div><div class='add'>+				&amp;new_context))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (new_context == dc-&gt;current_state) {</div><div class='add'>+		commit_planes_and_stream_update_on_current_context(dc,</div><div class='add'>+				srf_updates, surface_count, stream,</div><div class='add'>+				stream_update, update_type);</div><div class='add'>+	} else {</div><div class='add'>+		commit_planes_and_stream_update_with_new_context(dc,</div><div class='add'>+				srf_updates, surface_count, stream,</div><div class='add'>+				stream_update, update_type, new_context);</div><div class='add'>+		swap_and_release_current_context(dc, new_context, stream);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_update_planes_and_stream(struct dc *dc,</div><div class='add'>+		struct dc_surface_update *srf_updates, int surface_count,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_update *stream_update)</div><div class='add'>+{</div><div class='add'>+	dc_exit_ips_for_hw_access(dc);</div><div class='add'>+	/*</div><div class='add'>+	 * update planes and stream version 3 separates FULL and FAST updates</div><div class='add'>+	 * to their own sequences. It aims to clean up frequent checks for</div><div class='add'>+	 * update type resulting unnecessary branching in logic flow. It also</div><div class='add'>+	 * adds a new commit minimal transition sequence, which detects the need</div><div class='add'>+	 * for minimal transition based on the actual comparison of current and</div><div class='add'>+	 * new states instead of "predicting" it based on per feature software</div><div class='add'>+	 * policy.i.e could_mpcc_tree_change_for_active_pipes. The new commit</div><div class='add'>+	 * minimal transition sequence is made universal to any power saving</div><div class='add'>+	 * features that would use extra free pipes such as Dynamic ODM/MPC</div><div class='add'>+	 * Combine, MPO or SubVp. Therefore there is no longer a need to</div><div class='add'>+	 * specially handle compatibility problems with transitions among those</div><div class='add'>+	 * features as they are now transparent to the new sequence.</div><div class='add'>+	 */</div><div class='add'>+	if (dc-&gt;ctx-&gt;dce_version &gt; DCN_VERSION_3_51)</div><div class='add'>+		return update_planes_and_stream_v3(dc, srf_updates,</div><div class='add'>+				surface_count, stream, stream_update);</div><div class='add'>+	return update_planes_and_stream_v2(dc, srf_updates,</div><div class='add'>+			surface_count, stream, stream_update);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dc_commit_updates_for_stream(struct dc *dc,</div><div class='add'>+		struct dc_surface_update *srf_updates,</div><div class='add'>+		int surface_count,</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_update *stream_update,</div><div class='add'>+		struct dc_state *state)</div><div class='add'>+{</div><div class='add'>+	dc_exit_ips_for_hw_access(dc);</div><div class='add'>+	/* TODO: Since change commit sequence can have a huge impact,</div><div class='add'>+	 * we decided to only enable it for DCN3x. However, as soon as</div><div class='add'>+	 * we get more confident about this change we'll need to enable</div><div class='add'>+	 * the new sequence for all ASICs.</div><div class='add'>+	 */</div><div class='add'>+	if (dc-&gt;ctx-&gt;dce_version &gt; DCN_VERSION_3_51) {</div><div class='add'>+		update_planes_and_stream_v3(dc, srf_updates, surface_count,</div><div class='add'>+				stream, stream_update);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (dc-&gt;ctx-&gt;dce_version &gt;= DCN_VERSION_3_2) {</div><div class='add'>+		update_planes_and_stream_v2(dc, srf_updates, surface_count,</div><div class='add'>+				stream, stream_update);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	update_planes_and_stream_v1(dc, srf_updates, surface_count, stream,</div><div class='add'>+			stream_update, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> uint8_t dc_get_current_stream_count(struct dc *dc)</div><div class='hunk'>@@ -4737,8 +5046,13 @@ void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src)</div><div class='ctx'> void dc_power_down_on_boot(struct dc *dc)</div><div class='ctx'> {</div><div class='ctx'> 	if (dc-&gt;ctx-&gt;dce_environment != DCE_ENV_VIRTUAL_HW &amp;&amp;</div><div class='del'>-			dc-&gt;hwss.power_down_on_boot)</div><div class='add'>+			dc-&gt;hwss.power_down_on_boot) {</div><div class='add'>+</div><div class='add'>+			if (dc-&gt;caps.ips_support)</div><div class='add'>+				dc_exit_ips_for_hw_access(dc);</div><div class='add'>+</div><div class='ctx'> 		dc-&gt;hwss.power_down_on_boot(dc);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dc_set_power_state(</div><div class='hunk'>@@ -4876,11 +5190,15 @@ bool dc_set_replay_allow_active(struct dc *dc, bool active)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dc_allow_idle_optimizations(struct dc *dc, bool allow)</div><div class='add'>+void dc_allow_idle_optimizations_internal(struct dc *dc, bool allow, char const *caller_name)</div><div class='ctx'> {</div><div class='ctx'> 	if (dc-&gt;debug.disable_idle_power_optimizations)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (allow != dc-&gt;idle_optimizations_allowed)</div><div class='add'>+		DC_LOG_IPS("%s: allow_idle old=%d new=%d (caller=%s)\n", __func__,</div><div class='add'>+			   dc-&gt;idle_optimizations_allowed, allow, caller_name);</div><div class='add'>+</div><div class='ctx'> 	if (dc-&gt;caps.ips_support &amp;&amp; (dc-&gt;config.disable_ips == DMUB_IPS_DISABLE_ALL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -4895,10 +5213,10 @@ void dc_allow_idle_optimizations(struct dc *dc, bool allow)</div><div class='ctx'> 		dc-&gt;idle_optimizations_allowed = allow;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dc_exit_ips_for_hw_access(struct dc *dc)</div><div class='add'>+void dc_exit_ips_for_hw_access_internal(struct dc *dc, const char *caller_name)</div><div class='ctx'> {</div><div class='ctx'> 	if (dc-&gt;caps.ips_support)</div><div class='del'>-		dc_allow_idle_optimizations(dc, false);</div><div class='add'>+		dc_allow_idle_optimizations_internal(dc, false, caller_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dc_dmub_is_ips_idle_state(struct dc *dc)</div><div class='hunk'>@@ -5032,10 +5350,13 @@ void dc_enable_dcmode_clk_limit(struct dc *dc, bool enable)</div><div class='ctx'> 	}</div><div class='ctx'> 	dc-&gt;clk_mgr-&gt;dc_mode_softmax_enabled = enable;</div><div class='ctx'> }</div><div class='del'>-bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_state *plane,</div><div class='add'>+bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc,</div><div class='add'>+		unsigned int pitch,</div><div class='add'>+		unsigned int height,</div><div class='add'>+		enum surface_pixel_format format,</div><div class='ctx'> 		struct dc_cursor_attributes *cursor_attr)</div><div class='ctx'> {</div><div class='del'>-	if (dc-&gt;hwss.does_plane_fit_in_mall &amp;&amp; dc-&gt;hwss.does_plane_fit_in_mall(dc, plane, cursor_attr))</div><div class='add'>+	if (dc-&gt;hwss.does_plane_fit_in_mall &amp;&amp; dc-&gt;hwss.does_plane_fit_in_mall(dc, pitch, height, format, cursor_attr))</div><div class='ctx'> 		return true;</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c<br/>index 9c05b1a07142..5c1d3017aefd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c</a></div><div class='hunk'>@@ -392,10 +392,10 @@ void get_hdr_visual_confirm_color(</div><div class='ctx'> </div><div class='ctx'> 	switch (top_pipe_ctx-&gt;plane_res.scl_data.format) {</div><div class='ctx'> 	case PIXEL_FORMAT_ARGB2101010:</div><div class='del'>-		if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_PQ) {</div><div class='add'>+		if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_PQ) {</div><div class='ctx'> 			/* HDR10, ARGB2101010 - set border color to red */</div><div class='ctx'> 			color-&gt;color_r_cr = color_value;</div><div class='del'>-		} else if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_GAMMA22) {</div><div class='add'>+		} else if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22) {</div><div class='ctx'> 			/* FreeSync 2 ARGB2101010 - set border color to pink */</div><div class='ctx'> 			color-&gt;color_r_cr = color_value;</div><div class='ctx'> 			color-&gt;color_b_cb = color_value;</div><div class='hunk'>@@ -403,10 +403,10 @@ void get_hdr_visual_confirm_color(</div><div class='ctx'> 			is_sdr = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PIXEL_FORMAT_FP16:</div><div class='del'>-		if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_PQ) {</div><div class='add'>+		if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_PQ) {</div><div class='ctx'> 			/* HDR10, FP16 - set border color to blue */</div><div class='ctx'> 			color-&gt;color_b_cb = color_value;</div><div class='del'>-		} else if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_GAMMA22) {</div><div class='add'>+		} else if (top_pipe_ctx-&gt;stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22) {</div><div class='ctx'> 			/* FreeSync 2 HDR - set border color to green */</div><div class='ctx'> 			color-&gt;color_g_y = color_value;</div><div class='ctx'> 		} else</div><div class='hunk'>@@ -558,9 +558,10 @@ void hwss_build_fast_sequence(struct dc *dc,</div><div class='ctx'> 		struct dc_dmub_cmd *dc_dmub_cmd,</div><div class='ctx'> 		unsigned int dmub_cmd_count,</div><div class='ctx'> 		struct block_sequence block_sequence[],</div><div class='del'>-		int *num_steps,</div><div class='add'>+		unsigned int *num_steps,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='del'>-		struct dc_stream_status *stream_status)</div><div class='add'>+		struct dc_stream_status *stream_status,</div><div class='add'>+		struct dc_state *context)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_plane_state *plane = pipe_ctx-&gt;plane_state;</div><div class='ctx'> 	struct dc_stream_state *stream = pipe_ctx-&gt;stream;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c<br/>index ec4bf9432bdb..15819416a2f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc_resource.c</a></div><div class='hunk'>@@ -340,7 +340,7 @@ struct resource_pool *dc_create_resource_pool(struct dc  *dc,</div><div class='ctx'> 	return res_pool;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dc_destroy_resource_pool(struct dc  *dc)</div><div class='add'>+void dc_destroy_resource_pool(struct dc *dc)</div><div class='ctx'> {</div><div class='ctx'> 	if (dc) {</div><div class='ctx'> 		if (dc-&gt;res_pool)</div><div class='hunk'>@@ -1457,6 +1457,9 @@ void resource_build_test_pattern_params(struct resource_context *res_ctx,</div><div class='ctx'> 	controller_color_space = convert_dp_to_controller_color_space(</div><div class='ctx'> 			otg_master-&gt;stream-&gt;test_pattern.color_space);</div><div class='ctx'> </div><div class='add'>+	if (controller_test_pattern == CONTROLLER_DP_TEST_PATTERN_VIDEOMODE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	odm_cnt = resource_get_opp_heads_for_otg_master(otg_master, res_ctx, opp_heads);</div><div class='ctx'> </div><div class='ctx'> 	odm_slice_width = h_active / odm_cnt;</div><div class='hunk'>@@ -1485,6 +1488,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	struct dc_crtc_timing *timing = &amp;pipe_ctx-&gt;stream-&gt;timing;</div><div class='ctx'> 	const struct rect odm_slice_rec = calculate_odm_slice_in_timing_active(pipe_ctx);</div><div class='ctx'> 	bool res = false;</div><div class='add'>+</div><div class='ctx'> 	DC_LOGGER_INIT(pipe_ctx-&gt;stream-&gt;ctx-&gt;logger);</div><div class='ctx'> </div><div class='ctx'> 	/* Invalid input */</div><div class='hunk'>@@ -1496,9 +1500,6 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pipe_ctx-&gt;plane_res.scl_data.format = convert_pixel_format_to_dalsurface(</div><div class='del'>-			pipe_ctx-&gt;plane_state-&gt;format);</div><div class='del'>-</div><div class='ctx'> 	/* Timing borders are part of vactive that we are also supposed to skip in addition</div><div class='ctx'> 	 * to any stream dst offset. Since dm logic assumes dst is in addressable</div><div class='ctx'> 	 * space we need to add the left and top borders to dst offsets temporarily.</div><div class='hunk'>@@ -1510,6 +1511,8 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	/* Calculate H and V active size */</div><div class='ctx'> 	pipe_ctx-&gt;plane_res.scl_data.h_active = odm_slice_rec.width;</div><div class='ctx'> 	pipe_ctx-&gt;plane_res.scl_data.v_active = odm_slice_rec.height;</div><div class='add'>+	pipe_ctx-&gt;plane_res.scl_data.format = convert_pixel_format_to_dalsurface(</div><div class='add'>+			pipe_ctx-&gt;plane_state-&gt;format);</div><div class='ctx'> </div><div class='ctx'> 	/* depends on h_active */</div><div class='ctx'> 	calculate_recout(pipe_ctx);</div><div class='hunk'>@@ -1794,6 +1797,30 @@ int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx(</div><div class='ctx'> 	return free_pipe_idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int resource_find_free_pipe_used_as_cur_sec_dpp(</div><div class='add'>+		const struct resource_context *cur_res_ctx,</div><div class='add'>+		struct resource_context *new_res_ctx,</div><div class='add'>+		const struct resource_pool *pool)</div><div class='add'>+{</div><div class='add'>+	int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND;</div><div class='add'>+	const struct pipe_ctx *new_pipe, *cur_pipe;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pool-&gt;pipe_count; i++) {</div><div class='add'>+		cur_pipe = &amp;cur_res_ctx-&gt;pipe_ctx[i];</div><div class='add'>+		new_pipe = &amp;new_res_ctx-&gt;pipe_ctx[i];</div><div class='add'>+</div><div class='add'>+		if (resource_is_pipe_type(cur_pipe, DPP_PIPE) &amp;&amp;</div><div class='add'>+				!resource_is_pipe_type(cur_pipe, OPP_HEAD) &amp;&amp;</div><div class='add'>+				resource_is_pipe_type(new_pipe, FREE_PIPE)) {</div><div class='add'>+			free_pipe_idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return free_pipe_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine(</div><div class='ctx'> 		const struct resource_context *cur_res_ctx,</div><div class='ctx'> 		struct resource_context *new_res_ctx,</div><div class='hunk'>@@ -2168,50 +2195,91 @@ static void resource_log_pipe(struct dc *dc, struct pipe_ctx *pipe,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state)</div><div class='add'>+static void resource_log_pipe_for_stream(struct dc *dc, struct dc_state *state,</div><div class='add'>+		struct pipe_ctx *otg_master, int stream_idx)</div><div class='ctx'> {</div><div class='del'>-	struct pipe_ctx *otg_master;</div><div class='ctx'> 	struct pipe_ctx *opp_heads[MAX_PIPES];</div><div class='ctx'> 	struct pipe_ctx *dpp_pipes[MAX_PIPES];</div><div class='ctx'> </div><div class='del'>-	int stream_idx, slice_idx, dpp_idx, plane_idx, slice_count, dpp_count;</div><div class='add'>+	int slice_idx, dpp_idx, plane_idx, slice_count, dpp_count;</div><div class='ctx'> 	bool is_primary;</div><div class='ctx'> 	DC_LOGGER_INIT(dc-&gt;ctx-&gt;logger);</div><div class='ctx'> </div><div class='add'>+	slice_count = resource_get_opp_heads_for_otg_master(otg_master,</div><div class='add'>+			&amp;state-&gt;res_ctx, opp_heads);</div><div class='add'>+	for (slice_idx = 0; slice_idx &lt; slice_count; slice_idx++) {</div><div class='add'>+		plane_idx = -1;</div><div class='add'>+		if (opp_heads[slice_idx]-&gt;plane_state) {</div><div class='add'>+			dpp_count = resource_get_dpp_pipes_for_opp_head(</div><div class='add'>+					opp_heads[slice_idx],</div><div class='add'>+					&amp;state-&gt;res_ctx,</div><div class='add'>+					dpp_pipes);</div><div class='add'>+			for (dpp_idx = 0; dpp_idx &lt; dpp_count; dpp_idx++) {</div><div class='add'>+				is_primary = !dpp_pipes[dpp_idx]-&gt;top_pipe ||</div><div class='add'>+						dpp_pipes[dpp_idx]-&gt;top_pipe-&gt;plane_state != dpp_pipes[dpp_idx]-&gt;plane_state;</div><div class='add'>+				if (is_primary)</div><div class='add'>+					plane_idx++;</div><div class='add'>+				resource_log_pipe(dc, dpp_pipes[dpp_idx],</div><div class='add'>+						stream_idx, slice_idx,</div><div class='add'>+						plane_idx, slice_count,</div><div class='add'>+						is_primary);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			resource_log_pipe(dc, opp_heads[slice_idx],</div><div class='add'>+					stream_idx, slice_idx, plane_idx,</div><div class='add'>+					slice_count, true);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int resource_stream_to_stream_idx(struct dc_state *state,</div><div class='add'>+		struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	int i, stream_idx = -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++)</div><div class='add'>+		if (state-&gt;streams[i] == stream) {</div><div class='add'>+			stream_idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	/* never return negative array index */</div><div class='add'>+	if (stream_idx == -1) {</div><div class='add'>+		ASSERT(0);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return stream_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state)</div><div class='add'>+{</div><div class='add'>+	struct pipe_ctx *otg_master;</div><div class='add'>+	int stream_idx, phantom_stream_idx;</div><div class='add'>+	DC_LOGGER_INIT(dc-&gt;ctx-&gt;logger);</div><div class='add'>+</div><div class='ctx'> 	DC_LOG_DC("    pipe topology update");</div><div class='ctx'> 	DC_LOG_DC("  ________________________");</div><div class='ctx'> 	for (stream_idx = 0; stream_idx &lt; state-&gt;stream_count; stream_idx++) {</div><div class='add'>+		if (state-&gt;streams[stream_idx]-&gt;is_phantom)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		otg_master = resource_get_otg_master_for_stream(</div><div class='ctx'> 				&amp;state-&gt;res_ctx, state-&gt;streams[stream_idx]);</div><div class='del'>-		if (!otg_master	|| otg_master-&gt;stream_res.tg == NULL) {</div><div class='del'>-			DC_LOG_DC("topology update: otg_master NULL stream_idx %d!\n", stream_idx);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		slice_count = resource_get_opp_heads_for_otg_master(otg_master,</div><div class='del'>-				&amp;state-&gt;res_ctx, opp_heads);</div><div class='del'>-		for (slice_idx = 0; slice_idx &lt; slice_count; slice_idx++) {</div><div class='del'>-			plane_idx = -1;</div><div class='del'>-			if (opp_heads[slice_idx]-&gt;plane_state) {</div><div class='del'>-				dpp_count = resource_get_dpp_pipes_for_opp_head(</div><div class='del'>-						opp_heads[slice_idx],</div><div class='del'>-						&amp;state-&gt;res_ctx,</div><div class='del'>-						dpp_pipes);</div><div class='del'>-				for (dpp_idx = 0; dpp_idx &lt; dpp_count; dpp_idx++) {</div><div class='del'>-					is_primary = !dpp_pipes[dpp_idx]-&gt;top_pipe ||</div><div class='del'>-							dpp_pipes[dpp_idx]-&gt;top_pipe-&gt;plane_state != dpp_pipes[dpp_idx]-&gt;plane_state;</div><div class='del'>-					if (is_primary)</div><div class='del'>-						plane_idx++;</div><div class='del'>-					resource_log_pipe(dc, dpp_pipes[dpp_idx],</div><div class='del'>-							stream_idx, slice_idx,</div><div class='del'>-							plane_idx, slice_count,</div><div class='del'>-							is_primary);</div><div class='del'>-				}</div><div class='del'>-			} else {</div><div class='del'>-				resource_log_pipe(dc, opp_heads[slice_idx],</div><div class='del'>-						stream_idx, slice_idx, plane_idx,</div><div class='del'>-						slice_count, true);</div><div class='del'>-			}</div><div class='add'>+		resource_log_pipe_for_stream(dc, state, otg_master, stream_idx);</div><div class='add'>+	}</div><div class='add'>+	if (state-&gt;phantom_stream_count &gt; 0) {</div><div class='add'>+		DC_LOG_DC(" |    (phantom pipes)     |");</div><div class='add'>+		for (stream_idx = 0; stream_idx &lt; state-&gt;stream_count; stream_idx++) {</div><div class='add'>+			if (state-&gt;stream_status[stream_idx].mall_stream_config.type != SUBVP_MAIN)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='add'>+			phantom_stream_idx = resource_stream_to_stream_idx(state,</div><div class='add'>+					state-&gt;stream_status[stream_idx].mall_stream_config.paired_stream);</div><div class='add'>+			otg_master = resource_get_otg_master_for_stream(</div><div class='add'>+					&amp;state-&gt;res_ctx, state-&gt;streams[phantom_stream_idx]);</div><div class='add'>+			resource_log_pipe_for_stream(dc, state, otg_master, stream_idx);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	DC_LOG_DC(" |________________________|\n");</div><div class='hunk'>@@ -2266,6 +2334,9 @@ static bool update_pipe_params_after_odm_slice_count_change(</div><div class='ctx'> </div><div class='ctx'> 	if (pool-&gt;funcs-&gt;build_pipe_pix_clk_params)</div><div class='ctx'> 		pool-&gt;funcs-&gt;build_pipe_pix_clk_params(otg_master);</div><div class='add'>+</div><div class='add'>+	resource_build_test_pattern_params(&amp;context-&gt;res_ctx, otg_master);</div><div class='add'>+</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2624,13 +2695,19 @@ bool resource_append_dpp_pipes_for_plane_composition(</div><div class='ctx'> 		struct pipe_ctx *otg_master_pipe,</div><div class='ctx'> 		struct dc_plane_state *plane_state)</div><div class='ctx'> {</div><div class='add'>+	bool success;</div><div class='ctx'> 	if (otg_master_pipe-&gt;plane_state == NULL)</div><div class='del'>-		return add_plane_to_opp_head_pipes(otg_master_pipe,</div><div class='add'>+		success = add_plane_to_opp_head_pipes(otg_master_pipe,</div><div class='ctx'> 				plane_state, new_ctx);</div><div class='ctx'> 	else</div><div class='del'>-		return acquire_secondary_dpp_pipes_and_add_plane(</div><div class='add'>+		success = acquire_secondary_dpp_pipes_and_add_plane(</div><div class='ctx'> 				otg_master_pipe, plane_state, new_ctx,</div><div class='ctx'> 				cur_ctx, pool);</div><div class='add'>+	if (success)</div><div class='add'>+		/* when appending a plane mpc slice count changes from 0 to 1 */</div><div class='add'>+		success = update_pipe_params_after_mpc_slice_count_change(</div><div class='add'>+				plane_state, new_ctx, pool);</div><div class='add'>+	return success;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void resource_remove_dpp_pipes_for_plane_composition(</div><div class='hunk'>@@ -2965,7 +3042,7 @@ bool resource_update_pipes_for_plane_with_slice_count(</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int dpp_pipe_count;</div><div class='ctx'> 	int cur_slice_count;</div><div class='del'>-	struct pipe_ctx *dpp_pipes[MAX_PIPES];</div><div class='add'>+	struct pipe_ctx *dpp_pipes[MAX_PIPES] = {0};</div><div class='ctx'> 	bool result = true;</div><div class='ctx'> </div><div class='ctx'> 	dpp_pipe_count = resource_get_dpp_pipes_for_plane(plane,</div><div class='hunk'>@@ -3117,6 +3194,9 @@ static struct audio *find_first_free_audio(</div><div class='ctx'> {</div><div class='ctx'> 	int i, available_audio_count;</div><div class='ctx'> </div><div class='add'>+	if (id == ENGINE_ID_UNKNOWN)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='ctx'> 	available_audio_count = pool-&gt;audio_count;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; available_audio_count; i++) {</div><div class='hunk'>@@ -3371,11 +3451,31 @@ static bool acquire_otg_master_pipe_for_stream(</div><div class='ctx'> 	 * any free pipes already used in current context as this could tear</div><div class='ctx'> 	 * down exiting ODM/MPC/MPO configuration unnecessarily.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Try to acquire the same OTG master already in use. This is not</div><div class='add'>+	 * optimal because resetting an enabled OTG master pipe for a new stream</div><div class='add'>+	 * requires an extra frame of wait. However there are test automation</div><div class='add'>+	 * and eDP assumptions that rely on reusing the same OTG master pipe</div><div class='add'>+	 * during mode change. We have to keep this logic as is for now.</div><div class='add'>+	 */</div><div class='ctx'> 	pipe_idx = recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx(</div><div class='ctx'> 			&amp;cur_ctx-&gt;res_ctx, &amp;new_ctx-&gt;res_ctx, pool);</div><div class='add'>+	/*</div><div class='add'>+	 * Try to acquire a pipe not used in current resource context to avoid</div><div class='add'>+	 * pipe swapping.</div><div class='add'>+	 */</div><div class='ctx'> 	if (pipe_idx == FREE_PIPE_INDEX_NOT_FOUND)</div><div class='ctx'> 		pipe_idx = recource_find_free_pipe_not_used_in_cur_res_ctx(</div><div class='ctx'> 				&amp;cur_ctx-&gt;res_ctx, &amp;new_ctx-&gt;res_ctx, pool);</div><div class='add'>+	/*</div><div class='add'>+	 * If pipe swapping is unavoidable, try to acquire pipe used as</div><div class='add'>+	 * secondary DPP pipe in current state as we prioritize to support more</div><div class='add'>+	 * streams over supporting MPO planes.</div><div class='add'>+	 */</div><div class='add'>+	if (pipe_idx == FREE_PIPE_INDEX_NOT_FOUND)</div><div class='add'>+		pipe_idx = resource_find_free_pipe_used_as_cur_sec_dpp(</div><div class='add'>+				&amp;cur_ctx-&gt;res_ctx, &amp;new_ctx-&gt;res_ctx, pool);</div><div class='ctx'> 	if (pipe_idx == FREE_PIPE_INDEX_NOT_FOUND)</div><div class='ctx'> 		pipe_idx = resource_find_any_free_pipe(&amp;new_ctx-&gt;res_ctx, pool);</div><div class='ctx'> 	if (pipe_idx != FREE_PIPE_INDEX_NOT_FOUND) {</div><div class='hunk'>@@ -3990,7 +4090,7 @@ static void set_avi_info_frame(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pixel_encoding &amp;&amp; color_space == COLOR_SPACE_2020_YCBCR &amp;&amp;</div><div class='del'>-			stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_GAMMA22) {</div><div class='add'>+			stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22) {</div><div class='ctx'> 		hdmi_info.bits.EC0_EC2 = 0;</div><div class='ctx'> 		hdmi_info.bits.C0_C1 = COLORIMETRY_ITU709;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4992,3 +5092,39 @@ bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_st</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options)</div><div class='add'>+{</div><div class='add'>+	dml2_options-&gt;callbacks.dc = dc;</div><div class='add'>+	dml2_options-&gt;callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='add'>+	dml2_options-&gt;callbacks.build_test_pattern_params = &amp;resource_build_test_pattern_params;</div><div class='add'>+	dml2_options-&gt;callbacks.acquire_secondary_pipe_for_mpc_odm = &amp;dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;</div><div class='add'>+	dml2_options-&gt;callbacks.update_pipes_for_stream_with_slice_count = &amp;resource_update_pipes_for_stream_with_slice_count;</div><div class='add'>+	dml2_options-&gt;callbacks.update_pipes_for_plane_with_slice_count = &amp;resource_update_pipes_for_plane_with_slice_count;</div><div class='add'>+	dml2_options-&gt;callbacks.get_mpc_slice_index = &amp;resource_get_mpc_slice_index;</div><div class='add'>+	dml2_options-&gt;callbacks.get_mpc_slice_count = &amp;resource_get_mpc_slice_count;</div><div class='add'>+	dml2_options-&gt;callbacks.get_odm_slice_index = &amp;resource_get_odm_slice_index;</div><div class='add'>+	dml2_options-&gt;callbacks.get_odm_slice_count = &amp;resource_get_odm_slice_count;</div><div class='add'>+	dml2_options-&gt;callbacks.get_opp_head = &amp;resource_get_opp_head;</div><div class='add'>+	dml2_options-&gt;callbacks.get_otg_master_for_stream = &amp;resource_get_otg_master_for_stream;</div><div class='add'>+	dml2_options-&gt;callbacks.get_opp_heads_for_otg_master = &amp;resource_get_opp_heads_for_otg_master;</div><div class='add'>+	dml2_options-&gt;callbacks.get_dpp_pipes_for_plane = &amp;resource_get_dpp_pipes_for_plane;</div><div class='add'>+	dml2_options-&gt;callbacks.get_stream_status = &amp;dc_state_get_stream_status;</div><div class='add'>+	dml2_options-&gt;callbacks.get_stream_from_id = &amp;dc_state_get_stream_from_id;</div><div class='add'>+</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.dc = dc;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.add_phantom_plane = &amp;dc_state_add_phantom_plane;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.add_phantom_stream = &amp;dc_state_add_phantom_stream;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.create_phantom_plane = &amp;dc_state_create_phantom_plane;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.remove_phantom_plane = &amp;dc_state_remove_phantom_plane;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.remove_phantom_stream = &amp;dc_state_remove_phantom_stream;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.create_phantom_stream = &amp;dc_state_create_phantom_stream;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.release_phantom_plane = &amp;dc_state_release_phantom_plane;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.release_phantom_stream = &amp;dc_state_release_phantom_stream;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.get_pipe_subvp_type = &amp;dc_state_get_pipe_subvp_type;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.get_stream_subvp_type = &amp;dc_state_get_stream_subvp_type;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.get_paired_subvp_stream = &amp;dc_state_get_paired_subvp_stream;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.remove_phantom_streams_and_planes = &amp;dc_state_remove_phantom_streams_and_planes;</div><div class='add'>+	dml2_options-&gt;svp_pstate.callbacks.release_phantom_streams_and_planes = &amp;dc_state_release_phantom_streams_and_planes;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stat.c b/drivers/gpu/drm/amd/display/dc/core/dc_stat.c<br/>index 5f6392ae31a6..cd6570a1e20e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_stat.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_stat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_stat.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc_stat.c</a></div><div class='hunk'>@@ -61,7 +61,7 @@ void dc_stat_get_dmub_notification(const struct dc *dc, struct dmub_notification</div><div class='ctx'> 	/* For HPD/HPD RX, convert dpia port index into link index */</div><div class='ctx'> 	if (notify-&gt;type == DMUB_NOTIFICATION_HPD ||</div><div class='ctx'> 	    notify-&gt;type == DMUB_NOTIFICATION_HPD_IRQ ||</div><div class='del'>-		notify-&gt;type == DMUB_NOTIFICATION_DPIA_NOTIFICATION ||</div><div class='add'>+	    notify-&gt;type == DMUB_NOTIFICATION_DPIA_NOTIFICATION ||</div><div class='ctx'> 	    notify-&gt;type == DMUB_NOTIFICATION_SET_CONFIG_REPLY) {</div><div class='ctx'> 		notify-&gt;link_index =</div><div class='ctx'> 			get_link_index_from_dpia_port_index(dc, notify-&gt;link_index);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c b/drivers/gpu/drm/amd/display/dc/core/dc_state.c<br/>index 61986e5cb491..76bb05f4d6bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_state.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_state.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_state.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc_state.c</a></div><div class='hunk'>@@ -188,8 +188,11 @@ static void init_state(struct dc *dc, struct dc_state *state)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Public dc_state functions */</div><div class='del'>-struct dc_state *dc_state_create(struct dc *dc)</div><div class='add'>+struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_DRM_AMD_DC_FP</div><div class='add'>+	struct dml2_configuration_options *dml2_opt = &amp;dc-&gt;dml2_options;</div><div class='add'>+#endif</div><div class='ctx'> 	struct dc_state *state = kvzalloc(sizeof(struct dc_state),</div><div class='ctx'> 			GFP_KERNEL);</div><div class='ctx'> </div><div class='hunk'>@@ -198,10 +201,16 @@ struct dc_state *dc_state_create(struct dc *dc)</div><div class='ctx'> </div><div class='ctx'> 	init_state(dc, state);</div><div class='ctx'> 	dc_state_construct(dc, state);</div><div class='add'>+	state-&gt;power_source = params ? params-&gt;power_source : DC_POWER_SOURCE_AC;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DRM_AMD_DC_FP</div><div class='del'>-	if (dc-&gt;debug.using_dml2)</div><div class='del'>-		dml2_create(dc, &amp;dc-&gt;dml2_options, &amp;state-&gt;bw_ctx.dml2);</div><div class='add'>+	if (dc-&gt;debug.using_dml2) {</div><div class='add'>+		dml2_opt-&gt;use_clock_dc_limits = false;</div><div class='add'>+		dml2_create(dc, dml2_opt, &amp;state-&gt;bw_ctx.dml2);</div><div class='add'>+</div><div class='add'>+		dml2_opt-&gt;use_clock_dc_limits = true;</div><div class='add'>+		dml2_create(dc, dml2_opt, &amp;state-&gt;bw_ctx.dml2_dc_power_source);</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	kref_init(&amp;state-&gt;refcount);</div><div class='hunk'>@@ -214,6 +223,7 @@ void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state)</div><div class='ctx'> 	struct kref refcount = dst_state-&gt;refcount;</div><div class='ctx'> #ifdef CONFIG_DRM_AMD_DC_FP</div><div class='ctx'> 	struct dml2_context *dst_dml2 = dst_state-&gt;bw_ctx.dml2;</div><div class='add'>+	struct dml2_context *dst_dml2_dc_power_source = dst_state-&gt;bw_ctx.dml2_dc_power_source;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	dc_state_copy_internal(dst_state, src_state);</div><div class='hunk'>@@ -222,6 +232,10 @@ void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state)</div><div class='ctx'> 	dst_state-&gt;bw_ctx.dml2 = dst_dml2;</div><div class='ctx'> 	if (src_state-&gt;bw_ctx.dml2)</div><div class='ctx'> 		dml2_copy(dst_state-&gt;bw_ctx.dml2, src_state-&gt;bw_ctx.dml2);</div><div class='add'>+</div><div class='add'>+	dst_state-&gt;bw_ctx.dml2_dc_power_source = dst_dml2_dc_power_source;</div><div class='add'>+	if (src_state-&gt;bw_ctx.dml2_dc_power_source)</div><div class='add'>+		dml2_copy(dst_state-&gt;bw_ctx.dml2_dc_power_source, src_state-&gt;bw_ctx.dml2_dc_power_source);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* context refcount should not be overridden */</div><div class='hunk'>@@ -245,6 +259,12 @@ struct dc_state *dc_state_create_copy(struct dc_state *src_state)</div><div class='ctx'> 		dc_state_release(new_state);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (src_state-&gt;bw_ctx.dml2_dc_power_source &amp;&amp;</div><div class='add'>+			!dml2_create_copy(&amp;new_state-&gt;bw_ctx.dml2_dc_power_source, src_state-&gt;bw_ctx.dml2_dc_power_source)) {</div><div class='add'>+		dc_state_release(new_state);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	kref_init(&amp;new_state-&gt;refcount);</div><div class='hunk'>@@ -310,7 +330,6 @@ void dc_state_destruct(struct dc_state *state)</div><div class='ctx'> 	memset(state-&gt;dc_dmub_cmd, 0, sizeof(state-&gt;dc_dmub_cmd));</div><div class='ctx'> 	state-&gt;dmub_cmd_count = 0;</div><div class='ctx'> 	memset(&amp;state-&gt;perf_params, 0, sizeof(state-&gt;perf_params));</div><div class='del'>-	memset(&amp;state-&gt;scratch, 0, sizeof(state-&gt;scratch));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dc_state_retain(struct dc_state *state)</div><div class='hunk'>@@ -327,6 +346,9 @@ static void dc_state_free(struct kref *kref)</div><div class='ctx'> #ifdef CONFIG_DRM_AMD_DC_FP</div><div class='ctx'> 	dml2_destroy(state-&gt;bw_ctx.dml2);</div><div class='ctx'> 	state-&gt;bw_ctx.dml2 = 0;</div><div class='add'>+</div><div class='add'>+	dml2_destroy(state-&gt;bw_ctx.dml2_dc_power_source);</div><div class='add'>+	state-&gt;bw_ctx.dml2_dc_power_source = 0;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	kvfree(state);</div><div class='hunk'>@@ -341,7 +363,7 @@ void dc_state_release(struct dc_state *state)</div><div class='ctx'>  * dc_state_add_stream() - Add a new dc_stream_state to a dc_state.</div><div class='ctx'>  */</div><div class='ctx'> enum dc_status dc_state_add_stream(</div><div class='del'>-		struct dc *dc,</div><div class='add'>+		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *stream)</div><div class='ctx'> {</div><div class='hunk'>@@ -370,7 +392,7 @@ enum dc_status dc_state_add_stream(</div><div class='ctx'>  * dc_state_remove_stream() - Remove a stream from a dc_state.</div><div class='ctx'>  */</div><div class='ctx'> enum dc_status dc_state_remove_stream(</div><div class='del'>-		struct dc *dc,</div><div class='add'>+		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *stream)</div><div class='ctx'> {</div><div class='hunk'>@@ -595,7 +617,7 @@ bool dc_state_add_all_planes_for_stream(</div><div class='ctx'>  */</div><div class='ctx'> struct dc_stream_status *dc_state_get_stream_status(</div><div class='ctx'> 		struct dc_state *state,</div><div class='del'>-		struct dc_stream_state *stream)</div><div class='add'>+		const struct dc_stream_state *stream)</div><div class='ctx'> {</div><div class='ctx'> 	uint8_t i;</div><div class='ctx'> </div><div class='hunk'>@@ -689,7 +711,7 @@ void dc_state_release_phantom_stream(const struct dc *dc,</div><div class='ctx'> 	dc_stream_release(phantom_stream);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct dc_plane_state *dc_state_create_phantom_plane(struct dc *dc,</div><div class='add'>+struct dc_plane_state *dc_state_create_phantom_plane(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_plane_state *main_plane)</div><div class='ctx'> {</div><div class='hunk'>@@ -725,7 +747,7 @@ void dc_state_release_phantom_plane(const struct dc *dc,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* add phantom streams to context and generate correct meta inside dc_state */</div><div class='del'>-enum dc_status dc_state_add_phantom_stream(struct dc *dc,</div><div class='add'>+enum dc_status dc_state_add_phantom_stream(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *phantom_stream,</div><div class='ctx'> 		struct dc_stream_state *main_stream)</div><div class='hunk'>@@ -751,7 +773,7 @@ enum dc_status dc_state_add_phantom_stream(struct dc *dc,</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum dc_status dc_state_remove_phantom_stream(struct dc *dc,</div><div class='add'>+enum dc_status dc_state_remove_phantom_stream(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *phantom_stream)</div><div class='ctx'> {</div><div class='hunk'>@@ -845,7 +867,7 @@ bool dc_state_add_all_phantom_planes_for_stream(</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dc_state_remove_phantom_streams_and_planes(</div><div class='del'>-	struct dc *dc,</div><div class='add'>+	const struct dc *dc,</div><div class='ctx'> 	struct dc_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -867,7 +889,7 @@ bool dc_state_remove_phantom_streams_and_planes(</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dc_state_release_phantom_streams_and_planes(</div><div class='del'>-		struct dc *dc,</div><div class='add'>+		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -878,3 +900,19 @@ void dc_state_release_phantom_streams_and_planes(</div><div class='ctx'> 	for (i = 0; i &lt; state-&gt;phantom_plane_count; i++)</div><div class='ctx'> 		dc_state_release_phantom_plane(dc, state, state-&gt;phantom_planes[i]);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id)</div><div class='add'>+{</div><div class='add'>+	struct dc_stream_state *stream = NULL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++) {</div><div class='add'>+		if (state-&gt;streams[i] &amp;&amp; state-&gt;streams[i]-&gt;stream_id == id) {</div><div class='add'>+			stream = state-&gt;streams[i];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return stream;</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c<br/>index 51a970fcb5d0..5c7e4884cac2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_stream.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_stream.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_stream.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc_stream.c</a></div><div class='hunk'>@@ -116,12 +116,7 @@ bool dc_stream_construct(struct dc_stream_state *stream,</div><div class='ctx'> </div><div class='ctx'> 	update_stream_signal(stream, dc_sink_data);</div><div class='ctx'> </div><div class='del'>-	stream-&gt;out_transfer_func = dc_create_transfer_func();</div><div class='del'>-	if (stream-&gt;out_transfer_func == NULL) {</div><div class='del'>-		dc_sink_release(dc_sink_data);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-	stream-&gt;out_transfer_func-&gt;type = TF_TYPE_BYPASS;</div><div class='add'>+	stream-&gt;out_transfer_func.type = TF_TYPE_BYPASS;</div><div class='ctx'> </div><div class='ctx'> 	dc_stream_assign_stream_id(stream);</div><div class='ctx'> </div><div class='hunk'>@@ -131,10 +126,6 @@ bool dc_stream_construct(struct dc_stream_state *stream,</div><div class='ctx'> void dc_stream_destruct(struct dc_stream_state *stream)</div><div class='ctx'> {</div><div class='ctx'> 	dc_sink_release(stream-&gt;sink);</div><div class='del'>-	if (stream-&gt;out_transfer_func != NULL) {</div><div class='del'>-		dc_transfer_func_release(stream-&gt;out_transfer_func);</div><div class='del'>-		stream-&gt;out_transfer_func = NULL;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dc_stream_assign_stream_id(struct dc_stream_state *stream)</div><div class='hunk'>@@ -201,9 +192,6 @@ struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)</div><div class='ctx'> 	if (new_stream-&gt;sink)</div><div class='ctx'> 		dc_sink_retain(new_stream-&gt;sink);</div><div class='ctx'> </div><div class='del'>-	if (new_stream-&gt;out_transfer_func)</div><div class='del'>-		dc_transfer_func_retain(new_stream-&gt;out_transfer_func);</div><div class='del'>-</div><div class='ctx'> 	dc_stream_assign_stream_id(new_stream);</div><div class='ctx'> </div><div class='ctx'> 	/* If using dynamic encoder assignment, wait till stream committed to assign encoder. */</div><div class='hunk'>@@ -319,7 +307,7 @@ bool dc_stream_set_cursor_attributes(</div><div class='ctx'> 	program_cursor_attributes(dc, stream, attributes);</div><div class='ctx'> </div><div class='ctx'> 	/* re-enable idle optimizations if necessary */</div><div class='del'>-	if (reset_idle_optimizations)</div><div class='add'>+	if (reset_idle_optimizations &amp;&amp; !dc-&gt;debug.disable_dmub_reallow_idle)</div><div class='ctx'> 		dc_allow_idle_optimizations(dc, true);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -394,7 +382,7 @@ bool dc_stream_set_cursor_position(</div><div class='ctx'> </div><div class='ctx'> 	program_cursor_position(dc, stream, position);</div><div class='ctx'> 	/* re-enable idle optimizations if necessary */</div><div class='del'>-	if (reset_idle_optimizations)</div><div class='add'>+	if (reset_idle_optimizations &amp;&amp; !dc-&gt;debug.disable_dmub_reallow_idle)</div><div class='ctx'> 		dc_allow_idle_optimizations(dc, true);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -425,7 +413,7 @@ bool dc_stream_add_writeback(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	dc_exit_ips_for_hw_access(dc);</div><div class='ctx'> </div><div class='del'>-	wb_info-&gt;dwb_params.out_transfer_func = stream-&gt;out_transfer_func;</div><div class='add'>+	wb_info-&gt;dwb_params.out_transfer_func = &amp;stream-&gt;out_transfer_func;</div><div class='ctx'> </div><div class='ctx'> 	dwb = dc-&gt;res_pool-&gt;dwbc[wb_info-&gt;dwb_pipe_inst];</div><div class='ctx'> 	dwb-&gt;dwb_is_drc = false;</div><div class='hunk'>@@ -507,7 +495,7 @@ bool dc_stream_remove_writeback(struct dc *dc,</div><div class='ctx'> 		struct dc_stream_state *stream,</div><div class='ctx'> 		uint32_t dwb_pipe_inst)</div><div class='ctx'> {</div><div class='del'>-	int i = 0, j = 0;</div><div class='add'>+	unsigned int i, j;</div><div class='ctx'> 	if (stream == NULL) {</div><div class='ctx'> 		dm_error("DC: dc_stream is NULL!\n");</div><div class='ctx'> 		return false;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c<br/>index 19140fb65787..067f6555cfdf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_surface.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/core/dc_surface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_surface.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/core/dc_surface.c</a></div><div class='hunk'>@@ -41,25 +41,15 @@ void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_sta</div><div class='ctx'> {</div><div class='ctx'> 	plane_state-&gt;ctx = ctx;</div><div class='ctx'> </div><div class='del'>-	plane_state-&gt;gamma_correction = dc_create_gamma();</div><div class='del'>-	if (plane_state-&gt;gamma_correction != NULL)</div><div class='del'>-		plane_state-&gt;gamma_correction-&gt;is_identity = true;</div><div class='add'>+	plane_state-&gt;gamma_correction.is_identity = true;</div><div class='ctx'> </div><div class='del'>-	plane_state-&gt;in_transfer_func = dc_create_transfer_func();</div><div class='del'>-	if (plane_state-&gt;in_transfer_func != NULL) {</div><div class='del'>-		plane_state-&gt;in_transfer_func-&gt;type = TF_TYPE_BYPASS;</div><div class='del'>-	}</div><div class='del'>-	plane_state-&gt;in_shaper_func = dc_create_transfer_func();</div><div class='del'>-	if (plane_state-&gt;in_shaper_func != NULL) {</div><div class='del'>-		plane_state-&gt;in_shaper_func-&gt;type = TF_TYPE_BYPASS;</div><div class='del'>-	}</div><div class='add'>+	plane_state-&gt;in_transfer_func.type = TF_TYPE_BYPASS;</div><div class='ctx'> </div><div class='del'>-	plane_state-&gt;lut3d_func = dc_create_3dlut_func();</div><div class='add'>+	plane_state-&gt;in_shaper_func.type = TF_TYPE_BYPASS;</div><div class='ctx'> </div><div class='del'>-	plane_state-&gt;blend_tf = dc_create_transfer_func();</div><div class='del'>-	if (plane_state-&gt;blend_tf != NULL) {</div><div class='del'>-		plane_state-&gt;blend_tf-&gt;type = TF_TYPE_BYPASS;</div><div class='del'>-	}</div><div class='add'>+	plane_state-&gt;lut3d_func.state.raw = 0;</div><div class='add'>+</div><div class='add'>+	plane_state-&gt;blend_tf.type = TF_TYPE_BYPASS;</div><div class='ctx'> </div><div class='ctx'> 	plane_state-&gt;pre_multiplied_alpha = true;</div><div class='ctx'> </div><div class='hunk'>@@ -67,30 +57,27 @@ void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_sta</div><div class='ctx'> </div><div class='ctx'> void dc_plane_destruct(struct dc_plane_state *plane_state)</div><div class='ctx'> {</div><div class='del'>-	if (plane_state-&gt;gamma_correction != NULL) {</div><div class='del'>-		dc_gamma_release(&amp;plane_state-&gt;gamma_correction);</div><div class='del'>-	}</div><div class='del'>-	if (plane_state-&gt;in_transfer_func != NULL) {</div><div class='del'>-		dc_transfer_func_release(</div><div class='del'>-				plane_state-&gt;in_transfer_func);</div><div class='del'>-		plane_state-&gt;in_transfer_func = NULL;</div><div class='del'>-	}</div><div class='del'>-	if (plane_state-&gt;in_shaper_func != NULL) {</div><div class='del'>-		dc_transfer_func_release(</div><div class='del'>-				plane_state-&gt;in_shaper_func);</div><div class='del'>-		plane_state-&gt;in_shaper_func = NULL;</div><div class='del'>-	}</div><div class='del'>-	if (plane_state-&gt;lut3d_func != NULL) {</div><div class='del'>-		dc_3dlut_func_release(</div><div class='del'>-				plane_state-&gt;lut3d_func);</div><div class='del'>-		plane_state-&gt;lut3d_func = NULL;</div><div class='del'>-	}</div><div class='del'>-	if (plane_state-&gt;blend_tf != NULL) {</div><div class='del'>-		dc_transfer_func_release(</div><div class='del'>-				plane_state-&gt;blend_tf);</div><div class='del'>-		plane_state-&gt;blend_tf = NULL;</div><div class='add'>+	// no more pointers to free within dc_plane_state</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* dc_state is passed in separately since it may differ from the current dc state accessible from plane_state e.g.</div><div class='add'>+ * if the driver is doing an update from an old context to a new one and the caller wants the pipe mask for the new</div><div class='add'>+ * context rather than the existing one</div><div class='add'>+ */</div><div class='add'>+uint8_t  dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state)</div><div class='add'>+{</div><div class='add'>+	uint8_t pipe_mask = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; plane_state-&gt;ctx-&gt;dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+		struct pipe_ctx *pipe_ctx = &amp;dc_state-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+</div><div class='add'>+		if (pipe_ctx-&gt;plane_state == plane_state &amp;&amp; pipe_ctx-&gt;plane_res.hubp)</div><div class='add'>+			pipe_mask |= 1 &lt;&lt; pipe_ctx-&gt;plane_res.hubp-&gt;inst;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return pipe_mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*******************************************************************************</div><div class='hunk'>@@ -103,7 +90,7 @@ void enable_surface_flip_reporting(struct dc_plane_state *plane_state,</div><div class='ctx'> 	/*register_flip_interrupt(surface);*/</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct dc_plane_state *dc_create_plane_state(struct dc *dc)</div><div class='add'>+struct dc_plane_state *dc_create_plane_state(const struct dc *dc)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state),</div><div class='ctx'> 							GFP_KERNEL);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h<br/>index ee8453bf958f..3c33c3bcbe2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc.h</a></div><div class='hunk'>@@ -44,6 +44,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "dml2/dml2_wrapper.h"</div><div class='ctx'> </div><div class='add'>+#include "dmub/inc/dmub_cmd.h"</div><div class='add'>+</div><div class='ctx'> struct abm_save_restore;</div><div class='ctx'> </div><div class='ctx'> /* forward declaration */</div><div class='hunk'>@@ -51,7 +53,7 @@ struct aux_payload;</div><div class='ctx'> struct set_config_cmd_payload;</div><div class='ctx'> struct dmub_notification;</div><div class='ctx'> </div><div class='del'>-#define DC_VER "3.2.273"</div><div class='add'>+#define DC_VER "3.2.281"</div><div class='ctx'> </div><div class='ctx'> #define MAX_SURFACES 3</div><div class='ctx'> #define MAX_PLANES 6</div><div class='hunk'>@@ -219,6 +221,7 @@ struct dc_dmub_caps {</div><div class='ctx'> 	bool mclk_sw;</div><div class='ctx'> 	bool subvp_psr;</div><div class='ctx'> 	bool gecc_enable;</div><div class='add'>+	uint8_t fams_ver;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dc_caps {</div><div class='hunk'>@@ -306,12 +309,12 @@ struct dc_dcc_setting {</div><div class='ctx'> 	unsigned int max_compressed_blk_size;</div><div class='ctx'> 	unsigned int max_uncompressed_blk_size;</div><div class='ctx'> 	bool independent_64b_blks;</div><div class='del'>-	//These bitfields to be used starting with DCN</div><div class='add'>+	//These bitfields to be used starting with DCN 3.0</div><div class='ctx'> 	struct {</div><div class='del'>-		uint32_t dcc_256_64_64 : 1;//available in ASICs before DCN (the worst compression case)</div><div class='del'>-		uint32_t dcc_128_128_uncontrained : 1;  //available in ASICs before DCN</div><div class='del'>-		uint32_t dcc_256_128_128 : 1;		//available starting with DCN</div><div class='del'>-		uint32_t dcc_256_256_unconstrained : 1;  //available in ASICs before DCN (the best compression case)</div><div class='add'>+		uint32_t dcc_256_64_64 : 1;//available in ASICs before DCN 3.0 (the worst compression case)</div><div class='add'>+		uint32_t dcc_128_128_uncontrained : 1;  //available in ASICs before DCN 3.0</div><div class='add'>+		uint32_t dcc_256_128_128 : 1;		//available starting with DCN 3.0</div><div class='add'>+		uint32_t dcc_256_256_unconstrained : 1;  //available in ASICs before DCN 3.0 (the best compression case)</div><div class='ctx'> 	} dcc_controls;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -435,6 +438,9 @@ struct dc_config {</div><div class='ctx'> 	unsigned int disable_ips;</div><div class='ctx'> 	unsigned int disable_ips_in_vpb;</div><div class='ctx'> 	bool usb4_bw_alloc_support;</div><div class='add'>+	bool allow_0_dtb_clk;</div><div class='add'>+	bool use_assr_psp_message;</div><div class='add'>+	bool support_edp0_on_dp1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum visual_confirm {</div><div class='hunk'>@@ -693,6 +699,8 @@ enum pg_hw_pipe_resources {</div><div class='ctx'> 	PG_MPCC,</div><div class='ctx'> 	PG_OPP,</div><div class='ctx'> 	PG_OPTC,</div><div class='add'>+	PG_DPSTREAM,</div><div class='add'>+	PG_HDMISTREAM,</div><div class='ctx'> 	PG_HW_PIPE_RESOURCES_NUM_ELEMENT</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -987,14 +995,17 @@ struct dc_debug_options {</div><div class='ctx'> 	bool psp_disabled_wa;</div><div class='ctx'> 	unsigned int ips2_eval_delay_us;</div><div class='ctx'> 	unsigned int ips2_entry_delay_us;</div><div class='add'>+	bool optimize_ips_handshake;</div><div class='ctx'> 	bool disable_dmub_reallow_idle;</div><div class='ctx'> 	bool disable_timeout;</div><div class='ctx'> 	bool disable_extblankadj;</div><div class='add'>+	bool enable_idle_reg_checks;</div><div class='ctx'> 	unsigned int static_screen_wait_frames;</div><div class='ctx'> 	bool force_chroma_subsampling_1tap;</div><div class='add'>+	bool disable_422_left_edge_pixel;</div><div class='add'>+	unsigned int force_cositing;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct gpu_info_soc_bounding_box_v1_0;</div><div class='ctx'> </div><div class='ctx'> /* Generic structure that can be used to query properties of DC. More fields</div><div class='ctx'>  * can be added as required.</div><div class='hunk'>@@ -1003,76 +1014,6 @@ struct dc_current_properties {</div><div class='ctx'> 	unsigned int cursor_size_limit;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct dc {</div><div class='del'>-	struct dc_debug_options debug;</div><div class='del'>-	struct dc_versions versions;</div><div class='del'>-	struct dc_caps caps;</div><div class='del'>-	struct dc_cap_funcs cap_funcs;</div><div class='del'>-	struct dc_config config;</div><div class='del'>-	struct dc_bounding_box_overrides bb_overrides;</div><div class='del'>-	struct dc_bug_wa work_arounds;</div><div class='del'>-	struct dc_context *ctx;</div><div class='del'>-	struct dc_phy_addr_space_config vm_pa_config;</div><div class='del'>-</div><div class='del'>-	uint8_t link_count;</div><div class='del'>-	struct dc_link *links[MAX_PIPES * 2];</div><div class='del'>-	struct link_service *link_srv;</div><div class='del'>-</div><div class='del'>-	struct dc_state *current_state;</div><div class='del'>-	struct resource_pool *res_pool;</div><div class='del'>-</div><div class='del'>-	struct clk_mgr *clk_mgr;</div><div class='del'>-</div><div class='del'>-	/* Display Engine Clock levels */</div><div class='del'>-	struct dm_pp_clock_levels sclk_lvls;</div><div class='del'>-</div><div class='del'>-	/* Inputs into BW and WM calculations. */</div><div class='del'>-	struct bw_calcs_dceip *bw_dceip;</div><div class='del'>-	struct bw_calcs_vbios *bw_vbios;</div><div class='del'>-	struct dcn_soc_bounding_box *dcn_soc;</div><div class='del'>-	struct dcn_ip_params *dcn_ip;</div><div class='del'>-	struct display_mode_lib dml;</div><div class='del'>-</div><div class='del'>-	/* HW functions */</div><div class='del'>-	struct hw_sequencer_funcs hwss;</div><div class='del'>-	struct dce_hwseq *hwseq;</div><div class='del'>-</div><div class='del'>-	/* Require to optimize clocks and bandwidth for added/removed planes */</div><div class='del'>-	bool optimized_required;</div><div class='del'>-	bool wm_optimized_required;</div><div class='del'>-	bool idle_optimizations_allowed;</div><div class='del'>-	bool enable_c20_dtm_b0;</div><div class='del'>-</div><div class='del'>-	/* Require to maintain clocks and bandwidth for UEFI enabled HW */</div><div class='del'>-</div><div class='del'>-	/* FBC compressor */</div><div class='del'>-	struct compressor *fbc_compressor;</div><div class='del'>-</div><div class='del'>-	struct dc_debug_data debug_data;</div><div class='del'>-	struct dpcd_vendor_signature vendor_signature;</div><div class='del'>-</div><div class='del'>-	const char *build_id;</div><div class='del'>-	struct vm_helper *vm_helper;</div><div class='del'>-</div><div class='del'>-	uint32_t *dcn_reg_offsets;</div><div class='del'>-	uint32_t *nbio_reg_offsets;</div><div class='del'>-	uint32_t *clk_reg_offsets;</div><div class='del'>-</div><div class='del'>-	/* Scratch memory */</div><div class='del'>-	struct {</div><div class='del'>-		struct {</div><div class='del'>-			/*</div><div class='del'>-			 * For matching clock_limits table in driver with table</div><div class='del'>-			 * from PMFW.</div><div class='del'>-			 */</div><div class='del'>-			struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];</div><div class='del'>-		} update_bw_bounding_box;</div><div class='del'>-	} scratch;</div><div class='del'>-</div><div class='del'>-	struct dml2_configuration_options dml2_options;</div><div class='del'>-	enum dc_acpi_cm_power_state power_state;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum frame_buffer_mode {</div><div class='ctx'> 	FRAME_BUFFER_MODE_LOCAL_ONLY = 0,</div><div class='ctx'> 	FRAME_BUFFER_MODE_ZFB_ONLY,</div><div class='hunk'>@@ -1277,6 +1218,8 @@ union surface_update_flags {</div><div class='ctx'> 	uint32_t raw;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define DC_REMOVE_PLANE_POINTERS 1</div><div class='add'>+</div><div class='ctx'> struct dc_plane_state {</div><div class='ctx'> 	struct dc_plane_address address;</div><div class='ctx'> 	struct dc_plane_flip_time time;</div><div class='hunk'>@@ -1291,8 +1234,8 @@ struct dc_plane_state {</div><div class='ctx'> </div><div class='ctx'> 	struct dc_plane_dcc_param dcc;</div><div class='ctx'> </div><div class='del'>-	struct dc_gamma *gamma_correction;</div><div class='del'>-	struct dc_transfer_func *in_transfer_func;</div><div class='add'>+	struct dc_gamma gamma_correction;</div><div class='add'>+	struct dc_transfer_func in_transfer_func;</div><div class='ctx'> 	struct dc_bias_and_scale *bias_and_scale;</div><div class='ctx'> 	struct dc_csc_transform input_csc_color_matrix;</div><div class='ctx'> 	struct fixed31_32 coeff_reduction_factor;</div><div class='hunk'>@@ -1304,9 +1247,9 @@ struct dc_plane_state {</div><div class='ctx'> </div><div class='ctx'> 	enum dc_color_space color_space;</div><div class='ctx'> </div><div class='del'>-	struct dc_3dlut *lut3d_func;</div><div class='del'>-	struct dc_transfer_func *in_shaper_func;</div><div class='del'>-	struct dc_transfer_func *blend_tf;</div><div class='add'>+	struct dc_3dlut lut3d_func;</div><div class='add'>+	struct dc_transfer_func in_shaper_func;</div><div class='add'>+	struct dc_transfer_func blend_tf;</div><div class='ctx'> </div><div class='ctx'> 	struct dc_transfer_func *gamcor_tf;</div><div class='ctx'> 	enum surface_pixel_format format;</div><div class='hunk'>@@ -1342,6 +1285,7 @@ struct dc_plane_state {</div><div class='ctx'> 	struct tg_color visual_confirm_color;</div><div class='ctx'> </div><div class='ctx'> 	bool is_statically_allocated;</div><div class='add'>+	enum chroma_cositing cositing;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dc_plane_info {</div><div class='hunk'>@@ -1360,6 +1304,96 @@ struct dc_plane_info {</div><div class='ctx'> 	int  global_alpha_value;</div><div class='ctx'> 	bool input_csc_enabled;</div><div class='ctx'> 	int layer_index;</div><div class='add'>+	enum chroma_cositing cositing;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "dc_stream.h"</div><div class='add'>+</div><div class='add'>+struct dc_scratch_space {</div><div class='add'>+	/* used to temporarily backup plane states of a stream during</div><div class='add'>+	 * dc update. The reason is that plane states are overwritten</div><div class='add'>+	 * with surface updates in dc update. Once they are overwritten</div><div class='add'>+	 * current state is no longer valid. We want to temporarily</div><div class='add'>+	 * store current value in plane states so we can still recover</div><div class='add'>+	 * a valid current state during dc update.</div><div class='add'>+	 */</div><div class='add'>+	struct dc_plane_state plane_states[MAX_SURFACE_NUM];</div><div class='add'>+</div><div class='add'>+	struct dc_stream_state stream_state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dc {</div><div class='add'>+	struct dc_debug_options debug;</div><div class='add'>+	struct dc_versions versions;</div><div class='add'>+	struct dc_caps caps;</div><div class='add'>+	struct dc_cap_funcs cap_funcs;</div><div class='add'>+	struct dc_config config;</div><div class='add'>+	struct dc_bounding_box_overrides bb_overrides;</div><div class='add'>+	struct dc_bug_wa work_arounds;</div><div class='add'>+	struct dc_context *ctx;</div><div class='add'>+	struct dc_phy_addr_space_config vm_pa_config;</div><div class='add'>+</div><div class='add'>+	uint8_t link_count;</div><div class='add'>+	struct dc_link *links[MAX_LINKS];</div><div class='add'>+	struct link_service *link_srv;</div><div class='add'>+</div><div class='add'>+	struct dc_state *current_state;</div><div class='add'>+	struct resource_pool *res_pool;</div><div class='add'>+</div><div class='add'>+	struct clk_mgr *clk_mgr;</div><div class='add'>+</div><div class='add'>+	/* Display Engine Clock levels */</div><div class='add'>+	struct dm_pp_clock_levels sclk_lvls;</div><div class='add'>+</div><div class='add'>+	/* Inputs into BW and WM calculations. */</div><div class='add'>+	struct bw_calcs_dceip *bw_dceip;</div><div class='add'>+	struct bw_calcs_vbios *bw_vbios;</div><div class='add'>+	struct dcn_soc_bounding_box *dcn_soc;</div><div class='add'>+	struct dcn_ip_params *dcn_ip;</div><div class='add'>+	struct display_mode_lib dml;</div><div class='add'>+</div><div class='add'>+	/* HW functions */</div><div class='add'>+	struct hw_sequencer_funcs hwss;</div><div class='add'>+	struct dce_hwseq *hwseq;</div><div class='add'>+</div><div class='add'>+	/* Require to optimize clocks and bandwidth for added/removed planes */</div><div class='add'>+	bool optimized_required;</div><div class='add'>+	bool wm_optimized_required;</div><div class='add'>+	bool idle_optimizations_allowed;</div><div class='add'>+	bool enable_c20_dtm_b0;</div><div class='add'>+</div><div class='add'>+	/* Require to maintain clocks and bandwidth for UEFI enabled HW */</div><div class='add'>+</div><div class='add'>+	/* FBC compressor */</div><div class='add'>+	struct compressor *fbc_compressor;</div><div class='add'>+</div><div class='add'>+	struct dc_debug_data debug_data;</div><div class='add'>+	struct dpcd_vendor_signature vendor_signature;</div><div class='add'>+</div><div class='add'>+	const char *build_id;</div><div class='add'>+	struct vm_helper *vm_helper;</div><div class='add'>+</div><div class='add'>+	uint32_t *dcn_reg_offsets;</div><div class='add'>+	uint32_t *nbio_reg_offsets;</div><div class='add'>+	uint32_t *clk_reg_offsets;</div><div class='add'>+</div><div class='add'>+	/* Scratch memory */</div><div class='add'>+	struct {</div><div class='add'>+		struct {</div><div class='add'>+			/*</div><div class='add'>+			 * For matching clock_limits table in driver with table</div><div class='add'>+			 * from PMFW.</div><div class='add'>+			 */</div><div class='add'>+			struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];</div><div class='add'>+		} update_bw_bounding_box;</div><div class='add'>+		struct dc_scratch_space current_state;</div><div class='add'>+		struct dc_scratch_space new_state;</div><div class='add'>+		struct dc_stream_state temp_stream; // Used so we don't need to allocate stream on the stack</div><div class='add'>+	} scratch;</div><div class='add'>+</div><div class='add'>+	struct dml2_configuration_options dml2_options;</div><div class='add'>+	enum dc_acpi_cm_power_state power_state;</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dc_scaling_info {</div><div class='hunk'>@@ -1476,10 +1510,15 @@ bool dc_acquire_release_mpc_3dlut(</div><div class='ctx'> bool dc_resource_is_dsc_encoding_supported(const struct dc *dc);</div><div class='ctx'> void get_audio_check(struct audio_info *aud_modes,</div><div class='ctx'> 	struct audio_check *aud_chk);</div><div class='del'>-</div><div class='del'>-enum dc_status dc_commit_streams(struct dc *dc,</div><div class='del'>-				 struct dc_stream_state *streams[],</div><div class='del'>-				 uint8_t stream_count);</div><div class='add'>+/*</div><div class='add'>+ * Set up streams and links associated to drive sinks</div><div class='add'>+ * The streams parameter is an absolute set of all active streams.</div><div class='add'>+ *</div><div class='add'>+ * After this call:</div><div class='add'>+ *   Phy, Encoder, Timing Generator are programmed and enabled.</div><div class='add'>+ *   New streams are enabled with blank stream; no memory read.</div><div class='add'>+ */</div><div class='add'>+enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params *params);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> struct dc_plane_state *dc_get_surface_for_mpcc(struct dc *dc,</div><div class='hunk'>@@ -2335,11 +2374,17 @@ bool dc_is_dmcu_initialized(struct dc *dc);</div><div class='ctx'> enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping);</div><div class='ctx'> void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg);</div><div class='ctx'> </div><div class='del'>-bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_state *plane,</div><div class='del'>-				struct dc_cursor_attributes *cursor_attr);</div><div class='add'>+bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc,</div><div class='add'>+		unsigned int pitch,</div><div class='add'>+		unsigned int height,</div><div class='add'>+		enum surface_pixel_format format,</div><div class='add'>+		struct dc_cursor_attributes *cursor_attr);</div><div class='add'>+</div><div class='add'>+#define dc_allow_idle_optimizations(dc, allow) dc_allow_idle_optimizations_internal(dc, allow, __func__)</div><div class='add'>+#define dc_exit_ips_for_hw_access(dc) dc_exit_ips_for_hw_access_internal(dc, __func__)</div><div class='ctx'> </div><div class='del'>-void dc_allow_idle_optimizations(struct dc *dc, bool allow);</div><div class='del'>-void dc_exit_ips_for_hw_access(struct dc *dc);</div><div class='add'>+void dc_allow_idle_optimizations_internal(struct dc *dc, bool allow, const char *caller_name);</div><div class='add'>+void dc_exit_ips_for_hw_access_internal(struct dc *dc, const char *caller_name);</div><div class='ctx'> bool dc_dmub_is_ips_idle_state(struct dc *dc);</div><div class='ctx'> </div><div class='ctx'> /* set min and max memory clock to lowest and highest DPM level, respectively */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c<br/>index 6083b1dcf050..2293a92df3be 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "dm_services.h"</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "dc_dmub_srv.h"</div><div class='ctx'> #include "../dmub/dmub_srv.h"</div><div class='hunk'>@@ -34,6 +35,7 @@</div><div class='ctx'> #include "resource.h"</div><div class='ctx'> #include "clk_mgr.h"</div><div class='ctx'> #include "dc_state_priv.h"</div><div class='add'>+#include "dc_plane_priv.h"</div><div class='ctx'> </div><div class='ctx'> #define CTX dc_dmub_srv-&gt;ctx</div><div class='ctx'> #define DC_LOGGER CTX-&gt;logger</div><div class='hunk'>@@ -198,6 +200,11 @@ bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> </div><div class='ctx'> 		if (status != DMUB_STATUS_OK) {</div><div class='ctx'> 			DC_LOG_DEBUG("No reply for DMUB command: status=%d\n", status);</div><div class='add'>+			if (!dmub-&gt;debug.timeout_occured) {</div><div class='add'>+				dmub-&gt;debug.timeout_occured = true;</div><div class='add'>+				dmub-&gt;debug.timeout_cmd = *cmd_list;</div><div class='add'>+				dmub-&gt;debug.timestamp = dm_get_timestamp(dc_dmub_srv-&gt;ctx);</div><div class='add'>+			}</div><div class='ctx'> 			dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='ctx'> 			return false;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -904,12 +911,15 @@ bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv, struct dmu</div><div class='ctx'> void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmub_diagnostic_data diag_data = {0};</div><div class='add'>+	uint32_t i;</div><div class='ctx'> </div><div class='ctx'> 	if (!dc_dmub_srv || !dc_dmub_srv-&gt;dmub) {</div><div class='ctx'> 		DC_LOG_ERROR("%s: invalid parameters.", __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	DC_LOG_ERROR("%s: DMCUB error - collecting diagnostic data\n", __func__);</div><div class='add'>+</div><div class='ctx'> 	if (!dc_dmub_srv_get_diagnostic_data(dc_dmub_srv, &amp;diag_data)) {</div><div class='ctx'> 		DC_LOG_ERROR("%s: dc_dmub_srv_get_diagnostic_data failed.", __func__);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -933,7 +943,8 @@ void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv)</div><div class='ctx'> 	DC_LOG_DEBUG("    scratch [13]       : %08x", diag_data.scratch[13]);</div><div class='ctx'> 	DC_LOG_DEBUG("    scratch [14]       : %08x", diag_data.scratch[14]);</div><div class='ctx'> 	DC_LOG_DEBUG("    scratch [15]       : %08x", diag_data.scratch[15]);</div><div class='del'>-	DC_LOG_DEBUG("    pc                 : %08x", diag_data.pc);</div><div class='add'>+	for (i = 0; i &lt; DMUB_PC_SNAPSHOT_COUNT; i++)</div><div class='add'>+		DC_LOG_DEBUG("    pc[%d]             : %08x", i, diag_data.pc[i]);</div><div class='ctx'> 	DC_LOG_DEBUG("    unk_fault_addr     : %08x", diag_data.undefined_address_fault_addr);</div><div class='ctx'> 	DC_LOG_DEBUG("    inst_fault_addr    : %08x", diag_data.inst_fetch_fault_addr);</div><div class='ctx'> 	DC_LOG_DEBUG("    data_fault_addr    : %08x", diag_data.data_write_fault_addr);</div><div class='hunk'>@@ -1199,8 +1210,23 @@ bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int count_active_streams(const struct dc *dc)</div><div class='add'>+{</div><div class='add'>+	int i, count = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; ++i) {</div><div class='add'>+		struct dc_stream_state *stream = dc-&gt;current_state-&gt;streams[i];</div><div class='add'>+</div><div class='add'>+		if (stream &amp;&amp; !stream-&gt;dpms_off)</div><div class='add'>+			count += 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)</div><div class='ctx'> {</div><div class='add'>+	volatile const struct dmub_shared_state_ips_fw *ips_fw;</div><div class='ctx'> 	struct dc_dmub_srv *dc_dmub_srv;</div><div class='ctx'> 	union dmub_rb_cmd cmd = {0};</div><div class='ctx'> </div><div class='hunk'>@@ -1211,6 +1237,7 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	dc_dmub_srv = dc-&gt;ctx-&gt;dmub_srv;</div><div class='add'>+	ips_fw = &amp;dc_dmub_srv-&gt;dmub-&gt;shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='ctx'> 	cmd.idle_opt_notify_idle.header.type = DMUB_CMD__IDLE_OPT;</div><div class='hunk'>@@ -1226,6 +1253,12 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)</div><div class='ctx'> 			&amp;dc_dmub_srv-&gt;dmub-&gt;shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_DRIVER].data.ips_driver;</div><div class='ctx'> 		union dmub_shared_state_ips_driver_signals new_signals;</div><div class='ctx'> </div><div class='add'>+		DC_LOG_IPS(</div><div class='add'>+			"%s wait idle (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+			__func__,</div><div class='add'>+			ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+			ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 		dc_dmub_srv_wait_idle(dc-&gt;ctx-&gt;dmub_srv);</div><div class='ctx'> </div><div class='ctx'> 		memset(&amp;new_signals, 0, sizeof(new_signals));</div><div class='hunk'>@@ -1245,19 +1278,46 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)</div><div class='ctx'> 			new_signals.bits.allow_pg = 1;</div><div class='ctx'> 			new_signals.bits.allow_ips1 = 1;</div><div class='ctx'> 			new_signals.bits.allow_ips2 = 1;</div><div class='add'>+		} else if (dc-&gt;config.disable_ips == DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF) {</div><div class='add'>+			/* TODO: Move this logic out to hwseq */</div><div class='add'>+			if (count_active_streams(dc) == 0) {</div><div class='add'>+				/* IPS2 - Display off */</div><div class='add'>+				new_signals.bits.allow_pg = 1;</div><div class='add'>+				new_signals.bits.allow_ips1 = 1;</div><div class='add'>+				new_signals.bits.allow_ips2 = 1;</div><div class='add'>+				new_signals.bits.allow_z10 = 1;</div><div class='add'>+			} else {</div><div class='add'>+				/* RCG only */</div><div class='add'>+				new_signals.bits.allow_pg = 0;</div><div class='add'>+				new_signals.bits.allow_ips1 = 1;</div><div class='add'>+				new_signals.bits.allow_ips2 = 0;</div><div class='add'>+				new_signals.bits.allow_z10 = 0;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ips_driver-&gt;signals = new_signals;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	DC_LOG_IPS(</div><div class='add'>+		"%s send allow_idle=%d (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+		__func__,</div><div class='add'>+		allow_idle,</div><div class='add'>+		ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+		ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 	/* NOTE: This does not use the "wake" interface since this is part of the wake path. */</div><div class='ctx'> 	/* We also do not perform a wait since DMCUB could enter idle after the notification. */</div><div class='ctx'> 	dm_execute_dmub_cmd(dc-&gt;ctx, &amp;cmd, allow_idle ? DM_DMUB_WAIT_TYPE_NO_WAIT : DM_DMUB_WAIT_TYPE_WAIT);</div><div class='add'>+</div><div class='add'>+	/* Register access should stop at this point. */</div><div class='add'>+	if (allow_idle)</div><div class='add'>+		dc_dmub_srv-&gt;needs_idle_wake = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_dmub_srv *dc_dmub_srv;</div><div class='add'>+	uint32_t rcg_exit_count = 0, ips1_exit_count = 0, ips2_exit_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;debug.dmcub_emulation)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1274,40 +1334,113 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)</div><div class='ctx'> 			&amp;dc_dmub_srv-&gt;dmub-&gt;shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_DRIVER].data.ips_driver;</div><div class='ctx'> 		union dmub_shared_state_ips_driver_signals prev_driver_signals = ips_driver-&gt;signals;</div><div class='ctx'> </div><div class='add'>+		rcg_exit_count = ips_fw-&gt;rcg_exit_count;</div><div class='add'>+		ips1_exit_count = ips_fw-&gt;ips1_exit_count;</div><div class='add'>+		ips2_exit_count = ips_fw-&gt;ips2_exit_count;</div><div class='add'>+</div><div class='ctx'> 		ips_driver-&gt;signals.all = 0;</div><div class='ctx'> </div><div class='del'>-		if (prev_driver_signals.bits.allow_ips2) {</div><div class='del'>-			udelay(dc-&gt;debug.ips2_eval_delay_us);</div><div class='add'>+		DC_LOG_IPS(</div><div class='add'>+			"%s (allow ips1=%d ips2=%d) (commit ips1=%d ips2=%d) (count rcg=%d ips1=%d ips2=%d)",</div><div class='add'>+			__func__,</div><div class='add'>+			ips_driver-&gt;signals.bits.allow_ips1,</div><div class='add'>+			ips_driver-&gt;signals.bits.allow_ips2,</div><div class='add'>+			ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+			ips_fw-&gt;signals.bits.ips2_commit,</div><div class='add'>+			ips_fw-&gt;rcg_entry_count,</div><div class='add'>+			ips_fw-&gt;ips1_entry_count,</div><div class='add'>+			ips_fw-&gt;ips2_entry_count);</div><div class='add'>+</div><div class='add'>+		/* Note: register access has technically not resumed for DCN here, but we</div><div class='add'>+		 * need to be message PMFW through our standard register interface.</div><div class='add'>+		 */</div><div class='add'>+		dc_dmub_srv-&gt;needs_idle_wake = false;</div><div class='add'>+</div><div class='add'>+		if (prev_driver_signals.bits.allow_ips2 &amp;&amp;</div><div class='add'>+		    (!dc-&gt;debug.optimize_ips_handshake ||</div><div class='add'>+		     ips_fw-&gt;signals.bits.ips2_commit || !ips_fw-&gt;signals.bits.in_idle)) {</div><div class='add'>+			DC_LOG_IPS(</div><div class='add'>+				"wait IPS2 eval (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+				ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+				ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='add'>+			if (!dc-&gt;debug.optimize_ips_handshake || !ips_fw-&gt;signals.bits.ips2_commit)</div><div class='add'>+				udelay(dc-&gt;debug.ips2_eval_delay_us);</div><div class='ctx'> </div><div class='ctx'> 			if (ips_fw-&gt;signals.bits.ips2_commit) {</div><div class='add'>+				DC_LOG_IPS(</div><div class='add'>+					"exit IPS2 #1 (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 				// Tell PMFW to exit low power state</div><div class='ctx'> 				dc-&gt;clk_mgr-&gt;funcs-&gt;exit_low_power_state(dc-&gt;clk_mgr);</div><div class='ctx'> </div><div class='add'>+				DC_LOG_IPS(</div><div class='add'>+					"wait IPS2 entry delay (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 				// Wait for IPS2 entry upper bound</div><div class='ctx'> 				udelay(dc-&gt;debug.ips2_entry_delay_us);</div><div class='ctx'> </div><div class='add'>+				DC_LOG_IPS(</div><div class='add'>+					"exit IPS2 #2 (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 				dc-&gt;clk_mgr-&gt;funcs-&gt;exit_low_power_state(dc-&gt;clk_mgr);</div><div class='ctx'> </div><div class='add'>+				DC_LOG_IPS(</div><div class='add'>+					"wait IPS2 commit clear (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 				while (ips_fw-&gt;signals.bits.ips2_commit)</div><div class='ctx'> 					udelay(1);</div><div class='ctx'> </div><div class='add'>+				DC_LOG_IPS(</div><div class='add'>+					"wait hw_pwr_up (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 				if (!dc_dmub_srv_is_hw_pwr_up(dc-&gt;ctx-&gt;dmub_srv, true))</div><div class='ctx'> 					ASSERT(0);</div><div class='ctx'> </div><div class='add'>+				DC_LOG_IPS(</div><div class='add'>+					"resync inbox1 (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 				dmub_srv_sync_inbox1(dc-&gt;ctx-&gt;dmub_srv-&gt;dmub);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		dc_dmub_srv_notify_idle(dc, false);</div><div class='ctx'> 		if (prev_driver_signals.bits.allow_ips1) {</div><div class='add'>+			DC_LOG_IPS(</div><div class='add'>+				"wait for IPS1 commit clear (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+				ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+				ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+</div><div class='ctx'> 			while (ips_fw-&gt;signals.bits.ips1_commit)</div><div class='ctx'> 				udelay(1);</div><div class='ctx'> </div><div class='add'>+			DC_LOG_IPS(</div><div class='add'>+				"wait for IPS1 commit clear done (ips1_commit=%d ips2_commit=%d)",</div><div class='add'>+				ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+				ips_fw-&gt;signals.bits.ips2_commit);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!dc_dmub_srv_is_hw_pwr_up(dc-&gt;ctx-&gt;dmub_srv, true))</div><div class='ctx'> 		ASSERT(0);</div><div class='add'>+</div><div class='add'>+	DC_LOG_IPS("%s exit (count rcg=%d ips1=%d ips2=%d)",</div><div class='add'>+		__func__,</div><div class='add'>+		rcg_exit_count,</div><div class='add'>+		ips1_exit_count,</div><div class='add'>+		ips2_exit_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state powerState)</div><div class='hunk'>@@ -1335,21 +1468,42 @@ void dc_dmub_srv_apply_idle_power_optimizations(const struct dc *dc, bool allow_</div><div class='ctx'> 	if (dc_dmub_srv-&gt;idle_allowed == allow_idle)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	DC_LOG_IPS("%s state change: old=%d new=%d", __func__, dc_dmub_srv-&gt;idle_allowed, allow_idle);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Entering a low power state requires a driver notification.</div><div class='ctx'> 	 * Powering up the hardware requires notifying PMFW and DMCUB.</div><div class='ctx'> 	 * Clearing the driver idle allow requires a DMCUB command.</div><div class='ctx'> 	 * DMCUB commands requires the DMCUB to be powered up and restored.</div><div class='del'>-	 *</div><div class='del'>-	 * Exit out early to prevent an infinite loop of DMCUB commands</div><div class='del'>-	 * triggering exit low power - use software state to track this.</div><div class='ctx'> 	 */</div><div class='del'>-	dc_dmub_srv-&gt;idle_allowed = allow_idle;</div><div class='ctx'> </div><div class='del'>-	if (!allow_idle)</div><div class='add'>+	if (!allow_idle) {</div><div class='add'>+		dc_dmub_srv-&gt;idle_exit_counter += 1;</div><div class='add'>+</div><div class='ctx'> 		dc_dmub_srv_exit_low_power_state(dc);</div><div class='del'>-	else</div><div class='add'>+		/*</div><div class='add'>+		 * Idle is considered fully exited only after the sequence above</div><div class='add'>+		 * fully completes. If we have a race of two threads exiting</div><div class='add'>+		 * at the same time then it's safe to perform the sequence</div><div class='add'>+		 * twice as long as we're not re-entering.</div><div class='add'>+		 *</div><div class='add'>+		 * Infinite command submission is avoided by using the</div><div class='add'>+		 * dm_execute_dmub_cmd submission instead of the "wake" helpers.</div><div class='add'>+		 */</div><div class='add'>+		dc_dmub_srv-&gt;idle_allowed = false;</div><div class='add'>+</div><div class='add'>+		dc_dmub_srv-&gt;idle_exit_counter -= 1;</div><div class='add'>+		if (dc_dmub_srv-&gt;idle_exit_counter &lt; 0) {</div><div class='add'>+			ASSERT(0);</div><div class='add'>+			dc_dmub_srv-&gt;idle_exit_counter = 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Consider idle as notified prior to the actual submission to</div><div class='add'>+		 * prevent multiple entries. */</div><div class='add'>+		dc_dmub_srv-&gt;idle_allowed = true;</div><div class='add'>+</div><div class='ctx'> 		dc_dmub_srv_notify_idle(dc, allow_idle);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd,</div><div class='hunk'>@@ -1384,7 +1538,8 @@ bool dc_wake_and_execute_dmub_cmd_list(const struct dc_context *ctx, unsigned in</div><div class='ctx'> 	else</div><div class='ctx'> 		result = dm_execute_dmub_cmd(ctx, cmd, wait_type);</div><div class='ctx'> </div><div class='del'>-	if (result &amp;&amp; reallow_idle &amp;&amp; !ctx-&gt;dc-&gt;debug.disable_dmub_reallow_idle)</div><div class='add'>+	if (result &amp;&amp; reallow_idle &amp;&amp; dc_dmub_srv-&gt;idle_exit_counter == 0 &amp;&amp;</div><div class='add'>+	    !ctx-&gt;dc-&gt;debug.disable_dmub_reallow_idle)</div><div class='ctx'> 		dc_dmub_srv_apply_idle_power_optimizations(ctx-&gt;dc, true);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='hunk'>@@ -1433,8 +1588,10 @@ bool dc_wake_and_execute_gpint(const struct dc_context *ctx, enum dmub_gpint_com</div><div class='ctx'> </div><div class='ctx'> 	result = dc_dmub_execute_gpint(ctx, command_code, param, response, wait_type);</div><div class='ctx'> </div><div class='del'>-	if (result &amp;&amp; reallow_idle &amp;&amp; !ctx-&gt;dc-&gt;debug.disable_dmub_reallow_idle)</div><div class='add'>+	if (result &amp;&amp; reallow_idle &amp;&amp; dc_dmub_srv-&gt;idle_exit_counter == 0 &amp;&amp;</div><div class='add'>+	    !ctx-&gt;dc-&gt;debug.disable_dmub_reallow_idle)</div><div class='ctx'> 		dc_dmub_srv_apply_idle_power_optimizations(ctx-&gt;dc, true);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h<br/>index 952bfb368886..2c5866211f60 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h</a></div><div class='hunk'>@@ -35,6 +35,7 @@ struct pipe_ctx;</div><div class='ctx'> struct dc_crtc_timing_adjust;</div><div class='ctx'> struct dc_crtc_timing;</div><div class='ctx'> struct dc_state;</div><div class='add'>+struct dc_surface_update;</div><div class='ctx'> </div><div class='ctx'> struct dc_reg_helper_state {</div><div class='ctx'> 	bool gather_in_progress;</div><div class='hunk'>@@ -51,7 +52,9 @@ struct dc_dmub_srv {</div><div class='ctx'> 	struct dc_context *ctx;</div><div class='ctx'> 	void *dm;</div><div class='ctx'> </div><div class='add'>+	int32_t idle_exit_counter;</div><div class='ctx'> 	bool idle_allowed;</div><div class='add'>+	bool needs_idle_wake;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h<br/>index 1cb7765f593a..519c3df78ee5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dp_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_dp_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dp_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_dp_types.h</a></div><div class='hunk'>@@ -137,8 +137,13 @@ enum dp_link_encoding {</div><div class='ctx'> </div><div class='ctx'> enum dp_test_link_rate {</div><div class='ctx'> 	DP_TEST_LINK_RATE_RBR		= 0x06,</div><div class='add'>+	DP_TEST_LINK_RATE_RATE_2    = 0x08,	// Rate_2        - 2.16 Gbps/Lane</div><div class='add'>+	DP_TEST_LINK_RATE_RATE_3    = 0x09,	// Rate_3        - 2.43 Gbps/Lane</div><div class='ctx'> 	DP_TEST_LINK_RATE_HBR		= 0x0A,</div><div class='add'>+	DP_TEST_LINK_RATE_RBR2      = 0x0C,	// Rate_5 (RBR2) - 3.24 Gbps/Lane</div><div class='add'>+	DP_TEST_LINK_RATE_RATE_6    = 0x10,	// Rate_6        - 4.32 Gbps/Lane</div><div class='ctx'> 	DP_TEST_LINK_RATE_HBR2		= 0x14,</div><div class='add'>+	DP_TEST_LINK_RATE_RATE_8    = 0x19,	// Rate_8        - 6.75 Gbps/Lane</div><div class='ctx'> 	DP_TEST_LINK_RATE_HBR3		= 0x1E,</div><div class='ctx'> 	DP_TEST_LINK_RATE_UHBR10	= 0x01,</div><div class='ctx'> 	DP_TEST_LINK_RATE_UHBR20	= 0x02,</div><div class='hunk'>@@ -917,16 +922,6 @@ struct dpcd_usb4_dp_tunneling_info {</div><div class='ctx'> 	uint8_t usb4_topology_id[DPCD_USB4_TOPOLOGY_ID_LEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT</div><div class='del'>-#define DP_DFP_CAPABILITY_EXTENSION_SUPPORT		0x0A3</div><div class='del'>-#endif</div><div class='del'>-#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0</div><div class='del'>-#define DP_TEST_264BIT_CUSTOM_PATTERN_7_0		0X2230</div><div class='del'>-#endif</div><div class='del'>-#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256</div><div class='del'>-#define DP_TEST_264BIT_CUSTOM_PATTERN_263_256		0X2250</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> union dp_main_line_channel_coding_cap {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		uint8_t DP_8b_10b_SUPPORTED	:1;</div><div class='hunk'>@@ -1232,8 +1227,7 @@ union replay_enable_and_configuration {</div><div class='ctx'> 		unsigned char FREESYNC_PANEL_REPLAY_MODE              :1;</div><div class='ctx'> 		unsigned char TIMING_DESYNC_ERROR_VERIFICATION        :1;</div><div class='ctx'> 		unsigned char STATE_TRANSITION_ERROR_DETECTION        :1;</div><div class='del'>-		unsigned char RESERVED0                               :1;</div><div class='del'>-		unsigned char RESERVED1                               :4;</div><div class='add'>+		unsigned char RESERVED                                :5;</div><div class='ctx'> 	} bits;</div><div class='ctx'> 	unsigned char raw;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h<br/>index aae2f3a2660d..2ad7f60805f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_hw_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_hw_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_hw_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_hw_types.h</a></div><div class='hunk'>@@ -738,6 +738,13 @@ enum scanning_type {</div><div class='ctx'> 	SCANNING_TYPE_UNDEFINED</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum chroma_cositing {</div><div class='add'>+	CHROMA_COSITING_NONE,</div><div class='add'>+	CHROMA_COSITING_LEFT,</div><div class='add'>+	CHROMA_COSITING_TOPLEFT,</div><div class='add'>+	CHROMA_COSITING_COUNT</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct dc_crtc_timing_flags {</div><div class='ctx'> 	uint32_t INTERLACE :1;</div><div class='ctx'> 	uint32_t HSYNC_POSITIVE_POLARITY :1; /* when set to 1,</div><div class='hunk'>@@ -974,6 +981,7 @@ struct dc_crtc_timing_adjust {</div><div class='ctx'> 	uint32_t v_total_max;</div><div class='ctx'> 	uint32_t v_total_mid;</div><div class='ctx'> 	uint32_t v_total_mid_frame_num;</div><div class='add'>+	uint32_t allow_otg_v_count_halt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_plane.h b/drivers/gpu/drm/amd/display/dc/dc_plane.h<br/>index ef380cae816a..44afcd989224 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_plane.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_plane.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_plane.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_plane.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "dc_hw_types.h"</div><div class='ctx'> </div><div class='del'>-struct dc_plane_state *dc_create_plane_state(struct dc *dc);</div><div class='add'>+struct dc_plane_state *dc_create_plane_state(const struct dc *dc);</div><div class='ctx'> const struct dc_plane_status *dc_plane_get_status(</div><div class='ctx'> 		const struct dc_plane_state *plane_state);</div><div class='ctx'> void dc_plane_state_retain(struct dc_plane_state *plane_state);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_plane_priv.h b/drivers/gpu/drm/amd/display/dc/dc_plane_priv.h<br/>index 9ee184c1df00..ab13335f1d01 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_plane_priv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_plane_priv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_plane_priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_plane_priv.h</a></div><div class='hunk'>@@ -30,5 +30,6 @@</div><div class='ctx'> </div><div class='ctx'> void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state);</div><div class='ctx'> void dc_plane_destruct(struct dc_plane_state *plane_state);</div><div class='add'>+uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);</div><div class='ctx'> </div><div class='ctx'> #endif /* _DC_PLANE_PRIV_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_state.h b/drivers/gpu/drm/amd/display/dc/dc_state.h<br/>index d167fdbfa8a9..caa45db50232 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_state.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_state.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_state.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_state.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "inc/core_status.h"</div><div class='ctx'> </div><div class='del'>-struct dc_state *dc_state_create(struct dc *dc);</div><div class='add'>+struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params);</div><div class='ctx'> void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state);</div><div class='ctx'> struct dc_state *dc_state_create_copy(struct dc_state *src_state);</div><div class='ctx'> void dc_state_copy_current(struct dc *dc, struct dc_state *dst_state);</div><div class='hunk'>@@ -39,12 +39,12 @@ void dc_state_destruct(struct dc_state *state);</div><div class='ctx'> void dc_state_retain(struct dc_state *state);</div><div class='ctx'> void dc_state_release(struct dc_state *state);</div><div class='ctx'> </div><div class='del'>-enum dc_status dc_state_add_stream(struct dc *dc,</div><div class='add'>+enum dc_status dc_state_add_stream(const struct dc *dc,</div><div class='ctx'> 				    struct dc_state *state,</div><div class='ctx'> 				    struct dc_stream_state *stream);</div><div class='ctx'> </div><div class='ctx'> enum dc_status dc_state_remove_stream(</div><div class='del'>-		struct dc *dc,</div><div class='add'>+		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *stream);</div><div class='ctx'> </div><div class='hunk'>@@ -74,5 +74,5 @@ bool dc_state_add_all_planes_for_stream(</div><div class='ctx'> </div><div class='ctx'> struct dc_stream_status *dc_state_get_stream_status(</div><div class='ctx'> 	struct dc_state *state,</div><div class='del'>-	struct dc_stream_state *stream);</div><div class='add'>+	const struct dc_stream_state *stream);</div><div class='ctx'> #endif /* _DC_STATE_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_state_priv.h b/drivers/gpu/drm/amd/display/dc/dc_state_priv.h<br/>index c1f44e09a6c1..615086d74d32 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_state_priv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_state_priv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_state_priv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_state_priv.h</a></div><div class='hunk'>@@ -29,6 +29,8 @@</div><div class='ctx'> #include "dc_state.h"</div><div class='ctx'> #include "dc_stream.h"</div><div class='ctx'> </div><div class='add'>+struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id);</div><div class='add'>+</div><div class='ctx'> /* Get the type of the provided resource (none, phantom, main) based on the provided</div><div class='ctx'>  * context. If the context is unavailable, determine only if phantom or not.</div><div class='ctx'>  */</div><div class='hunk'>@@ -45,7 +47,7 @@ struct dc_stream_state *dc_state_get_paired_subvp_stream(const struct dc_state *</div><div class='ctx'> struct dc_stream_state *dc_state_create_phantom_stream(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *main_stream);</div><div class='del'>-struct dc_plane_state *dc_state_create_phantom_plane(struct dc *dc,</div><div class='add'>+struct dc_plane_state *dc_state_create_phantom_plane(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_plane_state *main_plane);</div><div class='ctx'> </div><div class='hunk'>@@ -58,11 +60,11 @@ void dc_state_release_phantom_plane(const struct dc *dc,</div><div class='ctx'> 		struct dc_plane_state *phantom_plane);</div><div class='ctx'> </div><div class='ctx'> /* add/remove phantom stream to context and generate subvp meta data */</div><div class='del'>-enum dc_status dc_state_add_phantom_stream(struct dc *dc,</div><div class='add'>+enum dc_status dc_state_add_phantom_stream(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *phantom_stream,</div><div class='ctx'> 		struct dc_stream_state *main_stream);</div><div class='del'>-enum dc_status dc_state_remove_phantom_stream(struct dc *dc,</div><div class='add'>+enum dc_status dc_state_remove_phantom_stream(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		struct dc_stream_state *phantom_stream);</div><div class='ctx'> </div><div class='hunk'>@@ -92,11 +94,11 @@ bool dc_state_add_all_phantom_planes_for_stream(</div><div class='ctx'> 		struct dc_state *state);</div><div class='ctx'> </div><div class='ctx'> bool dc_state_remove_phantom_streams_and_planes(</div><div class='del'>-		struct dc *dc,</div><div class='add'>+		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state);</div><div class='ctx'> </div><div class='ctx'> void dc_state_release_phantom_streams_and_planes(</div><div class='del'>-		struct dc *dc,</div><div class='add'>+		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state);</div><div class='ctx'> </div><div class='ctx'> #endif /* _DC_STATE_PRIV_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h<br/>index ee10941caa59..e5dbbc6089a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_stream.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_stream.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_stream.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_stream.h</a></div><div class='hunk'>@@ -190,7 +190,7 @@ struct dc_stream_state {</div><div class='ctx'> 	PHYSICAL_ADDRESS_LOC dmdata_address;</div><div class='ctx'> 	bool   use_dynamic_meta;</div><div class='ctx'> </div><div class='del'>-	struct dc_transfer_func *out_transfer_func;</div><div class='add'>+	struct dc_transfer_func out_transfer_func;</div><div class='ctx'> 	struct colorspace_transform gamut_remap_matrix;</div><div class='ctx'> 	struct dc_csc_transform csc_color_matrix;</div><div class='ctx'> </div><div class='hunk'>@@ -428,14 +428,6 @@ bool dc_stream_set_dynamic_metadata(struct dc *dc,</div><div class='ctx'> enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Set up streams and links associated to drive sinks</div><div class='del'>- * The streams parameter is an absolute set of all active streams.</div><div class='del'>- *</div><div class='del'>- * After this call:</div><div class='del'>- *   Phy, Encoder, Timing Generator are programmed and enabled.</div><div class='del'>- *   New streams are enabled with blank stream; no memory read.</div><div class='del'>- */</div><div class='del'>-/*</div><div class='ctx'>  * Enable stereo when commit_streams is not required,</div><div class='ctx'>  * for example, frame alternate.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h<br/>index be2ac5c442a4..0f66d00ef80f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dc_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dc_types.h</a></div><div class='hunk'>@@ -422,7 +422,7 @@ struct dc_dwb_params {</div><div class='ctx'> 	enum dwb_capture_rate		capture_rate;	/* controls the frame capture rate */</div><div class='ctx'> 	struct scaling_taps 		scaler_taps;	/* Scaling taps */</div><div class='ctx'> 	enum dwb_subsample_position	subsample_position;</div><div class='del'>-	struct dc_transfer_func *out_transfer_func;</div><div class='add'>+	const struct dc_transfer_func *out_transfer_func;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* audio*/</div><div class='hunk'>@@ -1050,6 +1050,8 @@ union replay_error_status {</div><div class='ctx'> struct replay_config {</div><div class='ctx'> 	/* Replay feature is supported */</div><div class='ctx'> 	bool replay_supported;</div><div class='add'>+	/* Replay caps support DPCD &amp; EDID caps*/</div><div class='add'>+	bool replay_cap_support;</div><div class='ctx'> 	/* Power opt flags that are supported */</div><div class='ctx'> 	unsigned int replay_power_opt_supported;</div><div class='ctx'> 	/* SMU optimization is supported */</div><div class='hunk'>@@ -1175,4 +1177,20 @@ enum mall_stream_type {</div><div class='ctx'> 	SUBVP_MAIN, // subvp in use, this stream is main stream</div><div class='ctx'> 	SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+enum dc_power_source_type {</div><div class='add'>+	DC_POWER_SOURCE_AC, // wall power</div><div class='add'>+	DC_POWER_SOURCE_DC, // battery power</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dc_state_create_params {</div><div class='add'>+	enum dc_power_source_type power_source;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dc_commit_streams_params {</div><div class='add'>+	struct dc_stream_state **streams;</div><div class='add'>+	uint8_t stream_count;</div><div class='add'>+	enum dc_power_source_type power_source;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* DC_TYPES_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c b/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c<br/>index a2f48d46d199..ee601a6897a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c</a></div><div class='hunk'>@@ -22,9 +22,6 @@</div><div class='ctx'>  * Authors: AMD</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "resource.h"</div><div class='ctx'> #include "dce_i2c.h"</div><div class='ctx'> #include "dce_i2c_hw.h"</div><div class='hunk'>@@ -315,9 +312,6 @@ static bool setup_engine(</div><div class='ctx'> 	/* we have checked I2c not used by DMCU, set SW use I2C REQ to 1 to indicate SW using it*/</div><div class='ctx'> 	REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, 1);</div><div class='ctx'> </div><div class='del'>-	/* we have checked I2c not used by DMCU, set SW use I2C REQ to 1 to indicate SW using it*/</div><div class='del'>-	REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, 1);</div><div class='del'>-</div><div class='ctx'> 	/*set SW requested I2c speed to default, if API calls in it will be override later*/</div><div class='ctx'> 	set_speed(dce_i2c_hw, dce_i2c_hw-&gt;ctx-&gt;dc-&gt;caps.i2c_speed_in_khz);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h<br/>index f98400efdd9b..e34e445a4013 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h</a></div><div class='hunk'>@@ -181,6 +181,7 @@ struct dce_mem_input_registers {</div><div class='ctx'> 	SFB(blk, GRPH_ENABLE, GRPH_ENABLE, mask_sh),\</div><div class='ctx'> 	SFB(blk, GRPH_CONTROL, GRPH_DEPTH, mask_sh),\</div><div class='ctx'> 	SFB(blk, GRPH_CONTROL, GRPH_FORMAT, mask_sh),\</div><div class='add'>+	SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\</div><div class='ctx'> 	SFB(blk, GRPH_X_START, GRPH_X_START, mask_sh),\</div><div class='ctx'> 	SFB(blk, GRPH_Y_START, GRPH_Y_START, mask_sh),\</div><div class='ctx'> 	SFB(blk, GRPH_X_END, GRPH_X_END, mask_sh),\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h<br/>index bf1ffc3629c7..3d9be87aae45 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_opp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dce/dce_opp.h</a></div><div class='hunk'>@@ -111,6 +111,7 @@ enum dce110_opp_reg_type {</div><div class='ctx'> 	OPP_SF(FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh),\</div><div class='ctx'> 	OPP_SF(FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh),\</div><div class='ctx'> 	OPP_SF(FMT_DITHER_RAND_B_SEED, FMT_RAND_B_SEED, mask_sh),\</div><div class='add'>+	OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\</div><div class='ctx'> 	OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_RESET, mask_sh),\</div><div class='ctx'> 	OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_OFFSET, mask_sh),\</div><div class='ctx'> 	OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_DEPTH, mask_sh),\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c<br/>index 670d5ab9d998..2b1673d69ea8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dce_transform.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dce/dce_transform.c</a></div><div class='hunk'>@@ -1408,7 +1408,7 @@ void dce110_opp_set_csc_default(</div><div class='ctx'> static void program_pwl(struct dce_transform *xfm_dce,</div><div class='ctx'> 			const struct pwl_params *params)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='add'>+	uint32_t retval;</div><div class='ctx'> 	uint8_t max_tries = 10;</div><div class='ctx'> 	uint8_t counter = 0;</div><div class='ctx'> 	uint32_t i = 0;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c<br/>index f9d6a181164a..b851fc65f5b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c</a></div><div class='hunk'>@@ -34,11 +34,7 @@</div><div class='ctx'> #include "reg_helper.h"</div><div class='ctx'> #include "fixed31_32.h"</div><div class='ctx'> </div><div class='del'>-#ifdef _WIN32</div><div class='del'>-#include "atombios.h"</div><div class='del'>-#else</div><div class='ctx'> #include "atom.h"</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define TO_DMUB_ABM(abm)\</div><div class='ctx'> 	container_of(abm, struct dce_abm, base)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c<br/>index b010814706fe..4f559a025cf0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c</a></div><div class='hunk'>@@ -244,7 +244,7 @@ static void dmub_replay_residency(struct dmub_replay *dmub, uint8_t panel_inst,</div><div class='ctx'> 	uint16_t param = (uint16_t)(panel_inst &lt;&lt; 8);</div><div class='ctx'> </div><div class='ctx'> 	if (is_alpm)</div><div class='del'>-		param |= REPLAY_RESIDENCY_MODE_ALPM;</div><div class='add'>+		param |= REPLAY_RESIDENCY_FIELD_MODE_ALPM;</div><div class='ctx'> </div><div class='ctx'> 	if (is_start)</div><div class='ctx'> 		param |= REPLAY_RESIDENCY_ENABLE;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/Makefile b/drivers/gpu/drm/amd/display/dc/dcn10/Makefile<br/>index ae6a131be71b..8dc7938c36d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/Makefile</a></div><div class='hunk'>@@ -24,9 +24,9 @@</div><div class='ctx'> </div><div class='ctx'> DCN10 = dcn10_ipp.o \</div><div class='ctx'> 		dcn10_hw_sequencer_debug.o \</div><div class='del'>-		dcn10_dpp.o dcn10_opp.o \</div><div class='add'>+		dcn10_opp.o \</div><div class='ctx'> 		dcn10_hubp.o dcn10_mpc.o \</div><div class='del'>-		dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o \</div><div class='add'>+		dcn10_cm_common.o \</div><div class='ctx'> 		dcn10_hubbub.o dcn10_stream_encoder.o dcn10_link_encoder.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c<br/>index b7e57aa27361..0b49362f71b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn10_dpp.h"</div><div class='add'>+#include "dcn10/dcn10_dpp.h"</div><div class='ctx'> </div><div class='ctx'> #include "dcn10_cm_common.h"</div><div class='ctx'> #include "custom_float.h"</div><div class='hunk'>@@ -402,6 +402,11 @@ bool cm_helper_translate_curve_to_hw_format(struct dc_context *ctx,</div><div class='ctx'> 				i += increment) {</div><div class='ctx'> 			if (j == hw_points - 1)</div><div class='ctx'> 				break;</div><div class='add'>+			if (i &gt;= TRANSFER_FUNC_POINTS) {</div><div class='add'>+				DC_LOG_ERROR("Index out of bounds: i=%d, TRANSFER_FUNC_POINTS=%d\n",</div><div class='add'>+					     i, TRANSFER_FUNC_POINTS);</div><div class='add'>+				return false;</div><div class='add'>+			}</div><div class='ctx'> 			rgb_resulted[j].red = output_tf-&gt;tf_pts.red[i];</div><div class='ctx'> 			rgb_resulted[j].green = output_tf-&gt;tf_pts.green[i];</div><div class='ctx'> 			rgb_resulted[j].blue = output_tf-&gt;tf_pts.blue[i];</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c<br/>index d51f1ce02874..6dd355a03033 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c</a></div><div class='hunk'>@@ -130,7 +130,7 @@ bool hubbub1_verify_allow_pstate_change_high(</div><div class='ctx'> 	static unsigned int max_sampled_pstate_wait_us; /* data collection */</div><div class='ctx'> 	static bool forced_pstate_allow; /* help with revert wa */</div><div class='ctx'> </div><div class='del'>-	unsigned int debug_data;</div><div class='add'>+	unsigned int debug_data = 0;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	if (forced_pstate_allow) {</div><div class='hunk'>@@ -242,7 +242,7 @@ void hubbub1_wm_change_req_wa(struct hubbub *hubbub)</div><div class='ctx'> </div><div class='ctx'> bool hubbub1_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -356,7 +356,7 @@ bool hubbub1_program_urgent_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub1_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -501,7 +501,7 @@ bool hubbub1_program_stutter_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub1_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -582,7 +582,7 @@ bool hubbub1_program_pstate_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub1_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h<br/>index 4201b7627030..d1f9e63944c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h</a></div><div class='hunk'>@@ -409,7 +409,7 @@ struct dcn10_hubbub {</div><div class='ctx'> 	const struct dcn_hubbub_shift *shifts;</div><div class='ctx'> 	const struct dcn_hubbub_mask *masks;</div><div class='ctx'> 	unsigned int debug_test_index_pstate;</div><div class='del'>-	struct dcn_watermark_set watermarks;</div><div class='add'>+	union dcn_watermark_set watermarks;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void hubbub1_update_dchub(</div><div class='hunk'>@@ -423,7 +423,7 @@ void hubbub1_wm_change_req_wa(struct hubbub *hubbub);</div><div class='ctx'> </div><div class='ctx'> bool hubbub1_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='hunk'>@@ -446,17 +446,17 @@ void hubbub1_construct(struct hubbub *hubbub,</div><div class='ctx'> </div><div class='ctx'> bool hubbub1_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> bool hubbub1_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> bool hubbub1_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h<br/>index 09784222cc03..69119b2fdce2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h</a></div><div class='hunk'>@@ -692,6 +692,7 @@ struct dcn_hubp_state {</div><div class='ctx'> 	uint32_t primary_meta_addr_hi;</div><div class='ctx'> 	uint32_t uclk_pstate_force;</div><div class='ctx'> 	uint32_t hubp_cntl;</div><div class='add'>+	uint32_t flip_control;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dcn10_hubp {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c<br/>index 9033b39e0e0c..c51b717e5622 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c</a></div><div class='hunk'>@@ -392,7 +392,7 @@ static unsigned int dcn10_get_mpcc_states(struct dc *dc, char *pBuf, unsigned in</div><div class='ctx'> 	remaining_buffer -= chars_printed;</div><div class='ctx'> 	pBuf += chars_printed;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pool-&gt;pipe_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; pool-&gt;mpcc_count; i++) {</div><div class='ctx'> 		struct mpcc_state s = {0};</div><div class='ctx'> </div><div class='ctx'> 		pool-&gt;mpc-&gt;funcs-&gt;read_mpcc_state(pool-&gt;mpc, i, &amp;s);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c<br/>index 377f1ba1a81b..4d0eed7598b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c</a></div><div class='hunk'>@@ -1439,7 +1439,6 @@ enum signal_type dcn10_get_dig_mode(</div><div class='ctx'> 	default:</div><div class='ctx'> 		return SIGNAL_TYPE_NONE;</div><div class='ctx'> 	}</div><div class='del'>-	return SIGNAL_TYPE_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn10_link_encoder_get_max_link_cap(struct link_encoder *enc,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h<br/>index d980e6bd6c66..b7a89c39f445 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h</a></div><div class='hunk'>@@ -167,7 +167,6 @@ struct dcn10_link_enc_registers {</div><div class='ctx'> 	uint32_t DIO_LINKD_CNTL;</div><div class='ctx'> 	uint32_t DIO_LINKE_CNTL;</div><div class='ctx'> 	uint32_t DIO_LINKF_CNTL;</div><div class='del'>-	uint32_t DIG_FIFO_CTRL0;</div><div class='ctx'> 	uint32_t DIO_CLK_CNTL;</div><div class='ctx'> 	uint32_t DIG_BE_CLK_CNTL;</div><div class='ctx'> };</div><div class='hunk'>@@ -475,9 +474,6 @@ struct dcn10_link_enc_registers {</div><div class='ctx'> 	type HPO_DP_ENC_SEL;\</div><div class='ctx'> 	type HPO_HDMI_ENC_SEL</div><div class='ctx'> </div><div class='del'>-#define DCN32_LINK_ENCODER_REG_FIELD_LIST(type) \</div><div class='del'>-	type DIG_FIFO_OUTPUT_PIXEL_MODE</div><div class='del'>-</div><div class='ctx'> #define DCN35_LINK_ENCODER_REG_FIELD_LIST(type) \</div><div class='ctx'> 	type DIG_BE_ENABLE;\</div><div class='ctx'> 	type DIG_RB_SWITCH_EN;\</div><div class='hunk'>@@ -512,7 +508,6 @@ struct dcn10_link_enc_shift {</div><div class='ctx'> 	DCN20_LINK_ENCODER_REG_FIELD_LIST(uint8_t);</div><div class='ctx'> 	DCN30_LINK_ENCODER_REG_FIELD_LIST(uint8_t);</div><div class='ctx'> 	DCN31_LINK_ENCODER_REG_FIELD_LIST(uint8_t);</div><div class='del'>-	DCN32_LINK_ENCODER_REG_FIELD_LIST(uint8_t);</div><div class='ctx'> 	DCN35_LINK_ENCODER_REG_FIELD_LIST(uint8_t);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -521,7 +516,6 @@ struct dcn10_link_enc_mask {</div><div class='ctx'> 	DCN20_LINK_ENCODER_REG_FIELD_LIST(uint32_t);</div><div class='ctx'> 	DCN30_LINK_ENCODER_REG_FIELD_LIST(uint32_t);</div><div class='ctx'> 	DCN31_LINK_ENCODER_REG_FIELD_LIST(uint32_t);</div><div class='del'>-	DCN32_LINK_ENCODER_REG_FIELD_LIST(uint32_t);</div><div class='ctx'> 	DCN35_LINK_ENCODER_REG_FIELD_LIST(uint32_t);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c<br/>index 5838a11efd00..71e9288d60ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c</a></div><div class='hunk'>@@ -168,6 +168,10 @@ static void opp1_set_pixel_encoding(</div><div class='ctx'> </div><div class='ctx'> 	case PIXEL_ENCODING_RGB:</div><div class='ctx'> 	case PIXEL_ENCODING_YCBCR444:</div><div class='add'>+		REG_UPDATE_3(FMT_CONTROL,</div><div class='add'>+				FMT_PIXEL_ENCODING, 0,</div><div class='add'>+				FMT_SUBSAMPLING_MODE, 0,</div><div class='add'>+				FMT_CBCR_BIT_REDUCTION_BYPASS, 0);</div><div class='ctx'> 		REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PIXEL_ENCODING_YCBCR422:</div><div class='hunk'>@@ -177,7 +181,10 @@ static void opp1_set_pixel_encoding(</div><div class='ctx'> 				FMT_CBCR_BIT_REDUCTION_BYPASS, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PIXEL_ENCODING_YCBCR420:</div><div class='del'>-		REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 2);</div><div class='add'>+		REG_UPDATE_3(FMT_CONTROL,</div><div class='add'>+				FMT_PIXEL_ENCODING, 2,</div><div class='add'>+				FMT_SUBSAMPLING_MODE, 2,</div><div class='add'>+				FMT_CBCR_BIT_REDUCTION_BYPASS, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h<br/>index 2c0ecfa5a643..c87de68a509e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h</a></div><div class='hunk'>@@ -79,6 +79,8 @@</div><div class='ctx'> 	OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_MAX, mask_sh), \</div><div class='ctx'> 	OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP, mask_sh), \</div><div class='ctx'> 	OPP_SF(FMT0_FMT_CONTROL, FMT_PIXEL_ENCODING, mask_sh), \</div><div class='add'>+	OPP_SF(FMT0_FMT_CONTROL, FMT_SUBSAMPLING_MODE, mask_sh), \</div><div class='add'>+	OPP_SF(FMT0_FMT_CONTROL, FMT_CBCR_BIT_REDUCTION_BYPASS, mask_sh), \</div><div class='ctx'> 	OPP_SF(FMT0_FMT_CONTROL, FMT_STEREOSYNC_OVERRIDE, mask_sh), \</div><div class='ctx'> 	OPP_SF(FMT0_FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh), \</div><div class='ctx'> 	OPP_SF(FMT0_FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh), \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h<br/>index c429590f1298..1b96972b9d0f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h</a></div><div class='hunk'>@@ -127,7 +127,6 @@ struct dcn10_stream_enc_registers {</div><div class='ctx'> 	uint32_t AFMT_60958_1;</div><div class='ctx'> 	uint32_t AFMT_60958_2;</div><div class='ctx'> 	uint32_t DIG_FE_CNTL;</div><div class='del'>-	uint32_t DIG_FE_CNTL2;</div><div class='ctx'> 	uint32_t DIG_FIFO_STATUS;</div><div class='ctx'> 	uint32_t DP_MSE_RATE_CNTL;</div><div class='ctx'> 	uint32_t DP_MSE_RATE_UPDATE;</div><div class='hunk'>@@ -570,7 +569,7 @@ struct dcn10_stream_enc_registers {</div><div class='ctx'> 	type DP_SEC_GSP11_ENABLE;\</div><div class='ctx'> 	type DP_SEC_GSP11_LINE_NUM</div><div class='ctx'> </div><div class='del'>-#define SE_REG_FIELD_LIST_DCN3_2(type) \</div><div class='add'>+#define SE_REG_FIELD_LIST_DCN3_1_COMMON(type) \</div><div class='ctx'> 	type DIG_FIFO_OUTPUT_PIXEL_MODE;\</div><div class='ctx'> 	type DP_PIXEL_PER_CYCLE_PROCESSING_MODE;\</div><div class='ctx'> 	type DIG_SYMCLK_FE_ON;\</div><div class='hunk'>@@ -599,7 +598,7 @@ struct dcn10_stream_encoder_shift {</div><div class='ctx'> 	uint8_t HDMI_ACP_SEND;</div><div class='ctx'> 	SE_REG_FIELD_LIST_DCN2_0(uint8_t);</div><div class='ctx'> 	SE_REG_FIELD_LIST_DCN3_0(uint8_t);</div><div class='del'>-	SE_REG_FIELD_LIST_DCN3_2(uint8_t);</div><div class='add'>+	SE_REG_FIELD_LIST_DCN3_1_COMMON(uint8_t);</div><div class='ctx'> 	SE_REG_FIELD_LIST_DCN3_5_COMMON(uint8_t);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -608,7 +607,7 @@ struct dcn10_stream_encoder_mask {</div><div class='ctx'> 	uint32_t HDMI_ACP_SEND;</div><div class='ctx'> 	SE_REG_FIELD_LIST_DCN2_0(uint32_t);</div><div class='ctx'> 	SE_REG_FIELD_LIST_DCN3_0(uint32_t);</div><div class='del'>-	SE_REG_FIELD_LIST_DCN3_2(uint32_t);</div><div class='add'>+	SE_REG_FIELD_LIST_DCN3_1_COMMON(uint32_t);</div><div class='ctx'> 	SE_REG_FIELD_LIST_DCN3_5_COMMON(uint32_t);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -667,9 +666,6 @@ void enc1_stream_encoder_send_immediate_sdp_message(</div><div class='ctx'> void enc1_stream_encoder_stop_dp_info_packets(</div><div class='ctx'> 	struct stream_encoder *enc);</div><div class='ctx'> </div><div class='del'>-void enc1_stream_encoder_reset_fifo(</div><div class='del'>-	struct stream_encoder *enc);</div><div class='del'>-</div><div class='ctx'> void enc1_stream_encoder_dp_blank(</div><div class='ctx'> 	struct dc_link *link,</div><div class='ctx'> 	struct stream_encoder *enc);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/Makefile b/drivers/gpu/drm/amd/display/dc/dcn20/Makefile<br/>index 3dae3943b056..9b6070c99794 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for DCN.</div><div class='ctx'> </div><div class='del'>-DCN20 = dcn20_dpp.o dcn20_dpp_cm.o dcn20_hubp.o \</div><div class='add'>+DCN20 = dcn20_hubp.o \</div><div class='ctx'> 		dcn20_mpc.o dcn20_opp.o dcn20_hubbub.o dcn20_mmhubbub.o \</div><div class='ctx'> 		dcn20_stream_encoder.o dcn20_link_encoder.o dcn20_dccg.o \</div><div class='ctx'> 		dcn20_vmid.o dcn20_dwb.o dcn20_dwb_scl.o</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c<br/>index f8667be57046..80779e85e2c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c</a></div><div class='hunk'>@@ -299,6 +299,17 @@ void dwb2_set_scaler(struct dwbc *dwbc, struct dc_dwb_params *params)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+	if (dwbc20-&gt;dwbc_mask-&gt;WBSCL_COEF_RAM_SEL) {</div><div class='add'>+		/* Swap double buffered coefficient set */</div><div class='add'>+		uint32_t wbscl_mode = REG_READ(WBSCL_MODE);</div><div class='add'>+		bool coef_ram_current = get_reg_field_value_ex(</div><div class='add'>+			wbscl_mode, dwbc20-&gt;dwbc_mask-&gt;WBSCL_COEF_RAM_SEL_CURRENT,</div><div class='add'>+			dwbc20-&gt;dwbc_shift-&gt;WBSCL_COEF_RAM_SEL_CURRENT);</div><div class='add'>+</div><div class='add'>+		REG_UPDATE(WBSCL_MODE, WBSCL_COEF_RAM_SEL, !coef_ram_current);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct dwbc_funcs dcn20_dwbc_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c<br/>index 6eebcb22e317..c6f859871d11 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c</a></div><div class='hunk'>@@ -570,7 +570,7 @@ void hubbub2_get_dchub_ref_freq(struct hubbub *hubbub,</div><div class='ctx'> </div><div class='ctx'> static bool hubbub2_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h<br/>index 2f6146bf1d32..24a9c45988ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h</a></div><div class='hunk'>@@ -85,7 +85,7 @@ struct dcn20_hubbub {</div><div class='ctx'> 	const struct dcn_hubbub_shift *shifts;</div><div class='ctx'> 	const struct dcn_hubbub_mask *masks;</div><div class='ctx'> 	unsigned int debug_test_index_pstate;</div><div class='del'>-	struct dcn_watermark_set watermarks;</div><div class='add'>+	union dcn_watermark_set watermarks;</div><div class='ctx'> 	int num_vmid;</div><div class='ctx'> 	struct dcn20_vmid vmid[16];</div><div class='ctx'> 	unsigned int detile_buf_size;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c<br/>index 89c3bf0fe0c9..6bba020ad6fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c</a></div><div class='hunk'>@@ -1331,6 +1331,12 @@ void hubp2_read_state(struct hubp *hubp)</div><div class='ctx'> 		SWATH_HEIGHT_C, &amp;rq_regs-&gt;rq_regs_c.swath_height,</div><div class='ctx'> 		PTE_ROW_HEIGHT_LINEAR_C, &amp;rq_regs-&gt;rq_regs_c.pte_row_height_linear);</div><div class='ctx'> </div><div class='add'>+	if (REG(DCHUBP_CNTL))</div><div class='add'>+		s-&gt;hubp_cntl = REG_READ(DCHUBP_CNTL);</div><div class='add'>+</div><div class='add'>+	if (REG(DCSURF_FLIP_CONTROL))</div><div class='add'>+		s-&gt;flip_control = REG_READ(DCSURF_FLIP_CONTROL);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hubp2_validate_dml_output(struct hubp *hubp,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h<br/>index efa2adf4f83d..8da3084d933f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h</a></div><div class='hunk'>@@ -147,7 +147,7 @@</div><div class='ctx'> 	uint32_t DCN_CUR1_TTU_CNTL1;\</div><div class='ctx'> 	uint32_t VMID_SETTINGS_0</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+/*shared with dcn3.x*/</div><div class='ctx'> #define DCN21_HUBP_REG_COMMON_VARIABLE_LIST \</div><div class='ctx'> 	DCN2_HUBP_REG_COMMON_VARIABLE_LIST; \</div><div class='ctx'> 	uint32_t FLIP_PARAMETERS_3;\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h<br/>index b2b266953d18..c34e04cac9a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h</a></div><div class='hunk'>@@ -147,7 +147,8 @@</div><div class='ctx'> 	LE_SF(DPCSTX0_DPCSTX_TX_CNTL, DPCS_TX_DATA_SWAP, mask_sh),\</div><div class='ctx'> 	LE_SF(DPCSTX0_DPCSTX_TX_CNTL, DPCS_TX_DATA_ORDER_INVERT, mask_sh),\</div><div class='ctx'> 	LE_SF(DPCSTX0_DPCSTX_TX_CNTL, DPCS_TX_FIFO_EN, mask_sh),\</div><div class='del'>-	LE_SF(DPCSTX0_DPCSTX_TX_CNTL, DPCS_TX_FIFO_RD_START_DELAY, mask_sh)</div><div class='add'>+	LE_SF(DPCSTX0_DPCSTX_TX_CNTL, DPCS_TX_FIFO_RD_START_DELAY, mask_sh),\</div><div class='add'>+	LE_SF(DPCSTX0_DPCSTX_DEBUG_CONFIG, DPCS_DBG_CBUS_DIS, mask_sh)</div><div class='ctx'> </div><div class='ctx'> #define DPCS_DCN2_MASK_SH_LIST(mask_sh)\</div><div class='ctx'> 	DPCS_MASK_SH_LIST(mask_sh),\</div><div class='hunk'>@@ -231,6 +232,8 @@</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \</div><div class='ctx'> 	SRI(DPCSTX_TX_CLOCK_CNTL, DPCSTX, id), \</div><div class='ctx'> 	SRI(DPCSTX_TX_CNTL, DPCSTX, id), \</div><div class='add'>+	SRI(DPCSTX_DEBUG_CONFIG, DPCSTX, id), \</div><div class='add'>+	SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \</div><div class='ctx'> 	SR(RDPCSTX0_RDPCSTX_SCRATCH)</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c<br/>index 16b5ff208d14..ea73473b970a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c</a></div><div class='hunk'>@@ -395,9 +395,12 @@ static void mpc20_program_ogam_pwl(</div><div class='ctx'> 				MPCC_OGAM_LUT_DATA, rgb[i].delta_green_reg);</div><div class='ctx'> 		REG_SET(MPCC_OGAM_LUT_DATA[mpcc_id], 0,</div><div class='ctx'> 				MPCC_OGAM_LUT_DATA, rgb[i].delta_blue_reg);</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	REG_SEQ_SUBMIT();</div><div class='add'>+	PERF_TRACE();</div><div class='add'>+	REG_SEQ_WAIT_DONE();</div><div class='add'>+	PERF_TRACE();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void apply_DEDCN20_305_wa(struct mpc *mpc, int mpcc_id,</div><div class='hunk'>@@ -501,11 +504,6 @@ void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id)</div><div class='ctx'> 		ASSERT(!mpc_disabled);</div><div class='ctx'> 		ASSERT(!mpc_idle);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	REG_SEQ_SUBMIT();</div><div class='del'>-	PERF_TRACE();</div><div class='del'>-	REG_SEQ_WAIT_DONE();</div><div class='del'>-	PERF_TRACE();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mpc2_init_mpcc(struct mpcc *mpcc, int mpcc_inst)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/Makefile b/drivers/gpu/drm/amd/display/dc/dcn201/Makefile<br/>index 2b0b4f32e13b..3880db59e457 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn201/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for DCN.</div><div class='ctx'> DCN201 = dcn201_hubbub.o\</div><div class='del'>-	dcn201_mpc.o dcn201_hubp.o dcn201_opp.o dcn201_dpp.o \</div><div class='add'>+	dcn201_mpc.o dcn201_hubp.o dcn201_opp.o \</div><div class='ctx'> 	dcn201_dccg.o dcn201_link_encoder.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_DCN201 = $(addprefix $(AMDDALPATH)/dc/dcn201/,$(DCN201))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c<br/>index 037d265431c6..63798132ed95 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> </div><div class='ctx'> static bool hubbub201_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -103,5 +103,5 @@ void hubbub201_construct(struct dcn20_hubbub *hubbub,</div><div class='ctx'> 	hubbub-&gt;masks = hubbub_mask;</div><div class='ctx'> </div><div class='ctx'> 	hubbub-&gt;debug_test_index_pstate = 0xB;</div><div class='del'>-	hubbub-&gt;detile_buf_size = 164 * 1024;</div><div class='add'>+	hubbub-&gt;detile_buf_size = 164 * 1024; /* 164KB for DCN2.0 */</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c<br/>index 35dd4bac242a..cd2bfcc51276 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c</a></div><div class='hunk'>@@ -77,6 +77,7 @@ static void hubp201_program_requestor(struct hubp *hubp,</div><div class='ctx'> 			MRQ_EXPANSION_MODE, rq_regs-&gt;mrq_expansion_mode,</div><div class='ctx'> 			CRQ_EXPANSION_MODE, rq_regs-&gt;crq_expansion_mode);</div><div class='ctx'> </div><div class='add'>+	/* no need to program PTE */</div><div class='ctx'> 	REG_SET_5(DCHUBP_REQ_SIZE_CONFIG, 0,</div><div class='ctx'> 		CHUNK_SIZE, rq_regs-&gt;rq_regs_l.chunk_size,</div><div class='ctx'> 		MIN_CHUNK_SIZE, rq_regs-&gt;rq_regs_l.min_chunk_size,</div><div class='hunk'>@@ -99,6 +100,10 @@ static void hubp201_setup(</div><div class='ctx'> 		struct _vcs_dpi_display_rq_regs_st *rq_regs,</div><div class='ctx'> 		struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * otg is locked when this func is called. Register are double buffered.</div><div class='add'>+	 * disable the requestors is not needed</div><div class='add'>+	 */</div><div class='ctx'> 	hubp2_vready_at_or_After_vsync(hubp, pipe_dest);</div><div class='ctx'> 	hubp201_program_requestor(hubp, rq_regs);</div><div class='ctx'> 	hubp201_program_deadline(hubp, dlg_attr, ttu_attr);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h<br/>index 8b95ef251332..be25e8dc0636 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.h</a></div><div class='hunk'>@@ -30,6 +30,10 @@</div><div class='ctx'> </div><div class='ctx'> #define DPCS_DCN201_MASK_SH_LIST(mask_sh)\</div><div class='ctx'> 	DPCS_MASK_SH_LIST(mask_sh),\</div><div class='add'>+	LE_SF(DPCSSYS_CR0_RAWLANE0_DIG_PCS_XF_RX_OVRD_IN_2, VCO_LD_VAL_OVRD, mask_sh),\</div><div class='add'>+	LE_SF(DPCSSYS_CR0_RAWLANE0_DIG_PCS_XF_RX_OVRD_IN_2, VCO_LD_VAL_OVRD_EN, mask_sh),\</div><div class='add'>+	LE_SF(DPCSSYS_CR0_RAWLANE0_DIG_PCS_XF_RX_OVRD_IN_3, REF_LD_VAL_OVRD, mask_sh),\</div><div class='add'>+	LE_SF(DPCSSYS_CR0_RAWLANE0_DIG_PCS_XF_RX_OVRD_IN_3, REF_LD_VAL_OVRD_EN, mask_sh),\</div><div class='ctx'> 	LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL2, RDPCS_PHY_DPALT_DISABLE_ACK, mask_sh),\</div><div class='ctx'> 	LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL2, RDPCS_PHY_DPALT_DISABLE, mask_sh),\</div><div class='ctx'> 	LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL2, RDPCS_PHY_DPALT_DP4, mask_sh),\</div><div class='hunk'>@@ -44,7 +48,15 @@</div><div class='ctx'> 	LE_SF(RDPCSTX0_RDPCSTX_PHY_CNTL11, RDPCS_PHY_DP_REF_CLK_EN, mask_sh)</div><div class='ctx'> </div><div class='ctx'> #define DPCS_DCN201_REG_LIST(id) \</div><div class='del'>-	DPCS_DCN2_CMN_REG_LIST(id)</div><div class='add'>+	DPCS_DCN2_CMN_REG_LIST(id), \</div><div class='add'>+	SRI_IX(RAWLANE0_DIG_PCS_XF_RX_OVRD_IN_2, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE0_DIG_PCS_XF_RX_OVRD_IN_3, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE1_DIG_PCS_XF_RX_OVRD_IN_2, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE1_DIG_PCS_XF_RX_OVRD_IN_3, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE2_DIG_PCS_XF_RX_OVRD_IN_2, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE2_DIG_PCS_XF_RX_OVRD_IN_3, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE3_DIG_PCS_XF_RX_OVRD_IN_2, DPCSSYS_CR, id), \</div><div class='add'>+	SRI_IX(RAWLANE3_DIG_PCS_XF_RX_OVRD_IN_3, DPCSSYS_CR, id)</div><div class='ctx'> </div><div class='ctx'> void dcn201_link_encoder_construct(</div><div class='ctx'> 	struct dcn20_link_encoder *enc20,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c<br/>index aeb0e0d9b70a..2546224b326a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c</a></div><div class='hunk'>@@ -140,7 +140,7 @@ int hubbub21_init_dchub(struct hubbub *hubbub,</div><div class='ctx'> </div><div class='ctx'> bool hubbub21_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -334,7 +334,7 @@ bool hubbub21_program_urgent_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub21_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -487,7 +487,7 @@ bool hubbub21_program_stutter_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub21_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -573,7 +573,7 @@ bool hubbub21_program_pstate_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub21_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h<br/>index d8eb2bb7282c..ab2ce0313529 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h</a></div><div class='hunk'>@@ -127,22 +127,22 @@ int hubbub21_init_dchub(struct hubbub *hubbub,</div><div class='ctx'> 		struct dcn_hubbub_phys_addr_config *pa_config);</div><div class='ctx'> bool hubbub21_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> bool hubbub21_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> bool hubbub21_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> bool hubbub21_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/Makefile b/drivers/gpu/drm/amd/display/dc/dcn30/Makefile<br/>index b5b2aa3b3783..c6ca70f3c061 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/Makefile</a></div><div class='hunk'>@@ -25,13 +25,11 @@</div><div class='ctx'> </div><div class='ctx'> DCN30 := dcn30_hubbub.o \</div><div class='ctx'> 	dcn30_hubp.o \</div><div class='del'>-	dcn30_dpp.o \</div><div class='ctx'> 	dcn30_dccg.o \</div><div class='ctx'> 	dcn30_mpc.o dcn30_vpg.o \</div><div class='ctx'> 	dcn30_afmt.o \</div><div class='ctx'> 	dcn30_dio_stream_encoder.o \</div><div class='ctx'> 	dcn30_dwb.o \</div><div class='del'>-	dcn30_dpp_cm.o \</div><div class='ctx'> 	dcn30_dwb_cm.o \</div><div class='ctx'> 	dcn30_cm_common.o \</div><div class='ctx'> 	dcn30_mmhubbub.o \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c<br/>index ddb344056d40..b8327237ed44 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn30_dpp.h"</div><div class='add'>+#include "dcn30/dcn30_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> #include "dcn30_cm_common.h"</div><div class='ctx'> #include "custom_float.h"</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h<br/>index 35a613bb08bf..3f1da7f3a91c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h</a></div><div class='hunk'>@@ -29,15 +29,9 @@</div><div class='ctx'> #include "dcn20/dcn20_dccg.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#define DCCG_REG_LIST_DCN3AG() \</div><div class='del'>-	DCCG_COMMON_REG_LIST_DCN_BASE(),\</div><div class='del'>-	SR(PHYASYMCLK_CLOCK_CNTL),\</div><div class='del'>-	SR(PHYBSYMCLK_CLOCK_CNTL),\</div><div class='del'>-	SR(PHYCSYMCLK_CLOCK_CNTL)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #define DCCG_REG_LIST_DCN30() \</div><div class='ctx'> 	DCCG_REG_LIST_DCN2(),\</div><div class='add'>+	DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\</div><div class='ctx'> 	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\</div><div class='ctx'> 	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\</div><div class='ctx'> 	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\</div><div class='hunk'>@@ -46,19 +40,10 @@</div><div class='ctx'> 	SR(PHYBSYMCLK_CLOCK_CNTL),\</div><div class='ctx'> 	SR(PHYCSYMCLK_CLOCK_CNTL)</div><div class='ctx'> </div><div class='del'>-#define DCCG_MASK_SH_LIST_DCN3AG(mask_sh) \</div><div class='del'>-	DCCG_MASK_SH_LIST_DCN2_1(mask_sh),\</div><div class='del'>-	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_EN, mask_sh),\</div><div class='del'>-	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_SRC_SEL, mask_sh),\</div><div class='del'>-	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\</div><div class='del'>-	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\</div><div class='del'>-	DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\</div><div class='del'>-	DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\</div><div class='del'>-	DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\</div><div class='del'>-	DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh)</div><div class='del'>-</div><div class='ctx'> #define DCCG_MASK_SH_LIST_DCN3(mask_sh) \</div><div class='ctx'> 	DCCG_MASK_SH_LIST_DCN2(mask_sh),\</div><div class='add'>+	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_EN, mask_sh),\</div><div class='add'>+	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_SRC_SEL, mask_sh),\</div><div class='ctx'> 	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\</div><div class='ctx'> 	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\</div><div class='ctx'> 	DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c<br/>index 1fb8fd7afc95..b8e31b5ea114 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c</a></div><div class='hunk'>@@ -30,8 +30,6 @@</div><div class='ctx'> #include "dcn30_dio_link_encoder.h"</div><div class='ctx'> #include "stream_encoder.h"</div><div class='ctx'> #include "dc_bios_types.h"</div><div class='del'>-/* #include "dcn3ag/dcn3ag_phy_fw.h" */</div><div class='del'>-</div><div class='ctx'> #include "gpio_service_interface.h"</div><div class='ctx'> </div><div class='ctx'> #define CTX \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h<br/>index f2d90f2b8bf1..5b6177c2ae98 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h</a></div><div class='hunk'>@@ -55,7 +55,8 @@</div><div class='ctx'> 	SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)</div><div class='ctx'> </div><div class='ctx'> #define LINK_ENCODER_MASK_SH_LIST_DCN30(mask_sh) \</div><div class='del'>-	LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh)</div><div class='add'>+	LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh),\</div><div class='add'>+	LE_SF(DIG0_TMDS_DCBALANCER_CONTROL, TMDS_SYNC_DCBAL_EN, mask_sh)</div><div class='ctx'> </div><div class='ctx'> #define DPCS_DCN3_MASK_SH_LIST(mask_sh)\</div><div class='ctx'> 	DPCS_DCN2_MASK_SH_LIST(mask_sh),\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c<br/>index 005dbe099a7a..425b830b88d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c</a></div><div class='hunk'>@@ -29,9 +29,6 @@</div><div class='ctx'> #include "reg_helper.h"</div><div class='ctx'> #include "hw_shared.h"</div><div class='ctx'> #include "dc.h"</div><div class='del'>-#include "core_types.h"</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 		enc1-&gt;base.ctx-&gt;logger</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c<br/>index 1b9d9495f76d..fae98cf52020 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c</a></div><div class='hunk'>@@ -251,9 +251,7 @@ static const struct dwbc_funcs dcn30_dwbc_funcs = {</div><div class='ctx'> 	.set_fc_enable		= dwb3_set_fc_enable,</div><div class='ctx'> 	.set_stereo		= dwb3_set_stereo,</div><div class='ctx'> 	.set_new_content	= dwb3_set_new_content,</div><div class='del'>-	.dwb_program_output_csc	= NULL,</div><div class='ctx'> 	.dwb_ogam_set_input_transfer_func	= dwb3_ogam_set_input_transfer_func, //TODO: rename</div><div class='del'>-	.dwb_set_scaler		= NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dcn30_dwbc_construct(struct dcn30_dwbc *dwbc30,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h<br/>index 332634b76aac..0f3f7c5fbaec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h</a></div><div class='hunk'>@@ -217,6 +217,7 @@</div><div class='ctx'> 	SF_DWB2(DWB_OGAM_LUT_DATA, DWBCP, 0, DWB_OGAM_LUT_DATA, mask_sh),\</div><div class='ctx'> 	SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_WRITE_COLOR_MASK, mask_sh),\</div><div class='ctx'> 	SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_READ_COLOR_SEL, mask_sh),\</div><div class='add'>+	SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_READ_DBG, mask_sh),\</div><div class='ctx'> 	SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_HOST_SEL, mask_sh),\</div><div class='ctx'> 	SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_CONFIG_MODE, mask_sh),\</div><div class='ctx'> 	SF_DWB2(DWB_OGAM_RAMA_START_CNTL_B, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_B, mask_sh),\</div><div class='hunk'>@@ -524,6 +525,7 @@</div><div class='ctx'> 	type DWB_OGAM_LUT_DATA;\</div><div class='ctx'> 	type DWB_OGAM_LUT_WRITE_COLOR_MASK;\</div><div class='ctx'> 	type DWB_OGAM_LUT_READ_COLOR_SEL;\</div><div class='add'>+	type DWB_OGAM_LUT_READ_DBG;\</div><div class='ctx'> 	type DWB_OGAM_LUT_HOST_SEL;\</div><div class='ctx'> 	type DWB_OGAM_LUT_CONFIG_MODE;\</div><div class='ctx'> 	type DWB_OGAM_LUT_STATUS;\</div><div class='hunk'>@@ -710,7 +712,7 @@</div><div class='ctx'> 	type DWB_OGAM_RAMB_EXP_REGION32_LUT_OFFSET;\</div><div class='ctx'> 	type DWB_OGAM_RAMB_EXP_REGION32_NUM_SEGMENTS;\</div><div class='ctx'> 	type DWB_OGAM_RAMB_EXP_REGION33_LUT_OFFSET;\</div><div class='del'>-	type DWB_OGAM_RAMB_EXP_REGION33_NUM_SEGMENTS;</div><div class='add'>+	type DWB_OGAM_RAMB_EXP_REGION33_NUM_SEGMENTS</div><div class='ctx'> </div><div class='ctx'> struct dcn30_dwbc_registers {</div><div class='ctx'> 	/* DCN3AG */</div><div class='hunk'>@@ -733,6 +735,10 @@ struct dcn30_dwbc_registers {</div><div class='ctx'> 	uint32_t DWB_MMHUBBUB_BACKPRESSURE_CNT;</div><div class='ctx'> 	uint32_t DWB_HOST_READ_CONTROL;</div><div class='ctx'> 	uint32_t DWB_SOFT_RESET;</div><div class='add'>+	uint32_t DWB_DEBUG_CTRL;</div><div class='add'>+	uint32_t DWB_DEBUG;</div><div class='add'>+	uint32_t DWB_TEST_DEBUG_INDEX;</div><div class='add'>+	uint32_t DWB_TEST_DEBUG_DATA;</div><div class='ctx'> </div><div class='ctx'> 	/* DWBSCL */</div><div class='ctx'> 	uint32_t DWBSCL_COEF_RAM_TAP_SELECT;</div><div class='hunk'>@@ -747,6 +753,9 @@ struct dcn30_dwbc_registers {</div><div class='ctx'> 	uint32_t DWBSCL_DEST_SIZE;</div><div class='ctx'> 	uint32_t DWBSCL_OVERFLOW_STATUS;</div><div class='ctx'> 	uint32_t DWBSCL_OVERFLOW_COUNTER;</div><div class='add'>+	uint32_t DWBSCL_DEBUG;</div><div class='add'>+	uint32_t DWBSCL_TEST_DEBUG_INDEX;</div><div class='add'>+	uint32_t DWBSCL_TEST_DEBUG_DATA;</div><div class='ctx'> </div><div class='ctx'> 	/* DWBCP */</div><div class='ctx'> 	uint32_t DWB_HDR_MULT_COEF;</div><div class='hunk'>@@ -838,6 +847,9 @@ struct dcn30_dwbc_registers {</div><div class='ctx'> 	uint32_t DWB_OGAM_RAMB_REGION_28_29;</div><div class='ctx'> 	uint32_t DWB_OGAM_RAMB_REGION_30_31;</div><div class='ctx'> 	uint32_t DWB_OGAM_RAMB_REGION_32_33;</div><div class='add'>+	uint32_t DWBCP_DEBUG;</div><div class='add'>+	uint32_t DWBCP_TEST_DEBUG_INDEX;</div><div class='add'>+	uint32_t DWBCP_TEST_DEBUG_DATA;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Internal enums / structs */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c<br/>index 152c9c5733f1..6a5af3da4b45 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ int hubbub3_init_dchub_sys_ctx(struct hubbub *hubbub,</div><div class='ctx'> </div><div class='ctx'> bool hubbub3_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h<br/>index 7b597908b937..ca6233e8f1f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h</a></div><div class='hunk'>@@ -124,7 +124,7 @@ bool hubbub3_get_dcc_compression_cap(struct hubbub *hubbub,</div><div class='ctx'> </div><div class='ctx'> bool hubbub3_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c<br/>index 75547ce86c09..60a64d290352 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c</a></div><div class='hunk'>@@ -455,6 +455,9 @@ void hubp3_read_state(struct hubp *hubp)</div><div class='ctx'> 	if (REG(DCHUBP_CNTL))</div><div class='ctx'> 		s-&gt;hubp_cntl = REG_READ(DCHUBP_CNTL);</div><div class='ctx'> </div><div class='add'>+	if (REG(DCSURF_FLIP_CONTROL))</div><div class='add'>+		s-&gt;flip_control = REG_READ(DCSURF_FLIP_CONTROL);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hubp3_setup(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c<br/>index 5ebb57303130..fca94e50ae93 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c</a></div><div class='hunk'>@@ -1183,7 +1183,7 @@ void mpc3_get_gamut_remap(struct mpc *mpc,</div><div class='ctx'> 			  struct mpc_grph_gamut_adjustment *adjust)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);</div><div class='del'>-	uint16_t arr_reg_val[12];</div><div class='add'>+	uint16_t arr_reg_val[12] = {0};</div><div class='ctx'> 	int select;</div><div class='ctx'> </div><div class='ctx'> 	read_gamut_remap(mpc30, mpcc_id, arr_reg_val, &amp;select);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h<br/>index ed9a5549c389..466ba20b9c61 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #ifndef __DAL_DCN30_VPG_H__</div><div class='ctx'> #define __DAL_DCN30_VPG_H__</div><div class='ctx'> </div><div class='add'>+#include "vpg.h"</div><div class='ctx'> </div><div class='ctx'> #define DCN30_VPG_FROM_VPG(vpg)\</div><div class='ctx'> 	container_of(vpg, struct dcn30_vpg, base)</div><div class='hunk'>@@ -132,28 +133,6 @@ struct dcn30_vpg_mask {</div><div class='ctx'> 	VPG_DCN3_REG_FIELD_LIST(uint32_t);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct vpg;</div><div class='del'>-</div><div class='del'>-struct vpg_funcs {</div><div class='del'>-	void (*update_generic_info_packet)(</div><div class='del'>-		struct vpg *vpg,</div><div class='del'>-		uint32_t packet_index,</div><div class='del'>-		const struct dc_info_packet *info_packet,</div><div class='del'>-		bool immediate_update);</div><div class='del'>-</div><div class='del'>-	void (*vpg_poweron)(</div><div class='del'>-		struct vpg *vpg);</div><div class='del'>-</div><div class='del'>-	void (*vpg_powerdown)(</div><div class='del'>-		struct vpg *vpg);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct vpg {</div><div class='del'>-	const struct vpg_funcs *funcs;</div><div class='del'>-	struct dc_context *ctx;</div><div class='del'>-	int inst;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct dcn30_vpg {</div><div class='ctx'> 	struct vpg base;</div><div class='ctx'> 	const struct dcn30_vpg_registers *regs;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h<br/>index 73db962dbc03..067e49cb238e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn301/dcn301_dccg.h</a></div><div class='hunk'>@@ -56,10 +56,4 @@ struct dccg *dccg301_create(</div><div class='ctx'> 	const struct dccg_shift *dccg_shift,</div><div class='ctx'> 	const struct dccg_mask *dccg_mask);</div><div class='ctx'> </div><div class='del'>-struct dccg *dccg301_create(</div><div class='del'>-	struct dc_context *ctx,</div><div class='del'>-	const struct dccg_registers *regs,</div><div class='del'>-	const struct dccg_shift *dccg_shift,</div><div class='del'>-	const struct dccg_mask *dccg_mask);</div><div class='del'>-</div><div class='ctx'> #endif //__DCN301_DCCG_H__</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c<br/>index a046664e2031..c1959672df50 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c</a></div><div class='hunk'>@@ -63,6 +63,7 @@ static const struct hubbub_funcs hubbub301_funcs = {</div><div class='ctx'> 	.verify_allow_pstate_change_high = hubbub1_verify_allow_pstate_change_high,</div><div class='ctx'> 	.force_wm_propagate_to_pipes = hubbub3_force_wm_propagate_to_pipes,</div><div class='ctx'> 	.force_pstate_change_control = hubbub3_force_pstate_change_control,</div><div class='add'>+	.init_watermarks = hubbub3_init_watermarks,</div><div class='ctx'> 	.hubbub_read_state = hubbub2_read_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h<br/>index e3caaacf7493..e3be0bab4007 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h</a></div><div class='hunk'>@@ -34,12 +34,14 @@</div><div class='ctx'> 	DCCG_SRII(DTO_PARAM, DPPCLK, 1),\</div><div class='ctx'> 	DCCG_SRII(DTO_PARAM, DPPCLK, 2),\</div><div class='ctx'> 	DCCG_SRII(DTO_PARAM, DPPCLK, 3),\</div><div class='add'>+	DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\</div><div class='ctx'> 	SR(PHYASYMCLK_CLOCK_CNTL),\</div><div class='ctx'> 	SR(PHYBSYMCLK_CLOCK_CNTL),\</div><div class='ctx'> 	SR(PHYCSYMCLK_CLOCK_CNTL),\</div><div class='ctx'> 	SR(PHYDSYMCLK_CLOCK_CNTL),\</div><div class='ctx'> 	SR(PHYESYMCLK_CLOCK_CNTL),\</div><div class='ctx'> 	SR(DPSTREAMCLK_CNTL),\</div><div class='add'>+	SR(HDMISTREAMCLK_CNTL),\</div><div class='ctx'> 	SR(SYMCLK32_SE_CNTL),\</div><div class='ctx'> 	SR(SYMCLK32_LE_CNTL),\</div><div class='ctx'> 	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\</div><div class='hunk'>@@ -78,6 +80,8 @@</div><div class='ctx'> 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\</div><div class='ctx'> 	DCCG_SF(DPPCLK0_DTO_PARAM, DPPCLK0_DTO_PHASE, mask_sh),\</div><div class='ctx'> 	DCCG_SF(DPPCLK0_DTO_PARAM, DPPCLK0_DTO_MODULO, mask_sh),\</div><div class='add'>+	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_EN, mask_sh),\</div><div class='add'>+	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_SRC_SEL, mask_sh),\</div><div class='ctx'> 	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\</div><div class='ctx'> 	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\</div><div class='ctx'> 	DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\</div><div class='hunk'>@@ -92,6 +96,8 @@</div><div class='ctx'> 	DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE1_EN, mask_sh),\</div><div class='ctx'> 	DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE2_EN, mask_sh),\</div><div class='ctx'> 	DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE3_EN, mask_sh),\</div><div class='add'>+	DCCG_SF(HDMISTREAMCLK_CNTL, HDMISTREAMCLK0_SRC_SEL, mask_sh),\</div><div class='add'>+	DCCG_SF(HDMISTREAMCLK_CNTL, HDMISTREAMCLK0_DTO_FORCE_DIS, mask_sh),\</div><div class='ctx'> 	DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_SRC_SEL, mask_sh),\</div><div class='ctx'> 	DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_SRC_SEL, mask_sh),\</div><div class='ctx'> 	DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_SRC_SEL, mask_sh),\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c<br/>index 26be5fee7411..b2cea59ba5d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c</a></div><div class='hunk'>@@ -205,7 +205,7 @@ void dcn31_link_encoder_set_dio_phy_mux(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enc31_hw_init(struct link_encoder *enc)</div><div class='add'>+void enc31_hw_init(struct link_encoder *enc)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h<br/>index 221671563a0b..ee78ba80797c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.h</a></div><div class='hunk'>@@ -89,6 +89,7 @@</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE1, RDPCSTX, id), \</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE2, RDPCSTX, id), \</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \</div><div class='add'>+	SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \</div><div class='ctx'> 	SR(RDPCSTX0_RDPCSTX_SCRATCH), \</div><div class='ctx'> 	SRI(RDPCSTX_PHY_RX_LD_VAL, RDPCSTX, id),\</div><div class='ctx'> 	SRI(RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG, RDPCSTX, id)</div><div class='hunk'>@@ -222,6 +223,7 @@</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE1, RDPCSTX, id), \</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE2, RDPCSTX, id), \</div><div class='ctx'> 	SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \</div><div class='add'>+	SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \</div><div class='ctx'> 	SR(RDPCSTX0_RDPCSTX_SCRATCH), \</div><div class='ctx'> 	SRI(RDPCSTX_PHY_RX_LD_VAL, RDPCSTX, id),\</div><div class='ctx'> 	SRI(RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG, RDPCSTX, id)</div><div class='hunk'>@@ -283,4 +285,6 @@ bool dcn31_link_encoder_is_in_alt_mode(</div><div class='ctx'> void dcn31_link_encoder_get_max_link_cap(struct link_encoder *enc,</div><div class='ctx'> 	struct dc_link_settings *link_settings);</div><div class='ctx'> </div><div class='add'>+void enc31_hw_init(struct link_encoder *enc);</div><div class='add'>+</div><div class='ctx'> #endif /* __DC_LINK_ENCODER__DCN31_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c<br/>index 5b7ad38f85e0..03b4ac2f1991 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c</a></div><div class='hunk'>@@ -377,7 +377,7 @@ void dcn31_hpo_dp_link_enc_update_stream_allocation_table(</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WAIT(DP_DPHY_SYM32_STATUS,</div><div class='ctx'> 			SAT_UPDATE_PENDING, 0,</div><div class='del'>-			10, DP_SAT_UPDATE_MAX_RETRY);</div><div class='add'>+			100, DP_SAT_UPDATE_MAX_RETRY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn31_hpo_dp_link_enc_set_throttled_vcp_size(</div><div class='hunk'>@@ -395,6 +395,12 @@ void dcn31_hpo_dp_link_enc_set_throttled_vcp_size(</div><div class='ctx'> 				x),</div><div class='ctx'> 			25));</div><div class='ctx'> </div><div class='add'>+	// If y rounds up to integer, carry it over to x.</div><div class='add'>+	if (y &gt;&gt; 25) {</div><div class='add'>+		x += 1;</div><div class='add'>+		y = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (stream_encoder_inst) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_SET_2(DP_DPHY_SYM32_VC_RATE_CNTL0, 0,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c<br/>index 45143459eedd..678db949cfe3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c</a></div><div class='hunk'>@@ -474,6 +474,10 @@ static void dcn31_hpo_dp_stream_enc_update_dp_info_packets(</div><div class='ctx'> 				&amp;info_frame-&gt;hdrsmd,</div><div class='ctx'> 				true);</div><div class='ctx'> </div><div class='add'>+	/* packetIndex 4 is used for send immediate sdp message, and please</div><div class='add'>+	 * use other packetIndex (such as 5,6) for other info packet</div><div class='add'>+	 */</div><div class='add'>+</div><div class='ctx'> 	if (info_frame-&gt;adaptive_sync.valid)</div><div class='ctx'> 		enc-&gt;vpg-&gt;funcs-&gt;update_generic_info_packet(</div><div class='ctx'> 				enc-&gt;vpg,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c<br/>index 5b5b5e0775fa..b906db6e7355 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c</a></div><div class='hunk'>@@ -172,7 +172,7 @@ static uint32_t convert_and_clamp(</div><div class='ctx'> </div><div class='ctx'> static bool hubbub31_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -362,7 +362,7 @@ static bool hubbub31_program_urgent_watermarks(</div><div class='ctx'> </div><div class='ctx'> static bool hubbub31_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -635,7 +635,7 @@ static bool hubbub31_program_stutter_watermarks(</div><div class='ctx'> </div><div class='ctx'> static bool hubbub31_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -717,7 +717,7 @@ static bool hubbub31_program_pstate_watermarks(</div><div class='ctx'> </div><div class='ctx'> static bool hubbub31_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c<br/>index 281be20b1a10..20c6fe48567f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c</a></div><div class='hunk'>@@ -173,5 +173,12 @@ void dcn31_panel_cntl_construct(</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dcn31_panel_cntl-&gt;base.pwrseq_inst = pwrseq_inst;</div><div class='add'>+	if (dcn31_panel_cntl-&gt;base.ctx-&gt;dc-&gt;config.support_edp0_on_dp1)</div><div class='add'>+		//If supported, power sequencer mapping shall follow the DIG instance</div><div class='add'>+		dcn31_panel_cntl-&gt;base.pwrseq_inst = pwrseq_inst;</div><div class='add'>+	else</div><div class='add'>+		/* If not supported, pwrseq will be assigned in order,</div><div class='add'>+		 * so first pwrseq will be assigned to first panel instance (legacy behavior)</div><div class='add'>+		 */</div><div class='add'>+		dcn31_panel_cntl-&gt;base.pwrseq_inst = dcn31_panel_cntl-&gt;base.inst;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c<br/>index f1deb1c3c363..cfb923d85630 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c</a></div><div class='hunk'>@@ -63,7 +63,12 @@ void vpg31_poweron(struct vpg *vpg)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn31_vpg *vpg31 = DCN31_VPG_FROM_VPG(vpg);</div><div class='ctx'> </div><div class='del'>-	if (vpg-&gt;ctx-&gt;dc-&gt;debug.enable_mem_low_power.bits.vpg == false)</div><div class='add'>+	uint32_t vpg_gsp_mem_pwr_state;</div><div class='add'>+</div><div class='add'>+	REG_GET(VPG_MEM_PWR, VPG_GSP_MEM_PWR_STATE, &amp;vpg_gsp_mem_pwr_state);</div><div class='add'>+</div><div class='add'>+	if (vpg-&gt;ctx-&gt;dc-&gt;debug.enable_mem_low_power.bits.vpg == false &amp;&amp;</div><div class='add'>+			vpg_gsp_mem_pwr_state == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 1, VPG_GSP_LIGHT_SLEEP_FORCE, 0);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h<br/>index 0e76eabce441..609e58dbd056 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #ifndef __DAL_DCN31_VPG_H__</div><div class='ctx'> #define __DAL_DCN31_VPG_H__</div><div class='ctx'> </div><div class='add'>+#include "vpg.h"</div><div class='ctx'> </div><div class='ctx'> #define DCN31_VPG_FROM_VPG(vpg)\</div><div class='ctx'> 	container_of(vpg, struct dcn31_vpg, base)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/Makefile b/drivers/gpu/drm/amd/display/dc/dcn32/Makefile<br/>index 5314770fff1c..a58c37165f5a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/Makefile</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> # Makefile for dcn32.</div><div class='ctx'> </div><div class='ctx'> DCN32 = dcn32_hubbub.o dcn32_dccg.o \</div><div class='del'>-		dcn32_mmhubbub.o dcn32_dpp.o dcn32_hubp.o dcn32_mpc.o \</div><div class='add'>+		dcn32_mmhubbub.o dcn32_hubp.o dcn32_mpc.o \</div><div class='ctx'> 		dcn32_dio_stream_encoder.o dcn32_dio_link_encoder.o dcn32_resource_helpers.o \</div><div class='ctx'> 		dcn32_hpo_dp_link_encoder.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c<br/>index 8a0460e86309..d9ff95cd2dbd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c</a></div><div class='hunk'>@@ -248,13 +248,13 @@ void dcn32_link_encoder_construct(</div><div class='ctx'> 	enc10-&gt;base.hpd_source = init_data-&gt;hpd_source;</div><div class='ctx'> 	enc10-&gt;base.connector = init_data-&gt;connector;</div><div class='ctx'> </div><div class='del'>-	if (enc10-&gt;base.connector.id == CONNECTOR_ID_USBC)</div><div class='del'>-		enc10-&gt;base.features.flags.bits.DP_IS_USB_C = 1;</div><div class='del'>-</div><div class='ctx'> 	enc10-&gt;base.preferred_engine = ENGINE_ID_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	enc10-&gt;base.features = *enc_features;</div><div class='ctx'> </div><div class='add'>+	if (enc10-&gt;base.connector.id == CONNECTOR_ID_USBC)</div><div class='add'>+		enc10-&gt;base.features.flags.bits.DP_IS_USB_C = 1;</div><div class='add'>+</div><div class='ctx'> 	enc10-&gt;base.transmitter = init_data-&gt;transmitter;</div><div class='ctx'> </div><div class='ctx'> 	/* set the flag to indicate whether driver poll the I2C data pin</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h<br/>index 2d5f25290ed1..35d23d9db45e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h</a></div><div class='hunk'>@@ -26,15 +26,7 @@</div><div class='ctx'> #ifndef __DC_LINK_ENCODER__DCN32_H__</div><div class='ctx'> #define __DC_LINK_ENCODER__DCN32_H__</div><div class='ctx'> </div><div class='del'>-#include "dcn31/dcn31_dio_link_encoder.h"</div><div class='del'>-</div><div class='del'>-#define LE_DCN32_REG_LIST(id)\</div><div class='del'>-	LE_DCN31_REG_LIST(id),\</div><div class='del'>-	SRI(DIG_FIFO_CTRL0, DIG, id)</div><div class='del'>-</div><div class='del'>-#define LINK_ENCODER_MASK_SH_LIST_DCN32(mask_sh) \</div><div class='del'>-	LINK_ENCODER_MASK_SH_LIST_DCN31(mask_sh),\</div><div class='del'>-	LE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_MODE, mask_sh)</div><div class='add'>+#include "dcn30/dcn30_dio_link_encoder.h"</div><div class='ctx'> </div><div class='ctx'> void dcn32_link_encoder_construct(</div><div class='ctx'> 	struct dcn20_link_encoder *enc20,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h<br/>index 1be5410cce97..ca53d39561d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h</a></div><div class='hunk'>@@ -177,11 +177,12 @@</div><div class='ctx'> 	SE_SF(DIG0_DIG_FE_CNTL, DIG_SYMCLK_FE_ON, mask_sh),\</div><div class='ctx'> 	SE_SF(DP0_DP_SEC_FRAMING4, DP_SST_SDP_SPLITTING, mask_sh),\</div><div class='ctx'> 	SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\</div><div class='add'>+	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_MODE, mask_sh),\</div><div class='ctx'> 	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_READ_START_LEVEL, mask_sh),\</div><div class='ctx'> 	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, mask_sh),\</div><div class='ctx'> 	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_RESET, mask_sh),\</div><div class='del'>-	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, mask_sh),\</div><div class='del'>-	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_MODE, mask_sh)</div><div class='add'>+	SE_SF(DIG0_DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, mask_sh)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> void dcn32_dio_stream_encoder_construct(</div><div class='ctx'> 	struct dcn10_stream_encoder *enc1,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c<br/>index 88dfc907553d..515c4c2b4c21 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c</a></div><div class='hunk'>@@ -167,7 +167,7 @@ static uint32_t convert_and_clamp(</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -357,7 +357,7 @@ bool hubbub32_program_urgent_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -503,7 +503,7 @@ bool hubbub32_program_stutter_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -656,7 +656,7 @@ bool hubbub32_program_pstate_watermarks(</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_usr_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -750,7 +750,7 @@ void hubbub32_force_usr_retraining_allow(struct hubbub *hubbub, bool allow)</div><div class='ctx'> </div><div class='ctx'> static bool hubbub32_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h<br/>index f073839a4b6d..e439ba0fa30f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h</a></div><div class='hunk'>@@ -118,25 +118,25 @@</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_urgent_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_stutter_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_pstate_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='ctx'> bool hubbub32_program_usr_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c<br/>index f98def6c8c2d..fbcd6f7bc993 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c</a></div><div class='hunk'>@@ -35,25 +35,6 @@ static bool is_dual_plane(enum surface_pixel_format format)</div><div class='ctx'> 	return format &gt;= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-uint32_t dcn32_helper_mall_bytes_to_ways(</div><div class='del'>-		struct dc *dc,</div><div class='del'>-		uint32_t total_size_in_mall_bytes)</div><div class='del'>-{</div><div class='del'>-	uint32_t cache_lines_used, lines_per_way, total_cache_lines, num_ways;</div><div class='del'>-</div><div class='del'>-	/* add 2 lines for worst case alignment */</div><div class='del'>-	cache_lines_used = total_size_in_mall_bytes / dc-&gt;caps.cache_line_size + 2;</div><div class='del'>-</div><div class='del'>-	total_cache_lines = dc-&gt;caps.max_cab_allocation_bytes / dc-&gt;caps.cache_line_size;</div><div class='del'>-	lines_per_way = total_cache_lines / dc-&gt;caps.cache_num_ways;</div><div class='del'>-	num_ways = cache_lines_used / lines_per_way;</div><div class='del'>-	if (cache_lines_used % lines_per_way &gt; 0)</div><div class='del'>-		num_ways++;</div><div class='del'>-</div><div class='del'>-	return num_ways;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> uint32_t dcn32_helper_calculate_mall_bytes_for_cursor(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='hunk'>@@ -112,8 +93,10 @@ uint32_t dcn32_helper_calculate_num_ways_for_subvp(</div><div class='ctx'> 	if (context-&gt;bw_ctx.bw.dcn.mall_subvp_size_bytes &gt; 0) {</div><div class='ctx'> 		if (dc-&gt;debug.force_subvp_num_ways) {</div><div class='ctx'> 			return dc-&gt;debug.force_subvp_num_ways;</div><div class='add'>+		} else if (dc-&gt;res_pool-&gt;funcs-&gt;calculate_mall_ways_from_bytes) {</div><div class='add'>+			return dc-&gt;res_pool-&gt;funcs-&gt;calculate_mall_ways_from_bytes(dc, context-&gt;bw_ctx.bw.dcn.mall_subvp_size_bytes);</div><div class='ctx'> 		} else {</div><div class='del'>-			return dcn32_helper_mall_bytes_to_ways(dc, context-&gt;bw_ctx.bw.dcn.mall_subvp_size_bytes);</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -399,7 +382,7 @@ void dcn32_set_det_allocations(struct dc *dc, struct dc_state *context,</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_cnt;</div><div class='ctx'> 	struct resource_context *res_ctx = &amp;context-&gt;res_ctx;</div><div class='del'>-	struct pipe_ctx *pipe;</div><div class='add'>+	struct pipe_ctx *pipe = 0;</div><div class='ctx'> 	bool disable_unbounded_requesting = dc-&gt;debug.disable_z9_mpc || dc-&gt;debug.disable_unbounded_requesting;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, pipe_cnt = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c<br/>index 13be5f06d987..05783daa62ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c</a></div><div class='hunk'>@@ -127,11 +127,6 @@ void dcn321_link_encoder_construct(</div><div class='ctx'> 	 * while doing the DP sink detect</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-/*	if (dal_adapter_service_is_feature_supported(as,</div><div class='del'>-		FEATURE_DP_SINK_DETECT_POLL_DATA_PIN))</div><div class='del'>-		enc10-&gt;base.features.flags.bits.</div><div class='del'>-			DP_SINK_DETECT_POLL_DATA_PIN = true;*/</div><div class='del'>-</div><div class='ctx'> 	enc10-&gt;base.output_signals =</div><div class='ctx'> 		SIGNAL_TYPE_DVI_SINGLE_LINK |</div><div class='ctx'> 		SIGNAL_TYPE_DVI_DUAL_LINK |</div><div class='hunk'>@@ -191,7 +186,6 @@ void dcn321_link_encoder_construct(</div><div class='ctx'> 				__func__,</div><div class='ctx'> 				result);</div><div class='ctx'> 	}</div><div class='del'>-	if (enc10-&gt;base.ctx-&gt;dc-&gt;debug.hdmi20_disable) {</div><div class='add'>+	if (enc10-&gt;base.ctx-&gt;dc-&gt;debug.hdmi20_disable)</div><div class='ctx'> 		enc10-&gt;base.features.flags.bits.HDMI_6GB_EN = 0;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/Makefile b/drivers/gpu/drm/amd/display/dc/dcn35/Makefile<br/>index 0e317e0c36a0..d5b4533d2f62 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn35/Makefile</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> DCN35 = dcn35_dio_stream_encoder.o \</div><div class='ctx'> 	dcn35_dio_link_encoder.o dcn35_dccg.o \</div><div class='ctx'> 	dcn35_hubp.o dcn35_hubbub.o \</div><div class='del'>-	dcn35_mmhubbub.o dcn35_opp.o dcn35_dpp.o dcn35_pg_cntl.o dcn35_dwb.o</div><div class='add'>+	dcn35_mmhubbub.o dcn35_opp.o dcn35_pg_cntl.o dcn35_dwb.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_DCN35 = $(addprefix $(AMDDALPATH)/dc/dcn35/,$(DCN35))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c<br/>index f1ba7bb792ea..58dd3c5bbff0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c</a></div><div class='hunk'>@@ -49,15 +49,23 @@ static void dcn35_set_dppclk_enable(struct dccg *dccg,</div><div class='ctx'> 	switch (dpp_inst) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK0_EN, enable);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK1_EN, enable);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK2_EN, enable);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK3_EN, enable);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -100,6 +108,32 @@ static void dccg35_update_dpp_dto(struct dccg *dccg, int dpp_inst,</div><div class='ctx'> 	dccg-&gt;pipe_dppclk_khz[dpp_inst] = req_dppclk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dccg35_set_dppclk_root_clock_gating(struct dccg *dccg,</div><div class='add'>+		 uint32_t dpp_inst, uint32_t enable)</div><div class='add'>+{</div><div class='add'>+	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);</div><div class='add'>+</div><div class='add'>+	if (!dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (dpp_inst) {</div><div class='add'>+	case 0:</div><div class='add'>+		REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, enable);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, enable);</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, enable);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dccg35_get_pixel_rate_div(</div><div class='ctx'> 		struct dccg *dccg,</div><div class='ctx'> 		uint32_t otg_inst,</div><div class='hunk'>@@ -333,21 +367,67 @@ static void dccg35_set_dpstreamclk(</div><div class='ctx'> 	/* enabled to select one of the DTBCLKs for pipe */</div><div class='ctx'> 	switch (dp_hpo_inst) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		REG_UPDATE_2(DPSTREAMCLK_CNTL,</div><div class='del'>-				DPSTREAMCLK0_EN,</div><div class='add'>+		REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN,</div><div class='ctx'> 				(src == REFCLK) ? 0 : 1, DPSTREAMCLK0_SRC_SEL, otg_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK0_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN,</div><div class='ctx'> 				(src == REFCLK) ? 0 : 1, DPSTREAMCLK1_SRC_SEL, otg_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK1_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN,</div><div class='ctx'> 				(src == REFCLK) ? 0 : 1, DPSTREAMCLK2_SRC_SEL, otg_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK2_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN,</div><div class='ctx'> 				(src == REFCLK) ? 0 : 1, DPSTREAMCLK3_SRC_SEL, otg_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK3_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BREAK_TO_DEBUGGER();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void dccg35_set_dpstreamclk_root_clock_gating(</div><div class='add'>+		struct dccg *dccg,</div><div class='add'>+		int dp_hpo_inst,</div><div class='add'>+		bool enable)</div><div class='add'>+{</div><div class='add'>+	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);</div><div class='add'>+</div><div class='add'>+	switch (dp_hpo_inst) {</div><div class='add'>+	case 0:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream) {</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK0_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK0_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream) {</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK1_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK1_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream) {</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK2_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK2_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream) {</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK3_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK3_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='hunk'>@@ -355,6 +435,8 @@ static void dccg35_set_dpstreamclk(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void dccg35_set_physymclk_root_clock_gating(</div><div class='ctx'> 		struct dccg *dccg,</div><div class='ctx'> 		int phy_inst,</div><div class='hunk'>@@ -369,22 +451,32 @@ static void dccg35_set_physymclk_root_clock_gating(</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='ctx'> 				PHYASYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+//		REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//				PHYA_REFCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='ctx'> 				PHYBSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+//		REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//				PHYB_REFCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='ctx'> 				PHYCSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+//		REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//				PHYC_REFCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='ctx'> 				PHYDSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+//		REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//				PHYD_REFCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='ctx'> 				PHYESYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+//		REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//				PHYE_REFCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='hunk'>@@ -407,10 +499,16 @@ static void dccg35_set_physymclk(</div><div class='ctx'> 			REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYASYMCLK_EN, 1,</div><div class='ctx'> 					PHYASYMCLK_SRC_SEL, clk_src);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYA_REFCLK_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYASYMCLK_EN, 0,</div><div class='ctx'> 					PHYASYMCLK_SRC_SEL, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYA_REFCLK_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='hunk'>@@ -418,10 +516,16 @@ static void dccg35_set_physymclk(</div><div class='ctx'> 			REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYBSYMCLK_EN, 1,</div><div class='ctx'> 					PHYBSYMCLK_SRC_SEL, clk_src);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYB_REFCLK_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYBSYMCLK_EN, 0,</div><div class='ctx'> 					PHYBSYMCLK_SRC_SEL, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYB_REFCLK_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='hunk'>@@ -429,10 +533,16 @@ static void dccg35_set_physymclk(</div><div class='ctx'> 			REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYCSYMCLK_EN, 1,</div><div class='ctx'> 					PHYCSYMCLK_SRC_SEL, clk_src);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYC_REFCLK_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYCSYMCLK_EN, 0,</div><div class='ctx'> 					PHYCSYMCLK_SRC_SEL, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYC_REFCLK_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='hunk'>@@ -440,10 +550,16 @@ static void dccg35_set_physymclk(</div><div class='ctx'> 			REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYDSYMCLK_EN, 1,</div><div class='ctx'> 					PHYDSYMCLK_SRC_SEL, clk_src);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYD_REFCLK_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYDSYMCLK_EN, 0,</div><div class='ctx'> 					PHYDSYMCLK_SRC_SEL, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYD_REFCLK_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='hunk'>@@ -451,10 +567,16 @@ static void dccg35_set_physymclk(</div><div class='ctx'> 			REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYESYMCLK_EN, 1,</div><div class='ctx'> 					PHYESYMCLK_SRC_SEL, clk_src);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYE_REFCLK_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL,</div><div class='ctx'> 					PHYESYMCLK_EN, 0,</div><div class='ctx'> 					PHYESYMCLK_SRC_SEL, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL4,</div><div class='add'>+//						PHYE_REFCLK_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -491,12 +613,12 @@ static void dccg35_dpp_root_clock_control(</div><div class='ctx'> </div><div class='ctx'> 	if (clock_on) {</div><div class='ctx'> 		/* turn off the DTO and leave phase/modulo at max */</div><div class='del'>-		dcn35_set_dppclk_enable(dccg, dpp_inst, 0);</div><div class='add'>+		dcn35_set_dppclk_enable(dccg, dpp_inst, 1);</div><div class='ctx'> 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,</div><div class='ctx'> 			  DPPCLK0_DTO_PHASE, 0xFF,</div><div class='ctx'> 			  DPPCLK0_DTO_MODULO, 0xFF);</div><div class='ctx'> 	} else {</div><div class='del'>-		dcn35_set_dppclk_enable(dccg, dpp_inst, 1);</div><div class='add'>+		dcn35_set_dppclk_enable(dccg, dpp_inst, 0);</div><div class='ctx'> 		/* turn on the DTO to generate a 0hz clock */</div><div class='ctx'> 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,</div><div class='ctx'> 			  DPPCLK0_DTO_PHASE, 0,</div><div class='hunk'>@@ -575,18 +697,32 @@ void dccg35_init(struct dccg *dccg)</div><div class='ctx'> 		dccg35_disable_symclk32_se(dccg, otg_inst);</div><div class='ctx'> </div><div class='ctx'> 	if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_le)</div><div class='del'>-		for (otg_inst = 0; otg_inst &lt; 2; otg_inst++)</div><div class='add'>+		for (otg_inst = 0; otg_inst &lt; 2; otg_inst++) {</div><div class='ctx'> 			dccg31_disable_symclk32_le(dccg, otg_inst);</div><div class='add'>+			dccg31_set_symclk32_le_root_clock_gating(dccg, otg_inst, false);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+//	if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+//		for (otg_inst = 0; otg_inst &lt; 4; otg_inst++)</div><div class='add'>+//			dccg35_disable_symclk_se(dccg, otg_inst, otg_inst);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream)</div><div class='del'>-		for (otg_inst = 0; otg_inst &lt; 4; otg_inst++)</div><div class='del'>-			dccg314_set_dpstreamclk(dccg, REFCLK, otg_inst,</div><div class='add'>+		for (otg_inst = 0; otg_inst &lt; 4; otg_inst++) {</div><div class='add'>+			dccg35_set_dpstreamclk(dccg, REFCLK, otg_inst,</div><div class='ctx'> 						otg_inst);</div><div class='add'>+			dccg35_set_dpstreamclk_root_clock_gating(dccg, otg_inst, false);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 	if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.physymclk)</div><div class='ctx'> 		for (otg_inst = 0; otg_inst &lt; 5; otg_inst++)</div><div class='ctx'> 			dccg35_set_physymclk_root_clock_gating(dccg, otg_inst,</div><div class='ctx'> 					false);</div><div class='add'>+</div><div class='add'>+	if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='add'>+		for (otg_inst = 0; otg_inst &lt; 4; otg_inst++)</div><div class='add'>+			dccg35_set_dppclk_root_clock_gating(dccg, otg_inst, 0);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'> 	dccg35_enable_global_fgcg_rep(</div><div class='ctx'> 		dccg, dccg-&gt;ctx-&gt;dc-&gt;debug.enable_fine_grain_clock_gating.bits</div><div class='hunk'>@@ -611,24 +747,32 @@ static void dccg35_enable_dscclk(struct dccg *dccg, int inst)</div><div class='ctx'> 				DSCCLK0_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK0_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL,	DSCCLK0_EN, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK1_DTO_PARAM,</div><div class='ctx'> 				DSCCLK1_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK1_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK2_DTO_PARAM,</div><div class='ctx'> 				DSCCLK2_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK2_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK3_DTO_PARAM,</div><div class='ctx'> 				DSCCLK3_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK3_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='hunk'>@@ -650,24 +794,32 @@ static void dccg35_disable_dscclk(struct dccg *dccg,</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK0_DTO_PARAM,</div><div class='ctx'> 				DSCCLK0_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK0_DTO_MODULO, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 0);</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK1_DTO_PARAM,</div><div class='ctx'> 				DSCCLK1_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK1_DTO_MODULO, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 0);</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK2_DTO_PARAM,</div><div class='ctx'> 				DSCCLK2_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK2_DTO_MODULO, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 0);</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK3_DTO_PARAM,</div><div class='ctx'> 				DSCCLK3_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK3_DTO_MODULO, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -682,22 +834,32 @@ static void dccg35_enable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst,</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(SYMCLKA_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKA_CLOCK_ENABLE, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKA_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE(SYMCLKB_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKB_CLOCK_ENABLE, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKB_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE(SYMCLKC_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKC_CLOCK_ENABLE, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKC_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE(SYMCLKD_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKD_CLOCK_ENABLE, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKD_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		REG_UPDATE(SYMCLKE_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKE_CLOCK_ENABLE, 1);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKE_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -706,26 +868,36 @@ static void dccg35_enable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst,</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKA_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKA_FE_EN, 1,</div><div class='ctx'> 				SYMCLKA_FE_SRC_SEL, link_enc_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKA_FE_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKB_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKB_FE_EN, 1,</div><div class='ctx'> 				SYMCLKB_FE_SRC_SEL, link_enc_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKB_FE_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKC_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKC_FE_EN, 1,</div><div class='ctx'> 				SYMCLKC_FE_SRC_SEL, link_enc_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKC_FE_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKD_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKD_FE_EN, 1,</div><div class='ctx'> 				SYMCLKD_FE_SRC_SEL, link_enc_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKD_FE_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKE_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKE_FE_EN, 1,</div><div class='ctx'> 				SYMCLKE_FE_SRC_SEL, link_enc_inst);</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKE_FE_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -786,26 +958,36 @@ static void dccg35_disable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKA_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKA_FE_EN, 0,</div><div class='ctx'> 				SYMCLKA_FE_SRC_SEL, 0);</div><div class='add'>+//		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+//			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKA_FE_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKB_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKB_FE_EN, 0,</div><div class='ctx'> 				SYMCLKB_FE_SRC_SEL, 0);</div><div class='add'>+//		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+//			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKB_FE_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKC_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKC_FE_EN, 0,</div><div class='ctx'> 				SYMCLKC_FE_SRC_SEL, 0);</div><div class='add'>+//		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+//			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKC_FE_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKD_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKD_FE_EN, 0,</div><div class='ctx'> 				SYMCLKD_FE_SRC_SEL, 0);</div><div class='add'>+//		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+//			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKD_FE_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		REG_UPDATE_2(SYMCLKE_CLOCK_ENABLE,</div><div class='ctx'> 				SYMCLKE_FE_EN, 0,</div><div class='ctx'> 				SYMCLKE_FE_SRC_SEL, 0);</div><div class='add'>+//		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_se)</div><div class='add'>+//			REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKE_FE_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -818,22 +1000,32 @@ static void dccg35_disable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			REG_UPDATE(SYMCLKA_CLOCK_ENABLE,</div><div class='ctx'> 					SYMCLKA_CLOCK_ENABLE, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_le)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKA_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='ctx'> 			REG_UPDATE(SYMCLKB_CLOCK_ENABLE,</div><div class='ctx'> 					SYMCLKB_CLOCK_ENABLE, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_le)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKB_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='ctx'> 			REG_UPDATE(SYMCLKC_CLOCK_ENABLE,</div><div class='ctx'> 					SYMCLKC_CLOCK_ENABLE, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_le)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKC_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:</div><div class='ctx'> 			REG_UPDATE(SYMCLKD_CLOCK_ENABLE,</div><div class='ctx'> 					SYMCLKD_CLOCK_ENABLE, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_le)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKD_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4:</div><div class='ctx'> 			REG_UPDATE(SYMCLKE_CLOCK_ENABLE,</div><div class='ctx'> 					SYMCLKE_CLOCK_ENABLE, 0);</div><div class='add'>+//			if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.symclk32_le)</div><div class='add'>+//				REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKE_ROOT_GATE_DISABLE, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -845,6 +1037,7 @@ static const struct dccg_funcs dccg35_funcs = {</div><div class='ctx'> 	.get_dccg_ref_freq = dccg31_get_dccg_ref_freq,</div><div class='ctx'> 	.dccg_init = dccg35_init,</div><div class='ctx'> 	.set_dpstreamclk = dccg35_set_dpstreamclk,</div><div class='add'>+	.set_dpstreamclk_root_clock_gating = dccg35_set_dpstreamclk_root_clock_gating,</div><div class='ctx'> 	.enable_symclk32_se = dccg31_enable_symclk32_se,</div><div class='ctx'> 	.disable_symclk32_se = dccg35_disable_symclk32_se,</div><div class='ctx'> 	.enable_symclk32_le = dccg31_enable_symclk32_le,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c<br/>index da94e5309fba..20f810a6646c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c</a></div><div class='hunk'>@@ -80,7 +80,6 @@ enum signal_type dcn35_get_dig_mode(</div><div class='ctx'> 	default:</div><div class='ctx'> 		return SIGNAL_TYPE_NONE;</div><div class='ctx'> 	}</div><div class='del'>-	return SIGNAL_TYPE_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn35_link_encoder_setup(</div><div class='hunk'>@@ -119,7 +118,7 @@ void dcn35_link_encoder_setup(</div><div class='ctx'> </div><div class='ctx'> void dcn35_link_encoder_init(struct link_encoder *enc)</div><div class='ctx'> {</div><div class='del'>-	enc32_hw_init(enc);</div><div class='add'>+	enc31_hw_init(enc);</div><div class='ctx'> 	dcn35_link_encoder_set_fgcg(enc, enc-&gt;ctx-&gt;dc-&gt;debug.enable_fine_grain_clock_gating.bits.dio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h<br/>index e1e560732a9d..d546a3676304 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.h</a></div><div class='hunk'>@@ -37,7 +37,9 @@</div><div class='ctx'> 	LE_SF(DIG0_DIG_BE_CLK_CNTL, DIG_BE_MODE, mask_sh),\</div><div class='ctx'> 	LE_SF(DIG0_DIG_BE_CLK_CNTL, DIG_BE_CLK_EN, mask_sh),\</div><div class='ctx'> 	LE_SF(DIG0_DIG_BE_CLK_CNTL, DIG_BE_SOFT_RESET, mask_sh),\</div><div class='add'>+	LE_SF(DIG0_DIG_BE_CLK_CNTL, HDCP_SOFT_RESET, mask_sh),\</div><div class='ctx'> 	LE_SF(DIG0_DIG_BE_CLK_CNTL, DIG_BE_SYMCLK_G_CLOCK_ON, mask_sh),\</div><div class='add'>+	LE_SF(DIG0_DIG_BE_CLK_CNTL, DIG_BE_SYMCLK_G_HDCP_CLOCK_ON, mask_sh),\</div><div class='ctx'> 	LE_SF(DIG0_DIG_BE_CLK_CNTL, DIG_BE_SYMCLK_G_TMDS_CLOCK_ON, mask_sh),\</div><div class='ctx'> 	LE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\</div><div class='ctx'> 	LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \</div><div class='hunk'>@@ -114,7 +116,15 @@</div><div class='ctx'> 	LE_SF(DIO_CLK_CNTL, SYMCLK_FE_G_GATE_DIS, mask_sh),\</div><div class='ctx'> 	LE_SF(DIO_CLK_CNTL, SYMCLK_R_GATE_DIS, mask_sh),\</div><div class='ctx'> 	LE_SF(DIO_CLK_CNTL, SYMCLK_G_GATE_DIS, mask_sh),\</div><div class='del'>-	LE_SF(DIO_CLK_CNTL, DIO_FGCG_REP_DIS, mask_sh)</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, DIO_FGCG_REP_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, DISPCLK_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKA_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKB_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKC_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKD_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKE_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKF_G_HDCP_GATE_DIS, mask_sh),\</div><div class='add'>+	LE_SF(DIO_CLK_CNTL, SYMCLKG_G_HDCP_GATE_DIS, mask_sh)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> void dcn35_link_encoder_construct(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h<br/>index 499052329ebb..1212fcee38f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.h</a></div><div class='hunk'>@@ -28,7 +28,6 @@</div><div class='ctx'> #include "dcn30/dcn30_vpg.h"</div><div class='ctx'> #include "dcn30/dcn30_afmt.h"</div><div class='ctx'> #include "stream_encoder.h"</div><div class='del'>-#include "dcn10/dcn10_link_encoder.h"</div><div class='ctx'> #include "dcn20/dcn20_stream_encoder.h"</div><div class='ctx'> </div><div class='ctx'> /* Register bit field name change */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c<br/>index 339bf0c722dd..6293173ba2b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static uint32_t convert_and_clamp(</div><div class='ctx'> </div><div class='ctx'> static bool hubbub35_program_stutter_z8_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='hunk'>@@ -297,7 +297,7 @@ static void hubbub35_get_dchub_ref_freq(struct hubbub *hubbub,</div><div class='ctx'> </div><div class='ctx'> static bool hubbub35_program_watermarks(</div><div class='ctx'> 		struct hubbub *hubbub,</div><div class='del'>-		struct dcn_watermark_set *watermarks,</div><div class='add'>+		union dcn_watermark_set *watermarks,</div><div class='ctx'> 		unsigned int refclk_mhz,</div><div class='ctx'> 		bool safe_to_lower)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/amd/display/dc/dm_helpers.h<br/>index 6d7a15dcf8a7..34adae7ab6e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dm_helpers.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dm_helpers.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dm_helpers.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dm_helpers.h</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> struct dc_dp_mst_stream_allocation_table;</div><div class='ctx'> struct aux_payload;</div><div class='ctx'> enum aux_return_code_type;</div><div class='add'>+enum set_config_status;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Allocate memory accessible by the GPU</div><div class='hunk'>@@ -200,7 +201,7 @@ int dm_helper_dmub_aux_transfer_sync(</div><div class='ctx'> 		const struct dc_link *link,</div><div class='ctx'> 		struct aux_payload *payload,</div><div class='ctx'> 		enum aux_return_code_type *operation_result);</div><div class='del'>-enum set_config_status;</div><div class='add'>+</div><div class='ctx'> int dm_helpers_dmub_set_config_sync(struct dc_context *ctx,</div><div class='ctx'> 		const struct dc_link *link,</div><div class='ctx'> 		struct set_config_cmd_payload *payload,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h<br/>index d0eed3b4771e..9405c47ee2a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dm_services.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dm_services.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dm_services.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dm_services.h</a></div><div class='hunk'>@@ -275,6 +275,16 @@ void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc</div><div class='ctx'> #define PERF_TRACE_CTX(__CTX)	dm_perf_trace_timestamp(__func__, __LINE__, __CTX)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * SMU message tracing</div><div class='add'>+ */</div><div class='add'>+void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx);</div><div class='add'>+void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx);</div><div class='add'>+</div><div class='add'>+#define TRACE_SMU_MSG(msg_id, param_in, ctx)	dm_trace_smu_msg(msg_id, param_in, ctx)</div><div class='add'>+#define TRACE_SMU_DELAY(response_delay, ctx)	dm_trace_smu_delay(response_delay, ctx)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * DMUB Interfaces</div><div class='ctx'>  */</div><div class='ctx'> bool dm_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c<br/>index 38ab9ad60ef8..74da9ebda016 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c</a></div><div class='hunk'>@@ -1085,6 +1085,9 @@ static enum dcn_zstate_support_state  decide_zstate_support(struct dc *dc, struc</div><div class='ctx'> 		int minmum_z8_residency = dc-&gt;debug.minimum_z8_residency_time &gt; 0 ? dc-&gt;debug.minimum_z8_residency_time : 1000;</div><div class='ctx'> 		bool allow_z8 = context-&gt;bw_ctx.dml.vba.StutterPeriod &gt; (double)minmum_z8_residency;</div><div class='ctx'> 		bool is_pwrseq0 = link-&gt;link_index == 0;</div><div class='add'>+		bool is_psr = (link &amp;&amp; (link-&gt;psr_settings.psr_version == DC_PSR_VERSION_1 ||</div><div class='add'>+						link-&gt;psr_settings.psr_version == DC_PSR_VERSION_SU_1) &amp;&amp; !link-&gt;panel_config.psr.disable_psr);</div><div class='add'>+		bool is_replay = link &amp;&amp; link-&gt;replay_settings.replay_feature_enabled;</div><div class='ctx'> </div><div class='ctx'> 		/* Don't support multi-plane configurations */</div><div class='ctx'> 		if (stream_status-&gt;plane_count &gt; 1)</div><div class='hunk'>@@ -1092,8 +1095,8 @@ static enum dcn_zstate_support_state  decide_zstate_support(struct dc *dc, struc</div><div class='ctx'> </div><div class='ctx'> 		if (is_pwrseq0 &amp;&amp; context-&gt;bw_ctx.dml.vba.StutterPeriod &gt; 5000.0)</div><div class='ctx'> 			return DCN_ZSTATE_SUPPORT_ALLOW;</div><div class='del'>-		else if (is_pwrseq0 &amp;&amp; link-&gt;psr_settings.psr_version == DC_PSR_VERSION_1 &amp;&amp; !link-&gt;panel_config.psr.disable_psr)</div><div class='del'>-			return allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY : DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY;</div><div class='add'>+		else if (is_pwrseq0 &amp;&amp; (is_psr || is_replay))</div><div class='add'>+			return DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY;</div><div class='ctx'> 		else</div><div class='ctx'> 			return allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY : DCN_ZSTATE_SUPPORT_DISALLOW;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -2369,7 +2372,7 @@ validate_out:</div><div class='ctx'> </div><div class='ctx'> static struct _vcs_dpi_voltage_scaling_st construct_low_pstate_lvl(struct clk_limit_table *clk_table, unsigned int high_voltage_lvl)</div><div class='ctx'> {</div><div class='del'>-	struct _vcs_dpi_voltage_scaling_st low_pstate_lvl;</div><div class='add'>+	struct _vcs_dpi_voltage_scaling_st low_pstate_lvl = {0};</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	low_pstate_lvl.state = 1;</div><div class='hunk'>@@ -2474,7 +2477,7 @@ void dcn201_populate_dml_writeback_from_context_fpu(struct dc *dc,</div><div class='ctx'> 	int pipe_cnt, i, j;</div><div class='ctx'> 	double max_calc_writeback_dispclk;</div><div class='ctx'> 	double writeback_dispclk;</div><div class='del'>-	struct writeback_st dout_wb;</div><div class='add'>+	struct writeback_st dout_wb = {0};</div><div class='ctx'> </div><div class='ctx'> 	dc_assert_fp_enabled();</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c<br/>index ccb4ad78f667..81f7b90849ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c</a></div><div class='hunk'>@@ -260,7 +260,7 @@ void dcn30_fpu_populate_dml_writeback_from_context(</div><div class='ctx'> 	int pipe_cnt, i, j;</div><div class='ctx'> 	double max_calc_writeback_dispclk;</div><div class='ctx'> 	double writeback_dispclk;</div><div class='del'>-	struct writeback_st dout_wb;</div><div class='add'>+	struct writeback_st dout_wb = {0};</div><div class='ctx'> </div><div class='ctx'> 	dc_assert_fp_enabled();</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c<br/>index e7f4a2d491cc..e0b52db2c210 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c</a></div><div class='hunk'>@@ -3535,7 +3535,6 @@ static double TruncToValidBPP(</div><div class='ctx'> 			return DesiredBPP;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return BPP_INVALID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c<br/>index deb6d162a2d5..94317b2e4a85 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c</a></div><div class='hunk'>@@ -291,6 +291,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = {</div><div class='ctx'> 	.do_urgent_latency_adjustment = false,</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_component_us = 0,</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,</div><div class='add'>+	.dispclk_dppclk_vco_speed_mhz = 2400.0,</div><div class='ctx'> 	.num_chans = 4,</div><div class='ctx'> 	.dummy_pstate_latency_us = 10.0</div><div class='ctx'> };</div><div class='hunk'>@@ -438,6 +439,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_16_soc = {</div><div class='ctx'> 	.do_urgent_latency_adjustment = false,</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_component_us = 0,</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,</div><div class='add'>+	.dispclk_dppclk_vco_speed_mhz = 2500.0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,</div><div class='hunk'>@@ -485,6 +487,7 @@ void dcn31_calculate_wm_and_dlg_fp(</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_idx, total_det = 0, active_hubp_count = 0;</div><div class='ctx'> 	double dcfclk = context-&gt;bw_ctx.dml.vba.DCFCLKState[vlevel][context-&gt;bw_ctx.dml.vba.maxMpcComb];</div><div class='add'>+	uint32_t cstate_enter_plus_exit_z8_ns;</div><div class='ctx'> </div><div class='ctx'> 	dc_assert_fp_enabled();</div><div class='ctx'> </div><div class='hunk'>@@ -504,6 +507,13 @@ void dcn31_calculate_wm_and_dlg_fp(</div><div class='ctx'> 	pipes[0].clks_cfg.dcfclk_mhz = dcfclk;</div><div class='ctx'> 	pipes[0].clks_cfg.socclk_mhz = context-&gt;bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz;</div><div class='ctx'> </div><div class='add'>+	cstate_enter_plus_exit_z8_ns =</div><div class='add'>+		get_wm_z8_stutter_enter_exit(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='add'>+</div><div class='add'>+	if (get_stutter_period(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) &lt; dc-&gt;debug.minimum_z8_residency_time &amp;&amp;</div><div class='add'>+			cstate_enter_plus_exit_z8_ns &lt; dc-&gt;debug.minimum_z8_residency_time * 1000)</div><div class='add'>+		cstate_enter_plus_exit_z8_ns = dc-&gt;debug.minimum_z8_residency_time * 1000;</div><div class='add'>+</div><div class='ctx'> 	/* Set A:</div><div class='ctx'> 	 * All clocks min required</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -514,7 +524,7 @@ void dcn31_calculate_wm_and_dlg_fp(</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='del'>-	context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns = get_wm_z8_stutter_enter_exit(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='add'>+	context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns = cstate_enter_plus_exit_z8_ns;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_z8_ns = get_wm_z8_stutter_exit(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.watermarks.a.pte_meta_urgent_ns = get_wm_memory_trip(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.watermarks.a.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt) * 1000;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h<br/>index 8f9c8faed260..d2ae43a82ba5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #define DCN3_15_DEFAULT_DET_SIZE 192</div><div class='ctx'> #define DCN3_15_MIN_COMPBUF_SIZE_KB 128</div><div class='ctx'> #define DCN3_16_DEFAULT_DET_SIZE 192</div><div class='add'>+#define DCN3_16_MIN_COMPBUF_SIZE_KB 128</div><div class='ctx'> </div><div class='ctx'> void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,</div><div class='ctx'> 				  int pipe_cnt);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c<br/>index adea459e7d36..33cf824c5da1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c</a></div><div class='hunk'>@@ -3679,7 +3679,6 @@ static double TruncToValidBPP(</div><div class='ctx'> 			return DesiredBPP;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return BPP_INVALID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static noinline void CalculatePrefetchSchedulePerPlane(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c<br/>index fb21572750e8..21f637ae4add 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c</a></div><div class='hunk'>@@ -310,7 +310,7 @@ int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *c</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_cnt;</div><div class='ctx'> 	struct resource_context *res_ctx = &amp;context-&gt;res_ctx;</div><div class='del'>-	struct pipe_ctx *pipe;</div><div class='add'>+	struct pipe_ctx *pipe = 0;</div><div class='ctx'> 	bool upscaled = false;</div><div class='ctx'> 	const unsigned int max_allowed_vblank_nom = 1023;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c<br/>index 88e56889a68c..3242957d00c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c</a></div><div class='hunk'>@@ -3788,7 +3788,6 @@ static double TruncToValidBPP(</div><div class='ctx'> 			return DesiredBPP;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return BPP_INVALID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static noinline void CalculatePrefetchSchedulePerPlane(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c<br/>index a0a65e099104..f6fe0a64beac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c</a></div><div class='hunk'>@@ -180,6 +180,9 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_2_soc = {</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_reference_mhz = 3000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool dcn32_apply_merge_split_flags_helper(struct dc *dc, struct dc_state *context,</div><div class='add'>+	bool *repopulate_pipes, int *split, bool *merge);</div><div class='add'>+</div><div class='ctx'> void dcn32_build_wm_range_table_fpu(struct clk_mgr_internal *clk_mgr)</div><div class='ctx'> {</div><div class='ctx'> 	/* defaults */</div><div class='hunk'>@@ -622,7 +625,7 @@ static bool dcn32_assign_subvp_pipe(struct dc *dc,</div><div class='ctx'> 		 *   to combine this with SubVP can cause issues with the scheduling).</div><div class='ctx'> 		 * - Not TMZ surface</div><div class='ctx'> 		 */</div><div class='del'>-		if (pipe-&gt;plane_state &amp;&amp; !pipe-&gt;top_pipe &amp;&amp; !dcn32_is_center_timing(pipe) &amp;&amp;</div><div class='add'>+		if (pipe-&gt;plane_state &amp;&amp; !pipe-&gt;top_pipe &amp;&amp; !pipe-&gt;prev_odm_pipe &amp;&amp; !dcn32_is_center_timing(pipe) &amp;&amp;</div><div class='ctx'> 				!(pipe-&gt;stream-&gt;timing.pix_clk_100hz / 10000 &gt; DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ) &amp;&amp;</div><div class='ctx'> 				(!dcn32_is_psr_capable(pipe) || (context-&gt;stream_count == 1 &amp;&amp; dc-&gt;caps.dmub_caps.subvp_psr)) &amp;&amp;</div><div class='ctx'> 				dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_NONE &amp;&amp;</div><div class='hunk'>@@ -720,7 +723,7 @@ static bool dcn32_enough_pipes_for_subvp(struct dc *dc, struct dc_state *context</div><div class='ctx'>  */</div><div class='ctx'> static bool subvp_subvp_schedulable(struct dc *dc, struct dc_state *context)</div><div class='ctx'> {</div><div class='del'>-	struct pipe_ctx *subvp_pipes[2];</div><div class='add'>+	struct pipe_ctx *subvp_pipes[2] = {0};</div><div class='ctx'> 	struct dc_stream_state *phantom = NULL;</div><div class='ctx'> 	uint32_t microschedule_lines = 0;</div><div class='ctx'> 	uint32_t index = 0;</div><div class='hunk'>@@ -1425,13 +1428,14 @@ static bool is_test_pattern_enabled(</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dcn32_full_validate_bw_helper(struct dc *dc,</div><div class='add'>+static bool dcn32_full_validate_bw_helper(struct dc *dc,</div><div class='ctx'> 				   struct dc_state *context,</div><div class='ctx'> 				   display_e2e_pipe_params_st *pipes,</div><div class='ctx'> 				   int *vlevel,</div><div class='ctx'> 				   int *split,</div><div class='ctx'> 				   bool *merge,</div><div class='del'>-				   int *pipe_cnt)</div><div class='add'>+				   int *pipe_cnt,</div><div class='add'>+				   bool *repopulate_pipes)</div><div class='ctx'> {</div><div class='ctx'> 	struct vba_vars_st *vba = &amp;context-&gt;bw_ctx.dml.vba;</div><div class='ctx'> 	unsigned int dc_pipe_idx = 0;</div><div class='hunk'>@@ -1461,6 +1465,12 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,</div><div class='ctx'> 		vba-&gt;VoltageLevel = *vlevel;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Apply split and merge flags before checking for subvp */</div><div class='add'>+	if (!dcn32_apply_merge_split_flags_helper(dc, context, repopulate_pipes, split, merge))</div><div class='add'>+		return false;</div><div class='add'>+	memset(split, 0, MAX_PIPES * sizeof(int));</div><div class='add'>+	memset(merge, 0, MAX_PIPES * sizeof(bool));</div><div class='add'>+</div><div class='ctx'> 	/* Conditions for setting up phantom pipes for SubVP:</div><div class='ctx'> 	 * 1. Not force disable SubVP</div><div class='ctx'> 	 * 2. Full update (i.e. !fast_validate)</div><div class='hunk'>@@ -1475,19 +1485,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,</div><div class='ctx'> 	    vba-&gt;DRAMClockChangeSupport[*vlevel][vba-&gt;maxMpcComb] == dm_dram_clock_change_unsupported ||</div><div class='ctx'> 	    dc-&gt;debug.force_subvp_mclk_switch)) {</div><div class='ctx'> </div><div class='del'>-		dcn32_merge_pipes_for_subvp(dc, context);</div><div class='del'>-		memset(merge, 0, MAX_PIPES * sizeof(bool));</div><div class='del'>-</div><div class='ctx'> 		vlevel_temp = *vlevel;</div><div class='del'>-		/* to re-initialize viewport after the pipe merge */</div><div class='del'>-		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='del'>-			struct pipe_ctx *pipe_ctx = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='del'>-</div><div class='del'>-			if (!pipe_ctx-&gt;plane_state || !pipe_ctx-&gt;stream)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			resource_build_scaling_params(pipe_ctx);</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		while (!found_supported_config &amp;&amp; dcn32_enough_pipes_for_subvp(dc, context) &amp;&amp;</div><div class='ctx'> 			dcn32_assign_subvp_pipe(dc, context, &amp;dc_pipe_idx)) {</div><div class='hunk'>@@ -1576,8 +1574,6 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,</div><div class='ctx'> 			 * add phantom pipes. If pipe split (ODM / MPC) is required, both the main</div><div class='ctx'> 			 * and phantom pipes will be split in the regular pipe splitting sequence.</div><div class='ctx'> 			 */</div><div class='del'>-			memset(split, 0, MAX_PIPES * sizeof(int));</div><div class='del'>-			memset(merge, 0, MAX_PIPES * sizeof(bool));</div><div class='ctx'> 			*vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, *vlevel, split, merge);</div><div class='ctx'> 			vba-&gt;VoltageLevel = *vlevel;</div><div class='ctx'> 			// Note: We can't apply the phantom pipes to hardware at this time. We have to wait</div><div class='hunk'>@@ -1590,6 +1586,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,</div><div class='ctx'> 		try_odm_power_optimization_and_revalidate(</div><div class='ctx'> 				dc, context, pipes, split, merge, vlevel, *pipe_cnt);</div><div class='ctx'> </div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_dtbclk_required(struct dc *dc, struct dc_state *context)</div><div class='hunk'>@@ -1929,106 +1926,23 @@ static bool dcn32_split_stream_for_mpc_or_odm(</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='del'>-				struct dc_state *context,</div><div class='del'>-				display_e2e_pipe_params_st *pipes,</div><div class='del'>-				int *pipe_cnt_out,</div><div class='del'>-				int *vlevel_out,</div><div class='del'>-				bool fast_validate)</div><div class='add'>+static bool dcn32_apply_merge_split_flags_helper(</div><div class='add'>+		struct dc *dc,</div><div class='add'>+		struct dc_state *context,</div><div class='add'>+		bool *repopulate_pipes,</div><div class='add'>+		int *split,</div><div class='add'>+		bool *merge)</div><div class='ctx'> {</div><div class='del'>-	bool out = false;</div><div class='del'>-	bool repopulate_pipes = false;</div><div class='del'>-	int split[MAX_PIPES] = { 0 };</div><div class='del'>-	bool merge[MAX_PIPES] = { false };</div><div class='add'>+	int i, pipe_idx;</div><div class='ctx'> 	bool newly_split[MAX_PIPES] = { false };</div><div class='del'>-	int pipe_cnt, i, pipe_idx;</div><div class='del'>-	int vlevel = context-&gt;bw_ctx.dml.soc.num_states;</div><div class='ctx'> 	struct vba_vars_st *vba = &amp;context-&gt;bw_ctx.dml.vba;</div><div class='ctx'> </div><div class='del'>-	dc_assert_fp_enabled();</div><div class='del'>-</div><div class='del'>-	ASSERT(pipes);</div><div class='del'>-	if (!pipes)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	// For each full update, remove all existing phantom pipes first</div><div class='del'>-	dc_state_remove_phantom_streams_and_planes(dc, context);</div><div class='del'>-	dc_state_release_phantom_streams_and_planes(dc, context);</div><div class='del'>-</div><div class='del'>-	dc-&gt;res_pool-&gt;funcs-&gt;update_soc_for_wm_a(dc, context);</div><div class='del'>-</div><div class='del'>-	pipe_cnt = dc-&gt;res_pool-&gt;funcs-&gt;populate_dml_pipes(dc, context, pipes, fast_validate);</div><div class='del'>-</div><div class='del'>-	if (!pipe_cnt) {</div><div class='del'>-		out = true;</div><div class='del'>-		goto validate_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dml_log_pipe_params(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt);</div><div class='del'>-	context-&gt;bw_ctx.dml.soc.max_vratio_pre = dcn32_determine_max_vratio_prefetch(dc, context);</div><div class='del'>-</div><div class='del'>-	if (!fast_validate)</div><div class='del'>-		dcn32_full_validate_bw_helper(dc, context, pipes, &amp;vlevel, split, merge, &amp;pipe_cnt);</div><div class='del'>-</div><div class='del'>-	if (fast_validate ||</div><div class='del'>-			(dc-&gt;debug.dml_disallow_alternate_prefetch_modes &amp;&amp;</div><div class='del'>-			(vlevel == context-&gt;bw_ctx.dml.soc.num_states ||</div><div class='del'>-				vba-&gt;DRAMClockChangeSupport[vlevel][vba-&gt;maxMpcComb] == dm_dram_clock_change_unsupported))) {</div><div class='del'>-		/*</div><div class='del'>-		 * If dml_disallow_alternate_prefetch_modes is false, then we have already</div><div class='del'>-		 * tried alternate prefetch modes during full validation.</div><div class='del'>-		 *</div><div class='del'>-		 * If mode is unsupported or there is no p-state support, then</div><div class='del'>-		 * fall back to favouring voltage.</div><div class='del'>-		 *</div><div class='del'>-		 * If Prefetch mode 0 failed for this config, or passed with Max UCLK, then try</div><div class='del'>-		 * to support with Prefetch mode 1 (dm_prefetch_support_fclk_and_stutter == 2)</div><div class='del'>-		 */</div><div class='del'>-		context-&gt;bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final =</div><div class='del'>-			dm_prefetch_support_none;</div><div class='del'>-</div><div class='del'>-		context-&gt;bw_ctx.dml.validate_max_state = fast_validate;</div><div class='del'>-		vlevel = dml_get_voltage_level(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt);</div><div class='del'>-</div><div class='del'>-		context-&gt;bw_ctx.dml.validate_max_state = false;</div><div class='del'>-</div><div class='del'>-		if (vlevel &lt; context-&gt;bw_ctx.dml.soc.num_states) {</div><div class='del'>-			memset(split, 0, sizeof(split));</div><div class='del'>-			memset(merge, 0, sizeof(merge));</div><div class='del'>-			vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel, split, merge);</div><div class='del'>-			// dcn20_validate_apply_pipe_split_flags can modify voltage level outside of DML</div><div class='del'>-			vba-&gt;VoltageLevel = vlevel;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dml_log_mode_support_params(&amp;context-&gt;bw_ctx.dml);</div><div class='del'>-</div><div class='del'>-	if (vlevel == context-&gt;bw_ctx.dml.soc.num_states)</div><div class='del'>-		goto validate_fail;</div><div class='del'>-</div><div class='del'>-	for (i = 0, pipe_idx = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='del'>-		struct pipe_ctx *pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='del'>-		struct pipe_ctx *mpo_pipe = pipe-&gt;bottom_pipe;</div><div class='del'>-</div><div class='del'>-		if (!pipe-&gt;stream)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (vba-&gt;ODMCombineEnabled[vba-&gt;pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled</div><div class='del'>-				&amp;&amp; !dc-&gt;config.enable_windowed_mpo_odm</div><div class='del'>-				&amp;&amp; pipe-&gt;plane_state &amp;&amp; mpo_pipe</div><div class='del'>-				&amp;&amp; memcmp(&amp;mpo_pipe-&gt;plane_state-&gt;clip_rect,</div><div class='del'>-						&amp;pipe-&gt;stream-&gt;src,</div><div class='del'>-						sizeof(struct rect)) != 0) {</div><div class='del'>-			ASSERT(mpo_pipe-&gt;plane_state != pipe-&gt;plane_state);</div><div class='del'>-			goto validate_fail;</div><div class='del'>-		}</div><div class='del'>-		pipe_idx++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (dc-&gt;config.enable_windowed_mpo_odm) {</div><div class='del'>-		repopulate_pipes = update_pipes_with_split_flags(</div><div class='del'>-				dc, context, vba, split, merge);</div><div class='add'>+		if (update_pipes_with_split_flags(</div><div class='add'>+			dc, context, vba, split, merge))</div><div class='add'>+			*repopulate_pipes = true;</div><div class='ctx'> 	} else {</div><div class='add'>+</div><div class='ctx'> 		/* the code below will be removed once windowed mpo odm is fully</div><div class='ctx'> 		 * enabled.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -2085,7 +1999,7 @@ bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='ctx'> 				memset(&amp;pipe-&gt;plane_res, 0, sizeof(pipe-&gt;plane_res));</div><div class='ctx'> 				memset(&amp;pipe-&gt;stream_res, 0, sizeof(pipe-&gt;stream_res));</div><div class='ctx'> 				memset(&amp;pipe-&gt;link_res, 0, sizeof(pipe-&gt;link_res));</div><div class='del'>-				repopulate_pipes = true;</div><div class='add'>+				*repopulate_pipes = true;</div><div class='ctx'> 			} else if (pipe-&gt;top_pipe &amp;&amp; pipe-&gt;top_pipe-&gt;plane_state == pipe-&gt;plane_state) {</div><div class='ctx'> 				struct pipe_ctx *top_pipe = pipe-&gt;top_pipe;</div><div class='ctx'> 				struct pipe_ctx *bottom_pipe = pipe-&gt;bottom_pipe;</div><div class='hunk'>@@ -2101,7 +2015,7 @@ bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='ctx'> 				memset(&amp;pipe-&gt;plane_res, 0, sizeof(pipe-&gt;plane_res));</div><div class='ctx'> 				memset(&amp;pipe-&gt;stream_res, 0, sizeof(pipe-&gt;stream_res));</div><div class='ctx'> 				memset(&amp;pipe-&gt;link_res, 0, sizeof(pipe-&gt;link_res));</div><div class='del'>-				repopulate_pipes = true;</div><div class='add'>+				*repopulate_pipes = true;</div><div class='ctx'> 			} else</div><div class='ctx'> 				ASSERT(0); /* Should never try to merge master pipe */</div><div class='ctx'> </div><div class='hunk'>@@ -2140,15 +2054,15 @@ bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='ctx'> 				hsplit_pipe = dcn32_find_split_pipe(dc, context, old_index);</div><div class='ctx'> 				ASSERT(hsplit_pipe);</div><div class='ctx'> 				if (!hsplit_pipe)</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> </div><div class='ctx'> 				if (!dcn32_split_stream_for_mpc_or_odm(</div><div class='ctx'> 						dc, &amp;context-&gt;res_ctx,</div><div class='ctx'> 						pipe, hsplit_pipe, odm))</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> </div><div class='ctx'> 				newly_split[hsplit_pipe-&gt;pipe_idx] = true;</div><div class='del'>-				repopulate_pipes = true;</div><div class='add'>+				*repopulate_pipes = true;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (split[i] == 4) {</div><div class='ctx'> 				struct pipe_ctx *pipe_4to1;</div><div class='hunk'>@@ -2163,11 +2077,11 @@ bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='ctx'> 				pipe_4to1 = dcn32_find_split_pipe(dc, context, old_index);</div><div class='ctx'> 				ASSERT(pipe_4to1);</div><div class='ctx'> 				if (!pipe_4to1)</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> 				if (!dcn32_split_stream_for_mpc_or_odm(</div><div class='ctx'> 						dc, &amp;context-&gt;res_ctx,</div><div class='ctx'> 						pipe, pipe_4to1, odm))</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> 				newly_split[pipe_4to1-&gt;pipe_idx] = true;</div><div class='ctx'> </div><div class='ctx'> 				if (odm &amp;&amp; old_pipe-&gt;next_odm_pipe &amp;&amp; old_pipe-&gt;next_odm_pipe-&gt;next_odm_pipe</div><div class='hunk'>@@ -2182,11 +2096,11 @@ bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='ctx'> 				pipe_4to1 = dcn32_find_split_pipe(dc, context, old_index);</div><div class='ctx'> 				ASSERT(pipe_4to1);</div><div class='ctx'> 				if (!pipe_4to1)</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> 				if (!dcn32_split_stream_for_mpc_or_odm(</div><div class='ctx'> 						dc, &amp;context-&gt;res_ctx,</div><div class='ctx'> 						hsplit_pipe, pipe_4to1, odm))</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> 				newly_split[pipe_4to1-&gt;pipe_idx] = true;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (odm)</div><div class='hunk'>@@ -2198,11 +2112,122 @@ bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 			if (pipe-&gt;plane_state) {</div><div class='ctx'> 				if (!resource_build_scaling_params(pipe))</div><div class='del'>-					goto validate_fail;</div><div class='add'>+					return false;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+			struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&amp;context-&gt;res_ctx,</div><div class='add'>+					context-&gt;streams[i]);</div><div class='add'>+</div><div class='add'>+			if (otg_master)</div><div class='add'>+				resource_build_test_pattern_params(&amp;context-&gt;res_ctx, otg_master);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dcn32_internal_validate_bw(struct dc *dc,</div><div class='add'>+				struct dc_state *context,</div><div class='add'>+				display_e2e_pipe_params_st *pipes,</div><div class='add'>+				int *pipe_cnt_out,</div><div class='add'>+				int *vlevel_out,</div><div class='add'>+				bool fast_validate)</div><div class='add'>+{</div><div class='add'>+	bool out = false;</div><div class='add'>+	bool repopulate_pipes = false;</div><div class='add'>+	int split[MAX_PIPES] = { 0 };</div><div class='add'>+	bool merge[MAX_PIPES] = { false };</div><div class='add'>+	int pipe_cnt, i, pipe_idx;</div><div class='add'>+	int vlevel = context-&gt;bw_ctx.dml.soc.num_states;</div><div class='add'>+	struct vba_vars_st *vba = &amp;context-&gt;bw_ctx.dml.vba;</div><div class='add'>+</div><div class='add'>+	dc_assert_fp_enabled();</div><div class='add'>+</div><div class='add'>+	ASSERT(pipes);</div><div class='add'>+	if (!pipes)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* For each full update, remove all existing phantom pipes first */</div><div class='add'>+	dc_state_remove_phantom_streams_and_planes(dc, context);</div><div class='add'>+	dc_state_release_phantom_streams_and_planes(dc, context);</div><div class='add'>+</div><div class='add'>+	dc-&gt;res_pool-&gt;funcs-&gt;update_soc_for_wm_a(dc, context);</div><div class='add'>+</div><div class='add'>+	pipe_cnt = dc-&gt;res_pool-&gt;funcs-&gt;populate_dml_pipes(dc, context, pipes, fast_validate);</div><div class='add'>+</div><div class='add'>+	if (!pipe_cnt) {</div><div class='add'>+		out = true;</div><div class='add'>+		goto validate_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dml_log_pipe_params(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt);</div><div class='add'>+	context-&gt;bw_ctx.dml.soc.max_vratio_pre = dcn32_determine_max_vratio_prefetch(dc, context);</div><div class='add'>+</div><div class='add'>+	if (!fast_validate) {</div><div class='add'>+		if (!dcn32_full_validate_bw_helper(dc, context, pipes, &amp;vlevel, split, merge,</div><div class='add'>+			&amp;pipe_cnt, &amp;repopulate_pipes))</div><div class='add'>+			goto validate_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fast_validate ||</div><div class='add'>+			(dc-&gt;debug.dml_disallow_alternate_prefetch_modes &amp;&amp;</div><div class='add'>+			(vlevel == context-&gt;bw_ctx.dml.soc.num_states ||</div><div class='add'>+				vba-&gt;DRAMClockChangeSupport[vlevel][vba-&gt;maxMpcComb] == dm_dram_clock_change_unsupported))) {</div><div class='add'>+		/*</div><div class='add'>+		 * If dml_disallow_alternate_prefetch_modes is false, then we have already</div><div class='add'>+		 * tried alternate prefetch modes during full validation.</div><div class='add'>+		 *</div><div class='add'>+		 * If mode is unsupported or there is no p-state support, then</div><div class='add'>+		 * fall back to favouring voltage.</div><div class='add'>+		 *</div><div class='add'>+		 * If Prefetch mode 0 failed for this config, or passed with Max UCLK, then try</div><div class='add'>+		 * to support with Prefetch mode 1 (dm_prefetch_support_fclk_and_stutter == 2)</div><div class='add'>+		 */</div><div class='add'>+		context-&gt;bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final =</div><div class='add'>+			dm_prefetch_support_none;</div><div class='add'>+</div><div class='add'>+		context-&gt;bw_ctx.dml.validate_max_state = fast_validate;</div><div class='add'>+		vlevel = dml_get_voltage_level(&amp;context-&gt;bw_ctx.dml, pipes, pipe_cnt);</div><div class='add'>+</div><div class='add'>+		context-&gt;bw_ctx.dml.validate_max_state = false;</div><div class='add'>+</div><div class='add'>+		if (vlevel &lt; context-&gt;bw_ctx.dml.soc.num_states) {</div><div class='add'>+			memset(split, 0, sizeof(split));</div><div class='add'>+			memset(merge, 0, sizeof(merge));</div><div class='add'>+			vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel, split, merge);</div><div class='add'>+			/* dcn20_validate_apply_pipe_split_flags can modify voltage level outside of DML */</div><div class='add'>+			vba-&gt;VoltageLevel = vlevel;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dml_log_mode_support_params(&amp;context-&gt;bw_ctx.dml);</div><div class='add'>+</div><div class='add'>+	if (vlevel == context-&gt;bw_ctx.dml.soc.num_states)</div><div class='add'>+		goto validate_fail;</div><div class='add'>+</div><div class='add'>+	for (i = 0, pipe_idx = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+		struct pipe_ctx *pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+		struct pipe_ctx *mpo_pipe = pipe-&gt;bottom_pipe;</div><div class='add'>+</div><div class='add'>+		if (!pipe-&gt;stream)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (vba-&gt;ODMCombineEnabled[vba-&gt;pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled</div><div class='add'>+				&amp;&amp; !dc-&gt;config.enable_windowed_mpo_odm</div><div class='add'>+				&amp;&amp; pipe-&gt;plane_state &amp;&amp; mpo_pipe</div><div class='add'>+				&amp;&amp; memcmp(&amp;mpo_pipe-&gt;plane_state-&gt;clip_rect,</div><div class='add'>+						&amp;pipe-&gt;stream-&gt;src,</div><div class='add'>+						sizeof(struct rect)) != 0) {</div><div class='add'>+			ASSERT(mpo_pipe-&gt;plane_state != pipe-&gt;plane_state);</div><div class='add'>+			goto validate_fail;</div><div class='add'>+		}</div><div class='add'>+		pipe_idx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!dcn32_apply_merge_split_flags_helper(dc, context, &amp;repopulate_pipes, split, merge))</div><div class='add'>+		goto validate_fail;</div><div class='add'>+</div><div class='ctx'> 	/* Actual dsc count per stream dsc validation*/</div><div class='ctx'> 	if (!dcn20_validate_dsc(dc, context)) {</div><div class='ctx'> 		vba-&gt;ValidationStatus[vba-&gt;soc.num_states] = DML_FAIL_DSC_VALIDATION_FAILURE;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c<br/>index 80fccd4999a5..ba1310c8fd77 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c</a></div><div class='hunk'>@@ -1650,6 +1650,8 @@ double dml32_TruncToValidBPP(</div><div class='ctx'> 			MaxLinkBPP = 2 * MaxLinkBPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	*RequiredSlots = dml_ceil(DesiredBPP / MaxLinkBPP * 64, 1);</div><div class='add'>+</div><div class='ctx'> 	if (DesiredBPP == 0) {</div><div class='ctx'> 		if (DSCEnable) {</div><div class='ctx'> 			if (MaxLinkBPP &lt; MinDSCBPP)</div><div class='hunk'>@@ -1676,10 +1678,6 @@ double dml32_TruncToValidBPP(</div><div class='ctx'> 		else</div><div class='ctx'> 			return DesiredBPP;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	*RequiredSlots = dml_ceil(DesiredBPP / MaxLinkBPP * 64, 1);</div><div class='del'>-</div><div class='del'>-	return BPP_INVALID;</div><div class='ctx'> } // TruncToValidBPP</div><div class='ctx'> </div><div class='ctx'> double dml32_RequiredDTBCLK(</div><div class='hunk'>@@ -1975,8 +1973,8 @@ void dml32_CalculateVMRowAndSwath(</div><div class='ctx'> 	unsigned int PTEBufferSizeInRequestsForChroma[DC__NUM_DPP__MAX];</div><div class='ctx'> 	unsigned int PDEAndMetaPTEBytesFrameY;</div><div class='ctx'> 	unsigned int PDEAndMetaPTEBytesFrameC;</div><div class='del'>-	unsigned int MetaRowByteY[DC__NUM_DPP__MAX];</div><div class='del'>-	unsigned int MetaRowByteC[DC__NUM_DPP__MAX];</div><div class='add'>+	unsigned int MetaRowByteY[DC__NUM_DPP__MAX] = {0};</div><div class='add'>+	unsigned int MetaRowByteC[DC__NUM_DPP__MAX] = {0};</div><div class='ctx'> 	unsigned int PixelPTEBytesPerRowY[DC__NUM_DPP__MAX];</div><div class='ctx'> 	unsigned int PixelPTEBytesPerRowC[DC__NUM_DPP__MAX];</div><div class='ctx'> 	unsigned int PixelPTEBytesPerRowY_one_row_per_frame[DC__NUM_DPP__MAX];</div><div class='hunk'>@@ -4291,7 +4289,7 @@ void dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 	unsigned int i, j, k;</div><div class='ctx'> 	unsigned int SurfaceWithMinActiveFCLKChangeMargin = 0;</div><div class='ctx'> 	unsigned int DRAMClockChangeSupportNumber = 0;</div><div class='del'>-	unsigned int LastSurfaceWithoutMargin;</div><div class='add'>+	unsigned int LastSurfaceWithoutMargin = 0;</div><div class='ctx'> 	unsigned int DRAMClockChangeMethod = 0;</div><div class='ctx'> 	bool FoundFirstSurfaceWithMinActiveFCLKChangeMargin = false;</div><div class='ctx'> 	double MinActiveFCLKChangeMargin = 0.;</div><div class='hunk'>@@ -5656,9 +5654,9 @@ void dml32_CalculateStutterEfficiency(</div><div class='ctx'> 	double LastZ8StutterPeriod = 0.0;</div><div class='ctx'> 	double LastStutterPeriod = 0.0;</div><div class='ctx'> 	unsigned int TotalNumberOfActiveOTG = 0;</div><div class='del'>-	double doublePixelClock;</div><div class='del'>-	unsigned int doubleHTotal;</div><div class='del'>-	unsigned int doubleVTotal;</div><div class='add'>+	double doublePixelClock = 0;</div><div class='add'>+	unsigned int doubleHTotal = 0;</div><div class='add'>+	unsigned int doubleVTotal = 0;</div><div class='ctx'> 	bool SameTiming = true;</div><div class='ctx'> 	double DETBufferingTimeY;</div><div class='ctx'> 	double SwathWidthYCriticalSurface = 0.0;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c<br/>index 21e0eef3269b..60f251cf973b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c</a></div><div class='hunk'>@@ -195,9 +195,9 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {</div><div class='ctx'> 	.dcn_downspread_percent = 0.5,</div><div class='ctx'> 	.gpuvm_min_page_size_bytes = 4096,</div><div class='ctx'> 	.hostvm_min_page_size_bytes = 4096,</div><div class='del'>-	.do_urgent_latency_adjustment = 0,</div><div class='add'>+	.do_urgent_latency_adjustment = 1,</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_component_us = 0,</div><div class='del'>-	.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,</div><div class='add'>+	.urgent_latency_adjustment_fabric_clock_reference_mhz = 3000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dcn35_build_wm_range_table_fpu(struct clk_mgr *clk_mgr)</div><div class='hunk'>@@ -439,7 +439,7 @@ int dcn35_populate_dml_pipes_from_context_fpu(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_cnt;</div><div class='ctx'> 	struct resource_context *res_ctx = &amp;context-&gt;res_ctx;</div><div class='del'>-	struct pipe_ctx *pipe;</div><div class='add'>+	struct pipe_ctx *pipe = 0;</div><div class='ctx'> 	bool upscaled = false;</div><div class='ctx'> 	const unsigned int max_allowed_vblank_nom = 1023;</div><div class='ctx'> </div><div class='hunk'>@@ -577,6 +577,7 @@ void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context)</div><div class='ctx'> {</div><div class='ctx'> 	enum dcn_zstate_support_state support = DCN_ZSTATE_SUPPORT_DISALLOW;</div><div class='ctx'> 	unsigned int i, plane_count = 0;</div><div class='add'>+	DC_LOGGER_INIT(dc-&gt;ctx-&gt;logger);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 		if (context-&gt;res_ctx.pipe_ctx[i].plane_state)</div><div class='hunk'>@@ -602,11 +603,14 @@ void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 		if (is_pwrseq0 &amp;&amp; allow_z10)</div><div class='ctx'> 			support = DCN_ZSTATE_SUPPORT_ALLOW;</div><div class='ctx'> 		else if (is_pwrseq0 &amp;&amp; (is_psr || is_replay))</div><div class='del'>-			support = allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY : DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY;</div><div class='add'>+			support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY;</div><div class='ctx'> 		else if (allow_z8)</div><div class='ctx'> 			support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY;</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	DC_LOG_SMU("zstate_support: %d, StutterPeriod: %d\n", support,</div><div class='add'>+		   (int)context-&gt;bw_ctx.dml.vba.StutterPeriod);</div><div class='add'>+</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.clk.zstate_support = support;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c<br/>index b3ffab77cf88..e4f333d4fb54 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c</a></div><div class='hunk'>@@ -237,7 +237,6 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_51_soc = {</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_component_us = 0,</div><div class='ctx'> 	.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,</div><div class='ctx'> 	.num_chans = 4,</div><div class='del'>-	.dram_clock_change_latency_us = 11.72,</div><div class='ctx'> 	.dispclk_dppclk_vco_speed_mhz = 2400.0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -474,7 +473,7 @@ int dcn351_populate_dml_pipes_from_context_fpu(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_cnt;</div><div class='ctx'> 	struct resource_context *res_ctx = &amp;context-&gt;res_ctx;</div><div class='del'>-	struct pipe_ctx *pipe;</div><div class='add'>+	struct pipe_ctx *pipe = 0;</div><div class='ctx'> 	bool upscaled = false;</div><div class='ctx'> 	const unsigned int max_allowed_vblank_nom = 1023;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/Makefile b/drivers/gpu/drm/amd/display/dc/dml2/Makefile<br/>index acff3449b8d7..1c9498a72520 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/Makefile</a></div><div class='hunk'>@@ -67,6 +67,7 @@ frame_warn_flag := -Wframe-larger-than=2048</div><div class='ctx'> endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/dml2</div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dml2/display_mode_core.o := $(dml2_ccflags) $(frame_warn_flag)</div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dml2/display_mode_util.o := $(dml2_ccflags)</div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dml2/dml2_wrapper.o := $(dml2_ccflags)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c<br/>index 9be5ebf3a8c0..3e919f5c00ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c</a></div><div class='hunk'>@@ -31,6 +31,8 @@</div><div class='ctx'> #include "dml_assert.h"</div><div class='ctx'> </div><div class='ctx'> #define DML2_MAX_FMT_420_BUFFER_WIDTH 4096</div><div class='add'>+#define TB_BORROWED_MAX 400</div><div class='add'>+</div><div class='ctx'> // ---------------------------</div><div class='ctx'> //  Declaration Begins</div><div class='ctx'> // ---------------------------</div><div class='hunk'>@@ -2782,6 +2784,8 @@ static dml_float_t TruncToValidBPP(</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	*RequiredSlots = (dml_uint_t)(dml_ceil(DesiredBPP / MaxLinkBPP * 64, 1));</div><div class='add'>+</div><div class='ctx'> 	if (DesiredBPP == 0) {</div><div class='ctx'> 		if (DSCEnable) {</div><div class='ctx'> 			if (MaxLinkBPP &lt; MinDSCBPP) {</div><div class='hunk'>@@ -2810,10 +2814,6 @@ static dml_float_t TruncToValidBPP(</div><div class='ctx'> 			return DesiredBPP;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	*RequiredSlots = (dml_uint_t)(dml_ceil(DesiredBPP / MaxLinkBPP * 64, 1));</div><div class='del'>-</div><div class='del'>-	return __DML_DPP_INVALID__;</div><div class='ctx'> } // TruncToValidBPP</div><div class='ctx'> </div><div class='ctx'> static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='hunk'>@@ -3790,9 +3790,9 @@ static void CalculateStutterEfficiency(struct display_mode_lib_scratch_st *scrat</div><div class='ctx'> 	dml_bool_t FoundCriticalSurface = false;</div><div class='ctx'> </div><div class='ctx'> 	dml_uint_t TotalNumberOfActiveOTG = 0;</div><div class='del'>-	dml_float_t SinglePixelClock;</div><div class='del'>-	dml_uint_t SingleHTotal;</div><div class='del'>-	dml_uint_t SingleVTotal;</div><div class='add'>+	dml_float_t SinglePixelClock = 0;</div><div class='add'>+	dml_uint_t SingleHTotal = 0;</div><div class='add'>+	dml_uint_t SingleVTotal = 0;</div><div class='ctx'> 	dml_bool_t SameTiming = true;</div><div class='ctx'> </div><div class='ctx'> 	dml_float_t LastStutterPeriod = 0.0;</div><div class='hunk'>@@ -9460,8 +9460,10 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc</div><div class='ctx'> </div><div class='ctx'> 		/* Copy the calculated watermarks to mp.Watermark as the getter functions are</div><div class='ctx'> 		 * implemented by the DML team to copy the calculated values from the mp.Watermark interface.</div><div class='add'>+		 * &amp;mode_lib-&gt;mp.Watermark and &amp;locals-&gt;Watermark are the same address, memcpy may lead to</div><div class='add'>+		 * unexpected behavior. memmove should be used.</div><div class='ctx'> 		 */</div><div class='del'>-		memcpy(&amp;mode_lib-&gt;mp.Watermark, CalculateWatermarks_params-&gt;Watermark, sizeof(struct Watermarks));</div><div class='add'>+		memmove(&amp;mode_lib-&gt;mp.Watermark, CalculateWatermarks_params-&gt;Watermark, sizeof(struct Watermarks));</div><div class='ctx'> </div><div class='ctx'> 		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; ++k) {</div><div class='ctx'> 			if (mode_lib-&gt;ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {</div><div class='hunk'>@@ -10214,6 +10216,7 @@ dml_get_var_func(fraction_of_urgent_bandwidth_imm_flip, dml_float_t, mode_lib-&gt;m</div><div class='ctx'> dml_get_var_func(urgent_latency, dml_float_t, mode_lib-&gt;mp.UrgentLatency);</div><div class='ctx'> dml_get_var_func(clk_dcf_deepsleep, dml_float_t, mode_lib-&gt;mp.DCFCLKDeepSleep);</div><div class='ctx'> dml_get_var_func(wm_writeback_dram_clock_change, dml_float_t, mode_lib-&gt;mp.Watermark.WritebackDRAMClockChangeWatermark);</div><div class='add'>+dml_get_var_func(wm_writeback_urgent, dml_float_t, mode_lib-&gt;mp.Watermark.WritebackUrgentWatermark);</div><div class='ctx'> dml_get_var_func(stutter_efficiency, dml_float_t, mode_lib-&gt;mp.StutterEfficiency);</div><div class='ctx'> dml_get_var_func(stutter_efficiency_no_vblank, dml_float_t, mode_lib-&gt;mp.StutterEfficiencyNotIncludingVBlank);</div><div class='ctx'> dml_get_var_func(stutter_efficiency_z8, dml_float_t, mode_lib-&gt;mp.Z8StutterEfficiency);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h<br/>index 8452485684f5..3116b88e99dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h</a></div><div class='hunk'>@@ -94,6 +94,7 @@ dml_get_var_decl(wm_usr_retraining, dml_float_t);</div><div class='ctx'> dml_get_var_decl(urgent_latency, dml_float_t);</div><div class='ctx'> </div><div class='ctx'> dml_get_var_decl(wm_writeback_dram_clock_change, dml_float_t);</div><div class='add'>+dml_get_var_decl(wm_writeback_urgent, dml_float_t);</div><div class='ctx'> dml_get_var_decl(stutter_efficiency_no_vblank, dml_float_t);</div><div class='ctx'> dml_get_var_decl(stutter_efficiency, dml_float_t);</div><div class='ctx'> dml_get_var_decl(stutter_efficiency_z8, dml_float_t);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h<br/>index de63364be01d..14d389525296 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/display_mode_lib_defines.h</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #define DCN_DML__VM_PRESENT__1 1</div><div class='ctx'> #define DCN_DML__HOST_VM_PRESENT 1</div><div class='ctx'> #define DCN_DML__HOST_VM_PRESENT__1 1</div><div class='add'>+#define DCN_DML__DWB 1</div><div class='ctx'> </div><div class='ctx'> #include "dml_depedencies.h"</div><div class='ctx'> </div><div class='hunk'>@@ -59,6 +60,7 @@</div><div class='ctx'> #define __DML_NUM_PLANES__                              DCN_DML__NUM_PLANE</div><div class='ctx'> #define __DML_NUM_CURSORS__                             DCN_DML__NUM_CURSOR</div><div class='ctx'> #define __DML_DPP_INVALID__                             0</div><div class='add'>+#define __DML_NUM_DMB__                                 DCN_DML__DWB</div><div class='ctx'> #define __DML_PIPE_NO_PLANE__                           99</div><div class='ctx'> </div><div class='ctx'> #define __DML_MAX_STATE_ARRAY_SIZE__        DCN_DML__NUM_PWR_STATE</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c<br/>index a52c594e1ba4..ad2a6b4769fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c</a></div><div class='hunk'>@@ -88,7 +88,8 @@ static int find_disp_cfg_idx_by_plane_id(struct dml2_dml_to_dc_pipe_mapping *map</div><div class='ctx'> 			return  i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return -1;</div><div class='add'>+	ASSERT(false);</div><div class='add'>+	return __DML2_WRAPPER_MAX_STREAMS_PLANES__;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int find_disp_cfg_idx_by_stream_id(struct dml2_dml_to_dc_pipe_mapping *mapping, unsigned int stream_id)</div><div class='hunk'>@@ -100,7 +101,8 @@ static int find_disp_cfg_idx_by_stream_id(struct dml2_dml_to_dc_pipe_mapping *ma</div><div class='ctx'> 			return  i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return -1;</div><div class='add'>+	ASSERT(false);</div><div class='add'>+	return __DML2_WRAPPER_MAX_STREAMS_PLANES__;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> // The master pipe of a stream is defined as the top pipe in odm slice 0</div><div class='hunk'>@@ -793,8 +795,8 @@ static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state</div><div class='ctx'> 	free_unused_pipes_for_plane(ctx, state, plane, &amp;scratch-&gt;pipe_pool, stream-&gt;stream_id, plane_index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int get_mpc_factor(struct dml2_context *ctx,</div><div class='del'>-		const struct dc_state *state,</div><div class='add'>+static unsigned int get_target_mpc_factor(struct dml2_context *ctx,</div><div class='add'>+		struct dc_state *state,</div><div class='ctx'> 		const struct dml_display_cfg_st *disp_cfg,</div><div class='ctx'> 		struct dml2_dml_to_dc_pipe_mapping *mapping,</div><div class='ctx'> 		const struct dc_stream_status *status,</div><div class='hunk'>@@ -805,10 +807,10 @@ static unsigned int get_mpc_factor(struct dml2_context *ctx,</div><div class='ctx'> 	unsigned int cfg_idx;</div><div class='ctx'> 	unsigned int mpc_factor;</div><div class='ctx'> </div><div class='del'>-	get_plane_id(ctx, state, status-&gt;plane_states[plane_idx],</div><div class='del'>-			stream-&gt;stream_id, plane_idx, &amp;plane_id);</div><div class='del'>-	cfg_idx = find_disp_cfg_idx_by_plane_id(mapping, plane_id);</div><div class='ctx'> 	if (ctx-&gt;architecture == dml2_architecture_20) {</div><div class='add'>+		get_plane_id(ctx, state, status-&gt;plane_states[plane_idx],</div><div class='add'>+				stream-&gt;stream_id, plane_idx, &amp;plane_id);</div><div class='add'>+		cfg_idx = find_disp_cfg_idx_by_plane_id(mapping, plane_id);</div><div class='ctx'> 		mpc_factor = (unsigned int)disp_cfg-&gt;hw.DPPPerSurface[cfg_idx];</div><div class='ctx'> 	} else {</div><div class='ctx'> 		mpc_factor = 1;</div><div class='hunk'>@@ -822,16 +824,18 @@ static unsigned int get_mpc_factor(struct dml2_context *ctx,</div><div class='ctx'> 	return mpc_factor;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int get_odm_factor(</div><div class='add'>+static unsigned int get_target_odm_factor(</div><div class='ctx'> 		const struct dml2_context *ctx,</div><div class='add'>+		struct dc_state *state,</div><div class='ctx'> 		const struct dml_display_cfg_st *disp_cfg,</div><div class='ctx'> 		struct dml2_dml_to_dc_pipe_mapping *mapping,</div><div class='ctx'> 		const struct dc_stream_state *stream)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cfg_idx = find_disp_cfg_idx_by_stream_id(</div><div class='del'>-			mapping, stream-&gt;stream_id);</div><div class='add'>+	unsigned int cfg_idx;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;architecture == dml2_architecture_20)</div><div class='add'>+	if (ctx-&gt;architecture == dml2_architecture_20) {</div><div class='add'>+		cfg_idx = find_disp_cfg_idx_by_stream_id(</div><div class='add'>+				mapping, stream-&gt;stream_id);</div><div class='ctx'> 		switch (disp_cfg-&gt;hw.ODMMode[cfg_idx]) {</div><div class='ctx'> 		case dml_odm_mode_bypass:</div><div class='ctx'> 			return 1;</div><div class='hunk'>@@ -842,83 +846,122 @@ static unsigned int get_odm_factor(</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> 	ASSERT(false);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int get_source_odm_factor(const struct dml2_context *ctx,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		const struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	struct pipe_ctx *otg_master = ctx-&gt;config.callbacks.get_otg_master_for_stream(&amp;state-&gt;res_ctx, stream);</div><div class='add'>+</div><div class='add'>+	return ctx-&gt;config.callbacks.get_odm_slice_count(otg_master);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int get_source_mpc_factor(const struct dml2_context *ctx,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		const struct dc_plane_state *plane)</div><div class='add'>+{</div><div class='add'>+	struct pipe_ctx *dpp_pipes[MAX_PIPES] = {0};</div><div class='add'>+	int dpp_pipe_count = ctx-&gt;config.callbacks.get_dpp_pipes_for_plane(plane,</div><div class='add'>+			&amp;state-&gt;res_ctx, dpp_pipes);</div><div class='add'>+</div><div class='add'>+	ASSERT(dpp_pipe_count &gt; 0);</div><div class='add'>+	return ctx-&gt;config.callbacks.get_mpc_slice_count(dpp_pipes[0]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void populate_mpc_factors_for_stream(</div><div class='ctx'> 		struct dml2_context *ctx,</div><div class='ctx'> 		const struct dml_display_cfg_st *disp_cfg,</div><div class='ctx'> 		struct dml2_dml_to_dc_pipe_mapping *mapping,</div><div class='del'>-		const struct dc_state *state,</div><div class='add'>+		struct dc_state *state,</div><div class='ctx'> 		unsigned int stream_idx,</div><div class='del'>-		unsigned int odm_factor,</div><div class='del'>-		unsigned int mpc_factors[MAX_PIPES])</div><div class='add'>+		struct dml2_pipe_combine_factor odm_factor,</div><div class='add'>+		struct dml2_pipe_combine_factor mpc_factors[MAX_PIPES])</div><div class='ctx'> {</div><div class='ctx'> 	const struct dc_stream_status *status = &amp;state-&gt;stream_status[stream_idx];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; status-&gt;plane_count; i++)</div><div class='del'>-		if (odm_factor == 1)</div><div class='del'>-			mpc_factors[i] = get_mpc_factor(</div><div class='del'>-					ctx, state, disp_cfg, mapping, status,</div><div class='del'>-					state-&gt;streams[stream_idx], i);</div><div class='del'>-		else</div><div class='del'>-			mpc_factors[i] = 1;</div><div class='add'>+	for (i = 0; i &lt; status-&gt;plane_count; i++) {</div><div class='add'>+		mpc_factors[i].source = get_source_mpc_factor(ctx, state, status-&gt;plane_states[i]);</div><div class='add'>+		mpc_factors[i].target = (odm_factor.target == 1) ?</div><div class='add'>+				get_target_mpc_factor(ctx, state, disp_cfg, mapping, status, state-&gt;streams[stream_idx], i) : 1;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void populate_odm_factors(const struct dml2_context *ctx,</div><div class='ctx'> 		const struct dml_display_cfg_st *disp_cfg,</div><div class='ctx'> 		struct dml2_dml_to_dc_pipe_mapping *mapping,</div><div class='del'>-		const struct dc_state *state,</div><div class='del'>-		unsigned int odm_factors[MAX_PIPES])</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		struct dml2_pipe_combine_factor odm_factors[MAX_PIPES])</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; state-&gt;stream_count; i++)</div><div class='del'>-		odm_factors[i] = get_odm_factor(</div><div class='del'>-				ctx, disp_cfg, mapping, state-&gt;streams[i]);</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++) {</div><div class='add'>+		odm_factors[i].source = get_source_odm_factor(ctx, state, state-&gt;streams[i]);</div><div class='add'>+		odm_factors[i].target = get_target_odm_factor(</div><div class='add'>+				ctx, state, disp_cfg, mapping, state-&gt;streams[i]);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool map_dc_pipes_for_stream(struct dml2_context *ctx,</div><div class='add'>+static bool unmap_dc_pipes_for_stream(struct dml2_context *ctx,</div><div class='ctx'> 		struct dc_state *state,</div><div class='ctx'> 		const struct dc_state *existing_state,</div><div class='ctx'> 		const struct dc_stream_state *stream,</div><div class='ctx'> 		const struct dc_stream_status *status,</div><div class='del'>-		unsigned int odm_factor,</div><div class='del'>-		unsigned int mpc_factors[MAX_PIPES])</div><div class='add'>+		struct dml2_pipe_combine_factor odm_factor,</div><div class='add'>+		struct dml2_pipe_combine_factor mpc_factors[MAX_PIPES])</div><div class='ctx'> {</div><div class='ctx'> 	int plane_idx;</div><div class='ctx'> 	bool result = true;</div><div class='ctx'> </div><div class='del'>-	if (odm_factor == 1)</div><div class='del'>-		/*</div><div class='del'>-		 * ODM and MPC combines are by DML design mutually exclusive.</div><div class='del'>-		 * ODM factor of 1 means MPC factors may be greater than 1.</div><div class='del'>-		 * In this case, we want to set ODM factor to 1 first to free up</div><div class='del'>-		 * pipe resources from previous ODM configuration before setting</div><div class='del'>-		 * up MPC combine to acquire more pipe resources.</div><div class='del'>-		 */</div><div class='add'>+	for (plane_idx = 0; plane_idx &lt; status-&gt;plane_count; plane_idx++)</div><div class='add'>+		if (mpc_factors[plane_idx].target &lt; mpc_factors[plane_idx].source)</div><div class='add'>+			result &amp;= ctx-&gt;config.callbacks.update_pipes_for_plane_with_slice_count(</div><div class='add'>+					state,</div><div class='add'>+					existing_state,</div><div class='add'>+					ctx-&gt;config.callbacks.dc-&gt;res_pool,</div><div class='add'>+					status-&gt;plane_states[plane_idx],</div><div class='add'>+					mpc_factors[plane_idx].target);</div><div class='add'>+	if (odm_factor.target &lt; odm_factor.source)</div><div class='ctx'> 		result &amp;= ctx-&gt;config.callbacks.update_pipes_for_stream_with_slice_count(</div><div class='ctx'> 				state,</div><div class='ctx'> 				existing_state,</div><div class='ctx'> 				ctx-&gt;config.callbacks.dc-&gt;res_pool,</div><div class='ctx'> 				stream,</div><div class='del'>-				odm_factor);</div><div class='add'>+				odm_factor.target);</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool map_dc_pipes_for_stream(struct dml2_context *ctx,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		const struct dc_state *existing_state,</div><div class='add'>+		const struct dc_stream_state *stream,</div><div class='add'>+		const struct dc_stream_status *status,</div><div class='add'>+		struct dml2_pipe_combine_factor odm_factor,</div><div class='add'>+		struct dml2_pipe_combine_factor mpc_factors[MAX_PIPES])</div><div class='add'>+{</div><div class='add'>+	int plane_idx;</div><div class='add'>+	bool result = true;</div><div class='add'>+</div><div class='ctx'> 	for (plane_idx = 0; plane_idx &lt; status-&gt;plane_count; plane_idx++)</div><div class='del'>-		result &amp;= ctx-&gt;config.callbacks.update_pipes_for_plane_with_slice_count(</div><div class='del'>-				state,</div><div class='del'>-				existing_state,</div><div class='del'>-				ctx-&gt;config.callbacks.dc-&gt;res_pool,</div><div class='del'>-				status-&gt;plane_states[plane_idx],</div><div class='del'>-				mpc_factors[plane_idx]);</div><div class='del'>-	if (odm_factor &gt; 1)</div><div class='add'>+		if (mpc_factors[plane_idx].target &gt; mpc_factors[plane_idx].source)</div><div class='add'>+			result &amp;= ctx-&gt;config.callbacks.update_pipes_for_plane_with_slice_count(</div><div class='add'>+					state,</div><div class='add'>+					existing_state,</div><div class='add'>+					ctx-&gt;config.callbacks.dc-&gt;res_pool,</div><div class='add'>+					status-&gt;plane_states[plane_idx],</div><div class='add'>+					mpc_factors[plane_idx].target);</div><div class='add'>+	if (odm_factor.target &gt; odm_factor.source)</div><div class='ctx'> 		result &amp;= ctx-&gt;config.callbacks.update_pipes_for_stream_with_slice_count(</div><div class='ctx'> 				state,</div><div class='ctx'> 				existing_state,</div><div class='ctx'> 				ctx-&gt;config.callbacks.dc-&gt;res_pool,</div><div class='ctx'> 				stream,</div><div class='del'>-				odm_factor);</div><div class='add'>+				odm_factor.target);</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -928,20 +971,20 @@ static bool map_dc_pipes_with_callbacks(struct dml2_context *ctx,</div><div class='ctx'> 		struct dml2_dml_to_dc_pipe_mapping *mapping,</div><div class='ctx'> 		const struct dc_state *existing_state)</div><div class='ctx'> {</div><div class='del'>-	unsigned int odm_factors[MAX_PIPES];</div><div class='del'>-	unsigned int mpc_factors_for_stream[MAX_PIPES];</div><div class='ctx'> 	int i;</div><div class='ctx'> 	bool result = true;</div><div class='ctx'> </div><div class='del'>-	populate_odm_factors(ctx, disp_cfg, mapping, state, odm_factors);</div><div class='del'>-	for (i = 0; i &lt; state-&gt;stream_count; i++) {</div><div class='add'>+	populate_odm_factors(ctx, disp_cfg, mapping, state, ctx-&gt;pipe_combine_scratch.odm_factors);</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++)</div><div class='ctx'> 		populate_mpc_factors_for_stream(ctx, disp_cfg, mapping, state,</div><div class='del'>-				i, odm_factors[i], mpc_factors_for_stream);</div><div class='del'>-		result &amp;= map_dc_pipes_for_stream(ctx, state, existing_state,</div><div class='del'>-				state-&gt;streams[i],</div><div class='del'>-				&amp;state-&gt;stream_status[i],</div><div class='del'>-				odm_factors[i], mpc_factors_for_stream);</div><div class='del'>-	}</div><div class='add'>+				i, ctx-&gt;pipe_combine_scratch.odm_factors[i], ctx-&gt;pipe_combine_scratch.mpc_factors[i]);</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++)</div><div class='add'>+		result &amp;= unmap_dc_pipes_for_stream(ctx, state, existing_state, state-&gt;streams[i],</div><div class='add'>+				&amp;state-&gt;stream_status[i], ctx-&gt;pipe_combine_scratch.odm_factors[i], ctx-&gt;pipe_combine_scratch.mpc_factors[i]);</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++)</div><div class='add'>+		result &amp;= map_dc_pipes_for_stream(ctx, state, existing_state, state-&gt;streams[i],</div><div class='add'>+				&amp;state-&gt;stream_status[i], ctx-&gt;pipe_combine_scratch.odm_factors[i], ctx-&gt;pipe_combine_scratch.mpc_factors[i]);</div><div class='add'>+</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1037,6 +1080,12 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s</div><div class='ctx'> 				ASSERT(false);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (ctx-&gt;config.callbacks.build_test_pattern_params &amp;&amp;</div><div class='add'>+				pipe-&gt;stream &amp;&amp;</div><div class='add'>+				pipe-&gt;prev_odm_pipe == NULL &amp;&amp;</div><div class='add'>+				pipe-&gt;top_pipe == NULL)</div><div class='add'>+			ctx-&gt;config.callbacks.build_test_pattern_params(&amp;state-&gt;res_ctx, pipe);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h<br/>index 2f91244a7b01..1538b708d8be 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h</a></div><div class='hunk'>@@ -30,6 +30,8 @@</div><div class='ctx'> #include "dml2_dc_types.h"</div><div class='ctx'> </div><div class='ctx'> struct dml2_context;</div><div class='add'>+struct dml2_dml_to_dc_pipe_mapping;</div><div class='add'>+struct dml_display_cfg_st;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * dml2_map_dc_pipes - Creates a pipe linkage in dc_state based on current display config.</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h<br/>index 1cf8a884c0fb..9dab4e43c511 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h</a></div><div class='hunk'>@@ -109,10 +109,21 @@ enum dml2_architecture {</div><div class='ctx'> 	dml2_architecture_20,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dml2_pipe_combine_factor {</div><div class='add'>+	unsigned int source;</div><div class='add'>+	unsigned int target;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dml2_pipe_combine_scratch {</div><div class='add'>+	struct dml2_pipe_combine_factor odm_factors[MAX_PIPES];</div><div class='add'>+	struct dml2_pipe_combine_factor mpc_factors[MAX_PIPES][MAX_PIPES];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct dml2_context {</div><div class='ctx'> 	enum dml2_architecture architecture;</div><div class='ctx'> 	struct dml2_configuration_options config;</div><div class='ctx'> 	struct dml2_helper_det_policy_scratch det_helper_scratch;</div><div class='add'>+	struct dml2_pipe_combine_scratch pipe_combine_scratch;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct display_mode_lib_st dml_core_ctx;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c<br/>index a20f28a5d2e7..a41812598ce8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include "dml2_translation_helper.h"</div><div class='ctx'> </div><div class='ctx'> #define NUM_DCFCLK_STAS 5</div><div class='add'>+#define NUM_DCFCLK_STAS_NEW 8</div><div class='ctx'> </div><div class='ctx'> void dml2_init_ip_params(struct dml2_context *dml2, const struct dc *in_dc, struct ip_params_st *out)</div><div class='ctx'> {</div><div class='hunk'>@@ -249,12 +250,21 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,</div><div class='ctx'> {</div><div class='ctx'> 	struct dml2_policy_build_synthetic_soc_states_scratch *s = &amp;dml2-&gt;v20.scratch.create_scratch.build_synthetic_socbb_scratch;</div><div class='ctx'> 	struct dml2_policy_build_synthetic_soc_states_params *p = &amp;dml2-&gt;v20.scratch.build_synthetic_socbb_params;</div><div class='del'>-	unsigned int dcfclk_stas_mhz[NUM_DCFCLK_STAS];</div><div class='add'>+	unsigned int dcfclk_stas_mhz[NUM_DCFCLK_STAS] = {0};</div><div class='add'>+	unsigned int dcfclk_stas_mhz_new[NUM_DCFCLK_STAS_NEW] = {0};</div><div class='add'>+	unsigned int dml_project = dml2-&gt;v20.dml_core_ctx.project;</div><div class='add'>+</div><div class='ctx'> 	unsigned int i = 0;</div><div class='ctx'> 	unsigned int transactions_per_mem_clock = 16; // project specific, depends on used Memory type</div><div class='ctx'> </div><div class='del'>-	p-&gt;dcfclk_stas_mhz = dcfclk_stas_mhz;</div><div class='del'>-	p-&gt;num_dcfclk_stas = NUM_DCFCLK_STAS;</div><div class='add'>+	if (dml_project == dml_project_dcn351) {</div><div class='add'>+		p-&gt;dcfclk_stas_mhz = dcfclk_stas_mhz_new;</div><div class='add'>+		p-&gt;num_dcfclk_stas = NUM_DCFCLK_STAS_NEW;</div><div class='add'>+	} else {</div><div class='add'>+		p-&gt;dcfclk_stas_mhz = dcfclk_stas_mhz;</div><div class='add'>+		p-&gt;num_dcfclk_stas = NUM_DCFCLK_STAS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	p-&gt;in_bbox = in_bbox;</div><div class='ctx'> 	p-&gt;out_states = out;</div><div class='ctx'> 	p-&gt;in_states = &amp;dml2-&gt;v20.scratch.create_scratch.in_states;</div><div class='hunk'>@@ -432,8 +442,7 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dml2_policy_build_synthetic_soc_states(s, p);</div><div class='del'>-	if (dml2-&gt;v20.dml_core_ctx.project == dml_project_dcn35 ||</div><div class='del'>-		dml2-&gt;v20.dml_core_ctx.project == dml_project_dcn351) {</div><div class='add'>+	if (dml2-&gt;v20.dml_core_ctx.project == dml_project_dcn35) {</div><div class='ctx'> 		// Override last out_state with data from last in_state</div><div class='ctx'> 		// This will ensure that out_state contains max fclk</div><div class='ctx'> 		memcpy(&amp;p-&gt;out_states-&gt;state_array[p-&gt;out_states-&gt;num_states - 1],</div><div class='hunk'>@@ -1052,7 +1061,46 @@ static void dml2_populate_pipe_to_plane_index_mapping(struct dml2_context *dml2,</div><div class='ctx'> 		plane_index = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-</div><div class='add'>+static void populate_dml_writeback_cfg_from_stream_state(struct dml_writeback_cfg_st *out,</div><div class='add'>+		unsigned int location, const struct dc_stream_state *in)</div><div class='add'>+{</div><div class='add'>+	if (in-&gt;num_wb_info &gt; 0) {</div><div class='add'>+		for (int i = 0; i &lt; __DML_NUM_DMB__; i++) {</div><div class='add'>+			const struct dc_writeback_info *wb_info = &amp;in-&gt;writeback_info[i];</div><div class='add'>+			/*current dml support 1 dwb per stream, limitation*/</div><div class='add'>+			if (wb_info-&gt;wb_enabled) {</div><div class='add'>+				out-&gt;WritebackEnable[location] = wb_info-&gt;wb_enabled;</div><div class='add'>+				out-&gt;ActiveWritebacksPerSurface[location] = wb_info-&gt;dwb_params.cnv_params.src_width;</div><div class='add'>+				out-&gt;WritebackDestinationWidth[location] = wb_info-&gt;dwb_params.dest_width;</div><div class='add'>+				out-&gt;WritebackDestinationHeight[location] = wb_info-&gt;dwb_params.dest_height;</div><div class='add'>+</div><div class='add'>+				out-&gt;WritebackSourceWidth[location] = wb_info-&gt;dwb_params.cnv_params.crop_en ?</div><div class='add'>+					wb_info-&gt;dwb_params.cnv_params.crop_width :</div><div class='add'>+					wb_info-&gt;dwb_params.cnv_params.src_width;</div><div class='add'>+</div><div class='add'>+				out-&gt;WritebackSourceHeight[location] = wb_info-&gt;dwb_params.cnv_params.crop_en ?</div><div class='add'>+					wb_info-&gt;dwb_params.cnv_params.crop_height :</div><div class='add'>+					wb_info-&gt;dwb_params.cnv_params.src_height;</div><div class='add'>+				/*current design does not have chroma scaling, need to follow up*/</div><div class='add'>+				out-&gt;WritebackHTaps[location] = wb_info-&gt;dwb_params.scaler_taps.h_taps &gt; 0 ?</div><div class='add'>+					wb_info-&gt;dwb_params.scaler_taps.h_taps : 1;</div><div class='add'>+				out-&gt;WritebackVTaps[location] = wb_info-&gt;dwb_params.scaler_taps.v_taps &gt; 0 ?</div><div class='add'>+					wb_info-&gt;dwb_params.scaler_taps.v_taps : 1;</div><div class='add'>+</div><div class='add'>+				out-&gt;WritebackHRatio[location] = wb_info-&gt;dwb_params.cnv_params.crop_en ?</div><div class='add'>+					(double)wb_info-&gt;dwb_params.cnv_params.crop_width /</div><div class='add'>+						(double)wb_info-&gt;dwb_params.dest_width :</div><div class='add'>+					(double)wb_info-&gt;dwb_params.cnv_params.src_width /</div><div class='add'>+						(double)wb_info-&gt;dwb_params.dest_width;</div><div class='add'>+				out-&gt;WritebackVRatio[location] = wb_info-&gt;dwb_params.cnv_params.crop_en ?</div><div class='add'>+					(double)wb_info-&gt;dwb_params.cnv_params.crop_height /</div><div class='add'>+						(double)wb_info-&gt;dwb_params.dest_height :</div><div class='add'>+					(double)wb_info-&gt;dwb_params.cnv_params.src_height /</div><div class='add'>+						(double)wb_info-&gt;dwb_params.dest_height;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0, j = 0, k = 0;</div><div class='hunk'>@@ -1097,6 +1145,10 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat</div><div class='ctx'> </div><div class='ctx'> 		populate_dml_timing_cfg_from_stream_state(&amp;dml_dispcfg-&gt;timing, disp_cfg_stream_location, context-&gt;streams[i]);</div><div class='ctx'> 		populate_dml_output_cfg_from_stream_state(&amp;dml_dispcfg-&gt;output, disp_cfg_stream_location, context-&gt;streams[i], current_pipe_context);</div><div class='add'>+		/*Call site for populate_dml_writeback_cfg_from_stream_state*/</div><div class='add'>+		populate_dml_writeback_cfg_from_stream_state(&amp;dml_dispcfg-&gt;writeback,</div><div class='add'>+			disp_cfg_stream_location, context-&gt;streams[i]);</div><div class='add'>+</div><div class='ctx'> 		switch (context-&gt;streams[i]-&gt;debug.force_odm_combine_segments) {</div><div class='ctx'> 		case 2:</div><div class='ctx'> 			dml2-&gt;v20.dml_core_ctx.policy.ODMUse[disp_cfg_stream_location] = dml_odm_use_policy_combine_2to1;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c<br/>index f15d1dbad6a9..0f8b3336e26d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c</a></div><div class='hunk'>@@ -224,7 +224,7 @@ static int find_dml_pipe_idx_by_plane_id(struct dml2_context *ctx, unsigned int</div><div class='ctx'> static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,</div><div class='ctx'> 	unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	unsigned int i, j;</div><div class='ctx'> 	bool is_plane_duplicate = dml2-&gt;v20.scratch.plane_duplicate_exists;</div><div class='ctx'> </div><div class='ctx'> 	if (!plane_id)</div><div class='hunk'>@@ -327,6 +327,8 @@ void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *cont</div><div class='ctx'> 			dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, context-&gt;res_ctx.pipe_ctx[dc_pipe_ctx_index].stream-&gt;stream_id);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (dml_pipe_idx == 0xFFFFFFFF)</div><div class='add'>+			continue;</div><div class='ctx'> 		ASSERT(in_ctx-&gt;v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[dml_pipe_idx]);</div><div class='ctx'> 		ASSERT(in_ctx-&gt;v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_pipe_idx] == context-&gt;res_ctx.pipe_ctx[dc_pipe_ctx_index].stream-&gt;stream_id);</div><div class='ctx'> </div><div class='hunk'>@@ -374,10 +376,16 @@ void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *cont</div><div class='ctx'> </div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.clk.bw_dppclk_khz = context-&gt;bw_ctx.bw.dcn.clk.dppclk_khz;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.clk.bw_dispclk_khz = context-&gt;bw_ctx.bw.dcn.clk.dispclk_khz;</div><div class='add'>+</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx-&gt;v20.dml_core_ctx.states.state_array[in_ctx-&gt;v20.scratch.mode_support_params.out_lowest_state_idx].dppclk_mhz</div><div class='ctx'> 		* 1000;</div><div class='ctx'> 	context-&gt;bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = in_ctx-&gt;v20.dml_core_ctx.states.state_array[in_ctx-&gt;v20.scratch.mode_support_params.out_lowest_state_idx].dispclk_mhz</div><div class='ctx'> 		* 1000;</div><div class='add'>+</div><div class='add'>+	if (dc-&gt;config.forced_clocks || dc-&gt;debug.max_disp_clk) {</div><div class='add'>+		context-&gt;bw_ctx.bw.dcn.clk.bw_dispclk_khz = context-&gt;bw_ctx.bw.dcn.clk.max_supported_dispclk_khz;</div><div class='add'>+		context-&gt;bw_ctx.bw.dcn.clk.bw_dppclk_khz = context-&gt;bw_ctx.bw.dcn.clk.max_supported_dppclk_khz ;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dml2_extract_watermark_set(struct dcn_watermarks *watermark, struct display_mode_lib_st *dml_core_ctx)</div><div class='hunk'>@@ -396,6 +404,71 @@ void dml2_extract_watermark_set(struct dcn_watermarks *watermark, struct display</div><div class='ctx'> 	watermark-&gt;cstate_pstate.cstate_exit_z8_ns = dml_get_wm_z8_stutter(dml_core_ctx) * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned int dml2_calc_max_scaled_time(</div><div class='add'>+		unsigned int time_per_pixel,</div><div class='add'>+		enum mmhubbub_wbif_mode mode,</div><div class='add'>+		unsigned int urgent_watermark)</div><div class='add'>+{</div><div class='add'>+	unsigned int time_per_byte = 0;</div><div class='add'>+	unsigned int total_free_entry = 0xb40;</div><div class='add'>+	unsigned int buf_lh_capability;</div><div class='add'>+	unsigned int max_scaled_time;</div><div class='add'>+</div><div class='add'>+	if (mode == PACKED_444) /* packed mode 32 bpp */</div><div class='add'>+		time_per_byte = time_per_pixel/4;</div><div class='add'>+	else if (mode == PACKED_444_FP16) /* packed mode 64 bpp */</div><div class='add'>+		time_per_byte = time_per_pixel/8;</div><div class='add'>+</div><div class='add'>+	if (time_per_byte == 0)</div><div class='add'>+		time_per_byte = 1;</div><div class='add'>+</div><div class='add'>+	buf_lh_capability = (total_free_entry*time_per_byte*32) &gt;&gt; 6; /* time_per_byte is in u6.6*/</div><div class='add'>+	max_scaled_time   = buf_lh_capability - urgent_watermark;</div><div class='add'>+	return max_scaled_time;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dml2_extract_writeback_wm(struct dc_state *context, struct display_mode_lib_st *dml_core_ctx)</div><div class='add'>+{</div><div class='add'>+	int i, j = 0;;</div><div class='add'>+	struct mcif_arb_params *wb_arb_params = NULL;</div><div class='add'>+	struct dcn_bw_writeback *bw_writeback = NULL;</div><div class='add'>+	enum mmhubbub_wbif_mode wbif_mode = PACKED_444_FP16; /*for now*/</div><div class='add'>+</div><div class='add'>+	if (context-&gt;stream_count != 0) {</div><div class='add'>+		for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+			if (context-&gt;streams[i]-&gt;num_wb_info != 0)</div><div class='add'>+				j++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (j == 0) /*no dwb */</div><div class='add'>+		return;</div><div class='add'>+	for (i = 0; i &lt; __DML_NUM_DMB__; i++) {</div><div class='add'>+		bw_writeback = &amp;context-&gt;bw_ctx.bw.dcn.bw_writeback;</div><div class='add'>+		wb_arb_params = &amp;context-&gt;bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0 ; j &lt; 4; j++) {</div><div class='add'>+			/*current dml only has one set of watermark, need to follow up*/</div><div class='add'>+			bw_writeback-&gt;mcif_wb_arb[i].cli_watermark[j] =</div><div class='add'>+					dml_get_wm_writeback_urgent(dml_core_ctx) * 1000;</div><div class='add'>+			bw_writeback-&gt;mcif_wb_arb[i].pstate_watermark[j] =</div><div class='add'>+					dml_get_wm_writeback_dram_clock_change(dml_core_ctx) * 1000;</div><div class='add'>+		}</div><div class='add'>+		if (context-&gt;res_ctx.pipe_ctx[i].stream-&gt;phy_pix_clk != 0) {</div><div class='add'>+			/* time_per_pixel should be in u6.6 format */</div><div class='add'>+			bw_writeback-&gt;mcif_wb_arb[i].time_per_pixel =</div><div class='add'>+				(1000000 &lt;&lt; 6) / context-&gt;res_ctx.pipe_ctx[i].stream-&gt;phy_pix_clk;</div><div class='add'>+		}</div><div class='add'>+		bw_writeback-&gt;mcif_wb_arb[i].slice_lines = 32;</div><div class='add'>+		bw_writeback-&gt;mcif_wb_arb[i].arbitration_slice = 2;</div><div class='add'>+		bw_writeback-&gt;mcif_wb_arb[i].max_scaled_time =</div><div class='add'>+			dml2_calc_max_scaled_time(wb_arb_params-&gt;time_per_pixel,</div><div class='add'>+					wbif_mode, 	wb_arb_params-&gt;cli_watermark[0]);</div><div class='add'>+		/*not required any more*/</div><div class='add'>+		bw_writeback-&gt;mcif_wb_arb[i].dram_speed_change_duration =</div><div class='add'>+			dml_get_wm_writeback_dram_clock_change(dml_core_ctx) * 1000;</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> void dml2_initialize_det_scratch(struct dml2_context *in_ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -468,6 +541,9 @@ bool dml2_verify_det_buffer_configuration(struct dml2_context *in_ctx, struct dc</div><div class='ctx'> 			dml_pipe_idx = find_dml_pipe_idx_by_plane_id(in_ctx, plane_id);</div><div class='ctx'> 		else</div><div class='ctx'> 			dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, display_state-&gt;res_ctx.pipe_ctx[i].stream-&gt;stream_id);</div><div class='add'>+</div><div class='add'>+		if (dml_pipe_idx == 0xFFFFFFFF)</div><div class='add'>+			continue;</div><div class='ctx'> 		total_det_allocated += dml_get_det_buffer_size_kbytes(&amp;in_ctx-&gt;v20.dml_core_ctx, dml_pipe_idx);</div><div class='ctx'> 		if (total_det_allocated &gt; max_det_size) {</div><div class='ctx'> 			need_recalculation = true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h<br/>index 5842d6d3c4b6..04fcfe637119 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.h</a></div><div class='hunk'>@@ -40,9 +40,14 @@ void dml2_util_copy_dml_output(struct dml_output_cfg_st *dml_output_array, unsig</div><div class='ctx'> unsigned int dml2_util_get_maximum_odm_combine_for_output(bool force_odm_4to1, enum dml_output_encoder_class encoder, bool dsc_enabled);</div><div class='ctx'> void dml2_copy_clocks_to_dc_state(struct dml2_dcn_clocks *out_clks, struct dc_state *context);</div><div class='ctx'> void dml2_extract_watermark_set(struct dcn_watermarks *watermark, struct display_mode_lib_st *dml_core_ctx);</div><div class='add'>+void dml2_extract_writeback_wm(struct dc_state *context, struct display_mode_lib_st *dml_core_ctx);</div><div class='ctx'> int dml2_helper_find_dml_pipe_idx_by_stream_id(struct dml2_context *ctx, unsigned int stream_id);</div><div class='ctx'> bool is_dtbclk_required(const struct dc *dc, struct dc_state *context);</div><div class='ctx'> bool dml2_is_stereo_timing(const struct dc_stream_state *stream);</div><div class='add'>+unsigned int dml2_calc_max_scaled_time(</div><div class='add'>+		unsigned int time_per_pixel,</div><div class='add'>+		enum mmhubbub_wbif_mode mode,</div><div class='add'>+		unsigned int urgent_watermark);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * dml2_dc_construct_pipes - This function will determine if we need additional pipes based</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c<br/>index 72cca367062e..9412d5384a41 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c</a></div><div class='hunk'>@@ -570,6 +570,7 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 	struct dml2_dcn_clocks out_clks;</div><div class='ctx'> 	unsigned int result = 0;</div><div class='ctx'> 	bool need_recalculation = false;</div><div class='add'>+	uint32_t cstate_enter_plus_exit_z8_ns;</div><div class='ctx'> </div><div class='ctx'> 	if (!context || context-&gt;stream_count == 0)</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -639,8 +640,17 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 		dml2_extract_watermark_set(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.b, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='ctx'> 		memcpy(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.c, &amp;dml2-&gt;v20.g6_temp_read_watermark_set, sizeof(context-&gt;bw_ctx.bw.dcn.watermarks.c));</div><div class='ctx'> 		dml2_extract_watermark_set(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.d, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='add'>+		dml2_extract_writeback_wm(context, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='ctx'> 		//copy for deciding zstate use</div><div class='ctx'> 		context-&gt;bw_ctx.dml.vba.StutterPeriod = context-&gt;bw_ctx.dml2-&gt;v20.dml_core_ctx.mp.StutterPeriod;</div><div class='add'>+</div><div class='add'>+		cstate_enter_plus_exit_z8_ns = context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns;</div><div class='add'>+</div><div class='add'>+		if (context-&gt;bw_ctx.dml.vba.StutterPeriod &lt; in_dc-&gt;debug.minimum_z8_residency_time &amp;&amp;</div><div class='add'>+				cstate_enter_plus_exit_z8_ns &lt; in_dc-&gt;debug.minimum_z8_residency_time * 1000)</div><div class='add'>+			cstate_enter_plus_exit_z8_ns = in_dc-&gt;debug.minimum_z8_residency_time * 1000;</div><div class='add'>+</div><div class='add'>+		context-&gt;bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns = cstate_enter_plus_exit_z8_ns;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='hunk'>@@ -681,13 +691,13 @@ static void dml2_apply_debug_options(const struct dc *dc, struct dml2_context *d</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dml2_validate(const struct dc *in_dc, struct dc_state *context, bool fast_validate)</div><div class='add'>+bool dml2_validate(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2, bool fast_validate)</div><div class='ctx'> {</div><div class='ctx'> 	bool out = false;</div><div class='ctx'> </div><div class='del'>-	if (!(context-&gt;bw_ctx.dml2))</div><div class='add'>+	if (!dml2)</div><div class='ctx'> 		return false;</div><div class='del'>-	dml2_apply_debug_options(in_dc, context-&gt;bw_ctx.dml2);</div><div class='add'>+	dml2_apply_debug_options(in_dc, dml2);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* Use dml_validate_only for fast_validate path */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h<br/>index cc662d682fd4..4a8bd2f4195e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h</a></div><div class='hunk'>@@ -71,6 +71,7 @@ struct dml2_dcn_clocks {</div><div class='ctx'> struct dml2_dc_callbacks {</div><div class='ctx'> 	struct dc *dc;</div><div class='ctx'> 	bool (*build_scaling_params)(struct pipe_ctx *pipe_ctx);</div><div class='add'>+	void (*build_test_pattern_params)(struct resource_context *res_ctx, struct pipe_ctx *otg_master);</div><div class='ctx'> 	bool (*can_support_mclk_switch_using_fw_based_vblank_stretch)(struct dc *dc, struct dc_state *context);</div><div class='ctx'> 	bool (*acquire_secondary_pipe_for_mpc_odm)(const struct dc *dc, struct dc_state *state, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm);</div><div class='ctx'> 	bool (*update_pipes_for_stream_with_slice_count)(</div><div class='hunk'>@@ -86,8 +87,23 @@ struct dml2_dc_callbacks {</div><div class='ctx'> 			const struct dc_plane_state *plane,</div><div class='ctx'> 			int slice_count);</div><div class='ctx'> 	int (*get_odm_slice_index)(const struct pipe_ctx *opp_head);</div><div class='add'>+	int (*get_odm_slice_count)(const struct pipe_ctx *opp_head);</div><div class='ctx'> 	int (*get_mpc_slice_index)(const struct pipe_ctx *dpp_pipe);</div><div class='add'>+	int (*get_mpc_slice_count)(const struct pipe_ctx *dpp_pipe);</div><div class='ctx'> 	struct pipe_ctx *(*get_opp_head)(const struct pipe_ctx *pipe_ctx);</div><div class='add'>+	struct pipe_ctx *(*get_otg_master_for_stream)(</div><div class='add'>+		struct resource_context *res_ctx,</div><div class='add'>+		const struct dc_stream_state *stream);</div><div class='add'>+	int (*get_opp_heads_for_otg_master)(const struct pipe_ctx *otg_master,</div><div class='add'>+		struct resource_context *res_ctx,</div><div class='add'>+		struct pipe_ctx *opp_heads[MAX_PIPES]);</div><div class='add'>+	int (*get_dpp_pipes_for_plane)(const struct dc_plane_state *plane,</div><div class='add'>+			struct resource_context *res_ctx,</div><div class='add'>+			struct pipe_ctx *dpp_pipes[MAX_PIPES]);</div><div class='add'>+	struct dc_stream_status *(*get_stream_status)(</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		const struct dc_stream_state *stream);</div><div class='add'>+	struct dc_stream_state *(*get_stream_from_id)(const struct dc_state *state, unsigned int id);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dml2_dc_svp_callbacks {</div><div class='hunk'>@@ -96,10 +112,10 @@ struct dml2_dc_svp_callbacks {</div><div class='ctx'> 	struct dc_stream_state* (*create_phantom_stream)(const struct dc *dc,</div><div class='ctx'> 			struct dc_state *state,</div><div class='ctx'> 			struct dc_stream_state *main_stream);</div><div class='del'>-	struct dc_plane_state* (*create_phantom_plane)(struct dc *dc,</div><div class='add'>+	struct dc_plane_state* (*create_phantom_plane)(const struct dc *dc,</div><div class='ctx'> 			struct dc_state *state,</div><div class='ctx'> 			struct dc_plane_state *main_plane);</div><div class='del'>-	enum dc_status (*add_phantom_stream)(struct dc *dc,</div><div class='add'>+	enum dc_status (*add_phantom_stream)(const struct dc *dc,</div><div class='ctx'> 			struct dc_state *state,</div><div class='ctx'> 			struct dc_stream_state *phantom_stream,</div><div class='ctx'> 			struct dc_stream_state *main_stream);</div><div class='hunk'>@@ -108,7 +124,7 @@ struct dml2_dc_svp_callbacks {</div><div class='ctx'> 			struct dc_stream_state *stream,</div><div class='ctx'> 			struct dc_plane_state *plane_state,</div><div class='ctx'> 			struct dc_state *context);</div><div class='del'>-	enum dc_status (*remove_phantom_stream)(struct dc *dc,</div><div class='add'>+	enum dc_status (*remove_phantom_stream)(const struct dc *dc,</div><div class='ctx'> 			struct dc_state *state,</div><div class='ctx'> 			struct dc_stream_state *stream);</div><div class='ctx'> 	void (*release_phantom_plane)(const struct dc *dc,</div><div class='hunk'>@@ -121,6 +137,15 @@ struct dml2_dc_svp_callbacks {</div><div class='ctx'> 	enum mall_stream_type (*get_pipe_subvp_type)(const struct dc_state *state, const struct pipe_ctx *pipe_ctx);</div><div class='ctx'> 	enum mall_stream_type (*get_stream_subvp_type)(const struct dc_state *state, const struct dc_stream_state *stream);</div><div class='ctx'> 	struct dc_stream_state *(*get_paired_subvp_stream)(const struct dc_state *state, const struct dc_stream_state *stream);</div><div class='add'>+	bool (*remove_phantom_streams_and_planes)(</div><div class='add'>+			const struct dc *dc,</div><div class='add'>+			struct dc_state *state);</div><div class='add'>+	void (*release_phantom_streams_and_planes)(</div><div class='add'>+			const struct dc *dc,</div><div class='add'>+			struct dc_state *state);</div><div class='add'>+	unsigned int (*calculate_mall_ways_from_bytes)(</div><div class='add'>+				const struct dc *dc,</div><div class='add'>+				unsigned int total_size_in_mall_bytes);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dml2_clks_table_entry {</div><div class='hunk'>@@ -191,6 +216,8 @@ struct dml2_configuration_options {</div><div class='ctx'> 	unsigned int max_segments_per_hubp;</div><div class='ctx'> 	unsigned int det_segment_size;</div><div class='ctx'> 	bool map_dc_pipes_with_callbacks;</div><div class='add'>+</div><div class='add'>+	bool use_clock_dc_limits;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -244,6 +271,7 @@ void dml2_reinit(const struct dc *in_dc,</div><div class='ctx'>  */</div><div class='ctx'> bool dml2_validate(const struct dc *in_dc,</div><div class='ctx'> 				   struct dc_state *context,</div><div class='add'>+				   struct dml2_context *dml2,</div><div class='ctx'> 				   bool fast_validate);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/Makefile b/drivers/gpu/drm/amd/display/dc/dpp/Makefile<br/>new file mode 100644<br/>index 000000000000..99bd36073561<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/Makefile</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+</div><div class='add'>+# Copyright 2022 Advanced Micro Devices, Inc.</div><div class='add'>+#</div><div class='add'>+# Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+# copy of this software and associated documentation files (the "Software"),</div><div class='add'>+# to deal in the Software without restriction, including without limitation</div><div class='add'>+# the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+# and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+# Software is furnished to do so, subject to the following conditions:</div><div class='add'>+#</div><div class='add'>+# The above copyright notice and this permission notice shall be included in</div><div class='add'>+# all copies or substantial portions of the Software.</div><div class='add'>+#</div><div class='add'>+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+# OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+#</div><div class='add'>+# Makefile for the 'dpp' sub-component of DAL.</div><div class='add'>+#</div><div class='add'>+ifdef CONFIG_DRM_AMD_DC_FP</div><div class='add'>+###############################################################################</div><div class='add'>+# DCN</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+DPP_DCN10 = dcn10_dpp.o dcn10_dpp_dscl.o dcn10_dpp_cm.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_DPP_DCN10 = $(addprefix $(AMDDALPATH)/dc/dpp/dcn10/,$(DPP_DCN10))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_DPP_DCN10)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+DPP_DCN20 = dcn20_dpp.o dcn20_dpp_cm.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_DPP_DCN20 = $(addprefix $(AMDDALPATH)/dc/dpp/dcn20/,$(DPP_DCN20))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_DPP_DCN20)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+DPP_DCN201 = dcn201_dpp.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_DPP_DCN201 = $(addprefix $(AMDDALPATH)/dc/dpp/dcn201/,$(DPP_DCN201))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_DPP_DCN201)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+DPP_DCN30 = dcn30_dpp.o dcn30_dpp_cm.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_DPP_DCN30 = $(addprefix $(AMDDALPATH)/dc/dpp/dcn30/,$(DPP_DCN30))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_DPP_DCN30)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+DPP_DCN32 = dcn32_dpp.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_DPP_DCN32 = $(addprefix $(AMDDALPATH)/dc/dpp/dcn32/,$(DPP_DCN32))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_DPP_DCN32)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+DPP_DCN35 = dcn35_dpp.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_DPP_DCN35 = $(addprefix $(AMDDALPATH)/dc/dpp/dcn35/,$(DPP_DCN35))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_DPP_DCN35)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+endif
\ No newline at end of file</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt<br/>new file mode 100644<br/>index 000000000000..1318c6fba3e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+dal3_subdirectory_sources(</div><div class='add'>+  dcn10_dpp.c</div><div class='add'>+  dcn10_dpp_cm.c</div><div class='add'>+  dcn10_dpp_dscl.c</div><div class='add'>+  dcn10_dpp.h</div><div class='add'>+)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c<br/>index 4e391fd1d71c..e1da48b05d00 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> </div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn10_dpp.h"</div><div class='add'>+#include "dcn10/dcn10_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> </div><div class='ctx'> #define NUM_PHASES    64</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h<br/>index a039eedc7c24..c48139bed11f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h</a></div><div class='hunk'>@@ -1090,7 +1090,8 @@</div><div class='ctx'> 	type DPP_CLOCK_ENABLE; \</div><div class='ctx'> 	type CM_HDR_MULT_COEF; \</div><div class='ctx'> 	type CUR0_FP_BIAS; \</div><div class='del'>-	type CUR0_FP_SCALE;</div><div class='add'>+	type CUR0_FP_SCALE;\</div><div class='add'>+	type DISPCLK_R_GATE_DISABLE;</div><div class='ctx'> </div><div class='ctx'> struct dcn_dpp_shift {</div><div class='ctx'> 	TF_REG_FIELD_LIST(uint8_t)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c<br/>index 2f994a3a0b9c..006e23842016 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c</a></div><div class='hunk'>@@ -28,9 +28,9 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> </div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn10_dpp.h"</div><div class='add'>+#include "dcn10/dcn10_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='del'>-#include "dcn10_cm_common.h"</div><div class='add'>+#include "dcn10/dcn10_cm_common.h"</div><div class='ctx'> </div><div class='ctx'> #define NUM_PHASES    64</div><div class='ctx'> #define HORZ_MAX_TAPS 8</div><div class='hunk'>@@ -234,7 +234,7 @@ void dpp1_cm_get_gamut_remap(struct dpp *dpp_base,</div><div class='ctx'> 			     struct dpp_grph_csc_adjustment *adjust)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);</div><div class='del'>-	uint16_t arr_reg_val[12];</div><div class='add'>+	uint16_t arr_reg_val[12] = {0};</div><div class='ctx'> 	enum gamut_remap_select select;</div><div class='ctx'> </div><div class='ctx'> 	read_gamut_remap(dpp, arr_reg_val, &amp;select);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c<br/>index 5ca9ab8a76e8..808bca9fb804 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> </div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn10_dpp.h"</div><div class='add'>+#include "dcn10/dcn10_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt<br/>new file mode 100644<br/>index 000000000000..9c2d7096348e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+dal3_subdirectory_sources(</div><div class='add'>+  dcn20_dpp.c</div><div class='add'>+  dcn20_dpp_cm.c</div><div class='add'>+  dcn20_dpp.h</div><div class='add'>+)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c<br/>index 1516c0a48726..56ebd7164dd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> </div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn20_dpp.h"</div><div class='add'>+#include "dcn20/dcn20_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> </div><div class='ctx'> #define NUM_PHASES    64</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h b/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h<br/>index 672cde46c4b9..49cb25c9cb36 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h</a></div><div class='hunk'>@@ -736,7 +736,7 @@ bool dpp20_program_shaper(</div><div class='ctx'> </div><div class='ctx'> bool dpp20_program_3dlut(</div><div class='ctx'> 		struct dpp *dpp_base,</div><div class='del'>-		struct tetrahedral_params *params);</div><div class='add'>+		const struct tetrahedral_params *params);</div><div class='ctx'> </div><div class='ctx'> void dpp2_cnv_set_alpha_keyer(</div><div class='ctx'> 			struct dpp *dpp_base,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c<br/>index 58dc69926e8a..31613372e214 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> </div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn20_dpp.h"</div><div class='add'>+#include "dcn20/dcn20_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> </div><div class='ctx'> #include "dcn10/dcn10_cm_common.h"</div><div class='hunk'>@@ -274,7 +274,7 @@ void dpp2_cm_get_gamut_remap(struct dpp *dpp_base,</div><div class='ctx'> 			     struct dpp_grph_csc_adjustment *adjust)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);</div><div class='del'>-	uint16_t arr_reg_val[12];</div><div class='add'>+	uint16_t arr_reg_val[12] = {0};</div><div class='ctx'> 	enum dcn20_gamut_remap_select select;</div><div class='ctx'> </div><div class='ctx'> 	read_gamut_remap(dpp, arr_reg_val, &amp;select);</div><div class='hunk'>@@ -1114,15 +1114,15 @@ static void dpp20_select_3dlut_ram_mask(</div><div class='ctx'> </div><div class='ctx'> bool dpp20_program_3dlut(</div><div class='ctx'> 		struct dpp *dpp_base,</div><div class='del'>-		struct tetrahedral_params *params)</div><div class='add'>+		const struct tetrahedral_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	enum dc_lut_mode mode;</div><div class='ctx'> 	bool is_17x17x17;</div><div class='ctx'> 	bool is_12bits_color_channel;</div><div class='del'>-	struct dc_rgb *lut0;</div><div class='del'>-	struct dc_rgb *lut1;</div><div class='del'>-	struct dc_rgb *lut2;</div><div class='del'>-	struct dc_rgb *lut3;</div><div class='add'>+	const struct dc_rgb *lut0;</div><div class='add'>+	const struct dc_rgb *lut1;</div><div class='add'>+	const struct dc_rgb *lut2;</div><div class='add'>+	const struct dc_rgb *lut3;</div><div class='ctx'> 	int lut_size0;</div><div class='ctx'> 	int lut_size;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt<br/>new file mode 100644<br/>index 000000000000..7711cd3c47a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+dal3_subdirectory_sources(</div><div class='add'>+    dcn201_dpp.c</div><div class='add'>+    dcn201_dpp.h</div><div class='add'>+)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c<br/>index f809a7d21033..345202fee40f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> </div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn201_dpp.h"</div><div class='add'>+#include "dcn201/dcn201_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> </div><div class='ctx'> #define REG(reg)\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.h b/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h<br/>index cbd5b47b4acf..cbd5b47b4acf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h</a></div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt<br/>new file mode 100644<br/>index 000000000000..0faee2a1e32b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+dal3_subdirectory_sources(</div><div class='add'>+  dcn30_dpp.c</div><div class='add'>+  dcn30_dpp_cm.c</div><div class='add'>+  dcn30_dpp.h</div><div class='add'>+)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c<br/>index a3a769aad042..f8c0cee34080 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c</a></div><div class='hunk'>@@ -26,9 +26,9 @@</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn30_dpp.h"</div><div class='add'>+#include "dcn30/dcn30_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='del'>-#include "dcn30_cm_common.h"</div><div class='add'>+#include "dcn30/dcn30_cm_common.h"</div><div class='ctx'> </div><div class='ctx'> #define REG(reg)\</div><div class='ctx'> 	dpp-&gt;tf_regs-&gt;reg</div><div class='hunk'>@@ -293,9 +293,11 @@ void dpp3_cnv_setup (</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FIX:</div><div class='ctx'> 		pixel_format = 112;</div><div class='add'>+		alpha_en = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FIX:</div><div class='ctx'> 		pixel_format = 113;</div><div class='add'>+		alpha_en = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SURFACE_PIXEL_FORMAT_VIDEO_ACrYCb2101010:</div><div class='ctx'> 		pixel_format = 114;</div><div class='hunk'>@@ -319,9 +321,11 @@ void dpp3_cnv_setup (</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FLOAT:</div><div class='ctx'> 		pixel_format = 118;</div><div class='add'>+		alpha_en = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FLOAT:</div><div class='ctx'> 		pixel_format = 119;</div><div class='add'>+		alpha_en = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1384,15 +1388,15 @@ static void dpp3_select_3dlut_ram_mask(</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool dpp3_program_3dlut(struct dpp *dpp_base,</div><div class='del'>-			       struct tetrahedral_params *params)</div><div class='add'>+			       const struct tetrahedral_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	enum dc_lut_mode mode;</div><div class='ctx'> 	bool is_17x17x17;</div><div class='ctx'> 	bool is_12bits_color_channel;</div><div class='del'>-	struct dc_rgb *lut0;</div><div class='del'>-	struct dc_rgb *lut1;</div><div class='del'>-	struct dc_rgb *lut2;</div><div class='del'>-	struct dc_rgb *lut3;</div><div class='add'>+	const struct dc_rgb *lut0;</div><div class='add'>+	const struct dc_rgb *lut1;</div><div class='add'>+	const struct dc_rgb *lut2;</div><div class='add'>+	const struct dc_rgb *lut3;</div><div class='ctx'> 	int lut_size0;</div><div class='ctx'> 	int lut_size;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h<br/>index 2ac8045a87a1..269f437c1633 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h</a></div><div class='hunk'>@@ -132,6 +132,8 @@</div><div class='ctx'> 	SRI(CM_POST_CSC_B_C33_C34, CM, id), \</div><div class='ctx'> 	SRI(CM_MEM_PWR_CTRL, CM, id), \</div><div class='ctx'> 	SRI(CM_CONTROL, CM, id), \</div><div class='add'>+	SRI(CM_TEST_DEBUG_INDEX, CM, id), \</div><div class='add'>+	SRI(CM_TEST_DEBUG_DATA, CM, id), \</div><div class='ctx'> 	SRI(FORMAT_CONTROL, CNVC_CFG, id), \</div><div class='ctx'> 	SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \</div><div class='ctx'> 	SRI(CURSOR0_CONTROL, CNVC_CUR, id), \</div><div class='hunk'>@@ -294,6 +296,7 @@</div><div class='ctx'> 	TF_SF(CM0_CM_POST_CSC_C11_C12, CM_POST_CSC_C12, mask_sh), \</div><div class='ctx'> 	TF_SF(CM0_CM_POST_CSC_C33_C34, CM_POST_CSC_C33, mask_sh), \</div><div class='ctx'> 	TF_SF(CM0_CM_POST_CSC_C33_C34, CM_POST_CSC_C34, mask_sh), \</div><div class='add'>+	TF_SF(CM0_CM_TEST_DEBUG_INDEX, CM_TEST_DEBUG_INDEX, mask_sh), \</div><div class='ctx'> 	TF_SF(CNVC_CFG0_FORMAT_CONTROL, CNVC_BYPASS, mask_sh), \</div><div class='ctx'> 	TF2_SF(CNVC_CFG0, FORMAT_CONTROL__ALPHA_EN, mask_sh), \</div><div class='ctx'> 	TF_SF(CNVC_CFG0_FORMAT_CONTROL, FORMAT_EXPANSION_MODE, mask_sh), \</div><div class='hunk'>@@ -426,6 +429,7 @@</div><div class='ctx'> 	type CM_GAMCOR_LUT_DATA; \</div><div class='ctx'> 	type CM_GAMCOR_LUT_WRITE_COLOR_MASK; \</div><div class='ctx'> 	type CM_GAMCOR_LUT_READ_COLOR_SEL; \</div><div class='add'>+	type CM_GAMCOR_LUT_READ_DBG; \</div><div class='ctx'> 	type CM_GAMCOR_LUT_HOST_SEL; \</div><div class='ctx'> 	type CM_GAMCOR_LUT_CONFIG_MODE; \</div><div class='ctx'> 	type CM_GAMCOR_LUT_STATUS; \</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c<br/>index 2f5b3fbd3507..82eca0e7b7d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c</a></div><div class='hunk'>@@ -26,9 +26,9 @@</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn30_dpp.h"</div><div class='add'>+#include "dcn30/dcn30_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='del'>-#include "dcn30_cm_common.h"</div><div class='add'>+#include "dcn30/dcn30_cm_common.h"</div><div class='ctx'> </div><div class='ctx'> #define REG(reg)\</div><div class='ctx'> 	dpp-&gt;tf_regs-&gt;reg</div><div class='hunk'>@@ -445,7 +445,7 @@ void dpp3_cm_get_gamut_remap(struct dpp *dpp_base,</div><div class='ctx'> 			     struct dpp_grph_csc_adjustment *adjust)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);</div><div class='del'>-	uint16_t arr_reg_val[12];</div><div class='add'>+	uint16_t arr_reg_val[12] = {0};</div><div class='ctx'> 	int select;</div><div class='ctx'> </div><div class='ctx'> 	read_gamut_remap(dpp, arr_reg_val, &amp;select);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt<br/>new file mode 100644<br/>index 000000000000..7743edc4599f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+dal3_subdirectory_sources(</div><div class='add'>+  dcn32_dpp.c</div><div class='add'>+  dcn32_dpp.h</div><div class='add'>+)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c<br/>index 681e75c6dbaf..41679997b44d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "reg_helper.h"</div><div class='del'>-#include "dcn32_dpp.h"</div><div class='add'>+#include "dcn32/dcn32_dpp.h"</div><div class='ctx'> #include "basics/conversion.h"</div><div class='ctx'> #include "dcn30/dcn30_cm_common.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.h b/drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h<br/>index 572958d287eb..572958d287eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h</a></div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt<br/>new file mode 100644<br/>index 000000000000..91df5db26435<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+dal3_subdirectory_sources(</div><div class='add'>+  dcn35_dpp.c</div><div class='add'>+  dcn35_dpp.h</div><div class='add'>+)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c<br/>new file mode 100644<br/>index 000000000000..e16274fee31d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: AMD</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "core_types.h"</div><div class='add'>+#include "dcn35/dcn35_dpp.h"</div><div class='add'>+#include "reg_helper.h"</div><div class='add'>+</div><div class='add'>+#define REG(reg) dpp-&gt;tf_regs-&gt;reg</div><div class='add'>+</div><div class='add'>+#define CTX dpp-&gt;base.ctx</div><div class='add'>+</div><div class='add'>+#undef FN</div><div class='add'>+#define FN(reg_name, field_name)                                       \</div><div class='add'>+	((const struct dcn35_dpp_shift *)(dpp-&gt;tf_shift))-&gt;field_name, \</div><div class='add'>+	((const struct dcn35_dpp_mask *)(dpp-&gt;tf_mask))-&gt;field_name</div><div class='add'>+</div><div class='add'>+void dpp35_dppclk_control(</div><div class='add'>+		struct dpp *dpp_base,</div><div class='add'>+		bool dppclk_div,</div><div class='add'>+		bool enable)</div><div class='add'>+{</div><div class='add'>+	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		if (dpp-&gt;tf_mask-&gt;DPPCLK_RATE_CONTROL)</div><div class='add'>+			REG_UPDATE_2(DPP_CONTROL,</div><div class='add'>+				DPPCLK_RATE_CONTROL, dppclk_div,</div><div class='add'>+				DPP_CLOCK_ENABLE, 1);</div><div class='add'>+		else</div><div class='add'>+			REG_UPDATE_2(DPP_CONTROL,</div><div class='add'>+					DPP_CLOCK_ENABLE, 1,</div><div class='add'>+					DISPCLK_R_GATE_DISABLE, 1);</div><div class='add'>+	} else</div><div class='add'>+		REG_UPDATE_2(DPP_CONTROL,</div><div class='add'>+				DPP_CLOCK_ENABLE, 0,</div><div class='add'>+				DISPCLK_R_GATE_DISABLE, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dpp_funcs dcn35_dpp_funcs = {</div><div class='add'>+	.dpp_program_gamcor_lut		= dpp3_program_gamcor_lut,</div><div class='add'>+	.dpp_read_state				= dpp30_read_state,</div><div class='add'>+	.dpp_reset					= dpp_reset,</div><div class='add'>+	.dpp_set_scaler				= dpp1_dscl_set_scaler_manual_scale,</div><div class='add'>+	.dpp_get_optimal_number_of_taps	= dpp3_get_optimal_number_of_taps,</div><div class='add'>+	.dpp_set_gamut_remap		= dpp3_cm_set_gamut_remap,</div><div class='add'>+	.dpp_set_csc_adjustment		= NULL,</div><div class='add'>+	.dpp_set_csc_default		= NULL,</div><div class='add'>+	.dpp_program_regamma_pwl	= NULL,</div><div class='add'>+	.dpp_set_pre_degam			= dpp3_set_pre_degam,</div><div class='add'>+	.dpp_program_input_lut		= NULL,</div><div class='add'>+	.dpp_full_bypass			= dpp1_full_bypass,</div><div class='add'>+	.dpp_setup					= dpp3_cnv_setup,</div><div class='add'>+	.dpp_program_degamma_pwl	= NULL,</div><div class='add'>+	.dpp_program_cm_dealpha		= dpp3_program_cm_dealpha,</div><div class='add'>+	.dpp_program_cm_bias		= dpp3_program_cm_bias,</div><div class='add'>+</div><div class='add'>+	.dpp_program_blnd_lut		= NULL, // BLNDGAM is removed completely in DCN3.2 DPP</div><div class='add'>+	.dpp_program_shaper_lut		= NULL, // CM SHAPER block is removed in DCN3.2 DPP, (it is in MPCC, programmable before or after BLND)</div><div class='add'>+	.dpp_program_3dlut			= NULL, // CM 3DLUT block is removed in DCN3.2 DPP, (it is in MPCC, programmable before or after BLND)</div><div class='add'>+</div><div class='add'>+	.dpp_program_bias_and_scale	= NULL,</div><div class='add'>+	.dpp_cnv_set_alpha_keyer	= dpp2_cnv_set_alpha_keyer,</div><div class='add'>+	.set_cursor_attributes		= dpp3_set_cursor_attributes,</div><div class='add'>+	.set_cursor_position		= dpp1_set_cursor_position,</div><div class='add'>+	.set_optional_cursor_attributes	= dpp1_cnv_set_optional_cursor_attributes,</div><div class='add'>+	.dpp_dppclk_control			= dpp35_dppclk_control,</div><div class='add'>+	.dpp_set_hdr_multiplier		= dpp3_set_hdr_multiplier,</div><div class='add'>+	.dpp_get_gamut_remap		= dpp3_cm_get_gamut_remap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+bool dpp35_construct(</div><div class='add'>+	struct dcn3_dpp *dpp, struct dc_context *ctx,</div><div class='add'>+	uint32_t inst, const struct dcn3_dpp_registers *tf_regs,</div><div class='add'>+	const struct dcn35_dpp_shift *tf_shift,</div><div class='add'>+	const struct dcn35_dpp_mask *tf_mask)</div><div class='add'>+{</div><div class='add'>+	bool ret = dpp32_construct(dpp, ctx, inst, tf_regs,</div><div class='add'>+			      (const struct dcn3_dpp_shift *)(tf_shift),</div><div class='add'>+			      (const struct dcn3_dpp_mask *)(tf_mask));</div><div class='add'>+</div><div class='add'>+	dpp-&gt;base.funcs = &amp;dcn35_dpp_funcs;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable)</div><div class='add'>+{</div><div class='add'>+	REG_UPDATE(DPP_CONTROL, DPP_FGCG_REP_DIS, !enable);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.h b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h<br/>index 09b84307cd9e..135872d88219 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h</a></div><div class='hunk'>@@ -31,7 +31,9 @@</div><div class='ctx'> </div><div class='ctx'> #define DPP_REG_LIST_SH_MASK_DCN35(mask_sh)  \</div><div class='ctx'> 	DPP_REG_LIST_SH_MASK_DCN30_COMMON(mask_sh), \</div><div class='del'>-		TF_SF(DPP_TOP0_DPP_CONTROL, DPP_FGCG_REP_DIS, mask_sh)</div><div class='add'>+		TF_SF(DPP_TOP0_DPP_CONTROL, DPP_FGCG_REP_DIS, mask_sh), \</div><div class='add'>+		TF_SF(DPP_TOP0_DPP_CONTROL, DPP_FGCG_REP_DIS, mask_sh), \</div><div class='add'>+		TF_SF(DPP_TOP0_DPP_CONTROL, DISPCLK_R_GATE_DISABLE, mask_sh)</div><div class='ctx'> </div><div class='ctx'> #define DPP_REG_FIELD_LIST_DCN35(type)         \</div><div class='ctx'> 	struct {                               \</div><div class='hunk'>@@ -47,6 +49,11 @@ struct dcn35_dpp_mask {</div><div class='ctx'> 	DPP_REG_FIELD_LIST_DCN35(uint32_t);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+void dpp35_dppclk_control(</div><div class='add'>+		struct dpp *dpp_base,</div><div class='add'>+		bool dppclk_div,</div><div class='add'>+		bool enable);</div><div class='add'>+</div><div class='ctx'> bool dpp35_construct(struct dcn3_dpp *dpp3, struct dc_context *ctx,</div><div class='ctx'> 		     uint32_t inst, const struct dcn3_dpp_registers *tf_regs,</div><div class='ctx'> 		     const struct dcn35_dpp_shift *tf_shift,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c<br/>index ac41f9c0a283..150ef23440a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c</a></div><div class='hunk'>@@ -458,7 +458,7 @@ bool dc_dsc_compute_bandwidth_range(</div><div class='ctx'> 	bool is_dsc_possible = false;</div><div class='ctx'> 	struct dsc_enc_caps dsc_enc_caps;</div><div class='ctx'> 	struct dsc_enc_caps dsc_common_caps;</div><div class='del'>-	struct dc_dsc_config config;</div><div class='add'>+	struct dc_dsc_config config = {0};</div><div class='ctx'> 	struct dc_dsc_config_options options = {0};</div><div class='ctx'> </div><div class='ctx'> 	options.dsc_min_slice_height_override = dsc_min_slice_height_override;</div><div class='hunk'>@@ -868,9 +868,9 @@ static bool setup_dsc_config(</div><div class='ctx'> 		struct dc_dsc_config *dsc_cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsc_enc_caps dsc_common_caps;</div><div class='del'>-	int max_slices_h;</div><div class='del'>-	int min_slices_h;</div><div class='del'>-	int num_slices_h;</div><div class='add'>+	int max_slices_h = 0;</div><div class='add'>+	int min_slices_h = 0;</div><div class='add'>+	int num_slices_h = 0;</div><div class='ctx'> 	int pic_width;</div><div class='ctx'> 	int slice_width;</div><div class='ctx'> 	int target_bpp;</div><div class='hunk'>@@ -1055,7 +1055,12 @@ static bool setup_dsc_config(</div><div class='ctx'> 	if (!is_dsc_possible)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='del'>-	dsc_cfg-&gt;num_slices_v = pic_height/slice_height;</div><div class='add'>+	if (slice_height &gt; 0) {</div><div class='add'>+		dsc_cfg-&gt;num_slices_v = pic_height / slice_height;</div><div class='add'>+	} else {</div><div class='add'>+		is_dsc_possible = false;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (target_bandwidth_kbps &gt; 0) {</div><div class='ctx'> 		is_dsc_possible = decide_dsc_target_bpp_x16(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c b/drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c<br/>index 36d6c1646a51..59864130cf83 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c</a></div><div class='hunk'>@@ -101,7 +101,6 @@ int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps,</div><div class='ctx'> {</div><div class='ctx'> 	int              ret;</div><div class='ctx'> 	struct drm_dsc_config   dsc_cfg;</div><div class='del'>-	unsigned long long tmp;</div><div class='ctx'> </div><div class='ctx'> 	dsc_params-&gt;pps = *pps;</div><div class='ctx'> 	dsc_params-&gt;pps.initial_scale_value = 8 * rc-&gt;rc_model_size / (rc-&gt;rc_model_size - rc-&gt;initial_fullness_offset);</div><div class='hunk'>@@ -112,9 +111,9 @@ int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps,</div><div class='ctx'> 	dsc_cfg.mux_word_size = dsc_params-&gt;pps.bits_per_component &lt;= 10 ? 48 : 64;</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_dsc_compute_rc_parameters(&amp;dsc_cfg);</div><div class='del'>-	tmp = (unsigned long long)dsc_cfg.slice_chunk_size * 0x10000000 + (dsc_cfg.slice_width - 1);</div><div class='del'>-	do_div(tmp, (uint32_t)dsc_cfg.slice_width);  //ROUND-UP</div><div class='del'>-	dsc_params-&gt;bytes_per_pixel = (uint32_t)tmp;</div><div class='add'>+	dsc_params-&gt;bytes_per_pixel =</div><div class='add'>+			(uint32_t)(div_u64(((uint64_t)dsc_cfg.slice_chunk_size * 0x10000000 + (dsc_cfg.slice_width - 1)),</div><div class='add'>+							(uint32_t)dsc_cfg.slice_width));  /* Round-up */</div><div class='ctx'> </div><div class='ctx'> 	copy_pps_fields(&amp;dsc_params-&gt;pps, &amp;dsc_cfg);</div><div class='ctx'> 	dsc_params-&gt;rc_buffer_model_size = dsc_cfg.rc_bits;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c<br/>index d734e3a134d1..2840ed5c57d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c</a></div><div class='hunk'>@@ -95,10 +95,6 @@ static bool offset_to_id(</div><div class='ctx'> 			return true;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ASSERT_CRITICAL(false);</div><div class='del'>-#ifdef PALLADIUM_SUPPORTED</div><div class='del'>-		*en = GPIO_DDC_LINE_DDC1;</div><div class='del'>-		return true;</div><div class='del'>-#endif</div><div class='ctx'> 			return false;</div><div class='ctx'> 		}</div><div class='ctx'> 	break;</div><div class='hunk'>@@ -184,11 +180,6 @@ static bool offset_to_id(</div><div class='ctx'> 	/* UNEXPECTED */</div><div class='ctx'> 	default:</div><div class='ctx'> /*	case REG(DC_GPIO_SYNCA_A): not exista */</div><div class='del'>-#ifdef PALLADIUM_SUPPORTED</div><div class='del'>-		*id = GPIO_ID_HPD;</div><div class='del'>-		*en = GPIO_DDC_LINE_DDC1;</div><div class='del'>-		return true;</div><div class='del'>-#endif</div><div class='ctx'> 		ASSERT_CRITICAL(false);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -308,10 +299,6 @@ static bool id_to_offset(</div><div class='ctx'> 		break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ASSERT_CRITICAL(false);</div><div class='del'>-#ifdef PALLADIUM_SUPPORTED</div><div class='del'>-			info-&gt;mask = DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK;</div><div class='del'>-			result = true;</div><div class='del'>-#endif</div><div class='ctx'> 			result = false;</div><div class='ctx'> 		}</div><div class='ctx'> 	break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c<br/>index 3ede6e02c3a7..663c17f52779 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c</a></div><div class='hunk'>@@ -128,7 +128,7 @@ struct gpio *dal_gpio_service_create_irq(</div><div class='ctx'> 	uint32_t offset,</div><div class='ctx'> 	uint32_t mask)</div><div class='ctx'> {</div><div class='del'>-	enum gpio_id id;</div><div class='add'>+	enum gpio_id id = 0;</div><div class='ctx'> 	uint32_t en;</div><div class='ctx'> </div><div class='ctx'> 	if (!service-&gt;translate.funcs-&gt;offset_to_id(offset, mask, &amp;id, &amp;en)) {</div><div class='hunk'>@@ -144,7 +144,7 @@ struct gpio *dal_gpio_service_create_generic_mux(</div><div class='ctx'> 	uint32_t offset,</div><div class='ctx'> 	uint32_t mask)</div><div class='ctx'> {</div><div class='del'>-	enum gpio_id id;</div><div class='add'>+	enum gpio_id id = 0;</div><div class='ctx'> 	uint32_t en;</div><div class='ctx'> 	struct gpio *generic;</div><div class='ctx'> </div><div class='hunk'>@@ -178,7 +178,7 @@ struct gpio_pin_info dal_gpio_get_generic_pin_info(</div><div class='ctx'> 	enum gpio_id id,</div><div class='ctx'> 	uint32_t en)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_pin_info pin;</div><div class='add'>+	struct gpio_pin_info pin = {0};</div><div class='ctx'> </div><div class='ctx'> 	if (service-&gt;translate.funcs-&gt;id_to_offset) {</div><div class='ctx'> 		service-&gt;translate.funcs-&gt;id_to_offset(id, en, &amp;pin);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/Makefile b/drivers/gpu/drm/amd/display/dc/hwss/Makefile<br/>index 9e8e9de51a92..cf8aa23b4415 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/Makefile</a></div><div class='hunk'>@@ -180,7 +180,7 @@ AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN35)</div><div class='ctx'> </div><div class='ctx'> ###############################################################################</div><div class='ctx'> </div><div class='del'>-HWSS_DCN351 = dcn351_init.o</div><div class='add'>+HWSS_DCN351 = dcn351_hwseq.o dcn351_init.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_HWSS_DCN351 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn351/,$(HWSS_DCN351))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c<br/>index 0ba1feaf96c0..0d3ea291eeee 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c</a></div><div class='hunk'>@@ -249,7 +249,7 @@ static bool dce110_enable_display_power_gating(</div><div class='ctx'> 		return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void build_prescale_params(struct ipp_prescale_params *prescale_params,</div><div class='add'>+static void dce110_prescale_params(struct ipp_prescale_params *prescale_params,</div><div class='ctx'> 		const struct dc_plane_state *plane_state)</div><div class='ctx'> {</div><div class='ctx'> 	prescale_params-&gt;mode = IPP_PRESCALE_MODE_FIXED_UNSIGNED;</div><div class='hunk'>@@ -289,16 +289,14 @@ dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 	if (ipp == NULL)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func)</div><div class='del'>-		tf = plane_state-&gt;in_transfer_func;</div><div class='add'>+	tf = &amp;plane_state-&gt;in_transfer_func;</div><div class='ctx'> </div><div class='del'>-	build_prescale_params(&amp;prescale_params, plane_state);</div><div class='add'>+	dce110_prescale_params(&amp;prescale_params, plane_state);</div><div class='ctx'> 	ipp-&gt;funcs-&gt;ipp_program_prescale(ipp, &amp;prescale_params);</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;gamma_correction &amp;&amp;</div><div class='del'>-			!plane_state-&gt;gamma_correction-&gt;is_identity &amp;&amp;</div><div class='add'>+	if (!plane_state-&gt;gamma_correction.is_identity &amp;&amp;</div><div class='ctx'> 			dce_use_lut(plane_state-&gt;format))</div><div class='del'>-		ipp-&gt;funcs-&gt;ipp_program_input_lut(ipp, plane_state-&gt;gamma_correction);</div><div class='add'>+		ipp-&gt;funcs-&gt;ipp_program_input_lut(ipp, &amp;plane_state-&gt;gamma_correction);</div><div class='ctx'> </div><div class='ctx'> 	if (tf == NULL) {</div><div class='ctx'> 		/* Default case if no input transfer function specified */</div><div class='hunk'>@@ -614,11 +612,10 @@ dce110_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 	xfm-&gt;funcs-&gt;opp_power_on_regamma_lut(xfm, true);</div><div class='ctx'> 	xfm-&gt;regamma_params.hw_points_num = GAMMA_HW_POINTS_NUM;</div><div class='ctx'> </div><div class='del'>-	if (stream-&gt;out_transfer_func &amp;&amp;</div><div class='del'>-	    stream-&gt;out_transfer_func-&gt;type == TF_TYPE_PREDEFINED &amp;&amp;</div><div class='del'>-	    stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_SRGB) {</div><div class='add'>+	if (stream-&gt;out_transfer_func.type == TF_TYPE_PREDEFINED &amp;&amp;</div><div class='add'>+	    stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_SRGB) {</div><div class='ctx'> 		xfm-&gt;funcs-&gt;opp_set_regamma_mode(xfm, OPP_REGAMMA_SRGB);</div><div class='del'>-	} else if (dce110_translate_regamma_to_hw_format(stream-&gt;out_transfer_func,</div><div class='add'>+	} else if (dce110_translate_regamma_to_hw_format(&amp;stream-&gt;out_transfer_func,</div><div class='ctx'> 							 &amp;xfm-&gt;regamma_params)) {</div><div class='ctx'> 		xfm-&gt;funcs-&gt;opp_program_regamma_pwl(xfm, &amp;xfm-&gt;regamma_params);</div><div class='ctx'> 		xfm-&gt;funcs-&gt;opp_set_regamma_mode(xfm, OPP_REGAMMA_USER);</div><div class='hunk'>@@ -1192,16 +1189,6 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 		dccg-&gt;funcs-&gt;disable_symclk_se(dccg, stream_enc-&gt;stream_enc_inst,</div><div class='ctx'> 					       link_enc-&gt;transmitter - TRANSMITTER_UNIPHY_A);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (dc-&gt;link_srv-&gt;dp_is_128b_132b_signal(pipe_ctx)) {</div><div class='del'>-		/* TODO: This looks like a bug to me as we are disabling HPO IO when</div><div class='del'>-		 * we are just disabling a single HPO stream. Shouldn't we disable HPO</div><div class='del'>-		 * HW control only when HPOs for all streams are disabled?</div><div class='del'>-		 */</div><div class='del'>-		if (pipe_ctx-&gt;stream-&gt;ctx-&gt;dc-&gt;hwseq-&gt;funcs.setup_hpo_hw_control)</div><div class='del'>-			pipe_ctx-&gt;stream-&gt;ctx-&gt;dc-&gt;hwseq-&gt;funcs.setup_hpo_hw_control(</div><div class='del'>-					pipe_ctx-&gt;stream-&gt;ctx-&gt;dc-&gt;hwseq, false);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,</div><div class='hunk'>@@ -1550,7 +1537,7 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_ctx-&gt;stream_res.audio != NULL) {</div><div class='del'>-		struct audio_output audio_output;</div><div class='add'>+		struct audio_output audio_output = {0};</div><div class='ctx'> </div><div class='ctx'> 		build_audio_output(context, pipe_ctx, &amp;audio_output);</div><div class='ctx'> </div><div class='hunk'>@@ -2201,7 +2188,7 @@ static void dce110_setup_audio_dto(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct dc_state *context)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* program audio wall clock. use HDMI as clock source if HDMI</div><div class='ctx'> 	 * audio active. Otherwise, use DP as clock source</div><div class='hunk'>@@ -2273,7 +2260,7 @@ static void dce110_setup_audio_dto(</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			if (pipe_ctx-&gt;stream_res.audio != NULL) {</div><div class='del'>-				struct audio_output audio_output;</div><div class='add'>+				struct audio_output audio_output = {0};</div><div class='ctx'> </div><div class='ctx'> 				build_audio_output(context, pipe_ctx, &amp;audio_output);</div><div class='ctx'> </div><div class='hunk'>@@ -2288,6 +2275,19 @@ static void dce110_setup_audio_dto(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool dce110_is_hpo_enabled(struct dc_state *context)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_HPO_DP2_ENCODERS; i++) {</div><div class='add'>+		if (context-&gt;res_ctx.is_hpo_dp_stream_enc_acquired[i]) {</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum dc_status dce110_apply_ctx_to_hw(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct dc_state *context)</div><div class='hunk'>@@ -2296,6 +2296,8 @@ enum dc_status dce110_apply_ctx_to_hw(</div><div class='ctx'> 	struct dc_bios *dcb = dc-&gt;ctx-&gt;dc_bios;</div><div class='ctx'> 	enum dc_status status;</div><div class='ctx'> 	int i;</div><div class='add'>+	bool was_hpo_enabled = dce110_is_hpo_enabled(dc-&gt;current_state);</div><div class='add'>+	bool is_hpo_enabled = dce110_is_hpo_enabled(context);</div><div class='ctx'> </div><div class='ctx'> 	/* reset syncd pipes from disabled pipes */</div><div class='ctx'> 	if (dc-&gt;config.use_pipe_ctx_sync_logic)</div><div class='hunk'>@@ -2338,6 +2340,10 @@ enum dc_status dce110_apply_ctx_to_hw(</div><div class='ctx'> </div><div class='ctx'> 	dce110_setup_audio_dto(dc, context);</div><div class='ctx'> </div><div class='add'>+	if (dc-&gt;hwseq-&gt;funcs.setup_hpo_hw_control &amp;&amp; was_hpo_enabled != is_hpo_enabled) {</div><div class='add'>+		dc-&gt;hwseq-&gt;funcs.setup_hpo_hw_control(dc-&gt;hwseq, is_hpo_enabled);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx_old =</div><div class='ctx'> 					&amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c<br/>index 314798400b16..0c4aef8ffe2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c</a></div><div class='hunk'>@@ -367,7 +367,7 @@ static void dcn10_log_color_state(struct dc *dc,</div><div class='ctx'> 		 dc-&gt;caps.color.dpp.ocsc);</div><div class='ctx'> </div><div class='ctx'> 	DTN_INFO("MPCC:  OPP  DPP  MPCCBOT  MODE  ALPHA_MODE  PREMULT  OVERLAP_ONLY  IDLE\n");</div><div class='del'>-	for (i = 0; i &lt; pool-&gt;pipe_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; pool-&gt;mpcc_count; i++) {</div><div class='ctx'> 		struct mpcc_state s = {0};</div><div class='ctx'> </div><div class='ctx'> 		pool-&gt;mpc-&gt;funcs-&gt;read_mpcc_state(pool-&gt;mpc, i, &amp;s);</div><div class='hunk'>@@ -1366,6 +1366,7 @@ void dcn10_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 	struct dce_hwseq *hws = dc-&gt;hwseq;</div><div class='ctx'> 	struct hubbub *hubbub = dc-&gt;res_pool-&gt;hubbub;</div><div class='ctx'> 	bool can_apply_seamless_boot = false;</div><div class='add'>+	bool tg_enabled[MAX_PIPES] = {false};</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='ctx'> 		if (context-&gt;streams[i]-&gt;apply_seamless_boot_optimization) {</div><div class='hunk'>@@ -1447,6 +1448,7 @@ void dcn10_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 			// requesting data while in PSR.</div><div class='ctx'> 			tg-&gt;funcs-&gt;tg_init(tg);</div><div class='ctx'> 			hubp-&gt;power_gated = true;</div><div class='add'>+			tg_enabled[i] = true;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1488,6 +1490,20 @@ void dcn10_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 		tg-&gt;funcs-&gt;tg_init(tg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Clean up MPC tree */</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+		if (tg_enabled[i]) {</div><div class='add'>+			if (dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list) {</div><div class='add'>+				if (dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list-&gt;mpcc_bot) {</div><div class='add'>+					int bot_id = dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list-&gt;mpcc_bot-&gt;mpcc_id;</div><div class='add'>+</div><div class='add'>+					if ((bot_id &lt; MAX_MPCC) &amp;&amp; (bot_id &lt; MAX_PIPES) &amp;&amp; (!tg_enabled[bot_id]))</div><div class='add'>+						dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list = NULL;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Power gate DSCs */</div><div class='ctx'> 	if (hws-&gt;funcs.dsc_pg_control != NULL) {</div><div class='ctx'> 		uint32_t num_opps = 0;</div><div class='hunk'>@@ -1813,14 +1829,12 @@ bool dcn10_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 	if (dpp_base == NULL)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func)</div><div class='del'>-		tf = plane_state-&gt;in_transfer_func;</div><div class='add'>+	tf = &amp;plane_state-&gt;in_transfer_func;</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;gamma_correction &amp;&amp;</div><div class='del'>-		!dpp_base-&gt;ctx-&gt;dc-&gt;debug.always_use_regamma</div><div class='del'>-		&amp;&amp; !plane_state-&gt;gamma_correction-&gt;is_identity</div><div class='add'>+	if (!dpp_base-&gt;ctx-&gt;dc-&gt;debug.always_use_regamma</div><div class='add'>+		&amp;&amp; !plane_state-&gt;gamma_correction.is_identity</div><div class='ctx'> 			&amp;&amp; dce_use_lut(plane_state-&gt;format))</div><div class='del'>-		dpp_base-&gt;funcs-&gt;dpp_program_input_lut(dpp_base, plane_state-&gt;gamma_correction);</div><div class='add'>+		dpp_base-&gt;funcs-&gt;dpp_program_input_lut(dpp_base, &amp;plane_state-&gt;gamma_correction);</div><div class='ctx'> </div><div class='ctx'> 	if (tf == NULL)</div><div class='ctx'> 		dpp_base-&gt;funcs-&gt;dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);</div><div class='hunk'>@@ -1861,7 +1875,7 @@ bool dcn10_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> #define MAX_NUM_HW_POINTS 0x200</div><div class='ctx'> </div><div class='ctx'> static void log_tf(struct dc_context *ctx,</div><div class='del'>-				struct dc_transfer_func *tf, uint32_t hw_points_num)</div><div class='add'>+				const struct dc_transfer_func *tf, uint32_t hw_points_num)</div><div class='ctx'> {</div><div class='ctx'> 	// DC_LOG_GAMMA is default logging of all hw points</div><div class='ctx'> 	// DC_LOG_ALL_GAMMA logs all points, not only hw points</div><div class='hunk'>@@ -1898,16 +1912,15 @@ bool dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> </div><div class='ctx'> 	dpp-&gt;regamma_params.hw_points_num = GAMMA_HW_POINTS_NUM;</div><div class='ctx'> </div><div class='del'>-	if (stream-&gt;out_transfer_func &amp;&amp;</div><div class='del'>-	    stream-&gt;out_transfer_func-&gt;type == TF_TYPE_PREDEFINED &amp;&amp;</div><div class='del'>-	    stream-&gt;out_transfer_func-&gt;tf == TRANSFER_FUNCTION_SRGB)</div><div class='add'>+	if (stream-&gt;out_transfer_func.type == TF_TYPE_PREDEFINED &amp;&amp;</div><div class='add'>+	    stream-&gt;out_transfer_func.tf == TRANSFER_FUNCTION_SRGB)</div><div class='ctx'> 		dpp-&gt;funcs-&gt;dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_SRGB);</div><div class='ctx'> </div><div class='ctx'> 	/* dcn10_translate_regamma_to_hw_format takes 750us, only do it when full</div><div class='ctx'> 	 * update.</div><div class='ctx'> 	 */</div><div class='ctx'> 	else if (cm_helper_translate_curve_to_hw_format(dc-&gt;ctx,</div><div class='del'>-			stream-&gt;out_transfer_func,</div><div class='add'>+			&amp;stream-&gt;out_transfer_func,</div><div class='ctx'> 			&amp;dpp-&gt;regamma_params, false)) {</div><div class='ctx'> 		dpp-&gt;funcs-&gt;dpp_program_regamma_pwl(</div><div class='ctx'> 				dpp,</div><div class='hunk'>@@ -1915,10 +1928,9 @@ bool dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 	} else</div><div class='ctx'> 		dpp-&gt;funcs-&gt;dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_BYPASS);</div><div class='ctx'> </div><div class='del'>-	if (stream-&gt;ctx &amp;&amp;</div><div class='del'>-	    stream-&gt;out_transfer_func) {</div><div class='add'>+	if (stream-&gt;ctx) {</div><div class='ctx'> 		log_tf(stream-&gt;ctx,</div><div class='del'>-				stream-&gt;out_transfer_func,</div><div class='add'>+				&amp;stream-&gt;out_transfer_func,</div><div class='ctx'> 				dpp-&gt;regamma_params.hw_points_num);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2173,7 +2185,7 @@ static int dcn10_align_pixel_clocks(struct dc *dc, int group_size,</div><div class='ctx'> 	struct dc_crtc_timing *hw_crtc_timing;</div><div class='ctx'> 	uint64_t phase[MAX_PIPES];</div><div class='ctx'> 	uint64_t modulo[MAX_PIPES];</div><div class='del'>-	unsigned int pclk;</div><div class='add'>+	unsigned int pclk = 0;</div><div class='ctx'> </div><div class='ctx'> 	uint32_t embedded_pix_clk_100hz;</div><div class='ctx'> 	uint16_t embedded_h_total;</div><div class='hunk'>@@ -2264,7 +2276,7 @@ void dcn10_enable_vblanks_synchronization(</div><div class='ctx'> 	struct dc_context *dc_ctx = dc-&gt;ctx;</div><div class='ctx'> 	struct output_pixel_processor *opp;</div><div class='ctx'> 	struct timing_generator *tg;</div><div class='del'>-	int i, width, height, master;</div><div class='add'>+	int i, width = 0, height = 0, master;</div><div class='ctx'> </div><div class='ctx'> 	DC_LOGGER_INIT(dc_ctx-&gt;logger);</div><div class='ctx'> </div><div class='hunk'>@@ -2330,7 +2342,7 @@ void dcn10_enable_timing_synchronization(</div><div class='ctx'> 	struct dc_context *dc_ctx = dc-&gt;ctx;</div><div class='ctx'> 	struct output_pixel_processor *opp;</div><div class='ctx'> 	struct timing_generator *tg;</div><div class='del'>-	int i, width, height;</div><div class='add'>+	int i, width = 0, height = 0;</div><div class='ctx'> </div><div class='ctx'> 	DC_LOGGER_INIT(dc_ctx-&gt;logger);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c<br/>index 8b3536c380b8..7d833fa6dd77 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c</a></div><div class='hunk'>@@ -155,7 +155,7 @@ void dcn20_log_color_state(struct dc *dc,</div><div class='ctx'> 	DTN_INFO("MPCC:  OPP  DPP  MPCCBOT  MODE  ALPHA_MODE  PREMULT  OVERLAP_ONLY  IDLE"</div><div class='ctx'> 		 "  OGAM mode\n");</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pool-&gt;pipe_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; pool-&gt;mpcc_count; i++) {</div><div class='ctx'> 		struct mpcc_state s = {0};</div><div class='ctx'> </div><div class='ctx'> 		pool-&gt;mpc-&gt;funcs-&gt;read_mpcc_state(pool-&gt;mpc, i, &amp;s);</div><div class='hunk'>@@ -403,7 +403,7 @@ void dcn20_init_blank(</div><div class='ctx'> 	struct output_pixel_processor *opp = NULL;</div><div class='ctx'> 	struct output_pixel_processor *bottom_opp = NULL;</div><div class='ctx'> 	uint32_t num_opps, opp_id_src0, opp_id_src1;</div><div class='del'>-	uint32_t otg_active_width, otg_active_height;</div><div class='add'>+	uint32_t otg_active_width = 0, otg_active_height = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* program opp dpg blank color */</div><div class='ctx'> 	color_space = COLOR_SPACE_SRGB;</div><div class='hunk'>@@ -873,6 +873,22 @@ enum dc_status dcn20_enable_stream_timing(</div><div class='ctx'> 		return DC_ERROR_UNEXPECTED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dc-&gt;link_srv-&gt;dp_is_128b_132b_signal(pipe_ctx)) {</div><div class='add'>+		struct dccg *dccg = dc-&gt;res_pool-&gt;dccg;</div><div class='add'>+		struct timing_generator *tg = pipe_ctx-&gt;stream_res.tg;</div><div class='add'>+		struct dtbclk_dto_params dto_params = {0};</div><div class='add'>+</div><div class='add'>+		if (dccg-&gt;funcs-&gt;set_dtbclk_p_src)</div><div class='add'>+			dccg-&gt;funcs-&gt;set_dtbclk_p_src(dccg, DTBCLK0, tg-&gt;inst);</div><div class='add'>+</div><div class='add'>+		dto_params.otg_inst = tg-&gt;inst;</div><div class='add'>+		dto_params.pixclk_khz = pipe_ctx-&gt;stream-&gt;timing.pix_clk_100hz / 10;</div><div class='add'>+		dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);</div><div class='add'>+		dto_params.timing = &amp;pipe_ctx-&gt;stream-&gt;timing;</div><div class='add'>+		dto_params.ref_dtbclk_khz = dc-&gt;clk_mgr-&gt;funcs-&gt;get_dtb_ref_clk_frequency(dc-&gt;clk_mgr);</div><div class='add'>+		dccg-&gt;funcs-&gt;set_dtbclk_dto(dccg, &amp;dto_params);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (dc_is_hdmi_tmds_signal(stream-&gt;signal)) {</div><div class='ctx'> 		stream-&gt;link-&gt;phy_state.symclk_ref_cnts.otg = 1;</div><div class='ctx'> 		if (stream-&gt;link-&gt;phy_state.symclk_state == SYMCLK_OFF_TX_OFF)</div><div class='hunk'>@@ -959,22 +975,6 @@ enum dc_status dcn20_enable_stream_timing(</div><div class='ctx'> 			pipe_ctx-&gt;stream_res.tg-&gt;funcs-&gt;phantom_crtc_post_enable(pipe_ctx-&gt;stream_res.tg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dc-&gt;link_srv-&gt;dp_is_128b_132b_signal(pipe_ctx)) {</div><div class='del'>-		struct dccg *dccg = dc-&gt;res_pool-&gt;dccg;</div><div class='del'>-		struct timing_generator *tg = pipe_ctx-&gt;stream_res.tg;</div><div class='del'>-		struct dtbclk_dto_params dto_params = {0};</div><div class='del'>-</div><div class='del'>-		if (dccg-&gt;funcs-&gt;set_dtbclk_p_src)</div><div class='del'>-			dccg-&gt;funcs-&gt;set_dtbclk_p_src(dccg, DTBCLK0, tg-&gt;inst);</div><div class='del'>-</div><div class='del'>-		dto_params.otg_inst = tg-&gt;inst;</div><div class='del'>-		dto_params.pixclk_khz = pipe_ctx-&gt;stream-&gt;timing.pix_clk_100hz / 10;</div><div class='del'>-		dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);</div><div class='del'>-		dto_params.timing = &amp;pipe_ctx-&gt;stream-&gt;timing;</div><div class='del'>-		dto_params.ref_dtbclk_khz = dc-&gt;clk_mgr-&gt;funcs-&gt;get_dtb_ref_clk_frequency(dc-&gt;clk_mgr);</div><div class='del'>-		dccg-&gt;funcs-&gt;set_dtbclk_dto(dccg, &amp;dto_params);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1011,7 +1011,7 @@ bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> {</div><div class='ctx'> 	int mpcc_id = pipe_ctx-&gt;plane_res.hubp-&gt;inst;</div><div class='ctx'> 	struct mpc *mpc = pipe_ctx-&gt;stream_res.opp-&gt;ctx-&gt;dc-&gt;res_pool-&gt;mpc;</div><div class='del'>-	struct pwl_params *params = NULL;</div><div class='add'>+	const struct pwl_params *params = NULL;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * program OGAM only for the top pipe</div><div class='ctx'> 	 * if there is a pipe split then fix diagnostic is required:</div><div class='hunk'>@@ -1022,19 +1022,19 @@ bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 	if (mpc-&gt;funcs-&gt;power_on_mpc_mem_pwr)</div><div class='ctx'> 		mpc-&gt;funcs-&gt;power_on_mpc_mem_pwr(mpc, mpcc_id, true);</div><div class='ctx'> 	if (pipe_ctx-&gt;top_pipe == NULL</div><div class='del'>-			&amp;&amp; mpc-&gt;funcs-&gt;set_output_gamma &amp;&amp; stream-&gt;out_transfer_func) {</div><div class='del'>-		if (stream-&gt;out_transfer_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			params = &amp;stream-&gt;out_transfer_func-&gt;pwl;</div><div class='del'>-		else if (pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;type ==</div><div class='add'>+			&amp;&amp; mpc-&gt;funcs-&gt;set_output_gamma) {</div><div class='add'>+		if (stream-&gt;out_transfer_func.type == TF_TYPE_HWPWL)</div><div class='add'>+			params = &amp;stream-&gt;out_transfer_func.pwl;</div><div class='add'>+		else if (pipe_ctx-&gt;stream-&gt;out_transfer_func.type ==</div><div class='ctx'> 			TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='ctx'> 			cm_helper_translate_curve_to_hw_format(dc-&gt;ctx,</div><div class='del'>-			stream-&gt;out_transfer_func,</div><div class='add'>+			&amp;stream-&gt;out_transfer_func,</div><div class='ctx'> 			&amp;mpc-&gt;blender_params, false))</div><div class='ctx'> 			params = &amp;mpc-&gt;blender_params;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * there is no ROM</div><div class='ctx'> 		 */</div><div class='del'>-		if (stream-&gt;out_transfer_func-&gt;type == TF_TYPE_PREDEFINED)</div><div class='add'>+		if (stream-&gt;out_transfer_func.type == TF_TYPE_PREDEFINED)</div><div class='ctx'> 			BREAK_TO_DEBUGGER();</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1050,17 +1050,15 @@ bool dcn20_set_blend_lut(</div><div class='ctx'> {</div><div class='ctx'> 	struct dpp *dpp_base = pipe_ctx-&gt;plane_res.dpp;</div><div class='ctx'> 	bool result = true;</div><div class='del'>-	struct pwl_params *blend_lut = NULL;</div><div class='del'>-</div><div class='del'>-	if (plane_state-&gt;blend_tf) {</div><div class='del'>-		if (plane_state-&gt;blend_tf-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			blend_lut = &amp;plane_state-&gt;blend_tf-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;blend_tf-&gt;type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='del'>-			cm_helper_translate_curve_to_hw_format(plane_state-&gt;ctx,</div><div class='del'>-					plane_state-&gt;blend_tf,</div><div class='del'>-					&amp;dpp_base-&gt;regamma_params, false);</div><div class='del'>-			blend_lut = &amp;dpp_base-&gt;regamma_params;</div><div class='del'>-		}</div><div class='add'>+	const struct pwl_params *blend_lut = NULL;</div><div class='add'>+</div><div class='add'>+	if (plane_state-&gt;blend_tf.type == TF_TYPE_HWPWL)</div><div class='add'>+		blend_lut = &amp;plane_state-&gt;blend_tf.pwl;</div><div class='add'>+	else if (plane_state-&gt;blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='add'>+		cm_helper_translate_curve_to_hw_format(plane_state-&gt;ctx,</div><div class='add'>+				&amp;plane_state-&gt;blend_tf,</div><div class='add'>+				&amp;dpp_base-&gt;regamma_params, false);</div><div class='add'>+		blend_lut = &amp;dpp_base-&gt;regamma_params;</div><div class='ctx'> 	}</div><div class='ctx'> 	result = dpp_base-&gt;funcs-&gt;dpp_program_blnd_lut(dpp_base, blend_lut);</div><div class='ctx'> </div><div class='hunk'>@@ -1072,24 +1070,21 @@ bool dcn20_set_shaper_3dlut(</div><div class='ctx'> {</div><div class='ctx'> 	struct dpp *dpp_base = pipe_ctx-&gt;plane_res.dpp;</div><div class='ctx'> 	bool result = true;</div><div class='del'>-	struct pwl_params *shaper_lut = NULL;</div><div class='del'>-</div><div class='del'>-	if (plane_state-&gt;in_shaper_func) {</div><div class='del'>-		if (plane_state-&gt;in_shaper_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			shaper_lut = &amp;plane_state-&gt;in_shaper_func-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;in_shaper_func-&gt;type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='del'>-			cm_helper_translate_curve_to_hw_format(plane_state-&gt;ctx,</div><div class='del'>-					plane_state-&gt;in_shaper_func,</div><div class='del'>-					&amp;dpp_base-&gt;shaper_params, true);</div><div class='del'>-			shaper_lut = &amp;dpp_base-&gt;shaper_params;</div><div class='del'>-		}</div><div class='add'>+	const struct pwl_params *shaper_lut = NULL;</div><div class='add'>+</div><div class='add'>+	if (plane_state-&gt;in_shaper_func.type == TF_TYPE_HWPWL)</div><div class='add'>+		shaper_lut = &amp;plane_state-&gt;in_shaper_func.pwl;</div><div class='add'>+	else if (plane_state-&gt;in_shaper_func.type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='add'>+		cm_helper_translate_curve_to_hw_format(plane_state-&gt;ctx,</div><div class='add'>+				&amp;plane_state-&gt;in_shaper_func,</div><div class='add'>+				&amp;dpp_base-&gt;shaper_params, true);</div><div class='add'>+		shaper_lut = &amp;dpp_base-&gt;shaper_params;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	result = dpp_base-&gt;funcs-&gt;dpp_program_shaper_lut(dpp_base, shaper_lut);</div><div class='del'>-	if (plane_state-&gt;lut3d_func &amp;&amp;</div><div class='del'>-		plane_state-&gt;lut3d_func-&gt;state.bits.initialized == 1)</div><div class='add'>+	if (plane_state-&gt;lut3d_func.state.bits.initialized == 1)</div><div class='ctx'> 		result = dpp_base-&gt;funcs-&gt;dpp_program_3dlut(dpp_base,</div><div class='del'>-								&amp;plane_state-&gt;lut3d_func-&gt;lut_3d);</div><div class='add'>+								&amp;plane_state-&gt;lut3d_func.lut_3d);</div><div class='ctx'> 	else</div><div class='ctx'> 		result = dpp_base-&gt;funcs-&gt;dpp_program_3dlut(dpp_base, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -1112,15 +1107,7 @@ bool dcn20_set_input_transfer_func(struct dc *dc,</div><div class='ctx'> 	hws-&gt;funcs.set_shaper_3dlut(pipe_ctx, plane_state);</div><div class='ctx'> 	hws-&gt;funcs.set_blend_lut(pipe_ctx, plane_state);</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func)</div><div class='del'>-		tf = plane_state-&gt;in_transfer_func;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	if (tf == NULL) {</div><div class='del'>-		dpp_base-&gt;funcs-&gt;dpp_set_degamma(dpp_base,</div><div class='del'>-				IPP_DEGAMMA_MODE_BYPASS);</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='add'>+	tf = &amp;plane_state-&gt;in_transfer_func;</div><div class='ctx'> </div><div class='ctx'> 	if (tf-&gt;type == TF_TYPE_HWPWL || tf-&gt;type == TF_TYPE_DISTRIBUTED_POINTS)</div><div class='ctx'> 		use_degamma_ram = true;</div><div class='hunk'>@@ -1917,9 +1904,11 @@ static void dcn20_program_pipe(</div><div class='ctx'> 			dc-&gt;res_pool-&gt;hubbub-&gt;funcs-&gt;force_wm_propagate_to_pipes(dc-&gt;res_pool-&gt;hubbub);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dc-&gt;res_pool-&gt;hubbub-&gt;funcs-&gt;program_det_size &amp;&amp; pipe_ctx-&gt;update_flags.bits.det_size)</div><div class='del'>-		dc-&gt;res_pool-&gt;hubbub-&gt;funcs-&gt;program_det_size(</div><div class='del'>-			dc-&gt;res_pool-&gt;hubbub, pipe_ctx-&gt;plane_res.hubp-&gt;inst, pipe_ctx-&gt;det_buffer_size_kb);</div><div class='add'>+	if (pipe_ctx-&gt;update_flags.bits.det_size) {</div><div class='add'>+		if (dc-&gt;res_pool-&gt;hubbub-&gt;funcs-&gt;program_det_size)</div><div class='add'>+			dc-&gt;res_pool-&gt;hubbub-&gt;funcs-&gt;program_det_size(</div><div class='add'>+				dc-&gt;res_pool-&gt;hubbub, pipe_ctx-&gt;plane_res.hubp-&gt;inst, pipe_ctx-&gt;det_buffer_size_kb);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_ctx-&gt;update_flags.raw || pipe_ctx-&gt;plane_state-&gt;update_flags.raw || pipe_ctx-&gt;stream-&gt;update_flags.raw)</div><div class='ctx'> 		dcn20_update_dchubp_dpp(dc, pipe_ctx, context);</div><div class='hunk'>@@ -2080,9 +2069,11 @@ void dcn20_program_front_end_for_ctx(</div><div class='ctx'> 			 * turned on (i.e. in an MCLK switch) which can come in too late and cause issues with</div><div class='ctx'> 			 * DET allocation.</div><div class='ctx'> 			 */</div><div class='del'>-			if (hubbub-&gt;funcs-&gt;program_det_size &amp;&amp; (context-&gt;res_ctx.pipe_ctx[i].update_flags.bits.disable ||</div><div class='del'>-					(context-&gt;res_ctx.pipe_ctx[i].plane_state &amp;&amp; dc_state_get_pipe_subvp_type(context, &amp;context-&gt;res_ctx.pipe_ctx[i]) == SUBVP_PHANTOM)))</div><div class='del'>-				hubbub-&gt;funcs-&gt;program_det_size(hubbub, dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i].plane_res.hubp-&gt;inst, 0);</div><div class='add'>+			if ((context-&gt;res_ctx.pipe_ctx[i].update_flags.bits.disable ||</div><div class='add'>+					(context-&gt;res_ctx.pipe_ctx[i].plane_state &amp;&amp; dc_state_get_pipe_subvp_type(context, &amp;context-&gt;res_ctx.pipe_ctx[i]) == SUBVP_PHANTOM))) {</div><div class='add'>+				if (hubbub-&gt;funcs-&gt;program_det_size)</div><div class='add'>+					hubbub-&gt;funcs-&gt;program_det_size(hubbub, dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i].plane_res.hubp-&gt;inst, 0);</div><div class='add'>+			}</div><div class='ctx'> 			hws-&gt;funcs.plane_atomic_disconnect(dc, dc-&gt;current_state, &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i]);</div><div class='ctx'> 			DC_LOG_DC("Reset mpcc for pipe %d\n", dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i].pipe_idx);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2893,11 +2884,6 @@ void dcn20_enable_stream(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	struct stream_encoder *stream_enc = pipe_ctx-&gt;stream_res.stream_enc;</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;link_srv-&gt;dp_is_128b_132b_signal(pipe_ctx)) {</div><div class='del'>-		if (dc-&gt;hwseq-&gt;funcs.setup_hpo_hw_control)</div><div class='del'>-			dc-&gt;hwseq-&gt;funcs.setup_hpo_hw_control(dc-&gt;hwseq, true);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dc-&gt;link_srv-&gt;dp_is_128b_132b_signal(pipe_ctx)) {</div><div class='ctx'> 		dto_params.otg_inst = tg-&gt;inst;</div><div class='ctx'> 		dto_params.pixclk_khz = pipe_ctx-&gt;stream-&gt;timing.pix_clk_100hz / 10;</div><div class='ctx'> 		dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c<br/>index 884e3e323338..ef6488165b8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c</a></div><div class='hunk'>@@ -67,6 +67,7 @@ static const struct hw_sequencer_funcs dcn20_funcs = {</div><div class='ctx'> 	.setup_stereo = dcn10_setup_stereo,</div><div class='ctx'> 	.set_avmute = dce110_set_avmute,</div><div class='ctx'> 	.log_hw_state = dcn10_log_hw_state,</div><div class='add'>+	.log_color_state = dcn20_log_color_state,</div><div class='ctx'> 	.get_hw_state = dcn10_get_hw_state,</div><div class='ctx'> 	.clear_status_bits = dcn10_clear_status_bits,</div><div class='ctx'> 	.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c<br/>index d5769f38874f..6be846635a79 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c</a></div><div class='hunk'>@@ -167,7 +167,7 @@ void dcn201_init_blank(</div><div class='ctx'> 	struct tg_color black_color = {0};</div><div class='ctx'> 	struct output_pixel_processor *opp = NULL;</div><div class='ctx'> 	uint32_t num_opps, opp_id_src0, opp_id_src1;</div><div class='del'>-	uint32_t otg_active_width, otg_active_height;</div><div class='add'>+	uint32_t otg_active_width = 0, otg_active_height = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* program opp dpg blank color */</div><div class='ctx'> 	color_space = COLOR_SPACE_SRGB;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c<br/>index 7252f5f781f0..804be977ea47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c</a></div><div class='hunk'>@@ -66,7 +66,7 @@ static void mmhub_update_page_table_config(struct dcn_hubbub_phys_addr_config *c</div><div class='ctx'> </div><div class='ctx'> int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config)</div><div class='ctx'> {</div><div class='del'>-	struct dcn_hubbub_phys_addr_config config;</div><div class='add'>+	struct dcn_hubbub_phys_addr_config config = {0};</div><div class='ctx'> </div><div class='ctx'> 	config.system_aperture.fb_top = pa_config-&gt;system_aperture.fb_top;</div><div class='ctx'> 	config.system_aperture.fb_offset = pa_config-&gt;system_aperture.fb_offset;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c<br/>index 8bc3d01537bb..ed9141a67db3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c</a></div><div class='hunk'>@@ -166,7 +166,7 @@ void dcn30_log_color_state(struct dc *dc,</div><div class='ctx'> 		 "C21        C22        C23        C24        "</div><div class='ctx'> 		 "C31        C32        C33        C34        \n");</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pool-&gt;pipe_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; pool-&gt;mpcc_count; i++) {</div><div class='ctx'> 		struct mpcc_state s = {0};</div><div class='ctx'> </div><div class='ctx'> 		pool-&gt;mpc-&gt;funcs-&gt;read_mpcc_state(pool-&gt;mpc, i, &amp;s);</div><div class='hunk'>@@ -223,16 +223,14 @@ bool dcn30_set_blend_lut(</div><div class='ctx'> {</div><div class='ctx'> 	struct dpp *dpp_base = pipe_ctx-&gt;plane_res.dpp;</div><div class='ctx'> 	bool result = true;</div><div class='del'>-	struct pwl_params *blend_lut = NULL;</div><div class='del'>-</div><div class='del'>-	if (plane_state-&gt;blend_tf) {</div><div class='del'>-		if (plane_state-&gt;blend_tf-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			blend_lut = &amp;plane_state-&gt;blend_tf-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;blend_tf-&gt;type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='del'>-			cm3_helper_translate_curve_to_hw_format(</div><div class='del'>-					plane_state-&gt;blend_tf, &amp;dpp_base-&gt;regamma_params, false);</div><div class='del'>-			blend_lut = &amp;dpp_base-&gt;regamma_params;</div><div class='del'>-		}</div><div class='add'>+	const struct pwl_params *blend_lut = NULL;</div><div class='add'>+</div><div class='add'>+	if (plane_state-&gt;blend_tf.type == TF_TYPE_HWPWL)</div><div class='add'>+		blend_lut = &amp;plane_state-&gt;blend_tf.pwl;</div><div class='add'>+	else if (plane_state-&gt;blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='add'>+		cm3_helper_translate_curve_to_hw_format(</div><div class='add'>+				&amp;plane_state-&gt;blend_tf, &amp;dpp_base-&gt;regamma_params, false);</div><div class='add'>+		blend_lut = &amp;dpp_base-&gt;regamma_params;</div><div class='ctx'> 	}</div><div class='ctx'> 	result = dpp_base-&gt;funcs-&gt;dpp_program_blnd_lut(dpp_base, blend_lut);</div><div class='ctx'> </div><div class='hunk'>@@ -300,27 +298,24 @@ bool dcn30_set_input_transfer_func(struct dc *dc,</div><div class='ctx'> 	struct dpp *dpp_base = pipe_ctx-&gt;plane_res.dpp;</div><div class='ctx'> 	enum dc_transfer_func_predefined tf;</div><div class='ctx'> 	bool result = true;</div><div class='del'>-	struct pwl_params *params = NULL;</div><div class='add'>+	const struct pwl_params *params = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (dpp_base == NULL || plane_state == NULL)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	tf = TRANSFER_FUNCTION_UNITY;</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func &amp;&amp;</div><div class='del'>-		plane_state-&gt;in_transfer_func-&gt;type == TF_TYPE_PREDEFINED)</div><div class='del'>-		tf = plane_state-&gt;in_transfer_func-&gt;tf;</div><div class='add'>+	if (plane_state-&gt;in_transfer_func.type == TF_TYPE_PREDEFINED)</div><div class='add'>+		tf = plane_state-&gt;in_transfer_func.tf;</div><div class='ctx'> </div><div class='ctx'> 	dpp_base-&gt;funcs-&gt;dpp_set_pre_degam(dpp_base, tf);</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func) {</div><div class='del'>-		if (plane_state-&gt;in_transfer_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			params = &amp;plane_state-&gt;in_transfer_func-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;in_transfer_func-&gt;type == TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='del'>-			cm3_helper_translate_curve_to_hw_format(plane_state-&gt;in_transfer_func,</div><div class='del'>-					&amp;dpp_base-&gt;degamma_params, false))</div><div class='del'>-			params = &amp;dpp_base-&gt;degamma_params;</div><div class='del'>-	}</div><div class='add'>+	if (plane_state-&gt;in_transfer_func.type == TF_TYPE_HWPWL)</div><div class='add'>+		params = &amp;plane_state-&gt;in_transfer_func.pwl;</div><div class='add'>+	else if (plane_state-&gt;in_transfer_func.type == TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='add'>+		cm3_helper_translate_curve_to_hw_format(&amp;plane_state-&gt;in_transfer_func,</div><div class='add'>+				&amp;dpp_base-&gt;degamma_params, false))</div><div class='add'>+		params = &amp;dpp_base-&gt;degamma_params;</div><div class='ctx'> </div><div class='ctx'> 	result = dpp_base-&gt;funcs-&gt;dpp_program_gamcor_lut(dpp_base, params);</div><div class='ctx'> </div><div class='hunk'>@@ -378,24 +373,24 @@ bool dcn30_set_output_transfer_func(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	int mpcc_id = pipe_ctx-&gt;plane_res.hubp-&gt;inst;</div><div class='ctx'> 	struct mpc *mpc = pipe_ctx-&gt;stream_res.opp-&gt;ctx-&gt;dc-&gt;res_pool-&gt;mpc;</div><div class='del'>-	struct pwl_params *params = NULL;</div><div class='add'>+	const struct pwl_params *params = NULL;</div><div class='ctx'> 	bool ret = false;</div><div class='ctx'> </div><div class='ctx'> 	/* program OGAM or 3DLUT only for the top pipe*/</div><div class='ctx'> 	if (pipe_ctx-&gt;top_pipe == NULL) {</div><div class='ctx'> 		/*program rmu shaper and 3dlut in MPC*/</div><div class='ctx'> 		ret = dcn30_set_mpc_shaper_3dlut(pipe_ctx, stream);</div><div class='del'>-		if (ret == false &amp;&amp; mpc-&gt;funcs-&gt;set_output_gamma &amp;&amp; stream-&gt;out_transfer_func) {</div><div class='del'>-			if (stream-&gt;out_transfer_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-				params = &amp;stream-&gt;out_transfer_func-&gt;pwl;</div><div class='del'>-			else if (pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;type ==</div><div class='add'>+		if (ret == false &amp;&amp; mpc-&gt;funcs-&gt;set_output_gamma) {</div><div class='add'>+			if (stream-&gt;out_transfer_func.type == TF_TYPE_HWPWL)</div><div class='add'>+				params = &amp;stream-&gt;out_transfer_func.pwl;</div><div class='add'>+			else if (pipe_ctx-&gt;stream-&gt;out_transfer_func.type ==</div><div class='ctx'> 					TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='ctx'> 					cm3_helper_translate_curve_to_hw_format(</div><div class='del'>-					stream-&gt;out_transfer_func,</div><div class='add'>+					&amp;stream-&gt;out_transfer_func,</div><div class='ctx'> 					&amp;mpc-&gt;blender_params, false))</div><div class='ctx'> 				params = &amp;mpc-&gt;blender_params;</div><div class='ctx'> 			 /* there are no ROM LUTs in OUTGAM */</div><div class='del'>-			if (stream-&gt;out_transfer_func-&gt;type == TF_TYPE_PREDEFINED)</div><div class='add'>+			if (stream-&gt;out_transfer_func.type == TF_TYPE_PREDEFINED)</div><div class='ctx'> 				BREAK_TO_DEBUGGER();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -804,7 +799,7 @@ void dcn30_init_hw(struct dc *dc)</div><div class='ctx'> 	// Get DMCUB capabilities</div><div class='ctx'> 	dc_dmub_srv_query_caps_cmd(dc-&gt;ctx-&gt;dmub_srv);</div><div class='ctx'> 	dc-&gt;caps.dmub_caps.psr = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.psr;</div><div class='del'>-	dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch;</div><div class='add'>+	dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch_ver;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='hunk'>@@ -818,7 +813,7 @@ void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> 				enable);</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for two frame to make sure AV mute is sent out */</div><div class='del'>-		if (enable) {</div><div class='add'>+		if (enable &amp;&amp; pipe_ctx-&gt;stream_res.tg-&gt;funcs-&gt;is_tg_enabled(pipe_ctx-&gt;stream_res.tg)) {</div><div class='ctx'> 			pipe_ctx-&gt;stream_res.tg-&gt;funcs-&gt;wait_for_state(pipe_ctx-&gt;stream_res.tg, CRTC_STATE_VACTIVE);</div><div class='ctx'> 			pipe_ctx-&gt;stream_res.tg-&gt;funcs-&gt;wait_for_state(pipe_ctx-&gt;stream_res.tg, CRTC_STATE_VBLANK);</div><div class='ctx'> 			pipe_ctx-&gt;stream_res.tg-&gt;funcs-&gt;wait_for_state(pipe_ctx-&gt;stream_res.tg, CRTC_STATE_VACTIVE);</div><div class='hunk'>@@ -890,7 +885,7 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	union dmub_rb_cmd cmd;</div><div class='ctx'> 	uint32_t tmr_delay = 0, tmr_scale = 0;</div><div class='del'>-	struct dc_cursor_attributes cursor_attr;</div><div class='add'>+	struct dc_cursor_attributes cursor_attr = {0};</div><div class='ctx'> 	bool cursor_cache_enable = false;</div><div class='ctx'> 	struct dc_stream_state *stream = NULL;</div><div class='ctx'> 	struct dc_plane_state *plane = NULL;</div><div class='hunk'>@@ -946,7 +941,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)</div><div class='ctx'> 					plane-&gt;format &gt;= SURFACE_PIXEL_FORMAT_GRPH_ARGB8888 &amp;&amp;</div><div class='ctx'> 					plane-&gt;address.page_table_base.quad_part == 0 &amp;&amp;</div><div class='ctx'> 					dc-&gt;hwss.does_plane_fit_in_mall &amp;&amp;</div><div class='del'>-					dc-&gt;hwss.does_plane_fit_in_mall(dc, plane,</div><div class='add'>+					dc-&gt;hwss.does_plane_fit_in_mall(dc, plane-&gt;plane_size.surface_pitch,</div><div class='add'>+							plane-&gt;plane_size.surface_size.height, plane-&gt;format,</div><div class='ctx'> 							cursor_cache_enable ? &amp;cursor_attr : NULL)) {</div><div class='ctx'> 				unsigned int v_total = stream-&gt;adjust.v_total_max ?</div><div class='ctx'> 						stream-&gt;adjust.v_total_max : stream-&gt;timing.v_total;</div><div class='hunk'>@@ -1076,11 +1072,15 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn30_does_plane_fit_in_mall(struct dc *dc, struct dc_plane_state *plane, struct dc_cursor_attributes *cursor_attr)</div><div class='add'>+bool dcn30_does_plane_fit_in_mall(struct dc *dc,</div><div class='add'>+		unsigned int pitch,</div><div class='add'>+		unsigned int height,</div><div class='add'>+		enum surface_pixel_format format,</div><div class='add'>+		struct dc_cursor_attributes *cursor_attr)</div><div class='ctx'> {</div><div class='ctx'> 	// add meta size?</div><div class='del'>-	unsigned int surface_size = plane-&gt;plane_size.surface_pitch * plane-&gt;plane_size.surface_size.height *</div><div class='del'>-			(plane-&gt;format &gt;= SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 ? 8 : 4);</div><div class='add'>+	unsigned int surface_size = pitch * height *</div><div class='add'>+			(format &gt;= SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 ? 8 : 4);</div><div class='ctx'> 	unsigned int mall_size = dc-&gt;caps.mall_size_total;</div><div class='ctx'> 	unsigned int cursor_size = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h<br/>index 638f018a3cb5..76b16839486a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h</a></div><div class='hunk'>@@ -71,7 +71,10 @@ void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);</div><div class='ctx'> void dcn30_update_info_frame(struct pipe_ctx *pipe_ctx);</div><div class='ctx'> void dcn30_program_dmdata_engine(struct pipe_ctx *pipe_ctx);</div><div class='ctx'> </div><div class='del'>-bool dcn30_does_plane_fit_in_mall(struct dc *dc, struct dc_plane_state *plane,</div><div class='add'>+bool dcn30_does_plane_fit_in_mall(struct dc *dc,</div><div class='add'>+		unsigned int pitch,</div><div class='add'>+		unsigned int height,</div><div class='add'>+		enum surface_pixel_format format,</div><div class='ctx'> 		struct dc_cursor_attributes *cursor_attr);</div><div class='ctx'> </div><div class='ctx'> bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c<br/>index a760f0c6fe98..1c8abb417b6e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c</a></div><div class='hunk'>@@ -273,7 +273,7 @@ void dcn31_init_hw(struct dc *dc)</div><div class='ctx'> 	// Get DMCUB capabilities</div><div class='ctx'> 	dc_dmub_srv_query_caps_cmd(dc-&gt;ctx-&gt;dmub_srv);</div><div class='ctx'> 	dc-&gt;caps.dmub_caps.psr = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.psr;</div><div class='del'>-	dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch;</div><div class='add'>+	dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch_ver;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn31_dsc_pg_control(</div><div class='hunk'>@@ -479,7 +479,7 @@ void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool p</div><div class='ctx'> </div><div class='ctx'> int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config)</div><div class='ctx'> {</div><div class='del'>-	struct dcn_hubbub_phys_addr_config config;</div><div class='add'>+	struct dcn_hubbub_phys_addr_config config = {0};</div><div class='ctx'> </div><div class='ctx'> 	config.system_aperture.fb_top = pa_config-&gt;system_aperture.fb_top;</div><div class='ctx'> 	config.system_aperture.fb_offset = pa_config-&gt;system_aperture.fb_offset;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c<br/>index 093f4387553c..0d8a05cf8b1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		struct dsc_config dsc_cfg;</div><div class='del'>-		struct dsc_optc_config dsc_optc_cfg;</div><div class='add'>+		struct dsc_optc_config dsc_optc_cfg = {0};</div><div class='ctx'> 		enum optc_dsc_mode optc_dsc_mode;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable DSC hw block */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c<br/>index 7668229438da..b8e884368dc6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c</a></div><div class='hunk'>@@ -239,8 +239,10 @@ static uint32_t dcn32_calculate_cab_allocation(struct dc *dc, struct dc_state *c</div><div class='ctx'> 	// Convert number of cache lines required to number of ways</div><div class='ctx'> 	if (dc-&gt;debug.force_mall_ss_num_ways &gt; 0) {</div><div class='ctx'> 		num_ways = dc-&gt;debug.force_mall_ss_num_ways;</div><div class='add'>+	} else if (dc-&gt;res_pool-&gt;funcs-&gt;calculate_mall_ways_from_bytes) {</div><div class='add'>+		num_ways = dc-&gt;res_pool-&gt;funcs-&gt;calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes);</div><div class='ctx'> 	} else {</div><div class='del'>-		num_ways = dcn32_helper_mall_bytes_to_ways(dc, mall_ss_size_bytes);</div><div class='add'>+		num_ways = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return num_ways;</div><div class='hunk'>@@ -261,7 +263,9 @@ bool dcn32_apply_idle_power_optimizations(struct dc *dc, bool enable)</div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; i++) {</div><div class='ctx'> 		/* MALL SS messaging is not supported with PSR at this time */</div><div class='ctx'> 		if (dc-&gt;current_state-&gt;streams[i] != NULL &amp;&amp;</div><div class='del'>-				dc-&gt;current_state-&gt;streams[i]-&gt;link-&gt;psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED)</div><div class='add'>+				dc-&gt;current_state-&gt;streams[i]-&gt;link-&gt;psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED &amp;&amp;</div><div class='add'>+				(dc-&gt;current_state-&gt;stream_count &gt; 1 || (!dc-&gt;current_state-&gt;streams[i]-&gt;dpms_off &amp;&amp;</div><div class='add'>+						dc-&gt;current_state-&gt;stream_status[i].plane_count &gt; 0)))</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -475,39 +479,35 @@ bool dcn32_set_mcm_luts(</div><div class='ctx'> 	int mpcc_id = pipe_ctx-&gt;plane_res.hubp-&gt;inst;</div><div class='ctx'> 	struct mpc *mpc = pipe_ctx-&gt;stream_res.opp-&gt;ctx-&gt;dc-&gt;res_pool-&gt;mpc;</div><div class='ctx'> 	bool result = true;</div><div class='del'>-	struct pwl_params *lut_params = NULL;</div><div class='add'>+	const struct pwl_params *lut_params = NULL;</div><div class='ctx'> </div><div class='ctx'> 	// 1D LUT</div><div class='del'>-	if (plane_state-&gt;blend_tf) {</div><div class='del'>-		if (plane_state-&gt;blend_tf-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			lut_params = &amp;plane_state-&gt;blend_tf-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;blend_tf-&gt;type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='del'>-			cm3_helper_translate_curve_to_hw_format(plane_state-&gt;blend_tf,</div><div class='del'>-					&amp;dpp_base-&gt;regamma_params, false);</div><div class='del'>-			lut_params = &amp;dpp_base-&gt;regamma_params;</div><div class='del'>-		}</div><div class='add'>+	if (plane_state-&gt;blend_tf.type == TF_TYPE_HWPWL)</div><div class='add'>+		lut_params = &amp;plane_state-&gt;blend_tf.pwl;</div><div class='add'>+	else if (plane_state-&gt;blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='add'>+		cm3_helper_translate_curve_to_hw_format(&amp;plane_state-&gt;blend_tf,</div><div class='add'>+				&amp;dpp_base-&gt;regamma_params, false);</div><div class='add'>+		lut_params = &amp;dpp_base-&gt;regamma_params;</div><div class='ctx'> 	}</div><div class='ctx'> 	result = mpc-&gt;funcs-&gt;program_1dlut(mpc, lut_params, mpcc_id);</div><div class='ctx'> 	lut_params = NULL;</div><div class='ctx'> </div><div class='ctx'> 	// Shaper</div><div class='del'>-	if (plane_state-&gt;in_shaper_func) {</div><div class='del'>-		if (plane_state-&gt;in_shaper_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			lut_params = &amp;plane_state-&gt;in_shaper_func-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;in_shaper_func-&gt;type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='del'>-			// TODO: dpp_base replace</div><div class='del'>-			ASSERT(false);</div><div class='del'>-			cm3_helper_translate_curve_to_hw_format(plane_state-&gt;in_shaper_func,</div><div class='del'>-					&amp;dpp_base-&gt;shaper_params, true);</div><div class='del'>-			lut_params = &amp;dpp_base-&gt;shaper_params;</div><div class='del'>-		}</div><div class='add'>+	if (plane_state-&gt;in_shaper_func.type == TF_TYPE_HWPWL)</div><div class='add'>+		lut_params = &amp;plane_state-&gt;in_shaper_func.pwl;</div><div class='add'>+	else if (plane_state-&gt;in_shaper_func.type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='add'>+		// TODO: dpp_base replace</div><div class='add'>+		ASSERT(false);</div><div class='add'>+		cm3_helper_translate_curve_to_hw_format(&amp;plane_state-&gt;in_shaper_func,</div><div class='add'>+				&amp;dpp_base-&gt;shaper_params, true);</div><div class='add'>+		lut_params = &amp;dpp_base-&gt;shaper_params;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	result = mpc-&gt;funcs-&gt;program_shaper(mpc, lut_params, mpcc_id);</div><div class='ctx'> </div><div class='ctx'> 	// 3D</div><div class='del'>-	if (plane_state-&gt;lut3d_func &amp;&amp; plane_state-&gt;lut3d_func-&gt;state.bits.initialized == 1)</div><div class='del'>-		result = mpc-&gt;funcs-&gt;program_3dlut(mpc, &amp;plane_state-&gt;lut3d_func-&gt;lut_3d, mpcc_id);</div><div class='add'>+	if (plane_state-&gt;lut3d_func.state.bits.initialized == 1)</div><div class='add'>+		result = mpc-&gt;funcs-&gt;program_3dlut(mpc, &amp;plane_state-&gt;lut3d_func.lut_3d, mpcc_id);</div><div class='ctx'> 	else</div><div class='ctx'> 		result = mpc-&gt;funcs-&gt;program_3dlut(mpc, NULL, mpcc_id);</div><div class='ctx'> </div><div class='hunk'>@@ -524,27 +524,24 @@ bool dcn32_set_input_transfer_func(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	enum dc_transfer_func_predefined tf;</div><div class='ctx'> 	bool result = true;</div><div class='del'>-	struct pwl_params *params = NULL;</div><div class='add'>+	const struct pwl_params *params = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (mpc == NULL || plane_state == NULL)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	tf = TRANSFER_FUNCTION_UNITY;</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func &amp;&amp;</div><div class='del'>-		plane_state-&gt;in_transfer_func-&gt;type == TF_TYPE_PREDEFINED)</div><div class='del'>-		tf = plane_state-&gt;in_transfer_func-&gt;tf;</div><div class='add'>+	if (plane_state-&gt;in_transfer_func.type == TF_TYPE_PREDEFINED)</div><div class='add'>+		tf = plane_state-&gt;in_transfer_func.tf;</div><div class='ctx'> </div><div class='ctx'> 	dpp_base-&gt;funcs-&gt;dpp_set_pre_degam(dpp_base, tf);</div><div class='ctx'> </div><div class='del'>-	if (plane_state-&gt;in_transfer_func) {</div><div class='del'>-		if (plane_state-&gt;in_transfer_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-			params = &amp;plane_state-&gt;in_transfer_func-&gt;pwl;</div><div class='del'>-		else if (plane_state-&gt;in_transfer_func-&gt;type == TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='del'>-			cm3_helper_translate_curve_to_hw_format(plane_state-&gt;in_transfer_func,</div><div class='del'>-					&amp;dpp_base-&gt;degamma_params, false))</div><div class='del'>-			params = &amp;dpp_base-&gt;degamma_params;</div><div class='del'>-	}</div><div class='add'>+	if (plane_state-&gt;in_transfer_func.type == TF_TYPE_HWPWL)</div><div class='add'>+		params = &amp;plane_state-&gt;in_transfer_func.pwl;</div><div class='add'>+	else if (plane_state-&gt;in_transfer_func.type == TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='add'>+		cm3_helper_translate_curve_to_hw_format(&amp;plane_state-&gt;in_transfer_func,</div><div class='add'>+				&amp;dpp_base-&gt;degamma_params, false))</div><div class='add'>+		params = &amp;dpp_base-&gt;degamma_params;</div><div class='ctx'> </div><div class='ctx'> 	dpp_base-&gt;funcs-&gt;dpp_program_gamcor_lut(dpp_base, params);</div><div class='ctx'> </div><div class='hunk'>@@ -562,24 +559,24 @@ bool dcn32_set_output_transfer_func(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	int mpcc_id = pipe_ctx-&gt;plane_res.hubp-&gt;inst;</div><div class='ctx'> 	struct mpc *mpc = pipe_ctx-&gt;stream_res.opp-&gt;ctx-&gt;dc-&gt;res_pool-&gt;mpc;</div><div class='del'>-	struct pwl_params *params = NULL;</div><div class='add'>+	const struct pwl_params *params = NULL;</div><div class='ctx'> 	bool ret = false;</div><div class='ctx'> </div><div class='ctx'> 	/* program OGAM or 3DLUT only for the top pipe*/</div><div class='ctx'> 	if (resource_is_pipe_type(pipe_ctx, OPP_HEAD)) {</div><div class='ctx'> 		/*program shaper and 3dlut in MPC*/</div><div class='ctx'> 		ret = dcn32_set_mpc_shaper_3dlut(pipe_ctx, stream);</div><div class='del'>-		if (ret == false &amp;&amp; mpc-&gt;funcs-&gt;set_output_gamma &amp;&amp; stream-&gt;out_transfer_func) {</div><div class='del'>-			if (stream-&gt;out_transfer_func-&gt;type == TF_TYPE_HWPWL)</div><div class='del'>-				params = &amp;stream-&gt;out_transfer_func-&gt;pwl;</div><div class='del'>-			else if (pipe_ctx-&gt;stream-&gt;out_transfer_func-&gt;type ==</div><div class='add'>+		if (ret == false &amp;&amp; mpc-&gt;funcs-&gt;set_output_gamma) {</div><div class='add'>+			if (stream-&gt;out_transfer_func.type == TF_TYPE_HWPWL)</div><div class='add'>+				params = &amp;stream-&gt;out_transfer_func.pwl;</div><div class='add'>+			else if (pipe_ctx-&gt;stream-&gt;out_transfer_func.type ==</div><div class='ctx'> 					TF_TYPE_DISTRIBUTED_POINTS &amp;&amp;</div><div class='ctx'> 					cm3_helper_translate_curve_to_hw_format(</div><div class='del'>-					stream-&gt;out_transfer_func,</div><div class='add'>+					&amp;stream-&gt;out_transfer_func,</div><div class='ctx'> 					&amp;mpc-&gt;blender_params, false))</div><div class='ctx'> 				params = &amp;mpc-&gt;blender_params;</div><div class='ctx'> 			/* there are no ROM LUTs in OUTGAM */</div><div class='del'>-			if (stream-&gt;out_transfer_func-&gt;type == TF_TYPE_PREDEFINED)</div><div class='add'>+			if (stream-&gt;out_transfer_func.type == TF_TYPE_PREDEFINED)</div><div class='ctx'> 				BREAK_TO_DEBUGGER();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -956,10 +953,10 @@ void dcn32_init_hw(struct dc *dc)</div><div class='ctx'> 		dc-&gt;caps.dmub_caps.psr = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.psr;</div><div class='ctx'> 		dc-&gt;caps.dmub_caps.subvp_psr = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.subvp_psr_support;</div><div class='ctx'> 		dc-&gt;caps.dmub_caps.gecc_enable = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.gecc_enable;</div><div class='del'>-		dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch;</div><div class='add'>+		dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch_ver;</div><div class='ctx'> </div><div class='ctx'> 		if (dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;fw_version &lt;</div><div class='del'>-		    DMUB_FW_VERSION(7, 0, 35)) {</div><div class='add'>+				DMUB_FW_VERSION(7, 0, 35)) {</div><div class='ctx'> 			dc-&gt;debug.force_disable_subvp = true;</div><div class='ctx'> 			dc-&gt;debug.disable_fpo_optimizations = true;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -992,7 +989,7 @@ static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		struct dsc_config dsc_cfg;</div><div class='del'>-		struct dsc_optc_config dsc_optc_cfg;</div><div class='add'>+		struct dsc_optc_config dsc_optc_cfg = {0};</div><div class='ctx'> 		enum optc_dsc_mode optc_dsc_mode;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable DSC hw block */</div><div class='hunk'>@@ -1545,7 +1542,7 @@ void dcn32_init_blank(</div><div class='ctx'> 	struct output_pixel_processor *opp = NULL;</div><div class='ctx'> 	struct output_pixel_processor *bottom_opp = NULL;</div><div class='ctx'> 	uint32_t num_opps, opp_id_src0, opp_id_src1;</div><div class='del'>-	uint32_t otg_active_width, otg_active_height;</div><div class='add'>+	uint32_t otg_active_width = 0, otg_active_height = 0;</div><div class='ctx'> 	uint32_t i;</div><div class='ctx'> </div><div class='ctx'> 	/* program opp dpg blank color */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c<br/>index a5560b3fc39b..5295f52e4fc8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c</a></div><div class='hunk'>@@ -349,7 +349,7 @@ void dcn35_init_hw(struct dc *dc)</div><div class='ctx'> 	if (dc-&gt;ctx-&gt;dmub_srv) {</div><div class='ctx'> 		dc_dmub_srv_query_caps_cmd(dc-&gt;ctx-&gt;dmub_srv);</div><div class='ctx'> 		dc-&gt;caps.dmub_caps.psr = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.psr;</div><div class='del'>-		dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch;</div><div class='add'>+		dc-&gt;caps.dmub_caps.mclk_sw = dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;feature_caps.fw_assisted_mclk_switch_ver;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;res_pool-&gt;pg_cntl) {</div><div class='hunk'>@@ -373,7 +373,7 @@ static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		struct dsc_config dsc_cfg;</div><div class='del'>-		struct dsc_optc_config dsc_optc_cfg;</div><div class='add'>+		struct dsc_optc_config dsc_optc_cfg = {0};</div><div class='ctx'> 		enum optc_dsc_mode optc_dsc_mode;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable DSC hw block */</div><div class='hunk'>@@ -495,6 +495,17 @@ void dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dcn35_dpstream_root_clock_control(struct dce_hwseq *hws, unsigned int dp_hpo_inst, bool clock_on)</div><div class='add'>+{</div><div class='add'>+	if (!hws-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpstream)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (hws-&gt;ctx-&gt;dc-&gt;res_pool-&gt;dccg-&gt;funcs-&gt;set_dpstreamclk_root_clock_gating) {</div><div class='add'>+		hws-&gt;ctx-&gt;dc-&gt;res_pool-&gt;dccg-&gt;funcs-&gt;set_dpstreamclk_root_clock_gating(</div><div class='add'>+			hws-&gt;ctx-&gt;dc-&gt;res_pool-&gt;dccg, dp_hpo_inst, clock_on);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void dcn35_dsc_pg_control(</div><div class='ctx'> 		struct dce_hwseq *hws,</div><div class='ctx'> 		unsigned int dsc_inst,</div><div class='hunk'>@@ -638,22 +649,43 @@ void dcn35_power_down_on_boot(struct dc *dc)</div><div class='ctx'> </div><div class='ctx'> bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable)</div><div class='ctx'> {</div><div class='del'>-	struct dc_link *edp_links[MAX_NUM_EDP];</div><div class='del'>-	int i, edp_num;</div><div class='ctx'> 	if (dc-&gt;debug.dmcub_emulation)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='del'>-		dc_get_edp_links(dc, edp_links, &amp;edp_num);</div><div class='del'>-		if (edp_num == 0 || edp_num &gt; 1)</div><div class='del'>-			return false;</div><div class='add'>+		uint32_t num_active_edp = 0;</div><div class='add'>+		int i;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; ++i) {</div><div class='ctx'> 			struct dc_stream_state *stream = dc-&gt;current_state-&gt;streams[i];</div><div class='add'>+			struct dc_link *link = stream-&gt;link;</div><div class='add'>+			bool is_psr = link &amp;&amp; !link-&gt;panel_config.psr.disable_psr &amp;&amp;</div><div class='add'>+				      (link-&gt;psr_settings.psr_version == DC_PSR_VERSION_1 ||</div><div class='add'>+				       link-&gt;psr_settings.psr_version == DC_PSR_VERSION_SU_1);</div><div class='add'>+			bool is_replay = link &amp;&amp; link-&gt;replay_settings.replay_feature_enabled;</div><div class='add'>+</div><div class='add'>+			/* Ignore streams that disabled. */</div><div class='add'>+			if (stream-&gt;dpms_off)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			/* Active external displays block idle optimizations. */</div><div class='add'>+			if (!dc_is_embedded_signal(stream-&gt;signal))</div><div class='add'>+				return false;</div><div class='add'>+</div><div class='add'>+			/* If not PWRSEQ0 can't enter idle optimizations */</div><div class='add'>+			if (link &amp;&amp; link-&gt;link_index != 0)</div><div class='add'>+				return false;</div><div class='ctx'> </div><div class='del'>-			if (!stream-&gt;dpms_off &amp;&amp; !dc_is_embedded_signal(stream-&gt;signal))</div><div class='add'>+			/* Check for panel power features required for idle optimizations. */</div><div class='add'>+			if (!is_psr &amp;&amp; !is_replay)</div><div class='ctx'> 				return false;</div><div class='add'>+</div><div class='add'>+			num_active_edp += 1;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/* If more than one active eDP then disallow. */</div><div class='add'>+		if (num_active_edp &gt; 1)</div><div class='add'>+			return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	// TODO: review other cases when idle optimization is allowed</div><div class='hunk'>@@ -679,6 +711,7 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 	struct hubbub *hubbub = dc-&gt;res_pool-&gt;hubbub;</div><div class='ctx'> 	struct pg_cntl *pg_cntl = dc-&gt;res_pool-&gt;pg_cntl;</div><div class='ctx'> 	bool can_apply_seamless_boot = false;</div><div class='add'>+	bool tg_enabled[MAX_PIPES] = {false};</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='ctx'> 		if (context-&gt;streams[i]-&gt;apply_seamless_boot_optimization) {</div><div class='hunk'>@@ -760,6 +793,7 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 			// requesting data while in PSR.</div><div class='ctx'> 			tg-&gt;funcs-&gt;tg_init(tg);</div><div class='ctx'> 			hubp-&gt;power_gated = true;</div><div class='add'>+			tg_enabled[i] = true;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -801,6 +835,20 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> 		tg-&gt;funcs-&gt;tg_init(tg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Clean up MPC tree */</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+		if (tg_enabled[i]) {</div><div class='add'>+			if (dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list) {</div><div class='add'>+				if (dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list-&gt;mpcc_bot) {</div><div class='add'>+					int bot_id = dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list-&gt;mpcc_bot-&gt;mpcc_id;</div><div class='add'>+</div><div class='add'>+					if ((bot_id &lt; MAX_MPCC) &amp;&amp; (bot_id &lt; MAX_PIPES) &amp;&amp; (!tg_enabled[bot_id]))</div><div class='add'>+						dc-&gt;res_pool-&gt;opps[i]-&gt;mpc_tree_params.opp_list = NULL;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (pg_cntl != NULL) {</div><div class='ctx'> 		if (pg_cntl-&gt;funcs-&gt;dsc_pg_control != NULL) {</div><div class='ctx'> 			uint32_t num_opps = 0;</div><div class='hunk'>@@ -961,6 +1009,9 @@ void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 	if (!hpo_frl_stream_enc_acquired &amp;&amp; !hpo_dp_stream_enc_acquired)</div><div class='ctx'> 		update_state-&gt;pg_res_update[PG_HPO] = true;</div><div class='ctx'> </div><div class='add'>+	if (hpo_frl_stream_enc_acquired)</div><div class='add'>+		update_state-&gt;pg_pipe_res_update[PG_HDMISTREAM][0] = true;</div><div class='add'>+</div><div class='ctx'> 	update_state-&gt;pg_res_update[PG_DWB] = true;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='hunk'>@@ -978,8 +1029,7 @@ void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 		if (pipe_ctx-&gt;plane_res.dpp)</div><div class='ctx'> 			update_state-&gt;pg_pipe_res_update[PG_DPP][pipe_ctx-&gt;plane_res.hubp-&gt;inst] = false;</div><div class='ctx'> </div><div class='del'>-		if ((pipe_ctx-&gt;plane_res.dpp || pipe_ctx-&gt;stream_res.opp) &amp;&amp;</div><div class='del'>-			pipe_ctx-&gt;plane_res.mpcc_inst &gt;= 0)</div><div class='add'>+		if (pipe_ctx-&gt;plane_res.dpp || pipe_ctx-&gt;stream_res.opp)</div><div class='ctx'> 			update_state-&gt;pg_pipe_res_update[PG_MPCC][pipe_ctx-&gt;plane_res.mpcc_inst] = false;</div><div class='ctx'> </div><div class='ctx'> 		if (pipe_ctx-&gt;stream_res.dsc)</div><div class='hunk'>@@ -987,6 +1037,9 @@ void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,</div><div class='ctx'> </div><div class='ctx'> 		if (pipe_ctx-&gt;stream_res.opp)</div><div class='ctx'> 			update_state-&gt;pg_pipe_res_update[PG_OPP][pipe_ctx-&gt;stream_res.opp-&gt;inst] = false;</div><div class='add'>+</div><div class='add'>+		if (pipe_ctx-&gt;stream_res.hpo_dp_stream_enc)</div><div class='add'>+			update_state-&gt;pg_pipe_res_update[PG_DPSTREAM][pipe_ctx-&gt;stream_res.hpo_dp_stream_enc-&gt;inst] = false;</div><div class='ctx'> 	}</div><div class='ctx'> 	/*domain24 controls all the otg, mpc, opp, as long as one otg is still up, avoid enabling OTG PG*/</div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;res_pool-&gt;timing_generator_count; i++) {</div><div class='hunk'>@@ -1044,6 +1097,9 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,</div><div class='ctx'> </div><div class='ctx'> 				if (j == PG_OPTC &amp;&amp; new_pipe-&gt;stream_res.tg)</div><div class='ctx'> 					update_state-&gt;pg_pipe_res_update[j][new_pipe-&gt;stream_res.tg-&gt;inst] = true;</div><div class='add'>+</div><div class='add'>+				if (j == PG_DPSTREAM &amp;&amp; new_pipe-&gt;stream_res.hpo_dp_stream_enc)</div><div class='add'>+					update_state-&gt;pg_pipe_res_update[j][new_pipe-&gt;stream_res.hpo_dp_stream_enc-&gt;inst] = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (cur_pipe-&gt;plane_state == new_pipe-&gt;plane_state ||</div><div class='ctx'> 				cur_pipe == new_pipe) {</div><div class='hunk'>@@ -1073,6 +1129,11 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 					cur_pipe-&gt;stream_res.tg != new_pipe-&gt;stream_res.tg &amp;&amp;</div><div class='ctx'> 					new_pipe-&gt;stream_res.tg)</div><div class='ctx'> 					update_state-&gt;pg_pipe_res_update[j][new_pipe-&gt;stream_res.tg-&gt;inst] = true;</div><div class='add'>+</div><div class='add'>+				if (j == PG_DPSTREAM &amp;&amp;</div><div class='add'>+					cur_pipe-&gt;stream_res.hpo_dp_stream_enc != new_pipe-&gt;stream_res.hpo_dp_stream_enc &amp;&amp;</div><div class='add'>+					new_pipe-&gt;stream_res.hpo_dp_stream_enc)</div><div class='add'>+					update_state-&gt;pg_pipe_res_update[j][new_pipe-&gt;stream_res.hpo_dp_stream_enc-&gt;inst] = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1088,6 +1149,9 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 	if (hpo_frl_stream_enc_acquired || hpo_dp_stream_enc_acquired)</div><div class='ctx'> 		update_state-&gt;pg_res_update[PG_HPO] = true;</div><div class='ctx'> </div><div class='add'>+	if (hpo_frl_stream_enc_acquired)</div><div class='add'>+		update_state-&gt;pg_pipe_res_update[PG_HDMISTREAM][0] = true;</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1212,14 +1276,19 @@ void dcn35_root_clock_control(struct dc *dc,</div><div class='ctx'> 	if (!pg_cntl)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/*enable root clock first when power up*/</div><div class='del'>-	if (power_on)</div><div class='add'>+	if (power_on) {</div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 			if (update_state-&gt;pg_pipe_res_update[PG_HUBP][i] &amp;&amp;</div><div class='ctx'> 				update_state-&gt;pg_pipe_res_update[PG_DPP][i]) {</div><div class='ctx'> 				if (dc-&gt;hwseq-&gt;funcs.dpp_root_clock_control)</div><div class='ctx'> 					dc-&gt;hwseq-&gt;funcs.dpp_root_clock_control(dc-&gt;hwseq, i, power_on);</div><div class='ctx'> 			}</div><div class='add'>+			if (update_state-&gt;pg_pipe_res_update[PG_DPSTREAM][i])</div><div class='add'>+				if (dc-&gt;hwseq-&gt;funcs.dpstream_root_clock_control)</div><div class='add'>+					dc-&gt;hwseq-&gt;funcs.dpstream_root_clock_control(dc-&gt;hwseq, i, power_on);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;res_pool-&gt;res_cap-&gt;num_dsc; i++) {</div><div class='ctx'> 		if (update_state-&gt;pg_pipe_res_update[PG_DSC][i]) {</div><div class='ctx'> 			if (power_on) {</div><div class='hunk'>@@ -1232,14 +1301,19 @@ void dcn35_root_clock_control(struct dc *dc,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/*disable root clock first when power down*/</div><div class='del'>-	if (!power_on)</div><div class='add'>+	if (!power_on) {</div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 			if (update_state-&gt;pg_pipe_res_update[PG_HUBP][i] &amp;&amp;</div><div class='ctx'> 				update_state-&gt;pg_pipe_res_update[PG_DPP][i]) {</div><div class='ctx'> 				if (dc-&gt;hwseq-&gt;funcs.dpp_root_clock_control)</div><div class='ctx'> 					dc-&gt;hwseq-&gt;funcs.dpp_root_clock_control(dc-&gt;hwseq, i, power_on);</div><div class='ctx'> 			}</div><div class='add'>+			if (update_state-&gt;pg_pipe_res_update[PG_DPSTREAM][i])</div><div class='add'>+				if (dc-&gt;hwseq-&gt;funcs.dpstream_root_clock_control)</div><div class='add'>+					dc-&gt;hwseq-&gt;funcs.dpstream_root_clock_control(dc-&gt;hwseq, i, power_on);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn35_prepare_bandwidth(</div><div class='hunk'>@@ -1280,22 +1354,6 @@ void dcn35_optimize_bandwidth(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dcn35_set_idle_state(const struct dc *dc, bool allow_idle)</div><div class='del'>-{</div><div class='del'>-	// TODO: Find a more suitable communcation</div><div class='del'>-	if (dc-&gt;clk_mgr-&gt;funcs-&gt;set_idle_state)</div><div class='del'>-		dc-&gt;clk_mgr-&gt;funcs-&gt;set_idle_state(dc-&gt;clk_mgr, allow_idle);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-uint32_t dcn35_get_idle_state(const struct dc *dc)</div><div class='del'>-{</div><div class='del'>-	// TODO: Find a more suitable communcation</div><div class='del'>-	if (dc-&gt;clk_mgr-&gt;funcs-&gt;get_idle_state)</div><div class='del'>-		return dc-&gt;clk_mgr-&gt;funcs-&gt;get_idle_state(dc-&gt;clk_mgr);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void dcn35_set_drr(struct pipe_ctx **pipe_ctx,</div><div class='ctx'> 		int num_pipes, struct dc_crtc_timing_adjust adjust)</div><div class='ctx'> {</div><div class='hunk'>@@ -1353,3 +1411,31 @@ void dcn35_set_static_screen_control(struct pipe_ctx **pipe_ctx,</div><div class='ctx'> 			set_static_screen_control(pipe_ctx[i]-&gt;stream_res.tg,</div><div class='ctx'> 					triggers, params-&gt;num_frames);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void dcn35_set_long_vblank(struct pipe_ctx **pipe_ctx,</div><div class='add'>+		int num_pipes, uint32_t v_total_min, uint32_t v_total_max)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+	struct long_vtotal_params params = {0};</div><div class='add'>+</div><div class='add'>+	params.vertical_total_max = v_total_max;</div><div class='add'>+	params.vertical_total_min = v_total_min;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_pipes; i++) {</div><div class='add'>+		if (!pipe_ctx[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (pipe_ctx[i]-&gt;stream) {</div><div class='add'>+			struct dc_crtc_timing *timing = &amp;pipe_ctx[i]-&gt;stream-&gt;timing;</div><div class='add'>+</div><div class='add'>+			if (timing)</div><div class='add'>+				params.vertical_blank_start = timing-&gt;v_total - timing-&gt;v_front_porch;</div><div class='add'>+			else</div><div class='add'>+				params.vertical_blank_start = 0;</div><div class='add'>+</div><div class='add'>+			if ((pipe_ctx[i]-&gt;stream_res.tg != NULL) &amp;&amp; pipe_ctx[i]-&gt;stream_res.tg-&gt;funcs &amp;&amp;</div><div class='add'>+				pipe_ctx[i]-&gt;stream_res.tg-&gt;funcs-&gt;set_long_vtotal)</div><div class='add'>+				pipe_ctx[i]-&gt;stream_res.tg-&gt;funcs-&gt;set_long_vtotal(pipe_ctx[i]-&gt;stream_res.tg, &amp;params);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h<br/>index c354efa6c1b2..a731c8880d60 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h</a></div><div class='hunk'>@@ -37,6 +37,8 @@ void dcn35_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool pow</div><div class='ctx'> </div><div class='ctx'> void dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on);</div><div class='ctx'> </div><div class='add'>+void dcn35_dpstream_root_clock_control(struct dce_hwseq *hws, unsigned int dp_hpo_inst, bool clock_on);</div><div class='add'>+</div><div class='ctx'> void dcn35_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);</div><div class='ctx'> </div><div class='ctx'> void dcn35_set_dmu_fgcg(struct dce_hwseq *hws, bool enable);</div><div class='hunk'>@@ -84,13 +86,13 @@ void dcn35_dsc_pg_control(</div><div class='ctx'> 		unsigned int dsc_inst,</div><div class='ctx'> 		bool power_on);</div><div class='ctx'> </div><div class='del'>-void dcn35_set_idle_state(const struct dc *dc, bool allow_idle);</div><div class='del'>-uint32_t dcn35_get_idle_state(const struct dc *dc);</div><div class='del'>-</div><div class='ctx'> void dcn35_set_drr(struct pipe_ctx **pipe_ctx,</div><div class='ctx'> 		int num_pipes, struct dc_crtc_timing_adjust adjust);</div><div class='ctx'> </div><div class='ctx'> void dcn35_set_static_screen_control(struct pipe_ctx **pipe_ctx,</div><div class='ctx'> 		int num_pipes, const struct dc_static_screen_params *params);</div><div class='ctx'> </div><div class='add'>+void dcn35_set_long_vblank(struct pipe_ctx **pipe_ctx,</div><div class='add'>+		int num_pipes, uint32_t v_total_min, uint32_t v_total_max);</div><div class='add'>+</div><div class='ctx'> #endif /* __DC_HWSS_DCN35_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c<br/>index a93073055e7b..df3bf77f3fb4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c</a></div><div class='hunk'>@@ -121,8 +121,7 @@ static const struct hw_sequencer_funcs dcn35_funcs = {</div><div class='ctx'> 	.hw_block_power_up = dcn35_hw_block_power_up,</div><div class='ctx'> 	.hw_block_power_down = dcn35_hw_block_power_down,</div><div class='ctx'> 	.root_clock_control = dcn35_root_clock_control,</div><div class='del'>-	.set_idle_state = dcn35_set_idle_state,</div><div class='del'>-	.get_idle_state = dcn35_get_idle_state</div><div class='add'>+	.set_long_vtotal = dcn35_set_long_vblank,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct hwseq_private_funcs dcn35_private_funcs = {</div><div class='hunk'>@@ -148,6 +147,7 @@ static const struct hwseq_private_funcs dcn35_private_funcs = {</div><div class='ctx'> 	//.hubp_pg_control = dcn35_hubp_pg_control,</div><div class='ctx'> 	.enable_power_gating_plane = dcn35_enable_power_gating_plane,</div><div class='ctx'> 	.dpp_root_clock_control = dcn35_dpp_root_clock_control,</div><div class='add'>+	.dpstream_root_clock_control = dcn35_dpstream_root_clock_control,</div><div class='ctx'> 	.program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree,</div><div class='ctx'> 	.update_odm = dcn35_update_odm,</div><div class='ctx'> 	.set_hdr_multiplier = dcn10_set_hdr_multiplier,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile<br/>index b24ad27fe6ef..a4b3c1e99ec6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/Makefile</a></div><div class='hunk'>@@ -1,16 +1,27 @@</div><div class='ctx'> #</div><div class='del'>-# (c) Copyright 2022 Advanced Micro Devices, Inc. All the rights reserved</div><div class='add'>+# Copyright (c) 2022-2024 Advanced Micro Devices, Inc.</div><div class='ctx'> #</div><div class='del'>-#  All rights reserved.  This notice is intended as a precaution against</div><div class='del'>-#  inadvertent publication and does not imply publication or any waiver</div><div class='del'>-#  of confidentiality.  The year included in the foregoing notice is the</div><div class='del'>-#  year of creation of the work.</div><div class='add'>+# Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+# copy of this software and associated documentation files (the "Software"),</div><div class='add'>+# to deal in the Software without restriction, including without limitation</div><div class='add'>+# the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+# and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+# Software is furnished to do so, subject to the following conditions:</div><div class='ctx'> #</div><div class='del'>-#  Authors: AMD</div><div class='add'>+# The above copyright notice and this permission notice shall be included in</div><div class='add'>+# all copies or substantial portions of the Software.</div><div class='add'>+#</div><div class='add'>+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+# OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'> #</div><div class='ctx'> # Makefile for DCN351.</div><div class='ctx'> </div><div class='del'>-DCN351 = dcn351_init.o</div><div class='add'>+DCN351 = dcn351_hwseq.o dcn351_init.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_DCN351 = $(addprefix $(AMDDALPATH)/dc/dcn351/,$(DCN351))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c<br/>new file mode 100644<br/>index 000000000000..93fe5b262a3d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: AMD</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "core_types.h"</div><div class='add'>+#include "resource.h"</div><div class='add'>+#include "dcn351_hwseq.h"</div><div class='add'>+#include "dcn35/dcn35_hwseq.h"</div><div class='add'>+</div><div class='add'>+#define DC_LOGGER_INIT(logger) \</div><div class='add'>+	struct dal_logger *dc_logger = logger</div><div class='add'>+</div><div class='add'>+#define DC_LOGGER \</div><div class='add'>+	dc_logger</div><div class='add'>+</div><div class='add'>+void dcn351_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,</div><div class='add'>+	struct pg_block_update *update_state)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	dcn35_calc_blocks_to_gate(dc, context, update_state);</div><div class='add'>+</div><div class='add'>+	for (i = dc-&gt;res_pool-&gt;pipe_count - 1; i &gt;= 0; i--) {</div><div class='add'>+		if (!update_state-&gt;pg_pipe_res_update[PG_HUBP][i] &amp;&amp;</div><div class='add'>+			!update_state-&gt;pg_pipe_res_update[PG_DPP][i]) {</div><div class='add'>+			for (j = i - 1; j &gt;= 0; j--) {</div><div class='add'>+				update_state-&gt;pg_pipe_res_update[PG_HUBP][j] = false;</div><div class='add'>+				update_state-&gt;pg_pipe_res_update[PG_DPP][j] = false;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dcn351_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,</div><div class='add'>+	struct pg_block_update *update_state)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	dcn35_calc_blocks_to_ungate(dc, context, update_state);</div><div class='add'>+</div><div class='add'>+	for (i = dc-&gt;res_pool-&gt;pipe_count - 1; i &gt;= 0; i--) {</div><div class='add'>+		if (update_state-&gt;pg_pipe_res_update[PG_HUBP][i] &amp;&amp;</div><div class='add'>+			update_state-&gt;pg_pipe_res_update[PG_DPP][i]) {</div><div class='add'>+			for (j = i - 1; j &gt;= 0; j--) {</div><div class='add'>+				update_state-&gt;pg_pipe_res_update[PG_HUBP][j] = true;</div><div class='add'>+				update_state-&gt;pg_pipe_res_update[PG_DPP][j] = true;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dcn351_hw_block_power_down() - power down sequence</div><div class='add'>+ *</div><div class='add'>+ * The following sequence describes the ON-OFF (ONO) for power down:</div><div class='add'>+ *</div><div class='add'>+ *	ONO Region 11, DCPG 19: dsc3</div><div class='add'>+ *	ONO Region 10, DCPG 3: dchubp3, dpp3</div><div class='add'>+ *	ONO Region 9, DCPG 18: dsc2</div><div class='add'>+ *	ONO Region 8, DCPG 2: dchubp2, dpp2</div><div class='add'>+ *	ONO Region 7, DCPG 17: dsc1</div><div class='add'>+ *	ONO Region 6, DCPG 1: dchubp1, dpp1</div><div class='add'>+ *	ONO Region 5, DCPG 16: dsc0</div><div class='add'>+ *	ONO Region 4, DCPG 0: dchubp0, dpp0</div><div class='add'>+ *	ONO Region 3, DCPG 25: hpo - SKIPPED. Should be kept on</div><div class='add'>+ *	ONO Region 2, DCPG 24: mpc opp optc dwb</div><div class='add'>+ *	ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry</div><div class='add'>+ *	ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed</div><div class='add'>+ *</div><div class='add'>+ * @dc: Current DC state</div><div class='add'>+ * @update_state: update PG sequence states for HW block</div><div class='add'>+ */</div><div class='add'>+void dcn351_hw_block_power_down(struct dc *dc,</div><div class='add'>+	struct pg_block_update *update_state)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+	struct pg_cntl *pg_cntl = dc-&gt;res_pool-&gt;pg_cntl;</div><div class='add'>+</div><div class='add'>+	if (!pg_cntl || dc-&gt;debug.ignore_pg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = dc-&gt;res_pool-&gt;pipe_count - 1; i &gt;= 0; i--) {</div><div class='add'>+		if (update_state-&gt;pg_pipe_res_update[PG_DSC][i]) {</div><div class='add'>+			if (pg_cntl-&gt;funcs-&gt;dsc_pg_control)</div><div class='add'>+				pg_cntl-&gt;funcs-&gt;dsc_pg_control(pg_cntl, i, false);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (update_state-&gt;pg_pipe_res_update[PG_HUBP][i] &amp;&amp;</div><div class='add'>+			update_state-&gt;pg_pipe_res_update[PG_DPP][i]) {</div><div class='add'>+			if (pg_cntl-&gt;funcs-&gt;hubp_dpp_pg_control)</div><div class='add'>+				pg_cntl-&gt;funcs-&gt;hubp_dpp_pg_control(pg_cntl, i, false);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	// domain25 currently always on.</div><div class='add'>+</div><div class='add'>+	/* this will need all the clients to unregister optc interrupts, let dmubfw handle this */</div><div class='add'>+	if (pg_cntl-&gt;funcs-&gt;plane_otg_pg_control)</div><div class='add'>+		pg_cntl-&gt;funcs-&gt;plane_otg_pg_control(pg_cntl, false);</div><div class='add'>+</div><div class='add'>+	// domain23 currently always on.</div><div class='add'>+	// domain22 currently always on.</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dcn351_hw_block_power_up() - power up sequence</div><div class='add'>+ *</div><div class='add'>+ * The following sequence describes the ON-OFF (ONO) for power up:</div><div class='add'>+ *</div><div class='add'>+ *	ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED</div><div class='add'>+ *	ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit</div><div class='add'>+ *	ONO Region 2, DCPG 24: mpc opp optc dwb</div><div class='add'>+ *	ONO Region 3, DCPG 25: hpo - SKIPPED</div><div class='add'>+ *	ONO Region 4, DCPG 0: dchubp0, dpp0</div><div class='add'>+ *	ONO Region 5, DCPG 16: dsc0</div><div class='add'>+ *	ONO Region 6, DCPG 1: dchubp1, dpp1</div><div class='add'>+ *	ONO Region 7, DCPG 17: dsc1</div><div class='add'>+ *	ONO Region 8, DCPG 2: dchubp2, dpp2</div><div class='add'>+ *	ONO Region 9, DCPG 18: dsc2</div><div class='add'>+ *	ONO Region 10, DCPG 3: dchubp3, dpp3</div><div class='add'>+ *	ONO Region 11, DCPG 19: dsc3</div><div class='add'>+ *</div><div class='add'>+ * @dc: Current DC state</div><div class='add'>+ * @update_state: update PG sequence states for HW block</div><div class='add'>+ */</div><div class='add'>+void dcn351_hw_block_power_up(struct dc *dc,</div><div class='add'>+	struct pg_block_update *update_state)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+	struct pg_cntl *pg_cntl = dc-&gt;res_pool-&gt;pg_cntl;</div><div class='add'>+</div><div class='add'>+	if (!pg_cntl || dc-&gt;debug.ignore_pg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	// domain22 currently always on.</div><div class='add'>+	// domain23 currently always on.</div><div class='add'>+</div><div class='add'>+	/* this will need all the clients to unregister optc interrupts, let dmubfw handle this */</div><div class='add'>+	if (pg_cntl-&gt;funcs-&gt;plane_otg_pg_control)</div><div class='add'>+		pg_cntl-&gt;funcs-&gt;plane_otg_pg_control(pg_cntl, true);</div><div class='add'>+</div><div class='add'>+	// domain25 currently always on.</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+		if (update_state-&gt;pg_pipe_res_update[PG_HUBP][i] &amp;&amp;</div><div class='add'>+			update_state-&gt;pg_pipe_res_update[PG_DPP][i]) {</div><div class='add'>+			if (pg_cntl-&gt;funcs-&gt;hubp_dpp_pg_control)</div><div class='add'>+				pg_cntl-&gt;funcs-&gt;hubp_dpp_pg_control(pg_cntl, i, true);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (update_state-&gt;pg_pipe_res_update[PG_DSC][i]) {</div><div class='add'>+			if (pg_cntl-&gt;funcs-&gt;dsc_pg_control)</div><div class='add'>+				pg_cntl-&gt;funcs-&gt;dsc_pg_control(pg_cntl, i, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h<br/>index 3341ef71009b..6d8f3bfb668e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: MIT */</div><div class='ctx'> /*</div><div class='del'>- * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='ctx'>  * copy of this software and associated documentation files (the "Software"),</div><div class='hunk'>@@ -24,30 +24,18 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "core_types.h"</div><div class='del'>-#include "dcn35_dpp.h"</div><div class='del'>-#include "reg_helper.h"</div><div class='add'>+#ifndef __DC_HWSS_DCN351_H__</div><div class='add'>+#define __DC_HWSS_DCN351_H__</div><div class='ctx'> </div><div class='del'>-#define REG(reg) dpp-&gt;tf_regs-&gt;reg</div><div class='add'>+#include "hw_sequencer_private.h"</div><div class='ctx'> </div><div class='del'>-#define CTX dpp-&gt;base.ctx</div><div class='add'>+void dcn351_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,</div><div class='add'>+	struct pg_block_update *update_state);</div><div class='add'>+void dcn351_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,</div><div class='add'>+	struct pg_block_update *update_state);</div><div class='add'>+void dcn351_hw_block_power_up(struct dc *dc,</div><div class='add'>+	struct pg_block_update *update_state);</div><div class='add'>+void dcn351_hw_block_power_down(struct dc *dc,</div><div class='add'>+	struct pg_block_update *update_state);</div><div class='ctx'> </div><div class='del'>-#undef FN</div><div class='del'>-#define FN(reg_name, field_name)                                       \</div><div class='del'>-	((const struct dcn35_dpp_shift *)(dpp-&gt;tf_shift))-&gt;field_name, \</div><div class='del'>-	((const struct dcn35_dpp_mask *)(dpp-&gt;tf_mask))-&gt;field_name</div><div class='del'>-</div><div class='del'>-bool dpp35_construct(struct dcn3_dpp *dpp, struct dc_context *ctx,</div><div class='del'>-		     uint32_t inst, const struct dcn3_dpp_registers *tf_regs,</div><div class='del'>-		     const struct dcn35_dpp_shift *tf_shift,</div><div class='del'>-		     const struct dcn35_dpp_mask *tf_mask)</div><div class='del'>-{</div><div class='del'>-	return dpp32_construct(dpp, ctx, inst, tf_regs,</div><div class='del'>-			      (const struct dcn3_dpp_shift *)(tf_shift),</div><div class='del'>-			      (const struct dcn3_dpp_mask *)(tf_mask));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable)</div><div class='del'>-{</div><div class='del'>-	REG_UPDATE(DPP_CONTROL, DPP_FGCG_REP_DIS, !enable);</div><div class='del'>-}</div><div class='add'>+#endif /* __DC_HWSS_DCN351_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c<br/>index 670255c9bc82..a53092cd619b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include "dcn31/dcn31_hwseq.h"</div><div class='ctx'> #include "dcn32/dcn32_hwseq.h"</div><div class='ctx'> #include "dcn35/dcn35_hwseq.h"</div><div class='add'>+#include "dcn351/dcn351_hwseq.h"</div><div class='ctx'> </div><div class='ctx'> #include "dcn351_init.h"</div><div class='ctx'> </div><div class='hunk'>@@ -120,8 +121,6 @@ static const struct hw_sequencer_funcs dcn351_funcs = {</div><div class='ctx'> 	.hw_block_power_up = dcn35_hw_block_power_up,</div><div class='ctx'> 	.hw_block_power_down = dcn35_hw_block_power_down,</div><div class='ctx'> 	.root_clock_control = dcn35_root_clock_control,</div><div class='del'>-	.set_idle_state = dcn35_set_idle_state,</div><div class='del'>-	.get_idle_state = dcn35_get_idle_state</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct hwseq_private_funcs dcn351_private_funcs = {</div><div class='hunk'>@@ -147,6 +146,7 @@ static const struct hwseq_private_funcs dcn351_private_funcs = {</div><div class='ctx'> 	//.hubp_pg_control = dcn35_hubp_pg_control,</div><div class='ctx'> 	.enable_power_gating_plane = dcn35_enable_power_gating_plane,</div><div class='ctx'> 	.dpp_root_clock_control = dcn35_dpp_root_clock_control,</div><div class='add'>+	.dpstream_root_clock_control = dcn35_dpstream_root_clock_control,</div><div class='ctx'> 	.program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree,</div><div class='ctx'> 	.update_odm = dcn35_update_odm,</div><div class='ctx'> 	.set_hdr_multiplier = dcn10_set_hdr_multiplier,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h<br/>index f89f205e42a1..7c339e7e7117 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h</a></div><div class='hunk'>@@ -377,7 +377,10 @@ struct hw_sequencer_funcs {</div><div class='ctx'> 	/* Idle Optimization Related */</div><div class='ctx'> 	bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);</div><div class='ctx'> </div><div class='del'>-	bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,</div><div class='add'>+	bool (*does_plane_fit_in_mall)(struct dc *dc,</div><div class='add'>+			unsigned int pitch,</div><div class='add'>+			unsigned int height,</div><div class='add'>+			enum surface_pixel_format format,</div><div class='ctx'> 			struct dc_cursor_attributes *cursor_attr);</div><div class='ctx'> 	void (*commit_subvp_config)(struct dc *dc, struct dc_state *context);</div><div class='ctx'> 	void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context);</div><div class='hunk'>@@ -424,11 +427,10 @@ struct hw_sequencer_funcs {</div><div class='ctx'> 		struct pg_block_update *update_state);</div><div class='ctx'> 	void (*root_clock_control)(struct dc *dc,</div><div class='ctx'> 		struct pg_block_update *update_state, bool power_on);</div><div class='del'>-	void (*set_idle_state)(const struct dc *dc, bool allow_idle);</div><div class='del'>-	uint32_t (*get_idle_state)(const struct dc *dc);</div><div class='ctx'> 	bool (*is_pipe_topology_transition_seamless)(struct dc *dc,</div><div class='ctx'> 			const struct dc_state *cur_ctx,</div><div class='ctx'> 			const struct dc_state *new_ctx);</div><div class='add'>+	void (*set_long_vtotal)(struct pipe_ctx **pipe_ctx, int num_pipes, uint32_t v_total_min, uint32_t v_total_max);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void color_space_to_black_color(</div><div class='hunk'>@@ -478,9 +480,10 @@ void hwss_build_fast_sequence(struct dc *dc,</div><div class='ctx'> 		struct dc_dmub_cmd *dc_dmub_cmd,</div><div class='ctx'> 		unsigned int dmub_cmd_count,</div><div class='ctx'> 		struct block_sequence block_sequence[],</div><div class='del'>-		int *num_steps,</div><div class='add'>+		unsigned int *num_steps,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='del'>-		struct dc_stream_status *stream_status);</div><div class='add'>+		struct dc_stream_status *stream_status,</div><div class='add'>+		struct dc_state *context);</div><div class='ctx'> </div><div class='ctx'> void hwss_send_dmcub_cmd(union block_sequence_params *params);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h<br/>index 554cfab5ab24..341219cf4144 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h</a></div><div class='hunk'>@@ -120,6 +120,10 @@ struct hwseq_private_funcs {</div><div class='ctx'> 			struct dce_hwseq *hws,</div><div class='ctx'> 			unsigned int dpp_inst,</div><div class='ctx'> 			bool clock_on);</div><div class='add'>+	void (*dpstream_root_clock_control)(</div><div class='add'>+			struct dce_hwseq *hws,</div><div class='add'>+			unsigned int dpp_inst,</div><div class='add'>+			bool clock_on);</div><div class='ctx'> 	void (*dpp_pg_control)(struct dce_hwseq *hws,</div><div class='ctx'> 			unsigned int dpp_inst,</div><div class='ctx'> 			bool power_on);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h<br/>index b1b72e688f74..028b2f971e36 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/core_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/core_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/core_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/core_types.h</a></div><div class='hunk'>@@ -90,6 +90,9 @@ struct resource_funcs {</div><div class='ctx'> 	void (*update_soc_for_wm_a)(</div><div class='ctx'> 				struct dc *dc, struct dc_state *context);</div><div class='ctx'> </div><div class='add'>+	unsigned int (*calculate_mall_ways_from_bytes)(</div><div class='add'>+				const struct dc *dc,</div><div class='add'>+				unsigned int total_size_in_mall_bytes);</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * @populate_dml_pipes - Populate pipe data struct</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -336,7 +339,9 @@ struct stream_resource {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct plane_resource {</div><div class='add'>+	/* scl_data is scratch space required to program a plane */</div><div class='ctx'> 	struct scaler_data scl_data;</div><div class='add'>+	/* Below pointers to hw objects are required to enable the plane */</div><div class='ctx'> 	struct hubp *hubp;</div><div class='ctx'> 	struct mem_input *mi;</div><div class='ctx'> 	struct input_pixel_processor *ipp;</div><div class='hunk'>@@ -496,7 +501,7 @@ struct dcn_bw_writeback {</div><div class='ctx'> </div><div class='ctx'> struct dcn_bw_output {</div><div class='ctx'> 	struct dc_clocks clk;</div><div class='del'>-	struct dcn_watermark_set watermarks;</div><div class='add'>+	union dcn_watermark_set watermarks;</div><div class='ctx'> 	struct dcn_bw_writeback bw_writeback;</div><div class='ctx'> 	int compbuf_size_kb;</div><div class='ctx'> 	unsigned int mall_ss_size_bytes;</div><div class='hunk'>@@ -515,6 +520,7 @@ struct bw_context {</div><div class='ctx'> 	union bw_output bw;</div><div class='ctx'> 	struct display_mode_lib dml;</div><div class='ctx'> 	struct dml2_context *dml2;</div><div class='add'>+	struct dml2_context *dml2_dc_power_source;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dc_dmub_cmd {</div><div class='hunk'>@@ -522,25 +528,6 @@ struct dc_dmub_cmd {</div><div class='ctx'> 	enum dm_dmub_wait_type wait_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct dc_scratch_space {</div><div class='del'>-	/* used to temporarily backup plane states of a stream during</div><div class='del'>-	 * dc update. The reason is that plane states are overwritten</div><div class='del'>-	 * with surface updates in dc update. Once they are overwritten</div><div class='del'>-	 * current state is no longer valid. We want to temporarily</div><div class='del'>-	 * store current value in plane states so we can still recover</div><div class='del'>-	 * a valid current state during dc update.</div><div class='del'>-	 */</div><div class='del'>-	struct dc_plane_state plane_states[MAX_SURFACE_NUM];</div><div class='del'>-	struct dc_gamma gamma_correction[MAX_SURFACE_NUM];</div><div class='del'>-	struct dc_transfer_func in_transfer_func[MAX_SURFACE_NUM];</div><div class='del'>-	struct dc_3dlut lut3d_func[MAX_SURFACE_NUM];</div><div class='del'>-	struct dc_transfer_func in_shaper_func[MAX_SURFACE_NUM];</div><div class='del'>-	struct dc_transfer_func blend_tf[MAX_SURFACE_NUM];</div><div class='del'>-</div><div class='del'>-	struct dc_stream_state stream_state;</div><div class='del'>-	struct dc_transfer_func out_transfer_func;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct dc_state - The full description of a state requested by users</div><div class='ctx'>  */</div><div class='hunk'>@@ -623,8 +610,7 @@ struct dc_state {</div><div class='ctx'> 		unsigned int stutter_period_us;</div><div class='ctx'> 	} perf_params;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	struct dc_scratch_space scratch;</div><div class='add'>+	enum dc_power_source_type power_source;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct replay_context {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h b/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h<br/>index 9e4ddc985240..55529c5f471c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> #define __DCN_CALCS_H__</div><div class='ctx'> </div><div class='ctx'> #include "bw_fixed.h"</div><div class='del'>-#include "../dml/display_mode_lib.h"</div><div class='add'>+#include "dml/display_mode_lib.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> struct dc;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h<br/>index 17e014d3bdc8..4f7480f60c85 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h</a></div><div class='hunk'>@@ -281,8 +281,6 @@ struct clk_mgr_funcs {</div><div class='ctx'> 	void (*set_low_power_state)(struct clk_mgr *clk_mgr);</div><div class='ctx'> 	void (*exit_low_power_state)(struct clk_mgr *clk_mgr);</div><div class='ctx'> 	bool (*is_ips_supported)(struct clk_mgr *clk_mgr);</div><div class='del'>-	void (*set_idle_state)(struct clk_mgr *clk_mgr, bool allow_idle);</div><div class='del'>-	uint32_t (*get_idle_state)(struct clk_mgr *clk_mgr);</div><div class='ctx'> </div><div class='ctx'> 	void (*init_clocks)(struct clk_mgr *clk_mgr);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h<br/>index f4d4a68c91dc..4ba18ea57aad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h</a></div><div class='hunk'>@@ -349,7 +349,7 @@ struct clk_mgr_internal {</div><div class='ctx'> 	enum dm_pp_clocks_state cur_min_clks_state;</div><div class='ctx'> 	bool periodic_retraining_disabled;</div><div class='ctx'> </div><div class='del'>-	unsigned int cur_phyclk_req_table[MAX_PIPES * 2];</div><div class='add'>+	unsigned int cur_phyclk_req_table[MAX_LINKS];</div><div class='ctx'> </div><div class='ctx'> 	bool smu_present;</div><div class='ctx'> 	void *wm_range_table;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h<br/>index b9a06bf84cc9..d4c7885fc916 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h</a></div><div class='hunk'>@@ -59,6 +59,7 @@ enum dentist_dispclk_change_mode {</div><div class='ctx'> struct dp_dto_params {</div><div class='ctx'> 	int otg_inst;</div><div class='ctx'> 	enum signal_type signal;</div><div class='add'>+	enum streamclk_source clk_src;</div><div class='ctx'> 	uint64_t pixclk_hz;</div><div class='ctx'> 	uint64_t refclk_hz;</div><div class='ctx'> };</div><div class='hunk'>@@ -105,6 +106,10 @@ struct dccg_funcs {</div><div class='ctx'> 	void (*otg_drop_pixel)(struct dccg *dccg,</div><div class='ctx'> 			uint32_t otg_inst);</div><div class='ctx'> 	void (*dccg_init)(struct dccg *dccg);</div><div class='add'>+	void (*set_dpstreamclk_root_clock_gating)(</div><div class='add'>+			struct dccg *dccg,</div><div class='add'>+			int dp_hpo_inst,</div><div class='add'>+			bool enable);</div><div class='ctx'> </div><div class='ctx'> 	void (*set_dpstreamclk)(</div><div class='ctx'> 			struct dccg *dccg,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h<br/>index 2ae7484d18af..305fdc127bfc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h</a></div><div class='hunk'>@@ -160,7 +160,7 @@ struct hubbub_funcs {</div><div class='ctx'> </div><div class='ctx'> 	bool (*program_watermarks)(</div><div class='ctx'> 			struct hubbub *hubbub,</div><div class='del'>-			struct dcn_watermark_set *watermarks,</div><div class='add'>+			union dcn_watermark_set *watermarks,</div><div class='ctx'> 			unsigned int refclk_mhz,</div><div class='ctx'> 			bool safe_to_lower);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h<br/>index 0f24afbf4388..ca8de345d039 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h</a></div><div class='hunk'>@@ -322,7 +322,7 @@ struct dpp_funcs {</div><div class='ctx'> 			const struct pwl_params *params);</div><div class='ctx'> 	bool (*dpp_program_3dlut)(</div><div class='ctx'> 			struct dpp *dpp,</div><div class='del'>-			struct tetrahedral_params *params);</div><div class='add'>+			const struct tetrahedral_params *params);</div><div class='ctx'> 	void (*dpp_cnv_set_alpha_keyer)(</div><div class='ctx'> 			struct dpp *dpp_base,</div><div class='ctx'> 			struct cnv_color_keyer_params *color_keyer);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h<br/>index 729ca0064e94..063efc8128a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h</a></div><div class='hunk'>@@ -147,9 +147,10 @@ struct dwb_caps {</div><div class='ctx'> 		unsigned int support_ogam	:1;</div><div class='ctx'> 		unsigned int support_wbscl	:1;</div><div class='ctx'> 		unsigned int support_ocsc	:1;</div><div class='del'>-		unsigned int support_stereo :1;</div><div class='add'>+		unsigned int support_stereo	:1;</div><div class='add'>+		unsigned int support_4k_120p	:1;</div><div class='ctx'> 	} caps;</div><div class='del'>-	unsigned int	 reserved2[9];	/* Reserved for future use, MUST BE 0. */</div><div class='add'>+	unsigned int	 reserved2[10];	/* Reserved for future use, MUST BE 0. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dwbc {</div><div class='hunk'>@@ -166,8 +167,9 @@ struct dwbc {</div><div class='ctx'> 	bool dwb_is_drc;</div><div class='ctx'> 	int wb_src_plane_inst;/*hubp, mpcc, inst*/</div><div class='ctx'> 	uint32_t mask_id;</div><div class='del'>-    int otg_inst;</div><div class='del'>-    bool mvc_cfg;</div><div class='add'>+	int otg_inst;</div><div class='add'>+	bool mvc_cfg;</div><div class='add'>+	struct dc_dwb_params params;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dwbc_funcs {</div><div class='hunk'>@@ -192,6 +194,10 @@ struct dwbc_funcs {</div><div class='ctx'> 		struct dwbc *dwbc,</div><div class='ctx'> 		enum dwb_frame_capture_enable enable);</div><div class='ctx'> </div><div class='add'>+	void (*dwb_set_scaler)(</div><div class='add'>+		struct dwbc *dwbc,</div><div class='add'>+		struct dc_dwb_params *params);</div><div class='add'>+</div><div class='ctx'> 	void (*set_stereo)(</div><div class='ctx'> 		struct dwbc *dwbc,</div><div class='ctx'> 		struct dwb_stereo_params *stereo_params);</div><div class='hunk'>@@ -205,9 +211,11 @@ struct dwbc_funcs {</div><div class='ctx'> 		struct dwbc *dwbc,</div><div class='ctx'> 		struct dwb_warmup_params *warmup_params);</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+	bool (*dwb_get_mcifbuf_line)(</div><div class='add'>+		struct dwbc *dwbc, unsigned int *buf_idx,</div><div class='add'>+		unsigned int *cur_line,</div><div class='add'>+		unsigned int *over_run);</div><div class='ctx'> #if defined(CONFIG_DRM_AMD_DC_FP)</div><div class='del'>-</div><div class='ctx'> 	void (*dwb_program_output_csc)(</div><div class='ctx'> 		struct dwbc *dwbc,</div><div class='ctx'> 		enum dc_color_space color_space,</div><div class='hunk'>@@ -216,17 +224,17 @@ struct dwbc_funcs {</div><div class='ctx'> 	bool (*dwb_ogam_set_output_transfer_func)(</div><div class='ctx'> 		struct dwbc *dwbc,</div><div class='ctx'> 		const struct dc_transfer_func *in_transfer_func_dwb_ogam);</div><div class='del'>-</div><div class='add'>+#endif</div><div class='ctx'> 	//TODO: merge with output_transfer_func?</div><div class='ctx'> 	bool (*dwb_ogam_set_input_transfer_func)(</div><div class='ctx'> 		struct dwbc *dwbc,</div><div class='ctx'> 		const struct dc_transfer_func *in_transfer_func_dwb_ogam);</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+	void (*get_drr_time_stamp)(</div><div class='add'>+		struct dwbc *dwbc, uint32_t *time_stamp);</div><div class='add'>+</div><div class='ctx'> 	bool (*get_dwb_status)(</div><div class='ctx'> 		struct dwbc *dwbc);</div><div class='del'>-	void (*dwb_set_scaler)(</div><div class='del'>-		struct dwbc *dwbc,</div><div class='del'>-		struct dc_dwb_params *params);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h<br/>index dcae23faeee3..c80ebb407add 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h</a></div><div class='hunk'>@@ -44,10 +44,11 @@</div><div class='ctx'>  */</div><div class='ctx'> #define MAX_PIPES 6</div><div class='ctx'> #define MAX_PHANTOM_PIPES (MAX_PIPES / 2)</div><div class='add'>+#define MAX_LINKS (MAX_PIPES * 2)</div><div class='ctx'> #define MAX_DIG_LINK_ENCODERS 7</div><div class='ctx'> #define MAX_DWB_PIPES	1</div><div class='ctx'> #define MAX_HPO_DP2_ENCODERS	4</div><div class='del'>-#define MAX_HPO_DP2_LINK_ENCODERS	2</div><div class='add'>+#define MAX_HPO_DP2_LINK_ENCODERS	4</div><div class='ctx'> </div><div class='ctx'> struct gamma_curve {</div><div class='ctx'> 	uint32_t offset;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h<br/>index dbe7afa9d3a2..af9183f5d69b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h</a></div><div class='hunk'>@@ -163,12 +163,11 @@ struct link_encoder_funcs {</div><div class='ctx'> </div><div class='ctx'> 	enum signal_type (*get_dig_mode)(</div><div class='ctx'> 		struct link_encoder *enc);</div><div class='add'>+</div><div class='ctx'> 	void (*set_dio_phy_mux)(</div><div class='ctx'> 		struct link_encoder *enc,</div><div class='ctx'> 		enum encoder_type_select sel,</div><div class='ctx'> 		uint32_t hpo_inst);</div><div class='del'>-	void (*set_dig_output_mode)(</div><div class='del'>-			struct link_encoder *enc, uint8_t pix_per_container);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h<br/>index b72fb314d804..86c12cd6f47d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h</a></div><div class='hunk'>@@ -50,11 +50,13 @@ struct dcn_watermarks {</div><div class='ctx'> 	uint32_t usr_retraining_ns;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct dcn_watermark_set {</div><div class='del'>-	struct dcn_watermarks a;</div><div class='del'>-	struct dcn_watermarks b;</div><div class='del'>-	struct dcn_watermarks c;</div><div class='del'>-	struct dcn_watermarks d;</div><div class='add'>+union dcn_watermark_set {</div><div class='add'>+	struct {</div><div class='add'>+		struct dcn_watermarks a;</div><div class='add'>+		struct dcn_watermarks b;</div><div class='add'>+		struct dcn_watermarks c;</div><div class='add'>+		struct dcn_watermarks d;</div><div class='add'>+	}; // legacy</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dce_watermarks {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h<br/>index 9a8bf6ec70ea..8d32e525f05a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/optc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/optc.h</a></div><div class='hunk'>@@ -93,6 +93,8 @@ struct dcn_otg_state {</div><div class='ctx'> 	uint32_t vertical_interrupt1_line;</div><div class='ctx'> 	uint32_t vertical_interrupt2_en;</div><div class='ctx'> 	uint32_t vertical_interrupt2_line;</div><div class='add'>+	uint32_t otg_master_update_lock;</div><div class='add'>+	uint32_t otg_double_buffer_control;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void optc1_read_otg_state(struct optc *optc1, struct dcn_otg_state *s);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h<br/>index a15efadb9183..75b9ec21f297 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h</a></div><div class='hunk'>@@ -178,10 +178,6 @@ struct stream_encoder_funcs {</div><div class='ctx'> 	void (*stop_dp_info_packets)(</div><div class='ctx'> 		struct stream_encoder *enc);</div><div class='ctx'> </div><div class='del'>-	void (*reset_fifo)(</div><div class='del'>-		struct stream_encoder *enc</div><div class='del'>-	);</div><div class='del'>-</div><div class='ctx'> 	void (*dp_blank)(</div><div class='ctx'> 		struct dc_link *link,</div><div class='ctx'> 		struct stream_encoder *enc);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h<br/>index ffad8fe16c54..cd68ecc242c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h</a></div><div class='hunk'>@@ -64,6 +64,12 @@ struct drr_params {</div><div class='ctx'> 	bool immediate_flip;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct long_vtotal_params {</div><div class='add'>+	uint32_t vertical_total_min;</div><div class='add'>+	uint32_t vertical_total_max;</div><div class='add'>+	uint32_t vertical_blank_start;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define LEFT_EYE_3D_PRIMARY_SURFACE 1</div><div class='ctx'> #define RIGHT_EYE_3D_PRIMARY_SURFACE 0</div><div class='ctx'> </div><div class='hunk'>@@ -331,6 +337,7 @@ struct timing_generator_funcs {</div><div class='ctx'> </div><div class='ctx'> 	void (*init_odm)(struct timing_generator *tg);</div><div class='ctx'> 	void (*wait_drr_doublebuffer_pending_clear)(struct timing_generator *tg);</div><div class='add'>+	void (*set_long_vtotal)(struct timing_generator *optc, const struct long_vtotal_params *params);</div><div class='ctx'> 	void (*wait_odm_doublebuffer_pending_clear)(struct timing_generator *tg);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h<br/>new file mode 100644<br/>index 000000000000..51da368f5c3e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: AMD</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DC_VPG_H__</div><div class='add'>+#define __DC_VPG_H__</div><div class='add'>+</div><div class='add'>+struct dc_context;</div><div class='add'>+struct dc_info_packet;</div><div class='add'>+</div><div class='add'>+struct vpg;</div><div class='add'>+</div><div class='add'>+struct vpg_funcs {</div><div class='add'>+	void (*update_generic_info_packet)(</div><div class='add'>+		struct vpg *vpg,</div><div class='add'>+		uint32_t packet_index,</div><div class='add'>+		const struct dc_info_packet *info_packet,</div><div class='add'>+		bool immediate_update);</div><div class='add'>+</div><div class='add'>+	void (*vpg_poweron)(</div><div class='add'>+		struct vpg *vpg);</div><div class='add'>+</div><div class='add'>+	void (*vpg_powerdown)(</div><div class='add'>+		struct vpg *vpg);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vpg {</div><div class='add'>+	const struct vpg_funcs *funcs;</div><div class='add'>+	struct dc_context *ctx;</div><div class='add'>+	int inst;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* DC_INC_VPG_H_ */
\ No newline at end of file</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h b/drivers/gpu/drm/amd/display/dc/inc/link.h<br/>index bf29fc58ea6a..7ab8ba5e23ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/link.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/link.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/link.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/link.h</a></div><div class='hunk'>@@ -288,7 +288,7 @@ struct link_service {</div><div class='ctx'> 			struct dc_link *link, uint32_t coasting_vtotal);</div><div class='ctx'> 	bool (*edp_replay_residency)(const struct dc_link *link,</div><div class='ctx'> 			unsigned int *residency, const bool is_start,</div><div class='del'>-			const bool is_alpm);</div><div class='add'>+			const enum pr_residency_mode mode);</div><div class='ctx'> 	bool (*edp_set_replay_power_opt_and_coasting_vtotal)(struct dc_link *link,</div><div class='ctx'> 			const unsigned int *power_opts, uint32_t coasting_vtotal);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h<br/>index 77a60aa9f27b..361ad6b16b96 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/resource.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/inc/resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/inc/resource.h</a></div><div class='hunk'>@@ -510,6 +510,17 @@ int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx(</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Look for a free pipe in new resource context that is used as a secondary DPP</div><div class='add'>+ * pipe in current resource context.</div><div class='add'>+ * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise</div><div class='add'>+ * pipe idx of the free pipe</div><div class='add'>+ */</div><div class='add'>+int resource_find_free_pipe_used_as_cur_sec_dpp(</div><div class='add'>+		const struct resource_context *cur_res_ctx,</div><div class='add'>+		struct resource_context *new_res_ctx,</div><div class='add'>+		const struct resource_pool *pool);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Look for a free pipe in new resource context that is used as a secondary DPP</div><div class='ctx'>  * pipe in any MPCC combine in current resource context.</div><div class='ctx'>  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise</div><div class='ctx'>  * pipe idx of the free pipe</div><div class='hunk'>@@ -573,13 +584,6 @@ bool get_temp_dp_link_res(struct dc_link *link,</div><div class='ctx'> 		struct link_resource *link_res,</div><div class='ctx'> 		struct dc_link_settings *link_settings);</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_DRM_AMD_DC_FP)</div><div class='del'>-struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt(</div><div class='del'>-		const struct resource_context *res_ctx,</div><div class='del'>-		const struct resource_pool *pool,</div><div class='del'>-		const struct dc_link *link);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,</div><div class='ctx'> 	struct dc_state *context);</div><div class='ctx'> </div><div class='hunk'>@@ -615,4 +619,10 @@ enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx);</div><div class='ctx'> </div><div class='ctx'> bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_state *stream);</div><div class='add'>+</div><div class='add'>+/* Setup dc callbacks for dml2</div><div class='add'>+ * @dc: the display core structure</div><div class='add'>+ * @dml2_options: struct to hold callbacks</div><div class='add'>+ */</div><div class='add'>+void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options);</div><div class='ctx'> #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c b/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c<br/>index 1c0d89e675da..bb576a9c5fdb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c</a></div><div class='hunk'>@@ -211,8 +211,12 @@ bool dce110_vblank_set(struct irq_service *irq_service,</div><div class='ctx'> 						   info-&gt;ext_id);</div><div class='ctx'> 	uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK;</div><div class='ctx'> </div><div class='del'>-	struct timing_generator *tg =</div><div class='del'>-			dc-&gt;current_state-&gt;res_ctx.pipe_ctx[pipe_offset].stream_res.tg;</div><div class='add'>+	struct timing_generator *tg;</div><div class='add'>+</div><div class='add'>+	if (pipe_offset &gt;= MAX_PIPES)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	tg = dc-&gt;current_state-&gt;res_ctx.pipe_ctx[pipe_offset].stream_res.tg;</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		if (!tg || !tg-&gt;funcs-&gt;arm_vert_intr(tg, 2)) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c<br/>index 22b24749c9d2..8d1a1cc94a8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c</a></div><div class='hunk'>@@ -884,7 +884,7 @@ void dp_set_preferred_link_settings(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct pipe_ctx *pipe;</div><div class='del'>-	struct dc_stream_state *link_stream;</div><div class='add'>+	struct dc_stream_state *link_stream = 0;</div><div class='ctx'> 	struct dc_link_settings store_settings = *link_setting;</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;preferred_link_setting = store_settings;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c<br/>index fbcd8fb58ea8..c8c55f196f8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c</a></div><div class='hunk'>@@ -24,7 +24,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #include "link_dp_trace.h"</div><div class='ctx'> #include "link/protocols/link_dpcd.h"</div><div class='del'>-#include "link.h"</div><div class='ctx'> </div><div class='ctx'> void dp_trace_init(struct dc_link *link)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c<br/>index b8c4a04dd175..0d523dc43d02 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_detection.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/link_detection.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_detection.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/link_detection.c</a></div><div class='hunk'>@@ -516,8 +516,8 @@ static void query_hdcp_capability(enum signal_type signal, struct dc_link *link)</div><div class='ctx'> static void read_current_link_settings_on_detect(struct dc_link *link)</div><div class='ctx'> {</div><div class='ctx'> 	union lane_count_set lane_count_set = {0};</div><div class='del'>-	uint8_t link_bw_set;</div><div class='del'>-	uint8_t link_rate_set;</div><div class='add'>+	uint8_t link_bw_set = 0;</div><div class='add'>+	uint8_t link_rate_set = 0;</div><div class='ctx'> 	uint32_t read_dpcd_retry_cnt = 10;</div><div class='ctx'> 	enum dc_status status = DC_ERROR_UNEXPECTED;</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c<br/>index a72de44a5747..b53ad18dbfbc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_dpms.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/link_dpms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_dpms.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/link_dpms.c</a></div><div class='hunk'>@@ -55,6 +55,8 @@</div><div class='ctx'> #include "dccg.h"</div><div class='ctx'> #include "clk_mgr.h"</div><div class='ctx'> #include "atomfirmware.h"</div><div class='add'>+#include "vpg.h"</div><div class='add'>+</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	dc_logger</div><div class='ctx'> #define DC_LOGGER_INIT(logger) \</div><div class='hunk'>@@ -67,7 +69,6 @@</div><div class='ctx'> #define RETIMER_REDRIVER_INFO(...) \</div><div class='ctx'> 	DC_LOG_RETIMER_REDRIVER(  \</div><div class='ctx'> 		__VA_ARGS__)</div><div class='del'>-#include "dc/dcn30/dcn30_vpg.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_MTP_SLOT_COUNT 64</div><div class='ctx'> #define LINK_TRAINING_ATTEMPTS 4</div><div class='hunk'>@@ -127,7 +128,7 @@ void link_blank_dp_stream(struct dc_link *link, bool hw_init)</div><div class='ctx'> 		if (link-&gt;ep_type == DISPLAY_ENDPOINT_PHY &amp;&amp;</div><div class='ctx'> 			link-&gt;link_enc-&gt;funcs-&gt;get_dig_frontend &amp;&amp;</div><div class='ctx'> 			link-&gt;link_enc-&gt;funcs-&gt;is_dig_enabled(link-&gt;link_enc)) {</div><div class='del'>-			unsigned int fe = link-&gt;link_enc-&gt;funcs-&gt;get_dig_frontend(link-&gt;link_enc);</div><div class='add'>+			int fe = link-&gt;link_enc-&gt;funcs-&gt;get_dig_frontend(link-&gt;link_enc);</div><div class='ctx'> </div><div class='ctx'> 			if (fe != ENGINE_ID_UNKNOWN)</div><div class='ctx'> 				for (j = 0; j &lt; dc-&gt;res_pool-&gt;stream_enc_count; j++) {</div><div class='hunk'>@@ -725,7 +726,7 @@ static void set_avmute(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> </div><div class='ctx'> static void enable_mst_on_sink(struct dc_link *link, bool enable)</div><div class='ctx'> {</div><div class='del'>-	unsigned char mstmCntl;</div><div class='add'>+	unsigned char mstmCntl = 0;</div><div class='ctx'> </div><div class='ctx'> 	core_link_read_dpcd(link, DP_MSTM_CTRL, &amp;mstmCntl, 1);</div><div class='ctx'> 	if (enable)</div><div class='hunk'>@@ -803,7 +804,7 @@ void link_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		struct dsc_config dsc_cfg;</div><div class='del'>-		struct dsc_optc_config dsc_optc_cfg;</div><div class='add'>+		struct dsc_optc_config dsc_optc_cfg = {0};</div><div class='ctx'> 		enum optc_dsc_mode optc_dsc_mode;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable DSC hw block */</div><div class='hunk'>@@ -1575,7 +1576,7 @@ static bool write_128b_132b_sst_payload_allocation_table(</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			union dpcd_rev dpcdRev;</div><div class='add'>+			union dpcd_rev dpcdRev = {0};</div><div class='ctx'> </div><div class='ctx'> 			if (core_link_read_dpcd(</div><div class='ctx'> 					link,</div><div class='hunk'>@@ -2119,7 +2120,7 @@ static enum dc_status enable_link_dp_mst(</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_link *link = pipe_ctx-&gt;stream-&gt;link;</div><div class='del'>-	unsigned char mstm_cntl;</div><div class='add'>+	unsigned char mstm_cntl = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* sink signal type after MST branch is MST. Multiple MST sinks</div><div class='ctx'> 	 * share one link. Link DP PHY is enable or training only once.</div><div class='hunk'>@@ -2285,6 +2286,7 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	struct dc_stream_state *stream = pipe_ctx-&gt;stream;</div><div class='ctx'> 	struct dc_link *link = stream-&gt;sink-&gt;link;</div><div class='ctx'> 	struct vpg *vpg = pipe_ctx-&gt;stream_res.stream_enc-&gt;vpg;</div><div class='add'>+	enum dp_panel_mode panel_mode_dp = dp_get_panel_mode(link);</div><div class='ctx'> </div><div class='ctx'> 	DC_LOGGER_INIT(pipe_ctx-&gt;stream-&gt;ctx-&gt;logger);</div><div class='ctx'> </div><div class='hunk'>@@ -2311,6 +2313,8 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> </div><div class='ctx'> 	dc-&gt;hwss.disable_audio_stream(pipe_ctx);</div><div class='ctx'> </div><div class='add'>+	edp_set_panel_assr(link, pipe_ctx, &amp;panel_mode_dp, false);</div><div class='add'>+</div><div class='ctx'> 	update_psp_stream_config(pipe_ctx, true);</div><div class='ctx'> 	dc-&gt;hwss.blank_stream(pipe_ctx);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c<br/>index 289f5d133342..a01d0842bf8e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c</a></div><div class='hunk'>@@ -992,7 +992,7 @@ enum dp_link_encoding mst_decide_link_encoding_format(const struct dc_link *link</div><div class='ctx'> </div><div class='ctx'> static void read_dp_device_vendor_id(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	struct dp_device_vendor_id dp_id;</div><div class='add'>+	struct dp_device_vendor_id dp_id = {0};</div><div class='ctx'> </div><div class='ctx'> 	/* read IEEE branch device id */</div><div class='ctx'> 	core_link_read_dpcd(</div><div class='hunk'>@@ -1087,7 +1087,7 @@ static void get_active_converter_info(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (link-&gt;dpcd_caps.dpcd_rev.raw &gt;= DPCD_REV_11) {</div><div class='del'>-		uint8_t det_caps[16]; /* CTS 4.2.2.7 expects source to read Detailed Capabilities Info : 00080h-0008F.*/</div><div class='add'>+		uint8_t det_caps[16] = {0}; /* CTS 4.2.2.7 expects source to read Detailed Capabilities Info : 00080h-0008F.*/</div><div class='ctx'> 		union dwnstream_port_caps_byte0 *port_caps =</div><div class='ctx'> 			(union dwnstream_port_caps_byte0 *)det_caps;</div><div class='ctx'> 		if (core_link_read_dpcd(link, DP_DOWNSTREAM_PORT_0,</div><div class='hunk'>@@ -1172,7 +1172,7 @@ static void get_active_converter_info(</div><div class='ctx'> 	set_dongle_type(link-&gt;ddc, link-&gt;dpcd_caps.dongle_type);</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='del'>-		struct dp_sink_hw_fw_revision dp_hw_fw_revision;</div><div class='add'>+		struct dp_sink_hw_fw_revision dp_hw_fw_revision = {0};</div><div class='ctx'> </div><div class='ctx'> 		core_link_read_dpcd(</div><div class='ctx'> 			link,</div><div class='hunk'>@@ -1242,7 +1242,7 @@ static void apply_usbc_combo_phy_reset_wa(struct dc_link *link,</div><div class='ctx'> </div><div class='ctx'> bool dp_overwrite_extended_receiver_cap(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	uint8_t dpcd_data[16];</div><div class='add'>+	uint8_t dpcd_data[16] = {0};</div><div class='ctx'> 	uint32_t read_dpcd_retry_cnt = 3;</div><div class='ctx'> 	enum dc_status status = DC_ERROR_UNEXPECTED;</div><div class='ctx'> 	union dp_downstream_port_present ds_port = { 0 };</div><div class='hunk'>@@ -1408,7 +1408,7 @@ static bool get_usbc_cable_id(struct dc_link *link, union dp_cable_id *cable_id)</div><div class='ctx'> </div><div class='ctx'> static void retrieve_cable_id(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	union dp_cable_id usbc_cable_id;</div><div class='add'>+	union dp_cable_id usbc_cable_id = {0};</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;dpcd_caps.cable_id.raw = 0;</div><div class='ctx'> 	core_link_read_dpcd(link, DP_CABLE_ATTRIBUTES_UPDATED_BY_DPRX,</div><div class='hunk'>@@ -1475,7 +1475,7 @@ static bool dpcd_read_sink_ext_caps(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	uint8_t lttpr_dpcd_data[8];</div><div class='add'>+	uint8_t lttpr_dpcd_data[8] = {0};</div><div class='ctx'> 	enum dc_status status;</div><div class='ctx'> 	bool is_lttpr_present;</div><div class='ctx'> </div><div class='hunk'>@@ -1931,8 +1931,8 @@ void detect_edp_sink_caps(struct dc_link *link)</div><div class='ctx'> 	uint32_t entry;</div><div class='ctx'> 	uint32_t link_rate_in_khz;</div><div class='ctx'> 	enum dc_link_rate link_rate = LINK_RATE_UNKNOWN;</div><div class='del'>-	uint8_t backlight_adj_cap;</div><div class='del'>-	uint8_t general_edp_cap;</div><div class='add'>+	uint8_t backlight_adj_cap = 0;</div><div class='add'>+	uint8_t general_edp_cap = 0;</div><div class='ctx'> </div><div class='ctx'> 	retrieve_link_cap(link);</div><div class='ctx'> 	link-&gt;dpcd_caps.edp_supported_link_rates_count = 0;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c<br/>index 5491b707cec8..0f1c411523a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c</a></div><div class='hunk'>@@ -166,7 +166,7 @@ static uint8_t get_lowest_dpia_index(struct dc_link *link)</div><div class='ctx'> 	uint8_t idx = 0xFF;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_PIPES * 2; ++i) {</div><div class='add'>+	for (i = 0; i &lt; MAX_LINKS; ++i) {</div><div class='ctx'> </div><div class='ctx'> 		if (!dc_struct-&gt;links[i] ||</div><div class='ctx'> 				dc_struct-&gt;links[i]-&gt;ep_type != DISPLAY_ENDPOINT_USB4_DPIA)</div><div class='hunk'>@@ -196,7 +196,7 @@ static int get_host_router_total_dp_tunnel_bw(const struct dc *dc, uint8_t hr_in</div><div class='ctx'> 	struct dc_link *link_dpia_primary, *link_dpia_secondary;</div><div class='ctx'> 	int total_bw = 0;</div><div class='ctx'> </div><div class='del'>-	for (uint8_t i = 0; i &lt; (MAX_PIPES * 2) - 1; ++i) {</div><div class='add'>+	for (uint8_t i = 0; i &lt; MAX_LINKS - 1; ++i) {</div><div class='ctx'> </div><div class='ctx'> 		if (!dc-&gt;links[i] || dc-&gt;links[i]-&gt;ep_type != DISPLAY_ENDPOINT_USB4_DPIA)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -270,7 +270,7 @@ static void set_usb4_req_bw_req(struct dc_link *link, int req_bw)</div><div class='ctx'> </div><div class='ctx'> 	/* Error check whether requested and allocated are equal */</div><div class='ctx'> 	req_bw = requested_bw * (Kbps_TO_Gbps / link-&gt;dpia_bw_alloc_config.bw_granularity);</div><div class='del'>-	if (req_bw == link-&gt;dpia_bw_alloc_config.allocated_bw) {</div><div class='add'>+	if (req_bw &amp;&amp; (req_bw == link-&gt;dpia_bw_alloc_config.allocated_bw)) {</div><div class='ctx'> 		DC_LOG_ERROR("%s: Request bw equals to allocated bw for link(%d)\n",</div><div class='ctx'> 			__func__, link-&gt;link_index);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -341,6 +341,14 @@ bool link_dp_dpia_set_dptx_usb4_bw_alloc_support(struct dc_link *link)</div><div class='ctx'> 			ret = true;</div><div class='ctx'> 			init_usb4_bw_struct(link);</div><div class='ctx'> 			link-&gt;dpia_bw_alloc_config.bw_alloc_enabled = true;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * During DP tunnel creation, CM preallocates BW and reduces estimated BW of other</div><div class='add'>+			 * DPIA. CM release preallocation only when allocation is complete. Do zero alloc</div><div class='add'>+			 * to make the CM to release preallocation and update estimated BW correctly for</div><div class='add'>+			 * all DPIAs per host router</div><div class='add'>+			 */</div><div class='add'>+			link_dp_dpia_allocate_usb4_bandwidth_for_stream(link, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c<br/>index ba69874be5a4..0fcf0b8530ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c</a></div><div class='hunk'>@@ -120,7 +120,7 @@ bool dp_parse_link_loss_status(</div><div class='ctx'> </div><div class='ctx'> static bool handle_hpd_irq_psr_sink(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	union dpcd_psr_configuration psr_configuration;</div><div class='add'>+	union dpcd_psr_configuration psr_configuration = {0};</div><div class='ctx'> </div><div class='ctx'> 	if (!link-&gt;psr_settings.psr_feature_enabled)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -186,9 +186,9 @@ static bool handle_hpd_irq_psr_sink(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> static void handle_hpd_irq_replay_sink(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	union dpcd_replay_configuration replay_configuration;</div><div class='add'>+	union dpcd_replay_configuration replay_configuration = {0};</div><div class='ctx'> 	/*AMD Replay version reuse DP_PSR_ERROR_STATUS for REPLAY_ERROR status.*/</div><div class='del'>-	union psr_error_status replay_error_status;</div><div class='add'>+	union psr_error_status replay_error_status = {0};</div><div class='ctx'> </div><div class='ctx'> 	if (!link-&gt;replay_settings.replay_feature_enabled)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -280,7 +280,7 @@ void dp_handle_link_loss(struct dc_link *link)</div><div class='ctx'> static void read_dpcd204h_on_irq_hpd(struct dc_link *link, union hpd_irq_data *irq_data)</div><div class='ctx'> {</div><div class='ctx'> 	enum dc_status retval;</div><div class='del'>-	union lane_align_status_updated dpcd_lane_status_updated;</div><div class='add'>+	union lane_align_status_updated dpcd_lane_status_updated = {0};</div><div class='ctx'> </div><div class='ctx'> 	retval = core_link_read_dpcd(</div><div class='ctx'> 			link,</div><div class='hunk'>@@ -320,7 +320,7 @@ enum dc_status dp_read_hpd_rx_irq_data(</div><div class='ctx'> 		/* Read 14 bytes in a single read and then copy only the required fields.</div><div class='ctx'> 		 * This is more efficient than doing it in two separate AUX reads. */</div><div class='ctx'> </div><div class='del'>-		uint8_t tmp[DP_SINK_STATUS_ESI - DP_SINK_COUNT_ESI + 1];</div><div class='add'>+		uint8_t tmp[DP_SINK_STATUS_ESI - DP_SINK_COUNT_ESI + 1] = {0};</div><div class='ctx'> </div><div class='ctx'> 		retval = core_link_read_dpcd(</div><div class='ctx'> 			link,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c<br/>index e538c67d3ed9..1818970b8eaf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c</a></div><div class='hunk'>@@ -1071,7 +1071,7 @@ enum dc_status dpcd_set_link_settings(</div><div class='ctx'> 		 * MUX chip gets link rate set back before link training.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (link-&gt;connector_signal == SIGNAL_TYPE_EDP) {</div><div class='del'>-			uint8_t supported_link_rates[16];</div><div class='add'>+			uint8_t supported_link_rates[16] = {0};</div><div class='ctx'> </div><div class='ctx'> 			core_link_read_dpcd(link, DP_SUPPORTED_LINK_RATES,</div><div class='ctx'> 					supported_link_rates, sizeof(supported_link_rates));</div><div class='hunk'>@@ -1587,21 +1587,7 @@ bool perform_link_training_with_retries(</div><div class='ctx'> 			msleep(delay_dp_power_up_in_ms);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (panel_mode == DP_PANEL_MODE_EDP) {</div><div class='del'>-			struct cp_psp *cp_psp = &amp;stream-&gt;ctx-&gt;cp_psp;</div><div class='del'>-</div><div class='del'>-			if (cp_psp &amp;&amp; cp_psp-&gt;funcs.enable_assr) {</div><div class='del'>-				/* ASSR is bound to fail with unsigned PSP</div><div class='del'>-				 * verstage used during devlopment phase.</div><div class='del'>-				 * Report and continue with eDP panel mode to</div><div class='del'>-				 * perform eDP link training with right settings</div><div class='del'>-				 */</div><div class='del'>-				bool result;</div><div class='del'>-				result = cp_psp-&gt;funcs.enable_assr(cp_psp-&gt;handle, link);</div><div class='del'>-				if (!result &amp;&amp; link-&gt;panel_mode != DP_PANEL_MODE_EDP)</div><div class='del'>-					panel_mode = DP_PANEL_MODE_DEFAULT;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		edp_set_panel_assr(link, pipe_ctx, &amp;panel_mode, true);</div><div class='ctx'> </div><div class='ctx'> 		dp_set_panel_mode(link, panel_mode);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c<br/>index 5d36bab0029c..edb21d21952a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c</a></div><div class='hunk'>@@ -291,7 +291,7 @@ static enum link_training_result dpia_training_cr_non_transparent(</div><div class='ctx'> {</div><div class='ctx'> 	enum link_training_result result = LINK_TRAINING_CR_FAIL_LANE0;</div><div class='ctx'> 	uint8_t repeater_cnt = 0; /* Number of hops/repeaters in display path. */</div><div class='del'>-	enum dc_status status;</div><div class='add'>+	enum dc_status status = DC_ERROR_UNEXPECTED;</div><div class='ctx'> 	uint32_t retries_cr = 0; /* Number of consecutive attempts with same VS or PE. */</div><div class='ctx'> 	uint32_t retry_count = 0;</div><div class='ctx'> 	uint32_t wait_time_microsec = TRAINING_AUX_RD_INTERVAL; /* From DP spec, CR read interval is always 100us. */</div><div class='hunk'>@@ -617,7 +617,7 @@ static enum link_training_result dpia_training_eq_non_transparent(</div><div class='ctx'> 	enum link_training_result result = LINK_TRAINING_EQ_FAIL_EQ;</div><div class='ctx'> 	uint8_t repeater_cnt = 0; /* Number of hops/repeaters in display path. */</div><div class='ctx'> 	uint32_t retries_eq = 0;</div><div class='del'>-	enum dc_status status;</div><div class='add'>+	enum dc_status status = DC_ERROR_UNEXPECTED;</div><div class='ctx'> 	enum dc_dp_training_pattern tr_pattern;</div><div class='ctx'> 	uint32_t wait_time_microsec = 0;</div><div class='ctx'> 	enum dc_lane_count lane_count = lt_settings-&gt;link_settings.lane_count;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c<br/>index c5de6ed5bf58..a72c898b64fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c</a></div><div class='hunk'>@@ -130,7 +130,7 @@ static uint32_t dpcd_get_next_partition_size(const uint32_t address, const uint3</div><div class='ctx'>  * XXX: Do not allow any two address ranges in this array to overlap</div><div class='ctx'>  */</div><div class='ctx'> static const struct dpcd_address_range mandatory_dpcd_blocks[] = {</div><div class='del'>-	{ DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV, DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT }};</div><div class='add'>+	{ DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV, DP_PHY_REPEATER_128B132B_RATES }};</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * extend addresses to read all mandatory blocks together</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c<br/>index 3baa2bdd6dd6..ad9aca790dd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include "dc/dc_dmub_srv.h"</div><div class='ctx'> #include "dce/dmub_replay.h"</div><div class='ctx'> #include "abm.h"</div><div class='add'>+#include "resource.h"</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	link-&gt;ctx-&gt;logger</div><div class='ctx'> #define DC_LOGGER_INIT(logger)</div><div class='hunk'>@@ -320,8 +321,8 @@ bool edp_is_ilr_optimization_required(struct dc_link *link,</div><div class='ctx'> 		struct dc_crtc_timing *crtc_timing)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_link_settings link_setting;</div><div class='del'>-	uint8_t link_bw_set;</div><div class='del'>-	uint8_t link_rate_set;</div><div class='add'>+	uint8_t link_bw_set = 0;</div><div class='add'>+	uint8_t link_rate_set = 0;</div><div class='ctx'> 	uint32_t req_bw;</div><div class='ctx'> 	union lane_count_set lane_count_set = {0};</div><div class='ctx'> </div><div class='hunk'>@@ -1055,7 +1056,7 @@ bool edp_set_coasting_vtotal(struct dc_link *link, uint32_t coasting_vtotal)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool edp_replay_residency(const struct dc_link *link,</div><div class='del'>-	unsigned int *residency, const bool is_start, const bool is_alpm)</div><div class='add'>+	unsigned int *residency, const bool is_start, const enum pr_residency_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc  *dc = link-&gt;ctx-&gt;dc;</div><div class='ctx'> 	struct dmub_replay *replay = dc-&gt;res_pool-&gt;replay;</div><div class='hunk'>@@ -1064,8 +1065,11 @@ bool edp_replay_residency(const struct dc_link *link,</div><div class='ctx'> 	if (!dc_get_edp_link_panel_inst(dc, link, &amp;panel_inst))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	if (!residency)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	if (replay != NULL &amp;&amp; link-&gt;replay_settings.replay_feature_enabled)</div><div class='del'>-		replay-&gt;funcs-&gt;replay_residency(replay, panel_inst, residency, is_start, is_alpm);</div><div class='add'>+		replay-&gt;funcs-&gt;replay_residency(replay, panel_inst, residency, is_start, mode);</div><div class='ctx'> 	else</div><div class='ctx'> 		*residency = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1145,3 +1149,66 @@ int edp_get_target_backlight_pwm(const struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> 	return (int) abm-&gt;funcs-&gt;get_target_backlight(abm);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void edp_set_assr_enable(const struct dc *pDC, struct dc_link *link,</div><div class='add'>+		struct link_resource *link_res, bool enable)</div><div class='add'>+{</div><div class='add'>+	union dmub_rb_cmd cmd;</div><div class='add'>+	bool use_hpo_dp_link_enc = false;</div><div class='add'>+	uint8_t link_enc_index = 0;</div><div class='add'>+	uint8_t phy_type = 0;</div><div class='add'>+	uint8_t phy_id = 0;</div><div class='add'>+</div><div class='add'>+	if (!pDC-&gt;config.use_assr_psp_message)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='add'>+</div><div class='add'>+	link_enc_index = link-&gt;link_enc-&gt;transmitter - TRANSMITTER_UNIPHY_A;</div><div class='add'>+</div><div class='add'>+	if (link_res-&gt;hpo_dp_link_enc) {</div><div class='add'>+		link_enc_index = link_res-&gt;hpo_dp_link_enc-&gt;inst;</div><div class='add'>+		use_hpo_dp_link_enc = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		phy_type = ((dp_get_panel_mode(link) == DP_PANEL_MODE_EDP) ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	phy_id = resource_transmitter_to_phy_idx(pDC, link-&gt;link_enc-&gt;transmitter);</div><div class='add'>+</div><div class='add'>+	cmd.assr_enable.header.type = DMUB_CMD__PSP;</div><div class='add'>+	cmd.assr_enable.header.sub_type = DMUB_CMD__PSP_ASSR_ENABLE;</div><div class='add'>+	cmd.assr_enable.assr_data.enable = enable;</div><div class='add'>+	cmd.assr_enable.assr_data.phy_port_type = phy_type;</div><div class='add'>+	cmd.assr_enable.assr_data.phy_port_id = phy_id;</div><div class='add'>+	cmd.assr_enable.assr_data.link_enc_index = link_enc_index;</div><div class='add'>+	cmd.assr_enable.assr_data.hpo_mode = use_hpo_dp_link_enc;</div><div class='add'>+</div><div class='add'>+	dc_wake_and_execute_dmub_cmd(pDC-&gt;ctx, &amp;cmd, DM_DMUB_WAIT_TYPE_WAIT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void edp_set_panel_assr(struct dc_link *link, struct pipe_ctx *pipe_ctx,</div><div class='add'>+		enum dp_panel_mode *panel_mode, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct link_resource *link_res = &amp;pipe_ctx-&gt;link_res;</div><div class='add'>+	struct cp_psp *cp_psp = &amp;pipe_ctx-&gt;stream-&gt;ctx-&gt;cp_psp;</div><div class='add'>+</div><div class='add'>+	if (*panel_mode != DP_PANEL_MODE_EDP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (link-&gt;dc-&gt;config.use_assr_psp_message) {</div><div class='add'>+		edp_set_assr_enable(link-&gt;dc, link, link_res, enable);</div><div class='add'>+	} else if (cp_psp &amp;&amp; cp_psp-&gt;funcs.enable_assr &amp;&amp; enable) {</div><div class='add'>+		/* ASSR is bound to fail with unsigned PSP</div><div class='add'>+		 * verstage used during devlopment phase.</div><div class='add'>+		 * Report and continue with eDP panel mode to</div><div class='add'>+		 * perform eDP link training with right settings</div><div class='add'>+		 */</div><div class='add'>+		bool result;</div><div class='add'>+</div><div class='add'>+		result = cp_psp-&gt;funcs.enable_assr(cp_psp-&gt;handle, link);</div><div class='add'>+</div><div class='add'>+		if (!result &amp;&amp; link-&gt;panel_mode != DP_PANEL_MODE_EDP)</div><div class='add'>+			*panel_mode = DP_PANEL_MODE_DEFAULT;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h<br/>index a158c6234d42..cb6d95cc36e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h</a></div><div class='hunk'>@@ -61,7 +61,7 @@ bool edp_send_replay_cmd(struct dc_link *link,</div><div class='ctx'> 			union dmub_replay_cmd_set *cmd_data);</div><div class='ctx'> bool edp_set_coasting_vtotal(struct dc_link *link, uint32_t coasting_vtotal);</div><div class='ctx'> bool edp_replay_residency(const struct dc_link *link,</div><div class='del'>-	unsigned int *residency, const bool is_start, const bool is_alpm);</div><div class='add'>+	unsigned int *residency, const bool is_start, const enum pr_residency_mode mode);</div><div class='ctx'> bool edp_get_replay_state(const struct dc_link *link, uint64_t *state);</div><div class='ctx'> bool edp_set_replay_power_opt_and_coasting_vtotal(struct dc_link *link,</div><div class='ctx'> 	const unsigned int *power_opts, uint32_t coasting_vtotal);</div><div class='hunk'>@@ -76,4 +76,6 @@ bool edp_receiver_ready_T9(struct dc_link *link);</div><div class='ctx'> bool edp_receiver_ready_T7(struct dc_link *link);</div><div class='ctx'> bool edp_power_alpm_dpcd_enable(struct dc_link *link, bool enable);</div><div class='ctx'> void edp_set_panel_power(struct dc_link *link, bool powerOn);</div><div class='add'>+void edp_set_panel_assr(struct dc_link *link, struct pipe_ctx *pipe_ctx,</div><div class='add'>+		enum dp_panel_mode *panel_mode, bool enable);</div><div class='ctx'> #endif /* __DC_LINK_EDP_POWER_CONTROL_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c<br/>index e3d729ab5b9f..caa617883f62 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> bool link_get_hpd_state(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	uint32_t state;</div><div class='add'>+	uint32_t state = 0;</div><div class='ctx'> </div><div class='ctx'> 	dal_gpio_lock_pin(link-&gt;hpd_gpio);</div><div class='ctx'> 	dal_gpio_get_value(link-&gt;hpd_gpio, &amp;state);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c<br/>index 0e8f4f36c87c..5574bc628053 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c</a></div><div class='hunk'>@@ -945,10 +945,19 @@ void optc1_set_drr(</div><div class='ctx'> 				OTG_FORCE_LOCK_ON_EVENT, 0,</div><div class='ctx'> 				OTG_SET_V_TOTAL_MIN_MASK_EN, 0,</div><div class='ctx'> 				OTG_SET_V_TOTAL_MIN_MASK, 0);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	// Setup manual flow control for EOF via TRIG_A</div><div class='del'>-	optc-&gt;funcs-&gt;setup_manual_trigger(optc);</div><div class='add'>+		// Setup manual flow control for EOF via TRIG_A</div><div class='add'>+		optc-&gt;funcs-&gt;setup_manual_trigger(optc);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='add'>+				OTG_SET_V_TOTAL_MIN_MASK, 0,</div><div class='add'>+				OTG_V_TOTAL_MIN_SEL, 0,</div><div class='add'>+				OTG_V_TOTAL_MAX_SEL, 0,</div><div class='add'>+				OTG_FORCE_LOCK_ON_EVENT, 0);</div><div class='add'>+</div><div class='add'>+		optc-&gt;funcs-&gt;set_vtotal_min_max(optc, 0, 0);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)</div><div class='hunk'>@@ -1383,6 +1392,9 @@ void optc1_read_otg_state(struct optc *optc1,</div><div class='ctx'> </div><div class='ctx'> 	REG_GET(OTG_VERTICAL_INTERRUPT2_POSITION,</div><div class='ctx'> 			OTG_VERTICAL_INTERRUPT2_LINE_START, &amp;s-&gt;vertical_interrupt2_line);</div><div class='add'>+</div><div class='add'>+	s-&gt;otg_master_update_lock = REG_READ(OTG_MASTER_UPDATE_LOCK);</div><div class='add'>+	s-&gt;otg_double_buffer_control = REG_READ(OTG_DOUBLE_BUFFER_CONTROL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool optc1_get_otg_active_size(struct timing_generator *optc,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h b/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h<br/>index 6c2e84d3967f..2f3bd7648ba7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h</a></div><div class='hunk'>@@ -129,6 +129,8 @@ struct dcn_optc_registers {</div><div class='ctx'> 	uint32_t OTG_V_TOTAL_MID;</div><div class='ctx'> 	uint32_t OTG_V_TOTAL_MIN;</div><div class='ctx'> 	uint32_t OTG_V_TOTAL_CONTROL;</div><div class='add'>+	uint32_t OTG_V_COUNT_STOP_CONTROL;</div><div class='add'>+	uint32_t OTG_V_COUNT_STOP_CONTROL2;</div><div class='ctx'> 	uint32_t OTG_TRIGA_CNTL;</div><div class='ctx'> 	uint32_t OTG_TRIGA_MANUAL_TRIG;</div><div class='ctx'> 	uint32_t OTG_MANUAL_FLOW_CONTROL;</div><div class='hunk'>@@ -515,12 +517,15 @@ struct dcn_optc_registers {</div><div class='ctx'> 	type MANUAL_FLOW_CONTROL;\</div><div class='ctx'> 	type MANUAL_FLOW_CONTROL_SEL;</div><div class='ctx'> </div><div class='add'>+#define V_TOTAL_REGS(type)</div><div class='add'>+</div><div class='ctx'> #define TG_REG_FIELD_LIST(type) \</div><div class='ctx'> 	TG_REG_FIELD_LIST_DCN1_0(type)\</div><div class='ctx'> 	type OTG_V_SYNC_MODE;\</div><div class='ctx'> 	type OTG_DRR_TRIGGER_WINDOW_START_X;\</div><div class='ctx'> 	type OTG_DRR_TRIGGER_WINDOW_END_X;\</div><div class='ctx'> 	type OTG_DRR_V_TOTAL_CHANGE_LIMIT;\</div><div class='add'>+	V_TOTAL_REGS(type)\</div><div class='ctx'> 	type OTG_OUT_MUX;\</div><div class='ctx'> 	type OTG_M_CONST_DTO_PHASE;\</div><div class='ctx'> 	type OTG_M_CONST_DTO_MODULO;\</div><div class='hunk'>@@ -581,7 +586,9 @@ struct dcn_optc_registers {</div><div class='ctx'> 	type OTG_CRC1_WINDOWB_X_END_READBACK;\</div><div class='ctx'> 	type OTG_CRC1_WINDOWB_Y_START_READBACK;\</div><div class='ctx'> 	type OTG_CRC1_WINDOWB_Y_END_READBACK;\</div><div class='del'>-	type OPTC_FGCG_REP_DIS;</div><div class='add'>+	type OPTC_FGCG_REP_DIS;\</div><div class='add'>+	type OTG_V_COUNT_STOP;\</div><div class='add'>+	type OTG_V_COUNT_STOP_TIMER;</div><div class='ctx'> </div><div class='ctx'> struct dcn_optc_shift {</div><div class='ctx'> 	TG_REG_FIELD_LIST(uint8_t)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c<br/>index 58bdbd859bf9..d6f095b4555d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c</a></div><div class='hunk'>@@ -462,16 +462,6 @@ void optc2_setup_manual_trigger(struct timing_generator *optc)</div><div class='ctx'> {</div><div class='ctx'> 	struct optc *optc1 = DCN10TG_FROM_TG(optc);</div><div class='ctx'> </div><div class='del'>-	/* Set the min/max selectors unconditionally so that</div><div class='del'>-	 * DMCUB fw may change OTG timings when necessary</div><div class='del'>-	 * TODO: Remove the w/a after fixing the issue in DMCUB firmware</div><div class='del'>-	 */</div><div class='del'>-	REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='del'>-				 OTG_V_TOTAL_MIN_SEL, 1,</div><div class='del'>-				 OTG_V_TOTAL_MAX_SEL, 1,</div><div class='del'>-				 OTG_FORCE_LOCK_ON_EVENT, 0,</div><div class='del'>-				 OTG_SET_V_TOTAL_MIN_MASK, (1 &lt;&lt; 1)); /* TRIGA */</div><div class='del'>-</div><div class='ctx'> 	REG_SET_8(OTG_TRIGA_CNTL, 0,</div><div class='ctx'> 			OTG_TRIGA_SOURCE_SELECT, 21,</div><div class='ctx'> 			OTG_TRIGA_SOURCE_PIPE_SELECT, optc-&gt;inst,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c<br/>index 5b1547508850..d393be30dff8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include "reg_helper.h"</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "dcn_calc_math.h"</div><div class='add'>+#include "dc_dmub_srv.h"</div><div class='ctx'> </div><div class='ctx'> #define REG(reg)\</div><div class='ctx'> 	optc1-&gt;tg_regs-&gt;reg</div><div class='hunk'>@@ -213,6 +214,167 @@ static bool optc35_configure_crc(struct timing_generator *optc,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void optc35_setup_manual_trigger(struct timing_generator *optc)</div><div class='add'>+{</div><div class='add'>+	if (!optc || !optc-&gt;ctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	struct optc *optc1 = DCN10TG_FROM_TG(optc);</div><div class='add'>+	struct dc *dc = optc-&gt;ctx-&gt;dc;</div><div class='add'>+</div><div class='add'>+	if (dc-&gt;caps.dmub_caps.mclk_sw &amp;&amp; !dc-&gt;debug.disable_fams)</div><div class='add'>+		dc_dmub_srv_set_drr_manual_trigger_cmd(dc, optc-&gt;inst);</div><div class='add'>+	else {</div><div class='add'>+		/*</div><div class='add'>+		 * MIN_MASK_EN is gone and MASK is now always enabled.</div><div class='add'>+		 *</div><div class='add'>+		 * To get it to it work with manual trigger we need to make sure</div><div class='add'>+		 * we program the correct bit.</div><div class='add'>+		 */</div><div class='add'>+		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='add'>+				OTG_V_TOTAL_MIN_SEL, 1,</div><div class='add'>+				OTG_V_TOTAL_MAX_SEL, 1,</div><div class='add'>+				OTG_FORCE_LOCK_ON_EVENT, 0,</div><div class='add'>+				OTG_SET_V_TOTAL_MIN_MASK, (1 &lt;&lt; 1)); /* TRIGA */</div><div class='add'>+</div><div class='add'>+		// Setup manual flow control for EOF via TRIG_A</div><div class='add'>+		if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;setup_manual_trigger)</div><div class='add'>+			optc-&gt;funcs-&gt;setup_manual_trigger(optc);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void optc35_set_drr(</div><div class='add'>+	struct timing_generator *optc,</div><div class='add'>+	const struct drr_params *params)</div><div class='add'>+{</div><div class='add'>+	if (!optc || !params)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	struct optc *optc1 = DCN10TG_FROM_TG(optc);</div><div class='add'>+	uint32_t max_otg_v_total = optc1-&gt;max_v_total - 1;</div><div class='add'>+</div><div class='add'>+	if (params != NULL &amp;&amp;</div><div class='add'>+		params-&gt;vertical_total_max &gt; 0 &amp;&amp;</div><div class='add'>+		params-&gt;vertical_total_min &gt; 0) {</div><div class='add'>+</div><div class='add'>+		if (params-&gt;vertical_total_mid != 0) {</div><div class='add'>+</div><div class='add'>+			REG_SET(OTG_V_TOTAL_MID, 0,</div><div class='add'>+				OTG_V_TOTAL_MID, params-&gt;vertical_total_mid - 1);</div><div class='add'>+</div><div class='add'>+			REG_UPDATE_2(OTG_V_TOTAL_CONTROL,</div><div class='add'>+					OTG_VTOTAL_MID_REPLACING_MAX_EN, 1,</div><div class='add'>+					OTG_VTOTAL_MID_FRAME_NUM,</div><div class='add'>+					(uint8_t)params-&gt;vertical_total_mid_frame_num);</div><div class='add'>+</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;set_vtotal_min_max)</div><div class='add'>+			optc-&gt;funcs-&gt;set_vtotal_min_max(optc,</div><div class='add'>+				params-&gt;vertical_total_min - 1, params-&gt;vertical_total_max - 1);</div><div class='add'>+		optc35_setup_manual_trigger(optc);</div><div class='add'>+	} else {</div><div class='add'>+		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='add'>+				OTG_SET_V_TOTAL_MIN_MASK, 0,</div><div class='add'>+				OTG_V_TOTAL_MIN_SEL, 0,</div><div class='add'>+				OTG_V_TOTAL_MAX_SEL, 0,</div><div class='add'>+				OTG_FORCE_LOCK_ON_EVENT, 0);</div><div class='add'>+</div><div class='add'>+		if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;set_vtotal_min_max)</div><div class='add'>+			optc-&gt;funcs-&gt;set_vtotal_min_max(optc, 0, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	REG_WRITE(OTG_V_COUNT_STOP_CONTROL, max_otg_v_total);</div><div class='add'>+	REG_WRITE(OTG_V_COUNT_STOP_CONTROL2, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void optc35_set_long_vtotal(</div><div class='add'>+	struct timing_generator *optc,</div><div class='add'>+	const struct long_vtotal_params *params)</div><div class='add'>+{</div><div class='add'>+	if (!optc || !params)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	struct optc *optc1 = DCN10TG_FROM_TG(optc);</div><div class='add'>+	uint32_t vcount_stop_timer = 0, vcount_stop = 0;</div><div class='add'>+	uint32_t max_otg_v_total = optc1-&gt;max_v_total - 1;</div><div class='add'>+</div><div class='add'>+	if (params-&gt;vertical_total_min &lt;= max_otg_v_total &amp;&amp; params-&gt;vertical_total_max &lt;= max_otg_v_total)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (params-&gt;vertical_total_max == 0 || params-&gt;vertical_total_min == 0) {</div><div class='add'>+		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='add'>+						OTG_SET_V_TOTAL_MIN_MASK, 0,</div><div class='add'>+						OTG_V_TOTAL_MIN_SEL, 0,</div><div class='add'>+						OTG_V_TOTAL_MAX_SEL, 0,</div><div class='add'>+						OTG_FORCE_LOCK_ON_EVENT, 0);</div><div class='add'>+</div><div class='add'>+		if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;set_vtotal_min_max)</div><div class='add'>+			optc-&gt;funcs-&gt;set_vtotal_min_max(optc, 0, 0);</div><div class='add'>+	} else if (params-&gt;vertical_total_max == params-&gt;vertical_total_min) {</div><div class='add'>+		vcount_stop = params-&gt;vertical_blank_start;</div><div class='add'>+		vcount_stop_timer = params-&gt;vertical_total_max - max_otg_v_total;</div><div class='add'>+</div><div class='add'>+		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='add'>+				OTG_V_TOTAL_MIN_SEL, 1,</div><div class='add'>+				OTG_V_TOTAL_MAX_SEL, 1,</div><div class='add'>+				OTG_FORCE_LOCK_ON_EVENT, 0,</div><div class='add'>+				OTG_SET_V_TOTAL_MIN_MASK, 0);</div><div class='add'>+</div><div class='add'>+		if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;set_vtotal_min_max)</div><div class='add'>+			optc-&gt;funcs-&gt;set_vtotal_min_max(optc, max_otg_v_total, max_otg_v_total);</div><div class='add'>+</div><div class='add'>+		REG_WRITE(OTG_V_COUNT_STOP_CONTROL, vcount_stop);</div><div class='add'>+		REG_WRITE(OTG_V_COUNT_STOP_CONTROL2, vcount_stop_timer);</div><div class='add'>+	} else {</div><div class='add'>+		// Variable rate, keep DRR trigger mask</div><div class='add'>+		if (params-&gt;vertical_total_min &gt; max_otg_v_total) {</div><div class='add'>+			// cannot be supported</div><div class='add'>+			// If MAX_OTG_V_COUNT &lt; DRR trigger &lt; v_total_min &lt; v_total_max,</div><div class='add'>+			// DRR trigger will drop the vtotal counting directly to a new frame.</div><div class='add'>+			// But it should trigger between v_total_min and v_total_max.</div><div class='add'>+			ASSERT(0);</div><div class='add'>+</div><div class='add'>+			REG_UPDATE_4(OTG_V_TOTAL_CONTROL,</div><div class='add'>+				OTG_SET_V_TOTAL_MIN_MASK, 0,</div><div class='add'>+				OTG_V_TOTAL_MIN_SEL, 0,</div><div class='add'>+				OTG_V_TOTAL_MAX_SEL, 0,</div><div class='add'>+				OTG_FORCE_LOCK_ON_EVENT, 0);</div><div class='add'>+</div><div class='add'>+			if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;set_vtotal_min_max)</div><div class='add'>+				optc-&gt;funcs-&gt;set_vtotal_min_max(optc, 0, 0);</div><div class='add'>+</div><div class='add'>+			REG_WRITE(OTG_V_COUNT_STOP_CONTROL, max_otg_v_total);</div><div class='add'>+			REG_WRITE(OTG_V_COUNT_STOP_CONTROL2, 0);</div><div class='add'>+		} else {</div><div class='add'>+			// For total_min &lt;= MAX_OTG_V_COUNT and total_max &gt; MAX_OTG_V_COUNT</div><div class='add'>+			vcount_stop = params-&gt;vertical_total_min;</div><div class='add'>+			vcount_stop_timer = params-&gt;vertical_total_max - max_otg_v_total;</div><div class='add'>+</div><div class='add'>+			// Example:</div><div class='add'>+			// params-&gt;vertical_total_min 1000</div><div class='add'>+			// params-&gt;vertical_total_max 2000</div><div class='add'>+			// MAX_OTG_V_COUNT_STOP = 1500</div><div class='add'>+			//</div><div class='add'>+			// If DRR event not happened,</div><div class='add'>+			//     time     0,1,2,3,4,...1000,1001,........,1500,1501,1502,     ...1999</div><div class='add'>+			//     vcount   0,1,2,3,4....1000...................,1001,1002,1003,...1399</div><div class='add'>+			//     vcount2                       0,1,2,3,4,..499,</div><div class='add'>+			// else (DRR event happened, ex : at line 1004)</div><div class='add'>+			//     time    0,1,2,3,4,...1000,1001.....1004, 0</div><div class='add'>+			//     vcount  0,1,2,3,4....1000,.............. 0 (new frame)</div><div class='add'>+			//     vcount2                      0,1,2,   3, -</div><div class='add'>+			if (optc-&gt;funcs &amp;&amp; optc-&gt;funcs-&gt;set_vtotal_min_max)</div><div class='add'>+				optc-&gt;funcs-&gt;set_vtotal_min_max(optc,</div><div class='add'>+					params-&gt;vertical_total_min - 1, max_otg_v_total);</div><div class='add'>+			optc35_setup_manual_trigger(optc);</div><div class='add'>+</div><div class='add'>+			REG_WRITE(OTG_V_COUNT_STOP_CONTROL, vcount_stop);</div><div class='add'>+			REG_WRITE(OTG_V_COUNT_STOP_CONTROL2, vcount_stop_timer);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct timing_generator_funcs dcn35_tg_funcs = {</div><div class='ctx'> 		.validate_timing = optc1_validate_timing,</div><div class='ctx'> 		.program_timing = optc1_program_timing,</div><div class='hunk'>@@ -245,7 +407,7 @@ static struct timing_generator_funcs dcn35_tg_funcs = {</div><div class='ctx'> 		.lock_doublebuffer_enable = optc3_lock_doublebuffer_enable,</div><div class='ctx'> 		.lock_doublebuffer_disable = optc3_lock_doublebuffer_disable,</div><div class='ctx'> 		.enable_optc_clock = optc1_enable_optc_clock,</div><div class='del'>-		.set_drr = optc31_set_drr,</div><div class='add'>+		.set_drr = optc35_set_drr,</div><div class='ctx'> 		.get_last_used_drr_vtotal = optc2_get_last_used_drr_vtotal,</div><div class='ctx'> 		.set_vtotal_min_max = optc1_set_vtotal_min_max,</div><div class='ctx'> 		.set_static_screen_control = optc1_set_static_screen_control,</div><div class='hunk'>@@ -275,6 +437,7 @@ static struct timing_generator_funcs dcn35_tg_funcs = {</div><div class='ctx'> 		.setup_manual_trigger = optc2_setup_manual_trigger,</div><div class='ctx'> 		.get_hw_timing = optc1_get_hw_timing,</div><div class='ctx'> 		.init_odm = optc3_init_odm,</div><div class='add'>+		.set_long_vtotal = optc35_set_long_vtotal,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dcn35_timing_generator_init(struct optc *optc1)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h<br/>index 1f422e4c468f..d077e2392379 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h</a></div><div class='hunk'>@@ -65,10 +65,14 @@</div><div class='ctx'> 	SF(OTG0_OTG_CRC1_WINDOWB_X_CONTROL_READBACK, OTG_CRC1_WINDOWB_X_END_READBACK, mask_sh),\</div><div class='ctx'> 	SF(OTG0_OTG_CRC1_WINDOWB_Y_CONTROL_READBACK, OTG_CRC1_WINDOWB_Y_START_READBACK, mask_sh),\</div><div class='ctx'> 	SF(OTG0_OTG_CRC1_WINDOWB_Y_CONTROL_READBACK, OTG_CRC1_WINDOWB_Y_END_READBACK, mask_sh),\</div><div class='del'>-	SF(OPTC_CLOCK_CONTROL, OPTC_FGCG_REP_DIS, mask_sh)</div><div class='add'>+	SF(OPTC_CLOCK_CONTROL, OPTC_FGCG_REP_DIS, mask_sh),\</div><div class='add'>+	SF(OTG0_OTG_V_COUNT_STOP_CONTROL, OTG_V_COUNT_STOP, mask_sh),\</div><div class='add'>+	SF(OTG0_OTG_V_COUNT_STOP_CONTROL2, OTG_V_COUNT_STOP_TIMER, mask_sh)</div><div class='ctx'> </div><div class='ctx'> void dcn35_timing_generator_init(struct optc *optc1);</div><div class='ctx'> </div><div class='ctx'> void dcn35_timing_generator_set_fgcg(struct optc *optc1, bool enable);</div><div class='ctx'> </div><div class='add'>+void optc35_set_drr(struct timing_generator *optc, const struct drr_params *params);</div><div class='add'>+</div><div class='ctx'> #endif /* __DC_OPTC_DCN35_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/Makefile b/drivers/gpu/drm/amd/display/dc/resource/Makefile<br/>index 184b1f23aa77..db9048974d74 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/Makefile</a></div><div class='hunk'>@@ -102,10 +102,6 @@ AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCN21)</div><div class='ctx'> </div><div class='ctx'> ###############################################################################</div><div class='ctx'> </div><div class='del'>-###############################################################################</div><div class='del'>-</div><div class='del'>-###############################################################################</div><div class='del'>-</div><div class='ctx'> RESOURCE_DCN30 = dcn30_resource.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_RESOURCE_DCN30 = $(addprefix $(AMDDALPATH)/dc/resource/dcn30/,$(RESOURCE_DCN30))</div><div class='hunk'>@@ -202,6 +198,4 @@ AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCN351)</div><div class='ctx'> </div><div class='ctx'> ###############################################################################</div><div class='ctx'> </div><div class='del'>-###############################################################################</div><div class='del'>-</div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c<br/>index d1edac46c9a0..88afb2a30eef 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c</a></div><div class='hunk'>@@ -864,8 +864,6 @@ static struct clock_source *find_matching_pll(</div><div class='ctx'> 	default:</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum dc_status build_mapped_resource(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c<br/>index 20662edd0ae4..621825a51f46 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c</a></div><div class='hunk'>@@ -1060,7 +1060,7 @@ static bool dce120_resource_construct(</div><div class='ctx'> 	struct irq_service_init_data irq_init_data;</div><div class='ctx'> 	static const struct resource_create_funcs *res_funcs;</div><div class='ctx'> 	bool is_vg20 = ASICREV_IS_VEGA20_P(ctx-&gt;asic_id.hw_internal_rev);</div><div class='del'>-	uint32_t pipe_fuses;</div><div class='add'>+	uint32_t pipe_fuses = 0;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;dc_bios-&gt;regs = &amp;bios_regs;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c<br/>index 35a2cce0c2b8..56ee45e12b46 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c</a></div><div class='hunk'>@@ -56,7 +56,6 @@</div><div class='ctx'> #include "dce/dce_aux.h"</div><div class='ctx'> #include "dce/dce_abm.h"</div><div class='ctx'> #include "dce/dce_i2c.h"</div><div class='del'>-/* TODO remove this include */</div><div class='ctx'> </div><div class='ctx'> #ifndef mmMC_HUB_RDREQ_DMIF_LIMIT</div><div class='ctx'> #include "gmc/gmc_7_1_d.h"</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c<br/>index d08d10969251..563c5eec83ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c</a></div><div class='hunk'>@@ -513,7 +513,7 @@ static const struct dc_plane_cap plane_cap = {</div><div class='ctx'> 			.argb8888 = true,</div><div class='ctx'> 			.nv12 = true,</div><div class='ctx'> 			.fp16 = true,</div><div class='del'>-			.p010 = true</div><div class='add'>+			.p010 = false</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	.max_upscale_factor = {</div><div class='hunk'>@@ -569,6 +569,7 @@ static const struct dc_debug_options debug_defaults_diags = {</div><div class='ctx'> 		.disable_pplib_clock_request = true,</div><div class='ctx'> 		.disable_pplib_wm_range = true,</div><div class='ctx'> 		.underflow_assert_delay_us = 0xFFFFFFFF,</div><div class='add'>+		.enable_legacy_fast_update = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void dcn10_dpp_destroy(struct dpp **dpp)</div><div class='hunk'>@@ -1631,6 +1632,7 @@ static bool dcn10_resource_construct(</div><div class='ctx'> 	/* valid pipe num */</div><div class='ctx'> 	pool-&gt;base.pipe_count = j;</div><div class='ctx'> 	pool-&gt;base.timing_generator_count = j;</div><div class='add'>+	pool-&gt;base.mpcc_count = j;</div><div class='ctx'> </div><div class='ctx'> 	/* within dml lib, it is hard code to 4. If ASIC pipe is fused,</div><div class='ctx'> 	 * the value may be changed</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c<br/>index a2387cea1af9..0a939437e19f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c</a></div><div class='hunk'>@@ -62,6 +62,9 @@</div><div class='ctx'> #include "dcn20/dcn20_vmid.h"</div><div class='ctx'> #include "dce/dce_panel_cntl.h"</div><div class='ctx'> </div><div class='add'>+#include "dcn20/dcn20_dwb.h"</div><div class='add'>+#include "dcn20/dcn20_mmhubbub.h"</div><div class='add'>+</div><div class='ctx'> #include "navi10_ip_offset.h"</div><div class='ctx'> </div><div class='ctx'> #include "dcn/dcn_2_0_0_offset.h"</div><div class='hunk'>@@ -71,9 +74,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "nbio/nbio_2_3_offset.h"</div><div class='ctx'> </div><div class='del'>-#include "dcn20/dcn20_dwb.h"</div><div class='del'>-#include "dcn20/dcn20_mmhubbub.h"</div><div class='del'>-</div><div class='ctx'> #include "mmhub/mmhub_2_0_0_offset.h"</div><div class='ctx'> #include "mmhub/mmhub_2_0_0_sh_mask.h"</div><div class='ctx'> </div><div class='hunk'>@@ -83,11 +83,10 @@</div><div class='ctx'> #include "dce/dce_aux.h"</div><div class='ctx'> #include "dce/dce_i2c.h"</div><div class='ctx'> #include "vm_helper.h"</div><div class='del'>-#include "link_enc_cfg.h"</div><div class='del'>-</div><div class='del'>-#include "amdgpu_socbb.h"</div><div class='ctx'> </div><div class='add'>+#include "link_enc_cfg.h"</div><div class='ctx'> #include "link.h"</div><div class='add'>+</div><div class='ctx'> #define DC_LOGGER_INIT(logger)</div><div class='ctx'> </div><div class='ctx'> #ifndef mmDP0_DP_DPHY_INTERNAL_CTRL</div><div class='hunk'>@@ -1282,8 +1281,13 @@ void dcn20_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> </div><div class='ctx'> static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> {</div><div class='add'>+	struct resource_pool *pool = pipe_ctx-&gt;stream-&gt;ctx-&gt;dc-&gt;res_pool;</div><div class='ctx'> </div><div class='del'>-	dcn20_build_pipe_pix_clk_params(pipe_ctx);</div><div class='add'>+	if (pool-&gt;funcs-&gt;build_pipe_pix_clk_params) {</div><div class='add'>+		pool-&gt;funcs-&gt;build_pipe_pix_clk_params(pipe_ctx);</div><div class='add'>+	} else {</div><div class='add'>+		dcn20_build_pipe_pix_clk_params(pipe_ctx);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pipe_ctx-&gt;stream-&gt;clamping.pixel_encoding = pipe_ctx-&gt;stream-&gt;timing.pixel_encoding;</div><div class='ctx'> </div><div class='hunk'>@@ -2449,6 +2453,7 @@ static bool dcn20_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.post_blend_color_processing = true;</div><div class='ctx'> 	dc-&gt;caps.force_dp_tps4_for_cp2520 = true;</div><div class='ctx'> 	dc-&gt;caps.extended_aux_timeout_support = true;</div><div class='add'>+	dc-&gt;caps.dmcub_support = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Color pipeline capabilities */</div><div class='ctx'> 	dc-&gt;caps.color.dpp.dcn_arch = 1;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c<br/>index 914b234d7f6b..070a4efb308b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c</a></div><div class='hunk'>@@ -55,7 +55,6 @@</div><div class='ctx'> #include "dce110/dce110_resource.h"</div><div class='ctx'> #include "dce/dce_aux.h"</div><div class='ctx'> #include "dce/dce_i2c.h"</div><div class='del'>-#include "dcn201/dcn201_hubbub.h"</div><div class='ctx'> #include "dcn10/dcn10_resource.h"</div><div class='ctx'> </div><div class='ctx'> #include "cyan_skillfish_ip_offset.h"</div><div class='hunk'>@@ -182,6 +181,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn201_soc = {</div><div class='ctx'> 				.socclk_mhz = 1254.0,</div><div class='ctx'> 				.dram_speed_mts = 14000.0,</div><div class='ctx'> 			},</div><div class='add'>+			/* state4 is not an actual state, just defines unsupported for dml*/</div><div class='ctx'> 			{</div><div class='ctx'> 				.state = 4,</div><div class='ctx'> 				.dscclk_mhz = 400.0,</div><div class='hunk'>@@ -566,6 +566,8 @@ static const struct resource_caps res_cap_dnc201 = {</div><div class='ctx'> 		.num_audio = 2,</div><div class='ctx'> 		.num_stream_encoder = 2,</div><div class='ctx'> 		.num_pll = 2,</div><div class='add'>+		.num_dwb = 0,</div><div class='add'>+		.num_dsc = 0,</div><div class='ctx'> 		.num_ddc = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -612,7 +614,7 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 		.scl_reset_length10 = true,</div><div class='ctx'> 		.sanity_checks = false,</div><div class='ctx'> 		.underflow_assert_delay_us = 0xFFFFFFFF,</div><div class='del'>-		.enable_tri_buf = false,</div><div class='add'>+		.enable_tri_buf = true,</div><div class='ctx'> 		.enable_legacy_fast_update = true,</div><div class='ctx'> 		.using_dml2 = false,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c<br/>index 65d337731f56..8663cbc3d1cf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c</a></div><div class='hunk'>@@ -581,32 +581,6 @@ static const struct resource_caps res_cap_rn = {</div><div class='ctx'> 		.num_dsc = 3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef DIAGS_BUILD</div><div class='del'>-static const struct resource_caps res_cap_rn_FPGA_4pipe = {</div><div class='del'>-		.num_timing_generator = 4,</div><div class='del'>-		.num_opp = 4,</div><div class='del'>-		.num_video_plane = 4,</div><div class='del'>-		.num_audio = 7,</div><div class='del'>-		.num_stream_encoder = 4,</div><div class='del'>-		.num_pll = 4,</div><div class='del'>-		.num_dwb = 1,</div><div class='del'>-		.num_ddc = 4,</div><div class='del'>-		.num_dsc = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct resource_caps res_cap_rn_FPGA_2pipe_dsc = {</div><div class='del'>-		.num_timing_generator = 2,</div><div class='del'>-		.num_opp = 2,</div><div class='del'>-		.num_video_plane = 2,</div><div class='del'>-		.num_audio = 7,</div><div class='del'>-		.num_stream_encoder = 2,</div><div class='del'>-		.num_pll = 4,</div><div class='del'>-		.num_dwb = 1,</div><div class='del'>-		.num_ddc = 4,</div><div class='del'>-		.num_dsc = 2,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static const struct dc_plane_cap plane_cap = {</div><div class='ctx'> 	.type = DC_PLANE_TYPE_DCN_UNIVERSAL,</div><div class='ctx'> 	.per_pixel_alpha = true,</div><div class='hunk'>@@ -1415,16 +1389,11 @@ static bool dcn21_resource_construct(</div><div class='ctx'> 	struct dc_context *ctx = dc-&gt;ctx;</div><div class='ctx'> 	struct irq_service_init_data init_data;</div><div class='ctx'> 	uint32_t pipe_fuses = read_pipe_fuses(ctx);</div><div class='del'>-	uint32_t num_pipes;</div><div class='add'>+	uint32_t num_pipes = 0;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;dc_bios-&gt;regs = &amp;bios_regs;</div><div class='ctx'> </div><div class='ctx'> 	pool-&gt;base.res_cap = &amp;res_cap_rn;</div><div class='del'>-#ifdef DIAGS_BUILD</div><div class='del'>-	if (IS_FPGA_MAXIMUS_DC(dc-&gt;ctx-&gt;dce_environment))</div><div class='del'>-		//pool-&gt;base.res_cap = &amp;res_cap_nv10_FPGA_2pipe_dsc;</div><div class='del'>-		pool-&gt;base.res_cap = &amp;res_cap_rn_FPGA_4pipe;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	pool-&gt;base.funcs = &amp;dcn21_res_pool_funcs;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c<br/>index ecc477ef8e3b..f35cc307830b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c</a></div><div class='hunk'>@@ -1639,7 +1639,7 @@ noinline bool dcn30_internal_validate_bw(</div><div class='ctx'> 	int split[MAX_PIPES] = { 0 };</div><div class='ctx'> 	bool merge[MAX_PIPES] = { false };</div><div class='ctx'> 	bool newly_split[MAX_PIPES] = { false };</div><div class='del'>-	int pipe_cnt, i, pipe_idx, vlevel;</div><div class='add'>+	int pipe_cnt, i, pipe_idx, vlevel = 0;</div><div class='ctx'> 	struct vba_vars_st *vba = &amp;context-&gt;bw_ctx.dml.vba;</div><div class='ctx'> </div><div class='ctx'> 	ASSERT(pipes);</div><div class='hunk'>@@ -2050,6 +2050,9 @@ bool dcn30_validate_bandwidth(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_COUNT();</div><div class='ctx'> </div><div class='add'>+	if (!pipes)</div><div class='add'>+		goto validate_fail;</div><div class='add'>+</div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	out = dcn30_internal_validate_bw(dc, context, pipes, &amp;pipe_cnt, &amp;vlevel, fast_validate, true);</div><div class='ctx'> 	DC_FP_END();</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c<br/>index 25cd6236b054..8bc1bcaeaa47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c</a></div><div class='hunk'>@@ -1143,7 +1143,7 @@ static bool dcn303_resource_construct(</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct dc_context *ctx = dc-&gt;ctx;</div><div class='ctx'> 	struct irq_service_init_data init_data;</div><div class='del'>-	struct ddc_service_init_data ddc_init_data;</div><div class='add'>+	struct ddc_service_init_data ddc_init_data = {0};</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;dc_bios-&gt;regs = &amp;bios_regs;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c<br/>index 04d142f97474..d4c3e2754f51 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c</a></div><div class='hunk'>@@ -75,7 +75,6 @@</div><div class='ctx'> #include "dcn30/dcn30_dwb.h"</div><div class='ctx'> #include "dcn30/dcn30_mmhubbub.h"</div><div class='ctx'> </div><div class='del'>-// TODO: change include headers /amd/include/asic_reg after upstream</div><div class='ctx'> #include "yellow_carp_offset.h"</div><div class='ctx'> #include "dcn/dcn_3_1_2_offset.h"</div><div class='ctx'> #include "dcn/dcn_3_1_2_sh_mask.h"</div><div class='hunk'>@@ -892,7 +891,7 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 	.disable_z10 = true,</div><div class='ctx'> 	.enable_legacy_fast_update = true,</div><div class='ctx'> 	.enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/</div><div class='del'>-	.dml_hostvm_override = DML_HOSTVM_OVERRIDE_FALSE,</div><div class='add'>+	.dml_hostvm_override = DML_HOSTVM_NO_OVERRIDE,</div><div class='ctx'> 	.using_dml2 = false,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1311,6 +1310,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> 	hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,</div><div class='ctx'> 					&amp;hpo_dp_link_enc_regs[inst],</div><div class='hunk'>@@ -1645,7 +1646,7 @@ int dcn31_populate_dml_pipes_from_context(</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_cnt;</div><div class='ctx'> 	struct resource_context *res_ctx = &amp;context-&gt;res_ctx;</div><div class='del'>-	struct pipe_ctx *pipe;</div><div class='add'>+	struct pipe_ctx *pipe = 0;</div><div class='ctx'> 	bool upscaled = false;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='hunk'>@@ -1767,11 +1768,14 @@ bool dcn31_validate_bandwidth(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_COUNT();</div><div class='ctx'> </div><div class='add'>+	if (!pipes)</div><div class='add'>+		goto validate_fail;</div><div class='add'>+</div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	out = dcn30_internal_validate_bw(dc, context, pipes, &amp;pipe_cnt, &amp;vlevel, fast_validate, true);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='del'>-	// Disable fast_validate to set min dcfclk in alculate_wm_and_dlg</div><div class='add'>+	// Disable fast_validate to set min dcfclk in calculate_wm_and_dlg</div><div class='ctx'> 	if (pipe_cnt == 0)</div><div class='ctx'> 		fast_validate = false;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c<br/>index c97391edb5ff..ff50f43e4c00 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c</a></div><div class='hunk'>@@ -925,27 +925,10 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	.seamless_boot_odm_combine = true,</div><div class='add'>+	.enable_legacy_fast_update = true,</div><div class='ctx'> 	.using_dml2 = false,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct dc_debug_options debug_defaults_diags = {</div><div class='del'>-	.disable_dmcu = true,</div><div class='del'>-	.force_abm_enable = false,</div><div class='del'>-	.timing_trace = true,</div><div class='del'>-	.clock_trace = true,</div><div class='del'>-	.disable_dpp_power_gate = true,</div><div class='del'>-	.disable_hubp_power_gate = true,</div><div class='del'>-	.disable_clock_gate = true,</div><div class='del'>-	.disable_pplib_clock_request = true,</div><div class='del'>-	.disable_pplib_wm_range = true,</div><div class='del'>-	.disable_stutter = false,</div><div class='del'>-	.scl_reset_length10 = true,</div><div class='del'>-	.dwb_fi_phase = -1, // -1 = disable</div><div class='del'>-	.dmub_command_table = true,</div><div class='del'>-	.enable_tri_buf = true,</div><div class='del'>-	.use_max_lb = true</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct dc_panel_config panel_config_defaults = {</div><div class='ctx'> 	.psr = {</div><div class='ctx'> 		.disable_psr = false,</div><div class='hunk'>@@ -1384,6 +1367,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> 	hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,</div><div class='ctx'> 					&amp;hpo_dp_link_enc_regs[inst],</div><div class='hunk'>@@ -1744,6 +1729,9 @@ bool dcn314_validate_bandwidth(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_COUNT();</div><div class='ctx'> </div><div class='add'>+	if (!pipes)</div><div class='add'>+		goto validate_fail;</div><div class='add'>+</div><div class='ctx'> 	if (filter_modes_for_single_channel_workaround(dc, context))</div><div class='ctx'> 		goto validate_fail;</div><div class='ctx'> </div><div class='hunk'>@@ -1938,8 +1926,6 @@ static bool dcn314_resource_construct(</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;ctx-&gt;dce_environment == DCE_ENV_PRODUCTION_DRV)</div><div class='ctx'> 		dc-&gt;debug = debug_defaults_drv;</div><div class='del'>-	else</div><div class='del'>-		dc-&gt;debug = debug_defaults_diags;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable pipe power gating */</div><div class='ctx'> 	dc-&gt;debug.disable_dpp_power_gate = true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c<br/>index 515ba435f759..4ce0f4bf1d9b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c</a></div><div class='hunk'>@@ -1309,6 +1309,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> 	hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,</div><div class='ctx'> 					&amp;hpo_dp_link_enc_regs[inst],</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c<br/>index b9753d4606f8..5fd52c5fcee4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c</a></div><div class='hunk'>@@ -125,7 +125,6 @@</div><div class='ctx'> #include "link_enc_cfg.h"</div><div class='ctx'> </div><div class='ctx'> #define DCN3_16_MAX_DET_SIZE 384</div><div class='del'>-#define DCN3_16_MIN_COMPBUF_SIZE_KB 128</div><div class='ctx'> #define DCN3_16_CRB_SEGMENT_SIZE_KB 64</div><div class='ctx'> </div><div class='ctx'> enum dcn31_clk_src_array_id {</div><div class='hunk'>@@ -1306,6 +1305,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> 	hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,</div><div class='ctx'> 					&amp;hpo_dp_link_enc_regs[inst],</div><div class='hunk'>@@ -1614,7 +1615,7 @@ static int dcn316_populate_dml_pipes_from_context(</div><div class='ctx'> {</div><div class='ctx'> 	int i, pipe_cnt;</div><div class='ctx'> 	struct resource_context *res_ctx = &amp;context-&gt;res_ctx;</div><div class='del'>-	struct pipe_ctx *pipe;</div><div class='add'>+	struct pipe_ctx *pipe = 0;</div><div class='ctx'> 	const int max_usable_det = context-&gt;bw_ctx.dml.ip.config_return_buffer_size_in_kbytes - DCN3_16_MIN_COMPBUF_SIZE_KB;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c<br/>index ce1754cc1f46..abd76345d1e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c</a></div><div class='hunk'>@@ -1304,6 +1304,8 @@ static struct hpo_dp_link_encoder *dcn32_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> #undef REG_STRUCT</div><div class='ctx'> #define REG_STRUCT hpo_dp_link_enc_regs</div><div class='hunk'>@@ -1751,6 +1753,9 @@ static bool dml1_validate(struct dc *dc, struct dc_state *context, bool fast_val</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_COUNT();</div><div class='ctx'> </div><div class='add'>+	if (!pipes)</div><div class='add'>+		goto validate_fail;</div><div class='add'>+</div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	out = dcn32_internal_validate_bw(dc, context, pipes, &amp;pipe_cnt, &amp;vlevel, fast_validate);</div><div class='ctx'> 	DC_FP_END();</div><div class='hunk'>@@ -1799,7 +1804,9 @@ bool dcn32_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 	bool out = false;</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;debug.using_dml2)</div><div class='del'>-		out = dml2_validate(dc, context, fast_validate);</div><div class='add'>+		out = dml2_validate(dc, context,</div><div class='add'>+				context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='add'>+				fast_validate);</div><div class='ctx'> 	else</div><div class='ctx'> 		out = dml1_validate(dc, context, fast_validate);</div><div class='ctx'> 	return out;</div><div class='hunk'>@@ -1815,9 +1822,48 @@ int dcn32_populate_dml_pipes_from_context(</div><div class='ctx'> 	struct pipe_ctx *pipe = NULL;</div><div class='ctx'> 	bool subvp_in_use = false;</div><div class='ctx'> 	struct dc_crtc_timing *timing;</div><div class='add'>+	int subvp_main_pipe_index = -1;</div><div class='add'>+	enum mall_stream_type mall_type;</div><div class='add'>+	bool single_display_subvp = false;</div><div class='add'>+	struct dc_stream_state *stream = NULL;</div><div class='add'>+	int num_subvp_main = 0;</div><div class='add'>+	int num_subvp_phantom = 0;</div><div class='add'>+	int num_subvp_none = 0;</div><div class='add'>+	int odm_slice_count;</div><div class='ctx'> </div><div class='ctx'> 	dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);</div><div class='ctx'> </div><div class='add'>+	/* For single display subvp, look for subvp main so if we have phantom</div><div class='add'>+	 *  pipe, we can set odm policy to match main pipe</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+		stream = context-&gt;streams[i];</div><div class='add'>+		mall_type = dc_state_get_stream_subvp_type(context, stream);</div><div class='add'>+		if (mall_type == SUBVP_MAIN)</div><div class='add'>+			num_subvp_main++;</div><div class='add'>+		else if (mall_type == SUBVP_PHANTOM)</div><div class='add'>+			num_subvp_phantom++;</div><div class='add'>+		else</div><div class='add'>+			num_subvp_none++;</div><div class='add'>+	}</div><div class='add'>+	if (num_subvp_main == 1 &amp;&amp; num_subvp_phantom == 1 &amp;&amp; num_subvp_none == 0)</div><div class='add'>+		single_display_subvp = true;</div><div class='add'>+</div><div class='add'>+	if (single_display_subvp) {</div><div class='add'>+		for (i = 0, pipe_cnt = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+			pipe = &amp;res_ctx-&gt;pipe_ctx[i];</div><div class='add'>+			if (!res_ctx-&gt;pipe_ctx[i].stream)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			mall_type = dc_state_get_pipe_subvp_type(context, pipe);</div><div class='add'>+			if (mall_type == SUBVP_MAIN) {</div><div class='add'>+				if (resource_is_pipe_type(pipe, OTG_MASTER))</div><div class='add'>+					subvp_main_pipe_index = i;</div><div class='add'>+			}</div><div class='add'>+			pipe_cnt++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0, pipe_cnt = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> </div><div class='ctx'> 		if (!res_ctx-&gt;pipe_ctx[i].stream)</div><div class='hunk'>@@ -1832,7 +1878,21 @@ int dcn32_populate_dml_pipes_from_context(</div><div class='ctx'> 		pipes[pipe_cnt].pipe.dest.vfront_porch = timing-&gt;v_front_porch;</div><div class='ctx'> 		if (dc-&gt;config.enable_windowed_mpo_odm &amp;&amp;</div><div class='ctx'> 				dc-&gt;debug.enable_single_display_2to1_odm_policy) {</div><div class='del'>-			switch (resource_get_odm_slice_count(pipe)) {</div><div class='add'>+			/* For single display subvp, if pipe is phantom pipe,</div><div class='add'>+			 *  then copy odm policy from subvp main pipe</div><div class='add'>+			 */</div><div class='add'>+			mall_type = dc_state_get_pipe_subvp_type(context, pipe);</div><div class='add'>+			if (single_display_subvp &amp;&amp; (mall_type == SUBVP_PHANTOM)) {</div><div class='add'>+				if (subvp_main_pipe_index &lt; 0) {</div><div class='add'>+					odm_slice_count = -1;</div><div class='add'>+					ASSERT(0);</div><div class='add'>+				} else {</div><div class='add'>+					odm_slice_count = resource_get_odm_slice_count(&amp;res_ctx-&gt;pipe_ctx[subvp_main_pipe_index]);</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				odm_slice_count = resource_get_odm_slice_count(pipe);</div><div class='add'>+			}</div><div class='add'>+			switch (odm_slice_count) {</div><div class='ctx'> 			case 2:</div><div class='ctx'> 				pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_2to1;</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -1845,6 +1905,7 @@ int dcn32_populate_dml_pipes_from_context(</div><div class='ctx'> 		} else {</div><div class='ctx'> 			pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256; // according to spreadsheet</div><div class='ctx'> 		pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;</div><div class='ctx'> 		pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_19;</div><div class='hunk'>@@ -1912,6 +1973,22 @@ int dcn32_populate_dml_pipes_from_context(</div><div class='ctx'> 	return pipe_cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned int dcn32_calculate_mall_ways_from_bytes(const struct dc *dc, unsigned int total_size_in_mall_bytes)</div><div class='add'>+{</div><div class='add'>+	uint32_t cache_lines_used, lines_per_way, total_cache_lines, num_ways;</div><div class='add'>+</div><div class='add'>+	/* add 2 lines for worst case alignment */</div><div class='add'>+	cache_lines_used = total_size_in_mall_bytes / dc-&gt;caps.cache_line_size + 2;</div><div class='add'>+</div><div class='add'>+	total_cache_lines = dc-&gt;caps.max_cab_allocation_bytes / dc-&gt;caps.cache_line_size;</div><div class='add'>+	lines_per_way = total_cache_lines / dc-&gt;caps.cache_num_ways;</div><div class='add'>+	num_ways = cache_lines_used / lines_per_way;</div><div class='add'>+	if (cache_lines_used % lines_per_way &gt; 0)</div><div class='add'>+		num_ways++;</div><div class='add'>+</div><div class='add'>+	return num_ways;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct dc_cap_funcs cap_funcs = {</div><div class='ctx'> 	.get_dcc_compression_cap = dcn20_get_dcc_compression_cap,</div><div class='ctx'> 	.get_subvp_en = dcn32_subvp_in_use,</div><div class='hunk'>@@ -1929,10 +2006,20 @@ void dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context,</div><div class='ctx'> </div><div class='ctx'> static void dcn32_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)</div><div class='ctx'> {</div><div class='add'>+	struct dml2_configuration_options dml2_opt = dc-&gt;dml2_options;</div><div class='add'>+</div><div class='ctx'> 	DC_FP_START();</div><div class='add'>+</div><div class='ctx'> 	dcn32_update_bw_bounding_box_fpu(dc, bw_params);</div><div class='add'>+</div><div class='add'>+	dml2_opt.use_clock_dc_limits = false;</div><div class='ctx'> 	if (dc-&gt;debug.using_dml2 &amp;&amp; dc-&gt;current_state &amp;&amp; dc-&gt;current_state-&gt;bw_ctx.dml2)</div><div class='del'>-		dml2_reinit(dc, &amp;dc-&gt;dml2_options, &amp;dc-&gt;current_state-&gt;bw_ctx.dml2);</div><div class='add'>+		dml2_reinit(dc, &amp;dml2_opt, &amp;dc-&gt;current_state-&gt;bw_ctx.dml2);</div><div class='add'>+</div><div class='add'>+	dml2_opt.use_clock_dc_limits = true;</div><div class='add'>+	if (dc-&gt;debug.using_dml2 &amp;&amp; dc-&gt;current_state &amp;&amp; dc-&gt;current_state-&gt;bw_ctx.dml2_dc_power_source)</div><div class='add'>+		dml2_reinit(dc, &amp;dml2_opt, &amp;dc-&gt;current_state-&gt;bw_ctx.dml2_dc_power_source);</div><div class='add'>+</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1960,6 +2047,7 @@ static struct resource_funcs dcn32_res_pool_funcs = {</div><div class='ctx'> 	.update_soc_for_wm_a = dcn30_update_soc_for_wm_a,</div><div class='ctx'> 	.add_phantom_pipes = dcn32_add_phantom_pipes,</div><div class='ctx'> 	.build_pipe_pix_clk_params = dcn20_build_pipe_pix_clk_params,</div><div class='add'>+	.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static uint32_t read_pipe_fuses(struct dc_context *ctx)</div><div class='hunk'>@@ -2048,7 +2136,8 @@ static bool dcn32_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.min_horizontal_blanking_period = 80;</div><div class='ctx'> 	dc-&gt;caps.dmdata_alloc_size = 2048;</div><div class='ctx'> 	dc-&gt;caps.mall_size_per_mem_channel = 4;</div><div class='del'>-	dc-&gt;caps.mall_size_total = 0;</div><div class='add'>+	/* total size = mall per channel * num channels * 1024 * 1024 */</div><div class='add'>+	dc-&gt;caps.mall_size_total = dc-&gt;caps.mall_size_per_mem_channel * dc-&gt;ctx-&gt;dc_bios-&gt;vram_info.num_chans * 1048576;</div><div class='ctx'> 	dc-&gt;caps.cursor_cache_size = dc-&gt;caps.max_cursor_size * dc-&gt;caps.max_cursor_size * 8;</div><div class='ctx'> </div><div class='ctx'> 	dc-&gt;caps.cache_line_size = 64;</div><div class='hunk'>@@ -2362,30 +2451,10 @@ static bool dcn32_resource_construct(</div><div class='ctx'> 	dc-&gt;dml2_options.use_native_soc_bb_construction = true;</div><div class='ctx'> 	dc-&gt;dml2_options.minimize_dispclk_using_odm = true;</div><div class='ctx'> </div><div class='del'>-	dc-&gt;dml2_options.callbacks.dc = dc;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='add'>+	resource_init_common_dml2_callbacks(dc, &amp;dc-&gt;dml2_options);</div><div class='ctx'> 	dc-&gt;dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &amp;dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &amp;dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &amp;resource_update_pipes_for_stream_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &amp;resource_update_pipes_for_plane_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_mpc_slice_index = &amp;resource_get_mpc_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_odm_slice_index = &amp;resource_get_odm_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_opp_head = &amp;resource_get_opp_head;</div><div class='del'>-</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.dc = dc;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.add_phantom_plane = &amp;dc_state_add_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.add_phantom_stream = &amp;dc_state_add_phantom_stream;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.create_phantom_plane = &amp;dc_state_create_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.remove_phantom_plane = &amp;dc_state_remove_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.remove_phantom_stream = &amp;dc_state_remove_phantom_stream;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.create_phantom_stream = &amp;dc_state_create_phantom_stream;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.release_phantom_plane = &amp;dc_state_release_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.release_phantom_stream = &amp;dc_state_release_phantom_stream;</div><div class='ctx'> 	dc-&gt;dml2_options.svp_pstate.callbacks.release_dsc = &amp;dcn20_release_dsc;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.get_pipe_subvp_type = &amp;dc_state_get_pipe_subvp_type;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.get_stream_subvp_type = &amp;dc_state_get_stream_subvp_type;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.get_paired_subvp_stream = &amp;dc_state_get_paired_subvp_stream;</div><div class='add'>+	dc-&gt;dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool-&gt;base.funcs-&gt;calculate_mall_ways_from_bytes;</div><div class='ctx'> </div><div class='ctx'> 	dc-&gt;dml2_options.svp_pstate.subvp_fw_processing_delay_us = dc-&gt;caps.subvp_fw_processing_delay_us;</div><div class='ctx'> 	dc-&gt;dml2_options.svp_pstate.subvp_prefetch_end_to_mall_start_us = dc-&gt;caps.subvp_prefetch_end_to_mall_start_us;</div><div class='hunk'>@@ -2483,7 +2552,7 @@ struct resource_pool *dcn32_create_resource_pool(</div><div class='ctx'>  * full update which delays the flip for 1 frame. If we use the original pipe</div><div class='ctx'>  * we don't have to toggle its power. So we can flip faster.</div><div class='ctx'>  */</div><div class='del'>-static int find_optimal_free_pipe_as_secondary_dpp_pipe(</div><div class='add'>+int dcn32_find_optimal_free_pipe_as_secondary_dpp_pipe(</div><div class='ctx'> 		const struct resource_context *cur_res_ctx,</div><div class='ctx'> 		struct resource_context *new_res_ctx,</div><div class='ctx'> 		const struct resource_pool *pool,</div><div class='hunk'>@@ -2666,7 +2735,7 @@ struct pipe_ctx *dcn32_acquire_free_pipe_as_secondary_dpp_pipe(</div><div class='ctx'> 		return dcn32_acquire_idle_pipe_for_head_pipe_in_layer(</div><div class='ctx'> 				new_ctx, pool, opp_head_pipe-&gt;stream, opp_head_pipe);</div><div class='ctx'> </div><div class='del'>-	free_pipe_idx = find_optimal_free_pipe_as_secondary_dpp_pipe(</div><div class='add'>+	free_pipe_idx = dcn32_find_optimal_free_pipe_as_secondary_dpp_pipe(</div><div class='ctx'> 					&amp;cur_ctx-&gt;res_ctx, &amp;new_ctx-&gt;res_ctx,</div><div class='ctx'> 					pool, opp_head_pipe);</div><div class='ctx'> 	if (free_pipe_idx &gt;= 0) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h<br/>index 2258c5c7212d..fee67fbab8e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h</a></div><div class='hunk'>@@ -113,10 +113,6 @@ void dcn32_calculate_wm_and_dlg(</div><div class='ctx'> 		int pipe_cnt,</div><div class='ctx'> 		int vlevel);</div><div class='ctx'> </div><div class='del'>-uint32_t dcn32_helper_mall_bytes_to_ways(</div><div class='del'>-		struct dc *dc,</div><div class='del'>-		uint32_t total_size_in_mall_bytes);</div><div class='del'>-</div><div class='ctx'> uint32_t dcn32_helper_calculate_mall_bytes_for_cursor(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='hunk'>@@ -141,6 +137,12 @@ bool dcn32_any_surfaces_rotated(struct dc *dc, struct dc_state *context);</div><div class='ctx'> bool dcn32_is_center_timing(struct pipe_ctx *pipe);</div><div class='ctx'> bool dcn32_is_psr_capable(struct pipe_ctx *pipe);</div><div class='ctx'> </div><div class='add'>+int dcn32_find_optimal_free_pipe_as_secondary_dpp_pipe(</div><div class='add'>+		const struct resource_context *cur_res_ctx,</div><div class='add'>+		struct resource_context *new_res_ctx,</div><div class='add'>+		const struct resource_pool *pool,</div><div class='add'>+		const struct pipe_ctx *new_opp_head);</div><div class='add'>+</div><div class='ctx'> struct pipe_ctx *dcn32_acquire_free_pipe_as_secondary_dpp_pipe(</div><div class='ctx'> 		const struct dc_state *cur_ctx,</div><div class='ctx'> 		struct dc_state *new_ctx,</div><div class='hunk'>@@ -184,6 +186,8 @@ void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc</div><div class='ctx'> </div><div class='ctx'> void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context);</div><div class='ctx'> </div><div class='add'>+unsigned int dcn32_calculate_mall_ways_from_bytes(const struct dc *dc, unsigned int total_size_in_mall_bytes);</div><div class='add'>+</div><div class='ctx'> /* definitions for run time init of reg offsets */</div><div class='ctx'> </div><div class='ctx'> /* CLK SRC */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c<br/>index 296a0a8e7145..e4b360d89b3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c</a></div><div class='hunk'>@@ -1288,6 +1288,8 @@ static struct hpo_dp_link_encoder *dcn321_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> #undef REG_STRUCT</div><div class='ctx'> #define REG_STRUCT hpo_dp_link_enc_regs</div><div class='hunk'>@@ -1579,10 +1581,20 @@ static struct dc_cap_funcs cap_funcs = {</div><div class='ctx'> </div><div class='ctx'> static void dcn321_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)</div><div class='ctx'> {</div><div class='add'>+	struct dml2_configuration_options dml2_opt = dc-&gt;dml2_options;</div><div class='add'>+</div><div class='ctx'> 	DC_FP_START();</div><div class='add'>+</div><div class='ctx'> 	dcn321_update_bw_bounding_box_fpu(dc, bw_params);</div><div class='add'>+</div><div class='add'>+	dml2_opt.use_clock_dc_limits = false;</div><div class='ctx'> 	if (dc-&gt;debug.using_dml2 &amp;&amp; dc-&gt;current_state &amp;&amp; dc-&gt;current_state-&gt;bw_ctx.dml2)</div><div class='del'>-		dml2_reinit(dc, &amp;dc-&gt;dml2_options, &amp;dc-&gt;current_state-&gt;bw_ctx.dml2);</div><div class='add'>+		dml2_reinit(dc, &amp;dml2_opt, &amp;dc-&gt;current_state-&gt;bw_ctx.dml2);</div><div class='add'>+</div><div class='add'>+	dml2_opt.use_clock_dc_limits = true;</div><div class='add'>+	if (dc-&gt;debug.using_dml2 &amp;&amp; dc-&gt;current_state &amp;&amp; dc-&gt;current_state-&gt;bw_ctx.dml2_dc_power_source)</div><div class='add'>+		dml2_reinit(dc, &amp;dml2_opt, &amp;dc-&gt;current_state-&gt;bw_ctx.dml2_dc_power_source);</div><div class='add'>+</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1610,6 +1622,7 @@ static struct resource_funcs dcn321_res_pool_funcs = {</div><div class='ctx'> 	.update_soc_for_wm_a = dcn30_update_soc_for_wm_a,</div><div class='ctx'> 	.add_phantom_pipes = dcn32_add_phantom_pipes,</div><div class='ctx'> 	.build_pipe_pix_clk_params = dcn20_build_pipe_pix_clk_params,</div><div class='add'>+	.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static uint32_t read_pipe_fuses(struct dc_context *ctx)</div><div class='hunk'>@@ -1697,7 +1710,9 @@ static bool dcn321_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.min_horizontal_blanking_period = 80;</div><div class='ctx'> 	dc-&gt;caps.dmdata_alloc_size = 2048;</div><div class='ctx'> 	dc-&gt;caps.mall_size_per_mem_channel = 4;</div><div class='del'>-	dc-&gt;caps.mall_size_total = 0;</div><div class='add'>+	/* total size = mall per channel * num channels * 1024 * 1024 */</div><div class='add'>+	dc-&gt;caps.mall_size_total = dc-&gt;caps.mall_size_per_mem_channel * dc-&gt;ctx-&gt;dc_bios-&gt;vram_info.num_chans * 1048576;</div><div class='add'>+</div><div class='ctx'> 	dc-&gt;caps.cursor_cache_size = dc-&gt;caps.max_cursor_size * dc-&gt;caps.max_cursor_size * 8;</div><div class='ctx'> 	dc-&gt;caps.cache_line_size = 64;</div><div class='ctx'> 	dc-&gt;caps.cache_num_ways = 16;</div><div class='hunk'>@@ -1998,30 +2013,10 @@ static bool dcn321_resource_construct(</div><div class='ctx'> 	dc-&gt;dml2_options.use_native_soc_bb_construction = true;</div><div class='ctx'> 	dc-&gt;dml2_options.minimize_dispclk_using_odm = true;</div><div class='ctx'> </div><div class='del'>-	dc-&gt;dml2_options.callbacks.dc = dc;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='add'>+	resource_init_common_dml2_callbacks(dc, &amp;dc-&gt;dml2_options);</div><div class='ctx'> 	dc-&gt;dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &amp;dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &amp;dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &amp;resource_update_pipes_for_stream_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &amp;resource_update_pipes_for_plane_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_mpc_slice_index = &amp;resource_get_mpc_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_odm_slice_index = &amp;resource_get_odm_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_opp_head = &amp;resource_get_opp_head;</div><div class='del'>-</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.dc = dc;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.add_phantom_plane = &amp;dc_state_add_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.add_phantom_stream = &amp;dc_state_add_phantom_stream;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.create_phantom_plane = &amp;dc_state_create_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.remove_phantom_plane = &amp;dc_state_remove_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.remove_phantom_stream = &amp;dc_state_remove_phantom_stream;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.create_phantom_stream = &amp;dc_state_create_phantom_stream;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.release_phantom_plane = &amp;dc_state_release_phantom_plane;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.release_phantom_stream = &amp;dc_state_release_phantom_stream;</div><div class='ctx'> 	dc-&gt;dml2_options.svp_pstate.callbacks.release_dsc = &amp;dcn20_release_dsc;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.get_pipe_subvp_type = &amp;dc_state_get_pipe_subvp_type;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.get_stream_subvp_type = &amp;dc_state_get_stream_subvp_type;</div><div class='del'>-	dc-&gt;dml2_options.svp_pstate.callbacks.get_paired_subvp_stream = &amp;dc_state_get_paired_subvp_stream;</div><div class='add'>+	dc-&gt;dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool-&gt;base.funcs-&gt;calculate_mall_ways_from_bytes;</div><div class='ctx'> </div><div class='ctx'> 	dc-&gt;dml2_options.svp_pstate.subvp_fw_processing_delay_us = dc-&gt;caps.subvp_fw_processing_delay_us;</div><div class='ctx'> 	dc-&gt;dml2_options.svp_pstate.subvp_prefetch_end_to_mall_start_us = dc-&gt;caps.subvp_prefetch_end_to_mall_start_us;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c<br/>index 5d52853cac96..2df8a742516c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c</a></div><div class='hunk'>@@ -721,7 +721,7 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 	.disable_dpp_power_gate = true,</div><div class='ctx'> 	.disable_hubp_power_gate = true,</div><div class='ctx'> 	.disable_optc_power_gate = true, /*should the same as above two*/</div><div class='del'>-	.disable_hpo_power_gate = true, /*dmubfw force domain25 on*/</div><div class='add'>+	.disable_hpo_power_gate = false, /*dmubfw force domain25 on*/</div><div class='ctx'> 	.disable_clock_gate = false,</div><div class='ctx'> 	.disable_dsc_power_gate = true,</div><div class='ctx'> 	.vsr_support = true,</div><div class='hunk'>@@ -764,12 +764,12 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.seamless_boot_odm_combine = DML_FAIL_SOURCE_PIXEL_FORMAT,</div><div class='ctx'> 	.enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/</div><div class='del'>-	.minimum_z8_residency_time = 2100,</div><div class='add'>+	.minimum_z8_residency_time = 1, /* Always allow when other conditions are met */</div><div class='ctx'> 	.using_dml2 = true,</div><div class='ctx'> 	.support_eDP1_5 = true,</div><div class='ctx'> 	.enable_hpo_pg_support = false,</div><div class='ctx'> 	.enable_legacy_fast_update = true,</div><div class='del'>-	.enable_single_display_2to1_odm_policy = false,</div><div class='add'>+	.enable_single_display_2to1_odm_policy = true,</div><div class='ctx'> 	.disable_idle_power_optimizations = false,</div><div class='ctx'> 	.dmcub_emulation = false,</div><div class='ctx'> 	.disable_boot_optimizations = false,</div><div class='hunk'>@@ -783,7 +783,7 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 	.psp_disabled_wa = true,</div><div class='ctx'> 	.ips2_eval_delay_us = 2000,</div><div class='ctx'> 	.ips2_entry_delay_us = 800,</div><div class='del'>-	.disable_dmub_reallow_idle = true,</div><div class='add'>+	.disable_dmub_reallow_idle = false,</div><div class='ctx'> 	.static_screen_wait_frames = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1368,6 +1368,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> #undef REG_STRUCT</div><div class='ctx'> #define REG_STRUCT hpo_dp_link_enc_regs</div><div class='hunk'>@@ -1734,7 +1736,9 @@ static bool dcn35_validate_bandwidth(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	bool out = false;</div><div class='ctx'> </div><div class='del'>-	out = dml2_validate(dc, context, fast_validate);</div><div class='add'>+	out = dml2_validate(dc, context,</div><div class='add'>+			context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='add'>+			fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	if (fast_validate)</div><div class='ctx'> 		return out;</div><div class='hunk'>@@ -2138,15 +2142,9 @@ static bool dcn35_resource_construct(</div><div class='ctx'> 		dc-&gt;dml2_options.minimize_dispclk_using_odm = true;</div><div class='ctx'> 	dc-&gt;dml2_options.enable_windowed_mpo_odm = dc-&gt;config.enable_windowed_mpo_odm;</div><div class='ctx'> </div><div class='del'>-	dc-&gt;dml2_options.callbacks.dc = dc;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='add'>+	resource_init_common_dml2_callbacks(dc, &amp;dc-&gt;dml2_options);</div><div class='ctx'> 	dc-&gt;dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &amp;dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &amp;dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &amp;resource_update_pipes_for_stream_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &amp;resource_update_pipes_for_plane_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_mpc_slice_index = &amp;resource_get_mpc_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_odm_slice_index = &amp;resource_get_odm_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_opp_head = &amp;resource_get_opp_head;</div><div class='add'>+</div><div class='ctx'> 	dc-&gt;dml2_options.max_segments_per_hubp = 24;</div><div class='ctx'> </div><div class='ctx'> 	dc-&gt;dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h<br/>index a51c4a9eaafe..f97bb4cb3761 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h</a></div><div class='hunk'>@@ -240,6 +240,8 @@ struct resource_pool *dcn35_create_resource_pool(</div><div class='ctx'> 	SRI_ARR(OTG_V_TOTAL_MAX, OTG, inst),\</div><div class='ctx'> 	SRI_ARR(OTG_V_TOTAL_MIN, OTG, inst),\</div><div class='ctx'> 	SRI_ARR(OTG_V_TOTAL_CONTROL, OTG, inst),\</div><div class='add'>+	SRI_ARR(OTG_V_COUNT_STOP_CONTROL, OTG, inst),\</div><div class='add'>+	SRI_ARR(OTG_V_COUNT_STOP_CONTROL2, OTG, inst),\</div><div class='ctx'> 	SRI_ARR(OTG_TRIGA_CNTL, OTG, inst),\</div><div class='ctx'> 	SRI_ARR(OTG_FORCE_COUNT_NOW_CNTL, OTG, inst),\</div><div class='ctx'> 	SRI_ARR(OTG_STATIC_SCREEN_CONTROL, OTG, inst),\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c<br/>index 909e14261f9b..ddf9560ab772 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c</a></div><div class='hunk'>@@ -758,7 +758,7 @@ static const struct dc_debug_options debug_defaults_drv = {</div><div class='ctx'> 	//must match enable_single_display_2to1_odm_policy to support dynamic ODM transitions</div><div class='ctx'> 	.enable_double_buffered_dsc_pg_support = true,</div><div class='ctx'> 	.enable_dp_dig_pixel_rate_div_policy = 1,</div><div class='del'>-	.disable_z10 = true,</div><div class='add'>+	.disable_z10 = false,</div><div class='ctx'> 	.ignore_pg = true,</div><div class='ctx'> 	.psp_disabled_wa = true,</div><div class='ctx'> 	.ips2_eval_delay_us = 2000,</div><div class='hunk'>@@ -1348,6 +1348,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(</div><div class='ctx'> </div><div class='ctx'> 	/* allocate HPO link encoder */</div><div class='ctx'> 	hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);</div><div class='add'>+	if (!hpo_dp_enc31)</div><div class='add'>+		return NULL; /* out of memory */</div><div class='ctx'> </div><div class='ctx'> #undef REG_STRUCT</div><div class='ctx'> #define REG_STRUCT hpo_dp_link_enc_regs</div><div class='hunk'>@@ -1714,19 +1716,20 @@ static bool dcn351_validate_bandwidth(struct dc *dc,</div><div class='ctx'> {</div><div class='ctx'> 	bool out = false;</div><div class='ctx'> </div><div class='del'>-	out = dml2_validate(dc, context, fast_validate);</div><div class='add'>+	out = dml2_validate(dc, context,</div><div class='add'>+			context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='add'>+			fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	if (fast_validate)</div><div class='ctx'> 		return out;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='del'>-	dcn351_decide_zstate_support(dc, context);</div><div class='add'>+	dcn35_decide_zstate_support(dc, context);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='ctx'> 	return out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static struct resource_funcs dcn351_res_pool_funcs = {</div><div class='ctx'> 	.destroy = dcn351_destroy_resource_pool,</div><div class='ctx'> 	.link_enc_create = dcn35_link_encoder_create,</div><div class='hunk'>@@ -1869,6 +1872,9 @@ static bool dcn351_resource_construct(</div><div class='ctx'> 	/* Use pipe context based otg sync logic */</div><div class='ctx'> 	dc-&gt;config.use_pipe_ctx_sync_logic = true;</div><div class='ctx'> </div><div class='add'>+	/* Use psp mailbox to enable assr */</div><div class='add'>+	dc-&gt;config.use_assr_psp_message = true;</div><div class='add'>+</div><div class='ctx'> 	/* read VBIOS LTTPR caps */</div><div class='ctx'> 	{</div><div class='ctx'> 		if (ctx-&gt;dc_bios-&gt;funcs-&gt;get_lttpr_caps) {</div><div class='hunk'>@@ -1888,6 +1894,8 @@ static bool dcn351_resource_construct(</div><div class='ctx'> 	if (dc-&gt;ctx-&gt;dce_environment == DCE_ENV_PRODUCTION_DRV)</div><div class='ctx'> 		dc-&gt;debug = debug_defaults_drv;</div><div class='ctx'> </div><div class='add'>+	/*HW default is to have all the FGCG enabled, SW no need to program them*/</div><div class='add'>+	dc-&gt;debug.enable_fine_grain_clock_gating.u32All = 0xFFFF;</div><div class='ctx'> 	// Init the vm_helper</div><div class='ctx'> 	if (dc-&gt;vm_helper)</div><div class='ctx'> 		vm_helper_init(dc-&gt;vm_helper, 16);</div><div class='hunk'>@@ -2118,15 +2126,9 @@ static bool dcn351_resource_construct(</div><div class='ctx'> 		dc-&gt;dml2_options.minimize_dispclk_using_odm = true;</div><div class='ctx'> 	dc-&gt;dml2_options.enable_windowed_mpo_odm = dc-&gt;config.enable_windowed_mpo_odm;</div><div class='ctx'> </div><div class='del'>-	dc-&gt;dml2_options.callbacks.dc = dc;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.build_scaling_params = &amp;resource_build_scaling_params;</div><div class='add'>+	resource_init_common_dml2_callbacks(dc, &amp;dc-&gt;dml2_options);</div><div class='ctx'> 	dc-&gt;dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &amp;dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &amp;dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &amp;resource_update_pipes_for_stream_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &amp;resource_update_pipes_for_plane_with_slice_count;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_mpc_slice_index = &amp;resource_get_mpc_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_odm_slice_index = &amp;resource_get_odm_slice_index;</div><div class='del'>-	dc-&gt;dml2_options.callbacks.get_opp_head = &amp;resource_get_opp_head;</div><div class='add'>+</div><div class='ctx'> 	dc-&gt;dml2_options.max_segments_per_hubp = 24;</div><div class='ctx'> 	dc-&gt;dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h<br/>index 7785908a6676..2fde1f043d50 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/dmub_srv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/dmub_srv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/dmub_srv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dmub/dmub_srv.h</a></div><div class='hunk'>@@ -71,6 +71,8 @@</div><div class='ctx'> extern "C" {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define DMUB_PC_SNAPSHOT_COUNT 10</div><div class='add'>+</div><div class='ctx'> /* Forward declarations */</div><div class='ctx'> struct dmub_srv;</div><div class='ctx'> struct dmub_srv_common_regs;</div><div class='hunk'>@@ -295,18 +297,30 @@ struct dmub_srv_hw_params {</div><div class='ctx'> 	bool dpia_hpd_int_enable_supported;</div><div class='ctx'> 	bool disable_clock_gate;</div><div class='ctx'> 	bool disallow_dispclk_dppclk_ds;</div><div class='add'>+	bool ips_sequential_ono;</div><div class='ctx'> 	enum dmub_memory_access_type mem_access_type;</div><div class='ctx'> 	enum dmub_ips_disable_type disable_ips;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * struct dmub_srv_debug - Debug info for dmub_srv</div><div class='add'>+ * @timeout_occured: Indicates a timeout occured on any message from driver to dmub</div><div class='add'>+ * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored</div><div class='add'>+ */</div><div class='add'>+struct dmub_srv_debug {</div><div class='add'>+	bool timeout_occured;</div><div class='add'>+	union dmub_rb_cmd timeout_cmd;</div><div class='add'>+	unsigned long long timestamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for</div><div class='ctx'>  * debugging purposes, including logging, crash analysis, etc.</div><div class='ctx'>  */</div><div class='ctx'> struct dmub_diagnostic_data {</div><div class='ctx'> 	uint32_t dmcub_version;</div><div class='ctx'> 	uint32_t scratch[17];</div><div class='del'>-	uint32_t pc;</div><div class='add'>+	uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];</div><div class='ctx'> 	uint32_t undefined_address_fault_addr;</div><div class='ctx'> 	uint32_t inst_fetch_fault_addr;</div><div class='ctx'> 	uint32_t data_write_fault_addr;</div><div class='hunk'>@@ -317,6 +331,7 @@ struct dmub_diagnostic_data {</div><div class='ctx'> 	uint32_t inbox0_wptr;</div><div class='ctx'> 	uint32_t inbox0_size;</div><div class='ctx'> 	uint32_t gpint_datain0;</div><div class='add'>+	struct dmub_srv_debug timeout_info;</div><div class='ctx'> 	uint8_t is_dmcub_enabled : 1;</div><div class='ctx'> 	uint8_t is_dmcub_soft_reset : 1;</div><div class='ctx'> 	uint8_t is_dmcub_secure_reset : 1;</div><div class='hunk'>@@ -506,6 +521,7 @@ struct dmub_srv {</div><div class='ctx'> 	struct dmub_visual_confirm_color visual_confirm_color;</div><div class='ctx'> </div><div class='ctx'> 	enum dmub_srv_power_state_type power_state;</div><div class='add'>+	struct dmub_srv_debug debug;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h<br/>index af3fe8bb0728..e85fd3ac52c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h</a></div><div class='hunk'>@@ -97,6 +97,9 @@</div><div class='ctx'> /* Maximum number of planes on any ASIC. */</div><div class='ctx'> #define DMUB_MAX_PLANES 6</div><div class='ctx'> </div><div class='add'>+/* Maximum number of phantom planes on any ASIC */</div><div class='add'>+#define DMUB_MAX_PHANTOM_PLANES ((DMUB_MAX_PLANES) / 2)</div><div class='add'>+</div><div class='ctx'> /* Trace buffer offset for entry */</div><div class='ctx'> #define TRACE_BUFFER_ENTRY_OFFSET  16</div><div class='ctx'> </div><div class='hunk'>@@ -194,6 +197,11 @@ union abm_flags {</div><div class='ctx'> 		 * of user backlight level.</div><div class='ctx'> 		 */</div><div class='ctx'> 		unsigned int abm_gradual_bl_change : 1;</div><div class='add'>+</div><div class='add'>+		/**</div><div class='add'>+		 * @abm_new_frame: Indicates if a new frame update needed for ABM to ramp up into steady</div><div class='add'>+		 */</div><div class='add'>+		unsigned int abm_new_frame : 1;</div><div class='ctx'> 	} bitfields;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int u32All;</div><div class='hunk'>@@ -461,7 +469,7 @@ struct dmub_feature_caps {</div><div class='ctx'> 	 * Max PSR version supported by FW.</div><div class='ctx'> 	 */</div><div class='ctx'> 	uint8_t psr;</div><div class='del'>-	uint8_t fw_assisted_mclk_switch;</div><div class='add'>+	uint8_t fw_assisted_mclk_switch_ver;</div><div class='ctx'> 	uint8_t reserved[4];</div><div class='ctx'> 	uint8_t subvp_psr_support;</div><div class='ctx'> 	uint8_t gecc_enable;</div><div class='hunk'>@@ -619,6 +627,7 @@ enum dmub_ips_disable_type {</div><div class='ctx'> 	DMUB_IPS_DISABLE_IPS2 = 3,</div><div class='ctx'> 	DMUB_IPS_DISABLE_IPS2_Z10 = 4,</div><div class='ctx'> 	DMUB_IPS_DISABLE_DYNAMIC = 5,</div><div class='add'>+	DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF = 6,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DMUB_IPS1_ALLOW_MASK 0x00000001</div><div class='hunk'>@@ -653,6 +662,7 @@ union dmub_fw_boot_options {</div><div class='ctx'> 		uint32_t disable_timeout_recovery : 1; /* 1 if timeout recovery should be disabled */</div><div class='ctx'> 		uint32_t ips_pg_disable: 1; /* 1 to disable ONO domains power gating*/</div><div class='ctx'> 		uint32_t ips_disable: 3; /* options to disable ips support*/</div><div class='add'>+		uint32_t ips_sequential_ono: 1; /**&lt; 1 to enable sequential ONO IPS sequence */</div><div class='ctx'> 		uint32_t reserved : 9; /**&lt; reserved */</div><div class='ctx'> 	} bits; /**&lt; boot bits */</div><div class='ctx'> 	uint32_t all; /**&lt; 32-bit access to bits */</div><div class='hunk'>@@ -695,7 +705,8 @@ union dmub_shared_state_ips_fw_signals {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		uint32_t ips1_commit : 1;  /**&lt; 1 if in IPS1 */</div><div class='ctx'> 		uint32_t ips2_commit : 1; /**&lt; 1 if in IPS2 */</div><div class='del'>-		uint32_t reserved_bits : 30; /**&lt; Reversed */</div><div class='add'>+		uint32_t in_idle : 1; /**&lt; 1 if DMCUB is in idle */</div><div class='add'>+		uint32_t reserved_bits : 29; /**&lt; Reversed */</div><div class='ctx'> 	} bits;</div><div class='ctx'> 	uint32_t all;</div><div class='ctx'> };</div><div class='hunk'>@@ -724,7 +735,13 @@ union dmub_shared_state_ips_driver_signals {</div><div class='ctx'>  */</div><div class='ctx'> struct dmub_shared_state_ips_fw {</div><div class='ctx'> 	union dmub_shared_state_ips_fw_signals signals; /**&lt; 4 bytes, IPS signal bits */</div><div class='del'>-	uint32_t reserved[61]; /**&lt; Reversed, to be updated when adding new fields. */</div><div class='add'>+	uint32_t rcg_entry_count; /**&lt; Entry counter for RCG */</div><div class='add'>+	uint32_t rcg_exit_count; /**&lt; Exit counter for RCG */</div><div class='add'>+	uint32_t ips1_entry_count; /**&lt; Entry counter for IPS1 */</div><div class='add'>+	uint32_t ips1_exit_count; /**&lt; Exit counter for IPS1 */</div><div class='add'>+	uint32_t ips2_entry_count; /**&lt; Entry counter for IPS2 */</div><div class='add'>+	uint32_t ips2_exit_count; /**&lt; Exit counter for IPS2 */</div><div class='add'>+	uint32_t reserved[55]; /**&lt; Reversed, to be updated when adding new fields. */</div><div class='ctx'> }; /* 248-bytes, fixed */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -812,6 +829,10 @@ enum dmub_cmd_vbios_type {</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__VBIOS_TRANSMITTER_QUERY_DP_ALT  = 26,</div><div class='ctx'> 	/**</div><div class='add'>+	 * Control PHY FSM</div><div class='add'>+	 */</div><div class='add'>+	DMUB_CMD__VBIOS_TRANSMITTER_SET_PHY_FSM  = 29,</div><div class='add'>+	/**</div><div class='ctx'> 	 * Controls domain power gating</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__VBIOS_DOMAIN_CONTROL = 28,</div><div class='hunk'>@@ -1186,6 +1207,11 @@ enum dmub_cmd_type {</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__DPIA_HPD_INT_ENABLE = 86,</div><div class='ctx'> </div><div class='add'>+	/**</div><div class='add'>+	 * Command type used for all PSP commands.</div><div class='add'>+	 */</div><div class='add'>+	DMUB_CMD__PSP = 88,</div><div class='add'>+</div><div class='ctx'> 	DMUB_CMD__VBIOS = 128,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1588,7 +1614,7 @@ struct dmub_rb_cmd_idle_opt_dcn_restore {</div><div class='ctx'>  */</div><div class='ctx'> struct dmub_dcn_notify_idle_cntl_data {</div><div class='ctx'> 	uint8_t driver_idle;</div><div class='del'>-	uint8_t pad[1];</div><div class='add'>+	uint8_t reserved[59];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2309,6 +2335,11 @@ enum phy_link_rate {</div><div class='ctx'> 	 * UHBR10 - 20.0 Gbps/Lane</div><div class='ctx'> 	 */</div><div class='ctx'> 	PHY_RATE_2000 = 11,</div><div class='add'>+</div><div class='add'>+	PHY_RATE_675 = 12,</div><div class='add'>+	/**</div><div class='add'>+	 * Rate 12 - 6.75 Gbps/Lane</div><div class='add'>+	 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2327,6 +2358,7 @@ enum dmub_phy_fsm_state {</div><div class='ctx'> 	DMUB_PHY_FSM_POWER_DOWN,</div><div class='ctx'> 	DMUB_PHY_FSM_PLL_EN,</div><div class='ctx'> 	DMUB_PHY_FSM_TX_EN,</div><div class='add'>+	DMUB_PHY_FSM_TX_EN_TEST_MODE,</div><div class='ctx'> 	DMUB_PHY_FSM_FAST_LP,</div><div class='ctx'> 	DMUB_PHY_FSM_P2_PLL_OFF_CPM,</div><div class='ctx'> 	DMUB_PHY_FSM_P2_PLL_OFF_PG,</div><div class='hunk'>@@ -2931,18 +2963,49 @@ struct dmub_rb_cmd_psr_set_power_opt {</div><div class='ctx'> 	struct dmub_cmd_psr_set_power_opt_data psr_set_power_opt_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * Definition of Replay Residency GPINT command.</div><div class='add'>+ * Bit[0] - Residency mode for Revision 0</div><div class='add'>+ * Bit[1] - Enable/Disable state</div><div class='add'>+ * Bit[2-3] - Revision number</div><div class='add'>+ * Bit[4-7] - Residency mode for Revision 1</div><div class='add'>+ * Bit[8] - Panel instance</div><div class='add'>+ * Bit[9-15] - Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+enum pr_residency_mode {</div><div class='add'>+	PR_RESIDENCY_MODE_PHY = 0x0,</div><div class='add'>+	PR_RESIDENCY_MODE_ALPM,</div><div class='add'>+	PR_RESIDENCY_MODE_IPS2,</div><div class='add'>+	PR_RESIDENCY_MODE_FRAME_CNT,</div><div class='add'>+	PR_RESIDENCY_MODE_ENABLEMENT_PERIOD,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define REPLAY_RESIDENCY_MODE_SHIFT            (0)</div><div class='ctx'> #define REPLAY_RESIDENCY_ENABLE_SHIFT          (1)</div><div class='add'>+#define REPLAY_RESIDENCY_REVISION_SHIFT        (2)</div><div class='add'>+#define REPLAY_RESIDENCY_MODE2_SHIFT           (4)</div><div class='ctx'> </div><div class='ctx'> #define REPLAY_RESIDENCY_MODE_MASK             (0x1 &lt;&lt; REPLAY_RESIDENCY_MODE_SHIFT)</div><div class='del'>-# define REPLAY_RESIDENCY_MODE_PHY             (0x0 &lt;&lt; REPLAY_RESIDENCY_MODE_SHIFT)</div><div class='del'>-# define REPLAY_RESIDENCY_MODE_ALPM            (0x1 &lt;&lt; REPLAY_RESIDENCY_MODE_SHIFT)</div><div class='del'>-# define REPLAY_RESIDENCY_MODE_IPS             0x10</div><div class='add'>+# define REPLAY_RESIDENCY_FIELD_MODE_PHY       (0x0 &lt;&lt; REPLAY_RESIDENCY_MODE_SHIFT)</div><div class='add'>+# define REPLAY_RESIDENCY_FIELD_MODE_ALPM      (0x1 &lt;&lt; REPLAY_RESIDENCY_MODE_SHIFT)</div><div class='add'>+</div><div class='add'>+#define REPLAY_RESIDENCY_MODE2_MASK            (0xF &lt;&lt; REPLAY_RESIDENCY_MODE2_SHIFT)</div><div class='add'>+# define REPLAY_RESIDENCY_FIELD_MODE2_IPS      (0x1 &lt;&lt; REPLAY_RESIDENCY_MODE2_SHIFT)</div><div class='add'>+# define REPLAY_RESIDENCY_FIELD_MODE2_FRAME_CNT    (0x2 &lt;&lt; REPLAY_RESIDENCY_MODE2_SHIFT)</div><div class='add'>+# define REPLAY_RESIDENCY_FIELD_MODE2_EN_PERIOD	(0x3 &lt;&lt; REPLAY_RESIDENCY_MODE2_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #define REPLAY_RESIDENCY_ENABLE_MASK           (0x1 &lt;&lt; REPLAY_RESIDENCY_ENABLE_SHIFT)</div><div class='ctx'> # define REPLAY_RESIDENCY_DISABLE              (0x0 &lt;&lt; REPLAY_RESIDENCY_ENABLE_SHIFT)</div><div class='ctx'> # define REPLAY_RESIDENCY_ENABLE               (0x1 &lt;&lt; REPLAY_RESIDENCY_ENABLE_SHIFT)</div><div class='ctx'> </div><div class='add'>+#define REPLAY_RESIDENCY_REVISION_MASK         (0x3 &lt;&lt; REPLAY_RESIDENCY_REVISION_SHIFT)</div><div class='add'>+# define REPLAY_RESIDENCY_REVISION_0           (0x0 &lt;&lt; REPLAY_RESIDENCY_REVISION_SHIFT)</div><div class='add'>+# define REPLAY_RESIDENCY_REVISION_1           (0x1 &lt;&lt; REPLAY_RESIDENCY_REVISION_SHIFT)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Definition of a replay_state.</div><div class='add'>+ */</div><div class='ctx'> enum replay_state {</div><div class='ctx'> 	REPLAY_STATE_0			= 0x0,</div><div class='ctx'> 	REPLAY_STATE_1			= 0x10,</div><div class='hunk'>@@ -3004,6 +3067,11 @@ enum dmub_cmd_replay_type {</div><div class='ctx'> 	 * Set pseudo vtotal</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL = 7,</div><div class='add'>+	/**</div><div class='add'>+	 * Set adaptive sync sdp enabled</div><div class='add'>+	 */</div><div class='add'>+	DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP = 8,</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3205,6 +3273,20 @@ struct dmub_cmd_replay_set_pseudo_vtotal {</div><div class='ctx'> 	 */</div><div class='ctx'> 	uint8_t pad;</div><div class='ctx'> };</div><div class='add'>+struct dmub_cmd_replay_disabled_adaptive_sync_sdp_data {</div><div class='add'>+	/**</div><div class='add'>+	 * Panel Instance.</div><div class='add'>+	 * Panel isntance to identify which replay_state to use</div><div class='add'>+	 * Currently the support is only for 0 or 1</div><div class='add'>+	 */</div><div class='add'>+	uint8_t panel_inst;</div><div class='add'>+	/**</div><div class='add'>+	 * enabled: set adaptive sync sdp enabled</div><div class='add'>+	 */</div><div class='add'>+	uint8_t force_disabled;</div><div class='add'>+</div><div class='add'>+	uint8_t pad[2];</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * Definition of a DMUB_CMD__SET_REPLAY_POWER_OPT command.</div><div class='hunk'>@@ -3309,6 +3391,20 @@ struct dmub_rb_cmd_replay_set_pseudo_vtotal {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * Definition of a DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP command.</div><div class='add'>+ */</div><div class='add'>+struct dmub_rb_cmd_replay_disabled_adaptive_sync_sdp {</div><div class='add'>+	/**</div><div class='add'>+	 * Command header.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_cmd_header header;</div><div class='add'>+	/**</div><div class='add'>+	 * Definition of DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP command.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_cmd_replay_disabled_adaptive_sync_sdp_data data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * Data passed from driver to FW in  DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER command.</div><div class='ctx'>  */</div><div class='ctx'> struct dmub_cmd_replay_frameupdate_timer_data {</div><div class='hunk'>@@ -3363,6 +3459,11 @@ union dmub_replay_cmd_set {</div><div class='ctx'> 	 * Definition of DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command data.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct dmub_cmd_replay_set_pseudo_vtotal pseudo_vtotal_data;</div><div class='add'>+	/**</div><div class='add'>+	 * Definition of DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP command data.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_cmd_replay_disabled_adaptive_sync_sdp_data disabled_adaptive_sync_sdp_data;</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3445,7 +3546,7 @@ enum hw_lock_client {</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * Replay is the client of HW Lock Manager.</div><div class='ctx'> 	 */</div><div class='del'>-	HW_LOCK_CLIENT_REPLAY           = 4,</div><div class='add'>+	HW_LOCK_CLIENT_REPLAY		= 4,</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * Invalid client.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -4038,6 +4139,10 @@ enum dmub_cmd_panel_cntl_type {</div><div class='ctx'> 	 * Queries backlight info for the embedded panel.</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__PANEL_CNTL_QUERY_BACKLIGHT_INFO = 1,</div><div class='add'>+	/**</div><div class='add'>+	 * Sets the PWM Freq as per user's requirement.</div><div class='add'>+	 */</div><div class='add'>+	DMUB_CMD__PANEL_DEBUG_PWM_FREQ = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4139,6 +4244,34 @@ struct dmub_rb_cmd_transmitter_query_dp_alt {</div><div class='ctx'> 	struct dmub_rb_cmd_transmitter_query_dp_alt_data data; /**&lt; payload */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct phy_test_mode {</div><div class='add'>+	uint8_t mode;</div><div class='add'>+	uint8_t pat0;</div><div class='add'>+	uint8_t pad[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Data passed in/out in a DMUB_CMD__VBIOS_TRANSMITTER_SET_PHY_FSM command.</div><div class='add'>+ */</div><div class='add'>+struct dmub_rb_cmd_transmitter_set_phy_fsm_data {</div><div class='add'>+	uint8_t phy_id; /**&lt; 0=UNIPHYA, 1=UNIPHYB, 2=UNIPHYC, 3=UNIPHYD, 4=UNIPHYE, 5=UNIPHYF */</div><div class='add'>+	uint8_t mode; /**&lt; HDMI/DP/DP2 etc */</div><div class='add'>+	uint8_t lane_num; /**&lt; Number of lanes */</div><div class='add'>+	uint32_t symclk_100Hz; /**&lt; PLL symclock in 100hz */</div><div class='add'>+	struct phy_test_mode test_mode;</div><div class='add'>+	enum dmub_phy_fsm_state state;</div><div class='add'>+	uint32_t status;</div><div class='add'>+	uint8_t pad;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Definition of a DMUB_CMD__VBIOS_TRANSMITTER_SET_PHY_FSM command.</div><div class='add'>+ */</div><div class='add'>+struct dmub_rb_cmd_transmitter_set_phy_fsm {</div><div class='add'>+	struct dmub_cmd_header header; /**&lt; header */</div><div class='add'>+	struct dmub_rb_cmd_transmitter_set_phy_fsm_data data; /**&lt; payload */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Maximum number of bytes a chunk sent to DMUB for parsing</div><div class='ctx'>  */</div><div class='hunk'>@@ -4261,6 +4394,65 @@ struct dmub_rb_cmd_secure_display {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * Command type of a DMUB_CMD__PSP command</div><div class='add'>+ */</div><div class='add'>+enum dmub_cmd_psp_type {</div><div class='add'>+	DMUB_CMD__PSP_ASSR_ENABLE = 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Data passed from driver to FW in a DMUB_CMD__PSP_ASSR_ENABLE command.</div><div class='add'>+ */</div><div class='add'>+struct dmub_cmd_assr_enable_data {</div><div class='add'>+	/**</div><div class='add'>+	 * ASSR enable or disable.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t enable;</div><div class='add'>+	/**</div><div class='add'>+	 * PHY port type.</div><div class='add'>+	 * Indicates eDP / non-eDP port type</div><div class='add'>+	 */</div><div class='add'>+	uint8_t phy_port_type;</div><div class='add'>+	/**</div><div class='add'>+	 * PHY port ID.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t phy_port_id;</div><div class='add'>+	/**</div><div class='add'>+	 * Link encoder index.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t link_enc_index;</div><div class='add'>+	/**</div><div class='add'>+	 * HPO mode.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t hpo_mode;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Reserved field.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t reserved[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Definition of a DMUB_CMD__PSP_ASSR_ENABLE command.</div><div class='add'>+ */</div><div class='add'>+struct dmub_rb_cmd_assr_enable {</div><div class='add'>+	/**</div><div class='add'>+	 * Command header.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_cmd_header header;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Assr data.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_cmd_assr_enable_data assr_data;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Reserved field.</div><div class='add'>+	 */</div><div class='add'>+	uint32_t reserved[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * union dmub_rb_cmd - DMUB inbox command.</div><div class='ctx'>  */</div><div class='ctx'> union dmub_rb_cmd {</div><div class='hunk'>@@ -4451,6 +4643,10 @@ union dmub_rb_cmd {</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct dmub_rb_cmd_transmitter_query_dp_alt query_dp_alt;</div><div class='ctx'> 	/**</div><div class='add'>+	 * Definition of a DMUB_CMD__VBIOS_TRANSMITTER_SET_PHY_FSM command.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_rb_cmd_transmitter_set_phy_fsm set_phy_fsm;</div><div class='add'>+	/**</div><div class='ctx'> 	 * Definition of a DMUB_CMD__DPIA_DIG1_CONTROL command.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct dmub_rb_cmd_dig1_dpia_control dig1_dpia_control;</div><div class='hunk'>@@ -4518,6 +4714,15 @@ union dmub_rb_cmd {</div><div class='ctx'> 	 * Definition of a DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct dmub_rb_cmd_replay_set_pseudo_vtotal replay_set_pseudo_vtotal;</div><div class='add'>+	/**</div><div class='add'>+	 * Definition of a DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP command.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_rb_cmd_replay_disabled_adaptive_sync_sdp replay_disabled_adaptive_sync_sdp;</div><div class='add'>+	/**</div><div class='add'>+	 * Definition of a DMUB_CMD__PSP_ASSR_ENABLE command.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_rb_cmd_assr_enable assr_enable;</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c<br/>index cae96fba6349..e500ca9ae09c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c</a></div><div class='hunk'>@@ -472,4 +472,5 @@ void dmub_dcn20_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnosti</div><div class='ctx'> </div><div class='ctx'> 	REG_GET(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE, &amp;is_cw6_enabled);</div><div class='ctx'> 	diag_data-&gt;is_cw6_enabled = is_cw6_enabled;</div><div class='add'>+	diag_data-&gt;timeout_info = dmub-&gt;debug;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c<br/>index 2bcf5fb87dd9..662c34e9495c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c</a></div><div class='hunk'>@@ -466,6 +466,7 @@ void dmub_dcn31_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnosti</div><div class='ctx'> </div><div class='ctx'> 	REG_GET(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE, &amp;is_cw6_enabled);</div><div class='ctx'> 	diag_data-&gt;is_cw6_enabled = is_cw6_enabled;</div><div class='add'>+	diag_data-&gt;timeout_info = dmub-&gt;debug;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dmub_dcn31_should_detect(struct dmub_srv *dmub)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c<br/>index 0d521eeda050..e1da270502cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c</a></div><div class='hunk'>@@ -478,6 +478,8 @@ void dmub_dcn32_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnosti</div><div class='ctx'> 	diag_data-&gt;is_cw6_enabled = is_cw6_enabled;</div><div class='ctx'> </div><div class='ctx'> 	diag_data-&gt;gpint_datain0 = REG_READ(DMCUB_GPINT_DATAIN0);</div><div class='add'>+</div><div class='add'>+	diag_data-&gt;timeout_info = dmub-&gt;debug;</div><div class='ctx'> }</div><div class='ctx'> void dmub_dcn32_configure_dmub_in_system_memory(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c<br/>index 53f359f3fae2..70e63aeb8f89 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c</a></div><div class='hunk'>@@ -420,6 +420,7 @@ void dmub_dcn35_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmu</div><div class='ctx'> 	boot_options.bits.disable_clk_ds = params-&gt;disallow_dispclk_dppclk_ds;</div><div class='ctx'> 	boot_options.bits.disable_clk_gate = params-&gt;disable_clock_gate;</div><div class='ctx'> 	boot_options.bits.ips_disable = params-&gt;disable_ips;</div><div class='add'>+	boot_options.bits.ips_sequential_ono = params-&gt;ips_sequential_ono;</div><div class='ctx'> </div><div class='ctx'> 	REG_WRITE(DMCUB_SCRATCH14, boot_options.all);</div><div class='ctx'> }</div><div class='hunk'>@@ -516,6 +517,7 @@ void dmub_dcn35_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnosti</div><div class='ctx'> 	diag_data-&gt;is_cw6_enabled = is_cw6_enabled;</div><div class='ctx'> </div><div class='ctx'> 	diag_data-&gt;gpint_datain0 = REG_READ(DMCUB_GPINT_DATAIN0);</div><div class='add'>+	diag_data-&gt;timeout_info = dmub-&gt;debug;</div><div class='ctx'> }</div><div class='ctx'> void dmub_dcn35_configure_dmub_in_system_memory(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/dal_types.h b/drivers/gpu/drm/amd/display/include/dal_types.h<br/>index 1c6f24cb1d2f..447768dec887 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/dal_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/dal_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/dal_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/include/dal_types.h</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #define __DAL_TYPES_H__</div><div class='ctx'> </div><div class='ctx'> #include "signal_types.h"</div><div class='del'>-#include "dc_types.h"</div><div class='ctx'> </div><div class='ctx'> struct dal_logger;</div><div class='ctx'> struct dc_bios;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/grph_object_id.h b/drivers/gpu/drm/amd/display/include/grph_object_id.h<br/>index c6bbd262f1ac..08ee0350b31f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/grph_object_id.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/grph_object_id.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/grph_object_id.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/include/grph_object_id.h</a></div><div class='hunk'>@@ -226,8 +226,8 @@ enum dp_alt_mode {</div><div class='ctx'> </div><div class='ctx'> struct graphics_object_id {</div><div class='ctx'> 	uint32_t  id:8;</div><div class='del'>-	uint32_t  enum_id:4;</div><div class='del'>-	uint32_t  type:4;</div><div class='add'>+	enum object_enum_id  enum_id;</div><div class='add'>+	enum object_type  type;</div><div class='ctx'> 	uint32_t  reserved:16; /* for padding. total size should be u32 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/link_service_types.h b/drivers/gpu/drm/amd/display/include/link_service_types.h<br/>index 92dbff22a7c6..1867aac57cf2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/link_service_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/link_service_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/link_service_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/include/link_service_types.h</a></div><div class='hunk'>@@ -73,7 +73,6 @@ struct link_training_settings {</div><div class='ctx'> 	enum dc_pre_emphasis *pre_emphasis;</div><div class='ctx'> 	enum dc_post_cursor2 *post_cursor2;</div><div class='ctx'> 	bool should_set_fec_ready;</div><div class='del'>-	/* TODO - factor lane_settings out because it changes during LT */</div><div class='ctx'> 	union dc_dp_ffe_preset *ffe_preset;</div><div class='ctx'> </div><div class='ctx'> 	uint16_t cr_pattern_time;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h b/drivers/gpu/drm/amd/display/include/logger_types.h<br/>index f39e2785e618..83479951732a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/logger_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/logger_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/logger_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/include/logger_types.h</a></div><div class='hunk'>@@ -64,6 +64,7 @@</div><div class='ctx'> #define DC_LOG_DWB(...) drm_dbg((DC_LOGGER)-&gt;dev, __VA_ARGS__)</div><div class='ctx'> #define DC_LOG_DP2(...) drm_dbg_dp((DC_LOGGER)-&gt;dev, __VA_ARGS__)</div><div class='ctx'> #define DC_LOG_AUTO_DPM_TEST(...) pr_debug("[AutoDPMTest]: "__VA_ARGS__)</div><div class='add'>+#define DC_LOG_IPS(...) pr_debug("[IPS]: "__VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> struct dc_log_buffer_ctx {</div><div class='ctx'> 	char *buf;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/signal_types.h b/drivers/gpu/drm/amd/display/include/signal_types.h<br/>index 1b14b17a79c7..a10d6b988aab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/signal_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/include/signal_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/signal_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/include/signal_types.h</a></div><div class='hunk'>@@ -118,6 +118,19 @@ static inline bool dc_is_dvi_signal(enum signal_type signal)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool dc_is_tmds_signal(enum signal_type signal)</div><div class='add'>+{</div><div class='add'>+	switch (signal) {</div><div class='add'>+	case SIGNAL_TYPE_DVI_SINGLE_LINK:</div><div class='add'>+	case SIGNAL_TYPE_DVI_DUAL_LINK:</div><div class='add'>+	case SIGNAL_TYPE_HDMI_TYPE_A:</div><div class='add'>+		return true;</div><div class='add'>+	break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool dc_is_dvi_single_link_signal(enum signal_type signal)</div><div class='ctx'> {</div><div class='ctx'> 	return (signal == SIGNAL_TYPE_DVI_SINGLE_LINK);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/color/color_gamma.c b/drivers/gpu/drm/amd/display/modules/color/color_gamma.c<br/>index 8b5c27857671..3699e633801d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/color/color_gamma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/color/color_gamma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/color/color_gamma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/modules/color/color_gamma.c</a></div><div class='hunk'>@@ -1059,7 +1059,7 @@ static bool build_freesync_hdr(struct pwl_float_data_ex *rgb_regamma,</div><div class='ctx'> 	struct fixed31_32 min_display;</div><div class='ctx'> 	struct fixed31_32 max_content;</div><div class='ctx'> 	struct fixed31_32 clip = dc_fixpt_one;</div><div class='del'>-	struct fixed31_32 output;</div><div class='add'>+	struct fixed31_32 output = dc_fixpt_zero;</div><div class='ctx'> 	bool use_eetf = false;</div><div class='ctx'> 	bool is_clipped = false;</div><div class='ctx'> 	struct fixed31_32 sdr_white_level;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c<br/>index 3955b7e4b2e2..d09627c15b9c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/freesync/freesync.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/freesync/freesync.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/freesync/freesync.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/modules/freesync/freesync.c</a></div><div class='hunk'>@@ -158,13 +158,13 @@ static unsigned int calc_v_total_from_duration(</div><div class='ctx'> 	if (duration_in_us &gt; vrr-&gt;max_duration_in_us)</div><div class='ctx'> 		duration_in_us = vrr-&gt;max_duration_in_us;</div><div class='ctx'> </div><div class='del'>-	if (dc_is_hdmi_signal(stream-&gt;signal)) {</div><div class='add'>+	if (dc_is_hdmi_signal(stream-&gt;signal)) { // change for HDMI to comply with spec</div><div class='ctx'> 		uint32_t h_total_up_scaled;</div><div class='ctx'> </div><div class='ctx'> 		h_total_up_scaled = stream-&gt;timing.h_total * 10000;</div><div class='ctx'> 		v_total = div_u64((unsigned long long)duration_in_us</div><div class='ctx'> 					* stream-&gt;timing.pix_clk_100hz + (h_total_up_scaled - 1),</div><div class='del'>-					h_total_up_scaled);</div><div class='add'>+					h_total_up_scaled); //ceiling for MMax and MMin for MVRR</div><div class='ctx'> 	} else {</div><div class='ctx'> 		v_total = div64_u64(div64_u64(((unsigned long long)(</div><div class='ctx'> 					duration_in_us) * (stream-&gt;timing.pix_clk_100hz / 10)),</div><div class='hunk'>@@ -1057,7 +1057,7 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,</div><div class='ctx'> 			in_out_vrr-&gt;fixed_refresh_in_uhz = 0;</div><div class='ctx'> </div><div class='ctx'> 		refresh_range = div_u64(in_out_vrr-&gt;max_refresh_in_uhz + 500000, 1000000) -</div><div class='del'>-+				div_u64(in_out_vrr-&gt;min_refresh_in_uhz + 500000, 1000000);</div><div class='add'>+				div_u64(in_out_vrr-&gt;min_refresh_in_uhz + 500000, 1000000);</div><div class='ctx'> </div><div class='ctx'> 		in_out_vrr-&gt;supported = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1126,6 +1126,8 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,</div><div class='ctx'> 		in_out_vrr-&gt;adjust.v_total_min = stream-&gt;timing.v_total;</div><div class='ctx'> 		in_out_vrr-&gt;adjust.v_total_max = stream-&gt;timing.v_total;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	in_out_vrr-&gt;adjust.allow_otg_v_count_halt = (in_config-&gt;state == VRR_STATE_ACTIVE_FIXED) ? true : false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c<br/>index 733f22bed021..c996365e84b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c</a></div><div class='hunk'>@@ -151,7 +151,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static enum mod_hdcp_status poll_l_prime_available(struct mod_hdcp *hdcp)</div><div class='ctx'> {</div><div class='del'>-	enum mod_hdcp_status status;</div><div class='add'>+	enum mod_hdcp_status status = MOD_HDCP_STATUS_FAILURE;</div><div class='ctx'> 	uint8_t size;</div><div class='ctx'> 	uint16_t max_wait = 20; // units of ms</div><div class='ctx'> 	uint16_t num_polls = 5;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c<br/>index f7b5583ee609..8e9caae7c955 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c</a></div><div class='hunk'>@@ -156,6 +156,10 @@ static enum mod_hdcp_status read(struct mod_hdcp *hdcp,</div><div class='ctx'> 	uint32_t cur_size = 0;</div><div class='ctx'> 	uint32_t data_offset = 0;</div><div class='ctx'> </div><div class='add'>+	if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID) {</div><div class='add'>+		return MOD_HDCP_STATUS_DDC_FAILURE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (is_dp_hdcp(hdcp)) {</div><div class='ctx'> 		while (buf_len &gt; 0) {</div><div class='ctx'> 			cur_size = MIN(buf_len, HDCP_MAX_AUX_TRANSACTION_SIZE);</div><div class='hunk'>@@ -215,6 +219,10 @@ static enum mod_hdcp_status write(struct mod_hdcp *hdcp,</div><div class='ctx'> 	uint32_t cur_size = 0;</div><div class='ctx'> 	uint32_t data_offset = 0;</div><div class='ctx'> </div><div class='add'>+	if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID) {</div><div class='add'>+		return MOD_HDCP_STATUS_DDC_FAILURE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (is_dp_hdcp(hdcp)) {</div><div class='ctx'> 		while (buf_len &gt; 0) {</div><div class='ctx'> 			cur_size = MIN(buf_len, HDCP_MAX_AUX_TRANSACTION_SIZE);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c<br/>index 84f9b412a4f1..a344e2e49b0e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c</a></div><div class='hunk'>@@ -536,8 +536,6 @@ void mod_build_adaptive_sync_infopacket(const struct dc_stream_state *stream,</div><div class='ctx'> 			mod_build_adaptive_sync_infopacket_v2(stream, param, info_packet);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FREESYNC_TYPE_PCON_IN_WHITELIST:</div><div class='del'>-		mod_build_adaptive_sync_infopacket_v1(info_packet);</div><div class='del'>-		break;</div><div class='ctx'> 	case ADAPTIVE_SYNC_TYPE_EDP:</div><div class='ctx'> 		mod_build_adaptive_sync_infopacket_v1(info_packet);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h<br/>index b0a6256e89f4..7536c173a546 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/amd_shared.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/amd_shared.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/amd_shared.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/amd_shared.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #define __AMD_SHARED_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/amd_asic_type.h&gt;</div><div class='add'>+#include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define AMD_MAX_USEC_TIMEOUT		1000000  /* 1000 ms */</div><div class='hunk'>@@ -321,6 +322,8 @@ struct amd_ip_funcs {</div><div class='ctx'> 	int (*set_powergating_state)(void *handle,</div><div class='ctx'> 				     enum amd_powergating_state state);</div><div class='ctx'> 	void (*get_clockgating_state)(void *handle, u64 *flags);</div><div class='add'>+	void (*dump_ip_state)(void *handle);</div><div class='add'>+	void (*print_ip_state)(void *handle, struct drm_printer *p);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h<br/>index f2f8f9b39c6b..fc72c2267060 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h</a></div><div class='hunk'>@@ -311,6 +311,10 @@</div><div class='ctx'> #define mmPHYESYMCLK_CLOCK_CNTL_BASE_IDX                                                               2</div><div class='ctx'> #define mmPHYFSYMCLK_CLOCK_CNTL                                                                        0x0057</div><div class='ctx'> #define mmPHYFSYMCLK_CLOCK_CNTL_BASE_IDX                                                               2</div><div class='add'>+#define regHDMICHARCLK0_CLOCK_CNTL                                                                      0x004a</div><div class='add'>+#define regHDMICHARCLK0_CLOCK_CNTL_BASE_IDX                                                             2</div><div class='add'>+#define mmHDMICHARCLK0_CLOCK_CNTL                                                                      0x004a</div><div class='add'>+#define mmHDMICHARCLK0_CLOCK_CNTL_BASE_IDX                                                             2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dccg_dccg_dfs_dispdec</div><div class='hunk'>@@ -4513,6 +4517,10 @@</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_B                                                                    0x0e18</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_INDEX                                                                      0x0e19</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_DATA                                                                       0x0e1a</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -5201,6 +5209,10 @@</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_B                                                                    0x0f83</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_INDEX                                                                      0x0f84</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_DATA                                                                       0x0f85</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp1_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -5888,6 +5900,10 @@</div><div class='ctx'> #define mmCM2_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM2_CM_3DLUT_OUT_OFFSET_B                                                                    0x10ee</div><div class='ctx'> #define mmCM2_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_INDEX                                                                      0x10ef</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_DATA                                                                       0x10f0</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp2_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -6576,6 +6592,10 @@</div><div class='ctx'> #define mmCM3_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM3_CM_3DLUT_OUT_OFFSET_B                                                                    0x1259</div><div class='ctx'> #define mmCM3_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_INDEX                                                                      0x125a</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_DATA                                                                       0x125b</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp3_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -7264,6 +7284,10 @@</div><div class='ctx'> #define mmCM4_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM4_CM_3DLUT_OUT_OFFSET_B                                                                    0x13c4</div><div class='ctx'> #define mmCM4_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_INDEX                                                                      0x13c5</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_DATA                                                                       0x13c6</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp4_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -7952,6 +7976,10 @@</div><div class='ctx'> #define mmCM5_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM5_CM_3DLUT_OUT_OFFSET_B                                                                    0x152f</div><div class='ctx'> #define mmCM5_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM5_CM_TEST_DEBUG_INDEX                                                                      0x1530</div><div class='add'>+#define mmCM5_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM5_CM_TEST_DEBUG_DATA                                                                       0x1531</div><div class='add'>+#define mmCM5_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp5_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h<br/>index e0a447351623..daf71e82f0ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h</a></div><div class='hunk'>@@ -1189,6 +1189,11 @@</div><div class='ctx'> #define PHYFSYMCLK_CLOCK_CNTL__PHYFSYMCLK_FORCE_SRC_SEL__SHIFT                                                0x4</div><div class='ctx'> #define PHYFSYMCLK_CLOCK_CNTL__PHYFSYMCLK_FORCE_EN_MASK                                                       0x00000001L</div><div class='ctx'> #define PHYFSYMCLK_CLOCK_CNTL__PHYFSYMCLK_FORCE_SRC_SEL_MASK                                                  0x00000010L</div><div class='add'>+//HDMICHARCLK0_CLOCK_CNTL</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_EN__SHIFT                                                       0x0</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_SRC_SEL__SHIFT                                                  0x4</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_EN_MASK                                                         0x00000001L</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_SRC_SEL_MASK                                                    0x00000070L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dccg_dccg_dfs_dispdec</div><div class='hunk'>@@ -16739,6 +16744,15 @@</div><div class='ctx'> #define CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT                                                0x10</div><div class='ctx'> #define CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK                                                 0x0000FFFFL</div><div class='ctx'> #define CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK                                                  0xFFFF0000L</div><div class='add'>+//CM0_CM_TEST_DEBUG_INDEX</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT                                                   0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT                                                0x8</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK                                                     0x000000FFL</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK                                                  0x00000100L</div><div class='add'>+//CM0_CM_TEST_DEBUG_DATA</div><div class='add'>+#define CM0_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT                                                     0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK                                                       0xFFFFFFFFL</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='ctx'> //DC_PERFMON12_PERFCOUNTER_CNTL</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h<br/>index b45a35aae241..bf84f97d9162 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h</a></div><div class='hunk'>@@ -4466,6 +4466,10 @@</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_B                                                                    0x0e18</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_INDEX                                                                      0x0e19</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_DATA                                                                       0x0e1a</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -5154,6 +5158,10 @@</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_B                                                                    0x0f83</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_INDEX                                                                      0x0f84</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_DATA                                                                       0x0f85</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp1_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -5841,6 +5849,10 @@</div><div class='ctx'> #define mmCM2_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM2_CM_3DLUT_OUT_OFFSET_B                                                                    0x10ee</div><div class='ctx'> #define mmCM2_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_INDEX                                                                      0x10ef</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_DATA                                                                       0x10f0</div><div class='add'>+#define mmCM2_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp2_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -6529,6 +6541,10 @@</div><div class='ctx'> #define mmCM3_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM3_CM_3DLUT_OUT_OFFSET_B                                                                    0x1259</div><div class='ctx'> #define mmCM3_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_INDEX                                                                      0x125a</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_DATA                                                                       0x125b</div><div class='add'>+#define mmCM3_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp3_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -7217,6 +7233,10 @@</div><div class='ctx'> #define mmCM4_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM4_CM_3DLUT_OUT_OFFSET_B                                                                    0x13c4</div><div class='ctx'> #define mmCM4_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_INDEX                                                                      0x13c5</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_DATA                                                                       0x13c6</div><div class='add'>+#define mmCM4_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp4_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h<br/>index 3dae29f9581e..56cdb219874a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h</a></div><div class='hunk'>@@ -15676,6 +15676,14 @@</div><div class='ctx'> #define CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B__SHIFT                                                0x10</div><div class='ctx'> #define CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_OFFSET_B_MASK                                                 0x0000FFFFL</div><div class='ctx'> #define CM0_CM_3DLUT_OUT_OFFSET_B__CM_3DLUT_OUT_SCALE_B_MASK                                                  0xFFFF0000L</div><div class='add'>+//CM0_CM_TEST_DEBUG_INDEX</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT                                                   0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT                                                0x8</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK                                                     0x000000FFL</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK                                                  0x00000100L</div><div class='add'>+//CM0_CM_TEST_DEBUG_DATA</div><div class='add'>+#define CM0_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA__SHIFT                                                     0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_DATA__CM_TEST_DEBUG_DATA_MASK                                                       0xFFFFFFFFL</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h<br/>index daa8130636f0..8b0d2638a6b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h</a></div><div class='hunk'>@@ -3110,6 +3110,10 @@</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_B                                                                    0x0e18</div><div class='ctx'> #define mmCM0_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_INDEX                                                                      0x0e19</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_DATA                                                                       0x0e1a</div><div class='add'>+#define mmCM0_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -3798,6 +3802,10 @@</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_B                                                                    0x0f83</div><div class='ctx'> #define mmCM1_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_INDEX                                                                      0x0f84</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_DATA                                                                       0x0f85</div><div class='add'>+#define mmCM1_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp1_dispdec_dpp_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -5687,6 +5695,16 @@</div><div class='ctx'> #define mmDSCC0_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define mmDSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3035</div><div class='ctx'> #define mmDSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x303a</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA0                                                                  0x303b</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA1                                                                  0x303c</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA1_BASE_IDX                                                         2</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA2                                                                  0x303d</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA2_BASE_IDX                                                         2</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA3                                                                  0x303e</div><div class='add'>+#define mmDSCC0_DSCC_TEST_DEBUG_DATA3_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc0_dispdec_dsc_dcperfmon_dc_perfmon_dispdec</div><div class='hunk'>@@ -5817,6 +5835,16 @@</div><div class='ctx'> #define mmDSCC1_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define mmDSCC1_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3091</div><div class='ctx'> #define mmDSCC1_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x3096</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA0                                                                  0x3097</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA1                                                                  0x3098</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA1_BASE_IDX                                                         2</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA2                                                                  0x3099</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA2_BASE_IDX                                                         2</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA3                                                                  0x309a</div><div class='add'>+#define mmDSCC1_DSCC_TEST_DEBUG_DATA3_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc1_dispdec_dsc_dcperfmon_dc_perfmon_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h<br/>index 5c469cf635e5..53f1705f8d99 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h</a></div><div class='hunk'>@@ -10701,6 +10701,13 @@</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK                                                               0x00000001L</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_POST_CSC_COEF_FORMAT_MASK                                                      0x00000010L</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK                                                   0x00000100L</div><div class='add'>+</div><div class='add'>+//CM0_CM_TEST_DEBUG_INDEX</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT                                                   0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT                                                0x8</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK                                                     0x000000FFL</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK                                                  0x00000100L</div><div class='add'>+</div><div class='ctx'> //CM0_CM_SHAPER_CONTROL</div><div class='ctx'> #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT                                                      0x0</div><div class='ctx'> #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_MODE_CURRENT__SHIFT                                                  0x2</div><div class='hunk'>@@ -22258,7 +22265,9 @@</div><div class='ctx'> #define DSC_TOP0_DSC_TOP_CONTROL__DSC_DSCCLK_R_GATE_DIS_MASK                                                  0x00000100L</div><div class='ctx'> //DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL__SHIFT                                             0x4</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN_MASK                                                           0x00000001L</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL_MASK                                               0x00000070L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc0_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -22631,6 +22640,15 @@</div><div class='ctx'> //DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL</div><div class='ctx'> #define DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__SHIFT  0x0</div><div class='ctx'> #define DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_MASK  0x0003FFFFL</div><div class='add'>+//DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS0_ROTATE__SHIFT                                  0x0</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS1_ROTATE__SHIFT                                  0x8</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS2_ROTATE__SHIFT                                  0x10</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS3_ROTATE__SHIFT                                  0x18</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS0_ROTATE_MASK                                    0x0000001FL</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS1_ROTATE_MASK                                    0x00001F00L</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS2_ROTATE_MASK                                    0x001F0000L</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS3_ROTATE_MASK                                    0x1F000000L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc0_dispdec_dsc_dcperfmon_dc_perfmon_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h<br/>index f268d33c4744..7fd906f10803 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h</a></div><div class='hunk'>@@ -424,6 +424,8 @@</div><div class='ctx'> #define regDTBCLK_DTO2_MODULO_BASE_IDX                                                                  2</div><div class='ctx'> #define regDTBCLK_DTO3_MODULO                                                                           0x0022</div><div class='ctx'> #define regDTBCLK_DTO3_MODULO_BASE_IDX                                                                  2</div><div class='add'>+#define regHDMICHARCLK0_CLOCK_CNTL                                                                      0x004a</div><div class='add'>+#define regHDMICHARCLK0_CLOCK_CNTL_BASE_IDX                                                             2</div><div class='ctx'> #define regPHYASYMCLK_CLOCK_CNTL                                                                        0x0052</div><div class='ctx'> #define regPHYASYMCLK_CLOCK_CNTL_BASE_IDX                                                               2</div><div class='ctx'> #define regPHYBSYMCLK_CLOCK_CNTL                                                                        0x0053</div><div class='hunk'>@@ -434,6 +436,8 @@</div><div class='ctx'> #define regPHYDSYMCLK_CLOCK_CNTL_BASE_IDX                                                               2</div><div class='ctx'> #define regPHYESYMCLK_CLOCK_CNTL                                                                        0x0056</div><div class='ctx'> #define regPHYESYMCLK_CLOCK_CNTL_BASE_IDX                                                               2</div><div class='add'>+#define regHDMISTREAMCLK_CNTL                                                                           0x0059</div><div class='add'>+#define regHDMISTREAMCLK_CNTL_BASE_IDX                                                                  2</div><div class='ctx'> #define regDCCG_GATE_DISABLE_CNTL3                                                                      0x005a</div><div class='ctx'> #define regDCCG_GATE_DISABLE_CNTL3_BASE_IDX                                                             2</div><div class='ctx'> #define regHDMISTREAMCLK0_DTO_PARAM                                                                     0x005b</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h<br/>index cf3398f15666..07fbfafe6056 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h</a></div><div class='hunk'>@@ -1372,6 +1372,11 @@</div><div class='ctx'> //DTBCLK_DTO3_MODULO</div><div class='ctx'> #define DTBCLK_DTO3_MODULO__DTBCLK_DTO3_MODULO__SHIFT                                                         0x0</div><div class='ctx'> #define DTBCLK_DTO3_MODULO__DTBCLK_DTO3_MODULO_MASK                                                           0xFFFFFFFFL</div><div class='add'>+//HDMICHARCLK0_CLOCK_CNTL</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_EN__SHIFT                                                       0x0</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_SRC_SEL__SHIFT                                                  0x4</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_EN_MASK                                                         0x00000001L</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_SRC_SEL_MASK                                                    0x00000070L</div><div class='ctx'> //PHYASYMCLK_CLOCK_CNTL</div><div class='ctx'> #define PHYASYMCLK_CLOCK_CNTL__PHYASYMCLK_FORCE_EN__SHIFT                                                     0x0</div><div class='ctx'> #define PHYASYMCLK_CLOCK_CNTL__PHYASYMCLK_FORCE_SRC_SEL__SHIFT                                                0x4</div><div class='hunk'>@@ -1397,6 +1402,13 @@</div><div class='ctx'> #define PHYESYMCLK_CLOCK_CNTL__PHYESYMCLK_FORCE_SRC_SEL__SHIFT                                                0x4</div><div class='ctx'> #define PHYESYMCLK_CLOCK_CNTL__PHYESYMCLK_FORCE_EN_MASK                                                       0x00000001L</div><div class='ctx'> #define PHYESYMCLK_CLOCK_CNTL__PHYESYMCLK_FORCE_SRC_SEL_MASK                                                  0x00000030L</div><div class='add'>+//HDMISTREAMCLK_CNTL</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_SRC_SEL__SHIFT                                                     0x0</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_EN__SHIFT                                                          0x3</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_DTO_FORCE_DIS__SHIFT                                               0x4</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_SRC_SEL_MASK                                                       0x00000007L</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_EN_MASK                                                            0x00000008L</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_DTO_FORCE_DIS_MASK                                                 0x00000010L</div><div class='ctx'> //DCCG_GATE_DISABLE_CNTL3</div><div class='ctx'> #define DCCG_GATE_DISABLE_CNTL3__HDMISTREAMCLK0_GATE_DISABLE__SHIFT                                           0x0</div><div class='ctx'> #define DCCG_GATE_DISABLE_CNTL3__HDMISTREAMCLK1_GATE_DISABLE__SHIFT                                           0x1</div><div class='hunk'>@@ -46978,6 +46990,13 @@</div><div class='ctx'> #define DSC_TOP0_DSC_TOP_CONTROL__DSC_CLOCK_EN_MASK                                                           0x00000001L</div><div class='ctx'> #define DSC_TOP0_DSC_TOP_CONTROL__DSC_DISPCLK_R_GATE_DIS_MASK                                                 0x00000010L</div><div class='ctx'> #define DSC_TOP0_DSC_TOP_CONTROL__DSC_DSCCLK_R_GATE_DIS_MASK                                                  0x00000100L</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+//DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL__SHIFT                                             0x4</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN_MASK                                                           0x00000001L</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL_MASK                                               0x00000070L</div><div class='ctx'> //DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL__SHIFT                                             0x4</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h<br/>index 50c34d88c17c..16a69d17bb1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h</a></div><div class='hunk'>@@ -213,6 +213,8 @@</div><div class='ctx'> #define regDTBCLK_DTO2_MODULO_BASE_IDX                                                                  2</div><div class='ctx'> #define regDTBCLK_DTO3_MODULO                                                                           0x0022</div><div class='ctx'> #define regDTBCLK_DTO3_MODULO_BASE_IDX                                                                  2</div><div class='add'>+#define regHDMICHARCLK0_CLOCK_CNTL                                                                      0x004a</div><div class='add'>+#define regHDMICHARCLK0_CLOCK_CNTL_BASE_IDX                                                             2</div><div class='ctx'> #define regPHYASYMCLK_CLOCK_CNTL                                                                        0x0052</div><div class='ctx'> #define regPHYASYMCLK_CLOCK_CNTL_BASE_IDX                                                               2</div><div class='ctx'> #define regPHYBSYMCLK_CLOCK_CNTL                                                                        0x0053</div><div class='hunk'>@@ -233,6 +235,8 @@</div><div class='ctx'> #define regDCCG_AUDIO_DTBCLK_DTO_MODULO_BASE_IDX                                                        2</div><div class='ctx'> #define regDTBCLK_DTO_DBUF_EN                                                                           0x0063</div><div class='ctx'> #define regDTBCLK_DTO_DBUF_EN_BASE_IDX                                                                  2</div><div class='add'>+#define regHDMISTREAMCLK_CNTL                                                                           0x0059</div><div class='add'>+#define regHDMISTREAMCLK_CNTL_BASE_IDX                                                                  2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dccg_dccg_dcperfmon0_dc_perfmon_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h<br/>index 295e0dac9ffa..6473362e39a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h</a></div><div class='hunk'>@@ -886,6 +886,11 @@</div><div class='ctx'> //DTBCLK_DTO3_MODULO</div><div class='ctx'> #define DTBCLK_DTO3_MODULO__DTBCLK_DTO3_MODULO__SHIFT                                                         0x0</div><div class='ctx'> #define DTBCLK_DTO3_MODULO__DTBCLK_DTO3_MODULO_MASK                                                           0xFFFFFFFFL</div><div class='add'>+//HDMICHARCLK0_CLOCK_CNTL</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_EN__SHIFT                                                       0x0</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_SRC_SEL__SHIFT                                                  0x4</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_EN_MASK                                                         0x00000001L</div><div class='add'>+#define HDMICHARCLK0_CLOCK_CNTL__HDMICHARCLK0_SRC_SEL_MASK                                                    0x00000070L</div><div class='ctx'> //PHYASYMCLK_CLOCK_CNTL</div><div class='ctx'> #define PHYASYMCLK_CLOCK_CNTL__PHYASYMCLK_FORCE_EN__SHIFT                                                     0x0</div><div class='ctx'> #define PHYASYMCLK_CLOCK_CNTL__PHYASYMCLK_FORCE_SRC_SEL__SHIFT                                                0x4</div><div class='hunk'>@@ -911,6 +916,11 @@</div><div class='ctx'> #define PHYESYMCLK_CLOCK_CNTL__PHYESYMCLK_FORCE_SRC_SEL__SHIFT                                                0x4</div><div class='ctx'> #define PHYESYMCLK_CLOCK_CNTL__PHYESYMCLK_FORCE_EN_MASK                                                       0x00000001L</div><div class='ctx'> #define PHYESYMCLK_CLOCK_CNTL__PHYESYMCLK_FORCE_SRC_SEL_MASK                                                  0x00000030L</div><div class='add'>+//HDMISTREAMCLK_CNTL</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_SRC_SEL__SHIFT                                                     0x0</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_DTO_FORCE_DIS__SHIFT                                               0x10</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_SRC_SEL_MASK                                                       0x00000003L</div><div class='add'>+#define HDMISTREAMCLK_CNTL__HDMISTREAMCLK0_DTO_FORCE_DIS_MASK                                                 0x00010000L</div><div class='ctx'> //DCCG_GATE_DISABLE_CNTL3</div><div class='ctx'> #define DCCG_GATE_DISABLE_CNTL3__HDMISTREAMCLK0_GATE_DISABLE__SHIFT                                           0x0</div><div class='ctx'> #define DCCG_GATE_DISABLE_CNTL3__HDMISTREAMCLK1_GATE_DISABLE__SHIFT                                           0x1</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h<br/>index 14c29ce4c7b3..78cb61d5800a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h</a></div><div class='hunk'>@@ -1719,6 +1719,10 @@</div><div class='ctx'> #define regDCHUBBUB_TIMEOUT_INTERRUPT_STATUS_BASE_IDX                                                   2</div><div class='ctx'> #define regFMON_CTRL                                                                                    0x0541</div><div class='ctx'> #define regFMON_CTRL_BASE_IDX                                                                           2</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_INDEX                                                                    0x0542</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_INDEX_BASE_IDX                                                           2</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_DATA                                                                     0x0543</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_DATA_BASE_IDX                                                            2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dchubbubl_hubbub_sdpif_dispdec</div><div class='hunk'>@@ -3574,6 +3578,10 @@</div><div class='ctx'> #define regCM0_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM0_CM_COEF_FORMAT                                                                           0x0d8c</div><div class='ctx'> #define regCM0_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_INDEX                                                                      0x0d8d</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_DATA                                                                       0x0d8e</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dpp0_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -3960,6 +3968,10 @@</div><div class='ctx'> #define regCM1_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM1_CM_COEF_FORMAT                                                                           0x0ef7</div><div class='ctx'> #define regCM1_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_INDEX                                                                      0x0ef8</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_DATA                                                                       0x0ef9</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dpp1_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -4346,6 +4358,10 @@</div><div class='ctx'> #define regCM2_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM2_CM_COEF_FORMAT                                                                           0x1062</div><div class='ctx'> #define regCM2_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_INDEX                                                                      0x1063</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_DATA                                                                       0x1064</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dpp2_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -4732,6 +4748,10 @@</div><div class='ctx'> #define regCM3_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM3_CM_COEF_FORMAT                                                                           0x11cd</div><div class='ctx'> #define regCM3_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_INDEX                                                                      0x11ce</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_DATA                                                                       0x11cf</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dpp3_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -11780,6 +11800,16 @@</div><div class='ctx'> #define regDSCC0_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3035</div><div class='ctx'> #define regDSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x303a</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA0                                                                  0x303b</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA1                                                                  0x303c</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA1_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA2                                                                  0x303d</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA2_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA3                                                                  0x303e</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA3_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dsc0_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -11888,6 +11918,16 @@</div><div class='ctx'> #define regDSCC1_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC1_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3091</div><div class='ctx'> #define regDSCC1_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x3096</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA0                                                                  0x3097</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA1                                                                  0x3098</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA1_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA2                                                                  0x3099</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA2_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA3                                                                  0x309a</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA3_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dsc1_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -11996,6 +12036,16 @@</div><div class='ctx'> #define regDSCC2_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC2_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x30ed</div><div class='ctx'> #define regDSCC2_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x30f2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA0                                                                  0x30f3</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA1                                                                  0x30f4</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA1_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA2                                                                  0x30f5</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA2_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA3                                                                  0x30f6</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA3_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dsc2_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -12104,6 +12154,16 @@</div><div class='ctx'> #define regDSCC3_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC3_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3149</div><div class='ctx'> #define regDSCC3_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x314e</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA0                                                                  0x314f</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA1                                                                  0x3150</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA1_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA2                                                                  0x3151</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA2_BASE_IDX                                                         2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA3                                                                  0x3152</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA3_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dsc3_dispdec_dsccif_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h<br/>index 0691e328d0f0..1093105ca35b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h</a></div><div class='hunk'>@@ -11544,6 +11544,11 @@</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK                                                               0x00000001L</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_POST_CSC_COEF_FORMAT_MASK                                                      0x00000010L</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK                                                   0x00000100L</div><div class='add'>+//CM0_CM_TEST_DEBUG_INDEX</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT                                                   0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT                                                0x8</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK                                                     0x000000FFL</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK                                                  0x00000100L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dpp0_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -42267,6 +42272,18 @@</div><div class='ctx'> //DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL</div><div class='ctx'> #define DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__SHIFT  0x0</div><div class='ctx'> #define DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_MASK  0x0003FFFFL</div><div class='add'>+//DSCC0_DSCC_TEST_DEBUG_INDEX2</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_INDEX2__DSCC_TEST_DEBUG_INDEX2__SHIFT                                           0x0</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_INDEX2__DSCC_TEST_DEBUG_INDEX2_MASK                                             0x000000FFL</div><div class='add'>+//DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS0_ROTATE__SHIFT                                  0x0</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS1_ROTATE__SHIFT                                  0x8</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS2_ROTATE__SHIFT                                  0x10</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS3_ROTATE__SHIFT                                  0x18</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS0_ROTATE_MASK                                    0x0000001FL</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS1_ROTATE_MASK                                    0x00001F00L</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS2_ROTATE_MASK                                    0x001F0000L</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS3_ROTATE_MASK                                    0x1F000000L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dcn_dc_dsc0_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -42300,6 +42317,16 @@</div><div class='ctx'> #define DSC_TOP0_DSC_TOP_CONTROL__DSC_DSCCLK_R_GATE_DIS_MASK                                                  0x00000100L</div><div class='ctx'> //DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL__SHIFT                                             0x4</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN_MASK                                                           0x00000001L</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL_MASK                                               0x00000070L</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+//DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL__SHIFT                                             0x4</div><div class='add'>+//DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN_MASK                                                           0x00000001L</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h<br/>index 3bd8792fd7b3..a04b8c32c564 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h</a></div><div class='hunk'>@@ -1719,6 +1719,10 @@</div><div class='ctx'> #define regDCHUBBUB_TIMEOUT_INTERRUPT_STATUS_BASE_IDX                                                   2</div><div class='ctx'> #define regFMON_CTRL                                                                                    0x0541</div><div class='ctx'> #define regFMON_CTRL_BASE_IDX                                                                           2</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_INDEX                                                                    0x0542</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_INDEX_BASE_IDX                                                           2</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_DATA                                                                     0x0543</div><div class='add'>+#define regDCHUBBUB_TEST_DEBUG_DATA_BASE_IDX                                                            2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dchubbubl_hubbub_sdpif_dispdec</div><div class='hunk'>@@ -3573,6 +3577,10 @@</div><div class='ctx'> #define regCM0_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM0_CM_COEF_FORMAT                                                                           0x0d8c</div><div class='ctx'> #define regCM0_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_INDEX                                                                      0x0d8d</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_DATA                                                                       0x0d8e</div><div class='add'>+#define regCM0_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -3959,6 +3967,10 @@</div><div class='ctx'> #define regCM1_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM1_CM_COEF_FORMAT                                                                           0x0ef7</div><div class='ctx'> #define regCM1_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_INDEX                                                                      0x0ef8</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_DATA                                                                       0x0ef9</div><div class='add'>+#define regCM1_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp1_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -4345,6 +4357,10 @@</div><div class='ctx'> #define regCM2_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM2_CM_COEF_FORMAT                                                                           0x1062</div><div class='ctx'> #define regCM2_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_INDEX                                                                      0x1063</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_DATA                                                                       0x1064</div><div class='add'>+#define regCM2_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp2_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -4731,6 +4747,10 @@</div><div class='ctx'> #define regCM3_CM_DEALPHA_BASE_IDX                                                                      2</div><div class='ctx'> #define regCM3_CM_COEF_FORMAT                                                                           0x11cd</div><div class='ctx'> #define regCM3_CM_COEF_FORMAT_BASE_IDX                                                                  2</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_INDEX                                                                      0x11ce</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_DATA                                                                       0x11cf</div><div class='add'>+#define regCM3_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp3_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -11789,6 +11809,10 @@</div><div class='ctx'> #define regDSCC0_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3035</div><div class='ctx'> #define regDSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x303a</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA0                                                                  0x303b</div><div class='add'>+#define regDSCC0_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc0_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -11897,6 +11921,10 @@</div><div class='ctx'> #define regDSCC1_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC1_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3091</div><div class='ctx'> #define regDSCC1_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x3096</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA0                                                                  0x3097</div><div class='add'>+#define regDSCC1_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc1_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -12005,7 +12033,10 @@</div><div class='ctx'> #define regDSCC2_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC2_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x30ed</div><div class='ctx'> #define regDSCC2_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='del'>-</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x30f2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA0                                                                  0x30f3</div><div class='add'>+#define regDSCC2_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc2_dispdec_dsccif_dispdec</div><div class='ctx'> // base address: 0x2e0</div><div class='hunk'>@@ -12113,6 +12144,10 @@</div><div class='ctx'> #define regDSCC3_DSCC_RATE_CONTROL_BUFFER2_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='ctx'> #define regDSCC3_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL                                           0x3149</div><div class='ctx'> #define regDSCC3_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_BASE_IDX                                  2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_BUS_ROTATE                                                             0x314e</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_BUS_ROTATE_BASE_IDX                                                    2</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA0                                                                  0x314f</div><div class='add'>+#define regDSCC3_DSCC_TEST_DEBUG_DATA0_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc3_dispdec_dsccif_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h<br/>index e82dffc2b9b0..ce773fca621f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h</a></div><div class='hunk'>@@ -11547,6 +11547,11 @@</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_BIAS_FORMAT_MASK                                                               0x00000001L</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_POST_CSC_COEF_FORMAT_MASK                                                      0x00000010L</div><div class='ctx'> #define CM0_CM_COEF_FORMAT__CM_GAMUT_REMAP_COEF_FORMAT_MASK                                                   0x00000100L</div><div class='add'>+//CM0_CM_TEST_DEBUG_INDEX</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX__SHIFT                                                   0x0</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN__SHIFT                                                0x8</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_INDEX_MASK                                                     0x000000FFL</div><div class='add'>+#define CM0_CM_TEST_DEBUG_INDEX__CM_TEST_DEBUG_WRITE_EN_MASK                                                  0x00000100L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dpp0_dispdec_dpp_top_dispdec</div><div class='hunk'>@@ -42315,6 +42320,15 @@</div><div class='ctx'> //DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL</div><div class='ctx'> #define DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__SHIFT  0x0</div><div class='ctx'> #define DSCC0_DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL__DSCC_RATE_CONTROL_BUFFER3_MAX_FULLNESS_LEVEL_MASK  0x0003FFFFL</div><div class='add'>+//DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS0_ROTATE__SHIFT                                  0x0</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS1_ROTATE__SHIFT                                  0x8</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS2_ROTATE__SHIFT                                  0x10</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS3_ROTATE__SHIFT                                  0x18</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS0_ROTATE_MASK                                    0x0000001FL</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS1_ROTATE_MASK                                    0x00001F00L</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS2_ROTATE_MASK                                    0x001F0000L</div><div class='add'>+#define DSCC0_DSCC_TEST_DEBUG_BUS_ROTATE__DSCC_TEST_DEBUG_BUS3_ROTATE_MASK                                    0x1F000000L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc0_dispdec_dsccif_dispdec</div><div class='hunk'>@@ -42348,7 +42362,9 @@</div><div class='ctx'> #define DSC_TOP0_DSC_TOP_CONTROL__DSC_DSCCLK_R_GATE_DIS_MASK                                                  0x00000100L</div><div class='ctx'> //DSC_TOP0_DSC_DEBUG_CONTROL</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN__SHIFT                                                         0x0</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL__SHIFT                                             0x4</div><div class='ctx'> #define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_DBG_EN_MASK                                                           0x00000001L</div><div class='add'>+#define DSC_TOP0_DSC_DEBUG_CONTROL__DSC_TEST_CLOCK_MUX_SEL_MASK                                               0x00000070L</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dce_dc_dsc1_dispdec_dscc_dispdec</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h<br/>index 0bb47e06eee8..081e726afbf0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #define mmDPCSTX0_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX                                                      2</div><div class='ctx'> #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA                                                               0x292d</div><div class='ctx'> #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA_BASE_IDX                                                      2</div><div class='add'>+#define mmDPCSTX0_DPCSTX_DEBUG_CONFIG                                                                  0x292e</div><div class='add'>+#define mmDPCSTX0_DPCSTX_DEBUG_CONFIG_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx0_dispdec</div><div class='hunk'>@@ -50,6 +52,8 @@</div><div class='ctx'> #define mmRDPCSTX0_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define mmRDPCSTX0_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x293c</div><div class='ctx'> #define mmRDPCSTX0_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define mmRDPCSTX0_RDPCSTX_DEBUG_CONFIG                                                                0x293d</div><div class='add'>+#define mmRDPCSTX0_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0                                                                   0x2940</div><div class='ctx'> #define mmRDPCSTX0_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define mmRDPCSTX0_RDPCSTX_PHY_CNTL1                                                                   0x2941</div><div class='hunk'>@@ -120,6 +124,8 @@</div><div class='ctx'> #define mmDPCSTX1_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX                                                      2</div><div class='ctx'> #define mmDPCSTX1_DPCSTX_PLL_UPDATE_DATA                                                               0x2a05</div><div class='ctx'> #define mmDPCSTX1_DPCSTX_PLL_UPDATE_DATA_BASE_IDX                                                      2</div><div class='add'>+#define mmDPCSTX1_DPCSTX_DEBUG_CONFIG                                                                  0x2a06</div><div class='add'>+#define mmDPCSTX1_DPCSTX_DEBUG_CONFIG_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx1_dispdec</div><div class='hunk'>@@ -146,6 +152,8 @@</div><div class='ctx'> #define mmRDPCSTX1_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define mmRDPCSTX1_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2a14</div><div class='ctx'> #define mmRDPCSTX1_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define mmRDPCSTX1_RDPCSTX_DEBUG_CONFIG                                                                0x2a15</div><div class='add'>+#define mmRDPCSTX1_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define mmRDPCSTX1_RDPCSTX_PHY_CNTL0                                                                   0x2a18</div><div class='ctx'> #define mmRDPCSTX1_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define mmRDPCSTX1_RDPCSTX_PHY_CNTL1                                                                   0x2a19</div><div class='hunk'>@@ -216,6 +224,8 @@</div><div class='ctx'> #define mmDPCSTX2_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX                                                      2</div><div class='ctx'> #define mmDPCSTX2_DPCSTX_PLL_UPDATE_DATA                                                               0x2add</div><div class='ctx'> #define mmDPCSTX2_DPCSTX_PLL_UPDATE_DATA_BASE_IDX                                                      2</div><div class='add'>+#define mmDPCSTX2_DPCSTX_DEBUG_CONFIG                                                                  0x2ade</div><div class='add'>+#define mmDPCSTX2_DPCSTX_DEBUG_CONFIG_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx2_dispdec</div><div class='hunk'>@@ -242,6 +252,8 @@</div><div class='ctx'> #define mmRDPCSTX2_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define mmRDPCSTX2_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2aec</div><div class='ctx'> #define mmRDPCSTX2_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define mmRDPCSTX2_RDPCSTX_DEBUG_CONFIG                                                                0x2aed</div><div class='add'>+#define mmRDPCSTX2_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define mmRDPCSTX2_RDPCSTX_PHY_CNTL0                                                                   0x2af0</div><div class='ctx'> #define mmRDPCSTX2_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define mmRDPCSTX2_RDPCSTX_PHY_CNTL1                                                                   0x2af1</div><div class='hunk'>@@ -312,6 +324,8 @@</div><div class='ctx'> #define mmDPCSTX3_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX                                                      2</div><div class='ctx'> #define mmDPCSTX3_DPCSTX_PLL_UPDATE_DATA                                                               0x2bb5</div><div class='ctx'> #define mmDPCSTX3_DPCSTX_PLL_UPDATE_DATA_BASE_IDX                                                      2</div><div class='add'>+#define mmDPCSTX3_DPCSTX_DEBUG_CONFIG                                                                  0x2bb6</div><div class='add'>+#define mmDPCSTX3_DPCSTX_DEBUG_CONFIG_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx3_dispdec</div><div class='hunk'>@@ -338,6 +352,8 @@</div><div class='ctx'> #define mmRDPCSTX3_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define mmRDPCSTX3_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2bc4</div><div class='ctx'> #define mmRDPCSTX3_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define mmRDPCSTX3_RDPCSTX_DEBUG_CONFIG                                                                0x2bc5</div><div class='add'>+#define mmRDPCSTX3_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define mmRDPCSTX3_RDPCSTX_PHY_CNTL0                                                                   0x2bc8</div><div class='ctx'> #define mmRDPCSTX3_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define mmRDPCSTX3_RDPCSTX_PHY_CNTL1                                                                   0x2bc9</div><div class='hunk'>@@ -408,6 +424,8 @@</div><div class='ctx'> #define mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX                                                      2</div><div class='ctx'> #define mmDPCSTX4_DPCSTX_PLL_UPDATE_DATA                                                               0x2c8d</div><div class='ctx'> #define mmDPCSTX4_DPCSTX_PLL_UPDATE_DATA_BASE_IDX                                                      2</div><div class='add'>+#define mmDPCSTX4_DPCSTX_DEBUG_CONFIG                                                                  0x2c8e</div><div class='add'>+#define mmDPCSTX4_DPCSTX_DEBUG_CONFIG_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx4_dispdec</div><div class='hunk'>@@ -434,6 +452,8 @@</div><div class='ctx'> #define mmRDPCSTX4_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define mmRDPCSTX4_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2c9c</div><div class='ctx'> #define mmRDPCSTX4_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define mmRDPCSTX4_RDPCSTX_DEBUG_CONFIG                                                                0x2c9d</div><div class='add'>+#define mmRDPCSTX4_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define mmRDPCSTX4_RDPCSTX_PHY_CNTL0                                                                   0x2ca0</div><div class='ctx'> #define mmRDPCSTX4_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define mmRDPCSTX4_RDPCSTX_PHY_CNTL1                                                                   0x2ca1</div><div class='hunk'>@@ -504,6 +524,8 @@</div><div class='ctx'> #define mmDPCSTX5_DPCSTX_PLL_UPDATE_ADDR_BASE_IDX                                                      2</div><div class='ctx'> #define mmDPCSTX5_DPCSTX_PLL_UPDATE_DATA                                                               0x2d65</div><div class='ctx'> #define mmDPCSTX5_DPCSTX_PLL_UPDATE_DATA_BASE_IDX                                                      2</div><div class='add'>+#define mmDPCSTX5_DPCSTX_DEBUG_CONFIG                                                                  0x2d66</div><div class='add'>+#define mmDPCSTX5_DPCSTX_DEBUG_CONFIG_BASE_IDX                                                         2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx5_dispdec</div><div class='hunk'>@@ -530,6 +552,8 @@</div><div class='ctx'> #define mmRDPCSTX5_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define mmRDPCSTX5_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2d74</div><div class='ctx'> #define mmRDPCSTX5_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define mmRDPCSTX5_RDPCSTX_DEBUG_CONFIG                                                                0x2d75</div><div class='add'>+#define mmRDPCSTX5_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define mmRDPCSTX5_RDPCSTX_PHY_CNTL0                                                                   0x2d78</div><div class='ctx'> #define mmRDPCSTX5_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define mmRDPCSTX5_RDPCSTX_PHY_CNTL1                                                                   0x2d79</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h<br/>index 23fa1121a967..1f846fa6c1a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h</a></div><div class='hunk'>@@ -70,7 +70,9 @@</div><div class='ctx'> //DPCSTX0_DPCSTX_PLL_UPDATE_DATA</div><div class='ctx'> #define DPCSTX0_DPCSTX_PLL_UPDATE_DATA__DPCS_PLL_UPDATE_DATA__SHIFT                                           0x0</div><div class='ctx'> #define DPCSTX0_DPCSTX_PLL_UPDATE_DATA__DPCS_PLL_UPDATE_DATA_MASK                                             0xFFFFFFFFL</div><div class='del'>-</div><div class='add'>+//DPCSTX0_DPCSTX_DEBUG_CONFIG</div><div class='add'>+#define DPCSTX0_DPCSTX_DEBUG_CONFIG__DPCS_DBG_CBUS_DIS__SHIFT                                                 0xe</div><div class='add'>+#define DPCSTX0_DPCSTX_DEBUG_CONFIG__DPCS_DBG_CBUS_DIS_MASK                                                   0x00004000L</div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx0_dispdec</div><div class='ctx'> //RDPCSTX0_RDPCSTX_CNTL</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h<br/>index 55743d06f728..e55ff0e8d74c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h</a></div><div class='hunk'>@@ -70,7 +70,9 @@</div><div class='ctx'> //DPCSTX0_DPCSTX_PLL_UPDATE_DATA</div><div class='ctx'> #define DPCSTX0_DPCSTX_PLL_UPDATE_DATA__DPCS_PLL_UPDATE_DATA__SHIFT                                           0x0</div><div class='ctx'> #define DPCSTX0_DPCSTX_PLL_UPDATE_DATA__DPCS_PLL_UPDATE_DATA_MASK                                             0xFFFFFFFFL</div><div class='del'>-</div><div class='add'>+//DPCSTX0_DPCSTX_DEBUG_CONFIG</div><div class='add'>+#define DPCSTX0_DPCSTX_DEBUG_CONFIG__DPCS_DBG_CBUS_DIS__SHIFT                                                 0xe</div><div class='add'>+#define DPCSTX0_DPCSTX_DEBUG_CONFIG__DPCS_DBG_CBUS_DIS_MASK                                                   0x00004000L</div><div class='ctx'> </div><div class='ctx'> // addressBlock: dpcssys_dpcs0_rdpcstx0_dispdec</div><div class='ctx'> //RDPCSTX0_RDPCSTX_CNTL</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h<br/>index 01a56556cde1..5b4fdeda1040 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h</a></div><div class='hunk'>@@ -155,6 +155,8 @@</div><div class='ctx'> #define regRDPCSTX0_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define regRDPCSTX0_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x293c</div><div class='ctx'> #define regRDPCSTX0_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define regRDPCSTX0_RDPCSTX_DEBUG_CONFIG                                                                0x293d</div><div class='add'>+#define regRDPCSTX0_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define regRDPCSTX0_RDPCSTX_PHY_CNTL0                                                                   0x2940</div><div class='ctx'> #define regRDPCSTX0_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define regRDPCSTX0_RDPCSTX_PHY_CNTL1                                                                   0x2941</div><div class='hunk'>@@ -239,6 +241,8 @@</div><div class='ctx'> #define regRDPCSTX1_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define regRDPCSTX1_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2a14</div><div class='ctx'> #define regRDPCSTX1_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define regRDPCSTX1_RDPCSTX_DEBUG_CONFIG                                                                0x2a15</div><div class='add'>+#define regRDPCSTX1_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define regRDPCSTX1_RDPCSTX_PHY_CNTL0                                                                   0x2a18</div><div class='ctx'> #define regRDPCSTX1_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define regRDPCSTX1_RDPCSTX_PHY_CNTL1                                                                   0x2a19</div><div class='hunk'>@@ -323,6 +327,8 @@</div><div class='ctx'> #define regRDPCSTX2_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define regRDPCSTX2_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2aec</div><div class='ctx'> #define regRDPCSTX2_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define regRDPCSTX2_RDPCSTX_DEBUG_CONFIG                                                                0x2aed</div><div class='add'>+#define regRDPCSTX2_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define regRDPCSTX2_RDPCSTX_PHY_CNTL0                                                                   0x2af0</div><div class='ctx'> #define regRDPCSTX2_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define regRDPCSTX2_RDPCSTX_PHY_CNTL1                                                                   0x2af1</div><div class='hunk'>@@ -407,6 +413,8 @@</div><div class='ctx'> #define regRDPCSTX3_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define regRDPCSTX3_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2bc4</div><div class='ctx'> #define regRDPCSTX3_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define regRDPCSTX3_RDPCSTX_DEBUG_CONFIG                                                                0x2bc5</div><div class='add'>+#define regRDPCSTX3_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define regRDPCSTX3_RDPCSTX_PHY_CNTL0                                                                   0x2bc8</div><div class='ctx'> #define regRDPCSTX3_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define regRDPCSTX3_RDPCSTX_PHY_CNTL1                                                                   0x2bc9</div><div class='hunk'>@@ -491,6 +499,8 @@</div><div class='ctx'> #define regRDPCSTX4_RDPCSTX_CNTL2_BASE_IDX                                                              2</div><div class='ctx'> #define regRDPCSTX4_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG                                                    0x2c9c</div><div class='ctx'> #define regRDPCSTX4_RDPCSTX_DMCU_DPALT_DIS_BLOCK_REG_BASE_IDX                                           2</div><div class='add'>+#define regRDPCSTX4_RDPCSTX_DEBUG_CONFIG                                                                0x2c9d</div><div class='add'>+#define regRDPCSTX4_RDPCSTX_DEBUG_CONFIG_BASE_IDX                                                       2</div><div class='ctx'> #define regRDPCSTX4_RDPCSTX_PHY_CNTL0                                                                   0x2ca0</div><div class='ctx'> #define regRDPCSTX4_RDPCSTX_PHY_CNTL0_BASE_IDX                                                          2</div><div class='ctx'> #define regRDPCSTX4_RDPCSTX_PHY_CNTL1                                                                   0x2ca1</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h<br/>index 4908044f7409..4c8e7fdb6976 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h</a></div><div class='hunk'>@@ -4830,6 +4830,8 @@</div><div class='ctx'> #define mmCP_ECC_FIRSTOCCURRENCE_RING2_BASE_IDX                                                        0</div><div class='ctx'> #define mmGB_EDC_MODE                                                                                  0x1e1e</div><div class='ctx'> #define mmGB_EDC_MODE_BASE_IDX                                                                         0</div><div class='add'>+#define mmCP_DEBUG                                                                                     0x1e1f</div><div class='add'>+#define mmCP_DEBUG_BASE_IDX                                                                            0</div><div class='ctx'> #define mmCP_FETCHER_SOURCE                                                                            0x1e22</div><div class='ctx'> #define mmCP_FETCHER_SOURCE_BASE_IDX                                                                   0</div><div class='ctx'> #define mmCP_PQ_WPTR_POLL_CNTL                                                                         0x1e23</div><div class='hunk'>@@ -7778,6 +7780,8 @@</div><div class='ctx'> #define mmCP_MES_DOORBELL_CONTROL5_BASE_IDX                                                            1</div><div class='ctx'> #define mmCP_MES_DOORBELL_CONTROL6                                                                     0x2841</div><div class='ctx'> #define mmCP_MES_DOORBELL_CONTROL6_BASE_IDX                                                            1</div><div class='add'>+#define mmCP_MES_DEBUG_INTERRUPT_INSTR_PNTR                                                            0x2842</div><div class='add'>+#define mmCP_MES_DEBUG_INTERRUPT_INSTR_PNTR_BASE_IDX                                                   1</div><div class='ctx'> #define mmCP_MES_GP0_LO                                                                                0x2843</div><div class='ctx'> #define mmCP_MES_GP0_LO_BASE_IDX                                                                       1</div><div class='ctx'> #define mmCP_MES_GP0_HI                                                                                0x2844</div><div class='hunk'>@@ -9332,10 +9336,16 @@</div><div class='ctx'> #define mmRLC_LB_CNTR_INIT_1_BASE_IDX                                                                  1</div><div class='ctx'> #define mmRLC_LB_CNTR_1                                                                                0x4c1c</div><div class='ctx'> #define mmRLC_LB_CNTR_1_BASE_IDX                                                                       1</div><div class='add'>+#define mmRLC_GPM_DEBUG_INST_ADDR                                                                      0x4c1d</div><div class='add'>+#define mmRLC_GPM_DEBUG_INST_ADDR_BASE_IDX                                                             1</div><div class='ctx'> #define mmRLC_JUMP_TABLE_RESTORE                                                                       0x4c1e</div><div class='ctx'> #define mmRLC_JUMP_TABLE_RESTORE_BASE_IDX                                                              1</div><div class='ctx'> #define mmRLC_PG_DELAY_2                                                                               0x4c1f</div><div class='ctx'> #define mmRLC_PG_DELAY_2_BASE_IDX                                                                      1</div><div class='add'>+#define mmRLC_GPM_DEBUG_INST_A                                                                         0x4c22</div><div class='add'>+#define mmRLC_GPM_DEBUG_INST_A_BASE_IDX                                                                1</div><div class='add'>+#define mmRLC_GPM_DEBUG_INST_B                                                                         0x4c23</div><div class='add'>+#define mmRLC_GPM_DEBUG_INST_B_BASE_IDX                                                                1</div><div class='ctx'> #define mmRLC_GPU_CLOCK_COUNT_LSB                                                                      0x4c24</div><div class='ctx'> #define mmRLC_GPU_CLOCK_COUNT_LSB_BASE_IDX                                                             1</div><div class='ctx'> #define mmRLC_GPU_CLOCK_COUNT_MSB                                                                      0x4c25</div><div class='hunk'>@@ -9720,6 +9730,8 @@</div><div class='ctx'> #define mmRLC_SPM_THREAD_TRACE_CTRL_BASE_IDX                                                           1</div><div class='ctx'> #define mmRLC_LB_CNTR_2                                                                                0x4de7</div><div class='ctx'> #define mmRLC_LB_CNTR_2_BASE_IDX                                                                       1</div><div class='add'>+#define mmRLC_LX6_CORE_PDEBUG_INST                                                                     0x4deb</div><div class='add'>+#define mmRLC_LX6_CORE_PDEBUG_INST_BASE_IDX                                                            1</div><div class='ctx'> #define mmRLC_CPAXI_DOORBELL_MON_CTRL                                                                  0x4df1</div><div class='ctx'> #define mmRLC_CPAXI_DOORBELL_MON_CTRL_BASE_IDX                                                         1</div><div class='ctx'> #define mmRLC_CPAXI_DOORBELL_MON_STAT                                                                  0x4df2</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h<br/>index efc16ddf274a..2dfa0e5b1aa3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h</a></div><div class='hunk'>@@ -6822,6 +6822,8 @@</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__VMID__SHIFT                                                            0x14</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__VF__SHIFT                                                              0x18</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__VFID__SHIFT                                                            0x19</div><div class='add'>+#define VM_L2_PROTECTION_FAULT_STATUS__UCE__SHIFT                                                             0x1d</div><div class='add'>+#define VM_L2_PROTECTION_FAULT_STATUS__FED__SHIFT                                                             0x1e</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__MORE_FAULTS_MASK                                                       0x00000001L</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__WALKER_ERROR_MASK                                                      0x0000000EL</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__PERMISSION_FAULTS_MASK                                                 0x000000F0L</div><div class='hunk'>@@ -6832,6 +6834,8 @@</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__VMID_MASK                                                              0x00F00000L</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__VF_MASK                                                                0x01000000L</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_STATUS__VFID_MASK                                                              0x1E000000L</div><div class='add'>+#define VM_L2_PROTECTION_FAULT_STATUS__UCE_MASK                                                               0x20000000L</div><div class='add'>+#define VM_L2_PROTECTION_FAULT_STATUS__FED_MASK                                                               0x40000000L</div><div class='ctx'> //VM_L2_PROTECTION_FAULT_ADDR_LO32</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_ADDR_LO32__LOGICAL_PAGE_ADDR_LO32__SHIFT                                       0x0</div><div class='ctx'> #define VM_L2_PROTECTION_FAULT_ADDR_LO32__LOGICAL_PAGE_ADDR_LO32_MASK                                         0xFFFFFFFFL</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h<br/>index 8b931bbabe70..969e006b859b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h</a></div><div class='hunk'>@@ -237,6 +237,10 @@</div><div class='ctx'> #define regSEM_REGISTER_LAST_PART2_BASE_IDX                                                             0</div><div class='ctx'> #define regIH_CLIENT_CFG                                                                                0x0184</div><div class='ctx'> #define regIH_CLIENT_CFG_BASE_IDX                                                                       0</div><div class='add'>+#define regIH_RING1_CLIENT_CFG_INDEX                                                                    0x0185</div><div class='add'>+#define regIH_RING1_CLIENT_CFG_INDEX_BASE_IDX                                                           0</div><div class='add'>+#define regIH_RING1_CLIENT_CFG_DATA                                                                     0x0186</div><div class='add'>+#define regIH_RING1_CLIENT_CFG_DATA_BASE_IDX                                                            0</div><div class='ctx'> #define regIH_CLIENT_CFG_INDEX                                                                          0x0188</div><div class='ctx'> #define regIH_CLIENT_CFG_INDEX_BASE_IDX                                                                 0</div><div class='ctx'> #define regIH_CLIENT_CFG_DATA                                                                           0x0189</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h<br/>index f262f44fa68c..a672a91e58f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h</a></div><div class='hunk'>@@ -888,6 +888,16 @@</div><div class='ctx'> //IH_CLIENT_CFG</div><div class='ctx'> #define IH_CLIENT_CFG__TOTAL_CLIENT_NUM__SHIFT                                                                0x0</div><div class='ctx'> #define IH_CLIENT_CFG__TOTAL_CLIENT_NUM_MASK                                                                  0x0000003FL</div><div class='add'>+//IH_RING1_CLIENT_CFG_INDEX</div><div class='add'>+#define IH_RING1_CLIENT_CFG_INDEX__INDEX__SHIFT                                                               0x0</div><div class='add'>+#define IH_RING1_CLIENT_CFG_INDEX__INDEX_MASK                                                                 0x00000007L</div><div class='add'>+//IH_RING1_CLIENT_CFG_DATA</div><div class='add'>+#define IH_RING1_CLIENT_CFG_DATA__CLIENT_ID__SHIFT                                                            0x0</div><div class='add'>+#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID__SHIFT                                                            0x8</div><div class='add'>+#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID_MATCH_ENABLE__SHIFT                                               0x10</div><div class='add'>+#define IH_RING1_CLIENT_CFG_DATA__CLIENT_ID_MASK                                                              0x000000FFL</div><div class='add'>+#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID_MASK                                                              0x0000FF00L</div><div class='add'>+#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID_MATCH_ENABLE_MASK                                                 0x00010000L</div><div class='ctx'> //IH_CLIENT_CFG_INDEX</div><div class='ctx'> #define IH_CLIENT_CFG_INDEX__INDEX__SHIFT                                                                     0x0</div><div class='ctx'> #define IH_CLIENT_CFG_INDEX__INDEX_MASK                                                                       0x0000001FL</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_offset.h b/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_offset.h<br/>new file mode 100644<br/>index 000000000000..da7e31fedd58<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_offset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_offset.h</a></div><div class='hunk'>@@ -0,0 +1,511 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#ifndef _smuio_14_0_2_OFFSET_HEADER</div><div class='add'>+#define _smuio_14_0_2_OFFSET_HEADER</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_tsc_SmuSmuioDec</div><div class='add'>+// base address: 0x5a8a0</div><div class='add'>+#define regPWROK_REFCLK_GAP_CYCLES                                                                      0x0028</div><div class='add'>+#define regPWROK_REFCLK_GAP_CYCLES_BASE_IDX                                                             1</div><div class='add'>+#define regGOLDEN_TSC_INCREMENT_UPPER                                                                   0x002b</div><div class='add'>+#define regGOLDEN_TSC_INCREMENT_UPPER_BASE_IDX                                                          1</div><div class='add'>+#define regGOLDEN_TSC_INCREMENT_LOWER                                                                   0x002c</div><div class='add'>+#define regGOLDEN_TSC_INCREMENT_LOWER_BASE_IDX                                                          1</div><div class='add'>+#define regGOLDEN_TSC_COUNT_UPPER                                                                       0x002d</div><div class='add'>+#define regGOLDEN_TSC_COUNT_UPPER_BASE_IDX                                                              1</div><div class='add'>+#define regGOLDEN_TSC_COUNT_LOWER                                                                       0x002e</div><div class='add'>+#define regGOLDEN_TSC_COUNT_LOWER_BASE_IDX                                                              1</div><div class='add'>+#define regSOC_GOLDEN_TSC_SHADOW_UPPER                                                                  0x002f</div><div class='add'>+#define regSOC_GOLDEN_TSC_SHADOW_UPPER_BASE_IDX                                                         1</div><div class='add'>+#define regSOC_GOLDEN_TSC_SHADOW_LOWER                                                                  0x0030</div><div class='add'>+#define regSOC_GOLDEN_TSC_SHADOW_LOWER_BASE_IDX                                                         1</div><div class='add'>+#define regSOC_GAP_PWROK                                                                                0x0031</div><div class='add'>+#define regSOC_GAP_PWROK_BASE_IDX                                                                       1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_swtimer_SmuSmuioDec</div><div class='add'>+// base address: 0x5aca8</div><div class='add'>+#define regPWR_VIRT_RESET_REQ                                                                           0x012a</div><div class='add'>+#define regPWR_VIRT_RESET_REQ_BASE_IDX                                                                  1</div><div class='add'>+#define regPWR_DISP_TIMER_CONTROL                                                                       0x012b</div><div class='add'>+#define regPWR_DISP_TIMER_CONTROL_BASE_IDX                                                              1</div><div class='add'>+#define regPWR_DISP_TIMER_DEBUG                                                                         0x012c</div><div class='add'>+#define regPWR_DISP_TIMER_DEBUG_BASE_IDX                                                                1</div><div class='add'>+#define regPWR_DISP_TIMER2_CONTROL                                                                      0x012d</div><div class='add'>+#define regPWR_DISP_TIMER2_CONTROL_BASE_IDX                                                             1</div><div class='add'>+#define regPWR_DISP_TIMER2_DEBUG                                                                        0x012e</div><div class='add'>+#define regPWR_DISP_TIMER2_DEBUG_BASE_IDX                                                               1</div><div class='add'>+#define regPWR_DISP_TIMER_GLOBAL_CONTROL                                                                0x012f</div><div class='add'>+#define regPWR_DISP_TIMER_GLOBAL_CONTROL_BASE_IDX                                                       1</div><div class='add'>+#define regPWR_IH_CONTROL                                                                               0x0130</div><div class='add'>+#define regPWR_IH_CONTROL_BASE_IDX                                                                      1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_misc_SmuSmuioDec</div><div class='add'>+// base address: 0x5a000</div><div class='add'>+#define regSMUIO_MCM_CONFIG                                                                             0x0023</div><div class='add'>+#define regSMUIO_MCM_CONFIG_BASE_IDX                                                                    0</div><div class='add'>+#define regIP_DISCOVERY_VERSION                                                                         0x0000</div><div class='add'>+#define regIP_DISCOVERY_VERSION_BASE_IDX                                                                1</div><div class='add'>+#define regSCRATCH_REGISTER0                                                                            0x01bd</div><div class='add'>+#define regSCRATCH_REGISTER0_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER1                                                                            0x01be</div><div class='add'>+#define regSCRATCH_REGISTER1_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER2                                                                            0x01bf</div><div class='add'>+#define regSCRATCH_REGISTER2_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER3                                                                            0x01c0</div><div class='add'>+#define regSCRATCH_REGISTER3_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER4                                                                            0x01c1</div><div class='add'>+#define regSCRATCH_REGISTER4_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER5                                                                            0x01c2</div><div class='add'>+#define regSCRATCH_REGISTER5_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER6                                                                            0x01c3</div><div class='add'>+#define regSCRATCH_REGISTER6_BASE_IDX                                                                   1</div><div class='add'>+#define regSCRATCH_REGISTER7                                                                            0x01c4</div><div class='add'>+#define regSCRATCH_REGISTER7_BASE_IDX                                                                   1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_i2c_SmuSmuioDec</div><div class='add'>+// base address: 0x5a100</div><div class='add'>+#define regCKSVII2C_IC_CON                                                                              0x0040</div><div class='add'>+#define regCKSVII2C_IC_CON_BASE_IDX                                                                     0</div><div class='add'>+#define regCKSVII2C_IC_TAR                                                                              0x0041</div><div class='add'>+#define regCKSVII2C_IC_TAR_BASE_IDX                                                                     0</div><div class='add'>+#define regCKSVII2C_IC_SAR                                                                              0x0042</div><div class='add'>+#define regCKSVII2C_IC_SAR_BASE_IDX                                                                     0</div><div class='add'>+#define regCKSVII2C_IC_HS_MADDR                                                                         0x0043</div><div class='add'>+#define regCKSVII2C_IC_HS_MADDR_BASE_IDX                                                                0</div><div class='add'>+#define regCKSVII2C_IC_DATA_CMD                                                                         0x0044</div><div class='add'>+#define regCKSVII2C_IC_DATA_CMD_BASE_IDX                                                                0</div><div class='add'>+#define regCKSVII2C_IC_SS_SCL_HCNT                                                                      0x0045</div><div class='add'>+#define regCKSVII2C_IC_SS_SCL_HCNT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_SS_SCL_LCNT                                                                      0x0046</div><div class='add'>+#define regCKSVII2C_IC_SS_SCL_LCNT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_FS_SCL_HCNT                                                                      0x0047</div><div class='add'>+#define regCKSVII2C_IC_FS_SCL_HCNT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_FS_SCL_LCNT                                                                      0x0048</div><div class='add'>+#define regCKSVII2C_IC_FS_SCL_LCNT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_HS_SCL_HCNT                                                                      0x0049</div><div class='add'>+#define regCKSVII2C_IC_HS_SCL_HCNT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_HS_SCL_LCNT                                                                      0x004a</div><div class='add'>+#define regCKSVII2C_IC_HS_SCL_LCNT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_INTR_STAT                                                                        0x004b</div><div class='add'>+#define regCKSVII2C_IC_INTR_STAT_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C_IC_INTR_MASK                                                                        0x004c</div><div class='add'>+#define regCKSVII2C_IC_INTR_MASK_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C_IC_RAW_INTR_STAT                                                                    0x004d</div><div class='add'>+#define regCKSVII2C_IC_RAW_INTR_STAT_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C_IC_RX_TL                                                                            0x004e</div><div class='add'>+#define regCKSVII2C_IC_RX_TL_BASE_IDX                                                                   0</div><div class='add'>+#define regCKSVII2C_IC_TX_TL                                                                            0x004f</div><div class='add'>+#define regCKSVII2C_IC_TX_TL_BASE_IDX                                                                   0</div><div class='add'>+#define regCKSVII2C_IC_CLR_INTR                                                                         0x0050</div><div class='add'>+#define regCKSVII2C_IC_CLR_INTR_BASE_IDX                                                                0</div><div class='add'>+#define regCKSVII2C_IC_CLR_RX_UNDER                                                                     0x0051</div><div class='add'>+#define regCKSVII2C_IC_CLR_RX_UNDER_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C_IC_CLR_RX_OVER                                                                      0x0052</div><div class='add'>+#define regCKSVII2C_IC_CLR_RX_OVER_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_CLR_TX_OVER                                                                      0x0053</div><div class='add'>+#define regCKSVII2C_IC_CLR_TX_OVER_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_CLR_RD_REQ                                                                       0x0054</div><div class='add'>+#define regCKSVII2C_IC_CLR_RD_REQ_BASE_IDX                                                              0</div><div class='add'>+#define regCKSVII2C_IC_CLR_TX_ABRT                                                                      0x0055</div><div class='add'>+#define regCKSVII2C_IC_CLR_TX_ABRT_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_CLR_RX_DONE                                                                      0x0056</div><div class='add'>+#define regCKSVII2C_IC_CLR_RX_DONE_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C_IC_CLR_ACTIVITY                                                                     0x0057</div><div class='add'>+#define regCKSVII2C_IC_CLR_ACTIVITY_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C_IC_CLR_STOP_DET                                                                     0x0058</div><div class='add'>+#define regCKSVII2C_IC_CLR_STOP_DET_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C_IC_CLR_START_DET                                                                    0x0059</div><div class='add'>+#define regCKSVII2C_IC_CLR_START_DET_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C_IC_CLR_GEN_CALL                                                                     0x005a</div><div class='add'>+#define regCKSVII2C_IC_CLR_GEN_CALL_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C_IC_ENABLE                                                                           0x005b</div><div class='add'>+#define regCKSVII2C_IC_ENABLE_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C_IC_STATUS                                                                           0x005c</div><div class='add'>+#define regCKSVII2C_IC_STATUS_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C_IC_TXFLR                                                                            0x005d</div><div class='add'>+#define regCKSVII2C_IC_TXFLR_BASE_IDX                                                                   0</div><div class='add'>+#define regCKSVII2C_IC_RXFLR                                                                            0x005e</div><div class='add'>+#define regCKSVII2C_IC_RXFLR_BASE_IDX                                                                   0</div><div class='add'>+#define regCKSVII2C_IC_SDA_HOLD                                                                         0x005f</div><div class='add'>+#define regCKSVII2C_IC_SDA_HOLD_BASE_IDX                                                                0</div><div class='add'>+#define regCKSVII2C_IC_TX_ABRT_SOURCE                                                                   0x0060</div><div class='add'>+#define regCKSVII2C_IC_TX_ABRT_SOURCE_BASE_IDX                                                          0</div><div class='add'>+#define regCKSVII2C_IC_SLV_DATA_NACK_ONLY                                                               0x0061</div><div class='add'>+#define regCKSVII2C_IC_SLV_DATA_NACK_ONLY_BASE_IDX                                                      0</div><div class='add'>+#define regCKSVII2C_IC_DMA_CR                                                                           0x0062</div><div class='add'>+#define regCKSVII2C_IC_DMA_CR_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C_IC_DMA_TDLR                                                                         0x0063</div><div class='add'>+#define regCKSVII2C_IC_DMA_TDLR_BASE_IDX                                                                0</div><div class='add'>+#define regCKSVII2C_IC_DMA_RDLR                                                                         0x0064</div><div class='add'>+#define regCKSVII2C_IC_DMA_RDLR_BASE_IDX                                                                0</div><div class='add'>+#define regCKSVII2C_IC_SDA_SETUP                                                                        0x0065</div><div class='add'>+#define regCKSVII2C_IC_SDA_SETUP_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C_IC_ACK_GENERAL_CALL                                                                 0x0066</div><div class='add'>+#define regCKSVII2C_IC_ACK_GENERAL_CALL_BASE_IDX                                                        0</div><div class='add'>+#define regCKSVII2C_IC_ENABLE_STATUS                                                                    0x0067</div><div class='add'>+#define regCKSVII2C_IC_ENABLE_STATUS_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C_IC_FS_SPKLEN                                                                        0x0068</div><div class='add'>+#define regCKSVII2C_IC_FS_SPKLEN_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C_IC_HS_SPKLEN                                                                        0x0069</div><div class='add'>+#define regCKSVII2C_IC_HS_SPKLEN_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C_IC_CLR_RESTART_DET                                                                  0x006a</div><div class='add'>+#define regCKSVII2C_IC_CLR_RESTART_DET_BASE_IDX                                                         0</div><div class='add'>+#define regCKSVII2C_IC_COMP_PARAM_1                                                                     0x006d</div><div class='add'>+#define regCKSVII2C_IC_COMP_PARAM_1_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C_IC_COMP_VERSION                                                                     0x006e</div><div class='add'>+#define regCKSVII2C_IC_COMP_VERSION_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C_IC_COMP_TYPE                                                                        0x006f</div><div class='add'>+#define regCKSVII2C_IC_COMP_TYPE_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_CON                                                                             0x0080</div><div class='add'>+#define regCKSVII2C1_IC_CON_BASE_IDX                                                                    0</div><div class='add'>+#define regCKSVII2C1_IC_TAR                                                                             0x0081</div><div class='add'>+#define regCKSVII2C1_IC_TAR_BASE_IDX                                                                    0</div><div class='add'>+#define regCKSVII2C1_IC_SAR                                                                             0x0082</div><div class='add'>+#define regCKSVII2C1_IC_SAR_BASE_IDX                                                                    0</div><div class='add'>+#define regCKSVII2C1_IC_HS_MADDR                                                                        0x0083</div><div class='add'>+#define regCKSVII2C1_IC_HS_MADDR_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_DATA_CMD                                                                        0x0084</div><div class='add'>+#define regCKSVII2C1_IC_DATA_CMD_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_SS_SCL_HCNT                                                                     0x0085</div><div class='add'>+#define regCKSVII2C1_IC_SS_SCL_HCNT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_SS_SCL_LCNT                                                                     0x0086</div><div class='add'>+#define regCKSVII2C1_IC_SS_SCL_LCNT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_FS_SCL_HCNT                                                                     0x0087</div><div class='add'>+#define regCKSVII2C1_IC_FS_SCL_HCNT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_FS_SCL_LCNT                                                                     0x0088</div><div class='add'>+#define regCKSVII2C1_IC_FS_SCL_LCNT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_HS_SCL_HCNT                                                                     0x0089</div><div class='add'>+#define regCKSVII2C1_IC_HS_SCL_HCNT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_HS_SCL_LCNT                                                                     0x008a</div><div class='add'>+#define regCKSVII2C1_IC_HS_SCL_LCNT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_INTR_STAT                                                                       0x008b</div><div class='add'>+#define regCKSVII2C1_IC_INTR_STAT_BASE_IDX                                                              0</div><div class='add'>+#define regCKSVII2C1_IC_INTR_MASK                                                                       0x008c</div><div class='add'>+#define regCKSVII2C1_IC_INTR_MASK_BASE_IDX                                                              0</div><div class='add'>+#define regCKSVII2C1_IC_RAW_INTR_STAT                                                                   0x008d</div><div class='add'>+#define regCKSVII2C1_IC_RAW_INTR_STAT_BASE_IDX                                                          0</div><div class='add'>+#define regCKSVII2C1_IC_RX_TL                                                                           0x008e</div><div class='add'>+#define regCKSVII2C1_IC_RX_TL_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C1_IC_TX_TL                                                                           0x008f</div><div class='add'>+#define regCKSVII2C1_IC_TX_TL_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_INTR                                                                        0x0090</div><div class='add'>+#define regCKSVII2C1_IC_CLR_INTR_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RX_UNDER                                                                    0x0091</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RX_UNDER_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RX_OVER                                                                     0x0092</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RX_OVER_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_TX_OVER                                                                     0x0093</div><div class='add'>+#define regCKSVII2C1_IC_CLR_TX_OVER_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RD_REQ                                                                      0x0094</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RD_REQ_BASE_IDX                                                             0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_TX_ABRT                                                                     0x0095</div><div class='add'>+#define regCKSVII2C1_IC_CLR_TX_ABRT_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RX_DONE                                                                     0x0096</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RX_DONE_BASE_IDX                                                            0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_ACTIVITY                                                                    0x0097</div><div class='add'>+#define regCKSVII2C1_IC_CLR_ACTIVITY_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_STOP_DET                                                                    0x0098</div><div class='add'>+#define regCKSVII2C1_IC_CLR_STOP_DET_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_START_DET                                                                   0x0099</div><div class='add'>+#define regCKSVII2C1_IC_CLR_START_DET_BASE_IDX                                                          0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_GEN_CALL                                                                    0x009a</div><div class='add'>+#define regCKSVII2C1_IC_CLR_GEN_CALL_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C1_IC_ENABLE                                                                          0x009b</div><div class='add'>+#define regCKSVII2C1_IC_ENABLE_BASE_IDX                                                                 0</div><div class='add'>+#define regCKSVII2C1_IC_STATUS                                                                          0x009c</div><div class='add'>+#define regCKSVII2C1_IC_STATUS_BASE_IDX                                                                 0</div><div class='add'>+#define regCKSVII2C1_IC_TXFLR                                                                           0x009d</div><div class='add'>+#define regCKSVII2C1_IC_TXFLR_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C1_IC_RXFLR                                                                           0x009e</div><div class='add'>+#define regCKSVII2C1_IC_RXFLR_BASE_IDX                                                                  0</div><div class='add'>+#define regCKSVII2C1_IC_SDA_HOLD                                                                        0x009f</div><div class='add'>+#define regCKSVII2C1_IC_SDA_HOLD_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_TX_ABRT_SOURCE                                                                  0x00a0</div><div class='add'>+#define regCKSVII2C1_IC_TX_ABRT_SOURCE_BASE_IDX                                                         0</div><div class='add'>+#define regCKSVII2C1_IC_SLV_DATA_NACK_ONLY                                                              0x00a1</div><div class='add'>+#define regCKSVII2C1_IC_SLV_DATA_NACK_ONLY_BASE_IDX                                                     0</div><div class='add'>+#define regCKSVII2C1_IC_DMA_CR                                                                          0x00a2</div><div class='add'>+#define regCKSVII2C1_IC_DMA_CR_BASE_IDX                                                                 0</div><div class='add'>+#define regCKSVII2C1_IC_DMA_TDLR                                                                        0x00a3</div><div class='add'>+#define regCKSVII2C1_IC_DMA_TDLR_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_DMA_RDLR                                                                        0x00a4</div><div class='add'>+#define regCKSVII2C1_IC_DMA_RDLR_BASE_IDX                                                               0</div><div class='add'>+#define regCKSVII2C1_IC_SDA_SETUP                                                                       0x00a5</div><div class='add'>+#define regCKSVII2C1_IC_SDA_SETUP_BASE_IDX                                                              0</div><div class='add'>+#define regCKSVII2C1_IC_ACK_GENERAL_CALL                                                                0x00a6</div><div class='add'>+#define regCKSVII2C1_IC_ACK_GENERAL_CALL_BASE_IDX                                                       0</div><div class='add'>+#define regCKSVII2C1_IC_ENABLE_STATUS                                                                   0x00a7</div><div class='add'>+#define regCKSVII2C1_IC_ENABLE_STATUS_BASE_IDX                                                          0</div><div class='add'>+#define regCKSVII2C1_IC_FS_SPKLEN                                                                       0x00a8</div><div class='add'>+#define regCKSVII2C1_IC_FS_SPKLEN_BASE_IDX                                                              0</div><div class='add'>+#define regCKSVII2C1_IC_HS_SPKLEN                                                                       0x00a9</div><div class='add'>+#define regCKSVII2C1_IC_HS_SPKLEN_BASE_IDX                                                              0</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RESTART_DET                                                                 0x00aa</div><div class='add'>+#define regCKSVII2C1_IC_CLR_RESTART_DET_BASE_IDX                                                        0</div><div class='add'>+#define regCKSVII2C1_IC_COMP_PARAM_1                                                                    0x00ad</div><div class='add'>+#define regCKSVII2C1_IC_COMP_PARAM_1_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C1_IC_COMP_VERSION                                                                    0x00ae</div><div class='add'>+#define regCKSVII2C1_IC_COMP_VERSION_BASE_IDX                                                           0</div><div class='add'>+#define regCKSVII2C1_IC_COMP_TYPE                                                                       0x00af</div><div class='add'>+#define regCKSVII2C1_IC_COMP_TYPE_BASE_IDX                                                              0</div><div class='add'>+#define regSMUIO_PWRMGT                                                                                 0x018c</div><div class='add'>+#define regSMUIO_PWRMGT_BASE_IDX                                                                        0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_rom_SmuSmuioDec</div><div class='add'>+// base address: 0x5a380</div><div class='add'>+#define regROM_CNTL                                                                                     0x00e0</div><div class='add'>+#define regROM_CNTL_BASE_IDX                                                                            0</div><div class='add'>+#define regPAGE_MIRROR_CNTL                                                                             0x00e1</div><div class='add'>+#define regPAGE_MIRROR_CNTL_BASE_IDX                                                                    0</div><div class='add'>+#define regROM_STATUS                                                                                   0x00e2</div><div class='add'>+#define regROM_STATUS_BASE_IDX                                                                          0</div><div class='add'>+#define regCGTT_ROM_CLK_CTRL0                                                                           0x00e3</div><div class='add'>+#define regCGTT_ROM_CLK_CTRL0_BASE_IDX                                                                  0</div><div class='add'>+#define regROM_INDEX                                                                                    0x00e4</div><div class='add'>+#define regROM_INDEX_BASE_IDX                                                                           0</div><div class='add'>+#define regROM_DATA                                                                                     0x00e5</div><div class='add'>+#define regROM_DATA_BASE_IDX                                                                            0</div><div class='add'>+#define regROM_START                                                                                    0x00e6</div><div class='add'>+#define regROM_START_BASE_IDX                                                                           0</div><div class='add'>+#define regROM_SW_CNTL                                                                                  0x00e8</div><div class='add'>+#define regROM_SW_CNTL_BASE_IDX                                                                         0</div><div class='add'>+#define regROM_SW_STATUS                                                                                0x00e9</div><div class='add'>+#define regROM_SW_STATUS_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_COMMAND                                                                               0x00ea</div><div class='add'>+#define regROM_SW_COMMAND_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_1                                                                                0x00ec</div><div class='add'>+#define regROM_SW_DATA_1_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_2                                                                                0x00ed</div><div class='add'>+#define regROM_SW_DATA_2_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_3                                                                                0x00ee</div><div class='add'>+#define regROM_SW_DATA_3_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_4                                                                                0x00ef</div><div class='add'>+#define regROM_SW_DATA_4_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_5                                                                                0x00f0</div><div class='add'>+#define regROM_SW_DATA_5_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_6                                                                                0x00f1</div><div class='add'>+#define regROM_SW_DATA_6_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_7                                                                                0x00f2</div><div class='add'>+#define regROM_SW_DATA_7_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_8                                                                                0x00f3</div><div class='add'>+#define regROM_SW_DATA_8_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_9                                                                                0x00f4</div><div class='add'>+#define regROM_SW_DATA_9_BASE_IDX                                                                       0</div><div class='add'>+#define regROM_SW_DATA_10                                                                               0x00f5</div><div class='add'>+#define regROM_SW_DATA_10_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_11                                                                               0x00f6</div><div class='add'>+#define regROM_SW_DATA_11_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_12                                                                               0x00f7</div><div class='add'>+#define regROM_SW_DATA_12_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_13                                                                               0x00f8</div><div class='add'>+#define regROM_SW_DATA_13_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_14                                                                               0x00f9</div><div class='add'>+#define regROM_SW_DATA_14_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_15                                                                               0x00fa</div><div class='add'>+#define regROM_SW_DATA_15_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_16                                                                               0x00fb</div><div class='add'>+#define regROM_SW_DATA_16_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_17                                                                               0x00fc</div><div class='add'>+#define regROM_SW_DATA_17_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_18                                                                               0x00fd</div><div class='add'>+#define regROM_SW_DATA_18_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_19                                                                               0x00fe</div><div class='add'>+#define regROM_SW_DATA_19_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_20                                                                               0x00ff</div><div class='add'>+#define regROM_SW_DATA_20_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_21                                                                               0x0100</div><div class='add'>+#define regROM_SW_DATA_21_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_22                                                                               0x0101</div><div class='add'>+#define regROM_SW_DATA_22_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_23                                                                               0x0102</div><div class='add'>+#define regROM_SW_DATA_23_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_24                                                                               0x0103</div><div class='add'>+#define regROM_SW_DATA_24_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_25                                                                               0x0104</div><div class='add'>+#define regROM_SW_DATA_25_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_26                                                                               0x0105</div><div class='add'>+#define regROM_SW_DATA_26_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_27                                                                               0x0106</div><div class='add'>+#define regROM_SW_DATA_27_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_28                                                                               0x0107</div><div class='add'>+#define regROM_SW_DATA_28_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_29                                                                               0x0108</div><div class='add'>+#define regROM_SW_DATA_29_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_30                                                                               0x0109</div><div class='add'>+#define regROM_SW_DATA_30_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_31                                                                               0x010a</div><div class='add'>+#define regROM_SW_DATA_31_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_32                                                                               0x010b</div><div class='add'>+#define regROM_SW_DATA_32_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_33                                                                               0x010c</div><div class='add'>+#define regROM_SW_DATA_33_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_34                                                                               0x010d</div><div class='add'>+#define regROM_SW_DATA_34_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_35                                                                               0x010e</div><div class='add'>+#define regROM_SW_DATA_35_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_36                                                                               0x010f</div><div class='add'>+#define regROM_SW_DATA_36_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_37                                                                               0x0110</div><div class='add'>+#define regROM_SW_DATA_37_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_38                                                                               0x0111</div><div class='add'>+#define regROM_SW_DATA_38_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_39                                                                               0x0112</div><div class='add'>+#define regROM_SW_DATA_39_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_40                                                                               0x0113</div><div class='add'>+#define regROM_SW_DATA_40_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_41                                                                               0x0114</div><div class='add'>+#define regROM_SW_DATA_41_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_42                                                                               0x0115</div><div class='add'>+#define regROM_SW_DATA_42_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_43                                                                               0x0116</div><div class='add'>+#define regROM_SW_DATA_43_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_44                                                                               0x0117</div><div class='add'>+#define regROM_SW_DATA_44_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_45                                                                               0x0118</div><div class='add'>+#define regROM_SW_DATA_45_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_46                                                                               0x0119</div><div class='add'>+#define regROM_SW_DATA_46_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_47                                                                               0x011a</div><div class='add'>+#define regROM_SW_DATA_47_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_48                                                                               0x011b</div><div class='add'>+#define regROM_SW_DATA_48_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_49                                                                               0x011c</div><div class='add'>+#define regROM_SW_DATA_49_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_50                                                                               0x011d</div><div class='add'>+#define regROM_SW_DATA_50_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_51                                                                               0x011e</div><div class='add'>+#define regROM_SW_DATA_51_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_52                                                                               0x011f</div><div class='add'>+#define regROM_SW_DATA_52_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_53                                                                               0x0120</div><div class='add'>+#define regROM_SW_DATA_53_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_54                                                                               0x0121</div><div class='add'>+#define regROM_SW_DATA_54_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_55                                                                               0x0122</div><div class='add'>+#define regROM_SW_DATA_55_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_56                                                                               0x0123</div><div class='add'>+#define regROM_SW_DATA_56_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_57                                                                               0x0124</div><div class='add'>+#define regROM_SW_DATA_57_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_58                                                                               0x0125</div><div class='add'>+#define regROM_SW_DATA_58_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_59                                                                               0x0126</div><div class='add'>+#define regROM_SW_DATA_59_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_60                                                                               0x0127</div><div class='add'>+#define regROM_SW_DATA_60_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_61                                                                               0x0128</div><div class='add'>+#define regROM_SW_DATA_61_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_62                                                                               0x0129</div><div class='add'>+#define regROM_SW_DATA_62_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_63                                                                               0x012a</div><div class='add'>+#define regROM_SW_DATA_63_BASE_IDX                                                                      0</div><div class='add'>+#define regROM_SW_DATA_64                                                                               0x012b</div><div class='add'>+#define regROM_SW_DATA_64_BASE_IDX                                                                      0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_gpio_SmuSmuioDec</div><div class='add'>+// base address: 0x5a500</div><div class='add'>+#define regSMU_GPIOPAD_SW_INT_STAT                                                                      0x0140</div><div class='add'>+#define regSMU_GPIOPAD_SW_INT_STAT_BASE_IDX                                                             0</div><div class='add'>+#define regSMU_GPIOPAD_MASK                                                                             0x0141</div><div class='add'>+#define regSMU_GPIOPAD_MASK_BASE_IDX                                                                    0</div><div class='add'>+#define regSMU_GPIOPAD_A                                                                                0x0142</div><div class='add'>+#define regSMU_GPIOPAD_A_BASE_IDX                                                                       0</div><div class='add'>+#define regSMU_GPIOPAD_TXIMPSEL                                                                         0x0143</div><div class='add'>+#define regSMU_GPIOPAD_TXIMPSEL_BASE_IDX                                                                0</div><div class='add'>+#define regSMU_GPIOPAD_EN                                                                               0x0144</div><div class='add'>+#define regSMU_GPIOPAD_EN_BASE_IDX                                                                      0</div><div class='add'>+#define regSMU_GPIOPAD_Y                                                                                0x0145</div><div class='add'>+#define regSMU_GPIOPAD_Y_BASE_IDX                                                                       0</div><div class='add'>+#define regSMU_GPIOPAD_RXEN                                                                             0x0146</div><div class='add'>+#define regSMU_GPIOPAD_RXEN_BASE_IDX                                                                    0</div><div class='add'>+#define regSMU_GPIOPAD_RCVR_SEL0                                                                        0x0147</div><div class='add'>+#define regSMU_GPIOPAD_RCVR_SEL0_BASE_IDX                                                               0</div><div class='add'>+#define regSMU_GPIOPAD_RCVR_SEL1                                                                        0x0148</div><div class='add'>+#define regSMU_GPIOPAD_RCVR_SEL1_BASE_IDX                                                               0</div><div class='add'>+#define regSMU_GPIOPAD_PU_EN                                                                            0x0149</div><div class='add'>+#define regSMU_GPIOPAD_PU_EN_BASE_IDX                                                                   0</div><div class='add'>+#define regSMU_GPIOPAD_PD_EN                                                                            0x014a</div><div class='add'>+#define regSMU_GPIOPAD_PD_EN_BASE_IDX                                                                   0</div><div class='add'>+#define regSMU_GPIOPAD_PINSTRAPS                                                                        0x014b</div><div class='add'>+#define regSMU_GPIOPAD_PINSTRAPS_BASE_IDX                                                               0</div><div class='add'>+#define regDFT_PINSTRAPS                                                                                0x014c</div><div class='add'>+#define regDFT_PINSTRAPS_BASE_IDX                                                                       0</div><div class='add'>+#define regSMU_GPIOPAD_INT_STAT_EN                                                                      0x014d</div><div class='add'>+#define regSMU_GPIOPAD_INT_STAT_EN_BASE_IDX                                                             0</div><div class='add'>+#define regSMU_GPIOPAD_INT_STAT                                                                         0x014e</div><div class='add'>+#define regSMU_GPIOPAD_INT_STAT_BASE_IDX                                                                0</div><div class='add'>+#define regSMU_GPIOPAD_INT_STAT_AK                                                                      0x014f</div><div class='add'>+#define regSMU_GPIOPAD_INT_STAT_AK_BASE_IDX                                                             0</div><div class='add'>+#define regSMU_GPIOPAD_INT_EN                                                                           0x0150</div><div class='add'>+#define regSMU_GPIOPAD_INT_EN_BASE_IDX                                                                  0</div><div class='add'>+#define regSMU_GPIOPAD_INT_TYPE                                                                         0x0151</div><div class='add'>+#define regSMU_GPIOPAD_INT_TYPE_BASE_IDX                                                                0</div><div class='add'>+#define regSMU_GPIOPAD_INT_POLARITY                                                                     0x0152</div><div class='add'>+#define regSMU_GPIOPAD_INT_POLARITY_BASE_IDX                                                            0</div><div class='add'>+#define regSMUIO_PCC_GPIO_SELECT                                                                        0x0155</div><div class='add'>+#define regSMUIO_PCC_GPIO_SELECT_BASE_IDX                                                               0</div><div class='add'>+#define regSMU_GPIOPAD_S0                                                                               0x0156</div><div class='add'>+#define regSMU_GPIOPAD_S0_BASE_IDX                                                                      0</div><div class='add'>+#define regSMU_GPIOPAD_S1                                                                               0x0157</div><div class='add'>+#define regSMU_GPIOPAD_S1_BASE_IDX                                                                      0</div><div class='add'>+#define regSMU_GPIOPAD_SCHMEN                                                                           0x0158</div><div class='add'>+#define regSMU_GPIOPAD_SCHMEN_BASE_IDX                                                                  0</div><div class='add'>+#define regSMU_GPIOPAD_SCL_EN                                                                           0x0159</div><div class='add'>+#define regSMU_GPIOPAD_SCL_EN_BASE_IDX                                                                  0</div><div class='add'>+#define regSMU_GPIOPAD_SDA_EN                                                                           0x015a</div><div class='add'>+#define regSMU_GPIOPAD_SDA_EN_BASE_IDX                                                                  0</div><div class='add'>+#define regSMUIO_GPIO_INT0_SELECT                                                                       0x015b</div><div class='add'>+#define regSMUIO_GPIO_INT0_SELECT_BASE_IDX                                                              0</div><div class='add'>+#define regSMUIO_GPIO_INT1_SELECT                                                                       0x015c</div><div class='add'>+#define regSMUIO_GPIO_INT1_SELECT_BASE_IDX                                                              0</div><div class='add'>+#define regSMUIO_GPIO_INT2_SELECT                                                                       0x015d</div><div class='add'>+#define regSMUIO_GPIO_INT2_SELECT_BASE_IDX                                                              0</div><div class='add'>+#define regSMUIO_GPIO_INT3_SELECT                                                                       0x015e</div><div class='add'>+#define regSMUIO_GPIO_INT3_SELECT_BASE_IDX                                                              0</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT0_STAT                                                                     0x015f</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT0_STAT_BASE_IDX                                                            0</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT1_STAT                                                                     0x0160</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT1_STAT_BASE_IDX                                                            0</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT2_STAT                                                                     0x0161</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT2_STAT_BASE_IDX                                                            0</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT3_STAT                                                                     0x0162</div><div class='add'>+#define regSMU_GPIOPAD_MP_INT3_STAT_BASE_IDX                                                            0</div><div class='add'>+#define regSMIO_INDEX                                                                                   0x0163</div><div class='add'>+#define regSMIO_INDEX_BASE_IDX                                                                          0</div><div class='add'>+#define regS0_VID_SMIO_CNTL                                                                             0x0164</div><div class='add'>+#define regS0_VID_SMIO_CNTL_BASE_IDX                                                                    0</div><div class='add'>+#define regS1_VID_SMIO_CNTL                                                                             0x0165</div><div class='add'>+#define regS1_VID_SMIO_CNTL_BASE_IDX                                                                    0</div><div class='add'>+#define regOPEN_DRAIN_SELECT                                                                            0x0166</div><div class='add'>+#define regOPEN_DRAIN_SELECT_BASE_IDX                                                                   0</div><div class='add'>+#define regSMIO_ENABLE                                                                                  0x0167</div><div class='add'>+#define regSMIO_ENABLE_BASE_IDX                                                                         0</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_sh_mask.h<br/>new file mode 100644<br/>index 000000000000..6204505e553b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_sh_mask.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_14_0_2_sh_mask.h</a></div><div class='hunk'>@@ -0,0 +1,1106 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#ifndef _smuio_14_0_2_SH_MASK_HEADER</div><div class='add'>+#define _smuio_14_0_2_SH_MASK_HEADER</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_tsc_SmuSmuioDec</div><div class='add'>+//PWROK_REFCLK_GAP_CYCLES</div><div class='add'>+#define PWROK_REFCLK_GAP_CYCLES__Pwrok_PreAssertion_clkgap_cycles__SHIFT                                      0x0</div><div class='add'>+#define PWROK_REFCLK_GAP_CYCLES__Pwrok_PostAssertion_clkgap_cycles__SHIFT                                     0x8</div><div class='add'>+#define PWROK_REFCLK_GAP_CYCLES__Pwrok_PreAssertion_clkgap_cycles_MASK                                        0x000000FFL</div><div class='add'>+#define PWROK_REFCLK_GAP_CYCLES__Pwrok_PostAssertion_clkgap_cycles_MASK                                       0x0000FF00L</div><div class='add'>+//GOLDEN_TSC_INCREMENT_UPPER</div><div class='add'>+#define GOLDEN_TSC_INCREMENT_UPPER__GoldenTscIncrementUpper__SHIFT                                            0x0</div><div class='add'>+#define GOLDEN_TSC_INCREMENT_UPPER__GoldenTscIncrementUpper_MASK                                              0x00FFFFFFL</div><div class='add'>+//GOLDEN_TSC_INCREMENT_LOWER</div><div class='add'>+#define GOLDEN_TSC_INCREMENT_LOWER__GoldenTscIncrementLower__SHIFT                                            0x0</div><div class='add'>+#define GOLDEN_TSC_INCREMENT_LOWER__GoldenTscIncrementLower_MASK                                              0xFFFFFFFFL</div><div class='add'>+//GOLDEN_TSC_COUNT_UPPER</div><div class='add'>+#define GOLDEN_TSC_COUNT_UPPER__GoldenTscCountUpper__SHIFT                                                    0x0</div><div class='add'>+#define GOLDEN_TSC_COUNT_UPPER__GoldenTscCountUpper_MASK                                                      0x00FFFFFFL</div><div class='add'>+//GOLDEN_TSC_COUNT_LOWER</div><div class='add'>+#define GOLDEN_TSC_COUNT_LOWER__GoldenTscCountLower__SHIFT                                                    0x0</div><div class='add'>+#define GOLDEN_TSC_COUNT_LOWER__GoldenTscCountLower_MASK                                                      0xFFFFFFFFL</div><div class='add'>+//SOC_GOLDEN_TSC_SHADOW_UPPER</div><div class='add'>+#define SOC_GOLDEN_TSC_SHADOW_UPPER__SocGoldenTscShadowUpper__SHIFT                                           0x0</div><div class='add'>+#define SOC_GOLDEN_TSC_SHADOW_UPPER__SocGoldenTscShadowUpper_MASK                                             0x00FFFFFFL</div><div class='add'>+//SOC_GOLDEN_TSC_SHADOW_LOWER</div><div class='add'>+#define SOC_GOLDEN_TSC_SHADOW_LOWER__SocGoldenTscShadowLower__SHIFT                                           0x0</div><div class='add'>+#define SOC_GOLDEN_TSC_SHADOW_LOWER__SocGoldenTscShadowLower_MASK                                             0xFFFFFFFFL</div><div class='add'>+//SOC_GAP_PWROK</div><div class='add'>+#define SOC_GAP_PWROK__soc_gap_pwrok__SHIFT                                                                   0x0</div><div class='add'>+#define SOC_GAP_PWROK__soc_gap_pwrok_MASK                                                                     0x00000001L</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_swtimer_SmuSmuioDec</div><div class='add'>+//PWR_VIRT_RESET_REQ</div><div class='add'>+#define PWR_VIRT_RESET_REQ__VF_FLR__SHIFT                                                                     0x0</div><div class='add'>+#define PWR_VIRT_RESET_REQ__PF_FLR__SHIFT                                                                     0x1f</div><div class='add'>+#define PWR_VIRT_RESET_REQ__VF_FLR_MASK                                                                       0x7FFFFFFFL</div><div class='add'>+#define PWR_VIRT_RESET_REQ__PF_FLR_MASK                                                                       0x80000000L</div><div class='add'>+//PWR_DISP_TIMER_CONTROL</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT__SHIFT                                                   0x0</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_ENABLE__SHIFT                                                  0x19</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_DISABLE__SHIFT                                                 0x1a</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MASK__SHIFT                                                    0x1b</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_STAT_AK__SHIFT                                                 0x1c</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_TYPE__SHIFT                                                    0x1d</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE__SHIFT                                                    0x1e</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK                                                     0x01FFFFFFL</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_ENABLE_MASK                                                    0x02000000L</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_DISABLE_MASK                                                   0x04000000L</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MASK_MASK                                                      0x08000000L</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_STAT_AK_MASK                                                   0x10000000L</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_TYPE_MASK                                                      0x20000000L</div><div class='add'>+#define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_MODE_MASK                                                      0x40000000L</div><div class='add'>+//PWR_DISP_TIMER_DEBUG</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_INT_RUNNING__SHIFT                                                   0x0</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_INT_STAT__SHIFT                                                      0x1</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_INT__SHIFT                                                           0x2</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_RUN_VAL__SHIFT                                                       0x7</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_INT_RUNNING_MASK                                                     0x00000001L</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_INT_STAT_MASK                                                        0x00000002L</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_INT_MASK                                                             0x00000004L</div><div class='add'>+#define PWR_DISP_TIMER_DEBUG__DISP_TIMER_RUN_VAL_MASK                                                         0xFFFFFF80L</div><div class='add'>+//PWR_DISP_TIMER2_CONTROL</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_COUNT__SHIFT                                                  0x0</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_ENABLE__SHIFT                                                 0x19</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_DISABLE__SHIFT                                                0x1a</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_MASK__SHIFT                                                   0x1b</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_STAT_AK__SHIFT                                                0x1c</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_TYPE__SHIFT                                                   0x1d</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_MODE__SHIFT                                                   0x1e</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_COUNT_MASK                                                    0x01FFFFFFL</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_ENABLE_MASK                                                   0x02000000L</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_DISABLE_MASK                                                  0x04000000L</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_MASK_MASK                                                     0x08000000L</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_STAT_AK_MASK                                                  0x10000000L</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_TYPE_MASK                                                     0x20000000L</div><div class='add'>+#define PWR_DISP_TIMER2_CONTROL__DISP_TIMER_INT_MODE_MASK                                                     0x40000000L</div><div class='add'>+//PWR_DISP_TIMER2_DEBUG</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_INT_RUNNING__SHIFT                                                  0x0</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_INT_STAT__SHIFT                                                     0x1</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_INT__SHIFT                                                          0x2</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_RUN_VAL__SHIFT                                                      0x7</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_INT_RUNNING_MASK                                                    0x00000001L</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_INT_STAT_MASK                                                       0x00000002L</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_INT_MASK                                                            0x00000004L</div><div class='add'>+#define PWR_DISP_TIMER2_DEBUG__DISP_TIMER_RUN_VAL_MASK                                                        0xFFFFFF80L</div><div class='add'>+//PWR_DISP_TIMER_GLOBAL_CONTROL</div><div class='add'>+#define PWR_DISP_TIMER_GLOBAL_CONTROL__DISP_TIMER_PULSE_WIDTH__SHIFT                                          0x0</div><div class='add'>+#define PWR_DISP_TIMER_GLOBAL_CONTROL__DISP_TIMER_PULSE_EN__SHIFT                                             0xa</div><div class='add'>+#define PWR_DISP_TIMER_GLOBAL_CONTROL__DISP_TIMER_PULSE_WIDTH_MASK                                            0x000003FFL</div><div class='add'>+#define PWR_DISP_TIMER_GLOBAL_CONTROL__DISP_TIMER_PULSE_EN_MASK                                               0x00000400L</div><div class='add'>+//PWR_IH_CONTROL</div><div class='add'>+#define PWR_IH_CONTROL__MAX_CREDIT__SHIFT                                                                     0x0</div><div class='add'>+#define PWR_IH_CONTROL__DISP_TIMER_TRIGGER_MASK__SHIFT                                                        0x5</div><div class='add'>+#define PWR_IH_CONTROL__DISP_TIMER2_TRIGGER_MASK__SHIFT                                                       0x6</div><div class='add'>+#define PWR_IH_CONTROL__PWR_IH_CLK_GATE_EN__SHIFT                                                             0x1f</div><div class='add'>+#define PWR_IH_CONTROL__MAX_CREDIT_MASK                                                                       0x0000001FL</div><div class='add'>+#define PWR_IH_CONTROL__DISP_TIMER_TRIGGER_MASK_MASK                                                          0x00000020L</div><div class='add'>+#define PWR_IH_CONTROL__DISP_TIMER2_TRIGGER_MASK_MASK                                                         0x00000040L</div><div class='add'>+#define PWR_IH_CONTROL__PWR_IH_CLK_GATE_EN_MASK                                                               0x80000000L</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_misc_SmuSmuioDec</div><div class='add'>+//SMUIO_MCM_CONFIG</div><div class='add'>+#define SMUIO_MCM_CONFIG__DIE_ID__SHIFT                                                                       0x0</div><div class='add'>+#define SMUIO_MCM_CONFIG__PKG_TYPE__SHIFT                                                                     0x2</div><div class='add'>+#define SMUIO_MCM_CONFIG__SOCKET_ID__SHIFT                                                                    0x8</div><div class='add'>+#define SMUIO_MCM_CONFIG__PKG_SUBTYPE__SHIFT                                                                  0xc</div><div class='add'>+#define SMUIO_MCM_CONFIG__DIE_CONFIG__SHIFT                                                                   0xd</div><div class='add'>+#define SMUIO_MCM_CONFIG__CONSOLE_K__SHIFT                                                                    0x10</div><div class='add'>+#define SMUIO_MCM_CONFIG__CONSOLE_A__SHIFT                                                                    0x11</div><div class='add'>+#define SMUIO_MCM_CONFIG__DIE_ID_MASK                                                                         0x00000003L</div><div class='add'>+#define SMUIO_MCM_CONFIG__PKG_TYPE_MASK                                                                       0x0000001CL</div><div class='add'>+#define SMUIO_MCM_CONFIG__SOCKET_ID_MASK                                                                      0x00000300L</div><div class='add'>+#define SMUIO_MCM_CONFIG__PKG_SUBTYPE_MASK                                                                    0x00001000L</div><div class='add'>+#define SMUIO_MCM_CONFIG__CONSOLE_K_MASK                                                                      0x00010000L</div><div class='add'>+#define SMUIO_MCM_CONFIG__CONSOLE_A_MASK                                                                      0x00020000L</div><div class='add'>+//IP_DISCOVERY_VERSION</div><div class='add'>+#define IP_DISCOVERY_VERSION__IP_DISCOVERY_VERSION__SHIFT                                                     0x0</div><div class='add'>+#define IP_DISCOVERY_VERSION__IP_DISCOVERY_VERSION_MASK                                                       0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER0</div><div class='add'>+#define SCRATCH_REGISTER0__ScratchPad0__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER0__ScratchPad0_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER1</div><div class='add'>+#define SCRATCH_REGISTER1__ScratchPad1__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER1__ScratchPad1_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER2</div><div class='add'>+#define SCRATCH_REGISTER2__ScratchPad2__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER2__ScratchPad2_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER3</div><div class='add'>+#define SCRATCH_REGISTER3__ScratchPad3__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER3__ScratchPad3_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER4</div><div class='add'>+#define SCRATCH_REGISTER4__ScratchPad4__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER4__ScratchPad4_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER5</div><div class='add'>+#define SCRATCH_REGISTER5__ScratchPad5__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER5__ScratchPad5_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER6</div><div class='add'>+#define SCRATCH_REGISTER6__ScratchPad6__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER6__ScratchPad6_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//SCRATCH_REGISTER7</div><div class='add'>+#define SCRATCH_REGISTER7__ScratchPad7__SHIFT                                                                 0x0</div><div class='add'>+#define SCRATCH_REGISTER7__ScratchPad7_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_i2c_SmuSmuioDec</div><div class='add'>+//CKSVII2C_IC_CON</div><div class='add'>+#define CKSVII2C_IC_CON__IC_MASTER_MODE__SHIFT                                                                0x0</div><div class='add'>+#define CKSVII2C_IC_CON__IC_MAX_SPEED_MODE__SHIFT                                                             0x1</div><div class='add'>+#define CKSVII2C_IC_CON__IC_10BITADDR_SLAVE__SHIFT                                                            0x3</div><div class='add'>+#define CKSVII2C_IC_CON__IC_10BITADDR_MASTER__SHIFT                                                           0x4</div><div class='add'>+#define CKSVII2C_IC_CON__IC_RESTART_EN__SHIFT                                                                 0x5</div><div class='add'>+#define CKSVII2C_IC_CON__IC_SLAVE_DISABLE__SHIFT                                                              0x6</div><div class='add'>+#define CKSVII2C_IC_CON__STOP_DET_IFADDRESSED__SHIFT                                                          0x7</div><div class='add'>+#define CKSVII2C_IC_CON__TX_EMPTY_CTRL__SHIFT                                                                 0x8</div><div class='add'>+#define CKSVII2C_IC_CON__RX_FIFO_FULL_HLD_CTRL__SHIFT                                                         0x9</div><div class='add'>+#define CKSVII2C_IC_CON__BUS_CLEAR_FEATURE_CTRL__SHIFT                                                        0xb</div><div class='add'>+#define CKSVII2C_IC_CON__IC_MASTER_MODE_MASK                                                                  0x00000001L</div><div class='add'>+#define CKSVII2C_IC_CON__IC_MAX_SPEED_MODE_MASK                                                               0x00000006L</div><div class='add'>+#define CKSVII2C_IC_CON__IC_10BITADDR_SLAVE_MASK                                                              0x00000008L</div><div class='add'>+#define CKSVII2C_IC_CON__IC_10BITADDR_MASTER_MASK                                                             0x00000010L</div><div class='add'>+#define CKSVII2C_IC_CON__IC_RESTART_EN_MASK                                                                   0x00000020L</div><div class='add'>+#define CKSVII2C_IC_CON__IC_SLAVE_DISABLE_MASK                                                                0x00000040L</div><div class='add'>+#define CKSVII2C_IC_CON__STOP_DET_IFADDRESSED_MASK                                                            0x00000080L</div><div class='add'>+#define CKSVII2C_IC_CON__TX_EMPTY_CTRL_MASK                                                                   0x00000100L</div><div class='add'>+#define CKSVII2C_IC_CON__RX_FIFO_FULL_HLD_CTRL_MASK                                                           0x00000200L</div><div class='add'>+//CKSVII2C_IC_TAR</div><div class='add'>+#define CKSVII2C_IC_TAR__IC_TAR__SHIFT                                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_TAR__GC_OR_START__SHIFT                                                                   0xa</div><div class='add'>+#define CKSVII2C_IC_TAR__SPECIAL__SHIFT                                                                       0xb</div><div class='add'>+#define CKSVII2C_IC_TAR__IC_10BITADDR_MASTER__SHIFT                                                           0xc</div><div class='add'>+#define CKSVII2C_IC_TAR__IC_TAR_MASK                                                                          0x000003FFL</div><div class='add'>+#define CKSVII2C_IC_TAR__GC_OR_START_MASK                                                                     0x00000400L</div><div class='add'>+#define CKSVII2C_IC_TAR__SPECIAL_MASK                                                                         0x00000800L</div><div class='add'>+#define CKSVII2C_IC_TAR__IC_10BITADDR_MASTER_MASK                                                             0x00001000L</div><div class='add'>+//CKSVII2C_IC_SAR</div><div class='add'>+#define CKSVII2C_IC_SAR__IC_SAR__SHIFT                                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_SAR__IC_SAR_MASK                                                                          0x000003FFL</div><div class='add'>+//CKSVII2C_IC_HS_MADDR</div><div class='add'>+#define CKSVII2C_IC_HS_MADDR__IC_HS_MADDR__SHIFT                                                              0x0</div><div class='add'>+#define CKSVII2C_IC_HS_MADDR__IC_HS_MADDR_MASK                                                                0x00000007L</div><div class='add'>+//CKSVII2C_IC_DATA_CMD</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__DAT__SHIFT                                                                      0x0</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__CMD__SHIFT                                                                      0x8</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__STOP__SHIFT                                                                     0x9</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__RESTART__SHIFT                                                                  0xa</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__FIRST_DATA_BYTE__SHIFT                                                          0xb</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__DAT_MASK                                                                        0x000000FFL</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__CMD_MASK                                                                        0x00000100L</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__STOP_MASK                                                                       0x00000200L</div><div class='add'>+#define CKSVII2C_IC_DATA_CMD__RESTART_MASK                                                                    0x00000400L</div><div class='add'>+//CKSVII2C_IC_SS_SCL_HCNT</div><div class='add'>+#define CKSVII2C_IC_SS_SCL_HCNT__IC_SS_SCL_HCNT__SHIFT                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_SS_SCL_HCNT__IC_SS_SCL_HCNT_MASK                                                          0x0000FFFFL</div><div class='add'>+//CKSVII2C_IC_SS_SCL_LCNT</div><div class='add'>+#define CKSVII2C_IC_SS_SCL_LCNT__IC_SS_SCL_LCNT__SHIFT                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_SS_SCL_LCNT__IC_SS_SCL_LCNT_MASK                                                          0x0000FFFFL</div><div class='add'>+//CKSVII2C_IC_FS_SCL_HCNT</div><div class='add'>+#define CKSVII2C_IC_FS_SCL_HCNT__IC_FS_SCL_HCNT__SHIFT                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_FS_SCL_HCNT__IC_FS_SCL_HCNT_MASK                                                          0x0000FFFFL</div><div class='add'>+//CKSVII2C_IC_FS_SCL_LCNT</div><div class='add'>+#define CKSVII2C_IC_FS_SCL_LCNT__IC_FS_SCL_LCNT__SHIFT                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_FS_SCL_LCNT__IC_FS_SCL_LCNT_MASK                                                          0x0000FFFFL</div><div class='add'>+//CKSVII2C_IC_HS_SCL_HCNT</div><div class='add'>+#define CKSVII2C_IC_HS_SCL_HCNT__IC_HS_SCL_HCNT__SHIFT                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_HS_SCL_HCNT__IC_HS_SCL_HCNT_MASK                                                          0x0000FFFFL</div><div class='add'>+//CKSVII2C_IC_HS_SCL_LCNT</div><div class='add'>+#define CKSVII2C_IC_HS_SCL_LCNT__IC_HS_SCL_LCNT__SHIFT                                                        0x0</div><div class='add'>+#define CKSVII2C_IC_HS_SCL_LCNT__IC_HS_SCL_LCNT_MASK                                                          0x0000FFFFL</div><div class='add'>+//CKSVII2C_IC_INTR_STAT</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_UNDER__SHIFT                                                              0x0</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_OVER__SHIFT                                                               0x1</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_FULL__SHIFT                                                               0x2</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_TX_OVER__SHIFT                                                               0x3</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_TX_EMPTY__SHIFT                                                              0x4</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RD_REQ__SHIFT                                                                0x5</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_TX_ABRT__SHIFT                                                               0x6</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_DONE__SHIFT                                                               0x7</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_ACTIVITY__SHIFT                                                              0x8</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_STOP_DET__SHIFT                                                              0x9</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_START_DET__SHIFT                                                             0xa</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_GEN_CALL__SHIFT                                                              0xb</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RESTART_DET__SHIFT                                                           0xc</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_MST_ON_HOLD__SHIFT                                                           0xd</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_SCL_STUCK_AT_LOW__SHIFT                                                      0xe</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_UNDER_MASK                                                                0x00000001L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_OVER_MASK                                                                 0x00000002L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_FULL_MASK                                                                 0x00000004L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_TX_OVER_MASK                                                                 0x00000008L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_TX_EMPTY_MASK                                                                0x00000010L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RD_REQ_MASK                                                                  0x00000020L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_TX_ABRT_MASK                                                                 0x00000040L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RX_DONE_MASK                                                                 0x00000080L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_ACTIVITY_MASK                                                                0x00000100L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_STOP_DET_MASK                                                                0x00000200L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_START_DET_MASK                                                               0x00000400L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_GEN_CALL_MASK                                                                0x00000800L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_RESTART_DET_MASK                                                             0x00001000L</div><div class='add'>+#define CKSVII2C_IC_INTR_STAT__R_MST_ON_HOLD_MASK                                                             0x00002000L</div><div class='add'>+//CKSVII2C_IC_INTR_MASK</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_UNDER__SHIFT                                                              0x0</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_OVER__SHIFT                                                               0x1</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_FULL__SHIFT                                                               0x2</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_TX_OVER__SHIFT                                                               0x3</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_TX_EMPTY__SHIFT                                                              0x4</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RD_REQ__SHIFT                                                                0x5</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_TX_ABRT__SHIFT                                                               0x6</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_DONE__SHIFT                                                               0x7</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_ACTIVITY__SHIFT                                                              0x8</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_STOP_DET__SHIFT                                                              0x9</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_START_DET__SHIFT                                                             0xa</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_GEN_CALL__SHIFT                                                              0xb</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RESTART_DET__SHIFT                                                           0xc</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_MST_ON_HOLD__SHIFT                                                           0xd</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_SCL_STUCK_AT_LOW__SHIFT                                                      0xe</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_UNDER_MASK                                                                0x00000001L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_OVER_MASK                                                                 0x00000002L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_FULL_MASK                                                                 0x00000004L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_TX_OVER_MASK                                                                 0x00000008L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_TX_EMPTY_MASK                                                                0x00000010L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RD_REQ_MASK                                                                  0x00000020L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_TX_ABRT_MASK                                                                 0x00000040L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RX_DONE_MASK                                                                 0x00000080L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_ACTIVITY_MASK                                                                0x00000100L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_STOP_DET_MASK                                                                0x00000200L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_START_DET_MASK                                                               0x00000400L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_GEN_CALL_MASK                                                                0x00000800L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_RESTART_DET_MASK                                                             0x00001000L</div><div class='add'>+#define CKSVII2C_IC_INTR_MASK__M_MST_ON_HOLD_MASK                                                             0x00002000L</div><div class='add'>+//CKSVII2C_IC_RAW_INTR_STAT</div><div class='add'>+//CKSVII2C_IC_RX_TL</div><div class='add'>+#define CKSVII2C_IC_RX_TL__RX_TL__SHIFT                                                                       0x0</div><div class='add'>+//CKSVII2C_IC_TX_TL</div><div class='add'>+#define CKSVII2C_IC_TX_TL__TX_TL__SHIFT                                                                       0x0</div><div class='add'>+//CKSVII2C_IC_CLR_INTR</div><div class='add'>+//CKSVII2C_IC_CLR_RX_UNDER</div><div class='add'>+//CKSVII2C_IC_CLR_RX_OVER</div><div class='add'>+//CKSVII2C_IC_CLR_TX_OVER</div><div class='add'>+//CKSVII2C_IC_CLR_RD_REQ</div><div class='add'>+//CKSVII2C_IC_CLR_TX_ABRT</div><div class='add'>+//CKSVII2C_IC_CLR_RX_DONE</div><div class='add'>+//CKSVII2C_IC_CLR_ACTIVITY</div><div class='add'>+//CKSVII2C_IC_CLR_STOP_DET</div><div class='add'>+//CKSVII2C_IC_CLR_START_DET</div><div class='add'>+//CKSVII2C_IC_CLR_GEN_CALL</div><div class='add'>+//CKSVII2C_IC_ENABLE</div><div class='add'>+#define CKSVII2C_IC_ENABLE__ENABLE__SHIFT                                                                     0x0</div><div class='add'>+#define CKSVII2C_IC_ENABLE__ABORT__SHIFT                                                                      0x1</div><div class='add'>+#define CKSVII2C_IC_ENABLE__TX_CMD_BLOCK__SHIFT                                                               0x2</div><div class='add'>+#define CKSVII2C_IC_ENABLE__SDA_STUCK_RECOVERY_ENABLE__SHIFT                                                  0x3</div><div class='add'>+#define CKSVII2C_IC_ENABLE__ENABLE_MASK                                                                       0x00000001L</div><div class='add'>+#define CKSVII2C_IC_ENABLE__ABORT_MASK                                                                        0x00000002L</div><div class='add'>+//CKSVII2C_IC_STATUS</div><div class='add'>+#define CKSVII2C_IC_STATUS__ACTIVITY__SHIFT                                                                   0x0</div><div class='add'>+#define CKSVII2C_IC_STATUS__TFNF__SHIFT                                                                       0x1</div><div class='add'>+#define CKSVII2C_IC_STATUS__TFE__SHIFT                                                                        0x2</div><div class='add'>+#define CKSVII2C_IC_STATUS__RFNE__SHIFT                                                                       0x3</div><div class='add'>+#define CKSVII2C_IC_STATUS__RFF__SHIFT                                                                        0x4</div><div class='add'>+#define CKSVII2C_IC_STATUS__MST_ACTIVITY__SHIFT                                                               0x5</div><div class='add'>+#define CKSVII2C_IC_STATUS__SLV_ACTIVITY__SHIFT                                                               0x6</div><div class='add'>+#define CKSVII2C_IC_STATUS__MST_HOLD_TX_FIFO_EMPTY__SHIFT                                                     0x7</div><div class='add'>+#define CKSVII2C_IC_STATUS__MST_HOLD_RX_FIFO_FULL__SHIFT                                                      0x8</div><div class='add'>+#define CKSVII2C_IC_STATUS__SLV_HOLD_TX_FIFO_EMPTY__SHIFT                                                     0x9</div><div class='add'>+#define CKSVII2C_IC_STATUS__SLV_HOLD_RX_FIFO_FULL__SHIFT                                                      0xa</div><div class='add'>+#define CKSVII2C_IC_STATUS__SDA_STUCK_NOT_RECOVERED__SHIFT                                                    0xb</div><div class='add'>+#define CKSVII2C_IC_STATUS__ACTIVITY_MASK                                                                     0x00000001L</div><div class='add'>+#define CKSVII2C_IC_STATUS__TFNF_MASK                                                                         0x00000002L</div><div class='add'>+#define CKSVII2C_IC_STATUS__TFE_MASK                                                                          0x00000004L</div><div class='add'>+#define CKSVII2C_IC_STATUS__RFNE_MASK                                                                         0x00000008L</div><div class='add'>+#define CKSVII2C_IC_STATUS__RFF_MASK                                                                          0x00000010L</div><div class='add'>+#define CKSVII2C_IC_STATUS__MST_ACTIVITY_MASK                                                                 0x00000020L</div><div class='add'>+#define CKSVII2C_IC_STATUS__SLV_ACTIVITY_MASK                                                                 0x00000040L</div><div class='add'>+//CKSVII2C_IC_TXFLR</div><div class='add'>+#define CKSVII2C_IC_TXFLR__TXFLR__SHIFT                                                                       0x0</div><div class='add'>+//CKSVII2C_IC_RXFLR</div><div class='add'>+#define CKSVII2C_IC_RXFLR__RXFLR__SHIFT                                                                       0x0</div><div class='add'>+//CKSVII2C_IC_SDA_HOLD</div><div class='add'>+#define CKSVII2C_IC_SDA_HOLD__IC_SDA_TX_HOLD__SHIFT                                                           0x0</div><div class='add'>+#define CKSVII2C_IC_SDA_HOLD__IC_SDA_RX_HOLD__SHIFT                                                           0x10</div><div class='add'>+//CKSVII2C_IC_TX_ABRT_SOURCE</div><div class='add'>+//CKSVII2C_IC_SLV_DATA_NACK_ONLY</div><div class='add'>+//CKSVII2C_IC_DMA_CR</div><div class='add'>+//CKSVII2C_IC_DMA_TDLR</div><div class='add'>+//CKSVII2C_IC_DMA_RDLR</div><div class='add'>+//CKSVII2C_IC_SDA_SETUP</div><div class='add'>+#define CKSVII2C_IC_SDA_SETUP__SDA_SETUP__SHIFT                                                               0x0</div><div class='add'>+#define CKSVII2C_IC_SDA_SETUP__SDA_SETUP_MASK                                                                 0x000000FFL</div><div class='add'>+//CKSVII2C_IC_ACK_GENERAL_CALL</div><div class='add'>+#define CKSVII2C_IC_ACK_GENERAL_CALL__ACK_GENERAL_CALL__SHIFT                                                 0x0</div><div class='add'>+#define CKSVII2C_IC_ACK_GENERAL_CALL__ACK_GENERAL_CALL_MASK                                                   0x00000001L</div><div class='add'>+//CKSVII2C_IC_ENABLE_STATUS</div><div class='add'>+#define CKSVII2C_IC_ENABLE_STATUS__IC_EN__SHIFT                                                               0x0</div><div class='add'>+#define CKSVII2C_IC_ENABLE_STATUS__SLV_DISABLED_WHILE_BUSY__SHIFT                                             0x1</div><div class='add'>+#define CKSVII2C_IC_ENABLE_STATUS__SLV_RX_DATA_LOST__SHIFT                                                    0x2</div><div class='add'>+#define CKSVII2C_IC_ENABLE_STATUS__IC_EN_MASK                                                                 0x00000001L</div><div class='add'>+//CKSVII2C_IC_FS_SPKLEN</div><div class='add'>+#define CKSVII2C_IC_FS_SPKLEN__FS_SPKLEN__SHIFT                                                               0x0</div><div class='add'>+#define CKSVII2C_IC_FS_SPKLEN__FS_SPKLEN_MASK                                                                 0x000000FFL</div><div class='add'>+//CKSVII2C_IC_HS_SPKLEN</div><div class='add'>+#define CKSVII2C_IC_HS_SPKLEN__HS_SPKLEN__SHIFT                                                               0x0</div><div class='add'>+#define CKSVII2C_IC_HS_SPKLEN__HS_SPKLEN_MASK                                                                 0x000000FFL</div><div class='add'>+//CKSVII2C_IC_CLR_RESTART_DET</div><div class='add'>+//CKSVII2C_IC_COMP_PARAM_1</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__APB_DATA_WIDTH__SHIFT                                                       0x0</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__MAX_SPEED_MODE__SHIFT                                                       0x2</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__HC_COUNT_VALUES__SHIFT                                                      0x4</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__INTR_IO__SHIFT                                                              0x5</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__HAS_DMA__SHIFT                                                              0x6</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__ADD_ENCODED_PARAMS__SHIFT                                                   0x7</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__RX_BUFFER_DEPTH__SHIFT                                                      0x8</div><div class='add'>+#define CKSVII2C_IC_COMP_PARAM_1__TX_BUFFER_DEPTH__SHIFT                                                      0x10</div><div class='add'>+//CKSVII2C_IC_COMP_VERSION</div><div class='add'>+#define CKSVII2C_IC_COMP_VERSION__COMP_VERSION__SHIFT                                                         0x0</div><div class='add'>+#define CKSVII2C_IC_COMP_VERSION__COMP_VERSION_MASK                                                           0xFFFFFFFFL</div><div class='add'>+//CKSVII2C_IC_COMP_TYPE</div><div class='add'>+#define CKSVII2C_IC_COMP_TYPE__COMP_TYPE__SHIFT                                                               0x0</div><div class='add'>+#define CKSVII2C_IC_COMP_TYPE__COMP_TYPE_MASK                                                                 0xFFFFFFFFL</div><div class='add'>+//CKSVII2C1_IC_CON</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_MASTER_MODE__SHIFT                                                              0x0</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_MAX_SPEED_MODE__SHIFT                                                           0x1</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_10BITADDR_SLAVE__SHIFT                                                          0x3</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_10BITADDR_MASTER__SHIFT                                                         0x4</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_RESTART_EN__SHIFT                                                               0x5</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_SLAVE_DISABLE__SHIFT                                                            0x6</div><div class='add'>+#define CKSVII2C1_IC_CON__STOP1_DET_IFADDRESSED__SHIFT                                                        0x7</div><div class='add'>+#define CKSVII2C1_IC_CON__TX1_EMPTY_CTRL__SHIFT                                                               0x8</div><div class='add'>+#define CKSVII2C1_IC_CON__RX1_FIFO_FULL_HLD_CTRL__SHIFT                                                       0x9</div><div class='add'>+#define CKSVII2C1_IC_CON__BUS_CLEAR_FEATURE_CTRL1__SHIFT                                                      0xb</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_MASTER_MODE_MASK                                                                0x00000001L</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_MAX_SPEED_MODE_MASK                                                             0x00000006L</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_10BITADDR_SLAVE_MASK                                                            0x00000008L</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_10BITADDR_MASTER_MASK                                                           0x00000010L</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_RESTART_EN_MASK                                                                 0x00000020L</div><div class='add'>+#define CKSVII2C1_IC_CON__IC1_SLAVE_DISABLE_MASK                                                              0x00000040L</div><div class='add'>+#define CKSVII2C1_IC_CON__STOP1_DET_IFADDRESSED_MASK                                                          0x00000080L</div><div class='add'>+#define CKSVII2C1_IC_CON__TX1_EMPTY_CTRL_MASK                                                                 0x00000100L</div><div class='add'>+#define CKSVII2C1_IC_CON__RX1_FIFO_FULL_HLD_CTRL_MASK                                                         0x00000200L</div><div class='add'>+//CKSVII2C1_IC_TAR</div><div class='add'>+#define CKSVII2C1_IC_TAR__IC1_TAR__SHIFT                                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_TAR__GC1_OR_START__SHIFT                                                                 0xa</div><div class='add'>+#define CKSVII2C1_IC_TAR__SPECIAL1__SHIFT                                                                     0xb</div><div class='add'>+#define CKSVII2C1_IC_TAR__IC1_10BITADDR_MASTER__SHIFT                                                         0xc</div><div class='add'>+#define CKSVII2C1_IC_TAR__IC1_TAR_MASK                                                                        0x000003FFL</div><div class='add'>+#define CKSVII2C1_IC_TAR__GC1_OR_START_MASK                                                                   0x00000400L</div><div class='add'>+#define CKSVII2C1_IC_TAR__SPECIAL1_MASK                                                                       0x00000800L</div><div class='add'>+#define CKSVII2C1_IC_TAR__IC1_10BITADDR_MASTER_MASK                                                           0x00001000L</div><div class='add'>+//CKSVII2C1_IC_SAR</div><div class='add'>+#define CKSVII2C1_IC_SAR__IC1_SAR__SHIFT                                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_SAR__IC1_SAR_MASK                                                                        0x000003FFL</div><div class='add'>+//CKSVII2C1_IC_HS_MADDR</div><div class='add'>+#define CKSVII2C1_IC_HS_MADDR__IC1_HS_MADDR__SHIFT                                                            0x0</div><div class='add'>+#define CKSVII2C1_IC_HS_MADDR__IC1_HS_MADDR_MASK                                                              0x00000007L</div><div class='add'>+//CKSVII2C1_IC_DATA_CMD</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__DAT1__SHIFT                                                                    0x0</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__CMD1__SHIFT                                                                    0x8</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__STOP1__SHIFT                                                                   0x9</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__RESTART1__SHIFT                                                                0xa</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__FIRST1_DATA_BYTE__SHIFT                                                        0xb</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__DAT1_MASK                                                                      0x000000FFL</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__CMD1_MASK                                                                      0x00000100L</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__STOP1_MASK                                                                     0x00000200L</div><div class='add'>+#define CKSVII2C1_IC_DATA_CMD__RESTART1_MASK                                                                  0x00000400L</div><div class='add'>+//CKSVII2C1_IC_SS_SCL_HCNT</div><div class='add'>+#define CKSVII2C1_IC_SS_SCL_HCNT__IC1_SS_SCL_HCNT__SHIFT                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_SS_SCL_HCNT__IC1_SS_SCL_HCNT_MASK                                                        0x0000FFFFL</div><div class='add'>+//CKSVII2C1_IC_SS_SCL_LCNT</div><div class='add'>+#define CKSVII2C1_IC_SS_SCL_LCNT__IC1_SS_SCL_LCNT__SHIFT                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_SS_SCL_LCNT__IC1_SS_SCL_LCNT_MASK                                                        0x0000FFFFL</div><div class='add'>+//CKSVII2C1_IC_FS_SCL_HCNT</div><div class='add'>+#define CKSVII2C1_IC_FS_SCL_HCNT__IC1_FS_SCL_HCNT__SHIFT                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_FS_SCL_HCNT__IC1_FS_SCL_HCNT_MASK                                                        0x0000FFFFL</div><div class='add'>+//CKSVII2C1_IC_FS_SCL_LCNT</div><div class='add'>+#define CKSVII2C1_IC_FS_SCL_LCNT__IC1_FS_SCL_LCNT__SHIFT                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_FS_SCL_LCNT__IC1_FS_SCL_LCNT_MASK                                                        0x0000FFFFL</div><div class='add'>+//CKSVII2C1_IC_HS_SCL_HCNT</div><div class='add'>+#define CKSVII2C1_IC_HS_SCL_HCNT__IC1_HS_SCL_HCNT__SHIFT                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_HS_SCL_HCNT__IC1_HS_SCL_HCNT_MASK                                                        0x0000FFFFL</div><div class='add'>+//CKSVII2C1_IC_HS_SCL_LCNT</div><div class='add'>+#define CKSVII2C1_IC_HS_SCL_LCNT__IC1_HS_SCL_LCNT__SHIFT                                                      0x0</div><div class='add'>+#define CKSVII2C1_IC_HS_SCL_LCNT__IC1_HS_SCL_LCNT_MASK                                                        0x0000FFFFL</div><div class='add'>+//CKSVII2C1_IC_INTR_STAT</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_UNDER__SHIFT                                                            0x0</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_OVER__SHIFT                                                             0x1</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_FULL__SHIFT                                                             0x2</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_TX_OVER__SHIFT                                                             0x3</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_TX_EMPTY__SHIFT                                                            0x4</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RD_REQ__SHIFT                                                              0x5</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_TX_ABRT__SHIFT                                                             0x6</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_DONE__SHIFT                                                             0x7</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_ACTIVITY__SHIFT                                                            0x8</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_STOP_DET__SHIFT                                                            0x9</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_START_DET__SHIFT                                                           0xa</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_GEN_CALL__SHIFT                                                            0xb</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RESTART_DET__SHIFT                                                         0xc</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_MST_ON_HOLD__SHIFT                                                         0xd</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_SCL_STUCK_AT_LOW__SHIFT                                                    0xe</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_UNDER_MASK                                                              0x00000001L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_OVER_MASK                                                               0x00000002L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_FULL_MASK                                                               0x00000004L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_TX_OVER_MASK                                                               0x00000008L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_TX_EMPTY_MASK                                                              0x00000010L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RD_REQ_MASK                                                                0x00000020L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_TX_ABRT_MASK                                                               0x00000040L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RX_DONE_MASK                                                               0x00000080L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_ACTIVITY_MASK                                                              0x00000100L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_STOP_DET_MASK                                                              0x00000200L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_START_DET_MASK                                                             0x00000400L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_GEN_CALL_MASK                                                              0x00000800L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_RESTART_DET_MASK                                                           0x00001000L</div><div class='add'>+#define CKSVII2C1_IC_INTR_STAT__R1_MST_ON_HOLD_MASK                                                           0x00002000L</div><div class='add'>+//CKSVII2C1_IC_INTR_MASK</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_UNDER__SHIFT                                                            0x0</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_OVER__SHIFT                                                             0x1</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_FULL__SHIFT                                                             0x2</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_TX_OVER__SHIFT                                                             0x3</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_TX_EMPTY__SHIFT                                                            0x4</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RD_REQ__SHIFT                                                              0x5</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_TX_ABRT__SHIFT                                                             0x6</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_DONE__SHIFT                                                             0x7</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_ACTIVITY__SHIFT                                                            0x8</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_STOP_DET__SHIFT                                                            0x9</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_START_DET__SHIFT                                                           0xa</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_GEN_CALL__SHIFT                                                            0xb</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RESTART_DET__SHIFT                                                         0xc</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_MST_ON_HOLD__SHIFT                                                         0xd</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_SCL_STUCK_AT_LOW__SHIFT                                                    0xe</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_UNDER_MASK                                                              0x00000001L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_OVER_MASK                                                               0x00000002L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_FULL_MASK                                                               0x00000004L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_TX_OVER_MASK                                                               0x00000008L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_TX_EMPTY_MASK                                                              0x00000010L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RD_REQ_MASK                                                                0x00000020L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_TX_ABRT_MASK                                                               0x00000040L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RX_DONE_MASK                                                               0x00000080L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_ACTIVITY_MASK                                                              0x00000100L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_STOP_DET_MASK                                                              0x00000200L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_START_DET_MASK                                                             0x00000400L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_GEN_CALL_MASK                                                              0x00000800L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_RESTART_DET_MASK                                                           0x00001000L</div><div class='add'>+#define CKSVII2C1_IC_INTR_MASK__M1_MST_ON_HOLD_MASK                                                           0x00002000L</div><div class='add'>+//CKSVII2C1_IC_RAW_INTR_STAT</div><div class='add'>+//CKSVII2C1_IC_RX_TL</div><div class='add'>+#define CKSVII2C1_IC_RX_TL__RX1_TL__SHIFT                                                                     0x0</div><div class='add'>+//CKSVII2C1_IC_TX_TL</div><div class='add'>+#define CKSVII2C1_IC_TX_TL__TX1_TL__SHIFT                                                                     0x0</div><div class='add'>+//CKSVII2C1_IC_CLR_INTR</div><div class='add'>+//CKSVII2C1_IC_CLR_RX_UNDER</div><div class='add'>+//CKSVII2C1_IC_CLR_RX_OVER</div><div class='add'>+//CKSVII2C1_IC_CLR_TX_OVER</div><div class='add'>+//CKSVII2C1_IC_CLR_RD_REQ</div><div class='add'>+//CKSVII2C1_IC_CLR_TX_ABRT</div><div class='add'>+//CKSVII2C1_IC_CLR_RX_DONE</div><div class='add'>+//CKSVII2C1_IC_CLR_ACTIVITY</div><div class='add'>+//CKSVII2C1_IC_CLR_STOP_DET</div><div class='add'>+//CKSVII2C1_IC_CLR_START_DET</div><div class='add'>+//CKSVII2C1_IC_CLR_GEN_CALL</div><div class='add'>+//CKSVII2C1_IC_ENABLE</div><div class='add'>+#define CKSVII2C1_IC_ENABLE__ENABLE1__SHIFT                                                                   0x0</div><div class='add'>+#define CKSVII2C1_IC_ENABLE__ABORT1__SHIFT                                                                    0x1</div><div class='add'>+#define CKSVII2C1_IC_ENABLE__TX1_CMD_BLOCK__SHIFT                                                             0x2</div><div class='add'>+#define CKSVII2C1_IC_ENABLE__SDA1_STUCK_RECOVERY_ENABLE__SHIFT                                                0x3</div><div class='add'>+#define CKSVII2C1_IC_ENABLE__ENABLE1_MASK                                                                     0x00000001L</div><div class='add'>+#define CKSVII2C1_IC_ENABLE__ABORT1_MASK                                                                      0x00000002L</div><div class='add'>+//CKSVII2C1_IC_STATUS</div><div class='add'>+#define CKSVII2C1_IC_STATUS__ACTIVITY1__SHIFT                                                                 0x0</div><div class='add'>+#define CKSVII2C1_IC_STATUS__TFNF1__SHIFT                                                                     0x1</div><div class='add'>+#define CKSVII2C1_IC_STATUS__TFE1__SHIFT                                                                      0x2</div><div class='add'>+#define CKSVII2C1_IC_STATUS__RFNE1__SHIFT                                                                     0x3</div><div class='add'>+#define CKSVII2C1_IC_STATUS__RFF1__SHIFT                                                                      0x4</div><div class='add'>+#define CKSVII2C1_IC_STATUS__MST1_ACTIVITY__SHIFT                                                             0x5</div><div class='add'>+#define CKSVII2C1_IC_STATUS__SLV1_ACTIVITY__SHIFT                                                             0x6</div><div class='add'>+#define CKSVII2C1_IC_STATUS__MST1_HOLD_TX_FIFO_EMPTY__SHIFT                                                   0x7</div><div class='add'>+#define CKSVII2C1_IC_STATUS__MST1_HOLD_RX_FIFO_FULL__SHIFT                                                    0x8</div><div class='add'>+#define CKSVII2C1_IC_STATUS__SLV1_HOLD_TX_FIFO_EMPTY__SHIFT                                                   0x9</div><div class='add'>+#define CKSVII2C1_IC_STATUS__SLV1_HOLD_RX_FIFO_FULL__SHIFT                                                    0xa</div><div class='add'>+#define CKSVII2C1_IC_STATUS__SDA1_STUCK_NOT_RECOVERED__SHIFT                                                  0xb</div><div class='add'>+#define CKSVII2C1_IC_STATUS__ACTIVITY1_MASK                                                                   0x00000001L</div><div class='add'>+#define CKSVII2C1_IC_STATUS__TFNF1_MASK                                                                       0x00000002L</div><div class='add'>+#define CKSVII2C1_IC_STATUS__TFE1_MASK                                                                        0x00000004L</div><div class='add'>+#define CKSVII2C1_IC_STATUS__RFNE1_MASK                                                                       0x00000008L</div><div class='add'>+#define CKSVII2C1_IC_STATUS__RFF1_MASK                                                                        0x00000010L</div><div class='add'>+#define CKSVII2C1_IC_STATUS__MST1_ACTIVITY_MASK                                                               0x00000020L</div><div class='add'>+#define CKSVII2C1_IC_STATUS__SLV1_ACTIVITY_MASK                                                               0x00000040L</div><div class='add'>+//CKSVII2C1_IC_TXFLR</div><div class='add'>+#define CKSVII2C1_IC_TXFLR__TXFLR1__SHIFT                                                                     0x0</div><div class='add'>+//CKSVII2C1_IC_RXFLR</div><div class='add'>+#define CKSVII2C1_IC_RXFLR__RXFLR1__SHIFT                                                                     0x0</div><div class='add'>+//CKSVII2C1_IC_SDA_HOLD</div><div class='add'>+#define CKSVII2C1_IC_SDA_HOLD__IC1_SDA_TX_HOLD__SHIFT                                                         0x0</div><div class='add'>+#define CKSVII2C1_IC_SDA_HOLD__IC1_SDA_RX_HOLD__SHIFT                                                         0x10</div><div class='add'>+//CKSVII2C1_IC_TX_ABRT_SOURCE</div><div class='add'>+//CKSVII2C1_IC_SLV_DATA_NACK_ONLY</div><div class='add'>+//CKSVII2C1_IC_DMA_CR</div><div class='add'>+//CKSVII2C1_IC_DMA_TDLR</div><div class='add'>+//CKSVII2C1_IC_DMA_RDLR</div><div class='add'>+//CKSVII2C1_IC_SDA_SETUP</div><div class='add'>+#define CKSVII2C1_IC_SDA_SETUP__SDA1_SETUP__SHIFT                                                             0x0</div><div class='add'>+#define CKSVII2C1_IC_SDA_SETUP__SDA1_SETUP_MASK                                                               0x000000FFL</div><div class='add'>+//CKSVII2C1_IC_ACK_GENERAL_CALL</div><div class='add'>+#define CKSVII2C1_IC_ACK_GENERAL_CALL__ACK1_GENERAL_CALL__SHIFT                                               0x0</div><div class='add'>+#define CKSVII2C1_IC_ACK_GENERAL_CALL__ACK1_GENERAL_CALL_MASK                                                 0x00000001L</div><div class='add'>+//CKSVII2C1_IC_ENABLE_STATUS</div><div class='add'>+#define CKSVII2C1_IC_ENABLE_STATUS__IC1_EN__SHIFT                                                             0x0</div><div class='add'>+#define CKSVII2C1_IC_ENABLE_STATUS__SLV1_DISABLED_WHILE_BUSY__SHIFT                                           0x1</div><div class='add'>+#define CKSVII2C1_IC_ENABLE_STATUS__SLV1_RX_DATA_LOST__SHIFT                                                  0x2</div><div class='add'>+#define CKSVII2C1_IC_ENABLE_STATUS__IC1_EN_MASK                                                               0x00000001L</div><div class='add'>+//CKSVII2C1_IC_FS_SPKLEN</div><div class='add'>+#define CKSVII2C1_IC_FS_SPKLEN__FS1_SPKLEN__SHIFT                                                             0x0</div><div class='add'>+//CKSVII2C1_IC_HS_SPKLEN</div><div class='add'>+#define CKSVII2C1_IC_HS_SPKLEN__HS1_SPKLEN__SHIFT                                                             0x0</div><div class='add'>+//CKSVII2C1_IC_CLR_RESTART_DET</div><div class='add'>+//CKSVII2C1_IC_COMP_PARAM_1</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__APB1_DATA_WIDTH__SHIFT                                                     0x0</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__MAX1_SPEED_MODE__SHIFT                                                     0x2</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__HC1_COUNT_VALUES__SHIFT                                                    0x4</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__INTR1_IO__SHIFT                                                            0x5</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__HAS1_DMA__SHIFT                                                            0x6</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__ADD1_ENCODED_PARAMS__SHIFT                                                 0x7</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__RX1_BUFFER_DEPTH__SHIFT                                                    0x8</div><div class='add'>+#define CKSVII2C1_IC_COMP_PARAM_1__TX1_BUFFER_DEPTH__SHIFT                                                    0x10</div><div class='add'>+//CKSVII2C1_IC_COMP_VERSION</div><div class='add'>+#define CKSVII2C1_IC_COMP_VERSION__COMP1_VERSION__SHIFT                                                       0x0</div><div class='add'>+//CKSVII2C1_IC_COMP_TYPE</div><div class='add'>+#define CKSVII2C1_IC_COMP_TYPE__COMP1_TYPE__SHIFT                                                             0x0</div><div class='add'>+//SMUIO_PWRMGT</div><div class='add'>+#define SMUIO_PWRMGT__i2c_clk_gate_en__SHIFT                                                                  0x0</div><div class='add'>+#define SMUIO_PWRMGT__i2c1_clk_gate_en__SHIFT                                                                 0x4</div><div class='add'>+#define SMUIO_PWRMGT__i2c_clk_gate_en_MASK                                                                    0x00000001L</div><div class='add'>+#define SMUIO_PWRMGT__i2c1_clk_gate_en_MASK                                                                   0x00000010L</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_rom_SmuSmuioDec</div><div class='add'>+//ROM_CNTL</div><div class='add'>+#define ROM_CNTL__CLOCK_GATING_EN__SHIFT                                                                      0x0</div><div class='add'>+#define ROM_CNTL__READ_MODE__SHIFT                                                                            0x1</div><div class='add'>+#define ROM_CNTL__READ_MODE_OVERRIDE__SHIFT                                                                   0x3</div><div class='add'>+#define ROM_CNTL__SPI_TIMING_RELAX_SCK__SHIFT                                                                 0x4</div><div class='add'>+#define ROM_CNTL__SPI_TIMING_RELAX_SCK_OVERRIDE__SHIFT                                                        0x5</div><div class='add'>+#define ROM_CNTL__FOUR_BYTE_ADDRESS_MODE__SHIFT                                                               0x6</div><div class='add'>+#define ROM_CNTL__DUMMY_CYCLE_NUM__SHIFT                                                                      0x8</div><div class='add'>+#define ROM_CNTL__SPI_TIMING_RELAX__SHIFT                                                                     0x13</div><div class='add'>+#define ROM_CNTL__SPI_TIMING_RELAX_OVERRIDE__SHIFT                                                            0x14</div><div class='add'>+#define ROM_CNTL__SPI_FAST_MODE__SHIFT                                                                        0x15</div><div class='add'>+#define ROM_CNTL__SPI_FAST_MODE_OVERRIDE__SHIFT                                                               0x16</div><div class='add'>+#define ROM_CNTL__SCK_PRESCALE_REFCLK__SHIFT                                                                  0x17</div><div class='add'>+#define ROM_CNTL__SCK_PRESCALE_REFCLK_OVERRIDE__SHIFT                                                         0x1c</div><div class='add'>+#define ROM_CNTL__ROM_INDEX_ADDRESS_AUTO_INCREASE__SHIFT                                                      0x1d</div><div class='add'>+#define ROM_CNTL__PAD_SAMPLE_MODE__SHIFT                                                                      0x1e</div><div class='add'>+#define ROM_CNTL__PAD_SAMPLE_MODE_OVERRIDE__SHIFT                                                             0x1f</div><div class='add'>+#define ROM_CNTL__CLOCK_GATING_EN_MASK                                                                        0x00000001L</div><div class='add'>+#define ROM_CNTL__SPI_TIMING_RELAX_MASK                                                                       0x00080000L</div><div class='add'>+#define ROM_CNTL__SPI_TIMING_RELAX_OVERRIDE_MASK                                                              0x00100000L</div><div class='add'>+#define ROM_CNTL__SPI_FAST_MODE_MASK                                                                          0x00200000L</div><div class='add'>+#define ROM_CNTL__SPI_FAST_MODE_OVERRIDE_MASK                                                                 0x00400000L</div><div class='add'>+#define ROM_CNTL__SCK_PRESCALE_REFCLK_MASK                                                                    0x0F800000L</div><div class='add'>+#define ROM_CNTL__SCK_PRESCALE_REFCLK_OVERRIDE_MASK                                                           0x10000000L</div><div class='add'>+//PAGE_MIRROR_CNTL</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_BASE_ADDR__SHIFT                                                        0x0</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_ENABLE__SHIFT                                                           0x19</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_USAGE__SHIFT                                                            0x1a</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_INVALIDATE__SHIFT                                                       0x1c</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_BASE_ADDR_MASK                                                          0x01FFFFFFL</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_ENABLE_MASK                                                             0x02000000L</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_USAGE_MASK                                                              0x0C000000L</div><div class='add'>+#define PAGE_MIRROR_CNTL__PAGE_MIRROR_INVALIDATE_MASK                                                         0x10000000L</div><div class='add'>+//ROM_STATUS</div><div class='add'>+#define ROM_STATUS__ROM_BUSY__SHIFT                                                                           0x0</div><div class='add'>+#define ROM_STATUS__ROM_BUSY_MASK                                                                             0x00000001L</div><div class='add'>+//CGTT_ROM_CLK_CTRL0</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__ON_DELAY__SHIFT                                                                   0x0</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS__SHIFT                                                             0x4</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT                                                             0x1e</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT                                                             0x1f</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__ON_DELAY_MASK                                                                     0x0000000FL</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS_MASK                                                               0x00000FF0L</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1_MASK                                                               0x40000000L</div><div class='add'>+#define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0_MASK                                                               0x80000000L</div><div class='add'>+//ROM_INDEX</div><div class='add'>+#define ROM_INDEX__ROM_INDEX__SHIFT                                                                           0x0</div><div class='add'>+#define ROM_INDEX__ROM_INDEX_MASK                                                                             0x01FFFFFFL</div><div class='add'>+//ROM_DATA</div><div class='add'>+#define ROM_DATA__ROM_DATA__SHIFT                                                                             0x0</div><div class='add'>+#define ROM_DATA__ROM_DATA_MASK                                                                               0xFFFFFFFFL</div><div class='add'>+//ROM_START</div><div class='add'>+#define ROM_START__ROM_START__SHIFT                                                                           0x0</div><div class='add'>+#define ROM_START__ROM_START_MASK                                                                             0x01FFFFFFL</div><div class='add'>+//ROM_SW_CNTL</div><div class='add'>+#define ROM_SW_CNTL__DATA_SIZE__SHIFT                                                                         0x0</div><div class='add'>+#define ROM_SW_CNTL__COMMAND_SIZE__SHIFT                                                                      0x10</div><div class='add'>+#define ROM_SW_CNTL__ROM_SW_RETURN_DATA_ENABLE__SHIFT                                                         0x13</div><div class='add'>+#define ROM_SW_CNTL__DATA_SIZE_MASK                                                                           0x0000FFFFL</div><div class='add'>+#define ROM_SW_CNTL__COMMAND_SIZE_MASK                                                                        0x00070000L</div><div class='add'>+#define ROM_SW_CNTL__ROM_SW_RETURN_DATA_ENABLE_MASK                                                           0x00080000L</div><div class='add'>+//ROM_SW_STATUS</div><div class='add'>+#define ROM_SW_STATUS__ROM_SW_DONE__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_STATUS__ROM_SW_DONE_MASK                                                                       0x00000001L</div><div class='add'>+//ROM_SW_COMMAND</div><div class='add'>+#define ROM_SW_COMMAND__ROM_SW_INSTRUCTION__SHIFT                                                             0x0</div><div class='add'>+#define ROM_SW_COMMAND__ROM_SW_ADDRESS__SHIFT                                                                 0x8</div><div class='add'>+#define ROM_SW_COMMAND__ROM_SW_INSTRUCTION_MASK                                                               0x000000FFL</div><div class='add'>+#define ROM_SW_COMMAND__ROM_SW_ADDRESS_MASK                                                                   0xFFFFFF00L</div><div class='add'>+//ROM_SW_DATA_1</div><div class='add'>+#define ROM_SW_DATA_1__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_1__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_2</div><div class='add'>+#define ROM_SW_DATA_2__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_2__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_3</div><div class='add'>+#define ROM_SW_DATA_3__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_3__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_4</div><div class='add'>+#define ROM_SW_DATA_4__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_4__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_5</div><div class='add'>+#define ROM_SW_DATA_5__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_5__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_6</div><div class='add'>+#define ROM_SW_DATA_6__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_6__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_7</div><div class='add'>+#define ROM_SW_DATA_7__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_7__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_8</div><div class='add'>+#define ROM_SW_DATA_8__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_8__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_9</div><div class='add'>+#define ROM_SW_DATA_9__ROM_SW_DATA__SHIFT                                                                     0x0</div><div class='add'>+#define ROM_SW_DATA_9__ROM_SW_DATA_MASK                                                                       0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_10</div><div class='add'>+#define ROM_SW_DATA_10__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_10__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_11</div><div class='add'>+#define ROM_SW_DATA_11__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_11__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_12</div><div class='add'>+#define ROM_SW_DATA_12__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_12__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_13</div><div class='add'>+#define ROM_SW_DATA_13__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_13__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_14</div><div class='add'>+#define ROM_SW_DATA_14__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_14__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_15</div><div class='add'>+#define ROM_SW_DATA_15__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_15__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_16</div><div class='add'>+#define ROM_SW_DATA_16__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_16__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_17</div><div class='add'>+#define ROM_SW_DATA_17__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_17__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_18</div><div class='add'>+#define ROM_SW_DATA_18__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_18__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_19</div><div class='add'>+#define ROM_SW_DATA_19__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_19__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_20</div><div class='add'>+#define ROM_SW_DATA_20__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_20__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_21</div><div class='add'>+#define ROM_SW_DATA_21__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_21__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_22</div><div class='add'>+#define ROM_SW_DATA_22__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_22__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_23</div><div class='add'>+#define ROM_SW_DATA_23__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_23__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_24</div><div class='add'>+#define ROM_SW_DATA_24__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_24__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_25</div><div class='add'>+#define ROM_SW_DATA_25__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_25__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_26</div><div class='add'>+#define ROM_SW_DATA_26__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_26__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_27</div><div class='add'>+#define ROM_SW_DATA_27__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_27__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_28</div><div class='add'>+#define ROM_SW_DATA_28__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_28__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_29</div><div class='add'>+#define ROM_SW_DATA_29__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_29__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_30</div><div class='add'>+#define ROM_SW_DATA_30__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_30__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_31</div><div class='add'>+#define ROM_SW_DATA_31__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_31__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_32</div><div class='add'>+#define ROM_SW_DATA_32__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_32__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_33</div><div class='add'>+#define ROM_SW_DATA_33__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_33__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_34</div><div class='add'>+#define ROM_SW_DATA_34__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_34__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_35</div><div class='add'>+#define ROM_SW_DATA_35__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_35__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_36</div><div class='add'>+#define ROM_SW_DATA_36__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_36__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_37</div><div class='add'>+#define ROM_SW_DATA_37__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_37__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_38</div><div class='add'>+#define ROM_SW_DATA_38__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_38__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_39</div><div class='add'>+#define ROM_SW_DATA_39__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_39__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_40</div><div class='add'>+#define ROM_SW_DATA_40__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_40__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_41</div><div class='add'>+#define ROM_SW_DATA_41__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_41__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_42</div><div class='add'>+#define ROM_SW_DATA_42__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_42__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_43</div><div class='add'>+#define ROM_SW_DATA_43__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_43__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_44</div><div class='add'>+#define ROM_SW_DATA_44__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_44__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_45</div><div class='add'>+#define ROM_SW_DATA_45__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_45__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_46</div><div class='add'>+#define ROM_SW_DATA_46__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_46__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_47</div><div class='add'>+#define ROM_SW_DATA_47__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_47__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_48</div><div class='add'>+#define ROM_SW_DATA_48__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_48__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_49</div><div class='add'>+#define ROM_SW_DATA_49__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_49__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_50</div><div class='add'>+#define ROM_SW_DATA_50__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_50__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_51</div><div class='add'>+#define ROM_SW_DATA_51__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_51__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_52</div><div class='add'>+#define ROM_SW_DATA_52__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_52__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_53</div><div class='add'>+#define ROM_SW_DATA_53__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_53__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_54</div><div class='add'>+#define ROM_SW_DATA_54__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_54__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_55</div><div class='add'>+#define ROM_SW_DATA_55__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_55__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_56</div><div class='add'>+#define ROM_SW_DATA_56__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_56__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_57</div><div class='add'>+#define ROM_SW_DATA_57__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_57__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_58</div><div class='add'>+#define ROM_SW_DATA_58__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_58__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_59</div><div class='add'>+#define ROM_SW_DATA_59__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_59__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_60</div><div class='add'>+#define ROM_SW_DATA_60__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_60__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_61</div><div class='add'>+#define ROM_SW_DATA_61__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_61__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_62</div><div class='add'>+#define ROM_SW_DATA_62__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_62__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_63</div><div class='add'>+#define ROM_SW_DATA_63__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_63__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//ROM_SW_DATA_64</div><div class='add'>+#define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT                                                                    0x0</div><div class='add'>+#define ROM_SW_DATA_64__ROM_SW_DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// addressBlock: smuio_smuio_gpio_SmuSmuioDec</div><div class='add'>+//SMU_GPIOPAD_SW_INT_STAT</div><div class='add'>+#define SMU_GPIOPAD_SW_INT_STAT__SW_INT_STAT__SHIFT                                                           0x0</div><div class='add'>+#define SMU_GPIOPAD_SW_INT_STAT__SW_INT_STAT_MASK                                                             0x00000001L</div><div class='add'>+//SMU_GPIOPAD_MASK</div><div class='add'>+#define SMU_GPIOPAD_MASK__GPIO_MASK__SHIFT                                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_MASK__GPIO_MASK_MASK                                                                      0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_A</div><div class='add'>+#define SMU_GPIOPAD_A__GPIO_A__SHIFT                                                                          0x0</div><div class='add'>+#define SMU_GPIOPAD_A__GPIO_A_MASK                                                                            0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_TXIMPSEL</div><div class='add'>+#define SMU_GPIOPAD_TXIMPSEL__GPIO_TXIMPSEL__SHIFT                                                            0x0</div><div class='add'>+#define SMU_GPIOPAD_TXIMPSEL__GPIO_TXIMPSEL_MASK                                                              0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_EN</div><div class='add'>+#define SMU_GPIOPAD_EN__GPIO_EN__SHIFT                                                                        0x0</div><div class='add'>+#define SMU_GPIOPAD_EN__GPIO_EN_MASK                                                                          0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_Y</div><div class='add'>+#define SMU_GPIOPAD_Y__GPIO_Y__SHIFT                                                                          0x0</div><div class='add'>+#define SMU_GPIOPAD_Y__GPIO_Y_MASK                                                                            0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_RXEN</div><div class='add'>+#define SMU_GPIOPAD_RXEN__GPIO_RXEN__SHIFT                                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_RXEN__GPIO_RXEN_MASK                                                                      0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_RCVR_SEL0</div><div class='add'>+#define SMU_GPIOPAD_RCVR_SEL0__GPIO_RCVR_SEL0__SHIFT                                                          0x0</div><div class='add'>+#define SMU_GPIOPAD_RCVR_SEL0__GPIO_RCVR_SEL0_MASK                                                            0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_RCVR_SEL1</div><div class='add'>+#define SMU_GPIOPAD_RCVR_SEL1__GPIO_RCVR_SEL1__SHIFT                                                          0x0</div><div class='add'>+#define SMU_GPIOPAD_RCVR_SEL1__GPIO_RCVR_SEL1_MASK                                                            0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_PU_EN</div><div class='add'>+#define SMU_GPIOPAD_PU_EN__GPIO_PU_EN__SHIFT                                                                  0x0</div><div class='add'>+#define SMU_GPIOPAD_PU_EN__GPIO_PU_EN_MASK                                                                    0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_PD_EN</div><div class='add'>+#define SMU_GPIOPAD_PD_EN__GPIO_PD_EN__SHIFT                                                                  0x0</div><div class='add'>+#define SMU_GPIOPAD_PD_EN__GPIO_PD_EN_MASK                                                                    0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_PINSTRAPS</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_0__SHIFT                                                         0x0</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_1__SHIFT                                                         0x1</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_2__SHIFT                                                         0x2</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_3__SHIFT                                                         0x3</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_4__SHIFT                                                         0x4</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_5__SHIFT                                                         0x5</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_6__SHIFT                                                         0x6</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_7__SHIFT                                                         0x7</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_8__SHIFT                                                         0x8</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_9__SHIFT                                                         0x9</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_10__SHIFT                                                        0xa</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_11__SHIFT                                                        0xb</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_12__SHIFT                                                        0xc</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_13__SHIFT                                                        0xd</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_14__SHIFT                                                        0xe</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_15__SHIFT                                                        0xf</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_16__SHIFT                                                        0x10</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_17__SHIFT                                                        0x11</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_18__SHIFT                                                        0x12</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_19__SHIFT                                                        0x13</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_20__SHIFT                                                        0x14</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_21__SHIFT                                                        0x15</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_22__SHIFT                                                        0x16</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_23__SHIFT                                                        0x17</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_24__SHIFT                                                        0x18</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_25__SHIFT                                                        0x19</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_26__SHIFT                                                        0x1a</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_27__SHIFT                                                        0x1b</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_28__SHIFT                                                        0x1c</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_29__SHIFT                                                        0x1d</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_30__SHIFT                                                        0x1e</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_0_MASK                                                           0x00000001L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_1_MASK                                                           0x00000002L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_2_MASK                                                           0x00000004L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_3_MASK                                                           0x00000008L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_4_MASK                                                           0x00000010L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_5_MASK                                                           0x00000020L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_6_MASK                                                           0x00000040L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_7_MASK                                                           0x00000080L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_8_MASK                                                           0x00000100L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_9_MASK                                                           0x00000200L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_10_MASK                                                          0x00000400L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_11_MASK                                                          0x00000800L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_12_MASK                                                          0x00001000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_13_MASK                                                          0x00002000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_14_MASK                                                          0x00004000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_15_MASK                                                          0x00008000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_16_MASK                                                          0x00010000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_17_MASK                                                          0x00020000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_18_MASK                                                          0x00040000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_19_MASK                                                          0x00080000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_20_MASK                                                          0x00100000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_21_MASK                                                          0x00200000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_22_MASK                                                          0x00400000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_23_MASK                                                          0x00800000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_24_MASK                                                          0x01000000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_25_MASK                                                          0x02000000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_26_MASK                                                          0x04000000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_27_MASK                                                          0x08000000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_28_MASK                                                          0x10000000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_29_MASK                                                          0x20000000L</div><div class='add'>+#define SMU_GPIOPAD_PINSTRAPS__GPIO_PINSTRAP_30_MASK                                                          0x40000000L</div><div class='add'>+//DFT_PINSTRAPS</div><div class='add'>+#define DFT_PINSTRAPS__DFT_PINSTRAPS__SHIFT                                                                   0x0</div><div class='add'>+#define DFT_PINSTRAPS__DFT_PINSTRAPS_MASK                                                                     0x000000FFL</div><div class='add'>+//SMU_GPIOPAD_INT_STAT_EN</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_EN__GPIO_INT_STAT_EN__SHIFT                                                      0x0</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_EN__SW_INITIATED_INT_STAT_EN__SHIFT                                              0x1f</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_EN__GPIO_INT_STAT_EN_MASK                                                        0x1FFFFFFFL</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_EN__SW_INITIATED_INT_STAT_EN_MASK                                                0x80000000L</div><div class='add'>+//SMU_GPIOPAD_INT_STAT</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT__GPIO_INT_STAT__SHIFT                                                            0x0</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT__SW_INITIATED_INT_STAT__SHIFT                                                    0x1f</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT__GPIO_INT_STAT_MASK                                                              0x1FFFFFFFL</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT__SW_INITIATED_INT_STAT_MASK                                                      0x80000000L</div><div class='add'>+//SMU_GPIOPAD_INT_STAT_AK</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_0__SHIFT                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_1__SHIFT                                                    0x1</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_2__SHIFT                                                    0x2</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_3__SHIFT                                                    0x3</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_4__SHIFT                                                    0x4</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_5__SHIFT                                                    0x5</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_6__SHIFT                                                    0x6</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_7__SHIFT                                                    0x7</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_8__SHIFT                                                    0x8</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_9__SHIFT                                                    0x9</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_10__SHIFT                                                   0xa</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_11__SHIFT                                                   0xb</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_12__SHIFT                                                   0xc</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_13__SHIFT                                                   0xd</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_14__SHIFT                                                   0xe</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_15__SHIFT                                                   0xf</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_16__SHIFT                                                   0x10</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_17__SHIFT                                                   0x11</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_18__SHIFT                                                   0x12</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_19__SHIFT                                                   0x13</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_20__SHIFT                                                   0x14</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_21__SHIFT                                                   0x15</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_22__SHIFT                                                   0x16</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_23__SHIFT                                                   0x17</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_24__SHIFT                                                   0x18</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_25__SHIFT                                                   0x19</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_26__SHIFT                                                   0x1a</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_27__SHIFT                                                   0x1b</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_28__SHIFT                                                   0x1c</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__SW_INITIATED_INT_STAT_AK__SHIFT                                              0x1f</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_0_MASK                                                      0x00000001L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_1_MASK                                                      0x00000002L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_2_MASK                                                      0x00000004L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_3_MASK                                                      0x00000008L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_4_MASK                                                      0x00000010L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_5_MASK                                                      0x00000020L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_6_MASK                                                      0x00000040L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_7_MASK                                                      0x00000080L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_8_MASK                                                      0x00000100L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_9_MASK                                                      0x00000200L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_10_MASK                                                     0x00000400L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_11_MASK                                                     0x00000800L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_12_MASK                                                     0x00001000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_13_MASK                                                     0x00002000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_14_MASK                                                     0x00004000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_15_MASK                                                     0x00008000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_16_MASK                                                     0x00010000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_17_MASK                                                     0x00020000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_18_MASK                                                     0x00040000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_19_MASK                                                     0x00080000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_20_MASK                                                     0x00100000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_21_MASK                                                     0x00200000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_22_MASK                                                     0x00400000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_23_MASK                                                     0x00800000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_24_MASK                                                     0x01000000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_25_MASK                                                     0x02000000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_26_MASK                                                     0x04000000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_27_MASK                                                     0x08000000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__GPIO_INT_STAT_AK_28_MASK                                                     0x10000000L</div><div class='add'>+#define SMU_GPIOPAD_INT_STAT_AK__SW_INITIATED_INT_STAT_AK_MASK                                                0x80000000L</div><div class='add'>+//SMU_GPIOPAD_INT_EN</div><div class='add'>+#define SMU_GPIOPAD_INT_EN__GPIO_INT_EN__SHIFT                                                                0x0</div><div class='add'>+#define SMU_GPIOPAD_INT_EN__SW_INITIATED_INT_EN__SHIFT                                                        0x1f</div><div class='add'>+#define SMU_GPIOPAD_INT_EN__GPIO_INT_EN_MASK                                                                  0x1FFFFFFFL</div><div class='add'>+#define SMU_GPIOPAD_INT_EN__SW_INITIATED_INT_EN_MASK                                                          0x80000000L</div><div class='add'>+//SMU_GPIOPAD_INT_TYPE</div><div class='add'>+#define SMU_GPIOPAD_INT_TYPE__GPIO_INT_TYPE__SHIFT                                                            0x0</div><div class='add'>+#define SMU_GPIOPAD_INT_TYPE__SW_INITIATED_INT_TYPE__SHIFT                                                    0x1f</div><div class='add'>+#define SMU_GPIOPAD_INT_TYPE__GPIO_INT_TYPE_MASK                                                              0x1FFFFFFFL</div><div class='add'>+#define SMU_GPIOPAD_INT_TYPE__SW_INITIATED_INT_TYPE_MASK                                                      0x80000000L</div><div class='add'>+//SMU_GPIOPAD_INT_POLARITY</div><div class='add'>+#define SMU_GPIOPAD_INT_POLARITY__GPIO_INT_POLARITY__SHIFT                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_INT_POLARITY__SW_INITIATED_INT_POLARITY__SHIFT                                            0x1f</div><div class='add'>+#define SMU_GPIOPAD_INT_POLARITY__GPIO_INT_POLARITY_MASK                                                      0x1FFFFFFFL</div><div class='add'>+#define SMU_GPIOPAD_INT_POLARITY__SW_INITIATED_INT_POLARITY_MASK                                              0x80000000L</div><div class='add'>+//SMUIO_PCC_GPIO_SELECT</div><div class='add'>+#define SMUIO_PCC_GPIO_SELECT__GPIO__SHIFT                                                                    0x0</div><div class='add'>+#define SMUIO_PCC_GPIO_SELECT__GPIO_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_S0</div><div class='add'>+#define SMU_GPIOPAD_S0__GPIO_S0__SHIFT                                                                        0x0</div><div class='add'>+#define SMU_GPIOPAD_S0__GPIO_S0_MASK                                                                          0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_S1</div><div class='add'>+#define SMU_GPIOPAD_S1__GPIO_S1__SHIFT                                                                        0x0</div><div class='add'>+#define SMU_GPIOPAD_S1__GPIO_S1_MASK                                                                          0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_SCHMEN</div><div class='add'>+#define SMU_GPIOPAD_SCHMEN__GPIO_SCHMEN__SHIFT                                                                0x0</div><div class='add'>+#define SMU_GPIOPAD_SCHMEN__GPIO_SCHMEN_MASK                                                                  0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_SCL_EN</div><div class='add'>+#define SMU_GPIOPAD_SCL_EN__GPIO_SCL_EN__SHIFT                                                                0x0</div><div class='add'>+#define SMU_GPIOPAD_SCL_EN__GPIO_SCL_EN_MASK                                                                  0x7FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_SDA_EN</div><div class='add'>+#define SMU_GPIOPAD_SDA_EN__GPIO_SDA_EN__SHIFT                                                                0x0</div><div class='add'>+#define SMU_GPIOPAD_SDA_EN__GPIO_SDA_EN_MASK                                                                  0x7FFFFFFFL</div><div class='add'>+//SMUIO_GPIO_INT0_SELECT</div><div class='add'>+#define SMUIO_GPIO_INT0_SELECT__GPIO_INT0_SELECT__SHIFT                                                       0x0</div><div class='add'>+#define SMUIO_GPIO_INT0_SELECT__GPIO_INT0_SELECT_MASK                                                         0xFFFFFFFFL</div><div class='add'>+//SMUIO_GPIO_INT1_SELECT</div><div class='add'>+#define SMUIO_GPIO_INT1_SELECT__GPIO_INT1_SELECT__SHIFT                                                       0x0</div><div class='add'>+#define SMUIO_GPIO_INT1_SELECT__GPIO_INT1_SELECT_MASK                                                         0xFFFFFFFFL</div><div class='add'>+//SMUIO_GPIO_INT2_SELECT</div><div class='add'>+#define SMUIO_GPIO_INT2_SELECT__GPIO_INT2_SELECT__SHIFT                                                       0x0</div><div class='add'>+#define SMUIO_GPIO_INT2_SELECT__GPIO_INT2_SELECT_MASK                                                         0xFFFFFFFFL</div><div class='add'>+//SMUIO_GPIO_INT3_SELECT</div><div class='add'>+#define SMUIO_GPIO_INT3_SELECT__GPIO_INT3_SELECT__SHIFT                                                       0x0</div><div class='add'>+#define SMUIO_GPIO_INT3_SELECT__GPIO_INT3_SELECT_MASK                                                         0xFFFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_MP_INT0_STAT</div><div class='add'>+#define SMU_GPIOPAD_MP_INT0_STAT__GPIO_MP_INT0_STAT__SHIFT                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_MP_INT0_STAT__GPIO_MP_INT0_STAT_MASK                                                      0x1FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_MP_INT1_STAT</div><div class='add'>+#define SMU_GPIOPAD_MP_INT1_STAT__GPIO_MP_INT1_STAT__SHIFT                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_MP_INT1_STAT__GPIO_MP_INT1_STAT_MASK                                                      0x1FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_MP_INT2_STAT</div><div class='add'>+#define SMU_GPIOPAD_MP_INT2_STAT__GPIO_MP_INT2_STAT__SHIFT                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_MP_INT2_STAT__GPIO_MP_INT2_STAT_MASK                                                      0x1FFFFFFFL</div><div class='add'>+//SMU_GPIOPAD_MP_INT3_STAT</div><div class='add'>+#define SMU_GPIOPAD_MP_INT3_STAT__GPIO_MP_INT3_STAT__SHIFT                                                    0x0</div><div class='add'>+#define SMU_GPIOPAD_MP_INT3_STAT__GPIO_MP_INT3_STAT_MASK                                                      0x1FFFFFFFL</div><div class='add'>+//SMIO_INDEX</div><div class='add'>+#define SMIO_INDEX__SW_SMIO_INDEX__SHIFT                                                                      0x0</div><div class='add'>+#define SMIO_INDEX__SW_SMIO_INDEX_MASK                                                                        0x00000001L</div><div class='add'>+//S0_VID_SMIO_CNTL</div><div class='add'>+#define S0_VID_SMIO_CNTL__S0_SMIO_VALUES__SHIFT                                                               0x0</div><div class='add'>+#define S0_VID_SMIO_CNTL__S0_SMIO_VALUES_MASK                                                                 0xFFFFFFFFL</div><div class='add'>+//S1_VID_SMIO_CNTL</div><div class='add'>+#define S1_VID_SMIO_CNTL__S1_SMIO_VALUES__SHIFT                                                               0x0</div><div class='add'>+#define S1_VID_SMIO_CNTL__S1_SMIO_VALUES_MASK                                                                 0xFFFFFFFFL</div><div class='add'>+//OPEN_DRAIN_SELECT</div><div class='add'>+#define OPEN_DRAIN_SELECT__OPEN_DRAIN_SELECT__SHIFT                                                           0x0</div><div class='add'>+#define OPEN_DRAIN_SELECT__RESERVED__SHIFT                                                                    0x1f</div><div class='add'>+#define OPEN_DRAIN_SELECT__OPEN_DRAIN_SELECT_MASK                                                             0x7FFFFFFFL</div><div class='add'>+#define OPEN_DRAIN_SELECT__RESERVED_MASK                                                                      0x80000000L</div><div class='add'>+//SMIO_ENABLE</div><div class='add'>+#define SMIO_ENABLE__SMIO_ENABLE__SHIFT                                                                       0x0</div><div class='add'>+#define SMIO_ENABLE__SMIO_ENABLE_MASK                                                                         0xFFFFFFFFL</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h<br/>index 32054ecf0b87..805c9d37a2b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/kgd_pp_interface.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/kgd_pp_interface.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/kgd_pp_interface.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/kgd_pp_interface.h</a></div><div class='hunk'>@@ -150,6 +150,7 @@ enum amd_pp_sensors {</div><div class='ctx'> 	AMDGPU_PP_SENSOR_VCN_POWER_STATE,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK,</div><div class='add'>+	AMDGPU_PP_SENSOR_VCN_LOAD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum amd_pp_task {</div><div class='hunk'>@@ -420,7 +421,7 @@ struct amd_pm_funcs {</div><div class='ctx'> 	int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock);</div><div class='ctx'> 	int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);</div><div class='ctx'> 	int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock);</div><div class='del'>-	bool (*get_asic_baco_capability)(void *handle);</div><div class='add'>+	int (*get_asic_baco_capability)(void *handle);</div><div class='ctx'> 	int (*get_asic_baco_state)(void *handle, int *state);</div><div class='ctx'> 	int (*set_asic_baco_state)(void *handle, int state);</div><div class='ctx'> 	int (*get_ppfeature_status)(void *handle, char *buf);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h<br/>index ec5b9ab67c5e..b72d5d362251 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/mes_v11_api_def.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/include/mes_v11_api_def.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/mes_v11_api_def.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/include/mes_v11_api_def.h</a></div><div class='hunk'>@@ -61,6 +61,7 @@ enum MES_SCH_API_OPCODE {</div><div class='ctx'> 	MES_SCH_API_MISC			= 14,</div><div class='ctx'> 	MES_SCH_API_UPDATE_ROOT_PAGE_TABLE      = 15,</div><div class='ctx'> 	MES_SCH_API_AMD_LOG                     = 16,</div><div class='add'>+	MES_SCH_API_SET_HW_RSRC_1               = 19,</div><div class='ctx'> 	MES_SCH_API_MAX				= 0xFF</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -238,6 +239,26 @@ union MESAPI_SET_HW_RESOURCES {</div><div class='ctx'> 	uint32_t	max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+union MESAPI_SET_HW_RESOURCES_1 {</div><div class='add'>+	struct {</div><div class='add'>+		union MES_API_HEADER				header;</div><div class='add'>+		struct MES_API_STATUS			   api_status;</div><div class='add'>+		uint64_t							timestamp;</div><div class='add'>+		union {</div><div class='add'>+			struct {</div><div class='add'>+				uint32_t enable_mes_info_ctx : 1;</div><div class='add'>+				uint32_t reserved : 31;</div><div class='add'>+			};</div><div class='add'>+			uint32_t uint32_all;</div><div class='add'>+		};</div><div class='add'>+		uint64_t							mes_info_ctx_mc_addr;</div><div class='add'>+		uint32_t							mes_info_ctx_size;</div><div class='add'>+		uint32_t							mes_kiq_unmap_timeout; // unit is 100ms</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> union MESAPI__ADD_QUEUE {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		union MES_API_HEADER		header;</div><div class='hunk'>@@ -278,10 +299,21 @@ union MESAPI__ADD_QUEUE {</div><div class='ctx'> 			uint32_t skip_process_ctx_clear : 1;</div><div class='ctx'> 			uint32_t map_legacy_kq		: 1;</div><div class='ctx'> 			uint32_t exclusively_scheduled	: 1;</div><div class='del'>-			uint32_t reserved		: 17;</div><div class='add'>+			uint32_t is_long_running        : 1;</div><div class='add'>+			uint32_t is_dwm_queue           : 1;</div><div class='add'>+			uint32_t is_video_blit_queue    : 1;</div><div class='add'>+			uint32_t reserved               : 14;</div><div class='ctx'> 		};</div><div class='del'>-		struct MES_API_STATUS		api_status;</div><div class='del'>-		uint64_t                        tma_addr;</div><div class='add'>+		struct MES_API_STATUS       api_status;</div><div class='add'>+		uint64_t                    tma_addr;</div><div class='add'>+		uint32_t                    sch_id;</div><div class='add'>+		uint64_t                    timestamp;</div><div class='add'>+		uint32_t                    process_context_array_index;</div><div class='add'>+		uint32_t                    gang_context_array_index;</div><div class='add'>+		uint32_t                    pipe_id;</div><div class='add'>+		uint32_t                    queue_id;</div><div class='add'>+		uint32_t                    alignment_mode_setting;</div><div class='add'>+		uint64_t                    unmap_flag_addr;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	uint32_t	max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c<br/>index f84bfed50681..eee919577b44 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_dpm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/amdgpu_dpm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_dpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/amdgpu_dpm.c</a></div><div class='hunk'>@@ -199,14 +199,14 @@ int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)</div><div class='add'>+int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct amd_pm_funcs *pp_funcs = adev-&gt;powerplay.pp_funcs;</div><div class='ctx'> 	void *pp_handle = adev-&gt;powerplay.pp_handle;</div><div class='del'>-	bool ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!pp_funcs || !pp_funcs-&gt;get_asic_baco_capability)</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> 	/* Don't use baco for reset in S3.</div><div class='ctx'> 	 * This is a workaround for some platforms</div><div class='ctx'> 	 * where entering BACO during suspend</div><div class='hunk'>@@ -217,7 +217,7 @@ bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)</div><div class='ctx'> 	 * devices.  Needs more investigation.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (adev-&gt;in_s3)</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;adev-&gt;pm.mutex);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c<br/>index f09b9d49297e..c11952a4389b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/amdgpu_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/amdgpu_pm.c</a></div><div class='hunk'>@@ -38,6 +38,8 @@</div><div class='ctx'> #define MAX_NUM_OF_FEATURES_PER_SUBSET		8</div><div class='ctx'> #define MAX_NUM_OF_SUBSETS			8</div><div class='ctx'> </div><div class='add'>+#define DEVICE_ATTR_IS(_name)		(attr_id == device_attr_id__##_name)</div><div class='add'>+</div><div class='ctx'> struct od_attribute {</div><div class='ctx'> 	struct kobj_attribute	attribute;</div><div class='ctx'> 	struct list_head	entry;</div><div class='hunk'>@@ -1582,6 +1584,30 @@ static ssize_t amdgpu_get_mem_busy_percent(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * DOC: vcn_busy_percent</div><div class='add'>+ *</div><div class='add'>+ * The amdgpu driver provides a sysfs API for reading how busy the VCN</div><div class='add'>+ * is as a percentage.  The file vcn_busy_percent is used for this.</div><div class='add'>+ * The SMU firmware computes a percentage of load based on the</div><div class='add'>+ * aggregate activity level in the IP cores.</div><div class='add'>+ */</div><div class='add'>+static ssize_t amdgpu_get_vcn_busy_percent(struct device *dev,</div><div class='add'>+						  struct device_attribute *attr,</div><div class='add'>+						  char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *ddev = dev_get_drvdata(dev);</div><div class='add'>+	struct amdgpu_device *adev = drm_to_adev(ddev);</div><div class='add'>+	unsigned int value;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_VCN_LOAD, &amp;value);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * DOC: pcie_bw</div><div class='ctx'>  *</div><div class='ctx'>  * The amdgpu driver provides a sysfs API for estimating how much data</div><div class='hunk'>@@ -2091,6 +2117,99 @@ static int pp_dpm_dcefclk_attr_update(struct amdgpu_device *adev, struct amdgpu_</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int pp_dpm_clk_default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,</div><div class='add'>+					  uint32_t mask, enum amdgpu_device_attr_states *states)</div><div class='add'>+{</div><div class='add'>+	struct device_attribute *dev_attr = &amp;attr-&gt;dev_attr;</div><div class='add'>+	enum amdgpu_device_attr_id attr_id = attr-&gt;attr_id;</div><div class='add'>+	uint32_t mp1_ver = amdgpu_ip_version(adev, MP1_HWIP, 0);</div><div class='add'>+	uint32_t gc_ver = amdgpu_ip_version(adev, GC_HWIP, 0);</div><div class='add'>+</div><div class='add'>+	*states = ATTR_STATE_SUPPORTED;</div><div class='add'>+</div><div class='add'>+	if (!(attr-&gt;flags &amp; mask)) {</div><div class='add'>+		*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (DEVICE_ATTR_IS(pp_dpm_socclk)) {</div><div class='add'>+		if (gc_ver &lt; IP_VERSION(9, 0, 0))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(pp_dpm_fclk)) {</div><div class='add'>+		if (mp1_ver &lt; IP_VERSION(10, 0, 0))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(pp_dpm_vclk)) {</div><div class='add'>+		if (!(gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 3) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 6) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 7) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 1, 2) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 0) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 1) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 4) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 5, 0) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 3) ||</div><div class='add'>+		      gc_ver == IP_VERSION(9, 4, 3)))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(pp_dpm_vclk1)) {</div><div class='add'>+		if (!((gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='add'>+		       gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='add'>+		       gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='add'>+		       gc_ver == IP_VERSION(11, 0, 3)) &amp;&amp; adev-&gt;vcn.num_vcn_inst &gt;= 2))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(pp_dpm_dclk)) {</div><div class='add'>+		if (!(gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 3) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 6) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 7) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='add'>+		      gc_ver == IP_VERSION(10, 1, 2) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 0) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 1) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 4) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 5, 0) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='add'>+		      gc_ver == IP_VERSION(11, 0, 3) ||</div><div class='add'>+		      gc_ver == IP_VERSION(9, 4, 3)))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(pp_dpm_dclk1)) {</div><div class='add'>+		if (!((gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='add'>+		       gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='add'>+		       gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='add'>+		       gc_ver == IP_VERSION(11, 0, 3)) &amp;&amp; adev-&gt;vcn.num_vcn_inst &gt;= 2))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(pp_dpm_pcie)) {</div><div class='add'>+		if (gc_ver == IP_VERSION(9, 4, 2) ||</div><div class='add'>+		    gc_ver == IP_VERSION(9, 4, 3))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (gc_ver) {</div><div class='add'>+	case IP_VERSION(9, 4, 1):</div><div class='add'>+	case IP_VERSION(9, 4, 2):</div><div class='add'>+		/* the Mi series card does not support standalone mclk/socclk/fclk level setting */</div><div class='add'>+		if (DEVICE_ATTR_IS(pp_dpm_mclk) ||</div><div class='add'>+		    DEVICE_ATTR_IS(pp_dpm_socclk) ||</div><div class='add'>+		    DEVICE_ATTR_IS(pp_dpm_fclk)) {</div><div class='add'>+			dev_attr-&gt;attr.mode &amp;= ~S_IWUGO;</div><div class='add'>+			dev_attr-&gt;store = NULL;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setting should not be allowed from VF if not in one VF mode */</div><div class='add'>+	if (amdgpu_sriov_vf(adev) &amp;&amp; amdgpu_sriov_is_pp_one_vf(adev)) {</div><div class='add'>+		dev_attr-&gt;attr.mode &amp;= ~S_IWUGO;</div><div class='add'>+		dev_attr-&gt;store = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Following items will be read out to indicate current plpd policy:</div><div class='ctx'>  *  - -1: none</div><div class='ctx'>  *  - 0: disallow</div><div class='hunk'>@@ -2162,17 +2281,26 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RO(pp_cur_state,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_force_state,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_table,					ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_sclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_mclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_socclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_fclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_vclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_vclk1,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_dclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_dclk1,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_sclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_mclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_socclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_fclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_vclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_vclk1,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_dclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_dclk1,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_dpm_dcefclk,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='ctx'> 			      .attr_update = pp_dpm_dcefclk_attr_update),</div><div class='del'>-	AMDGPU_DEVICE_ATTR_RW(pp_dpm_pcie,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RW(pp_dpm_pcie,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,</div><div class='add'>+			      .attr_update = pp_dpm_clk_default_attr_update),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_sclk_od,				ATTR_FLAG_BASIC),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_mclk_od,				ATTR_FLAG_BASIC),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_power_profile_mode,			ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='hunk'>@@ -2180,6 +2308,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {</div><div class='ctx'> 			      .attr_update = pp_od_clk_voltage_attr_update),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RO(gpu_busy_percent,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RO(mem_busy_percent,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='add'>+	AMDGPU_DEVICE_ATTR_RO(vcn_busy_percent,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RO(pcie_bw,					ATTR_FLAG_BASIC),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RW(pp_features,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='ctx'> 	AMDGPU_DEVICE_ATTR_RO(unique_id,				ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),</div><div class='hunk'>@@ -2201,28 +2330,28 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_</div><div class='ctx'> 			       uint32_t mask, enum amdgpu_device_attr_states *states)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_attribute *dev_attr = &amp;attr-&gt;dev_attr;</div><div class='del'>-	uint32_t mp1_ver = amdgpu_ip_version(adev, MP1_HWIP, 0);</div><div class='add'>+	enum amdgpu_device_attr_id attr_id = attr-&gt;attr_id;</div><div class='ctx'> 	uint32_t gc_ver = amdgpu_ip_version(adev, GC_HWIP, 0);</div><div class='del'>-	const char *attr_name = dev_attr-&gt;attr.name;</div><div class='ctx'> </div><div class='ctx'> 	if (!(attr-&gt;flags &amp; mask)) {</div><div class='ctx'> 		*states = ATTR_STATE_UNSUPPORTED;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define DEVICE_ATTR_IS(_name)	(!strcmp(attr_name, #_name))</div><div class='del'>-</div><div class='del'>-	if (DEVICE_ATTR_IS(pp_dpm_socclk)) {</div><div class='del'>-		if (gc_ver &lt; IP_VERSION(9, 0, 0))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(pp_dpm_fclk)) {</div><div class='del'>-		if (mp1_ver &lt; IP_VERSION(10, 0, 0))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(mem_busy_percent)) {</div><div class='add'>+	if (DEVICE_ATTR_IS(mem_busy_percent)) {</div><div class='ctx'> 		if ((adev-&gt;flags &amp; AMD_IS_APU &amp;&amp;</div><div class='ctx'> 		     gc_ver != IP_VERSION(9, 4, 3)) ||</div><div class='ctx'> 		    gc_ver == IP_VERSION(9, 0, 1))</div><div class='ctx'> 			*states = ATTR_STATE_UNSUPPORTED;</div><div class='add'>+	} else if (DEVICE_ATTR_IS(vcn_busy_percent)) {</div><div class='add'>+		if (!(gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='add'>+			  gc_ver == IP_VERSION(10, 3, 3) ||</div><div class='add'>+			  gc_ver == IP_VERSION(10, 3, 6) ||</div><div class='add'>+			  gc_ver == IP_VERSION(10, 3, 7) ||</div><div class='add'>+			  gc_ver == IP_VERSION(11, 0, 1) ||</div><div class='add'>+			  gc_ver == IP_VERSION(11, 0, 4) ||</div><div class='add'>+			  gc_ver == IP_VERSION(11, 5, 0)))</div><div class='add'>+			*states = ATTR_STATE_UNSUPPORTED;</div><div class='ctx'> 	} else if (DEVICE_ATTR_IS(pcie_bw)) {</div><div class='ctx'> 		/* PCIe Perf counters won't work on APU nodes */</div><div class='ctx'> 		if (adev-&gt;flags &amp; AMD_IS_APU ||</div><div class='hunk'>@@ -2253,36 +2382,6 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_</div><div class='ctx'> 	} else if (DEVICE_ATTR_IS(gpu_metrics)) {</div><div class='ctx'> 		if (gc_ver &lt; IP_VERSION(9, 1, 0))</div><div class='ctx'> 			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(pp_dpm_vclk)) {</div><div class='del'>-		if (!(gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='del'>-		      gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='del'>-		      gc_ver == IP_VERSION(10, 1, 2) ||</div><div class='del'>-		      gc_ver == IP_VERSION(11, 0, 0) ||</div><div class='del'>-		      gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='del'>-		      gc_ver == IP_VERSION(11, 0, 3) ||</div><div class='del'>-		      gc_ver == IP_VERSION(9, 4, 3)))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(pp_dpm_vclk1)) {</div><div class='del'>-		if (!((gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='del'>-			   gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='del'>-			   gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='del'>-			   gc_ver == IP_VERSION(11, 0, 3)) &amp;&amp; adev-&gt;vcn.num_vcn_inst &gt;= 2))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(pp_dpm_dclk)) {</div><div class='del'>-		if (!(gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='del'>-		      gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='del'>-		      gc_ver == IP_VERSION(10, 1, 2) ||</div><div class='del'>-		      gc_ver == IP_VERSION(11, 0, 0) ||</div><div class='del'>-		      gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='del'>-		      gc_ver == IP_VERSION(11, 0, 3) ||</div><div class='del'>-		      gc_ver == IP_VERSION(9, 4, 3)))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(pp_dpm_dclk1)) {</div><div class='del'>-		if (!((gc_ver == IP_VERSION(10, 3, 1) ||</div><div class='del'>-			   gc_ver == IP_VERSION(10, 3, 0) ||</div><div class='del'>-			   gc_ver == IP_VERSION(11, 0, 2) ||</div><div class='del'>-			   gc_ver == IP_VERSION(11, 0, 3)) &amp;&amp; adev-&gt;vcn.num_vcn_inst &gt;= 2))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='ctx'> 	} else if (DEVICE_ATTR_IS(pp_power_profile_mode)) {</div><div class='ctx'> 		if (amdgpu_dpm_get_power_profile_mode(adev, NULL) == -EOPNOTSUPP)</div><div class='ctx'> 			*states = ATTR_STATE_UNSUPPORTED;</div><div class='hunk'>@@ -2304,23 +2403,9 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_</div><div class='ctx'> 		if (amdgpu_dpm_get_apu_thermal_limit(adev, &amp;limit) ==</div><div class='ctx'> 		    -EOPNOTSUPP)</div><div class='ctx'> 			*states = ATTR_STATE_UNSUPPORTED;</div><div class='del'>-	} else if (DEVICE_ATTR_IS(pp_dpm_pcie)) {</div><div class='del'>-		if (gc_ver == IP_VERSION(9, 4, 2) ||</div><div class='del'>-		    gc_ver == IP_VERSION(9, 4, 3))</div><div class='del'>-			*states = ATTR_STATE_UNSUPPORTED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (gc_ver) {</div><div class='del'>-	case IP_VERSION(9, 4, 1):</div><div class='del'>-	case IP_VERSION(9, 4, 2):</div><div class='del'>-		/* the Mi series card does not support standalone mclk/socclk/fclk level setting */</div><div class='del'>-		if (DEVICE_ATTR_IS(pp_dpm_mclk) ||</div><div class='del'>-		    DEVICE_ATTR_IS(pp_dpm_socclk) ||</div><div class='del'>-		    DEVICE_ATTR_IS(pp_dpm_fclk)) {</div><div class='del'>-			dev_attr-&gt;attr.mode &amp;= ~S_IWUGO;</div><div class='del'>-			dev_attr-&gt;store = NULL;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='ctx'> 	case IP_VERSION(10, 3, 0):</div><div class='ctx'> 		if (DEVICE_ATTR_IS(power_dpm_force_performance_level) &amp;&amp;</div><div class='ctx'> 		    amdgpu_sriov_vf(adev)) {</div><div class='hunk'>@@ -2332,14 +2417,6 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* setting should not be allowed from VF if not in one VF mode */</div><div class='del'>-	if (amdgpu_sriov_vf(adev) &amp;&amp; !amdgpu_sriov_is_pp_one_vf(adev)) {</div><div class='del'>-		dev_attr-&gt;attr.mode &amp;= ~S_IWUGO;</div><div class='del'>-		dev_attr-&gt;store = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#undef DEVICE_ATTR_IS</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4261,6 +4338,13 @@ static int amdgpu_od_set_init(struct amdgpu_device *adev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If gpu_od is the only member in the list, that means gpu_od is an</div><div class='add'>+	 * empty directory, so remove it.</div><div class='add'>+	 */</div><div class='add'>+	if (list_is_singular(&amp;adev-&gt;pm.od_kobj_list))</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='hunk'>@@ -4322,6 +4406,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)</div><div class='ctx'> 		ret = amdgpu_od_set_init(adev);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto err_out1;</div><div class='add'>+	} else if (adev-&gt;pm.pp_feature &amp; PP_OVERDRIVE_MASK) {</div><div class='add'>+		dev_info(adev-&gt;dev, "overdrive feature is not supported\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;pm.sysfs_initialized = true;</div><div class='hunk'>@@ -4429,6 +4515,9 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a</div><div class='ctx'> 	/* MEM Load */</div><div class='ctx'> 	if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&amp;value, &amp;size))</div><div class='ctx'> 		seq_printf(m, "MEM Load: %u %%\n", value);</div><div class='add'>+	/* VCN Load */</div><div class='add'>+	if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_LOAD, (void *)&amp;value, &amp;size))</div><div class='add'>+		seq_printf(m, "VCN Load: %u %%\n", value);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "\n");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h<br/>index 621200e0823f..501f8c726e8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h</a></div><div class='hunk'>@@ -50,8 +50,12 @@ enum amdgpu_runpm_mode {</div><div class='ctx'> 	AMDGPU_RUNPM_PX,</div><div class='ctx'> 	AMDGPU_RUNPM_BOCO,</div><div class='ctx'> 	AMDGPU_RUNPM_BACO,</div><div class='add'>+	AMDGPU_RUNPM_BAMACO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define BACO_SUPPORT (1&lt;&lt;0)</div><div class='add'>+#define MACO_SUPPORT (1&lt;&lt;1)</div><div class='add'>+</div><div class='ctx'> struct amdgpu_ps {</div><div class='ctx'> 	u32 caps; /* vbios flags */</div><div class='ctx'> 	u32 class; /* vbios flags */</div><div class='hunk'>@@ -407,7 +411,7 @@ int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_dpm_enable_gfx_features(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='del'>-bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev);</div><div class='add'>+int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='ctx'> bool amdgpu_dpm_is_mode1_reset_supported(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h<br/>index eec816f0cbf9..448ba3a14584 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h</a></div><div class='hunk'>@@ -43,8 +43,48 @@ enum amdgpu_device_attr_states {</div><div class='ctx'> 	ATTR_STATE_SUPPORTED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum amdgpu_device_attr_id {</div><div class='add'>+	device_attr_id__unknown = -1,</div><div class='add'>+	device_attr_id__power_dpm_state = 0,</div><div class='add'>+	device_attr_id__power_dpm_force_performance_level,</div><div class='add'>+	device_attr_id__pp_num_states,</div><div class='add'>+	device_attr_id__pp_cur_state,</div><div class='add'>+	device_attr_id__pp_force_state,</div><div class='add'>+	device_attr_id__pp_table,</div><div class='add'>+	device_attr_id__pp_dpm_sclk,</div><div class='add'>+	device_attr_id__pp_dpm_mclk,</div><div class='add'>+	device_attr_id__pp_dpm_socclk,</div><div class='add'>+	device_attr_id__pp_dpm_fclk,</div><div class='add'>+	device_attr_id__pp_dpm_vclk,</div><div class='add'>+	device_attr_id__pp_dpm_vclk1,</div><div class='add'>+	device_attr_id__pp_dpm_dclk,</div><div class='add'>+	device_attr_id__pp_dpm_dclk1,</div><div class='add'>+	device_attr_id__pp_dpm_dcefclk,</div><div class='add'>+	device_attr_id__pp_dpm_pcie,</div><div class='add'>+	device_attr_id__pp_sclk_od,</div><div class='add'>+	device_attr_id__pp_mclk_od,</div><div class='add'>+	device_attr_id__pp_power_profile_mode,</div><div class='add'>+	device_attr_id__pp_od_clk_voltage,</div><div class='add'>+	device_attr_id__gpu_busy_percent,</div><div class='add'>+	device_attr_id__mem_busy_percent,</div><div class='add'>+	device_attr_id__vcn_busy_percent,</div><div class='add'>+	device_attr_id__pcie_bw,</div><div class='add'>+	device_attr_id__pp_features,</div><div class='add'>+	device_attr_id__unique_id,</div><div class='add'>+	device_attr_id__thermal_throttling_logging,</div><div class='add'>+	device_attr_id__apu_thermal_cap,</div><div class='add'>+	device_attr_id__gpu_metrics,</div><div class='add'>+	device_attr_id__smartshift_apu_power,</div><div class='add'>+	device_attr_id__smartshift_dgpu_power,</div><div class='add'>+	device_attr_id__smartshift_bias,</div><div class='add'>+	device_attr_id__xgmi_plpd_policy,</div><div class='add'>+	device_attr_id__pm_metrics,</div><div class='add'>+	device_attr_id__count,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct amdgpu_device_attr {</div><div class='ctx'> 	struct device_attribute dev_attr;</div><div class='add'>+	enum amdgpu_device_attr_id attr_id;</div><div class='ctx'> 	enum amdgpu_device_attr_flags flags;</div><div class='ctx'> 	int (*attr_update)(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,</div><div class='ctx'> 			   uint32_t mask, enum amdgpu_device_attr_states *states);</div><div class='hunk'>@@ -61,6 +101,7 @@ struct amdgpu_device_attr_entry {</div><div class='ctx'> </div><div class='ctx'> #define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...)	\</div><div class='ctx'> 	{ .dev_attr = __ATTR(_name, _mode, _show, _store),		\</div><div class='add'>+	  .attr_id = device_attr_id__##_name,				\</div><div class='ctx'> 	  .flags = _flags,						\</div><div class='ctx'> 	  ##__VA_ARGS__, }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c<br/>index 5cb4725c773f..6bb42d04b247 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c</a></div><div class='hunk'>@@ -3316,6 +3316,8 @@ static const struct amd_ip_funcs kv_dpm_ip_funcs = {</div><div class='ctx'> 	.soft_reset = kv_dpm_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = kv_dpm_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = kv_dpm_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version kv_smu_ip_block = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c<br/>index eb4da3666e05..f245fc0bc6d3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c</a></div><div class='hunk'>@@ -8060,6 +8060,8 @@ static const struct amd_ip_funcs si_dpm_ip_funcs = {</div><div class='ctx'> 	.soft_reset = si_dpm_soft_reset,</div><div class='ctx'> 	.set_clockgating_state = si_dpm_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = si_dpm_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version si_smu_ip_block =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c<br/>index aed0e2cefbf9..5fb21a0508cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c</a></div><div class='hunk'>@@ -302,6 +302,8 @@ static const struct amd_ip_funcs pp_ip_funcs = {</div><div class='ctx'> 	.soft_reset = pp_sw_reset,</div><div class='ctx'> 	.set_clockgating_state = pp_set_clockgating_state,</div><div class='ctx'> 	.set_powergating_state = pp_set_powergating_state,</div><div class='add'>+	.dump_ip_state = NULL,</div><div class='add'>+	.print_ip_state = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_ip_block_version pp_smu_ip_block =</div><div class='hunk'>@@ -1371,7 +1373,7 @@ static int pp_set_active_display_count(void *handle, uint32_t count)</div><div class='ctx'> 	return phm_set_active_display_count(hwmgr, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool pp_get_asic_baco_capability(void *handle)</div><div class='add'>+static int pp_get_asic_baco_capability(void *handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct pp_hwmgr *hwmgr = handle;</div><div class='ctx'> </div><div class='hunk'>@@ -1379,10 +1381,10 @@ static bool pp_get_asic_baco_capability(void *handle)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (!(hwmgr-&gt;not_vf &amp;&amp; amdgpu_dpm) ||</div><div class='del'>-		!hwmgr-&gt;hwmgr_func-&gt;get_asic_baco_capability)</div><div class='add'>+		!hwmgr-&gt;hwmgr_func-&gt;get_bamaco_support)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return hwmgr-&gt;hwmgr_func-&gt;get_asic_baco_capability(hwmgr);</div><div class='add'>+	return hwmgr-&gt;hwmgr_func-&gt;get_bamaco_support(hwmgr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pp_get_asic_baco_state(void *handle, int *state)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c<br/>index e8a9471c1898..ad60918aaae1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> #include "smu/smu_7_1_2_d.h"</div><div class='ctx'> #include "smu/smu_7_1_2_sh_mask.h"</div><div class='ctx'> </div><div class='del'>-bool smu7_baco_get_capability(struct pp_hwmgr *hwmgr)</div><div class='add'>+int smu7_get_bamaco_support(struct pp_hwmgr *hwmgr)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr-&gt;adev);</div><div class='ctx'> 	uint32_t reg;</div><div class='hunk'>@@ -44,9 +44,9 @@ bool smu7_baco_get_capability(struct pp_hwmgr *hwmgr)</div><div class='ctx'> 	reg = RREG32(mmCC_BIF_BX_FUSESTRAP0);</div><div class='ctx'> </div><div class='ctx'> 	if (reg &amp; CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK)</div><div class='del'>-		return true;</div><div class='add'>+		return BACO_SUPPORT;</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h<br/>index 73a773f4ce2e..750082ea74d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include "hwmgr.h"</div><div class='ctx'> #include "common_baco.h"</div><div class='ctx'> </div><div class='del'>-extern bool smu7_baco_get_capability(struct pp_hwmgr *hwmgr);</div><div class='add'>+extern int smu7_get_bamaco_support(struct pp_hwmgr *hwmgr);</div><div class='ctx'> extern int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);</div><div class='ctx'> extern int smu7_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c<br/>index aa91730e4eaf..1fcd4451001f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c</a></div><div class='hunk'>@@ -5791,7 +5791,7 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {</div><div class='ctx'> 	.get_power_profile_mode = smu7_get_power_profile_mode,</div><div class='ctx'> 	.set_power_profile_mode = smu7_set_power_profile_mode,</div><div class='ctx'> 	.get_performance_level = smu7_get_performance_level,</div><div class='del'>-	.get_asic_baco_capability = smu7_baco_get_capability,</div><div class='add'>+	.get_bamaco_support = smu7_get_bamaco_support,</div><div class='ctx'> 	.get_asic_baco_state = smu7_baco_get_state,</div><div class='ctx'> 	.set_asic_baco_state = smu7_baco_set_state,</div><div class='ctx'> 	.power_off_asic = smu7_power_off_asic,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c<br/>index c66ef9741535..c1ce1d7cae48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c</a></div><div class='hunk'>@@ -28,13 +28,13 @@</div><div class='ctx'> #include "vega10_inc.h"</div><div class='ctx'> #include "smu9_baco.h"</div><div class='ctx'> </div><div class='del'>-bool smu9_baco_get_capability(struct pp_hwmgr *hwmgr)</div><div class='add'>+int smu9_get_bamaco_support(struct pp_hwmgr *hwmgr)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr-&gt;adev);</div><div class='ctx'> 	uint32_t reg, data;</div><div class='ctx'> </div><div class='ctx'> 	if (!phm_cap_enabled(hwmgr-&gt;platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	WREG32(0x12074, 0xFFF0003B);</div><div class='ctx'> 	data = RREG32(0x12075);</div><div class='hunk'>@@ -43,10 +43,10 @@ bool smu9_baco_get_capability(struct pp_hwmgr *hwmgr)</div><div class='ctx'> 		reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);</div><div class='ctx'> </div><div class='ctx'> 		if (reg &amp; RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)</div><div class='del'>-			return true;</div><div class='add'>+			return BACO_SUPPORT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int smu9_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h<br/>index 9ff7c2ea1b58..2c100482084c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include "hwmgr.h"</div><div class='ctx'> #include "common_baco.h"</div><div class='ctx'> </div><div class='del'>-extern bool smu9_baco_get_capability(struct pp_hwmgr *hwmgr);</div><div class='add'>+extern int smu9_get_bamaco_support(struct pp_hwmgr *hwmgr);</div><div class='ctx'> extern int smu9_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c<br/>index 6d6bc6a380b3..9f5bd998c6bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c</a></div><div class='hunk'>@@ -5756,7 +5756,7 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {</div><div class='ctx'> 	.set_power_limit = vega10_set_power_limit,</div><div class='ctx'> 	.odn_edit_dpm_table = vega10_odn_edit_dpm_table,</div><div class='ctx'> 	.get_performance_level = vega10_get_performance_level,</div><div class='del'>-	.get_asic_baco_capability = smu9_baco_get_capability,</div><div class='add'>+	.get_bamaco_support = smu9_get_bamaco_support,</div><div class='ctx'> 	.get_asic_baco_state = smu9_baco_get_state,</div><div class='ctx'> 	.set_asic_baco_state = vega10_baco_set_state,</div><div class='ctx'> 	.enable_mgpu_fan_boost = vega10_enable_mgpu_fan_boost,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c<br/>index 460067933de2..c223e3a6bfca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c</a></div><div class='hunk'>@@ -2966,7 +2966,7 @@ static const struct pp_hwmgr_func vega12_hwmgr_funcs = {</div><div class='ctx'> 	.start_thermal_controller = vega12_start_thermal_controller,</div><div class='ctx'> 	.powergate_gfx = vega12_gfx_off_control,</div><div class='ctx'> 	.get_performance_level = vega12_get_performance_level,</div><div class='del'>-	.get_asic_baco_capability = smu9_baco_get_capability,</div><div class='add'>+	.get_bamaco_support = smu9_get_bamaco_support,</div><div class='ctx'> 	.get_asic_baco_state = smu9_baco_get_state,</div><div class='ctx'> 	.set_asic_baco_state = vega12_baco_set_state,</div><div class='ctx'> 	.get_ppfeature_status = vega12_get_ppfeature_status,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c<br/>index dad4c80aee58..424e4ec9e389 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c</a></div><div class='hunk'>@@ -36,22 +36,22 @@ static const struct soc15_baco_cmd_entry clean_baco_tbl[] = {</div><div class='ctx'> 	{CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-bool vega20_baco_get_capability(struct pp_hwmgr *hwmgr)</div><div class='add'>+int vega20_get_bamaco_support(struct pp_hwmgr *hwmgr)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr-&gt;adev);</div><div class='ctx'> 	uint32_t reg;</div><div class='ctx'> </div><div class='ctx'> 	if (!phm_cap_enabled(hwmgr-&gt;platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (((RREG32(0x17569) &amp; 0x20000000) &gt;&gt; 29) == 0x1) {</div><div class='ctx'> 		reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);</div><div class='ctx'> </div><div class='ctx'> 		if (reg &amp; RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)</div><div class='del'>-			return true;</div><div class='add'>+			return BACO_SUPPORT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int vega20_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h<br/>index bdad9c915631..0f2dd8c008ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include "hwmgr.h"</div><div class='ctx'> #include "common_baco.h"</div><div class='ctx'> </div><div class='del'>-extern bool vega20_baco_get_capability(struct pp_hwmgr *hwmgr);</div><div class='add'>+extern int vega20_get_bamaco_support(struct pp_hwmgr *hwmgr);</div><div class='ctx'> extern int vega20_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);</div><div class='ctx'> extern int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);</div><div class='ctx'> extern int vega20_baco_apply_vdci_flush_workaround(struct pp_hwmgr *hwmgr);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c<br/>index 3b33af30eb0f..f9efb0bad807 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c</a></div><div class='hunk'>@@ -4422,7 +4422,7 @@ static const struct pp_hwmgr_func vega20_hwmgr_funcs = {</div><div class='ctx'> 	.notify_cac_buffer_info = vega20_notify_cac_buffer_info,</div><div class='ctx'> 	.enable_mgpu_fan_boost = vega20_enable_mgpu_fan_boost,</div><div class='ctx'> 	/* BACO related */</div><div class='del'>-	.get_asic_baco_capability = vega20_baco_get_capability,</div><div class='add'>+	.get_bamaco_support = vega20_get_bamaco_support,</div><div class='ctx'> 	.get_asic_baco_state = vega20_baco_get_state,</div><div class='ctx'> 	.set_asic_baco_state = vega20_baco_set_state,</div><div class='ctx'> 	.set_mp1_state = vega20_set_mp1_state,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h<br/>index 6f536159df4d..69928a4a074b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h</a></div><div class='hunk'>@@ -351,7 +351,7 @@ struct pp_hwmgr_func {</div><div class='ctx'> 	int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);</div><div class='ctx'> 	int (*set_hard_min_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);</div><div class='ctx'> 	int (*set_soft_max_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);</div><div class='del'>-	bool (*get_asic_baco_capability)(struct pp_hwmgr *hwmgr);</div><div class='add'>+	int (*get_bamaco_support)(struct pp_hwmgr *hwmgr);</div><div class='ctx'> 	int (*get_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);</div><div class='ctx'> 	int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state);</div><div class='ctx'> 	int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br/>index 65333141b1c1..7789b313285c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> #include "smu_v13_0_6_ppt.h"</div><div class='ctx'> #include "smu_v13_0_7_ppt.h"</div><div class='ctx'> #include "smu_v14_0_0_ppt.h"</div><div class='add'>+#include "smu_v14_0_2_ppt.h"</div><div class='ctx'> #include "amd_pcie.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -715,6 +716,10 @@ static int smu_set_funcs(struct amdgpu_device *adev)</div><div class='ctx'> 	case IP_VERSION(14, 0, 1):</div><div class='ctx'> 		smu_v14_0_0_set_ppt_funcs(smu);</div><div class='ctx'> 		break;</div><div class='add'>+	case IP_VERSION(14, 0, 2):</div><div class='add'>+	case IP_VERSION(14, 0, 3):</div><div class='add'>+		smu_v14_0_2_set_ppt_funcs(smu);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -737,6 +742,7 @@ static int smu_early_init(void *handle)</div><div class='ctx'> 	smu-&gt;is_apu = false;</div><div class='ctx'> 	smu-&gt;smu_baco.state = SMU_BACO_STATE_NONE;</div><div class='ctx'> 	smu-&gt;smu_baco.platform_support = false;</div><div class='add'>+	smu-&gt;smu_baco.maco_support = false;</div><div class='ctx'> 	smu-&gt;user_dpm_profile.fan_mode = -1;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;smu-&gt;message_lock);</div><div class='hunk'>@@ -3223,17 +3229,17 @@ static int smu_set_xgmi_pstate(void *handle,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool smu_get_baco_capability(void *handle)</div><div class='add'>+static int smu_get_baco_capability(void *handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct smu_context *smu = handle;</div><div class='ctx'> </div><div class='ctx'> 	if (!smu-&gt;pm_enabled)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!smu-&gt;ppt_funcs || !smu-&gt;ppt_funcs-&gt;baco_is_support)</div><div class='add'>+	if (!smu-&gt;ppt_funcs || !smu-&gt;ppt_funcs-&gt;get_bamaco_support)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return smu-&gt;ppt_funcs-&gt;baco_is_support(smu);</div><div class='add'>+	return smu-&gt;ppt_funcs-&gt;get_bamaco_support(smu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smu_baco_set_state(void *handle, int state)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br/>index 1fa81575788c..0917dec8efe3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h</a></div><div class='hunk'>@@ -459,7 +459,7 @@ struct smu_umd_pstate_table {</div><div class='ctx'> struct cmn2asic_msg_mapping {</div><div class='ctx'> 	int	valid_mapping;</div><div class='ctx'> 	int	map_to;</div><div class='del'>-	int	valid_in_vf;</div><div class='add'>+	uint32_t flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cmn2asic_mapping {</div><div class='hunk'>@@ -539,6 +539,7 @@ struct smu_context {</div><div class='ctx'> 	uint32_t smc_driver_if_version;</div><div class='ctx'> 	uint32_t smc_fw_if_version;</div><div class='ctx'> 	uint32_t smc_fw_version;</div><div class='add'>+	uint32_t smc_fw_caps;</div><div class='ctx'> </div><div class='ctx'> 	bool uploading_custom_pp_table;</div><div class='ctx'> 	bool dc_controlled_by_gpio;</div><div class='hunk'>@@ -1174,9 +1175,11 @@ struct pptable_funcs {</div><div class='ctx'> 	int (*get_max_sustainable_clocks_by_dc)(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks);</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='del'>-	 * @baco_is_support: Check if GPU supports BACO (Bus Active, Chip Off).</div><div class='add'>+	 * @get_bamaco_support: Check if GPU supports BACO/MACO</div><div class='add'>+	 * BACO: Bus Active, Chip Off</div><div class='add'>+	 * MACO: Memory Active, Chip Off</div><div class='ctx'> 	 */</div><div class='del'>-	bool (*baco_is_support)(struct smu_context *smu);</div><div class='add'>+	int (*get_bamaco_support)(struct smu_context *smu);</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='ctx'> 	 * @baco_get_state: Get the current BACO state.</div><div class='hunk'>@@ -1483,8 +1486,8 @@ enum smu_baco_seq {</div><div class='ctx'> 	BACO_SEQ_COUNT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MSG_MAP(msg, index, valid_in_vf) \</div><div class='del'>-	[SMU_MSG_##msg] = {1, (index), (valid_in_vf)}</div><div class='add'>+#define MSG_MAP(msg, index, flags) \</div><div class='add'>+	[SMU_MSG_##msg] = {1, (index), (flags)}</div><div class='ctx'> </div><div class='ctx'> #define CLK_MAP(clk, index) \</div><div class='ctx'> 	[SMU_##clk] = {1, (index)}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h<br/>new file mode 100644<br/>index 000000000000..97a29b80fb13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h</a></div><div class='hunk'>@@ -0,0 +1,1836 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef SMU14_DRIVER_IF_V14_0_H</div><div class='add'>+#define SMU14_DRIVER_IF_V14_0_H</div><div class='add'>+</div><div class='add'>+//Increment this version if SkuTable_t or BoardTable_t change</div><div class='add'>+#define PPTABLE_VERSION 0x18</div><div class='add'>+</div><div class='add'>+#define NUM_GFXCLK_DPM_LEVELS    16</div><div class='add'>+#define NUM_SOCCLK_DPM_LEVELS    8</div><div class='add'>+#define NUM_MP0CLK_DPM_LEVELS    2</div><div class='add'>+#define NUM_DCLK_DPM_LEVELS      8</div><div class='add'>+#define NUM_VCLK_DPM_LEVELS      8</div><div class='add'>+#define NUM_DISPCLK_DPM_LEVELS   8</div><div class='add'>+#define NUM_DPPCLK_DPM_LEVELS    8</div><div class='add'>+#define NUM_DPREFCLK_DPM_LEVELS  8</div><div class='add'>+#define NUM_DCFCLK_DPM_LEVELS    8</div><div class='add'>+#define NUM_DTBCLK_DPM_LEVELS    8</div><div class='add'>+#define NUM_UCLK_DPM_LEVELS      6</div><div class='add'>+#define NUM_LINK_LEVELS          3</div><div class='add'>+#define NUM_FCLK_DPM_LEVELS      8</div><div class='add'>+#define NUM_OD_FAN_MAX_POINTS    6</div><div class='add'>+</div><div class='add'>+// Feature Control Defines</div><div class='add'>+#define FEATURE_FW_DATA_READ_BIT              0</div><div class='add'>+#define FEATURE_DPM_GFXCLK_BIT                1</div><div class='add'>+#define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT   2</div><div class='add'>+#define FEATURE_DPM_UCLK_BIT                  3</div><div class='add'>+#define FEATURE_DPM_FCLK_BIT                  4</div><div class='add'>+#define FEATURE_DPM_SOCCLK_BIT                5</div><div class='add'>+#define FEATURE_DPM_LINK_BIT                  6</div><div class='add'>+#define FEATURE_DPM_DCN_BIT                   7</div><div class='add'>+#define FEATURE_VMEMP_SCALING_BIT             8</div><div class='add'>+#define FEATURE_VDDIO_MEM_SCALING_BIT         9</div><div class='add'>+#define FEATURE_DS_GFXCLK_BIT                 10</div><div class='add'>+#define FEATURE_DS_SOCCLK_BIT                 11</div><div class='add'>+#define FEATURE_DS_FCLK_BIT                   12</div><div class='add'>+#define FEATURE_DS_LCLK_BIT                   13</div><div class='add'>+#define FEATURE_DS_DCFCLK_BIT                 14</div><div class='add'>+#define FEATURE_DS_UCLK_BIT                   15</div><div class='add'>+#define FEATURE_GFX_ULV_BIT                   16</div><div class='add'>+#define FEATURE_FW_DSTATE_BIT                 17</div><div class='add'>+#define FEATURE_GFXOFF_BIT                    18</div><div class='add'>+#define FEATURE_BACO_BIT                      19</div><div class='add'>+#define FEATURE_MM_DPM_BIT                    20</div><div class='add'>+#define FEATURE_SOC_MPCLK_DS_BIT              21</div><div class='add'>+#define FEATURE_BACO_MPCLK_DS_BIT             22</div><div class='add'>+#define FEATURE_THROTTLERS_BIT                23</div><div class='add'>+#define FEATURE_SMARTSHIFT_BIT                24</div><div class='add'>+#define FEATURE_GTHR_BIT                      25</div><div class='add'>+#define FEATURE_ACDC_BIT                      26</div><div class='add'>+#define FEATURE_VR0HOT_BIT                    27</div><div class='add'>+#define FEATURE_FW_CTF_BIT                    28</div><div class='add'>+#define FEATURE_FAN_CONTROL_BIT               29</div><div class='add'>+#define FEATURE_GFX_DCS_BIT                   30</div><div class='add'>+#define FEATURE_GFX_READ_MARGIN_BIT           31</div><div class='add'>+#define FEATURE_LED_DISPLAY_BIT               32</div><div class='add'>+#define FEATURE_GFXCLK_SPREAD_SPECTRUM_BIT    33</div><div class='add'>+#define FEATURE_OUT_OF_BAND_MONITOR_BIT       34</div><div class='add'>+#define FEATURE_OPTIMIZED_VMIN_BIT            35</div><div class='add'>+#define FEATURE_GFX_IMU_BIT                   36</div><div class='add'>+#define FEATURE_BOOT_TIME_CAL_BIT             37</div><div class='add'>+#define FEATURE_GFX_PCC_DFLL_BIT              38</div><div class='add'>+#define FEATURE_SOC_CG_BIT                    39</div><div class='add'>+#define FEATURE_DF_CSTATE_BIT                 40</div><div class='add'>+#define FEATURE_GFX_EDC_BIT                   41</div><div class='add'>+#define FEATURE_BOOT_POWER_OPT_BIT            42</div><div class='add'>+#define FEATURE_CLOCK_POWER_DOWN_BYPASS_BIT   43</div><div class='add'>+#define FEATURE_DS_VCN_BIT                    44</div><div class='add'>+#define FEATURE_BACO_CG_BIT                   45</div><div class='add'>+#define FEATURE_MEM_TEMP_READ_BIT             46</div><div class='add'>+#define FEATURE_ATHUB_MMHUB_PG_BIT            47</div><div class='add'>+#define FEATURE_SOC_PCC_BIT                   48</div><div class='add'>+#define FEATURE_EDC_PWRBRK_BIT                49</div><div class='add'>+#define FEATURE_SOC_EDC_XVMIN_BIT             50</div><div class='add'>+#define FEATURE_GFX_PSM_DIDT_BIT              51</div><div class='add'>+#define FEATURE_APT_ALL_ENABLE_BIT            52</div><div class='add'>+#define FEATURE_APT_SQ_THROTTLE_BIT           53</div><div class='add'>+#define FEATURE_APT_PF_DCS_BIT                54</div><div class='add'>+#define FEATURE_GFX_EDC_XVMIN_BIT             55</div><div class='add'>+#define FEATURE_GFX_DIDT_XVMIN_BIT            56</div><div class='add'>+#define FEATURE_FAN_ABNORMAL_BIT              57</div><div class='add'>+#define FEATURE_CLOCK_STRETCH_COMPENSATOR     58</div><div class='add'>+#define FEATURE_SPARE_59_BIT                  59</div><div class='add'>+#define FEATURE_SPARE_60_BIT                  60</div><div class='add'>+#define FEATURE_SPARE_61_BIT                  61</div><div class='add'>+#define FEATURE_SPARE_62_BIT                  62</div><div class='add'>+#define FEATURE_SPARE_63_BIT                  63</div><div class='add'>+#define NUM_FEATURES                          64</div><div class='add'>+</div><div class='add'>+#define ALLOWED_FEATURE_CTRL_DEFAULT 0xFFFFFFFFFFFFFFFFULL</div><div class='add'>+#define ALLOWED_FEATURE_CTRL_SCPM        (1 &lt;&lt; FEATURE_DPM_GFXCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DPM_UCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DPM_FCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DPM_SOCCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DPM_LINK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DPM_DCN_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DS_GFXCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DS_SOCCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DS_FCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DS_LCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DS_DCFCLK_BIT) | \</div><div class='add'>+                                         (1 &lt;&lt; FEATURE_DS_UCLK_BIT) | \</div><div class='add'>+                                         (1ULL &lt;&lt; FEATURE_DS_VCN_BIT)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+//For use with feature control messages</div><div class='add'>+typedef enum {</div><div class='add'>+  FEATURE_PWR_ALL,</div><div class='add'>+  FEATURE_PWR_S5,</div><div class='add'>+  FEATURE_PWR_BACO,</div><div class='add'>+  FEATURE_PWR_SOC,</div><div class='add'>+  FEATURE_PWR_GFX,</div><div class='add'>+  FEATURE_PWR_DOMAIN_COUNT,</div><div class='add'>+} FEATURE_PWR_DOMAIN_e;</div><div class='add'>+</div><div class='add'>+//For use with feature control + BTC save restore</div><div class='add'>+typedef enum {</div><div class='add'>+  FEATURE_BTC_NOP,</div><div class='add'>+  FEATURE_BTC_SAVE,</div><div class='add'>+  FEATURE_BTC_RESTORE,</div><div class='add'>+  FEATURE_BTC_COUNT,</div><div class='add'>+} FEATURE_BTC_e;</div><div class='add'>+</div><div class='add'>+// Debug Overrides Bitmask</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_VOLT_LINK_VCN_FCLK      0x00000001</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_VOLT_LINK_DCN_FCLK      0x00000002</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_VOLT_LINK_MP0_FCLK      0x00000004</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_VOLT_LINK_VCN_DCFCLK    0x00000008</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_FAST_FCLK_TIMER         0x00000010</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_VCN_PG                  0x00000020</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_FMAX_VMAX               0x00000040</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_IMU_FW_CHECKS           0x00000080</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_D0i2_REENTRY_HSR_TIMER_CHECK 0x00000100</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_DFLL                    0x00000200</div><div class='add'>+#define DEBUG_OVERRIDE_ENABLE_RLC_VF_BRINGUP_MODE      0x00000400</div><div class='add'>+#define DEBUG_OVERRIDE_DFLL_MASTER_MODE                0x00000800</div><div class='add'>+#define DEBUG_OVERRIDE_ENABLE_PROFILING_MODE           0x00001000</div><div class='add'>+#define DEBUG_OVERRIDE_ENABLE_SOC_VF_BRINGUP_MODE      0x00002000</div><div class='add'>+#define DEBUG_OVERRIDE_ENABLE_PER_WGP_RESIENCY         0x00004000</div><div class='add'>+#define DEBUG_OVERRIDE_DISABLE_MEMORY_VOLTAGE_SCALING  0x00008000</div><div class='add'>+</div><div class='add'>+// VR Mapping Bit Defines</div><div class='add'>+#define VR_MAPPING_VR_SELECT_MASK  0x01</div><div class='add'>+#define VR_MAPPING_VR_SELECT_SHIFT 0x00</div><div class='add'>+</div><div class='add'>+#define VR_MAPPING_PLANE_SELECT_MASK  0x02</div><div class='add'>+#define VR_MAPPING_PLANE_SELECT_SHIFT 0x01</div><div class='add'>+</div><div class='add'>+// PSI Bit Defines</div><div class='add'>+#define PSI_SEL_VR0_PLANE0_PSI0  0x01</div><div class='add'>+#define PSI_SEL_VR0_PLANE0_PSI1  0x02</div><div class='add'>+#define PSI_SEL_VR0_PLANE1_PSI0  0x04</div><div class='add'>+#define PSI_SEL_VR0_PLANE1_PSI1  0x08</div><div class='add'>+#define PSI_SEL_VR1_PLANE0_PSI0  0x10</div><div class='add'>+#define PSI_SEL_VR1_PLANE0_PSI1  0x20</div><div class='add'>+#define PSI_SEL_VR1_PLANE1_PSI0  0x40</div><div class='add'>+#define PSI_SEL_VR1_PLANE1_PSI1  0x80</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  SVI_PSI_0, // Full phase count (default)</div><div class='add'>+  SVI_PSI_1, // Phase count 1st level</div><div class='add'>+  SVI_PSI_2, // Phase count 2nd level</div><div class='add'>+  SVI_PSI_3, // Single phase operation + active diode emulation</div><div class='add'>+  SVI_PSI_4, // Single phase operation + passive diode emulation *optional*</div><div class='add'>+  SVI_PSI_5, // Reserved</div><div class='add'>+  SVI_PSI_6, // Power down to 0V (voltage regulation disabled)</div><div class='add'>+  SVI_PSI_7, // Automated phase shedding and diode emulation</div><div class='add'>+} SVI_PSI_e;</div><div class='add'>+</div><div class='add'>+// Throttler Control/Status Bits</div><div class='add'>+#define THROTTLER_TEMP_EDGE_BIT        0</div><div class='add'>+#define THROTTLER_TEMP_HOTSPOT_BIT     1</div><div class='add'>+#define THROTTLER_TEMP_HOTSPOT_GFX_BIT 2</div><div class='add'>+#define THROTTLER_TEMP_HOTSPOT_SOC_BIT 3</div><div class='add'>+#define THROTTLER_TEMP_MEM_BIT         4</div><div class='add'>+#define THROTTLER_TEMP_VR_GFX_BIT      5</div><div class='add'>+#define THROTTLER_TEMP_VR_SOC_BIT      6</div><div class='add'>+#define THROTTLER_TEMP_VR_MEM0_BIT     7</div><div class='add'>+#define THROTTLER_TEMP_VR_MEM1_BIT     8</div><div class='add'>+#define THROTTLER_TEMP_LIQUID0_BIT     9</div><div class='add'>+#define THROTTLER_TEMP_LIQUID1_BIT     10</div><div class='add'>+#define THROTTLER_TEMP_PLX_BIT         11</div><div class='add'>+#define THROTTLER_TDC_GFX_BIT          12</div><div class='add'>+#define THROTTLER_TDC_SOC_BIT          13</div><div class='add'>+#define THROTTLER_PPT0_BIT             14</div><div class='add'>+#define THROTTLER_PPT1_BIT             15</div><div class='add'>+#define THROTTLER_PPT2_BIT             16</div><div class='add'>+#define THROTTLER_PPT3_BIT             17</div><div class='add'>+#define THROTTLER_FIT_BIT              18</div><div class='add'>+#define THROTTLER_GFX_APCC_PLUS_BIT    19</div><div class='add'>+#define THROTTLER_GFX_DVO_BIT          20</div><div class='add'>+#define THROTTLER_COUNT                21</div><div class='add'>+</div><div class='add'>+// FW DState Features Control Bits</div><div class='add'>+#define FW_DSTATE_SOC_ULV_BIT               0</div><div class='add'>+#define FW_DSTATE_G6_HSR_BIT                1</div><div class='add'>+#define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT      2</div><div class='add'>+#define FW_DSTATE_SMN_DS_BIT                3</div><div class='add'>+#define FW_DSTATE_MP1_WHISPER_MODE_BIT      4</div><div class='add'>+#define FW_DSTATE_SOC_LIV_MIN_BIT           5</div><div class='add'>+#define FW_DSTATE_SOC_PLL_PWRDN_BIT         6</div><div class='add'>+#define FW_DSTATE_MEM_PLL_PWRDN_BIT         7</div><div class='add'>+#define FW_DSTATE_MALL_ALLOC_BIT            8</div><div class='add'>+#define FW_DSTATE_MEM_PSI_BIT               9</div><div class='add'>+#define FW_DSTATE_HSR_NON_STROBE_BIT        10</div><div class='add'>+#define FW_DSTATE_MP0_ENTER_WFI_BIT         11</div><div class='add'>+#define FW_DSTATE_MALL_FLUSH_BIT            12</div><div class='add'>+#define FW_DSTATE_SOC_PSI_BIT               13</div><div class='add'>+#define FW_DSTATE_MMHUB_INTERLOCK_BIT       14</div><div class='add'>+#define FW_DSTATE_D0i3_2_QUIET_FW_BIT       15</div><div class='add'>+#define FW_DSTATE_CLDO_PRG_BIT              16</div><div class='add'>+#define FW_DSTATE_DF_PLL_PWRDN_BIT          17</div><div class='add'>+</div><div class='add'>+//LED Display Mask &amp; Control Bits</div><div class='add'>+#define LED_DISPLAY_GFX_DPM_BIT            0</div><div class='add'>+#define LED_DISPLAY_PCIE_BIT               1</div><div class='add'>+#define LED_DISPLAY_ERROR_BIT              2</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define MEM_TEMP_READ_OUT_OF_BAND_BIT          0</div><div class='add'>+#define MEM_TEMP_READ_IN_BAND_REFRESH_BIT      1</div><div class='add'>+#define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  SMARTSHIFT_VERSION_1,</div><div class='add'>+  SMARTSHIFT_VERSION_2,</div><div class='add'>+  SMARTSHIFT_VERSION_3,</div><div class='add'>+} SMARTSHIFT_VERSION_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  FOPT_CALC_AC_CALC_DC,</div><div class='add'>+  FOPT_PPTABLE_AC_CALC_DC,</div><div class='add'>+  FOPT_CALC_AC_PPTABLE_DC,</div><div class='add'>+  FOPT_PPTABLE_AC_PPTABLE_DC,</div><div class='add'>+} FOPT_CALC_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  DRAM_BIT_WIDTH_DISABLED = 0,</div><div class='add'>+  DRAM_BIT_WIDTH_X_8 = 8,</div><div class='add'>+  DRAM_BIT_WIDTH_X_16 = 16,</div><div class='add'>+  DRAM_BIT_WIDTH_X_32 = 32,</div><div class='add'>+  DRAM_BIT_WIDTH_X_64 = 64,</div><div class='add'>+  DRAM_BIT_WIDTH_X_128 = 128,</div><div class='add'>+  DRAM_BIT_WIDTH_COUNT,</div><div class='add'>+} DRAM_BIT_WIDTH_TYPE_e;</div><div class='add'>+</div><div class='add'>+//I2C Interface</div><div class='add'>+#define NUM_I2C_CONTROLLERS                8</div><div class='add'>+</div><div class='add'>+#define I2C_CONTROLLER_ENABLED             1</div><div class='add'>+#define I2C_CONTROLLER_DISABLED            0</div><div class='add'>+</div><div class='add'>+#define MAX_SW_I2C_COMMANDS                24</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_CONTROLLER_PORT_0 = 0,  //CKSVII2C0</div><div class='add'>+  I2C_CONTROLLER_PORT_1 = 1,  //CKSVII2C1</div><div class='add'>+  I2C_CONTROLLER_PORT_COUNT,</div><div class='add'>+} I2cControllerPort_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_CONTROLLER_NAME_VR_GFX = 0,</div><div class='add'>+  I2C_CONTROLLER_NAME_VR_SOC,</div><div class='add'>+  I2C_CONTROLLER_NAME_VR_VMEMP,</div><div class='add'>+  I2C_CONTROLLER_NAME_VR_VDDIO,</div><div class='add'>+  I2C_CONTROLLER_NAME_LIQUID0,</div><div class='add'>+  I2C_CONTROLLER_NAME_LIQUID1,</div><div class='add'>+  I2C_CONTROLLER_NAME_PLX,</div><div class='add'>+  I2C_CONTROLLER_NAME_FAN_INTAKE,</div><div class='add'>+  I2C_CONTROLLER_NAME_COUNT,</div><div class='add'>+} I2cControllerName_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_TYPE_NONE = 0,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_VR_GFX,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_VR_SOC,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_VR_VMEMP,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_VR_VDDIO,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_LIQUID0,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_LIQUID1,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_PLX,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_FAN_INTAKE,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_INA3221,</div><div class='add'>+  I2C_CONTROLLER_THROTTLER_COUNT,</div><div class='add'>+} I2cControllerThrottler_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_CONTROLLER_PROTOCOL_VR_XPDE132G5,</div><div class='add'>+  I2C_CONTROLLER_PROTOCOL_VR_IR35217,</div><div class='add'>+  I2C_CONTROLLER_PROTOCOL_TMP_MAX31875,</div><div class='add'>+  I2C_CONTROLLER_PROTOCOL_INA3221,</div><div class='add'>+  I2C_CONTROLLER_PROTOCOL_TMP_MAX6604,</div><div class='add'>+  I2C_CONTROLLER_PROTOCOL_COUNT,</div><div class='add'>+} I2cControllerProtocol_e;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t   Enabled;</div><div class='add'>+  uint8_t   Speed;</div><div class='add'>+  uint8_t   SlaveAddress;</div><div class='add'>+  uint8_t   ControllerPort;</div><div class='add'>+  uint8_t   ControllerName;</div><div class='add'>+  uint8_t   ThermalThrotter;</div><div class='add'>+  uint8_t   I2cProtocol;</div><div class='add'>+  uint8_t   PaddingConfig;</div><div class='add'>+} I2cControllerConfig_t;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_PORT_SVD_SCL = 0,</div><div class='add'>+  I2C_PORT_GPIO,</div><div class='add'>+} I2cPort_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_SPEED_FAST_50K = 0,      //50  Kbits/s</div><div class='add'>+  I2C_SPEED_FAST_100K,         //100 Kbits/s</div><div class='add'>+  I2C_SPEED_FAST_400K,         //400 Kbits/s</div><div class='add'>+  I2C_SPEED_FAST_PLUS_1M,      //1   Mbits/s (in fast mode)</div><div class='add'>+  I2C_SPEED_HIGH_1M,           //1   Mbits/s (in high speed mode)</div><div class='add'>+  I2C_SPEED_HIGH_2M,           //2.3 Mbits/s</div><div class='add'>+  I2C_SPEED_COUNT,</div><div class='add'>+} I2cSpeed_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  I2C_CMD_READ = 0,</div><div class='add'>+  I2C_CMD_WRITE,</div><div class='add'>+  I2C_CMD_COUNT,</div><div class='add'>+} I2cCmdType_e;</div><div class='add'>+</div><div class='add'>+#define CMDCONFIG_STOP_BIT             0</div><div class='add'>+#define CMDCONFIG_RESTART_BIT          1</div><div class='add'>+#define CMDCONFIG_READWRITE_BIT        2 //bit should be 0 for read, 1 for write</div><div class='add'>+</div><div class='add'>+#define CMDCONFIG_STOP_MASK           (1 &lt;&lt; CMDCONFIG_STOP_BIT)</div><div class='add'>+#define CMDCONFIG_RESTART_MASK        (1 &lt;&lt; CMDCONFIG_RESTART_BIT)</div><div class='add'>+#define CMDCONFIG_READWRITE_MASK      (1 &lt;&lt; CMDCONFIG_READWRITE_BIT)</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t ReadWriteData;  //Return data for read. Data to send for write</div><div class='add'>+  uint8_t CmdConfig; //Includes whether associated command should have a stop or restart command, and is a read or write</div><div class='add'>+} SwI2cCmd_t; //SW I2C Command Table</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t     I2CcontrollerPort; //CKSVII2C0(0) or //CKSVII2C1(1)</div><div class='add'>+  uint8_t     I2CSpeed;          //Use I2cSpeed_e to indicate speed to select</div><div class='add'>+  uint8_t     SlaveAddress;      //Slave address of device</div><div class='add'>+  uint8_t     NumCmds;           //Number of commands</div><div class='add'>+</div><div class='add'>+  SwI2cCmd_t  SwI2cCmds[MAX_SW_I2C_COMMANDS];</div><div class='add'>+} SwI2cRequest_t; // SW I2C Request Table</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  SwI2cRequest_t SwI2cRequest;</div><div class='add'>+</div><div class='add'>+  uint32_t Spare[8];</div><div class='add'>+  uint32_t MmHubPadding[8]; // SMU internal use</div><div class='add'>+} SwI2cRequestExternal_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint64_t mca_umc_status;</div><div class='add'>+  uint64_t mca_umc_addr;</div><div class='add'>+</div><div class='add'>+  uint16_t ce_count_lo_chip;</div><div class='add'>+  uint16_t ce_count_hi_chip;</div><div class='add'>+</div><div class='add'>+  uint32_t eccPadding;</div><div class='add'>+} EccInfo_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  EccInfo_t  EccInfo[24];</div><div class='add'>+} EccInfoTable_t;</div><div class='add'>+</div><div class='add'>+//D3HOT sequences</div><div class='add'>+typedef enum {</div><div class='add'>+  BACO_SEQUENCE,</div><div class='add'>+  MSR_SEQUENCE,</div><div class='add'>+  BAMACO_SEQUENCE,</div><div class='add'>+  ULPS_SEQUENCE,</div><div class='add'>+  D3HOT_SEQUENCE_COUNT,</div><div class='add'>+} D3HOTSequence_e;</div><div class='add'>+</div><div class='add'>+//This is aligned with RSMU PGFSM Register Mapping</div><div class='add'>+typedef enum {</div><div class='add'>+  PG_DYNAMIC_MODE = 0,</div><div class='add'>+  PG_STATIC_MODE,</div><div class='add'>+} PowerGatingMode_e;</div><div class='add'>+</div><div class='add'>+//This is aligned with RSMU PGFSM Register Mapping</div><div class='add'>+typedef enum {</div><div class='add'>+  PG_POWER_DOWN = 0,</div><div class='add'>+  PG_POWER_UP,</div><div class='add'>+} PowerGatingSettings_e;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint32_t a;  // store in IEEE float format in this variable</div><div class='add'>+  uint32_t b;  // store in IEEE float format in this variable</div><div class='add'>+  uint32_t c;  // store in IEEE float format in this variable</div><div class='add'>+} QuadraticInt_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint32_t m;  // store in IEEE float format in this variable</div><div class='add'>+  uint32_t b;  // store in IEEE float format in this variable</div><div class='add'>+} LinearInt_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint32_t a;  // store in IEEE float format in this variable</div><div class='add'>+  uint32_t b;  // store in IEEE float format in this variable</div><div class='add'>+  uint32_t c;  // store in IEEE float format in this variable</div><div class='add'>+} DroopInt_t;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  DCS_ARCH_DISABLED,</div><div class='add'>+  DCS_ARCH_FADCS,</div><div class='add'>+  DCS_ARCH_ASYNC,</div><div class='add'>+} DCS_ARCH_e;</div><div class='add'>+</div><div class='add'>+//Only Clks that have DPM descriptors are listed here</div><div class='add'>+typedef enum {</div><div class='add'>+  PPCLK_GFXCLK = 0,</div><div class='add'>+  PPCLK_SOCCLK,</div><div class='add'>+  PPCLK_UCLK,</div><div class='add'>+  PPCLK_FCLK,</div><div class='add'>+  PPCLK_DCLK_0,</div><div class='add'>+  PPCLK_VCLK_0,</div><div class='add'>+  PPCLK_DISPCLK,</div><div class='add'>+  PPCLK_DPPCLK,</div><div class='add'>+  PPCLK_DPREFCLK,</div><div class='add'>+  PPCLK_DCFCLK,</div><div class='add'>+  PPCLK_DTBCLK,</div><div class='add'>+  PPCLK_COUNT,</div><div class='add'>+} PPCLK_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  VOLTAGE_MODE_PPTABLE = 0,</div><div class='add'>+  VOLTAGE_MODE_FUSES,</div><div class='add'>+  VOLTAGE_MODE_COUNT,</div><div class='add'>+} VOLTAGE_MODE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  AVFS_VOLTAGE_GFX = 0,</div><div class='add'>+  AVFS_VOLTAGE_SOC,</div><div class='add'>+  AVFS_VOLTAGE_COUNT,</div><div class='add'>+} AVFS_VOLTAGE_TYPE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  AVFS_TEMP_COLD = 0,</div><div class='add'>+  AVFS_TEMP_HOT,</div><div class='add'>+  AVFS_TEMP_COUNT,</div><div class='add'>+} AVFS_TEMP_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  AVFS_D_G,</div><div class='add'>+  AVFS_D_COUNT,</div><div class='add'>+} AVFS_D_e;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  UCLK_DIV_BY_1 = 0,</div><div class='add'>+  UCLK_DIV_BY_2,</div><div class='add'>+  UCLK_DIV_BY_4,</div><div class='add'>+  UCLK_DIV_BY_8,</div><div class='add'>+} UCLK_DIV_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  GPIO_INT_POLARITY_ACTIVE_LOW = 0,</div><div class='add'>+  GPIO_INT_POLARITY_ACTIVE_HIGH,</div><div class='add'>+} GpioIntPolarity_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  PWR_CONFIG_TDP = 0,</div><div class='add'>+  PWR_CONFIG_TGP,</div><div class='add'>+  PWR_CONFIG_TCP_ESTIMATED,</div><div class='add'>+  PWR_CONFIG_TCP_MEASURED,</div><div class='add'>+  PWR_CONFIG_TBP_DESKTOP,</div><div class='add'>+  PWR_CONFIG_TBP_MOBILE,</div><div class='add'>+} PwrConfig_e;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t        Padding;</div><div class='add'>+  uint8_t        SnapToDiscrete;      // 0 - Fine grained DPM, 1 - Discrete DPM</div><div class='add'>+  uint8_t        NumDiscreteLevels;   // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwise set to # discrete levels used</div><div class='add'>+  uint8_t        CalculateFopt;       // Indication whether FW should calculate Fopt or use values below. Reference FOPT_CALC_e</div><div class='add'>+  LinearInt_t    ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz-&gt;GHz)</div><div class='add'>+  uint32_t       Padding3[3];</div><div class='add'>+  uint16_t       Padding4;</div><div class='add'>+  uint16_t       FoptimalDc;          //Foptimal frequency in DC power mode.</div><div class='add'>+  uint16_t       FoptimalAc;          //Foptimal frequency in AC power mode.</div><div class='add'>+  uint16_t       Padding2;</div><div class='add'>+} DpmDescriptor_t;</div><div class='add'>+</div><div class='add'>+typedef enum  {</div><div class='add'>+  PPT_THROTTLER_PPT0,</div><div class='add'>+  PPT_THROTTLER_PPT1,</div><div class='add'>+  PPT_THROTTLER_PPT2,</div><div class='add'>+  PPT_THROTTLER_PPT3,</div><div class='add'>+  PPT_THROTTLER_COUNT</div><div class='add'>+} PPT_THROTTLER_e;</div><div class='add'>+</div><div class='add'>+typedef enum  {</div><div class='add'>+  TEMP_EDGE,</div><div class='add'>+  TEMP_HOTSPOT,</div><div class='add'>+  TEMP_HOTSPOT_GFX,</div><div class='add'>+  TEMP_HOTSPOT_SOC,</div><div class='add'>+  TEMP_MEM,</div><div class='add'>+  TEMP_VR_GFX,</div><div class='add'>+  TEMP_VR_SOC,</div><div class='add'>+  TEMP_VR_MEM0,</div><div class='add'>+  TEMP_VR_MEM1,</div><div class='add'>+  TEMP_LIQUID0,</div><div class='add'>+  TEMP_LIQUID1,</div><div class='add'>+  TEMP_PLX,</div><div class='add'>+  TEMP_COUNT,</div><div class='add'>+} TEMP_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  TDC_THROTTLER_GFX,</div><div class='add'>+  TDC_THROTTLER_SOC,</div><div class='add'>+  TDC_THROTTLER_COUNT</div><div class='add'>+} TDC_THROTTLER_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  SVI_PLANE_VDD_GFX,</div><div class='add'>+  SVI_PLANE_VDD_SOC,</div><div class='add'>+  SVI_PLANE_VDDCI_MEM,</div><div class='add'>+  SVI_PLANE_VDDIO_MEM,</div><div class='add'>+  SVI_PLANE_COUNT,</div><div class='add'>+} SVI_PLANE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  PMFW_VOLT_PLANE_GFX,</div><div class='add'>+  PMFW_VOLT_PLANE_SOC,</div><div class='add'>+  PMFW_VOLT_PLANE_COUNT</div><div class='add'>+} PMFW_VOLT_PLANE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  CUSTOMER_VARIANT_ROW,</div><div class='add'>+  CUSTOMER_VARIANT_FALCON,</div><div class='add'>+  CUSTOMER_VARIANT_COUNT,</div><div class='add'>+} CUSTOMER_VARIANT_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  POWER_SOURCE_AC,</div><div class='add'>+  POWER_SOURCE_DC,</div><div class='add'>+  POWER_SOURCE_COUNT,</div><div class='add'>+} POWER_SOURCE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  MEM_VENDOR_PLACEHOLDER0,  // 0</div><div class='add'>+  MEM_VENDOR_SAMSUNG,       // 1</div><div class='add'>+  MEM_VENDOR_INFINEON,      // 2</div><div class='add'>+  MEM_VENDOR_ELPIDA,        // 3</div><div class='add'>+  MEM_VENDOR_ETRON,         // 4</div><div class='add'>+  MEM_VENDOR_NANYA,         // 5</div><div class='add'>+  MEM_VENDOR_HYNIX,         // 6</div><div class='add'>+  MEM_VENDOR_MOSEL,         // 7</div><div class='add'>+  MEM_VENDOR_WINBOND,       // 8</div><div class='add'>+  MEM_VENDOR_ESMT,          // 9</div><div class='add'>+  MEM_VENDOR_PLACEHOLDER1,  // 10</div><div class='add'>+  MEM_VENDOR_PLACEHOLDER2,  // 11</div><div class='add'>+  MEM_VENDOR_PLACEHOLDER3,  // 12</div><div class='add'>+  MEM_VENDOR_PLACEHOLDER4,  // 13</div><div class='add'>+  MEM_VENDOR_PLACEHOLDER5,  // 14</div><div class='add'>+  MEM_VENDOR_MICRON,        // 15</div><div class='add'>+  MEM_VENDOR_COUNT,</div><div class='add'>+} MEM_VENDOR_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  PP_GRTAVFS_HW_CPO_CTL_ZONE0,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_CTL_ZONE1,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_CTL_ZONE2,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_CTL_ZONE3,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_CTL_ZONE4,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_0_31_ZONE0,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_32_63_ZONE0,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_0_31_ZONE1,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_32_63_ZONE1,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_0_31_ZONE2,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_32_63_ZONE2,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_0_31_ZONE3,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_32_63_ZONE3,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_0_31_ZONE4,</div><div class='add'>+  PP_GRTAVFS_HW_CPO_EN_32_63_ZONE4,</div><div class='add'>+  PP_GRTAVFS_HW_ZONE0_VF,</div><div class='add'>+  PP_GRTAVFS_HW_ZONE1_VF1,</div><div class='add'>+  PP_GRTAVFS_HW_ZONE2_VF2,</div><div class='add'>+  PP_GRTAVFS_HW_ZONE3_VF3,</div><div class='add'>+  PP_GRTAVFS_HW_VOLTAGE_GB,</div><div class='add'>+  PP_GRTAVFS_HW_CPOSCALINGCTRL_ZONE0,</div><div class='add'>+  PP_GRTAVFS_HW_CPOSCALINGCTRL_ZONE1,</div><div class='add'>+  PP_GRTAVFS_HW_CPOSCALINGCTRL_ZONE2,</div><div class='add'>+  PP_GRTAVFS_HW_CPOSCALINGCTRL_ZONE3,</div><div class='add'>+  PP_GRTAVFS_HW_CPOSCALINGCTRL_ZONE4,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_0,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_1,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_2,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_3,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_4,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_5,</div><div class='add'>+  PP_GRTAVFS_HW_RESERVED_6,</div><div class='add'>+  PP_GRTAVFS_HW_FUSE_COUNT,</div><div class='add'>+} PP_GRTAVFS_HW_FUSE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z1_HOT_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z1_COLD_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z2_HOT_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z2_COLD_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z3_HOT_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z3_COLD_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z4_HOT_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_PPVMIN_Z4_COLD_T0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_SRAM_RM_Z0,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_SRAM_RM_Z1,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_SRAM_RM_Z2,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_SRAM_RM_Z3,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_SRAM_RM_Z4,</div><div class='add'>+  PP_GRTAVFS_FW_COMMON_FUSE_COUNT,</div><div class='add'>+} PP_GRTAVFS_FW_COMMON_FUSE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB1_PWL_VOLTAGE_NEG_1,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB1_PWL_VOLTAGE_0,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB1_PWL_VOLTAGE_1,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB1_PWL_VOLTAGE_2,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB1_PWL_VOLTAGE_3,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB1_PWL_VOLTAGE_4,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB2_PWL_VOLTAGE_NEG_1,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB2_PWL_VOLTAGE_0,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB2_PWL_VOLTAGE_1,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB2_PWL_VOLTAGE_2,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB2_PWL_VOLTAGE_3,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_GB2_PWL_VOLTAGE_4,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_VF_NEG_1_FREQUENCY,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_VF4_FREQUENCY,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_0,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_1,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_2,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_3,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_4,</div><div class='add'>+  PP_GRTAVFS_FW_SEP_FUSE_COUNT,</div><div class='add'>+} PP_GRTAVFS_FW_SEP_FUSE_e;</div><div class='add'>+</div><div class='add'>+#define PP_NUM_RTAVFS_PWL_ZONES 5</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// VBIOS or PPLIB configures telemetry slope and offset. Only slope expected to be set for SVI3</div><div class='add'>+// Slope Q1.7, Offset Q1.2</div><div class='add'>+typedef struct {</div><div class='add'>+  int8_t   Offset; // in Amps</div><div class='add'>+  uint8_t  Padding;</div><div class='add'>+  uint16_t MaxCurrent; // in Amps</div><div class='add'>+} SviTelemetryScale_t;</div><div class='add'>+</div><div class='add'>+#define PP_NUM_OD_VF_CURVE_POINTS PP_NUM_RTAVFS_PWL_ZONES + 1</div><div class='add'>+</div><div class='add'>+#define PP_OD_FEATURE_GFX_VF_CURVE_BIT       0</div><div class='add'>+#define PP_OD_FEATURE_GFX_VMAX_BIT           1</div><div class='add'>+#define PP_OD_FEATURE_SOC_VMAX_BIT           2</div><div class='add'>+#define PP_OD_FEATURE_PPT_BIT                3</div><div class='add'>+#define PP_OD_FEATURE_FAN_CURVE_BIT          4</div><div class='add'>+#define PP_OD_FEATURE_FAN_LEGACY_BIT         5</div><div class='add'>+#define PP_OD_FEATURE_FULL_CTRL_BIT          6</div><div class='add'>+#define PP_OD_FEATURE_TDC_BIT                7</div><div class='add'>+#define PP_OD_FEATURE_GFXCLK_BIT             8</div><div class='add'>+#define PP_OD_FEATURE_UCLK_BIT               9</div><div class='add'>+#define PP_OD_FEATURE_FCLK_BIT               10</div><div class='add'>+#define PP_OD_FEATURE_ZERO_FAN_BIT           11</div><div class='add'>+#define PP_OD_FEATURE_TEMPERATURE_BIT        12</div><div class='add'>+#define PP_OD_FEATURE_EDC_BIT                13</div><div class='add'>+#define PP_OD_FEATURE_COUNT                  14</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  PP_OD_POWER_FEATURE_ALWAYS_ENABLED,</div><div class='add'>+  PP_OD_POWER_FEATURE_DISABLED_WHILE_GAMING,</div><div class='add'>+  PP_OD_POWER_FEATURE_ALWAYS_DISABLED,</div><div class='add'>+} PP_OD_POWER_FEATURE_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  FAN_MODE_AUTO = 0,</div><div class='add'>+  FAN_MODE_MANUAL_LINEAR,</div><div class='add'>+} FanMode_e;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  OD_NO_ERROR,</div><div class='add'>+  OD_REQUEST_ADVANCED_NOT_SUPPORTED,</div><div class='add'>+  OD_UNSUPPORTED_FEATURE,</div><div class='add'>+  OD_INVALID_FEATURE_COMBO_ERROR,</div><div class='add'>+  OD_GFXCLK_VF_CURVE_OFFSET_ERROR,</div><div class='add'>+  OD_VDD_GFX_VMAX_ERROR,</div><div class='add'>+  OD_VDD_SOC_VMAX_ERROR,</div><div class='add'>+  OD_PPT_ERROR,</div><div class='add'>+  OD_FAN_MIN_PWM_ERROR,</div><div class='add'>+  OD_FAN_ACOUSTIC_TARGET_ERROR,</div><div class='add'>+  OD_FAN_ACOUSTIC_LIMIT_ERROR,</div><div class='add'>+  OD_FAN_TARGET_TEMP_ERROR,</div><div class='add'>+  OD_FAN_ZERO_RPM_STOP_TEMP_ERROR,</div><div class='add'>+  OD_FAN_CURVE_PWM_ERROR,</div><div class='add'>+  OD_FAN_CURVE_TEMP_ERROR,</div><div class='add'>+  OD_FULL_CTRL_GFXCLK_ERROR,</div><div class='add'>+  OD_FULL_CTRL_UCLK_ERROR,</div><div class='add'>+  OD_FULL_CTRL_FCLK_ERROR,</div><div class='add'>+  OD_FULL_CTRL_VDD_GFX_ERROR,</div><div class='add'>+  OD_FULL_CTRL_VDD_SOC_ERROR,</div><div class='add'>+  OD_TDC_ERROR,</div><div class='add'>+  OD_GFXCLK_ERROR,</div><div class='add'>+  OD_UCLK_ERROR,</div><div class='add'>+  OD_FCLK_ERROR,</div><div class='add'>+  OD_OP_TEMP_ERROR,</div><div class='add'>+  OD_OP_GFX_EDC_ERROR,</div><div class='add'>+  OD_OP_GFX_PCC_ERROR,</div><div class='add'>+  OD_POWER_FEATURE_CTRL_ERROR,</div><div class='add'>+} OD_FAIL_e;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint32_t               FeatureCtrlMask;</div><div class='add'>+</div><div class='add'>+  //Voltage control</div><div class='add'>+  int16_t                VoltageOffsetPerZoneBoundary[PP_NUM_OD_VF_CURVE_POINTS];</div><div class='add'>+</div><div class='add'>+  uint16_t               VddGfxVmax;         // in mV</div><div class='add'>+  uint16_t               VddSocVmax;</div><div class='add'>+</div><div class='add'>+  uint8_t                IdlePwrSavingFeaturesCtrl;</div><div class='add'>+  uint8_t                RuntimePwrSavingFeaturesCtrl;</div><div class='add'>+  uint16_t               Padding;</div><div class='add'>+</div><div class='add'>+  //Frequency changes</div><div class='add'>+  int16_t                GfxclkFmin;           // MHz</div><div class='add'>+  int16_t                GfxclkFmax;           // MHz</div><div class='add'>+  uint16_t               UclkFmin;             // MHz</div><div class='add'>+  uint16_t               UclkFmax;             // MHz</div><div class='add'>+  uint16_t               FclkFmin;</div><div class='add'>+  uint16_t               FclkFmax;</div><div class='add'>+</div><div class='add'>+  //PPT</div><div class='add'>+  int16_t                Ppt;         // %</div><div class='add'>+  int16_t                Tdc;</div><div class='add'>+</div><div class='add'>+  //Fan control</div><div class='add'>+  uint8_t                FanLinearPwmPoints[NUM_OD_FAN_MAX_POINTS];</div><div class='add'>+  uint8_t                FanLinearTempPoints[NUM_OD_FAN_MAX_POINTS];</div><div class='add'>+  uint16_t               FanMinimumPwm;</div><div class='add'>+  uint16_t               AcousticTargetRpmThreshold;</div><div class='add'>+  uint16_t               AcousticLimitRpmThreshold;</div><div class='add'>+  uint16_t               FanTargetTemperature; // Degree Celcius</div><div class='add'>+  uint8_t                FanZeroRpmEnable;</div><div class='add'>+  uint8_t                FanZeroRpmStopTemp;</div><div class='add'>+  uint8_t                FanMode;</div><div class='add'>+  uint8_t                MaxOpTemp;</div><div class='add'>+</div><div class='add'>+  uint8_t                AdvancedOdModeEnabled;</div><div class='add'>+  uint8_t                Padding1[3];</div><div class='add'>+</div><div class='add'>+  uint16_t               GfxVoltageFullCtrlMode;</div><div class='add'>+  uint16_t               SocVoltageFullCtrlMode;</div><div class='add'>+  uint16_t               GfxclkFullCtrlMode;</div><div class='add'>+  uint16_t               UclkFullCtrlMode;</div><div class='add'>+  uint16_t               FclkFullCtrlMode;</div><div class='add'>+  uint16_t               Padding2;</div><div class='add'>+</div><div class='add'>+  int16_t                GfxEdc;</div><div class='add'>+  int16_t                GfxPccLimitControl;</div><div class='add'>+</div><div class='add'>+  uint32_t               Spare[10];</div><div class='add'>+  uint32_t               MmHubPadding[8]; // SMU internal use. Adding here instead of external as a workaround</div><div class='add'>+} OverDriveTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  OverDriveTable_t OverDriveTable;</div><div class='add'>+</div><div class='add'>+} OverDriveTableExternal_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint32_t               FeatureCtrlMask;</div><div class='add'>+</div><div class='add'>+  //Gfx Vf Curve</div><div class='add'>+  int16_t                VoltageOffsetPerZoneBoundary[PP_NUM_OD_VF_CURVE_POINTS];</div><div class='add'>+  //gfx Vmax</div><div class='add'>+  uint16_t               VddGfxVmax;         // in mV</div><div class='add'>+  //soc Vmax</div><div class='add'>+  uint16_t               VddSocVmax;</div><div class='add'>+</div><div class='add'>+  //gfxclk</div><div class='add'>+  int16_t                GfxclkFmin;           // MHz</div><div class='add'>+  int16_t                GfxclkFmax;           // MHz</div><div class='add'>+  //uclk</div><div class='add'>+  uint16_t               UclkFmin;             // MHz</div><div class='add'>+  uint16_t               UclkFmax;             // MHz</div><div class='add'>+  //fclk</div><div class='add'>+  uint16_t               FclkFmin;</div><div class='add'>+  uint16_t               FclkFmax;</div><div class='add'>+</div><div class='add'>+  //PPT</div><div class='add'>+  int16_t                Ppt;         // %</div><div class='add'>+  //TDC</div><div class='add'>+  int16_t                Tdc;</div><div class='add'>+</div><div class='add'>+  //Fan Curve</div><div class='add'>+  uint8_t                FanLinearPwmPoints[NUM_OD_FAN_MAX_POINTS];</div><div class='add'>+  uint8_t                FanLinearTempPoints[NUM_OD_FAN_MAX_POINTS];</div><div class='add'>+  //Fan Legacy</div><div class='add'>+  uint16_t               FanMinimumPwm;</div><div class='add'>+  uint16_t               AcousticTargetRpmThreshold;</div><div class='add'>+  uint16_t               AcousticLimitRpmThreshold;</div><div class='add'>+  uint16_t               FanTargetTemperature; // Degree Celcius</div><div class='add'>+  //zero fan</div><div class='add'>+  uint8_t                FanZeroRpmEnable;</div><div class='add'>+  //temperature</div><div class='add'>+  uint8_t                MaxOpTemp;</div><div class='add'>+  uint8_t                Padding[2];</div><div class='add'>+</div><div class='add'>+  //Full Ctrl</div><div class='add'>+  uint16_t               GfxVoltageFullCtrlMode;</div><div class='add'>+  uint16_t               SocVoltageFullCtrlMode;</div><div class='add'>+  uint16_t               GfxclkFullCtrlMode;</div><div class='add'>+  uint16_t               UclkFullCtrlMode;</div><div class='add'>+  uint16_t               FclkFullCtrlMode;</div><div class='add'>+  //EDC</div><div class='add'>+  int16_t                GfxEdc;</div><div class='add'>+  int16_t                GfxPccLimitControl;</div><div class='add'>+  int16_t                Padding1;</div><div class='add'>+</div><div class='add'>+  uint32_t               Spare[5];</div><div class='add'>+} OverDriveLimits_t;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  BOARD_GPIO_SMUIO_0,</div><div class='add'>+  BOARD_GPIO_SMUIO_1,</div><div class='add'>+  BOARD_GPIO_SMUIO_2,</div><div class='add'>+  BOARD_GPIO_SMUIO_3,</div><div class='add'>+  BOARD_GPIO_SMUIO_4,</div><div class='add'>+  BOARD_GPIO_SMUIO_5,</div><div class='add'>+  BOARD_GPIO_SMUIO_6,</div><div class='add'>+  BOARD_GPIO_SMUIO_7,</div><div class='add'>+  BOARD_GPIO_SMUIO_8,</div><div class='add'>+  BOARD_GPIO_SMUIO_9,</div><div class='add'>+  BOARD_GPIO_SMUIO_10,</div><div class='add'>+  BOARD_GPIO_SMUIO_11,</div><div class='add'>+  BOARD_GPIO_SMUIO_12,</div><div class='add'>+  BOARD_GPIO_SMUIO_13,</div><div class='add'>+  BOARD_GPIO_SMUIO_14,</div><div class='add'>+  BOARD_GPIO_SMUIO_15,</div><div class='add'>+  BOARD_GPIO_SMUIO_16,</div><div class='add'>+  BOARD_GPIO_SMUIO_17,</div><div class='add'>+  BOARD_GPIO_SMUIO_18,</div><div class='add'>+  BOARD_GPIO_SMUIO_19,</div><div class='add'>+  BOARD_GPIO_SMUIO_20,</div><div class='add'>+  BOARD_GPIO_SMUIO_21,</div><div class='add'>+  BOARD_GPIO_SMUIO_22,</div><div class='add'>+  BOARD_GPIO_SMUIO_23,</div><div class='add'>+  BOARD_GPIO_SMUIO_24,</div><div class='add'>+  BOARD_GPIO_SMUIO_25,</div><div class='add'>+  BOARD_GPIO_SMUIO_26,</div><div class='add'>+  BOARD_GPIO_SMUIO_27,</div><div class='add'>+  BOARD_GPIO_SMUIO_28,</div><div class='add'>+  BOARD_GPIO_SMUIO_29,</div><div class='add'>+  BOARD_GPIO_SMUIO_30,</div><div class='add'>+  BOARD_GPIO_SMUIO_31,</div><div class='add'>+  MAX_BOARD_GPIO_SMUIO_NUM,</div><div class='add'>+  BOARD_GPIO_DC_GEN_A,</div><div class='add'>+  BOARD_GPIO_DC_GEN_B,</div><div class='add'>+  BOARD_GPIO_DC_GEN_C,</div><div class='add'>+  BOARD_GPIO_DC_GEN_D,</div><div class='add'>+  BOARD_GPIO_DC_GEN_E,</div><div class='add'>+  BOARD_GPIO_DC_GEN_F,</div><div class='add'>+  BOARD_GPIO_DC_GEN_G,</div><div class='add'>+  BOARD_GPIO_DC_GENLK_CLK,</div><div class='add'>+  BOARD_GPIO_DC_GENLK_VSYNC,</div><div class='add'>+  BOARD_GPIO_DC_SWAPLOCK_A,</div><div class='add'>+  BOARD_GPIO_DC_SWAPLOCK_B,</div><div class='add'>+  MAX_BOARD_DC_GPIO_NUM,</div><div class='add'>+  BOARD_GPIO_LV_EN,</div><div class='add'>+} BOARD_GPIO_TYPE_e;</div><div class='add'>+</div><div class='add'>+#define INVALID_BOARD_GPIO 0xFF</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  //PLL 0</div><div class='add'>+  uint16_t InitImuClk;</div><div class='add'>+  uint16_t InitSocclk;</div><div class='add'>+  uint16_t InitMpioclk;</div><div class='add'>+  uint16_t InitSmnclk;</div><div class='add'>+  //PLL 1</div><div class='add'>+  uint16_t InitDispClk;</div><div class='add'>+  uint16_t InitDppClk;</div><div class='add'>+  uint16_t InitDprefclk;</div><div class='add'>+  uint16_t InitDcfclk;</div><div class='add'>+  uint16_t InitDtbclk;</div><div class='add'>+  uint16_t InitDbguSocClk;</div><div class='add'>+  //PLL 2</div><div class='add'>+  uint16_t InitGfxclk_bypass;</div><div class='add'>+  uint16_t InitMp1clk;</div><div class='add'>+  uint16_t InitLclk;</div><div class='add'>+  uint16_t InitDbguBacoClk;</div><div class='add'>+  uint16_t InitBaco400clk;</div><div class='add'>+  uint16_t InitBaco1200clk_bypass;</div><div class='add'>+  uint16_t InitBaco700clk_bypass;</div><div class='add'>+  uint16_t InitBaco500clk;</div><div class='add'>+  // PLL 3</div><div class='add'>+  uint16_t InitDclk0;</div><div class='add'>+  uint16_t InitVclk0;</div><div class='add'>+  // PLL 4</div><div class='add'>+  uint16_t InitFclk;</div><div class='add'>+  uint16_t Padding1;</div><div class='add'>+  // PLL 5</div><div class='add'>+  //UCLK clocks, assumed all UCLK instances will be the same.</div><div class='add'>+  uint8_t InitUclkLevel;    // =0,1,2,3,4,5 frequency from FreqTableUclk</div><div class='add'>+</div><div class='add'>+  uint8_t Padding[3];</div><div class='add'>+</div><div class='add'>+  uint32_t InitVcoFreqPll0; //smu_socclk_t</div><div class='add'>+  uint32_t InitVcoFreqPll1; //smu_displayclk_t</div><div class='add'>+  uint32_t InitVcoFreqPll2; //smu_nbioclk_t</div><div class='add'>+  uint32_t InitVcoFreqPll3; //smu_vcnclk_t</div><div class='add'>+  uint32_t InitVcoFreqPll4; //smu_fclk_t</div><div class='add'>+  uint32_t InitVcoFreqPll5; //smu_uclk_01_t</div><div class='add'>+  uint32_t InitVcoFreqPll6; //smu_uclk_23_t</div><div class='add'>+  uint32_t InitVcoFreqPll7; //smu_uclk_45_t</div><div class='add'>+  uint32_t InitVcoFreqPll8; //smu_uclk_67_t</div><div class='add'>+</div><div class='add'>+  //encoding will be SVI3</div><div class='add'>+  uint16_t InitGfx;       // In mV(Q2) ,  should be 0?</div><div class='add'>+  uint16_t InitSoc;       // In mV(Q2)</div><div class='add'>+  uint16_t InitVddIoMem;  // In mV(Q2) MemVdd</div><div class='add'>+  uint16_t InitVddCiMem;  // In mV(Q2) VMemP</div><div class='add'>+</div><div class='add'>+  //uint16_t Padding2;</div><div class='add'>+</div><div class='add'>+  uint32_t Spare[8];</div><div class='add'>+} BootValues_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+   uint16_t Power[PPT_THROTTLER_COUNT][POWER_SOURCE_COUNT]; // Watts</div><div class='add'>+  uint16_t Tdc[TDC_THROTTLER_COUNT];             // Amps</div><div class='add'>+</div><div class='add'>+  uint16_t Temperature[TEMP_COUNT]; // Celsius</div><div class='add'>+</div><div class='add'>+  uint8_t  PwmLimitMin;</div><div class='add'>+  uint8_t  PwmLimitMax;</div><div class='add'>+  uint8_t  FanTargetTemperature;</div><div class='add'>+  uint8_t  Spare1[1];</div><div class='add'>+</div><div class='add'>+  uint16_t AcousticTargetRpmThresholdMin;</div><div class='add'>+  uint16_t AcousticTargetRpmThresholdMax;</div><div class='add'>+</div><div class='add'>+  uint16_t AcousticLimitRpmThresholdMin;</div><div class='add'>+  uint16_t AcousticLimitRpmThresholdMax;</div><div class='add'>+</div><div class='add'>+  uint16_t  PccLimitMin;</div><div class='add'>+  uint16_t  PccLimitMax;</div><div class='add'>+</div><div class='add'>+  uint16_t  FanStopTempMin;</div><div class='add'>+  uint16_t  FanStopTempMax;</div><div class='add'>+  uint16_t  FanStartTempMin;</div><div class='add'>+  uint16_t  FanStartTempMax;</div><div class='add'>+</div><div class='add'>+  uint16_t  PowerMinPpt0[POWER_SOURCE_COUNT];</div><div class='add'>+  uint32_t  Spare[11];</div><div class='add'>+} MsgLimits_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint16_t BaseClockAc;</div><div class='add'>+  uint16_t GameClockAc;</div><div class='add'>+  uint16_t BoostClockAc;</div><div class='add'>+  uint16_t BaseClockDc;</div><div class='add'>+  uint16_t GameClockDc;</div><div class='add'>+  uint16_t BoostClockDc;</div><div class='add'>+</div><div class='add'>+  uint32_t Reserved[4];</div><div class='add'>+} DriverReportedClocks_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t           DcBtcEnabled;</div><div class='add'>+  uint8_t           Padding[3];</div><div class='add'>+</div><div class='add'>+  uint16_t          DcTol;            // mV Q2</div><div class='add'>+  uint16_t          DcBtcGb;       // mV Q2</div><div class='add'>+</div><div class='add'>+  uint16_t          DcBtcMin;       // mV Q2</div><div class='add'>+  uint16_t          DcBtcMax;       // mV Q2</div><div class='add'>+</div><div class='add'>+  LinearInt_t       DcBtcGbScalar;</div><div class='add'>+} AvfsDcBtcParams_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint16_t       AvfsTemp[AVFS_TEMP_COUNT]; //in degrees C</div><div class='add'>+  uint16_t      VftFMin;  // in MHz</div><div class='add'>+  uint16_t      VInversion; // in mV Q2</div><div class='add'>+  QuadraticInt_t qVft[AVFS_TEMP_COUNT];</div><div class='add'>+  QuadraticInt_t qAvfsGb;</div><div class='add'>+  QuadraticInt_t qAvfsGb2;</div><div class='add'>+} AvfsFuseOverride_t;</div><div class='add'>+</div><div class='add'>+//all settings maintained by PFE team</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t      Version;</div><div class='add'>+  uint8_t      Spare8[3];</div><div class='add'>+  // SECTION: Feature Control</div><div class='add'>+  uint32_t     FeaturesToRun[NUM_FEATURES / 32]; // Features that PMFW will attempt to enable. Use FEATURE_*_BIT as mapping</div><div class='add'>+  // SECTION: FW DSTATE Settings</div><div class='add'>+  uint32_t     FwDStateMask;           // See FW_DSTATE_*_BIT for mapping</div><div class='add'>+  // SECTION: Advanced Options</div><div class='add'>+  uint32_t     DebugOverrides;</div><div class='add'>+</div><div class='add'>+  uint32_t     Spare[2];</div><div class='add'>+} PFE_Settings_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  // SECTION: Version</div><div class='add'>+  uint32_t Version; // should be unique to each SKU(i.e if any value changes in below structure then this value must be different)</div><div class='add'>+</div><div class='add'>+  // SECTION: Miscellaneous Configuration</div><div class='add'>+  uint8_t      TotalPowerConfig;    // Determines how PMFW calculates the power. Use defines from PwrConfig_e</div><div class='add'>+  uint8_t      CustomerVariant; //To specify if this PPTable is intended for a particular customer. Use defines from CUSTOMER_VARIANT_e</div><div class='add'>+  uint8_t      MemoryTemperatureTypeMask; // Bit mapping indicating which methods of memory temperature reading are enabled. Use defines from MEM_TEMP_*BIT</div><div class='add'>+  uint8_t      SmartShiftVersion; // Determine what SmartShift feature version is supported Use defines from SMARTSHIFT_VERSION_e</div><div class='add'>+</div><div class='add'>+  // SECTION: Infrastructure Limits</div><div class='add'>+  uint8_t  SocketPowerLimitSpare[10];</div><div class='add'>+</div><div class='add'>+  //if set to 1, SocketPowerLimitAc and SocketPowerLimitDc will be interpreted as legacy programs(i.e absolute power). If 0, all except index 0 will be scalars</div><div class='add'>+  //relative index 0</div><div class='add'>+  uint8_t  EnableLegacyPptLimit;</div><div class='add'>+  uint8_t  UseInputTelemetry; //applicable to SVI3 only and only to be set if VRs support</div><div class='add'>+</div><div class='add'>+  uint8_t  SmartShiftMinReportedPptinDcs; //minimum possible active power consumption for this SKU. Used for SmartShift power reporting</div><div class='add'>+</div><div class='add'>+  uint8_t  PaddingPpt[7];</div><div class='add'>+</div><div class='add'>+  uint16_t HwCtfTempLimit; // In degrees Celsius. Temperature above which HW will trigger CTF. Consumed by VBIOS only</div><div class='add'>+</div><div class='add'>+  uint16_t PaddingInfra;</div><div class='add'>+</div><div class='add'>+  // Per year normalized Vmax state failure rates (sum of the two domains divided by life time in years)</div><div class='add'>+  uint32_t FitControllerFailureRateLimit; //in IEEE float</div><div class='add'>+  //Expected GFX Duty Cycle at Vmax.</div><div class='add'>+  uint32_t FitControllerGfxDutyCycle; // in IEEE float</div><div class='add'>+  //Expected SOC Duty Cycle at Vmax.</div><div class='add'>+  uint32_t FitControllerSocDutyCycle; // in IEEE float</div><div class='add'>+</div><div class='add'>+  //This offset will be deducted from the controller output to before it goes through the SOC Vset limiter block.</div><div class='add'>+  uint32_t FitControllerSocOffset;  //in IEEE float</div><div class='add'>+</div><div class='add'>+  uint32_t     GfxApccPlusResidencyLimit; // Percentage value. Used by APCC+ controller to control PCC residency to some value</div><div class='add'>+</div><div class='add'>+  // SECTION: Throttler settings</div><div class='add'>+  uint32_t ThrottlerControlMask;   // See THROTTLER_*_BIT for mapping</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  // SECTION: Voltage Control Parameters</div><div class='add'>+  uint16_t  UlvVoltageOffset[PMFW_VOLT_PLANE_COUNT]; // In mV(Q2). ULV offset used in either GFX_ULV or SOC_ULV(part of FW_DSTATE)</div><div class='add'>+</div><div class='add'>+  uint8_t      Padding[2];</div><div class='add'>+  uint16_t     DeepUlvVoltageOffsetSoc;        // In mV(Q2)  Long Idle Vmin (deep ULV), for VDD_SOC as part of FW_DSTATE</div><div class='add'>+</div><div class='add'>+  // Voltage Limits</div><div class='add'>+  uint16_t     DefaultMaxVoltage[PMFW_VOLT_PLANE_COUNT]; // In mV(Q2) Maximum voltage without FIT controller enabled</div><div class='add'>+  uint16_t     BoostMaxVoltage[PMFW_VOLT_PLANE_COUNT]; // In mV(Q2) Maximum voltage with FIT controller enabled</div><div class='add'>+</div><div class='add'>+  //Vmin Optimizations</div><div class='add'>+  int16_t         VminTempHystersis[PMFW_VOLT_PLANE_COUNT]; // Celsius Temperature hysteresis for switching between low/high temperature values for Vmin</div><div class='add'>+  int16_t         VminTempThreshold[PMFW_VOLT_PLANE_COUNT]; // Celsius Temperature threshold for switching between low/high temperature values for Vmin</div><div class='add'>+  uint16_t        Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT];            //In mV(Q2) Initial (pre-aging) Vset to be used at hot.</div><div class='add'>+  uint16_t        Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT];           //In mV(Q2) Initial (pre-aging) Vset to be used at cold.</div><div class='add'>+  uint16_t        Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT];           //In mV(Q2) End-of-life Vset to be used at hot.</div><div class='add'>+  uint16_t        Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT];          //In mV(Q2) End-of-life Vset to be used at cold.</div><div class='add'>+  uint16_t        Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT];      //In mV(Q2) Worst-case aging margin</div><div class='add'>+  uint16_t        Spare_Vmin_Plat_Offset_Hot[PMFW_VOLT_PLANE_COUNT];   //In mV(Q2) Platform offset apply to T0 Hot</div><div class='add'>+  uint16_t        Spare_Vmin_Plat_Offset_Cold[PMFW_VOLT_PLANE_COUNT];  //In mV(Q2) Platform offset apply to T0 Cold</div><div class='add'>+</div><div class='add'>+  //This is a fixed/minimum VMIN aging degradation offset which is applied at T0. This reflects the minimum amount of aging already accounted for.</div><div class='add'>+  uint16_t        VcBtcFixedVminAgingOffset[PMFW_VOLT_PLANE_COUNT];</div><div class='add'>+  //Linear offset or GB term to account for mis-correlation between PSM and Vmin shift trends across parts.</div><div class='add'>+  uint16_t        VcBtcVmin2PsmDegrationGb[PMFW_VOLT_PLANE_COUNT];</div><div class='add'>+  //Scalar coefficient of the PSM aging degradation function</div><div class='add'>+  uint32_t        VcBtcPsmA[PMFW_VOLT_PLANE_COUNT];                   // A_PSM</div><div class='add'>+  //Exponential coefficient of the PSM aging degradation function</div><div class='add'>+  uint32_t        VcBtcPsmB[PMFW_VOLT_PLANE_COUNT];                   // B_PSM</div><div class='add'>+  //Scalar coefficient of the VMIN aging degradation function. Specified as worst case between hot and cold.</div><div class='add'>+  uint32_t        VcBtcVminA[PMFW_VOLT_PLANE_COUNT];                  // A_VMIN</div><div class='add'>+  //Exponential coefficient of the VMIN aging degradation function. Specified as worst case between hot and cold.</div><div class='add'>+  uint32_t        VcBtcVminB[PMFW_VOLT_PLANE_COUNT];                  // B_VMIN</div><div class='add'>+</div><div class='add'>+  uint8_t         PerPartVminEnabled[PMFW_VOLT_PLANE_COUNT];</div><div class='add'>+  uint8_t         VcBtcEnabled[PMFW_VOLT_PLANE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t        SocketPowerLimitAcTau[PPT_THROTTLER_COUNT]; // Time constant of LPF in ms</div><div class='add'>+  uint16_t        SocketPowerLimitDcTau[PPT_THROTTLER_COUNT]; // Time constant of LPF in ms</div><div class='add'>+</div><div class='add'>+  QuadraticInt_t  Gfx_Vmin_droop;</div><div class='add'>+  QuadraticInt_t  Soc_Vmin_droop;</div><div class='add'>+  uint32_t        SpareVmin[6];</div><div class='add'>+</div><div class='add'>+  //SECTION: DPM Configuration 1</div><div class='add'>+  DpmDescriptor_t DpmDescriptor[PPCLK_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t      FreqTableGfx        [NUM_GFXCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableVclk       [NUM_VCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableDclk       [NUM_DCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableSocclk     [NUM_SOCCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableUclk       [NUM_UCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableShadowUclk [NUM_UCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableDispclk    [NUM_DISPCLK_DPM_LEVELS ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableDppClk     [NUM_DPPCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableDprefclk   [NUM_DPREFCLK_DPM_LEVELS];     // In MHz</div><div class='add'>+  uint16_t      FreqTableDcfclk     [NUM_DCFCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableDtbclk     [NUM_DTBCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t      FreqTableFclk       [NUM_FCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+</div><div class='add'>+  uint32_t      DcModeMaxFreq     [PPCLK_COUNT            ];     // In MHz</div><div class='add'>+</div><div class='add'>+  uint16_t      GfxclkAibFmax;</div><div class='add'>+  uint16_t      GfxclkFreqCap;</div><div class='add'>+</div><div class='add'>+  //GFX Idle Power Settings</div><div class='add'>+  uint16_t      GfxclkFgfxoffEntry;   // Entry in RLC stage (PLL), in Mhz</div><div class='add'>+  uint16_t      GfxclkFgfxoffExitImu; // Exit/Entry in IMU stage (BYPASS), in Mhz</div><div class='add'>+  uint16_t      GfxclkFgfxoffExitRlc; // Exit in RLC stage (PLL), in Mhz</div><div class='add'>+  uint16_t      GfxclkThrottleClock;  //Used primarily in DCS</div><div class='add'>+  uint8_t       EnableGfxPowerStagesGpio; //Genlk_vsync GPIO flag used to control gfx power stages</div><div class='add'>+  uint8_t       GfxIdlePadding;</div><div class='add'>+</div><div class='add'>+  uint8_t       SmsRepairWRCKClkDivEn;</div><div class='add'>+  uint8_t       SmsRepairWRCKClkDivVal;</div><div class='add'>+  uint8_t       GfxOffEntryEarlyMGCGEn;</div><div class='add'>+  uint8_t       GfxOffEntryForceCGCGEn;</div><div class='add'>+  uint8_t       GfxOffEntryForceCGCGDelayEn;</div><div class='add'>+  uint8_t       GfxOffEntryForceCGCGDelayVal; // in microseconds</div><div class='add'>+</div><div class='add'>+  uint16_t      GfxclkFreqGfxUlv; // in MHz</div><div class='add'>+  uint8_t       GfxIdlePadding2[2];</div><div class='add'>+  uint32_t      GfxOffEntryHysteresis; //For RLC to count after it enters CGCG, and before triggers GFXOFF entry</div><div class='add'>+  uint32_t      GfxoffSpare[15];</div><div class='add'>+</div><div class='add'>+  // DFLL</div><div class='add'>+  uint16_t      DfllMstrOscConfigA; //Used for voltage sensitivity slope tuning: 0 = (en_leaker &lt;&lt; 9) | (en_vint1_reduce &lt;&lt; 8) | (gain_code &lt;&lt; 6) | (bias_code &lt;&lt; 3) | (vint1_code &lt;&lt; 1) | en_bias</div><div class='add'>+  uint16_t      DfllSlvOscConfigA; //Used for voltage sensitivity slope tuning: 0 = (en_leaker &lt;&lt; 9) | (en_vint1_reduce &lt;&lt; 8) | (gain_code &lt;&lt; 6) | (bias_code &lt;&lt; 3) | (vint1_code &lt;&lt; 1) | en_bias</div><div class='add'>+  uint32_t      DfllBtcMasterScalerM;</div><div class='add'>+  int32_t       DfllBtcMasterScalerB;</div><div class='add'>+  uint32_t      DfllBtcSlaveScalerM;</div><div class='add'>+  int32_t       DfllBtcSlaveScalerB;</div><div class='add'>+</div><div class='add'>+  uint32_t      DfllPccAsWaitCtrl; //GDFLL_AS_WAIT_CTRL_PCC register value to be passed to RLC msg</div><div class='add'>+  uint32_t      DfllPccAsStepCtrl; //GDFLL_AS_STEP_CTRL_PCC register value to be passed to RLC msg</div><div class='add'>+  uint32_t      GfxDfllSpare[9];</div><div class='add'>+</div><div class='add'>+  // DVO</div><div class='add'>+  uint32_t        DvoPsmDownThresholdVoltage; //Voltage float</div><div class='add'>+  uint32_t        DvoPsmUpThresholdVoltage; //Voltage float</div><div class='add'>+  uint32_t        DvoFmaxLowScaler; //Unitless float</div><div class='add'>+</div><div class='add'>+  // GFX DCS</div><div class='add'>+  uint16_t      DcsGfxOffVoltage;     //Voltage in mV(Q2) applied to VDDGFX when entering DCS GFXOFF phase</div><div class='add'>+  uint16_t      PaddingDcs;</div><div class='add'>+</div><div class='add'>+  uint16_t      DcsMinGfxOffTime;     //Minimum amount of time PMFW shuts GFX OFF as part of GFX DCS phase</div><div class='add'>+  uint16_t      DcsMaxGfxOffTime;      //Maximum amount of time PMFW can shut GFX OFF as part of GFX DCS phase at a stretch.</div><div class='add'>+</div><div class='add'>+  uint32_t      DcsMinCreditAccum;    //Min amount of positive credit accumulation before waking GFX up as part of DCS.</div><div class='add'>+</div><div class='add'>+  uint16_t      DcsExitHysteresis;    //The min amount of time power credit accumulator should have a value &gt; 0 before SMU exits the DCS throttling phase.</div><div class='add'>+  uint16_t      DcsTimeout;           //This is the amount of time SMU FW waits for RLC to put GFX into GFXOFF before reverting to the fallback mechanism of throttling GFXCLK to Fmin.</div><div class='add'>+</div><div class='add'>+  uint32_t      DcsPfGfxFopt;         //Default to GFX FMIN</div><div class='add'>+  uint32_t      DcsPfUclkFopt;        //Default to UCLK FMIN</div><div class='add'>+</div><div class='add'>+  uint8_t       FoptEnabled;</div><div class='add'>+  uint8_t       DcsSpare2[3];</div><div class='add'>+  uint32_t      DcsFoptM;             //Tuning paramters to shift Fopt calculation, IEEE754 float</div><div class='add'>+  uint32_t      DcsFoptB;             //Tuning paramters to shift Fopt calculation, IEEE754 float</div><div class='add'>+  uint32_t      DcsSpare[9];</div><div class='add'>+</div><div class='add'>+  // UCLK section</div><div class='add'>+  uint8_t       UseStrobeModeOptimizations; //Set to indicate that FW should use strobe mode optimizations</div><div class='add'>+  uint8_t       PaddingMem[3];</div><div class='add'>+</div><div class='add'>+  uint8_t       UclkDpmPstates             [NUM_UCLK_DPM_LEVELS];     // 6 Primary SW DPM states (6 + 6 Shadow)</div><div class='add'>+  uint8_t       UclkDpmShadowPstates       [NUM_UCLK_DPM_LEVELS];      // 6 Shadow SW DPM states (6 + 6 Shadow)</div><div class='add'>+  uint8_t       FreqTableUclkDiv           [NUM_UCLK_DPM_LEVELS];     // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8</div><div class='add'>+  uint8_t       FreqTableShadowUclkDiv     [NUM_UCLK_DPM_LEVELS];     // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8</div><div class='add'>+  uint16_t      MemVmempVoltage            [NUM_UCLK_DPM_LEVELS];     // mV(Q2)</div><div class='add'>+  uint16_t      MemVddioVoltage            [NUM_UCLK_DPM_LEVELS];     // mV(Q2)</div><div class='add'>+  uint16_t      DalDcModeMaxUclkFreq;</div><div class='add'>+  uint8_t       PaddingsMem[2];</div><div class='add'>+  //FCLK Section</div><div class='add'>+  uint16_t      FclkDpmDisallowPstateFreq;  //Frequency which FW will target when indicated that display config cannot support P-state. Set to 0 use FW calculated value</div><div class='add'>+  uint16_t      PaddingFclk;</div><div class='add'>+</div><div class='add'>+  // Link DPM Settings</div><div class='add'>+  uint8_t       PcieGenSpeed[NUM_LINK_LEVELS];           ///&lt; 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3 3:PciE-gen4 4:PciE-gen5</div><div class='add'>+  uint8_t       PcieLaneCount[NUM_LINK_LEVELS];          ///&lt; 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16</div><div class='add'>+  uint16_t      LclkFreq[NUM_LINK_LEVELS];</div><div class='add'>+</div><div class='add'>+  // SECTION: VDD_GFX AVFS</div><div class='add'>+  uint8_t       OverrideGfxAvfsFuses;</div><div class='add'>+  uint8_t       GfxAvfsPadding[3];</div><div class='add'>+</div><div class='add'>+  uint32_t      SocHwRtAvfsFuses[PP_GRTAVFS_HW_FUSE_COUNT];   //new added for Soc domain</div><div class='add'>+  uint32_t      GfxL2HwRtAvfsFuses[PP_GRTAVFS_HW_FUSE_COUNT]; //see fusedoc for encoding</div><div class='add'>+  //uint32_t      GfxSeHwRtAvfsFuses[PP_GRTAVFS_HW_FUSE_COUNT];</div><div class='add'>+  uint32_t      spare_HwRtAvfsFuses[PP_GRTAVFS_HW_FUSE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint32_t      SocCommonRtAvfs[PP_GRTAVFS_FW_COMMON_FUSE_COUNT];</div><div class='add'>+  uint32_t      GfxCommonRtAvfs[PP_GRTAVFS_FW_COMMON_FUSE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint32_t      SocFwRtAvfsFuses[PP_GRTAVFS_FW_SEP_FUSE_COUNT];</div><div class='add'>+  uint32_t      GfxL2FwRtAvfsFuses[PP_GRTAVFS_FW_SEP_FUSE_COUNT];</div><div class='add'>+  //uint32_t      GfxSeFwRtAvfsFuses[PP_GRTAVFS_FW_SEP_FUSE_COUNT];</div><div class='add'>+  uint32_t      spare_FwRtAvfsFuses[PP_GRTAVFS_FW_SEP_FUSE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint32_t      Soc_Droop_PWL_F[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Soc_Droop_PWL_a[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Soc_Droop_PWL_b[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Soc_Droop_PWL_c[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+</div><div class='add'>+  uint32_t      Gfx_Droop_PWL_F[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Gfx_Droop_PWL_a[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Gfx_Droop_PWL_b[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Gfx_Droop_PWL_c[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+</div><div class='add'>+  uint32_t      Gfx_Static_PWL_Offset[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+  uint32_t      Soc_Static_PWL_Offset[PP_NUM_RTAVFS_PWL_ZONES];</div><div class='add'>+</div><div class='add'>+  uint32_t      dGbV_dT_vmin;</div><div class='add'>+  uint32_t      dGbV_dT_vmax;</div><div class='add'>+</div><div class='add'>+  //Unused: PMFW-9370</div><div class='add'>+  uint32_t      V2F_vmin_range_low;</div><div class='add'>+  uint32_t      V2F_vmin_range_high;</div><div class='add'>+  uint32_t      V2F_vmax_range_low;</div><div class='add'>+  uint32_t      V2F_vmax_range_high;</div><div class='add'>+</div><div class='add'>+  AvfsDcBtcParams_t DcBtcGfxParams;</div><div class='add'>+  QuadraticInt_t    SSCurve_GFX;</div><div class='add'>+  uint32_t   GfxAvfsSpare[29];</div><div class='add'>+</div><div class='add'>+  //SECTION: VDD_SOC AVFS</div><div class='add'>+  uint8_t      OverrideSocAvfsFuses;</div><div class='add'>+  uint8_t      MinSocAvfsRevision;</div><div class='add'>+  uint8_t      SocAvfsPadding[2];</div><div class='add'>+</div><div class='add'>+  AvfsFuseOverride_t SocAvfsFuseOverride[AVFS_D_COUNT];</div><div class='add'>+</div><div class='add'>+  DroopInt_t        dBtcGbSoc[AVFS_D_COUNT];            // GHz-&gt;V BtcGb</div><div class='add'>+</div><div class='add'>+  LinearInt_t       qAgingGb[AVFS_D_COUNT];          // GHz-&gt;V</div><div class='add'>+</div><div class='add'>+  QuadraticInt_t    qStaticVoltageOffset[AVFS_D_COUNT]; // GHz-&gt;V</div><div class='add'>+</div><div class='add'>+  AvfsDcBtcParams_t DcBtcSocParams[AVFS_D_COUNT];</div><div class='add'>+</div><div class='add'>+  QuadraticInt_t    SSCurve_SOC;</div><div class='add'>+  uint32_t   SocAvfsSpare[29];</div><div class='add'>+</div><div class='add'>+  //SECTION: Boot clock and voltage values</div><div class='add'>+  BootValues_t BootValues;</div><div class='add'>+</div><div class='add'>+  //SECTION: Driver Reported Clocks</div><div class='add'>+  DriverReportedClocks_t DriverReportedClocks;</div><div class='add'>+</div><div class='add'>+  //SECTION: Message Limits</div><div class='add'>+  MsgLimits_t MsgLimits;</div><div class='add'>+</div><div class='add'>+  //SECTION: OverDrive Limits</div><div class='add'>+  OverDriveLimits_t OverDriveLimitsBasicMin;</div><div class='add'>+  OverDriveLimits_t OverDriveLimitsBasicMax;</div><div class='add'>+  OverDriveLimits_t OverDriveLimitsAdvancedMin;</div><div class='add'>+  OverDriveLimits_t OverDriveLimitsAdvancedMax;</div><div class='add'>+</div><div class='add'>+  // Section: Total Board Power idle vs active coefficients</div><div class='add'>+  uint8_t     TotalBoardPowerSupport;</div><div class='add'>+  uint8_t     TotalBoardPowerPadding[1];</div><div class='add'>+  uint16_t    TotalBoardPowerRoc;</div><div class='add'>+</div><div class='add'>+  //PMFW-11158</div><div class='add'>+  QuadraticInt_t qFeffCoeffGameClock[POWER_SOURCE_COUNT];</div><div class='add'>+  QuadraticInt_t qFeffCoeffBaseClock[POWER_SOURCE_COUNT];</div><div class='add'>+  QuadraticInt_t qFeffCoeffBoostClock[POWER_SOURCE_COUNT];</div><div class='add'>+</div><div class='add'>+  // APT GFX to UCLK mapping</div><div class='add'>+  int32_t     AptUclkGfxclkLookup[POWER_SOURCE_COUNT][6];</div><div class='add'>+  uint32_t    AptUclkGfxclkLookupHyst[POWER_SOURCE_COUNT][6];</div><div class='add'>+  uint32_t    AptPadding;</div><div class='add'>+</div><div class='add'>+  // Xvmin didt</div><div class='add'>+  QuadraticInt_t  GfxXvminDidtDroopThresh;</div><div class='add'>+  uint32_t        GfxXvminDidtResetDDWait;</div><div class='add'>+  uint32_t        GfxXvminDidtClkStopWait;</div><div class='add'>+  uint32_t        GfxXvminDidtFcsStepCtrl;</div><div class='add'>+  uint32_t        GfxXvminDidtFcsWaitCtrl;</div><div class='add'>+</div><div class='add'>+  // PSM based didt controller</div><div class='add'>+  uint32_t        PsmModeEnabled; //0: all disabled 1: static mode only 2: dynamic mode only 3:static + dynamic mode</div><div class='add'>+  uint32_t        P2v_a; // floating point in U32 format</div><div class='add'>+  uint32_t        P2v_b;</div><div class='add'>+  uint32_t        P2v_c;</div><div class='add'>+  uint32_t        T2p_a;</div><div class='add'>+  uint32_t        T2p_b;</div><div class='add'>+  uint32_t        T2p_c;</div><div class='add'>+  uint32_t        P2vTemp;</div><div class='add'>+  QuadraticInt_t  PsmDidtStaticSettings;</div><div class='add'>+  QuadraticInt_t  PsmDidtDynamicSettings;</div><div class='add'>+  uint8_t         PsmDidtAvgDiv;</div><div class='add'>+  uint8_t         PsmDidtForceStall;</div><div class='add'>+  uint16_t        PsmDidtReleaseTimer;</div><div class='add'>+  uint32_t        PsmDidtStallPattern; //Will be written to both pattern 1 and didt_static_level_prog</div><div class='add'>+  // CAC EDC</div><div class='add'>+  uint32_t        Leakage_C0; // in IEEE float</div><div class='add'>+  uint32_t        Leakage_C1; // in IEEE float</div><div class='add'>+  uint32_t        Leakage_C2; // in IEEE float</div><div class='add'>+  uint32_t        Leakage_C3; // in IEEE float</div><div class='add'>+  uint32_t        Leakage_C4; // in IEEE float</div><div class='add'>+  uint32_t        Leakage_C5; // in IEEE float</div><div class='add'>+  uint32_t        GFX_CLK_SCALAR; // in IEEE float</div><div class='add'>+  uint32_t        GFX_CLK_INTERCEPT; // in IEEE float</div><div class='add'>+  uint32_t        GFX_CAC_M; // in IEEE float</div><div class='add'>+  uint32_t        GFX_CAC_B; // in IEEE float</div><div class='add'>+  uint32_t        VDD_GFX_CurrentLimitGuardband; // in IEEE float</div><div class='add'>+  uint32_t        DynToTotalCacScalar; // in IEEE</div><div class='add'>+  // GFX EDC XVMIN</div><div class='add'>+  uint32_t        XVmin_Gfx_EdcThreshScalar;</div><div class='add'>+  uint32_t        XVmin_Gfx_EdcEnableFreq;</div><div class='add'>+  uint32_t        XVmin_Gfx_EdcPccAsStepCtrl;</div><div class='add'>+  uint32_t        XVmin_Gfx_EdcPccAsWaitCtrl;</div><div class='add'>+  uint16_t        XVmin_Gfx_EdcThreshold;</div><div class='add'>+  uint16_t        XVmin_Gfx_EdcFiltHysWaitCtrl;</div><div class='add'>+  // SOC EDC XVMIN</div><div class='add'>+  uint32_t        XVmin_Soc_EdcThreshScalar;</div><div class='add'>+  uint32_t        XVmin_Soc_EdcEnableFreq;</div><div class='add'>+  uint32_t        XVmin_Soc_EdcThreshold; // LPF: number of cycles Xvmin_trig_filt will react.</div><div class='add'>+  uint16_t        XVmin_Soc_EdcStepUpTime; // 10 bit, refclk count to step up throttle when PCC remains asserted.</div><div class='add'>+  uint16_t        XVmin_Soc_EdcStepDownTime;// 10 bit, refclk count to step down throttle when PCC remains asserted.</div><div class='add'>+  uint8_t         XVmin_Soc_EdcInitPccStep; // 3 bit, First Pcc Step number that will applied when PCC asserts.</div><div class='add'>+  uint8_t         PaddingSocEdc[3];</div><div class='add'>+</div><div class='add'>+  // Fuse Override for SOC and GFX XVMIN</div><div class='add'>+  uint8_t         GfxXvminFuseOverride;</div><div class='add'>+  uint8_t         SocXvminFuseOverride;</div><div class='add'>+  uint8_t         PaddingXvminFuseOverride[2];</div><div class='add'>+  uint8_t         GfxXvminFddTempLow;  // bit 7: sign, bit 0-6: ABS value</div><div class='add'>+  uint8_t         GfxXvminFddTempHigh; // bit 7: sign, bit 0-6: ABS value</div><div class='add'>+  uint8_t         SocXvminFddTempLow;  // bit 7: sign, bit 0-6: ABS value</div><div class='add'>+  uint8_t         SocXvminFddTempHigh; // bit 7: sign, bit 0-6: ABS value</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  uint16_t        GfxXvminFddVolt0;    // low voltage, in VID</div><div class='add'>+  uint16_t        GfxXvminFddVolt1;    // mid voltage, in VID</div><div class='add'>+  uint16_t        GfxXvminFddVolt2;    // high voltage, in VID</div><div class='add'>+  uint16_t        SocXvminFddVolt0;    // low voltage, in VID</div><div class='add'>+  uint16_t        SocXvminFddVolt1;    // mid voltage, in VID</div><div class='add'>+  uint16_t        SocXvminFddVolt2;    // high voltage, in VID</div><div class='add'>+  uint16_t        GfxXvminDsFddDsm[6]; // XVMIN DS, same organization with fuse</div><div class='add'>+  uint16_t        GfxXvminEdcFddDsm[6];// XVMIN GFX EDC, same organization with fuse</div><div class='add'>+  uint16_t        SocXvminEdcFddDsm[6];// XVMIN SOC EDC, same organization with fuse</div><div class='add'>+</div><div class='add'>+  // SECTION: Sku Reserved</div><div class='add'>+  uint32_t        Spare;</div><div class='add'>+</div><div class='add'>+  // Padding for MMHUB - do not modify this</div><div class='add'>+  uint32_t     MmHubPadding[8];</div><div class='add'>+} SkuTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t SlewRateConditions;</div><div class='add'>+  uint8_t LoadLineAdjust;</div><div class='add'>+  uint8_t VoutOffset;</div><div class='add'>+  uint8_t VidMax;</div><div class='add'>+  uint8_t VidMin;</div><div class='add'>+  uint8_t TenBitTelEn;</div><div class='add'>+  uint8_t SixteenBitTelEn;</div><div class='add'>+  uint8_t OcpThresh;</div><div class='add'>+  uint8_t OcpWarnThresh;</div><div class='add'>+  uint8_t OcpSettings;</div><div class='add'>+  uint8_t VrhotThresh;</div><div class='add'>+  uint8_t OtpThresh;</div><div class='add'>+  uint8_t UvpOvpDeltaRef;</div><div class='add'>+  uint8_t PhaseShed;</div><div class='add'>+  uint8_t Padding[10];</div><div class='add'>+  uint32_t SettingOverrideMask;</div><div class='add'>+} Svi3RegulatorSettings_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  // SECTION: Version</div><div class='add'>+  uint32_t    Version; //should be unique to each board type</div><div class='add'>+</div><div class='add'>+  // SECTION: I2C Control</div><div class='add'>+  I2cControllerConfig_t  I2cControllers[NUM_I2C_CONTROLLERS];</div><div class='add'>+</div><div class='add'>+  //SECTION SVI3 Board Parameters</div><div class='add'>+  uint8_t      SlaveAddrMapping[SVI_PLANE_COUNT];</div><div class='add'>+  uint8_t      VrPsiSupport[SVI_PLANE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint32_t     Svi3SvcSpeed;</div><div class='add'>+  uint8_t      EnablePsi6[SVI_PLANE_COUNT];       // only applicable in SVI3</div><div class='add'>+</div><div class='add'>+  // SECTION: Voltage Regulator Settings</div><div class='add'>+  Svi3RegulatorSettings_t  Svi3RegSettings[SVI_PLANE_COUNT];</div><div class='add'>+</div><div class='add'>+  // SECTION: GPIO Settings</div><div class='add'>+  uint8_t      LedOffGpio;</div><div class='add'>+  uint8_t      FanOffGpio;</div><div class='add'>+  uint8_t      GfxVrPowerStageOffGpio;</div><div class='add'>+</div><div class='add'>+  uint8_t      AcDcGpio;        // GPIO pin configured for AC/DC switching</div><div class='add'>+  uint8_t      AcDcPolarity;    // GPIO polarity for AC/DC switching</div><div class='add'>+  uint8_t      VR0HotGpio;      // GPIO pin configured for VR0 HOT event</div><div class='add'>+  uint8_t      VR0HotPolarity;  // GPIO polarity for VR0 HOT event</div><div class='add'>+</div><div class='add'>+  uint8_t      GthrGpio;        // GPIO pin configured for GTHR Event</div><div class='add'>+  uint8_t      GthrPolarity;    // replace GPIO polarity for GTHR</div><div class='add'>+</div><div class='add'>+  // LED Display Settings</div><div class='add'>+  uint8_t      LedPin0;         // GPIO number for LedPin[0]</div><div class='add'>+  uint8_t      LedPin1;         // GPIO number for LedPin[1]</div><div class='add'>+  uint8_t      LedPin2;         // GPIO number for LedPin[2]</div><div class='add'>+  uint8_t      LedEnableMask;</div><div class='add'>+</div><div class='add'>+  uint8_t      LedPcie;        // GPIO number for PCIE results</div><div class='add'>+  uint8_t      LedError;       // GPIO number for Error Cases</div><div class='add'>+  uint8_t      PaddingLed;</div><div class='add'>+</div><div class='add'>+  // SECTION: Clock Spread Spectrum</div><div class='add'>+</div><div class='add'>+  // UCLK Spread Spectrum</div><div class='add'>+  uint8_t      UclkTrainingModeSpreadPercent; // Q4.4</div><div class='add'>+  uint8_t      UclkSpreadPadding;</div><div class='add'>+  uint16_t     UclkSpreadFreq;      // kHz</div><div class='add'>+</div><div class='add'>+  // UCLK Spread Spectrum</div><div class='add'>+  uint8_t      UclkSpreadPercent[MEM_VENDOR_COUNT];</div><div class='add'>+</div><div class='add'>+  // DFLL Spread Spectrum</div><div class='add'>+  uint8_t      GfxclkSpreadEnable;</div><div class='add'>+</div><div class='add'>+  // FCLK Spread Spectrum</div><div class='add'>+  uint8_t      FclkSpreadPercent;   // Q4.4</div><div class='add'>+  uint16_t     FclkSpreadFreq;      // kHz</div><div class='add'>+</div><div class='add'>+  // Section: Memory Config</div><div class='add'>+  uint8_t      DramWidth; // Width of interface to the channel for each DRAM module. See DRAM_BIT_WIDTH_TYPE_e</div><div class='add'>+  uint8_t      PaddingMem1[7];</div><div class='add'>+</div><div class='add'>+  // SECTION: UMC feature flags</div><div class='add'>+  uint8_t      HsrEnabled;</div><div class='add'>+  uint8_t      VddqOffEnabled;</div><div class='add'>+  uint8_t      PaddingUmcFlags[2];</div><div class='add'>+</div><div class='add'>+  uint32_t    PostVoltageSetBacoDelay; // in microseconds. Amount of time FW will wait after power good is established or PSI0 command is issued</div><div class='add'>+  uint32_t    BacoEntryDelay; // in milliseconds. Amount of time FW will wait to trigger BACO entry after receiving entry notification from OS</div><div class='add'>+</div><div class='add'>+  uint8_t     FuseWritePowerMuxPresent;</div><div class='add'>+  uint8_t     FuseWritePadding[3];</div><div class='add'>+</div><div class='add'>+  // SECTION: EDC Params</div><div class='add'>+  uint32_t    LoadlineGfx;</div><div class='add'>+  uint32_t    LoadlineSoc;</div><div class='add'>+  uint32_t    GfxEdcLimit;</div><div class='add'>+  uint32_t    SocEdcLimit;</div><div class='add'>+</div><div class='add'>+  uint32_t    RestBoardPower;         //power consumed by board that is not captured by the SVI3 input telemetry</div><div class='add'>+  uint32_t    ConnectorsImpedance;   // impedance of the input ATX power connectors</div><div class='add'>+</div><div class='add'>+  uint8_t      EpcsSens0;       //GPIO number for External Power Connector Support Sense0</div><div class='add'>+  uint8_t      EpcsSens1;       //GPIO Number for External Power Connector Support Sense1</div><div class='add'>+  uint8_t      PaddingEpcs[2];</div><div class='add'>+</div><div class='add'>+  // SECTION: Board Reserved</div><div class='add'>+  uint32_t    BoardSpare[52];</div><div class='add'>+</div><div class='add'>+  // SECTION: Structure Padding</div><div class='add'>+</div><div class='add'>+  // Padding for MMHUB - do not modify this</div><div class='add'>+  uint32_t     MmHubPadding[8];</div><div class='add'>+} BoardTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  // SECTION: Infrastructure Limits</div><div class='add'>+  uint16_t    SocketPowerLimitAc[PPT_THROTTLER_COUNT]; // In Watts. Power limit that PMFW attempts to control to in AC mode. Multiple limits supported</div><div class='add'>+</div><div class='add'>+  uint16_t    VrTdcLimit[TDC_THROTTLER_COUNT];         // In Amperes. Current limit associated with VR regulator maximum temperature</div><div class='add'>+</div><div class='add'>+  int16_t     TotalIdleBoardPowerM;</div><div class='add'>+  int16_t     TotalIdleBoardPowerB;</div><div class='add'>+  int16_t     TotalBoardPowerM;</div><div class='add'>+  int16_t     TotalBoardPowerB;</div><div class='add'>+</div><div class='add'>+  uint16_t    TemperatureLimit[TEMP_COUNT]; // In degrees Celsius. Temperature limit associated with each input</div><div class='add'>+</div><div class='add'>+  // SECTION: Fan Control</div><div class='add'>+  uint16_t    FanStopTemp[TEMP_COUNT];          //Celsius</div><div class='add'>+  uint16_t    FanStartTemp[TEMP_COUNT];         //Celsius</div><div class='add'>+</div><div class='add'>+  uint16_t    FanGain[TEMP_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t    FanPwmMin;</div><div class='add'>+  uint16_t    AcousticTargetRpmThreshold;</div><div class='add'>+  uint16_t    AcousticLimitRpmThreshold;</div><div class='add'>+  uint16_t    FanMaximumRpm;</div><div class='add'>+  uint16_t    MGpuAcousticLimitRpmThreshold;</div><div class='add'>+  uint16_t    FanTargetGfxclk;</div><div class='add'>+  uint32_t    TempInputSelectMask;</div><div class='add'>+  uint8_t     FanZeroRpmEnable;</div><div class='add'>+  uint8_t     FanTachEdgePerRev;</div><div class='add'>+  uint16_t    FanPadding;</div><div class='add'>+  uint16_t    FanTargetTemperature[TEMP_COUNT];</div><div class='add'>+</div><div class='add'>+  // The following are AFC override parameters. Leave at 0 to use FW defaults.</div><div class='add'>+  int16_t     FuzzyFan_ErrorSetDelta;</div><div class='add'>+  int16_t     FuzzyFan_ErrorRateSetDelta;</div><div class='add'>+  int16_t     FuzzyFan_PwmSetDelta;</div><div class='add'>+  uint16_t    FuzzyFan_Reserved;</div><div class='add'>+</div><div class='add'>+  uint16_t    FwCtfLimit[TEMP_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t    IntakeTempEnableRPM;</div><div class='add'>+  int16_t     IntakeTempOffsetTemp;</div><div class='add'>+  uint16_t    IntakeTempReleaseTemp;</div><div class='add'>+  uint16_t    IntakeTempHighIntakeAcousticLimit;</div><div class='add'>+</div><div class='add'>+  uint16_t    IntakeTempAcouticLimitReleaseRate;</div><div class='add'>+  int16_t     FanAbnormalTempLimitOffset;    // FanStalledTempLimitOffset</div><div class='add'>+  uint16_t    FanStalledTriggerRpm;          //</div><div class='add'>+  uint16_t    FanAbnormalTriggerRpmCoeff;    // FanAbnormalTriggerRpm</div><div class='add'>+</div><div class='add'>+  uint16_t    FanSpare[1];</div><div class='add'>+  uint8_t     FanIntakeSensorSupport;</div><div class='add'>+  uint8_t     FanIntakePadding;</div><div class='add'>+  uint32_t    FanAmbientPerfBoostThreshold;</div><div class='add'>+  uint32_t    FanSpare2[12];</div><div class='add'>+</div><div class='add'>+  uint16_t TemperatureLimit_Hynix; // In degrees Celsius. Memory temperature limit associated with Hynix</div><div class='add'>+  uint16_t TemperatureLimit_Micron; // In degrees Celsius. Memory temperature limit associated with Micron</div><div class='add'>+  uint16_t TemperatureFwCtfLimit_Hynix;</div><div class='add'>+  uint16_t TemperatureFwCtfLimit_Micron;</div><div class='add'>+</div><div class='add'>+  // SECTION: Board Reserved</div><div class='add'>+  uint16_t    PlatformTdcLimit[TDC_THROTTLER_COUNT];             // In Amperes. Current limit associated with platform maximum temperature per VR current rail</div><div class='add'>+  uint16_t    SocketPowerLimitDc[PPT_THROTTLER_COUNT];  // In Watts. Power limit that PMFW attempts to control to in DC mode. Multiple limits supported</div><div class='add'>+  uint16_t    SocketPowerLimitSmartShift2; // In Watts. Power limit used SmartShift</div><div class='add'>+  uint16_t    CustomSkuSpare16b;</div><div class='add'>+  uint32_t    CustomSkuSpare32b[10];</div><div class='add'>+</div><div class='add'>+  // SECTION: Structure Padding</div><div class='add'>+</div><div class='add'>+  // Padding for MMHUB - do not modify this</div><div class='add'>+  uint32_t    MmHubPadding[8];</div><div class='add'>+} CustomSkuTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  PFE_Settings_t PFE_Settings;</div><div class='add'>+  SkuTable_t SkuTable;</div><div class='add'>+  CustomSkuTable_t CustomSkuTable;</div><div class='add'>+  BoardTable_t BoardTable;</div><div class='add'>+} PPTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  // Time constant parameters for clock averages in ms</div><div class='add'>+  uint16_t     GfxclkAverageLpfTau;</div><div class='add'>+  uint16_t     FclkAverageLpfTau;</div><div class='add'>+  uint16_t     UclkAverageLpfTau;</div><div class='add'>+  uint16_t     GfxActivityLpfTau;</div><div class='add'>+  uint16_t     UclkActivityLpfTau;</div><div class='add'>+  uint16_t     UclkMaxActivityLpfTau;</div><div class='add'>+  uint16_t     SocketPowerLpfTau;</div><div class='add'>+  uint16_t     VcnClkAverageLpfTau;</div><div class='add'>+  uint16_t     VcnUsageAverageLpfTau;</div><div class='add'>+  uint16_t     PcieActivityLpTau;</div><div class='add'>+} DriverSmuConfig_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  DriverSmuConfig_t DriverSmuConfig;</div><div class='add'>+</div><div class='add'>+  uint32_t     Spare[8];</div><div class='add'>+  // Padding - ignore</div><div class='add'>+  uint32_t     MmHubPadding[8]; // SMU internal use</div><div class='add'>+} DriverSmuConfigExternal_t;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+</div><div class='add'>+  uint16_t       FreqTableGfx      [NUM_GFXCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableVclk     [NUM_VCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableDclk     [NUM_DCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableSocclk   [NUM_SOCCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableUclk     [NUM_UCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableDispclk  [NUM_DISPCLK_DPM_LEVELS ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableDppClk   [NUM_DPPCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableDprefclk [NUM_DPREFCLK_DPM_LEVELS];     // In MHz</div><div class='add'>+  uint16_t       FreqTableDcfclk   [NUM_DCFCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableDtbclk   [NUM_DTBCLK_DPM_LEVELS  ];     // In MHz</div><div class='add'>+  uint16_t       FreqTableFclk     [NUM_FCLK_DPM_LEVELS    ];     // In MHz</div><div class='add'>+</div><div class='add'>+  uint16_t       DcModeMaxFreq     [PPCLK_COUNT            ];     // In MHz</div><div class='add'>+</div><div class='add'>+  uint16_t       Padding;</div><div class='add'>+</div><div class='add'>+  uint32_t Spare[32];</div><div class='add'>+</div><div class='add'>+  // Padding - ignore</div><div class='add'>+  uint32_t     MmHubPadding[8]; // SMU internal use</div><div class='add'>+</div><div class='add'>+} DriverInfoTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint32_t CurrClock[PPCLK_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t AverageGfxclkFrequencyTarget;</div><div class='add'>+  uint16_t AverageGfxclkFrequencyPreDs;</div><div class='add'>+  uint16_t AverageGfxclkFrequencyPostDs;</div><div class='add'>+  uint16_t AverageFclkFrequencyPreDs;</div><div class='add'>+  uint16_t AverageFclkFrequencyPostDs;</div><div class='add'>+  uint16_t AverageMemclkFrequencyPreDs  ; // this is scaled to actual memory clock</div><div class='add'>+  uint16_t AverageMemclkFrequencyPostDs  ; // this is scaled to actual memory clock</div><div class='add'>+  uint16_t AverageVclk0Frequency  ;</div><div class='add'>+  uint16_t AverageDclk0Frequency  ;</div><div class='add'>+  uint16_t AverageVclk1Frequency  ;</div><div class='add'>+  uint16_t AverageDclk1Frequency  ;</div><div class='add'>+  uint16_t PCIeBusy               ;</div><div class='add'>+  uint16_t dGPU_W_MAX             ;</div><div class='add'>+  uint16_t padding                ;</div><div class='add'>+</div><div class='add'>+  uint32_t MetricsCounter         ;</div><div class='add'>+</div><div class='add'>+  uint16_t AvgVoltage[SVI_PLANE_COUNT];</div><div class='add'>+  uint16_t AvgCurrent[SVI_PLANE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t AverageGfxActivity    ;</div><div class='add'>+  uint16_t AverageUclkActivity   ;</div><div class='add'>+  uint16_t Vcn0ActivityPercentage  ;</div><div class='add'>+  uint16_t Vcn1ActivityPercentage  ;</div><div class='add'>+</div><div class='add'>+  uint32_t EnergyAccumulator;</div><div class='add'>+  uint16_t AverageSocketPower;</div><div class='add'>+  uint16_t AverageTotalBoardPower;</div><div class='add'>+</div><div class='add'>+  uint16_t AvgTemperature[TEMP_COUNT];</div><div class='add'>+  uint16_t AvgTemperatureFanIntake;</div><div class='add'>+</div><div class='add'>+  uint8_t  PcieRate               ;</div><div class='add'>+  uint8_t  PcieWidth              ;</div><div class='add'>+</div><div class='add'>+  uint8_t  AvgFanPwm;</div><div class='add'>+  uint8_t  Padding[1];</div><div class='add'>+  uint16_t AvgFanRpm;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  uint8_t  ThrottlingPercentage[THROTTLER_COUNT];</div><div class='add'>+  uint8_t  padding1[3];</div><div class='add'>+</div><div class='add'>+  //metrics for D3hot entry/exit and driver ARM msgs</div><div class='add'>+  uint32_t D3HotEntryCountPerMode[D3HOT_SEQUENCE_COUNT];</div><div class='add'>+  uint32_t D3HotExitCountPerMode[D3HOT_SEQUENCE_COUNT];</div><div class='add'>+  uint32_t ArmMsgReceivedCountPerMode[D3HOT_SEQUENCE_COUNT];</div><div class='add'>+</div><div class='add'>+  uint16_t ApuSTAPMSmartShiftLimit;</div><div class='add'>+  uint16_t ApuSTAPMLimit;</div><div class='add'>+  uint16_t AvgApuSocketPower;</div><div class='add'>+</div><div class='add'>+  uint16_t AverageUclkActivity_MAX;</div><div class='add'>+</div><div class='add'>+  uint32_t PublicSerialNumberLower;</div><div class='add'>+  uint32_t PublicSerialNumberUpper;</div><div class='add'>+</div><div class='add'>+} SmuMetrics_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  SmuMetrics_t SmuMetrics;</div><div class='add'>+  uint32_t Spare[30];</div><div class='add'>+</div><div class='add'>+  // Padding - ignore</div><div class='add'>+  uint32_t     MmHubPadding[8]; // SMU internal use</div><div class='add'>+} SmuMetricsExternal_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t  WmSetting;</div><div class='add'>+  uint8_t  Flags;</div><div class='add'>+  uint8_t  Padding[2];</div><div class='add'>+</div><div class='add'>+} WatermarkRowGeneric_t;</div><div class='add'>+</div><div class='add'>+#define NUM_WM_RANGES 4</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+  WATERMARKS_CLOCK_RANGE = 0,</div><div class='add'>+  WATERMARKS_DUMMY_PSTATE,</div><div class='add'>+  WATERMARKS_MALL,</div><div class='add'>+  WATERMARKS_COUNT,</div><div class='add'>+} WATERMARKS_FLAGS_e;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  // Watermarks</div><div class='add'>+  WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES];</div><div class='add'>+} Watermarks_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  Watermarks_t Watermarks;</div><div class='add'>+  uint32_t  Spare[16];</div><div class='add'>+</div><div class='add'>+  uint32_t     MmHubPadding[8]; // SMU internal use</div><div class='add'>+} WatermarksExternal_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint16_t avgPsmCount[76];</div><div class='add'>+  uint16_t minPsmCount[76];</div><div class='add'>+  uint16_t maxPsmCount[76];</div><div class='add'>+  float    avgPsmVoltage[76];</div><div class='add'>+  float    minPsmVoltage[76];</div><div class='add'>+  float    maxPsmVoltage[76];</div><div class='add'>+} AvfsDebugTable_t;</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  AvfsDebugTable_t AvfsDebugTable;</div><div class='add'>+</div><div class='add'>+  uint32_t     MmHubPadding[8]; // SMU internal use</div><div class='add'>+} AvfsDebugTableExternal_t;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  uint8_t   Gfx_ActiveHystLimit;</div><div class='add'>+  uint8_t   Gfx_IdleHystLimit;</div><div class='add'>+  uint8_t   Gfx_FPS;</div><div class='add'>+  uint8_t   Gfx_MinActiveFreqType;</div><div class='add'>+  uint8_t   Gfx_BoosterFreqType;</div><div class='add'>+  uint8_t   PaddingGfx;</div><div class='add'>+  uint16_t  Gfx_MinActiveFreq;              // MHz</div><div class='add'>+  uint16_t  Gfx_BoosterFreq;                // MHz</div><div class='add'>+  uint16_t  Gfx_PD_Data_time_constant;      // Time constant of PD controller in ms</div><div class='add'>+  uint32_t  Gfx_PD_Data_limit_a;            // Q16</div><div class='add'>+  uint32_t  Gfx_PD_Data_limit_b;            // Q16</div><div class='add'>+  uint32_t  Gfx_PD_Data_limit_c;            // Q16</div><div class='add'>+  uint32_t  Gfx_PD_Data_error_coeff;        // Q16</div><div class='add'>+  uint32_t  Gfx_PD_Data_error_rate_coeff;   // Q16</div><div class='add'>+</div><div class='add'>+  uint8_t   Fclk_ActiveHystLimit;</div><div class='add'>+  uint8_t   Fclk_IdleHystLimit;</div><div class='add'>+  uint8_t   Fclk_FPS;</div><div class='add'>+  uint8_t   Fclk_MinActiveFreqType;</div><div class='add'>+  uint8_t   Fclk_BoosterFreqType;</div><div class='add'>+  uint8_t   PaddingFclk;</div><div class='add'>+  uint16_t  Fclk_MinActiveFreq;              // MHz</div><div class='add'>+  uint16_t  Fclk_BoosterFreq;                // MHz</div><div class='add'>+  uint16_t  Fclk_PD_Data_time_constant;      // Time constant of PD controller in ms</div><div class='add'>+  uint32_t  Fclk_PD_Data_limit_a;            // Q16</div><div class='add'>+  uint32_t  Fclk_PD_Data_limit_b;            // Q16</div><div class='add'>+  uint32_t  Fclk_PD_Data_limit_c;            // Q16</div><div class='add'>+  uint32_t  Fclk_PD_Data_error_coeff;        // Q16</div><div class='add'>+  uint32_t  Fclk_PD_Data_error_rate_coeff;   // Q16</div><div class='add'>+</div><div class='add'>+  uint32_t  Mem_UpThreshold_Limit[NUM_UCLK_DPM_LEVELS];          // Q16</div><div class='add'>+  uint8_t   Mem_UpHystLimit[NUM_UCLK_DPM_LEVELS];</div><div class='add'>+  uint16_t  Mem_DownHystLimit[NUM_UCLK_DPM_LEVELS];</div><div class='add'>+  uint16_t  Mem_Fps;</div><div class='add'>+</div><div class='add'>+} DpmActivityMonitorCoeffInt_t;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+typedef struct {</div><div class='add'>+  DpmActivityMonitorCoeffInt_t DpmActivityMonitorCoeffInt;</div><div class='add'>+  uint32_t     MmHubPadding[8]; // SMU internal use</div><div class='add'>+} DpmActivityMonitorCoeffIntExternal_t;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// Workload bits</div><div class='add'>+#define WORKLOAD_PPLIB_DEFAULT_BIT        0</div><div class='add'>+#define WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT 1</div><div class='add'>+#define WORKLOAD_PPLIB_POWER_SAVING_BIT   2</div><div class='add'>+#define WORKLOAD_PPLIB_VIDEO_BIT          3</div><div class='add'>+#define WORKLOAD_PPLIB_VR_BIT             4</div><div class='add'>+#define WORKLOAD_PPLIB_COMPUTE_BIT        5</div><div class='add'>+#define WORKLOAD_PPLIB_CUSTOM_BIT         6</div><div class='add'>+#define WORKLOAD_PPLIB_WINDOW_3D_BIT      7</div><div class='add'>+#define WORKLOAD_PPLIB_DIRECT_ML_BIT      8</div><div class='add'>+#define WORKLOAD_PPLIB_CGVDI_BIT          9</div><div class='add'>+#define WORKLOAD_PPLIB_COUNT              10</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+// These defines are used with the following messages:</div><div class='add'>+// SMC_MSG_TransferTableDram2Smu</div><div class='add'>+// SMC_MSG_TransferTableSmu2Dram</div><div class='add'>+</div><div class='add'>+// Table transfer status</div><div class='add'>+#define TABLE_TRANSFER_OK         0x0</div><div class='add'>+#define TABLE_TRANSFER_FAILED     0xFF</div><div class='add'>+#define TABLE_TRANSFER_PENDING    0xAB</div><div class='add'>+</div><div class='add'>+// Table types</div><div class='add'>+#define TABLE_PPTABLE            0</div><div class='add'>+#define TABLE_COMBO_PPTABLE           1</div><div class='add'>+#define TABLE_WATERMARKS              2</div><div class='add'>+#define TABLE_AVFS_PSM_DEBUG          3</div><div class='add'>+#define TABLE_PMSTATUSLOG             4</div><div class='add'>+#define TABLE_SMU_METRICS             5</div><div class='add'>+#define TABLE_DRIVER_SMU_CONFIG       6</div><div class='add'>+#define TABLE_ACTIVITY_MONITOR_COEFF  7</div><div class='add'>+#define TABLE_OVERDRIVE               8</div><div class='add'>+#define TABLE_I2C_COMMANDS            9</div><div class='add'>+#define TABLE_DRIVER_INFO             10</div><div class='add'>+#define TABLE_ECCINFO                 11</div><div class='add'>+#define TABLE_CUSTOM_SKUTABLE         12</div><div class='add'>+#define TABLE_COUNT                   13</div><div class='add'>+</div><div class='add'>+//IH Interupt ID</div><div class='add'>+#define IH_INTERRUPT_ID_TO_DRIVER                   0xFE</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_BACO                0x2</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_AC                  0x3</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_DC                  0x4</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_AUDIO_D0            0x5</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_AUDIO_D3            0x6</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_THERMAL_THROTTLING  0x7</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_FAN_ABNORMAL        0x8</div><div class='add'>+#define IH_INTERRUPT_CONTEXT_ID_FAN_RECOVERY        0x9</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h<br/>index 7b812b9994d7..0b3c2f54a343 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h</a></div><div class='hunk'>@@ -123,7 +123,7 @@ typedef enum {</div><div class='ctx'>   VOLTAGE_GUARDBAND_COUNT</div><div class='ctx'> } GFX_GUARDBAND_e;</div><div class='ctx'> </div><div class='del'>-#define SMU_METRICS_TABLE_VERSION 0xB</div><div class='add'>+#define SMU_METRICS_TABLE_VERSION 0xC</div><div class='ctx'> </div><div class='ctx'> typedef struct __attribute__((packed, aligned(4))) {</div><div class='ctx'>   uint32_t AccumulationCounter;</div><div class='hunk'>@@ -223,6 +223,10 @@ typedef struct __attribute__((packed, aligned(4))) {</div><div class='ctx'>   // VCN/JPEG ACTIVITY</div><div class='ctx'>   uint32_t VcnBusy[4];</div><div class='ctx'>   uint32_t JpegBusy[32];</div><div class='add'>+</div><div class='add'>+  // PCIE LINK Speed and width</div><div class='add'>+  uint32_t PCIeLinkSpeed;</div><div class='add'>+  uint32_t PCIeLinkWidth;</div><div class='ctx'> } MetricsTableX_t;</div><div class='ctx'> </div><div class='ctx'> typedef struct __attribute__((packed, aligned(4))) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h<br/>new file mode 100644<br/>index 000000000000..de2e442281ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef SMU_V14_0_2_PPSMC_H</div><div class='add'>+#define SMU_V14_0_2_PPSMC_H</div><div class='add'>+</div><div class='add'>+#define PPSMC_VERSION 0x1</div><div class='add'>+</div><div class='add'>+// SMU Response Codes:</div><div class='add'>+#define PPSMC_Result_OK                    0x1</div><div class='add'>+#define PPSMC_Result_Failed                0xFF</div><div class='add'>+#define PPSMC_Result_UnknownCmd            0xFE</div><div class='add'>+#define PPSMC_Result_CmdRejectedPrereq     0xFD</div><div class='add'>+#define PPSMC_Result_CmdRejectedBusy       0xFC</div><div class='add'>+</div><div class='add'>+// Message Definitions:</div><div class='add'>+// BASIC</div><div class='add'>+#define PPSMC_MSG_TestMessage                    0x1</div><div class='add'>+#define PPSMC_MSG_GetSmuVersion                  0x2</div><div class='add'>+#define PPSMC_MSG_GetDriverIfVersion             0x3</div><div class='add'>+#define PPSMC_MSG_SetAllowedFeaturesMaskLow      0x4</div><div class='add'>+#define PPSMC_MSG_SetAllowedFeaturesMaskHigh     0x5</div><div class='add'>+#define PPSMC_MSG_EnableAllSmuFeatures           0x6</div><div class='add'>+#define PPSMC_MSG_DisableAllSmuFeatures          0x7</div><div class='add'>+#define PPSMC_MSG_EnableSmuFeaturesLow           0x8</div><div class='add'>+#define PPSMC_MSG_EnableSmuFeaturesHigh          0x9</div><div class='add'>+#define PPSMC_MSG_DisableSmuFeaturesLow          0xA</div><div class='add'>+#define PPSMC_MSG_DisableSmuFeaturesHigh         0xB</div><div class='add'>+#define PPSMC_MSG_GetRunningSmuFeaturesLow       0xC</div><div class='add'>+#define PPSMC_MSG_GetRunningSmuFeaturesHigh      0xD</div><div class='add'>+#define PPSMC_MSG_SetDriverDramAddrHigh          0xE</div><div class='add'>+#define PPSMC_MSG_SetDriverDramAddrLow           0xF</div><div class='add'>+#define PPSMC_MSG_SetToolsDramAddrHigh           0x10</div><div class='add'>+#define PPSMC_MSG_SetToolsDramAddrLow            0x11</div><div class='add'>+#define PPSMC_MSG_TransferTableSmu2Dram          0x12</div><div class='add'>+#define PPSMC_MSG_TransferTableDram2Smu          0x13</div><div class='add'>+#define PPSMC_MSG_UseDefaultPPTable              0x14</div><div class='add'>+</div><div class='add'>+//BACO/BAMACO/BOMACO</div><div class='add'>+#define PPSMC_MSG_EnterBaco                      0x15</div><div class='add'>+#define PPSMC_MSG_ExitBaco                       0x16</div><div class='add'>+#define PPSMC_MSG_ArmD3                          0x17</div><div class='add'>+#define PPSMC_MSG_BacoAudioD3PME                 0x18</div><div class='add'>+</div><div class='add'>+//DPM</div><div class='add'>+#define PPSMC_MSG_SetSoftMinByFreq               0x19</div><div class='add'>+#define PPSMC_MSG_SetSoftMaxByFreq               0x1A</div><div class='add'>+#define PPSMC_MSG_SetHardMinByFreq               0x1B</div><div class='add'>+#define PPSMC_MSG_SetHardMaxByFreq               0x1C</div><div class='add'>+#define PPSMC_MSG_GetMinDpmFreq                  0x1D</div><div class='add'>+#define PPSMC_MSG_GetMaxDpmFreq                  0x1E</div><div class='add'>+#define PPSMC_MSG_GetDpmFreqByIndex              0x1F</div><div class='add'>+#define PPSMC_MSG_OverridePcieParameters         0x20</div><div class='add'>+</div><div class='add'>+//DramLog Set DramAddr</div><div class='add'>+#define PPSMC_MSG_DramLogSetDramAddrHigh         0x21</div><div class='add'>+#define PPSMC_MSG_DramLogSetDramAddrLow          0x22</div><div class='add'>+#define PPSMC_MSG_DramLogSetDramSize             0x23</div><div class='add'>+#define PPSMC_MSG_SetWorkloadMask                0x24</div><div class='add'>+</div><div class='add'>+#define PPSMC_MSG_GetVoltageByDpm                0x25 // Can be removed</div><div class='add'>+#define PPSMC_MSG_SetVideoFps                    0x26 // Can be removed</div><div class='add'>+#define PPSMC_MSG_GetDcModeMaxDpmFreq            0x27</div><div class='add'>+</div><div class='add'>+//Power Gating</div><div class='add'>+#define PPSMC_MSG_AllowGfxOff                    0x28</div><div class='add'>+#define PPSMC_MSG_DisallowGfxOff                 0x29</div><div class='add'>+#define PPSMC_MSG_PowerUpVcn                     0x2A</div><div class='add'>+#define PPSMC_MSG_PowerDownVcn                   0x2B</div><div class='add'>+#define PPSMC_MSG_PowerUpJpeg                    0x2C</div><div class='add'>+#define PPSMC_MSG_PowerDownJpeg                  0x2D</div><div class='add'>+</div><div class='add'>+//Resets</div><div class='add'>+#define PPSMC_MSG_PrepareMp1ForUnload            0x2E</div><div class='add'>+#define PPSMC_MSG_Mode1Reset                     0x2F</div><div class='add'>+</div><div class='add'>+//Set SystemVirtual DramAddrHigh</div><div class='add'>+#define PPSMC_MSG_SetSystemVirtualDramAddrHigh   0x30</div><div class='add'>+#define PPSMC_MSG_SetSystemVirtualDramAddrLow    0x31</div><div class='add'>+//ACDC Power Source</div><div class='add'>+#define PPSMC_MSG_SetPptLimit                    0x32</div><div class='add'>+#define PPSMC_MSG_GetPptLimit                    0x33</div><div class='add'>+#define PPSMC_MSG_ReenableAcDcInterrupt          0x34</div><div class='add'>+#define PPSMC_MSG_NotifyPowerSource              0x35</div><div class='add'>+</div><div class='add'>+//BTC</div><div class='add'>+#define PPSMC_MSG_RunDcBtc                       0x36</div><div class='add'>+</div><div class='add'>+//                                               0x37</div><div class='add'>+</div><div class='add'>+//Others</div><div class='add'>+#define PPSMC_MSG_SetTemperatureInputSelect      0x38 // Can be removed</div><div class='add'>+#define PPSMC_MSG_SetFwDstatesMask               0x39</div><div class='add'>+#define PPSMC_MSG_SetThrottlerMask               0x3A</div><div class='add'>+</div><div class='add'>+#define PPSMC_MSG_SetExternalClientDfCstateAllow 0x3B</div><div class='add'>+</div><div class='add'>+#define PPSMC_MSG_SetMGpuFanBoostLimitRpm        0x3C</div><div class='add'>+</div><div class='add'>+//STB to dram log</div><div class='add'>+#define PPSMC_MSG_DumpSTBtoDram                  0x3D</div><div class='add'>+#define PPSMC_MSG_STBtoDramLogSetDramAddrHigh    0x3E</div><div class='add'>+#define PPSMC_MSG_STBtoDramLogSetDramAddrLow     0x3F</div><div class='add'>+#define PPSMC_MSG_STBtoDramLogSetDramSize        0x40</div><div class='add'>+#define PPSMC_MSG_SetOBMTraceBufferLogging       0x41</div><div class='add'>+</div><div class='add'>+#define PPSMC_MSG_AllowGfxDcs                    0x43</div><div class='add'>+#define PPSMC_MSG_DisallowGfxDcs                 0x44</div><div class='add'>+#define PPSMC_MSG_EnableAudioStutterWA           0x45</div><div class='add'>+#define PPSMC_MSG_PowerUpUmsch                   0x46</div><div class='add'>+#define PPSMC_MSG_PowerDownUmsch                 0x47</div><div class='add'>+#define PPSMC_MSG_SetDcsArch                     0x48</div><div class='add'>+#define PPSMC_MSG_TriggerVFFLR                   0x49</div><div class='add'>+#define PPSMC_MSG_SetNumBadMemoryPagesRetired    0x4A</div><div class='add'>+#define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4B</div><div class='add'>+#define PPSMC_MSG_SetPriorityDeltaGain           0x4C</div><div class='add'>+#define PPSMC_MSG_AllowIHHostInterrupt           0x4D</div><div class='add'>+#define PPSMC_MSG_Mode3Reset                     0x4F</div><div class='add'>+#define PPSMC_Message_Count                      0x50</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h<br/>index af427cc7dbb8..c48214e3dc8e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h</a></div><div class='hunk'>@@ -445,4 +445,11 @@ enum smu_feature_mask {</div><div class='ctx'> 	SMU_FEATURE_COUNT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Message category flags */</div><div class='add'>+#define SMU_MSG_VF_FLAG			(1U &lt;&lt; 0)</div><div class='add'>+#define SMU_MSG_RAS_PRI			(1U &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+/* Firmware capability flags */</div><div class='add'>+#define SMU_FW_CAP_RAS_PRI		(1U &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h<br/>index a0e5ad0381d6..c2ab336bb530 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h</a></div><div class='hunk'>@@ -237,7 +237,7 @@ int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu);</div><div class='ctx'> int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,</div><div class='ctx'> 		struct pp_smu_nv_clock_table *max_clocks);</div><div class='ctx'> </div><div class='del'>-bool smu_v11_0_baco_is_support(struct smu_context *smu);</div><div class='add'>+int smu_v11_0_get_bamaco_support(struct smu_context *smu);</div><div class='ctx'> </div><div class='ctx'> enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h<br/>index fbd57fa1a004..d9700a3f28d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h</a></div><div class='hunk'>@@ -210,7 +210,7 @@ int smu_v13_0_set_azalia_d3_pme(struct smu_context *smu);</div><div class='ctx'> int smu_v13_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,</div><div class='ctx'> 					       struct pp_smu_nv_clock_table *max_clocks);</div><div class='ctx'> </div><div class='del'>-bool smu_v13_0_baco_is_support(struct smu_context *smu);</div><div class='add'>+int smu_v13_0_get_bamaco_support(struct smu_context *smu);</div><div class='ctx'> </div><div class='ctx'> int smu_v13_0_baco_enter(struct smu_context *smu);</div><div class='ctx'> int smu_v13_0_baco_exit(struct smu_context *smu);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h<br/>index 4af1985ae446..1fc4557e6fb4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #define SMU14_DRIVER_IF_VERSION_INV 0xFFFFFFFF</div><div class='ctx'> #define SMU14_DRIVER_IF_VERSION_SMU_V14_0_0 0x7</div><div class='ctx'> #define SMU14_DRIVER_IF_VERSION_SMU_V14_0_1 0x6</div><div class='del'>-#define SMU14_DRIVER_IF_VERSION_SMU_V14_0_2 0x1</div><div class='add'>+#define SMU14_DRIVER_IF_VERSION_SMU_V14_0_2 0x25</div><div class='ctx'> </div><div class='ctx'> #define FEATURE_MASK(feature) (1ULL &lt;&lt; feature)</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +39,8 @@</div><div class='ctx'> #define MP1_SRAM			0x03c00004</div><div class='ctx'> </div><div class='ctx'> /* address block */</div><div class='del'>-#define smnMP1_FIRMWARE_FLAGS		0x3010028</div><div class='add'>+#define smnMP1_FIRMWARE_FLAGS_14_0_0	0x3010028</div><div class='add'>+#define smnMP1_FIRMWARE_FLAGS		0x3010024</div><div class='ctx'> #define smnMP1_PUB_CTRL			0x3010d10</div><div class='ctx'> </div><div class='ctx'> #define MAX_DPM_LEVELS 16</div><div class='hunk'>@@ -160,7 +161,7 @@ int smu_v14_0_register_irq_handler(struct smu_context *smu);</div><div class='ctx'> int smu_v14_0_baco_set_armd3_sequence(struct smu_context *smu,</div><div class='ctx'> 				      enum smu_baco_seq baco_seq);</div><div class='ctx'> </div><div class='del'>-bool smu_v14_0_baco_is_support(struct smu_context *smu);</div><div class='add'>+int smu_v14_0_get_bamaco_support(struct smu_context *smu);</div><div class='ctx'> </div><div class='ctx'> enum smu_baco_state smu_v14_0_baco_get_state(struct smu_context *smu);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h<br/>new file mode 100644<br/>index 000000000000..4a3fde89aed7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h</a></div><div class='hunk'>@@ -0,0 +1,164 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef SMU_14_0_2_PPTABLE_H</div><div class='add'>+#define SMU_14_0_2_PPTABLE_H</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#pragma pack(push, 1)</div><div class='add'>+</div><div class='add'>+#define SMU_14_0_2_TABLE_FORMAT_REVISION 3</div><div class='add'>+</div><div class='add'>+// POWERPLAYTABLE::ulPlatformCaps</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_POWERPLAY        0x1     // This cap indicates whether CCC need to show Powerplay page.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x2     // This cap indicates whether power source notificaiton is done by SBIOS instead of OS.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_HARDWAREDC       0x4     // This cap indicates whether DC mode notificaiton is done by GPIO pin directly.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_BACO             0x8     // This cap indicates whether board supports the BACO circuitry.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_MACO             0x10    // This cap indicates whether board supports the MACO circuitry.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_SHADOWPSTATE     0x20    // This cap indicates whether board supports the Shadow Pstate.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_LEDSUPPORTED     0x40    // This cap indicates whether board supports the LED.</div><div class='add'>+#define SMU_14_0_2_PP_PLATFORM_CAP_MOBILEOVERDRIVE  0x80    // This cap indicates whether board supports the Mobile Overdrive.</div><div class='add'>+</div><div class='add'>+// SMU_14_0_2_PP_THERMALCONTROLLER - Thermal Controller Type</div><div class='add'>+#define SMU_14_0_2_PP_THERMALCONTROLLER_NONE        0</div><div class='add'>+</div><div class='add'>+#define SMU_14_0_2_PP_OVERDRIVE_VERSION             0x1     // TODO: FIX OverDrive Version TBD</div><div class='add'>+#define SMU_14_0_2_PP_POWERSAVINGCLOCK_VERSION      0x01    // Power Saving Clock Table Version 1.00</div><div class='add'>+</div><div class='add'>+enum SMU_14_0_2_OD_SW_FEATURE_CAP</div><div class='add'>+{</div><div class='add'>+    SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT        = 0,</div><div class='add'>+    SMU_14_0_2_ODCAP_POWER_MODE                     = 1,</div><div class='add'>+    SMU_14_0_2_ODCAP_AUTO_UV_ENGINE                 = 2,</div><div class='add'>+    SMU_14_0_2_ODCAP_AUTO_OC_ENGINE                 = 3,</div><div class='add'>+    SMU_14_0_2_ODCAP_AUTO_OC_MEMORY                 = 4,</div><div class='add'>+    SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE             = 5,</div><div class='add'>+    SMU_14_0_2_ODCAP_MANUAL_AC_TIMING               = 6,</div><div class='add'>+    SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER        = 7,</div><div class='add'>+    SMU_14_0_2_ODCAP_AUTO_SOC_UV                    = 8,</div><div class='add'>+    SMU_14_0_2_ODCAP_COUNT                          = 9,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum SMU_14_0_2_OD_SW_FEATURE_ID</div><div class='add'>+{</div><div class='add'>+    SMU_14_0_2_ODFEATURE_AUTO_FAN_ACOUSTIC_LIMIT      = 1 &lt;&lt; SMU_14_0_2_ODCAP_AUTO_FAN_ACOUSTIC_LIMIT,      // Auto Fan Acoustic RPM</div><div class='add'>+    SMU_14_0_2_ODFEATURE_POWER_MODE                   = 1 &lt;&lt; SMU_14_0_2_ODCAP_POWER_MODE,                   // Optimized GPU Power Mode</div><div class='add'>+    SMU_14_0_2_ODFEATURE_AUTO_UV_ENGINE               = 1 &lt;&lt; SMU_14_0_2_ODCAP_AUTO_UV_ENGINE,               // Auto Under Volt GFXCLK</div><div class='add'>+    SMU_14_0_2_ODFEATURE_AUTO_OC_ENGINE               = 1 &lt;&lt; SMU_14_0_2_ODCAP_AUTO_OC_ENGINE,               // Auto Over Clock GFXCLK</div><div class='add'>+    SMU_14_0_2_ODFEATURE_AUTO_OC_MEMORY               = 1 &lt;&lt; SMU_14_0_2_ODCAP_AUTO_OC_MEMORY,               // Auto Over Clock MCLK</div><div class='add'>+    SMU_14_0_2_ODFEATURE_MEMORY_TIMING_TUNE           = 1 &lt;&lt; SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE,           // Auto AC Timing Tuning</div><div class='add'>+    SMU_14_0_2_ODFEATURE_MANUAL_AC_TIMING             = 1 &lt;&lt; SMU_14_0_2_ODCAP_MANUAL_AC_TIMING,             // Manual fine grain AC Timing tuning</div><div class='add'>+    SMU_14_0_2_ODFEATURE_AUTO_VF_CURVE_OPTIMIZER      = 1 &lt;&lt; SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER,      // Fine grain auto VF curve tuning</div><div class='add'>+    SMU_14_0_2_ODFEATURE_AUTO_SOC_UV                  = 1 &lt;&lt; SMU_14_0_2_ODCAP_AUTO_SOC_UV,                  // Auto Unver Volt VDDSOC</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SMU_14_0_2_MAX_ODFEATURE 32 // Maximum Number of OD Features</div><div class='add'>+</div><div class='add'>+enum SMU_14_0_2_OD_SW_FEATURE_SETTING_ID</div><div class='add'>+{</div><div class='add'>+    SMU_14_0_2_ODSETTING_AUTO_FAN_ACOUSTIC_LIMIT    = 0,</div><div class='add'>+    SMU_14_0_2_ODSETTING_POWER_MODE                 = 1,</div><div class='add'>+    SMU_14_0_2_ODSETTING_AUTOUVENGINE               = 2,</div><div class='add'>+    SMU_14_0_2_ODSETTING_AUTOOCENGINE               = 3,</div><div class='add'>+    SMU_14_0_2_ODSETTING_AUTOOCMEMORY               = 4,</div><div class='add'>+    SMU_14_0_2_ODSETTING_ACTIMING                   = 5,</div><div class='add'>+    SMU_14_0_2_ODSETTING_MANUAL_AC_TIMING           = 6,</div><div class='add'>+    SMU_14_0_2_ODSETTING_AUTO_VF_CURVE_OPTIMIZER    = 7,</div><div class='add'>+    SMU_14_0_2_ODSETTING_AUTO_SOC_UV                = 8,</div><div class='add'>+    SMU_14_0_2_ODSETTING_COUNT                      = 9,</div><div class='add'>+};</div><div class='add'>+#define SMU_14_0_2_MAX_ODSETTING 64 // Maximum Number of ODSettings</div><div class='add'>+</div><div class='add'>+enum SMU_14_0_2_PWRMODE_SETTING</div><div class='add'>+{</div><div class='add'>+    SMU_14_0_2_PMSETTING_POWER_LIMIT_QUIET = 0,</div><div class='add'>+    SMU_14_0_2_PMSETTING_POWER_LIMIT_BALANCE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_POWER_LIMIT_TURBO,</div><div class='add'>+    SMU_14_0_2_PMSETTING_POWER_LIMIT_RAGE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_QUIET,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_BALANCE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_TURBO,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TEMP_RAGE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_QUIET,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_BALANCE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_TURBO,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_TARGET_RPM_RAGE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_QUIET,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO,</div><div class='add'>+    SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE,</div><div class='add'>+};</div><div class='add'>+#define SMU_14_0_2_MAX_PMSETTING 32 // Maximum Number of PowerMode Settings</div><div class='add'>+</div><div class='add'>+enum SMU_14_0_2_overdrive_table_id</div><div class='add'>+{</div><div class='add'>+    SMU_14_0_2_OVERDRIVE_TABLE_BASIC    = 0,</div><div class='add'>+    SMU_14_0_2_OVERDRIVE_TABLE_ADVANCED = 1,</div><div class='add'>+    SMU_14_0_2_OVERDRIVE_TABLE_COUNT    = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct smu_14_0_2_overdrive_table</div><div class='add'>+{</div><div class='add'>+    uint8_t revision;                                                           // Revision = SMU_14_0_2_PP_OVERDRIVE_VERSION</div><div class='add'>+    uint8_t reserve[3];                                                         // Zero filled field reserved for future use</div><div class='add'>+    uint8_t cap[SMU_14_0_2_OVERDRIVE_TABLE_COUNT][SMU_14_0_2_MAX_ODFEATURE];    // OD feature support flags</div><div class='add'>+    int32_t max[SMU_14_0_2_OVERDRIVE_TABLE_COUNT][SMU_14_0_2_MAX_ODSETTING];    // maximum settings</div><div class='add'>+    int32_t min[SMU_14_0_2_OVERDRIVE_TABLE_COUNT][SMU_14_0_2_MAX_ODSETTING];    // minimum settings</div><div class='add'>+    int16_t pm_setting[SMU_14_0_2_MAX_PMSETTING];                               // Optimized power mode feature settings</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct smu_14_0_2_powerplay_table</div><div class='add'>+{</div><div class='add'>+    struct atom_common_table_header header;                 // header.format_revision = 3 (HAS TO MATCH SMU_14_0_2_TABLE_FORMAT_REVISION), header.content_revision = ? structuresize is calculated by PPGen.</div><div class='add'>+    uint8_t table_revision;                                 // PPGen use only: table_revision = 3</div><div class='add'>+    uint8_t padding;                                        // Padding 1 byte to align table_size offset to 6 bytes (pmfw_start_offset, for PMFW to know the starting offset of PPTable_t).</div><div class='add'>+    uint16_t pmfw_pptable_start_offset;                     // The start offset of the pmfw portion. i.e. start of PPTable_t (start of SkuTable_t)</div><div class='add'>+    uint16_t pmfw_pptable_size;                             // The total size of pmfw_pptable, i.e PPTable_t.</div><div class='add'>+    uint16_t pmfw_pfe_table_start_offset;                   // The start offset of the PFE_Settings_t within pmfw_pptable.</div><div class='add'>+    uint16_t pmfw_pfe_table_size;                           // The size of PFE_Settings_t.</div><div class='add'>+    uint16_t pmfw_board_table_start_offset;                 // The start offset of the BoardTable_t within pmfw_pptable.</div><div class='add'>+    uint16_t pmfw_board_table_size;                         // The size of BoardTable_t.</div><div class='add'>+    uint16_t pmfw_custom_sku_table_start_offset;            // The start offset of the CustomSkuTable_t within pmfw_pptable.</div><div class='add'>+    uint16_t pmfw_custom_sku_table_size;                    // The size of the CustomSkuTable_t.</div><div class='add'>+    uint32_t golden_pp_id;                                  // PPGen use only: PP Table ID on the Golden Data Base</div><div class='add'>+    uint32_t golden_revision;                               // PPGen use only: PP Table Revision on the Golden Data Base</div><div class='add'>+    uint16_t format_id;                                     // PPGen use only: PPTable for different ASICs.</div><div class='add'>+    uint32_t platform_caps;                                 // POWERPLAYTABLE::ulPlatformCaps</div><div class='add'>+</div><div class='add'>+    uint8_t thermal_controller_type;                        // one of smu_14_0_2_PP_THERMALCONTROLLER</div><div class='add'>+</div><div class='add'>+    uint16_t small_power_limit1;</div><div class='add'>+    uint16_t small_power_limit2;</div><div class='add'>+    uint16_t boost_power_limit;                             // For Gemini Board, when the slave adapter is in BACO mode, the master adapter will use this boost power limit instead of the default power limit to boost the power limit.</div><div class='add'>+    uint16_t software_shutdown_temp;</div><div class='add'>+</div><div class='add'>+    uint8_t reserve[143];                                   // Zero filled field reserved for future use</div><div class='add'>+</div><div class='add'>+    struct smu_14_0_2_overdrive_table overdrive_table;</div><div class='add'>+</div><div class='add'>+    PPTable_t smc_pptable;                          // PPTable_t in driver_if.h -- as requested by PMFW, this offset should start at a 32-byte boundary, and the table_size above should remain at offset=6 bytes</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#pragma pack(pop)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c<br/>index 0c2d04f978ac..6d334a2aff67 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c</a></div><div class='hunk'>@@ -2387,7 +2387,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {</div><div class='ctx'> 	.register_irq_handler = smu_v11_0_register_irq_handler,</div><div class='ctx'> 	.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,</div><div class='ctx'> 	.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,</div><div class='del'>-	.baco_is_support = smu_v11_0_baco_is_support,</div><div class='add'>+	.get_bamaco_support = smu_v11_0_get_bamaco_support,</div><div class='ctx'> 	.baco_enter = smu_v11_0_baco_enter,</div><div class='ctx'> 	.baco_exit = smu_v11_0_baco_exit,</div><div class='ctx'> 	.get_dpm_ultimate_freq = smu_v11_0_get_dpm_ultimate_freq,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c<br/>index 836b1df79928..5a68d365967f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c</a></div><div class='hunk'>@@ -3538,7 +3538,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {</div><div class='ctx'> 	.register_irq_handler = smu_v11_0_register_irq_handler,</div><div class='ctx'> 	.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,</div><div class='ctx'> 	.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,</div><div class='del'>-	.baco_is_support = smu_v11_0_baco_is_support,</div><div class='add'>+	.get_bamaco_support = smu_v11_0_get_bamaco_support,</div><div class='ctx'> 	.baco_enter = navi10_baco_enter,</div><div class='ctx'> 	.baco_exit = navi10_baco_exit,</div><div class='ctx'> 	.get_dpm_ultimate_freq = smu_v11_0_get_dpm_ultimate_freq,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c<br/>index 1f18b61884f3..e426f457a017 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c</a></div><div class='hunk'>@@ -4431,7 +4431,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {</div><div class='ctx'> 	.register_irq_handler = smu_v11_0_register_irq_handler,</div><div class='ctx'> 	.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,</div><div class='ctx'> 	.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,</div><div class='del'>-	.baco_is_support = smu_v11_0_baco_is_support,</div><div class='add'>+	.get_bamaco_support = smu_v11_0_get_bamaco_support,</div><div class='ctx'> 	.baco_enter = sienna_cichlid_baco_enter,</div><div class='ctx'> 	.baco_exit = sienna_cichlid_baco_exit,</div><div class='ctx'> 	.mode1_reset_is_support = sienna_cichlid_is_mode1_reset_supported,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br/>index f6545093bfc1..9d5ab2ea643a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c</a></div><div class='hunk'>@@ -93,7 +93,7 @@ static void smu_v11_0_poll_baco_exit(struct smu_context *smu)</div><div class='ctx'> int smu_v11_0_init_microcode(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='del'>-	char ucode_prefix[30];</div><div class='add'>+	char ucode_prefix[25];</div><div class='ctx'> 	char fw_name[SMU_FW_NAME_LEN];</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	const struct smc_firmware_header_v1_0 *hdr;</div><div class='hunk'>@@ -1557,23 +1557,27 @@ int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu,</div><div class='ctx'> 	return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ArmD3, baco_seq, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool smu_v11_0_baco_is_support(struct smu_context *smu)</div><div class='add'>+int smu_v11_0_get_bamaco_support(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	struct smu_baco_context *smu_baco = &amp;smu-&gt;smu_baco;</div><div class='add'>+	int bamaco_support = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(smu-&gt;adev) || !smu_baco-&gt;platform_support)</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (smu_baco-&gt;maco_support)</div><div class='add'>+		bamaco_support |= MACO_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	/* return true if ASIC is in BACO state already */</div><div class='ctx'> 	if (smu_v11_0_baco_get_state(smu) == SMU_BACO_STATE_ENTER)</div><div class='del'>-		return true;</div><div class='add'>+		return bamaco_support |= BACO_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	/* Arcturus does not support this bit mask */</div><div class='ctx'> 	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &amp;&amp;</div><div class='ctx'> 	   !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return (bamaco_support |= BACO_SUPPORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu)</div><div class='hunk'>@@ -1603,7 +1607,7 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)</div><div class='ctx'> 		case IP_VERSION(11, 0, 11):</div><div class='ctx'> 		case IP_VERSION(11, 0, 12):</div><div class='ctx'> 		case IP_VERSION(11, 0, 13):</div><div class='del'>-			if (amdgpu_runtime_pm == 2)</div><div class='add'>+			if (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO)</div><div class='ctx'> 				ret = smu_cmn_send_smc_msg_with_param(smu,</div><div class='ctx'> 								      SMU_MSG_EnterBaco,</div><div class='ctx'> 								      D3HOT_BAMACO_SEQUENCE,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c<br/>index da1f43999d09..379e44eb0019 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c</a></div><div class='hunk'>@@ -301,7 +301,7 @@ static int vangogh_get_legacy_smu_metrics_data(struct smu_context *smu,</div><div class='ctx'> 		*value = metrics-&gt;GfxActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_AVERAGE_VCNACTIVITY:</div><div class='del'>-		*value = metrics-&gt;UvdActivity;</div><div class='add'>+		*value = metrics-&gt;UvdActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_AVERAGE_SOCKETPOWER:</div><div class='ctx'> 		*value = (metrics-&gt;CurrentSocketPower &lt;&lt; 8) /</div><div class='hunk'>@@ -1507,6 +1507,12 @@ static int vangogh_read_sensor(struct smu_context *smu,</div><div class='ctx'> 						   (uint32_t *)data);</div><div class='ctx'> 		*size = 4;</div><div class='ctx'> 		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_VCN_LOAD:</div><div class='add'>+		ret = vangogh_common_get_smu_metrics_data(smu,</div><div class='add'>+						METRICS_AVERAGE_VCNACTIVITY,</div><div class='add'>+						(uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='ctx'> 	case AMDGPU_PP_SENSOR_GPU_AVG_POWER:</div><div class='ctx'> 		ret = vangogh_common_get_smu_metrics_data(smu,</div><div class='ctx'> 						   METRICS_AVERAGE_SOCKETPOWER,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c<br/>index f41ac6465f2a..ce941fbb9cfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c</a></div><div class='hunk'>@@ -759,8 +759,11 @@ static int aldebaran_emit_clk_levels(struct smu_context *smu,</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> </div><div class='ctx'> 	case SMU_OD_SCLK:</div><div class='del'>-		*offset += sysfs_emit_at(buf, *offset, "%s:\n", "GFXCLK");</div><div class='del'>-		fallthrough;</div><div class='add'>+		*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_SCLK");</div><div class='add'>+		*offset += sysfs_emit_at(buf, *offset, "0: %uMhz\n1: %uMhz\n",</div><div class='add'>+				      pstate_table-&gt;gfxclk_pstate.curr.min,</div><div class='add'>+				      pstate_table-&gt;gfxclk_pstate.curr.max);</div><div class='add'>+		return 0;</div><div class='ctx'> 	case SMU_SCLK:</div><div class='ctx'> 		ret = aldebaran_get_current_clk_freq_by_table(smu, SMU_GFXCLK, &amp;cur_value);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -788,8 +791,11 @@ static int aldebaran_emit_clk_levels(struct smu_context *smu,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SMU_OD_MCLK:</div><div class='del'>-		*offset += sysfs_emit_at(buf, *offset, "%s:\n", "MCLK");</div><div class='del'>-		fallthrough;</div><div class='add'>+		*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_MCLK");</div><div class='add'>+		*offset += sysfs_emit_at(buf, *offset, "0: %uMhz\n1: %uMhz\n",</div><div class='add'>+				      pstate_table-&gt;uclk_pstate.curr.min,</div><div class='add'>+				      pstate_table-&gt;uclk_pstate.curr.max);</div><div class='add'>+		return 0;</div><div class='ctx'> 	case SMU_MCLK:</div><div class='ctx'> 		ret = aldebaran_get_current_clk_freq_by_table(smu, SMU_UCLK, &amp;cur_value);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -850,7 +856,6 @@ static int aldebaran_emit_clk_levels(struct smu_context *smu,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='del'>-	case SMU_OD_SCLK:</div><div class='ctx'> 	case SMU_SCLK:</div><div class='ctx'> 		for (i = 0; i &lt; display_levels; i++) {</div><div class='ctx'> 			clock_mhz = freq_values[i];</div><div class='hunk'>@@ -863,7 +868,6 @@ static int aldebaran_emit_clk_levels(struct smu_context *smu,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case SMU_OD_MCLK:</div><div class='ctx'> 	case SMU_MCLK:</div><div class='ctx'> 	case SMU_SOCCLK:</div><div class='ctx'> 	case SMU_FCLK:</div><div class='hunk'>@@ -1581,11 +1585,11 @@ out:</div><div class='ctx'> 	adev-&gt;unique_id = ((uint64_t)upper32 &lt;&lt; 32) | lower32;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool aldebaran_is_baco_supported(struct smu_context *smu)</div><div class='add'>+static int aldebaran_get_bamaco_support(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	/* aldebaran is not support baco */</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aldebaran_set_df_cstate(struct smu_context *smu,</div><div class='hunk'>@@ -2059,7 +2063,7 @@ static const struct pptable_funcs aldebaran_ppt_funcs = {</div><div class='ctx'> 	.register_irq_handler = smu_v13_0_register_irq_handler,</div><div class='ctx'> 	.set_azalia_d3_pme = smu_v13_0_set_azalia_d3_pme,</div><div class='ctx'> 	.get_max_sustainable_clocks_by_dc = smu_v13_0_get_max_sustainable_clocks_by_dc,</div><div class='del'>-	.baco_is_support = aldebaran_is_baco_supported,</div><div class='add'>+	.get_bamaco_support = aldebaran_get_bamaco_support,</div><div class='ctx'> 	.get_dpm_ultimate_freq = smu_v13_0_get_dpm_ultimate_freq,</div><div class='ctx'> 	.set_soft_freq_limited_range = aldebaran_set_soft_freq_limited_range,</div><div class='ctx'> 	.od_edit_dpm_table = aldebaran_usr_edit_dpm_table,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br/>index 48170bb5112e..a8d34adc7d3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c</a></div><div class='hunk'>@@ -93,7 +93,7 @@ int smu_v13_0_init_microcode(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> 	char fw_name[30];</div><div class='del'>-	char ucode_prefix[30];</div><div class='add'>+	char ucode_prefix[15];</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	const struct smc_firmware_header_v1_0 *hdr;</div><div class='ctx'> 	const struct common_firmware_header *header;</div><div class='hunk'>@@ -2247,7 +2247,7 @@ static int smu_v13_0_baco_set_state(struct smu_context *smu,</div><div class='ctx'> 	if (state == SMU_BACO_STATE_ENTER) {</div><div class='ctx'> 		ret = smu_cmn_send_smc_msg_with_param(smu,</div><div class='ctx'> 						      SMU_MSG_EnterBaco,</div><div class='del'>-						      (smu_baco-&gt;maco_support &amp;&amp; amdgpu_runtime_pm != 1) ?</div><div class='add'>+						      (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO) ?</div><div class='ctx'> 						      BACO_SEQ_BAMACO : BACO_SEQ_BACO,</div><div class='ctx'> 						      NULL);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -2268,33 +2268,36 @@ static int smu_v13_0_baco_set_state(struct smu_context *smu,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool smu_v13_0_baco_is_support(struct smu_context *smu)</div><div class='add'>+int smu_v13_0_get_bamaco_support(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	struct smu_baco_context *smu_baco = &amp;smu-&gt;smu_baco;</div><div class='add'>+	int bamaco_support = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(smu-&gt;adev) || !smu_baco-&gt;platform_support)</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (smu_baco-&gt;maco_support)</div><div class='add'>+		bamaco_support |= MACO_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	/* return true if ASIC is in BACO state already */</div><div class='ctx'> 	if (smu_v13_0_baco_get_state(smu) == SMU_BACO_STATE_ENTER)</div><div class='del'>-		return true;</div><div class='add'>+		return bamaco_support |= BACO_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &amp;&amp;</div><div class='ctx'> 	    !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return (bamaco_support |= BACO_SUPPORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int smu_v13_0_baco_enter(struct smu_context *smu)</div><div class='ctx'> {</div><div class='del'>-	struct smu_baco_context *smu_baco = &amp;smu-&gt;smu_baco;</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;in_runpm &amp;&amp; smu_cmn_is_audio_func_enabled(adev)) {</div><div class='ctx'> 		return smu_v13_0_baco_set_armd3_sequence(smu,</div><div class='del'>-				(smu_baco-&gt;maco_support &amp;&amp; amdgpu_runtime_pm != 1) ?</div><div class='add'>+				(adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO) ?</div><div class='ctx'> 					BACO_SEQ_BAMACO : BACO_SEQ_BACO);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = smu_v13_0_baco_set_state(smu, SMU_BACO_STATE_ENTER);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c<br/>index 67117ced7c6a..1e09d5f2d82f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c</a></div><div class='hunk'>@@ -3076,7 +3076,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {</div><div class='ctx'> 	.set_tool_table_location = smu_v13_0_set_tool_table_location,</div><div class='ctx'> 	.deep_sleep_control = smu_v13_0_deep_sleep_control,</div><div class='ctx'> 	.gfx_ulv_control = smu_v13_0_gfx_ulv_control,</div><div class='del'>-	.baco_is_support = smu_v13_0_baco_is_support,</div><div class='add'>+	.get_bamaco_support = smu_v13_0_get_bamaco_support,</div><div class='ctx'> 	.baco_enter = smu_v13_0_baco_enter,</div><div class='ctx'> 	.baco_exit = smu_v13_0_baco_exit,</div><div class='ctx'> 	.mode1_reset_is_support = smu_v13_0_0_is_mode1_reset_supported,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c<br/>index 949131bd1ecb..bc241b593db1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c</a></div><div class='hunk'>@@ -226,7 +226,7 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!en &amp;&amp; !adev-&gt;in_s0ix) {</div><div class='add'>+	if (!en &amp;&amp; adev-&gt;in_s4) {</div><div class='ctx'> 		/* Adds a GFX reset as workaround just before sending the</div><div class='ctx'> 		 * MP1_UNLOAD message to prevent GC/RLC/PMFW from entering</div><div class='ctx'> 		 * an invalid state.</div><div class='hunk'>@@ -328,7 +328,7 @@ static int smu_v13_0_4_get_smu_metrics_data(struct smu_context *smu,</div><div class='ctx'> 		*value = metrics-&gt;GfxActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_AVERAGE_VCNACTIVITY:</div><div class='del'>-		*value = metrics-&gt;UvdActivity;</div><div class='add'>+		*value = metrics-&gt;UvdActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_AVERAGE_SOCKETPOWER:</div><div class='ctx'> 		*value = (metrics-&gt;AverageSocketPower &lt;&lt; 8) / 1000;</div><div class='hunk'>@@ -582,6 +582,12 @@ static int smu_v13_0_4_read_sensor(struct smu_context *smu,</div><div class='ctx'> 						       (uint32_t *)data);</div><div class='ctx'> 		*size = 4;</div><div class='ctx'> 		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_VCN_LOAD:</div><div class='add'>+		ret = smu_v13_0_4_get_smu_metrics_data(smu,</div><div class='add'>+							METRICS_AVERAGE_VCNACTIVITY,</div><div class='add'>+							(uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='ctx'> 	case AMDGPU_PP_SENSOR_GPU_AVG_POWER:</div><div class='ctx'> 		ret = smu_v13_0_4_get_smu_metrics_data(smu,</div><div class='ctx'> 						       METRICS_AVERAGE_SOCKETPOWER,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c<br/>index 0dce672ac1b9..218f209c3775 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c</a></div><div class='hunk'>@@ -286,7 +286,7 @@ static int smu_v13_0_5_get_smu_metrics_data(struct smu_context *smu,</div><div class='ctx'> 		*value = metrics-&gt;GfxActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_AVERAGE_VCNACTIVITY:</div><div class='del'>-		*value = metrics-&gt;UvdActivity;</div><div class='add'>+		*value = metrics-&gt;UvdActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_CURR_SOCKETPOWER:</div><div class='ctx'> 		*value = (metrics-&gt;CurrentSocketPower &lt;&lt; 8) / 1000;</div><div class='hunk'>@@ -332,6 +332,12 @@ static int smu_v13_0_5_read_sensor(struct smu_context *smu,</div><div class='ctx'> 								(uint32_t *)data);</div><div class='ctx'> 		*size = 4;</div><div class='ctx'> 		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_VCN_LOAD:</div><div class='add'>+		ret = smu_v13_0_5_get_smu_metrics_data(smu,</div><div class='add'>+							METRICS_AVERAGE_VCNACTIVITY,</div><div class='add'>+							(uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='ctx'> 	case AMDGPU_PP_SENSOR_GPU_INPUT_POWER:</div><div class='ctx'> 		ret = smu_v13_0_5_get_smu_metrics_data(smu,</div><div class='ctx'> 								METRICS_CURR_SOCKETPOWER,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c<br/>index 3957af057d54..4d3eca2fc3f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c</a></div><div class='hunk'>@@ -138,13 +138,13 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU</div><div class='ctx'> 	MSG_MAP(SetToolsDramAddrHigh,		     PPSMC_MSG_SetToolsDramAddrHigh,		0),</div><div class='ctx'> 	MSG_MAP(SetToolsDramAddrLow,		     PPSMC_MSG_SetToolsDramAddrLow,		0),</div><div class='ctx'> 	MSG_MAP(SetSoftMinByFreq,		     PPSMC_MSG_SetSoftMinByFreq,		0),</div><div class='del'>-	MSG_MAP(SetSoftMaxByFreq,		     PPSMC_MSG_SetSoftMaxByFreq,		0),</div><div class='add'>+	MSG_MAP(SetSoftMaxByFreq,		     PPSMC_MSG_SetSoftMaxByFreq,		1),</div><div class='ctx'> 	MSG_MAP(GetMinDpmFreq,			     PPSMC_MSG_GetMinDpmFreq,			1),</div><div class='ctx'> 	MSG_MAP(GetMaxDpmFreq,			     PPSMC_MSG_GetMaxDpmFreq,			1),</div><div class='ctx'> 	MSG_MAP(GetDpmFreqByIndex,		     PPSMC_MSG_GetDpmFreqByIndex,		1),</div><div class='ctx'> 	MSG_MAP(SetPptLimit,			     PPSMC_MSG_SetPptLimit,			0),</div><div class='ctx'> 	MSG_MAP(GetPptLimit,			     PPSMC_MSG_GetPptLimit,			1),</div><div class='del'>-	MSG_MAP(GfxDeviceDriverReset,		     PPSMC_MSG_GfxDriverReset,			0),</div><div class='add'>+	MSG_MAP(GfxDeviceDriverReset,		     PPSMC_MSG_GfxDriverReset,			SMU_MSG_RAS_PRI),</div><div class='ctx'> 	MSG_MAP(DramLogSetDramAddrHigh,		     PPSMC_MSG_DramLogSetDramAddrHigh,		0),</div><div class='ctx'> 	MSG_MAP(DramLogSetDramAddrLow,		     PPSMC_MSG_DramLogSetDramAddrLow,		0),</div><div class='ctx'> 	MSG_MAP(DramLogSetDramSize,		     PPSMC_MSG_DramLogSetDramSize,		0),</div><div class='hunk'>@@ -167,10 +167,10 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU</div><div class='ctx'> 	MSG_MAP(GetCTFLimit,                         PPSMC_MSG_GetCTFLimit,                     0),</div><div class='ctx'> 	MSG_MAP(GetThermalLimit,                     PPSMC_MSG_ReadThrottlerLimit,              0),</div><div class='ctx'> 	MSG_MAP(ClearMcaOnRead,	                     PPSMC_MSG_ClearMcaOnRead,                  0),</div><div class='del'>-	MSG_MAP(QueryValidMcaCount,                  PPSMC_MSG_QueryValidMcaCount,              0),</div><div class='del'>-	MSG_MAP(QueryValidMcaCeCount,                PPSMC_MSG_QueryValidMcaCeCount,            0),</div><div class='del'>-	MSG_MAP(McaBankDumpDW,                       PPSMC_MSG_McaBankDumpDW,                   0),</div><div class='del'>-	MSG_MAP(McaBankCeDumpDW,                     PPSMC_MSG_McaBankCeDumpDW,                 0),</div><div class='add'>+	MSG_MAP(QueryValidMcaCount,                  PPSMC_MSG_QueryValidMcaCount,              SMU_MSG_RAS_PRI),</div><div class='add'>+	MSG_MAP(QueryValidMcaCeCount,                PPSMC_MSG_QueryValidMcaCeCount,            SMU_MSG_RAS_PRI),</div><div class='add'>+	MSG_MAP(McaBankDumpDW,                       PPSMC_MSG_McaBankDumpDW,                   SMU_MSG_RAS_PRI),</div><div class='add'>+	MSG_MAP(McaBankCeDumpDW,                     PPSMC_MSG_McaBankCeDumpDW,                 SMU_MSG_RAS_PRI),</div><div class='ctx'> 	MSG_MAP(SelectPLPDMode,                      PPSMC_MSG_SelectPLPDMode,                  0),</div><div class='ctx'> 	MSG_MAP(RmaDueToBadPageThreshold,            PPSMC_MSG_RmaDueToBadPageThreshold,        0),</div><div class='ctx'> };</div><div class='hunk'>@@ -1010,8 +1010,11 @@ static int smu_v13_0_6_print_clk_levels(struct smu_context *smu,</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case SMU_OD_SCLK:</div><div class='del'>-		size += sysfs_emit_at(buf, size, "%s:\n", "GFXCLK");</div><div class='del'>-		fallthrough;</div><div class='add'>+		size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");</div><div class='add'>+		size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n",</div><div class='add'>+				      pstate_table-&gt;gfxclk_pstate.curr.min,</div><div class='add'>+				      pstate_table-&gt;gfxclk_pstate.curr.max);</div><div class='add'>+		break;</div><div class='ctx'> 	case SMU_SCLK:</div><div class='ctx'> 		ret = smu_v13_0_6_get_current_clk_freq_by_table(smu, SMU_GFXCLK,</div><div class='ctx'> 								&amp;now);</div><div class='hunk'>@@ -1052,8 +1055,11 @@ static int smu_v13_0_6_print_clk_levels(struct smu_context *smu,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SMU_OD_MCLK:</div><div class='del'>-		size += sysfs_emit_at(buf, size, "%s:\n", "MCLK");</div><div class='del'>-		fallthrough;</div><div class='add'>+		size += sysfs_emit_at(buf, size, "%s:\n", "OD_MCLK");</div><div class='add'>+		size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n",</div><div class='add'>+				      pstate_table-&gt;uclk_pstate.curr.min,</div><div class='add'>+				      pstate_table-&gt;uclk_pstate.curr.max);</div><div class='add'>+		break;</div><div class='ctx'> 	case SMU_MCLK:</div><div class='ctx'> 		ret = smu_v13_0_6_get_current_clk_freq_by_table(smu, SMU_UCLK,</div><div class='ctx'> 								&amp;now);</div><div class='hunk'>@@ -1670,6 +1676,11 @@ static int smu_v13_0_6_set_soft_freq_limited_range(struct smu_context *smu,</div><div class='ctx'> 		if (clk_type == SMU_UCLK) {</div><div class='ctx'> 			if (max == pstate_table-&gt;uclk_pstate.curr.max)</div><div class='ctx'> 				return 0;</div><div class='add'>+			/* For VF, only allowed in FW versions 85.102 or greater */</div><div class='add'>+			if (amdgpu_sriov_vf(adev) &amp;&amp;</div><div class='add'>+			    ((smu-&gt;smc_fw_version &lt; 0x556600) ||</div><div class='add'>+			     (adev-&gt;flags &amp; AMD_IS_APU)))</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='ctx'> 			/* Only max clock limiting is allowed for UCLK */</div><div class='ctx'> 			ret = smu_v13_0_set_soft_freq_limited_range(</div><div class='ctx'> 				smu, SMU_UCLK, 0, max);</div><div class='hunk'>@@ -2077,11 +2088,11 @@ static void smu_v13_0_6_get_unique_id(struct smu_context *smu)</div><div class='ctx'> 	adev-&gt;unique_id = pptable-&gt;PublicSerialNumber_AID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool smu_v13_0_6_is_baco_supported(struct smu_context *smu)</div><div class='add'>+static int smu_v13_0_6_get_bamaco_support(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	/* smu_13_0_6 does not support baco */</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *const throttling_logging_label[] = {</div><div class='hunk'>@@ -2228,7 +2239,15 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table</div><div class='ctx'> 	gpu_metrics-&gt;gfxclk_lock_status = GET_METRIC_FIELD(GfxLockXCDMak) &gt;&gt; GET_INST(GC, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (!(adev-&gt;flags &amp; AMD_IS_APU)) {</div><div class='del'>-		if (!amdgpu_sriov_vf(adev)) {</div><div class='add'>+		/*Check smu version, PCIE link speed and width will be reported from pmfw metric</div><div class='add'>+		 * table for both pf &amp; one vf for smu version 85.99.0 or higher else report only</div><div class='add'>+		 * for pf from registers</div><div class='add'>+		 */</div><div class='add'>+		if (smu-&gt;smc_fw_version &gt;= 0x556300) {</div><div class='add'>+			gpu_metrics-&gt;pcie_link_width = metrics_x-&gt;PCIeLinkWidth;</div><div class='add'>+			gpu_metrics-&gt;pcie_link_speed =</div><div class='add'>+				pcie_gen_to_speed(metrics_x-&gt;PCIeLinkSpeed);</div><div class='add'>+		} else if (!amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 			link_width_level = smu_v13_0_6_get_current_pcie_link_width_level(smu);</div><div class='ctx'> 			if (link_width_level &gt; MAX_LINK_WIDTH)</div><div class='ctx'> 				link_width_level = 0;</div><div class='hunk'>@@ -2238,6 +2257,7 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table</div><div class='ctx'> 			gpu_metrics-&gt;pcie_link_speed =</div><div class='ctx'> 				smu_v13_0_6_get_current_pcie_link_speed(smu);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		gpu_metrics-&gt;pcie_bandwidth_acc =</div><div class='ctx'> 				SMUQ10_ROUND(metrics_x-&gt;PcieBandwidthAcc[0]);</div><div class='ctx'> 		gpu_metrics-&gt;pcie_bandwidth_inst =</div><div class='hunk'>@@ -2294,6 +2314,17 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table</div><div class='ctx'> 	return sizeof(*gpu_metrics);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void smu_v13_0_6_restore_pci_config(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 16; i++)</div><div class='add'>+		pci_write_config_dword(adev-&gt;pdev, i * 4,</div><div class='add'>+				       adev-&gt;pdev-&gt;saved_config_space[i]);</div><div class='add'>+	pci_restore_msi_state(adev-&gt;pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int smu_v13_0_6_mode2_reset(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0, index;</div><div class='hunk'>@@ -2315,6 +2346,20 @@ static int smu_v13_0_6_mode2_reset(struct smu_context *smu)</div><div class='ctx'> 	/* Restore the config space saved during init */</div><div class='ctx'> 	amdgpu_device_load_pci_state(adev-&gt;pdev);</div><div class='ctx'> </div><div class='add'>+	/* Certain platforms have switches which assign virtual BAR values to</div><div class='add'>+	 * devices. OS uses the virtual BAR values and device behind the switch</div><div class='add'>+	 * is assgined another BAR value. When device's config space registers</div><div class='add'>+	 * are queried, switch returns the virtual BAR values. When mode-2 reset</div><div class='add'>+	 * is performed, switch is unaware of it, and will continue to return</div><div class='add'>+	 * the same virtual values to the OS.This affects</div><div class='add'>+	 * pci_restore_config_space() API as it doesn't write the value saved if</div><div class='add'>+	 * the current value read from config space is the same as what is</div><div class='add'>+	 * saved. As a workaround, make sure the config space is restored</div><div class='add'>+	 * always.</div><div class='add'>+	 */</div><div class='add'>+	if (!(adev-&gt;flags &amp; AMD_IS_APU))</div><div class='add'>+		smu_v13_0_6_restore_pci_config(smu);</div><div class='add'>+</div><div class='ctx'> 	dev_dbg(smu-&gt;adev-&gt;dev, "wait for reset ack\n");</div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = smu_cmn_wait_for_response(smu);</div><div class='hunk'>@@ -2671,6 +2716,11 @@ static int mca_umc_mca_get_err_count(const struct mca_ras_info *mca_ras, struct</div><div class='ctx'> 	    umc_v12_0_is_correctable_error(adev, status0))</div><div class='ctx'> 		*count = (ext_error_code == 0) ? odecc_err_cnt : 1;</div><div class='ctx'> </div><div class='add'>+	amdgpu_umc_update_ecc_status(adev,</div><div class='add'>+			entry-&gt;regs[MCA_REG_IDX_STATUS],</div><div class='add'>+			entry-&gt;regs[MCA_REG_IDX_IPID],</div><div class='add'>+			entry-&gt;regs[MCA_REG_IDX_ADDR]);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2684,7 +2734,8 @@ static int mca_pcs_xgmi_mca_get_err_count(const struct mca_ras_info *mca_ras, st</div><div class='ctx'> 	ext_error_code = MCA_REG__STATUS__ERRORCODEEXT(entry-&gt;regs[MCA_REG_IDX_STATUS]);</div><div class='ctx'> 	err_cnt = MCA_REG__MISC0__ERRCNT(entry-&gt;regs[MCA_REG_IDX_MISC0]);</div><div class='ctx'> </div><div class='del'>-	if (type == AMDGPU_MCA_ERROR_TYPE_UE &amp;&amp; ext_error_code == 0)</div><div class='add'>+	if (type == AMDGPU_MCA_ERROR_TYPE_UE &amp;&amp;</div><div class='add'>+	    (ext_error_code == 0 || ext_error_code == 9))</div><div class='ctx'> 		*count = err_cnt;</div><div class='ctx'> 	else if (type == AMDGPU_MCA_ERROR_TYPE_CE &amp;&amp; ext_error_code == 6)</div><div class='ctx'> 		*count = err_cnt;</div><div class='hunk'>@@ -2975,7 +3026,7 @@ static int aca_smu_set_debug_mode(struct amdgpu_device *adev, bool enable)</div><div class='ctx'> 	return smu_v13_0_6_mca_set_debug_mode(smu, enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smu_v13_0_6_get_valid_aca_count(struct smu_context *smu, enum aca_error_type type, u32 *count)</div><div class='add'>+static int smu_v13_0_6_get_valid_aca_count(struct smu_context *smu, enum aca_smu_type type, u32 *count)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t msg;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -2984,10 +3035,10 @@ static int smu_v13_0_6_get_valid_aca_count(struct smu_context *smu, enum aca_err</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='del'>-	case ACA_ERROR_TYPE_UE:</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='ctx'> 		msg = SMU_MSG_QueryValidMcaCount;</div><div class='ctx'> 		break;</div><div class='del'>-	case ACA_ERROR_TYPE_CE:</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='ctx'> 		msg = SMU_MSG_QueryValidMcaCeCount;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3004,14 +3055,14 @@ static int smu_v13_0_6_get_valid_aca_count(struct smu_context *smu, enum aca_err</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev,</div><div class='del'>-				       enum aca_error_type type, u32 *count)</div><div class='add'>+				       enum aca_smu_type type, u32 *count)</div><div class='ctx'> {</div><div class='ctx'> 	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='del'>-	case ACA_ERROR_TYPE_UE:</div><div class='del'>-	case ACA_ERROR_TYPE_CE:</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='ctx'> 		ret = smu_v13_0_6_get_valid_aca_count(smu, type, count);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3022,16 +3073,16 @@ static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_error_type type,</div><div class='add'>+static int __smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_smu_type type,</div><div class='ctx'> 				       int idx, int offset, u32 *val)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t msg, param;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='del'>-	case ACA_ERROR_TYPE_UE:</div><div class='add'>+	case ACA_SMU_TYPE_UE:</div><div class='ctx'> 		msg = SMU_MSG_McaBankDumpDW;</div><div class='ctx'> 		break;</div><div class='del'>-	case ACA_ERROR_TYPE_CE:</div><div class='add'>+	case ACA_SMU_TYPE_CE:</div><div class='ctx'> 		msg = SMU_MSG_McaBankCeDumpDW;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3043,7 +3094,7 @@ static int __smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_error_t</div><div class='ctx'> 	return smu_cmn_send_smc_msg_with_param(smu, msg, param, (uint32_t *)val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_error_type type,</div><div class='add'>+static int smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_smu_type type,</div><div class='ctx'> 				     int idx, int offset, u32 *val, int count)</div><div class='ctx'> {</div><div class='ctx'> 	int ret, i;</div><div class='hunk'>@@ -3060,7 +3111,7 @@ static int smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum aca_error_typ</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aca_bank_read_reg(struct amdgpu_device *adev, enum aca_error_type type,</div><div class='add'>+static int aca_bank_read_reg(struct amdgpu_device *adev, enum aca_smu_type type,</div><div class='ctx'> 			     int idx, int reg_idx, u64 *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='hunk'>@@ -3077,13 +3128,13 @@ static int aca_bank_read_reg(struct amdgpu_device *adev, enum aca_error_type typ</div><div class='ctx'> 	*val = (u64)data[1] &lt;&lt; 32 | data[0];</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(adev-&gt;dev, "mca read bank reg: type:%s, index: %d, reg_idx: %d, val: 0x%016llx\n",</div><div class='del'>-		type == ACA_ERROR_TYPE_UE ? "UE" : "CE", idx, reg_idx, *val);</div><div class='add'>+		type == ACA_SMU_TYPE_UE ? "UE" : "CE", idx, reg_idx, *val);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_smu_get_valid_aca_bank(struct amdgpu_device *adev,</div><div class='del'>-				      enum aca_error_type type, int idx, struct aca_bank *bank)</div><div class='add'>+				      enum aca_smu_type type, int idx, struct aca_bank *bank)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret, count;</div><div class='ctx'> </div><div class='hunk'>@@ -3097,12 +3148,25 @@ static int aca_smu_get_valid_aca_bank(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int aca_smu_parse_error_code(struct amdgpu_device *adev, struct aca_bank *bank)</div><div class='add'>+{</div><div class='add'>+	int error_code;</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;flags &amp; AMD_IS_APU) &amp;&amp; adev-&gt;pm.fw_version &gt;= 0x00555600)</div><div class='add'>+		error_code = ACA_REG__SYND__ERRORINFORMATION(bank-&gt;regs[ACA_REG_IDX_SYND]);</div><div class='add'>+	else</div><div class='add'>+		error_code = ACA_REG__STATUS__ERRORCODE(bank-&gt;regs[ACA_REG_IDX_STATUS]);</div><div class='add'>+</div><div class='add'>+	return error_code &amp; 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct aca_smu_funcs smu_v13_0_6_aca_smu_funcs = {</div><div class='ctx'> 	.max_ue_bank_count = 12,</div><div class='ctx'> 	.max_ce_bank_count = 12,</div><div class='ctx'> 	.set_debug_mode = aca_smu_set_debug_mode,</div><div class='ctx'> 	.get_valid_aca_count = aca_smu_get_valid_aca_count,</div><div class='ctx'> 	.get_valid_aca_bank = aca_smu_get_valid_aca_bank,</div><div class='add'>+	.parse_error_code = aca_smu_parse_error_code,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int smu_v13_0_6_select_xgmi_plpd_policy(struct smu_context *smu,</div><div class='hunk'>@@ -3179,7 +3243,7 @@ static const struct pptable_funcs smu_v13_0_6_ppt_funcs = {</div><div class='ctx'> 	.enable_thermal_alert = smu_v13_0_enable_thermal_alert,</div><div class='ctx'> 	.disable_thermal_alert = smu_v13_0_disable_thermal_alert,</div><div class='ctx'> 	.setup_pptable = smu_v13_0_6_setup_pptable,</div><div class='del'>-	.baco_is_support = smu_v13_0_6_is_baco_supported,</div><div class='add'>+	.get_bamaco_support = smu_v13_0_6_get_bamaco_support,</div><div class='ctx'> 	.get_dpm_ultimate_freq = smu_v13_0_6_get_dpm_ultimate_freq,</div><div class='ctx'> 	.set_soft_freq_limited_range = smu_v13_0_6_set_soft_freq_limited_range,</div><div class='ctx'> 	.od_edit_dpm_table = smu_v13_0_6_usr_edit_dpm_table,</div><div class='hunk'>@@ -3208,6 +3272,7 @@ void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu)</div><div class='ctx'> 	smu-&gt;feature_map = smu_v13_0_6_feature_mask_map;</div><div class='ctx'> 	smu-&gt;table_map = smu_v13_0_6_table_map;</div><div class='ctx'> 	smu-&gt;smc_driver_if_version = SMU13_0_6_DRIVER_IF_VERSION;</div><div class='add'>+	smu-&gt;smc_fw_caps |= SMU_FW_CAP_RAS_PRI;</div><div class='ctx'> 	smu_v13_0_set_smu_mailbox_registers(smu);</div><div class='ctx'> 	amdgpu_mca_smu_init_funcs(smu-&gt;adev, &amp;smu_v13_0_6_mca_smu_funcs);</div><div class='ctx'> 	amdgpu_aca_set_smu_funcs(smu-&gt;adev, &amp;smu_v13_0_6_aca_smu_funcs);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c<br/>index 7318964f1f14..e996a0a4d33e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c</a></div><div class='hunk'>@@ -2650,7 +2650,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {</div><div class='ctx'> 	.set_tool_table_location = smu_v13_0_set_tool_table_location,</div><div class='ctx'> 	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,</div><div class='ctx'> 	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,</div><div class='del'>-	.baco_is_support = smu_v13_0_baco_is_support,</div><div class='add'>+	.get_bamaco_support = smu_v13_0_get_bamaco_support,</div><div class='ctx'> 	.baco_enter = smu_v13_0_baco_enter,</div><div class='ctx'> 	.baco_exit = smu_v13_0_baco_exit,</div><div class='ctx'> 	.mode1_reset_is_support = smu_v13_0_7_is_mode1_reset_supported,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c<br/>index 2d1736234b4a..d8bcf765a803 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c</a></div><div class='hunk'>@@ -363,7 +363,7 @@ static int yellow_carp_get_smu_metrics_data(struct smu_context *smu,</div><div class='ctx'> 		*value = metrics-&gt;GfxActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_AVERAGE_VCNACTIVITY:</div><div class='del'>-		*value = metrics-&gt;UvdActivity;</div><div class='add'>+		*value = metrics-&gt;UvdActivity / 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case METRICS_CURR_SOCKETPOWER:</div><div class='ctx'> 		*value = (metrics-&gt;CurrentSocketPower &lt;&lt; 8) / 1000;</div><div class='hunk'>@@ -423,6 +423,12 @@ static int yellow_carp_read_sensor(struct smu_context *smu,</div><div class='ctx'> 								(uint32_t *)data);</div><div class='ctx'> 		*size = 4;</div><div class='ctx'> 		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_VCN_LOAD:</div><div class='add'>+		ret = yellow_carp_get_smu_metrics_data(smu,</div><div class='add'>+							METRICS_AVERAGE_VCNACTIVITY,</div><div class='add'>+							(uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='ctx'> 	case AMDGPU_PP_SENSOR_GPU_INPUT_POWER:</div><div class='ctx'> 		ret = yellow_carp_get_smu_metrics_data(smu,</div><div class='ctx'> 								METRICS_CURR_SOCKETPOWER,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile b/drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile<br/>index ddbac5c655f7..4593e29e8ff8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> # Makefile for the 'smu manager' sub-component of powerplay.</div><div class='ctx'> # It provides the smu management services for the driver.</div><div class='ctx'> </div><div class='del'>-SMU14_MGR = smu_v14_0.o smu_v14_0_0_ppt.o</div><div class='add'>+SMU14_MGR = smu_v14_0.o smu_v14_0_0_ppt.o smu_v14_0_2_ppt.o</div><div class='ctx'> </div><div class='ctx'> AMD_SWSMU_SMU14MGR = $(addprefix $(AMD_SWSMU_PATH)/smu14/,$(SMU14_MGR))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c<br/>index 07a65e005785..68b9bf822e8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c</a></div><div class='hunk'>@@ -38,8 +38,13 @@</div><div class='ctx'> #include "amdgpu_ras.h"</div><div class='ctx'> #include "smu_cmn.h"</div><div class='ctx'> </div><div class='del'>-#include "asic_reg/mp/mp_14_0_0_offset.h"</div><div class='del'>-#include "asic_reg/mp/mp_14_0_0_sh_mask.h"</div><div class='add'>+#include "asic_reg/mp/mp_14_0_2_offset.h"</div><div class='add'>+#include "asic_reg/mp/mp_14_0_2_sh_mask.h"</div><div class='add'>+</div><div class='add'>+#define regMP1_SMN_IH_SW_INT_mp1_14_0_0			0x0341</div><div class='add'>+#define regMP1_SMN_IH_SW_INT_mp1_14_0_0_BASE_IDX        0</div><div class='add'>+#define regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0            0x0342</div><div class='add'>+#define regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0_BASE_IDX   0</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * DO NOT use these for err/warn/info/debug messages.</div><div class='hunk'>@@ -52,6 +57,7 @@</div><div class='ctx'> #undef pr_debug</div><div class='ctx'> </div><div class='ctx'> MODULE_FIRMWARE("amdgpu/smu_14_0_2.bin");</div><div class='add'>+MODULE_FIRMWARE("amdgpu/smu_14_0_3.bin");</div><div class='ctx'> </div><div class='ctx'> #define ENABLE_IMU_ARG_GFXOFF_ENABLE		1</div><div class='ctx'> </div><div class='hunk'>@@ -106,7 +112,6 @@ void smu_v14_0_fini_microcode(struct smu_context *smu)</div><div class='ctx'> </div><div class='ctx'> int smu_v14_0_load_microcode(struct smu_context *smu)</div><div class='ctx'> {</div><div class='del'>-#if 0</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> 	const uint32_t *src;</div><div class='ctx'> 	const struct smc_firmware_header_v1_0 *hdr;</div><div class='hunk'>@@ -131,8 +136,13 @@ int smu_v14_0_load_microcode(struct smu_context *smu)</div><div class='ctx'> 		    1 &amp; ~MP1_SMN_PUB_CTRL__LX3_RESET_MASK);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		mp1_fw_flags = RREG32_PCIE(MP1_Public |</div><div class='del'>-					   (smnMP1_FIRMWARE_FLAGS &amp; 0xffffffff));</div><div class='add'>+		if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 0) ||</div><div class='add'>+			amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))</div><div class='add'>+			mp1_fw_flags = RREG32_PCIE(MP1_Public |</div><div class='add'>+						   (smnMP1_FIRMWARE_FLAGS_14_0_0 &amp; 0xffffffff));</div><div class='add'>+		else</div><div class='add'>+			mp1_fw_flags = RREG32_PCIE(MP1_Public |</div><div class='add'>+						   (smnMP1_FIRMWARE_FLAGS &amp; 0xffffffff));</div><div class='ctx'> 		if ((mp1_fw_flags &amp; MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) &gt;&gt;</div><div class='ctx'> 		    MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -142,9 +152,7 @@ int smu_v14_0_load_microcode(struct smu_context *smu)</div><div class='ctx'> 	if (i == adev-&gt;usec_timeout)</div><div class='ctx'> 		return -ETIME;</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int smu_v14_0_init_pptable_microcode(struct smu_context *smu)</div><div class='hunk'>@@ -165,6 +173,10 @@ int smu_v14_0_init_pptable_microcode(struct smu_context *smu)</div><div class='ctx'> 	if (!adev-&gt;scpm_enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 2)) ||</div><div class='add'>+	    (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 3)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* override pptable_id from driver parameter */</div><div class='ctx'> 	if (amdgpu_smu_pptable_id &gt;= 0) {</div><div class='ctx'> 		pptable_id = amdgpu_smu_pptable_id;</div><div class='hunk'>@@ -198,7 +210,12 @@ int smu_v14_0_check_fw_status(struct smu_context *smu)</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> 	uint32_t mp1_fw_flags;</div><div class='ctx'> </div><div class='del'>-	mp1_fw_flags = RREG32_PCIE(MP1_Public |</div><div class='add'>+	if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 0) ||</div><div class='add'>+		amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))</div><div class='add'>+		mp1_fw_flags = RREG32_PCIE(MP1_Public |</div><div class='add'>+					   (smnMP1_FIRMWARE_FLAGS_14_0_0 &amp; 0xffffffff));</div><div class='add'>+	else</div><div class='add'>+		mp1_fw_flags = RREG32_PCIE(MP1_Public |</div><div class='ctx'> 					   (smnMP1_FIRMWARE_FLAGS &amp; 0xffffffff));</div><div class='ctx'> </div><div class='ctx'> 	if ((mp1_fw_flags &amp; MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) &gt;&gt;</div><div class='hunk'>@@ -227,16 +244,16 @@ int smu_v14_0_check_fw_version(struct smu_context *smu)</div><div class='ctx'> 		adev-&gt;pm.fw_version = smu_version;</div><div class='ctx'> </div><div class='ctx'> 	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {</div><div class='del'>-	case IP_VERSION(14, 0, 2):</div><div class='del'>-		smu-&gt;smc_driver_if_version = SMU14_DRIVER_IF_VERSION_SMU_V14_0_2;</div><div class='del'>-		break;</div><div class='ctx'> 	case IP_VERSION(14, 0, 0):</div><div class='ctx'> 		smu-&gt;smc_driver_if_version = SMU14_DRIVER_IF_VERSION_SMU_V14_0_0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IP_VERSION(14, 0, 1):</div><div class='ctx'> 		smu-&gt;smc_driver_if_version = SMU14_DRIVER_IF_VERSION_SMU_V14_0_1;</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='add'>+	case IP_VERSION(14, 0, 2):</div><div class='add'>+	case IP_VERSION(14, 0, 3):</div><div class='add'>+		smu-&gt;smc_driver_if_version = SMU14_DRIVER_IF_VERSION_SMU_V14_0_2;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(adev-&gt;dev, "smu unsupported IP version: 0x%x.\n",</div><div class='ctx'> 			amdgpu_ip_version(adev, MP1_HWIP, 0));</div><div class='hunk'>@@ -738,9 +755,9 @@ int smu_v14_0_gfx_off_control(struct smu_context *smu, bool enable)</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> </div><div class='ctx'> 	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {</div><div class='del'>-	case IP_VERSION(14, 0, 2):</div><div class='ctx'> 	case IP_VERSION(14, 0, 0):</div><div class='ctx'> 	case IP_VERSION(14, 0, 1):</div><div class='add'>+	case IP_VERSION(14, 0, 2):</div><div class='ctx'> 		if (!(adev-&gt;pm.pp_feature &amp; PP_GFXOFF_MASK))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		if (enable)</div><div class='hunk'>@@ -841,9 +858,16 @@ static int smu_v14_0_set_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 		// TODO</div><div class='ctx'> </div><div class='ctx'> 		/* For MP1 SW irqs */</div><div class='del'>-		val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL);</div><div class='del'>-		val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);</div><div class='del'>-		WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);</div><div class='add'>+		if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 0) ||</div><div class='add'>+			amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) {</div><div class='add'>+			val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);</div><div class='add'>+			WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0, val);</div><div class='add'>+		} else {</div><div class='add'>+			val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);</div><div class='add'>+			WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_IRQ_STATE_ENABLE:</div><div class='hunk'>@@ -851,14 +875,26 @@ static int smu_v14_0_set_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 		// TODO</div><div class='ctx'> </div><div class='ctx'> 		/* For MP1 SW irqs */</div><div class='del'>-		val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT);</div><div class='del'>-		val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, ID, 0xFE);</div><div class='del'>-		val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);</div><div class='del'>-		WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val);</div><div class='del'>-</div><div class='del'>-		val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL);</div><div class='del'>-		val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);</div><div class='del'>-		WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);</div><div class='add'>+		if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 0) ||</div><div class='add'>+			amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) {</div><div class='add'>+			val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_mp1_14_0_0);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, ID, 0xFE);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);</div><div class='add'>+			WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_mp1_14_0_0, val);</div><div class='add'>+</div><div class='add'>+			val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);</div><div class='add'>+			WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0, val);</div><div class='add'>+		} else {</div><div class='add'>+			val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, ID, 0xFE);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);</div><div class='add'>+			WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val);</div><div class='add'>+</div><div class='add'>+			val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL);</div><div class='add'>+			val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);</div><div class='add'>+			WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -868,11 +904,32 @@ static int smu_v14_0_set_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define THM_11_0__SRCID__THM_DIG_THERM_L2H		0		/* ASIC_TEMP &gt; CG_THERMAL_INT.DIG_THERM_INTH  */</div><div class='add'>+#define THM_11_0__SRCID__THM_DIG_THERM_H2L		1		/* ASIC_TEMP &lt; CG_THERMAL_INT.DIG_THERM_INTL  */</div><div class='add'>+</div><div class='ctx'> static int smu_v14_0_irq_process(struct amdgpu_device *adev,</div><div class='ctx'> 				 struct amdgpu_irq_src *source,</div><div class='ctx'> 				 struct amdgpu_iv_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	// TODO</div><div class='add'>+	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='add'>+	uint32_t client_id = entry-&gt;client_id;</div><div class='add'>+	uint32_t src_id = entry-&gt;src_id;</div><div class='add'>+</div><div class='add'>+	if (client_id == SOC15_IH_CLIENTID_THM) {</div><div class='add'>+		switch (src_id) {</div><div class='add'>+		case THM_11_0__SRCID__THM_DIG_THERM_L2H:</div><div class='add'>+			schedule_delayed_work(&amp;smu-&gt;swctf_delayed_work,</div><div class='add'>+					      msecs_to_jiffies(AMDGPU_SWCTF_EXTRA_DELAY));</div><div class='add'>+			break;</div><div class='add'>+		case THM_11_0__SRCID__THM_DIG_THERM_H2L:</div><div class='add'>+			dev_emerg(adev-&gt;dev, "ERROR: GPU under temperature range detected\n");</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_emerg(adev-&gt;dev, "ERROR: GPU under temperature range unknown src id (%d)\n",</div><div class='add'>+				  src_id);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -894,7 +951,17 @@ int smu_v14_0_register_irq_handler(struct smu_context *smu)</div><div class='ctx'> 	irq_src-&gt;num_types = 1;</div><div class='ctx'> 	irq_src-&gt;funcs = &amp;smu_v14_0_irq_funcs;</div><div class='ctx'> </div><div class='del'>-	// TODO: THM related</div><div class='add'>+	ret = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_THM,</div><div class='add'>+				THM_11_0__SRCID__THM_DIG_THERM_L2H,</div><div class='add'>+				irq_src);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_THM,</div><div class='add'>+				THM_11_0__SRCID__THM_DIG_THERM_H2L,</div><div class='add'>+				irq_src);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_MP1,</div><div class='ctx'> 				SMU_IH_INTERRUPT_ID_TO_DRIVER,</div><div class='hunk'>@@ -1590,23 +1657,27 @@ int smu_v14_0_baco_set_armd3_sequence(struct smu_context *smu,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool smu_v14_0_baco_is_support(struct smu_context *smu)</div><div class='add'>+int smu_v14_0_get_bamaco_support(struct smu_context *smu)</div><div class='ctx'> {</div><div class='ctx'> 	struct smu_baco_context *smu_baco = &amp;smu-&gt;smu_baco;</div><div class='add'>+	int bamaco_support = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(smu-&gt;adev) ||</div><div class='ctx'> 	    !smu_baco-&gt;platform_support)</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (smu_baco-&gt;maco_support)</div><div class='add'>+		bamaco_support |= MACO_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	/* return true if ASIC is in BACO state already */</div><div class='ctx'> 	if (smu_v14_0_baco_get_state(smu) == SMU_BACO_STATE_ENTER)</div><div class='del'>-		return true;</div><div class='add'>+		return (bamaco_support |= BACO_SUPPORT);</div><div class='ctx'> </div><div class='ctx'> 	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &amp;&amp;</div><div class='ctx'> 	    !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))</div><div class='del'>-		return false;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return (bamaco_support |= BACO_SUPPORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum smu_baco_state smu_v14_0_baco_get_state(struct smu_context *smu)</div><div class='hunk'>@@ -1629,7 +1700,7 @@ int smu_v14_0_baco_set_state(struct smu_context *smu,</div><div class='ctx'> 	if (state == SMU_BACO_STATE_ENTER) {</div><div class='ctx'> 		ret = smu_cmn_send_smc_msg_with_param(smu,</div><div class='ctx'> 						      SMU_MSG_EnterBaco,</div><div class='del'>-						      smu_baco-&gt;maco_support ?</div><div class='add'>+						      (adev-&gt;pm.rpm_mode == AMDGPU_RUNPM_BAMACO) ?</div><div class='ctx'> 						      BACO_SEQ_BAMACO : BACO_SEQ_BACO,</div><div class='ctx'> 						      NULL);</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c<br/>index 63399c00cc28..e4419e1561ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c</a></div><div class='hunk'>@@ -362,6 +362,12 @@ static int smu_v14_0_0_read_sensor(struct smu_context *smu,</div><div class='ctx'> 						       (uint32_t *)data);</div><div class='ctx'> 		*size = 4;</div><div class='ctx'> 		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_VCN_LOAD:</div><div class='add'>+		ret = smu_v14_0_0_get_smu_metrics_data(smu,</div><div class='add'>+							METRICS_AVERAGE_VCNACTIVITY,</div><div class='add'>+							(uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='ctx'> 	case AMDGPU_PP_SENSOR_GPU_AVG_POWER:</div><div class='ctx'> 		ret = smu_v14_0_0_get_smu_metrics_data(smu,</div><div class='ctx'> 						       METRICS_AVERAGE_SOCKETPOWER,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c<br/>new file mode 100644<br/>index 000000000000..706265220292<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c</a></div><div class='hunk'>@@ -0,0 +1,1796 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define SWSMU_CODE_LAYER_L2</div><div class='add'>+</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_smu.h"</div><div class='add'>+#include "atomfirmware.h"</div><div class='add'>+#include "amdgpu_atomfirmware.h"</div><div class='add'>+#include "amdgpu_atombios.h"</div><div class='add'>+#include "smu_v14_0.h"</div><div class='add'>+#include "smu14_driver_if_v14_0.h"</div><div class='add'>+#include "soc15_common.h"</div><div class='add'>+#include "atom.h"</div><div class='add'>+#include "smu_v14_0_2_ppt.h"</div><div class='add'>+#include "smu_v14_0_2_pptable.h"</div><div class='add'>+#include "smu_v14_0_2_ppsmc.h"</div><div class='add'>+#include "mp/mp_14_0_2_offset.h"</div><div class='add'>+#include "mp/mp_14_0_2_sh_mask.h"</div><div class='add'>+</div><div class='add'>+#include "smu_cmn.h"</div><div class='add'>+#include "amdgpu_ras.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DO NOT use these for err/warn/info/debug messages.</div><div class='add'>+ * Use dev_err, dev_warn, dev_info and dev_dbg instead.</div><div class='add'>+ * They are more MGPU friendly.</div><div class='add'>+ */</div><div class='add'>+#undef pr_err</div><div class='add'>+#undef pr_warn</div><div class='add'>+#undef pr_info</div><div class='add'>+#undef pr_debug</div><div class='add'>+</div><div class='add'>+#define to_amdgpu_device(x) (container_of(x, struct amdgpu_device, pm.smu_i2c))</div><div class='add'>+</div><div class='add'>+#define FEATURE_MASK(feature) (1ULL &lt;&lt; feature)</div><div class='add'>+#define SMC_DPM_FEATURE ( \</div><div class='add'>+	FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT)     | \</div><div class='add'>+	FEATURE_MASK(FEATURE_DPM_UCLK_BIT)	 | \</div><div class='add'>+	FEATURE_MASK(FEATURE_DPM_LINK_BIT)       | \</div><div class='add'>+	FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)     | \</div><div class='add'>+	FEATURE_MASK(FEATURE_DPM_FCLK_BIT))</div><div class='add'>+</div><div class='add'>+#define MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE	0x4000</div><div class='add'>+</div><div class='add'>+static struct cmn2asic_msg_mapping smu_v14_0_2_message_map[SMU_MSG_MAX_COUNT] = {</div><div class='add'>+	MSG_MAP(TestMessage,			PPSMC_MSG_TestMessage,                 1),</div><div class='add'>+	MSG_MAP(GetSmuVersion,			PPSMC_MSG_GetSmuVersion,               1),</div><div class='add'>+	MSG_MAP(GetDriverIfVersion,		PPSMC_MSG_GetDriverIfVersion,          1),</div><div class='add'>+	MSG_MAP(SetAllowedFeaturesMaskLow,	PPSMC_MSG_SetAllowedFeaturesMaskLow,   0),</div><div class='add'>+	MSG_MAP(SetAllowedFeaturesMaskHigh,	PPSMC_MSG_SetAllowedFeaturesMaskHigh,  0),</div><div class='add'>+	MSG_MAP(EnableAllSmuFeatures,		PPSMC_MSG_EnableAllSmuFeatures,        0),</div><div class='add'>+	MSG_MAP(DisableAllSmuFeatures,		PPSMC_MSG_DisableAllSmuFeatures,       0),</div><div class='add'>+	MSG_MAP(EnableSmuFeaturesLow,		PPSMC_MSG_EnableSmuFeaturesLow,        1),</div><div class='add'>+	MSG_MAP(EnableSmuFeaturesHigh,		PPSMC_MSG_EnableSmuFeaturesHigh,       1),</div><div class='add'>+	MSG_MAP(DisableSmuFeaturesLow,		PPSMC_MSG_DisableSmuFeaturesLow,       1),</div><div class='add'>+	MSG_MAP(DisableSmuFeaturesHigh,		PPSMC_MSG_DisableSmuFeaturesHigh,      1),</div><div class='add'>+	MSG_MAP(GetEnabledSmuFeaturesLow,       PPSMC_MSG_GetRunningSmuFeaturesLow,    1),</div><div class='add'>+	MSG_MAP(GetEnabledSmuFeaturesHigh,	PPSMC_MSG_GetRunningSmuFeaturesHigh,   1),</div><div class='add'>+	MSG_MAP(SetWorkloadMask,		PPSMC_MSG_SetWorkloadMask,             1),</div><div class='add'>+	MSG_MAP(SetPptLimit,			PPSMC_MSG_SetPptLimit,                 0),</div><div class='add'>+	MSG_MAP(SetDriverDramAddrHigh,		PPSMC_MSG_SetDriverDramAddrHigh,       1),</div><div class='add'>+	MSG_MAP(SetDriverDramAddrLow,		PPSMC_MSG_SetDriverDramAddrLow,        1),</div><div class='add'>+	MSG_MAP(SetToolsDramAddrHigh,		PPSMC_MSG_SetToolsDramAddrHigh,        0),</div><div class='add'>+	MSG_MAP(SetToolsDramAddrLow,		PPSMC_MSG_SetToolsDramAddrLow,         0),</div><div class='add'>+	MSG_MAP(TransferTableSmu2Dram,		PPSMC_MSG_TransferTableSmu2Dram,       1),</div><div class='add'>+	MSG_MAP(TransferTableDram2Smu,		PPSMC_MSG_TransferTableDram2Smu,       0),</div><div class='add'>+	MSG_MAP(UseDefaultPPTable,		PPSMC_MSG_UseDefaultPPTable,           0),</div><div class='add'>+	MSG_MAP(RunDcBtc,			PPSMC_MSG_RunDcBtc,                    0),</div><div class='add'>+	MSG_MAP(EnterBaco,			PPSMC_MSG_EnterBaco,                   0),</div><div class='add'>+	MSG_MAP(ExitBaco,			PPSMC_MSG_ExitBaco,                    0),</div><div class='add'>+	MSG_MAP(SetSoftMinByFreq,		PPSMC_MSG_SetSoftMinByFreq,            1),</div><div class='add'>+	MSG_MAP(SetSoftMaxByFreq,		PPSMC_MSG_SetSoftMaxByFreq,            1),</div><div class='add'>+	MSG_MAP(SetHardMinByFreq,		PPSMC_MSG_SetHardMinByFreq,            1),</div><div class='add'>+	MSG_MAP(SetHardMaxByFreq,		PPSMC_MSG_SetHardMaxByFreq,            0),</div><div class='add'>+	MSG_MAP(GetMinDpmFreq,			PPSMC_MSG_GetMinDpmFreq,               1),</div><div class='add'>+	MSG_MAP(GetMaxDpmFreq,			PPSMC_MSG_GetMaxDpmFreq,               1),</div><div class='add'>+	MSG_MAP(GetDpmFreqByIndex,		PPSMC_MSG_GetDpmFreqByIndex,           1),</div><div class='add'>+	MSG_MAP(PowerUpVcn,			PPSMC_MSG_PowerUpVcn,                  0),</div><div class='add'>+	MSG_MAP(PowerDownVcn,			PPSMC_MSG_PowerDownVcn,                0),</div><div class='add'>+	MSG_MAP(PowerUpJpeg,			PPSMC_MSG_PowerUpJpeg,                 0),</div><div class='add'>+	MSG_MAP(PowerDownJpeg,			PPSMC_MSG_PowerDownJpeg,               0),</div><div class='add'>+	MSG_MAP(GetDcModeMaxDpmFreq,		PPSMC_MSG_GetDcModeMaxDpmFreq,         1),</div><div class='add'>+	MSG_MAP(OverridePcieParameters,		PPSMC_MSG_OverridePcieParameters,      0),</div><div class='add'>+	MSG_MAP(DramLogSetDramAddrHigh,		PPSMC_MSG_DramLogSetDramAddrHigh,      0),</div><div class='add'>+	MSG_MAP(DramLogSetDramAddrLow,		PPSMC_MSG_DramLogSetDramAddrLow,       0),</div><div class='add'>+	MSG_MAP(DramLogSetDramSize,		PPSMC_MSG_DramLogSetDramSize,          0),</div><div class='add'>+	MSG_MAP(AllowGfxOff,			PPSMC_MSG_AllowGfxOff,                 0),</div><div class='add'>+	MSG_MAP(DisallowGfxOff,			PPSMC_MSG_DisallowGfxOff,              0),</div><div class='add'>+	MSG_MAP(SetMGpuFanBoostLimitRpm,	PPSMC_MSG_SetMGpuFanBoostLimitRpm,     0),</div><div class='add'>+	MSG_MAP(GetPptLimit,			PPSMC_MSG_GetPptLimit,                 0),</div><div class='add'>+	MSG_MAP(NotifyPowerSource,		PPSMC_MSG_NotifyPowerSource,           0),</div><div class='add'>+	MSG_MAP(Mode1Reset,			PPSMC_MSG_Mode1Reset,                  0),</div><div class='add'>+	MSG_MAP(PrepareMp1ForUnload,		PPSMC_MSG_PrepareMp1ForUnload,         0),</div><div class='add'>+	MSG_MAP(DFCstateControl,		PPSMC_MSG_SetExternalClientDfCstateAllow, 0),</div><div class='add'>+	MSG_MAP(ArmD3,				PPSMC_MSG_ArmD3,                       0),</div><div class='add'>+	MSG_MAP(SetNumBadMemoryPagesRetired,	PPSMC_MSG_SetNumBadMemoryPagesRetired,   0),</div><div class='add'>+	MSG_MAP(SetBadMemoryPagesRetiredFlagsPerChannel,</div><div class='add'>+			    PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel,   0),</div><div class='add'>+	MSG_MAP(AllowIHHostInterrupt,		PPSMC_MSG_AllowIHHostInterrupt,       0),</div><div class='add'>+	MSG_MAP(ReenableAcDcInterrupt,		PPSMC_MSG_ReenableAcDcInterrupt,       0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct cmn2asic_mapping smu_v14_0_2_clk_map[SMU_CLK_COUNT] = {</div><div class='add'>+	CLK_MAP(GFXCLK,		PPCLK_GFXCLK),</div><div class='add'>+	CLK_MAP(SCLK,		PPCLK_GFXCLK),</div><div class='add'>+	CLK_MAP(SOCCLK,		PPCLK_SOCCLK),</div><div class='add'>+	CLK_MAP(FCLK,		PPCLK_FCLK),</div><div class='add'>+	CLK_MAP(UCLK,		PPCLK_UCLK),</div><div class='add'>+	CLK_MAP(MCLK,		PPCLK_UCLK),</div><div class='add'>+	CLK_MAP(VCLK,		PPCLK_VCLK_0),</div><div class='add'>+	CLK_MAP(DCLK,		PPCLK_DCLK_0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct cmn2asic_mapping smu_v14_0_2_feature_mask_map[SMU_FEATURE_COUNT] = {</div><div class='add'>+	FEA_MAP(FW_DATA_READ),</div><div class='add'>+	FEA_MAP(DPM_GFXCLK),</div><div class='add'>+	FEA_MAP(DPM_GFX_POWER_OPTIMIZER),</div><div class='add'>+	FEA_MAP(DPM_UCLK),</div><div class='add'>+	FEA_MAP(DPM_FCLK),</div><div class='add'>+	FEA_MAP(DPM_SOCCLK),</div><div class='add'>+	FEA_MAP(DPM_LINK),</div><div class='add'>+	FEA_MAP(DPM_DCN),</div><div class='add'>+	FEA_MAP(VMEMP_SCALING),</div><div class='add'>+	FEA_MAP(VDDIO_MEM_SCALING),</div><div class='add'>+	FEA_MAP(DS_GFXCLK),</div><div class='add'>+	FEA_MAP(DS_SOCCLK),</div><div class='add'>+	FEA_MAP(DS_FCLK),</div><div class='add'>+	FEA_MAP(DS_LCLK),</div><div class='add'>+	FEA_MAP(DS_DCFCLK),</div><div class='add'>+	FEA_MAP(DS_UCLK),</div><div class='add'>+	FEA_MAP(GFX_ULV),</div><div class='add'>+	FEA_MAP(FW_DSTATE),</div><div class='add'>+	FEA_MAP(GFXOFF),</div><div class='add'>+	FEA_MAP(BACO),</div><div class='add'>+	FEA_MAP(MM_DPM),</div><div class='add'>+	FEA_MAP(SOC_MPCLK_DS),</div><div class='add'>+	FEA_MAP(BACO_MPCLK_DS),</div><div class='add'>+	FEA_MAP(THROTTLERS),</div><div class='add'>+	FEA_MAP(SMARTSHIFT),</div><div class='add'>+	FEA_MAP(GTHR),</div><div class='add'>+	FEA_MAP(ACDC),</div><div class='add'>+	FEA_MAP(VR0HOT),</div><div class='add'>+	FEA_MAP(FW_CTF),</div><div class='add'>+	FEA_MAP(FAN_CONTROL),</div><div class='add'>+	FEA_MAP(GFX_DCS),</div><div class='add'>+	FEA_MAP(GFX_READ_MARGIN),</div><div class='add'>+	FEA_MAP(LED_DISPLAY),</div><div class='add'>+	FEA_MAP(GFXCLK_SPREAD_SPECTRUM),</div><div class='add'>+	FEA_MAP(OUT_OF_BAND_MONITOR),</div><div class='add'>+	FEA_MAP(OPTIMIZED_VMIN),</div><div class='add'>+	FEA_MAP(GFX_IMU),</div><div class='add'>+	FEA_MAP(BOOT_TIME_CAL),</div><div class='add'>+	FEA_MAP(GFX_PCC_DFLL),</div><div class='add'>+	FEA_MAP(SOC_CG),</div><div class='add'>+	FEA_MAP(DF_CSTATE),</div><div class='add'>+	FEA_MAP(GFX_EDC),</div><div class='add'>+	FEA_MAP(BOOT_POWER_OPT),</div><div class='add'>+	FEA_MAP(CLOCK_POWER_DOWN_BYPASS),</div><div class='add'>+	FEA_MAP(DS_VCN),</div><div class='add'>+	FEA_MAP(BACO_CG),</div><div class='add'>+	FEA_MAP(MEM_TEMP_READ),</div><div class='add'>+	FEA_MAP(ATHUB_MMHUB_PG),</div><div class='add'>+	FEA_MAP(SOC_PCC),</div><div class='add'>+	[SMU_FEATURE_DPM_VCLK_BIT] = {1, FEATURE_MM_DPM_BIT},</div><div class='add'>+	[SMU_FEATURE_DPM_DCLK_BIT] = {1, FEATURE_MM_DPM_BIT},</div><div class='add'>+	[SMU_FEATURE_PPT_BIT] = {1, FEATURE_THROTTLERS_BIT},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct cmn2asic_mapping smu_v14_0_2_table_map[SMU_TABLE_COUNT] = {</div><div class='add'>+	TAB_MAP(PPTABLE),</div><div class='add'>+	TAB_MAP(WATERMARKS),</div><div class='add'>+	TAB_MAP(AVFS_PSM_DEBUG),</div><div class='add'>+	TAB_MAP(PMSTATUSLOG),</div><div class='add'>+	TAB_MAP(SMU_METRICS),</div><div class='add'>+	TAB_MAP(DRIVER_SMU_CONFIG),</div><div class='add'>+	TAB_MAP(ACTIVITY_MONITOR_COEFF),</div><div class='add'>+	[SMU_TABLE_COMBO_PPTABLE] = {1, TABLE_COMBO_PPTABLE},</div><div class='add'>+	TAB_MAP(I2C_COMMANDS),</div><div class='add'>+	TAB_MAP(ECCINFO),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct cmn2asic_mapping smu_v14_0_2_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {</div><div class='add'>+	PWR_MAP(AC),</div><div class='add'>+	PWR_MAP(DC),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct cmn2asic_mapping smu_v14_0_2_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT,	WORKLOAD_PPLIB_DEFAULT_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_FULLSCREEN3D,		WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_POWERSAVING,		WORKLOAD_PPLIB_POWER_SAVING_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VIDEO,		WORKLOAD_PPLIB_VIDEO_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VR,			WORKLOAD_PPLIB_VR_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE,		WORKLOAD_PPLIB_COMPUTE_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM,		WORKLOAD_PPLIB_CUSTOM_BIT),</div><div class='add'>+	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_WINDOW3D,		WORKLOAD_PPLIB_WINDOW_3D_BIT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+static const uint8_t smu_v14_0_2_throttler_map[] = {</div><div class='add'>+	[THROTTLER_PPT0_BIT]		= (SMU_THROTTLER_PPT0_BIT),</div><div class='add'>+	[THROTTLER_PPT1_BIT]		= (SMU_THROTTLER_PPT1_BIT),</div><div class='add'>+	[THROTTLER_PPT2_BIT]		= (SMU_THROTTLER_PPT2_BIT),</div><div class='add'>+	[THROTTLER_PPT3_BIT]		= (SMU_THROTTLER_PPT3_BIT),</div><div class='add'>+	[THROTTLER_TDC_GFX_BIT]		= (SMU_THROTTLER_TDC_GFX_BIT),</div><div class='add'>+	[THROTTLER_TDC_SOC_BIT]		= (SMU_THROTTLER_TDC_SOC_BIT),</div><div class='add'>+	[THROTTLER_TEMP_EDGE_BIT]	= (SMU_THROTTLER_TEMP_EDGE_BIT),</div><div class='add'>+	[THROTTLER_TEMP_HOTSPOT_BIT]	= (SMU_THROTTLER_TEMP_HOTSPOT_BIT),</div><div class='add'>+	[THROTTLER_TEMP_MEM_BIT]	= (SMU_THROTTLER_TEMP_MEM_BIT),</div><div class='add'>+	[THROTTLER_TEMP_VR_GFX_BIT]	= (SMU_THROTTLER_TEMP_VR_GFX_BIT),</div><div class='add'>+	[THROTTLER_TEMP_VR_SOC_BIT]	= (SMU_THROTTLER_TEMP_VR_SOC_BIT),</div><div class='add'>+	[THROTTLER_TEMP_VR_MEM0_BIT]	= (SMU_THROTTLER_TEMP_VR_MEM0_BIT),</div><div class='add'>+	[THROTTLER_TEMP_VR_MEM1_BIT]	= (SMU_THROTTLER_TEMP_VR_MEM1_BIT),</div><div class='add'>+	[THROTTLER_TEMP_LIQUID0_BIT]	= (SMU_THROTTLER_TEMP_LIQUID0_BIT),</div><div class='add'>+	[THROTTLER_TEMP_LIQUID1_BIT]	= (SMU_THROTTLER_TEMP_LIQUID1_BIT),</div><div class='add'>+	[THROTTLER_GFX_APCC_PLUS_BIT]	= (SMU_THROTTLER_APCC_BIT),</div><div class='add'>+	[THROTTLER_FIT_BIT]		= (SMU_THROTTLER_FIT_BIT),</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+smu_v14_0_2_get_allowed_feature_mask(struct smu_context *smu,</div><div class='add'>+				  uint32_t *feature_mask, uint32_t num)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	/*u32 smu_version;*/</div><div class='add'>+</div><div class='add'>+	if (num &gt; 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memset(feature_mask, 0xff, sizeof(uint32_t) * num);</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;pm.pp_feature &amp; PP_SCLK_DPM_MASK) {</div><div class='add'>+		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT);</div><div class='add'>+		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_IMU_BIT);</div><div class='add'>+	}</div><div class='add'>+#if 0</div><div class='add'>+	if (!(adev-&gt;pg_flags &amp; AMD_PG_SUPPORT_ATHUB) ||</div><div class='add'>+	    !(adev-&gt;pg_flags &amp; AMD_PG_SUPPORT_MMHUB))</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_ATHUB_MMHUB_PG_BIT);</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;pm.pp_feature &amp; PP_SOCCLK_DPM_MASK))</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);</div><div class='add'>+</div><div class='add'>+	/* PMFW 78.58 contains a critical fix for gfxoff feature */</div><div class='add'>+	smu_cmn_get_smc_version(smu, NULL, &amp;smu_version);</div><div class='add'>+	if ((smu_version &lt; 0x004e3a00) ||</div><div class='add'>+	     !(adev-&gt;pm.pp_feature &amp; PP_GFXOFF_MASK))</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_GFXOFF_BIT);</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;pm.pp_feature &amp; PP_MCLK_DPM_MASK)) {</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_DPM_UCLK_BIT);</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_VMEMP_SCALING_BIT);</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_VDDIO_MEM_SCALING_BIT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;pm.pp_feature &amp; PP_SCLK_DEEP_SLEEP_MASK))</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_DS_GFXCLK_BIT);</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;pm.pp_feature &amp; PP_PCIE_DPM_MASK)) {</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_DPM_LINK_BIT);</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_DS_LCLK_BIT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;pm.pp_feature &amp; PP_ULV_MASK))</div><div class='add'>+		*(uint64_t *)feature_mask &amp;= ~FEATURE_MASK(FEATURE_GFX_ULV_BIT);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_check_powerplay_table(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *table_context = &amp;smu-&gt;smu_table;</div><div class='add'>+	struct smu_14_0_2_powerplay_table *powerplay_table =</div><div class='add'>+		table_context-&gt;power_play_table;</div><div class='add'>+	struct smu_baco_context *smu_baco = &amp;smu-&gt;smu_baco;</div><div class='add'>+	PPTable_t *pptable = smu-&gt;smu_table.driver_pptable;</div><div class='add'>+	const OverDriveLimits_t * const overdrive_upperlimits =</div><div class='add'>+				&amp;pptable-&gt;SkuTable.OverDriveLimitsBasicMax;</div><div class='add'>+	const OverDriveLimits_t * const overdrive_lowerlimits =</div><div class='add'>+				&amp;pptable-&gt;SkuTable.OverDriveLimitsBasicMin;</div><div class='add'>+</div><div class='add'>+	if (powerplay_table-&gt;platform_caps &amp; SMU_14_0_2_PP_PLATFORM_CAP_HARDWAREDC)</div><div class='add'>+		smu-&gt;dc_controlled_by_gpio = true;</div><div class='add'>+</div><div class='add'>+	if (powerplay_table-&gt;platform_caps &amp; SMU_14_0_2_PP_PLATFORM_CAP_BACO) {</div><div class='add'>+		smu_baco-&gt;platform_support = true;</div><div class='add'>+</div><div class='add'>+		if (powerplay_table-&gt;platform_caps &amp; SMU_14_0_2_PP_PLATFORM_CAP_MACO)</div><div class='add'>+			smu_baco-&gt;maco_support = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!overdrive_lowerlimits-&gt;FeatureCtrlMask ||</div><div class='add'>+	    !overdrive_upperlimits-&gt;FeatureCtrlMask)</div><div class='add'>+		smu-&gt;od_enabled = false;</div><div class='add'>+</div><div class='add'>+	table_context-&gt;thermal_controller_type =</div><div class='add'>+		powerplay_table-&gt;thermal_controller_type;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Instead of having its own buffer space and get overdrive_table copied,</div><div class='add'>+	 * smu-&gt;od_settings just points to the actual overdrive_table</div><div class='add'>+	 */</div><div class='add'>+	smu-&gt;od_settings = &amp;powerplay_table-&gt;overdrive_table;</div><div class='add'>+</div><div class='add'>+	smu-&gt;adev-&gt;pm.no_fan =</div><div class='add'>+		!(pptable-&gt;PFE_Settings.FeaturesToRun[0] &amp; (1 &lt;&lt; FEATURE_FAN_CONTROL_BIT));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_store_powerplay_table(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *table_context = &amp;smu-&gt;smu_table;</div><div class='add'>+	struct smu_14_0_2_powerplay_table *powerplay_table =</div><div class='add'>+		table_context-&gt;power_play_table;</div><div class='add'>+</div><div class='add'>+	memcpy(table_context-&gt;driver_pptable, &amp;powerplay_table-&gt;smc_pptable,</div><div class='add'>+	       sizeof(PPTable_t));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifndef atom_smc_dpm_info_table_14_0_0</div><div class='add'>+struct atom_smc_dpm_info_table_14_0_0 {</div><div class='add'>+	struct atom_common_table_header table_header;</div><div class='add'>+	BoardTable_t BoardTable;</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_append_powerplay_table(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *table_context = &amp;smu-&gt;smu_table;</div><div class='add'>+	PPTable_t *smc_pptable = table_context-&gt;driver_pptable;</div><div class='add'>+	struct atom_smc_dpm_info_table_14_0_0 *smc_dpm_table;</div><div class='add'>+	BoardTable_t *BoardTable = &amp;smc_pptable-&gt;BoardTable;</div><div class='add'>+	int index, ret;</div><div class='add'>+</div><div class='add'>+	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,</div><div class='add'>+					    smc_dpm_info);</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_atombios_get_data_table(smu-&gt;adev, index, NULL, NULL, NULL,</div><div class='add'>+					     (uint8_t **)&amp;smc_dpm_table);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memcpy(BoardTable, &amp;smc_dpm_table-&gt;BoardTable, sizeof(BoardTable_t));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+static int smu_v14_0_2_get_pptable_from_pmfw(struct smu_context *smu,</div><div class='add'>+					     void **table,</div><div class='add'>+					     uint32_t *size)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	void *combo_pptable = smu_table-&gt;combo_pptable;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = smu_cmn_get_combo_pptable(smu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*table = combo_pptable;</div><div class='add'>+	*size = sizeof(struct smu_14_0_powerplay_table);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_get_pptable_from_pmfw(struct smu_context *smu,</div><div class='add'>+					     void **table,</div><div class='add'>+					     uint32_t *size)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	void *combo_pptable = smu_table-&gt;combo_pptable;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = smu_cmn_get_combo_pptable(smu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*table = combo_pptable;</div><div class='add'>+	*size = sizeof(struct smu_14_0_2_powerplay_table);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_setup_pptable(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_sriov_vf(smu-&gt;adev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!adev-&gt;scpm_enabled)</div><div class='add'>+		ret = smu_v14_0_setup_pptable(smu);</div><div class='add'>+	else</div><div class='add'>+		ret = smu_v14_0_2_get_pptable_from_pmfw(smu,</div><div class='add'>+							&amp;smu_table-&gt;power_play_table,</div><div class='add'>+							&amp;smu_table-&gt;power_play_table_size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = smu_v14_0_2_store_powerplay_table(smu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * With SCPM enabled, the operation below will be handled</div><div class='add'>+	 * by PSP. Driver involvment is unnecessary and useless.</div><div class='add'>+	 */</div><div class='add'>+	if (!adev-&gt;scpm_enabled) {</div><div class='add'>+		ret = smu_v14_0_2_append_powerplay_table(smu);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = smu_v14_0_2_check_powerplay_table(smu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_tables_init(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	struct smu_table *tables = smu_table-&gt;tables;</div><div class='add'>+</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),</div><div class='add'>+		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_WATERMARKS, sizeof(Watermarks_t),</div><div class='add'>+		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_SMU_METRICS, sizeof(SmuMetricsExternal_t),</div><div class='add'>+		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_I2C_COMMANDS, sizeof(SwI2cRequest_t),</div><div class='add'>+		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_OVERDRIVE, sizeof(OverDriveTable_t),</div><div class='add'>+		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_ACTIVITY_MONITOR_COEFF,</div><div class='add'>+		       sizeof(DpmActivityMonitorCoeffIntExternal_t), PAGE_SIZE,</div><div class='add'>+		       AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_COMBO_PPTABLE, MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE,</div><div class='add'>+			PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+	SMU_TABLE_INIT(tables, SMU_TABLE_ECCINFO, sizeof(EccInfoTable_t),</div><div class='add'>+			PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);</div><div class='add'>+</div><div class='add'>+	smu_table-&gt;metrics_table = kzalloc(sizeof(SmuMetricsExternal_t), GFP_KERNEL);</div><div class='add'>+	if (!smu_table-&gt;metrics_table)</div><div class='add'>+		goto err0_out;</div><div class='add'>+	smu_table-&gt;metrics_time = 0;</div><div class='add'>+</div><div class='add'>+	smu_table-&gt;gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_3);</div><div class='add'>+	smu_table-&gt;gpu_metrics_table = kzalloc(smu_table-&gt;gpu_metrics_table_size, GFP_KERNEL);</div><div class='add'>+	if (!smu_table-&gt;gpu_metrics_table)</div><div class='add'>+		goto err1_out;</div><div class='add'>+</div><div class='add'>+	smu_table-&gt;watermarks_table = kzalloc(sizeof(Watermarks_t), GFP_KERNEL);</div><div class='add'>+	if (!smu_table-&gt;watermarks_table)</div><div class='add'>+		goto err2_out;</div><div class='add'>+</div><div class='add'>+	smu_table-&gt;ecc_table = kzalloc(tables[SMU_TABLE_ECCINFO].size, GFP_KERNEL);</div><div class='add'>+	if (!smu_table-&gt;ecc_table)</div><div class='add'>+		goto err3_out;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err3_out:</div><div class='add'>+	kfree(smu_table-&gt;watermarks_table);</div><div class='add'>+err2_out:</div><div class='add'>+	kfree(smu_table-&gt;gpu_metrics_table);</div><div class='add'>+err1_out:</div><div class='add'>+	kfree(smu_table-&gt;metrics_table);</div><div class='add'>+err0_out:</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_allocate_dpm_context(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_dpm_context *smu_dpm = &amp;smu-&gt;smu_dpm;</div><div class='add'>+</div><div class='add'>+	smu_dpm-&gt;dpm_context = kzalloc(sizeof(struct smu_14_0_dpm_context),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!smu_dpm-&gt;dpm_context)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	smu_dpm-&gt;dpm_context_size = sizeof(struct smu_14_0_dpm_context);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_init_smc_tables(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = smu_v14_0_2_tables_init(smu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = smu_v14_0_2_allocate_dpm_context(smu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return smu_v14_0_init_smc_tables(smu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_set_default_dpm_table(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_14_0_dpm_context *dpm_context = smu-&gt;smu_dpm.dpm_context;</div><div class='add'>+	struct smu_table_context *table_context = &amp;smu-&gt;smu_table;</div><div class='add'>+	PPTable_t *pptable = table_context-&gt;driver_pptable;</div><div class='add'>+	SkuTable_t *skutable = &amp;pptable-&gt;SkuTable;</div><div class='add'>+	struct smu_14_0_dpm_table *dpm_table;</div><div class='add'>+	struct smu_14_0_pcie_table *pcie_table;</div><div class='add'>+	uint32_t link_level;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* socclk dpm table setup */</div><div class='add'>+	dpm_table = &amp;dpm_context-&gt;dpm_tables.soc_table;</div><div class='add'>+	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {</div><div class='add'>+		ret = smu_v14_0_set_single_dpm_table(smu,</div><div class='add'>+						     SMU_SOCCLK,</div><div class='add'>+						     dpm_table);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		dpm_table-&gt;count = 1;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].value = smu-&gt;smu_table.boot_values.socclk / 100;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].enabled = true;</div><div class='add'>+		dpm_table-&gt;min = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+		dpm_table-&gt;max = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* gfxclk dpm table setup */</div><div class='add'>+	dpm_table = &amp;dpm_context-&gt;dpm_tables.gfx_table;</div><div class='add'>+	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) {</div><div class='add'>+		ret = smu_v14_0_set_single_dpm_table(smu,</div><div class='add'>+						     SMU_GFXCLK,</div><div class='add'>+						     dpm_table);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Update the reported maximum shader clock to the value</div><div class='add'>+		 * which can be guarded to be achieved on all cards. This</div><div class='add'>+		 * is aligned with Window setting. And considering that value</div><div class='add'>+		 * might be not the peak frequency the card can achieve, it</div><div class='add'>+		 * is normal some real-time clock frequency can overtake this</div><div class='add'>+		 * labelled maximum clock frequency(for example in pp_dpm_sclk</div><div class='add'>+		 * sysfs output).</div><div class='add'>+		 */</div><div class='add'>+		if (skutable-&gt;DriverReportedClocks.GameClockAc &amp;&amp;</div><div class='add'>+		    (dpm_table-&gt;dpm_levels[dpm_table-&gt;count - 1].value &gt;</div><div class='add'>+		    skutable-&gt;DriverReportedClocks.GameClockAc)) {</div><div class='add'>+			dpm_table-&gt;dpm_levels[dpm_table-&gt;count - 1].value =</div><div class='add'>+				skutable-&gt;DriverReportedClocks.GameClockAc;</div><div class='add'>+			dpm_table-&gt;max = skutable-&gt;DriverReportedClocks.GameClockAc;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dpm_table-&gt;count = 1;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].value = smu-&gt;smu_table.boot_values.gfxclk / 100;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].enabled = true;</div><div class='add'>+		dpm_table-&gt;min = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+		dpm_table-&gt;max = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* uclk dpm table setup */</div><div class='add'>+	dpm_table = &amp;dpm_context-&gt;dpm_tables.uclk_table;</div><div class='add'>+	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) {</div><div class='add'>+		ret = smu_v14_0_set_single_dpm_table(smu,</div><div class='add'>+						     SMU_UCLK,</div><div class='add'>+						     dpm_table);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		dpm_table-&gt;count = 1;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].value = smu-&gt;smu_table.boot_values.uclk / 100;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].enabled = true;</div><div class='add'>+		dpm_table-&gt;min = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+		dpm_table-&gt;max = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* fclk dpm table setup */</div><div class='add'>+	dpm_table = &amp;dpm_context-&gt;dpm_tables.fclk_table;</div><div class='add'>+	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) {</div><div class='add'>+		ret = smu_v14_0_set_single_dpm_table(smu,</div><div class='add'>+						     SMU_FCLK,</div><div class='add'>+						     dpm_table);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		dpm_table-&gt;count = 1;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].value = smu-&gt;smu_table.boot_values.fclk / 100;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].enabled = true;</div><div class='add'>+		dpm_table-&gt;min = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+		dpm_table-&gt;max = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* vclk dpm table setup */</div><div class='add'>+	dpm_table = &amp;dpm_context-&gt;dpm_tables.vclk_table;</div><div class='add'>+	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) {</div><div class='add'>+		ret = smu_v14_0_set_single_dpm_table(smu,</div><div class='add'>+						     SMU_VCLK,</div><div class='add'>+						     dpm_table);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		dpm_table-&gt;count = 1;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].value = smu-&gt;smu_table.boot_values.vclk / 100;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].enabled = true;</div><div class='add'>+		dpm_table-&gt;min = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+		dpm_table-&gt;max = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* dclk dpm table setup */</div><div class='add'>+	dpm_table = &amp;dpm_context-&gt;dpm_tables.dclk_table;</div><div class='add'>+	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) {</div><div class='add'>+		ret = smu_v14_0_set_single_dpm_table(smu,</div><div class='add'>+						     SMU_DCLK,</div><div class='add'>+						     dpm_table);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		dpm_table-&gt;count = 1;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].value = smu-&gt;smu_table.boot_values.dclk / 100;</div><div class='add'>+		dpm_table-&gt;dpm_levels[0].enabled = true;</div><div class='add'>+		dpm_table-&gt;min = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+		dpm_table-&gt;max = dpm_table-&gt;dpm_levels[0].value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lclk dpm table setup */</div><div class='add'>+	pcie_table = &amp;dpm_context-&gt;dpm_tables.pcie_table;</div><div class='add'>+	pcie_table-&gt;num_of_link_levels = 0;</div><div class='add'>+	for (link_level = 0; link_level &lt; NUM_LINK_LEVELS; link_level++) {</div><div class='add'>+		if (!skutable-&gt;PcieGenSpeed[link_level] &amp;&amp;</div><div class='add'>+		    !skutable-&gt;PcieLaneCount[link_level] &amp;&amp;</div><div class='add'>+		    !skutable-&gt;LclkFreq[link_level])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pcie_table-&gt;pcie_gen[pcie_table-&gt;num_of_link_levels] =</div><div class='add'>+					skutable-&gt;PcieGenSpeed[link_level];</div><div class='add'>+		pcie_table-&gt;pcie_lane[pcie_table-&gt;num_of_link_levels] =</div><div class='add'>+					skutable-&gt;PcieLaneCount[link_level];</div><div class='add'>+		pcie_table-&gt;clk_freq[pcie_table-&gt;num_of_link_levels] =</div><div class='add'>+					skutable-&gt;LclkFreq[link_level];</div><div class='add'>+		pcie_table-&gt;num_of_link_levels++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool smu_v14_0_2_is_dpm_running(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	uint64_t feature_enabled;</div><div class='add'>+</div><div class='add'>+	ret = smu_cmn_get_enabled_mask(smu, &amp;feature_enabled);</div><div class='add'>+	if (ret)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !!(feature_enabled &amp; SMC_DPM_FEATURE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smu_v14_0_2_dump_pptable(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+       struct smu_table_context *table_context = &amp;smu-&gt;smu_table;</div><div class='add'>+       PPTable_t *pptable = table_context-&gt;driver_pptable;</div><div class='add'>+       PFE_Settings_t *PFEsettings = &amp;pptable-&gt;PFE_Settings;</div><div class='add'>+</div><div class='add'>+       dev_info(smu-&gt;adev-&gt;dev, "Dumped PPTable:\n");</div><div class='add'>+</div><div class='add'>+       dev_info(smu-&gt;adev-&gt;dev, "Version = 0x%08x\n", PFEsettings-&gt;Version);</div><div class='add'>+       dev_info(smu-&gt;adev-&gt;dev, "FeaturesToRun[0] = 0x%08x\n", PFEsettings-&gt;FeaturesToRun[0]);</div><div class='add'>+       dev_info(smu-&gt;adev-&gt;dev, "FeaturesToRun[1] = 0x%08x\n", PFEsettings-&gt;FeaturesToRun[1]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static uint32_t smu_v14_0_2_get_throttler_status(SmuMetrics_t *metrics)</div><div class='add'>+{</div><div class='add'>+	uint32_t throttler_status = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; THROTTLER_COUNT; i++)</div><div class='add'>+		throttler_status |=</div><div class='add'>+			(metrics-&gt;ThrottlingPercentage[i] ? 1U &lt;&lt; i : 0);</div><div class='add'>+</div><div class='add'>+	return throttler_status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SMU_14_0_2_BUSY_THRESHOLD	5</div><div class='add'>+static int smu_v14_0_2_get_smu_metrics_data(struct smu_context *smu,</div><div class='add'>+					    MetricsMember_t member,</div><div class='add'>+					    uint32_t *value)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	SmuMetrics_t *metrics =</div><div class='add'>+		&amp;(((SmuMetricsExternal_t *)(smu_table-&gt;metrics_table))-&gt;SmuMetrics);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = smu_cmn_get_metrics_table(smu,</div><div class='add'>+					NULL,</div><div class='add'>+					false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (member) {</div><div class='add'>+	case METRICS_CURR_GFXCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_GFXCLK];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_SOCCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_SOCCLK];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_UCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_UCLK];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_VCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_VCLK_0];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_DCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_DCLK_0];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_FCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_FCLK];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_DCEFCLK:</div><div class='add'>+		*value = metrics-&gt;CurrClock[PPCLK_DCFCLK];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_GFXCLK:</div><div class='add'>+		if (metrics-&gt;AverageGfxActivity &lt;= SMU_14_0_2_BUSY_THRESHOLD)</div><div class='add'>+			*value = metrics-&gt;AverageGfxclkFrequencyPostDs;</div><div class='add'>+		else</div><div class='add'>+			*value = metrics-&gt;AverageGfxclkFrequencyPreDs;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_FCLK:</div><div class='add'>+		if (metrics-&gt;AverageUclkActivity &lt;= SMU_14_0_2_BUSY_THRESHOLD)</div><div class='add'>+			*value = metrics-&gt;AverageFclkFrequencyPostDs;</div><div class='add'>+		else</div><div class='add'>+			*value = metrics-&gt;AverageFclkFrequencyPreDs;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_UCLK:</div><div class='add'>+		if (metrics-&gt;AverageUclkActivity &lt;= SMU_14_0_2_BUSY_THRESHOLD)</div><div class='add'>+			*value = metrics-&gt;AverageMemclkFrequencyPostDs;</div><div class='add'>+		else</div><div class='add'>+			*value = metrics-&gt;AverageMemclkFrequencyPreDs;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_VCLK:</div><div class='add'>+		*value = metrics-&gt;AverageVclk0Frequency;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_DCLK:</div><div class='add'>+		*value = metrics-&gt;AverageDclk0Frequency;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_VCLK1:</div><div class='add'>+		*value = metrics-&gt;AverageVclk1Frequency;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_DCLK1:</div><div class='add'>+		*value = metrics-&gt;AverageDclk1Frequency;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_GFXACTIVITY:</div><div class='add'>+		*value = metrics-&gt;AverageGfxActivity;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_MEMACTIVITY:</div><div class='add'>+		*value = metrics-&gt;AverageUclkActivity;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_AVERAGE_SOCKETPOWER:</div><div class='add'>+		*value = metrics-&gt;AverageSocketPower &lt;&lt; 8;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_TEMPERATURE_EDGE:</div><div class='add'>+		*value = metrics-&gt;AvgTemperature[TEMP_EDGE] *</div><div class='add'>+			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_TEMPERATURE_HOTSPOT:</div><div class='add'>+		*value = metrics-&gt;AvgTemperature[TEMP_HOTSPOT] *</div><div class='add'>+			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_TEMPERATURE_MEM:</div><div class='add'>+		*value = metrics-&gt;AvgTemperature[TEMP_MEM] *</div><div class='add'>+			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_TEMPERATURE_VRGFX:</div><div class='add'>+		*value = metrics-&gt;AvgTemperature[TEMP_VR_GFX] *</div><div class='add'>+			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_TEMPERATURE_VRSOC:</div><div class='add'>+		*value = metrics-&gt;AvgTemperature[TEMP_VR_SOC] *</div><div class='add'>+			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_THROTTLER_STATUS:</div><div class='add'>+		*value = smu_v14_0_2_get_throttler_status(metrics);</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_FANSPEED:</div><div class='add'>+		*value = metrics-&gt;AvgFanRpm;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_CURR_FANPWM:</div><div class='add'>+		*value = metrics-&gt;AvgFanPwm;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_VOLTAGE_VDDGFX:</div><div class='add'>+		*value = metrics-&gt;AvgVoltage[SVI_PLANE_VDD_GFX];</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_PCIE_RATE:</div><div class='add'>+		*value = metrics-&gt;PcieRate;</div><div class='add'>+		break;</div><div class='add'>+	case METRICS_PCIE_WIDTH:</div><div class='add'>+		*value = metrics-&gt;PcieWidth;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*value = UINT_MAX;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_get_dpm_ultimate_freq(struct smu_context *smu,</div><div class='add'>+					     enum smu_clk_type clk_type,</div><div class='add'>+					     uint32_t *min,</div><div class='add'>+					     uint32_t *max)</div><div class='add'>+{</div><div class='add'>+	struct smu_14_0_dpm_context *dpm_context =</div><div class='add'>+		smu-&gt;smu_dpm.dpm_context;</div><div class='add'>+	struct smu_14_0_dpm_table *dpm_table;</div><div class='add'>+</div><div class='add'>+	switch (clk_type) {</div><div class='add'>+	case SMU_MCLK:</div><div class='add'>+	case SMU_UCLK:</div><div class='add'>+		/* uclk dpm table */</div><div class='add'>+		dpm_table = &amp;dpm_context-&gt;dpm_tables.uclk_table;</div><div class='add'>+		break;</div><div class='add'>+	case SMU_GFXCLK:</div><div class='add'>+	case SMU_SCLK:</div><div class='add'>+		/* gfxclk dpm table */</div><div class='add'>+		dpm_table = &amp;dpm_context-&gt;dpm_tables.gfx_table;</div><div class='add'>+		break;</div><div class='add'>+	case SMU_SOCCLK:</div><div class='add'>+		/* socclk dpm table */</div><div class='add'>+		dpm_table = &amp;dpm_context-&gt;dpm_tables.soc_table;</div><div class='add'>+		break;</div><div class='add'>+	case SMU_FCLK:</div><div class='add'>+		/* fclk dpm table */</div><div class='add'>+		dpm_table = &amp;dpm_context-&gt;dpm_tables.fclk_table;</div><div class='add'>+		break;</div><div class='add'>+	case SMU_VCLK:</div><div class='add'>+	case SMU_VCLK1:</div><div class='add'>+		/* vclk dpm table */</div><div class='add'>+		dpm_table = &amp;dpm_context-&gt;dpm_tables.vclk_table;</div><div class='add'>+		break;</div><div class='add'>+	case SMU_DCLK:</div><div class='add'>+	case SMU_DCLK1:</div><div class='add'>+		/* dclk dpm table */</div><div class='add'>+		dpm_table = &amp;dpm_context-&gt;dpm_tables.dclk_table;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(smu-&gt;adev-&gt;dev, "Unsupported clock type!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (min)</div><div class='add'>+		*min = dpm_table-&gt;min;</div><div class='add'>+	if (max)</div><div class='add'>+		*max = dpm_table-&gt;max;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_read_sensor(struct smu_context *smu,</div><div class='add'>+				   enum amd_pp_sensors sensor,</div><div class='add'>+				   void *data,</div><div class='add'>+				   uint32_t *size)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *table_context = &amp;smu-&gt;smu_table;</div><div class='add'>+	PPTable_t *smc_pptable = table_context-&gt;driver_pptable;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (sensor) {</div><div class='add'>+	case AMDGPU_PP_SENSOR_MAX_FAN_RPM:</div><div class='add'>+		*(uint16_t *)data = smc_pptable-&gt;CustomSkuTable.FanMaximumRpm;</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_MEM_LOAD:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_AVERAGE_MEMACTIVITY,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_GPU_LOAD:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_AVERAGE_GFXACTIVITY,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_GPU_AVG_POWER:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_AVERAGE_SOCKETPOWER,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_HOTSPOT_TEMP:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_TEMPERATURE_HOTSPOT,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_EDGE_TEMP:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_TEMPERATURE_EDGE,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_MEM_TEMP:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_TEMPERATURE_MEM,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_GFX_MCLK:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_CURR_UCLK,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*(uint32_t *)data *= 100;</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_GFX_SCLK:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_AVERAGE_GFXCLK,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*(uint32_t *)data *= 100;</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_PP_SENSOR_VDDGFX:</div><div class='add'>+		ret = smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						       METRICS_VOLTAGE_VDDGFX,</div><div class='add'>+						       (uint32_t *)data);</div><div class='add'>+		*size = 4;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_get_current_clk_freq_by_table(struct smu_context *smu,</div><div class='add'>+						     enum smu_clk_type clk_type,</div><div class='add'>+						     uint32_t *value)</div><div class='add'>+{</div><div class='add'>+	MetricsMember_t member_type;</div><div class='add'>+	int clk_id = 0;</div><div class='add'>+</div><div class='add'>+	clk_id = smu_cmn_to_asic_specific_index(smu,</div><div class='add'>+						CMN2ASIC_MAPPING_CLK,</div><div class='add'>+						clk_type);</div><div class='add'>+	if (clk_id &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (clk_id) {</div><div class='add'>+	case PPCLK_GFXCLK:</div><div class='add'>+		member_type = METRICS_AVERAGE_GFXCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PPCLK_UCLK:</div><div class='add'>+		member_type = METRICS_CURR_UCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PPCLK_FCLK:</div><div class='add'>+		member_type = METRICS_CURR_FCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PPCLK_SOCCLK:</div><div class='add'>+		member_type = METRICS_CURR_SOCCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PPCLK_VCLK_0:</div><div class='add'>+		member_type = METRICS_AVERAGE_VCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PPCLK_DCLK_0:</div><div class='add'>+		member_type = METRICS_AVERAGE_DCLK;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return smu_v14_0_2_get_smu_metrics_data(smu,</div><div class='add'>+						member_type,</div><div class='add'>+						value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_print_clk_levels(struct smu_context *smu,</div><div class='add'>+					enum smu_clk_type clk_type,</div><div class='add'>+					char *buf)</div><div class='add'>+{</div><div class='add'>+	struct smu_dpm_context *smu_dpm = &amp;smu-&gt;smu_dpm;</div><div class='add'>+	struct smu_14_0_dpm_context *dpm_context = smu_dpm-&gt;dpm_context;</div><div class='add'>+	struct smu_14_0_dpm_table *single_dpm_table;</div><div class='add'>+	int i, curr_freq, size = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	smu_cmn_get_sysfs_buf(&amp;buf, &amp;size);</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ras_intr_triggered()) {</div><div class='add'>+		size += sysfs_emit_at(buf, size, "unavailable\n");</div><div class='add'>+		return size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (clk_type) {</div><div class='add'>+	case SMU_SCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.gfx_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_MCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.uclk_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_SOCCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.soc_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_FCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.fclk_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_VCLK:</div><div class='add'>+	case SMU_VCLK1:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.vclk_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_DCLK:</div><div class='add'>+	case SMU_DCLK1:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.dclk_table);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (clk_type) {</div><div class='add'>+	case SMU_SCLK:</div><div class='add'>+	case SMU_MCLK:</div><div class='add'>+	case SMU_SOCCLK:</div><div class='add'>+	case SMU_FCLK:</div><div class='add'>+	case SMU_VCLK:</div><div class='add'>+	case SMU_VCLK1:</div><div class='add'>+	case SMU_DCLK:</div><div class='add'>+	case SMU_DCLK1:</div><div class='add'>+		ret = smu_v14_0_2_get_current_clk_freq_by_table(smu, clk_type, &amp;curr_freq);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(smu-&gt;adev-&gt;dev, "Failed to get current clock freq!");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (single_dpm_table-&gt;is_fine_grained) {</div><div class='add'>+			/*</div><div class='add'>+			 * For fine grained dpms, there are only two dpm levels:</div><div class='add'>+			 *   - level 0 -&gt; min clock freq</div><div class='add'>+			 *   - level 1 -&gt; max clock freq</div><div class='add'>+			 * And the current clock frequency can be any value between them.</div><div class='add'>+			 * So, if the current clock frequency is not at level 0 or level 1,</div><div class='add'>+			 * we will fake it as three dpm levels:</div><div class='add'>+			 *   - level 0 -&gt; min clock freq</div><div class='add'>+			 *   - level 1 -&gt; current actual clock freq</div><div class='add'>+			 *   - level 2 -&gt; max clock freq</div><div class='add'>+			 */</div><div class='add'>+			if ((single_dpm_table-&gt;dpm_levels[0].value != curr_freq) &amp;&amp;</div><div class='add'>+			     (single_dpm_table-&gt;dpm_levels[1].value != curr_freq)) {</div><div class='add'>+				size += sysfs_emit_at(buf, size, "0: %uMhz\n",</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[0].value);</div><div class='add'>+				size += sysfs_emit_at(buf, size, "1: %uMhz *\n",</div><div class='add'>+						curr_freq);</div><div class='add'>+				size += sysfs_emit_at(buf, size, "2: %uMhz\n",</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[1].value);</div><div class='add'>+			} else {</div><div class='add'>+				size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[0].value,</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[0].value == curr_freq ? "*" : "");</div><div class='add'>+				size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[1].value,</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[1].value == curr_freq ? "*" : "");</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			for (i = 0; i &lt; single_dpm_table-&gt;count; i++)</div><div class='add'>+				size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",</div><div class='add'>+						i, single_dpm_table-&gt;dpm_levels[i].value,</div><div class='add'>+						single_dpm_table-&gt;dpm_levels[i].value == curr_freq ? "*" : "");</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case SMU_PCIE:</div><div class='add'>+		// TODO</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_force_clk_levels(struct smu_context *smu,</div><div class='add'>+					enum smu_clk_type clk_type,</div><div class='add'>+					uint32_t mask)</div><div class='add'>+{</div><div class='add'>+	struct smu_dpm_context *smu_dpm = &amp;smu-&gt;smu_dpm;</div><div class='add'>+	struct smu_14_0_dpm_context *dpm_context = smu_dpm-&gt;dpm_context;</div><div class='add'>+	struct smu_14_0_dpm_table *single_dpm_table;</div><div class='add'>+	uint32_t soft_min_level, soft_max_level;</div><div class='add'>+	uint32_t min_freq, max_freq;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	soft_min_level = mask ? (ffs(mask) - 1) : 0;</div><div class='add'>+	soft_max_level = mask ? (fls(mask) - 1) : 0;</div><div class='add'>+</div><div class='add'>+	switch (clk_type) {</div><div class='add'>+	case SMU_GFXCLK:</div><div class='add'>+	case SMU_SCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.gfx_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_MCLK:</div><div class='add'>+	case SMU_UCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.uclk_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_SOCCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.soc_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_FCLK:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.fclk_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_VCLK:</div><div class='add'>+	case SMU_VCLK1:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.vclk_table);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_DCLK:</div><div class='add'>+	case SMU_DCLK1:</div><div class='add'>+		single_dpm_table = &amp;(dpm_context-&gt;dpm_tables.dclk_table);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (clk_type) {</div><div class='add'>+	case SMU_GFXCLK:</div><div class='add'>+	case SMU_SCLK:</div><div class='add'>+	case SMU_MCLK:</div><div class='add'>+	case SMU_UCLK:</div><div class='add'>+	case SMU_SOCCLK:</div><div class='add'>+	case SMU_FCLK:</div><div class='add'>+	case SMU_VCLK:</div><div class='add'>+	case SMU_VCLK1:</div><div class='add'>+	case SMU_DCLK:</div><div class='add'>+	case SMU_DCLK1:</div><div class='add'>+		if (single_dpm_table-&gt;is_fine_grained) {</div><div class='add'>+			/* There is only 2 levels for fine grained DPM */</div><div class='add'>+			soft_max_level = (soft_max_level &gt;= 1 ? 1 : 0);</div><div class='add'>+			soft_min_level = (soft_min_level &gt;= 1 ? 1 : 0);</div><div class='add'>+		} else {</div><div class='add'>+			if ((soft_max_level &gt;= single_dpm_table-&gt;count) ||</div><div class='add'>+			    (soft_min_level &gt;= single_dpm_table-&gt;count))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		min_freq = single_dpm_table-&gt;dpm_levels[soft_min_level].value;</div><div class='add'>+		max_freq = single_dpm_table-&gt;dpm_levels[soft_max_level].value;</div><div class='add'>+</div><div class='add'>+		ret = smu_v14_0_set_soft_freq_limited_range(smu,</div><div class='add'>+							    clk_type,</div><div class='add'>+							    min_freq,</div><div class='add'>+							    max_freq);</div><div class='add'>+		break;</div><div class='add'>+	case SMU_DCEFCLK:</div><div class='add'>+	case SMU_PCIE:</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_update_pcie_parameters(struct smu_context *smu,</div><div class='add'>+					      uint8_t pcie_gen_cap,</div><div class='add'>+					      uint8_t pcie_width_cap)</div><div class='add'>+{</div><div class='add'>+	struct smu_14_0_dpm_context *dpm_context = smu-&gt;smu_dpm.dpm_context;</div><div class='add'>+	struct smu_14_0_pcie_table *pcie_table =</div><div class='add'>+				&amp;dpm_context-&gt;dpm_tables.pcie_table;</div><div class='add'>+	uint32_t smu_pcie_arg;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie_table-&gt;num_of_link_levels; i++) {</div><div class='add'>+		if (pcie_table-&gt;pcie_gen[i] &gt; pcie_gen_cap)</div><div class='add'>+			pcie_table-&gt;pcie_gen[i] = pcie_gen_cap;</div><div class='add'>+		if (pcie_table-&gt;pcie_lane[i] &gt; pcie_width_cap)</div><div class='add'>+			pcie_table-&gt;pcie_lane[i] = pcie_width_cap;</div><div class='add'>+</div><div class='add'>+		smu_pcie_arg = i &lt;&lt; 16;</div><div class='add'>+		smu_pcie_arg |= pcie_table-&gt;pcie_gen[i] &lt;&lt; 8;</div><div class='add'>+		smu_pcie_arg |= pcie_table-&gt;pcie_lane[i];</div><div class='add'>+</div><div class='add'>+		ret = smu_cmn_send_smc_msg_with_param(smu,</div><div class='add'>+						      SMU_MSG_OverridePcieParameters,</div><div class='add'>+						      smu_pcie_arg,</div><div class='add'>+						      NULL);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_get_thermal_temperature_range(struct smu_context *smu,</div><div class='add'>+						     struct smu_temperature_range *range)</div><div class='add'>+{</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_populate_umd_state_clk(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smu_v14_0_2_get_unique_id(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	SmuMetrics_t *metrics =</div><div class='add'>+		&amp;(((SmuMetricsExternal_t *)(smu_table-&gt;metrics_table))-&gt;SmuMetrics);</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	uint32_t upper32 = 0, lower32 = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = smu_cmn_get_metrics_table(smu, NULL, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	upper32 = metrics-&gt;PublicSerialNumberUpper;</div><div class='add'>+	lower32 = metrics-&gt;PublicSerialNumberLower;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	adev-&gt;unique_id = ((uint64_t)upper32 &lt;&lt; 32) | lower32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_get_power_limit(struct smu_context *smu,</div><div class='add'>+				       uint32_t *current_power_limit,</div><div class='add'>+				       uint32_t *default_power_limit,</div><div class='add'>+				       uint32_t *max_power_limit,</div><div class='add'>+				       uint32_t *min_power_limit)</div><div class='add'>+{</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_get_power_profile_mode(struct smu_context *smu,</div><div class='add'>+					      char *buf)</div><div class='add'>+{</div><div class='add'>+	DpmActivityMonitorCoeffIntExternal_t activity_monitor_external;</div><div class='add'>+	DpmActivityMonitorCoeffInt_t *activity_monitor =</div><div class='add'>+		&amp;(activity_monitor_external.DpmActivityMonitorCoeffInt);</div><div class='add'>+	static const char *title[] = {</div><div class='add'>+			"PROFILE_INDEX(NAME)",</div><div class='add'>+			"CLOCK_TYPE(NAME)",</div><div class='add'>+			"FPS",</div><div class='add'>+			"MinActiveFreqType",</div><div class='add'>+			"MinActiveFreq",</div><div class='add'>+			"BoosterFreqType",</div><div class='add'>+			"BoosterFreq",</div><div class='add'>+			"PD_Data_limit_c",</div><div class='add'>+			"PD_Data_error_coeff",</div><div class='add'>+			"PD_Data_error_rate_coeff"};</div><div class='add'>+	int16_t workload_type = 0;</div><div class='add'>+	uint32_t i, size = 0;</div><div class='add'>+	int result = 0;</div><div class='add'>+</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	size += sysfs_emit_at(buf, size, "%16s %s %s %s %s %s %s %s %s %s\n",</div><div class='add'>+			title[0], title[1], title[2], title[3], title[4], title[5],</div><div class='add'>+			title[6], title[7], title[8], title[9]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PP_SMC_POWER_PROFILE_COUNT; i++) {</div><div class='add'>+		/* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */</div><div class='add'>+		workload_type = smu_cmn_to_asic_specific_index(smu,</div><div class='add'>+							       CMN2ASIC_MAPPING_WORKLOAD,</div><div class='add'>+							       i);</div><div class='add'>+		if (workload_type == -ENOTSUPP)</div><div class='add'>+			continue;</div><div class='add'>+		else if (workload_type &lt; 0)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		result = smu_cmn_update_table(smu,</div><div class='add'>+					      SMU_TABLE_ACTIVITY_MONITOR_COEFF,</div><div class='add'>+					      workload_type,</div><div class='add'>+					      (void *)(&amp;activity_monitor_external),</div><div class='add'>+					      false);</div><div class='add'>+		if (result) {</div><div class='add'>+			dev_err(smu-&gt;adev-&gt;dev, "[%s] Failed to get activity monitor!", __func__);</div><div class='add'>+			return result;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		size += sysfs_emit_at(buf, size, "%2d %14s%s:\n",</div><div class='add'>+			i, amdgpu_pp_profile_name[i], (i == smu-&gt;power_profile_mode) ? "*" : " ");</div><div class='add'>+</div><div class='add'>+		size += sysfs_emit_at(buf, size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d\n",</div><div class='add'>+			" ",</div><div class='add'>+			0,</div><div class='add'>+			"GFXCLK",</div><div class='add'>+			activity_monitor-&gt;Gfx_FPS,</div><div class='add'>+			activity_monitor-&gt;Gfx_MinActiveFreqType,</div><div class='add'>+			activity_monitor-&gt;Gfx_MinActiveFreq,</div><div class='add'>+			activity_monitor-&gt;Gfx_BoosterFreqType,</div><div class='add'>+			activity_monitor-&gt;Gfx_BoosterFreq,</div><div class='add'>+			activity_monitor-&gt;Gfx_PD_Data_limit_c,</div><div class='add'>+			activity_monitor-&gt;Gfx_PD_Data_error_coeff,</div><div class='add'>+			activity_monitor-&gt;Gfx_PD_Data_error_rate_coeff);</div><div class='add'>+</div><div class='add'>+		size += sysfs_emit_at(buf, size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d\n",</div><div class='add'>+			" ",</div><div class='add'>+			1,</div><div class='add'>+			"FCLK",</div><div class='add'>+			activity_monitor-&gt;Fclk_FPS,</div><div class='add'>+			activity_monitor-&gt;Fclk_MinActiveFreqType,</div><div class='add'>+			activity_monitor-&gt;Fclk_MinActiveFreq,</div><div class='add'>+			activity_monitor-&gt;Fclk_BoosterFreqType,</div><div class='add'>+			activity_monitor-&gt;Fclk_BoosterFreq,</div><div class='add'>+			activity_monitor-&gt;Fclk_PD_Data_limit_c,</div><div class='add'>+			activity_monitor-&gt;Fclk_PD_Data_error_coeff,</div><div class='add'>+			activity_monitor-&gt;Fclk_PD_Data_error_rate_coeff);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_set_power_profile_mode(struct smu_context *smu,</div><div class='add'>+					      long *input,</div><div class='add'>+					      uint32_t size)</div><div class='add'>+{</div><div class='add'>+	DpmActivityMonitorCoeffIntExternal_t activity_monitor_external;</div><div class='add'>+	DpmActivityMonitorCoeffInt_t *activity_monitor =</div><div class='add'>+		&amp;(activity_monitor_external.DpmActivityMonitorCoeffInt);</div><div class='add'>+	int workload_type, ret = 0;</div><div class='add'>+</div><div class='add'>+	smu-&gt;power_profile_mode = input[size];</div><div class='add'>+</div><div class='add'>+	if (smu-&gt;power_profile_mode &gt;= PP_SMC_POWER_PROFILE_COUNT) {</div><div class='add'>+		dev_err(smu-&gt;adev-&gt;dev, "Invalid power profile mode %d\n", smu-&gt;power_profile_mode);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (smu-&gt;power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {</div><div class='add'>+		ret = smu_cmn_update_table(smu,</div><div class='add'>+					   SMU_TABLE_ACTIVITY_MONITOR_COEFF,</div><div class='add'>+					   WORKLOAD_PPLIB_CUSTOM_BIT,</div><div class='add'>+					   (void *)(&amp;activity_monitor_external),</div><div class='add'>+					   false);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(smu-&gt;adev-&gt;dev, "[%s] Failed to get activity monitor!", __func__);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (input[0]) {</div><div class='add'>+		case 0: /* Gfxclk */</div><div class='add'>+			activity_monitor-&gt;Gfx_FPS = input[1];</div><div class='add'>+			activity_monitor-&gt;Gfx_MinActiveFreqType = input[2];</div><div class='add'>+			activity_monitor-&gt;Gfx_MinActiveFreq = input[3];</div><div class='add'>+			activity_monitor-&gt;Gfx_BoosterFreqType = input[4];</div><div class='add'>+			activity_monitor-&gt;Gfx_BoosterFreq = input[5];</div><div class='add'>+			activity_monitor-&gt;Gfx_PD_Data_limit_c = input[6];</div><div class='add'>+			activity_monitor-&gt;Gfx_PD_Data_error_coeff = input[7];</div><div class='add'>+			activity_monitor-&gt;Gfx_PD_Data_error_rate_coeff = input[8];</div><div class='add'>+			break;</div><div class='add'>+		case 1: /* Fclk */</div><div class='add'>+			activity_monitor-&gt;Fclk_FPS = input[1];</div><div class='add'>+			activity_monitor-&gt;Fclk_MinActiveFreqType = input[2];</div><div class='add'>+			activity_monitor-&gt;Fclk_MinActiveFreq = input[3];</div><div class='add'>+			activity_monitor-&gt;Fclk_BoosterFreqType = input[4];</div><div class='add'>+			activity_monitor-&gt;Fclk_BoosterFreq = input[5];</div><div class='add'>+			activity_monitor-&gt;Fclk_PD_Data_limit_c = input[6];</div><div class='add'>+			activity_monitor-&gt;Fclk_PD_Data_error_coeff = input[7];</div><div class='add'>+			activity_monitor-&gt;Fclk_PD_Data_error_rate_coeff = input[8];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = smu_cmn_update_table(smu,</div><div class='add'>+					   SMU_TABLE_ACTIVITY_MONITOR_COEFF,</div><div class='add'>+					   WORKLOAD_PPLIB_CUSTOM_BIT,</div><div class='add'>+					   (void *)(&amp;activity_monitor_external),</div><div class='add'>+					   true);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(smu-&gt;adev-&gt;dev, "[%s] Failed to set activity monitor!", __func__);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */</div><div class='add'>+	workload_type = smu_cmn_to_asic_specific_index(smu,</div><div class='add'>+						       CMN2ASIC_MAPPING_WORKLOAD,</div><div class='add'>+						       smu-&gt;power_profile_mode);</div><div class='add'>+	if (workload_type &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return smu_cmn_send_smc_msg_with_param(smu,</div><div class='add'>+					       SMU_MSG_SetWorkloadMask,</div><div class='add'>+					       1 &lt;&lt; workload_type,</div><div class='add'>+					       NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_baco_enter(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct smu_baco_context *smu_baco = &amp;smu-&gt;smu_baco;</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;in_runpm &amp;&amp; smu_cmn_is_audio_func_enabled(adev))</div><div class='add'>+		return smu_v14_0_baco_set_armd3_sequence(smu,</div><div class='add'>+				smu_baco-&gt;maco_support ? BACO_SEQ_BAMACO : BACO_SEQ_BACO);</div><div class='add'>+	else</div><div class='add'>+		return smu_v14_0_baco_enter(smu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_baco_exit(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;in_runpm &amp;&amp; smu_cmn_is_audio_func_enabled(adev)) {</div><div class='add'>+		/* Wait for PMFW handling for the Dstate change */</div><div class='add'>+		usleep_range(10000, 11000);</div><div class='add'>+		return smu_v14_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);</div><div class='add'>+	} else {</div><div class='add'>+		return smu_v14_0_baco_exit(smu);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool smu_v14_0_2_is_mode1_reset_supported(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_i2c_xfer(struct i2c_adapter *i2c_adap,</div><div class='add'>+				   struct i2c_msg *msg, int num_msgs)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(i2c_adap);</div><div class='add'>+	struct amdgpu_device *adev = smu_i2c-&gt;adev;</div><div class='add'>+	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='add'>+	struct smu_table_context *smu_table = &amp;smu-&gt;smu_table;</div><div class='add'>+	struct smu_table *table = &amp;smu_table-&gt;driver_table;</div><div class='add'>+	SwI2cRequest_t *req, *res = (SwI2cRequest_t *)table-&gt;cpu_addr;</div><div class='add'>+	int i, j, r, c;</div><div class='add'>+	u16 dir;</div><div class='add'>+</div><div class='add'>+	if (!adev-&gt;pm.dpm_enabled)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	req = kzalloc(sizeof(*req), GFP_KERNEL);</div><div class='add'>+	if (!req)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	req-&gt;I2CcontrollerPort = smu_i2c-&gt;port;</div><div class='add'>+	req-&gt;I2CSpeed = I2C_SPEED_FAST_400K;</div><div class='add'>+	req-&gt;SlaveAddress = msg[0].addr &lt;&lt; 1; /* wants an 8-bit address */</div><div class='add'>+	dir = msg[0].flags &amp; I2C_M_RD;</div><div class='add'>+</div><div class='add'>+	for (c = i = 0; i &lt; num_msgs; i++) {</div><div class='add'>+		for (j = 0; j &lt; msg[i].len; j++, c++) {</div><div class='add'>+			SwI2cCmd_t *cmd = &amp;req-&gt;SwI2cCmds[c];</div><div class='add'>+</div><div class='add'>+			if (!(msg[i].flags &amp; I2C_M_RD)) {</div><div class='add'>+				/* write */</div><div class='add'>+				cmd-&gt;CmdConfig |= CMDCONFIG_READWRITE_MASK;</div><div class='add'>+				cmd-&gt;ReadWriteData = msg[i].buf[j];</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if ((dir ^ msg[i].flags) &amp; I2C_M_RD) {</div><div class='add'>+				/* The direction changes.</div><div class='add'>+				 */</div><div class='add'>+				dir = msg[i].flags &amp; I2C_M_RD;</div><div class='add'>+				cmd-&gt;CmdConfig |= CMDCONFIG_RESTART_MASK;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			req-&gt;NumCmds++;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Insert STOP if we are at the last byte of either last</div><div class='add'>+			 * message for the transaction or the client explicitly</div><div class='add'>+			 * requires a STOP at this particular message.</div><div class='add'>+			 */</div><div class='add'>+			if ((j == msg[i].len - 1) &amp;&amp;</div><div class='add'>+			    ((i == num_msgs - 1) || (msg[i].flags &amp; I2C_M_STOP))) {</div><div class='add'>+				cmd-&gt;CmdConfig &amp;= ~CMDCONFIG_RESTART_MASK;</div><div class='add'>+				cmd-&gt;CmdConfig |= CMDCONFIG_STOP_MASK;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_lock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+	r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+	if (r)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	for (c = i = 0; i &lt; num_msgs; i++) {</div><div class='add'>+		if (!(msg[i].flags &amp; I2C_M_RD)) {</div><div class='add'>+			c += msg[i].len;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		for (j = 0; j &lt; msg[i].len; j++, c++) {</div><div class='add'>+			SwI2cCmd_t *cmd = &amp;res-&gt;SwI2cCmds[c];</div><div class='add'>+</div><div class='add'>+			msg[i].buf[j] = cmd-&gt;ReadWriteData;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	r = num_msgs;</div><div class='add'>+fail:</div><div class='add'>+	kfree(req);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 smu_v14_0_2_i2c_func(struct i2c_adapter *adap)</div><div class='add'>+{</div><div class='add'>+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_algorithm smu_v14_0_2_i2c_algo = {</div><div class='add'>+	.master_xfer = smu_v14_0_2_i2c_xfer,</div><div class='add'>+	.functionality = smu_v14_0_2_i2c_func,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct i2c_adapter_quirks smu_v14_0_2_i2c_control_quirks = {</div><div class='add'>+	.flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR | I2C_AQ_NO_ZERO_LEN,</div><div class='add'>+	.max_read_len  = MAX_SW_I2C_COMMANDS,</div><div class='add'>+	.max_write_len = MAX_SW_I2C_COMMANDS,</div><div class='add'>+	.max_comb_1st_msg_len = 2,</div><div class='add'>+	.max_comb_2nd_msg_len = MAX_SW_I2C_COMMANDS - 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_i2c_control_init(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	int res, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_SMU_I2C_BUSES; i++) {</div><div class='add'>+		struct amdgpu_smu_i2c_bus *smu_i2c = &amp;adev-&gt;pm.smu_i2c[i];</div><div class='add'>+		struct i2c_adapter *control = &amp;smu_i2c-&gt;adapter;</div><div class='add'>+</div><div class='add'>+		smu_i2c-&gt;adev = adev;</div><div class='add'>+		smu_i2c-&gt;port = i;</div><div class='add'>+		mutex_init(&amp;smu_i2c-&gt;mutex);</div><div class='add'>+		control-&gt;owner = THIS_MODULE;</div><div class='add'>+		control-&gt;class = I2C_CLASS_SPD;</div><div class='add'>+		control-&gt;dev.parent = &amp;adev-&gt;pdev-&gt;dev;</div><div class='add'>+		control-&gt;algo = &amp;smu_v14_0_2_i2c_algo;</div><div class='add'>+		snprintf(control-&gt;name, sizeof(control-&gt;name), "AMDGPU SMU %d", i);</div><div class='add'>+		control-&gt;quirks = &amp;smu_v14_0_2_i2c_control_quirks;</div><div class='add'>+		i2c_set_adapdata(control, smu_i2c);</div><div class='add'>+</div><div class='add'>+		res = i2c_add_adapter(control);</div><div class='add'>+		if (res) {</div><div class='add'>+			DRM_ERROR("Failed to register hw i2c, err: %d\n", res);</div><div class='add'>+			goto Out_err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* assign the buses used for the FRU EEPROM and RAS EEPROM */</div><div class='add'>+	/* XXX ideally this would be something in a vbios data table */</div><div class='add'>+	adev-&gt;pm.ras_eeprom_i2c_bus = &amp;adev-&gt;pm.smu_i2c[1].adapter;</div><div class='add'>+	adev-&gt;pm.fru_eeprom_i2c_bus = &amp;adev-&gt;pm.smu_i2c[0].adapter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+Out_err:</div><div class='add'>+	for ( ; i &gt;= 0; i--) {</div><div class='add'>+		struct amdgpu_smu_i2c_bus *smu_i2c = &amp;adev-&gt;pm.smu_i2c[i];</div><div class='add'>+		struct i2c_adapter *control = &amp;smu_i2c-&gt;adapter;</div><div class='add'>+</div><div class='add'>+		i2c_del_adapter(control);</div><div class='add'>+	}</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smu_v14_0_2_i2c_control_fini(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_SMU_I2C_BUSES; i++) {</div><div class='add'>+		struct amdgpu_smu_i2c_bus *smu_i2c = &amp;adev-&gt;pm.smu_i2c[i];</div><div class='add'>+		struct i2c_adapter *control = &amp;smu_i2c-&gt;adapter;</div><div class='add'>+</div><div class='add'>+		i2c_del_adapter(control);</div><div class='add'>+	}</div><div class='add'>+	adev-&gt;pm.ras_eeprom_i2c_bus = NULL;</div><div class='add'>+	adev-&gt;pm.fru_eeprom_i2c_bus = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_set_mp1_state(struct smu_context *smu,</div><div class='add'>+				     enum pp_mp1_state mp1_state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (mp1_state) {</div><div class='add'>+	case PP_MP1_STATE_UNLOAD:</div><div class='add'>+		ret = smu_cmn_set_mp1_state(smu, mp1_state);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Ignore others */</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_set_df_cstate(struct smu_context *smu,</div><div class='add'>+				     enum pp_df_cstate state)</div><div class='add'>+{</div><div class='add'>+	return smu_cmn_send_smc_msg_with_param(smu,</div><div class='add'>+					       SMU_MSG_DFCstateControl,</div><div class='add'>+					       state,</div><div class='add'>+					       NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_mode1_reset(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_mode2_reset(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_enable_gfx_features(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;ip_versions[MP1_HWIP][0] == IP_VERSION(14, 0, 2))</div><div class='add'>+		return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnableAllSmuFeatures,</div><div class='add'>+										   FEATURE_PWR_GFX, NULL);</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smu_v14_0_2_set_smu_mailbox_registers(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+</div><div class='add'>+	smu-&gt;param_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_82);</div><div class='add'>+	smu-&gt;msg_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_66);</div><div class='add'>+	smu-&gt;resp_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_90);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_smu_send_bad_mem_page_num(struct smu_context *smu,</div><div class='add'>+		uint32_t size)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* message SMU to update the bad page number on SMUBUS */</div><div class='add'>+	ret = smu_cmn_send_smc_msg_with_param(smu,</div><div class='add'>+					  SMU_MSG_SetNumBadMemoryPagesRetired,</div><div class='add'>+					  size, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(smu-&gt;adev-&gt;dev,</div><div class='add'>+			  "[%s] failed to message SMU to update bad memory pages number\n",</div><div class='add'>+			  __func__);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smu_v14_0_2_send_bad_mem_channel_flag(struct smu_context *smu,</div><div class='add'>+		uint32_t size)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* message SMU to update the bad channel info on SMUBUS */</div><div class='add'>+	ret = smu_cmn_send_smc_msg_with_param(smu,</div><div class='add'>+				  SMU_MSG_SetBadMemoryPagesRetiredFlagsPerChannel,</div><div class='add'>+				  size, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(smu-&gt;adev-&gt;dev,</div><div class='add'>+			  "[%s] failed to message SMU to update bad memory pages channel info\n",</div><div class='add'>+			  __func__);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t smu_v14_0_2_get_ecc_info(struct smu_context *smu,</div><div class='add'>+					void *table)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	// TODO</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pptable_funcs smu_v14_0_2_ppt_funcs = {</div><div class='add'>+	.get_allowed_feature_mask = smu_v14_0_2_get_allowed_feature_mask,</div><div class='add'>+	.set_default_dpm_table = smu_v14_0_2_set_default_dpm_table,</div><div class='add'>+	.i2c_init = smu_v14_0_2_i2c_control_init,</div><div class='add'>+	.i2c_fini = smu_v14_0_2_i2c_control_fini,</div><div class='add'>+	.is_dpm_running = smu_v14_0_2_is_dpm_running,</div><div class='add'>+	.dump_pptable = smu_v14_0_2_dump_pptable,</div><div class='add'>+	.init_microcode = smu_v14_0_init_microcode,</div><div class='add'>+	.load_microcode = smu_v14_0_load_microcode,</div><div class='add'>+	.fini_microcode = smu_v14_0_fini_microcode,</div><div class='add'>+	.init_smc_tables = smu_v14_0_2_init_smc_tables,</div><div class='add'>+	.fini_smc_tables = smu_v14_0_fini_smc_tables,</div><div class='add'>+	.init_power = smu_v14_0_init_power,</div><div class='add'>+	.fini_power = smu_v14_0_fini_power,</div><div class='add'>+	.check_fw_status = smu_v14_0_check_fw_status,</div><div class='add'>+	.setup_pptable = smu_v14_0_2_setup_pptable,</div><div class='add'>+	.check_fw_version = smu_v14_0_check_fw_version,</div><div class='add'>+	.write_pptable = smu_cmn_write_pptable,</div><div class='add'>+	.set_driver_table_location = smu_v14_0_set_driver_table_location,</div><div class='add'>+	.system_features_control = smu_v14_0_system_features_control,</div><div class='add'>+	.set_allowed_mask = smu_v14_0_set_allowed_mask,</div><div class='add'>+	.get_enabled_mask = smu_cmn_get_enabled_mask,</div><div class='add'>+	.dpm_set_vcn_enable = smu_v14_0_set_vcn_enable,</div><div class='add'>+	.dpm_set_jpeg_enable = smu_v14_0_set_jpeg_enable,</div><div class='add'>+	.get_dpm_ultimate_freq = smu_v14_0_2_get_dpm_ultimate_freq,</div><div class='add'>+	.get_vbios_bootup_values = smu_v14_0_get_vbios_bootup_values,</div><div class='add'>+	.read_sensor = smu_v14_0_2_read_sensor,</div><div class='add'>+	.feature_is_enabled = smu_cmn_feature_is_enabled,</div><div class='add'>+	.print_clk_levels = smu_v14_0_2_print_clk_levels,</div><div class='add'>+	.force_clk_levels = smu_v14_0_2_force_clk_levels,</div><div class='add'>+	.update_pcie_parameters = smu_v14_0_2_update_pcie_parameters,</div><div class='add'>+	.get_thermal_temperature_range = smu_v14_0_2_get_thermal_temperature_range,</div><div class='add'>+	.register_irq_handler = smu_v14_0_register_irq_handler,</div><div class='add'>+	.notify_memory_pool_location = smu_v14_0_notify_memory_pool_location,</div><div class='add'>+	.set_soft_freq_limited_range = smu_v14_0_set_soft_freq_limited_range,</div><div class='add'>+	.init_pptable_microcode = smu_v14_0_init_pptable_microcode,</div><div class='add'>+	.populate_umd_state_clk = smu_v14_0_2_populate_umd_state_clk,</div><div class='add'>+	.set_performance_level = smu_v14_0_set_performance_level,</div><div class='add'>+	.gfx_off_control = smu_v14_0_gfx_off_control,</div><div class='add'>+	.get_unique_id = smu_v14_0_2_get_unique_id,</div><div class='add'>+	.get_power_limit = smu_v14_0_2_get_power_limit,</div><div class='add'>+	.set_power_limit = smu_v14_0_set_power_limit,</div><div class='add'>+	.set_power_source = smu_v14_0_set_power_source,</div><div class='add'>+	.get_power_profile_mode = smu_v14_0_2_get_power_profile_mode,</div><div class='add'>+	.set_power_profile_mode = smu_v14_0_2_set_power_profile_mode,</div><div class='add'>+	.run_btc = smu_v14_0_run_btc,</div><div class='add'>+	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,</div><div class='add'>+	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,</div><div class='add'>+	.set_tool_table_location = smu_v14_0_set_tool_table_location,</div><div class='add'>+	.deep_sleep_control = smu_v14_0_deep_sleep_control,</div><div class='add'>+	.gfx_ulv_control = smu_v14_0_gfx_ulv_control,</div><div class='add'>+	.get_bamaco_support = smu_v14_0_get_bamaco_support,</div><div class='add'>+	.baco_get_state = smu_v14_0_baco_get_state,</div><div class='add'>+	.baco_set_state = smu_v14_0_baco_set_state,</div><div class='add'>+	.baco_enter = smu_v14_0_2_baco_enter,</div><div class='add'>+	.baco_exit = smu_v14_0_2_baco_exit,</div><div class='add'>+	.mode1_reset_is_support = smu_v14_0_2_is_mode1_reset_supported,</div><div class='add'>+	.mode1_reset = smu_v14_0_2_mode1_reset,</div><div class='add'>+	.mode2_reset = smu_v14_0_2_mode2_reset,</div><div class='add'>+	.enable_gfx_features = smu_v14_0_2_enable_gfx_features,</div><div class='add'>+	.set_mp1_state = smu_v14_0_2_set_mp1_state,</div><div class='add'>+	.set_df_cstate = smu_v14_0_2_set_df_cstate,</div><div class='add'>+	.send_hbm_bad_pages_num = smu_v14_0_2_smu_send_bad_mem_page_num,</div><div class='add'>+	.send_hbm_bad_channel_flag = smu_v14_0_2_send_bad_mem_channel_flag,</div><div class='add'>+	.gpo_control = smu_v14_0_gpo_control,</div><div class='add'>+	.get_ecc_info = smu_v14_0_2_get_ecc_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void smu_v14_0_2_set_ppt_funcs(struct smu_context *smu)</div><div class='add'>+{</div><div class='add'>+	smu-&gt;ppt_funcs = &amp;smu_v14_0_2_ppt_funcs;</div><div class='add'>+	smu-&gt;message_map = smu_v14_0_2_message_map;</div><div class='add'>+	smu-&gt;clock_map = smu_v14_0_2_clk_map;</div><div class='add'>+	smu-&gt;feature_map = smu_v14_0_2_feature_mask_map;</div><div class='add'>+	smu-&gt;table_map = smu_v14_0_2_table_map;</div><div class='add'>+	smu-&gt;pwr_src_map = smu_v14_0_2_pwr_src_map;</div><div class='add'>+	smu-&gt;workload_map = smu_v14_0_2_workload_map;</div><div class='add'>+	smu_v14_0_2_set_smu_mailbox_registers(smu);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h<br/>new file mode 100644<br/>index 000000000000..b83729e5d6f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#ifndef __SMU_V14_0_2_PPT_H__</div><div class='add'>+#define __SMU_V14_0_2_PPT_H__</div><div class='add'>+</div><div class='add'>+extern void smu_v14_0_2_set_ppt_funcs(struct smu_context *smu);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c<br/>index b8dbd4e25348..6d1c3af927ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c</a></div><div class='hunk'>@@ -235,6 +235,50 @@ static void __smu_cmn_send_msg(struct smu_context *smu,</div><div class='ctx'> 	WREG32(smu-&gt;msg_reg, msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline uint32_t __smu_cmn_get_msg_flags(struct smu_context *smu,</div><div class='add'>+					       enum smu_message_type msg)</div><div class='add'>+{</div><div class='add'>+	return smu-&gt;message_map[msg].flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __smu_cmn_ras_filter_msg(struct smu_context *smu,</div><div class='add'>+				    enum smu_message_type msg, bool *poll)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='add'>+	uint32_t flags, resp;</div><div class='add'>+	bool fed_status;</div><div class='add'>+</div><div class='add'>+	flags = __smu_cmn_get_msg_flags(smu, msg);</div><div class='add'>+	*poll = true;</div><div class='add'>+</div><div class='add'>+	/* When there is RAS fatal error, FW won't process non-RAS priority</div><div class='add'>+	 * messages. Don't allow any messages other than RAS priority messages.</div><div class='add'>+	 */</div><div class='add'>+	fed_status = amdgpu_ras_get_fed_status(adev);</div><div class='add'>+	if (fed_status) {</div><div class='add'>+		if (!(flags &amp; SMU_MSG_RAS_PRI)) {</div><div class='add'>+			dev_dbg(adev-&gt;dev,</div><div class='add'>+				"RAS error detected, skip sending %s",</div><div class='add'>+				smu_get_message_name(smu, msg));</div><div class='add'>+			return -EACCES;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* FW will ignore non-priority messages when a RAS fatal error</div><div class='add'>+		 * is detected. Hence it is possible that a previous message</div><div class='add'>+		 * wouldn't have got response. Allow to continue without polling</div><div class='add'>+		 * for response status for priority messages.</div><div class='add'>+		 */</div><div class='add'>+		resp = RREG32(smu-&gt;resp_reg);</div><div class='add'>+		dev_dbg(adev-&gt;dev,</div><div class='add'>+			"Sending RAS priority message %s response status: %x",</div><div class='add'>+			smu_get_message_name(smu, msg), resp);</div><div class='add'>+		if (resp == 0)</div><div class='add'>+			*poll = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __smu_cmn_send_debug_msg(struct smu_context *smu,</div><div class='ctx'> 			       u32 msg,</div><div class='ctx'> 			       u32 param)</div><div class='hunk'>@@ -354,6 +398,7 @@ int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = smu-&gt;adev;</div><div class='ctx'> 	int res, index;</div><div class='add'>+	bool poll = true;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;no_hw_access)</div><div class='hunk'>@@ -366,12 +411,20 @@ int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,</div><div class='ctx'> 		return index == -EACCES ? 0 : index;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;smu-&gt;message_lock);</div><div class='del'>-	reg = __smu_cmn_poll_stat(smu);</div><div class='del'>-	res = __smu_cmn_reg2errno(smu, reg);</div><div class='del'>-	if (reg == SMU_RESP_NONE ||</div><div class='del'>-	    res == -EREMOTEIO) {</div><div class='del'>-		__smu_cmn_reg_print_error(smu, reg, index, param, msg);</div><div class='del'>-		goto Out;</div><div class='add'>+</div><div class='add'>+	if (smu-&gt;smc_fw_caps &amp; SMU_FW_CAP_RAS_PRI) {</div><div class='add'>+		res = __smu_cmn_ras_filter_msg(smu, msg, &amp;poll);</div><div class='add'>+		if (res)</div><div class='add'>+			goto Out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (poll) {</div><div class='add'>+		reg = __smu_cmn_poll_stat(smu);</div><div class='add'>+		res = __smu_cmn_reg2errno(smu, reg);</div><div class='add'>+		if (reg == SMU_RESP_NONE || res == -EREMOTEIO) {</div><div class='add'>+			__smu_cmn_reg_print_error(smu, reg, index, param, msg);</div><div class='add'>+			goto Out;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	__smu_cmn_send_msg(smu, (uint16_t) index, param);</div><div class='ctx'> 	reg = __smu_cmn_poll_stat(smu);</div><div class='hunk'>@@ -437,7 +490,7 @@ int smu_cmn_to_asic_specific_index(struct smu_context *smu,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		if (amdgpu_sriov_vf(smu-&gt;adev) &amp;&amp;</div><div class='del'>-		    !msg_mapping.valid_in_vf)</div><div class='add'>+		    !(msg_mapping.flags &amp; SMU_MSG_VF_FLAG))</div><div class='ctx'> 			return -EACCES;</div><div class='ctx'> </div><div class='ctx'> 		return msg_mapping.map_to;</div><div class='head'>diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c<br/>index 42510fdea27e..67e5d3b4190f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/arm/display/komeda/d71/d71_component.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/arm/display/komeda/d71/d71_component.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  * Author: James.Qian.Wang &lt;james.qian.wang@arm.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include "d71_dev.h"</div><div class='ctx'> #include "komeda_kms.h"</div><div class='ctx'> #include "malidp_io.h"</div><div class='head'>diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c<br/>index 4b7d94961527..00f5864a0495 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c<br/>index 626709bec6f5..2577f0cef8fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/arm/malidp_mw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/arm/malidp_mw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/arm/malidp_mw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/arm/malidp_mw.c</a></div><div class='hunk'>@@ -72,7 +72,10 @@ static void malidp_mw_connector_reset(struct drm_connector *connector)</div><div class='ctx'> 		__drm_atomic_helper_connector_destroy_state(connector-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	kfree(connector-&gt;state);</div><div class='del'>-	__drm_atomic_helper_connector_reset(connector, &amp;mw_state-&gt;base);</div><div class='add'>+	connector-&gt;state = NULL;</div><div class='add'>+</div><div class='add'>+	if (mw_state)</div><div class='add'>+		__drm_atomic_helper_connector_reset(connector, &amp;mw_state-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum drm_connector_status</div><div class='head'>diff --git a/drivers/gpu/drm/armada/armada_debugfs.c b/drivers/gpu/drm/armada/armada_debugfs.c<br/>index 29f4b52e3c8d..a763349dd89f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/armada/armada_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/armada/armada_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/armada/armada_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/armada/armada_debugfs.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/ast/Makefile b/drivers/gpu/drm/ast/Makefile<br/>index 5a53ce51fb24..d794c076bc24 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/Makefile</a></div><div class='hunk'>@@ -3,6 +3,14 @@</div><div class='ctx'> # Makefile for the drm device driver.  This driver provides support for the</div><div class='ctx'> # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.</div><div class='ctx'> </div><div class='del'>-ast-y := ast_drv.o ast_i2c.o ast_main.o ast_mm.o ast_mode.o ast_post.o ast_dp501.o ast_dp.o</div><div class='add'>+ast-y := \</div><div class='add'>+	ast_ddc.o \</div><div class='add'>+	ast_dp501.o \</div><div class='add'>+	ast_dp.o \</div><div class='add'>+	ast_drv.o \</div><div class='add'>+	ast_main.o \</div><div class='add'>+	ast_mm.o \</div><div class='add'>+	ast_mode.o \</div><div class='add'>+	ast_post.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DRM_AST) := ast.o</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_i2c.c b/drivers/gpu/drm/ast/ast_ddc.c<br/>index e5d3f7121de4..29cf5d157f34 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_i2c.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_i2c.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_ddc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/ast_ddc.c</a></div><div class='hunk'>@@ -21,20 +21,31 @@</div><div class='ctx'>  * of the Software.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/i2c-algo-bit.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;drm/drm_managed.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "ast_ddc.h"</div><div class='ctx'> #include "ast_drv.h"</div><div class='ctx'> </div><div class='del'>-static void ast_i2c_setsda(void *i2c_priv, int data)</div><div class='add'>+struct ast_ddc {</div><div class='add'>+	struct ast_device *ast;</div><div class='add'>+</div><div class='add'>+	struct i2c_algo_bit_data bit;</div><div class='add'>+	struct i2c_adapter adapter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ast_ddc_algo_bit_data_setsda(void *data, int state)</div><div class='ctx'> {</div><div class='del'>-	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='del'>-	struct ast_device *ast = to_ast_device(i2c-&gt;dev);</div><div class='add'>+	struct ast_ddc *ddc = data;</div><div class='add'>+	struct ast_device *ast = ddc-&gt;ast;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 ujcrb7, jtemp;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 0x10000; i++) {</div><div class='del'>-		ujcrb7 = ((data &amp; 0x01) ? 0 : 1) &lt;&lt; 2;</div><div class='add'>+		ujcrb7 = ((state &amp; 0x01) ? 0 : 1) &lt;&lt; 2;</div><div class='ctx'> 		ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0xf1, ujcrb7);</div><div class='ctx'> 		jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x04);</div><div class='ctx'> 		if (ujcrb7 == jtemp)</div><div class='hunk'>@@ -42,15 +53,15 @@ static void ast_i2c_setsda(void *i2c_priv, int data)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ast_i2c_setscl(void *i2c_priv, int clock)</div><div class='add'>+static void ast_ddc_algo_bit_data_setscl(void *data, int state)</div><div class='ctx'> {</div><div class='del'>-	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='del'>-	struct ast_device *ast = to_ast_device(i2c-&gt;dev);</div><div class='add'>+	struct ast_ddc *ddc = data;</div><div class='add'>+	struct ast_device *ast = ddc-&gt;ast;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 ujcrb7, jtemp;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 0x10000; i++) {</div><div class='del'>-		ujcrb7 = ((clock &amp; 0x01) ? 0 : 1);</div><div class='add'>+		ujcrb7 = ((state &amp; 0x01) ? 0 : 1);</div><div class='ctx'> 		ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0xf4, ujcrb7);</div><div class='ctx'> 		jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x01);</div><div class='ctx'> 		if (ujcrb7 == jtemp)</div><div class='hunk'>@@ -58,10 +69,32 @@ static void ast_i2c_setscl(void *i2c_priv, int clock)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ast_i2c_getsda(void *i2c_priv)</div><div class='add'>+static int ast_ddc_algo_bit_data_pre_xfer(struct i2c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ast_ddc *ddc = i2c_get_adapdata(adapter);</div><div class='add'>+	struct ast_device *ast = ddc-&gt;ast;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Protect access to I/O registers from concurrent modesetting</div><div class='add'>+	 * by acquiring the I/O-register lock.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;ast-&gt;modeset_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_ddc_algo_bit_data_post_xfer(struct i2c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ast_ddc *ddc = i2c_get_adapdata(adapter);</div><div class='add'>+	struct ast_device *ast = ddc-&gt;ast;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ast-&gt;modeset_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_ddc_algo_bit_data_getsda(void *data)</div><div class='ctx'> {</div><div class='del'>-	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='del'>-	struct ast_device *ast = to_ast_device(i2c-&gt;dev);</div><div class='add'>+	struct ast_ddc *ddc = data;</div><div class='add'>+	struct ast_device *ast = ddc-&gt;ast;</div><div class='ctx'> 	uint32_t val, val2, count, pass;</div><div class='ctx'> </div><div class='ctx'> 	count = 0;</div><div class='hunk'>@@ -80,10 +113,10 @@ static int ast_i2c_getsda(void *i2c_priv)</div><div class='ctx'> 	return val &amp; 1 ? 1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ast_i2c_getscl(void *i2c_priv)</div><div class='add'>+static int ast_ddc_algo_bit_data_getscl(void *data)</div><div class='ctx'> {</div><div class='del'>-	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='del'>-	struct ast_device *ast = to_ast_device(i2c-&gt;dev);</div><div class='add'>+	struct ast_ddc *ddc = data;</div><div class='add'>+	struct ast_device *ast = ddc-&gt;ast;</div><div class='ctx'> 	uint32_t val, val2, count, pass;</div><div class='ctx'> </div><div class='ctx'> 	count = 0;</div><div class='hunk'>@@ -102,50 +135,53 @@ static int ast_i2c_getscl(void *i2c_priv)</div><div class='ctx'> 	return val &amp; 1 ? 1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ast_i2c_release(struct drm_device *dev, void *res)</div><div class='add'>+static void ast_ddc_release(struct drm_device *dev, void *res)</div><div class='ctx'> {</div><div class='del'>-	struct ast_i2c_chan *i2c = res;</div><div class='add'>+	struct ast_ddc *ddc = res;</div><div class='ctx'> </div><div class='del'>-	i2c_del_adapter(&amp;i2c-&gt;adapter);</div><div class='del'>-	kfree(i2c);</div><div class='add'>+	i2c_del_adapter(&amp;ddc-&gt;adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)</div><div class='add'>+struct i2c_adapter *ast_ddc_create(struct ast_device *ast)</div><div class='ctx'> {</div><div class='del'>-	struct ast_i2c_chan *i2c;</div><div class='add'>+	struct drm_device *dev = &amp;ast-&gt;base;</div><div class='add'>+	struct ast_ddc *ddc;</div><div class='add'>+	struct i2c_adapter *adapter;</div><div class='add'>+	struct i2c_algo_bit_data *bit;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);</div><div class='del'>-	if (!i2c)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	i2c-&gt;adapter.owner = THIS_MODULE;</div><div class='del'>-	i2c-&gt;adapter.dev.parent = dev-&gt;dev;</div><div class='del'>-	i2c-&gt;dev = dev;</div><div class='del'>-	i2c_set_adapdata(&amp;i2c-&gt;adapter, i2c);</div><div class='del'>-	snprintf(i2c-&gt;adapter.name, sizeof(i2c-&gt;adapter.name),</div><div class='del'>-		 "AST i2c bit bus");</div><div class='del'>-	i2c-&gt;adapter.algo_data = &amp;i2c-&gt;bit;</div><div class='del'>-</div><div class='del'>-	i2c-&gt;bit.udelay = 20;</div><div class='del'>-	i2c-&gt;bit.timeout = 2;</div><div class='del'>-	i2c-&gt;bit.data = i2c;</div><div class='del'>-	i2c-&gt;bit.setsda = ast_i2c_setsda;</div><div class='del'>-	i2c-&gt;bit.setscl = ast_i2c_setscl;</div><div class='del'>-	i2c-&gt;bit.getsda = ast_i2c_getsda;</div><div class='del'>-	i2c-&gt;bit.getscl = ast_i2c_getscl;</div><div class='del'>-	ret = i2c_bit_add_bus(&amp;i2c-&gt;adapter);</div><div class='add'>+	ddc = drmm_kzalloc(dev, sizeof(*ddc), GFP_KERNEL);</div><div class='add'>+	if (!ddc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	ddc-&gt;ast = ast;</div><div class='add'>+</div><div class='add'>+	bit = &amp;ddc-&gt;bit;</div><div class='add'>+	bit-&gt;data = ddc;</div><div class='add'>+	bit-&gt;setsda = ast_ddc_algo_bit_data_setsda;</div><div class='add'>+	bit-&gt;setscl = ast_ddc_algo_bit_data_setscl;</div><div class='add'>+	bit-&gt;getsda = ast_ddc_algo_bit_data_getsda;</div><div class='add'>+	bit-&gt;getscl = ast_ddc_algo_bit_data_getscl;</div><div class='add'>+	bit-&gt;pre_xfer = ast_ddc_algo_bit_data_pre_xfer;</div><div class='add'>+	bit-&gt;post_xfer = ast_ddc_algo_bit_data_post_xfer;</div><div class='add'>+	bit-&gt;udelay = 20;</div><div class='add'>+	bit-&gt;timeout = usecs_to_jiffies(2200);</div><div class='add'>+</div><div class='add'>+	adapter = &amp;ddc-&gt;adapter;</div><div class='add'>+	adapter-&gt;owner = THIS_MODULE;</div><div class='add'>+	adapter-&gt;algo_data = bit;</div><div class='add'>+	adapter-&gt;dev.parent = dev-&gt;dev;</div><div class='add'>+	snprintf(adapter-&gt;name, sizeof(adapter-&gt;name), "AST DDC bus");</div><div class='add'>+	i2c_set_adapdata(adapter, ddc);</div><div class='add'>+</div><div class='add'>+	ret = i2c_bit_add_bus(adapter);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		drm_err(dev, "Failed to register bit i2c\n");</div><div class='del'>-		goto out_kfree;</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = drmm_add_action_or_reset(dev, ast_i2c_release, i2c);</div><div class='add'>+	ret = drmm_add_action_or_reset(dev, ast_ddc_release, ddc);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return NULL;</div><div class='del'>-	return i2c;</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='del'>-out_kfree:</div><div class='del'>-	kfree(i2c);</div><div class='del'>-	return NULL;</div><div class='add'>+	return &amp;ddc-&gt;adapter;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_ddc.h b/drivers/gpu/drm/ast/ast_ddc.h<br/>new file mode 100644<br/>index 000000000000..85c93edc9ae1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_ddc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/ast_ddc.h</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+</div><div class='add'>+#ifndef __AST_DDC_H__</div><div class='add'>+#define __AST_DDC_H__</div><div class='add'>+</div><div class='add'>+struct ast_device;</div><div class='add'>+struct i2c_adapter;</div><div class='add'>+</div><div class='add'>+struct i2c_adapter *ast_ddc_create(struct ast_device *ast);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c<br/>index 90bcb1eb9cd9..f8c49ba68e78 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/ast_drv.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_aperture.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h<br/>index 3be5ccf1f5f4..ba3d86973995 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/ast_drv.h</a></div><div class='hunk'>@@ -28,8 +28,6 @@</div><div class='ctx'> #ifndef __AST_DRV_H__</div><div class='ctx'> #define __AST_DRV_H__</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/i2c-algo-bit.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -149,37 +147,9 @@ static inline struct ast_plane *to_ast_plane(struct drm_plane *plane)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Connector with i2c channel</div><div class='add'>+ * BMC</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-struct ast_i2c_chan {</div><div class='del'>-	struct i2c_adapter adapter;</div><div class='del'>-	struct drm_device *dev;</div><div class='del'>-	struct i2c_algo_bit_data bit;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ast_vga_connector {</div><div class='del'>-	struct drm_connector base;</div><div class='del'>-	struct ast_i2c_chan *i2c;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline struct ast_vga_connector *</div><div class='del'>-to_ast_vga_connector(struct drm_connector *connector)</div><div class='del'>-{</div><div class='del'>-	return container_of(connector, struct ast_vga_connector, base);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct ast_sil164_connector {</div><div class='del'>-	struct drm_connector base;</div><div class='del'>-	struct ast_i2c_chan *i2c;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline struct ast_sil164_connector *</div><div class='del'>-to_ast_sil164_connector(struct drm_connector *connector)</div><div class='del'>-{</div><div class='del'>-	return container_of(connector, struct ast_sil164_connector, base);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct ast_bmc_connector {</div><div class='ctx'> 	struct drm_connector base;</div><div class='ctx'> 	struct drm_connector *physical_connector;</div><div class='hunk'>@@ -222,11 +192,11 @@ struct ast_device {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct drm_encoder encoder;</div><div class='del'>-			struct ast_vga_connector vga_connector;</div><div class='add'>+			struct drm_connector connector;</div><div class='ctx'> 		} vga;</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct drm_encoder encoder;</div><div class='del'>-			struct ast_sil164_connector sil164_connector;</div><div class='add'>+			struct drm_connector connector;</div><div class='ctx'> 		} sil164;</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct drm_encoder encoder;</div><div class='hunk'>@@ -498,9 +468,6 @@ bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata);</div><div class='ctx'> u8 ast_get_dp501_max_clk(struct drm_device *dev);</div><div class='ctx'> void ast_init_3rdtx(struct drm_device *dev);</div><div class='ctx'> </div><div class='del'>-/* ast_i2c.c */</div><div class='del'>-struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);</div><div class='del'>-</div><div class='ctx'> /* aspeed DP */</div><div class='ctx'> bool ast_astdp_is_connected(struct ast_device *ast);</div><div class='ctx'> int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata);</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c<br/>index 2f3ad5f949fc..0637abb70361 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_main.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_main.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/ast_main.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'>  * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_atomic_helper.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c<br/>index a718646a66b8..6695af70768f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_mode.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ast/ast_mode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ast/ast_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ast/ast_mode.c</a></div><div class='hunk'>@@ -43,9 +43,11 @@</div><div class='ctx'> #include &lt;drm/drm_gem_framebuffer_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_shmem_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_managed.h&gt;</div><div class='add'>+#include &lt;drm/drm_panic.h&gt;</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_simple_kms_helper.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "ast_ddc.h"</div><div class='ctx'> #include "ast_drv.h"</div><div class='ctx'> #include "ast_tables.h"</div><div class='ctx'> </div><div class='hunk'>@@ -700,12 +702,29 @@ static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,</div><div class='ctx'> 	ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x1, 0xdf, 0x20);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,</div><div class='add'>+						       struct drm_scanout_buffer *sb)</div><div class='add'>+{</div><div class='add'>+	struct ast_plane *ast_plane = to_ast_plane(plane);</div><div class='add'>+</div><div class='add'>+	if (plane-&gt;state &amp;&amp; plane-&gt;state-&gt;fb &amp;&amp; ast_plane-&gt;vaddr) {</div><div class='add'>+		sb-&gt;format = plane-&gt;state-&gt;fb-&gt;format;</div><div class='add'>+		sb-&gt;width = plane-&gt;state-&gt;fb-&gt;width;</div><div class='add'>+		sb-&gt;height = plane-&gt;state-&gt;fb-&gt;height;</div><div class='add'>+		sb-&gt;pitch[0] = plane-&gt;state-&gt;fb-&gt;pitches[0];</div><div class='add'>+		iosys_map_set_vaddr_iomem(&amp;sb-&gt;map[0], ast_plane-&gt;vaddr);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = {</div><div class='ctx'> 	DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,</div><div class='ctx'> 	.atomic_check = ast_primary_plane_helper_atomic_check,</div><div class='ctx'> 	.atomic_update = ast_primary_plane_helper_atomic_update,</div><div class='ctx'> 	.atomic_enable = ast_primary_plane_helper_atomic_enable,</div><div class='ctx'> 	.atomic_disable = ast_primary_plane_helper_atomic_disable,</div><div class='add'>+	.get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_plane_funcs ast_primary_plane_funcs = {</div><div class='hunk'>@@ -1343,43 +1362,9 @@ static int ast_crtc_init(struct drm_device *dev)</div><div class='ctx'>  * VGA Connector</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int ast_vga_connector_helper_get_modes(struct drm_connector *connector)</div><div class='del'>-{</div><div class='del'>-	struct ast_vga_connector *ast_vga_connector = to_ast_vga_connector(connector);</div><div class='del'>-	struct drm_device *dev = connector-&gt;dev;</div><div class='del'>-	struct ast_device *ast = to_ast_device(dev);</div><div class='del'>-	struct edid *edid;</div><div class='del'>-	int count;</div><div class='del'>-</div><div class='del'>-	if (!ast_vga_connector-&gt;i2c)</div><div class='del'>-		goto err_drm_connector_update_edid_property;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Protect access to I/O registers from concurrent modesetting</div><div class='del'>-	 * by acquiring the I/O-register lock.</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;ast-&gt;modeset_lock);</div><div class='del'>-</div><div class='del'>-	edid = drm_get_edid(connector, &amp;ast_vga_connector-&gt;i2c-&gt;adapter);</div><div class='del'>-	if (!edid)</div><div class='del'>-		goto err_mutex_unlock;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ast-&gt;modeset_lock);</div><div class='del'>-</div><div class='del'>-	count = drm_add_edid_modes(connector, edid);</div><div class='del'>-	kfree(edid);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-</div><div class='del'>-err_mutex_unlock:</div><div class='del'>-	mutex_unlock(&amp;ast-&gt;modeset_lock);</div><div class='del'>-err_drm_connector_update_edid_property:</div><div class='del'>-	drm_connector_update_edid_property(connector, NULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct drm_connector_helper_funcs ast_vga_connector_helper_funcs = {</div><div class='del'>-	.get_modes = ast_vga_connector_helper_get_modes,</div><div class='add'>+	.get_modes = drm_connector_helper_get_modes,</div><div class='add'>+	.detect_ctx = drm_connector_helper_detect_from_ddc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_connector_funcs ast_vga_connector_funcs = {</div><div class='hunk'>@@ -1390,23 +1375,21 @@ static const struct drm_connector_funcs ast_vga_connector_funcs = {</div><div class='ctx'> 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ast_vga_connector_init(struct drm_device *dev,</div><div class='del'>-				  struct ast_vga_connector *ast_vga_connector)</div><div class='add'>+static int ast_vga_connector_init(struct drm_device *dev, struct drm_connector *connector)</div><div class='ctx'> {</div><div class='del'>-	struct drm_connector *connector = &amp;ast_vga_connector-&gt;base;</div><div class='add'>+	struct ast_device *ast = to_ast_device(dev);</div><div class='add'>+	struct i2c_adapter *ddc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ast_vga_connector-&gt;i2c = ast_i2c_create(dev);</div><div class='del'>-	if (!ast_vga_connector-&gt;i2c)</div><div class='del'>-		drm_err(dev, "failed to add ddc bus for connector\n");</div><div class='add'>+	ddc = ast_ddc_create(ast);</div><div class='add'>+	if (IS_ERR(ddc)) {</div><div class='add'>+		ret = PTR_ERR(ddc);</div><div class='add'>+		drm_err(dev, "failed to add DDC bus for connector; ret=%d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (ast_vga_connector-&gt;i2c)</div><div class='del'>-		ret = drm_connector_init_with_ddc(dev, connector, &amp;ast_vga_connector_funcs,</div><div class='del'>-						  DRM_MODE_CONNECTOR_VGA,</div><div class='del'>-						  &amp;ast_vga_connector-&gt;i2c-&gt;adapter);</div><div class='del'>-	else</div><div class='del'>-		ret = drm_connector_init(dev, connector, &amp;ast_vga_connector_funcs,</div><div class='del'>-					 DRM_MODE_CONNECTOR_VGA);</div><div class='add'>+	ret = drm_connector_init_with_ddc(dev, connector, &amp;ast_vga_connector_funcs,</div><div class='add'>+					  DRM_MODE_CONNECTOR_VGA, ddc);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1415,7 +1398,7 @@ static int ast_vga_connector_init(struct drm_device *dev,</div><div class='ctx'> 	connector-&gt;interlace_allowed = 0;</div><div class='ctx'> 	connector-&gt;doublescan_allowed = 0;</div><div class='ctx'> </div><div class='del'>-	connector-&gt;polled = DRM_CONNECTOR_POLL_CONNECT;</div><div class='add'>+	connector-&gt;polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1425,8 +1408,7 @@ static int ast_vga_output_init(struct ast_device *ast)</div><div class='ctx'> 	struct drm_device *dev = &amp;ast-&gt;base;</div><div class='ctx'> 	struct drm_crtc *crtc = &amp;ast-&gt;crtc;</div><div class='ctx'> 	struct drm_encoder *encoder = &amp;ast-&gt;output.vga.encoder;</div><div class='del'>-	struct ast_vga_connector *ast_vga_connector = &amp;ast-&gt;output.vga.vga_connector;</div><div class='del'>-	struct drm_connector *connector = &amp;ast_vga_connector-&gt;base;</div><div class='add'>+	struct drm_connector *connector = &amp;ast-&gt;output.vga.connector;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);</div><div class='hunk'>@@ -1434,7 +1416,7 @@ static int ast_vga_output_init(struct ast_device *ast)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	encoder-&gt;possible_crtcs = drm_crtc_mask(crtc);</div><div class='ctx'> </div><div class='del'>-	ret = ast_vga_connector_init(dev, ast_vga_connector);</div><div class='add'>+	ret = ast_vga_connector_init(dev, connector);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1449,43 +1431,9 @@ static int ast_vga_output_init(struct ast_device *ast)</div><div class='ctx'>  * SIL164 Connector</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int ast_sil164_connector_helper_get_modes(struct drm_connector *connector)</div><div class='del'>-{</div><div class='del'>-	struct ast_sil164_connector *ast_sil164_connector = to_ast_sil164_connector(connector);</div><div class='del'>-	struct drm_device *dev = connector-&gt;dev;</div><div class='del'>-	struct ast_device *ast = to_ast_device(dev);</div><div class='del'>-	struct edid *edid;</div><div class='del'>-	int count;</div><div class='del'>-</div><div class='del'>-	if (!ast_sil164_connector-&gt;i2c)</div><div class='del'>-		goto err_drm_connector_update_edid_property;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Protect access to I/O registers from concurrent modesetting</div><div class='del'>-	 * by acquiring the I/O-register lock.</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;ast-&gt;modeset_lock);</div><div class='del'>-</div><div class='del'>-	edid = drm_get_edid(connector, &amp;ast_sil164_connector-&gt;i2c-&gt;adapter);</div><div class='del'>-	if (!edid)</div><div class='del'>-		goto err_mutex_unlock;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ast-&gt;modeset_lock);</div><div class='del'>-</div><div class='del'>-	count = drm_add_edid_modes(connector, edid);</div><div class='del'>-	kfree(edid);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-</div><div class='del'>-err_mutex_unlock:</div><div class='del'>-	mutex_unlock(&amp;ast-&gt;modeset_lock);</div><div class='del'>-err_drm_connector_update_edid_property:</div><div class='del'>-	drm_connector_update_edid_property(connector, NULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct drm_connector_helper_funcs ast_sil164_connector_helper_funcs = {</div><div class='del'>-	.get_modes = ast_sil164_connector_helper_get_modes,</div><div class='add'>+	.get_modes = drm_connector_helper_get_modes,</div><div class='add'>+	.detect_ctx = drm_connector_helper_detect_from_ddc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_connector_funcs ast_sil164_connector_funcs = {</div><div class='hunk'>@@ -1496,23 +1444,21 @@ static const struct drm_connector_funcs ast_sil164_connector_funcs = {</div><div class='ctx'> 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ast_sil164_connector_init(struct drm_device *dev,</div><div class='del'>-				     struct ast_sil164_connector *ast_sil164_connector)</div><div class='add'>+static int ast_sil164_connector_init(struct drm_device *dev, struct drm_connector *connector)</div><div class='ctx'> {</div><div class='del'>-	struct drm_connector *connector = &amp;ast_sil164_connector-&gt;base;</div><div class='add'>+	struct ast_device *ast = to_ast_device(dev);</div><div class='add'>+	struct i2c_adapter *ddc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ast_sil164_connector-&gt;i2c = ast_i2c_create(dev);</div><div class='del'>-	if (!ast_sil164_connector-&gt;i2c)</div><div class='del'>-		drm_err(dev, "failed to add ddc bus for connector\n");</div><div class='add'>+	ddc = ast_ddc_create(ast);</div><div class='add'>+	if (IS_ERR(ddc)) {</div><div class='add'>+		ret = PTR_ERR(ddc);</div><div class='add'>+		drm_err(dev, "failed to add DDC bus for connector; ret=%d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (ast_sil164_connector-&gt;i2c)</div><div class='del'>-		ret = drm_connector_init_with_ddc(dev, connector, &amp;ast_sil164_connector_funcs,</div><div class='del'>-						  DRM_MODE_CONNECTOR_DVII,</div><div class='del'>-						  &amp;ast_sil164_connector-&gt;i2c-&gt;adapter);</div><div class='del'>-	else</div><div class='del'>-		ret = drm_connector_init(dev, connector, &amp;ast_sil164_connector_funcs,</div><div class='del'>-					 DRM_MODE_CONNECTOR_DVII);</div><div class='add'>+	ret = drm_connector_init_with_ddc(dev, connector, &amp;ast_sil164_connector_funcs,</div><div class='add'>+					  DRM_MODE_CONNECTOR_DVII, ddc);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1521,7 +1467,7 @@ static int ast_sil164_connector_init(struct drm_device *dev,</div><div class='ctx'> 	connector-&gt;interlace_allowed = 0;</div><div class='ctx'> 	connector-&gt;doublescan_allowed = 0;</div><div class='ctx'> </div><div class='del'>-	connector-&gt;polled = DRM_CONNECTOR_POLL_CONNECT;</div><div class='add'>+	connector-&gt;polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1531,8 +1477,7 @@ static int ast_sil164_output_init(struct ast_device *ast)</div><div class='ctx'> 	struct drm_device *dev = &amp;ast-&gt;base;</div><div class='ctx'> 	struct drm_crtc *crtc = &amp;ast-&gt;crtc;</div><div class='ctx'> 	struct drm_encoder *encoder = &amp;ast-&gt;output.sil164.encoder;</div><div class='del'>-	struct ast_sil164_connector *ast_sil164_connector = &amp;ast-&gt;output.sil164.sil164_connector;</div><div class='del'>-	struct drm_connector *connector = &amp;ast_sil164_connector-&gt;base;</div><div class='add'>+	struct drm_connector *connector = &amp;ast-&gt;output.sil164.connector;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS);</div><div class='hunk'>@@ -1540,7 +1485,7 @@ static int ast_sil164_output_init(struct ast_device *ast)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	encoder-&gt;possible_crtcs = drm_crtc_mask(crtc);</div><div class='ctx'> </div><div class='del'>-	ret = ast_sil164_connector_init(dev, ast_sil164_connector);</div><div class='add'>+	ret = ast_sil164_connector_init(dev, connector);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1952,13 +1897,13 @@ int ast_mode_config_init(struct ast_device *ast)</div><div class='ctx'> 		ret = ast_vga_output_init(ast);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-		physical_connector = &amp;ast-&gt;output.vga.vga_connector.base;</div><div class='add'>+		physical_connector = &amp;ast-&gt;output.vga.connector;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ast-&gt;tx_chip_types &amp; AST_TX_SIL164_BIT) {</div><div class='ctx'> 		ret = ast_sil164_output_init(ast);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-		physical_connector = &amp;ast-&gt;output.sil164.sil164_connector.base;</div><div class='add'>+		physical_connector = &amp;ast-&gt;output.sil164.connector;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ast-&gt;tx_chip_types &amp; AST_TX_DP501_BIT) {</div><div class='ctx'> 		ret = ast_dp501_output_init(ast);</div><div class='hunk'>@@ -1978,7 +1923,9 @@ int ast_mode_config_init(struct ast_device *ast)</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_config_reset(dev);</div><div class='ctx'> </div><div class='del'>-	drm_kms_helper_poll_init(dev);</div><div class='add'>+	ret = drmm_kms_helper_poll_init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig<br/>index efd996f6c138..c621be1a99a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/Kconfig</a></div><div class='hunk'>@@ -96,9 +96,8 @@ config DRM_ITE_IT6505</div><div class='ctx'> 	select DRM_DISPLAY_DP_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_HDCP_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_HELPER</div><div class='del'>-	select DRM_DP_AUX_BUS</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	select DRM_KMS_HELPER</div><div class='del'>-	select DRM_DP_HELPER</div><div class='ctx'> 	select EXTCON</div><div class='ctx'> 	select CRYPTO</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='hunk'>@@ -190,6 +189,13 @@ config DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW</div><div class='ctx'> 	  to DP++. This is used with the i.MX6 imx-ldb</div><div class='ctx'> 	  driver. You are likely to say N here.</div><div class='ctx'> </div><div class='add'>+config DRM_MICROCHIP_LVDS_SERIALIZER</div><div class='add'>+	tristate "Microchip LVDS serializer support"</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on DRM_ATMEL_HLCDC</div><div class='add'>+	help</div><div class='add'>+	  Support for Microchip's LVDS serializer.</div><div class='add'>+</div><div class='ctx'> config DRM_NWL_MIPI_DSI</div><div class='ctx'> 	tristate "Northwest Logic MIPI DSI Host controller"</div><div class='ctx'> 	depends on DRM</div><div class='hunk'>@@ -229,7 +235,7 @@ config DRM_PARADE_PS8640</div><div class='ctx'> 	depends on OF</div><div class='ctx'> 	select DRM_DISPLAY_DP_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_HELPER</div><div class='del'>-	select DRM_DP_AUX_BUS</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	select DRM_KMS_HELPER</div><div class='ctx'> 	select DRM_MIPI_DSI</div><div class='ctx'> 	select DRM_PANEL</div><div class='hunk'>@@ -389,7 +395,7 @@ config DRM_TI_SN65DSI86</div><div class='ctx'> 	select DRM_PANEL</div><div class='ctx'> 	select DRM_MIPI_DSI</div><div class='ctx'> 	select AUXILIARY_BUS</div><div class='del'>-	select DRM_DP_AUX_BUS</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Texas Instruments SN65DSI86 DSI to eDP Bridge driver</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile<br/>index 017b5832733b..7df87b582dca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/Makefile</a></div><div class='hunk'>@@ -13,6 +13,7 @@ obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o</div><div class='ctx'> obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o</div><div class='ctx'> obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o</div><div class='ctx'> obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v3-fw.o</div><div class='add'>+obj-$(CONFIG_DRM_MICROCHIP_LVDS_SERIALIZER) += microchip-lvds.o</div><div class='ctx'> obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o</div><div class='ctx'> obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o</div><div class='ctx'> obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h<br/>index 39c9ece373b0..ea271f62b214 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/adv7511/adv7511.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/adv7511/adv7511.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/adv7511/adv7511.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/adv7511/adv7511.h</a></div><div class='hunk'>@@ -356,6 +356,7 @@ struct adv7511 {</div><div class='ctx'> 	enum drm_connector_status status;</div><div class='ctx'> 	bool powered;</div><div class='ctx'> </div><div class='add'>+	struct drm_bridge *next_bridge;</div><div class='ctx'> 	struct drm_display_mode curr_mode;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int f_tmds;</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c<br/>index b5518ff97165..dd21b81bd28f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/adv7511/adv7511_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/adv7511/adv7511_drv.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;drm/drm_atomic.h&gt;</div><div class='ctx'> #include &lt;drm/drm_atomic_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='add'>+#include &lt;drm/drm_of.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -477,6 +478,11 @@ static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* If there is no IRQ to handle, exit indicating no IRQ data */</div><div class='add'>+	if (!(irq0 &amp; (ADV7511_INT0_HPD | ADV7511_INT0_EDID_READY)) &amp;&amp;</div><div class='add'>+	    !(irq1 &amp; ADV7511_INT1_DDC_ERROR))</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='ctx'> 	regmap_write(adv7511-&gt;regmap, ADV7511_REG_INT(0), irq0);</div><div class='ctx'> 	regmap_write(adv7511-&gt;regmap, ADV7511_REG_INT(1), irq1);</div><div class='ctx'> </div><div class='hunk'>@@ -946,6 +952,12 @@ static int adv7511_bridge_attach(struct drm_bridge *bridge,</div><div class='ctx'> 	struct adv7511 *adv = bridge_to_adv7511(bridge);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (adv-&gt;next_bridge) {</div><div class='add'>+		ret = drm_bridge_attach(bridge-&gt;encoder, adv-&gt;next_bridge, bridge, flags);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!(flags &amp; DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {</div><div class='ctx'> 		ret = adv7511_connector_init(adv);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='hunk'>@@ -1216,6 +1228,11 @@ static int adv7511_probe(struct i2c_client *i2c)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;link_config, 0, sizeof(link_config));</div><div class='ctx'> </div><div class='add'>+	ret = drm_of_find_panel_or_bridge(dev-&gt;of_node, 1, -1, NULL,</div><div class='add'>+					  &amp;adv7511-&gt;next_bridge);</div><div class='add'>+	if (ret &amp;&amp; ret != -ENODEV)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	if (adv7511-&gt;info-&gt;link_config)</div><div class='ctx'> 		ret = adv7511_parse_dt(dev-&gt;of_node, &amp;link_config);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1318,7 +1335,8 @@ static int adv7511_probe(struct i2c_client *i2c)</div><div class='ctx'> </div><div class='ctx'> 		ret = devm_request_threaded_irq(dev, i2c-&gt;irq, NULL,</div><div class='ctx'> 						adv7511_irq_handler,</div><div class='del'>-						IRQF_ONESHOT, dev_name(dev),</div><div class='add'>+						IRQF_ONESHOT | IRQF_SHARED,</div><div class='add'>+						dev_name(dev),</div><div class='ctx'> 						adv7511);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto err_unregister_audio;</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig b/drivers/gpu/drm/bridge/analogix/Kconfig<br/>index 173dada218ec..4846b2e9be7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/analogix/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/analogix/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/analogix/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/analogix/Kconfig</a></div><div class='hunk'>@@ -37,7 +37,7 @@ config DRM_ANALOGIX_ANX7625</div><div class='ctx'> 	select DRM_DISPLAY_DP_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_HDCP_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_HELPER</div><div class='del'>-	select DRM_DP_AUX_BUS</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	select DRM_MIPI_DSI</div><div class='ctx'> 	help</div><div class='ctx'> 	  ANX7625 is an ultra-low power 4K mobile HD transmitter</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c<br/>index 9d96d28d6fe8..59e9ad349969 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/analogix/anx7625.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/analogix/anx7625.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/analogix/anx7625.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/analogix/anx7625.c</a></div><div class='hunk'>@@ -2066,10 +2066,8 @@ static int anx7625_setup_dsi_device(struct anx7625_data *ctx)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(ctx-&gt;pdata.mipi_host_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		DRM_DEV_ERROR(dev, "fail to find dsi host.\n");</div><div class='del'>-		return -EPROBE_DEFER;</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return dev_err_probe(dev, -EPROBE_DEFER, "fail to find dsi host.\n");</div><div class='ctx'> </div><div class='ctx'> 	dsi = devm_mipi_dsi_device_register_full(dev, host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dsi)) {</div><div class='hunk'>@@ -2471,15 +2469,22 @@ static void anx7625_bridge_atomic_disable(struct drm_bridge *bridge,</div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;aux_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+anx7625_audio_update_connector_status(struct anx7625_data *ctx,</div><div class='add'>+				      enum drm_connector_status status);</div><div class='add'>+</div><div class='ctx'> static enum drm_connector_status</div><div class='ctx'> anx7625_bridge_detect(struct drm_bridge *bridge)</div><div class='ctx'> {</div><div class='ctx'> 	struct anx7625_data *ctx = bridge_to_anx7625(bridge);</div><div class='ctx'> 	struct device *dev = ctx-&gt;dev;</div><div class='add'>+	enum drm_connector_status status;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEV_DEBUG_DRIVER(dev, "drm bridge detect\n");</div><div class='ctx'> </div><div class='del'>-	return anx7625_sink_detect(ctx);</div><div class='add'>+	status = anx7625_sink_detect(ctx);</div><div class='add'>+	anx7625_audio_update_connector_status(ctx, status);</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct drm_edid *anx7625_bridge_edid_read(struct drm_bridge *bridge,</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c<br/>index e226acc5c15e..8a91ef0ae065 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c</a></div><div class='hunk'>@@ -2059,6 +2059,9 @@ static void cdns_mhdp_atomic_enable(struct drm_bridge *bridge,</div><div class='ctx'> 	mhdp_state = to_cdns_mhdp_bridge_state(new_state);</div><div class='ctx'> </div><div class='ctx'> 	mhdp_state-&gt;current_mode = drm_mode_duplicate(bridge-&gt;dev, mode);</div><div class='add'>+	if (!mhdp_state-&gt;current_mode)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	drm_mode_set_name(mhdp_state-&gt;current_mode);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(mhdp-&gt;dev, "%s: Enabling mode %s\n", __func__, mode-&gt;name);</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c<br/>index 82d23e4df09e..9eecac457dcf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/chipone-icn6211.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/chipone-icn6211.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/chipone-icn6211.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/chipone-icn6211.c</a></div><div class='hunk'>@@ -563,10 +563,8 @@ static int chipone_dsi_host_attach(struct chipone *icn)</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(host_node);</div><div class='ctx'> 	of_node_put(host_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		dev_err(dev, "failed to find dsi host\n");</div><div class='del'>-		return -EPROBE_DEFER;</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n");</div><div class='ctx'> </div><div class='ctx'> 	dsi = mipi_dsi_device_register_full(host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dsi)) {</div><div class='hunk'>@@ -783,7 +781,6 @@ static struct mipi_dsi_driver chipone_dsi_driver = {</div><div class='ctx'> 	.remove = chipone_dsi_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "chipone-icn6211",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.of_match_table = chipone_of_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/imx/Kconfig b/drivers/gpu/drm/bridge/imx/Kconfig<br/>index 5965e8027529..8dd89efa8ea7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/imx/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/imx/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/imx/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/imx/Kconfig</a></div><div class='hunk'>@@ -8,8 +8,8 @@ config DRM_IMX8MP_DW_HDMI_BRIDGE</div><div class='ctx'> 	depends on OF</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='ctx'> 	select DRM_DW_HDMI</div><div class='del'>-	select DRM_IMX8MP_HDMI_PVI</div><div class='del'>-	select PHY_FSL_SAMSUNG_HDMI_PHY</div><div class='add'>+	imply DRM_IMX8MP_HDMI_PVI</div><div class='add'>+	imply PHY_FSL_SAMSUNG_HDMI_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  Choose this to enable support for the internal HDMI encoder found</div><div class='ctx'> 	  on the i.MX8MP SoC.</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c<br/>index f2a09c879e3d..073e64dc200c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c</a></div><div class='hunk'>@@ -173,15 +173,13 @@ static int imx8mp_hdmi_pvi_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int imx8mp_hdmi_pvi_remove(struct platform_device *pdev)</div><div class='add'>+static void imx8mp_hdmi_pvi_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct imx8mp_hdmi_pvi *pvi = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	drm_bridge_remove(&amp;pvi-&gt;bridge);</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id imx8mp_hdmi_pvi_match[] = {</div><div class='hunk'>@@ -195,7 +193,7 @@ MODULE_DEVICE_TABLE(of, imx8mp_hdmi_pvi_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver imx8mp_hdmi_pvi_driver = {</div><div class='ctx'> 	.probe	= imx8mp_hdmi_pvi_probe,</div><div class='del'>-	.remove	= imx8mp_hdmi_pvi_remove,</div><div class='add'>+	.remove_new = imx8mp_hdmi_pvi_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name = "imx-hdmi-pvi",</div><div class='ctx'> 		.of_match_table	= imx8mp_hdmi_pvi_match,</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c<br/>index 89fc432ac611..13bc570c5473 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c</a></div><div class='hunk'>@@ -104,13 +104,11 @@ static int imx8mp_dw_hdmi_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int imx8mp_dw_hdmi_remove(struct platform_device *pdev)</div><div class='add'>+static void imx8mp_dw_hdmi_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct imx8mp_hdmi *hdmi = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	dw_hdmi_remove(hdmi-&gt;dw_hdmi);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused imx8mp_dw_hdmi_pm_suspend(struct device *dev)</div><div class='hunk'>@@ -140,7 +138,7 @@ MODULE_DEVICE_TABLE(of, imx8mp_dw_hdmi_of_table);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver imx8mp_dw_hdmi_platform_driver = {</div><div class='ctx'> 	.probe		= imx8mp_dw_hdmi_probe,</div><div class='del'>-	.remove		= imx8mp_dw_hdmi_remove,</div><div class='add'>+	.remove_new	= imx8mp_dw_hdmi_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "imx8mp-dw-hdmi-tx",</div><div class='ctx'> 		.of_match_table = imx8mp_dw_hdmi_of_table,</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c<br/>index 27334173e911..3f68c82888c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ite-it6505.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ite-it6505.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ite-it6505.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/ite-it6505.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2020, The Linux Foundation. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/ite-it66121.c b/drivers/gpu/drm/bridge/ite-it66121.c<br/>index 1c3433b5e366..925e42f46cd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ite-it66121.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ite-it66121.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ite-it66121.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/ite-it66121.c</a></div><div class='hunk'>@@ -1540,12 +1540,6 @@ static int it66121_probe(struct i2c_client *client)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!of_device_is_available(ep)) {</div><div class='del'>-		of_node_put(ep);</div><div class='del'>-		dev_err(ctx-&gt;dev, "The remote device is disabled\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;next_bridge = of_drm_find_bridge(ep);</div><div class='ctx'> 	of_node_put(ep);</div><div class='ctx'> 	if (!ctx-&gt;next_bridge) {</div><div class='hunk'>@@ -1586,13 +1580,18 @@ static int it66121_probe(struct i2c_client *client)</div><div class='ctx'> 	ctx-&gt;bridge.funcs = &amp;it66121_bridge_funcs;</div><div class='ctx'> 	ctx-&gt;bridge.of_node = dev-&gt;of_node;</div><div class='ctx'> 	ctx-&gt;bridge.type = DRM_MODE_CONNECTOR_HDMIA;</div><div class='del'>-	ctx-&gt;bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD;</div><div class='del'>-</div><div class='del'>-	ret = devm_request_threaded_irq(dev, client-&gt;irq, NULL,	it66121_irq_threaded_handler,</div><div class='del'>-					IRQF_ONESHOT, dev_name(dev), ctx);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "Failed to request irq %d:%d\n", client-&gt;irq, ret);</div><div class='del'>-		return ret;</div><div class='add'>+	ctx-&gt;bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;</div><div class='add'>+	if (client-&gt;irq &gt; 0) {</div><div class='add'>+		ctx-&gt;bridge.ops |= DRM_BRIDGE_OP_HPD;</div><div class='add'>+</div><div class='add'>+		ret = devm_request_threaded_irq(dev, client-&gt;irq, NULL,</div><div class='add'>+						it66121_irq_threaded_handler,</div><div class='add'>+						IRQF_ONESHOT, dev_name(dev),</div><div class='add'>+						ctx);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(dev, "Failed to request irq %d:%d\n", client-&gt;irq, ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	it66121_audio_codec_init(ctx, dev);</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/lontium-lt8912b.c b/drivers/gpu/drm/bridge/lontium-lt8912b.c<br/>index 4b2ae27f0a57..1a9defa15663 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/lontium-lt8912b.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/lontium-lt8912b.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/lontium-lt8912b.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/lontium-lt8912b.c</a></div><div class='hunk'>@@ -494,10 +494,8 @@ static int lt8912_attach_dsi(struct lt8912 *lt)</div><div class='ctx'> 						 };</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(lt-&gt;host_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		dev_err(dev, "failed to find dsi host\n");</div><div class='del'>-		return -EPROBE_DEFER;</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n");</div><div class='ctx'> </div><div class='ctx'> 	dsi = devm_mipi_dsi_device_register_full(dev, host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dsi)) {</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c b/drivers/gpu/drm/bridge/lontium-lt9611.c<br/>index a9c7e2b07ea1..b99fe87ec738 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/lontium-lt9611.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/lontium-lt9611.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/lontium-lt9611.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/lontium-lt9611.c</a></div><div class='hunk'>@@ -761,10 +761,8 @@ static struct mipi_dsi_device *lt9611_attach_dsi(struct lt9611 *lt9611,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(dsi_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		dev_err(lt9611-&gt;dev, "failed to find dsi host\n");</div><div class='del'>-		return ERR_PTR(-EPROBE_DEFER);</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return ERR_PTR(dev_err_probe(lt9611-&gt;dev, -EPROBE_DEFER, "failed to find dsi host\n"));</div><div class='ctx'> </div><div class='ctx'> 	dsi = devm_mipi_dsi_device_register_full(dev, host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dsi)) {</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c b/drivers/gpu/drm/bridge/lontium-lt9611uxc.c<br/>index f4f593ad8f79..ab702471f3ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/lontium-lt9611uxc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/lontium-lt9611uxc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/lontium-lt9611uxc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/lontium-lt9611uxc.c</a></div><div class='hunk'>@@ -266,10 +266,8 @@ static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(dsi_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		dev_err(dev, "failed to find dsi host\n");</div><div class='del'>-		return ERR_PTR(-EPROBE_DEFER);</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return ERR_PTR(dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"));</div><div class='ctx'> </div><div class='ctx'> 	dsi = devm_mipi_dsi_device_register_full(dev, host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dsi)) {</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c b/drivers/gpu/drm/bridge/microchip-lvds.c<br/>new file mode 100644<br/>index 000000000000..b8313dad6072<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/microchip-lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/microchip-lvds.c</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries</div><div class='add'>+ *</div><div class='add'>+ * Author: Manikandan Muralidharan &lt;manikandan.m@microchip.com&gt;</div><div class='add'>+ * Author: Dharma Balasubiramani &lt;dharma.b@microchip.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/component.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/of_graph.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/devinfo.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_atomic_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_bridge.h&gt;</div><div class='add'>+#include &lt;drm/drm_of.h&gt;</div><div class='add'>+#include &lt;drm/drm_panel.h&gt;</div><div class='add'>+#include &lt;drm/drm_print.h&gt;</div><div class='add'>+#include &lt;drm/drm_probe_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_simple_kms_helper.h&gt;</div><div class='add'>+</div><div class='add'>+#define LVDS_POLL_TIMEOUT_MS 1000</div><div class='add'>+</div><div class='add'>+/* LVDSC register offsets */</div><div class='add'>+#define LVDSC_CR	0x00</div><div class='add'>+#define LVDSC_CFGR	0x04</div><div class='add'>+#define LVDSC_SR	0x0C</div><div class='add'>+#define LVDSC_WPMR	0xE4</div><div class='add'>+</div><div class='add'>+/* Bitfields in LVDSC_CR (Control Register) */</div><div class='add'>+#define LVDSC_CR_SER_EN	BIT(0)</div><div class='add'>+</div><div class='add'>+/* Bitfields in LVDSC_CFGR (Configuration Register) */</div><div class='add'>+#define LVDSC_CFGR_PIXSIZE_24BITS	0</div><div class='add'>+#define LVDSC_CFGR_DEN_POL_HIGH		0</div><div class='add'>+#define LVDSC_CFGR_DC_UNBALANCED	0</div><div class='add'>+#define LVDSC_CFGR_MAPPING_JEIDA	BIT(6)</div><div class='add'>+</div><div class='add'>+/*Bitfields in LVDSC_SR */</div><div class='add'>+#define LVDSC_SR_CS	BIT(0)</div><div class='add'>+</div><div class='add'>+/* Bitfields in LVDSC_WPMR (Write Protection Mode Register) */</div><div class='add'>+#define LVDSC_WPMR_WPKEY_MASK	GENMASK(31, 8)</div><div class='add'>+#define LVDSC_WPMR_WPKEY_PSSWD	0x4C5644</div><div class='add'>+</div><div class='add'>+struct mchp_lvds {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	struct clk *pclk;</div><div class='add'>+	struct drm_panel *panel;</div><div class='add'>+	struct drm_bridge bridge;</div><div class='add'>+	struct drm_bridge *panel_bridge;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct mchp_lvds *bridge_to_lvds(struct drm_bridge *bridge)</div><div class='add'>+{</div><div class='add'>+	return container_of(bridge, struct mchp_lvds, bridge);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 lvds_readl(struct mchp_lvds *lvds, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return readl_relaxed(lvds-&gt;regs + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void lvds_writel(struct mchp_lvds *lvds, u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(val, lvds-&gt;regs + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lvds_serialiser_on(struct mchp_lvds *lvds)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(LVDS_POLL_TIMEOUT_MS);</div><div class='add'>+</div><div class='add'>+	/* The LVDSC registers can only be written if WPEN is cleared */</div><div class='add'>+	lvds_writel(lvds, LVDSC_WPMR, (LVDSC_WPMR_WPKEY_PSSWD &amp;</div><div class='add'>+				LVDSC_WPMR_WPKEY_MASK));</div><div class='add'>+</div><div class='add'>+	/* Wait for the status of configuration registers to be changed */</div><div class='add'>+	while (lvds_readl(lvds, LVDSC_SR) &amp; LVDSC_SR_CS) {</div><div class='add'>+		if (time_after(jiffies, timeout)) {</div><div class='add'>+			dev_err(lvds-&gt;dev, "%s: timeout error\n", __func__);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure the LVDSC */</div><div class='add'>+	lvds_writel(lvds, LVDSC_CFGR, (LVDSC_CFGR_MAPPING_JEIDA |</div><div class='add'>+				LVDSC_CFGR_DC_UNBALANCED |</div><div class='add'>+				LVDSC_CFGR_DEN_POL_HIGH |</div><div class='add'>+				LVDSC_CFGR_PIXSIZE_24BITS));</div><div class='add'>+</div><div class='add'>+	/* Enable the LVDS serializer */</div><div class='add'>+	lvds_writel(lvds, LVDSC_CR, LVDSC_CR_SER_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_lvds_attach(struct drm_bridge *bridge,</div><div class='add'>+			    enum drm_bridge_attach_flags flags)</div><div class='add'>+{</div><div class='add'>+	struct mchp_lvds *lvds = bridge_to_lvds(bridge);</div><div class='add'>+</div><div class='add'>+	return drm_bridge_attach(bridge-&gt;encoder, lvds-&gt;panel_bridge,</div><div class='add'>+				 bridge, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_lvds_enable(struct drm_bridge *bridge)</div><div class='add'>+{</div><div class='add'>+	struct mchp_lvds *lvds = bridge_to_lvds(bridge);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(lvds-&gt;pclk);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lvds-&gt;dev, "failed to enable lvds pclk %d\n", ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(lvds-&gt;dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lvds-&gt;dev, "failed to get pm runtime: %d\n", ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lvds_serialiser_on(lvds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_lvds_disable(struct drm_bridge *bridge)</div><div class='add'>+{</div><div class='add'>+	struct mchp_lvds *lvds = bridge_to_lvds(bridge);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(lvds-&gt;dev);</div><div class='add'>+	clk_disable_unprepare(lvds-&gt;pclk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_bridge_funcs mchp_lvds_bridge_funcs = {</div><div class='add'>+	.attach = mchp_lvds_attach,</div><div class='add'>+	.enable = mchp_lvds_enable,</div><div class='add'>+	.disable = mchp_lvds_disable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mchp_lvds_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct mchp_lvds *lvds;</div><div class='add'>+	struct device_node *port;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;of_node)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	lvds = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*lvds), GFP_KERNEL);</div><div class='add'>+	if (!lvds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	lvds-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	lvds-&gt;regs = devm_ioremap_resource(lvds-&gt;dev,</div><div class='add'>+			platform_get_resource(pdev, IORESOURCE_MEM, 0));</div><div class='add'>+	if (IS_ERR(lvds-&gt;regs))</div><div class='add'>+		return PTR_ERR(lvds-&gt;regs);</div><div class='add'>+</div><div class='add'>+	lvds-&gt;pclk = devm_clk_get(lvds-&gt;dev, "pclk");</div><div class='add'>+	if (IS_ERR(lvds-&gt;pclk))</div><div class='add'>+		return dev_err_probe(lvds-&gt;dev, PTR_ERR(lvds-&gt;pclk),</div><div class='add'>+				"could not get pclk_lvds\n");</div><div class='add'>+</div><div class='add'>+	port = of_graph_get_remote_node(dev-&gt;of_node, 1, 0);</div><div class='add'>+	if (!port) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"can't find port point, please init lvds panel port!\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lvds-&gt;panel = of_drm_find_panel(port);</div><div class='add'>+	of_node_put(port);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(lvds-&gt;panel))</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+</div><div class='add'>+	lvds-&gt;panel_bridge = devm_drm_of_get_bridge(dev, dev-&gt;of_node, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(lvds-&gt;panel_bridge))</div><div class='add'>+		return PTR_ERR(lvds-&gt;panel_bridge);</div><div class='add'>+</div><div class='add'>+	lvds-&gt;bridge.of_node = dev-&gt;of_node;</div><div class='add'>+	lvds-&gt;bridge.type = DRM_MODE_CONNECTOR_LVDS;</div><div class='add'>+	lvds-&gt;bridge.funcs = &amp;mchp_lvds_bridge_funcs;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, lvds);</div><div class='add'>+	ret = devm_pm_runtime_enable(dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lvds-&gt;dev, "failed to enable pm runtime: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_bridge_add(&amp;lvds-&gt;bridge);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mchp_lvds_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,sam9x75-lvds",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mchp_lvds_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct platform_driver mchp_lvds_driver = {</div><div class='add'>+	.probe = mchp_lvds_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = "microchip-lvds",</div><div class='add'>+		   .of_match_table = mchp_lvds_dt_ids,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(mchp_lvds_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Manikandan Muralidharan &lt;manikandan.m@microchip.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Dharma Balasubiramani &lt;dharma.b@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Low Voltage Differential Signaling Controller Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c<br/>index 7f41525f7a6e..32506524d9a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/panel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/panel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/panel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/panel.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  * Copyright (C) 2017 Broadcom</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;drm/drm_atomic_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_bridge.h&gt;</div><div class='ctx'> #include &lt;drm/drm_connector.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c<br/>index cceb5aab6c83..9f2bc932c371 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/synopsys/dw-hdmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/synopsys/dw-hdmi.c</a></div><div class='hunk'>@@ -3291,40 +3291,17 @@ static void dw_hdmi_init_hw(struct dw_hdmi *hdmi)</div><div class='ctx'> </div><div class='ctx'> static int dw_hdmi_parse_dt(struct dw_hdmi *hdmi)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *endpoint;</div><div class='ctx'> 	struct device_node *remote;</div><div class='ctx'> </div><div class='ctx'> 	if (!hdmi-&gt;plat_data-&gt;output_port)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	endpoint = of_graph_get_endpoint_by_regs(hdmi-&gt;dev-&gt;of_node,</div><div class='del'>-						 hdmi-&gt;plat_data-&gt;output_port,</div><div class='del'>-						 -1);</div><div class='del'>-	if (!endpoint) {</div><div class='del'>-		/*</div><div class='del'>-		 * On platforms whose bindings don't make the output port</div><div class='del'>-		 * mandatory (such as Rockchip) the plat_data-&gt;output_port</div><div class='del'>-		 * field isn't set, so it's safe to make this a fatal error.</div><div class='del'>-		 */</div><div class='del'>-		dev_err(hdmi-&gt;dev, "Missing endpoint in port@%u\n",</div><div class='del'>-			hdmi-&gt;plat_data-&gt;output_port);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	remote = of_graph_get_remote_port_parent(endpoint);</div><div class='del'>-	of_node_put(endpoint);</div><div class='del'>-	if (!remote) {</div><div class='del'>-		dev_err(hdmi-&gt;dev, "Endpoint in port@%u unconnected\n",</div><div class='del'>-			hdmi-&gt;plat_data-&gt;output_port);</div><div class='add'>+	remote = of_graph_get_remote_node(hdmi-&gt;dev-&gt;of_node,</div><div class='add'>+					  hdmi-&gt;plat_data-&gt;output_port,</div><div class='add'>+					  -1);</div><div class='add'>+	if (!remote)</div><div class='ctx'> 		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!of_device_is_available(remote)) {</div><div class='del'>-		dev_err(hdmi-&gt;dev, "port@%u remote device is disabled\n",</div><div class='del'>-			hdmi-&gt;plat_data-&gt;output_port);</div><div class='del'>-		of_node_put(remote);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	hdmi-&gt;next_bridge = of_drm_find_bridge(remote);</div><div class='ctx'> 	of_node_put(remote);</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/tc358764.c b/drivers/gpu/drm/bridge/tc358764.c<br/>index deccb3995022..3d3d135b4348 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/tc358764.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/tc358764.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/tc358764.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/tc358764.c</a></div><div class='hunk'>@@ -401,7 +401,6 @@ static struct mipi_dsi_driver tc358764_driver = {</div><div class='ctx'> 	.remove = tc358764_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "tc358764",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.of_match_table = tc358764_of_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c<br/>index 90a89d70d832..3b7cc3be2ccd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/tc358775.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/tc358775.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/tc358775.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/tc358775.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/media-bus-format.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -107,6 +108,7 @@</div><div class='ctx'> #define RDPKTLN         0x0404  /* Command Read Packet Length */</div><div class='ctx'> </div><div class='ctx'> #define VPCTRL          0x0450  /* Video Path Control */</div><div class='add'>+#define EVTMODE		BIT(5)  /* Video event mode enable, tc35876x only */</div><div class='ctx'> #define HTIM1           0x0454  /* Horizontal Timing Control 1 */</div><div class='ctx'> #define HTIM2           0x0458  /* Horizontal Timing Control 2 */</div><div class='ctx'> #define VTIM1           0x045C  /* Vertical Timing Control 1 */</div><div class='hunk'>@@ -254,6 +256,11 @@ enum tc358775_ports {</div><div class='ctx'> 	TC358775_LVDS_OUT1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum tc3587x5_type {</div><div class='add'>+	TC358765 = 0x65,</div><div class='add'>+	TC358775 = 0x75,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct tc_data {</div><div class='ctx'> 	struct i2c_client	*i2c;</div><div class='ctx'> 	struct device		*dev;</div><div class='hunk'>@@ -271,6 +278,8 @@ struct tc_data {</div><div class='ctx'> 	struct gpio_desc	*stby_gpio;</div><div class='ctx'> 	u8			lvds_link; /* single-link or dual-link */</div><div class='ctx'> 	u8			bpc;</div><div class='add'>+</div><div class='add'>+	enum tc3587x5_type	type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline struct tc_data *bridge_to_tc(struct drm_bridge *b)</div><div class='hunk'>@@ -424,10 +433,16 @@ static void tc_bridge_enable(struct drm_bridge *bridge)</div><div class='ctx'> 	d2l_write(tc-&gt;i2c, PPI_STARTPPI, PPI_START_FUNCTION);</div><div class='ctx'> 	d2l_write(tc-&gt;i2c, DSI_STARTDSI, DSI_RX_START);</div><div class='ctx'> </div><div class='add'>+	/* Video event mode vs pulse mode bit, does not exist for tc358775 */</div><div class='add'>+	if (tc-&gt;type == TC358765)</div><div class='add'>+		val = EVTMODE;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='ctx'> 	if (tc-&gt;bpc == 8)</div><div class='del'>-		val = TC358775_VPCTRL_OPXLFMT(1);</div><div class='add'>+		val |= TC358775_VPCTRL_OPXLFMT(1);</div><div class='ctx'> 	else /* bpc = 6; */</div><div class='del'>-		val = TC358775_VPCTRL_MSF(1);</div><div class='add'>+		val |= TC358775_VPCTRL_MSF(1);</div><div class='ctx'> </div><div class='ctx'> 	dsiclk = mode-&gt;crtc_clock * 3 * tc-&gt;bpc / tc-&gt;num_dsi_lanes / 1000;</div><div class='ctx'> 	clkdiv = dsiclk / (tc-&gt;lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3);</div><div class='hunk'>@@ -454,10 +469,6 @@ static void tc_bridge_enable(struct drm_bridge *bridge)</div><div class='ctx'> 	dev_dbg(tc-&gt;dev, "bus_formats %04x bpc %d\n",</div><div class='ctx'> 		connector-&gt;display_info.bus_formats[0],</div><div class='ctx'> 		tc-&gt;bpc);</div><div class='del'>-	/*</div><div class='del'>-	 * Default hardware register settings of tc358775 configured</div><div class='del'>-	 * with MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA jeida-24 format</div><div class='del'>-	 */</div><div class='ctx'> 	if (connector-&gt;display_info.bus_formats[0] ==</div><div class='ctx'> 		MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) {</div><div class='ctx'> 		/* VESA-24 */</div><div class='hunk'>@@ -468,14 +479,15 @@ static void tc_bridge_enable(struct drm_bridge *bridge)</div><div class='ctx'> 		d2l_write(tc-&gt;i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2));</div><div class='ctx'> 		d2l_write(tc-&gt;i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));</div><div class='ctx'> 		d2l_write(tc-&gt;i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6));</div><div class='del'>-	} else { /*  MEDIA_BUS_FMT_RGB666_1X7X3_SPWG - JEIDA-18 */</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3));</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX0407, LV_MX(LVI_R4, LVI_L0, LVI_R5, LVI_G0));</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_L0, LVI_L0));</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0));</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX1619, LV_MX(LVI_L0, LVI_L0, LVI_B1, LVI_B2));</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));</div><div class='del'>-		d2l_write(tc-&gt;i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_L0));</div><div class='add'>+	} else {</div><div class='add'>+		/* JEIDA-18 and JEIDA-24 */</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX0003, LV_MX(LVI_R2, LVI_R3, LVI_R4, LVI_R5));</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX0407, LV_MX(LVI_R6, LVI_R1, LVI_R7, LVI_G2));</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX0811, LV_MX(LVI_G3, LVI_G4, LVI_G0, LVI_G1));</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX1215, LV_MX(LVI_G5, LVI_G6, LVI_G7, LVI_B2));</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX1619, LV_MX(LVI_B0, LVI_B1, LVI_B3, LVI_B4));</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX2023, LV_MX(LVI_B5, LVI_B6, LVI_B7, LVI_L0));</div><div class='add'>+		d2l_write(tc-&gt;i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	d2l_write(tc-&gt;i2c, VFUEN, VFUEN_EN);</div><div class='hunk'>@@ -528,27 +540,24 @@ tc_mode_valid(struct drm_bridge *bridge,</div><div class='ctx'> static int tc358775_parse_dt(struct device_node *np, struct tc_data *tc)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *endpoint;</div><div class='del'>-	struct device_node *parent;</div><div class='ctx'> 	struct device_node *remote;</div><div class='ctx'> 	int dsi_lanes = -1;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * To get the data-lanes of dsi, we need to access the dsi0_out of port1</div><div class='del'>-	 *  of dsi0 endpoint from bridge port0 of d2l_in</div><div class='del'>-	 */</div><div class='ctx'> 	endpoint = of_graph_get_endpoint_by_regs(tc-&gt;dev-&gt;of_node,</div><div class='ctx'> 						 TC358775_DSI_IN, -1);</div><div class='del'>-	if (endpoint) {</div><div class='del'>-		/* dsi0_out node */</div><div class='del'>-		parent = of_graph_get_remote_port_parent(endpoint);</div><div class='del'>-		of_node_put(endpoint);</div><div class='del'>-		if (parent) {</div><div class='del'>-			/* dsi0 port 1 */</div><div class='del'>-			dsi_lanes = drm_of_get_data_lanes_count_ep(parent, 1, -1, 1, 4);</div><div class='del'>-			of_node_put(parent);</div><div class='del'>-		}</div><div class='add'>+	dsi_lanes = drm_of_get_data_lanes_count(endpoint, 1, 4);</div><div class='add'>+</div><div class='add'>+	/* Quirk old dtb: Use data lanes from the DSI host side instead of bridge */</div><div class='add'>+	if (dsi_lanes == -EINVAL || dsi_lanes == -ENODEV) {</div><div class='add'>+		remote = of_graph_get_remote_endpoint(endpoint);</div><div class='add'>+		dsi_lanes = drm_of_get_data_lanes_count(remote, 1, 4);</div><div class='add'>+		of_node_put(remote);</div><div class='add'>+		if (dsi_lanes &gt;= 1)</div><div class='add'>+			dev_warn(tc-&gt;dev, "no dsi-lanes for the bridge, using host lanes\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	of_node_put(endpoint);</div><div class='add'>+</div><div class='ctx'> 	if (dsi_lanes &lt; 0)</div><div class='ctx'> 		return dsi_lanes;</div><div class='ctx'> </div><div class='hunk'>@@ -610,10 +619,8 @@ static int tc_attach_host(struct tc_data *tc)</div><div class='ctx'> 						};</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(tc-&gt;host_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		dev_err(dev, "failed to find dsi host\n");</div><div class='del'>-		return -EPROBE_DEFER;</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n");</div><div class='ctx'> </div><div class='ctx'> 	dsi = devm_mipi_dsi_device_register_full(dev, host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dsi)) {</div><div class='hunk'>@@ -625,7 +632,21 @@ static int tc_attach_host(struct tc_data *tc)</div><div class='ctx'> </div><div class='ctx'> 	dsi-&gt;lanes = tc-&gt;num_dsi_lanes;</div><div class='ctx'> 	dsi-&gt;format = MIPI_DSI_FMT_RGB888;</div><div class='del'>-	dsi-&gt;mode_flags = MIPI_DSI_MODE_VIDEO;</div><div class='add'>+	dsi-&gt;mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |</div><div class='add'>+			  MIPI_DSI_MODE_LPM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The hs_rate and lp_rate are data rate values. The HS mode is</div><div class='add'>+	 * differential, while the LP mode is single ended. As the HS mode</div><div class='add'>+	 * uses DDR, the DSI clock frequency is half the hs_rate. The 10 Mbs</div><div class='add'>+	 * data rate for LP mode is not specified in the bridge data sheet,</div><div class='add'>+	 * but seems to be part of the MIPI DSI spec.</div><div class='add'>+	 */</div><div class='add'>+	if (tc-&gt;type == TC358765)</div><div class='add'>+		dsi-&gt;hs_rate = 800000000;</div><div class='add'>+	else</div><div class='add'>+		dsi-&gt;hs_rate = 1000000000;</div><div class='add'>+	dsi-&gt;lp_rate = 10000000;</div><div class='ctx'> </div><div class='ctx'> 	ret = devm_mipi_dsi_attach(dev, dsi);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -648,6 +669,7 @@ static int tc_probe(struct i2c_client *client)</div><div class='ctx'> </div><div class='ctx'> 	tc-&gt;dev = dev;</div><div class='ctx'> 	tc-&gt;i2c = client;</div><div class='add'>+	tc-&gt;type = (enum tc3587x5_type)(unsigned long)of_device_get_match_data(dev);</div><div class='ctx'> </div><div class='ctx'> 	tc-&gt;panel_bridge = devm_drm_of_get_bridge(dev, dev-&gt;of_node,</div><div class='ctx'> 						  TC358775_LVDS_OUT0, 0);</div><div class='hunk'>@@ -672,12 +694,9 @@ static int tc_probe(struct i2c_client *client)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tc-&gt;stby_gpio = devm_gpiod_get(dev, "stby", GPIOD_OUT_HIGH);</div><div class='del'>-	if (IS_ERR(tc-&gt;stby_gpio)) {</div><div class='del'>-		ret = PTR_ERR(tc-&gt;stby_gpio);</div><div class='del'>-		dev_err(dev, "cannot get stby-gpio %d\n", ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	tc-&gt;stby_gpio = devm_gpiod_get_optional(dev, "stby", GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(tc-&gt;stby_gpio))</div><div class='add'>+		return PTR_ERR(tc-&gt;stby_gpio);</div><div class='ctx'> </div><div class='ctx'> 	tc-&gt;reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);</div><div class='ctx'> 	if (IS_ERR(tc-&gt;reset_gpio)) {</div><div class='hunk'>@@ -688,6 +707,7 @@ static int tc_probe(struct i2c_client *client)</div><div class='ctx'> </div><div class='ctx'> 	tc-&gt;bridge.funcs = &amp;tc_bridge_funcs;</div><div class='ctx'> 	tc-&gt;bridge.of_node = dev-&gt;of_node;</div><div class='add'>+	tc-&gt;bridge.pre_enable_prev_first = true;</div><div class='ctx'> 	drm_bridge_add(&amp;tc-&gt;bridge);</div><div class='ctx'> </div><div class='ctx'> 	i2c_set_clientdata(client, tc);</div><div class='hunk'>@@ -711,13 +731,15 @@ static void tc_remove(struct i2c_client *client)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id tc358775_i2c_ids[] = {</div><div class='del'>-	{ "tc358775", 0 },</div><div class='add'>+	{ "tc358765", TC358765, },</div><div class='add'>+	{ "tc358775", TC358775, },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, tc358775_i2c_ids);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id tc358775_of_ids[] = {</div><div class='del'>-	{ .compatible = "toshiba,tc358775", },</div><div class='add'>+	{ .compatible = "toshiba,tc358765", .data = (void *)TC358765, },</div><div class='add'>+	{ .compatible = "toshiba,tc358775", .data = (void *)TC358775, },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, tc358775_of_ids);</div><div class='head'>diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c b/drivers/gpu/drm/bridge/thc63lvd1024.c<br/>index d4c1a601bbb5..674efc489e3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/thc63lvd1024.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/thc63lvd1024.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/thc63lvd1024.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/thc63lvd1024.c</a></div><div class='hunk'>@@ -123,26 +123,11 @@ static int thc63_parse_dt(struct thc63_dev *thc63)</div><div class='ctx'> 	struct device_node *endpoint;</div><div class='ctx'> 	struct device_node *remote;</div><div class='ctx'> </div><div class='del'>-	endpoint = of_graph_get_endpoint_by_regs(thc63-&gt;dev-&gt;of_node,</div><div class='del'>-						 THC63_RGB_OUT0, -1);</div><div class='del'>-	if (!endpoint) {</div><div class='del'>-		dev_err(thc63-&gt;dev, "Missing endpoint in port@%u\n",</div><div class='del'>-			THC63_RGB_OUT0);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	remote = of_graph_get_remote_port_parent(endpoint);</div><div class='del'>-	of_node_put(endpoint);</div><div class='add'>+	remote = of_graph_get_remote_node(thc63-&gt;dev-&gt;of_node,</div><div class='add'>+					  THC63_RGB_OUT0, -1);</div><div class='ctx'> 	if (!remote) {</div><div class='del'>-		dev_err(thc63-&gt;dev, "Endpoint in port@%u unconnected\n",</div><div class='del'>-			THC63_RGB_OUT0);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!of_device_is_available(remote)) {</div><div class='del'>-		dev_err(thc63-&gt;dev, "port@%u remote endpoint is disabled\n",</div><div class='add'>+		dev_err(thc63-&gt;dev, "No remote endpoint for port@%u\n",</div><div class='ctx'> 			THC63_RGB_OUT0);</div><div class='del'>-		of_node_put(remote);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/bridge/ti-dlpc3433.c b/drivers/gpu/drm/bridge/ti-dlpc3433.c<br/>index ca3348109bcd..6b559e071301 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ti-dlpc3433.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ti-dlpc3433.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ti-dlpc3433.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/ti-dlpc3433.c</a></div><div class='hunk'>@@ -319,12 +319,11 @@ static int dlpc_host_attach(struct dlpc *dlpc)</div><div class='ctx'> 		.channel = 0,</div><div class='ctx'> 		.node = NULL,</div><div class='ctx'> 	};</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	host = of_find_mipi_dsi_host_by_node(dlpc-&gt;host_node);</div><div class='del'>-	if (!host) {</div><div class='del'>-		DRM_DEV_ERROR(dev, "failed to find dsi host\n");</div><div class='del'>-		return -EPROBE_DEFER;</div><div class='del'>-	}</div><div class='add'>+	if (!host)</div><div class='add'>+		return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n");</div><div class='ctx'> </div><div class='ctx'> 	dlpc-&gt;dsi = mipi_dsi_device_register_full(host, &amp;info);</div><div class='ctx'> 	if (IS_ERR(dlpc-&gt;dsi)) {</div><div class='hunk'>@@ -336,7 +335,11 @@ static int dlpc_host_attach(struct dlpc *dlpc)</div><div class='ctx'> 	dlpc-&gt;dsi-&gt;format = MIPI_DSI_FMT_RGB565;</div><div class='ctx'> 	dlpc-&gt;dsi-&gt;lanes = dlpc-&gt;dsi_lanes;</div><div class='ctx'> </div><div class='del'>-	return devm_mipi_dsi_attach(dev, dlpc-&gt;dsi);</div><div class='add'>+	ret = devm_mipi_dsi_attach(dev, dlpc-&gt;dsi);</div><div class='add'>+	if (ret)</div><div class='add'>+		DRM_DEV_ERROR(dev, "failed to attach dsi host\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dlpc3433_probe(struct i2c_client *client)</div><div class='hunk'>@@ -367,10 +370,8 @@ static int dlpc3433_probe(struct i2c_client *client)</div><div class='ctx'> 	drm_bridge_add(&amp;dlpc-&gt;bridge);</div><div class='ctx'> </div><div class='ctx'> 	ret = dlpc_host_attach(dlpc);</div><div class='del'>-	if (ret) {</div><div class='del'>-		DRM_DEV_ERROR(dev, "failed to attach dsi host\n");</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_remove_bridge;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c<br/>index 4814b7b6d1fd..57a7ed13f996 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ti-sn65dsi83.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/bridge/ti-sn65dsi83.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/bridge/ti-sn65dsi83.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/bridge/ti-sn65dsi83.c</a></div><div class='hunk'>@@ -478,7 +478,6 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,</div><div class='ctx'> 		dev_err(ctx-&gt;dev, "failed to lock PLL, ret=%i\n", ret);</div><div class='ctx'> 		/* On failure, disable PLL again and exit. */</div><div class='ctx'> 		regmap_write(ctx-&gt;regmap, REG_RC_PLL_EN, 0x00);</div><div class='del'>-		regulator_disable(ctx-&gt;vcc);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml<br/>index 0857773e5c5f..8bc63912fddb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ci/test.yml?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/ci/test.yml</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/ci/test.yml?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/ci/test.yml</a></div><div class='hunk'>@@ -252,11 +252,11 @@ i915:cml:</div><div class='ctx'> i915:tgl:</div><div class='ctx'>   extends:</div><div class='ctx'>     - .i915</div><div class='del'>-  parallel: 8</div><div class='add'>+  parallel: 5</div><div class='ctx'>   variables:</div><div class='del'>-    DEVICE_TYPE: asus-cx9400-volteer</div><div class='add'>+    DEVICE_TYPE: acer-cp514-2h-1130g7-volteer</div><div class='ctx'>     GPU_VERSION: tgl</div><div class='del'>-    RUNNER_TAG: mesa-ci-x86-64-lava-asus-cx9400-volteer</div><div class='add'>+    RUNNER_TAG: mesa-ci-x86-64-lava-acer-cp514-2h-1130g7-volteer</div><div class='ctx'> </div><div class='ctx'> .amdgpu:</div><div class='ctx'>   extends:</div><div class='head'>diff --git a/drivers/gpu/drm/display/Kconfig b/drivers/gpu/drm/display/Kconfig<br/>index c0f56888c328..864a6488bfdf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/Kconfig</a></div><div class='hunk'>@@ -1,15 +1,36 @@</div><div class='ctx'> # SPDX-License-Identifier: MIT</div><div class='ctx'> </div><div class='del'>-config DRM_DP_AUX_BUS</div><div class='add'>+config DRM_DISPLAY_HELPER</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on DRM</div><div class='del'>-	depends on OF || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  DRM helpers for display adapters.</div><div class='ctx'> </div><div class='del'>-config DRM_DISPLAY_HELPER</div><div class='add'>+config DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on DRM</div><div class='add'>+	depends on OF || COMPILE_TEST</div><div class='add'>+</div><div class='add'>+config DRM_DISPLAY_DP_AUX_CEC</div><div class='add'>+	bool "Enable DisplayPort CEC-Tunneling-over-AUX HDMI support"</div><div class='add'>+	depends on DRM &amp;&amp; DRM_DISPLAY_HELPER</div><div class='add'>+	select DRM_DISPLAY_DP_HELPER</div><div class='add'>+	select CEC_CORE</div><div class='ctx'> 	help</div><div class='del'>-	  DRM helpers for display adapters.</div><div class='add'>+	  Choose this option if you want to enable HDMI CEC support for</div><div class='add'>+	  DisplayPort/USB-C to HDMI adapters.</div><div class='add'>+</div><div class='add'>+	  Note: not all adapters support this feature, and even for those</div><div class='add'>+	  that do support this they often do not hook up the CEC pin.</div><div class='add'>+</div><div class='add'>+config DRM_DISPLAY_DP_AUX_CHARDEV</div><div class='add'>+	bool "DRM DP AUX Interface"</div><div class='add'>+	depends on DRM &amp;&amp; DRM_DISPLAY_HELPER</div><div class='add'>+	select DRM_DISPLAY_DP_HELPER</div><div class='add'>+	help</div><div class='add'>+	  Choose this option to enable a /dev/drm_dp_auxN node that allows to</div><div class='add'>+	  read and write values to arbitrary DPCD registers on the DP aux</div><div class='add'>+	  channel.</div><div class='ctx'> </div><div class='ctx'> config DRM_DISPLAY_DP_HELPER</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -25,7 +46,7 @@ config DRM_DISPLAY_DP_TUNNEL</div><div class='ctx'> 	  DP tunnel features like the Bandwidth Allocation mode to maximize the</div><div class='ctx'> 	  BW utilization for display streams on Thunderbolt links.</div><div class='ctx'> </div><div class='del'>-config DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE</div><div class='add'>+config DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG</div><div class='ctx'> 	bool "Enable debugging the DP tunnel state"</div><div class='ctx'> 	depends on REF_TRACKER</div><div class='ctx'> 	depends on DRM_DISPLAY_DP_TUNNEL</div><div class='hunk'>@@ -49,24 +70,3 @@ config DRM_DISPLAY_HDMI_HELPER</div><div class='ctx'> 	depends on DRM_DISPLAY_HELPER</div><div class='ctx'> 	help</div><div class='ctx'> 	  DRM display helpers for HDMI.</div><div class='del'>-</div><div class='del'>-config DRM_DP_AUX_CHARDEV</div><div class='del'>-	bool "DRM DP AUX Interface"</div><div class='del'>-	depends on DRM &amp;&amp; DRM_DISPLAY_HELPER</div><div class='del'>-	select DRM_DISPLAY_DP_HELPER</div><div class='del'>-	help</div><div class='del'>-	  Choose this option to enable a /dev/drm_dp_auxN node that allows to</div><div class='del'>-	  read and write values to arbitrary DPCD registers on the DP aux</div><div class='del'>-	  channel.</div><div class='del'>-</div><div class='del'>-config DRM_DP_CEC</div><div class='del'>-	bool "Enable DisplayPort CEC-Tunneling-over-AUX HDMI support"</div><div class='del'>-	depends on DRM &amp;&amp; DRM_DISPLAY_HELPER</div><div class='del'>-	select DRM_DISPLAY_DP_HELPER</div><div class='del'>-	select CEC_CORE</div><div class='del'>-	help</div><div class='del'>-	  Choose this option if you want to enable HDMI CEC support for</div><div class='del'>-	  DisplayPort/USB-C to HDMI adapters.</div><div class='del'>-</div><div class='del'>-	  Note: not all adapters support this feature, and even for those</div><div class='del'>-	  that do support this they often do not hook up the CEC pin.</div><div class='head'>diff --git a/drivers/gpu/drm/display/Makefile b/drivers/gpu/drm/display/Makefile<br/>index 7ca61333c669..17d2cc73ff56 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/Makefile</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: MIT</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_DRM_DP_AUX_BUS) += drm_dp_aux_bus.o</div><div class='add'>+obj-$(CONFIG_DRM_DISPLAY_DP_AUX_BUS) += drm_dp_aux_bus.o</div><div class='ctx'> </div><div class='ctx'> drm_display_helper-y := drm_display_helper_mod.o</div><div class='ctx'> drm_display_helper-$(CONFIG_DRM_DISPLAY_DP_HELPER) += \</div><div class='hunk'>@@ -14,7 +14,7 @@ drm_display_helper-$(CONFIG_DRM_DISPLAY_HDCP_HELPER) += drm_hdcp_helper.o</div><div class='ctx'> drm_display_helper-$(CONFIG_DRM_DISPLAY_HDMI_HELPER) += \</div><div class='ctx'> 	drm_hdmi_helper.o \</div><div class='ctx'> 	drm_scdc_helper.o</div><div class='del'>-drm_display_helper-$(CONFIG_DRM_DP_AUX_CHARDEV) += drm_dp_aux_dev.o</div><div class='del'>-drm_display_helper-$(CONFIG_DRM_DP_CEC) += drm_dp_cec.o</div><div class='add'>+drm_display_helper-$(CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV) += drm_dp_aux_dev.o</div><div class='add'>+drm_display_helper-$(CONFIG_DRM_DISPLAY_DP_AUX_CEC) += drm_dp_cec.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DRM_DISPLAY_HELPER) += drm_display_helper.o</div><div class='head'>diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c<br/>index f5d4be897866..79a615667aab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/drm_dp_helper.c</a></div><div class='hunk'>@@ -2113,7 +2113,7 @@ EXPORT_SYMBOL(drm_dp_aux_init);</div><div class='ctx'>  * drm_dp_aux_register() in &amp;drm_connector_funcs.late_register, and likewise to</div><div class='ctx'>  * call drm_dp_aux_unregister() in &amp;drm_connector_funcs.early_unregister.</div><div class='ctx'>  * Functions which don't follow this will likely Oops when</div><div class='del'>- * %CONFIG_DRM_DP_AUX_CHARDEV is enabled.</div><div class='add'>+ * %CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * For devices where the AUX channel is a device that exists independently of</div><div class='ctx'>  * the &amp;drm_device that uses it, such as SoCs and bridge devices, it is</div><div class='hunk'>@@ -2281,6 +2281,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {</div><div class='ctx'> 	{ OUI(0x90, 0xCC, 0x24), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) },</div><div class='ctx'> 	/* Synaptics DP1.4 MST hubs require DSC for some modes on which it applies HBLANK expansion. */</div><div class='ctx'> 	{ OUI(0x90, 0xCC, 0x24), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },</div><div class='add'>+	/* MediaTek panels (at least in U3224KBA) require DSC for modes with a short HBLANK on UHBR links. */</div><div class='add'>+	{ OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },</div><div class='ctx'> 	/* Apple MacBookPro 2017 15 inch eDP Retina panel reports too low DP_MAX_LINK_RATE */</div><div class='ctx'> 	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID(101, 68, 21, 101, 98, 97), false, BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS) },</div><div class='ctx'> };</div><div class='hunk'>@@ -2948,6 +2950,43 @@ void drm_dp_vsc_sdp_log(struct drm_printer *p, const struct drm_dp_vsc_sdp *vsc)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_dp_vsc_sdp_log);</div><div class='ctx'> </div><div class='add'>+void drm_dp_as_sdp_log(struct drm_printer *p, const struct drm_dp_as_sdp *as_sdp)</div><div class='add'>+{</div><div class='add'>+	drm_printf(p, "DP SDP: AS_SDP, revision %u, length %u\n",</div><div class='add'>+		   as_sdp-&gt;revision, as_sdp-&gt;length);</div><div class='add'>+	drm_printf(p, "    vtotal: %d\n", as_sdp-&gt;vtotal);</div><div class='add'>+	drm_printf(p, "    target_rr: %d\n", as_sdp-&gt;target_rr);</div><div class='add'>+	drm_printf(p, "    duration_incr_ms: %d\n", as_sdp-&gt;duration_incr_ms);</div><div class='add'>+	drm_printf(p, "    duration_decr_ms: %d\n", as_sdp-&gt;duration_decr_ms);</div><div class='add'>+	drm_printf(p, "    operation_mode: %d\n", as_sdp-&gt;mode);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_dp_as_sdp_log);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported</div><div class='add'>+ * @aux: DisplayPort AUX channel</div><div class='add'>+ * @dpcd: DisplayPort configuration data</div><div class='add'>+ *</div><div class='add'>+ * Returns true if adaptive sync sdp is supported, else returns false</div><div class='add'>+ */</div><div class='add'>+bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])</div><div class='add'>+{</div><div class='add'>+	u8 rx_feature;</div><div class='add'>+</div><div class='add'>+	if (dpcd[DP_DPCD_REV] &lt; DP_DPCD_REV_13)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (drm_dp_dpcd_readb(aux, DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,</div><div class='add'>+			      &amp;rx_feature) != 1) {</div><div class='add'>+		drm_dbg_dp(aux-&gt;drm_dev,</div><div class='add'>+			   "Failed to read DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (rx_feature &amp; DP_ADAPTIVE_SYNC_SDP_SUPPORTED);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_dp_as_sdp_supported);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * drm_dp_vsc_sdp_supported() - check if vsc sdp is supported</div><div class='ctx'>  * @aux: DisplayPort AUX channel</div><div class='head'>diff --git a/drivers/gpu/drm/display/drm_dp_helper_internal.h b/drivers/gpu/drm/display/drm_dp_helper_internal.h<br/>index 8917fc3af9ec..737949a2820f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_helper_internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_helper_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_helper_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/drm_dp_helper_internal.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> struct drm_dp_aux;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DRM_DP_AUX_CHARDEV</div><div class='add'>+#ifdef CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV</div><div class='ctx'> int drm_dp_aux_dev_init(void);</div><div class='ctx'> void drm_dp_aux_dev_exit(void);</div><div class='ctx'> int drm_dp_aux_register_devnode(struct drm_dp_aux *aux);</div><div class='head'>diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c<br/>index 03d528209426..3577786b5db2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_mst_topology.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_mst_topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_mst_topology.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/drm_dp_mst_topology.c</a></div><div class='hunk'>@@ -2274,7 +2274,7 @@ drm_dp_mst_port_add_connector(struct drm_dp_mst_branch *mstb,</div><div class='ctx'> </div><div class='ctx'> 	if (port-&gt;pdt != DP_PEER_DEVICE_NONE &amp;&amp;</div><div class='ctx'> 	    drm_dp_mst_is_end_device(port-&gt;pdt, port-&gt;mcs) &amp;&amp;</div><div class='del'>-	    port-&gt;port_num &gt;= DP_MST_LOGICAL_PORT_0)</div><div class='add'>+	    drm_dp_mst_port_is_logical(port))</div><div class='ctx'> 		port-&gt;cached_edid = drm_edid_read_ddc(port-&gt;connector,</div><div class='ctx'> 						      &amp;port-&gt;aux.ddc);</div><div class='ctx'> </div><div class='hunk'>@@ -3608,24 +3608,30 @@ fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,</div><div class='ctx'> EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * drm_dp_read_mst_cap() - check whether or not a sink supports MST</div><div class='add'>+ * drm_dp_read_mst_cap() - Read the sink's MST mode capability</div><div class='ctx'>  * @aux: The DP AUX channel to use</div><div class='ctx'>  * @dpcd: A cached copy of the DPCD capabilities for this sink</div><div class='ctx'>  *</div><div class='del'>- * Returns: %True if the sink supports MST, %false otherwise</div><div class='add'>+ * Returns: enum drm_dp_mst_mode to indicate MST mode capability</div><div class='ctx'>  */</div><div class='del'>-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux,</div><div class='del'>-			 const u8 dpcd[DP_RECEIVER_CAP_SIZE])</div><div class='add'>+enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux,</div><div class='add'>+					 const u8 dpcd[DP_RECEIVER_CAP_SIZE])</div><div class='ctx'> {</div><div class='ctx'> 	u8 mstm_cap;</div><div class='ctx'> </div><div class='ctx'> 	if (dpcd[DP_DPCD_REV] &lt; DP_DPCD_REV_12)</div><div class='del'>-		return false;</div><div class='add'>+		return DRM_DP_SST;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &amp;mstm_cap) != 1)</div><div class='del'>-		return false;</div><div class='add'>+		return DRM_DP_SST;</div><div class='add'>+</div><div class='add'>+	if (mstm_cap &amp; DP_MST_CAP)</div><div class='add'>+		return DRM_DP_MST;</div><div class='ctx'> </div><div class='del'>-	return mstm_cap &amp; DP_MST_CAP;</div><div class='add'>+	if (mstm_cap &amp; DP_SINGLE_STREAM_SIDEBAND_MSG)</div><div class='add'>+		return DRM_DP_SST_SIDEBAND_MSG;</div><div class='add'>+</div><div class='add'>+	return DRM_DP_SST;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_dp_read_mst_cap);</div><div class='ctx'> </div><div class='hunk'>@@ -4213,7 +4219,7 @@ drm_dp_mst_detect_port(struct drm_connector *connector,</div><div class='ctx'> 	case DP_PEER_DEVICE_SST_SINK:</div><div class='ctx'> 		ret = connector_status_connected;</div><div class='ctx'> 		/* for logical ports - cache the EDID */</div><div class='del'>-		if (port-&gt;port_num &gt;= DP_MST_LOGICAL_PORT_0 &amp;&amp; !port-&gt;cached_edid)</div><div class='add'>+		if (drm_dp_mst_port_is_logical(port) &amp;&amp; !port-&gt;cached_edid)</div><div class='ctx'> 			port-&gt;cached_edid = drm_edid_read_ddc(connector, &amp;port-&gt;aux.ddc);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DP_PEER_DEVICE_DP_LEGACY_CONV:</div><div class='hunk'>@@ -5977,7 +5983,7 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Virtual DP Sink (Internal Display Panel) */</div><div class='del'>-	if (port-&gt;port_num &gt;= 8)</div><div class='add'>+	if (drm_dp_mst_port_is_logical(port))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/* DP-to-HDMI Protocol Converter */</div><div class='hunk'>@@ -6005,6 +6011,22 @@ static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * drm_dp_mst_aux_for_parent() - Get the AUX device for an MST port's parent</div><div class='add'>+ * @port: MST port whose parent's AUX device is returned</div><div class='add'>+ *</div><div class='add'>+ * Return the AUX device for @port's parent or NULL if port's parent is the</div><div class='add'>+ * root port.</div><div class='add'>+ */</div><div class='add'>+struct drm_dp_aux *drm_dp_mst_aux_for_parent(struct drm_dp_mst_port *port)</div><div class='add'>+{</div><div class='add'>+	if (!port-&gt;parent || !port-&gt;parent-&gt;port_parent)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return &amp;port-&gt;parent-&gt;port_parent-&gt;aux;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_dp_mst_aux_for_parent);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * drm_dp_mst_dsc_aux_for_port() - Find the correct aux for DSC</div><div class='ctx'>  * @port: The port to check. A leaf of the MST tree with an attached display.</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology_internal.h b/drivers/gpu/drm/display/drm_dp_mst_topology_internal.h<br/>index a785ccbfdd73..f41c34e26be2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_mst_topology_internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_mst_topology_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_mst_topology_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/drm_dp_mst_topology_internal.h</a></div><div class='hunk'>@@ -10,7 +10,9 @@</div><div class='ctx'> #ifndef _DRM_DP_MST_HELPER_INTERNAL_H_</div><div class='ctx'> #define _DRM_DP_MST_HELPER_INTERNAL_H_</div><div class='ctx'> </div><div class='del'>-#include &lt;drm/display/drm_dp_mst_helper.h&gt;</div><div class='add'>+struct drm_dp_sideband_msg_req_body;</div><div class='add'>+struct drm_dp_sideband_msg_tx;</div><div class='add'>+struct drm_printer;</div><div class='ctx'> </div><div class='ctx'> void</div><div class='ctx'> drm_dp_encode_sideband_req(const struct drm_dp_sideband_msg_req_body *req,</div><div class='head'>diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c b/drivers/gpu/drm/display/drm_dp_tunnel.c<br/>index 120e0de674c1..48b2df120086 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_tunnel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/display/drm_dp_tunnel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/display/drm_dp_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/display/drm_dp_tunnel.c</a></div><div class='hunk'>@@ -191,7 +191,7 @@ struct drm_dp_tunnel_mgr {</div><div class='ctx'> 	struct drm_dp_tunnel_group *groups;</div><div class='ctx'> 	wait_queue_head_t bw_req_queue;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE</div><div class='add'>+#ifdef CONFIG_DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG</div><div class='ctx'> 	struct ref_tracker_dir ref_tracker;</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='hunk'>@@ -385,7 +385,7 @@ static void tunnel_put(struct drm_dp_tunnel *tunnel)</div><div class='ctx'> 	kref_put(&amp;tunnel-&gt;kref, free_tunnel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE</div><div class='add'>+#ifdef CONFIG_DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG</div><div class='ctx'> static void track_tunnel_ref(struct drm_dp_tunnel *tunnel,</div><div class='ctx'> 			     struct ref_tracker **tracker)</div><div class='ctx'> {</div><div class='hunk'>@@ -436,8 +436,8 @@ EXPORT_SYMBOL(drm_dp_tunnel_get);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * drm_dp_tunnel_put - Put a reference for a DP tunnel</div><div class='del'>- * @tunnel - Tunnel object</div><div class='del'>- * @tracker - Debug tracker for the reference</div><div class='add'>+ * @tunnel: Tunnel object</div><div class='add'>+ * @tracker: Debug tracker for the reference</div><div class='ctx'>  *</div><div class='ctx'>  * Put a reference for @tunnel along with its debug *@tracker, which</div><div class='ctx'>  * was obtained with drm_dp_tunnel_get().</div><div class='hunk'>@@ -1170,7 +1170,7 @@ int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw)</div><div class='ctx'> EXPORT_SYMBOL(drm_dp_tunnel_alloc_bw);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * drm_dp_tunnel_atomic_get_allocated_bw - Get the BW allocated for a DP tunnel</div><div class='add'>+ * drm_dp_tunnel_get_allocated_bw - Get the BW allocated for a DP tunnel</div><div class='ctx'>  * @tunnel: Tunnel object</div><div class='ctx'>  *</div><div class='ctx'>  * Get the current BW allocated for @tunnel. After the tunnel is created /</div><div class='hunk'>@@ -1603,7 +1603,7 @@ static void cleanup_group(struct drm_dp_tunnel_group *group)</div><div class='ctx'> 	drm_atomic_private_obj_fini(&amp;group-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE</div><div class='add'>+#ifdef CONFIG_DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG</div><div class='ctx'> static void check_unique_stream_ids(const struct drm_dp_tunnel_group_state *group_state)</div><div class='ctx'> {</div><div class='ctx'> 	const struct drm_dp_tunnel_state *tunnel_state;</div><div class='hunk'>@@ -1881,7 +1881,7 @@ static void destroy_mgr(struct drm_dp_tunnel_mgr *mgr)</div><div class='ctx'> 		drm_WARN_ON(mgr-&gt;dev, !list_empty(&amp;mgr-&gt;groups[i].tunnels));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE</div><div class='add'>+#ifdef CONFIG_DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG</div><div class='ctx'> 	ref_tracker_dir_exit(&amp;mgr-&gt;ref_tracker);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1892,6 +1892,7 @@ static void destroy_mgr(struct drm_dp_tunnel_mgr *mgr)</div><div class='ctx'> /**</div><div class='ctx'>  * drm_dp_tunnel_mgr_create - Create a DP tunnel manager</div><div class='ctx'>  * @dev: DRM device object</div><div class='add'>+ * @max_group_count: Maximum number of tunnel groups</div><div class='ctx'>  *</div><div class='ctx'>  * Creates a DP tunnel manager for @dev.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1918,7 +1919,7 @@ drm_dp_tunnel_mgr_create(struct drm_device *dev, int max_group_count)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE</div><div class='add'>+#ifdef CONFIG_DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG</div><div class='ctx'> 	ref_tracker_dir_init(&amp;mgr-&gt;ref_tracker, 16, "dptun");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c<br/>index 39ef0a6addeb..fb97b51b38f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_atomic_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_atomic_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_atomic_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_atomic_helper.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;drm/drm_drv.h&gt;</div><div class='ctx'> #include &lt;drm/drm_framebuffer.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_atomic_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_panic.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> #include &lt;drm/drm_self_refresh_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_vblank.h&gt;</div><div class='hunk'>@@ -3016,6 +3017,7 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state,</div><div class='ctx'> 				  bool stall)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='ctx'> 	struct drm_connector_state *old_conn_state, *new_conn_state;</div><div class='ctx'> 	struct drm_crtc *crtc;</div><div class='hunk'>@@ -3099,6 +3101,7 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	drm_panic_lock(state-&gt;dev, flags);</div><div class='ctx'> 	for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {</div><div class='ctx'> 		WARN_ON(plane-&gt;state != old_plane_state);</div><div class='ctx'> </div><div class='hunk'>@@ -3108,6 +3111,7 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state,</div><div class='ctx'> 		state-&gt;planes[i].state = old_plane_state;</div><div class='ctx'> 		plane-&gt;state = new_plane_state;</div><div class='ctx'> 	}</div><div class='add'>+	drm_panic_unlock(state-&gt;dev, flags);</div><div class='ctx'> </div><div class='ctx'> 	for_each_oldnew_private_obj_in_state(state, obj, old_obj_state, new_obj_state, i) {</div><div class='ctx'> 		WARN_ON(obj-&gt;state != old_obj_state);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c<br/>index 29d4940188d4..fc16fddee5c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_atomic_uapi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_atomic_uapi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_atomic_uapi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_atomic_uapi.c</a></div><div class='hunk'>@@ -145,10 +145,10 @@ int drm_atomic_set_mode_prop_for_crtc(struct drm_crtc_state *state,</div><div class='ctx'> 					     &amp;state-&gt;mode, blob-&gt;data);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			drm_dbg_atomic(crtc-&gt;dev,</div><div class='del'>-				       "[CRTC:%d:%s] invalid mode (ret=%d, status=%s):\n",</div><div class='add'>+				       "[CRTC:%d:%s] invalid mode (%s, %pe): " DRM_MODE_FMT "\n",</div><div class='ctx'> 				       crtc-&gt;base.id, crtc-&gt;name,</div><div class='del'>-				       ret, drm_get_mode_status_name(state-&gt;mode.status));</div><div class='del'>-			drm_mode_debug_printmodeline(&amp;state-&gt;mode);</div><div class='add'>+				       drm_get_mode_status_name(state-&gt;mode.status),</div><div class='add'>+				       ERR_PTR(ret), DRM_MODE_ARG(&amp;state-&gt;mode));</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c<br/>index 521a71c61b16..28abe9aa99ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_bridge.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_bridge.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_bridge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_bridge.c</a></div><div class='hunk'>@@ -657,6 +657,13 @@ static void drm_atomic_bridge_call_post_disable(struct drm_bridge *bridge,</div><div class='ctx'>  * bridge will be called before the previous one to reverse the @pre_enable</div><div class='ctx'>  * calling direction.</div><div class='ctx'>  *</div><div class='add'>+ * Example:</div><div class='add'>+ * Bridge A ---&gt; Bridge B ---&gt; Bridge C ---&gt; Bridge D ---&gt; Bridge E</div><div class='add'>+ *</div><div class='add'>+ * With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting</div><div class='add'>+ * @post_disable order would be,</div><div class='add'>+ * Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.</div><div class='add'>+ *</div><div class='ctx'>  * Note: the bridge passed should be the one closest to the encoder</div><div class='ctx'>  */</div><div class='ctx'> void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge,</div><div class='hunk'>@@ -687,11 +694,17 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge,</div><div class='ctx'> 				 */</div><div class='ctx'> 				list_for_each_entry_from(next, &amp;encoder-&gt;bridge_chain,</div><div class='ctx'> 							 chain_node) {</div><div class='del'>-					if (next-&gt;pre_enable_prev_first) {</div><div class='add'>+					if (!next-&gt;pre_enable_prev_first) {</div><div class='ctx'> 						next = list_prev_entry(next, chain_node);</div><div class='ctx'> 						limit = next;</div><div class='ctx'> 						break;</div><div class='ctx'> 					}</div><div class='add'>+</div><div class='add'>+					if (list_is_last(&amp;next-&gt;chain_node,</div><div class='add'>+							 &amp;encoder-&gt;bridge_chain)) {</div><div class='add'>+						limit = next;</div><div class='add'>+						break;</div><div class='add'>+					}</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				/* Call these bridges in reverse order */</div><div class='hunk'>@@ -747,6 +760,13 @@ static void drm_atomic_bridge_call_pre_enable(struct drm_bridge *bridge,</div><div class='ctx'>  * If a bridge sets @pre_enable_prev_first, then the pre_enable for the</div><div class='ctx'>  * prev bridge will be called before pre_enable of this bridge.</div><div class='ctx'>  *</div><div class='add'>+ * Example:</div><div class='add'>+ * Bridge A ---&gt; Bridge B ---&gt; Bridge C ---&gt; Bridge D ---&gt; Bridge E</div><div class='add'>+ *</div><div class='add'>+ * With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting</div><div class='add'>+ * @pre_enable order would be,</div><div class='add'>+ * Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.</div><div class='add'>+ *</div><div class='ctx'>  * Note: the bridge passed should be the one closest to the encoder</div><div class='ctx'>  */</div><div class='ctx'> void drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge,</div><div class='hunk'>@@ -774,7 +794,7 @@ void drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge,</div><div class='ctx'> 					/* Found first bridge that does NOT</div><div class='ctx'> 					 * request prev to be enabled first</div><div class='ctx'> 					 */</div><div class='del'>-					limit = list_prev_entry(next, chain_node);</div><div class='add'>+					limit = next;</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c<br/>index 5ebdd6f8f36e..284ebae71cc4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_buddy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_buddy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_buddy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_buddy.c</a></div><div class='hunk'>@@ -57,6 +57,16 @@ static void list_insert_sorted(struct drm_buddy *mm,</div><div class='ctx'> 	__list_add(&amp;block-&gt;link, node-&gt;link.prev, &amp;node-&gt;link);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void clear_reset(struct drm_buddy_block *block)</div><div class='add'>+{</div><div class='add'>+	block-&gt;header &amp;= ~DRM_BUDDY_HEADER_CLEAR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mark_cleared(struct drm_buddy_block *block)</div><div class='add'>+{</div><div class='add'>+	block-&gt;header |= DRM_BUDDY_HEADER_CLEAR;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mark_allocated(struct drm_buddy_block *block)</div><div class='ctx'> {</div><div class='ctx'> 	block-&gt;header &amp;= ~DRM_BUDDY_HEADER_STATE;</div><div class='hunk'>@@ -82,6 +92,133 @@ static void mark_split(struct drm_buddy_block *block)</div><div class='ctx'> 	list_del(&amp;block-&gt;link);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool overlaps(u64 s1, u64 e1, u64 s2, u64 e2)</div><div class='add'>+{</div><div class='add'>+	return s1 &lt;= e2 &amp;&amp; e1 &gt;= s2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool contains(u64 s1, u64 e1, u64 s2, u64 e2)</div><div class='add'>+{</div><div class='add'>+	return s1 &lt;= s2 &amp;&amp; e1 &gt;= e2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_buddy_block *</div><div class='add'>+__get_buddy(struct drm_buddy_block *block)</div><div class='add'>+{</div><div class='add'>+	struct drm_buddy_block *parent;</div><div class='add'>+</div><div class='add'>+	parent = block-&gt;parent;</div><div class='add'>+	if (!parent)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (parent-&gt;left == block)</div><div class='add'>+		return parent-&gt;right;</div><div class='add'>+</div><div class='add'>+	return parent-&gt;left;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int __drm_buddy_free(struct drm_buddy *mm,</div><div class='add'>+				     struct drm_buddy_block *block,</div><div class='add'>+				     bool force_merge)</div><div class='add'>+{</div><div class='add'>+	struct drm_buddy_block *parent;</div><div class='add'>+	unsigned int order;</div><div class='add'>+</div><div class='add'>+	while ((parent = block-&gt;parent)) {</div><div class='add'>+		struct drm_buddy_block *buddy;</div><div class='add'>+</div><div class='add'>+		buddy = __get_buddy(block);</div><div class='add'>+</div><div class='add'>+		if (!drm_buddy_block_is_free(buddy))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (!force_merge) {</div><div class='add'>+			/*</div><div class='add'>+			 * Check the block and its buddy clear state and exit</div><div class='add'>+			 * the loop if they both have the dissimilar state.</div><div class='add'>+			 */</div><div class='add'>+			if (drm_buddy_block_is_clear(block) !=</div><div class='add'>+			    drm_buddy_block_is_clear(buddy))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (drm_buddy_block_is_clear(block))</div><div class='add'>+				mark_cleared(parent);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		list_del(&amp;buddy-&gt;link);</div><div class='add'>+		if (force_merge &amp;&amp; drm_buddy_block_is_clear(buddy))</div><div class='add'>+			mm-&gt;clear_avail -= drm_buddy_block_size(mm, buddy);</div><div class='add'>+</div><div class='add'>+		drm_block_free(mm, block);</div><div class='add'>+		drm_block_free(mm, buddy);</div><div class='add'>+</div><div class='add'>+		block = parent;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	order = drm_buddy_block_order(block);</div><div class='add'>+	mark_free(mm, block);</div><div class='add'>+</div><div class='add'>+	return order;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __force_merge(struct drm_buddy *mm,</div><div class='add'>+			 u64 start,</div><div class='add'>+			 u64 end,</div><div class='add'>+			 unsigned int min_order)</div><div class='add'>+{</div><div class='add'>+	unsigned int order;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!min_order)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (min_order &gt; mm-&gt;max_order)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = min_order - 1; i &gt;= 0; i--) {</div><div class='add'>+		struct drm_buddy_block *block, *prev;</div><div class='add'>+</div><div class='add'>+		list_for_each_entry_safe_reverse(block, prev, &amp;mm-&gt;free_list[i], link) {</div><div class='add'>+			struct drm_buddy_block *buddy;</div><div class='add'>+			u64 block_start, block_end;</div><div class='add'>+</div><div class='add'>+			if (!block-&gt;parent)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			block_start = drm_buddy_block_offset(block);</div><div class='add'>+			block_end = block_start + drm_buddy_block_size(mm, block) - 1;</div><div class='add'>+</div><div class='add'>+			if (!contains(start, end, block_start, block_end))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			buddy = __get_buddy(block);</div><div class='add'>+			if (!drm_buddy_block_is_free(buddy))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			WARN_ON(drm_buddy_block_is_clear(block) ==</div><div class='add'>+				drm_buddy_block_is_clear(buddy));</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * If the prev block is same as buddy, don't access the</div><div class='add'>+			 * block in the next iteration as we would free the</div><div class='add'>+			 * buddy block as part of the free function.</div><div class='add'>+			 */</div><div class='add'>+			if (prev == buddy)</div><div class='add'>+				prev = list_prev_entry(prev, link);</div><div class='add'>+</div><div class='add'>+			list_del(&amp;block-&gt;link);</div><div class='add'>+			if (drm_buddy_block_is_clear(block))</div><div class='add'>+				mm-&gt;clear_avail -= drm_buddy_block_size(mm, block);</div><div class='add'>+</div><div class='add'>+			order = __drm_buddy_free(mm, block, true);</div><div class='add'>+			if (order &gt;= min_order)</div><div class='add'>+				return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * drm_buddy_init - init memory manager</div><div class='ctx'>  *</div><div class='hunk'>@@ -186,11 +323,21 @@ EXPORT_SYMBOL(drm_buddy_init);</div><div class='ctx'>  */</div><div class='ctx'> void drm_buddy_fini(struct drm_buddy *mm)</div><div class='ctx'> {</div><div class='add'>+	u64 root_size, size;</div><div class='add'>+	unsigned int order;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	size = mm-&gt;size;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; mm-&gt;n_roots; ++i) {</div><div class='add'>+		order = ilog2(size) - ilog2(mm-&gt;chunk_size);</div><div class='add'>+		__force_merge(mm, 0, size, order);</div><div class='add'>+</div><div class='ctx'> 		WARN_ON(!drm_buddy_block_is_free(mm-&gt;roots[i]));</div><div class='ctx'> 		drm_block_free(mm, mm-&gt;roots[i]);</div><div class='add'>+</div><div class='add'>+		root_size = mm-&gt;chunk_size &lt;&lt; order;</div><div class='add'>+		size -= root_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(mm-&gt;avail != mm-&gt;size);</div><div class='hunk'>@@ -223,26 +370,17 @@ static int split_block(struct drm_buddy *mm,</div><div class='ctx'> 	mark_free(mm, block-&gt;left);</div><div class='ctx'> 	mark_free(mm, block-&gt;right);</div><div class='ctx'> </div><div class='add'>+	if (drm_buddy_block_is_clear(block)) {</div><div class='add'>+		mark_cleared(block-&gt;left);</div><div class='add'>+		mark_cleared(block-&gt;right);</div><div class='add'>+		clear_reset(block);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mark_split(block);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct drm_buddy_block *</div><div class='del'>-__get_buddy(struct drm_buddy_block *block)</div><div class='del'>-{</div><div class='del'>-	struct drm_buddy_block *parent;</div><div class='del'>-</div><div class='del'>-	parent = block-&gt;parent;</div><div class='del'>-	if (!parent)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (parent-&gt;left == block)</div><div class='del'>-		return parent-&gt;right;</div><div class='del'>-</div><div class='del'>-	return parent-&gt;left;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * drm_get_buddy - get buddy address</div><div class='ctx'>  *</div><div class='hunk'>@@ -260,30 +398,6 @@ drm_get_buddy(struct drm_buddy_block *block)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_get_buddy);</div><div class='ctx'> </div><div class='del'>-static void __drm_buddy_free(struct drm_buddy *mm,</div><div class='del'>-			     struct drm_buddy_block *block)</div><div class='del'>-{</div><div class='del'>-	struct drm_buddy_block *parent;</div><div class='del'>-</div><div class='del'>-	while ((parent = block-&gt;parent)) {</div><div class='del'>-		struct drm_buddy_block *buddy;</div><div class='del'>-</div><div class='del'>-		buddy = __get_buddy(block);</div><div class='del'>-</div><div class='del'>-		if (!drm_buddy_block_is_free(buddy))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		list_del(&amp;buddy-&gt;link);</div><div class='del'>-</div><div class='del'>-		drm_block_free(mm, block);</div><div class='del'>-		drm_block_free(mm, buddy);</div><div class='del'>-</div><div class='del'>-		block = parent;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mark_free(mm, block);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * drm_buddy_free_block - free a block</div><div class='ctx'>  *</div><div class='hunk'>@@ -295,42 +409,74 @@ void drm_buddy_free_block(struct drm_buddy *mm,</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(!drm_buddy_block_is_allocated(block));</div><div class='ctx'> 	mm-&gt;avail += drm_buddy_block_size(mm, block);</div><div class='del'>-	__drm_buddy_free(mm, block);</div><div class='add'>+	if (drm_buddy_block_is_clear(block))</div><div class='add'>+		mm-&gt;clear_avail += drm_buddy_block_size(mm, block);</div><div class='add'>+</div><div class='add'>+	__drm_buddy_free(mm, block, false);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_buddy_free_block);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * drm_buddy_free_list - free blocks</div><div class='del'>- *</div><div class='del'>- * @mm: DRM buddy manager</div><div class='del'>- * @objects: input list head to free blocks</div><div class='del'>- */</div><div class='del'>-void drm_buddy_free_list(struct drm_buddy *mm, struct list_head *objects)</div><div class='add'>+static void __drm_buddy_free_list(struct drm_buddy *mm,</div><div class='add'>+				  struct list_head *objects,</div><div class='add'>+				  bool mark_clear,</div><div class='add'>+				  bool mark_dirty)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_buddy_block *block, *on;</div><div class='ctx'> </div><div class='add'>+	WARN_ON(mark_dirty &amp;&amp; mark_clear);</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry_safe(block, on, objects, link) {</div><div class='add'>+		if (mark_clear)</div><div class='add'>+			mark_cleared(block);</div><div class='add'>+		else if (mark_dirty)</div><div class='add'>+			clear_reset(block);</div><div class='ctx'> 		drm_buddy_free_block(mm, block);</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='ctx'> 	INIT_LIST_HEAD(objects);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(drm_buddy_free_list);</div><div class='ctx'> </div><div class='del'>-static inline bool overlaps(u64 s1, u64 e1, u64 s2, u64 e2)</div><div class='add'>+static void drm_buddy_free_list_internal(struct drm_buddy *mm,</div><div class='add'>+					 struct list_head *objects)</div><div class='ctx'> {</div><div class='del'>-	return s1 &lt;= e2 &amp;&amp; e1 &gt;= s2;</div><div class='add'>+	/*</div><div class='add'>+	 * Don't touch the clear/dirty bit, since allocation is still internal</div><div class='add'>+	 * at this point. For example we might have just failed part of the</div><div class='add'>+	 * allocation.</div><div class='add'>+	 */</div><div class='add'>+	__drm_buddy_free_list(mm, objects, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool contains(u64 s1, u64 e1, u64 s2, u64 e2)</div><div class='add'>+/**</div><div class='add'>+ * drm_buddy_free_list - free blocks</div><div class='add'>+ *</div><div class='add'>+ * @mm: DRM buddy manager</div><div class='add'>+ * @objects: input list head to free blocks</div><div class='add'>+ * @flags: optional flags like DRM_BUDDY_CLEARED</div><div class='add'>+ */</div><div class='add'>+void drm_buddy_free_list(struct drm_buddy *mm,</div><div class='add'>+			 struct list_head *objects,</div><div class='add'>+			 unsigned int flags)</div><div class='ctx'> {</div><div class='del'>-	return s1 &lt;= s2 &amp;&amp; e1 &gt;= e2;</div><div class='add'>+	bool mark_clear = flags &amp; DRM_BUDDY_CLEARED;</div><div class='add'>+</div><div class='add'>+	__drm_buddy_free_list(mm, objects, mark_clear, !mark_clear);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_buddy_free_list);</div><div class='add'>+</div><div class='add'>+static bool block_incompatible(struct drm_buddy_block *block, unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	bool needs_clear = flags &amp; DRM_BUDDY_CLEAR_ALLOCATION;</div><div class='add'>+</div><div class='add'>+	return needs_clear != drm_buddy_block_is_clear(block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct drm_buddy_block *</div><div class='del'>-alloc_range_bias(struct drm_buddy *mm,</div><div class='del'>-		 u64 start, u64 end,</div><div class='del'>-		 unsigned int order)</div><div class='add'>+__alloc_range_bias(struct drm_buddy *mm,</div><div class='add'>+		   u64 start, u64 end,</div><div class='add'>+		   unsigned int order,</div><div class='add'>+		   unsigned long flags,</div><div class='add'>+		   bool fallback)</div><div class='ctx'> {</div><div class='ctx'> 	u64 req_size = mm-&gt;chunk_size &lt;&lt; order;</div><div class='ctx'> 	struct drm_buddy_block *block;</div><div class='hunk'>@@ -379,6 +525,9 @@ alloc_range_bias(struct drm_buddy *mm,</div><div class='ctx'> </div><div class='ctx'> 		if (contains(start, end, block_start, block_end) &amp;&amp;</div><div class='ctx'> 		    order == drm_buddy_block_order(block)) {</div><div class='add'>+			if (!fallback &amp;&amp; block_incompatible(block, flags))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Find the free block within the range.</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -410,30 +559,57 @@ err_undo:</div><div class='ctx'> 	if (buddy &amp;&amp;</div><div class='ctx'> 	    (drm_buddy_block_is_free(block) &amp;&amp;</div><div class='ctx'> 	     drm_buddy_block_is_free(buddy)))</div><div class='del'>-		__drm_buddy_free(mm, block);</div><div class='add'>+		__drm_buddy_free(mm, block, false);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct drm_buddy_block *</div><div class='del'>-get_maxblock(struct drm_buddy *mm, unsigned int order)</div><div class='add'>+__drm_buddy_alloc_range_bias(struct drm_buddy *mm,</div><div class='add'>+			     u64 start, u64 end,</div><div class='add'>+			     unsigned int order,</div><div class='add'>+			     unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	struct drm_buddy_block *block;</div><div class='add'>+	bool fallback = false;</div><div class='add'>+</div><div class='add'>+	block = __alloc_range_bias(mm, start, end, order,</div><div class='add'>+				   flags, fallback);</div><div class='add'>+	if (IS_ERR(block) &amp;&amp; mm-&gt;clear_avail)</div><div class='add'>+		return __alloc_range_bias(mm, start, end, order,</div><div class='add'>+					  flags, !fallback);</div><div class='add'>+</div><div class='add'>+	return block;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_buddy_block *</div><div class='add'>+get_maxblock(struct drm_buddy *mm, unsigned int order,</div><div class='add'>+	     unsigned long flags)</div><div class='ctx'> {</div><div class='del'>-	struct drm_buddy_block *max_block = NULL, *node;</div><div class='add'>+	struct drm_buddy_block *max_block = NULL, *block = NULL;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = order; i &lt;= mm-&gt;max_order; ++i) {</div><div class='del'>-		if (!list_empty(&amp;mm-&gt;free_list[i])) {</div><div class='del'>-			node = list_last_entry(&amp;mm-&gt;free_list[i],</div><div class='del'>-					       struct drm_buddy_block,</div><div class='del'>-					       link);</div><div class='del'>-			if (!max_block) {</div><div class='del'>-				max_block = node;</div><div class='add'>+		struct drm_buddy_block *tmp_block;</div><div class='add'>+</div><div class='add'>+		list_for_each_entry_reverse(tmp_block, &amp;mm-&gt;free_list[i], link) {</div><div class='add'>+			if (block_incompatible(tmp_block, flags))</div><div class='ctx'> 				continue;</div><div class='del'>-			}</div><div class='ctx'> </div><div class='del'>-			if (drm_buddy_block_offset(node) &gt;</div><div class='del'>-			    drm_buddy_block_offset(max_block)) {</div><div class='del'>-				max_block = node;</div><div class='del'>-			}</div><div class='add'>+			block = tmp_block;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!block)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!max_block) {</div><div class='add'>+			max_block = block;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (drm_buddy_block_offset(block) &gt;</div><div class='add'>+		    drm_buddy_block_offset(max_block)) {</div><div class='add'>+			max_block = block;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -450,12 +626,30 @@ alloc_from_freelist(struct drm_buddy *mm,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; DRM_BUDDY_TOPDOWN_ALLOCATION) {</div><div class='del'>-		block = get_maxblock(mm, order);</div><div class='add'>+		block = get_maxblock(mm, order, flags);</div><div class='ctx'> 		if (block)</div><div class='ctx'> 			/* Store the obtained block order */</div><div class='ctx'> 			tmp = drm_buddy_block_order(block);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (tmp = order; tmp &lt;= mm-&gt;max_order; ++tmp) {</div><div class='add'>+			struct drm_buddy_block *tmp_block;</div><div class='add'>+</div><div class='add'>+			list_for_each_entry_reverse(tmp_block, &amp;mm-&gt;free_list[tmp], link) {</div><div class='add'>+				if (block_incompatible(tmp_block, flags))</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				block = tmp_block;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (block)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!block) {</div><div class='add'>+		/* Fallback method */</div><div class='add'>+		for (tmp = order; tmp &lt;= mm-&gt;max_order; ++tmp) {</div><div class='ctx'> 			if (!list_empty(&amp;mm-&gt;free_list[tmp])) {</div><div class='ctx'> 				block = list_last_entry(&amp;mm-&gt;free_list[tmp],</div><div class='ctx'> 							struct drm_buddy_block,</div><div class='hunk'>@@ -464,10 +658,10 @@ alloc_from_freelist(struct drm_buddy *mm,</div><div class='ctx'> 					break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (!block)</div><div class='del'>-		return ERR_PTR(-ENOSPC);</div><div class='add'>+		if (!block)</div><div class='add'>+			return ERR_PTR(-ENOSPC);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!drm_buddy_block_is_free(block));</div><div class='ctx'> </div><div class='hunk'>@@ -483,7 +677,7 @@ alloc_from_freelist(struct drm_buddy *mm,</div><div class='ctx'> </div><div class='ctx'> err_undo:</div><div class='ctx'> 	if (tmp != order)</div><div class='del'>-		__drm_buddy_free(mm, block);</div><div class='add'>+		__drm_buddy_free(mm, block, false);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -526,16 +720,18 @@ static int __alloc_range(struct drm_buddy *mm,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (contains(start, end, block_start, block_end)) {</div><div class='del'>-			if (!drm_buddy_block_is_free(block)) {</div><div class='add'>+			if (drm_buddy_block_is_free(block)) {</div><div class='add'>+				mark_allocated(block);</div><div class='add'>+				total_allocated += drm_buddy_block_size(mm, block);</div><div class='add'>+				mm-&gt;avail -= drm_buddy_block_size(mm, block);</div><div class='add'>+				if (drm_buddy_block_is_clear(block))</div><div class='add'>+					mm-&gt;clear_avail -= drm_buddy_block_size(mm, block);</div><div class='add'>+				list_add_tail(&amp;block-&gt;link, &amp;allocated);</div><div class='add'>+				continue;</div><div class='add'>+			} else if (!mm-&gt;clear_avail) {</div><div class='ctx'> 				err = -ENOSPC;</div><div class='ctx'> 				goto err_free;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-			mark_allocated(block);</div><div class='del'>-			total_allocated += drm_buddy_block_size(mm, block);</div><div class='del'>-			mm-&gt;avail -= drm_buddy_block_size(mm, block);</div><div class='del'>-			list_add_tail(&amp;block-&gt;link, &amp;allocated);</div><div class='del'>-			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!drm_buddy_block_is_split(block)) {</div><div class='hunk'>@@ -567,14 +763,14 @@ err_undo:</div><div class='ctx'> 	if (buddy &amp;&amp;</div><div class='ctx'> 	    (drm_buddy_block_is_free(block) &amp;&amp;</div><div class='ctx'> 	     drm_buddy_block_is_free(buddy)))</div><div class='del'>-		__drm_buddy_free(mm, block);</div><div class='add'>+		__drm_buddy_free(mm, block, false);</div><div class='ctx'> </div><div class='ctx'> err_free:</div><div class='ctx'> 	if (err == -ENOSPC &amp;&amp; total_allocated_on_err) {</div><div class='ctx'> 		list_splice_tail(&amp;allocated, blocks);</div><div class='ctx'> 		*total_allocated_on_err = total_allocated;</div><div class='ctx'> 	} else {</div><div class='del'>-		drm_buddy_free_list(mm, &amp;allocated);</div><div class='add'>+		drm_buddy_free_list_internal(mm, &amp;allocated);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -640,11 +836,11 @@ static int __alloc_contig_try_harder(struct drm_buddy *mm,</div><div class='ctx'> 			list_splice(&amp;blocks_lhs, blocks);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		} else if (err != -ENOSPC) {</div><div class='del'>-			drm_buddy_free_list(mm, blocks);</div><div class='add'>+			drm_buddy_free_list_internal(mm, blocks);</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Free blocks for the next iteration */</div><div class='del'>-		drm_buddy_free_list(mm, blocks);</div><div class='add'>+		drm_buddy_free_list_internal(mm, blocks);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return -ENOSPC;</div><div class='hunk'>@@ -700,6 +896,8 @@ int drm_buddy_block_trim(struct drm_buddy *mm,</div><div class='ctx'> 	list_del(&amp;block-&gt;link);</div><div class='ctx'> 	mark_free(mm, block);</div><div class='ctx'> 	mm-&gt;avail += drm_buddy_block_size(mm, block);</div><div class='add'>+	if (drm_buddy_block_is_clear(block))</div><div class='add'>+		mm-&gt;clear_avail += drm_buddy_block_size(mm, block);</div><div class='ctx'> </div><div class='ctx'> 	/* Prevent recursively freeing this node */</div><div class='ctx'> 	parent = block-&gt;parent;</div><div class='hunk'>@@ -711,6 +909,8 @@ int drm_buddy_block_trim(struct drm_buddy *mm,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mark_allocated(block);</div><div class='ctx'> 		mm-&gt;avail -= drm_buddy_block_size(mm, block);</div><div class='add'>+		if (drm_buddy_block_is_clear(block))</div><div class='add'>+			mm-&gt;clear_avail -= drm_buddy_block_size(mm, block);</div><div class='ctx'> 		list_add(&amp;block-&gt;link, blocks);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -719,13 +919,28 @@ int drm_buddy_block_trim(struct drm_buddy *mm,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_buddy_block_trim);</div><div class='ctx'> </div><div class='add'>+static struct drm_buddy_block *</div><div class='add'>+__drm_buddy_alloc_blocks(struct drm_buddy *mm,</div><div class='add'>+			 u64 start, u64 end,</div><div class='add'>+			 unsigned int order,</div><div class='add'>+			 unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	if (flags &amp; DRM_BUDDY_RANGE_ALLOCATION)</div><div class='add'>+		/* Allocate traversing within the range */</div><div class='add'>+		return  __drm_buddy_alloc_range_bias(mm, start, end,</div><div class='add'>+						     order, flags);</div><div class='add'>+	else</div><div class='add'>+		/* Allocate from freelist */</div><div class='add'>+		return alloc_from_freelist(mm, order, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * drm_buddy_alloc_blocks - allocate power-of-two blocks</div><div class='ctx'>  *</div><div class='ctx'>  * @mm: DRM buddy manager to allocate from</div><div class='ctx'>  * @start: start of the allowed range for this block</div><div class='ctx'>  * @end: end of the allowed range for this block</div><div class='del'>- * @size: size of the allocation</div><div class='add'>+ * @size: size of the allocation in bytes</div><div class='ctx'>  * @min_block_size: alignment of the allocation</div><div class='ctx'>  * @blocks: output list head to add allocated blocks</div><div class='ctx'>  * @flags: DRM_BUDDY_*_ALLOCATION flags</div><div class='hunk'>@@ -800,23 +1015,33 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm,</div><div class='ctx'> 		BUG_ON(order &lt; min_order);</div><div class='ctx'> </div><div class='ctx'> 		do {</div><div class='del'>-			if (flags &amp; DRM_BUDDY_RANGE_ALLOCATION)</div><div class='del'>-				/* Allocate traversing within the range */</div><div class='del'>-				block = alloc_range_bias(mm, start, end, order);</div><div class='del'>-			else</div><div class='del'>-				/* Allocate from freelist */</div><div class='del'>-				block = alloc_from_freelist(mm, order, flags);</div><div class='del'>-</div><div class='add'>+			block = __drm_buddy_alloc_blocks(mm, start,</div><div class='add'>+							 end,</div><div class='add'>+							 order,</div><div class='add'>+							 flags);</div><div class='ctx'> 			if (!IS_ERR(block))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			if (order-- == min_order) {</div><div class='add'>+				/* Try allocation through force merge method */</div><div class='add'>+				if (mm-&gt;clear_avail &amp;&amp;</div><div class='add'>+				    !__force_merge(mm, start, end, min_order)) {</div><div class='add'>+					block = __drm_buddy_alloc_blocks(mm, start,</div><div class='add'>+									 end,</div><div class='add'>+									 min_order,</div><div class='add'>+									 flags);</div><div class='add'>+					if (!IS_ERR(block)) {</div><div class='add'>+						order = min_order;</div><div class='add'>+						break;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				/*</div><div class='add'>+				 * Try contiguous block allocation through</div><div class='add'>+				 * try harder method.</div><div class='add'>+				 */</div><div class='ctx'> 				if (flags &amp; DRM_BUDDY_CONTIGUOUS_ALLOCATION &amp;&amp;</div><div class='ctx'> 				    !(flags &amp; DRM_BUDDY_RANGE_ALLOCATION))</div><div class='del'>-					/*</div><div class='del'>-					 * Try contiguous block allocation through</div><div class='del'>-					 * try harder method</div><div class='del'>-					 */</div><div class='ctx'> 					return __alloc_contig_try_harder(mm,</div><div class='ctx'> 									 original_size,</div><div class='ctx'> 									 original_min_size,</div><div class='hunk'>@@ -828,6 +1053,8 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm,</div><div class='ctx'> </div><div class='ctx'> 		mark_allocated(block);</div><div class='ctx'> 		mm-&gt;avail -= drm_buddy_block_size(mm, block);</div><div class='add'>+		if (drm_buddy_block_is_clear(block))</div><div class='add'>+			mm-&gt;clear_avail -= drm_buddy_block_size(mm, block);</div><div class='ctx'> 		kmemleak_update_trace(block);</div><div class='ctx'> 		list_add_tail(&amp;block-&gt;link, &amp;allocated);</div><div class='ctx'> </div><div class='hunk'>@@ -866,7 +1093,7 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free:</div><div class='del'>-	drm_buddy_free_list(mm, &amp;allocated);</div><div class='add'>+	drm_buddy_free_list_internal(mm, &amp;allocated);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_buddy_alloc_blocks);</div><div class='hunk'>@@ -899,8 +1126,8 @@ void drm_buddy_print(struct drm_buddy *mm, struct drm_printer *p)</div><div class='ctx'> {</div><div class='ctx'> 	int order;</div><div class='ctx'> </div><div class='del'>-	drm_printf(p, "chunk_size: %lluKiB, total: %lluMiB, free: %lluMiB\n",</div><div class='del'>-		   mm-&gt;chunk_size &gt;&gt; 10, mm-&gt;size &gt;&gt; 20, mm-&gt;avail &gt;&gt; 20);</div><div class='add'>+	drm_printf(p, "chunk_size: %lluKiB, total: %lluMiB, free: %lluMiB, clear_free: %lluMiB\n",</div><div class='add'>+		   mm-&gt;chunk_size &gt;&gt; 10, mm-&gt;size &gt;&gt; 20, mm-&gt;avail &gt;&gt; 20, mm-&gt;clear_avail &gt;&gt; 20);</div><div class='ctx'> </div><div class='ctx'> 	for (order = mm-&gt;max_order; order &gt;= 0; order--) {</div><div class='ctx'> 		struct drm_buddy_block *block;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c<br/>index 9403b3f576f7..2803ac111bbd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_client.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_client.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_client.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_client.c</a></div><div class='hunk'>@@ -172,6 +172,18 @@ void drm_client_release(struct drm_client_dev *client)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_client_release);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * drm_client_dev_unregister - Unregister clients</div><div class='add'>+ * @dev: DRM device</div><div class='add'>+ *</div><div class='add'>+ * This function releases all clients by calling each client's</div><div class='add'>+ * &amp;drm_client_funcs.unregister callback. The callback function</div><div class='add'>+ * is responsibe for releaseing all resources including the client</div><div class='add'>+ * itself.</div><div class='add'>+ *</div><div class='add'>+ * The helper drm_dev_unregister() calls this function. Drivers</div><div class='add'>+ * that use it don't need to call this function themselves.</div><div class='add'>+ */</div><div class='ctx'> void drm_client_dev_unregister(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_client_dev *client, *tmp;</div><div class='hunk'>@@ -191,6 +203,7 @@ void drm_client_dev_unregister(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;clientlist_mutex);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(drm_client_dev_unregister);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * drm_client_dev_hotplug - Send hotplug event to clients</div><div class='hunk'>@@ -305,6 +318,66 @@ err_delete:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * drm_client_buffer_vmap_local - Map DRM client buffer into address space</div><div class='add'>+ * @buffer: DRM client buffer</div><div class='add'>+ * @map_copy: Returns the mapped memory's address</div><div class='add'>+ *</div><div class='add'>+ * This function maps a client buffer into kernel address space. If the</div><div class='add'>+ * buffer is already mapped, it returns the existing mapping's address.</div><div class='add'>+ *</div><div class='add'>+ * Client buffer mappings are not ref'counted. Each call to</div><div class='add'>+ * drm_client_buffer_vmap_local() should be closely followed by a call to</div><div class='add'>+ * drm_client_buffer_vunmap_local(). See drm_client_buffer_vmap() for</div><div class='add'>+ * long-term mappings.</div><div class='add'>+ *</div><div class='add'>+ * The returned address is a copy of the internal value. In contrast to</div><div class='add'>+ * other vmap interfaces, you don't need it for the client's vunmap</div><div class='add'>+ * function. So you can modify it at will during blit and draw operations.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *	0 on success, or a negative errno code otherwise.</div><div class='add'>+ */</div><div class='add'>+int drm_client_buffer_vmap_local(struct drm_client_buffer *buffer,</div><div class='add'>+				 struct iosys_map *map_copy)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *gem = buffer-&gt;gem;</div><div class='add'>+	struct iosys_map *map = &amp;buffer-&gt;map;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	drm_gem_lock(gem);</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_vmap(gem, map);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_drm_gem_vmap_unlocked;</div><div class='add'>+	*map_copy = *map;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_drm_gem_vmap_unlocked:</div><div class='add'>+	drm_gem_unlock(gem);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_client_buffer_vmap_local);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_client_buffer_vunmap_local - Unmap DRM client buffer</div><div class='add'>+ * @buffer: DRM client buffer</div><div class='add'>+ *</div><div class='add'>+ * This function removes a client buffer's memory mapping established</div><div class='add'>+ * with drm_client_buffer_vunmap_local(). Calling this function is only</div><div class='add'>+ * required by clients that manage their buffer mappings by themselves.</div><div class='add'>+ */</div><div class='add'>+void drm_client_buffer_vunmap_local(struct drm_client_buffer *buffer)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *gem = buffer-&gt;gem;</div><div class='add'>+	struct iosys_map *map = &amp;buffer-&gt;map;</div><div class='add'>+</div><div class='add'>+	drm_gem_vunmap(gem, map);</div><div class='add'>+	drm_gem_unlock(gem);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_client_buffer_vunmap_local);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * drm_client_buffer_vmap - Map DRM client buffer into address space</div><div class='ctx'>  * @buffer: DRM client buffer</div><div class='ctx'>  * @map_copy: Returns the mapped memory's address</div><div class='hunk'>@@ -328,24 +401,30 @@ int</div><div class='ctx'> drm_client_buffer_vmap(struct drm_client_buffer *buffer,</div><div class='ctx'> 		       struct iosys_map *map_copy)</div><div class='ctx'> {</div><div class='add'>+	struct drm_gem_object *gem = buffer-&gt;gem;</div><div class='ctx'> 	struct iosys_map *map = &amp;buffer-&gt;map;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: The dependency on GEM here isn't required, we could</div><div class='del'>-	 * convert the driver handle to a dma-buf instead and use the</div><div class='del'>-	 * backend-agnostic dma-buf vmap support instead. This would</div><div class='del'>-	 * require that the handle2fd prime ioctl is reworked to pull the</div><div class='del'>-	 * fd_install step out of the driver backend hooks, to make that</div><div class='del'>-	 * final step optional for internal users.</div><div class='del'>-	 */</div><div class='del'>-	ret = drm_gem_vmap_unlocked(buffer-&gt;gem, map);</div><div class='add'>+	drm_gem_lock(gem);</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_pin_locked(gem);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_drm_gem_pin_locked;</div><div class='add'>+	ret = drm_gem_vmap(gem, map);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_drm_gem_vmap;</div><div class='add'>+</div><div class='add'>+	drm_gem_unlock(gem);</div><div class='ctx'> </div><div class='ctx'> 	*map_copy = *map;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_drm_gem_vmap:</div><div class='add'>+	drm_gem_unpin_locked(buffer-&gt;gem);</div><div class='add'>+err_drm_gem_pin_locked:</div><div class='add'>+	drm_gem_unlock(gem);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_client_buffer_vmap);</div><div class='ctx'> </div><div class='hunk'>@@ -359,9 +438,13 @@ EXPORT_SYMBOL(drm_client_buffer_vmap);</div><div class='ctx'>  */</div><div class='ctx'> void drm_client_buffer_vunmap(struct drm_client_buffer *buffer)</div><div class='ctx'> {</div><div class='add'>+	struct drm_gem_object *gem = buffer-&gt;gem;</div><div class='ctx'> 	struct iosys_map *map = &amp;buffer-&gt;map;</div><div class='ctx'> </div><div class='del'>-	drm_gem_vunmap_unlocked(buffer-&gt;gem, map);</div><div class='add'>+	drm_gem_lock(gem);</div><div class='add'>+	drm_gem_vunmap(gem, map);</div><div class='add'>+	drm_gem_unpin_locked(gem);</div><div class='add'>+	drm_gem_unlock(gem);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_client_buffer_vunmap);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_client_modeset.c b/drivers/gpu/drm/drm_client_modeset.c<br/>index 0683a129b362..31af5cf37a09 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_client_modeset.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_client_modeset.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_client_modeset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_client_modeset.c</a></div><div class='hunk'>@@ -242,8 +242,10 @@ static void drm_client_connectors_enabled(struct drm_connector **connectors,</div><div class='ctx'> 	for (i = 0; i &lt; connector_count; i++) {</div><div class='ctx'> 		connector = connectors[i];</div><div class='ctx'> 		enabled[i] = drm_connector_enabled(connector, true);</div><div class='del'>-		DRM_DEBUG_KMS("connector %d enabled? %s\n", connector-&gt;base.id,</div><div class='del'>-			      connector-&gt;display_info.non_desktop ? "non desktop" : str_yes_no(enabled[i]));</div><div class='add'>+		drm_dbg_kms(connector-&gt;dev, "[CONNECTOR:%d:%s] enabled? %s\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+			    connector-&gt;display_info.non_desktop ?</div><div class='add'>+			    "non desktop" : str_yes_no(enabled[i]));</div><div class='ctx'> </div><div class='ctx'> 		any_enabled |= enabled[i];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -303,7 +305,7 @@ static bool drm_client_target_cloned(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (can_clone) {</div><div class='del'>-		DRM_DEBUG_KMS("can clone using command line\n");</div><div class='add'>+		drm_dbg_kms(dev, "can clone using command line\n");</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -332,15 +334,16 @@ static bool drm_client_target_cloned(struct drm_device *dev,</div><div class='ctx'> 	kfree(dmt_mode);</div><div class='ctx'> </div><div class='ctx'> 	if (can_clone) {</div><div class='del'>-		DRM_DEBUG_KMS("can clone using 1024x768\n");</div><div class='add'>+		drm_dbg_kms(dev, "can clone using 1024x768\n");</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> fail:</div><div class='del'>-	DRM_INFO("kms: can't enable cloning when we probably wanted to.\n");</div><div class='add'>+	drm_info(dev, "kms: can't enable cloning when we probably wanted to.\n");</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int drm_client_get_tile_offsets(struct drm_connector **connectors,</div><div class='add'>+static int drm_client_get_tile_offsets(struct drm_device *dev,</div><div class='add'>+				       struct drm_connector **connectors,</div><div class='ctx'> 				       unsigned int connector_count,</div><div class='ctx'> 				       struct drm_display_mode **modes,</div><div class='ctx'> 				       struct drm_client_offset *offsets,</div><div class='hunk'>@@ -357,8 +360,9 @@ static int drm_client_get_tile_offsets(struct drm_connector **connectors,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (!modes[i] &amp;&amp; (h_idx || v_idx)) {</div><div class='del'>-			DRM_DEBUG_KMS("no modes for connector tiled %d %d\n", i,</div><div class='del'>-				      connector-&gt;base.id);</div><div class='add'>+			drm_dbg_kms(dev,</div><div class='add'>+				    "[CONNECTOR:%d:%s] no modes for connector tiled %d\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name, i);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (connector-&gt;tile_h_loc &lt; h_idx)</div><div class='hunk'>@@ -369,11 +373,12 @@ static int drm_client_get_tile_offsets(struct drm_connector **connectors,</div><div class='ctx'> 	}</div><div class='ctx'> 	offsets[idx].x = hoffset;</div><div class='ctx'> 	offsets[idx].y = voffset;</div><div class='del'>-	DRM_DEBUG_KMS("returned %d %d for %d %d\n", hoffset, voffset, h_idx, v_idx);</div><div class='add'>+	drm_dbg_kms(dev, "returned %d %d for %d %d\n", hoffset, voffset, h_idx, v_idx);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool drm_client_target_preferred(struct drm_connector **connectors,</div><div class='add'>+static bool drm_client_target_preferred(struct drm_device *dev,</div><div class='add'>+					struct drm_connector **connectors,</div><div class='ctx'> 					unsigned int connector_count,</div><div class='ctx'> 					struct drm_display_mode **modes,</div><div class='ctx'> 					struct drm_client_offset *offsets,</div><div class='hunk'>@@ -423,17 +428,19 @@ retry:</div><div class='ctx'> 			 * find the tile offsets for this pass - need to find</div><div class='ctx'> 			 * all tiles left and above</div><div class='ctx'> 			 */</div><div class='del'>-			drm_client_get_tile_offsets(connectors, connector_count, modes, offsets, i,</div><div class='add'>+			drm_client_get_tile_offsets(dev, connectors, connector_count,</div><div class='add'>+						    modes, offsets, i,</div><div class='ctx'> 						    connector-&gt;tile_h_loc, connector-&gt;tile_v_loc);</div><div class='ctx'> 		}</div><div class='del'>-		DRM_DEBUG_KMS("looking for cmdline mode on connector %d\n",</div><div class='del'>-			      connector-&gt;base.id);</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] looking for cmdline mode\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 		/* got for command line mode first */</div><div class='ctx'> 		modes[i] = drm_connector_pick_cmdline_mode(connector);</div><div class='ctx'> 		if (!modes[i]) {</div><div class='del'>-			DRM_DEBUG_KMS("looking for preferred mode on connector %d %d\n",</div><div class='del'>-				      connector-&gt;base.id, connector-&gt;tile_group ? connector-&gt;tile_group-&gt;id : 0);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] looking for preferred mode, tile %d\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+				    connector-&gt;tile_group ? connector-&gt;tile_group-&gt;id : 0);</div><div class='ctx'> 			modes[i] = drm_connector_has_preferred_mode(connector, width, height);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* No preferred modes, pick one off the list */</div><div class='hunk'>@@ -455,16 +462,18 @@ retry:</div><div class='ctx'> 			    (connector-&gt;tile_h_loc == 0 &amp;&amp;</div><div class='ctx'> 			     connector-&gt;tile_v_loc == 0 &amp;&amp;</div><div class='ctx'> 			     !drm_connector_get_tiled_mode(connector))) {</div><div class='del'>-				DRM_DEBUG_KMS("Falling back to non tiled mode on Connector %d\n",</div><div class='del'>-					      connector-&gt;base.id);</div><div class='add'>+				drm_dbg_kms(dev,</div><div class='add'>+					    "[CONNECTOR:%d:%s] Falling back to non-tiled mode\n",</div><div class='add'>+					    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 				modes[i] = drm_connector_fallback_non_tiled_mode(connector);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				modes[i] = drm_connector_get_tiled_mode(connector);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		DRM_DEBUG_KMS("found mode %s\n", modes[i] ? modes[i]-&gt;name :</div><div class='del'>-			  "none");</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Found mode %s\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+			    modes[i] ? modes[i]-&gt;name : "none");</div><div class='ctx'> 		conn_configured |= BIT_ULL(i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -585,7 +594,7 @@ static bool drm_client_firmware_config(struct drm_client_dev *client,</div><div class='ctx'> 	if (!drm_drv_uses_atomic_modeset(dev))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(count &lt;= 0))</div><div class='add'>+	if (drm_WARN_ON(dev, count &lt;= 0))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	save_enabled = kcalloc(count, sizeof(bool), GFP_KERNEL);</div><div class='hunk'>@@ -624,26 +633,26 @@ retry:</div><div class='ctx'> 			num_connectors_detected++;</div><div class='ctx'> </div><div class='ctx'> 		if (!enabled[i]) {</div><div class='del'>-			DRM_DEBUG_KMS("connector %s not enabled, skipping\n",</div><div class='del'>-				      connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] not enabled, skipping\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			conn_configured |= BIT(i);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (connector-&gt;force == DRM_FORCE_OFF) {</div><div class='del'>-			DRM_DEBUG_KMS("connector %s is disabled by user, skipping\n",</div><div class='del'>-				      connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] disabled by user, skipping\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			enabled[i] = false;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		encoder = connector-&gt;state-&gt;best_encoder;</div><div class='del'>-		if (!encoder || WARN_ON(!connector-&gt;state-&gt;crtc)) {</div><div class='add'>+		if (!encoder || drm_WARN_ON(dev, !connector-&gt;state-&gt;crtc)) {</div><div class='ctx'> 			if (connector-&gt;force &gt; DRM_FORCE_OFF)</div><div class='ctx'> 				goto bail;</div><div class='ctx'> </div><div class='del'>-			DRM_DEBUG_KMS("connector %s has no encoder or crtc, skipping\n",</div><div class='del'>-				      connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] has no encoder or crtc, skipping\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			enabled[i] = false;</div><div class='ctx'> 			conn_configured |= BIT(i);</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -660,28 +669,30 @@ retry:</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (j = 0; j &lt; count; j++) {</div><div class='ctx'> 			if (crtcs[j] == new_crtc) {</div><div class='del'>-				DRM_DEBUG_KMS("fallback: cloned configuration\n");</div><div class='add'>+				drm_dbg_kms(dev, "fallback: cloned configuration\n");</div><div class='ctx'> 				goto bail;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		DRM_DEBUG_KMS("looking for cmdline mode on connector %s\n",</div><div class='del'>-			      connector-&gt;name);</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] looking for cmdline mode\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 		/* go for command line mode first */</div><div class='ctx'> 		modes[i] = drm_connector_pick_cmdline_mode(connector);</div><div class='ctx'> </div><div class='ctx'> 		/* try for preferred next */</div><div class='ctx'> 		if (!modes[i]) {</div><div class='del'>-			DRM_DEBUG_KMS("looking for preferred mode on connector %s %d\n",</div><div class='del'>-				      connector-&gt;name, connector-&gt;has_tile);</div><div class='add'>+			drm_dbg_kms(dev,</div><div class='add'>+				    "[CONNECTOR:%d:%s] looking for preferred mode, has tile: %s\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+				    str_yes_no(connector-&gt;has_tile));</div><div class='ctx'> 			modes[i] = drm_connector_has_preferred_mode(connector, width, height);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* No preferred mode marked by the EDID? Are there any modes? */</div><div class='ctx'> 		if (!modes[i] &amp;&amp; !list_empty(&amp;connector-&gt;modes)) {</div><div class='del'>-			DRM_DEBUG_KMS("using first mode listed on connector %s\n",</div><div class='del'>-				      connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] using first listed mode\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			modes[i] = list_first_entry(&amp;connector-&gt;modes,</div><div class='ctx'> 						    struct drm_display_mode,</div><div class='ctx'> 						    head);</div><div class='hunk'>@@ -700,8 +711,8 @@ retry:</div><div class='ctx'> 			 * This is crtc-&gt;mode and not crtc-&gt;state-&gt;mode for the</div><div class='ctx'> 			 * fastboot check to work correctly.</div><div class='ctx'> 			 */</div><div class='del'>-			DRM_DEBUG_KMS("looking for current mode on connector %s\n",</div><div class='del'>-				      connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] looking for current mode\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			modes[i] = &amp;connector-&gt;state-&gt;crtc-&gt;mode;</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -710,18 +721,18 @@ retry:</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (connector-&gt;has_tile &amp;&amp;</div><div class='ctx'> 		    num_tiled_conns &lt; connector-&gt;num_h_tile * connector-&gt;num_v_tile) {</div><div class='del'>-			DRM_DEBUG_KMS("Falling back to non tiled mode on Connector %d\n",</div><div class='del'>-				      connector-&gt;base.id);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Falling back to non-tiled mode\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			modes[i] = drm_connector_fallback_non_tiled_mode(connector);</div><div class='ctx'> 		}</div><div class='ctx'> 		crtcs[i] = new_crtc;</div><div class='ctx'> </div><div class='del'>-		DRM_DEBUG_KMS("connector %s on [CRTC:%d:%s]: %dx%d%s\n",</div><div class='del'>-			      connector-&gt;name,</div><div class='del'>-			      connector-&gt;state-&gt;crtc-&gt;base.id,</div><div class='del'>-			      connector-&gt;state-&gt;crtc-&gt;name,</div><div class='del'>-			      modes[i]-&gt;hdisplay, modes[i]-&gt;vdisplay,</div><div class='del'>-			      modes[i]-&gt;flags &amp; DRM_MODE_FLAG_INTERLACE ? "i" : "");</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] on [CRTC:%d:%s]: %dx%d%s\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+			    connector-&gt;state-&gt;crtc-&gt;base.id,</div><div class='add'>+			    connector-&gt;state-&gt;crtc-&gt;name,</div><div class='add'>+			    modes[i]-&gt;hdisplay, modes[i]-&gt;vdisplay,</div><div class='add'>+			    modes[i]-&gt;flags &amp; DRM_MODE_FLAG_INTERLACE ? "i" : "");</div><div class='ctx'> </div><div class='ctx'> 		fallback = false;</div><div class='ctx'> 		conn_configured |= BIT(i);</div><div class='hunk'>@@ -737,15 +748,15 @@ retry:</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (num_connectors_enabled != num_connectors_detected &amp;&amp;</div><div class='ctx'> 	    num_connectors_enabled &lt; dev-&gt;mode_config.num_crtc) {</div><div class='del'>-		DRM_DEBUG_KMS("fallback: Not all outputs enabled\n");</div><div class='del'>-		DRM_DEBUG_KMS("Enabled: %i, detected: %i\n", num_connectors_enabled,</div><div class='del'>-			      num_connectors_detected);</div><div class='add'>+		drm_dbg_kms(dev, "fallback: Not all outputs enabled\n");</div><div class='add'>+		drm_dbg_kms(dev, "Enabled: %i, detected: %i\n",</div><div class='add'>+			    num_connectors_enabled, num_connectors_detected);</div><div class='ctx'> 		fallback = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (fallback) {</div><div class='ctx'> bail:</div><div class='del'>-		DRM_DEBUG_KMS("Not using firmware configuration\n");</div><div class='add'>+		drm_dbg_kms(dev, "Not using firmware configuration\n");</div><div class='ctx'> 		memcpy(enabled, save_enabled, count);</div><div class='ctx'> 		ret = false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -783,7 +794,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,</div><div class='ctx'> 	int i, ret = 0;</div><div class='ctx'> 	bool *enabled;</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG_KMS("\n");</div><div class='add'>+	drm_dbg_kms(dev, "\n");</div><div class='ctx'> </div><div class='ctx'> 	if (!width)</div><div class='ctx'> 		width = dev-&gt;mode_config.max_width;</div><div class='hunk'>@@ -814,7 +825,6 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,</div><div class='ctx'> 	offsets = kcalloc(connector_count, sizeof(*offsets), GFP_KERNEL);</div><div class='ctx'> 	enabled = kcalloc(connector_count, sizeof(bool), GFP_KERNEL);</div><div class='ctx'> 	if (!crtcs || !modes || !enabled || !offsets) {</div><div class='del'>-		DRM_ERROR("Memory allocation failed\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -825,7 +835,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,</div><div class='ctx'> 	for (i = 0; i &lt; connector_count; i++)</div><div class='ctx'> 		total_modes_count += connectors[i]-&gt;funcs-&gt;fill_modes(connectors[i], width, height);</div><div class='ctx'> 	if (!total_modes_count)</div><div class='del'>-		DRM_DEBUG_KMS("No connectors reported connected with modes\n");</div><div class='add'>+		drm_dbg_kms(dev, "No connectors reported connected with modes\n");</div><div class='ctx'> 	drm_client_connectors_enabled(connectors, connector_count, enabled);</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_client_firmware_config(client, connectors, connector_count, crtcs,</div><div class='hunk'>@@ -836,12 +846,12 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,</div><div class='ctx'> </div><div class='ctx'> 		if (!drm_client_target_cloned(dev, connectors, connector_count, modes,</div><div class='ctx'> 					      offsets, enabled, width, height) &amp;&amp;</div><div class='del'>-		    !drm_client_target_preferred(connectors, connector_count, modes,</div><div class='add'>+		    !drm_client_target_preferred(dev, connectors, connector_count, modes,</div><div class='ctx'> 						 offsets, enabled, width, height))</div><div class='del'>-			DRM_ERROR("Unable to find initial modes\n");</div><div class='add'>+			drm_err(dev, "Unable to find initial modes\n");</div><div class='ctx'> </div><div class='del'>-		DRM_DEBUG_KMS("picking CRTCs for %dx%d config\n",</div><div class='del'>-			      width, height);</div><div class='add'>+		drm_dbg_kms(dev, "picking CRTCs for %dx%d config\n",</div><div class='add'>+			    width, height);</div><div class='ctx'> </div><div class='ctx'> 		drm_client_pick_crtcs(client, connectors, connector_count,</div><div class='ctx'> 				      crtcs, modes, 0, width, height);</div><div class='hunk'>@@ -858,11 +868,12 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,</div><div class='ctx'> 			struct drm_mode_set *modeset = drm_client_find_modeset(client, crtc);</div><div class='ctx'> 			struct drm_connector *connector = connectors[i];</div><div class='ctx'> </div><div class='del'>-			DRM_DEBUG_KMS("desired mode %s set on crtc %d (%d,%d)\n",</div><div class='del'>-				      mode-&gt;name, crtc-&gt;base.id, offset-&gt;x, offset-&gt;y);</div><div class='add'>+			drm_dbg_kms(dev, "[CRTC:%d:%s] desired mode %s set (%d,%d)\n",</div><div class='add'>+				    crtc-&gt;base.id, crtc-&gt;name,</div><div class='add'>+				    mode-&gt;name, offset-&gt;x, offset-&gt;y);</div><div class='ctx'> </div><div class='del'>-			if (WARN_ON_ONCE(modeset-&gt;num_connectors == DRM_CLIENT_MAX_CLONED_CONNECTORS ||</div><div class='del'>-					 (dev-&gt;mode_config.num_crtc &gt; 1 &amp;&amp; modeset-&gt;num_connectors == 1))) {</div><div class='add'>+			if (drm_WARN_ON_ONCE(dev, modeset-&gt;num_connectors == DRM_CLIENT_MAX_CLONED_CONNECTORS ||</div><div class='add'>+					     (dev-&gt;mode_config.num_crtc &gt; 1 &amp;&amp; modeset-&gt;num_connectors == 1))) {</div><div class='ctx'> 				ret = -EINVAL;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c<br/>index b0516505f7ae..4d2df7f64dc5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_connector.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_connector.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_connector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_connector.c</a></div><div class='hunk'>@@ -2940,7 +2940,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,</div><div class='ctx'> 						     dev-&gt;mode_config.max_width,</div><div class='ctx'> 						     dev-&gt;mode_config.max_height);</div><div class='ctx'> 		else</div><div class='del'>-			drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe",</div><div class='add'>+			drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe\n",</div><div class='ctx'> 				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c<br/>index 82c665d3e74b..483969b84a30 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_crtc.c</a></div><div class='hunk'>@@ -716,10 +716,10 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 	crtc = drm_crtc_find(dev, file_priv, crtc_req-&gt;crtc_id);</div><div class='ctx'> 	if (!crtc) {</div><div class='del'>-		DRM_DEBUG_KMS("Unknown CRTC ID %d\n", crtc_req-&gt;crtc_id);</div><div class='add'>+		drm_dbg_kms(dev, "Unknown CRTC ID %d\n", crtc_req-&gt;crtc_id);</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='del'>-	DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc-&gt;base.id, crtc-&gt;name);</div><div class='add'>+	drm_dbg_kms(dev, "[CRTC:%d:%s]\n", crtc-&gt;base.id, crtc-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	plane = crtc-&gt;primary;</div><div class='ctx'> </div><div class='hunk'>@@ -742,7 +742,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> 				old_fb = plane-&gt;fb;</div><div class='ctx'> </div><div class='ctx'> 			if (!old_fb) {</div><div class='del'>-				DRM_DEBUG_KMS("CRTC doesn't have current FB\n");</div><div class='add'>+				drm_dbg_kms(dev, "CRTC doesn't have current FB\n");</div><div class='ctx'> 				ret = -EINVAL;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -753,8 +753,8 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> 		} else {</div><div class='ctx'> 			fb = drm_framebuffer_lookup(dev, file_priv, crtc_req-&gt;fb_id);</div><div class='ctx'> 			if (!fb) {</div><div class='del'>-				DRM_DEBUG_KMS("Unknown FB ID%d\n",</div><div class='del'>-						crtc_req-&gt;fb_id);</div><div class='add'>+				drm_dbg_kms(dev, "Unknown FB ID%d\n",</div><div class='add'>+					    crtc_req-&gt;fb_id);</div><div class='ctx'> 				ret = -ENOENT;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -767,7 +767,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!file_priv-&gt;aspect_ratio_allowed &amp;&amp;</div><div class='ctx'> 		    (crtc_req-&gt;mode.flags &amp; DRM_MODE_FLAG_PIC_AR_MASK) != DRM_MODE_FLAG_PIC_AR_NONE) {</div><div class='del'>-			DRM_DEBUG_KMS("Unexpected aspect-ratio flag bits\n");</div><div class='add'>+			drm_dbg_kms(dev, "Unexpected aspect-ratio flag bits\n");</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -775,9 +775,9 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 		ret = drm_mode_convert_umode(dev, mode, &amp;crtc_req-&gt;mode);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			DRM_DEBUG_KMS("Invalid mode (ret=%d, status=%s)\n",</div><div class='del'>-				      ret, drm_get_mode_status_name(mode-&gt;status));</div><div class='del'>-			drm_mode_debug_printmodeline(mode);</div><div class='add'>+			drm_dbg_kms(dev, "Invalid mode (%s, %pe): " DRM_MODE_FMT "\n",</div><div class='add'>+				    drm_get_mode_status_name(mode-&gt;status),</div><div class='add'>+				    ERR_PTR(ret), DRM_MODE_ARG(mode));</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -793,9 +793,8 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> 							   fb-&gt;format-&gt;format,</div><div class='ctx'> 							   fb-&gt;modifier);</div><div class='ctx'> 			if (ret) {</div><div class='del'>-				DRM_DEBUG_KMS("Invalid pixel format %p4cc, modifier 0x%llx\n",</div><div class='del'>-					      &amp;fb-&gt;format-&gt;format,</div><div class='del'>-					      fb-&gt;modifier);</div><div class='add'>+				drm_dbg_kms(dev, "Invalid pixel format %p4cc, modifier 0x%llx\n",</div><div class='add'>+					    &amp;fb-&gt;format-&gt;format, fb-&gt;modifier);</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -808,14 +807,14 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (crtc_req-&gt;count_connectors == 0 &amp;&amp; mode) {</div><div class='del'>-		DRM_DEBUG_KMS("Count connectors is 0 but mode set\n");</div><div class='add'>+		drm_dbg_kms(dev, "Count connectors is 0 but mode set\n");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (crtc_req-&gt;count_connectors &gt; 0 &amp;&amp; (!mode || !fb)) {</div><div class='del'>-		DRM_DEBUG_KMS("Count connectors is %d but no mode or fb set\n",</div><div class='del'>-			  crtc_req-&gt;count_connectors);</div><div class='add'>+		drm_dbg_kms(dev, "Count connectors is %d but no mode or fb set\n",</div><div class='add'>+			    crtc_req-&gt;count_connectors);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -847,14 +846,13 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 			connector = drm_connector_lookup(dev, file_priv, out_id);</div><div class='ctx'> 			if (!connector) {</div><div class='del'>-				DRM_DEBUG_KMS("Connector id %d unknown\n",</div><div class='del'>-						out_id);</div><div class='add'>+				drm_dbg_kms(dev, "Connector id %d unknown\n",</div><div class='add'>+					    out_id);</div><div class='ctx'> 				ret = -ENOENT;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='del'>-			DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",</div><div class='del'>-					connector-&gt;base.id,</div><div class='del'>-					connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s]\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 			connector_set[i] = connector;</div><div class='ctx'> 			num_connectors++;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c<br/>index 2dafc39a27cb..0955f1c385dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_crtc_helper.c</a></div><div class='hunk'>@@ -110,15 +110,15 @@ bool drm_helper_encoder_in_use(struct drm_encoder *encoder)</div><div class='ctx'> 	struct drm_connector_list_iter conn_iter;</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(dev));</div><div class='add'>+	drm_WARN_ON(dev, drm_drv_uses_atomic_modeset(dev));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We can expect this mutex to be locked if we are not panicking.</div><div class='ctx'> 	 * Locking is currently fubar in the panic handler.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!oops_in_progress) {</div><div class='del'>-		WARN_ON(!mutex_is_locked(&amp;dev-&gt;mode_config.mutex));</div><div class='del'>-		WARN_ON(!drm_modeset_is_locked(&amp;dev-&gt;mode_config.connection_mutex));</div><div class='add'>+		drm_WARN_ON(dev, !mutex_is_locked(&amp;dev-&gt;mode_config.mutex));</div><div class='add'>+		drm_WARN_ON(dev, !drm_modeset_is_locked(&amp;dev-&gt;mode_config.connection_mutex));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -150,14 +150,14 @@ bool drm_helper_crtc_in_use(struct drm_crtc *crtc)</div><div class='ctx'> 	struct drm_encoder *encoder;</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(dev));</div><div class='add'>+	drm_WARN_ON(dev, drm_drv_uses_atomic_modeset(dev));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We can expect this mutex to be locked if we are not panicking.</div><div class='ctx'> 	 * Locking is currently fubar in the panic handler.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!oops_in_progress)</div><div class='del'>-		WARN_ON(!mutex_is_locked(&amp;dev-&gt;mode_config.mutex));</div><div class='add'>+		drm_WARN_ON(dev, !mutex_is_locked(&amp;dev-&gt;mode_config.mutex));</div><div class='ctx'> </div><div class='ctx'> 	drm_for_each_encoder(encoder, dev)</div><div class='ctx'> 		if (encoder-&gt;crtc == crtc &amp;&amp; drm_helper_encoder_in_use(encoder))</div><div class='hunk'>@@ -230,7 +230,7 @@ static void __drm_helper_disable_unused_functions(struct drm_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> void drm_helper_disable_unused_functions(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(dev));</div><div class='add'>+	drm_WARN_ON(dev, drm_drv_uses_atomic_modeset(dev));</div><div class='ctx'> </div><div class='ctx'> 	drm_modeset_lock_all(dev);</div><div class='ctx'> 	__drm_helper_disable_unused_functions(dev);</div><div class='hunk'>@@ -294,7 +294,7 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,</div><div class='ctx'> 	struct drm_encoder *encoder;</div><div class='ctx'> 	bool ret = true;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(dev));</div><div class='add'>+	drm_WARN_ON(dev, drm_drv_uses_atomic_modeset(dev));</div><div class='ctx'> </div><div class='ctx'> 	drm_warn_on_modeset_not_all_locked(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -338,7 +338,8 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,</div><div class='ctx'> 		if (encoder_funcs-&gt;mode_fixup) {</div><div class='ctx'> 			if (!(ret = encoder_funcs-&gt;mode_fixup(encoder, mode,</div><div class='ctx'> 							      adjusted_mode))) {</div><div class='del'>-				DRM_DEBUG_KMS("Encoder fixup failed\n");</div><div class='add'>+				drm_dbg_kms(dev, "[ENCODER:%d:%s] mode fixup failed\n",</div><div class='add'>+					    encoder-&gt;base.id, encoder-&gt;name);</div><div class='ctx'> 				goto done;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -347,11 +348,12 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,</div><div class='ctx'> 	if (crtc_funcs-&gt;mode_fixup) {</div><div class='ctx'> 		if (!(ret = crtc_funcs-&gt;mode_fixup(crtc, mode,</div><div class='ctx'> 						adjusted_mode))) {</div><div class='del'>-			DRM_DEBUG_KMS("CRTC fixup failed\n");</div><div class='add'>+			drm_dbg_kms(dev, "[CRTC:%d:%s] mode fixup failed\n",</div><div class='add'>+				    crtc-&gt;base.id, crtc-&gt;name);</div><div class='ctx'> 			goto done;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc-&gt;base.id, crtc-&gt;name);</div><div class='add'>+	drm_dbg_kms(dev, "[CRTC:%d:%s]\n", crtc-&gt;base.id, crtc-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_copy(&amp;crtc-&gt;hwmode, adjusted_mode);</div><div class='ctx'> </div><div class='hunk'>@@ -390,8 +392,8 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,</div><div class='ctx'> 		if (!encoder_funcs)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		DRM_DEBUG_KMS("[ENCODER:%d:%s] set [MODE:%s]\n",</div><div class='del'>-			encoder-&gt;base.id, encoder-&gt;name, mode-&gt;name);</div><div class='add'>+		drm_dbg_kms(dev, "[ENCODER:%d:%s] set [MODE:%s]\n",</div><div class='add'>+			    encoder-&gt;base.id, encoder-&gt;name, mode-&gt;name);</div><div class='ctx'> 		if (encoder_funcs-&gt;mode_set)</div><div class='ctx'> 			encoder_funcs-&gt;mode_set(encoder, mode, adjusted_mode);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -503,7 +505,7 @@ drm_connector_get_single_encoder(struct drm_connector *connector)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_encoder *encoder;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(hweight32(connector-&gt;possible_encoders) &gt; 1);</div><div class='add'>+	drm_WARN_ON(connector-&gt;dev, hweight32(connector-&gt;possible_encoders) &gt; 1);</div><div class='ctx'> 	drm_connector_for_each_possible_encoder(connector, encoder)</div><div class='ctx'> 		return encoder;</div><div class='ctx'> </div><div class='hunk'>@@ -564,8 +566,6 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG_KMS("\n");</div><div class='del'>-</div><div class='ctx'> 	BUG_ON(!set);</div><div class='ctx'> 	BUG_ON(!set-&gt;crtc);</div><div class='ctx'> 	BUG_ON(!set-&gt;crtc-&gt;helper_private);</div><div class='hunk'>@@ -577,19 +577,22 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 	crtc_funcs = set-&gt;crtc-&gt;helper_private;</div><div class='ctx'> </div><div class='ctx'> 	dev = set-&gt;crtc-&gt;dev;</div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(dev));</div><div class='add'>+</div><div class='add'>+	drm_dbg_kms(dev, "\n");</div><div class='add'>+</div><div class='add'>+	drm_WARN_ON(dev, drm_drv_uses_atomic_modeset(dev));</div><div class='ctx'> </div><div class='ctx'> 	if (!set-&gt;mode)</div><div class='ctx'> 		set-&gt;fb = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (set-&gt;fb) {</div><div class='del'>-		DRM_DEBUG_KMS("[CRTC:%d:%s] [FB:%d] #connectors=%d (x y) (%i %i)\n",</div><div class='del'>-			      set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name,</div><div class='del'>-			      set-&gt;fb-&gt;base.id,</div><div class='del'>-			      (int)set-&gt;num_connectors, set-&gt;x, set-&gt;y);</div><div class='add'>+		drm_dbg_kms(dev, "[CRTC:%d:%s] [FB:%d] #connectors=%d (x y) (%i %i)\n",</div><div class='add'>+			    set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name,</div><div class='add'>+			    set-&gt;fb-&gt;base.id,</div><div class='add'>+			    (int)set-&gt;num_connectors, set-&gt;x, set-&gt;y);</div><div class='ctx'> 	} else {</div><div class='del'>-		DRM_DEBUG_KMS("[CRTC:%d:%s] [NOFB]\n",</div><div class='del'>-			      set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='add'>+		drm_dbg_kms(dev, "[CRTC:%d:%s] [NOFB]\n",</div><div class='add'>+			    set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='ctx'> 		drm_crtc_helper_disable(set-&gt;crtc);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -639,7 +642,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 	if (set-&gt;crtc-&gt;primary-&gt;fb != set-&gt;fb) {</div><div class='ctx'> 		/* If we have no fb then treat it as a full mode set */</div><div class='ctx'> 		if (set-&gt;crtc-&gt;primary-&gt;fb == NULL) {</div><div class='del'>-			DRM_DEBUG_KMS("crtc has no fb, full mode set\n");</div><div class='add'>+			drm_dbg_kms(dev, "[CRTC:%d:%s] no fb, full mode set\n",</div><div class='add'>+				    set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='ctx'> 			mode_changed = true;</div><div class='ctx'> 		} else if (set-&gt;fb-&gt;format != set-&gt;crtc-&gt;primary-&gt;fb-&gt;format) {</div><div class='ctx'> 			mode_changed = true;</div><div class='hunk'>@@ -651,9 +655,10 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 		fb_changed = true;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_mode_equal(set-&gt;mode, &amp;set-&gt;crtc-&gt;mode)) {</div><div class='del'>-		DRM_DEBUG_KMS("modes are different, full mode set\n");</div><div class='del'>-		drm_mode_debug_printmodeline(&amp;set-&gt;crtc-&gt;mode);</div><div class='del'>-		drm_mode_debug_printmodeline(set-&gt;mode);</div><div class='add'>+		drm_dbg_kms(dev, "[CRTC:%d:%s] modes are different, full mode set:\n",</div><div class='add'>+			    set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='add'>+		drm_dbg_kms(dev, DRM_MODE_FMT "\n", DRM_MODE_ARG(&amp;set-&gt;crtc-&gt;mode));</div><div class='add'>+		drm_dbg_kms(dev, DRM_MODE_FMT "\n", DRM_MODE_ARG(set-&gt;mode));</div><div class='ctx'> 		mode_changed = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -687,7 +692,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 					fail = 1;</div><div class='ctx'> </div><div class='ctx'> 				if (connector-&gt;dpms != DRM_MODE_DPMS_ON) {</div><div class='del'>-					DRM_DEBUG_KMS("connector dpms not on, full mode switch\n");</div><div class='add'>+					drm_dbg_kms(dev, "[CONNECTOR:%d:%s] DPMS not on, full mode switch\n",</div><div class='add'>+						    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 					mode_changed = true;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='hunk'>@@ -696,7 +702,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (new_encoder != connector-&gt;encoder) {</div><div class='del'>-			DRM_DEBUG_KMS("encoder changed, full mode switch\n");</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] encoder changed, full mode switch\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			mode_changed = true;</div><div class='ctx'> 			/* If the encoder is reused for another connector, then</div><div class='ctx'> 			 * the appropriate crtc will be set later.</div><div class='hunk'>@@ -737,17 +744,18 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (new_crtc != connector-&gt;encoder-&gt;crtc) {</div><div class='del'>-			DRM_DEBUG_KMS("crtc changed, full mode switch\n");</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] CRTC changed, full mode switch\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 			mode_changed = true;</div><div class='ctx'> 			connector-&gt;encoder-&gt;crtc = new_crtc;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (new_crtc) {</div><div class='del'>-			DRM_DEBUG_KMS("[CONNECTOR:%d:%s] to [CRTC:%d:%s]\n",</div><div class='del'>-				      connector-&gt;base.id, connector-&gt;name,</div><div class='del'>-				      new_crtc-&gt;base.id, new_crtc-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] to [CRTC:%d:%s]\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+				    new_crtc-&gt;base.id, new_crtc-&gt;name);</div><div class='ctx'> 		} else {</div><div class='del'>-			DRM_DEBUG_KMS("[CONNECTOR:%d:%s] to [NOCRTC]\n",</div><div class='del'>-				      connector-&gt;base.id, connector-&gt;name);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] to [NOCRTC]\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	drm_connector_list_iter_end(&amp;conn_iter);</div><div class='hunk'>@@ -758,23 +766,23 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set,</div><div class='ctx'> </div><div class='ctx'> 	if (mode_changed) {</div><div class='ctx'> 		if (drm_helper_crtc_in_use(set-&gt;crtc)) {</div><div class='del'>-			DRM_DEBUG_KMS("attempting to set mode from"</div><div class='del'>-					" userspace\n");</div><div class='del'>-			drm_mode_debug_printmodeline(set-&gt;mode);</div><div class='add'>+			drm_dbg_kms(dev, "[CRTC:%d:%s] attempting to set mode from userspace: " DRM_MODE_FMT "\n",</div><div class='add'>+				    set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name, DRM_MODE_ARG(set-&gt;mode));</div><div class='ctx'> 			set-&gt;crtc-&gt;primary-&gt;fb = set-&gt;fb;</div><div class='ctx'> 			if (!drm_crtc_helper_set_mode(set-&gt;crtc, set-&gt;mode,</div><div class='ctx'> 						      set-&gt;x, set-&gt;y,</div><div class='ctx'> 						      save_set.fb)) {</div><div class='del'>-				DRM_ERROR("failed to set mode on [CRTC:%d:%s]\n",</div><div class='del'>-					  set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='add'>+				drm_err(dev, "[CRTC:%d:%s] failed to set mode\n",</div><div class='add'>+					set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='ctx'> 				set-&gt;crtc-&gt;primary-&gt;fb = save_set.fb;</div><div class='ctx'> 				ret = -EINVAL;</div><div class='ctx'> 				goto fail;</div><div class='ctx'> 			}</div><div class='del'>-			DRM_DEBUG_KMS("Setting connector DPMS state to on\n");</div><div class='add'>+			drm_dbg_kms(dev, "[CRTC:%d:%s] Setting connector DPMS state to on\n",</div><div class='add'>+				    set-&gt;crtc-&gt;base.id, set-&gt;crtc-&gt;name);</div><div class='ctx'> 			for (i = 0; i &lt; set-&gt;num_connectors; i++) {</div><div class='del'>-				DRM_DEBUG_KMS("\t[CONNECTOR:%d:%s] set DPMS on\n", set-&gt;connectors[i]-&gt;base.id,</div><div class='del'>-					      set-&gt;connectors[i]-&gt;name);</div><div class='add'>+				drm_dbg_kms(dev, "\t[CONNECTOR:%d:%s] set DPMS on\n", set-&gt;connectors[i]-&gt;base.id,</div><div class='add'>+					    set-&gt;connectors[i]-&gt;name);</div><div class='ctx'> 				set-&gt;connectors[i]-&gt;funcs-&gt;dpms(set-&gt;connectors[i], DRM_MODE_DPMS_ON);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -823,7 +831,7 @@ fail:</div><div class='ctx'> 	if (mode_changed &amp;&amp;</div><div class='ctx'> 	    !drm_crtc_helper_set_mode(save_set.crtc, save_set.mode, save_set.x,</div><div class='ctx'> 				      save_set.y, save_set.fb))</div><div class='del'>-		DRM_ERROR("failed to restore config after modeset failure\n");</div><div class='add'>+		drm_err(dev, "failed to restore config after modeset failure\n");</div><div class='ctx'> </div><div class='ctx'> 	kfree(save_connector_encoders);</div><div class='ctx'> 	kfree(save_encoder_crtcs);</div><div class='hunk'>@@ -905,7 +913,7 @@ int drm_helper_connector_dpms(struct drm_connector *connector, int mode)</div><div class='ctx'> 	struct drm_crtc *crtc = encoder ? encoder-&gt;crtc : NULL;</div><div class='ctx'> 	int old_dpms, encoder_dpms = DRM_MODE_DPMS_OFF;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(connector-&gt;dev));</div><div class='add'>+	drm_WARN_ON(connector-&gt;dev, drm_drv_uses_atomic_modeset(connector-&gt;dev));</div><div class='ctx'> </div><div class='ctx'> 	if (mode == connector-&gt;dpms)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -980,7 +988,7 @@ void drm_helper_resume_force_mode(struct drm_device *dev)</div><div class='ctx'> 	int encoder_dpms;</div><div class='ctx'> 	bool ret;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(drm_drv_uses_atomic_modeset(dev));</div><div class='add'>+	drm_WARN_ON(dev, drm_drv_uses_atomic_modeset(dev));</div><div class='ctx'> </div><div class='ctx'> 	drm_modeset_lock_all(dev);</div><div class='ctx'> 	drm_for_each_crtc(crtc, dev) {</div><div class='hunk'>@@ -993,7 +1001,7 @@ void drm_helper_resume_force_mode(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		/* Restoring the old config should never fail! */</div><div class='ctx'> 		if (ret == false)</div><div class='del'>-			DRM_ERROR("failed to set mode on crtc %p\n", crtc);</div><div class='add'>+			drm_err(dev, "failed to set mode on crtc %p\n", crtc);</div><div class='ctx'> </div><div class='ctx'> 		/* Turn off outputs that were already powered off */</div><div class='ctx'> 		if (drm_helper_choose_crtc_dpms(crtc)) {</div><div class='head'>diff --git a/drivers/gpu/drm/drm_crtc_helper_internal.h b/drivers/gpu/drm/drm_crtc_helper_internal.h<br/>index 28e04e750130..8059f65c5d6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc_helper_internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc_helper_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc_helper_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_crtc_helper_internal.h</a></div><div class='hunk'>@@ -26,10 +26,15 @@</div><div class='ctx'>  * implementation details and are not exported to drivers.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;drm/drm_connector.h&gt;</div><div class='del'>-#include &lt;drm/drm_crtc.h&gt;</div><div class='del'>-#include &lt;drm/drm_encoder.h&gt;</div><div class='del'>-#include &lt;drm/drm_modes.h&gt;</div><div class='add'>+#ifndef __DRM_CRTC_HELPER_INTERNAL_H__</div><div class='add'>+#define __DRM_CRTC_HELPER_INTERNAL_H__</div><div class='add'>+</div><div class='add'>+enum drm_mode_status;</div><div class='add'>+struct drm_connector;</div><div class='add'>+struct drm_crtc;</div><div class='add'>+struct drm_display_mode;</div><div class='add'>+struct drm_encoder;</div><div class='add'>+struct drm_modeset_acquire_ctx;</div><div class='ctx'> </div><div class='ctx'> /* drm_probe_helper.c */</div><div class='ctx'> enum drm_mode_status drm_crtc_mode_valid(struct drm_crtc *crtc,</div><div class='hunk'>@@ -44,3 +49,5 @@ drm_connector_mode_valid(struct drm_connector *connector,</div><div class='ctx'> </div><div class='ctx'> struct drm_encoder *</div><div class='ctx'> drm_connector_get_single_encoder(struct drm_connector *connector);</div><div class='add'>+</div><div class='add'>+#endif /* __DRM_CRTC_HELPER_INTERNAL_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h<br/>index a514d5207e41..25aaae937ceb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc_internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_crtc_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_crtc_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_crtc_internal.h</a></div><div class='hunk'>@@ -32,6 +32,10 @@</div><div class='ctx'>  * and are not exported to drivers.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#ifndef __DRM_CRTC_INTERNAL_H__</div><div class='add'>+#define __DRM_CRTC_INTERNAL_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum drm_color_encoding;</div><div class='hunk'>@@ -39,12 +43,14 @@ enum drm_color_range;</div><div class='ctx'> enum drm_connector_force;</div><div class='ctx'> enum drm_mode_status;</div><div class='ctx'> </div><div class='add'>+struct cea_sad;</div><div class='ctx'> struct drm_atomic_state;</div><div class='ctx'> struct drm_bridge;</div><div class='ctx'> struct drm_connector;</div><div class='ctx'> struct drm_crtc;</div><div class='ctx'> struct drm_device;</div><div class='ctx'> struct drm_display_mode;</div><div class='add'>+struct drm_edid;</div><div class='ctx'> struct drm_file;</div><div class='ctx'> struct drm_framebuffer;</div><div class='ctx'> struct drm_mode_create_dumb;</div><div class='hunk'>@@ -54,6 +60,7 @@ struct drm_mode_object;</div><div class='ctx'> struct drm_mode_set;</div><div class='ctx'> struct drm_plane;</div><div class='ctx'> struct drm_plane_state;</div><div class='add'>+struct drm_printer;</div><div class='ctx'> struct drm_property;</div><div class='ctx'> struct edid;</div><div class='ctx'> struct fwnode_handle;</div><div class='hunk'>@@ -292,6 +299,10 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode);</div><div class='ctx'> int drm_edid_override_show(struct drm_connector *connector, struct seq_file *m);</div><div class='ctx'> int drm_edid_override_set(struct drm_connector *connector, const void *edid, size_t size);</div><div class='ctx'> int drm_edid_override_reset(struct drm_connector *connector);</div><div class='add'>+const u8 *drm_edid_find_extension(const struct drm_edid *drm_edid,</div><div class='add'>+				  int ext_id, int *ext_index);</div><div class='add'>+void drm_edid_cta_sad_get(const struct cea_sad *cta_sad, u8 *sad);</div><div class='add'>+void drm_edid_cta_sad_set(struct cea_sad *cta_sad, const u8 *sad);</div><div class='ctx'> </div><div class='ctx'> /* drm_edid_load.c */</div><div class='ctx'> #ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE</div><div class='hunk'>@@ -303,3 +314,5 @@ drm_edid_load_firmware(struct drm_connector *connector)</div><div class='ctx'> 	return ERR_PTR(-ENOENT);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#endif /* __DRM_CRTC_INTERNAL_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/drm_displayid.c b/drivers/gpu/drm/drm_displayid.c<br/>index 9edc111be7ee..9d01d762801f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_displayid.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_displayid.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_displayid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_displayid.c</a></div><div class='hunk'>@@ -3,10 +3,12 @@</div><div class='ctx'>  * Copyright © 2021 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;drm/drm_displayid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "drm_crtc_internal.h"</div><div class='add'>+#include "drm_displayid_internal.h"</div><div class='add'>+</div><div class='ctx'> static const struct displayid_header *</div><div class='ctx'> displayid_get_header(const u8 *displayid, int length, int index)</div><div class='ctx'> {</div><div class='hunk'>@@ -53,9 +55,10 @@ static const u8 *drm_find_displayid_extension(const struct drm_edid *drm_edid,</div><div class='ctx'> 					      int *length, int *idx,</div><div class='ctx'> 					      int *ext_index)</div><div class='ctx'> {</div><div class='del'>-	const u8 *displayid = drm_find_edid_extension(drm_edid, DISPLAYID_EXT, ext_index);</div><div class='ctx'> 	const struct displayid_header *base;</div><div class='add'>+	const u8 *displayid;</div><div class='ctx'> </div><div class='add'>+	displayid = drm_edid_find_extension(drm_edid, DISPLAYID_EXT, ext_index);</div><div class='ctx'> 	if (!displayid)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='head'>diff --git a/include/drm/drm_displayid.h b/drivers/gpu/drm/drm_displayid_internal.h<br/>index 566497eeb3b8..aee1b86a73c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/include/drm/drm_displayid.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>include/drm/drm_displayid.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_displayid_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_displayid_internal.h</a></div><div class='hunk'>@@ -19,8 +19,9 @@</div><div class='ctx'>  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='ctx'>  * OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='del'>-#ifndef DRM_DISPLAYID_H</div><div class='del'>-#define DRM_DISPLAYID_H</div><div class='add'>+</div><div class='add'>+#ifndef __DRM_DISPLAYID_INTERNAL_H__</div><div class='add'>+#define __DRM_DISPLAYID_INTERNAL_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='hunk'>@@ -30,7 +31,6 @@ struct drm_edid;</div><div class='ctx'> #define VESA_IEEE_OUI				0x3a0292</div><div class='ctx'> </div><div class='ctx'> /* DisplayID Structure versions */</div><div class='del'>-#define DISPLAY_ID_STRUCTURE_VER_12		0x12</div><div class='ctx'> #define DISPLAY_ID_STRUCTURE_VER_20		0x20</div><div class='ctx'> </div><div class='ctx'> /* DisplayID Structure v1r2 Data Blocks */</div><div class='head'>diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c<br/>index 243cacb3575c..535b624d4c9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_drv.c</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> #include &lt;drm/drm_file.h&gt;</div><div class='ctx'> #include &lt;drm/drm_managed.h&gt;</div><div class='ctx'> #include &lt;drm/drm_mode_object.h&gt;</div><div class='add'>+#include &lt;drm/drm_panic.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> #include &lt;drm/drm_privacy_screen_machine.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -638,6 +639,7 @@ static int drm_dev_init(struct drm_device *dev,</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;filelist_mutex);</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;clientlist_mutex);</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;master_mutex);</div><div class='add'>+	raw_spin_lock_init(&amp;dev-&gt;mode_config.panic_lock);</div><div class='ctx'> </div><div class='ctx'> 	ret = drmm_add_action_or_reset(dev, drm_dev_init_release, NULL);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -943,6 +945,7 @@ int drm_dev_register(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto err_unload;</div><div class='ctx'> 	}</div><div class='add'>+	drm_panic_register(dev);</div><div class='ctx'> </div><div class='ctx'> 	DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",</div><div class='ctx'> 		 driver-&gt;name, driver-&gt;major, driver-&gt;minor,</div><div class='hunk'>@@ -987,6 +990,8 @@ void drm_dev_unregister(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;registered = false;</div><div class='ctx'> </div><div class='add'>+	drm_panic_unregister(dev);</div><div class='add'>+</div><div class='ctx'> 	drm_client_dev_unregister(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='head'>diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c<br/>index 923c4423151c..4f54c91b31b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_edid.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_edid.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_edid.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_edid.c</a></div><div class='hunk'>@@ -29,16 +29,17 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/byteorder/generic.h&gt;</div><div class='ctx'> #include &lt;linux/cec.h&gt;</div><div class='ctx'> #include &lt;linux/hdmi.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/seq_buf.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/vga_switcheroo.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;drm/drm_displayid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_drv.h&gt;</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_eld.h&gt;</div><div class='hunk'>@@ -46,6 +47,7 @@</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "drm_crtc_internal.h"</div><div class='add'>+#include "drm_displayid_internal.h"</div><div class='ctx'> #include "drm_internal.h"</div><div class='ctx'> </div><div class='ctx'> static int oui(u8 first, u8 second, u8 third)</div><div class='hunk'>@@ -102,6 +104,11 @@ struct detailed_mode_closure {</div><div class='ctx'> 	int modes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct drm_edid_match_closure {</div><div class='add'>+	const struct drm_edid_ident *ident;</div><div class='add'>+	bool matched;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define LEVEL_DMT	0</div><div class='ctx'> #define LEVEL_GTF	1</div><div class='ctx'> #define LEVEL_GTF2	2</div><div class='hunk'>@@ -109,13 +116,15 @@ struct detailed_mode_closure {</div><div class='ctx'> </div><div class='ctx'> #define EDID_QUIRK(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _quirks) \</div><div class='ctx'> { \</div><div class='del'>-	.panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \</div><div class='del'>-					     product_id), \</div><div class='add'>+	.ident = { \</div><div class='add'>+		.panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, \</div><div class='add'>+						     vend_chr_2, product_id), \</div><div class='add'>+	}, \</div><div class='ctx'> 	.quirks = _quirks \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct edid_quirk {</div><div class='del'>-	u32 panel_id;</div><div class='add'>+	const struct drm_edid_ident ident;</div><div class='ctx'> 	u32 quirks;</div><div class='ctx'> } edid_quirk_list[] = {</div><div class='ctx'> 	/* Acer AL1706 */</div><div class='hunk'>@@ -1811,36 +1820,25 @@ static bool edid_block_is_zero(const void *edid)</div><div class='ctx'> 	return !memchr_inv(edid, 0, EDID_LENGTH);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * drm_edid_are_equal - compare two edid blobs.</div><div class='del'>- * @edid1: pointer to first blob</div><div class='del'>- * @edid2: pointer to second blob</div><div class='del'>- * This helper can be used during probing to determine if</div><div class='del'>- * edid had changed.</div><div class='del'>- */</div><div class='del'>-bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2)</div><div class='add'>+static bool drm_edid_eq(const struct drm_edid *drm_edid,</div><div class='add'>+			const void *raw_edid, size_t raw_edid_size)</div><div class='ctx'> {</div><div class='del'>-	int edid1_len, edid2_len;</div><div class='del'>-	bool edid1_present = edid1 != NULL;</div><div class='del'>-	bool edid2_present = edid2 != NULL;</div><div class='add'>+	bool edid1_present = drm_edid &amp;&amp; drm_edid-&gt;edid &amp;&amp; drm_edid-&gt;size;</div><div class='add'>+	bool edid2_present = raw_edid &amp;&amp; raw_edid_size;</div><div class='ctx'> </div><div class='ctx'> 	if (edid1_present != edid2_present)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (edid1) {</div><div class='del'>-		edid1_len = edid_size(edid1);</div><div class='del'>-		edid2_len = edid_size(edid2);</div><div class='del'>-</div><div class='del'>-		if (edid1_len != edid2_len)</div><div class='add'>+	if (edid1_present) {</div><div class='add'>+		if (drm_edid-&gt;size != raw_edid_size)</div><div class='ctx'> 			return false;</div><div class='ctx'> </div><div class='del'>-		if (memcmp(edid1, edid2, edid1_len))</div><div class='add'>+		if (memcmp(drm_edid-&gt;edid, raw_edid, drm_edid-&gt;size))</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(drm_edid_are_equal);</div><div class='ctx'> </div><div class='ctx'> enum edid_block_status {</div><div class='ctx'> 	EDID_BLOCK_OK = 0,</div><div class='hunk'>@@ -2749,8 +2747,84 @@ const struct drm_edid *drm_edid_read(struct drm_connector *connector)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_edid_read);</div><div class='ctx'> </div><div class='del'>-static u32 edid_extract_panel_id(const struct edid *edid)</div><div class='add'>+/**</div><div class='add'>+ * drm_edid_get_product_id - Get the vendor and product identification</div><div class='add'>+ * @drm_edid: EDID</div><div class='add'>+ * @id: Where to place the product id</div><div class='add'>+ */</div><div class='add'>+void drm_edid_get_product_id(const struct drm_edid *drm_edid,</div><div class='add'>+			     struct drm_edid_product_id *id)</div><div class='add'>+{</div><div class='add'>+	if (drm_edid &amp;&amp; drm_edid-&gt;edid &amp;&amp; drm_edid-&gt;size &gt;= EDID_LENGTH)</div><div class='add'>+		memcpy(id, &amp;drm_edid-&gt;edid-&gt;product_id, sizeof(*id));</div><div class='add'>+	else</div><div class='add'>+		memset(id, 0, sizeof(*id));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_edid_get_product_id);</div><div class='add'>+</div><div class='add'>+static void decode_date(struct seq_buf *s, const struct drm_edid_product_id *id)</div><div class='add'>+{</div><div class='add'>+	int week = id-&gt;week_of_manufacture;</div><div class='add'>+	int year = id-&gt;year_of_manufacture + 1990;</div><div class='add'>+</div><div class='add'>+	if (week == 0xff)</div><div class='add'>+		seq_buf_printf(s, "model year: %d", year);</div><div class='add'>+	else if (!week)</div><div class='add'>+		seq_buf_printf(s, "year of manufacture: %d", year);</div><div class='add'>+	else</div><div class='add'>+		seq_buf_printf(s, "week/year of manufacture: %d/%d", week, year);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_edid_print_product_id - Print decoded product id to printer</div><div class='add'>+ * @p: drm printer</div><div class='add'>+ * @id: EDID product id</div><div class='add'>+ * @raw: If true, also print the raw hex</div><div class='add'>+ *</div><div class='add'>+ * See VESA E-EDID 1.4 section 3.4.</div><div class='add'>+ */</div><div class='add'>+void drm_edid_print_product_id(struct drm_printer *p,</div><div class='add'>+			       const struct drm_edid_product_id *id, bool raw)</div><div class='add'>+{</div><div class='add'>+	DECLARE_SEQ_BUF(date, 40);</div><div class='add'>+	char vend[4];</div><div class='add'>+</div><div class='add'>+	drm_edid_decode_mfg_id(be16_to_cpu(id-&gt;manufacturer_name), vend);</div><div class='add'>+</div><div class='add'>+	decode_date(&amp;date, id);</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "manufacturer name: %s, product code: %u, serial number: %u, %s\n",</div><div class='add'>+		   vend, le16_to_cpu(id-&gt;product_code),</div><div class='add'>+		   le32_to_cpu(id-&gt;serial_number), seq_buf_str(&amp;date));</div><div class='add'>+</div><div class='add'>+	if (raw)</div><div class='add'>+		drm_printf(p, "raw product id: %*ph\n", (int)sizeof(*id), id);</div><div class='add'>+</div><div class='add'>+	WARN_ON(seq_buf_has_overflowed(&amp;date));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_edid_print_product_id);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_edid_get_panel_id - Get a panel's ID from EDID</div><div class='add'>+ * @drm_edid: EDID that contains panel ID.</div><div class='add'>+ *</div><div class='add'>+ * This function uses the first block of the EDID of a panel and (assuming</div><div class='add'>+ * that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value</div><div class='add'>+ * (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's</div><div class='add'>+ * supposed to be different for each different modem of panel.</div><div class='add'>+ *</div><div class='add'>+ * Return: A 32-bit ID that should be different for each make/model of panel.</div><div class='add'>+ *         See the functions drm_edid_encode_panel_id() and</div><div class='add'>+ *         drm_edid_decode_panel_id() for some details on the structure of this</div><div class='add'>+ *         ID. Return 0 if the EDID size is less than a base block.</div><div class='add'>+ */</div><div class='add'>+u32 drm_edid_get_panel_id(const struct drm_edid *drm_edid)</div><div class='ctx'> {</div><div class='add'>+	const struct edid *edid = drm_edid-&gt;edid;</div><div class='add'>+</div><div class='add'>+	if (drm_edid-&gt;size &lt; EDID_LENGTH)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We represent the ID as a 32-bit number so it can easily be compared</div><div class='ctx'> 	 * with "==".</div><div class='hunk'>@@ -2768,60 +2842,54 @@ static u32 edid_extract_panel_id(const struct edid *edid)</div><div class='ctx'> 	       (u32)edid-&gt;mfg_id[1] &lt;&lt; 16   |</div><div class='ctx'> 	       (u32)EDID_PRODUCT_ID(edid);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(drm_edid_get_panel_id);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * drm_edid_get_panel_id - Get a panel's ID through DDC</div><div class='add'>+ * drm_edid_read_base_block - Get a panel's EDID base block</div><div class='ctx'>  * @adapter: I2C adapter to use for DDC</div><div class='ctx'>  *</div><div class='del'>- * This function reads the first block of the EDID of a panel and (assuming</div><div class='del'>- * that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value</div><div class='del'>- * (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's</div><div class='del'>- * supposed to be different for each different modem of panel.</div><div class='add'>+ * This function returns the drm_edid containing the first block of the EDID of</div><div class='add'>+ * a panel.</div><div class='ctx'>  *</div><div class='ctx'>  * This function is intended to be used during early probing on devices where</div><div class='ctx'>  * more than one panel might be present. Because of its intended use it must</div><div class='del'>- * assume that the EDID of the panel is correct, at least as far as the ID</div><div class='del'>- * is concerned (in other words, we don't process any overrides here).</div><div class='add'>+ * assume that the EDID of the panel is correct, at least as far as the base</div><div class='add'>+ * block is concerned (in other words, we don't process any overrides here).</div><div class='add'>+ *</div><div class='add'>+ * Caller should call drm_edid_free() after use.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: it's expected that this function and drm_do_get_edid() will both</div><div class='ctx'>  * be read the EDID, but there is no caching between them. Since we're only</div><div class='ctx'>  * reading the first block, hopefully this extra overhead won't be too big.</div><div class='ctx'>  *</div><div class='del'>- * Return: A 32-bit ID that should be different for each make/model of panel.</div><div class='del'>- *         See the functions drm_edid_encode_panel_id() and</div><div class='del'>- *         drm_edid_decode_panel_id() for some details on the structure of this</div><div class='del'>- *         ID.</div><div class='add'>+ * WARNING: Only use this function when the connector is unknown. For example,</div><div class='add'>+ * during the early probe of panel. The EDID read from the function is temporary</div><div class='add'>+ * and should be replaced by the full EDID returned from other drm_edid_read.</div><div class='add'>+ *</div><div class='add'>+ * Return: Pointer to allocated EDID base block, or NULL on any failure.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-u32 drm_edid_get_panel_id(struct i2c_adapter *adapter)</div><div class='add'>+const struct drm_edid *drm_edid_read_base_block(struct i2c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	enum edid_block_status status;</div><div class='ctx'> 	void *base_block;</div><div class='del'>-	u32 panel_id = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * There are no manufacturer IDs of 0, so if there is a problem reading</div><div class='del'>-	 * the EDID then we'll just return 0.</div><div class='del'>-	 */</div><div class='ctx'> </div><div class='ctx'> 	base_block = kzalloc(EDID_LENGTH, GFP_KERNEL);</div><div class='ctx'> 	if (!base_block)</div><div class='del'>-		return 0;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	status = edid_block_read(base_block, 0, drm_do_probe_ddc_edid, adapter);</div><div class='ctx'> </div><div class='ctx'> 	edid_block_status_print(status, base_block, 0);</div><div class='ctx'> </div><div class='del'>-	if (edid_block_status_valid(status, edid_block_tag(base_block)))</div><div class='del'>-		panel_id = edid_extract_panel_id(base_block);</div><div class='del'>-	else</div><div class='add'>+	if (!edid_block_status_valid(status, edid_block_tag(base_block))) {</div><div class='ctx'> 		edid_block_dump(KERN_NOTICE, base_block, 0);</div><div class='add'>+		kfree(base_block);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	kfree(base_block);</div><div class='del'>-</div><div class='del'>-	return panel_id;</div><div class='add'>+	return _drm_edid_alloc(base_block, EDID_LENGTH);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(drm_edid_get_panel_id);</div><div class='add'>+EXPORT_SYMBOL(drm_edid_read_base_block);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output</div><div class='hunk'>@@ -2903,16 +2971,17 @@ EXPORT_SYMBOL(drm_edid_duplicate);</div><div class='ctx'>  * @drm_edid: EDID to process</div><div class='ctx'>  *</div><div class='ctx'>  * This tells subsequent routines what fixes they need to apply.</div><div class='add'>+ *</div><div class='add'>+ * Return: A u32 represents the quirks to apply.</div><div class='ctx'>  */</div><div class='ctx'> static u32 edid_get_quirks(const struct drm_edid *drm_edid)</div><div class='ctx'> {</div><div class='del'>-	u32 panel_id = edid_extract_panel_id(drm_edid-&gt;edid);</div><div class='ctx'> 	const struct edid_quirk *quirk;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(edid_quirk_list); i++) {</div><div class='ctx'> 		quirk = &amp;edid_quirk_list[i];</div><div class='del'>-		if (quirk-&gt;panel_id == panel_id)</div><div class='add'>+		if (drm_edid_match(drm_edid, &amp;quirk-&gt;ident))</div><div class='ctx'> 			return quirk-&gt;quirks;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4120,7 +4189,7 @@ static int add_detailed_modes(struct drm_connector *connector,</div><div class='ctx'>  *</div><div class='ctx'>  * FIXME: Prefer not returning pointers to raw EDID data.</div><div class='ctx'>  */</div><div class='del'>-const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid,</div><div class='add'>+const u8 *drm_edid_find_extension(const struct drm_edid *drm_edid,</div><div class='ctx'> 				  int ext_id, int *ext_index)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 *edid_ext = NULL;</div><div class='hunk'>@@ -4150,11 +4219,21 @@ static bool drm_edid_has_cta_extension(const struct drm_edid *drm_edid)</div><div class='ctx'> {</div><div class='ctx'> 	const struct displayid_block *block;</div><div class='ctx'> 	struct displayid_iter iter;</div><div class='del'>-	int ext_index = 0;</div><div class='add'>+	struct drm_edid_iter edid_iter;</div><div class='add'>+	const u8 *ext;</div><div class='ctx'> 	bool found = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Look for a top level CEA extension block */</div><div class='del'>-	if (drm_find_edid_extension(drm_edid, CEA_EXT, &amp;ext_index))</div><div class='add'>+	drm_edid_iter_begin(drm_edid, &amp;edid_iter);</div><div class='add'>+	drm_edid_iter_for_each(ext, &amp;edid_iter) {</div><div class='add'>+		if (ext[0] == CEA_EXT) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	drm_edid_iter_end(&amp;edid_iter);</div><div class='add'>+</div><div class='add'>+	if (found)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/* CEA blocks can also be found embedded in a DisplayID block */</div><div class='hunk'>@@ -5443,6 +5522,66 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='add'>+match_identity(const struct detailed_timing *timing, void *data)</div><div class='add'>+{</div><div class='add'>+	struct drm_edid_match_closure *closure = data;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	const char *name = closure-&gt;ident-&gt;name;</div><div class='add'>+	unsigned int name_len = strlen(name);</div><div class='add'>+	const char *desc = timing-&gt;data.other_data.data.str.str;</div><div class='add'>+	unsigned int desc_len = ARRAY_SIZE(timing-&gt;data.other_data.data.str.str);</div><div class='add'>+</div><div class='add'>+	if (name_len &gt; desc_len ||</div><div class='add'>+	    !(is_display_descriptor(timing, EDID_DETAIL_MONITOR_NAME) ||</div><div class='add'>+	      is_display_descriptor(timing, EDID_DETAIL_MONITOR_STRING)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (strncmp(name, desc, name_len))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = name_len; i &lt; desc_len; i++) {</div><div class='add'>+		if (desc[i] == '\n')</div><div class='add'>+			break;</div><div class='add'>+		/* Allow white space before EDID string terminator. */</div><div class='add'>+		if (!isspace(desc[i]))</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	closure-&gt;matched = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_edid_match - match drm_edid with given identity</div><div class='add'>+ * @drm_edid: EDID</div><div class='add'>+ * @ident: the EDID identity to match with</div><div class='add'>+ *</div><div class='add'>+ * Check if the EDID matches with the given identity.</div><div class='add'>+ *</div><div class='add'>+ * Return: True if the given identity matched with EDID, false otherwise.</div><div class='add'>+ */</div><div class='add'>+bool drm_edid_match(const struct drm_edid *drm_edid,</div><div class='add'>+		    const struct drm_edid_ident *ident)</div><div class='add'>+{</div><div class='add'>+	if (!drm_edid || drm_edid_get_panel_id(drm_edid) != ident-&gt;panel_id)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Match with name only if it's not NULL. */</div><div class='add'>+	if (ident-&gt;name) {</div><div class='add'>+		struct drm_edid_match_closure closure = {</div><div class='add'>+			.ident = ident,</div><div class='add'>+			.matched = false,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		drm_for_each_detailed_block(drm_edid, match_identity, &amp;closure);</div><div class='add'>+</div><div class='add'>+		return closure.matched;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_edid_match);</div><div class='add'>+</div><div class='add'>+static void</div><div class='ctx'> monitor_name(const struct detailed_timing *timing, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	const char **res = data;</div><div class='hunk'>@@ -6787,15 +6926,14 @@ static int _drm_edid_connector_property_update(struct drm_connector *connector,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (connector-&gt;edid_blob_ptr) {</div><div class='del'>-		const struct edid *old_edid = connector-&gt;edid_blob_ptr-&gt;data;</div><div class='del'>-</div><div class='del'>-		if (old_edid) {</div><div class='del'>-			if (!drm_edid_are_equal(drm_edid ? drm_edid-&gt;edid : NULL, old_edid)) {</div><div class='del'>-				connector-&gt;epoch_counter++;</div><div class='del'>-				drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed, epoch counter %llu\n",</div><div class='del'>-					    connector-&gt;base.id, connector-&gt;name,</div><div class='del'>-					    connector-&gt;epoch_counter);</div><div class='del'>-			}</div><div class='add'>+		const void *old_edid = connector-&gt;edid_blob_ptr-&gt;data;</div><div class='add'>+		size_t old_edid_size = connector-&gt;edid_blob_ptr-&gt;length;</div><div class='add'>+</div><div class='add'>+		if (old_edid &amp;&amp; !drm_edid_eq(drm_edid, old_edid, old_edid_size)) {</div><div class='add'>+			connector-&gt;epoch_counter++;</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed, epoch counter %llu\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+				    connector-&gt;epoch_counter);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7324,7 +7462,7 @@ static void drm_parse_tiled_block(struct drm_connector *connector,</div><div class='ctx'> static bool displayid_is_tiled_block(const struct displayid_iter *iter,</div><div class='ctx'> 				     const struct displayid_block *block)</div><div class='ctx'> {</div><div class='del'>-	return (displayid_version(iter) == DISPLAY_ID_STRUCTURE_VER_12 &amp;&amp;</div><div class='add'>+	return (displayid_version(iter) &lt; DISPLAY_ID_STRUCTURE_VER_20 &amp;&amp;</div><div class='ctx'> 		block-&gt;tag == DATA_BLOCK_TILED_DISPLAY) ||</div><div class='ctx'> 		(displayid_version(iter) == DISPLAY_ID_STRUCTURE_VER_20 &amp;&amp;</div><div class='ctx'> 		 block-&gt;tag == DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_eld.c b/drivers/gpu/drm/drm_eld.c<br/>index 5177991aa272..c0428d07de53 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_eld.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_eld.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_eld.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_eld.c</a></div><div class='hunk'>@@ -3,10 +3,12 @@</div><div class='ctx'>  * Copyright © 2023 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_eld.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "drm_internal.h"</div><div class='add'>+#include "drm_crtc_internal.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * drm_eld_sad_get - get SAD from ELD to struct cea_sad</div><div class='head'>diff --git a/drivers/gpu/drm/drm_fb_dma_helper.c b/drivers/gpu/drm/drm_fb_dma_helper.c<br/>index 3b535ad1b07c..e1d61a65210b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_fb_dma_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_fb_dma_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_fb_dma_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_fb_dma_helper.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;drm/drm_framebuffer.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_dma_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_framebuffer_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_panic.h&gt;</div><div class='ctx'> #include &lt;drm/drm_plane.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -148,3 +149,47 @@ void drm_fb_dma_sync_non_coherent(struct drm_device *drm,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(drm_fb_dma_sync_non_coherent);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_fb_dma_get_scanout_buffer - Provide a scanout buffer in case of panic</div><div class='add'>+ * @plane: DRM primary plane</div><div class='add'>+ * @sb: scanout buffer for the panic handler</div><div class='add'>+ * Returns: 0 or negative error code</div><div class='add'>+ *</div><div class='add'>+ * Generic get_scanout_buffer() implementation, for drivers that uses the</div><div class='add'>+ * drm_fb_dma_helper. It won't call vmap in the panic context, so the driver</div><div class='add'>+ * should make sure the primary plane is vmapped, otherwise the panic screen</div><div class='add'>+ * won't get displayed.</div><div class='add'>+ */</div><div class='add'>+int drm_fb_dma_get_scanout_buffer(struct drm_plane *plane,</div><div class='add'>+				  struct drm_scanout_buffer *sb)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_dma_object *dma_obj;</div><div class='add'>+	struct drm_framebuffer *fb;</div><div class='add'>+</div><div class='add'>+	if (!plane-&gt;state || !plane-&gt;state-&gt;fb)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	fb = plane-&gt;state-&gt;fb;</div><div class='add'>+	/* Only support linear modifier */</div><div class='add'>+	if (fb-&gt;modifier != DRM_FORMAT_MOD_LINEAR)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	dma_obj = drm_fb_dma_get_gem_obj(fb, 0);</div><div class='add'>+</div><div class='add'>+	/* Buffer should be accessible from the CPU */</div><div class='add'>+	if (dma_obj-&gt;base.import_attach)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* Buffer should be already mapped to CPU */</div><div class='add'>+	if (!dma_obj-&gt;vaddr)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	iosys_map_set_vaddr(&amp;sb-&gt;map[0], dma_obj-&gt;vaddr);</div><div class='add'>+	sb-&gt;format = fb-&gt;format;</div><div class='add'>+	sb-&gt;height = fb-&gt;height;</div><div class='add'>+	sb-&gt;width = fb-&gt;width;</div><div class='add'>+	sb-&gt;pitch[0] = fb-&gt;pitches[0];</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_fb_dma_get_scanout_buffer);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_fbdev_generic.c b/drivers/gpu/drm/drm_fbdev_generic.c<br/>index d647d89764cb..97e579c33d84 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_fbdev_generic.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_fbdev_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_fbdev_generic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_fbdev_generic.c</a></div><div class='hunk'>@@ -113,7 +113,6 @@ static int drm_fbdev_generic_helper_fb_probe(struct drm_fb_helper *fb_helper,</div><div class='ctx'> 	/* screen */</div><div class='ctx'> 	info-&gt;flags |= FBINFO_VIRTFB | FBINFO_READS_FAST;</div><div class='ctx'> 	info-&gt;screen_buffer = screen_buffer;</div><div class='del'>-	info-&gt;fix.smem_start = page_to_phys(vmalloc_to_page(info-&gt;screen_buffer));</div><div class='ctx'> 	info-&gt;fix.smem_len = screen_size;</div><div class='ctx'> </div><div class='ctx'> 	/* deferred I/O */</div><div class='hunk'>@@ -197,14 +196,14 @@ static int drm_fbdev_generic_damage_blit(struct drm_fb_helper *fb_helper,</div><div class='ctx'> 	 */</div><div class='ctx'> 	mutex_lock(&amp;fb_helper-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	ret = drm_client_buffer_vmap(buffer, &amp;map);</div><div class='add'>+	ret = drm_client_buffer_vmap_local(buffer, &amp;map);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	dst = map;</div><div class='ctx'> 	drm_fbdev_generic_damage_blit_real(fb_helper, clip, &amp;dst);</div><div class='ctx'> </div><div class='del'>-	drm_client_buffer_vunmap(buffer);</div><div class='add'>+	drm_client_buffer_vunmap_local(buffer);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;fb_helper-&gt;lock);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c<br/>index 44a948b80ee1..d4bbc5d109c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_gem.c</a></div><div class='hunk'>@@ -1161,7 +1161,7 @@ void drm_gem_print_info(struct drm_printer *p, unsigned int indent,</div><div class='ctx'> 		obj-&gt;funcs-&gt;print_info(p, indent, obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int drm_gem_pin(struct drm_gem_object *obj)</div><div class='add'>+int drm_gem_pin_locked(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	if (obj-&gt;funcs-&gt;pin)</div><div class='ctx'> 		return obj-&gt;funcs-&gt;pin(obj);</div><div class='hunk'>@@ -1169,12 +1169,30 @@ int drm_gem_pin(struct drm_gem_object *obj)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void drm_gem_unpin(struct drm_gem_object *obj)</div><div class='add'>+void drm_gem_unpin_locked(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	if (obj-&gt;funcs-&gt;unpin)</div><div class='ctx'> 		obj-&gt;funcs-&gt;unpin(obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int drm_gem_pin(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dma_resv_lock(obj-&gt;resv, NULL);</div><div class='add'>+	ret = drm_gem_pin_locked(obj);</div><div class='add'>+	dma_resv_unlock(obj-&gt;resv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void drm_gem_unpin(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	dma_resv_lock(obj-&gt;resv, NULL);</div><div class='add'>+	drm_gem_unpin_locked(obj);</div><div class='add'>+	dma_resv_unlock(obj-&gt;resv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int drm_gem_vmap(struct drm_gem_object *obj, struct iosys_map *map)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1209,6 +1227,18 @@ void drm_gem_vunmap(struct drm_gem_object *obj, struct iosys_map *map)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_gem_vunmap);</div><div class='ctx'> </div><div class='add'>+void drm_gem_lock(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	dma_resv_lock(obj-&gt;resv, NULL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_gem_lock);</div><div class='add'>+</div><div class='add'>+void drm_gem_unlock(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	dma_resv_unlock(obj-&gt;resv);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_gem_unlock);</div><div class='add'>+</div><div class='ctx'> int drm_gem_vmap_unlocked(struct drm_gem_object *obj, struct iosys_map *map)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_gem_atomic_helper.c b/drivers/gpu/drm/drm_gem_atomic_helper.c<br/>index e440f458b663..93337543aac3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem_atomic_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem_atomic_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem_atomic_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_gem_atomic_helper.c</a></div><div class='hunk'>@@ -224,8 +224,8 @@ __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane,</div><div class='ctx'> </div><div class='ctx'> 	__drm_atomic_helper_plane_duplicate_state(plane, &amp;new_shadow_plane_state-&gt;base);</div><div class='ctx'> </div><div class='del'>-	drm_format_conv_state_copy(&amp;shadow_plane_state-&gt;fmtcnv_state,</div><div class='del'>-				   &amp;new_shadow_plane_state-&gt;fmtcnv_state);</div><div class='add'>+	drm_format_conv_state_copy(&amp;new_shadow_plane_state-&gt;fmtcnv_state,</div><div class='add'>+				   &amp;shadow_plane_state-&gt;fmtcnv_state);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__drm_gem_duplicate_shadow_plane_state);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c b/drivers/gpu/drm/drm_gem_shmem_helper.c<br/>index e435f986cd13..177773bcdbfd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem_shmem_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem_shmem_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem_shmem_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_gem_shmem_helper.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/shmem_fs.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='hunk'>@@ -228,7 +227,7 @@ void drm_gem_shmem_put_pages(struct drm_gem_shmem_object *shmem)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_gem_shmem_put_pages);</div><div class='ctx'> </div><div class='del'>-static int drm_gem_shmem_pin_locked(struct drm_gem_shmem_object *shmem)</div><div class='add'>+int drm_gem_shmem_pin_locked(struct drm_gem_shmem_object *shmem)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -238,13 +237,15 @@ static int drm_gem_shmem_pin_locked(struct drm_gem_shmem_object *shmem)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(drm_gem_shmem_pin_locked);</div><div class='ctx'> </div><div class='del'>-static void drm_gem_shmem_unpin_locked(struct drm_gem_shmem_object *shmem)</div><div class='add'>+void drm_gem_shmem_unpin_locked(struct drm_gem_shmem_object *shmem)</div><div class='ctx'> {</div><div class='ctx'> 	dma_resv_assert_held(shmem-&gt;base.resv);</div><div class='ctx'> </div><div class='ctx'> 	drm_gem_shmem_put_pages(shmem);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(drm_gem_shmem_unpin_locked);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * drm_gem_shmem_pin - Pin backing pages for a shmem GEM object</div><div class='head'>diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c<br/>index 1ac284a9e8ee..6027584406af 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem_vram_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_gem_vram_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_gem_vram_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_gem_vram_helper.c</a></div><div class='hunk'>@@ -282,6 +282,8 @@ static int drm_gem_vram_pin_locked(struct drm_gem_vram_object *gbo,</div><div class='ctx'> 	struct ttm_operation_ctx ctx = { false, false };</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	dma_resv_assert_held(gbo-&gt;bo.base.resv);</div><div class='add'>+</div><div class='ctx'> 	if (gbo-&gt;bo.pin_count)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -337,6 +339,8 @@ EXPORT_SYMBOL(drm_gem_vram_pin);</div><div class='ctx'> </div><div class='ctx'> static void drm_gem_vram_unpin_locked(struct drm_gem_vram_object *gbo)</div><div class='ctx'> {</div><div class='add'>+	dma_resv_assert_held(gbo-&gt;bo.base.resv);</div><div class='add'>+</div><div class='ctx'> 	ttm_bo_unpin(&amp;gbo-&gt;bo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -363,11 +367,28 @@ int drm_gem_vram_unpin(struct drm_gem_vram_object *gbo)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_gem_vram_unpin);</div><div class='ctx'> </div><div class='del'>-static int drm_gem_vram_kmap_locked(struct drm_gem_vram_object *gbo,</div><div class='del'>-				    struct iosys_map *map)</div><div class='add'>+/**</div><div class='add'>+ * drm_gem_vram_vmap() - Pins and maps a GEM VRAM object into kernel address</div><div class='add'>+ *                       space</div><div class='add'>+ * @gbo: The GEM VRAM object to map</div><div class='add'>+ * @map: Returns the kernel virtual address of the VRAM GEM object's backing</div><div class='add'>+ *       store.</div><div class='add'>+ *</div><div class='add'>+ * The vmap function pins a GEM VRAM object to its current location, either</div><div class='add'>+ * system or video memory, and maps its buffer into kernel address space.</div><div class='add'>+ * As pinned object cannot be relocated, you should avoid pinning objects</div><div class='add'>+ * permanently. Call drm_gem_vram_vunmap() with the returned address to</div><div class='add'>+ * unmap and unpin the GEM VRAM object.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * 0 on success, or a negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int drm_gem_vram_vmap(struct drm_gem_vram_object *gbo, struct iosys_map *map)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	dma_resv_assert_held(gbo-&gt;bo.base.resv);</div><div class='add'>+</div><div class='ctx'> 	if (gbo-&gt;vmap_use_count &gt; 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -388,12 +409,23 @@ out:</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(drm_gem_vram_vmap);</div><div class='ctx'> </div><div class='del'>-static void drm_gem_vram_kunmap_locked(struct drm_gem_vram_object *gbo,</div><div class='del'>-				       struct iosys_map *map)</div><div class='add'>+/**</div><div class='add'>+ * drm_gem_vram_vunmap() - Unmaps and unpins a GEM VRAM object</div><div class='add'>+ * @gbo: The GEM VRAM object to unmap</div><div class='add'>+ * @map: Kernel virtual address where the VRAM GEM object was mapped</div><div class='add'>+ *</div><div class='add'>+ * A call to drm_gem_vram_vunmap() unmaps and unpins a GEM VRAM buffer. See</div><div class='add'>+ * the documentation for drm_gem_vram_vmap() for more information.</div><div class='add'>+ */</div><div class='add'>+void drm_gem_vram_vunmap(struct drm_gem_vram_object *gbo,</div><div class='add'>+			 struct iosys_map *map)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = gbo-&gt;bo.base.dev;</div><div class='ctx'> </div><div class='add'>+	dma_resv_assert_held(gbo-&gt;bo.base.resv);</div><div class='add'>+</div><div class='ctx'> 	if (drm_WARN_ON_ONCE(dev, !gbo-&gt;vmap_use_count))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -410,60 +442,6 @@ static void drm_gem_vram_kunmap_locked(struct drm_gem_vram_object *gbo,</div><div class='ctx'> 	 * from memory. See drm_gem_vram_bo_driver_move_notify().</div><div class='ctx'> 	 */</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * drm_gem_vram_vmap() - Pins and maps a GEM VRAM object into kernel address</div><div class='del'>- *                       space</div><div class='del'>- * @gbo: The GEM VRAM object to map</div><div class='del'>- * @map: Returns the kernel virtual address of the VRAM GEM object's backing</div><div class='del'>- *       store.</div><div class='del'>- *</div><div class='del'>- * The vmap function pins a GEM VRAM object to its current location, either</div><div class='del'>- * system or video memory, and maps its buffer into kernel address space.</div><div class='del'>- * As pinned object cannot be relocated, you should avoid pinning objects</div><div class='del'>- * permanently. Call drm_gem_vram_vunmap() with the returned address to</div><div class='del'>- * unmap and unpin the GEM VRAM object.</div><div class='del'>- *</div><div class='del'>- * Returns:</div><div class='del'>- * 0 on success, or a negative error code otherwise.</div><div class='del'>- */</div><div class='del'>-int drm_gem_vram_vmap(struct drm_gem_vram_object *gbo, struct iosys_map *map)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dma_resv_assert_held(gbo-&gt;bo.base.resv);</div><div class='del'>-</div><div class='del'>-	ret = drm_gem_vram_pin_locked(gbo, 0);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = drm_gem_vram_kmap_locked(gbo, map);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_drm_gem_vram_unpin_locked;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_drm_gem_vram_unpin_locked:</div><div class='del'>-	drm_gem_vram_unpin_locked(gbo);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(drm_gem_vram_vmap);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * drm_gem_vram_vunmap() - Unmaps and unpins a GEM VRAM object</div><div class='del'>- * @gbo: The GEM VRAM object to unmap</div><div class='del'>- * @map: Kernel virtual address where the VRAM GEM object was mapped</div><div class='del'>- *</div><div class='del'>- * A call to drm_gem_vram_vunmap() unmaps and unpins a GEM VRAM buffer. See</div><div class='del'>- * the documentation for drm_gem_vram_vmap() for more information.</div><div class='del'>- */</div><div class='del'>-void drm_gem_vram_vunmap(struct drm_gem_vram_object *gbo,</div><div class='del'>-			 struct iosys_map *map)</div><div class='del'>-{</div><div class='del'>-	dma_resv_assert_held(gbo-&gt;bo.base.resv);</div><div class='del'>-</div><div class='del'>-	drm_gem_vram_kunmap_locked(gbo, map);</div><div class='del'>-	drm_gem_vram_unpin_locked(gbo);</div><div class='del'>-}</div><div class='ctx'> EXPORT_SYMBOL(drm_gem_vram_vunmap);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -768,7 +746,8 @@ static int drm_gem_vram_object_pin(struct drm_gem_object *gem)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_gem_vram_object *gbo = drm_gem_vram_of_gem(gem);</div><div class='ctx'> </div><div class='del'>-	/* Fbdev console emulation is the use case of these PRIME</div><div class='add'>+	/*</div><div class='add'>+	 * Fbdev console emulation is the use case of these PRIME</div><div class='ctx'> 	 * helpers. This may involve updating a hardware buffer from</div><div class='ctx'> 	 * a shadow FB. We pin the buffer to it's current location</div><div class='ctx'> 	 * (either video RAM or system memory) to prevent it from</div><div class='hunk'>@@ -776,7 +755,7 @@ static int drm_gem_vram_object_pin(struct drm_gem_object *gem)</div><div class='ctx'> 	 * the buffer to be pinned to VRAM, implement a callback that</div><div class='ctx'> 	 * sets the flags accordingly.</div><div class='ctx'> 	 */</div><div class='del'>-	return drm_gem_vram_pin(gbo, 0);</div><div class='add'>+	return drm_gem_vram_pin_locked(gbo, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -787,7 +766,7 @@ static void drm_gem_vram_object_unpin(struct drm_gem_object *gem)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_gem_vram_object *gbo = drm_gem_vram_of_gem(gem);</div><div class='ctx'> </div><div class='del'>-	drm_gem_vram_unpin(gbo);</div><div class='add'>+	drm_gem_vram_unpin_locked(gbo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h<br/>index 8e4faf0a28e6..690505a1f7a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_internal.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_internal.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_internal.h</a></div><div class='hunk'>@@ -21,6 +21,9 @@</div><div class='ctx'>  * OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#ifndef __DRM_INTERNAL_H__</div><div class='add'>+#define __DRM_INTERNAL_H__</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kthread.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -32,7 +35,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DRM_IF_VERSION(maj, min) (maj &lt;&lt; 16 | min)</div><div class='ctx'> </div><div class='del'>-struct cea_sad;</div><div class='ctx'> struct dentry;</div><div class='ctx'> struct dma_buf;</div><div class='ctx'> struct iosys_map;</div><div class='hunk'>@@ -170,6 +172,8 @@ void drm_gem_release(struct drm_device *dev, struct drm_file *file_private);</div><div class='ctx'> void drm_gem_print_info(struct drm_printer *p, unsigned int indent,</div><div class='ctx'> 			const struct drm_gem_object *obj);</div><div class='ctx'> </div><div class='add'>+int drm_gem_pin_locked(struct drm_gem_object *obj);</div><div class='add'>+void drm_gem_unpin_locked(struct drm_gem_object *obj);</div><div class='ctx'> int drm_gem_pin(struct drm_gem_object *obj);</div><div class='ctx'> void drm_gem_unpin(struct drm_gem_object *obj);</div><div class='ctx'> int drm_gem_vmap(struct drm_gem_object *obj, struct iosys_map *map);</div><div class='hunk'>@@ -273,6 +277,4 @@ void drm_framebuffer_print_info(struct drm_printer *p, unsigned int indent,</div><div class='ctx'> 				const struct drm_framebuffer *fb);</div><div class='ctx'> void drm_framebuffer_debugfs_init(struct drm_device *dev);</div><div class='ctx'> </div><div class='del'>-/* drm_edid.c */</div><div class='del'>-void drm_edid_cta_sad_get(const struct cea_sad *cta_sad, u8 *sad);</div><div class='del'>-void drm_edid_cta_sad_set(struct cea_sad *cta_sad, const u8 *sad);</div><div class='add'>+#endif /* __DRM_INTERNAL_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c<br/>index ef6e416522f8..795001bb7ff1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_mipi_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_mipi_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_mipi_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_mipi_dsi.c</a></div><div class='hunk'>@@ -645,29 +645,56 @@ int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,</div><div class='ctx'> EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral</div><div class='add'>+ * mipi_dsi_compression_mode_ext() - enable/disable DSC on the peripheral</div><div class='ctx'>  * @dsi: DSI peripheral device</div><div class='ctx'>  * @enable: Whether to enable or disable the DSC</div><div class='add'>+ * @algo: Selected compression algorithm</div><div class='add'>+ * @pps_selector: Select PPS from the table of pre-stored or uploaded PPS entries</div><div class='ctx'>  *</div><div class='del'>- * Enable or disable Display Stream Compression on the peripheral using the</div><div class='del'>- * default Picture Parameter Set and VESA DSC 1.1 algorithm.</div><div class='add'>+ * Enable or disable Display Stream Compression on the peripheral.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: 0 on success or a negative error code on failure.</div><div class='ctx'>  */</div><div class='del'>-ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable)</div><div class='add'>+int mipi_dsi_compression_mode_ext(struct mipi_dsi_device *dsi, bool enable,</div><div class='add'>+				  enum mipi_dsi_compression_algo algo,</div><div class='add'>+				  unsigned int pps_selector)</div><div class='ctx'> {</div><div class='del'>-	/* Note: Needs updating for non-default PPS or algorithm */</div><div class='del'>-	u8 tx[2] = { enable &lt;&lt; 0, 0 };</div><div class='add'>+	u8 tx[2] = { };</div><div class='ctx'> 	struct mipi_dsi_msg msg = {</div><div class='ctx'> 		.channel = dsi-&gt;channel,</div><div class='ctx'> 		.type = MIPI_DSI_COMPRESSION_MODE,</div><div class='ctx'> 		.tx_len = sizeof(tx),</div><div class='ctx'> 		.tx_buf = tx,</div><div class='ctx'> 	};</div><div class='del'>-	int ret = mipi_dsi_device_transfer(dsi, &amp;msg);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (algo &gt; 3 || pps_selector &gt; 3)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tx[0] = (enable &lt;&lt; 0) |</div><div class='add'>+		(algo &lt;&lt; 1) |</div><div class='add'>+		(pps_selector &lt;&lt; 4);</div><div class='add'>+</div><div class='add'>+	ret = mipi_dsi_device_transfer(dsi, &amp;msg);</div><div class='ctx'> </div><div class='ctx'> 	return (ret &lt; 0) ? ret : 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(mipi_dsi_compression_mode_ext);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral</div><div class='add'>+ * @dsi: DSI peripheral device</div><div class='add'>+ * @enable: Whether to enable or disable the DSC</div><div class='add'>+ *</div><div class='add'>+ * Enable or disable Display Stream Compression on the peripheral using the</div><div class='add'>+ * default Picture Parameter Set and VESA DSC 1.1 algorithm.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable)</div><div class='add'>+{</div><div class='add'>+	return mipi_dsi_compression_mode_ext(dsi, enable, MIPI_DSI_COMPRESSION_DSC, 0);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(mipi_dsi_compression_mode);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -679,8 +706,8 @@ EXPORT_SYMBOL(mipi_dsi_compression_mode);</div><div class='ctx'>  *</div><div class='ctx'>  * Return: 0 on success or a negative error code on failure.</div><div class='ctx'>  */</div><div class='del'>-ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,</div><div class='del'>-				       const struct drm_dsc_picture_parameter_set *pps)</div><div class='add'>+int mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,</div><div class='add'>+				   const struct drm_dsc_picture_parameter_set *pps)</div><div class='ctx'> {</div><div class='ctx'> 	struct mipi_dsi_msg msg = {</div><div class='ctx'> 		.channel = dsi-&gt;channel,</div><div class='head'>diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c<br/>index 48fd2d67f352..568972258222 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_mode_config.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_mode_config.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_mode_config.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_mode_config.c</a></div><div class='hunk'>@@ -372,6 +372,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	dev-&gt;mode_config.modifiers_property = prop;</div><div class='ctx'> </div><div class='add'>+	prop = drm_property_create(dev,</div><div class='add'>+				   DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB,</div><div class='add'>+				   "SIZE_HINTS", 0);</div><div class='add'>+	if (!prop)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	dev-&gt;mode_config.size_hints_property = prop;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c<br/>index c4f88c3a93b7..2d8b0371619d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_modes.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_modes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_modes.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_modes.c</a></div><div class='hunk'>@@ -373,8 +373,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> 	if (!bt601 &amp;&amp;</div><div class='ctx'> 	    (hact_duration_ns &lt; params-&gt;hact_ns.min ||</div><div class='ctx'> 	     hact_duration_ns &gt; params-&gt;hact_ns.max)) {</div><div class='del'>-		DRM_ERROR("Invalid horizontal active area duration: %uns (min: %u, max %u)\n",</div><div class='del'>-			  hact_duration_ns, params-&gt;hact_ns.min, params-&gt;hact_ns.max);</div><div class='add'>+		drm_err(dev, "Invalid horizontal active area duration: %uns (min: %u, max %u)\n",</div><div class='add'>+			hact_duration_ns, params-&gt;hact_ns.min, params-&gt;hact_ns.max);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -385,8 +385,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> 	if (!bt601 &amp;&amp;</div><div class='ctx'> 	    (hblk_duration_ns &lt; params-&gt;hblk_ns.min ||</div><div class='ctx'> 	     hblk_duration_ns &gt; params-&gt;hblk_ns.max)) {</div><div class='del'>-		DRM_ERROR("Invalid horizontal blanking duration: %uns (min: %u, max %u)\n",</div><div class='del'>-			  hblk_duration_ns, params-&gt;hblk_ns.min, params-&gt;hblk_ns.max);</div><div class='add'>+		drm_err(dev, "Invalid horizontal blanking duration: %uns (min: %u, max %u)\n",</div><div class='add'>+			hblk_duration_ns, params-&gt;hblk_ns.min, params-&gt;hblk_ns.max);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -397,8 +397,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> 	if (!bt601 &amp;&amp;</div><div class='ctx'> 	    (hslen_duration_ns &lt; params-&gt;hslen_ns.min ||</div><div class='ctx'> 	     hslen_duration_ns &gt; params-&gt;hslen_ns.max)) {</div><div class='del'>-		DRM_ERROR("Invalid horizontal sync duration: %uns (min: %u, max %u)\n",</div><div class='del'>-			  hslen_duration_ns, params-&gt;hslen_ns.min, params-&gt;hslen_ns.max);</div><div class='add'>+		drm_err(dev, "Invalid horizontal sync duration: %uns (min: %u, max %u)\n",</div><div class='add'>+			hslen_duration_ns, params-&gt;hslen_ns.min, params-&gt;hslen_ns.max);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -409,7 +409,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> 	if (!bt601 &amp;&amp;</div><div class='ctx'> 	    (porches_duration_ns &gt; (params-&gt;hfp_ns.max + params-&gt;hbp_ns.max) ||</div><div class='ctx'> 	     porches_duration_ns &lt; (params-&gt;hfp_ns.min + params-&gt;hbp_ns.min))) {</div><div class='del'>-		DRM_ERROR("Invalid horizontal porches duration: %uns\n", porches_duration_ns);</div><div class='add'>+		drm_err(dev, "Invalid horizontal porches duration: %uns\n",</div><div class='add'>+			porches_duration_ns);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -431,8 +432,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> 	if (!bt601 &amp;&amp;</div><div class='ctx'> 	    (hfp_duration_ns &lt; params-&gt;hfp_ns.min ||</div><div class='ctx'> 	     hfp_duration_ns &gt; params-&gt;hfp_ns.max)) {</div><div class='del'>-		DRM_ERROR("Invalid horizontal front porch duration: %uns (min: %u, max %u)\n",</div><div class='del'>-			  hfp_duration_ns, params-&gt;hfp_ns.min, params-&gt;hfp_ns.max);</div><div class='add'>+		drm_err(dev, "Invalid horizontal front porch duration: %uns (min: %u, max %u)\n",</div><div class='add'>+			hfp_duration_ns, params-&gt;hfp_ns.min, params-&gt;hfp_ns.max);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -443,8 +444,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> 	if (!bt601 &amp;&amp;</div><div class='ctx'> 	    (hbp_duration_ns &lt; params-&gt;hbp_ns.min ||</div><div class='ctx'> 	     hbp_duration_ns &gt; params-&gt;hbp_ns.max)) {</div><div class='del'>-		DRM_ERROR("Invalid horizontal back porch duration: %uns (min: %u, max %u)\n",</div><div class='del'>-			  hbp_duration_ns, params-&gt;hbp_ns.min, params-&gt;hbp_ns.max);</div><div class='add'>+		drm_err(dev, "Invalid horizontal back porch duration: %uns (min: %u, max %u)\n",</div><div class='add'>+			hbp_duration_ns, params-&gt;hbp_ns.min, params-&gt;hbp_ns.max);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -495,8 +496,8 @@ static int fill_analog_mode(struct drm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	vtotal = vactive + vfp + vslen + vbp;</div><div class='ctx'> 	if (params-&gt;num_lines != vtotal) {</div><div class='del'>-		DRM_ERROR("Invalid vertical total: %upx (expected %upx)\n",</div><div class='del'>-			  vtotal, params-&gt;num_lines);</div><div class='add'>+		drm_err(dev, "Invalid vertical total: %upx (expected %upx)\n",</div><div class='add'>+			vtotal, params-&gt;num_lines);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1200,9 +1201,8 @@ int of_get_drm_display_mode(struct device_node *np,</div><div class='ctx'> 	if (bus_flags)</div><div class='ctx'> 		drm_bus_flags_from_videomode(&amp;vm, bus_flags);</div><div class='ctx'> </div><div class='del'>-	pr_debug("%pOF: got %dx%d display mode\n",</div><div class='del'>-		np, vm.hactive, vm.vactive);</div><div class='del'>-	drm_mode_debug_printmodeline(dmode);</div><div class='add'>+	pr_debug("%pOF: got %dx%d display mode: " DRM_MODE_FMT "\n",</div><div class='add'>+		 np, vm.hactive, vm.vactive, DRM_MODE_ARG(dmode));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1250,7 +1250,7 @@ int of_get_drm_panel_display_mode(struct device_node *np,</div><div class='ctx'> 	dmode-&gt;width_mm = width_mm;</div><div class='ctx'> 	dmode-&gt;height_mm = height_mm;</div><div class='ctx'> </div><div class='del'>-	drm_mode_debug_printmodeline(dmode);</div><div class='add'>+	pr_debug(DRM_MODE_FMT "\n", DRM_MODE_ARG(dmode));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1812,10 +1812,8 @@ void drm_mode_prune_invalid(struct drm_device *dev,</div><div class='ctx'> 					 DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));</div><div class='ctx'> 			}</div><div class='ctx'> 			if (verbose) {</div><div class='del'>-				drm_mode_debug_printmodeline(mode);</div><div class='del'>-				DRM_DEBUG_KMS("Not using %s mode: %s\n",</div><div class='del'>-					      mode-&gt;name,</div><div class='del'>-					      drm_get_mode_status_name(mode-&gt;status));</div><div class='add'>+				drm_dbg_kms(dev, "Rejected mode: " DRM_MODE_FMT " (%s)\n",</div><div class='add'>+					    DRM_MODE_ARG(mode), drm_get_mode_status_name(mode-&gt;status));</div><div class='ctx'> 			}</div><div class='ctx'> 			drm_mode_destroy(dev, mode);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/drm_panic.c b/drivers/gpu/drm/drm_panic.c<br/>new file mode 100644<br/>index 000000000000..7ece67086cec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_panic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_panic.c</a></div><div class='hunk'>@@ -0,0 +1,585 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 or MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Red Hat.</div><div class='add'>+ * Author: Jocelyn Falempe &lt;jfalempe@redhat.com&gt;</div><div class='add'>+ * inspired by the drm_log driver from David Herrmann &lt;dh.herrmann@gmail.com&gt;</div><div class='add'>+ * Tux Ascii art taken from cowsay written by Tony Monroe</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/font.h&gt;</div><div class='add'>+#include &lt;linux/iosys-map.h&gt;</div><div class='add'>+#include &lt;linux/kdebug.h&gt;</div><div class='add'>+#include &lt;linux/kmsg_dump.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_drv.h&gt;</div><div class='add'>+#include &lt;drm/drm_format_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_fourcc.h&gt;</div><div class='add'>+#include &lt;drm/drm_framebuffer.h&gt;</div><div class='add'>+#include &lt;drm/drm_modeset_helper_vtables.h&gt;</div><div class='add'>+#include &lt;drm/drm_panic.h&gt;</div><div class='add'>+#include &lt;drm/drm_plane.h&gt;</div><div class='add'>+#include &lt;drm/drm_print.h&gt;</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Jocelyn Falempe");</div><div class='add'>+MODULE_DESCRIPTION("DRM panic handler");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: overview</div><div class='add'>+ *</div><div class='add'>+ * To enable DRM panic for a driver, the primary plane must implement a</div><div class='add'>+ * &amp;drm_plane_helper_funcs.get_scanout_buffer helper function. It is then</div><div class='add'>+ * automatically registered to the drm panic handler.</div><div class='add'>+ * When a panic occurs, the &amp;drm_plane_helper_funcs.get_scanout_buffer will be</div><div class='add'>+ * called, and the driver can provide a framebuffer so the panic handler can</div><div class='add'>+ * draw the panic screen on it. Currently only linear buffer and a few color</div><div class='add'>+ * formats are supported.</div><div class='add'>+ * Optionally the driver can also provide a &amp;drm_plane_helper_funcs.panic_flush</div><div class='add'>+ * callback, that will be called after that, to send additional commands to the</div><div class='add'>+ * hardware to make the scanout buffer visible.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This module displays a user friendly message on screen when a kernel panic</div><div class='add'>+ * occurs. This is conflicting with fbcon, so you can only enable it when fbcon</div><div class='add'>+ * is disabled.</div><div class='add'>+ * It's intended for end-user, so have minimal technical/debug information.</div><div class='add'>+ *</div><div class='add'>+ * Implementation details:</div><div class='add'>+ *</div><div class='add'>+ * It is a panic handler, so it can't take lock, allocate memory, run tasks/irq,</div><div class='add'>+ * or attempt to sleep. It's a best effort, and it may not be able to display</div><div class='add'>+ * the message in all situations (like if the panic occurs in the middle of a</div><div class='add'>+ * modesetting).</div><div class='add'>+ * It will display only one static frame, so performance optimizations are low</div><div class='add'>+ * priority as the machine is already in an unusable state.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct drm_panic_line {</div><div class='add'>+	u32 len;</div><div class='add'>+	const char *txt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PANIC_LINE(s) {.len = sizeof(s) - 1, .txt = s}</div><div class='add'>+</div><div class='add'>+static struct drm_panic_line panic_msg[] = {</div><div class='add'>+	PANIC_LINE("KERNEL PANIC !"),</div><div class='add'>+	PANIC_LINE(""),</div><div class='add'>+	PANIC_LINE("Please reboot your computer."),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_panic_line logo[] = {</div><div class='add'>+	PANIC_LINE("     .--.        _"),</div><div class='add'>+	PANIC_LINE("    |o_o |      | |"),</div><div class='add'>+	PANIC_LINE("    |:_/ |      | |"),</div><div class='add'>+	PANIC_LINE("   //   \\ \\     |_|"),</div><div class='add'>+	PANIC_LINE("  (|     | )     _"),</div><div class='add'>+	PANIC_LINE(" /'\\_   _/`\\    (_)"),</div><div class='add'>+	PANIC_LINE(" \\___)=(___/"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Color conversion</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static u16 convert_xrgb8888_to_rgb565(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return ((pix &amp; 0x00F80000) &gt;&gt; 8) |</div><div class='add'>+	       ((pix &amp; 0x0000FC00) &gt;&gt; 5) |</div><div class='add'>+	       ((pix &amp; 0x000000F8) &gt;&gt; 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 convert_xrgb8888_to_rgba5551(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return ((pix &amp; 0x00f80000) &gt;&gt; 8) |</div><div class='add'>+	       ((pix &amp; 0x0000f800) &gt;&gt; 5) |</div><div class='add'>+	       ((pix &amp; 0x000000f8) &gt;&gt; 2) |</div><div class='add'>+	       BIT(0); /* set alpha bit */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 convert_xrgb8888_to_xrgb1555(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return ((pix &amp; 0x00f80000) &gt;&gt; 9) |</div><div class='add'>+	       ((pix &amp; 0x0000f800) &gt;&gt; 6) |</div><div class='add'>+	       ((pix &amp; 0x000000f8) &gt;&gt; 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 convert_xrgb8888_to_argb1555(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return BIT(15) | /* set alpha bit */</div><div class='add'>+	       ((pix &amp; 0x00f80000) &gt;&gt; 9) |</div><div class='add'>+	       ((pix &amp; 0x0000f800) &gt;&gt; 6) |</div><div class='add'>+	       ((pix &amp; 0x000000f8) &gt;&gt; 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_xrgb8888_to_argb8888(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return pix | GENMASK(31, 24); /* fill alpha bits */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_xrgb8888_to_xbgr8888(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return ((pix &amp; 0x00ff0000) &gt;&gt; 16) &lt;&lt;  0 |</div><div class='add'>+	       ((pix &amp; 0x0000ff00) &gt;&gt;  8) &lt;&lt;  8 |</div><div class='add'>+	       ((pix &amp; 0x000000ff) &gt;&gt;  0) &lt;&lt; 16 |</div><div class='add'>+	       ((pix &amp; 0xff000000) &gt;&gt; 24) &lt;&lt; 24;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_xrgb8888_to_abgr8888(u32 pix)</div><div class='add'>+{</div><div class='add'>+	return ((pix &amp; 0x00ff0000) &gt;&gt; 16) &lt;&lt;  0 |</div><div class='add'>+	       ((pix &amp; 0x0000ff00) &gt;&gt;  8) &lt;&lt;  8 |</div><div class='add'>+	       ((pix &amp; 0x000000ff) &gt;&gt;  0) &lt;&lt; 16 |</div><div class='add'>+	       GENMASK(31, 24); /* fill alpha bits */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_xrgb8888_to_xrgb2101010(u32 pix)</div><div class='add'>+{</div><div class='add'>+	pix = ((pix &amp; 0x000000FF) &lt;&lt; 2) |</div><div class='add'>+	      ((pix &amp; 0x0000FF00) &lt;&lt; 4) |</div><div class='add'>+	      ((pix &amp; 0x00FF0000) &lt;&lt; 6);</div><div class='add'>+	return pix | ((pix &gt;&gt; 8) &amp; 0x00300C03);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_xrgb8888_to_argb2101010(u32 pix)</div><div class='add'>+{</div><div class='add'>+	pix = ((pix &amp; 0x000000FF) &lt;&lt; 2) |</div><div class='add'>+	      ((pix &amp; 0x0000FF00) &lt;&lt; 4) |</div><div class='add'>+	      ((pix &amp; 0x00FF0000) &lt;&lt; 6);</div><div class='add'>+	return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix &gt;&gt; 8) &amp; 0x00300C03);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * convert_from_xrgb8888 - convert one pixel from xrgb8888 to the desired format</div><div class='add'>+ * @color: input color, in xrgb8888 format</div><div class='add'>+ * @format: output format</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * Color in the format specified, casted to u32.</div><div class='add'>+ * Or 0 if the format is not supported.</div><div class='add'>+ */</div><div class='add'>+static u32 convert_from_xrgb8888(u32 color, u32 format)</div><div class='add'>+{</div><div class='add'>+	switch (format) {</div><div class='add'>+	case DRM_FORMAT_RGB565:</div><div class='add'>+		return convert_xrgb8888_to_rgb565(color);</div><div class='add'>+	case DRM_FORMAT_RGBA5551:</div><div class='add'>+		return convert_xrgb8888_to_rgba5551(color);</div><div class='add'>+	case DRM_FORMAT_XRGB1555:</div><div class='add'>+		return convert_xrgb8888_to_xrgb1555(color);</div><div class='add'>+	case DRM_FORMAT_ARGB1555:</div><div class='add'>+		return convert_xrgb8888_to_argb1555(color);</div><div class='add'>+	case DRM_FORMAT_RGB888:</div><div class='add'>+	case DRM_FORMAT_XRGB8888:</div><div class='add'>+		return color;</div><div class='add'>+	case DRM_FORMAT_ARGB8888:</div><div class='add'>+		return convert_xrgb8888_to_argb8888(color);</div><div class='add'>+	case DRM_FORMAT_XBGR8888:</div><div class='add'>+		return convert_xrgb8888_to_xbgr8888(color);</div><div class='add'>+	case DRM_FORMAT_ABGR8888:</div><div class='add'>+		return convert_xrgb8888_to_abgr8888(color);</div><div class='add'>+	case DRM_FORMAT_XRGB2101010:</div><div class='add'>+		return convert_xrgb8888_to_xrgb2101010(color);</div><div class='add'>+	case DRM_FORMAT_ARGB2101010:</div><div class='add'>+		return convert_xrgb8888_to_argb2101010(color);</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "Can't convert to %p4cc\n", &amp;format);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Blit &amp; Fill</div><div class='add'>+ */</div><div class='add'>+static void drm_panic_blit16(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			     const u8 *sbuf8, unsigned int spitch,</div><div class='add'>+			     unsigned int height, unsigned int width,</div><div class='add'>+			     u16 fg16, u16 bg16)</div><div class='add'>+{</div><div class='add'>+	unsigned int y, x;</div><div class='add'>+	u16 val16;</div><div class='add'>+</div><div class='add'>+	for (y = 0; y &lt; height; y++) {</div><div class='add'>+		for (x = 0; x &lt; width; x++) {</div><div class='add'>+			val16 = (sbuf8[(y * spitch) + x / 8] &amp; (0x80 &gt;&gt; (x % 8))) ? fg16 : bg16;</div><div class='add'>+			iosys_map_wr(dmap, y * dpitch + x * sizeof(u16), u16, val16);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_panic_blit24(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			     const u8 *sbuf8, unsigned int spitch,</div><div class='add'>+			     unsigned int height, unsigned int width,</div><div class='add'>+			     u32 fg32, u32 bg32)</div><div class='add'>+{</div><div class='add'>+	unsigned int y, x;</div><div class='add'>+	u32 val32;</div><div class='add'>+</div><div class='add'>+	for (y = 0; y &lt; height; y++) {</div><div class='add'>+		for (x = 0; x &lt; width; x++) {</div><div class='add'>+			u32 off = y * dpitch + x * 3;</div><div class='add'>+</div><div class='add'>+			val32 = (sbuf8[(y * spitch) + x / 8] &amp; (0x80 &gt;&gt; (x % 8))) ? fg32 : bg32;</div><div class='add'>+</div><div class='add'>+			/* write blue-green-red to output in little endianness */</div><div class='add'>+			iosys_map_wr(dmap, off, u8, (val32 &amp; 0x000000FF) &gt;&gt; 0);</div><div class='add'>+			iosys_map_wr(dmap, off + 1, u8, (val32 &amp; 0x0000FF00) &gt;&gt; 8);</div><div class='add'>+			iosys_map_wr(dmap, off + 2, u8, (val32 &amp; 0x00FF0000) &gt;&gt; 16);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_panic_blit32(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			     const u8 *sbuf8, unsigned int spitch,</div><div class='add'>+			     unsigned int height, unsigned int width,</div><div class='add'>+			     u32 fg32, u32 bg32)</div><div class='add'>+{</div><div class='add'>+	unsigned int y, x;</div><div class='add'>+	u32 val32;</div><div class='add'>+</div><div class='add'>+	for (y = 0; y &lt; height; y++) {</div><div class='add'>+		for (x = 0; x &lt; width; x++) {</div><div class='add'>+			val32 = (sbuf8[(y * spitch) + x / 8] &amp; (0x80 &gt;&gt; (x % 8))) ? fg32 : bg32;</div><div class='add'>+			iosys_map_wr(dmap, y * dpitch + x * sizeof(u32), u32, val32);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * drm_panic_blit - convert a monochrome image to a linear framebuffer</div><div class='add'>+ * @dmap: destination iosys_map</div><div class='add'>+ * @dpitch: destination pitch in bytes</div><div class='add'>+ * @sbuf8: source buffer, in monochrome format, 8 pixels per byte.</div><div class='add'>+ * @spitch: source pitch in bytes</div><div class='add'>+ * @height: height of the image to copy, in pixels</div><div class='add'>+ * @width: width of the image to copy, in pixels</div><div class='add'>+ * @fg_color: foreground color, in destination format</div><div class='add'>+ * @bg_color: background color, in destination format</div><div class='add'>+ * @pixel_width: pixel width in bytes.</div><div class='add'>+ *</div><div class='add'>+ * This can be used to draw a font character, which is a monochrome image, to a</div><div class='add'>+ * framebuffer in other supported format.</div><div class='add'>+ */</div><div class='add'>+static void drm_panic_blit(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			   const u8 *sbuf8, unsigned int spitch,</div><div class='add'>+			   unsigned int height, unsigned int width,</div><div class='add'>+			   u32 fg_color, u32 bg_color,</div><div class='add'>+			   unsigned int pixel_width)</div><div class='add'>+{</div><div class='add'>+	switch (pixel_width) {</div><div class='add'>+	case 2:</div><div class='add'>+		drm_panic_blit16(dmap, dpitch, sbuf8, spitch,</div><div class='add'>+				 height, width, fg_color, bg_color);</div><div class='add'>+	break;</div><div class='add'>+	case 3:</div><div class='add'>+		drm_panic_blit24(dmap, dpitch, sbuf8, spitch,</div><div class='add'>+				 height, width, fg_color, bg_color);</div><div class='add'>+	break;</div><div class='add'>+	case 4:</div><div class='add'>+		drm_panic_blit32(dmap, dpitch, sbuf8, spitch,</div><div class='add'>+				 height, width, fg_color, bg_color);</div><div class='add'>+	break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "Can't blit with pixel width %d\n", pixel_width);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_panic_fill16(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			     unsigned int height, unsigned int width,</div><div class='add'>+			     u16 color)</div><div class='add'>+{</div><div class='add'>+	unsigned int y, x;</div><div class='add'>+</div><div class='add'>+	for (y = 0; y &lt; height; y++)</div><div class='add'>+		for (x = 0; x &lt; width; x++)</div><div class='add'>+			iosys_map_wr(dmap, y * dpitch + x * sizeof(u16), u16, color);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_panic_fill24(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			     unsigned int height, unsigned int width,</div><div class='add'>+			     u32 color)</div><div class='add'>+{</div><div class='add'>+	unsigned int y, x;</div><div class='add'>+</div><div class='add'>+	for (y = 0; y &lt; height; y++) {</div><div class='add'>+		for (x = 0; x &lt; width; x++) {</div><div class='add'>+			unsigned int off = y * dpitch + x * 3;</div><div class='add'>+</div><div class='add'>+			/* write blue-green-red to output in little endianness */</div><div class='add'>+			iosys_map_wr(dmap, off, u8, (color &amp; 0x000000FF) &gt;&gt; 0);</div><div class='add'>+			iosys_map_wr(dmap, off + 1, u8, (color &amp; 0x0000FF00) &gt;&gt; 8);</div><div class='add'>+			iosys_map_wr(dmap, off + 2, u8, (color &amp; 0x00FF0000) &gt;&gt; 16);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_panic_fill32(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			     unsigned int height, unsigned int width,</div><div class='add'>+			     u32 color)</div><div class='add'>+{</div><div class='add'>+	unsigned int y, x;</div><div class='add'>+</div><div class='add'>+	for (y = 0; y &lt; height; y++)</div><div class='add'>+		for (x = 0; x &lt; width; x++)</div><div class='add'>+			iosys_map_wr(dmap, y * dpitch + x * sizeof(u32), u32, color);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * drm_panic_fill - Fill a rectangle with a color</div><div class='add'>+ * @dmap: destination iosys_map, pointing to the top left corner of the rectangle</div><div class='add'>+ * @dpitch: destination pitch in bytes</div><div class='add'>+ * @height: height of the rectangle, in pixels</div><div class='add'>+ * @width: width of the rectangle, in pixels</div><div class='add'>+ * @color: color to fill the rectangle.</div><div class='add'>+ * @pixel_width: pixel width in bytes</div><div class='add'>+ *</div><div class='add'>+ * Fill a rectangle with a color, in a linear framebuffer.</div><div class='add'>+ */</div><div class='add'>+static void drm_panic_fill(struct iosys_map *dmap, unsigned int dpitch,</div><div class='add'>+			   unsigned int height, unsigned int width,</div><div class='add'>+			   u32 color, unsigned int pixel_width)</div><div class='add'>+{</div><div class='add'>+	switch (pixel_width) {</div><div class='add'>+	case 2:</div><div class='add'>+		drm_panic_fill16(dmap, dpitch, height, width, color);</div><div class='add'>+	break;</div><div class='add'>+	case 3:</div><div class='add'>+		drm_panic_fill24(dmap, dpitch, height, width, color);</div><div class='add'>+	break;</div><div class='add'>+	case 4:</div><div class='add'>+		drm_panic_fill32(dmap, dpitch, height, width, color);</div><div class='add'>+	break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "Can't fill with pixel width %d\n", pixel_width);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u8 *get_char_bitmap(const struct font_desc *font, char c, size_t font_pitch)</div><div class='add'>+{</div><div class='add'>+	return font-&gt;data + (c * font-&gt;height) * font_pitch;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int get_max_line_len(const struct drm_panic_line *lines, int len)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned int max = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++)</div><div class='add'>+		max = max(lines[i].len, max);</div><div class='add'>+	return max;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Draw a text in a rectangle on a framebuffer. The text is truncated if it overflows the rectangle</div><div class='add'>+ */</div><div class='add'>+static void draw_txt_rectangle(struct drm_scanout_buffer *sb,</div><div class='add'>+			       const struct font_desc *font,</div><div class='add'>+			       const struct drm_panic_line *msg,</div><div class='add'>+			       unsigned int msg_lines,</div><div class='add'>+			       bool centered,</div><div class='add'>+			       struct drm_rect *clip,</div><div class='add'>+			       u32 fg_color,</div><div class='add'>+			       u32 bg_color)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+	const u8 *src;</div><div class='add'>+	size_t font_pitch = DIV_ROUND_UP(font-&gt;width, 8);</div><div class='add'>+	struct iosys_map dst;</div><div class='add'>+	unsigned int px_width = sb-&gt;format-&gt;cpp[0];</div><div class='add'>+	int left = 0;</div><div class='add'>+</div><div class='add'>+	msg_lines = min(msg_lines,  drm_rect_height(clip) / font-&gt;height);</div><div class='add'>+	for (i = 0; i &lt; msg_lines; i++) {</div><div class='add'>+		size_t line_len = min(msg[i].len, drm_rect_width(clip) / font-&gt;width);</div><div class='add'>+</div><div class='add'>+		if (centered)</div><div class='add'>+			left = (drm_rect_width(clip) - (line_len * font-&gt;width)) / 2;</div><div class='add'>+</div><div class='add'>+		dst = sb-&gt;map[0];</div><div class='add'>+		iosys_map_incr(&amp;dst, (clip-&gt;y1 + i * font-&gt;height) * sb-&gt;pitch[0] +</div><div class='add'>+				     (clip-&gt;x1 + left) * px_width);</div><div class='add'>+		for (j = 0; j &lt; line_len; j++) {</div><div class='add'>+			src = get_char_bitmap(font, msg[i].txt[j], font_pitch);</div><div class='add'>+			drm_panic_blit(&amp;dst, sb-&gt;pitch[0], src, font_pitch,</div><div class='add'>+				       font-&gt;height, font-&gt;width,</div><div class='add'>+				       fg_color, bg_color, px_width);</div><div class='add'>+			iosys_map_incr(&amp;dst, font-&gt;width * px_width);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Draw the panic message at the center of the screen</div><div class='add'>+ */</div><div class='add'>+static void draw_panic_static(struct drm_scanout_buffer *sb)</div><div class='add'>+{</div><div class='add'>+	size_t msg_lines = ARRAY_SIZE(panic_msg);</div><div class='add'>+	size_t logo_lines = ARRAY_SIZE(logo);</div><div class='add'>+	u32 fg_color = CONFIG_DRM_PANIC_FOREGROUND_COLOR;</div><div class='add'>+	u32 bg_color = CONFIG_DRM_PANIC_BACKGROUND_COLOR;</div><div class='add'>+	const struct font_desc *font = get_default_font(sb-&gt;width, sb-&gt;height, NULL, NULL);</div><div class='add'>+	struct drm_rect r_logo, r_msg;</div><div class='add'>+</div><div class='add'>+	if (!font)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fg_color = convert_from_xrgb8888(fg_color, sb-&gt;format-&gt;format);</div><div class='add'>+	bg_color = convert_from_xrgb8888(bg_color, sb-&gt;format-&gt;format);</div><div class='add'>+</div><div class='add'>+	r_logo = DRM_RECT_INIT(0, 0,</div><div class='add'>+			       get_max_line_len(logo, logo_lines) * font-&gt;width,</div><div class='add'>+			       logo_lines * font-&gt;height);</div><div class='add'>+	r_msg = DRM_RECT_INIT(0, 0,</div><div class='add'>+			      min(get_max_line_len(panic_msg, msg_lines) * font-&gt;width, sb-&gt;width),</div><div class='add'>+			      min(msg_lines * font-&gt;height, sb-&gt;height));</div><div class='add'>+</div><div class='add'>+	/* Center the panic message */</div><div class='add'>+	drm_rect_translate(&amp;r_msg, (sb-&gt;width - r_msg.x2) / 2, (sb-&gt;height - r_msg.y2) / 2);</div><div class='add'>+</div><div class='add'>+	/* Fill with the background color, and draw text on top */</div><div class='add'>+	drm_panic_fill(&amp;sb-&gt;map[0], sb-&gt;pitch[0], sb-&gt;height, sb-&gt;width,</div><div class='add'>+		       bg_color, sb-&gt;format-&gt;cpp[0]);</div><div class='add'>+</div><div class='add'>+	if ((r_msg.x1 &gt;= drm_rect_width(&amp;r_logo) || r_msg.y1 &gt;= drm_rect_height(&amp;r_logo)) &amp;&amp;</div><div class='add'>+	    drm_rect_width(&amp;r_logo) &lt; sb-&gt;width &amp;&amp; drm_rect_height(&amp;r_logo) &lt; sb-&gt;height) {</div><div class='add'>+		draw_txt_rectangle(sb, font, logo, logo_lines, false, &amp;r_logo, fg_color, bg_color);</div><div class='add'>+	}</div><div class='add'>+	draw_txt_rectangle(sb, font, panic_msg, msg_lines, true, &amp;r_msg, fg_color, bg_color);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * drm_panic_is_format_supported()</div><div class='add'>+ * @format: a fourcc color code</div><div class='add'>+ * Returns: true if supported, false otherwise.</div><div class='add'>+ *</div><div class='add'>+ * Check if drm_panic will be able to use this color format.</div><div class='add'>+ */</div><div class='add'>+static bool drm_panic_is_format_supported(const struct drm_format_info *format)</div><div class='add'>+{</div><div class='add'>+	if (format-&gt;num_planes != 1)</div><div class='add'>+		return false;</div><div class='add'>+	return convert_from_xrgb8888(0xffffff, format-&gt;format) != 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void draw_panic_plane(struct drm_plane *plane)</div><div class='add'>+{</div><div class='add'>+	struct drm_scanout_buffer sb;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!drm_panic_trylock(plane-&gt;dev, flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = plane-&gt;helper_private-&gt;get_scanout_buffer(plane, &amp;sb);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; drm_panic_is_format_supported(sb.format)) {</div><div class='add'>+		draw_panic_static(&amp;sb);</div><div class='add'>+		if (plane-&gt;helper_private-&gt;panic_flush)</div><div class='add'>+			plane-&gt;helper_private-&gt;panic_flush(plane);</div><div class='add'>+	}</div><div class='add'>+	drm_panic_unlock(plane-&gt;dev, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_plane *to_drm_plane(struct kmsg_dumper *kd)</div><div class='add'>+{</div><div class='add'>+	return container_of(kd, struct drm_plane, kmsg_panic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_panic(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason)</div><div class='add'>+{</div><div class='add'>+	struct drm_plane *plane = to_drm_plane(dumper);</div><div class='add'>+</div><div class='add'>+	if (reason == KMSG_DUMP_PANIC)</div><div class='add'>+		draw_panic_plane(plane);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DEBUG FS, This is currently unsafe.</div><div class='add'>+ * Create one file per plane, so it's possible to debug one plane at a time.</div><div class='add'>+ * TODO: It would be better to emulate an NMI context.</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_DRM_PANIC_DEBUG</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+</div><div class='add'>+static ssize_t debugfs_trigger_write(struct file *file, const char __user *user_buf,</div><div class='add'>+				     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	bool run;</div><div class='add'>+</div><div class='add'>+	if (kstrtobool_from_user(user_buf, count, &amp;run) == 0 &amp;&amp; run) {</div><div class='add'>+		struct drm_plane *plane = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+		draw_panic_plane(plane);</div><div class='add'>+	}</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations dbg_drm_panic_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.write = debugfs_trigger_write,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void debugfs_register_plane(struct drm_plane *plane, int index)</div><div class='add'>+{</div><div class='add'>+	char fname[32];</div><div class='add'>+</div><div class='add'>+	snprintf(fname, 32, "drm_panic_plane_%d", index);</div><div class='add'>+	debugfs_create_file(fname, 0200, plane-&gt;dev-&gt;debugfs_root,</div><div class='add'>+			    plane, &amp;dbg_drm_panic_ops);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void debugfs_register_plane(struct drm_plane *plane, int index) {}</div><div class='add'>+#endif /* CONFIG_DRM_PANIC_DEBUG */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_panic_register() - Initialize DRM panic for a device</div><div class='add'>+ * @dev: the drm device on which the panic screen will be displayed.</div><div class='add'>+ */</div><div class='add'>+void drm_panic_register(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_plane *plane;</div><div class='add'>+	int registered_plane = 0;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;mode_config.num_total_plane)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_for_each_plane(plane, dev) {</div><div class='add'>+		if (!plane-&gt;helper_private || !plane-&gt;helper_private-&gt;get_scanout_buffer)</div><div class='add'>+			continue;</div><div class='add'>+		plane-&gt;kmsg_panic.dump = drm_panic;</div><div class='add'>+		plane-&gt;kmsg_panic.max_reason = KMSG_DUMP_PANIC;</div><div class='add'>+		if (kmsg_dump_register(&amp;plane-&gt;kmsg_panic))</div><div class='add'>+			drm_warn(dev, "Failed to register panic handler\n");</div><div class='add'>+		else {</div><div class='add'>+			debugfs_register_plane(plane, registered_plane);</div><div class='add'>+			registered_plane++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (registered_plane)</div><div class='add'>+		drm_info(dev, "Registered %d planes with drm panic\n", registered_plane);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_panic_register);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_panic_unregister()</div><div class='add'>+ * @dev: the drm device previously registered.</div><div class='add'>+ */</div><div class='add'>+void drm_panic_unregister(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_plane *plane;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;mode_config.num_total_plane)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_for_each_plane(plane, dev) {</div><div class='add'>+		if (!plane-&gt;helper_private || !plane-&gt;helper_private-&gt;get_scanout_buffer)</div><div class='add'>+			continue;</div><div class='add'>+		kmsg_dump_unregister(&amp;plane-&gt;kmsg_panic);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_panic_unregister);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c<br/>index 672c655c7a8e..57662a1fd345 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_plane.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_plane.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_plane.c</a></div><div class='hunk'>@@ -140,6 +140,25 @@</div><div class='ctx'>  *     DRM_FORMAT_MOD_LINEAR. Before linux kernel release v5.1 there have been</div><div class='ctx'>  *     various bugs in this area with inconsistencies between the capability</div><div class='ctx'>  *     flag and per-plane properties.</div><div class='add'>+ *</div><div class='add'>+ * SIZE_HINTS:</div><div class='add'>+ *     Blob property which contains the set of recommended plane size</div><div class='add'>+ *     which can used for simple "cursor like" use cases (eg. no scaling).</div><div class='add'>+ *     Using these hints frees userspace from extensive probing of</div><div class='add'>+ *     supported plane sizes through atomic/setcursor ioctls.</div><div class='add'>+ *</div><div class='add'>+ *     The blob contains an array of struct drm_plane_size_hint, in</div><div class='add'>+ *     order of preference. For optimal usage userspace should pick</div><div class='add'>+ *     the first size that satisfies its own requirements.</div><div class='add'>+ *</div><div class='add'>+ *     Drivers should only attach this property to planes that</div><div class='add'>+ *     support a very limited set of sizes.</div><div class='add'>+ *</div><div class='add'>+ *     Note that property value 0 (ie. no blob) is reserved for potential</div><div class='add'>+ *     future use. Current userspace is expected to ignore the property</div><div class='add'>+ *     if the value is 0, and fall back to some other means (eg.</div><div class='add'>+ *     &amp;DRM_CAP_CURSOR_WIDTH and &amp;DRM_CAP_CURSOR_HEIGHT) to determine</div><div class='add'>+ *     the appropriate plane size to use.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static unsigned int drm_num_planes(struct drm_device *dev)</div><div class='hunk'>@@ -1729,3 +1748,40 @@ int drm_plane_create_scaling_filter_property(struct drm_plane *plane,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_plane_create_scaling_filter_property);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_plane_add_size_hints_property - create a size hints property</div><div class='add'>+ *</div><div class='add'>+ * @plane: drm plane</div><div class='add'>+ * @hints: size hints</div><div class='add'>+ * @num_hints: number of size hints</div><div class='add'>+ *</div><div class='add'>+ * Create a size hints property for the plane.</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * Zero for success or -errno</div><div class='add'>+ */</div><div class='add'>+int drm_plane_add_size_hints_property(struct drm_plane *plane,</div><div class='add'>+				      const struct drm_plane_size_hint *hints,</div><div class='add'>+				      int num_hints)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = plane-&gt;dev;</div><div class='add'>+	struct drm_mode_config *config = &amp;dev-&gt;mode_config;</div><div class='add'>+	struct drm_property_blob *blob;</div><div class='add'>+</div><div class='add'>+	/* extending to other plane types needs actual thought */</div><div class='add'>+	if (drm_WARN_ON(dev, plane-&gt;type != DRM_PLANE_TYPE_CURSOR))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	blob = drm_property_create_blob(dev,</div><div class='add'>+					array_size(sizeof(hints[0]), num_hints),</div><div class='add'>+					hints);</div><div class='add'>+	if (IS_ERR(blob))</div><div class='add'>+		return PTR_ERR(blob);</div><div class='add'>+</div><div class='add'>+	drm_object_attach_property(&amp;plane-&gt;base, config-&gt;size_hints_property,</div><div class='add'>+				   blob-&gt;base.id);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_plane_add_size_hints_property);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c<br/>index 699b7dbffd7b..cf2efb44722c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_print.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_print.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_print.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_print.c</a></div><div class='hunk'>@@ -23,13 +23,13 @@</div><div class='ctx'>  * Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/stdarg.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/dynamic_debug.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/dynamic_debug.h&gt;</div><div class='add'>+#include &lt;linux/stdarg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm.h&gt;</div><div class='ctx'> #include &lt;drm/drm_drv.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c<br/>index bf2dd1f46b6c..4f75a1cfd820 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_probe_helper.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_probe_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_probe_helper.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_probe_helper.c</a></div><div class='hunk'>@@ -37,6 +37,7 @@</div><div class='ctx'> #include &lt;drm/drm_crtc.h&gt;</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_fourcc.h&gt;</div><div class='add'>+#include &lt;drm/drm_managed.h&gt;</div><div class='ctx'> #include &lt;drm/drm_modeset_helper_vtables.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='hunk'>@@ -566,8 +567,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,</div><div class='ctx'> </div><div class='ctx'> 	drm_modeset_acquire_init(&amp;ctx, 0);</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector-&gt;base.id,</div><div class='del'>-			connector-&gt;name);</div><div class='add'>+	drm_dbg_kms(dev, "[CONNECTOR:%d:%s]\n", connector-&gt;base.id,</div><div class='add'>+		    connector-&gt;name);</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='ctx'> 	ret = drm_modeset_lock(&amp;dev-&gt;mode_config.connection_mutex, &amp;ctx);</div><div class='hunk'>@@ -610,11 +611,10 @@ retry:</div><div class='ctx'> 	 * check here, and if anything changed start the hotplug code.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (old_status != connector-&gt;status) {</div><div class='del'>-		DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",</div><div class='del'>-			      connector-&gt;base.id,</div><div class='del'>-			      connector-&gt;name,</div><div class='del'>-			      drm_get_connector_status_name(old_status),</div><div class='del'>-			      drm_get_connector_status_name(connector-&gt;status));</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+			    drm_get_connector_status_name(old_status),</div><div class='add'>+			    drm_get_connector_status_name(connector-&gt;status));</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The hotplug event code might call into the fb</div><div class='hunk'>@@ -637,8 +637,8 @@ retry:</div><div class='ctx'> 		drm_kms_helper_poll_enable(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (connector-&gt;status == connector_status_disconnected) {</div><div class='del'>-		DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",</div><div class='del'>-			connector-&gt;base.id, connector-&gt;name);</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] disconnected\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> 		drm_connector_update_edid_property(connector, NULL);</div><div class='ctx'> 		drm_mode_prune_invalid(dev, &amp;connector-&gt;modes, false);</div><div class='ctx'> 		goto exit;</div><div class='hunk'>@@ -696,11 +696,13 @@ exit:</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_sort(&amp;connector-&gt;modes);</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector-&gt;base.id,</div><div class='del'>-			connector-&gt;name);</div><div class='add'>+	drm_dbg_kms(dev, "[CONNECTOR:%d:%s] probed modes:\n",</div><div class='add'>+		    connector-&gt;base.id, connector-&gt;name);</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(mode, &amp;connector-&gt;modes, head) {</div><div class='ctx'> 		drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);</div><div class='del'>-		drm_mode_debug_printmodeline(mode);</div><div class='add'>+		drm_dbg_kms(dev, "Probed mode: " DRM_MODE_FMT "\n",</div><div class='add'>+			    DRM_MODE_ARG(mode));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='hunk'>@@ -833,14 +835,12 @@ static void output_poll_execute(struct work_struct *work)</div><div class='ctx'> 			old = drm_get_connector_status_name(old_status);</div><div class='ctx'> 			new = drm_get_connector_status_name(connector-&gt;status);</div><div class='ctx'> </div><div class='del'>-			DRM_DEBUG_KMS("[CONNECTOR:%d:%s] "</div><div class='del'>-				      "status updated from %s to %s\n",</div><div class='del'>-				      connector-&gt;base.id,</div><div class='del'>-				      connector-&gt;name,</div><div class='del'>-				      old, new);</div><div class='del'>-			DRM_DEBUG_KMS("[CONNECTOR:%d:%s] epoch counter %llu -&gt; %llu\n",</div><div class='del'>-				      connector-&gt;base.id, connector-&gt;name,</div><div class='del'>-				      old_epoch_counter, connector-&gt;epoch_counter);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+				    old, new);</div><div class='add'>+			drm_dbg_kms(dev, "[CONNECTOR:%d:%s] epoch counter %llu -&gt; %llu\n",</div><div class='add'>+				    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+				    old_epoch_counter, connector-&gt;epoch_counter);</div><div class='ctx'> </div><div class='ctx'> 			changed = true;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -951,6 +951,32 @@ void drm_kms_helper_poll_fini(struct drm_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_kms_helper_poll_fini);</div><div class='ctx'> </div><div class='add'>+static void drm_kms_helper_poll_init_release(struct drm_device *dev, void *res)</div><div class='add'>+{</div><div class='add'>+	drm_kms_helper_poll_fini(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drmm_kms_helper_poll_init - initialize and enable output polling</div><div class='add'>+ * @dev: drm_device</div><div class='add'>+ *</div><div class='add'>+ * This function initializes and then also enables output polling support for</div><div class='add'>+ * @dev similar to drm_kms_helper_poll_init(). Polling will automatically be</div><div class='add'>+ * cleaned up when the DRM device goes away.</div><div class='add'>+ *</div><div class='add'>+ * See drm_kms_helper_poll_init() for more information.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * 0 on success, or a negative errno code otherwise.</div><div class='add'>+ */</div><div class='add'>+int drmm_kms_helper_poll_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_kms_helper_poll_init(dev);</div><div class='add'>+</div><div class='add'>+	return drmm_add_action_or_reset(dev, drm_kms_helper_poll_init_release, dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drmm_kms_helper_poll_init);</div><div class='add'>+</div><div class='ctx'> static bool check_connector_changed(struct drm_connector *connector)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;dev;</div><div class='hunk'>@@ -1279,3 +1305,32 @@ int drm_connector_helper_tv_get_modes(struct drm_connector *connector)</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_connector_helper_tv_get_modes);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_connector_helper_detect_from_ddc - Read EDID and detect connector status.</div><div class='add'>+ * @connector: The connector</div><div class='add'>+ * @ctx: Acquire context</div><div class='add'>+ * @force: Perform screen-destructive operations, if necessary</div><div class='add'>+ *</div><div class='add'>+ * Detects the connector status by reading the EDID using drm_probe_ddc(),</div><div class='add'>+ * which requires connector-&gt;ddc to be set. Returns connector_status_connected</div><div class='add'>+ * on success or connector_status_disconnected on failure.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * The connector status as defined by enum drm_connector_status.</div><div class='add'>+ */</div><div class='add'>+int drm_connector_helper_detect_from_ddc(struct drm_connector *connector,</div><div class='add'>+					 struct drm_modeset_acquire_ctx *ctx,</div><div class='add'>+					 bool force)</div><div class='add'>+{</div><div class='add'>+	struct i2c_adapter *ddc = connector-&gt;ddc;</div><div class='add'>+</div><div class='add'>+	if (!ddc)</div><div class='add'>+		return connector_status_unknown;</div><div class='add'>+</div><div class='add'>+	if (drm_probe_ddc(ddc))</div><div class='add'>+		return connector_status_connected;</div><div class='add'>+</div><div class='add'>+	return connector_status_disconnected;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_connector_helper_detect_from_ddc);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c<br/>index a953f69a34b6..bd9b8ab4f82b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_sysfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_sysfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_sysfs.c</a></div><div class='hunk'>@@ -209,10 +209,9 @@ static ssize_t status_store(struct device *device,</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (old_force != connector-&gt;force || !connector-&gt;force) {</div><div class='del'>-		DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force updated from %d to %d or reprobing\n",</div><div class='del'>-			      connector-&gt;base.id,</div><div class='del'>-			      connector-&gt;name,</div><div class='del'>-			      old_force, connector-&gt;force);</div><div class='add'>+		drm_dbg_kms(dev, "[CONNECTOR:%d:%s] force updated from %d to %d or reprobing\n",</div><div class='add'>+			    connector-&gt;base.id, connector-&gt;name,</div><div class='add'>+			    old_force, connector-&gt;force);</div><div class='ctx'> </div><div class='ctx'> 		connector-&gt;funcs-&gt;fill_modes(connector,</div><div class='ctx'> 					     dev-&gt;mode_config.max_width,</div><div class='hunk'>@@ -383,8 +382,8 @@ int drm_sysfs_connector_add(struct drm_connector *connector)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG("adding \"%s\" to sysfs\n",</div><div class='del'>-		  connector-&gt;name);</div><div class='add'>+	drm_dbg_kms(dev, "[CONNECTOR:%d:%s] adding connector to sysfs\n",</div><div class='add'>+		    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	r = device_add(kdev);</div><div class='ctx'> 	if (r) {</div><div class='hunk'>@@ -430,8 +429,9 @@ void drm_sysfs_connector_remove(struct drm_connector *connector)</div><div class='ctx'> 	if (dev_fwnode(connector-&gt;kdev))</div><div class='ctx'> 		component_del(connector-&gt;kdev, &amp;typec_connector_ops);</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG("removing \"%s\" from sysfs\n",</div><div class='del'>-		  connector-&gt;name);</div><div class='add'>+	drm_dbg_kms(connector-&gt;dev,</div><div class='add'>+		    "[CONNECTOR:%d:%s] removing connector from sysfs\n",</div><div class='add'>+		    connector-&gt;base.id, connector-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	device_unregister(connector-&gt;kdev);</div><div class='ctx'> 	connector-&gt;kdev = NULL;</div><div class='hunk'>@@ -442,7 +442,7 @@ void drm_sysfs_lease_event(struct drm_device *dev)</div><div class='ctx'> 	char *event_string = "LEASE=1";</div><div class='ctx'> 	char *envp[] = { event_string, NULL };</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG("generating lease event\n");</div><div class='add'>+	drm_dbg_lease(dev, "generating lease event\n");</div><div class='ctx'> </div><div class='ctx'> 	kobject_uevent_env(&amp;dev-&gt;primary-&gt;kdev-&gt;kobj, KOBJ_CHANGE, envp);</div><div class='ctx'> }</div><div class='hunk'>@@ -463,7 +463,7 @@ void drm_sysfs_hotplug_event(struct drm_device *dev)</div><div class='ctx'> 	char *event_string = "HOTPLUG=1";</div><div class='ctx'> 	char *envp[] = { event_string, NULL };</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG("generating hotplug event\n");</div><div class='add'>+	drm_dbg_kms(dev, "generating hotplug event\n");</div><div class='ctx'> </div><div class='ctx'> 	kobject_uevent_env(&amp;dev-&gt;primary-&gt;kdev-&gt;kobj, KOBJ_CHANGE, envp);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c<br/>index 702a12bc93bd..cc3571e25a9a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_vblank.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_vblank.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_vblank.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_vblank.c</a></div><div class='hunk'>@@ -166,11 +166,24 @@ module_param_named(timestamp_precision_usec, drm_timestamp_precision, int, 0600)</div><div class='ctx'> MODULE_PARM_DESC(vblankoffdelay, "Delay until vblank irq auto-disable [msecs] (0: never disable, &lt;0: disable immediately)");</div><div class='ctx'> MODULE_PARM_DESC(timestamp_precision_usec, "Max. error on timestamps [usecs]");</div><div class='ctx'> </div><div class='add'>+static struct drm_vblank_crtc *</div><div class='add'>+drm_vblank_crtc(struct drm_device *dev, unsigned int pipe)</div><div class='add'>+{</div><div class='add'>+	return &amp;dev-&gt;vblank[pipe];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_vblank_crtc *</div><div class='add'>+drm_crtc_vblank_crtc(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	return drm_vblank_crtc(crtc-&gt;dev, drm_crtc_index(crtc));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_crtc_vblank_crtc);</div><div class='add'>+</div><div class='ctx'> static void store_vblank(struct drm_device *dev, unsigned int pipe,</div><div class='ctx'> 			 u32 vblank_count_inc,</div><div class='ctx'> 			 ktime_t t_vblank, u32 last)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> </div><div class='ctx'> 	assert_spin_locked(&amp;dev-&gt;vblank_time_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -184,7 +197,7 @@ static void store_vblank(struct drm_device *dev, unsigned int pipe,</div><div class='ctx'> </div><div class='ctx'> static u32 drm_max_vblank_count(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> </div><div class='ctx'> 	return vblank-&gt;max_vblank_count ?: dev-&gt;max_vblank_count;</div><div class='ctx'> }</div><div class='hunk'>@@ -273,7 +286,7 @@ static void drm_reset_vblank_timestamp(struct drm_device *dev, unsigned int pipe</div><div class='ctx'> static void drm_update_vblank_count(struct drm_device *dev, unsigned int pipe,</div><div class='ctx'> 				    bool in_vblank_irq)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	u32 cur_vblank, diff;</div><div class='ctx'> 	bool rc;</div><div class='ctx'> 	ktime_t t_vblank;</div><div class='hunk'>@@ -364,7 +377,7 @@ static void drm_update_vblank_count(struct drm_device *dev, unsigned int pipe,</div><div class='ctx'> </div><div class='ctx'> u64 drm_vblank_count(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	u64 count;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(dev, pipe &gt;= dev-&gt;num_crtcs))</div><div class='hunk'>@@ -438,7 +451,7 @@ static void __disable_vblank(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'>  */</div><div class='ctx'> void drm_vblank_disable_and_save(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	unsigned long irqflags;</div><div class='ctx'> </div><div class='ctx'> 	assert_spin_locked(&amp;dev-&gt;vbl_lock);</div><div class='hunk'>@@ -600,7 +613,7 @@ void drm_calc_timestamping_constants(struct drm_crtc *crtc,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	unsigned int pipe = drm_crtc_index(crtc);</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> 	int linedur_ns = 0, framedur_ns = 0;</div><div class='ctx'> 	int dotclock = mode-&gt;crtc_clock;</div><div class='ctx'> </div><div class='hunk'>@@ -930,7 +943,7 @@ EXPORT_SYMBOL(drm_crtc_vblank_count);</div><div class='ctx'> static u64 drm_vblank_count_and_time(struct drm_device *dev, unsigned int pipe,</div><div class='ctx'> 				     ktime_t *vblanktime)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	u64 vblank_count;</div><div class='ctx'> 	unsigned int seq;</div><div class='ctx'> </div><div class='hunk'>@@ -985,7 +998,6 @@ EXPORT_SYMBOL(drm_crtc_vblank_count_and_time);</div><div class='ctx'>  */</div><div class='ctx'> int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime)</div><div class='ctx'> {</div><div class='del'>-	unsigned int pipe = drm_crtc_index(crtc);</div><div class='ctx'> 	struct drm_vblank_crtc *vblank;</div><div class='ctx'> 	struct drm_display_mode *mode;</div><div class='ctx'> 	u64 vblank_start;</div><div class='hunk'>@@ -993,7 +1005,7 @@ int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime)</div><div class='ctx'> 	if (!drm_dev_has_vblank(crtc-&gt;dev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	vblank = &amp;crtc-&gt;dev-&gt;vblank[pipe];</div><div class='add'>+	vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> 	mode = &amp;vblank-&gt;hwmode;</div><div class='ctx'> </div><div class='ctx'> 	if (!vblank-&gt;framedur_ns || !vblank-&gt;linedur_ns)</div><div class='hunk'>@@ -1147,7 +1159,7 @@ static int __enable_vblank(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> </div><div class='ctx'> static int drm_vblank_enable(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	assert_spin_locked(&amp;dev-&gt;vbl_lock);</div><div class='hunk'>@@ -1185,7 +1197,7 @@ static int drm_vblank_enable(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> </div><div class='ctx'> int drm_vblank_get(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	unsigned long irqflags;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1228,7 +1240,7 @@ EXPORT_SYMBOL(drm_crtc_vblank_get);</div><div class='ctx'> </div><div class='ctx'> void drm_vblank_put(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(dev, pipe &gt;= dev-&gt;num_crtcs))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1274,7 +1286,7 @@ EXPORT_SYMBOL(drm_crtc_vblank_put);</div><div class='ctx'>  */</div><div class='ctx'> void drm_wait_one_vblank(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u64 last;</div><div class='ctx'> </div><div class='hunk'>@@ -1327,7 +1339,7 @@ void drm_crtc_vblank_off(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	unsigned int pipe = drm_crtc_index(crtc);</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> 	struct drm_pending_vblank_event *e, *t;</div><div class='ctx'> 	ktime_t now;</div><div class='ctx'> 	u64 seq;</div><div class='hunk'>@@ -1405,8 +1417,7 @@ EXPORT_SYMBOL(drm_crtc_vblank_off);</div><div class='ctx'> void drm_crtc_vblank_reset(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	unsigned int pipe = drm_crtc_index(crtc);</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev-&gt;vbl_lock);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1445,8 +1456,7 @@ void drm_crtc_set_max_vblank_count(struct drm_crtc *crtc,</div><div class='ctx'> 				   u32 max_vblank_count)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	unsigned int pipe = drm_crtc_index(crtc);</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN_ON(dev, dev-&gt;max_vblank_count);</div><div class='ctx'> 	drm_WARN_ON(dev, !READ_ONCE(vblank-&gt;inmodeset));</div><div class='hunk'>@@ -1469,7 +1479,7 @@ void drm_crtc_vblank_on(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	unsigned int pipe = drm_crtc_index(crtc);</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(dev, pipe &gt;= dev-&gt;num_crtcs))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1512,7 +1522,7 @@ static void drm_vblank_restore(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> 	assert_spin_locked(&amp;dev-&gt;vbl_lock);</div><div class='ctx'> 	assert_spin_locked(&amp;dev-&gt;vblank_time_lock);</div><div class='ctx'> </div><div class='del'>-	vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	drm_WARN_ONCE(dev,</div><div class='ctx'> 		      drm_debug_enabled(DRM_UT_VBL) &amp;&amp; !vblank-&gt;framedur_ns,</div><div class='ctx'> 		      "Cannot compute missed vblanks without frame duration\n");</div><div class='hunk'>@@ -1564,7 +1574,7 @@ static int drm_queue_vblank_event(struct drm_device *dev, unsigned int pipe,</div><div class='ctx'> 				  union drm_wait_vblank *vblwait,</div><div class='ctx'> 				  struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	struct drm_pending_vblank_event *e;</div><div class='ctx'> 	ktime_t now;</div><div class='ctx'> 	u64 seq;</div><div class='hunk'>@@ -1872,7 +1882,7 @@ static void drm_handle_vblank_events(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'>  */</div><div class='ctx'> bool drm_handle_vblank(struct drm_device *dev, unsigned int pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_vblank_crtc *vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);</div><div class='ctx'> 	unsigned long irqflags;</div><div class='ctx'> 	bool disable_irq;</div><div class='ctx'> </div><div class='hunk'>@@ -1981,7 +1991,7 @@ int drm_crtc_get_sequence_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 	pipe = drm_crtc_index(crtc);</div><div class='ctx'> </div><div class='del'>-	vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> 	vblank_enabled = dev-&gt;vblank_disable_immediate &amp;&amp; READ_ONCE(vblank-&gt;enabled);</div><div class='ctx'> </div><div class='ctx'> 	if (!vblank_enabled) {</div><div class='hunk'>@@ -2046,7 +2056,7 @@ int drm_crtc_queue_sequence_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 	pipe = drm_crtc_index(crtc);</div><div class='ctx'> </div><div class='del'>-	vblank = &amp;dev-&gt;vblank[pipe];</div><div class='add'>+	vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> </div><div class='ctx'> 	e = kzalloc(sizeof(*e), GFP_KERNEL);</div><div class='ctx'> 	if (e == NULL)</div><div class='head'>diff --git a/drivers/gpu/drm/drm_vblank_work.c b/drivers/gpu/drm/drm_vblank_work.c<br/>index 43cd5c0f4f6f..4fe9b1d3b00f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_vblank_work.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/drm_vblank_work.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/drm_vblank_work.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/drm_vblank_work.c</a></div><div class='hunk'>@@ -245,7 +245,7 @@ void drm_vblank_work_init(struct drm_vblank_work *work, struct drm_crtc *crtc,</div><div class='ctx'> {</div><div class='ctx'> 	kthread_init_work(&amp;work-&gt;base, func);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;work-&gt;node);</div><div class='del'>-	work-&gt;vblank = &amp;crtc-&gt;dev-&gt;vblank[drm_crtc_index(crtc)];</div><div class='add'>+	work-&gt;vblank = drm_crtc_vblank_crtc(crtc);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_vblank_work_init);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c<br/>index 734412aae94d..a9bf426f69b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/etnaviv/etnaviv_gpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/etnaviv/etnaviv_gpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/etnaviv/etnaviv_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/etnaviv/etnaviv_gpu.c</a></div><div class='hunk'>@@ -164,26 +164,6 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)</div><div class='ctx'> 		*value = gpu-&gt;identity.eco_id;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case ETNAVIV_PARAM_GPU_NN_CORE_COUNT:</div><div class='del'>-		*value = gpu-&gt;identity.nn_core_count;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ETNAVIV_PARAM_GPU_NN_MAD_PER_CORE:</div><div class='del'>-		*value = gpu-&gt;identity.nn_mad_per_core;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ETNAVIV_PARAM_GPU_TP_CORE_COUNT:</div><div class='del'>-		*value = gpu-&gt;identity.tp_core_count;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ETNAVIV_PARAM_GPU_ON_CHIP_SRAM_SIZE:</div><div class='del'>-		*value = gpu-&gt;identity.on_chip_sram_size;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ETNAVIV_PARAM_GPU_AXI_SRAM_SIZE:</div><div class='del'>-		*value = gpu-&gt;identity.axi_sram_size;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		DBG("%s: invalid param: %u", dev_name(gpu-&gt;dev), param);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -663,8 +643,8 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)</div><div class='ctx'> 	/* Disable TX clock gating on affected core revisions. */</div><div class='ctx'> 	if (etnaviv_is_model_rev(gpu, GC4000, 0x5222) ||</div><div class='ctx'> 	    etnaviv_is_model_rev(gpu, GC2000, 0x5108) ||</div><div class='del'>-	    etnaviv_is_model_rev(gpu, GC2000, 0x6202) ||</div><div class='del'>-	    etnaviv_is_model_rev(gpu, GC2000, 0x6203))</div><div class='add'>+	    etnaviv_is_model_rev(gpu, GC7000, 0x6202) ||</div><div class='add'>+	    etnaviv_is_model_rev(gpu, GC7000, 0x6203))</div><div class='ctx'> 		pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable SE and RA clock gating on affected core revisions. */</div><div class='head'>diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h<br/>index 7d5e9158e13c..197e0037732e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/etnaviv/etnaviv_gpu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/etnaviv/etnaviv_gpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/etnaviv/etnaviv_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/etnaviv/etnaviv_gpu.h</a></div><div class='hunk'>@@ -54,18 +54,6 @@ struct etnaviv_chip_identity {</div><div class='ctx'> 	/* Number of Neural Network cores. */</div><div class='ctx'> 	u32 nn_core_count;</div><div class='ctx'> </div><div class='del'>-	/* Number of MAD units per Neural Network core. */</div><div class='del'>-	u32 nn_mad_per_core;</div><div class='del'>-</div><div class='del'>-	/* Number of Tensor Processing cores. */</div><div class='del'>-	u32 tp_core_count;</div><div class='del'>-</div><div class='del'>-	/* Size in bytes of the SRAM inside the NPU. */</div><div class='del'>-	u32 on_chip_sram_size;</div><div class='del'>-</div><div class='del'>-	/* Size in bytes of the SRAM across the AXI bus. */</div><div class='del'>-	u32 axi_sram_size;</div><div class='del'>-</div><div class='ctx'> 	/* Size of the vertex cache. */</div><div class='ctx'> 	u32 vertex_cache_size;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c<br/>index d8e7334de8ce..8665f2658d51 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/etnaviv/etnaviv_hwdb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/etnaviv/etnaviv_hwdb.c</a></div><div class='hunk'>@@ -17,10 +17,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.thread_count = 128,</div><div class='ctx'> 		.shader_core_count = 1,</div><div class='ctx'> 		.nn_core_count = 0,</div><div class='del'>-		.nn_mad_per_core = 0,</div><div class='del'>-		.tp_core_count = 0,</div><div class='del'>-		.on_chip_sram_size = 0,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 8,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='hunk'>@@ -52,11 +48,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.register_max = 64,</div><div class='ctx'> 		.thread_count = 256,</div><div class='ctx'> 		.shader_core_count = 1,</div><div class='del'>-		.nn_core_count = 0,</div><div class='del'>-		.nn_mad_per_core = 0,</div><div class='del'>-		.tp_core_count = 0,</div><div class='del'>-		.on_chip_sram_size = 0,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 8,</div><div class='ctx'> 		.vertex_output_buffer_size = 512,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='hunk'>@@ -89,10 +80,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.thread_count = 512,</div><div class='ctx'> 		.shader_core_count = 2,</div><div class='ctx'> 		.nn_core_count = 0,</div><div class='del'>-		.nn_mad_per_core = 0,</div><div class='del'>-		.tp_core_count = 0,</div><div class='del'>-		.on_chip_sram_size = 0,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 16,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='hunk'>@@ -125,10 +112,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.thread_count = 512,</div><div class='ctx'> 		.shader_core_count = 2,</div><div class='ctx'> 		.nn_core_count = 0,</div><div class='del'>-		.nn_mad_per_core = 0,</div><div class='del'>-		.tp_core_count = 0,</div><div class='del'>-		.on_chip_sram_size = 0,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 16,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='hunk'>@@ -160,11 +143,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.register_max = 64,</div><div class='ctx'> 		.thread_count = 512,</div><div class='ctx'> 		.shader_core_count = 2,</div><div class='del'>-		.nn_core_count = 0,</div><div class='del'>-		.nn_mad_per_core = 0,</div><div class='del'>-		.tp_core_count = 0,</div><div class='del'>-		.on_chip_sram_size = 0,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 16,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='hunk'>@@ -197,10 +175,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.thread_count = 1024,</div><div class='ctx'> 		.shader_core_count = 4,</div><div class='ctx'> 		.nn_core_count = 0,</div><div class='del'>-		.nn_mad_per_core = 0,</div><div class='del'>-		.tp_core_count = 0,</div><div class='del'>-		.on_chip_sram_size = 0,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 16,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 2,</div><div class='hunk'>@@ -233,10 +207,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.thread_count = 256,</div><div class='ctx'> 		.shader_core_count = 1,</div><div class='ctx'> 		.nn_core_count = 8,</div><div class='del'>-		.nn_mad_per_core = 64,</div><div class='del'>-		.tp_core_count = 4,</div><div class='del'>-		.on_chip_sram_size = 524288,</div><div class='del'>-		.axi_sram_size = 1048576,</div><div class='ctx'> 		.vertex_cache_size = 16,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='hunk'>@@ -269,10 +239,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {</div><div class='ctx'> 		.thread_count = 256,</div><div class='ctx'> 		.shader_core_count = 1,</div><div class='ctx'> 		.nn_core_count = 6,</div><div class='del'>-		.nn_mad_per_core = 64,</div><div class='del'>-		.tp_core_count = 3,</div><div class='del'>-		.on_chip_sram_size = 262144,</div><div class='del'>-		.axi_sram_size = 0,</div><div class='ctx'> 		.vertex_cache_size = 16,</div><div class='ctx'> 		.vertex_output_buffer_size = 1024,</div><div class='ctx'> 		.pixel_pipes = 1,</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c<br/>index 2fe0e5f3f638..bf16deaae68b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_dsi.c</a></div><div class='hunk'>@@ -184,7 +184,6 @@ struct platform_driver dsi_driver = {</div><div class='ctx'> 	.remove_new = samsung_dsim_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = "exynos-dsi",</div><div class='del'>-		   .owner = THIS_MODULE,</div><div class='ctx'> 		   .pm = &amp;samsung_dsim_pm_ops,</div><div class='ctx'> 		   .of_match_table = exynos_dsi_of_match,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c<br/>index e81a576de398..142184c8c3bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_fimc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_fimc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_fimc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_fimc.c</a></div><div class='hunk'>@@ -1412,7 +1412,6 @@ struct platform_driver fimc_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.of_match_table = fimc_of_match,</div><div class='ctx'> 		.name	= "exynos-drm-fimc",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= pm_ptr(&amp;fimc_pm_ops),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c<br/>index f2145227a1e0..f57df8c48139 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_fimd.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_fimd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_fimd.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_fimd.c</a></div><div class='hunk'>@@ -1326,7 +1326,6 @@ struct platform_driver fimd_driver = {</div><div class='ctx'> 	.remove_new	= fimd_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos4-fb",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= pm_ptr(&amp;exynos_fimd_pm_ops),</div><div class='ctx'> 		.of_match_table = fimd_driver_dt_match,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c<br/>index f3138423612e..3a3b2c00e400 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_g2d.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_g2d.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_g2d.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_g2d.c</a></div><div class='hunk'>@@ -1610,7 +1610,6 @@ struct platform_driver g2d_driver = {</div><div class='ctx'> 	.remove_new	= g2d_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-drm-g2d",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= pm_ptr(&amp;g2d_pm_ops),</div><div class='ctx'> 		.of_match_table = exynos_g2d_match,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c<br/>index 180507a47700..1b111e2c3347 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_gsc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_gsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_gsc.c</a></div><div class='hunk'>@@ -1423,7 +1423,6 @@ struct platform_driver gsc_driver = {</div><div class='ctx'> 	.remove_new	= gsc_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-drm-gsc",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= &amp;gsc_pm_ops,</div><div class='ctx'> 		.of_match_table = exynos_drm_gsc_of_match,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_mic.c b/drivers/gpu/drm/exynos/exynos_drm_mic.c<br/>index e2920960180f..d61ec451807c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_mic.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_mic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_mic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_mic.c</a></div><div class='hunk'>@@ -464,7 +464,6 @@ struct platform_driver mic_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-mic",</div><div class='ctx'> 		.pm	= pm_ptr(&amp;exynos_mic_pm_ops),</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = exynos_mic_of_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c b/drivers/gpu/drm/exynos/exynos_drm_rotator.c<br/>index 5f7516655b08..2eb0b701672f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_rotator.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_rotator.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_rotator.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_rotator.c</a></div><div class='hunk'>@@ -454,7 +454,6 @@ struct platform_driver rotator_driver = {</div><div class='ctx'> 	.remove_new	= rotator_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-rotator",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= pm_ptr(&amp;rotator_pm_ops),</div><div class='ctx'> 		.of_match_table = exynos_rotator_match,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_scaler.c b/drivers/gpu/drm/exynos/exynos_drm_scaler.c<br/>index 392f721f13ab..a9d469896824 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_scaler.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_scaler.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_scaler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_scaler.c</a></div><div class='hunk'>@@ -722,7 +722,6 @@ struct platform_driver scaler_driver = {</div><div class='ctx'> 	.remove_new	= scaler_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-scaler",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= pm_ptr(&amp;scaler_pm_ops),</div><div class='ctx'> 		.of_match_table = exynos_scaler_match,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c<br/>index f5bbba9ad225..fab135308b70 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_vidi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_drm_vidi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_drm_vidi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_drm_vidi.c</a></div><div class='hunk'>@@ -479,7 +479,6 @@ struct platform_driver vidi_driver = {</div><div class='ctx'> 	.remove_new	= vidi_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-drm-vidi",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.dev_groups = vidi_groups,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c<br/>index b1d02dec3774..e968824a4c72 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_hdmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_hdmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_hdmi.c</a></div><div class='hunk'>@@ -1919,10 +1919,9 @@ static int hdmi_get_ddc_adapter(struct hdmi_context *hdata)</div><div class='ctx'> static int hdmi_get_phy_io(struct hdmi_context *hdata)</div><div class='ctx'> {</div><div class='ctx'> 	const char *compatible_str = "samsung,exynos4212-hdmiphy";</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	struct device_node *np __free(device_node) =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, compatible_str);</div><div class='ctx'> </div><div class='del'>-	np = of_find_compatible_node(NULL, NULL, compatible_str);</div><div class='ctx'> 	if (!np) {</div><div class='ctx'> 		np = of_parse_phandle(hdata-&gt;dev-&gt;of_node, "phy", 0);</div><div class='ctx'> 		if (!np) {</div><div class='hunk'>@@ -1937,21 +1936,17 @@ static int hdmi_get_phy_io(struct hdmi_context *hdata)</div><div class='ctx'> 		if (!hdata-&gt;regs_hdmiphy) {</div><div class='ctx'> 			DRM_DEV_ERROR(hdata-&gt;dev,</div><div class='ctx'> 				      "failed to ioremap hdmi phy\n");</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto out;</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hdata-&gt;hdmiphy_port = of_find_i2c_device_by_node(np);</div><div class='ctx'> 		if (!hdata-&gt;hdmiphy_port) {</div><div class='ctx'> 			DRM_INFO("Failed to get hdmi phy i2c client\n");</div><div class='del'>-			ret = -EPROBE_DEFER;</div><div class='del'>-			goto out;</div><div class='add'>+			return -EPROBE_DEFER;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	of_node_put(np);</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hdmi_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -2126,7 +2121,6 @@ struct platform_driver hdmi_driver = {</div><div class='ctx'> 	.remove_new	= hdmi_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-hdmi",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= &amp;exynos_hdmi_pm_ops,</div><div class='ctx'> 		.of_match_table = hdmi_match_types,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c<br/>index 6822333fd0e6..1db955f00044 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_mixer.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/exynos/exynos_mixer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/exynos/exynos_mixer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/exynos/exynos_mixer.c</a></div><div class='hunk'>@@ -1331,7 +1331,6 @@ static const struct dev_pm_ops exynos_mixer_pm_ops = {</div><div class='ctx'> struct platform_driver mixer_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "exynos-mixer",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.pm = &amp;exynos_mixer_pm_ops,</div><div class='ctx'> 		.of_match_table = mixer_match_types,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/Makefile b/drivers/gpu/drm/gma500/Makefile<br/>index 4f302cd5e1a6..58fed80c7392 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/gma500/Makefile</a></div><div class='hunk'>@@ -34,7 +34,6 @@ gma500_gfx-y += \</div><div class='ctx'> 	  psb_intel_lvds.o \</div><div class='ctx'> 	  psb_intel_modes.o \</div><div class='ctx'> 	  psb_intel_sdvo.o \</div><div class='del'>-	  psb_lid.o \</div><div class='ctx'> 	  psb_irq.o</div><div class='ctx'> </div><div class='ctx'> gma500_gfx-$(CONFIG_ACPI) +=  opregion.o</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail_lvds.c b/drivers/gpu/drm/gma500/oaktrail_lvds.c<br/>index d974d0c60d2a..72191d6f0d06 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/oaktrail_lvds.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/oaktrail_lvds.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/oaktrail_lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/gma500/oaktrail_lvds.c</a></div><div class='hunk'>@@ -11,8 +11,6 @@</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/intel-mid.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='ctx'> #include &lt;drm/drm_modeset_helper_vtables.h&gt;</div><div class='ctx'> #include &lt;drm/drm_simple_kms_helper.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_device.c b/drivers/gpu/drm/gma500/psb_device.c<br/>index dcfcd7b89d4a..6dece8f0e380 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/psb_device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/psb_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/psb_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/gma500/psb_device.c</a></div><div class='hunk'>@@ -73,8 +73,7 @@ static int psb_backlight_setup(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	psb_intel_lvds_set_brightness(dev, PSB_MAX_BRIGHTNESS);</div><div class='del'>-	/* This must occur after the backlight is properly initialised */</div><div class='del'>-	psb_lid_timer_init(dev_priv);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -259,8 +258,6 @@ static int psb_chip_setup(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void psb_chip_teardown(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);</div><div class='del'>-	psb_lid_timer_takedown(dev_priv);</div><div class='ctx'> 	gma_intel_teardown_gmbus(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h<br/>index c5edfa4aa4cc..83c17689c454 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/psb_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/psb_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/psb_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/gma500/psb_drv.h</a></div><div class='hunk'>@@ -162,7 +162,6 @@</div><div class='ctx'> #define PSB_NUM_VBLANKS 2</div><div class='ctx'> </div><div class='ctx'> #define PSB_WATCHDOG_DELAY (HZ * 2)</div><div class='del'>-#define PSB_LID_DELAY (HZ / 10)</div><div class='ctx'> </div><div class='ctx'> #define PSB_MAX_BRIGHTNESS		100</div><div class='ctx'> </div><div class='hunk'>@@ -491,11 +490,7 @@ struct drm_psb_private {</div><div class='ctx'> 	/* Hotplug handling */</div><div class='ctx'> 	struct work_struct hotplug_work;</div><div class='ctx'> </div><div class='del'>-	/* LID-Switch */</div><div class='del'>-	spinlock_t lid_lock;</div><div class='del'>-	struct timer_list lid_timer;</div><div class='ctx'> 	struct psb_intel_opregion opregion;</div><div class='del'>-	u32 lid_last_state;</div><div class='ctx'> </div><div class='ctx'> 	/* Watchdog */</div><div class='ctx'> 	uint32_t apm_reg;</div><div class='hunk'>@@ -591,10 +586,6 @@ struct psb_ops {</div><div class='ctx'> 	int i2c_bus;		/* I2C bus identifier for Moorestown */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* psb_lid.c */</div><div class='del'>-extern void psb_lid_timer_init(struct drm_psb_private *dev_priv);</div><div class='del'>-extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv);</div><div class='del'>-</div><div class='ctx'> /* modesetting */</div><div class='ctx'> extern void psb_modeset_init(struct drm_device *dev);</div><div class='ctx'> extern void psb_modeset_cleanup(struct drm_device *dev);</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_lid.c b/drivers/gpu/drm/gma500/psb_lid.c<br/>deleted file mode 100644<br/>index 58a7fe392636..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gma500/psb_lid.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gma500/psb_lid.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,80 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/**************************************************************************</div><div class='del'>- * Copyright (c) 2007, Intel Corporation.</div><div class='del'>- *</div><div class='del'>- * Authors: Thomas Hellstrom &lt;thomas-at-tungstengraphics-dot-com&gt;</div><div class='del'>- **************************************************************************/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-</div><div class='del'>-#include "psb_drv.h"</div><div class='del'>-#include "psb_intel_reg.h"</div><div class='del'>-#include "psb_reg.h"</div><div class='del'>-</div><div class='del'>-static void psb_lid_timer_func(struct timer_list *t)</div><div class='del'>-{</div><div class='del'>-	struct drm_psb_private *dev_priv = from_timer(dev_priv, t, lid_timer);</div><div class='del'>-	struct drm_device *dev = (struct drm_device *)&amp;dev_priv-&gt;dev;</div><div class='del'>-	struct timer_list *lid_timer = &amp;dev_priv-&gt;lid_timer;</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	u32 __iomem *lid_state = dev_priv-&gt;opregion.lid_state;</div><div class='del'>-	u32 pp_status;</div><div class='del'>-</div><div class='del'>-	if (readl(lid_state) == dev_priv-&gt;lid_last_state)</div><div class='del'>-		goto lid_timer_schedule;</div><div class='del'>-</div><div class='del'>-	if ((readl(lid_state)) &amp; 0x01) {</div><div class='del'>-		/*lid state is open*/</div><div class='del'>-		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | POWER_TARGET_ON);</div><div class='del'>-		do {</div><div class='del'>-			pp_status = REG_READ(PP_STATUS);</div><div class='del'>-		} while ((pp_status &amp; PP_ON) == 0 &amp;&amp;</div><div class='del'>-			 (pp_status &amp; PP_SEQUENCE_MASK) != 0);</div><div class='del'>-</div><div class='del'>-		if (REG_READ(PP_STATUS) &amp; PP_ON) {</div><div class='del'>-			/*FIXME: should be backlight level before*/</div><div class='del'>-			psb_intel_lvds_set_brightness(dev, 100);</div><div class='del'>-		} else {</div><div class='del'>-			DRM_DEBUG("LVDS panel never powered up");</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		psb_intel_lvds_set_brightness(dev, 0);</div><div class='del'>-</div><div class='del'>-		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &amp; ~POWER_TARGET_ON);</div><div class='del'>-		do {</div><div class='del'>-			pp_status = REG_READ(PP_STATUS);</div><div class='del'>-		} while ((pp_status &amp; PP_ON) == 0);</div><div class='del'>-	}</div><div class='del'>-	dev_priv-&gt;lid_last_state =  readl(lid_state);</div><div class='del'>-</div><div class='del'>-lid_timer_schedule:</div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;lid_lock, irq_flags);</div><div class='del'>-	if (!timer_pending(lid_timer)) {</div><div class='del'>-		lid_timer-&gt;expires = jiffies + PSB_LID_DELAY;</div><div class='del'>-		add_timer(lid_timer);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev_priv-&gt;lid_lock, irq_flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void psb_lid_timer_init(struct drm_psb_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	struct timer_list *lid_timer = &amp;dev_priv-&gt;lid_timer;</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;dev_priv-&gt;lid_lock);</div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;lid_lock, irq_flags);</div><div class='del'>-</div><div class='del'>-	timer_setup(lid_timer, psb_lid_timer_func, 0);</div><div class='del'>-</div><div class='del'>-	lid_timer-&gt;expires = jiffies + PSB_LID_DELAY;</div><div class='del'>-</div><div class='del'>-	add_timer(lid_timer);</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev_priv-&gt;lid_lock, irq_flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void psb_lid_timer_takedown(struct drm_psb_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	del_timer_sync(&amp;dev_priv-&gt;lid_timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/drivers/gpu/drm/gud/gud_connector.c b/drivers/gpu/drm/gud/gud_connector.c<br/>index 034e78360d4f..0f07d77c5d52 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gud/gud_connector.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/gud/gud_connector.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/gud/gud_connector.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/gud/gud_connector.c</a></div><div class='hunk'>@@ -221,7 +221,7 @@ static int gud_connector_get_modes(struct drm_connector *connector)</div><div class='ctx'> 	struct gud_display_mode_req *reqmodes = NULL;</div><div class='ctx'> 	struct gud_connector_get_edid_ctx edid_ctx;</div><div class='ctx'> 	unsigned int i, num_modes = 0;</div><div class='del'>-	struct edid *edid = NULL;</div><div class='add'>+	const struct drm_edid *drm_edid = NULL;</div><div class='ctx'> 	int idx, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_dev_enter(connector-&gt;dev, &amp;idx))</div><div class='hunk'>@@ -238,13 +238,13 @@ static int gud_connector_get_modes(struct drm_connector *connector)</div><div class='ctx'> 		gud_conn_err(connector, "Invalid EDID size", ret);</div><div class='ctx'> 	} else if (ret &gt; 0) {</div><div class='ctx'> 		edid_ctx.len = ret;</div><div class='del'>-		edid = drm_do_get_edid(connector, gud_connector_get_edid_block, &amp;edid_ctx);</div><div class='add'>+		drm_edid = drm_edid_read_custom(connector, gud_connector_get_edid_block, &amp;edid_ctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(edid_ctx.buf);</div><div class='del'>-	drm_connector_update_edid_property(connector, edid);</div><div class='add'>+	drm_edid_connector_update(connector, drm_edid);</div><div class='ctx'> </div><div class='del'>-	if (edid &amp;&amp; edid_ctx.edid_override)</div><div class='add'>+	if (drm_edid &amp;&amp; edid_ctx.edid_override)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	reqmodes = kmalloc_array(GUD_CONNECTOR_MAX_NUM_MODES, sizeof(*reqmodes), GFP_KERNEL);</div><div class='hunk'>@@ -276,10 +276,10 @@ static int gud_connector_get_modes(struct drm_connector *connector)</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	if (!num_modes)</div><div class='del'>-		num_modes = drm_add_edid_modes(connector, edid);</div><div class='add'>+		num_modes = drm_edid_connector_add_modes(connector);</div><div class='ctx'> </div><div class='ctx'> 	kfree(reqmodes);</div><div class='del'>-	kfree(edid);</div><div class='add'>+	drm_edid_free(drm_edid);</div><div class='ctx'> 	drm_dev_exit(idx);</div><div class='ctx'> </div><div class='ctx'> 	return num_modes;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug<br/>index bc18e2d9ea05..d8397065c3f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/Kconfig.debug?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/Kconfig.debug</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/Kconfig.debug?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/Kconfig.debug</a></div><div class='hunk'>@@ -27,8 +27,8 @@ config DRM_I915_DEBUG</div><div class='ctx'> 	select REF_TRACKER</div><div class='ctx'> 	select STACKDEPOT</div><div class='ctx'> 	select STACKTRACE</div><div class='del'>-	select DRM_DP_AUX_CHARDEV</div><div class='del'>-	select DRM_DISPLAY_DEBUG_DP_TUNNEL_STATE if DRM_I915_DP_TUNNEL</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_CHARDEV</div><div class='add'>+	select DRM_DISPLAY_DP_TUNNEL_STATE_DEBUG if DRM_I915_DP_TUNNEL</div><div class='ctx'> 	select X86_MSR # used by igt/pm_rpm</div><div class='ctx'> 	select DRM_VGEM # used by igt/prime_vgem (dmabuf interop checks)</div><div class='ctx'> 	select DRM_DEBUG_MM if DRM=y</div><div class='head'>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile<br/>index fba73c38e235..7cad944b825c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/Makefile</a></div><div class='hunk'>@@ -32,11 +32,6 @@ endif</div><div class='ctx'> # Enable -Werror in CI and development</div><div class='ctx'> subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror</div><div class='ctx'> </div><div class='del'>-# Fine grained warnings disable</div><div class='del'>-CFLAGS_i915_pci.o = -Wno-override-init</div><div class='del'>-CFLAGS_display/intel_display_device.o = -Wno-override-init</div><div class='del'>-CFLAGS_display/intel_fbdev.o = -Wno-override-init</div><div class='del'>-</div><div class='ctx'> # Support compiling the display code separately for both i915 and xe</div><div class='ctx'> # drivers. Define I915 when building i915.</div><div class='ctx'> subdir-ccflags-y += -DI915</div><div class='hunk'>@@ -271,6 +266,7 @@ i915-y += \</div><div class='ctx'> 	display/intel_display_rps.o \</div><div class='ctx'> 	display/intel_display_wa.o \</div><div class='ctx'> 	display/intel_dmc.o \</div><div class='add'>+	display/intel_dmc_wl.o \</div><div class='ctx'> 	display/intel_dpio_phy.o \</div><div class='ctx'> 	display/intel_dpll.o \</div><div class='ctx'> 	display/intel_dpll_mgr.o \</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h b/drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h<br/>new file mode 100644<br/>index 000000000000..275f4d9c3fb0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h</a></div><div class='hunk'>@@ -0,0 +1,273 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2023 Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __BXT_DPIO_PHY_REGS_H__</div><div class='add'>+#define __BXT_DPIO_PHY_REGS_H__</div><div class='add'>+</div><div class='add'>+#include "intel_display_reg_defs.h"</div><div class='add'>+</div><div class='add'>+/* BXT PHY registers */</div><div class='add'>+#define _BXT_PHY0_BASE			0x6C000</div><div class='add'>+#define _BXT_PHY1_BASE			0x162000</div><div class='add'>+#define _BXT_PHY2_BASE			0x163000</div><div class='add'>+#define BXT_PHY_BASE(phy) \</div><div class='add'>+	 _PICK_EVEN_2RANGES(phy, 1, \</div><div class='add'>+			    _BXT_PHY0_BASE, _BXT_PHY0_BASE, \</div><div class='add'>+			    _BXT_PHY1_BASE, _BXT_PHY2_BASE)</div><div class='add'>+</div><div class='add'>+#define _BXT_PHY(phy, reg) \</div><div class='add'>+	_MMIO(BXT_PHY_BASE(phy) - _BXT_PHY0_BASE + (reg))</div><div class='add'>+</div><div class='add'>+#define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \</div><div class='add'>+	(BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \</div><div class='add'>+					 (reg_ch1) - _BXT_PHY0_BASE))</div><div class='add'>+#define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \</div><div class='add'>+	_MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1))</div><div class='add'>+#define _BXT_LANE_OFFSET(lane)           (((lane) &gt;&gt; 1) * 0x200 + \</div><div class='add'>+					  ((lane) &amp; 1) * 0x80)</div><div class='add'>+#define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \</div><div class='add'>+	_MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) + _BXT_LANE_OFFSET(lane))</div><div class='add'>+</div><div class='add'>+/* BXT PHY PLL registers */</div><div class='add'>+#define _PORT_PLL_A			0x46074</div><div class='add'>+#define _PORT_PLL_B			0x46078</div><div class='add'>+#define _PORT_PLL_C			0x4607c</div><div class='add'>+#define   PORT_PLL_ENABLE		REG_BIT(31)</div><div class='add'>+#define   PORT_PLL_LOCK			REG_BIT(30)</div><div class='add'>+#define   PORT_PLL_REF_SEL		REG_BIT(27)</div><div class='add'>+#define   PORT_PLL_POWER_ENABLE		REG_BIT(26)</div><div class='add'>+#define   PORT_PLL_POWER_STATE		REG_BIT(25)</div><div class='add'>+#define BXT_PORT_PLL_ENABLE(port)	_MMIO_PORT(port, _PORT_PLL_A, _PORT_PLL_B)</div><div class='add'>+</div><div class='add'>+#define _PORT_PLL_EBB_0_A		0x162034</div><div class='add'>+#define _PORT_PLL_EBB_0_B		0x6C034</div><div class='add'>+#define _PORT_PLL_EBB_0_C		0x6C340</div><div class='add'>+#define   PORT_PLL_P1_MASK		REG_GENMASK(15, 13)</div><div class='add'>+#define   PORT_PLL_P1(p1)		REG_FIELD_PREP(PORT_PLL_P1_MASK, (p1))</div><div class='add'>+#define   PORT_PLL_P2_MASK		REG_GENMASK(12, 8)</div><div class='add'>+#define   PORT_PLL_P2(p2)		REG_FIELD_PREP(PORT_PLL_P2_MASK, (p2))</div><div class='add'>+#define BXT_PORT_PLL_EBB_0(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PLL_EBB_0_B, \</div><div class='add'>+							 _PORT_PLL_EBB_0_C)</div><div class='add'>+</div><div class='add'>+#define _PORT_PLL_EBB_4_A		0x162038</div><div class='add'>+#define _PORT_PLL_EBB_4_B		0x6C038</div><div class='add'>+#define _PORT_PLL_EBB_4_C		0x6C344</div><div class='add'>+#define   PORT_PLL_RECALIBRATE		REG_BIT(14)</div><div class='add'>+#define   PORT_PLL_10BIT_CLK_ENABLE	REG_BIT(13)</div><div class='add'>+#define BXT_PORT_PLL_EBB_4(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PLL_EBB_4_B, \</div><div class='add'>+							 _PORT_PLL_EBB_4_C)</div><div class='add'>+</div><div class='add'>+#define _PORT_PLL_0_A			0x162100</div><div class='add'>+#define _PORT_PLL_0_B			0x6C100</div><div class='add'>+#define _PORT_PLL_0_C			0x6C380</div><div class='add'>+/* PORT_PLL_0_A */</div><div class='add'>+#define   PORT_PLL_M2_INT_MASK		REG_GENMASK(7, 0)</div><div class='add'>+#define   PORT_PLL_M2_INT(m2_int)	REG_FIELD_PREP(PORT_PLL_M2_INT_MASK, (m2_int))</div><div class='add'>+/* PORT_PLL_1_A */</div><div class='add'>+#define   PORT_PLL_N_MASK		REG_GENMASK(11, 8)</div><div class='add'>+#define   PORT_PLL_N(n)			REG_FIELD_PREP(PORT_PLL_N_MASK, (n))</div><div class='add'>+/* PORT_PLL_2_A */</div><div class='add'>+#define   PORT_PLL_M2_FRAC_MASK		REG_GENMASK(21, 0)</div><div class='add'>+#define   PORT_PLL_M2_FRAC(m2_frac)	REG_FIELD_PREP(PORT_PLL_M2_FRAC_MASK, (m2_frac))</div><div class='add'>+/* PORT_PLL_3_A */</div><div class='add'>+#define   PORT_PLL_M2_FRAC_ENABLE	REG_BIT(16)</div><div class='add'>+/* PORT_PLL_6_A */</div><div class='add'>+#define   PORT_PLL_GAIN_CTL_MASK	REG_GENMASK(18, 16)</div><div class='add'>+#define   PORT_PLL_GAIN_CTL(x)		REG_FIELD_PREP(PORT_PLL_GAIN_CTL_MASK, (x))</div><div class='add'>+#define   PORT_PLL_INT_COEFF_MASK	REG_GENMASK(12, 8)</div><div class='add'>+#define   PORT_PLL_INT_COEFF(x)		REG_FIELD_PREP(PORT_PLL_INT_COEFF_MASK, (x))</div><div class='add'>+#define   PORT_PLL_PROP_COEFF_MASK	REG_GENMASK(3, 0)</div><div class='add'>+#define   PORT_PLL_PROP_COEFF(x)	REG_FIELD_PREP(PORT_PLL_PROP_COEFF_MASK, (x))</div><div class='add'>+/* PORT_PLL_8_A */</div><div class='add'>+#define   PORT_PLL_TARGET_CNT_MASK	REG_GENMASK(9, 0)</div><div class='add'>+#define   PORT_PLL_TARGET_CNT(x)	REG_FIELD_PREP(PORT_PLL_TARGET_CNT_MASK, (x))</div><div class='add'>+/* PORT_PLL_9_A */</div><div class='add'>+#define  PORT_PLL_LOCK_THRESHOLD_MASK	REG_GENMASK(3, 1)</div><div class='add'>+#define  PORT_PLL_LOCK_THRESHOLD(x)	REG_FIELD_PREP(PORT_PLL_LOCK_THRESHOLD_MASK, (x))</div><div class='add'>+/* PORT_PLL_10_A */</div><div class='add'>+#define  PORT_PLL_DCO_AMP_OVR_EN_H	REG_BIT(27)</div><div class='add'>+#define  PORT_PLL_DCO_AMP_MASK		REG_GENMASK(13, 10)</div><div class='add'>+#define  PORT_PLL_DCO_AMP(x)		REG_FIELD_PREP(PORT_PLL_DCO_AMP_MASK, (x))</div><div class='add'>+#define _PORT_PLL_BASE(phy, ch)		_BXT_PHY_CH(phy, ch, \</div><div class='add'>+						    _PORT_PLL_0_B, \</div><div class='add'>+						    _PORT_PLL_0_C)</div><div class='add'>+#define BXT_PORT_PLL(phy, ch, idx)	_MMIO(_PORT_PLL_BASE(phy, ch) + \</div><div class='add'>+					      (idx) * 4)</div><div class='add'>+</div><div class='add'>+/* BXT PHY common lane registers */</div><div class='add'>+#define _PORT_CL1CM_DW0_A		0x162000</div><div class='add'>+#define _PORT_CL1CM_DW0_BC		0x6C000</div><div class='add'>+#define   PHY_POWER_GOOD		REG_BIT(16)</div><div class='add'>+#define   PHY_RESERVED			REG_BIT(7)</div><div class='add'>+#define BXT_PORT_CL1CM_DW0(phy)		_BXT_PHY((phy), _PORT_CL1CM_DW0_BC)</div><div class='add'>+</div><div class='add'>+#define _PORT_CL1CM_DW9_A		0x162024</div><div class='add'>+#define _PORT_CL1CM_DW9_BC		0x6C024</div><div class='add'>+#define   IREF0RC_OFFSET_MASK		REG_GENMASK(15, 8)</div><div class='add'>+#define   IREF0RC_OFFSET(x)		REG_FIELD_PREP(IREF0RC_OFFSET_MASK, (x))</div><div class='add'>+#define BXT_PORT_CL1CM_DW9(phy)		_BXT_PHY((phy), _PORT_CL1CM_DW9_BC)</div><div class='add'>+</div><div class='add'>+#define _PORT_CL1CM_DW10_A		0x162028</div><div class='add'>+#define _PORT_CL1CM_DW10_BC		0x6C028</div><div class='add'>+#define   IREF1RC_OFFSET_MASK		REG_GENMASK(15, 8)</div><div class='add'>+#define   IREF1RC_OFFSET(x)		REG_FIELD_PREP(IREF1RC_OFFSET_MASK, (x))</div><div class='add'>+#define BXT_PORT_CL1CM_DW10(phy)	_BXT_PHY((phy), _PORT_CL1CM_DW10_BC)</div><div class='add'>+</div><div class='add'>+#define _PORT_CL1CM_DW28_A		0x162070</div><div class='add'>+#define _PORT_CL1CM_DW28_BC		0x6C070</div><div class='add'>+#define   OCL1_POWER_DOWN_EN		REG_BIT(23)</div><div class='add'>+#define   DW28_OLDO_DYN_PWR_DOWN_EN	REG_BIT(22)</div><div class='add'>+#define   SUS_CLK_CONFIG		REG_GENMASK(1, 0)</div><div class='add'>+#define BXT_PORT_CL1CM_DW28(phy)	_BXT_PHY((phy), _PORT_CL1CM_DW28_BC)</div><div class='add'>+</div><div class='add'>+#define _PORT_CL1CM_DW30_A		0x162078</div><div class='add'>+#define _PORT_CL1CM_DW30_BC		0x6C078</div><div class='add'>+#define   OCL2_LDOFUSE_PWR_DIS		REG_BIT(6)</div><div class='add'>+#define BXT_PORT_CL1CM_DW30(phy)	_BXT_PHY((phy), _PORT_CL1CM_DW30_BC)</div><div class='add'>+</div><div class='add'>+/* The spec defines this only for BXT PHY0, but lets assume that this</div><div class='add'>+ * would exist for PHY1 too if it had a second channel.</div><div class='add'>+ */</div><div class='add'>+#define _PORT_CL2CM_DW6_A		0x162358</div><div class='add'>+#define _PORT_CL2CM_DW6_BC		0x6C358</div><div class='add'>+#define BXT_PORT_CL2CM_DW6(phy)		_BXT_PHY((phy), _PORT_CL2CM_DW6_BC)</div><div class='add'>+#define   DW6_OLDO_DYN_PWR_DOWN_EN	REG_BIT(28)</div><div class='add'>+</div><div class='add'>+/* BXT PHY Ref registers */</div><div class='add'>+#define _PORT_REF_DW3_A			0x16218C</div><div class='add'>+#define _PORT_REF_DW3_BC		0x6C18C</div><div class='add'>+#define   GRC_DONE			REG_BIT(22)</div><div class='add'>+#define BXT_PORT_REF_DW3(phy)		_BXT_PHY((phy), _PORT_REF_DW3_BC)</div><div class='add'>+</div><div class='add'>+#define _PORT_REF_DW6_A			0x162198</div><div class='add'>+#define _PORT_REF_DW6_BC		0x6C198</div><div class='add'>+#define   GRC_CODE_MASK			REG_GENMASK(31, 24)</div><div class='add'>+#define   GRC_CODE(x)			REG_FIELD_PREP(GRC_CODE_MASK, (x))</div><div class='add'>+#define   GRC_CODE_FAST_MASK		REG_GENMASK(23, 16)</div><div class='add'>+#define   GRC_CODE_FAST(x)		REG_FIELD_PREP(GRC_CODE_FAST_MASK, (x))</div><div class='add'>+#define   GRC_CODE_SLOW_MASK		REG_GENMASK(15, 8)</div><div class='add'>+#define   GRC_CODE_SLOW(x)		REG_FIELD_PREP(GRC_CODE_SLOW_MASK, (x))</div><div class='add'>+#define   GRC_CODE_NOM_MASK		REG_GENMASK(7, 0)</div><div class='add'>+#define   GRC_CODE_NOM(x)		REG_FIELD_PREP(GRC_CODE_NOM_MASK, (x))</div><div class='add'>+#define BXT_PORT_REF_DW6(phy)		_BXT_PHY((phy), _PORT_REF_DW6_BC)</div><div class='add'>+</div><div class='add'>+#define _PORT_REF_DW8_A			0x1621A0</div><div class='add'>+#define _PORT_REF_DW8_BC		0x6C1A0</div><div class='add'>+#define   GRC_DIS			REG_BIT(15)</div><div class='add'>+#define   GRC_RDY_OVRD			REG_BIT(1)</div><div class='add'>+#define BXT_PORT_REF_DW8(phy)		_BXT_PHY((phy), _PORT_REF_DW8_BC)</div><div class='add'>+</div><div class='add'>+/* BXT PHY PCS registers */</div><div class='add'>+#define _PORT_PCS_DW10_LN01_A		0x162428</div><div class='add'>+#define _PORT_PCS_DW10_LN01_B		0x6C428</div><div class='add'>+#define _PORT_PCS_DW10_LN01_C		0x6C828</div><div class='add'>+#define _PORT_PCS_DW10_GRP_A		0x162C28</div><div class='add'>+#define _PORT_PCS_DW10_GRP_B		0x6CC28</div><div class='add'>+#define _PORT_PCS_DW10_GRP_C		0x6CE28</div><div class='add'>+#define BXT_PORT_PCS_DW10_LN01(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PCS_DW10_LN01_B, \</div><div class='add'>+							 _PORT_PCS_DW10_LN01_C)</div><div class='add'>+#define BXT_PORT_PCS_DW10_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PCS_DW10_GRP_B, \</div><div class='add'>+							 _PORT_PCS_DW10_GRP_C)</div><div class='add'>+</div><div class='add'>+#define   TX2_SWING_CALC_INIT		REG_BIT(31)</div><div class='add'>+#define   TX1_SWING_CALC_INIT		REG_BIT(30)</div><div class='add'>+</div><div class='add'>+#define _PORT_PCS_DW12_LN01_A		0x162430</div><div class='add'>+#define _PORT_PCS_DW12_LN01_B		0x6C430</div><div class='add'>+#define _PORT_PCS_DW12_LN01_C		0x6C830</div><div class='add'>+#define _PORT_PCS_DW12_LN23_A		0x162630</div><div class='add'>+#define _PORT_PCS_DW12_LN23_B		0x6C630</div><div class='add'>+#define _PORT_PCS_DW12_LN23_C		0x6CA30</div><div class='add'>+#define _PORT_PCS_DW12_GRP_A		0x162c30</div><div class='add'>+#define _PORT_PCS_DW12_GRP_B		0x6CC30</div><div class='add'>+#define _PORT_PCS_DW12_GRP_C		0x6CE30</div><div class='add'>+#define   LANESTAGGER_STRAP_OVRD	REG_BIT(6)</div><div class='add'>+#define   LANE_STAGGER_MASK		REG_GENMASK(4, 0)</div><div class='add'>+#define BXT_PORT_PCS_DW12_LN01(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PCS_DW12_LN01_B, \</div><div class='add'>+							 _PORT_PCS_DW12_LN01_C)</div><div class='add'>+#define BXT_PORT_PCS_DW12_LN23(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PCS_DW12_LN23_B, \</div><div class='add'>+							 _PORT_PCS_DW12_LN23_C)</div><div class='add'>+#define BXT_PORT_PCS_DW12_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_PCS_DW12_GRP_B, \</div><div class='add'>+							 _PORT_PCS_DW12_GRP_C)</div><div class='add'>+</div><div class='add'>+/* BXT PHY TX registers */</div><div class='add'>+#define _PORT_TX_DW2_LN0_A		0x162508</div><div class='add'>+#define _PORT_TX_DW2_LN0_B		0x6C508</div><div class='add'>+#define _PORT_TX_DW2_LN0_C		0x6C908</div><div class='add'>+#define _PORT_TX_DW2_GRP_A		0x162D08</div><div class='add'>+#define _PORT_TX_DW2_GRP_B		0x6CD08</div><div class='add'>+#define _PORT_TX_DW2_GRP_C		0x6CF08</div><div class='add'>+#define BXT_PORT_TX_DW2_LN(phy, ch, lane)	_MMIO_BXT_PHY_CH_LN(phy, ch, lane, \</div><div class='add'>+								    _PORT_TX_DW2_LN0_B,	\</div><div class='add'>+								    _PORT_TX_DW2_LN0_C)</div><div class='add'>+#define BXT_PORT_TX_DW2_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_TX_DW2_GRP_B, \</div><div class='add'>+							 _PORT_TX_DW2_GRP_C)</div><div class='add'>+#define   MARGIN_000_MASK		REG_GENMASK(23, 16)</div><div class='add'>+#define   MARGIN_000(x)			REG_FIELD_PREP(MARGIN_000_MASK, (x))</div><div class='add'>+#define   UNIQ_TRANS_SCALE_MASK		REG_GENMASK(15, 8)</div><div class='add'>+#define   UNIQ_TRANS_SCALE(x)		REG_FIELD_PREP(UNIQ_TRANS_SCALE_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define _PORT_TX_DW3_LN0_A		0x16250C</div><div class='add'>+#define _PORT_TX_DW3_LN0_B		0x6C50C</div><div class='add'>+#define _PORT_TX_DW3_LN0_C		0x6C90C</div><div class='add'>+#define _PORT_TX_DW3_GRP_A		0x162D0C</div><div class='add'>+#define _PORT_TX_DW3_GRP_B		0x6CD0C</div><div class='add'>+#define _PORT_TX_DW3_GRP_C		0x6CF0C</div><div class='add'>+#define BXT_PORT_TX_DW3_LN(phy, ch, lane)	_MMIO_BXT_PHY_CH_LN(phy, ch, lane, \</div><div class='add'>+								    _PORT_TX_DW3_LN0_B, \</div><div class='add'>+								    _PORT_TX_DW3_LN0_C)</div><div class='add'>+#define BXT_PORT_TX_DW3_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_TX_DW3_GRP_B, \</div><div class='add'>+							 _PORT_TX_DW3_GRP_C)</div><div class='add'>+#define   SCALE_DCOMP_METHOD		REG_BIT(26)</div><div class='add'>+#define   UNIQUE_TRANGE_EN_METHOD	REG_BIT(27)</div><div class='add'>+</div><div class='add'>+#define _PORT_TX_DW4_LN0_A		0x162510</div><div class='add'>+#define _PORT_TX_DW4_LN0_B		0x6C510</div><div class='add'>+#define _PORT_TX_DW4_LN0_C		0x6C910</div><div class='add'>+#define _PORT_TX_DW4_GRP_A		0x162D10</div><div class='add'>+#define _PORT_TX_DW4_GRP_B		0x6CD10</div><div class='add'>+#define _PORT_TX_DW4_GRP_C		0x6CF10</div><div class='add'>+#define BXT_PORT_TX_DW4_LN(phy, ch, lane)	_MMIO_BXT_PHY_CH_LN(phy, ch, lane, \</div><div class='add'>+								    _PORT_TX_DW4_LN0_B, \</div><div class='add'>+								    _PORT_TX_DW4_LN0_C)</div><div class='add'>+#define BXT_PORT_TX_DW4_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_TX_DW4_GRP_B, \</div><div class='add'>+							 _PORT_TX_DW4_GRP_C)</div><div class='add'>+#define   DE_EMPHASIS_MASK		REG_GENMASK(31, 24)</div><div class='add'>+#define   DE_EMPHASIS(x)		REG_FIELD_PREP(DE_EMPHASIS_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define _PORT_TX_DW5_LN0_A		0x162514</div><div class='add'>+#define _PORT_TX_DW5_LN0_B		0x6C514</div><div class='add'>+#define _PORT_TX_DW5_LN0_C		0x6C914</div><div class='add'>+#define _PORT_TX_DW5_GRP_A		0x162D14</div><div class='add'>+#define _PORT_TX_DW5_GRP_B		0x6CD14</div><div class='add'>+#define _PORT_TX_DW5_GRP_C		0x6CF14</div><div class='add'>+#define BXT_PORT_TX_DW5_LN(phy, ch, lane)	_MMIO_BXT_PHY_CH_LN(phy, ch, lane, \</div><div class='add'>+								    _PORT_TX_DW5_LN0_B, \</div><div class='add'>+								    _PORT_TX_DW5_LN0_C)</div><div class='add'>+#define BXT_PORT_TX_DW5_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='add'>+							 _PORT_TX_DW5_GRP_B, \</div><div class='add'>+							 _PORT_TX_DW5_GRP_C)</div><div class='add'>+#define   DCC_DELAY_RANGE_1		REG_BIT(9)</div><div class='add'>+#define   DCC_DELAY_RANGE_2		REG_BIT(8)</div><div class='add'>+</div><div class='add'>+#define _PORT_TX_DW14_LN0_A		0x162538</div><div class='add'>+#define _PORT_TX_DW14_LN0_B		0x6C538</div><div class='add'>+#define _PORT_TX_DW14_LN0_C		0x6C938</div><div class='add'>+#define   LATENCY_OPTIM			REG_BIT(30)</div><div class='add'>+#define BXT_PORT_TX_DW14_LN(phy, ch, lane)	_MMIO_BXT_PHY_CH_LN(phy, ch, lane, \</div><div class='add'>+								    _PORT_TX_DW14_LN0_B, \</div><div class='add'>+								    _PORT_TX_DW14_LN0_C)</div><div class='add'>+</div><div class='add'>+#endif /* __BXT_DPIO_PHY_REGS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c<br/>index ac456a2275db..79ecfc339430 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/icl_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/icl_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/icl_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/icl_dsi.c</a></div><div class='hunk'>@@ -1616,8 +1616,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> 				    struct drm_connector_state *conn_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,</div><div class='del'>-						   base);</div><div class='add'>+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	struct intel_connector *intel_connector = intel_dsi-&gt;attached_connector;</div><div class='ctx'> 	struct drm_display_mode *adjusted_mode =</div><div class='ctx'> 		&amp;pipe_config-&gt;hw.adjusted_mode;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c<br/>index 2bb270f82932..7a77ae3dc394 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_atomic.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_atomic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_atomic.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_atomic.c</a></div><div class='hunk'>@@ -62,7 +62,7 @@ int intel_digital_connector_atomic_get_property(struct drm_connector *connector,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	struct intel_digital_connector_state *intel_conn_state =</div><div class='add'>+	const struct intel_digital_connector_state *intel_conn_state =</div><div class='ctx'> 		to_intel_digital_connector_state(state);</div><div class='ctx'> </div><div class='ctx'> 	if (property == dev_priv-&gt;display.properties.force_audio)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c<br/>index 07e0c73204f3..ed81e1466c4b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_audio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_audio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_audio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_audio.c</a></div><div class='hunk'>@@ -76,19 +76,6 @@ struct intel_audio_funcs {</div><div class='ctx'> 				       struct intel_crtc_state *crtc_state);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* DP N/M table */</div><div class='del'>-#define LC_810M	810000</div><div class='del'>-#define LC_540M	540000</div><div class='del'>-#define LC_270M	270000</div><div class='del'>-#define LC_162M	162000</div><div class='del'>-</div><div class='del'>-struct dp_aud_n_m {</div><div class='del'>-	int sample_rate;</div><div class='del'>-	int clock;</div><div class='del'>-	u16 m;</div><div class='del'>-	u16 n;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct hdmi_aud_ncts {</div><div class='ctx'> 	int sample_rate;</div><div class='ctx'> 	int clock;</div><div class='hunk'>@@ -96,60 +83,6 @@ struct hdmi_aud_ncts {</div><div class='ctx'> 	int cts;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Values according to DP 1.4 Table 2-104 */</div><div class='del'>-static const struct dp_aud_n_m dp_aud_n_m[] = {</div><div class='del'>-	{ 32000, LC_162M, 1024, 10125 },</div><div class='del'>-	{ 44100, LC_162M, 784, 5625 },</div><div class='del'>-	{ 48000, LC_162M, 512, 3375 },</div><div class='del'>-	{ 64000, LC_162M, 2048, 10125 },</div><div class='del'>-	{ 88200, LC_162M, 1568, 5625 },</div><div class='del'>-	{ 96000, LC_162M, 1024, 3375 },</div><div class='del'>-	{ 128000, LC_162M, 4096, 10125 },</div><div class='del'>-	{ 176400, LC_162M, 3136, 5625 },</div><div class='del'>-	{ 192000, LC_162M, 2048, 3375 },</div><div class='del'>-	{ 32000, LC_270M, 1024, 16875 },</div><div class='del'>-	{ 44100, LC_270M, 784, 9375 },</div><div class='del'>-	{ 48000, LC_270M, 512, 5625 },</div><div class='del'>-	{ 64000, LC_270M, 2048, 16875 },</div><div class='del'>-	{ 88200, LC_270M, 1568, 9375 },</div><div class='del'>-	{ 96000, LC_270M, 1024, 5625 },</div><div class='del'>-	{ 128000, LC_270M, 4096, 16875 },</div><div class='del'>-	{ 176400, LC_270M, 3136, 9375 },</div><div class='del'>-	{ 192000, LC_270M, 2048, 5625 },</div><div class='del'>-	{ 32000, LC_540M, 1024, 33750 },</div><div class='del'>-	{ 44100, LC_540M, 784, 18750 },</div><div class='del'>-	{ 48000, LC_540M, 512, 11250 },</div><div class='del'>-	{ 64000, LC_540M, 2048, 33750 },</div><div class='del'>-	{ 88200, LC_540M, 1568, 18750 },</div><div class='del'>-	{ 96000, LC_540M, 1024, 11250 },</div><div class='del'>-	{ 128000, LC_540M, 4096, 33750 },</div><div class='del'>-	{ 176400, LC_540M, 3136, 18750 },</div><div class='del'>-	{ 192000, LC_540M, 2048, 11250 },</div><div class='del'>-	{ 32000, LC_810M, 1024, 50625 },</div><div class='del'>-	{ 44100, LC_810M, 784, 28125 },</div><div class='del'>-	{ 48000, LC_810M, 512, 16875 },</div><div class='del'>-	{ 64000, LC_810M, 2048, 50625 },</div><div class='del'>-	{ 88200, LC_810M, 1568, 28125 },</div><div class='del'>-	{ 96000, LC_810M, 1024, 16875 },</div><div class='del'>-	{ 128000, LC_810M, 4096, 50625 },</div><div class='del'>-	{ 176400, LC_810M, 3136, 28125 },</div><div class='del'>-	{ 192000, LC_810M, 2048, 16875 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct dp_aud_n_m *</div><div class='del'>-audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(dp_aud_n_m); i++) {</div><div class='del'>-		if (rate == dp_aud_n_m[i].sample_rate &amp;&amp;</div><div class='del'>-		    crtc_state-&gt;port_clock == dp_aud_n_m[i].clock)</div><div class='del'>-			return &amp;dp_aud_n_m[i];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct {</div><div class='ctx'> 	int clock;</div><div class='ctx'> 	u32 config;</div><div class='hunk'>@@ -387,47 +320,17 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder,</div><div class='ctx'> 			   const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct i915_audio_component *acomp = i915-&gt;display.audio.component;</div><div class='ctx'> 	enum transcoder cpu_transcoder = crtc_state-&gt;cpu_transcoder;</div><div class='del'>-	enum port port = encoder-&gt;port;</div><div class='del'>-	const struct dp_aud_n_m *nm;</div><div class='del'>-	int rate;</div><div class='del'>-	u32 tmp;</div><div class='del'>-</div><div class='del'>-	rate = acomp ? acomp-&gt;aud_sample_rate[port] : 0;</div><div class='del'>-	nm = audio_config_dp_get_n_m(crtc_state, rate);</div><div class='del'>-	if (nm)</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "using Maud %u, Naud %u\n", nm-&gt;m,</div><div class='del'>-			    nm-&gt;n);</div><div class='del'>-	else</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "using automatic Maud, Naud\n");</div><div class='del'>-</div><div class='del'>-	tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder));</div><div class='del'>-	tmp &amp;= ~AUD_CONFIG_N_VALUE_INDEX;</div><div class='del'>-	tmp &amp;= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;</div><div class='del'>-	tmp &amp;= ~AUD_CONFIG_N_PROG_ENABLE;</div><div class='del'>-	tmp |= AUD_CONFIG_N_VALUE_INDEX;</div><div class='ctx'> </div><div class='del'>-	if (nm) {</div><div class='del'>-		tmp &amp;= ~AUD_CONFIG_N_MASK;</div><div class='del'>-		tmp |= AUD_CONFIG_N(nm-&gt;n);</div><div class='del'>-		tmp |= AUD_CONFIG_N_PROG_ENABLE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp);</div><div class='del'>-</div><div class='del'>-	tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder));</div><div class='del'>-	tmp &amp;= ~AUD_CONFIG_M_MASK;</div><div class='del'>-	tmp &amp;= ~AUD_M_CTS_M_VALUE_INDEX;</div><div class='del'>-	tmp &amp;= ~AUD_M_CTS_M_PROG_ENABLE;</div><div class='del'>-</div><div class='del'>-	if (nm) {</div><div class='del'>-		tmp |= nm-&gt;m;</div><div class='del'>-		tmp |= AUD_M_CTS_M_VALUE_INDEX;</div><div class='del'>-		tmp |= AUD_M_CTS_M_PROG_ENABLE;</div><div class='del'>-	}</div><div class='add'>+	/* Enable time stamps. Let HW calculate Maud/Naud values */</div><div class='add'>+	intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder),</div><div class='add'>+		     AUD_CONFIG_N_VALUE_INDEX |</div><div class='add'>+		     AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK |</div><div class='add'>+		     AUD_CONFIG_UPPER_N_MASK |</div><div class='add'>+		     AUD_CONFIG_LOWER_N_MASK |</div><div class='add'>+		     AUD_CONFIG_N_PROG_ENABLE,</div><div class='add'>+		     AUD_CONFIG_N_VALUE_INDEX);</div><div class='ctx'> </div><div class='del'>-	intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_audio_regs.h b/drivers/gpu/drm/i915/display/intel_audio_regs.h<br/>index 616e7b1275c4..88ea2740365d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_audio_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_audio_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_audio_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_audio_regs.h</a></div><div class='hunk'>@@ -148,4 +148,20 @@</div><div class='ctx'> #define HBLANK_START_COUNT_96	4</div><div class='ctx'> #define HBLANK_START_COUNT_128	5</div><div class='ctx'> </div><div class='add'>+/* LPE Audio */</div><div class='add'>+#define I915_HDMI_LPE_AUDIO_BASE	(VLV_DISPLAY_BASE + 0x65000)</div><div class='add'>+#define I915_HDMI_LPE_AUDIO_SIZE	0x1000</div><div class='add'>+</div><div class='add'>+#define VLV_AUD_CHICKEN_BIT_REG		_MMIO(VLV_DISPLAY_BASE + 0x62F38)</div><div class='add'>+#define VLV_CHICKEN_BIT_DBG_ENABLE	(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define _VLV_AUD_PORT_EN_B_DBG		0x62F20</div><div class='add'>+#define _VLV_AUD_PORT_EN_C_DBG		0x62F30</div><div class='add'>+#define _VLV_AUD_PORT_EN_D_DBG		0x62F34</div><div class='add'>+#define VLV_AUD_PORT_EN_DBG(port)	_MMIO_BASE_PORT3(VLV_DISPLAY_BASE, (port) - PORT_B, \</div><div class='add'>+							 _VLV_AUD_PORT_EN_B_DBG, \</div><div class='add'>+							 _VLV_AUD_PORT_EN_C_DBG, \</div><div class='add'>+							 _VLV_AUD_PORT_EN_D_DBG)</div><div class='add'>+#define VLV_AMP_MUTE		        (1 &lt;&lt; 1)</div><div class='add'>+</div><div class='ctx'> #endif /* __INTEL_AUDIO_REGS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c<br/>index 1946d7fb3c2e..071668bfe5d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_backlight.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_backlight.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_backlight.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_backlight.c</a></div><div class='hunk'>@@ -83,16 +83,16 @@ static u32 scale_hw_to_user(struct intel_connector *connector,</div><div class='ctx'> </div><div class='ctx'> u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(connector-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(connector);</div><div class='ctx'> 	struct intel_panel *panel = &amp;connector-&gt;panel;</div><div class='ctx'> </div><div class='del'>-	drm_WARN_ON(&amp;i915-&gt;drm, panel-&gt;backlight.pwm_level_max == 0);</div><div class='add'>+	drm_WARN_ON(display-&gt;drm, panel-&gt;backlight.pwm_level_max == 0);</div><div class='ctx'> </div><div class='del'>-	if (i915-&gt;display.params.invert_brightness &lt; 0)</div><div class='add'>+	if (display-&gt;params.invert_brightness &lt; 0)</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='del'>-	if (i915-&gt;display.params.invert_brightness &gt; 0 ||</div><div class='del'>-	    intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) {</div><div class='add'>+	if (display-&gt;params.invert_brightness &gt; 0 ||</div><div class='add'>+	    intel_has_quirk(display, QUIRK_INVERT_BRIGHTNESS)) {</div><div class='ctx'> 		return panel-&gt;backlight.pwm_level_max - val + panel-&gt;backlight.pwm_level_min;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -126,15 +126,15 @@ u32 intel_backlight_level_to_pwm(struct intel_connector *connector, u32 val)</div><div class='ctx'> </div><div class='ctx'> u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(connector-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(connector);</div><div class='ctx'> 	struct intel_panel *panel = &amp;connector-&gt;panel;</div><div class='ctx'> </div><div class='del'>-	drm_WARN_ON_ONCE(&amp;i915-&gt;drm,</div><div class='add'>+	drm_WARN_ON_ONCE(display-&gt;drm,</div><div class='ctx'> 			 panel-&gt;backlight.max == 0 || panel-&gt;backlight.pwm_level_max == 0);</div><div class='ctx'> </div><div class='del'>-	if (i915-&gt;display.params.invert_brightness &gt; 0 ||</div><div class='del'>-	    (i915-&gt;display.params.invert_brightness == 0 &amp;&amp;</div><div class='del'>-	     intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))</div><div class='add'>+	if (display-&gt;params.invert_brightness &gt; 0 ||</div><div class='add'>+	    (display-&gt;params.invert_brightness == 0 &amp;&amp;</div><div class='add'>+	     intel_has_quirk(display, QUIRK_INVERT_BRIGHTNESS)))</div><div class='ctx'> 		val = panel-&gt;backlight.pwm_level_max - (val - panel-&gt;backlight.pwm_level_min);</div><div class='ctx'> </div><div class='ctx'> 	return scale(val, panel-&gt;backlight.pwm_level_min, panel-&gt;backlight.pwm_level_max,</div><div class='hunk'>@@ -761,8 +761,8 @@ static void __intel_backlight_enable(const struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(panel-&gt;backlight.max == 0);</div><div class='ctx'> </div><div class='del'>-	if (panel-&gt;backlight.level &lt;= panel-&gt;backlight.min) {</div><div class='del'>-		panel-&gt;backlight.level = panel-&gt;backlight.max;</div><div class='add'>+	if (panel-&gt;backlight.level &lt; panel-&gt;backlight.min) {</div><div class='add'>+		panel-&gt;backlight.level = panel-&gt;backlight.min;</div><div class='ctx'> 		if (panel-&gt;backlight.device)</div><div class='ctx'> 			panel-&gt;backlight.device-&gt;props.brightness =</div><div class='ctx'> 				scale_hw_to_user(connector,</div><div class='hunk'>@@ -949,7 +949,7 @@ int intel_backlight_device_register(struct intel_connector *connector)</div><div class='ctx'> 	else</div><div class='ctx'> 		props.power = FB_BLANK_POWERDOWN;</div><div class='ctx'> </div><div class='del'>-	name = kstrdup("intel_backlight", GFP_KERNEL);</div><div class='add'>+	name = kstrdup_const("intel_backlight", GFP_KERNEL);</div><div class='ctx'> 	if (!name)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -963,7 +963,7 @@ int intel_backlight_device_register(struct intel_connector *connector)</div><div class='ctx'> 		 * compatibility. Use unique names for subsequent backlight devices as a</div><div class='ctx'> 		 * fallback when the default name already exists.</div><div class='ctx'> 		 */</div><div class='del'>-		kfree(name);</div><div class='add'>+		kfree_const(name);</div><div class='ctx'> 		name = kasprintf(GFP_KERNEL, "card%d-%s-backlight",</div><div class='ctx'> 				 i915-&gt;drm.primary-&gt;index, connector-&gt;base.name);</div><div class='ctx'> 		if (!name)</div><div class='hunk'>@@ -987,7 +987,7 @@ int intel_backlight_device_register(struct intel_connector *connector)</div><div class='ctx'> 		    connector-&gt;base.base.id, connector-&gt;base.name, name);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	kfree(name);</div><div class='add'>+	kfree_const(name);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1642,17 +1642,17 @@ void intel_backlight_update(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(connector-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(connector);</div><div class='ctx'> 	struct intel_panel *panel = &amp;connector-&gt;panel;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!connector-&gt;panel.vbt.backlight.present) {</div><div class='del'>-		if (intel_has_quirk(i915, QUIRK_BACKLIGHT_PRESENT)) {</div><div class='del'>-			drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+		if (intel_has_quirk(display, QUIRK_BACKLIGHT_PRESENT)) {</div><div class='add'>+			drm_dbg_kms(display-&gt;drm,</div><div class='ctx'> 				    "[CONNECTOR:%d:%s] no backlight present per VBT, but present per quirk\n",</div><div class='ctx'> 				    connector-&gt;base.base.id, connector-&gt;base.name);</div><div class='ctx'> 		} else {</div><div class='del'>-			drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+			drm_dbg_kms(display-&gt;drm,</div><div class='ctx'> 				    "[CONNECTOR:%d:%s] no backlight present per VBT\n",</div><div class='ctx'> 				    connector-&gt;base.base.id, connector-&gt;base.name);</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1660,16 +1660,16 @@ int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* ensure intel_panel has been initialized first */</div><div class='del'>-	if (drm_WARN_ON(&amp;i915-&gt;drm, !panel-&gt;backlight.funcs))</div><div class='add'>+	if (drm_WARN_ON(display-&gt;drm, !panel-&gt;backlight.funcs))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* set level and max in panel struct */</div><div class='del'>-	mutex_lock(&amp;i915-&gt;display.backlight.lock);</div><div class='add'>+	mutex_lock(&amp;display-&gt;backlight.lock);</div><div class='ctx'> 	ret = panel-&gt;backlight.funcs-&gt;setup(connector, pipe);</div><div class='del'>-	mutex_unlock(&amp;i915-&gt;display.backlight.lock);</div><div class='add'>+	mutex_unlock(&amp;display-&gt;backlight.lock);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+		drm_dbg_kms(display-&gt;drm,</div><div class='ctx'> 			    "[CONNECTOR:%d:%s] failed to setup backlight\n",</div><div class='ctx'> 			    connector-&gt;base.base.id, connector-&gt;base.name);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1677,7 +1677,7 @@ int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe)</div><div class='ctx'> </div><div class='ctx'> 	panel-&gt;backlight.present = true;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+	drm_dbg_kms(display-&gt;drm,</div><div class='ctx'> 		    "[CONNECTOR:%d:%s] backlight initialized, %s, brightness %u/%u\n",</div><div class='ctx'> 		    connector-&gt;base.base.id, connector-&gt;base.name,</div><div class='ctx'> 		    str_enabled_disabled(panel-&gt;backlight.enabled),</div><div class='hunk'>@@ -1821,7 +1821,7 @@ void intel_backlight_init_funcs(struct intel_panel *panel)</div><div class='ctx'> 		if (intel_dp_aux_init_backlight_funcs(connector) == 0)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		if (!intel_has_quirk(i915, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK))</div><div class='add'>+		if (!intel_has_quirk(&amp;i915-&gt;display, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK))</div><div class='ctx'> 			connector-&gt;panel.backlight.power = intel_pps_backlight_power;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c<br/>index 52bd3576835b..5fb48b6129b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_bios.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_bios.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_bios.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_bios.c</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;drm/display/drm_dp_helper.h&gt;</div><div class='ctx'> #include &lt;drm/display/drm_dsc_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='hunk'>@@ -593,11 +595,14 @@ get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,</div><div class='ctx'> 	return (const void *)data + ptrs-&gt;ptr[index].fp_timing.offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct lvds_pnp_id *</div><div class='add'>+static const struct drm_edid_product_id *</div><div class='ctx'> get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,</div><div class='ctx'> 		const struct bdb_lvds_lfp_data_ptrs *ptrs,</div><div class='ctx'> 		int index)</div><div class='ctx'> {</div><div class='add'>+	/* These two are supposed to have the same layout in memory. */</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct lvds_pnp_id) != sizeof(struct drm_edid_product_id));</div><div class='add'>+</div><div class='ctx'> 	return (const void *)data + ptrs-&gt;ptr[index].panel_pnp_id.offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -611,19 +616,6 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dump_pnp_id(struct drm_i915_private *i915,</div><div class='del'>-			const struct lvds_pnp_id *pnp_id,</div><div class='del'>-			const char *name)</div><div class='del'>-{</div><div class='del'>-	u16 mfg_name = be16_to_cpu((__force __be16)pnp_id-&gt;mfg_name);</div><div class='del'>-	char vend[4];</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",</div><div class='del'>-		    name, drm_edid_decode_mfg_id(mfg_name, vend),</div><div class='del'>-		    pnp_id-&gt;mfg_name, pnp_id-&gt;product_code, pnp_id-&gt;serial,</div><div class='del'>-		    pnp_id-&gt;mfg_week, pnp_id-&gt;mfg_year + 1990);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int opregion_get_panel_type(struct drm_i915_private *i915,</div><div class='ctx'> 				   const struct intel_bios_encoder_data *devdata,</div><div class='ctx'> 				   const struct drm_edid *drm_edid, bool use_fallback)</div><div class='hunk'>@@ -662,21 +654,21 @@ static int pnpid_get_panel_type(struct drm_i915_private *i915,</div><div class='ctx'> {</div><div class='ctx'> 	const struct bdb_lvds_lfp_data *data;</div><div class='ctx'> 	const struct bdb_lvds_lfp_data_ptrs *ptrs;</div><div class='del'>-	const struct lvds_pnp_id *edid_id;</div><div class='del'>-	struct lvds_pnp_id edid_id_nodate;</div><div class='del'>-	const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */</div><div class='add'>+	struct drm_edid_product_id product_id, product_id_nodate;</div><div class='add'>+	struct drm_printer p;</div><div class='ctx'> 	int i, best = -1;</div><div class='ctx'> </div><div class='del'>-	if (!edid)</div><div class='add'>+	if (!drm_edid)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	edid_id = (const void *)&amp;edid-&gt;mfg_id[0];</div><div class='add'>+	drm_edid_get_product_id(drm_edid, &amp;product_id);</div><div class='ctx'> </div><div class='del'>-	edid_id_nodate = *edid_id;</div><div class='del'>-	edid_id_nodate.mfg_week = 0;</div><div class='del'>-	edid_id_nodate.mfg_year = 0;</div><div class='add'>+	product_id_nodate = product_id;</div><div class='add'>+	product_id_nodate.week_of_manufacture = 0;</div><div class='add'>+	product_id_nodate.year_of_manufacture = 0;</div><div class='ctx'> </div><div class='del'>-	dump_pnp_id(i915, edid_id, "EDID");</div><div class='add'>+	p = drm_dbg_printer(&amp;i915-&gt;drm, DRM_UT_KMS, "EDID");</div><div class='add'>+	drm_edid_print_product_id(&amp;p, &amp;product_id, true);</div><div class='ctx'> </div><div class='ctx'> 	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);</div><div class='ctx'> 	if (!ptrs)</div><div class='hunk'>@@ -687,11 +679,11 @@ static int pnpid_get_panel_type(struct drm_i915_private *i915,</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 16; i++) {</div><div class='del'>-		const struct lvds_pnp_id *vbt_id =</div><div class='add'>+		const struct drm_edid_product_id *vbt_id =</div><div class='ctx'> 			get_lvds_pnp_id(data, ptrs, i);</div><div class='ctx'> </div><div class='ctx'> 		/* full match? */</div><div class='del'>-		if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))</div><div class='add'>+		if (!memcmp(vbt_id, &amp;product_id, sizeof(*vbt_id)))</div><div class='ctx'> 			return i;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -699,7 +691,7 @@ static int pnpid_get_panel_type(struct drm_i915_private *i915,</div><div class='ctx'> 		 * and the VBT entry does not specify a date.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (best &lt; 0 &amp;&amp;</div><div class='del'>-		    !memcmp(vbt_id, &amp;edid_id_nodate, sizeof(*vbt_id)))</div><div class='add'>+		    !memcmp(vbt_id, &amp;product_id_nodate, sizeof(*vbt_id)))</div><div class='ctx'> 			best = i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -885,7 +877,8 @@ parse_lfp_data(struct drm_i915_private *i915,</div><div class='ctx'> 	const struct bdb_lvds_lfp_data *data;</div><div class='ctx'> 	const struct bdb_lvds_lfp_data_tail *tail;</div><div class='ctx'> 	const struct bdb_lvds_lfp_data_ptrs *ptrs;</div><div class='del'>-	const struct lvds_pnp_id *pnp_id;</div><div class='add'>+	const struct drm_edid_product_id *pnp_id;</div><div class='add'>+	struct drm_printer p;</div><div class='ctx'> 	int panel_type = panel-&gt;vbt.panel_type;</div><div class='ctx'> </div><div class='ctx'> 	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);</div><div class='hunk'>@@ -900,7 +893,9 @@ parse_lfp_data(struct drm_i915_private *i915,</div><div class='ctx'> 		parse_lfp_panel_dtd(i915, panel, data, ptrs);</div><div class='ctx'> </div><div class='ctx'> 	pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);</div><div class='del'>-	dump_pnp_id(i915, pnp_id, "Panel");</div><div class='add'>+</div><div class='add'>+	p = drm_dbg_printer(&amp;i915-&gt;drm, DRM_UT_KMS, "Panel");</div><div class='add'>+	drm_edid_print_product_id(&amp;p, pnp_id, false);</div><div class='ctx'> </div><div class='ctx'> 	tail = get_lfp_data_tail(data, ptrs);</div><div class='ctx'> 	if (!tail)</div><div class='hunk'>@@ -1042,22 +1037,11 @@ parse_lfp_backlight(struct drm_i915_private *i915,</div><div class='ctx'> 	panel-&gt;vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;</div><div class='ctx'> 	panel-&gt;vbt.backlight.controller = 0;</div><div class='ctx'> 	if (i915-&gt;display.vbt.version &gt;= 191) {</div><div class='del'>-		size_t exp_size;</div><div class='del'>-</div><div class='del'>-		if (i915-&gt;display.vbt.version &gt;= 236)</div><div class='del'>-			exp_size = sizeof(struct bdb_lfp_backlight_data);</div><div class='del'>-		else if (i915-&gt;display.vbt.version &gt;= 234)</div><div class='del'>-			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;</div><div class='del'>-		else</div><div class='del'>-			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;</div><div class='del'>-</div><div class='del'>-		if (get_blocksize(backlight_data) &gt;= exp_size) {</div><div class='del'>-			const struct lfp_backlight_control_method *method;</div><div class='add'>+		const struct lfp_backlight_control_method *method;</div><div class='ctx'> </div><div class='del'>-			method = &amp;backlight_data-&gt;backlight_control[panel_type];</div><div class='del'>-			panel-&gt;vbt.backlight.type = method-&gt;type;</div><div class='del'>-			panel-&gt;vbt.backlight.controller = method-&gt;controller;</div><div class='del'>-		}</div><div class='add'>+		method = &amp;backlight_data-&gt;backlight_control[panel_type];</div><div class='add'>+		panel-&gt;vbt.backlight.type = method-&gt;type;</div><div class='add'>+		panel-&gt;vbt.backlight.controller = method-&gt;controller;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	panel-&gt;vbt.backlight.pwm_freq_hz = entry-&gt;pwm_freq_hz;</div><div class='hunk'>@@ -2730,6 +2714,57 @@ static void parse_ddi_ports(struct drm_i915_private *i915)</div><div class='ctx'> 		print_ddi_port(devdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int child_device_expected_size(u16 version)</div><div class='add'>+{</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct child_device_config) &lt; 40);</div><div class='add'>+</div><div class='add'>+	if (version &gt; 256)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	else if (version &gt;= 256)</div><div class='add'>+		return 40;</div><div class='add'>+	else if (version &gt;= 216)</div><div class='add'>+		return 39;</div><div class='add'>+	else if (version &gt;= 196)</div><div class='add'>+		return 38;</div><div class='add'>+	else if (version &gt;= 195)</div><div class='add'>+		return 37;</div><div class='add'>+	else if (version &gt;= 111)</div><div class='add'>+		return LEGACY_CHILD_DEVICE_CONFIG_SIZE;</div><div class='add'>+	else if (version &gt;= 106)</div><div class='add'>+		return 27;</div><div class='add'>+	else</div><div class='add'>+		return 22;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool child_device_size_valid(struct drm_i915_private *i915, int size)</div><div class='add'>+{</div><div class='add'>+	int expected_size;</div><div class='add'>+</div><div class='add'>+	expected_size = child_device_expected_size(i915-&gt;display.vbt.version);</div><div class='add'>+	if (expected_size &lt; 0) {</div><div class='add'>+		expected_size = sizeof(struct child_device_config);</div><div class='add'>+		drm_dbg(&amp;i915-&gt;drm,</div><div class='add'>+			"Expected child device config size for VBT version %u not known; assuming %d\n",</div><div class='add'>+			i915-&gt;display.vbt.version, expected_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Flag an error for unexpected size, but continue anyway. */</div><div class='add'>+	if (size != expected_size)</div><div class='add'>+		drm_err(&amp;i915-&gt;drm,</div><div class='add'>+			"Unexpected child device config size %d (expected %d for VBT version %u)\n",</div><div class='add'>+			size, expected_size, i915-&gt;display.vbt.version);</div><div class='add'>+</div><div class='add'>+	/* The legacy sized child device config is the minimum we need. */</div><div class='add'>+	if (size &lt; LEGACY_CHILD_DEVICE_CONFIG_SIZE) {</div><div class='add'>+		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+			    "Child device config size %d is too small.\n",</div><div class='add'>+			    size);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> parse_general_definitions(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='hunk'>@@ -2737,7 +2772,6 @@ parse_general_definitions(struct drm_i915_private *i915)</div><div class='ctx'> 	struct intel_bios_encoder_data *devdata;</div><div class='ctx'> 	const struct child_device_config *child;</div><div class='ctx'> 	int i, child_device_num;</div><div class='del'>-	u8 expected_size;</div><div class='ctx'> 	u16 block_size;</div><div class='ctx'> 	int bus_pin;</div><div class='ctx'> </div><div class='hunk'>@@ -2761,39 +2795,8 @@ parse_general_definitions(struct drm_i915_private *i915)</div><div class='ctx'> 	if (intel_gmbus_is_valid_pin(i915, bus_pin))</div><div class='ctx'> 		i915-&gt;display.vbt.crt_ddc_pin = bus_pin;</div><div class='ctx'> </div><div class='del'>-	if (i915-&gt;display.vbt.version &lt; 106) {</div><div class='del'>-		expected_size = 22;</div><div class='del'>-	} else if (i915-&gt;display.vbt.version &lt; 111) {</div><div class='del'>-		expected_size = 27;</div><div class='del'>-	} else if (i915-&gt;display.vbt.version &lt; 195) {</div><div class='del'>-		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;</div><div class='del'>-	} else if (i915-&gt;display.vbt.version == 195) {</div><div class='del'>-		expected_size = 37;</div><div class='del'>-	} else if (i915-&gt;display.vbt.version &lt;= 215) {</div><div class='del'>-		expected_size = 38;</div><div class='del'>-	} else if (i915-&gt;display.vbt.version &lt;= 250) {</div><div class='del'>-		expected_size = 39;</div><div class='del'>-	} else {</div><div class='del'>-		expected_size = sizeof(*child);</div><div class='del'>-		BUILD_BUG_ON(sizeof(*child) &lt; 39);</div><div class='del'>-		drm_dbg(&amp;i915-&gt;drm,</div><div class='del'>-			"Expected child device config size for VBT version %u not known; assuming %u\n",</div><div class='del'>-			i915-&gt;display.vbt.version, expected_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Flag an error for unexpected size, but continue anyway. */</div><div class='del'>-	if (defs-&gt;child_dev_size != expected_size)</div><div class='del'>-		drm_err(&amp;i915-&gt;drm,</div><div class='del'>-			"Unexpected child device config size %u (expected %u for VBT version %u)\n",</div><div class='del'>-			defs-&gt;child_dev_size, expected_size, i915-&gt;display.vbt.version);</div><div class='del'>-</div><div class='del'>-	/* The legacy sized child device config is the minimum we need. */</div><div class='del'>-	if (defs-&gt;child_dev_size &lt; LEGACY_CHILD_DEVICE_CONFIG_SIZE) {</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "Child device config size %u is too small.\n",</div><div class='del'>-			    defs-&gt;child_dev_size);</div><div class='add'>+	if (!child_device_size_valid(i915, defs-&gt;child_dev_size))</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* get the number of child device */</div><div class='ctx'> 	child_device_num = (block_size - sizeof(*defs)) / defs-&gt;child_dev_size;</div><div class='hunk'>@@ -2869,9 +2872,8 @@ init_vbt_panel_defaults(struct intel_panel *panel)</div><div class='ctx'> static void</div><div class='ctx'> init_vbt_missing_defaults(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='add'>+	unsigned int ports = DISPLAY_RUNTIME_INFO(i915)-&gt;port_mask;</div><div class='ctx'> 	enum port port;</div><div class='del'>-	int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |</div><div class='del'>-		    BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);</div><div class='ctx'> </div><div class='ctx'> 	if (!HAS_DDI(i915) &amp;&amp; !IS_CHERRYVIEW(i915))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2981,6 +2983,43 @@ bool intel_bios_is_valid_vbt(struct drm_i915_private *i915,</div><div class='ctx'> 	return vbt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct vbt_header *firmware_get_vbt(struct drm_i915_private *i915,</div><div class='add'>+					   size_t *size)</div><div class='add'>+{</div><div class='add'>+	struct vbt_header *vbt = NULL;</div><div class='add'>+	const struct firmware *fw = NULL;</div><div class='add'>+	const char *name = i915-&gt;display.params.vbt_firmware;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!name || !*name)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, name, i915-&gt;drm.dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_err(&amp;i915-&gt;drm,</div><div class='add'>+			"Requesting VBT firmware \"%s\" failed (%d)\n",</div><div class='add'>+			name, ret);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (intel_bios_is_valid_vbt(i915, fw-&gt;data, fw-&gt;size)) {</div><div class='add'>+		vbt = kmemdup(fw-&gt;data, fw-&gt;size, GFP_KERNEL);</div><div class='add'>+		if (vbt) {</div><div class='add'>+			drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+				    "Found valid VBT firmware \"%s\"\n", name);</div><div class='add'>+			if (size)</div><div class='add'>+				*size = fw-&gt;size;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		drm_dbg_kms(&amp;i915-&gt;drm, "Invalid VBT firmware \"%s\"\n",</div><div class='add'>+			    name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	return vbt;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)</div><div class='ctx'> {</div><div class='ctx'> 	intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);</div><div class='hunk'>@@ -2988,7 +3027,8 @@ static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)</div><div class='ctx'> 	return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)</div><div class='add'>+static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915,</div><div class='add'>+					    size_t *size)</div><div class='ctx'> {</div><div class='ctx'> 	u32 count, data, found, store = 0;</div><div class='ctx'> 	u32 static_region, oprom_offset;</div><div class='hunk'>@@ -3031,6 +3071,9 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm, "Found valid VBT in SPI flash\n");</div><div class='ctx'> </div><div class='add'>+	if (size)</div><div class='add'>+		*size = vbt_size;</div><div class='add'>+</div><div class='ctx'> 	return (struct vbt_header *)vbt;</div><div class='ctx'> </div><div class='ctx'> err_free_vbt:</div><div class='hunk'>@@ -3039,7 +3082,8 @@ err_not_found:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)</div><div class='add'>+static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915,</div><div class='add'>+					size_t *sizep)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(i915-&gt;drm.dev);</div><div class='ctx'> 	void __iomem *p = NULL, *oprom;</div><div class='hunk'>@@ -3088,6 +3132,9 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)</div><div class='ctx'> </div><div class='ctx'> 	pci_unmap_rom(pdev, oprom);</div><div class='ctx'> </div><div class='add'>+	if (sizep)</div><div class='add'>+		*sizep = vbt_size;</div><div class='add'>+</div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm, "Found valid VBT in PCI ROM\n");</div><div class='ctx'> </div><div class='ctx'> 	return vbt;</div><div class='hunk'>@@ -3100,6 +3147,32 @@ err_unmap_oprom:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct vbt_header *intel_bios_get_vbt(struct drm_i915_private *i915,</div><div class='add'>+						   size_t *sizep)</div><div class='add'>+{</div><div class='add'>+	const struct vbt_header *vbt = NULL;</div><div class='add'>+	intel_wakeref_t wakeref;</div><div class='add'>+</div><div class='add'>+	vbt = firmware_get_vbt(i915, sizep);</div><div class='add'>+</div><div class='add'>+	if (!vbt)</div><div class='add'>+		vbt = intel_opregion_get_vbt(i915, sizep);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the OpRegion does not have VBT, look in SPI flash</div><div class='add'>+	 * through MMIO or PCI mapping</div><div class='add'>+	 */</div><div class='add'>+	if (!vbt &amp;&amp; IS_DGFX(i915))</div><div class='add'>+		with_intel_runtime_pm(&amp;i915-&gt;runtime_pm, wakeref)</div><div class='add'>+			vbt = spi_oprom_get_vbt(i915, sizep);</div><div class='add'>+</div><div class='add'>+	if (!vbt)</div><div class='add'>+		with_intel_runtime_pm(&amp;i915-&gt;runtime_pm, wakeref)</div><div class='add'>+			vbt = oprom_get_vbt(i915, sizep);</div><div class='add'>+</div><div class='add'>+	return vbt;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * intel_bios_init - find VBT and initialize settings from the BIOS</div><div class='ctx'>  * @i915: i915 device instance</div><div class='hunk'>@@ -3111,7 +3184,6 @@ err_unmap_oprom:</div><div class='ctx'> void intel_bios_init(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	const struct vbt_header *vbt;</div><div class='del'>-	struct vbt_header *oprom_vbt = NULL;</div><div class='ctx'> 	const struct bdb_header *bdb;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;i915-&gt;display.vbt.display_devices);</div><div class='hunk'>@@ -3125,21 +3197,7 @@ void intel_bios_init(struct drm_i915_private *i915)</div><div class='ctx'> </div><div class='ctx'> 	init_vbt_defaults(i915);</div><div class='ctx'> </div><div class='del'>-	vbt = intel_opregion_get_vbt(i915, NULL);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or</div><div class='del'>-	 * PCI mapping</div><div class='del'>-	 */</div><div class='del'>-	if (!vbt &amp;&amp; IS_DGFX(i915)) {</div><div class='del'>-		oprom_vbt = spi_oprom_get_vbt(i915);</div><div class='del'>-		vbt = oprom_vbt;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!vbt) {</div><div class='del'>-		oprom_vbt = oprom_get_vbt(i915);</div><div class='del'>-		vbt = oprom_vbt;</div><div class='del'>-	}</div><div class='add'>+	vbt = intel_bios_get_vbt(i915, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (!vbt)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -3172,7 +3230,7 @@ out:</div><div class='ctx'> 	parse_sdvo_device_mapping(i915);</div><div class='ctx'> 	parse_ddi_ports(i915);</div><div class='ctx'> </div><div class='del'>-	kfree(oprom_vbt);</div><div class='add'>+	kfree(vbt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_bios_init_panel(struct drm_i915_private *i915,</div><div class='hunk'>@@ -3344,8 +3402,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)</div><div class='ctx'> 		 * additional data.  Trust that if the VBT was written into</div><div class='ctx'> 		 * the OpRegion then they have validated the LVDS's existence.</div><div class='ctx'> 		 */</div><div class='del'>-		if (intel_opregion_get_vbt(i915, NULL))</div><div class='del'>-			return true;</div><div class='add'>+		return intel_opregion_vbt_present(i915);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -3706,13 +3763,12 @@ static int intel_bios_vbt_show(struct seq_file *m, void *unused)</div><div class='ctx'> 	const void *vbt;</div><div class='ctx'> 	size_t vbt_size;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: VBT might originate from other places than opregion, and then</div><div class='del'>-	 * this would be incorrect.</div><div class='del'>-	 */</div><div class='del'>-	vbt = intel_opregion_get_vbt(i915, &amp;vbt_size);</div><div class='del'>-	if (vbt)</div><div class='add'>+	vbt = intel_bios_get_vbt(i915, &amp;vbt_size);</div><div class='add'>+</div><div class='add'>+	if (vbt) {</div><div class='ctx'> 		seq_write(m, vbt, vbt_size);</div><div class='add'>+		kfree(vbt);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c<br/>index 7f2a50b4f494..972ea887e232 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_bw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_bw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_bw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_bw.c</a></div><div class='hunk'>@@ -162,7 +162,9 @@ int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv,</div><div class='ctx'> 				1);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm, "Failed to disable qgv points (%d) points: 0x%x\n", ret, points_mask);</div><div class='add'>+		drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+			"Failed to disable qgv points (0x%x) points: 0x%x\n",</div><div class='add'>+			ret, points_mask);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -290,8 +292,10 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		struct intel_qgv_point *sp = &amp;qi-&gt;points[i];</div><div class='ctx'> </div><div class='ctx'> 		ret = intel_read_qgv_point_info(dev_priv, sp, i);</div><div class='del'>-		if (ret)</div><div class='add'>+		if (ret) {</div><div class='add'>+			drm_dbg_kms(&amp;dev_priv-&gt;drm, "Could not read QGV %d info\n", i);</div><div class='ctx'> 			return ret;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			    "QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d tRC=%d\n",</div><div class='hunk'>@@ -659,6 +663,22 @@ static unsigned int adl_psf_bw(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	return bi-&gt;psf_bw[psf_gv_point];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int icl_qgv_bw(struct drm_i915_private *i915,</div><div class='add'>+			       int num_active_planes, int qgv_point)</div><div class='add'>+{</div><div class='add'>+	unsigned int idx;</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER(i915) &gt;= 12)</div><div class='add'>+		idx = tgl_max_bw_index(i915, num_active_planes, qgv_point);</div><div class='add'>+	else</div><div class='add'>+		idx = icl_max_bw_index(i915, num_active_planes, qgv_point);</div><div class='add'>+</div><div class='add'>+	if (idx &gt;= ARRAY_SIZE(i915-&gt;display.bw.max))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return i915-&gt;display.bw.max[idx].deratedbw[qgv_point];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void intel_bw_init_hw(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	if (!HAS_DISPLAY(dev_priv))</div><div class='hunk'>@@ -735,6 +755,7 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state,</div><div class='ctx'> 		intel_bw_crtc_data_rate(crtc_state);</div><div class='ctx'> 	bw_state-&gt;num_active_planes[crtc-&gt;pipe] =</div><div class='ctx'> 		intel_bw_crtc_num_active_planes(crtc_state);</div><div class='add'>+	bw_state-&gt;force_check_qgv = true;</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm, "pipe %c data rate %u num active planes %u\n",</div><div class='ctx'> 		    pipe_name(crtc-&gt;pipe),</div><div class='hunk'>@@ -804,6 +825,80 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state)</div><div class='ctx'> 	return to_intel_bw_state(bw_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int icl_max_bw_qgv_point_mask(struct drm_i915_private *i915,</div><div class='add'>+					      int num_active_planes)</div><div class='add'>+{</div><div class='add'>+	unsigned int num_qgv_points = i915-&gt;display.bw.max[0].num_qgv_points;</div><div class='add'>+	unsigned int max_bw_point = 0;</div><div class='add'>+	unsigned int max_bw = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_qgv_points; i++) {</div><div class='add'>+		unsigned int max_data_rate =</div><div class='add'>+			icl_qgv_bw(i915, num_active_planes, i);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We need to know which qgv point gives us</div><div class='add'>+		 * maximum bandwidth in order to disable SAGV</div><div class='add'>+		 * if we find that we exceed SAGV block time</div><div class='add'>+		 * with watermarks. By that moment we already</div><div class='add'>+		 * have those, as it is calculated earlier in</div><div class='add'>+		 * intel_atomic_check,</div><div class='add'>+		 */</div><div class='add'>+		if (max_data_rate &gt; max_bw) {</div><div class='add'>+			max_bw_point = BIT(i);</div><div class='add'>+			max_bw = max_data_rate;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return max_bw_point;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 icl_prepare_qgv_points_mask(struct drm_i915_private *i915,</div><div class='add'>+				       unsigned int qgv_points,</div><div class='add'>+				       unsigned int psf_points)</div><div class='add'>+{</div><div class='add'>+	return ~(ICL_PCODE_REQ_QGV_PT(qgv_points) |</div><div class='add'>+		 ADLS_PCODE_REQ_PSF_PT(psf_points)) &amp; icl_qgv_points_mask(i915);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int icl_max_bw_psf_gv_point_mask(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	unsigned int num_psf_gv_points = i915-&gt;display.bw.max[0].num_psf_gv_points;</div><div class='add'>+	unsigned int max_bw_point_mask = 0;</div><div class='add'>+	unsigned int max_bw = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_psf_gv_points; i++) {</div><div class='add'>+		unsigned int max_data_rate = adl_psf_bw(i915, i);</div><div class='add'>+</div><div class='add'>+		if (max_data_rate &gt; max_bw) {</div><div class='add'>+			max_bw_point_mask = BIT(i);</div><div class='add'>+			max_bw = max_data_rate;</div><div class='add'>+		} else if (max_data_rate == max_bw) {</div><div class='add'>+			max_bw_point_mask |= BIT(i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return max_bw_point_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icl_force_disable_sagv(struct drm_i915_private *i915,</div><div class='add'>+				   struct intel_bw_state *bw_state)</div><div class='add'>+{</div><div class='add'>+	unsigned int qgv_points = icl_max_bw_qgv_point_mask(i915, 0);</div><div class='add'>+	unsigned int psf_points = icl_max_bw_psf_gv_point_mask(i915);</div><div class='add'>+</div><div class='add'>+	bw_state-&gt;qgv_points_mask = icl_prepare_qgv_points_mask(i915,</div><div class='add'>+								qgv_points,</div><div class='add'>+								psf_points);</div><div class='add'>+</div><div class='add'>+	drm_dbg_kms(&amp;i915-&gt;drm, "Forcing SAGV disable: mask 0x%x\n",</div><div class='add'>+		    bw_state-&gt;qgv_points_mask);</div><div class='add'>+</div><div class='add'>+	icl_pcode_restrict_qgv_points(i915, bw_state-&gt;qgv_points_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mtl_find_qgv_points(struct drm_i915_private *i915,</div><div class='ctx'> 			       unsigned int data_rate,</div><div class='ctx'> 			       unsigned int num_active_planes,</div><div class='hunk'>@@ -881,8 +976,6 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,</div><div class='ctx'> 			       const struct intel_bw_state *old_bw_state,</div><div class='ctx'> 			       struct intel_bw_state *new_bw_state)</div><div class='ctx'> {</div><div class='del'>-	unsigned int max_bw_point = 0;</div><div class='del'>-	unsigned int max_bw = 0;</div><div class='ctx'> 	unsigned int num_psf_gv_points = i915-&gt;display.bw.max[0].num_psf_gv_points;</div><div class='ctx'> 	unsigned int num_qgv_points = i915-&gt;display.bw.max[0].num_qgv_points;</div><div class='ctx'> 	u16 psf_points = 0;</div><div class='hunk'>@@ -895,31 +988,8 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_qgv_points; i++) {</div><div class='del'>-		unsigned int idx;</div><div class='del'>-		unsigned int max_data_rate;</div><div class='del'>-</div><div class='del'>-		if (DISPLAY_VER(i915) &gt;= 12)</div><div class='del'>-			idx = tgl_max_bw_index(i915, num_active_planes, i);</div><div class='del'>-		else</div><div class='del'>-			idx = icl_max_bw_index(i915, num_active_planes, i);</div><div class='del'>-</div><div class='del'>-		if (idx &gt;= ARRAY_SIZE(i915-&gt;display.bw.max))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		max_data_rate = i915-&gt;display.bw.max[idx].deratedbw[i];</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We need to know which qgv point gives us</div><div class='del'>-		 * maximum bandwidth in order to disable SAGV</div><div class='del'>-		 * if we find that we exceed SAGV block time</div><div class='del'>-		 * with watermarks. By that moment we already</div><div class='del'>-		 * have those, as it is calculated earlier in</div><div class='del'>-		 * intel_atomic_check,</div><div class='del'>-		 */</div><div class='del'>-		if (max_data_rate &gt; max_bw) {</div><div class='del'>-			max_bw_point = i;</div><div class='del'>-			max_bw = max_data_rate;</div><div class='del'>-		}</div><div class='add'>+		unsigned int max_data_rate = icl_qgv_bw(i915,</div><div class='add'>+							num_active_planes, i);</div><div class='ctx'> 		if (max_data_rate &gt;= data_rate)</div><div class='ctx'> 			qgv_points |= BIT(i);</div><div class='ctx'> </div><div class='hunk'>@@ -963,20 +1033,18 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,</div><div class='ctx'> 	 * cause.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!intel_can_enable_sagv(i915, new_bw_state)) {</div><div class='del'>-		qgv_points = BIT(max_bw_point);</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "No SAGV, using single QGV point %d\n",</div><div class='del'>-			    max_bw_point);</div><div class='add'>+		qgv_points = icl_max_bw_qgv_point_mask(i915, num_active_planes);</div><div class='add'>+		drm_dbg_kms(&amp;i915-&gt;drm, "No SAGV, using single QGV point mask 0x%x\n",</div><div class='add'>+			    qgv_points);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We store the ones which need to be masked as that is what PCode</div><div class='ctx'> 	 * actually accepts as a parameter.</div><div class='ctx'> 	 */</div><div class='del'>-	new_bw_state-&gt;qgv_points_mask =</div><div class='del'>-		~(ICL_PCODE_REQ_QGV_PT(qgv_points) |</div><div class='del'>-		  ADLS_PCODE_REQ_PSF_PT(psf_points)) &amp;</div><div class='del'>-		icl_qgv_points_mask(i915);</div><div class='del'>-</div><div class='add'>+	new_bw_state-&gt;qgv_points_mask = icl_prepare_qgv_points_mask(i915,</div><div class='add'>+								    qgv_points,</div><div class='add'>+								    psf_points);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the actual mask had changed we need to make sure that</div><div class='ctx'> 	 * the commits are serialized(in case this is a nomodeset, nonblocking)</div><div class='hunk'>@@ -1272,8 +1340,9 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)</div><div class='ctx'> 	new_bw_state = intel_atomic_get_new_bw_state(state);</div><div class='ctx'> </div><div class='ctx'> 	if (new_bw_state &amp;&amp;</div><div class='del'>-	    intel_can_enable_sagv(i915, old_bw_state) !=</div><div class='del'>-	    intel_can_enable_sagv(i915, new_bw_state))</div><div class='add'>+	    (intel_can_enable_sagv(i915, old_bw_state) !=</div><div class='add'>+	     intel_can_enable_sagv(i915, new_bw_state) ||</div><div class='add'>+	     new_bw_state-&gt;force_check_qgv))</div><div class='ctx'> 		changed = true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1287,6 +1356,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	new_bw_state-&gt;force_check_qgv = false;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1313,7 +1384,7 @@ static const struct intel_global_state_funcs intel_bw_funcs = {</div><div class='ctx'> 	.atomic_destroy_state = intel_bw_destroy_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int intel_bw_init(struct drm_i915_private *dev_priv)</div><div class='add'>+int intel_bw_init(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_bw_state *state;</div><div class='ctx'> </div><div class='hunk'>@@ -1321,8 +1392,15 @@ int intel_bw_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	if (!state)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	intel_atomic_global_obj_init(dev_priv, &amp;dev_priv-&gt;display.bw.obj,</div><div class='add'>+	intel_atomic_global_obj_init(i915, &amp;i915-&gt;display.bw.obj,</div><div class='ctx'> 				     &amp;state-&gt;base, &amp;intel_bw_funcs);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Limit this only if we have SAGV. And for Display version 14 onwards</div><div class='add'>+	 * sagv is handled though pmdemand requests</div><div class='add'>+	 */</div><div class='add'>+	if (intel_has_sagv(i915) &amp;&amp; IS_DISPLAY_VER(i915, 11, 13))</div><div class='add'>+		icl_force_disable_sagv(i915, state);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h<br/>index 59cb4fc5db76..161813cca473 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_bw.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_bw.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_bw.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_bw.h</a></div><div class='hunk'>@@ -47,12 +47,19 @@ struct intel_bw_state {</div><div class='ctx'> 	 */</div><div class='ctx'> 	u16 qgv_points_mask;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Flag to force the QGV comparison in atomic check right after the</div><div class='add'>+	 * hw state readout</div><div class='add'>+	 */</div><div class='add'>+	bool force_check_qgv;</div><div class='add'>+</div><div class='ctx'> 	int min_cdclk[I915_MAX_PIPES];</div><div class='ctx'> 	unsigned int data_rate[I915_MAX_PIPES];</div><div class='ctx'> 	u8 num_active_planes[I915_MAX_PIPES];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base)</div><div class='add'>+#define to_intel_bw_state(global_state) \</div><div class='add'>+	container_of_const((global_state), struct intel_bw_state, base)</div><div class='ctx'> </div><div class='ctx'> struct intel_bw_state *</div><div class='ctx'> intel_atomic_get_old_bw_state(struct intel_atomic_state *state);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c<br/>index f672bfd70d45..7a833b5f2de2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cdclk.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cdclk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cdclk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_cdclk.c</a></div><div class='hunk'>@@ -39,6 +39,8 @@</div><div class='ctx'> #include "intel_pcode.h"</div><div class='ctx'> #include "intel_psr.h"</div><div class='ctx'> #include "intel_vdsc.h"</div><div class='add'>+#include "skl_watermark.h"</div><div class='add'>+#include "skl_watermark_regs.h"</div><div class='ctx'> #include "vlv_sideband.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -63,6 +65,32 @@</div><div class='ctx'>  * DMC will not change the active CDCLK frequency however, so that part</div><div class='ctx'>  * will still be performed by the driver directly.</div><div class='ctx'>  *</div><div class='add'>+ * There are multiple components involved in the generation of the CDCLK</div><div class='add'>+ * frequency:</div><div class='add'>+ *</div><div class='add'>+ * - We have the CDCLK PLL, which generates an output clock based on a</div><div class='add'>+ *   reference clock and a ratio parameter.</div><div class='add'>+ * - The CD2X Divider, which divides the output of the PLL based on a</div><div class='add'>+ *   divisor selected from a set of pre-defined choices.</div><div class='add'>+ * - The CD2X Squasher, which further divides the output based on a</div><div class='add'>+ *   waveform represented as a sequence of bits where each zero</div><div class='add'>+ *   "squashes out" a clock cycle.</div><div class='add'>+ * - And, finally, a fixed divider that divides the output frequency by 2.</div><div class='add'>+ *</div><div class='add'>+ * As such, the resulting CDCLK frequency can be calculated with the</div><div class='add'>+ * following formula:</div><div class='add'>+ *</div><div class='add'>+ *     cdclk = vco / cd2x_div / (sq_len / sq_div) / 2</div><div class='add'>+ *</div><div class='add'>+ * , where vco is the frequency generated by the PLL; cd2x_div</div><div class='add'>+ * represents the CD2X Divider; sq_len and sq_div are the bit length</div><div class='add'>+ * and the number of high bits for the CD2X Squasher waveform, respectively;</div><div class='add'>+ * and 2 represents the fixed divider.</div><div class='add'>+ *</div><div class='add'>+ * Note that some older platforms do not contain the CD2X Divider</div><div class='add'>+ * and/or CD2X Squasher, in which case we can ignore their respective</div><div class='add'>+ * factors in the formula above.</div><div class='add'>+ *</div><div class='ctx'>  * Several methods exist to change the CDCLK frequency, which ones are</div><div class='ctx'>  * supported depends on the platform:</div><div class='ctx'>  *</div><div class='hunk'>@@ -993,15 +1021,14 @@ static int skl_cdclk_decimal(int cdclk)</div><div class='ctx'> 	return DIV_ROUND_CLOSEST(cdclk - 1000, 500);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void skl_set_preferred_cdclk_vco(struct drm_i915_private *dev_priv,</div><div class='del'>-					int vco)</div><div class='add'>+static void skl_set_preferred_cdclk_vco(struct drm_i915_private *i915, int vco)</div><div class='ctx'> {</div><div class='del'>-	bool changed = dev_priv-&gt;skl_preferred_vco_freq != vco;</div><div class='add'>+	bool changed = i915-&gt;display.cdclk.skl_preferred_vco_freq != vco;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;skl_preferred_vco_freq = vco;</div><div class='add'>+	i915-&gt;display.cdclk.skl_preferred_vco_freq = vco;</div><div class='ctx'> </div><div class='ctx'> 	if (changed)</div><div class='del'>-		intel_update_max_cdclk(dev_priv);</div><div class='add'>+		intel_update_max_cdclk(i915);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 skl_dpll0_link_rate(struct drm_i915_private *dev_priv, int vco)</div><div class='hunk'>@@ -1205,7 +1232,7 @@ static void skl_cdclk_init_hw(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		 * Use the current vco as our initial</div><div class='ctx'> 		 * guess as to what the preferred vco is.</div><div class='ctx'> 		 */</div><div class='del'>-		if (dev_priv-&gt;skl_preferred_vco_freq == 0)</div><div class='add'>+		if (dev_priv-&gt;display.cdclk.skl_preferred_vco_freq == 0)</div><div class='ctx'> 			skl_set_preferred_cdclk_vco(dev_priv,</div><div class='ctx'> 						    dev_priv-&gt;display.cdclk.hw.vco);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1213,7 +1240,7 @@ static void skl_cdclk_init_hw(struct drm_i915_private *dev_priv)</div><div class='ctx'> </div><div class='ctx'> 	cdclk_config = dev_priv-&gt;display.cdclk.hw;</div><div class='ctx'> </div><div class='del'>-	cdclk_config.vco = dev_priv-&gt;skl_preferred_vco_freq;</div><div class='add'>+	cdclk_config.vco = dev_priv-&gt;display.cdclk.skl_preferred_vco_freq;</div><div class='ctx'> 	if (cdclk_config.vco == 0)</div><div class='ctx'> 		cdclk_config.vco = 8100000;</div><div class='ctx'> 	cdclk_config.cdclk = skl_calc_cdclk(0, cdclk_config.vco);</div><div class='hunk'>@@ -1391,7 +1418,7 @@ static const struct intel_cdclk_vals mtl_cdclk_table[] = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct intel_cdclk_vals lnl_cdclk_table[] = {</div><div class='add'>+static const struct intel_cdclk_vals xe2lpd_cdclk_table[] = {</div><div class='ctx'> 	{ .refclk = 38400, .cdclk = 153600, .ratio = 16, .waveform = 0xaaaa },</div><div class='ctx'> 	{ .refclk = 38400, .cdclk = 172800, .ratio = 16, .waveform = 0xad5a },</div><div class='ctx'> 	{ .refclk = 38400, .cdclk = 192000, .ratio = 16, .waveform = 0xb6b6 },</div><div class='hunk'>@@ -1656,6 +1683,8 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 20)</div><div class='add'>+		cdclk_config-&gt;joined_mbus = intel_de_read(dev_priv, MBUS_CTL) &amp; MBUS_JOIN;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Can't read this out :( Let's assume it's</div><div class='ctx'> 	 * at least what the CDCLK frequency requires.</div><div class='hunk'>@@ -1850,6 +1879,37 @@ static bool cdclk_pll_is_unknown(unsigned int vco)</div><div class='ctx'> 	return vco == ~0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool mdclk_source_is_cdclk_pll(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	return DISPLAY_VER(i915) &gt;= 20;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 xe2lpd_mdclk_source_sel(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	if (mdclk_source_is_cdclk_pll(i915))</div><div class='add'>+		return MDCLK_SOURCE_SEL_CDCLK_PLL;</div><div class='add'>+</div><div class='add'>+	return MDCLK_SOURCE_SEL_CD2XCLK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int intel_mdclk_cdclk_ratio(struct drm_i915_private *i915,</div><div class='add'>+			    const struct intel_cdclk_config *cdclk_config)</div><div class='add'>+{</div><div class='add'>+	if (mdclk_source_is_cdclk_pll(i915))</div><div class='add'>+		return DIV_ROUND_UP(cdclk_config-&gt;vco, cdclk_config-&gt;cdclk);</div><div class='add'>+</div><div class='add'>+	/* Otherwise, source for MDCLK is CD2XCLK. */</div><div class='add'>+	return 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xe2lpd_mdclk_cdclk_ratio_program(struct drm_i915_private *i915,</div><div class='add'>+					     const struct intel_cdclk_config *cdclk_config)</div><div class='add'>+{</div><div class='add'>+	intel_dbuf_mdclk_cdclk_ratio_update(i915,</div><div class='add'>+					    intel_mdclk_cdclk_ratio(i915, cdclk_config),</div><div class='add'>+					    cdclk_config-&gt;joined_mbus);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private *i915,</div><div class='ctx'> 						    const struct intel_cdclk_config *old_cdclk_config,</div><div class='ctx'> 						    const struct intel_cdclk_config *new_cdclk_config,</div><div class='hunk'>@@ -1954,7 +2014,7 @@ static u32 bxt_cdclk_ctl(struct drm_i915_private *i915,</div><div class='ctx'> 		val |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 20)</div><div class='del'>-		val |= MDCLK_SOURCE_SEL_CDCLK_PLL;</div><div class='add'>+		val |= xe2lpd_mdclk_source_sel(i915);</div><div class='ctx'> 	else</div><div class='ctx'> 		val |= skl_cdclk_decimal(cdclk);</div><div class='ctx'> </div><div class='hunk'>@@ -1967,7 +2027,6 @@ static void _bxt_set_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> {</div><div class='ctx'> 	int cdclk = cdclk_config-&gt;cdclk;</div><div class='ctx'> 	int vco = cdclk_config-&gt;vco;</div><div class='del'>-	u16 waveform;</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_CDCLK_CRAWL(dev_priv) &amp;&amp; dev_priv-&gt;display.cdclk.hw.vco &gt; 0 &amp;&amp; vco &gt; 0 &amp;&amp;</div><div class='ctx'> 	    !cdclk_pll_is_unknown(dev_priv-&gt;display.cdclk.hw.vco)) {</div><div class='hunk'>@@ -1982,10 +2041,11 @@ static void _bxt_set_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	} else</div><div class='ctx'> 		bxt_cdclk_pll_update(dev_priv, vco);</div><div class='ctx'> </div><div class='del'>-	waveform = cdclk_squash_waveform(dev_priv, cdclk);</div><div class='add'>+	if (HAS_CDCLK_SQUASH(dev_priv)) {</div><div class='add'>+		u16 waveform = cdclk_squash_waveform(dev_priv, cdclk);</div><div class='ctx'> </div><div class='del'>-	if (HAS_CDCLK_SQUASH(dev_priv))</div><div class='ctx'> 		dg2_cdclk_squash_program(dev_priv, waveform);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write(dev_priv, CDCLK_CTL, bxt_cdclk_ctl(dev_priv, cdclk_config, pipe));</div><div class='ctx'> </div><div class='hunk'>@@ -2030,6 +2090,9 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 20 &amp;&amp; cdclk &lt; dev_priv-&gt;display.cdclk.hw.cdclk)</div><div class='add'>+		xe2lpd_mdclk_cdclk_ratio_program(dev_priv, cdclk_config);</div><div class='add'>+</div><div class='ctx'> 	if (cdclk_compute_crawl_and_squash_midpoint(dev_priv, &amp;dev_priv-&gt;display.cdclk.hw,</div><div class='ctx'> 						    cdclk_config, &amp;mid_cdclk_config)) {</div><div class='ctx'> 		_bxt_set_cdclk(dev_priv, &amp;mid_cdclk_config, pipe);</div><div class='hunk'>@@ -2038,6 +2101,9 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		_bxt_set_cdclk(dev_priv, cdclk_config, pipe);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 20 &amp;&amp; cdclk &gt; dev_priv-&gt;display.cdclk.hw.cdclk)</div><div class='add'>+		xe2lpd_mdclk_cdclk_ratio_program(dev_priv, cdclk_config);</div><div class='add'>+</div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 14)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * NOOP - No Pcode communication needed for</div><div class='hunk'>@@ -2260,16 +2326,15 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * intel_cdclk_needs_modeset - Determine if changong between the CDCLK</div><div class='del'>- *                             configurations requires a modeset on all pipes</div><div class='add'>+ * intel_cdclk_clock_changed - Check whether the clock changed</div><div class='ctx'>  * @a: first CDCLK configuration</div><div class='ctx'>  * @b: second CDCLK configuration</div><div class='ctx'>  *</div><div class='ctx'>  * Returns:</div><div class='del'>- * True if changing between the two CDCLK configurations</div><div class='del'>- * requires all pipes to be off, false if not.</div><div class='add'>+ * True if CDCLK changed in a way that requires re-programming and</div><div class='add'>+ * False otherwise.</div><div class='ctx'>  */</div><div class='del'>-bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,</div><div class='add'>+bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a,</div><div class='ctx'> 			       const struct intel_cdclk_config *b)</div><div class='ctx'> {</div><div class='ctx'> 	return a-&gt;cdclk != b-&gt;cdclk ||</div><div class='hunk'>@@ -2322,7 +2387,7 @@ static bool intel_cdclk_can_cd2x_update(struct drm_i915_private *dev_priv,</div><div class='ctx'> static bool intel_cdclk_changed(const struct intel_cdclk_config *a,</div><div class='ctx'> 				const struct intel_cdclk_config *b)</div><div class='ctx'> {</div><div class='del'>-	return intel_cdclk_needs_modeset(a, b) ||</div><div class='add'>+	return intel_cdclk_clock_changed(a, b) ||</div><div class='ctx'> 		a-&gt;voltage_level != b-&gt;voltage_level;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2368,18 +2433,9 @@ static void intel_pcode_notify(struct drm_i915_private *i915,</div><div class='ctx'> 			ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * intel_set_cdclk - Push the CDCLK configuration to the hardware</div><div class='del'>- * @dev_priv: i915 device</div><div class='del'>- * @cdclk_config: new CDCLK configuration</div><div class='del'>- * @pipe: pipe with which to synchronize the update</div><div class='del'>- *</div><div class='del'>- * Program the hardware based on the passed in CDCLK state,</div><div class='del'>- * if necessary.</div><div class='del'>- */</div><div class='ctx'> static void intel_set_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			    const struct intel_cdclk_config *cdclk_config,</div><div class='del'>-			    enum pipe pipe)</div><div class='add'>+			    enum pipe pipe, const char *context)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_encoder *encoder;</div><div class='ctx'> </div><div class='hunk'>@@ -2389,7 +2445,7 @@ static void intel_set_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	if (drm_WARN_ON_ONCE(&amp;dev_priv-&gt;drm, !dev_priv-&gt;display.funcs.cdclk-&gt;set_cdclk))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_cdclk_dump_config(dev_priv, cdclk_config, "Changing CDCLK to");</div><div class='add'>+	intel_cdclk_dump_config(dev_priv, cdclk_config, context);</div><div class='ctx'> </div><div class='ctx'> 	for_each_intel_encoder_with_psr(&amp;dev_priv-&gt;drm, encoder) {</div><div class='ctx'> 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);</div><div class='hunk'>@@ -2519,6 +2575,17 @@ static void intel_cdclk_pcode_post_notify(struct intel_atomic_state *state)</div><div class='ctx'> 			   update_cdclk, update_pipe_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool intel_cdclk_is_decreasing_later(struct intel_atomic_state *state)</div><div class='add'>+{</div><div class='add'>+	const struct intel_cdclk_state *old_cdclk_state =</div><div class='add'>+		intel_atomic_get_old_cdclk_state(state);</div><div class='add'>+	const struct intel_cdclk_state *new_cdclk_state =</div><div class='add'>+		intel_atomic_get_new_cdclk_state(state);</div><div class='add'>+</div><div class='add'>+	return new_cdclk_state &amp;&amp; !new_cdclk_state-&gt;disable_pipes &amp;&amp;</div><div class='add'>+		new_cdclk_state-&gt;actual.cdclk &lt; old_cdclk_state-&gt;actual.cdclk;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * intel_set_cdclk_pre_plane_update - Push the CDCLK state to the hardware</div><div class='ctx'>  * @state: intel atomic state</div><div class='hunk'>@@ -2560,9 +2627,16 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)</div><div class='ctx'> 						 old_cdclk_state-&gt;actual.voltage_level);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * mbus joining will be changed later by</div><div class='add'>+	 * intel_dbuf_mbus_{pre,post}_ddb_update()</div><div class='add'>+	 */</div><div class='add'>+	cdclk_config.joined_mbus = old_cdclk_state-&gt;actual.joined_mbus;</div><div class='add'>+</div><div class='ctx'> 	drm_WARN_ON(&amp;i915-&gt;drm, !new_cdclk_state-&gt;base.changed);</div><div class='ctx'> </div><div class='del'>-	intel_set_cdclk(i915, &amp;cdclk_config, pipe);</div><div class='add'>+	intel_set_cdclk(i915, &amp;cdclk_config, pipe,</div><div class='add'>+			"Pre changing CDCLK to");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2597,7 +2671,8 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN_ON(&amp;i915-&gt;drm, !new_cdclk_state-&gt;base.changed);</div><div class='ctx'> </div><div class='del'>-	intel_set_cdclk(i915, &amp;new_cdclk_state-&gt;actual, pipe);</div><div class='add'>+	intel_set_cdclk(i915, &amp;new_cdclk_state-&gt;actual, pipe,</div><div class='add'>+			"Post changing CDCLK to");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state)</div><div class='hunk'>@@ -2748,25 +2823,6 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	if (crtc_state-&gt;dsc.compression_enable)</div><div class='ctx'> 		min_cdclk = max(min_cdclk, intel_vdsc_min_cdclk(crtc_state));</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * HACK. Currently for TGL/DG2 platforms we calculate</div><div class='del'>-	 * min_cdclk initially based on pixel_rate divided</div><div class='del'>-	 * by 2, accounting for also plane requirements,</div><div class='del'>-	 * however in some cases the lowest possible CDCLK</div><div class='del'>-	 * doesn't work and causing the underruns.</div><div class='del'>-	 * Explicitly stating here that this seems to be currently</div><div class='del'>-	 * rather a Hack, than final solution.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_TIGERLAKE(dev_priv) || IS_DG2(dev_priv)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Clamp to max_cdclk_freq in case pixel rate is higher,</div><div class='del'>-		 * in order not to break an 8K, but still leave W/A at place.</div><div class='del'>-		 */</div><div class='del'>-		min_cdclk = max_t(int, min_cdclk,</div><div class='del'>-				  min_t(int, crtc_state-&gt;pixel_rate,</div><div class='del'>-					dev_priv-&gt;display.cdclk.max_cdclk_freq));</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return min_cdclk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2954,7 +3010,7 @@ static int skl_dpll0_vco(struct intel_cdclk_state *cdclk_state)</div><div class='ctx'> </div><div class='ctx'> 	vco = cdclk_state-&gt;logical.vco;</div><div class='ctx'> 	if (!vco)</div><div class='del'>-		vco = dev_priv-&gt;skl_preferred_vco_freq;</div><div class='add'>+		vco = dev_priv-&gt;display.cdclk.skl_preferred_vco_freq;</div><div class='ctx'> </div><div class='ctx'> 	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {</div><div class='ctx'> 		if (!crtc_state-&gt;hw.enable)</div><div class='hunk'>@@ -3139,6 +3195,20 @@ int intel_cdclk_atomic_check(struct intel_atomic_state *state,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int intel_cdclk_state_set_joined_mbus(struct intel_atomic_state *state, bool joined_mbus)</div><div class='add'>+{</div><div class='add'>+	struct intel_cdclk_state *cdclk_state;</div><div class='add'>+</div><div class='add'>+	cdclk_state = intel_atomic_get_cdclk_state(state);</div><div class='add'>+	if (IS_ERR(cdclk_state))</div><div class='add'>+		return PTR_ERR(cdclk_state);</div><div class='add'>+</div><div class='add'>+	cdclk_state-&gt;actual.joined_mbus = joined_mbus;</div><div class='add'>+	cdclk_state-&gt;logical.joined_mbus = joined_mbus;</div><div class='add'>+</div><div class='add'>+	return intel_atomic_lock_global_state(&amp;cdclk_state-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int intel_cdclk_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_cdclk_state *cdclk_state;</div><div class='hunk'>@@ -3247,7 +3317,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			    "Can change cdclk cd2x divider with pipe %c active\n",</div><div class='ctx'> 			    pipe_name(pipe));</div><div class='del'>-	} else if (intel_cdclk_needs_modeset(&amp;old_cdclk_state-&gt;actual,</div><div class='add'>+	} else if (intel_cdclk_clock_changed(&amp;old_cdclk_state-&gt;actual,</div><div class='ctx'> 					     &amp;new_cdclk_state-&gt;actual)) {</div><div class='ctx'> 		/* All pipes must be switched off while we change the cdclk. */</div><div class='ctx'> 		ret = intel_modeset_all_pipes_late(state, "CDCLK change");</div><div class='hunk'>@@ -3260,6 +3330,15 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)</div><div class='ctx'> 			    "Modeset required for cdclk change\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (intel_mdclk_cdclk_ratio(dev_priv, &amp;old_cdclk_state-&gt;actual) !=</div><div class='add'>+	    intel_mdclk_cdclk_ratio(dev_priv, &amp;new_cdclk_state-&gt;actual)) {</div><div class='add'>+		int ratio = intel_mdclk_cdclk_ratio(dev_priv, &amp;new_cdclk_state-&gt;actual);</div><div class='add'>+</div><div class='add'>+		ret = intel_dbuf_state_set_mdclk_cdclk_ratio(state, ratio);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 		    "New cdclk calculated to be logical %u kHz, actual %u kHz\n",</div><div class='ctx'> 		    new_cdclk_state-&gt;logical.cdclk,</div><div class='hunk'>@@ -3317,7 +3396,7 @@ void intel_update_max_cdclk(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		u32 limit = intel_de_read(dev_priv, SKL_DFSM) &amp; SKL_DFSM_CDCLK_LIMIT_MASK;</div><div class='ctx'> 		int max_cdclk, vco;</div><div class='ctx'> </div><div class='del'>-		vco = dev_priv-&gt;skl_preferred_vco_freq;</div><div class='add'>+		vco = dev_priv-&gt;display.cdclk.skl_preferred_vco_freq;</div><div class='ctx'> 		drm_WARN_ON(&amp;dev_priv-&gt;drm, vco != 8100000 &amp;&amp; vco != 8640000);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -3359,13 +3438,13 @@ void intel_update_max_cdclk(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		dev_priv-&gt;display.cdclk.max_cdclk_freq = dev_priv-&gt;display.cdclk.hw.cdclk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;max_dotclk_freq = intel_compute_max_dotclk(dev_priv);</div><div class='add'>+	dev_priv-&gt;display.cdclk.max_dotclk_freq = intel_compute_max_dotclk(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg(&amp;dev_priv-&gt;drm, "Max CD clock rate: %d kHz\n",</div><div class='ctx'> 		dev_priv-&gt;display.cdclk.max_cdclk_freq);</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg(&amp;dev_priv-&gt;drm, "Max dotclock rate: %d kHz\n",</div><div class='del'>-		dev_priv-&gt;max_dotclk_freq);</div><div class='add'>+		dev_priv-&gt;display.cdclk.max_dotclk_freq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3539,7 +3618,7 @@ static int i915_cdclk_info_show(struct seq_file *m, void *unused)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "Current CD clock frequency: %d kHz\n", i915-&gt;display.cdclk.hw.cdclk);</div><div class='ctx'> 	seq_printf(m, "Max CD clock frequency: %d kHz\n", i915-&gt;display.cdclk.max_cdclk_freq);</div><div class='del'>-	seq_printf(m, "Max pixel clock frequency: %d kHz\n", i915-&gt;max_dotclk_freq);</div><div class='add'>+	seq_printf(m, "Max pixel clock frequency: %d kHz\n", i915-&gt;display.cdclk.max_dotclk_freq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3554,13 +3633,6 @@ void intel_cdclk_debugfs_register(struct drm_i915_private *i915)</div><div class='ctx'> 			    i915, &amp;i915_cdclk_info_fops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct intel_cdclk_funcs mtl_cdclk_funcs = {</div><div class='del'>-	.get_cdclk = bxt_get_cdclk,</div><div class='del'>-	.set_cdclk = bxt_set_cdclk,</div><div class='del'>-	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,</div><div class='del'>-	.calc_voltage_level = rplu_calc_voltage_level,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct intel_cdclk_funcs rplu_cdclk_funcs = {</div><div class='ctx'> 	.get_cdclk = bxt_get_cdclk,</div><div class='ctx'> 	.set_cdclk = bxt_set_cdclk,</div><div class='hunk'>@@ -3704,10 +3776,10 @@ static const struct intel_cdclk_funcs i830_cdclk_funcs = {</div><div class='ctx'> void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 20) {</div><div class='del'>-		dev_priv-&gt;display.funcs.cdclk = &amp;mtl_cdclk_funcs;</div><div class='del'>-		dev_priv-&gt;display.cdclk.table = lnl_cdclk_table;</div><div class='add'>+		dev_priv-&gt;display.funcs.cdclk = &amp;rplu_cdclk_funcs;</div><div class='add'>+		dev_priv-&gt;display.cdclk.table = xe2lpd_cdclk_table;</div><div class='ctx'> 	} else if (DISPLAY_VER(dev_priv) &gt;= 14) {</div><div class='del'>-		dev_priv-&gt;display.funcs.cdclk = &amp;mtl_cdclk_funcs;</div><div class='add'>+		dev_priv-&gt;display.funcs.cdclk = &amp;rplu_cdclk_funcs;</div><div class='ctx'> 		dev_priv-&gt;display.cdclk.table = mtl_cdclk_table;</div><div class='ctx'> 	} else if (IS_DG2(dev_priv)) {</div><div class='ctx'> 		dev_priv-&gt;display.funcs.cdclk = &amp;tgl_cdclk_funcs;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h<br/>index 71bc032bfef1..cfdcdec07a4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cdclk.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cdclk.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cdclk.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_cdclk.h</a></div><div class='hunk'>@@ -18,6 +18,8 @@ struct intel_crtc_state;</div><div class='ctx'> struct intel_cdclk_config {</div><div class='ctx'> 	unsigned int cdclk, vco, ref, bypass;</div><div class='ctx'> 	u8 voltage_level;</div><div class='add'>+	/* This field is only valid for Xe2LPD and above. */</div><div class='add'>+	bool joined_mbus;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_cdclk_state {</div><div class='hunk'>@@ -63,8 +65,11 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);</div><div class='ctx'> void intel_update_max_cdclk(struct drm_i915_private *dev_priv);</div><div class='ctx'> void intel_update_cdclk(struct drm_i915_private *dev_priv);</div><div class='ctx'> u32 intel_read_rawclk(struct drm_i915_private *dev_priv);</div><div class='del'>-bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,</div><div class='add'>+bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a,</div><div class='ctx'> 			       const struct intel_cdclk_config *b);</div><div class='add'>+int intel_mdclk_cdclk_ratio(struct drm_i915_private *i915,</div><div class='add'>+			    const struct intel_cdclk_config *cdclk_config);</div><div class='add'>+bool intel_cdclk_is_decreasing_later(struct intel_atomic_state *state);</div><div class='ctx'> void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);</div><div class='ctx'> void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);</div><div class='ctx'> void intel_cdclk_dump_config(struct drm_i915_private *i915,</div><div class='hunk'>@@ -75,10 +80,13 @@ void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			   struct intel_cdclk_config *cdclk_config);</div><div class='ctx'> int intel_cdclk_atomic_check(struct intel_atomic_state *state,</div><div class='ctx'> 			     bool *need_cdclk_calc);</div><div class='add'>+int intel_cdclk_state_set_joined_mbus(struct intel_atomic_state *state, bool joined_mbus);</div><div class='ctx'> struct intel_cdclk_state *</div><div class='ctx'> intel_atomic_get_cdclk_state(struct intel_atomic_state *state);</div><div class='ctx'> </div><div class='del'>-#define to_intel_cdclk_state(x) container_of((x), struct intel_cdclk_state, base)</div><div class='add'>+#define to_intel_cdclk_state(global_state) \</div><div class='add'>+	container_of_const((global_state), struct intel_cdclk_state, base)</div><div class='add'>+</div><div class='ctx'> #define intel_atomic_get_old_cdclk_state(state) \</div><div class='ctx'> 	to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &amp;to_i915(state-&gt;base.dev)-&gt;display.cdclk.obj))</div><div class='ctx'> #define intel_atomic_get_new_cdclk_state(state) \</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c<br/>index ca7112b32cb3..d23163dc64d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_color.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_color.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_color.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_color.c</a></div><div class='hunk'>@@ -616,19 +616,19 @@ static void vlv_load_wgc_csc(struct intel_crtc *crtc,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='del'>-	intel_de_write_fw(dev_priv, PIPE_WGC_C01_C00(pipe),</div><div class='add'>+	intel_de_write_fw(dev_priv, PIPE_WGC_C01_C00(dev_priv, pipe),</div><div class='ctx'> 			  csc-&gt;coeff[1] &lt;&lt; 16 | csc-&gt;coeff[0]);</div><div class='del'>-	intel_de_write_fw(dev_priv, PIPE_WGC_C02(pipe),</div><div class='add'>+	intel_de_write_fw(dev_priv, PIPE_WGC_C02(dev_priv, pipe),</div><div class='ctx'> 			  csc-&gt;coeff[2]);</div><div class='ctx'> </div><div class='del'>-	intel_de_write_fw(dev_priv, PIPE_WGC_C11_C10(pipe),</div><div class='add'>+	intel_de_write_fw(dev_priv, PIPE_WGC_C11_C10(dev_priv, pipe),</div><div class='ctx'> 			  csc-&gt;coeff[4] &lt;&lt; 16 | csc-&gt;coeff[3]);</div><div class='del'>-	intel_de_write_fw(dev_priv, PIPE_WGC_C12(pipe),</div><div class='add'>+	intel_de_write_fw(dev_priv, PIPE_WGC_C12(dev_priv, pipe),</div><div class='ctx'> 			  csc-&gt;coeff[5]);</div><div class='ctx'> </div><div class='del'>-	intel_de_write_fw(dev_priv, PIPE_WGC_C21_C20(pipe),</div><div class='add'>+	intel_de_write_fw(dev_priv, PIPE_WGC_C21_C20(dev_priv, pipe),</div><div class='ctx'> 			  csc-&gt;coeff[7] &lt;&lt; 16 | csc-&gt;coeff[6]);</div><div class='del'>-	intel_de_write_fw(dev_priv, PIPE_WGC_C22(pipe),</div><div class='add'>+	intel_de_write_fw(dev_priv, PIPE_WGC_C22(dev_priv, pipe),</div><div class='ctx'> 			  csc-&gt;coeff[8]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -639,25 +639,25 @@ static void vlv_read_wgc_csc(struct intel_crtc *crtc,</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='del'>-	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C01_C00(pipe));</div><div class='add'>+	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C01_C00(dev_priv, pipe));</div><div class='ctx'> 	csc-&gt;coeff[0] = tmp &amp; 0xffff;</div><div class='ctx'> 	csc-&gt;coeff[1] = tmp &gt;&gt; 16;</div><div class='ctx'> </div><div class='del'>-	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C02(pipe));</div><div class='add'>+	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C02(dev_priv, pipe));</div><div class='ctx'> 	csc-&gt;coeff[2] = tmp &amp; 0xffff;</div><div class='ctx'> </div><div class='del'>-	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C11_C10(pipe));</div><div class='add'>+	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C11_C10(dev_priv, pipe));</div><div class='ctx'> 	csc-&gt;coeff[3] = tmp &amp; 0xffff;</div><div class='ctx'> 	csc-&gt;coeff[4] = tmp &gt;&gt; 16;</div><div class='ctx'> </div><div class='del'>-	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C12(pipe));</div><div class='add'>+	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C12(dev_priv, pipe));</div><div class='ctx'> 	csc-&gt;coeff[5] = tmp &amp; 0xffff;</div><div class='ctx'> </div><div class='del'>-	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C21_C20(pipe));</div><div class='add'>+	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C21_C20(dev_priv, pipe));</div><div class='ctx'> 	csc-&gt;coeff[6] = tmp &amp; 0xffff;</div><div class='ctx'> 	csc-&gt;coeff[7] = tmp &gt;&gt; 16;</div><div class='ctx'> </div><div class='del'>-	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C22(pipe));</div><div class='add'>+	tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C22(dev_priv, pipe));</div><div class='ctx'> 	csc-&gt;coeff[8] = tmp &amp; 0xffff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1227,7 +1227,7 @@ static void i9xx_load_lut_8(struct intel_crtc *crtc,</div><div class='ctx'> 	lut = blob-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		intel_de_write_fw(dev_priv, PALETTE(pipe, i),</div><div class='add'>+		intel_de_write_fw(dev_priv, PALETTE(dev_priv, pipe, i),</div><div class='ctx'> 				  i9xx_lut_8(&amp;lut[i]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1240,9 +1240,11 @@ static void i9xx_load_lut_10(struct intel_crtc *crtc,</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lut_size - 1; i++) {</div><div class='del'>-		intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 0),</div><div class='add'>+		intel_de_write_fw(dev_priv,</div><div class='add'>+				  PALETTE(dev_priv, pipe, 2 * i + 0),</div><div class='ctx'> 				  i9xx_lut_10_ldw(&amp;lut[i]));</div><div class='del'>-		intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 1),</div><div class='add'>+		intel_de_write_fw(dev_priv,</div><div class='add'>+				  PALETTE(dev_priv, pipe, 2 * i + 1),</div><div class='ctx'> 				  i9xx_lut_10_udw(&amp;lut[i]));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1274,9 +1276,11 @@ static void i965_load_lut_10p6(struct intel_crtc *crtc,</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lut_size - 1; i++) {</div><div class='del'>-		intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 0),</div><div class='add'>+		intel_de_write_fw(dev_priv,</div><div class='add'>+				  PALETTE(dev_priv, pipe, 2 * i + 0),</div><div class='ctx'> 				  i965_lut_10p6_ldw(&amp;lut[i]));</div><div class='del'>-		intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 1),</div><div class='add'>+		intel_de_write_fw(dev_priv,</div><div class='add'>+				  PALETTE(dev_priv, pipe, 2 * i + 1),</div><div class='ctx'> 				  i965_lut_10p6_udw(&amp;lut[i]));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3150,7 +3154,8 @@ static struct drm_property_blob *i9xx_read_lut_8(struct intel_crtc *crtc)</div><div class='ctx'> 	lut = blob-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; LEGACY_LUT_LENGTH; i++) {</div><div class='del'>-		u32 val = intel_de_read_fw(dev_priv, PALETTE(pipe, i));</div><div class='add'>+		u32 val = intel_de_read_fw(dev_priv,</div><div class='add'>+					   PALETTE(dev_priv, pipe, i));</div><div class='ctx'> </div><div class='ctx'> 		i9xx_lut_8_pack(&amp;lut[i], val);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3176,8 +3181,10 @@ static struct drm_property_blob *i9xx_read_lut_10(struct intel_crtc *crtc)</div><div class='ctx'> 	lut = blob-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lut_size - 1; i++) {</div><div class='del'>-		ldw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 0));</div><div class='del'>-		udw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 1));</div><div class='add'>+		ldw = intel_de_read_fw(dev_priv,</div><div class='add'>+				       PALETTE(dev_priv, pipe, 2 * i + 0));</div><div class='add'>+		udw = intel_de_read_fw(dev_priv,</div><div class='add'>+				       PALETTE(dev_priv, pipe, 2 * i + 1));</div><div class='ctx'> </div><div class='ctx'> 		i9xx_lut_10_pack(&amp;lut[i], ldw, udw);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3224,8 +3231,10 @@ static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc)</div><div class='ctx'> 	lut = blob-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lut_size - 1; i++) {</div><div class='del'>-		u32 ldw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 0));</div><div class='del'>-		u32 udw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 1));</div><div class='add'>+		u32 ldw = intel_de_read_fw(dev_priv,</div><div class='add'>+					   PALETTE(dev_priv, pipe, 2 * i + 0));</div><div class='add'>+		u32 udw = intel_de_read_fw(dev_priv,</div><div class='add'>+					   PALETTE(dev_priv, pipe, 2 * i + 1));</div><div class='ctx'> </div><div class='ctx'> 		i965_lut_10p6_pack(&amp;lut[i], ldw, udw);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h b/drivers/gpu/drm/i915/display/intel_color_regs.h<br/>index 9f4ae58f3e7e..bb99ea533842 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_color_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_color_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_color_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_color_regs.h</a></div><div class='hunk'>@@ -8,7 +8,35 @@</div><div class='ctx'> </div><div class='ctx'> #include "intel_display_reg_defs.h"</div><div class='ctx'> </div><div class='del'>-/* legacy palette */</div><div class='add'>+/* GMCH palette */</div><div class='add'>+#define _PALETTE_A		0xa000</div><div class='add'>+#define _PALETTE_B		0xa800</div><div class='add'>+#define _CHV_PALETTE_C		0xc000</div><div class='add'>+/* 8bit mode / i965+ 10.6 interpolated mode ldw/udw */</div><div class='add'>+#define   PALETTE_RED_MASK		REG_GENMASK(23, 16)</div><div class='add'>+#define   PALETTE_GREEN_MASK		REG_GENMASK(15, 8)</div><div class='add'>+#define   PALETTE_BLUE_MASK		REG_GENMASK(7, 0)</div><div class='add'>+/* pre-i965 10bit interpolated mode ldw */</div><div class='add'>+#define   PALETTE_10BIT_RED_LDW_MASK	REG_GENMASK(23, 16)</div><div class='add'>+#define   PALETTE_10BIT_GREEN_LDW_MASK	REG_GENMASK(15, 8)</div><div class='add'>+#define   PALETTE_10BIT_BLUE_LDW_MASK	REG_GENMASK(7, 0)</div><div class='add'>+/* pre-i965 10bit interpolated mode udw */</div><div class='add'>+#define   PALETTE_10BIT_RED_EXP_MASK	REG_GENMASK(23, 22)</div><div class='add'>+#define   PALETTE_10BIT_RED_MANT_MASK	REG_GENMASK(21, 18)</div><div class='add'>+#define   PALETTE_10BIT_RED_UDW_MASK	REG_GENMASK(17, 16)</div><div class='add'>+#define   PALETTE_10BIT_GREEN_EXP_MASK	REG_GENMASK(15, 14)</div><div class='add'>+#define   PALETTE_10BIT_GREEN_MANT_MASK	REG_GENMASK(13, 10)</div><div class='add'>+#define   PALETTE_10BIT_GREEN_UDW_MASK	REG_GENMASK(9, 8)</div><div class='add'>+#define   PALETTE_10BIT_BLUE_EXP_MASK	REG_GENMASK(7, 6)</div><div class='add'>+#define   PALETTE_10BIT_BLUE_MANT_MASK	REG_GENMASK(5, 2)</div><div class='add'>+#define   PALETTE_10BIT_BLUE_UDW_MASK	REG_GENMASK(1, 0)</div><div class='add'>+#define PALETTE(dev_priv, pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) +			\</div><div class='add'>+			       _PICK_EVEN_2RANGES(pipe, 2,			\</div><div class='add'>+						  _PALETTE_A, _PALETTE_B,	\</div><div class='add'>+						  _CHV_PALETTE_C, _CHV_PALETTE_C) + \</div><div class='add'>+						  (i) * 4)</div><div class='add'>+</div><div class='add'>+/* ilk+ palette */</div><div class='ctx'> #define _LGC_PALETTE_A           0x4a000</div><div class='ctx'> #define _LGC_PALETTE_B           0x4a800</div><div class='ctx'> /* see PALETTE_* for the bits */</div><div class='hunk'>@@ -228,12 +256,12 @@</div><div class='ctx'> #define _PIPE_A_WGC_C21_C20	0x600C0 /* s2.10 */</div><div class='ctx'> #define _PIPE_A_WGC_C22		0x600C4 /* s2.10 */</div><div class='ctx'> </div><div class='del'>-#define PIPE_WGC_C01_C00(pipe)		_MMIO_TRANS2(pipe, _PIPE_A_WGC_C01_C00)</div><div class='del'>-#define PIPE_WGC_C02(pipe)		_MMIO_TRANS2(pipe, _PIPE_A_WGC_C02)</div><div class='del'>-#define PIPE_WGC_C11_C10(pipe)		_MMIO_TRANS2(pipe, _PIPE_A_WGC_C11_C10)</div><div class='del'>-#define PIPE_WGC_C12(pipe)		_MMIO_TRANS2(pipe, _PIPE_A_WGC_C12)</div><div class='del'>-#define PIPE_WGC_C21_C20(pipe)		_MMIO_TRANS2(pipe, _PIPE_A_WGC_C21_C20)</div><div class='del'>-#define PIPE_WGC_C22(pipe)		_MMIO_TRANS2(pipe, _PIPE_A_WGC_C22)</div><div class='add'>+#define PIPE_WGC_C01_C00(dev_priv, pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C01_C00)</div><div class='add'>+#define PIPE_WGC_C02(dev_priv, pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C02)</div><div class='add'>+#define PIPE_WGC_C11_C10(dev_priv, pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C11_C10)</div><div class='add'>+#define PIPE_WGC_C12(dev_priv, pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C12)</div><div class='add'>+#define PIPE_WGC_C21_C20(dev_priv, pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C21_C20)</div><div class='add'>+#define PIPE_WGC_C22(dev_priv, pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C22)</div><div class='ctx'> </div><div class='ctx'> /* pipe CSC &amp; degamma/gamma LUTs on CHV */</div><div class='ctx'> #define _CGM_PIPE_A_CSC_COEFF01	(VLV_DISPLAY_BASE + 0x67900)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h<br/>index b0983edccf3f..0964e392d02c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_combo_phy_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_combo_phy_regs.h</a></div><div class='hunk'>@@ -25,28 +25,26 @@</div><div class='ctx'> 						 4 * (dw))</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_CL_DW5(phy)			_MMIO(_ICL_PORT_CL_DW(5, phy))</div><div class='del'>-#define   CL_POWER_DOWN_ENABLE			(1 &lt;&lt; 4)</div><div class='del'>-#define   SUS_CLOCK_CONFIG			(3 &lt;&lt; 0)</div><div class='add'>+#define   CL_POWER_DOWN_ENABLE			REG_BIT(4)</div><div class='add'>+#define   SUS_CLOCK_CONFIG			REG_GENMASK(1, 0)</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_CL_DW10(phy)			_MMIO(_ICL_PORT_CL_DW(10, phy))</div><div class='del'>-#define  PG_SEQ_DELAY_OVERRIDE_MASK		(3 &lt;&lt; 25)</div><div class='del'>-#define  PG_SEQ_DELAY_OVERRIDE_SHIFT		25</div><div class='del'>-#define  PG_SEQ_DELAY_OVERRIDE_ENABLE		(1 &lt;&lt; 24)</div><div class='del'>-#define  PWR_UP_ALL_LANES			(0x0 &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_3_2_1			(0xe &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_3_2			(0xc &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_3				(0x8 &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_2_1_0			(0x7 &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_1_0			(0x3 &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_3_1			(0xa &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_3_1_0			(0xb &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_MASK			(0xf &lt;&lt; 4)</div><div class='del'>-#define  PWR_DOWN_LN_SHIFT			4</div><div class='del'>-#define  EDP4K2K_MODE_OVRD_EN			(1 &lt;&lt; 3)</div><div class='del'>-#define  EDP4K2K_MODE_OVRD_OPTIMIZED		(1 &lt;&lt; 2)</div><div class='add'>+#define  PG_SEQ_DELAY_OVERRIDE_MASK		REG_GENMASK(26, 25)</div><div class='add'>+#define  PG_SEQ_DELAY_OVERRIDE_ENABLE		REG_BIT(24)</div><div class='add'>+#define  PWR_DOWN_LN_MASK			REG_GENMASK(7, 4)</div><div class='add'>+#define  PWR_UP_ALL_LANES			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x0)</div><div class='add'>+#define  PWR_DOWN_LN_3_2_1			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xe)</div><div class='add'>+#define  PWR_DOWN_LN_3_2			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xc)</div><div class='add'>+#define  PWR_DOWN_LN_3				REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x8)</div><div class='add'>+#define  PWR_DOWN_LN_2_1_0			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x7)</div><div class='add'>+#define  PWR_DOWN_LN_1_0			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x3)</div><div class='add'>+#define  PWR_DOWN_LN_3_1			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xa)</div><div class='add'>+#define  PWR_DOWN_LN_3_1_0			REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xb)</div><div class='add'>+#define  EDP4K2K_MODE_OVRD_EN			REG_BIT(3)</div><div class='add'>+#define  EDP4K2K_MODE_OVRD_OPTIMIZED		REG_BIT(2)</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_CL_DW12(phy)			_MMIO(_ICL_PORT_CL_DW(12, phy))</div><div class='del'>-#define   ICL_LANE_ENABLE_AUX			(1 &lt;&lt; 0)</div><div class='add'>+#define   ICL_LANE_ENABLE_AUX			REG_BIT(0)</div><div class='ctx'> </div><div class='ctx'> /* ICL Port COMP_DW registers */</div><div class='ctx'> #define _ICL_PORT_COMP				0x100</div><div class='hunk'>@@ -54,24 +52,22 @@</div><div class='ctx'> 						 _ICL_PORT_COMP + 4 * (dw))</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_COMP_DW0(phy)			_MMIO(_ICL_PORT_COMP_DW(0, phy))</div><div class='del'>-#define   COMP_INIT				(1 &lt;&lt; 31)</div><div class='add'>+#define   COMP_INIT				REG_BIT(31)</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_COMP_DW1(phy)			_MMIO(_ICL_PORT_COMP_DW(1, phy))</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_COMP_DW3(phy)			_MMIO(_ICL_PORT_COMP_DW(3, phy))</div><div class='del'>-#define   PROCESS_INFO_DOT_0			(0 &lt;&lt; 26)</div><div class='del'>-#define   PROCESS_INFO_DOT_1			(1 &lt;&lt; 26)</div><div class='del'>-#define   PROCESS_INFO_DOT_4			(2 &lt;&lt; 26)</div><div class='del'>-#define   PROCESS_INFO_MASK			(7 &lt;&lt; 26)</div><div class='del'>-#define   PROCESS_INFO_SHIFT			26</div><div class='del'>-#define   VOLTAGE_INFO_0_85V			(0 &lt;&lt; 24)</div><div class='del'>-#define   VOLTAGE_INFO_0_95V			(1 &lt;&lt; 24)</div><div class='del'>-#define   VOLTAGE_INFO_1_05V			(2 &lt;&lt; 24)</div><div class='del'>-#define   VOLTAGE_INFO_MASK			(3 &lt;&lt; 24)</div><div class='del'>-#define   VOLTAGE_INFO_SHIFT			24</div><div class='add'>+#define   PROCESS_INFO_MASK			REG_GENMASK(28, 26)</div><div class='add'>+#define   PROCESS_INFO_DOT_0			REG_FIELD_PREP(PROCESS_INFO_MASK, 0)</div><div class='add'>+#define   PROCESS_INFO_DOT_1			REG_FIELD_PREP(PROCESS_INFO_MASK, 1)</div><div class='add'>+#define   PROCESS_INFO_DOT_4			REG_FIELD_PREP(PROCESS_INFO_MASK, 2)</div><div class='add'>+#define   VOLTAGE_INFO_MASK			REG_GENMASK(25, 24)</div><div class='add'>+#define   VOLTAGE_INFO_0_85V			REG_FIELD_PREP(VOLTAGE_INFO_MASK, 0)</div><div class='add'>+#define   VOLTAGE_INFO_0_95V			REG_FIELD_PREP(VOLTAGE_INFO_MASK, 1)</div><div class='add'>+#define   VOLTAGE_INFO_1_05V			REG_FIELD_PREP(VOLTAGE_INFO_MASK, 2)</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_COMP_DW8(phy)			_MMIO(_ICL_PORT_COMP_DW(8, phy))</div><div class='del'>-#define   IREFGEN				(1 &lt;&lt; 24)</div><div class='add'>+#define   IREFGEN				REG_BIT(24)</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_COMP_DW9(phy)			_MMIO(_ICL_PORT_COMP_DW(9, phy))</div><div class='ctx'> </div><div class='hunk'>@@ -92,9 +88,9 @@</div><div class='ctx'> #define ICL_PORT_PCS_DW1_LN(ln, phy)		_MMIO(_ICL_PORT_PCS_DW_LN(1, ln, phy))</div><div class='ctx'> #define   DCC_MODE_SELECT_MASK			REG_GENMASK(21, 20)</div><div class='ctx'> #define   RUN_DCC_ONCE				REG_FIELD_PREP(DCC_MODE_SELECT_MASK, 0)</div><div class='del'>-#define   COMMON_KEEPER_EN			(1 &lt;&lt; 26)</div><div class='del'>-#define   LATENCY_OPTIM_MASK			(0x3 &lt;&lt; 2)</div><div class='del'>-#define   LATENCY_OPTIM_VAL(x)			((x) &lt;&lt; 2)</div><div class='add'>+#define   COMMON_KEEPER_EN			REG_BIT(26)</div><div class='add'>+#define   LATENCY_OPTIM_MASK			REG_GENMASK(3, 2)</div><div class='add'>+#define   LATENCY_OPTIM_VAL(x)			REG_FIELD_PREP(LATENCY_OPTIM_MASK, (x))</div><div class='ctx'> </div><div class='ctx'> /* ICL Port TX registers */</div><div class='ctx'> #define _ICL_PORT_TX_AUX			0x380</div><div class='hunk'>@@ -111,42 +107,49 @@</div><div class='ctx'> #define ICL_PORT_TX_DW2_AUX(phy)		_MMIO(_ICL_PORT_TX_DW_AUX(2, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW2_GRP(phy)		_MMIO(_ICL_PORT_TX_DW_GRP(2, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW2_LN(ln, phy)		_MMIO(_ICL_PORT_TX_DW_LN(2, ln, phy))</div><div class='del'>-#define   SWING_SEL_UPPER(x)			(((x) &gt;&gt; 3) &lt;&lt; 15)</div><div class='del'>-#define   SWING_SEL_UPPER_MASK			(1 &lt;&lt; 15)</div><div class='del'>-#define   SWING_SEL_LOWER(x)			(((x) &amp; 0x7) &lt;&lt; 11)</div><div class='del'>-#define   SWING_SEL_LOWER_MASK			(0x7 &lt;&lt; 11)</div><div class='del'>-#define   FRC_LATENCY_OPTIM_MASK		(0x7 &lt;&lt; 8)</div><div class='del'>-#define   FRC_LATENCY_OPTIM_VAL(x)		((x) &lt;&lt; 8)</div><div class='del'>-#define   RCOMP_SCALAR(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define   RCOMP_SCALAR_MASK			(0xFF &lt;&lt; 0)</div><div class='add'>+#define   SWING_SEL_UPPER_MASK			REG_BIT(15)</div><div class='add'>+#define   SWING_SEL_UPPER(x)			REG_FIELD_PREP(SWING_SEL_UPPER_MASK, (x) &gt;&gt; 3)</div><div class='add'>+#define   SWING_SEL_LOWER_MASK			REG_GENMASK(13, 11)</div><div class='add'>+#define   SWING_SEL_LOWER(x)			REG_FIELD_PREP(SWING_SEL_LOWER_MASK, (x) &amp; 0x7)</div><div class='add'>+#define   FRC_LATENCY_OPTIM_MASK		REG_GENMASK(10, 8)</div><div class='add'>+#define   FRC_LATENCY_OPTIM_VAL(x)		REG_FIELD_PREP(FRC_LATENCY_OPTIM_MASK, (x))</div><div class='add'>+#define   RCOMP_SCALAR_MASK			REG_GENMASK(7, 0)</div><div class='add'>+#define   RCOMP_SCALAR(x)			REG_FIELD_PREP(RCOMP_SCALAR_MASK, (x))</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_TX_DW4_AUX(phy)		_MMIO(_ICL_PORT_TX_DW_AUX(4, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW4_GRP(phy)		_MMIO(_ICL_PORT_TX_DW_GRP(4, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW4_LN(ln, phy)		_MMIO(_ICL_PORT_TX_DW_LN(4, ln, phy))</div><div class='del'>-#define   LOADGEN_SELECT			(1 &lt;&lt; 31)</div><div class='del'>-#define   POST_CURSOR_1(x)			((x) &lt;&lt; 12)</div><div class='del'>-#define   POST_CURSOR_1_MASK			(0x3F &lt;&lt; 12)</div><div class='del'>-#define   POST_CURSOR_2(x)			((x) &lt;&lt; 6)</div><div class='del'>-#define   POST_CURSOR_2_MASK			(0x3F &lt;&lt; 6)</div><div class='del'>-#define   CURSOR_COEFF(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define   CURSOR_COEFF_MASK			(0x3F &lt;&lt; 0)</div><div class='add'>+#define   LOADGEN_SELECT			REG_BIT(31)</div><div class='add'>+#define   POST_CURSOR_1_MASK			REG_GENMASK(17, 12)</div><div class='add'>+#define   POST_CURSOR_1(x)			REG_FIELD_PREP(POST_CURSOR_1_MASK, (x))</div><div class='add'>+#define   POST_CURSOR_2_MASK			REG_GENMASK(11, 6)</div><div class='add'>+#define   POST_CURSOR_2(x)			REG_FIELD_PREP(POST_CURSOR_2_MASK, (x))</div><div class='add'>+#define   CURSOR_COEFF_MASK			REG_GENMASK(5, 0)</div><div class='add'>+#define   CURSOR_COEFF(x)			REG_FIELD_PREP(CURSOR_COEFF_MASK, (x))</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_TX_DW5_AUX(phy)		_MMIO(_ICL_PORT_TX_DW_AUX(5, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW5_GRP(phy)		_MMIO(_ICL_PORT_TX_DW_GRP(5, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW5_LN(ln, phy)		_MMIO(_ICL_PORT_TX_DW_LN(5, ln, phy))</div><div class='del'>-#define   TX_TRAINING_EN			(1 &lt;&lt; 31)</div><div class='del'>-#define   TAP2_DISABLE				(1 &lt;&lt; 30)</div><div class='del'>-#define   TAP3_DISABLE				(1 &lt;&lt; 29)</div><div class='del'>-#define   SCALING_MODE_SEL(x)			((x) &lt;&lt; 18)</div><div class='del'>-#define   SCALING_MODE_SEL_MASK			(0x7 &lt;&lt; 18)</div><div class='del'>-#define   RTERM_SELECT(x)			((x) &lt;&lt; 3)</div><div class='del'>-#define   RTERM_SELECT_MASK			(0x7 &lt;&lt; 3)</div><div class='add'>+#define   TX_TRAINING_EN			REG_BIT(31)</div><div class='add'>+#define   TAP2_DISABLE				REG_BIT(30)</div><div class='add'>+#define   TAP3_DISABLE				REG_BIT(29)</div><div class='add'>+#define   SCALING_MODE_SEL_MASK			REG_GENMASK(20, 18)</div><div class='add'>+#define   SCALING_MODE_SEL(x)			REG_FIELD_PREP(SCALING_MODE_SEL_MASK, (x))</div><div class='add'>+#define   RTERM_SELECT_MASK			REG_GENMASK(5, 3)</div><div class='add'>+#define   RTERM_SELECT(x)			REG_FIELD_PREP(RTERM_SELECT_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define ICL_PORT_TX_DW6_AUX(phy)		_MMIO(_ICL_PORT_TX_DW_AUX(6, phy))</div><div class='add'>+#define ICL_PORT_TX_DW6_GRP(phy)		_MMIO(_ICL_PORT_TX_DW_GRP(6, phy))</div><div class='add'>+#define ICL_PORT_TX_DW6_LN(ln, phy)		_MMIO(_ICL_PORT_TX_DW_LN(6, ln, phy))</div><div class='add'>+#define   O_FUNC_OVRD_EN			REG_BIT(7)</div><div class='add'>+#define   O_LDO_REF_SEL_CRI			REG_GENMASK(6, 1)</div><div class='add'>+#define   O_LDO_BYPASS_CRI			REG_BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_TX_DW7_AUX(phy)		_MMIO(_ICL_PORT_TX_DW_AUX(7, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW7_GRP(phy)		_MMIO(_ICL_PORT_TX_DW_GRP(7, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW7_LN(ln, phy)		_MMIO(_ICL_PORT_TX_DW_LN(7, ln, phy))</div><div class='del'>-#define   N_SCALAR(x)				((x) &lt;&lt; 24)</div><div class='del'>-#define   N_SCALAR_MASK				(0x7F &lt;&lt; 24)</div><div class='add'>+#define   N_SCALAR_MASK				REG_GENMASK(30, 24)</div><div class='add'>+#define   N_SCALAR(x)				REG_FIELD_PREP(N_SCALAR_MASK, (x))</div><div class='ctx'> </div><div class='ctx'> #define ICL_PORT_TX_DW8_AUX(phy)		_MMIO(_ICL_PORT_TX_DW_AUX(8, phy))</div><div class='ctx'> #define ICL_PORT_TX_DW8_GRP(phy)		_MMIO(_ICL_PORT_TX_DW_GRP(8, phy))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c<br/>index 93479db0f89f..10e95dc425a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_crt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_crt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_crt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_crt.c</a></div><div class='hunk'>@@ -348,7 +348,7 @@ intel_crt_mode_valid(struct drm_connector *connector,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	int max_dotclk = dev_priv-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = dev_priv-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> 	int max_clock;</div><div class='ctx'> </div><div class='hunk'>@@ -356,9 +356,6 @@ intel_crt_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='del'>-		return MODE_NO_DBLESCAN;</div><div class='del'>-</div><div class='ctx'> 	if (mode-&gt;clock &lt; 25000)</div><div class='ctx'> 		return MODE_CLOCK_LOW;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c<br/>index 4bcf446c75f4..ccaa4cb2809b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_crtc_state_dump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_crtc_state_dump.c</a></div><div class='hunk'>@@ -12,33 +12,31 @@</div><div class='ctx'> #include "intel_hdmi.h"</div><div class='ctx'> #include "intel_vrr.h"</div><div class='ctx'> </div><div class='del'>-static void intel_dump_crtc_timings(struct drm_i915_private *i915,</div><div class='add'>+static void intel_dump_crtc_timings(struct drm_printer *p,</div><div class='ctx'> 				    const struct drm_display_mode *mode)</div><div class='ctx'> {</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "crtc timings: clock=%d, "</div><div class='del'>-		    "hd=%d hb=%d-%d hs=%d-%d ht=%d, "</div><div class='del'>-		    "vd=%d vb=%d-%d vs=%d-%d vt=%d, "</div><div class='del'>-		    "flags=0x%x\n",</div><div class='del'>-		    mode-&gt;crtc_clock,</div><div class='del'>-		    mode-&gt;crtc_hdisplay, mode-&gt;crtc_hblank_start, mode-&gt;crtc_hblank_end,</div><div class='del'>-		    mode-&gt;crtc_hsync_start, mode-&gt;crtc_hsync_end, mode-&gt;crtc_htotal,</div><div class='del'>-		    mode-&gt;crtc_vdisplay, mode-&gt;crtc_vblank_start, mode-&gt;crtc_vblank_end,</div><div class='del'>-		    mode-&gt;crtc_vsync_start, mode-&gt;crtc_vsync_end, mode-&gt;crtc_vtotal,</div><div class='del'>-		    mode-&gt;flags);</div><div class='add'>+	drm_printf(p, "crtc timings: clock=%d, "</div><div class='add'>+		   "hd=%d hb=%d-%d hs=%d-%d ht=%d, "</div><div class='add'>+		   "vd=%d vb=%d-%d vs=%d-%d vt=%d, "</div><div class='add'>+		   "flags=0x%x\n",</div><div class='add'>+		   mode-&gt;crtc_clock,</div><div class='add'>+		   mode-&gt;crtc_hdisplay, mode-&gt;crtc_hblank_start, mode-&gt;crtc_hblank_end,</div><div class='add'>+		   mode-&gt;crtc_hsync_start, mode-&gt;crtc_hsync_end, mode-&gt;crtc_htotal,</div><div class='add'>+		   mode-&gt;crtc_vdisplay, mode-&gt;crtc_vblank_start, mode-&gt;crtc_vblank_end,</div><div class='add'>+		   mode-&gt;crtc_vsync_start, mode-&gt;crtc_vsync_end, mode-&gt;crtc_vtotal,</div><div class='add'>+		   mode-&gt;flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-intel_dump_m_n_config(const struct intel_crtc_state *pipe_config,</div><div class='add'>+intel_dump_m_n_config(struct drm_printer *p,</div><div class='add'>+		      const struct intel_crtc_state *pipe_config,</div><div class='ctx'> 		      const char *id, unsigned int lane_count,</div><div class='ctx'> 		      const struct intel_link_m_n *m_n)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(pipe_config-&gt;uapi.crtc-&gt;dev);</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "%s: lanes: %i; data_m: %u, data_n: %u, link_m: %u, link_n: %u, tu: %u\n",</div><div class='del'>-		    id, lane_count,</div><div class='del'>-		    m_n-&gt;data_m, m_n-&gt;data_n,</div><div class='del'>-		    m_n-&gt;link_m, m_n-&gt;link_n, m_n-&gt;tu);</div><div class='add'>+	drm_printf(p, "%s: lanes: %i; data_m: %u, data_n: %u, link_m: %u, link_n: %u, tu: %u\n",</div><div class='add'>+		   id, lane_count,</div><div class='add'>+		   m_n-&gt;data_m, m_n-&gt;data_n,</div><div class='add'>+		   m_n-&gt;link_m, m_n-&gt;link_n, m_n-&gt;tu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -52,17 +50,7 @@ intel_dump_infoframe(struct drm_i915_private *i915,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-intel_dump_dp_vsc_sdp(struct drm_i915_private *i915,</div><div class='del'>-		      const struct drm_dp_vsc_sdp *vsc)</div><div class='del'>-{</div><div class='del'>-	struct drm_printer p = drm_dbg_printer(&amp;i915-&gt;drm, DRM_UT_KMS, NULL);</div><div class='del'>-</div><div class='del'>-	drm_dp_vsc_sdp_log(&amp;p, vsc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-intel_dump_buffer(struct drm_i915_private *i915,</div><div class='del'>-		  const char *prefix, const u8 *buf, size_t len)</div><div class='add'>+intel_dump_buffer(const char *prefix, const u8 *buf, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	if (!drm_debug_enabled(DRM_UT_KMS))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -130,71 +118,66 @@ const char *intel_output_format_name(enum intel_output_format format)</div><div class='ctx'> 	return output_format_str[format];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_dump_plane_state(const struct intel_plane_state *plane_state)</div><div class='add'>+static void intel_dump_plane_state(struct drm_printer *p,</div><div class='add'>+				   const struct intel_plane_state *plane_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_plane *plane = to_intel_plane(plane_state-&gt;uapi.plane);</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(plane-&gt;base.dev);</div><div class='ctx'> 	const struct drm_framebuffer *fb = plane_state-&gt;hw.fb;</div><div class='ctx'> </div><div class='ctx'> 	if (!fb) {</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "[PLANE:%d:%s] fb: [NOFB], visible: %s\n",</div><div class='del'>-			    plane-&gt;base.base.id, plane-&gt;base.name,</div><div class='del'>-			    str_yes_no(plane_state-&gt;uapi.visible));</div><div class='add'>+		drm_printf(p, "[PLANE:%d:%s] fb: [NOFB], visible: %s\n",</div><div class='add'>+			   plane-&gt;base.base.id, plane-&gt;base.name,</div><div class='add'>+			   str_yes_no(plane_state-&gt;uapi.visible));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "[PLANE:%d:%s] fb: [FB:%d] %ux%u format = %p4cc modifier = 0x%llx, visible: %s\n",</div><div class='del'>-		    plane-&gt;base.base.id, plane-&gt;base.name,</div><div class='del'>-		    fb-&gt;base.id, fb-&gt;width, fb-&gt;height, &amp;fb-&gt;format-&gt;format,</div><div class='del'>-		    fb-&gt;modifier, str_yes_no(plane_state-&gt;uapi.visible));</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "\trotation: 0x%x, scaler: %d, scaling_filter: %d\n",</div><div class='del'>-		    plane_state-&gt;hw.rotation, plane_state-&gt;scaler_id, plane_state-&gt;hw.scaling_filter);</div><div class='add'>+	drm_printf(p, "[PLANE:%d:%s] fb: [FB:%d] %ux%u format = %p4cc modifier = 0x%llx, visible: %s\n",</div><div class='add'>+		   plane-&gt;base.base.id, plane-&gt;base.name,</div><div class='add'>+		   fb-&gt;base.id, fb-&gt;width, fb-&gt;height, &amp;fb-&gt;format-&gt;format,</div><div class='add'>+		   fb-&gt;modifier, str_yes_no(plane_state-&gt;uapi.visible));</div><div class='add'>+	drm_printf(p, "\trotation: 0x%x, scaler: %d, scaling_filter: %d\n",</div><div class='add'>+		   plane_state-&gt;hw.rotation, plane_state-&gt;scaler_id, plane_state-&gt;hw.scaling_filter);</div><div class='ctx'> 	if (plane_state-&gt;uapi.visible)</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "\tsrc: " DRM_RECT_FP_FMT " dst: " DRM_RECT_FMT "\n",</div><div class='del'>-			    DRM_RECT_FP_ARG(&amp;plane_state-&gt;uapi.src),</div><div class='del'>-			    DRM_RECT_ARG(&amp;plane_state-&gt;uapi.dst));</div><div class='add'>+		drm_printf(p, "\tsrc: " DRM_RECT_FP_FMT " dst: " DRM_RECT_FMT "\n",</div><div class='add'>+			   DRM_RECT_FP_ARG(&amp;plane_state-&gt;uapi.src),</div><div class='add'>+			   DRM_RECT_ARG(&amp;plane_state-&gt;uapi.dst));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-ilk_dump_csc(struct drm_i915_private *i915, const char *name,</div><div class='add'>+ilk_dump_csc(struct drm_i915_private *i915,</div><div class='add'>+	     struct drm_printer *p,</div><div class='add'>+	     const char *name,</div><div class='ctx'> 	     const struct intel_csc_matrix *csc)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "%s: pre offsets: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='del'>-		    csc-&gt;preoff[0], csc-&gt;preoff[1], csc-&gt;preoff[2]);</div><div class='add'>+	drm_printf(p, "%s: pre offsets: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='add'>+		   csc-&gt;preoff[0], csc-&gt;preoff[1], csc-&gt;preoff[2]);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "%s: coefficients: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='del'>-			    csc-&gt;coeff[3 * i + 0],</div><div class='del'>-			    csc-&gt;coeff[3 * i + 1],</div><div class='del'>-			    csc-&gt;coeff[3 * i + 2]);</div><div class='add'>+		drm_printf(p, "%s: coefficients: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='add'>+			   csc-&gt;coeff[3 * i + 0],</div><div class='add'>+			   csc-&gt;coeff[3 * i + 1],</div><div class='add'>+			   csc-&gt;coeff[3 * i + 2]);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &lt; 7)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "%s: post offsets: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='del'>-		    csc-&gt;postoff[0], csc-&gt;postoff[1], csc-&gt;postoff[2]);</div><div class='add'>+	drm_printf(p, "%s: post offsets: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='add'>+		   csc-&gt;postoff[0], csc-&gt;postoff[1], csc-&gt;postoff[2]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-vlv_dump_csc(struct drm_i915_private *i915, const char *name,</div><div class='add'>+vlv_dump_csc(struct drm_printer *p, const char *name,</div><div class='ctx'> 	     const struct intel_csc_matrix *csc)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "%s: coefficients: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='del'>-			    csc-&gt;coeff[3 * i + 0],</div><div class='del'>-			    csc-&gt;coeff[3 * i + 1],</div><div class='del'>-			    csc-&gt;coeff[3 * i + 2]);</div><div class='add'>+		drm_printf(p, "%s: coefficients: 0x%04x 0x%04x 0x%04x\n", name,</div><div class='add'>+			   csc-&gt;coeff[3 * i + 0],</div><div class='add'>+			   csc-&gt;coeff[3 * i + 1],</div><div class='add'>+			   csc-&gt;coeff[3 * i + 2]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,</div><div class='hunk'>@@ -205,85 +188,86 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	const struct intel_plane_state *plane_state;</div><div class='ctx'> 	struct intel_plane *plane;</div><div class='add'>+	struct drm_printer p;</div><div class='ctx'> 	char buf[64];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "[CRTC:%d:%s] enable: %s [%s]\n",</div><div class='del'>-		    crtc-&gt;base.base.id, crtc-&gt;base.name,</div><div class='del'>-		    str_yes_no(pipe_config-&gt;hw.enable), context);</div><div class='add'>+	if (!drm_debug_enabled(DRM_UT_KMS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	p = drm_dbg_printer(&amp;i915-&gt;drm, DRM_UT_KMS, NULL);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "[CRTC:%d:%s] enable: %s [%s]\n",</div><div class='add'>+		   crtc-&gt;base.base.id, crtc-&gt;base.name,</div><div class='add'>+		   str_yes_no(pipe_config-&gt;hw.enable), context);</div><div class='ctx'> </div><div class='ctx'> 	if (!pipe_config-&gt;hw.enable)</div><div class='ctx'> 		goto dump_planes;</div><div class='ctx'> </div><div class='ctx'> 	snprintf_output_types(buf, sizeof(buf), pipe_config-&gt;output_types);</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "active: %s, output_types: %s (0x%x), output format: %s, sink format: %s\n",</div><div class='del'>-		    str_yes_no(pipe_config-&gt;hw.active),</div><div class='del'>-		    buf, pipe_config-&gt;output_types,</div><div class='del'>-		    intel_output_format_name(pipe_config-&gt;output_format),</div><div class='del'>-		    intel_output_format_name(pipe_config-&gt;sink_format));</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "cpu_transcoder: %s, pipe bpp: %i, dithering: %i\n",</div><div class='del'>-		    transcoder_name(pipe_config-&gt;cpu_transcoder),</div><div class='del'>-		    pipe_config-&gt;pipe_bpp, pipe_config-&gt;dither);</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "MST master transcoder: %s\n",</div><div class='del'>-		    transcoder_name(pipe_config-&gt;mst_master_transcoder));</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "port sync: master transcoder: %s, slave transcoder bitmask = 0x%x\n",</div><div class='del'>-		    transcoder_name(pipe_config-&gt;master_transcoder),</div><div class='del'>-		    pipe_config-&gt;sync_mode_slaves_mask);</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "bigjoiner: %s, pipes: 0x%x\n",</div><div class='del'>-		    intel_crtc_is_bigjoiner_slave(pipe_config) ? "slave" :</div><div class='del'>-		    intel_crtc_is_bigjoiner_master(pipe_config) ? "master" : "no",</div><div class='del'>-		    pipe_config-&gt;bigjoiner_pipes);</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "splitter: %s, link count %d, overlap %d\n",</div><div class='del'>-		    str_enabled_disabled(pipe_config-&gt;splitter.enable),</div><div class='del'>-		    pipe_config-&gt;splitter.link_count,</div><div class='del'>-		    pipe_config-&gt;splitter.pixel_overlap);</div><div class='add'>+	drm_printf(&amp;p, "active: %s, output_types: %s (0x%x), output format: %s, sink format: %s\n",</div><div class='add'>+		   str_yes_no(pipe_config-&gt;hw.active),</div><div class='add'>+		   buf, pipe_config-&gt;output_types,</div><div class='add'>+		   intel_output_format_name(pipe_config-&gt;output_format),</div><div class='add'>+		   intel_output_format_name(pipe_config-&gt;sink_format));</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "cpu_transcoder: %s, pipe bpp: %i, dithering: %i\n",</div><div class='add'>+		   transcoder_name(pipe_config-&gt;cpu_transcoder),</div><div class='add'>+		   pipe_config-&gt;pipe_bpp, pipe_config-&gt;dither);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "MST master transcoder: %s\n",</div><div class='add'>+		   transcoder_name(pipe_config-&gt;mst_master_transcoder));</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "port sync: master transcoder: %s, slave transcoder bitmask = 0x%x\n",</div><div class='add'>+		   transcoder_name(pipe_config-&gt;master_transcoder),</div><div class='add'>+		   pipe_config-&gt;sync_mode_slaves_mask);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "bigjoiner: %s, pipes: 0x%x\n",</div><div class='add'>+		   intel_crtc_is_bigjoiner_slave(pipe_config) ? "slave" :</div><div class='add'>+		   intel_crtc_is_bigjoiner_master(pipe_config) ? "master" : "no",</div><div class='add'>+		   pipe_config-&gt;bigjoiner_pipes);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "splitter: %s, link count %d, overlap %d\n",</div><div class='add'>+		   str_enabled_disabled(pipe_config-&gt;splitter.enable),</div><div class='add'>+		   pipe_config-&gt;splitter.link_count,</div><div class='add'>+		   pipe_config-&gt;splitter.pixel_overlap);</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_config-&gt;has_pch_encoder)</div><div class='del'>-		intel_dump_m_n_config(pipe_config, "fdi",</div><div class='add'>+		intel_dump_m_n_config(&amp;p, pipe_config, "fdi",</div><div class='ctx'> 				      pipe_config-&gt;fdi_lanes,</div><div class='ctx'> 				      &amp;pipe_config-&gt;fdi_m_n);</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_dp_encoder(pipe_config)) {</div><div class='del'>-		intel_dump_m_n_config(pipe_config, "dp m_n",</div><div class='add'>+		intel_dump_m_n_config(&amp;p, pipe_config, "dp m_n",</div><div class='ctx'> 				      pipe_config-&gt;lane_count,</div><div class='ctx'> 				      &amp;pipe_config-&gt;dp_m_n);</div><div class='del'>-		intel_dump_m_n_config(pipe_config, "dp m2_n2",</div><div class='add'>+		intel_dump_m_n_config(&amp;p, pipe_config, "dp m2_n2",</div><div class='ctx'> 				      pipe_config-&gt;lane_count,</div><div class='ctx'> 				      &amp;pipe_config-&gt;dp_m2_n2);</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "fec: %s, enhanced framing: %s\n",</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;fec_enable),</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;enhanced_framing));</div><div class='del'>-</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "sdp split: %s\n",</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;sdp_split_enable));</div><div class='del'>-</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "psr: %s, psr2: %s, panel replay: %s, selective fetch: %s\n",</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;has_psr),</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;has_psr2),</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;has_panel_replay),</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;enable_psr2_sel_fetch));</div><div class='add'>+		drm_printf(&amp;p, "fec: %s, enhanced framing: %s\n",</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;fec_enable),</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;enhanced_framing));</div><div class='add'>+</div><div class='add'>+		drm_printf(&amp;p, "sdp split: %s\n",</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;sdp_split_enable));</div><div class='add'>+</div><div class='add'>+		drm_printf(&amp;p, "psr: %s, psr2: %s, panel replay: %s, selective fetch: %s\n",</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;has_psr),</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;has_psr2),</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;has_panel_replay),</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;enable_psr2_sel_fetch));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "framestart delay: %d, MSA timing delay: %d\n",</div><div class='del'>-		    pipe_config-&gt;framestart_delay, pipe_config-&gt;msa_timing_delay);</div><div class='add'>+	drm_printf(&amp;p, "framestart delay: %d, MSA timing delay: %d\n",</div><div class='add'>+		   pipe_config-&gt;framestart_delay, pipe_config-&gt;msa_timing_delay);</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "audio: %i, infoframes: %i, infoframes enabled: 0x%x\n",</div><div class='del'>-		    pipe_config-&gt;has_audio, pipe_config-&gt;has_infoframe,</div><div class='del'>-		    pipe_config-&gt;infoframes.enable);</div><div class='add'>+	drm_printf(&amp;p, "audio: %i, infoframes: %i, infoframes enabled: 0x%x\n",</div><div class='add'>+		   pipe_config-&gt;has_audio, pipe_config-&gt;has_infoframe,</div><div class='add'>+		   pipe_config-&gt;infoframes.enable);</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_config-&gt;infoframes.enable &amp;</div><div class='ctx'> 	    intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GENERAL_CONTROL))</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "GCP: 0x%x\n",</div><div class='del'>-			    pipe_config-&gt;infoframes.gcp);</div><div class='add'>+		drm_printf(&amp;p, "GCP: 0x%x\n", pipe_config-&gt;infoframes.gcp);</div><div class='ctx'> 	if (pipe_config-&gt;infoframes.enable &amp;</div><div class='ctx'> 	    intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI))</div><div class='ctx'> 		intel_dump_infoframe(i915, &amp;pipe_config-&gt;infoframes.avi);</div><div class='hunk'>@@ -301,91 +285,88 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,</div><div class='ctx'> 		intel_dump_infoframe(i915, &amp;pipe_config-&gt;infoframes.drm);</div><div class='ctx'> 	if (pipe_config-&gt;infoframes.enable &amp;</div><div class='ctx'> 	    intel_hdmi_infoframe_enable(DP_SDP_VSC))</div><div class='del'>-		intel_dump_dp_vsc_sdp(i915, &amp;pipe_config-&gt;infoframes.vsc);</div><div class='add'>+		drm_dp_vsc_sdp_log(&amp;p, &amp;pipe_config-&gt;infoframes.vsc);</div><div class='add'>+	if (pipe_config-&gt;infoframes.enable &amp;</div><div class='add'>+	    intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC))</div><div class='add'>+		drm_dp_as_sdp_log(&amp;p, &amp;pipe_config-&gt;infoframes.as_sdp);</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_config-&gt;has_audio)</div><div class='del'>-		intel_dump_buffer(i915, "ELD: ", pipe_config-&gt;eld,</div><div class='add'>+		intel_dump_buffer("ELD: ", pipe_config-&gt;eld,</div><div class='ctx'> 				  drm_eld_size(pipe_config-&gt;eld));</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "vrr: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n",</div><div class='del'>-		    str_yes_no(pipe_config-&gt;vrr.enable),</div><div class='del'>-		    pipe_config-&gt;vrr.vmin, pipe_config-&gt;vrr.vmax,</div><div class='del'>-		    pipe_config-&gt;vrr.pipeline_full, pipe_config-&gt;vrr.guardband,</div><div class='del'>-		    pipe_config-&gt;vrr.flipline,</div><div class='del'>-		    intel_vrr_vmin_vblank_start(pipe_config),</div><div class='del'>-		    intel_vrr_vmax_vblank_start(pipe_config));</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "requested mode: " DRM_MODE_FMT "\n",</div><div class='del'>-		    DRM_MODE_ARG(&amp;pipe_config-&gt;hw.mode));</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "adjusted mode: " DRM_MODE_FMT "\n",</div><div class='del'>-		    DRM_MODE_ARG(&amp;pipe_config-&gt;hw.adjusted_mode));</div><div class='del'>-	intel_dump_crtc_timings(i915, &amp;pipe_config-&gt;hw.adjusted_mode);</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "pipe mode: " DRM_MODE_FMT "\n",</div><div class='del'>-		    DRM_MODE_ARG(&amp;pipe_config-&gt;hw.pipe_mode));</div><div class='del'>-	intel_dump_crtc_timings(i915, &amp;pipe_config-&gt;hw.pipe_mode);</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "port clock: %d, pipe src: " DRM_RECT_FMT ", pixel rate %d\n",</div><div class='del'>-		    pipe_config-&gt;port_clock, DRM_RECT_ARG(&amp;pipe_config-&gt;pipe_src),</div><div class='del'>-		    pipe_config-&gt;pixel_rate);</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "linetime: %d, ips linetime: %d\n",</div><div class='del'>-		    pipe_config-&gt;linetime, pipe_config-&gt;ips_linetime);</div><div class='add'>+	drm_printf(&amp;p, "vrr: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n",</div><div class='add'>+		   str_yes_no(pipe_config-&gt;vrr.enable),</div><div class='add'>+		   pipe_config-&gt;vrr.vmin, pipe_config-&gt;vrr.vmax,</div><div class='add'>+		   pipe_config-&gt;vrr.pipeline_full, pipe_config-&gt;vrr.guardband,</div><div class='add'>+		   pipe_config-&gt;vrr.flipline,</div><div class='add'>+		   intel_vrr_vmin_vblank_start(pipe_config),</div><div class='add'>+		   intel_vrr_vmax_vblank_start(pipe_config));</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "requested mode: " DRM_MODE_FMT "\n",</div><div class='add'>+		   DRM_MODE_ARG(&amp;pipe_config-&gt;hw.mode));</div><div class='add'>+	drm_printf(&amp;p, "adjusted mode: " DRM_MODE_FMT "\n",</div><div class='add'>+		   DRM_MODE_ARG(&amp;pipe_config-&gt;hw.adjusted_mode));</div><div class='add'>+	intel_dump_crtc_timings(&amp;p, &amp;pipe_config-&gt;hw.adjusted_mode);</div><div class='add'>+	drm_printf(&amp;p, "pipe mode: " DRM_MODE_FMT "\n",</div><div class='add'>+		   DRM_MODE_ARG(&amp;pipe_config-&gt;hw.pipe_mode));</div><div class='add'>+	intel_dump_crtc_timings(&amp;p, &amp;pipe_config-&gt;hw.pipe_mode);</div><div class='add'>+	drm_printf(&amp;p, "port clock: %d, pipe src: " DRM_RECT_FMT ", pixel rate %d\n",</div><div class='add'>+		   pipe_config-&gt;port_clock, DRM_RECT_ARG(&amp;pipe_config-&gt;pipe_src),</div><div class='add'>+		   pipe_config-&gt;pixel_rate);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "linetime: %d, ips linetime: %d\n",</div><div class='add'>+		   pipe_config-&gt;linetime, pipe_config-&gt;ips_linetime);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 9)</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "num_scalers: %d, scaler_users: 0x%x, scaler_id: %d, scaling_filter: %d\n",</div><div class='del'>-			    crtc-&gt;num_scalers,</div><div class='del'>-			    pipe_config-&gt;scaler_state.scaler_users,</div><div class='del'>-			    pipe_config-&gt;scaler_state.scaler_id,</div><div class='del'>-			    pipe_config-&gt;hw.scaling_filter);</div><div class='add'>+		drm_printf(&amp;p, "num_scalers: %d, scaler_users: 0x%x, scaler_id: %d, scaling_filter: %d\n",</div><div class='add'>+			   crtc-&gt;num_scalers,</div><div class='add'>+			   pipe_config-&gt;scaler_state.scaler_users,</div><div class='add'>+			   pipe_config-&gt;scaler_state.scaler_id,</div><div class='add'>+			   pipe_config-&gt;hw.scaling_filter);</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_GMCH(i915))</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",</div><div class='del'>-			    pipe_config-&gt;gmch_pfit.control,</div><div class='del'>-			    pipe_config-&gt;gmch_pfit.pgm_ratios,</div><div class='del'>-			    pipe_config-&gt;gmch_pfit.lvds_border_bits);</div><div class='add'>+		drm_printf(&amp;p, "gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",</div><div class='add'>+			   pipe_config-&gt;gmch_pfit.control,</div><div class='add'>+			   pipe_config-&gt;gmch_pfit.pgm_ratios,</div><div class='add'>+			   pipe_config-&gt;gmch_pfit.lvds_border_bits);</div><div class='ctx'> 	else</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "pch pfit: " DRM_RECT_FMT ", %s, force thru: %s\n",</div><div class='del'>-			    DRM_RECT_ARG(&amp;pipe_config-&gt;pch_pfit.dst),</div><div class='del'>-			    str_enabled_disabled(pipe_config-&gt;pch_pfit.enabled),</div><div class='del'>-			    str_yes_no(pipe_config-&gt;pch_pfit.force_thru));</div><div class='add'>+		drm_printf(&amp;p, "pch pfit: " DRM_RECT_FMT ", %s, force thru: %s\n",</div><div class='add'>+			   DRM_RECT_ARG(&amp;pipe_config-&gt;pch_pfit.dst),</div><div class='add'>+			   str_enabled_disabled(pipe_config-&gt;pch_pfit.enabled),</div><div class='add'>+			   str_yes_no(pipe_config-&gt;pch_pfit.force_thru));</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "ips: %i, double wide: %i, drrs: %i\n",</div><div class='del'>-		    pipe_config-&gt;ips_enabled, pipe_config-&gt;double_wide,</div><div class='del'>-		    pipe_config-&gt;has_drrs);</div><div class='add'>+	drm_printf(&amp;p, "ips: %i, double wide: %i, drrs: %i\n",</div><div class='add'>+		   pipe_config-&gt;ips_enabled, pipe_config-&gt;double_wide,</div><div class='add'>+		   pipe_config-&gt;has_drrs);</div><div class='ctx'> </div><div class='del'>-	intel_dpll_dump_hw_state(i915, &amp;pipe_config-&gt;dpll_hw_state);</div><div class='add'>+	intel_dpll_dump_hw_state(i915, &amp;p, &amp;pipe_config-&gt;dpll_hw_state);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CHERRYVIEW(i915))</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "cgm_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n",</div><div class='del'>-			    pipe_config-&gt;cgm_mode, pipe_config-&gt;gamma_mode,</div><div class='del'>-			    pipe_config-&gt;gamma_enable, pipe_config-&gt;csc_enable);</div><div class='add'>+		drm_printf(&amp;p, "cgm_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n",</div><div class='add'>+			   pipe_config-&gt;cgm_mode, pipe_config-&gt;gamma_mode,</div><div class='add'>+			   pipe_config-&gt;gamma_enable, pipe_config-&gt;csc_enable);</div><div class='ctx'> 	else</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "csc_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n",</div><div class='del'>-			    pipe_config-&gt;csc_mode, pipe_config-&gt;gamma_mode,</div><div class='del'>-			    pipe_config-&gt;gamma_enable, pipe_config-&gt;csc_enable);</div><div class='del'>-</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "pre csc lut: %s%d entries, post csc lut: %d entries\n",</div><div class='del'>-		    pipe_config-&gt;pre_csc_lut &amp;&amp; pipe_config-&gt;pre_csc_lut ==</div><div class='del'>-		    i915-&gt;display.color.glk_linear_degamma_lut ? "(linear) " : "",</div><div class='del'>-		    pipe_config-&gt;pre_csc_lut ?</div><div class='del'>-		    drm_color_lut_size(pipe_config-&gt;pre_csc_lut) : 0,</div><div class='del'>-		    pipe_config-&gt;post_csc_lut ?</div><div class='del'>-		    drm_color_lut_size(pipe_config-&gt;post_csc_lut) : 0);</div><div class='add'>+		drm_printf(&amp;p, "csc_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n",</div><div class='add'>+			   pipe_config-&gt;csc_mode, pipe_config-&gt;gamma_mode,</div><div class='add'>+			   pipe_config-&gt;gamma_enable, pipe_config-&gt;csc_enable);</div><div class='add'>+</div><div class='add'>+	drm_printf(&amp;p, "pre csc lut: %s%d entries, post csc lut: %d entries\n",</div><div class='add'>+		   pipe_config-&gt;pre_csc_lut &amp;&amp; pipe_config-&gt;pre_csc_lut ==</div><div class='add'>+		   i915-&gt;display.color.glk_linear_degamma_lut ? "(linear) " : "",</div><div class='add'>+		   pipe_config-&gt;pre_csc_lut ?</div><div class='add'>+		   drm_color_lut_size(pipe_config-&gt;pre_csc_lut) : 0,</div><div class='add'>+		   pipe_config-&gt;post_csc_lut ?</div><div class='add'>+		   drm_color_lut_size(pipe_config-&gt;post_csc_lut) : 0);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 11)</div><div class='del'>-		ilk_dump_csc(i915, "output csc", &amp;pipe_config-&gt;output_csc);</div><div class='add'>+		ilk_dump_csc(i915, &amp;p, "output csc", &amp;pipe_config-&gt;output_csc);</div><div class='ctx'> </div><div class='ctx'> 	if (!HAS_GMCH(i915))</div><div class='del'>-		ilk_dump_csc(i915, "pipe csc", &amp;pipe_config-&gt;csc);</div><div class='add'>+		ilk_dump_csc(i915, &amp;p, "pipe csc", &amp;pipe_config-&gt;csc);</div><div class='ctx'> 	else if (IS_CHERRYVIEW(i915))</div><div class='del'>-		vlv_dump_csc(i915, "cgm csc", &amp;pipe_config-&gt;csc);</div><div class='add'>+		vlv_dump_csc(&amp;p, "cgm csc", &amp;pipe_config-&gt;csc);</div><div class='ctx'> 	else if (IS_VALLEYVIEW(i915))</div><div class='del'>-		vlv_dump_csc(i915, "wgc csc", &amp;pipe_config-&gt;csc);</div><div class='add'>+		vlv_dump_csc(&amp;p, "wgc csc", &amp;pipe_config-&gt;csc);</div><div class='ctx'> </div><div class='ctx'> dump_planes:</div><div class='ctx'> 	if (!state)</div><div class='hunk'>@@ -393,6 +374,6 @@ dump_planes:</div><div class='ctx'> </div><div class='ctx'> 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {</div><div class='ctx'> 		if (plane-&gt;pipe == crtc-&gt;pipe)</div><div class='del'>-			intel_dump_plane_state(plane_state);</div><div class='add'>+			intel_dump_plane_state(&amp;p, plane_state);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c<br/>index 0d3da55e1c24..23a122ee20c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cursor.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cursor.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cursor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_cursor.c</a></div><div class='hunk'>@@ -509,6 +509,24 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane,</div><div class='ctx'> 	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane-&gt;id), 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wa_16021440873(struct intel_plane *plane,</div><div class='add'>+			   const struct intel_crtc_state *crtc_state,</div><div class='add'>+			   const struct intel_plane_state *plane_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(plane-&gt;base.dev);</div><div class='add'>+	u32 ctl = plane_state-&gt;ctl;</div><div class='add'>+	int et_y_position = drm_rect_height(&amp;crtc_state-&gt;pipe_src) + 1;</div><div class='add'>+	enum pipe pipe = plane-&gt;pipe;</div><div class='add'>+</div><div class='add'>+	ctl &amp;= ~MCURSOR_MODE_MASK;</div><div class='add'>+	ctl |= MCURSOR_MODE_64_2B;</div><div class='add'>+</div><div class='add'>+	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane-&gt;id), ctl);</div><div class='add'>+</div><div class='add'>+	intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),</div><div class='add'>+		       PIPESRC_HEIGHT(et_y_position));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,</div><div class='ctx'> 					     const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 					     const struct intel_plane_state *plane_state)</div><div class='hunk'>@@ -529,7 +547,11 @@ static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,</div><div class='ctx'> 		intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane-&gt;id),</div><div class='ctx'> 				  plane_state-&gt;ctl);</div><div class='ctx'> 	} else {</div><div class='del'>-		i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state);</div><div class='add'>+		/* Wa_16021440873 */</div><div class='add'>+		if (crtc_state-&gt;enable_psr2_su_region_et)</div><div class='add'>+			wa_16021440873(plane, crtc_state, plane_state);</div><div class='add'>+		else</div><div class='add'>+			i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -821,6 +843,28 @@ static const struct drm_plane_funcs intel_cursor_plane_funcs = {</div><div class='ctx'> 	.format_mod_supported = intel_cursor_format_mod_supported,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void intel_cursor_add_size_hints_property(struct intel_plane *plane)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(plane-&gt;base.dev);</div><div class='add'>+	const struct drm_mode_config *config = &amp;i915-&gt;drm.mode_config;</div><div class='add'>+	struct drm_plane_size_hint hints[4];</div><div class='add'>+	int size, max_size, num_hints = 0;</div><div class='add'>+</div><div class='add'>+	max_size = min(config-&gt;cursor_width, config-&gt;cursor_height);</div><div class='add'>+</div><div class='add'>+	/* for simplicity only enumerate the supported square+POT sizes */</div><div class='add'>+	for (size = 64; size &lt;= max_size; size *= 2) {</div><div class='add'>+		if (drm_WARN_ON(&amp;i915-&gt;drm, num_hints &gt;= ARRAY_SIZE(hints)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		hints[num_hints].width = size;</div><div class='add'>+		hints[num_hints].height = size;</div><div class='add'>+		num_hints++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_plane_add_size_hints_property(&amp;plane-&gt;base, hints, num_hints);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct intel_plane *</div><div class='ctx'> intel_cursor_plane_create(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			  enum pipe pipe)</div><div class='hunk'>@@ -879,6 +923,8 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,</div><div class='ctx'> 						   DRM_MODE_ROTATE_0 |</div><div class='ctx'> 						   DRM_MODE_ROTATE_180);</div><div class='ctx'> </div><div class='add'>+	intel_cursor_add_size_hints_property(cursor);</div><div class='add'>+</div><div class='ctx'> 	zpos = DISPLAY_RUNTIME_INFO(dev_priv)-&gt;num_sprites[pipe] + 1;</div><div class='ctx'> 	drm_plane_create_zpos_immutable_property(&amp;cursor-&gt;base, zpos);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c<br/>index 64e0f820a789..8e3b13884bb8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cx0_phy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cx0_phy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cx0_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_cx0_phy.c</a></div><div class='hunk'>@@ -29,8 +29,11 @@</div><div class='ctx'> #define INTEL_CX0_LANE1		BIT(1)</div><div class='ctx'> #define INTEL_CX0_BOTH_LANES	(INTEL_CX0_LANE1 | INTEL_CX0_LANE0)</div><div class='ctx'> </div><div class='del'>-bool intel_is_c10phy(struct drm_i915_private *i915, enum phy phy)</div><div class='add'>+bool intel_encoder_is_c10phy(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='add'>+</div><div class='ctx'> 	if ((IS_LUNARLAKE(i915) || IS_METEORLAKE(i915)) &amp;&amp; phy &lt; PHY_C)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='hunk'>@@ -46,8 +49,7 @@ static int lane_mask_to_lane(u8 lane_mask)</div><div class='ctx'> 	return ilog2(lane_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 intel_cx0_get_owned_lane_mask(struct drm_i915_private *i915,</div><div class='del'>-					struct intel_encoder *encoder)</div><div class='add'>+static u8 intel_cx0_get_owned_lane_mask(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='ctx'> </div><div class='hunk'>@@ -114,16 +116,20 @@ static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, intel_w</div><div class='ctx'> 	intel_display_power_put(i915, POWER_DOMAIN_DC_OFF, wakeref);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_clear_response_ready_flag(struct drm_i915_private *i915,</div><div class='del'>-					    enum port port, int lane)</div><div class='add'>+static void intel_clear_response_ready_flag(struct intel_encoder *encoder,</div><div class='add'>+					    int lane)</div><div class='ctx'> {</div><div class='del'>-	intel_de_rmw(i915, XELPDP_PORT_P2M_MSGBUS_STATUS(i915, port, lane),</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	intel_de_rmw(i915, XELPDP_PORT_P2M_MSGBUS_STATUS(i915, encoder-&gt;port, lane),</div><div class='ctx'> 		     0, XELPDP_PORT_P2M_RESPONSE_READY | XELPDP_PORT_P2M_ERROR_SET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cx0_bus_reset(struct drm_i915_private *i915, enum port port, int lane)</div><div class='add'>+static void intel_cx0_bus_reset(struct intel_encoder *encoder, int lane)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write(i915, XELPDP_PORT_M2P_MSGBUS_CTL(i915, port, lane),</div><div class='ctx'> 		       XELPDP_PORT_M2P_TRANSACTION_RESET);</div><div class='hunk'>@@ -135,20 +141,22 @@ static void intel_cx0_bus_reset(struct drm_i915_private *i915, enum port port, i</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_clear_response_ready_flag(i915, port, lane);</div><div class='add'>+	intel_clear_response_ready_flag(encoder, lane);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int intel_cx0_wait_for_ack(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static int intel_cx0_wait_for_ack(struct intel_encoder *encoder,</div><div class='ctx'> 				  int command, int lane, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='del'>-</div><div class='del'>-	if (__intel_de_wait_for_register(i915,</div><div class='del'>-					 XELPDP_PORT_P2M_MSGBUS_STATUS(i915, port, lane),</div><div class='del'>-					 XELPDP_PORT_P2M_RESPONSE_READY,</div><div class='del'>-					 XELPDP_PORT_P2M_RESPONSE_READY,</div><div class='del'>-					 XELPDP_MSGBUS_TIMEOUT_FAST_US,</div><div class='del'>-					 XELPDP_MSGBUS_TIMEOUT_SLOW, val)) {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='add'>+</div><div class='add'>+	if (intel_de_wait_custom(i915,</div><div class='add'>+				 XELPDP_PORT_P2M_MSGBUS_STATUS(i915, port, lane),</div><div class='add'>+				 XELPDP_PORT_P2M_RESPONSE_READY,</div><div class='add'>+				 XELPDP_PORT_P2M_RESPONSE_READY,</div><div class='add'>+				 XELPDP_MSGBUS_TIMEOUT_FAST_US,</div><div class='add'>+				 XELPDP_MSGBUS_TIMEOUT_SLOW, val)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm, "PHY %c Timeout waiting for message ACK. Status: 0x%x\n",</div><div class='ctx'> 			    phy_name(phy), *val);</div><div class='ctx'> </div><div class='hunk'>@@ -158,31 +166,33 @@ static int intel_cx0_wait_for_ack(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 				    "PHY %c Hardware did not detect a timeout\n",</div><div class='ctx'> 				    phy_name(phy));</div><div class='ctx'> </div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*val &amp; XELPDP_PORT_P2M_ERROR_SET) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm, "PHY %c Error occurred during %s command. Status: 0x%x\n", phy_name(phy),</div><div class='ctx'> 			    command == XELPDP_PORT_P2M_COMMAND_READ_ACK ? "read" : "write", *val);</div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (REG_FIELD_GET(XELPDP_PORT_P2M_COMMAND_TYPE_MASK, *val) != command) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm, "PHY %c Not a %s response. MSGBUS Status: 0x%x.\n", phy_name(phy),</div><div class='ctx'> 			    command == XELPDP_PORT_P2M_COMMAND_READ_ACK ? "read" : "write", *val);</div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __intel_cx0_read_once(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static int __intel_cx0_read_once(struct intel_encoder *encoder,</div><div class='ctx'> 				 int lane, u16 addr)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	int ack;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +201,7 @@ static int __intel_cx0_read_once(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 				    XELPDP_MSGBUS_TIMEOUT_SLOW)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "PHY %c Timeout waiting for previous transaction to complete. Reset the bus and retry.\n", phy_name(phy));</div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -200,33 +210,34 @@ static int __intel_cx0_read_once(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 		       XELPDP_PORT_M2P_COMMAND_READ |</div><div class='ctx'> 		       XELPDP_PORT_M2P_ADDRESS(addr));</div><div class='ctx'> </div><div class='del'>-	ack = intel_cx0_wait_for_ack(i915, port, XELPDP_PORT_P2M_COMMAND_READ_ACK, lane, &amp;val);</div><div class='add'>+	ack = intel_cx0_wait_for_ack(encoder, XELPDP_PORT_P2M_COMMAND_READ_ACK, lane, &amp;val);</div><div class='ctx'> 	if (ack &lt; 0)</div><div class='ctx'> 		return ack;</div><div class='ctx'> </div><div class='del'>-	intel_clear_response_ready_flag(i915, port, lane);</div><div class='add'>+	intel_clear_response_ready_flag(encoder, lane);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME: Workaround to let HW to settle</div><div class='ctx'> 	 * down and let the message bus to end up</div><div class='ctx'> 	 * in a known state</div><div class='ctx'> 	 */</div><div class='del'>-	intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+	intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> </div><div class='ctx'> 	return REG_FIELD_GET(XELPDP_PORT_P2M_DATA_MASK, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 __intel_cx0_read(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static u8 __intel_cx0_read(struct intel_encoder *encoder,</div><div class='ctx'> 			   int lane, u16 addr)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	int i, status;</div><div class='ctx'> </div><div class='ctx'> 	assert_dc_off(i915);</div><div class='ctx'> </div><div class='ctx'> 	/* 3 tries is assumed to be enough to read successfully */</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		status = __intel_cx0_read_once(i915, port, lane, addr);</div><div class='add'>+		status = __intel_cx0_read_once(encoder, lane, addr);</div><div class='ctx'> </div><div class='ctx'> 		if (status &gt;= 0)</div><div class='ctx'> 			return status;</div><div class='hunk'>@@ -238,18 +249,20 @@ static u8 __intel_cx0_read(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 intel_cx0_read(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static u8 intel_cx0_read(struct intel_encoder *encoder,</div><div class='ctx'> 			 u8 lane_mask, u16 addr)</div><div class='ctx'> {</div><div class='ctx'> 	int lane = lane_mask_to_lane(lane_mask);</div><div class='ctx'> </div><div class='del'>-	return __intel_cx0_read(i915, port, lane, addr);</div><div class='add'>+	return __intel_cx0_read(encoder, lane, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __intel_cx0_write_once(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static int __intel_cx0_write_once(struct intel_encoder *encoder,</div><div class='ctx'> 				  int lane, u16 addr, u8 data, bool committed)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	int ack;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -258,7 +271,7 @@ static int __intel_cx0_write_once(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 				    XELPDP_MSGBUS_TIMEOUT_SLOW)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "PHY %c Timeout waiting for previous transaction to complete. Resetting the bus.\n", phy_name(phy));</div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -274,45 +287,46 @@ static int __intel_cx0_write_once(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 				    XELPDP_MSGBUS_TIMEOUT_SLOW)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "PHY %c Timeout waiting for write to complete. Resetting the bus.\n", phy_name(phy));</div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (committed) {</div><div class='del'>-		ack = intel_cx0_wait_for_ack(i915, port, XELPDP_PORT_P2M_COMMAND_WRITE_ACK, lane, &amp;val);</div><div class='add'>+		ack = intel_cx0_wait_for_ack(encoder, XELPDP_PORT_P2M_COMMAND_WRITE_ACK, lane, &amp;val);</div><div class='ctx'> 		if (ack &lt; 0)</div><div class='ctx'> 			return ack;</div><div class='ctx'> 	} else if ((intel_de_read(i915, XELPDP_PORT_P2M_MSGBUS_STATUS(i915, port, lane)) &amp;</div><div class='ctx'> 		    XELPDP_PORT_P2M_ERROR_SET)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "PHY %c Error occurred during write command.\n", phy_name(phy));</div><div class='del'>-		intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+		intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_clear_response_ready_flag(i915, port, lane);</div><div class='add'>+	intel_clear_response_ready_flag(encoder, lane);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME: Workaround to let HW to settle</div><div class='ctx'> 	 * down and let the message bus to end up</div><div class='ctx'> 	 * in a known state</div><div class='ctx'> 	 */</div><div class='del'>-	intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+	intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __intel_cx0_write(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static void __intel_cx0_write(struct intel_encoder *encoder,</div><div class='ctx'> 			      int lane, u16 addr, u8 data, bool committed)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	int i, status;</div><div class='ctx'> </div><div class='ctx'> 	assert_dc_off(i915);</div><div class='ctx'> </div><div class='ctx'> 	/* 3 tries is assumed to be enough to write successfully */</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		status = __intel_cx0_write_once(i915, port, lane, addr, data, committed);</div><div class='add'>+		status = __intel_cx0_write_once(encoder, lane, addr, data, committed);</div><div class='ctx'> </div><div class='ctx'> 		if (status == 0)</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -322,63 +336,66 @@ static void __intel_cx0_write(struct drm_i915_private *i915, enum port port,</div><div class='ctx'> 		     "PHY %c Write %04x failed after %d retries.\n", phy_name(phy), addr, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cx0_write(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static void intel_cx0_write(struct intel_encoder *encoder,</div><div class='ctx'> 			    u8 lane_mask, u16 addr, u8 data, bool committed)</div><div class='ctx'> {</div><div class='ctx'> 	int lane;</div><div class='ctx'> </div><div class='ctx'> 	for_each_cx0_lane_in_mask(lane_mask, lane)</div><div class='del'>-		__intel_cx0_write(i915, port, lane, addr, data, committed);</div><div class='add'>+		__intel_cx0_write(encoder, lane, addr, data, committed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_c20_sram_write(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static void intel_c20_sram_write(struct intel_encoder *encoder,</div><div class='ctx'> 				 int lane, u16 addr, u16 data)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='ctx'> 	assert_dc_off(i915);</div><div class='ctx'> </div><div class='del'>-	intel_cx0_write(i915, port, lane, PHY_C20_WR_ADDRESS_H, addr &gt;&gt; 8, 0);</div><div class='del'>-	intel_cx0_write(i915, port, lane, PHY_C20_WR_ADDRESS_L, addr &amp; 0xff, 0);</div><div class='add'>+	intel_cx0_write(encoder, lane, PHY_C20_WR_ADDRESS_H, addr &gt;&gt; 8, 0);</div><div class='add'>+	intel_cx0_write(encoder, lane, PHY_C20_WR_ADDRESS_L, addr &amp; 0xff, 0);</div><div class='ctx'> </div><div class='del'>-	intel_cx0_write(i915, port, lane, PHY_C20_WR_DATA_H, data &gt;&gt; 8, 0);</div><div class='del'>-	intel_cx0_write(i915, port, lane, PHY_C20_WR_DATA_L, data &amp; 0xff, 1);</div><div class='add'>+	intel_cx0_write(encoder, lane, PHY_C20_WR_DATA_H, data &gt;&gt; 8, 0);</div><div class='add'>+	intel_cx0_write(encoder, lane, PHY_C20_WR_DATA_L, data &amp; 0xff, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u16 intel_c20_sram_read(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static u16 intel_c20_sram_read(struct intel_encoder *encoder,</div><div class='ctx'> 			       int lane, u16 addr)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	u16 val;</div><div class='ctx'> </div><div class='ctx'> 	assert_dc_off(i915);</div><div class='ctx'> </div><div class='del'>-	intel_cx0_write(i915, port, lane, PHY_C20_RD_ADDRESS_H, addr &gt;&gt; 8, 0);</div><div class='del'>-	intel_cx0_write(i915, port, lane, PHY_C20_RD_ADDRESS_L, addr &amp; 0xff, 1);</div><div class='add'>+	intel_cx0_write(encoder, lane, PHY_C20_RD_ADDRESS_H, addr &gt;&gt; 8, 0);</div><div class='add'>+	intel_cx0_write(encoder, lane, PHY_C20_RD_ADDRESS_L, addr &amp; 0xff, 1);</div><div class='ctx'> </div><div class='del'>-	val = intel_cx0_read(i915, port, lane, PHY_C20_RD_DATA_H);</div><div class='add'>+	val = intel_cx0_read(encoder, lane, PHY_C20_RD_DATA_H);</div><div class='ctx'> 	val &lt;&lt;= 8;</div><div class='del'>-	val |= intel_cx0_read(i915, port, lane, PHY_C20_RD_DATA_L);</div><div class='add'>+	val |= intel_cx0_read(encoder, lane, PHY_C20_RD_DATA_L);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __intel_cx0_rmw(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static void __intel_cx0_rmw(struct intel_encoder *encoder,</div><div class='ctx'> 			    int lane, u16 addr, u8 clear, u8 set, bool committed)</div><div class='ctx'> {</div><div class='ctx'> 	u8 old, val;</div><div class='ctx'> </div><div class='del'>-	old = __intel_cx0_read(i915, port, lane, addr);</div><div class='add'>+	old = __intel_cx0_read(encoder, lane, addr);</div><div class='ctx'> 	val = (old &amp; ~clear) | set;</div><div class='ctx'> </div><div class='ctx'> 	if (val != old)</div><div class='del'>-		__intel_cx0_write(i915, port, lane, addr, val, committed);</div><div class='add'>+		__intel_cx0_write(encoder, lane, addr, val, committed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cx0_rmw(struct drm_i915_private *i915, enum port port,</div><div class='add'>+static void intel_cx0_rmw(struct intel_encoder *encoder,</div><div class='ctx'> 			  u8 lane_mask, u16 addr, u8 clear, u8 set, bool committed)</div><div class='ctx'> {</div><div class='ctx'> 	u8 lane;</div><div class='ctx'> </div><div class='ctx'> 	for_each_cx0_lane_in_mask(lane_mask, lane)</div><div class='del'>-		__intel_cx0_rmw(i915, port, lane, addr, clear, set, committed);</div><div class='add'>+		__intel_cx0_rmw(encoder, lane, addr, clear, set, committed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u8 intel_c10_get_tx_vboost_lvl(const struct intel_crtc_state *crtc_state)</div><div class='hunk'>@@ -414,7 +431,6 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_ddi_buf_trans *trans;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='ctx'> 	u8 owned_lane_mask;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	int n_entries, ln;</div><div class='hunk'>@@ -423,7 +439,7 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 	if (intel_tc_port_in_tbt_alt_mode(dig_port))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);</div><div class='add'>+	owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);</div><div class='ctx'> </div><div class='ctx'> 	wakeref = intel_cx0_phy_transaction_begin(encoder);</div><div class='ctx'> </div><div class='hunk'>@@ -433,14 +449,14 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, phy)) {</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, owned_lane_mask, PHY_C10_VDR_CONTROL(1),</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder)) {</div><div class='add'>+		intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1),</div><div class='ctx'> 			      0, C10_VDR_CTRL_MSGBUS_ACCESS, MB_WRITE_COMMITTED);</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, owned_lane_mask, PHY_C10_VDR_CMN(3),</div><div class='add'>+		intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CMN(3),</div><div class='ctx'> 			      C10_CMN3_TXVBOOST_MASK,</div><div class='ctx'> 			      C10_CMN3_TXVBOOST(intel_c10_get_tx_vboost_lvl(crtc_state)),</div><div class='ctx'> 			      MB_WRITE_UNCOMMITTED);</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, owned_lane_mask, PHY_C10_VDR_TX(1),</div><div class='add'>+		intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_TX(1),</div><div class='ctx'> 			      C10_TX1_TERMCTL_MASK,</div><div class='ctx'> 			      C10_TX1_TERMCTL(intel_c10_get_tx_term_ctl(crtc_state)),</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='hunk'>@@ -455,27 +471,27 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 		if (!(lane_mask &amp; owned_lane_mask))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 0),</div><div class='add'>+		intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 0),</div><div class='ctx'> 			      C10_PHY_OVRD_LEVEL_MASK,</div><div class='ctx'> 			      C10_PHY_OVRD_LEVEL(trans-&gt;entries[level].snps.pre_cursor),</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 1),</div><div class='add'>+		intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 1),</div><div class='ctx'> 			      C10_PHY_OVRD_LEVEL_MASK,</div><div class='ctx'> 			      C10_PHY_OVRD_LEVEL(trans-&gt;entries[level].snps.vswing),</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 2),</div><div class='add'>+		intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 2),</div><div class='ctx'> 			      C10_PHY_OVRD_LEVEL_MASK,</div><div class='ctx'> 			      C10_PHY_OVRD_LEVEL(trans-&gt;entries[level].snps.post_cursor),</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write Override enables in 0xD71 */</div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, owned_lane_mask, PHY_C10_VDR_OVRD,</div><div class='add'>+	intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_OVRD,</div><div class='ctx'> 		      0, PHY_C10_VDR_OVRD_TX1 | PHY_C10_VDR_OVRD_TX2,</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, owned_lane_mask, PHY_C10_VDR_CONTROL(1),</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='add'>+		intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1),</div><div class='ctx'> 			      0, C10_VDR_CTRL_UPDATE_CFG, MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='ctx'> 	intel_cx0_phy_transaction_end(encoder, wakeref);</div><div class='hunk'>@@ -1811,7 +1827,7 @@ static void intel_c10pll_update_pll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 				    struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_cx0pll_state *pll_state = &amp;crtc_state-&gt;cx0pll_state;</div><div class='add'>+	struct intel_cx0pll_state *pll_state = &amp;crtc_state-&gt;dpll_hw_state.cx0pll;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_dp_encoder(crtc_state)) {</div><div class='hunk'>@@ -1843,7 +1859,7 @@ static int intel_c10pll_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; tables[i]; i++) {</div><div class='ctx'> 		if (crtc_state-&gt;port_clock == tables[i]-&gt;clock) {</div><div class='del'>-			crtc_state-&gt;cx0pll_state.c10 = *tables[i];</div><div class='add'>+			crtc_state-&gt;dpll_hw_state.cx0pll.c10 = *tables[i];</div><div class='ctx'> 			intel_c10pll_update_pll(crtc_state, encoder);</div><div class='ctx'> </div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1856,7 +1872,6 @@ static int intel_c10pll_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 					  struct intel_c10pll_state *pll_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	u8 lane = INTEL_CX0_LANE0;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1867,16 +1882,15 @@ static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 	 * According to C10 VDR Register programming Sequence we need</div><div class='ctx'> 	 * to do this to read PHY internal registers from MsgBus.</div><div class='ctx'> 	 */</div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, lane, PHY_C10_VDR_CONTROL(1),</div><div class='add'>+	intel_cx0_rmw(encoder, lane, PHY_C10_VDR_CONTROL(1),</div><div class='ctx'> 		      0, C10_VDR_CTRL_MSGBUS_ACCESS,</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;pll); i++)</div><div class='del'>-		pll_state-&gt;pll[i] = intel_cx0_read(i915, encoder-&gt;port, lane,</div><div class='del'>-						   PHY_C10_VDR_PLL(i));</div><div class='add'>+		pll_state-&gt;pll[i] = intel_cx0_read(encoder, lane, PHY_C10_VDR_PLL(i));</div><div class='ctx'> </div><div class='del'>-	pll_state-&gt;cmn = intel_cx0_read(i915, encoder-&gt;port, lane, PHY_C10_VDR_CMN(0));</div><div class='del'>-	pll_state-&gt;tx = intel_cx0_read(i915, encoder-&gt;port, lane, PHY_C10_VDR_TX(0));</div><div class='add'>+	pll_state-&gt;cmn = intel_cx0_read(encoder, lane, PHY_C10_VDR_CMN(0));</div><div class='add'>+	pll_state-&gt;tx = intel_cx0_read(encoder, lane, PHY_C10_VDR_TX(0));</div><div class='ctx'> </div><div class='ctx'> 	intel_cx0_phy_transaction_end(encoder, wakeref);</div><div class='ctx'> }</div><div class='hunk'>@@ -1885,31 +1899,31 @@ static void intel_c10_pll_program(struct drm_i915_private *i915,</div><div class='ctx'> 				  const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 				  struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	const struct intel_c10pll_state *pll_state = &amp;crtc_state-&gt;cx0pll_state.c10;</div><div class='add'>+	const struct intel_c10pll_state *pll_state = &amp;crtc_state-&gt;dpll_hw_state.cx0pll.c10;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1),</div><div class='add'>+	intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1),</div><div class='ctx'> 		      0, C10_VDR_CTRL_MSGBUS_ACCESS,</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='ctx'> 	/* Custom width needs to be programmed to 0 for both the phy lanes */</div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH,</div><div class='add'>+	intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH,</div><div class='ctx'> 		      C10_VDR_CUSTOM_WIDTH_MASK, C10_VDR_CUSTOM_WIDTH_8_10,</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1),</div><div class='add'>+	intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1),</div><div class='ctx'> 		      0, C10_VDR_CTRL_UPDATE_CFG,</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='ctx'> 	/* Program the pll values only for the master lane */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;pll); i++)</div><div class='del'>-		intel_cx0_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C10_VDR_PLL(i),</div><div class='add'>+		intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_PLL(i),</div><div class='ctx'> 				pll_state-&gt;pll[i],</div><div class='ctx'> 				(i % 4) ? MB_WRITE_UNCOMMITTED : MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='del'>-	intel_cx0_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C10_VDR_CMN(0), pll_state-&gt;cmn, MB_WRITE_COMMITTED);</div><div class='del'>-	intel_cx0_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C10_VDR_TX(0), pll_state-&gt;tx, MB_WRITE_COMMITTED);</div><div class='add'>+	intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CMN(0), pll_state-&gt;cmn, MB_WRITE_COMMITTED);</div><div class='add'>+	intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_TX(0), pll_state-&gt;tx, MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C10_VDR_CONTROL(1),</div><div class='add'>+	intel_cx0_rmw(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CONTROL(1),</div><div class='ctx'> 		      0, C10_VDR_CTRL_MASTER_LANE | C10_VDR_CTRL_UPDATE_CFG,</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='ctx'> }</div><div class='hunk'>@@ -2037,10 +2051,8 @@ static int intel_c20_phy_check_hdmi_link_rate(int clock)</div><div class='ctx'> int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_digital_port *dig_port = hdmi_to_dig_port(hdmi);</div><div class='del'>-	struct drm_i915_private *i915 = intel_hdmi_to_i915(hdmi);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(&amp;dig_port-&gt;base))</div><div class='ctx'> 		return intel_c10_phy_check_hdmi_link_rate(clock);</div><div class='ctx'> 	return intel_c20_phy_check_hdmi_link_rate(clock);</div><div class='ctx'> }</div><div class='hunk'>@@ -2067,7 +2079,7 @@ static int intel_c20pll_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	/* try computed C20 HDMI tables before using consolidated tables */</div><div class='ctx'> 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {</div><div class='ctx'> 		if (intel_c20_compute_hdmi_tmds_pll(crtc_state-&gt;port_clock,</div><div class='del'>-						    &amp;crtc_state-&gt;cx0pll_state.c20) == 0)</div><div class='add'>+						    &amp;crtc_state-&gt;dpll_hw_state.cx0pll.c20) == 0)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2077,7 +2089,7 @@ static int intel_c20pll_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; tables[i]; i++) {</div><div class='ctx'> 		if (crtc_state-&gt;port_clock == tables[i]-&gt;clock) {</div><div class='del'>-			crtc_state-&gt;cx0pll_state.c20 = *tables[i];</div><div class='add'>+			crtc_state-&gt;dpll_hw_state.cx0pll.c20 = *tables[i];</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2088,10 +2100,7 @@ static int intel_c20pll_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			    struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		return intel_c10pll_calc_state(crtc_state, encoder);</div><div class='ctx'> 	return intel_c20pll_calc_state(crtc_state, encoder);</div><div class='ctx'> }</div><div class='hunk'>@@ -2149,7 +2158,6 @@ static int intel_c20pll_calc_port_clock(struct intel_encoder *encoder,</div><div class='ctx'> static void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 					  struct intel_c20pll_state *pll_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	bool cntx;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -2157,25 +2165,25 @@ static void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 	wakeref = intel_cx0_phy_transaction_begin(encoder);</div><div class='ctx'> </div><div class='ctx'> 	/* 1. Read current context selection */</div><div class='del'>-	cntx = intel_cx0_read(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C20_VDR_CUSTOM_SERDES_RATE) &amp; PHY_C20_CONTEXT_TOGGLE;</div><div class='add'>+	cntx = intel_cx0_read(encoder, INTEL_CX0_LANE0, PHY_C20_VDR_CUSTOM_SERDES_RATE) &amp; PHY_C20_CONTEXT_TOGGLE;</div><div class='ctx'> </div><div class='ctx'> 	/* Read Tx configuration */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;tx); i++) {</div><div class='ctx'> 		if (cntx)</div><div class='del'>-			pll_state-&gt;tx[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+			pll_state-&gt;tx[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 							       PHY_C20_B_TX_CNTX_CFG(i));</div><div class='ctx'> 		else</div><div class='del'>-			pll_state-&gt;tx[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+			pll_state-&gt;tx[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 							       PHY_C20_A_TX_CNTX_CFG(i));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read common configuration */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;cmn); i++) {</div><div class='ctx'> 		if (cntx)</div><div class='del'>-			pll_state-&gt;cmn[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+			pll_state-&gt;cmn[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 								PHY_C20_B_CMN_CNTX_CFG(i));</div><div class='ctx'> 		else</div><div class='del'>-			pll_state-&gt;cmn[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+			pll_state-&gt;cmn[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 								PHY_C20_A_CMN_CNTX_CFG(i));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2183,20 +2191,20 @@ static void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 		/* MPLLB configuration */</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;mpllb); i++) {</div><div class='ctx'> 			if (cntx)</div><div class='del'>-				pll_state-&gt;mpllb[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				pll_state-&gt;mpllb[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 									  PHY_C20_B_MPLLB_CNTX_CFG(i));</div><div class='ctx'> 			else</div><div class='del'>-				pll_state-&gt;mpllb[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				pll_state-&gt;mpllb[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 									  PHY_C20_A_MPLLB_CNTX_CFG(i));</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* MPLLA configuration */</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;mplla); i++) {</div><div class='ctx'> 			if (cntx)</div><div class='del'>-				pll_state-&gt;mplla[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				pll_state-&gt;mplla[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 									  PHY_C20_B_MPLLA_CNTX_CFG(i));</div><div class='ctx'> 			else</div><div class='del'>-				pll_state-&gt;mplla[i] = intel_c20_sram_read(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				pll_state-&gt;mplla[i] = intel_c20_sram_read(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 									  PHY_C20_A_MPLLA_CNTX_CFG(i));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2327,7 +2335,7 @@ static void intel_c20_pll_program(struct drm_i915_private *i915,</div><div class='ctx'> 				  const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 				  struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	const struct intel_c20pll_state *pll_state = &amp;crtc_state-&gt;cx0pll_state.c20;</div><div class='add'>+	const struct intel_c20pll_state *pll_state = &amp;crtc_state-&gt;dpll_hw_state.cx0pll.c20;</div><div class='ctx'> 	bool dp = false;</div><div class='ctx'> 	int lane = crtc_state-&gt;lane_count &gt; 2 ? INTEL_CX0_BOTH_LANES : INTEL_CX0_LANE0;</div><div class='ctx'> 	u32 clock = crtc_state-&gt;port_clock;</div><div class='hunk'>@@ -2338,7 +2346,7 @@ static void intel_c20_pll_program(struct drm_i915_private *i915,</div><div class='ctx'> 		dp = true;</div><div class='ctx'> </div><div class='ctx'> 	/* 1. Read current context selection */</div><div class='del'>-	cntx = intel_cx0_read(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C20_VDR_CUSTOM_SERDES_RATE) &amp; BIT(0);</div><div class='add'>+	cntx = intel_cx0_read(encoder, INTEL_CX0_LANE0, PHY_C20_VDR_CUSTOM_SERDES_RATE) &amp; BIT(0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 2. If there is a protocol switch from HDMI to DP or vice versa, clear</div><div class='hunk'>@@ -2347,7 +2355,7 @@ static void intel_c20_pll_program(struct drm_i915_private *i915,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (intel_c20_protocol_switch_valid(encoder)) {</div><div class='ctx'> 		for (i = 0; i &lt; 4; i++)</div><div class='del'>-			intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, RAWLANEAONX_DIG_TX_MPLLB_CAL_DONE_BANK(i), 0);</div><div class='add'>+			intel_c20_sram_write(encoder, INTEL_CX0_LANE0, RAWLANEAONX_DIG_TX_MPLLB_CAL_DONE_BANK(i), 0);</div><div class='ctx'> 		usleep_range(4000, 4100);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2355,63 +2363,63 @@ static void intel_c20_pll_program(struct drm_i915_private *i915,</div><div class='ctx'> 	/* 3.1 Tx configuration */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;tx); i++) {</div><div class='ctx'> 		if (cntx)</div><div class='del'>-			intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C20_A_TX_CNTX_CFG(i), pll_state-&gt;tx[i]);</div><div class='add'>+			intel_c20_sram_write(encoder, INTEL_CX0_LANE0, PHY_C20_A_TX_CNTX_CFG(i), pll_state-&gt;tx[i]);</div><div class='ctx'> 		else</div><div class='del'>-			intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C20_B_TX_CNTX_CFG(i), pll_state-&gt;tx[i]);</div><div class='add'>+			intel_c20_sram_write(encoder, INTEL_CX0_LANE0, PHY_C20_B_TX_CNTX_CFG(i), pll_state-&gt;tx[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 3.2 common configuration */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;cmn); i++) {</div><div class='ctx'> 		if (cntx)</div><div class='del'>-			intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C20_A_CMN_CNTX_CFG(i), pll_state-&gt;cmn[i]);</div><div class='add'>+			intel_c20_sram_write(encoder, INTEL_CX0_LANE0, PHY_C20_A_CMN_CNTX_CFG(i), pll_state-&gt;cmn[i]);</div><div class='ctx'> 		else</div><div class='del'>-			intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0, PHY_C20_B_CMN_CNTX_CFG(i), pll_state-&gt;cmn[i]);</div><div class='add'>+			intel_c20_sram_write(encoder, INTEL_CX0_LANE0, PHY_C20_B_CMN_CNTX_CFG(i), pll_state-&gt;cmn[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 3.3 mpllb or mplla configuration */</div><div class='ctx'> 	if (intel_c20phy_use_mpllb(pll_state)) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;mpllb); i++) {</div><div class='ctx'> 			if (cntx)</div><div class='del'>-				intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				intel_c20_sram_write(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 						     PHY_C20_A_MPLLB_CNTX_CFG(i),</div><div class='ctx'> 						     pll_state-&gt;mpllb[i]);</div><div class='ctx'> 			else</div><div class='del'>-				intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				intel_c20_sram_write(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 						     PHY_C20_B_MPLLB_CNTX_CFG(i),</div><div class='ctx'> 						     pll_state-&gt;mpllb[i]);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(pll_state-&gt;mplla); i++) {</div><div class='ctx'> 			if (cntx)</div><div class='del'>-				intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				intel_c20_sram_write(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 						     PHY_C20_A_MPLLA_CNTX_CFG(i),</div><div class='ctx'> 						     pll_state-&gt;mplla[i]);</div><div class='ctx'> 			else</div><div class='del'>-				intel_c20_sram_write(i915, encoder-&gt;port, INTEL_CX0_LANE0,</div><div class='add'>+				intel_c20_sram_write(encoder, INTEL_CX0_LANE0,</div><div class='ctx'> 						     PHY_C20_B_MPLLA_CNTX_CFG(i),</div><div class='ctx'> 						     pll_state-&gt;mplla[i]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 4. Program custom width to match the link protocol */</div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, lane, PHY_C20_VDR_CUSTOM_WIDTH,</div><div class='add'>+	intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_WIDTH,</div><div class='ctx'> 		      PHY_C20_CUSTOM_WIDTH_MASK,</div><div class='ctx'> 		      PHY_C20_CUSTOM_WIDTH(intel_get_c20_custom_width(clock, dp)),</div><div class='ctx'> 		      MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='ctx'> 	/* 5. For DP or 6. For HDMI */</div><div class='ctx'> 	if (dp) {</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,</div><div class='add'>+		intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,</div><div class='ctx'> 			      BIT(6) | PHY_C20_CUSTOM_SERDES_MASK,</div><div class='ctx'> 			      BIT(6) | PHY_C20_CUSTOM_SERDES(intel_c20_get_dp_rate(clock)),</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='ctx'> 	} else {</div><div class='del'>-		intel_cx0_rmw(i915, encoder-&gt;port, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,</div><div class='add'>+		intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,</div><div class='ctx'> 			      BIT(7) | PHY_C20_CUSTOM_SERDES_MASK,</div><div class='ctx'> 			      is_hdmi_frl(clock) ? BIT(7) : 0,</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='ctx'> </div><div class='del'>-		intel_cx0_write(i915, encoder-&gt;port, INTEL_CX0_BOTH_LANES, PHY_C20_VDR_HDMI_RATE,</div><div class='add'>+		intel_cx0_write(encoder, INTEL_CX0_BOTH_LANES, PHY_C20_VDR_HDMI_RATE,</div><div class='ctx'> 				intel_c20_get_hdmi_rate(clock),</div><div class='ctx'> 				MB_WRITE_COMMITTED);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2420,7 +2428,7 @@ static void intel_c20_pll_program(struct drm_i915_private *i915,</div><div class='ctx'> 	 * 7. Write Vendor specific registers to toggle context setting to load</div><div class='ctx'> 	 * the updated programming toggle context bit</div><div class='ctx'> 	 */</div><div class='del'>-	intel_cx0_rmw(i915, encoder-&gt;port, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,</div><div class='add'>+	intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,</div><div class='ctx'> 		      BIT(0), cntx ? 0 : 1, MB_WRITE_COMMITTED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2476,9 +2484,9 @@ static void intel_program_port_clock_ctl(struct intel_encoder *encoder,</div><div class='ctx'> 	/* TODO: HDMI FRL */</div><div class='ctx'> 	/* DP2.0 10G and 20G rates enable MPLLA*/</div><div class='ctx'> 	if (crtc_state-&gt;port_clock == 1000000 || crtc_state-&gt;port_clock == 2000000)</div><div class='del'>-		val |= crtc_state-&gt;cx0pll_state.ssc_enabled ? XELPDP_SSC_ENABLE_PLLA : 0;</div><div class='add'>+		val |= crtc_state-&gt;dpll_hw_state.cx0pll.ssc_enabled ? XELPDP_SSC_ENABLE_PLLA : 0;</div><div class='ctx'> 	else</div><div class='del'>-		val |= crtc_state-&gt;cx0pll_state.ssc_enabled ? XELPDP_SSC_ENABLE_PLLB : 0;</div><div class='add'>+		val |= crtc_state-&gt;dpll_hw_state.cx0pll.ssc_enabled ? XELPDP_SSC_ENABLE_PLLB : 0;</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='ctx'> 		     XELPDP_LANE1_PHY_CLOCK_SELECT | XELPDP_FORWARD_CLOCK_UNGATE |</div><div class='hunk'>@@ -2508,11 +2516,12 @@ static u32 intel_cx0_get_powerdown_state(u8 lane_mask, u8 state)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cx0_powerdown_change_sequence(struct drm_i915_private *i915,</div><div class='del'>-						enum port port,</div><div class='add'>+static void intel_cx0_powerdown_change_sequence(struct intel_encoder *encoder,</div><div class='ctx'> 						u8 lane_mask, u8 state)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	i915_reg_t buf_ctl2_reg = XELPDP_PORT_BUF_CTL2(i915, port);</div><div class='ctx'> 	int lane;</div><div class='ctx'> </div><div class='hunk'>@@ -2528,7 +2537,7 @@ static void intel_cx0_powerdown_change_sequence(struct drm_i915_private *i915,</div><div class='ctx'> 			drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 				    "PHY %c Timeout waiting for previous transaction to complete. Reset the bus.\n",</div><div class='ctx'> 				    phy_name(phy));</div><div class='del'>-			intel_cx0_bus_reset(i915, port, lane);</div><div class='add'>+			intel_cx0_bus_reset(encoder, lane);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(i915, buf_ctl2_reg,</div><div class='hunk'>@@ -2536,15 +2545,18 @@ static void intel_cx0_powerdown_change_sequence(struct drm_i915_private *i915,</div><div class='ctx'> 		     intel_cx0_get_powerdown_update(lane_mask));</div><div class='ctx'> </div><div class='ctx'> 	/* Update Timeout Value */</div><div class='del'>-	if (__intel_de_wait_for_register(i915, buf_ctl2_reg,</div><div class='del'>-					 intel_cx0_get_powerdown_update(lane_mask), 0,</div><div class='del'>-					 XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, buf_ctl2_reg,</div><div class='add'>+				 intel_cx0_get_powerdown_update(lane_mask), 0,</div><div class='add'>+				 XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "PHY %c failed to bring out of Lane reset after %dus.\n",</div><div class='ctx'> 			 phy_name(phy), XELPDP_PORT_RESET_START_TIMEOUT_US);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cx0_setup_powerdown(struct drm_i915_private *i915, enum port port)</div><div class='add'>+static void intel_cx0_setup_powerdown(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='add'>+</div><div class='ctx'> 	intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(i915, port),</div><div class='ctx'> 		     XELPDP_POWER_STATE_READY_MASK,</div><div class='ctx'> 		     XELPDP_POWER_STATE_READY(CX0_P2_STATE_READY));</div><div class='hunk'>@@ -2577,13 +2589,13 @@ static u32 intel_cx0_get_pclk_refclk_ack(u8 lane_mask)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_cx0_phy_lane_reset(struct drm_i915_private *i915,</div><div class='del'>-				     struct intel_encoder *encoder,</div><div class='add'>+static void intel_cx0_phy_lane_reset(struct intel_encoder *encoder,</div><div class='ctx'> 				     bool lane_reversal)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='del'>-	u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='add'>+	u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);</div><div class='ctx'> 	u8 lane_mask = lane_reversal ? INTEL_CX0_LANE1 : INTEL_CX0_LANE0;</div><div class='ctx'> 	u32 lane_pipe_reset = owned_lane_mask == INTEL_CX0_BOTH_LANES</div><div class='ctx'> 				? XELPDP_LANE_PIPE_RESET(0) | XELPDP_LANE_PIPE_RESET(1)</div><div class='hunk'>@@ -2593,19 +2605,19 @@ static void intel_cx0_phy_lane_reset(struct drm_i915_private *i915,</div><div class='ctx'> 					   XELPDP_LANE_PHY_CURRENT_STATUS(1))</div><div class='ctx'> 					: XELPDP_LANE_PHY_CURRENT_STATUS(0);</div><div class='ctx'> </div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL1(i915, port),</div><div class='del'>-					 XELPDP_PORT_BUF_SOC_PHY_READY,</div><div class='del'>-					 XELPDP_PORT_BUF_SOC_PHY_READY,</div><div class='del'>-					 XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_BUF_CTL1(i915, port),</div><div class='add'>+				 XELPDP_PORT_BUF_SOC_PHY_READY,</div><div class='add'>+				 XELPDP_PORT_BUF_SOC_PHY_READY,</div><div class='add'>+				 XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "PHY %c failed to bring out of SOC reset after %dus.\n",</div><div class='ctx'> 			 phy_name(phy), XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US);</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(i915, port), lane_pipe_reset,</div><div class='ctx'> 		     lane_pipe_reset);</div><div class='ctx'> </div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL2(i915, port),</div><div class='del'>-					 lane_phy_current_status, lane_phy_current_status,</div><div class='del'>-					 XELPDP_PORT_RESET_START_TIMEOUT_US, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_BUF_CTL2(i915, port),</div><div class='add'>+				 lane_phy_current_status, lane_phy_current_status,</div><div class='add'>+				 XELPDP_PORT_RESET_START_TIMEOUT_US, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "PHY %c failed to bring out of Lane reset after %dus.\n",</div><div class='ctx'> 			 phy_name(phy), XELPDP_PORT_RESET_START_TIMEOUT_US);</div><div class='ctx'> </div><div class='hunk'>@@ -2613,16 +2625,16 @@ static void intel_cx0_phy_lane_reset(struct drm_i915_private *i915,</div><div class='ctx'> 		     intel_cx0_get_pclk_refclk_request(owned_lane_mask),</div><div class='ctx'> 		     intel_cx0_get_pclk_refclk_request(lane_mask));</div><div class='ctx'> </div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_CLOCK_CTL(i915, port),</div><div class='del'>-					 intel_cx0_get_pclk_refclk_ack(owned_lane_mask),</div><div class='del'>-					 intel_cx0_get_pclk_refclk_ack(lane_mask),</div><div class='del'>-					 XELPDP_REFCLK_ENABLE_TIMEOUT_US, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_CLOCK_CTL(i915, port),</div><div class='add'>+				 intel_cx0_get_pclk_refclk_ack(owned_lane_mask),</div><div class='add'>+				 intel_cx0_get_pclk_refclk_ack(lane_mask),</div><div class='add'>+				 XELPDP_REFCLK_ENABLE_TIMEOUT_US, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "PHY %c failed to request refclk after %dus.\n",</div><div class='ctx'> 			 phy_name(phy), XELPDP_REFCLK_ENABLE_TIMEOUT_US);</div><div class='ctx'> </div><div class='del'>-	intel_cx0_powerdown_change_sequence(i915, port, INTEL_CX0_BOTH_LANES,</div><div class='add'>+	intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,</div><div class='ctx'> 					    CX0_P2_STATE_RESET);</div><div class='del'>-	intel_cx0_setup_powerdown(i915, port);</div><div class='add'>+	intel_cx0_setup_powerdown(encoder);</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(i915, port), lane_pipe_reset, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -2640,11 +2652,10 @@ static void intel_cx0_program_phy_lane(struct drm_i915_private *i915,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 disables;</div><div class='ctx'> 	bool dp_alt_mode = intel_tc_port_in_dp_alt_mode(enc_to_dig_port(encoder));</div><div class='del'>-	u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);</div><div class='del'>-	enum port port = encoder-&gt;port;</div><div class='add'>+	u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, intel_port_to_phy(i915, port)))</div><div class='del'>-		intel_cx0_rmw(i915, port, owned_lane_mask,</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='add'>+		intel_cx0_rmw(encoder, owned_lane_mask,</div><div class='ctx'> 			      PHY_C10_VDR_CONTROL(1), 0,</div><div class='ctx'> 			      C10_VDR_CTRL_MSGBUS_ACCESS,</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='hunk'>@@ -2666,14 +2677,14 @@ static void intel_cx0_program_phy_lane(struct drm_i915_private *i915,</div><div class='ctx'> 		if (!(owned_lane_mask &amp; lane_mask))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		intel_cx0_rmw(i915, port, lane_mask, PHY_CX0_TX_CONTROL(tx, 2),</div><div class='add'>+		intel_cx0_rmw(encoder, lane_mask, PHY_CX0_TX_CONTROL(tx, 2),</div><div class='ctx'> 			      CONTROL2_DISABLE_SINGLE_TX,</div><div class='ctx'> 			      disables &amp; BIT(i) ? CONTROL2_DISABLE_SINGLE_TX : 0,</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, intel_port_to_phy(i915, port)))</div><div class='del'>-		intel_cx0_rmw(i915, port, owned_lane_mask,</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='add'>+		intel_cx0_rmw(encoder, owned_lane_mask,</div><div class='ctx'> 			      PHY_C10_VDR_CONTROL(1), 0,</div><div class='ctx'> 			      C10_VDR_CTRL_UPDATE_CFG,</div><div class='ctx'> 			      MB_WRITE_COMMITTED);</div><div class='hunk'>@@ -2705,7 +2716,7 @@ static void intel_cx0pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 				const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='ctx'> 	bool lane_reversal = dig_port-&gt;saved_port_bits &amp; DDI_BUF_PORT_REVERSAL;</div><div class='ctx'> 	u8 maxpclk_lane = lane_reversal ? INTEL_CX0_LANE1 :</div><div class='hunk'>@@ -2719,13 +2730,13 @@ static void intel_cx0pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	intel_program_port_clock_ctl(encoder, crtc_state, lane_reversal);</div><div class='ctx'> </div><div class='ctx'> 	/* 2. Bring PHY out of reset. */</div><div class='del'>-	intel_cx0_phy_lane_reset(i915, encoder, lane_reversal);</div><div class='add'>+	intel_cx0_phy_lane_reset(encoder, lane_reversal);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 3. Change Phy power state to Ready.</div><div class='ctx'> 	 * TODO: For DP alt mode use only one lane.</div><div class='ctx'> 	 */</div><div class='del'>-	intel_cx0_powerdown_change_sequence(i915, encoder-&gt;port, INTEL_CX0_BOTH_LANES,</div><div class='add'>+	intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,</div><div class='ctx'> 					    CX0_P2_STATE_READY);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2735,7 +2746,7 @@ static void intel_cx0pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/* 5. Program PHY internal PLL internal registers. */</div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		intel_c10_pll_program(i915, crtc_state, encoder);</div><div class='ctx'> 	else</div><div class='ctx'> 		intel_c20_pll_program(i915, crtc_state, encoder);</div><div class='hunk'>@@ -2767,10 +2778,10 @@ static void intel_cx0pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 		     intel_cx0_get_pclk_pll_request(maxpclk_lane));</div><div class='ctx'> </div><div class='ctx'> 	/* 10. Poll on PORT_CLOCK_CTL PCLK PLL Ack LN&lt;Lane for maxPCLK&gt; == "1". */</div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='del'>-					 intel_cx0_get_pclk_pll_ack(INTEL_CX0_BOTH_LANES),</div><div class='del'>-					 intel_cx0_get_pclk_pll_ack(maxpclk_lane),</div><div class='del'>-					 XELPDP_PCLK_PLL_ENABLE_TIMEOUT_US, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='add'>+				 intel_cx0_get_pclk_pll_ack(INTEL_CX0_BOTH_LANES),</div><div class='add'>+				 intel_cx0_get_pclk_pll_ack(maxpclk_lane),</div><div class='add'>+				 XELPDP_PCLK_PLL_ENABLE_TIMEOUT_US, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "Port %c PLL not locked after %dus.\n",</div><div class='ctx'> 			 phy_name(phy), XELPDP_PCLK_PLL_ENABLE_TIMEOUT_US);</div><div class='ctx'> </div><div class='hunk'>@@ -2831,7 +2842,7 @@ static void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 				     const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	u32 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2858,10 +2869,10 @@ static void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	intel_de_write(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port), val);</div><div class='ctx'> </div><div class='ctx'> 	/* 5. Poll on PORT_CLOCK_CTL TBT CLOCK Ack == "1". */</div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='del'>-					 XELPDP_TBT_CLOCK_ACK,</div><div class='del'>-					 XELPDP_TBT_CLOCK_ACK,</div><div class='del'>-					 100, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='add'>+				 XELPDP_TBT_CLOCK_ACK,</div><div class='add'>+				 XELPDP_TBT_CLOCK_ACK,</div><div class='add'>+				 100, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "[ENCODER:%d:%s][%c] PHY PLL not locked after 100us.\n",</div><div class='ctx'> 			 encoder-&gt;base.base.id, encoder-&gt;base.name, phy_name(phy));</div><div class='ctx'> </div><div class='hunk'>@@ -2892,12 +2903,12 @@ void intel_mtl_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> static void intel_cx0pll_disable(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-	bool is_c10 = intel_is_c10phy(i915, phy);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='add'>+	bool is_c10 = intel_encoder_is_c10phy(encoder);</div><div class='ctx'> 	intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);</div><div class='ctx'> </div><div class='ctx'> 	/* 1. Change owned PHY lane power to Disable state. */</div><div class='del'>-	intel_cx0_powerdown_change_sequence(i915, encoder-&gt;port, INTEL_CX0_BOTH_LANES,</div><div class='add'>+	intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,</div><div class='ctx'> 					    is_c10 ? CX0_P2PG_STATE_DISABLE :</div><div class='ctx'> 					    CX0_P4PG_STATE_DISABLE);</div><div class='ctx'> </div><div class='hunk'>@@ -2920,10 +2931,10 @@ static void intel_cx0pll_disable(struct intel_encoder *encoder)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 5. Poll on PORT_CLOCK_CTL PCLK PLL Ack LN&lt;Lane for maxPCLK**&gt; == "0".</div><div class='ctx'> 	 */</div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='del'>-					 intel_cx0_get_pclk_pll_ack(INTEL_CX0_BOTH_LANES) |</div><div class='del'>-					 intel_cx0_get_pclk_refclk_ack(INTEL_CX0_BOTH_LANES), 0,</div><div class='del'>-					 XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='add'>+				 intel_cx0_get_pclk_pll_ack(INTEL_CX0_BOTH_LANES) |</div><div class='add'>+				 intel_cx0_get_pclk_refclk_ack(INTEL_CX0_BOTH_LANES), 0,</div><div class='add'>+				 XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "Port %c PLL not unlocked after %dus.\n",</div><div class='ctx'> 			 phy_name(phy), XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US);</div><div class='ctx'> </div><div class='hunk'>@@ -2944,7 +2955,7 @@ static void intel_cx0pll_disable(struct intel_encoder *encoder)</div><div class='ctx'> static void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 1. Follow the Display Voltage Frequency Switching Sequence Before</div><div class='hunk'>@@ -2958,8 +2969,8 @@ static void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder)</div><div class='ctx'> 		     XELPDP_TBT_CLOCK_REQUEST, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* 3. Poll on PORT_CLOCK_CTL TBT CLOCK Ack == "0". */</div><div class='del'>-	if (__intel_de_wait_for_register(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='del'>-					 XELPDP_TBT_CLOCK_ACK, 0, 10, 0, NULL))</div><div class='add'>+	if (intel_de_wait_custom(i915, XELPDP_PORT_CLOCK_CTL(i915, encoder-&gt;port),</div><div class='add'>+				 XELPDP_TBT_CLOCK_ACK, 0, 10, 0, NULL))</div><div class='ctx'> 		drm_warn(&amp;i915-&gt;drm, "[ENCODER:%d:%s][%c] PHY PLL not unlocked after 10us.\n",</div><div class='ctx'> 			 encoder-&gt;base.base.id, encoder-&gt;base.name, phy_name(phy));</div><div class='ctx'> </div><div class='hunk'>@@ -3014,7 +3025,7 @@ static void intel_c10pll_state_verify(const struct intel_crtc_state *state,</div><div class='ctx'> 				      struct intel_c10pll_state *mpllb_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	const struct intel_c10pll_state *mpllb_sw_state = &amp;state-&gt;cx0pll_state.c10;</div><div class='add'>+	const struct intel_c10pll_state *mpllb_sw_state = &amp;state-&gt;dpll_hw_state.cx0pll.c10;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_needs_fastset(state))</div><div class='hunk'>@@ -3043,10 +3054,7 @@ static void intel_c10pll_state_verify(const struct intel_crtc_state *state,</div><div class='ctx'> void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 				   struct intel_cx0pll_state *pll_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		intel_c10pll_readout_hw_state(encoder, &amp;pll_state-&gt;c10);</div><div class='ctx'> 	else</div><div class='ctx'> 		intel_c20pll_readout_hw_state(encoder, &amp;pll_state-&gt;c20);</div><div class='hunk'>@@ -3055,10 +3063,7 @@ void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> int intel_cx0pll_calc_port_clock(struct intel_encoder *encoder,</div><div class='ctx'> 				 const struct intel_cx0pll_state *pll_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		return intel_c10pll_calc_port_clock(encoder, &amp;pll_state-&gt;c10);</div><div class='ctx'> </div><div class='ctx'> 	return intel_c20pll_calc_port_clock(encoder, &amp;pll_state-&gt;c20);</div><div class='hunk'>@@ -3070,7 +3075,7 @@ static void intel_c20pll_state_verify(const struct intel_crtc_state *state,</div><div class='ctx'> 				      struct intel_c20pll_state *mpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	const struct intel_c20pll_state *mpll_sw_state = &amp;state-&gt;cx0pll_state.c20;</div><div class='add'>+	const struct intel_c20pll_state *mpll_sw_state = &amp;state-&gt;dpll_hw_state.cx0pll.c20;</div><div class='ctx'> 	bool sw_use_mpllb = intel_c20phy_use_mpllb(mpll_sw_state);</div><div class='ctx'> 	bool hw_use_mpllb = intel_c20phy_use_mpllb(mpll_hw_state);</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -3124,7 +3129,6 @@ void intel_cx0pll_state_verify(struct intel_atomic_state *state,</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct intel_encoder *encoder;</div><div class='ctx'> 	struct intel_cx0pll_state mpll_hw_state = {};</div><div class='del'>-	enum phy phy;</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &lt; 14)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -3138,14 +3142,13 @@ void intel_cx0pll_state_verify(struct intel_atomic_state *state,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);</div><div class='del'>-	phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	intel_cx0pll_readout_hw_state(encoder, &amp;mpll_hw_state);</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		intel_c10pll_state_verify(new_crtc_state, crtc, encoder, &amp;mpll_hw_state.c10);</div><div class='ctx'> 	else</div><div class='ctx'> 		intel_c20pll_state_verify(new_crtc_state, crtc, encoder, &amp;mpll_hw_state.c20);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h<br/>index c6682677253a..3e03af3e006c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cx0_phy.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_cx0_phy.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_cx0_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_cx0_phy.h</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum icl_port_dpll_id;</div><div class='del'>-enum phy;</div><div class='ctx'> struct drm_i915_private;</div><div class='ctx'> struct intel_atomic_state;</div><div class='ctx'> struct intel_c10pll_state;</div><div class='hunk'>@@ -22,7 +21,7 @@ struct intel_crtc_state;</div><div class='ctx'> struct intel_encoder;</div><div class='ctx'> struct intel_hdmi;</div><div class='ctx'> </div><div class='del'>-bool intel_is_c10phy(struct drm_i915_private *dev_priv, enum phy phy);</div><div class='add'>+bool intel_encoder_is_c10phy(struct intel_encoder *encoder);</div><div class='ctx'> void intel_mtl_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 			  const struct intel_crtc_state *crtc_state);</div><div class='ctx'> void intel_mtl_pll_disable(struct intel_encoder *encoder);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c<br/>index c17462b4c2ac..3c3fc53376ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_ddi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_ddi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_ddi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_ddi.c</a></div><div class='hunk'>@@ -200,10 +200,10 @@ void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			port_name(port));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,</div><div class='del'>-				      enum port port)</div><div class='add'>+static void intel_wait_ddi_buf_active(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='ctx'> 	int timeout_us;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -218,7 +218,7 @@ static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	} else if (IS_DG2(dev_priv)) {</div><div class='ctx'> 		timeout_us = 1200;</div><div class='ctx'> 	} else if (DISPLAY_VER(dev_priv) &gt;= 12) {</div><div class='del'>-		if (intel_phy_is_tc(dev_priv, phy))</div><div class='add'>+		if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 			timeout_us = 3000;</div><div class='ctx'> 		else</div><div class='ctx'> 			timeout_us = 1000;</div><div class='hunk'>@@ -331,7 +331,6 @@ static void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder,</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	/* DDI_BUF_CTL_ENABLE will be set by intel_ddi_prepare_link_retrain() later */</div><div class='ctx'> 	intel_dp-&gt;DP = dig_port-&gt;saved_port_bits |</div><div class='hunk'>@@ -345,7 +344,7 @@ static void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder,</div><div class='ctx'> 			intel_dp-&gt;DP |= DDI_BUF_PORT_DATA_10BIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_ALDERLAKE_P(i915) &amp;&amp; intel_phy_is_tc(i915, phy)) {</div><div class='add'>+	if (IS_ALDERLAKE_P(i915) &amp;&amp; intel_encoder_is_tc(encoder)) {</div><div class='ctx'> 		intel_dp-&gt;DP |= ddi_buf_phy_link_rate(crtc_state-&gt;port_clock);</div><div class='ctx'> 		if (!intel_tc_port_in_tbt_alt_mode(dig_port))</div><div class='ctx'> 			intel_dp-&gt;DP |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;</div><div class='hunk'>@@ -632,6 +631,7 @@ intel_ddi_config_transcoder_func(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(crtc_state);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	enum transcoder cpu_transcoder = crtc_state-&gt;cpu_transcoder;</div><div class='hunk'>@@ -662,10 +662,9 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);</div><div class='ctx'> </div><div class='del'>-	if (intel_has_quirk(dev_priv, QUIRK_INCREASE_DDI_DISABLED_TIME) &amp;&amp;</div><div class='add'>+	if (intel_has_quirk(display, QUIRK_INCREASE_DDI_DISABLED_TIME) &amp;&amp;</div><div class='ctx'> 	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='del'>-			    "Quirk Increase DDI disabled time\n");</div><div class='add'>+		drm_dbg_kms(display-&gt;drm, "Quirk Increase DDI disabled time\n");</div><div class='ctx'> 		/* Quirk time at 100ms for reliable operation */</div><div class='ctx'> 		msleep(100);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -895,7 +894,6 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,</div><div class='ctx'> 			       const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ICL+ HW requires corresponding AUX IOs to be powered up for PSR with</div><div class='hunk'>@@ -914,7 +912,7 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,</div><div class='ctx'> 		return intel_display_power_aux_io_domain(i915, dig_port-&gt;aux_ch);</div><div class='ctx'> 	else if (DISPLAY_VER(i915) &lt; 14 &amp;&amp;</div><div class='ctx'> 		 (intel_crtc_has_dp_encoder(crtc_state) ||</div><div class='del'>-		  intel_phy_is_tc(i915, phy)))</div><div class='add'>+		  intel_encoder_is_tc(&amp;dig_port-&gt;base)))</div><div class='ctx'> 		return intel_aux_power_domain(dig_port);</div><div class='ctx'> 	else</div><div class='ctx'> 		return POWER_DOMAIN_INVALID;</div><div class='hunk'>@@ -984,7 +982,7 @@ void intel_ddi_enable_transcoder_clock(struct intel_encoder *encoder,</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	enum transcoder cpu_transcoder = crtc_state-&gt;cpu_transcoder;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_transcoder == TRANSCODER_EDP)</div><div class='hunk'>@@ -1113,7 +1111,7 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_ddi_buf_trans *trans;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	int n_entries, ln;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -1176,7 +1174,7 @@ static void icl_combo_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 					    const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int ln;</div><div class='ctx'> </div><div class='hunk'>@@ -1227,7 +1225,7 @@ static void icl_mg_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 					 const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	const struct intel_ddi_buf_trans *trans;</div><div class='ctx'> 	int n_entries, ln;</div><div class='ctx'> </div><div class='hunk'>@@ -1328,7 +1326,7 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 					  const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	const struct intel_ddi_buf_trans *trans;</div><div class='ctx'> 	int n_entries, ln;</div><div class='ctx'> </div><div class='hunk'>@@ -1526,7 +1524,7 @@ static void adls_ddi_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_shared_dpll *pll = crtc_state-&gt;shared_dpll;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, !pll))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1540,7 +1538,7 @@ static void adls_ddi_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> static void adls_ddi_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	_icl_ddi_disable_clock(i915, ADLS_DPCLKA_CFGCR(phy),</div><div class='ctx'> 			       ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1549,7 +1547,7 @@ static void adls_ddi_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> static bool adls_ddi_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_is_clock_enabled(i915, ADLS_DPCLKA_CFGCR(phy),</div><div class='ctx'> 					 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1558,7 +1556,7 @@ static bool adls_ddi_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> static struct intel_shared_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_get_pll(i915, ADLS_DPCLKA_CFGCR(phy),</div><div class='ctx'> 				ADLS_DPCLKA_CFGCR_DDI_CLK_SEL_MASK(phy),</div><div class='hunk'>@@ -1570,7 +1568,7 @@ static void rkl_ddi_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_shared_dpll *pll = crtc_state-&gt;shared_dpll;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, !pll))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1584,7 +1582,7 @@ static void rkl_ddi_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> static void rkl_ddi_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	_icl_ddi_disable_clock(i915, ICL_DPCLKA_CFGCR0,</div><div class='ctx'> 			       RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1593,7 +1591,7 @@ static void rkl_ddi_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> static bool rkl_ddi_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_is_clock_enabled(i915, ICL_DPCLKA_CFGCR0,</div><div class='ctx'> 					 RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1602,7 +1600,7 @@ static bool rkl_ddi_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> static struct intel_shared_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_get_pll(i915, ICL_DPCLKA_CFGCR0,</div><div class='ctx'> 				RKL_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy),</div><div class='hunk'>@@ -1614,7 +1612,7 @@ static void dg1_ddi_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_shared_dpll *pll = crtc_state-&gt;shared_dpll;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, !pll))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1637,7 +1635,7 @@ static void dg1_ddi_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> static void dg1_ddi_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	_icl_ddi_disable_clock(i915, DG1_DPCLKA_CFGCR0(phy),</div><div class='ctx'> 			       DG1_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1646,7 +1644,7 @@ static void dg1_ddi_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> static bool dg1_ddi_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_is_clock_enabled(i915, DG1_DPCLKA_CFGCR0(phy),</div><div class='ctx'> 					 DG1_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1655,7 +1653,7 @@ static bool dg1_ddi_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> static struct intel_shared_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	enum intel_dpll_id id;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -1680,7 +1678,7 @@ static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_shared_dpll *pll = crtc_state-&gt;shared_dpll;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, !pll))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1694,7 +1692,7 @@ static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> static void icl_ddi_combo_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	_icl_ddi_disable_clock(i915, ICL_DPCLKA_CFGCR0,</div><div class='ctx'> 			       ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1703,7 +1701,7 @@ static void icl_ddi_combo_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> static bool icl_ddi_combo_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_is_clock_enabled(i915, ICL_DPCLKA_CFGCR0,</div><div class='ctx'> 					 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));</div><div class='hunk'>@@ -1712,7 +1710,7 @@ static bool icl_ddi_combo_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return _icl_ddi_get_pll(i915, ICL_DPCLKA_CFGCR0,</div><div class='ctx'> 				ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy),</div><div class='hunk'>@@ -1767,7 +1765,7 @@ static void icl_ddi_tc_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_shared_dpll *pll = crtc_state-&gt;shared_dpll;</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, !pll))</div><div class='hunk'>@@ -1787,7 +1785,7 @@ static void icl_ddi_tc_enable_clock(struct intel_encoder *encoder,</div><div class='ctx'> static void icl_ddi_tc_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;i915-&gt;display.dpll.lock);</div><div class='hunk'>@@ -1803,7 +1801,7 @@ static void icl_ddi_tc_disable_clock(struct intel_encoder *encoder)</div><div class='ctx'> static bool icl_ddi_tc_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -1820,7 +1818,7 @@ static bool icl_ddi_tc_is_clock_enabled(struct intel_encoder *encoder)</div><div class='ctx'> static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='ctx'> 	enum intel_dpll_id id;</div><div class='ctx'> 	u32 tmp;</div><div class='hunk'>@@ -2086,12 +2084,11 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port,</div><div class='ctx'> 		       const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port-&gt;base.port);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, dig_port-&gt;base.port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(&amp;dig_port-&gt;base);</div><div class='ctx'> 	u32 ln0, ln1, pin_assignment;</div><div class='ctx'> 	u8 width;</div><div class='ctx'> </div><div class='del'>-	if (!intel_phy_is_tc(dev_priv, phy) ||</div><div class='add'>+	if (!intel_encoder_is_tc(&amp;dig_port-&gt;base) ||</div><div class='ctx'> 	    intel_tc_port_in_tbt_alt_mode(dig_port))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -2327,9 +2324,9 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='ctx'> </div><div class='del'>-	if (intel_phy_is_combo(i915, phy)) {</div><div class='add'>+	if (intel_encoder_is_combo(encoder)) {</div><div class='add'>+		enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 		bool lane_reversal =</div><div class='ctx'> 			dig_port-&gt;saved_port_bits &amp; DDI_BUF_PORT_REVERSAL;</div><div class='ctx'> </div><div class='hunk'>@@ -2339,10 +2336,15 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Splitter enable for eDP MSO is limited to certain pipes. */</div><div class='add'>+/*</div><div class='add'>+ * Splitter enable for eDP MSO is limited to certain pipes, on certain</div><div class='add'>+ * platforms.</div><div class='add'>+ */</div><div class='ctx'> static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ALDERLAKE_P(i915))</div><div class='add'>+	if (DISPLAY_VER(i915) &gt; 20)</div><div class='add'>+		return ~0;</div><div class='add'>+	else if (IS_ALDERLAKE_P(i915))</div><div class='ctx'> 		return BIT(PIPE_A) | BIT(PIPE_B);</div><div class='ctx'> 	else</div><div class='ctx'> 		return BIT(PIPE_A);</div><div class='hunk'>@@ -2812,15 +2814,14 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 				    const struct drm_connector_state *conn_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);</div><div class='ctx'> </div><div class='del'>-	if (HAS_DP20(dev_priv)) {</div><div class='add'>+	if (HAS_DP20(dev_priv))</div><div class='ctx'> 		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),</div><div class='ctx'> 					    crtc_state);</div><div class='del'>-		if (crtc_state-&gt;has_panel_replay)</div><div class='del'>-			drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, PANEL_REPLAY_CONFIG,</div><div class='del'>-					   DP_PANEL_REPLAY_ENABLE);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	/* Panel replay has to be enabled in sink dpcd before link training. */</div><div class='add'>+	if (crtc_state-&gt;has_panel_replay)</div><div class='add'>+		intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 14)</div><div class='ctx'> 		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);</div><div class='hunk'>@@ -3095,39 +3096,48 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,</div><div class='ctx'> 	intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_ddi_post_disable(struct intel_atomic_state *state,</div><div class='del'>-				   struct intel_encoder *encoder,</div><div class='del'>-				   const struct intel_crtc_state *old_crtc_state,</div><div class='del'>-				   const struct drm_connector_state *old_conn_state)</div><div class='add'>+static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state,</div><div class='add'>+					       struct intel_encoder *encoder,</div><div class='add'>+					       const struct intel_crtc_state *old_crtc_state,</div><div class='add'>+					       const struct drm_connector_state *old_conn_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_crtc *slave_crtc;</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='del'>-	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {</div><div class='del'>-		intel_crtc_vblank_off(old_crtc_state);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *old_pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_old_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-		intel_disable_transcoder(old_crtc_state);</div><div class='add'>+		intel_crtc_vblank_off(old_pipe_crtc_state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		intel_ddi_disable_transcoder_func(old_crtc_state);</div><div class='add'>+	intel_disable_transcoder(old_crtc_state);</div><div class='ctx'> </div><div class='del'>-		intel_dsc_disable(old_crtc_state);</div><div class='add'>+	intel_ddi_disable_transcoder_func(old_crtc_state);</div><div class='add'>+</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *old_pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_old_crtc_state(state, pipe_crtc);</div><div class='add'>+</div><div class='add'>+		intel_dsc_disable(old_pipe_crtc_state);</div><div class='ctx'> </div><div class='ctx'> 		if (DISPLAY_VER(dev_priv) &gt;= 9)</div><div class='del'>-			skl_scaler_disable(old_crtc_state);</div><div class='add'>+			skl_scaler_disable(old_pipe_crtc_state);</div><div class='ctx'> 		else</div><div class='del'>-			ilk_pfit_disable(old_crtc_state);</div><div class='add'>+			ilk_pfit_disable(old_pipe_crtc_state);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, slave_crtc,</div><div class='del'>-					 intel_crtc_bigjoiner_slave_pipes(old_crtc_state)) {</div><div class='del'>-		const struct intel_crtc_state *old_slave_crtc_state =</div><div class='del'>-			intel_atomic_get_old_crtc_state(state, slave_crtc);</div><div class='del'>-</div><div class='del'>-		intel_crtc_vblank_off(old_slave_crtc_state);</div><div class='del'>-</div><div class='del'>-		intel_dsc_disable(old_slave_crtc_state);</div><div class='del'>-		skl_scaler_disable(old_slave_crtc_state);</div><div class='del'>-	}</div><div class='add'>+static void intel_ddi_post_disable(struct intel_atomic_state *state,</div><div class='add'>+				   struct intel_encoder *encoder,</div><div class='add'>+				   const struct intel_crtc_state *old_crtc_state,</div><div class='add'>+				   const struct drm_connector_state *old_conn_state)</div><div class='add'>+{</div><div class='add'>+	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST))</div><div class='add'>+		intel_ddi_post_disable_hdmi_or_sst(state, encoder, old_crtc_state,</div><div class='add'>+						   old_conn_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When called from DP MST code:</div><div class='hunk'>@@ -3155,14 +3165,11 @@ static void intel_ddi_post_pll_disable(struct intel_atomic_state *state,</div><div class='ctx'> 				       const struct intel_crtc_state *old_crtc_state,</div><div class='ctx'> 				       const struct drm_connector_state *old_conn_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-	bool is_tc_port = intel_phy_is_tc(i915, phy);</div><div class='ctx'> </div><div class='ctx'> 	main_link_aux_power_domain_put(dig_port, old_crtc_state);</div><div class='ctx'> </div><div class='del'>-	if (is_tc_port)</div><div class='add'>+	if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 		intel_tc_port_put_link(dig_port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3263,7 +3270,6 @@ static void intel_enable_ddi_hdmi(struct intel_atomic_state *state,</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='ctx'> 	struct drm_connector *connector = conn_state-&gt;connector;</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='ctx'> 	u32 buf_ctl;</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_hdmi_handle_sink_scrambling(encoder, connector,</div><div class='hunk'>@@ -3347,14 +3353,14 @@ static void intel_enable_ddi_hdmi(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 		if (DISPLAY_VER(dev_priv) &gt;= 20)</div><div class='ctx'> 			buf_ctl |= XE2LPD_DDI_BUF_D2D_LINK_ENABLE;</div><div class='del'>-	} else if (IS_ALDERLAKE_P(dev_priv) &amp;&amp; intel_phy_is_tc(dev_priv, phy)) {</div><div class='add'>+	} else if (IS_ALDERLAKE_P(dev_priv) &amp;&amp; intel_encoder_is_tc(encoder)) {</div><div class='ctx'> 		drm_WARN_ON(&amp;dev_priv-&gt;drm, !intel_tc_port_in_legacy_mode(dig_port));</div><div class='ctx'> 		buf_ctl |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write(dev_priv, DDI_BUF_CTL(port), buf_ctl);</div><div class='ctx'> </div><div class='del'>-	intel_wait_ddi_buf_active(dev_priv, port);</div><div class='add'>+	intel_wait_ddi_buf_active(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_enable_ddi(struct intel_atomic_state *state,</div><div class='hunk'>@@ -3362,10 +3368,10 @@ static void intel_enable_ddi(struct intel_atomic_state *state,</div><div class='ctx'> 			     const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			     const struct drm_connector_state *conn_state)</div><div class='ctx'> {</div><div class='del'>-	drm_WARN_ON(state-&gt;base.dev, crtc_state-&gt;has_pch_encoder);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='del'>-	if (!intel_crtc_is_bigjoiner_slave(crtc_state))</div><div class='del'>-		intel_ddi_enable_transcoder_func(encoder, crtc_state);</div><div class='add'>+	intel_ddi_enable_transcoder_func(encoder, crtc_state);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable/Disable DP2.0 SDP split config before transcoder */</div><div class='ctx'> 	intel_audio_sdp_split_update(crtc_state);</div><div class='hunk'>@@ -3374,7 +3380,13 @@ static void intel_enable_ddi(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 	intel_ddi_wait_for_fec_status(encoder, crtc_state, true);</div><div class='ctx'> </div><div class='del'>-	intel_crtc_vblank_on(crtc_state);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;i915-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='add'>+</div><div class='add'>+		intel_crtc_vblank_on(pipe_crtc_state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))</div><div class='ctx'> 		intel_enable_ddi_hdmi(state, encoder, crtc_state, conn_state);</div><div class='hunk'>@@ -3470,19 +3482,17 @@ void intel_ddi_update_active_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 				  struct intel_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_crtc_state *crtc_state =</div><div class='add'>+	const struct intel_crtc_state *crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='del'>-	struct intel_crtc *slave_crtc;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: Add MTL pll_mgr */</div><div class='del'>-	if (DISPLAY_VER(i915) &gt;= 14 || !intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (DISPLAY_VER(i915) &gt;= 14 || !intel_encoder_is_tc(encoder))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_update_active_dpll(state, crtc, encoder);</div><div class='del'>-	for_each_intel_crtc_in_pipe_mask(&amp;i915-&gt;drm, slave_crtc,</div><div class='del'>-					 intel_crtc_bigjoiner_slave_pipes(crtc_state))</div><div class='del'>-		intel_update_active_dpll(state, slave_crtc, encoder);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;i915-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(crtc_state))</div><div class='add'>+		intel_update_active_dpll(state, pipe_crtc, encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -3493,8 +3503,7 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='del'>-	bool is_tc_port = intel_phy_is_tc(dev_priv, phy);</div><div class='add'>+	bool is_tc_port = intel_encoder_is_tc(encoder);</div><div class='ctx'> </div><div class='ctx'> 	if (is_tc_port) {</div><div class='ctx'> 		struct intel_crtc *master_crtc =</div><div class='hunk'>@@ -3513,14 +3522,14 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,</div><div class='ctx'> 		 */</div><div class='ctx'> 		intel_tc_port_set_fia_lane_count(dig_port, crtc_state-&gt;lane_count);</div><div class='ctx'> 	else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='del'>-		bxt_ddi_phy_set_lane_optim_mask(encoder,</div><div class='del'>-						crtc_state-&gt;lane_lat_optim_mask);</div><div class='add'>+		bxt_dpio_phy_set_lane_optim_mask(encoder,</div><div class='add'>+						 crtc_state-&gt;lane_lat_optim_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void adlp_tbt_to_dp_alt_switch_wa(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, encoder-&gt;port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(encoder);</div><div class='ctx'> 	int ln;</div><div class='ctx'> </div><div class='ctx'> 	for (ln = 0; ln &lt; 2; ln++)</div><div class='hunk'>@@ -3574,7 +3583,7 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp,</div><div class='ctx'> 	intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));</div><div class='ctx'> </div><div class='ctx'> 	/* 6.j Poll for PORT_BUF_CTL Idle Status == 0, timeout after 100 us */</div><div class='del'>-	intel_wait_ddi_buf_active(dev_priv, port);</div><div class='add'>+	intel_wait_ddi_buf_active(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,</div><div class='hunk'>@@ -3624,7 +3633,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,</div><div class='ctx'> 	intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp-&gt;DP);</div><div class='ctx'> 	intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));</div><div class='ctx'> </div><div class='del'>-	intel_wait_ddi_buf_active(dev_priv, port);</div><div class='add'>+	intel_wait_ddi_buf_active(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_ddi_set_link_train(struct intel_dp *intel_dp,</div><div class='hunk'>@@ -3681,7 +3690,7 @@ static void intel_ddi_set_idle_link_train(struct intel_dp *intel_dp,</div><div class='ctx'> </div><div class='ctx'> 	if (intel_de_wait_for_set(dev_priv,</div><div class='ctx'> 				  dp_tp_status_reg(encoder, crtc_state),</div><div class='del'>-				  DP_TP_STATUS_IDLE_DONE, 1))</div><div class='add'>+				  DP_TP_STATUS_IDLE_DONE, 2))</div><div class='ctx'> 		drm_err(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			"Timed out waiting for DP idle patterns\n");</div><div class='ctx'> }</div><div class='hunk'>@@ -3946,7 +3955,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='ctx'> 		pipe_config-&gt;lane_lat_optim_mask =</div><div class='del'>-			bxt_ddi_phy_get_lane_lat_optim_mask(encoder);</div><div class='add'>+			bxt_dpio_phy_get_lane_lat_optim_mask(encoder);</div><div class='ctx'> </div><div class='ctx'> 	intel_ddi_compute_min_voltage_level(pipe_config);</div><div class='ctx'> </div><div class='hunk'>@@ -3972,6 +3981,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);</div><div class='ctx'> 	intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);</div><div class='add'>+	intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);</div><div class='ctx'> </div><div class='ctx'> 	intel_audio_codec_get_config(encoder, pipe_config);</div><div class='ctx'> }</div><div class='hunk'>@@ -4006,8 +4016,8 @@ static void mtl_ddi_get_config(struct intel_encoder *encoder,</div><div class='ctx'> 	if (intel_tc_port_in_tbt_alt_mode(dig_port)) {</div><div class='ctx'> 		crtc_state-&gt;port_clock = intel_mtl_tbt_calc_port_clock(encoder);</div><div class='ctx'> 	} else {</div><div class='del'>-		intel_cx0pll_readout_hw_state(encoder, &amp;crtc_state-&gt;cx0pll_state);</div><div class='del'>-		crtc_state-&gt;port_clock = intel_cx0pll_calc_port_clock(encoder, &amp;crtc_state-&gt;cx0pll_state);</div><div class='add'>+		intel_cx0pll_readout_hw_state(encoder, &amp;crtc_state-&gt;dpll_hw_state.cx0pll);</div><div class='add'>+		crtc_state-&gt;port_clock = intel_cx0pll_calc_port_clock(encoder, &amp;crtc_state-&gt;dpll_hw_state.cx0pll);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_ddi_get_config(encoder, crtc_state);</div><div class='hunk'>@@ -4016,8 +4026,8 @@ static void mtl_ddi_get_config(struct intel_encoder *encoder,</div><div class='ctx'> static void dg2_ddi_get_config(struct intel_encoder *encoder,</div><div class='ctx'> 				struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	intel_mpllb_readout_hw_state(encoder, &amp;crtc_state-&gt;mpllb_state);</div><div class='del'>-	crtc_state-&gt;port_clock = intel_mpllb_calc_port_clock(encoder, &amp;crtc_state-&gt;mpllb_state);</div><div class='add'>+	intel_mpllb_readout_hw_state(encoder, &amp;crtc_state-&gt;dpll_hw_state.mpllb);</div><div class='add'>+	crtc_state-&gt;port_clock = intel_mpllb_calc_port_clock(encoder, &amp;crtc_state-&gt;dpll_hw_state.mpllb);</div><div class='ctx'> </div><div class='ctx'> 	intel_ddi_get_config(encoder, crtc_state);</div><div class='ctx'> }</div><div class='hunk'>@@ -4144,10 +4154,7 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,</div><div class='ctx'> static void intel_ddi_sync_state(struct intel_encoder *encoder,</div><div class='ctx'> 				 const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	if (intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 		intel_tc_port_sanitize_mode(enc_to_dig_port(encoder),</div><div class='ctx'> 					    crtc_state);</div><div class='ctx'> </div><div class='hunk'>@@ -4159,10 +4166,9 @@ static bool intel_ddi_initial_fastset_check(struct intel_encoder *encoder,</div><div class='ctx'> 					    struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='ctx'> 	bool fastset = true;</div><div class='ctx'> </div><div class='del'>-	if (intel_phy_is_tc(i915, phy)) {</div><div class='add'>+	if (intel_encoder_is_tc(encoder)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm, "[ENCODER:%d:%s] Forcing full modeset to compute TC port DPLLs\n",</div><div class='ctx'> 			    encoder-&gt;base.base.id, encoder-&gt;base.name);</div><div class='ctx'> 		crtc_state-&gt;uapi.mode_changed = true;</div><div class='hunk'>@@ -4226,7 +4232,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='ctx'> 		pipe_config-&gt;lane_lat_optim_mask =</div><div class='del'>-			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config-&gt;lane_count);</div><div class='add'>+			bxt_dpio_phy_calc_lane_lat_optim_mask(pipe_config-&gt;lane_count);</div><div class='ctx'> </div><div class='ctx'> 	intel_ddi_compute_min_voltage_level(pipe_config);</div><div class='ctx'> </div><div class='hunk'>@@ -4353,10 +4359,9 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> </div><div class='ctx'> 	intel_dp_encoder_flush_work(encoder);</div><div class='del'>-	if (intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (intel_encoder_is_tc(&amp;dig_port-&gt;base))</div><div class='ctx'> 		intel_tc_port_cleanup(dig_port);</div><div class='ctx'> 	intel_display_power_flush_work(i915);</div><div class='ctx'> </div><div class='hunk'>@@ -4367,16 +4372,14 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> static void intel_ddi_encoder_reset(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;dev);</div><div class='ctx'> 	struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> </div><div class='ctx'> 	intel_dp-&gt;reset_link_params = true;</div><div class='ctx'> </div><div class='ctx'> 	intel_pps_encoder_reset(intel_dp);</div><div class='ctx'> </div><div class='del'>-	if (intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (intel_encoder_is_tc(&amp;dig_port-&gt;base))</div><div class='ctx'> 		intel_tc_port_init_mode(dig_port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4543,11 +4546,9 @@ static enum intel_hotplug_state</div><div class='ctx'> intel_ddi_hotplug(struct intel_encoder *encoder,</div><div class='ctx'> 		  struct intel_connector *connector)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='ctx'> 	struct intel_dp *intel_dp = &amp;dig_port-&gt;dp;</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-	bool is_tc = intel_phy_is_tc(i915, phy);</div><div class='add'>+	bool is_tc = intel_encoder_is_tc(encoder);</div><div class='ctx'> 	struct drm_modeset_acquire_ctx ctx;</div><div class='ctx'> 	enum intel_hotplug_state state;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -4829,10 +4830,7 @@ static bool port_strap_detected(struct drm_i915_private *i915, enum port port)</div><div class='ctx'> </div><div class='ctx'> static bool need_aux_ch(struct intel_encoder *encoder, bool init_dp)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	return init_dp || intel_phy_is_tc(i915, phy);</div><div class='add'>+	return init_dp || intel_encoder_is_tc(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool assert_has_icl_dsi(struct drm_i915_private *i915)</div><div class='hunk'>@@ -5076,17 +5074,17 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	} else if (IS_DG2(dev_priv)) {</div><div class='ctx'> 		encoder-&gt;set_signal_levels = intel_snps_phy_set_signal_levels;</div><div class='ctx'> 	} else if (DISPLAY_VER(dev_priv) &gt;= 12) {</div><div class='del'>-		if (intel_phy_is_combo(dev_priv, phy))</div><div class='add'>+		if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 			encoder-&gt;set_signal_levels = icl_combo_phy_set_signal_levels;</div><div class='ctx'> 		else</div><div class='ctx'> 			encoder-&gt;set_signal_levels = tgl_dkl_phy_set_signal_levels;</div><div class='ctx'> 	} else if (DISPLAY_VER(dev_priv) &gt;= 11) {</div><div class='del'>-		if (intel_phy_is_combo(dev_priv, phy))</div><div class='add'>+		if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 			encoder-&gt;set_signal_levels = icl_combo_phy_set_signal_levels;</div><div class='ctx'> 		else</div><div class='ctx'> 			encoder-&gt;set_signal_levels = icl_mg_phy_set_signal_levels;</div><div class='ctx'> 	} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {</div><div class='del'>-		encoder-&gt;set_signal_levels = bxt_ddi_phy_set_signal_levels;</div><div class='add'>+		encoder-&gt;set_signal_levels = bxt_dpio_phy_set_signal_levels;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		encoder-&gt;set_signal_levels = hsw_set_signal_levels;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5131,7 +5129,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_phy_is_tc(dev_priv, phy)) {</div><div class='add'>+	if (intel_encoder_is_tc(encoder)) {</div><div class='ctx'> 		bool is_legacy =</div><div class='ctx'> 			!intel_bios_encoder_supports_typec_usb(devdata) &amp;&amp;</div><div class='ctx'> 			!intel_bios_encoder_supports_tbt(devdata);</div><div class='hunk'>@@ -5160,7 +5158,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	dig_port-&gt;ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 11) {</div><div class='del'>-		if (intel_phy_is_tc(dev_priv, phy))</div><div class='add'>+		if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 			dig_port-&gt;connected = intel_tc_port_connected;</div><div class='ctx'> 		else</div><div class='ctx'> 			dig_port-&gt;connected = lpt_digital_port_connected;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c<br/>index de809e2d9cac..4d21ce734343 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c</a></div><div class='hunk'>@@ -1691,14 +1691,11 @@ mtl_get_cx0_buf_trans(struct intel_encoder *encoder,</div><div class='ctx'> 		      const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 		      int *n_entries)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='ctx'> 	if (intel_crtc_has_dp_encoder(crtc_state) &amp;&amp; crtc_state-&gt;port_clock &gt;= 1000000)</div><div class='ctx'> 		return intel_get_buf_trans(&amp;mtl_c20_trans_uhbr, n_entries);</div><div class='del'>-	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &amp;&amp; !(intel_is_c10phy(i915, phy)))</div><div class='add'>+	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &amp;&amp; !(intel_encoder_is_c10phy(encoder)))</div><div class='ctx'> 		return intel_get_buf_trans(&amp;mtl_c20_trans_hdmi, n_entries);</div><div class='del'>-	else if (!intel_is_c10phy(i915, phy))</div><div class='add'>+	else if (!intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		return intel_get_buf_trans(&amp;mtl_c20_trans_dp14, n_entries);</div><div class='ctx'> 	else</div><div class='ctx'> 		return intel_get_buf_trans(&amp;mtl_c10_trans_dp14, n_entries);</div><div class='hunk'>@@ -1707,14 +1704,13 @@ mtl_get_cx0_buf_trans(struct intel_encoder *encoder,</div><div class='ctx'> void intel_ddi_buf_trans_init(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 14) {</div><div class='ctx'> 		encoder-&gt;get_buf_trans = mtl_get_cx0_buf_trans;</div><div class='ctx'> 	} else if (IS_DG2(i915)) {</div><div class='ctx'> 		encoder-&gt;get_buf_trans = dg2_get_snps_buf_trans;</div><div class='ctx'> 	} else if (IS_ALDERLAKE_P(i915)) {</div><div class='del'>-		if (intel_phy_is_combo(i915, phy))</div><div class='add'>+		if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 			encoder-&gt;get_buf_trans = adlp_get_combo_buf_trans;</div><div class='ctx'> 		else</div><div class='ctx'> 			encoder-&gt;get_buf_trans = adlp_get_dkl_buf_trans;</div><div class='hunk'>@@ -1725,16 +1721,16 @@ void intel_ddi_buf_trans_init(struct intel_encoder *encoder)</div><div class='ctx'> 	} else if (IS_DG1(i915)) {</div><div class='ctx'> 		encoder-&gt;get_buf_trans = dg1_get_combo_buf_trans;</div><div class='ctx'> 	} else if (DISPLAY_VER(i915) &gt;= 12) {</div><div class='del'>-		if (intel_phy_is_combo(i915, phy))</div><div class='add'>+		if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 			encoder-&gt;get_buf_trans = tgl_get_combo_buf_trans;</div><div class='ctx'> 		else</div><div class='ctx'> 			encoder-&gt;get_buf_trans = tgl_get_dkl_buf_trans;</div><div class='ctx'> 	} else if (DISPLAY_VER(i915) == 11) {</div><div class='del'>-		if (IS_PLATFORM(i915, INTEL_JASPERLAKE))</div><div class='add'>+		if (IS_JASPERLAKE(i915))</div><div class='ctx'> 			encoder-&gt;get_buf_trans = jsl_get_combo_buf_trans;</div><div class='del'>-		else if (IS_PLATFORM(i915, INTEL_ELKHARTLAKE))</div><div class='add'>+		else if (IS_ELKHARTLAKE(i915))</div><div class='ctx'> 			encoder-&gt;get_buf_trans = ehl_get_combo_buf_trans;</div><div class='del'>-		else if (intel_phy_is_combo(i915, phy))</div><div class='add'>+		else if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 			encoder-&gt;get_buf_trans = icl_get_combo_buf_trans;</div><div class='ctx'> 		else</div><div class='ctx'> 			encoder-&gt;get_buf_trans = icl_get_mg_buf_trans;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h<br/>index 42552d8c151e..e881bfeafb47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_de.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_de.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_de.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_de.h</a></div><div class='hunk'>@@ -10,80 +10,185 @@</div><div class='ctx'> #include "i915_trace.h"</div><div class='ctx'> #include "intel_uncore.h"</div><div class='ctx'> </div><div class='add'>+static inline struct intel_uncore *__to_uncore(struct intel_display *display)</div><div class='add'>+{</div><div class='add'>+	return &amp;to_i915(display-&gt;drm)-&gt;uncore;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32</div><div class='del'>-intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)</div><div class='add'>+__intel_de_read(struct intel_display *display, i915_reg_t reg)</div><div class='ctx'> {</div><div class='del'>-	return intel_uncore_read(&amp;i915-&gt;uncore, reg);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	val = intel_uncore_read(__to_uncore(display), reg);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_read(p,...) __intel_de_read(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline u8</div><div class='del'>-intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)</div><div class='add'>+__intel_de_read8(struct intel_display *display, i915_reg_t reg)</div><div class='ctx'> {</div><div class='del'>-	return intel_uncore_read8(&amp;i915-&gt;uncore, reg);</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	val = intel_uncore_read8(__to_uncore(display), reg);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_read8(p,...) __intel_de_read8(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline u64</div><div class='del'>-intel_de_read64_2x32(struct drm_i915_private *i915,</div><div class='del'>-		     i915_reg_t lower_reg, i915_reg_t upper_reg)</div><div class='add'>+__intel_de_read64_2x32(struct intel_display *display,</div><div class='add'>+		       i915_reg_t lower_reg, i915_reg_t upper_reg)</div><div class='ctx'> {</div><div class='del'>-	return intel_uncore_read64_2x32(&amp;i915-&gt;uncore, lower_reg, upper_reg);</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, lower_reg);</div><div class='add'>+	intel_dmc_wl_get(display, upper_reg);</div><div class='add'>+</div><div class='add'>+	val = intel_uncore_read64_2x32(__to_uncore(display), lower_reg,</div><div class='add'>+				       upper_reg);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, upper_reg);</div><div class='add'>+	intel_dmc_wl_put(display, lower_reg);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_read64_2x32(p,...) __intel_de_read64_2x32(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)</div><div class='add'>+__intel_de_posting_read(struct intel_display *display, i915_reg_t reg)</div><div class='ctx'> {</div><div class='del'>-	intel_uncore_posting_read(&amp;i915-&gt;uncore, reg);</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	intel_uncore_posting_read(__to_uncore(display), reg);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='ctx'> }</div><div class='add'>+#define intel_de_posting_read(p,...) __intel_de_posting_read(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)</div><div class='add'>+__intel_de_write(struct intel_display *display, i915_reg_t reg, u32 val)</div><div class='ctx'> {</div><div class='del'>-	intel_uncore_write(&amp;i915-&gt;uncore, reg, val);</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	intel_uncore_write(__to_uncore(display), reg, val);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='ctx'> }</div><div class='add'>+#define intel_de_write(p,...) __intel_de_write(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline u32</div><div class='del'>-intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)</div><div class='add'>+____intel_de_rmw_nowl(struct intel_display *display, i915_reg_t reg,</div><div class='add'>+		      u32 clear, u32 set)</div><div class='ctx'> {</div><div class='del'>-	return intel_uncore_rmw(&amp;i915-&gt;uncore, reg, clear, set);</div><div class='add'>+	return intel_uncore_rmw(__to_uncore(display), reg, clear, set);</div><div class='ctx'> }</div><div class='add'>+#define __intel_de_rmw_nowl(p,...) ____intel_de_rmw_nowl(__to_intel_display(p), __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+__intel_de_rmw(struct intel_display *display, i915_reg_t reg, u32 clear,</div><div class='add'>+	       u32 set)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	val = __intel_de_rmw_nowl(display, reg, clear, set);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#define intel_de_rmw(p,...) __intel_de_rmw(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,</div><div class='del'>-			   u32 mask, u32 value, unsigned int timeout)</div><div class='add'>+____intel_de_wait_for_register_nowl(struct intel_display *display,</div><div class='add'>+				    i915_reg_t reg,</div><div class='add'>+				    u32 mask, u32 value, unsigned int timeout)</div><div class='ctx'> {</div><div class='del'>-	return intel_wait_for_register(&amp;i915-&gt;uncore, reg, mask, value, timeout);</div><div class='add'>+	return intel_wait_for_register(__to_uncore(display), reg, mask,</div><div class='add'>+				       value, timeout);</div><div class='ctx'> }</div><div class='add'>+#define __intel_de_wait_for_register_nowl(p,...) ____intel_de_wait_for_register_nowl(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg,</div><div class='del'>-			      u32 mask, u32 value, unsigned int timeout)</div><div class='add'>+__intel_de_wait(struct intel_display *display, i915_reg_t reg,</div><div class='add'>+		u32 mask, u32 value, unsigned int timeout)</div><div class='ctx'> {</div><div class='del'>-	return intel_wait_for_register_fw(&amp;i915-&gt;uncore, reg, mask, value, timeout);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	ret = __intel_de_wait_for_register_nowl(display, reg, mask, value,</div><div class='add'>+						timeout);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_wait(p,...) __intel_de_wait(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-__intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,</div><div class='del'>-			     u32 mask, u32 value,</div><div class='del'>-			     unsigned int fast_timeout_us,</div><div class='del'>-			     unsigned int slow_timeout_ms, u32 *out_value)</div><div class='add'>+__intel_de_wait_fw(struct intel_display *display, i915_reg_t reg,</div><div class='add'>+		   u32 mask, u32 value, unsigned int timeout)</div><div class='ctx'> {</div><div class='del'>-	return __intel_wait_for_register(&amp;i915-&gt;uncore, reg, mask, value,</div><div class='del'>-					 fast_timeout_us, slow_timeout_ms, out_value);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	ret = intel_wait_for_register_fw(__to_uncore(display), reg, mask,</div><div class='add'>+					 value, timeout);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_wait_fw(p,...) __intel_de_wait_fw(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg,</div><div class='del'>-		      u32 mask, unsigned int timeout)</div><div class='add'>+__intel_de_wait_custom(struct intel_display *display, i915_reg_t reg,</div><div class='add'>+		       u32 mask, u32 value,</div><div class='add'>+		       unsigned int fast_timeout_us,</div><div class='add'>+		       unsigned int slow_timeout_ms, u32 *out_value)</div><div class='ctx'> {</div><div class='del'>-	return intel_de_wait_for_register(i915, reg, mask, mask, timeout);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_get(display, reg);</div><div class='add'>+</div><div class='add'>+	ret = __intel_wait_for_register(__to_uncore(display), reg, mask,</div><div class='add'>+					value,</div><div class='add'>+					fast_timeout_us, slow_timeout_ms, out_value);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_put(display, reg);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_wait_custom(p,...) __intel_de_wait_custom(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-intel_de_wait_for_clear(struct drm_i915_private *i915, i915_reg_t reg,</div><div class='add'>+__intel_de_wait_for_set(struct intel_display *display, i915_reg_t reg,</div><div class='ctx'> 			u32 mask, unsigned int timeout)</div><div class='ctx'> {</div><div class='del'>-	return intel_de_wait_for_register(i915, reg, mask, 0, timeout);</div><div class='add'>+	return intel_de_wait(display, reg, mask, mask, timeout);</div><div class='add'>+}</div><div class='add'>+#define intel_de_wait_for_set(p,...) __intel_de_wait_for_set(__to_intel_display(p), __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+__intel_de_wait_for_clear(struct intel_display *display, i915_reg_t reg,</div><div class='add'>+			  u32 mask, unsigned int timeout)</div><div class='add'>+{</div><div class='add'>+	return intel_de_wait(display, reg, mask, 0, timeout);</div><div class='ctx'> }</div><div class='add'>+#define intel_de_wait_for_clear(p,...) __intel_de_wait_for_clear(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Unlocked mmio-accessors, think carefully before using these.</div><div class='hunk'>@@ -94,33 +199,38 @@ intel_de_wait_for_clear(struct drm_i915_private *i915, i915_reg_t reg,</div><div class='ctx'>  * a more localised lock guarding all access to that bank of registers.</div><div class='ctx'>  */</div><div class='ctx'> static inline u32</div><div class='del'>-intel_de_read_fw(struct drm_i915_private *i915, i915_reg_t reg)</div><div class='add'>+__intel_de_read_fw(struct intel_display *display, i915_reg_t reg)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	val = intel_uncore_read_fw(&amp;i915-&gt;uncore, reg);</div><div class='add'>+	val = intel_uncore_read_fw(__to_uncore(display), reg);</div><div class='ctx'> 	trace_i915_reg_rw(false, reg, val, sizeof(val), true);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='add'>+#define intel_de_read_fw(p,...) __intel_de_read_fw(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)</div><div class='add'>+__intel_de_write_fw(struct intel_display *display, i915_reg_t reg, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	trace_i915_reg_rw(true, reg, val, sizeof(val), true);</div><div class='del'>-	intel_uncore_write_fw(&amp;i915-&gt;uncore, reg, val);</div><div class='add'>+	intel_uncore_write_fw(__to_uncore(display), reg, val);</div><div class='ctx'> }</div><div class='add'>+#define intel_de_write_fw(p,...) __intel_de_write_fw(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline u32</div><div class='del'>-intel_de_read_notrace(struct drm_i915_private *i915, i915_reg_t reg)</div><div class='add'>+__intel_de_read_notrace(struct intel_display *display, i915_reg_t reg)</div><div class='ctx'> {</div><div class='del'>-	return intel_uncore_read_notrace(&amp;i915-&gt;uncore, reg);</div><div class='add'>+	return intel_uncore_read_notrace(__to_uncore(display), reg);</div><div class='ctx'> }</div><div class='add'>+#define intel_de_read_notrace(p,...) __intel_de_read_notrace(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-intel_de_write_notrace(struct drm_i915_private *i915, i915_reg_t reg, u32 val)</div><div class='add'>+__intel_de_write_notrace(struct intel_display *display, i915_reg_t reg,</div><div class='add'>+			 u32 val)</div><div class='ctx'> {</div><div class='del'>-	intel_uncore_write_notrace(&amp;i915-&gt;uncore, reg, val);</div><div class='add'>+	intel_uncore_write_notrace(__to_uncore(display), reg, val);</div><div class='ctx'> }</div><div class='add'>+#define intel_de_write_notrace(p,...) __intel_de_write_notrace(__to_intel_display(p), __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_DE_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c<br/>index 8af9e6128277..273323f30ae2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display.c</a></div><div class='hunk'>@@ -85,7 +85,6 @@</div><div class='ctx'> #include "intel_dvo.h"</div><div class='ctx'> #include "intel_fb.h"</div><div class='ctx'> #include "intel_fbc.h"</div><div class='del'>-#include "intel_fbdev.h"</div><div class='ctx'> #include "intel_fdi.h"</div><div class='ctx'> #include "intel_fifo_underrun.h"</div><div class='ctx'> #include "intel_frontbuffer.h"</div><div class='hunk'>@@ -120,6 +119,7 @@</div><div class='ctx'> #include "skl_scaler.h"</div><div class='ctx'> #include "skl_universal_plane.h"</div><div class='ctx'> #include "skl_watermark.h"</div><div class='add'>+#include "vlv_dpio_phy_regs.h"</div><div class='ctx'> #include "vlv_dsi.h"</div><div class='ctx'> #include "vlv_dsi_pll.h"</div><div class='ctx'> #include "vlv_dsi_regs.h"</div><div class='hunk'>@@ -275,6 +275,13 @@ static int intel_bigjoiner_num_pipes(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	return hweight8(crtc_state-&gt;bigjoiner_pipes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+</div><div class='add'>+	return BIT(crtc-&gt;pipe) | crtc_state-&gt;bigjoiner_pipes;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='hunk'>@@ -383,8 +390,7 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_de_wait_for_register(dev_priv, dpll_reg,</div><div class='del'>-				       port_mask, expected_mask, 1000))</div><div class='add'>+	if (intel_de_wait(dev_priv, dpll_reg, port_mask, expected_mask, 1000))</div><div class='ctx'> 		drm_WARN(&amp;dev_priv-&gt;drm, 1,</div><div class='ctx'> 			 "timed out waiting for [ENCODER:%d:%s] port ready: got 0x%x, expected 0x%x\n",</div><div class='ctx'> 			 dig_port-&gt;base.base.base.id, dig_port-&gt;base.base.name,</div><div class='hunk'>@@ -430,6 +436,18 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)</div><div class='ctx'> 		intel_de_rmw(dev_priv, PIPE_ARB_CTL(pipe),</div><div class='ctx'> 			     0, PIPE_ARB_USE_PROG_SLOTS);</div><div class='ctx'> </div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 14) {</div><div class='add'>+		u32 clear = DP_DSC_INSERT_SF_AT_EOL_WA;</div><div class='add'>+		u32 set = 0;</div><div class='add'>+</div><div class='add'>+		if (DISPLAY_VER(dev_priv) == 14)</div><div class='add'>+			set |= DP_FEC_BS_JITTER_WA;</div><div class='add'>+</div><div class='add'>+		intel_de_rmw(dev_priv,</div><div class='add'>+			     hsw_chicken_trans_reg(dev_priv, cpu_transcoder),</div><div class='add'>+			     clear, set);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));</div><div class='ctx'> 	if (val &amp; TRANSCONF_ENABLE) {</div><div class='ctx'> 		/* we keep both pipes enabled on 830 */</div><div class='hunk'>@@ -437,6 +455,14 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Wa_1409098942:adlp+ */</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 13 &amp;&amp;</div><div class='add'>+	    new_crtc_state-&gt;dsc.compression_enable) {</div><div class='add'>+		val &amp;= ~TRANSCONF_PIXEL_COUNT_SCALING_MASK;</div><div class='add'>+		val |= REG_FIELD_PREP(TRANSCONF_PIXEL_COUNT_SCALING_MASK,</div><div class='add'>+				      TRANSCONF_PIXEL_COUNT_SCALING_X4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder),</div><div class='ctx'> 		       val | TRANSCONF_ENABLE);</div><div class='ctx'> 	intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));</div><div class='hunk'>@@ -483,6 +509,11 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)</div><div class='ctx'> 	if (!IS_I830(dev_priv))</div><div class='ctx'> 		val &amp;= ~TRANSCONF_ENABLE;</div><div class='ctx'> </div><div class='add'>+	/* Wa_1409098942:adlp+ */</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 13 &amp;&amp;</div><div class='add'>+	    old_crtc_state-&gt;dsc.compression_enable)</div><div class='add'>+		val &amp;= ~TRANSCONF_PIXEL_COUNT_SCALING_MASK;</div><div class='add'>+</div><div class='ctx'> 	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 12)</div><div class='hunk'>@@ -535,7 +566,7 @@ bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(plane-&gt;base.dev);</div><div class='ctx'> </div><div class='ctx'> 	return DISPLAY_VER(dev_priv) &lt; 4 ||</div><div class='del'>-		(plane-&gt;fbc &amp;&amp;</div><div class='add'>+		(plane-&gt;fbc &amp;&amp; !plane_state-&gt;no_fbc_reason &amp;&amp;</div><div class='ctx'> 		 plane_state-&gt;view.gtt.type == I915_GTT_VIEW_NORMAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1552,18 +1583,21 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,</div><div class='ctx'> 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void glk_pipe_scaler_clock_gating_wa(struct drm_i915_private *dev_priv,</div><div class='del'>-					    enum pipe pipe, bool apply)</div><div class='add'>+/* Display WA #1180: WaDisableScalarClockGating: glk */</div><div class='add'>+static bool glk_need_scaler_clock_gating_wa(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	u32 val = intel_de_read(dev_priv, CLKGATE_DIS_PSL(pipe));</div><div class='del'>-	u32 mask = DPF_GATING_DIS | DPF_RAM_GATING_DIS | DPFR_GATING_DIS;</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	if (apply)</div><div class='del'>-		val |= mask;</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~mask;</div><div class='add'>+	return DISPLAY_VER(i915) == 10 &amp;&amp; crtc_state-&gt;pch_pfit.enabled;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, CLKGATE_DIS_PSL(pipe), val);</div><div class='add'>+static void glk_pipe_scaler_clock_gating_wa(struct intel_crtc *crtc, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	u32 mask = DPF_GATING_DIS | DPF_RAM_GATING_DIS | DPFR_GATING_DIS;</div><div class='add'>+</div><div class='add'>+	intel_de_rmw(i915, CLKGATE_DIS_PSL(crtc-&gt;pipe),</div><div class='add'>+		     mask, enable ? mask : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hsw_set_linetime_wm(const struct intel_crtc_state *crtc_state)</div><div class='hunk'>@@ -1586,24 +1620,6 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 		     HSW_FRAME_START_DELAY(crtc_state-&gt;framestart_delay - 1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,</div><div class='del'>-					 const struct intel_crtc_state *crtc_state)</div><div class='del'>-{</div><div class='del'>-	struct intel_crtc *master_crtc = intel_master_crtc(crtc_state);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable sequence steps 1-7 on bigjoiner master</div><div class='del'>-	 */</div><div class='del'>-	if (intel_crtc_is_bigjoiner_slave(crtc_state))</div><div class='del'>-		intel_encoders_pre_pll_enable(state, master_crtc);</div><div class='del'>-</div><div class='del'>-	if (crtc_state-&gt;shared_dpll)</div><div class='del'>-		intel_enable_shared_dpll(crtc_state);</div><div class='del'>-</div><div class='del'>-	if (intel_crtc_is_bigjoiner_slave(crtc_state))</div><div class='del'>-		intel_encoders_pre_enable(state, master_crtc);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='hunk'>@@ -1639,90 +1655,107 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,</div><div class='ctx'> 	const struct intel_crtc_state *new_crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	enum pipe pipe = crtc-&gt;pipe, hsw_workaround_pipe;</div><div class='ctx'> 	enum transcoder cpu_transcoder = new_crtc_state-&gt;cpu_transcoder;</div><div class='del'>-	bool psl_clkgate_wa;</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;dev_priv-&gt;drm, crtc-&gt;active))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_dmc_enable_pipe(dev_priv, crtc-&gt;pipe);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(new_crtc_state))</div><div class='add'>+		intel_dmc_enable_pipe(dev_priv, pipe_crtc-&gt;pipe);</div><div class='ctx'> </div><div class='del'>-	if (!new_crtc_state-&gt;bigjoiner_pipes) {</div><div class='del'>-		intel_encoders_pre_pll_enable(state, crtc);</div><div class='add'>+	intel_encoders_pre_pll_enable(state, crtc);</div><div class='ctx'> </div><div class='del'>-		if (new_crtc_state-&gt;shared_dpll)</div><div class='del'>-			intel_enable_shared_dpll(new_crtc_state);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(new_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-		intel_encoders_pre_enable(state, crtc);</div><div class='del'>-	} else {</div><div class='del'>-		icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);</div><div class='add'>+		if (pipe_crtc_state-&gt;shared_dpll)</div><div class='add'>+			intel_enable_shared_dpll(pipe_crtc_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_dsc_enable(new_crtc_state);</div><div class='add'>+	intel_encoders_pre_enable(state, crtc);</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 13)</div><div class='del'>-		intel_uncompressed_joiner_enable(new_crtc_state);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(new_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-	intel_set_pipe_src_size(new_crtc_state);</div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 9 || IS_BROADWELL(dev_priv))</div><div class='del'>-		bdw_set_pipe_misc(new_crtc_state);</div><div class='add'>+		intel_dsc_enable(pipe_crtc_state);</div><div class='add'>+</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &gt;= 13)</div><div class='add'>+			intel_uncompressed_joiner_enable(pipe_crtc_state);</div><div class='add'>+</div><div class='add'>+		intel_set_pipe_src_size(pipe_crtc_state);</div><div class='ctx'> </div><div class='del'>-	if (!intel_crtc_is_bigjoiner_slave(new_crtc_state) &amp;&amp;</div><div class='del'>-	    !transcoder_is_dsi(cpu_transcoder))</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &gt;= 9 || IS_BROADWELL(dev_priv))</div><div class='add'>+			bdw_set_pipe_misc(pipe_crtc_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!transcoder_is_dsi(cpu_transcoder))</div><div class='ctx'> 		hsw_configure_cpu_transcoder(new_crtc_state);</div><div class='ctx'> </div><div class='del'>-	crtc-&gt;active = true;</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(new_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-	/* Display WA #1180: WaDisableScalarClockGating: glk */</div><div class='del'>-	psl_clkgate_wa = DISPLAY_VER(dev_priv) == 10 &amp;&amp;</div><div class='del'>-		new_crtc_state-&gt;pch_pfit.enabled;</div><div class='del'>-	if (psl_clkgate_wa)</div><div class='del'>-		glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);</div><div class='add'>+		pipe_crtc-&gt;active = true;</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 9)</div><div class='del'>-		skl_pfit_enable(new_crtc_state);</div><div class='del'>-	else</div><div class='del'>-		ilk_pfit_enable(new_crtc_state);</div><div class='add'>+		if (glk_need_scaler_clock_gating_wa(pipe_crtc_state))</div><div class='add'>+			glk_pipe_scaler_clock_gating_wa(pipe_crtc, true);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * On ILK+ LUT must be loaded before the pipe is running but with</div><div class='del'>-	 * clocks enabled</div><div class='del'>-	 */</div><div class='del'>-	intel_color_load_luts(new_crtc_state);</div><div class='del'>-	intel_color_commit_noarm(new_crtc_state);</div><div class='del'>-	intel_color_commit_arm(new_crtc_state);</div><div class='del'>-	/* update DSPCNTR to configure gamma/csc for pipe bottom color */</div><div class='del'>-	if (DISPLAY_VER(dev_priv) &lt; 9)</div><div class='del'>-		intel_disable_primary_plane(new_crtc_state);</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &gt;= 9)</div><div class='add'>+			skl_pfit_enable(pipe_crtc_state);</div><div class='add'>+		else</div><div class='add'>+			ilk_pfit_enable(pipe_crtc_state);</div><div class='ctx'> </div><div class='del'>-	hsw_set_linetime_wm(new_crtc_state);</div><div class='add'>+		/*</div><div class='add'>+		 * On ILK+ LUT must be loaded before the pipe is running but with</div><div class='add'>+		 * clocks enabled</div><div class='add'>+		 */</div><div class='add'>+		intel_color_load_luts(pipe_crtc_state);</div><div class='add'>+		intel_color_commit_noarm(pipe_crtc_state);</div><div class='add'>+		intel_color_commit_arm(pipe_crtc_state);</div><div class='add'>+		/* update DSPCNTR to configure gamma/csc for pipe bottom color */</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &lt; 9)</div><div class='add'>+			intel_disable_primary_plane(pipe_crtc_state);</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 11)</div><div class='del'>-		icl_set_pipe_chicken(new_crtc_state);</div><div class='add'>+		hsw_set_linetime_wm(pipe_crtc_state);</div><div class='ctx'> </div><div class='del'>-	intel_initial_watermarks(state, crtc);</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &gt;= 11)</div><div class='add'>+			icl_set_pipe_chicken(pipe_crtc_state);</div><div class='ctx'> </div><div class='del'>-	if (intel_crtc_is_bigjoiner_slave(new_crtc_state))</div><div class='del'>-		intel_crtc_vblank_on(new_crtc_state);</div><div class='add'>+		intel_initial_watermarks(state, pipe_crtc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	intel_encoders_enable(state, crtc);</div><div class='ctx'> </div><div class='del'>-	if (psl_clkgate_wa) {</div><div class='del'>-		intel_crtc_wait_for_next_vblank(crtc);</div><div class='del'>-		glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, false);</div><div class='del'>-	}</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(new_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='add'>+		enum pipe hsw_workaround_pipe;</div><div class='ctx'> </div><div class='del'>-	/* If we change the relative order between pipe/planes enabling, we need</div><div class='del'>-	 * to change the workaround. */</div><div class='del'>-	hsw_workaround_pipe = new_crtc_state-&gt;hsw_workaround_pipe;</div><div class='del'>-	if (IS_HASWELL(dev_priv) &amp;&amp; hsw_workaround_pipe != INVALID_PIPE) {</div><div class='del'>-		struct intel_crtc *wa_crtc;</div><div class='add'>+		if (glk_need_scaler_clock_gating_wa(pipe_crtc_state)) {</div><div class='add'>+			intel_crtc_wait_for_next_vblank(pipe_crtc);</div><div class='add'>+			glk_pipe_scaler_clock_gating_wa(pipe_crtc, false);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		wa_crtc = intel_crtc_for_pipe(dev_priv, hsw_workaround_pipe);</div><div class='add'>+		/*</div><div class='add'>+		 * If we change the relative order between pipe/planes</div><div class='add'>+		 * enabling, we need to change the workaround.</div><div class='add'>+		 */</div><div class='add'>+		hsw_workaround_pipe = pipe_crtc_state-&gt;hsw_workaround_pipe;</div><div class='add'>+		if (IS_HASWELL(dev_priv) &amp;&amp; hsw_workaround_pipe != INVALID_PIPE) {</div><div class='add'>+			struct intel_crtc *wa_crtc =</div><div class='add'>+				intel_crtc_for_pipe(dev_priv, hsw_workaround_pipe);</div><div class='ctx'> </div><div class='del'>-		intel_crtc_wait_for_next_vblank(wa_crtc);</div><div class='del'>-		intel_crtc_wait_for_next_vblank(wa_crtc);</div><div class='add'>+			intel_crtc_wait_for_next_vblank(wa_crtc);</div><div class='add'>+			intel_crtc_wait_for_next_vblank(wa_crtc);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1786,29 +1819,28 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,</div><div class='ctx'> 	const struct intel_crtc_state *old_crtc_state =</div><div class='ctx'> 		intel_atomic_get_old_crtc_state(state, crtc);</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME collapse everything to one hook.</div><div class='ctx'> 	 * Need care with mst-&gt;ddi interactions.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) {</div><div class='del'>-		intel_encoders_disable(state, crtc);</div><div class='del'>-		intel_encoders_post_disable(state, crtc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	intel_disable_shared_dpll(old_crtc_state);</div><div class='add'>+	intel_encoders_disable(state, crtc);</div><div class='add'>+	intel_encoders_post_disable(state, crtc);</div><div class='ctx'> </div><div class='del'>-	if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) {</div><div class='del'>-		struct intel_crtc *slave_crtc;</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;i915-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *old_pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_old_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-		intel_encoders_post_pll_disable(state, crtc);</div><div class='add'>+		intel_disable_shared_dpll(old_pipe_crtc_state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		intel_dmc_disable_pipe(i915, crtc-&gt;pipe);</div><div class='add'>+	intel_encoders_post_pll_disable(state, crtc);</div><div class='ctx'> </div><div class='del'>-		for_each_intel_crtc_in_pipe_mask(&amp;i915-&gt;drm, slave_crtc,</div><div class='del'>-						 intel_crtc_bigjoiner_slave_pipes(old_crtc_state))</div><div class='del'>-			intel_dmc_disable_pipe(i915, slave_crtc-&gt;pipe);</div><div class='del'>-	}</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;i915-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state))</div><div class='add'>+		intel_dmc_disable_pipe(i915, pipe_crtc-&gt;pipe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)</div><div class='hunk'>@@ -1836,6 +1868,7 @@ static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	intel_de_write(dev_priv, BCLRPAT(crtc-&gt;pipe), 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Prefer intel_encoder_is_combo() */</div><div class='ctx'> bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	if (phy == PHY_NONE)</div><div class='hunk'>@@ -1857,6 +1890,7 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)</div><div class='ctx'> 		return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Prefer intel_encoder_is_tc() */</div><div class='ctx'> bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1877,6 +1911,7 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Prefer intel_encoder_is_snps() */</div><div class='ctx'> bool intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1886,6 +1921,7 @@ bool intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy)</div><div class='ctx'> 	return IS_DG2(dev_priv) &amp;&amp; phy &gt; PHY_NONE &amp;&amp; phy &lt;= PHY_E;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Prefer intel_encoder_to_phy() */</div><div class='ctx'> enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port)</div><div class='ctx'> {</div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 13 &amp;&amp; port &gt;= PORT_D_XELPD)</div><div class='hunk'>@@ -1903,6 +1939,7 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port)</div><div class='ctx'> 	return PHY_A + port - PORT_A;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Prefer intel_encoder_to_tc() */</div><div class='ctx'> enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)</div><div class='ctx'> {</div><div class='ctx'> 	if (!intel_phy_is_tc(dev_priv, intel_port_to_phy(dev_priv, port)))</div><div class='hunk'>@@ -1914,6 +1951,41 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)</div><div class='ctx'> 		return TC_PORT_1 + port - PORT_C;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum phy intel_encoder_to_phy(struct intel_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	return intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool intel_encoder_is_combo(struct intel_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	return intel_phy_is_combo(i915, intel_encoder_to_phy(encoder));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool intel_encoder_is_snps(struct intel_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	return intel_phy_is_snps(i915, intel_encoder_to_phy(encoder));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool intel_encoder_is_tc(struct intel_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	return intel_phy_is_tc(i915, intel_encoder_to_phy(encoder));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum tc_port intel_encoder_to_tc(struct intel_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	return intel_port_to_tc(i915, encoder-&gt;port);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum intel_display_power_domain</div><div class='ctx'> intel_aux_power_domain(struct intel_digital_port *dig_port)</div><div class='ctx'> {</div><div class='hunk'>@@ -2381,7 +2453,7 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	struct drm_display_mode *adjusted_mode = &amp;crtc_state-&gt;hw.adjusted_mode;</div><div class='ctx'> 	struct drm_display_mode *pipe_mode = &amp;crtc_state-&gt;hw.pipe_mode;</div><div class='del'>-	int clock_limit = i915-&gt;max_dotclk_freq;</div><div class='add'>+	int clock_limit = i915-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Start with the adjusted_mode crtc timings, which</div><div class='hunk'>@@ -2405,7 +2477,7 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (intel_crtc_supports_double_wide(crtc) &amp;&amp;</div><div class='ctx'> 		    pipe_mode-&gt;crtc_clock &gt; clock_limit) {</div><div class='del'>-			clock_limit = i915-&gt;max_dotclk_freq;</div><div class='add'>+			clock_limit = i915-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 			crtc_state-&gt;double_wide = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2999,19 +3071,16 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	i9xx_get_pfit_config(pipe_config);</div><div class='ctx'> </div><div class='add'>+	i9xx_dpll_get_hw_state(crtc, &amp;pipe_config-&gt;dpll_hw_state);</div><div class='add'>+</div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 4) {</div><div class='del'>-		/* No way to read it out on pipes B and C */</div><div class='del'>-		if (IS_CHERRYVIEW(dev_priv) &amp;&amp; crtc-&gt;pipe != PIPE_A)</div><div class='del'>-			tmp = dev_priv-&gt;display.state.chv_dpll_md[crtc-&gt;pipe];</div><div class='del'>-		else</div><div class='del'>-			tmp = intel_de_read(dev_priv, DPLL_MD(crtc-&gt;pipe));</div><div class='add'>+		tmp = pipe_config-&gt;dpll_hw_state.i9xx.dpll_md;</div><div class='ctx'> 		pipe_config-&gt;pixel_multiplier =</div><div class='ctx'> 			((tmp &amp; DPLL_MD_UDI_MULTIPLIER_MASK)</div><div class='ctx'> 			 &gt;&gt; DPLL_MD_UDI_MULTIPLIER_SHIFT) + 1;</div><div class='del'>-		pipe_config-&gt;dpll_hw_state.dpll_md = tmp;</div><div class='ctx'> 	} else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||</div><div class='ctx'> 		   IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {</div><div class='del'>-		tmp = intel_de_read(dev_priv, DPLL(crtc-&gt;pipe));</div><div class='add'>+		tmp = pipe_config-&gt;dpll_hw_state.i9xx.dpll;</div><div class='ctx'> 		pipe_config-&gt;pixel_multiplier =</div><div class='ctx'> 			((tmp &amp; SDVO_MULTIPLIER_MASK)</div><div class='ctx'> 			 &gt;&gt; SDVO_MULTIPLIER_SHIFT_HIRES) + 1;</div><div class='hunk'>@@ -3021,26 +3090,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,</div><div class='ctx'> 		 * function. */</div><div class='ctx'> 		pipe_config-&gt;pixel_multiplier = 1;</div><div class='ctx'> 	}</div><div class='del'>-	pipe_config-&gt;dpll_hw_state.dpll = intel_de_read(dev_priv,</div><div class='del'>-							DPLL(crtc-&gt;pipe));</div><div class='del'>-	if (!IS_VALLEYVIEW(dev_priv) &amp;&amp; !IS_CHERRYVIEW(dev_priv)) {</div><div class='del'>-		pipe_config-&gt;dpll_hw_state.fp0 = intel_de_read(dev_priv,</div><div class='del'>-							       FP0(crtc-&gt;pipe));</div><div class='del'>-		pipe_config-&gt;dpll_hw_state.fp1 = intel_de_read(dev_priv,</div><div class='del'>-							       FP1(crtc-&gt;pipe));</div><div class='del'>-	} else {</div><div class='del'>-		/* Mask out read-only status bits. */</div><div class='del'>-		pipe_config-&gt;dpll_hw_state.dpll &amp;= ~(DPLL_LOCK_VLV |</div><div class='del'>-						     DPLL_PORTC_READY_MASK |</div><div class='del'>-						     DPLL_PORTB_READY_MASK);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CHERRYVIEW(dev_priv))</div><div class='del'>-		chv_crtc_clock_get(crtc, pipe_config);</div><div class='add'>+		chv_crtc_clock_get(pipe_config);</div><div class='ctx'> 	else if (IS_VALLEYVIEW(dev_priv))</div><div class='del'>-		vlv_crtc_clock_get(crtc, pipe_config);</div><div class='add'>+		vlv_crtc_clock_get(pipe_config);</div><div class='ctx'> 	else</div><div class='del'>-		i9xx_crtc_clock_get(crtc, pipe_config);</div><div class='add'>+		i9xx_crtc_clock_get(pipe_config);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Normally the dotclock is filled in by the encoder .get_config()</div><div class='hunk'>@@ -3666,8 +3722,8 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc,</div><div class='ctx'> 					 struct intel_crtc_state *pipe_config,</div><div class='ctx'> 					 struct intel_display_power_domain_set *power_domain_set)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = crtc-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(crtc);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	enum transcoder cpu_transcoder;</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	u32 tmp;</div><div class='hunk'>@@ -3693,11 +3749,11 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* XXX: this works for video mode only */</div><div class='del'>-		tmp = intel_de_read(dev_priv, BXT_MIPI_PORT_CTRL(port));</div><div class='add'>+		tmp = intel_de_read(display, BXT_MIPI_PORT_CTRL(port));</div><div class='ctx'> 		if (!(tmp &amp; DPI_ENABLE))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		tmp = intel_de_read(dev_priv, MIPI_CTRL(port));</div><div class='add'>+		tmp = intel_de_read(display, MIPI_CTRL(display, port));</div><div class='ctx'> 		if ((tmp &amp; BXT_PIPE_SELECT_MASK) != BXT_PIPE_SELECT(crtc-&gt;pipe))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -4714,8 +4770,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	intel_bigjoiner_adjust_pipe_src(crtc_state);</div><div class='del'>-</div><div class='ctx'> 	for_each_new_connector_in_state(&amp;state-&gt;base, connector,</div><div class='ctx'> 					conn_state, i) {</div><div class='ctx'> 		struct intel_encoder *encoder =</div><div class='hunk'>@@ -4783,42 +4837,92 @@ intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='add'>+intel_compare_dp_as_sdp(const struct drm_dp_as_sdp *a,</div><div class='add'>+			const struct drm_dp_as_sdp *b)</div><div class='add'>+{</div><div class='add'>+	return a-&gt;vtotal == b-&gt;vtotal &amp;&amp;</div><div class='add'>+		a-&gt;target_rr == b-&gt;target_rr &amp;&amp;</div><div class='add'>+		a-&gt;duration_incr_ms == b-&gt;duration_incr_ms &amp;&amp;</div><div class='add'>+		a-&gt;duration_decr_ms == b-&gt;duration_decr_ms &amp;&amp;</div><div class='add'>+		a-&gt;mode == b-&gt;mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='ctx'> intel_compare_buffer(const u8 *a, const u8 *b, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	return memcmp(a, b, len) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __printf(5, 6)</div><div class='add'>+pipe_config_mismatch(struct drm_printer *p, bool fastset,</div><div class='add'>+		     const struct intel_crtc *crtc,</div><div class='add'>+		     const char *name, const char *format, ...)</div><div class='add'>+{</div><div class='add'>+	struct va_format vaf;</div><div class='add'>+	va_list args;</div><div class='add'>+</div><div class='add'>+	va_start(args, format);</div><div class='add'>+	vaf.fmt = format;</div><div class='add'>+	vaf.va = &amp;args;</div><div class='add'>+</div><div class='add'>+	if (fastset)</div><div class='add'>+		drm_printf(p, "[CRTC:%d:%s] fastset requirement not met in %s %pV\n",</div><div class='add'>+			   crtc-&gt;base.base.id, crtc-&gt;base.name, name, &amp;vaf);</div><div class='add'>+	else</div><div class='add'>+		drm_printf(p, "[CRTC:%d:%s] mismatch in %s %pV\n",</div><div class='add'>+			   crtc-&gt;base.base.id, crtc-&gt;base.name, name, &amp;vaf);</div><div class='add'>+</div><div class='add'>+	va_end(args);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='del'>-pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv,</div><div class='del'>-			       bool fastset, const char *name,</div><div class='add'>+pipe_config_infoframe_mismatch(struct drm_printer *p, bool fastset,</div><div class='add'>+			       const struct intel_crtc *crtc,</div><div class='add'>+			       const char *name,</div><div class='ctx'> 			       const union hdmi_infoframe *a,</div><div class='ctx'> 			       const union hdmi_infoframe *b)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const char *loglevel;</div><div class='add'>+</div><div class='ctx'> 	if (fastset) {</div><div class='ctx'> 		if (!drm_debug_enabled(DRM_UT_KMS))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='del'>-			    "fastset requirement not met in %s infoframe\n", name);</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm, "expected:\n");</div><div class='del'>-		hdmi_infoframe_log(KERN_DEBUG, dev_priv-&gt;drm.dev, a);</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm, "found:\n");</div><div class='del'>-		hdmi_infoframe_log(KERN_DEBUG, dev_priv-&gt;drm.dev, b);</div><div class='add'>+		loglevel = KERN_DEBUG;</div><div class='ctx'> 	} else {</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm, "mismatch in %s infoframe\n", name);</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm, "expected:\n");</div><div class='del'>-		hdmi_infoframe_log(KERN_ERR, dev_priv-&gt;drm.dev, a);</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm, "found:\n");</div><div class='del'>-		hdmi_infoframe_log(KERN_ERR, dev_priv-&gt;drm.dev, b);</div><div class='add'>+		loglevel = KERN_ERR;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	pipe_config_mismatch(p, fastset, crtc, name, "infoframe");</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "expected:\n");</div><div class='add'>+	hdmi_infoframe_log(loglevel, i915-&gt;drm.dev, a);</div><div class='add'>+	drm_printf(p, "found:\n");</div><div class='add'>+	hdmi_infoframe_log(loglevel, i915-&gt;drm.dev, b);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private *i915,</div><div class='del'>-				bool fastset, const char *name,</div><div class='add'>+pipe_config_dp_vsc_sdp_mismatch(struct drm_printer *p, bool fastset,</div><div class='add'>+				const struct intel_crtc *crtc,</div><div class='add'>+				const char *name,</div><div class='ctx'> 				const struct drm_dp_vsc_sdp *a,</div><div class='ctx'> 				const struct drm_dp_vsc_sdp *b)</div><div class='ctx'> {</div><div class='add'>+	pipe_config_mismatch(p, fastset, crtc, name, "dp sdp");</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "expected:\n");</div><div class='add'>+	drm_dp_vsc_sdp_log(p, a);</div><div class='add'>+	drm_printf(p, "found:\n");</div><div class='add'>+	drm_dp_vsc_sdp_log(p, b);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+pipe_config_dp_as_sdp_mismatch(struct drm_i915_private *i915,</div><div class='add'>+			       bool fastset, const char *name,</div><div class='add'>+			       const struct drm_dp_as_sdp *a,</div><div class='add'>+			       const struct drm_dp_as_sdp *b)</div><div class='add'>+{</div><div class='ctx'> 	struct drm_printer p;</div><div class='ctx'> </div><div class='ctx'> 	if (fastset) {</div><div class='hunk'>@@ -4832,9 +4936,9 @@ pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private *i915,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	drm_printf(&amp;p, "expected:\n");</div><div class='del'>-	drm_dp_vsc_sdp_log(&amp;p, a);</div><div class='add'>+	drm_dp_as_sdp_log(&amp;p, a);</div><div class='ctx'> 	drm_printf(&amp;p, "found:\n");</div><div class='del'>-	drm_dp_vsc_sdp_log(&amp;p, b);</div><div class='add'>+	drm_dp_as_sdp_log(&amp;p, b);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns the length up to and including the last differing byte */</div><div class='hunk'>@@ -4852,64 +4956,35 @@ memcmp_diff_len(const u8 *a, const u8 *b, size_t len)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-pipe_config_buffer_mismatch(bool fastset, const struct intel_crtc *crtc,</div><div class='add'>+pipe_config_buffer_mismatch(struct drm_printer *p, bool fastset,</div><div class='add'>+			    const struct intel_crtc *crtc,</div><div class='ctx'> 			    const char *name,</div><div class='ctx'> 			    const u8 *a, const u8 *b, size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const char *loglevel;</div><div class='ctx'> </div><div class='ctx'> 	if (fastset) {</div><div class='ctx'> 		if (!drm_debug_enabled(DRM_UT_KMS))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		/* only dump up to the last difference */</div><div class='del'>-		len = memcmp_diff_len(a, b, len);</div><div class='del'>-</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='del'>-			    "[CRTC:%d:%s] fastset requirement not met in %s buffer\n",</div><div class='del'>-			    crtc-&gt;base.base.id, crtc-&gt;base.name, name);</div><div class='del'>-		print_hex_dump(KERN_DEBUG, "expected: ", DUMP_PREFIX_NONE,</div><div class='del'>-			       16, 0, a, len, false);</div><div class='del'>-		print_hex_dump(KERN_DEBUG, "found: ", DUMP_PREFIX_NONE,</div><div class='del'>-			       16, 0, b, len, false);</div><div class='add'>+		loglevel = KERN_DEBUG;</div><div class='ctx'> 	} else {</div><div class='del'>-		/* only dump up to the last difference */</div><div class='del'>-		len = memcmp_diff_len(a, b, len);</div><div class='del'>-</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm, "[CRTC:%d:%s] mismatch in %s buffer\n",</div><div class='del'>-			crtc-&gt;base.base.id, crtc-&gt;base.name, name);</div><div class='del'>-		print_hex_dump(KERN_ERR, "expected: ", DUMP_PREFIX_NONE,</div><div class='del'>-			       16, 0, a, len, false);</div><div class='del'>-		print_hex_dump(KERN_ERR, "found: ", DUMP_PREFIX_NONE,</div><div class='del'>-			       16, 0, b, len, false);</div><div class='add'>+		loglevel = KERN_ERR;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void __printf(4, 5)</div><div class='del'>-pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,</div><div class='del'>-		     const char *name, const char *format, ...)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	struct va_format vaf;</div><div class='del'>-	va_list args;</div><div class='add'>+	pipe_config_mismatch(p, fastset, crtc, name, "buffer");</div><div class='ctx'> </div><div class='del'>-	va_start(args, format);</div><div class='del'>-	vaf.fmt = format;</div><div class='del'>-	vaf.va = &amp;args;</div><div class='add'>+	/* only dump up to the last difference */</div><div class='add'>+	len = memcmp_diff_len(a, b, len);</div><div class='ctx'> </div><div class='del'>-	if (fastset)</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "[CRTC:%d:%s] fastset requirement not met in %s %pV\n",</div><div class='del'>-			    crtc-&gt;base.base.id, crtc-&gt;base.name, name, &amp;vaf);</div><div class='del'>-	else</div><div class='del'>-		drm_err(&amp;i915-&gt;drm, "[CRTC:%d:%s] mismatch in %s %pV\n",</div><div class='del'>-			crtc-&gt;base.base.id, crtc-&gt;base.name, name, &amp;vaf);</div><div class='del'>-</div><div class='del'>-	va_end(args);</div><div class='add'>+	print_hex_dump(loglevel, "expected: ", DUMP_PREFIX_NONE,</div><div class='add'>+		       16, 0, a, len, false);</div><div class='add'>+	print_hex_dump(loglevel, "found: ", DUMP_PREFIX_NONE,</div><div class='add'>+		       16, 0, b, len, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-pipe_config_pll_mismatch(bool fastset,</div><div class='add'>+pipe_config_pll_mismatch(struct drm_printer *p, bool fastset,</div><div class='ctx'> 			 const struct intel_crtc *crtc,</div><div class='ctx'> 			 const char *name,</div><div class='ctx'> 			 const struct intel_dpll_hw_state *a,</div><div class='hunk'>@@ -4917,25 +4992,12 @@ pipe_config_pll_mismatch(bool fastset,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> </div><div class='del'>-	if (fastset) {</div><div class='del'>-		if (!drm_debug_enabled(DRM_UT_KMS))</div><div class='del'>-			return;</div><div class='add'>+	pipe_config_mismatch(p, fastset, crtc, name, " "); /* stupid -Werror=format-zero-length */</div><div class='ctx'> </div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-			    "[CRTC:%d:%s] fastset requirement not met in %s\n",</div><div class='del'>-			    crtc-&gt;base.base.id, crtc-&gt;base.name, name);</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "expected:\n");</div><div class='del'>-		intel_dpll_dump_hw_state(i915, a);</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "found:\n");</div><div class='del'>-		intel_dpll_dump_hw_state(i915, b);</div><div class='del'>-	} else {</div><div class='del'>-		drm_err(&amp;i915-&gt;drm, "[CRTC:%d:%s] mismatch in %s buffer\n",</div><div class='del'>-			crtc-&gt;base.base.id, crtc-&gt;base.name, name);</div><div class='del'>-		drm_err(&amp;i915-&gt;drm, "expected:\n");</div><div class='del'>-		intel_dpll_dump_hw_state(i915, a);</div><div class='del'>-		drm_err(&amp;i915-&gt;drm, "found:\n");</div><div class='del'>-		intel_dpll_dump_hw_state(i915, b);</div><div class='del'>-	}</div><div class='add'>+	drm_printf(p, "expected:\n");</div><div class='add'>+	intel_dpll_dump_hw_state(i915, p, a);</div><div class='add'>+	drm_printf(p, "found:\n");</div><div class='add'>+	intel_dpll_dump_hw_state(i915, p, b);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool</div><div class='hunk'>@@ -4945,13 +5007,19 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(current_config-&gt;uapi.crtc-&gt;dev);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(pipe_config-&gt;uapi.crtc);</div><div class='add'>+	struct drm_printer p;</div><div class='ctx'> 	bool ret = true;</div><div class='ctx'> </div><div class='add'>+	if (fastset)</div><div class='add'>+		p = drm_dbg_printer(&amp;dev_priv-&gt;drm, DRM_UT_KMS, NULL);</div><div class='add'>+	else</div><div class='add'>+		p = drm_err_printer(&amp;dev_priv-&gt;drm, NULL);</div><div class='add'>+</div><div class='ctx'> #define PIPE_CONF_CHECK_X(name) do { \</div><div class='ctx'> 	if (current_config-&gt;name != pipe_config-&gt;name) { \</div><div class='ctx'> 		BUILD_BUG_ON_MSG(__same_type(current_config-&gt;name, bool), \</div><div class='ctx'> 				 __stringify(name) " is bool");	\</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 				     "(expected 0x%08x, found 0x%08x)", \</div><div class='ctx'> 				     current_config-&gt;name, \</div><div class='ctx'> 				     pipe_config-&gt;name); \</div><div class='hunk'>@@ -4963,7 +5031,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 	if ((current_config-&gt;name &amp; (mask)) != (pipe_config-&gt;name &amp; (mask))) { \</div><div class='ctx'> 		BUILD_BUG_ON_MSG(__same_type(current_config-&gt;name, bool), \</div><div class='ctx'> 				 __stringify(name) " is bool");	\</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 				     "(expected 0x%08x, found 0x%08x)", \</div><div class='ctx'> 				     current_config-&gt;name &amp; (mask), \</div><div class='ctx'> 				     pipe_config-&gt;name &amp; (mask)); \</div><div class='hunk'>@@ -4975,7 +5043,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 	if (current_config-&gt;name != pipe_config-&gt;name) { \</div><div class='ctx'> 		BUILD_BUG_ON_MSG(__same_type(current_config-&gt;name, bool), \</div><div class='ctx'> 				 __stringify(name) " is bool");	\</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 				     "(expected %i, found %i)", \</div><div class='ctx'> 				     current_config-&gt;name, \</div><div class='ctx'> 				     pipe_config-&gt;name); \</div><div class='hunk'>@@ -4987,7 +5055,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 	if (current_config-&gt;name != pipe_config-&gt;name) { \</div><div class='ctx'> 		BUILD_BUG_ON_MSG(!__same_type(current_config-&gt;name, bool), \</div><div class='ctx'> 				 __stringify(name) " is not bool");	\</div><div class='del'>-		pipe_config_mismatch(fastset, crtc,  __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc,  __stringify(name), \</div><div class='ctx'> 				     "(expected %s, found %s)", \</div><div class='ctx'> 				     str_yes_no(current_config-&gt;name), \</div><div class='ctx'> 				     str_yes_no(pipe_config-&gt;name)); \</div><div class='hunk'>@@ -4997,7 +5065,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> </div><div class='ctx'> #define PIPE_CONF_CHECK_P(name) do { \</div><div class='ctx'> 	if (current_config-&gt;name != pipe_config-&gt;name) { \</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 				     "(expected %p, found %p)", \</div><div class='ctx'> 				     current_config-&gt;name, \</div><div class='ctx'> 				     pipe_config-&gt;name); \</div><div class='hunk'>@@ -5008,7 +5076,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> #define PIPE_CONF_CHECK_M_N(name) do { \</div><div class='ctx'> 	if (!intel_compare_link_m_n(&amp;current_config-&gt;name, \</div><div class='ctx'> 				    &amp;pipe_config-&gt;name)) { \</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 				     "(expected tu %i data %i/%i link %i/%i, " \</div><div class='ctx'> 				     "found tu %i, data %i/%i link %i/%i)", \</div><div class='ctx'> 				     current_config-&gt;name.tu, \</div><div class='hunk'>@@ -5028,7 +5096,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> #define PIPE_CONF_CHECK_PLL(name) do { \</div><div class='ctx'> 	if (!intel_dpll_compare_hw_state(dev_priv, &amp;current_config-&gt;name, \</div><div class='ctx'> 					 &amp;pipe_config-&gt;name)) { \</div><div class='del'>-		pipe_config_pll_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_pll_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 					 &amp;current_config-&gt;name, \</div><div class='ctx'> 					 &amp;pipe_config-&gt;name); \</div><div class='ctx'> 		ret = false; \</div><div class='hunk'>@@ -5061,7 +5129,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> </div><div class='ctx'> #define PIPE_CONF_CHECK_FLAGS(name, mask) do { \</div><div class='ctx'> 	if ((current_config-&gt;name ^ pipe_config-&gt;name) &amp; (mask)) { \</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 				     "(%x) (expected %i, found %i)", \</div><div class='ctx'> 				     (mask), \</div><div class='ctx'> 				     current_config-&gt;name &amp; (mask), \</div><div class='hunk'>@@ -5073,7 +5141,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> #define PIPE_CONF_CHECK_INFOFRAME(name) do { \</div><div class='ctx'> 	if (!intel_compare_infoframe(&amp;current_config-&gt;infoframes.name, \</div><div class='ctx'> 				     &amp;pipe_config-&gt;infoframes.name)) { \</div><div class='del'>-		pipe_config_infoframe_mismatch(dev_priv, fastset, __stringify(name), \</div><div class='add'>+		pipe_config_infoframe_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 					       &amp;current_config-&gt;infoframes.name, \</div><div class='ctx'> 					       &amp;pipe_config-&gt;infoframes.name); \</div><div class='ctx'> 		ret = false; \</div><div class='hunk'>@@ -5083,7 +5151,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> #define PIPE_CONF_CHECK_DP_VSC_SDP(name) do { \</div><div class='ctx'> 	if (!intel_compare_dp_vsc_sdp(&amp;current_config-&gt;infoframes.name, \</div><div class='ctx'> 				      &amp;pipe_config-&gt;infoframes.name)) { \</div><div class='del'>-		pipe_config_dp_vsc_sdp_mismatch(dev_priv, fastset, __stringify(name), \</div><div class='add'>+		pipe_config_dp_vsc_sdp_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='add'>+						&amp;current_config-&gt;infoframes.name, \</div><div class='add'>+						&amp;pipe_config-&gt;infoframes.name); \</div><div class='add'>+		ret = false; \</div><div class='add'>+	} \</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \</div><div class='add'>+	if (!intel_compare_dp_as_sdp(&amp;current_config-&gt;infoframes.name, \</div><div class='add'>+				      &amp;pipe_config-&gt;infoframes.name)) { \</div><div class='add'>+		pipe_config_dp_as_sdp_mismatch(dev_priv, fastset, __stringify(name), \</div><div class='ctx'> 						&amp;current_config-&gt;infoframes.name, \</div><div class='ctx'> 						&amp;pipe_config-&gt;infoframes.name); \</div><div class='ctx'> 		ret = false; \</div><div class='hunk'>@@ -5094,7 +5172,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(current_config-&gt;name) != (len)); \</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(pipe_config-&gt;name) != (len)); \</div><div class='ctx'> 	if (!intel_compare_buffer(current_config-&gt;name, pipe_config-&gt;name, (len))) { \</div><div class='del'>-		pipe_config_buffer_mismatch(fastset, crtc, __stringify(name), \</div><div class='add'>+		pipe_config_buffer_mismatch(&amp;p, fastset, crtc, __stringify(name), \</div><div class='ctx'> 					    current_config-&gt;name, \</div><div class='ctx'> 					    pipe_config-&gt;name, \</div><div class='ctx'> 					    (len)); \</div><div class='hunk'>@@ -5107,7 +5185,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 	    !intel_color_lut_equal(current_config, \</div><div class='ctx'> 				   current_config-&gt;lut, pipe_config-&gt;lut, \</div><div class='ctx'> 				   is_pre_csc_lut)) {	\</div><div class='del'>-		pipe_config_mismatch(fastset, crtc, __stringify(lut), \</div><div class='add'>+		pipe_config_mismatch(&amp;p, fastset, crtc, __stringify(lut), \</div><div class='ctx'> 				     "hw_state doesn't match sw_state"); \</div><div class='ctx'> 		ret = false; \</div><div class='ctx'> 	} \</div><div class='hunk'>@@ -5236,6 +5314,18 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 		PIPE_CONF_CHECK_CSC(output_csc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Panel replay has to be enabled before link training. PSR doesn't have</div><div class='add'>+	 * this requirement -&gt; check these only if using panel replay</div><div class='add'>+	 */</div><div class='add'>+	if (current_config-&gt;has_panel_replay || pipe_config-&gt;has_panel_replay) {</div><div class='add'>+		PIPE_CONF_CHECK_BOOL(has_psr);</div><div class='add'>+		PIPE_CONF_CHECK_BOOL(has_psr2);</div><div class='add'>+		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);</div><div class='add'>+		PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);</div><div class='add'>+		PIPE_CONF_CHECK_BOOL(has_panel_replay);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	PIPE_CONF_CHECK_BOOL(double_wide);</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;display.dpll.mgr)</div><div class='hunk'>@@ -5271,6 +5361,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 	PIPE_CONF_CHECK_INFOFRAME(hdmi);</div><div class='ctx'> 	PIPE_CONF_CHECK_INFOFRAME(drm);</div><div class='ctx'> 	PIPE_CONF_CHECK_DP_VSC_SDP(vsc);</div><div class='add'>+	PIPE_CONF_CHECK_DP_AS_SDP(as_sdp);</div><div class='ctx'> </div><div class='ctx'> 	PIPE_CONF_CHECK_X(sync_mode_slaves_mask);</div><div class='ctx'> 	PIPE_CONF_CHECK_I(master_transcoder);</div><div class='hunk'>@@ -5322,6 +5413,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,</div><div class='ctx'> 		PIPE_CONF_CHECK_I(vrr.flipline);</div><div class='ctx'> 		PIPE_CONF_CHECK_I(vrr.pipeline_full);</div><div class='ctx'> 		PIPE_CONF_CHECK_I(vrr.guardband);</div><div class='add'>+		PIPE_CONF_CHECK_I(vrr.vsync_start);</div><div class='add'>+		PIPE_CONF_CHECK_I(vrr.vsync_end);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #undef PIPE_CONF_CHECK_X</div><div class='hunk'>@@ -5567,14 +5660,16 @@ static int intel_modeset_checks(struct intel_atomic_state *state)</div><div class='ctx'> static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_state,</div><div class='ctx'> 				     struct intel_crtc_state *new_crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(old_crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state-&gt;uapi.crtc);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> </div><div class='ctx'> 	/* only allow LRR when the timings stay within the VRR range */</div><div class='ctx'> 	if (old_crtc_state-&gt;vrr.in_range != new_crtc_state-&gt;vrr.in_range)</div><div class='ctx'> 		new_crtc_state-&gt;update_lrr = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true))</div><div class='del'>-		drm_dbg_kms(&amp;i915-&gt;drm, "fastset requirement not met, forcing full modeset\n");</div><div class='add'>+		drm_dbg_kms(&amp;i915-&gt;drm, "[CRTC:%d:%s] fastset requirement not met, forcing full modeset\n",</div><div class='add'>+			    crtc-&gt;base.base.id, crtc-&gt;base.name);</div><div class='ctx'> 	else</div><div class='ctx'> 		new_crtc_state-&gt;uapi.mode_changed = false;</div><div class='ctx'> </div><div class='hunk'>@@ -6228,27 +6323,37 @@ static int intel_atomic_check_config(struct intel_atomic_state *state,</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (intel_crtc_is_bigjoiner_slave(new_crtc_state)) {</div><div class='del'>-			drm_WARN_ON(&amp;i915-&gt;drm, new_crtc_state-&gt;uapi.enable);</div><div class='add'>+		if (drm_WARN_ON(&amp;i915-&gt;drm, intel_crtc_is_bigjoiner_slave(new_crtc_state)))</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		ret = intel_crtc_prepare_cleared_state(state, crtc);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			break;</div><div class='add'>+			goto fail;</div><div class='ctx'> </div><div class='ctx'> 		if (!new_crtc_state-&gt;hw.enable)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		ret = intel_modeset_pipe_config(state, crtc, limits);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			break;</div><div class='add'>+			goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		ret = intel_atomic_check_bigjoiner(state, crtc);</div><div class='add'>+	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {</div><div class='add'>+		if (!intel_crtc_needs_modeset(new_crtc_state))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (drm_WARN_ON(&amp;i915-&gt;drm, intel_crtc_is_bigjoiner_slave(new_crtc_state)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!new_crtc_state-&gt;hw.enable)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = intel_modeset_pipe_config_late(state, crtc);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			break;</div><div class='add'>+			goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+fail:</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		*failed_pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='hunk'>@@ -6344,16 +6449,26 @@ int intel_atomic_check(struct drm_device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='add'>+	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {</div><div class='add'>+		if (!intel_crtc_needs_modeset(new_crtc_state))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (intel_crtc_is_bigjoiner_slave(new_crtc_state)) {</div><div class='add'>+			drm_WARN_ON(&amp;dev_priv-&gt;drm, new_crtc_state-&gt;uapi.enable);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = intel_atomic_check_bigjoiner(state, crtc);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,</div><div class='ctx'> 					    new_crtc_state, i) {</div><div class='ctx'> 		if (!intel_crtc_needs_modeset(new_crtc_state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (new_crtc_state-&gt;hw.enable) {</div><div class='del'>-			ret = intel_modeset_pipe_config_late(state, crtc);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto fail;</div><div class='del'>-		}</div><div class='add'>+		intel_bigjoiner_adjust_pipe_src(new_crtc_state);</div><div class='ctx'> </div><div class='ctx'> 		intel_crtc_check_fastset(old_crtc_state, new_crtc_state);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6635,17 +6750,21 @@ static void intel_enable_crtc(struct intel_atomic_state *state,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(state-&gt;base.dev);</div><div class='ctx'> 	const struct intel_crtc_state *new_crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_crtc_needs_modeset(new_crtc_state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* VRR will be enable later, if required */</div><div class='del'>-	intel_crtc_update_active_timings(new_crtc_state, false);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(new_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;display.funcs.display-&gt;crtc_enable(state, crtc);</div><div class='add'>+		/* VRR will be enable later, if required */</div><div class='add'>+		intel_crtc_update_active_timings(pipe_crtc_state, false);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (intel_crtc_is_bigjoiner_slave(new_crtc_state))</div><div class='del'>-		return;</div><div class='add'>+	dev_priv-&gt;display.funcs.display-&gt;crtc_enable(state, crtc);</div><div class='ctx'> </div><div class='ctx'> 	/* vblanks work again, re-enable pipe CRC. */</div><div class='ctx'> 	intel_crtc_enable_pipe_crc(crtc);</div><div class='hunk'>@@ -6737,31 +6856,42 @@ static void intel_update_crtc(struct intel_atomic_state *state,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_old_crtc_state_disables(struct intel_atomic_state *state,</div><div class='del'>-					  struct intel_crtc_state *old_crtc_state,</div><div class='del'>-					  struct intel_crtc_state *new_crtc_state,</div><div class='ctx'> 					  struct intel_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_crtc_state *old_crtc_state =</div><div class='add'>+		intel_atomic_get_old_crtc_state(state, crtc);</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We need to disable pipe CRC before disabling the pipe,</div><div class='ctx'> 	 * or we race against vblank off.</div><div class='ctx'> 	 */</div><div class='del'>-	intel_crtc_disable_pipe_crc(crtc);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state))</div><div class='add'>+		intel_crtc_disable_pipe_crc(pipe_crtc);</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;display.funcs.display-&gt;crtc_disable(state, crtc);</div><div class='del'>-	crtc-&gt;active = false;</div><div class='del'>-	intel_fbc_disable(crtc);</div><div class='ctx'> </div><div class='del'>-	if (!new_crtc_state-&gt;hw.active)</div><div class='del'>-		intel_initial_watermarks(state, crtc);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *new_pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='add'>+</div><div class='add'>+		pipe_crtc-&gt;active = false;</div><div class='add'>+		intel_fbc_disable(pipe_crtc);</div><div class='add'>+</div><div class='add'>+		if (!new_pipe_crtc_state-&gt;hw.active)</div><div class='add'>+			intel_initial_watermarks(state, pipe_crtc);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_commit_modeset_disables(struct intel_atomic_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct intel_crtc_state *new_crtc_state, *old_crtc_state;</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_crtc_state *new_crtc_state, *old_crtc_state;</div><div class='ctx'> 	struct intel_crtc *crtc;</div><div class='del'>-	u32 handled = 0;</div><div class='add'>+	u8 disable_pipes = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,</div><div class='hunk'>@@ -6769,21 +6899,31 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)</div><div class='ctx'> 		if (!intel_crtc_needs_modeset(new_crtc_state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * Needs to be done even for pipes</div><div class='add'>+		 * that weren't enabled previously.</div><div class='add'>+		 */</div><div class='ctx'> 		intel_pre_plane_update(state, crtc);</div><div class='ctx'> </div><div class='ctx'> 		if (!old_crtc_state-&gt;hw.active)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		disable_pipes |= BIT(crtc-&gt;pipe);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {</div><div class='add'>+		if ((disable_pipes &amp; BIT(crtc-&gt;pipe)) == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		intel_crtc_disable_planes(state, crtc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Only disable port sync and MST slaves */</div><div class='del'>-	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,</div><div class='del'>-					    new_crtc_state, i) {</div><div class='del'>-		if (!intel_crtc_needs_modeset(new_crtc_state))</div><div class='add'>+	for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {</div><div class='add'>+		if ((disable_pipes &amp; BIT(crtc-&gt;pipe)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!old_crtc_state-&gt;hw.active)</div><div class='add'>+		if (intel_crtc_is_bigjoiner_slave(old_crtc_state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* In case of Transcoder port Sync master slave CRTCs can be</div><div class='hunk'>@@ -6792,28 +6932,28 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)</div><div class='ctx'> 		 * Slave vblanks are masked till Master Vblanks.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!is_trans_port_sync_slave(old_crtc_state) &amp;&amp;</div><div class='del'>-		    !intel_dp_mst_is_slave_trans(old_crtc_state) &amp;&amp;</div><div class='del'>-		    !intel_crtc_is_bigjoiner_slave(old_crtc_state))</div><div class='add'>+		    !intel_dp_mst_is_slave_trans(old_crtc_state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		intel_old_crtc_state_disables(state, old_crtc_state,</div><div class='del'>-					      new_crtc_state, crtc);</div><div class='del'>-		handled |= BIT(crtc-&gt;pipe);</div><div class='add'>+		intel_old_crtc_state_disables(state, crtc);</div><div class='add'>+</div><div class='add'>+		disable_pipes &amp;= ~intel_crtc_joined_pipe_mask(old_crtc_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable everything else left on */</div><div class='del'>-	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,</div><div class='del'>-					    new_crtc_state, i) {</div><div class='del'>-		if (!intel_crtc_needs_modeset(new_crtc_state) ||</div><div class='del'>-		    (handled &amp; BIT(crtc-&gt;pipe)))</div><div class='add'>+	for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {</div><div class='add'>+		if ((disable_pipes &amp; BIT(crtc-&gt;pipe)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!old_crtc_state-&gt;hw.active)</div><div class='add'>+		if (intel_crtc_is_bigjoiner_slave(old_crtc_state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		intel_old_crtc_state_disables(state, old_crtc_state,</div><div class='del'>-					      new_crtc_state, crtc);</div><div class='add'>+		intel_old_crtc_state_disables(state, crtc);</div><div class='add'>+</div><div class='add'>+		disable_pipes &amp;= ~intel_crtc_joined_pipe_mask(old_crtc_state);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	drm_WARN_ON(&amp;i915-&gt;drm, disable_pipes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_commit_modeset_enables(struct intel_atomic_state *state)</div><div class='hunk'>@@ -6880,9 +7020,15 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)</div><div class='ctx'> 		intel_pre_update_crtc(state, crtc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	intel_dbuf_mbus_pre_ddb_update(state);</div><div class='add'>+</div><div class='ctx'> 	while (update_pipes) {</div><div class='del'>-		for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,</div><div class='del'>-						    new_crtc_state, i) {</div><div class='add'>+		/*</div><div class='add'>+		 * Commit in reverse order to make bigjoiner master</div><div class='add'>+		 * send the uapi events after slaves are done.</div><div class='add'>+		 */</div><div class='add'>+		for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state,</div><div class='add'>+							    new_crtc_state, i) {</div><div class='ctx'> 			enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='ctx'> 			if ((update_pipes &amp; BIT(pipe)) == 0)</div><div class='hunk'>@@ -6910,6 +7056,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	intel_dbuf_mbus_post_ddb_update(state);</div><div class='add'>+</div><div class='ctx'> 	update_pipes = modeset_pipes;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -6922,12 +7070,14 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)</div><div class='ctx'> 		if ((modeset_pipes &amp; BIT(pipe)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		if (intel_crtc_is_bigjoiner_slave(new_crtc_state))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		if (intel_dp_mst_is_slave_trans(new_crtc_state) ||</div><div class='del'>-		    is_trans_port_sync_master(new_crtc_state) ||</div><div class='del'>-		    intel_crtc_is_bigjoiner_master(new_crtc_state))</div><div class='add'>+		    is_trans_port_sync_master(new_crtc_state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		modeset_pipes &amp;= ~BIT(pipe);</div><div class='add'>+		modeset_pipes &amp;= ~intel_crtc_joined_pipe_mask(new_crtc_state);</div><div class='ctx'> </div><div class='ctx'> 		intel_enable_crtc(state, crtc);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6942,7 +7092,10 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)</div><div class='ctx'> 		if ((modeset_pipes &amp; BIT(pipe)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		modeset_pipes &amp;= ~BIT(pipe);</div><div class='add'>+		if (intel_crtc_is_bigjoiner_slave(new_crtc_state))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		modeset_pipes &amp;= ~intel_crtc_joined_pipe_mask(new_crtc_state);</div><div class='ctx'> </div><div class='ctx'> 		intel_enable_crtc(state, crtc);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6959,7 +7112,11 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)</div><div class='ctx'> 		intel_pre_update_crtc(state, crtc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {</div><div class='add'>+	/*</div><div class='add'>+	 * Commit in reverse order to make bigjoiner master</div><div class='add'>+	 * send the uapi events after slaves are done.</div><div class='add'>+	 */</div><div class='add'>+	for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state, i) {</div><div class='ctx'> 		enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='ctx'> 		if ((update_pipes &amp; BIT(pipe)) == 0)</div><div class='hunk'>@@ -7156,7 +7313,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)</div><div class='ctx'> 	intel_encoders_update_prepare(state);</div><div class='ctx'> </div><div class='ctx'> 	intel_dbuf_pre_plane_update(state);</div><div class='del'>-	intel_mbus_dbox_update(state);</div><div class='ctx'> </div><div class='ctx'> 	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {</div><div class='ctx'> 		if (new_crtc_state-&gt;do_async_flip)</div><div class='hunk'>@@ -7681,7 +7837,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)</div><div class='ctx'> </div><div class='ctx'> static int max_dotclock(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	int max_dotclock = i915-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclock = i915-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> </div><div class='ctx'> 	/* icl+ might use bigjoiner */</div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 11)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h<br/>index f4a0773f0fca..56d1c0e3e62c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display.h</a></div><div class='hunk'>@@ -280,6 +280,12 @@ enum phy_fia {</div><div class='ctx'> 			    base.head)					\</div><div class='ctx'> 		for_each_if((pipe_mask) &amp; BIT(intel_crtc-&gt;pipe))</div><div class='ctx'> </div><div class='add'>+#define for_each_intel_crtc_in_pipe_mask_reverse(dev, intel_crtc, pipe_mask)	\</div><div class='add'>+	list_for_each_entry_reverse((intel_crtc),				\</div><div class='add'>+				    &amp;(dev)-&gt;mode_config.crtc_list,		\</div><div class='add'>+				    base.head)					\</div><div class='add'>+		for_each_if((pipe_mask) &amp; BIT((intel_crtc)-&gt;pipe))</div><div class='add'>+</div><div class='ctx'> #define for_each_intel_encoder(dev, intel_encoder)		\</div><div class='ctx'> 	list_for_each_entry(intel_encoder,			\</div><div class='ctx'> 			    &amp;(dev)-&gt;mode_config.encoder_list,	\</div><div class='hunk'>@@ -344,6 +350,14 @@ enum phy_fia {</div><div class='ctx'> 	     (__i)++) \</div><div class='ctx'> 		for_each_if(crtc)</div><div class='ctx'> </div><div class='add'>+#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state, __i) \</div><div class='add'>+	for ((__i) = (__state)-&gt;base.dev-&gt;mode_config.num_crtc - 1; \</div><div class='add'>+	     (__i) &gt;= 0  &amp;&amp; \</div><div class='add'>+	     ((crtc) = to_intel_crtc((__state)-&gt;base.crtcs[__i].ptr), \</div><div class='add'>+	      (new_crtc_state) = to_intel_crtc_state((__state)-&gt;base.crtcs[__i].new_state), 1); \</div><div class='add'>+	     (__i)--) \</div><div class='add'>+		for_each_if(crtc)</div><div class='add'>+</div><div class='ctx'> #define for_each_oldnew_intel_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \</div><div class='ctx'> 	for ((__i) = 0; \</div><div class='ctx'> 	     (__i) &lt; (__state)-&gt;base.dev-&gt;mode_config.num_total_plane &amp;&amp; \</div><div class='hunk'>@@ -408,6 +422,7 @@ intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915,</div><div class='ctx'> enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);</div><div class='ctx'> bool is_trans_port_sync_mode(const struct intel_crtc_state *state);</div><div class='ctx'> bool is_trans_port_sync_master(const struct intel_crtc_state *state);</div><div class='add'>+u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state);</div><div class='ctx'> bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state);</div><div class='ctx'> bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state);</div><div class='ctx'> u8 intel_crtc_bigjoiner_slave_pipes(const struct intel_crtc_state *crtc_state);</div><div class='hunk'>@@ -448,6 +463,13 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy);</div><div class='ctx'> bool intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy);</div><div class='ctx'> enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			      enum port port);</div><div class='add'>+</div><div class='add'>+enum phy intel_encoder_to_phy(struct intel_encoder *encoder);</div><div class='add'>+bool intel_encoder_is_combo(struct intel_encoder *encoder);</div><div class='add'>+bool intel_encoder_is_snps(struct intel_encoder *encoder);</div><div class='add'>+bool intel_encoder_is_tc(struct intel_encoder *encoder);</div><div class='add'>+enum tc_port intel_encoder_to_tc(struct intel_encoder *encoder);</div><div class='add'>+</div><div class='ctx'> int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 				      struct drm_file *file_priv);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_conversion.h b/drivers/gpu/drm/i915/display/intel_display_conversion.h<br/>new file mode 100644<br/>index 000000000000..ad8545c8055d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_conversion.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_conversion.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/* Copyright © 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This header is for transitional struct intel_display conversion helpers only.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __INTEL_DISPLAY_CONVERSION__</div><div class='add'>+#define __INTEL_DISPLAY_CONVERSION__</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Transitional macro to optionally convert struct drm_i915_private * to struct</div><div class='add'>+ * intel_display *, also accepting the latter.</div><div class='add'>+ */</div><div class='add'>+#define __to_intel_display(p)						\</div><div class='add'>+	_Generic(p,							\</div><div class='add'>+		 const struct drm_i915_private *: (&amp;((const struct drm_i915_private *)(p))-&gt;display), \</div><div class='add'>+		 struct drm_i915_private *: (&amp;((struct drm_i915_private *)(p))-&gt;display), \</div><div class='add'>+		 const struct intel_display *: (p),			\</div><div class='add'>+		 struct intel_display *: (p))</div><div class='add'>+</div><div class='add'>+#endif /* __INTEL_DISPLAY_CONVERSION__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h<br/>index 2167dbee5eea..7715fc329057 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_core.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_core.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_core.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include "intel_global_state.h"</div><div class='ctx'> #include "intel_gmbus.h"</div><div class='ctx'> #include "intel_opregion.h"</div><div class='add'>+#include "intel_dmc_wl.h"</div><div class='ctx'> #include "intel_wm_types.h"</div><div class='ctx'> </div><div class='ctx'> struct task_struct;</div><div class='hunk'>@@ -282,6 +283,9 @@ struct intel_wm {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_display {</div><div class='add'>+	/* drm device backpointer */</div><div class='add'>+	struct drm_device *drm;</div><div class='add'>+</div><div class='ctx'> 	/* Display functions */</div><div class='ctx'> 	struct {</div><div class='ctx'> 		/* Top level crtc-ish functions */</div><div class='hunk'>@@ -345,6 +349,8 @@ struct intel_display {</div><div class='ctx'> 		struct intel_global_obj obj;</div><div class='ctx'> </div><div class='ctx'> 		unsigned int max_cdclk_freq;</div><div class='add'>+		unsigned int max_dotclk_freq;</div><div class='add'>+		unsigned int skl_preferred_vco_freq;</div><div class='ctx'> 	} cdclk;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -446,6 +452,16 @@ struct intel_display {</div><div class='ctx'> 	} ips;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='add'>+		bool display_irqs_enabled;</div><div class='add'>+</div><div class='add'>+		/* For i915gm/i945gm vblank irq workaround */</div><div class='add'>+		u8 vblank_enabled;</div><div class='add'>+</div><div class='add'>+		u32 de_irq_mask[I915_MAX_PIPES];</div><div class='add'>+		u32 pipestat_irq_mask[I915_MAX_PIPES];</div><div class='add'>+	} irq;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='ctx'> 		wait_queue_head_t waitqueue;</div><div class='ctx'> </div><div class='ctx'> 		/* mutex to protect pmdemand programming sequence */</div><div class='hunk'>@@ -534,6 +550,7 @@ struct intel_display {</div><div class='ctx'> 	struct intel_overlay *overlay;</div><div class='ctx'> 	struct intel_display_params params;</div><div class='ctx'> 	struct intel_vbt_data vbt;</div><div class='add'>+	struct intel_dmc_wl wl;</div><div class='ctx'> 	struct intel_wm wm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c<br/>index b99c024b0934..35f9f86ef70f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_debugfs.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include "intel_hdmi.h"</div><div class='ctx'> #include "intel_hotplug.h"</div><div class='ctx'> #include "intel_panel.h"</div><div class='add'>+#include "intel_pps.h"</div><div class='ctx'> #include "intel_psr.h"</div><div class='ctx'> #include "intel_psr_regs.h"</div><div class='ctx'> #include "intel_wm.h"</div><div class='hunk'>@@ -191,7 +192,7 @@ static void intel_hdcp_info(struct seq_file *m,</div><div class='ctx'> 			    struct intel_connector *intel_connector,</div><div class='ctx'> 			    bool remote_req)</div><div class='ctx'> {</div><div class='del'>-	bool hdcp_cap, hdcp2_cap;</div><div class='add'>+	bool hdcp_cap = false, hdcp2_cap = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_connector-&gt;hdcp.shim) {</div><div class='ctx'> 		seq_puts(m, "No Connector Support");</div><div class='hunk'>@@ -252,9 +253,6 @@ static void intel_connector_info(struct seq_file *m,</div><div class='ctx'> 				 struct drm_connector *connector)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_connector *intel_connector = to_intel_connector(connector);</div><div class='del'>-	const struct drm_connector_state *conn_state = connector-&gt;state;</div><div class='del'>-	struct intel_encoder *encoder =</div><div class='del'>-		to_intel_encoder(conn_state-&gt;best_encoder);</div><div class='ctx'> 	const struct drm_display_mode *mode;</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",</div><div class='hunk'>@@ -271,28 +269,23 @@ static void intel_connector_info(struct seq_file *m,</div><div class='ctx'> 		   drm_get_subpixel_order_name(connector-&gt;display_info.subpixel_order));</div><div class='ctx'> 	seq_printf(m, "\tCEA rev: %d\n", connector-&gt;display_info.cea_rev);</div><div class='ctx'> </div><div class='del'>-	if (!encoder)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	switch (connector-&gt;connector_type) {</div><div class='ctx'> 	case DRM_MODE_CONNECTOR_DisplayPort:</div><div class='ctx'> 	case DRM_MODE_CONNECTOR_eDP:</div><div class='del'>-		if (encoder-&gt;type == INTEL_OUTPUT_DP_MST)</div><div class='add'>+		if (intel_connector-&gt;mst_port)</div><div class='ctx'> 			intel_dp_mst_info(m, intel_connector);</div><div class='ctx'> 		else</div><div class='ctx'> 			intel_dp_info(m, intel_connector);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_MODE_CONNECTOR_HDMIA:</div><div class='del'>-		if (encoder-&gt;type == INTEL_OUTPUT_HDMI ||</div><div class='del'>-		    encoder-&gt;type == INTEL_OUTPUT_DDI)</div><div class='del'>-			intel_hdmi_info(m, intel_connector);</div><div class='add'>+		intel_hdmi_info(m, intel_connector);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	seq_puts(m, "\tHDCP version: ");</div><div class='del'>-	if (intel_encoder_is_mst(encoder)) {</div><div class='add'>+	if (intel_connector-&gt;mst_port) {</div><div class='ctx'> 		intel_hdcp_info(m, intel_connector, true);</div><div class='ctx'> 		seq_puts(m, "\tMST Hub HDCP version: ");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -645,51 +638,24 @@ static int i915_display_capabilities(struct seq_file *m, void *unused)</div><div class='ctx'> static int i915_shared_dplls_info(struct seq_file *m, void *unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = node_to_i915(m-&gt;private);</div><div class='add'>+	struct drm_printer p = drm_seq_file_printer(m);</div><div class='ctx'> 	struct intel_shared_dpll *pll;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	drm_modeset_lock_all(&amp;dev_priv-&gt;drm);</div><div class='ctx'> </div><div class='del'>-	seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",</div><div class='add'>+	drm_printf(&amp;p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",</div><div class='ctx'> 		   dev_priv-&gt;display.dpll.ref_clks.nssc,</div><div class='ctx'> 		   dev_priv-&gt;display.dpll.ref_clks.ssc);</div><div class='ctx'> </div><div class='ctx'> 	for_each_shared_dpll(dev_priv, pll, i) {</div><div class='del'>-		seq_printf(m, "DPLL%i: %s, id: %i\n", pll-&gt;index,</div><div class='add'>+		drm_printf(&amp;p, "DPLL%i: %s, id: %i\n", pll-&gt;index,</div><div class='ctx'> 			   pll-&gt;info-&gt;name, pll-&gt;info-&gt;id);</div><div class='del'>-		seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",</div><div class='add'>+		drm_printf(&amp;p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",</div><div class='ctx'> 			   pll-&gt;state.pipe_mask, pll-&gt;active_mask,</div><div class='ctx'> 			   str_yes_no(pll-&gt;on));</div><div class='del'>-		seq_printf(m, " tracked hardware state:\n");</div><div class='del'>-		seq_printf(m, " dpll:    0x%08x\n", pll-&gt;state.hw_state.dpll);</div><div class='del'>-		seq_printf(m, " dpll_md: 0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.dpll_md);</div><div class='del'>-		seq_printf(m, " fp0:     0x%08x\n", pll-&gt;state.hw_state.fp0);</div><div class='del'>-		seq_printf(m, " fp1:     0x%08x\n", pll-&gt;state.hw_state.fp1);</div><div class='del'>-		seq_printf(m, " wrpll:   0x%08x\n", pll-&gt;state.hw_state.wrpll);</div><div class='del'>-		seq_printf(m, " cfgcr0:  0x%08x\n", pll-&gt;state.hw_state.cfgcr0);</div><div class='del'>-		seq_printf(m, " cfgcr1:  0x%08x\n", pll-&gt;state.hw_state.cfgcr1);</div><div class='del'>-		seq_printf(m, " div0:    0x%08x\n", pll-&gt;state.hw_state.div0);</div><div class='del'>-		seq_printf(m, " mg_refclkin_ctl:        0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_refclkin_ctl);</div><div class='del'>-		seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_clktop2_coreclkctl1);</div><div class='del'>-		seq_printf(m, " mg_clktop2_hsclkctl:    0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_clktop2_hsclkctl);</div><div class='del'>-		seq_printf(m, " mg_pll_div0:  0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_div0);</div><div class='del'>-		seq_printf(m, " mg_pll_div1:  0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_div1);</div><div class='del'>-		seq_printf(m, " mg_pll_lf:    0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_lf);</div><div class='del'>-		seq_printf(m, " mg_pll_frac_lock: 0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_frac_lock);</div><div class='del'>-		seq_printf(m, " mg_pll_ssc:   0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_ssc);</div><div class='del'>-		seq_printf(m, " mg_pll_bias:  0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_bias);</div><div class='del'>-		seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",</div><div class='del'>-			   pll-&gt;state.hw_state.mg_pll_tdc_coldst_bias);</div><div class='add'>+		drm_printf(&amp;p, " tracked hardware state:\n");</div><div class='add'>+		intel_dpll_dump_hw_state(dev_priv, &amp;p, &amp;pll-&gt;state.hw_state);</div><div class='ctx'> 	}</div><div class='ctx'> 	drm_modeset_unlock_all(&amp;dev_priv-&gt;drm);</div><div class='ctx'> </div><div class='hunk'>@@ -1103,27 +1069,6 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)</div><div class='ctx'> 	intel_display_debugfs_params(i915);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i915_panel_show(struct seq_file *m, void *data)</div><div class='del'>-{</div><div class='del'>-	struct intel_connector *connector = m-&gt;private;</div><div class='del'>-	struct intel_dp *intel_dp = intel_attached_dp(connector);</div><div class='del'>-</div><div class='del'>-	if (connector-&gt;base.status != connector_status_connected)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "Panel power up delay: %d\n",</div><div class='del'>-		   intel_dp-&gt;pps.panel_power_up_delay);</div><div class='del'>-	seq_printf(m, "Panel power down delay: %d\n",</div><div class='del'>-		   intel_dp-&gt;pps.panel_power_down_delay);</div><div class='del'>-	seq_printf(m, "Backlight on delay: %d\n",</div><div class='del'>-		   intel_dp-&gt;pps.backlight_on_delay);</div><div class='del'>-	seq_printf(m, "Backlight off delay: %d\n",</div><div class='del'>-		   intel_dp-&gt;pps.backlight_off_delay);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-DEFINE_SHOW_ATTRIBUTE(i915_panel);</div><div class='del'>-</div><div class='ctx'> static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_connector *connector = m-&gt;private;</div><div class='hunk'>@@ -1402,20 +1347,6 @@ out:	drm_modeset_unlock(&amp;i915-&gt;drm.mode_config.connection_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i915_bigjoiner_enable_show(struct seq_file *m, void *data)</div><div class='del'>-{</div><div class='del'>-	struct intel_connector *connector = m-&gt;private;</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-</div><div class='del'>-	crtc = connector-&gt;base.state-&gt;crtc;</div><div class='del'>-	if (connector-&gt;base.status != connector_status_connected || !crtc)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "Bigjoiner enable: %d\n", connector-&gt;force_bigjoiner_enable);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static ssize_t i915_dsc_output_format_write(struct file *file,</div><div class='ctx'> 					    const char __user *ubuf,</div><div class='ctx'> 					    size_t len, loff_t *offp)</div><div class='hunk'>@@ -1437,30 +1368,6 @@ static ssize_t i915_dsc_output_format_write(struct file *file,</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t i915_bigjoiner_enable_write(struct file *file,</div><div class='del'>-					   const char __user *ubuf,</div><div class='del'>-					   size_t len, loff_t *offp)</div><div class='del'>-{</div><div class='del'>-	struct seq_file *m = file-&gt;private_data;</div><div class='del'>-	struct intel_connector *connector = m-&gt;private;</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	bool bigjoiner_en = 0;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	crtc = connector-&gt;base.state-&gt;crtc;</div><div class='del'>-	if (connector-&gt;base.status != connector_status_connected || !crtc)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ret = kstrtobool_from_user(ubuf, len, &amp;bigjoiner_en);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	connector-&gt;force_bigjoiner_enable = bigjoiner_en;</div><div class='del'>-	*offp += len;</div><div class='del'>-</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int i915_dsc_output_format_open(struct inode *inode,</div><div class='ctx'> 				       struct file *file)</div><div class='ctx'> {</div><div class='hunk'>@@ -1554,8 +1461,6 @@ static const struct file_operations i915_dsc_fractional_bpp_fops = {</div><div class='ctx'> 	.write = i915_dsc_fractional_bpp_write</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-DEFINE_SHOW_STORE_ATTRIBUTE(i915_bigjoiner_enable);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Returns the Current CRTC's bpc.</div><div class='ctx'>  * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc</div><div class='hunk'>@@ -1608,12 +1513,9 @@ void intel_connector_debugfs_add(struct intel_connector *connector)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	intel_drrs_connector_debugfs_add(connector);</div><div class='add'>+	intel_pps_connector_debugfs_add(connector);</div><div class='ctx'> 	intel_psr_connector_debugfs_add(connector);</div><div class='ctx'> </div><div class='del'>-	if (connector_type == DRM_MODE_CONNECTOR_eDP)</div><div class='del'>-		debugfs_create_file("i915_panel_timings", 0444, root,</div><div class='del'>-				    connector, &amp;i915_panel_fops);</div><div class='del'>-</div><div class='ctx'> 	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||</div><div class='ctx'> 	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||</div><div class='ctx'> 	    connector_type == DRM_MODE_CONNECTOR_HDMIB) {</div><div class='hunk'>@@ -1640,8 +1542,8 @@ void intel_connector_debugfs_add(struct intel_connector *connector)</div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 11 &amp;&amp;</div><div class='ctx'> 	    (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||</div><div class='ctx'> 	     connector_type == DRM_MODE_CONNECTOR_eDP)) {</div><div class='del'>-		debugfs_create_file("i915_bigjoiner_force_enable", 0644, root,</div><div class='del'>-				    connector, &amp;i915_bigjoiner_enable_fops);</div><div class='add'>+		debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,</div><div class='add'>+				    &amp;connector-&gt;force_bigjoiner_enable);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (connector_type == DRM_MODE_CONNECTOR_DSI ||</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c<br/>index c02d79b50006..120e209ee74a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_device.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_device.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_device.c</a></div><div class='hunk'>@@ -17,6 +17,9 @@</div><div class='ctx'> #include "intel_display_reg_defs.h"</div><div class='ctx'> #include "intel_fbc.h"</div><div class='ctx'> </div><div class='add'>+__diag_push();</div><div class='add'>+__diag_ignore_all("-Woverride-init", "Allow field initialization overrides for display info");</div><div class='add'>+</div><div class='ctx'> static const struct intel_display_device_info no_display = {};</div><div class='ctx'> </div><div class='ctx'> #define PIPE_A_OFFSET		0x70000</div><div class='hunk'>@@ -768,6 +771,8 @@ static const struct intel_display_device_info xe2_lpd_display = {</div><div class='ctx'> 		BIT(INTEL_FBC_C) | BIT(INTEL_FBC_D),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+__diag_pop();</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Separate detection for no display cases to keep the display id array simple.</div><div class='ctx'>  *</div><div class='hunk'>@@ -922,6 +927,9 @@ void intel_display_device_probe(struct drm_i915_private *i915)</div><div class='ctx'> 	const struct intel_display_device_info *info;</div><div class='ctx'> 	u16 ver, rel, step;</div><div class='ctx'> </div><div class='add'>+	/* Add drm device backpointer as early as possible. */</div><div class='add'>+	i915-&gt;display.drm = &amp;i915-&gt;drm;</div><div class='add'>+</div><div class='ctx'> 	if (HAS_GMD_ID(i915))</div><div class='ctx'> 		info = probe_gmdid_display(i915, &amp;ver, &amp;rel, &amp;step);</div><div class='ctx'> 	else</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h<br/>index 9b1bce2624b9..17ddf82f0b6e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_device.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_device.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_device.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_device.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "intel_display_conversion.h"</div><div class='ctx'> #include "intel_display_limits.h"</div><div class='ctx'> </div><div class='ctx'> struct drm_i915_private;</div><div class='hunk'>@@ -69,6 +70,7 @@ struct drm_printer;</div><div class='ctx'> #define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)-&gt;cpu_transcoder_mask &amp; \</div><div class='ctx'> 					  BIT(trans)) != 0)</div><div class='ctx'> #define HAS_VRR(i915)			(DISPLAY_VER(i915) &gt;= 11)</div><div class='add'>+#define HAS_AS_SDP(i915)		(DISPLAY_VER(i915) &gt;= 13)</div><div class='ctx'> #define INTEL_NUM_PIPES(i915)		(hweight8(DISPLAY_RUNTIME_INFO(i915)-&gt;pipe_mask))</div><div class='ctx'> #define I915_HAS_HOTPLUG(i915)		(DISPLAY_INFO(i915)-&gt;has_hotplug)</div><div class='ctx'> #define OVERLAY_NEEDS_PHYSICAL(i915)	(DISPLAY_INFO(i915)-&gt;overlay_needs_physical)</div><div class='hunk'>@@ -99,8 +101,8 @@ struct drm_printer;</div><div class='ctx'> 	(IS_DISPLAY_IP_RANGE((__i915), (ipver), (ipver)) &amp;&amp; \</div><div class='ctx'> 	 IS_DISPLAY_STEP((__i915), (from), (until)))</div><div class='ctx'> </div><div class='del'>-#define DISPLAY_INFO(i915)		((i915)-&gt;display.info.__device_info)</div><div class='del'>-#define DISPLAY_RUNTIME_INFO(i915)	(&amp;(i915)-&gt;display.info.__runtime_info)</div><div class='add'>+#define DISPLAY_INFO(i915)		(__to_intel_display(i915)-&gt;info.__device_info)</div><div class='add'>+#define DISPLAY_RUNTIME_INFO(i915)	(&amp;__to_intel_display(i915)-&gt;info.__runtime_info)</div><div class='ctx'> </div><div class='ctx'> #define DISPLAY_VER(i915)	(DISPLAY_RUNTIME_INFO(i915)-&gt;ip.ver)</div><div class='ctx'> #define DISPLAY_VER_FULL(i915)	IP_VER(DISPLAY_RUNTIME_INFO(i915)-&gt;ip.ver, \</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c<br/>index 87dd07e0d138..89bd032ed995 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_driver.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_driver.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;acpi/video.h&gt;</div><div class='ctx'> #include &lt;drm/display/drm_dp_mst_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_atomic_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_client.h&gt;</div><div class='ctx'> #include &lt;drm/drm_mode_config.h&gt;</div><div class='ctx'> #include &lt;drm/drm_privacy_screen_consumer.h&gt;</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='hunk'>@@ -98,7 +99,6 @@ void intel_display_driver_init_hw(struct drm_i915_private *i915)</div><div class='ctx'> static const struct drm_mode_config_funcs intel_mode_funcs = {</div><div class='ctx'> 	.fb_create = intel_user_framebuffer_create,</div><div class='ctx'> 	.get_format_info = intel_fb_get_format_info,</div><div class='del'>-	.output_poll_changed = intel_fbdev_output_poll_changed,</div><div class='ctx'> 	.mode_valid = intel_mode_valid,</div><div class='ctx'> 	.atomic_check = intel_atomic_check,</div><div class='ctx'> 	.atomic_commit = intel_atomic_commit,</div><div class='hunk'>@@ -198,11 +198,13 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915)</div><div class='ctx'> 	intel_dpll_init_clock_hook(i915);</div><div class='ctx'> 	intel_init_display_hooks(i915);</div><div class='ctx'> 	intel_fdi_init_hook(i915);</div><div class='add'>+	intel_dmc_wl_init(&amp;i915-&gt;display);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* part #1: call before irq install */</div><div class='ctx'> int intel_display_driver_probe_noirq(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = &amp;i915-&gt;display;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (i915_inject_probe_failure(i915))</div><div class='hunk'>@@ -261,7 +263,7 @@ int intel_display_driver_probe_noirq(struct drm_i915_private *i915)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto cleanup_vga_client_pw_domain_dmc;</div><div class='ctx'> </div><div class='del'>-	intel_init_quirks(i915);</div><div class='add'>+	intel_init_quirks(display);</div><div class='ctx'> </div><div class='ctx'> 	intel_fbc_init(i915);</div><div class='ctx'> </div><div class='hunk'>@@ -514,10 +516,6 @@ int intel_display_driver_probe(struct drm_i915_private *i915)</div><div class='ctx'> </div><div class='ctx'> 	intel_overlay_setup(i915);</div><div class='ctx'> </div><div class='del'>-	ret = intel_fbdev_init(&amp;i915-&gt;drm);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	/* Only enable hotplug handling once the fbdev is fully set up. */</div><div class='ctx'> 	intel_hpd_init(i915);</div><div class='ctx'> </div><div class='hunk'>@@ -545,16 +543,6 @@ void intel_display_driver_register(struct drm_i915_private *i915)</div><div class='ctx'> 	intel_display_debugfs_register(i915);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Some ports require correctly set-up hpd registers for</div><div class='del'>-	 * detection to work properly (leading to ghost connected</div><div class='del'>-	 * connector status), e.g. VGA on gm45.  Hence we can only set</div><div class='del'>-	 * up the initial fbdev config after hpd irqs are fully</div><div class='del'>-	 * enabled. We do it last so that the async config cannot run</div><div class='del'>-	 * before the connectors are registered.</div><div class='del'>-	 */</div><div class='del'>-	intel_fbdev_initial_config_async(i915);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * We need to coordinate the hotplugs with the asynchronous</div><div class='ctx'> 	 * fbdev configuration, for which we use the</div><div class='ctx'> 	 * fbdev-&gt;async_cookie.</div><div class='hunk'>@@ -562,6 +550,8 @@ void intel_display_driver_register(struct drm_i915_private *i915)</div><div class='ctx'> 	drm_kms_helper_poll_init(&amp;i915-&gt;drm);</div><div class='ctx'> 	intel_hpd_poll_disable(i915);</div><div class='ctx'> </div><div class='add'>+	intel_fbdev_setup(i915);</div><div class='add'>+</div><div class='ctx'> 	intel_display_device_info_print(DISPLAY_INFO(i915),</div><div class='ctx'> 					DISPLAY_RUNTIME_INFO(i915), &amp;p);</div><div class='ctx'> }</div><div class='hunk'>@@ -597,9 +587,6 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_hpd_poll_fini(i915);</div><div class='ctx'> </div><div class='del'>-	/* poll work can call into fbdev, hence clean that up afterwards */</div><div class='del'>-	intel_fbdev_fini(i915);</div><div class='del'>-</div><div class='ctx'> 	intel_unregister_dsm_handler();</div><div class='ctx'> </div><div class='ctx'> 	/* flush any delayed tasks or pending work */</div><div class='hunk'>@@ -638,7 +625,8 @@ void intel_display_driver_unregister(struct drm_i915_private *i915)</div><div class='ctx'> 	if (!HAS_DISPLAY(i915))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_fbdev_unregister(i915);</div><div class='add'>+	drm_client_dev_unregister(&amp;i915-&gt;drm);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * After flushing the fbdev (incl. a late async config which</div><div class='ctx'> 	 * will have delayed queuing of a hotplug event), then flush</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c<br/>index f846c5b108b5..c337e0597541 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_irq.c</a></div><div class='hunk'>@@ -117,13 +117,14 @@ static void bdw_update_pipe_irq(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	if (drm_WARN_ON(&amp;dev_priv-&gt;drm, !intel_irqs_enabled(dev_priv)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	new_val = dev_priv-&gt;de_irq_mask[pipe];</div><div class='add'>+	new_val = dev_priv-&gt;display.irq.de_irq_mask[pipe];</div><div class='ctx'> 	new_val &amp;= ~interrupt_mask;</div><div class='ctx'> 	new_val |= (~enabled_irq_mask &amp; interrupt_mask);</div><div class='ctx'> </div><div class='del'>-	if (new_val != dev_priv-&gt;de_irq_mask[pipe]) {</div><div class='del'>-		dev_priv-&gt;de_irq_mask[pipe] = new_val;</div><div class='del'>-		intel_uncore_write(&amp;dev_priv-&gt;uncore, GEN8_DE_PIPE_IMR(pipe), dev_priv-&gt;de_irq_mask[pipe]);</div><div class='add'>+	if (new_val != dev_priv-&gt;display.irq.de_irq_mask[pipe]) {</div><div class='add'>+		dev_priv-&gt;display.irq.de_irq_mask[pipe] = new_val;</div><div class='add'>+		intel_uncore_write(&amp;dev_priv-&gt;uncore, GEN8_DE_PIPE_IMR(pipe),</div><div class='add'>+				   dev_priv-&gt;display.irq.de_irq_mask[pipe]);</div><div class='ctx'> 		intel_uncore_posting_read(&amp;dev_priv-&gt;uncore, GEN8_DE_PIPE_IMR(pipe));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -179,7 +180,7 @@ void ibx_disable_display_interrupt(struct drm_i915_private *i915, u32 bits)</div><div class='ctx'> u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			      enum pipe pipe)</div><div class='ctx'> {</div><div class='del'>-	u32 status_mask = dev_priv-&gt;pipestat_irq_mask[pipe];</div><div class='add'>+	u32 status_mask = dev_priv-&gt;display.irq.pipestat_irq_mask[pipe];</div><div class='ctx'> 	u32 enable_mask = status_mask &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;dev_priv-&gt;irq_lock);</div><div class='hunk'>@@ -233,10 +234,10 @@ void i915_enable_pipestat(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	lockdep_assert_held(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, !intel_irqs_enabled(dev_priv));</div><div class='ctx'> </div><div class='del'>-	if ((dev_priv-&gt;pipestat_irq_mask[pipe] &amp; status_mask) == status_mask)</div><div class='add'>+	if ((dev_priv-&gt;display.irq.pipestat_irq_mask[pipe] &amp; status_mask) == status_mask)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;pipestat_irq_mask[pipe] |= status_mask;</div><div class='add'>+	dev_priv-&gt;display.irq.pipestat_irq_mask[pipe] |= status_mask;</div><div class='ctx'> 	enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);</div><div class='ctx'> </div><div class='ctx'> 	intel_uncore_write(&amp;dev_priv-&gt;uncore, reg, enable_mask | status_mask);</div><div class='hunk'>@@ -256,10 +257,10 @@ void i915_disable_pipestat(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	lockdep_assert_held(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, !intel_irqs_enabled(dev_priv));</div><div class='ctx'> </div><div class='del'>-	if ((dev_priv-&gt;pipestat_irq_mask[pipe] &amp; status_mask) == 0)</div><div class='add'>+	if ((dev_priv-&gt;display.irq.pipestat_irq_mask[pipe] &amp; status_mask) == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;pipestat_irq_mask[pipe] &amp;= ~status_mask;</div><div class='add'>+	dev_priv-&gt;display.irq.pipestat_irq_mask[pipe] &amp;= ~status_mask;</div><div class='ctx'> 	enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);</div><div class='ctx'> </div><div class='ctx'> 	intel_uncore_write(&amp;dev_priv-&gt;uncore, reg, enable_mask | status_mask);</div><div class='hunk'>@@ -401,7 +402,7 @@ void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)</div><div class='ctx'> 				   PIPESTAT_INT_STATUS_MASK |</div><div class='ctx'> 				   PIPE_FIFO_UNDERRUN_STATUS);</div><div class='ctx'> </div><div class='del'>-		dev_priv-&gt;pipestat_irq_mask[pipe] = 0;</div><div class='add'>+		dev_priv-&gt;display.irq.pipestat_irq_mask[pipe] = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -412,7 +413,7 @@ void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv-&gt;display_irqs_enabled) {</div><div class='add'>+	if (!dev_priv-&gt;display.irq.display_irqs_enabled) {</div><div class='ctx'> 		spin_unlock(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -445,7 +446,7 @@ void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (iir &amp; iir_bit)</div><div class='del'>-			status_mask |= dev_priv-&gt;pipestat_irq_mask[pipe];</div><div class='add'>+			status_mask |= dev_priv-&gt;display.irq.pipestat_irq_mask[pipe];</div><div class='ctx'> </div><div class='ctx'> 		if (!status_mask)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1203,7 +1204,7 @@ int i8xx_enable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> </div><div class='ctx'> int i915gm_enable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;dev);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Vblank interrupts fail to wake the device up from C2+.</div><div class='hunk'>@@ -1211,8 +1212,8 @@ int i915gm_enable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> 	 * the problem. There is a small power cost so we do this</div><div class='ctx'> 	 * only when vblank interrupts are actually enabled.</div><div class='ctx'> 	 */</div><div class='del'>-	if (dev_priv-&gt;vblank_enabled++ == 0)</div><div class='del'>-		intel_uncore_write(&amp;dev_priv-&gt;uncore, SCPD0, _MASKED_BIT_ENABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));</div><div class='add'>+	if (i915-&gt;display.irq.vblank_enabled++ == 0)</div><div class='add'>+		intel_uncore_write(&amp;i915-&gt;uncore, SCPD0, _MASKED_BIT_ENABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));</div><div class='ctx'> </div><div class='ctx'> 	return i8xx_enable_vblank(crtc);</div><div class='ctx'> }</div><div class='hunk'>@@ -1315,12 +1316,12 @@ void i8xx_disable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> </div><div class='ctx'> void i915gm_disable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;dev);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	i8xx_disable_vblank(crtc);</div><div class='ctx'> </div><div class='del'>-	if (--dev_priv-&gt;vblank_enabled == 0)</div><div class='del'>-		intel_uncore_write(&amp;dev_priv-&gt;uncore, SCPD0, _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));</div><div class='add'>+	if (--i915-&gt;display.irq.vblank_enabled == 0)</div><div class='add'>+		intel_uncore_write(&amp;i915-&gt;uncore, SCPD0, _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void i965_disable_vblank(struct drm_crtc *crtc)</div><div class='hunk'>@@ -1497,8 +1498,8 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,</div><div class='ctx'> </div><div class='ctx'> 	for_each_pipe_masked(dev_priv, pipe, pipe_mask)</div><div class='ctx'> 		GEN8_IRQ_INIT_NDX(uncore, DE_PIPE, pipe,</div><div class='del'>-				  dev_priv-&gt;de_irq_mask[pipe],</div><div class='del'>-				  ~dev_priv-&gt;de_irq_mask[pipe] | extra_ier);</div><div class='add'>+				  dev_priv-&gt;display.irq.de_irq_mask[pipe],</div><div class='add'>+				  ~dev_priv-&gt;display.irq.de_irq_mask[pipe] | extra_ier);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -1558,10 +1559,10 @@ void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;display_irqs_enabled)</div><div class='add'>+	if (dev_priv-&gt;display.irq.display_irqs_enabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;display_irqs_enabled = true;</div><div class='add'>+	dev_priv-&gt;display.irq.display_irqs_enabled = true;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_irqs_enabled(dev_priv)) {</div><div class='ctx'> 		vlv_display_irq_reset(dev_priv);</div><div class='hunk'>@@ -1573,10 +1574,10 @@ void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv-&gt;display_irqs_enabled)</div><div class='add'>+	if (!dev_priv-&gt;display.irq.display_irqs_enabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;display_irqs_enabled = false;</div><div class='add'>+	dev_priv-&gt;display.irq.display_irqs_enabled = false;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_irqs_enabled(dev_priv))</div><div class='ctx'> 		vlv_display_irq_reset(dev_priv);</div><div class='hunk'>@@ -1694,12 +1695,12 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_pipe(dev_priv, pipe) {</div><div class='del'>-		dev_priv-&gt;de_irq_mask[pipe] = ~de_pipe_masked;</div><div class='add'>+		dev_priv-&gt;display.irq.de_irq_mask[pipe] = ~de_pipe_masked;</div><div class='ctx'> </div><div class='ctx'> 		if (intel_display_power_is_enabled(dev_priv,</div><div class='ctx'> 						   POWER_DOMAIN_PIPE(pipe)))</div><div class='ctx'> 			GEN8_IRQ_INIT_NDX(uncore, DE_PIPE, pipe,</div><div class='del'>-					  dev_priv-&gt;de_irq_mask[pipe],</div><div class='add'>+					  dev_priv-&gt;display.irq.de_irq_mask[pipe],</div><div class='ctx'> 					  de_pipe_enables);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1770,9 +1771,9 @@ void intel_display_irq_init(struct drm_i915_private *i915)</div><div class='ctx'> 	 * domain. We defer setting up the display irqs in this case to the</div><div class='ctx'> 	 * runtime pm.</div><div class='ctx'> 	 */</div><div class='del'>-	i915-&gt;display_irqs_enabled = true;</div><div class='add'>+	i915-&gt;display.irq.display_irqs_enabled = true;</div><div class='ctx'> 	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))</div><div class='del'>-		i915-&gt;display_irqs_enabled = false;</div><div class='add'>+		i915-&gt;display.irq.display_irqs_enabled = false;</div><div class='ctx'> </div><div class='ctx'> 	intel_hotplug_irq_init(i915);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c<br/>index 11e03cfb774d..1799a6643128 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_params.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_params.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_params.c</a></div><div class='hunk'>@@ -27,6 +27,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {</div><div class='ctx'>  * debugfs mode to 0.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+intel_display_param_named_unsafe(dmc_firmware_path, charp, 0400,</div><div class='add'>+	"DMC firmware path to use instead of the default one. "</div><div class='add'>+	"Use /dev/null to disable DMC and runtime PM.");</div><div class='add'>+</div><div class='ctx'> intel_display_param_named_unsafe(vbt_firmware, charp, 0400,</div><div class='ctx'> 	"Load VBT from specified file under /lib/firmware");</div><div class='ctx'> </div><div class='hunk'>@@ -116,6 +120,11 @@ intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,</div><div class='ctx'> 	"(0=disabled, 1=enabled) "</div><div class='ctx'> 	"Default: 1");</div><div class='ctx'> </div><div class='add'>+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,</div><div class='add'>+	"Enable DMC wakelock "</div><div class='add'>+	"(0=disabled, 1=enabled) "</div><div class='add'>+	"Default: 0");</div><div class='add'>+</div><div class='ctx'> __maybe_unused</div><div class='ctx'> static void _param_print_bool(struct drm_printer *p, const char *driver_name,</div><div class='ctx'> 			      const char *name, bool val)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h<br/>index 6206cc51df04..1208a62c16d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_params.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_params.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_params.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_params.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@ struct drm_i915_private;</div><div class='ctx'>  *       debugfs file</div><div class='ctx'>  */</div><div class='ctx'> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \</div><div class='add'>+	param(char *, dmc_firmware_path, NULL, 0400) \</div><div class='ctx'> 	param(char *, vbt_firmware, NULL, 0400) \</div><div class='ctx'> 	param(int, lvds_channel_mode, 0, 0400) \</div><div class='ctx'> 	param(int, panel_use_ssc, -1, 0600) \</div><div class='hunk'>@@ -46,6 +47,7 @@ struct drm_i915_private;</div><div class='ctx'> 	param(int, enable_psr, -1, 0600) \</div><div class='ctx'> 	param(bool, psr_safest_params, false, 0400) \</div><div class='ctx'> 	param(bool, enable_psr2_sel_fetch, true, 0400) \</div><div class='add'>+	param(bool, enable_dmc_wl, false, 0400) \</div><div class='ctx'> </div><div class='ctx'> #define MEMBER(T, member, ...) T member;</div><div class='ctx'> struct intel_display_params {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c<br/>index 6fd4fa52253a..03dc7edcc443 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_power.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_power.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_power.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_power.c</a></div><div class='hunk'>@@ -640,13 +640,7 @@ release_async_put_domains(struct i915_power_domains *power_domains,</div><div class='ctx'> 	enum intel_display_power_domain domain;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The caller must hold already raw wakeref, upgrade that to a proper</div><div class='del'>-	 * wakeref to make the state checker happy about the HW access during</div><div class='del'>-	 * power well disabling.</div><div class='del'>-	 */</div><div class='del'>-	assert_rpm_raw_wakeref_held(rpm);</div><div class='del'>-	wakeref = intel_runtime_pm_get(rpm);</div><div class='add'>+	wakeref = intel_runtime_pm_get_noresume(rpm);</div><div class='ctx'> </div><div class='ctx'> 	for_each_power_domain(domain, mask) {</div><div class='ctx'> 		/* Clear before put, so put's sanity check is happy. */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c<br/>index 06900ff307b2..83f616097a29 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_power_well.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_power_well.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_power_well.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_power_well.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include "intel_dkl_phy.h"</div><div class='ctx'> #include "intel_dkl_phy_regs.h"</div><div class='ctx'> #include "intel_dmc.h"</div><div class='add'>+#include "intel_dmc_wl.h"</div><div class='ctx'> #include "intel_dp_aux_regs.h"</div><div class='ctx'> #include "intel_dpio_phy.h"</div><div class='ctx'> #include "intel_dpll.h"</div><div class='hunk'>@@ -26,6 +27,7 @@</div><div class='ctx'> #include "intel_tc.h"</div><div class='ctx'> #include "intel_vga.h"</div><div class='ctx'> #include "skl_watermark.h"</div><div class='add'>+#include "vlv_dpio_phy_regs.h"</div><div class='ctx'> #include "vlv_sideband.h"</div><div class='ctx'> #include "vlv_sideband_reg.h"</div><div class='ctx'> </div><div class='hunk'>@@ -199,6 +201,9 @@ static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define ICL_AUX_PW_TO_PHY(pw_idx)	\</div><div class='add'>+	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + PHY_A)</div><div class='add'>+</div><div class='ctx'> #define ICL_AUX_PW_TO_CH(pw_idx)	\</div><div class='ctx'> 	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)</div><div class='ctx'> </div><div class='hunk'>@@ -217,27 +222,22 @@ static struct intel_digital_port *</div><div class='ctx'> aux_ch_to_digital_port(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		       enum aux_ch aux_ch)</div><div class='ctx'> {</div><div class='del'>-	struct intel_digital_port *dig_port = NULL;</div><div class='ctx'> 	struct intel_encoder *encoder;</div><div class='ctx'> </div><div class='ctx'> 	for_each_intel_encoder(&amp;dev_priv-&gt;drm, encoder) {</div><div class='add'>+		struct intel_digital_port *dig_port;</div><div class='add'>+</div><div class='ctx'> 		/* We'll check the MST primary port */</div><div class='ctx'> 		if (encoder-&gt;type == INTEL_OUTPUT_DP_MST)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		dig_port = enc_to_dig_port(encoder);</div><div class='del'>-		if (!dig_port)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (dig_port-&gt;aux_ch != aux_ch) {</div><div class='del'>-			dig_port = NULL;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		break;</div><div class='add'>+		if (dig_port &amp;&amp; dig_port-&gt;aux_ch == aux_ch)</div><div class='add'>+			return dig_port;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return dig_port;</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum phy icl_aux_pw_to_phy(struct drm_i915_private *i915,</div><div class='hunk'>@@ -253,7 +253,7 @@ static enum phy icl_aux_pw_to_phy(struct drm_i915_private *i915,</div><div class='ctx'> 	 * as HDMI-only and routed to a combo PHY, the encoder either won't be</div><div class='ctx'> 	 * present at all or it will not have an aux_ch assigned.</div><div class='ctx'> 	 */</div><div class='del'>-	return dig_port ? intel_port_to_phy(i915, dig_port-&gt;base.port) : PHY_NONE;</div><div class='add'>+	return dig_port ? intel_encoder_to_phy(&amp;dig_port-&gt;base) : PHY_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,</div><div class='hunk'>@@ -396,17 +396,11 @@ static void hsw_power_well_disable(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	hsw_wait_for_power_well_disable(dev_priv, power_well);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool intel_port_is_edp(struct drm_i915_private *i915, enum port port)</div><div class='add'>+static bool intel_aux_ch_is_edp(struct drm_i915_private *i915, enum aux_ch aux_ch)</div><div class='ctx'> {</div><div class='del'>-	struct intel_encoder *encoder;</div><div class='del'>-</div><div class='del'>-	for_each_intel_encoder(&amp;i915-&gt;drm, encoder) {</div><div class='del'>-		if (encoder-&gt;type == INTEL_OUTPUT_EDP &amp;&amp;</div><div class='del'>-		    encoder-&gt;port == port)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='add'>+	struct intel_digital_port *dig_port = aux_ch_to_digital_port(i915, aux_ch);</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return dig_port &amp;&amp; dig_port-&gt;base.type == INTEL_OUTPUT_EDP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -415,24 +409,25 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,</div><div class='ctx'> {</div><div class='ctx'> 	const struct i915_power_well_regs *regs = power_well-&gt;desc-&gt;ops-&gt;regs;</div><div class='ctx'> 	int pw_idx = i915_power_well_instance(power_well)-&gt;hsw.idx;</div><div class='del'>-	enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, !IS_ICELAKE(dev_priv));</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(dev_priv, regs-&gt;driver, 0, HSW_PWR_WELL_CTL_REQ(pw_idx));</div><div class='ctx'> </div><div class='del'>-	/* FIXME this is a mess */</div><div class='del'>-	if (phy != PHY_NONE)</div><div class='del'>-		intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),</div><div class='del'>-			     0, ICL_LANE_ENABLE_AUX);</div><div class='add'>+	/*</div><div class='add'>+	 * FIXME not sure if we should derive the PHY from the pw_idx, or</div><div class='add'>+	 * from the VBT defined AUX_CH-&gt;DDI-&gt;PHY mapping.</div><div class='add'>+	 */</div><div class='add'>+	intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(ICL_AUX_PW_TO_PHY(pw_idx)),</div><div class='add'>+		     0, ICL_LANE_ENABLE_AUX);</div><div class='ctx'> </div><div class='ctx'> 	hsw_wait_for_power_well_enable(dev_priv, power_well, false);</div><div class='ctx'> </div><div class='ctx'> 	/* Display WA #1178: icl */</div><div class='ctx'> 	if (pw_idx &gt;= ICL_PW_CTL_IDX_AUX_A &amp;&amp; pw_idx &lt;= ICL_PW_CTL_IDX_AUX_B &amp;&amp;</div><div class='del'>-	    !intel_port_is_edp(dev_priv, (enum port)phy))</div><div class='del'>-		intel_de_rmw(dev_priv, ICL_AUX_ANAOVRD1(pw_idx),</div><div class='del'>-			     0, ICL_AUX_ANAOVRD1_ENABLE | ICL_AUX_ANAOVRD1_LDO_BYPASS);</div><div class='add'>+	    !intel_aux_ch_is_edp(dev_priv, ICL_AUX_PW_TO_CH(pw_idx)))</div><div class='add'>+		intel_de_rmw(dev_priv, ICL_PORT_TX_DW6_AUX(ICL_AUX_PW_TO_PHY(pw_idx)),</div><div class='add'>+			     0, O_FUNC_OVRD_EN | O_LDO_BYPASS_CRI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -441,14 +436,15 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,</div><div class='ctx'> {</div><div class='ctx'> 	const struct i915_power_well_regs *regs = power_well-&gt;desc-&gt;ops-&gt;regs;</div><div class='ctx'> 	int pw_idx = i915_power_well_instance(power_well)-&gt;hsw.idx;</div><div class='del'>-	enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, !IS_ICELAKE(dev_priv));</div><div class='ctx'> </div><div class='del'>-	/* FIXME this is a mess */</div><div class='del'>-	if (phy != PHY_NONE)</div><div class='del'>-		intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),</div><div class='del'>-			     ICL_LANE_ENABLE_AUX, 0);</div><div class='add'>+	/*</div><div class='add'>+	 * FIXME not sure if we should derive the PHY from the pw_idx, or</div><div class='add'>+	 * from the VBT defined AUX_CH-&gt;DDI-&gt;PHY mapping.</div><div class='add'>+	 */</div><div class='add'>+	intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(ICL_AUX_PW_TO_PHY(pw_idx)),</div><div class='add'>+		     ICL_LANE_ENABLE_AUX, 0);</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(dev_priv, regs-&gt;driver, HSW_PWR_WELL_CTL_REQ(pw_idx), 0);</div><div class='ctx'> </div><div class='hunk'>@@ -827,6 +823,8 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,</div><div class='ctx'> 			     0, SKL_SELECT_ALTERNATE_DC_EXIT);</div><div class='ctx'> </div><div class='add'>+	intel_dmc_wl_enable(&amp;dev_priv-&gt;display);</div><div class='add'>+</div><div class='ctx'> 	gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -856,6 +854,8 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,</div><div class='ctx'> 			     0, SKL_SELECT_ALTERNATE_DC_EXIT);</div><div class='ctx'> </div><div class='add'>+	intel_dmc_wl_enable(&amp;dev_priv-&gt;display);</div><div class='add'>+</div><div class='ctx'> 	gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -906,39 +906,39 @@ static void hsw_power_well_sync_hw(struct drm_i915_private *dev_priv,</div><div class='ctx'> static void bxt_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,</div><div class='ctx'> 					   struct i915_power_well *power_well)</div><div class='ctx'> {</div><div class='del'>-	bxt_ddi_phy_init(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='add'>+	bxt_dpio_phy_init(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bxt_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv,</div><div class='ctx'> 					    struct i915_power_well *power_well)</div><div class='ctx'> {</div><div class='del'>-	bxt_ddi_phy_uninit(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='add'>+	bxt_dpio_phy_uninit(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool bxt_dpio_cmn_power_well_enabled(struct drm_i915_private *dev_priv,</div><div class='ctx'> 					    struct i915_power_well *power_well)</div><div class='ctx'> {</div><div class='del'>-	return bxt_ddi_phy_is_enabled(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='add'>+	return bxt_dpio_phy_is_enabled(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bxt_verify_ddi_phy_power_wells(struct drm_i915_private *dev_priv)</div><div class='add'>+static void bxt_verify_dpio_phy_power_wells(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct i915_power_well *power_well;</div><div class='ctx'> </div><div class='ctx'> 	power_well = lookup_power_well(dev_priv, BXT_DISP_PW_DPIO_CMN_A);</div><div class='ctx'> 	if (intel_power_well_refcount(power_well) &gt; 0)</div><div class='del'>-		bxt_ddi_phy_verify_state(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='add'>+		bxt_dpio_phy_verify_state(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='ctx'> </div><div class='ctx'> 	power_well = lookup_power_well(dev_priv, VLV_DISP_PW_DPIO_CMN_BC);</div><div class='ctx'> 	if (intel_power_well_refcount(power_well) &gt; 0)</div><div class='del'>-		bxt_ddi_phy_verify_state(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='add'>+		bxt_dpio_phy_verify_state(dev_priv, i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv)) {</div><div class='ctx'> 		power_well = lookup_power_well(dev_priv,</div><div class='ctx'> 					       GLK_DISP_PW_DPIO_CMN_C);</div><div class='ctx'> 		if (intel_power_well_refcount(power_well) &gt; 0)</div><div class='del'>-			bxt_ddi_phy_verify_state(dev_priv,</div><div class='del'>-						 i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='add'>+			bxt_dpio_phy_verify_state(dev_priv,</div><div class='add'>+						  i915_power_well_instance(power_well)-&gt;bxt.phy);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -976,16 +976,18 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	if (!HAS_DISPLAY(dev_priv))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	intel_dmc_wl_disable(&amp;dev_priv-&gt;display);</div><div class='add'>+</div><div class='ctx'> 	intel_cdclk_get_cdclk(dev_priv, &amp;cdclk_config);</div><div class='ctx'> 	/* Can't read out voltage_level so can't use intel_cdclk_changed() */</div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm,</div><div class='del'>-		    intel_cdclk_needs_modeset(&amp;dev_priv-&gt;display.cdclk.hw,</div><div class='add'>+		    intel_cdclk_clock_changed(&amp;dev_priv-&gt;display.cdclk.hw,</div><div class='ctx'> 					      &amp;cdclk_config));</div><div class='ctx'> </div><div class='ctx'> 	gen9_assert_dbuf_enabled(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='del'>-		bxt_verify_ddi_phy_power_wells(dev_priv);</div><div class='add'>+		bxt_verify_dpio_phy_power_wells(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 11)</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1396,8 +1398,8 @@ static void assert_chv_phy_status(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	 * The PHY may be busy with some initial calibration and whatnot,</div><div class='ctx'> 	 * so the power state can take a while to actually change.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intel_de_wait_for_register(dev_priv, DISPLAY_PHY_STATUS,</div><div class='del'>-				       phy_status_mask, phy_status, 10))</div><div class='add'>+	if (intel_de_wait(dev_priv, DISPLAY_PHY_STATUS,</div><div class='add'>+			  phy_status_mask, phy_status, 10))</div><div class='ctx'> 		drm_err(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			"Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",</div><div class='ctx'> 			intel_de_read(dev_priv, DISPLAY_PHY_STATUS) &amp; phy_status_mask,</div><div class='hunk'>@@ -1441,9 +1443,9 @@ static void chv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW28, tmp);</div><div class='ctx'> </div><div class='ctx'> 	if (id == VLV_DISP_PW_DPIO_CMN_BC) {</div><div class='del'>-		tmp = vlv_dpio_read(dev_priv, phy, _CHV_CMN_DW6_CH1);</div><div class='add'>+		tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW6_CH1);</div><div class='ctx'> 		tmp |= DPIO_DYNPWRDOWNEN_CH1;</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, _CHV_CMN_DW6_CH1, tmp);</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, CHV_CMN_DW6_CH1, tmp);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Force the non-existing CL2 off. BXT does this</div><div class='hunk'>@@ -1519,9 +1521,9 @@ static void assert_chv_phy_powergate(struct drm_i915_private *dev_priv, enum dpi</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (ch == DPIO_CH0)</div><div class='del'>-		reg = _CHV_CMN_DW0_CH0;</div><div class='add'>+		reg = CHV_CMN_DW0_CH0;</div><div class='ctx'> 	else</div><div class='del'>-		reg = _CHV_CMN_DW6_CH1;</div><div class='add'>+		reg = CHV_CMN_DW6_CH1;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> 	val = vlv_dpio_read(dev_priv, phy, reg);</div><div class='hunk'>@@ -1552,10 +1554,11 @@ static void assert_chv_phy_powergate(struct drm_i915_private *dev_priv, enum dpi</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ch == DPIO_CH0)</div><div class='del'>-		actual = val &gt;&gt; DPIO_ANYDL_POWERDOWN_SHIFT_CH0;</div><div class='add'>+		actual = REG_FIELD_GET(DPIO_ANYDL_POWERDOWN_CH0 |</div><div class='add'>+				       DPIO_ALLDL_POWERDOWN_CH0, val);</div><div class='ctx'> 	else</div><div class='del'>-		actual = val &gt;&gt; DPIO_ANYDL_POWERDOWN_SHIFT_CH1;</div><div class='del'>-	actual &amp;= DPIO_ALLDL_POWERDOWN | DPIO_ANYDL_POWERDOWN;</div><div class='add'>+		actual = REG_FIELD_GET(DPIO_ANYDL_POWERDOWN_CH1 |</div><div class='add'>+				       DPIO_ALLDL_POWERDOWN_CH1, val);</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN(&amp;dev_priv-&gt;drm, actual != expected,</div><div class='ctx'> 		 "Unexpected DPIO lane power down: all %d, any %d. Expected: all %d, any %d. (0x%x = 0x%08x)\n",</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h<br/>index 2f07b7afa3bf..b83ad06f2ea7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_reg_defs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_reg_defs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_reg_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_reg_defs.h</a></div><div class='hunk'>@@ -29,21 +29,21 @@</div><div class='ctx'> #define _MMIO_PLL(pll, a, b)		_MMIO(_PLL(pll, a, b))</div><div class='ctx'> #define _MMIO_PHY(phy, a, b)		_MMIO(_PHY(phy, a, b))</div><div class='ctx'> </div><div class='del'>-#define _MMIO_PIPE3(pipe, a, b, c)	_MMIO(_PICK_EVEN_2RANGES(pipe, 1, a, a, b, c))</div><div class='del'>-#define _MMIO_PORT3(pipe, a, b, c)	_MMIO(_PICK_EVEN_2RANGES(pipe, 1, a, a, b, c))</div><div class='add'>+#define _MMIO_BASE_PIPE3(base, pipe, a, b, c)	_MMIO((base) + _PICK_EVEN_2RANGES(pipe, 1, a, a, b, c))</div><div class='add'>+#define _MMIO_BASE_PORT3(base, pipe, a, b, c)	_MMIO((base) + _PICK_EVEN_2RANGES(pipe, 1, a, a, b, c))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Device info offset array based helpers for groups of registers with unevenly</div><div class='ctx'>  * spaced base offsets.</div><div class='ctx'>  */</div><div class='del'>-#define _MMIO_PIPE2(pipe, reg)		_MMIO(DISPLAY_INFO(dev_priv)-&gt;pipe_offsets[(pipe)] - \</div><div class='del'>-					      DISPLAY_INFO(dev_priv)-&gt;pipe_offsets[PIPE_A] + \</div><div class='del'>-					      DISPLAY_MMIO_BASE(dev_priv) + (reg))</div><div class='del'>-#define _MMIO_TRANS2(tran, reg)		_MMIO(DISPLAY_INFO(dev_priv)-&gt;trans_offsets[(tran)] - \</div><div class='del'>-					      DISPLAY_INFO(dev_priv)-&gt;trans_offsets[TRANSCODER_A] + \</div><div class='del'>-					      DISPLAY_MMIO_BASE(dev_priv) + (reg))</div><div class='del'>-#define _MMIO_CURSOR2(pipe, reg)	_MMIO(DISPLAY_INFO(dev_priv)-&gt;cursor_offsets[(pipe)] - \</div><div class='del'>-					      DISPLAY_INFO(dev_priv)-&gt;cursor_offsets[PIPE_A] + \</div><div class='del'>-					      DISPLAY_MMIO_BASE(dev_priv) + (reg))</div><div class='add'>+#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(DISPLAY_INFO(display)-&gt;pipe_offsets[(pipe)] - \</div><div class='add'>+						      DISPLAY_INFO(display)-&gt;pipe_offsets[PIPE_A] + \</div><div class='add'>+						      DISPLAY_MMIO_BASE(display) + (reg))</div><div class='add'>+#define _MMIO_TRANS2(display, tran, reg)	_MMIO(DISPLAY_INFO(display)-&gt;trans_offsets[(tran)] - \</div><div class='add'>+						      DISPLAY_INFO(display)-&gt;trans_offsets[TRANSCODER_A] + \</div><div class='add'>+						      DISPLAY_MMIO_BASE(display) + (reg))</div><div class='add'>+#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(DISPLAY_INFO(display)-&gt;cursor_offsets[(pipe)] - \</div><div class='add'>+						      DISPLAY_INFO(display)-&gt;cursor_offsets[PIPE_A] + \</div><div class='add'>+						      DISPLAY_MMIO_BASE(display) + (reg))</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_DISPLAY_REG_DEFS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h<br/>index bf3f942e19c3..62f7a30c37dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_types.h</a></div><div class='hunk'>@@ -661,7 +661,8 @@ struct intel_digital_connector_state {</div><div class='ctx'> 	int broadcast_rgb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define to_intel_digital_connector_state(x) container_of(x, struct intel_digital_connector_state, base)</div><div class='add'>+#define to_intel_digital_connector_state(conn_state) \</div><div class='add'>+	container_of_const((conn_state), struct intel_digital_connector_state, base)</div><div class='ctx'> </div><div class='ctx'> struct dpll {</div><div class='ctx'> 	/* given values */</div><div class='hunk'>@@ -1003,18 +1004,6 @@ enum intel_output_format {</div><div class='ctx'> 	INTEL_OUTPUT_FORMAT_YCBCR444,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct intel_mpllb_state {</div><div class='del'>-	u32 clock; /* in KHz */</div><div class='del'>-	u32 ref_control;</div><div class='del'>-	u32 mpllb_cp;</div><div class='del'>-	u32 mpllb_div;</div><div class='del'>-	u32 mpllb_div2;</div><div class='del'>-	u32 mpllb_fracn1;</div><div class='del'>-	u32 mpllb_fracn2;</div><div class='del'>-	u32 mpllb_sscen;</div><div class='del'>-	u32 mpllb_sscstep;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Used by dp and fdi links */</div><div class='ctx'> struct intel_link_m_n {</div><div class='ctx'> 	u32 tu;</div><div class='hunk'>@@ -1030,31 +1019,6 @@ struct intel_csc_matrix {</div><div class='ctx'> 	u16 postoff[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct intel_c10pll_state {</div><div class='del'>-	u32 clock; /* in KHz */</div><div class='del'>-	u8 tx;</div><div class='del'>-	u8 cmn;</div><div class='del'>-	u8 pll[20];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct intel_c20pll_state {</div><div class='del'>-	u32 clock; /* in kHz */</div><div class='del'>-	u16 tx[3];</div><div class='del'>-	u16 cmn[4];</div><div class='del'>-	union {</div><div class='del'>-		u16 mplla[10];</div><div class='del'>-		u16 mpllb[11];</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct intel_cx0pll_state {</div><div class='del'>-	union {</div><div class='del'>-		struct intel_c10pll_state c10;</div><div class='del'>-		struct intel_c20pll_state c20;</div><div class='del'>-	};</div><div class='del'>-	bool ssc_enabled;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct intel_crtc_state {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * uapi (drm) state. This is the software state shown to userspace.</div><div class='hunk'>@@ -1199,11 +1163,7 @@ struct intel_crtc_state {</div><div class='ctx'> 	struct intel_shared_dpll *shared_dpll;</div><div class='ctx'> </div><div class='ctx'> 	/* Actual register state of the dpll, for shared dpll cross-checking. */</div><div class='del'>-	union {</div><div class='del'>-		struct intel_dpll_hw_state dpll_hw_state;</div><div class='del'>-		struct intel_mpllb_state mpllb_state;</div><div class='del'>-		struct intel_cx0pll_state cx0pll_state;</div><div class='del'>-	};</div><div class='add'>+	struct intel_dpll_hw_state dpll_hw_state;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ICL reserved DPLLs for the CRTC/port. The active PLL is selected by</div><div class='hunk'>@@ -1346,6 +1306,7 @@ struct intel_crtc_state {</div><div class='ctx'> 		union hdmi_infoframe hdmi;</div><div class='ctx'> 		union hdmi_infoframe drm;</div><div class='ctx'> 		struct drm_dp_vsc_sdp vsc;</div><div class='add'>+		struct drm_dp_as_sdp as_sdp;</div><div class='ctx'> 	} infoframes;</div><div class='ctx'> </div><div class='ctx'> 	u8 eld[MAX_ELD_BYTES];</div><div class='hunk'>@@ -1432,6 +1393,7 @@ struct intel_crtc_state {</div><div class='ctx'> 		bool enable, in_range;</div><div class='ctx'> 		u8 pipeline_full;</div><div class='ctx'> 		u16 flipline, vmin, vmax, guardband;</div><div class='add'>+		u32 vsync_end, vsync_start;</div><div class='ctx'> 	} vrr;</div><div class='ctx'> </div><div class='ctx'> 	/* Stream Splitter for eDP MSO */</div><div class='hunk'>@@ -1620,12 +1582,17 @@ struct intel_watermark_params {</div><div class='ctx'> </div><div class='ctx'> #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)</div><div class='ctx'> #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)</div><div class='del'>-#define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, uapi)</div><div class='ctx'> #define to_intel_connector(x) container_of(x, struct intel_connector, base)</div><div class='ctx'> #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)</div><div class='del'>-#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)</div><div class='ctx'> #define to_intel_plane(x) container_of(x, struct intel_plane, base)</div><div class='del'>-#define to_intel_plane_state(x) container_of(x, struct intel_plane_state, uapi)</div><div class='add'>+</div><div class='add'>+#define to_intel_crtc_state(crtc_state) \</div><div class='add'>+	container_of_const((crtc_state), struct intel_crtc_state, uapi)</div><div class='add'>+#define to_intel_plane_state(plane_state) \</div><div class='add'>+	container_of_const((plane_state), struct intel_plane_state, uapi)</div><div class='add'>+#define to_intel_framebuffer(fb) \</div><div class='add'>+	container_of_const((fb), struct intel_framebuffer, base)</div><div class='add'>+</div><div class='ctx'> #define intel_fb_obj(x) ((x) ? to_intel_bo((x)-&gt;obj[0]) : NULL)</div><div class='ctx'> </div><div class='ctx'> struct intel_hdmi {</div><div class='hunk'>@@ -1740,6 +1707,8 @@ struct intel_psr {</div><div class='ctx'> </div><div class='ctx'> 		/* LNL and beyond */</div><div class='ctx'> 		u8 check_entry_lines;</div><div class='add'>+		u8 silence_period_sym_clocks;</div><div class='add'>+		u8 lfps_half_cycle_num_of_syms;</div><div class='ctx'> 	} alpm_parameters;</div><div class='ctx'> </div><div class='ctx'> 	ktime_t last_entry_attempt;</div><div class='hunk'>@@ -1801,6 +1770,7 @@ struct intel_dp {</div><div class='ctx'> </div><div class='ctx'> 	bool is_mst;</div><div class='ctx'> 	int active_mst_links;</div><div class='add'>+	enum drm_dp_mst_mode mst_detect;</div><div class='ctx'> </div><div class='ctx'> 	/* connector directly attached - won't be use for modeset in mst world */</div><div class='ctx'> 	struct intel_connector *attached_connector;</div><div class='hunk'>@@ -2186,4 +2156,41 @@ static inline int to_bpp_x16(int bpp)</div><div class='ctx'> 	return bpp &lt;&lt; 4;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Conversion functions/macros from various pointer types to struct</div><div class='add'>+ * intel_display pointer.</div><div class='add'>+ */</div><div class='add'>+#define __drm_device_to_intel_display(p) \</div><div class='add'>+	(&amp;to_i915(p)-&gt;display)</div><div class='add'>+#define __intel_connector_to_intel_display(p)		\</div><div class='add'>+	__drm_device_to_intel_display((p)-&gt;base.dev)</div><div class='add'>+#define __intel_crtc_to_intel_display(p)		\</div><div class='add'>+	__drm_device_to_intel_display((p)-&gt;base.dev)</div><div class='add'>+#define __intel_crtc_state_to_intel_display(p)			\</div><div class='add'>+	__drm_device_to_intel_display((p)-&gt;uapi.crtc-&gt;dev)</div><div class='add'>+#define __intel_digital_port_to_intel_display(p)		\</div><div class='add'>+	__drm_device_to_intel_display((p)-&gt;base.base.dev)</div><div class='add'>+#define __intel_dp_to_intel_display(p)	\</div><div class='add'>+	__drm_device_to_intel_display(dp_to_dig_port(p)-&gt;base.base.dev)</div><div class='add'>+#define __intel_encoder_to_intel_display(p)		\</div><div class='add'>+	__drm_device_to_intel_display((p)-&gt;base.dev)</div><div class='add'>+#define __intel_hdmi_to_intel_display(p)	\</div><div class='add'>+	__drm_device_to_intel_display(hdmi_to_dig_port(p)-&gt;base.base.dev)</div><div class='add'>+</div><div class='add'>+/* Helper for generic association. Map types to conversion functions/macros. */</div><div class='add'>+#define __assoc(type, p) \</div><div class='add'>+	struct type: __##type##_to_intel_display((struct type *)(p))</div><div class='add'>+</div><div class='add'>+/* Convert various pointer types to struct intel_display pointer. */</div><div class='add'>+#define to_intel_display(p)				\</div><div class='add'>+	_Generic(*p,					\</div><div class='add'>+		 __assoc(drm_device, p),		\</div><div class='add'>+		 __assoc(intel_connector, p),		\</div><div class='add'>+		 __assoc(intel_crtc, p),		\</div><div class='add'>+		 __assoc(intel_crtc_state, p),		\</div><div class='add'>+		 __assoc(intel_digital_port, p),	\</div><div class='add'>+		 __assoc(intel_dp, p),			\</div><div class='add'>+		 __assoc(intel_encoder, p),		\</div><div class='add'>+		 __assoc(intel_hdmi, p))</div><div class='add'>+</div><div class='ctx'> #endif /*  __INTEL_DISPLAY_TYPES_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c<br/>index ac136fd992ba..e5a8022db664 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_wa.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_display_wa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_display_wa.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_display_wa.c</a></div><div class='hunk'>@@ -10,20 +10,12 @@</div><div class='ctx'> </div><div class='ctx'> static void gen11_display_wa_apply(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	/* Wa_1409120013 */</div><div class='del'>-	intel_de_write(i915, ILK_DPFC_CHICKEN(INTEL_FBC_A),</div><div class='del'>-		       DPFC_CHICKEN_COMP_DUMMY_PIXEL);</div><div class='del'>-</div><div class='ctx'> 	/* Wa_14010594013 */</div><div class='ctx'> 	intel_de_rmw(i915, GEN8_CHICKEN_DCPR_1, 0, ICL_DELAY_PMRSP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xe_d_display_wa_apply(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	/* Wa_1409120013 */</div><div class='del'>-	intel_de_write(i915, ILK_DPFC_CHICKEN(INTEL_FBC_A),</div><div class='del'>-		       DPFC_CHICKEN_COMP_DUMMY_PIXEL);</div><div class='del'>-</div><div class='ctx'> 	/* Wa_14013723622 */</div><div class='ctx'> 	intel_de_rmw(i915, CLKREQ_POLICY, CLKREQ_POLICY_MEM_UP_OVRD, 0);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c<br/>index 835781624482..cbd2ac5671b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dmc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dmc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dmc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dmc.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "i915_drv.h"</div><div class='hunk'>@@ -38,6 +39,8 @@</div><div class='ctx'>  * low-power state and comes back to normal.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define INTEL_DMC_FIRMWARE_URL "https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git"</div><div class='add'>+</div><div class='ctx'> enum intel_dmc_id {</div><div class='ctx'> 	DMC_FW_MAIN = 0,</div><div class='ctx'> 	DMC_FW_PIPEA,</div><div class='hunk'>@@ -71,6 +74,21 @@ static struct intel_dmc *i915_to_dmc(struct drm_i915_private *i915)</div><div class='ctx'> 	return i915-&gt;display.dmc.dmc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *dmc_firmware_param(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	const char *p = i915-&gt;display.params.dmc_firmware_path;</div><div class='add'>+</div><div class='add'>+	return p &amp;&amp; *p ? p : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool dmc_firmware_param_disabled(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	const char *p = dmc_firmware_param(i915);</div><div class='add'>+</div><div class='add'>+	/* Magic path to indicate disabled */</div><div class='add'>+	return p &amp;&amp; !strcmp(p, "/dev/null");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DMC_VERSION(major, minor)	((major) &lt;&lt; 16 | (minor))</div><div class='ctx'> #define DMC_VERSION_MAJOR(version)	((version) &gt;&gt; 16)</div><div class='ctx'> #define DMC_VERSION_MINOR(version)	((version) &amp; 0xffff)</div><div class='hunk'>@@ -89,10 +107,14 @@ static struct intel_dmc *i915_to_dmc(struct drm_i915_private *i915)</div><div class='ctx'> 	__stringify(major) "_"			\</div><div class='ctx'> 	__stringify(minor) ".bin"</div><div class='ctx'> </div><div class='add'>+#define XE2LPD_DMC_MAX_FW_SIZE		0x8000</div><div class='ctx'> #define XELPDP_DMC_MAX_FW_SIZE		0x7000</div><div class='ctx'> #define DISPLAY_VER13_DMC_MAX_FW_SIZE	0x20000</div><div class='ctx'> #define DISPLAY_VER12_DMC_MAX_FW_SIZE	ICL_DMC_MAX_FW_SIZE</div><div class='ctx'> </div><div class='add'>+#define XE2LPD_DMC_PATH			DMC_PATH(xe2lpd)</div><div class='add'>+MODULE_FIRMWARE(XE2LPD_DMC_PATH);</div><div class='add'>+</div><div class='ctx'> #define MTL_DMC_PATH			DMC_PATH(mtl)</div><div class='ctx'> MODULE_FIRMWARE(MTL_DMC_PATH);</div><div class='ctx'> </div><div class='hunk'>@@ -136,6 +158,59 @@ MODULE_FIRMWARE(SKL_DMC_PATH);</div><div class='ctx'> #define BXT_DMC_MAX_FW_SIZE		0x3000</div><div class='ctx'> MODULE_FIRMWARE(BXT_DMC_PATH);</div><div class='ctx'> </div><div class='add'>+static const char *dmc_firmware_default(struct drm_i915_private *i915, u32 *size)</div><div class='add'>+{</div><div class='add'>+	const char *fw_path = NULL;</div><div class='add'>+	u32 max_fw_size = 0;</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER_FULL(i915) == IP_VER(20, 0)) {</div><div class='add'>+		fw_path = XE2LPD_DMC_PATH;</div><div class='add'>+		max_fw_size = XE2LPD_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0)) {</div><div class='add'>+		fw_path = MTL_DMC_PATH;</div><div class='add'>+		max_fw_size = XELPDP_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_DG2(i915)) {</div><div class='add'>+		fw_path = DG2_DMC_PATH;</div><div class='add'>+		max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_ALDERLAKE_P(i915)) {</div><div class='add'>+		fw_path = ADLP_DMC_PATH;</div><div class='add'>+		max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_ALDERLAKE_S(i915)) {</div><div class='add'>+		fw_path = ADLS_DMC_PATH;</div><div class='add'>+		max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_DG1(i915)) {</div><div class='add'>+		fw_path = DG1_DMC_PATH;</div><div class='add'>+		max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_ROCKETLAKE(i915)) {</div><div class='add'>+		fw_path = RKL_DMC_PATH;</div><div class='add'>+		max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_TIGERLAKE(i915)) {</div><div class='add'>+		fw_path = TGL_DMC_PATH;</div><div class='add'>+		max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (DISPLAY_VER(i915) == 11) {</div><div class='add'>+		fw_path = ICL_DMC_PATH;</div><div class='add'>+		max_fw_size = ICL_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_GEMINILAKE(i915)) {</div><div class='add'>+		fw_path = GLK_DMC_PATH;</div><div class='add'>+		max_fw_size = GLK_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_KABYLAKE(i915) ||</div><div class='add'>+		   IS_COFFEELAKE(i915) ||</div><div class='add'>+		   IS_COMETLAKE(i915)) {</div><div class='add'>+		fw_path = KBL_DMC_PATH;</div><div class='add'>+		max_fw_size = KBL_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_SKYLAKE(i915)) {</div><div class='add'>+		fw_path = SKL_DMC_PATH;</div><div class='add'>+		max_fw_size = SKL_DMC_MAX_FW_SIZE;</div><div class='add'>+	} else if (IS_BROXTON(i915)) {</div><div class='add'>+		fw_path = BXT_DMC_PATH;</div><div class='add'>+		max_fw_size = BXT_DMC_MAX_FW_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*size = max_fw_size;</div><div class='add'>+</div><div class='add'>+	return fw_path;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DMC_DEFAULT_FW_OFFSET		0xFFFFFFFF</div><div class='ctx'> #define PACKAGE_MAX_FW_INFO_ENTRIES	20</div><div class='ctx'> #define PACKAGE_V2_MAX_FW_INFO_ENTRIES	32</div><div class='hunk'>@@ -546,6 +621,8 @@ void intel_dmc_disable_program(struct drm_i915_private *i915)</div><div class='ctx'> 	pipedmc_clock_gating_wa(i915, true);</div><div class='ctx'> 	disable_all_event_handlers(i915);</div><div class='ctx'> 	pipedmc_clock_gating_wa(i915, false);</div><div class='add'>+</div><div class='add'>+	intel_dmc_wl_disable(&amp;i915-&gt;display);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void assert_dmc_loaded(struct drm_i915_private *i915)</div><div class='hunk'>@@ -845,7 +922,7 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,</div><div class='ctx'> 	return sizeof(struct intel_css_header);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)</div><div class='add'>+static int parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = dmc-&gt;i915;</div><div class='ctx'> 	struct intel_css_header *css_header;</div><div class='hunk'>@@ -858,13 +935,13 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)</div><div class='ctx'> 	u32 r, offset;</div><div class='ctx'> </div><div class='ctx'> 	if (!fw)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Extract CSS Header information */</div><div class='ctx'> 	css_header = (struct intel_css_header *)fw-&gt;data;</div><div class='ctx'> 	r = parse_dmc_fw_css(dmc, css_header, fw-&gt;size);</div><div class='ctx'> 	if (!r)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	readcount += r;</div><div class='ctx'> </div><div class='hunk'>@@ -872,7 +949,7 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)</div><div class='ctx'> 	package_header = (struct intel_package_header *)&amp;fw-&gt;data[readcount];</div><div class='ctx'> 	r = parse_dmc_fw_package(dmc, package_header, si, fw-&gt;size - readcount);</div><div class='ctx'> 	if (!r)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	readcount += r;</div><div class='ctx'> </div><div class='hunk'>@@ -889,6 +966,13 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)</div><div class='ctx'> 		dmc_header = (struct intel_dmc_header_base *)&amp;fw-&gt;data[offset];</div><div class='ctx'> 		parse_dmc_fw_header(dmc, dmc_header, fw-&gt;size - offset, dmc_id);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (!intel_dmc_has_payload(i915)) {</div><div class='add'>+		drm_err(&amp;i915-&gt;drm, "DMC firmware main program not found\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_dmc_runtime_pm_get(struct drm_i915_private *i915)</div><div class='hunk'>@@ -923,7 +1007,7 @@ static void dmc_load_work_fn(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	err = request_firmware(&amp;fw, dmc-&gt;fw_path, i915-&gt;drm.dev);</div><div class='ctx'> </div><div class='del'>-	if (err == -ENOENT &amp;&amp; !i915-&gt;params.dmc_firmware_path) {</div><div class='add'>+	if (err == -ENOENT &amp;&amp; !dmc_firmware_param(i915)) {</div><div class='ctx'> 		fallback_path = dmc_fallback_path(i915);</div><div class='ctx'> 		if (fallback_path) {</div><div class='ctx'> 			drm_dbg_kms(&amp;i915-&gt;drm, "%s not found, falling back to %s\n",</div><div class='hunk'>@@ -934,24 +1018,31 @@ static void dmc_load_work_fn(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	parse_dmc_fw(dmc, fw);</div><div class='del'>-</div><div class='del'>-	if (intel_dmc_has_payload(i915)) {</div><div class='del'>-		intel_dmc_load_program(i915);</div><div class='del'>-		intel_dmc_runtime_pm_put(i915);</div><div class='del'>-</div><div class='del'>-		drm_info(&amp;i915-&gt;drm, "Finished loading DMC firmware %s (v%u.%u)\n",</div><div class='del'>-			 dmc-&gt;fw_path, DMC_VERSION_MAJOR(dmc-&gt;version),</div><div class='del'>-			 DMC_VERSION_MINOR(dmc-&gt;version));</div><div class='del'>-	} else {</div><div class='add'>+	if (err) {</div><div class='ctx'> 		drm_notice(&amp;i915-&gt;drm,</div><div class='del'>-			   "Failed to load DMC firmware %s."</div><div class='del'>-			   " Disabling runtime power management.\n",</div><div class='del'>-			   dmc-&gt;fw_path);</div><div class='add'>+			   "Failed to load DMC firmware %s (%pe). Disabling runtime power management.\n",</div><div class='add'>+			   dmc-&gt;fw_path, ERR_PTR(err));</div><div class='ctx'> 		drm_notice(&amp;i915-&gt;drm, "DMC firmware homepage: %s",</div><div class='del'>-			   INTEL_UC_FIRMWARE_URL);</div><div class='add'>+			   INTEL_DMC_FIRMWARE_URL);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = parse_dmc_fw(dmc, fw);</div><div class='add'>+	if (err) {</div><div class='add'>+		drm_notice(&amp;i915-&gt;drm,</div><div class='add'>+			   "Failed to parse DMC firmware %s (%pe). Disabling runtime power management.\n",</div><div class='add'>+			   dmc-&gt;fw_path, ERR_PTR(err));</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_dmc_load_program(i915);</div><div class='add'>+	intel_dmc_runtime_pm_put(i915);</div><div class='add'>+</div><div class='add'>+	drm_info(&amp;i915-&gt;drm, "Finished loading DMC firmware %s (v%u.%u)\n",</div><div class='add'>+		 dmc-&gt;fw_path, DMC_VERSION_MAJOR(dmc-&gt;version),</div><div class='add'>+		 DMC_VERSION_MINOR(dmc-&gt;version));</div><div class='add'>+</div><div class='add'>+out:</div><div class='ctx'> 	release_firmware(fw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -987,56 +1078,16 @@ void intel_dmc_init(struct drm_i915_private *i915)</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;dmc-&gt;work, dmc_load_work_fn);</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0)) {</div><div class='del'>-		dmc-&gt;fw_path = MTL_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = XELPDP_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_DG2(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = DG2_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_ALDERLAKE_P(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = ADLP_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_ALDERLAKE_S(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = ADLS_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_DG1(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = DG1_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_ROCKETLAKE(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = RKL_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_TIGERLAKE(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = TGL_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (DISPLAY_VER(i915) == 11) {</div><div class='del'>-		dmc-&gt;fw_path = ICL_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = ICL_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_GEMINILAKE(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = GLK_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = GLK_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_KABYLAKE(i915) ||</div><div class='del'>-		   IS_COFFEELAKE(i915) ||</div><div class='del'>-		   IS_COMETLAKE(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = KBL_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = KBL_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_SKYLAKE(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = SKL_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = SKL_DMC_MAX_FW_SIZE;</div><div class='del'>-	} else if (IS_BROXTON(i915)) {</div><div class='del'>-		dmc-&gt;fw_path = BXT_DMC_PATH;</div><div class='del'>-		dmc-&gt;max_fw_size = BXT_DMC_MAX_FW_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i915-&gt;params.dmc_firmware_path) {</div><div class='del'>-		if (strlen(i915-&gt;params.dmc_firmware_path) == 0) {</div><div class='del'>-			drm_info(&amp;i915-&gt;drm,</div><div class='del'>-				 "Disabling DMC firmware and runtime PM\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	dmc-&gt;fw_path = dmc_firmware_default(i915, &amp;dmc-&gt;max_fw_size);</div><div class='ctx'> </div><div class='del'>-		dmc-&gt;fw_path = i915-&gt;params.dmc_firmware_path;</div><div class='add'>+	if (dmc_firmware_param_disabled(i915)) {</div><div class='add'>+		drm_info(&amp;i915-&gt;drm, "Disabling DMC firmware and runtime PM\n");</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dmc_firmware_param(i915))</div><div class='add'>+		dmc-&gt;fw_path = dmc_firmware_param(i915);</div><div class='add'>+</div><div class='ctx'> 	if (!dmc-&gt;fw_path) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "No known DMC firmware for platform, disabling runtime PM\n");</div><div class='hunk'>@@ -1072,6 +1123,8 @@ void intel_dmc_suspend(struct drm_i915_private *i915)</div><div class='ctx'> 	if (dmc)</div><div class='ctx'> 		flush_work(&amp;dmc-&gt;work);</div><div class='ctx'> </div><div class='add'>+	intel_dmc_wl_disable(&amp;i915-&gt;display);</div><div class='add'>+</div><div class='ctx'> 	/* Drop the reference held in case DMC isn't loaded. */</div><div class='ctx'> 	if (!intel_dmc_has_payload(i915))</div><div class='ctx'> 		intel_dmc_runtime_pm_put(i915);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h<br/>index 90d0dbb41cfe..1bf446f96a10 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dmc_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dmc_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dmc_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dmc_regs.h</a></div><div class='hunk'>@@ -97,4 +97,10 @@</div><div class='ctx'> #define TGL_DMC_DEBUG3		_MMIO(0x101090)</div><div class='ctx'> #define DG1_DMC_DEBUG3		_MMIO(0x13415c)</div><div class='ctx'> </div><div class='add'>+#define DMC_WAKELOCK_CFG	_MMIO(0x8F1B0)</div><div class='add'>+#define  DMC_WAKELOCK_CFG_ENABLE REG_BIT(31)</div><div class='add'>+#define DMC_WAKELOCK1_CTL	_MMIO(0x8F140)</div><div class='add'>+#define  DMC_WAKELOCK_CTL_REQ	 REG_BIT(31)</div><div class='add'>+#define  DMC_WAKELOCK_CTL_ACK	 REG_BIT(15)</div><div class='add'>+</div><div class='ctx'> #endif /* __INTEL_DMC_REGS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c<br/>new file mode 100644<br/>index 000000000000..d9864b9cc429<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dmc_wl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dmc_wl.c</a></div><div class='hunk'>@@ -0,0 +1,264 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include "intel_de.h"</div><div class='add'>+#include "intel_dmc.h"</div><div class='add'>+#include "intel_dmc_regs.h"</div><div class='add'>+#include "intel_dmc_wl.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: DMC wakelock support</div><div class='add'>+ *</div><div class='add'>+ * Wake lock is the mechanism to cause display engine to exit DC</div><div class='add'>+ * states to allow programming to registers that are powered down in</div><div class='add'>+ * those states. Previous projects exited DC states automatically when</div><div class='add'>+ * detecting programming. Now software controls the exit by</div><div class='add'>+ * programming the wake lock. This improves system performance and</div><div class='add'>+ * system interactions and better fits the flip queue style of</div><div class='add'>+ * programming. Wake lock is only required when DC5, DC6, or DC6v have</div><div class='add'>+ * been enabled in DC_STATE_EN and the wake lock mode of operation has</div><div class='add'>+ * been enabled.</div><div class='add'>+ *</div><div class='add'>+ * The wakelock mechanism in DMC allows the display engine to exit DC</div><div class='add'>+ * states explicitly before programming registers that may be powered</div><div class='add'>+ * down.  In earlier hardware, this was done automatically and</div><div class='add'>+ * implicitly when the display engine accessed a register.  With the</div><div class='add'>+ * wakelock implementation, the driver asserts a wakelock in DMC,</div><div class='add'>+ * which forces it to exit the DC state until the wakelock is</div><div class='add'>+ * deasserted.</div><div class='add'>+ *</div><div class='add'>+ * The mechanism can be enabled and disabled by writing to the</div><div class='add'>+ * DMC_WAKELOCK_CFG register.  There are also 13 control registers</div><div class='add'>+ * that can be used to hold and release different wakelocks.  In the</div><div class='add'>+ * current implementation, we only need one wakelock, so only</div><div class='add'>+ * DMC_WAKELOCK1_CTL is used.  The other definitions are here for</div><div class='add'>+ * potential future use.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define DMC_WAKELOCK_CTL_TIMEOUT 5</div><div class='add'>+#define DMC_WAKELOCK_HOLD_TIME 50</div><div class='add'>+</div><div class='add'>+struct intel_dmc_wl_range {</div><div class='add'>+	u32 start;</div><div class='add'>+	u32 end;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intel_dmc_wl_range lnl_wl_range[] = {</div><div class='add'>+	{ .start = 0x60000, .end = 0x7ffff },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __intel_dmc_wl_release(struct intel_display *display)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(display-&gt;drm);</div><div class='add'>+	struct intel_dmc_wl *wl = &amp;display-&gt;wl;</div><div class='add'>+</div><div class='add'>+	WARN_ON(refcount_read(&amp;wl-&gt;refcount));</div><div class='add'>+</div><div class='add'>+	queue_delayed_work(i915-&gt;unordered_wq, &amp;wl-&gt;work,</div><div class='add'>+			   msecs_to_jiffies(DMC_WAKELOCK_HOLD_TIME));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_dmc_wl_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct intel_dmc_wl *wl =</div><div class='add'>+		container_of(work, struct intel_dmc_wl, work.work);</div><div class='add'>+	struct intel_display *display =</div><div class='add'>+		container_of(wl, struct intel_display, wl);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;wl-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Bail out if refcount reached zero while waiting for the spinlock */</div><div class='add'>+	if (!refcount_read(&amp;wl-&gt;refcount))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	__intel_de_rmw_nowl(display, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_REQ, 0);</div><div class='add'>+</div><div class='add'>+	if (__intel_de_wait_for_register_nowl(display, DMC_WAKELOCK1_CTL,</div><div class='add'>+					      DMC_WAKELOCK_CTL_ACK, 0,</div><div class='add'>+					      DMC_WAKELOCK_CTL_TIMEOUT)) {</div><div class='add'>+		WARN_RATELIMIT(1, "DMC wakelock release timed out");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl-&gt;taken = false;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;wl-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool intel_dmc_wl_check_range(u32 address)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	bool wl_needed = false;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(lnl_wl_range); i++) {</div><div class='add'>+		if (address &gt;= lnl_wl_range[i].start &amp;&amp;</div><div class='add'>+		    address &lt;= lnl_wl_range[i].end) {</div><div class='add'>+			wl_needed = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return wl_needed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __intel_dmc_wl_supported(struct intel_display *display)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(display-&gt;drm);</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER(display) &lt; 20 ||</div><div class='add'>+	    !intel_dmc_has_payload(i915) ||</div><div class='add'>+	    !display-&gt;params.enable_dmc_wl)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dmc_wl_init(struct intel_display *display)</div><div class='add'>+{</div><div class='add'>+	struct intel_dmc_wl *wl = &amp;display-&gt;wl;</div><div class='add'>+</div><div class='add'>+	/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */</div><div class='add'>+	if (DISPLAY_VER(display) &lt; 20 || !display-&gt;params.enable_dmc_wl)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;wl-&gt;work, intel_dmc_wl_work);</div><div class='add'>+	spin_lock_init(&amp;wl-&gt;lock);</div><div class='add'>+	refcount_set(&amp;wl-&gt;refcount, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dmc_wl_enable(struct intel_display *display)</div><div class='add'>+{</div><div class='add'>+	struct intel_dmc_wl *wl = &amp;display-&gt;wl;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!__intel_dmc_wl_supported(display))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;wl-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;enabled)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Enable wakelock in DMC.  We shouldn't try to take the</div><div class='add'>+	 * wakelock, because we're just enabling it, so call the</div><div class='add'>+	 * non-locking version directly here.</div><div class='add'>+	 */</div><div class='add'>+	__intel_de_rmw_nowl(display, DMC_WAKELOCK_CFG, 0, DMC_WAKELOCK_CFG_ENABLE);</div><div class='add'>+</div><div class='add'>+	wl-&gt;enabled = true;</div><div class='add'>+	wl-&gt;taken = false;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;wl-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dmc_wl_disable(struct intel_display *display)</div><div class='add'>+{</div><div class='add'>+	struct intel_dmc_wl *wl = &amp;display-&gt;wl;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!__intel_dmc_wl_supported(display))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	flush_delayed_work(&amp;wl-&gt;work);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;wl-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;enabled)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	/* Disable wakelock in DMC */</div><div class='add'>+	__intel_de_rmw_nowl(display, DMC_WAKELOCK_CFG, DMC_WAKELOCK_CFG_ENABLE, 0);</div><div class='add'>+</div><div class='add'>+	refcount_set(&amp;wl-&gt;refcount, 0);</div><div class='add'>+	wl-&gt;enabled = false;</div><div class='add'>+	wl-&gt;taken = false;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;wl-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg)</div><div class='add'>+{</div><div class='add'>+	struct intel_dmc_wl *wl = &amp;display-&gt;wl;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!__intel_dmc_wl_supported(display))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!intel_dmc_wl_check_range(reg.reg))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;wl-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;enabled)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work(&amp;wl-&gt;work);</div><div class='add'>+</div><div class='add'>+	if (refcount_inc_not_zero(&amp;wl-&gt;refcount))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	refcount_set(&amp;wl-&gt;refcount, 1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Only try to take the wakelock if it's not marked as taken</div><div class='add'>+	 * yet.  It may be already taken at this point if we have</div><div class='add'>+	 * already released the last reference, but the work has not</div><div class='add'>+	 * run yet.</div><div class='add'>+	 */</div><div class='add'>+	if (!wl-&gt;taken) {</div><div class='add'>+		__intel_de_rmw_nowl(display, DMC_WAKELOCK1_CTL, 0,</div><div class='add'>+				    DMC_WAKELOCK_CTL_REQ);</div><div class='add'>+</div><div class='add'>+		if (__intel_de_wait_for_register_nowl(display, DMC_WAKELOCK1_CTL,</div><div class='add'>+						      DMC_WAKELOCK_CTL_ACK,</div><div class='add'>+						      DMC_WAKELOCK_CTL_ACK,</div><div class='add'>+						      DMC_WAKELOCK_CTL_TIMEOUT)) {</div><div class='add'>+			WARN_RATELIMIT(1, "DMC wakelock ack timed out");</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wl-&gt;taken = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;wl-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg)</div><div class='add'>+{</div><div class='add'>+	struct intel_dmc_wl *wl = &amp;display-&gt;wl;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!__intel_dmc_wl_supported(display))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!intel_dmc_wl_check_range(reg.reg))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;wl-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;enabled)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	if (WARN_RATELIMIT(!refcount_read(&amp;wl-&gt;refcount),</div><div class='add'>+			   "Tried to put wakelock with refcount zero\n"))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	if (refcount_dec_and_test(&amp;wl-&gt;refcount)) {</div><div class='add'>+		__intel_dmc_wl_release(display);</div><div class='add'>+</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;wl-&gt;lock, flags);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h b/drivers/gpu/drm/i915/display/intel_dmc_wl.h<br/>new file mode 100644<br/>index 000000000000..adab51208d0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dmc_wl.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dmc_wl.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __INTEL_WAKELOCK_H__</div><div class='add'>+#define __INTEL_WAKELOCK_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/refcount.h&gt;</div><div class='add'>+</div><div class='add'>+#include "i915_reg_defs.h"</div><div class='add'>+</div><div class='add'>+struct intel_display;</div><div class='add'>+</div><div class='add'>+struct intel_dmc_wl {</div><div class='add'>+	spinlock_t lock; /* protects enabled, taken  and refcount */</div><div class='add'>+	bool enabled;</div><div class='add'>+	bool taken;</div><div class='add'>+	refcount_t refcount;</div><div class='add'>+	struct delayed_work work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void intel_dmc_wl_init(struct intel_display *display);</div><div class='add'>+void intel_dmc_wl_enable(struct intel_display *display);</div><div class='add'>+void intel_dmc_wl_disable(struct intel_display *display);</div><div class='add'>+void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg);</div><div class='add'>+void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg);</div><div class='add'>+</div><div class='add'>+#endif /* __INTEL_WAKELOCK_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c<br/>index e583515f9b25..e05e25cd4a94 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp.c</a></div><div class='hunk'>@@ -89,6 +89,9 @@</div><div class='ctx'> #define DP_DSC_MAX_ENC_THROUGHPUT_0		340000</div><div class='ctx'> #define DP_DSC_MAX_ENC_THROUGHPUT_1		400000</div><div class='ctx'> </div><div class='add'>+/* Max DSC line buffer depth supported by HW. */</div><div class='add'>+#define INTEL_DP_DSC_MAX_LINE_BUF_DEPTH		13</div><div class='add'>+</div><div class='ctx'> /* DP DSC FEC Overhead factor in ppm = 1/(0.972261) = 1.028530 */</div><div class='ctx'> #define DP_DSC_FEC_OVERHEAD_FACTOR		1028530</div><div class='ctx'> </div><div class='hunk'>@@ -123,6 +126,14 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)</div><div class='ctx'> 	return dig_port-&gt;base.type == INTEL_OUTPUT_EDP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='add'>+</div><div class='add'>+	return HAS_AS_SDP(i915) &amp;&amp;</div><div class='add'>+		drm_dp_as_sdp_supported(&amp;intel_dp-&gt;aux, intel_dp-&gt;dpcd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_dp_unset_edid(struct intel_dp *intel_dp);</div><div class='ctx'> </div><div class='ctx'> /* Is link rate UHBR and thus 128b/132b? */</div><div class='hunk'>@@ -214,7 +225,7 @@ static void intel_dp_set_dpcd_sink_rates(struct intel_dp *intel_dp)</div><div class='ctx'> 	 * Sink rates for 128b/132b. If set, sink should support all 8b/10b</div><div class='ctx'> 	 * rates and 10 Gbps.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intel_dp-&gt;dpcd[DP_MAIN_LINK_CHANNEL_CODING] &amp; DP_CAP_ANSI_128B132B) {</div><div class='add'>+	if (drm_dp_128b132b_supported(intel_dp-&gt;dpcd)) {</div><div class='ctx'> 		u8 uhbr_rates = 0;</div><div class='ctx'> </div><div class='ctx'> 		BUILD_BUG_ON(ARRAY_SIZE(intel_dp-&gt;sink_rates) &lt; ARRAY_SIZE(dp_rates) + 3);</div><div class='hunk'>@@ -425,7 +436,7 @@ int intel_dp_max_link_data_rate(struct intel_dp *intel_dp,</div><div class='ctx'> 	return max_rate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp)</div><div class='add'>+bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);</div><div class='ctx'> 	struct intel_encoder *encoder = &amp;intel_dig_port-&gt;base;</div><div class='hunk'>@@ -443,11 +454,9 @@ static int dg2_max_source_rate(struct intel_dp *intel_dp)</div><div class='ctx'> </div><div class='ctx'> static int icl_max_source_rate(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='del'>-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, dig_port-&gt;base.port);</div><div class='add'>+	struct intel_encoder *encoder = &amp;dp_to_dig_port(intel_dp)-&gt;base;</div><div class='ctx'> </div><div class='del'>-	if (intel_phy_is_combo(dev_priv, phy) &amp;&amp; !intel_dp_is_edp(intel_dp))</div><div class='add'>+	if (intel_encoder_is_combo(encoder) &amp;&amp; !intel_dp_is_edp(intel_dp))</div><div class='ctx'> 		return 540000;</div><div class='ctx'> </div><div class='ctx'> 	return 810000;</div><div class='hunk'>@@ -463,11 +472,9 @@ static int ehl_max_source_rate(struct intel_dp *intel_dp)</div><div class='ctx'> </div><div class='ctx'> static int mtl_max_source_rate(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='del'>-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='add'>+	struct intel_encoder *encoder = &amp;dp_to_dig_port(intel_dp)-&gt;base;</div><div class='ctx'> </div><div class='del'>-	if (intel_is_c10phy(i915, phy))</div><div class='add'>+	if (intel_encoder_is_c10phy(encoder))</div><div class='ctx'> 		return 810000;</div><div class='ctx'> </div><div class='ctx'> 	return 2000000;</div><div class='hunk'>@@ -1198,15 +1205,15 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,</div><div class='add'>+			     struct intel_connector *connector,</div><div class='ctx'> 			     int hdisplay, int clock)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='del'>-	struct intel_connector *connector = intel_dp-&gt;attached_connector;</div><div class='ctx'> </div><div class='del'>-	if (!intel_dp_can_bigjoiner(intel_dp))</div><div class='add'>+	if (!intel_dp_has_bigjoiner(intel_dp))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return clock &gt; i915-&gt;max_dotclk_freq || hdisplay &gt; 5120 ||</div><div class='add'>+	return clock &gt; i915-&gt;display.cdclk.max_dotclk_freq || hdisplay &gt; 5120 ||</div><div class='ctx'> 	       connector-&gt;force_bigjoiner_enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1220,7 +1227,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 	const struct drm_display_mode *fixed_mode;</div><div class='ctx'> 	int target_clock = mode-&gt;clock;</div><div class='ctx'> 	int max_rate, mode_rate, max_lanes, max_link_clock;</div><div class='del'>-	int max_dotclk = dev_priv-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = dev_priv-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	u16 dsc_max_compressed_bpp = 0;</div><div class='ctx'> 	u8 dsc_slice_count = 0;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='hunk'>@@ -1233,6 +1240,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLCLK)</div><div class='ctx'> 		return MODE_H_ILLEGAL;</div><div class='ctx'> </div><div class='add'>+	if (mode-&gt;clock &lt; 10000)</div><div class='add'>+		return MODE_CLOCK_LOW;</div><div class='add'>+</div><div class='ctx'> 	fixed_mode = intel_panel_fixed_mode(connector, mode);</div><div class='ctx'> 	if (intel_dp_is_edp(intel_dp) &amp;&amp; fixed_mode) {</div><div class='ctx'> 		status = intel_panel_mode_valid(connector, mode);</div><div class='hunk'>@@ -1242,10 +1252,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 		target_clock = fixed_mode-&gt;clock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;clock &lt; 10000)</div><div class='del'>-		return MODE_CLOCK_LOW;</div><div class='del'>-</div><div class='del'>-	if (intel_dp_need_bigjoiner(intel_dp, mode-&gt;hdisplay, target_clock)) {</div><div class='add'>+	if (intel_dp_need_bigjoiner(intel_dp, connector,</div><div class='add'>+				    mode-&gt;hdisplay, target_clock)) {</div><div class='ctx'> 		bigjoiner = true;</div><div class='ctx'> 		max_dotclk *= 2;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1306,11 +1314,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 		dsc = dsc_max_compressed_bpp &amp;&amp; dsc_slice_count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Big joiner configuration needs DSC for TGL which is not true for</div><div class='del'>-	 * XE_LPD where uncompressed joiner is supported.</div><div class='del'>-	 */</div><div class='del'>-	if (DISPLAY_VER(dev_priv) &lt; 13 &amp;&amp; bigjoiner &amp;&amp; !dsc)</div><div class='add'>+	if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) &amp;&amp; !dsc)</div><div class='ctx'> 		return MODE_CLOCK_HIGH;</div><div class='ctx'> </div><div class='ctx'> 	if (mode_rate &gt; max_rate &amp;&amp; !dsc)</div><div class='hunk'>@@ -1704,7 +1708,6 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(connector-&gt;base.dev);</div><div class='ctx'> 	struct drm_dsc_config *vdsc_cfg = &amp;crtc_state-&gt;dsc.config;</div><div class='del'>-	u8 line_buf_depth;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1733,20 +1736,14 @@ static int intel_dp_dsc_compute_params(const struct intel_connector *connector,</div><div class='ctx'> 			connector-&gt;dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &amp;</div><div class='ctx'> 			DP_DSC_RGB;</div><div class='ctx'> </div><div class='del'>-	line_buf_depth = drm_dp_dsc_sink_line_buf_depth(connector-&gt;dp.dsc_dpcd);</div><div class='del'>-	if (!line_buf_depth) {</div><div class='add'>+	vdsc_cfg-&gt;line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,</div><div class='add'>+				       drm_dp_dsc_sink_line_buf_depth(connector-&gt;dp.dsc_dpcd));</div><div class='add'>+	if (!vdsc_cfg-&gt;line_buf_depth) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "DSC Sink Line Buffer Depth invalid\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vdsc_cfg-&gt;dsc_version_minor == 2)</div><div class='del'>-		vdsc_cfg-&gt;line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?</div><div class='del'>-			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;</div><div class='del'>-	else</div><div class='del'>-		vdsc_cfg-&gt;line_buf_depth = (line_buf_depth &gt; DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?</div><div class='del'>-			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;</div><div class='del'>-</div><div class='ctx'> 	vdsc_cfg-&gt;block_pred_enable =</div><div class='ctx'> 		connector-&gt;dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &amp;</div><div class='ctx'> 		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;</div><div class='hunk'>@@ -2401,6 +2398,16 @@ int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	return intel_dp_link_required(adjusted_mode-&gt;crtc_clock, bpp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Pipe joiner needs compression up to display 12 due to bandwidth</div><div class='add'>+	 * limitation. DG2 onwards pipe joiner can be enabled without</div><div class='add'>+	 * compression.</div><div class='add'>+	 */</div><div class='add'>+	return DISPLAY_VER(i915) &lt; 13 &amp;&amp; use_joiner;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> intel_dp_compute_link_config(struct intel_encoder *encoder,</div><div class='ctx'> 			     struct intel_crtc_state *pipe_config,</div><div class='hunk'>@@ -2409,30 +2416,25 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(pipe_config-&gt;uapi.crtc);</div><div class='del'>-	const struct intel_connector *connector =</div><div class='add'>+	struct intel_connector *connector =</div><div class='ctx'> 		to_intel_connector(conn_state-&gt;connector);</div><div class='ctx'> 	const struct drm_display_mode *adjusted_mode =</div><div class='ctx'> 		&amp;pipe_config-&gt;hw.adjusted_mode;</div><div class='ctx'> 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);</div><div class='ctx'> 	struct link_config_limits limits;</div><div class='del'>-	bool joiner_needs_dsc = false;</div><div class='del'>-	bool dsc_needed;</div><div class='add'>+	bool dsc_needed, joiner_needs_dsc;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_config-&gt;fec_enable &amp;&amp;</div><div class='ctx'> 	    !intel_dp_supports_fec(intel_dp, connector, pipe_config))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode-&gt;crtc_hdisplay,</div><div class='add'>+	if (intel_dp_need_bigjoiner(intel_dp, connector,</div><div class='add'>+				    adjusted_mode-&gt;crtc_hdisplay,</div><div class='ctx'> 				    adjusted_mode-&gt;crtc_clock))</div><div class='ctx'> 		pipe_config-&gt;bigjoiner_pipes = GENMASK(crtc-&gt;pipe + 1, crtc-&gt;pipe);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Pipe joiner needs compression up to display 12 due to bandwidth</div><div class='del'>-	 * limitation. DG2 onwards pipe joiner can be enabled without</div><div class='del'>-	 * compression.</div><div class='del'>-	 */</div><div class='del'>-	joiner_needs_dsc = DISPLAY_VER(i915) &lt; 13 &amp;&amp; pipe_config-&gt;bigjoiner_pipes;</div><div class='add'>+	joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, pipe_config-&gt;bigjoiner_pipes);</div><div class='ctx'> </div><div class='ctx'> 	dsc_needed = joiner_needs_dsc || intel_dp-&gt;force_dsc_en ||</div><div class='ctx'> 		     !intel_dp_compute_config_limits(intel_dp, pipe_config,</div><div class='hunk'>@@ -2615,6 +2617,29 @@ static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc</div><div class='ctx'> 	vsc-&gt;content_type = DP_CONTENT_TYPE_NOT_DEFINED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,</div><div class='add'>+				    struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_dp_as_sdp *as_sdp = &amp;crtc_state-&gt;infoframes.as_sdp;</div><div class='add'>+	const struct drm_display_mode *adjusted_mode =</div><div class='add'>+		&amp;crtc_state-&gt;hw.adjusted_mode;</div><div class='add'>+</div><div class='add'>+	if (!crtc_state-&gt;vrr.enable ||</div><div class='add'>+	    !intel_dp_as_sdp_supported(intel_dp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	crtc_state-&gt;infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);</div><div class='add'>+</div><div class='add'>+	/* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */</div><div class='add'>+	as_sdp-&gt;sdp_type = DP_SDP_ADAPTIVE_SYNC;</div><div class='add'>+	as_sdp-&gt;length = 0x9;</div><div class='add'>+	as_sdp-&gt;mode = DP_AS_SDP_AVT_FIXED_VTOTAL;</div><div class='add'>+	as_sdp-&gt;vtotal = adjusted_mode-&gt;vtotal;</div><div class='add'>+	as_sdp-&gt;target_rr = 0;</div><div class='add'>+	as_sdp-&gt;duration_incr_ms = 0;</div><div class='add'>+	as_sdp-&gt;duration_incr_ms = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,</div><div class='ctx'> 				     struct intel_crtc_state *crtc_state,</div><div class='ctx'> 				     const struct drm_connector_state *conn_state)</div><div class='hunk'>@@ -2970,6 +2995,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> 		g4x_dp_set_clock(encoder, pipe_config);</div><div class='ctx'> </div><div class='ctx'> 	intel_vrr_compute_config(pipe_config, conn_state);</div><div class='add'>+	intel_dp_compute_as_sdp(intel_dp, pipe_config);</div><div class='ctx'> 	intel_psr_compute_config(intel_dp, pipe_config, conn_state);</div><div class='ctx'> 	intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);</div><div class='ctx'> 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);</div><div class='hunk'>@@ -3362,6 +3388,14 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,</div><div class='ctx'> 		fastset = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (CAN_PANEL_REPLAY(intel_dp)) {</div><div class='add'>+		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='add'>+			    "[ENCODER:%d:%s] Forcing full modeset to compute panel replay state\n",</div><div class='add'>+			    encoder-&gt;base.base.id, encoder-&gt;base.name);</div><div class='add'>+		crtc_state-&gt;uapi.mode_changed = true;</div><div class='add'>+		fastset = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return fastset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4045,39 +4079,84 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)</div><div class='ctx'> 					   intel_dp-&gt;downstream_ports) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-intel_dp_can_mst(struct intel_dp *intel_dp)</div><div class='add'>+static const char *intel_dp_mst_mode_str(enum drm_dp_mst_mode mst_mode)</div><div class='add'>+{</div><div class='add'>+	if (mst_mode == DRM_DP_MST)</div><div class='add'>+		return "MST";</div><div class='add'>+	else if (mst_mode == DRM_DP_SST_SIDEBAND_MSG)</div><div class='add'>+		return "SST w/ sideband messaging";</div><div class='add'>+	else</div><div class='add'>+		return "SST";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum drm_dp_mst_mode</div><div class='add'>+intel_dp_mst_mode_choose(struct intel_dp *intel_dp,</div><div class='add'>+			 enum drm_dp_mst_mode sink_mst_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='ctx'> </div><div class='del'>-	return i915-&gt;display.params.enable_dp_mst &amp;&amp;</div><div class='del'>-		intel_dp_mst_source_support(intel_dp) &amp;&amp;</div><div class='del'>-		drm_dp_read_mst_cap(&amp;intel_dp-&gt;aux, intel_dp-&gt;dpcd);</div><div class='add'>+	if (!i915-&gt;display.params.enable_dp_mst)</div><div class='add'>+		return DRM_DP_SST;</div><div class='add'>+</div><div class='add'>+	if (!intel_dp_mst_source_support(intel_dp))</div><div class='add'>+		return DRM_DP_SST;</div><div class='add'>+</div><div class='add'>+	if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG &amp;&amp;</div><div class='add'>+	    !(intel_dp-&gt;dpcd[DP_MAIN_LINK_CHANNEL_CODING] &amp; DP_CAP_ANSI_128B132B))</div><div class='add'>+		return DRM_DP_SST;</div><div class='add'>+</div><div class='add'>+	return sink_mst_mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-intel_dp_configure_mst(struct intel_dp *intel_dp)</div><div class='add'>+static enum drm_dp_mst_mode</div><div class='add'>+intel_dp_mst_detect(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='del'>-	struct intel_encoder *encoder =</div><div class='del'>-		&amp;dp_to_dig_port(intel_dp)-&gt;base;</div><div class='del'>-	bool sink_can_mst = drm_dp_read_mst_cap(&amp;intel_dp-&gt;aux, intel_dp-&gt;dpcd);</div><div class='add'>+	struct intel_encoder *encoder = &amp;dp_to_dig_port(intel_dp)-&gt;base;</div><div class='add'>+	enum drm_dp_mst_mode sink_mst_mode;</div><div class='add'>+	enum drm_dp_mst_mode mst_detect;</div><div class='add'>+</div><div class='add'>+	sink_mst_mode = drm_dp_read_mst_cap(&amp;intel_dp-&gt;aux, intel_dp-&gt;dpcd);</div><div class='add'>+</div><div class='add'>+	mst_detect = intel_dp_mst_mode_choose(intel_dp, sink_mst_mode);</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s\n",</div><div class='add'>+		    "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s -&gt; enable: %s\n",</div><div class='ctx'> 		    encoder-&gt;base.base.id, encoder-&gt;base.name,</div><div class='ctx'> 		    str_yes_no(intel_dp_mst_source_support(intel_dp)),</div><div class='del'>-		    str_yes_no(sink_can_mst),</div><div class='del'>-		    str_yes_no(i915-&gt;display.params.enable_dp_mst));</div><div class='add'>+		    intel_dp_mst_mode_str(sink_mst_mode),</div><div class='add'>+		    str_yes_no(i915-&gt;display.params.enable_dp_mst),</div><div class='add'>+		    intel_dp_mst_mode_str(mst_detect));</div><div class='add'>+</div><div class='add'>+	return mst_detect;</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+intel_dp_mst_configure(struct intel_dp *intel_dp)</div><div class='add'>+{</div><div class='ctx'> 	if (!intel_dp_mst_source_support(intel_dp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_dp-&gt;is_mst = sink_can_mst &amp;&amp;</div><div class='del'>-		i915-&gt;display.params.enable_dp_mst;</div><div class='add'>+	intel_dp-&gt;is_mst = intel_dp-&gt;mst_detect != DRM_DP_SST;</div><div class='add'>+</div><div class='add'>+	drm_dp_mst_topology_mgr_set_mst(&amp;intel_dp-&gt;mst_mgr, intel_dp-&gt;is_mst);</div><div class='add'>+</div><div class='add'>+	/* Avoid stale info on the next detect cycle. */</div><div class='add'>+	intel_dp-&gt;mst_detect = DRM_DP_SST;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+intel_dp_mst_disconnect(struct intel_dp *intel_dp)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='add'>+</div><div class='add'>+	if (!intel_dp-&gt;is_mst)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	drm_dp_mst_topology_mgr_set_mst(&amp;intel_dp-&gt;mst_mgr,</div><div class='del'>-					intel_dp-&gt;is_mst);</div><div class='add'>+	drm_dbg_kms(&amp;i915-&gt;drm, "MST device may have disappeared %d vs %d\n",</div><div class='add'>+		    intel_dp-&gt;is_mst, intel_dp-&gt;mst_mgr.mst_state);</div><div class='add'>+	intel_dp-&gt;is_mst = false;</div><div class='add'>+	drm_dp_mst_topology_mgr_set_mst(&amp;intel_dp-&gt;mst_mgr, intel_dp-&gt;is_mst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='hunk'>@@ -4125,6 +4204,32 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *as_sdp,</div><div class='add'>+				    struct dp_sdp *sdp, size_t size)</div><div class='add'>+{</div><div class='add'>+	size_t length = sizeof(struct dp_sdp);</div><div class='add'>+</div><div class='add'>+	if (size &lt; length)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	memset(sdp, 0, size);</div><div class='add'>+</div><div class='add'>+	/* Prepare AS (Adaptive Sync) SDP Header */</div><div class='add'>+	sdp-&gt;sdp_header.HB0 = 0;</div><div class='add'>+	sdp-&gt;sdp_header.HB1 = as_sdp-&gt;sdp_type;</div><div class='add'>+	sdp-&gt;sdp_header.HB2 = 0x02;</div><div class='add'>+	sdp-&gt;sdp_header.HB3 = as_sdp-&gt;length;</div><div class='add'>+</div><div class='add'>+	/* Fill AS (Adaptive Sync) SDP Payload */</div><div class='add'>+	sdp-&gt;db[0] = as_sdp-&gt;mode;</div><div class='add'>+	sdp-&gt;db[1] = as_sdp-&gt;vtotal &amp; 0xFF;</div><div class='add'>+	sdp-&gt;db[2] = (as_sdp-&gt;vtotal &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+	sdp-&gt;db[3] = as_sdp-&gt;target_rr &amp; 0xFF;</div><div class='add'>+	sdp-&gt;db[4] = (as_sdp-&gt;target_rr &gt;&gt; 8) &amp; 0x3;</div><div class='add'>+</div><div class='add'>+	return length;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> intel_dp_hdr_metadata_infoframe_sdp_pack(struct drm_i915_private *i915,</div><div class='ctx'> 					 const struct hdmi_drm_infoframe *drm_infoframe,</div><div class='hunk'>@@ -4224,6 +4329,10 @@ static void intel_write_dp_sdp(struct intel_encoder *encoder,</div><div class='ctx'> 							       &amp;crtc_state-&gt;infoframes.drm.drm,</div><div class='ctx'> 							       &amp;sdp, sizeof(sdp));</div><div class='ctx'> 		break;</div><div class='add'>+	case DP_SDP_ADAPTIVE_SYNC:</div><div class='add'>+		len = intel_dp_as_sdp_pack(&amp;crtc_state-&gt;infoframes.as_sdp, &amp;sdp,</div><div class='add'>+					   sizeof(sdp));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		MISSING_CASE(type);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -4245,6 +4354,10 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,</div><div class='ctx'> 	u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |</div><div class='ctx'> 			 VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |</div><div class='ctx'> 			 VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;</div><div class='add'>+</div><div class='add'>+	if (HAS_AS_SDP(dev_priv))</div><div class='add'>+		dip_enable |= VIDEO_DIP_ENABLE_AS_ADL;</div><div class='add'>+</div><div class='ctx'> 	u32 val = intel_de_read(dev_priv, reg) &amp; ~dip_enable;</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: Sanitize DSC enabling wrt. intel_dsc_dp_pps_write(). */</div><div class='hunk'>@@ -4262,10 +4375,42 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);</div><div class='add'>+	intel_write_dp_sdp(encoder, crtc_state, DP_SDP_ADAPTIVE_SYNC);</div><div class='ctx'> </div><div class='ctx'> 	intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static</div><div class='add'>+int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,</div><div class='add'>+			   const void *buffer, size_t size)</div><div class='add'>+{</div><div class='add'>+	const struct dp_sdp *sdp = buffer;</div><div class='add'>+</div><div class='add'>+	if (size &lt; sizeof(struct dp_sdp))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memset(as_sdp, 0, sizeof(*as_sdp));</div><div class='add'>+</div><div class='add'>+	if (sdp-&gt;sdp_header.HB0 != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sdp-&gt;sdp_header.HB1 != DP_SDP_ADAPTIVE_SYNC)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sdp-&gt;sdp_header.HB2 != 0x02)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if ((sdp-&gt;sdp_header.HB3 &amp; 0x3F) != 9)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	as_sdp-&gt;length = sdp-&gt;sdp_header.HB3 &amp; DP_ADAPTIVE_SYNC_SDP_LENGTH;</div><div class='add'>+	as_sdp-&gt;mode = sdp-&gt;db[0] &amp; DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE;</div><div class='add'>+	as_sdp-&gt;vtotal = (sdp-&gt;db[2] &lt;&lt; 8) | sdp-&gt;db[1];</div><div class='add'>+	as_sdp-&gt;target_rr = (u64)sdp-&gt;db[3] | ((u64)sdp-&gt;db[4] &amp; 0x3);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,</div><div class='ctx'> 				   const void *buffer, size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -4336,6 +4481,29 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+intel_read_dp_as_sdp(struct intel_encoder *encoder,</div><div class='add'>+		     struct intel_crtc_state *crtc_state,</div><div class='add'>+		     struct drm_dp_as_sdp *as_sdp)</div><div class='add'>+{</div><div class='add'>+	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	unsigned int type = DP_SDP_ADAPTIVE_SYNC;</div><div class='add'>+	struct dp_sdp sdp = {};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if ((crtc_state-&gt;infoframes.enable &amp;</div><div class='add'>+	     intel_hdmi_infoframe_enable(type)) == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dig_port-&gt;read_infoframe(encoder, crtc_state, type, &amp;sdp,</div><div class='add'>+				 sizeof(sdp));</div><div class='add'>+</div><div class='add'>+	ret = intel_dp_as_sdp_unpack(as_sdp, &amp;sdp, sizeof(sdp));</div><div class='add'>+	if (ret)</div><div class='add'>+		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Failed to unpack DP AS SDP\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> intel_dp_hdr_metadata_infoframe_sdp_unpack(struct hdmi_drm_infoframe *drm_infoframe,</div><div class='ctx'> 					   const void *buffer, size_t size)</div><div class='hunk'>@@ -4442,6 +4610,10 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,</div><div class='ctx'> 		intel_read_dp_hdr_metadata_infoframe_sdp(encoder, crtc_state,</div><div class='ctx'> 							 &amp;crtc_state-&gt;infoframes.drm.drm);</div><div class='ctx'> 		break;</div><div class='add'>+	case DP_SDP_ADAPTIVE_SYNC:</div><div class='add'>+		intel_read_dp_as_sdp(encoder, crtc_state,</div><div class='add'>+				     &amp;crtc_state-&gt;infoframes.as_sdp);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		MISSING_CASE(type);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5369,6 +5541,8 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)</div><div class='ctx'> 	if (!intel_dp_get_dpcd(intel_dp))</div><div class='ctx'> 		return connector_status_disconnected;</div><div class='ctx'> </div><div class='add'>+	intel_dp-&gt;mst_detect = intel_dp_mst_detect(intel_dp);</div><div class='add'>+</div><div class='ctx'> 	/* if there's no downstream port, we're done */</div><div class='ctx'> 	if (!drm_dp_is_branch(dpcd))</div><div class='ctx'> 		return connector_status_connected;</div><div class='hunk'>@@ -5380,7 +5554,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)</div><div class='ctx'> 		connector_status_connected : connector_status_disconnected;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_dp_can_mst(intel_dp))</div><div class='add'>+	if (intel_dp-&gt;mst_detect == DRM_DP_MST)</div><div class='ctx'> 		return connector_status_connected;</div><div class='ctx'> </div><div class='ctx'> 	/* If no HPD, poke DDC gently */</div><div class='hunk'>@@ -5685,15 +5859,7 @@ intel_dp_detect(struct drm_connector *connector,</div><div class='ctx'> 		memset(intel_connector-&gt;dp.dsc_dpcd, 0, sizeof(intel_connector-&gt;dp.dsc_dpcd));</div><div class='ctx'> 		intel_dp-&gt;psr.sink_panel_replay_support = false;</div><div class='ctx'> </div><div class='del'>-		if (intel_dp-&gt;is_mst) {</div><div class='del'>-			drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='del'>-				    "MST device may have disappeared %d vs %d\n",</div><div class='del'>-				    intel_dp-&gt;is_mst,</div><div class='del'>-				    intel_dp-&gt;mst_mgr.mst_state);</div><div class='del'>-			intel_dp-&gt;is_mst = false;</div><div class='del'>-			drm_dp_mst_topology_mgr_set_mst(&amp;intel_dp-&gt;mst_mgr,</div><div class='del'>-							intel_dp-&gt;is_mst);</div><div class='del'>-		}</div><div class='add'>+		intel_dp_mst_disconnect(intel_dp);</div><div class='ctx'> </div><div class='ctx'> 		intel_dp_tunnel_disconnect(intel_dp);</div><div class='ctx'> </div><div class='hunk'>@@ -5712,7 +5878,7 @@ intel_dp_detect(struct drm_connector *connector,</div><div class='ctx'> </div><div class='ctx'> 	intel_dp_detect_dsc_caps(intel_dp, intel_connector);</div><div class='ctx'> </div><div class='del'>-	intel_dp_configure_mst(intel_dp);</div><div class='add'>+	intel_dp_mst_configure(intel_dp);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TODO: Reset link params when switching to MST mode, until MST</div><div class='hunk'>@@ -6495,7 +6661,6 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,</div><div class='ctx'> 	struct drm_device *dev = intel_encoder-&gt;base.dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='ctx'> 	enum port port = intel_encoder-&gt;port;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the work for modeset in case of link train failure */</div><div class='hunk'>@@ -6520,7 +6685,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,</div><div class='ctx'> 		 * Currently we don't support eDP on TypeC ports, although in</div><div class='ctx'> 		 * theory it could work on TypeC legacy ports.</div><div class='ctx'> 		 */</div><div class='del'>-		drm_WARN_ON(dev, intel_phy_is_tc(dev_priv, phy));</div><div class='add'>+		drm_WARN_ON(dev, intel_encoder_is_tc(intel_encoder));</div><div class='ctx'> 		type = DRM_MODE_CONNECTOR_eDP;</div><div class='ctx'> 		intel_encoder-&gt;type = INTEL_OUTPUT_EDP;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h<br/>index c540d3a73fe7..106ecfde36d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp.h</a></div><div class='hunk'>@@ -88,6 +88,7 @@ void intel_dp_audio_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> 				   struct drm_connector_state *conn_state);</div><div class='ctx'> bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);</div><div class='ctx'> bool intel_dp_is_edp(struct intel_dp *intel_dp);</div><div class='add'>+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp);</div><div class='ctx'> bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);</div><div class='ctx'> int intel_dp_link_symbol_size(int rate);</div><div class='ctx'> int intel_dp_link_symbol_clock(int rate);</div><div class='hunk'>@@ -119,7 +120,8 @@ int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,</div><div class='ctx'> 				 int bw_overhead);</div><div class='ctx'> int intel_dp_max_link_data_rate(struct intel_dp *intel_dp,</div><div class='ctx'> 				int max_dprx_rate, int max_dprx_lanes);</div><div class='del'>-bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);</div><div class='add'>+bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner);</div><div class='add'>+bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp);</div><div class='ctx'> bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			    const struct drm_connector_state *conn_state);</div><div class='ctx'> void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,</div><div class='hunk'>@@ -149,6 +151,7 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,</div><div class='ctx'> 				int mode_clock, int mode_hdisplay,</div><div class='ctx'> 				bool bigjoiner);</div><div class='ctx'> bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,</div><div class='add'>+			     struct intel_connector *connector,</div><div class='ctx'> 			     int hdisplay, int clock);</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int intel_dp_unused_lane_mask(int lane_count)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c<br/>index 4f4a0e3b3114..b8a53bb174da 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_aux.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_aux.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_aux.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp_aux.c</a></div><div class='hunk'>@@ -61,9 +61,8 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)</div><div class='ctx'> 	u32 status;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = __intel_de_wait_for_register(i915, ch_ctl,</div><div class='del'>-					   DP_AUX_CH_CTL_SEND_BUSY, 0,</div><div class='del'>-					   2, timeout_ms, &amp;status);</div><div class='add'>+	ret = intel_de_wait_custom(i915, ch_ctl, DP_AUX_CH_CTL_SEND_BUSY, 0,</div><div class='add'>+				   2, timeout_ms, &amp;status);</div><div class='ctx'> </div><div class='ctx'> 	if (ret == -ETIMEDOUT)</div><div class='ctx'> 		drm_err(&amp;i915-&gt;drm,</div><div class='hunk'>@@ -143,9 +142,15 @@ static int intel_dp_aux_sync_len(void)</div><div class='ctx'> 	return precharge + preamble;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int intel_dp_aux_fw_sync_len(void)</div><div class='add'>+int intel_dp_aux_fw_sync_len(void)</div><div class='ctx'> {</div><div class='del'>-	int precharge = 10; /* 10-16 */</div><div class='add'>+	/*</div><div class='add'>+	 * We faced some glitches on Dell Precision 5490 MTL laptop with panel:</div><div class='add'>+	 * "Manufacturer: AUO, Model: 63898" when using HW default 18. Using 20</div><div class='add'>+	 * is fixing these problems with the panel. It is still within range</div><div class='add'>+	 * mentioned in eDP specification.</div><div class='add'>+	 */</div><div class='add'>+	int precharge = 12; /* 10-16 */</div><div class='ctx'> 	int preamble = 8;</div><div class='ctx'> </div><div class='ctx'> 	return precharge + preamble;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.h b/drivers/gpu/drm/i915/display/intel_dp_aux.h<br/>index 8447f3e601fe..76d1f2ed7c2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_aux.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_aux.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_aux.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp_aux.h</a></div><div class='hunk'>@@ -20,5 +20,6 @@ enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder);</div><div class='ctx'> </div><div class='ctx'> void intel_dp_aux_irq_handler(struct drm_i915_private *i915);</div><div class='ctx'> u32 intel_dp_aux_pack(const u8 *src, int src_bytes);</div><div class='add'>+int intel_dp_aux_fw_sync_len(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_DP_AUX_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c<br/>index 9db43bd81ce2..92b03073acdd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_hdcp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_hdcp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_hdcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp_hdcp.c</a></div><div class='hunk'>@@ -769,11 +769,9 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for encryption confirmation */</div><div class='del'>-	if (intel_de_wait_for_register(i915,</div><div class='del'>-				       HDCP_STATUS(i915, cpu_transcoder, port),</div><div class='del'>-				       stream_enc_status,</div><div class='del'>-				       enable ? stream_enc_status : 0,</div><div class='del'>-				       HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {</div><div class='add'>+	if (intel_de_wait(i915, HDCP_STATUS(i915, cpu_transcoder, port),</div><div class='add'>+			  stream_enc_status, enable ? stream_enc_status : 0,</div><div class='add'>+			  HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {</div><div class='ctx'> 		drm_err(&amp;i915-&gt;drm, "Timed out waiting for transcoder: %s stream encryption %s\n",</div><div class='ctx'> 			transcoder_name(cpu_transcoder), enable ? "enabled" : "disabled");</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='hunk'>@@ -804,11 +802,10 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for encryption confirmation */</div><div class='del'>-	if (intel_de_wait_for_register(i915,</div><div class='del'>-				       HDCP2_STREAM_STATUS(i915, cpu_transcoder, pipe),</div><div class='del'>-				       STREAM_ENCRYPTION_STATUS,</div><div class='del'>-				       enable ? STREAM_ENCRYPTION_STATUS : 0,</div><div class='del'>-				       HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {</div><div class='add'>+	if (intel_de_wait(i915, HDCP2_STREAM_STATUS(i915, cpu_transcoder, pipe),</div><div class='add'>+			  STREAM_ENCRYPTION_STATUS,</div><div class='add'>+			  enable ? STREAM_ENCRYPTION_STATUS : 0,</div><div class='add'>+			  HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {</div><div class='ctx'> 		drm_err(&amp;i915-&gt;drm, "Timed out waiting for transcoder: %s stream encryption %s\n",</div><div class='ctx'> 			transcoder_name(cpu_transcoder), enable ? "enabled" : "disabled");</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c<br/>index fb84ca98bb7a..947575140059 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_link_training.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_link_training.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_link_training.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp_link_training.c</a></div><div class='hunk'>@@ -334,7 +334,7 @@ static bool has_per_lane_signal_levels(struct intel_dp *intel_dp,</div><div class='ctx'> 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='ctx'> </div><div class='ctx'> 	return !intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy) ||</div><div class='del'>-		DISPLAY_VER(i915) &gt;= 11;</div><div class='add'>+		DISPLAY_VER(i915) &gt;= 10 || IS_BROXTON(i915);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* 128b/132b */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c<br/>index b651c990af85..c772ba19c547 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_mst.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_mst.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_mst.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp_mst.c</a></div><div class='hunk'>@@ -51,25 +51,39 @@</div><div class='ctx'> #include "intel_vdsc.h"</div><div class='ctx'> #include "skl_scaler.h"</div><div class='ctx'> </div><div class='del'>-static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,</div><div class='del'>-					  const struct drm_display_mode *adjusted_mode,</div><div class='del'>-					  struct intel_crtc_state *crtc_state,</div><div class='del'>-					  bool dsc)</div><div class='add'>+static int intel_dp_mst_max_dpt_bpp(const struct intel_crtc_state *crtc_state,</div><div class='add'>+				    bool dsc)</div><div class='ctx'> {</div><div class='del'>-	if (intel_dp_is_uhbr(crtc_state) &amp;&amp; DISPLAY_VER(i915) &lt; 14 &amp;&amp; dsc) {</div><div class='del'>-		int output_bpp = bpp;</div><div class='del'>-		/* DisplayPort 2 128b/132b, bits per lane is always 32 */</div><div class='del'>-		int symbol_clock = crtc_state-&gt;port_clock / 32;</div><div class='del'>-</div><div class='del'>-		if (output_bpp * adjusted_mode-&gt;crtc_clock &gt;=</div><div class='del'>-		    symbol_clock * 72) {</div><div class='del'>-			drm_dbg_kms(&amp;i915-&gt;drm, "UHBR check failed(required bw %d available %d)\n",</div><div class='del'>-				    output_bpp * adjusted_mode-&gt;crtc_clock, symbol_clock * 72);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+	const struct drm_display_mode *adjusted_mode =</div><div class='add'>+		&amp;crtc_state-&gt;hw.adjusted_mode;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(i915) &gt;= 20 || !dsc)</div><div class='add'>+		return INT_MAX;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DSC-&gt;DPT interface width:</div><div class='add'>+	 *   ICL-MTL: 72 bits (each branch has 72 bits, only left branch is used)</div><div class='add'>+	 *   LNL+:    144 bits (not a bottleneck in any config)</div><div class='add'>+	 *</div><div class='add'>+	 * Bspec/49259 suggests that the FEC overhead needs to be</div><div class='add'>+	 * applied here, though HW people claim that neither this FEC</div><div class='add'>+	 * or any other overhead is applicable here (that is the actual</div><div class='add'>+	 * available_bw is just symbol_clock * 72). However based on</div><div class='add'>+	 * testing on MTL-P the</div><div class='add'>+	 * - DELL U3224KBA display</div><div class='add'>+	 * - Unigraf UCD-500 CTS test sink</div><div class='add'>+	 * devices the</div><div class='add'>+	 * - 5120x2880/995.59Mhz</div><div class='add'>+	 * - 6016x3384/1357.23Mhz</div><div class='add'>+	 * - 6144x3456/1413.39Mhz</div><div class='add'>+	 * modes (all the ones having a DPT limit on the above devices),</div><div class='add'>+	 * both the channel coding efficiency and an additional 3%</div><div class='add'>+	 * overhead needs to be accounted for.</div><div class='add'>+	 */</div><div class='add'>+	return div64_u64(mul_u32_u32(intel_dp_link_symbol_clock(crtc_state-&gt;port_clock) * 72,</div><div class='add'>+				     drm_dp_bw_channel_coding_efficiency(true)),</div><div class='add'>+			 mul_u32_u32(adjusted_mode-&gt;crtc_clock, 1030000));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state,</div><div class='hunk'>@@ -88,11 +102,10 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> 	if (dsc) {</div><div class='ctx'> 		flags |= DRM_DP_BW_OVERHEAD_DSC;</div><div class='del'>-		/* TODO: add support for bigjoiner */</div><div class='ctx'> 		dsc_slice_count = intel_dp_dsc_get_slice_count(connector,</div><div class='ctx'> 							       adjusted_mode-&gt;clock,</div><div class='ctx'> 							       adjusted_mode-&gt;hdisplay,</div><div class='del'>-							       false);</div><div class='add'>+							       crtc_state-&gt;bigjoiner_pipes);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	overhead = drm_dp_bw_overhead(crtc_state-&gt;lane_count,</div><div class='hunk'>@@ -158,6 +171,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,</div><div class='ctx'> 	const struct drm_display_mode *adjusted_mode =</div><div class='ctx'> 		&amp;crtc_state-&gt;hw.adjusted_mode;</div><div class='ctx'> 	int bpp, slots = -EINVAL;</div><div class='add'>+	int max_dpt_bpp;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	mst_state = drm_atomic_get_mst_topology_state(state, &amp;intel_dp-&gt;mst_mgr);</div><div class='hunk'>@@ -178,6 +192,13 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,</div><div class='ctx'> 						      crtc_state-&gt;port_clock,</div><div class='ctx'> 						      crtc_state-&gt;lane_count);</div><div class='ctx'> </div><div class='add'>+	max_dpt_bpp = intel_dp_mst_max_dpt_bpp(crtc_state, dsc);</div><div class='add'>+	if (max_bpp &gt; max_dpt_bpp) {</div><div class='add'>+		drm_dbg_kms(&amp;i915-&gt;drm, "Limiting bpp to max DPT bpp (%d -&gt; %d)\n",</div><div class='add'>+			    max_bpp, max_dpt_bpp);</div><div class='add'>+		max_bpp = max_dpt_bpp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm, "Looking for slots in range min bpp %d max bpp %d\n",</div><div class='ctx'> 		    min_bpp, max_bpp);</div><div class='ctx'> </div><div class='hunk'>@@ -189,10 +210,6 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm, "Trying bpp %d\n", bpp);</div><div class='ctx'> </div><div class='del'>-		ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state, dsc);</div><div class='del'>-		if (ret)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		link_bpp_x16 = to_bpp_x16(dsc ? bpp :</div><div class='ctx'> 					  intel_dp_output_bpp(crtc_state-&gt;output_format, bpp));</div><div class='ctx'> </div><div class='hunk'>@@ -404,15 +421,22 @@ static int mode_hblank_period_ns(const struct drm_display_mode *mode)</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='ctx'> hblank_expansion_quirk_needs_dsc(const struct intel_connector *connector,</div><div class='del'>-				 const struct intel_crtc_state *crtc_state)</div><div class='add'>+				 const struct intel_crtc_state *crtc_state,</div><div class='add'>+				 const struct link_config_limits *limits)</div><div class='ctx'> {</div><div class='ctx'> 	const struct drm_display_mode *adjusted_mode =</div><div class='ctx'> 		&amp;crtc_state-&gt;hw.adjusted_mode;</div><div class='add'>+	bool is_uhbr_sink = connector-&gt;mst_port &amp;&amp;</div><div class='add'>+			    drm_dp_128b132b_supported(connector-&gt;mst_port-&gt;dpcd);</div><div class='add'>+	int hblank_limit = is_uhbr_sink ? 500 : 300;</div><div class='ctx'> </div><div class='ctx'> 	if (!connector-&gt;dp.dsc_hblank_expansion_quirk)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (mode_hblank_period_ns(adjusted_mode) &gt; 300)</div><div class='add'>+	if (is_uhbr_sink &amp;&amp; !drm_dp_is_uhbr_rate(limits-&gt;max_rate))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (mode_hblank_period_ns(adjusted_mode) &gt; hblank_limit)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -428,7 +452,7 @@ adjust_limits_for_dsc_hblank_expansion_quirk(const struct intel_connector *conne</div><div class='ctx'> 	const struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	int min_bpp_x16 = limits-&gt;link.min_bpp_x16;</div><div class='ctx'> </div><div class='del'>-	if (!hblank_expansion_quirk_needs_dsc(connector, crtc_state))</div><div class='add'>+	if (!hblank_expansion_quirk_needs_dsc(connector, crtc_state, limits))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	if (!dsc) {</div><div class='hunk'>@@ -525,14 +549,15 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_atomic_state *state = to_intel_atomic_state(conn_state-&gt;state);</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(pipe_config-&gt;uapi.crtc);</div><div class='ctx'> 	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);</div><div class='ctx'> 	struct intel_dp *intel_dp = &amp;intel_mst-&gt;primary-&gt;dp;</div><div class='del'>-	const struct intel_connector *connector =</div><div class='add'>+	struct intel_connector *connector =</div><div class='ctx'> 		to_intel_connector(conn_state-&gt;connector);</div><div class='ctx'> 	const struct drm_display_mode *adjusted_mode =</div><div class='ctx'> 		&amp;pipe_config-&gt;hw.adjusted_mode;</div><div class='ctx'> 	struct link_config_limits limits;</div><div class='del'>-	bool dsc_needed;</div><div class='add'>+	bool dsc_needed, joiner_needs_dsc;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_config-&gt;fec_enable &amp;&amp;</div><div class='hunk'>@@ -542,11 +567,18 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> 	if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (intel_dp_need_bigjoiner(intel_dp, connector,</div><div class='add'>+				    adjusted_mode-&gt;crtc_hdisplay,</div><div class='add'>+				    adjusted_mode-&gt;crtc_clock))</div><div class='add'>+		pipe_config-&gt;bigjoiner_pipes = GENMASK(crtc-&gt;pipe + 1, crtc-&gt;pipe);</div><div class='add'>+</div><div class='ctx'> 	pipe_config-&gt;sink_format = INTEL_OUTPUT_FORMAT_RGB;</div><div class='ctx'> 	pipe_config-&gt;output_format = INTEL_OUTPUT_FORMAT_RGB;</div><div class='ctx'> 	pipe_config-&gt;has_pch_encoder = false;</div><div class='ctx'> </div><div class='del'>-	dsc_needed = intel_dp-&gt;force_dsc_en ||</div><div class='add'>+	joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, pipe_config-&gt;bigjoiner_pipes);</div><div class='add'>+</div><div class='add'>+	dsc_needed = joiner_needs_dsc || intel_dp-&gt;force_dsc_en ||</div><div class='ctx'> 		     !intel_dp_mst_compute_config_limits(intel_dp,</div><div class='ctx'> 							 connector,</div><div class='ctx'> 							 pipe_config,</div><div class='hunk'>@@ -566,8 +598,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	/* enable compression if the mode doesn't fit available BW */</div><div class='ctx'> 	if (dsc_needed) {</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Try DSC (fallback=%s, force=%s)\n",</div><div class='del'>-			    str_yes_no(ret),</div><div class='add'>+		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Try DSC (fallback=%s, joiner=%s, force=%s)\n",</div><div class='add'>+			    str_yes_no(ret), str_yes_no(joiner_needs_dsc),</div><div class='ctx'> 			    str_yes_no(intel_dp-&gt;force_dsc_en));</div><div class='ctx'> </div><div class='ctx'> 		if (!intel_dp_mst_dsc_source_support(pipe_config))</div><div class='hunk'>@@ -613,7 +645,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='ctx'> 		pipe_config-&gt;lane_lat_optim_mask =</div><div class='del'>-			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config-&gt;lane_count);</div><div class='add'>+			bxt_dpio_phy_calc_lane_lat_optim_mask(pipe_config-&gt;lane_count);</div><div class='ctx'> </div><div class='ctx'> 	intel_dp_audio_compute_config(encoder, pipe_config, conn_state);</div><div class='ctx'> </div><div class='hunk'>@@ -954,6 +986,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 	struct drm_dp_mst_atomic_payload *new_payload =</div><div class='ctx'> 		drm_atomic_get_mst_payload_state(new_mst_state, connector-&gt;port);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(connector-&gt;base.dev);</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> 	bool last_mst_stream;</div><div class='ctx'> </div><div class='ctx'> 	intel_dp-&gt;active_mst_links--;</div><div class='hunk'>@@ -962,7 +995,13 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 		    DISPLAY_VER(dev_priv) &gt;= 12 &amp;&amp; last_mst_stream &amp;&amp;</div><div class='ctx'> 		    !intel_dp_mst_is_master_trans(old_crtc_state));</div><div class='ctx'> </div><div class='del'>-	intel_crtc_vblank_off(old_crtc_state);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *old_pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_old_crtc_state(state, pipe_crtc);</div><div class='add'>+</div><div class='add'>+		intel_crtc_vblank_off(old_pipe_crtc_state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	intel_disable_transcoder(old_crtc_state);</div><div class='ctx'> </div><div class='hunk'>@@ -980,12 +1019,18 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 	intel_ddi_disable_transcoder_func(old_crtc_state);</div><div class='ctx'> </div><div class='del'>-	intel_dsc_disable(old_crtc_state);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+					 intel_crtc_joined_pipe_mask(old_crtc_state)) {</div><div class='add'>+		const struct intel_crtc_state *old_pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_old_crtc_state(state, pipe_crtc);</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 9)</div><div class='del'>-		skl_scaler_disable(old_crtc_state);</div><div class='del'>-	else</div><div class='del'>-		ilk_pfit_disable(old_crtc_state);</div><div class='add'>+		intel_dsc_disable(old_pipe_crtc_state);</div><div class='add'>+</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &gt;= 9)</div><div class='add'>+			skl_scaler_disable(old_pipe_crtc_state);</div><div class='add'>+		else</div><div class='add'>+			ilk_pfit_disable(old_pipe_crtc_state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Power down mst path before disabling the port, otherwise we end</div><div class='hunk'>@@ -1117,6 +1162,39 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 	intel_ddi_set_dp_msa(pipe_config, conn_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void enable_bs_jitter_was(const struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+	u32 clear = 0;</div><div class='add'>+	u32 set = 0;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALDERLAKE_P(i915))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!IS_DISPLAY_STEP(i915, STEP_D0, STEP_FOREVER))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Wa_14013163432:adlp */</div><div class='add'>+	if (crtc_state-&gt;fec_enable || intel_dp_is_uhbr(crtc_state))</div><div class='add'>+		set |= DP_MST_FEC_BS_JITTER_WA(crtc_state-&gt;cpu_transcoder);</div><div class='add'>+</div><div class='add'>+	/* Wa_14014143976:adlp */</div><div class='add'>+	if (IS_DISPLAY_STEP(i915, STEP_E0, STEP_FOREVER)) {</div><div class='add'>+		if (intel_dp_is_uhbr(crtc_state))</div><div class='add'>+			set |= DP_MST_SHORT_HBLANK_WA(crtc_state-&gt;cpu_transcoder);</div><div class='add'>+		else if (crtc_state-&gt;fec_enable)</div><div class='add'>+			clear |= DP_MST_SHORT_HBLANK_WA(crtc_state-&gt;cpu_transcoder);</div><div class='add'>+</div><div class='add'>+		if (crtc_state-&gt;fec_enable || intel_dp_is_uhbr(crtc_state))</div><div class='add'>+			set |= DP_MST_DPT_DPTP_ALIGN_WA(crtc_state-&gt;cpu_transcoder);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!clear &amp;&amp; !set)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	intel_de_rmw(i915, CHICKEN_MISC_3, clear, set);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_mst_enable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 				struct intel_encoder *encoder,</div><div class='ctx'> 				const struct intel_crtc_state *pipe_config,</div><div class='hunk'>@@ -1131,6 +1209,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 		drm_atomic_get_new_mst_topology_state(&amp;state-&gt;base, &amp;intel_dp-&gt;mst_mgr);</div><div class='ctx'> 	enum transcoder trans = pipe_config-&gt;cpu_transcoder;</div><div class='ctx'> 	bool first_mst_stream = intel_dp-&gt;active_mst_links == 1;</div><div class='add'>+	struct intel_crtc *pipe_crtc;</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, pipe_config-&gt;has_pch_encoder);</div><div class='ctx'> </div><div class='hunk'>@@ -1145,6 +1224,8 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,</div><div class='ctx'> 			       TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz &amp; 0xffffff));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	enable_bs_jitter_was(pipe_config);</div><div class='add'>+</div><div class='ctx'> 	intel_ddi_enable_transcoder_func(encoder, pipe_config);</div><div class='ctx'> </div><div class='ctx'> 	clear_act_sent(encoder, pipe_config);</div><div class='hunk'>@@ -1172,7 +1253,13 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 	intel_enable_transcoder(pipe_config);</div><div class='ctx'> </div><div class='del'>-	intel_crtc_vblank_on(pipe_config);</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask_reverse(&amp;dev_priv-&gt;drm, pipe_crtc,</div><div class='add'>+						 intel_crtc_joined_pipe_mask(pipe_config)) {</div><div class='add'>+		const struct intel_crtc_state *pipe_crtc_state =</div><div class='add'>+			intel_atomic_get_new_crtc_state(state, pipe_crtc);</div><div class='add'>+</div><div class='add'>+		intel_crtc_vblank_on(pipe_crtc_state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	intel_hdcp_enable(state, encoder, pipe_config, conn_state);</div><div class='ctx'> }</div><div class='hunk'>@@ -1285,7 +1372,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,</div><div class='ctx'> 	struct drm_dp_mst_topology_mgr *mgr = &amp;intel_dp-&gt;mst_mgr;</div><div class='ctx'> 	struct drm_dp_mst_port *port = intel_connector-&gt;port;</div><div class='ctx'> 	const int min_bpp = 18;</div><div class='del'>-	int max_dotclk = to_i915(connector-&gt;dev)-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = to_i915(connector-&gt;dev)-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	int max_rate, mode_rate, max_lanes, max_link_clock;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool dsc = false, bigjoiner = false;</div><div class='hunk'>@@ -1302,8 +1389,13 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,</div><div class='ctx'> 	if (*status != MODE_OK)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN) {</div><div class='del'>-		*status = MODE_NO_DBLESCAN;</div><div class='add'>+	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLCLK) {</div><div class='add'>+		*status = MODE_H_ILLEGAL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode-&gt;clock &lt; 10000) {</div><div class='add'>+		*status = MODE_CLOCK_LOW;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1314,10 +1406,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,</div><div class='ctx'> 					       max_link_clock, max_lanes);</div><div class='ctx'> 	mode_rate = intel_dp_link_required(mode-&gt;clock, min_bpp);</div><div class='ctx'> </div><div class='del'>-	ret = drm_modeset_lock(&amp;mgr-&gt;base.lock, ctx);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TODO:</div><div class='ctx'> 	 * - Also check if compression would allow for the mode</div><div class='hunk'>@@ -1330,27 +1418,18 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,</div><div class='ctx'> 	 *   corresponding link capabilities of the sink) in case the</div><div class='ctx'> 	 *   stream is uncompressed for it by the last branch device.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mode_rate &gt; max_rate || mode-&gt;clock &gt; max_dotclk ||</div><div class='del'>-	    drm_dp_calc_pbn_mode(mode-&gt;clock, min_bpp &lt;&lt; 4) &gt; port-&gt;full_pbn) {</div><div class='del'>-		*status = MODE_CLOCK_HIGH;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mode-&gt;clock &lt; 10000) {</div><div class='del'>-		*status = MODE_CLOCK_LOW;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLCLK) {</div><div class='del'>-		*status = MODE_H_ILLEGAL;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (intel_dp_need_bigjoiner(intel_dp, mode-&gt;hdisplay, target_clock)) {</div><div class='add'>+	if (intel_dp_need_bigjoiner(intel_dp, intel_connector,</div><div class='add'>+				    mode-&gt;hdisplay, target_clock)) {</div><div class='ctx'> 		bigjoiner = true;</div><div class='ctx'> 		max_dotclk *= 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = drm_modeset_lock(&amp;mgr-&gt;base.lock, ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		/* TODO: add support for bigjoiner */</div><div class='add'>+	if (mode_rate &gt; max_rate || mode-&gt;clock &gt; max_dotclk ||</div><div class='add'>+	    drm_dp_calc_pbn_mode(mode-&gt;clock, min_bpp &lt;&lt; 4) &gt; port-&gt;full_pbn) {</div><div class='ctx'> 		*status = MODE_CLOCK_HIGH;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1383,11 +1462,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,</div><div class='ctx'> 		dsc = dsc_max_compressed_bpp &amp;&amp; dsc_slice_count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Big joiner configuration needs DSC for TGL which is not true for</div><div class='del'>-	 * XE_LPD where uncompressed joiner is supported.</div><div class='del'>-	 */</div><div class='del'>-	if (DISPLAY_VER(dev_priv) &lt; 13 &amp;&amp; bigjoiner &amp;&amp; !dsc) {</div><div class='add'>+	if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) &amp;&amp; !dsc) {</div><div class='ctx'> 		*status = MODE_CLOCK_HIGH;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1397,7 +1472,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*status = intel_mode_valid_max_plane_size(dev_priv, mode, false);</div><div class='add'>+	*status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1509,24 +1584,41 @@ intel_dp_mst_read_decompression_port_dsc_caps(struct intel_dp *intel_dp,</div><div class='ctx'> static bool detect_dsc_hblank_expansion_quirk(const struct intel_connector *connector)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(connector-&gt;base.dev);</div><div class='add'>+	struct drm_dp_aux *aux = connector-&gt;dp.dsc_decompression_aux;</div><div class='ctx'> 	struct drm_dp_desc desc;</div><div class='ctx'> 	u8 dpcd[DP_RECEIVER_CAP_SIZE];</div><div class='ctx'> </div><div class='del'>-	if (!connector-&gt;dp.dsc_decompression_aux)</div><div class='add'>+	if (!aux)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (drm_dp_read_desc(connector-&gt;dp.dsc_decompression_aux,</div><div class='del'>-			     &amp;desc, true) &lt; 0)</div><div class='add'>+	/*</div><div class='add'>+	 * A logical port's OUI (at least for affected sinks) is all 0, so</div><div class='add'>+	 * instead of that the parent port's OUI is used for identification.</div><div class='add'>+	 */</div><div class='add'>+	if (drm_dp_mst_port_is_logical(connector-&gt;port)) {</div><div class='add'>+		aux = drm_dp_mst_aux_for_parent(connector-&gt;port);</div><div class='add'>+		if (!aux)</div><div class='add'>+			aux = &amp;connector-&gt;mst_port-&gt;aux;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (drm_dp_read_dpcd_caps(aux, dpcd) &lt; 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!drm_dp_has_quirk(&amp;desc,</div><div class='del'>-			      DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC))</div><div class='add'>+	if (drm_dp_read_desc(aux, &amp;desc, drm_dp_is_branch(dpcd)) &lt; 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (drm_dp_read_dpcd_caps(connector-&gt;dp.dsc_decompression_aux, dpcd) &lt; 0)</div><div class='add'>+	if (!drm_dp_has_quirk(&amp;desc,</div><div class='add'>+			      DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!(dpcd[DP_RECEIVE_PORT_0_CAP_0] &amp; DP_HBLANK_EXPANSION_CAPABLE))</div><div class='add'>+	/*</div><div class='add'>+	 * UHBR (MST sink) devices requiring this quirk don't advertise the</div><div class='add'>+	 * HBLANK expansion support. Presuming that they perform HBLANK</div><div class='add'>+	 * expansion internally, or are affected by this issue on modes with a</div><div class='add'>+	 * short HBLANK for other reasons.</div><div class='add'>+	 */</div><div class='add'>+	if (!drm_dp_128b132b_supported(dpcd) &amp;&amp;</div><div class='add'>+	    !(dpcd[DP_RECEIVE_PORT_0_CAP_0] &amp; DP_HBLANK_EXPANSION_CAPABLE))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c<br/>index 75d76f91ecbd..6503abdc2b98 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_tunnel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dp_tunnel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dp_tunnel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dp_tunnel.c</a></div><div class='hunk'>@@ -348,7 +348,7 @@ void intel_dp_tunnel_resume(struct intel_dp *intel_dp,</div><div class='ctx'> </div><div class='ctx'> out_err:</div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "[DPTUN %s][CONNECTOR:%d:%s][ENCODER:%d:%s] Tunnel can't be resumed, will drop and redect it (err %pe)\n",</div><div class='add'>+		    "[DPTUN %s][CONNECTOR:%d:%s][ENCODER:%d:%s] Tunnel can't be resumed, will drop and reject it (err %pe)\n",</div><div class='ctx'> 		    drm_dp_tunnel_name(intel_dp-&gt;tunnel),</div><div class='ctx'> 		    connector-&gt;base.base.id, connector-&gt;base.name,</div><div class='ctx'> 		    encoder-&gt;base.base.id, encoder-&gt;base.name,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c<br/>index 4ca910874a4f..d20e4e9cf7f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpio_phy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpio_phy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpio_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dpio_phy.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'>  * DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "bxt_dpio_phy_regs.h"</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> #include "intel_ddi.h"</div><div class='ctx'> #include "intel_ddi_buf_trans.h"</div><div class='hunk'>@@ -29,6 +30,7 @@</div><div class='ctx'> #include "intel_display_types.h"</div><div class='ctx'> #include "intel_dp.h"</div><div class='ctx'> #include "intel_dpio_phy.h"</div><div class='add'>+#include "vlv_dpio_phy_regs.h"</div><div class='ctx'> #include "vlv_sideband.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -123,9 +125,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct bxt_ddi_phy_info - Hold info for a broxton DDI phy</div><div class='add'>+ * struct bxt_dpio_phy_info - Hold info for a broxton DDI phy</div><div class='ctx'>  */</div><div class='del'>-struct bxt_ddi_phy_info {</div><div class='add'>+struct bxt_dpio_phy_info {</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * @dual_channel: true if this phy has a second channel.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -161,7 +163,7 @@ struct bxt_ddi_phy_info {</div><div class='ctx'> 	} channel[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct bxt_ddi_phy_info bxt_ddi_phy_info[] = {</div><div class='add'>+static const struct bxt_dpio_phy_info bxt_dpio_phy_info[] = {</div><div class='ctx'> 	[DPIO_PHY0] = {</div><div class='ctx'> 		.dual_channel = true,</div><div class='ctx'> 		.rcomp_phy = DPIO_PHY1,</div><div class='hunk'>@@ -183,7 +185,7 @@ static const struct bxt_ddi_phy_info bxt_ddi_phy_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct bxt_ddi_phy_info glk_ddi_phy_info[] = {</div><div class='add'>+static const struct bxt_dpio_phy_info glk_dpio_phy_info[] = {</div><div class='ctx'> 	[DPIO_PHY0] = {</div><div class='ctx'> 		.dual_channel = false,</div><div class='ctx'> 		.rcomp_phy = DPIO_PHY1,</div><div class='hunk'>@@ -216,23 +218,23 @@ static const struct bxt_ddi_phy_info glk_ddi_phy_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct bxt_ddi_phy_info *</div><div class='add'>+static const struct bxt_dpio_phy_info *</div><div class='ctx'> bxt_get_phy_list(struct drm_i915_private *dev_priv, int *count)</div><div class='ctx'> {</div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv)) {</div><div class='del'>-		*count =  ARRAY_SIZE(glk_ddi_phy_info);</div><div class='del'>-		return glk_ddi_phy_info;</div><div class='add'>+		*count =  ARRAY_SIZE(glk_dpio_phy_info);</div><div class='add'>+		return glk_dpio_phy_info;</div><div class='ctx'> 	} else {</div><div class='del'>-		*count =  ARRAY_SIZE(bxt_ddi_phy_info);</div><div class='del'>-		return bxt_ddi_phy_info;</div><div class='add'>+		*count =  ARRAY_SIZE(bxt_dpio_phy_info);</div><div class='add'>+		return bxt_dpio_phy_info;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct bxt_ddi_phy_info *</div><div class='add'>+static const struct bxt_dpio_phy_info *</div><div class='ctx'> bxt_get_phy_info(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	int count;</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_list =</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_list =</div><div class='ctx'> 		bxt_get_phy_list(dev_priv, &amp;count);</div><div class='ctx'> </div><div class='ctx'> 	return &amp;phy_list[phy];</div><div class='hunk'>@@ -241,7 +243,7 @@ bxt_get_phy_info(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port,</div><div class='ctx'> 			     enum dpio_phy *phy, enum dpio_channel *ch)</div><div class='ctx'> {</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_info, *phys;</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_info, *phys;</div><div class='ctx'> 	int i, count;</div><div class='ctx'> </div><div class='ctx'> 	phys = bxt_get_phy_list(dev_priv, &amp;count);</div><div class='hunk'>@@ -269,16 +271,32 @@ void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port,</div><div class='ctx'> 	*ch = DPIO_CH0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bxt_ddi_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='del'>-				   const struct intel_crtc_state *crtc_state)</div><div class='add'>+/*</div><div class='add'>+ * Like intel_de_rmw() but reads from a single per-lane register and</div><div class='add'>+ * writes to the group register to write the same value to all the lanes.</div><div class='add'>+ */</div><div class='add'>+static u32 bxt_dpio_phy_rmw_grp(struct drm_i915_private *i915,</div><div class='add'>+				i915_reg_t reg_single,</div><div class='add'>+				i915_reg_t reg_group,</div><div class='add'>+				u32 clear, u32 set)</div><div class='add'>+{</div><div class='add'>+	u32 old, val;</div><div class='add'>+</div><div class='add'>+	old = intel_de_read(i915, reg_single);</div><div class='add'>+	val = (old &amp; ~clear) | set;</div><div class='add'>+	intel_de_write(i915, reg_group, val);</div><div class='add'>+</div><div class='add'>+	return old;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bxt_dpio_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='add'>+				    const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	int level = intel_ddi_level(encoder, crtc_state, 0);</div><div class='ctx'> 	const struct intel_ddi_buf_trans *trans;</div><div class='ctx'> 	enum dpio_channel ch;</div><div class='ctx'> 	enum dpio_phy phy;</div><div class='del'>-	int n_entries;</div><div class='del'>-	u32 val;</div><div class='add'>+	int lane, n_entries;</div><div class='ctx'> </div><div class='ctx'> 	trans = encoder-&gt;get_buf_trans(encoder, crtc_state, &amp;n_entries);</div><div class='ctx'> 	if (drm_WARN_ON_ONCE(&amp;dev_priv-&gt;drm, !trans))</div><div class='hunk'>@@ -290,41 +308,51 @@ void bxt_ddi_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> 	 * While we write to the group register to program all lanes at once we</div><div class='ctx'> 	 * can read only lane registers and we pick lanes 0/1 for that.</div><div class='ctx'> 	 */</div><div class='del'>-	val = intel_de_read(dev_priv, BXT_PORT_PCS_DW10_LN01(phy, ch));</div><div class='del'>-	val &amp;= ~(TX2_SWING_CALC_INIT | TX1_SWING_CALC_INIT);</div><div class='del'>-	intel_de_write(dev_priv, BXT_PORT_PCS_DW10_GRP(phy, ch), val);</div><div class='del'>-</div><div class='del'>-	val = intel_de_read(dev_priv, BXT_PORT_TX_DW2_LN0(phy, ch));</div><div class='del'>-	val &amp;= ~(MARGIN_000 | UNIQ_TRANS_SCALE);</div><div class='del'>-	val |= trans-&gt;entries[level].bxt.margin &lt;&lt; MARGIN_000_SHIFT |</div><div class='del'>-		trans-&gt;entries[level].bxt.scale &lt;&lt; UNIQ_TRANS_SCALE_SHIFT;</div><div class='del'>-	intel_de_write(dev_priv, BXT_PORT_TX_DW2_GRP(phy, ch), val);</div><div class='del'>-</div><div class='del'>-	val = intel_de_read(dev_priv, BXT_PORT_TX_DW3_LN0(phy, ch));</div><div class='del'>-	val &amp;= ~SCALE_DCOMP_METHOD;</div><div class='del'>-	if (trans-&gt;entries[level].bxt.enable)</div><div class='del'>-		val |= SCALE_DCOMP_METHOD;</div><div class='del'>-</div><div class='del'>-	if ((val &amp; UNIQUE_TRANGE_EN_METHOD) &amp;&amp; !(val &amp; SCALE_DCOMP_METHOD))</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm,</div><div class='del'>-			"Disabled scaling while ouniqetrangenmethod was set");</div><div class='del'>-</div><div class='del'>-	intel_de_write(dev_priv, BXT_PORT_TX_DW3_GRP(phy, ch), val);</div><div class='del'>-</div><div class='del'>-	val = intel_de_read(dev_priv, BXT_PORT_TX_DW4_LN0(phy, ch));</div><div class='del'>-	val &amp;= ~DE_EMPHASIS;</div><div class='del'>-	val |= trans-&gt;entries[level].bxt.deemphasis &lt;&lt; DEEMPH_SHIFT;</div><div class='del'>-	intel_de_write(dev_priv, BXT_PORT_TX_DW4_GRP(phy, ch), val);</div><div class='del'>-</div><div class='del'>-	val = intel_de_read(dev_priv, BXT_PORT_PCS_DW10_LN01(phy, ch));</div><div class='del'>-	val |= TX2_SWING_CALC_INIT | TX1_SWING_CALC_INIT;</div><div class='del'>-	intel_de_write(dev_priv, BXT_PORT_PCS_DW10_GRP(phy, ch), val);</div><div class='add'>+	bxt_dpio_phy_rmw_grp(dev_priv, BXT_PORT_PCS_DW10_LN01(phy, ch),</div><div class='add'>+			     BXT_PORT_PCS_DW10_GRP(phy, ch),</div><div class='add'>+			     TX2_SWING_CALC_INIT | TX1_SWING_CALC_INIT, 0);</div><div class='add'>+</div><div class='add'>+	for (lane = 0; lane &lt; crtc_state-&gt;lane_count; lane++) {</div><div class='add'>+		int level = intel_ddi_level(encoder, crtc_state, lane);</div><div class='add'>+</div><div class='add'>+		intel_de_rmw(dev_priv, BXT_PORT_TX_DW2_LN(phy, ch, lane),</div><div class='add'>+			     MARGIN_000_MASK | UNIQ_TRANS_SCALE_MASK,</div><div class='add'>+			     MARGIN_000(trans-&gt;entries[level].bxt.margin) |</div><div class='add'>+			     UNIQ_TRANS_SCALE(trans-&gt;entries[level].bxt.scale));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (lane = 0; lane &lt; crtc_state-&gt;lane_count; lane++) {</div><div class='add'>+		int level = intel_ddi_level(encoder, crtc_state, lane);</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		intel_de_rmw(dev_priv, BXT_PORT_TX_DW3_LN(phy, ch, lane),</div><div class='add'>+			     SCALE_DCOMP_METHOD,</div><div class='add'>+			     trans-&gt;entries[level].bxt.enable ?</div><div class='add'>+			     SCALE_DCOMP_METHOD : 0);</div><div class='add'>+</div><div class='add'>+		val = intel_de_read(dev_priv, BXT_PORT_TX_DW3_LN(phy, ch, lane));</div><div class='add'>+		if ((val &amp; UNIQUE_TRANGE_EN_METHOD) &amp;&amp; !(val &amp; SCALE_DCOMP_METHOD))</div><div class='add'>+			drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+				"Disabled scaling while ouniqetrangenmethod was set");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (lane = 0; lane &lt; crtc_state-&gt;lane_count; lane++) {</div><div class='add'>+		int level = intel_ddi_level(encoder, crtc_state, lane);</div><div class='add'>+</div><div class='add'>+		intel_de_rmw(dev_priv, BXT_PORT_TX_DW4_LN(phy, ch, lane),</div><div class='add'>+			     DE_EMPHASIS_MASK,</div><div class='add'>+			     DE_EMPHASIS(trans-&gt;entries[level].bxt.deemphasis));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bxt_dpio_phy_rmw_grp(dev_priv, BXT_PORT_PCS_DW10_LN01(phy, ch),</div><div class='add'>+			     BXT_PORT_PCS_DW10_GRP(phy, ch),</div><div class='add'>+			     0, TX2_SWING_CALC_INIT | TX1_SWING_CALC_INIT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv,</div><div class='del'>-			    enum dpio_phy phy)</div><div class='add'>+bool bxt_dpio_phy_is_enabled(struct drm_i915_private *dev_priv,</div><div class='add'>+			     enum dpio_phy phy)</div><div class='ctx'> {</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_info;</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_info;</div><div class='ctx'> </div><div class='ctx'> 	phy_info = bxt_get_phy_info(dev_priv, phy);</div><div class='ctx'> </div><div class='hunk'>@@ -353,7 +381,7 @@ static u32 bxt_get_grc(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val = intel_de_read(dev_priv, BXT_PORT_REF_DW6(phy));</div><div class='ctx'> </div><div class='del'>-	return (val &amp; GRC_CODE_MASK) &gt;&gt; GRC_CODE_SHIFT;</div><div class='add'>+	return REG_FIELD_GET(GRC_CODE_MASK, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bxt_phy_wait_grc_done(struct drm_i915_private *dev_priv,</div><div class='hunk'>@@ -365,20 +393,20 @@ static void bxt_phy_wait_grc_done(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,</div><div class='del'>-			      enum dpio_phy phy)</div><div class='add'>+static void _bxt_dpio_phy_init(struct drm_i915_private *dev_priv,</div><div class='add'>+			       enum dpio_phy phy)</div><div class='ctx'> {</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_info;</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_info;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	phy_info = bxt_get_phy_info(dev_priv, phy);</div><div class='ctx'> </div><div class='del'>-	if (bxt_ddi_phy_is_enabled(dev_priv, phy)) {</div><div class='add'>+	if (bxt_dpio_phy_is_enabled(dev_priv, phy)) {</div><div class='ctx'> 		/* Still read out the GRC value for state verification */</div><div class='ctx'> 		if (phy_info-&gt;rcomp_phy != -1)</div><div class='ctx'> 			dev_priv-&gt;display.state.bxt_phy_grc = bxt_get_grc(dev_priv, phy);</div><div class='ctx'> </div><div class='del'>-		if (bxt_ddi_phy_verify_state(dev_priv, phy)) {</div><div class='add'>+		if (bxt_dpio_phy_verify_state(dev_priv, phy)) {</div><div class='ctx'> 			drm_dbg(&amp;dev_priv-&gt;drm, "DDI PHY %d already enabled, "</div><div class='ctx'> 				"won't reprogram it\n", phy);</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -399,20 +427,17 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	 * The flag should get set in 100us according to the HW team, but</div><div class='ctx'> 	 * use 1ms due to occasional timeouts observed with that.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intel_wait_for_register_fw(&amp;dev_priv-&gt;uncore,</div><div class='del'>-				       BXT_PORT_CL1CM_DW0(phy),</div><div class='del'>-				       PHY_RESERVED | PHY_POWER_GOOD,</div><div class='del'>-				       PHY_POWER_GOOD,</div><div class='del'>-				       1))</div><div class='add'>+	if (intel_de_wait_fw(dev_priv, BXT_PORT_CL1CM_DW0(phy),</div><div class='add'>+			     PHY_RESERVED | PHY_POWER_GOOD, PHY_POWER_GOOD, 1))</div><div class='ctx'> 		drm_err(&amp;dev_priv-&gt;drm, "timeout during PHY%d power on\n",</div><div class='ctx'> 			phy);</div><div class='ctx'> </div><div class='ctx'> 	/* Program PLL Rcomp code offset */</div><div class='del'>-	intel_de_rmw(dev_priv, BXT_PORT_CL1CM_DW9(phy), IREF0RC_OFFSET_MASK,</div><div class='del'>-		     0xE4 &lt;&lt; IREF0RC_OFFSET_SHIFT);</div><div class='add'>+	intel_de_rmw(dev_priv, BXT_PORT_CL1CM_DW9(phy),</div><div class='add'>+		     IREF0RC_OFFSET_MASK, IREF0RC_OFFSET(0xE4));</div><div class='ctx'> </div><div class='del'>-	intel_de_rmw(dev_priv, BXT_PORT_CL1CM_DW10(phy), IREF1RC_OFFSET_MASK,</div><div class='del'>-		     0xE4 &lt;&lt; IREF1RC_OFFSET_SHIFT);</div><div class='add'>+	intel_de_rmw(dev_priv, BXT_PORT_CL1CM_DW10(phy),</div><div class='add'>+		     IREF1RC_OFFSET_MASK, IREF1RC_OFFSET(0xE4));</div><div class='ctx'> </div><div class='ctx'> 	/* Program power gating */</div><div class='ctx'> 	intel_de_rmw(dev_priv, BXT_PORT_CL1CM_DW28(phy), 0,</div><div class='hunk'>@@ -435,9 +460,9 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		val = bxt_get_grc(dev_priv, phy_info-&gt;rcomp_phy);</div><div class='ctx'> 		dev_priv-&gt;display.state.bxt_phy_grc = val;</div><div class='ctx'> </div><div class='del'>-		grc_code = val &lt;&lt; GRC_CODE_FAST_SHIFT |</div><div class='del'>-			   val &lt;&lt; GRC_CODE_SLOW_SHIFT |</div><div class='del'>-			   val;</div><div class='add'>+		grc_code = GRC_CODE_FAST(val) |</div><div class='add'>+			GRC_CODE_SLOW(val) |</div><div class='add'>+			GRC_CODE_NOM(val);</div><div class='ctx'> 		intel_de_write(dev_priv, BXT_PORT_REF_DW6(phy), grc_code);</div><div class='ctx'> 		intel_de_rmw(dev_priv, BXT_PORT_REF_DW8(phy),</div><div class='ctx'> 			     0, GRC_DIS | GRC_RDY_OVRD);</div><div class='hunk'>@@ -449,9 +474,9 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	intel_de_rmw(dev_priv, BXT_PHY_CTL_FAMILY(phy), 0, COMMON_RESET_DIS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='add'>+void bxt_dpio_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> {</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_info;</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_info;</div><div class='ctx'> </div><div class='ctx'> 	phy_info = bxt_get_phy_info(dev_priv, phy);</div><div class='ctx'> </div><div class='hunk'>@@ -460,9 +485,9 @@ void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> 	intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, phy_info-&gt;pwron_mask, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bxt_ddi_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='add'>+void bxt_dpio_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> {</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_info =</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_info =</div><div class='ctx'> 		bxt_get_phy_info(dev_priv, phy);</div><div class='ctx'> 	enum dpio_phy rcomp_phy = phy_info-&gt;rcomp_phy;</div><div class='ctx'> 	bool was_enabled;</div><div class='hunk'>@@ -471,19 +496,19 @@ void bxt_ddi_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> </div><div class='ctx'> 	was_enabled = true;</div><div class='ctx'> 	if (rcomp_phy != -1)</div><div class='del'>-		was_enabled = bxt_ddi_phy_is_enabled(dev_priv, rcomp_phy);</div><div class='add'>+		was_enabled = bxt_dpio_phy_is_enabled(dev_priv, rcomp_phy);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We need to copy the GRC calibration value from rcomp_phy,</div><div class='ctx'> 	 * so make sure it's powered up.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!was_enabled)</div><div class='del'>-		_bxt_ddi_phy_init(dev_priv, rcomp_phy);</div><div class='add'>+		_bxt_dpio_phy_init(dev_priv, rcomp_phy);</div><div class='ctx'> </div><div class='del'>-	_bxt_ddi_phy_init(dev_priv, phy);</div><div class='add'>+	_bxt_dpio_phy_init(dev_priv, phy);</div><div class='ctx'> </div><div class='ctx'> 	if (!was_enabled)</div><div class='del'>-		bxt_ddi_phy_uninit(dev_priv, rcomp_phy);</div><div class='add'>+		bxt_dpio_phy_uninit(dev_priv, rcomp_phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool __printf(6, 7)</div><div class='hunk'>@@ -513,10 +538,10 @@ __phy_reg_verify_state(struct drm_i915_private *dev_priv, enum dpio_phy phy,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='del'>-			      enum dpio_phy phy)</div><div class='add'>+bool bxt_dpio_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='add'>+			       enum dpio_phy phy)</div><div class='ctx'> {</div><div class='del'>-	const struct bxt_ddi_phy_info *phy_info;</div><div class='add'>+	const struct bxt_dpio_phy_info *phy_info;</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> 	bool ok;</div><div class='ctx'> </div><div class='hunk'>@@ -526,23 +551,23 @@ bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	__phy_reg_verify_state(dev_priv, phy, reg, mask, exp, fmt,	\</div><div class='ctx'> 			       ## __VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-	if (!bxt_ddi_phy_is_enabled(dev_priv, phy))</div><div class='add'>+	if (!bxt_dpio_phy_is_enabled(dev_priv, phy))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	ok = true;</div><div class='ctx'> </div><div class='ctx'> 	/* PLL Rcomp code offset */</div><div class='ctx'> 	ok &amp;= _CHK(BXT_PORT_CL1CM_DW9(phy),</div><div class='del'>-		    IREF0RC_OFFSET_MASK, 0xe4 &lt;&lt; IREF0RC_OFFSET_SHIFT,</div><div class='del'>-		    "BXT_PORT_CL1CM_DW9(%d)", phy);</div><div class='add'>+		   IREF0RC_OFFSET_MASK, IREF0RC_OFFSET(0xe4),</div><div class='add'>+		   "BXT_PORT_CL1CM_DW9(%d)", phy);</div><div class='ctx'> 	ok &amp;= _CHK(BXT_PORT_CL1CM_DW10(phy),</div><div class='del'>-		    IREF1RC_OFFSET_MASK, 0xe4 &lt;&lt; IREF1RC_OFFSET_SHIFT,</div><div class='del'>-		    "BXT_PORT_CL1CM_DW10(%d)", phy);</div><div class='add'>+		   IREF1RC_OFFSET_MASK, IREF1RC_OFFSET(0xe4),</div><div class='add'>+		   "BXT_PORT_CL1CM_DW10(%d)", phy);</div><div class='ctx'> </div><div class='ctx'> 	/* Power gating */</div><div class='ctx'> 	mask = OCL1_POWER_DOWN_EN | DW28_OLDO_DYN_PWR_DOWN_EN | SUS_CLK_CONFIG;</div><div class='ctx'> 	ok &amp;= _CHK(BXT_PORT_CL1CM_DW28(phy), mask, mask,</div><div class='del'>-		    "BXT_PORT_CL1CM_DW28(%d)", phy);</div><div class='add'>+		   "BXT_PORT_CL1CM_DW28(%d)", phy);</div><div class='ctx'> </div><div class='ctx'> 	if (phy_info-&gt;dual_channel)</div><div class='ctx'> 		ok &amp;= _CHK(BXT_PORT_CL2CM_DW6(phy),</div><div class='hunk'>@@ -552,9 +577,9 @@ bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	if (phy_info-&gt;rcomp_phy != -1) {</div><div class='ctx'> 		u32 grc_code = dev_priv-&gt;display.state.bxt_phy_grc;</div><div class='ctx'> </div><div class='del'>-		grc_code = grc_code &lt;&lt; GRC_CODE_FAST_SHIFT |</div><div class='del'>-			   grc_code &lt;&lt; GRC_CODE_SLOW_SHIFT |</div><div class='del'>-			   grc_code;</div><div class='add'>+		grc_code = GRC_CODE_FAST(grc_code) |</div><div class='add'>+			GRC_CODE_SLOW(grc_code) |</div><div class='add'>+			GRC_CODE_NOM(grc_code);</div><div class='ctx'> 		mask = GRC_CODE_FAST_MASK | GRC_CODE_SLOW_MASK |</div><div class='ctx'> 		       GRC_CODE_NOM_MASK;</div><div class='ctx'> 		ok &amp;= _CHK(BXT_PORT_REF_DW6(phy), mask, grc_code,</div><div class='hunk'>@@ -562,7 +587,7 @@ bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='ctx'> </div><div class='ctx'> 		mask = GRC_DIS | GRC_RDY_OVRD;</div><div class='ctx'> 		ok &amp;= _CHK(BXT_PORT_REF_DW8(phy), mask, mask,</div><div class='del'>-			    "BXT_PORT_REF_DW8(%d)", phy);</div><div class='add'>+			   "BXT_PORT_REF_DW8(%d)", phy);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ok;</div><div class='hunk'>@@ -570,7 +595,7 @@ bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u8</div><div class='del'>-bxt_ddi_phy_calc_lane_lat_optim_mask(u8 lane_count)</div><div class='add'>+bxt_dpio_phy_calc_lane_lat_optim_mask(u8 lane_count)</div><div class='ctx'> {</div><div class='ctx'> 	switch (lane_count) {</div><div class='ctx'> 	case 1:</div><div class='hunk'>@@ -586,8 +611,8 @@ bxt_ddi_phy_calc_lane_lat_optim_mask(u8 lane_count)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='del'>-				     u8 lane_lat_optim_mask)</div><div class='add'>+void bxt_dpio_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='add'>+				      u8 lane_lat_optim_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='hunk'>@@ -598,24 +623,18 @@ void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='ctx'> 	bxt_port_to_phy_channel(dev_priv, port, &amp;phy, &amp;ch);</div><div class='ctx'> </div><div class='ctx'> 	for (lane = 0; lane &lt; 4; lane++) {</div><div class='del'>-		u32 val = intel_de_read(dev_priv,</div><div class='del'>-					BXT_PORT_TX_DW14_LN(phy, ch, lane));</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Note that on CHV this flag is called UPAR, but has</div><div class='ctx'> 		 * the same function.</div><div class='ctx'> 		 */</div><div class='del'>-		val &amp;= ~LATENCY_OPTIM;</div><div class='del'>-		if (lane_lat_optim_mask &amp; BIT(lane))</div><div class='del'>-			val |= LATENCY_OPTIM;</div><div class='del'>-</div><div class='del'>-		intel_de_write(dev_priv, BXT_PORT_TX_DW14_LN(phy, ch, lane),</div><div class='del'>-			       val);</div><div class='add'>+		intel_de_rmw(dev_priv, BXT_PORT_TX_DW14_LN(phy, ch, lane),</div><div class='add'>+			     LATENCY_OPTIM,</div><div class='add'>+			     lane_lat_optim_mask &amp; BIT(lane) ? LATENCY_OPTIM : 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u8</div><div class='del'>-bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder)</div><div class='add'>+bxt_dpio_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	enum port port = encoder-&gt;port;</div><div class='hunk'>@@ -701,9 +720,8 @@ void chv_set_phy_signal_level(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -740,7 +758,7 @@ void chv_set_phy_signal_level(struct intel_encoder *encoder,</div><div class='ctx'> 	for (i = 0; i &lt; crtc_state-&gt;lane_count; i++) {</div><div class='ctx'> 		val = vlv_dpio_read(dev_priv, phy, CHV_TX_DW4(ch, i));</div><div class='ctx'> 		val &amp;= ~DPIO_SWING_DEEMPH9P5_MASK;</div><div class='del'>-		val |= deemph_reg_value &lt;&lt; DPIO_SWING_DEEMPH9P5_SHIFT;</div><div class='add'>+		val |= DPIO_SWING_DEEMPH9P5(deemph_reg_value);</div><div class='ctx'> 		vlv_dpio_write(dev_priv, phy, CHV_TX_DW4(ch, i), val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -749,15 +767,15 @@ void chv_set_phy_signal_level(struct intel_encoder *encoder,</div><div class='ctx'> 		val = vlv_dpio_read(dev_priv, phy, CHV_TX_DW2(ch, i));</div><div class='ctx'> </div><div class='ctx'> 		val &amp;= ~DPIO_SWING_MARGIN000_MASK;</div><div class='del'>-		val |= margin_reg_value &lt;&lt; DPIO_SWING_MARGIN000_SHIFT;</div><div class='add'>+		val |= DPIO_SWING_MARGIN000(margin_reg_value);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Supposedly this value shouldn't matter when unique transition</div><div class='ctx'> 		 * scale is disabled, but in fact it does matter. Let's just</div><div class='ctx'> 		 * always program the same value and hope it's OK.</div><div class='ctx'> 		 */</div><div class='del'>-		val &amp;= ~(0xff &lt;&lt; DPIO_UNIQ_TRANS_SCALE_SHIFT);</div><div class='del'>-		val |= 0x9a &lt;&lt; DPIO_UNIQ_TRANS_SCALE_SHIFT;</div><div class='add'>+		val &amp;= ~DPIO_UNIQ_TRANS_SCALE_MASK;</div><div class='add'>+		val |= DPIO_UNIQ_TRANS_SCALE(0x9a);</div><div class='ctx'> </div><div class='ctx'> 		vlv_dpio_write(dev_priv, phy, CHV_TX_DW2(ch, i), val);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -796,9 +814,9 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder,</div><div class='ctx'> 			      bool reset)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='del'>-	enum dpio_channel ch = vlv_dig_port_to_channel(enc_to_dig_port(encoder));</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='add'>+	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW0(ch));</div><div class='hunk'>@@ -843,7 +861,7 @@ void chv_phy_pre_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> 	unsigned int lane_mask =</div><div class='ctx'> 		intel_dp_unused_lane_mask(crtc_state-&gt;lane_count);</div><div class='hunk'>@@ -866,39 +884,39 @@ void chv_phy_pre_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	/* program left/right clock distribution */</div><div class='ctx'> 	if (pipe != PIPE_B) {</div><div class='del'>-		val = vlv_dpio_read(dev_priv, phy, _CHV_CMN_DW5_CH0);</div><div class='add'>+		val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW5_CH0);</div><div class='ctx'> 		val &amp;= ~(CHV_BUFLEFTENA1_MASK | CHV_BUFRIGHTENA1_MASK);</div><div class='ctx'> 		if (ch == DPIO_CH0)</div><div class='ctx'> 			val |= CHV_BUFLEFTENA1_FORCE;</div><div class='ctx'> 		if (ch == DPIO_CH1)</div><div class='ctx'> 			val |= CHV_BUFRIGHTENA1_FORCE;</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, _CHV_CMN_DW5_CH0, val);</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, CHV_CMN_DW5_CH0, val);</div><div class='ctx'> 	} else {</div><div class='del'>-		val = vlv_dpio_read(dev_priv, phy, _CHV_CMN_DW1_CH1);</div><div class='add'>+		val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW1_CH1);</div><div class='ctx'> 		val &amp;= ~(CHV_BUFLEFTENA2_MASK | CHV_BUFRIGHTENA2_MASK);</div><div class='ctx'> 		if (ch == DPIO_CH0)</div><div class='ctx'> 			val |= CHV_BUFLEFTENA2_FORCE;</div><div class='ctx'> 		if (ch == DPIO_CH1)</div><div class='ctx'> 			val |= CHV_BUFRIGHTENA2_FORCE;</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, _CHV_CMN_DW1_CH1, val);</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, CHV_CMN_DW1_CH1, val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* program clock channel usage */</div><div class='ctx'> 	val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW8(ch));</div><div class='del'>-	val |= CHV_PCS_USEDCLKCHANNEL_OVRRIDE;</div><div class='del'>-	if (pipe != PIPE_B)</div><div class='del'>-		val &amp;= ~CHV_PCS_USEDCLKCHANNEL;</div><div class='add'>+	val |= DPIO_PCS_USEDCLKCHANNEL_OVRRIDE;</div><div class='add'>+	if (pipe == PIPE_B)</div><div class='add'>+		val |= DPIO_PCS_USEDCLKCHANNEL;</div><div class='ctx'> 	else</div><div class='del'>-		val |= CHV_PCS_USEDCLKCHANNEL;</div><div class='add'>+		val &amp;= ~DPIO_PCS_USEDCLKCHANNEL;</div><div class='ctx'> 	vlv_dpio_write(dev_priv, phy, VLV_PCS01_DW8(ch), val);</div><div class='ctx'> </div><div class='ctx'> 	if (crtc_state-&gt;lane_count &gt; 2) {</div><div class='ctx'> 		val = vlv_dpio_read(dev_priv, phy, VLV_PCS23_DW8(ch));</div><div class='del'>-		val |= CHV_PCS_USEDCLKCHANNEL_OVRRIDE;</div><div class='del'>-		if (pipe != PIPE_B)</div><div class='del'>-			val &amp;= ~CHV_PCS_USEDCLKCHANNEL;</div><div class='add'>+		val |= DPIO_PCS_USEDCLKCHANNEL_OVRRIDE;</div><div class='add'>+		if (pipe == PIPE_B)</div><div class='add'>+			val |= DPIO_PCS_USEDCLKCHANNEL;</div><div class='ctx'> 		else</div><div class='del'>-			val |= CHV_PCS_USEDCLKCHANNEL;</div><div class='add'>+			val &amp;= ~DPIO_PCS_USEDCLKCHANNEL;</div><div class='ctx'> 		vlv_dpio_write(dev_priv, phy, VLV_PCS23_DW8(ch), val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -908,10 +926,10 @@ void chv_phy_pre_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	 * pick the CL based on the port.</div><div class='ctx'> 	 */</div><div class='ctx'> 	val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW19(ch));</div><div class='del'>-	if (pipe != PIPE_B)</div><div class='del'>-		val &amp;= ~CHV_CMN_USEDCLKCHANNEL;</div><div class='del'>-	else</div><div class='add'>+	if (pipe == PIPE_B)</div><div class='ctx'> 		val |= CHV_CMN_USEDCLKCHANNEL;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~CHV_CMN_USEDCLKCHANNEL;</div><div class='ctx'> 	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW19(ch), val);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='hunk'>@@ -923,9 +941,8 @@ void chv_phy_pre_encoder_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);</div><div class='ctx'> 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> 	int data, i, stagger;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -946,11 +963,10 @@ void chv_phy_pre_encoder_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	for (i = 0; i &lt; crtc_state-&gt;lane_count; i++) {</div><div class='ctx'> 		/* Set the upar bit */</div><div class='ctx'> 		if (crtc_state-&gt;lane_count == 1)</div><div class='del'>-			data = 0x0;</div><div class='add'>+			data = 0;</div><div class='ctx'> 		else</div><div class='del'>-			data = (i == 1) ? 0x0 : 0x1;</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, CHV_TX_DW14(ch, i),</div><div class='del'>-				data &lt;&lt; DPIO_UPAR_SHIFT);</div><div class='add'>+			data = (i == 1) ? 0 : DPIO_UPAR;</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, CHV_TX_DW14(ch, i), data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Data lane stagger programming */</div><div class='hunk'>@@ -1012,21 +1028,21 @@ void chv_phy_post_pll_disable(struct intel_encoder *encoder,</div><div class='ctx'> 			      const struct intel_crtc_state *old_crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(enc_to_dig_port(encoder));</div><div class='ctx'> 	enum pipe pipe = to_intel_crtc(old_crtc_state-&gt;uapi.crtc)-&gt;pipe;</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(pipe);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	/* disable left/right clock distribution */</div><div class='ctx'> 	if (pipe != PIPE_B) {</div><div class='del'>-		val = vlv_dpio_read(dev_priv, phy, _CHV_CMN_DW5_CH0);</div><div class='add'>+		val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW5_CH0);</div><div class='ctx'> 		val &amp;= ~(CHV_BUFLEFTENA1_MASK | CHV_BUFRIGHTENA1_MASK);</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, _CHV_CMN_DW5_CH0, val);</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, CHV_CMN_DW5_CH0, val);</div><div class='ctx'> 	} else {</div><div class='del'>-		val = vlv_dpio_read(dev_priv, phy, _CHV_CMN_DW1_CH1);</div><div class='add'>+		val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW1_CH1);</div><div class='ctx'> 		val &amp;= ~(CHV_BUFLEFTENA2_MASK | CHV_BUFRIGHTENA2_MASK);</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, _CHV_CMN_DW1_CH1, val);</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, CHV_CMN_DW1_CH1, val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='hunk'>@@ -1050,24 +1066,23 @@ void vlv_set_phy_signal_level(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='del'>-	enum dpio_channel port = vlv_dig_port_to_channel(dig_port);</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW5(port), 0x00000000);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW4(port), demph_reg_value);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW2(port),</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW5_GRP(ch), 0x00000000);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW4_GRP(ch), demph_reg_value);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW2_GRP(ch),</div><div class='ctx'> 			 uniqtranscale_reg_value);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW3(port), 0x0C782040);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW3_GRP(ch), 0x0C782040);</div><div class='ctx'> </div><div class='ctx'> 	if (tx3_demph)</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, VLV_TX3_DW4(port), tx3_demph);</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, VLV_TX_DW4(ch, 3), tx3_demph);</div><div class='ctx'> </div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW11(port), 0x00030000);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW9(port), preemph_reg_value);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW5(port), DPIO_TX_OCALINIT_EN);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW11_GRP(ch), 0x00030000);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW9_GRP(ch), preemph_reg_value);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW5_GRP(ch), DPIO_TX_OCALINIT_EN);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='hunk'>@@ -1077,26 +1092,25 @@ void vlv_phy_pre_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='del'>-	enum dpio_channel port = vlv_dig_port_to_channel(dig_port);</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> </div><div class='ctx'> 	/* Program Tx lane resets to default */</div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW0(port),</div><div class='del'>-			 DPIO_PCS_TX_LANE2_RESET |</div><div class='del'>-			 DPIO_PCS_TX_LANE1_RESET);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW1(port),</div><div class='del'>-			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |</div><div class='del'>-			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |</div><div class='del'>-			 (1&lt;&lt;DPIO_PCS_CLK_DATAWIDTH_SHIFT) |</div><div class='del'>-				 DPIO_PCS_CLK_SOFT_RESET);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW0_GRP(ch),</div><div class='add'>+		       DPIO_PCS_TX_LANE2_RESET |</div><div class='add'>+		       DPIO_PCS_TX_LANE1_RESET);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW1_GRP(ch),</div><div class='add'>+		       DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |</div><div class='add'>+		       DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |</div><div class='add'>+		       DPIO_PCS_CLK_DATAWIDTH_8_10 |</div><div class='add'>+		       DPIO_PCS_CLK_SOFT_RESET);</div><div class='ctx'> </div><div class='ctx'> 	/* Fix up inter-pair skew failure */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW12(port), 0x00750f00);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW11(port), 0x00001500);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_TX_DW14(port), 0x40400000);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW12_GRP(ch), 0x00750f00);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW11_GRP(ch), 0x00001500);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_TX_DW14_GRP(ch), 0x40400000);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='hunk'>@@ -1108,26 +1122,23 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder,</div><div class='ctx'> 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='del'>-	enum dpio_channel port = vlv_dig_port_to_channel(dig_port);</div><div class='add'>+	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(pipe);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable clock channels for this port */</div><div class='del'>-	val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW8(port));</div><div class='del'>-	val = 0;</div><div class='del'>-	if (pipe)</div><div class='del'>-		val |= (1&lt;&lt;21);</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~(1&lt;&lt;21);</div><div class='del'>-	val |= 0x001000c4;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW8(port), val);</div><div class='add'>+	val = DPIO_PCS_USEDCLKCHANNEL_OVRRIDE;</div><div class='add'>+	if (pipe == PIPE_B)</div><div class='add'>+		val |= DPIO_PCS_USEDCLKCHANNEL;</div><div class='add'>+	val |= 0xc4;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW8_GRP(ch), val);</div><div class='ctx'> </div><div class='ctx'> 	/* Program lane clock */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW14(port), 0x00760018);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW23(port), 0x00400888);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW14_GRP(ch), 0x00760018);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW23_GRP(ch), 0x00400888);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='hunk'>@@ -1137,12 +1148,11 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state-&gt;uapi.crtc);</div><div class='del'>-	enum dpio_channel port = vlv_dig_port_to_channel(dig_port);</div><div class='del'>-	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);</div><div class='add'>+	enum dpio_phy phy = vlv_dig_port_to_phy(dig_port);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW0(port), 0x00000000);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW1(port), 0x00e00060);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW0_GRP(ch), 0x00000000);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW1_GRP(ch), 0x00e00060);</div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.h b/drivers/gpu/drm/i915/display/intel_dpio_phy.h<br/>index 9adc4e8c1738..226994dcb89b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpio_phy.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpio_phy.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpio_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dpio_phy.h</a></div><div class='hunk'>@@ -29,18 +29,18 @@ enum dpio_phy {</div><div class='ctx'> #ifdef I915</div><div class='ctx'> void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port,</div><div class='ctx'> 			     enum dpio_phy *phy, enum dpio_channel *ch);</div><div class='del'>-void bxt_ddi_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='del'>-				   const struct intel_crtc_state *crtc_state);</div><div class='del'>-void bxt_ddi_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy);</div><div class='del'>-void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy);</div><div class='del'>-bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv,</div><div class='del'>-			    enum dpio_phy phy);</div><div class='del'>-bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='del'>-			      enum dpio_phy phy);</div><div class='del'>-u8 bxt_ddi_phy_calc_lane_lat_optim_mask(u8 lane_count);</div><div class='del'>-void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='del'>-				     u8 lane_lat_optim_mask);</div><div class='del'>-u8 bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder);</div><div class='add'>+void bxt_dpio_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='add'>+				    const struct intel_crtc_state *crtc_state);</div><div class='add'>+void bxt_dpio_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy);</div><div class='add'>+void bxt_dpio_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy);</div><div class='add'>+bool bxt_dpio_phy_is_enabled(struct drm_i915_private *dev_priv,</div><div class='add'>+			     enum dpio_phy phy);</div><div class='add'>+bool bxt_dpio_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='add'>+			       enum dpio_phy phy);</div><div class='add'>+u8 bxt_dpio_phy_calc_lane_lat_optim_mask(u8 lane_count);</div><div class='add'>+void bxt_dpio_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='add'>+				      u8 lane_lat_optim_mask);</div><div class='add'>+u8 bxt_dpio_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder);</div><div class='ctx'> </div><div class='ctx'> enum dpio_channel vlv_dig_port_to_channel(struct intel_digital_port *dig_port);</div><div class='ctx'> enum dpio_phy vlv_dig_port_to_phy(struct intel_digital_port *dig_port);</div><div class='hunk'>@@ -77,35 +77,35 @@ static inline void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, en</div><div class='ctx'> 					   enum dpio_phy *phy, enum dpio_channel *ch)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline void bxt_ddi_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='del'>-						 const struct intel_crtc_state *crtc_state)</div><div class='add'>+static inline void bxt_dpio_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='add'>+						  const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline void bxt_ddi_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='add'>+static inline void bxt_dpio_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='add'>+static inline void bxt_dpio_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv,</div><div class='del'>-					  enum dpio_phy phy)</div><div class='add'>+static inline bool bxt_dpio_phy_is_enabled(struct drm_i915_private *dev_priv,</div><div class='add'>+					   enum dpio_phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='del'>-static inline bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='del'>-					    enum dpio_phy phy)</div><div class='add'>+static inline bool bxt_dpio_phy_verify_state(struct drm_i915_private *dev_priv,</div><div class='add'>+					     enum dpio_phy phy)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='del'>-static inline u8 bxt_ddi_phy_calc_lane_lat_optim_mask(u8 lane_count)</div><div class='add'>+static inline u8 bxt_dpio_phy_calc_lane_lat_optim_mask(u8 lane_count)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static inline void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='del'>-						   u8 lane_lat_optim_mask)</div><div class='add'>+static inline void bxt_dpio_phy_set_lane_optim_mask(struct intel_encoder *encoder,</div><div class='add'>+						    u8 lane_lat_optim_mask)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline u8 bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder)</div><div class='add'>+static inline u8 bxt_dpio_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c<br/>index 3038655377ea..a981f45facb3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dpll.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include "intel_panel.h"</div><div class='ctx'> #include "intel_pps.h"</div><div class='ctx'> #include "intel_snps_phy.h"</div><div class='add'>+#include "vlv_dpio_phy_regs.h"</div><div class='ctx'> #include "vlv_sideband.h"</div><div class='ctx'> </div><div class='ctx'> struct intel_dpll_funcs {</div><div class='hunk'>@@ -369,38 +370,68 @@ int chv_calc_dpll_params(int refclk, struct dpll *clock)</div><div class='ctx'> 	return clock-&gt;dot;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i9xx_pll_refclk(struct drm_device *dev,</div><div class='del'>-			   const struct intel_crtc_state *pipe_config)</div><div class='add'>+static int i9xx_pll_refclk(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	u32 dpll = pipe_config-&gt;dpll_hw_state.dpll;</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> </div><div class='del'>-	if ((dpll &amp; PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)</div><div class='del'>-		return dev_priv-&gt;display.vbt.lvds_ssc_freq;</div><div class='del'>-	else if (HAS_PCH_SPLIT(dev_priv))</div><div class='add'>+	if ((hw_state-&gt;dpll &amp; PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)</div><div class='add'>+		return i915-&gt;display.vbt.lvds_ssc_freq;</div><div class='add'>+	else if (HAS_PCH_SPLIT(i915))</div><div class='ctx'> 		return 120000;</div><div class='del'>-	else if (DISPLAY_VER(dev_priv) != 2)</div><div class='add'>+	else if (DISPLAY_VER(i915) != 2)</div><div class='ctx'> 		return 96000;</div><div class='ctx'> 	else</div><div class='ctx'> 		return 48000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,</div><div class='add'>+			    struct intel_dpll_hw_state *dpll_hw_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;i9xx;</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 4) {</div><div class='add'>+		u32 tmp;</div><div class='add'>+</div><div class='add'>+		/* No way to read it out on pipes B and C */</div><div class='add'>+		if (IS_CHERRYVIEW(dev_priv) &amp;&amp; crtc-&gt;pipe != PIPE_A)</div><div class='add'>+			tmp = dev_priv-&gt;display.state.chv_dpll_md[crtc-&gt;pipe];</div><div class='add'>+		else</div><div class='add'>+			tmp = intel_de_read(dev_priv, DPLL_MD(crtc-&gt;pipe));</div><div class='add'>+</div><div class='add'>+		hw_state-&gt;dpll_md = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;dpll = intel_de_read(dev_priv, DPLL(crtc-&gt;pipe));</div><div class='add'>+</div><div class='add'>+	if (!IS_VALLEYVIEW(dev_priv) &amp;&amp; !IS_CHERRYVIEW(dev_priv)) {</div><div class='add'>+		hw_state-&gt;fp0 = intel_de_read(dev_priv, FP0(crtc-&gt;pipe));</div><div class='add'>+		hw_state-&gt;fp1 = intel_de_read(dev_priv, FP1(crtc-&gt;pipe));</div><div class='add'>+	} else {</div><div class='add'>+		/* Mask out read-only status bits. */</div><div class='add'>+		hw_state-&gt;dpll &amp;= ~(DPLL_LOCK_VLV |</div><div class='add'>+				    DPLL_PORTC_READY_MASK |</div><div class='add'>+				    DPLL_PORTB_READY_MASK);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Returns the clock of the currently programmed mode of the given pipe. */</div><div class='del'>-void i9xx_crtc_clock_get(struct intel_crtc *crtc,</div><div class='del'>-			 struct intel_crtc_state *pipe_config)</div><div class='add'>+void i9xx_crtc_clock_get(struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = crtc-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	u32 dpll = pipe_config-&gt;dpll_hw_state.dpll;</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='add'>+	u32 dpll = hw_state-&gt;dpll;</div><div class='ctx'> 	u32 fp;</div><div class='ctx'> 	struct dpll clock;</div><div class='ctx'> 	int port_clock;</div><div class='del'>-	int refclk = i9xx_pll_refclk(dev, pipe_config);</div><div class='add'>+	int refclk = i9xx_pll_refclk(crtc_state);</div><div class='ctx'> </div><div class='ctx'> 	if ((dpll &amp; DISPLAY_RATE_SELECT_FPA1) == 0)</div><div class='del'>-		fp = pipe_config-&gt;dpll_hw_state.fp0;</div><div class='add'>+		fp = hw_state-&gt;fp0;</div><div class='ctx'> 	else</div><div class='del'>-		fp = pipe_config-&gt;dpll_hw_state.fp1;</div><div class='add'>+		fp = hw_state-&gt;fp1;</div><div class='ctx'> </div><div class='ctx'> 	clock.m1 = (fp &amp; FP_M1_DIV_MASK) &gt;&gt; FP_M1_DIV_SHIFT;</div><div class='ctx'> 	if (IS_PINEVIEW(dev_priv)) {</div><div class='hunk'>@@ -475,68 +506,69 @@ void i9xx_crtc_clock_get(struct intel_crtc *crtc,</div><div class='ctx'> 	 * port_clock to compute adjusted_mode.crtc_clock in the</div><div class='ctx'> 	 * encoder's get_config() function.</div><div class='ctx'> 	 */</div><div class='del'>-	pipe_config-&gt;port_clock = port_clock;</div><div class='add'>+	crtc_state-&gt;port_clock = port_clock;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void vlv_crtc_clock_get(struct intel_crtc *crtc,</div><div class='del'>-			struct intel_crtc_state *pipe_config)</div><div class='add'>+void vlv_crtc_clock_get(struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = crtc-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	enum dpio_channel ch = vlv_pipe_to_channel(crtc-&gt;pipe);</div><div class='ctx'> 	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='del'>-	struct dpll clock;</div><div class='del'>-	u32 mdiv;</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> 	int refclk = 100000;</div><div class='add'>+	struct dpll clock;</div><div class='add'>+	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* In case of DSI, DPLL will not be used */</div><div class='del'>-	if ((pipe_config-&gt;dpll_hw_state.dpll &amp; DPLL_VCO_ENABLE) == 0)</div><div class='add'>+	if ((hw_state-&gt;dpll &amp; DPLL_VCO_ENABLE) == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='del'>-	mdiv = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW3(crtc-&gt;pipe));</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW3(ch));</div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> </div><div class='del'>-	clock.m1 = (mdiv &gt;&gt; DPIO_M1DIV_SHIFT) &amp; 7;</div><div class='del'>-	clock.m2 = mdiv &amp; DPIO_M2DIV_MASK;</div><div class='del'>-	clock.n = (mdiv &gt;&gt; DPIO_N_SHIFT) &amp; 0xf;</div><div class='del'>-	clock.p1 = (mdiv &gt;&gt; DPIO_P1_SHIFT) &amp; 7;</div><div class='del'>-	clock.p2 = (mdiv &gt;&gt; DPIO_P2_SHIFT) &amp; 0x1f;</div><div class='add'>+	clock.m1 = REG_FIELD_GET(DPIO_M1_DIV_MASK, tmp);</div><div class='add'>+	clock.m2 = REG_FIELD_GET(DPIO_M2_DIV_MASK, tmp);</div><div class='add'>+	clock.n = REG_FIELD_GET(DPIO_N_DIV_MASK, tmp);</div><div class='add'>+	clock.p1 = REG_FIELD_GET(DPIO_P1_DIV_MASK, tmp);</div><div class='add'>+	clock.p2 = REG_FIELD_GET(DPIO_P2_DIV_MASK, tmp);</div><div class='ctx'> </div><div class='del'>-	pipe_config-&gt;port_clock = vlv_calc_dpll_params(refclk, &amp;clock);</div><div class='add'>+	crtc_state-&gt;port_clock = vlv_calc_dpll_params(refclk, &amp;clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void chv_crtc_clock_get(struct intel_crtc *crtc,</div><div class='del'>-			struct intel_crtc_state *pipe_config)</div><div class='add'>+void chv_crtc_clock_get(struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = crtc-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	enum dpio_channel port = vlv_pipe_to_channel(crtc-&gt;pipe);</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	enum dpio_channel ch = vlv_pipe_to_channel(crtc-&gt;pipe);</div><div class='ctx'> 	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> 	struct dpll clock;</div><div class='ctx'> 	u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3;</div><div class='ctx'> 	int refclk = 100000;</div><div class='ctx'> </div><div class='ctx'> 	/* In case of DSI, DPLL will not be used */</div><div class='del'>-	if ((pipe_config-&gt;dpll_hw_state.dpll &amp; DPLL_VCO_ENABLE) == 0)</div><div class='add'>+	if ((hw_state-&gt;dpll &amp; DPLL_VCO_ENABLE) == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='del'>-	cmn_dw13 = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW13(port));</div><div class='del'>-	pll_dw0 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW0(port));</div><div class='del'>-	pll_dw1 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW1(port));</div><div class='del'>-	pll_dw2 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW2(port));</div><div class='del'>-	pll_dw3 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW3(port));</div><div class='add'>+	cmn_dw13 = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW13(ch));</div><div class='add'>+	pll_dw0 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW0(ch));</div><div class='add'>+	pll_dw1 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW1(ch));</div><div class='add'>+	pll_dw2 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW2(ch));</div><div class='add'>+	pll_dw3 = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW3(ch));</div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> </div><div class='del'>-	clock.m1 = (pll_dw1 &amp; 0x7) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0;</div><div class='del'>-	clock.m2 = (pll_dw0 &amp; 0xff) &lt;&lt; 22;</div><div class='add'>+	clock.m1 = REG_FIELD_GET(DPIO_CHV_M1_DIV_MASK, pll_dw1) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0;</div><div class='add'>+	clock.m2 = REG_FIELD_GET(DPIO_CHV_M2_DIV_MASK, pll_dw0) &lt;&lt; 22;</div><div class='ctx'> 	if (pll_dw3 &amp; DPIO_CHV_FRAC_DIV_EN)</div><div class='del'>-		clock.m2 |= pll_dw2 &amp; 0x3fffff;</div><div class='del'>-	clock.n = (pll_dw1 &gt;&gt; DPIO_CHV_N_DIV_SHIFT) &amp; 0xf;</div><div class='del'>-	clock.p1 = (cmn_dw13 &gt;&gt; DPIO_CHV_P1_DIV_SHIFT) &amp; 0x7;</div><div class='del'>-	clock.p2 = (cmn_dw13 &gt;&gt; DPIO_CHV_P2_DIV_SHIFT) &amp; 0x1f;</div><div class='add'>+		clock.m2 |= REG_FIELD_GET(DPIO_CHV_M2_FRAC_DIV_MASK, pll_dw2);</div><div class='add'>+	clock.n = REG_FIELD_GET(DPIO_CHV_N_DIV_MASK, pll_dw1);</div><div class='add'>+	clock.p1 = REG_FIELD_GET(DPIO_CHV_P1_DIV_MASK, cmn_dw13);</div><div class='add'>+	clock.p2 = REG_FIELD_GET(DPIO_CHV_P2_DIV_MASK, cmn_dw13);</div><div class='ctx'> </div><div class='del'>-	pipe_config-&gt;port_clock = chv_calc_dpll_params(refclk, &amp;clock);</div><div class='add'>+	crtc_state-&gt;port_clock = chv_calc_dpll_params(refclk, &amp;clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -958,37 +990,20 @@ static u32 pnv_dpll_compute_fp(const struct dpll *dpll)</div><div class='ctx'> 	return (1 &lt;&lt; dpll-&gt;n) &lt;&lt; 16 | dpll-&gt;m2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i9xx_update_pll_dividers(struct intel_crtc_state *crtc_state,</div><div class='del'>-				     const struct dpll *clock,</div><div class='del'>-				     const struct dpll *reduced_clock)</div><div class='add'>+static u32 i965_dpll_md(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	u32 fp, fp2;</div><div class='del'>-</div><div class='del'>-	if (IS_PINEVIEW(dev_priv)) {</div><div class='del'>-		fp = pnv_dpll_compute_fp(clock);</div><div class='del'>-		fp2 = pnv_dpll_compute_fp(reduced_clock);</div><div class='del'>-	} else {</div><div class='del'>-		fp = i9xx_dpll_compute_fp(clock);</div><div class='del'>-		fp2 = i9xx_dpll_compute_fp(reduced_clock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.fp0 = fp;</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.fp1 = fp2;</div><div class='add'>+	return (crtc_state-&gt;pixel_multiplier - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i9xx_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='del'>-			      const struct dpll *clock,</div><div class='del'>-			      const struct dpll *reduced_clock)</div><div class='add'>+static u32 i9xx_dpll(const struct intel_crtc_state *crtc_state,</div><div class='add'>+		     const struct dpll *clock,</div><div class='add'>+		     const struct dpll *reduced_clock)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	u32 dpll;</div><div class='ctx'> </div><div class='del'>-	i9xx_update_pll_dividers(crtc_state, clock, reduced_clock);</div><div class='del'>-</div><div class='del'>-	dpll = DPLL_VGA_MODE_DIS;</div><div class='add'>+	dpll = DPLL_VCO_ENABLE | DPLL_VGA_MODE_DIS;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS))</div><div class='ctx'> 		dpll |= DPLLB_MODE_LVDS;</div><div class='hunk'>@@ -1047,27 +1062,40 @@ static void i9xx_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	else</div><div class='ctx'> 		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='ctx'> </div><div class='del'>-	dpll |= DPLL_VCO_ENABLE;</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll = dpll;</div><div class='del'>-</div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 4) {</div><div class='del'>-		u32 dpll_md = (crtc_state-&gt;pixel_multiplier - 1)</div><div class='del'>-			&lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT;</div><div class='del'>-		crtc_state-&gt;dpll_hw_state.dpll_md = dpll_md;</div><div class='del'>-	}</div><div class='add'>+	return dpll;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i8xx_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='add'>+static void i9xx_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			      const struct dpll *clock,</div><div class='ctx'> 			      const struct dpll *reduced_clock)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	u32 dpll;</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> </div><div class='del'>-	i9xx_update_pll_dividers(crtc_state, clock, reduced_clock);</div><div class='add'>+	if (IS_PINEVIEW(dev_priv)) {</div><div class='add'>+		hw_state-&gt;fp0 = pnv_dpll_compute_fp(clock);</div><div class='add'>+		hw_state-&gt;fp1 = pnv_dpll_compute_fp(reduced_clock);</div><div class='add'>+	} else {</div><div class='add'>+		hw_state-&gt;fp0 = i9xx_dpll_compute_fp(clock);</div><div class='add'>+		hw_state-&gt;fp1 = i9xx_dpll_compute_fp(reduced_clock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;dpll = i9xx_dpll(crtc_state, clock, reduced_clock);</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &gt;= 4)</div><div class='add'>+		hw_state-&gt;dpll_md = i965_dpll_md(crtc_state);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dpll = DPLL_VGA_MODE_DIS;</div><div class='add'>+static u32 i8xx_dpll(const struct intel_crtc_state *crtc_state,</div><div class='add'>+		     const struct dpll *clock,</div><div class='add'>+		     const struct dpll *reduced_clock)</div><div class='add'>+{</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	u32 dpll;</div><div class='add'>+</div><div class='add'>+	dpll = DPLL_VCO_ENABLE | DPLL_VGA_MODE_DIS;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {</div><div class='ctx'> 		dpll |= (1 &lt;&lt; (clock-&gt;p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='hunk'>@@ -1104,8 +1132,19 @@ static void i8xx_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	else</div><div class='ctx'> 		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='ctx'> </div><div class='del'>-	dpll |= DPLL_VCO_ENABLE;</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll = dpll;</div><div class='add'>+	return dpll;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i8xx_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='add'>+			      const struct dpll *clock,</div><div class='add'>+			      const struct dpll *reduced_clock)</div><div class='add'>+{</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;fp0 = i9xx_dpll_compute_fp(clock);</div><div class='add'>+	hw_state-&gt;fp1 = i9xx_dpll_compute_fp(reduced_clock);</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;dpll = i8xx_dpll(crtc_state, clock, reduced_clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hsw_crtc_compute_clock(struct intel_atomic_state *state,</div><div class='hunk'>@@ -1185,62 +1224,54 @@ static int mtl_crtc_compute_clock(struct intel_atomic_state *state,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: Do the readback via intel_compute_shared_dplls() */</div><div class='del'>-	crtc_state-&gt;port_clock = intel_cx0pll_calc_port_clock(encoder, &amp;crtc_state-&gt;cx0pll_state);</div><div class='add'>+	crtc_state-&gt;port_clock = intel_cx0pll_calc_port_clock(encoder, &amp;crtc_state-&gt;dpll_hw_state.cx0pll);</div><div class='ctx'> </div><div class='ctx'> 	crtc_state-&gt;hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ilk_fb_cb_factor(const struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='add'>+</div><div class='add'>+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &amp;&amp;</div><div class='add'>+	    ((intel_panel_use_ssc(i915) &amp;&amp; i915-&gt;display.vbt.lvds_ssc_freq == 100000) ||</div><div class='add'>+	     (HAS_PCH_IBX(i915) &amp;&amp; intel_is_dual_link_lvds(i915))))</div><div class='add'>+		return 25;</div><div class='add'>+</div><div class='add'>+	if (crtc_state-&gt;sdvo_tv_clock)</div><div class='add'>+		return 20;</div><div class='add'>+</div><div class='add'>+	return 21;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool ilk_needs_fb_cb_tune(const struct dpll *dpll, int factor)</div><div class='ctx'> {</div><div class='ctx'> 	return dpll-&gt;m &lt; factor * dpll-&gt;n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ilk_update_pll_dividers(struct intel_crtc_state *crtc_state,</div><div class='del'>-				    const struct dpll *clock,</div><div class='del'>-				    const struct dpll *reduced_clock)</div><div class='add'>+static u32 ilk_dpll_compute_fp(const struct dpll *clock, int factor)</div><div class='ctx'> {</div><div class='del'>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	u32 fp, fp2;</div><div class='del'>-	int factor;</div><div class='del'>-</div><div class='del'>-	/* Enable autotuning of the PLL clock (if permissible) */</div><div class='del'>-	factor = 21;</div><div class='del'>-	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {</div><div class='del'>-		if ((intel_panel_use_ssc(dev_priv) &amp;&amp;</div><div class='del'>-		     dev_priv-&gt;display.vbt.lvds_ssc_freq == 100000) ||</div><div class='del'>-		    (HAS_PCH_IBX(dev_priv) &amp;&amp;</div><div class='del'>-		     intel_is_dual_link_lvds(dev_priv)))</div><div class='del'>-			factor = 25;</div><div class='del'>-	} else if (crtc_state-&gt;sdvo_tv_clock) {</div><div class='del'>-		factor = 20;</div><div class='del'>-	}</div><div class='add'>+	u32 fp;</div><div class='ctx'> </div><div class='ctx'> 	fp = i9xx_dpll_compute_fp(clock);</div><div class='ctx'> 	if (ilk_needs_fb_cb_tune(clock, factor))</div><div class='ctx'> 		fp |= FP_CB_TUNE;</div><div class='ctx'> </div><div class='del'>-	fp2 = i9xx_dpll_compute_fp(reduced_clock);</div><div class='del'>-	if (ilk_needs_fb_cb_tune(reduced_clock, factor))</div><div class='del'>-		fp2 |= FP_CB_TUNE;</div><div class='del'>-</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.fp0 = fp;</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.fp1 = fp2;</div><div class='add'>+	return fp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ilk_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='del'>-			     const struct dpll *clock,</div><div class='del'>-			     const struct dpll *reduced_clock)</div><div class='add'>+static u32 ilk_dpll(const struct intel_crtc_state *crtc_state,</div><div class='add'>+		    const struct dpll *clock,</div><div class='add'>+		    const struct dpll *reduced_clock)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	u32 dpll;</div><div class='ctx'> </div><div class='del'>-	ilk_update_pll_dividers(crtc_state, clock, reduced_clock);</div><div class='del'>-</div><div class='del'>-	dpll = 0;</div><div class='add'>+	dpll = DPLL_VCO_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS))</div><div class='ctx'> 		dpll |= DPLLB_MODE_LVDS;</div><div class='hunk'>@@ -1302,9 +1333,20 @@ static void ilk_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	else</div><div class='ctx'> 		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='ctx'> </div><div class='del'>-	dpll |= DPLL_VCO_ENABLE;</div><div class='add'>+	return dpll;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ilk_compute_dpll(struct intel_crtc_state *crtc_state,</div><div class='add'>+			     const struct dpll *clock,</div><div class='add'>+			     const struct dpll *reduced_clock)</div><div class='add'>+{</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='add'>+	int factor = ilk_fb_cb_factor(crtc_state);</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;fp0 = ilk_dpll_compute_fp(clock, factor);</div><div class='add'>+	hw_state-&gt;fp1 = ilk_dpll_compute_fp(reduced_clock, factor);</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll = dpll;</div><div class='add'>+	hw_state-&gt;dpll = ilk_dpll(crtc_state, clock, reduced_clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ilk_crtc_compute_clock(struct intel_atomic_state *state,</div><div class='hunk'>@@ -1377,39 +1419,56 @@ static int ilk_crtc_get_shared_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 	return intel_reserve_shared_dplls(state, crtc, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void vlv_compute_dpll(struct intel_crtc_state *crtc_state)</div><div class='add'>+static u32 vlv_dpll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	u32 dpll;</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll = DPLL_INTEGRATED_REF_CLK_VLV |</div><div class='add'>+	dpll = DPLL_INTEGRATED_REF_CLK_VLV |</div><div class='ctx'> 		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;</div><div class='add'>+</div><div class='ctx'> 	if (crtc-&gt;pipe != PIPE_A)</div><div class='del'>-		crtc_state-&gt;dpll_hw_state.dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;</div><div class='add'>+		dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;</div><div class='ctx'> </div><div class='ctx'> 	/* DPLL not used with DSI, but still need the rest set up */</div><div class='ctx'> 	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))</div><div class='del'>-		crtc_state-&gt;dpll_hw_state.dpll |= DPLL_VCO_ENABLE |</div><div class='del'>-			DPLL_EXT_BUFFER_ENABLE_VLV;</div><div class='add'>+		dpll |= DPLL_VCO_ENABLE | DPLL_EXT_BUFFER_ENABLE_VLV;</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll_md =</div><div class='del'>-		(crtc_state-&gt;pixel_multiplier - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT;</div><div class='add'>+	return dpll;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void chv_compute_dpll(struct intel_crtc_state *crtc_state)</div><div class='add'>+void vlv_compute_dpll(struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;dpll = vlv_dpll(crtc_state);</div><div class='add'>+	hw_state-&gt;dpll_md = i965_dpll_md(crtc_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 chv_dpll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='add'>+	u32 dpll;</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll = DPLL_SSC_REF_CLK_CHV |</div><div class='add'>+	dpll = DPLL_SSC_REF_CLK_CHV |</div><div class='ctx'> 		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;</div><div class='add'>+</div><div class='ctx'> 	if (crtc-&gt;pipe != PIPE_A)</div><div class='del'>-		crtc_state-&gt;dpll_hw_state.dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;</div><div class='add'>+		dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;</div><div class='ctx'> </div><div class='ctx'> 	/* DPLL not used with DSI, but still need the rest set up */</div><div class='ctx'> 	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))</div><div class='del'>-		crtc_state-&gt;dpll_hw_state.dpll |= DPLL_VCO_ENABLE;</div><div class='add'>+		dpll |= DPLL_VCO_ENABLE;</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.dpll_md =</div><div class='del'>-		(crtc_state-&gt;pixel_multiplier - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT;</div><div class='add'>+	return dpll;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void chv_compute_dpll(struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;dpll = chv_dpll(crtc_state);</div><div class='add'>+	hw_state-&gt;dpll_md = i965_dpll_md(crtc_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int chv_crtc_compute_clock(struct intel_atomic_state *state,</div><div class='hunk'>@@ -1765,7 +1824,7 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	u32 dpll = crtc_state-&gt;dpll_hw_state.dpll;</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1775,157 +1834,152 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	if (i9xx_has_pps(dev_priv))</div><div class='ctx'> 		assert_pps_unlocked(dev_priv, pipe);</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, FP0(pipe), crtc_state-&gt;dpll_hw_state.fp0);</div><div class='del'>-	intel_de_write(dev_priv, FP1(pipe), crtc_state-&gt;dpll_hw_state.fp1);</div><div class='add'>+	intel_de_write(dev_priv, FP0(pipe), hw_state-&gt;fp0);</div><div class='add'>+	intel_de_write(dev_priv, FP1(pipe), hw_state-&gt;fp1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Apparently we need to have VGA mode enabled prior to changing</div><div class='ctx'> 	 * the P1/P2 dividers. Otherwise the DPLL will keep using the old</div><div class='ctx'> 	 * dividers, even though the register value does change.</div><div class='ctx'> 	 */</div><div class='del'>-	intel_de_write(dev_priv, DPLL(pipe), dpll &amp; ~DPLL_VGA_MODE_DIS);</div><div class='del'>-	intel_de_write(dev_priv, DPLL(pipe), dpll);</div><div class='add'>+	intel_de_write(dev_priv, DPLL(pipe), hw_state-&gt;dpll &amp; ~DPLL_VGA_MODE_DIS);</div><div class='add'>+	intel_de_write(dev_priv, DPLL(pipe), hw_state-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	intel_de_posting_read(dev_priv, DPLL(pipe));</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 4) {</div><div class='del'>-		intel_de_write(dev_priv, DPLL_MD(pipe),</div><div class='del'>-			       crtc_state-&gt;dpll_hw_state.dpll_md);</div><div class='add'>+		intel_de_write(dev_priv, DPLL_MD(pipe), hw_state-&gt;dpll_md);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* The pixel multiplier can only be updated once the</div><div class='ctx'> 		 * DPLL is enabled and the clocks are stable.</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * So write it again.</div><div class='ctx'> 		 */</div><div class='del'>-		intel_de_write(dev_priv, DPLL(pipe), dpll);</div><div class='add'>+		intel_de_write(dev_priv, DPLL(pipe), hw_state-&gt;dpll);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* We do this three times for luck */</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		intel_de_write(dev_priv, DPLL(pipe), dpll);</div><div class='add'>+		intel_de_write(dev_priv, DPLL(pipe), hw_state-&gt;dpll);</div><div class='ctx'> 		intel_de_posting_read(dev_priv, DPLL(pipe));</div><div class='ctx'> 		udelay(150); /* wait for warmup */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv,</div><div class='del'>-				 enum dpio_phy phy)</div><div class='add'>+				 enum dpio_phy phy, enum dpio_channel ch)</div><div class='ctx'> {</div><div class='del'>-	u32 reg_val;</div><div class='add'>+	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * PLLB opamp always calibrates to max value of 0x3f, force enable it</div><div class='ctx'> 	 * and set it to a reasonable value instead.</div><div class='ctx'> 	 */</div><div class='del'>-	reg_val = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW9(1));</div><div class='del'>-	reg_val &amp;= 0xffffff00;</div><div class='del'>-	reg_val |= 0x00000030;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW9(1), reg_val);</div><div class='del'>-</div><div class='del'>-	reg_val = vlv_dpio_read(dev_priv, phy, VLV_REF_DW13);</div><div class='del'>-	reg_val &amp;= 0x00ffffff;</div><div class='del'>-	reg_val |= 0x8c000000;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_REF_DW13, reg_val);</div><div class='del'>-</div><div class='del'>-	reg_val = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW9(1));</div><div class='del'>-	reg_val &amp;= 0xffffff00;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW9(1), reg_val);</div><div class='del'>-</div><div class='del'>-	reg_val = vlv_dpio_read(dev_priv, phy, VLV_REF_DW13);</div><div class='del'>-	reg_val &amp;= 0x00ffffff;</div><div class='del'>-	reg_val |= 0xb0000000;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_REF_DW13, reg_val);</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW17(ch));</div><div class='add'>+	tmp &amp;= 0xffffff00;</div><div class='add'>+	tmp |= 0x00000030;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW17(ch), tmp);</div><div class='add'>+</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, VLV_REF_DW11);</div><div class='add'>+	tmp &amp;= 0x00ffffff;</div><div class='add'>+	tmp |= 0x8c000000;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_REF_DW11, tmp);</div><div class='add'>+</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW17(ch));</div><div class='add'>+	tmp &amp;= 0xffffff00;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW17(ch), tmp);</div><div class='add'>+</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, VLV_REF_DW11);</div><div class='add'>+	tmp &amp;= 0x00ffffff;</div><div class='add'>+	tmp |= 0xb0000000;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_REF_DW11, tmp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vlv_prepare_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const struct dpll *clock = &amp;crtc_state-&gt;dpll;</div><div class='add'>+	enum dpio_channel ch = vlv_pipe_to_channel(crtc-&gt;pipe);</div><div class='ctx'> 	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='del'>-	u32 mdiv;</div><div class='del'>-	u32 bestn, bestm1, bestm2, bestp1, bestp2;</div><div class='del'>-	u32 coreclk, reg_val;</div><div class='add'>+	u32 tmp, coreclk;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='del'>-	bestn = crtc_state-&gt;dpll.n;</div><div class='del'>-	bestm1 = crtc_state-&gt;dpll.m1;</div><div class='del'>-	bestm2 = crtc_state-&gt;dpll.m2;</div><div class='del'>-	bestp1 = crtc_state-&gt;dpll.p1;</div><div class='del'>-	bestp2 = crtc_state-&gt;dpll.p2;</div><div class='del'>-</div><div class='ctx'> 	/* See eDP HDMI DPIO driver vbios notes doc */</div><div class='ctx'> </div><div class='ctx'> 	/* PLL B needs special handling */</div><div class='ctx'> 	if (pipe == PIPE_B)</div><div class='del'>-		vlv_pllb_recal_opamp(dev_priv, phy);</div><div class='add'>+		vlv_pllb_recal_opamp(dev_priv, phy, ch);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up Tx target for periodic Rcomp update */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW9_BCAST, 0x0100000f);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PCS_DW17_BCAST, 0x0100000f);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable target IRef on PLL */</div><div class='del'>-	reg_val = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW8(pipe));</div><div class='del'>-	reg_val &amp;= 0x00ffffff;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW8(pipe), reg_val);</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW16(ch));</div><div class='add'>+	tmp &amp;= 0x00ffffff;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW16(ch), tmp);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable fast lock */</div><div class='ctx'> 	vlv_dpio_write(dev_priv, phy, VLV_CMN_DW0, 0x610);</div><div class='ctx'> </div><div class='ctx'> 	/* Set idtafcrecal before PLL is enabled */</div><div class='del'>-	mdiv = ((bestm1 &lt;&lt; DPIO_M1DIV_SHIFT) | (bestm2 &amp; DPIO_M2DIV_MASK));</div><div class='del'>-	mdiv |= ((bestp1 &lt;&lt; DPIO_P1_SHIFT) | (bestp2 &lt;&lt; DPIO_P2_SHIFT));</div><div class='del'>-	mdiv |= ((bestn &lt;&lt; DPIO_N_SHIFT));</div><div class='del'>-	mdiv |= (1 &lt;&lt; DPIO_K_SHIFT);</div><div class='add'>+	tmp = DPIO_M1_DIV(clock-&gt;m1) |</div><div class='add'>+		DPIO_M2_DIV(clock-&gt;m2) |</div><div class='add'>+		DPIO_P1_DIV(clock-&gt;p1) |</div><div class='add'>+		DPIO_P2_DIV(clock-&gt;p2) |</div><div class='add'>+		DPIO_N_DIV(clock-&gt;n) |</div><div class='add'>+		DPIO_K_DIV(1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Post divider depends on pixel clock rate, DAC vs digital (and LVDS,</div><div class='ctx'> 	 * but we don't support that).</div><div class='ctx'> 	 * Note: don't use the DAC post divider as it seems unstable.</div><div class='ctx'> 	 */</div><div class='del'>-	mdiv |= (DPIO_POST_DIV_HDMIDP &lt;&lt; DPIO_POST_DIV_SHIFT);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW3(pipe), mdiv);</div><div class='add'>+	tmp |= DPIO_S1_DIV(DPIO_S1_DIV_HDMIDP);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW3(ch), tmp);</div><div class='ctx'> </div><div class='del'>-	mdiv |= DPIO_ENABLE_CALIBRATION;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW3(pipe), mdiv);</div><div class='add'>+	tmp |= DPIO_ENABLE_CALIBRATION;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW3(ch), tmp);</div><div class='ctx'> </div><div class='ctx'> 	/* Set HBR and RBR LPF coefficients */</div><div class='ctx'> 	if (crtc_state-&gt;port_clock == 162000 ||</div><div class='ctx'> 	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG) ||</div><div class='ctx'> 	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, VLV_PLL_DW10(pipe),</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, VLV_PLL_DW18(ch),</div><div class='ctx'> 				 0x009f0003);</div><div class='ctx'> 	else</div><div class='del'>-		vlv_dpio_write(dev_priv, phy, VLV_PLL_DW10(pipe),</div><div class='add'>+		vlv_dpio_write(dev_priv, phy, VLV_PLL_DW18(ch),</div><div class='ctx'> 				 0x00d0000f);</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc_has_dp_encoder(crtc_state)) {</div><div class='ctx'> 		/* Use SSC source */</div><div class='ctx'> 		if (pipe == PIPE_A)</div><div class='del'>-			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),</div><div class='add'>+			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch),</div><div class='ctx'> 					 0x0df40000);</div><div class='ctx'> 		else</div><div class='del'>-			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),</div><div class='add'>+			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch),</div><div class='ctx'> 					 0x0df70000);</div><div class='ctx'> 	} else { /* HDMI or VGA */</div><div class='ctx'> 		/* Use bend source */</div><div class='ctx'> 		if (pipe == PIPE_A)</div><div class='del'>-			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),</div><div class='add'>+			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch),</div><div class='ctx'> 					 0x0df70000);</div><div class='ctx'> 		else</div><div class='del'>-			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),</div><div class='add'>+			vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch),</div><div class='ctx'> 					 0x0df40000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	coreclk = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW7(pipe));</div><div class='add'>+	coreclk = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW7(ch));</div><div class='ctx'> 	coreclk = (coreclk &amp; 0x0000ff00) | 0x01c00000;</div><div class='ctx'> 	if (intel_crtc_has_dp_encoder(crtc_state))</div><div class='ctx'> 		coreclk |= 0x01000000;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW7(pipe), coreclk);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW7(ch), coreclk);</div><div class='ctx'> </div><div class='del'>-	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW11(pipe), 0x87871000);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, VLV_PLL_DW19(ch), 0x87871000);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='hunk'>@@ -1934,9 +1988,10 @@ static void _vlv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, DPLL(pipe), crtc_state-&gt;dpll_hw_state.dpll);</div><div class='add'>+	intel_de_write(dev_priv, DPLL(pipe), hw_state-&gt;dpll);</div><div class='ctx'> 	intel_de_posting_read(dev_priv, DPLL(pipe));</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='hunk'>@@ -1948,6 +2003,7 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='ctx'> 	assert_transcoder_disabled(dev_priv, crtc_state-&gt;cpu_transcoder);</div><div class='hunk'>@@ -1957,16 +2013,14 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Refclk */</div><div class='ctx'> 	intel_de_write(dev_priv, DPLL(pipe),</div><div class='del'>-		       crtc_state-&gt;dpll_hw_state.dpll &amp;</div><div class='del'>-		       ~(DPLL_VCO_ENABLE | DPLL_EXT_BUFFER_ENABLE_VLV));</div><div class='add'>+		       hw_state-&gt;dpll &amp; ~(DPLL_VCO_ENABLE | DPLL_EXT_BUFFER_ENABLE_VLV));</div><div class='ctx'> </div><div class='del'>-	if (crtc_state-&gt;dpll_hw_state.dpll &amp; DPLL_VCO_ENABLE) {</div><div class='add'>+	if (hw_state-&gt;dpll &amp; DPLL_VCO_ENABLE) {</div><div class='ctx'> 		vlv_prepare_pll(crtc_state);</div><div class='ctx'> 		_vlv_enable_pll(crtc_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, DPLL_MD(pipe),</div><div class='del'>-		       crtc_state-&gt;dpll_hw_state.dpll_md);</div><div class='add'>+	intel_de_write(dev_priv, DPLL_MD(pipe), hw_state-&gt;dpll_md);</div><div class='ctx'> 	intel_de_posting_read(dev_priv, DPLL_MD(pipe));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1974,93 +2028,87 @@ static void chv_prepare_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	enum pipe pipe = crtc-&gt;pipe;</div><div class='del'>-	enum dpio_channel port = vlv_pipe_to_channel(pipe);</div><div class='add'>+	const struct dpll *clock = &amp;crtc_state-&gt;dpll;</div><div class='add'>+	enum dpio_channel ch = vlv_pipe_to_channel(crtc-&gt;pipe);</div><div class='ctx'> 	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='del'>-	u32 loopfilter, tribuf_calcntr;</div><div class='del'>-	u32 bestm2, bestp1, bestp2, bestm2_frac;</div><div class='del'>-	u32 dpio_val;</div><div class='del'>-	int vco;</div><div class='del'>-</div><div class='del'>-	bestm2_frac = crtc_state-&gt;dpll.m2 &amp; 0x3fffff;</div><div class='del'>-	bestm2 = crtc_state-&gt;dpll.m2 &gt;&gt; 22;</div><div class='del'>-	bestp1 = crtc_state-&gt;dpll.p1;</div><div class='del'>-	bestp2 = crtc_state-&gt;dpll.p2;</div><div class='del'>-	vco = crtc_state-&gt;dpll.vco;</div><div class='del'>-	dpio_val = 0;</div><div class='del'>-	loopfilter = 0;</div><div class='add'>+	u32 tmp, loopfilter, tribuf_calcntr;</div><div class='add'>+	u32 m2_frac;</div><div class='add'>+</div><div class='add'>+	m2_frac = clock-&gt;m2 &amp; 0x3fffff;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	/* p1 and p2 divider */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW13(port),</div><div class='del'>-			5 &lt;&lt; DPIO_CHV_S1_DIV_SHIFT |</div><div class='del'>-			bestp1 &lt;&lt; DPIO_CHV_P1_DIV_SHIFT |</div><div class='del'>-			bestp2 &lt;&lt; DPIO_CHV_P2_DIV_SHIFT |</div><div class='del'>-			1 &lt;&lt; DPIO_CHV_K_DIV_SHIFT);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW13(ch),</div><div class='add'>+		       DPIO_CHV_S1_DIV(5) |</div><div class='add'>+		       DPIO_CHV_P1_DIV(clock-&gt;p1) |</div><div class='add'>+		       DPIO_CHV_P2_DIV(clock-&gt;p2) |</div><div class='add'>+		       DPIO_CHV_K_DIV(1));</div><div class='ctx'> </div><div class='ctx'> 	/* Feedback post-divider - m2 */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW0(port), bestm2);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW0(ch),</div><div class='add'>+		       DPIO_CHV_M2_DIV(clock-&gt;m2 &gt;&gt; 22));</div><div class='ctx'> </div><div class='ctx'> 	/* Feedback refclk divider - n and m1 */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW1(port),</div><div class='del'>-			DPIO_CHV_M1_DIV_BY_2 |</div><div class='del'>-			1 &lt;&lt; DPIO_CHV_N_DIV_SHIFT);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW1(ch),</div><div class='add'>+		       DPIO_CHV_M1_DIV(DPIO_CHV_M1_DIV_BY_2) |</div><div class='add'>+		       DPIO_CHV_N_DIV(1));</div><div class='ctx'> </div><div class='ctx'> 	/* M2 fraction division */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW2(port), bestm2_frac);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW2(ch),</div><div class='add'>+		       DPIO_CHV_M2_FRAC_DIV(m2_frac));</div><div class='ctx'> </div><div class='ctx'> 	/* M2 fraction division enable */</div><div class='del'>-	dpio_val = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW3(port));</div><div class='del'>-	dpio_val &amp;= ~(DPIO_CHV_FEEDFWD_GAIN_MASK | DPIO_CHV_FRAC_DIV_EN);</div><div class='del'>-	dpio_val |= (2 &lt;&lt; DPIO_CHV_FEEDFWD_GAIN_SHIFT);</div><div class='del'>-	if (bestm2_frac)</div><div class='del'>-		dpio_val |= DPIO_CHV_FRAC_DIV_EN;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW3(port), dpio_val);</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW3(ch));</div><div class='add'>+	tmp &amp;= ~(DPIO_CHV_FEEDFWD_GAIN_MASK | DPIO_CHV_FRAC_DIV_EN);</div><div class='add'>+	tmp |= DPIO_CHV_FEEDFWD_GAIN(2);</div><div class='add'>+	if (m2_frac)</div><div class='add'>+		tmp |= DPIO_CHV_FRAC_DIV_EN;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW3(ch), tmp);</div><div class='ctx'> </div><div class='ctx'> 	/* Program digital lock detect threshold */</div><div class='del'>-	dpio_val = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW9(port));</div><div class='del'>-	dpio_val &amp;= ~(DPIO_CHV_INT_LOCK_THRESHOLD_MASK |</div><div class='del'>-					DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE);</div><div class='del'>-	dpio_val |= (0x5 &lt;&lt; DPIO_CHV_INT_LOCK_THRESHOLD_SHIFT);</div><div class='del'>-	if (!bestm2_frac)</div><div class='del'>-		dpio_val |= DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW9(port), dpio_val);</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW9(ch));</div><div class='add'>+	tmp &amp;= ~(DPIO_CHV_INT_LOCK_THRESHOLD_MASK |</div><div class='add'>+		      DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE);</div><div class='add'>+	tmp |= DPIO_CHV_INT_LOCK_THRESHOLD(0x5);</div><div class='add'>+	if (!m2_frac)</div><div class='add'>+		tmp |= DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE;</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW9(ch), tmp);</div><div class='ctx'> </div><div class='ctx'> 	/* Loop filter */</div><div class='del'>-	if (vco == 5400000) {</div><div class='del'>-		loopfilter |= (0x3 &lt;&lt; DPIO_CHV_PROP_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x8 &lt;&lt; DPIO_CHV_INT_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x1 &lt;&lt; DPIO_CHV_GAIN_CTRL_SHIFT);</div><div class='add'>+	if (clock-&gt;vco == 5400000) {</div><div class='add'>+		loopfilter = DPIO_CHV_PROP_COEFF(0x3) |</div><div class='add'>+			DPIO_CHV_INT_COEFF(0x8) |</div><div class='add'>+			DPIO_CHV_GAIN_CTRL(0x1);</div><div class='ctx'> 		tribuf_calcntr = 0x9;</div><div class='del'>-	} else if (vco &lt;= 6200000) {</div><div class='del'>-		loopfilter |= (0x5 &lt;&lt; DPIO_CHV_PROP_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0xB &lt;&lt; DPIO_CHV_INT_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x3 &lt;&lt; DPIO_CHV_GAIN_CTRL_SHIFT);</div><div class='add'>+	} else if (clock-&gt;vco &lt;= 6200000) {</div><div class='add'>+		loopfilter = DPIO_CHV_PROP_COEFF(0x5) |</div><div class='add'>+			DPIO_CHV_INT_COEFF(0xB) |</div><div class='add'>+			DPIO_CHV_GAIN_CTRL(0x3);</div><div class='ctx'> 		tribuf_calcntr = 0x9;</div><div class='del'>-	} else if (vco &lt;= 6480000) {</div><div class='del'>-		loopfilter |= (0x4 &lt;&lt; DPIO_CHV_PROP_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x9 &lt;&lt; DPIO_CHV_INT_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x3 &lt;&lt; DPIO_CHV_GAIN_CTRL_SHIFT);</div><div class='add'>+	} else if (clock-&gt;vco &lt;= 6480000) {</div><div class='add'>+		loopfilter = DPIO_CHV_PROP_COEFF(0x4) |</div><div class='add'>+			DPIO_CHV_INT_COEFF(0x9) |</div><div class='add'>+			DPIO_CHV_GAIN_CTRL(0x3);</div><div class='ctx'> 		tribuf_calcntr = 0x8;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Not supported. Apply the same limits as in the max case */</div><div class='del'>-		loopfilter |= (0x4 &lt;&lt; DPIO_CHV_PROP_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x9 &lt;&lt; DPIO_CHV_INT_COEFF_SHIFT);</div><div class='del'>-		loopfilter |= (0x3 &lt;&lt; DPIO_CHV_GAIN_CTRL_SHIFT);</div><div class='add'>+		loopfilter = DPIO_CHV_PROP_COEFF(0x4) |</div><div class='add'>+			DPIO_CHV_INT_COEFF(0x9) |</div><div class='add'>+			DPIO_CHV_GAIN_CTRL(0x3);</div><div class='ctx'> 		tribuf_calcntr = 0;</div><div class='ctx'> 	}</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW6(port), loopfilter);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW6(ch), loopfilter);</div><div class='ctx'> </div><div class='del'>-	dpio_val = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW8(port));</div><div class='del'>-	dpio_val &amp;= ~DPIO_CHV_TDC_TARGET_CNT_MASK;</div><div class='del'>-	dpio_val |= (tribuf_calcntr &lt;&lt; DPIO_CHV_TDC_TARGET_CNT_SHIFT);</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW8(port), dpio_val);</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW8(ch));</div><div class='add'>+	tmp &amp;= ~DPIO_CHV_TDC_TARGET_CNT_MASK;</div><div class='add'>+	tmp |= DPIO_CHV_TDC_TARGET_CNT(tribuf_calcntr);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_PLL_DW8(ch), tmp);</div><div class='ctx'> </div><div class='ctx'> 	/* AFC Recal */</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(port),</div><div class='del'>-			vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(port)) |</div><div class='del'>-			DPIO_AFC_RECAL);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(ch),</div><div class='add'>+		       vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(ch)) |</div><div class='add'>+		       DPIO_AFC_RECAL);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='hunk'>@@ -2069,17 +2117,18 @@ static void _chv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='del'>-	enum pipe pipe = crtc-&gt;pipe;</div><div class='del'>-	enum dpio_channel port = vlv_pipe_to_channel(pipe);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='add'>+	enum dpio_channel ch = vlv_pipe_to_channel(crtc-&gt;pipe);</div><div class='ctx'> 	enum dpio_phy phy = vlv_pipe_to_phy(crtc-&gt;pipe);</div><div class='add'>+	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable back the 10bit clock to display controller */</div><div class='del'>-	tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(port));</div><div class='add'>+	tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(ch));</div><div class='ctx'> 	tmp |= DPIO_DCLKP_EN;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(port), tmp);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(ch), tmp);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> </div><div class='hunk'>@@ -2089,7 +2138,7 @@ static void _chv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable PLL */</div><div class='del'>-	intel_de_write(dev_priv, DPLL(pipe), crtc_state-&gt;dpll_hw_state.dpll);</div><div class='add'>+	intel_de_write(dev_priv, DPLL(pipe), hw_state-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 	/* Check PLL is locked */</div><div class='ctx'> 	if (intel_de_wait_for_set(dev_priv, DPLL(pipe), DPLL_LOCK_VLV, 1))</div><div class='hunk'>@@ -2100,6 +2149,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.i9xx;</div><div class='ctx'> 	enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='ctx'> 	assert_transcoder_disabled(dev_priv, crtc_state-&gt;cpu_transcoder);</div><div class='hunk'>@@ -2109,9 +2159,9 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Refclk and SSC */</div><div class='ctx'> 	intel_de_write(dev_priv, DPLL(pipe),</div><div class='del'>-		       crtc_state-&gt;dpll_hw_state.dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+		       hw_state-&gt;dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='ctx'> </div><div class='del'>-	if (crtc_state-&gt;dpll_hw_state.dpll &amp; DPLL_VCO_ENABLE) {</div><div class='add'>+	if (hw_state-&gt;dpll &amp; DPLL_VCO_ENABLE) {</div><div class='ctx'> 		chv_prepare_pll(crtc_state);</div><div class='ctx'> 		_chv_enable_pll(crtc_state);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2124,10 +2174,9 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 		 * the value from DPLLBMD to either pipe B or C.</div><div class='ctx'> 		 */</div><div class='ctx'> 		intel_de_write(dev_priv, CBR4_VLV, CBR_DPLLBMD_PIPE(pipe));</div><div class='del'>-		intel_de_write(dev_priv, DPLL_MD(PIPE_B),</div><div class='del'>-			       crtc_state-&gt;dpll_hw_state.dpll_md);</div><div class='add'>+		intel_de_write(dev_priv, DPLL_MD(PIPE_B), hw_state-&gt;dpll_md);</div><div class='ctx'> 		intel_de_write(dev_priv, CBR4_VLV, 0);</div><div class='del'>-		dev_priv-&gt;display.state.chv_dpll_md[pipe] = crtc_state-&gt;dpll_hw_state.dpll_md;</div><div class='add'>+		dev_priv-&gt;display.state.chv_dpll_md[pipe] = hw_state-&gt;dpll_md;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * DPLLB VGA mode also seems to cause problems.</div><div class='hunk'>@@ -2137,8 +2186,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 			    (intel_de_read(dev_priv, DPLL(PIPE_B)) &amp;</div><div class='ctx'> 			     DPLL_VGA_MODE_DIS) == 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		intel_de_write(dev_priv, DPLL_MD(pipe),</div><div class='del'>-			       crtc_state-&gt;dpll_hw_state.dpll_md);</div><div class='add'>+		intel_de_write(dev_priv, DPLL_MD(pipe), hw_state-&gt;dpll_md);</div><div class='ctx'> 		intel_de_posting_read(dev_priv, DPLL_MD(pipe));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2199,7 +2247,7 @@ void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)</div><div class='ctx'> </div><div class='ctx'> void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)</div><div class='ctx'> {</div><div class='del'>-	enum dpio_channel port = vlv_pipe_to_channel(pipe);</div><div class='add'>+	enum dpio_channel ch = vlv_pipe_to_channel(pipe);</div><div class='ctx'> 	enum dpio_phy phy = vlv_pipe_to_phy(pipe);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -2217,9 +2265,9 @@ void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)</div><div class='ctx'> 	vlv_dpio_get(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable 10bit clock to display controller */</div><div class='del'>-	val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(port));</div><div class='add'>+	val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(ch));</div><div class='ctx'> 	val &amp;= ~DPIO_DCLKP_EN;</div><div class='del'>-	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(port), val);</div><div class='add'>+	vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(ch), val);</div><div class='ctx'> </div><div class='ctx'> 	vlv_dpio_put(dev_priv);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dpll.h b/drivers/gpu/drm/i915/display/intel_dpll.h<br/>index ac01bb19cc6c..a86a79408af0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dpll.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@ struct drm_i915_private;</div><div class='ctx'> struct intel_atomic_state;</div><div class='ctx'> struct intel_crtc;</div><div class='ctx'> struct intel_crtc_state;</div><div class='add'>+struct intel_dpll_hw_state;</div><div class='ctx'> enum pipe;</div><div class='ctx'> </div><div class='ctx'> void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);</div><div class='hunk'>@@ -22,6 +23,8 @@ int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 				    struct intel_crtc *crtc);</div><div class='ctx'> int i9xx_calc_dpll_params(int refclk, struct dpll *clock);</div><div class='ctx'> u32 i9xx_dpll_compute_fp(const struct dpll *dpll);</div><div class='add'>+void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,</div><div class='add'>+			    struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> void vlv_compute_dpll(struct intel_crtc_state *crtc_state);</div><div class='ctx'> void chv_compute_dpll(struct intel_crtc_state *crtc_state);</div><div class='ctx'> </div><div class='hunk'>@@ -39,12 +42,9 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			struct dpll *best_clock);</div><div class='ctx'> int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);</div><div class='ctx'> </div><div class='del'>-void i9xx_crtc_clock_get(struct intel_crtc *crtc,</div><div class='del'>-			 struct intel_crtc_state *pipe_config);</div><div class='del'>-void vlv_crtc_clock_get(struct intel_crtc *crtc,</div><div class='del'>-			struct intel_crtc_state *pipe_config);</div><div class='del'>-void chv_crtc_clock_get(struct intel_crtc *crtc,</div><div class='del'>-			struct intel_crtc_state *pipe_config);</div><div class='add'>+void i9xx_crtc_clock_get(struct intel_crtc_state *crtc_state);</div><div class='add'>+void vlv_crtc_clock_get(struct intel_crtc_state *crtc_state);</div><div class='add'>+void chv_crtc_clock_get(struct intel_crtc_state *crtc_state);</div><div class='ctx'> </div><div class='ctx'> void assert_pll_enabled(struct drm_i915_private *i915, enum pipe pipe);</div><div class='ctx'> void assert_pll_disabled(struct drm_i915_private *i915, enum pipe pipe);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c<br/>index b6d24410740f..90998b037349 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll_mgr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll_mgr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dpll_mgr.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/math.h&gt;</div><div class='ctx'> #include &lt;linux/string_helpers.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "bxt_dpio_phy_regs.h"</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> #include "intel_de.h"</div><div class='ctx'> #include "intel_display_types.h"</div><div class='hunk'>@@ -64,7 +65,8 @@ struct intel_shared_dpll_funcs {</div><div class='ctx'> 	 * the pll is not already enabled.</div><div class='ctx'> 	 */</div><div class='ctx'> 	void (*enable)(struct drm_i915_private *i915,</div><div class='del'>-		       struct intel_shared_dpll *pll);</div><div class='add'>+		       struct intel_shared_dpll *pll,</div><div class='add'>+		       const struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Hook for disabling the pll, called from intel_disable_shared_dpll()</div><div class='hunk'>@@ -81,7 +83,7 @@ struct intel_shared_dpll_funcs {</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool (*get_hw_state)(struct drm_i915_private *i915,</div><div class='ctx'> 			     struct intel_shared_dpll *pll,</div><div class='del'>-			     struct intel_dpll_hw_state *hw_state);</div><div class='add'>+			     struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Hook for calculating the pll's output frequency based on its passed</div><div class='hunk'>@@ -89,7 +91,7 @@ struct intel_shared_dpll_funcs {</div><div class='ctx'> 	 */</div><div class='ctx'> 	int (*get_freq)(struct drm_i915_private *i915,</div><div class='ctx'> 			const struct intel_shared_dpll *pll,</div><div class='del'>-			const struct intel_dpll_hw_state *pll_state);</div><div class='add'>+			const struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_dpll_mgr {</div><div class='hunk'>@@ -107,8 +109,8 @@ struct intel_dpll_mgr {</div><div class='ctx'> 				   struct intel_crtc *crtc,</div><div class='ctx'> 				   struct intel_encoder *encoder);</div><div class='ctx'> 	void (*update_ref_clks)(struct drm_i915_private *i915);</div><div class='del'>-	void (*dump_hw_state)(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state);</div><div class='add'>+	void (*dump_hw_state)(struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> 	bool (*compare_hw_state)(const struct intel_dpll_hw_state *a,</div><div class='ctx'> 				 const struct intel_dpll_hw_state *b);</div><div class='ctx'> };</div><div class='hunk'>@@ -227,7 +229,7 @@ static void _intel_enable_shared_dpll(struct drm_i915_private *i915,</div><div class='ctx'> 	if (pll-&gt;info-&gt;power_domain)</div><div class='ctx'> 		pll-&gt;wakeref = intel_display_power_get(i915, pll-&gt;info-&gt;power_domain);</div><div class='ctx'> </div><div class='del'>-	pll-&gt;info-&gt;funcs-&gt;enable(i915, pll);</div><div class='add'>+	pll-&gt;info-&gt;funcs-&gt;enable(i915, pll, &amp;pll-&gt;state.hw_state);</div><div class='ctx'> 	pll-&gt;on = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -352,7 +354,7 @@ intel_dpll_mask_all(struct drm_i915_private *i915)</div><div class='ctx'> static struct intel_shared_dpll *</div><div class='ctx'> intel_find_shared_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 		       const struct intel_crtc *crtc,</div><div class='del'>-		       const struct intel_dpll_hw_state *pll_state,</div><div class='add'>+		       const struct intel_dpll_hw_state *dpll_hw_state,</div><div class='ctx'> 		       unsigned long dpll_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='hunk'>@@ -379,9 +381,9 @@ intel_find_shared_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (memcmp(pll_state,</div><div class='add'>+		if (memcmp(dpll_hw_state,</div><div class='ctx'> 			   &amp;shared_dpll[pll-&gt;index].hw_state,</div><div class='del'>-			   sizeof(*pll_state)) == 0) {</div><div class='add'>+			   sizeof(*dpll_hw_state)) == 0) {</div><div class='ctx'> 			drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 				    "[CRTC:%d:%s] sharing existing %s (pipe mask 0x%x, active 0x%x)\n",</div><div class='ctx'> 				    crtc-&gt;base.base.id, crtc-&gt;base.name,</div><div class='hunk'>@@ -430,14 +432,14 @@ static void</div><div class='ctx'> intel_reference_shared_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 			    const struct intel_crtc *crtc,</div><div class='ctx'> 			    const struct intel_shared_dpll *pll,</div><div class='del'>-			    const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+			    const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_shared_dpll_state *shared_dpll;</div><div class='ctx'> </div><div class='ctx'> 	shared_dpll = intel_atomic_get_shared_dpll_state(&amp;state-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	if (shared_dpll[pll-&gt;index].pipe_mask == 0)</div><div class='del'>-		shared_dpll[pll-&gt;index].hw_state = *pll_state;</div><div class='add'>+		shared_dpll[pll-&gt;index].hw_state = *dpll_hw_state;</div><div class='ctx'> </div><div class='ctx'> 	intel_reference_shared_dpll_crtc(crtc, pll, &amp;shared_dpll[pll-&gt;index]);</div><div class='ctx'> }</div><div class='hunk'>@@ -519,8 +521,9 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)</div><div class='ctx'> </div><div class='ctx'> static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				      struct intel_shared_dpll *pll,</div><div class='del'>-				      struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				      struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct i9xx_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;i9xx;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -553,17 +556,19 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *i915)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ibx_pch_dpll_enable(struct drm_i915_private *i915,</div><div class='del'>-				struct intel_shared_dpll *pll)</div><div class='add'>+				struct intel_shared_dpll *pll,</div><div class='add'>+				const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;i9xx;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	/* PCH refclock must be enabled first */</div><div class='ctx'> 	ibx_assert_pch_refclk_enabled(i915);</div><div class='ctx'> </div><div class='del'>-	intel_de_write(i915, PCH_FP0(id), pll-&gt;state.hw_state.fp0);</div><div class='del'>-	intel_de_write(i915, PCH_FP1(id), pll-&gt;state.hw_state.fp1);</div><div class='add'>+	intel_de_write(i915, PCH_FP0(id), hw_state-&gt;fp0);</div><div class='add'>+	intel_de_write(i915, PCH_FP1(id), hw_state-&gt;fp1);</div><div class='ctx'> </div><div class='del'>-	intel_de_write(i915, PCH_DPLL(id), pll-&gt;state.hw_state.dpll);</div><div class='add'>+	intel_de_write(i915, PCH_DPLL(id), hw_state-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	intel_de_posting_read(i915, PCH_DPLL(id));</div><div class='hunk'>@@ -574,7 +579,7 @@ static void ibx_pch_dpll_enable(struct drm_i915_private *i915,</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * So write it again.</div><div class='ctx'> 	 */</div><div class='del'>-	intel_de_write(i915, PCH_DPLL(id), pll-&gt;state.hw_state.dpll);</div><div class='add'>+	intel_de_write(i915, PCH_DPLL(id), hw_state-&gt;dpll);</div><div class='ctx'> 	intel_de_posting_read(i915, PCH_DPLL(id));</div><div class='ctx'> 	udelay(200);</div><div class='ctx'> }</div><div class='hunk'>@@ -634,21 +639,25 @@ static int ibx_get_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ibx_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state)</div><div class='add'>+static void ibx_dump_hw_state(struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "</div><div class='del'>-		    "fp0: 0x%x, fp1: 0x%x\n",</div><div class='del'>-		    hw_state-&gt;dpll,</div><div class='del'>-		    hw_state-&gt;dpll_md,</div><div class='del'>-		    hw_state-&gt;fp0,</div><div class='del'>-		    hw_state-&gt;fp1);</div><div class='add'>+	const struct i9xx_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;i9xx;</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "</div><div class='add'>+		   "fp0: 0x%x, fp1: 0x%x\n",</div><div class='add'>+		   hw_state-&gt;dpll,</div><div class='add'>+		   hw_state-&gt;dpll_md,</div><div class='add'>+		   hw_state-&gt;fp0,</div><div class='add'>+		   hw_state-&gt;fp1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ibx_compare_hw_state(const struct intel_dpll_hw_state *a,</div><div class='del'>-				 const struct intel_dpll_hw_state *b)</div><div class='add'>+static bool ibx_compare_hw_state(const struct intel_dpll_hw_state *_a,</div><div class='add'>+				 const struct intel_dpll_hw_state *_b)</div><div class='ctx'> {</div><div class='add'>+	const struct i9xx_dpll_hw_state *a = &amp;_a-&gt;i9xx;</div><div class='add'>+	const struct i9xx_dpll_hw_state *b = &amp;_b-&gt;i9xx;</div><div class='add'>+</div><div class='ctx'> 	return a-&gt;dpll == b-&gt;dpll &amp;&amp;</div><div class='ctx'> 		a-&gt;dpll_md == b-&gt;dpll_md &amp;&amp;</div><div class='ctx'> 		a-&gt;fp0 == b-&gt;fp0 &amp;&amp;</div><div class='hunk'>@@ -677,19 +686,24 @@ static const struct intel_dpll_mgr pch_pll_mgr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void hsw_ddi_wrpll_enable(struct drm_i915_private *i915,</div><div class='del'>-				 struct intel_shared_dpll *pll)</div><div class='add'>+				 struct intel_shared_dpll *pll,</div><div class='add'>+				 const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> </div><div class='del'>-	intel_de_write(i915, WRPLL_CTL(id), pll-&gt;state.hw_state.wrpll);</div><div class='add'>+	intel_de_write(i915, WRPLL_CTL(id), hw_state-&gt;wrpll);</div><div class='ctx'> 	intel_de_posting_read(i915, WRPLL_CTL(id));</div><div class='ctx'> 	udelay(20);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hsw_ddi_spll_enable(struct drm_i915_private *i915,</div><div class='del'>-				struct intel_shared_dpll *pll)</div><div class='add'>+				struct intel_shared_dpll *pll,</div><div class='add'>+				const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	intel_de_write(i915, SPLL_CTL, pll-&gt;state.hw_state.spll);</div><div class='add'>+	const struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='add'>+</div><div class='add'>+	intel_de_write(i915, SPLL_CTL, hw_state-&gt;spll);</div><div class='ctx'> 	intel_de_posting_read(i915, SPLL_CTL);</div><div class='ctx'> 	udelay(20);</div><div class='ctx'> }</div><div class='hunk'>@@ -728,8 +742,9 @@ static void hsw_ddi_spll_disable(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> static bool hsw_ddi_wrpll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				       struct intel_shared_dpll *pll,</div><div class='del'>-				       struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				       struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -749,8 +764,9 @@ static bool hsw_ddi_wrpll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> static bool hsw_ddi_spll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				      struct intel_shared_dpll *pll,</div><div class='del'>-				      struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				      struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -975,11 +991,12 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,</div><div class='ctx'> </div><div class='ctx'> static int hsw_ddi_wrpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				  const struct intel_shared_dpll *pll,</div><div class='del'>-				  const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				  const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='ctx'> 	int refclk;</div><div class='ctx'> 	int n, p, r;</div><div class='del'>-	u32 wrpll = pll_state-&gt;wrpll;</div><div class='add'>+	u32 wrpll = hw_state-&gt;wrpll;</div><div class='ctx'> </div><div class='ctx'> 	switch (wrpll &amp; WRPLL_REF_MASK) {</div><div class='ctx'> 	case WRPLL_REF_SPECIAL_HSW:</div><div class='hunk'>@@ -1020,11 +1037,12 @@ hsw_ddi_wrpll_compute_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc_state *crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='add'>+	struct hsw_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.hsw;</div><div class='ctx'> 	unsigned int p, n2, r2;</div><div class='ctx'> </div><div class='ctx'> 	hsw_ddi_calculate_wrpll(crtc_state-&gt;port_clock * 1000, &amp;r2, &amp;n2, &amp;p);</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.wrpll =</div><div class='add'>+	hw_state-&gt;wrpll =</div><div class='ctx'> 		WRPLL_PLL_ENABLE | WRPLL_REF_LCPLL |</div><div class='ctx'> 		WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |</div><div class='ctx'> 		WRPLL_DIVIDER_POST(p);</div><div class='hunk'>@@ -1099,7 +1117,7 @@ hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)</div><div class='ctx'> </div><div class='ctx'> static int hsw_ddi_lcpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				  const struct intel_shared_dpll *pll,</div><div class='del'>-				  const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				  const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	int link_clock = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1127,11 +1145,12 @@ hsw_ddi_spll_compute_dpll(struct intel_atomic_state *state,</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc_state *crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='add'>+	struct hsw_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.hsw;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(crtc-&gt;base.dev, crtc_state-&gt;port_clock / 2 != 135000))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.spll =</div><div class='add'>+	hw_state-&gt;spll =</div><div class='ctx'> 		SPLL_PLL_ENABLE | SPLL_FREQ_1350MHz | SPLL_REF_MUXED_SSC;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1150,11 +1169,12 @@ hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> static int hsw_ddi_spll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				 const struct intel_shared_dpll *pll,</div><div class='del'>-				 const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				 const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='ctx'> 	int link_clock = 0;</div><div class='ctx'> </div><div class='del'>-	switch (pll_state-&gt;spll &amp; SPLL_FREQ_MASK) {</div><div class='add'>+	switch (hw_state-&gt;spll &amp; SPLL_FREQ_MASK) {</div><div class='ctx'> 	case SPLL_FREQ_810MHz:</div><div class='ctx'> 		link_clock = 81000;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1225,16 +1245,21 @@ static void hsw_update_dpll_ref_clks(struct drm_i915_private *i915)</div><div class='ctx'> 		i915-&gt;display.dpll.ref_clks.nssc = 135000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hsw_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state)</div><div class='add'>+static void hsw_dump_hw_state(struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "dpll_hw_state: wrpll: 0x%x spll: 0x%x\n",</div><div class='del'>-		    hw_state-&gt;wrpll, hw_state-&gt;spll);</div><div class='add'>+	const struct hsw_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;hsw;</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "dpll_hw_state: wrpll: 0x%x spll: 0x%x\n",</div><div class='add'>+		   hw_state-&gt;wrpll, hw_state-&gt;spll);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hsw_compare_hw_state(const struct intel_dpll_hw_state *a,</div><div class='del'>-				 const struct intel_dpll_hw_state *b)</div><div class='add'>+static bool hsw_compare_hw_state(const struct intel_dpll_hw_state *_a,</div><div class='add'>+				 const struct intel_dpll_hw_state *_b)</div><div class='ctx'> {</div><div class='add'>+	const struct hsw_dpll_hw_state *a = &amp;_a-&gt;hsw;</div><div class='add'>+	const struct hsw_dpll_hw_state *b = &amp;_b-&gt;hsw;</div><div class='add'>+</div><div class='ctx'> 	return a-&gt;wrpll == b-&gt;wrpll &amp;&amp;</div><div class='ctx'> 		a-&gt;spll == b-&gt;spll;</div><div class='ctx'> }</div><div class='hunk'>@@ -1254,7 +1279,8 @@ static const struct intel_shared_dpll_funcs hsw_ddi_spll_funcs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void hsw_ddi_lcpll_enable(struct drm_i915_private *i915,</div><div class='del'>-				 struct intel_shared_dpll *pll)</div><div class='add'>+				 struct intel_shared_dpll *pll,</div><div class='add'>+				 const struct intel_dpll_hw_state *hw_state)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1265,7 +1291,7 @@ static void hsw_ddi_lcpll_disable(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> static bool hsw_ddi_lcpll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				       struct intel_shared_dpll *pll,</div><div class='del'>-				       struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				       struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1332,26 +1358,31 @@ static const struct skl_dpll_regs skl_dpll_regs[4] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void skl_ddi_pll_write_ctrl1(struct drm_i915_private *i915,</div><div class='del'>-				    struct intel_shared_dpll *pll)</div><div class='add'>+				    struct intel_shared_dpll *pll,</div><div class='add'>+				    const struct skl_dpll_hw_state *hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(i915, DPLL_CTRL1,</div><div class='del'>-		     DPLL_CTRL1_HDMI_MODE(id) | DPLL_CTRL1_SSC(id) | DPLL_CTRL1_LINK_RATE_MASK(id),</div><div class='del'>-		     pll-&gt;state.hw_state.ctrl1 &lt;&lt; (id * 6));</div><div class='add'>+		     DPLL_CTRL1_HDMI_MODE(id) |</div><div class='add'>+		     DPLL_CTRL1_SSC(id) |</div><div class='add'>+		     DPLL_CTRL1_LINK_RATE_MASK(id),</div><div class='add'>+		     hw_state-&gt;ctrl1 &lt;&lt; (id * 6));</div><div class='ctx'> 	intel_de_posting_read(i915, DPLL_CTRL1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void skl_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='del'>-			       struct intel_shared_dpll *pll)</div><div class='add'>+			       struct intel_shared_dpll *pll,</div><div class='add'>+			       const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='ctx'> 	const struct skl_dpll_regs *regs = skl_dpll_regs;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> </div><div class='del'>-	skl_ddi_pll_write_ctrl1(i915, pll);</div><div class='add'>+	skl_ddi_pll_write_ctrl1(i915, pll, hw_state);</div><div class='ctx'> </div><div class='del'>-	intel_de_write(i915, regs[id].cfgcr1, pll-&gt;state.hw_state.cfgcr1);</div><div class='del'>-	intel_de_write(i915, regs[id].cfgcr2, pll-&gt;state.hw_state.cfgcr2);</div><div class='add'>+	intel_de_write(i915, regs[id].cfgcr1, hw_state-&gt;cfgcr1);</div><div class='add'>+	intel_de_write(i915, regs[id].cfgcr2, hw_state-&gt;cfgcr2);</div><div class='ctx'> 	intel_de_posting_read(i915, regs[id].cfgcr1);</div><div class='ctx'> 	intel_de_posting_read(i915, regs[id].cfgcr2);</div><div class='ctx'> </div><div class='hunk'>@@ -1363,9 +1394,12 @@ static void skl_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void skl_ddi_dpll0_enable(struct drm_i915_private *i915,</div><div class='del'>-				 struct intel_shared_dpll *pll)</div><div class='add'>+				 struct intel_shared_dpll *pll,</div><div class='add'>+				 const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	skl_ddi_pll_write_ctrl1(i915, pll);</div><div class='add'>+	const struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='add'>+</div><div class='add'>+	skl_ddi_pll_write_ctrl1(i915, pll, hw_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void skl_ddi_pll_disable(struct drm_i915_private *i915,</div><div class='hunk'>@@ -1386,13 +1420,14 @@ static void skl_ddi_dpll0_disable(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> static bool skl_ddi_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				     struct intel_shared_dpll *pll,</div><div class='del'>-				     struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				     struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	u32 val;</div><div class='add'>+	struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='ctx'> 	const struct skl_dpll_regs *regs = skl_dpll_regs;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	bool ret;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	wakeref = intel_display_power_get_if_enabled(i915,</div><div class='ctx'> 						     POWER_DOMAIN_DISPLAY_CORE);</div><div class='hunk'>@@ -1423,8 +1458,9 @@ out:</div><div class='ctx'> </div><div class='ctx'> static bool skl_ddi_dpll0_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				       struct intel_shared_dpll *pll,</div><div class='del'>-				       struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				       struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='ctx'> 	const struct skl_dpll_regs *regs = skl_dpll_regs;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='hunk'>@@ -1695,16 +1731,17 @@ skip_remaining_dividers:</div><div class='ctx'> </div><div class='ctx'> static int skl_ddi_wrpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				  const struct intel_shared_dpll *pll,</div><div class='del'>-				  const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				  const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='ctx'> 	int ref_clock = i915-&gt;display.dpll.ref_clks.nssc;</div><div class='ctx'> 	u32 p0, p1, p2, dco_freq;</div><div class='ctx'> </div><div class='del'>-	p0 = pll_state-&gt;cfgcr2 &amp; DPLL_CFGCR2_PDIV_MASK;</div><div class='del'>-	p2 = pll_state-&gt;cfgcr2 &amp; DPLL_CFGCR2_KDIV_MASK;</div><div class='add'>+	p0 = hw_state-&gt;cfgcr2 &amp; DPLL_CFGCR2_PDIV_MASK;</div><div class='add'>+	p2 = hw_state-&gt;cfgcr2 &amp; DPLL_CFGCR2_KDIV_MASK;</div><div class='ctx'> </div><div class='del'>-	if (pll_state-&gt;cfgcr2 &amp;  DPLL_CFGCR2_QDIV_MODE(1))</div><div class='del'>-		p1 = (pll_state-&gt;cfgcr2 &amp; DPLL_CFGCR2_QDIV_RATIO_MASK) &gt;&gt; 8;</div><div class='add'>+	if (hw_state-&gt;cfgcr2 &amp;  DPLL_CFGCR2_QDIV_MODE(1))</div><div class='add'>+		p1 = (hw_state-&gt;cfgcr2 &amp; DPLL_CFGCR2_QDIV_RATIO_MASK) &gt;&gt; 8;</div><div class='ctx'> 	else</div><div class='ctx'> 		p1 = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -1752,10 +1789,10 @@ static int skl_ddi_wrpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dco_freq = (pll_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_DCO_INTEGER_MASK) *</div><div class='add'>+	dco_freq = (hw_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_DCO_INTEGER_MASK) *</div><div class='ctx'> 		   ref_clock;</div><div class='ctx'> </div><div class='del'>-	dco_freq += ((pll_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_DCO_FRACTION_MASK) &gt;&gt; 9) *</div><div class='add'>+	dco_freq += ((hw_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_DCO_FRACTION_MASK) &gt;&gt; 9) *</div><div class='ctx'> 		    ref_clock / 0x8000;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, p0 == 0 || p1 == 0 || p2 == 0))</div><div class='hunk'>@@ -1767,37 +1804,35 @@ static int skl_ddi_wrpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> static int skl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+	struct skl_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.skl;</div><div class='ctx'> 	struct skl_wrpll_params wrpll_params = {};</div><div class='del'>-	u32 ctrl1, cfgcr1, cfgcr2;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * See comment in intel_dpll_hw_state to understand why we always use 0</div><div class='del'>-	 * as the DPLL id in this function.</div><div class='del'>-	 */</div><div class='del'>-	ctrl1 = DPLL_CTRL1_OVERRIDE(0);</div><div class='del'>-</div><div class='del'>-	ctrl1 |= DPLL_CTRL1_HDMI_MODE(0);</div><div class='del'>-</div><div class='ctx'> 	ret = skl_ddi_calculate_wrpll(crtc_state-&gt;port_clock * 1000,</div><div class='ctx'> 				      i915-&gt;display.dpll.ref_clks.nssc, &amp;wrpll_params);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	cfgcr1 = DPLL_CFGCR1_FREQ_ENABLE |</div><div class='add'>+	/*</div><div class='add'>+	 * See comment in intel_dpll_hw_state to understand why we always use 0</div><div class='add'>+	 * as the DPLL id in this function.</div><div class='add'>+	 */</div><div class='add'>+	hw_state-&gt;ctrl1 =</div><div class='add'>+		DPLL_CTRL1_OVERRIDE(0) |</div><div class='add'>+		DPLL_CTRL1_HDMI_MODE(0);</div><div class='add'>+</div><div class='add'>+	hw_state-&gt;cfgcr1 =</div><div class='add'>+		DPLL_CFGCR1_FREQ_ENABLE |</div><div class='ctx'> 		DPLL_CFGCR1_DCO_FRACTION(wrpll_params.dco_fraction) |</div><div class='ctx'> 		wrpll_params.dco_integer;</div><div class='ctx'> </div><div class='del'>-	cfgcr2 = DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |</div><div class='add'>+	hw_state-&gt;cfgcr2 =</div><div class='add'>+		DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |</div><div class='ctx'> 		DPLL_CFGCR2_QDIV_MODE(wrpll_params.qdiv_mode) |</div><div class='ctx'> 		DPLL_CFGCR2_KDIV(wrpll_params.kdiv) |</div><div class='ctx'> 		DPLL_CFGCR2_PDIV(wrpll_params.pdiv) |</div><div class='ctx'> 		wrpll_params.central_freq;</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.ctrl1 = ctrl1;</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.cfgcr1 = cfgcr1;</div><div class='del'>-	crtc_state-&gt;dpll_hw_state.cfgcr2 = cfgcr2;</div><div class='del'>-</div><div class='ctx'> 	crtc_state-&gt;port_clock = skl_ddi_wrpll_get_freq(i915, NULL,</div><div class='ctx'> 							&amp;crtc_state-&gt;dpll_hw_state);</div><div class='ctx'> </div><div class='hunk'>@@ -1807,6 +1842,7 @@ static int skl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state)</div><div class='ctx'> static int</div><div class='ctx'> skl_ddi_dp_set_dpll_hw_state(struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='add'>+	struct skl_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.skl;</div><div class='ctx'> 	u32 ctrl1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1836,18 +1872,19 @@ skl_ddi_dp_set_dpll_hw_state(struct intel_crtc_state *crtc_state)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;dpll_hw_state.ctrl1 = ctrl1;</div><div class='add'>+	hw_state-&gt;ctrl1 = ctrl1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int skl_ddi_lcpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				  const struct intel_shared_dpll *pll,</div><div class='del'>-				  const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				  const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='ctx'> 	int link_clock = 0;</div><div class='ctx'> </div><div class='del'>-	switch ((pll_state-&gt;ctrl1 &amp; DPLL_CTRL1_LINK_RATE_MASK(0)) &gt;&gt;</div><div class='add'>+	switch ((hw_state-&gt;ctrl1 &amp; DPLL_CTRL1_LINK_RATE_MASK(0)) &gt;&gt;</div><div class='ctx'> 		DPLL_CTRL1_LINK_RATE_SHIFT(0)) {</div><div class='ctx'> 	case DPLL_CTRL1_LINK_RATE_810:</div><div class='ctx'> 		link_clock = 81000;</div><div class='hunk'>@@ -1921,16 +1958,18 @@ static int skl_get_dpll(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> static int skl_ddi_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				const struct intel_shared_dpll *pll,</div><div class='del'>-				const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ctrl1 register is already shifted for each pll, just use 0 to get</div><div class='ctx'> 	 * the internal shift for each field</div><div class='ctx'> 	 */</div><div class='del'>-	if (pll_state-&gt;ctrl1 &amp; DPLL_CTRL1_HDMI_MODE(0))</div><div class='del'>-		return skl_ddi_wrpll_get_freq(i915, pll, pll_state);</div><div class='add'>+	if (hw_state-&gt;ctrl1 &amp; DPLL_CTRL1_HDMI_MODE(0))</div><div class='add'>+		return skl_ddi_wrpll_get_freq(i915, pll, dpll_hw_state);</div><div class='ctx'> 	else</div><div class='del'>-		return skl_ddi_lcpll_get_freq(i915, pll, pll_state);</div><div class='add'>+		return skl_ddi_lcpll_get_freq(i915, pll, dpll_hw_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void skl_update_dpll_ref_clks(struct drm_i915_private *i915)</div><div class='hunk'>@@ -1939,19 +1978,21 @@ static void skl_update_dpll_ref_clks(struct drm_i915_private *i915)</div><div class='ctx'> 	i915-&gt;display.dpll.ref_clks.nssc = i915-&gt;display.cdclk.hw.ref;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void skl_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state)</div><div class='add'>+static void skl_dump_hw_state(struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "dpll_hw_state: "</div><div class='del'>-		      "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",</div><div class='del'>-		      hw_state-&gt;ctrl1,</div><div class='del'>-		      hw_state-&gt;cfgcr1,</div><div class='del'>-		      hw_state-&gt;cfgcr2);</div><div class='add'>+	const struct skl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;skl;</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "dpll_hw_state: ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",</div><div class='add'>+		   hw_state-&gt;ctrl1, hw_state-&gt;cfgcr1, hw_state-&gt;cfgcr2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool skl_compare_hw_state(const struct intel_dpll_hw_state *a,</div><div class='del'>-				 const struct intel_dpll_hw_state *b)</div><div class='add'>+static bool skl_compare_hw_state(const struct intel_dpll_hw_state *_a,</div><div class='add'>+				 const struct intel_dpll_hw_state *_b)</div><div class='ctx'> {</div><div class='add'>+	const struct skl_dpll_hw_state *a = &amp;_a-&gt;skl;</div><div class='add'>+	const struct skl_dpll_hw_state *b = &amp;_b-&gt;skl;</div><div class='add'>+</div><div class='ctx'> 	return a-&gt;ctrl1 == b-&gt;ctrl1 &amp;&amp;</div><div class='ctx'> 		a-&gt;cfgcr1 == b-&gt;cfgcr1 &amp;&amp;</div><div class='ctx'> 		a-&gt;cfgcr2 == b-&gt;cfgcr2;</div><div class='hunk'>@@ -1991,12 +2032,14 @@ static const struct intel_dpll_mgr skl_pll_mgr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void bxt_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='del'>-			       struct intel_shared_dpll *pll)</div><div class='add'>+			       struct intel_shared_dpll *pll,</div><div class='add'>+			       const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	u32 temp;</div><div class='add'>+	const struct bxt_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;bxt;</div><div class='ctx'> 	enum port port = (enum port)pll-&gt;info-&gt;id; /* 1:1 port-&gt;PLL mapping */</div><div class='ctx'> 	enum dpio_phy phy;</div><div class='ctx'> 	enum dpio_channel ch;</div><div class='add'>+	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	bxt_port_to_phy_channel(i915, port, &amp;phy, &amp;ch);</div><div class='ctx'> </div><div class='hunk'>@@ -2019,43 +2062,43 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> 	/* Write P1 &amp; P2 */</div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL_EBB_0(phy, ch),</div><div class='del'>-		     PORT_PLL_P1_MASK | PORT_PLL_P2_MASK, pll-&gt;state.hw_state.ebb0);</div><div class='add'>+		     PORT_PLL_P1_MASK | PORT_PLL_P2_MASK, hw_state-&gt;ebb0);</div><div class='ctx'> </div><div class='ctx'> 	/* Write M2 integer */</div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL(phy, ch, 0),</div><div class='del'>-		     PORT_PLL_M2_INT_MASK, pll-&gt;state.hw_state.pll0);</div><div class='add'>+		     PORT_PLL_M2_INT_MASK, hw_state-&gt;pll0);</div><div class='ctx'> </div><div class='ctx'> 	/* Write N */</div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL(phy, ch, 1),</div><div class='del'>-		     PORT_PLL_N_MASK, pll-&gt;state.hw_state.pll1);</div><div class='add'>+		     PORT_PLL_N_MASK, hw_state-&gt;pll1);</div><div class='ctx'> </div><div class='ctx'> 	/* Write M2 fraction */</div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL(phy, ch, 2),</div><div class='del'>-		     PORT_PLL_M2_FRAC_MASK, pll-&gt;state.hw_state.pll2);</div><div class='add'>+		     PORT_PLL_M2_FRAC_MASK, hw_state-&gt;pll2);</div><div class='ctx'> </div><div class='ctx'> 	/* Write M2 fraction enable */</div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL(phy, ch, 3),</div><div class='del'>-		     PORT_PLL_M2_FRAC_ENABLE, pll-&gt;state.hw_state.pll3);</div><div class='add'>+		     PORT_PLL_M2_FRAC_ENABLE, hw_state-&gt;pll3);</div><div class='ctx'> </div><div class='ctx'> 	/* Write coeff */</div><div class='ctx'> 	temp = intel_de_read(i915, BXT_PORT_PLL(phy, ch, 6));</div><div class='ctx'> 	temp &amp;= ~PORT_PLL_PROP_COEFF_MASK;</div><div class='ctx'> 	temp &amp;= ~PORT_PLL_INT_COEFF_MASK;</div><div class='ctx'> 	temp &amp;= ~PORT_PLL_GAIN_CTL_MASK;</div><div class='del'>-	temp |= pll-&gt;state.hw_state.pll6;</div><div class='add'>+	temp |= hw_state-&gt;pll6;</div><div class='ctx'> 	intel_de_write(i915, BXT_PORT_PLL(phy, ch, 6), temp);</div><div class='ctx'> </div><div class='ctx'> 	/* Write calibration val */</div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL(phy, ch, 8),</div><div class='del'>-		     PORT_PLL_TARGET_CNT_MASK, pll-&gt;state.hw_state.pll8);</div><div class='add'>+		     PORT_PLL_TARGET_CNT_MASK, hw_state-&gt;pll8);</div><div class='ctx'> </div><div class='ctx'> 	intel_de_rmw(i915, BXT_PORT_PLL(phy, ch, 9),</div><div class='del'>-		     PORT_PLL_LOCK_THRESHOLD_MASK, pll-&gt;state.hw_state.pll9);</div><div class='add'>+		     PORT_PLL_LOCK_THRESHOLD_MASK, hw_state-&gt;pll9);</div><div class='ctx'> </div><div class='ctx'> 	temp = intel_de_read(i915, BXT_PORT_PLL(phy, ch, 10));</div><div class='ctx'> 	temp &amp;= ~PORT_PLL_DCO_AMP_OVR_EN_H;</div><div class='ctx'> 	temp &amp;= ~PORT_PLL_DCO_AMP_MASK;</div><div class='del'>-	temp |= pll-&gt;state.hw_state.pll10;</div><div class='add'>+	temp |= hw_state-&gt;pll10;</div><div class='ctx'> 	intel_de_write(i915, BXT_PORT_PLL(phy, ch, 10), temp);</div><div class='ctx'> </div><div class='ctx'> 	/* Recalibrate with new settings */</div><div class='hunk'>@@ -2063,7 +2106,7 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> 	temp |= PORT_PLL_RECALIBRATE;</div><div class='ctx'> 	intel_de_write(i915, BXT_PORT_PLL_EBB_4(phy, ch), temp);</div><div class='ctx'> 	temp &amp;= ~PORT_PLL_10BIT_CLK_ENABLE;</div><div class='del'>-	temp |= pll-&gt;state.hw_state.ebb4;</div><div class='add'>+	temp |= hw_state-&gt;ebb4;</div><div class='ctx'> 	intel_de_write(i915, BXT_PORT_PLL_EBB_4(phy, ch), temp);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable PLL */</div><div class='hunk'>@@ -2075,7 +2118,7 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> 		drm_err(&amp;i915-&gt;drm, "PLL %d not locked\n", port);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(i915)) {</div><div class='del'>-		temp = intel_de_read(i915, BXT_PORT_TX_DW5_LN0(phy, ch));</div><div class='add'>+		temp = intel_de_read(i915, BXT_PORT_TX_DW5_LN(phy, ch, 0));</div><div class='ctx'> 		temp |= DCC_DELAY_RANGE_2;</div><div class='ctx'> 		intel_de_write(i915, BXT_PORT_TX_DW5_GRP(phy, ch), temp);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2087,7 +2130,7 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> 	temp = intel_de_read(i915, BXT_PORT_PCS_DW12_LN01(phy, ch));</div><div class='ctx'> 	temp &amp;= ~LANE_STAGGER_MASK;</div><div class='ctx'> 	temp &amp;= ~LANESTAGGER_STRAP_OVRD;</div><div class='del'>-	temp |= pll-&gt;state.hw_state.pcsdw12;</div><div class='add'>+	temp |= hw_state-&gt;pcsdw12;</div><div class='ctx'> 	intel_de_write(i915, BXT_PORT_PCS_DW12_GRP(phy, ch), temp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2112,8 +2155,9 @@ static void bxt_ddi_pll_disable(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> static bool bxt_ddi_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				     struct intel_shared_dpll *pll,</div><div class='del'>-				     struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				     struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct bxt_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;bxt;</div><div class='ctx'> 	enum port port = (enum port)pll-&gt;info-&gt;id; /* 1:1 port-&gt;PLL mapping */</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	enum dpio_phy phy;</div><div class='hunk'>@@ -2245,7 +2289,7 @@ static int bxt_ddi_set_dpll_hw_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 				     const struct dpll *clk_div)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='del'>-	struct intel_dpll_hw_state *dpll_hw_state = &amp;crtc_state-&gt;dpll_hw_state;</div><div class='add'>+	struct bxt_dpll_hw_state *hw_state = &amp;crtc_state-&gt;dpll_hw_state.bxt;</div><div class='ctx'> 	int clock = crtc_state-&gt;port_clock;</div><div class='ctx'> 	int vco = clk_div-&gt;vco;</div><div class='ctx'> 	u32 prop_coef, int_coef, gain_ctl, targ_cnt;</div><div class='hunk'>@@ -2283,45 +2327,47 @@ static int bxt_ddi_set_dpll_hw_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	else</div><div class='ctx'> 		lanestagger = 0x02;</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;ebb0 = PORT_PLL_P1(clk_div-&gt;p1) | PORT_PLL_P2(clk_div-&gt;p2);</div><div class='del'>-	dpll_hw_state-&gt;pll0 = PORT_PLL_M2_INT(clk_div-&gt;m2 &gt;&gt; 22);</div><div class='del'>-	dpll_hw_state-&gt;pll1 = PORT_PLL_N(clk_div-&gt;n);</div><div class='del'>-	dpll_hw_state-&gt;pll2 = PORT_PLL_M2_FRAC(clk_div-&gt;m2 &amp; 0x3fffff);</div><div class='add'>+	hw_state-&gt;ebb0 = PORT_PLL_P1(clk_div-&gt;p1) | PORT_PLL_P2(clk_div-&gt;p2);</div><div class='add'>+	hw_state-&gt;pll0 = PORT_PLL_M2_INT(clk_div-&gt;m2 &gt;&gt; 22);</div><div class='add'>+	hw_state-&gt;pll1 = PORT_PLL_N(clk_div-&gt;n);</div><div class='add'>+	hw_state-&gt;pll2 = PORT_PLL_M2_FRAC(clk_div-&gt;m2 &amp; 0x3fffff);</div><div class='ctx'> </div><div class='ctx'> 	if (clk_div-&gt;m2 &amp; 0x3fffff)</div><div class='del'>-		dpll_hw_state-&gt;pll3 = PORT_PLL_M2_FRAC_ENABLE;</div><div class='add'>+		hw_state-&gt;pll3 = PORT_PLL_M2_FRAC_ENABLE;</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;pll6 = PORT_PLL_PROP_COEFF(prop_coef) |</div><div class='add'>+	hw_state-&gt;pll6 = PORT_PLL_PROP_COEFF(prop_coef) |</div><div class='ctx'> 		PORT_PLL_INT_COEFF(int_coef) |</div><div class='ctx'> 		PORT_PLL_GAIN_CTL(gain_ctl);</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;pll8 = PORT_PLL_TARGET_CNT(targ_cnt);</div><div class='add'>+	hw_state-&gt;pll8 = PORT_PLL_TARGET_CNT(targ_cnt);</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;pll9 = PORT_PLL_LOCK_THRESHOLD(5);</div><div class='add'>+	hw_state-&gt;pll9 = PORT_PLL_LOCK_THRESHOLD(5);</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;pll10 = PORT_PLL_DCO_AMP(15) |</div><div class='add'>+	hw_state-&gt;pll10 = PORT_PLL_DCO_AMP(15) |</div><div class='ctx'> 		PORT_PLL_DCO_AMP_OVR_EN_H;</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;ebb4 = PORT_PLL_10BIT_CLK_ENABLE;</div><div class='add'>+	hw_state-&gt;ebb4 = PORT_PLL_10BIT_CLK_ENABLE;</div><div class='ctx'> </div><div class='del'>-	dpll_hw_state-&gt;pcsdw12 = LANESTAGGER_STRAP_OVRD | lanestagger;</div><div class='add'>+	hw_state-&gt;pcsdw12 = LANESTAGGER_STRAP_OVRD | lanestagger;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bxt_ddi_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				const struct intel_shared_dpll *pll,</div><div class='del'>-				const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct bxt_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;bxt;</div><div class='ctx'> 	struct dpll clock;</div><div class='ctx'> </div><div class='ctx'> 	clock.m1 = 2;</div><div class='del'>-	clock.m2 = REG_FIELD_GET(PORT_PLL_M2_INT_MASK, pll_state-&gt;pll0) &lt;&lt; 22;</div><div class='del'>-	if (pll_state-&gt;pll3 &amp; PORT_PLL_M2_FRAC_ENABLE)</div><div class='del'>-		clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK, pll_state-&gt;pll2);</div><div class='del'>-	clock.n = REG_FIELD_GET(PORT_PLL_N_MASK, pll_state-&gt;pll1);</div><div class='del'>-	clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, pll_state-&gt;ebb0);</div><div class='del'>-	clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK, pll_state-&gt;ebb0);</div><div class='add'>+	clock.m2 = REG_FIELD_GET(PORT_PLL_M2_INT_MASK, hw_state-&gt;pll0) &lt;&lt; 22;</div><div class='add'>+	if (hw_state-&gt;pll3 &amp; PORT_PLL_M2_FRAC_ENABLE)</div><div class='add'>+		clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK,</div><div class='add'>+					  hw_state-&gt;pll2);</div><div class='add'>+	clock.n = REG_FIELD_GET(PORT_PLL_N_MASK, hw_state-&gt;pll1);</div><div class='add'>+	clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, hw_state-&gt;ebb0);</div><div class='add'>+	clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK, hw_state-&gt;ebb0);</div><div class='ctx'> </div><div class='ctx'> 	return chv_calc_dpll_params(i915-&gt;display.dpll.ref_clks.nssc, &amp;clock);</div><div class='ctx'> }</div><div class='hunk'>@@ -2402,28 +2448,26 @@ static void bxt_update_dpll_ref_clks(struct drm_i915_private *i915)</div><div class='ctx'> 	/* DSI non-SSC ref 19.2MHz */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bxt_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state)</div><div class='add'>+static void bxt_dump_hw_state(struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm, "dpll_hw_state: ebb0: 0x%x, ebb4: 0x%x,"</div><div class='del'>-		    "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "</div><div class='del'>-		    "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pll10: 0x%x, pcsdw12: 0x%x\n",</div><div class='del'>-		    hw_state-&gt;ebb0,</div><div class='del'>-		    hw_state-&gt;ebb4,</div><div class='del'>-		    hw_state-&gt;pll0,</div><div class='del'>-		    hw_state-&gt;pll1,</div><div class='del'>-		    hw_state-&gt;pll2,</div><div class='del'>-		    hw_state-&gt;pll3,</div><div class='del'>-		    hw_state-&gt;pll6,</div><div class='del'>-		    hw_state-&gt;pll8,</div><div class='del'>-		    hw_state-&gt;pll9,</div><div class='del'>-		    hw_state-&gt;pll10,</div><div class='del'>-		    hw_state-&gt;pcsdw12);</div><div class='add'>+	const struct bxt_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;bxt;</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "dpll_hw_state: ebb0: 0x%x, ebb4: 0x%x,"</div><div class='add'>+		   "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "</div><div class='add'>+		   "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pll10: 0x%x, pcsdw12: 0x%x\n",</div><div class='add'>+		   hw_state-&gt;ebb0, hw_state-&gt;ebb4,</div><div class='add'>+		   hw_state-&gt;pll0, hw_state-&gt;pll1, hw_state-&gt;pll2, hw_state-&gt;pll3,</div><div class='add'>+		   hw_state-&gt;pll6, hw_state-&gt;pll8, hw_state-&gt;pll9, hw_state-&gt;pll10,</div><div class='add'>+		   hw_state-&gt;pcsdw12);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool bxt_compare_hw_state(const struct intel_dpll_hw_state *a,</div><div class='del'>-				 const struct intel_dpll_hw_state *b)</div><div class='add'>+static bool bxt_compare_hw_state(const struct intel_dpll_hw_state *_a,</div><div class='add'>+				 const struct intel_dpll_hw_state *_b)</div><div class='ctx'> {</div><div class='add'>+	const struct bxt_dpll_hw_state *a = &amp;_a-&gt;bxt;</div><div class='add'>+	const struct bxt_dpll_hw_state *b = &amp;_b-&gt;bxt;</div><div class='add'>+</div><div class='ctx'> 	return a-&gt;ebb0 == b-&gt;ebb0 &amp;&amp;</div><div class='ctx'> 		a-&gt;ebb4 == b-&gt;ebb4 &amp;&amp;</div><div class='ctx'> 		a-&gt;pll0 == b-&gt;pll0 &amp;&amp;</div><div class='hunk'>@@ -2706,7 +2750,7 @@ static int icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> static int icl_ddi_tbt_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				    const struct intel_shared_dpll *pll,</div><div class='del'>-				    const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				    const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The PLL outputs multiple frequencies at the same time, selection is</div><div class='hunk'>@@ -2777,17 +2821,18 @@ icl_calc_wrpll(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> static int icl_ddi_combo_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				      const struct intel_shared_dpll *pll,</div><div class='del'>-				      const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	int ref_clock = icl_wrpll_ref_clock(i915);</div><div class='ctx'> 	u32 dco_fraction;</div><div class='ctx'> 	u32 p0, p1, p2, dco_freq;</div><div class='ctx'> </div><div class='del'>-	p0 = pll_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_PDIV_MASK;</div><div class='del'>-	p2 = pll_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_KDIV_MASK;</div><div class='add'>+	p0 = hw_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_PDIV_MASK;</div><div class='add'>+	p2 = hw_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_KDIV_MASK;</div><div class='ctx'> </div><div class='del'>-	if (pll_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_QDIV_MODE(1))</div><div class='del'>-		p1 = (pll_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_QDIV_RATIO_MASK) &gt;&gt;</div><div class='add'>+	if (hw_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_QDIV_MODE(1))</div><div class='add'>+		p1 = (hw_state-&gt;cfgcr1 &amp; DPLL_CFGCR1_QDIV_RATIO_MASK) &gt;&gt;</div><div class='ctx'> 			DPLL_CFGCR1_QDIV_RATIO_SHIFT;</div><div class='ctx'> 	else</div><div class='ctx'> 		p1 = 1;</div><div class='hunk'>@@ -2819,10 +2864,10 @@ static int icl_ddi_combo_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dco_freq = (pll_state-&gt;cfgcr0 &amp; DPLL_CFGCR0_DCO_INTEGER_MASK) *</div><div class='add'>+	dco_freq = (hw_state-&gt;cfgcr0 &amp; DPLL_CFGCR0_DCO_INTEGER_MASK) *</div><div class='ctx'> 		   ref_clock;</div><div class='ctx'> </div><div class='del'>-	dco_fraction = (pll_state-&gt;cfgcr0 &amp; DPLL_CFGCR0_DCO_FRACTION_MASK) &gt;&gt;</div><div class='add'>+	dco_fraction = (hw_state-&gt;cfgcr0 &amp; DPLL_CFGCR0_DCO_FRACTION_MASK) &gt;&gt;</div><div class='ctx'> 		       DPLL_CFGCR0_DCO_FRACTION_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	if (ehl_combo_pll_div_frac_wa_needed(i915))</div><div class='hunk'>@@ -2838,33 +2883,34 @@ static int icl_ddi_combo_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> static void icl_calc_dpll_state(struct drm_i915_private *i915,</div><div class='ctx'> 				const struct skl_wrpll_params *pll_params,</div><div class='del'>-				struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	u32 dco_fraction = pll_params-&gt;dco_fraction;</div><div class='ctx'> </div><div class='ctx'> 	if (ehl_combo_pll_div_frac_wa_needed(i915))</div><div class='ctx'> 		dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);</div><div class='ctx'> </div><div class='del'>-	pll_state-&gt;cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(dco_fraction) |</div><div class='add'>+	hw_state-&gt;cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(dco_fraction) |</div><div class='ctx'> 			    pll_params-&gt;dco_integer;</div><div class='ctx'> </div><div class='del'>-	pll_state-&gt;cfgcr1 = DPLL_CFGCR1_QDIV_RATIO(pll_params-&gt;qdiv_ratio) |</div><div class='add'>+	hw_state-&gt;cfgcr1 = DPLL_CFGCR1_QDIV_RATIO(pll_params-&gt;qdiv_ratio) |</div><div class='ctx'> 			    DPLL_CFGCR1_QDIV_MODE(pll_params-&gt;qdiv_mode) |</div><div class='ctx'> 			    DPLL_CFGCR1_KDIV(pll_params-&gt;kdiv) |</div><div class='ctx'> 			    DPLL_CFGCR1_PDIV(pll_params-&gt;pdiv);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 12)</div><div class='del'>-		pll_state-&gt;cfgcr1 |= TGL_DPLL_CFGCR1_CFSELOVRD_NORMAL_XTAL;</div><div class='add'>+		hw_state-&gt;cfgcr1 |= TGL_DPLL_CFGCR1_CFSELOVRD_NORMAL_XTAL;</div><div class='ctx'> 	else</div><div class='del'>-		pll_state-&gt;cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400;</div><div class='add'>+		hw_state-&gt;cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400;</div><div class='ctx'> </div><div class='ctx'> 	if (i915-&gt;display.vbt.override_afc_startup)</div><div class='del'>-		pll_state-&gt;div0 = TGL_DPLL0_DIV0_AFC_STARTUP(i915-&gt;display.vbt.override_afc_startup_val);</div><div class='add'>+		hw_state-&gt;div0 = TGL_DPLL0_DIV0_AFC_STARTUP(i915-&gt;display.vbt.override_afc_startup_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,</div><div class='ctx'> 				    u32 *target_dco_khz,</div><div class='del'>-				    struct intel_dpll_hw_state *state,</div><div class='add'>+				    struct icl_dpll_hw_state *hw_state,</div><div class='ctx'> 				    bool is_dkl)</div><div class='ctx'> {</div><div class='ctx'> 	static const u8 div1_vals[] = { 7, 5, 3, 2 };</div><div class='hunk'>@@ -2920,12 +2966,12 @@ static int icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,</div><div class='ctx'> </div><div class='ctx'> 			*target_dco_khz = dco;</div><div class='ctx'> </div><div class='del'>-			state-&gt;mg_refclkin_ctl = MG_REFCLKIN_CTL_OD_2_MUX(1);</div><div class='add'>+			hw_state-&gt;mg_refclkin_ctl = MG_REFCLKIN_CTL_OD_2_MUX(1);</div><div class='ctx'> </div><div class='del'>-			state-&gt;mg_clktop2_coreclkctl1 =</div><div class='add'>+			hw_state-&gt;mg_clktop2_coreclkctl1 =</div><div class='ctx'> 				MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO(a_divratio);</div><div class='ctx'> </div><div class='del'>-			state-&gt;mg_clktop2_hsclkctl =</div><div class='add'>+			hw_state-&gt;mg_clktop2_hsclkctl =</div><div class='ctx'> 				MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL(tlinedrv) |</div><div class='ctx'> 				MG_CLKTOP2_HSCLKCTL_CORE_INPUTSEL(inputsel) |</div><div class='ctx'> 				hsdiv |</div><div class='hunk'>@@ -2943,9 +2989,10 @@ static int icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,</div><div class='ctx'>  * adapted to integer-only calculation, that's why it looks so different.</div><div class='ctx'>  */</div><div class='ctx'> static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,</div><div class='del'>-				 struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				 struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+	struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	int refclk_khz = i915-&gt;display.dpll.ref_clks.nssc;</div><div class='ctx'> 	int clock = crtc_state-&gt;port_clock;</div><div class='ctx'> 	u32 dco_khz, m1div, m2div_int, m2div_rem, m2div_frac;</div><div class='hunk'>@@ -2960,7 +3007,7 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = icl_mg_pll_find_divisors(clock, is_dp, use_ssc, &amp;dco_khz,</div><div class='del'>-				       pll_state, is_dkl);</div><div class='add'>+				       hw_state, is_dkl);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -3050,61 +3097,61 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> 	/* write pll_state calculations */</div><div class='ctx'> 	if (is_dkl) {</div><div class='del'>-		pll_state-&gt;mg_pll_div0 = DKL_PLL_DIV0_INTEG_COEFF(int_coeff) |</div><div class='add'>+		hw_state-&gt;mg_pll_div0 = DKL_PLL_DIV0_INTEG_COEFF(int_coeff) |</div><div class='ctx'> 					 DKL_PLL_DIV0_PROP_COEFF(prop_coeff) |</div><div class='ctx'> 					 DKL_PLL_DIV0_FBPREDIV(m1div) |</div><div class='ctx'> 					 DKL_PLL_DIV0_FBDIV_INT(m2div_int);</div><div class='ctx'> 		if (i915-&gt;display.vbt.override_afc_startup) {</div><div class='ctx'> 			u8 val = i915-&gt;display.vbt.override_afc_startup_val;</div><div class='ctx'> </div><div class='del'>-			pll_state-&gt;mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(val);</div><div class='add'>+			hw_state-&gt;mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(val);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_div1 = DKL_PLL_DIV1_IREF_TRIM(iref_trim) |</div><div class='add'>+		hw_state-&gt;mg_pll_div1 = DKL_PLL_DIV1_IREF_TRIM(iref_trim) |</div><div class='ctx'> 					 DKL_PLL_DIV1_TDC_TARGET_CNT(tdc_targetcnt);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_ssc = DKL_PLL_SSC_IREF_NDIV_RATIO(iref_ndiv) |</div><div class='add'>+		hw_state-&gt;mg_pll_ssc = DKL_PLL_SSC_IREF_NDIV_RATIO(iref_ndiv) |</div><div class='ctx'> 					DKL_PLL_SSC_STEP_LEN(ssc_steplen) |</div><div class='ctx'> 					DKL_PLL_SSC_STEP_NUM(ssc_steplog) |</div><div class='ctx'> 					(use_ssc ? DKL_PLL_SSC_EN : 0);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_bias = (m2div_frac ? DKL_PLL_BIAS_FRAC_EN_H : 0) |</div><div class='add'>+		hw_state-&gt;mg_pll_bias = (m2div_frac ? DKL_PLL_BIAS_FRAC_EN_H : 0) |</div><div class='ctx'> 					  DKL_PLL_BIAS_FBDIV_FRAC(m2div_frac);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_tdc_coldst_bias =</div><div class='add'>+		hw_state-&gt;mg_pll_tdc_coldst_bias =</div><div class='ctx'> 				DKL_PLL_TDC_SSC_STEP_SIZE(ssc_stepsize) |</div><div class='ctx'> 				DKL_PLL_TDC_FEED_FWD_GAIN(feedfwgain);</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='del'>-		pll_state-&gt;mg_pll_div0 =</div><div class='add'>+		hw_state-&gt;mg_pll_div0 =</div><div class='ctx'> 			(m2div_rem &gt; 0 ? MG_PLL_DIV0_FRACNEN_H : 0) |</div><div class='ctx'> 			MG_PLL_DIV0_FBDIV_FRAC(m2div_frac) |</div><div class='ctx'> 			MG_PLL_DIV0_FBDIV_INT(m2div_int);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_div1 =</div><div class='add'>+		hw_state-&gt;mg_pll_div1 =</div><div class='ctx'> 			MG_PLL_DIV1_IREF_NDIVRATIO(iref_ndiv) |</div><div class='ctx'> 			MG_PLL_DIV1_DITHER_DIV_2 |</div><div class='ctx'> 			MG_PLL_DIV1_NDIVRATIO(1) |</div><div class='ctx'> 			MG_PLL_DIV1_FBPREDIV(m1div);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_lf =</div><div class='add'>+		hw_state-&gt;mg_pll_lf =</div><div class='ctx'> 			MG_PLL_LF_TDCTARGETCNT(tdc_targetcnt) |</div><div class='ctx'> 			MG_PLL_LF_AFCCNTSEL_512 |</div><div class='ctx'> 			MG_PLL_LF_GAINCTRL(1) |</div><div class='ctx'> 			MG_PLL_LF_INT_COEFF(int_coeff) |</div><div class='ctx'> 			MG_PLL_LF_PROP_COEFF(prop_coeff);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_frac_lock =</div><div class='add'>+		hw_state-&gt;mg_pll_frac_lock =</div><div class='ctx'> 			MG_PLL_FRAC_LOCK_TRUELOCK_CRIT_32 |</div><div class='ctx'> 			MG_PLL_FRAC_LOCK_EARLYLOCK_CRIT_32 |</div><div class='ctx'> 			MG_PLL_FRAC_LOCK_LOCKTHRESH(10) |</div><div class='ctx'> 			MG_PLL_FRAC_LOCK_DCODITHEREN |</div><div class='ctx'> 			MG_PLL_FRAC_LOCK_FEEDFWRDGAIN(feedfwgain);</div><div class='ctx'> 		if (use_ssc || m2div_rem &gt; 0)</div><div class='del'>-			pll_state-&gt;mg_pll_frac_lock |=</div><div class='add'>+			hw_state-&gt;mg_pll_frac_lock |=</div><div class='ctx'> 				MG_PLL_FRAC_LOCK_FEEDFWRDCAL_EN;</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_ssc =</div><div class='add'>+		hw_state-&gt;mg_pll_ssc =</div><div class='ctx'> 			(use_ssc ? MG_PLL_SSC_EN : 0) |</div><div class='ctx'> 			MG_PLL_SSC_TYPE(2) |</div><div class='ctx'> 			MG_PLL_SSC_STEPLENGTH(ssc_steplen) |</div><div class='hunk'>@@ -3112,14 +3159,14 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			MG_PLL_SSC_FLLEN |</div><div class='ctx'> 			MG_PLL_SSC_STEPSIZE(ssc_stepsize);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_tdc_coldst_bias =</div><div class='add'>+		hw_state-&gt;mg_pll_tdc_coldst_bias =</div><div class='ctx'> 			MG_PLL_TDC_COLDST_COLDSTART |</div><div class='ctx'> 			MG_PLL_TDC_COLDST_IREFINT_EN |</div><div class='ctx'> 			MG_PLL_TDC_COLDST_REFBIAS_START_PULSE_W(iref_pulse_w) |</div><div class='ctx'> 			MG_PLL_TDC_TDCOVCCORR_EN |</div><div class='ctx'> 			MG_PLL_TDC_TDCSEL(3);</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_bias =</div><div class='add'>+		hw_state-&gt;mg_pll_bias =</div><div class='ctx'> 			MG_PLL_BIAS_BIAS_GB_SEL(3) |</div><div class='ctx'> 			MG_PLL_BIAS_INIT_DCOAMP(0x3F) |</div><div class='ctx'> 			MG_PLL_BIAS_BIAS_BONUS(10) |</div><div class='hunk'>@@ -3129,17 +3176,17 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			MG_PLL_BIAS_IREFTRIM(iref_trim);</div><div class='ctx'> </div><div class='ctx'> 		if (refclk_khz == 38400) {</div><div class='del'>-			pll_state-&gt;mg_pll_tdc_coldst_bias_mask =</div><div class='add'>+			hw_state-&gt;mg_pll_tdc_coldst_bias_mask =</div><div class='ctx'> 				MG_PLL_TDC_COLDST_COLDSTART;</div><div class='del'>-			pll_state-&gt;mg_pll_bias_mask = 0;</div><div class='add'>+			hw_state-&gt;mg_pll_bias_mask = 0;</div><div class='ctx'> 		} else {</div><div class='del'>-			pll_state-&gt;mg_pll_tdc_coldst_bias_mask = -1U;</div><div class='del'>-			pll_state-&gt;mg_pll_bias_mask = -1U;</div><div class='add'>+			hw_state-&gt;mg_pll_tdc_coldst_bias_mask = -1U;</div><div class='add'>+			hw_state-&gt;mg_pll_bias_mask = -1U;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pll_state-&gt;mg_pll_tdc_coldst_bias &amp;=</div><div class='del'>-			pll_state-&gt;mg_pll_tdc_coldst_bias_mask;</div><div class='del'>-		pll_state-&gt;mg_pll_bias &amp;= pll_state-&gt;mg_pll_bias_mask;</div><div class='add'>+		hw_state-&gt;mg_pll_tdc_coldst_bias &amp;=</div><div class='add'>+			hw_state-&gt;mg_pll_tdc_coldst_bias_mask;</div><div class='add'>+		hw_state-&gt;mg_pll_bias &amp;= hw_state-&gt;mg_pll_bias_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3147,31 +3194,32 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> static int icl_ddi_mg_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 				   const struct intel_shared_dpll *pll,</div><div class='del'>-				   const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+				   const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	u32 m1, m2_int, m2_frac, div1, div2, ref_clock;</div><div class='ctx'> 	u64 tmp;</div><div class='ctx'> </div><div class='ctx'> 	ref_clock = i915-&gt;display.dpll.ref_clks.nssc;</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 12) {</div><div class='del'>-		m1 = pll_state-&gt;mg_pll_div0 &amp; DKL_PLL_DIV0_FBPREDIV_MASK;</div><div class='add'>+		m1 = hw_state-&gt;mg_pll_div0 &amp; DKL_PLL_DIV0_FBPREDIV_MASK;</div><div class='ctx'> 		m1 = m1 &gt;&gt; DKL_PLL_DIV0_FBPREDIV_SHIFT;</div><div class='del'>-		m2_int = pll_state-&gt;mg_pll_div0 &amp; DKL_PLL_DIV0_FBDIV_INT_MASK;</div><div class='add'>+		m2_int = hw_state-&gt;mg_pll_div0 &amp; DKL_PLL_DIV0_FBDIV_INT_MASK;</div><div class='ctx'> </div><div class='del'>-		if (pll_state-&gt;mg_pll_bias &amp; DKL_PLL_BIAS_FRAC_EN_H) {</div><div class='del'>-			m2_frac = pll_state-&gt;mg_pll_bias &amp;</div><div class='add'>+		if (hw_state-&gt;mg_pll_bias &amp; DKL_PLL_BIAS_FRAC_EN_H) {</div><div class='add'>+			m2_frac = hw_state-&gt;mg_pll_bias &amp;</div><div class='ctx'> 				  DKL_PLL_BIAS_FBDIV_FRAC_MASK;</div><div class='ctx'> 			m2_frac = m2_frac &gt;&gt; DKL_PLL_BIAS_FBDIV_SHIFT;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			m2_frac = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		m1 = pll_state-&gt;mg_pll_div1 &amp; MG_PLL_DIV1_FBPREDIV_MASK;</div><div class='del'>-		m2_int = pll_state-&gt;mg_pll_div0 &amp; MG_PLL_DIV0_FBDIV_INT_MASK;</div><div class='add'>+		m1 = hw_state-&gt;mg_pll_div1 &amp; MG_PLL_DIV1_FBPREDIV_MASK;</div><div class='add'>+		m2_int = hw_state-&gt;mg_pll_div0 &amp; MG_PLL_DIV0_FBDIV_INT_MASK;</div><div class='ctx'> </div><div class='del'>-		if (pll_state-&gt;mg_pll_div0 &amp; MG_PLL_DIV0_FRACNEN_H) {</div><div class='del'>-			m2_frac = pll_state-&gt;mg_pll_div0 &amp;</div><div class='add'>+		if (hw_state-&gt;mg_pll_div0 &amp; MG_PLL_DIV0_FRACNEN_H) {</div><div class='add'>+			m2_frac = hw_state-&gt;mg_pll_div0 &amp;</div><div class='ctx'> 				  MG_PLL_DIV0_FBDIV_FRAC_MASK;</div><div class='ctx'> 			m2_frac = m2_frac &gt;&gt; MG_PLL_DIV0_FBDIV_FRAC_SHIFT;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -3179,7 +3227,7 @@ static int icl_ddi_mg_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (pll_state-&gt;mg_clktop2_hsclkctl &amp;</div><div class='add'>+	switch (hw_state-&gt;mg_clktop2_hsclkctl &amp;</div><div class='ctx'> 		MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_MASK) {</div><div class='ctx'> 	case MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_2:</div><div class='ctx'> 		div1 = 2;</div><div class='hunk'>@@ -3194,11 +3242,11 @@ static int icl_ddi_mg_pll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 		div1 = 7;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		MISSING_CASE(pll_state-&gt;mg_clktop2_hsclkctl);</div><div class='add'>+		MISSING_CASE(hw_state-&gt;mg_clktop2_hsclkctl);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	div2 = (pll_state-&gt;mg_clktop2_hsclkctl &amp;</div><div class='add'>+	div2 = (hw_state-&gt;mg_clktop2_hsclkctl &amp;</div><div class='ctx'> 		MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO_MASK) &gt;&gt;</div><div class='ctx'> 		MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO_SHIFT;</div><div class='ctx'> </div><div class='hunk'>@@ -3389,7 +3437,6 @@ static int icl_get_tc_phy_dplls(struct intel_atomic_state *state,</div><div class='ctx'> 				struct intel_crtc *crtc,</div><div class='ctx'> 				struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc_state *crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct icl_port_dpll *port_dpll =</div><div class='hunk'>@@ -3408,8 +3455,7 @@ static int icl_get_tc_phy_dplls(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	port_dpll = &amp;crtc_state-&gt;icl_port_dplls[ICL_PORT_DPLL_MG_PHY];</div><div class='del'>-	dpll_id = icl_tc_port_to_pll_id(intel_port_to_tc(i915,</div><div class='del'>-							 encoder-&gt;port));</div><div class='add'>+	dpll_id = icl_tc_port_to_pll_id(intel_encoder_to_tc(encoder));</div><div class='ctx'> 	port_dpll-&gt;pll = intel_find_shared_dpll(state, crtc,</div><div class='ctx'> 						&amp;port_dpll-&gt;hw_state,</div><div class='ctx'> 						BIT(dpll_id));</div><div class='hunk'>@@ -3435,15 +3481,12 @@ static int icl_compute_dplls(struct intel_atomic_state *state,</div><div class='ctx'> 			     struct intel_crtc *crtc,</div><div class='ctx'> 			     struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	if (intel_phy_is_combo(i915, phy))</div><div class='add'>+	if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 		return icl_compute_combo_phy_dpll(state, crtc);</div><div class='del'>-	else if (intel_phy_is_tc(i915, phy))</div><div class='add'>+	else if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 		return icl_compute_tc_phy_dplls(state, crtc);</div><div class='ctx'> </div><div class='del'>-	MISSING_CASE(phy);</div><div class='add'>+	MISSING_CASE(encoder-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3452,15 +3495,12 @@ static int icl_get_dplls(struct intel_atomic_state *state,</div><div class='ctx'> 			 struct intel_crtc *crtc,</div><div class='ctx'> 			 struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	if (intel_phy_is_combo(i915, phy))</div><div class='add'>+	if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 		return icl_get_combo_phy_dpll(state, crtc, encoder);</div><div class='del'>-	else if (intel_phy_is_tc(i915, phy))</div><div class='add'>+	else if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 		return icl_get_tc_phy_dplls(state, crtc, encoder);</div><div class='ctx'> </div><div class='del'>-	MISSING_CASE(phy);</div><div class='add'>+	MISSING_CASE(encoder-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='hunk'>@@ -3493,8 +3533,9 @@ static void icl_put_dplls(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> static bool mg_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				struct intel_shared_dpll *pll,</div><div class='del'>-				struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	enum tc_port tc_port = icl_pll_id_to_tc_port(id);</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='hunk'>@@ -3559,8 +3600,9 @@ out:</div><div class='ctx'> </div><div class='ctx'> static bool dkl_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				 struct intel_shared_dpll *pll,</div><div class='del'>-				 struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				 struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	enum tc_port tc_port = icl_pll_id_to_tc_port(id);</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='hunk'>@@ -3630,9 +3672,10 @@ out:</div><div class='ctx'> </div><div class='ctx'> static bool icl_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				 struct intel_shared_dpll *pll,</div><div class='del'>-				 struct intel_dpll_hw_state *hw_state,</div><div class='add'>+				 struct intel_dpll_hw_state *dpll_hw_state,</div><div class='ctx'> 				 i915_reg_t enable_reg)</div><div class='ctx'> {</div><div class='add'>+	struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	bool ret = false;</div><div class='hunk'>@@ -3690,24 +3733,24 @@ out:</div><div class='ctx'> </div><div class='ctx'> static bool combo_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				   struct intel_shared_dpll *pll,</div><div class='del'>-				   struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				   struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	i915_reg_t enable_reg = intel_combo_pll_enable_reg(i915, pll);</div><div class='ctx'> </div><div class='del'>-	return icl_pll_get_hw_state(i915, pll, hw_state, enable_reg);</div><div class='add'>+	return icl_pll_get_hw_state(i915, pll, dpll_hw_state, enable_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool tbt_pll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				 struct intel_shared_dpll *pll,</div><div class='del'>-				 struct intel_dpll_hw_state *hw_state)</div><div class='add'>+				 struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	return icl_pll_get_hw_state(i915, pll, hw_state, TBT_PLL_ENABLE);</div><div class='add'>+	return icl_pll_get_hw_state(i915, pll, dpll_hw_state, TBT_PLL_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void icl_dpll_write(struct drm_i915_private *i915,</div><div class='del'>-			   struct intel_shared_dpll *pll)</div><div class='add'>+			   struct intel_shared_dpll *pll,</div><div class='add'>+			   const struct icl_dpll_hw_state *hw_state)</div><div class='ctx'> {</div><div class='del'>-	struct intel_dpll_hw_state *hw_state = &amp;pll-&gt;state.hw_state;</div><div class='ctx'> 	const enum intel_dpll_id id = pll-&gt;info-&gt;id;</div><div class='ctx'> 	i915_reg_t cfgcr0_reg, cfgcr1_reg, div0_reg = INVALID_MMIO_REG;</div><div class='ctx'> </div><div class='hunk'>@@ -3747,9 +3790,9 @@ static void icl_dpll_write(struct drm_i915_private *i915,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void icl_mg_pll_write(struct drm_i915_private *i915,</div><div class='del'>-			     struct intel_shared_dpll *pll)</div><div class='add'>+			     struct intel_shared_dpll *pll,</div><div class='add'>+			     const struct icl_dpll_hw_state *hw_state)</div><div class='ctx'> {</div><div class='del'>-	struct intel_dpll_hw_state *hw_state = &amp;pll-&gt;state.hw_state;</div><div class='ctx'> 	enum tc_port tc_port = icl_pll_id_to_tc_port(pll-&gt;info-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3790,9 +3833,9 @@ static void icl_mg_pll_write(struct drm_i915_private *i915,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dkl_pll_write(struct drm_i915_private *i915,</div><div class='del'>-			  struct intel_shared_dpll *pll)</div><div class='add'>+			  struct intel_shared_dpll *pll,</div><div class='add'>+			  const struct icl_dpll_hw_state *hw_state)</div><div class='ctx'> {</div><div class='del'>-	struct intel_dpll_hw_state *hw_state = &amp;pll-&gt;state.hw_state;</div><div class='ctx'> 	enum tc_port tc_port = icl_pll_id_to_tc_port(pll-&gt;info-&gt;id);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -3905,13 +3948,15 @@ static void adlp_cmtg_clock_gating_wa(struct drm_i915_private *i915, struct inte</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void combo_pll_enable(struct drm_i915_private *i915,</div><div class='del'>-			     struct intel_shared_dpll *pll)</div><div class='add'>+			     struct intel_shared_dpll *pll,</div><div class='add'>+			     const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	i915_reg_t enable_reg = intel_combo_pll_enable_reg(i915, pll);</div><div class='ctx'> </div><div class='ctx'> 	icl_pll_power_enable(i915, pll, enable_reg);</div><div class='ctx'> </div><div class='del'>-	icl_dpll_write(i915, pll);</div><div class='add'>+	icl_dpll_write(i915, pll, hw_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * DVFS pre sequence would be here, but in our driver the cdclk code</div><div class='hunk'>@@ -3927,11 +3972,14 @@ static void combo_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tbt_pll_enable(struct drm_i915_private *i915,</div><div class='del'>-			   struct intel_shared_dpll *pll)</div><div class='add'>+			   struct intel_shared_dpll *pll,</div><div class='add'>+			   const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='add'>+</div><div class='ctx'> 	icl_pll_power_enable(i915, pll, TBT_PLL_ENABLE);</div><div class='ctx'> </div><div class='del'>-	icl_dpll_write(i915, pll);</div><div class='add'>+	icl_dpll_write(i915, pll, hw_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * DVFS pre sequence would be here, but in our driver the cdclk code</div><div class='hunk'>@@ -3945,16 +3993,18 @@ static void tbt_pll_enable(struct drm_i915_private *i915,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mg_pll_enable(struct drm_i915_private *i915,</div><div class='del'>-			  struct intel_shared_dpll *pll)</div><div class='add'>+			  struct intel_shared_dpll *pll,</div><div class='add'>+			  const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='add'>+	const struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='ctx'> 	i915_reg_t enable_reg = intel_tc_pll_enable_reg(i915, pll);</div><div class='ctx'> </div><div class='ctx'> 	icl_pll_power_enable(i915, pll, enable_reg);</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 12)</div><div class='del'>-		dkl_pll_write(i915, pll);</div><div class='add'>+		dkl_pll_write(i915, pll, hw_state);</div><div class='ctx'> 	else</div><div class='del'>-		icl_mg_pll_write(i915, pll);</div><div class='add'>+		icl_mg_pll_write(i915, pll, hw_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * DVFS pre sequence would be here, but in our driver the cdclk code</div><div class='hunk'>@@ -4026,33 +4076,36 @@ static void icl_update_dpll_ref_clks(struct drm_i915_private *i915)</div><div class='ctx'> 	i915-&gt;display.dpll.ref_clks.nssc = i915-&gt;display.cdclk.hw.ref;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void icl_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state)</div><div class='add'>+static void icl_dump_hw_state(struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='del'>-		    "dpll_hw_state: cfgcr0: 0x%x, cfgcr1: 0x%x, div0: 0x%x, "</div><div class='del'>-		    "mg_refclkin_ctl: 0x%x, hg_clktop2_coreclkctl1: 0x%x, "</div><div class='del'>-		    "mg_clktop2_hsclkctl: 0x%x, mg_pll_div0: 0x%x, "</div><div class='del'>-		    "mg_pll_div2: 0x%x, mg_pll_lf: 0x%x, "</div><div class='del'>-		    "mg_pll_frac_lock: 0x%x, mg_pll_ssc: 0x%x, "</div><div class='del'>-		    "mg_pll_bias: 0x%x, mg_pll_tdc_coldst_bias: 0x%x\n",</div><div class='del'>-		    hw_state-&gt;cfgcr0, hw_state-&gt;cfgcr1,</div><div class='del'>-		    hw_state-&gt;div0,</div><div class='del'>-		    hw_state-&gt;mg_refclkin_ctl,</div><div class='del'>-		    hw_state-&gt;mg_clktop2_coreclkctl1,</div><div class='del'>-		    hw_state-&gt;mg_clktop2_hsclkctl,</div><div class='del'>-		    hw_state-&gt;mg_pll_div0,</div><div class='del'>-		    hw_state-&gt;mg_pll_div1,</div><div class='del'>-		    hw_state-&gt;mg_pll_lf,</div><div class='del'>-		    hw_state-&gt;mg_pll_frac_lock,</div><div class='del'>-		    hw_state-&gt;mg_pll_ssc,</div><div class='del'>-		    hw_state-&gt;mg_pll_bias,</div><div class='del'>-		    hw_state-&gt;mg_pll_tdc_coldst_bias);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool icl_compare_hw_state(const struct intel_dpll_hw_state *a,</div><div class='del'>-				 const struct intel_dpll_hw_state *b)</div><div class='add'>+	const struct icl_dpll_hw_state *hw_state = &amp;dpll_hw_state-&gt;icl;</div><div class='add'>+</div><div class='add'>+	drm_printf(p, "dpll_hw_state: cfgcr0: 0x%x, cfgcr1: 0x%x, div0: 0x%x, "</div><div class='add'>+		   "mg_refclkin_ctl: 0x%x, hg_clktop2_coreclkctl1: 0x%x, "</div><div class='add'>+		   "mg_clktop2_hsclkctl: 0x%x, mg_pll_div0: 0x%x, "</div><div class='add'>+		   "mg_pll_div2: 0x%x, mg_pll_lf: 0x%x, "</div><div class='add'>+		   "mg_pll_frac_lock: 0x%x, mg_pll_ssc: 0x%x, "</div><div class='add'>+		   "mg_pll_bias: 0x%x, mg_pll_tdc_coldst_bias: 0x%x\n",</div><div class='add'>+		   hw_state-&gt;cfgcr0, hw_state-&gt;cfgcr1, hw_state-&gt;div0,</div><div class='add'>+		   hw_state-&gt;mg_refclkin_ctl,</div><div class='add'>+		   hw_state-&gt;mg_clktop2_coreclkctl1,</div><div class='add'>+		   hw_state-&gt;mg_clktop2_hsclkctl,</div><div class='add'>+		   hw_state-&gt;mg_pll_div0,</div><div class='add'>+		   hw_state-&gt;mg_pll_div1,</div><div class='add'>+		   hw_state-&gt;mg_pll_lf,</div><div class='add'>+		   hw_state-&gt;mg_pll_frac_lock,</div><div class='add'>+		   hw_state-&gt;mg_pll_ssc,</div><div class='add'>+		   hw_state-&gt;mg_pll_bias,</div><div class='add'>+		   hw_state-&gt;mg_pll_tdc_coldst_bias);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool icl_compare_hw_state(const struct intel_dpll_hw_state *_a,</div><div class='add'>+				 const struct intel_dpll_hw_state *_b)</div><div class='ctx'> {</div><div class='add'>+	const struct icl_dpll_hw_state *a = &amp;_a-&gt;icl;</div><div class='add'>+	const struct icl_dpll_hw_state *b = &amp;_b-&gt;icl;</div><div class='add'>+</div><div class='ctx'> 	/* FIXME split combo vs. mg more thoroughly */</div><div class='ctx'> 	return a-&gt;cfgcr0 == b-&gt;cfgcr0 &amp;&amp;</div><div class='ctx'> 		a-&gt;cfgcr1 == b-&gt;cfgcr1 &amp;&amp;</div><div class='hunk'>@@ -4417,33 +4470,33 @@ void intel_update_active_dpll(struct intel_atomic_state *state,</div><div class='ctx'>  * intel_dpll_get_freq - calculate the DPLL's output frequency</div><div class='ctx'>  * @i915: i915 device</div><div class='ctx'>  * @pll: DPLL for which to calculate the output frequency</div><div class='del'>- * @pll_state: DPLL state from which to calculate the output frequency</div><div class='add'>+ * @dpll_hw_state: DPLL state from which to calculate the output frequency</div><div class='ctx'>  *</div><div class='del'>- * Return the output frequency corresponding to @pll's passed in @pll_state.</div><div class='add'>+ * Return the output frequency corresponding to @pll's passed in @dpll_hw_state.</div><div class='ctx'>  */</div><div class='ctx'> int intel_dpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 			const struct intel_shared_dpll *pll,</div><div class='del'>-			const struct intel_dpll_hw_state *pll_state)</div><div class='add'>+			const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, !pll-&gt;info-&gt;funcs-&gt;get_freq))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return pll-&gt;info-&gt;funcs-&gt;get_freq(i915, pll, pll_state);</div><div class='add'>+	return pll-&gt;info-&gt;funcs-&gt;get_freq(i915, pll, dpll_hw_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * intel_dpll_get_hw_state - readout the DPLL's hardware state</div><div class='ctx'>  * @i915: i915 device</div><div class='ctx'>  * @pll: DPLL for which to calculate the output frequency</div><div class='del'>- * @hw_state: DPLL's hardware state</div><div class='add'>+ * @dpll_hw_state: DPLL's hardware state</div><div class='ctx'>  *</div><div class='del'>- * Read out @pll's hardware state into @hw_state.</div><div class='add'>+ * Read out @pll's hardware state into @dpll_hw_state.</div><div class='ctx'>  */</div><div class='ctx'> bool intel_dpll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 			     struct intel_shared_dpll *pll,</div><div class='del'>-			     struct intel_dpll_hw_state *hw_state)</div><div class='add'>+			     struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='del'>-	return pll-&gt;info-&gt;funcs-&gt;get_hw_state(i915, pll, hw_state);</div><div class='add'>+	return pll-&gt;info-&gt;funcs-&gt;get_hw_state(i915, pll, dpll_hw_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void readout_dpll_hw_state(struct drm_i915_private *i915,</div><div class='hunk'>@@ -4514,22 +4567,24 @@ void intel_dpll_sanitize_state(struct drm_i915_private *i915)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * intel_dpll_dump_hw_state - write hw_state to dmesg</div><div class='add'>+ * intel_dpll_dump_hw_state - dump hw_state</div><div class='ctx'>  * @i915: i915 drm device</div><div class='del'>- * @hw_state: hw state to be written to the log</div><div class='add'>+ * @p: where to print the state to</div><div class='add'>+ * @dpll_hw_state: hw state to be dumped</div><div class='ctx'>  *</div><div class='del'>- * Write the relevant values in @hw_state to dmesg using drm_dbg_kms.</div><div class='add'>+ * Dumo out the relevant values in @dpll_hw_state.</div><div class='ctx'>  */</div><div class='ctx'> void intel_dpll_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state)</div><div class='add'>+			      struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state)</div><div class='ctx'> {</div><div class='ctx'> 	if (i915-&gt;display.dpll.mgr) {</div><div class='del'>-		i915-&gt;display.dpll.mgr-&gt;dump_hw_state(i915, hw_state);</div><div class='add'>+		i915-&gt;display.dpll.mgr-&gt;dump_hw_state(p, dpll_hw_state);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* fallback for platforms that don't use the shared dpll</div><div class='ctx'> 		 * infrastructure</div><div class='ctx'> 		 */</div><div class='del'>-		ibx_dump_hw_state(i915, hw_state);</div><div class='add'>+		ibx_dump_hw_state(p, dpll_hw_state);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h<br/>index cc0e1386309d..f09e513ce05b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll_mgr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dpll_mgr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dpll_mgr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dpll_mgr.h</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> </div><div class='ctx'> enum tc_port;</div><div class='ctx'> struct drm_i915_private;</div><div class='add'>+struct drm_printer;</div><div class='ctx'> struct intel_atomic_state;</div><div class='ctx'> struct intel_crtc;</div><div class='ctx'> struct intel_crtc_state;</div><div class='hunk'>@@ -180,18 +181,19 @@ enum icl_port_dpll_id {</div><div class='ctx'> 	ICL_PORT_DPLL_COUNT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct intel_dpll_hw_state {</div><div class='del'>-	/* i9xx, pch plls */</div><div class='add'>+struct i9xx_dpll_hw_state {</div><div class='ctx'> 	u32 dpll;</div><div class='ctx'> 	u32 dpll_md;</div><div class='ctx'> 	u32 fp0;</div><div class='ctx'> 	u32 fp1;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* hsw, bdw */</div><div class='add'>+struct hsw_dpll_hw_state {</div><div class='ctx'> 	u32 wrpll;</div><div class='ctx'> 	u32 spll;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* skl */</div><div class='add'>+struct skl_dpll_hw_state {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * DPLL_CTRL1 has 6 bits for each each this DPLL. We store those in</div><div class='ctx'> 	 * lower part of ctrl1 and they get shifted into position when writing</div><div class='hunk'>@@ -201,20 +203,18 @@ struct intel_dpll_hw_state {</div><div class='ctx'> 	u32 ctrl1;</div><div class='ctx'> 	/* HDMI only, 0 when used for DP */</div><div class='ctx'> 	u32 cfgcr1, cfgcr2;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* icl */</div><div class='del'>-	u32 cfgcr0;</div><div class='add'>+struct bxt_dpll_hw_state {</div><div class='add'>+	u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct icl_dpll_hw_state {</div><div class='add'>+	u32 cfgcr0, cfgcr1;</div><div class='ctx'> </div><div class='ctx'> 	/* tgl */</div><div class='ctx'> 	u32 div0;</div><div class='ctx'> </div><div class='del'>-	/* bxt */</div><div class='del'>-	u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * ICL uses the following, already defined:</div><div class='del'>-	 * u32 cfgcr0, cfgcr1;</div><div class='del'>-	 */</div><div class='ctx'> 	u32 mg_refclkin_ctl;</div><div class='ctx'> 	u32 mg_clktop2_coreclkctl1;</div><div class='ctx'> 	u32 mg_clktop2_hsclkctl;</div><div class='hunk'>@@ -229,6 +229,55 @@ struct intel_dpll_hw_state {</div><div class='ctx'> 	u32 mg_pll_tdc_coldst_bias_mask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct intel_mpllb_state {</div><div class='add'>+	u32 clock; /* in KHz */</div><div class='add'>+	u32 ref_control;</div><div class='add'>+	u32 mpllb_cp;</div><div class='add'>+	u32 mpllb_div;</div><div class='add'>+	u32 mpllb_div2;</div><div class='add'>+	u32 mpllb_fracn1;</div><div class='add'>+	u32 mpllb_fracn2;</div><div class='add'>+	u32 mpllb_sscen;</div><div class='add'>+	u32 mpllb_sscstep;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct intel_c10pll_state {</div><div class='add'>+	u32 clock; /* in KHz */</div><div class='add'>+	u8 tx;</div><div class='add'>+	u8 cmn;</div><div class='add'>+	u8 pll[20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct intel_c20pll_state {</div><div class='add'>+	u32 clock; /* in kHz */</div><div class='add'>+	u16 tx[3];</div><div class='add'>+	u16 cmn[4];</div><div class='add'>+	union {</div><div class='add'>+		u16 mplla[10];</div><div class='add'>+		u16 mpllb[11];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct intel_cx0pll_state {</div><div class='add'>+	union {</div><div class='add'>+		struct intel_c10pll_state c10;</div><div class='add'>+		struct intel_c20pll_state c20;</div><div class='add'>+	};</div><div class='add'>+	bool ssc_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct intel_dpll_hw_state {</div><div class='add'>+	union {</div><div class='add'>+		struct i9xx_dpll_hw_state i9xx;</div><div class='add'>+		struct hsw_dpll_hw_state hsw;</div><div class='add'>+		struct skl_dpll_hw_state skl;</div><div class='add'>+		struct bxt_dpll_hw_state bxt;</div><div class='add'>+		struct icl_dpll_hw_state icl;</div><div class='add'>+		struct intel_mpllb_state mpllb;</div><div class='add'>+		struct intel_cx0pll_state cx0pll;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct intel_shared_dpll_state - hold the DPLL atomic state</div><div class='ctx'>  *</div><div class='hunk'>@@ -364,10 +413,10 @@ void intel_update_active_dpll(struct intel_atomic_state *state,</div><div class='ctx'> 			      struct intel_encoder *encoder);</div><div class='ctx'> int intel_dpll_get_freq(struct drm_i915_private *i915,</div><div class='ctx'> 			const struct intel_shared_dpll *pll,</div><div class='del'>-			const struct intel_dpll_hw_state *pll_state);</div><div class='add'>+			const struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> bool intel_dpll_get_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 			     struct intel_shared_dpll *pll,</div><div class='del'>-			     struct intel_dpll_hw_state *hw_state);</div><div class='add'>+			     struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);</div><div class='ctx'> void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);</div><div class='ctx'> void intel_shared_dpll_swap_state(struct intel_atomic_state *state);</div><div class='hunk'>@@ -377,7 +426,8 @@ void intel_dpll_readout_hw_state(struct drm_i915_private *i915);</div><div class='ctx'> void intel_dpll_sanitize_state(struct drm_i915_private *i915);</div><div class='ctx'> </div><div class='ctx'> void intel_dpll_dump_hw_state(struct drm_i915_private *i915,</div><div class='del'>-			      const struct intel_dpll_hw_state *hw_state);</div><div class='add'>+			      struct drm_printer *p,</div><div class='add'>+			      const struct intel_dpll_hw_state *dpll_hw_state);</div><div class='ctx'> bool intel_dpll_compare_hw_state(struct drm_i915_private *i915,</div><div class='ctx'> 				 const struct intel_dpll_hw_state *a,</div><div class='ctx'> 				 const struct intel_dpll_hw_state *b);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c<br/>index e4515bf92038..4baaa92ceaec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dsb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dsb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dsb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dsb.c</a></div><div class='hunk'>@@ -343,12 +343,13 @@ static int intel_dsb_dewake_scanline(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> static u32 dsb_chicken(struct intel_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	if (crtc-&gt;mode_flags &amp; I915_MODE_FLAG_VRR)</div><div class='del'>-		return DSB_CTRL_WAIT_SAFE_WINDOW |</div><div class='add'>+		return DSB_SKIP_WAITS_EN |</div><div class='add'>+			DSB_CTRL_WAIT_SAFE_WINDOW |</div><div class='ctx'> 			DSB_CTRL_NO_WAIT_VBLANK |</div><div class='ctx'> 			DSB_INST_WAIT_SAFE_WINDOW |</div><div class='ctx'> 			DSB_INST_NO_WAIT_VBLANK;</div><div class='ctx'> 	else</div><div class='del'>-		return 0;</div><div class='add'>+		return DSB_SKIP_WAITS_EN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c<br/>index d3cf6a652221..bd5888ce4852 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dsi.c</a></div><div class='hunk'>@@ -64,14 +64,11 @@ enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	struct intel_connector *intel_connector = to_intel_connector(connector);</div><div class='ctx'> 	const struct drm_display_mode *fixed_mode =</div><div class='ctx'> 		intel_panel_fixed_mode(intel_connector, mode);</div><div class='del'>-	int max_dotclk = to_i915(connector-&gt;dev)-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = to_i915(connector-&gt;dev)-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='del'>-		return MODE_NO_DBLESCAN;</div><div class='del'>-</div><div class='ctx'> 	status = intel_panel_mode_valid(intel_connector, mode);</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c<br/>index c076da75b066..1840f5b59229 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dvo.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_dvo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_dvo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_dvo.c</a></div><div class='hunk'>@@ -223,7 +223,7 @@ intel_dvo_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);</div><div class='ctx'> 	const struct drm_display_mode *fixed_mode =</div><div class='ctx'> 		intel_panel_fixed_mode(connector, mode);</div><div class='del'>-	int max_dotclk = to_i915(connector-&gt;base.dev)-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = to_i915(connector-&gt;base.dev)-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	int target_clock = mode-&gt;clock;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> </div><div class='hunk'>@@ -231,9 +231,6 @@ intel_dvo_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='del'>-		return MODE_NO_DBLESCAN;</div><div class='del'>-</div><div class='ctx'> 	/* XXX: Validate clock range */</div><div class='ctx'> </div><div class='ctx'> 	if (fixed_mode) {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c<br/>index 3ea6470d6d92..86b443433e8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_fb.c</a></div><div class='hunk'>@@ -1106,7 +1106,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(fb-&gt;dev);</div><div class='ctx'> 	unsigned int height;</div><div class='del'>-	u32 alignment;</div><div class='add'>+	u32 alignment, unused;</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &gt;= 12 &amp;&amp;</div><div class='ctx'> 	    !intel_fb_needs_pot_stride_remap(to_intel_framebuffer(fb)) &amp;&amp;</div><div class='hunk'>@@ -1128,8 +1128,8 @@ static int intel_fb_offset_to_xy(int *x, int *y,</div><div class='ctx'> 	height = ALIGN(height, intel_tile_height(fb, color_plane));</div><div class='ctx'> </div><div class='ctx'> 	/* Catch potential overflows early */</div><div class='del'>-	if (add_overflows_t(u32, mul_u32_u32(height, fb-&gt;pitches[color_plane]),</div><div class='del'>-			    fb-&gt;offsets[color_plane])) {</div><div class='add'>+	if (check_add_overflow(mul_u32_u32(height, fb-&gt;pitches[color_plane]),</div><div class='add'>+			       fb-&gt;offsets[color_plane], &amp;unused)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "Bad offset 0x%08x or pitch %d for color plane %d\n",</div><div class='ctx'> 			    fb-&gt;offsets[color_plane], fb-&gt;pitches[color_plane],</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c<br/>index b453fcbd67da..151dcd0c45b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_fbc.c</a></div><div class='hunk'>@@ -54,6 +54,7 @@</div><div class='ctx'> #include "intel_display_trace.h"</div><div class='ctx'> #include "intel_display_types.h"</div><div class='ctx'> #include "intel_fbc.h"</div><div class='add'>+#include "intel_fbc_regs.h"</div><div class='ctx'> #include "intel_frontbuffer.h"</div><div class='ctx'> </div><div class='ctx'> #define for_each_fbc_id(__dev_priv, __fbc_id) \</div><div class='hunk'>@@ -826,10 +827,36 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc)</div><div class='ctx'> </div><div class='ctx'> static void intel_fbc_program_workarounds(struct intel_fbc *fbc)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = fbc-&gt;i915;</div><div class='add'>+</div><div class='add'>+	if (IS_SKYLAKE(i915) || IS_BROXTON(i915)) {</div><div class='add'>+		/*</div><div class='add'>+		 * WaFbcHighMemBwCorruptionAvoidance:skl,bxt</div><div class='add'>+		 * Display WA #0883: skl,bxt</div><div class='add'>+		 */</div><div class='add'>+		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc-&gt;id),</div><div class='add'>+			     0, DPFC_DISABLE_DUMMY0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_SKYLAKE(i915) || IS_KABYLAKE(i915) ||</div><div class='add'>+	    IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) {</div><div class='add'>+		/*</div><div class='add'>+		 * WaFbcNukeOnHostModify:skl,kbl,cfl</div><div class='add'>+		 * Display WA #0873: skl,kbl,cfl</div><div class='add'>+		 */</div><div class='add'>+		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc-&gt;id),</div><div class='add'>+			     0, DPFC_NUKE_ON_ANY_MODIFICATION);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Wa_1409120013:icl,jsl,tgl,dg1 */</div><div class='add'>+	if (IS_DISPLAY_VER(i915, 11, 12))</div><div class='add'>+		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc-&gt;id),</div><div class='add'>+			     0, DPFC_CHICKEN_COMP_DUMMY_PIXEL);</div><div class='add'>+</div><div class='ctx'> 	/* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp,mtl */</div><div class='del'>-	if (DISPLAY_VER(fbc-&gt;i915) &gt;= 11 &amp;&amp; !IS_DG2(fbc-&gt;i915))</div><div class='del'>-		intel_de_rmw(fbc-&gt;i915, ILK_DPFC_CHICKEN(fbc-&gt;id), 0,</div><div class='del'>-			     DPFC_CHICKEN_FORCE_SLB_INVALIDATION);</div><div class='add'>+	if (DISPLAY_VER(i915) &gt;= 11 &amp;&amp; !IS_DG2(i915))</div><div class='add'>+		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc-&gt;id),</div><div class='add'>+			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h b/drivers/gpu/drm/i915/display/intel_fbc_regs.h<br/>new file mode 100644<br/>index 000000000000..ae0699c3c2fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbc_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_fbc_regs.h</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/* Copyright © 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef __INTEL_FBC_REGS__</div><div class='add'>+#define __INTEL_FBC_REGS__</div><div class='add'>+</div><div class='add'>+#include "intel_display_reg_defs.h"</div><div class='add'>+</div><div class='add'>+#define FBC_CFB_BASE		_MMIO(0x3200) /* 4k page aligned */</div><div class='add'>+#define FBC_LL_BASE		_MMIO(0x3204) /* 4k page aligned */</div><div class='add'>+#define FBC_CONTROL		_MMIO(0x3208)</div><div class='add'>+#define   FBC_CTL_EN			REG_BIT(31)</div><div class='add'>+#define   FBC_CTL_PERIODIC		REG_BIT(30)</div><div class='add'>+#define   FBC_CTL_INTERVAL_MASK		REG_GENMASK(29, 16)</div><div class='add'>+#define   FBC_CTL_INTERVAL(x)		REG_FIELD_PREP(FBC_CTL_INTERVAL_MASK, (x))</div><div class='add'>+#define   FBC_CTL_STOP_ON_MOD		REG_BIT(15)</div><div class='add'>+#define   FBC_CTL_UNCOMPRESSIBLE	REG_BIT(14) /* i915+ */</div><div class='add'>+#define   FBC_CTL_C3_IDLE		REG_BIT(13) /* i945gm only */</div><div class='add'>+#define   FBC_CTL_STRIDE_MASK		REG_GENMASK(12, 5)</div><div class='add'>+#define   FBC_CTL_STRIDE(x)		REG_FIELD_PREP(FBC_CTL_STRIDE_MASK, (x))</div><div class='add'>+#define   FBC_CTL_FENCENO_MASK		REG_GENMASK(3, 0)</div><div class='add'>+#define   FBC_CTL_FENCENO(x)		REG_FIELD_PREP(FBC_CTL_FENCENO_MASK, (x))</div><div class='add'>+#define FBC_COMMAND		_MMIO(0x320c)</div><div class='add'>+#define   FBC_CMD_COMPRESS		REG_BIT(0)</div><div class='add'>+#define FBC_STATUS		_MMIO(0x3210)</div><div class='add'>+#define   FBC_STAT_COMPRESSING		REG_BIT(31)</div><div class='add'>+#define   FBC_STAT_COMPRESSED		REG_BIT(30)</div><div class='add'>+#define   FBC_STAT_MODIFIED		REG_BIT(29)</div><div class='add'>+#define   FBC_STAT_CURRENT_LINE_MASK	REG_GENMASK(10, 0)</div><div class='add'>+#define FBC_CONTROL2		_MMIO(0x3214) /* i965gm only */</div><div class='add'>+#define   FBC_CTL_FENCE_DBL		REG_BIT(4)</div><div class='add'>+#define   FBC_CTL_IDLE_MASK		REG_GENMASK(3, 2)</div><div class='add'>+#define   FBC_CTL_IDLE_IMM		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 0)</div><div class='add'>+#define   FBC_CTL_IDLE_FULL		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 1)</div><div class='add'>+#define   FBC_CTL_IDLE_LINE		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 2)</div><div class='add'>+#define   FBC_CTL_IDLE_DEBUG		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 3)</div><div class='add'>+#define   FBC_CTL_CPU_FENCE_EN		REG_BIT(1)</div><div class='add'>+#define   FBC_CTL_PLANE_MASK		REG_GENMASK(1, 0)</div><div class='add'>+#define   FBC_CTL_PLANE(i9xx_plane)	REG_FIELD_PREP(FBC_CTL_PLANE_MASK, (i9xx_plane))</div><div class='add'>+#define FBC_FENCE_OFF		_MMIO(0x3218)  /* i965gm only, BSpec typo has 321Bh */</div><div class='add'>+#define FBC_MOD_NUM		_MMIO(0x3220)  /* i965gm only */</div><div class='add'>+#define   FBC_MOD_NUM_MASK		REG_GENMASK(31, 1)</div><div class='add'>+#define   FBC_MOD_NUM_VALID		REG_BIT(0)</div><div class='add'>+#define FBC_TAG(i)		_MMIO(0x3300 + (i) * 4) /* 49 reisters */</div><div class='add'>+#define   FBC_TAG_MASK			REG_GENMASK(1, 0) /* 16 tags per register */</div><div class='add'>+#define   FBC_TAG_MODIFIED		REG_FIELD_PREP(FBC_TAG_MASK, 0)</div><div class='add'>+#define   FBC_TAG_UNCOMPRESSED		REG_FIELD_PREP(FBC_TAG_MASK, 1)</div><div class='add'>+#define   FBC_TAG_UNCOMPRESSIBLE	REG_FIELD_PREP(FBC_TAG_MASK, 2)</div><div class='add'>+#define   FBC_TAG_COMPRESSED		REG_FIELD_PREP(FBC_TAG_MASK, 3)</div><div class='add'>+</div><div class='add'>+#define FBC_LL_SIZE		(1536)</div><div class='add'>+</div><div class='add'>+#define DPFC_CB_BASE			_MMIO(0x3200)</div><div class='add'>+#define ILK_DPFC_CB_BASE(fbc_id)	_MMIO_PIPE((fbc_id), 0x43200, 0x43240)</div><div class='add'>+#define DPFC_CONTROL			_MMIO(0x3208)</div><div class='add'>+#define ILK_DPFC_CONTROL(fbc_id)	_MMIO_PIPE((fbc_id), 0x43208, 0x43248)</div><div class='add'>+#define   DPFC_CTL_EN				REG_BIT(31)</div><div class='add'>+#define   DPFC_CTL_PLANE_MASK_G4X		REG_BIT(30) /* g4x-snb */</div><div class='add'>+#define   DPFC_CTL_PLANE_G4X(i9xx_plane)	REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_G4X, (i9xx_plane))</div><div class='add'>+#define   DPFC_CTL_FENCE_EN_G4X			REG_BIT(29) /* g4x-snb */</div><div class='add'>+#define   DPFC_CTL_PLANE_MASK_IVB		REG_GENMASK(30, 29) /* ivb only */</div><div class='add'>+#define   DPFC_CTL_PLANE_IVB(i9xx_plane)	REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_IVB, (i9xx_plane))</div><div class='add'>+#define   DPFC_CTL_FENCE_EN_IVB			REG_BIT(28) /* ivb+ */</div><div class='add'>+#define   DPFC_CTL_PERSISTENT_MODE		REG_BIT(25) /* g4x-snb */</div><div class='add'>+#define   DPFC_CTL_PLANE_BINDING_MASK		REG_GENMASK(12, 11) /* lnl+ */</div><div class='add'>+#define   DPFC_CTL_PLANE_BINDING(plane_id)	REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id))</div><div class='add'>+#define   DPFC_CTL_FALSE_COLOR			REG_BIT(10) /* ivb+ */</div><div class='add'>+#define   DPFC_CTL_SR_EN			REG_BIT(10) /* g4x only */</div><div class='add'>+#define   DPFC_CTL_SR_EXIT_DIS			REG_BIT(9) /* g4x only */</div><div class='add'>+#define   DPFC_CTL_LIMIT_MASK			REG_GENMASK(7, 6)</div><div class='add'>+#define   DPFC_CTL_LIMIT_1X			REG_FIELD_PREP(DPFC_CTL_LIMIT_MASK, 0)</div><div class='add'>+#define   DPFC_CTL_LIMIT_2X			REG_FIELD_PREP(DPFC_CTL_LIMIT_MASK, 1)</div><div class='add'>+#define   DPFC_CTL_LIMIT_4X			REG_FIELD_PREP(DPFC_CTL_LIMIT_MASK, 2)</div><div class='add'>+#define   DPFC_CTL_FENCENO_MASK			REG_GENMASK(3, 0)</div><div class='add'>+#define   DPFC_CTL_FENCENO(fence)		REG_FIELD_PREP(DPFC_CTL_FENCENO_MASK, (fence))</div><div class='add'>+#define DPFC_RECOMP_CTL			_MMIO(0x320c)</div><div class='add'>+#define ILK_DPFC_RECOMP_CTL(fbc_id)	_MMIO_PIPE((fbc_id), 0x4320c, 0x4324c)</div><div class='add'>+#define   DPFC_RECOMP_STALL_EN			REG_BIT(27)</div><div class='add'>+#define   DPFC_RECOMP_STALL_WM_MASK		REG_GENMASK(26, 16)</div><div class='add'>+#define   DPFC_RECOMP_TIMER_COUNT_MASK		REG_GENMASK(5, 0)</div><div class='add'>+#define DPFC_STATUS			_MMIO(0x3210)</div><div class='add'>+#define ILK_DPFC_STATUS(fbc_id)		_MMIO_PIPE((fbc_id), 0x43210, 0x43250)</div><div class='add'>+#define   DPFC_INVAL_SEG_MASK			REG_GENMASK(26, 16)</div><div class='add'>+#define   DPFC_COMP_SEG_MASK			REG_GENMASK(10, 0)</div><div class='add'>+#define DPFC_STATUS2			_MMIO(0x3214)</div><div class='add'>+#define ILK_DPFC_STATUS2(fbc_id)	_MMIO_PIPE((fbc_id), 0x43214, 0x43254)</div><div class='add'>+#define   DPFC_COMP_SEG_MASK_IVB		REG_GENMASK(11, 0)</div><div class='add'>+#define DPFC_FENCE_YOFF			_MMIO(0x3218)</div><div class='add'>+#define ILK_DPFC_FENCE_YOFF(fbc_id)	_MMIO_PIPE((fbc_id), 0x43218, 0x43258)</div><div class='add'>+#define DPFC_CHICKEN			_MMIO(0x3224)</div><div class='add'>+#define ILK_DPFC_CHICKEN(fbc_id)	_MMIO_PIPE((fbc_id), 0x43224, 0x43264)</div><div class='add'>+#define   DPFC_HT_MODIFY			REG_BIT(31) /* pre-ivb */</div><div class='add'>+#define   DPFC_NUKE_ON_ANY_MODIFICATION		REG_BIT(23) /* bdw+ */</div><div class='add'>+#define   DPFC_CHICKEN_COMP_DUMMY_PIXEL		REG_BIT(14) /* glk+ */</div><div class='add'>+#define   DPFC_CHICKEN_FORCE_SLB_INVALIDATION	REG_BIT(13) /* icl+ */</div><div class='add'>+#define   DPFC_DISABLE_DUMMY0			REG_BIT(8) /* ivb+ */</div><div class='add'>+</div><div class='add'>+#define GLK_FBC_STRIDE(fbc_id)	_MMIO_PIPE((fbc_id), 0x43228, 0x43268)</div><div class='add'>+#define   FBC_STRIDE_OVERRIDE	REG_BIT(15)</div><div class='add'>+#define   FBC_STRIDE_MASK	REG_GENMASK(14, 0)</div><div class='add'>+#define   FBC_STRIDE(x)		REG_FIELD_PREP(FBC_STRIDE_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define ILK_FBC_RT_BASE		_MMIO(0x2128)</div><div class='add'>+#define   ILK_FBC_RT_VALID	REG_BIT(0)</div><div class='add'>+#define   SNB_FBC_FRONT_BUFFER	REG_BIT(1)</div><div class='add'>+</div><div class='add'>+#define SNB_DPFC_CTL_SA		_MMIO(0x100100)</div><div class='add'>+#define   SNB_DPFC_FENCE_EN		REG_BIT(29)</div><div class='add'>+#define   SNB_DPFC_FENCENO_MASK		REG_GENMASK(4, 0)</div><div class='add'>+#define   SNB_DPFC_FENCENO(fence)	REG_FIELD_PREP(SNB_DPFC_FENCENO_MASK, (fence))</div><div class='add'>+#define SNB_DPFC_CPU_FENCE_OFFSET	_MMIO(0x100104)</div><div class='add'>+</div><div class='add'>+#define IVB_FBC_RT_BASE			_MMIO(0x7020)</div><div class='add'>+#define IVB_FBC_RT_BASE_UPPER		_MMIO(0x7024)</div><div class='add'>+</div><div class='add'>+#define MSG_FBC_REND_STATE(fbc_id)	_MMIO_PIPE((fbc_id), 0x50380, 0x50384)</div><div class='add'>+#define   FBC_REND_NUKE			REG_BIT(2)</div><div class='add'>+#define   FBC_REND_CACHE_CLEAN		REG_BIT(1)</div><div class='add'>+</div><div class='add'>+#endif /* __INTEL_FBC_REGS__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c<br/>index 99894a855ef0..bda702c2cab8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbdev.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbdev.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_fbdev.c</a></div><div class='hunk'>@@ -24,7 +24,6 @@</div><div class='ctx'>  *     David Airlie</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/async.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='hunk'>@@ -39,6 +38,7 @@</div><div class='ctx'> #include &lt;linux/vga_switcheroo.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_crtc.h&gt;</div><div class='add'>+#include &lt;drm/drm_crtc_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_fb_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_fourcc.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_framebuffer_helper.h&gt;</div><div class='hunk'>@@ -58,7 +58,6 @@ struct intel_fbdev {</div><div class='ctx'> 	struct intel_framebuffer *fb;</div><div class='ctx'> 	struct i915_vma *vma;</div><div class='ctx'> 	unsigned long vma_flags;</div><div class='del'>-	async_cookie_t cookie;</div><div class='ctx'> 	int preferred_bpp;</div><div class='ctx'> </div><div class='ctx'> 	/* Whether or not fbdev hpd processing is temporarily suspended */</div><div class='hunk'>@@ -135,6 +134,29 @@ static int intel_fbdev_mmap(struct fb_info *info, struct vm_area_struct *vma)</div><div class='ctx'> 	return i915_gem_fb_mmap(obj, vma);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_fbdev_fb_destroy(struct fb_info *info)</div><div class='add'>+{</div><div class='add'>+	struct drm_fb_helper *fb_helper = info-&gt;par;</div><div class='add'>+	struct intel_fbdev *ifbdev = container_of(fb_helper, struct intel_fbdev, helper);</div><div class='add'>+</div><div class='add'>+	drm_fb_helper_fini(&amp;ifbdev-&gt;helper);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We rely on the object-free to release the VMA pinning for</div><div class='add'>+	 * the info-&gt;screen_base mmaping. Leaking the VMA is simpler than</div><div class='add'>+	 * trying to rectify all the possible error paths leading here.</div><div class='add'>+	 */</div><div class='add'>+	intel_unpin_fb_vma(ifbdev-&gt;vma, ifbdev-&gt;vma_flags);</div><div class='add'>+	drm_framebuffer_remove(&amp;ifbdev-&gt;fb-&gt;base);</div><div class='add'>+</div><div class='add'>+	drm_client_release(&amp;fb_helper-&gt;client);</div><div class='add'>+	drm_fb_helper_unprepare(&amp;ifbdev-&gt;helper);</div><div class='add'>+	kfree(ifbdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__diag_push();</div><div class='add'>+__diag_ignore_all("-Woverride-init", "Allow field initialization overrides for fb ops");</div><div class='add'>+</div><div class='ctx'> static const struct fb_ops intelfb_ops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	__FB_DEFAULT_DEFERRED_OPS_RDWR(intel_fbdev),</div><div class='hunk'>@@ -144,8 +166,11 @@ static const struct fb_ops intelfb_ops = {</div><div class='ctx'> 	.fb_pan_display = intel_fbdev_pan_display,</div><div class='ctx'> 	__FB_DEFAULT_DEFERRED_OPS_DRAW(intel_fbdev),</div><div class='ctx'> 	.fb_mmap = intel_fbdev_mmap,</div><div class='add'>+	.fb_destroy = intel_fbdev_fb_destroy,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+__diag_pop();</div><div class='add'>+</div><div class='ctx'> static int intelfb_create(struct drm_fb_helper *helper,</div><div class='ctx'> 			  struct drm_fb_helper_surface_size *sizes)</div><div class='ctx'> {</div><div class='hunk'>@@ -153,7 +178,6 @@ static int intelfb_create(struct drm_fb_helper *helper,</div><div class='ctx'> 	struct intel_framebuffer *intel_fb = ifbdev-&gt;fb;</div><div class='ctx'> 	struct drm_device *dev = helper-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev_priv-&gt;drm.dev);</div><div class='ctx'> 	const struct i915_gtt_view view = {</div><div class='ctx'> 		.type = I915_GTT_VIEW_NORMAL,</div><div class='ctx'> 	};</div><div class='hunk'>@@ -245,7 +269,7 @@ static int intelfb_create(struct drm_fb_helper *helper,</div><div class='ctx'> 	ifbdev-&gt;vma_flags = flags;</div><div class='ctx'> </div><div class='ctx'> 	intel_runtime_pm_put(&amp;dev_priv-&gt;runtime_pm, wakeref);</div><div class='del'>-	vga_switcheroo_client_fb_set(pdev, info);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_unpin:</div><div class='hunk'>@@ -271,25 +295,6 @@ static const struct drm_fb_helper_funcs intel_fb_helper_funcs = {</div><div class='ctx'> 	.fb_dirty = intelfb_dirty,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void intel_fbdev_destroy(struct intel_fbdev *ifbdev)</div><div class='del'>-{</div><div class='del'>-	/* We rely on the object-free to release the VMA pinning for</div><div class='del'>-	 * the info-&gt;screen_base mmaping. Leaking the VMA is simpler than</div><div class='del'>-	 * trying to rectify all the possible error paths leading here.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	drm_fb_helper_fini(&amp;ifbdev-&gt;helper);</div><div class='del'>-</div><div class='del'>-	if (ifbdev-&gt;vma)</div><div class='del'>-		intel_unpin_fb_vma(ifbdev-&gt;vma, ifbdev-&gt;vma_flags);</div><div class='del'>-</div><div class='del'>-	if (ifbdev-&gt;fb)</div><div class='del'>-		drm_framebuffer_remove(&amp;ifbdev-&gt;fb-&gt;base);</div><div class='del'>-</div><div class='del'>-	drm_fb_helper_unprepare(&amp;ifbdev-&gt;helper);</div><div class='del'>-	kfree(ifbdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Build an intel_fbdev struct using a BIOS allocated framebuffer, if possible.</div><div class='ctx'>  * The core display code will have read out the current plane configuration,</div><div class='hunk'>@@ -453,93 +458,6 @@ static void intel_fbdev_suspend_worker(struct work_struct *work)</div><div class='ctx'> 				true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int intel_fbdev_init(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	struct intel_fbdev *ifbdev;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (drm_WARN_ON(dev, !HAS_DISPLAY(dev_priv)))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);</div><div class='del'>-	if (ifbdev == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;ifbdev-&gt;hpd_lock);</div><div class='del'>-	drm_fb_helper_prepare(dev, &amp;ifbdev-&gt;helper, 32, &amp;intel_fb_helper_funcs);</div><div class='del'>-</div><div class='del'>-	if (intel_fbdev_init_bios(dev, ifbdev))</div><div class='del'>-		ifbdev-&gt;helper.preferred_bpp = ifbdev-&gt;preferred_bpp;</div><div class='del'>-	else</div><div class='del'>-		ifbdev-&gt;preferred_bpp = ifbdev-&gt;helper.preferred_bpp;</div><div class='del'>-</div><div class='del'>-	ret = drm_fb_helper_init(dev, &amp;ifbdev-&gt;helper);</div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree(ifbdev);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;display.fbdev.fbdev = ifbdev;</div><div class='del'>-	INIT_WORK(&amp;dev_priv-&gt;display.fbdev.suspend_work, intel_fbdev_suspend_worker);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void intel_fbdev_initial_config(void *data, async_cookie_t cookie)</div><div class='del'>-{</div><div class='del'>-	struct intel_fbdev *ifbdev = data;</div><div class='del'>-</div><div class='del'>-	/* Due to peculiar init order wrt to hpd handling this is separate. */</div><div class='del'>-	if (drm_fb_helper_initial_config(&amp;ifbdev-&gt;helper))</div><div class='del'>-		intel_fbdev_unregister(to_i915(ifbdev-&gt;helper.dev));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_fbdev_initial_config_async(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	struct intel_fbdev *ifbdev = dev_priv-&gt;display.fbdev.fbdev;</div><div class='del'>-</div><div class='del'>-	if (!ifbdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ifbdev-&gt;cookie = async_schedule(intel_fbdev_initial_config, ifbdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void intel_fbdev_sync(struct intel_fbdev *ifbdev)</div><div class='del'>-{</div><div class='del'>-	if (!ifbdev-&gt;cookie)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Only serialises with all preceding async calls, hence +1 */</div><div class='del'>-	async_synchronize_cookie(ifbdev-&gt;cookie + 1);</div><div class='del'>-	ifbdev-&gt;cookie = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_fbdev_unregister(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	struct intel_fbdev *ifbdev = dev_priv-&gt;display.fbdev.fbdev;</div><div class='del'>-</div><div class='del'>-	if (!ifbdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	intel_fbdev_set_suspend(&amp;dev_priv-&gt;drm, FBINFO_STATE_SUSPENDED, true);</div><div class='del'>-</div><div class='del'>-	if (!current_is_async())</div><div class='del'>-		intel_fbdev_sync(ifbdev);</div><div class='del'>-</div><div class='del'>-	drm_fb_helper_unregister_info(&amp;ifbdev-&gt;helper);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_fbdev_fini(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	struct intel_fbdev *ifbdev = fetch_and_zero(&amp;dev_priv-&gt;display.fbdev.fbdev);</div><div class='del'>-</div><div class='del'>-	if (!ifbdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	intel_fbdev_destroy(ifbdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Suspends/resumes fbdev processing of incoming HPD events. When resuming HPD</div><div class='ctx'>  * processing, fbdev will perform a full connector reprobe if a hotplug event</div><div class='ctx'>  * was received while HPD was suspended.</div><div class='hunk'>@@ -622,15 +540,13 @@ set_suspend:</div><div class='ctx'> 	intel_fbdev_hpd_set_suspend(dev_priv, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void intel_fbdev_output_poll_changed(struct drm_device *dev)</div><div class='add'>+static int intel_fbdev_output_poll_changed(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_fbdev *ifbdev = to_i915(dev)-&gt;display.fbdev.fbdev;</div><div class='ctx'> 	bool send_hpd;</div><div class='ctx'> </div><div class='ctx'> 	if (!ifbdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	intel_fbdev_sync(ifbdev);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ifbdev-&gt;hpd_lock);</div><div class='ctx'> 	send_hpd = !ifbdev-&gt;hpd_suspended;</div><div class='hunk'>@@ -639,21 +555,137 @@ void intel_fbdev_output_poll_changed(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (send_hpd &amp;&amp; (ifbdev-&gt;vma || ifbdev-&gt;helper.deferred_setup))</div><div class='ctx'> 		drm_fb_helper_hotplug_event(&amp;ifbdev-&gt;helper);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void intel_fbdev_restore_mode(struct drm_i915_private *dev_priv)</div><div class='add'>+static int intel_fbdev_restore_mode(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_fbdev *ifbdev = dev_priv-&gt;display.fbdev.fbdev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!ifbdev)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	intel_fbdev_sync(ifbdev);</div><div class='ctx'> 	if (!ifbdev-&gt;vma)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = drm_fb_helper_restore_fbdev_mode_unlocked(&amp;ifbdev-&gt;helper);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	intel_fbdev_invalidate(ifbdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Fbdev client and struct drm_client_funcs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void intel_fbdev_client_unregister(struct drm_client_dev *client)</div><div class='add'>+{</div><div class='add'>+	struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client);</div><div class='add'>+	struct drm_device *dev = fb_helper-&gt;dev;</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (fb_helper-&gt;info) {</div><div class='add'>+		vga_switcheroo_client_fb_set(pdev, NULL);</div><div class='add'>+		drm_fb_helper_unregister_info(fb_helper);</div><div class='add'>+	} else {</div><div class='add'>+		drm_fb_helper_unprepare(fb_helper);</div><div class='add'>+		drm_client_release(&amp;fb_helper-&gt;client);</div><div class='add'>+		kfree(fb_helper);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_fbdev_client_restore(struct drm_client_dev *client)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(client-&gt;dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = intel_fbdev_restore_mode(dev_priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	vga_switcheroo_process_delayed_switch();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_fbdev_client_hotplug(struct drm_client_dev *client)</div><div class='add'>+{</div><div class='add'>+	struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client);</div><div class='add'>+	struct drm_device *dev = client-&gt;dev;</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev-&gt;dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;fb_helper)</div><div class='add'>+		return intel_fbdev_output_poll_changed(dev);</div><div class='add'>+</div><div class='add'>+	ret = drm_fb_helper_init(dev, fb_helper);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_drm_err;</div><div class='add'>+</div><div class='add'>+	ret = drm_fb_helper_initial_config(fb_helper);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_drm_fb_helper_fini;</div><div class='add'>+</div><div class='add'>+	vga_switcheroo_client_fb_set(pdev, fb_helper-&gt;info);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_drm_fb_helper_fini:</div><div class='add'>+	drm_fb_helper_fini(fb_helper);</div><div class='add'>+err_drm_err:</div><div class='add'>+	drm_err(dev, "Failed to setup i915 fbdev emulation (ret=%d)\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_client_funcs intel_fbdev_client_funcs = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.unregister	= intel_fbdev_client_unregister,</div><div class='add'>+	.restore	= intel_fbdev_client_restore,</div><div class='add'>+	.hotplug	= intel_fbdev_client_hotplug,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void intel_fbdev_setup(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = &amp;i915-&gt;drm;</div><div class='add'>+	struct intel_fbdev *ifbdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!HAS_DISPLAY(i915))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (drm_fb_helper_restore_fbdev_mode_unlocked(&amp;ifbdev-&gt;helper) == 0)</div><div class='del'>-		intel_fbdev_invalidate(ifbdev);</div><div class='add'>+	ifbdev = kzalloc(sizeof(*ifbdev), GFP_KERNEL);</div><div class='add'>+	if (!ifbdev)</div><div class='add'>+		return;</div><div class='add'>+	drm_fb_helper_prepare(dev, &amp;ifbdev-&gt;helper, 32, &amp;intel_fb_helper_funcs);</div><div class='add'>+</div><div class='add'>+	i915-&gt;display.fbdev.fbdev = ifbdev;</div><div class='add'>+	INIT_WORK(&amp;i915-&gt;display.fbdev.suspend_work, intel_fbdev_suspend_worker);</div><div class='add'>+	mutex_init(&amp;ifbdev-&gt;hpd_lock);</div><div class='add'>+	if (intel_fbdev_init_bios(dev, ifbdev))</div><div class='add'>+		ifbdev-&gt;helper.preferred_bpp = ifbdev-&gt;preferred_bpp;</div><div class='add'>+	else</div><div class='add'>+		ifbdev-&gt;preferred_bpp = ifbdev-&gt;helper.preferred_bpp;</div><div class='add'>+</div><div class='add'>+	ret = drm_client_init(dev, &amp;ifbdev-&gt;helper.client, "intel-fbdev",</div><div class='add'>+			      &amp;intel_fbdev_client_funcs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_err(dev, "Failed to register client: %d\n", ret);</div><div class='add'>+		goto err_drm_fb_helper_unprepare;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_client_register(&amp;ifbdev-&gt;helper.client);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_drm_fb_helper_unprepare:</div><div class='add'>+	drm_fb_helper_unprepare(&amp;ifbdev-&gt;helper);</div><div class='add'>+	mutex_destroy(&amp;ifbdev-&gt;hpd_lock);</div><div class='add'>+	kfree(ifbdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.h b/drivers/gpu/drm/i915/display/intel_fbdev.h<br/>index 04fd523a5023..08de2d5b3433 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbdev.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_fbdev.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fbdev.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_fbdev.h</a></div><div class='hunk'>@@ -14,29 +14,11 @@ struct intel_fbdev;</div><div class='ctx'> struct intel_framebuffer;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DRM_FBDEV_EMULATION</div><div class='del'>-int intel_fbdev_init(struct drm_device *dev);</div><div class='del'>-void intel_fbdev_initial_config_async(struct drm_i915_private *dev_priv);</div><div class='del'>-void intel_fbdev_unregister(struct drm_i915_private *dev_priv);</div><div class='del'>-void intel_fbdev_fini(struct drm_i915_private *dev_priv);</div><div class='add'>+void intel_fbdev_setup(struct drm_i915_private *dev_priv);</div><div class='ctx'> void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous);</div><div class='del'>-void intel_fbdev_output_poll_changed(struct drm_device *dev);</div><div class='del'>-void intel_fbdev_restore_mode(struct drm_i915_private *dev_priv);</div><div class='ctx'> struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev);</div><div class='ctx'> #else</div><div class='del'>-static inline int intel_fbdev_init(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void intel_fbdev_initial_config_async(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void intel_fbdev_unregister(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void intel_fbdev_fini(struct drm_i915_private *dev_priv)</div><div class='add'>+static inline void intel_fbdev_setup(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -44,13 +26,6 @@ static inline void intel_fbdev_set_suspend(struct drm_device *dev, int state, bo</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void intel_fbdev_output_poll_changed(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void intel_fbdev_restore_mode(struct drm_i915_private *i915)</div><div class='del'>-{</div><div class='del'>-}</div><div class='ctx'> static inline struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev)</div><div class='ctx'> {</div><div class='ctx'> 	return NULL;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_fixed.h b/drivers/gpu/drm/i915/display/intel_fixed.h<br/>index a327094de2bd..a327094de2bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_fixed.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_fixed.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_fixed.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_fixed.h</a></div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c<br/>index d3e03ed5b79c..9c8e1e91ff1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_gmbus.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_gmbus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_gmbus.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_gmbus.c</a></div><div class='hunk'>@@ -411,7 +411,7 @@ gmbus_wait_idle(struct drm_i915_private *i915)</div><div class='ctx'> 	add_wait_queue(&amp;i915-&gt;display.gmbus.wait_queue, &amp;wait);</div><div class='ctx'> 	intel_de_write_fw(i915, GMBUS4(i915), irq_enable);</div><div class='ctx'> </div><div class='del'>-	ret = intel_de_wait_for_register_fw(i915, GMBUS2(i915), GMBUS_ACTIVE, 0, 10);</div><div class='add'>+	ret = intel_de_wait_fw(i915, GMBUS2(i915), GMBUS_ACTIVE, 0, 10);</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write_fw(i915, GMBUS4(i915), 0);</div><div class='ctx'> 	remove_wait_queue(&amp;i915-&gt;display.gmbus.wait_queue, &amp;wait);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c<br/>index 9edac27bab26..d5ed4c7dfbc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdcp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdcp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdcp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_hdcp.c</a></div><div class='hunk'>@@ -369,9 +369,9 @@ static int intel_hdcp_load_keys(struct drm_i915_private *i915)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for the keys to load (500us) */</div><div class='del'>-	ret = __intel_wait_for_register(&amp;i915-&gt;uncore, HDCP_KEY_STATUS,</div><div class='del'>-					HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,</div><div class='del'>-					10, 1, &amp;val);</div><div class='add'>+	ret = intel_de_wait_custom(i915, HDCP_KEY_STATUS,</div><div class='add'>+				   HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,</div><div class='add'>+				   10, 1, &amp;val);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	else if (!(val &amp; HDCP_KEY_LOAD_STATUS))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c<br/>index 302bff75b06c..35823e1f65d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.c</a></div><div class='hunk'>@@ -13,6 +13,12 @@</div><div class='ctx'> #include "intel_hdcp_gsc.h"</div><div class='ctx'> #include "intel_hdcp_gsc_message.h"</div><div class='ctx'> </div><div class='add'>+struct intel_hdcp_gsc_message {</div><div class='add'>+	struct i915_vma *vma;</div><div class='add'>+	void *hdcp_cmd_in;</div><div class='add'>+	void *hdcp_cmd_out;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	return DISPLAY_VER(i915) &gt;= 14;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h<br/>index eba2057c5a9e..5f610df61cc9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.h</a></div><div class='hunk'>@@ -10,12 +10,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct drm_i915_private;</div><div class='del'>-</div><div class='del'>-struct intel_hdcp_gsc_message {</div><div class='del'>-	struct i915_vma *vma;</div><div class='del'>-	void *hdcp_cmd_in;</div><div class='del'>-	void *hdcp_cmd_out;</div><div class='del'>-};</div><div class='add'>+struct intel_hdcp_gsc_message;</div><div class='ctx'> </div><div class='ctx'> bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915);</div><div class='ctx'> ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c<br/>index 90d2236fede3..5f6deceaf8ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hdmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_hdmi.c</a></div><div class='hunk'>@@ -114,6 +114,8 @@ static u32 g4x_infoframe_enable(unsigned int type)</div><div class='ctx'> 		return VIDEO_DIP_ENABLE_GAMUT;</div><div class='ctx'> 	case DP_SDP_VSC:</div><div class='ctx'> 		return 0;</div><div class='add'>+	case DP_SDP_ADAPTIVE_SYNC:</div><div class='add'>+		return 0;</div><div class='ctx'> 	case HDMI_INFOFRAME_TYPE_AVI:</div><div class='ctx'> 		return VIDEO_DIP_ENABLE_AVI;</div><div class='ctx'> 	case HDMI_INFOFRAME_TYPE_SPD:</div><div class='hunk'>@@ -137,6 +139,8 @@ static u32 hsw_infoframe_enable(unsigned int type)</div><div class='ctx'> 		return VIDEO_DIP_ENABLE_GMP_HSW;</div><div class='ctx'> 	case DP_SDP_VSC:</div><div class='ctx'> 		return VIDEO_DIP_ENABLE_VSC_HSW;</div><div class='add'>+	case DP_SDP_ADAPTIVE_SYNC:</div><div class='add'>+		return VIDEO_DIP_ENABLE_AS_ADL;</div><div class='ctx'> 	case DP_SDP_PPS:</div><div class='ctx'> 		return VDIP_ENABLE_PPS;</div><div class='ctx'> 	case HDMI_INFOFRAME_TYPE_AVI:</div><div class='hunk'>@@ -164,6 +168,8 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		return HSW_TVIDEO_DIP_GMP_DATA(cpu_transcoder, i);</div><div class='ctx'> 	case DP_SDP_VSC:</div><div class='ctx'> 		return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i);</div><div class='add'>+	case DP_SDP_ADAPTIVE_SYNC:</div><div class='add'>+		return ADL_TVIDEO_DIP_AS_SDP_DATA(cpu_transcoder, i);</div><div class='ctx'> 	case DP_SDP_PPS:</div><div class='ctx'> 		return ICL_VIDEO_DIP_PPS_DATA(cpu_transcoder, i);</div><div class='ctx'> 	case HDMI_INFOFRAME_TYPE_AVI:</div><div class='hunk'>@@ -186,6 +192,8 @@ static int hsw_dip_data_size(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case DP_SDP_VSC:</div><div class='ctx'> 		return VIDEO_DIP_VSC_DATA_SIZE;</div><div class='add'>+	case DP_SDP_ADAPTIVE_SYNC:</div><div class='add'>+		return VIDEO_DIP_ASYNC_DATA_SIZE;</div><div class='ctx'> 	case DP_SDP_PPS:</div><div class='ctx'> 		return VIDEO_DIP_PPS_DATA_SIZE;</div><div class='ctx'> 	case HDMI_PACKET_TYPE_GAMUT_METADATA:</div><div class='hunk'>@@ -563,6 +571,9 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,</div><div class='ctx'> 	if (DISPLAY_VER(dev_priv) &gt;= 10)</div><div class='ctx'> 		mask |= VIDEO_DIP_ENABLE_DRM_GLK;</div><div class='ctx'> </div><div class='add'>+	if (HAS_AS_SDP(dev_priv))</div><div class='add'>+		mask |= VIDEO_DIP_ENABLE_AS_ADL;</div><div class='add'>+</div><div class='ctx'> 	return val &amp; mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -570,6 +581,7 @@ static const u8 infoframe_type_to_idx[] = {</div><div class='ctx'> 	HDMI_PACKET_TYPE_GENERAL_CONTROL,</div><div class='ctx'> 	HDMI_PACKET_TYPE_GAMUT_METADATA,</div><div class='ctx'> 	DP_SDP_VSC,</div><div class='add'>+	DP_SDP_ADAPTIVE_SYNC,</div><div class='ctx'> 	HDMI_INFOFRAME_TYPE_AVI,</div><div class='ctx'> 	HDMI_INFOFRAME_TYPE_SPD,</div><div class='ctx'> 	HDMI_INFOFRAME_TYPE_VENDOR,</div><div class='hunk'>@@ -1212,7 +1224,7 @@ static void hsw_set_infoframes(struct intel_encoder *encoder,</div><div class='ctx'> 	val &amp;= ~(VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |</div><div class='ctx'> 		 VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW |</div><div class='ctx'> 		 VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW |</div><div class='del'>-		 VIDEO_DIP_ENABLE_DRM_GLK);</div><div class='add'>+		 VIDEO_DIP_ENABLE_DRM_GLK | VIDEO_DIP_ENABLE_AS_ADL);</div><div class='ctx'> </div><div class='ctx'> 	if (!enable) {</div><div class='ctx'> 		intel_de_write(dev_priv, reg, val);</div><div class='hunk'>@@ -1832,7 +1844,7 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,</div><div class='ctx'> 		      bool has_hdmi_sink)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, hdmi_to_dig_port(hdmi)-&gt;base.port);</div><div class='add'>+	struct intel_encoder *encoder = &amp;hdmi_to_dig_port(hdmi)-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	if (clock &lt; 25000)</div><div class='ctx'> 		return MODE_CLOCK_LOW;</div><div class='hunk'>@@ -1854,11 +1866,11 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,</div><div class='ctx'> 		return MODE_CLOCK_RANGE;</div><div class='ctx'> </div><div class='ctx'> 	/* ICL+ combo PHY PLL can't generate 500-533.2 MHz */</div><div class='del'>-	if (intel_phy_is_combo(dev_priv, phy) &amp;&amp; clock &gt; 500000 &amp;&amp; clock &lt; 533200)</div><div class='add'>+	if (intel_encoder_is_combo(encoder) &amp;&amp; clock &gt; 500000 &amp;&amp; clock &lt; 533200)</div><div class='ctx'> 		return MODE_CLOCK_RANGE;</div><div class='ctx'> </div><div class='ctx'> 	/* ICL+ TC PHY PLL can't generate 500-532.8 MHz */</div><div class='del'>-	if (intel_phy_is_tc(dev_priv, phy) &amp;&amp; clock &gt; 500000 &amp;&amp; clock &lt; 532800)</div><div class='add'>+	if (intel_encoder_is_tc(encoder) &amp;&amp; clock &gt; 500000 &amp;&amp; clock &lt; 532800)</div><div class='ctx'> 		return MODE_CLOCK_RANGE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1981,7 +1993,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> 	int clock = mode-&gt;clock;</div><div class='del'>-	int max_dotclk = to_i915(connector-&gt;dev)-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = to_i915(connector-&gt;dev)-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector-&gt;state);</div><div class='ctx'> 	bool ycbcr_420_only;</div><div class='ctx'> 	enum intel_output_format sink_format;</div><div class='hunk'>@@ -2664,8 +2676,9 @@ bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,</div><div class='ctx'> 		drm_scdc_set_scrambling(connector, scrambling);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 chv_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='ctx'> 	u8 ddc_pin;</div><div class='ctx'> </div><div class='ctx'> 	switch (port) {</div><div class='hunk'>@@ -2686,8 +2699,9 @@ static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='ctx'> 	return ddc_pin;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 bxt_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='ctx'> 	u8 ddc_pin;</div><div class='ctx'> </div><div class='ctx'> 	switch (port) {</div><div class='hunk'>@@ -2705,9 +2719,9 @@ static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='ctx'> 	return ddc_pin;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,</div><div class='del'>-			      enum port port)</div><div class='add'>+static u8 cnp_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='ctx'> 	u8 ddc_pin;</div><div class='ctx'> </div><div class='ctx'> 	switch (port) {</div><div class='hunk'>@@ -2731,22 +2745,23 @@ static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	return ddc_pin;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 icl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 icl_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='ctx'> </div><div class='del'>-	if (intel_phy_is_combo(dev_priv, phy))</div><div class='add'>+	if (intel_encoder_is_combo(encoder))</div><div class='ctx'> 		return GMBUS_PIN_1_BXT + port;</div><div class='del'>-	else if (intel_phy_is_tc(dev_priv, phy))</div><div class='del'>-		return GMBUS_PIN_9_TC1_ICP + intel_port_to_tc(dev_priv, port);</div><div class='add'>+	else if (intel_encoder_is_tc(encoder))</div><div class='add'>+		return GMBUS_PIN_9_TC1_ICP + intel_encoder_to_tc(encoder);</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN(&amp;dev_priv-&gt;drm, 1, "Unknown port:%c\n", port_name(port));</div><div class='ctx'> 	return GMBUS_PIN_2_BXT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 mcc_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	u8 ddc_pin;</div><div class='ctx'> </div><div class='ctx'> 	switch (phy) {</div><div class='hunk'>@@ -2767,11 +2782,12 @@ static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='ctx'> 	return ddc_pin;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 rkl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 rkl_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='del'>-	WARN_ON(port == PORT_C);</div><div class='add'>+	WARN_ON(encoder-&gt;port == PORT_C);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Pin mapping for RKL depends on which PCH is present.  With TGP, the</div><div class='hunk'>@@ -2785,11 +2801,12 @@ static u8 rkl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='ctx'> 	return GMBUS_PIN_1_BXT + phy;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 gen9bc_tgp_port_to_ddc_pin(struct drm_i915_private *i915, enum port port)</div><div class='add'>+static u8 gen9bc_tgp_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, port);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='del'>-	drm_WARN_ON(&amp;i915-&gt;drm, port == PORT_A);</div><div class='add'>+	drm_WARN_ON(&amp;i915-&gt;drm, encoder-&gt;port == PORT_A);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Pin mapping for GEN9 BC depends on which PCH is present.  With TGP,</div><div class='hunk'>@@ -2803,16 +2820,16 @@ static u8 gen9bc_tgp_port_to_ddc_pin(struct drm_i915_private *i915, enum port po</div><div class='ctx'> 	return GMBUS_PIN_1_BXT + phy;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 dg1_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 dg1_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	return intel_port_to_phy(dev_priv, port) + 1;</div><div class='add'>+	return intel_encoder_to_phy(encoder) + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 adls_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)</div><div class='add'>+static u8 adls_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='del'>-	WARN_ON(port == PORT_B || port == PORT_C);</div><div class='add'>+	WARN_ON(encoder-&gt;port == PORT_B || encoder-&gt;port == PORT_C);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Pin mapping for ADL-S requires TC pins for all combo phy outputs</div><div class='hunk'>@@ -2824,9 +2841,9 @@ static u8 adls_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port</div><div class='ctx'> 	return GMBUS_PIN_9_TC1_ICP + phy - PHY_B;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,</div><div class='del'>-			      enum port port)</div><div class='add'>+static u8 g4x_encoder_to_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	enum port port = encoder-&gt;port;</div><div class='ctx'> 	u8 ddc_pin;</div><div class='ctx'> </div><div class='ctx'> 	switch (port) {</div><div class='hunk'>@@ -2850,30 +2867,29 @@ static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,</div><div class='ctx'> static u8 intel_hdmi_default_ddc_pin(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum port port = encoder-&gt;port;</div><div class='ctx'> 	u8 ddc_pin;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ALDERLAKE_S(dev_priv))</div><div class='del'>-		ddc_pin = adls_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = adls_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (INTEL_PCH_TYPE(dev_priv) &gt;= PCH_DG1)</div><div class='del'>-		ddc_pin = dg1_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = dg1_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (IS_ROCKETLAKE(dev_priv))</div><div class='del'>-		ddc_pin = rkl_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = rkl_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (DISPLAY_VER(dev_priv) == 9 &amp;&amp; HAS_PCH_TGP(dev_priv))</div><div class='del'>-		ddc_pin = gen9bc_tgp_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = gen9bc_tgp_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if ((IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) &amp;&amp;</div><div class='ctx'> 		 HAS_PCH_TGP(dev_priv))</div><div class='del'>-		ddc_pin = mcc_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = mcc_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (INTEL_PCH_TYPE(dev_priv) &gt;= PCH_ICP)</div><div class='del'>-		ddc_pin = icl_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = icl_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (HAS_PCH_CNP(dev_priv))</div><div class='del'>-		ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = cnp_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='del'>-		ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = bxt_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else if (IS_CHERRYVIEW(dev_priv))</div><div class='del'>-		ddc_pin = chv_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = chv_encoder_to_ddc_pin(encoder);</div><div class='ctx'> 	else</div><div class='del'>-		ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);</div><div class='add'>+		ddc_pin = g4x_encoder_to_ddc_pin(encoder);</div><div class='ctx'> </div><div class='ctx'> 	return ddc_pin;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c<br/>index 76076509f771..d270bb7b9462 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hotplug_irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_hotplug_irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_hotplug_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_hotplug_irq.c</a></div><div class='hunk'>@@ -1444,7 +1444,7 @@ void intel_hpd_enable_detection(struct intel_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> void intel_hpd_irq_setup(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	if (i915-&gt;display_irqs_enabled &amp;&amp; i915-&gt;display.funcs.hotplug)</div><div class='add'>+	if (i915-&gt;display.irq.display_irqs_enabled &amp;&amp; i915-&gt;display.funcs.hotplug)</div><div class='ctx'> 		i915-&gt;display.funcs.hotplug-&gt;hpd_irq_setup(i915);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c<br/>index 5863763de530..93e6cac9a4ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_lpe_audio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_lpe_audio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_lpe_audio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_lpe_audio.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "i915_drv.h"</div><div class='ctx'> #include "i915_irq.h"</div><div class='del'>-#include "i915_reg.h"</div><div class='add'>+#include "intel_audio_regs.h"</div><div class='ctx'> #include "intel_de.h"</div><div class='ctx'> #include "intel_lpe_audio.h"</div><div class='ctx'> #include "intel_pci_config.h"</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c<br/>index 221f5c6c871b..8b8959073466 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_lvds.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_lvds.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_lvds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_lvds.c</a></div><div class='hunk'>@@ -392,16 +392,13 @@ intel_lvds_mode_valid(struct drm_connector *_connector,</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(connector-&gt;base.dev);</div><div class='ctx'> 	const struct drm_display_mode *fixed_mode =</div><div class='ctx'> 		intel_panel_fixed_mode(connector, mode);</div><div class='del'>-	int max_pixclk = to_i915(connector-&gt;base.dev)-&gt;max_dotclk_freq;</div><div class='add'>+	int max_pixclk = to_i915(connector-&gt;base.dev)-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> </div><div class='ctx'> 	status = intel_cpu_transcoder_mode_valid(i915, mode);</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='del'>-		return MODE_NO_DBLESCAN;</div><div class='del'>-</div><div class='ctx'> 	status = intel_panel_mode_valid(connector, mode);</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c<br/>index fcbb083318a7..68bd5101ec89 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_opregion.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_opregion.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_opregion.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_opregion.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;acpi/video.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_edid.h&gt;</div><div class='hunk'>@@ -263,7 +262,6 @@ struct intel_opregion {</div><div class='ctx'> 	struct opregion_asle *asle;</div><div class='ctx'> 	struct opregion_asle_ext *asle_ext;</div><div class='ctx'> 	void *rvda;</div><div class='del'>-	void *vbt_firmware;</div><div class='ctx'> 	const void *vbt;</div><div class='ctx'> 	u32 vbt_size;</div><div class='ctx'> 	struct work_struct asle_work;</div><div class='hunk'>@@ -869,46 +867,6 @@ static const struct dmi_system_id intel_no_opregion_vbt[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	struct intel_opregion *opregion = dev_priv-&gt;display.opregion;</div><div class='del'>-	const struct firmware *fw = NULL;</div><div class='del'>-	const char *name = dev_priv-&gt;display.params.vbt_firmware;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!name || !*name)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	ret = request_firmware(&amp;fw, name, dev_priv-&gt;drm.dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm,</div><div class='del'>-			"Requesting VBT firmware \"%s\" failed (%d)\n",</div><div class='del'>-			name, ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (intel_bios_is_valid_vbt(dev_priv, fw-&gt;data, fw-&gt;size)) {</div><div class='del'>-		opregion-&gt;vbt_firmware = kmemdup(fw-&gt;data, fw-&gt;size, GFP_KERNEL);</div><div class='del'>-		if (opregion-&gt;vbt_firmware) {</div><div class='del'>-			drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='del'>-				    "Found valid VBT firmware \"%s\"\n", name);</div><div class='del'>-			opregion-&gt;vbt = opregion-&gt;vbt_firmware;</div><div class='del'>-			opregion-&gt;vbt_size = fw-&gt;size;</div><div class='del'>-			ret = 0;</div><div class='del'>-		} else {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Invalid VBT firmware \"%s\"\n",</div><div class='del'>-			    name);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	release_firmware(fw);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int intel_opregion_setup(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_opregion *opregion;</div><div class='hunk'>@@ -1006,9 +964,6 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		drm_dbg(&amp;dev_priv-&gt;drm, "Mailbox #2 for backlight present\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_load_vbt_firmware(dev_priv) == 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	if (dmi_check_system(intel_no_opregion_vbt))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -1176,6 +1131,16 @@ const struct drm_edid *intel_opregion_get_edid(struct intel_connector *intel_con</div><div class='ctx'> 	return drm_edid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool intel_opregion_vbt_present(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	struct intel_opregion *opregion = i915-&gt;display.opregion;</div><div class='add'>+</div><div class='add'>+	if (!opregion || !opregion-&gt;vbt)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const void *intel_opregion_get_vbt(struct drm_i915_private *i915, size_t *size)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_opregion *opregion = i915-&gt;display.opregion;</div><div class='hunk'>@@ -1186,7 +1151,7 @@ const void *intel_opregion_get_vbt(struct drm_i915_private *i915, size_t *size)</div><div class='ctx'> 	if (size)</div><div class='ctx'> 		*size = opregion-&gt;vbt_size;</div><div class='ctx'> </div><div class='del'>-	return opregion-&gt;vbt;</div><div class='add'>+	return kmemdup(opregion-&gt;vbt, opregion-&gt;vbt_size, GFP_KERNEL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool intel_opregion_headless_sku(struct drm_i915_private *i915)</div><div class='hunk'>@@ -1312,7 +1277,6 @@ void intel_opregion_cleanup(struct drm_i915_private *i915)</div><div class='ctx'> 	memunmap(opregion-&gt;header);</div><div class='ctx'> 	if (opregion-&gt;rvda)</div><div class='ctx'> 		memunmap(opregion-&gt;rvda);</div><div class='del'>-	kfree(opregion-&gt;vbt_firmware);</div><div class='ctx'> 	kfree(opregion);</div><div class='ctx'> 	i915-&gt;display.opregion = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h<br/>index 0bec224f711f..4b2b8e752632 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_opregion.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_opregion.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_opregion.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_opregion.h</a></div><div class='hunk'>@@ -53,6 +53,7 @@ int intel_opregion_notify_adapter(struct drm_i915_private *dev_priv,</div><div class='ctx'> int intel_opregion_get_panel_type(struct drm_i915_private *dev_priv);</div><div class='ctx'> const struct drm_edid *intel_opregion_get_edid(struct intel_connector *connector);</div><div class='ctx'> </div><div class='add'>+bool intel_opregion_vbt_present(struct drm_i915_private *i915);</div><div class='ctx'> const void *intel_opregion_get_vbt(struct drm_i915_private *i915, size_t *size);</div><div class='ctx'> </div><div class='ctx'> bool intel_opregion_headless_sku(struct drm_i915_private *i915);</div><div class='hunk'>@@ -119,6 +120,11 @@ intel_opregion_get_edid(struct intel_connector *connector)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool intel_opregion_vbt_present(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline const void *</div><div class='ctx'> intel_opregion_get_vbt(struct drm_i915_private *i915, size_t *size)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c<br/>index 2b1392d5a902..1c2099ed5514 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_overlay.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_overlay.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_overlay.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_overlay.c</a></div><div class='hunk'>@@ -972,10 +972,11 @@ static int check_overlay_dst(struct intel_overlay *overlay,</div><div class='ctx'> 		      rec-&gt;dst_width, rec-&gt;dst_height);</div><div class='ctx'> </div><div class='ctx'> 	clipped = req;</div><div class='del'>-	drm_rect_intersect(&amp;clipped, &amp;crtc_state-&gt;pipe_src);</div><div class='ctx'> </div><div class='del'>-	if (!drm_rect_visible(&amp;clipped) ||</div><div class='del'>-	    !drm_rect_equals(&amp;clipped, &amp;req))</div><div class='add'>+	if (!drm_rect_intersect(&amp;clipped, &amp;crtc_state-&gt;pipe_src))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!drm_rect_equals(&amp;clipped, &amp;req))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c<br/>index 073ea3166c36..6f4ff6a89c32 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_panel.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_panel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_panel.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_panel.c</a></div><div class='hunk'>@@ -47,10 +47,12 @@</div><div class='ctx'> </div><div class='ctx'> bool intel_panel_use_ssc(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	if (i915-&gt;display.params.panel_use_ssc &gt;= 0)</div><div class='del'>-		return i915-&gt;display.params.panel_use_ssc != 0;</div><div class='del'>-	return i915-&gt;display.vbt.lvds_use_ssc &amp;&amp;</div><div class='del'>-		!intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE);</div><div class='add'>+	struct intel_display *display = &amp;i915-&gt;display;</div><div class='add'>+</div><div class='add'>+	if (display-&gt;params.panel_use_ssc &gt;= 0)</div><div class='add'>+		return display-&gt;params.panel_use_ssc != 0;</div><div class='add'>+	return display-&gt;vbt.lvds_use_ssc &amp;&amp;</div><div class='add'>+		!intel_has_quirk(display, QUIRK_LVDS_SSC_DISABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct drm_display_mode *</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c<br/>index baf679759e00..826e38a9e6a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pch_display.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pch_display.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pch_display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_pch_display.c</a></div><div class='hunk'>@@ -474,7 +474,7 @@ static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> </div><div class='ctx'> 	/* read out port_clock from the DPLL */</div><div class='del'>-	i9xx_crtc_clock_get(crtc, crtc_state);</div><div class='add'>+	i9xx_crtc_clock_get(crtc_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * In case there is an active pipe without active ports,</div><div class='hunk'>@@ -529,7 +529,7 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)</div><div class='ctx'> 					     &amp;crtc_state-&gt;dpll_hw_state);</div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, !pll_active);</div><div class='ctx'> </div><div class='del'>-	tmp = crtc_state-&gt;dpll_hw_state.dpll;</div><div class='add'>+	tmp = crtc_state-&gt;dpll_hw_state.i9xx.dpll;</div><div class='ctx'> 	crtc_state-&gt;pixel_multiplier =</div><div class='ctx'> 		((tmp &amp; PLL_REF_SDVO_HDMI_MULTIPLIER_MASK)</div><div class='ctx'> 		 &gt;&gt; PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) + 1;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c<br/>index 744e332fa2af..9ca981b7a12c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pmdemand.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pmdemand.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pmdemand.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_pmdemand.c</a></div><div class='hunk'>@@ -119,10 +119,11 @@ intel_pmdemand_update_phys_mask(struct drm_i915_private *i915,</div><div class='ctx'> 	if (!encoder)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-	if (intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (intel_encoder_is_tc(encoder))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	phy = intel_encoder_to_phy(encoder);</div><div class='add'>+</div><div class='ctx'> 	if (set_bit)</div><div class='ctx'> 		pmdemand_state-&gt;active_combo_phys_mask |= BIT(phy);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -222,14 +223,7 @@ static bool</div><div class='ctx'> intel_pmdemand_encoder_has_tc_phy(struct drm_i915_private *i915,</div><div class='ctx'> 				  struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	enum phy phy;</div><div class='del'>-</div><div class='del'>-	if (!encoder)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='del'>-</div><div class='del'>-	return intel_phy_is_tc(i915, phy);</div><div class='add'>+	return encoder &amp;&amp; intel_encoder_is_tc(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.h b/drivers/gpu/drm/i915/display/intel_pmdemand.h<br/>index 2941a1a18b72..128fd61f8f14 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pmdemand.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pmdemand.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pmdemand.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_pmdemand.h</a></div><div class='hunk'>@@ -43,9 +43,8 @@ struct intel_pmdemand_state {</div><div class='ctx'> 	struct pmdemand_params params;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define to_intel_pmdemand_state(x) container_of((x), \</div><div class='del'>-						struct intel_pmdemand_state, \</div><div class='del'>-						base)</div><div class='add'>+#define to_intel_pmdemand_state(global_state) \</div><div class='add'>+	container_of_const((global_state), struct intel_pmdemand_state, base)</div><div class='ctx'> </div><div class='ctx'> void intel_pmdemand_init_early(struct drm_i915_private *i915);</div><div class='ctx'> int intel_pmdemand_init(struct drm_i915_private *i915);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c<br/>index 2d65a538f83e..0ccbf9a85914 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_pps.c</a></div><div class='hunk'>@@ -605,8 +605,7 @@ static void wait_panel_status(struct intel_dp *intel_dp,</div><div class='ctx'> 		    intel_de_read(dev_priv, pp_stat_reg),</div><div class='ctx'> 		    intel_de_read(dev_priv, pp_ctrl_reg));</div><div class='ctx'> </div><div class='del'>-	if (intel_de_wait_for_register(dev_priv, pp_stat_reg,</div><div class='del'>-				       mask, value, 5000))</div><div class='add'>+	if (intel_de_wait(dev_priv, pp_stat_reg, mask, value, 5000))</div><div class='ctx'> 		drm_err(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			"[ENCODER:%d:%s] %s panel status timeout: PP_STATUS: 0x%08x PP_CONTROL: 0x%08x\n",</div><div class='ctx'> 			dig_port-&gt;base.base.base.id, dig_port-&gt;base.base.name,</div><div class='hunk'>@@ -1351,7 +1350,7 @@ static void pps_init_delays_bios(struct intel_dp *intel_dp,</div><div class='ctx'> static void pps_init_delays_vbt(struct intel_dp *intel_dp,</div><div class='ctx'> 				struct edp_power_seq *vbt)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='add'>+	struct intel_display *display = to_intel_display(intel_dp);</div><div class='ctx'> 	struct intel_connector *connector = intel_dp-&gt;attached_connector;</div><div class='ctx'> </div><div class='ctx'> 	*vbt = connector-&gt;panel.vbt.edp.pps;</div><div class='hunk'>@@ -1364,9 +1363,9 @@ static void pps_init_delays_vbt(struct intel_dp *intel_dp,</div><div class='ctx'> 	 * just fails to power back on. Increasing the delay to 800ms</div><div class='ctx'> 	 * seems sufficient to avoid this problem.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intel_has_quirk(dev_priv, QUIRK_INCREASE_T12_DELAY)) {</div><div class='add'>+	if (intel_has_quirk(display, QUIRK_INCREASE_T12_DELAY)) {</div><div class='ctx'> 		vbt-&gt;t11_t12 = max_t(u16, vbt-&gt;t11_t12, 1300 * 10);</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='add'>+		drm_dbg_kms(display-&gt;drm,</div><div class='ctx'> 			    "Increasing T12 panel delay as per the quirk to %d\n",</div><div class='ctx'> 			    vbt-&gt;t11_t12);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1671,6 +1670,37 @@ void intel_pps_setup(struct drm_i915_private *i915)</div><div class='ctx'> 		i915-&gt;display.pps.mmio_base = PPS_BASE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int intel_pps_show(struct seq_file *m, void *data)</div><div class='add'>+{</div><div class='add'>+	struct intel_connector *connector = m-&gt;private;</div><div class='add'>+	struct intel_dp *intel_dp = intel_attached_dp(connector);</div><div class='add'>+</div><div class='add'>+	if (connector-&gt;base.status != connector_status_connected)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "Panel power up delay: %d\n",</div><div class='add'>+		   intel_dp-&gt;pps.panel_power_up_delay);</div><div class='add'>+	seq_printf(m, "Panel power down delay: %d\n",</div><div class='add'>+		   intel_dp-&gt;pps.panel_power_down_delay);</div><div class='add'>+	seq_printf(m, "Backlight on delay: %d\n",</div><div class='add'>+		   intel_dp-&gt;pps.backlight_on_delay);</div><div class='add'>+	seq_printf(m, "Backlight off delay: %d\n",</div><div class='add'>+		   intel_dp-&gt;pps.backlight_off_delay);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(intel_pps);</div><div class='add'>+</div><div class='add'>+void intel_pps_connector_debugfs_add(struct intel_connector *connector)</div><div class='add'>+{</div><div class='add'>+	struct dentry *root = connector-&gt;base.debugfs_entry;</div><div class='add'>+	int connector_type = connector-&gt;base.connector_type;</div><div class='add'>+</div><div class='add'>+	if (connector_type == DRM_MODE_CONNECTOR_eDP)</div><div class='add'>+		debugfs_create_file("i915_panel_timings", 0444, root,</div><div class='add'>+				    connector, &amp;intel_pps_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)</div><div class='ctx'> {</div><div class='ctx'> 	i915_reg_t pp_reg;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h<br/>index a2c2467e3c22..07ef96ca8da2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pps.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_pps.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_pps.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_pps.h</a></div><div class='hunk'>@@ -51,6 +51,8 @@ void vlv_pps_init(struct intel_encoder *encoder,</div><div class='ctx'> void intel_pps_unlock_regs_wa(struct drm_i915_private *i915);</div><div class='ctx'> void intel_pps_setup(struct drm_i915_private *i915);</div><div class='ctx'> </div><div class='add'>+void intel_pps_connector_debugfs_add(struct intel_connector *connector);</div><div class='add'>+</div><div class='ctx'> void assert_pps_unlocked(struct drm_i915_private *i915, enum pipe pipe);</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_PPS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c<br/>index aabd018bd737..f5b33335a9ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_psr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_psr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_psr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_psr.c</a></div><div class='hunk'>@@ -171,14 +171,27 @@</div><div class='ctx'>  *</div><div class='ctx'>  * The rest of the bits are more self-explanatory and/or</div><div class='ctx'>  * irrelevant for normal operation.</div><div class='add'>+ *</div><div class='add'>+ * Description of intel_crtc_state variables. has_psr, has_panel_replay and</div><div class='add'>+ * has_sel_update:</div><div class='add'>+ *</div><div class='add'>+ *  has_psr (alone):					PSR1</div><div class='add'>+ *  has_psr + has_sel_update:				PSR2</div><div class='add'>+ *  has_psr + has_panel_replay:				Panel Replay</div><div class='add'>+ *  has_psr + has_panel_replay + has_sel_update:	Panel Replay Selective Update</div><div class='add'>+ *</div><div class='add'>+ * Description of some intel_psr varibles. enabled, panel_replay_enabled,</div><div class='add'>+ * sel_update_enabled</div><div class='add'>+ *</div><div class='add'>+ *  enabled (alone):						PSR1</div><div class='add'>+ *  enabled + sel_update_enabled:				PSR2</div><div class='add'>+ *  enabled + panel_replay_enabled:				Panel Replay</div><div class='add'>+ *  enabled + panel_replay_enabled + sel_update_enabled:	Panel Replay SU</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define CAN_PSR(intel_dp) ((intel_dp)-&gt;psr.sink_support &amp;&amp; \</div><div class='ctx'> 			   (intel_dp)-&gt;psr.source_support)</div><div class='ctx'> </div><div class='del'>-#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)-&gt;psr.sink_panel_replay_support &amp;&amp; \</div><div class='del'>-				    (intel_dp)-&gt;psr.source_panel_replay_support)</div><div class='del'>-</div><div class='ctx'> bool intel_encoder_can_psr(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	if (intel_encoder_is_dp(encoder) || encoder-&gt;type == INTEL_OUTPUT_DP_MST)</div><div class='hunk'>@@ -330,6 +343,9 @@ static void psr_irq_control(struct intel_dp *intel_dp)</div><div class='ctx'> 	enum transcoder cpu_transcoder = intel_dp-&gt;psr.transcoder;</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> </div><div class='add'>+	if (intel_dp-&gt;psr.panel_replay_enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	mask = psr_irq_psr_error_bit_get(intel_dp);</div><div class='ctx'> 	if (intel_dp-&gt;psr.debug &amp; I915_PSR_DEBUG_IRQ)</div><div class='ctx'> 		mask |= psr_irq_post_exit_bit_get(intel_dp) |</div><div class='hunk'>@@ -619,40 +635,59 @@ static bool psr2_su_region_et_valid(struct intel_dp *intel_dp)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_psr_enable_sink(struct intel_dp *intel_dp)</div><div class='add'>+static unsigned int intel_psr_get_enable_sink_offset(struct intel_dp *intel_dp)</div><div class='add'>+{</div><div class='add'>+	return intel_dp-&gt;psr.panel_replay_enabled ?</div><div class='add'>+		PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Note: Most of the bits are same in PANEL_REPLAY_CONFIG and DP_PSR_EN_CFG. We</div><div class='add'>+ * are relying on PSR definitions on these "common" bits.</div><div class='add'>+ */</div><div class='add'>+void intel_psr_enable_sink(struct intel_dp *intel_dp,</div><div class='add'>+			   const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='ctx'> 	u8 dpcd_val = DP_PSR_ENABLE;</div><div class='ctx'> </div><div class='del'>-	if (intel_dp-&gt;psr.panel_replay_enabled)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (intel_dp-&gt;psr.psr2_enabled) {</div><div class='add'>+	if (crtc_state-&gt;has_psr2) {</div><div class='ctx'> 		/* Enable ALPM at sink for psr2 */</div><div class='del'>-		drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_RECEIVER_ALPM_CONFIG,</div><div class='del'>-				   DP_ALPM_ENABLE |</div><div class='del'>-				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);</div><div class='add'>+		if (!crtc_state-&gt;has_panel_replay) {</div><div class='add'>+			drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux,</div><div class='add'>+					   DP_RECEIVER_ALPM_CONFIG,</div><div class='add'>+					   DP_ALPM_ENABLE |</div><div class='add'>+					   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);</div><div class='add'>+</div><div class='add'>+			if (psr2_su_region_et_valid(intel_dp))</div><div class='add'>+				dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;</div><div class='del'>-		if (psr2_su_region_et_valid(intel_dp))</div><div class='del'>-			dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (intel_dp-&gt;psr.link_standby)</div><div class='ctx'> 			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;</div><div class='ctx'> </div><div class='del'>-		if (DISPLAY_VER(dev_priv) &gt;= 8)</div><div class='add'>+		if (!crtc_state-&gt;has_panel_replay &amp;&amp; DISPLAY_VER(dev_priv) &gt;= 8)</div><div class='ctx'> 			dpcd_val |= DP_PSR_CRC_VERIFICATION;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_dp-&gt;psr.req_psr2_sdp_prior_scanline)</div><div class='add'>+	if (crtc_state-&gt;has_panel_replay)</div><div class='add'>+		dpcd_val |= DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |</div><div class='add'>+			DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN;</div><div class='add'>+</div><div class='add'>+	if (crtc_state-&gt;req_psr2_sdp_prior_scanline)</div><div class='ctx'> 		dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_dp-&gt;psr.entry_setup_frames &gt; 0)</div><div class='ctx'> 		dpcd_val |= DP_PSR_FRAME_CAPTURE;</div><div class='ctx'> </div><div class='del'>-	drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_PSR_EN_CFG, dpcd_val);</div><div class='add'>+	drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux,</div><div class='add'>+			   intel_psr_get_enable_sink_offset(intel_dp),</div><div class='add'>+			   dpcd_val);</div><div class='ctx'> </div><div class='del'>-	drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_SET_POWER, DP_SET_POWER_D0);</div><div class='add'>+	if (intel_dp_is_edp(intel_dp))</div><div class='add'>+		drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_SET_POWER, DP_SET_POWER_D0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)</div><div class='hunk'>@@ -1126,6 +1161,141 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * See Bspec: 71632 for the table</div><div class='add'>+ *</div><div class='add'>+ * Silence_period = tSilence,Min + ((tSilence,Max - tSilence,Min) / 2)</div><div class='add'>+ *</div><div class='add'>+ * Half cycle duration:</div><div class='add'>+ *</div><div class='add'>+ * Link rates 1.62 - 4.32 and tLFPS_Cycle = 70 ns</div><div class='add'>+ * FLOOR( (Link Rate * tLFPS_Cycle) / (2 * 10) )</div><div class='add'>+ *</div><div class='add'>+ * Link rates 5.4 - 8.1</div><div class='add'>+ * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ] = 10</div><div class='add'>+ * LFPS Period chosen is the mid-point of the min:max values from the table</div><div class='add'>+ * FLOOR( LFPS Period in Symbol clocks /</div><div class='add'>+ * (2 * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ]) )</div><div class='add'>+ */</div><div class='add'>+static bool _lnl_get_silence_period_and_lfps_half_cycle(int link_rate,</div><div class='add'>+							int *silence_period,</div><div class='add'>+							int *lfps_half_cycle)</div><div class='add'>+{</div><div class='add'>+	switch (link_rate) {</div><div class='add'>+	case 162000:</div><div class='add'>+		*silence_period = 20;</div><div class='add'>+		*lfps_half_cycle = 5;</div><div class='add'>+		break;</div><div class='add'>+	case 216000:</div><div class='add'>+		*silence_period = 27;</div><div class='add'>+		*lfps_half_cycle = 7;</div><div class='add'>+		break;</div><div class='add'>+	case 243000:</div><div class='add'>+		*silence_period = 31;</div><div class='add'>+		*lfps_half_cycle = 8;</div><div class='add'>+		break;</div><div class='add'>+	case 270000:</div><div class='add'>+		*silence_period = 34;</div><div class='add'>+		*lfps_half_cycle = 9;</div><div class='add'>+		break;</div><div class='add'>+	case 324000:</div><div class='add'>+		*silence_period = 41;</div><div class='add'>+		*lfps_half_cycle = 11;</div><div class='add'>+		break;</div><div class='add'>+	case 432000:</div><div class='add'>+		*silence_period = 56;</div><div class='add'>+		*lfps_half_cycle = 15;</div><div class='add'>+		break;</div><div class='add'>+	case 540000:</div><div class='add'>+		*silence_period = 69;</div><div class='add'>+		*lfps_half_cycle = 12;</div><div class='add'>+		break;</div><div class='add'>+	case 648000:</div><div class='add'>+		*silence_period = 84;</div><div class='add'>+		*lfps_half_cycle = 15;</div><div class='add'>+		break;</div><div class='add'>+	case 675000:</div><div class='add'>+		*silence_period = 87;</div><div class='add'>+		*lfps_half_cycle = 15;</div><div class='add'>+		break;</div><div class='add'>+	case 810000:</div><div class='add'>+		*silence_period = 104;</div><div class='add'>+		*lfps_half_cycle = 19;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*silence_period = *lfps_half_cycle = -1;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+</div><div class='add'>+ * tSilence, Max+ tPHY Establishment + tCDS) / tline)</div><div class='add'>+ * For the "PHY P2 to P0" latency see the PHY Power Control page</div><div class='add'>+ * (PHY P2 to P0) : https://gfxspecs.intel.com/Predator/Home/Index/68965</div><div class='add'>+ * : 12 us</div><div class='add'>+ * The tLFPS_Period, Max term is 800ns</div><div class='add'>+ * The tSilence, Max term is 180ns</div><div class='add'>+ * The tPHY Establishment (a.k.a. t1) term is 50us</div><div class='add'>+ * The tCDS term is 1 or 2 times t2</div><div class='add'>+ * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK</div><div class='add'>+ * Number ML_PHY_LOCK = ( 7 + CEILING( 6.5us / tML_PHY_LOCK ) + 1)</div><div class='add'>+ * Rounding up the 6.5us padding to the next ML_PHY_LOCK boundary and</div><div class='add'>+ * adding the "+ 1" term ensures all ML_PHY_LOCK sequences that start</div><div class='add'>+ * within the CDS period complete within the CDS period regardless of</div><div class='add'>+ * entry into the period</div><div class='add'>+ * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )</div><div class='add'>+ * TPS4 Length = 252 Symbols</div><div class='add'>+ */</div><div class='add'>+static int _lnl_compute_aux_less_wake_time(int port_clock)</div><div class='add'>+{</div><div class='add'>+	int tphy2_p2_to_p0 = 12 * 1000;</div><div class='add'>+	int tlfps_period_max = 800;</div><div class='add'>+	int tsilence_max = 180;</div><div class='add'>+	int t1 = 50 * 1000;</div><div class='add'>+	int tps4 = 252;</div><div class='add'>+	int tml_phy_lock = 1000 * 1000 * tps4 * 10 / port_clock;</div><div class='add'>+	int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;</div><div class='add'>+	int t2 = num_ml_phy_lock * tml_phy_lock;</div><div class='add'>+	int tcds = 1 * t2;</div><div class='add'>+</div><div class='add'>+	return DIV_ROUND_UP(tphy2_p2_to_p0 + tlfps_period_max + tsilence_max +</div><div class='add'>+			    t1 + tcds, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,</div><div class='add'>+					     struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='add'>+	int aux_less_wake_time, aux_less_wake_lines, silence_period,</div><div class='add'>+		lfps_half_cycle;</div><div class='add'>+</div><div class='add'>+	aux_less_wake_time =</div><div class='add'>+		_lnl_compute_aux_less_wake_time(crtc_state-&gt;port_clock);</div><div class='add'>+	aux_less_wake_lines = intel_usecs_to_scanlines(&amp;crtc_state-&gt;hw.adjusted_mode,</div><div class='add'>+						       aux_less_wake_time);</div><div class='add'>+</div><div class='add'>+	if (!_lnl_get_silence_period_and_lfps_half_cycle(crtc_state-&gt;port_clock,</div><div class='add'>+							 &amp;silence_period,</div><div class='add'>+							 &amp;lfps_half_cycle))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (aux_less_wake_lines &gt; ALPM_CTL_AUX_LESS_WAKE_TIME_MASK ||</div><div class='add'>+	    silence_period &gt; PORT_ALPM_CTL_SILENCE_PERIOD_MASK ||</div><div class='add'>+	    lfps_half_cycle &gt; PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (i915-&gt;display.params.psr_safest_params)</div><div class='add'>+		aux_less_wake_lines = ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;</div><div class='add'>+</div><div class='add'>+	intel_dp-&gt;psr.alpm_parameters.fast_wake_lines = aux_less_wake_lines;</div><div class='add'>+	intel_dp-&gt;psr.alpm_parameters.silence_period_sym_clocks = silence_period;</div><div class='add'>+	intel_dp-&gt;psr.alpm_parameters.lfps_half_cycle_num_of_syms = lfps_half_cycle;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,</div><div class='ctx'> 				     struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='hunk'>@@ -1142,6 +1312,9 @@ static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,</div><div class='ctx'> 	if (check_entry_lines &gt; 15)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	if (!_lnl_compute_aux_less_alpm_params(intel_dp, crtc_state))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	if (i915-&gt;display.params.psr_safest_params)</div><div class='ctx'> 		check_entry_lines = 15;</div><div class='ctx'> </div><div class='hunk'>@@ -1150,28 +1323,52 @@ static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * IO wake time for DISPLAY_VER &lt; 12 is not directly mentioned in Bspec. There</div><div class='add'>+ * are 50 us io wake time and 32 us fast wake time. Clearly preharge pulses are</div><div class='add'>+ * not (improperly) included in 32 us fast wake time. 50 us - 32 us = 18 us.</div><div class='add'>+ */</div><div class='add'>+static int skl_io_buffer_wake_time(void)</div><div class='add'>+{</div><div class='add'>+	return 18;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tgl_io_buffer_wake_time(void)</div><div class='add'>+{</div><div class='add'>+	return 10;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int io_buffer_wake_time(const struct intel_crtc_state *crtc_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER(i915) &gt;= 12)</div><div class='add'>+		return tgl_io_buffer_wake_time();</div><div class='add'>+	else</div><div class='add'>+		return skl_io_buffer_wake_time();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool _compute_alpm_params(struct intel_dp *intel_dp,</div><div class='ctx'> 				 struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);</div><div class='ctx'> 	int io_wake_lines, io_wake_time, fast_wake_lines, fast_wake_time;</div><div class='add'>+	int tfw_exit_latency = 20; /* eDP spec */</div><div class='add'>+	int phy_wake = 4;	   /* eDP spec */</div><div class='add'>+	int preamble = 8;	   /* eDP spec */</div><div class='add'>+	int precharge = intel_dp_aux_fw_sync_len() - preamble;</div><div class='ctx'> 	u8 max_wake_lines;</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(i915) &gt;= 12) {</div><div class='del'>-		io_wake_time = 42;</div><div class='del'>-		/*</div><div class='del'>-		 * According to Bspec it's 42us, but based on testing</div><div class='del'>-		 * it is not enough -&gt; use 45 us.</div><div class='del'>-		 */</div><div class='del'>-		fast_wake_time = 45;</div><div class='add'>+	io_wake_time = max(precharge, io_buffer_wake_time(crtc_state)) +</div><div class='add'>+		preamble + phy_wake + tfw_exit_latency;</div><div class='add'>+	fast_wake_time = precharge + preamble + phy_wake +</div><div class='add'>+		tfw_exit_latency;</div><div class='ctx'> </div><div class='add'>+	if (DISPLAY_VER(i915) &gt;= 12)</div><div class='ctx'> 		/* TODO: Check how we can use ALPM_CTL fast wake extended field */</div><div class='ctx'> 		max_wake_lines = 12;</div><div class='del'>-	} else {</div><div class='del'>-		io_wake_time = 50;</div><div class='del'>-		fast_wake_time = 32;</div><div class='add'>+	else</div><div class='ctx'> 		max_wake_lines = 8;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	io_wake_lines = intel_usecs_to_scanlines(</div><div class='ctx'> 		&amp;crtc_state-&gt;hw.adjusted_mode, io_wake_time);</div><div class='hunk'>@@ -1435,10 +1632,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,</div><div class='ctx'> </div><div class='ctx'> 	if (CAN_PANEL_REPLAY(intel_dp))</div><div class='ctx'> 		crtc_state-&gt;has_panel_replay = true;</div><div class='del'>-	else</div><div class='del'>-		crtc_state-&gt;has_psr = _psr_compute_config(intel_dp, crtc_state);</div><div class='ctx'> </div><div class='del'>-	if (!(crtc_state-&gt;has_panel_replay || crtc_state-&gt;has_psr))</div><div class='add'>+	crtc_state-&gt;has_psr = crtc_state-&gt;has_panel_replay ? true :</div><div class='add'>+		_psr_compute_config(intel_dp, crtc_state);</div><div class='add'>+</div><div class='add'>+	if (!crtc_state-&gt;has_psr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	crtc_state-&gt;has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);</div><div class='hunk'>@@ -1465,7 +1663,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_dp-&gt;psr.panel_replay_enabled) {</div><div class='del'>-		pipe_config-&gt;has_panel_replay = true;</div><div class='add'>+		pipe_config-&gt;has_psr = pipe_config-&gt;has_panel_replay = true;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Not possible to read EDP_PSR/PSR2_CTL registers as it is</div><div class='hunk'>@@ -1570,14 +1768,44 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='ctx'> 	enum transcoder cpu_transcoder = intel_dp-&gt;psr.transcoder;</div><div class='ctx'> 	struct intel_psr *psr = &amp;intel_dp-&gt;psr;</div><div class='add'>+	u32 alpm_ctl;</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(dev_priv) &lt; 20)</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &lt; 20 || (!intel_dp-&gt;psr.psr2_enabled &amp;&amp;</div><div class='add'>+					   !intel_dp_is_edp(intel_dp)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),</div><div class='del'>-		       ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |</div><div class='del'>-		       ALPM_CTL_ALPM_ENTRY_CHECK(psr-&gt;alpm_parameters.check_entry_lines) |</div><div class='del'>-		       ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-&gt;alpm_parameters.fast_wake_lines));</div><div class='add'>+	/*</div><div class='add'>+	 * Panel Replay on eDP is always using ALPM aux less. I.e. no need to</div><div class='add'>+	 * check panel support at this point.</div><div class='add'>+	 */</div><div class='add'>+	if (intel_dp-&gt;psr.panel_replay_enabled &amp;&amp; intel_dp_is_edp(intel_dp)) {</div><div class='add'>+		alpm_ctl = ALPM_CTL_ALPM_ENABLE |</div><div class='add'>+			ALPM_CTL_ALPM_AUX_LESS_ENABLE |</div><div class='add'>+			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;</div><div class='add'>+</div><div class='add'>+		intel_de_write(dev_priv, PORT_ALPM_CTL(cpu_transcoder),</div><div class='add'>+			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |</div><div class='add'>+			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |</div><div class='add'>+			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |</div><div class='add'>+			       PORT_ALPM_CTL_SILENCE_PERIOD(</div><div class='add'>+				       psr-&gt;alpm_parameters.silence_period_sym_clocks));</div><div class='add'>+</div><div class='add'>+		intel_de_write(dev_priv, PORT_ALPM_LFPS_CTL(cpu_transcoder),</div><div class='add'>+			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |</div><div class='add'>+			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(</div><div class='add'>+				       psr-&gt;alpm_parameters.lfps_half_cycle_num_of_syms) |</div><div class='add'>+			       PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(</div><div class='add'>+				       psr-&gt;alpm_parameters.lfps_half_cycle_num_of_syms) |</div><div class='add'>+			       PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(</div><div class='add'>+				       psr-&gt;alpm_parameters.lfps_half_cycle_num_of_syms));</div><div class='add'>+	} else {</div><div class='add'>+		alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |</div><div class='add'>+			ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-&gt;alpm_parameters.fast_wake_lines);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(psr-&gt;alpm_parameters.check_entry_lines);</div><div class='add'>+</div><div class='add'>+	intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_psr_enable_source(struct intel_dp *intel_dp,</div><div class='hunk'>@@ -1585,7 +1813,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='ctx'> 	enum transcoder cpu_transcoder = intel_dp-&gt;psr.transcoder;</div><div class='del'>-	u32 mask;</div><div class='add'>+	u32 mask = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only HSW and BDW have PSR AUX registers that need to be setup.</div><div class='hunk'>@@ -1599,34 +1827,46 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,</div><div class='ctx'> 	 * mask LPSP to avoid dependency on other drivers that might block</div><div class='ctx'> 	 * runtime_pm besides preventing  other hw tracking issues now we</div><div class='ctx'> 	 * can rely on frontbuffer tracking.</div><div class='add'>+	 *</div><div class='add'>+	 * From bspec prior LunarLake:</div><div class='add'>+	 * Only PSR_MASK[Mask FBC modify] and PSR_MASK[Mask Hotplug] are used in</div><div class='add'>+	 * panel replay mode.</div><div class='add'>+	 *</div><div class='add'>+	 * From bspec beyod LunarLake:</div><div class='add'>+	 * Panel Replay on DP: No bits are applicable</div><div class='add'>+	 * Panel Replay on eDP: All bits are applicable</div><div class='ctx'> 	 */</div><div class='del'>-	mask = EDP_PSR_DEBUG_MASK_MEMUP |</div><div class='del'>-	       EDP_PSR_DEBUG_MASK_HPD;</div><div class='add'>+	if (DISPLAY_VER(dev_priv) &lt; 20 || intel_dp_is_edp(intel_dp))</div><div class='add'>+		mask = EDP_PSR_DEBUG_MASK_HPD;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * For some unknown reason on HSW non-ULT (or at least on</div><div class='del'>-	 * Dell Latitude E6540) external displays start to flicker</div><div class='del'>-	 * when PSR is enabled on the eDP. SR/PC6 residency is much</div><div class='del'>-	 * higher than should be possible with an external display.</div><div class='del'>-	 * As a workaround leave LPSP unmasked to prevent PSR entry</div><div class='del'>-	 * when external displays are active.</div><div class='del'>-	 */</div><div class='del'>-	if (DISPLAY_VER(dev_priv) &gt;= 8 || IS_HASWELL_ULT(dev_priv))</div><div class='del'>-		mask |= EDP_PSR_DEBUG_MASK_LPSP;</div><div class='add'>+	if (intel_dp_is_edp(intel_dp)) {</div><div class='add'>+		mask |= EDP_PSR_DEBUG_MASK_MEMUP;</div><div class='ctx'> </div><div class='del'>-	if (DISPLAY_VER(dev_priv) &lt; 20)</div><div class='del'>-		mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;</div><div class='add'>+		/*</div><div class='add'>+		 * For some unknown reason on HSW non-ULT (or at least on</div><div class='add'>+		 * Dell Latitude E6540) external displays start to flicker</div><div class='add'>+		 * when PSR is enabled on the eDP. SR/PC6 residency is much</div><div class='add'>+		 * higher than should be possible with an external display.</div><div class='add'>+		 * As a workaround leave LPSP unmasked to prevent PSR entry</div><div class='add'>+		 * when external displays are active.</div><div class='add'>+		 */</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &gt;= 8 || IS_HASWELL_ULT(dev_priv))</div><div class='add'>+			mask |= EDP_PSR_DEBUG_MASK_LPSP;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * No separate pipe reg write mask on hsw/bdw, so have to unmask all</div><div class='del'>-	 * registers in order to keep the CURSURFLIVE tricks working :(</div><div class='del'>-	 */</div><div class='del'>-	if (IS_DISPLAY_VER(dev_priv, 9, 10))</div><div class='del'>-		mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;</div><div class='add'>+		if (DISPLAY_VER(dev_priv) &lt; 20)</div><div class='add'>+			mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;</div><div class='ctx'> </div><div class='del'>-	/* allow PSR with sprite enabled */</div><div class='del'>-	if (IS_HASWELL(dev_priv))</div><div class='del'>-		mask |= EDP_PSR_DEBUG_MASK_SPRITE_ENABLE;</div><div class='add'>+		/*</div><div class='add'>+		 * No separate pipe reg write mask on hsw/bdw, so have to unmask all</div><div class='add'>+		 * registers in order to keep the CURSURFLIVE tricks working :(</div><div class='add'>+		 */</div><div class='add'>+		if (IS_DISPLAY_VER(dev_priv, 9, 10))</div><div class='add'>+			mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;</div><div class='add'>+</div><div class='add'>+		/* allow PSR with sprite enabled */</div><div class='add'>+		if (IS_HASWELL(dev_priv))</div><div class='add'>+			mask |= EDP_PSR_DEBUG_MASK_SPRITE_ENABLE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write(dev_priv, psr_debug_reg(dev_priv, cpu_transcoder), mask);</div><div class='ctx'> </div><div class='hunk'>@@ -1645,7 +1885,8 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,</div><div class='ctx'> 			     intel_dp-&gt;psr.psr2_sel_fetch_enabled ?</div><div class='ctx'> 			     IGNORE_PSR2_HW_TRACKING : 0);</div><div class='ctx'> </div><div class='del'>-	lnl_alpm_configure(intel_dp);</div><div class='add'>+	if (intel_dp_is_edp(intel_dp))</div><div class='add'>+		lnl_alpm_configure(intel_dp);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Wa_16013835468</div><div class='hunk'>@@ -1686,6 +1927,9 @@ static bool psr_interrupt_error_check(struct intel_dp *intel_dp)</div><div class='ctx'> 	enum transcoder cpu_transcoder = intel_dp-&gt;psr.transcoder;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='add'>+	if (intel_dp-&gt;psr.panel_replay_enabled)</div><div class='add'>+		goto no_err;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR</div><div class='ctx'> 	 * will still keep the error set even after the reset done in the</div><div class='hunk'>@@ -1703,6 +1947,7 @@ static bool psr_interrupt_error_check(struct intel_dp *intel_dp)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+no_err:</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1711,7 +1956,6 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, dig_port-&gt;base.port);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	drm_WARN_ON(&amp;dev_priv-&gt;drm, intel_dp-&gt;psr.enabled);</div><div class='hunk'>@@ -1733,14 +1977,22 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,</div><div class='ctx'> 	if (!psr_interrupt_error_check(intel_dp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (intel_dp-&gt;psr.panel_replay_enabled)</div><div class='add'>+	if (intel_dp-&gt;psr.panel_replay_enabled) {</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Enabling Panel Replay\n");</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Enabling PSR%s\n",</div><div class='ctx'> 			    intel_dp-&gt;psr.psr2_enabled ? "2" : "1");</div><div class='ctx'> </div><div class='del'>-	intel_snps_phy_update_psr_power_state(dev_priv, phy, true);</div><div class='del'>-	intel_psr_enable_sink(intel_dp);</div><div class='add'>+		/*</div><div class='add'>+		 * Panel replay has to be enabled before link training: doing it</div><div class='add'>+		 * only for PSR here.</div><div class='add'>+		 */</div><div class='add'>+		intel_psr_enable_sink(intel_dp, crtc_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (intel_dp_is_edp(intel_dp))</div><div class='add'>+		intel_snps_phy_update_psr_power_state(&amp;dig_port-&gt;base, true);</div><div class='add'>+</div><div class='ctx'> 	intel_psr_enable_source(intel_dp, crtc_state);</div><div class='ctx'> 	intel_dp-&gt;psr.enabled = true;</div><div class='ctx'> 	intel_dp-&gt;psr.paused = false;</div><div class='hunk'>@@ -1810,8 +2062,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='ctx'> 	enum transcoder cpu_transcoder = intel_dp-&gt;psr.transcoder;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv,</div><div class='del'>-					 dp_to_dig_port(intel_dp)-&gt;base.port);</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;intel_dp-&gt;psr.lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1846,12 +2096,25 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)</div><div class='ctx'> 				     CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_snps_phy_update_psr_power_state(dev_priv, phy, false);</div><div class='add'>+	if (intel_dp_is_edp(intel_dp))</div><div class='add'>+		intel_snps_phy_update_psr_power_state(&amp;dp_to_dig_port(intel_dp)-&gt;base, false);</div><div class='add'>+</div><div class='add'>+	/* Panel Replay on eDP is always using ALPM aux less. */</div><div class='add'>+	if (intel_dp-&gt;psr.panel_replay_enabled &amp;&amp; intel_dp_is_edp(intel_dp)) {</div><div class='add'>+		intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),</div><div class='add'>+			     ALPM_CTL_ALPM_ENABLE |</div><div class='add'>+			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);</div><div class='add'>+</div><div class='add'>+		intel_de_rmw(dev_priv, PORT_ALPM_CTL(cpu_transcoder),</div><div class='add'>+			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable PSR on Sink */</div><div class='del'>-	drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_PSR_EN_CFG, 0);</div><div class='add'>+	drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux,</div><div class='add'>+			   intel_psr_get_enable_sink_offset(intel_dp), 0);</div><div class='ctx'> </div><div class='del'>-	if (intel_dp-&gt;psr.psr2_enabled)</div><div class='add'>+	if (!intel_dp-&gt;psr.panel_replay_enabled &amp;&amp;</div><div class='add'>+	    intel_dp-&gt;psr.psr2_enabled)</div><div class='ctx'> 		drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_RECEIVER_ALPM_CONFIG, 0);</div><div class='ctx'> </div><div class='ctx'> 	intel_dp-&gt;psr.enabled = false;</div><div class='hunk'>@@ -1899,7 +2162,7 @@ void intel_psr_pause(struct intel_dp *intel_dp)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='ctx'> 	struct intel_psr *psr = &amp;intel_dp-&gt;psr;</div><div class='ctx'> </div><div class='del'>-	if (!CAN_PSR(intel_dp))</div><div class='add'>+	if (!CAN_PSR(intel_dp) &amp;&amp; !CAN_PANEL_REPLAY(intel_dp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;psr-&gt;lock);</div><div class='hunk'>@@ -1932,7 +2195,7 @@ void intel_psr_resume(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_psr *psr = &amp;intel_dp-&gt;psr;</div><div class='ctx'> </div><div class='del'>-	if (!CAN_PSR(intel_dp))</div><div class='add'>+	if (!CAN_PSR(intel_dp) &amp;&amp; !CAN_PANEL_REPLAY(intel_dp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;psr-&gt;lock);</div><div class='hunk'>@@ -2069,14 +2332,19 @@ exit:</div><div class='ctx'> 	crtc_state-&gt;psr2_man_track_ctl = val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,</div><div class='del'>-					  bool full_update)</div><div class='add'>+static u32</div><div class='add'>+psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,</div><div class='add'>+			       bool full_update, bool cursor_in_su_area)</div><div class='ctx'> {</div><div class='ctx'> 	int width, height;</div><div class='ctx'> </div><div class='ctx'> 	if (!crtc_state-&gt;enable_psr2_su_region_et || full_update)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (!cursor_in_su_area)</div><div class='add'>+		return PIPESRC_WIDTH(0) |</div><div class='add'>+			PIPESRC_HEIGHT(drm_rect_height(&amp;crtc_state-&gt;pipe_src));</div><div class='add'>+</div><div class='ctx'> 	width = drm_rect_width(&amp;crtc_state-&gt;psr2_su_area);</div><div class='ctx'> 	height = drm_rect_height(&amp;crtc_state-&gt;psr2_su_area);</div><div class='ctx'> </div><div class='hunk'>@@ -2128,7 +2396,8 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,</div><div class='del'>-				  struct intel_crtc *crtc)</div><div class='add'>+				  struct intel_crtc *crtc,</div><div class='add'>+				  bool *cursor_in_su_area)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct intel_plane_state *new_plane_state;</div><div class='hunk'>@@ -2156,6 +2425,7 @@ intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 		clip_area_update(&amp;crtc_state-&gt;psr2_su_area, &amp;new_plane_state-&gt;uapi.dst,</div><div class='ctx'> 				 &amp;crtc_state-&gt;pipe_src);</div><div class='add'>+		*cursor_in_su_area = true;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2201,7 +2471,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,</div><div class='ctx'> 	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct intel_plane_state *new_plane_state, *old_plane_state;</div><div class='ctx'> 	struct intel_plane *plane;</div><div class='del'>-	bool full_update = false;</div><div class='add'>+	bool full_update = false, cursor_in_su_area = false;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!crtc_state-&gt;enable_psr2_sel_fetch)</div><div class='hunk'>@@ -2318,7 +2588,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,</div><div class='ctx'> 	 * drm_atomic_add_affected_planes to ensure visible cursor is added into</div><div class='ctx'> 	 * affected planes even when cursor is not updated by itself.</div><div class='ctx'> 	 */</div><div class='del'>-	intel_psr2_sel_fetch_et_alignment(state, crtc);</div><div class='add'>+	intel_psr2_sel_fetch_et_alignment(state, crtc, &amp;cursor_in_su_area);</div><div class='ctx'> </div><div class='ctx'> 	intel_psr2_sel_fetch_pipe_alignment(crtc_state);</div><div class='ctx'> </div><div class='hunk'>@@ -2382,7 +2652,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,</div><div class='ctx'> skip_sel_fetch_set_loop:</div><div class='ctx'> 	psr2_man_trk_ctl_calc(crtc_state, full_update);</div><div class='ctx'> 	crtc_state-&gt;pipe_srcsz_early_tpt =</div><div class='del'>-		psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);</div><div class='add'>+		psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update,</div><div class='add'>+					       cursor_in_su_area);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2439,7 +2710,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state,</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct intel_encoder *encoder;</div><div class='ctx'> </div><div class='del'>-	if (!(crtc_state-&gt;has_psr || crtc_state-&gt;has_panel_replay))</div><div class='add'>+	if (!crtc_state-&gt;has_psr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for_each_intel_encoder_mask_with_psr(state-&gt;base.dev, encoder,</div><div class='hunk'>@@ -3039,6 +3310,13 @@ static void psr_capability_changed_check(struct intel_dp *intel_dp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * On common bits:</div><div class='add'>+ * DP_PSR_RFB_STORAGE_ERROR == DP_PANEL_REPLAY_RFB_STORAGE_ERROR</div><div class='add'>+ * DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR == DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR</div><div class='add'>+ * DP_PSR_LINK_CRC_ERROR == DP_PANEL_REPLAY_LINK_CRC_ERROR</div><div class='add'>+ * this function is relying on PSR definitions</div><div class='add'>+ */</div><div class='ctx'> void intel_psr_short_pulse(struct intel_dp *intel_dp)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);</div><div class='hunk'>@@ -3048,7 +3326,7 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)</div><div class='ctx'> 			  DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |</div><div class='ctx'> 			  DP_PSR_LINK_CRC_ERROR;</div><div class='ctx'> </div><div class='del'>-	if (!CAN_PSR(intel_dp))</div><div class='add'>+	if (!CAN_PSR(intel_dp) &amp;&amp; !CAN_PANEL_REPLAY(intel_dp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;psr-&gt;lock);</div><div class='hunk'>@@ -3062,12 +3340,14 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (status == DP_PSR_SINK_INTERNAL_ERROR || (error_status &amp; errors)) {</div><div class='add'>+	if ((!psr-&gt;panel_replay_enabled &amp;&amp; status == DP_PSR_SINK_INTERNAL_ERROR) ||</div><div class='add'>+	    (error_status &amp; errors)) {</div><div class='ctx'> 		intel_psr_disable_locked(intel_dp);</div><div class='ctx'> 		psr-&gt;sink_not_reliable = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (status == DP_PSR_SINK_INTERNAL_ERROR &amp;&amp; !error_status)</div><div class='add'>+	if (!psr-&gt;panel_replay_enabled &amp;&amp; status == DP_PSR_SINK_INTERNAL_ERROR &amp;&amp;</div><div class='add'>+	    !error_status)</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			    "PSR sink internal error, disabling PSR\n");</div><div class='ctx'> 	if (error_status &amp; DP_PSR_RFB_STORAGE_ERROR)</div><div class='hunk'>@@ -3087,8 +3367,10 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)</div><div class='ctx'> 	/* clear status register */</div><div class='ctx'> 	drm_dp_dpcd_writeb(&amp;intel_dp-&gt;aux, DP_PSR_ERROR_STATUS, error_status);</div><div class='ctx'> </div><div class='del'>-	psr_alpm_check(intel_dp);</div><div class='del'>-	psr_capability_changed_check(intel_dp);</div><div class='add'>+	if (!psr-&gt;panel_replay_enabled) {</div><div class='add'>+		psr_alpm_check(intel_dp);</div><div class='add'>+		psr_capability_changed_check(intel_dp);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	mutex_unlock(&amp;psr-&gt;lock);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h<br/>index cde781df84d5..d483c85870e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_psr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_psr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_psr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_psr.h</a></div><div class='hunk'>@@ -21,8 +21,13 @@ struct intel_encoder;</div><div class='ctx'> struct intel_plane;</div><div class='ctx'> struct intel_plane_state;</div><div class='ctx'> </div><div class='add'>+#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)-&gt;psr.sink_panel_replay_support &amp;&amp; \</div><div class='add'>+				    (intel_dp)-&gt;psr.source_panel_replay_support)</div><div class='add'>+</div><div class='ctx'> bool intel_encoder_can_psr(struct intel_encoder *encoder);</div><div class='ctx'> void intel_psr_init_dpcd(struct intel_dp *intel_dp);</div><div class='add'>+void intel_psr_enable_sink(struct intel_dp *intel_dp,</div><div class='add'>+			   const struct intel_crtc_state *crtc_state);</div><div class='ctx'> void intel_psr_pre_plane_update(struct intel_atomic_state *state,</div><div class='ctx'> 				struct intel_crtc *crtc);</div><div class='ctx'> void intel_psr_post_plane_update(struct intel_atomic_state *state,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h<br/>index 8427a736f639..ebc22999572c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_psr_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_psr_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_psr_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_psr_regs.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include "intel_display_reg_defs.h"</div><div class='ctx'> #include "intel_dp_aux_regs.h"</div><div class='ctx'> </div><div class='del'>-#define TRANS_EXITLINE(trans)	_MMIO_TRANS2((trans), _TRANS_EXITLINE_A)</div><div class='add'>+#define TRANS_EXITLINE(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_EXITLINE_A)</div><div class='ctx'> #define   EXITLINE_ENABLE	REG_BIT(31)</div><div class='ctx'> #define   EXITLINE_MASK		REG_GENMASK(12, 0)</div><div class='ctx'> #define   EXITLINE_SHIFT	0</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #define HSW_SRD_CTL				_MMIO(0x64800)</div><div class='ctx'> #define _SRD_CTL_A				0x60800</div><div class='ctx'> #define _SRD_CTL_EDP				0x6f800</div><div class='del'>-#define EDP_PSR_CTL(tran)			_MMIO_TRANS2(tran, _SRD_CTL_A)</div><div class='add'>+#define EDP_PSR_CTL(tran)			_MMIO_TRANS2(dev_priv, tran, _SRD_CTL_A)</div><div class='ctx'> #define   EDP_PSR_ENABLE			REG_BIT(31)</div><div class='ctx'> #define   BDW_PSR_SINGLE_FRAME			REG_BIT(30)</div><div class='ctx'> #define   EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK	REG_BIT(29) /* SW can't modify */</div><div class='hunk'>@@ -66,8 +66,8 @@</div><div class='ctx'> #define EDP_PSR_IIR				_MMIO(0x64838)</div><div class='ctx'> #define _PSR_IMR_A				0x60814</div><div class='ctx'> #define _PSR_IIR_A				0x60818</div><div class='del'>-#define TRANS_PSR_IMR(tran)			_MMIO_TRANS2(tran, _PSR_IMR_A)</div><div class='del'>-#define TRANS_PSR_IIR(tran)			_MMIO_TRANS2(tran, _PSR_IIR_A)</div><div class='add'>+#define TRANS_PSR_IMR(tran)			_MMIO_TRANS2(dev_priv, tran, _PSR_IMR_A)</div><div class='add'>+#define TRANS_PSR_IIR(tran)			_MMIO_TRANS2(dev_priv, tran, _PSR_IIR_A)</div><div class='ctx'> #define   _EDP_PSR_TRANS_SHIFT(trans)		((trans) == TRANSCODER_EDP ? \</div><div class='ctx'> 						 0 : ((trans) - TRANSCODER_A + 1) * 8)</div><div class='ctx'> #define   TGL_PSR_MASK			REG_GENMASK(2, 0)</div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> #define HSW_SRD_AUX_CTL				_MMIO(0x64810)</div><div class='ctx'> #define _SRD_AUX_CTL_A				0x60810</div><div class='ctx'> #define _SRD_AUX_CTL_EDP			0x6f810</div><div class='del'>-#define EDP_PSR_AUX_CTL(tran)			_MMIO_TRANS2(tran, _SRD_AUX_CTL_A)</div><div class='add'>+#define EDP_PSR_AUX_CTL(tran)			_MMIO_TRANS2(dev_priv, tran, _SRD_AUX_CTL_A)</div><div class='ctx'> #define   EDP_PSR_AUX_CTL_TIME_OUT_MASK		DP_AUX_CH_CTL_TIME_OUT_MASK</div><div class='ctx'> #define   EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK	DP_AUX_CH_CTL_MESSAGE_SIZE_MASK</div><div class='ctx'> #define   EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK	DP_AUX_CH_CTL_PRECHARGE_2US_MASK</div><div class='hunk'>@@ -96,12 +96,12 @@</div><div class='ctx'> #define HSW_SRD_AUX_DATA(i)			_MMIO(0x64814 + (i) * 4) /* 5 registers */</div><div class='ctx'> #define _SRD_AUX_DATA_A				0x60814</div><div class='ctx'> #define _SRD_AUX_DATA_EDP			0x6f814</div><div class='del'>-#define EDP_PSR_AUX_DATA(tran, i)		_MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */</div><div class='add'>+#define EDP_PSR_AUX_DATA(tran, i)		_MMIO_TRANS2(dev_priv, tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */</div><div class='ctx'> </div><div class='ctx'> #define HSW_SRD_STATUS				_MMIO(0x64840)</div><div class='ctx'> #define _SRD_STATUS_A				0x60840</div><div class='ctx'> #define _SRD_STATUS_EDP				0x6f840</div><div class='del'>-#define EDP_PSR_STATUS(tran)			_MMIO_TRANS2(tran, _SRD_STATUS_A)</div><div class='add'>+#define EDP_PSR_STATUS(tran)			_MMIO_TRANS2(dev_priv, tran, _SRD_STATUS_A)</div><div class='ctx'> #define   EDP_PSR_STATUS_STATE_MASK		REG_GENMASK(31, 29)</div><div class='ctx'> #define   EDP_PSR_STATUS_STATE_IDLE		REG_FIELD_PREP(EDP_PSR_STATUS_STATE_MASK, 0)</div><div class='ctx'> #define   EDP_PSR_STATUS_STATE_SRDONACK		REG_FIELD_PREP(EDP_PSR_STATUS_STATE_MASK, 1)</div><div class='hunk'>@@ -126,14 +126,14 @@</div><div class='ctx'> #define HSW_SRD_PERF_CNT		_MMIO(0x64844)</div><div class='ctx'> #define _SRD_PERF_CNT_A			0x60844</div><div class='ctx'> #define _SRD_PERF_CNT_EDP		0x6f844</div><div class='del'>-#define EDP_PSR_PERF_CNT(tran)		_MMIO_TRANS2(tran, _SRD_PERF_CNT_A)</div><div class='add'>+#define EDP_PSR_PERF_CNT(tran)		_MMIO_TRANS2(dev_priv, tran, _SRD_PERF_CNT_A)</div><div class='ctx'> #define   EDP_PSR_PERF_CNT_MASK		REG_GENMASK(23, 0)</div><div class='ctx'> </div><div class='ctx'> /* PSR_MASK on SKL+ */</div><div class='ctx'> #define HSW_SRD_DEBUG				_MMIO(0x64860)</div><div class='ctx'> #define _SRD_DEBUG_A				0x60860</div><div class='ctx'> #define _SRD_DEBUG_EDP				0x6f860</div><div class='del'>-#define EDP_PSR_DEBUG(tran)			_MMIO_TRANS2(tran, _SRD_DEBUG_A)</div><div class='add'>+#define EDP_PSR_DEBUG(tran)			_MMIO_TRANS2(dev_priv, tran, _SRD_DEBUG_A)</div><div class='ctx'> #define   EDP_PSR_DEBUG_MASK_MAX_SLEEP		REG_BIT(28)</div><div class='ctx'> #define   EDP_PSR_DEBUG_MASK_LPSP		REG_BIT(27)</div><div class='ctx'> #define   EDP_PSR_DEBUG_MASK_MEMUP		REG_BIT(26)</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> </div><div class='ctx'> #define _PSR2_CTL_A				0x60900</div><div class='ctx'> #define _PSR2_CTL_EDP				0x6f900</div><div class='del'>-#define EDP_PSR2_CTL(tran)			_MMIO_TRANS2(tran, _PSR2_CTL_A)</div><div class='add'>+#define EDP_PSR2_CTL(tran)			_MMIO_TRANS2(dev_priv, tran, _PSR2_CTL_A)</div><div class='ctx'> #define   EDP_PSR2_ENABLE			REG_BIT(31)</div><div class='ctx'> #define   EDP_SU_TRACK_ENABLE			REG_BIT(30) /* up to adl-p */</div><div class='ctx'> #define   TGL_EDP_PSR2_BLOCK_COUNT_MASK		REG_BIT(28)</div><div class='hunk'>@@ -195,7 +195,7 @@</div><div class='ctx'> #define _PSR_EVENT_TRANS_C			0x62848</div><div class='ctx'> #define _PSR_EVENT_TRANS_D			0x63848</div><div class='ctx'> #define _PSR_EVENT_TRANS_EDP			0x6f848</div><div class='del'>-#define PSR_EVENT(tran)				_MMIO_TRANS2(tran, _PSR_EVENT_TRANS_A)</div><div class='add'>+#define PSR_EVENT(tran)				_MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A)</div><div class='ctx'> #define  PSR_EVENT_PSR2_WD_TIMER_EXPIRE		REG_BIT(17)</div><div class='ctx'> #define  PSR_EVENT_PSR2_DISABLED		REG_BIT(16)</div><div class='ctx'> #define  PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN	REG_BIT(15)</div><div class='hunk'>@@ -215,13 +215,13 @@</div><div class='ctx'> </div><div class='ctx'> #define _PSR2_STATUS_A				0x60940</div><div class='ctx'> #define _PSR2_STATUS_EDP			0x6f940</div><div class='del'>-#define EDP_PSR2_STATUS(tran)			_MMIO_TRANS2(tran, _PSR2_STATUS_A)</div><div class='add'>+#define EDP_PSR2_STATUS(tran)			_MMIO_TRANS2(dev_priv, tran, _PSR2_STATUS_A)</div><div class='ctx'> #define EDP_PSR2_STATUS_STATE_MASK		REG_GENMASK(31, 28)</div><div class='ctx'> #define EDP_PSR2_STATUS_STATE_DEEP_SLEEP	REG_FIELD_PREP(EDP_PSR2_STATUS_STATE_MASK, 0x8)</div><div class='ctx'> </div><div class='ctx'> #define _PSR2_SU_STATUS_A		0x60914</div><div class='ctx'> #define _PSR2_SU_STATUS_EDP		0x6f914</div><div class='del'>-#define _PSR2_SU_STATUS(tran, index)	_MMIO_TRANS2(tran, _PSR2_SU_STATUS_A + (index) * 4)</div><div class='add'>+#define _PSR2_SU_STATUS(tran, index)	_MMIO_TRANS2(dev_priv, tran, _PSR2_SU_STATUS_A + (index) * 4)</div><div class='ctx'> #define PSR2_SU_STATUS(tran, frame)	(_PSR2_SU_STATUS(tran, (frame) / 3))</div><div class='ctx'> #define PSR2_SU_STATUS_SHIFT(frame)	(((frame) % 3) * 10)</div><div class='ctx'> #define PSR2_SU_STATUS_MASK(frame)	(0x3ff &lt;&lt; PSR2_SU_STATUS_SHIFT(frame))</div><div class='hunk'>@@ -229,7 +229,7 @@</div><div class='ctx'> </div><div class='ctx'> #define _PSR2_MAN_TRK_CTL_A					0x60910</div><div class='ctx'> #define _PSR2_MAN_TRK_CTL_EDP					0x6f910</div><div class='del'>-#define PSR2_MAN_TRK_CTL(tran)					_MMIO_TRANS2(tran, _PSR2_MAN_TRK_CTL_A)</div><div class='add'>+#define PSR2_MAN_TRK_CTL(tran)					_MMIO_TRANS2(dev_priv, tran, _PSR2_MAN_TRK_CTL_A)</div><div class='ctx'> #define  PSR2_MAN_TRK_CTL_ENABLE				REG_BIT(31)</div><div class='ctx'> #define  PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK		REG_GENMASK(30, 21)</div><div class='ctx'> #define  PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val)		REG_FIELD_PREP(PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)</div><div class='hunk'>@@ -249,7 +249,7 @@</div><div class='ctx'> /* PSR2 Early transport */</div><div class='ctx'> #define _PIPE_SRCSZ_ERLY_TPT_A	0x70074</div><div class='ctx'> </div><div class='del'>-#define PIPE_SRCSZ_ERLY_TPT(trans)	_MMIO_TRANS2(trans, _PIPE_SRCSZ_ERLY_TPT_A)</div><div class='add'>+#define PIPE_SRCSZ_ERLY_TPT(trans)	_MMIO_TRANS2(dev_priv, trans, _PIPE_SRCSZ_ERLY_TPT_A)</div><div class='ctx'> </div><div class='ctx'> #define _SEL_FETCH_PLANE_BASE_1_A		0x70890</div><div class='ctx'> #define _SEL_FETCH_PLANE_BASE_2_A		0x708B0</div><div class='hunk'>@@ -297,7 +297,7 @@</div><div class='ctx'> 						  _SEL_FETCH_PLANE_BASE_1_A)</div><div class='ctx'> </div><div class='ctx'> #define _ALPM_CTL_A	0x60950</div><div class='del'>-#define ALPM_CTL(tran)	_MMIO_TRANS2(tran, _ALPM_CTL_A)</div><div class='add'>+#define ALPM_CTL(tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)</div><div class='ctx'> #define  ALPM_CTL_ALPM_ENABLE				REG_BIT(31)</div><div class='ctx'> #define  ALPM_CTL_ALPM_AUX_LESS_ENABLE			REG_BIT(30)</div><div class='ctx'> #define  ALPM_CTL_LOBF_ENABLE				REG_BIT(29)</div><div class='hunk'>@@ -321,7 +321,7 @@</div><div class='ctx'> #define  ALPM_CTL_AUX_LESS_WAKE_TIME(val)		REG_FIELD_PREP(ALPM_CTL_AUX_LESS_WAKE_TIME_MASK, val)</div><div class='ctx'> </div><div class='ctx'> #define _ALPM_CTL2_A	0x60954</div><div class='del'>-#define ALPM_CTL2(tran)	_MMIO_TRANS2(tran, _ALPM_CTL2_A)</div><div class='add'>+#define ALPM_CTL2(tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL2_A)</div><div class='ctx'> #define  ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY_MASK		REG_GENMASK(28, 24)</div><div class='ctx'> #define  ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY(val)		REG_FIELD_PREP(ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY_MASK, val)</div><div class='ctx'> #define  ALPM_CTL2_AUX_LESS_WAKE_TIME_EXTENSION_MASK		REG_GENMASK(19, 16)</div><div class='hunk'>@@ -335,7 +335,7 @@</div><div class='ctx'> #define  ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES(val)	REG_FIELD_PREP(ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES_MASK, val)</div><div class='ctx'> </div><div class='ctx'> #define _PORT_ALPM_CTL_A			0x16fa2c</div><div class='del'>-#define PORT_ALPM_CTL(tran)			_MMIO_TRANS2(tran, _PORT_ALPM_CTL_A)</div><div class='add'>+#define PORT_ALPM_CTL(tran)			_MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_CTL_A)</div><div class='ctx'> #define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)</div><div class='ctx'> #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)</div><div class='ctx'> #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)</div><div class='hunk'>@@ -345,12 +345,16 @@</div><div class='ctx'> #define  PORT_ALPM_CTL_SILENCE_PERIOD(val)	REG_FIELD_PREP(PORT_ALPM_CTL_SILENCE_PERIOD_MASK, val)</div><div class='ctx'> </div><div class='ctx'> #define _PORT_ALPM_LFPS_CTL_A					0x16fa30</div><div class='del'>-#define PORT_ALPM_LFPS_CTL(tran)				_MMIO_TRANS2(tran, _PORT_ALPM_LFPS_CTL_A)</div><div class='add'>+#define PORT_ALPM_LFPS_CTL(tran)				_MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_LFPS_CTL_A)</div><div class='ctx'> #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)</div><div class='ctx'> #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)</div><div class='del'>-#define  ALPM_CTL_EXTENDED_FAST_WAKE_MIN_LINES		5</div><div class='del'>-#define  ALPM_CTL_EXTENDED_FAST_WAKE_TIME(lines)	REG_FIELD_PREP(ALPM_CTL_EXTENDED_FAST_WAKE_TIME_MASK, (lines) - ALPM_CTL_EXTENDED_FAST_WAKE_MIN_LINES)</div><div class='del'>-#define  ALPM_CTL_AUX_LESS_WAKE_TIME_MASK		REG_GENMASK(5, 0)</div><div class='del'>-#define  ALPM_CTL_AUX_LESS_WAKE_TIME(val)		REG_FIELD_PREP(ALPM_CTL_AUX_LESS_WAKE_TIME_MASK, val)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(val)		REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK, (val) - PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK	REG_GENMASK(20, 16)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(val)	REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK, val)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION_MASK	REG_GENMASK(12, 8)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(val)	REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK, val)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK	REG_GENMASK(4, 0)</div><div class='add'>+#define  PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(val)	REG_FIELD_PREP(PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION_MASK, val)</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_PSR_REGS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c<br/>index a280448df771..14d5fefc9c5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_quirks.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_quirks.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_quirks.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_quirks.c</a></div><div class='hunk'>@@ -9,72 +9,72 @@</div><div class='ctx'> #include "intel_display_types.h"</div><div class='ctx'> #include "intel_quirks.h"</div><div class='ctx'> </div><div class='del'>-static void intel_set_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk)</div><div class='add'>+static void intel_set_quirk(struct intel_display *display, enum intel_quirk_id quirk)</div><div class='ctx'> {</div><div class='del'>-	i915-&gt;display.quirks.mask |= BIT(quirk);</div><div class='add'>+	display-&gt;quirks.mask |= BIT(quirk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Some machines (Lenovo U160) do not work with SSC on LVDS for some reason</div><div class='ctx'>  */</div><div class='del'>-static void quirk_ssc_force_disable(struct drm_i915_private *i915)</div><div class='add'>+static void quirk_ssc_force_disable(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	intel_set_quirk(i915, QUIRK_LVDS_SSC_DISABLE);</div><div class='del'>-	drm_info(&amp;i915-&gt;drm, "applying lvds SSC disable quirk\n");</div><div class='add'>+	intel_set_quirk(display, QUIRK_LVDS_SSC_DISABLE);</div><div class='add'>+	drm_info(display-&gt;drm, "applying lvds SSC disable quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * A machine (e.g. Acer Aspire 5734Z) may need to invert the panel backlight</div><div class='ctx'>  * brightness value</div><div class='ctx'>  */</div><div class='del'>-static void quirk_invert_brightness(struct drm_i915_private *i915)</div><div class='add'>+static void quirk_invert_brightness(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	intel_set_quirk(i915, QUIRK_INVERT_BRIGHTNESS);</div><div class='del'>-	drm_info(&amp;i915-&gt;drm, "applying inverted panel brightness quirk\n");</div><div class='add'>+	intel_set_quirk(display, QUIRK_INVERT_BRIGHTNESS);</div><div class='add'>+	drm_info(display-&gt;drm, "applying inverted panel brightness quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Some VBT's incorrectly indicate no backlight is present */</div><div class='del'>-static void quirk_backlight_present(struct drm_i915_private *i915)</div><div class='add'>+static void quirk_backlight_present(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	intel_set_quirk(i915, QUIRK_BACKLIGHT_PRESENT);</div><div class='del'>-	drm_info(&amp;i915-&gt;drm, "applying backlight present quirk\n");</div><div class='add'>+	intel_set_quirk(display, QUIRK_BACKLIGHT_PRESENT);</div><div class='add'>+	drm_info(display-&gt;drm, "applying backlight present quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Toshiba Satellite P50-C-18C requires T12 delay to be min 800ms</div><div class='ctx'>  * which is 300 ms greater than eDP spec T12 min.</div><div class='ctx'>  */</div><div class='del'>-static void quirk_increase_t12_delay(struct drm_i915_private *i915)</div><div class='add'>+static void quirk_increase_t12_delay(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	intel_set_quirk(i915, QUIRK_INCREASE_T12_DELAY);</div><div class='del'>-	drm_info(&amp;i915-&gt;drm, "Applying T12 delay quirk\n");</div><div class='add'>+	intel_set_quirk(display, QUIRK_INCREASE_T12_DELAY);</div><div class='add'>+	drm_info(display-&gt;drm, "Applying T12 delay quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GeminiLake NUC HDMI outputs require additional off time</div><div class='ctx'>  * this allows the onboard retimer to correctly sync to signal</div><div class='ctx'>  */</div><div class='del'>-static void quirk_increase_ddi_disabled_time(struct drm_i915_private *i915)</div><div class='add'>+static void quirk_increase_ddi_disabled_time(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	intel_set_quirk(i915, QUIRK_INCREASE_DDI_DISABLED_TIME);</div><div class='del'>-	drm_info(&amp;i915-&gt;drm, "Applying Increase DDI Disabled quirk\n");</div><div class='add'>+	intel_set_quirk(display, QUIRK_INCREASE_DDI_DISABLED_TIME);</div><div class='add'>+	drm_info(display-&gt;drm, "Applying Increase DDI Disabled quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void quirk_no_pps_backlight_power_hook(struct drm_i915_private *i915)</div><div class='add'>+static void quirk_no_pps_backlight_power_hook(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	intel_set_quirk(i915, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK);</div><div class='del'>-	drm_info(&amp;i915-&gt;drm, "Applying no pps backlight power quirk\n");</div><div class='add'>+	intel_set_quirk(display, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK);</div><div class='add'>+	drm_info(display-&gt;drm, "Applying no pps backlight power quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct intel_quirk {</div><div class='ctx'> 	int device;</div><div class='ctx'> 	int subsystem_vendor;</div><div class='ctx'> 	int subsystem_device;</div><div class='del'>-	void (*hook)(struct drm_i915_private *i915);</div><div class='add'>+	void (*hook)(struct intel_display *display);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* For systems that don't have a meaningful PCI subdevice/subvendor ID */</div><div class='ctx'> struct intel_dmi_quirk {</div><div class='del'>-	void (*hook)(struct drm_i915_private *i915);</div><div class='add'>+	void (*hook)(struct intel_display *display);</div><div class='ctx'> 	const struct dmi_system_id (*dmi_id_list)[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -203,9 +203,9 @@ static struct intel_quirk intel_quirks[] = {</div><div class='ctx'> 	{ 0x0f31, 0x103c, 0x220f, quirk_invert_brightness },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void intel_init_quirks(struct drm_i915_private *i915)</div><div class='add'>+void intel_init_quirks(struct intel_display *display)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *d = to_pci_dev(i915-&gt;drm.dev);</div><div class='add'>+	struct pci_dev *d = to_pci_dev(display-&gt;drm-&gt;dev);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(intel_quirks); i++) {</div><div class='hunk'>@@ -216,15 +216,15 @@ void intel_init_quirks(struct drm_i915_private *i915)</div><div class='ctx'> 		     q-&gt;subsystem_vendor == PCI_ANY_ID) &amp;&amp;</div><div class='ctx'> 		    (d-&gt;subsystem_device == q-&gt;subsystem_device ||</div><div class='ctx'> 		     q-&gt;subsystem_device == PCI_ANY_ID))</div><div class='del'>-			q-&gt;hook(i915);</div><div class='add'>+			q-&gt;hook(display);</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(intel_dmi_quirks); i++) {</div><div class='ctx'> 		if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)</div><div class='del'>-			intel_dmi_quirks[i].hook(i915);</div><div class='add'>+			intel_dmi_quirks[i].hook(display);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool intel_has_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk)</div><div class='add'>+bool intel_has_quirk(struct intel_display *display, enum intel_quirk_id quirk)</div><div class='ctx'> {</div><div class='del'>-	return i915-&gt;display.quirks.mask &amp; BIT(quirk);</div><div class='add'>+	return display-&gt;quirks.mask &amp; BIT(quirk);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h b/drivers/gpu/drm/i915/display/intel_quirks.h<br/>index 10a4d163149f..151c8f4ae576 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_quirks.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_quirks.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_quirks.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_quirks.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-struct drm_i915_private;</div><div class='add'>+struct intel_display;</div><div class='ctx'> </div><div class='ctx'> enum intel_quirk_id {</div><div class='ctx'> 	QUIRK_BACKLIGHT_PRESENT,</div><div class='hunk'>@@ -19,7 +19,7 @@ enum intel_quirk_id {</div><div class='ctx'> 	QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void intel_init_quirks(struct drm_i915_private *i915);</div><div class='del'>-bool intel_has_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk);</div><div class='add'>+void intel_init_quirks(struct intel_display *display);</div><div class='add'>+bool intel_has_quirk(struct intel_display *display, enum intel_quirk_id quirk);</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_QUIRKS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c<br/>index 0cd9c183f621..d0d712405129 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_sdvo.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_sdvo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_sdvo.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_sdvo.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ to_intel_sdvo_connector(struct drm_connector *connector)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define to_intel_sdvo_connector_state(conn_state) \</div><div class='del'>-	container_of((conn_state), struct intel_sdvo_connector_state, base.base)</div><div class='add'>+	container_of_const((conn_state), struct intel_sdvo_connector_state, base.base)</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='ctx'> intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);</div><div class='hunk'>@@ -1944,7 +1944,7 @@ intel_sdvo_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	struct intel_sdvo_connector *intel_sdvo_connector =</div><div class='ctx'> 		to_intel_sdvo_connector(connector);</div><div class='ctx'> 	bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector-&gt;state);</div><div class='del'>-	int max_dotclk = i915-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = i915-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> 	int clock = mode-&gt;clock;</div><div class='ctx'> </div><div class='hunk'>@@ -1952,9 +1952,6 @@ intel_sdvo_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='del'>-		return MODE_NO_DBLESCAN;</div><div class='del'>-</div><div class='ctx'> 	if (clock &gt; max_dotclk)</div><div class='ctx'> 		return MODE_CLOCK_HIGH;</div><div class='ctx'> </div><div class='hunk'>@@ -2378,7 +2375,7 @@ intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,</div><div class='ctx'> 					 u64 *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);</div><div class='del'>-	const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);</div><div class='add'>+	const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);</div><div class='ctx'> </div><div class='ctx'> 	if (property == intel_sdvo_connector-&gt;tv_format) {</div><div class='ctx'> 		int i;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c<br/>index bc61e736f9b3..e6df1f92def5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_snps_phy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_snps_phy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_snps_phy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_snps_phy.c</a></div><div class='hunk'>@@ -44,12 +44,14 @@ void intel_snps_phy_wait_for_calibration(struct drm_i915_private *i915)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void intel_snps_phy_update_psr_power_state(struct drm_i915_private *i915,</div><div class='del'>-					   enum phy phy, bool enable)</div><div class='add'>+void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,</div><div class='add'>+					   bool enable)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (!intel_phy_is_snps(i915, phy))</div><div class='add'>+	if (!intel_encoder_is_snps(encoder))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	val = REG_FIELD_PREP(SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR,</div><div class='hunk'>@@ -63,7 +65,7 @@ void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	const struct intel_ddi_buf_trans *trans;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	int n_entries, ln;</div><div class='ctx'> </div><div class='ctx'> 	trans = encoder-&gt;get_buf_trans(encoder, crtc_state, &amp;n_entries);</div><div class='hunk'>@@ -1809,7 +1811,7 @@ int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; tables[i]; i++) {</div><div class='ctx'> 		if (crtc_state-&gt;port_clock == tables[i]-&gt;clock) {</div><div class='del'>-			crtc_state-&gt;mpllb_state = *tables[i];</div><div class='add'>+			crtc_state-&gt;dpll_hw_state.mpllb = *tables[i];</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1821,8 +1823,8 @@ void intel_mpllb_enable(struct intel_encoder *encoder,</div><div class='ctx'> 			const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	const struct intel_mpllb_state *pll_state = &amp;crtc_state-&gt;mpllb_state;</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='add'>+	const struct intel_mpllb_state *pll_state = &amp;crtc_state-&gt;dpll_hw_state.mpllb;</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	i915_reg_t enable_reg = (phy &lt;= PHY_D ?</div><div class='ctx'> 				 DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0));</div><div class='ctx'> </div><div class='hunk'>@@ -1879,7 +1881,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,</div><div class='ctx'> void intel_mpllb_disable(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> 	i915_reg_t enable_reg = (phy &lt;= PHY_D ?</div><div class='ctx'> 				 DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0));</div><div class='ctx'> </div><div class='hunk'>@@ -1951,7 +1953,7 @@ void intel_mpllb_readout_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 				  struct intel_mpllb_state *pll_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(dev_priv, encoder-&gt;port);</div><div class='add'>+	enum phy phy = intel_encoder_to_phy(encoder);</div><div class='ctx'> </div><div class='ctx'> 	pll_state-&gt;mpllb_cp = intel_de_read(dev_priv, SNPS_PHY_MPLLB_CP(phy));</div><div class='ctx'> 	pll_state-&gt;mpllb_div = intel_de_read(dev_priv, SNPS_PHY_MPLLB_DIV(phy));</div><div class='hunk'>@@ -1999,7 +2001,7 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,</div><div class='ctx'> 	const struct intel_crtc_state *new_crtc_state =</div><div class='ctx'> 		intel_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	struct intel_mpllb_state mpllb_hw_state = {};</div><div class='del'>-	const struct intel_mpllb_state *mpllb_sw_state = &amp;new_crtc_state-&gt;mpllb_state;</div><div class='add'>+	const struct intel_mpllb_state *mpllb_sw_state = &amp;new_crtc_state-&gt;dpll_hw_state.mpllb;</div><div class='ctx'> 	struct intel_encoder *encoder;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_DG2(i915))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h<br/>index 515abf7c5902..bc08b92a7cd9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_snps_phy.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_snps_phy.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_snps_phy.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_snps_phy.h</a></div><div class='hunk'>@@ -17,8 +17,8 @@ struct intel_mpllb_state;</div><div class='ctx'> enum phy;</div><div class='ctx'> </div><div class='ctx'> void intel_snps_phy_wait_for_calibration(struct drm_i915_private *dev_priv);</div><div class='del'>-void intel_snps_phy_update_psr_power_state(struct drm_i915_private *dev_priv,</div><div class='del'>-					   enum phy phy, bool enable);</div><div class='add'>+void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,</div><div class='add'>+					   bool enable);</div><div class='ctx'> </div><div class='ctx'> int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 			   struct intel_encoder *encoder);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c<br/>index d7b440c8caef..36a253a19c74 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_sprite.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_sprite.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_sprite.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_sprite.c</a></div><div class='hunk'>@@ -47,6 +47,7 @@</div><div class='ctx'> #include "intel_fb.h"</div><div class='ctx'> #include "intel_frontbuffer.h"</div><div class='ctx'> #include "intel_sprite.h"</div><div class='add'>+#include "intel_sprite_regs.h"</div><div class='ctx'> </div><div class='ctx'> static char sprite_name(struct drm_i915_private *i915, enum pipe pipe, int sprite)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_sprite_regs.h b/drivers/gpu/drm/i915/display/intel_sprite_regs.h<br/>new file mode 100644<br/>index 000000000000..bb67705652b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_sprite_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_sprite_regs.h</a></div><div class='hunk'>@@ -0,0 +1,348 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/* Copyright © 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef __INTEL_SPRITE_REGS__</div><div class='add'>+#define __INTEL_SPRITE_REGS__</div><div class='add'>+</div><div class='add'>+#include "intel_display_reg_defs.h"</div><div class='add'>+</div><div class='add'>+#define _DVSACNTR		0x72180</div><div class='add'>+#define   DVS_ENABLE			REG_BIT(31)</div><div class='add'>+#define   DVS_PIPE_GAMMA_ENABLE		REG_BIT(30)</div><div class='add'>+#define   DVS_YUV_RANGE_CORRECTION_DISABLE	REG_BIT(27)</div><div class='add'>+#define   DVS_FORMAT_MASK		REG_GENMASK(26, 25)</div><div class='add'>+#define   DVS_FORMAT_YUV422		REG_FIELD_PREP(DVS_FORMAT_MASK, 0)</div><div class='add'>+#define   DVS_FORMAT_RGBX101010		REG_FIELD_PREP(DVS_FORMAT_MASK, 1)</div><div class='add'>+#define   DVS_FORMAT_RGBX888		REG_FIELD_PREP(DVS_FORMAT_MASK, 2)</div><div class='add'>+#define   DVS_FORMAT_RGBX161616		REG_FIELD_PREP(DVS_FORMAT_MASK, 3)</div><div class='add'>+#define   DVS_PIPE_CSC_ENABLE		REG_BIT(24)</div><div class='add'>+#define   DVS_SOURCE_KEY		REG_BIT(22)</div><div class='add'>+#define   DVS_RGB_ORDER_XBGR		REG_BIT(20)</div><div class='add'>+#define   DVS_YUV_FORMAT_BT709		REG_BIT(18)</div><div class='add'>+#define   DVS_YUV_ORDER_MASK		REG_GENMASK(17, 16)</div><div class='add'>+#define   DVS_YUV_ORDER_YUYV		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 0)</div><div class='add'>+#define   DVS_YUV_ORDER_UYVY		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 1)</div><div class='add'>+#define   DVS_YUV_ORDER_YVYU		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 2)</div><div class='add'>+#define   DVS_YUV_ORDER_VYUY		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 3)</div><div class='add'>+#define   DVS_ROTATE_180		REG_BIT(15)</div><div class='add'>+#define   DVS_TRICKLE_FEED_DISABLE	REG_BIT(14)</div><div class='add'>+#define   DVS_TILED			REG_BIT(10)</div><div class='add'>+#define   DVS_DEST_KEY			REG_BIT(2)</div><div class='add'>+#define _DVSALINOFF		0x72184</div><div class='add'>+#define _DVSASTRIDE		0x72188</div><div class='add'>+#define _DVSAPOS		0x7218c</div><div class='add'>+#define   DVS_POS_Y_MASK		REG_GENMASK(31, 16)</div><div class='add'>+#define   DVS_POS_Y(y)			REG_FIELD_PREP(DVS_POS_Y_MASK, (y))</div><div class='add'>+#define   DVS_POS_X_MASK		REG_GENMASK(15, 0)</div><div class='add'>+#define   DVS_POS_X(x)			REG_FIELD_PREP(DVS_POS_X_MASK, (x))</div><div class='add'>+#define _DVSASIZE		0x72190</div><div class='add'>+#define   DVS_HEIGHT_MASK		REG_GENMASK(31, 16)</div><div class='add'>+#define   DVS_HEIGHT(h)			REG_FIELD_PREP(DVS_HEIGHT_MASK, (h))</div><div class='add'>+#define   DVS_WIDTH_MASK		REG_GENMASK(15, 0)</div><div class='add'>+#define   DVS_WIDTH(w)			REG_FIELD_PREP(DVS_WIDTH_MASK, (w))</div><div class='add'>+#define _DVSAKEYVAL		0x72194</div><div class='add'>+#define _DVSAKEYMSK		0x72198</div><div class='add'>+#define _DVSASURF		0x7219c</div><div class='add'>+#define   DVS_ADDR_MASK			REG_GENMASK(31, 12)</div><div class='add'>+#define _DVSAKEYMAXVAL		0x721a0</div><div class='add'>+#define _DVSATILEOFF		0x721a4</div><div class='add'>+#define   DVS_OFFSET_Y_MASK		REG_GENMASK(31, 16)</div><div class='add'>+#define   DVS_OFFSET_Y(y)		REG_FIELD_PREP(DVS_OFFSET_Y_MASK, (y))</div><div class='add'>+#define   DVS_OFFSET_X_MASK		REG_GENMASK(15, 0)</div><div class='add'>+#define   DVS_OFFSET_X(x)		REG_FIELD_PREP(DVS_OFFSET_X_MASK, (x))</div><div class='add'>+#define _DVSASURFLIVE		0x721ac</div><div class='add'>+#define _DVSAGAMC_G4X		0x721e0 /* g4x */</div><div class='add'>+#define _DVSASCALE		0x72204</div><div class='add'>+#define   DVS_SCALE_ENABLE		REG_BIT(31)</div><div class='add'>+#define   DVS_FILTER_MASK		REG_GENMASK(30, 29)</div><div class='add'>+#define   DVS_FILTER_MEDIUM		REG_FIELD_PREP(DVS_FILTER_MASK, 0)</div><div class='add'>+#define   DVS_FILTER_ENHANCING		REG_FIELD_PREP(DVS_FILTER_MASK, 1)</div><div class='add'>+#define   DVS_FILTER_SOFTENING		REG_FIELD_PREP(DVS_FILTER_MASK, 2)</div><div class='add'>+#define   DVS_VERTICAL_OFFSET_HALF	REG_BIT(28) /* must be enabled below */</div><div class='add'>+#define   DVS_VERTICAL_OFFSET_ENABLE	REG_BIT(27)</div><div class='add'>+#define   DVS_SRC_WIDTH_MASK		REG_GENMASK(26, 16)</div><div class='add'>+#define   DVS_SRC_WIDTH(w)		REG_FIELD_PREP(DVS_SRC_WIDTH_MASK, (w))</div><div class='add'>+#define   DVS_SRC_HEIGHT_MASK		REG_GENMASK(10, 0)</div><div class='add'>+#define   DVS_SRC_HEIGHT(h)		REG_FIELD_PREP(DVS_SRC_HEIGHT_MASK, (h))</div><div class='add'>+#define _DVSAGAMC_ILK		0x72300 /* ilk/snb */</div><div class='add'>+#define _DVSAGAMCMAX_ILK	0x72340 /* ilk/snb */</div><div class='add'>+</div><div class='add'>+#define _DVSBCNTR		0x73180</div><div class='add'>+#define _DVSBLINOFF		0x73184</div><div class='add'>+#define _DVSBSTRIDE		0x73188</div><div class='add'>+#define _DVSBPOS		0x7318c</div><div class='add'>+#define _DVSBSIZE		0x73190</div><div class='add'>+#define _DVSBKEYVAL		0x73194</div><div class='add'>+#define _DVSBKEYMSK		0x73198</div><div class='add'>+#define _DVSBSURF		0x7319c</div><div class='add'>+#define _DVSBKEYMAXVAL		0x731a0</div><div class='add'>+#define _DVSBTILEOFF		0x731a4</div><div class='add'>+#define _DVSBSURFLIVE		0x731ac</div><div class='add'>+#define _DVSBGAMC_G4X		0x731e0 /* g4x */</div><div class='add'>+#define _DVSBSCALE		0x73204</div><div class='add'>+#define _DVSBGAMC_ILK		0x73300 /* ilk/snb */</div><div class='add'>+#define _DVSBGAMCMAX_ILK	0x73340 /* ilk/snb */</div><div class='add'>+</div><div class='add'>+#define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR)</div><div class='add'>+#define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF)</div><div class='add'>+#define DVSSTRIDE(pipe) _MMIO_PIPE(pipe, _DVSASTRIDE, _DVSBSTRIDE)</div><div class='add'>+#define DVSPOS(pipe) _MMIO_PIPE(pipe, _DVSAPOS, _DVSBPOS)</div><div class='add'>+#define DVSSURF(pipe) _MMIO_PIPE(pipe, _DVSASURF, _DVSBSURF)</div><div class='add'>+#define DVSKEYMAX(pipe) _MMIO_PIPE(pipe, _DVSAKEYMAXVAL, _DVSBKEYMAXVAL)</div><div class='add'>+#define DVSSIZE(pipe) _MMIO_PIPE(pipe, _DVSASIZE, _DVSBSIZE)</div><div class='add'>+#define DVSSCALE(pipe) _MMIO_PIPE(pipe, _DVSASCALE, _DVSBSCALE)</div><div class='add'>+#define DVSTILEOFF(pipe) _MMIO_PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)</div><div class='add'>+#define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)</div><div class='add'>+#define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)</div><div class='add'>+#define DVSSURFLIVE(pipe) _MMIO_PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)</div><div class='add'>+#define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */</div><div class='add'>+#define DVSGAMC_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_ILK, _DVSBGAMC_ILK) + (i) * 4) /* 16 x u0.10 */</div><div class='add'>+#define DVSGAMCMAX_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMCMAX_ILK, _DVSBGAMCMAX_ILK) + (i) * 4) /* 3 x u1.10 */</div><div class='add'>+</div><div class='add'>+#define _SPRA_CTL		0x70280</div><div class='add'>+#define   SPRITE_ENABLE				REG_BIT(31)</div><div class='add'>+#define   SPRITE_PIPE_GAMMA_ENABLE		REG_BIT(30)</div><div class='add'>+#define   SPRITE_YUV_RANGE_CORRECTION_DISABLE	REG_BIT(28)</div><div class='add'>+#define   SPRITE_FORMAT_MASK			REG_GENMASK(27, 25)</div><div class='add'>+#define   SPRITE_FORMAT_YUV422			REG_FIELD_PREP(SPRITE_FORMAT_MASK, 0)</div><div class='add'>+#define   SPRITE_FORMAT_RGBX101010		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 1)</div><div class='add'>+#define   SPRITE_FORMAT_RGBX888			REG_FIELD_PREP(SPRITE_FORMAT_MASK, 2)</div><div class='add'>+#define   SPRITE_FORMAT_RGBX161616		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 3)</div><div class='add'>+#define   SPRITE_FORMAT_YUV444			REG_FIELD_PREP(SPRITE_FORMAT_MASK, 4)</div><div class='add'>+#define   SPRITE_FORMAT_XR_BGR101010		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 5) /* Extended range */</div><div class='add'>+#define   SPRITE_PIPE_CSC_ENABLE		REG_BIT(24)</div><div class='add'>+#define   SPRITE_SOURCE_KEY			REG_BIT(22)</div><div class='add'>+#define   SPRITE_RGB_ORDER_RGBX			REG_BIT(20) /* only for 888 and 161616 */</div><div class='add'>+#define   SPRITE_YUV_TO_RGB_CSC_DISABLE		REG_BIT(19)</div><div class='add'>+#define   SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709	REG_BIT(18) /* 0 is BT601 */</div><div class='add'>+#define   SPRITE_YUV_ORDER_MASK			REG_GENMASK(17, 16)</div><div class='add'>+#define   SPRITE_YUV_ORDER_YUYV			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 0)</div><div class='add'>+#define   SPRITE_YUV_ORDER_UYVY			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 1)</div><div class='add'>+#define   SPRITE_YUV_ORDER_YVYU			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 2)</div><div class='add'>+#define   SPRITE_YUV_ORDER_VYUY			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 3)</div><div class='add'>+#define   SPRITE_ROTATE_180			REG_BIT(15)</div><div class='add'>+#define   SPRITE_TRICKLE_FEED_DISABLE		REG_BIT(14)</div><div class='add'>+#define   SPRITE_PLANE_GAMMA_DISABLE		REG_BIT(13)</div><div class='add'>+#define   SPRITE_TILED				REG_BIT(10)</div><div class='add'>+#define   SPRITE_DEST_KEY			REG_BIT(2)</div><div class='add'>+#define _SPRA_LINOFF		0x70284</div><div class='add'>+#define _SPRA_STRIDE		0x70288</div><div class='add'>+#define _SPRA_POS		0x7028c</div><div class='add'>+#define   SPRITE_POS_Y_MASK	REG_GENMASK(31, 16)</div><div class='add'>+#define   SPRITE_POS_Y(y)	REG_FIELD_PREP(SPRITE_POS_Y_MASK, (y))</div><div class='add'>+#define   SPRITE_POS_X_MASK	REG_GENMASK(15, 0)</div><div class='add'>+#define   SPRITE_POS_X(x)	REG_FIELD_PREP(SPRITE_POS_X_MASK, (x))</div><div class='add'>+#define _SPRA_SIZE		0x70290</div><div class='add'>+#define   SPRITE_HEIGHT_MASK	REG_GENMASK(31, 16)</div><div class='add'>+#define   SPRITE_HEIGHT(h)	REG_FIELD_PREP(SPRITE_HEIGHT_MASK, (h))</div><div class='add'>+#define   SPRITE_WIDTH_MASK	REG_GENMASK(15, 0)</div><div class='add'>+#define   SPRITE_WIDTH(w)	REG_FIELD_PREP(SPRITE_WIDTH_MASK, (w))</div><div class='add'>+#define _SPRA_KEYVAL		0x70294</div><div class='add'>+#define _SPRA_KEYMSK		0x70298</div><div class='add'>+#define _SPRA_SURF		0x7029c</div><div class='add'>+#define   SPRITE_ADDR_MASK	REG_GENMASK(31, 12)</div><div class='add'>+#define _SPRA_KEYMAX		0x702a0</div><div class='add'>+#define _SPRA_TILEOFF		0x702a4</div><div class='add'>+#define   SPRITE_OFFSET_Y_MASK	REG_GENMASK(31, 16)</div><div class='add'>+#define   SPRITE_OFFSET_Y(y)	REG_FIELD_PREP(SPRITE_OFFSET_Y_MASK, (y))</div><div class='add'>+#define   SPRITE_OFFSET_X_MASK	REG_GENMASK(15, 0)</div><div class='add'>+#define   SPRITE_OFFSET_X(x)	REG_FIELD_PREP(SPRITE_OFFSET_X_MASK, (x))</div><div class='add'>+#define _SPRA_OFFSET		0x702a4</div><div class='add'>+#define _SPRA_SURFLIVE		0x702ac</div><div class='add'>+#define _SPRA_SCALE		0x70304</div><div class='add'>+#define   SPRITE_SCALE_ENABLE			REG_BIT(31)</div><div class='add'>+#define   SPRITE_FILTER_MASK			REG_GENMASK(30, 29)</div><div class='add'>+#define   SPRITE_FILTER_MEDIUM			REG_FIELD_PREP(SPRITE_FILTER_MASK, 0)</div><div class='add'>+#define   SPRITE_FILTER_ENHANCING		REG_FIELD_PREP(SPRITE_FILTER_MASK, 1)</div><div class='add'>+#define   SPRITE_FILTER_SOFTENING		REG_FIELD_PREP(SPRITE_FILTER_MASK, 2)</div><div class='add'>+#define   SPRITE_VERTICAL_OFFSET_HALF		REG_BIT(28) /* must be enabled below */</div><div class='add'>+#define   SPRITE_VERTICAL_OFFSET_ENABLE		REG_BIT(27)</div><div class='add'>+#define   SPRITE_SRC_WIDTH_MASK			REG_GENMASK(26, 16)</div><div class='add'>+#define   SPRITE_SRC_WIDTH(w)			REG_FIELD_PREP(SPRITE_SRC_WIDTH_MASK, (w))</div><div class='add'>+#define   SPRITE_SRC_HEIGHT_MASK		REG_GENMASK(10, 0)</div><div class='add'>+#define   SPRITE_SRC_HEIGHT(h)			REG_FIELD_PREP(SPRITE_SRC_HEIGHT_MASK, (h))</div><div class='add'>+#define _SPRA_GAMC		0x70400</div><div class='add'>+#define _SPRA_GAMC16		0x70440</div><div class='add'>+#define _SPRA_GAMC17		0x7044c</div><div class='add'>+</div><div class='add'>+#define _SPRB_CTL		0x71280</div><div class='add'>+#define _SPRB_LINOFF		0x71284</div><div class='add'>+#define _SPRB_STRIDE		0x71288</div><div class='add'>+#define _SPRB_POS		0x7128c</div><div class='add'>+#define _SPRB_SIZE		0x71290</div><div class='add'>+#define _SPRB_KEYVAL		0x71294</div><div class='add'>+#define _SPRB_KEYMSK		0x71298</div><div class='add'>+#define _SPRB_SURF		0x7129c</div><div class='add'>+#define _SPRB_KEYMAX		0x712a0</div><div class='add'>+#define _SPRB_TILEOFF		0x712a4</div><div class='add'>+#define _SPRB_OFFSET		0x712a4</div><div class='add'>+#define _SPRB_SURFLIVE		0x712ac</div><div class='add'>+#define _SPRB_SCALE		0x71304</div><div class='add'>+#define _SPRB_GAMC		0x71400</div><div class='add'>+#define _SPRB_GAMC16		0x71440</div><div class='add'>+#define _SPRB_GAMC17		0x7144c</div><div class='add'>+</div><div class='add'>+#define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL)</div><div class='add'>+#define SPRLINOFF(pipe) _MMIO_PIPE(pipe, _SPRA_LINOFF, _SPRB_LINOFF)</div><div class='add'>+#define SPRSTRIDE(pipe) _MMIO_PIPE(pipe, _SPRA_STRIDE, _SPRB_STRIDE)</div><div class='add'>+#define SPRPOS(pipe) _MMIO_PIPE(pipe, _SPRA_POS, _SPRB_POS)</div><div class='add'>+#define SPRSIZE(pipe) _MMIO_PIPE(pipe, _SPRA_SIZE, _SPRB_SIZE)</div><div class='add'>+#define SPRKEYVAL(pipe) _MMIO_PIPE(pipe, _SPRA_KEYVAL, _SPRB_KEYVAL)</div><div class='add'>+#define SPRKEYMSK(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMSK, _SPRB_KEYMSK)</div><div class='add'>+#define SPRSURF(pipe) _MMIO_PIPE(pipe, _SPRA_SURF, _SPRB_SURF)</div><div class='add'>+#define SPRKEYMAX(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMAX, _SPRB_KEYMAX)</div><div class='add'>+#define SPRTILEOFF(pipe) _MMIO_PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)</div><div class='add'>+#define SPROFFSET(pipe) _MMIO_PIPE(pipe, _SPRA_OFFSET, _SPRB_OFFSET)</div><div class='add'>+#define SPRSCALE(pipe) _MMIO_PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)</div><div class='add'>+#define SPRGAMC(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC) + (i) * 4) /* 16 x u0.10 */</div><div class='add'>+#define SPRGAMC16(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC16, _SPRB_GAMC16) + (i) * 4) /* 3 x u1.10 */</div><div class='add'>+#define SPRGAMC17(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC17, _SPRB_GAMC17) + (i) * 4) /* 3 x u2.10 */</div><div class='add'>+#define SPRSURFLIVE(pipe) _MMIO_PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)</div><div class='add'>+</div><div class='add'>+#define _SPACNTR		(VLV_DISPLAY_BASE + 0x72180)</div><div class='add'>+#define   SP_ENABLE			REG_BIT(31)</div><div class='add'>+#define   SP_PIPE_GAMMA_ENABLE		REG_BIT(30)</div><div class='add'>+#define   SP_FORMAT_MASK		REG_GENMASK(29, 26)</div><div class='add'>+#define   SP_FORMAT_YUV422		REG_FIELD_PREP(SP_FORMAT_MASK, 0)</div><div class='add'>+#define   SP_FORMAT_8BPP		REG_FIELD_PREP(SP_FORMAT_MASK, 2)</div><div class='add'>+#define   SP_FORMAT_BGR565		REG_FIELD_PREP(SP_FORMAT_MASK, 5)</div><div class='add'>+#define   SP_FORMAT_BGRX8888		REG_FIELD_PREP(SP_FORMAT_MASK, 6)</div><div class='add'>+#define   SP_FORMAT_BGRA8888		REG_FIELD_PREP(SP_FORMAT_MASK, 7)</div><div class='add'>+#define   SP_FORMAT_RGBX1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 8)</div><div class='add'>+#define   SP_FORMAT_RGBA1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 9)</div><div class='add'>+#define   SP_FORMAT_BGRX1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 10) /* CHV pipe B */</div><div class='add'>+#define   SP_FORMAT_BGRA1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 11) /* CHV pipe B */</div><div class='add'>+#define   SP_FORMAT_RGBX8888		REG_FIELD_PREP(SP_FORMAT_MASK, 14)</div><div class='add'>+#define   SP_FORMAT_RGBA8888		REG_FIELD_PREP(SP_FORMAT_MASK, 15)</div><div class='add'>+#define   SP_ALPHA_PREMULTIPLY		REG_BIT(23) /* CHV pipe B */</div><div class='add'>+#define   SP_SOURCE_KEY			REG_BIT(22)</div><div class='add'>+#define   SP_YUV_FORMAT_BT709		REG_BIT(18)</div><div class='add'>+#define   SP_YUV_ORDER_MASK		REG_GENMASK(17, 16)</div><div class='add'>+#define   SP_YUV_ORDER_YUYV		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 0)</div><div class='add'>+#define   SP_YUV_ORDER_UYVY		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 1)</div><div class='add'>+#define   SP_YUV_ORDER_YVYU		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 2)</div><div class='add'>+#define   SP_YUV_ORDER_VYUY		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 3)</div><div class='add'>+#define   SP_ROTATE_180			REG_BIT(15)</div><div class='add'>+#define   SP_TILED			REG_BIT(10)</div><div class='add'>+#define   SP_MIRROR			REG_BIT(8) /* CHV pipe B */</div><div class='add'>+#define _SPALINOFF		(VLV_DISPLAY_BASE + 0x72184)</div><div class='add'>+#define _SPASTRIDE		(VLV_DISPLAY_BASE + 0x72188)</div><div class='add'>+#define _SPAPOS			(VLV_DISPLAY_BASE + 0x7218c)</div><div class='add'>+#define   SP_POS_Y_MASK			REG_GENMASK(31, 16)</div><div class='add'>+#define   SP_POS_Y(y)			REG_FIELD_PREP(SP_POS_Y_MASK, (y))</div><div class='add'>+#define   SP_POS_X_MASK			REG_GENMASK(15, 0)</div><div class='add'>+#define   SP_POS_X(x)			REG_FIELD_PREP(SP_POS_X_MASK, (x))</div><div class='add'>+#define _SPASIZE		(VLV_DISPLAY_BASE + 0x72190)</div><div class='add'>+#define   SP_HEIGHT_MASK		REG_GENMASK(31, 16)</div><div class='add'>+#define   SP_HEIGHT(h)			REG_FIELD_PREP(SP_HEIGHT_MASK, (h))</div><div class='add'>+#define   SP_WIDTH_MASK			REG_GENMASK(15, 0)</div><div class='add'>+#define   SP_WIDTH(w)			REG_FIELD_PREP(SP_WIDTH_MASK, (w))</div><div class='add'>+#define _SPAKEYMINVAL		(VLV_DISPLAY_BASE + 0x72194)</div><div class='add'>+#define _SPAKEYMSK		(VLV_DISPLAY_BASE + 0x72198)</div><div class='add'>+#define _SPASURF		(VLV_DISPLAY_BASE + 0x7219c)</div><div class='add'>+#define   SP_ADDR_MASK			REG_GENMASK(31, 12)</div><div class='add'>+#define _SPAKEYMAXVAL		(VLV_DISPLAY_BASE + 0x721a0)</div><div class='add'>+#define _SPATILEOFF		(VLV_DISPLAY_BASE + 0x721a4)</div><div class='add'>+#define   SP_OFFSET_Y_MASK		REG_GENMASK(31, 16)</div><div class='add'>+#define   SP_OFFSET_Y(y)		REG_FIELD_PREP(SP_OFFSET_Y_MASK, (y))</div><div class='add'>+#define   SP_OFFSET_X_MASK		REG_GENMASK(15, 0)</div><div class='add'>+#define   SP_OFFSET_X(x)		REG_FIELD_PREP(SP_OFFSET_X_MASK, (x))</div><div class='add'>+#define _SPACONSTALPHA		(VLV_DISPLAY_BASE + 0x721a8)</div><div class='add'>+#define   SP_CONST_ALPHA_ENABLE		REG_BIT(31)</div><div class='add'>+#define   SP_CONST_ALPHA_MASK		REG_GENMASK(7, 0)</div><div class='add'>+#define   SP_CONST_ALPHA(alpha)		REG_FIELD_PREP(SP_CONST_ALPHA_MASK, (alpha))</div><div class='add'>+#define _SPASURFLIVE		(VLV_DISPLAY_BASE + 0x721ac)</div><div class='add'>+#define _SPACLRC0		(VLV_DISPLAY_BASE + 0x721d0)</div><div class='add'>+#define   SP_CONTRAST_MASK		REG_GENMASK(26, 18)</div><div class='add'>+#define   SP_CONTRAST(x)		REG_FIELD_PREP(SP_CONTRAST_MASK, (x)) /* u3.6 */</div><div class='add'>+#define   SP_BRIGHTNESS_MASK		REG_GENMASK(7, 0)</div><div class='add'>+#define   SP_BRIGHTNESS(x)		REG_FIELD_PREP(SP_BRIGHTNESS_MASK, (x)) /* s8 */</div><div class='add'>+#define _SPACLRC1		(VLV_DISPLAY_BASE + 0x721d4)</div><div class='add'>+#define   SP_SH_SIN_MASK		REG_GENMASK(26, 16)</div><div class='add'>+#define   SP_SH_SIN(x)			REG_FIELD_PREP(SP_SH_SIN_MASK, (x)) /* s4.7 */</div><div class='add'>+#define   SP_SH_COS_MASK		REG_GENMASK(9, 0)</div><div class='add'>+#define   SP_SH_COS(x)			REG_FIELD_PREP(SP_SH_COS_MASK, (x)) /* u3.7 */</div><div class='add'>+#define _SPAGAMC		(VLV_DISPLAY_BASE + 0x721e0)</div><div class='add'>+</div><div class='add'>+#define _SPBCNTR		(VLV_DISPLAY_BASE + 0x72280)</div><div class='add'>+#define _SPBLINOFF		(VLV_DISPLAY_BASE + 0x72284)</div><div class='add'>+#define _SPBSTRIDE		(VLV_DISPLAY_BASE + 0x72288)</div><div class='add'>+#define _SPBPOS			(VLV_DISPLAY_BASE + 0x7228c)</div><div class='add'>+#define _SPBSIZE		(VLV_DISPLAY_BASE + 0x72290)</div><div class='add'>+#define _SPBKEYMINVAL		(VLV_DISPLAY_BASE + 0x72294)</div><div class='add'>+#define _SPBKEYMSK		(VLV_DISPLAY_BASE + 0x72298)</div><div class='add'>+#define _SPBSURF		(VLV_DISPLAY_BASE + 0x7229c)</div><div class='add'>+#define _SPBKEYMAXVAL		(VLV_DISPLAY_BASE + 0x722a0)</div><div class='add'>+#define _SPBTILEOFF		(VLV_DISPLAY_BASE + 0x722a4)</div><div class='add'>+#define _SPBCONSTALPHA		(VLV_DISPLAY_BASE + 0x722a8)</div><div class='add'>+#define _SPBSURFLIVE		(VLV_DISPLAY_BASE + 0x722ac)</div><div class='add'>+#define _SPBCLRC0		(VLV_DISPLAY_BASE + 0x722d0)</div><div class='add'>+#define _SPBCLRC1		(VLV_DISPLAY_BASE + 0x722d4)</div><div class='add'>+#define _SPBGAMC		(VLV_DISPLAY_BASE + 0x722e0)</div><div class='add'>+</div><div class='add'>+#define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \</div><div class='add'>+	_PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))</div><div class='add'>+#define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \</div><div class='add'>+	_MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))</div><div class='add'>+</div><div class='add'>+#define SPCNTR(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)</div><div class='add'>+#define SPLINOFF(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)</div><div class='add'>+#define SPSTRIDE(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE)</div><div class='add'>+#define SPPOS(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS)</div><div class='add'>+#define SPSIZE(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE)</div><div class='add'>+#define SPKEYMINVAL(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL)</div><div class='add'>+#define SPKEYMSK(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMSK, _SPBKEYMSK)</div><div class='add'>+#define SPSURF(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPASURF, _SPBSURF)</div><div class='add'>+#define SPKEYMAXVAL(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMAXVAL, _SPBKEYMAXVAL)</div><div class='add'>+#define SPTILEOFF(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPATILEOFF, _SPBTILEOFF)</div><div class='add'>+#define SPCONSTALPHA(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA)</div><div class='add'>+#define SPSURFLIVE(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPASURFLIVE, _SPBSURFLIVE)</div><div class='add'>+#define SPCLRC0(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC0, _SPBCLRC0)</div><div class='add'>+#define SPCLRC1(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC1, _SPBCLRC1)</div><div class='add'>+#define SPGAMC(pipe, plane_id, i)	_MMIO(_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC) + (5 - (i)) * 4) /* 6 x u0.10 */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CHV pipe B sprite CSC</div><div class='add'>+ *</div><div class='add'>+ * |cr|   |c0 c1 c2|   |cr + cr_ioff|   |cr_ooff|</div><div class='add'>+ * |yg| = |c3 c4 c5| x |yg + yg_ioff| + |yg_ooff|</div><div class='add'>+ * |cb|   |c6 c7 c8|   |cb + cr_ioff|   |cb_ooff|</div><div class='add'>+ */</div><div class='add'>+#define _MMIO_CHV_SPCSC(plane_id, reg) \</div><div class='add'>+	_MMIO(VLV_DISPLAY_BASE + ((plane_id) - PLANE_SPRITE0) * 0x1000 + (reg))</div><div class='add'>+</div><div class='add'>+#define SPCSCYGOFF(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d900)</div><div class='add'>+#define SPCSCCBOFF(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d904)</div><div class='add'>+#define SPCSCCROFF(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d908)</div><div class='add'>+#define  SPCSC_OOFF_MASK	REG_GENMASK(26, 16)</div><div class='add'>+#define  SPCSC_OOFF(x)		REG_FIELD_PREP(SPCSC_OOFF_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='add'>+#define  SPCSC_IOFF_MASK	REG_GENMASK(10, 0)</div><div class='add'>+#define  SPCSC_IOFF(x)		REG_FIELD_PREP(SPCSC_IOFF_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='add'>+</div><div class='add'>+#define SPCSCC01(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d90c)</div><div class='add'>+#define SPCSCC23(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d910)</div><div class='add'>+#define SPCSCC45(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d914)</div><div class='add'>+#define SPCSCC67(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d918)</div><div class='add'>+#define SPCSCC8(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d91c)</div><div class='add'>+#define  SPCSC_C1_MASK		REG_GENMASK(30, 16)</div><div class='add'>+#define  SPCSC_C1(x)		REG_FIELD_PREP(SPCSC_C1_MASK, (x) &amp; 0x7fff) /* s3.12 */</div><div class='add'>+#define  SPCSC_C0_MASK		REG_GENMASK(14, 0)</div><div class='add'>+#define  SPCSC_C0(x)		REG_FIELD_PREP(SPCSC_C0_MASK, (x) &amp; 0x7fff) /* s3.12 */</div><div class='add'>+</div><div class='add'>+#define SPCSCYGICLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d920)</div><div class='add'>+#define SPCSCCBICLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d924)</div><div class='add'>+#define SPCSCCRICLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d928)</div><div class='add'>+#define  SPCSC_IMAX_MASK	REG_GENMASK(26, 16)</div><div class='add'>+#define  SPCSC_IMAX(x)		REG_FIELD_PREP(SPCSC_IMAX_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='add'>+#define  SPCSC_IMIN_MASK	REG_GENMASK(10, 0)</div><div class='add'>+#define  SPCSC_IMIN(x)		REG_FIELD_PREP(SPCSC_IMIN_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='add'>+</div><div class='add'>+#define SPCSCYGOCLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d92c)</div><div class='add'>+#define SPCSCCBOCLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d930)</div><div class='add'>+#define SPCSCCROCLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d934)</div><div class='add'>+#define  SPCSC_OMAX_MASK	REG_GENMASK(25, 16)</div><div class='add'>+#define  SPCSC_OMAX(x)		REG_FIELD_PREP(SPCSC_OMAX_MASK, (x)) /* u10 */</div><div class='add'>+#define  SPCSC_OMIN_MASK	REG_GENMASK(9, 0)</div><div class='add'>+#define  SPCSC_OMIN(x)		REG_FIELD_PREP(SPCSC_OMIN_MASK, (x)) /* u10 */</div><div class='add'>+</div><div class='add'>+#endif /* __INTEL_SPRITE_REGS__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c<br/>index 6b374d481cd9..9887967b2ca5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_tc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_tc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_tc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_tc.c</a></div><div class='hunk'>@@ -100,11 +100,9 @@ static struct drm_i915_private *tc_to_i915(struct intel_tc_port *tc)</div><div class='ctx'> static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port,</div><div class='ctx'> 				  enum tc_port_mode mode)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> 	struct intel_tc_port *tc = to_tc_port(dig_port);</div><div class='ctx'> </div><div class='del'>-	return intel_phy_is_tc(i915, phy) &amp;&amp; tc-&gt;mode == mode;</div><div class='add'>+	return intel_encoder_is_tc(&amp;dig_port-&gt;base) &amp;&amp; tc-&gt;mode == mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port)</div><div class='hunk'>@@ -124,11 +122,9 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)</div><div class='ctx'> </div><div class='ctx'> bool intel_tc_port_handles_hpd_glitches(struct intel_digital_port *dig_port)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> 	struct intel_tc_port *tc = to_tc_port(dig_port);</div><div class='ctx'> </div><div class='del'>-	return intel_phy_is_tc(i915, phy) &amp;&amp; !tc-&gt;legacy_port;</div><div class='add'>+	return intel_encoder_is_tc(&amp;dig_port-&gt;base) &amp;&amp; !tc-&gt;legacy_port;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -254,8 +250,7 @@ assert_tc_cold_blocked(struct intel_tc_port *tc)</div><div class='ctx'> static enum intel_display_power_domain</div><div class='ctx'> tc_port_power_domain(struct intel_tc_port *tc)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = tc_to_i915(tc);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, tc-&gt;dig_port-&gt;base.port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(&amp;tc-&gt;dig_port-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	return POWER_DOMAIN_PORT_DDI_LANES_TC1 + tc_port - TC_PORT_1;</div><div class='ctx'> }</div><div class='hunk'>@@ -302,7 +297,7 @@ u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)</div><div class='ctx'> static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, dig_port-&gt;base.port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(&amp;dig_port-&gt;base);</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	u32 val, pin_assignment;</div><div class='ctx'> </div><div class='hunk'>@@ -375,9 +370,8 @@ int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='ctx'> 	struct intel_tc_port *tc = to_tc_port(dig_port);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> </div><div class='del'>-	if (!intel_phy_is_tc(i915, phy) || tc-&gt;mode != TC_PORT_DP_ALT)</div><div class='add'>+	if (!intel_encoder_is_tc(&amp;dig_port-&gt;base) || tc-&gt;mode != TC_PORT_DP_ALT)</div><div class='ctx'> 		return 4;</div><div class='ctx'> </div><div class='ctx'> 	assert_tc_cold_blocked(tc);</div><div class='hunk'>@@ -458,9 +452,7 @@ static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,</div><div class='ctx'> </div><div class='ctx'> static void tc_phy_load_fia_params(struct intel_tc_port *tc, bool modular_fia)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = tc_to_i915(tc);</div><div class='del'>-	enum port port = tc-&gt;dig_port-&gt;base.port;</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(&amp;tc-&gt;dig_port-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more</div><div class='hunk'>@@ -812,7 +804,7 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)</div><div class='ctx'> static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = tc_to_i915(tc);</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, tc-&gt;dig_port-&gt;base.port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(&amp;tc-&gt;dig_port-&gt;base);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	assert_display_core_power_enabled(tc);</div><div class='hunk'>@@ -1635,10 +1627,7 @@ static bool __intel_tc_port_link_needs_reset(struct intel_tc_port *tc)</div><div class='ctx'> </div><div class='ctx'> bool intel_tc_port_link_needs_reset(struct intel_digital_port *dig_port)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='del'>-</div><div class='del'>-	if (!intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (!intel_encoder_is_tc(&amp;dig_port-&gt;base))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return __intel_tc_port_link_needs_reset(to_tc_port(dig_port));</div><div class='hunk'>@@ -1740,11 +1729,9 @@ bool intel_tc_port_link_reset(struct intel_digital_port *dig_port)</div><div class='ctx'> </div><div class='ctx'> void intel_tc_port_link_cancel_reset_work(struct intel_digital_port *dig_port)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='del'>-	enum phy phy = intel_port_to_phy(i915, dig_port-&gt;base.port);</div><div class='ctx'> 	struct intel_tc_port *tc = to_tc_port(dig_port);</div><div class='ctx'> </div><div class='del'>-	if (!intel_phy_is_tc(i915, phy))</div><div class='add'>+	if (!intel_encoder_is_tc(&amp;dig_port-&gt;base))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work(&amp;tc-&gt;link_reset_work);</div><div class='hunk'>@@ -1861,7 +1848,7 @@ int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(dig_port-&gt;base.base.dev);</div><div class='ctx'> 	struct intel_tc_port *tc;</div><div class='ctx'> 	enum port port = dig_port-&gt;base.port;</div><div class='del'>-	enum tc_port tc_port = intel_port_to_tc(i915, port);</div><div class='add'>+	enum tc_port tc_port = intel_encoder_to_tc(&amp;dig_port-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	if (drm_WARN_ON(&amp;i915-&gt;drm, tc_port == TC_PORT_NONE))</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c<br/>index 2b77d399f1a1..9df0f1263913 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_tv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_tv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_tv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_tv.c</a></div><div class='hunk'>@@ -885,7 +885,8 @@ struct intel_tv_connector_state {</div><div class='ctx'> 	bool bypass_vfilter;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define to_intel_tv_connector_state(x) container_of(x, struct intel_tv_connector_state, base)</div><div class='add'>+#define to_intel_tv_connector_state(conn_state) \</div><div class='add'>+	container_of_const((conn_state), struct intel_tv_connector_state, base)</div><div class='ctx'> </div><div class='ctx'> static struct drm_connector_state *</div><div class='ctx'> intel_tv_connector_duplicate_state(struct drm_connector *connector)</div><div class='hunk'>@@ -961,16 +962,13 @@ intel_tv_mode_valid(struct drm_connector *connector,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(connector-&gt;dev);</div><div class='ctx'> 	const struct tv_mode *tv_mode = intel_tv_mode_find(connector-&gt;state);</div><div class='del'>-	int max_dotclk = i915-&gt;max_dotclk_freq;</div><div class='add'>+	int max_dotclk = i915-&gt;display.cdclk.max_dotclk_freq;</div><div class='ctx'> 	enum drm_mode_status status;</div><div class='ctx'> </div><div class='ctx'> 	status = intel_cpu_transcoder_mode_valid(i915, mode);</div><div class='ctx'> 	if (status != MODE_OK)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='del'>-		return MODE_NO_DBLESCAN;</div><div class='del'>-</div><div class='ctx'> 	if (mode-&gt;clock &gt; max_dotclk)</div><div class='ctx'> 		return MODE_CLOCK_HIGH;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h<br/>index a9f44abfc9fc..228702c0e492 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_vbt_defs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_vbt_defs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_vbt_defs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_vbt_defs.h</a></div><div class='hunk'>@@ -485,6 +485,7 @@ struct child_device_config {</div><div class='ctx'> 	u8 hdmi_iboost_level:4;					/* 196+ */</div><div class='ctx'> 	u8 dp_max_link_rate:3;					/* 216+ */</div><div class='ctx'> 	u8 dp_max_link_rate_reserved:5;				/* 216+ */</div><div class='add'>+	u8 efp_index;						/* 256+ */</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct bdb_general_definitions {</div><div class='hunk'>@@ -602,22 +603,22 @@ struct bdb_driver_features {</div><div class='ctx'> 	u8 custom_vbt_version;					/* 155+ */</div><div class='ctx'> </div><div class='ctx'> 	/* Driver Feature Flags */</div><div class='del'>-	u16 rmpm_enabled:1;					/* 165+ */</div><div class='del'>-	u16 s2ddt_enabled:1;					/* 165+ */</div><div class='del'>-	u16 dpst_enabled:1;					/* 165-227 */</div><div class='del'>-	u16 bltclt_enabled:1;					/* 165+ */</div><div class='del'>-	u16 adb_enabled:1;					/* 165-227 */</div><div class='del'>-	u16 drrs_enabled:1;					/* 165-227 */</div><div class='del'>-	u16 grs_enabled:1;					/* 165+ */</div><div class='del'>-	u16 gpmt_enabled:1;					/* 165+ */</div><div class='del'>-	u16 tbt_enabled:1;					/* 165+ */</div><div class='add'>+	u16 rmpm_enabled:1;					/* 159+ */</div><div class='add'>+	u16 s2ddt_enabled:1;					/* 159+ */</div><div class='add'>+	u16 dpst_enabled:1;					/* 159-227 */</div><div class='add'>+	u16 bltclt_enabled:1;					/* 159+ */</div><div class='add'>+	u16 adb_enabled:1;					/* 159-227 */</div><div class='add'>+	u16 drrs_enabled:1;					/* 159-227 */</div><div class='add'>+	u16 grs_enabled:1;					/* 159+ */</div><div class='add'>+	u16 gpmt_enabled:1;					/* 159+ */</div><div class='add'>+	u16 tbt_enabled:1;					/* 159+ */</div><div class='ctx'> 	u16 psr_enabled:1;					/* 165-227 */</div><div class='ctx'> 	u16 ips_enabled:1;					/* 165+ */</div><div class='del'>-	u16 dpfs_enabled:1;					/* 165+ */</div><div class='add'>+	u16 dfps_enabled:1;					/* 165+ */</div><div class='ctx'> 	u16 dmrrs_enabled:1;					/* 174-227 */</div><div class='ctx'> 	u16 adt_enabled:1;					/* ???-228 */</div><div class='ctx'> 	u16 hpd_wake:1;						/* 201-240 */</div><div class='del'>-	u16 pc_feature_valid:1;</div><div class='add'>+	u16 pc_feature_valid:1;					/* 159+ */</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -880,11 +881,12 @@ struct bdb_lvds_lfp_data_tail {</div><div class='ctx'> struct lfp_backlight_data_entry {</div><div class='ctx'> 	u8 type:2;</div><div class='ctx'> 	u8 active_low_pwm:1;</div><div class='del'>-	u8 obsolete1:5;</div><div class='add'>+	u8 i2c_pin:3;						/* obsolete since ? */</div><div class='add'>+	u8 i2c_speed:2;						/* obsolete since ? */</div><div class='ctx'> 	u16 pwm_freq_hz;</div><div class='ctx'> 	u8 min_brightness;					/* ???-233 */</div><div class='del'>-	u8 obsolete2;</div><div class='del'>-	u8 obsolete3;</div><div class='add'>+	u8 i2c_address;						/* obsolete since ? */</div><div class='add'>+	u8 i2c_command;						/* obsolete since ? */</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct lfp_backlight_control_method {</div><div class='hunk'>@@ -897,16 +899,11 @@ struct lfp_brightness_level {</div><div class='ctx'> 	u16 reserved;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#define EXP_BDB_LFP_BL_DATA_SIZE_REV_191 \</div><div class='del'>-	offsetof(struct bdb_lfp_backlight_data, brightness_level)</div><div class='del'>-#define EXP_BDB_LFP_BL_DATA_SIZE_REV_234 \</div><div class='del'>-	offsetof(struct bdb_lfp_backlight_data, brightness_precision_bits)</div><div class='del'>-</div><div class='ctx'> struct bdb_lfp_backlight_data {</div><div class='ctx'> 	u8 entry_size;</div><div class='ctx'> 	struct lfp_backlight_data_entry data[16];</div><div class='del'>-	u8 level[16];							/* ???-233 */</div><div class='del'>-	struct lfp_backlight_control_method backlight_control[16];</div><div class='add'>+	u8 level[16];							/* 162-233 */</div><div class='add'>+	struct lfp_backlight_control_method backlight_control[16];	/* 191+ */</div><div class='ctx'> 	struct lfp_brightness_level brightness_level[16];		/* 234+ */</div><div class='ctx'> 	struct lfp_brightness_level brightness_min_level[16];		/* 234+ */</div><div class='ctx'> 	u8 brightness_precision_bits[16];				/* 236+ */</div><div class='hunk'>@@ -917,7 +914,7 @@ struct bdb_lfp_backlight_data {</div><div class='ctx'>  * Block 44 - LFP Power Conservation Features Block</div><div class='ctx'>  */</div><div class='ctx'> struct lfp_power_features {</div><div class='del'>-	u8 reserved1:1;</div><div class='add'>+	u8 dpst_support:1;						/* ???-159 */</div><div class='ctx'> 	u8 power_conservation_pref:3;</div><div class='ctx'> 	u8 reserved2:1;</div><div class='ctx'> 	u8 lace_enabled_status:1;					/* 210+ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c<br/>index f542ee1db1d9..894ee97b3e1b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_vrr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/intel_vrr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/intel_vrr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/intel_vrr.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include "intel_de.h"</div><div class='ctx'> #include "intel_display_types.h"</div><div class='ctx'> #include "intel_vrr.h"</div><div class='add'>+#include "intel_dp.h"</div><div class='ctx'> </div><div class='ctx'> bool intel_vrr_is_capable(struct intel_connector *connector)</div><div class='ctx'> {</div><div class='hunk'>@@ -113,6 +114,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(crtc-&gt;base.dev);</div><div class='ctx'> 	struct intel_connector *connector =</div><div class='ctx'> 		to_intel_connector(conn_state-&gt;connector);</div><div class='add'>+	struct intel_dp *intel_dp = intel_attached_dp(connector);</div><div class='ctx'> 	struct drm_display_mode *adjusted_mode = &amp;crtc_state-&gt;hw.adjusted_mode;</div><div class='ctx'> 	const struct drm_display_info *info = &amp;connector-&gt;base.display_info;</div><div class='ctx'> 	int vmin, vmax;</div><div class='hunk'>@@ -172,6 +174,14 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,</div><div class='ctx'> 	if (crtc_state-&gt;uapi.vrr_enabled) {</div><div class='ctx'> 		crtc_state-&gt;vrr.enable = true;</div><div class='ctx'> 		crtc_state-&gt;mode_flags |= I915_MODE_FLAG_VRR;</div><div class='add'>+		if (intel_dp_as_sdp_supported(intel_dp)) {</div><div class='add'>+			crtc_state-&gt;vrr.vsync_start =</div><div class='add'>+				(crtc_state-&gt;hw.adjusted_mode.crtc_vtotal -</div><div class='add'>+					crtc_state-&gt;hw.adjusted_mode.vsync_start);</div><div class='add'>+			crtc_state-&gt;vrr.vsync_end =</div><div class='add'>+				(crtc_state-&gt;hw.adjusted_mode.crtc_vtotal -</div><div class='add'>+					crtc_state-&gt;hw.adjusted_mode.vsync_end);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -247,6 +257,12 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN);</div><div class='add'>+</div><div class='add'>+	if (HAS_AS_SDP(dev_priv))</div><div class='add'>+		intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),</div><div class='add'>+			       VRR_VSYNC_END(crtc_state-&gt;vrr.vsync_end) |</div><div class='add'>+			       VRR_VSYNC_START(crtc_state-&gt;vrr.vsync_start));</div><div class='add'>+</div><div class='ctx'> 	intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder),</div><div class='ctx'> 		       VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));</div><div class='ctx'> }</div><div class='hunk'>@@ -265,13 +281,16 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)</div><div class='ctx'> 	intel_de_wait_for_clear(dev_priv, TRANS_VRR_STATUS(cpu_transcoder),</div><div class='ctx'> 				VRR_STATUS_VRR_EN_LIVE, 1000);</div><div class='ctx'> 	intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0);</div><div class='add'>+</div><div class='add'>+	if (HAS_AS_SDP(dev_priv))</div><div class='add'>+		intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_vrr_get_config(struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc_state-&gt;uapi.crtc-&gt;dev);</div><div class='ctx'> 	enum transcoder cpu_transcoder = crtc_state-&gt;cpu_transcoder;</div><div class='del'>-	u32 trans_vrr_ctl;</div><div class='add'>+	u32 trans_vrr_ctl, trans_vrr_vsync;</div><div class='ctx'> </div><div class='ctx'> 	trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(cpu_transcoder));</div><div class='ctx'> </div><div class='hunk'>@@ -291,6 +310,16 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)</div><div class='ctx'> 		crtc_state-&gt;vrr.vmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(cpu_transcoder)) + 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (crtc_state-&gt;vrr.enable)</div><div class='add'>+	if (crtc_state-&gt;vrr.enable) {</div><div class='ctx'> 		crtc_state-&gt;mode_flags |= I915_MODE_FLAG_VRR;</div><div class='add'>+</div><div class='add'>+		if (HAS_AS_SDP(dev_priv)) {</div><div class='add'>+			trans_vrr_vsync =</div><div class='add'>+				intel_de_read(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder));</div><div class='add'>+			crtc_state-&gt;vrr.vsync_start =</div><div class='add'>+				REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);</div><div class='add'>+			crtc_state-&gt;vrr.vsync_end =</div><div class='add'>+				REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c<br/>index 8a934bada624..baa601d27815 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_scaler.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_scaler.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_scaler.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/skl_scaler.c</a></div><div class='hunk'>@@ -213,10 +213,11 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,</div><div class='ctx'> 	 * The pipe scaler does not use all the bits of PIPESRC, at least</div><div class='ctx'> 	 * on the earlier platforms. So even when we're scaling a plane</div><div class='ctx'> 	 * the *pipe* source size must not be too large. For simplicity</div><div class='del'>-	 * we assume the limits match the scaler source size limits. Might</div><div class='del'>-	 * not be 100% accurate on all platforms, but good enough for now.</div><div class='add'>+	 * we assume the limits match the scaler destination size limits.</div><div class='add'>+	 * Might not be 100% accurate on all platforms, but good enough for</div><div class='add'>+	 * now.</div><div class='ctx'> 	 */</div><div class='del'>-	if (pipe_src_w &gt; max_src_w || pipe_src_h &gt; max_src_h) {</div><div class='add'>+	if (pipe_src_w &gt; max_dst_w || pipe_src_h &gt; max_dst_h) {</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='ctx'> 			    "scaler_user index %u.%u: pipe src size %ux%u "</div><div class='ctx'> 			    "is out of scaler range\n",</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c<br/>index c6b9be80d83c..7c6187b4479f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_watermark.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_watermark.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_watermark.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/skl_watermark.c</a></div><div class='hunk'>@@ -6,18 +6,19 @@</div><div class='ctx'> #include &lt;drm/drm_blend.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "i915_drv.h"</div><div class='del'>-#include "i915_fixed.h"</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> #include "i9xx_wm.h"</div><div class='ctx'> #include "intel_atomic.h"</div><div class='ctx'> #include "intel_atomic_plane.h"</div><div class='ctx'> #include "intel_bw.h"</div><div class='add'>+#include "intel_cdclk.h"</div><div class='ctx'> #include "intel_crtc.h"</div><div class='ctx'> #include "intel_de.h"</div><div class='ctx'> #include "intel_display.h"</div><div class='ctx'> #include "intel_display_power.h"</div><div class='ctx'> #include "intel_display_types.h"</div><div class='ctx'> #include "intel_fb.h"</div><div class='add'>+#include "intel_fixed.h"</div><div class='ctx'> #include "intel_pcode.h"</div><div class='ctx'> #include "intel_wm.h"</div><div class='ctx'> #include "skl_watermark.h"</div><div class='hunk'>@@ -69,7 +70,7 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)</div><div class='ctx'> 	return DISPLAY_VER(i915) == 9;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='add'>+bool</div><div class='ctx'> intel_has_sagv(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	return HAS_SAGV(i915) &amp;&amp;</div><div class='hunk'>@@ -2601,10 +2602,17 @@ skl_compute_ddb(struct intel_atomic_state *state)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (HAS_MBUS_JOINING(i915))</div><div class='add'>+	if (HAS_MBUS_JOINING(i915)) {</div><div class='ctx'> 		new_dbuf_state-&gt;joined_mbus =</div><div class='ctx'> 			adlp_check_mbus_joined(new_dbuf_state-&gt;active_pipes);</div><div class='ctx'> </div><div class='add'>+		if (old_dbuf_state-&gt;joined_mbus != new_dbuf_state-&gt;joined_mbus) {</div><div class='add'>+			ret = intel_cdclk_state_set_joined_mbus(state, new_dbuf_state-&gt;joined_mbus);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for_each_intel_crtc(&amp;i915-&gt;drm, crtc) {</div><div class='ctx'> 		enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='hunk'>@@ -2628,13 +2636,6 @@ skl_compute_ddb(struct intel_atomic_state *state)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		if (old_dbuf_state-&gt;joined_mbus != new_dbuf_state-&gt;joined_mbus) {</div><div class='del'>-			/* TODO: Implement vblank synchronized MBUS joining changes */</div><div class='del'>-			ret = intel_modeset_all_pipes_late(state, "MBUS joining change");</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		drm_dbg_kms(&amp;i915-&gt;drm,</div><div class='ctx'> 			    "Enabled dbuf slices 0x%x -&gt; 0x%x (total dbuf slices 0x%x), mbus joined? %s-&gt;%s\n",</div><div class='ctx'> 			    old_dbuf_state-&gt;enabled_slices,</div><div class='hunk'>@@ -3057,6 +3058,8 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)</div><div class='ctx'> 	if (HAS_MBUS_JOINING(i915))</div><div class='ctx'> 		dbuf_state-&gt;joined_mbus = intel_de_read(i915, MBUS_CTL) &amp; MBUS_JOIN;</div><div class='ctx'> </div><div class='add'>+	dbuf_state-&gt;mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(i915, &amp;i915-&gt;display.cdclk.hw);</div><div class='add'>+</div><div class='ctx'> 	for_each_intel_crtc(&amp;i915-&gt;drm, crtc) {</div><div class='ctx'> 		struct intel_crtc_state *crtc_state =</div><div class='ctx'> 			to_intel_crtc_state(crtc-&gt;base.state);</div><div class='hunk'>@@ -3530,85 +3533,6 @@ int intel_dbuf_init(struct drm_i915_private *i915)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state before</div><div class='del'>- * update the request state of all DBUS slices.</div><div class='del'>- */</div><div class='del'>-static void update_mbus_pre_enable(struct intel_atomic_state *state)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='del'>-	u32 mbus_ctl, dbuf_min_tracker_val;</div><div class='del'>-	enum dbuf_slice slice;</div><div class='del'>-	const struct intel_dbuf_state *dbuf_state =</div><div class='del'>-		intel_atomic_get_new_dbuf_state(state);</div><div class='del'>-</div><div class='del'>-	if (!HAS_MBUS_JOINING(i915))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * TODO: Implement vblank synchronized MBUS joining changes.</div><div class='del'>-	 * Must be properly coordinated with dbuf reprogramming.</div><div class='del'>-	 */</div><div class='del'>-	if (dbuf_state-&gt;joined_mbus) {</div><div class='del'>-		mbus_ctl = MBUS_HASHING_MODE_1x4 | MBUS_JOIN |</div><div class='del'>-			MBUS_JOIN_PIPE_SELECT_NONE;</div><div class='del'>-		dbuf_min_tracker_val = DBUF_MIN_TRACKER_STATE_SERVICE(3);</div><div class='del'>-	} else {</div><div class='del'>-		mbus_ctl = MBUS_HASHING_MODE_2x2 |</div><div class='del'>-			MBUS_JOIN_PIPE_SELECT_NONE;</div><div class='del'>-		dbuf_min_tracker_val = DBUF_MIN_TRACKER_STATE_SERVICE(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	intel_de_rmw(i915, MBUS_CTL,</div><div class='del'>-		     MBUS_HASHING_MODE_MASK | MBUS_JOIN |</div><div class='del'>-		     MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl);</div><div class='del'>-</div><div class='del'>-	for_each_dbuf_slice(i915, slice)</div><div class='del'>-		intel_de_rmw(i915, DBUF_CTL_S(slice),</div><div class='del'>-			     DBUF_MIN_TRACKER_STATE_SERVICE_MASK,</div><div class='del'>-			     dbuf_min_tracker_val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='del'>-	const struct intel_dbuf_state *new_dbuf_state =</div><div class='del'>-		intel_atomic_get_new_dbuf_state(state);</div><div class='del'>-	const struct intel_dbuf_state *old_dbuf_state =</div><div class='del'>-		intel_atomic_get_old_dbuf_state(state);</div><div class='del'>-</div><div class='del'>-	if (!new_dbuf_state ||</div><div class='del'>-	    (new_dbuf_state-&gt;enabled_slices == old_dbuf_state-&gt;enabled_slices &amp;&amp;</div><div class='del'>-	     new_dbuf_state-&gt;joined_mbus == old_dbuf_state-&gt;joined_mbus))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='del'>-</div><div class='del'>-	update_mbus_pre_enable(state);</div><div class='del'>-	gen9_dbuf_slices_update(i915,</div><div class='del'>-				old_dbuf_state-&gt;enabled_slices |</div><div class='del'>-				new_dbuf_state-&gt;enabled_slices);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_dbuf_post_plane_update(struct intel_atomic_state *state)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='del'>-	const struct intel_dbuf_state *new_dbuf_state =</div><div class='del'>-		intel_atomic_get_new_dbuf_state(state);</div><div class='del'>-	const struct intel_dbuf_state *old_dbuf_state =</div><div class='del'>-		intel_atomic_get_old_dbuf_state(state);</div><div class='del'>-</div><div class='del'>-	if (!new_dbuf_state ||</div><div class='del'>-	    (new_dbuf_state-&gt;enabled_slices == old_dbuf_state-&gt;enabled_slices &amp;&amp;</div><div class='del'>-	     new_dbuf_state-&gt;joined_mbus == old_dbuf_state-&gt;joined_mbus))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='del'>-</div><div class='del'>-	gen9_dbuf_slices_update(i915,</div><div class='del'>-				new_dbuf_state-&gt;enabled_slices);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)</div><div class='ctx'> {</div><div class='ctx'> 	switch (pipe) {</div><div class='hunk'>@@ -3628,14 +3552,12 @@ static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void intel_mbus_dbox_update(struct intel_atomic_state *state)</div><div class='add'>+static void intel_mbus_dbox_update(struct intel_atomic_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='ctx'> 	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;</div><div class='del'>-	const struct intel_crtc_state *new_crtc_state;</div><div class='ctx'> 	const struct intel_crtc *crtc;</div><div class='ctx'> 	u32 val = 0;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (DISPLAY_VER(i915) &lt; 11)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -3679,12 +3601,9 @@ void intel_mbus_dbox_update(struct intel_atomic_state *state)</div><div class='ctx'> 		val |= MBUS_DBOX_B_CREDIT(8);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {</div><div class='add'>+	for_each_intel_crtc_in_pipe_mask(&amp;i915-&gt;drm, crtc, new_dbuf_state-&gt;active_pipes) {</div><div class='ctx'> 		u32 pipe_val = val;</div><div class='ctx'> </div><div class='del'>-		if (!new_crtc_state-&gt;hw.active)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		if (DISPLAY_VER(i915) &gt;= 14) {</div><div class='ctx'> 			if (xelpdp_is_only_pipe_per_dbuf_bank(crtc-&gt;pipe,</div><div class='ctx'> 							      new_dbuf_state-&gt;active_pipes))</div><div class='hunk'>@@ -3697,6 +3616,217 @@ void intel_mbus_dbox_update(struct intel_atomic_state *state)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,</div><div class='add'>+					   int ratio)</div><div class='add'>+{</div><div class='add'>+	struct intel_dbuf_state *dbuf_state;</div><div class='add'>+</div><div class='add'>+	dbuf_state = intel_atomic_get_dbuf_state(state);</div><div class='add'>+	if (IS_ERR(dbuf_state))</div><div class='add'>+		return PTR_ERR(dbuf_state);</div><div class='add'>+</div><div class='add'>+	dbuf_state-&gt;mdclk_cdclk_ratio = ratio;</div><div class='add'>+</div><div class='add'>+	return intel_atomic_lock_global_state(&amp;dbuf_state-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,</div><div class='add'>+					 int ratio, bool joined_mbus)</div><div class='add'>+{</div><div class='add'>+	enum dbuf_slice slice;</div><div class='add'>+</div><div class='add'>+	if (!HAS_MBUS_JOINING(i915))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (DISPLAY_VER(i915) &gt;= 20)</div><div class='add'>+		intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,</div><div class='add'>+			     MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));</div><div class='add'>+</div><div class='add'>+	if (joined_mbus)</div><div class='add'>+		ratio *= 2;</div><div class='add'>+</div><div class='add'>+	drm_dbg_kms(&amp;i915-&gt;drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",</div><div class='add'>+		    ratio, str_yes_no(joined_mbus));</div><div class='add'>+</div><div class='add'>+	for_each_dbuf_slice(i915, slice)</div><div class='add'>+		intel_de_rmw(i915, DBUF_CTL_S(slice),</div><div class='add'>+			     DBUF_MIN_TRACKER_STATE_SERVICE_MASK,</div><div class='add'>+			     DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_dbuf_mdclk_min_tracker_update(struct intel_atomic_state *state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_dbuf_state *old_dbuf_state =</div><div class='add'>+		intel_atomic_get_old_dbuf_state(state);</div><div class='add'>+	const struct intel_dbuf_state *new_dbuf_state =</div><div class='add'>+		intel_atomic_get_new_dbuf_state(state);</div><div class='add'>+	int mdclk_cdclk_ratio;</div><div class='add'>+</div><div class='add'>+	if (intel_cdclk_is_decreasing_later(state)) {</div><div class='add'>+		/* cdclk/mdclk will be changed later by intel_set_cdclk_post_plane_update() */</div><div class='add'>+		mdclk_cdclk_ratio = old_dbuf_state-&gt;mdclk_cdclk_ratio;</div><div class='add'>+	} else {</div><div class='add'>+		/* cdclk/mdclk already changed by intel_set_cdclk_pre_plane_update() */</div><div class='add'>+		mdclk_cdclk_ratio = new_dbuf_state-&gt;mdclk_cdclk_ratio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_dbuf_mdclk_cdclk_ratio_update(i915, mdclk_cdclk_ratio,</div><div class='add'>+					    new_dbuf_state-&gt;joined_mbus);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum pipe intel_mbus_joined_pipe(struct intel_atomic_state *state,</div><div class='add'>+					const struct intel_dbuf_state *dbuf_state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	enum pipe pipe = ffs(dbuf_state-&gt;active_pipes) - 1;</div><div class='add'>+	const struct intel_crtc_state *new_crtc_state;</div><div class='add'>+	struct intel_crtc *crtc;</div><div class='add'>+</div><div class='add'>+	drm_WARN_ON(&amp;i915-&gt;drm, !dbuf_state-&gt;joined_mbus);</div><div class='add'>+	drm_WARN_ON(&amp;i915-&gt;drm, !is_power_of_2(dbuf_state-&gt;active_pipes));</div><div class='add'>+</div><div class='add'>+	crtc = intel_crtc_for_pipe(i915, pipe);</div><div class='add'>+	new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);</div><div class='add'>+</div><div class='add'>+	if (new_crtc_state &amp;&amp; !intel_crtc_needs_modeset(new_crtc_state))</div><div class='add'>+		return pipe;</div><div class='add'>+	else</div><div class='add'>+		return INVALID_PIPE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,</div><div class='add'>+					enum pipe pipe)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_dbuf_state *old_dbuf_state =</div><div class='add'>+		intel_atomic_get_old_dbuf_state(state);</div><div class='add'>+	const struct intel_dbuf_state *new_dbuf_state =</div><div class='add'>+		intel_atomic_get_new_dbuf_state(state);</div><div class='add'>+	u32 mbus_ctl;</div><div class='add'>+</div><div class='add'>+	drm_dbg_kms(&amp;i915-&gt;drm, "Changing mbus joined: %s -&gt; %s (pipe: %c)\n",</div><div class='add'>+		    str_yes_no(old_dbuf_state-&gt;joined_mbus),</div><div class='add'>+		    str_yes_no(new_dbuf_state-&gt;joined_mbus),</div><div class='add'>+		    pipe != INVALID_PIPE ? pipe_name(pipe) : '*');</div><div class='add'>+</div><div class='add'>+	if (new_dbuf_state-&gt;joined_mbus)</div><div class='add'>+		mbus_ctl = MBUS_HASHING_MODE_1x4 | MBUS_JOIN;</div><div class='add'>+	else</div><div class='add'>+		mbus_ctl = MBUS_HASHING_MODE_2x2;</div><div class='add'>+</div><div class='add'>+	if (pipe != INVALID_PIPE)</div><div class='add'>+		mbus_ctl |= MBUS_JOIN_PIPE_SELECT(pipe);</div><div class='add'>+	else</div><div class='add'>+		mbus_ctl |= MBUS_JOIN_PIPE_SELECT_NONE;</div><div class='add'>+</div><div class='add'>+	intel_de_rmw(i915, MBUS_CTL,</div><div class='add'>+		     MBUS_HASHING_MODE_MASK | MBUS_JOIN |</div><div class='add'>+		     MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state)</div><div class='add'>+{</div><div class='add'>+	const struct intel_dbuf_state *new_dbuf_state =</div><div class='add'>+		intel_atomic_get_new_dbuf_state(state);</div><div class='add'>+	const struct intel_dbuf_state *old_dbuf_state =</div><div class='add'>+		intel_atomic_get_old_dbuf_state(state);</div><div class='add'>+</div><div class='add'>+	if (!new_dbuf_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!old_dbuf_state-&gt;joined_mbus &amp;&amp; new_dbuf_state-&gt;joined_mbus) {</div><div class='add'>+		enum pipe pipe = intel_mbus_joined_pipe(state, new_dbuf_state);</div><div class='add'>+</div><div class='add'>+		WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='add'>+</div><div class='add'>+		intel_dbuf_mbus_join_update(state, pipe);</div><div class='add'>+		intel_mbus_dbox_update(state);</div><div class='add'>+		intel_dbuf_mdclk_min_tracker_update(state);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_dbuf_state *new_dbuf_state =</div><div class='add'>+		intel_atomic_get_new_dbuf_state(state);</div><div class='add'>+	const struct intel_dbuf_state *old_dbuf_state =</div><div class='add'>+		intel_atomic_get_old_dbuf_state(state);</div><div class='add'>+</div><div class='add'>+	if (!new_dbuf_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (old_dbuf_state-&gt;joined_mbus &amp;&amp; !new_dbuf_state-&gt;joined_mbus) {</div><div class='add'>+		enum pipe pipe = intel_mbus_joined_pipe(state, old_dbuf_state);</div><div class='add'>+</div><div class='add'>+		WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='add'>+</div><div class='add'>+		intel_dbuf_mdclk_min_tracker_update(state);</div><div class='add'>+		intel_mbus_dbox_update(state);</div><div class='add'>+		intel_dbuf_mbus_join_update(state, pipe);</div><div class='add'>+</div><div class='add'>+		if (pipe != INVALID_PIPE) {</div><div class='add'>+			struct intel_crtc *crtc = intel_crtc_for_pipe(i915, pipe);</div><div class='add'>+</div><div class='add'>+			intel_crtc_wait_for_next_vblank(crtc);</div><div class='add'>+		}</div><div class='add'>+	} else if (old_dbuf_state-&gt;joined_mbus == new_dbuf_state-&gt;joined_mbus &amp;&amp;</div><div class='add'>+		   old_dbuf_state-&gt;active_pipes != new_dbuf_state-&gt;active_pipes) {</div><div class='add'>+		WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='add'>+</div><div class='add'>+		intel_dbuf_mdclk_min_tracker_update(state);</div><div class='add'>+		intel_mbus_dbox_update(state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_dbuf_state *new_dbuf_state =</div><div class='add'>+		intel_atomic_get_new_dbuf_state(state);</div><div class='add'>+	const struct intel_dbuf_state *old_dbuf_state =</div><div class='add'>+		intel_atomic_get_old_dbuf_state(state);</div><div class='add'>+	u8 old_slices, new_slices;</div><div class='add'>+</div><div class='add'>+	if (!new_dbuf_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	old_slices = old_dbuf_state-&gt;enabled_slices;</div><div class='add'>+	new_slices = old_dbuf_state-&gt;enabled_slices | new_dbuf_state-&gt;enabled_slices;</div><div class='add'>+</div><div class='add'>+	if (old_slices == new_slices)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='add'>+</div><div class='add'>+	gen9_dbuf_slices_update(i915, new_slices);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_dbuf_post_plane_update(struct intel_atomic_state *state)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(state-&gt;base.dev);</div><div class='add'>+	const struct intel_dbuf_state *new_dbuf_state =</div><div class='add'>+		intel_atomic_get_new_dbuf_state(state);</div><div class='add'>+	const struct intel_dbuf_state *old_dbuf_state =</div><div class='add'>+		intel_atomic_get_old_dbuf_state(state);</div><div class='add'>+	u8 old_slices, new_slices;</div><div class='add'>+</div><div class='add'>+	if (!new_dbuf_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	old_slices = old_dbuf_state-&gt;enabled_slices | new_dbuf_state-&gt;enabled_slices;</div><div class='add'>+	new_slices = new_dbuf_state-&gt;enabled_slices;</div><div class='add'>+</div><div class='add'>+	if (old_slices == new_slices)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!new_dbuf_state-&gt;base.changed);</div><div class='add'>+</div><div class='add'>+	gen9_dbuf_slices_update(i915, new_slices);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = m-&gt;private;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h<br/>index e3d1d74a7b17..91f92c0e706e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_watermark.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_watermark.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_watermark.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/skl_watermark.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state);</div><div class='ctx'> void intel_sagv_post_plane_update(struct intel_atomic_state *state);</div><div class='ctx'> bool intel_can_enable_sagv(struct drm_i915_private *i915,</div><div class='ctx'> 			   const struct intel_bw_state *bw_state);</div><div class='add'>+bool intel_has_sagv(struct drm_i915_private *i915);</div><div class='ctx'> </div><div class='ctx'> u32 skl_ddb_dbuf_slice_mask(struct drm_i915_private *i915,</div><div class='ctx'> 			    const struct skl_ddb_entry *entry);</div><div class='hunk'>@@ -58,22 +59,31 @@ struct intel_dbuf_state {</div><div class='ctx'> 	u8 slices[I915_MAX_PIPES];</div><div class='ctx'> 	u8 enabled_slices;</div><div class='ctx'> 	u8 active_pipes;</div><div class='add'>+	u8 mdclk_cdclk_ratio;</div><div class='ctx'> 	bool joined_mbus;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_dbuf_state *</div><div class='ctx'> intel_atomic_get_dbuf_state(struct intel_atomic_state *state);</div><div class='ctx'> </div><div class='del'>-#define to_intel_dbuf_state(x) container_of((x), struct intel_dbuf_state, base)</div><div class='add'>+#define to_intel_dbuf_state(global_state) \</div><div class='add'>+	container_of_const((global_state), struct intel_dbuf_state, base)</div><div class='add'>+</div><div class='ctx'> #define intel_atomic_get_old_dbuf_state(state) \</div><div class='ctx'> 	to_intel_dbuf_state(intel_atomic_get_old_global_obj_state(state, &amp;to_i915(state-&gt;base.dev)-&gt;display.dbuf.obj))</div><div class='ctx'> #define intel_atomic_get_new_dbuf_state(state) \</div><div class='ctx'> 	to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &amp;to_i915(state-&gt;base.dev)-&gt;display.dbuf.obj))</div><div class='ctx'> </div><div class='ctx'> int intel_dbuf_init(struct drm_i915_private *i915);</div><div class='add'>+int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,</div><div class='add'>+					   int ratio);</div><div class='add'>+</div><div class='ctx'> void intel_dbuf_pre_plane_update(struct intel_atomic_state *state);</div><div class='ctx'> void intel_dbuf_post_plane_update(struct intel_atomic_state *state);</div><div class='del'>-void intel_mbus_dbox_update(struct intel_atomic_state *state);</div><div class='add'>+void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,</div><div class='add'>+					 int ratio, bool joined_mbus);</div><div class='add'>+void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state);</div><div class='add'>+void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state);</div><div class='ctx'> </div><div class='ctx'> #endif /* __SKL_WATERMARK_H__ */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/skl_watermark_regs.h b/drivers/gpu/drm/i915/display/skl_watermark_regs.h<br/>index 20b30c9a6613..269163fa3350 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_watermark_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/skl_watermark_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/skl_watermark_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/skl_watermark_regs.h</a></div><div class='hunk'>@@ -32,14 +32,16 @@</div><div class='ctx'> #define MBUS_BBOX_CTL_S1		_MMIO(0x45040)</div><div class='ctx'> #define MBUS_BBOX_CTL_S2		_MMIO(0x45044)</div><div class='ctx'> </div><div class='del'>-#define MBUS_CTL			_MMIO(0x4438C)</div><div class='del'>-#define MBUS_JOIN			REG_BIT(31)</div><div class='del'>-#define MBUS_HASHING_MODE_MASK		REG_BIT(30)</div><div class='del'>-#define MBUS_HASHING_MODE_2x2		REG_FIELD_PREP(MBUS_HASHING_MODE_MASK, 0)</div><div class='del'>-#define MBUS_HASHING_MODE_1x4		REG_FIELD_PREP(MBUS_HASHING_MODE_MASK, 1)</div><div class='del'>-#define MBUS_JOIN_PIPE_SELECT_MASK	REG_GENMASK(28, 26)</div><div class='del'>-#define MBUS_JOIN_PIPE_SELECT(pipe)	REG_FIELD_PREP(MBUS_JOIN_PIPE_SELECT_MASK, pipe)</div><div class='del'>-#define MBUS_JOIN_PIPE_SELECT_NONE	MBUS_JOIN_PIPE_SELECT(7)</div><div class='add'>+#define MBUS_CTL				_MMIO(0x4438C)</div><div class='add'>+#define   MBUS_JOIN				REG_BIT(31)</div><div class='add'>+#define   MBUS_HASHING_MODE_MASK		REG_BIT(30)</div><div class='add'>+#define   MBUS_HASHING_MODE_2x2			REG_FIELD_PREP(MBUS_HASHING_MODE_MASK, 0)</div><div class='add'>+#define   MBUS_HASHING_MODE_1x4			REG_FIELD_PREP(MBUS_HASHING_MODE_MASK, 1)</div><div class='add'>+#define   MBUS_JOIN_PIPE_SELECT_MASK		REG_GENMASK(28, 26)</div><div class='add'>+#define   MBUS_JOIN_PIPE_SELECT(pipe)		REG_FIELD_PREP(MBUS_JOIN_PIPE_SELECT_MASK, pipe)</div><div class='add'>+#define   MBUS_JOIN_PIPE_SELECT_NONE		MBUS_JOIN_PIPE_SELECT(7)</div><div class='add'>+#define   MBUS_TRANSLATION_THROTTLE_MIN_MASK	REG_GENMASK(15, 13)</div><div class='add'>+#define   MBUS_TRANSLATION_THROTTLE_MIN(val)	REG_FIELD_PREP(MBUS_TRANSLATION_THROTTLE_MIN_MASK, val)</div><div class='ctx'> </div><div class='ctx'> /* Watermark register definitions for SKL */</div><div class='ctx'> #define _CUR_WM_A_0		0x70140</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h b/drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h<br/>new file mode 100644<br/>index 000000000000..2b83f334b1ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h</a></div><div class='hunk'>@@ -0,0 +1,309 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2023 Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __VLV_DPIO_PHY_REGS_H__</div><div class='add'>+#define __VLV_DPIO_PHY_REGS_H__</div><div class='add'>+</div><div class='add'>+#include "intel_display_reg_defs.h"</div><div class='add'>+</div><div class='add'>+#define _VLV_CMN(dw) (0x8100 + (dw) * 4)</div><div class='add'>+#define _CHV_CMN(cl, dw) (0x8100 - (cl) * 0x80 + (dw) * 4)</div><div class='add'>+#define _VLV_PLL(ch, dw) (0x8000 + (ch) * 0x20 + (dw) * 4) /* dw 0-7,16-23 */</div><div class='add'>+#define _CHV_PLL(ch, dw) (0x8000 + (ch) * 0x180 + (dw) * 4)</div><div class='add'>+#define _VLV_REF(dw) (0x80a0 + ((dw) - 8) * 4) /* dw 8-15 */</div><div class='add'>+#define _VLV_PCS(ch, spline, dw) (0x200 + (ch) * 0x2400 + (spline) * 0x200 + (dw) * 4)</div><div class='add'>+#define _VLV_PCS_GRP(ch, dw) (0x8200 + (ch) * 0x200 + (dw) * 4)</div><div class='add'>+#define _VLV_PCS_BCAST(dw) (0xc000 + (dw) * 4)</div><div class='add'>+#define _VLV_TX(ch, lane, dw) (0x80 + (ch) * 0x2400 + (lane) * 0x200 + (dw) * 4)</div><div class='add'>+#define _VLV_TX_GRP(ch, dw) (0x8280 + (ch) * 0x200 + (dw) * 4)</div><div class='add'>+#define _VLV_TX_BCAST(dw) (0xc080 + (dw) * 4)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Per pipe/PLL DPIO regs</div><div class='add'>+ */</div><div class='add'>+#define VLV_PLL_DW3(ch)			_VLV_PLL((ch), 3)</div><div class='add'>+#define   DPIO_S1_DIV_MASK		REG_GENMASK(30, 28)</div><div class='add'>+#define   DPIO_S1_DIV(s1)		REG_FIELD_PREP(DPIO_S1_DIV_MASK, (s1))</div><div class='add'>+#define   DPIO_S1_DIV_DAC		0 /* 10, DAC 25-225M rate */</div><div class='add'>+#define   DPIO_S1_DIV_HDMIDP		1 /* 5, DAC 225-400M rate */</div><div class='add'>+#define   DPIO_S1_DIV_LVDS1		2 /* 14 */</div><div class='add'>+#define   DPIO_S1_DIV_LVDS2		3 /* 7 */</div><div class='add'>+#define   DPIO_K_DIV_MASK		REG_GENMASK(27, 24)</div><div class='add'>+#define   DPIO_K_DIV(k)			REG_FIELD_PREP(DPIO_K_DIV_MASK, (k))</div><div class='add'>+#define   DPIO_P1_DIV_MASK		REG_GENMASK(23, 21)</div><div class='add'>+#define   DPIO_P1_DIV(p1)		REG_FIELD_PREP(DPIO_P1_DIV_MASK, (p1))</div><div class='add'>+#define   DPIO_P2_DIV_MASK		REG_GENMASK(20, 16)</div><div class='add'>+#define   DPIO_P2_DIV(p2)		REG_FIELD_PREP(DPIO_P2_DIV_MASK, (p2))</div><div class='add'>+#define   DPIO_N_DIV_MASK		REG_GENMASK(15, 12)</div><div class='add'>+#define   DPIO_N_DIV(n)			REG_FIELD_PREP(DPIO_N_DIV_MASK, (n))</div><div class='add'>+#define   DPIO_ENABLE_CALIBRATION	REG_BIT(11)</div><div class='add'>+#define   DPIO_M1_DIV_MASK		REG_GENMASK(10, 8)</div><div class='add'>+#define   DPIO_M1_DIV(m1)		REG_FIELD_PREP(DPIO_M1_DIV_MASK, (m1))</div><div class='add'>+#define   DPIO_M2_DIV_MASK		REG_GENMASK(7, 0)</div><div class='add'>+#define   DPIO_M2_DIV(m2)		REG_FIELD_PREP(DPIO_M2_DIV_MASK, (m2))</div><div class='add'>+</div><div class='add'>+#define VLV_PLL_DW5(ch)			_VLV_PLL((ch), 5)</div><div class='add'>+#define   DPIO_REFSEL_OVERRIDE		REG_BIT(27)</div><div class='add'>+#define   DPIO_PLL_MODESEL_MASK		REG_GENMASK(26, 24)</div><div class='add'>+#define   DPIO_BIAS_CURRENT_CTL_MASK	REG_GENMASK(22, 20) /* always 0x7 */</div><div class='add'>+#define   DPIO_PLL_REFCLK_SEL_MASK	REG_GENMASK(17, 16)</div><div class='add'>+#define   DPIO_DRIVER_CTL_MASK		REG_GENMASK(15, 12) /* always set to 0x8 */</div><div class='add'>+#define   DPIO_CLK_BIAS_CTL_MASK	REG_GENMASK(11, 8) /* always set to 0x5 */</div><div class='add'>+</div><div class='add'>+#define VLV_PLL_DW7(ch)			_VLV_PLL((ch), 7)</div><div class='add'>+</div><div class='add'>+#define VLV_PLL_DW16(ch)		_VLV_PLL((ch), 16)</div><div class='add'>+</div><div class='add'>+#define VLV_PLL_DW17(ch)		_VLV_PLL((ch), 17)</div><div class='add'>+</div><div class='add'>+#define VLV_PLL_DW18(ch)		_VLV_PLL((ch), 18)</div><div class='add'>+</div><div class='add'>+#define VLV_PLL_DW19(ch)		_VLV_PLL((ch), 19)</div><div class='add'>+</div><div class='add'>+#define VLV_REF_DW11			_VLV_REF(11)</div><div class='add'>+</div><div class='add'>+#define VLV_CMN_DW0			_VLV_CMN(0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Per DDI channel DPIO regs</div><div class='add'>+ */</div><div class='add'>+#define VLV_PCS_DW0_GRP(ch)		_VLV_PCS_GRP((ch), 0)</div><div class='add'>+#define VLV_PCS01_DW0(ch)		_VLV_PCS((ch), 0, 0)</div><div class='add'>+#define VLV_PCS23_DW0(ch)		_VLV_PCS((ch), 1, 0)</div><div class='add'>+#define   DPIO_PCS_TX_LANE2_RESET	REG_BIT(16)</div><div class='add'>+#define   DPIO_PCS_TX_LANE1_RESET	REG_BIT(7)</div><div class='add'>+#define   DPIO_LEFT_TXFIFO_RST_MASTER2	REG_BIT(4)</div><div class='add'>+#define   DPIO_RIGHT_TXFIFO_RST_MASTER2	REG_BIT(3)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW1_GRP(ch)		 _VLV_PCS_GRP((ch), 1)</div><div class='add'>+#define VLV_PCS01_DW1(ch) _VLV_PCS((ch), 0, 1)</div><div class='add'>+#define VLV_PCS23_DW1(ch) _VLV_PCS((ch), 1, 1)</div><div class='add'>+#define   CHV_PCS_REQ_SOFTRESET_EN		REG_BIT(23)</div><div class='add'>+#define   DPIO_PCS_CLK_CRI_RXEB_EIOS_EN		REG_BIT(22)</div><div class='add'>+#define   DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN	REG_BIT(21)</div><div class='add'>+#define   DPIO_PCS_CLK_DATAWIDTH_MASK		REG_GENMASK(7, 6)</div><div class='add'>+#define   DPIO_PCS_CLK_DATAWIDTH_8_10		REG_FIELD_PREP(DPIO_PCS_CLK_DATAWIDTH_MASK, 1)</div><div class='add'>+#define   DPIO_PCS_CLK_DATAWIDTH_16_20		REG_FIELD_PREP(DPIO_PCS_CLK_DATAWIDTH_MASK, 2)</div><div class='add'>+#define   DPIO_PCS_CLK_DATAWIDTH_32_40		REG_FIELD_PREP(DPIO_PCS_CLK_DATAWIDTH_MASK, 3)</div><div class='add'>+#define   DPIO_PCS_CLK_SOFT_RESET		REG_BIT(5)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW8_GRP(ch)		_VLV_PCS_GRP((ch), 8)</div><div class='add'>+#define VLV_PCS01_DW8(ch)		_VLV_PCS((ch), 0, 8)</div><div class='add'>+#define VLV_PCS23_DW8(ch)		_VLV_PCS((ch), 1, 8)</div><div class='add'>+#define   DPIO_PCS_USEDCLKCHANNEL		REG_BIT(21)</div><div class='add'>+#define   DPIO_PCS_USEDCLKCHANNEL_OVRRIDE	REG_BIT(20)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW9_GRP(ch)		_VLV_PCS_GRP((ch), 9)</div><div class='add'>+#define VLV_PCS01_DW9(ch)		_VLV_PCS((ch), 0, 9)</div><div class='add'>+#define VLV_PCS23_DW9(ch)		_VLV_PCS((ch), 1, 9)</div><div class='add'>+#define   DPIO_PCS_TX2MARGIN_MASK	REG_GENMASK(15, 13)</div><div class='add'>+#define   DPIO_PCS_TX2MARGIN_000	REG_FIELD_PREP(DPIO_PCS_TX2MARGIN_MASK, 0)</div><div class='add'>+#define   DPIO_PCS_TX2MARGIN_101	REG_FIELD_PREP(DPIO_PCS_TX2MARGIN_MASK, 1)</div><div class='add'>+#define   DPIO_PCS_TX1MARGIN_MASK	REG_GENMASK(12, 10)</div><div class='add'>+#define   DPIO_PCS_TX1MARGIN_000	REG_FIELD_PREP(DPIO_PCS_TX1MARGIN_MASK, 0)</div><div class='add'>+#define   DPIO_PCS_TX1MARGIN_101	REG_FIELD_PREP(DPIO_PCS_TX1MARGIN_MASK, 1)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW10_GRP(ch)		_VLV_PCS_GRP((ch), 10)</div><div class='add'>+#define VLV_PCS01_DW10(ch)		_VLV_PCS((ch), 0, 10)</div><div class='add'>+#define VLV_PCS23_DW10(ch)		_VLV_PCS((ch), 1, 10)</div><div class='add'>+#define   DPIO_PCS_SWING_CALC_TX1_TX3	REG_BIT(31)</div><div class='add'>+#define   DPIO_PCS_SWING_CALC_TX0_TX2	REG_BIT(30)</div><div class='add'>+#define   DPIO_PCS_TX2DEEMP_MASK	REG_GENMASK(27, 24)</div><div class='add'>+#define   DPIO_PCS_TX2DEEMP_9P5		REG_FIELD_PREP(DPIO_PCS_TX2DEEMP_MASK, 0)</div><div class='add'>+#define   DPIO_PCS_TX2DEEMP_6P0		REG_FIELD_PREP(DPIO_PCS_TX2DEEMP_MASK, 2)</div><div class='add'>+#define   DPIO_PCS_TX1DEEMP_MASK	REG_GENMASK(19, 16)</div><div class='add'>+#define   DPIO_PCS_TX1DEEMP_9P5		REG_FIELD_PREP(DPIO_PCS_TX1DEEMP_MASK, 0)</div><div class='add'>+#define   DPIO_PCS_TX1DEEMP_6P0		REG_FIELD_PREP(DPIO_PCS_TX1DEEMP_MASK, 2)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW11_GRP(ch)		_VLV_PCS_GRP((ch), 11)</div><div class='add'>+#define VLV_PCS01_DW11(ch)		_VLV_PCS((ch), 0, 11)</div><div class='add'>+#define VLV_PCS23_DW11(ch)		_VLV_PCS((ch), 1, 11)</div><div class='add'>+#define   DPIO_TX2_STAGGER_MASK_MASK	REG_GENMASK(28, 24)</div><div class='add'>+#define   DPIO_TX2_STAGGER_MASK(x)	REG_FIELD_PREP(DPIO_TX2_STAGGER_MASK_MASK, (x))</div><div class='add'>+#define   DPIO_LANEDESKEW_STRAP_OVRD	REG_BIT(3)</div><div class='add'>+#define   DPIO_LEFT_TXFIFO_RST_MASTER	REG_BIT(1)</div><div class='add'>+#define   DPIO_RIGHT_TXFIFO_RST_MASTER	REG_BIT(0)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW12_GRP(ch)		_VLV_PCS_GRP((ch), 12)</div><div class='add'>+#define VLV_PCS01_DW12(ch)		_VLV_PCS((ch), 0, 12)</div><div class='add'>+#define VLV_PCS23_DW12(ch)		_VLV_PCS((ch), 1, 12)</div><div class='add'>+#define   DPIO_TX2_STAGGER_MULT_MASK	REG_GENMASK(22, 20)</div><div class='add'>+#define   DPIO_TX2_STAGGER_MULT(x)	REG_FIELD_PREP(DPIO_TX2_STAGGER_MULT_MASK, (x))</div><div class='add'>+#define   DPIO_TX1_STAGGER_MULT_MASK	REG_GENMASK(20, 16)</div><div class='add'>+#define   DPIO_TX1_STAGGER_MULT(x)	REG_FIELD_PREP(DPIO_TX1_STAGGER_MULT_MASK, (x))</div><div class='add'>+#define   DPIO_TX1_STAGGER_MASK_MASK	REG_GENMASK(12, 8)</div><div class='add'>+#define   DPIO_TX1_STAGGER_MASK(x)	REG_FIELD_PREP(DPIO_TX1_STAGGER_MASK_MASK, (x))</div><div class='add'>+#define   DPIO_LANESTAGGER_STRAP_OVRD	REG_BIT(6)</div><div class='add'>+#define   DPIO_LANESTAGGER_STRAP_MASK	REG_GENMASK(4, 0)</div><div class='add'>+#define   DPIO_LANESTAGGER_STRAP(x)	REG_FIELD_PREP(DPIO_LANESTAGGER_STRAP_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW14_GRP(ch)		_VLV_PCS_GRP((ch), 14)</div><div class='add'>+#define VLV_PCS01_DW14(ch)		_VLV_PCS((ch), 0, 14)</div><div class='add'>+#define VLV_PCS23_DW14(ch)		_VLV_PCS((ch), 1, 14)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW17_BCAST		_VLV_PCS_BCAST(17)</div><div class='add'>+#define VLV_PCS_DW17_GRP(ch)		_VLV_PCS_GRP((ch), 17)</div><div class='add'>+#define VLV_PCS01_DW17(ch)		_VLV_PCS((ch), 0, 17)</div><div class='add'>+#define VLV_PCS23_DW17(ch)		_VLV_PCS((ch), 1, 17)</div><div class='add'>+</div><div class='add'>+#define VLV_PCS_DW23_GRP(ch)		_VLV_PCS_GRP((ch), 23)</div><div class='add'>+#define VLV_PCS01_DW23(ch)		_VLV_PCS((ch), 0, 23)</div><div class='add'>+#define VLV_PCS23_DW23(ch)		_VLV_PCS((ch), 1, 23)</div><div class='add'>+</div><div class='add'>+#define VLV_TX_DW2_GRP(ch)		_VLV_TX_GRP((ch), 2)</div><div class='add'>+#define VLV_TX_DW2(ch, lane)		_VLV_TX((ch), (lane), 2)</div><div class='add'>+#define   DPIO_SWING_MARGIN000_MASK	REG_GENMASK(23, 16)</div><div class='add'>+#define   DPIO_SWING_MARGIN000(x)	REG_FIELD_PREP(DPIO_SWING_MARGIN000_MASK, (x))</div><div class='add'>+#define   DPIO_UNIQ_TRANS_SCALE_MASK	REG_GENMASK(15, 8)</div><div class='add'>+#define   DPIO_UNIQ_TRANS_SCALE(x)	REG_FIELD_PREP(DPIO_UNIQ_TRANS_SCALE_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define VLV_TX_DW3_GRP(ch)		_VLV_TX_GRP((ch), 3)</div><div class='add'>+#define VLV_TX_DW3(ch, lane)		_VLV_TX((ch), (lane), 3)</div><div class='add'>+/* The following bit for CHV phy */</div><div class='add'>+#define   DPIO_TX_UNIQ_TRANS_SCALE_EN	REG_BIT(27)</div><div class='add'>+#define   DPIO_SWING_MARGIN101_MASK	REG_GENMASK(23, 16)</div><div class='add'>+#define   DPIO_SWING_MARGIN101(x)	REG_FIELD_PREP(DPIO_SWING_MARGIN101_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define VLV_TX_DW4_GRP(ch)		_VLV_TX_GRP((ch), 4)</div><div class='add'>+#define VLV_TX_DW4(ch, lane)		_VLV_TX((ch), (lane), 4)</div><div class='add'>+#define   DPIO_SWING_DEEMPH9P5_MASK	REG_GENMASK(31, 24)</div><div class='add'>+#define   DPIO_SWING_DEEMPH9P5(x)	REG_FIELD_PREP(DPIO_SWING_DEEMPH9P5_MASK, (x))</div><div class='add'>+#define   DPIO_SWING_DEEMPH6P0_MASK	REG_GENMASK(23, 16)</div><div class='add'>+#define   DPIO_SWING_DEEMPH6P0_SHIFT	REG_FIELD_PREP(DPIO_SWING_DEEMPH6P0_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define VLV_TX_DW5_GRP(ch)		_VLV_TX_GRP((ch), 5)</div><div class='add'>+#define VLV_TX_DW5(ch, lane)		_VLV_TX((ch), (lane), 5)</div><div class='add'>+#define   DPIO_TX_OCALINIT_EN		REG_BIT(31)</div><div class='add'>+</div><div class='add'>+#define VLV_TX_DW11_GRP(ch)		_VLV_TX_GRP((ch), 11)</div><div class='add'>+#define VLV_TX_DW11(ch, lane)		_VLV_TX((ch), (lane), 11)</div><div class='add'>+</div><div class='add'>+#define VLV_TX_DW14_GRP(ch)		_VLV_TX_GRP((ch), 14)</div><div class='add'>+#define VLV_TX_DW14(ch, lane)		_VLV_TX((ch), (lane), 14)</div><div class='add'>+</div><div class='add'>+/* CHV dpPhy registers */</div><div class='add'>+#define CHV_PLL_DW0(ch)			_CHV_PLL((ch), 0)</div><div class='add'>+#define   DPIO_CHV_M2_DIV_MASK		REG_GENMASK(7, 0)</div><div class='add'>+#define   DPIO_CHV_M2_DIV(m2)		REG_FIELD_PREP(DPIO_CHV_M2_DIV_MASK, (m2))</div><div class='add'>+</div><div class='add'>+#define CHV_PLL_DW1(ch)			_CHV_PLL((ch), 1)</div><div class='add'>+#define   DPIO_CHV_N_DIV_MASK		REG_GENMASK(11, 8)</div><div class='add'>+#define   DPIO_CHV_N_DIV(n)		REG_FIELD_PREP(DPIO_CHV_N_DIV_MASK, (n))</div><div class='add'>+#define   DPIO_CHV_M1_DIV_MASK		REG_GENMASK(2, 0)</div><div class='add'>+#define   DPIO_CHV_M1_DIV(m1)		REG_FIELD_PREP(DPIO_CHV_M1_DIV_MASK, (m1))</div><div class='add'>+#define   DPIO_CHV_M1_DIV_BY_2		0</div><div class='add'>+</div><div class='add'>+#define CHV_PLL_DW2(ch)			_CHV_PLL((ch), 2)</div><div class='add'>+#define   DPIO_CHV_M2_FRAC_DIV_MASK	REG_GENMASK(21, 0)</div><div class='add'>+#define   DPIO_CHV_M2_FRAC_DIV(m2_frac)	REG_FIELD_PREP(DPIO_CHV_M2_FRAC_DIV_MASK, (m2_frac))</div><div class='add'>+</div><div class='add'>+#define CHV_PLL_DW3(ch)			_CHV_PLL((ch), 3)</div><div class='add'>+#define   DPIO_CHV_FRAC_DIV_EN		REG_BIT(16)</div><div class='add'>+#define   DPIO_CHV_SECOND_MOD		REG_BIT(8)</div><div class='add'>+#define   DPIO_CHV_FEEDFWD_GAIN_MASK	REG_GENMASK(3, 0)</div><div class='add'>+#define   DPIO_CHV_FEEDFWD_GAIN(x)	REG_FIELD_PREP(DPIO_CHV_FEEDFWD_GAIN_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define CHV_PLL_DW6(ch)			_CHV_PLL((ch), 6)</div><div class='add'>+#define   DPIO_CHV_GAIN_CTRL_MASK	REG_GENMASK(18, 16)</div><div class='add'>+#define   DPIO_CHV_GAIN_CTRL(x)		REG_FIELD_PREP(DPIO_CHV_GAIN_CTRL_MASK, (x))</div><div class='add'>+#define   DPIO_CHV_INT_COEFF_MASK	REG_GENMASK(12, 8)</div><div class='add'>+#define   DPIO_CHV_INT_COEFF(x)		REG_FIELD_PREP(DPIO_CHV_INT_COEFF_MASK, (x))</div><div class='add'>+#define   DPIO_CHV_PROP_COEFF_MASK	REG_GENMASK(3, 0)</div><div class='add'>+#define   DPIO_CHV_PROP_COEFF(x)	REG_FIELD_PREP(DPIO_CHV_PROP_COEFF_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define CHV_PLL_DW8(ch)			_CHV_PLL((ch), 8)</div><div class='add'>+#define   DPIO_CHV_TDC_TARGET_CNT_MASK	REG_GENMASK(9, 0)</div><div class='add'>+#define   DPIO_CHV_TDC_TARGET_CNT(x)	REG_FIELD_PREP(DPIO_CHV_TDC_TARGET_CNT_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define CHV_PLL_DW9(ch)			_CHV_PLL((ch), 9)</div><div class='add'>+#define   DPIO_CHV_INT_LOCK_THRESHOLD_MASK		REG_GENMASK(3, 1)</div><div class='add'>+#define   DPIO_CHV_INT_LOCK_THRESHOLD(x)		REG_FIELD_PREP(DPIO_CHV_INT_LOCK_THRESHOLD_MASK, (x))</div><div class='add'>+#define   DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE	REG_BIT(0) /* 1: coarse &amp; 0 : fine  */</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW0_CH0			_CHV_CMN(0, 0)</div><div class='add'>+#define   DPIO_ALLDL_POWERDOWN_CH0	REG_BIT(19)</div><div class='add'>+#define   DPIO_ANYDL_POWERDOWN_CH0	REG_BIT(18)</div><div class='add'>+#define   DPIO_ALLDL_POWERDOWN		BIT(1)</div><div class='add'>+#define   DPIO_ANYDL_POWERDOWN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW5_CH0			_CHV_CMN(0, 5)</div><div class='add'>+#define   CHV_BUFRIGHTENA1_MASK		REG_GENMASK(21, 20)</div><div class='add'>+#define   CHV_BUFRIGHTENA1_DISABLE	REG_FIELD_PREP(CHV_BUFRIGHTENA1_MASK, 0)</div><div class='add'>+#define   CHV_BUFRIGHTENA1_NORMAL	REG_FIELD_PREP(CHV_BUFRIGHTENA1_MASK, 1)</div><div class='add'>+#define   CHV_BUFRIGHTENA1_FORCE	REG_FIELD_PREP(CHV_BUFRIGHTENA1_MASK, 3)</div><div class='add'>+#define   CHV_BUFLEFTENA1_MASK		REG_GENMASK(23, 22)</div><div class='add'>+#define   CHV_BUFLEFTENA1_DISABLE	REG_FIELD_PREP(CHV_BUFLEFTENA1_MASK, 0)</div><div class='add'>+#define   CHV_BUFLEFTENA1_NORMAL	REG_FIELD_PREP(CHV_BUFLEFTENA1_MASK, 1)</div><div class='add'>+#define   CHV_BUFLEFTENA1_FORCE		REG_FIELD_PREP(CHV_BUFLEFTENA1_MASK, 3)</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW13_CH0		_CHV_CMN(0, 13)</div><div class='add'>+#define CHV_CMN_DW0_CH1			_CHV_CMN(1, 0)</div><div class='add'>+#define   DPIO_CHV_S1_DIV_MASK		REG_GENMASK(23, 21)</div><div class='add'>+#define   DPIO_CHV_S1_DIV(s1)		REG_FIELD_PREP(DPIO_CHV_S1_DIV_MASK, (s1))</div><div class='add'>+#define   DPIO_CHV_P1_DIV_MASK		REG_GENMASK(15, 13)</div><div class='add'>+#define   DPIO_CHV_P1_DIV(p1)		REG_FIELD_PREP(DPIO_CHV_P1_DIV_MASK, (p1))</div><div class='add'>+#define   DPIO_CHV_P2_DIV_MASK		REG_GENMASK(12, 8)</div><div class='add'>+#define   DPIO_CHV_P2_DIV(p2)		REG_FIELD_PREP(DPIO_CHV_P2_DIV_MASK, (p2))</div><div class='add'>+#define   DPIO_CHV_K_DIV_MASK		REG_GENMASK(7, 4)</div><div class='add'>+#define   DPIO_CHV_K_DIV(k)		REG_FIELD_PREP(DPIO_CHV_K_DIV_MASK, (k))</div><div class='add'>+#define   DPIO_PLL_FREQLOCK		REG_BIT(1)</div><div class='add'>+#define   DPIO_PLL_LOCK			REG_BIT(0)</div><div class='add'>+#define CHV_CMN_DW13(ch)		_PIPE(ch, CHV_CMN_DW13_CH0, CHV_CMN_DW0_CH1)</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW14_CH0		_CHV_CMN(0, 14)</div><div class='add'>+#define CHV_CMN_DW1_CH1			_CHV_CMN(1, 1)</div><div class='add'>+#define   DPIO_AFC_RECAL		REG_BIT(14)</div><div class='add'>+#define   DPIO_DCLKP_EN			REG_BIT(13)</div><div class='add'>+#define   CHV_BUFLEFTENA2_MASK		REG_GENMASK(18, 17) /* CL2 DW1 only */</div><div class='add'>+#define   CHV_BUFLEFTENA2_DISABLE	REG_FIELD_PREP(CHV_BUFLEFTENA2_MASK, 0)</div><div class='add'>+#define   CHV_BUFLEFTENA2_NORMAL	REG_FIELD_PREP(CHV_BUFLEFTENA2_MASK, 1)</div><div class='add'>+#define   CHV_BUFLEFTENA2_FORCE		REG_FIELD_PREP(CHV_BUFLEFTENA2_MASK, 3)</div><div class='add'>+#define   CHV_BUFRIGHTENA2_MASK		REG_GENMASK(20, 19) /* CL2 DW1 only */</div><div class='add'>+#define   CHV_BUFRIGHTENA2_DISABLE	REG_FIELD_PREP(CHV_BUFRIGHTENA2_MASK, 0)</div><div class='add'>+#define   CHV_BUFRIGHTENA2_NORMAL	REG_FIELD_PREP(CHV_BUFRIGHTENA2_MASK, 1)</div><div class='add'>+#define   CHV_BUFRIGHTENA2_FORCE	REG_FIELD_PREP(CHV_BUFRIGHTENA2_MASK, 3)</div><div class='add'>+#define CHV_CMN_DW14(ch)		_PIPE(ch, CHV_CMN_DW14_CH0, CHV_CMN_DW1_CH1)</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW19_CH0		_CHV_CMN(0, 19)</div><div class='add'>+#define CHV_CMN_DW6_CH1			_CHV_CMN(1, 6)</div><div class='add'>+#define   DPIO_ALLDL_POWERDOWN_CH1	REG_BIT(30) /* CL2 DW6 only */</div><div class='add'>+#define   DPIO_ANYDL_POWERDOWN_CH1	REG_BIT(29) /* CL2 DW6 only */</div><div class='add'>+#define   DPIO_DYNPWRDOWNEN_CH1		REG_BIT(28) /* CL2 DW6 only */</div><div class='add'>+#define   CHV_CMN_USEDCLKCHANNEL	REG_BIT(13)</div><div class='add'>+#define CHV_CMN_DW19(ch)		_PIPE(ch, CHV_CMN_DW19_CH0, CHV_CMN_DW6_CH1)</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW28			_CHV_CMN(0, 28)</div><div class='add'>+#define   DPIO_CL1POWERDOWNEN			REG_BIT(23)</div><div class='add'>+#define   DPIO_DYNPWRDOWNEN_CH0			REG_BIT(22)</div><div class='add'>+#define   DPIO_SUS_CLK_CONFIG_MASK		REG_GENMASK(1, 0)</div><div class='add'>+#define   DPIO_SUS_CLK_CONFIG_ON		REG_FIELD_PREP(DPIO_SUS_CLK_CONFIG_MASK, 0)</div><div class='add'>+#define   DPIO_SUS_CLK_CONFIG_CLKREQ		REG_FIELD_PREP(DPIO_SUS_CLK_CONFIG_MASK, 1)</div><div class='add'>+#define   DPIO_SUS_CLK_CONFIG_GATE		REG_FIELD_PREP(DPIO_SUS_CLK_CONFIG_MASK, 2)</div><div class='add'>+#define   DPIO_SUS_CLK_CONFIG_GATE_CLKREQ	REG_FIELD_PREP(DPIO_SUS_CLK_CONFIG_MASK, 3)</div><div class='add'>+</div><div class='add'>+#define CHV_CMN_DW30			_CHV_CMN(0, 30)</div><div class='add'>+#define   DPIO_CL2_LDOFUSE_PWRENB	REG_BIT(6)</div><div class='add'>+#define   DPIO_LRC_BYPASS		REG_BIT(3)</div><div class='add'>+</div><div class='add'>+#define CHV_TX_DW0(ch, lane)		_VLV_TX((ch), (lane), 0)</div><div class='add'>+#define CHV_TX_DW1(ch, lane)		_VLV_TX((ch), (lane), 1)</div><div class='add'>+#define CHV_TX_DW2(ch, lane)		_VLV_TX((ch), (lane), 2)</div><div class='add'>+#define CHV_TX_DW3(ch, lane)		_VLV_TX((ch), (lane), 3)</div><div class='add'>+#define CHV_TX_DW4(ch, lane)		_VLV_TX((ch), (lane), 4)</div><div class='add'>+#define CHV_TX_DW5(ch, lane)		_VLV_TX((ch), (lane), 5)</div><div class='add'>+#define CHV_TX_DW6(ch, lane)		_VLV_TX((ch), (lane), 6)</div><div class='add'>+#define CHV_TX_DW7(ch, lane)		_VLV_TX((ch), (lane), 7)</div><div class='add'>+#define CHV_TX_DW8(ch, lane)		_VLV_TX((ch), (lane), 8)</div><div class='add'>+#define CHV_TX_DW9(ch, lane)		_VLV_TX((ch), (lane), 9)</div><div class='add'>+#define CHV_TX_DW10(ch, lane)		_VLV_TX((ch), (lane), 10)</div><div class='add'>+</div><div class='add'>+#define CHV_TX_DW11(ch, lane)		_VLV_TX((ch), (lane), 11)</div><div class='add'>+#define   DPIO_FRC_LATENCY_MASK		REG_GENMASK(10, 8)</div><div class='add'>+#define   DPIO_FRC_LATENCY(x)		REG_FIELD_PREP(DPIO_FRC_LATENCY_MASK, (x))</div><div class='add'>+</div><div class='add'>+#define CHV_TX_DW14(ch, lane)		_VLV_TX((ch), (lane), 14)</div><div class='add'>+#define   DPIO_UPAR			REG_BIT(30)</div><div class='add'>+</div><div class='add'>+#endif /* __VLV_DPIO_PHY_REGS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c<br/>index 9b33b8a74d64..ee9923c7b115 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/vlv_dsi.c</a></div><div class='hunk'>@@ -85,20 +85,18 @@ enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt)</div><div class='ctx'> </div><div class='ctx'> void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port)</div><div class='ctx'> {</div><div class='del'>-	struct drm_encoder *encoder = &amp;intel_dsi-&gt;base.base;</div><div class='del'>-	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(&amp;intel_dsi-&gt;base);</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> </div><div class='ctx'> 	mask = LP_CTRL_FIFO_EMPTY | HS_CTRL_FIFO_EMPTY |</div><div class='ctx'> 		LP_DATA_FIFO_EMPTY | HS_DATA_FIFO_EMPTY;</div><div class='ctx'> </div><div class='del'>-	if (intel_de_wait_for_set(dev_priv, MIPI_GEN_FIFO_STAT(port),</div><div class='add'>+	if (intel_de_wait_for_set(display, MIPI_GEN_FIFO_STAT(display, port),</div><div class='ctx'> 				  mask, 100))</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm, "DPI FIFOs are not empty\n");</div><div class='add'>+		drm_err(display-&gt;drm, "DPI FIFOs are not empty\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void write_data(struct drm_i915_private *dev_priv,</div><div class='add'>+static void write_data(struct intel_display *display,</div><div class='ctx'> 		       i915_reg_t reg,</div><div class='ctx'> 		       const u8 *data, u32 len)</div><div class='ctx'> {</div><div class='hunk'>@@ -110,18 +108,18 @@ static void write_data(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		for (j = 0; j &lt; min_t(u32, len - i, 4); j++)</div><div class='ctx'> 			val |= *data++ &lt;&lt; 8 * j;</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, reg, val);</div><div class='add'>+		intel_de_write(display, reg, val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void read_data(struct drm_i915_private *dev_priv,</div><div class='add'>+static void read_data(struct intel_display *display,</div><div class='ctx'> 		      i915_reg_t reg,</div><div class='ctx'> 		      u8 *data, u32 len)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i, j;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i += 4) {</div><div class='del'>-		u32 val = intel_de_read(dev_priv, reg);</div><div class='add'>+		u32 val = intel_de_read(display, reg);</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; min_t(u32, len - i, 4); j++)</div><div class='ctx'> 			*data++ = val &gt;&gt; 8 * j;</div><div class='hunk'>@@ -132,8 +130,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,</div><div class='ctx'> 				       const struct mipi_dsi_msg *msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_dsi_host *intel_dsi_host = to_intel_dsi_host(host);</div><div class='del'>-	struct drm_device *dev = intel_dsi_host-&gt;intel_dsi-&gt;base.base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_dsi *intel_dsi = intel_dsi_host-&gt;intel_dsi;</div><div class='add'>+	struct intel_display *display = to_intel_display(&amp;intel_dsi-&gt;base);</div><div class='ctx'> 	enum port port = intel_dsi_host-&gt;port;</div><div class='ctx'> 	struct mipi_dsi_packet packet;</div><div class='ctx'> 	ssize_t ret;</div><div class='hunk'>@@ -148,51 +146,51 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,</div><div class='ctx'> 	header = packet.header;</div><div class='ctx'> </div><div class='ctx'> 	if (msg-&gt;flags &amp; MIPI_DSI_MSG_USE_LPM) {</div><div class='del'>-		data_reg = MIPI_LP_GEN_DATA(port);</div><div class='add'>+		data_reg = MIPI_LP_GEN_DATA(display, port);</div><div class='ctx'> 		data_mask = LP_DATA_FIFO_FULL;</div><div class='del'>-		ctrl_reg = MIPI_LP_GEN_CTRL(port);</div><div class='add'>+		ctrl_reg = MIPI_LP_GEN_CTRL(display, port);</div><div class='ctx'> 		ctrl_mask = LP_CTRL_FIFO_FULL;</div><div class='ctx'> 	} else {</div><div class='del'>-		data_reg = MIPI_HS_GEN_DATA(port);</div><div class='add'>+		data_reg = MIPI_HS_GEN_DATA(display, port);</div><div class='ctx'> 		data_mask = HS_DATA_FIFO_FULL;</div><div class='del'>-		ctrl_reg = MIPI_HS_GEN_CTRL(port);</div><div class='add'>+		ctrl_reg = MIPI_HS_GEN_CTRL(display, port);</div><div class='ctx'> 		ctrl_mask = HS_CTRL_FIFO_FULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* note: this is never true for reads */</div><div class='ctx'> 	if (packet.payload_length) {</div><div class='del'>-		if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port),</div><div class='add'>+		if (intel_de_wait_for_clear(display, MIPI_GEN_FIFO_STAT(display, port),</div><div class='ctx'> 					    data_mask, 50))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+			drm_err(display-&gt;drm,</div><div class='ctx'> 				"Timeout waiting for HS/LP DATA FIFO !full\n");</div><div class='ctx'> </div><div class='del'>-		write_data(dev_priv, data_reg, packet.payload,</div><div class='add'>+		write_data(display, data_reg, packet.payload,</div><div class='ctx'> 			   packet.payload_length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (msg-&gt;rx_len) {</div><div class='del'>-		intel_de_write(dev_priv, MIPI_INTR_STAT(port),</div><div class='add'>+		intel_de_write(display, MIPI_INTR_STAT(display, port),</div><div class='ctx'> 			       GEN_READ_DATA_AVAIL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port),</div><div class='add'>+	if (intel_de_wait_for_clear(display, MIPI_GEN_FIFO_STAT(display, port),</div><div class='ctx'> 				    ctrl_mask, 50)) {</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+		drm_err(display-&gt;drm,</div><div class='ctx'> 			"Timeout waiting for HS/LP CTRL FIFO !full\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, ctrl_reg,</div><div class='add'>+	intel_de_write(display, ctrl_reg,</div><div class='ctx'> 		       header[2] &lt;&lt; 16 | header[1] &lt;&lt; 8 | header[0]);</div><div class='ctx'> </div><div class='ctx'> 	/* -&gt;rx_len is set only for reads */</div><div class='ctx'> 	if (msg-&gt;rx_len) {</div><div class='ctx'> 		data_mask = GEN_READ_DATA_AVAIL;</div><div class='del'>-		if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port),</div><div class='add'>+		if (intel_de_wait_for_set(display, MIPI_INTR_STAT(display, port),</div><div class='ctx'> 					  data_mask, 50))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+			drm_err(display-&gt;drm,</div><div class='ctx'> 				"Timeout waiting for read data.\n");</div><div class='ctx'> </div><div class='del'>-		read_data(dev_priv, data_reg, msg-&gt;rx_buf, msg-&gt;rx_len);</div><div class='add'>+		read_data(display, data_reg, msg-&gt;rx_buf, msg-&gt;rx_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* XXX: fix for reads and writes */</div><div class='hunk'>@@ -225,9 +223,7 @@ static const struct mipi_dsi_host_ops intel_dsi_host_ops = {</div><div class='ctx'> static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs,</div><div class='ctx'> 			enum port port)</div><div class='ctx'> {</div><div class='del'>-	struct drm_encoder *encoder = &amp;intel_dsi-&gt;base.base;</div><div class='del'>-	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(&amp;intel_dsi-&gt;base);</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> </div><div class='ctx'> 	/* XXX: pipe, hs */</div><div class='hunk'>@@ -237,18 +233,18 @@ static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs,</div><div class='ctx'> 		cmd |= DPI_LP_MODE;</div><div class='ctx'> </div><div class='ctx'> 	/* clear bit */</div><div class='del'>-	intel_de_write(dev_priv, MIPI_INTR_STAT(port), SPL_PKT_SENT_INTERRUPT);</div><div class='add'>+	intel_de_write(display, MIPI_INTR_STAT(display, port), SPL_PKT_SENT_INTERRUPT);</div><div class='ctx'> </div><div class='ctx'> 	/* XXX: old code skips write if control unchanged */</div><div class='del'>-	if (cmd == intel_de_read(dev_priv, MIPI_DPI_CONTROL(port)))</div><div class='del'>-		drm_dbg_kms(&amp;dev_priv-&gt;drm,</div><div class='add'>+	if (cmd == intel_de_read(display, MIPI_DPI_CONTROL(display, port)))</div><div class='add'>+		drm_dbg_kms(display-&gt;drm,</div><div class='ctx'> 			    "Same special packet %02x twice in a row.\n", cmd);</div><div class='ctx'> </div><div class='del'>-	intel_de_write(dev_priv, MIPI_DPI_CONTROL(port), cmd);</div><div class='add'>+	intel_de_write(display, MIPI_DPI_CONTROL(display, port), cmd);</div><div class='ctx'> </div><div class='ctx'> 	mask = SPL_PKT_SENT_INTERRUPT;</div><div class='del'>-	if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port), mask, 100))</div><div class='del'>-		drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+	if (intel_de_wait_for_set(display, MIPI_INTR_STAT(display, port), mask, 100))</div><div class='add'>+		drm_err(display-&gt;drm,</div><div class='ctx'> 			"Video mode command 0x%08x send failed.\n", cmd);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -273,8 +269,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> 				    struct drm_connector_state *conn_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='del'>-	struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,</div><div class='del'>-						   base);</div><div class='add'>+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	struct intel_connector *intel_connector = intel_dsi-&gt;attached_connector;</div><div class='ctx'> 	struct drm_display_mode *adjusted_mode = &amp;pipe_config-&gt;hw.adjusted_mode;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -329,7 +324,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> static bool glk_dsi_enable_io(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	bool cold_boot = false;</div><div class='hunk'>@@ -339,29 +334,30 @@ static bool glk_dsi_enable_io(struct intel_encoder *encoder)</div><div class='ctx'> 	 * Power ON MIPI IO first and then write into IO reset and LP wake bits</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports)</div><div class='del'>-		intel_de_rmw(dev_priv, MIPI_CTRL(port), 0, GLK_MIPIIO_ENABLE);</div><div class='add'>+		intel_de_rmw(display, MIPI_CTRL(display, port), 0, GLK_MIPIIO_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* Put the IO into reset */</div><div class='del'>-	intel_de_rmw(dev_priv, MIPI_CTRL(PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);</div><div class='add'>+	intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Program LP Wake */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		u32 tmp = intel_de_read(dev_priv, MIPI_DEVICE_READY(port));</div><div class='del'>-		intel_de_rmw(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		u32 tmp = intel_de_read(display, MIPI_DEVICE_READY(display, port));</div><div class='add'>+</div><div class='add'>+		intel_de_rmw(display, MIPI_CTRL(display, port),</div><div class='ctx'> 			     GLK_LP_WAKE, (tmp &amp; DEVICE_READY) ? GLK_LP_WAKE : 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for Pwr ACK */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_set(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					  GLK_MIPIIO_PORT_POWERED, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm, "MIPIO port is powergated\n");</div><div class='add'>+			drm_err(display-&gt;drm, "MIPIO port is powergated\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check for cold boot scenario */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='ctx'> 		cold_boot |=</div><div class='del'>-			!(intel_de_read(dev_priv, MIPI_DEVICE_READY(port)) &amp; DEVICE_READY);</div><div class='add'>+			!(intel_de_read(display, MIPI_DEVICE_READY(display, port)) &amp; DEVICE_READY);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return cold_boot;</div><div class='hunk'>@@ -369,99 +365,100 @@ static bool glk_dsi_enable_io(struct intel_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> static void glk_dsi_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for MIPI PHY status bit to set */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_set(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					  GLK_PHY_STATUS_PORT_READY, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm, "PHY is not ON\n");</div><div class='add'>+			drm_err(display-&gt;drm, "PHY is not ON\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get IO out of reset */</div><div class='del'>-	intel_de_rmw(dev_priv, MIPI_CTRL(PORT_A), 0, GLK_MIPIIO_RESET_RELEASED);</div><div class='add'>+	intel_de_rmw(display, MIPI_CTRL(display, PORT_A), 0, GLK_MIPIIO_RESET_RELEASED);</div><div class='ctx'> </div><div class='ctx'> 	/* Get IO out of Low power state*/</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (!(intel_de_read(dev_priv, MIPI_DEVICE_READY(port)) &amp; DEVICE_READY)) {</div><div class='del'>-			intel_de_rmw(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		if (!(intel_de_read(display, MIPI_DEVICE_READY(display, port)) &amp; DEVICE_READY)) {</div><div class='add'>+			intel_de_rmw(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 				     ULPS_STATE_MASK, DEVICE_READY);</div><div class='ctx'> 			usleep_range(10, 15);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Enter ULPS */</div><div class='del'>-			intel_de_rmw(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+			intel_de_rmw(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 				     ULPS_STATE_MASK, ULPS_STATE_ENTER | DEVICE_READY);</div><div class='ctx'> </div><div class='ctx'> 			/* Wait for ULPS active */</div><div class='del'>-			if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),</div><div class='add'>+			if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),</div><div class='ctx'> 						    GLK_ULPS_NOT_ACTIVE, 20))</div><div class='del'>-				drm_err(&amp;dev_priv-&gt;drm, "ULPS not active\n");</div><div class='add'>+				drm_err(display-&gt;drm, "ULPS not active\n");</div><div class='ctx'> </div><div class='ctx'> 			/* Exit ULPS */</div><div class='del'>-			intel_de_rmw(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+			intel_de_rmw(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 				     ULPS_STATE_MASK, ULPS_STATE_EXIT | DEVICE_READY);</div><div class='ctx'> </div><div class='ctx'> 			/* Enter Normal Mode */</div><div class='del'>-			intel_de_rmw(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+			intel_de_rmw(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 				     ULPS_STATE_MASK,</div><div class='ctx'> 				     ULPS_STATE_NORMAL_OPERATION | DEVICE_READY);</div><div class='ctx'> </div><div class='del'>-			intel_de_rmw(dev_priv, MIPI_CTRL(port), GLK_LP_WAKE, 0);</div><div class='add'>+			intel_de_rmw(display, MIPI_CTRL(display, port), GLK_LP_WAKE, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for Stop state */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_set(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					  GLK_DATA_LANE_STOP_STATE, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+			drm_err(display-&gt;drm,</div><div class='ctx'> 				"Date lane not in STOP state\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for AFE LATCH */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_set(dev_priv, BXT_MIPI_PORT_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_set(display, BXT_MIPI_PORT_CTRL(port),</div><div class='ctx'> 					  AFE_LATCHOUT, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+			drm_err(display-&gt;drm,</div><div class='ctx'> 				"D-PHY not entering LP-11 state\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bxt_dsi_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Enable MIPI PHY transparent latch */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		intel_de_rmw(dev_priv, BXT_MIPI_PORT_CTRL(port), 0, LP_OUTPUT_HOLD);</div><div class='add'>+		intel_de_rmw(display, BXT_MIPI_PORT_CTRL(port), 0, LP_OUTPUT_HOLD);</div><div class='ctx'> 		usleep_range(2000, 2500);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear ULPS and set device ready */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		val = intel_de_read(dev_priv, MIPI_DEVICE_READY(port));</div><div class='add'>+		val = intel_de_read(display, MIPI_DEVICE_READY(display, port));</div><div class='ctx'> 		val &amp;= ~ULPS_STATE_MASK;</div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port), val);</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port), val);</div><div class='ctx'> 		usleep_range(2000, 2500);</div><div class='ctx'> 		val |= DEVICE_READY;</div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port), val);</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port), val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vlv_dsi_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "\n");</div><div class='ctx'> </div><div class='ctx'> 	vlv_flisdsi_get(dev_priv);</div><div class='ctx'> 	/* program rcomp for compliance, reduce from 50 ohms to 45 ohms</div><div class='hunk'>@@ -474,7 +471,7 @@ static void vlv_dsi_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			       ULPS_STATE_ENTER);</div><div class='ctx'> 		usleep_range(2500, 3000);</div><div class='ctx'> </div><div class='hunk'>@@ -482,14 +479,14 @@ static void vlv_dsi_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> 		 * Common bit for both MIPI Port A &amp; MIPI Port C</div><div class='ctx'> 		 * No similar bit in MIPI Port C reg</div><div class='ctx'> 		 */</div><div class='del'>-		intel_de_rmw(dev_priv, MIPI_PORT_CTRL(PORT_A), 0, LP_OUTPUT_HOLD);</div><div class='add'>+		intel_de_rmw(display, VLV_MIPI_PORT_CTRL(PORT_A), 0, LP_OUTPUT_HOLD);</div><div class='ctx'> 		usleep_range(1000, 1500);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			       ULPS_STATE_EXIT);</div><div class='ctx'> 		usleep_range(2500, 3000);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			       DEVICE_READY);</div><div class='ctx'> 		usleep_range(2500, 3000);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -509,50 +506,50 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> static void glk_dsi_enter_low_power_mode(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='ctx'> 	/* Enter ULPS */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports)</div><div class='del'>-		intel_de_rmw(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_rmw(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			     ULPS_STATE_MASK, ULPS_STATE_ENTER | DEVICE_READY);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for MIPI PHY status bit to unset */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					    GLK_PHY_STATUS_PORT_READY, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm, "PHY is not turning OFF\n");</div><div class='add'>+			drm_err(display-&gt;drm, "PHY is not turning OFF\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for Pwr ACK bit to unset */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					    GLK_MIPIIO_PORT_POWERED, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm,</div><div class='add'>+			drm_err(display-&gt;drm,</div><div class='ctx'> 				"MIPI IO Port is not powergated\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void glk_dsi_disable_mipi_io(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='ctx'> 	/* Put the IO into reset */</div><div class='del'>-	intel_de_rmw(dev_priv, MIPI_CTRL(PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);</div><div class='add'>+	intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for MIPI PHY status bit to unset */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),</div><div class='add'>+		if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					    GLK_PHY_STATUS_PORT_READY, 20))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm, "PHY is not turning OFF\n");</div><div class='add'>+			drm_err(display-&gt;drm, "PHY is not turning OFF\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear MIPI mode */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports)</div><div class='del'>-		intel_de_rmw(dev_priv, MIPI_CTRL(port), GLK_MIPIIO_ENABLE, 0);</div><div class='add'>+		intel_de_rmw(display, MIPI_CTRL(display, port), GLK_MIPIIO_ENABLE, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void glk_dsi_clear_device_ready(struct intel_encoder *encoder)</div><div class='hunk'>@@ -564,30 +561,31 @@ static void glk_dsi_clear_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> static i915_reg_t port_ctrl_reg(struct drm_i915_private *i915, enum port port)</div><div class='ctx'> {</div><div class='ctx'> 	return IS_GEMINILAKE(i915) || IS_BROXTON(i915) ?</div><div class='del'>-		BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);</div><div class='add'>+		BXT_MIPI_PORT_CTRL(port) : VLV_MIPI_PORT_CTRL(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "\n");</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='ctx'> 		/* Common bit for both MIPI Port A &amp; MIPI Port C on VLV/CHV */</div><div class='ctx'> 		i915_reg_t port_ctrl = IS_BROXTON(dev_priv) ?</div><div class='del'>-			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(PORT_A);</div><div class='add'>+			BXT_MIPI_PORT_CTRL(port) : VLV_MIPI_PORT_CTRL(PORT_A);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			       DEVICE_READY | ULPS_STATE_ENTER);</div><div class='ctx'> 		usleep_range(2000, 2500);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			       DEVICE_READY | ULPS_STATE_EXIT);</div><div class='ctx'> 		usleep_range(2000, 2500);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port),</div><div class='ctx'> 			       DEVICE_READY | ULPS_STATE_ENTER);</div><div class='ctx'> 		usleep_range(2000, 2500);</div><div class='ctx'> </div><div class='hunk'>@@ -596,15 +594,15 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> 		 * Port A only. MIPI Port C has no similar bit for checking.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if ((IS_BROXTON(dev_priv) || port == PORT_A) &amp;&amp;</div><div class='del'>-		    intel_de_wait_for_clear(dev_priv, port_ctrl,</div><div class='add'>+		    intel_de_wait_for_clear(display, port_ctrl,</div><div class='ctx'> 					    AFE_LATCHOUT, 30))</div><div class='del'>-			drm_err(&amp;dev_priv-&gt;drm, "DSI LP not going Low\n");</div><div class='add'>+			drm_err(display-&gt;drm, "DSI LP not going Low\n");</div><div class='ctx'> </div><div class='ctx'> 		/* Disable MIPI PHY transparent latch */</div><div class='del'>-		intel_de_rmw(dev_priv, port_ctrl, LP_OUTPUT_HOLD, 0);</div><div class='add'>+		intel_de_rmw(display, port_ctrl, LP_OUTPUT_HOLD, 0);</div><div class='ctx'> 		usleep_range(1000, 1500);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port), 0x00);</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port), 0x00);</div><div class='ctx'> 		usleep_range(2000, 2500);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -612,6 +610,7 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)</div><div class='ctx'> static void intel_dsi_port_enable(struct intel_encoder *encoder,</div><div class='ctx'> 				  const struct intel_crtc_state *crtc_state)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(crtc_state-&gt;uapi.crtc);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='hunk'>@@ -622,11 +621,11 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 		if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {</div><div class='ctx'> 			for_each_dsi_port(port, intel_dsi-&gt;ports)</div><div class='del'>-				intel_de_rmw(dev_priv, MIPI_CTRL(port),</div><div class='add'>+				intel_de_rmw(display, MIPI_CTRL(display, port),</div><div class='ctx'> 					     BXT_PIXEL_OVERLAP_CNT_MASK,</div><div class='ctx'> 					     temp &lt;&lt; BXT_PIXEL_OVERLAP_CNT_SHIFT);</div><div class='ctx'> 		} else {</div><div class='del'>-			intel_de_rmw(dev_priv, VLV_CHICKEN_3,</div><div class='add'>+			intel_de_rmw(display, VLV_CHICKEN_3,</div><div class='ctx'> 				     PIXEL_OVERLAP_CNT_MASK,</div><div class='ctx'> 				     temp &lt;&lt; PIXEL_OVERLAP_CNT_SHIFT);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -636,7 +635,7 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder,</div><div class='ctx'> 		i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);</div><div class='ctx'> 		u32 temp;</div><div class='ctx'> </div><div class='del'>-		temp = intel_de_read(dev_priv, port_ctrl);</div><div class='add'>+		temp = intel_de_read(display, port_ctrl);</div><div class='ctx'> </div><div class='ctx'> 		temp &amp;= ~LANE_CONFIGURATION_MASK;</div><div class='ctx'> 		temp &amp;= ~DUAL_LINK_MODE_MASK;</div><div class='hunk'>@@ -656,15 +655,15 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder,</div><div class='ctx'> 			temp |= DITHERING_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 		/* assert ip_tg_enable signal */</div><div class='del'>-		intel_de_write(dev_priv, port_ctrl, temp | DPI_ENABLE);</div><div class='del'>-		intel_de_posting_read(dev_priv, port_ctrl);</div><div class='add'>+		intel_de_write(display, port_ctrl, temp | DPI_ENABLE);</div><div class='add'>+		intel_de_posting_read(display, port_ctrl);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_dsi_port_disable(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = encoder-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='hunk'>@@ -672,11 +671,12 @@ static void intel_dsi_port_disable(struct intel_encoder *encoder)</div><div class='ctx'> 		i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);</div><div class='ctx'> </div><div class='ctx'> 		/* de-assert ip_tg_enable signal */</div><div class='del'>-		intel_de_rmw(dev_priv, port_ctrl, DPI_ENABLE, 0);</div><div class='del'>-		intel_de_posting_read(dev_priv, port_ctrl);</div><div class='add'>+		intel_de_rmw(display, port_ctrl, DPI_ENABLE, 0);</div><div class='add'>+		intel_de_posting_read(display, port_ctrl);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='add'>+</div><div class='add'>+static void intel_dsi_prepare(struct intel_encoder *encoder,</div><div class='ctx'> 			      const struct intel_crtc_state *pipe_config);</div><div class='ctx'> static void intel_dsi_unprepare(struct intel_encoder *encoder);</div><div class='ctx'> </div><div class='hunk'>@@ -726,6 +726,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,</div><div class='ctx'> 				 const struct intel_crtc_state *pipe_config,</div><div class='ctx'> 				 const struct drm_connector_state *conn_state)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(pipe_config-&gt;uapi.crtc);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(crtc-&gt;base.dev);</div><div class='hunk'>@@ -733,7 +734,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	bool glk_cold_boot = false;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "\n");</div><div class='ctx'> </div><div class='ctx'> 	intel_dsi_wait_panel_power_cycle(intel_dsi);</div><div class='ctx'> </div><div class='hunk'>@@ -753,16 +754,16 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_BROXTON(dev_priv)) {</div><div class='ctx'> 		/* Add MIPI IO reset programming for modeset */</div><div class='del'>-		intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, 0, MIPIO_RST_CTRL);</div><div class='add'>+		intel_de_rmw(display, BXT_P_CR_GT_DISP_PWRON, 0, MIPIO_RST_CTRL);</div><div class='ctx'> </div><div class='ctx'> 		/* Power up DSI regulator */</div><div class='del'>-		intel_de_write(dev_priv, BXT_P_DSI_REGULATOR_CFG, STAP_SELECT);</div><div class='del'>-		intel_de_write(dev_priv, BXT_P_DSI_REGULATOR_TX_CTRL, 0);</div><div class='add'>+		intel_de_write(display, BXT_P_DSI_REGULATOR_CFG, STAP_SELECT);</div><div class='add'>+		intel_de_write(display, BXT_P_DSI_REGULATOR_TX_CTRL, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {</div><div class='ctx'> 		/* Disable DPOunit clock gating, can stall pipe */</div><div class='del'>-		intel_de_rmw(dev_priv, DSPCLK_GATE_D(dev_priv),</div><div class='add'>+		intel_de_rmw(display, DSPCLK_GATE_D(dev_priv),</div><div class='ctx'> 			     0, DPOUNIT_CLOCK_GATE_DISABLE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -798,8 +799,8 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (is_cmd_mode(intel_dsi)) {</div><div class='ctx'> 		for_each_dsi_port(port, intel_dsi-&gt;ports)</div><div class='del'>-			intel_de_write(dev_priv,</div><div class='del'>-				       MIPI_MAX_RETURN_PKT_SIZE(port), 8 * 4);</div><div class='add'>+			intel_de_write(display,</div><div class='add'>+				       MIPI_MAX_RETURN_PKT_SIZE(display, port), 8 * 4);</div><div class='ctx'> 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_TEAR_ON);</div><div class='ctx'> 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -871,11 +872,12 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state,</div><div class='ctx'> 				   const struct intel_crtc_state *old_crtc_state,</div><div class='ctx'> 				   const struct drm_connector_state *old_conn_state)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "\n");</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {</div><div class='ctx'> 		intel_crtc_vblank_off(old_crtc_state);</div><div class='hunk'>@@ -906,12 +908,12 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_BROXTON(dev_priv)) {</div><div class='ctx'> 		/* Power down DSI regulator to save power */</div><div class='del'>-		intel_de_write(dev_priv, BXT_P_DSI_REGULATOR_CFG, STAP_SELECT);</div><div class='del'>-		intel_de_write(dev_priv, BXT_P_DSI_REGULATOR_TX_CTRL,</div><div class='add'>+		intel_de_write(display, BXT_P_DSI_REGULATOR_CFG, STAP_SELECT);</div><div class='add'>+		intel_de_write(display, BXT_P_DSI_REGULATOR_TX_CTRL,</div><div class='ctx'> 			       HS_IO_CTRL_SELECT);</div><div class='ctx'> </div><div class='ctx'> 		/* Add MIPI IO reset programming for modeset */</div><div class='del'>-		intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, MIPIO_RST_CTRL, 0);</div><div class='add'>+		intel_de_rmw(display, BXT_P_CR_GT_DISP_PWRON, MIPIO_RST_CTRL, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {</div><div class='hunk'>@@ -919,7 +921,7 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vlv_dsi_pll_disable(encoder);</div><div class='ctx'> </div><div class='del'>-		intel_de_rmw(dev_priv, DSPCLK_GATE_D(dev_priv),</div><div class='add'>+		intel_de_rmw(display, DSPCLK_GATE_D(dev_priv),</div><div class='ctx'> 			     DPOUNIT_CLOCK_GATE_DISABLE, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -935,13 +937,14 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state,</div><div class='ctx'> static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 				   enum pipe *pipe)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	bool active = false;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "\n");</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "\n");</div><div class='ctx'> </div><div class='ctx'> 	wakeref = intel_display_power_get_if_enabled(dev_priv,</div><div class='ctx'> 						     encoder-&gt;power_domain);</div><div class='hunk'>@@ -960,7 +963,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 	/* XXX: this only works for one DSI output */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='ctx'> 		i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);</div><div class='del'>-		bool enabled = intel_de_read(dev_priv, port_ctrl) &amp; DPI_ENABLE;</div><div class='add'>+		bool enabled = intel_de_read(display, port_ctrl) &amp; DPI_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Due to some hardware limitations on VLV/CHV, the DPI enable</div><div class='hunk'>@@ -969,27 +972,27 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &amp;&amp;</div><div class='ctx'> 		    port == PORT_C)</div><div class='del'>-			enabled = intel_de_read(dev_priv, TRANSCONF(PIPE_B)) &amp; TRANSCONF_ENABLE;</div><div class='add'>+			enabled = intel_de_read(display, TRANSCONF(PIPE_B)) &amp; TRANSCONF_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 		/* Try command mode if video mode not enabled */</div><div class='ctx'> 		if (!enabled) {</div><div class='del'>-			u32 tmp = intel_de_read(dev_priv,</div><div class='del'>-						MIPI_DSI_FUNC_PRG(port));</div><div class='add'>+			u32 tmp = intel_de_read(display,</div><div class='add'>+						MIPI_DSI_FUNC_PRG(display, port));</div><div class='ctx'> 			enabled = tmp &amp; CMD_MODE_DATA_WIDTH_MASK;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!enabled)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!(intel_de_read(dev_priv, MIPI_DEVICE_READY(port)) &amp; DEVICE_READY))</div><div class='add'>+		if (!(intel_de_read(display, MIPI_DEVICE_READY(display, port)) &amp; DEVICE_READY))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {</div><div class='del'>-			u32 tmp = intel_de_read(dev_priv, MIPI_CTRL(port));</div><div class='add'>+			u32 tmp = intel_de_read(display, MIPI_CTRL(display, port));</div><div class='ctx'> 			tmp &amp;= BXT_PIPE_SELECT_MASK;</div><div class='ctx'> 			tmp &gt;&gt;= BXT_PIPE_SELECT_SHIFT;</div><div class='ctx'> </div><div class='del'>-			if (drm_WARN_ON(&amp;dev_priv-&gt;drm, tmp &gt; PIPE_C))</div><div class='add'>+			if (drm_WARN_ON(display-&gt;drm, tmp &gt; PIPE_C))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			*pipe = tmp;</div><div class='hunk'>@@ -1010,8 +1013,7 @@ out_put_power:</div><div class='ctx'> static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,</div><div class='ctx'> 				    struct intel_crtc_state *pipe_config)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = encoder-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_display_mode *adjusted_mode =</div><div class='ctx'> 					&amp;pipe_config-&gt;hw.adjusted_mode;</div><div class='ctx'> 	struct drm_display_mode *adjusted_mode_sw;</div><div class='hunk'>@@ -1033,11 +1035,11 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,</div><div class='ctx'> 	 * encoder-&gt;get_hw_state() returns true.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		if (intel_de_read(dev_priv, BXT_MIPI_PORT_CTRL(port)) &amp; DPI_ENABLE)</div><div class='add'>+		if (intel_de_read(display, BXT_MIPI_PORT_CTRL(port)) &amp; DPI_ENABLE)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fmt = intel_de_read(dev_priv, MIPI_DSI_FUNC_PRG(port)) &amp; VID_MODE_FORMAT_MASK;</div><div class='add'>+	fmt = intel_de_read(display, MIPI_DSI_FUNC_PRG(display, port)) &amp; VID_MODE_FORMAT_MASK;</div><div class='ctx'> 	bpp = mipi_dsi_pixel_format_to_bpp(</div><div class='ctx'> 			pixel_format_from_register_bits(fmt));</div><div class='ctx'> </div><div class='hunk'>@@ -1049,24 +1051,24 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	/* In terms of pixels */</div><div class='ctx'> 	adjusted_mode-&gt;crtc_hdisplay =</div><div class='del'>-				intel_de_read(dev_priv,</div><div class='add'>+				intel_de_read(display,</div><div class='ctx'> 				              BXT_MIPI_TRANS_HACTIVE(port));</div><div class='ctx'> 	adjusted_mode-&gt;crtc_vdisplay =</div><div class='del'>-				intel_de_read(dev_priv,</div><div class='add'>+				intel_de_read(display,</div><div class='ctx'> 				              BXT_MIPI_TRANS_VACTIVE(port));</div><div class='ctx'> 	adjusted_mode-&gt;crtc_vtotal =</div><div class='del'>-				intel_de_read(dev_priv,</div><div class='add'>+				intel_de_read(display,</div><div class='ctx'> 				              BXT_MIPI_TRANS_VTOTAL(port));</div><div class='ctx'> </div><div class='ctx'> 	hactive = adjusted_mode-&gt;crtc_hdisplay;</div><div class='del'>-	hfp = intel_de_read(dev_priv, MIPI_HFP_COUNT(port));</div><div class='add'>+	hfp = intel_de_read(display, MIPI_HFP_COUNT(display, port));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Meaningful for video mode non-burst sync pulse mode only,</div><div class='ctx'> 	 * can be zero for non-burst sync events and burst modes</div><div class='ctx'> 	 */</div><div class='del'>-	hsync = intel_de_read(dev_priv, MIPI_HSYNC_PADDING_COUNT(port));</div><div class='del'>-	hbp = intel_de_read(dev_priv, MIPI_HBP_COUNT(port));</div><div class='add'>+	hsync = intel_de_read(display, MIPI_HSYNC_PADDING_COUNT(display, port));</div><div class='add'>+	hbp = intel_de_read(display, MIPI_HBP_COUNT(display, port));</div><div class='ctx'> </div><div class='ctx'> 	/* harizontal values are in terms of high speed byte clock */</div><div class='ctx'> 	hfp = pixels_from_txbyteclkhs(hfp, bpp, lane_count,</div><div class='hunk'>@@ -1083,8 +1085,8 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* vertical values are in terms of lines */</div><div class='del'>-	vfp = intel_de_read(dev_priv, MIPI_VFP_COUNT(port));</div><div class='del'>-	vsync = intel_de_read(dev_priv, MIPI_VSYNC_PADDING_COUNT(port));</div><div class='add'>+	vfp = intel_de_read(display, MIPI_VFP_COUNT(display, port));</div><div class='add'>+	vsync = intel_de_read(display, MIPI_VSYNC_PADDING_COUNT(display, port));</div><div class='ctx'> </div><div class='ctx'> 	adjusted_mode-&gt;crtc_htotal = hactive + hfp + hsync + hbp;</div><div class='ctx'> 	adjusted_mode-&gt;crtc_hsync_start = hfp + adjusted_mode-&gt;crtc_hdisplay;</div><div class='hunk'>@@ -1210,12 +1212,12 @@ static u16 txclkesc(u32 divider, unsigned int us)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_dsi_timings(struct drm_encoder *encoder,</div><div class='add'>+static void set_dsi_timings(struct intel_encoder *encoder,</div><div class='ctx'> 			    const struct drm_display_mode *adjusted_mode)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='del'>-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(encoder));</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi-&gt;pixel_format);</div><div class='ctx'> 	unsigned int lane_count = intel_dsi-&gt;lane_count;</div><div class='hunk'>@@ -1256,29 +1258,29 @@ static void set_dsi_timings(struct drm_encoder *encoder,</div><div class='ctx'> 			 * vactive, as they are calculated per channel basis,</div><div class='ctx'> 			 * whereas these values should be based on resolution.</div><div class='ctx'> 			 */</div><div class='del'>-			intel_de_write(dev_priv, BXT_MIPI_TRANS_HACTIVE(port),</div><div class='add'>+			intel_de_write(display, BXT_MIPI_TRANS_HACTIVE(port),</div><div class='ctx'> 				       adjusted_mode-&gt;crtc_hdisplay);</div><div class='del'>-			intel_de_write(dev_priv, BXT_MIPI_TRANS_VACTIVE(port),</div><div class='add'>+			intel_de_write(display, BXT_MIPI_TRANS_VACTIVE(port),</div><div class='ctx'> 				       adjusted_mode-&gt;crtc_vdisplay);</div><div class='del'>-			intel_de_write(dev_priv, BXT_MIPI_TRANS_VTOTAL(port),</div><div class='add'>+			intel_de_write(display, BXT_MIPI_TRANS_VTOTAL(port),</div><div class='ctx'> 				       adjusted_mode-&gt;crtc_vtotal);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_HACTIVE_AREA_COUNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_HACTIVE_AREA_COUNT(display, port),</div><div class='ctx'> 			       hactive);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_HFP_COUNT(port), hfp);</div><div class='add'>+		intel_de_write(display, MIPI_HFP_COUNT(display, port), hfp);</div><div class='ctx'> </div><div class='ctx'> 		/* meaningful for video mode non-burst sync pulse mode only,</div><div class='ctx'> 		 * can be zero for non-burst sync events and burst modes */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_HSYNC_PADDING_COUNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_HSYNC_PADDING_COUNT(display, port),</div><div class='ctx'> 			       hsync);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_HBP_COUNT(port), hbp);</div><div class='add'>+		intel_de_write(display, MIPI_HBP_COUNT(display, port), hbp);</div><div class='ctx'> </div><div class='ctx'> 		/* vertical values are in terms of lines */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_VFP_COUNT(port), vfp);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_VSYNC_PADDING_COUNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_VFP_COUNT(display, port), vfp);</div><div class='add'>+		intel_de_write(display, MIPI_VSYNC_PADDING_COUNT(display, port),</div><div class='ctx'> 			       vsync);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_VBP_COUNT(port), vbp);</div><div class='add'>+		intel_de_write(display, MIPI_VBP_COUNT(display, port), vbp);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1299,21 +1301,20 @@ static u32 pixel_format_to_reg(enum mipi_dsi_pixel_format fmt)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='add'>+static void intel_dsi_prepare(struct intel_encoder *encoder,</div><div class='ctx'> 			      const struct intel_crtc_state *pipe_config)</div><div class='ctx'> {</div><div class='del'>-	struct drm_encoder *encoder = &amp;intel_encoder-&gt;base;</div><div class='del'>-	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_crtc *crtc = to_intel_crtc(pipe_config-&gt;uapi.crtc);</div><div class='del'>-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(encoder));</div><div class='add'>+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	const struct drm_display_mode *adjusted_mode = &amp;pipe_config-&gt;hw.adjusted_mode;</div><div class='ctx'> 	enum port port;</div><div class='ctx'> 	unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi-&gt;pixel_format);</div><div class='ctx'> 	u32 val, tmp;</div><div class='ctx'> 	u16 mode_hdisplay;</div><div class='ctx'> </div><div class='del'>-	drm_dbg_kms(&amp;dev_priv-&gt;drm, "pipe %c\n", pipe_name(crtc-&gt;pipe));</div><div class='add'>+	drm_dbg_kms(display-&gt;drm, "pipe %c\n", pipe_name(crtc-&gt;pipe));</div><div class='ctx'> </div><div class='ctx'> 	mode_hdisplay = adjusted_mode-&gt;crtc_hdisplay;</div><div class='ctx'> </div><div class='hunk'>@@ -1329,31 +1330,31 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 			 * escape clock divider, 20MHz, shared for A and C.</div><div class='ctx'> 			 * device ready must be off when doing this! txclkesc?</div><div class='ctx'> 			 */</div><div class='del'>-			tmp = intel_de_read(dev_priv, MIPI_CTRL(PORT_A));</div><div class='add'>+			tmp = intel_de_read(display, MIPI_CTRL(display, PORT_A));</div><div class='ctx'> 			tmp &amp;= ~ESCAPE_CLOCK_DIVIDER_MASK;</div><div class='del'>-			intel_de_write(dev_priv, MIPI_CTRL(PORT_A),</div><div class='add'>+			intel_de_write(display, MIPI_CTRL(display, PORT_A),</div><div class='ctx'> 				       tmp | ESCAPE_CLOCK_DIVIDER_1);</div><div class='ctx'> </div><div class='ctx'> 			/* read request priority is per pipe */</div><div class='del'>-			tmp = intel_de_read(dev_priv, MIPI_CTRL(port));</div><div class='add'>+			tmp = intel_de_read(display, MIPI_CTRL(display, port));</div><div class='ctx'> 			tmp &amp;= ~READ_REQUEST_PRIORITY_MASK;</div><div class='del'>-			intel_de_write(dev_priv, MIPI_CTRL(port),</div><div class='add'>+			intel_de_write(display, MIPI_CTRL(display, port),</div><div class='ctx'> 				       tmp | READ_REQUEST_PRIORITY_HIGH);</div><div class='ctx'> 		} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {</div><div class='ctx'> 			enum pipe pipe = crtc-&gt;pipe;</div><div class='ctx'> </div><div class='del'>-			intel_de_rmw(dev_priv, MIPI_CTRL(port),</div><div class='add'>+			intel_de_rmw(display, MIPI_CTRL(display, port),</div><div class='ctx'> 				     BXT_PIPE_SELECT_MASK, BXT_PIPE_SELECT(pipe));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* XXX: why here, why like this? handling in irq handler?! */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_INTR_STAT(port), 0xffffffff);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_INTR_EN(port), 0xffffffff);</div><div class='add'>+		intel_de_write(display, MIPI_INTR_STAT(display, port), 0xffffffff);</div><div class='add'>+		intel_de_write(display, MIPI_INTR_EN(display, port), 0xffffffff);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DPHY_PARAM(port),</div><div class='add'>+		intel_de_write(display, MIPI_DPHY_PARAM(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;dphy_reg);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DPI_RESOLUTION(port),</div><div class='add'>+		intel_de_write(display, MIPI_DPI_RESOLUTION(display, port),</div><div class='ctx'> 			       adjusted_mode-&gt;crtc_vdisplay &lt;&lt; VERTICAL_ADDRESS_SHIFT | mode_hdisplay &lt;&lt; HORIZONTAL_ADDRESS_SHIFT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1381,7 +1382,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='del'>-		intel_de_write(dev_priv, MIPI_DSI_FUNC_PRG(port), val);</div><div class='add'>+		intel_de_write(display, MIPI_DSI_FUNC_PRG(display, port), val);</div><div class='ctx'> </div><div class='ctx'> 		/* timeouts for recovery. one frame IIUC. if counter expires,</div><div class='ctx'> 		 * EOT and stop state. */</div><div class='hunk'>@@ -1402,23 +1403,23 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> </div><div class='ctx'> 		if (is_vid_mode(intel_dsi) &amp;&amp;</div><div class='ctx'> 			intel_dsi-&gt;video_mode == BURST_MODE) {</div><div class='del'>-			intel_de_write(dev_priv, MIPI_HS_TX_TIMEOUT(port),</div><div class='add'>+			intel_de_write(display, MIPI_HS_TX_TIMEOUT(display, port),</div><div class='ctx'> 				       txbyteclkhs(adjusted_mode-&gt;crtc_htotal, bpp, intel_dsi-&gt;lane_count, intel_dsi-&gt;burst_mode_ratio) + 1);</div><div class='ctx'> 		} else {</div><div class='del'>-			intel_de_write(dev_priv, MIPI_HS_TX_TIMEOUT(port),</div><div class='add'>+			intel_de_write(display, MIPI_HS_TX_TIMEOUT(display, port),</div><div class='ctx'> 				       txbyteclkhs(adjusted_mode-&gt;crtc_vtotal * adjusted_mode-&gt;crtc_htotal, bpp, intel_dsi-&gt;lane_count, intel_dsi-&gt;burst_mode_ratio) + 1);</div><div class='ctx'> 		}</div><div class='del'>-		intel_de_write(dev_priv, MIPI_LP_RX_TIMEOUT(port),</div><div class='add'>+		intel_de_write(display, MIPI_LP_RX_TIMEOUT(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;lp_rx_timeout);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_TURN_AROUND_TIMEOUT(port),</div><div class='add'>+		intel_de_write(display, MIPI_TURN_AROUND_TIMEOUT(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;turn_arnd_val);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_RESET_TIMER(port),</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_RESET_TIMER(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;rst_timer_val);</div><div class='ctx'> </div><div class='ctx'> 		/* dphy stuff */</div><div class='ctx'> </div><div class='ctx'> 		/* in terms of low power clock */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_INIT_COUNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_INIT_COUNT(display, port),</div><div class='ctx'> 			       txclkesc(intel_dsi-&gt;escape_clk_div, 100));</div><div class='ctx'> </div><div class='ctx'> 		if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) &amp;&amp;</div><div class='hunk'>@@ -1429,16 +1430,16 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 			 * getting used. So write the other port</div><div class='ctx'> 			 * if not in dual link mode.</div><div class='ctx'> 			 */</div><div class='del'>-			intel_de_write(dev_priv,</div><div class='del'>-				       MIPI_INIT_COUNT(port == PORT_A ? PORT_C : PORT_A),</div><div class='add'>+			intel_de_write(display,</div><div class='add'>+				       MIPI_INIT_COUNT(display, port == PORT_A ? PORT_C : PORT_A),</div><div class='ctx'> 				       intel_dsi-&gt;init_count);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* recovery disables */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_EOT_DISABLE(port), tmp);</div><div class='add'>+		intel_de_write(display, MIPI_EOT_DISABLE(display, port), tmp);</div><div class='ctx'> </div><div class='ctx'> 		/* in terms of low power clock */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_INIT_COUNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_INIT_COUNT(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;init_count);</div><div class='ctx'> </div><div class='ctx'> 		/* in terms of txbyteclkhs. actual high to low switch +</div><div class='hunk'>@@ -1446,7 +1447,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * XXX: write MIPI_STOP_STATE_STALL?</div><div class='ctx'> 		 */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_HIGH_LOW_SWITCH_COUNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_HIGH_LOW_SWITCH_COUNT(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;hs_to_lp_count);</div><div class='ctx'> </div><div class='ctx'> 		/* XXX: low power clock equivalence in terms of byte clock.</div><div class='hunk'>@@ -1455,14 +1456,14 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 		 * txclkesc time / txbyteclk time * (105 + MIPI_STOP_STATE_STALL</div><div class='ctx'> 		 * ) / 105.???</div><div class='ctx'> 		 */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_LP_BYTECLK(port),</div><div class='add'>+		intel_de_write(display, MIPI_LP_BYTECLK(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;lp_byte_clk);</div><div class='ctx'> </div><div class='ctx'> 		if (IS_GEMINILAKE(dev_priv)) {</div><div class='del'>-			intel_de_write(dev_priv, MIPI_TLPX_TIME_COUNT(port),</div><div class='add'>+			intel_de_write(display, MIPI_TLPX_TIME_COUNT(display, port),</div><div class='ctx'> 				       intel_dsi-&gt;lp_byte_clk);</div><div class='ctx'> 			/* Shadow of DPHY reg */</div><div class='del'>-			intel_de_write(dev_priv, MIPI_CLK_LANE_TIMING(port),</div><div class='add'>+			intel_de_write(display, MIPI_CLK_LANE_TIMING(display, port),</div><div class='ctx'> 				       intel_dsi-&gt;dphy_reg);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1471,10 +1472,10 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 		 * this register in terms of byte clocks. based on dsi transfer</div><div class='ctx'> 		 * rate and the number of lanes configured the time taken to</div><div class='ctx'> 		 * transmit 16 long packets in a dsi stream varies. */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_DBI_BW_CTRL(port),</div><div class='add'>+		intel_de_write(display, MIPI_DBI_BW_CTRL(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;bw_timer);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_CLK_LANE_SWITCH_TIME_CNT(port),</div><div class='add'>+		intel_de_write(display, MIPI_CLK_LANE_SWITCH_TIME_CNT(display, port),</div><div class='ctx'> 			       intel_dsi-&gt;clk_lp_to_hs_count &lt;&lt; LP_HS_SSW_CNT_SHIFT | intel_dsi-&gt;clk_hs_to_lp_count &lt;&lt; HS_LP_PWR_SW_CNT_SHIFT);</div><div class='ctx'> </div><div class='ctx'> 		if (is_vid_mode(intel_dsi)) {</div><div class='hunk'>@@ -1502,13 +1503,14 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			intel_de_write(dev_priv, MIPI_VIDEO_MODE_FORMAT(port), fmt);</div><div class='add'>+			intel_de_write(display, MIPI_VIDEO_MODE_FORMAT(display, port), fmt);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_dsi_unprepare(struct intel_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='ctx'> 	enum port port;</div><div class='hunk'>@@ -1518,17 +1520,17 @@ static void intel_dsi_unprepare(struct intel_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='ctx'> 		/* Panel commands can be sent when clock is in LP11 */</div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port), 0x0);</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port), 0x0);</div><div class='ctx'> </div><div class='ctx'> 		if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='ctx'> 			bxt_dsi_reset_clocks(encoder, port);</div><div class='ctx'> 		else</div><div class='ctx'> 			vlv_dsi_reset_clocks(encoder, port);</div><div class='del'>-		intel_de_write(dev_priv, MIPI_EOT_DISABLE(port), CLOCKSTOP);</div><div class='add'>+		intel_de_write(display, MIPI_EOT_DISABLE(display, port), CLOCKSTOP);</div><div class='ctx'> </div><div class='del'>-		intel_de_rmw(dev_priv, MIPI_DSI_FUNC_PRG(port), VID_MODE_FORMAT_MASK, 0);</div><div class='add'>+		intel_de_rmw(display, MIPI_DSI_FUNC_PRG(display, port), VID_MODE_FORMAT_MASK, 0);</div><div class='ctx'> </div><div class='del'>-		intel_de_write(dev_priv, MIPI_DEVICE_READY(port), 0x1);</div><div class='add'>+		intel_de_write(display, MIPI_DEVICE_READY(display, port), 0x1);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1592,8 +1594,7 @@ static void vlv_dsi_add_properties(struct intel_connector *connector)</div><div class='ctx'> </div><div class='ctx'> static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = intel_dsi-&gt;base.base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(intel_dsi-&gt;base.base.dev);</div><div class='ctx'> 	struct intel_connector *connector = intel_dsi-&gt;attached_connector;</div><div class='ctx'> 	struct mipi_config *mipi_config = connector-&gt;panel.vbt.dsi.config;</div><div class='ctx'> 	u32 tlpx_ns, extra_byte_count, tlpx_ui;</div><div class='hunk'>@@ -1879,10 +1880,8 @@ static const struct dmi_system_id vlv_dsi_dmi_quirk_table[] = {</div><div class='ctx'> void vlv_dsi_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_dsi *intel_dsi;</div><div class='del'>-	struct intel_encoder *intel_encoder;</div><div class='del'>-	struct drm_encoder *encoder;</div><div class='del'>-	struct intel_connector *intel_connector;</div><div class='del'>-	struct drm_connector *connector;</div><div class='add'>+	struct intel_encoder *encoder;</div><div class='add'>+	struct intel_connector *connector;</div><div class='ctx'> 	struct drm_display_mode *current_mode;</div><div class='ctx'> 	const struct dmi_system_id *dmi_id;</div><div class='ctx'> 	enum port port;</div><div class='hunk'>@@ -1903,64 +1902,61 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	if (!intel_dsi)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	intel_connector = intel_connector_alloc();</div><div class='del'>-	if (!intel_connector) {</div><div class='add'>+	connector = intel_connector_alloc();</div><div class='add'>+	if (!connector) {</div><div class='ctx'> 		kfree(intel_dsi);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_encoder = &amp;intel_dsi-&gt;base;</div><div class='del'>-	encoder = &amp;intel_encoder-&gt;base;</div><div class='del'>-	intel_dsi-&gt;attached_connector = intel_connector;</div><div class='del'>-</div><div class='del'>-	connector = &amp;intel_connector-&gt;base;</div><div class='add'>+	encoder = &amp;intel_dsi-&gt;base;</div><div class='add'>+	intel_dsi-&gt;attached_connector = connector;</div><div class='ctx'> </div><div class='del'>-	drm_encoder_init(&amp;dev_priv-&gt;drm, encoder, &amp;intel_dsi_funcs, DRM_MODE_ENCODER_DSI,</div><div class='del'>-			 "DSI %c", port_name(port));</div><div class='add'>+	drm_encoder_init(&amp;dev_priv-&gt;drm, &amp;encoder-&gt;base, &amp;intel_dsi_funcs,</div><div class='add'>+			 DRM_MODE_ENCODER_DSI, "DSI %c", port_name(port));</div><div class='ctx'> </div><div class='del'>-	intel_encoder-&gt;compute_config = intel_dsi_compute_config;</div><div class='del'>-	intel_encoder-&gt;pre_enable = intel_dsi_pre_enable;</div><div class='add'>+	encoder-&gt;compute_config = intel_dsi_compute_config;</div><div class='add'>+	encoder-&gt;pre_enable = intel_dsi_pre_enable;</div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='del'>-		intel_encoder-&gt;enable = bxt_dsi_enable;</div><div class='del'>-	intel_encoder-&gt;disable = intel_dsi_disable;</div><div class='del'>-	intel_encoder-&gt;post_disable = intel_dsi_post_disable;</div><div class='del'>-	intel_encoder-&gt;get_hw_state = intel_dsi_get_hw_state;</div><div class='del'>-	intel_encoder-&gt;get_config = intel_dsi_get_config;</div><div class='del'>-	intel_encoder-&gt;update_pipe = intel_backlight_update;</div><div class='del'>-	intel_encoder-&gt;shutdown = intel_dsi_shutdown;</div><div class='add'>+		encoder-&gt;enable = bxt_dsi_enable;</div><div class='add'>+	encoder-&gt;disable = intel_dsi_disable;</div><div class='add'>+	encoder-&gt;post_disable = intel_dsi_post_disable;</div><div class='add'>+	encoder-&gt;get_hw_state = intel_dsi_get_hw_state;</div><div class='add'>+	encoder-&gt;get_config = intel_dsi_get_config;</div><div class='add'>+	encoder-&gt;update_pipe = intel_backlight_update;</div><div class='add'>+	encoder-&gt;shutdown = intel_dsi_shutdown;</div><div class='ctx'> </div><div class='del'>-	intel_connector-&gt;get_hw_state = intel_connector_get_hw_state;</div><div class='add'>+	connector-&gt;get_hw_state = intel_connector_get_hw_state;</div><div class='ctx'> </div><div class='del'>-	intel_encoder-&gt;port = port;</div><div class='del'>-	intel_encoder-&gt;type = INTEL_OUTPUT_DSI;</div><div class='del'>-	intel_encoder-&gt;power_domain = POWER_DOMAIN_PORT_DSI;</div><div class='del'>-	intel_encoder-&gt;cloneable = 0;</div><div class='add'>+	encoder-&gt;port = port;</div><div class='add'>+	encoder-&gt;type = INTEL_OUTPUT_DSI;</div><div class='add'>+	encoder-&gt;power_domain = POWER_DOMAIN_PORT_DSI;</div><div class='add'>+	encoder-&gt;cloneable = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI</div><div class='ctx'> 	 * port C. BXT isn't limited like this.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))</div><div class='del'>-		intel_encoder-&gt;pipe_mask = ~0;</div><div class='add'>+		encoder-&gt;pipe_mask = ~0;</div><div class='ctx'> 	else if (port == PORT_A)</div><div class='del'>-		intel_encoder-&gt;pipe_mask = BIT(PIPE_A);</div><div class='add'>+		encoder-&gt;pipe_mask = BIT(PIPE_A);</div><div class='ctx'> 	else</div><div class='del'>-		intel_encoder-&gt;pipe_mask = BIT(PIPE_B);</div><div class='add'>+		encoder-&gt;pipe_mask = BIT(PIPE_B);</div><div class='ctx'> </div><div class='ctx'> 	intel_dsi-&gt;panel_power_off_time = ktime_get_boottime();</div><div class='ctx'> </div><div class='del'>-	intel_bios_init_panel_late(dev_priv, &amp;intel_connector-&gt;panel, NULL, NULL);</div><div class='add'>+	intel_bios_init_panel_late(dev_priv, &amp;connector-&gt;panel, NULL, NULL);</div><div class='ctx'> </div><div class='del'>-	if (intel_connector-&gt;panel.vbt.dsi.config-&gt;dual_link)</div><div class='add'>+	if (connector-&gt;panel.vbt.dsi.config-&gt;dual_link)</div><div class='ctx'> 		intel_dsi-&gt;ports = BIT(PORT_A) | BIT(PORT_C);</div><div class='ctx'> 	else</div><div class='ctx'> 		intel_dsi-&gt;ports = BIT(port);</div><div class='ctx'> </div><div class='del'>-	if (drm_WARN_ON(&amp;dev_priv-&gt;drm, intel_connector-&gt;panel.vbt.dsi.bl_ports &amp; ~intel_dsi-&gt;ports))</div><div class='del'>-		intel_connector-&gt;panel.vbt.dsi.bl_ports &amp;= intel_dsi-&gt;ports;</div><div class='add'>+	if (drm_WARN_ON(&amp;dev_priv-&gt;drm, connector-&gt;panel.vbt.dsi.bl_ports &amp; ~intel_dsi-&gt;ports))</div><div class='add'>+		connector-&gt;panel.vbt.dsi.bl_ports &amp;= intel_dsi-&gt;ports;</div><div class='ctx'> </div><div class='del'>-	if (drm_WARN_ON(&amp;dev_priv-&gt;drm, intel_connector-&gt;panel.vbt.dsi.cabc_ports &amp; ~intel_dsi-&gt;ports))</div><div class='del'>-		intel_connector-&gt;panel.vbt.dsi.cabc_ports &amp;= intel_dsi-&gt;ports;</div><div class='add'>+	if (drm_WARN_ON(&amp;dev_priv-&gt;drm, connector-&gt;panel.vbt.dsi.cabc_ports &amp; ~intel_dsi-&gt;ports))</div><div class='add'>+		connector-&gt;panel.vbt.dsi.cabc_ports &amp;= intel_dsi-&gt;ports;</div><div class='ctx'> </div><div class='ctx'> 	/* Create a DSI host (and a device) for each port. */</div><div class='ctx'> 	for_each_dsi_port(port, intel_dsi-&gt;ports) {</div><div class='hunk'>@@ -1980,7 +1976,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Use clock read-back from current hw-state for fastboot */</div><div class='del'>-	current_mode = intel_encoder_current_mode(intel_encoder);</div><div class='add'>+	current_mode = intel_encoder_current_mode(encoder);</div><div class='ctx'> 	if (current_mode) {</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm, "Calculated pclk %d GOP %d\n",</div><div class='ctx'> 			    intel_dsi-&gt;pclk, current_mode-&gt;clock);</div><div class='hunk'>@@ -1996,22 +1992,22 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	vlv_dphy_param_init(intel_dsi);</div><div class='ctx'> </div><div class='ctx'> 	intel_dsi_vbt_gpio_init(intel_dsi,</div><div class='del'>-				intel_dsi_get_hw_state(intel_encoder, &amp;pipe));</div><div class='add'>+				intel_dsi_get_hw_state(encoder, &amp;pipe));</div><div class='ctx'> </div><div class='del'>-	drm_connector_init(&amp;dev_priv-&gt;drm, connector, &amp;intel_dsi_connector_funcs,</div><div class='add'>+	drm_connector_init(&amp;dev_priv-&gt;drm, &amp;connector-&gt;base, &amp;intel_dsi_connector_funcs,</div><div class='ctx'> 			   DRM_MODE_CONNECTOR_DSI);</div><div class='ctx'> </div><div class='del'>-	drm_connector_helper_add(connector, &amp;intel_dsi_connector_helper_funcs);</div><div class='add'>+	drm_connector_helper_add(&amp;connector-&gt;base, &amp;intel_dsi_connector_helper_funcs);</div><div class='ctx'> </div><div class='del'>-	connector-&gt;display_info.subpixel_order = SubPixelHorizontalRGB; /*XXX*/</div><div class='add'>+	connector-&gt;base.display_info.subpixel_order = SubPixelHorizontalRGB; /*XXX*/</div><div class='ctx'> </div><div class='del'>-	intel_connector_attach_encoder(intel_connector, intel_encoder);</div><div class='add'>+	intel_connector_attach_encoder(connector, encoder);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev_priv-&gt;drm.mode_config.mutex);</div><div class='del'>-	intel_panel_add_vbt_lfp_fixed_mode(intel_connector);</div><div class='add'>+	intel_panel_add_vbt_lfp_fixed_mode(connector);</div><div class='ctx'> 	mutex_unlock(&amp;dev_priv-&gt;drm.mode_config.mutex);</div><div class='ctx'> </div><div class='del'>-	if (!intel_panel_preferred_fixed_mode(intel_connector)) {</div><div class='add'>+	if (!intel_panel_preferred_fixed_mode(connector)) {</div><div class='ctx'> 		drm_dbg_kms(&amp;dev_priv-&gt;drm, "no fixed mode\n");</div><div class='ctx'> 		goto err_cleanup_connector;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2024,18 +2020,18 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)</div><div class='ctx'> 		quirk_func(intel_dsi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_panel_init(intel_connector, NULL);</div><div class='add'>+	intel_panel_init(connector, NULL);</div><div class='ctx'> </div><div class='del'>-	intel_backlight_setup(intel_connector, INVALID_PIPE);</div><div class='add'>+	intel_backlight_setup(connector, INVALID_PIPE);</div><div class='ctx'> </div><div class='del'>-	vlv_dsi_add_properties(intel_connector);</div><div class='add'>+	vlv_dsi_add_properties(connector);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> err_cleanup_connector:</div><div class='del'>-	drm_connector_cleanup(&amp;intel_connector-&gt;base);</div><div class='add'>+	drm_connector_cleanup(&amp;connector-&gt;base);</div><div class='ctx'> err:</div><div class='del'>-	drm_encoder_cleanup(&amp;intel_encoder-&gt;base);</div><div class='add'>+	drm_encoder_cleanup(&amp;encoder-&gt;base);</div><div class='ctx'> 	kfree(intel_dsi);</div><div class='del'>-	kfree(intel_connector);</div><div class='add'>+	kfree(connector);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c<br/>index ae0a0b11bae3..70c5a13a3c75 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dsi_pll.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dsi_pll.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dsi_pll.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/vlv_dsi_pll.c</a></div><div class='hunk'>@@ -365,13 +365,13 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)</div><div class='ctx'> {</div><div class='del'>-	u32 temp;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='ctx'> 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);</div><div class='add'>+	u32 temp;</div><div class='ctx'> </div><div class='del'>-	temp = intel_de_read(dev_priv, MIPI_CTRL(port));</div><div class='add'>+	temp = intel_de_read(display, MIPI_CTRL(display, port));</div><div class='ctx'> 	temp &amp;= ~ESCAPE_CLOCK_DIVIDER_MASK;</div><div class='del'>-	intel_de_write(dev_priv, MIPI_CTRL(port),</div><div class='add'>+	intel_de_write(display, MIPI_CTRL(display, port),</div><div class='ctx'> 		       temp | intel_dsi-&gt;escape_clk_div &lt;&lt; ESCAPE_CLOCK_DIVIDER_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -570,24 +570,24 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)</div><div class='ctx'> {</div><div class='add'>+	struct intel_display *display = to_intel_display(encoder);</div><div class='add'>+	struct drm_i915_private *dev_priv = to_i915(encoder-&gt;base.dev);</div><div class='ctx'> 	u32 tmp;</div><div class='del'>-	struct drm_device *dev = encoder-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear old configurations */</div><div class='ctx'> 	if (IS_BROXTON(dev_priv)) {</div><div class='del'>-		tmp = intel_de_read(dev_priv, BXT_MIPI_CLOCK_CTL);</div><div class='add'>+		tmp = intel_de_read(display, BXT_MIPI_CLOCK_CTL);</div><div class='ctx'> 		tmp &amp;= ~(BXT_MIPI_TX_ESCLK_FIXDIV_MASK(port));</div><div class='ctx'> 		tmp &amp;= ~(BXT_MIPI_RX_ESCLK_UPPER_FIXDIV_MASK(port));</div><div class='ctx'> 		tmp &amp;= ~(BXT_MIPI_8X_BY3_DIVIDER_MASK(port));</div><div class='ctx'> 		tmp &amp;= ~(BXT_MIPI_RX_ESCLK_LOWER_FIXDIV_MASK(port));</div><div class='del'>-		intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp);</div><div class='add'>+		intel_de_write(display, BXT_MIPI_CLOCK_CTL, tmp);</div><div class='ctx'> 	} else {</div><div class='del'>-		intel_de_rmw(dev_priv, MIPIO_TXESC_CLK_DIV1, GLK_TX_ESC_CLK_DIV1_MASK, 0);</div><div class='add'>+		intel_de_rmw(display, MIPIO_TXESC_CLK_DIV1, GLK_TX_ESC_CLK_DIV1_MASK, 0);</div><div class='ctx'> </div><div class='del'>-		intel_de_rmw(dev_priv, MIPIO_TXESC_CLK_DIV2, GLK_TX_ESC_CLK_DIV2_MASK, 0);</div><div class='add'>+		intel_de_rmw(display, MIPIO_TXESC_CLK_DIV2, GLK_TX_ESC_CLK_DIV2_MASK, 0);</div><div class='ctx'> 	}</div><div class='del'>-	intel_de_write(dev_priv, MIPI_EOT_DISABLE(port), CLOCKSTOP);</div><div class='add'>+	intel_de_write(display, MIPI_EOT_DISABLE(display, port), CLOCKSTOP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void assert_dsi_pll(struct drm_i915_private *i915, bool state)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_regs.h b/drivers/gpu/drm/i915/display/vlv_dsi_regs.h<br/>index abbe427e462e..c1126d170ec6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dsi_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/display/vlv_dsi_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/display/vlv_dsi_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/display/vlv_dsi_regs.h</a></div><div class='hunk'>@@ -11,26 +11,23 @@</div><div class='ctx'> #define VLV_MIPI_BASE			VLV_DISPLAY_BASE</div><div class='ctx'> #define BXT_MIPI_BASE			0x60000</div><div class='ctx'> </div><div class='del'>-#define _MIPI_MMIO_BASE(__i915) ((__i915)-&gt;display.dsi.mmio_base)</div><div class='add'>+#define _MIPI_MMIO_BASE(display)	((display)-&gt;dsi.mmio_base)</div><div class='ctx'> </div><div class='ctx'> #define _MIPI_PORT(port, a, c)	(((port) == PORT_A) ? a : c)	/* ports A and C only */</div><div class='del'>-#define _MMIO_MIPI(port, a, c)	_MMIO(_MIPI_PORT(port, a, c))</div><div class='add'>+#define _MMIO_MIPI(base, port, a, c)	_MMIO((base) + _MIPI_PORT(port, a, c))</div><div class='ctx'> </div><div class='ctx'> /* BXT MIPI mode configure */</div><div class='del'>-#define  _BXT_MIPIA_TRANS_HACTIVE			0x6B0F8</div><div class='del'>-#define  _BXT_MIPIC_TRANS_HACTIVE			0x6B8F8</div><div class='del'>-#define  BXT_MIPI_TRANS_HACTIVE(tc)	_MMIO_MIPI(tc, \</div><div class='del'>-		_BXT_MIPIA_TRANS_HACTIVE, _BXT_MIPIC_TRANS_HACTIVE)</div><div class='add'>+#define  _BXT_MIPIA_TRANS_HACTIVE		0xb0f8</div><div class='add'>+#define  _BXT_MIPIC_TRANS_HACTIVE		0xb8f8</div><div class='add'>+#define  BXT_MIPI_TRANS_HACTIVE(tc)		_MMIO_MIPI(BXT_MIPI_BASE, tc, _BXT_MIPIA_TRANS_HACTIVE, _BXT_MIPIC_TRANS_HACTIVE)</div><div class='ctx'> </div><div class='del'>-#define  _BXT_MIPIA_TRANS_VACTIVE			0x6B0FC</div><div class='del'>-#define  _BXT_MIPIC_TRANS_VACTIVE			0x6B8FC</div><div class='del'>-#define  BXT_MIPI_TRANS_VACTIVE(tc)	_MMIO_MIPI(tc, \</div><div class='del'>-		_BXT_MIPIA_TRANS_VACTIVE, _BXT_MIPIC_TRANS_VACTIVE)</div><div class='add'>+#define  _BXT_MIPIA_TRANS_VACTIVE		0xb0fc</div><div class='add'>+#define  _BXT_MIPIC_TRANS_VACTIVE		0xb8fc</div><div class='add'>+#define  BXT_MIPI_TRANS_VACTIVE(tc)		_MMIO_MIPI(BXT_MIPI_BASE, tc, _BXT_MIPIA_TRANS_VACTIVE, _BXT_MIPIC_TRANS_VACTIVE)</div><div class='ctx'> </div><div class='del'>-#define  _BXT_MIPIA_TRANS_VTOTAL			0x6B100</div><div class='del'>-#define  _BXT_MIPIC_TRANS_VTOTAL			0x6B900</div><div class='del'>-#define  BXT_MIPI_TRANS_VTOTAL(tc)	_MMIO_MIPI(tc, \</div><div class='del'>-		_BXT_MIPIA_TRANS_VTOTAL, _BXT_MIPIC_TRANS_VTOTAL)</div><div class='add'>+#define  _BXT_MIPIA_TRANS_VTOTAL		0xb100</div><div class='add'>+#define  _BXT_MIPIC_TRANS_VTOTAL		0xb900</div><div class='add'>+#define  BXT_MIPI_TRANS_VTOTAL(tc)		_MMIO_MIPI(BXT_MIPI_BASE, tc, _BXT_MIPIA_TRANS_VTOTAL, _BXT_MIPIC_TRANS_VTOTAL)</div><div class='ctx'> </div><div class='ctx'> #define BXT_P_DSI_REGULATOR_CFG			_MMIO(0x160020)</div><div class='ctx'> #define  STAP_SELECT					(1 &lt;&lt; 0)</div><div class='hunk'>@@ -38,14 +35,14 @@</div><div class='ctx'> #define BXT_P_DSI_REGULATOR_TX_CTRL		_MMIO(0x160054)</div><div class='ctx'> #define  HS_IO_CTRL_SELECT				(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_PORT_CTRL			(VLV_DISPLAY_BASE + 0x61190)</div><div class='del'>-#define _MIPIC_PORT_CTRL			(VLV_DISPLAY_BASE + 0x61700)</div><div class='del'>-#define MIPI_PORT_CTRL(port)	_MMIO_MIPI(port, _MIPIA_PORT_CTRL, _MIPIC_PORT_CTRL)</div><div class='add'>+#define _MIPIA_PORT_CTRL			0x61190</div><div class='add'>+#define _MIPIC_PORT_CTRL			0x61700</div><div class='add'>+#define VLV_MIPI_PORT_CTRL(port)		_MMIO_MIPI(VLV_MIPI_BASE, port, _MIPIA_PORT_CTRL, _MIPIC_PORT_CTRL)</div><div class='ctx'> </div><div class='ctx'>  /* BXT port control */</div><div class='del'>-#define _BXT_MIPIA_PORT_CTRL				0x6B0C0</div><div class='del'>-#define _BXT_MIPIC_PORT_CTRL				0x6B8C0</div><div class='del'>-#define BXT_MIPI_PORT_CTRL(tc)	_MMIO_MIPI(tc, _BXT_MIPIA_PORT_CTRL, _BXT_MIPIC_PORT_CTRL)</div><div class='add'>+#define _BXT_MIPIA_PORT_CTRL			0xb0c0</div><div class='add'>+#define _BXT_MIPIC_PORT_CTRL			0xb8c0</div><div class='add'>+#define BXT_MIPI_PORT_CTRL(tc)			_MMIO_MIPI(BXT_MIPI_BASE, tc, _BXT_MIPIA_PORT_CTRL, _BXT_MIPIC_PORT_CTRL)</div><div class='ctx'> </div><div class='ctx'> #define  DPI_ENABLE					(1 &lt;&lt; 31) /* A + C */</div><div class='ctx'> #define  MIPIA_MIPI4DPHY_DELAY_COUNT_SHIFT		27</div><div class='hunk'>@@ -87,20 +84,17 @@</div><div class='ctx'> #define  LANE_CONFIGURATION_DUAL_LINK_A			(1 &lt;&lt; 0)</div><div class='ctx'> #define  LANE_CONFIGURATION_DUAL_LINK_B			(2 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_TEARING_CTRL			(VLV_DISPLAY_BASE + 0x61194)</div><div class='del'>-#define _MIPIC_TEARING_CTRL			(VLV_DISPLAY_BASE + 0x61704)</div><div class='del'>-#define MIPI_TEARING_CTRL(port)			_MMIO_MIPI(port, _MIPIA_TEARING_CTRL, _MIPIC_TEARING_CTRL)</div><div class='add'>+#define _MIPIA_TEARING_CTRL			0x61194</div><div class='add'>+#define _MIPIC_TEARING_CTRL			0x61704</div><div class='add'>+#define VLV_MIPI_TEARING_CTRL(port)			_MMIO_MIPI(VLV_MIPI_BASE, port, _MIPIA_TEARING_CTRL, _MIPIC_TEARING_CTRL)</div><div class='ctx'> #define  TEARING_EFFECT_DELAY_SHIFT			0</div><div class='ctx'> #define  TEARING_EFFECT_DELAY_MASK			(0xffff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-/* XXX: all bits reserved */</div><div class='del'>-#define _MIPIA_AUTOPWG			(VLV_DISPLAY_BASE + 0x611a0)</div><div class='del'>-</div><div class='ctx'> /* MIPI DSI Controller and D-PHY registers */</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DEVICE_READY		(_MIPI_MMIO_BASE(dev_priv) + 0xb000)</div><div class='del'>-#define _MIPIC_DEVICE_READY		(_MIPI_MMIO_BASE(dev_priv) + 0xb800)</div><div class='del'>-#define MIPI_DEVICE_READY(port)		_MMIO_MIPI(port, _MIPIA_DEVICE_READY, _MIPIC_DEVICE_READY)</div><div class='add'>+#define _MIPIA_DEVICE_READY			0xb000</div><div class='add'>+#define _MIPIC_DEVICE_READY			0xb800</div><div class='add'>+#define MIPI_DEVICE_READY(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DEVICE_READY, _MIPIC_DEVICE_READY)</div><div class='ctx'> #define  BUS_POSSESSION					(1 &lt;&lt; 3) /* set to give bus to receiver */</div><div class='ctx'> #define  ULPS_STATE_MASK				(3 &lt;&lt; 1)</div><div class='ctx'> #define  ULPS_STATE_ENTER				(2 &lt;&lt; 1)</div><div class='hunk'>@@ -108,12 +102,12 @@</div><div class='ctx'> #define  ULPS_STATE_NORMAL_OPERATION			(0 &lt;&lt; 1)</div><div class='ctx'> #define  DEVICE_READY					(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_INTR_STAT		(_MIPI_MMIO_BASE(dev_priv) + 0xb004)</div><div class='del'>-#define _MIPIC_INTR_STAT		(_MIPI_MMIO_BASE(dev_priv) + 0xb804)</div><div class='del'>-#define MIPI_INTR_STAT(port)		_MMIO_MIPI(port, _MIPIA_INTR_STAT, _MIPIC_INTR_STAT)</div><div class='del'>-#define _MIPIA_INTR_EN			(_MIPI_MMIO_BASE(dev_priv) + 0xb008)</div><div class='del'>-#define _MIPIC_INTR_EN			(_MIPI_MMIO_BASE(dev_priv) + 0xb808)</div><div class='del'>-#define MIPI_INTR_EN(port)		_MMIO_MIPI(port, _MIPIA_INTR_EN, _MIPIC_INTR_EN)</div><div class='add'>+#define _MIPIA_INTR_STAT			0xb004</div><div class='add'>+#define _MIPIC_INTR_STAT			0xb804</div><div class='add'>+#define MIPI_INTR_STAT(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_STAT, _MIPIC_INTR_STAT)</div><div class='add'>+#define _MIPIA_INTR_EN				0xb008</div><div class='add'>+#define _MIPIC_INTR_EN				0xb808</div><div class='add'>+#define MIPI_INTR_EN(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_EN, _MIPIC_INTR_EN)</div><div class='ctx'> #define  TEARING_EFFECT					(1 &lt;&lt; 31)</div><div class='ctx'> #define  SPL_PKT_SENT_INTERRUPT				(1 &lt;&lt; 30)</div><div class='ctx'> #define  GEN_READ_DATA_AVAIL				(1 &lt;&lt; 29)</div><div class='hunk'>@@ -147,9 +141,9 @@</div><div class='ctx'> #define  RXSOT_SYNC_ERROR				(1 &lt;&lt; 1)</div><div class='ctx'> #define  RXSOT_ERROR					(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DSI_FUNC_PRG		(_MIPI_MMIO_BASE(dev_priv) + 0xb00c)</div><div class='del'>-#define _MIPIC_DSI_FUNC_PRG		(_MIPI_MMIO_BASE(dev_priv) + 0xb80c)</div><div class='del'>-#define MIPI_DSI_FUNC_PRG(port)		_MMIO_MIPI(port, _MIPIA_DSI_FUNC_PRG, _MIPIC_DSI_FUNC_PRG)</div><div class='add'>+#define _MIPIA_DSI_FUNC_PRG			0xb00c</div><div class='add'>+#define _MIPIC_DSI_FUNC_PRG			0xb80c</div><div class='add'>+#define MIPI_DSI_FUNC_PRG(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DSI_FUNC_PRG, _MIPIC_DSI_FUNC_PRG)</div><div class='ctx'> #define  CMD_MODE_DATA_WIDTH_MASK			(7 &lt;&lt; 13)</div><div class='ctx'> #define  CMD_MODE_NOT_SUPPORTED				(0 &lt;&lt; 13)</div><div class='ctx'> #define  CMD_MODE_DATA_WIDTH_16_BIT			(1 &lt;&lt; 13)</div><div class='hunk'>@@ -170,77 +164,77 @@</div><div class='ctx'> #define  DATA_LANES_PRG_REG_SHIFT			0</div><div class='ctx'> #define  DATA_LANES_PRG_REG_MASK			(7 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_HS_TX_TIMEOUT		(_MIPI_MMIO_BASE(dev_priv) + 0xb010)</div><div class='del'>-#define _MIPIC_HS_TX_TIMEOUT		(_MIPI_MMIO_BASE(dev_priv) + 0xb810)</div><div class='del'>-#define MIPI_HS_TX_TIMEOUT(port)	_MMIO_MIPI(port, _MIPIA_HS_TX_TIMEOUT, _MIPIC_HS_TX_TIMEOUT)</div><div class='add'>+#define _MIPIA_HS_TX_TIMEOUT			0xb010</div><div class='add'>+#define _MIPIC_HS_TX_TIMEOUT			0xb810</div><div class='add'>+#define MIPI_HS_TX_TIMEOUT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_TX_TIMEOUT, _MIPIC_HS_TX_TIMEOUT)</div><div class='ctx'> #define  HIGH_SPEED_TX_TIMEOUT_COUNTER_MASK		0xffffff</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_LP_RX_TIMEOUT		(_MIPI_MMIO_BASE(dev_priv) + 0xb014)</div><div class='del'>-#define _MIPIC_LP_RX_TIMEOUT		(_MIPI_MMIO_BASE(dev_priv) + 0xb814)</div><div class='del'>-#define MIPI_LP_RX_TIMEOUT(port)	_MMIO_MIPI(port, _MIPIA_LP_RX_TIMEOUT, _MIPIC_LP_RX_TIMEOUT)</div><div class='add'>+#define _MIPIA_LP_RX_TIMEOUT			0xb014</div><div class='add'>+#define _MIPIC_LP_RX_TIMEOUT			0xb814</div><div class='add'>+#define MIPI_LP_RX_TIMEOUT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_RX_TIMEOUT, _MIPIC_LP_RX_TIMEOUT)</div><div class='ctx'> #define  LOW_POWER_RX_TIMEOUT_COUNTER_MASK		0xffffff</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_TURN_AROUND_TIMEOUT	(_MIPI_MMIO_BASE(dev_priv) + 0xb018)</div><div class='del'>-#define _MIPIC_TURN_AROUND_TIMEOUT	(_MIPI_MMIO_BASE(dev_priv) + 0xb818)</div><div class='del'>-#define MIPI_TURN_AROUND_TIMEOUT(port)	_MMIO_MIPI(port, _MIPIA_TURN_AROUND_TIMEOUT, _MIPIC_TURN_AROUND_TIMEOUT)</div><div class='add'>+#define _MIPIA_TURN_AROUND_TIMEOUT		0xb018</div><div class='add'>+#define _MIPIC_TURN_AROUND_TIMEOUT		0xb818</div><div class='add'>+#define MIPI_TURN_AROUND_TIMEOUT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_TURN_AROUND_TIMEOUT, _MIPIC_TURN_AROUND_TIMEOUT)</div><div class='ctx'> #define  TURN_AROUND_TIMEOUT_MASK			0x3f</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DEVICE_RESET_TIMER	(_MIPI_MMIO_BASE(dev_priv) + 0xb01c)</div><div class='del'>-#define _MIPIC_DEVICE_RESET_TIMER	(_MIPI_MMIO_BASE(dev_priv) + 0xb81c)</div><div class='del'>-#define MIPI_DEVICE_RESET_TIMER(port)	_MMIO_MIPI(port, _MIPIA_DEVICE_RESET_TIMER, _MIPIC_DEVICE_RESET_TIMER)</div><div class='add'>+#define _MIPIA_DEVICE_RESET_TIMER		0xb01c</div><div class='add'>+#define _MIPIC_DEVICE_RESET_TIMER		0xb81c</div><div class='add'>+#define MIPI_DEVICE_RESET_TIMER(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DEVICE_RESET_TIMER, _MIPIC_DEVICE_RESET_TIMER)</div><div class='ctx'> #define  DEVICE_RESET_TIMER_MASK			0xffff</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DPI_RESOLUTION		(_MIPI_MMIO_BASE(dev_priv) + 0xb020)</div><div class='del'>-#define _MIPIC_DPI_RESOLUTION		(_MIPI_MMIO_BASE(dev_priv) + 0xb820)</div><div class='del'>-#define MIPI_DPI_RESOLUTION(port)	_MMIO_MIPI(port, _MIPIA_DPI_RESOLUTION, _MIPIC_DPI_RESOLUTION)</div><div class='add'>+#define _MIPIA_DPI_RESOLUTION			0xb020</div><div class='add'>+#define _MIPIC_DPI_RESOLUTION			0xb820</div><div class='add'>+#define MIPI_DPI_RESOLUTION(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPI_RESOLUTION, _MIPIC_DPI_RESOLUTION)</div><div class='ctx'> #define  VERTICAL_ADDRESS_SHIFT				16</div><div class='ctx'> #define  VERTICAL_ADDRESS_MASK				(0xffff &lt;&lt; 16)</div><div class='ctx'> #define  HORIZONTAL_ADDRESS_SHIFT			0</div><div class='ctx'> #define  HORIZONTAL_ADDRESS_MASK			0xffff</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DBI_FIFO_THROTTLE	(_MIPI_MMIO_BASE(dev_priv) + 0xb024)</div><div class='del'>-#define _MIPIC_DBI_FIFO_THROTTLE	(_MIPI_MMIO_BASE(dev_priv) + 0xb824)</div><div class='del'>-#define MIPI_DBI_FIFO_THROTTLE(port)	_MMIO_MIPI(port, _MIPIA_DBI_FIFO_THROTTLE, _MIPIC_DBI_FIFO_THROTTLE)</div><div class='add'>+#define _MIPIA_DBI_FIFO_THROTTLE		0xb024</div><div class='add'>+#define _MIPIC_DBI_FIFO_THROTTLE		0xb824</div><div class='add'>+#define MIPI_DBI_FIFO_THROTTLE(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DBI_FIFO_THROTTLE, _MIPIC_DBI_FIFO_THROTTLE)</div><div class='ctx'> #define  DBI_FIFO_EMPTY_HALF				(0 &lt;&lt; 0)</div><div class='ctx'> #define  DBI_FIFO_EMPTY_QUARTER				(1 &lt;&lt; 0)</div><div class='ctx'> #define  DBI_FIFO_EMPTY_7_LOCATIONS			(2 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* regs below are bits 15:0 */</div><div class='del'>-#define _MIPIA_HSYNC_PADDING_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb028)</div><div class='del'>-#define _MIPIC_HSYNC_PADDING_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb828)</div><div class='del'>-#define MIPI_HSYNC_PADDING_COUNT(port)	_MMIO_MIPI(port, _MIPIA_HSYNC_PADDING_COUNT, _MIPIC_HSYNC_PADDING_COUNT)</div><div class='add'>+#define _MIPIA_HSYNC_PADDING_COUNT		0xb028</div><div class='add'>+#define _MIPIC_HSYNC_PADDING_COUNT		0xb828</div><div class='add'>+#define MIPI_HSYNC_PADDING_COUNT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HSYNC_PADDING_COUNT, _MIPIC_HSYNC_PADDING_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_HBP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb02c)</div><div class='del'>-#define _MIPIC_HBP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb82c)</div><div class='del'>-#define MIPI_HBP_COUNT(port)		_MMIO_MIPI(port, _MIPIA_HBP_COUNT, _MIPIC_HBP_COUNT)</div><div class='add'>+#define _MIPIA_HBP_COUNT			0xb02c</div><div class='add'>+#define _MIPIC_HBP_COUNT			0xb82c</div><div class='add'>+#define MIPI_HBP_COUNT(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HBP_COUNT, _MIPIC_HBP_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_HFP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb030)</div><div class='del'>-#define _MIPIC_HFP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb830)</div><div class='del'>-#define MIPI_HFP_COUNT(port)		_MMIO_MIPI(port, _MIPIA_HFP_COUNT, _MIPIC_HFP_COUNT)</div><div class='add'>+#define _MIPIA_HFP_COUNT			0xb030</div><div class='add'>+#define _MIPIC_HFP_COUNT			0xb830</div><div class='add'>+#define MIPI_HFP_COUNT(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HFP_COUNT, _MIPIC_HFP_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_HACTIVE_AREA_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb034)</div><div class='del'>-#define _MIPIC_HACTIVE_AREA_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb834)</div><div class='del'>-#define MIPI_HACTIVE_AREA_COUNT(port)	_MMIO_MIPI(port, _MIPIA_HACTIVE_AREA_COUNT, _MIPIC_HACTIVE_AREA_COUNT)</div><div class='add'>+#define _MIPIA_HACTIVE_AREA_COUNT		0xb034</div><div class='add'>+#define _MIPIC_HACTIVE_AREA_COUNT		0xb834</div><div class='add'>+#define MIPI_HACTIVE_AREA_COUNT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HACTIVE_AREA_COUNT, _MIPIC_HACTIVE_AREA_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_VSYNC_PADDING_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb038)</div><div class='del'>-#define _MIPIC_VSYNC_PADDING_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb838)</div><div class='del'>-#define MIPI_VSYNC_PADDING_COUNT(port)	_MMIO_MIPI(port, _MIPIA_VSYNC_PADDING_COUNT, _MIPIC_VSYNC_PADDING_COUNT)</div><div class='add'>+#define _MIPIA_VSYNC_PADDING_COUNT		0xb038</div><div class='add'>+#define _MIPIC_VSYNC_PADDING_COUNT		0xb838</div><div class='add'>+#define MIPI_VSYNC_PADDING_COUNT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_VSYNC_PADDING_COUNT, _MIPIC_VSYNC_PADDING_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_VBP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb03c)</div><div class='del'>-#define _MIPIC_VBP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb83c)</div><div class='del'>-#define MIPI_VBP_COUNT(port)		_MMIO_MIPI(port, _MIPIA_VBP_COUNT, _MIPIC_VBP_COUNT)</div><div class='add'>+#define _MIPIA_VBP_COUNT			0xb03c</div><div class='add'>+#define _MIPIC_VBP_COUNT			0xb83c</div><div class='add'>+#define MIPI_VBP_COUNT(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_VBP_COUNT, _MIPIC_VBP_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_VFP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb040)</div><div class='del'>-#define _MIPIC_VFP_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb840)</div><div class='del'>-#define MIPI_VFP_COUNT(port)		_MMIO_MIPI(port, _MIPIA_VFP_COUNT, _MIPIC_VFP_COUNT)</div><div class='add'>+#define _MIPIA_VFP_COUNT			0xb040</div><div class='add'>+#define _MIPIC_VFP_COUNT			0xb840</div><div class='add'>+#define MIPI_VFP_COUNT(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_VFP_COUNT, _MIPIC_VFP_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_HIGH_LOW_SWITCH_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb044)</div><div class='del'>-#define _MIPIC_HIGH_LOW_SWITCH_COUNT	(_MIPI_MMIO_BASE(dev_priv) + 0xb844)</div><div class='del'>-#define MIPI_HIGH_LOW_SWITCH_COUNT(port)	_MMIO_MIPI(port,	_MIPIA_HIGH_LOW_SWITCH_COUNT, _MIPIC_HIGH_LOW_SWITCH_COUNT)</div><div class='add'>+#define _MIPIA_HIGH_LOW_SWITCH_COUNT		0xb044</div><div class='add'>+#define _MIPIC_HIGH_LOW_SWITCH_COUNT		0xb844</div><div class='add'>+#define MIPI_HIGH_LOW_SWITCH_COUNT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port,	_MIPIA_HIGH_LOW_SWITCH_COUNT, _MIPIC_HIGH_LOW_SWITCH_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DPI_CONTROL		(_MIPI_MMIO_BASE(dev_priv) + 0xb048)</div><div class='del'>-#define _MIPIC_DPI_CONTROL		(_MIPI_MMIO_BASE(dev_priv) + 0xb848)</div><div class='del'>-#define MIPI_DPI_CONTROL(port)		_MMIO_MIPI(port, _MIPIA_DPI_CONTROL, _MIPIC_DPI_CONTROL)</div><div class='add'>+#define _MIPIA_DPI_CONTROL			0xb048</div><div class='add'>+#define _MIPIC_DPI_CONTROL			0xb848</div><div class='add'>+#define MIPI_DPI_CONTROL(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPI_CONTROL, _MIPIC_DPI_CONTROL)</div><div class='ctx'> #define  DPI_LP_MODE					(1 &lt;&lt; 6)</div><div class='ctx'> #define  BACKLIGHT_OFF					(1 &lt;&lt; 5)</div><div class='ctx'> #define  BACKLIGHT_ON					(1 &lt;&lt; 4)</div><div class='hunk'>@@ -249,28 +243,27 @@</div><div class='ctx'> #define  TURN_ON					(1 &lt;&lt; 1)</div><div class='ctx'> #define  SHUTDOWN					(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DPI_DATA			(_MIPI_MMIO_BASE(dev_priv) + 0xb04c)</div><div class='del'>-#define _MIPIC_DPI_DATA			(_MIPI_MMIO_BASE(dev_priv) + 0xb84c)</div><div class='del'>-#define MIPI_DPI_DATA(port)		_MMIO_MIPI(port, _MIPIA_DPI_DATA, _MIPIC_DPI_DATA)</div><div class='add'>+#define _MIPIA_DPI_DATA				0xb04c</div><div class='add'>+#define _MIPIC_DPI_DATA				0xb84c</div><div class='add'>+#define MIPI_DPI_DATA(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPI_DATA, _MIPIC_DPI_DATA)</div><div class='ctx'> #define  COMMAND_BYTE_SHIFT				0</div><div class='ctx'> #define  COMMAND_BYTE_MASK				(0x3f &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_INIT_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb050)</div><div class='del'>-#define _MIPIC_INIT_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb850)</div><div class='del'>-#define MIPI_INIT_COUNT(port)		_MMIO_MIPI(port, _MIPIA_INIT_COUNT, _MIPIC_INIT_COUNT)</div><div class='add'>+#define _MIPIA_INIT_COUNT			0xb050</div><div class='add'>+#define _MIPIC_INIT_COUNT			0xb850</div><div class='add'>+#define MIPI_INIT_COUNT(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INIT_COUNT, _MIPIC_INIT_COUNT)</div><div class='ctx'> #define  MASTER_INIT_TIMER_SHIFT			0</div><div class='ctx'> #define  MASTER_INIT_TIMER_MASK				(0xffff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_MAX_RETURN_PKT_SIZE	(_MIPI_MMIO_BASE(dev_priv) + 0xb054)</div><div class='del'>-#define _MIPIC_MAX_RETURN_PKT_SIZE	(_MIPI_MMIO_BASE(dev_priv) + 0xb854)</div><div class='del'>-#define MIPI_MAX_RETURN_PKT_SIZE(port)	_MMIO_MIPI(port, \</div><div class='del'>-			_MIPIA_MAX_RETURN_PKT_SIZE, _MIPIC_MAX_RETURN_PKT_SIZE)</div><div class='add'>+#define _MIPIA_MAX_RETURN_PKT_SIZE		0xb054</div><div class='add'>+#define _MIPIC_MAX_RETURN_PKT_SIZE		0xb854</div><div class='add'>+#define MIPI_MAX_RETURN_PKT_SIZE(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_MAX_RETURN_PKT_SIZE, _MIPIC_MAX_RETURN_PKT_SIZE)</div><div class='ctx'> #define  MAX_RETURN_PKT_SIZE_SHIFT			0</div><div class='ctx'> #define  MAX_RETURN_PKT_SIZE_MASK			(0x3ff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_VIDEO_MODE_FORMAT	(_MIPI_MMIO_BASE(dev_priv) + 0xb058)</div><div class='del'>-#define _MIPIC_VIDEO_MODE_FORMAT	(_MIPI_MMIO_BASE(dev_priv) + 0xb858)</div><div class='del'>-#define MIPI_VIDEO_MODE_FORMAT(port)	_MMIO_MIPI(port, _MIPIA_VIDEO_MODE_FORMAT, _MIPIC_VIDEO_MODE_FORMAT)</div><div class='add'>+#define _MIPIA_VIDEO_MODE_FORMAT		0xb058</div><div class='add'>+#define _MIPIC_VIDEO_MODE_FORMAT		0xb858</div><div class='add'>+#define MIPI_VIDEO_MODE_FORMAT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_VIDEO_MODE_FORMAT, _MIPIC_VIDEO_MODE_FORMAT)</div><div class='ctx'> #define  RANDOM_DPI_DISPLAY_RESOLUTION			(1 &lt;&lt; 4)</div><div class='ctx'> #define  DISABLE_VIDEO_BTA				(1 &lt;&lt; 3)</div><div class='ctx'> #define  IP_TG_CONFIG					(1 &lt;&lt; 2)</div><div class='hunk'>@@ -278,9 +271,9 @@</div><div class='ctx'> #define  VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS		(2 &lt;&lt; 0)</div><div class='ctx'> #define  VIDEO_MODE_BURST				(3 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_EOT_DISABLE		(_MIPI_MMIO_BASE(dev_priv) + 0xb05c)</div><div class='del'>-#define _MIPIC_EOT_DISABLE		(_MIPI_MMIO_BASE(dev_priv) + 0xb85c)</div><div class='del'>-#define MIPI_EOT_DISABLE(port)		_MMIO_MIPI(port, _MIPIA_EOT_DISABLE, _MIPIC_EOT_DISABLE)</div><div class='add'>+#define _MIPIA_EOT_DISABLE			0xb05c</div><div class='add'>+#define _MIPIC_EOT_DISABLE			0xb85c</div><div class='add'>+#define MIPI_EOT_DISABLE(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_EOT_DISABLE, _MIPIC_EOT_DISABLE)</div><div class='ctx'> #define  BXT_DEFEATURE_DPI_FIFO_CTR			(1 &lt;&lt; 9)</div><div class='ctx'> #define  BXT_DPHY_DEFEATURE_EN				(1 &lt;&lt; 8)</div><div class='ctx'> #define  LP_RX_TIMEOUT_ERROR_RECOVERY_DISABLE		(1 &lt;&lt; 7)</div><div class='hunk'>@@ -292,36 +285,36 @@</div><div class='ctx'> #define  CLOCKSTOP					(1 &lt;&lt; 1)</div><div class='ctx'> #define  EOT_DISABLE					(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_LP_BYTECLK		(_MIPI_MMIO_BASE(dev_priv) + 0xb060)</div><div class='del'>-#define _MIPIC_LP_BYTECLK		(_MIPI_MMIO_BASE(dev_priv) + 0xb860)</div><div class='del'>-#define MIPI_LP_BYTECLK(port)		_MMIO_MIPI(port, _MIPIA_LP_BYTECLK, _MIPIC_LP_BYTECLK)</div><div class='add'>+#define _MIPIA_LP_BYTECLK			0xb060</div><div class='add'>+#define _MIPIC_LP_BYTECLK			0xb860</div><div class='add'>+#define MIPI_LP_BYTECLK(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_BYTECLK, _MIPIC_LP_BYTECLK)</div><div class='ctx'> #define  LP_BYTECLK_SHIFT				0</div><div class='ctx'> #define  LP_BYTECLK_MASK				(0xffff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_TLPX_TIME_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb0a4)</div><div class='del'>-#define _MIPIC_TLPX_TIME_COUNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb8a4)</div><div class='del'>-#define MIPI_TLPX_TIME_COUNT(port)	 _MMIO_MIPI(port, _MIPIA_TLPX_TIME_COUNT, _MIPIC_TLPX_TIME_COUNT)</div><div class='add'>+#define _MIPIA_TLPX_TIME_COUNT			0xb0a4</div><div class='add'>+#define _MIPIC_TLPX_TIME_COUNT			0xb8a4</div><div class='add'>+#define MIPI_TLPX_TIME_COUNT(display, port)	 _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_TLPX_TIME_COUNT, _MIPIC_TLPX_TIME_COUNT)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_CLK_LANE_TIMING		(_MIPI_MMIO_BASE(dev_priv) + 0xb098)</div><div class='del'>-#define _MIPIC_CLK_LANE_TIMING		(_MIPI_MMIO_BASE(dev_priv) + 0xb898)</div><div class='del'>-#define MIPI_CLK_LANE_TIMING(port)	 _MMIO_MIPI(port, _MIPIA_CLK_LANE_TIMING, _MIPIC_CLK_LANE_TIMING)</div><div class='add'>+#define _MIPIA_CLK_LANE_TIMING			0xb098</div><div class='add'>+#define _MIPIC_CLK_LANE_TIMING			0xb898</div><div class='add'>+#define MIPI_CLK_LANE_TIMING(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_CLK_LANE_TIMING, _MIPIC_CLK_LANE_TIMING)</div><div class='ctx'> </div><div class='ctx'> /* bits 31:0 */</div><div class='del'>-#define _MIPIA_LP_GEN_DATA		(_MIPI_MMIO_BASE(dev_priv) + 0xb064)</div><div class='del'>-#define _MIPIC_LP_GEN_DATA		(_MIPI_MMIO_BASE(dev_priv) + 0xb864)</div><div class='del'>-#define MIPI_LP_GEN_DATA(port)		_MMIO_MIPI(port, _MIPIA_LP_GEN_DATA, _MIPIC_LP_GEN_DATA)</div><div class='add'>+#define _MIPIA_LP_GEN_DATA			0xb064</div><div class='add'>+#define _MIPIC_LP_GEN_DATA			0xb864</div><div class='add'>+#define MIPI_LP_GEN_DATA(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_GEN_DATA, _MIPIC_LP_GEN_DATA)</div><div class='ctx'> </div><div class='ctx'> /* bits 31:0 */</div><div class='del'>-#define _MIPIA_HS_GEN_DATA		(_MIPI_MMIO_BASE(dev_priv) + 0xb068)</div><div class='del'>-#define _MIPIC_HS_GEN_DATA		(_MIPI_MMIO_BASE(dev_priv) + 0xb868)</div><div class='del'>-#define MIPI_HS_GEN_DATA(port)		_MMIO_MIPI(port, _MIPIA_HS_GEN_DATA, _MIPIC_HS_GEN_DATA)</div><div class='del'>-</div><div class='del'>-#define _MIPIA_LP_GEN_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb06c)</div><div class='del'>-#define _MIPIC_LP_GEN_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb86c)</div><div class='del'>-#define MIPI_LP_GEN_CTRL(port)		_MMIO_MIPI(port, _MIPIA_LP_GEN_CTRL, _MIPIC_LP_GEN_CTRL)</div><div class='del'>-#define _MIPIA_HS_GEN_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb070)</div><div class='del'>-#define _MIPIC_HS_GEN_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb870)</div><div class='del'>-#define MIPI_HS_GEN_CTRL(port)		_MMIO_MIPI(port, _MIPIA_HS_GEN_CTRL, _MIPIC_HS_GEN_CTRL)</div><div class='add'>+#define _MIPIA_HS_GEN_DATA			0xb068</div><div class='add'>+#define _MIPIC_HS_GEN_DATA			0xb868</div><div class='add'>+#define MIPI_HS_GEN_DATA(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_GEN_DATA, _MIPIC_HS_GEN_DATA)</div><div class='add'>+</div><div class='add'>+#define _MIPIA_LP_GEN_CTRL			0xb06c</div><div class='add'>+#define _MIPIC_LP_GEN_CTRL			0xb86c</div><div class='add'>+#define MIPI_LP_GEN_CTRL(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_GEN_CTRL, _MIPIC_LP_GEN_CTRL)</div><div class='add'>+#define _MIPIA_HS_GEN_CTRL			0xb070</div><div class='add'>+#define _MIPIC_HS_GEN_CTRL			0xb870</div><div class='add'>+#define MIPI_HS_GEN_CTRL(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_GEN_CTRL, _MIPIC_HS_GEN_CTRL)</div><div class='ctx'> #define  LONG_PACKET_WORD_COUNT_SHIFT			8</div><div class='ctx'> #define  LONG_PACKET_WORD_COUNT_MASK			(0xffff &lt;&lt; 8)</div><div class='ctx'> #define  SHORT_PACKET_PARAM_SHIFT			8</div><div class='hunk'>@@ -332,9 +325,9 @@</div><div class='ctx'> #define  DATA_TYPE_MASK					(0x3f &lt;&lt; 0)</div><div class='ctx'> /* data type values, see include/video/mipi_display.h */</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_GEN_FIFO_STAT		(_MIPI_MMIO_BASE(dev_priv) + 0xb074)</div><div class='del'>-#define _MIPIC_GEN_FIFO_STAT		(_MIPI_MMIO_BASE(dev_priv) + 0xb874)</div><div class='del'>-#define MIPI_GEN_FIFO_STAT(port)	_MMIO_MIPI(port, _MIPIA_GEN_FIFO_STAT, _MIPIC_GEN_FIFO_STAT)</div><div class='add'>+#define _MIPIA_GEN_FIFO_STAT			0xb074</div><div class='add'>+#define _MIPIC_GEN_FIFO_STAT			0xb874</div><div class='add'>+#define MIPI_GEN_FIFO_STAT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_GEN_FIFO_STAT, _MIPIC_GEN_FIFO_STAT)</div><div class='ctx'> #define  DPI_FIFO_EMPTY					(1 &lt;&lt; 28)</div><div class='ctx'> #define  DBI_FIFO_EMPTY					(1 &lt;&lt; 27)</div><div class='ctx'> #define  LP_CTRL_FIFO_EMPTY				(1 &lt;&lt; 26)</div><div class='hunk'>@@ -350,16 +343,16 @@</div><div class='ctx'> #define  HS_DATA_FIFO_HALF_EMPTY			(1 &lt;&lt; 1)</div><div class='ctx'> #define  HS_DATA_FIFO_FULL				(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_HS_LS_DBI_ENABLE		(_MIPI_MMIO_BASE(dev_priv) + 0xb078)</div><div class='del'>-#define _MIPIC_HS_LS_DBI_ENABLE		(_MIPI_MMIO_BASE(dev_priv) + 0xb878)</div><div class='del'>-#define MIPI_HS_LP_DBI_ENABLE(port)	_MMIO_MIPI(port, _MIPIA_HS_LS_DBI_ENABLE, _MIPIC_HS_LS_DBI_ENABLE)</div><div class='add'>+#define _MIPIA_HS_LS_DBI_ENABLE			0xb078</div><div class='add'>+#define _MIPIC_HS_LS_DBI_ENABLE			0xb878</div><div class='add'>+#define MIPI_HS_LP_DBI_ENABLE(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_LS_DBI_ENABLE, _MIPIC_HS_LS_DBI_ENABLE)</div><div class='ctx'> #define  DBI_HS_LP_MODE_MASK				(1 &lt;&lt; 0)</div><div class='ctx'> #define  DBI_LP_MODE					(1 &lt;&lt; 0)</div><div class='ctx'> #define  DBI_HS_MODE					(0 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DPHY_PARAM		(_MIPI_MMIO_BASE(dev_priv) + 0xb080)</div><div class='del'>-#define _MIPIC_DPHY_PARAM		(_MIPI_MMIO_BASE(dev_priv) + 0xb880)</div><div class='del'>-#define MIPI_DPHY_PARAM(port)		_MMIO_MIPI(port, _MIPIA_DPHY_PARAM, _MIPIC_DPHY_PARAM)</div><div class='add'>+#define _MIPIA_DPHY_PARAM			0xb080</div><div class='add'>+#define _MIPIC_DPHY_PARAM			0xb880</div><div class='add'>+#define MIPI_DPHY_PARAM(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPHY_PARAM, _MIPIC_DPHY_PARAM)</div><div class='ctx'> #define  EXIT_ZERO_COUNT_SHIFT				24</div><div class='ctx'> #define  EXIT_ZERO_COUNT_MASK				(0x3f &lt;&lt; 24)</div><div class='ctx'> #define  TRAIL_COUNT_SHIFT				16</div><div class='hunk'>@@ -369,34 +362,34 @@</div><div class='ctx'> #define  PREPARE_COUNT_SHIFT				0</div><div class='ctx'> #define  PREPARE_COUNT_MASK				(0x3f &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DBI_BW_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb084)</div><div class='del'>-#define _MIPIC_DBI_BW_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb884)</div><div class='del'>-#define MIPI_DBI_BW_CTRL(port)		_MMIO_MIPI(port, _MIPIA_DBI_BW_CTRL, _MIPIC_DBI_BW_CTRL)</div><div class='add'>+#define _MIPIA_DBI_BW_CTRL			0xb084</div><div class='add'>+#define _MIPIC_DBI_BW_CTRL			0xb884</div><div class='add'>+#define MIPI_DBI_BW_CTRL(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DBI_BW_CTRL, _MIPIC_DBI_BW_CTRL)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_CLK_LANE_SWITCH_TIME_CNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb088)</div><div class='del'>-#define _MIPIC_CLK_LANE_SWITCH_TIME_CNT		(_MIPI_MMIO_BASE(dev_priv) + 0xb888)</div><div class='del'>-#define MIPI_CLK_LANE_SWITCH_TIME_CNT(port)	_MMIO_MIPI(port, _MIPIA_CLK_LANE_SWITCH_TIME_CNT, _MIPIC_CLK_LANE_SWITCH_TIME_CNT)</div><div class='add'>+#define _MIPIA_CLK_LANE_SWITCH_TIME_CNT		0xb088</div><div class='add'>+#define _MIPIC_CLK_LANE_SWITCH_TIME_CNT		0xb888</div><div class='add'>+#define MIPI_CLK_LANE_SWITCH_TIME_CNT(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_CLK_LANE_SWITCH_TIME_CNT, _MIPIC_CLK_LANE_SWITCH_TIME_CNT)</div><div class='ctx'> #define  LP_HS_SSW_CNT_SHIFT				16</div><div class='ctx'> #define  LP_HS_SSW_CNT_MASK				(0xffff &lt;&lt; 16)</div><div class='ctx'> #define  HS_LP_PWR_SW_CNT_SHIFT				0</div><div class='ctx'> #define  HS_LP_PWR_SW_CNT_MASK				(0xffff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_STOP_STATE_STALL		(_MIPI_MMIO_BASE(dev_priv) + 0xb08c)</div><div class='del'>-#define _MIPIC_STOP_STATE_STALL		(_MIPI_MMIO_BASE(dev_priv) + 0xb88c)</div><div class='del'>-#define MIPI_STOP_STATE_STALL(port)	_MMIO_MIPI(port, _MIPIA_STOP_STATE_STALL, _MIPIC_STOP_STATE_STALL)</div><div class='add'>+#define _MIPIA_STOP_STATE_STALL			0xb08c</div><div class='add'>+#define _MIPIC_STOP_STATE_STALL			0xb88c</div><div class='add'>+#define MIPI_STOP_STATE_STALL(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_STOP_STATE_STALL, _MIPIC_STOP_STATE_STALL)</div><div class='ctx'> #define  STOP_STATE_STALL_COUNTER_SHIFT			0</div><div class='ctx'> #define  STOP_STATE_STALL_COUNTER_MASK			(0xff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_INTR_STAT_REG_1		(_MIPI_MMIO_BASE(dev_priv) + 0xb090)</div><div class='del'>-#define _MIPIC_INTR_STAT_REG_1		(_MIPI_MMIO_BASE(dev_priv) + 0xb890)</div><div class='del'>-#define MIPI_INTR_STAT_REG_1(port)	_MMIO_MIPI(port, _MIPIA_INTR_STAT_REG_1, _MIPIC_INTR_STAT_REG_1)</div><div class='del'>-#define _MIPIA_INTR_EN_REG_1		(_MIPI_MMIO_BASE(dev_priv) + 0xb094)</div><div class='del'>-#define _MIPIC_INTR_EN_REG_1		(_MIPI_MMIO_BASE(dev_priv) + 0xb894)</div><div class='del'>-#define MIPI_INTR_EN_REG_1(port)	_MMIO_MIPI(port, _MIPIA_INTR_EN_REG_1, _MIPIC_INTR_EN_REG_1)</div><div class='add'>+#define _MIPIA_INTR_STAT_REG_1			0xb090</div><div class='add'>+#define _MIPIC_INTR_STAT_REG_1			0xb890</div><div class='add'>+#define MIPI_INTR_STAT_REG_1(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_STAT_REG_1, _MIPIC_INTR_STAT_REG_1)</div><div class='add'>+#define _MIPIA_INTR_EN_REG_1			0xb094</div><div class='add'>+#define _MIPIC_INTR_EN_REG_1			0xb894</div><div class='add'>+#define MIPI_INTR_EN_REG_1(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_EN_REG_1, _MIPIC_INTR_EN_REG_1)</div><div class='ctx'> #define  RX_CONTENTION_DETECTED				(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* XXX: only pipe A ?!? */</div><div class='del'>-#define MIPIA_DBI_TYPEC_CTRL		(_MIPI_MMIO_BASE(dev_priv) + 0xb100)</div><div class='add'>+#define MIPIA_DBI_TYPEC_CTRL(display)		(_MIPI_MMIO_BASE(display) + 0xb100)</div><div class='ctx'> #define  DBI_TYPEC_ENABLE				(1 &lt;&lt; 31)</div><div class='ctx'> #define  DBI_TYPEC_WIP					(1 &lt;&lt; 30)</div><div class='ctx'> #define  DBI_TYPEC_OPTION_SHIFT				28</div><div class='hunk'>@@ -409,9 +402,9 @@</div><div class='ctx'> </div><div class='ctx'> /* MIPI adapter registers */</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_CTRL			(_MIPI_MMIO_BASE(dev_priv) + 0xb104)</div><div class='del'>-#define _MIPIC_CTRL			(_MIPI_MMIO_BASE(dev_priv) + 0xb904)</div><div class='del'>-#define MIPI_CTRL(port)			_MMIO_MIPI(port, _MIPIA_CTRL, _MIPIC_CTRL)</div><div class='add'>+#define _MIPIA_CTRL				0xb104</div><div class='add'>+#define _MIPIC_CTRL				0xb904</div><div class='add'>+#define MIPI_CTRL(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_CTRL, _MIPIC_CTRL)</div><div class='ctx'> #define  ESCAPE_CLOCK_DIVIDER_SHIFT			5 /* A only */</div><div class='ctx'> #define  ESCAPE_CLOCK_DIVIDER_MASK			(3 &lt;&lt; 5)</div><div class='ctx'> #define  ESCAPE_CLOCK_DIVIDER_1				(0 &lt;&lt; 5)</div><div class='hunk'>@@ -442,41 +435,41 @@</div><div class='ctx'> #define  GLK_MIPIIO_PORT_POWERED			(1 &lt;&lt; 1) /* RO */</div><div class='ctx'> #define  GLK_MIPIIO_ENABLE				(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DATA_ADDRESS		(_MIPI_MMIO_BASE(dev_priv) + 0xb108)</div><div class='del'>-#define _MIPIC_DATA_ADDRESS		(_MIPI_MMIO_BASE(dev_priv) + 0xb908)</div><div class='del'>-#define MIPI_DATA_ADDRESS(port)		_MMIO_MIPI(port, _MIPIA_DATA_ADDRESS, _MIPIC_DATA_ADDRESS)</div><div class='add'>+#define _MIPIA_DATA_ADDRESS			0xb108</div><div class='add'>+#define _MIPIC_DATA_ADDRESS			0xb908</div><div class='add'>+#define MIPI_DATA_ADDRESS(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DATA_ADDRESS, _MIPIC_DATA_ADDRESS)</div><div class='ctx'> #define  DATA_MEM_ADDRESS_SHIFT				5</div><div class='ctx'> #define  DATA_MEM_ADDRESS_MASK				(0x7ffffff &lt;&lt; 5)</div><div class='ctx'> #define  DATA_VALID					(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_DATA_LENGTH		(_MIPI_MMIO_BASE(dev_priv) + 0xb10c)</div><div class='del'>-#define _MIPIC_DATA_LENGTH		(_MIPI_MMIO_BASE(dev_priv) + 0xb90c)</div><div class='del'>-#define MIPI_DATA_LENGTH(port)		_MMIO_MIPI(port, _MIPIA_DATA_LENGTH, _MIPIC_DATA_LENGTH)</div><div class='add'>+#define _MIPIA_DATA_LENGTH			0xb10c</div><div class='add'>+#define _MIPIC_DATA_LENGTH			0xb90c</div><div class='add'>+#define MIPI_DATA_LENGTH(display, port)		_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DATA_LENGTH, _MIPIC_DATA_LENGTH)</div><div class='ctx'> #define  DATA_LENGTH_SHIFT				0</div><div class='ctx'> #define  DATA_LENGTH_MASK				(0xfffff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_COMMAND_ADDRESS		(_MIPI_MMIO_BASE(dev_priv) + 0xb110)</div><div class='del'>-#define _MIPIC_COMMAND_ADDRESS		(_MIPI_MMIO_BASE(dev_priv) + 0xb910)</div><div class='del'>-#define MIPI_COMMAND_ADDRESS(port)	_MMIO_MIPI(port, _MIPIA_COMMAND_ADDRESS, _MIPIC_COMMAND_ADDRESS)</div><div class='add'>+#define _MIPIA_COMMAND_ADDRESS			0xb110</div><div class='add'>+#define _MIPIC_COMMAND_ADDRESS			0xb910</div><div class='add'>+#define MIPI_COMMAND_ADDRESS(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_COMMAND_ADDRESS, _MIPIC_COMMAND_ADDRESS)</div><div class='ctx'> #define  COMMAND_MEM_ADDRESS_SHIFT			5</div><div class='ctx'> #define  COMMAND_MEM_ADDRESS_MASK			(0x7ffffff &lt;&lt; 5)</div><div class='ctx'> #define  AUTO_PWG_ENABLE				(1 &lt;&lt; 2)</div><div class='ctx'> #define  MEMORY_WRITE_DATA_FROM_PIPE_RENDERING		(1 &lt;&lt; 1)</div><div class='ctx'> #define  COMMAND_VALID					(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_COMMAND_LENGTH		(_MIPI_MMIO_BASE(dev_priv) + 0xb114)</div><div class='del'>-#define _MIPIC_COMMAND_LENGTH		(_MIPI_MMIO_BASE(dev_priv) + 0xb914)</div><div class='del'>-#define MIPI_COMMAND_LENGTH(port)	_MMIO_MIPI(port, _MIPIA_COMMAND_LENGTH, _MIPIC_COMMAND_LENGTH)</div><div class='add'>+#define _MIPIA_COMMAND_LENGTH			0xb114</div><div class='add'>+#define _MIPIC_COMMAND_LENGTH			0xb914</div><div class='add'>+#define MIPI_COMMAND_LENGTH(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_COMMAND_LENGTH, _MIPIC_COMMAND_LENGTH)</div><div class='ctx'> #define  COMMAND_LENGTH_SHIFT(n)			(8 * (n)) /* n: 0...3 */</div><div class='ctx'> #define  COMMAND_LENGTH_MASK(n)				(0xff &lt;&lt; (8 * (n)))</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_READ_DATA_RETURN0	(_MIPI_MMIO_BASE(dev_priv) + 0xb118)</div><div class='del'>-#define _MIPIC_READ_DATA_RETURN0	(_MIPI_MMIO_BASE(dev_priv) + 0xb918)</div><div class='del'>-#define MIPI_READ_DATA_RETURN(port, n) _MMIO(_MIPI(port, _MIPIA_READ_DATA_RETURN0, _MIPIC_READ_DATA_RETURN0) + 4 * (n)) /* n: 0...7 */</div><div class='add'>+#define _MIPIA_READ_DATA_RETURN0		0xb118</div><div class='add'>+#define _MIPIC_READ_DATA_RETURN0		0xb918</div><div class='add'>+#define MIPI_READ_DATA_RETURN(display, port, n)	_MMIO_MIPI(_MIPI_MMIO_BASE(display) + 4 * (n), port, _MIPIA_READ_DATA_RETURN0, _MIPIC_READ_DATA_RETURN0) /* n: 0...7 */</div><div class='ctx'> </div><div class='del'>-#define _MIPIA_READ_DATA_VALID		(_MIPI_MMIO_BASE(dev_priv) + 0xb138)</div><div class='del'>-#define _MIPIC_READ_DATA_VALID		(_MIPI_MMIO_BASE(dev_priv) + 0xb938)</div><div class='del'>-#define MIPI_READ_DATA_VALID(port)	_MMIO_MIPI(port, _MIPIA_READ_DATA_VALID, _MIPIC_READ_DATA_VALID)</div><div class='add'>+#define _MIPIA_READ_DATA_VALID			0xb138</div><div class='add'>+#define _MIPIC_READ_DATA_VALID			0xb938</div><div class='add'>+#define MIPI_READ_DATA_VALID(display, port)	_MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_READ_DATA_VALID, _MIPIC_READ_DATA_VALID)</div><div class='ctx'> #define  READ_DATA_VALID(n)				(1 &lt;&lt; (n))</div><div class='ctx'> </div><div class='ctx'> #endif /* __VLV_DSI_REGS_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c<br/>index dcbfe32fd30c..81f65cab1330 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_context.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_context.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_context.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_context.c</a></div><div class='hunk'>@@ -879,6 +879,7 @@ static int set_proto_ctx_param(struct drm_i915_file_private *fpriv,</div><div class='ctx'> 			       struct i915_gem_proto_context *pc,</div><div class='ctx'> 			       struct drm_i915_gem_context_param *args)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = fpriv-&gt;i915;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (args-&gt;param) {</div><div class='hunk'>@@ -904,6 +905,13 @@ static int set_proto_ctx_param(struct drm_i915_file_private *fpriv,</div><div class='ctx'> 			pc-&gt;user_flags &amp;= ~BIT(UCONTEXT_BANNABLE);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case I915_CONTEXT_PARAM_LOW_LATENCY:</div><div class='add'>+		if (intel_uc_uses_guc_submission(&amp;to_gt(i915)-&gt;uc))</div><div class='add'>+			pc-&gt;user_flags |= BIT(UCONTEXT_LOW_LATENCY);</div><div class='add'>+		else</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case I915_CONTEXT_PARAM_RECOVERABLE:</div><div class='ctx'> 		if (args-&gt;size)</div><div class='ctx'> 			ret = -EINVAL;</div><div class='hunk'>@@ -992,6 +1000,9 @@ static int intel_context_set_gem(struct intel_context *ce,</div><div class='ctx'> 	if (sseu.slice_mask &amp;&amp; !WARN_ON(ce-&gt;engine-&gt;class != RENDER_CLASS))</div><div class='ctx'> 		ret = intel_context_reconfigure_sseu(ce, sseu);</div><div class='ctx'> </div><div class='add'>+	if (test_bit(UCONTEXT_LOW_LATENCY, &amp;ctx-&gt;user_flags))</div><div class='add'>+		__set_bit(CONTEXT_LOW_LATENCY, &amp;ce-&gt;flags);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1630,6 +1641,9 @@ i915_gem_create_context(struct drm_i915_private *i915,</div><div class='ctx'> 	if (vm)</div><div class='ctx'> 		ctx-&gt;vm = vm;</div><div class='ctx'> </div><div class='add'>+	/* Assign early so intel_context_set_gem can access these flags */</div><div class='add'>+	ctx-&gt;user_flags = pc-&gt;user_flags;</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;ctx-&gt;engines_mutex);</div><div class='ctx'> 	if (pc-&gt;num_user_engines &gt;= 0) {</div><div class='ctx'> 		i915_gem_context_set_user_engines(ctx);</div><div class='hunk'>@@ -1652,8 +1666,6 @@ i915_gem_create_context(struct drm_i915_private *i915,</div><div class='ctx'> 	 * is no remap info, it will be a NOP. */</div><div class='ctx'> 	ctx-&gt;remap_slice = ALL_L3_SLICES(i915);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;user_flags = pc-&gt;user_flags;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(ctx-&gt;hang_timestamp); i++)</div><div class='ctx'> 		ctx-&gt;hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h<br/>index 03bc7f9d191b..b6d97da63d1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_context_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_context_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_context_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_context_types.h</a></div><div class='hunk'>@@ -338,6 +338,7 @@ struct i915_gem_context {</div><div class='ctx'> #define UCONTEXT_BANNABLE		2</div><div class='ctx'> #define UCONTEXT_RECOVERABLE		3</div><div class='ctx'> #define UCONTEXT_PERSISTENCE		4</div><div class='add'>+#define UCONTEXT_LOW_LATENCY		5</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='ctx'> 	 * @flags: small set of booleans</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c<br/>index d3a771afb083..42619fc05de4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c</a></div><div class='hunk'>@@ -255,7 +255,6 @@ struct i915_execbuffer {</div><div class='ctx'> 	struct intel_context *context; /* logical state for the request */</div><div class='ctx'> 	struct i915_gem_context *gem_context; /** caller's context */</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='del'>-	intel_wakeref_t wakeref_gt0;</div><div class='ctx'> </div><div class='ctx'> 	/** our requests to build */</div><div class='ctx'> 	struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];</div><div class='hunk'>@@ -2457,7 +2456,7 @@ static int eb_submit(struct i915_execbuffer *eb)</div><div class='ctx'>  * The engine index is returned.</div><div class='ctx'>  */</div><div class='ctx'> static unsigned int</div><div class='del'>-gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,</div><div class='add'>+gen8_dispatch_bsd_engine(struct drm_i915_private *i915,</div><div class='ctx'> 			 struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_file_private *file_priv = file-&gt;driver_priv;</div><div class='hunk'>@@ -2465,7 +2464,7 @@ gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	/* Check whether the file_priv has already selected one ring. */</div><div class='ctx'> 	if ((int)file_priv-&gt;bsd_engine &lt; 0)</div><div class='ctx'> 		file_priv-&gt;bsd_engine =</div><div class='del'>-			get_random_u32_below(dev_priv-&gt;engine_uabi_class_count[I915_ENGINE_CLASS_VIDEO]);</div><div class='add'>+			get_random_u32_below(i915-&gt;engine_uabi_class_count[I915_ENGINE_CLASS_VIDEO]);</div><div class='ctx'> </div><div class='ctx'> 	return file_priv-&gt;bsd_engine;</div><div class='ctx'> }</div><div class='hunk'>@@ -2686,7 +2685,6 @@ static int</div><div class='ctx'> eb_select_engine(struct i915_execbuffer *eb)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_context *ce, *child;</div><div class='del'>-	struct intel_gt *gt;</div><div class='ctx'> 	unsigned int idx;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -2710,17 +2708,10 @@ eb_select_engine(struct i915_execbuffer *eb)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	eb-&gt;num_batches = ce-&gt;parallel.number_children + 1;</div><div class='del'>-	gt = ce-&gt;engine-&gt;gt;</div><div class='ctx'> </div><div class='ctx'> 	for_each_child(ce, child)</div><div class='ctx'> 		intel_context_get(child);</div><div class='ctx'> 	eb-&gt;wakeref = intel_gt_pm_get(ce-&gt;engine-&gt;gt);</div><div class='del'>-	/*</div><div class='del'>-	 * Keep GT0 active on MTL so that i915_vma_parked() doesn't</div><div class='del'>-	 * free VMAs while execbuf ioctl is validating VMAs.</div><div class='del'>-	 */</div><div class='del'>-	if (gt-&gt;info.id)</div><div class='del'>-		eb-&gt;wakeref_gt0 = intel_gt_pm_get(to_gt(gt-&gt;i915));</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(CONTEXT_ALLOC_BIT, &amp;ce-&gt;flags)) {</div><div class='ctx'> 		err = intel_context_alloc_state(ce);</div><div class='hunk'>@@ -2759,9 +2750,6 @@ eb_select_engine(struct i915_execbuffer *eb)</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	if (gt-&gt;info.id)</div><div class='del'>-		intel_gt_pm_put(to_gt(gt-&gt;i915), eb-&gt;wakeref_gt0);</div><div class='del'>-</div><div class='ctx'> 	intel_gt_pm_put(ce-&gt;engine-&gt;gt, eb-&gt;wakeref);</div><div class='ctx'> 	for_each_child(ce, child)</div><div class='ctx'> 		intel_context_put(child);</div><div class='hunk'>@@ -2775,12 +2763,6 @@ eb_put_engine(struct i915_execbuffer *eb)</div><div class='ctx'> 	struct intel_context *child;</div><div class='ctx'> </div><div class='ctx'> 	i915_vm_put(eb-&gt;context-&gt;vm);</div><div class='del'>-	/*</div><div class='del'>-	 * This works in conjunction with eb_select_engine() to prevent</div><div class='del'>-	 * i915_vma_parked() from interfering while execbuf validates vmas.</div><div class='del'>-	 */</div><div class='del'>-	if (eb-&gt;gt-&gt;info.id)</div><div class='del'>-		intel_gt_pm_put(to_gt(eb-&gt;gt-&gt;i915), eb-&gt;wakeref_gt0);</div><div class='ctx'> 	intel_gt_pm_put(eb-&gt;context-&gt;engine-&gt;gt, eb-&gt;wakeref);</div><div class='ctx'> 	for_each_child(eb-&gt;context, child)</div><div class='ctx'> 		intel_context_put(child);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h<br/>index 0c5cdab278b6..1495b6074492 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_object_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_object_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_object_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_object_types.h</a></div><div class='hunk'>@@ -386,7 +386,7 @@ struct drm_i915_gem_object {</div><div class='ctx'> 	 * and kernel mode driver for caching policy control after GEN12.</div><div class='ctx'> 	 * In the meantime platform specific tables are created to translate</div><div class='ctx'> 	 * i915_cache_level into pat index, for more details check the macros</div><div class='del'>-	 * defined i915/i915_pci.c, e.g. PVC_CACHELEVEL.</div><div class='add'>+	 * defined i915/i915_pci.c, e.g. TGL_CACHELEVEL.</div><div class='ctx'> 	 * For backward compatibility, this field contains values exactly match</div><div class='ctx'> 	 * the entries of enum i915_cache_level for pre-GEN12 platforms (See</div><div class='ctx'> 	 * LEGACY_CACHELEVEL), so that the PTE encode functions for these</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c<br/>index 38b72d86560f..c5e1c718a6d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_shmem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_shmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_shmem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_shmem.c</a></div><div class='hunk'>@@ -654,7 +654,7 @@ i915_gem_object_create_shmem(struct drm_i915_private *i915,</div><div class='ctx'> </div><div class='ctx'> /* Allocate a new GEM object and fill it with the supplied data */</div><div class='ctx'> struct drm_i915_gem_object *</div><div class='del'>-i915_gem_object_create_shmem_from_data(struct drm_i915_private *dev_priv,</div><div class='add'>+i915_gem_object_create_shmem_from_data(struct drm_i915_private *i915,</div><div class='ctx'> 				       const void *data, resource_size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='hunk'>@@ -663,8 +663,8 @@ i915_gem_object_create_shmem_from_data(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	resource_size_t offset;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	GEM_WARN_ON(IS_DGFX(dev_priv));</div><div class='del'>-	obj = i915_gem_object_create_shmem(dev_priv, round_up(size, PAGE_SIZE));</div><div class='add'>+	GEM_WARN_ON(IS_DGFX(i915));</div><div class='add'>+	obj = i915_gem_object_create_shmem(i915, round_up(size, PAGE_SIZE));</div><div class='ctx'> 	if (IS_ERR(obj))</div><div class='ctx'> 		return obj;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.h b/drivers/gpu/drm/i915/gem/i915_gem_stolen.h<br/>index 258381d1c054..dfe0db8bb1b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_stolen.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_stolen.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_stolen.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_stolen.h</a></div><div class='hunk'>@@ -14,14 +14,14 @@ struct drm_i915_gem_object;</div><div class='ctx'> </div><div class='ctx'> #define i915_stolen_fb drm_mm_node</div><div class='ctx'> </div><div class='del'>-int i915_gem_stolen_insert_node(struct drm_i915_private *dev_priv,</div><div class='add'>+int i915_gem_stolen_insert_node(struct drm_i915_private *i915,</div><div class='ctx'> 				struct drm_mm_node *node, u64 size,</div><div class='ctx'> 				unsigned alignment);</div><div class='del'>-int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *dev_priv,</div><div class='add'>+int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *i915,</div><div class='ctx'> 					 struct drm_mm_node *node, u64 size,</div><div class='ctx'> 					 unsigned alignment, u64 start,</div><div class='ctx'> 					 u64 end);</div><div class='del'>-void i915_gem_stolen_remove_node(struct drm_i915_private *dev_priv,</div><div class='add'>+void i915_gem_stolen_remove_node(struct drm_i915_private *i915,</div><div class='ctx'> 				 struct drm_mm_node *node);</div><div class='ctx'> struct intel_memory_region *</div><div class='ctx'> i915_gem_stolen_smem_setup(struct drm_i915_private *i915, u16 type,</div><div class='hunk'>@@ -31,7 +31,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,</div><div class='ctx'> 			   u16 instance);</div><div class='ctx'> </div><div class='ctx'> struct drm_i915_gem_object *</div><div class='del'>-i915_gem_object_create_stolen(struct drm_i915_private *dev_priv,</div><div class='add'>+i915_gem_object_create_stolen(struct drm_i915_private *i915,</div><div class='ctx'> 			      resource_size_t size);</div><div class='ctx'> </div><div class='ctx'> bool i915_gem_object_is_stolen(const struct drm_i915_gem_object *obj);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c<br/>index a049ca0b7980..d9eb84c1d2f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_tiling.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_tiling.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_tiling.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_tiling.c</a></div><div class='hunk'>@@ -343,12 +343,12 @@ int</div><div class='ctx'> i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 			  struct drm_file *file)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(dev);</div><div class='ctx'> 	struct drm_i915_gem_set_tiling *args = data;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!to_gt(dev_priv)-&gt;ggtt-&gt;num_fences)</div><div class='add'>+	if (!to_gt(i915)-&gt;ggtt-&gt;num_fences)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	obj = i915_gem_object_lookup(file, args-&gt;handle);</div><div class='hunk'>@@ -374,9 +374,9 @@ i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		args-&gt;stride = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (args-&gt;tiling_mode == I915_TILING_X)</div><div class='del'>-			args-&gt;swizzle_mode = to_gt(dev_priv)-&gt;ggtt-&gt;bit_6_swizzle_x;</div><div class='add'>+			args-&gt;swizzle_mode = to_gt(i915)-&gt;ggtt-&gt;bit_6_swizzle_x;</div><div class='ctx'> 		else</div><div class='del'>-			args-&gt;swizzle_mode = to_gt(dev_priv)-&gt;ggtt-&gt;bit_6_swizzle_y;</div><div class='add'>+			args-&gt;swizzle_mode = to_gt(i915)-&gt;ggtt-&gt;bit_6_swizzle_y;</div><div class='ctx'> </div><div class='ctx'> 		/* Hide bit 17 swizzling from the user.  This prevents old Mesa</div><div class='ctx'> 		 * from aborting the application on sw fallbacks to bit 17,</div><div class='hunk'>@@ -427,11 +427,11 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 			  struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_get_tiling *args = data;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(dev);</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int err = -ENOENT;</div><div class='ctx'> </div><div class='del'>-	if (!to_gt(dev_priv)-&gt;ggtt-&gt;num_fences)</div><div class='add'>+	if (!to_gt(i915)-&gt;ggtt-&gt;num_fences)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='hunk'>@@ -447,10 +447,10 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 	switch (args-&gt;tiling_mode) {</div><div class='ctx'> 	case I915_TILING_X:</div><div class='del'>-		args-&gt;swizzle_mode = to_gt(dev_priv)-&gt;ggtt-&gt;bit_6_swizzle_x;</div><div class='add'>+		args-&gt;swizzle_mode = to_gt(i915)-&gt;ggtt-&gt;bit_6_swizzle_x;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_TILING_Y:</div><div class='del'>-		args-&gt;swizzle_mode = to_gt(dev_priv)-&gt;ggtt-&gt;bit_6_swizzle_y;</div><div class='add'>+		args-&gt;swizzle_mode = to_gt(i915)-&gt;ggtt-&gt;bit_6_swizzle_y;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 	case I915_TILING_NONE:</div><div class='hunk'>@@ -459,7 +459,7 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */</div><div class='del'>-	if (dev_priv-&gt;gem_quirks &amp; GEM_QUIRK_PIN_SWIZZLED_PAGES)</div><div class='add'>+	if (i915-&gt;gem_quirks &amp; GEM_QUIRK_PIN_SWIZZLED_PAGES)</div><div class='ctx'> 		args-&gt;phys_swizzle_mode = I915_BIT_6_SWIZZLE_UNKNOWN;</div><div class='ctx'> 	else</div><div class='ctx'> 		args-&gt;phys_swizzle_mode = args-&gt;swizzle_mode;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c<br/>index 61abfb505766..09b68713ab32 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_userptr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/i915_gem_userptr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/i915_gem_userptr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/i915_gem_userptr.c</a></div><div class='hunk'>@@ -463,13 +463,13 @@ i915_gem_userptr_ioctl(struct drm_device *dev,</div><div class='ctx'> 		       struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	static struct lock_class_key __maybe_unused lock_class;</div><div class='del'>-	struct drm_i915_private *dev_priv = to_i915(dev);</div><div class='add'>+	struct drm_i915_private *i915 = to_i915(dev);</div><div class='ctx'> 	struct drm_i915_gem_userptr *args = data;</div><div class='ctx'> 	struct drm_i915_gem_object __maybe_unused *obj;</div><div class='ctx'> 	int __maybe_unused ret;</div><div class='ctx'> 	u32 __maybe_unused handle;</div><div class='ctx'> </div><div class='del'>-	if (!HAS_LLC(dev_priv) &amp;&amp; !HAS_SNOOP(dev_priv)) {</div><div class='add'>+	if (!HAS_LLC(i915) &amp;&amp; !HAS_SNOOP(i915)) {</div><div class='ctx'> 		/* We cannot support coherent userptr objects on hw without</div><div class='ctx'> 		 * LLC and broken snooping.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -501,7 +501,7 @@ i915_gem_userptr_ioctl(struct drm_device *dev,</div><div class='ctx'> 		 * On almost all of the older hw, we cannot tell the GPU that</div><div class='ctx'> 		 * a page is readonly.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!to_gt(dev_priv)-&gt;vm-&gt;has_read_only)</div><div class='add'>+		if (!to_gt(i915)-&gt;vm-&gt;has_read_only)</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c<br/>index 3ff3d8889c6c..84d41e6ccf05 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/selftests/huge_pages.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/selftests/huge_pages.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/selftests/huge_pages.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/selftests/huge_pages.c</a></div><div class='hunk'>@@ -713,7 +713,7 @@ static int igt_ppgtt_huge_fill(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = arg;</div><div class='ctx'> 	unsigned int supported = RUNTIME_INFO(i915)-&gt;page_sizes;</div><div class='del'>-	bool has_pte64 = GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50);</div><div class='add'>+	bool has_pte64 = GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55);</div><div class='ctx'> 	struct i915_address_space *vm;</div><div class='ctx'> 	struct i915_gem_context *ctx;</div><div class='ctx'> 	unsigned long max_pages;</div><div class='hunk'>@@ -857,7 +857,7 @@ out:</div><div class='ctx'> static int igt_ppgtt_64K(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = arg;</div><div class='del'>-	bool has_pte64 = GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50);</div><div class='add'>+	bool has_pte64 = GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55);</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	struct i915_address_space *vm;</div><div class='ctx'> 	struct i915_gem_context *ctx;</div><div class='hunk'>@@ -1969,19 +1969,19 @@ int i915_gem_huge_page_mock_selftests(void)</div><div class='ctx'> 		SUBTEST(igt_mock_memory_region_huge_pages),</div><div class='ctx'> 		SUBTEST(igt_mock_ppgtt_misaligned_dma),</div><div class='ctx'> 	};</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='add'>+	struct drm_i915_private *i915;</div><div class='ctx'> 	struct i915_ppgtt *ppgtt;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	dev_priv = mock_gem_device();</div><div class='del'>-	if (!dev_priv)</div><div class='add'>+	i915 = mock_gem_device();</div><div class='add'>+	if (!i915)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* Pretend to be a device which supports the 48b PPGTT */</div><div class='del'>-	RUNTIME_INFO(dev_priv)-&gt;ppgtt_type = INTEL_PPGTT_FULL;</div><div class='del'>-	RUNTIME_INFO(dev_priv)-&gt;ppgtt_size = 48;</div><div class='add'>+	RUNTIME_INFO(i915)-&gt;ppgtt_type = INTEL_PPGTT_FULL;</div><div class='add'>+	RUNTIME_INFO(i915)-&gt;ppgtt_size = 48;</div><div class='ctx'> </div><div class='del'>-	ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0);</div><div class='add'>+	ppgtt = i915_ppgtt_create(to_gt(i915), 0);</div><div class='ctx'> 	if (IS_ERR(ppgtt)) {</div><div class='ctx'> 		err = PTR_ERR(ppgtt);</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -2005,7 +2005,7 @@ int i915_gem_huge_page_mock_selftests(void)</div><div class='ctx'> out_put:</div><div class='ctx'> 	i915_vm_put(&amp;ppgtt-&gt;vm);</div><div class='ctx'> out_unlock:</div><div class='del'>-	mock_destroy_device(dev_priv);</div><div class='add'>+	mock_destroy_device(i915);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c<br/>index 10a7847f1b04..bac15196b4d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c</a></div><div class='hunk'>@@ -117,7 +117,7 @@ static bool fastblit_supports_x_tiling(const struct drm_i915_private *i915)</div><div class='ctx'> 	if (gen &lt; 12)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return HAS_DISPLAY(i915);</div><div class='hunk'>@@ -166,7 +166,7 @@ static int prepare_blit(const struct tiled_blits *t,</div><div class='ctx'> 		src_pitch = t-&gt;width; /* in dwords */</div><div class='ctx'> 		if (src-&gt;tiling == CLIENT_TILING_Y) {</div><div class='ctx'> 			src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);</div><div class='del'>-			if (GRAPHICS_VER_FULL(to_i915(batch-&gt;base.dev)) &gt;= IP_VER(12, 50))</div><div class='add'>+			if (GRAPHICS_VER_FULL(to_i915(batch-&gt;base.dev)) &gt;= IP_VER(12, 55))</div><div class='ctx'> 				src_4t = XY_FAST_COPY_BLT_D1_SRC_TILE4;</div><div class='ctx'> 		} else if (src-&gt;tiling == CLIENT_TILING_X) {</div><div class='ctx'> 			src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(TILE_X);</div><div class='hunk'>@@ -177,7 +177,7 @@ static int prepare_blit(const struct tiled_blits *t,</div><div class='ctx'> 		dst_pitch = t-&gt;width; /* in dwords */</div><div class='ctx'> 		if (dst-&gt;tiling == CLIENT_TILING_Y) {</div><div class='ctx'> 			dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);</div><div class='del'>-			if (GRAPHICS_VER_FULL(to_i915(batch-&gt;base.dev)) &gt;= IP_VER(12, 50))</div><div class='add'>+			if (GRAPHICS_VER_FULL(to_i915(batch-&gt;base.dev)) &gt;= IP_VER(12, 55))</div><div class='ctx'> 				dst_4t = XY_FAST_COPY_BLT_D1_DST_TILE4;</div><div class='ctx'> 		} else if (dst-&gt;tiling == CLIENT_TILING_X) {</div><div class='ctx'> 			dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(TILE_X);</div><div class='hunk'>@@ -365,7 +365,7 @@ static u64 tiled_offset(const struct intel_gt *gt,</div><div class='ctx'> 		v += x;</div><div class='ctx'> </div><div class='ctx'> 		swizzle = gt-&gt;ggtt-&gt;bit_6_swizzle_x;</div><div class='del'>-	} else if (GRAPHICS_VER_FULL(gt-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	} else if (GRAPHICS_VER_FULL(gt-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		/* Y-major tiling layout is Tile4 for Xe_HP and beyond */</div><div class='ctx'> 		v = linear_x_y_to_ftiled_pos(x_pos, y_pos, stride, 32);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c<br/>index d684a70f2c04..65a931ea80e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include "i915_drv.h"</div><div class='ctx'> #include "i915_selftest.h"</div><div class='ctx'> #include "gem/i915_gem_context.h"</div><div class='add'>+#include "gt/intel_gt.h"</div><div class='ctx'> </div><div class='ctx'> #include "mock_context.h"</div><div class='ctx'> #include "mock_dmabuf.h"</div><div class='hunk'>@@ -155,6 +156,7 @@ static int verify_access(struct drm_i915_private *i915,</div><div class='ctx'> 	struct file *file;</div><div class='ctx'> 	u32 *vaddr;</div><div class='ctx'> 	int err = 0, i;</div><div class='add'>+	unsigned int mode;</div><div class='ctx'> </div><div class='ctx'> 	file = mock_file(i915);</div><div class='ctx'> 	if (IS_ERR(file))</div><div class='hunk'>@@ -194,7 +196,8 @@ static int verify_access(struct drm_i915_private *i915,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_file;</div><div class='ctx'> </div><div class='del'>-	vaddr = i915_gem_object_pin_map_unlocked(native_obj, I915_MAP_WB);</div><div class='add'>+	mode = intel_gt_coherent_map_type(to_gt(i915), native_obj, true);</div><div class='add'>+	vaddr = i915_gem_object_pin_map_unlocked(native_obj, mode);</div><div class='ctx'> 	if (IS_ERR(vaddr)) {</div><div class='ctx'> 		err = PTR_ERR(vaddr);</div><div class='ctx'> 		goto out_file;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c<br/>index e1bf13e3d307..e9f65f27b53f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/gen8_engine_cs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/gen8_engine_cs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/gen8_engine_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/gen8_engine_cs.c</a></div><div class='hunk'>@@ -189,9 +189,6 @@ static bool gen12_needs_ccs_aux_inv(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='ctx'> 	i915_reg_t reg = gen12_get_aux_inv_reg(engine);</div><div class='ctx'> </div><div class='del'>-	if (IS_PONTEVECCHIO(engine-&gt;i915))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * So far platforms supported by i915 having flat ccs do not require</div><div class='ctx'> 	 * AUX invalidation. Check also whether the engine requires it.</div><div class='hunk'>@@ -743,21 +740,25 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Wa_14014475959:dg2 */</div><div class='del'>-#define CCS_SEMAPHORE_PPHWSP_OFFSET	0x540</div><div class='del'>-static u32 ccs_semaphore_offset(struct i915_request *rq)</div><div class='add'>+/* Wa_16019325821 */</div><div class='add'>+/* Wa_14019159160 */</div><div class='add'>+#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET	0x540</div><div class='add'>+static u32 hold_switchout_semaphore_offset(struct i915_request *rq)</div><div class='ctx'> {</div><div class='ctx'> 	return i915_ggtt_offset(rq-&gt;context-&gt;state) +</div><div class='del'>-		(LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;</div><div class='add'>+		(LRC_PPHWSP_PN * PAGE_SIZE) + HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Wa_14014475959:dg2 */</div><div class='del'>-static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)</div><div class='add'>+/* Wa_16019325821 */</div><div class='add'>+/* Wa_14019159160 */</div><div class='add'>+static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	*cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL |</div><div class='ctx'> 		MI_ATOMIC_MOVE;</div><div class='del'>-	*cs++ = ccs_semaphore_offset(rq);</div><div class='add'>+	*cs++ = hold_switchout_semaphore_offset(rq);</div><div class='ctx'> 	*cs++ = 0;</div><div class='ctx'> 	*cs++ = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -773,7 +774,7 @@ static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)</div><div class='ctx'> 		MI_SEMAPHORE_POLL |</div><div class='ctx'> 		MI_SEMAPHORE_SAD_EQ_SDD;</div><div class='ctx'> 	*cs++ = 0;</div><div class='del'>-	*cs++ = ccs_semaphore_offset(rq);</div><div class='add'>+	*cs++ = hold_switchout_semaphore_offset(rq);</div><div class='ctx'> 	*cs++ = 0;</div><div class='ctx'> </div><div class='ctx'> 	return cs;</div><div class='hunk'>@@ -790,8 +791,10 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)</div><div class='ctx'> 		cs = gen12_emit_preempt_busywait(rq, cs);</div><div class='ctx'> </div><div class='ctx'> 	/* Wa_14014475959:dg2 */</div><div class='del'>-	if (intel_engine_uses_wa_hold_ccs_switchout(rq-&gt;engine))</div><div class='del'>-		cs = ccs_emit_wa_busywait(rq, cs);</div><div class='add'>+	/* Wa_16019325821 */</div><div class='add'>+	/* Wa_14019159160 */</div><div class='add'>+	if (intel_engine_uses_wa_hold_switchout(rq-&gt;engine))</div><div class='add'>+		cs = hold_switchout_emit_wa_busywait(rq, cs);</div><div class='ctx'> </div><div class='ctx'> 	rq-&gt;tail = intel_ring_offset(rq, cs);</div><div class='ctx'> 	assert_ring_tail_valid(rq-&gt;ring, rq-&gt;tail);</div><div class='hunk'>@@ -827,7 +830,7 @@ u32 *gen12_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs)</div><div class='ctx'> 		cs = gen12_emit_pipe_control(cs, 0,</div><div class='ctx'> 					     PIPE_CONTROL_DEPTH_CACHE_FLUSH, 0);</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER(i915) == 12 &amp;&amp; GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER(i915) == 12 &amp;&amp; GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		/* Wa_1409600907 */</div><div class='ctx'> 		flags |= PIPE_CONTROL_DEPTH_STALL;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c<br/>index 81bf2216371b..398d60a66410 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/gen8_ppgtt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/gen8_ppgtt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/gen8_ppgtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/gen8_ppgtt.c</a></div><div class='hunk'>@@ -500,11 +500,11 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-xehpsdv_ppgtt_insert_huge(struct i915_address_space *vm,</div><div class='del'>-			  struct i915_vma_resource *vma_res,</div><div class='del'>-			  struct sgt_dma *iter,</div><div class='del'>-			  unsigned int pat_index,</div><div class='del'>-			  u32 flags)</div><div class='add'>+xehp_ppgtt_insert_huge(struct i915_address_space *vm,</div><div class='add'>+		       struct i915_vma_resource *vma_res,</div><div class='add'>+		       struct sgt_dma *iter,</div><div class='add'>+		       unsigned int pat_index,</div><div class='add'>+		       u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	const gen8_pte_t pte_encode = vm-&gt;pte_encode(0, pat_index, flags);</div><div class='ctx'> 	unsigned int rem = sg_dma_len(iter-&gt;sg);</div><div class='hunk'>@@ -741,8 +741,8 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm,</div><div class='ctx'> 	struct sgt_dma iter = sgt_dma(vma_res);</div><div class='ctx'> </div><div class='ctx'> 	if (vma_res-&gt;bi.page_sizes.sg &gt; I915_GTT_PAGE_SIZE) {</div><div class='del'>-		if (GRAPHICS_VER_FULL(vm-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='del'>-			xehpsdv_ppgtt_insert_huge(vm, vma_res, &amp;iter, pat_index, flags);</div><div class='add'>+		if (GRAPHICS_VER_FULL(vm-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='add'>+			xehp_ppgtt_insert_huge(vm, vma_res, &amp;iter, pat_index, flags);</div><div class='ctx'> 		else</div><div class='ctx'> 			gen8_ppgtt_insert_huge(vm, vma_res, &amp;iter, pat_index, flags);</div><div class='ctx'> 	} else  {</div><div class='hunk'>@@ -781,11 +781,11 @@ static void gen8_ppgtt_insert_entry(struct i915_address_space *vm,</div><div class='ctx'> 	drm_clflush_virt_range(&amp;vaddr[gen8_pd_index(idx, 0)], sizeof(*vaddr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __xehpsdv_ppgtt_insert_entry_lm(struct i915_address_space *vm,</div><div class='del'>-					    dma_addr_t addr,</div><div class='del'>-					    u64 offset,</div><div class='del'>-					    unsigned int pat_index,</div><div class='del'>-					    u32 flags)</div><div class='add'>+static void xehp_ppgtt_insert_entry_lm(struct i915_address_space *vm,</div><div class='add'>+				       dma_addr_t addr,</div><div class='add'>+				       u64 offset,</div><div class='add'>+				       unsigned int pat_index,</div><div class='add'>+				       u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	u64 idx = offset &gt;&gt; GEN8_PTE_SHIFT;</div><div class='ctx'> 	struct i915_page_directory * const pdp =</div><div class='hunk'>@@ -810,15 +810,15 @@ static void __xehpsdv_ppgtt_insert_entry_lm(struct i915_address_space *vm,</div><div class='ctx'> 	vaddr[gen8_pd_index(idx, 0) / 16] = vm-&gt;pte_encode(addr, pat_index, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xehpsdv_ppgtt_insert_entry(struct i915_address_space *vm,</div><div class='del'>-				       dma_addr_t addr,</div><div class='del'>-				       u64 offset,</div><div class='del'>-				       unsigned int pat_index,</div><div class='del'>-				       u32 flags)</div><div class='add'>+static void xehp_ppgtt_insert_entry(struct i915_address_space *vm,</div><div class='add'>+				    dma_addr_t addr,</div><div class='add'>+				    u64 offset,</div><div class='add'>+				    unsigned int pat_index,</div><div class='add'>+				    u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	if (flags &amp; PTE_LM)</div><div class='del'>-		return __xehpsdv_ppgtt_insert_entry_lm(vm, addr, offset,</div><div class='del'>-						       pat_index, flags);</div><div class='add'>+		return xehp_ppgtt_insert_entry_lm(vm, addr, offset,</div><div class='add'>+						  pat_index, flags);</div><div class='ctx'> </div><div class='ctx'> 	return gen8_ppgtt_insert_entry(vm, addr, offset, pat_index, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -1045,7 +1045,7 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,</div><div class='ctx'> 	ppgtt-&gt;vm.bind_async_flags = I915_VMA_LOCAL_BIND;</div><div class='ctx'> 	ppgtt-&gt;vm.insert_entries = gen8_ppgtt_insert;</div><div class='ctx'> 	if (HAS_64K_PAGES(gt-&gt;i915))</div><div class='del'>-		ppgtt-&gt;vm.insert_page = xehpsdv_ppgtt_insert_entry;</div><div class='add'>+		ppgtt-&gt;vm.insert_page = xehp_ppgtt_insert_entry;</div><div class='ctx'> 	else</div><div class='ctx'> 		ppgtt-&gt;vm.insert_page = gen8_ppgtt_insert_entry;</div><div class='ctx'> 	ppgtt-&gt;vm.allocate_va_range = gen8_ppgtt_alloc;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h<br/>index 7eccbd70d89f..ed95a7b57cbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_context_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_context_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_context_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_context_types.h</a></div><div class='hunk'>@@ -130,6 +130,7 @@ struct intel_context {</div><div class='ctx'> #define CONTEXT_PERMA_PIN		11</div><div class='ctx'> #define CONTEXT_IS_PARKING		12</div><div class='ctx'> #define CONTEXT_EXITING			13</div><div class='add'>+#define CONTEXT_LOW_LATENCY		14</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='ctx'> 		u64 timeout_us;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c<br/>index 7a6dc371c384..5c8e9ee3b008 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_engine_cs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_engine_cs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_engine_cs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_engine_cs.c</a></div><div class='hunk'>@@ -497,9 +497,8 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id,</div><div class='ctx'> 	engine-&gt;logical_mask = BIT(logical_instance);</div><div class='ctx'> 	__sprint_engine_name(engine);</div><div class='ctx'> </div><div class='del'>-	if ((engine-&gt;class == COMPUTE_CLASS &amp;&amp; !RCS_MASK(engine-&gt;gt) &amp;&amp;</div><div class='del'>-	     __ffs(CCS_MASK(engine-&gt;gt)) == engine-&gt;instance) ||</div><div class='del'>-	     engine-&gt;class == RENDER_CLASS)</div><div class='add'>+	if ((engine-&gt;class == COMPUTE_CLASS || engine-&gt;class == RENDER_CLASS) &amp;&amp;</div><div class='add'>+	    __ffs(CCS_MASK(engine-&gt;gt) | RCS_MASK(engine-&gt;gt)) == engine-&gt;instance)</div><div class='ctx'> 		engine-&gt;flags |= I915_ENGINE_FIRST_RENDER_COMPUTE;</div><div class='ctx'> </div><div class='ctx'> 	/* features common between engines sharing EUs */</div><div class='hunk'>@@ -589,7 +588,7 @@ u64 intel_clamp_preempt_timeout_ms(struct intel_engine_cs *engine, u64 value)</div><div class='ctx'> 	 * NB: The GuC API only supports 32bit values. However, the limit is further</div><div class='ctx'> 	 * reduced due to internal calculations which would otherwise overflow.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intel_guc_submission_is_wanted(&amp;engine-&gt;gt-&gt;uc.guc))</div><div class='add'>+	if (intel_guc_submission_is_wanted(gt_to_guc(engine-&gt;gt)))</div><div class='ctx'> 		value = min_t(u64, value, guc_policy_max_preempt_timeout_ms());</div><div class='ctx'> </div><div class='ctx'> 	value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));</div><div class='hunk'>@@ -610,7 +609,7 @@ u64 intel_clamp_timeslice_duration_ms(struct intel_engine_cs *engine, u64 value)</div><div class='ctx'> 	 * NB: The GuC API only supports 32bit values. However, the limit is further</div><div class='ctx'> 	 * reduced due to internal calculations which would otherwise overflow.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intel_guc_submission_is_wanted(&amp;engine-&gt;gt-&gt;uc.guc))</div><div class='add'>+	if (intel_guc_submission_is_wanted(gt_to_guc(engine-&gt;gt)))</div><div class='ctx'> 		value = min_t(u64, value, guc_policy_max_exec_quantum_ms());</div><div class='ctx'> </div><div class='ctx'> 	value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));</div><div class='hunk'>@@ -679,7 +678,7 @@ void intel_engines_release(struct intel_gt *gt)</div><div class='ctx'> 	 */</div><div class='ctx'> 	GEM_BUG_ON(intel_gt_pm_is_awake(gt));</div><div class='ctx'> 	if (!INTEL_INFO(gt-&gt;i915)-&gt;gpu_reset_clobbers_display)</div><div class='del'>-		__intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+		intel_gt_reset_all_engines(gt);</div><div class='ctx'> </div><div class='ctx'> 	/* Decouple the backend; but keep the layout for late GPU resets */</div><div class='ctx'> 	for_each_engine(engine, gt, id) {</div><div class='hunk'>@@ -765,14 +764,14 @@ static void engine_mask_apply_media_fuses(struct intel_gt *gt)</div><div class='ctx'> 	 * and bits have disable semantices.</div><div class='ctx'> 	 */</div><div class='ctx'> 	media_fuse = intel_uncore_read(gt-&gt;uncore, GEN11_GT_VEBOX_VDBOX_DISABLE);</div><div class='del'>-	if (MEDIA_VER_FULL(i915) &lt; IP_VER(12, 50))</div><div class='add'>+	if (MEDIA_VER_FULL(i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		media_fuse = ~media_fuse;</div><div class='ctx'> </div><div class='ctx'> 	vdbox_mask = media_fuse &amp; GEN11_GT_VDBOX_DISABLE_MASK;</div><div class='ctx'> 	vebox_mask = (media_fuse &amp; GEN11_GT_VEBOX_DISABLE_MASK) &gt;&gt;</div><div class='ctx'> 		      GEN11_GT_VEBOX_DISABLE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	if (MEDIA_VER_FULL(i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	if (MEDIA_VER_FULL(i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		fuse1 = intel_uncore_read(gt-&gt;uncore, HSW_PAVP_FUSE1);</div><div class='ctx'> 		gt-&gt;info.sfc_mask = REG_FIELD_GET(XEHP_SFC_ENABLE_MASK, fuse1);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -839,38 +838,6 @@ static void engine_mask_apply_compute_fuses(struct intel_gt *gt)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void engine_mask_apply_copy_fuses(struct intel_gt *gt)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = gt-&gt;i915;</div><div class='del'>-	struct intel_gt_info *info = &amp;gt-&gt;info;</div><div class='del'>-	unsigned long meml3_mask;</div><div class='del'>-	unsigned long quad;</div><div class='del'>-</div><div class='del'>-	if (!(GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 60) &amp;&amp;</div><div class='del'>-	      GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 70)))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	meml3_mask = intel_uncore_read(gt-&gt;uncore, GEN10_MIRROR_FUSE3);</div><div class='del'>-	meml3_mask = REG_FIELD_GET(GEN12_MEML3_EN_MASK, meml3_mask);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Link Copy engines may be fused off according to meml3_mask. Each</div><div class='del'>-	 * bit is a quad that houses 2 Link Copy and two Sub Copy engines.</div><div class='del'>-	 */</div><div class='del'>-	for_each_clear_bit(quad, &amp;meml3_mask, GEN12_MAX_MSLICES) {</div><div class='del'>-		unsigned int instance = quad * 2 + 1;</div><div class='del'>-		intel_engine_mask_t mask = GENMASK(_BCS(instance + 1),</div><div class='del'>-						   _BCS(instance));</div><div class='del'>-</div><div class='del'>-		if (mask &amp; info-&gt;engine_mask) {</div><div class='del'>-			gt_dbg(gt, "bcs%u fused off\n", instance);</div><div class='del'>-			gt_dbg(gt, "bcs%u fused off\n", instance + 1);</div><div class='del'>-</div><div class='del'>-			info-&gt;engine_mask &amp;= ~mask;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Determine which engines are fused off in our particular hardware.</div><div class='ctx'>  * Note that we have a catch-22 situation where we need to be able to access</div><div class='hunk'>@@ -889,7 +856,6 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)</div><div class='ctx'> </div><div class='ctx'> 	engine_mask_apply_media_fuses(gt);</div><div class='ctx'> 	engine_mask_apply_compute_fuses(gt);</div><div class='del'>-	engine_mask_apply_copy_fuses(gt);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The only use of the GSC CS is to load and communicate with the GSC</div><div class='hunk'>@@ -1210,7 +1176,6 @@ static int intel_engine_init_tlb_invalidation(struct intel_engine_cs *engine)</div><div class='ctx'> 		if (GRAPHICS_VER_FULL(i915) == IP_VER(12, 74) ||</div><div class='ctx'> 		    GRAPHICS_VER_FULL(i915) == IP_VER(12, 71) ||</div><div class='ctx'> 		    GRAPHICS_VER_FULL(i915) == IP_VER(12, 70) ||</div><div class='del'>-		    GRAPHICS_VER_FULL(i915) == IP_VER(12, 50) ||</div><div class='ctx'> 		    GRAPHICS_VER_FULL(i915) == IP_VER(12, 55)) {</div><div class='ctx'> 			regs = xehp_regs;</div><div class='ctx'> 			num = ARRAY_SIZE(xehp_regs);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h<br/>index 960e6be2042f..ba55c059063d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_engine_types.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_engine_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_engine_types.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_engine_types.h</a></div><div class='hunk'>@@ -586,7 +586,7 @@ struct intel_engine_cs {</div><div class='ctx'> #define I915_ENGINE_HAS_RCS_REG_STATE  BIT(9)</div><div class='ctx'> #define I915_ENGINE_HAS_EU_PRIORITY    BIT(10)</div><div class='ctx'> #define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)</div><div class='del'>-#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)</div><div class='add'>+#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)</div><div class='ctx'> 	unsigned int flags;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -696,10 +696,12 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Wa_14014475959:dg2 */</div><div class='add'>+/* Wa_16019325821 */</div><div class='add'>+/* Wa_14019159160 */</div><div class='ctx'> static inline bool</div><div class='del'>-intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)</div><div class='add'>+intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	return engine-&gt;flags &amp; I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;</div><div class='add'>+	return engine-&gt;flags &amp; I915_ENGINE_USES_WA_HOLD_SWITCHOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_ENGINE_TYPES_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c<br/>index b061a0a0d6b0..21829439e686 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_execlists_submission.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_execlists_submission.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_execlists_submission.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_execlists_submission.c</a></div><div class='hunk'>@@ -493,7 +493,7 @@ __execlists_schedule_in(struct i915_request *rq)</div><div class='ctx'> 		/* Use a fixed tag for OA and friends */</div><div class='ctx'> 		GEM_BUG_ON(ce-&gt;tag &lt;= BITS_PER_LONG);</div><div class='ctx'> 		ce-&gt;lrc.ccid = ce-&gt;tag;</div><div class='del'>-	} else if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	} else if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		/* We don't need a strict matching tag, just different values */</div><div class='ctx'> 		unsigned int tag = ffs(READ_ONCE(engine-&gt;context_tag));</div><div class='ctx'> </div><div class='hunk'>@@ -613,7 +613,7 @@ static void __execlists_schedule_out(struct i915_request * const rq,</div><div class='ctx'> 		intel_engine_add_retire(engine, ce-&gt;timeline);</div><div class='ctx'> </div><div class='ctx'> 	ccid = ce-&gt;lrc.ccid;</div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		ccid &gt;&gt;= XEHP_SW_CTX_ID_SHIFT - 32;</div><div class='ctx'> 		ccid &amp;= XEHP_MAX_CONTEXT_HW_ID;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1907,7 +1907,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)</div><div class='ctx'> 		ENGINE_TRACE(engine, "csb[%d]: status=0x%08x:0x%08x\n",</div><div class='ctx'> 			     head, upper_32_bits(csb), lower_32_bits(csb));</div><div class='ctx'> </div><div class='del'>-		if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+		if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			promote = xehp_csb_parse(csb);</div><div class='ctx'> 		else if (GRAPHICS_VER(engine-&gt;i915) &gt;= 12)</div><div class='ctx'> 			promote = gen12_csb_parse(csb);</div><div class='hunk'>@@ -2898,7 +2898,7 @@ static void enable_error_interrupt(struct intel_engine_cs *engine)</div><div class='ctx'> 		drm_err(&amp;engine-&gt;i915-&gt;drm,</div><div class='ctx'> 			"engine '%s' resumed still in error: %08x\n",</div><div class='ctx'> 			engine-&gt;name, status);</div><div class='del'>-		__intel_gt_reset(engine-&gt;gt, engine-&gt;mask);</div><div class='add'>+		intel_gt_reset_engine(engine);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3482,7 +3482,7 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		if (intel_engine_has_preemption(engine))</div><div class='ctx'> 			engine-&gt;emit_bb_start = xehp_emit_bb_start;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -3585,7 +3585,7 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine)</div><div class='ctx'> </div><div class='ctx'> 	engine-&gt;context_tag = GENMASK(BITS_PER_LONG - 2, 0);</div><div class='ctx'> 	if (GRAPHICS_VER(engine-&gt;i915) &gt;= 11 &amp;&amp;</div><div class='del'>-	    GRAPHICS_VER_FULL(engine-&gt;i915) &lt; IP_VER(12, 50)) {</div><div class='add'>+	    GRAPHICS_VER_FULL(engine-&gt;i915) &lt; IP_VER(12, 55)) {</div><div class='ctx'> 		execlists-&gt;ccid |= engine-&gt;instance &lt;&lt; (GEN11_ENGINE_INSTANCE_SHIFT - 32);</div><div class='ctx'> 		execlists-&gt;ccid |= engine-&gt;class &lt;&lt; (GEN11_ENGINE_CLASS_SHIFT - 32);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c<br/>index ec1cbe229f0e..0d0a0dc9f610 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_ggtt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_ggtt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_ggtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_ggtt.c</a></div><div class='hunk'>@@ -231,11 +231,8 @@ static void guc_ggtt_ct_invalidate(struct intel_gt *gt)</div><div class='ctx'> 	struct intel_uncore *uncore = gt-&gt;uncore;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> </div><div class='del'>-	with_intel_runtime_pm_if_active(uncore-&gt;rpm, wakeref) {</div><div class='del'>-		struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='del'>-</div><div class='del'>-		intel_guc_invalidate_tlb_guc(guc);</div><div class='del'>-	}</div><div class='add'>+	with_intel_runtime_pm_if_active(uncore-&gt;rpm, wakeref)</div><div class='add'>+		intel_guc_invalidate_tlb_guc(gt_to_guc(gt));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)</div><div class='hunk'>@@ -246,7 +243,7 @@ static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)</div><div class='ctx'> 	gen8_ggtt_invalidate(ggtt);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(gt, &amp;ggtt-&gt;gt_list, ggtt_link) {</div><div class='del'>-		if (intel_guc_tlb_invalidation_is_available(&amp;gt-&gt;uc.guc))</div><div class='add'>+		if (intel_guc_tlb_invalidation_is_available(gt_to_guc(gt)))</div><div class='ctx'> 			guc_ggtt_ct_invalidate(gt);</div><div class='ctx'> 		else if (GRAPHICS_VER(i915) &gt;= 12)</div><div class='ctx'> 			intel_uncore_write_fw(gt-&gt;uncore,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c<br/>index 6d440de8ba01..1e925c75fb08 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gsc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gsc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gsc.c</a></div><div class='hunk'>@@ -103,19 +103,6 @@ static const struct gsc_def gsc_def_dg1[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct gsc_def gsc_def_xehpsdv[] = {</div><div class='del'>-	{</div><div class='del'>-		/* HECI1 not enabled on the device. */</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mei-gscfi",</div><div class='del'>-		.bar = DG1_GSC_HECI2_BASE,</div><div class='del'>-		.bar_size = GSC_BAR_LENGTH,</div><div class='del'>-		.use_polling = true,</div><div class='del'>-		.slow_firmware = true,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct gsc_def gsc_def_dg2[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "mei-gsc",</div><div class='hunk'>@@ -188,8 +175,6 @@ static void gsc_init_one(struct drm_i915_private *i915, struct intel_gsc *gsc,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_DG1(i915)) {</div><div class='ctx'> 		def = &amp;gsc_def_dg1[intf_id];</div><div class='del'>-	} else if (IS_XEHPSDV(i915)) {</div><div class='del'>-		def = &amp;gsc_def_xehpsdv[intf_id];</div><div class='ctx'> 	} else if (IS_DG2(i915)) {</div><div class='ctx'> 		def = &amp;gsc_def_dg2[intf_id];</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c<br/>index 6a2c2718bcc3..626b166e67ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt.c</a></div><div class='hunk'>@@ -278,7 +278,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,</div><div class='ctx'> 		intel_uncore_posting_read(uncore,</div><div class='ctx'> 					  XELPMP_RING_FAULT_REG);</div><div class='ctx'> </div><div class='del'>-	} else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	} else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		intel_gt_mcr_multicast_rmw(gt, XEHP_RING_FAULT_REG,</div><div class='ctx'> 					   RING_FAULT_VALID, 0);</div><div class='ctx'> 		intel_gt_mcr_read_any(gt, XEHP_RING_FAULT_REG);</div><div class='hunk'>@@ -403,7 +403,7 @@ void intel_gt_check_and_clear_faults(struct intel_gt *gt)</div><div class='ctx'> 	struct drm_i915_private *i915 = gt-&gt;i915;</div><div class='ctx'> </div><div class='ctx'> 	/* From GEN8 onwards we only have one 'All Engine Fault Register' */</div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		xehp_check_faults(gt);</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) &gt;= 8)</div><div class='ctx'> 		gen8_check_faults(gt);</div><div class='hunk'>@@ -832,7 +832,7 @@ void intel_gt_driver_unregister(struct intel_gt *gt)</div><div class='ctx'> </div><div class='ctx'> 	/* Scrub all HW state upon release */</div><div class='ctx'> 	with_intel_runtime_pm(gt-&gt;uncore-&gt;rpm, wakeref)</div><div class='del'>-		__intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+		intel_gt_reset_all_engines(gt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_gt_driver_release(struct intel_gt *gt)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h<br/>index 003eb93b826f..b5e114d284ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt.h</a></div><div class='hunk'>@@ -124,6 +124,11 @@ static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc)</div><div class='ctx'> 	return guc_to_gt(guc)-&gt;i915;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline struct intel_guc *gt_to_guc(struct intel_gt *gt)</div><div class='add'>+{</div><div class='add'>+	return &amp;gt-&gt;uc.guc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void intel_gt_common_init_early(struct intel_gt *gt);</div><div class='ctx'> int intel_root_gt_init_early(struct drm_i915_private *i915);</div><div class='ctx'> int intel_gt_assign_ggtt(struct intel_gt *gt);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c<br/>index 044219c5960a..99b71bb7da0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c</a></div><div class='hunk'>@@ -8,14 +8,14 @@</div><div class='ctx'> #include "intel_gt_ccs_mode.h"</div><div class='ctx'> #include "intel_gt_regs.h"</div><div class='ctx'> </div><div class='del'>-void intel_gt_apply_ccs_mode(struct intel_gt *gt)</div><div class='add'>+unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt)</div><div class='ctx'> {</div><div class='ctx'> 	int cslice;</div><div class='ctx'> 	u32 mode = 0;</div><div class='ctx'> 	int first_ccs = __ffs(CCS_MASK(gt));</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_DG2(gt-&gt;i915))</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Build the value for the fixed CCS load balancing */</div><div class='ctx'> 	for (cslice = 0; cslice &lt; I915_MAX_CCS; cslice++) {</div><div class='hunk'>@@ -35,5 +35,5 @@ void intel_gt_apply_ccs_mode(struct intel_gt *gt)</div><div class='ctx'> 						     XEHP_CCS_MODE_CSLICE_MASK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	intel_uncore_write(gt-&gt;uncore, XEHP_CCS_MODE, mode);</div><div class='add'>+	return mode;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h<br/>index 9e5549caeb26..55547f2ff426 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h</a></div><div class='hunk'>@@ -8,6 +8,6 @@</div><div class='ctx'> </div><div class='ctx'> struct intel_gt;</div><div class='ctx'> </div><div class='del'>-void intel_gt_apply_ccs_mode(struct intel_gt *gt);</div><div class='add'>+unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt);</div><div class='ctx'> </div><div class='ctx'> #endif /* __INTEL_GT_CCS_MODE_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c<br/>index 77fb57223465..ad4c51f18d3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_irq.c</a></div><div class='hunk'>@@ -68,9 +68,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,</div><div class='ctx'> 	struct intel_gt *media_gt = gt-&gt;i915-&gt;media_gt;</div><div class='ctx'> </div><div class='ctx'> 	if (instance == OTHER_GUC_INSTANCE)</div><div class='del'>-		return guc_irq_handler(&amp;gt-&gt;uc.guc, iir);</div><div class='add'>+		return guc_irq_handler(gt_to_guc(gt), iir);</div><div class='ctx'> 	if (instance == OTHER_MEDIA_GUC_INSTANCE &amp;&amp; media_gt)</div><div class='del'>-		return guc_irq_handler(&amp;media_gt-&gt;uc.guc, iir);</div><div class='add'>+		return guc_irq_handler(gt_to_guc(media_gt), iir);</div><div class='ctx'> </div><div class='ctx'> 	if (instance == OTHER_GTPM_INSTANCE)</div><div class='ctx'> 		return gen11_rps_irq_handler(&amp;gt-&gt;rps, iir);</div><div class='hunk'>@@ -442,7 +442,7 @@ void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl)</div><div class='ctx'> 		iir = raw_reg_read(regs, GEN8_GT_IIR(2));</div><div class='ctx'> 		if (likely(iir)) {</div><div class='ctx'> 			gen6_rps_irq_handler(&amp;gt-&gt;rps, iir);</div><div class='del'>-			guc_irq_handler(&amp;gt-&gt;uc.guc, iir &gt;&gt; 16);</div><div class='add'>+			guc_irq_handler(gt_to_guc(gt), iir &gt;&gt; 16);</div><div class='ctx'> 			raw_reg_write(regs, GEN8_GT_IIR(2), iir);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c<br/>index e253750a51c5..b8912bd6c08e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_mcr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_mcr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_mcr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_mcr.c</a></div><div class='hunk'>@@ -57,51 +57,18 @@ static const struct intel_mmio_range icl_l3bank_steering_table[] = {</div><div class='ctx'>  * are of a "GAM" subclass that has special rules.  Thus we use a separate</div><div class='ctx'>  * GAM table farther down for those.</div><div class='ctx'>  */</div><div class='del'>-static const struct intel_mmio_range xehpsdv_mslice_steering_table[] = {</div><div class='add'>+static const struct intel_mmio_range dg2_mslice_steering_table[] = {</div><div class='ctx'> 	{ 0x00DD00, 0x00DDFF },</div><div class='ctx'> 	{ 0x00E900, 0x00FFFF }, /* 0xEA00 - OxEFFF is unused */</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct intel_mmio_range xehpsdv_gam_steering_table[] = {</div><div class='del'>-	{ 0x004000, 0x004AFF },</div><div class='del'>-	{ 0x00C800, 0x00CFFF },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct intel_mmio_range xehpsdv_lncf_steering_table[] = {</div><div class='del'>-	{ 0x00B000, 0x00B0FF },</div><div class='del'>-	{ 0x00D800, 0x00D8FF },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct intel_mmio_range dg2_lncf_steering_table[] = {</div><div class='ctx'> 	{ 0x00B000, 0x00B0FF },</div><div class='ctx'> 	{ 0x00D880, 0x00D8FF },</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We have several types of MCR registers on PVC where steering to (0,0)</div><div class='del'>- * will always provide us with a non-terminated value.  We'll stick them</div><div class='del'>- * all in the same table for simplicity.</div><div class='del'>- */</div><div class='del'>-static const struct intel_mmio_range pvc_instance0_steering_table[] = {</div><div class='del'>-	{ 0x004000, 0x004AFF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x008800, 0x00887F },		/* CC */</div><div class='del'>-	{ 0x008A80, 0x008AFF },		/* TILEPSMI */</div><div class='del'>-	{ 0x00B000, 0x00B0FF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x00B100, 0x00B3FF },		/* L3BANK */</div><div class='del'>-	{ 0x00C800, 0x00CFFF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x00D800, 0x00D8FF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x00DD00, 0x00DDFF },		/* BSLICE */</div><div class='del'>-	{ 0x00E900, 0x00E9FF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x00EC00, 0x00EEFF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x00F000, 0x00FFFF },		/* HALF-BSLICE */</div><div class='del'>-	{ 0x024180, 0x0241FF },		/* HALF-BSLICE */</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct intel_mmio_range xelpg_instance0_steering_table[] = {</div><div class='ctx'> 	{ 0x000B00, 0x000BFF },         /* SQIDI */</div><div class='ctx'> 	{ 0x001000, 0x001FFF },         /* SQIDI */</div><div class='hunk'>@@ -185,22 +152,16 @@ void intel_gt_mcr_init(struct intel_gt *gt)</div><div class='ctx'> 		gt-&gt;steering_table[INSTANCE0] = xelpg_instance0_steering_table;</div><div class='ctx'> 		gt-&gt;steering_table[L3BANK] = xelpg_l3bank_steering_table;</div><div class='ctx'> 		gt-&gt;steering_table[DSS] = xelpg_dss_steering_table;</div><div class='del'>-	} else if (IS_PONTEVECCHIO(i915)) {</div><div class='del'>-		gt-&gt;steering_table[INSTANCE0] = pvc_instance0_steering_table;</div><div class='ctx'> 	} else if (IS_DG2(i915)) {</div><div class='del'>-		gt-&gt;steering_table[MSLICE] = xehpsdv_mslice_steering_table;</div><div class='add'>+		gt-&gt;steering_table[MSLICE] = dg2_mslice_steering_table;</div><div class='ctx'> 		gt-&gt;steering_table[LNCF] = dg2_lncf_steering_table;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * No need to hook up the GAM table since it has a dedicated</div><div class='ctx'> 		 * steering control register on DG2 and can use implicit</div><div class='ctx'> 		 * steering.</div><div class='ctx'> 		 */</div><div class='del'>-	} else if (IS_XEHPSDV(i915)) {</div><div class='del'>-		gt-&gt;steering_table[MSLICE] = xehpsdv_mslice_steering_table;</div><div class='del'>-		gt-&gt;steering_table[LNCF] = xehpsdv_lncf_steering_table;</div><div class='del'>-		gt-&gt;steering_table[GAM] = xehpsdv_gam_steering_table;</div><div class='ctx'> 	} else if (GRAPHICS_VER(i915) &gt;= 11 &amp;&amp;</div><div class='del'>-		   GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 50)) {</div><div class='add'>+		   GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 55)) {</div><div class='ctx'> 		gt-&gt;steering_table[L3BANK] = icl_l3bank_steering_table;</div><div class='ctx'> 		gt-&gt;info.l3bank_mask =</div><div class='ctx'> 			~intel_uncore_read(gt-&gt;uncore, GEN10_MIRROR_FUSE3) &amp;</div><div class='hunk'>@@ -821,8 +782,6 @@ void intel_gt_mcr_report_steering(struct drm_printer *p, struct intel_gt *gt,</div><div class='ctx'> 		for (int i = 0; i &lt; NUM_STEERING_TYPES; i++)</div><div class='ctx'> 			if (gt-&gt;steering_table[i])</div><div class='ctx'> 				report_steering_type(p, gt, i, dump_table);</div><div class='del'>-	} else if (IS_PONTEVECCHIO(gt-&gt;i915)) {</div><div class='del'>-		report_steering_type(p, gt, INSTANCE0, dump_table);</div><div class='ctx'> 	} else if (HAS_MSLICE_STEERING(gt-&gt;i915)) {</div><div class='ctx'> 		report_steering_type(p, gt, MSLICE, dump_table);</div><div class='ctx'> 		report_steering_type(p, gt, LNCF, dump_table);</div><div class='hunk'>@@ -842,10 +801,7 @@ void intel_gt_mcr_report_steering(struct drm_printer *p, struct intel_gt *gt,</div><div class='ctx'> void intel_gt_mcr_get_ss_steering(struct intel_gt *gt, unsigned int dss,</div><div class='ctx'> 				   unsigned int *group, unsigned int *instance)</div><div class='ctx'> {</div><div class='del'>-	if (IS_PONTEVECCHIO(gt-&gt;i915)) {</div><div class='del'>-		*group = dss / GEN_DSS_PER_CSLICE;</div><div class='del'>-		*instance = dss % GEN_DSS_PER_CSLICE;</div><div class='del'>-	} else if (GRAPHICS_VER_FULL(gt-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	if (GRAPHICS_VER_FULL(gt-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		*group = dss / GEN_DSS_PER_GSLICE;</div><div class='ctx'> 		*instance = dss % GEN_DSS_PER_GSLICE;</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.h b/drivers/gpu/drm/i915/gt/intel_gt_mcr.h<br/>index 01ac565a56a4..a67a4c35a4fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_mcr.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_mcr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_mcr.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_mcr.h</a></div><div class='hunk'>@@ -54,7 +54,7 @@ int intel_gt_mcr_wait_for_reg(struct intel_gt *gt,</div><div class='ctx'>  * the topology, so we lookup the DSS ID directly in "slice 0."</div><div class='ctx'>  */</div><div class='ctx'> #define _HAS_SS(ss_, gt_, group_, instance_) ( \</div><div class='del'>-	GRAPHICS_VER_FULL(gt_-&gt;i915) &gt;= IP_VER(12, 50) ? \</div><div class='add'>+	GRAPHICS_VER_FULL(gt_-&gt;i915) &gt;= IP_VER(12, 55) ? \</div><div class='ctx'> 		intel_sseu_has_subslice(&amp;(gt_)-&gt;info.sseu, 0, ss_) : \</div><div class='ctx'> 		intel_sseu_has_subslice(&amp;(gt_)-&gt;info.sseu, group_, instance_))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c<br/>index 220ac4f92edf..c08fdb65cc69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_pm.c</a></div><div class='hunk'>@@ -159,7 +159,7 @@ static bool reset_engines(struct intel_gt *gt)</div><div class='ctx'> 	if (INTEL_INFO(gt-&gt;i915)-&gt;gpu_reset_clobbers_display)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return __intel_gt_reset(gt, ALL_ENGINES) == 0;</div><div class='add'>+	return intel_gt_reset_all_engines(gt) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gt_sanitize(struct intel_gt *gt, bool force)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c<br/>index 7114c116e928..4fcba42cfe34 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c</a></div><div class='hunk'>@@ -392,10 +392,6 @@ void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *p)</div><div class='ctx'> 		drm_puts(p, "no P-state info available\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drm_printf(p, "Current CD clock frequency: %d kHz\n", i915-&gt;display.cdclk.hw.cdclk);</div><div class='del'>-	drm_printf(p, "Max CD clock frequency: %d kHz\n", i915-&gt;display.cdclk.max_cdclk_freq);</div><div class='del'>-	drm_printf(p, "Max pixel clock frequency: %d kHz\n", i915-&gt;max_dotclk_freq);</div><div class='del'>-</div><div class='ctx'> 	intel_runtime_pm_put(uncore-&gt;rpm, wakeref);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -538,7 +534,7 @@ static bool rps_eval(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = data;</div><div class='ctx'> </div><div class='del'>-	if (intel_guc_slpc_is_used(&amp;gt-&gt;uc.guc))</div><div class='add'>+	if (intel_guc_slpc_is_used(gt_to_guc(gt)))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	else</div><div class='ctx'> 		return HAS_RPS(gt-&gt;i915);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h<br/>index 743fe3566722..e42b3a5d4e63 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_regs.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_regs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_regs.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_regs.h</a></div><div class='hunk'>@@ -718,44 +718,11 @@</div><div class='ctx'> </div><div class='ctx'> #define UNSLICE_UNIT_LEVEL_CLKGATE		_MMIO(0x9434)</div><div class='ctx'> #define   VFUNIT_CLKGATE_DIS			REG_BIT(20)</div><div class='del'>-#define   TSGUNIT_CLKGATE_DIS			REG_BIT(17) /* XEHPSDV */</div><div class='ctx'> #define   CG3DDISCFEG_CLKGATE_DIS		REG_BIT(17) /* DG2 */</div><div class='ctx'> #define   GAMEDIA_CLKGATE_DIS			REG_BIT(11)</div><div class='ctx'> #define   HSUNIT_CLKGATE_DIS			REG_BIT(8)</div><div class='ctx'> #define   VSUNIT_CLKGATE_DIS			REG_BIT(3)</div><div class='ctx'> </div><div class='del'>-#define UNSLCGCTL9440				_MMIO(0x9440)</div><div class='del'>-#define   GAMTLBOACS_CLKGATE_DIS		REG_BIT(28)</div><div class='del'>-#define   GAMTLBVDBOX5_CLKGATE_DIS		REG_BIT(27)</div><div class='del'>-#define   GAMTLBVDBOX6_CLKGATE_DIS		REG_BIT(26)</div><div class='del'>-#define   GAMTLBVDBOX3_CLKGATE_DIS		REG_BIT(24)</div><div class='del'>-#define   GAMTLBVDBOX4_CLKGATE_DIS		REG_BIT(23)</div><div class='del'>-#define   GAMTLBVDBOX7_CLKGATE_DIS		REG_BIT(22)</div><div class='del'>-#define   GAMTLBVDBOX2_CLKGATE_DIS		REG_BIT(21)</div><div class='del'>-#define   GAMTLBVDBOX0_CLKGATE_DIS		REG_BIT(17)</div><div class='del'>-#define   GAMTLBKCR_CLKGATE_DIS			REG_BIT(16)</div><div class='del'>-#define   GAMTLBGUC_CLKGATE_DIS			REG_BIT(15)</div><div class='del'>-#define   GAMTLBBLT_CLKGATE_DIS			REG_BIT(14)</div><div class='del'>-#define   GAMTLBVDBOX1_CLKGATE_DIS		REG_BIT(6)</div><div class='del'>-</div><div class='del'>-#define UNSLCGCTL9444				_MMIO(0x9444)</div><div class='del'>-#define   GAMTLBGFXA0_CLKGATE_DIS		REG_BIT(30)</div><div class='del'>-#define   GAMTLBGFXA1_CLKGATE_DIS		REG_BIT(29)</div><div class='del'>-#define   GAMTLBCOMPA0_CLKGATE_DIS		REG_BIT(28)</div><div class='del'>-#define   GAMTLBCOMPA1_CLKGATE_DIS		REG_BIT(27)</div><div class='del'>-#define   GAMTLBCOMPB0_CLKGATE_DIS		REG_BIT(26)</div><div class='del'>-#define   GAMTLBCOMPB1_CLKGATE_DIS		REG_BIT(25)</div><div class='del'>-#define   GAMTLBCOMPC0_CLKGATE_DIS		REG_BIT(24)</div><div class='del'>-#define   GAMTLBCOMPC1_CLKGATE_DIS		REG_BIT(23)</div><div class='del'>-#define   GAMTLBCOMPD0_CLKGATE_DIS		REG_BIT(22)</div><div class='del'>-#define   GAMTLBCOMPD1_CLKGATE_DIS		REG_BIT(21)</div><div class='del'>-#define   GAMTLBMERT_CLKGATE_DIS		REG_BIT(20)</div><div class='del'>-#define   GAMTLBVEBOX3_CLKGATE_DIS		REG_BIT(19)</div><div class='del'>-#define   GAMTLBVEBOX2_CLKGATE_DIS		REG_BIT(18)</div><div class='del'>-#define   GAMTLBVEBOX1_CLKGATE_DIS		REG_BIT(17)</div><div class='del'>-#define   GAMTLBVEBOX0_CLKGATE_DIS		REG_BIT(16)</div><div class='del'>-#define   LTCDD_CLKGATE_DIS			REG_BIT(10)</div><div class='del'>-</div><div class='ctx'> #define GEN11_SLICE_UNIT_LEVEL_CLKGATE		_MMIO(0x94d4)</div><div class='ctx'> #define XEHP_SLICE_UNIT_LEVEL_CLKGATE		MCR_REG(0x94d4)</div><div class='ctx'> #define   SARBUNIT_CLKGATE_DIS			(1 &lt;&lt; 5)</div><div class='hunk'>@@ -765,9 +732,6 @@</div><div class='ctx'> #define   L3_CLKGATE_DIS			REG_BIT(16)</div><div class='ctx'> #define   L3_CR2X_CLKGATE_DIS			REG_BIT(17)</div><div class='ctx'> </div><div class='del'>-#define SCCGCTL94DC				MCR_REG(0x94dc)</div><div class='del'>-#define   CG3DDISURB				REG_BIT(14)</div><div class='del'>-</div><div class='ctx'> #define UNSLICE_UNIT_LEVEL_CLKGATE2		_MMIO(0x94e4)</div><div class='ctx'> #define   VSUNIT_CLKGATE_DIS_TGL		REG_BIT(19)</div><div class='ctx'> #define   PSDUNIT_CLKGATE_DIS			REG_BIT(5)</div><div class='hunk'>@@ -989,10 +953,6 @@</div><div class='ctx'> #define   GEN7_WA_FOR_GEN7_L3_CONTROL		0x3C47FF8C</div><div class='ctx'> #define   GEN7_L3AGDIS				(1 &lt;&lt; 19)</div><div class='ctx'> </div><div class='del'>-#define XEHPC_LNCFMISCCFGREG0			MCR_REG(0xb01c)</div><div class='del'>-#define   XEHPC_HOSTCACHEEN			REG_BIT(1)</div><div class='del'>-#define   XEHPC_OVRLSCCC			REG_BIT(0)</div><div class='del'>-</div><div class='ctx'> #define GEN7_L3CNTLREG2				_MMIO(0xb020)</div><div class='ctx'> </div><div class='ctx'> /* MOCS (Memory Object Control State) registers */</div><div class='hunk'>@@ -1046,20 +1006,9 @@</div><div class='ctx'> #define XEHP_L3SQCREG5				MCR_REG(0xb158)</div><div class='ctx'> #define   L3_PWM_TIMER_INIT_VAL_MASK		REG_GENMASK(9, 0)</div><div class='ctx'> </div><div class='del'>-#define MLTICTXCTL				MCR_REG(0xb170)</div><div class='del'>-#define   TDONRENDER				REG_BIT(2)</div><div class='del'>-</div><div class='ctx'> #define XEHP_L3SCQREG7				MCR_REG(0xb188)</div><div class='ctx'> #define   BLEND_FILL_CACHING_OPT_DIS		REG_BIT(3)</div><div class='ctx'> </div><div class='del'>-#define XEHPC_L3SCRUB				MCR_REG(0xb18c)</div><div class='del'>-#define   SCRUB_CL_DWNGRADE_SHARED		REG_BIT(12)</div><div class='del'>-#define   SCRUB_RATE_PER_BANK_MASK		REG_GENMASK(2, 0)</div><div class='del'>-#define   SCRUB_RATE_4B_PER_CLK			REG_FIELD_PREP(SCRUB_RATE_PER_BANK_MASK, 0x6)</div><div class='del'>-</div><div class='del'>-#define L3SQCREG1_CCS0				MCR_REG(0xb200)</div><div class='del'>-#define   FLUSHALLNONCOH			REG_BIT(5)</div><div class='del'>-</div><div class='ctx'> #define GEN11_GLBLINVL				_MMIO(0xb404)</div><div class='ctx'> #define   GEN11_BANK_HASH_ADDR_EXCL_MASK	(0x7f &lt;&lt; 5)</div><div class='ctx'> #define   GEN11_BANK_HASH_ADDR_EXCL_BIT0	(1 &lt;&lt; 5)</div><div class='hunk'>@@ -1109,7 +1058,6 @@</div><div class='ctx'> #define XEHP_COMPCTX_TLB_INV_CR			MCR_REG(0xcf04)</div><div class='ctx'> #define XELPMP_GSC_TLB_INV_CR			_MMIO(0xcf04)   /* media GT only */</div><div class='ctx'> </div><div class='del'>-#define XEHP_MERT_MOD_CTRL			MCR_REG(0xcf28)</div><div class='ctx'> #define RENDER_MOD_CTRL				MCR_REG(0xcf2c)</div><div class='ctx'> #define COMP_MOD_CTRL				MCR_REG(0xcf30)</div><div class='ctx'> #define XELPMP_GSC_MOD_CTRL			_MMIO(0xcf30)	/* media GT only */</div><div class='hunk'>@@ -1185,7 +1133,6 @@</div><div class='ctx'> #define EU_PERF_CNTL4				PERF_REG(0xe45c)</div><div class='ctx'> </div><div class='ctx'> #define GEN9_ROW_CHICKEN4			MCR_REG(0xe48c)</div><div class='del'>-#define   GEN12_DISABLE_GRF_CLEAR		REG_BIT(13)</div><div class='ctx'> #define   XEHP_DIS_BBL_SYSPIPE			REG_BIT(11)</div><div class='ctx'> #define   GEN12_DISABLE_TDL_PUSH		REG_BIT(9)</div><div class='ctx'> #define   GEN11_DIS_PICK_2ND_EU			REG_BIT(7)</div><div class='hunk'>@@ -1202,7 +1149,6 @@</div><div class='ctx'> #define   FLOW_CONTROL_ENABLE			REG_BIT(15)</div><div class='ctx'> #define   UGM_BACKUP_MODE			REG_BIT(13)</div><div class='ctx'> #define   MDQ_ARBITRATION_MODE			REG_BIT(12)</div><div class='del'>-#define   SYSTOLIC_DOP_CLOCK_GATING_DIS		REG_BIT(10)</div><div class='ctx'> #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	REG_BIT(8)</div><div class='ctx'> #define   STALL_DOP_GATING_DISABLE		REG_BIT(5)</div><div class='ctx'> #define   THROTTLE_12_5				REG_GENMASK(4, 2)</div><div class='hunk'>@@ -1215,6 +1161,7 @@</div><div class='ctx'> #define   GEN12_DISABLE_EARLY_READ		REG_BIT(14)</div><div class='ctx'> #define   GEN12_ENABLE_LARGE_GRF_MODE		REG_BIT(12)</div><div class='ctx'> #define   GEN12_PUSH_CONST_DEREF_HOLD_DIS	REG_BIT(8)</div><div class='add'>+#define   XELPG_DISABLE_TDL_SVHS_GATING		REG_BIT(1)</div><div class='ctx'> #define   GEN12_DISABLE_DOP_GATING              REG_BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define RT_CTRL					MCR_REG(0xe530)</div><div class='hunk'>@@ -1685,11 +1632,6 @@</div><div class='ctx'> </div><div class='ctx'> #define GEN12_SFC_DONE(n)			_MMIO(0x1cc000 + (n) * 0x1000)</div><div class='ctx'> </div><div class='del'>-#define GT0_PACKAGE_ENERGY_STATUS		_MMIO(0x250004)</div><div class='del'>-#define GT0_PACKAGE_RAPL_LIMIT			_MMIO(0x250008)</div><div class='del'>-#define GT0_PACKAGE_POWER_SKU_UNIT		_MMIO(0x250068)</div><div class='del'>-#define GT0_PLATFORM_ENERGY_STATUS		_MMIO(0x25006c)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Standalone Media's non-engine GT registers are located at their regular GT</div><div class='ctx'>  * offsets plus 0x380000.  This extra offset is stored inside the intel_uncore</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c<br/>index c0b202223940..d7784650e4d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c</a></div><div class='hunk'>@@ -442,7 +442,7 @@ static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj,</div><div class='ctx'> 					 char *buff)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr-&gt;attr.name);</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	struct intel_guc_slpc *slpc = &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> </div><div class='ctx'> 	return sysfs_emit(buff, "%u\n", slpc-&gt;ignore_eff_freq);</div><div class='ctx'> }</div><div class='hunk'>@@ -452,7 +452,7 @@ static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj,</div><div class='ctx'> 					  const char *buff, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr-&gt;attr.name);</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	struct intel_guc_slpc *slpc = &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -573,7 +573,6 @@ static ssize_t media_freq_factor_show(struct kobject *kobj,</div><div class='ctx'> 				      char *buff)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr-&gt;attr.name);</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	u32 mode;</div><div class='ctx'> </div><div class='hunk'>@@ -581,20 +580,12 @@ static ssize_t media_freq_factor_show(struct kobject *kobj,</div><div class='ctx'> 	 * Retrieve media_ratio_mode from GEN6_RPNSWREQ bit 13 set by</div><div class='ctx'> 	 * GuC. GEN6_RPNSWREQ:13 value 0 represents 1:2 and 1 represents 1:1</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_XEHPSDV(gt-&gt;i915) &amp;&amp;</div><div class='del'>-	    slpc-&gt;media_ratio_mode == SLPC_MEDIA_RATIO_MODE_DYNAMIC_CONTROL) {</div><div class='del'>-		/*</div><div class='del'>-		 * For XEHPSDV dynamic mode GEN6_RPNSWREQ:13 does not contain</div><div class='del'>-		 * the media_ratio_mode, just return the cached media ratio</div><div class='del'>-		 */</div><div class='del'>-		mode = slpc-&gt;media_ratio_mode;</div><div class='del'>-	} else {</div><div class='del'>-		with_intel_runtime_pm(gt-&gt;uncore-&gt;rpm, wakeref)</div><div class='del'>-			mode = intel_uncore_read(gt-&gt;uncore, GEN6_RPNSWREQ);</div><div class='del'>-		mode = REG_FIELD_GET(GEN12_MEDIA_FREQ_RATIO, mode) ?</div><div class='del'>-			SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_ONE :</div><div class='del'>-			SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_TWO;</div><div class='del'>-	}</div><div class='add'>+	with_intel_runtime_pm(gt-&gt;uncore-&gt;rpm, wakeref)</div><div class='add'>+		mode = intel_uncore_read(gt-&gt;uncore, GEN6_RPNSWREQ);</div><div class='add'>+</div><div class='add'>+	mode = REG_FIELD_GET(GEN12_MEDIA_FREQ_RATIO, mode) ?</div><div class='add'>+		SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_ONE :</div><div class='add'>+		SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_TWO;</div><div class='ctx'> </div><div class='ctx'> 	return sysfs_emit(buff, "%u\n", media_ratio_mode_to_factor(mode));</div><div class='ctx'> }</div><div class='hunk'>@@ -604,7 +595,7 @@ static ssize_t media_freq_factor_store(struct kobject *kobj,</div><div class='ctx'> 				       const char *buff, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr-&gt;attr.name);</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	struct intel_guc_slpc *slpc = &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> 	u32 factor, mode;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c<br/>index 7811a8c9da06..30b128b1fde7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gtt.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_gtt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_gtt.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_gtt.c</a></div><div class='hunk'>@@ -680,7 +680,7 @@ void setup_private_pat(struct intel_gt *gt)</div><div class='ctx'> </div><div class='ctx'> 	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 70))</div><div class='ctx'> 		xelpg_setup_private_ppat(gt);</div><div class='del'>-	else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		xehp_setup_private_ppat(gt);</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) &gt;= 12)</div><div class='ctx'> 		tgl_setup_private_ppat(uncore);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c<br/>index 7c367ba8d9dc..b387146ede98 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_lrc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_lrc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_lrc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_lrc.c</a></div><div class='hunk'>@@ -546,47 +546,6 @@ static const u8 gen12_rcs_offsets[] = {</div><div class='ctx'> 	END</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u8 xehp_rcs_offsets[] = {</div><div class='del'>-	NOP(1),</div><div class='del'>-	LRI(13, POSTED),</div><div class='del'>-	REG16(0x244),</div><div class='del'>-	REG(0x034),</div><div class='del'>-	REG(0x030),</div><div class='del'>-	REG(0x038),</div><div class='del'>-	REG(0x03c),</div><div class='del'>-	REG(0x168),</div><div class='del'>-	REG(0x140),</div><div class='del'>-	REG(0x110),</div><div class='del'>-	REG(0x1c0),</div><div class='del'>-	REG(0x1c4),</div><div class='del'>-	REG(0x1c8),</div><div class='del'>-	REG(0x180),</div><div class='del'>-	REG16(0x2b4),</div><div class='del'>-</div><div class='del'>-	NOP(5),</div><div class='del'>-	LRI(9, POSTED),</div><div class='del'>-	REG16(0x3a8),</div><div class='del'>-	REG16(0x28c),</div><div class='del'>-	REG16(0x288),</div><div class='del'>-	REG16(0x284),</div><div class='del'>-	REG16(0x280),</div><div class='del'>-	REG16(0x27c),</div><div class='del'>-	REG16(0x278),</div><div class='del'>-	REG16(0x274),</div><div class='del'>-	REG16(0x270),</div><div class='del'>-</div><div class='del'>-	LRI(3, POSTED),</div><div class='del'>-	REG(0x1b0),</div><div class='del'>-	REG16(0x5a8),</div><div class='del'>-	REG16(0x5ac),</div><div class='del'>-</div><div class='del'>-	NOP(6),</div><div class='del'>-	LRI(1, 0),</div><div class='del'>-	REG(0x0c8),</div><div class='del'>-</div><div class='del'>-	END</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const u8 dg2_rcs_offsets[] = {</div><div class='ctx'> 	NOP(1),</div><div class='ctx'> 	LRI(15, POSTED),</div><div class='hunk'>@@ -695,8 +654,6 @@ static const u8 *reg_offsets(const struct intel_engine_cs *engine)</div><div class='ctx'> 			return mtl_rcs_offsets;</div><div class='ctx'> 		else if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			return dg2_rcs_offsets;</div><div class='del'>-		else if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='del'>-			return xehp_rcs_offsets;</div><div class='ctx'> 		else if (GRAPHICS_VER(engine-&gt;i915) &gt;= 12)</div><div class='ctx'> 			return gen12_rcs_offsets;</div><div class='ctx'> 		else if (GRAPHICS_VER(engine-&gt;i915) &gt;= 11)</div><div class='hunk'>@@ -719,7 +676,7 @@ static const u8 *reg_offsets(const struct intel_engine_cs *engine)</div><div class='ctx'> </div><div class='ctx'> static int lrc_ring_mi_mode(const struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		return 0x70;</div><div class='ctx'> 	else if (GRAPHICS_VER(engine-&gt;i915) &gt;= 12)</div><div class='ctx'> 		return 0x60;</div><div class='hunk'>@@ -733,7 +690,7 @@ static int lrc_ring_mi_mode(const struct intel_engine_cs *engine)</div><div class='ctx'> </div><div class='ctx'> static int lrc_ring_bb_offset(const struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		return 0x80;</div><div class='ctx'> 	else if (GRAPHICS_VER(engine-&gt;i915) &gt;= 12)</div><div class='ctx'> 		return 0x70;</div><div class='hunk'>@@ -748,7 +705,7 @@ static int lrc_ring_bb_offset(const struct intel_engine_cs *engine)</div><div class='ctx'> </div><div class='ctx'> static int lrc_ring_gpr0(const struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		return 0x84;</div><div class='ctx'> 	else if (GRAPHICS_VER(engine-&gt;i915) &gt;= 12)</div><div class='ctx'> 		return 0x74;</div><div class='hunk'>@@ -795,7 +752,7 @@ static int lrc_ring_indirect_offset(const struct intel_engine_cs *engine)</div><div class='ctx'> static int lrc_ring_cmd_buf_cctl(const struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Note that the CSFE context has a dummy slot for CMD_BUF_CCTL</div><div class='ctx'> 		 * simply to match the RCS context image layout.</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c<br/>index 576e5ef0289b..6f7af4077135 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_migrate.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_migrate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_migrate.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_migrate.c</a></div><div class='hunk'>@@ -35,9 +35,9 @@ static bool engine_supports_migration(struct intel_engine_cs *engine)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xehpsdv_toggle_pdes(struct i915_address_space *vm,</div><div class='del'>-				struct i915_page_table *pt,</div><div class='del'>-				void *data)</div><div class='add'>+static void xehp_toggle_pdes(struct i915_address_space *vm,</div><div class='add'>+			     struct i915_page_table *pt,</div><div class='add'>+			     void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct insert_pte_data *d = data;</div><div class='ctx'> </div><div class='hunk'>@@ -52,9 +52,9 @@ static void xehpsdv_toggle_pdes(struct i915_address_space *vm,</div><div class='ctx'> 	d-&gt;offset += SZ_2M;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xehpsdv_insert_pte(struct i915_address_space *vm,</div><div class='del'>-			       struct i915_page_table *pt,</div><div class='del'>-			       void *data)</div><div class='add'>+static void xehp_insert_pte(struct i915_address_space *vm,</div><div class='add'>+			    struct i915_page_table *pt,</div><div class='add'>+			    void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct insert_pte_data *d = data;</div><div class='ctx'> </div><div class='hunk'>@@ -120,7 +120,7 @@ static struct i915_address_space *migrate_vm(struct intel_gt *gt)</div><div class='ctx'> 	 * 512 entry layout using 4K GTT pages. The other two windows just map</div><div class='ctx'> 	 * lmem pages and must use the new compact 32 entry layout using 64K GTT</div><div class='ctx'> 	 * pages, which ensures we can address any lmem object that the user</div><div class='del'>-	 * throws at us. We then also use the xehpsdv_toggle_pdes as a way of</div><div class='add'>+	 * throws at us. We then also use the xehp_toggle_pdes as a way of</div><div class='ctx'> 	 * just toggling the PDE bit(GEN12_PDE_64K) for us, to enable the</div><div class='ctx'> 	 * compact layout for each of these page-tables, that fall within the</div><div class='ctx'> 	 * [CHUNK_SIZE, 3 * CHUNK_SIZE) range.</div><div class='hunk'>@@ -209,12 +209,12 @@ static struct i915_address_space *migrate_vm(struct intel_gt *gt)</div><div class='ctx'> 		/* Now allow the GPU to rewrite the PTE via its own ppGTT */</div><div class='ctx'> 		if (HAS_64K_PAGES(gt-&gt;i915)) {</div><div class='ctx'> 			vm-&gt;vm.foreach(&amp;vm-&gt;vm, base, d.offset - base,</div><div class='del'>-				       xehpsdv_insert_pte, &amp;d);</div><div class='add'>+				       xehp_insert_pte, &amp;d);</div><div class='ctx'> 			d.offset = base + CHUNK_SZ;</div><div class='ctx'> 			vm-&gt;vm.foreach(&amp;vm-&gt;vm,</div><div class='ctx'> 				       d.offset,</div><div class='ctx'> 				       2 * CHUNK_SZ,</div><div class='del'>-				       xehpsdv_toggle_pdes, &amp;d);</div><div class='add'>+				       xehp_toggle_pdes, &amp;d);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			vm-&gt;vm.foreach(&amp;vm-&gt;vm, base, d.offset - base,</div><div class='ctx'> 				       insert_pte, &amp;d);</div><div class='hunk'>@@ -925,7 +925,7 @@ static int emit_clear(struct i915_request *rq, u32 offset, int size,</div><div class='ctx'> </div><div class='ctx'> 	GEM_BUG_ON(size &gt;&gt; PAGE_SHIFT &gt; S16_MAX);</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		ring_sz = XY_FAST_COLOR_BLT_DW;</div><div class='ctx'> 	else if (ver &gt;= 8)</div><div class='ctx'> 		ring_sz = 8;</div><div class='hunk'>@@ -936,7 +936,7 @@ static int emit_clear(struct i915_request *rq, u32 offset, int size,</div><div class='ctx'> 	if (IS_ERR(cs))</div><div class='ctx'> 		return PTR_ERR(cs);</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		*cs++ = XY_FAST_COLOR_BLT_CMD | XY_FAST_COLOR_BLT_DEPTH_32 |</div><div class='ctx'> 			(XY_FAST_COLOR_BLT_DW - 2);</div><div class='ctx'> 		*cs++ = FIELD_PREP(XY_FAST_COLOR_BLT_MOCS_MASK, mocs) |</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c<br/>index 25c1023eb5f9..d791d63d49b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_mocs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_mocs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_mocs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_mocs.c</a></div><div class='hunk'>@@ -53,7 +53,6 @@ struct drm_i915_mocs_table {</div><div class='ctx'> </div><div class='ctx'> /* Helper defines */</div><div class='ctx'> #define GEN9_NUM_MOCS_ENTRIES	64  /* 63-64 are reserved, but configured. */</div><div class='del'>-#define PVC_NUM_MOCS_ENTRIES	3</div><div class='ctx'> #define MTL_NUM_MOCS_ENTRIES	16</div><div class='ctx'> </div><div class='ctx'> /* (e)LLC caching options */</div><div class='hunk'>@@ -367,31 +366,6 @@ static const struct drm_i915_mocs_entry gen12_mocs_table[] = {</div><div class='ctx'> 		   L3_3_WB),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct drm_i915_mocs_entry xehpsdv_mocs_table[] = {</div><div class='del'>-	/* wa_1608975824 */</div><div class='del'>-	MOCS_ENTRY(0, 0, L3_3_WB | L3_LKUP(1)),</div><div class='del'>-</div><div class='del'>-	/* UC - Coherent; GO:L3 */</div><div class='del'>-	MOCS_ENTRY(1, 0, L3_1_UC | L3_LKUP(1)),</div><div class='del'>-	/* UC - Coherent; GO:Memory */</div><div class='del'>-	MOCS_ENTRY(2, 0, L3_1_UC | L3_GLBGO(1) | L3_LKUP(1)),</div><div class='del'>-	/* UC - Non-Coherent; GO:Memory */</div><div class='del'>-	MOCS_ENTRY(3, 0, L3_1_UC | L3_GLBGO(1)),</div><div class='del'>-	/* UC - Non-Coherent; GO:L3 */</div><div class='del'>-	MOCS_ENTRY(4, 0, L3_1_UC),</div><div class='del'>-</div><div class='del'>-	/* WB */</div><div class='del'>-	MOCS_ENTRY(5, 0, L3_3_WB | L3_LKUP(1)),</div><div class='del'>-</div><div class='del'>-	/* HW Reserved - SW program but never use. */</div><div class='del'>-	MOCS_ENTRY(48, 0, L3_3_WB | L3_LKUP(1)),</div><div class='del'>-	MOCS_ENTRY(49, 0, L3_1_UC | L3_LKUP(1)),</div><div class='del'>-	MOCS_ENTRY(60, 0, L3_1_UC),</div><div class='del'>-	MOCS_ENTRY(61, 0, L3_1_UC),</div><div class='del'>-	MOCS_ENTRY(62, 0, L3_1_UC),</div><div class='del'>-	MOCS_ENTRY(63, 0, L3_1_UC),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct drm_i915_mocs_entry dg2_mocs_table[] = {</div><div class='ctx'> 	/* UC - Coherent; GO:L3 */</div><div class='ctx'> 	MOCS_ENTRY(0, 0, L3_1_UC | L3_LKUP(1)),</div><div class='hunk'>@@ -404,17 +378,6 @@ static const struct drm_i915_mocs_entry dg2_mocs_table[] = {</div><div class='ctx'> 	MOCS_ENTRY(3, 0, L3_3_WB | L3_LKUP(1)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct drm_i915_mocs_entry pvc_mocs_table[] = {</div><div class='del'>-	/* Error */</div><div class='del'>-	MOCS_ENTRY(0, 0, L3_3_WB),</div><div class='del'>-</div><div class='del'>-	/* UC */</div><div class='del'>-	MOCS_ENTRY(1, 0, L3_1_UC),</div><div class='del'>-</div><div class='del'>-	/* WB */</div><div class='del'>-	MOCS_ENTRY(2, 0, L3_3_WB),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct drm_i915_mocs_entry mtl_mocs_table[] = {</div><div class='ctx'> 	/* Error - Reserved for Non-Use */</div><div class='ctx'> 	MOCS_ENTRY(0,</div><div class='hunk'>@@ -501,25 +464,12 @@ static unsigned int get_mocs_settings(struct drm_i915_private *i915,</div><div class='ctx'> 		table-&gt;n_entries = MTL_NUM_MOCS_ENTRIES;</div><div class='ctx'> 		table-&gt;uc_index = 9;</div><div class='ctx'> 		table-&gt;unused_entries_index = 1;</div><div class='del'>-	} else if (IS_PONTEVECCHIO(i915)) {</div><div class='del'>-		table-&gt;size = ARRAY_SIZE(pvc_mocs_table);</div><div class='del'>-		table-&gt;table = pvc_mocs_table;</div><div class='del'>-		table-&gt;n_entries = PVC_NUM_MOCS_ENTRIES;</div><div class='del'>-		table-&gt;uc_index = 1;</div><div class='del'>-		table-&gt;wb_index = 2;</div><div class='del'>-		table-&gt;unused_entries_index = 2;</div><div class='ctx'> 	} else if (IS_DG2(i915)) {</div><div class='ctx'> 		table-&gt;size = ARRAY_SIZE(dg2_mocs_table);</div><div class='ctx'> 		table-&gt;table = dg2_mocs_table;</div><div class='ctx'> 		table-&gt;uc_index = 1;</div><div class='ctx'> 		table-&gt;n_entries = GEN9_NUM_MOCS_ENTRIES;</div><div class='ctx'> 		table-&gt;unused_entries_index = 3;</div><div class='del'>-	} else if (IS_XEHPSDV(i915)) {</div><div class='del'>-		table-&gt;size = ARRAY_SIZE(xehpsdv_mocs_table);</div><div class='del'>-		table-&gt;table = xehpsdv_mocs_table;</div><div class='del'>-		table-&gt;uc_index = 2;</div><div class='del'>-		table-&gt;n_entries = GEN9_NUM_MOCS_ENTRIES;</div><div class='del'>-		table-&gt;unused_entries_index = 5;</div><div class='ctx'> 	} else if (IS_DG1(i915)) {</div><div class='ctx'> 		table-&gt;size = ARRAY_SIZE(dg1_mocs_table);</div><div class='ctx'> 		table-&gt;table = dg1_mocs_table;</div><div class='hunk'>@@ -670,7 +620,7 @@ static void init_l3cc_table(struct intel_gt *gt,</div><div class='ctx'> </div><div class='ctx'> 	intel_gt_mcr_lock(gt, &amp;flags);</div><div class='ctx'> 	for_each_l3cc(l3cc, table, i)</div><div class='del'>-		if (GRAPHICS_VER_FULL(gt-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+		if (GRAPHICS_VER_FULL(gt-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			intel_gt_mcr_multicast_write_fw(gt, XEHP_LNCFCMOCS(i), l3cc);</div><div class='ctx'> 		else</div><div class='ctx'> 			intel_uncore_write_fw(gt-&gt;uncore, GEN9_LNCFCMOCS(i), l3cc);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c<br/>index 8f4b3c8af09c..c864d101faf9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_rc6.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_rc6.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_rc6.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_rc6.c</a></div><div class='hunk'>@@ -109,7 +109,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)</div><div class='ctx'> 	 * thus allowing GuC to control RC6 entry/exit fully instead.</div><div class='ctx'> 	 * We will not set the HW ENABLE and EI bits</div><div class='ctx'> 	 */</div><div class='del'>-	if (!intel_guc_rc_enable(&amp;gt-&gt;uc.guc))</div><div class='add'>+	if (!intel_guc_rc_enable(gt_to_guc(gt)))</div><div class='ctx'> 		rc6-&gt;ctl_enable = GEN6_RC_CTL_RC6_ENABLE;</div><div class='ctx'> 	else</div><div class='ctx'> 		rc6-&gt;ctl_enable =</div><div class='hunk'>@@ -569,7 +569,7 @@ static void __intel_rc6_disable(struct intel_rc6 *rc6)</div><div class='ctx'> 	struct intel_gt *gt = rc6_to_gt(rc6);</div><div class='ctx'> </div><div class='ctx'> 	/* Take control of RC6 back from GuC */</div><div class='del'>-	intel_guc_rc_disable(&amp;gt-&gt;uc.guc);</div><div class='add'>+	intel_guc_rc_disable(gt_to_guc(gt));</div><div class='ctx'> </div><div class='ctx'> 	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);</div><div class='ctx'> 	if (GRAPHICS_VER(i915) &gt;= 9)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c<br/>index c8e9aa41fdea..6161f7a3ff70 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_reset.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_reset.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_reset.c</a></div><div class='hunk'>@@ -764,7 +764,7 @@ wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask)</div><div class='ctx'> 			 HECI_H_GS1_ER_PREP, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)</div><div class='add'>+static int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)</div><div class='ctx'> {</div><div class='ctx'> 	const int retries = engine_mask == ALL_ENGINES ? RESET_MAX_RETRIES : 1;</div><div class='ctx'> 	reset_func reset;</div><div class='hunk'>@@ -879,8 +879,17 @@ static intel_engine_mask_t reset_prepare(struct intel_gt *gt)</div><div class='ctx'> 	intel_engine_mask_t awake = 0;</div><div class='ctx'> 	enum intel_engine_id id;</div><div class='ctx'> </div><div class='del'>-	/* For GuC mode, ensure submission is disabled before stopping ring */</div><div class='del'>-	intel_uc_reset_prepare(&amp;gt-&gt;uc);</div><div class='add'>+	/**</div><div class='add'>+	 * For GuC mode with submission enabled, ensure submission</div><div class='add'>+	 * is disabled before stopping ring.</div><div class='add'>+	 *</div><div class='add'>+	 * For GuC mode with submission disabled, ensure that GuC is not</div><div class='add'>+	 * sanitized, do that after engine reset. reset_prepare()</div><div class='add'>+	 * is followed by engine reset which in this mode requires GuC to</div><div class='add'>+	 * process any CSB FIFO entries generated by the resets.</div><div class='add'>+	 */</div><div class='add'>+	if (intel_uc_uses_guc_submission(&amp;gt-&gt;uc))</div><div class='add'>+		intel_uc_reset_prepare(&amp;gt-&gt;uc);</div><div class='ctx'> </div><div class='ctx'> 	for_each_engine(engine, gt, id) {</div><div class='ctx'> 		if (intel_engine_pm_get_if_awake(engine))</div><div class='hunk'>@@ -978,7 +987,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)</div><div class='ctx'> </div><div class='ctx'> 	/* Even if the GPU reset fails, it should still stop the engines */</div><div class='ctx'> 	if (!INTEL_INFO(gt-&gt;i915)-&gt;gpu_reset_clobbers_display)</div><div class='del'>-		__intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+		intel_gt_reset_all_engines(gt);</div><div class='ctx'> </div><div class='ctx'> 	for_each_engine(engine, gt, id)</div><div class='ctx'> 		engine-&gt;submit_request = nop_submit_request;</div><div class='hunk'>@@ -1089,7 +1098,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)</div><div class='ctx'> 	/* We must reset pending GPU events before restoring our submission */</div><div class='ctx'> 	ok = !HAS_EXECLISTS(gt-&gt;i915); /* XXX better agnosticism desired */</div><div class='ctx'> 	if (!INTEL_INFO(gt-&gt;i915)-&gt;gpu_reset_clobbers_display)</div><div class='del'>-		ok = __intel_gt_reset(gt, ALL_ENGINES) == 0;</div><div class='add'>+		ok = intel_gt_reset_all_engines(gt) == 0;</div><div class='ctx'> 	if (!ok) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Warn CI about the unrecoverable wedged condition.</div><div class='hunk'>@@ -1133,10 +1142,10 @@ static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)</div><div class='ctx'> {</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='del'>-	err = __intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+	err = intel_gt_reset_all_engines(gt);</div><div class='ctx'> 	for (i = 0; err &amp;&amp; i &lt; RESET_MAX_RETRIES; i++) {</div><div class='ctx'> 		msleep(10 * (i + 1));</div><div class='del'>-		err = __intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+		err = intel_gt_reset_all_engines(gt);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -1227,6 +1236,9 @@ void intel_gt_reset(struct intel_gt *gt,</div><div class='ctx'> </div><div class='ctx'> 	intel_overlay_reset(gt-&gt;i915);</div><div class='ctx'> </div><div class='add'>+	/* sanitize uC after engine reset */</div><div class='add'>+	if (!intel_uc_uses_guc_submission(&amp;gt-&gt;uc))</div><div class='add'>+		intel_uc_reset_prepare(&amp;gt-&gt;uc);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Next we need to restore the context, but we don't use those</div><div class='ctx'> 	 * yet either...</div><div class='hunk'>@@ -1270,7 +1282,30 @@ error:</div><div class='ctx'> 	goto finish;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int intel_gt_reset_engine(struct intel_engine_cs *engine)</div><div class='add'>+/**</div><div class='add'>+ * intel_gt_reset_all_engines() - Reset all engines in the given gt.</div><div class='add'>+ * @gt: the GT to reset all engines for.</div><div class='add'>+ *</div><div class='add'>+ * This function resets all engines within the given gt.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * Zero on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int intel_gt_reset_all_engines(struct intel_gt *gt)</div><div class='add'>+{</div><div class='add'>+	return __intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * intel_gt_reset_engine() - Reset a specific engine within a gt.</div><div class='add'>+ * @engine: engine to be reset.</div><div class='add'>+ *</div><div class='add'>+ * This function resets the specified engine within a gt.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * Zero on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int intel_gt_reset_engine(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='ctx'> 	return __intel_gt_reset(engine-&gt;gt, engine-&gt;mask);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_reset.h b/drivers/gpu/drm/i915/gt/intel_reset.h<br/>index f615b30b81c5..c00de353075c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_reset.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_reset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_reset.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_reset.h</a></div><div class='hunk'>@@ -54,7 +54,8 @@ int intel_gt_terminally_wedged(struct intel_gt *gt);</div><div class='ctx'> void intel_gt_set_wedged_on_init(struct intel_gt *gt);</div><div class='ctx'> void intel_gt_set_wedged_on_fini(struct intel_gt *gt);</div><div class='ctx'> </div><div class='del'>-int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);</div><div class='add'>+int intel_gt_reset_engine(struct intel_engine_cs *engine);</div><div class='add'>+int intel_gt_reset_all_engines(struct intel_gt *gt);</div><div class='ctx'> </div><div class='ctx'> int intel_reset_guc(struct intel_gt *gt);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c<br/>index 4feef874e6d6..c9cb2a391942 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_rps.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_rps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_rps.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_rps.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@ static struct intel_guc_slpc *rps_to_slpc(struct intel_rps *rps)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = rps_to_gt(rps);</div><div class='ctx'> </div><div class='del'>-	return &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	return &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool rps_uses_slpc(struct intel_rps *rps)</div><div class='hunk'>@@ -1013,6 +1013,10 @@ void intel_rps_boost(struct i915_request *rq)</div><div class='ctx'> 	if (i915_request_signaled(rq) || i915_request_has_waitboost(rq))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* Waitboost is not needed for contexts marked with a Freq hint */</div><div class='add'>+	if (test_bit(CONTEXT_LOW_LATENCY, &amp;rq-&gt;context-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* Serializes with i915_request_retire() */</div><div class='ctx'> 	if (!test_and_set_bit(I915_FENCE_FLAG_BOOST, &amp;rq-&gt;fence.flags)) {</div><div class='ctx'> 		struct intel_rps *rps = &amp;READ_ONCE(rq-&gt;engine)-&gt;gt-&gt;rps;</div><div class='hunk'>@@ -1086,11 +1090,7 @@ static u32 intel_rps_read_state_cap(struct intel_rps *rps)</div><div class='ctx'> 	struct drm_i915_private *i915 = rps_to_i915(rps);</div><div class='ctx'> 	struct intel_uncore *uncore = rps_to_uncore(rps);</div><div class='ctx'> </div><div class='del'>-	if (IS_PONTEVECCHIO(i915))</div><div class='del'>-		return intel_uncore_read(uncore, PVC_RP_STATE_CAP);</div><div class='del'>-	else if (IS_XEHPSDV(i915))</div><div class='del'>-		return intel_uncore_read(uncore, XEHPSDV_RP_STATE_CAP);</div><div class='del'>-	else if (IS_GEN9_LP(i915))</div><div class='add'>+	if (IS_GEN9_LP(i915))</div><div class='ctx'> 		return intel_uncore_read(uncore, BXT_RP_STATE_CAP);</div><div class='ctx'> 	else</div><div class='ctx'> 		return intel_uncore_read(uncore, GEN6_RP_STATE_CAP);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c<br/>index 6a3246240e81..c8fadf58d836 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_sseu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_sseu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_sseu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_sseu.c</a></div><div class='hunk'>@@ -214,13 +214,8 @@ static void xehp_sseu_info_init(struct intel_gt *gt)</div><div class='ctx'> 	int num_compute_regs, num_geometry_regs;</div><div class='ctx'> 	int eu;</div><div class='ctx'> </div><div class='del'>-	if (IS_PONTEVECCHIO(gt-&gt;i915)) {</div><div class='del'>-		num_geometry_regs = 0;</div><div class='del'>-		num_compute_regs = 2;</div><div class='del'>-	} else {</div><div class='del'>-		num_geometry_regs = 1;</div><div class='del'>-		num_compute_regs = 1;</div><div class='del'>-	}</div><div class='add'>+	num_geometry_regs = 1;</div><div class='add'>+	num_compute_regs = 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The concept of slice has been removed in Xe_HP.  To be compatible</div><div class='hunk'>@@ -642,7 +637,7 @@ void intel_sseu_info_init(struct intel_gt *gt)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = gt-&gt;i915;</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		xehp_sseu_info_init(gt);</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) &gt;= 12)</div><div class='ctx'> 		gen12_sseu_info_init(gt);</div><div class='hunk'>@@ -851,7 +846,7 @@ void intel_sseu_print_topology(struct drm_i915_private *i915,</div><div class='ctx'> {</div><div class='ctx'> 	if (sseu-&gt;max_slices == 0)</div><div class='ctx'> 		drm_printf(p, "Unavailable\n");</div><div class='del'>-	else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		sseu_print_xehp_topology(sseu, p);</div><div class='ctx'> 	else</div><div class='ctx'> 		sseu_print_hsw_topology(sseu, p);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c b/drivers/gpu/drm/i915/gt/intel_tlb.c<br/>index 4bb13d1890e3..756e9ebbc725 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_tlb.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_tlb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_tlb.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_tlb.c</a></div><div class='hunk'>@@ -132,7 +132,7 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	with_intel_gt_pm_if_awake(gt, wakeref) {</div><div class='del'>-		struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+		struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;gt-&gt;tlb.invalidate_lock);</div><div class='ctx'> 		if (tlb_seqno_passed(gt, seqno))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c<br/>index 6ec3582c9735..5a0f1b279a80 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_workarounds.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/intel_workarounds.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/intel_workarounds.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/intel_workarounds.c</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> #include "intel_ring.h"</div><div class='ctx'> #include "intel_workarounds.h"</div><div class='ctx'> </div><div class='add'>+#include "display/intel_fbc_regs.h"</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * DOC: Hardware workarounds</div><div class='ctx'>  *</div><div class='hunk'>@@ -260,12 +262,6 @@ wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 set)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-wa_mcr_write(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 set)</div><div class='del'>-{</div><div class='del'>-	wa_mcr_write_clr_set(wal, reg, ~0, set);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='ctx'> wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 set)</div><div class='ctx'> {</div><div class='ctx'> 	wa_write_clr_set(wal, reg, set, set);</div><div class='hunk'>@@ -920,12 +916,8 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GFX_GT_IP_RANGE(engine-&gt;gt, IP_VER(12, 70), IP_VER(12, 74)))</div><div class='ctx'> 		xelpg_ctx_workarounds_init(engine, wal);</div><div class='del'>-	else if (IS_PONTEVECCHIO(i915))</div><div class='del'>-		; /* noop; none at this time */</div><div class='ctx'> 	else if (IS_DG2(i915))</div><div class='ctx'> 		dg2_ctx_workarounds_init(engine, wal);</div><div class='del'>-	else if (IS_XEHPSDV(i915))</div><div class='del'>-		; /* noop; none at this time */</div><div class='ctx'> 	else if (IS_DG1(i915))</div><div class='ctx'> 		dg1_ctx_workarounds_init(engine, wal);</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) == 12)</div><div class='hunk'>@@ -1352,9 +1344,6 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> 		gt-&gt;steering_table[MSLICE] = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_XEHPSDV(gt-&gt;i915) &amp;&amp; slice_mask &amp; BIT(0))</div><div class='del'>-		gt-&gt;steering_table[GAM] = NULL;</div><div class='del'>-</div><div class='ctx'> 	slice = __ffs(slice_mask);</div><div class='ctx'> 	subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice) %</div><div class='ctx'> 		GEN_DSS_PER_GSLICE;</div><div class='hunk'>@@ -1382,20 +1371,6 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-pvc_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='del'>-{</div><div class='del'>-	unsigned int dss;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Setup implicit steering for COMPUTE and DSS ranges to the first</div><div class='del'>-	 * non-fused-off DSS.  All other types of MCR registers will be</div><div class='del'>-	 * explicitly steered.</div><div class='del'>-	 */</div><div class='del'>-	dss = intel_sseu_find_first_xehp_dss(&amp;gt-&gt;info.sseu, 0, 0);</div><div class='del'>-	__add_mcr_wa(gt, wal, dss / GEN_DSS_PER_CSLICE, dss % GEN_DSS_PER_CSLICE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='ctx'> icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = gt-&gt;i915;</div><div class='hunk'>@@ -1522,76 +1497,6 @@ dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = gt-&gt;i915;</div><div class='del'>-</div><div class='del'>-	xehp_init_mcr(gt, wal);</div><div class='del'>-</div><div class='del'>-	/* Wa_1409757795:xehpsdv */</div><div class='del'>-	wa_mcr_write_or(wal, SCCGCTL94DC, CG3DDISURB);</div><div class='del'>-</div><div class='del'>-	/* Wa_18011725039:xehpsdv */</div><div class='del'>-	if (IS_XEHPSDV_GRAPHICS_STEP(i915, STEP_A1, STEP_B0)) {</div><div class='del'>-		wa_mcr_masked_dis(wal, MLTICTXCTL, TDONRENDER);</div><div class='del'>-		wa_mcr_write_or(wal, L3SQCREG1_CCS0, FLUSHALLNONCOH);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Wa_16011155590:xehpsdv */</div><div class='del'>-	if (IS_XEHPSDV_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))</div><div class='del'>-		wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,</div><div class='del'>-			    TSGUNIT_CLKGATE_DIS);</div><div class='del'>-</div><div class='del'>-	/* Wa_14011780169:xehpsdv */</div><div class='del'>-	if (IS_XEHPSDV_GRAPHICS_STEP(i915, STEP_B0, STEP_FOREVER)) {</div><div class='del'>-		wa_write_or(wal, UNSLCGCTL9440, GAMTLBOACS_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX7_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX6_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX5_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX4_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX3_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX2_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVDBOX0_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBKCR_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBGUC_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBBLT_CLKGATE_DIS);</div><div class='del'>-		wa_write_or(wal, UNSLCGCTL9444, GAMTLBGFXA0_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBGFXA1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPA0_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPA1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPB0_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPB1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPC0_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPC1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPD0_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBCOMPD1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBMERT_CLKGATE_DIS   |</div><div class='del'>-			    GAMTLBVEBOX3_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVEBOX2_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVEBOX1_CLKGATE_DIS |</div><div class='del'>-			    GAMTLBVEBOX0_CLKGATE_DIS);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Wa_16012725990:xehpsdv */</div><div class='del'>-	if (IS_XEHPSDV_GRAPHICS_STEP(i915, STEP_A1, STEP_FOREVER))</div><div class='del'>-		wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE, VFUNIT_CLKGATE_DIS);</div><div class='del'>-</div><div class='del'>-	/* Wa_14011060649:xehpsdv */</div><div class='del'>-	wa_14011060649(gt, wal);</div><div class='del'>-</div><div class='del'>-	/* Wa_14012362059:xehpsdv */</div><div class='del'>-	wa_mcr_write_or(wal, XEHP_MERT_MOD_CTRL, FORCE_MISS_FTLB);</div><div class='del'>-</div><div class='del'>-	/* Wa_14014368820:xehpsdv */</div><div class='del'>-	wa_mcr_write_or(wal, XEHP_GAMCNTRL_CTRL,</div><div class='del'>-			INVALIDATION_BROADCAST_MODE_DIS | GLOBAL_INVALIDATION_MODE);</div><div class='del'>-</div><div class='del'>-	/* Wa_14010670810:xehpsdv */</div><div class='del'>-	wa_mcr_write_or(wal, XEHP_L3NODEARBCFG, XEHP_LNESPARE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='ctx'> dg2_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> {</div><div class='ctx'> 	xehp_init_mcr(gt, wal);</div><div class='hunk'>@@ -1634,24 +1539,6 @@ dg2_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-pvc_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='del'>-{</div><div class='del'>-	pvc_init_mcr(gt, wal);</div><div class='del'>-</div><div class='del'>-	/* Wa_14015795083 */</div><div class='del'>-	wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);</div><div class='del'>-</div><div class='del'>-	/* Wa_18018781329 */</div><div class='del'>-	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);</div><div class='del'>-	wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);</div><div class='del'>-	wa_mcr_write_or(wal, XEHP_VDBX_MOD_CTRL, FORCE_MISS_FTLB);</div><div class='del'>-	wa_mcr_write_or(wal, XEHP_VEBX_MOD_CTRL, FORCE_MISS_FTLB);</div><div class='del'>-</div><div class='del'>-	/* Wa_16016694945 */</div><div class='del'>-	wa_mcr_masked_en(wal, XEHPC_LNCFMISCCFGREG0, XEHPC_OVRLSCCC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='ctx'> xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> {</div><div class='ctx'> 	/* Wa_14018575942 / Wa_18018781329 */</div><div class='hunk'>@@ -1727,12 +1614,6 @@ static void gt_tuning_settings(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> 		wa_mcr_write_or(wal, XEHP_SQCM, EN_32B_ACCESS);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_PONTEVECCHIO(gt-&gt;i915)) {</div><div class='del'>-		wa_mcr_write(wal, XEHPC_L3SCRUB,</div><div class='del'>-			     SCRUB_CL_DWNGRADE_SHARED | SCRUB_RATE_4B_PER_CLK);</div><div class='del'>-		wa_mcr_masked_en(wal, XEHPC_LNCFMISCCFGREG0, XEHPC_HOSTCACHEEN);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (IS_DG2(gt-&gt;i915)) {</div><div class='ctx'> 		wa_mcr_write_or(wal, XEHP_L3SCQREG7, BLEND_FILL_CACHING_OPT_DIS);</div><div class='ctx'> 		wa_mcr_write_or(wal, XEHP_SQCM, EN_32B_ACCESS);</div><div class='hunk'>@@ -1757,12 +1638,8 @@ gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))</div><div class='ctx'> 		xelpg_gt_workarounds_init(gt, wal);</div><div class='del'>-	else if (IS_PONTEVECCHIO(i915))</div><div class='del'>-		pvc_gt_workarounds_init(gt, wal);</div><div class='ctx'> 	else if (IS_DG2(i915))</div><div class='ctx'> 		dg2_gt_workarounds_init(gt, wal);</div><div class='del'>-	else if (IS_XEHPSDV(i915))</div><div class='del'>-		xehpsdv_gt_workarounds_init(gt, wal);</div><div class='ctx'> 	else if (IS_DG1(i915))</div><div class='ctx'> 		dg1_gt_workarounds_init(gt, wal);</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) == 12)</div><div class='hunk'>@@ -2180,30 +2057,6 @@ static void dg2_whitelist_build(struct intel_engine_cs *engine)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void blacklist_trtt(struct intel_engine_cs *engine)</div><div class='del'>-{</div><div class='del'>-	struct i915_wa_list *w = &amp;engine-&gt;whitelist;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Prevent read/write access to [0x4400, 0x4600) which covers</div><div class='del'>-	 * the TRTT range across all engines. Note that normally userspace</div><div class='del'>-	 * cannot access the other engines' trtt control, but for simplicity</div><div class='del'>-	 * we cover the entire range on each engine.</div><div class='del'>-	 */</div><div class='del'>-	whitelist_reg_ext(w, _MMIO(0x4400),</div><div class='del'>-			  RING_FORCE_TO_NONPRIV_DENY |</div><div class='del'>-			  RING_FORCE_TO_NONPRIV_RANGE_64);</div><div class='del'>-	whitelist_reg_ext(w, _MMIO(0x4500),</div><div class='del'>-			  RING_FORCE_TO_NONPRIV_DENY |</div><div class='del'>-			  RING_FORCE_TO_NONPRIV_RANGE_64);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pvc_whitelist_build(struct intel_engine_cs *engine)</div><div class='del'>-{</div><div class='del'>-	/* Wa_16014440446:pvc */</div><div class='del'>-	blacklist_trtt(engine);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void xelpg_whitelist_build(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct i915_wa_list *w = &amp;engine-&gt;whitelist;</div><div class='hunk'>@@ -2230,12 +2083,8 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)</div><div class='ctx'> 		; /* none yet */</div><div class='ctx'> 	else if (IS_GFX_GT_IP_RANGE(engine-&gt;gt, IP_VER(12, 70), IP_VER(12, 74)))</div><div class='ctx'> 		xelpg_whitelist_build(engine);</div><div class='del'>-	else if (IS_PONTEVECCHIO(i915))</div><div class='del'>-		pvc_whitelist_build(engine);</div><div class='ctx'> 	else if (IS_DG2(i915))</div><div class='ctx'> 		dg2_whitelist_build(engine);</div><div class='del'>-	else if (IS_XEHPSDV(i915))</div><div class='del'>-		; /* none needed */</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) == 12)</div><div class='ctx'> 		tgl_whitelist_build(engine);</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) == 11)</div><div class='hunk'>@@ -2816,10 +2665,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)</div><div class='ctx'> static void</div><div class='ctx'> ccs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)</div><div class='ctx'> {</div><div class='del'>-	if (IS_PVC_CT_STEP(engine-&gt;i915, STEP_A0, STEP_C0)) {</div><div class='del'>-		/* Wa_14014999345:pvc */</div><div class='del'>-		wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS, DISABLE_ECC);</div><div class='del'>-	}</div><div class='add'>+	/* boilerplate for any CCS engine workaround */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2852,13 +2698,14 @@ add_render_compute_tuning_settings(struct intel_gt *gt,</div><div class='ctx'> 		wa_mcr_masked_field_set(wal, GEN9_ROW_CHICKEN4, THREAD_EX_ARB_MODE,</div><div class='ctx'> 					THREAD_EX_ARB_MODE_RR_AFTER_DEP);</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER(i915) == 12 &amp;&amp; GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER(i915) == 12 &amp;&amp; GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		wa_write_clr(wal, GEN8_GARBCNTL, GEN12_BUS_HASH_CTL_BIT_EXC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_list *wal)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = engine-&gt;gt;</div><div class='add'>+	u32 mode;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_DG2(gt-&gt;i915))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2875,7 +2722,8 @@ static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_li</div><div class='ctx'> 	 * After having disabled automatic load balancing we need to</div><div class='ctx'> 	 * assign all slices to a single CCS. We will call it CCS mode 1</div><div class='ctx'> 	 */</div><div class='del'>-	intel_gt_apply_ccs_mode(gt);</div><div class='add'>+	mode = intel_gt_apply_ccs_mode(gt);</div><div class='add'>+	wa_masked_en(wal, XEHP_CCS_MODE, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2916,10 +2764,14 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_B0, STEP_FOREVER) ||</div><div class='ctx'> 	    IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_B0, STEP_FOREVER) ||</div><div class='del'>-	    IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 74), IP_VER(12, 74)))</div><div class='add'>+	    IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 74), IP_VER(12, 74))) {</div><div class='ctx'> 		/* Wa_14017856879 */</div><div class='ctx'> 		wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN3, MTL_DISABLE_FIX_FOR_EOT_FLUSH);</div><div class='ctx'> </div><div class='add'>+		/* Wa_14020495402 */</div><div class='add'>+		wa_mcr_masked_en(wal, GEN8_ROW_CHICKEN2, XELPG_DISABLE_TDL_SVHS_GATING);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||</div><div class='ctx'> 	    IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_A0, STEP_B0))</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -2947,21 +2799,15 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||</div><div class='ctx'> 	    IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_A0, STEP_B0) ||</div><div class='del'>-	    IS_PONTEVECCHIO(i915) ||</div><div class='ctx'> 	    IS_DG2(i915)) {</div><div class='ctx'> 		/* Wa_22014226127 */</div><div class='ctx'> 		wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0, DISABLE_D8_D16_COASLESCE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_PONTEVECCHIO(i915) || IS_DG2(i915)) {</div><div class='add'>+	if (IS_DG2(i915)) {</div><div class='ctx'> 		/* Wa_14015227452:dg2,pvc */</div><div class='ctx'> 		wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN4, XEHP_DIS_BBL_SYSPIPE);</div><div class='ctx'> </div><div class='del'>-		/* Wa_16015675438:dg2,pvc */</div><div class='del'>-		wa_masked_en(wal, FF_SLICE_CS_CHICKEN2, GEN12_PERF_FIX_BALANCING_CFE_DISABLE);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (IS_DG2(i915)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Wa_16011620976:dg2_g11</div><div class='ctx'> 		 * Wa_22015475538:dg2</div><div class='hunk'>@@ -2997,22 +2843,6 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li</div><div class='ctx'> 			   0 /* write-only, so skip validation */,</div><div class='ctx'> 			   true);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (IS_XEHPSDV(i915)) {</div><div class='del'>-		/* Wa_1409954639 */</div><div class='del'>-		wa_mcr_masked_en(wal,</div><div class='del'>-				 GEN8_ROW_CHICKEN,</div><div class='del'>-				 SYSTOLIC_DOP_CLOCK_GATING_DIS);</div><div class='del'>-</div><div class='del'>-		/* Wa_1607196519 */</div><div class='del'>-		wa_mcr_masked_en(wal,</div><div class='del'>-				 GEN9_ROW_CHICKEN4,</div><div class='del'>-				 GEN12_DISABLE_GRF_CLEAR);</div><div class='del'>-</div><div class='del'>-		/* Wa_14010449647:xehpsdv */</div><div class='del'>-		wa_mcr_masked_en(wal, GEN8_HALF_SLICE_CHICKEN1,</div><div class='del'>-				 GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -3095,7 +2925,7 @@ static bool mcr_range(struct drm_i915_private *i915, u32 offset)</div><div class='ctx'> 	const struct i915_range *mcr_ranges;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		mcr_ranges = mcr_ranges_xehp;</div><div class='ctx'> 	else if (GRAPHICS_VER(i915) &gt;= 12)</div><div class='ctx'> 		mcr_ranges = mcr_ranges_gen12;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c<br/>index 0dd4d00ee894..9ce8ff1c04fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/selftest_hangcheck.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/selftest_hangcheck.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/selftest_hangcheck.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/selftest_hangcheck.c</a></div><div class='hunk'>@@ -319,7 +319,7 @@ static int igt_hang_sanitycheck(void *arg)</div><div class='ctx'> 		i915_request_add(rq);</div><div class='ctx'> </div><div class='ctx'> 		timeout = 0;</div><div class='del'>-		intel_wedge_on_timeout(&amp;w, gt, HZ / 10 /* 100ms */)</div><div class='add'>+		intel_wedge_on_timeout(&amp;w, gt, HZ / 5 /* 200ms */)</div><div class='ctx'> 			timeout = i915_request_wait(rq, 0,</div><div class='ctx'> 						    MAX_SCHEDULE_TIMEOUT);</div><div class='ctx'> 		if (intel_gt_is_wedged(gt))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c<br/>index f40de408cd3a..2cfc23c58e90 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/selftest_reset.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/selftest_reset.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/selftest_reset.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/selftest_reset.c</a></div><div class='hunk'>@@ -281,7 +281,7 @@ static int igt_atomic_reset(void *arg)</div><div class='ctx'> 		awake = reset_prepare(gt);</div><div class='ctx'> 		p-&gt;critical_section_begin();</div><div class='ctx'> </div><div class='del'>-		err = __intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+		err = intel_gt_reset_all_engines(gt);</div><div class='ctx'> </div><div class='ctx'> 		p-&gt;critical_section_end();</div><div class='ctx'> 		reset_finish(gt, awake);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c<br/>index 302d0540295d..4ecc4ae74a54 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/selftest_slpc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/selftest_slpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/selftest_slpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/selftest_slpc.c</a></div><div class='hunk'>@@ -53,7 +53,7 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)</div><div class='ctx'> static int slpc_set_freq(struct intel_gt *gt, u32 freq)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	struct intel_guc_slpc *slpc = &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> </div><div class='ctx'> 	err = slpc_set_max_freq(slpc, freq);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -182,7 +182,7 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,</div><div class='ctx'> </div><div class='ctx'> static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	struct intel_guc_slpc *slpc = &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u64 power;</div><div class='ctx'> 		int freq;</div><div class='hunk'>@@ -262,7 +262,7 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,</div><div class='ctx'> </div><div class='ctx'> static int run_test(struct intel_gt *gt, int test_type)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc_slpc *slpc = &amp;gt-&gt;uc.guc.slpc;</div><div class='add'>+	struct intel_guc_slpc *slpc = &amp;gt_to_guc(gt)-&gt;slpc;</div><div class='ctx'> 	struct intel_rps *rps = &amp;gt-&gt;rps;</div><div class='ctx'> 	struct intel_engine_cs *engine;</div><div class='ctx'> 	enum intel_engine_id id;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h<br/>index 811add10c30d..c34674e797c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h</a></div><div class='hunk'>@@ -207,6 +207,27 @@ struct slpc_shared_data {</div><div class='ctx'> 	u8 reserved_mode_definition[4096];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct slpc_context_frequency_request {</div><div class='add'>+	u32 frequency_request:16;</div><div class='add'>+	u32 reserved:12;</div><div class='add'>+	u32 is_compute:1;</div><div class='add'>+	u32 ignore_busyness:1;</div><div class='add'>+	u32 is_minimum:1;</div><div class='add'>+	u32 is_predefined:1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define SLPC_CTX_FREQ_REQ_IS_COMPUTE		REG_BIT(28)</div><div class='add'>+</div><div class='add'>+struct slpc_optimized_strategies {</div><div class='add'>+	u32 compute:1;</div><div class='add'>+	u32 async_flip:1;</div><div class='add'>+	u32 media:1;</div><div class='add'>+	u32 vsync_flip:1;</div><div class='add'>+	u32 reserved:28;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define SLPC_OPTIMIZED_STRATEGY_COMPUTE		REG_BIT(0)</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * DOC: SLPC H2G MESSAGE FORMAT</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h<br/>index dabeaf4f245f..00d6402333f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h</a></div><div class='hunk'>@@ -36,6 +36,7 @@ enum intel_guc_load_status {</div><div class='ctx'> 	INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,</div><div class='ctx'> 	INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID                 = 0x73,</div><div class='ctx'> 	INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID   = 0x74,</div><div class='add'>+	INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR        = 0x75,</div><div class='ctx'> 	INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,</div><div class='ctx'> </div><div class='ctx'> 	INTEL_GUC_LOAD_STATUS_READY                            = 0xF0,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h<br/>index 58012edd4eb0..bebf28e3c479 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h</a></div><div class='hunk'>@@ -101,4 +101,11 @@ enum {</div><div class='ctx'> 	GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Workaround keys:</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE				= 0x9001,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* _ABI_GUC_KLVS_ABI_H */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c<br/>index e2e42b3e0d5d..3b69bc6616bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c</a></div><div class='hunk'>@@ -298,7 +298,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)</div><div class='ctx'> 	memcpy_toio(gsc-&gt;local_vaddr, src, gsc-&gt;fw.size);</div><div class='ctx'> 	memset_io(gsc-&gt;local_vaddr + gsc-&gt;fw.size, 0, gsc-&gt;local-&gt;size - gsc-&gt;fw.size);</div><div class='ctx'> </div><div class='del'>-	intel_guc_write_barrier(&amp;gt-&gt;uc.guc);</div><div class='add'>+	intel_guc_write_barrier(gt_to_guc(gt));</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_object_unpin_map(gsc-&gt;fw.obj);</div><div class='ctx'> </div><div class='hunk'>@@ -351,7 +351,7 @@ static int gsc_fw_query_compatibility_version(struct intel_gsc_uc *gsc)</div><div class='ctx'> 	void *vaddr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = intel_guc_allocate_and_map_vma(&amp;gt-&gt;uc.guc, GSC_VER_PKT_SZ * 2,</div><div class='add'>+	err = intel_guc_allocate_and_map_vma(gt_to_guc(gt), GSC_VER_PKT_SZ * 2,</div><div class='ctx'> 					     &amp;vma, &amp;vaddr);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		gt_err(gt, "failed to allocate vma for GSC version query\n");</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c<br/>index 40817ebcca71..a7d5465655f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c</a></div><div class='hunk'>@@ -358,7 +358,8 @@ static int proxy_channel_alloc(struct intel_gsc_uc *gsc)</div><div class='ctx'> 	void *vaddr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = intel_guc_allocate_and_map_vma(&amp;gt-&gt;uc.guc, GSC_PROXY_CHANNEL_SIZE,</div><div class='add'>+	err = intel_guc_allocate_and_map_vma(gt_to_guc(gt),</div><div class='add'>+					     GSC_PROXY_CHANNEL_SIZE,</div><div class='ctx'> 					     &amp;vma, &amp;vaddr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c<br/>index 2b450c43bbd7..5e60a34692af 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc.c</a></div><div class='hunk'>@@ -286,7 +286,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)</div><div class='ctx'> </div><div class='ctx'> 	/* Wa_22012773006:gen11,gen12 &lt; XeHP */</div><div class='ctx'> 	if (GRAPHICS_VER(gt-&gt;i915) &gt;= 11 &amp;&amp;</div><div class='del'>-	    GRAPHICS_VER_FULL(gt-&gt;i915) &lt; IP_VER(12, 50))</div><div class='add'>+	    GRAPHICS_VER_FULL(gt-&gt;i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		flags |= GUC_WA_POLLCS;</div><div class='ctx'> </div><div class='ctx'> 	/* Wa_14014475959 */</div><div class='hunk'>@@ -294,6 +294,11 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)</div><div class='ctx'> 	    IS_DG2(gt-&gt;i915))</div><div class='ctx'> 		flags |= GUC_WA_HOLD_CCS_SWITCHOUT;</div><div class='ctx'> </div><div class='add'>+	/* Wa_16019325821 */</div><div class='add'>+	/* Wa_14019159160 */</div><div class='add'>+	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))</div><div class='add'>+		flags |= GUC_WA_RCS_CCS_SWITCHOUT;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Wa_14012197797</div><div class='ctx'> 	 * Wa_22011391025</div><div class='hunk'>@@ -315,15 +320,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)</div><div class='ctx'> 	if (IS_DG2_G11(gt-&gt;i915))</div><div class='ctx'> 		flags |= GUC_WA_CONTEXT_ISOLATION;</div><div class='ctx'> </div><div class='del'>-	/* Wa_16015675438 */</div><div class='del'>-	if (!RCS_MASK(gt))</div><div class='del'>-		flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;</div><div class='del'>-</div><div class='del'>-	/* Wa_14018913170 */</div><div class='del'>-	if (GUC_FIRMWARE_VER(guc) &gt;= MAKE_GUC_VER(70, 7, 0)) {</div><div class='del'>-		if (IS_DG2(gt-&gt;i915) || IS_METEORLAKE(gt-&gt;i915) || IS_PONTEVECCHIO(gt-&gt;i915))</div><div class='del'>-			flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * Wa_14018913170: Applicable to all platforms supported by i915 so</div><div class='add'>+	 * don't bother testing for all X/Y/Z platforms explicitly.</div><div class='add'>+	 */</div><div class='add'>+	if (GUC_FIRMWARE_VER(guc) &gt;= MAKE_GUC_VER(70, 7, 0))</div><div class='add'>+		flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;</div><div class='ctx'> </div><div class='ctx'> 	return flags;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h<br/>index be70c46604b4..57b903132776 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc.h</a></div><div class='hunk'>@@ -204,6 +204,8 @@ struct intel_guc {</div><div class='ctx'> 	struct guc_mmio_reg *ads_regset;</div><div class='ctx'> 	/** @ads_golden_ctxt_size: size of the golden contexts in the ADS */</div><div class='ctx'> 	u32 ads_golden_ctxt_size;</div><div class='add'>+	/** @ads_waklv_size: size of workaround KLVs */</div><div class='add'>+	u32 ads_waklv_size;</div><div class='ctx'> 	/** @ads_capture_size: size of register lists in the ADS used for error capture */</div><div class='ctx'> 	u32 ads_capture_size;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c<br/>index f7372f736a77..c606bb5e3b7b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c</a></div><div class='hunk'>@@ -46,6 +46,10 @@</div><div class='ctx'>  *      +---------------------------------------+</div><div class='ctx'>  *      | padding                               |</div><div class='ctx'>  *      +---------------------------------------+ &lt;== 4K aligned</div><div class='add'>+ *      | w/a KLVs                              |</div><div class='add'>+ *      +---------------------------------------+</div><div class='add'>+ *      | padding                               |</div><div class='add'>+ *      +---------------------------------------+ &lt;== 4K aligned</div><div class='ctx'>  *      | capture lists                         |</div><div class='ctx'>  *      +---------------------------------------+</div><div class='ctx'>  *      | padding                               |</div><div class='hunk'>@@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)</div><div class='ctx'> 	return PAGE_ALIGN(guc-&gt;ads_golden_ctxt_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 guc_ads_waklv_size(struct intel_guc *guc)</div><div class='add'>+{</div><div class='add'>+	return PAGE_ALIGN(guc-&gt;ads_waklv_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 guc_ads_capture_size(struct intel_guc *guc)</div><div class='ctx'> {</div><div class='ctx'> 	return PAGE_ALIGN(guc-&gt;ads_capture_size);</div><div class='hunk'>@@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct intel_guc *guc)</div><div class='ctx'> 	return PAGE_ALIGN(offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 guc_ads_capture_offset(struct intel_guc *guc)</div><div class='add'>+static u32 guc_ads_waklv_offset(struct intel_guc *guc)</div><div class='ctx'> {</div><div class='ctx'> 	u32 offset;</div><div class='ctx'> </div><div class='hunk'>@@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct intel_guc *guc)</div><div class='ctx'> 	return PAGE_ALIGN(offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 guc_ads_capture_offset(struct intel_guc *guc)</div><div class='add'>+{</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	offset = guc_ads_waklv_offset(guc) +</div><div class='add'>+		 guc_ads_waklv_size(guc);</div><div class='add'>+</div><div class='add'>+	return PAGE_ALIGN(offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 guc_ads_private_data_offset(struct intel_guc *guc)</div><div class='ctx'> {</div><div class='ctx'> 	u32 offset;</div><div class='hunk'>@@ -393,7 +412,7 @@ static int guc_mmio_regset_init(struct temp_regset *regset,</div><div class='ctx'> </div><div class='ctx'> 	/* add in local MOCS registers */</div><div class='ctx'> 	for (i = 0; i &lt; LNCFCMOCS_REG_COUNT; i++)</div><div class='del'>-		if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+		if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			ret |= GUC_MCR_REG_ADD(gt, regset, XEHP_LNCFCMOCS(i), false);</div><div class='ctx'> 		else</div><div class='ctx'> 			ret |= GUC_MMIO_REG_ADD(gt, regset, GEN9_LNCFCMOCS(i), false);</div><div class='hunk'>@@ -503,7 +522,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt,</div><div class='ctx'> </div><div class='ctx'> #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))</div><div class='ctx'> #define XEHP_LR_HW_CONTEXT_SIZE (96 * sizeof(u32))</div><div class='del'>-#define LR_HW_CONTEXT_SZ(i915) (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50) ? \</div><div class='add'>+#define LR_HW_CONTEXT_SZ(i915) (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55) ? \</div><div class='ctx'> 				    XEHP_LR_HW_CONTEXT_SIZE : \</div><div class='ctx'> 				    LR_HW_CONTEXT_SIZE)</div><div class='ctx'> #define LRC_SKIP_SIZE(i915) (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SZ(i915))</div><div class='hunk'>@@ -796,6 +815,65 @@ engine_instance_list:</div><div class='ctx'> 	return PAGE_ALIGN(total_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Wa_14019159160 */</div><div class='add'>+static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)</div><div class='add'>+{</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 klv_entry[] = {</div><div class='add'>+		/* 16:16 key/length */</div><div class='add'>+		FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |</div><div class='add'>+		FIELD_PREP(GUC_KLV_0_LEN, 0),</div><div class='add'>+		/* 0 dwords data */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	size = sizeof(klv_entry);</div><div class='add'>+	GEM_BUG_ON(remain &lt; size);</div><div class='add'>+</div><div class='add'>+	iosys_map_memcpy_to(&amp;guc-&gt;ads_map, offset, klv_entry, size);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void guc_waklv_init(struct intel_guc *guc)</div><div class='add'>+{</div><div class='add'>+	struct intel_gt *gt = guc_to_gt(guc);</div><div class='add'>+	u32 offset, addr_ggtt, remain, size;</div><div class='add'>+</div><div class='add'>+	if (!intel_uc_uses_guc_submission(&amp;gt-&gt;uc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (GUC_FIRMWARE_VER(guc) &lt; MAKE_GUC_VER(70, 10, 0))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	GEM_BUG_ON(iosys_map_is_null(&amp;guc-&gt;ads_map));</div><div class='add'>+	offset = guc_ads_waklv_offset(guc);</div><div class='add'>+	remain = guc_ads_waklv_size(guc);</div><div class='add'>+</div><div class='add'>+	/* Wa_14019159160 */</div><div class='add'>+	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {</div><div class='add'>+		size = guc_waklv_ra_mode(guc, offset, remain);</div><div class='add'>+		offset += size;</div><div class='add'>+		remain -= size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = guc_ads_waklv_size(guc) - remain;</div><div class='add'>+	if (!size)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	offset = guc_ads_waklv_offset(guc);</div><div class='add'>+	addr_ggtt = intel_guc_ggtt_offset(guc, guc-&gt;ads_vma) + offset;</div><div class='add'>+</div><div class='add'>+	ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt);</div><div class='add'>+	ads_blob_write(guc, ads.wa_klv_addr_hi, 0);</div><div class='add'>+	ads_blob_write(guc, ads.wa_klv_size, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int guc_prep_waklv(struct intel_guc *guc)</div><div class='add'>+{</div><div class='add'>+	/* Fudge something chunky for now: */</div><div class='add'>+	return PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __guc_ads_init(struct intel_guc *guc)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = guc_to_gt(guc);</div><div class='hunk'>@@ -843,6 +921,9 @@ static void __guc_ads_init(struct intel_guc *guc)</div><div class='ctx'> 	/* MMIO save/restore list */</div><div class='ctx'> 	guc_mmio_reg_state_init(guc);</div><div class='ctx'> </div><div class='add'>+	/* Workaround KLV list */</div><div class='add'>+	guc_waklv_init(guc);</div><div class='add'>+</div><div class='ctx'> 	/* Private Data */</div><div class='ctx'> 	ads_blob_write(guc, ads.private_data, base +</div><div class='ctx'> 		       guc_ads_private_data_offset(guc));</div><div class='hunk'>@@ -886,6 +967,12 @@ int intel_guc_ads_create(struct intel_guc *guc)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	guc-&gt;ads_capture_size = ret;</div><div class='ctx'> </div><div class='add'>+	/* And don't forget the workaround KLVs: */</div><div class='add'>+	ret = guc_prep_waklv(guc);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	guc-&gt;ads_waklv_size = ret;</div><div class='add'>+</div><div class='ctx'> 	/* Now the total size can be determined: */</div><div class='ctx'> 	size = guc_ads_blob_size(guc);</div><div class='ctx'> </div><div class='hunk'>@@ -961,7 +1048,7 @@ u32 intel_guc_engine_usage_offset(struct intel_guc *guc)</div><div class='ctx'> </div><div class='ctx'> struct iosys_map intel_guc_engine_usage_record_map(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	u8 guc_class = engine_class_to_guc_class(engine-&gt;class);</div><div class='ctx'> 	size_t offset = offsetof(struct __guc_ads_blob,</div><div class='ctx'> 				 engine_usage.engines[guc_class][ilog2(engine-&gt;logical_mask)]);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c<br/>index a1cd40d80517..9547fff672bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c</a></div><div class='hunk'>@@ -51,6 +51,7 @@</div><div class='ctx'> 	{ RING_ESR(0),              0,      0, "ESR" }, \</div><div class='ctx'> 	{ RING_DMA_FADD(0),         0,      0, "RING_DMA_FADD_LDW" }, \</div><div class='ctx'> 	{ RING_DMA_FADD_UDW(0),     0,      0, "RING_DMA_FADD_UDW" }, \</div><div class='add'>+	{ RING_EIR(0),              0,      0, "EIR" }, \</div><div class='ctx'> 	{ RING_IPEIR(0),            0,      0, "IPEIR" }, \</div><div class='ctx'> 	{ RING_IPEHR(0),            0,      0, "IPEHR" }, \</div><div class='ctx'> 	{ RING_INSTPS(0),           0,      0, "INSTPS" }, \</div><div class='hunk'>@@ -80,9 +81,6 @@</div><div class='ctx'> 	{ GEN8_RING_PDP_LDW(0, 3),  0,      0, "PDP3_LDW" }, \</div><div class='ctx'> 	{ GEN8_RING_PDP_UDW(0, 3),  0,      0, "PDP3_UDW" }</div><div class='ctx'> </div><div class='del'>-#define COMMON_BASE_HAS_EU \</div><div class='del'>-	{ EIR,                      0,      0, "EIR" }</div><div class='del'>-</div><div class='ctx'> #define COMMON_BASE_RENDER \</div><div class='ctx'> 	{ GEN7_SC_INSTDONE,         0,      0, "GEN7_SC_INSTDONE" }</div><div class='ctx'> </div><div class='hunk'>@@ -105,7 +103,6 @@ static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {</div><div class='ctx'> </div><div class='ctx'> /* XE_LP Render / Compute Per-Class */</div><div class='ctx'> static const struct __guc_mmio_reg_descr xe_lp_rc_class_regs[] = {</div><div class='del'>-	COMMON_BASE_HAS_EU,</div><div class='ctx'> 	COMMON_BASE_RENDER,</div><div class='ctx'> 	COMMON_GEN12BASE_RENDER,</div><div class='ctx'> };</div><div class='hunk'>@@ -148,7 +145,6 @@ static const struct __guc_mmio_reg_descr gen8_global_regs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct __guc_mmio_reg_descr gen8_rc_class_regs[] = {</div><div class='del'>-	COMMON_BASE_HAS_EU,</div><div class='ctx'> 	COMMON_BASE_RENDER,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1441,7 +1437,7 @@ int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf,</div><div class='ctx'> 	if (!cap || !ee-&gt;engine)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	guc = &amp;ee-&gt;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	guc = gt_to_guc(ee-&gt;engine-&gt;gt);</div><div class='ctx'> </div><div class='ctx'> 	i915_error_printf(ebuf, "global --- GuC Error Capture on %s command stream:\n",</div><div class='ctx'> 			  ee-&gt;engine-&gt;name);</div><div class='hunk'>@@ -1543,7 +1539,7 @@ bool intel_guc_capture_is_matching_engine(struct intel_gt *gt,</div><div class='ctx'> 	if (!gt || !ce || !engine)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	guc = gt_to_guc(gt);</div><div class='ctx'> 	if (!guc-&gt;capture)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -1573,7 +1569,7 @@ void intel_guc_capture_get_matching_node(struct intel_gt *gt,</div><div class='ctx'> 	if (!gt || !ee || !ce)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	guc = gt_to_guc(gt);</div><div class='ctx'> 	if (!guc-&gt;capture)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c<br/>index 52332bb14339..23f54c84cbab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@ static void guc_prepare_xfer(struct intel_gt *gt)</div><div class='ctx'> 			 GUC_ENABLE_READ_CACHE_FOR_WOPCM_DATA |</div><div class='ctx'> 			 GUC_ENABLE_MIA_CLOCK_GATING;</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(uncore-&gt;i915) &lt; IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(uncore-&gt;i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		shim_flags |= GUC_DISABLE_SRAM_INIT_TO_ZEROES |</div><div class='ctx'> 			      GUC_ENABLE_MIA_CACHING;</div><div class='ctx'> </div><div class='hunk'>@@ -115,6 +115,7 @@ static inline bool guc_load_done(struct intel_uncore *uncore, u32 *status, bool</div><div class='ctx'> 	case INTEL_GUC_LOAD_STATUS_INIT_DATA_INVALID:</div><div class='ctx'> 	case INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID:</div><div class='ctx'> 	case INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID:</div><div class='add'>+	case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:</div><div class='ctx'> 		*success = false;</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -241,6 +242,11 @@ static int guc_wait_ucode(struct intel_guc *guc)</div><div class='ctx'> 			ret = -EPERM;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:</div><div class='add'>+			guc_info(guc, "invalid w/a KLV entry\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case INTEL_GUC_LOAD_STATUS_HWCONFIG_START:</div><div class='ctx'> 			guc_info(guc, "still extracting hwconfig table.\n");</div><div class='ctx'> 			ret = -ETIMEDOUT;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h<br/>index 8ae1846431da..14797e80bc92 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h</a></div><div class='hunk'>@@ -96,8 +96,9 @@</div><div class='ctx'> #define   GUC_WA_GAM_CREDITS		BIT(10)</div><div class='ctx'> #define   GUC_WA_DUAL_QUEUE		BIT(11)</div><div class='ctx'> #define   GUC_WA_RCS_RESET_BEFORE_RC6	BIT(13)</div><div class='del'>-#define   GUC_WA_CONTEXT_ISOLATION	BIT(15)</div><div class='ctx'> #define   GUC_WA_PRE_PARSER		BIT(14)</div><div class='add'>+#define   GUC_WA_CONTEXT_ISOLATION	BIT(15)</div><div class='add'>+#define   GUC_WA_RCS_CCS_SWITCHOUT	BIT(16)</div><div class='ctx'> #define   GUC_WA_HOLD_CCS_SWITCHOUT	BIT(17)</div><div class='ctx'> #define   GUC_WA_POLLCS			BIT(18)</div><div class='ctx'> #define   GUC_WA_RCS_REGS_IN_CCS_REGS_LIST	BIT(21)</div><div class='hunk'>@@ -430,7 +431,10 @@ struct guc_ads {</div><div class='ctx'> 	u32 capture_instance[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];</div><div class='ctx'> 	u32 capture_class[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];</div><div class='ctx'> 	u32 capture_global[GUC_CAPTURE_LIST_INDEX_MAX];</div><div class='del'>-	u32 reserved[14];</div><div class='add'>+	u32 wa_klv_addr_lo;</div><div class='add'>+	u32 wa_klv_addr_hi;</div><div class='add'>+	u32 wa_klv_size;</div><div class='add'>+	u32 reserved[11];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> /* Engine usage stats */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c<br/>index cc9569af7f0c..b67a15f74276 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static bool has_table(struct drm_i915_private *i915)</div><div class='ctx'> static int guc_hwconfig_init(struct intel_gt *gt)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_hwconfig *hwconfig = &amp;gt-&gt;info.hwconfig;</div><div class='del'>-	struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!has_table(gt-&gt;i915))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c<br/>index 3e681ab6fbf9..706fffca698b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c</a></div><div class='hunk'>@@ -537,6 +537,20 @@ int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int intel_guc_slpc_set_strategy(struct intel_guc_slpc *slpc, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *i915 = slpc_to_i915(slpc);</div><div class='add'>+	intel_wakeref_t wakeref;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	with_intel_runtime_pm(&amp;i915-&gt;runtime_pm, wakeref)</div><div class='add'>+		ret = slpc_set_param(slpc,</div><div class='add'>+				     SLPC_PARAM_STRATEGIES,</div><div class='add'>+				     val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int intel_guc_slpc_set_media_ratio_mode(struct intel_guc_slpc *slpc, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = slpc_to_i915(slpc);</div><div class='hunk'>@@ -711,6 +725,9 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)</div><div class='ctx'> 	/* Set cached media freq ratio mode */</div><div class='ctx'> 	intel_guc_slpc_set_media_ratio_mode(slpc, slpc-&gt;media_ratio_mode);</div><div class='ctx'> </div><div class='add'>+	/* Enable SLPC Optimized Strategy for compute */</div><div class='add'>+	intel_guc_slpc_set_strategy(slpc, SLPC_OPTIMIZED_STRATEGY_COMPUTE);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h<br/>index 6ac6503c39d4..1cb5fd44f05c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h</a></div><div class='hunk'>@@ -45,5 +45,6 @@ void intel_guc_pm_intrmsk_enable(struct intel_gt *gt);</div><div class='ctx'> void intel_guc_slpc_boost(struct intel_guc_slpc *slpc);</div><div class='ctx'> void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc);</div><div class='ctx'> int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val);</div><div class='add'>+int intel_guc_slpc_set_strategy(struct intel_guc_slpc *slpc, u32 val);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c<br/>index 0f83c6d4376f..0eaa1064242c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c</a></div><div class='hunk'>@@ -398,7 +398,7 @@ static inline void set_context_guc_id_invalid(struct intel_context *ce)</div><div class='ctx'> </div><div class='ctx'> static inline struct intel_guc *ce_to_guc(struct intel_context *ce)</div><div class='ctx'> {</div><div class='del'>-	return &amp;ce-&gt;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	return gt_to_guc(ce-&gt;engine-&gt;gt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct i915_priolist *to_priolist(struct rb_node *rb)</div><div class='hunk'>@@ -1246,7 +1246,7 @@ static void __get_engine_usage_record(struct intel_engine_cs *engine,</div><div class='ctx'> static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_engine_guc_stats *stats = &amp;engine-&gt;stats.guc;</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	u32 last_switch, ctx_id, total;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;guc-&gt;timestamp.lock);</div><div class='hunk'>@@ -1311,7 +1311,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now)</div><div class='ctx'> 	struct intel_engine_guc_stats stats_saved, *stats = &amp;engine-&gt;stats.guc;</div><div class='ctx'> 	struct i915_gpu_error *gpu_error = &amp;engine-&gt;i915-&gt;gpu_error;</div><div class='ctx'> 	struct intel_gt *gt = engine-&gt;gt;</div><div class='del'>-	struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> 	u64 total, gt_stamp_saved;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 reset_count;</div><div class='hunk'>@@ -1577,7 +1577,7 @@ static void guc_fini_engine_stats(struct intel_guc *guc)</div><div class='ctx'> </div><div class='ctx'> void intel_guc_busyness_park(struct intel_gt *gt)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> </div><div class='ctx'> 	if (!guc_submission_initialized(guc))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1604,7 +1604,7 @@ void intel_guc_busyness_park(struct intel_gt *gt)</div><div class='ctx'> </div><div class='ctx'> void intel_guc_busyness_unpark(struct intel_gt *gt)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	ktime_t unused;</div><div class='ctx'> </div><div class='hunk'>@@ -2189,7 +2189,7 @@ static bool need_tasklet(struct intel_guc *guc, struct i915_request *rq)</div><div class='ctx'> static void guc_submit_request(struct i915_request *rq)</div><div class='ctx'> {</div><div class='ctx'> 	struct i915_sched_engine *sched_engine = rq-&gt;engine-&gt;sched_engine;</div><div class='del'>-	struct intel_guc *guc = &amp;rq-&gt;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(rq-&gt;engine-&gt;gt);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* Will be called from irq-context when using foreign fences. */</div><div class='hunk'>@@ -2215,11 +2215,10 @@ static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)</div><div class='ctx'> 					      order_base_2(ce-&gt;parallel.number_children</div><div class='ctx'> 							   + 1));</div><div class='ctx'> 	else</div><div class='del'>-		ret = ida_simple_get(&amp;guc-&gt;submission_state.guc_ids,</div><div class='del'>-				     NUMBER_MULTI_LRC_GUC_ID(guc),</div><div class='del'>-				     guc-&gt;submission_state.num_guc_ids,</div><div class='del'>-				     GFP_KERNEL | __GFP_RETRY_MAYFAIL |</div><div class='del'>-				     __GFP_NOWARN);</div><div class='add'>+		ret = ida_alloc_range(&amp;guc-&gt;submission_state.guc_ids,</div><div class='add'>+				      NUMBER_MULTI_LRC_GUC_ID(guc),</div><div class='add'>+				      guc-&gt;submission_state.num_guc_ids - 1,</div><div class='add'>+				      GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN);</div><div class='ctx'> 	if (unlikely(ret &lt; 0))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2242,8 +2241,8 @@ static void __release_guc_id(struct intel_guc *guc, struct intel_context *ce)</div><div class='ctx'> 							   + 1));</div><div class='ctx'> 		} else {</div><div class='ctx'> 			--guc-&gt;submission_state.guc_ids_in_use;</div><div class='del'>-			ida_simple_remove(&amp;guc-&gt;submission_state.guc_ids,</div><div class='del'>-					  ce-&gt;guc_id.id);</div><div class='add'>+			ida_free(&amp;guc-&gt;submission_state.guc_ids,</div><div class='add'>+				 ce-&gt;guc_id.id);</div><div class='ctx'> 		}</div><div class='ctx'> 		clr_ctx_id_mapping(guc, ce-&gt;guc_id.id);</div><div class='ctx'> 		set_context_guc_id_invalid(ce);</div><div class='hunk'>@@ -2640,6 +2639,7 @@ MAKE_CONTEXT_POLICY_ADD(execution_quantum, EXECUTION_QUANTUM)</div><div class='ctx'> MAKE_CONTEXT_POLICY_ADD(preemption_timeout, PREEMPTION_TIMEOUT)</div><div class='ctx'> MAKE_CONTEXT_POLICY_ADD(priority, SCHEDULING_PRIORITY)</div><div class='ctx'> MAKE_CONTEXT_POLICY_ADD(preempt_to_idle, PREEMPT_TO_IDLE_ON_QUANTUM_EXPIRY)</div><div class='add'>+MAKE_CONTEXT_POLICY_ADD(slpc_ctx_freq_req, SLPM_GT_FREQUENCY)</div><div class='ctx'> </div><div class='ctx'> #undef MAKE_CONTEXT_POLICY_ADD</div><div class='ctx'> </div><div class='hunk'>@@ -2655,10 +2655,11 @@ static int __guc_context_set_context_policies(struct intel_guc *guc,</div><div class='ctx'> static int guc_context_policy_init_v70(struct intel_context *ce, bool loop)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_engine_cs *engine = ce-&gt;engine;</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	struct context_policy policy;</div><div class='ctx'> 	u32 execution_quantum;</div><div class='ctx'> 	u32 preemption_timeout;</div><div class='add'>+	u32 slpc_ctx_freq_req = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2670,11 +2671,15 @@ static int guc_context_policy_init_v70(struct intel_context *ce, bool loop)</div><div class='ctx'> 	execution_quantum = engine-&gt;props.timeslice_duration_ms * 1000;</div><div class='ctx'> 	preemption_timeout = engine-&gt;props.preempt_timeout_ms * 1000;</div><div class='ctx'> </div><div class='add'>+	if (ce-&gt;flags &amp; BIT(CONTEXT_LOW_LATENCY))</div><div class='add'>+		slpc_ctx_freq_req |= SLPC_CTX_FREQ_REQ_IS_COMPUTE;</div><div class='add'>+</div><div class='ctx'> 	__guc_context_policy_start_klv(&amp;policy, ce-&gt;guc_id.id);</div><div class='ctx'> </div><div class='ctx'> 	__guc_context_policy_add_priority(&amp;policy, ce-&gt;guc_state.prio);</div><div class='ctx'> 	__guc_context_policy_add_execution_quantum(&amp;policy, execution_quantum);</div><div class='ctx'> 	__guc_context_policy_add_preemption_timeout(&amp;policy, preemption_timeout);</div><div class='add'>+	__guc_context_policy_add_slpc_ctx_freq_req(&amp;policy, slpc_ctx_freq_req);</div><div class='ctx'> </div><div class='ctx'> 	if (engine-&gt;flags &amp; I915_ENGINE_WANT_FORCED_PREEMPTION)</div><div class='ctx'> 		__guc_context_policy_add_preempt_to_idle(&amp;policy, 1);</div><div class='hunk'>@@ -2731,7 +2736,7 @@ static u32 map_guc_prio_to_lrc_desc_prio(u8 prio)</div><div class='ctx'> static void prepare_context_registration_info_v69(struct intel_context *ce)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_engine_cs *engine = ce-&gt;engine;</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	u32 ctx_id = ce-&gt;guc_id.id;</div><div class='ctx'> 	struct guc_lrc_desc_v69 *desc;</div><div class='ctx'> 	struct intel_context *child;</div><div class='hunk'>@@ -2800,7 +2805,7 @@ static void prepare_context_registration_info_v70(struct intel_context *ce,</div><div class='ctx'> 						  struct guc_ctxt_registration_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_engine_cs *engine = ce-&gt;engine;</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	u32 ctx_id = ce-&gt;guc_id.id;</div><div class='ctx'> </div><div class='ctx'> 	GEM_BUG_ON(!engine-&gt;mask);</div><div class='hunk'>@@ -2863,7 +2868,7 @@ static int try_context_registration(struct intel_context *ce, bool loop)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_engine_cs *engine = ce-&gt;engine;</div><div class='ctx'> 	struct intel_runtime_pm *runtime_pm = engine-&gt;uncore-&gt;rpm;</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	u32 ctx_id = ce-&gt;guc_id.id;</div><div class='ctx'> 	bool context_registered;</div><div class='hunk'>@@ -4491,7 +4496,13 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)</div><div class='ctx'> 	if (engine-&gt;class == COMPUTE_CLASS)</div><div class='ctx'> 		if (IS_GFX_GT_IP_STEP(engine-&gt;gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||</div><div class='ctx'> 		    IS_DG2(engine-&gt;i915))</div><div class='del'>-			engine-&gt;flags |= I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;</div><div class='add'>+			engine-&gt;flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;</div><div class='add'>+</div><div class='add'>+	/* Wa_16019325821 */</div><div class='add'>+	/* Wa_14019159160 */</div><div class='add'>+	if ((engine-&gt;class == COMPUTE_CLASS || engine-&gt;class == RENDER_CLASS) &amp;&amp;</div><div class='add'>+	    IS_GFX_GT_IP_RANGE(engine-&gt;gt, IP_VER(12, 70), IP_VER(12, 71)))</div><div class='add'>+		engine-&gt;flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TODO: GuC supports timeslicing and semaphores as well, but they're</div><div class='hunk'>@@ -4502,7 +4513,7 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	engine-&gt;emit_bb_start = gen8_emit_bb_start;</div><div class='del'>-	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(engine-&gt;i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 		engine-&gt;emit_bb_start = xehp_emit_bb_start;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4544,7 +4555,7 @@ static void guc_sched_engine_destroy(struct kref *kref)</div><div class='ctx'> int intel_guc_submission_setup(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *i915 = engine-&gt;i915;</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The setup relies on several assumptions (e.g. irqs always enabled)</div><div class='hunk'>@@ -5303,7 +5314,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,</div><div class='ctx'> </div><div class='ctx'> void intel_guc_find_hung_context(struct intel_engine_cs *engine)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	struct intel_context *ce;</div><div class='ctx'> 	struct i915_request *rq;</div><div class='ctx'> 	unsigned long index;</div><div class='hunk'>@@ -5365,7 +5376,7 @@ void intel_guc_dump_active_requests(struct intel_engine_cs *engine,</div><div class='ctx'> 				    struct i915_request *hung_rq,</div><div class='ctx'> 				    struct drm_printer *m)</div><div class='ctx'> {</div><div class='del'>-	struct intel_guc *guc = &amp;engine-&gt;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(engine-&gt;gt);</div><div class='ctx'> 	struct intel_context *ce;</div><div class='ctx'> 	unsigned long index;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -5817,7 +5828,7 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,</div><div class='ctx'> 	if (!ve)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	guc = &amp;siblings[0]-&gt;gt-&gt;uc.guc;</div><div class='add'>+	guc = gt_to_guc(siblings[0]-&gt;gt);</div><div class='ctx'> </div><div class='ctx'> 	ve-&gt;base.i915 = siblings[0]-&gt;i915;</div><div class='ctx'> 	ve-&gt;base.gt = siblings[0]-&gt;gt;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c<br/>index 0945b177d5f9..2d9152eb7282 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_huc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_huc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_huc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_huc.c</a></div><div class='hunk'>@@ -385,7 +385,7 @@ int intel_huc_init(struct intel_huc *huc)</div><div class='ctx'> 	if (HAS_ENGINE(gt, GSC0)) {</div><div class='ctx'> 		struct i915_vma *vma;</div><div class='ctx'> </div><div class='del'>-		vma = intel_guc_allocate_vma(&amp;gt-&gt;uc.guc, PXP43_HUC_AUTH_INOUT_SIZE * 2);</div><div class='add'>+		vma = intel_guc_allocate_vma(gt_to_guc(gt), PXP43_HUC_AUTH_INOUT_SIZE * 2);</div><div class='ctx'> 		if (IS_ERR(vma)) {</div><div class='ctx'> 			err = PTR_ERR(vma);</div><div class='ctx'> 			huc_info(huc, "Failed to allocate heci pkt\n");</div><div class='hunk'>@@ -540,7 +540,7 @@ int intel_huc_wait_for_auth_complete(struct intel_huc *huc,</div><div class='ctx'> int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = huc_to_gt(huc);</div><div class='del'>-	struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_uc_fw_is_loaded(&amp;huc-&gt;fw))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c<br/>index 399bc319180b..7a63abf8f644 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_uc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_uc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_uc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_uc.c</a></div><div class='hunk'>@@ -50,10 +50,6 @@ static void uc_expand_default_options(struct intel_uc *uc)</div><div class='ctx'> </div><div class='ctx'> 	/* Default: enable HuC authentication and GuC submission */</div><div class='ctx'> 	i915-&gt;params.enable_guc = ENABLE_GUC_LOAD_HUC | ENABLE_GUC_SUBMISSION;</div><div class='del'>-</div><div class='del'>-	/* XEHPSDV and PVC do not use HuC */</div><div class='del'>-	if (IS_XEHPSDV(i915) || IS_PONTEVECCHIO(i915))</div><div class='del'>-		i915-&gt;params.enable_guc &amp;= ~ENABLE_GUC_LOAD_HUC;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Reset GuC providing us with fresh state for both GuC and HuC.</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c<br/>index 756093eaf2ad..d80278eb45d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c</a></div><div class='hunk'>@@ -807,7 +807,7 @@ static int try_firmware_load(struct intel_uc_fw *uc_fw, const struct firmware **</div><div class='ctx'> static int check_mtl_huc_guc_compatibility(struct intel_gt *gt,</div><div class='ctx'> 					   struct intel_uc_fw_file *huc_selected)</div><div class='ctx'> {</div><div class='del'>-	struct intel_uc_fw_file *guc_selected = &amp;gt-&gt;uc.guc.fw.file_selected;</div><div class='add'>+	struct intel_uc_fw_file *guc_selected = &amp;gt_to_guc(gt)-&gt;fw.file_selected;</div><div class='ctx'> 	struct intel_uc_fw_ver *huc_ver = &amp;huc_selected-&gt;ver;</div><div class='ctx'> 	struct intel_uc_fw_ver *guc_ver = &amp;guc_selected-&gt;ver;</div><div class='ctx'> 	bool new_huc, new_guc;</div><div class='hunk'>@@ -1209,7 +1209,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)</div><div class='ctx'> 	 * since its GGTT offset will be GuC accessible.</div><div class='ctx'> 	 */</div><div class='ctx'> 	GEM_BUG_ON(uc_fw-&gt;rsa_size &gt; PAGE_SIZE);</div><div class='del'>-	vma = intel_guc_allocate_vma(&amp;gt-&gt;uc.guc, PAGE_SIZE);</div><div class='add'>+	vma = intel_guc_allocate_vma(gt_to_guc(gt), PAGE_SIZE);</div><div class='ctx'> 	if (IS_ERR(vma))</div><div class='ctx'> 		return PTR_ERR(vma);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c<br/>index c900aac85adb..68feb55654f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/selftest_guc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gt/uc/selftest_guc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gt/uc/selftest_guc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gt/uc/selftest_guc.c</a></div><div class='hunk'>@@ -144,7 +144,7 @@ err:</div><div class='ctx'> static int intel_guc_steal_guc_ids(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gt *gt = arg;</div><div class='del'>-	struct intel_guc *guc = &amp;gt-&gt;uc.guc;</div><div class='add'>+	struct intel_guc *guc = gt_to_guc(gt);</div><div class='ctx'> 	int ret, sv, context_index = 0;</div><div class='ctx'> 	intel_wakeref_t wakeref;</div><div class='ctx'> 	struct intel_engine_cs *engine;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c<br/>index d4a3f3e093b0..4be8cb65fb7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/cmd_parser.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/cmd_parser.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/cmd_parser.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gvt/cmd_parser.c</a></div><div class='hunk'>@@ -50,6 +50,7 @@</div><div class='ctx'> #include "trace.h"</div><div class='ctx'> </div><div class='ctx'> #include "display/intel_display.h"</div><div class='add'>+#include "display/intel_sprite_regs.h"</div><div class='ctx'> #include "gem/i915_gem_context.h"</div><div class='ctx'> #include "gem/i915_gem_pm.h"</div><div class='ctx'> #include "gt/intel_context.h"</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c<br/>index e0c5dfb788eb..2b7df7fcf369 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/display.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/display.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/display.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gvt/display.c</a></div><div class='hunk'>@@ -36,8 +36,10 @@</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> #include "gvt.h"</div><div class='ctx'> </div><div class='add'>+#include "display/bxt_dpio_phy_regs.h"</div><div class='ctx'> #include "display/intel_display.h"</div><div class='ctx'> #include "display/intel_dpio_phy.h"</div><div class='add'>+#include "display/intel_sprite_regs.h"</div><div class='ctx'> </div><div class='ctx'> static int get_edp_pipe(struct intel_vgpu *vgpu)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c<br/>index 313efdabee57..4140da68aabb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/fb_decoder.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/fb_decoder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/fb_decoder.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gvt/fb_decoder.c</a></div><div class='hunk'>@@ -34,11 +34,14 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/drm/drm_fourcc.h&gt;</div><div class='del'>-#include "i915_drv.h"</div><div class='add'>+</div><div class='ctx'> #include "gvt.h"</div><div class='add'>+#include "i915_drv.h"</div><div class='ctx'> #include "i915_pvinfo.h"</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> </div><div class='add'>+#include "display/intel_sprite_regs.h"</div><div class='add'>+</div><div class='ctx'> #define PRIMARY_FORMAT_NUM	16</div><div class='ctx'> struct pixel_format {</div><div class='ctx'> 	int drm_format;	/* Pixel format in DRM definition */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c<br/>index efcb00472be2..102eb354fed6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/handlers.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/handlers.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/handlers.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gvt/handlers.c</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #include "gvt.h"</div><div class='ctx'> #include "i915_pvinfo.h"</div><div class='ctx'> #include "intel_mchbar_regs.h"</div><div class='add'>+#include "display/bxt_dpio_phy_regs.h"</div><div class='ctx'> #include "display/intel_display_types.h"</div><div class='ctx'> #include "display/intel_dmc_regs.h"</div><div class='ctx'> #include "display/intel_dp_aux_regs.h"</div><div class='hunk'>@@ -49,6 +50,7 @@</div><div class='ctx'> #include "display/intel_fdi_regs.h"</div><div class='ctx'> #include "display/intel_pps_regs.h"</div><div class='ctx'> #include "display/intel_psr_regs.h"</div><div class='add'>+#include "display/intel_sprite_regs.h"</div><div class='ctx'> #include "display/skl_watermark_regs.h"</div><div class='ctx'> #include "display/vlv_dsi_pll_regs.h"</div><div class='ctx'> #include "gt/intel_gt_regs.h"</div><div class='hunk'>@@ -2763,15 +2765,15 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)</div><div class='ctx'> </div><div class='ctx'> 	MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT,</div><div class='ctx'> 		NULL, bxt_pcs_dw12_grp_write);</div><div class='del'>-	MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0), D_BXT,</div><div class='add'>+	MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0), D_BXT,</div><div class='ctx'> 		bxt_port_tx_dw3_read, NULL);</div><div class='ctx'> 	MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1), D_BXT,</div><div class='ctx'> 		NULL, bxt_pcs_dw12_grp_write);</div><div class='del'>-	MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH1), D_BXT,</div><div class='add'>+	MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0), D_BXT,</div><div class='ctx'> 		bxt_port_tx_dw3_read, NULL);</div><div class='ctx'> 	MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT,</div><div class='ctx'> 		NULL, bxt_pcs_dw12_grp_write);</div><div class='del'>-	MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY1, DPIO_CH0), D_BXT,</div><div class='add'>+	MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY1, DPIO_CH0, 0), D_BXT,</div><div class='ctx'> 		bxt_port_tx_dw3_read, NULL);</div><div class='ctx'> 	MMIO_DH(BXT_DE_PLL_ENABLE, D_BXT, NULL, bxt_de_pll_enable_write);</div><div class='ctx'> 	MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c<br/>index 5b5def6ddef7..922711e0e30b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/mmio.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/gvt/mmio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/gvt/mmio.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/gvt/mmio.c</a></div><div class='hunk'>@@ -37,6 +37,7 @@</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> #include "gvt.h"</div><div class='ctx'> </div><div class='add'>+#include "display/bxt_dpio_phy_regs.h"</div><div class='ctx'> #include "display/intel_dpio_phy.h"</div><div class='ctx'> #include "gt/intel_gt_regs.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c<br/>index 990eaa029d9c..bc717cf544e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_debugfs.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_debugfs.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_debugfs.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='ctx'> #include &lt;linux/string_helpers.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;drm/drm_debugfs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "display/intel_display_params.h"</div><div class='hunk'>@@ -156,18 +157,6 @@ static const char *i915_cache_level_str(struct drm_i915_gem_object *obj)</div><div class='ctx'> 		case 4: return " WB (2-Way Coh)";</div><div class='ctx'> 		default: return " not defined";</div><div class='ctx'> 		}</div><div class='del'>-	} else if (IS_PONTEVECCHIO(i915)) {</div><div class='del'>-		switch (obj-&gt;pat_index) {</div><div class='del'>-		case 0: return " UC";</div><div class='del'>-		case 1: return " WC";</div><div class='del'>-		case 2: return " WT";</div><div class='del'>-		case 3: return " WB";</div><div class='del'>-		case 4: return " WT (CLOS1)";</div><div class='del'>-		case 5: return " WB (CLOS1)";</div><div class='del'>-		case 6: return " WT (CLOS2)";</div><div class='del'>-		case 7: return " WT (CLOS2)";</div><div class='del'>-		default: return " not defined";</div><div class='del'>-		}</div><div class='ctx'> 	} else if (GRAPHICS_VER(i915) &gt;= 12) {</div><div class='ctx'> 		switch (obj-&gt;pat_index) {</div><div class='ctx'> 		case 0: return " WB";</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c b/drivers/gpu/drm/i915/i915_debugfs_params.c<br/>index 8bca02025e09..33d2dcb0de65 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_debugfs_params.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_debugfs_params.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_debugfs_params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_debugfs_params.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "i915_debugfs_params.h"</div><div class='ctx'> #include "gt/intel_gt.h"</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c<br/>index 4b9233c07a22..161b21eff694 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_driver.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_driver.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_driver.c</a></div><div class='hunk'>@@ -202,7 +202,7 @@ static void sanitize_gpu(struct drm_i915_private *i915)</div><div class='ctx'> 		unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 		for_each_gt(gt, i915, i)</div><div class='del'>-			__intel_gt_reset(gt, ALL_ENGINES);</div><div class='add'>+			intel_gt_reset_all_engines(gt);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -920,27 +920,6 @@ static int i915_driver_open(struct drm_device *dev, struct drm_file *file)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * i915_driver_lastclose - clean up after all DRM clients have exited</div><div class='del'>- * @dev: DRM device</div><div class='del'>- *</div><div class='del'>- * Take care of cleaning up after all DRM clients have exited.  In the</div><div class='del'>- * mode setting case, we want to restore the kernel's initial mode (just</div><div class='del'>- * in case the last client left us in a bad state).</div><div class='del'>- *</div><div class='del'>- * Additionally, in the non-mode setting case, we'll tear down the GTT</div><div class='del'>- * and DMA structures, since the kernel won't be using them, and clea</div><div class='del'>- * up any GEM state.</div><div class='del'>- */</div><div class='del'>-static void i915_driver_lastclose(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *i915 = to_i915(dev);</div><div class='del'>-</div><div class='del'>-	intel_fbdev_restore_mode(i915);</div><div class='del'>-</div><div class='del'>-	vga_switcheroo_process_delayed_switch();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_file_private *file_priv = file-&gt;driver_priv;</div><div class='hunk'>@@ -1831,7 +1810,6 @@ static const struct drm_driver i915_drm_driver = {</div><div class='ctx'> 	    DRIVER_SYNCOBJ_TIMELINE,</div><div class='ctx'> 	.release = i915_driver_release,</div><div class='ctx'> 	.open = i915_driver_open,</div><div class='del'>-	.lastclose = i915_driver_lastclose,</div><div class='ctx'> 	.postclose = i915_driver_postclose,</div><div class='ctx'> 	.show_fdinfo = PTR_IF(IS_ENABLED(CONFIG_PROC_FS), i915_drm_client_fdinfo),</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h<br/>index e81b3b2858ac..ee0d7d5f135d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_drv.h</a></div><div class='hunk'>@@ -235,25 +235,17 @@ struct drm_i915_private {</div><div class='ctx'> 	/* protects the irq masks */</div><div class='ctx'> 	spinlock_t irq_lock;</div><div class='ctx'> </div><div class='del'>-	bool display_irqs_enabled;</div><div class='del'>-</div><div class='ctx'> 	/* Sideband mailbox protection */</div><div class='ctx'> 	struct mutex sb_lock;</div><div class='ctx'> 	struct pm_qos_request sb_qos;</div><div class='ctx'> </div><div class='ctx'> 	/** Cached value of IMR to avoid reads in updating the bitfield */</div><div class='del'>-	union {</div><div class='del'>-		u32 irq_mask;</div><div class='del'>-		u32 de_irq_mask[I915_MAX_PIPES];</div><div class='del'>-	};</div><div class='del'>-	u32 pipestat_irq_mask[I915_MAX_PIPES];</div><div class='add'>+	u32 irq_mask;</div><div class='ctx'> </div><div class='ctx'> 	bool preserve_bios_swizzle;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int fsb_freq, mem_freq, is_ddr3;</div><div class='del'>-	unsigned int skl_preferred_vco_freq;</div><div class='ctx'> </div><div class='del'>-	unsigned int max_dotclk_freq;</div><div class='ctx'> 	unsigned int hpll_freq;</div><div class='ctx'> 	unsigned int czclk_freq;</div><div class='ctx'> </div><div class='hunk'>@@ -350,9 +342,6 @@ struct drm_i915_private {</div><div class='ctx'> </div><div class='ctx'> 	struct intel_pxp *pxp;</div><div class='ctx'> </div><div class='del'>-	/* For i915gm/i945gm vblank irq workaround */</div><div class='del'>-	u8 vblank_enabled;</div><div class='del'>-</div><div class='ctx'> 	bool irq_enabled;</div><div class='ctx'> </div><div class='ctx'> 	struct i915_pmu pmu;</div><div class='hunk'>@@ -544,9 +533,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,</div><div class='ctx'> #define IS_DG1(i915)        IS_PLATFORM(i915, INTEL_DG1)</div><div class='ctx'> #define IS_ALDERLAKE_S(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_S)</div><div class='ctx'> #define IS_ALDERLAKE_P(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_P)</div><div class='del'>-#define IS_XEHPSDV(i915) IS_PLATFORM(i915, INTEL_XEHPSDV)</div><div class='ctx'> #define IS_DG2(i915)	IS_PLATFORM(i915, INTEL_DG2)</div><div class='del'>-#define IS_PONTEVECCHIO(i915) IS_PLATFORM(i915, INTEL_PONTEVECCHIO)</div><div class='ctx'> #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE)</div><div class='ctx'> #define IS_LUNARLAKE(i915) 0</div><div class='ctx'> </div><div class='hunk'>@@ -621,17 +608,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,</div><div class='ctx'> #define IS_TIGERLAKE_UY(i915) \</div><div class='ctx'> 	IS_SUBPLATFORM(i915, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_UY)</div><div class='ctx'> </div><div class='del'>-#define IS_XEHPSDV_GRAPHICS_STEP(__i915, since, until) \</div><div class='del'>-	(IS_XEHPSDV(__i915) &amp;&amp; IS_GRAPHICS_STEP(__i915, since, until))</div><div class='del'>-</div><div class='del'>-#define IS_PVC_BD_STEP(__i915, since, until) \</div><div class='del'>-	(IS_PONTEVECCHIO(__i915) &amp;&amp; \</div><div class='del'>-	 IS_BASEDIE_STEP(__i915, since, until))</div><div class='del'>-</div><div class='del'>-#define IS_PVC_CT_STEP(__i915, since, until) \</div><div class='del'>-	(IS_PONTEVECCHIO(__i915) &amp;&amp; \</div><div class='del'>-	 IS_GRAPHICS_STEP(__i915, since, until))</div><div class='del'>-</div><div class='ctx'> #define IS_LP(i915)		(INTEL_INFO(i915)-&gt;is_lp)</div><div class='ctx'> #define IS_GEN9_LP(i915)	(GRAPHICS_VER(i915) == 9 &amp;&amp; IS_LP(i915))</div><div class='ctx'> #define IS_GEN9_BC(i915)	(GRAPHICS_VER(i915) == 9 &amp;&amp; !IS_LP(i915))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c<br/>index 5c3fec63cb4c..a62405787e77 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_getparam.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_getparam.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_getparam.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_getparam.c</a></div><div class='hunk'>@@ -155,12 +155,18 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		 */</div><div class='ctx'> 		value = 1;</div><div class='ctx'> 		break;</div><div class='add'>+	case I915_PARAM_HAS_CONTEXT_FREQ_HINT:</div><div class='add'>+		if (intel_uc_uses_guc_submission(&amp;to_gt(i915)-&gt;uc))</div><div class='add'>+			value = 1;</div><div class='add'>+		else</div><div class='add'>+			value = -EINVAL;</div><div class='add'>+		break;</div><div class='ctx'> 	case I915_PARAM_HAS_CONTEXT_ISOLATION:</div><div class='ctx'> 		value = intel_engines_has_context_isolation(i915);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_SLICE_MASK:</div><div class='ctx'> 		/* Not supported from Xe_HP onward; use topology queries */</div><div class='del'>-		if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+		if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		value = sseu-&gt;slice_mask;</div><div class='hunk'>@@ -169,7 +175,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_SUBSLICE_MASK:</div><div class='ctx'> 		/* Not supported from Xe_HP onward; use topology queries */</div><div class='del'>-		if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+		if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		/* Only copy bits from the first slice */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c<br/>index a0b784ebaddd..625b3c024540 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_gpu_error.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_gpu_error.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_gpu_error.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_gpu_error.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ascii85.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/nmi.h&gt;</div><div class='ctx'> #include &lt;linux/pagevec.h&gt;</div><div class='hunk'>@@ -1245,8 +1246,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee)</div><div class='ctx'> 		if (MEDIA_VER(i915) &gt;= 13 &amp;&amp; engine-&gt;gt-&gt;type == GT_MEDIA)</div><div class='ctx'> 			ee-&gt;fault_reg = intel_uncore_read(engine-&gt;uncore,</div><div class='ctx'> 							  XELPMP_RING_FAULT_REG);</div><div class='del'>-</div><div class='del'>-		else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+		else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> 			ee-&gt;fault_reg = intel_gt_mcr_read_any(engine-&gt;gt,</div><div class='ctx'> 							      XEHP_RING_FAULT_REG);</div><div class='ctx'> 		else if (GRAPHICS_VER(i915) &gt;= 12)</div><div class='hunk'>@@ -1852,7 +1852,7 @@ static void gt_record_global_regs(struct intel_gt_coredump *gt)</div><div class='ctx'> 	if (GRAPHICS_VER(i915) == 7)</div><div class='ctx'> 		gt-&gt;err_int = intel_uncore_read(uncore, GEN7_ERR_INT);</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		gt-&gt;fault_data0 = intel_gt_mcr_read_any((struct intel_gt *)gt-&gt;_gt,</div><div class='ctx'> 							XEHP_FAULT_TLB_DATA0);</div><div class='ctx'> 		gt-&gt;fault_data1 = intel_gt_mcr_read_any((struct intel_gt *)gt-&gt;_gt,</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c<br/>index b758fd110c20..49db3e09826c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_hwmon.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_hwmon.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_hwmon.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_hwmon.c</a></div><div class='hunk'>@@ -739,12 +739,6 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)</div><div class='ctx'> 		hwmon-&gt;rg.pkg_rapl_limit = PCU_PACKAGE_RAPL_LIMIT;</div><div class='ctx'> 		hwmon-&gt;rg.energy_status_all = PCU_PACKAGE_ENERGY_STATUS;</div><div class='ctx'> 		hwmon-&gt;rg.energy_status_tile = INVALID_MMIO_REG;</div><div class='del'>-	} else if (IS_XEHPSDV(i915)) {</div><div class='del'>-		hwmon-&gt;rg.pkg_power_sku_unit = GT0_PACKAGE_POWER_SKU_UNIT;</div><div class='del'>-		hwmon-&gt;rg.pkg_power_sku = INVALID_MMIO_REG;</div><div class='del'>-		hwmon-&gt;rg.pkg_rapl_limit = GT0_PACKAGE_RAPL_LIMIT;</div><div class='del'>-		hwmon-&gt;rg.energy_status_all = GT0_PLATFORM_ENERGY_STATUS;</div><div class='del'>-		hwmon-&gt;rg.energy_status_tile = GT0_PACKAGE_ENERGY_STATUS;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hwmon-&gt;rg.pkg_power_sku_unit = INVALID_MMIO_REG;</div><div class='ctx'> 		hwmon-&gt;rg.pkg_power_sku = INVALID_MMIO_REG;</div><div class='hunk'>@@ -793,7 +787,7 @@ void i915_hwmon_register(struct drm_i915_private *i915)</div><div class='ctx'> 	if (!IS_DGFX(i915))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);</div><div class='add'>+	hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL);</div><div class='ctx'> 	if (!hwmon)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -819,14 +813,12 @@ void i915_hwmon_register(struct drm_i915_private *i915)</div><div class='ctx'> 	hwm_get_preregistration_info(i915);</div><div class='ctx'> </div><div class='ctx'> 	/*  hwmon_dev points to device hwmon&lt;i&gt; */</div><div class='del'>-	hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat-&gt;name,</div><div class='del'>-							 ddat,</div><div class='del'>-							 &amp;hwm_chip_info,</div><div class='del'>-							 hwm_groups);</div><div class='del'>-	if (IS_ERR(hwmon_dev)) {</div><div class='del'>-		i915-&gt;hwmon = NULL;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	hwmon_dev = hwmon_device_register_with_info(dev, ddat-&gt;name,</div><div class='add'>+						    ddat,</div><div class='add'>+						    &amp;hwm_chip_info,</div><div class='add'>+						    hwm_groups);</div><div class='add'>+	if (IS_ERR(hwmon_dev))</div><div class='add'>+		goto err;</div><div class='ctx'> </div><div class='ctx'> 	ddat-&gt;hwmon_dev = hwmon_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -839,16 +831,36 @@ void i915_hwmon_register(struct drm_i915_private *i915)</div><div class='ctx'> 		if (!hwm_gt_is_visible(ddat_gt, hwmon_energy, hwmon_energy_input, 0))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat_gt-&gt;name,</div><div class='del'>-								 ddat_gt,</div><div class='del'>-								 &amp;hwm_gt_chip_info,</div><div class='del'>-								 NULL);</div><div class='add'>+		hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt-&gt;name,</div><div class='add'>+							    ddat_gt,</div><div class='add'>+							    &amp;hwm_gt_chip_info,</div><div class='add'>+							    NULL);</div><div class='ctx'> 		if (!IS_ERR(hwmon_dev))</div><div class='ctx'> 			ddat_gt-&gt;hwmon_dev = hwmon_dev;</div><div class='ctx'> 	}</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	i915_hwmon_unregister(i915);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void i915_hwmon_unregister(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	fetch_and_zero(&amp;i915-&gt;hwmon);</div><div class='add'>+	struct i915_hwmon *hwmon = i915-&gt;hwmon;</div><div class='add'>+	struct intel_gt *gt;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!hwmon)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for_each_gt(gt, i915, i)</div><div class='add'>+		if (hwmon-&gt;ddat_gt[i].hwmon_dev)</div><div class='add'>+			hwmon_device_unregister(hwmon-&gt;ddat_gt[i].hwmon_dev);</div><div class='add'>+</div><div class='add'>+	if (hwmon-&gt;ddat.hwmon_dev)</div><div class='add'>+		hwmon_device_unregister(hwmon-&gt;ddat.hwmon_dev);</div><div class='add'>+</div><div class='add'>+	mutex_destroy(&amp;hwmon-&gt;hwmon_lock);</div><div class='add'>+</div><div class='add'>+	kfree(i915-&gt;hwmon);</div><div class='add'>+	i915-&gt;hwmon = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c<br/>index 8130f043693b..678d632ed043 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_irq.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_irq.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_irq.c</a></div><div class='hunk'>@@ -702,7 +702,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	gen5_gt_irq_reset(to_gt(dev_priv));</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='del'>-	if (dev_priv-&gt;display_irqs_enabled)</div><div class='add'>+	if (dev_priv-&gt;display.irq.display_irqs_enabled)</div><div class='ctx'> 		vlv_display_irq_reset(dev_priv);</div><div class='ctx'> 	spin_unlock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -767,7 +767,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	GEN3_IRQ_RESET(uncore, GEN8_PCU_);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='del'>-	if (dev_priv-&gt;display_irqs_enabled)</div><div class='add'>+	if (dev_priv-&gt;display.irq.display_irqs_enabled)</div><div class='ctx'> 		vlv_display_irq_reset(dev_priv);</div><div class='ctx'> 	spin_unlock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -784,7 +784,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	gen5_gt_irq_postinstall(to_gt(dev_priv));</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='del'>-	if (dev_priv-&gt;display_irqs_enabled)</div><div class='add'>+	if (dev_priv-&gt;display.irq.display_irqs_enabled)</div><div class='ctx'> 		vlv_display_irq_postinstall(dev_priv);</div><div class='ctx'> 	spin_unlock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -838,7 +838,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	gen8_gt_irq_postinstall(to_gt(dev_priv));</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='del'>-	if (dev_priv-&gt;display_irqs_enabled)</div><div class='add'>+	if (dev_priv-&gt;display.irq.display_irqs_enabled)</div><div class='ctx'> 		vlv_display_irq_postinstall(dev_priv);</div><div class='ctx'> 	spin_unlock_irq(&amp;dev_priv-&gt;irq_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c<br/>index de43048543e8..8c00169e3ab7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_params.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_params.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_params.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_params.c</a></div><div class='hunk'>@@ -108,9 +108,6 @@ i915_param_named_unsafe(guc_firmware_path, charp, 0400,</div><div class='ctx'> i915_param_named_unsafe(huc_firmware_path, charp, 0400,</div><div class='ctx'> 	"HuC firmware path to use instead of the default one");</div><div class='ctx'> </div><div class='del'>-i915_param_named_unsafe(dmc_firmware_path, charp, 0400,</div><div class='del'>-	"DMC firmware path to use instead of the default one");</div><div class='del'>-</div><div class='ctx'> i915_param_named_unsafe(gsc_firmware_path, charp, 0400,</div><div class='ctx'> 	"GSC firmware path to use instead of the default one");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h<br/>index 1315d7fac850..2eb3f2115ff2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_params.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_params.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_params.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_params.h</a></div><div class='hunk'>@@ -51,7 +51,6 @@ struct drm_printer;</div><div class='ctx'> 	param(int, guc_log_level, -1, 0400) \</div><div class='ctx'> 	param(char *, guc_firmware_path, NULL, 0400) \</div><div class='ctx'> 	param(char *, huc_firmware_path, NULL, 0400) \</div><div class='del'>-	param(char *, dmc_firmware_path, NULL, 0400) \</div><div class='ctx'> 	param(char *, gsc_firmware_path, NULL, 0400) \</div><div class='ctx'> 	param(bool, memtest, false, 0400) \</div><div class='ctx'> 	param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c<br/>index 8b4fdeabb12a..405ca17a990b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_pci.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_pci.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_pci.c</a></div><div class='hunk'>@@ -38,6 +38,9 @@</div><div class='ctx'> #include "i915_reg.h"</div><div class='ctx'> #include "intel_pci_config.h"</div><div class='ctx'> </div><div class='add'>+__diag_push();</div><div class='add'>+__diag_ignore_all("-Woverride-init", "Allow field initialization overrides for device info");</div><div class='add'>+</div><div class='ctx'> #define PLATFORM(x) .platform = (x)</div><div class='ctx'> #define GEN(x) \</div><div class='ctx'> 	.__runtime.graphics.ip.ver = (x), \</div><div class='hunk'>@@ -59,14 +62,6 @@</div><div class='ctx'> 		[I915_CACHE_WT]     = 2, \</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define PVC_CACHELEVEL \</div><div class='del'>-	.cachelevel_to_pat = { \</div><div class='del'>-		[I915_CACHE_NONE]   = 0, \</div><div class='del'>-		[I915_CACHE_LLC]    = 3, \</div><div class='del'>-		[I915_CACHE_L3_LLC] = 3, \</div><div class='del'>-		[I915_CACHE_WT]     = 2, \</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> #define MTL_CACHELEVEL \</div><div class='ctx'> 	.cachelevel_to_pat = { \</div><div class='ctx'> 		[I915_CACHE_NONE]   = 2, \</div><div class='hunk'>@@ -705,8 +700,6 @@ static const struct intel_device_info adl_p_info = {</div><div class='ctx'> 		I915_GTT_PAGE_SIZE_2M</div><div class='ctx'> </div><div class='ctx'> #define XE_HP_FEATURES \</div><div class='del'>-	.__runtime.graphics.ip.ver = 12, \</div><div class='del'>-	.__runtime.graphics.ip.rel = 50, \</div><div class='ctx'> 	XE_HP_PAGE_SIZES, \</div><div class='ctx'> 	TGL_CACHELEVEL, \</div><div class='ctx'> 	.dma_mask_size = 46, \</div><div class='hunk'>@@ -730,32 +723,12 @@ static const struct intel_device_info adl_p_info = {</div><div class='ctx'> 	.__runtime.ppgtt_size = 48, \</div><div class='ctx'> 	.__runtime.ppgtt_type = INTEL_PPGTT_FULL</div><div class='ctx'> </div><div class='del'>-#define XE_HPM_FEATURES \</div><div class='del'>-	.__runtime.media.ip.ver = 12, \</div><div class='del'>-	.__runtime.media.ip.rel = 50</div><div class='del'>-</div><div class='del'>-__maybe_unused</div><div class='del'>-static const struct intel_device_info xehpsdv_info = {</div><div class='del'>-	XE_HP_FEATURES,</div><div class='del'>-	XE_HPM_FEATURES,</div><div class='del'>-	DGFX_FEATURES,</div><div class='del'>-	PLATFORM(INTEL_XEHPSDV),</div><div class='del'>-	.has_64k_pages = 1,</div><div class='del'>-	.has_media_ratio_mode = 1,</div><div class='del'>-	.platform_engine_mask =</div><div class='del'>-		BIT(RCS0) | BIT(BCS0) |</div><div class='del'>-		BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) |</div><div class='del'>-		BIT(VCS0) | BIT(VCS1) | BIT(VCS2) | BIT(VCS3) |</div><div class='del'>-		BIT(VCS4) | BIT(VCS5) | BIT(VCS6) | BIT(VCS7) |</div><div class='del'>-		BIT(CCS0) | BIT(CCS1) | BIT(CCS2) | BIT(CCS3),</div><div class='del'>-	.require_force_probe = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define DG2_FEATURES \</div><div class='ctx'> 	XE_HP_FEATURES, \</div><div class='del'>-	XE_HPM_FEATURES, \</div><div class='ctx'> 	DGFX_FEATURES, \</div><div class='add'>+	.__runtime.graphics.ip.ver = 12, \</div><div class='ctx'> 	.__runtime.graphics.ip.rel = 55, \</div><div class='add'>+	.__runtime.media.ip.ver = 12, \</div><div class='ctx'> 	.__runtime.media.ip.rel = 55, \</div><div class='ctx'> 	PLATFORM(INTEL_DG2), \</div><div class='ctx'> 	.has_64k_pages = 1, \</div><div class='hunk'>@@ -778,33 +751,6 @@ static const struct intel_device_info ats_m_info = {</div><div class='ctx'> 	.tuning_thread_rr_after_dep = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define XE_HPC_FEATURES \</div><div class='del'>-	XE_HP_FEATURES, \</div><div class='del'>-	.dma_mask_size = 52, \</div><div class='del'>-	.has_3d_pipeline = 0, \</div><div class='del'>-	.has_guc_deprivilege = 1, \</div><div class='del'>-	.has_l3_ccs_read = 1, \</div><div class='del'>-	.has_mslice_steering = 0, \</div><div class='del'>-	.has_one_eu_per_fuse_bit = 1</div><div class='del'>-</div><div class='del'>-__maybe_unused</div><div class='del'>-static const struct intel_device_info pvc_info = {</div><div class='del'>-	XE_HPC_FEATURES,</div><div class='del'>-	XE_HPM_FEATURES,</div><div class='del'>-	DGFX_FEATURES,</div><div class='del'>-	.__runtime.graphics.ip.rel = 60,</div><div class='del'>-	.__runtime.media.ip.rel = 60,</div><div class='del'>-	PLATFORM(INTEL_PONTEVECCHIO),</div><div class='del'>-	.has_flat_ccs = 0,</div><div class='del'>-	.max_pat_index = 7,</div><div class='del'>-	.platform_engine_mask =</div><div class='del'>-		BIT(BCS0) |</div><div class='del'>-		BIT(VCS0) |</div><div class='del'>-		BIT(CCS0) | BIT(CCS1) | BIT(CCS2) | BIT(CCS3),</div><div class='del'>-	.require_force_probe = 1,</div><div class='del'>-	PVC_CACHELEVEL,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct intel_gt_definition xelpmp_extra_gt[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.type = GT_MEDIA,</div><div class='hunk'>@@ -842,6 +788,8 @@ static const struct intel_device_info mtl_info = {</div><div class='ctx'> </div><div class='ctx'> #undef PLATFORM</div><div class='ctx'> </div><div class='add'>+__diag_pop();</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Make sure any device matches here are from most specific to most</div><div class='ctx'>  * general.  For example, since the Quanta match is based on the subsystem</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c<br/>index bd9d812b1afa..0b1cd4c7a525 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_perf.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_perf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_perf.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_perf.c</a></div><div class='hunk'>@@ -292,7 +292,7 @@ static u32 i915_perf_stream_paranoid = true;</div><div class='ctx'> #define OAREPORT_REASON_CTX_SWITCH     (1&lt;&lt;3)</div><div class='ctx'> #define OAREPORT_REASON_CLK_RATIO      (1&lt;&lt;5)</div><div class='ctx'> </div><div class='del'>-#define HAS_MI_SET_PREDICATE(i915) (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50))</div><div class='add'>+#define HAS_MI_SET_PREDICATE(i915) (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55))</div><div class='ctx'> </div><div class='ctx'> /* For sysctl proc_dointvec_minmax of i915_oa_max_sample_rate</div><div class='ctx'>  *</div><div class='hunk'>@@ -817,7 +817,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		if (oa_report_ctx_invalid(stream, report) &amp;&amp;</div><div class='del'>-		    GRAPHICS_VER_FULL(stream-&gt;engine-&gt;i915) &lt; IP_VER(12, 50)) {</div><div class='add'>+		    GRAPHICS_VER_FULL(stream-&gt;engine-&gt;i915) &lt; IP_VER(12, 55)) {</div><div class='ctx'> 			ctx_id = INVALID_CTX_ID;</div><div class='ctx'> 			oa_context_id_squash(stream, report32);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1419,7 +1419,7 @@ static int gen12_get_render_context_id(struct i915_perf_stream *stream)</div><div class='ctx'> </div><div class='ctx'> 		mask = ((1U &lt;&lt; GEN12_GUC_SW_CTX_ID_WIDTH) - 1) &lt;&lt;</div><div class='ctx'> 			(GEN12_GUC_SW_CTX_ID_SHIFT - 32);</div><div class='del'>-	} else if (GRAPHICS_VER_FULL(stream-&gt;engine-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+	} else if (GRAPHICS_VER_FULL(stream-&gt;engine-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		ctx_id = (XEHP_MAX_CONTEXT_HW_ID - 1) &lt;&lt;</div><div class='ctx'> 			(XEHP_SW_CTX_ID_SHIFT - 32);</div><div class='ctx'> </div><div class='hunk'>@@ -2881,11 +2881,11 @@ gen12_enable_metric_set(struct i915_perf_stream *stream,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Wa_1508761755:xehpsdv, dg2</div><div class='add'>+	 * Wa_1508761755</div><div class='ctx'> 	 * EU NOA signals behave incorrectly if EU clock gating is enabled.</div><div class='ctx'> 	 * Disable thread stall DOP gating and EU DOP gating.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_XEHPSDV(i915) || IS_DG2(i915)) {</div><div class='add'>+	if (IS_DG2(i915)) {</div><div class='ctx'> 		intel_gt_mcr_multicast_write(uncore-&gt;gt, GEN8_ROW_CHICKEN,</div><div class='ctx'> 					     _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));</div><div class='ctx'> 		intel_uncore_write(uncore, GEN7_ROW_CHICKEN2,</div><div class='hunk'>@@ -2911,7 +2911,7 @@ gen12_enable_metric_set(struct i915_perf_stream *stream,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize Super Queue Internal Cnt Register</div><div class='ctx'> 	 * Set PMON Enable in order to collect valid metrics.</div><div class='del'>-	 * Enable byets per clock reporting in OA for XEHPSDV onward.</div><div class='add'>+	 * Enable bytes per clock reporting in OA.</div><div class='ctx'> 	 */</div><div class='ctx'> 	sqcnt1 = GEN12_SQCNT1_PMON_ENABLE |</div><div class='ctx'> 		 (HAS_OA_BPC_REPORTING(i915) ? GEN12_SQCNT1_OABPC : 0);</div><div class='hunk'>@@ -2971,10 +2971,9 @@ static void gen12_disable_metric_set(struct i915_perf_stream *stream)</div><div class='ctx'> 	u32 sqcnt1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Wa_1508761755:xehpsdv, dg2</div><div class='del'>-	 * Enable thread stall DOP gating and EU DOP gating.</div><div class='add'>+	 * Wa_1508761755: Enable thread stall DOP gating and EU DOP gating.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_XEHPSDV(i915) || IS_DG2(i915)) {</div><div class='add'>+	if (IS_DG2(i915)) {</div><div class='ctx'> 		intel_gt_mcr_multicast_write(uncore-&gt;gt, GEN8_ROW_CHICKEN,</div><div class='ctx'> 					     _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE));</div><div class='ctx'> 		intel_uncore_write(uncore, GEN7_ROW_CHICKEN2,</div><div class='hunk'>@@ -4123,7 +4122,7 @@ static int read_properties_unlocked(struct i915_perf *perf,</div><div class='ctx'> 			props-&gt;hold_preemption = !!value;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case DRM_I915_PERF_PROP_GLOBAL_SSEU: {</div><div class='del'>-			if (GRAPHICS_VER_FULL(perf-&gt;i915) &gt;= IP_VER(12, 50)) {</div><div class='add'>+			if (GRAPHICS_VER_FULL(perf-&gt;i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 				drm_dbg(&amp;perf-&gt;i915-&gt;drm,</div><div class='ctx'> 					"SSEU config not supported on gfx %x\n",</div><div class='ctx'> 					GRAPHICS_VER_FULL(perf-&gt;i915));</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c<br/>index 3baa2f54a86e..14d9ec0ed777 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_query.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_query.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_query.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_query.c</a></div><div class='hunk'>@@ -105,7 +105,7 @@ static int query_geometry_subslices(struct drm_i915_private *i915,</div><div class='ctx'> 	struct intel_engine_cs *engine;</div><div class='ctx'> 	struct i915_engine_class_instance classinstance;</div><div class='ctx'> </div><div class='del'>-	if (GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 50))</div><div class='add'>+	if (GRAPHICS_VER_FULL(i915) &lt; IP_VER(12, 55))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	classinstance = *((struct i915_engine_class_instance *)&amp;query_item-&gt;flags);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h<br/>index 3b2e49ce29ba..e22a82a5ddd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_reg.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_reg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_reg.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_reg.h</a></div><div class='hunk'>@@ -195,367 +195,6 @@</div><div class='ctx'> #define  DPIO_SFR_BYPASS		(1 &lt;&lt; 1)</div><div class='ctx'> #define  DPIO_CMNRST			(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Per pipe/PLL DPIO regs</div><div class='del'>- */</div><div class='del'>-#define _VLV_PLL_DW3_CH0		0x800c</div><div class='del'>-#define   DPIO_POST_DIV_SHIFT		(28) /* 3 bits */</div><div class='del'>-#define   DPIO_POST_DIV_DAC		0</div><div class='del'>-#define   DPIO_POST_DIV_HDMIDP		1 /* DAC 225-400M rate */</div><div class='del'>-#define   DPIO_POST_DIV_LVDS1		2</div><div class='del'>-#define   DPIO_POST_DIV_LVDS2		3</div><div class='del'>-#define   DPIO_K_SHIFT			(24) /* 4 bits */</div><div class='del'>-#define   DPIO_P1_SHIFT			(21) /* 3 bits */</div><div class='del'>-#define   DPIO_P2_SHIFT			(16) /* 5 bits */</div><div class='del'>-#define   DPIO_N_SHIFT			(12) /* 4 bits */</div><div class='del'>-#define   DPIO_ENABLE_CALIBRATION	(1 &lt;&lt; 11)</div><div class='del'>-#define   DPIO_M1DIV_SHIFT		(8) /* 3 bits */</div><div class='del'>-#define   DPIO_M2DIV_MASK		0xff</div><div class='del'>-#define _VLV_PLL_DW3_CH1		0x802c</div><div class='del'>-#define VLV_PLL_DW3(ch) _PIPE(ch, _VLV_PLL_DW3_CH0, _VLV_PLL_DW3_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PLL_DW5_CH0		0x8014</div><div class='del'>-#define   DPIO_REFSEL_OVERRIDE		27</div><div class='del'>-#define   DPIO_PLL_MODESEL_SHIFT	24 /* 3 bits */</div><div class='del'>-#define   DPIO_BIAS_CURRENT_CTL_SHIFT	21 /* 3 bits, always 0x7 */</div><div class='del'>-#define   DPIO_PLL_REFCLK_SEL_SHIFT	16 /* 2 bits */</div><div class='del'>-#define   DPIO_PLL_REFCLK_SEL_MASK	3</div><div class='del'>-#define   DPIO_DRIVER_CTL_SHIFT		12 /* always set to 0x8 */</div><div class='del'>-#define   DPIO_CLK_BIAS_CTL_SHIFT	8 /* always set to 0x5 */</div><div class='del'>-#define _VLV_PLL_DW5_CH1		0x8034</div><div class='del'>-#define VLV_PLL_DW5(ch) _PIPE(ch, _VLV_PLL_DW5_CH0, _VLV_PLL_DW5_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PLL_DW7_CH0		0x801c</div><div class='del'>-#define _VLV_PLL_DW7_CH1		0x803c</div><div class='del'>-#define VLV_PLL_DW7(ch) _PIPE(ch, _VLV_PLL_DW7_CH0, _VLV_PLL_DW7_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PLL_DW8_CH0		0x8040</div><div class='del'>-#define _VLV_PLL_DW8_CH1		0x8060</div><div class='del'>-#define VLV_PLL_DW8(ch) _PIPE(ch, _VLV_PLL_DW8_CH0, _VLV_PLL_DW8_CH1)</div><div class='del'>-</div><div class='del'>-#define VLV_PLL_DW9_BCAST		0xc044</div><div class='del'>-#define _VLV_PLL_DW9_CH0		0x8044</div><div class='del'>-#define _VLV_PLL_DW9_CH1		0x8064</div><div class='del'>-#define VLV_PLL_DW9(ch) _PIPE(ch, _VLV_PLL_DW9_CH0, _VLV_PLL_DW9_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PLL_DW10_CH0		0x8048</div><div class='del'>-#define _VLV_PLL_DW10_CH1		0x8068</div><div class='del'>-#define VLV_PLL_DW10(ch) _PIPE(ch, _VLV_PLL_DW10_CH0, _VLV_PLL_DW10_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PLL_DW11_CH0		0x804c</div><div class='del'>-#define _VLV_PLL_DW11_CH1		0x806c</div><div class='del'>-#define VLV_PLL_DW11(ch) _PIPE(ch, _VLV_PLL_DW11_CH0, _VLV_PLL_DW11_CH1)</div><div class='del'>-</div><div class='del'>-/* Spec for ref block start counts at DW10 */</div><div class='del'>-#define VLV_REF_DW13			0x80ac</div><div class='del'>-</div><div class='del'>-#define VLV_CMN_DW0			0x8100</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Per DDI channel DPIO regs</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW0_CH0		0x8200</div><div class='del'>-#define _VLV_PCS_DW0_CH1		0x8400</div><div class='del'>-#define   DPIO_PCS_TX_LANE2_RESET	(1 &lt;&lt; 16)</div><div class='del'>-#define   DPIO_PCS_TX_LANE1_RESET	(1 &lt;&lt; 7)</div><div class='del'>-#define   DPIO_LEFT_TXFIFO_RST_MASTER2	(1 &lt;&lt; 4)</div><div class='del'>-#define   DPIO_RIGHT_TXFIFO_RST_MASTER2	(1 &lt;&lt; 3)</div><div class='del'>-#define VLV_PCS_DW0(ch) _PORT(ch, _VLV_PCS_DW0_CH0, _VLV_PCS_DW0_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW0_CH0		0x200</div><div class='del'>-#define _VLV_PCS23_DW0_CH0		0x400</div><div class='del'>-#define _VLV_PCS01_DW0_CH1		0x2600</div><div class='del'>-#define _VLV_PCS23_DW0_CH1		0x2800</div><div class='del'>-#define VLV_PCS01_DW0(ch) _PORT(ch, _VLV_PCS01_DW0_CH0, _VLV_PCS01_DW0_CH1)</div><div class='del'>-#define VLV_PCS23_DW0(ch) _PORT(ch, _VLV_PCS23_DW0_CH0, _VLV_PCS23_DW0_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW1_CH0		0x8204</div><div class='del'>-#define _VLV_PCS_DW1_CH1		0x8404</div><div class='del'>-#define   CHV_PCS_REQ_SOFTRESET_EN	(1 &lt;&lt; 23)</div><div class='del'>-#define   DPIO_PCS_CLK_CRI_RXEB_EIOS_EN	(1 &lt;&lt; 22)</div><div class='del'>-#define   DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN (1 &lt;&lt; 21)</div><div class='del'>-#define   DPIO_PCS_CLK_DATAWIDTH_SHIFT	(6)</div><div class='del'>-#define   DPIO_PCS_CLK_SOFT_RESET	(1 &lt;&lt; 5)</div><div class='del'>-#define VLV_PCS_DW1(ch) _PORT(ch, _VLV_PCS_DW1_CH0, _VLV_PCS_DW1_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW1_CH0		0x204</div><div class='del'>-#define _VLV_PCS23_DW1_CH0		0x404</div><div class='del'>-#define _VLV_PCS01_DW1_CH1		0x2604</div><div class='del'>-#define _VLV_PCS23_DW1_CH1		0x2804</div><div class='del'>-#define VLV_PCS01_DW1(ch) _PORT(ch, _VLV_PCS01_DW1_CH0, _VLV_PCS01_DW1_CH1)</div><div class='del'>-#define VLV_PCS23_DW1(ch) _PORT(ch, _VLV_PCS23_DW1_CH0, _VLV_PCS23_DW1_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW8_CH0		0x8220</div><div class='del'>-#define _VLV_PCS_DW8_CH1		0x8420</div><div class='del'>-#define   CHV_PCS_USEDCLKCHANNEL_OVRRIDE	(1 &lt;&lt; 20)</div><div class='del'>-#define   CHV_PCS_USEDCLKCHANNEL		(1 &lt;&lt; 21)</div><div class='del'>-#define VLV_PCS_DW8(ch) _PORT(ch, _VLV_PCS_DW8_CH0, _VLV_PCS_DW8_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW8_CH0		0x0220</div><div class='del'>-#define _VLV_PCS23_DW8_CH0		0x0420</div><div class='del'>-#define _VLV_PCS01_DW8_CH1		0x2620</div><div class='del'>-#define _VLV_PCS23_DW8_CH1		0x2820</div><div class='del'>-#define VLV_PCS01_DW8(port) _PORT(port, _VLV_PCS01_DW8_CH0, _VLV_PCS01_DW8_CH1)</div><div class='del'>-#define VLV_PCS23_DW8(port) _PORT(port, _VLV_PCS23_DW8_CH0, _VLV_PCS23_DW8_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW9_CH0		0x8224</div><div class='del'>-#define _VLV_PCS_DW9_CH1		0x8424</div><div class='del'>-#define   DPIO_PCS_TX2MARGIN_MASK	(0x7 &lt;&lt; 13)</div><div class='del'>-#define   DPIO_PCS_TX2MARGIN_000	(0 &lt;&lt; 13)</div><div class='del'>-#define   DPIO_PCS_TX2MARGIN_101	(1 &lt;&lt; 13)</div><div class='del'>-#define   DPIO_PCS_TX1MARGIN_MASK	(0x7 &lt;&lt; 10)</div><div class='del'>-#define   DPIO_PCS_TX1MARGIN_000	(0 &lt;&lt; 10)</div><div class='del'>-#define   DPIO_PCS_TX1MARGIN_101	(1 &lt;&lt; 10)</div><div class='del'>-#define	VLV_PCS_DW9(ch) _PORT(ch, _VLV_PCS_DW9_CH0, _VLV_PCS_DW9_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW9_CH0		0x224</div><div class='del'>-#define _VLV_PCS23_DW9_CH0		0x424</div><div class='del'>-#define _VLV_PCS01_DW9_CH1		0x2624</div><div class='del'>-#define _VLV_PCS23_DW9_CH1		0x2824</div><div class='del'>-#define VLV_PCS01_DW9(ch) _PORT(ch, _VLV_PCS01_DW9_CH0, _VLV_PCS01_DW9_CH1)</div><div class='del'>-#define VLV_PCS23_DW9(ch) _PORT(ch, _VLV_PCS23_DW9_CH0, _VLV_PCS23_DW9_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PCS_DW10_CH0		0x8228</div><div class='del'>-#define _CHV_PCS_DW10_CH1		0x8428</div><div class='del'>-#define   DPIO_PCS_SWING_CALC_TX0_TX2	(1 &lt;&lt; 30)</div><div class='del'>-#define   DPIO_PCS_SWING_CALC_TX1_TX3	(1 &lt;&lt; 31)</div><div class='del'>-#define   DPIO_PCS_TX2DEEMP_MASK	(0xf &lt;&lt; 24)</div><div class='del'>-#define   DPIO_PCS_TX2DEEMP_9P5		(0 &lt;&lt; 24)</div><div class='del'>-#define   DPIO_PCS_TX2DEEMP_6P0		(2 &lt;&lt; 24)</div><div class='del'>-#define   DPIO_PCS_TX1DEEMP_MASK	(0xf &lt;&lt; 16)</div><div class='del'>-#define   DPIO_PCS_TX1DEEMP_9P5		(0 &lt;&lt; 16)</div><div class='del'>-#define   DPIO_PCS_TX1DEEMP_6P0		(2 &lt;&lt; 16)</div><div class='del'>-#define CHV_PCS_DW10(ch) _PORT(ch, _CHV_PCS_DW10_CH0, _CHV_PCS_DW10_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW10_CH0		0x0228</div><div class='del'>-#define _VLV_PCS23_DW10_CH0		0x0428</div><div class='del'>-#define _VLV_PCS01_DW10_CH1		0x2628</div><div class='del'>-#define _VLV_PCS23_DW10_CH1		0x2828</div><div class='del'>-#define VLV_PCS01_DW10(port) _PORT(port, _VLV_PCS01_DW10_CH0, _VLV_PCS01_DW10_CH1)</div><div class='del'>-#define VLV_PCS23_DW10(port) _PORT(port, _VLV_PCS23_DW10_CH0, _VLV_PCS23_DW10_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW11_CH0		0x822c</div><div class='del'>-#define _VLV_PCS_DW11_CH1		0x842c</div><div class='del'>-#define   DPIO_TX2_STAGGER_MASK(x)	((x) &lt;&lt; 24)</div><div class='del'>-#define   DPIO_LANEDESKEW_STRAP_OVRD	(1 &lt;&lt; 3)</div><div class='del'>-#define   DPIO_LEFT_TXFIFO_RST_MASTER	(1 &lt;&lt; 1)</div><div class='del'>-#define   DPIO_RIGHT_TXFIFO_RST_MASTER	(1 &lt;&lt; 0)</div><div class='del'>-#define VLV_PCS_DW11(ch) _PORT(ch, _VLV_PCS_DW11_CH0, _VLV_PCS_DW11_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW11_CH0		0x022c</div><div class='del'>-#define _VLV_PCS23_DW11_CH0		0x042c</div><div class='del'>-#define _VLV_PCS01_DW11_CH1		0x262c</div><div class='del'>-#define _VLV_PCS23_DW11_CH1		0x282c</div><div class='del'>-#define VLV_PCS01_DW11(ch) _PORT(ch, _VLV_PCS01_DW11_CH0, _VLV_PCS01_DW11_CH1)</div><div class='del'>-#define VLV_PCS23_DW11(ch) _PORT(ch, _VLV_PCS23_DW11_CH0, _VLV_PCS23_DW11_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS01_DW12_CH0		0x0230</div><div class='del'>-#define _VLV_PCS23_DW12_CH0		0x0430</div><div class='del'>-#define _VLV_PCS01_DW12_CH1		0x2630</div><div class='del'>-#define _VLV_PCS23_DW12_CH1		0x2830</div><div class='del'>-#define VLV_PCS01_DW12(ch) _PORT(ch, _VLV_PCS01_DW12_CH0, _VLV_PCS01_DW12_CH1)</div><div class='del'>-#define VLV_PCS23_DW12(ch) _PORT(ch, _VLV_PCS23_DW12_CH0, _VLV_PCS23_DW12_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW12_CH0		0x8230</div><div class='del'>-#define _VLV_PCS_DW12_CH1		0x8430</div><div class='del'>-#define   DPIO_TX2_STAGGER_MULT(x)	((x) &lt;&lt; 20)</div><div class='del'>-#define   DPIO_TX1_STAGGER_MULT(x)	((x) &lt;&lt; 16)</div><div class='del'>-#define   DPIO_TX1_STAGGER_MASK(x)	((x) &lt;&lt; 8)</div><div class='del'>-#define   DPIO_LANESTAGGER_STRAP_OVRD	(1 &lt;&lt; 6)</div><div class='del'>-#define   DPIO_LANESTAGGER_STRAP(x)	((x) &lt;&lt; 0)</div><div class='del'>-#define VLV_PCS_DW12(ch) _PORT(ch, _VLV_PCS_DW12_CH0, _VLV_PCS_DW12_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW14_CH0		0x8238</div><div class='del'>-#define _VLV_PCS_DW14_CH1		0x8438</div><div class='del'>-#define	VLV_PCS_DW14(ch) _PORT(ch, _VLV_PCS_DW14_CH0, _VLV_PCS_DW14_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_PCS_DW23_CH0		0x825c</div><div class='del'>-#define _VLV_PCS_DW23_CH1		0x845c</div><div class='del'>-#define VLV_PCS_DW23(ch) _PORT(ch, _VLV_PCS_DW23_CH0, _VLV_PCS_DW23_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX_DW2_CH0			0x8288</div><div class='del'>-#define _VLV_TX_DW2_CH1			0x8488</div><div class='del'>-#define   DPIO_SWING_MARGIN000_SHIFT	16</div><div class='del'>-#define   DPIO_SWING_MARGIN000_MASK	(0xff &lt;&lt; DPIO_SWING_MARGIN000_SHIFT)</div><div class='del'>-#define   DPIO_UNIQ_TRANS_SCALE_SHIFT	8</div><div class='del'>-#define VLV_TX_DW2(ch) _PORT(ch, _VLV_TX_DW2_CH0, _VLV_TX_DW2_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX_DW3_CH0			0x828c</div><div class='del'>-#define _VLV_TX_DW3_CH1			0x848c</div><div class='del'>-/* The following bit for CHV phy */</div><div class='del'>-#define   DPIO_TX_UNIQ_TRANS_SCALE_EN	(1 &lt;&lt; 27)</div><div class='del'>-#define   DPIO_SWING_MARGIN101_SHIFT	16</div><div class='del'>-#define   DPIO_SWING_MARGIN101_MASK	(0xff &lt;&lt; DPIO_SWING_MARGIN101_SHIFT)</div><div class='del'>-#define VLV_TX_DW3(ch) _PORT(ch, _VLV_TX_DW3_CH0, _VLV_TX_DW3_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX_DW4_CH0			0x8290</div><div class='del'>-#define _VLV_TX_DW4_CH1			0x8490</div><div class='del'>-#define   DPIO_SWING_DEEMPH9P5_SHIFT	24</div><div class='del'>-#define   DPIO_SWING_DEEMPH9P5_MASK	(0xff &lt;&lt; DPIO_SWING_DEEMPH9P5_SHIFT)</div><div class='del'>-#define   DPIO_SWING_DEEMPH6P0_SHIFT	16</div><div class='del'>-#define   DPIO_SWING_DEEMPH6P0_MASK	(0xff &lt;&lt; DPIO_SWING_DEEMPH6P0_SHIFT)</div><div class='del'>-#define VLV_TX_DW4(ch) _PORT(ch, _VLV_TX_DW4_CH0, _VLV_TX_DW4_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX3_DW4_CH0		0x690</div><div class='del'>-#define _VLV_TX3_DW4_CH1		0x2a90</div><div class='del'>-#define VLV_TX3_DW4(ch) _PORT(ch, _VLV_TX3_DW4_CH0, _VLV_TX3_DW4_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX_DW5_CH0			0x8294</div><div class='del'>-#define _VLV_TX_DW5_CH1			0x8494</div><div class='del'>-#define   DPIO_TX_OCALINIT_EN		(1 &lt;&lt; 31)</div><div class='del'>-#define VLV_TX_DW5(ch) _PORT(ch, _VLV_TX_DW5_CH0, _VLV_TX_DW5_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX_DW11_CH0		0x82ac</div><div class='del'>-#define _VLV_TX_DW11_CH1		0x84ac</div><div class='del'>-#define VLV_TX_DW11(ch) _PORT(ch, _VLV_TX_DW11_CH0, _VLV_TX_DW11_CH1)</div><div class='del'>-</div><div class='del'>-#define _VLV_TX_DW14_CH0		0x82b8</div><div class='del'>-#define _VLV_TX_DW14_CH1		0x84b8</div><div class='del'>-#define VLV_TX_DW14(ch) _PORT(ch, _VLV_TX_DW14_CH0, _VLV_TX_DW14_CH1)</div><div class='del'>-</div><div class='del'>-/* CHV dpPhy registers */</div><div class='del'>-#define _CHV_PLL_DW0_CH0		0x8000</div><div class='del'>-#define _CHV_PLL_DW0_CH1		0x8180</div><div class='del'>-#define CHV_PLL_DW0(ch) _PIPE(ch, _CHV_PLL_DW0_CH0, _CHV_PLL_DW0_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PLL_DW1_CH0		0x8004</div><div class='del'>-#define _CHV_PLL_DW1_CH1		0x8184</div><div class='del'>-#define   DPIO_CHV_N_DIV_SHIFT		8</div><div class='del'>-#define   DPIO_CHV_M1_DIV_BY_2		(0 &lt;&lt; 0)</div><div class='del'>-#define CHV_PLL_DW1(ch) _PIPE(ch, _CHV_PLL_DW1_CH0, _CHV_PLL_DW1_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PLL_DW2_CH0		0x8008</div><div class='del'>-#define _CHV_PLL_DW2_CH1		0x8188</div><div class='del'>-#define CHV_PLL_DW2(ch) _PIPE(ch, _CHV_PLL_DW2_CH0, _CHV_PLL_DW2_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PLL_DW3_CH0		0x800c</div><div class='del'>-#define _CHV_PLL_DW3_CH1		0x818c</div><div class='del'>-#define  DPIO_CHV_FRAC_DIV_EN		(1 &lt;&lt; 16)</div><div class='del'>-#define  DPIO_CHV_FIRST_MOD		(0 &lt;&lt; 8)</div><div class='del'>-#define  DPIO_CHV_SECOND_MOD		(1 &lt;&lt; 8)</div><div class='del'>-#define  DPIO_CHV_FEEDFWD_GAIN_SHIFT	0</div><div class='del'>-#define  DPIO_CHV_FEEDFWD_GAIN_MASK		(0xF &lt;&lt; 0)</div><div class='del'>-#define CHV_PLL_DW3(ch) _PIPE(ch, _CHV_PLL_DW3_CH0, _CHV_PLL_DW3_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PLL_DW6_CH0		0x8018</div><div class='del'>-#define _CHV_PLL_DW6_CH1		0x8198</div><div class='del'>-#define   DPIO_CHV_GAIN_CTRL_SHIFT	16</div><div class='del'>-#define	  DPIO_CHV_INT_COEFF_SHIFT	8</div><div class='del'>-#define   DPIO_CHV_PROP_COEFF_SHIFT	0</div><div class='del'>-#define CHV_PLL_DW6(ch) _PIPE(ch, _CHV_PLL_DW6_CH0, _CHV_PLL_DW6_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PLL_DW8_CH0		0x8020</div><div class='del'>-#define _CHV_PLL_DW8_CH1		0x81A0</div><div class='del'>-#define   DPIO_CHV_TDC_TARGET_CNT_SHIFT 0</div><div class='del'>-#define   DPIO_CHV_TDC_TARGET_CNT_MASK  (0x3FF &lt;&lt; 0)</div><div class='del'>-#define CHV_PLL_DW8(ch) _PIPE(ch, _CHV_PLL_DW8_CH0, _CHV_PLL_DW8_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_PLL_DW9_CH0		0x8024</div><div class='del'>-#define _CHV_PLL_DW9_CH1		0x81A4</div><div class='del'>-#define  DPIO_CHV_INT_LOCK_THRESHOLD_SHIFT		1 /* 3 bits */</div><div class='del'>-#define  DPIO_CHV_INT_LOCK_THRESHOLD_MASK		(7 &lt;&lt; 1)</div><div class='del'>-#define  DPIO_CHV_INT_LOCK_THRESHOLD_SEL_COARSE	1 /* 1: coarse &amp; 0 : fine  */</div><div class='del'>-#define CHV_PLL_DW9(ch) _PIPE(ch, _CHV_PLL_DW9_CH0, _CHV_PLL_DW9_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_CMN_DW0_CH0               0x8100</div><div class='del'>-#define   DPIO_ALLDL_POWERDOWN_SHIFT_CH0	19</div><div class='del'>-#define   DPIO_ANYDL_POWERDOWN_SHIFT_CH0	18</div><div class='del'>-#define   DPIO_ALLDL_POWERDOWN			(1 &lt;&lt; 1)</div><div class='del'>-#define   DPIO_ANYDL_POWERDOWN			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define _CHV_CMN_DW5_CH0               0x8114</div><div class='del'>-#define   CHV_BUFRIGHTENA1_DISABLE	(0 &lt;&lt; 20)</div><div class='del'>-#define   CHV_BUFRIGHTENA1_NORMAL	(1 &lt;&lt; 20)</div><div class='del'>-#define   CHV_BUFRIGHTENA1_FORCE	(3 &lt;&lt; 20)</div><div class='del'>-#define   CHV_BUFRIGHTENA1_MASK		(3 &lt;&lt; 20)</div><div class='del'>-#define   CHV_BUFLEFTENA1_DISABLE	(0 &lt;&lt; 22)</div><div class='del'>-#define   CHV_BUFLEFTENA1_NORMAL	(1 &lt;&lt; 22)</div><div class='del'>-#define   CHV_BUFLEFTENA1_FORCE		(3 &lt;&lt; 22)</div><div class='del'>-#define   CHV_BUFLEFTENA1_MASK		(3 &lt;&lt; 22)</div><div class='del'>-</div><div class='del'>-#define _CHV_CMN_DW13_CH0		0x8134</div><div class='del'>-#define _CHV_CMN_DW0_CH1		0x8080</div><div class='del'>-#define   DPIO_CHV_S1_DIV_SHIFT		21</div><div class='del'>-#define   DPIO_CHV_P1_DIV_SHIFT		13 /* 3 bits */</div><div class='del'>-#define   DPIO_CHV_P2_DIV_SHIFT		8  /* 5 bits */</div><div class='del'>-#define   DPIO_CHV_K_DIV_SHIFT		4</div><div class='del'>-#define   DPIO_PLL_FREQLOCK		(1 &lt;&lt; 1)</div><div class='del'>-#define   DPIO_PLL_LOCK			(1 &lt;&lt; 0)</div><div class='del'>-#define CHV_CMN_DW13(ch) _PIPE(ch, _CHV_CMN_DW13_CH0, _CHV_CMN_DW0_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_CMN_DW14_CH0		0x8138</div><div class='del'>-#define _CHV_CMN_DW1_CH1		0x8084</div><div class='del'>-#define   DPIO_AFC_RECAL		(1 &lt;&lt; 14)</div><div class='del'>-#define   DPIO_DCLKP_EN			(1 &lt;&lt; 13)</div><div class='del'>-#define   CHV_BUFLEFTENA2_DISABLE	(0 &lt;&lt; 17) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFLEFTENA2_NORMAL	(1 &lt;&lt; 17) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFLEFTENA2_FORCE		(3 &lt;&lt; 17) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFLEFTENA2_MASK		(3 &lt;&lt; 17) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFRIGHTENA2_DISABLE	(0 &lt;&lt; 19) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFRIGHTENA2_NORMAL	(1 &lt;&lt; 19) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFRIGHTENA2_FORCE	(3 &lt;&lt; 19) /* CL2 DW1 only */</div><div class='del'>-#define   CHV_BUFRIGHTENA2_MASK		(3 &lt;&lt; 19) /* CL2 DW1 only */</div><div class='del'>-#define CHV_CMN_DW14(ch) _PIPE(ch, _CHV_CMN_DW14_CH0, _CHV_CMN_DW1_CH1)</div><div class='del'>-</div><div class='del'>-#define _CHV_CMN_DW19_CH0		0x814c</div><div class='del'>-#define _CHV_CMN_DW6_CH1		0x8098</div><div class='del'>-#define   DPIO_ALLDL_POWERDOWN_SHIFT_CH1	30 /* CL2 DW6 only */</div><div class='del'>-#define   DPIO_ANYDL_POWERDOWN_SHIFT_CH1	29 /* CL2 DW6 only */</div><div class='del'>-#define   DPIO_DYNPWRDOWNEN_CH1		(1 &lt;&lt; 28) /* CL2 DW6 only */</div><div class='del'>-#define   CHV_CMN_USEDCLKCHANNEL	(1 &lt;&lt; 13)</div><div class='del'>-</div><div class='del'>-#define CHV_CMN_DW19(ch) _PIPE(ch, _CHV_CMN_DW19_CH0, _CHV_CMN_DW6_CH1)</div><div class='del'>-</div><div class='del'>-#define CHV_CMN_DW28			0x8170</div><div class='del'>-#define   DPIO_CL1POWERDOWNEN		(1 &lt;&lt; 23)</div><div class='del'>-#define   DPIO_DYNPWRDOWNEN_CH0		(1 &lt;&lt; 22)</div><div class='del'>-#define   DPIO_SUS_CLK_CONFIG_ON		(0 &lt;&lt; 0)</div><div class='del'>-#define   DPIO_SUS_CLK_CONFIG_CLKREQ		(1 &lt;&lt; 0)</div><div class='del'>-#define   DPIO_SUS_CLK_CONFIG_GATE		(2 &lt;&lt; 0)</div><div class='del'>-#define   DPIO_SUS_CLK_CONFIG_GATE_CLKREQ	(3 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define CHV_CMN_DW30			0x8178</div><div class='del'>-#define   DPIO_CL2_LDOFUSE_PWRENB	(1 &lt;&lt; 6)</div><div class='del'>-#define   DPIO_LRC_BYPASS		(1 &lt;&lt; 3)</div><div class='del'>-</div><div class='del'>-#define _TXLANE(ch, lane, offset) ((ch ? 0x2400 : 0) + \</div><div class='del'>-					(lane) * 0x200 + (offset))</div><div class='del'>-</div><div class='del'>-#define CHV_TX_DW0(ch, lane) _TXLANE(ch, lane, 0x80)</div><div class='del'>-#define CHV_TX_DW1(ch, lane) _TXLANE(ch, lane, 0x84)</div><div class='del'>-#define CHV_TX_DW2(ch, lane) _TXLANE(ch, lane, 0x88)</div><div class='del'>-#define CHV_TX_DW3(ch, lane) _TXLANE(ch, lane, 0x8c)</div><div class='del'>-#define CHV_TX_DW4(ch, lane) _TXLANE(ch, lane, 0x90)</div><div class='del'>-#define CHV_TX_DW5(ch, lane) _TXLANE(ch, lane, 0x94)</div><div class='del'>-#define CHV_TX_DW6(ch, lane) _TXLANE(ch, lane, 0x98)</div><div class='del'>-#define CHV_TX_DW7(ch, lane) _TXLANE(ch, lane, 0x9c)</div><div class='del'>-#define CHV_TX_DW8(ch, lane) _TXLANE(ch, lane, 0xa0)</div><div class='del'>-#define CHV_TX_DW9(ch, lane) _TXLANE(ch, lane, 0xa4)</div><div class='del'>-#define CHV_TX_DW10(ch, lane) _TXLANE(ch, lane, 0xa8)</div><div class='del'>-#define CHV_TX_DW11(ch, lane) _TXLANE(ch, lane, 0xac)</div><div class='del'>-#define   DPIO_FRC_LATENCY_SHFIT	8</div><div class='del'>-#define CHV_TX_DW14(ch, lane) _TXLANE(ch, lane, 0xb8)</div><div class='del'>-#define   DPIO_UPAR_SHIFT		30</div><div class='del'>-</div><div class='del'>-/* BXT PHY registers */</div><div class='del'>-#define _BXT_PHY0_BASE			0x6C000</div><div class='del'>-#define _BXT_PHY1_BASE			0x162000</div><div class='del'>-#define _BXT_PHY2_BASE			0x163000</div><div class='del'>-#define BXT_PHY_BASE(phy)							\</div><div class='del'>-	 _PICK_EVEN_2RANGES(phy, 1,						\</div><div class='del'>-			    _BXT_PHY0_BASE, _BXT_PHY0_BASE,			\</div><div class='del'>-			    _BXT_PHY1_BASE, _BXT_PHY2_BASE)</div><div class='del'>-</div><div class='del'>-#define _BXT_PHY(phy, reg)						\</div><div class='del'>-	_MMIO(BXT_PHY_BASE(phy) - _BXT_PHY0_BASE + (reg))</div><div class='del'>-</div><div class='del'>-#define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1)		\</div><div class='del'>-	(BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE,	\</div><div class='del'>-					 (reg_ch1) - _BXT_PHY0_BASE))</div><div class='del'>-#define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1)		\</div><div class='del'>-	_MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1))</div><div class='del'>-</div><div class='ctx'> #define BXT_P_CR_GT_DISP_PWRON		_MMIO(0x138090)</div><div class='ctx'> #define  MIPIO_RST_CTRL				(1 &lt;&lt; 2)</div><div class='ctx'> </div><div class='hunk'>@@ -577,250 +216,6 @@</div><div class='ctx'> 				  _PHY_CTL_FAMILY_DDI, _PHY_CTL_FAMILY_DDI,	\</div><div class='ctx'> 				  _PHY_CTL_FAMILY_EDP, _PHY_CTL_FAMILY_DDI_C))</div><div class='ctx'> </div><div class='del'>-/* BXT PHY PLL registers */</div><div class='del'>-#define _PORT_PLL_A			0x46074</div><div class='del'>-#define _PORT_PLL_B			0x46078</div><div class='del'>-#define _PORT_PLL_C			0x4607c</div><div class='del'>-#define   PORT_PLL_ENABLE		REG_BIT(31)</div><div class='del'>-#define   PORT_PLL_LOCK			REG_BIT(30)</div><div class='del'>-#define   PORT_PLL_REF_SEL		REG_BIT(27)</div><div class='del'>-#define   PORT_PLL_POWER_ENABLE		REG_BIT(26)</div><div class='del'>-#define   PORT_PLL_POWER_STATE		REG_BIT(25)</div><div class='del'>-#define BXT_PORT_PLL_ENABLE(port)	_MMIO_PORT(port, _PORT_PLL_A, _PORT_PLL_B)</div><div class='del'>-</div><div class='del'>-#define _PORT_PLL_EBB_0_A		0x162034</div><div class='del'>-#define _PORT_PLL_EBB_0_B		0x6C034</div><div class='del'>-#define _PORT_PLL_EBB_0_C		0x6C340</div><div class='del'>-#define   PORT_PLL_P1_MASK		REG_GENMASK(15, 13)</div><div class='del'>-#define   PORT_PLL_P1(p1)		REG_FIELD_PREP(PORT_PLL_P1_MASK, (p1))</div><div class='del'>-#define   PORT_PLL_P2_MASK		REG_GENMASK(12, 8)</div><div class='del'>-#define   PORT_PLL_P2(p2)		REG_FIELD_PREP(PORT_PLL_P2_MASK, (p2))</div><div class='del'>-#define BXT_PORT_PLL_EBB_0(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PLL_EBB_0_B, \</div><div class='del'>-							 _PORT_PLL_EBB_0_C)</div><div class='del'>-</div><div class='del'>-#define _PORT_PLL_EBB_4_A		0x162038</div><div class='del'>-#define _PORT_PLL_EBB_4_B		0x6C038</div><div class='del'>-#define _PORT_PLL_EBB_4_C		0x6C344</div><div class='del'>-#define   PORT_PLL_RECALIBRATE		REG_BIT(14)</div><div class='del'>-#define   PORT_PLL_10BIT_CLK_ENABLE	REG_BIT(13)</div><div class='del'>-#define BXT_PORT_PLL_EBB_4(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PLL_EBB_4_B, \</div><div class='del'>-							 _PORT_PLL_EBB_4_C)</div><div class='del'>-</div><div class='del'>-#define _PORT_PLL_0_A			0x162100</div><div class='del'>-#define _PORT_PLL_0_B			0x6C100</div><div class='del'>-#define _PORT_PLL_0_C			0x6C380</div><div class='del'>-/* PORT_PLL_0_A */</div><div class='del'>-#define   PORT_PLL_M2_INT_MASK		REG_GENMASK(7, 0)</div><div class='del'>-#define   PORT_PLL_M2_INT(m2_int)	REG_FIELD_PREP(PORT_PLL_M2_INT_MASK, (m2_int))</div><div class='del'>-/* PORT_PLL_1_A */</div><div class='del'>-#define   PORT_PLL_N_MASK		REG_GENMASK(11, 8)</div><div class='del'>-#define   PORT_PLL_N(n)			REG_FIELD_PREP(PORT_PLL_N_MASK, (n))</div><div class='del'>-/* PORT_PLL_2_A */</div><div class='del'>-#define   PORT_PLL_M2_FRAC_MASK		REG_GENMASK(21, 0)</div><div class='del'>-#define   PORT_PLL_M2_FRAC(m2_frac)	REG_FIELD_PREP(PORT_PLL_M2_FRAC_MASK, (m2_frac))</div><div class='del'>-/* PORT_PLL_3_A */</div><div class='del'>-#define   PORT_PLL_M2_FRAC_ENABLE	REG_BIT(16)</div><div class='del'>-/* PORT_PLL_6_A */</div><div class='del'>-#define   PORT_PLL_GAIN_CTL_MASK	REG_GENMASK(18, 16)</div><div class='del'>-#define   PORT_PLL_GAIN_CTL(x)		REG_FIELD_PREP(PORT_PLL_GAIN_CTL_MASK, (x))</div><div class='del'>-#define   PORT_PLL_INT_COEFF_MASK	REG_GENMASK(12, 8)</div><div class='del'>-#define   PORT_PLL_INT_COEFF(x)		REG_FIELD_PREP(PORT_PLL_INT_COEFF_MASK, (x))</div><div class='del'>-#define   PORT_PLL_PROP_COEFF_MASK	REG_GENMASK(3, 0)</div><div class='del'>-#define   PORT_PLL_PROP_COEFF(x)	REG_FIELD_PREP(PORT_PLL_PROP_COEFF_MASK, (x))</div><div class='del'>-/* PORT_PLL_8_A */</div><div class='del'>-#define   PORT_PLL_TARGET_CNT_MASK	REG_GENMASK(9, 0)</div><div class='del'>-#define   PORT_PLL_TARGET_CNT(x)	REG_FIELD_PREP(PORT_PLL_TARGET_CNT_MASK, (x))</div><div class='del'>-/* PORT_PLL_9_A */</div><div class='del'>-#define  PORT_PLL_LOCK_THRESHOLD_MASK	REG_GENMASK(3, 1)</div><div class='del'>-#define  PORT_PLL_LOCK_THRESHOLD(x)	REG_FIELD_PREP(PORT_PLL_LOCK_THRESHOLD_MASK, (x))</div><div class='del'>-/* PORT_PLL_10_A */</div><div class='del'>-#define  PORT_PLL_DCO_AMP_OVR_EN_H	REG_BIT(27)</div><div class='del'>-#define  PORT_PLL_DCO_AMP_MASK		REG_GENMASK(13, 10)</div><div class='del'>-#define  PORT_PLL_DCO_AMP(x)		REG_FIELD_PREP(PORT_PLL_DCO_AMP_MASK, (x))</div><div class='del'>-#define _PORT_PLL_BASE(phy, ch)		_BXT_PHY_CH(phy, ch, \</div><div class='del'>-						    _PORT_PLL_0_B, \</div><div class='del'>-						    _PORT_PLL_0_C)</div><div class='del'>-#define BXT_PORT_PLL(phy, ch, idx)	_MMIO(_PORT_PLL_BASE(phy, ch) + \</div><div class='del'>-					      (idx) * 4)</div><div class='del'>-</div><div class='del'>-/* BXT PHY common lane registers */</div><div class='del'>-#define _PORT_CL1CM_DW0_A		0x162000</div><div class='del'>-#define _PORT_CL1CM_DW0_BC		0x6C000</div><div class='del'>-#define   PHY_POWER_GOOD		(1 &lt;&lt; 16)</div><div class='del'>-#define   PHY_RESERVED			(1 &lt;&lt; 7)</div><div class='del'>-#define BXT_PORT_CL1CM_DW0(phy)		_BXT_PHY((phy), _PORT_CL1CM_DW0_BC)</div><div class='del'>-</div><div class='del'>-#define _PORT_CL1CM_DW9_A		0x162024</div><div class='del'>-#define _PORT_CL1CM_DW9_BC		0x6C024</div><div class='del'>-#define   IREF0RC_OFFSET_SHIFT		8</div><div class='del'>-#define   IREF0RC_OFFSET_MASK		(0xFF &lt;&lt; IREF0RC_OFFSET_SHIFT)</div><div class='del'>-#define BXT_PORT_CL1CM_DW9(phy)		_BXT_PHY((phy), _PORT_CL1CM_DW9_BC)</div><div class='del'>-</div><div class='del'>-#define _PORT_CL1CM_DW10_A		0x162028</div><div class='del'>-#define _PORT_CL1CM_DW10_BC		0x6C028</div><div class='del'>-#define   IREF1RC_OFFSET_SHIFT		8</div><div class='del'>-#define   IREF1RC_OFFSET_MASK		(0xFF &lt;&lt; IREF1RC_OFFSET_SHIFT)</div><div class='del'>-#define BXT_PORT_CL1CM_DW10(phy)	_BXT_PHY((phy), _PORT_CL1CM_DW10_BC)</div><div class='del'>-</div><div class='del'>-#define _PORT_CL1CM_DW28_A		0x162070</div><div class='del'>-#define _PORT_CL1CM_DW28_BC		0x6C070</div><div class='del'>-#define   OCL1_POWER_DOWN_EN		(1 &lt;&lt; 23)</div><div class='del'>-#define   DW28_OLDO_DYN_PWR_DOWN_EN	(1 &lt;&lt; 22)</div><div class='del'>-#define   SUS_CLK_CONFIG		0x3</div><div class='del'>-#define BXT_PORT_CL1CM_DW28(phy)	_BXT_PHY((phy), _PORT_CL1CM_DW28_BC)</div><div class='del'>-</div><div class='del'>-#define _PORT_CL1CM_DW30_A		0x162078</div><div class='del'>-#define _PORT_CL1CM_DW30_BC		0x6C078</div><div class='del'>-#define   OCL2_LDOFUSE_PWR_DIS		(1 &lt;&lt; 6)</div><div class='del'>-#define BXT_PORT_CL1CM_DW30(phy)	_BXT_PHY((phy), _PORT_CL1CM_DW30_BC)</div><div class='del'>-</div><div class='del'>-/* The spec defines this only for BXT PHY0, but lets assume that this</div><div class='del'>- * would exist for PHY1 too if it had a second channel.</div><div class='del'>- */</div><div class='del'>-#define _PORT_CL2CM_DW6_A		0x162358</div><div class='del'>-#define _PORT_CL2CM_DW6_BC		0x6C358</div><div class='del'>-#define BXT_PORT_CL2CM_DW6(phy)		_BXT_PHY((phy), _PORT_CL2CM_DW6_BC)</div><div class='del'>-#define   DW6_OLDO_DYN_PWR_DOWN_EN	(1 &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-/* BXT PHY Ref registers */</div><div class='del'>-#define _PORT_REF_DW3_A			0x16218C</div><div class='del'>-#define _PORT_REF_DW3_BC		0x6C18C</div><div class='del'>-#define   GRC_DONE			(1 &lt;&lt; 22)</div><div class='del'>-#define BXT_PORT_REF_DW3(phy)		_BXT_PHY((phy), _PORT_REF_DW3_BC)</div><div class='del'>-</div><div class='del'>-#define _PORT_REF_DW6_A			0x162198</div><div class='del'>-#define _PORT_REF_DW6_BC		0x6C198</div><div class='del'>-#define   GRC_CODE_SHIFT		24</div><div class='del'>-#define   GRC_CODE_MASK			(0xFF &lt;&lt; GRC_CODE_SHIFT)</div><div class='del'>-#define   GRC_CODE_FAST_SHIFT		16</div><div class='del'>-#define   GRC_CODE_FAST_MASK		(0xFF &lt;&lt; GRC_CODE_FAST_SHIFT)</div><div class='del'>-#define   GRC_CODE_SLOW_SHIFT		8</div><div class='del'>-#define   GRC_CODE_SLOW_MASK		(0xFF &lt;&lt; GRC_CODE_SLOW_SHIFT)</div><div class='del'>-#define   GRC_CODE_NOM_MASK		0xFF</div><div class='del'>-#define BXT_PORT_REF_DW6(phy)		_BXT_PHY((phy), _PORT_REF_DW6_BC)</div><div class='del'>-</div><div class='del'>-#define _PORT_REF_DW8_A			0x1621A0</div><div class='del'>-#define _PORT_REF_DW8_BC		0x6C1A0</div><div class='del'>-#define   GRC_DIS			(1 &lt;&lt; 15)</div><div class='del'>-#define   GRC_RDY_OVRD			(1 &lt;&lt; 1)</div><div class='del'>-#define BXT_PORT_REF_DW8(phy)		_BXT_PHY((phy), _PORT_REF_DW8_BC)</div><div class='del'>-</div><div class='del'>-/* BXT PHY PCS registers */</div><div class='del'>-#define _PORT_PCS_DW10_LN01_A		0x162428</div><div class='del'>-#define _PORT_PCS_DW10_LN01_B		0x6C428</div><div class='del'>-#define _PORT_PCS_DW10_LN01_C		0x6C828</div><div class='del'>-#define _PORT_PCS_DW10_GRP_A		0x162C28</div><div class='del'>-#define _PORT_PCS_DW10_GRP_B		0x6CC28</div><div class='del'>-#define _PORT_PCS_DW10_GRP_C		0x6CE28</div><div class='del'>-#define BXT_PORT_PCS_DW10_LN01(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PCS_DW10_LN01_B, \</div><div class='del'>-							 _PORT_PCS_DW10_LN01_C)</div><div class='del'>-#define BXT_PORT_PCS_DW10_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PCS_DW10_GRP_B, \</div><div class='del'>-							 _PORT_PCS_DW10_GRP_C)</div><div class='del'>-</div><div class='del'>-#define   TX2_SWING_CALC_INIT		(1 &lt;&lt; 31)</div><div class='del'>-#define   TX1_SWING_CALC_INIT		(1 &lt;&lt; 30)</div><div class='del'>-</div><div class='del'>-#define _PORT_PCS_DW12_LN01_A		0x162430</div><div class='del'>-#define _PORT_PCS_DW12_LN01_B		0x6C430</div><div class='del'>-#define _PORT_PCS_DW12_LN01_C		0x6C830</div><div class='del'>-#define _PORT_PCS_DW12_LN23_A		0x162630</div><div class='del'>-#define _PORT_PCS_DW12_LN23_B		0x6C630</div><div class='del'>-#define _PORT_PCS_DW12_LN23_C		0x6CA30</div><div class='del'>-#define _PORT_PCS_DW12_GRP_A		0x162c30</div><div class='del'>-#define _PORT_PCS_DW12_GRP_B		0x6CC30</div><div class='del'>-#define _PORT_PCS_DW12_GRP_C		0x6CE30</div><div class='del'>-#define   LANESTAGGER_STRAP_OVRD	(1 &lt;&lt; 6)</div><div class='del'>-#define   LANE_STAGGER_MASK		0x1F</div><div class='del'>-#define BXT_PORT_PCS_DW12_LN01(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PCS_DW12_LN01_B, \</div><div class='del'>-							 _PORT_PCS_DW12_LN01_C)</div><div class='del'>-#define BXT_PORT_PCS_DW12_LN23(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PCS_DW12_LN23_B, \</div><div class='del'>-							 _PORT_PCS_DW12_LN23_C)</div><div class='del'>-#define BXT_PORT_PCS_DW12_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_PCS_DW12_GRP_B, \</div><div class='del'>-							 _PORT_PCS_DW12_GRP_C)</div><div class='del'>-</div><div class='del'>-/* BXT PHY TX registers */</div><div class='del'>-#define _BXT_LANE_OFFSET(lane)           (((lane) &gt;&gt; 1) * 0x200 +	\</div><div class='del'>-					  ((lane) &amp; 1) * 0x80)</div><div class='del'>-</div><div class='del'>-#define _PORT_TX_DW2_LN0_A		0x162508</div><div class='del'>-#define _PORT_TX_DW2_LN0_B		0x6C508</div><div class='del'>-#define _PORT_TX_DW2_LN0_C		0x6C908</div><div class='del'>-#define _PORT_TX_DW2_GRP_A		0x162D08</div><div class='del'>-#define _PORT_TX_DW2_GRP_B		0x6CD08</div><div class='del'>-#define _PORT_TX_DW2_GRP_C		0x6CF08</div><div class='del'>-#define BXT_PORT_TX_DW2_LN0(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW2_LN0_B, \</div><div class='del'>-							 _PORT_TX_DW2_LN0_C)</div><div class='del'>-#define BXT_PORT_TX_DW2_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW2_GRP_B, \</div><div class='del'>-							 _PORT_TX_DW2_GRP_C)</div><div class='del'>-#define   MARGIN_000_SHIFT		16</div><div class='del'>-#define   MARGIN_000			(0xFF &lt;&lt; MARGIN_000_SHIFT)</div><div class='del'>-#define   UNIQ_TRANS_SCALE_SHIFT	8</div><div class='del'>-#define   UNIQ_TRANS_SCALE		(0xFF &lt;&lt; UNIQ_TRANS_SCALE_SHIFT)</div><div class='del'>-</div><div class='del'>-#define _PORT_TX_DW3_LN0_A		0x16250C</div><div class='del'>-#define _PORT_TX_DW3_LN0_B		0x6C50C</div><div class='del'>-#define _PORT_TX_DW3_LN0_C		0x6C90C</div><div class='del'>-#define _PORT_TX_DW3_GRP_A		0x162D0C</div><div class='del'>-#define _PORT_TX_DW3_GRP_B		0x6CD0C</div><div class='del'>-#define _PORT_TX_DW3_GRP_C		0x6CF0C</div><div class='del'>-#define BXT_PORT_TX_DW3_LN0(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW3_LN0_B, \</div><div class='del'>-							 _PORT_TX_DW3_LN0_C)</div><div class='del'>-#define BXT_PORT_TX_DW3_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW3_GRP_B, \</div><div class='del'>-							 _PORT_TX_DW3_GRP_C)</div><div class='del'>-#define   SCALE_DCOMP_METHOD		(1 &lt;&lt; 26)</div><div class='del'>-#define   UNIQUE_TRANGE_EN_METHOD	(1 &lt;&lt; 27)</div><div class='del'>-</div><div class='del'>-#define _PORT_TX_DW4_LN0_A		0x162510</div><div class='del'>-#define _PORT_TX_DW4_LN0_B		0x6C510</div><div class='del'>-#define _PORT_TX_DW4_LN0_C		0x6C910</div><div class='del'>-#define _PORT_TX_DW4_GRP_A		0x162D10</div><div class='del'>-#define _PORT_TX_DW4_GRP_B		0x6CD10</div><div class='del'>-#define _PORT_TX_DW4_GRP_C		0x6CF10</div><div class='del'>-#define BXT_PORT_TX_DW4_LN0(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW4_LN0_B, \</div><div class='del'>-							 _PORT_TX_DW4_LN0_C)</div><div class='del'>-#define BXT_PORT_TX_DW4_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW4_GRP_B, \</div><div class='del'>-							 _PORT_TX_DW4_GRP_C)</div><div class='del'>-#define   DEEMPH_SHIFT			24</div><div class='del'>-#define   DE_EMPHASIS			(0xFF &lt;&lt; DEEMPH_SHIFT)</div><div class='del'>-</div><div class='del'>-#define _PORT_TX_DW5_LN0_A		0x162514</div><div class='del'>-#define _PORT_TX_DW5_LN0_B		0x6C514</div><div class='del'>-#define _PORT_TX_DW5_LN0_C		0x6C914</div><div class='del'>-#define _PORT_TX_DW5_GRP_A		0x162D14</div><div class='del'>-#define _PORT_TX_DW5_GRP_B		0x6CD14</div><div class='del'>-#define _PORT_TX_DW5_GRP_C		0x6CF14</div><div class='del'>-#define BXT_PORT_TX_DW5_LN0(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW5_LN0_B, \</div><div class='del'>-							 _PORT_TX_DW5_LN0_C)</div><div class='del'>-#define BXT_PORT_TX_DW5_GRP(phy, ch)	_MMIO_BXT_PHY_CH(phy, ch, \</div><div class='del'>-							 _PORT_TX_DW5_GRP_B, \</div><div class='del'>-							 _PORT_TX_DW5_GRP_C)</div><div class='del'>-#define   DCC_DELAY_RANGE_1		(1 &lt;&lt; 9)</div><div class='del'>-#define   DCC_DELAY_RANGE_2		(1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define _PORT_TX_DW14_LN0_A		0x162538</div><div class='del'>-#define _PORT_TX_DW14_LN0_B		0x6C538</div><div class='del'>-#define _PORT_TX_DW14_LN0_C		0x6C938</div><div class='del'>-#define   LATENCY_OPTIM_SHIFT		30</div><div class='del'>-#define   LATENCY_OPTIM			(1 &lt;&lt; LATENCY_OPTIM_SHIFT)</div><div class='del'>-#define BXT_PORT_TX_DW14_LN(phy, ch, lane)				\</div><div class='del'>-	_MMIO(_BXT_PHY_CH(phy, ch, _PORT_TX_DW14_LN0_B,			\</div><div class='del'>-				   _PORT_TX_DW14_LN0_C) +		\</div><div class='del'>-	      _BXT_LANE_OFFSET(lane))</div><div class='del'>-</div><div class='ctx'> /* UAIMI scratch pad register 1 */</div><div class='ctx'> #define UAIMI_SPR1			_MMIO(0x4F074)</div><div class='ctx'> /* SKL VccIO mask */</div><div class='hunk'>@@ -1228,22 +623,6 @@</div><div class='ctx'> #define I915_ASLE_INTERRUPT				(1 &lt;&lt; 0)</div><div class='ctx'> #define I915_BSD_USER_INTERRUPT				(1 &lt;&lt; 25)</div><div class='ctx'> </div><div class='del'>-#define I915_HDMI_LPE_AUDIO_BASE	(VLV_DISPLAY_BASE + 0x65000)</div><div class='del'>-#define I915_HDMI_LPE_AUDIO_SIZE	0x1000</div><div class='del'>-</div><div class='del'>-/* DisplayPort Audio w/ LPE */</div><div class='del'>-#define VLV_AUD_CHICKEN_BIT_REG		_MMIO(VLV_DISPLAY_BASE + 0x62F38)</div><div class='del'>-#define VLV_CHICKEN_BIT_DBG_ENABLE	(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define _VLV_AUD_PORT_EN_B_DBG		(VLV_DISPLAY_BASE + 0x62F20)</div><div class='del'>-#define _VLV_AUD_PORT_EN_C_DBG		(VLV_DISPLAY_BASE + 0x62F30)</div><div class='del'>-#define _VLV_AUD_PORT_EN_D_DBG		(VLV_DISPLAY_BASE + 0x62F34)</div><div class='del'>-#define VLV_AUD_PORT_EN_DBG(port)	_MMIO_PORT3((port) - PORT_B,	   \</div><div class='del'>-						    _VLV_AUD_PORT_EN_B_DBG, \</div><div class='del'>-						    _VLV_AUD_PORT_EN_C_DBG, \</div><div class='del'>-						    _VLV_AUD_PORT_EN_D_DBG)</div><div class='del'>-#define VLV_AMP_MUTE		        (1 &lt;&lt; 1)</div><div class='del'>-</div><div class='ctx'> #define GEN6_BSD_RNCID			_MMIO(0x12198)</div><div class='ctx'> </div><div class='ctx'> #define GEN7_FF_THREAD_MODE		_MMIO(0x20a0)</div><div class='hunk'>@@ -1264,109 +643,6 @@</div><div class='ctx'> #define   GEN7_FF_DS_SCHED_LOAD_BALANCE	(0x1 &lt;&lt; 4)  /* Default */</div><div class='ctx'> #define   GEN7_FF_DS_SCHED_HW		(0x0 &lt;&lt; 4)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Framebuffer compression (915+ only)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define FBC_CFB_BASE		_MMIO(0x3200) /* 4k page aligned */</div><div class='del'>-#define FBC_LL_BASE		_MMIO(0x3204) /* 4k page aligned */</div><div class='del'>-#define FBC_CONTROL		_MMIO(0x3208)</div><div class='del'>-#define   FBC_CTL_EN			REG_BIT(31)</div><div class='del'>-#define   FBC_CTL_PERIODIC		REG_BIT(30)</div><div class='del'>-#define   FBC_CTL_INTERVAL_MASK		REG_GENMASK(29, 16)</div><div class='del'>-#define   FBC_CTL_INTERVAL(x)		REG_FIELD_PREP(FBC_CTL_INTERVAL_MASK, (x))</div><div class='del'>-#define   FBC_CTL_STOP_ON_MOD		REG_BIT(15)</div><div class='del'>-#define   FBC_CTL_UNCOMPRESSIBLE	REG_BIT(14) /* i915+ */</div><div class='del'>-#define   FBC_CTL_C3_IDLE		REG_BIT(13) /* i945gm only */</div><div class='del'>-#define   FBC_CTL_STRIDE_MASK		REG_GENMASK(12, 5)</div><div class='del'>-#define   FBC_CTL_STRIDE(x)		REG_FIELD_PREP(FBC_CTL_STRIDE_MASK, (x))</div><div class='del'>-#define   FBC_CTL_FENCENO_MASK		REG_GENMASK(3, 0)</div><div class='del'>-#define   FBC_CTL_FENCENO(x)		REG_FIELD_PREP(FBC_CTL_FENCENO_MASK, (x))</div><div class='del'>-#define FBC_COMMAND		_MMIO(0x320c)</div><div class='del'>-#define   FBC_CMD_COMPRESS		REG_BIT(0)</div><div class='del'>-#define FBC_STATUS		_MMIO(0x3210)</div><div class='del'>-#define   FBC_STAT_COMPRESSING		REG_BIT(31)</div><div class='del'>-#define   FBC_STAT_COMPRESSED		REG_BIT(30)</div><div class='del'>-#define   FBC_STAT_MODIFIED		REG_BIT(29)</div><div class='del'>-#define   FBC_STAT_CURRENT_LINE_MASK	REG_GENMASK(10, 0)</div><div class='del'>-#define FBC_CONTROL2		_MMIO(0x3214) /* i965gm only */</div><div class='del'>-#define   FBC_CTL_FENCE_DBL		REG_BIT(4)</div><div class='del'>-#define   FBC_CTL_IDLE_MASK		REG_GENMASK(3, 2)</div><div class='del'>-#define   FBC_CTL_IDLE_IMM		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 0)</div><div class='del'>-#define   FBC_CTL_IDLE_FULL		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 1)</div><div class='del'>-#define   FBC_CTL_IDLE_LINE		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 2)</div><div class='del'>-#define   FBC_CTL_IDLE_DEBUG		REG_FIELD_PREP(FBC_CTL_IDLE_MASK, 3)</div><div class='del'>-#define   FBC_CTL_CPU_FENCE_EN		REG_BIT(1)</div><div class='del'>-#define   FBC_CTL_PLANE_MASK		REG_GENMASK(1, 0)</div><div class='del'>-#define   FBC_CTL_PLANE(i9xx_plane)	REG_FIELD_PREP(FBC_CTL_PLANE_MASK, (i9xx_plane))</div><div class='del'>-#define FBC_FENCE_OFF		_MMIO(0x3218)  /* i965gm only, BSpec typo has 321Bh */</div><div class='del'>-#define FBC_MOD_NUM		_MMIO(0x3220)  /* i965gm only */</div><div class='del'>-#define   FBC_MOD_NUM_MASK		REG_GENMASK(31, 1)</div><div class='del'>-#define   FBC_MOD_NUM_VALID		REG_BIT(0)</div><div class='del'>-#define FBC_TAG(i)		_MMIO(0x3300 + (i) * 4) /* 49 reisters */</div><div class='del'>-#define   FBC_TAG_MASK			REG_GENMASK(1, 0) /* 16 tags per register */</div><div class='del'>-#define   FBC_TAG_MODIFIED		REG_FIELD_PREP(FBC_TAG_MASK, 0)</div><div class='del'>-#define   FBC_TAG_UNCOMPRESSED		REG_FIELD_PREP(FBC_TAG_MASK, 1)</div><div class='del'>-#define   FBC_TAG_UNCOMPRESSIBLE	REG_FIELD_PREP(FBC_TAG_MASK, 2)</div><div class='del'>-#define   FBC_TAG_COMPRESSED		REG_FIELD_PREP(FBC_TAG_MASK, 3)</div><div class='del'>-</div><div class='del'>-#define FBC_LL_SIZE		(1536)</div><div class='del'>-</div><div class='del'>-/* Framebuffer compression for GM45+ */</div><div class='del'>-#define DPFC_CB_BASE			_MMIO(0x3200)</div><div class='del'>-#define ILK_DPFC_CB_BASE(fbc_id)	_MMIO_PIPE((fbc_id), 0x43200, 0x43240)</div><div class='del'>-#define DPFC_CONTROL			_MMIO(0x3208)</div><div class='del'>-#define ILK_DPFC_CONTROL(fbc_id)	_MMIO_PIPE((fbc_id), 0x43208, 0x43248)</div><div class='del'>-#define   DPFC_CTL_EN				REG_BIT(31)</div><div class='del'>-#define   DPFC_CTL_PLANE_MASK_G4X		REG_BIT(30) /* g4x-snb */</div><div class='del'>-#define   DPFC_CTL_PLANE_G4X(i9xx_plane)	REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_G4X, (i9xx_plane))</div><div class='del'>-#define   DPFC_CTL_FENCE_EN_G4X			REG_BIT(29) /* g4x-snb */</div><div class='del'>-#define   DPFC_CTL_PLANE_MASK_IVB		REG_GENMASK(30, 29) /* ivb only */</div><div class='del'>-#define   DPFC_CTL_PLANE_IVB(i9xx_plane)	REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_IVB, (i9xx_plane))</div><div class='del'>-#define   DPFC_CTL_FENCE_EN_IVB			REG_BIT(28) /* ivb+ */</div><div class='del'>-#define   DPFC_CTL_PERSISTENT_MODE		REG_BIT(25) /* g4x-snb */</div><div class='del'>-#define   DPFC_CTL_PLANE_BINDING_MASK		REG_GENMASK(12, 11) /* lnl+ */</div><div class='del'>-#define   DPFC_CTL_PLANE_BINDING(plane_id)	REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id))</div><div class='del'>-#define   DPFC_CTL_FALSE_COLOR			REG_BIT(10) /* ivb+ */</div><div class='del'>-#define   DPFC_CTL_SR_EN			REG_BIT(10) /* g4x only */</div><div class='del'>-#define   DPFC_CTL_SR_EXIT_DIS			REG_BIT(9) /* g4x only */</div><div class='del'>-#define   DPFC_CTL_LIMIT_MASK			REG_GENMASK(7, 6)</div><div class='del'>-#define   DPFC_CTL_LIMIT_1X			REG_FIELD_PREP(DPFC_CTL_LIMIT_MASK, 0)</div><div class='del'>-#define   DPFC_CTL_LIMIT_2X			REG_FIELD_PREP(DPFC_CTL_LIMIT_MASK, 1)</div><div class='del'>-#define   DPFC_CTL_LIMIT_4X			REG_FIELD_PREP(DPFC_CTL_LIMIT_MASK, 2)</div><div class='del'>-#define   DPFC_CTL_FENCENO_MASK			REG_GENMASK(3, 0)</div><div class='del'>-#define   DPFC_CTL_FENCENO(fence)		REG_FIELD_PREP(DPFC_CTL_FENCENO_MASK, (fence))</div><div class='del'>-#define DPFC_RECOMP_CTL			_MMIO(0x320c)</div><div class='del'>-#define ILK_DPFC_RECOMP_CTL(fbc_id)	_MMIO_PIPE((fbc_id), 0x4320c, 0x4324c)</div><div class='del'>-#define   DPFC_RECOMP_STALL_EN			REG_BIT(27)</div><div class='del'>-#define   DPFC_RECOMP_STALL_WM_MASK		REG_GENMASK(26, 16)</div><div class='del'>-#define   DPFC_RECOMP_TIMER_COUNT_MASK		REG_GENMASK(5, 0)</div><div class='del'>-#define DPFC_STATUS			_MMIO(0x3210)</div><div class='del'>-#define ILK_DPFC_STATUS(fbc_id)		_MMIO_PIPE((fbc_id), 0x43210, 0x43250)</div><div class='del'>-#define   DPFC_INVAL_SEG_MASK			REG_GENMASK(26, 16)</div><div class='del'>-#define   DPFC_COMP_SEG_MASK			REG_GENMASK(10, 0)</div><div class='del'>-#define DPFC_STATUS2			_MMIO(0x3214)</div><div class='del'>-#define ILK_DPFC_STATUS2(fbc_id)	_MMIO_PIPE((fbc_id), 0x43214, 0x43254)</div><div class='del'>-#define   DPFC_COMP_SEG_MASK_IVB		REG_GENMASK(11, 0)</div><div class='del'>-#define DPFC_FENCE_YOFF			_MMIO(0x3218)</div><div class='del'>-#define ILK_DPFC_FENCE_YOFF(fbc_id)	_MMIO_PIPE((fbc_id), 0x43218, 0x43258)</div><div class='del'>-#define DPFC_CHICKEN			_MMIO(0x3224)</div><div class='del'>-#define ILK_DPFC_CHICKEN(fbc_id)	_MMIO_PIPE((fbc_id), 0x43224, 0x43264)</div><div class='del'>-#define   DPFC_HT_MODIFY			REG_BIT(31) /* pre-ivb */</div><div class='del'>-#define   DPFC_NUKE_ON_ANY_MODIFICATION		REG_BIT(23) /* bdw+ */</div><div class='del'>-#define   DPFC_CHICKEN_COMP_DUMMY_PIXEL		REG_BIT(14) /* glk+ */</div><div class='del'>-#define   DPFC_CHICKEN_FORCE_SLB_INVALIDATION	REG_BIT(13) /* icl+ */</div><div class='del'>-#define   DPFC_DISABLE_DUMMY0			REG_BIT(8) /* ivb+ */</div><div class='del'>-</div><div class='del'>-#define GLK_FBC_STRIDE(fbc_id)	_MMIO_PIPE((fbc_id), 0x43228, 0x43268)</div><div class='del'>-#define   FBC_STRIDE_OVERRIDE	REG_BIT(15)</div><div class='del'>-#define   FBC_STRIDE_MASK	REG_GENMASK(14, 0)</div><div class='del'>-#define   FBC_STRIDE(x)		REG_FIELD_PREP(FBC_STRIDE_MASK, (x))</div><div class='del'>-</div><div class='del'>-#define ILK_FBC_RT_BASE		_MMIO(0x2128)</div><div class='del'>-#define   ILK_FBC_RT_VALID	REG_BIT(0)</div><div class='del'>-#define   SNB_FBC_FRONT_BUFFER	REG_BIT(1)</div><div class='del'>-</div><div class='ctx'> #define ILK_DISPLAY_CHICKEN1	_MMIO(0x42000)</div><div class='ctx'> #define   ILK_FBCQ_DIS			REG_BIT(22)</div><div class='ctx'> #define   ILK_PABSTRETCH_DIS		REG_BIT(21)</div><div class='hunk'>@@ -1382,37 +658,18 @@</div><div class='ctx'> #define   IVB_SPR_STRETCH_MAX_X2	REG_FIELD_PREP(IVB_SPR_STRETCH_MAX_MASK, 2)</div><div class='ctx'> #define   IVB_SPR_STRETCH_MAX_X1	REG_FIELD_PREP(IVB_SPR_STRETCH_MAX_MASK, 3)</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Framebuffer compression for Sandybridge</div><div class='del'>- *</div><div class='del'>- * The following two registers are of type GTTMMADR</div><div class='del'>- */</div><div class='del'>-#define SNB_DPFC_CTL_SA		_MMIO(0x100100)</div><div class='del'>-#define   SNB_DPFC_FENCE_EN		REG_BIT(29)</div><div class='del'>-#define   SNB_DPFC_FENCENO_MASK		REG_GENMASK(4, 0)</div><div class='del'>-#define   SNB_DPFC_FENCENO(fence)	REG_FIELD_PREP(SNB_DPFC_FENCENO_MASK, (fence))</div><div class='del'>-#define SNB_DPFC_CPU_FENCE_OFFSET	_MMIO(0x100104)</div><div class='del'>-</div><div class='del'>-/* Framebuffer compression for Ivybridge */</div><div class='del'>-#define IVB_FBC_RT_BASE			_MMIO(0x7020)</div><div class='del'>-#define IVB_FBC_RT_BASE_UPPER		_MMIO(0x7024)</div><div class='del'>-</div><div class='ctx'> #define IPS_CTL		_MMIO(0x43408)</div><div class='ctx'> #define   IPS_ENABLE		REG_BIT(31)</div><div class='ctx'> #define   IPS_FALSE_COLOR	REG_BIT(4)</div><div class='ctx'> </div><div class='del'>-#define MSG_FBC_REND_STATE(fbc_id)	_MMIO_PIPE((fbc_id), 0x50380, 0x50384)</div><div class='del'>-#define   FBC_REND_NUKE			REG_BIT(2)</div><div class='del'>-#define   FBC_REND_CACHE_CLEAN		REG_BIT(1)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Clock control &amp; power management</div><div class='ctx'>  */</div><div class='del'>-#define _DPLL_A (DISPLAY_MMIO_BASE(dev_priv) + 0x6014)</div><div class='del'>-#define _DPLL_B (DISPLAY_MMIO_BASE(dev_priv) + 0x6018)</div><div class='del'>-#define _CHV_DPLL_C (DISPLAY_MMIO_BASE(dev_priv) + 0x6030)</div><div class='del'>-#define DPLL(pipe) _MMIO_PIPE3((pipe), _DPLL_A, _DPLL_B, _CHV_DPLL_C)</div><div class='add'>+#define _DPLL_A			0x6014</div><div class='add'>+#define _DPLL_B			0x6018</div><div class='add'>+#define _CHV_DPLL_C		0x6030</div><div class='add'>+#define DPLL(pipe)		_MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \</div><div class='add'>+						 (pipe), _DPLL_A, _DPLL_B, _CHV_DPLL_C)</div><div class='ctx'> </div><div class='ctx'> #define VGA0	_MMIO(0x6000)</div><div class='ctx'> #define VGA1	_MMIO(0x6004)</div><div class='hunk'>@@ -1508,10 +765,11 @@</div><div class='ctx'> #define   SDVO_MULTIPLIER_SHIFT_HIRES		4</div><div class='ctx'> #define   SDVO_MULTIPLIER_SHIFT_VGA		0</div><div class='ctx'> </div><div class='del'>-#define _DPLL_A_MD (DISPLAY_MMIO_BASE(dev_priv) + 0x601c)</div><div class='del'>-#define _DPLL_B_MD (DISPLAY_MMIO_BASE(dev_priv) + 0x6020)</div><div class='del'>-#define _CHV_DPLL_C_MD (DISPLAY_MMIO_BASE(dev_priv) + 0x603c)</div><div class='del'>-#define DPLL_MD(pipe) _MMIO_PIPE3((pipe), _DPLL_A_MD, _DPLL_B_MD, _CHV_DPLL_C_MD)</div><div class='add'>+#define _DPLL_A_MD		0x601c</div><div class='add'>+#define _DPLL_B_MD		0x6020</div><div class='add'>+#define _CHV_DPLL_C_MD		0x603c</div><div class='add'>+#define DPLL_MD(pipe)		_MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \</div><div class='add'>+						 (pipe), _DPLL_A_MD, _DPLL_B_MD, _CHV_DPLL_C_MD)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * UDI pixel divider, controlling how many pixels are stuffed into a packet.</div><div class='hunk'>@@ -1716,42 +974,10 @@</div><div class='ctx'> </div><div class='ctx'> #define GMBUSFREQ_VLV		_MMIO(VLV_DISPLAY_BASE + 0x6510)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Palette regs</div><div class='del'>- */</div><div class='del'>-#define _PALETTE_A		0xa000</div><div class='del'>-#define _PALETTE_B		0xa800</div><div class='del'>-#define _CHV_PALETTE_C		0xc000</div><div class='del'>-/* 8bit mode / i965+ 10.6 interpolated mode ldw/udw */</div><div class='del'>-#define   PALETTE_RED_MASK		REG_GENMASK(23, 16)</div><div class='del'>-#define   PALETTE_GREEN_MASK		REG_GENMASK(15, 8)</div><div class='del'>-#define   PALETTE_BLUE_MASK		REG_GENMASK(7, 0)</div><div class='del'>-/* pre-i965 10bit interpolated mode ldw */</div><div class='del'>-#define   PALETTE_10BIT_RED_LDW_MASK	REG_GENMASK(23, 16)</div><div class='del'>-#define   PALETTE_10BIT_GREEN_LDW_MASK	REG_GENMASK(15, 8)</div><div class='del'>-#define   PALETTE_10BIT_BLUE_LDW_MASK	REG_GENMASK(7, 0)</div><div class='del'>-/* pre-i965 10bit interpolated mode udw */</div><div class='del'>-#define   PALETTE_10BIT_RED_EXP_MASK	REG_GENMASK(23, 22)</div><div class='del'>-#define   PALETTE_10BIT_RED_MANT_MASK	REG_GENMASK(21, 18)</div><div class='del'>-#define   PALETTE_10BIT_RED_UDW_MASK	REG_GENMASK(17, 16)</div><div class='del'>-#define   PALETTE_10BIT_GREEN_EXP_MASK	REG_GENMASK(15, 14)</div><div class='del'>-#define   PALETTE_10BIT_GREEN_MANT_MASK	REG_GENMASK(13, 10)</div><div class='del'>-#define   PALETTE_10BIT_GREEN_UDW_MASK	REG_GENMASK(9, 8)</div><div class='del'>-#define   PALETTE_10BIT_BLUE_EXP_MASK	REG_GENMASK(7, 6)</div><div class='del'>-#define   PALETTE_10BIT_BLUE_MANT_MASK	REG_GENMASK(5, 2)</div><div class='del'>-#define   PALETTE_10BIT_BLUE_UDW_MASK	REG_GENMASK(1, 0)</div><div class='del'>-#define PALETTE(pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) +			\</div><div class='del'>-			       _PICK_EVEN_2RANGES(pipe, 2,			\</div><div class='del'>-						  _PALETTE_A, _PALETTE_B,	\</div><div class='del'>-						  _CHV_PALETTE_C, _CHV_PALETTE_C) + \</div><div class='del'>-						  (i) * 4)</div><div class='del'>-</div><div class='ctx'> #define PEG_BAND_GAP_DATA	_MMIO(0x14d68)</div><div class='ctx'> </div><div class='ctx'> #define BXT_RP_STATE_CAP        _MMIO(0x138170)</div><div class='ctx'> #define GEN9_RP_STATE_LIMITS	_MMIO(0x138148)</div><div class='del'>-#define XEHPSDV_RP_STATE_CAP	_MMIO(0x250014)</div><div class='del'>-#define PVC_RP_STATE_CAP	_MMIO(0x281014)</div><div class='ctx'> </div><div class='ctx'> #define MTL_RP_STATE_CAP	_MMIO(0x138000)</div><div class='ctx'> #define MTL_MEDIAP_STATE_CAP	_MMIO(0x138020)</div><div class='hunk'>@@ -1911,18 +1137,18 @@</div><div class='ctx'> #define _PIPE_CRC_RES_4_B_IVB		0x61070</div><div class='ctx'> #define _PIPE_CRC_RES_5_B_IVB		0x61074</div><div class='ctx'> </div><div class='del'>-#define PIPE_CRC_CTL(pipe)		_MMIO_TRANS2(pipe, _PIPE_CRC_CTL_A)</div><div class='del'>-#define PIPE_CRC_RES_1_IVB(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_1_A_IVB)</div><div class='del'>-#define PIPE_CRC_RES_2_IVB(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_2_A_IVB)</div><div class='del'>-#define PIPE_CRC_RES_3_IVB(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_3_A_IVB)</div><div class='del'>-#define PIPE_CRC_RES_4_IVB(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_4_A_IVB)</div><div class='del'>-#define PIPE_CRC_RES_5_IVB(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_5_A_IVB)</div><div class='add'>+#define PIPE_CRC_CTL(pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_CTL_A)</div><div class='add'>+#define PIPE_CRC_RES_1_IVB(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_1_A_IVB)</div><div class='add'>+#define PIPE_CRC_RES_2_IVB(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_2_A_IVB)</div><div class='add'>+#define PIPE_CRC_RES_3_IVB(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_3_A_IVB)</div><div class='add'>+#define PIPE_CRC_RES_4_IVB(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_4_A_IVB)</div><div class='add'>+#define PIPE_CRC_RES_5_IVB(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_5_A_IVB)</div><div class='ctx'> </div><div class='del'>-#define PIPE_CRC_RES_RED(pipe)		_MMIO_TRANS2(pipe, _PIPE_CRC_RES_RED_A)</div><div class='del'>-#define PIPE_CRC_RES_GREEN(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_GREEN_A)</div><div class='del'>-#define PIPE_CRC_RES_BLUE(pipe)		_MMIO_TRANS2(pipe, _PIPE_CRC_RES_BLUE_A)</div><div class='del'>-#define PIPE_CRC_RES_RES1_I915(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_RES1_A_I915)</div><div class='del'>-#define PIPE_CRC_RES_RES2_G4X(pipe)	_MMIO_TRANS2(pipe, _PIPE_CRC_RES_RES2_A_G4X)</div><div class='add'>+#define PIPE_CRC_RES_RED(pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RED_A)</div><div class='add'>+#define PIPE_CRC_RES_GREEN(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_GREEN_A)</div><div class='add'>+#define PIPE_CRC_RES_BLUE(pipe)		_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_BLUE_A)</div><div class='add'>+#define PIPE_CRC_RES_RES1_I915(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES1_A_I915)</div><div class='add'>+#define PIPE_CRC_RES_RES2_G4X(pipe)	_MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES2_A_G4X)</div><div class='ctx'> </div><div class='ctx'> /* Pipe/transcoder A timing regs */</div><div class='ctx'> #define _TRANS_HTOTAL_A		0x60000</div><div class='hunk'>@@ -1991,23 +1217,23 @@</div><div class='ctx'> #define _TRANS_VSYNC_DSI1	0x6b814</div><div class='ctx'> #define _TRANS_VSYNCSHIFT_DSI1	0x6b828</div><div class='ctx'> </div><div class='del'>-#define TRANS_HTOTAL(trans)	_MMIO_TRANS2((trans), _TRANS_HTOTAL_A)</div><div class='del'>-#define TRANS_HBLANK(trans)	_MMIO_TRANS2((trans), _TRANS_HBLANK_A)</div><div class='del'>-#define TRANS_HSYNC(trans)	_MMIO_TRANS2((trans), _TRANS_HSYNC_A)</div><div class='del'>-#define TRANS_VTOTAL(trans)	_MMIO_TRANS2((trans), _TRANS_VTOTAL_A)</div><div class='del'>-#define TRANS_VBLANK(trans)	_MMIO_TRANS2((trans), _TRANS_VBLANK_A)</div><div class='del'>-#define TRANS_VSYNC(trans)	_MMIO_TRANS2((trans), _TRANS_VSYNC_A)</div><div class='del'>-#define BCLRPAT(trans)		_MMIO_TRANS2((trans), _BCLRPAT_A)</div><div class='del'>-#define TRANS_VSYNCSHIFT(trans)	_MMIO_TRANS2((trans), _TRANS_VSYNCSHIFT_A)</div><div class='del'>-#define PIPESRC(pipe)		_MMIO_TRANS2((pipe), _PIPEASRC)</div><div class='del'>-#define TRANS_MULT(trans)	_MMIO_TRANS2((trans), _TRANS_MULT_A)</div><div class='add'>+#define TRANS_HTOTAL(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_HTOTAL_A)</div><div class='add'>+#define TRANS_HBLANK(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_HBLANK_A)</div><div class='add'>+#define TRANS_HSYNC(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_HSYNC_A)</div><div class='add'>+#define TRANS_VTOTAL(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_VTOTAL_A)</div><div class='add'>+#define TRANS_VBLANK(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_VBLANK_A)</div><div class='add'>+#define TRANS_VSYNC(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNC_A)</div><div class='add'>+#define BCLRPAT(trans)		_MMIO_TRANS2(dev_priv, (trans), _BCLRPAT_A)</div><div class='add'>+#define TRANS_VSYNCSHIFT(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNCSHIFT_A)</div><div class='add'>+#define PIPESRC(pipe)		_MMIO_TRANS2(dev_priv, (pipe), _PIPEASRC)</div><div class='add'>+#define TRANS_MULT(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_MULT_A)</div><div class='ctx'> </div><div class='ctx'> /* VRR registers */</div><div class='ctx'> #define _TRANS_VRR_CTL_A		0x60420</div><div class='ctx'> #define _TRANS_VRR_CTL_B		0x61420</div><div class='ctx'> #define _TRANS_VRR_CTL_C		0x62420</div><div class='ctx'> #define _TRANS_VRR_CTL_D		0x63420</div><div class='del'>-#define TRANS_VRR_CTL(trans)			_MMIO_TRANS2(trans, _TRANS_VRR_CTL_A)</div><div class='add'>+#define TRANS_VRR_CTL(trans)			_MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_CTL_A)</div><div class='ctx'> #define   VRR_CTL_VRR_ENABLE			REG_BIT(31)</div><div class='ctx'> #define   VRR_CTL_IGN_MAX_SHIFT			REG_BIT(30)</div><div class='ctx'> #define   VRR_CTL_FLIP_LINE_EN			REG_BIT(29)</div><div class='hunk'>@@ -2021,21 +1247,21 @@</div><div class='ctx'> #define _TRANS_VRR_VMAX_B		0x61424</div><div class='ctx'> #define _TRANS_VRR_VMAX_C		0x62424</div><div class='ctx'> #define _TRANS_VRR_VMAX_D		0x63424</div><div class='del'>-#define TRANS_VRR_VMAX(trans)		_MMIO_TRANS2(trans, _TRANS_VRR_VMAX_A)</div><div class='add'>+#define TRANS_VRR_VMAX(trans)		_MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMAX_A)</div><div class='ctx'> #define   VRR_VMAX_MASK			REG_GENMASK(19, 0)</div><div class='ctx'> </div><div class='ctx'> #define _TRANS_VRR_VMIN_A		0x60434</div><div class='ctx'> #define _TRANS_VRR_VMIN_B		0x61434</div><div class='ctx'> #define _TRANS_VRR_VMIN_C		0x62434</div><div class='ctx'> #define _TRANS_VRR_VMIN_D		0x63434</div><div class='del'>-#define TRANS_VRR_VMIN(trans)		_MMIO_TRANS2(trans, _TRANS_VRR_VMIN_A)</div><div class='add'>+#define TRANS_VRR_VMIN(trans)		_MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMIN_A)</div><div class='ctx'> #define   VRR_VMIN_MASK			REG_GENMASK(15, 0)</div><div class='ctx'> </div><div class='ctx'> #define _TRANS_VRR_VMAXSHIFT_A		0x60428</div><div class='ctx'> #define _TRANS_VRR_VMAXSHIFT_B		0x61428</div><div class='ctx'> #define _TRANS_VRR_VMAXSHIFT_C		0x62428</div><div class='ctx'> #define _TRANS_VRR_VMAXSHIFT_D		0x63428</div><div class='del'>-#define TRANS_VRR_VMAXSHIFT(trans)	_MMIO_TRANS2(trans, \</div><div class='add'>+#define TRANS_VRR_VMAXSHIFT(trans)	_MMIO_TRANS2(dev_priv, trans, \</div><div class='ctx'> 					_TRANS_VRR_VMAXSHIFT_A)</div><div class='ctx'> #define   VRR_VMAXSHIFT_DEC_MASK	REG_GENMASK(29, 16)</div><div class='ctx'> #define   VRR_VMAXSHIFT_DEC		REG_BIT(16)</div><div class='hunk'>@@ -2045,7 +1271,7 @@</div><div class='ctx'> #define _TRANS_VRR_STATUS_B		0x6142C</div><div class='ctx'> #define _TRANS_VRR_STATUS_C		0x6242C</div><div class='ctx'> #define _TRANS_VRR_STATUS_D		0x6342C</div><div class='del'>-#define TRANS_VRR_STATUS(trans)		_MMIO_TRANS2(trans, _TRANS_VRR_STATUS_A)</div><div class='add'>+#define TRANS_VRR_STATUS(trans)		_MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_STATUS_A)</div><div class='ctx'> #define   VRR_STATUS_VMAX_REACHED	REG_BIT(31)</div><div class='ctx'> #define   VRR_STATUS_NOFLIP_TILL_BNDR	REG_BIT(30)</div><div class='ctx'> #define   VRR_STATUS_FLIP_BEF_BNDR	REG_BIT(29)</div><div class='hunk'>@@ -2065,7 +1291,7 @@</div><div class='ctx'> #define _TRANS_VRR_VTOTAL_PREV_B	0x61480</div><div class='ctx'> #define _TRANS_VRR_VTOTAL_PREV_C	0x62480</div><div class='ctx'> #define _TRANS_VRR_VTOTAL_PREV_D	0x63480</div><div class='del'>-#define TRANS_VRR_VTOTAL_PREV(trans)	_MMIO_TRANS2(trans, \</div><div class='add'>+#define TRANS_VRR_VTOTAL_PREV(trans)	_MMIO_TRANS2(dev_priv, trans, \</div><div class='ctx'> 					_TRANS_VRR_VTOTAL_PREV_A)</div><div class='ctx'> #define   VRR_VTOTAL_FLIP_BEFR_BNDR	REG_BIT(31)</div><div class='ctx'> #define   VRR_VTOTAL_FLIP_AFTER_BNDR	REG_BIT(30)</div><div class='hunk'>@@ -2076,7 +1302,7 @@</div><div class='ctx'> #define _TRANS_VRR_FLIPLINE_B		0x61438</div><div class='ctx'> #define _TRANS_VRR_FLIPLINE_C		0x62438</div><div class='ctx'> #define _TRANS_VRR_FLIPLINE_D		0x63438</div><div class='del'>-#define TRANS_VRR_FLIPLINE(trans)	_MMIO_TRANS2(trans, \</div><div class='add'>+#define TRANS_VRR_FLIPLINE(trans)	_MMIO_TRANS2(dev_priv, trans, \</div><div class='ctx'> 					_TRANS_VRR_FLIPLINE_A)</div><div class='ctx'> #define   VRR_FLIPLINE_MASK		REG_GENMASK(19, 0)</div><div class='ctx'> </div><div class='hunk'>@@ -2084,17 +1310,24 @@</div><div class='ctx'> #define _TRANS_VRR_STATUS2_B		0x6143C</div><div class='ctx'> #define _TRANS_VRR_STATUS2_C		0x6243C</div><div class='ctx'> #define _TRANS_VRR_STATUS2_D		0x6343C</div><div class='del'>-#define TRANS_VRR_STATUS2(trans)	_MMIO_TRANS2(trans, _TRANS_VRR_STATUS2_A)</div><div class='add'>+#define TRANS_VRR_STATUS2(trans)	_MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_STATUS2_A)</div><div class='ctx'> #define   VRR_STATUS2_VERT_LN_CNT_MASK	REG_GENMASK(19, 0)</div><div class='ctx'> </div><div class='ctx'> #define _TRANS_PUSH_A			0x60A70</div><div class='ctx'> #define _TRANS_PUSH_B			0x61A70</div><div class='ctx'> #define _TRANS_PUSH_C			0x62A70</div><div class='ctx'> #define _TRANS_PUSH_D			0x63A70</div><div class='del'>-#define TRANS_PUSH(trans)		_MMIO_TRANS2(trans, _TRANS_PUSH_A)</div><div class='add'>+#define TRANS_PUSH(trans)		_MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A)</div><div class='ctx'> #define   TRANS_PUSH_EN			REG_BIT(31)</div><div class='ctx'> #define   TRANS_PUSH_SEND		REG_BIT(30)</div><div class='ctx'> </div><div class='add'>+#define _TRANS_VRR_VSYNC_A		0x60078</div><div class='add'>+#define TRANS_VRR_VSYNC(trans)		_MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A)</div><div class='add'>+#define VRR_VSYNC_END_MASK		REG_GENMASK(28, 16)</div><div class='add'>+#define VRR_VSYNC_END(vsync_end)	REG_FIELD_PREP(VRR_VSYNC_END_MASK, (vsync_end))</div><div class='add'>+#define VRR_VSYNC_START_MASK		REG_GENMASK(12, 0)</div><div class='add'>+#define VRR_VSYNC_START(vsync_start)	REG_FIELD_PREP(VRR_VSYNC_START_MASK, (vsync_start))</div><div class='add'>+</div><div class='ctx'> /* VGA port control */</div><div class='ctx'> #define ADPA			_MMIO(0x61100)</div><div class='ctx'> #define PCH_ADPA                _MMIO(0xe1100)</div><div class='hunk'>@@ -2312,6 +1545,7 @@</div><div class='ctx'>  * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte</div><div class='ctx'>  * of the infoframe structure specified by CEA-861. */</div><div class='ctx'> #define   VIDEO_DIP_DATA_SIZE	32</div><div class='add'>+#define   VIDEO_DIP_ASYNC_DATA_SIZE	36</div><div class='ctx'> #define   VIDEO_DIP_GMP_DATA_SIZE	36</div><div class='ctx'> #define   VIDEO_DIP_VSC_DATA_SIZE	36</div><div class='ctx'> #define   VIDEO_DIP_PPS_DATA_SIZE	132</div><div class='hunk'>@@ -2350,6 +1584,8 @@</div><div class='ctx'> #define   VIDEO_DIP_ENABLE_VS_HSW	(1 &lt;&lt; 8)</div><div class='ctx'> #define   VIDEO_DIP_ENABLE_GMP_HSW	(1 &lt;&lt; 4)</div><div class='ctx'> #define   VIDEO_DIP_ENABLE_SPD_HSW	(1 &lt;&lt; 0)</div><div class='add'>+/* ADL and later: */</div><div class='add'>+#define   VIDEO_DIP_ENABLE_AS_ADL	REG_BIT(23)</div><div class='ctx'> </div><div class='ctx'> /* Panel fitting */</div><div class='ctx'> #define PFIT_CONTROL	_MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61230)</div><div class='hunk'>@@ -2588,6 +1824,9 @@</div><div class='ctx'> #define   TRANSCONF_DITHER_TYPE_ST1		REG_FIELD_PREP(TRANSCONF_DITHER_TYPE_MASK, 1)</div><div class='ctx'> #define   TRANSCONF_DITHER_TYPE_ST2		REG_FIELD_PREP(TRANSCONF_DITHER_TYPE_MASK, 2)</div><div class='ctx'> #define   TRANSCONF_DITHER_TYPE_TEMP		REG_FIELD_PREP(TRANSCONF_DITHER_TYPE_MASK, 3)</div><div class='add'>+#define   TRANSCONF_PIXEL_COUNT_SCALING_MASK	REG_GENMASK(1, 0)</div><div class='add'>+#define   TRANSCONF_PIXEL_COUNT_SCALING_X4	1</div><div class='add'>+</div><div class='ctx'> #define _PIPEASTAT		0x70024</div><div class='ctx'> #define   PIPE_FIFO_UNDERRUN_STATUS		(1UL &lt;&lt; 31)</div><div class='ctx'> #define   SPRITE1_FLIP_DONE_INT_EN_VLV		(1UL &lt;&lt; 30)</div><div class='hunk'>@@ -2639,18 +1878,18 @@</div><div class='ctx'> #define PIPESTAT_INT_ENABLE_MASK		0x7fff0000</div><div class='ctx'> #define PIPESTAT_INT_STATUS_MASK		0x0000ffff</div><div class='ctx'> </div><div class='del'>-#define TRANSCONF(trans)	_MMIO_PIPE2((trans), _TRANSACONF)</div><div class='del'>-#define PIPEDSL(pipe)		_MMIO_PIPE2(pipe, _PIPEADSL)</div><div class='del'>-#define PIPEFRAME(pipe)		_MMIO_PIPE2(pipe, _PIPEAFRAMEHIGH)</div><div class='del'>-#define PIPEFRAMEPIXEL(pipe)	_MMIO_PIPE2(pipe, _PIPEAFRAMEPIXEL)</div><div class='del'>-#define PIPESTAT(pipe)		_MMIO_PIPE2(pipe, _PIPEASTAT)</div><div class='add'>+#define TRANSCONF(trans)	_MMIO_PIPE2(dev_priv, (trans), _TRANSACONF)</div><div class='add'>+#define PIPEDSL(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEADSL)</div><div class='add'>+#define PIPEFRAME(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEHIGH)</div><div class='add'>+#define PIPEFRAMEPIXEL(pipe)	_MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEPIXEL)</div><div class='add'>+#define PIPESTAT(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEASTAT)</div><div class='ctx'> </div><div class='ctx'> #define  _PIPEAGCMAX           0x70010</div><div class='ctx'> #define  _PIPEBGCMAX           0x71010</div><div class='del'>-#define PIPEGCMAX(pipe, i)     _MMIO_PIPE2(pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */</div><div class='add'>+#define PIPEGCMAX(pipe, i)     _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */</div><div class='ctx'> </div><div class='ctx'> #define _PIPE_ARB_CTL_A			0x70028 /* icl+ */</div><div class='del'>-#define PIPE_ARB_CTL(pipe)		_MMIO_PIPE2(pipe, _PIPE_ARB_CTL_A)</div><div class='add'>+#define PIPE_ARB_CTL(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPE_ARB_CTL_A)</div><div class='ctx'> #define   PIPE_ARB_USE_PROG_SLOTS	REG_BIT(13)</div><div class='ctx'> </div><div class='ctx'> #define _PIPE_MISC_A			0x70030</div><div class='hunk'>@@ -2694,7 +1933,7 @@</div><div class='ctx'> #define PIPE_MISC2(pipe)		_MMIO_PIPE(pipe, _PIPE_MISC2_A, _PIPE_MISC2_B)</div><div class='ctx'> </div><div class='ctx'> #define _ICL_PIPE_A_STATUS			0x70058</div><div class='del'>-#define ICL_PIPESTATUS(pipe)			_MMIO_PIPE2(pipe, _ICL_PIPE_A_STATUS)</div><div class='add'>+#define ICL_PIPESTATUS(pipe)			_MMIO_PIPE2(dev_priv, pipe, _ICL_PIPE_A_STATUS)</div><div class='ctx'> #define   PIPE_STATUS_UNDERRUN				REG_BIT(31)</div><div class='ctx'> #define   PIPE_STATUS_SOFT_UNDERRUN_XELPD		REG_BIT(28)</div><div class='ctx'> #define   PIPE_STATUS_HARD_UNDERRUN_XELPD		REG_BIT(27)</div><div class='hunk'>@@ -2969,8 +2208,8 @@</div><div class='ctx'> #define _WM0_PIPEA_ILK		0x45100</div><div class='ctx'> #define _WM0_PIPEB_ILK		0x45104</div><div class='ctx'> #define _WM0_PIPEC_IVB		0x45200</div><div class='del'>-#define WM0_PIPE_ILK(pipe)	_MMIO_PIPE3((pipe), _WM0_PIPEA_ILK, \</div><div class='del'>-					    _WM0_PIPEB_ILK, _WM0_PIPEC_IVB)</div><div class='add'>+#define WM0_PIPE_ILK(pipe)	_MMIO_BASE_PIPE3(0, (pipe), _WM0_PIPEA_ILK, \</div><div class='add'>+						 _WM0_PIPEB_ILK, _WM0_PIPEC_IVB)</div><div class='ctx'> #define  WM0_PIPE_PRIMARY_MASK	REG_GENMASK(31, 16)</div><div class='ctx'> #define  WM0_PIPE_SPRITE_MASK	REG_GENMASK(15, 8)</div><div class='ctx'> #define  WM0_PIPE_CURSOR_MASK	REG_GENMASK(7, 0)</div><div class='hunk'>@@ -3024,8 +2263,8 @@</div><div class='ctx'> /* GM45+ just has to be different */</div><div class='ctx'> #define _PIPEA_FRMCOUNT_G4X	0x70040</div><div class='ctx'> #define _PIPEA_FLIPCOUNT_G4X	0x70044</div><div class='del'>-#define PIPE_FRMCOUNT_G4X(pipe) _MMIO_PIPE2(pipe, _PIPEA_FRMCOUNT_G4X)</div><div class='del'>-#define PIPE_FLIPCOUNT_G4X(pipe) _MMIO_PIPE2(pipe, _PIPEA_FLIPCOUNT_G4X)</div><div class='add'>+#define PIPE_FRMCOUNT_G4X(pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FRMCOUNT_G4X)</div><div class='add'>+#define PIPE_FLIPCOUNT_G4X(pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FLIPCOUNT_G4X)</div><div class='ctx'> </div><div class='ctx'> /* Cursor A &amp; B regs */</div><div class='ctx'> #define _CURACNTR		0x70080</div><div class='hunk'>@@ -3053,6 +2292,7 @@</div><div class='ctx'> #define   MCURSOR_MODE_DISABLE		0x00</div><div class='ctx'> #define   MCURSOR_MODE_128_32B_AX	0x02</div><div class='ctx'> #define   MCURSOR_MODE_256_32B_AX	0x03</div><div class='add'>+#define   MCURSOR_MODE_64_2B		0x04</div><div class='ctx'> #define   MCURSOR_MODE_64_32B_AX	0x07</div><div class='ctx'> #define   MCURSOR_MODE_128_ARGB_AX	(0x20 | MCURSOR_MODE_128_32B_AX)</div><div class='ctx'> #define   MCURSOR_MODE_256_ARGB_AX	(0x20 | MCURSOR_MODE_256_32B_AX)</div><div class='hunk'>@@ -3085,14 +2325,14 @@</div><div class='ctx'> #define _CURBBASE_IVB		0x71084</div><div class='ctx'> #define _CURBPOS_IVB		0x71088</div><div class='ctx'> </div><div class='del'>-#define CURCNTR(pipe) _MMIO_CURSOR2(pipe, _CURACNTR)</div><div class='del'>-#define CURBASE(pipe) _MMIO_CURSOR2(pipe, _CURABASE)</div><div class='del'>-#define CURPOS(pipe) _MMIO_CURSOR2(pipe, _CURAPOS)</div><div class='del'>-#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(pipe, _CURAPOS_ERLY_TPT)</div><div class='del'>-#define CURSIZE(pipe) _MMIO_CURSOR2(pipe, _CURASIZE)</div><div class='del'>-#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(pipe, _CUR_FBC_CTL_A)</div><div class='del'>-#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(pipe, _CUR_CHICKEN_A)</div><div class='del'>-#define CURSURFLIVE(pipe) _MMIO_CURSOR2(pipe, _CURASURFLIVE)</div><div class='add'>+#define CURCNTR(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)</div><div class='add'>+#define CURBASE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)</div><div class='add'>+#define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)</div><div class='add'>+#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)</div><div class='add'>+#define CURSIZE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)</div><div class='add'>+#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)</div><div class='add'>+#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A)</div><div class='add'>+#define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE)</div><div class='ctx'> </div><div class='ctx'> /* Display A control */</div><div class='ctx'> #define _DSPAADDR_VLV				0x7017C /* vlv/chv */</div><div class='hunk'>@@ -3149,18 +2389,18 @@</div><div class='ctx'> #define _DSPASURFLIVE				0x701AC</div><div class='ctx'> #define _DSPAGAMC				0x701E0</div><div class='ctx'> </div><div class='del'>-#define DSPADDR_VLV(plane)	_MMIO_PIPE2(plane, _DSPAADDR_VLV)</div><div class='del'>-#define DSPCNTR(plane)		_MMIO_PIPE2(plane, _DSPACNTR)</div><div class='del'>-#define DSPADDR(plane)		_MMIO_PIPE2(plane, _DSPAADDR)</div><div class='del'>-#define DSPSTRIDE(plane)	_MMIO_PIPE2(plane, _DSPASTRIDE)</div><div class='del'>-#define DSPPOS(plane)		_MMIO_PIPE2(plane, _DSPAPOS)</div><div class='del'>-#define DSPSIZE(plane)		_MMIO_PIPE2(plane, _DSPASIZE)</div><div class='del'>-#define DSPSURF(plane)		_MMIO_PIPE2(plane, _DSPASURF)</div><div class='del'>-#define DSPTILEOFF(plane)	_MMIO_PIPE2(plane, _DSPATILEOFF)</div><div class='add'>+#define DSPADDR_VLV(plane)	_MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV)</div><div class='add'>+#define DSPCNTR(plane)		_MMIO_PIPE2(dev_priv, plane, _DSPACNTR)</div><div class='add'>+#define DSPADDR(plane)		_MMIO_PIPE2(dev_priv, plane, _DSPAADDR)</div><div class='add'>+#define DSPSTRIDE(plane)	_MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE)</div><div class='add'>+#define DSPPOS(plane)		_MMIO_PIPE2(dev_priv, plane, _DSPAPOS)</div><div class='add'>+#define DSPSIZE(plane)		_MMIO_PIPE2(dev_priv, plane, _DSPASIZE)</div><div class='add'>+#define DSPSURF(plane)		_MMIO_PIPE2(dev_priv, plane, _DSPASURF)</div><div class='add'>+#define DSPTILEOFF(plane)	_MMIO_PIPE2(dev_priv, plane, _DSPATILEOFF)</div><div class='ctx'> #define DSPLINOFF(plane)	DSPADDR(plane)</div><div class='del'>-#define DSPOFFSET(plane)	_MMIO_PIPE2(plane, _DSPAOFFSET)</div><div class='del'>-#define DSPSURFLIVE(plane)	_MMIO_PIPE2(plane, _DSPASURFLIVE)</div><div class='del'>-#define DSPGAMC(plane, i)	_MMIO_PIPE2(plane, _DSPAGAMC + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */</div><div class='add'>+#define DSPOFFSET(plane)	_MMIO_PIPE2(dev_priv, plane, _DSPAOFFSET)</div><div class='add'>+#define DSPSURFLIVE(plane)	_MMIO_PIPE2(dev_priv, plane, _DSPASURFLIVE)</div><div class='add'>+#define DSPGAMC(plane, i)	_MMIO_PIPE2(dev_priv, plane, _DSPAGAMC + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */</div><div class='ctx'> </div><div class='ctx'> /* CHV pipe B blender and primary plane */</div><div class='ctx'> #define _CHV_BLEND_A		0x60a00</div><div class='hunk'>@@ -3187,11 +2427,11 @@</div><div class='ctx'> #define   PRIM_CONST_ALPHA_MASK		REG_GENMASK(7, 0)</div><div class='ctx'> #define   PRIM_CONST_ALPHA(alpha)	REG_FIELD_PREP(PRIM_CONST_ALPHA_MASK, (alpha))</div><div class='ctx'> </div><div class='del'>-#define CHV_BLEND(pipe)		_MMIO_TRANS2(pipe, _CHV_BLEND_A)</div><div class='del'>-#define CHV_CANVAS(pipe)	_MMIO_TRANS2(pipe, _CHV_CANVAS_A)</div><div class='del'>-#define PRIMPOS(plane)		_MMIO_TRANS2(plane, _PRIMPOS_A)</div><div class='del'>-#define PRIMSIZE(plane)		_MMIO_TRANS2(plane, _PRIMSIZE_A)</div><div class='del'>-#define PRIMCNSTALPHA(plane)	_MMIO_TRANS2(plane, _PRIMCNSTALPHA_A)</div><div class='add'>+#define CHV_BLEND(pipe)		_MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A)</div><div class='add'>+#define CHV_CANVAS(pipe)	_MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A)</div><div class='add'>+#define PRIMPOS(plane)		_MMIO_TRANS2(dev_priv, plane, _PRIMPOS_A)</div><div class='add'>+#define PRIMSIZE(plane)		_MMIO_TRANS2(dev_priv, plane, _PRIMSIZE_A)</div><div class='add'>+#define PRIMCNSTALPHA(plane)	_MMIO_TRANS2(dev_priv, plane, _PRIMCNSTALPHA_A)</div><div class='ctx'> </div><div class='ctx'> /* Display/Sprite base address macros */</div><div class='ctx'> #define DISP_BASEADDR_MASK	(0xfffff000)</div><div class='hunk'>@@ -3241,346 +2481,6 @@</div><div class='ctx'> #define _PIPEDSI0CONF		0x7b008</div><div class='ctx'> #define _PIPEDSI1CONF		0x7b808</div><div class='ctx'> </div><div class='del'>-/* Sprite A control */</div><div class='del'>-#define _DVSACNTR		0x72180</div><div class='del'>-#define   DVS_ENABLE			REG_BIT(31)</div><div class='del'>-#define   DVS_PIPE_GAMMA_ENABLE		REG_BIT(30)</div><div class='del'>-#define   DVS_YUV_RANGE_CORRECTION_DISABLE	REG_BIT(27)</div><div class='del'>-#define   DVS_FORMAT_MASK		REG_GENMASK(26, 25)</div><div class='del'>-#define   DVS_FORMAT_YUV422		REG_FIELD_PREP(DVS_FORMAT_MASK, 0)</div><div class='del'>-#define   DVS_FORMAT_RGBX101010		REG_FIELD_PREP(DVS_FORMAT_MASK, 1)</div><div class='del'>-#define   DVS_FORMAT_RGBX888		REG_FIELD_PREP(DVS_FORMAT_MASK, 2)</div><div class='del'>-#define   DVS_FORMAT_RGBX161616		REG_FIELD_PREP(DVS_FORMAT_MASK, 3)</div><div class='del'>-#define   DVS_PIPE_CSC_ENABLE		REG_BIT(24)</div><div class='del'>-#define   DVS_SOURCE_KEY		REG_BIT(22)</div><div class='del'>-#define   DVS_RGB_ORDER_XBGR		REG_BIT(20)</div><div class='del'>-#define   DVS_YUV_FORMAT_BT709		REG_BIT(18)</div><div class='del'>-#define   DVS_YUV_ORDER_MASK		REG_GENMASK(17, 16)</div><div class='del'>-#define   DVS_YUV_ORDER_YUYV		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 0)</div><div class='del'>-#define   DVS_YUV_ORDER_UYVY		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 1)</div><div class='del'>-#define   DVS_YUV_ORDER_YVYU		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 2)</div><div class='del'>-#define   DVS_YUV_ORDER_VYUY		REG_FIELD_PREP(DVS_YUV_ORDER_MASK, 3)</div><div class='del'>-#define   DVS_ROTATE_180		REG_BIT(15)</div><div class='del'>-#define   DVS_TRICKLE_FEED_DISABLE	REG_BIT(14)</div><div class='del'>-#define   DVS_TILED			REG_BIT(10)</div><div class='del'>-#define   DVS_DEST_KEY			REG_BIT(2)</div><div class='del'>-#define _DVSALINOFF		0x72184</div><div class='del'>-#define _DVSASTRIDE		0x72188</div><div class='del'>-#define _DVSAPOS		0x7218c</div><div class='del'>-#define   DVS_POS_Y_MASK		REG_GENMASK(31, 16)</div><div class='del'>-#define   DVS_POS_Y(y)			REG_FIELD_PREP(DVS_POS_Y_MASK, (y))</div><div class='del'>-#define   DVS_POS_X_MASK		REG_GENMASK(15, 0)</div><div class='del'>-#define   DVS_POS_X(x)			REG_FIELD_PREP(DVS_POS_X_MASK, (x))</div><div class='del'>-#define _DVSASIZE		0x72190</div><div class='del'>-#define   DVS_HEIGHT_MASK		REG_GENMASK(31, 16)</div><div class='del'>-#define   DVS_HEIGHT(h)			REG_FIELD_PREP(DVS_HEIGHT_MASK, (h))</div><div class='del'>-#define   DVS_WIDTH_MASK		REG_GENMASK(15, 0)</div><div class='del'>-#define   DVS_WIDTH(w)			REG_FIELD_PREP(DVS_WIDTH_MASK, (w))</div><div class='del'>-#define _DVSAKEYVAL		0x72194</div><div class='del'>-#define _DVSAKEYMSK		0x72198</div><div class='del'>-#define _DVSASURF		0x7219c</div><div class='del'>-#define   DVS_ADDR_MASK			REG_GENMASK(31, 12)</div><div class='del'>-#define _DVSAKEYMAXVAL		0x721a0</div><div class='del'>-#define _DVSATILEOFF		0x721a4</div><div class='del'>-#define   DVS_OFFSET_Y_MASK		REG_GENMASK(31, 16)</div><div class='del'>-#define   DVS_OFFSET_Y(y)		REG_FIELD_PREP(DVS_OFFSET_Y_MASK, (y))</div><div class='del'>-#define   DVS_OFFSET_X_MASK		REG_GENMASK(15, 0)</div><div class='del'>-#define   DVS_OFFSET_X(x)		REG_FIELD_PREP(DVS_OFFSET_X_MASK, (x))</div><div class='del'>-#define _DVSASURFLIVE		0x721ac</div><div class='del'>-#define _DVSAGAMC_G4X		0x721e0 /* g4x */</div><div class='del'>-#define _DVSASCALE		0x72204</div><div class='del'>-#define   DVS_SCALE_ENABLE		REG_BIT(31)</div><div class='del'>-#define   DVS_FILTER_MASK		REG_GENMASK(30, 29)</div><div class='del'>-#define   DVS_FILTER_MEDIUM		REG_FIELD_PREP(DVS_FILTER_MASK, 0)</div><div class='del'>-#define   DVS_FILTER_ENHANCING		REG_FIELD_PREP(DVS_FILTER_MASK, 1)</div><div class='del'>-#define   DVS_FILTER_SOFTENING		REG_FIELD_PREP(DVS_FILTER_MASK, 2)</div><div class='del'>-#define   DVS_VERTICAL_OFFSET_HALF	REG_BIT(28) /* must be enabled below */</div><div class='del'>-#define   DVS_VERTICAL_OFFSET_ENABLE	REG_BIT(27)</div><div class='del'>-#define   DVS_SRC_WIDTH_MASK		REG_GENMASK(26, 16)</div><div class='del'>-#define   DVS_SRC_WIDTH(w)		REG_FIELD_PREP(DVS_SRC_WIDTH_MASK, (w))</div><div class='del'>-#define   DVS_SRC_HEIGHT_MASK		REG_GENMASK(10, 0)</div><div class='del'>-#define   DVS_SRC_HEIGHT(h)		REG_FIELD_PREP(DVS_SRC_HEIGHT_MASK, (h))</div><div class='del'>-#define _DVSAGAMC_ILK		0x72300 /* ilk/snb */</div><div class='del'>-#define _DVSAGAMCMAX_ILK	0x72340 /* ilk/snb */</div><div class='del'>-</div><div class='del'>-#define _DVSBCNTR		0x73180</div><div class='del'>-#define _DVSBLINOFF		0x73184</div><div class='del'>-#define _DVSBSTRIDE		0x73188</div><div class='del'>-#define _DVSBPOS		0x7318c</div><div class='del'>-#define _DVSBSIZE		0x73190</div><div class='del'>-#define _DVSBKEYVAL		0x73194</div><div class='del'>-#define _DVSBKEYMSK		0x73198</div><div class='del'>-#define _DVSBSURF		0x7319c</div><div class='del'>-#define _DVSBKEYMAXVAL		0x731a0</div><div class='del'>-#define _DVSBTILEOFF		0x731a4</div><div class='del'>-#define _DVSBSURFLIVE		0x731ac</div><div class='del'>-#define _DVSBGAMC_G4X		0x731e0 /* g4x */</div><div class='del'>-#define _DVSBSCALE		0x73204</div><div class='del'>-#define _DVSBGAMC_ILK		0x73300 /* ilk/snb */</div><div class='del'>-#define _DVSBGAMCMAX_ILK	0x73340 /* ilk/snb */</div><div class='del'>-</div><div class='del'>-#define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR)</div><div class='del'>-#define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF)</div><div class='del'>-#define DVSSTRIDE(pipe) _MMIO_PIPE(pipe, _DVSASTRIDE, _DVSBSTRIDE)</div><div class='del'>-#define DVSPOS(pipe) _MMIO_PIPE(pipe, _DVSAPOS, _DVSBPOS)</div><div class='del'>-#define DVSSURF(pipe) _MMIO_PIPE(pipe, _DVSASURF, _DVSBSURF)</div><div class='del'>-#define DVSKEYMAX(pipe) _MMIO_PIPE(pipe, _DVSAKEYMAXVAL, _DVSBKEYMAXVAL)</div><div class='del'>-#define DVSSIZE(pipe) _MMIO_PIPE(pipe, _DVSASIZE, _DVSBSIZE)</div><div class='del'>-#define DVSSCALE(pipe) _MMIO_PIPE(pipe, _DVSASCALE, _DVSBSCALE)</div><div class='del'>-#define DVSTILEOFF(pipe) _MMIO_PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)</div><div class='del'>-#define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)</div><div class='del'>-#define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)</div><div class='del'>-#define DVSSURFLIVE(pipe) _MMIO_PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)</div><div class='del'>-#define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */</div><div class='del'>-#define DVSGAMC_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_ILK, _DVSBGAMC_ILK) + (i) * 4) /* 16 x u0.10 */</div><div class='del'>-#define DVSGAMCMAX_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMCMAX_ILK, _DVSBGAMCMAX_ILK) + (i) * 4) /* 3 x u1.10 */</div><div class='del'>-</div><div class='del'>-#define _SPRA_CTL		0x70280</div><div class='del'>-#define   SPRITE_ENABLE				REG_BIT(31)</div><div class='del'>-#define   SPRITE_PIPE_GAMMA_ENABLE		REG_BIT(30)</div><div class='del'>-#define   SPRITE_YUV_RANGE_CORRECTION_DISABLE	REG_BIT(28)</div><div class='del'>-#define   SPRITE_FORMAT_MASK			REG_GENMASK(27, 25)</div><div class='del'>-#define   SPRITE_FORMAT_YUV422			REG_FIELD_PREP(SPRITE_FORMAT_MASK, 0)</div><div class='del'>-#define   SPRITE_FORMAT_RGBX101010		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 1)</div><div class='del'>-#define   SPRITE_FORMAT_RGBX888			REG_FIELD_PREP(SPRITE_FORMAT_MASK, 2)</div><div class='del'>-#define   SPRITE_FORMAT_RGBX161616		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 3)</div><div class='del'>-#define   SPRITE_FORMAT_YUV444			REG_FIELD_PREP(SPRITE_FORMAT_MASK, 4)</div><div class='del'>-#define   SPRITE_FORMAT_XR_BGR101010		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 5) /* Extended range */</div><div class='del'>-#define   SPRITE_PIPE_CSC_ENABLE		REG_BIT(24)</div><div class='del'>-#define   SPRITE_SOURCE_KEY			REG_BIT(22)</div><div class='del'>-#define   SPRITE_RGB_ORDER_RGBX			REG_BIT(20) /* only for 888 and 161616 */</div><div class='del'>-#define   SPRITE_YUV_TO_RGB_CSC_DISABLE		REG_BIT(19)</div><div class='del'>-#define   SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709	REG_BIT(18) /* 0 is BT601 */</div><div class='del'>-#define   SPRITE_YUV_ORDER_MASK			REG_GENMASK(17, 16)</div><div class='del'>-#define   SPRITE_YUV_ORDER_YUYV			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 0)</div><div class='del'>-#define   SPRITE_YUV_ORDER_UYVY			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 1)</div><div class='del'>-#define   SPRITE_YUV_ORDER_YVYU			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 2)</div><div class='del'>-#define   SPRITE_YUV_ORDER_VYUY			REG_FIELD_PREP(SPRITE_YUV_ORDER_MASK, 3)</div><div class='del'>-#define   SPRITE_ROTATE_180			REG_BIT(15)</div><div class='del'>-#define   SPRITE_TRICKLE_FEED_DISABLE		REG_BIT(14)</div><div class='del'>-#define   SPRITE_PLANE_GAMMA_DISABLE		REG_BIT(13)</div><div class='del'>-#define   SPRITE_TILED				REG_BIT(10)</div><div class='del'>-#define   SPRITE_DEST_KEY			REG_BIT(2)</div><div class='del'>-#define _SPRA_LINOFF		0x70284</div><div class='del'>-#define _SPRA_STRIDE		0x70288</div><div class='del'>-#define _SPRA_POS		0x7028c</div><div class='del'>-#define   SPRITE_POS_Y_MASK	REG_GENMASK(31, 16)</div><div class='del'>-#define   SPRITE_POS_Y(y)	REG_FIELD_PREP(SPRITE_POS_Y_MASK, (y))</div><div class='del'>-#define   SPRITE_POS_X_MASK	REG_GENMASK(15, 0)</div><div class='del'>-#define   SPRITE_POS_X(x)	REG_FIELD_PREP(SPRITE_POS_X_MASK, (x))</div><div class='del'>-#define _SPRA_SIZE		0x70290</div><div class='del'>-#define   SPRITE_HEIGHT_MASK	REG_GENMASK(31, 16)</div><div class='del'>-#define   SPRITE_HEIGHT(h)	REG_FIELD_PREP(SPRITE_HEIGHT_MASK, (h))</div><div class='del'>-#define   SPRITE_WIDTH_MASK	REG_GENMASK(15, 0)</div><div class='del'>-#define   SPRITE_WIDTH(w)	REG_FIELD_PREP(SPRITE_WIDTH_MASK, (w))</div><div class='del'>-#define _SPRA_KEYVAL		0x70294</div><div class='del'>-#define _SPRA_KEYMSK		0x70298</div><div class='del'>-#define _SPRA_SURF		0x7029c</div><div class='del'>-#define   SPRITE_ADDR_MASK	REG_GENMASK(31, 12)</div><div class='del'>-#define _SPRA_KEYMAX		0x702a0</div><div class='del'>-#define _SPRA_TILEOFF		0x702a4</div><div class='del'>-#define   SPRITE_OFFSET_Y_MASK	REG_GENMASK(31, 16)</div><div class='del'>-#define   SPRITE_OFFSET_Y(y)	REG_FIELD_PREP(SPRITE_OFFSET_Y_MASK, (y))</div><div class='del'>-#define   SPRITE_OFFSET_X_MASK	REG_GENMASK(15, 0)</div><div class='del'>-#define   SPRITE_OFFSET_X(x)	REG_FIELD_PREP(SPRITE_OFFSET_X_MASK, (x))</div><div class='del'>-#define _SPRA_OFFSET		0x702a4</div><div class='del'>-#define _SPRA_SURFLIVE		0x702ac</div><div class='del'>-#define _SPRA_SCALE		0x70304</div><div class='del'>-#define   SPRITE_SCALE_ENABLE			REG_BIT(31)</div><div class='del'>-#define   SPRITE_FILTER_MASK			REG_GENMASK(30, 29)</div><div class='del'>-#define   SPRITE_FILTER_MEDIUM			REG_FIELD_PREP(SPRITE_FILTER_MASK, 0)</div><div class='del'>-#define   SPRITE_FILTER_ENHANCING		REG_FIELD_PREP(SPRITE_FILTER_MASK, 1)</div><div class='del'>-#define   SPRITE_FILTER_SOFTENING		REG_FIELD_PREP(SPRITE_FILTER_MASK, 2)</div><div class='del'>-#define   SPRITE_VERTICAL_OFFSET_HALF		REG_BIT(28) /* must be enabled below */</div><div class='del'>-#define   SPRITE_VERTICAL_OFFSET_ENABLE		REG_BIT(27)</div><div class='del'>-#define   SPRITE_SRC_WIDTH_MASK			REG_GENMASK(26, 16)</div><div class='del'>-#define   SPRITE_SRC_WIDTH(w)			REG_FIELD_PREP(SPRITE_SRC_WIDTH_MASK, (w))</div><div class='del'>-#define   SPRITE_SRC_HEIGHT_MASK		REG_GENMASK(10, 0)</div><div class='del'>-#define   SPRITE_SRC_HEIGHT(h)			REG_FIELD_PREP(SPRITE_SRC_HEIGHT_MASK, (h))</div><div class='del'>-#define _SPRA_GAMC		0x70400</div><div class='del'>-#define _SPRA_GAMC16		0x70440</div><div class='del'>-#define _SPRA_GAMC17		0x7044c</div><div class='del'>-</div><div class='del'>-#define _SPRB_CTL		0x71280</div><div class='del'>-#define _SPRB_LINOFF		0x71284</div><div class='del'>-#define _SPRB_STRIDE		0x71288</div><div class='del'>-#define _SPRB_POS		0x7128c</div><div class='del'>-#define _SPRB_SIZE		0x71290</div><div class='del'>-#define _SPRB_KEYVAL		0x71294</div><div class='del'>-#define _SPRB_KEYMSK		0x71298</div><div class='del'>-#define _SPRB_SURF		0x7129c</div><div class='del'>-#define _SPRB_KEYMAX		0x712a0</div><div class='del'>-#define _SPRB_TILEOFF		0x712a4</div><div class='del'>-#define _SPRB_OFFSET		0x712a4</div><div class='del'>-#define _SPRB_SURFLIVE		0x712ac</div><div class='del'>-#define _SPRB_SCALE		0x71304</div><div class='del'>-#define _SPRB_GAMC		0x71400</div><div class='del'>-#define _SPRB_GAMC16		0x71440</div><div class='del'>-#define _SPRB_GAMC17		0x7144c</div><div class='del'>-</div><div class='del'>-#define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL)</div><div class='del'>-#define SPRLINOFF(pipe) _MMIO_PIPE(pipe, _SPRA_LINOFF, _SPRB_LINOFF)</div><div class='del'>-#define SPRSTRIDE(pipe) _MMIO_PIPE(pipe, _SPRA_STRIDE, _SPRB_STRIDE)</div><div class='del'>-#define SPRPOS(pipe) _MMIO_PIPE(pipe, _SPRA_POS, _SPRB_POS)</div><div class='del'>-#define SPRSIZE(pipe) _MMIO_PIPE(pipe, _SPRA_SIZE, _SPRB_SIZE)</div><div class='del'>-#define SPRKEYVAL(pipe) _MMIO_PIPE(pipe, _SPRA_KEYVAL, _SPRB_KEYVAL)</div><div class='del'>-#define SPRKEYMSK(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMSK, _SPRB_KEYMSK)</div><div class='del'>-#define SPRSURF(pipe) _MMIO_PIPE(pipe, _SPRA_SURF, _SPRB_SURF)</div><div class='del'>-#define SPRKEYMAX(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMAX, _SPRB_KEYMAX)</div><div class='del'>-#define SPRTILEOFF(pipe) _MMIO_PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)</div><div class='del'>-#define SPROFFSET(pipe) _MMIO_PIPE(pipe, _SPRA_OFFSET, _SPRB_OFFSET)</div><div class='del'>-#define SPRSCALE(pipe) _MMIO_PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)</div><div class='del'>-#define SPRGAMC(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC) + (i) * 4) /* 16 x u0.10 */</div><div class='del'>-#define SPRGAMC16(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC16, _SPRB_GAMC16) + (i) * 4) /* 3 x u1.10 */</div><div class='del'>-#define SPRGAMC17(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC17, _SPRB_GAMC17) + (i) * 4) /* 3 x u2.10 */</div><div class='del'>-#define SPRSURFLIVE(pipe) _MMIO_PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)</div><div class='del'>-</div><div class='del'>-#define _SPACNTR		(VLV_DISPLAY_BASE + 0x72180)</div><div class='del'>-#define   SP_ENABLE			REG_BIT(31)</div><div class='del'>-#define   SP_PIPE_GAMMA_ENABLE		REG_BIT(30)</div><div class='del'>-#define   SP_FORMAT_MASK		REG_GENMASK(29, 26)</div><div class='del'>-#define   SP_FORMAT_YUV422		REG_FIELD_PREP(SP_FORMAT_MASK, 0)</div><div class='del'>-#define   SP_FORMAT_8BPP		REG_FIELD_PREP(SP_FORMAT_MASK, 2)</div><div class='del'>-#define   SP_FORMAT_BGR565		REG_FIELD_PREP(SP_FORMAT_MASK, 5)</div><div class='del'>-#define   SP_FORMAT_BGRX8888		REG_FIELD_PREP(SP_FORMAT_MASK, 6)</div><div class='del'>-#define   SP_FORMAT_BGRA8888		REG_FIELD_PREP(SP_FORMAT_MASK, 7)</div><div class='del'>-#define   SP_FORMAT_RGBX1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 8)</div><div class='del'>-#define   SP_FORMAT_RGBA1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 9)</div><div class='del'>-#define   SP_FORMAT_BGRX1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 10) /* CHV pipe B */</div><div class='del'>-#define   SP_FORMAT_BGRA1010102		REG_FIELD_PREP(SP_FORMAT_MASK, 11) /* CHV pipe B */</div><div class='del'>-#define   SP_FORMAT_RGBX8888		REG_FIELD_PREP(SP_FORMAT_MASK, 14)</div><div class='del'>-#define   SP_FORMAT_RGBA8888		REG_FIELD_PREP(SP_FORMAT_MASK, 15)</div><div class='del'>-#define   SP_ALPHA_PREMULTIPLY		REG_BIT(23) /* CHV pipe B */</div><div class='del'>-#define   SP_SOURCE_KEY			REG_BIT(22)</div><div class='del'>-#define   SP_YUV_FORMAT_BT709		REG_BIT(18)</div><div class='del'>-#define   SP_YUV_ORDER_MASK		REG_GENMASK(17, 16)</div><div class='del'>-#define   SP_YUV_ORDER_YUYV		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 0)</div><div class='del'>-#define   SP_YUV_ORDER_UYVY		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 1)</div><div class='del'>-#define   SP_YUV_ORDER_YVYU		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 2)</div><div class='del'>-#define   SP_YUV_ORDER_VYUY		REG_FIELD_PREP(SP_YUV_ORDER_MASK, 3)</div><div class='del'>-#define   SP_ROTATE_180			REG_BIT(15)</div><div class='del'>-#define   SP_TILED			REG_BIT(10)</div><div class='del'>-#define   SP_MIRROR			REG_BIT(8) /* CHV pipe B */</div><div class='del'>-#define _SPALINOFF		(VLV_DISPLAY_BASE + 0x72184)</div><div class='del'>-#define _SPASTRIDE		(VLV_DISPLAY_BASE + 0x72188)</div><div class='del'>-#define _SPAPOS			(VLV_DISPLAY_BASE + 0x7218c)</div><div class='del'>-#define   SP_POS_Y_MASK			REG_GENMASK(31, 16)</div><div class='del'>-#define   SP_POS_Y(y)			REG_FIELD_PREP(SP_POS_Y_MASK, (y))</div><div class='del'>-#define   SP_POS_X_MASK			REG_GENMASK(15, 0)</div><div class='del'>-#define   SP_POS_X(x)			REG_FIELD_PREP(SP_POS_X_MASK, (x))</div><div class='del'>-#define _SPASIZE		(VLV_DISPLAY_BASE + 0x72190)</div><div class='del'>-#define   SP_HEIGHT_MASK		REG_GENMASK(31, 16)</div><div class='del'>-#define   SP_HEIGHT(h)			REG_FIELD_PREP(SP_HEIGHT_MASK, (h))</div><div class='del'>-#define   SP_WIDTH_MASK			REG_GENMASK(15, 0)</div><div class='del'>-#define   SP_WIDTH(w)			REG_FIELD_PREP(SP_WIDTH_MASK, (w))</div><div class='del'>-#define _SPAKEYMINVAL		(VLV_DISPLAY_BASE + 0x72194)</div><div class='del'>-#define _SPAKEYMSK		(VLV_DISPLAY_BASE + 0x72198)</div><div class='del'>-#define _SPASURF		(VLV_DISPLAY_BASE + 0x7219c)</div><div class='del'>-#define   SP_ADDR_MASK			REG_GENMASK(31, 12)</div><div class='del'>-#define _SPAKEYMAXVAL		(VLV_DISPLAY_BASE + 0x721a0)</div><div class='del'>-#define _SPATILEOFF		(VLV_DISPLAY_BASE + 0x721a4)</div><div class='del'>-#define   SP_OFFSET_Y_MASK		REG_GENMASK(31, 16)</div><div class='del'>-#define   SP_OFFSET_Y(y)		REG_FIELD_PREP(SP_OFFSET_Y_MASK, (y))</div><div class='del'>-#define   SP_OFFSET_X_MASK		REG_GENMASK(15, 0)</div><div class='del'>-#define   SP_OFFSET_X(x)		REG_FIELD_PREP(SP_OFFSET_X_MASK, (x))</div><div class='del'>-#define _SPACONSTALPHA		(VLV_DISPLAY_BASE + 0x721a8)</div><div class='del'>-#define   SP_CONST_ALPHA_ENABLE		REG_BIT(31)</div><div class='del'>-#define   SP_CONST_ALPHA_MASK		REG_GENMASK(7, 0)</div><div class='del'>-#define   SP_CONST_ALPHA(alpha)		REG_FIELD_PREP(SP_CONST_ALPHA_MASK, (alpha))</div><div class='del'>-#define _SPASURFLIVE		(VLV_DISPLAY_BASE + 0x721ac)</div><div class='del'>-#define _SPACLRC0		(VLV_DISPLAY_BASE + 0x721d0)</div><div class='del'>-#define   SP_CONTRAST_MASK		REG_GENMASK(26, 18)</div><div class='del'>-#define   SP_CONTRAST(x)		REG_FIELD_PREP(SP_CONTRAST_MASK, (x)) /* u3.6 */</div><div class='del'>-#define   SP_BRIGHTNESS_MASK		REG_GENMASK(7, 0)</div><div class='del'>-#define   SP_BRIGHTNESS(x)		REG_FIELD_PREP(SP_BRIGHTNESS_MASK, (x)) /* s8 */</div><div class='del'>-#define _SPACLRC1		(VLV_DISPLAY_BASE + 0x721d4)</div><div class='del'>-#define   SP_SH_SIN_MASK		REG_GENMASK(26, 16)</div><div class='del'>-#define   SP_SH_SIN(x)			REG_FIELD_PREP(SP_SH_SIN_MASK, (x)) /* s4.7 */</div><div class='del'>-#define   SP_SH_COS_MASK		REG_GENMASK(9, 0)</div><div class='del'>-#define   SP_SH_COS(x)			REG_FIELD_PREP(SP_SH_COS_MASK, (x)) /* u3.7 */</div><div class='del'>-#define _SPAGAMC		(VLV_DISPLAY_BASE + 0x721e0)</div><div class='del'>-</div><div class='del'>-#define _SPBCNTR		(VLV_DISPLAY_BASE + 0x72280)</div><div class='del'>-#define _SPBLINOFF		(VLV_DISPLAY_BASE + 0x72284)</div><div class='del'>-#define _SPBSTRIDE		(VLV_DISPLAY_BASE + 0x72288)</div><div class='del'>-#define _SPBPOS			(VLV_DISPLAY_BASE + 0x7228c)</div><div class='del'>-#define _SPBSIZE		(VLV_DISPLAY_BASE + 0x72290)</div><div class='del'>-#define _SPBKEYMINVAL		(VLV_DISPLAY_BASE + 0x72294)</div><div class='del'>-#define _SPBKEYMSK		(VLV_DISPLAY_BASE + 0x72298)</div><div class='del'>-#define _SPBSURF		(VLV_DISPLAY_BASE + 0x7229c)</div><div class='del'>-#define _SPBKEYMAXVAL		(VLV_DISPLAY_BASE + 0x722a0)</div><div class='del'>-#define _SPBTILEOFF		(VLV_DISPLAY_BASE + 0x722a4)</div><div class='del'>-#define _SPBCONSTALPHA		(VLV_DISPLAY_BASE + 0x722a8)</div><div class='del'>-#define _SPBSURFLIVE		(VLV_DISPLAY_BASE + 0x722ac)</div><div class='del'>-#define _SPBCLRC0		(VLV_DISPLAY_BASE + 0x722d0)</div><div class='del'>-#define _SPBCLRC1		(VLV_DISPLAY_BASE + 0x722d4)</div><div class='del'>-#define _SPBGAMC		(VLV_DISPLAY_BASE + 0x722e0)</div><div class='del'>-</div><div class='del'>-#define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \</div><div class='del'>-	_PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))</div><div class='del'>-#define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \</div><div class='del'>-	_MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))</div><div class='del'>-</div><div class='del'>-#define SPCNTR(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)</div><div class='del'>-#define SPLINOFF(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)</div><div class='del'>-#define SPSTRIDE(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE)</div><div class='del'>-#define SPPOS(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS)</div><div class='del'>-#define SPSIZE(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE)</div><div class='del'>-#define SPKEYMINVAL(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL)</div><div class='del'>-#define SPKEYMSK(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMSK, _SPBKEYMSK)</div><div class='del'>-#define SPSURF(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPASURF, _SPBSURF)</div><div class='del'>-#define SPKEYMAXVAL(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMAXVAL, _SPBKEYMAXVAL)</div><div class='del'>-#define SPTILEOFF(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPATILEOFF, _SPBTILEOFF)</div><div class='del'>-#define SPCONSTALPHA(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA)</div><div class='del'>-#define SPSURFLIVE(pipe, plane_id)	_MMIO_VLV_SPR((pipe), (plane_id), _SPASURFLIVE, _SPBSURFLIVE)</div><div class='del'>-#define SPCLRC0(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC0, _SPBCLRC0)</div><div class='del'>-#define SPCLRC1(pipe, plane_id)		_MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC1, _SPBCLRC1)</div><div class='del'>-#define SPGAMC(pipe, plane_id, i)	_MMIO(_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC) + (5 - (i)) * 4) /* 6 x u0.10 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CHV pipe B sprite CSC</div><div class='del'>- *</div><div class='del'>- * |cr|   |c0 c1 c2|   |cr + cr_ioff|   |cr_ooff|</div><div class='del'>- * |yg| = |c3 c4 c5| x |yg + yg_ioff| + |yg_ooff|</div><div class='del'>- * |cb|   |c6 c7 c8|   |cb + cr_ioff|   |cb_ooff|</div><div class='del'>- */</div><div class='del'>-#define _MMIO_CHV_SPCSC(plane_id, reg) \</div><div class='del'>-	_MMIO(VLV_DISPLAY_BASE + ((plane_id) - PLANE_SPRITE0) * 0x1000 + (reg))</div><div class='del'>-</div><div class='del'>-#define SPCSCYGOFF(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d900)</div><div class='del'>-#define SPCSCCBOFF(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d904)</div><div class='del'>-#define SPCSCCROFF(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d908)</div><div class='del'>-#define  SPCSC_OOFF_MASK	REG_GENMASK(26, 16)</div><div class='del'>-#define  SPCSC_OOFF(x)		REG_FIELD_PREP(SPCSC_OOFF_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='del'>-#define  SPCSC_IOFF_MASK	REG_GENMASK(10, 0)</div><div class='del'>-#define  SPCSC_IOFF(x)		REG_FIELD_PREP(SPCSC_IOFF_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='del'>-</div><div class='del'>-#define SPCSCC01(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d90c)</div><div class='del'>-#define SPCSCC23(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d910)</div><div class='del'>-#define SPCSCC45(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d914)</div><div class='del'>-#define SPCSCC67(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d918)</div><div class='del'>-#define SPCSCC8(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d91c)</div><div class='del'>-#define  SPCSC_C1_MASK		REG_GENMASK(30, 16)</div><div class='del'>-#define  SPCSC_C1(x)		REG_FIELD_PREP(SPCSC_C1_MASK, (x) &amp; 0x7fff) /* s3.12 */</div><div class='del'>-#define  SPCSC_C0_MASK		REG_GENMASK(14, 0)</div><div class='del'>-#define  SPCSC_C0(x)		REG_FIELD_PREP(SPCSC_C0_MASK, (x) &amp; 0x7fff) /* s3.12 */</div><div class='del'>-</div><div class='del'>-#define SPCSCYGICLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d920)</div><div class='del'>-#define SPCSCCBICLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d924)</div><div class='del'>-#define SPCSCCRICLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d928)</div><div class='del'>-#define  SPCSC_IMAX_MASK	REG_GENMASK(26, 16)</div><div class='del'>-#define  SPCSC_IMAX(x)		REG_FIELD_PREP(SPCSC_IMAX_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='del'>-#define  SPCSC_IMIN_MASK	REG_GENMASK(10, 0)</div><div class='del'>-#define  SPCSC_IMIN(x)		REG_FIELD_PREP(SPCSC_IMIN_MASK, (x) &amp; 0x7ff) /* s11 */</div><div class='del'>-</div><div class='del'>-#define SPCSCYGOCLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d92c)</div><div class='del'>-#define SPCSCCBOCLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d930)</div><div class='del'>-#define SPCSCCROCLAMP(plane_id)	_MMIO_CHV_SPCSC(plane_id, 0x6d934)</div><div class='del'>-#define  SPCSC_OMAX_MASK	REG_GENMASK(25, 16)</div><div class='del'>-#define  SPCSC_OMAX(x)		REG_FIELD_PREP(SPCSC_OMAX_MASK, (x)) /* u10 */</div><div class='del'>-#define  SPCSC_OMIN_MASK	REG_GENMASK(9, 0)</div><div class='del'>-#define  SPCSC_OMIN(x)		REG_FIELD_PREP(SPCSC_OMIN_MASK, (x)) /* u10 */</div><div class='del'>-</div><div class='ctx'> /* Skylake plane registers */</div><div class='ctx'> </div><div class='ctx'> #define _PLANE_CTL_1_A				0x70180</div><div class='hunk'>@@ -3990,14 +2890,14 @@</div><div class='ctx'> #define _PIPEB_LINK_M2		0x61048</div><div class='ctx'> #define _PIPEB_LINK_N2		0x6104c</div><div class='ctx'> </div><div class='del'>-#define PIPE_DATA_M1(tran) _MMIO_TRANS2(tran, _PIPEA_DATA_M1)</div><div class='del'>-#define PIPE_DATA_N1(tran) _MMIO_TRANS2(tran, _PIPEA_DATA_N1)</div><div class='del'>-#define PIPE_DATA_M2(tran) _MMIO_TRANS2(tran, _PIPEA_DATA_M2)</div><div class='del'>-#define PIPE_DATA_N2(tran) _MMIO_TRANS2(tran, _PIPEA_DATA_N2)</div><div class='del'>-#define PIPE_LINK_M1(tran) _MMIO_TRANS2(tran, _PIPEA_LINK_M1)</div><div class='del'>-#define PIPE_LINK_N1(tran) _MMIO_TRANS2(tran, _PIPEA_LINK_N1)</div><div class='del'>-#define PIPE_LINK_M2(tran) _MMIO_TRANS2(tran, _PIPEA_LINK_M2)</div><div class='del'>-#define PIPE_LINK_N2(tran) _MMIO_TRANS2(tran, _PIPEA_LINK_N2)</div><div class='add'>+#define PIPE_DATA_M1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M1)</div><div class='add'>+#define PIPE_DATA_N1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N1)</div><div class='add'>+#define PIPE_DATA_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M2)</div><div class='add'>+#define PIPE_DATA_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2)</div><div class='add'>+#define PIPE_LINK_M1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1)</div><div class='add'>+#define PIPE_LINK_N1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1)</div><div class='add'>+#define PIPE_LINK_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2)</div><div class='add'>+#define PIPE_LINK_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N2)</div><div class='ctx'> </div><div class='ctx'> /* CPU panel fitter */</div><div class='ctx'> /* IVB+ has 3 fitters, 0 is 7x5 capable, the other two only 3x3 */</div><div class='hunk'>@@ -4555,6 +3455,11 @@</div><div class='ctx'> #define   GLK_CL1_PWR_DOWN		REG_BIT(11)</div><div class='ctx'> #define   GLK_CL0_PWR_DOWN		REG_BIT(10)</div><div class='ctx'> </div><div class='add'>+#define CHICKEN_MISC_3		_MMIO(0x42088)</div><div class='add'>+#define   DP_MST_DPT_DPTP_ALIGN_WA(trans)	REG_BIT(9 + (trans) - TRANSCODER_A)</div><div class='add'>+#define   DP_MST_SHORT_HBLANK_WA(trans)		REG_BIT(5 + (trans) - TRANSCODER_A)</div><div class='add'>+#define   DP_MST_FEC_BS_JITTER_WA(trans)	REG_BIT(0 + (trans) - TRANSCODER_A)</div><div class='add'>+</div><div class='ctx'> #define CHICKEN_MISC_4		_MMIO(0x4208c)</div><div class='ctx'> #define   CHICKEN_FBC_STRIDE_OVERRIDE	REG_BIT(13)</div><div class='ctx'> #define   CHICKEN_FBC_STRIDE_MASK	REG_GENMASK(12, 0)</div><div class='hunk'>@@ -4611,7 +3516,9 @@</div><div class='ctx'> #define   DDIE_TRAINING_OVERRIDE_ENABLE	REG_BIT(17) /* CHICKEN_TRANS_A only */</div><div class='ctx'> #define   DDIE_TRAINING_OVERRIDE_VALUE	REG_BIT(16) /* CHICKEN_TRANS_A only */</div><div class='ctx'> #define   PSR2_ADD_VERTICAL_LINE_COUNT	REG_BIT(15)</div><div class='add'>+#define   DP_FEC_BS_JITTER_WA		REG_BIT(15)</div><div class='ctx'> #define   PSR2_VSC_ENABLE_PROG_HEADER	REG_BIT(12)</div><div class='add'>+#define   DP_DSC_INSERT_SF_AT_EOL_WA	REG_BIT(4)</div><div class='ctx'> </div><div class='ctx'> #define DISP_ARB_CTL	_MMIO(0x45000)</div><div class='ctx'> #define   DISP_FBC_MEMORY_WAKE		REG_BIT(31)</div><div class='hunk'>@@ -5010,27 +3917,29 @@</div><div class='ctx'> #define TVIDEO_DIP_GCP(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_GCP_A, _VIDEO_DIP_GCP_B)</div><div class='ctx'> </div><div class='ctx'> /* Per-transcoder DIP controls (VLV) */</div><div class='del'>-#define _VLV_VIDEO_DIP_CTL_A		(VLV_DISPLAY_BASE + 0x60200)</div><div class='del'>-#define _VLV_VIDEO_DIP_DATA_A		(VLV_DISPLAY_BASE + 0x60208)</div><div class='del'>-#define _VLV_VIDEO_DIP_GDCP_PAYLOAD_A	(VLV_DISPLAY_BASE + 0x60210)</div><div class='del'>-</div><div class='del'>-#define _VLV_VIDEO_DIP_CTL_B		(VLV_DISPLAY_BASE + 0x61170)</div><div class='del'>-#define _VLV_VIDEO_DIP_DATA_B		(VLV_DISPLAY_BASE + 0x61174)</div><div class='del'>-#define _VLV_VIDEO_DIP_GDCP_PAYLOAD_B	(VLV_DISPLAY_BASE + 0x61178)</div><div class='del'>-</div><div class='del'>-#define _CHV_VIDEO_DIP_CTL_C		(VLV_DISPLAY_BASE + 0x611f0)</div><div class='del'>-#define _CHV_VIDEO_DIP_DATA_C		(VLV_DISPLAY_BASE + 0x611f4)</div><div class='del'>-#define _CHV_VIDEO_DIP_GDCP_PAYLOAD_C	(VLV_DISPLAY_BASE + 0x611f8)</div><div class='del'>-</div><div class='del'>-#define VLV_TVIDEO_DIP_CTL(pipe) \</div><div class='del'>-	_MMIO_PIPE3((pipe), _VLV_VIDEO_DIP_CTL_A, \</div><div class='del'>-	       _VLV_VIDEO_DIP_CTL_B, _CHV_VIDEO_DIP_CTL_C)</div><div class='del'>-#define VLV_TVIDEO_DIP_DATA(pipe) \</div><div class='del'>-	_MMIO_PIPE3((pipe), _VLV_VIDEO_DIP_DATA_A, \</div><div class='del'>-	       _VLV_VIDEO_DIP_DATA_B, _CHV_VIDEO_DIP_DATA_C)</div><div class='del'>-#define VLV_TVIDEO_DIP_GCP(pipe) \</div><div class='del'>-	_MMIO_PIPE3((pipe), _VLV_VIDEO_DIP_GDCP_PAYLOAD_A, \</div><div class='del'>-		_VLV_VIDEO_DIP_GDCP_PAYLOAD_B, _CHV_VIDEO_DIP_GDCP_PAYLOAD_C)</div><div class='add'>+#define _VLV_VIDEO_DIP_CTL_A		0x60200</div><div class='add'>+#define _VLV_VIDEO_DIP_CTL_B		0x61170</div><div class='add'>+#define _CHV_VIDEO_DIP_CTL_C		0x611f0</div><div class='add'>+#define VLV_TVIDEO_DIP_CTL(pipe)	_MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \</div><div class='add'>+							 _VLV_VIDEO_DIP_CTL_A, \</div><div class='add'>+							 _VLV_VIDEO_DIP_CTL_B, \</div><div class='add'>+							 _CHV_VIDEO_DIP_CTL_C)</div><div class='add'>+</div><div class='add'>+#define _VLV_VIDEO_DIP_DATA_A		0x60208</div><div class='add'>+#define _VLV_VIDEO_DIP_DATA_B		0x61174</div><div class='add'>+#define _CHV_VIDEO_DIP_DATA_C		0x611f4</div><div class='add'>+#define VLV_TVIDEO_DIP_DATA(pipe)	_MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \</div><div class='add'>+							 _VLV_VIDEO_DIP_DATA_A, \</div><div class='add'>+							 _VLV_VIDEO_DIP_DATA_B, \</div><div class='add'>+							 _CHV_VIDEO_DIP_DATA_C)</div><div class='add'>+</div><div class='add'>+#define _VLV_VIDEO_DIP_GDCP_PAYLOAD_A	0x60210</div><div class='add'>+#define _VLV_VIDEO_DIP_GDCP_PAYLOAD_B	0x61178</div><div class='add'>+#define _CHV_VIDEO_DIP_GDCP_PAYLOAD_C	0x611f8</div><div class='add'>+#define VLV_TVIDEO_DIP_GCP(pipe)	_MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \</div><div class='add'>+							 _VLV_VIDEO_DIP_GDCP_PAYLOAD_A, \</div><div class='add'>+							 _VLV_VIDEO_DIP_GDCP_PAYLOAD_B, \</div><div class='add'>+							 _CHV_VIDEO_DIP_GDCP_PAYLOAD_C)</div><div class='ctx'> </div><div class='ctx'> /* Haswell DIP controls */</div><div class='ctx'> </div><div class='hunk'>@@ -5040,6 +3949,7 @@</div><div class='ctx'> #define _HSW_VIDEO_DIP_SPD_DATA_A	0x602A0</div><div class='ctx'> #define _HSW_VIDEO_DIP_GMP_DATA_A	0x602E0</div><div class='ctx'> #define _HSW_VIDEO_DIP_VSC_DATA_A	0x60320</div><div class='add'>+#define	_ADL_VIDEO_DIP_AS_DATA_A	0x60484</div><div class='ctx'> #define _GLK_VIDEO_DIP_DRM_DATA_A	0x60440</div><div class='ctx'> #define _HSW_VIDEO_DIP_AVI_ECC_A	0x60240</div><div class='ctx'> #define _HSW_VIDEO_DIP_VS_ECC_A		0x60280</div><div class='hunk'>@@ -5054,6 +3964,7 @@</div><div class='ctx'> #define _HSW_VIDEO_DIP_SPD_DATA_B	0x612A0</div><div class='ctx'> #define _HSW_VIDEO_DIP_GMP_DATA_B	0x612E0</div><div class='ctx'> #define _HSW_VIDEO_DIP_VSC_DATA_B	0x61320</div><div class='add'>+#define _ADL_VIDEO_DIP_AS_DATA_B	0x61484</div><div class='ctx'> #define _GLK_VIDEO_DIP_DRM_DATA_B	0x61440</div><div class='ctx'> #define _HSW_VIDEO_DIP_BVI_ECC_B	0x61240</div><div class='ctx'> #define _HSW_VIDEO_DIP_VS_ECC_B		0x61280</div><div class='hunk'>@@ -5073,22 +3984,25 @@</div><div class='ctx'> #define _ICL_VIDEO_DIP_PPS_ECC_A	0x603D4</div><div class='ctx'> #define _ICL_VIDEO_DIP_PPS_ECC_B	0x613D4</div><div class='ctx'> </div><div class='del'>-#define HSW_TVIDEO_DIP_CTL(trans)		_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_CTL_A)</div><div class='del'>-#define HSW_TVIDEO_DIP_GCP(trans)		_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_GCP_A)</div><div class='del'>-#define HSW_TVIDEO_DIP_AVI_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_AVI_DATA_A + (i) * 4)</div><div class='del'>-#define HSW_TVIDEO_DIP_VS_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_VS_DATA_A + (i) * 4)</div><div class='del'>-#define HSW_TVIDEO_DIP_SPD_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_SPD_DATA_A + (i) * 4)</div><div class='del'>-#define HSW_TVIDEO_DIP_GMP_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_GMP_DATA_A + (i) * 4)</div><div class='del'>-#define HSW_TVIDEO_DIP_VSC_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_VSC_DATA_A + (i) * 4)</div><div class='del'>-#define GLK_TVIDEO_DIP_DRM_DATA(trans, i)	_MMIO_TRANS2(trans, _GLK_VIDEO_DIP_DRM_DATA_A + (i) * 4)</div><div class='del'>-#define ICL_VIDEO_DIP_PPS_DATA(trans, i)	_MMIO_TRANS2(trans, _ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)</div><div class='del'>-#define ICL_VIDEO_DIP_PPS_ECC(trans, i)		_MMIO_TRANS2(trans, _ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)</div><div class='add'>+#define HSW_TVIDEO_DIP_CTL(trans)		_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_CTL_A)</div><div class='add'>+#define HSW_TVIDEO_DIP_GCP(trans)		_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_GCP_A)</div><div class='add'>+#define HSW_TVIDEO_DIP_AVI_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_AVI_DATA_A + (i) * 4)</div><div class='add'>+#define HSW_TVIDEO_DIP_VS_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_VS_DATA_A + (i) * 4)</div><div class='add'>+#define HSW_TVIDEO_DIP_SPD_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_SPD_DATA_A + (i) * 4)</div><div class='add'>+#define HSW_TVIDEO_DIP_GMP_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_GMP_DATA_A + (i) * 4)</div><div class='add'>+#define HSW_TVIDEO_DIP_VSC_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_VSC_DATA_A + (i) * 4)</div><div class='add'>+#define GLK_TVIDEO_DIP_DRM_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _GLK_VIDEO_DIP_DRM_DATA_A + (i) * 4)</div><div class='add'>+#define ICL_VIDEO_DIP_PPS_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans, _ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)</div><div class='add'>+#define ICL_VIDEO_DIP_PPS_ECC(trans, i)		_MMIO_TRANS2(dev_priv, trans, _ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)</div><div class='add'>+/*ADLP and later: */</div><div class='add'>+#define ADL_TVIDEO_DIP_AS_SDP_DATA(trans, i)	_MMIO_TRANS2(dev_priv, trans,\</div><div class='add'>+							     _ADL_VIDEO_DIP_AS_DATA_A + (i) * 4)</div><div class='ctx'> </div><div class='ctx'> #define _HSW_STEREO_3D_CTL_A		0x70020</div><div class='ctx'> #define   S3D_ENABLE			(1 &lt;&lt; 31)</div><div class='ctx'> #define _HSW_STEREO_3D_CTL_B		0x71020</div><div class='ctx'> </div><div class='del'>-#define HSW_STEREO_3D_CTL(trans)	_MMIO_PIPE2(trans, _HSW_STEREO_3D_CTL_A)</div><div class='add'>+#define HSW_STEREO_3D_CTL(trans)	_MMIO_PIPE2(dev_priv, trans, _HSW_STEREO_3D_CTL_A)</div><div class='ctx'> </div><div class='ctx'> #define _PCH_TRANS_HTOTAL_B          0xe1000</div><div class='ctx'> #define _PCH_TRANS_HBLANK_B          0xe1004</div><div class='hunk'>@@ -5401,7 +4315,7 @@</div><div class='ctx'> #define	    POWER_SETUP_I1_SHIFT		6	/* 10.6 fixed point format */</div><div class='ctx'> #define	    POWER_SETUP_I1_DATA_MASK		REG_GENMASK(15, 0)</div><div class='ctx'> #define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US	0x23</div><div class='del'>-#define   XEHP_PCODE_FREQUENCY_CONFIG		0x6e	/* xehpsdv, pvc */</div><div class='add'>+#define   XEHP_PCODE_FREQUENCY_CONFIG		0x6e	/* pvc */</div><div class='ctx'> /* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */</div><div class='ctx'> #define     PCODE_MBOX_FC_SC_READ_FUSED_P0	0x0</div><div class='ctx'> #define     PCODE_MBOX_FC_SC_READ_FUSED_PN	0x1</div><div class='hunk'>@@ -5566,15 +4480,6 @@ enum skl_power_gate {</div><div class='ctx'> 	((pw_idx) - ICL_PW_CTL_IDX_PW_1 + SKL_PG1)</div><div class='ctx'> #define  SKL_FUSE_PG_DIST_STATUS(pg)		(1 &lt;&lt; (27 - (pg)))</div><div class='ctx'> </div><div class='del'>-#define _ICL_AUX_REG_IDX(pw_idx)	((pw_idx) - ICL_PW_CTL_IDX_AUX_A)</div><div class='del'>-#define _ICL_AUX_ANAOVRD1_A		0x162398</div><div class='del'>-#define _ICL_AUX_ANAOVRD1_B		0x6C398</div><div class='del'>-#define ICL_AUX_ANAOVRD1(pw_idx)	_MMIO(_PICK(_ICL_AUX_REG_IDX(pw_idx), \</div><div class='del'>-						    _ICL_AUX_ANAOVRD1_A, \</div><div class='del'>-						    _ICL_AUX_ANAOVRD1_B))</div><div class='del'>-#define   ICL_AUX_ANAOVRD1_LDO_BYPASS	(1 &lt;&lt; 7)</div><div class='del'>-#define   ICL_AUX_ANAOVRD1_ENABLE	(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='ctx'> /* Per-pipe DDI Function Control */</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL_A		0x60400</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL_B		0x61400</div><div class='hunk'>@@ -5583,7 +4488,7 @@ enum skl_power_gate {</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL_EDP		0x6F400</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL_DSI0	0x6b400</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL_DSI1	0x6bc00</div><div class='del'>-#define TRANS_DDI_FUNC_CTL(tran) _MMIO_TRANS2(tran, _TRANS_DDI_FUNC_CTL_A)</div><div class='add'>+#define TRANS_DDI_FUNC_CTL(tran) _MMIO_TRANS2(dev_priv, tran, _TRANS_DDI_FUNC_CTL_A)</div><div class='ctx'> </div><div class='ctx'> #define  TRANS_DDI_FUNC_ENABLE		(1 &lt;&lt; 31)</div><div class='ctx'> /* Those bits are ignored by pipe EDP since it can only connect to DDI A */</div><div class='hunk'>@@ -5638,7 +4543,7 @@ enum skl_power_gate {</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL2_EDP	0x6f404</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL2_DSI0	0x6b404</div><div class='ctx'> #define _TRANS_DDI_FUNC_CTL2_DSI1	0x6bc04</div><div class='del'>-#define TRANS_DDI_FUNC_CTL2(tran)	_MMIO_TRANS2(tran, _TRANS_DDI_FUNC_CTL2_A)</div><div class='add'>+#define TRANS_DDI_FUNC_CTL2(tran)	_MMIO_TRANS2(dev_priv, tran, _TRANS_DDI_FUNC_CTL2_A)</div><div class='ctx'> #define  PORT_SYNC_MODE_ENABLE			REG_BIT(4)</div><div class='ctx'> #define  PORT_SYNC_MODE_MASTER_SELECT_MASK	REG_GENMASK(2, 0)</div><div class='ctx'> #define  PORT_SYNC_MODE_MASTER_SELECT(x)	REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))</div><div class='hunk'>@@ -5651,7 +4556,7 @@ enum skl_power_gate {</div><div class='ctx'> #define _DP_TP_CTL_B			0x64140</div><div class='ctx'> #define _TGL_DP_TP_CTL_A		0x60540</div><div class='ctx'> #define DP_TP_CTL(port) _MMIO_PORT(port, _DP_TP_CTL_A, _DP_TP_CTL_B)</div><div class='del'>-#define TGL_DP_TP_CTL(tran) _MMIO_TRANS2((tran), _TGL_DP_TP_CTL_A)</div><div class='add'>+#define TGL_DP_TP_CTL(tran) _MMIO_TRANS2(dev_priv, (tran), _TGL_DP_TP_CTL_A)</div><div class='ctx'> #define  DP_TP_CTL_ENABLE			(1 &lt;&lt; 31)</div><div class='ctx'> #define  DP_TP_CTL_FEC_ENABLE			(1 &lt;&lt; 30)</div><div class='ctx'> #define  DP_TP_CTL_MODE_SST			(0 &lt;&lt; 27)</div><div class='hunk'>@@ -5677,7 +4582,7 @@ enum skl_power_gate {</div><div class='ctx'> #define _DP_TP_STATUS_B			0x64144</div><div class='ctx'> #define _TGL_DP_TP_STATUS_A		0x60544</div><div class='ctx'> #define DP_TP_STATUS(port) _MMIO_PORT(port, _DP_TP_STATUS_A, _DP_TP_STATUS_B)</div><div class='del'>-#define TGL_DP_TP_STATUS(tran) _MMIO_TRANS2((tran), _TGL_DP_TP_STATUS_A)</div><div class='add'>+#define TGL_DP_TP_STATUS(tran) _MMIO_TRANS2(dev_priv, (tran), _TGL_DP_TP_STATUS_A)</div><div class='ctx'> #define  DP_TP_STATUS_FEC_ENABLE_LIVE		(1 &lt;&lt; 28)</div><div class='ctx'> #define  DP_TP_STATUS_IDLE_DONE			(1 &lt;&lt; 25)</div><div class='ctx'> #define  DP_TP_STATUS_ACT_SENT			(1 &lt;&lt; 24)</div><div class='hunk'>@@ -5858,14 +4763,14 @@ enum skl_power_gate {</div><div class='ctx'> #define _TRANSB_MSA_MISC		0x61410</div><div class='ctx'> #define _TRANSC_MSA_MISC		0x62410</div><div class='ctx'> #define _TRANS_EDP_MSA_MISC		0x6f410</div><div class='del'>-#define TRANS_MSA_MISC(tran) _MMIO_TRANS2(tran, _TRANSA_MSA_MISC)</div><div class='add'>+#define TRANS_MSA_MISC(tran) _MMIO_TRANS2(dev_priv, tran, _TRANSA_MSA_MISC)</div><div class='ctx'> /* See DP_MSA_MISC_* for the bit definitions */</div><div class='ctx'> </div><div class='ctx'> #define _TRANS_A_SET_CONTEXT_LATENCY		0x6007C</div><div class='ctx'> #define _TRANS_B_SET_CONTEXT_LATENCY		0x6107C</div><div class='ctx'> #define _TRANS_C_SET_CONTEXT_LATENCY		0x6207C</div><div class='ctx'> #define _TRANS_D_SET_CONTEXT_LATENCY		0x6307C</div><div class='del'>-#define TRANS_SET_CONTEXT_LATENCY(tran)		_MMIO_TRANS2(tran, _TRANS_A_SET_CONTEXT_LATENCY)</div><div class='add'>+#define TRANS_SET_CONTEXT_LATENCY(tran)		_MMIO_TRANS2(dev_priv, tran, _TRANS_A_SET_CONTEXT_LATENCY)</div><div class='ctx'> #define  TRANS_SET_CONTEXT_LATENCY_MASK		REG_GENMASK(15, 0)</div><div class='ctx'> #define  TRANS_SET_CONTEXT_LATENCY_VALUE(x)	REG_FIELD_PREP(TRANS_SET_CONTEXT_LATENCY_MASK, (x))</div><div class='ctx'> </div><div class='hunk'>@@ -5900,7 +4805,9 @@ enum skl_power_gate {</div><div class='ctx'> #define  CDCLK_FREQ_540		REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 1)</div><div class='ctx'> #define  CDCLK_FREQ_337_308		REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 2)</div><div class='ctx'> #define  CDCLK_FREQ_675_617		REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 3)</div><div class='del'>-#define  MDCLK_SOURCE_SEL_CDCLK_PLL	REG_BIT(25)</div><div class='add'>+#define  MDCLK_SOURCE_SEL_MASK		REG_GENMASK(25, 25)</div><div class='add'>+#define  MDCLK_SOURCE_SEL_CD2XCLK	REG_FIELD_PREP(MDCLK_SOURCE_SEL_MASK, 0)</div><div class='add'>+#define  MDCLK_SOURCE_SEL_CDCLK_PLL	REG_FIELD_PREP(MDCLK_SOURCE_SEL_MASK, 1)</div><div class='ctx'> #define  BXT_CDCLK_CD2X_DIV_SEL_MASK	REG_GENMASK(23, 22)</div><div class='ctx'> #define  BXT_CDCLK_CD2X_DIV_SEL_1	REG_FIELD_PREP(BXT_CDCLK_CD2X_DIV_SEL_MASK, 0)</div><div class='ctx'> #define  BXT_CDCLK_CD2X_DIV_SEL_1_5	REG_FIELD_PREP(BXT_CDCLK_CD2X_DIV_SEL_MASK, 1)</div><div class='hunk'>@@ -6317,7 +5224,7 @@ enum skl_power_gate {</div><div class='ctx'> </div><div class='ctx'> #define _VLV_PIPE_MSA_MISC_A			0x70048</div><div class='ctx'> #define VLV_PIPE_MSA_MISC(pipe)		\</div><div class='del'>-			_MMIO_PIPE2(pipe, _VLV_PIPE_MSA_MISC_A)</div><div class='add'>+			_MMIO_PIPE2(dev_priv, pipe, _VLV_PIPE_MSA_MISC_A)</div><div class='ctx'> #define   VLV_MSA_MISC1_HW_ENABLE			REG_BIT(31)</div><div class='ctx'> #define   VLV_MSA_MISC1_SW_S3D_MASK			REG_GENMASK(2, 0) /* MSA MISC1 3:1 */</div><div class='ctx'> </div><div class='hunk'>@@ -6390,7 +5297,7 @@ enum skl_power_gate {</div><div class='ctx'> </div><div class='ctx'> #define _MTL_CLKGATE_DIS_TRANS_A			0x604E8</div><div class='ctx'> #define _MTL_CLKGATE_DIS_TRANS_B			0x614E8</div><div class='del'>-#define MTL_CLKGATE_DIS_TRANS(trans)			_MMIO_TRANS2(trans, _MTL_CLKGATE_DIS_TRANS_A)</div><div class='add'>+#define MTL_CLKGATE_DIS_TRANS(trans)			_MMIO_TRANS2(dev_priv, trans, _MTL_CLKGATE_DIS_TRANS_A)</div><div class='ctx'> #define  MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS		REG_BIT(7)</div><div class='ctx'> </div><div class='ctx'> #define MTL_MEM_SS_INFO_GLOBAL			_MMIO(0x45700)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c<br/>index 0d735d5c2b35..942345548bc3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_ttm_buddy_manager.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_ttm_buddy_manager.c</a></div><div class='hunk'>@@ -126,7 +126,7 @@ static int i915_ttm_buddy_man_alloc(struct ttm_resource_manager *man,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_blocks:</div><div class='del'>-	drm_buddy_free_list(mm, &amp;bman_res-&gt;blocks);</div><div class='add'>+	drm_buddy_free_list(mm, &amp;bman_res-&gt;blocks, 0);</div><div class='ctx'> 	mutex_unlock(&amp;bman-&gt;lock);</div><div class='ctx'> err_free_res:</div><div class='ctx'> 	ttm_resource_fini(man, &amp;bman_res-&gt;base);</div><div class='hunk'>@@ -141,7 +141,7 @@ static void i915_ttm_buddy_man_free(struct ttm_resource_manager *man,</div><div class='ctx'> 	struct i915_ttm_buddy_manager *bman = to_buddy_manager(man);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;bman-&gt;lock);</div><div class='del'>-	drm_buddy_free_list(&amp;bman-&gt;mm, &amp;bman_res-&gt;blocks);</div><div class='add'>+	drm_buddy_free_list(&amp;bman-&gt;mm, &amp;bman_res-&gt;blocks, 0);</div><div class='ctx'> 	bman-&gt;visible_avail += bman_res-&gt;used_visible_size;</div><div class='ctx'> 	mutex_unlock(&amp;bman-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -345,7 +345,7 @@ int i915_ttm_buddy_man_fini(struct ttm_device *bdev, unsigned int type)</div><div class='ctx'> 	ttm_set_driver_manager(bdev, type, NULL);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;bman-&gt;lock);</div><div class='del'>-	drm_buddy_free_list(mm, &amp;bman-&gt;reserved);</div><div class='add'>+	drm_buddy_free_list(mm, &amp;bman-&gt;reserved, 0);</div><div class='ctx'> 	drm_buddy_fini(mm);</div><div class='ctx'> 	bman-&gt;visible_avail += bman-&gt;visible_reserved;</div><div class='ctx'> 	WARN_ON_ONCE(bman-&gt;visible_avail != bman-&gt;visible_size);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h<br/>index b45ef0560611..06ec6ceb61d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_utils.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_utils.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_utils.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_utils.h</a></div><div class='hunk'>@@ -73,20 +73,6 @@ bool i915_error_injected(void);</div><div class='ctx'> 	__i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \</div><div class='ctx'> 		      fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-#if defined(GCC_VERSION) &amp;&amp; GCC_VERSION &gt;= 70000</div><div class='del'>-#define add_overflows_t(T, A, B) \</div><div class='del'>-	__builtin_add_overflow_p((A), (B), (T)0)</div><div class='del'>-#else</div><div class='del'>-#define add_overflows_t(T, A, B) ({ \</div><div class='del'>-	typeof(A) a = (A); \</div><div class='del'>-	typeof(B) b = (B); \</div><div class='del'>-	(T)(a + b) &lt; a; \</div><div class='del'>-})</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define add_overflows(A, B) \</div><div class='del'>-	add_overflows_t(typeof((A) + (B)), (A), (B))</div><div class='del'>-</div><div class='ctx'> #define range_overflows(start, size, max) ({ \</div><div class='ctx'> 	typeof(start) start__ = (start); \</div><div class='ctx'> 	typeof(size) size__ = (size); \</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c<br/>index b70715b1411d..d2f064d2525c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_vma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/i915_vma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/i915_vma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/i915_vma.c</a></div><div class='hunk'>@@ -1776,8 +1776,6 @@ static void release_references(struct i915_vma *vma, struct intel_gt *gt,</div><div class='ctx'> 	if (vm_ddestroy)</div><div class='ctx'> 		i915_vm_resv_put(vma-&gt;vm);</div><div class='ctx'> </div><div class='del'>-	/* Wait for async active retire */</div><div class='del'>-	i915_active_wait(&amp;vma-&gt;active);</div><div class='ctx'> 	i915_active_fini(&amp;vma-&gt;active);</div><div class='ctx'> 	GEM_WARN_ON(vma-&gt;resource);</div><div class='ctx'> 	i915_vma_free(vma);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c<br/>index 9c21ce69bd98..1dc5281b2ade 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_clock_gating.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_clock_gating.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_clock_gating.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_clock_gating.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include "display/intel_de.h"</div><div class='ctx'> #include "display/intel_display.h"</div><div class='ctx'> #include "display/intel_display_trace.h"</div><div class='add'>+#include "display/intel_fbc_regs.h"</div><div class='ctx'> #include "display/skl_watermark.h"</div><div class='ctx'> </div><div class='ctx'> #include "gt/intel_engine_regs.h"</div><div class='hunk'>@@ -105,12 +106,6 @@ static void bxt_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> 	 * Display WA #0562: bxt</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_uncore_rmw(&amp;i915-&gt;uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WaFbcHighMemBwCorruptionAvoidance:bxt</div><div class='del'>-	 * Display WA #0883: bxt</div><div class='del'>-	 */</div><div class='del'>-	intel_uncore_rmw(&amp;i915-&gt;uncore, ILK_DPFC_CHICKEN(INTEL_FBC_A), 0, DPFC_DISABLE_DUMMY0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void glk_init_clock_gating(struct drm_i915_private *i915)</div><div class='hunk'>@@ -349,13 +344,6 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *i915,</div><div class='ctx'> 	intel_uncore_write(&amp;i915-&gt;uncore, GEN7_MISCCPCTL, misccpctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xehpsdv_init_clock_gating(struct drm_i915_private *i915)</div><div class='del'>-{</div><div class='del'>-	/* Wa_22010146351:xehpsdv */</div><div class='del'>-	if (IS_XEHPSDV_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))</div><div class='del'>-		intel_uncore_rmw(&amp;i915-&gt;uncore, XEHP_CLOCK_GATE_DIS, 0, SGR_DIS);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dg2_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	/* Wa_22010954014:dg2 */</div><div class='hunk'>@@ -363,17 +351,6 @@ static void dg2_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> 			 SGSI_SIDECLK_DIS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pvc_init_clock_gating(struct drm_i915_private *i915)</div><div class='del'>-{</div><div class='del'>-	/* Wa_14012385139:pvc */</div><div class='del'>-	if (IS_PVC_BD_STEP(i915, STEP_A0, STEP_B0))</div><div class='del'>-		intel_uncore_rmw(&amp;i915-&gt;uncore, XEHP_CLOCK_GATE_DIS, 0, SGR_DIS);</div><div class='del'>-</div><div class='del'>-	/* Wa_22010954014:pvc */</div><div class='del'>-	if (IS_PVC_BD_STEP(i915, STEP_A0, STEP_B0))</div><div class='del'>-		intel_uncore_rmw(&amp;i915-&gt;uncore, XEHP_CLOCK_GATE_DIS, 0, SGSI_SIDECLK_DIS);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void cnp_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	if (!HAS_PCH_CNP(i915))</div><div class='hunk'>@@ -396,13 +373,6 @@ static void cfl_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> 	 * Display WA #0562: cfl</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_uncore_rmw(&amp;i915-&gt;uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WaFbcNukeOnHostModify:cfl</div><div class='del'>-	 * Display WA #0873: cfl</div><div class='del'>-	 */</div><div class='del'>-	intel_uncore_rmw(&amp;i915-&gt;uncore, ILK_DPFC_CHICKEN(INTEL_FBC_A),</div><div class='del'>-			 0, DPFC_NUKE_ON_ANY_MODIFICATION);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kbl_init_clock_gating(struct drm_i915_private *i915)</div><div class='hunk'>@@ -427,13 +397,6 @@ static void kbl_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> 	 * Display WA #0562: kbl</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_uncore_rmw(&amp;i915-&gt;uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WaFbcNukeOnHostModify:kbl</div><div class='del'>-	 * Display WA #0873: kbl</div><div class='del'>-	 */</div><div class='del'>-	intel_uncore_rmw(&amp;i915-&gt;uncore, ILK_DPFC_CHICKEN(INTEL_FBC_A),</div><div class='del'>-			 0, DPFC_NUKE_ON_ANY_MODIFICATION);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void skl_init_clock_gating(struct drm_i915_private *i915)</div><div class='hunk'>@@ -452,19 +415,6 @@ static void skl_init_clock_gating(struct drm_i915_private *i915)</div><div class='ctx'> 	 * Display WA #0562: skl</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_uncore_rmw(&amp;i915-&gt;uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WaFbcNukeOnHostModify:skl</div><div class='del'>-	 * Display WA #0873: skl</div><div class='del'>-	 */</div><div class='del'>-	intel_uncore_rmw(&amp;i915-&gt;uncore, ILK_DPFC_CHICKEN(INTEL_FBC_A),</div><div class='del'>-			 0, DPFC_NUKE_ON_ANY_MODIFICATION);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WaFbcHighMemBwCorruptionAvoidance:skl</div><div class='del'>-	 * Display WA #0883: skl</div><div class='del'>-	 */</div><div class='del'>-	intel_uncore_rmw(&amp;i915-&gt;uncore, ILK_DPFC_CHICKEN(INTEL_FBC_A), 0, DPFC_DISABLE_DUMMY0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bdw_init_clock_gating(struct drm_i915_private *i915)</div><div class='hunk'>@@ -762,9 +712,7 @@ static const struct drm_i915_clock_gating_funcs platform##_clock_gating_funcs =</div><div class='ctx'> 	.init_clock_gating = platform##_init_clock_gating,		\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-CG_FUNCS(pvc);</div><div class='ctx'> CG_FUNCS(dg2);</div><div class='del'>-CG_FUNCS(xehpsdv);</div><div class='ctx'> CG_FUNCS(cfl);</div><div class='ctx'> CG_FUNCS(skl);</div><div class='ctx'> CG_FUNCS(kbl);</div><div class='hunk'>@@ -797,12 +745,8 @@ CG_FUNCS(nop);</div><div class='ctx'>  */</div><div class='ctx'> void intel_clock_gating_hooks_init(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='del'>-	if (IS_PONTEVECCHIO(i915))</div><div class='del'>-		i915-&gt;clock_gating_funcs = &amp;pvc_clock_gating_funcs;</div><div class='del'>-	else if (IS_DG2(i915))</div><div class='add'>+	if (IS_DG2(i915))</div><div class='ctx'> 		i915-&gt;clock_gating_funcs = &amp;dg2_clock_gating_funcs;</div><div class='del'>-	else if (IS_XEHPSDV(i915))</div><div class='del'>-		i915-&gt;clock_gating_funcs = &amp;xehpsdv_clock_gating_funcs;</div><div class='ctx'> 	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))</div><div class='ctx'> 		i915-&gt;clock_gating_funcs = &amp;cfl_clock_gating_funcs;</div><div class='ctx'> 	else if (IS_SKYLAKE(i915))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c<br/>index 59bea1398c91..a0a43ea07f11 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_device_info.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_device_info.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_device_info.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_device_info.c</a></div><div class='hunk'>@@ -70,9 +70,7 @@ static const char * const platform_names[] = {</div><div class='ctx'> 	PLATFORM_NAME(DG1),</div><div class='ctx'> 	PLATFORM_NAME(ALDERLAKE_S),</div><div class='ctx'> 	PLATFORM_NAME(ALDERLAKE_P),</div><div class='del'>-	PLATFORM_NAME(XEHPSDV),</div><div class='ctx'> 	PLATFORM_NAME(DG2),</div><div class='del'>-	PLATFORM_NAME(PONTEVECCHIO),</div><div class='ctx'> 	PLATFORM_NAME(METEORLAKE),</div><div class='ctx'> };</div><div class='ctx'> #undef PLATFORM_NAME</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h<br/>index eba2f0b919c8..d1a2abc7e513 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_device_info.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_device_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_device_info.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_device_info.h</a></div><div class='hunk'>@@ -87,9 +87,7 @@ enum intel_platform {</div><div class='ctx'> 	INTEL_DG1,</div><div class='ctx'> 	INTEL_ALDERLAKE_S,</div><div class='ctx'> 	INTEL_ALDERLAKE_P,</div><div class='del'>-	INTEL_XEHPSDV,</div><div class='ctx'> 	INTEL_DG2,</div><div class='del'>-	INTEL_PONTEVECCHIO,</div><div class='ctx'> 	INTEL_METEORLAKE,</div><div class='ctx'> 	INTEL_MAX_PLATFORMS</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c<br/>index 87ecc5104fd9..e1a35f70b544 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_gvt_mmio_table.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_gvt_mmio_table.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_gvt_mmio_table.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_gvt_mmio_table.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright © 2020 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "display/bxt_dpio_phy_regs.h"</div><div class='ctx'> #include "display/intel_audio_regs.h"</div><div class='ctx'> #include "display/intel_backlight_regs.h"</div><div class='ctx'> #include "display/intel_color_regs.h"</div><div class='hunk'>@@ -10,9 +11,11 @@</div><div class='ctx'> #include "display/intel_dmc_regs.h"</div><div class='ctx'> #include "display/intel_dp_aux_regs.h"</div><div class='ctx'> #include "display/intel_dpio_phy.h"</div><div class='add'>+#include "display/intel_fbc_regs.h"</div><div class='ctx'> #include "display/intel_fdi_regs.h"</div><div class='ctx'> #include "display/intel_lvds_regs.h"</div><div class='ctx'> #include "display/intel_psr_regs.h"</div><div class='add'>+#include "display/intel_sprite_regs.h"</div><div class='ctx'> #include "display/skl_watermark_regs.h"</div><div class='ctx'> #include "display/vlv_dsi_pll_regs.h"</div><div class='ctx'> #include "gt/intel_engine_regs.h"</div><div class='hunk'>@@ -1155,11 +1158,11 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter)</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH0));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH0));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH0));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY0, DPIO_CH0));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 1));</div><div class='hunk'>@@ -1180,11 +1183,11 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter)</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH1));</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH1));</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH1));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH1, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH1));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH1));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH1));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY0, DPIO_CH1));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH1, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH1));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 1));</div><div class='hunk'>@@ -1205,11 +1208,11 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter)</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY1, DPIO_CH0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY1, DPIO_CH0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY1, DPIO_CH0));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY1, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY1, DPIO_CH0));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY1, DPIO_CH0));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY1, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY1, DPIO_CH0));</div><div class='del'>-	MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY1, DPIO_CH0));</div><div class='add'>+	MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY1, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY1, DPIO_CH0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 0));</div><div class='ctx'> 	MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 1));</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c<br/>index d4e844128826..2d0647aca964 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_runtime_pm.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_runtime_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_runtime_pm.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_runtime_pm.c</a></div><div class='hunk'>@@ -272,15 +272,11 @@ intel_wakeref_t intel_runtime_pm_get_if_active(struct intel_runtime_pm *rpm)</div><div class='ctx'>  * intel_runtime_pm_get_noresume - grab a runtime pm reference</div><div class='ctx'>  * @rpm: the intel_runtime_pm structure</div><div class='ctx'>  *</div><div class='del'>- * This function grabs a device-level runtime pm reference (mostly used for GEM</div><div class='del'>- * code to ensure the GTT or GT is on).</div><div class='add'>+ * This function grabs a device-level runtime pm reference.</div><div class='ctx'>  *</div><div class='del'>- * It will _not_ power up the device but instead only check that it's powered</div><div class='del'>- * on.  Therefore it is only valid to call this functions from contexts where</div><div class='del'>- * the device is known to be powered up and where trying to power it up would</div><div class='del'>- * result in hilarity and deadlocks. That pretty much means only the system</div><div class='del'>- * suspend/resume code where this is used to grab runtime pm references for</div><div class='del'>- * delayed setup down in work items.</div><div class='add'>+ * It will _not_ resume the device but instead only get an extra wakeref.</div><div class='add'>+ * Therefore it is only valid to call this functions from contexts where</div><div class='add'>+ * the device is known to be active and with another wakeref previously hold.</div><div class='ctx'>  *</div><div class='ctx'>  * Any runtime pm reference obtained by this function must have a symmetric</div><div class='ctx'>  * call to intel_runtime_pm_put() to release the reference again.</div><div class='hunk'>@@ -289,7 +285,7 @@ intel_wakeref_t intel_runtime_pm_get_if_active(struct intel_runtime_pm *rpm)</div><div class='ctx'>  */</div><div class='ctx'> intel_wakeref_t intel_runtime_pm_get_noresume(struct intel_runtime_pm *rpm)</div><div class='ctx'> {</div><div class='del'>-	assert_rpm_wakelock_held(rpm);</div><div class='add'>+	assert_rpm_raw_wakeref_held(rpm);</div><div class='ctx'> 	pm_runtime_get_noresume(rpm-&gt;kdev);</div><div class='ctx'> </div><div class='ctx'> 	intel_runtime_pm_acquire(rpm, true);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c<br/>index b4162f1be765..a5adfb5d8fd2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_step.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_step.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_step.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_step.c</a></div><div class='hunk'>@@ -102,13 +102,6 @@ static const struct intel_step_info adlp_revids[] = {</div><div class='ctx'> 	[0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct intel_step_info xehpsdv_revids[] = {</div><div class='del'>-	[0x0] = { COMMON_GT_MEDIA_STEP(A0) },</div><div class='del'>-	[0x1] = { COMMON_GT_MEDIA_STEP(A1) },</div><div class='del'>-	[0x4] = { COMMON_GT_MEDIA_STEP(B0) },</div><div class='del'>-	[0x8] = { COMMON_GT_MEDIA_STEP(C0) },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct intel_step_info dg2_g10_revid_step_tbl[] = {</div><div class='ctx'> 	[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },</div><div class='ctx'> 	[0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 },</div><div class='hunk'>@@ -153,8 +146,6 @@ static u8 gmd_to_intel_step(struct drm_i915_private *i915,</div><div class='ctx'> 	return step;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pvc_step_init(struct drm_i915_private *i915, int pci_revid);</div><div class='del'>-</div><div class='ctx'> void intel_step_init(struct drm_i915_private *i915)</div><div class='ctx'> {</div><div class='ctx'> 	const struct intel_step_info *revids = NULL;</div><div class='hunk'>@@ -178,10 +169,7 @@ void intel_step_init(struct drm_i915_private *i915)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_PONTEVECCHIO(i915)) {</div><div class='del'>-		pvc_step_init(i915, revid);</div><div class='del'>-		return;</div><div class='del'>-	} else if (IS_DG2_G10(i915)) {</div><div class='add'>+	if (IS_DG2_G10(i915)) {</div><div class='ctx'> 		revids = dg2_g10_revid_step_tbl;</div><div class='ctx'> 		size = ARRAY_SIZE(dg2_g10_revid_step_tbl);</div><div class='ctx'> 	} else if (IS_DG2_G11(i915)) {</div><div class='hunk'>@@ -190,9 +178,6 @@ void intel_step_init(struct drm_i915_private *i915)</div><div class='ctx'> 	} else if (IS_DG2_G12(i915)) {</div><div class='ctx'> 		revids = dg2_g12_revid_step_tbl;</div><div class='ctx'> 		size = ARRAY_SIZE(dg2_g12_revid_step_tbl);</div><div class='del'>-	} else if (IS_XEHPSDV(i915)) {</div><div class='del'>-		revids = xehpsdv_revids;</div><div class='del'>-		size = ARRAY_SIZE(xehpsdv_revids);</div><div class='ctx'> 	} else if (IS_ALDERLAKE_P_N(i915)) {</div><div class='ctx'> 		revids = adlp_n_revids;</div><div class='ctx'> 		size = ARRAY_SIZE(adlp_n_revids);</div><div class='hunk'>@@ -277,69 +262,6 @@ void intel_step_init(struct drm_i915_private *i915)</div><div class='ctx'> 	RUNTIME_INFO(i915)-&gt;step = step;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define PVC_BD_REVID	GENMASK(5, 3)</div><div class='del'>-#define PVC_CT_REVID	GENMASK(2, 0)</div><div class='del'>-</div><div class='del'>-static const int pvc_bd_subids[] = {</div><div class='del'>-	[0x0] = STEP_A0,</div><div class='del'>-	[0x3] = STEP_B0,</div><div class='del'>-	[0x4] = STEP_B1,</div><div class='del'>-	[0x5] = STEP_B3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const int pvc_ct_subids[] = {</div><div class='del'>-	[0x3] = STEP_A0,</div><div class='del'>-	[0x5] = STEP_B0,</div><div class='del'>-	[0x6] = STEP_B1,</div><div class='del'>-	[0x7] = STEP_C0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-pvc_step_lookup(struct drm_i915_private *i915, const char *type,</div><div class='del'>-		const int *table, int size, int subid)</div><div class='del'>-{</div><div class='del'>-	if (subid &lt; size &amp;&amp; table[subid] != STEP_NONE)</div><div class='del'>-		return table[subid];</div><div class='del'>-</div><div class='del'>-	drm_warn(&amp;i915-&gt;drm, "Unknown %s id 0x%02x\n", type, subid);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * As on other platforms, try to use the next higher ID if we land on a</div><div class='del'>-	 * gap in the table.</div><div class='del'>-	 */</div><div class='del'>-	while (subid &lt; size &amp;&amp; table[subid] == STEP_NONE)</div><div class='del'>-		subid++;</div><div class='del'>-</div><div class='del'>-	if (subid &lt; size) {</div><div class='del'>-		drm_dbg(&amp;i915-&gt;drm, "Using steppings for %s id 0x%02x\n",</div><div class='del'>-			type, subid);</div><div class='del'>-		return table[subid];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	drm_dbg(&amp;i915-&gt;drm, "Using future steppings\n");</div><div class='del'>-	return STEP_FUTURE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PVC needs special handling since we don't lookup the</div><div class='del'>- * revid in a table, but rather specific bitfields within</div><div class='del'>- * the revid for various components.</div><div class='del'>- */</div><div class='del'>-static void pvc_step_init(struct drm_i915_private *i915, int pci_revid)</div><div class='del'>-{</div><div class='del'>-	int ct_subid, bd_subid;</div><div class='del'>-</div><div class='del'>-	bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid);</div><div class='del'>-	ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid);</div><div class='del'>-</div><div class='del'>-	RUNTIME_INFO(i915)-&gt;step.basedie_step =</div><div class='del'>-		pvc_step_lookup(i915, "Base Die", pvc_bd_subids,</div><div class='del'>-				ARRAY_SIZE(pvc_bd_subids), bd_subid);</div><div class='del'>-	RUNTIME_INFO(i915)-&gt;step.graphics_step =</div><div class='del'>-		pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids,</div><div class='del'>-				ARRAY_SIZE(pvc_ct_subids), ct_subid);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define STEP_NAME_CASE(name)	\</div><div class='ctx'> 	case STEP_##name:	\</div><div class='ctx'> 		return #name;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c<br/>index 76400e9c40f0..729409a4bada 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_uncore.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/intel_uncore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/intel_uncore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/intel_uncore.c</a></div><div class='hunk'>@@ -1106,45 +1106,6 @@ static const struct i915_range dg2_shadowed_regs[] = {</div><div class='ctx'> 	{ .start = 0x1F8510, .end = 0x1F8550 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct i915_range pvc_shadowed_regs[] = {</div><div class='del'>-	{ .start =   0x2030, .end =   0x2030 },</div><div class='del'>-	{ .start =   0x2510, .end =   0x2550 },</div><div class='del'>-	{ .start =   0xA008, .end =   0xA00C },</div><div class='del'>-	{ .start =   0xA188, .end =   0xA188 },</div><div class='del'>-	{ .start =   0xA278, .end =   0xA278 },</div><div class='del'>-	{ .start =   0xA540, .end =   0xA56C },</div><div class='del'>-	{ .start =   0xC4C8, .end =   0xC4C8 },</div><div class='del'>-	{ .start =   0xC4E0, .end =   0xC4E0 },</div><div class='del'>-	{ .start =   0xC600, .end =   0xC600 },</div><div class='del'>-	{ .start =   0xC658, .end =   0xC658 },</div><div class='del'>-	{ .start =  0x22030, .end =  0x22030 },</div><div class='del'>-	{ .start =  0x22510, .end =  0x22550 },</div><div class='del'>-	{ .start = 0x1C0030, .end = 0x1C0030 },</div><div class='del'>-	{ .start = 0x1C0510, .end = 0x1C0550 },</div><div class='del'>-	{ .start = 0x1C4030, .end = 0x1C4030 },</div><div class='del'>-	{ .start = 0x1C4510, .end = 0x1C4550 },</div><div class='del'>-	{ .start = 0x1C8030, .end = 0x1C8030 },</div><div class='del'>-	{ .start = 0x1C8510, .end = 0x1C8550 },</div><div class='del'>-	{ .start = 0x1D0030, .end = 0x1D0030 },</div><div class='del'>-	{ .start = 0x1D0510, .end = 0x1D0550 },</div><div class='del'>-	{ .start = 0x1D4030, .end = 0x1D4030 },</div><div class='del'>-	{ .start = 0x1D4510, .end = 0x1D4550 },</div><div class='del'>-	{ .start = 0x1D8030, .end = 0x1D8030 },</div><div class='del'>-	{ .start = 0x1D8510, .end = 0x1D8550 },</div><div class='del'>-	{ .start = 0x1E0030, .end = 0x1E0030 },</div><div class='del'>-	{ .start = 0x1E0510, .end = 0x1E0550 },</div><div class='del'>-	{ .start = 0x1E4030, .end = 0x1E4030 },</div><div class='del'>-	{ .start = 0x1E4510, .end = 0x1E4550 },</div><div class='del'>-	{ .start = 0x1E8030, .end = 0x1E8030 },</div><div class='del'>-	{ .start = 0x1E8510, .end = 0x1E8550 },</div><div class='del'>-	{ .start = 0x1F0030, .end = 0x1F0030 },</div><div class='del'>-	{ .start = 0x1F0510, .end = 0x1F0550 },</div><div class='del'>-	{ .start = 0x1F4030, .end = 0x1F4030 },</div><div class='del'>-	{ .start = 0x1F4510, .end = 0x1F4550 },</div><div class='del'>-	{ .start = 0x1F8030, .end = 0x1F8030 },</div><div class='del'>-	{ .start = 0x1F8510, .end = 0x1F8550 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct i915_range mtl_shadowed_regs[] = {</div><div class='ctx'> 	{ .start =   0x2030, .end =   0x2030 },</div><div class='ctx'> 	{ .start =   0x2510, .end =   0x2550 },</div><div class='hunk'>@@ -1471,195 +1432,31 @@ static const struct intel_forcewake_range __gen12_fw_ranges[] = {</div><div class='ctx'> 		0x1d3f00 - 0x1d3fff: VD2 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Graphics IP version 12.55 brings a slight change to the 0xd800 range,</div><div class='del'>- * switching it from the GT domain to the render domain.</div><div class='del'>- */</div><div class='del'>-#define XEHP_FWRANGES(FW_RANGE_D800)					\</div><div class='del'>-	GEN_FW_RANGE(0x0, 0x1fff, 0), /*					\</div><div class='del'>-		  0x0 -  0xaff: reserved					\</div><div class='del'>-		0xb00 - 0x1fff: always on */					\</div><div class='del'>-	GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER),				\</div><div class='del'>-	GEN_FW_RANGE(0x2700, 0x4aff, FORCEWAKE_GT),				\</div><div class='del'>-	GEN_FW_RANGE(0x4b00, 0x51ff, 0), /*					\</div><div class='del'>-		0x4b00 - 0x4fff: reserved					\</div><div class='del'>-		0x5000 - 0x51ff: always on */					\</div><div class='del'>-	GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),				\</div><div class='del'>-	GEN_FW_RANGE(0x8000, 0x813f, FORCEWAKE_GT),				\</div><div class='del'>-	GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),				\</div><div class='del'>-	GEN_FW_RANGE(0x8160, 0x81ff, 0), /*					\</div><div class='del'>-		0x8160 - 0x817f: reserved					\</div><div class='del'>-		0x8180 - 0x81ff: always on */					\</div><div class='del'>-	GEN_FW_RANGE(0x8200, 0x82ff, FORCEWAKE_GT),				\</div><div class='del'>-	GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),				\</div><div class='del'>-	GEN_FW_RANGE(0x8500, 0x8cff, FORCEWAKE_GT), /*				\</div><div class='del'>-		0x8500 - 0x87ff: gt						\</div><div class='del'>-		0x8800 - 0x8c7f: reserved					\</div><div class='del'>-		0x8c80 - 0x8cff: gt (DG2 only) */				\</div><div class='del'>-	GEN_FW_RANGE(0x8d00, 0x8fff, FORCEWAKE_RENDER), /*			\</div><div class='del'>-		0x8d00 - 0x8dff: render (DG2 only)				\</div><div class='del'>-		0x8e00 - 0x8fff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x9000, 0x94cf, FORCEWAKE_GT), /*				\</div><div class='del'>-		0x9000 - 0x947f: gt						\</div><div class='del'>-		0x9480 - 0x94cf: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x94d0, 0x955f, FORCEWAKE_RENDER),				\</div><div class='del'>-	GEN_FW_RANGE(0x9560, 0x967f, 0), /*					\</div><div class='del'>-		0x9560 - 0x95ff: always on					\</div><div class='del'>-		0x9600 - 0x967f: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x9680, 0x97ff, FORCEWAKE_RENDER), /*			\</div><div class='del'>-		0x9680 - 0x96ff: render (DG2 only)				\</div><div class='del'>-		0x9700 - 0x97ff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x9800, 0xcfff, FORCEWAKE_GT), /*				\</div><div class='del'>-		0x9800 - 0xb4ff: gt						\</div><div class='del'>-		0xb500 - 0xbfff: reserved					\</div><div class='del'>-		0xc000 - 0xcfff: gt */						\</div><div class='del'>-	GEN_FW_RANGE(0xd000, 0xd7ff, 0),					\</div><div class='del'>-	GEN_FW_RANGE(0xd800, 0xd87f, FW_RANGE_D800),			\</div><div class='del'>-	GEN_FW_RANGE(0xd880, 0xdbff, FORCEWAKE_GT),				\</div><div class='del'>-	GEN_FW_RANGE(0xdc00, 0xdcff, FORCEWAKE_RENDER),				\</div><div class='del'>-	GEN_FW_RANGE(0xdd00, 0xde7f, FORCEWAKE_GT), /*				\</div><div class='del'>-		0xdd00 - 0xddff: gt						\</div><div class='del'>-		0xde00 - 0xde7f: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0xde80, 0xe8ff, FORCEWAKE_RENDER), /*			\</div><div class='del'>-		0xde80 - 0xdfff: render						\</div><div class='del'>-		0xe000 - 0xe0ff: reserved					\</div><div class='del'>-		0xe100 - 0xe8ff: render */					\</div><div class='del'>-	GEN_FW_RANGE(0xe900, 0xffff, FORCEWAKE_GT), /*				\</div><div class='del'>-		0xe900 - 0xe9ff: gt						\</div><div class='del'>-		0xea00 - 0xefff: reserved					\</div><div class='del'>-		0xf000 - 0xffff: gt */						\</div><div class='del'>-	GEN_FW_RANGE(0x10000, 0x12fff, 0), /*					\</div><div class='del'>-		0x10000 - 0x11fff: reserved					\</div><div class='del'>-		0x12000 - 0x127ff: always on					\</div><div class='del'>-		0x12800 - 0x12fff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x13000, 0x131ff, FORCEWAKE_MEDIA_VDBOX0), /* DG2 only */	\</div><div class='del'>-	GEN_FW_RANGE(0x13200, 0x13fff, FORCEWAKE_MEDIA_VDBOX2), /*		\</div><div class='del'>-		0x13200 - 0x133ff: VD2 (DG2 only)				\</div><div class='del'>-		0x13400 - 0x13fff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x14000, 0x141ff, FORCEWAKE_MEDIA_VDBOX0), /* XEHPSDV only */	\</div><div class='del'>-	GEN_FW_RANGE(0x14200, 0x143ff, FORCEWAKE_MEDIA_VDBOX2), /* XEHPSDV only */	\</div><div class='del'>-	GEN_FW_RANGE(0x14400, 0x145ff, FORCEWAKE_MEDIA_VDBOX4), /* XEHPSDV only */	\</div><div class='del'>-	GEN_FW_RANGE(0x14600, 0x147ff, FORCEWAKE_MEDIA_VDBOX6), /* XEHPSDV only */	\</div><div class='del'>-	GEN_FW_RANGE(0x14800, 0x14fff, FORCEWAKE_RENDER),			\</div><div class='del'>-	GEN_FW_RANGE(0x15000, 0x16dff, FORCEWAKE_GT), /*			\</div><div class='del'>-		0x15000 - 0x15fff: gt (DG2 only)				\</div><div class='del'>-		0x16000 - 0x16dff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x16e00, 0x1ffff, FORCEWAKE_RENDER),			\</div><div class='del'>-	GEN_FW_RANGE(0x20000, 0x21fff, FORCEWAKE_MEDIA_VDBOX0), /*		\</div><div class='del'>-		0x20000 - 0x20fff: VD0 (XEHPSDV only)				\</div><div class='del'>-		0x21000 - 0x21fff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x22000, 0x23fff, FORCEWAKE_GT),				\</div><div class='del'>-	GEN_FW_RANGE(0x24000, 0x2417f, 0), /*					\</div><div class='del'>-		0x24000 - 0x2407f: always on					\</div><div class='del'>-		0x24080 - 0x2417f: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x24180, 0x249ff, FORCEWAKE_GT), /*			\</div><div class='del'>-		0x24180 - 0x241ff: gt						\</div><div class='del'>-		0x24200 - 0x249ff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x24a00, 0x251ff, FORCEWAKE_RENDER), /*			\</div><div class='del'>-		0x24a00 - 0x24a7f: render					\</div><div class='del'>-		0x24a80 - 0x251ff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x25200, 0x25fff, FORCEWAKE_GT), /*			\</div><div class='del'>-		0x25200 - 0x252ff: gt						\</div><div class='del'>-		0x25300 - 0x25fff: reserved */					\</div><div class='del'>-	GEN_FW_RANGE(0x26000, 0x2ffff, FORCEWAKE_RENDER), /*			\</div><div class='del'>-		0x26000 - 0x27fff: render					\</div><div class='del'>-		0x28000 - 0x29fff: reserved					\</div><div class='del'>-		0x2a000 - 0x2ffff: undocumented */				\</div><div class='del'>-	GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_GT),				\</div><div class='del'>-	GEN_FW_RANGE(0x40000, 0x1bffff, 0),					\</div><div class='del'>-	GEN_FW_RANGE(0x1c0000, 0x1c3fff, FORCEWAKE_MEDIA_VDBOX0), /*		\</div><div class='del'>-		0x1c0000 - 0x1c2bff: VD0					\</div><div class='del'>-		0x1c2c00 - 0x1c2cff: reserved					\</div><div class='del'>-		0x1c2d00 - 0x1c2dff: VD0					\</div><div class='del'>-		0x1c2e00 - 0x1c3eff: VD0 (DG2 only)				\</div><div class='del'>-		0x1c3f00 - 0x1c3fff: VD0 */					\</div><div class='del'>-	GEN_FW_RANGE(0x1c4000, 0x1c7fff, FORCEWAKE_MEDIA_VDBOX1), /*		\</div><div class='del'>-		0x1c4000 - 0x1c6bff: VD1					\</div><div class='del'>-		0x1c6c00 - 0x1c6cff: reserved					\</div><div class='del'>-		0x1c6d00 - 0x1c6dff: VD1					\</div><div class='del'>-		0x1c6e00 - 0x1c7fff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1c8000, 0x1cbfff, FORCEWAKE_MEDIA_VEBOX0), /*		\</div><div class='del'>-		0x1c8000 - 0x1ca0ff: VE0					\</div><div class='del'>-		0x1ca100 - 0x1cbfff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1cc000, 0x1ccfff, FORCEWAKE_MEDIA_VDBOX0),		\</div><div class='del'>-	GEN_FW_RANGE(0x1cd000, 0x1cdfff, FORCEWAKE_MEDIA_VDBOX2),		\</div><div class='del'>-	GEN_FW_RANGE(0x1ce000, 0x1cefff, FORCEWAKE_MEDIA_VDBOX4),		\</div><div class='del'>-	GEN_FW_RANGE(0x1cf000, 0x1cffff, FORCEWAKE_MEDIA_VDBOX6),		\</div><div class='del'>-	GEN_FW_RANGE(0x1d0000, 0x1d3fff, FORCEWAKE_MEDIA_VDBOX2), /*		\</div><div class='del'>-		0x1d0000 - 0x1d2bff: VD2					\</div><div class='del'>-		0x1d2c00 - 0x1d2cff: reserved					\</div><div class='del'>-		0x1d2d00 - 0x1d2dff: VD2					\</div><div class='del'>-		0x1d2e00 - 0x1d3dff: VD2 (DG2 only)				\</div><div class='del'>-		0x1d3e00 - 0x1d3eff: reserved					\</div><div class='del'>-		0x1d3f00 - 0x1d3fff: VD2 */					\</div><div class='del'>-	GEN_FW_RANGE(0x1d4000, 0x1d7fff, FORCEWAKE_MEDIA_VDBOX3), /*		\</div><div class='del'>-		0x1d4000 - 0x1d6bff: VD3					\</div><div class='del'>-		0x1d6c00 - 0x1d6cff: reserved					\</div><div class='del'>-		0x1d6d00 - 0x1d6dff: VD3					\</div><div class='del'>-		0x1d6e00 - 0x1d7fff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1d8000, 0x1dffff, FORCEWAKE_MEDIA_VEBOX1), /*		\</div><div class='del'>-		0x1d8000 - 0x1da0ff: VE1					\</div><div class='del'>-		0x1da100 - 0x1dffff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1e0000, 0x1e3fff, FORCEWAKE_MEDIA_VDBOX4), /*		\</div><div class='del'>-		0x1e0000 - 0x1e2bff: VD4					\</div><div class='del'>-		0x1e2c00 - 0x1e2cff: reserved					\</div><div class='del'>-		0x1e2d00 - 0x1e2dff: VD4					\</div><div class='del'>-		0x1e2e00 - 0x1e3eff: reserved					\</div><div class='del'>-		0x1e3f00 - 0x1e3fff: VD4 */					\</div><div class='del'>-	GEN_FW_RANGE(0x1e4000, 0x1e7fff, FORCEWAKE_MEDIA_VDBOX5), /*		\</div><div class='del'>-		0x1e4000 - 0x1e6bff: VD5					\</div><div class='del'>-		0x1e6c00 - 0x1e6cff: reserved					\</div><div class='del'>-		0x1e6d00 - 0x1e6dff: VD5					\</div><div class='del'>-		0x1e6e00 - 0x1e7fff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1e8000, 0x1effff, FORCEWAKE_MEDIA_VEBOX2), /*		\</div><div class='del'>-		0x1e8000 - 0x1ea0ff: VE2					\</div><div class='del'>-		0x1ea100 - 0x1effff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1f0000, 0x1f3fff, FORCEWAKE_MEDIA_VDBOX6), /*		\</div><div class='del'>-		0x1f0000 - 0x1f2bff: VD6					\</div><div class='del'>-		0x1f2c00 - 0x1f2cff: reserved					\</div><div class='del'>-		0x1f2d00 - 0x1f2dff: VD6					\</div><div class='del'>-		0x1f2e00 - 0x1f3eff: reserved					\</div><div class='del'>-		0x1f3f00 - 0x1f3fff: VD6 */					\</div><div class='del'>-	GEN_FW_RANGE(0x1f4000, 0x1f7fff, FORCEWAKE_MEDIA_VDBOX7), /*		\</div><div class='del'>-		0x1f4000 - 0x1f6bff: VD7					\</div><div class='del'>-		0x1f6c00 - 0x1f6cff: reserved					\</div><div class='del'>-		0x1f6d00 - 0x1f6dff: VD7					\</div><div class='del'>-		0x1f6e00 - 0x1f7fff: reserved */				\</div><div class='del'>-	GEN_FW_RANGE(0x1f8000, 0x1fa0ff, FORCEWAKE_MEDIA_VEBOX3),</div><div class='del'>-</div><div class='del'>-static const struct intel_forcewake_range __xehp_fw_ranges[] = {</div><div class='del'>-	XEHP_FWRANGES(FORCEWAKE_GT)</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct intel_forcewake_range __dg2_fw_ranges[] = {</div><div class='del'>-	XEHP_FWRANGES(FORCEWAKE_RENDER)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct intel_forcewake_range __pvc_fw_ranges[] = {</div><div class='del'>-	GEN_FW_RANGE(0x0, 0xaff, 0),</div><div class='del'>-	GEN_FW_RANGE(0xb00, 0xbff, FORCEWAKE_GT),</div><div class='del'>-	GEN_FW_RANGE(0xc00, 0xfff, 0),</div><div class='del'>-	GEN_FW_RANGE(0x1000, 0x1fff, FORCEWAKE_GT),</div><div class='add'>+	GEN_FW_RANGE(0x0, 0x1fff, 0), /*</div><div class='add'>+		  0x0 -  0xaff: reserved</div><div class='add'>+		0xb00 - 0x1fff: always on */</div><div class='ctx'> 	GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER),</div><div class='del'>-	GEN_FW_RANGE(0x2700, 0x2fff, FORCEWAKE_GT),</div><div class='del'>-	GEN_FW_RANGE(0x3000, 0x3fff, FORCEWAKE_RENDER),</div><div class='del'>-	GEN_FW_RANGE(0x4000, 0x813f, FORCEWAKE_GT), /*</div><div class='del'>-		0x4000 - 0x4aff: gt</div><div class='add'>+	GEN_FW_RANGE(0x2700, 0x4aff, FORCEWAKE_GT),</div><div class='add'>+	GEN_FW_RANGE(0x4b00, 0x51ff, 0), /*</div><div class='ctx'> 		0x4b00 - 0x4fff: reserved</div><div class='del'>-		0x5000 - 0x51ff: gt</div><div class='del'>-		0x5200 - 0x52ff: reserved</div><div class='del'>-		0x5300 - 0x53ff: gt</div><div class='del'>-		0x5400 - 0x7fff: reserved</div><div class='del'>-		0x8000 - 0x813f: gt */</div><div class='del'>-	GEN_FW_RANGE(0x8140, 0x817f, FORCEWAKE_RENDER),</div><div class='del'>-	GEN_FW_RANGE(0x8180, 0x81ff, 0),</div><div class='del'>-	GEN_FW_RANGE(0x8200, 0x94cf, FORCEWAKE_GT), /*</div><div class='del'>-		0x8200 - 0x82ff: gt</div><div class='del'>-		0x8300 - 0x84ff: reserved</div><div class='del'>-		0x8500 - 0x887f: gt</div><div class='del'>-		0x8880 - 0x8a7f: reserved</div><div class='del'>-		0x8a80 - 0x8aff: gt</div><div class='del'>-		0x8b00 - 0x8fff: reserved</div><div class='add'>+		0x5000 - 0x51ff: always on */</div><div class='add'>+	GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),</div><div class='add'>+	GEN_FW_RANGE(0x8000, 0x813f, FORCEWAKE_GT),</div><div class='add'>+	GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),</div><div class='add'>+	GEN_FW_RANGE(0x8160, 0x81ff, 0), /*</div><div class='add'>+		0x8160 - 0x817f: reserved</div><div class='add'>+		0x8180 - 0x81ff: always on */</div><div class='add'>+	GEN_FW_RANGE(0x8200, 0x82ff, FORCEWAKE_GT),</div><div class='add'>+	GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),</div><div class='add'>+	GEN_FW_RANGE(0x8500, 0x8cff, FORCEWAKE_GT), /*</div><div class='add'>+		0x8500 - 0x87ff: gt</div><div class='add'>+		0x8800 - 0x8c7f: reserved</div><div class='add'>+		0x8c80 - 0x8cff: gt (DG2 only) */</div><div class='add'>+	GEN_FW_RANGE(0x8d00, 0x8fff, FORCEWAKE_RENDER), /*</div><div class='add'>+		0x8d00 - 0x8dff: render (DG2 only)</div><div class='add'>+		0x8e00 - 0x8fff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x9000, 0x94cf, FORCEWAKE_GT), /*</div><div class='ctx'> 		0x9000 - 0x947f: gt</div><div class='ctx'> 		0x9480 - 0x94cf: reserved */</div><div class='ctx'> 	GEN_FW_RANGE(0x94d0, 0x955f, FORCEWAKE_RENDER),</div><div class='hunk'>@@ -1673,65 +1470,114 @@ static const struct intel_forcewake_range __pvc_fw_ranges[] = {</div><div class='ctx'> 		0x9800 - 0xb4ff: gt</div><div class='ctx'> 		0xb500 - 0xbfff: reserved</div><div class='ctx'> 		0xc000 - 0xcfff: gt */</div><div class='del'>-	GEN_FW_RANGE(0xd000, 0xd3ff, 0),</div><div class='del'>-	GEN_FW_RANGE(0xd400, 0xdbff, FORCEWAKE_GT),</div><div class='add'>+	GEN_FW_RANGE(0xd000, 0xd7ff, 0),</div><div class='add'>+	GEN_FW_RANGE(0xd800, 0xd87f, FORCEWAKE_RENDER),</div><div class='add'>+	GEN_FW_RANGE(0xd880, 0xdbff, FORCEWAKE_GT),</div><div class='ctx'> 	GEN_FW_RANGE(0xdc00, 0xdcff, FORCEWAKE_RENDER),</div><div class='ctx'> 	GEN_FW_RANGE(0xdd00, 0xde7f, FORCEWAKE_GT), /*</div><div class='ctx'> 		0xdd00 - 0xddff: gt</div><div class='ctx'> 		0xde00 - 0xde7f: reserved */</div><div class='ctx'> 	GEN_FW_RANGE(0xde80, 0xe8ff, FORCEWAKE_RENDER), /*</div><div class='del'>-		0xde80 - 0xdeff: render</div><div class='del'>-		0xdf00 - 0xe1ff: reserved</div><div class='del'>-		0xe200 - 0xe7ff: render</div><div class='del'>-		0xe800 - 0xe8ff: reserved */</div><div class='del'>-	GEN_FW_RANGE(0xe900, 0x11fff, FORCEWAKE_GT), /*</div><div class='del'>-		 0xe900 -  0xe9ff: gt</div><div class='del'>-		 0xea00 -  0xebff: reserved</div><div class='del'>-		 0xec00 -  0xffff: gt</div><div class='del'>-		0x10000 - 0x11fff: reserved */</div><div class='del'>-	GEN_FW_RANGE(0x12000, 0x12fff, 0), /*</div><div class='add'>+		0xde80 - 0xdfff: render</div><div class='add'>+		0xe000 - 0xe0ff: reserved</div><div class='add'>+		0xe100 - 0xe8ff: render */</div><div class='add'>+	GEN_FW_RANGE(0xe900, 0xffff, FORCEWAKE_GT), /*</div><div class='add'>+		0xe900 - 0xe9ff: gt</div><div class='add'>+		0xea00 - 0xefff: reserved</div><div class='add'>+		0xf000 - 0xffff: gt */</div><div class='add'>+	GEN_FW_RANGE(0x10000, 0x12fff, 0), /*</div><div class='add'>+		0x10000 - 0x11fff: reserved</div><div class='ctx'> 		0x12000 - 0x127ff: always on</div><div class='ctx'> 		0x12800 - 0x12fff: reserved */</div><div class='del'>-	GEN_FW_RANGE(0x13000, 0x19fff, FORCEWAKE_GT), /*</div><div class='del'>-		0x13000 - 0x135ff: gt</div><div class='del'>-		0x13600 - 0x147ff: reserved</div><div class='del'>-		0x14800 - 0x153ff: gt</div><div class='del'>-		0x15400 - 0x19fff: reserved */</div><div class='del'>-	GEN_FW_RANGE(0x1a000, 0x21fff, FORCEWAKE_RENDER), /*</div><div class='del'>-		0x1a000 - 0x1ffff: render</div><div class='add'>+	GEN_FW_RANGE(0x13000, 0x131ff, FORCEWAKE_MEDIA_VDBOX0),</div><div class='add'>+	GEN_FW_RANGE(0x13200, 0x147ff, FORCEWAKE_MEDIA_VDBOX2), /*</div><div class='add'>+		0x13200 - 0x133ff: VD2 (DG2 only)</div><div class='add'>+		0x13400 - 0x147ff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x14800, 0x14fff, FORCEWAKE_RENDER),</div><div class='add'>+	GEN_FW_RANGE(0x15000, 0x16dff, FORCEWAKE_GT), /*</div><div class='add'>+		0x15000 - 0x15fff: gt (DG2 only)</div><div class='add'>+		0x16000 - 0x16dff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x16e00, 0x21fff, FORCEWAKE_RENDER), /*</div><div class='add'>+		0x16e00 - 0x1ffff: render</div><div class='ctx'> 		0x20000 - 0x21fff: reserved */</div><div class='ctx'> 	GEN_FW_RANGE(0x22000, 0x23fff, FORCEWAKE_GT),</div><div class='ctx'> 	GEN_FW_RANGE(0x24000, 0x2417f, 0), /*</div><div class='del'>-		24000 - 0x2407f: always on</div><div class='del'>-		24080 - 0x2417f: reserved */</div><div class='del'>-	GEN_FW_RANGE(0x24180, 0x25fff, FORCEWAKE_GT), /*</div><div class='add'>+		0x24000 - 0x2407f: always on</div><div class='add'>+		0x24080 - 0x2417f: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x24180, 0x249ff, FORCEWAKE_GT), /*</div><div class='ctx'> 		0x24180 - 0x241ff: gt</div><div class='del'>-		0x24200 - 0x251ff: reserved</div><div class='add'>+		0x24200 - 0x249ff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x24a00, 0x251ff, FORCEWAKE_RENDER), /*</div><div class='add'>+		0x24a00 - 0x24a7f: render</div><div class='add'>+		0x24a80 - 0x251ff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x25200, 0x25fff, FORCEWAKE_GT), /*</div><div class='ctx'> 		0x25200 - 0x252ff: gt</div><div class='ctx'> 		0x25300 - 0x25fff: reserved */</div><div class='ctx'> 	GEN_FW_RANGE(0x26000, 0x2ffff, FORCEWAKE_RENDER), /*</div><div class='ctx'> 		0x26000 - 0x27fff: render</div><div class='del'>-		0x28000 - 0x2ffff: reserved */</div><div class='add'>+		0x28000 - 0x29fff: reserved</div><div class='add'>+		0x2a000 - 0x2ffff: undocumented */</div><div class='ctx'> 	GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_GT),</div><div class='ctx'> 	GEN_FW_RANGE(0x40000, 0x1bffff, 0),</div><div class='ctx'> 	GEN_FW_RANGE(0x1c0000, 0x1c3fff, FORCEWAKE_MEDIA_VDBOX0), /*</div><div class='ctx'> 		0x1c0000 - 0x1c2bff: VD0</div><div class='ctx'> 		0x1c2c00 - 0x1c2cff: reserved</div><div class='ctx'> 		0x1c2d00 - 0x1c2dff: VD0</div><div class='del'>-		0x1c2e00 - 0x1c3eff: reserved</div><div class='add'>+		0x1c2e00 - 0x1c3eff: VD0</div><div class='ctx'> 		0x1c3f00 - 0x1c3fff: VD0 */</div><div class='del'>-	GEN_FW_RANGE(0x1c4000, 0x1cffff, FORCEWAKE_MEDIA_VDBOX1), /*</div><div class='del'>-		0x1c4000 - 0x1c6aff: VD1</div><div class='del'>-		0x1c6b00 - 0x1c7eff: reserved</div><div class='del'>-		0x1c7f00 - 0x1c7fff: VD1</div><div class='del'>-		0x1c8000 - 0x1cffff: reserved */</div><div class='del'>-	GEN_FW_RANGE(0x1d0000, 0x23ffff, FORCEWAKE_MEDIA_VDBOX2), /*</div><div class='del'>-		0x1d0000 - 0x1d2aff: VD2</div><div class='del'>-		0x1d2b00 - 0x1d3eff: reserved</div><div class='del'>-		0x1d3f00 - 0x1d3fff: VD2</div><div class='del'>-		0x1d4000 - 0x23ffff: reserved */</div><div class='del'>-	GEN_FW_RANGE(0x240000, 0x3dffff, 0),</div><div class='del'>-	GEN_FW_RANGE(0x3e0000, 0x3effff, FORCEWAKE_GT),</div><div class='add'>+	GEN_FW_RANGE(0x1c4000, 0x1c7fff, FORCEWAKE_MEDIA_VDBOX1), /*</div><div class='add'>+		0x1c4000 - 0x1c6bff: VD1</div><div class='add'>+		0x1c6c00 - 0x1c6cff: reserved</div><div class='add'>+		0x1c6d00 - 0x1c6dff: VD1</div><div class='add'>+		0x1c6e00 - 0x1c7fff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1c8000, 0x1cbfff, FORCEWAKE_MEDIA_VEBOX0), /*</div><div class='add'>+		0x1c8000 - 0x1ca0ff: VE0</div><div class='add'>+		0x1ca100 - 0x1cbfff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1cc000, 0x1ccfff, FORCEWAKE_MEDIA_VDBOX0),</div><div class='add'>+	GEN_FW_RANGE(0x1cd000, 0x1cdfff, FORCEWAKE_MEDIA_VDBOX2),</div><div class='add'>+	GEN_FW_RANGE(0x1ce000, 0x1cefff, FORCEWAKE_MEDIA_VDBOX4),</div><div class='add'>+	GEN_FW_RANGE(0x1cf000, 0x1cffff, FORCEWAKE_MEDIA_VDBOX6),</div><div class='add'>+	GEN_FW_RANGE(0x1d0000, 0x1d3fff, FORCEWAKE_MEDIA_VDBOX2), /*</div><div class='add'>+		0x1d0000 - 0x1d2bff: VD2</div><div class='add'>+		0x1d2c00 - 0x1d2cff: reserved</div><div class='add'>+		0x1d2d00 - 0x1d2dff: VD2</div><div class='add'>+		0x1d2e00 - 0x1d3dff: VD2</div><div class='add'>+		0x1d3e00 - 0x1d3eff: reserved</div><div class='add'>+		0x1d3f00 - 0x1d3fff: VD2 */</div><div class='add'>+	GEN_FW_RANGE(0x1d4000, 0x1d7fff, FORCEWAKE_MEDIA_VDBOX3), /*</div><div class='add'>+		0x1d4000 - 0x1d6bff: VD3</div><div class='add'>+		0x1d6c00 - 0x1d6cff: reserved</div><div class='add'>+		0x1d6d00 - 0x1d6dff: VD3</div><div class='add'>+		0x1d6e00 - 0x1d7fff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1d8000, 0x1dffff, FORCEWAKE_MEDIA_VEBOX1), /*</div><div class='add'>+		0x1d8000 - 0x1da0ff: VE1</div><div class='add'>+		0x1da100 - 0x1dffff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1e0000, 0x1e3fff, FORCEWAKE_MEDIA_VDBOX4), /*</div><div class='add'>+		0x1e0000 - 0x1e2bff: VD4</div><div class='add'>+		0x1e2c00 - 0x1e2cff: reserved</div><div class='add'>+		0x1e2d00 - 0x1e2dff: VD4</div><div class='add'>+		0x1e2e00 - 0x1e3eff: reserved</div><div class='add'>+		0x1e3f00 - 0x1e3fff: VD4 */</div><div class='add'>+	GEN_FW_RANGE(0x1e4000, 0x1e7fff, FORCEWAKE_MEDIA_VDBOX5), /*</div><div class='add'>+		0x1e4000 - 0x1e6bff: VD5</div><div class='add'>+		0x1e6c00 - 0x1e6cff: reserved</div><div class='add'>+		0x1e6d00 - 0x1e6dff: VD5</div><div class='add'>+		0x1e6e00 - 0x1e7fff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1e8000, 0x1effff, FORCEWAKE_MEDIA_VEBOX2), /*</div><div class='add'>+		0x1e8000 - 0x1ea0ff: VE2</div><div class='add'>+		0x1ea100 - 0x1effff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1f0000, 0x1f3fff, FORCEWAKE_MEDIA_VDBOX6), /*</div><div class='add'>+		0x1f0000 - 0x1f2bff: VD6</div><div class='add'>+		0x1f2c00 - 0x1f2cff: reserved</div><div class='add'>+		0x1f2d00 - 0x1f2dff: VD6</div><div class='add'>+		0x1f2e00 - 0x1f3eff: reserved</div><div class='add'>+		0x1f3f00 - 0x1f3fff: VD6 */</div><div class='add'>+	GEN_FW_RANGE(0x1f4000, 0x1f7fff, FORCEWAKE_MEDIA_VDBOX7), /*</div><div class='add'>+		0x1f4000 - 0x1f6bff: VD7</div><div class='add'>+		0x1f6c00 - 0x1f6cff: reserved</div><div class='add'>+		0x1f6d00 - 0x1f6dff: VD7</div><div class='add'>+		0x1f6e00 - 0x1f7fff: reserved */</div><div class='add'>+	GEN_FW_RANGE(0x1f8000, 0x1fa0ff, FORCEWAKE_MEDIA_VEBOX3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct intel_forcewake_range __mtl_fw_ranges[] = {</div><div class='hunk'>@@ -2576,18 +2422,10 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)</div><div class='ctx'> 		ASSIGN_FW_DOMAINS_TABLE(uncore, __mtl_fw_ranges);</div><div class='ctx'> 		ASSIGN_SHADOW_TABLE(uncore, mtl_shadowed_regs);</div><div class='ctx'> 		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);</div><div class='del'>-	} else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 60)) {</div><div class='del'>-		ASSIGN_FW_DOMAINS_TABLE(uncore, __pvc_fw_ranges);</div><div class='del'>-		ASSIGN_SHADOW_TABLE(uncore, pvc_shadowed_regs);</div><div class='del'>-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);</div><div class='ctx'> 	} else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 55)) {</div><div class='ctx'> 		ASSIGN_FW_DOMAINS_TABLE(uncore, __dg2_fw_ranges);</div><div class='ctx'> 		ASSIGN_SHADOW_TABLE(uncore, dg2_shadowed_regs);</div><div class='ctx'> 		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);</div><div class='del'>-	} else if (GRAPHICS_VER_FULL(i915) &gt;= IP_VER(12, 50)) {</div><div class='del'>-		ASSIGN_FW_DOMAINS_TABLE(uncore, __xehp_fw_ranges);</div><div class='del'>-		ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);</div><div class='del'>-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);</div><div class='ctx'> 	} else if (GRAPHICS_VER(i915) &gt;= 12) {</div><div class='ctx'> 		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges);</div><div class='ctx'> 		ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);</div><div class='hunk'>@@ -2734,7 +2572,7 @@ void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore,</div><div class='ctx'> 		 * the forcewake domain if any of the other engines</div><div class='ctx'> 		 * in the same media slice are present.</div><div class='ctx'> 		 */</div><div class='del'>-		if (GRAPHICS_VER_FULL(uncore-&gt;i915) &gt;= IP_VER(12, 50) &amp;&amp; i % 2 == 0) {</div><div class='add'>+		if (GRAPHICS_VER_FULL(uncore-&gt;i915) &gt;= IP_VER(12, 55) &amp;&amp; i % 2 == 0) {</div><div class='ctx'> 			if ((i + 1 &lt; I915_MAX_VCS) &amp;&amp; HAS_ENGINE(gt, _VCS(i + 1)))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c<br/>index ee79e0809a6d..fee76c1d2f45 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/selftests/i915_selftest.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/selftests/i915_selftest.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/selftests/i915_selftest.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/selftests/i915_selftest.c</a></div><div class='hunk'>@@ -154,6 +154,30 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)</div><div class='ctx'> 		pr_warn(DRIVER_NAME "Timed out waiting for gsc_proxy_completion!\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+__wait_gsc_huc_load_completed(struct drm_i915_private *i915)</div><div class='add'>+{</div><div class='add'>+	/* this only applies to DG2, so we only care about GT0 */</div><div class='add'>+	struct intel_huc *huc = &amp;to_gt(i915)-&gt;uc.huc;</div><div class='add'>+	bool need_to_wait = (IS_ENABLED(CONFIG_INTEL_MEI_PXP) &amp;&amp;</div><div class='add'>+			     intel_huc_wait_required(huc));</div><div class='add'>+	/*</div><div class='add'>+	 * The GSC and PXP mei bringup depends on the kernel boot ordering, so</div><div class='add'>+	 * to account for the worst case scenario the HuC code waits for up to</div><div class='add'>+	 * 10s for the GSC driver to load and then another 5s for the PXP</div><div class='add'>+	 * component to bind before giving up, even though those steps normally</div><div class='add'>+	 * complete in less than a second from the i915 load. We match that</div><div class='add'>+	 * timeout here, but we expect to bail early due to the fence being</div><div class='add'>+	 * signalled even in a failure case, as it is extremely unlikely that</div><div class='add'>+	 * both components will use their full timeout.</div><div class='add'>+	 */</div><div class='add'>+	unsigned long timeout_ms = 15000;</div><div class='add'>+</div><div class='add'>+	if (need_to_wait &amp;&amp;</div><div class='add'>+	    wait_for(i915_sw_fence_done(&amp;huc-&gt;delayed_load.fence), timeout_ms))</div><div class='add'>+		pr_warn(DRIVER_NAME "Timed out waiting for huc load via GSC!\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __run_selftests(const char *name,</div><div class='ctx'> 			   struct selftest *st,</div><div class='ctx'> 			   unsigned int count,</div><div class='hunk'>@@ -228,14 +252,16 @@ int i915_mock_selftests(void)</div><div class='ctx'> </div><div class='ctx'> int i915_live_selftests(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = pdev_to_i915(pdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!i915_selftest.live)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	__wait_gsc_proxy_completed(pdev_to_i915(pdev));</div><div class='add'>+	__wait_gsc_proxy_completed(i915);</div><div class='add'>+	__wait_gsc_huc_load_completed(i915);</div><div class='ctx'> </div><div class='del'>-	err = run_selftests(live, pdev_to_i915(pdev));</div><div class='add'>+	err = run_selftests(live, i915);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		i915_selftest.live = err;</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -251,14 +277,16 @@ int i915_live_selftests(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> int i915_perf_selftests(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *i915 = pdev_to_i915(pdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!i915_selftest.perf)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	__wait_gsc_proxy_completed(pdev_to_i915(pdev));</div><div class='add'>+	__wait_gsc_proxy_completed(i915);</div><div class='add'>+	__wait_gsc_huc_load_completed(i915);</div><div class='ctx'> </div><div class='del'>-	err = run_selftests(perf, pdev_to_i915(pdev));</div><div class='add'>+	err = run_selftests(perf, i915);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		i915_selftest.perf = err;</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c<br/>index 4f98aa8a861e..41eaa9b7f67d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/selftests/intel_uncore.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/selftests/intel_uncore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/selftests/intel_uncore.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/selftests/intel_uncore.c</a></div><div class='hunk'>@@ -71,7 +71,6 @@ static int intel_shadow_table_check(void)</div><div class='ctx'> 		{ gen11_shadowed_regs, ARRAY_SIZE(gen11_shadowed_regs) },</div><div class='ctx'> 		{ gen12_shadowed_regs, ARRAY_SIZE(gen12_shadowed_regs) },</div><div class='ctx'> 		{ dg2_shadowed_regs, ARRAY_SIZE(dg2_shadowed_regs) },</div><div class='del'>-		{ pvc_shadowed_regs, ARRAY_SIZE(pvc_shadowed_regs) },</div><div class='ctx'> 		{ mtl_shadowed_regs, ARRAY_SIZE(mtl_shadowed_regs) },</div><div class='ctx'> 		{ xelpmp_shadowed_regs, ARRAY_SIZE(xelpmp_shadowed_regs) },</div><div class='ctx'> 	};</div><div class='hunk'>@@ -119,8 +118,6 @@ int intel_uncore_mock_selftests(void)</div><div class='ctx'> 		{ __gen9_fw_ranges, ARRAY_SIZE(__gen9_fw_ranges), true },</div><div class='ctx'> 		{ __gen11_fw_ranges, ARRAY_SIZE(__gen11_fw_ranges), true },</div><div class='ctx'> 		{ __gen12_fw_ranges, ARRAY_SIZE(__gen12_fw_ranges), true },</div><div class='del'>-		{ __xehp_fw_ranges, ARRAY_SIZE(__xehp_fw_ranges), true },</div><div class='del'>-		{ __pvc_fw_ranges, ARRAY_SIZE(__pvc_fw_ranges), true },</div><div class='ctx'> 		{ __mtl_fw_ranges, ARRAY_SIZE(__mtl_fw_ranges), true },</div><div class='ctx'> 		{ __xelpmp_fw_ranges, ARRAY_SIZE(__xelpmp_fw_ranges), true },</div><div class='ctx'> 	};</div><div class='head'>diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c<br/>index 15492b69f698..e3287f1de774 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/soc/intel_dram.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/soc/intel_dram.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/soc/intel_dram.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/soc/intel_dram.c</a></div><div class='hunk'>@@ -681,6 +681,8 @@ void intel_dram_detect(struct drm_i915_private *i915)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	drm_dbg_kms(&amp;i915-&gt;drm, "Num qgv points %u\n", dram_info-&gt;num_qgv_points);</div><div class='add'>+</div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm, "DRAM channels: %u\n", dram_info-&gt;num_channels);</div><div class='ctx'> </div><div class='ctx'> 	drm_dbg_kms(&amp;i915-&gt;drm, "Watermark level 0 adjustment needed: %s\n",</div><div class='head'>diff --git a/drivers/gpu/drm/i915/vlv_sideband.c b/drivers/gpu/drm/i915/vlv_sideband.c<br/>index ffa195560d0d..68291412f4cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/vlv_sideband.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/i915/vlv_sideband.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/i915/vlv_sideband.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/i915/vlv_sideband.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #include "vlv_sideband.h"</div><div class='ctx'> </div><div class='ctx'> #include "display/intel_dpio_phy.h"</div><div class='del'>-#include "display/intel_display_types.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * IOSF sideband, see VLV2_SidebandMsg_HAS.docx and</div><div class='head'>diff --git a/drivers/gpu/drm/imagination/pvr_fw_mips.h b/drivers/gpu/drm/imagination/pvr_fw_mips.h<br/>index 408dbe63a90c..a0c5c41c8aa2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imagination/pvr_fw_mips.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imagination/pvr_fw_mips.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imagination/pvr_fw_mips.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/imagination/pvr_fw_mips.h</a></div><div class='hunk'>@@ -7,13 +7,14 @@</div><div class='ctx'> #include "pvr_rogue_mips.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;linux/math.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Forward declaration from pvr_gem.h. */</div><div class='ctx'> struct pvr_gem_object;</div><div class='ctx'> </div><div class='del'>-#define PVR_MIPS_PT_PAGE_COUNT ((ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K) \</div><div class='del'>-				&gt;&gt; PAGE_SHIFT)</div><div class='add'>+#define PVR_MIPS_PT_PAGE_COUNT DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct pvr_fw_mips_data - MIPS-specific data</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/gpu/drm/imagination/pvr_fw_trace.c b/drivers/gpu/drm/imagination/pvr_fw_trace.c<br/>index 31199e45b72e..73707daa4e52 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imagination/pvr_fw_trace.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imagination/pvr_fw_trace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imagination/pvr_fw_trace.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/imagination/pvr_fw_trace.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/build_bug.h&gt;</div><div class='ctx'> #include &lt;linux/dcache.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/imagination/pvr_vm_mips.c b/drivers/gpu/drm/imagination/pvr_vm_mips.c<br/>index b7fef3c797e6..4f99b4af871c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imagination/pvr_vm_mips.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imagination/pvr_vm_mips.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imagination/pvr_vm_mips.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/imagination/pvr_vm_mips.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@ pvr_vm_mips_init(struct pvr_device *pvr_dev)</div><div class='ctx'> 	if (!mips_data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (page_nr = 0; page_nr &lt; ARRAY_SIZE(mips_data-&gt;pt_pages); page_nr++) {</div><div class='add'>+	for (page_nr = 0; page_nr &lt; PVR_MIPS_PT_PAGE_COUNT; page_nr++) {</div><div class='ctx'> 		mips_data-&gt;pt_pages[page_nr] = alloc_page(GFP_KERNEL | __GFP_ZERO);</div><div class='ctx'> 		if (!mips_data-&gt;pt_pages[page_nr]) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='hunk'>@@ -102,7 +102,7 @@ pvr_vm_mips_fini(struct pvr_device *pvr_dev)</div><div class='ctx'> 	int page_nr;</div><div class='ctx'> </div><div class='ctx'> 	vunmap(mips_data-&gt;pt);</div><div class='del'>-	for (page_nr = ARRAY_SIZE(mips_data-&gt;pt_pages) - 1; page_nr &gt;= 0; page_nr--) {</div><div class='add'>+	for (page_nr = PVR_MIPS_PT_PAGE_COUNT - 1; page_nr &gt;= 0; page_nr--) {</div><div class='ctx'> 		dma_unmap_page(from_pvr_device(pvr_dev)-&gt;dev,</div><div class='ctx'> 			       mips_data-&gt;pt_dma_addr[page_nr], PAGE_SIZE, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c<br/>index dade8b59feae..704c549750f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c</a></div><div class='hunk'>@@ -773,6 +773,13 @@ static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {</div><div class='ctx'> 	.atomic_update = ipu_plane_atomic_update,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct drm_plane_helper_funcs ipu_primary_plane_helper_funcs = {</div><div class='add'>+	.atomic_check = ipu_plane_atomic_check,</div><div class='add'>+	.atomic_disable = ipu_plane_atomic_disable,</div><div class='add'>+	.atomic_update = ipu_plane_atomic_update,</div><div class='add'>+	.get_scanout_buffer = drm_fb_dma_get_scanout_buffer,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> bool ipu_plane_atomic_update_pending(struct drm_plane *plane)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipu_plane *ipu_plane = to_ipu_plane(plane);</div><div class='hunk'>@@ -916,7 +923,10 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,</div><div class='ctx'> 	ipu_plane-&gt;dma = dma;</div><div class='ctx'> 	ipu_plane-&gt;dp_flow = dp;</div><div class='ctx'> </div><div class='del'>-	drm_plane_helper_add(&amp;ipu_plane-&gt;base, &amp;ipu_plane_helper_funcs);</div><div class='add'>+	if (type == DRM_PLANE_TYPE_PRIMARY)</div><div class='add'>+		drm_plane_helper_add(&amp;ipu_plane-&gt;base, &amp;ipu_primary_plane_helper_funcs);</div><div class='add'>+	else</div><div class='add'>+		drm_plane_helper_add(&amp;ipu_plane-&gt;base, &amp;ipu_plane_helper_funcs);</div><div class='ctx'> </div><div class='ctx'> 	if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG)</div><div class='ctx'> 		ret = drm_plane_create_zpos_property(&amp;ipu_plane-&gt;base, zpos, 0,</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_bcast.c b/drivers/gpu/drm/lima/lima_bcast.c<br/>index fbc43f243c54..6d000504e1a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_bcast.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_bcast.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_bcast.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_bcast.c</a></div><div class='hunk'>@@ -43,6 +43,18 @@ void lima_bcast_suspend(struct lima_ip *ip)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int lima_bcast_mask_irq(struct lima_ip *ip)</div><div class='add'>+{</div><div class='add'>+	bcast_write(LIMA_BCAST_BROADCAST_MASK, 0);</div><div class='add'>+	bcast_write(LIMA_BCAST_INTERRUPT_MASK, 0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lima_bcast_reset(struct lima_ip *ip)</div><div class='add'>+{</div><div class='add'>+	return lima_bcast_hw_init(ip);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int lima_bcast_init(struct lima_ip *ip)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_bcast.h b/drivers/gpu/drm/lima/lima_bcast.h<br/>index 465ee587bceb..cd08841e4787 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_bcast.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_bcast.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_bcast.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_bcast.h</a></div><div class='hunk'>@@ -13,4 +13,7 @@ void lima_bcast_fini(struct lima_ip *ip);</div><div class='ctx'> </div><div class='ctx'> void lima_bcast_enable(struct lima_device *dev, int num_pp);</div><div class='ctx'> </div><div class='add'>+int lima_bcast_mask_irq(struct lima_ip *ip);</div><div class='add'>+int lima_bcast_reset(struct lima_ip *ip);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c<br/>index 10fd9154cc46..739c865b556f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_drv.c</a></div><div class='hunk'>@@ -371,6 +371,7 @@ static int lima_pdev_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lima_device *ldev;</div><div class='ctx'> 	struct drm_device *ddev;</div><div class='add'>+	const struct lima_compatible *comp;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = lima_sched_slab_init();</div><div class='hunk'>@@ -384,7 +385,13 @@ static int lima_pdev_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ldev-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-	ldev-&gt;id = (enum lima_gpu_id)of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	comp = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!comp) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto err_out0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ldev-&gt;id = comp-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, ldev);</div><div class='ctx'> </div><div class='hunk'>@@ -459,9 +466,17 @@ static void lima_pdev_remove(struct platform_device *pdev)</div><div class='ctx'> 	lima_sched_slab_fini();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct lima_compatible lima_mali400_data = {</div><div class='add'>+	.id = lima_gpu_mali400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct lima_compatible lima_mali450_data = {</div><div class='add'>+	.id = lima_gpu_mali450,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id dt_match[] = {</div><div class='del'>-	{ .compatible = "arm,mali-400", .data = (void *)lima_gpu_mali400 },</div><div class='del'>-	{ .compatible = "arm,mali-450", .data = (void *)lima_gpu_mali450 },</div><div class='add'>+	{ .compatible = "arm,mali-400", .data = &amp;lima_mali400_data },</div><div class='add'>+	{ .compatible = "arm,mali-450", .data = &amp;lima_mali450_data },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, dt_match);</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_drv.h b/drivers/gpu/drm/lima/lima_drv.h<br/>index c738d288547b..6706c19b166e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_drv.h</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;drm/drm_file.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "lima_ctx.h"</div><div class='add'>+#include "lima_device.h"</div><div class='ctx'> </div><div class='ctx'> extern int lima_sched_timeout_ms;</div><div class='ctx'> extern uint lima_heap_init_nr_pages;</div><div class='hunk'>@@ -39,6 +40,10 @@ struct lima_submit {</div><div class='ctx'> 	struct lima_sched_task *task;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct lima_compatible {</div><div class='add'>+	enum lima_gpu_id id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline struct lima_drm_priv *</div><div class='ctx'> to_lima_drm_priv(struct drm_file *file)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_gp.c b/drivers/gpu/drm/lima/lima_gp.c<br/>index 6b354e2fb61d..3282997a0358 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_gp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_gp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_gp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_gp.c</a></div><div class='hunk'>@@ -233,6 +233,13 @@ static void lima_gp_task_mmu_error(struct lima_sched_pipe *pipe)</div><div class='ctx'> 	lima_sched_pipe_task_done(pipe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lima_gp_task_mask_irq(struct lima_sched_pipe *pipe)</div><div class='add'>+{</div><div class='add'>+	struct lima_ip *ip = pipe-&gt;processor[0];</div><div class='add'>+</div><div class='add'>+	gp_write(LIMA_GP_INT_MASK, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lima_gp_task_recover(struct lima_sched_pipe *pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct lima_ip *ip = pipe-&gt;processor[0];</div><div class='hunk'>@@ -338,7 +345,9 @@ int lima_gp_init(struct lima_ip *ip)</div><div class='ctx'> </div><div class='ctx'> void lima_gp_fini(struct lima_ip *ip)</div><div class='ctx'> {</div><div class='add'>+	struct lima_device *dev = ip-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	devm_free_irq(dev-&gt;dev, ip-&gt;irq, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int lima_gp_pipe_init(struct lima_device *dev)</div><div class='hunk'>@@ -365,6 +374,7 @@ int lima_gp_pipe_init(struct lima_device *dev)</div><div class='ctx'> 	pipe-&gt;task_error = lima_gp_task_error;</div><div class='ctx'> 	pipe-&gt;task_mmu_error = lima_gp_task_mmu_error;</div><div class='ctx'> 	pipe-&gt;task_recover = lima_gp_task_recover;</div><div class='add'>+	pipe-&gt;task_mask_irq = lima_gp_task_mask_irq;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_mmu.c b/drivers/gpu/drm/lima/lima_mmu.c<br/>index e18317c5ca8c..6611e2836bf0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_mmu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_mmu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_mmu.c</a></div><div class='hunk'>@@ -118,7 +118,12 @@ int lima_mmu_init(struct lima_ip *ip)</div><div class='ctx'> </div><div class='ctx'> void lima_mmu_fini(struct lima_ip *ip)</div><div class='ctx'> {</div><div class='add'>+	struct lima_device *dev = ip-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (ip-&gt;id == lima_ip_ppmmu_bcast)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	devm_free_irq(dev-&gt;dev, ip-&gt;irq, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void lima_mmu_flush_tlb(struct lima_ip *ip)</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_pp.c b/drivers/gpu/drm/lima/lima_pp.c<br/>index d0d2db0ef1ce..eaab4788dff4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_pp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_pp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_pp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_pp.c</a></div><div class='hunk'>@@ -286,7 +286,9 @@ int lima_pp_init(struct lima_ip *ip)</div><div class='ctx'> </div><div class='ctx'> void lima_pp_fini(struct lima_ip *ip)</div><div class='ctx'> {</div><div class='add'>+	struct lima_device *dev = ip-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	devm_free_irq(dev-&gt;dev, ip-&gt;irq, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int lima_pp_bcast_resume(struct lima_ip *ip)</div><div class='hunk'>@@ -319,7 +321,9 @@ int lima_pp_bcast_init(struct lima_ip *ip)</div><div class='ctx'> </div><div class='ctx'> void lima_pp_bcast_fini(struct lima_ip *ip)</div><div class='ctx'> {</div><div class='add'>+	struct lima_device *dev = ip-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	devm_free_irq(dev-&gt;dev, ip-&gt;irq, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lima_pp_task_validate(struct lima_sched_pipe *pipe,</div><div class='hunk'>@@ -429,6 +433,9 @@ static void lima_pp_task_error(struct lima_sched_pipe *pipe)</div><div class='ctx'> </div><div class='ctx'> 		lima_pp_hard_reset(ip);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (pipe-&gt;bcast_processor)</div><div class='add'>+		lima_bcast_reset(pipe-&gt;bcast_processor);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lima_pp_task_mmu_error(struct lima_sched_pipe *pipe)</div><div class='hunk'>@@ -437,6 +444,20 @@ static void lima_pp_task_mmu_error(struct lima_sched_pipe *pipe)</div><div class='ctx'> 		lima_sched_pipe_task_done(pipe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lima_pp_task_mask_irq(struct lima_sched_pipe *pipe)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pipe-&gt;num_processor; i++) {</div><div class='add'>+		struct lima_ip *ip = pipe-&gt;processor[i];</div><div class='add'>+</div><div class='add'>+		pp_write(LIMA_PP_INT_MASK, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pipe-&gt;bcast_processor)</div><div class='add'>+		lima_bcast_mask_irq(pipe-&gt;bcast_processor);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct kmem_cache *lima_pp_task_slab;</div><div class='ctx'> static int lima_pp_task_slab_refcnt;</div><div class='ctx'> </div><div class='hunk'>@@ -468,6 +489,7 @@ int lima_pp_pipe_init(struct lima_device *dev)</div><div class='ctx'> 	pipe-&gt;task_fini = lima_pp_task_fini;</div><div class='ctx'> 	pipe-&gt;task_error = lima_pp_task_error;</div><div class='ctx'> 	pipe-&gt;task_mmu_error = lima_pp_task_mmu_error;</div><div class='add'>+	pipe-&gt;task_mask_irq = lima_pp_task_mask_irq;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c<br/>index 00b19adfc888..bbf3f8feab94 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_sched.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_sched.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_sched.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_sched.c</a></div><div class='hunk'>@@ -422,12 +422,21 @@ static enum drm_gpu_sched_stat lima_sched_timedout_job(struct drm_sched_job *job</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; pipe-&gt;num_processor; i++)</div><div class='ctx'> 		synchronize_irq(pipe-&gt;processor[i]-&gt;irq);</div><div class='add'>+	if (pipe-&gt;bcast_processor)</div><div class='add'>+		synchronize_irq(pipe-&gt;bcast_processor-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	if (dma_fence_is_signaled(task-&gt;fence)) {</div><div class='ctx'> 		DRM_WARN("%s unexpectedly high interrupt latency\n", lima_ip_name(ip));</div><div class='ctx'> 		return DRM_GPU_SCHED_STAT_NOMINAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The task might still finish while this timeout handler runs.</div><div class='add'>+	 * To prevent a race condition on its completion, mask all irqs</div><div class='add'>+	 * on the running core until the next hard reset completes.</div><div class='add'>+	 */</div><div class='add'>+	pipe-&gt;task_mask_irq(pipe);</div><div class='add'>+</div><div class='ctx'> 	if (!pipe-&gt;error)</div><div class='ctx'> 		DRM_ERROR("%s job timeout\n", lima_ip_name(ip));</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/lima/lima_sched.h b/drivers/gpu/drm/lima/lima_sched.h<br/>index 6bd4f3b70109..85b23ba901d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_sched.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/lima/lima_sched.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/lima/lima_sched.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/lima/lima_sched.h</a></div><div class='hunk'>@@ -80,6 +80,7 @@ struct lima_sched_pipe {</div><div class='ctx'> 	void (*task_error)(struct lima_sched_pipe *pipe);</div><div class='ctx'> 	void (*task_mmu_error)(struct lima_sched_pipe *pipe);</div><div class='ctx'> 	int (*task_recover)(struct lima_sched_pipe *pipe);</div><div class='add'>+	void (*task_mask_irq)(struct lima_sched_pipe *pipe);</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct recover_work;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/loongson/lsdc_crtc.c b/drivers/gpu/drm/loongson/lsdc_crtc.c<br/>index 827acab580fa..03958b79f251 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/loongson/lsdc_crtc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/loongson/lsdc_crtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/loongson/lsdc_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/loongson/lsdc_crtc.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2023 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_atomic.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/loongson/lsdc_gem.c b/drivers/gpu/drm/loongson/lsdc_gem.c<br/>index 04293df2f0de..a720d8f53209 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/loongson/lsdc_gem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/loongson/lsdc_gem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/loongson/lsdc_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/loongson/lsdc_gem.c</a></div><div class='hunk'>@@ -19,33 +19,24 @@ static int lsdc_gem_prime_pin(struct drm_gem_object *obj)</div><div class='ctx'> 	struct lsdc_bo *lbo = gem_to_lsdc_bo(obj);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = lsdc_bo_reserve(lbo);</div><div class='del'>-	if (unlikely(ret))</div><div class='del'>-		return ret;</div><div class='add'>+	dma_resv_assert_held(obj-&gt;resv);</div><div class='ctx'> </div><div class='ctx'> 	ret = lsdc_bo_pin(lbo, LSDC_GEM_DOMAIN_GTT, NULL);</div><div class='ctx'> 	if (likely(ret == 0))</div><div class='ctx'> 		lbo-&gt;sharing_count++;</div><div class='ctx'> </div><div class='del'>-	lsdc_bo_unreserve(lbo);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lsdc_gem_prime_unpin(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	struct lsdc_bo *lbo = gem_to_lsdc_bo(obj);</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = lsdc_bo_reserve(lbo);</div><div class='del'>-	if (unlikely(ret))</div><div class='del'>-		return;</div><div class='add'>+	dma_resv_assert_held(obj-&gt;resv);</div><div class='ctx'> </div><div class='ctx'> 	lsdc_bo_unpin(lbo);</div><div class='ctx'> 	if (lbo-&gt;sharing_count)</div><div class='ctx'> 		lbo-&gt;sharing_count--;</div><div class='del'>-</div><div class='del'>-	lsdc_bo_unreserve(lbo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sg_table *lsdc_gem_prime_get_sg_table(struct drm_gem_object *obj)</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig<br/>index 76cab28e010c..96cbe020f493 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/Kconfig</a></div><div class='hunk'>@@ -26,7 +26,7 @@ config DRM_MEDIATEK_DP</div><div class='ctx'> 	select PHY_MTK_DP</div><div class='ctx'> 	select DRM_DISPLAY_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_DP_HELPER</div><div class='del'>-	select DRM_DP_AUX_BUS</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	help</div><div class='ctx'> 	  DRM/KMS Display Port driver for MediaTek SoCs.</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile<br/>index 5e4436403b8d..32a2ed6c0cfe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/Makefile</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-mediatek-drm-y := mtk_disp_aal.o \</div><div class='add'>+mediatek-drm-y := mtk_crtc.o \</div><div class='add'>+		  mtk_ddp_comp.o \</div><div class='add'>+		  mtk_disp_aal.o \</div><div class='ctx'> 		  mtk_disp_ccorr.o \</div><div class='ctx'> 		  mtk_disp_color.o \</div><div class='ctx'> 		  mtk_disp_gamma.o \</div><div class='hunk'>@@ -8,16 +10,14 @@ mediatek-drm-y := mtk_disp_aal.o \</div><div class='ctx'> 		  mtk_disp_ovl.o \</div><div class='ctx'> 		  mtk_disp_ovl_adaptor.o \</div><div class='ctx'> 		  mtk_disp_rdma.o \</div><div class='del'>-		  mtk_drm_crtc.o \</div><div class='del'>-		  mtk_drm_ddp_comp.o \</div><div class='ctx'> 		  mtk_drm_drv.o \</div><div class='del'>-		  mtk_drm_gem.o \</div><div class='del'>-		  mtk_drm_plane.o \</div><div class='ctx'> 		  mtk_dsi.o \</div><div class='ctx'> 		  mtk_dpi.o \</div><div class='ctx'> 		  mtk_ethdr.o \</div><div class='add'>+		  mtk_gem.o \</div><div class='ctx'> 		  mtk_mdp_rdma.o \</div><div class='del'>-		  mtk_padding.o</div><div class='add'>+		  mtk_padding.o \</div><div class='add'>+		  mtk_plane.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c<br/>index a04499c4f9ca..6f34f573e127 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_crtc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_crtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_crtc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_crtc.c</a></div><div class='hunk'>@@ -19,14 +19,14 @@</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_vblank.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='del'>-#include "mtk_drm_gem.h"</div><div class='del'>-#include "mtk_drm_plane.h"</div><div class='add'>+#include "mtk_gem.h"</div><div class='add'>+#include "mtk_plane.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * struct mtk_drm_crtc - MediaTek specific crtc structure.</div><div class='add'>+ * struct mtk_crtc - MediaTek specific crtc structure.</div><div class='ctx'>  * @base: crtc object.</div><div class='ctx'>  * @enabled: records whether crtc_enable succeeded</div><div class='ctx'>  * @planes: array of 4 drm_plane structures, one for each overlay plane</div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * TODO: Needs update: this header is missing a bunch of member descriptions.</div><div class='ctx'>  */</div><div class='del'>-struct mtk_drm_crtc {</div><div class='add'>+struct mtk_crtc {</div><div class='ctx'> 	struct drm_crtc			base;</div><div class='ctx'> 	bool				enabled;</div><div class='ctx'> </div><div class='hunk'>@@ -80,9 +80,9 @@ struct mtk_crtc_state {</div><div class='ctx'> 	unsigned int			pending_vrefresh;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline struct mtk_drm_crtc *to_mtk_crtc(struct drm_crtc *c)</div><div class='add'>+static inline struct mtk_crtc *to_mtk_crtc(struct drm_crtc *c)</div><div class='ctx'> {</div><div class='del'>-	return container_of(c, struct mtk_drm_crtc, base);</div><div class='add'>+	return container_of(c, struct mtk_crtc, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct mtk_crtc_state *to_mtk_crtc_state(struct drm_crtc_state *s)</div><div class='hunk'>@@ -90,7 +90,7 @@ static inline struct mtk_crtc_state *to_mtk_crtc_state(struct drm_crtc_state *s)</div><div class='ctx'> 	return container_of(s, struct mtk_crtc_state, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)</div><div class='add'>+static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_crtc *crtc = &amp;mtk_crtc-&gt;base;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -104,11 +104,11 @@ static void mtk_drm_crtc_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)</div><div class='add'>+static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc)</div><div class='ctx'> {</div><div class='ctx'> 	drm_crtc_handle_vblank(&amp;mtk_crtc-&gt;base);</div><div class='ctx'> 	if (!mtk_crtc-&gt;config_updating &amp;&amp; mtk_crtc-&gt;pending_needs_vblank) {</div><div class='del'>-		mtk_drm_crtc_finish_page_flip(mtk_crtc);</div><div class='add'>+		mtk_crtc_finish_page_flip(mtk_crtc);</div><div class='ctx'> 		mtk_crtc-&gt;pending_needs_vblank = false;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -151,9 +151,9 @@ static void mtk_drm_cmdq_pkt_destroy(struct cmdq_pkt *pkt)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)</div><div class='add'>+static void mtk_crtc_destroy(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	mtk_mutex_put(mtk_crtc-&gt;mutex);</div><div class='hunk'>@@ -176,7 +176,7 @@ static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)</div><div class='ctx'> 	drm_crtc_cleanup(crtc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_reset(struct drm_crtc *crtc)</div><div class='add'>+static void mtk_crtc_reset(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_crtc_state *state;</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +191,7 @@ static void mtk_drm_crtc_reset(struct drm_crtc *crtc)</div><div class='ctx'> 		__drm_atomic_helper_crtc_reset(crtc, &amp;state-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc)</div><div class='add'>+static struct drm_crtc_state *mtk_crtc_duplicate_state(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_crtc_state *state;</div><div class='ctx'> </div><div class='hunk'>@@ -208,18 +208,17 @@ static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc</div><div class='ctx'> 	return &amp;state-&gt;base;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_destroy_state(struct drm_crtc *crtc,</div><div class='del'>-				       struct drm_crtc_state *state)</div><div class='add'>+static void mtk_crtc_destroy_state(struct drm_crtc *crtc,</div><div class='add'>+				   struct drm_crtc_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	__drm_atomic_helper_crtc_destroy_state(state);</div><div class='ctx'> 	kfree(to_mtk_crtc_state(state));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum drm_mode_status</div><div class='del'>-mtk_drm_crtc_mode_valid(struct drm_crtc *crtc,</div><div class='del'>-			const struct drm_display_mode *mode)</div><div class='add'>+mtk_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	enum drm_mode_status status = MODE_OK;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -231,15 +230,15 @@ mtk_drm_crtc_mode_valid(struct drm_crtc *crtc,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool mtk_drm_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='del'>-				    const struct drm_display_mode *mode,</div><div class='del'>-				    struct drm_display_mode *adjusted_mode)</div><div class='add'>+static bool mtk_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='add'>+				const struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode)</div><div class='ctx'> {</div><div class='ctx'> 	/* Nothing to do here, but this callback is mandatory. */</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)</div><div class='add'>+static void mtk_crtc_mode_set_nofb(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_crtc_state *state = to_mtk_crtc_state(crtc-&gt;state);</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +249,7 @@ static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)</div><div class='ctx'> 	state-&gt;pending_config = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc)</div><div class='add'>+static int mtk_crtc_ddp_clk_enable(struct mtk_crtc *mtk_crtc)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -270,7 +269,7 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc)</div><div class='add'>+static void mtk_crtc_ddp_clk_disable(struct mtk_crtc *mtk_crtc)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -279,11 +278,11 @@ static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc,</div><div class='del'>-						struct drm_plane *plane,</div><div class='del'>-						unsigned int *local_layer)</div><div class='add'>+struct mtk_ddp_comp *mtk_ddp_comp_for_plane(struct drm_crtc *crtc,</div><div class='add'>+					    struct drm_plane *plane,</div><div class='add'>+					    unsigned int *local_layer)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_ddp_comp *comp;</div><div class='ctx'> 	int i, count = 0;</div><div class='ctx'> 	unsigned int local_index = plane - mtk_crtc-&gt;planes;</div><div class='hunk'>@@ -306,7 +305,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)</div><div class='ctx'> {</div><div class='ctx'> 	struct cmdq_cb_data *data = mssg;</div><div class='ctx'> 	struct cmdq_client *cmdq_cl = container_of(cl, struct cmdq_client, client);</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = container_of(cmdq_cl, struct mtk_drm_crtc, cmdq_client);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = container_of(cmdq_cl, struct mtk_crtc, cmdq_client);</div><div class='ctx'> 	struct mtk_crtc_state *state;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -346,7 +345,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)</div><div class='add'>+static int mtk_crtc_ddp_hw_init(struct mtk_crtc *mtk_crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_crtc *crtc = &amp;mtk_crtc-&gt;base;</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='hunk'>@@ -431,7 +430,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)</div><div class='ctx'> </div><div class='ctx'> 		/* should not enable layer before crtc enabled */</div><div class='ctx'> 		plane_state-&gt;pending.enable = false;</div><div class='del'>-		comp = mtk_drm_ddp_comp_for_plane(crtc, plane, &amp;local_layer);</div><div class='add'>+		comp = mtk_ddp_comp_for_plane(crtc, plane, &amp;local_layer);</div><div class='ctx'> 		if (comp)</div><div class='ctx'> 			mtk_ddp_comp_layer_config(comp, local_layer,</div><div class='ctx'> 						  plane_state, NULL);</div><div class='hunk'>@@ -446,7 +445,7 @@ err_pm_runtime_put:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)</div><div class='add'>+static void mtk_crtc_ddp_hw_fini(struct mtk_crtc *mtk_crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *drm = mtk_crtc-&gt;base.dev;</div><div class='ctx'> 	struct drm_crtc *crtc = &amp;mtk_crtc-&gt;base;</div><div class='hunk'>@@ -491,7 +490,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)</div><div class='ctx'> static void mtk_crtc_ddp_config(struct drm_crtc *crtc,</div><div class='ctx'> 				struct cmdq_pkt *cmdq_handle)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc-&gt;base.state);</div><div class='ctx'> 	struct mtk_ddp_comp *comp = mtk_crtc-&gt;ddp_comp[0];</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -522,8 +521,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc,</div><div class='ctx'> 			if (!plane_state-&gt;pending.config)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			comp = mtk_drm_ddp_comp_for_plane(crtc, plane,</div><div class='del'>-							  &amp;local_layer);</div><div class='add'>+			comp = mtk_ddp_comp_for_plane(crtc, plane, &amp;local_layer);</div><div class='ctx'> </div><div class='ctx'> 			if (comp)</div><div class='ctx'> 				mtk_ddp_comp_layer_config(comp, local_layer,</div><div class='hunk'>@@ -547,8 +545,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc,</div><div class='ctx'> 			if (!plane_state-&gt;pending.async_config)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			comp = mtk_drm_ddp_comp_for_plane(crtc, plane,</div><div class='del'>-							  &amp;local_layer);</div><div class='add'>+			comp = mtk_ddp_comp_for_plane(crtc, plane, &amp;local_layer);</div><div class='ctx'> </div><div class='ctx'> 			if (comp)</div><div class='ctx'> 				mtk_ddp_comp_layer_config(comp, local_layer,</div><div class='hunk'>@@ -563,8 +560,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc,</div><div class='del'>-				       bool needs_vblank)</div><div class='add'>+static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank)</div><div class='ctx'> {</div><div class='ctx'> #if IS_REACHABLE(CONFIG_MTK_CMDQ)</div><div class='ctx'> 	struct cmdq_pkt *cmdq_handle = &amp;mtk_crtc-&gt;cmdq_handle;</div><div class='hunk'>@@ -636,7 +632,7 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc,</div><div class='ctx'> static void mtk_crtc_ddp_irq(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_crtc *crtc = data;</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_drm_private *priv = crtc-&gt;dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> #if IS_REACHABLE(CONFIG_MTK_CMDQ)</div><div class='hunk'>@@ -652,9 +648,9 @@ static void mtk_crtc_ddp_irq(void *data)</div><div class='ctx'> 	mtk_drm_finish_page_flip(mtk_crtc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)</div><div class='add'>+static int mtk_crtc_enable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_ddp_comp *comp = mtk_crtc-&gt;ddp_comp[0];</div><div class='ctx'> </div><div class='ctx'> 	mtk_ddp_comp_enable_vblank(comp);</div><div class='hunk'>@@ -662,22 +658,22 @@ static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_disable_vblank(struct drm_crtc *crtc)</div><div class='add'>+static void mtk_crtc_disable_vblank(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_ddp_comp *comp = mtk_crtc-&gt;ddp_comp[0];</div><div class='ctx'> </div><div class='ctx'> 	mtk_ddp_comp_disable_vblank(comp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_update_output(struct drm_crtc *crtc,</div><div class='del'>-				       struct drm_atomic_state *state)</div><div class='add'>+static void mtk_crtc_update_output(struct drm_crtc *crtc,</div><div class='add'>+				   struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	int crtc_index = drm_crtc_index(crtc);</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct drm_crtc_state *crtc_state = state-&gt;crtcs[crtc_index].new_state;</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_drm_private *priv;</div><div class='ctx'> 	unsigned int encoder_mask = crtc_state-&gt;encoder_mask;</div><div class='ctx'> </div><div class='hunk'>@@ -707,33 +703,33 @@ static void mtk_drm_crtc_update_output(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='del'>-			     struct mtk_plane_state *state)</div><div class='add'>+int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='add'>+			 struct mtk_plane_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int local_layer;</div><div class='ctx'> 	struct mtk_ddp_comp *comp;</div><div class='ctx'> </div><div class='del'>-	comp = mtk_drm_ddp_comp_for_plane(crtc, plane, &amp;local_layer);</div><div class='add'>+	comp = mtk_ddp_comp_for_plane(crtc, plane, &amp;local_layer);</div><div class='ctx'> 	if (comp)</div><div class='ctx'> 		return mtk_ddp_comp_layer_check(comp, local_layer, state);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='del'>-			       struct drm_atomic_state *state)</div><div class='add'>+void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='add'>+			   struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> </div><div class='ctx'> 	if (!mtk_crtc-&gt;enabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mtk_drm_crtc_update_config(mtk_crtc, false);</div><div class='add'>+	mtk_crtc_update_config(mtk_crtc, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,</div><div class='del'>-				       struct drm_atomic_state *state)</div><div class='add'>+static void mtk_crtc_atomic_enable(struct drm_crtc *crtc,</div><div class='add'>+				   struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_ddp_comp *comp = mtk_crtc-&gt;ddp_comp[0];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -745,7 +741,7 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mtk_drm_crtc_update_output(crtc, state);</div><div class='add'>+	mtk_crtc_update_output(crtc, state);</div><div class='ctx'> </div><div class='ctx'> 	ret = mtk_crtc_ddp_hw_init(mtk_crtc);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -757,10 +753,10 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,</div><div class='ctx'> 	mtk_crtc-&gt;enabled = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,</div><div class='del'>-					struct drm_atomic_state *state)</div><div class='add'>+static void mtk_crtc_atomic_disable(struct drm_crtc *crtc,</div><div class='add'>+				    struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	struct mtk_ddp_comp *comp = mtk_crtc-&gt;ddp_comp[0];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -779,7 +775,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> 	mtk_crtc-&gt;pending_planes = true;</div><div class='ctx'> </div><div class='del'>-	mtk_drm_crtc_update_config(mtk_crtc, false);</div><div class='add'>+	mtk_crtc_update_config(mtk_crtc, false);</div><div class='ctx'> #if IS_REACHABLE(CONFIG_MTK_CMDQ)</div><div class='ctx'> 	/* Wait for planes to be disabled by cmdq */</div><div class='ctx'> 	if (mtk_crtc-&gt;cmdq_client.chan)</div><div class='hunk'>@@ -797,13 +793,13 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,</div><div class='ctx'> 	mtk_crtc-&gt;enabled = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_atomic_begin(struct drm_crtc *crtc,</div><div class='del'>-				      struct drm_atomic_state *state)</div><div class='add'>+static void mtk_crtc_atomic_begin(struct drm_crtc *crtc,</div><div class='add'>+				  struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,</div><div class='ctx'> 									  crtc);</div><div class='ctx'> 	struct mtk_crtc_state *mtk_crtc_state = to_mtk_crtc_state(crtc_state);</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (mtk_crtc-&gt;event &amp;&amp; mtk_crtc_state-&gt;base.event)</div><div class='hunk'>@@ -821,10 +817,10 @@ static void mtk_drm_crtc_atomic_begin(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,</div><div class='del'>-				      struct drm_atomic_state *state)</div><div class='add'>+static void mtk_crtc_atomic_flush(struct drm_crtc *crtc,</div><div class='add'>+				  struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='add'>+	struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (crtc-&gt;state-&gt;color_mgmt_changed)</div><div class='hunk'>@@ -832,33 +828,32 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,</div><div class='ctx'> 			mtk_ddp_gamma_set(mtk_crtc-&gt;ddp_comp[i], crtc-&gt;state);</div><div class='ctx'> 			mtk_ddp_ctm_set(mtk_crtc-&gt;ddp_comp[i], crtc-&gt;state);</div><div class='ctx'> 		}</div><div class='del'>-	mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc-&gt;event);</div><div class='add'>+	mtk_crtc_update_config(mtk_crtc, !!mtk_crtc-&gt;event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct drm_crtc_funcs mtk_crtc_funcs = {</div><div class='ctx'> 	.set_config		= drm_atomic_helper_set_config,</div><div class='ctx'> 	.page_flip		= drm_atomic_helper_page_flip,</div><div class='del'>-	.destroy		= mtk_drm_crtc_destroy,</div><div class='del'>-	.reset			= mtk_drm_crtc_reset,</div><div class='del'>-	.atomic_duplicate_state	= mtk_drm_crtc_duplicate_state,</div><div class='del'>-	.atomic_destroy_state	= mtk_drm_crtc_destroy_state,</div><div class='del'>-	.enable_vblank		= mtk_drm_crtc_enable_vblank,</div><div class='del'>-	.disable_vblank		= mtk_drm_crtc_disable_vblank,</div><div class='add'>+	.destroy		= mtk_crtc_destroy,</div><div class='add'>+	.reset			= mtk_crtc_reset,</div><div class='add'>+	.atomic_duplicate_state	= mtk_crtc_duplicate_state,</div><div class='add'>+	.atomic_destroy_state	= mtk_crtc_destroy_state,</div><div class='add'>+	.enable_vblank		= mtk_crtc_enable_vblank,</div><div class='add'>+	.disable_vblank		= mtk_crtc_disable_vblank,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_crtc_helper_funcs mtk_crtc_helper_funcs = {</div><div class='del'>-	.mode_fixup	= mtk_drm_crtc_mode_fixup,</div><div class='del'>-	.mode_set_nofb	= mtk_drm_crtc_mode_set_nofb,</div><div class='del'>-	.mode_valid	= mtk_drm_crtc_mode_valid,</div><div class='del'>-	.atomic_begin	= mtk_drm_crtc_atomic_begin,</div><div class='del'>-	.atomic_flush	= mtk_drm_crtc_atomic_flush,</div><div class='del'>-	.atomic_enable	= mtk_drm_crtc_atomic_enable,</div><div class='del'>-	.atomic_disable	= mtk_drm_crtc_atomic_disable,</div><div class='add'>+	.mode_fixup	= mtk_crtc_mode_fixup,</div><div class='add'>+	.mode_set_nofb	= mtk_crtc_mode_set_nofb,</div><div class='add'>+	.mode_valid	= mtk_crtc_mode_valid,</div><div class='add'>+	.atomic_begin	= mtk_crtc_atomic_begin,</div><div class='add'>+	.atomic_flush	= mtk_crtc_atomic_flush,</div><div class='add'>+	.atomic_enable	= mtk_crtc_atomic_enable,</div><div class='add'>+	.atomic_disable	= mtk_crtc_atomic_disable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_crtc_init(struct drm_device *drm,</div><div class='del'>-			     struct mtk_drm_crtc *mtk_crtc,</div><div class='del'>-			     unsigned int pipe)</div><div class='add'>+static int mtk_crtc_init(struct drm_device *drm, struct mtk_crtc *mtk_crtc,</div><div class='add'>+			 unsigned int pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_plane *primary = NULL;</div><div class='ctx'> 	struct drm_plane *cursor = NULL;</div><div class='hunk'>@@ -885,8 +880,7 @@ err_cleanup_crtc:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc,</div><div class='del'>-					int comp_idx)</div><div class='add'>+static int mtk_crtc_num_comp_planes(struct mtk_crtc *mtk_crtc, int comp_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_ddp_comp *comp;</div><div class='ctx'> </div><div class='hunk'>@@ -904,8 +898,8 @@ static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline</div><div class='del'>-enum drm_plane_type mtk_drm_crtc_plane_type(unsigned int plane_idx,</div><div class='del'>-					    unsigned int num_planes)</div><div class='add'>+enum drm_plane_type mtk_crtc_plane_type(unsigned int plane_idx,</div><div class='add'>+					unsigned int num_planes)</div><div class='ctx'> {</div><div class='ctx'> 	if (plane_idx == 0)</div><div class='ctx'> 		return DRM_PLANE_TYPE_PRIMARY;</div><div class='hunk'>@@ -916,11 +910,11 @@ enum drm_plane_type mtk_drm_crtc_plane_type(unsigned int plane_idx,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev,</div><div class='del'>-					 struct mtk_drm_crtc *mtk_crtc,</div><div class='del'>-					 int comp_idx, int pipe)</div><div class='add'>+static int mtk_crtc_init_comp_planes(struct drm_device *drm_dev,</div><div class='add'>+				     struct mtk_crtc *mtk_crtc,</div><div class='add'>+				     int comp_idx, int pipe)</div><div class='ctx'> {</div><div class='del'>-	int num_planes = mtk_drm_crtc_num_comp_planes(mtk_crtc, comp_idx);</div><div class='add'>+	int num_planes = mtk_crtc_num_comp_planes(mtk_crtc, comp_idx);</div><div class='ctx'> 	struct mtk_ddp_comp *comp = mtk_crtc-&gt;ddp_comp[comp_idx];</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -928,8 +922,7 @@ static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev,</div><div class='ctx'> 		ret = mtk_plane_init(drm_dev,</div><div class='ctx'> 				&amp;mtk_crtc-&gt;planes[mtk_crtc-&gt;layer_nr],</div><div class='ctx'> 				BIT(pipe),</div><div class='del'>-				mtk_drm_crtc_plane_type(mtk_crtc-&gt;layer_nr,</div><div class='del'>-							num_planes),</div><div class='add'>+				mtk_crtc_plane_type(mtk_crtc-&gt;layer_nr, num_planes),</div><div class='ctx'> 				mtk_ddp_comp_supported_rotations(comp),</div><div class='ctx'> 				mtk_ddp_comp_get_formats(comp),</div><div class='ctx'> 				mtk_ddp_comp_get_num_formats(comp));</div><div class='hunk'>@@ -941,9 +934,9 @@ static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc)</div><div class='add'>+struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc = NULL;</div><div class='add'>+	struct mtk_crtc *mtk_crtc = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!crtc)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -955,14 +948,14 @@ struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc)</div><div class='ctx'> 	return mtk_crtc-&gt;dma_dev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='del'>-			const unsigned int *path, unsigned int path_len,</div><div class='del'>-			int priv_data_index, const struct mtk_drm_route *conn_routes,</div><div class='del'>-			unsigned int num_conn_routes)</div><div class='add'>+int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path,</div><div class='add'>+		    unsigned int path_len, int priv_data_index,</div><div class='add'>+		    const struct mtk_drm_route *conn_routes,</div><div class='add'>+		    unsigned int num_conn_routes)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_drm_private *priv = drm_dev-&gt;dev_private;</div><div class='ctx'> 	struct device *dev = drm_dev-&gt;dev;</div><div class='del'>-	struct mtk_drm_crtc *mtk_crtc;</div><div class='add'>+	struct mtk_crtc *mtk_crtc;</div><div class='ctx'> 	unsigned int num_comp_planes = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1009,10 +1002,10 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='ctx'> </div><div class='ctx'> 	mtk_crtc-&gt;mmsys_dev = priv-&gt;mmsys_dev;</div><div class='ctx'> 	mtk_crtc-&gt;ddp_comp_nr = path_len;</div><div class='del'>-	mtk_crtc-&gt;ddp_comp = devm_kmalloc_array(dev,</div><div class='del'>-						mtk_crtc-&gt;ddp_comp_nr + (conn_routes ? 1 : 0),</div><div class='del'>-						sizeof(*mtk_crtc-&gt;ddp_comp),</div><div class='del'>-						GFP_KERNEL);</div><div class='add'>+	mtk_crtc-&gt;ddp_comp = devm_kcalloc(dev,</div><div class='add'>+					  mtk_crtc-&gt;ddp_comp_nr + (conn_routes ? 1 : 0),</div><div class='add'>+					  sizeof(*mtk_crtc-&gt;ddp_comp),</div><div class='add'>+					  GFP_KERNEL);</div><div class='ctx'> 	if (!mtk_crtc-&gt;ddp_comp)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1047,7 +1040,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mtk_crtc-&gt;ddp_comp_nr; i++)</div><div class='del'>-		num_comp_planes += mtk_drm_crtc_num_comp_planes(mtk_crtc, i);</div><div class='add'>+		num_comp_planes += mtk_crtc_num_comp_planes(mtk_crtc, i);</div><div class='ctx'> </div><div class='ctx'> 	mtk_crtc-&gt;planes = devm_kcalloc(dev, num_comp_planes,</div><div class='ctx'> 					sizeof(struct drm_plane), GFP_KERNEL);</div><div class='hunk'>@@ -1055,8 +1048,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mtk_crtc-&gt;ddp_comp_nr; i++) {</div><div class='del'>-		ret = mtk_drm_crtc_init_comp_planes(drm_dev, mtk_crtc, i,</div><div class='del'>-						    crtc_i);</div><div class='add'>+		ret = mtk_crtc_init_comp_planes(drm_dev, mtk_crtc, i, crtc_i);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1068,7 +1060,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	mtk_crtc-&gt;dma_dev = mtk_ddp_comp_dma_dev_get(&amp;priv-&gt;ddp_comp[path[0]]);</div><div class='ctx'> </div><div class='del'>-	ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, crtc_i);</div><div class='add'>+	ret = mtk_crtc_init(drm_dev, mtk_crtc, crtc_i);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1138,7 +1130,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='ctx'> 		mtk_crtc-&gt;num_conn_routes = num_conn_routes;</div><div class='ctx'> 		mtk_crtc-&gt;conn_routes = conn_routes;</div><div class='ctx'> </div><div class='del'>-		/* increase ddp_comp_nr at the end of mtk_drm_crtc_create */</div><div class='add'>+		/* increase ddp_comp_nr at the end of mtk_crtc_create */</div><div class='ctx'> 		mtk_crtc-&gt;ddp_comp_nr++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.h b/drivers/gpu/drm/mediatek/mtk_crtc.h<br/>new file mode 100644<br/>index 000000000000..388e900b6f4d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_crtc.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_crtc.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2015 MediaTek Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef MTK_CRTC_H</div><div class='add'>+#define MTK_CRTC_H</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_crtc.h&gt;</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='add'>+#include "mtk_drm_drv.h"</div><div class='add'>+#include "mtk_plane.h"</div><div class='add'>+</div><div class='add'>+#define MTK_MAX_BPC	10</div><div class='add'>+#define MTK_MIN_BPC	3</div><div class='add'>+</div><div class='add'>+void mtk_crtc_commit(struct drm_crtc *crtc);</div><div class='add'>+int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path,</div><div class='add'>+		    unsigned int path_len, int priv_data_index,</div><div class='add'>+		    const struct mtk_drm_route *conn_routes,</div><div class='add'>+		    unsigned int num_conn_routes);</div><div class='add'>+int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='add'>+			 struct mtk_plane_state *state);</div><div class='add'>+void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='add'>+			   struct drm_atomic_state *plane_state);</div><div class='add'>+struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc);</div><div class='add'>+</div><div class='add'>+#endif /* MTK_CRTC_H */</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c<br/>index a515e96cfefc..17b036411292 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_ddp_comp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_ddp_comp.c</a></div><div class='hunk'>@@ -14,11 +14,11 @@</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='del'>-#include "mtk_drm_plane.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='add'>+#include "mtk_plane.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define DISP_REG_DITHER_EN			0x0000</div><div class='hunk'>@@ -497,10 +497,10 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX]</div><div class='ctx'> 	[DDP_COMPONENT_WDMA1]		= { MTK_DISP_WDMA,		1, NULL },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static bool mtk_drm_find_comp_in_ddp(struct device *dev,</div><div class='del'>-				     const unsigned int *path,</div><div class='del'>-				     unsigned int path_len,</div><div class='del'>-				     struct mtk_ddp_comp *ddp_comp)</div><div class='add'>+static bool mtk_ddp_comp_find(struct device *dev,</div><div class='add'>+			      const unsigned int *path,</div><div class='add'>+			      unsigned int path_len,</div><div class='add'>+			      struct mtk_ddp_comp *ddp_comp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -514,10 +514,10 @@ static bool mtk_drm_find_comp_in_ddp(struct device *dev,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int mtk_drm_find_comp_in_ddp_conn_path(struct device *dev,</div><div class='del'>-						       const struct mtk_drm_route *routes,</div><div class='del'>-						       unsigned int num_routes,</div><div class='del'>-						       struct mtk_ddp_comp *ddp_comp)</div><div class='add'>+static unsigned int mtk_ddp_comp_find_in_route(struct device *dev,</div><div class='add'>+					       const struct mtk_drm_route *routes,</div><div class='add'>+					       unsigned int num_routes,</div><div class='add'>+					       struct mtk_ddp_comp *ddp_comp)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -554,26 +554,31 @@ int mtk_ddp_comp_get_id(struct device_node *node,</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,</div><div class='del'>-						struct device *dev)</div><div class='add'>+unsigned int mtk_find_possible_crtcs(struct drm_device *drm, struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_drm_private *private = drm-&gt;dev_private;</div><div class='ctx'> 	unsigned int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (mtk_drm_find_comp_in_ddp(dev, private-&gt;data-&gt;main_path, private-&gt;data-&gt;main_len,</div><div class='del'>-				     private-&gt;ddp_comp))</div><div class='add'>+	if (mtk_ddp_comp_find(dev,</div><div class='add'>+			      private-&gt;data-&gt;main_path,</div><div class='add'>+			      private-&gt;data-&gt;main_len,</div><div class='add'>+			      private-&gt;ddp_comp))</div><div class='ctx'> 		ret = BIT(0);</div><div class='del'>-	else if (mtk_drm_find_comp_in_ddp(dev, private-&gt;data-&gt;ext_path,</div><div class='del'>-					  private-&gt;data-&gt;ext_len, private-&gt;ddp_comp))</div><div class='add'>+	else if (mtk_ddp_comp_find(dev,</div><div class='add'>+				   private-&gt;data-&gt;ext_path,</div><div class='add'>+				   private-&gt;data-&gt;ext_len,</div><div class='add'>+				   private-&gt;ddp_comp))</div><div class='ctx'> 		ret = BIT(1);</div><div class='del'>-	else if (mtk_drm_find_comp_in_ddp(dev, private-&gt;data-&gt;third_path,</div><div class='del'>-					  private-&gt;data-&gt;third_len, private-&gt;ddp_comp))</div><div class='add'>+	else if (mtk_ddp_comp_find(dev,</div><div class='add'>+				   private-&gt;data-&gt;third_path,</div><div class='add'>+				   private-&gt;data-&gt;third_len,</div><div class='add'>+				   private-&gt;ddp_comp))</div><div class='ctx'> 		ret = BIT(2);</div><div class='ctx'> 	else</div><div class='del'>-		ret = mtk_drm_find_comp_in_ddp_conn_path(dev,</div><div class='del'>-							 private-&gt;data-&gt;conn_routes,</div><div class='del'>-							 private-&gt;data-&gt;num_conn_routes,</div><div class='del'>-							 private-&gt;ddp_comp);</div><div class='add'>+		ret = mtk_ddp_comp_find_in_route(dev,</div><div class='add'>+						 private-&gt;data-&gt;conn_routes,</div><div class='add'>+						 private-&gt;data-&gt;num_conn_routes,</div><div class='add'>+						 private-&gt;ddp_comp);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h<br/>index 93d79a1366e9..26236691ce4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_ddp_comp.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_ddp_comp.h</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * Copyright (c) 2015 MediaTek Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef MTK_DRM_DDP_COMP_H</div><div class='del'>-#define MTK_DRM_DDP_COMP_H</div><div class='add'>+#ifndef MTK_DDP_COMP_H</div><div class='add'>+#define MTK_DDP_COMP_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='hunk'>@@ -326,8 +326,7 @@ static inline void mtk_ddp_comp_encoder_index_set(struct mtk_ddp_comp *comp)</div><div class='ctx'> </div><div class='ctx'> int mtk_ddp_comp_get_id(struct device_node *node,</div><div class='ctx'> 			enum mtk_ddp_comp_type comp_type);</div><div class='del'>-unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,</div><div class='del'>-						struct device *dev);</div><div class='add'>+unsigned int mtk_find_possible_crtcs(struct drm_device *drm, struct device *dev);</div><div class='ctx'> int mtk_ddp_comp_init(struct device_node *comp_node, struct mtk_ddp_comp *comp,</div><div class='ctx'> 		      unsigned int comp_id);</div><div class='ctx'> enum mtk_ddp_comp_type mtk_ddp_comp_get_type(unsigned int comp_id);</div><div class='hunk'>@@ -340,4 +339,4 @@ void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value,</div><div class='ctx'> void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value,</div><div class='ctx'> 			struct cmdq_client_reg *cmdq_reg, void __iomem *regs,</div><div class='ctx'> 			unsigned int offset, unsigned int mask);</div><div class='del'>-#endif /* MTK_DRM_DDP_COMP_H */</div><div class='add'>+#endif /* MTK_DDP_COMP_H */</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/mediatek/mtk_disp_aal.c<br/>index 40fe403086c3..3ce8f32b06d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_aal.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_aal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_aal.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_aal.c</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DISP_AAL_EN				0x0000</div><div class='hunk'>@@ -223,7 +223,6 @@ struct platform_driver mtk_disp_aal_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_aal_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-aal",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_aal_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c<br/>index 465cddce0d32..df35e90dd25f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_ccorr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_ccorr.c</a></div><div class='hunk'>@@ -10,9 +10,9 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DISP_CCORR_EN				0x0000</div><div class='hunk'>@@ -214,7 +214,6 @@ struct platform_driver mtk_disp_ccorr_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_ccorr_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-ccorr",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_ccorr_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c b/drivers/gpu/drm/mediatek/mtk_disp_color.c<br/>index 78ea99f1444f..7f0085be5671 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_color.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_color.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_color.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_color.c</a></div><div class='hunk'>@@ -10,9 +10,9 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DISP_COLOR_CFG_MAIN			0x0400</div><div class='hunk'>@@ -164,7 +164,6 @@ struct platform_driver mtk_disp_color_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_color_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-color",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_color_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h<br/>index 90e64467ea8f..082ac18fe04a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_drv.h</a></div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-mmsys.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-mutex.h&gt;</div><div class='del'>-#include "mtk_drm_plane.h"</div><div class='ctx'> #include "mtk_mdp_rdma.h"</div><div class='add'>+#include "mtk_plane.h"</div><div class='ctx'> </div><div class='ctx'> int mtk_aal_clk_enable(struct device *dev);</div><div class='ctx'> void mtk_aal_clk_disable(struct device *dev);</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c<br/>index c1bc8b00d938..ca8d1f3aca03 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_gamma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_gamma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_gamma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_gamma.c</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DISP_GAMMA_EN				0x0000</div><div class='hunk'>@@ -334,7 +334,6 @@ struct platform_driver mtk_disp_gamma_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_gamma_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-gamma",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_gamma_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c<br/>index 32a29924bd54..77c057e0e671 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_merge.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_merge.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_merge.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_merge.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;linux/reset.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='ctx'> </div><div class='hunk'>@@ -376,7 +376,6 @@ struct platform_driver mtk_disp_merge_driver = {</div><div class='ctx'> 	.remove_new = mtk_disp_merge_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "mediatek-disp-merge",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_merge_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c<br/>index 2bffe4245466..b552a02d7eae 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ovl.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_ovl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ovl.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_ovl.c</a></div><div class='hunk'>@@ -15,9 +15,9 @@</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DISP_REG_OVL_INTEN			0x0004</div><div class='hunk'>@@ -659,7 +659,6 @@ struct platform_driver mtk_disp_ovl_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_ovl_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-ovl",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_ovl_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c<br/>index 034d31824d4d..02dd7dcdfedb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c</a></div><div class='hunk'>@@ -17,9 +17,9 @@</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-mmsys.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-mutex.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> #include "mtk_ethdr.h"</div><div class='ctx'> </div><div class='hunk'>@@ -629,6 +629,5 @@ struct platform_driver mtk_disp_ovl_adaptor_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_ovl_adaptor_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-ovl-adaptor",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c<br/>index faa907f2f443..7b1a6e631200 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_rdma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_disp_rdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_rdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_disp_rdma.c</a></div><div class='hunk'>@@ -13,9 +13,9 @@</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DISP_REG_RDMA_INT_ENABLE		0x0000</div><div class='hunk'>@@ -428,7 +428,6 @@ struct platform_driver mtk_disp_rdma_driver = {</div><div class='ctx'> 	.remove_new	= mtk_disp_rdma_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-rdma",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_disp_rdma_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c<br/>index 0ba72102636a..536366956447 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_dp.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_dp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_dp.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_dp.c</a></div><div class='hunk'>@@ -2104,7 +2104,7 @@ static ssize_t mtk_dp_aux_transfer(struct drm_dp_aux *mtk_aux,</div><div class='ctx'> </div><div class='ctx'> 	if (mtk_dp-&gt;bridge.type != DRM_MODE_CONNECTOR_eDP &amp;&amp;</div><div class='ctx'> 	    !mtk_dp-&gt;train_info.cable_plugged_in) {</div><div class='del'>-		ret = -EAGAIN;</div><div class='add'>+		ret = -EIO;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c<br/>index beb7d9d08e97..bfe8653005db 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_dpi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_dpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_dpi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_dpi.c</a></div><div class='hunk'>@@ -26,9 +26,9 @@</div><div class='ctx'> #include &lt;drm/drm_of.h&gt;</div><div class='ctx'> #include &lt;drm/drm_simple_kms_helper.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='ctx'> #include "mtk_dpi_regs.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> enum mtk_dpi_out_bit_num {</div><div class='hunk'>@@ -805,7 +805,7 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dpi-&gt;encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi-&gt;dev);</div><div class='add'>+	dpi-&gt;encoder.possible_crtcs = mtk_find_possible_crtcs(drm_dev, dpi-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_bridge_attach(&amp;dpi-&gt;encoder, &amp;dpi-&gt;bridge, NULL,</div><div class='ctx'> 				DRM_BRIDGE_ATTACH_NO_CONNECTOR);</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h<br/>deleted file mode 100644<br/>index 1f988ff1bf9f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_crtc.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_crtc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2015 MediaTek Inc.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef MTK_DRM_CRTC_H</div><div class='del'>-#define MTK_DRM_CRTC_H</div><div class='del'>-</div><div class='del'>-#include &lt;drm/drm_crtc.h&gt;</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='del'>-#include "mtk_drm_drv.h"</div><div class='del'>-#include "mtk_drm_plane.h"</div><div class='del'>-</div><div class='del'>-#define MTK_MAX_BPC	10</div><div class='del'>-#define MTK_MIN_BPC	3</div><div class='del'>-</div><div class='del'>-void mtk_drm_crtc_commit(struct drm_crtc *crtc);</div><div class='del'>-int mtk_drm_crtc_create(struct drm_device *drm_dev,</div><div class='del'>-			const unsigned int *path,</div><div class='del'>-			unsigned int path_len,</div><div class='del'>-			int priv_data_index,</div><div class='del'>-			const struct mtk_drm_route *conn_routes,</div><div class='del'>-			unsigned int num_conn_routes);</div><div class='del'>-int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='del'>-			     struct mtk_plane_state *state);</div><div class='del'>-void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,</div><div class='del'>-			       struct drm_atomic_state *plane_state);</div><div class='del'>-struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc);</div><div class='del'>-</div><div class='del'>-#endif /* MTK_DRM_CRTC_H */</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c<br/>index 74832c213092..b5f605751b0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_drv.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_drv.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_drm_drv.c</a></div><div class='hunk'>@@ -24,10 +24,10 @@</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_vblank.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='del'>-#include "mtk_drm_gem.h"</div><div class='add'>+#include "mtk_gem.h"</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME "mediatek"</div><div class='ctx'> #define DRIVER_DESC "Mediatek SoC DRM"</div><div class='hunk'>@@ -494,24 +494,24 @@ static int mtk_drm_kms_init(struct drm_device *drm)</div><div class='ctx'> 			priv_n = private-&gt;all_drm_private[j];</div><div class='ctx'> </div><div class='ctx'> 			if (i == CRTC_MAIN &amp;&amp; priv_n-&gt;data-&gt;main_len) {</div><div class='del'>-				ret = mtk_drm_crtc_create(drm, priv_n-&gt;data-&gt;main_path,</div><div class='del'>-							  priv_n-&gt;data-&gt;main_len, j,</div><div class='del'>-							  priv_n-&gt;data-&gt;conn_routes,</div><div class='del'>-							  priv_n-&gt;data-&gt;num_conn_routes);</div><div class='add'>+				ret = mtk_crtc_create(drm, priv_n-&gt;data-&gt;main_path,</div><div class='add'>+						      priv_n-&gt;data-&gt;main_len, j,</div><div class='add'>+						      priv_n-&gt;data-&gt;conn_routes,</div><div class='add'>+						      priv_n-&gt;data-&gt;num_conn_routes);</div><div class='ctx'> 				if (ret)</div><div class='ctx'> 					goto err_component_unbind;</div><div class='ctx'> </div><div class='ctx'> 				continue;</div><div class='ctx'> 			} else if (i == CRTC_EXT &amp;&amp; priv_n-&gt;data-&gt;ext_len) {</div><div class='del'>-				ret = mtk_drm_crtc_create(drm, priv_n-&gt;data-&gt;ext_path,</div><div class='del'>-							  priv_n-&gt;data-&gt;ext_len, j, NULL, 0);</div><div class='add'>+				ret = mtk_crtc_create(drm, priv_n-&gt;data-&gt;ext_path,</div><div class='add'>+						      priv_n-&gt;data-&gt;ext_len, j, NULL, 0);</div><div class='ctx'> 				if (ret)</div><div class='ctx'> 					goto err_component_unbind;</div><div class='ctx'> </div><div class='ctx'> 				continue;</div><div class='ctx'> 			} else if (i == CRTC_THIRD &amp;&amp; priv_n-&gt;data-&gt;third_len) {</div><div class='del'>-				ret = mtk_drm_crtc_create(drm, priv_n-&gt;data-&gt;third_path,</div><div class='del'>-							  priv_n-&gt;data-&gt;third_len, j, NULL, 0);</div><div class='add'>+				ret = mtk_crtc_create(drm, priv_n-&gt;data-&gt;third_path,</div><div class='add'>+						      priv_n-&gt;data-&gt;third_len, j, NULL, 0);</div><div class='ctx'> 				if (ret)</div><div class='ctx'> 					goto err_component_unbind;</div><div class='ctx'> </div><div class='hunk'>@@ -523,7 +523,7 @@ static int mtk_drm_kms_init(struct drm_device *drm)</div><div class='ctx'> 	/* Use OVL device for all DMA memory allocations */</div><div class='ctx'> 	crtc = drm_crtc_from_index(drm, 0);</div><div class='ctx'> 	if (crtc)</div><div class='del'>-		dma_dev = mtk_drm_crtc_dma_dev_get(crtc);</div><div class='add'>+		dma_dev = mtk_crtc_dma_dev_get(crtc);</div><div class='ctx'> 	if (!dma_dev) {</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		dev_err(drm-&gt;dev, "Need at least one OVL device\n");</div><div class='hunk'>@@ -576,8 +576,8 @@ DEFINE_DRM_GEM_FOPS(mtk_drm_fops);</div><div class='ctx'>  * We need to override this because the device used to import the memory is</div><div class='ctx'>  * not dev-&gt;dev, as drm_gem_prime_import() expects.</div><div class='ctx'>  */</div><div class='del'>-static struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,</div><div class='del'>-						       struct dma_buf *dma_buf)</div><div class='add'>+static struct drm_gem_object *mtk_gem_prime_import(struct drm_device *dev,</div><div class='add'>+						   struct dma_buf *dma_buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_drm_private *private = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='hunk'>@@ -587,9 +587,9 @@ static struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,</div><div class='ctx'> static const struct drm_driver mtk_drm_driver = {</div><div class='ctx'> 	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,</div><div class='ctx'> </div><div class='del'>-	.dumb_create = mtk_drm_gem_dumb_create,</div><div class='add'>+	.dumb_create = mtk_gem_dumb_create,</div><div class='ctx'> </div><div class='del'>-	.gem_prime_import = mtk_drm_gem_prime_import,</div><div class='add'>+	.gem_prime_import = mtk_gem_prime_import,</div><div class='ctx'> 	.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,</div><div class='ctx'> 	.fops = &amp;mtk_drm_fops,</div><div class='ctx'> </div><div class='hunk'>@@ -709,6 +709,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {</div><div class='ctx'> 	  .data = (void *)MTK_DISP_GAMMA, },</div><div class='ctx'> 	{ .compatible = "mediatek,mt8183-disp-gamma",</div><div class='ctx'> 	  .data = (void *)MTK_DISP_GAMMA, },</div><div class='add'>+	{ .compatible = "mediatek,mt8195-disp-gamma",</div><div class='add'>+	  .data = (void *)MTK_DISP_GAMMA, },</div><div class='ctx'> 	{ .compatible = "mediatek,mt8195-disp-merge",</div><div class='ctx'> 	  .data = (void *)MTK_DISP_MERGE },</div><div class='ctx'> 	{ .compatible = "mediatek,mt2701-disp-mutex",</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h<br/>index 33fadb08dc1c..78d698ede1bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_drm_drv.h</a></div><div class='hunk'>@@ -7,13 +7,13 @@</div><div class='ctx'> #define MTK_DRM_DRV_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_CONNECTOR	2</div><div class='ctx'> #define DDP_COMPONENT_DRM_OVL_ADAPTOR (DDP_COMPONENT_ID_MAX + 1)</div><div class='ctx'> #define DDP_COMPONENT_DRM_ID_MAX (DDP_COMPONENT_DRM_OVL_ADAPTOR + 1)</div><div class='ctx'> </div><div class='del'>-enum mtk_drm_crtc_path {</div><div class='add'>+enum mtk_crtc_path {</div><div class='ctx'> 	CRTC_MAIN,</div><div class='ctx'> 	CRTC_EXT,</div><div class='ctx'> 	CRTC_THIRD,</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c<br/>index 9501f4019199..c255559cc56e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_dsi.c</a></div><div class='hunk'>@@ -28,8 +28,8 @@</div><div class='ctx'> #include &lt;drm/drm_probe_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_simple_kms_helper.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define DSI_START		0x00</div><div class='hunk'>@@ -242,22 +242,23 @@ static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi)</div><div class='ctx'> 	u32 data_rate_mhz = DIV_ROUND_UP(dsi-&gt;data_rate, HZ_PER_MHZ);</div><div class='ctx'> 	struct mtk_phy_timing *timing = &amp;dsi-&gt;phy_timing;</div><div class='ctx'> </div><div class='del'>-	timing-&gt;lpx = (60 * data_rate_mhz / (8 * 1000)) + 1;</div><div class='del'>-	timing-&gt;da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;</div><div class='del'>-	timing-&gt;da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -</div><div class='add'>+	timing-&gt;lpx = (80 * data_rate_mhz / (8 * 1000)) + 1;</div><div class='add'>+	timing-&gt;da_hs_prepare = (59 * data_rate_mhz + 4 * 1000) / 8000 + 1;</div><div class='add'>+	timing-&gt;da_hs_zero = (163 * data_rate_mhz + 11 * 1000) / 8000 + 1 -</div><div class='ctx'> 			     timing-&gt;da_hs_prepare;</div><div class='del'>-	timing-&gt;da_hs_trail = timing-&gt;da_hs_prepare + 1;</div><div class='add'>+	timing-&gt;da_hs_trail = (78 * data_rate_mhz + 7 * 1000) / 8000 + 1;</div><div class='ctx'> </div><div class='del'>-	timing-&gt;ta_go = 4 * timing-&gt;lpx - 2;</div><div class='del'>-	timing-&gt;ta_sure = timing-&gt;lpx + 2;</div><div class='del'>-	timing-&gt;ta_get = 4 * timing-&gt;lpx;</div><div class='del'>-	timing-&gt;da_hs_exit = 2 * timing-&gt;lpx + 1;</div><div class='add'>+	timing-&gt;ta_go = 4 * timing-&gt;lpx;</div><div class='add'>+	timing-&gt;ta_sure = 3 * timing-&gt;lpx / 2;</div><div class='add'>+	timing-&gt;ta_get = 5 * timing-&gt;lpx;</div><div class='add'>+	timing-&gt;da_hs_exit = (118 * data_rate_mhz / (8 * 1000)) + 1;</div><div class='ctx'> </div><div class='del'>-	timing-&gt;clk_hs_prepare = 70 * data_rate_mhz / (8 * 1000);</div><div class='del'>-	timing-&gt;clk_hs_post = timing-&gt;clk_hs_prepare + 8;</div><div class='del'>-	timing-&gt;clk_hs_trail = timing-&gt;clk_hs_prepare;</div><div class='del'>-	timing-&gt;clk_hs_zero = timing-&gt;clk_hs_trail * 4;</div><div class='del'>-	timing-&gt;clk_hs_exit = 2 * timing-&gt;clk_hs_trail;</div><div class='add'>+	timing-&gt;clk_hs_prepare = (57 * data_rate_mhz / (8 * 1000)) + 1;</div><div class='add'>+	timing-&gt;clk_hs_post = (65 * data_rate_mhz + 53 * 1000) / 8000 + 1;</div><div class='add'>+	timing-&gt;clk_hs_trail = (78 * data_rate_mhz + 7 * 1000) / 8000 + 1;</div><div class='add'>+	timing-&gt;clk_hs_zero = (330 * data_rate_mhz / (8 * 1000)) + 1 -</div><div class='add'>+			      timing-&gt;clk_hs_prepare;</div><div class='add'>+	timing-&gt;clk_hs_exit = (118 * data_rate_mhz / (8 * 1000)) + 1;</div><div class='ctx'> </div><div class='ctx'> 	timcon0 = FIELD_PREP(LPX, timing-&gt;lpx) |</div><div class='ctx'> 		  FIELD_PREP(HS_PREP, timing-&gt;da_hs_prepare) |</div><div class='hunk'>@@ -662,7 +663,7 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * mtk_dsi_stop() and mtk_dsi_start() is asymmetric, since</div><div class='del'>-	 * mtk_dsi_stop() should be called after mtk_drm_crtc_atomic_disable(),</div><div class='add'>+	 * mtk_dsi_stop() should be called after mtk_crtc_atomic_disable(),</div><div class='ctx'> 	 * which needs irq for vblank, and mtk_dsi_stop() will disable irq.</div><div class='ctx'> 	 * mtk_dsi_start() needs to be called in mtk_output_dsi_enable(),</div><div class='ctx'> 	 * after dsi is fully set.</div><div class='hunk'>@@ -836,7 +837,7 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dsi-&gt;encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm, dsi-&gt;host.dev);</div><div class='add'>+	dsi-&gt;encoder.possible_crtcs = mtk_find_possible_crtcs(drm, dsi-&gt;host.dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_bridge_attach(&amp;dsi-&gt;encoder, &amp;dsi-&gt;bridge, NULL,</div><div class='ctx'> 				DRM_BRIDGE_ATTACH_NO_CONNECTOR);</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c<br/>index 6a5d0c345aab..156c6ff547e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_ethdr.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_ethdr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_ethdr.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_ethdr.c</a></div><div class='hunk'>@@ -14,8 +14,8 @@</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-mmsys.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='ctx'> #include "mtk_ethdr.h"</div><div class='ctx'> </div><div class='hunk'>@@ -363,7 +363,6 @@ struct platform_driver mtk_ethdr_driver = {</div><div class='ctx'> 	.remove_new	= mtk_ethdr_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-ethdr",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_ethdr_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c b/drivers/gpu/drm/mediatek/mtk_gem.c<br/>index 4f2e3feabc0f..5a82d7cf3ed0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_gem.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_gem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_gem.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_gem.c</a></div><div class='hunk'>@@ -12,37 +12,40 @@</div><div class='ctx'> #include &lt;drm/drm_prime.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='del'>-#include "mtk_drm_gem.h"</div><div class='add'>+#include "mtk_gem.h"</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_gem_object_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);</div><div class='add'>+static int mtk_gem_object_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);</div><div class='ctx'> </div><div class='ctx'> static const struct vm_operations_struct vm_ops = {</div><div class='ctx'> 	.open = drm_gem_vm_open,</div><div class='ctx'> 	.close = drm_gem_vm_close,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct drm_gem_object_funcs mtk_drm_gem_object_funcs = {</div><div class='del'>-	.free = mtk_drm_gem_free_object,</div><div class='add'>+static const struct drm_gem_object_funcs mtk_gem_object_funcs = {</div><div class='add'>+	.free = mtk_gem_free_object,</div><div class='ctx'> 	.get_sg_table = mtk_gem_prime_get_sg_table,</div><div class='del'>-	.vmap = mtk_drm_gem_prime_vmap,</div><div class='del'>-	.vunmap = mtk_drm_gem_prime_vunmap,</div><div class='del'>-	.mmap = mtk_drm_gem_object_mmap,</div><div class='add'>+	.vmap = mtk_gem_prime_vmap,</div><div class='add'>+	.vunmap = mtk_gem_prime_vunmap,</div><div class='add'>+	.mmap = mtk_gem_object_mmap,</div><div class='ctx'> 	.vm_ops = &amp;vm_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mtk_drm_gem_obj *mtk_drm_gem_init(struct drm_device *dev,</div><div class='del'>-						unsigned long size)</div><div class='add'>+static struct mtk_gem_obj *mtk_gem_init(struct drm_device *dev,</div><div class='add'>+					unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem_obj;</div><div class='add'>+	struct mtk_gem_obj *mtk_gem_obj;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	size = round_up(size, PAGE_SIZE);</div><div class='ctx'> </div><div class='add'>+	if (size == 0)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='ctx'> 	mtk_gem_obj = kzalloc(sizeof(*mtk_gem_obj), GFP_KERNEL);</div><div class='ctx'> 	if (!mtk_gem_obj)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	mtk_gem_obj-&gt;base.funcs = &amp;mtk_drm_gem_object_funcs;</div><div class='add'>+	mtk_gem_obj-&gt;base.funcs = &amp;mtk_gem_object_funcs;</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_gem_object_init(dev, &amp;mtk_gem_obj-&gt;base, size);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -54,15 +57,15 @@ static struct mtk_drm_gem_obj *mtk_drm_gem_init(struct drm_device *dev,</div><div class='ctx'> 	return mtk_gem_obj;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct mtk_drm_gem_obj *mtk_drm_gem_create(struct drm_device *dev,</div><div class='del'>-					   size_t size, bool alloc_kmap)</div><div class='add'>+struct mtk_gem_obj *mtk_gem_create(struct drm_device *dev,</div><div class='add'>+				   size_t size, bool alloc_kmap)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_drm_private *priv = dev-&gt;dev_private;</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem;</div><div class='add'>+	struct mtk_gem_obj *mtk_gem;</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mtk_gem = mtk_drm_gem_init(dev, size);</div><div class='add'>+	mtk_gem = mtk_gem_init(dev, size);</div><div class='ctx'> 	if (IS_ERR(mtk_gem))</div><div class='ctx'> 		return ERR_CAST(mtk_gem);</div><div class='ctx'> </div><div class='hunk'>@@ -97,9 +100,9 @@ err_gem_free:</div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mtk_drm_gem_free_object(struct drm_gem_object *obj)</div><div class='add'>+void mtk_gem_free_object(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='add'>+	struct mtk_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='ctx'> 	struct mtk_drm_private *priv = obj-&gt;dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	if (mtk_gem-&gt;sg)</div><div class='hunk'>@@ -114,10 +117,10 @@ void mtk_drm_gem_free_object(struct drm_gem_object *obj)</div><div class='ctx'> 	kfree(mtk_gem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mtk_drm_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,</div><div class='del'>-			    struct drm_mode_create_dumb *args)</div><div class='add'>+int mtk_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,</div><div class='add'>+			struct drm_mode_create_dumb *args)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem;</div><div class='add'>+	struct mtk_gem_obj *mtk_gem;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	args-&gt;pitch = DIV_ROUND_UP(args-&gt;width * args-&gt;bpp, 8);</div><div class='hunk'>@@ -130,7 +133,7 @@ int mtk_drm_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,</div><div class='ctx'> 	args-&gt;size = args-&gt;pitch;</div><div class='ctx'> 	args-&gt;size *= args-&gt;height;</div><div class='ctx'> </div><div class='del'>-	mtk_gem = mtk_drm_gem_create(dev, args-&gt;size, false);</div><div class='add'>+	mtk_gem = mtk_gem_create(dev, args-&gt;size, false);</div><div class='ctx'> 	if (IS_ERR(mtk_gem))</div><div class='ctx'> 		return PTR_ERR(mtk_gem);</div><div class='ctx'> </div><div class='hunk'>@@ -148,16 +151,16 @@ int mtk_drm_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_handle_create:</div><div class='del'>-	mtk_drm_gem_free_object(&amp;mtk_gem-&gt;base);</div><div class='add'>+	mtk_gem_free_object(&amp;mtk_gem-&gt;base);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_gem_object_mmap(struct drm_gem_object *obj,</div><div class='del'>-				   struct vm_area_struct *vma)</div><div class='add'>+static int mtk_gem_object_mmap(struct drm_gem_object *obj,</div><div class='add'>+			       struct vm_area_struct *vma)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='add'>+	struct mtk_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='ctx'> 	struct mtk_drm_private *priv = obj-&gt;dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -188,7 +191,7 @@ static int mtk_drm_gem_object_mmap(struct drm_gem_object *obj,</div><div class='ctx'>  */</div><div class='ctx'> struct sg_table *mtk_gem_prime_get_sg_table(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='add'>+	struct mtk_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='ctx'> 	struct mtk_drm_private *priv = obj-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct sg_table *sgt;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -212,7 +215,7 @@ struct sg_table *mtk_gem_prime_get_sg_table(struct drm_gem_object *obj)</div><div class='ctx'> struct drm_gem_object *mtk_gem_prime_import_sg_table(struct drm_device *dev,</div><div class='ctx'> 			struct dma_buf_attachment *attach, struct sg_table *sg)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem;</div><div class='add'>+	struct mtk_gem_obj *mtk_gem;</div><div class='ctx'> </div><div class='ctx'> 	/* check if the entries in the sg_table are contiguous */</div><div class='ctx'> 	if (drm_prime_get_contiguous_size(sg) &lt; attach-&gt;dmabuf-&gt;size) {</div><div class='hunk'>@@ -220,7 +223,7 @@ struct drm_gem_object *mtk_gem_prime_import_sg_table(struct drm_device *dev,</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mtk_gem = mtk_drm_gem_init(dev, attach-&gt;dmabuf-&gt;size);</div><div class='add'>+	mtk_gem = mtk_gem_init(dev, attach-&gt;dmabuf-&gt;size);</div><div class='ctx'> 	if (IS_ERR(mtk_gem))</div><div class='ctx'> 		return ERR_CAST(mtk_gem);</div><div class='ctx'> </div><div class='hunk'>@@ -230,9 +233,9 @@ struct drm_gem_object *mtk_gem_prime_import_sg_table(struct drm_device *dev,</div><div class='ctx'> 	return &amp;mtk_gem-&gt;base;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mtk_drm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map)</div><div class='add'>+int mtk_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='add'>+	struct mtk_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='ctx'> 	struct sg_table *sgt = NULL;</div><div class='ctx'> 	unsigned int npages;</div><div class='ctx'> </div><div class='hunk'>@@ -270,10 +273,9 @@ out:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mtk_drm_gem_prime_vunmap(struct drm_gem_object *obj,</div><div class='del'>-			      struct iosys_map *map)</div><div class='add'>+void mtk_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='add'>+	struct mtk_gem_obj *mtk_gem = to_mtk_gem_obj(obj);</div><div class='ctx'> 	void *vaddr = map-&gt;vaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (!mtk_gem-&gt;pages)</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.h b/drivers/gpu/drm/mediatek/mtk_gem.h<br/>index 78f23b07a02e..66e5f154f698 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_gem.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_gem.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_gem.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_gem.h</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * Copyright (c) 2015 MediaTek Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef _MTK_DRM_GEM_H_</div><div class='del'>-#define _MTK_DRM_GEM_H_</div><div class='add'>+#ifndef _MTK_GEM_H_</div><div class='add'>+#define _MTK_GEM_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_gem.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'>  * P.S. this object would be transferred to user as kms_bo.handle so</div><div class='ctx'>  *	user can access the buffer through kms_bo.handle.</div><div class='ctx'>  */</div><div class='del'>-struct mtk_drm_gem_obj {</div><div class='add'>+struct mtk_gem_obj {</div><div class='ctx'> 	struct drm_gem_object	base;</div><div class='ctx'> 	void			*cookie;</div><div class='ctx'> 	void			*kvaddr;</div><div class='hunk'>@@ -32,18 +32,17 @@ struct mtk_drm_gem_obj {</div><div class='ctx'> 	struct page		**pages;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define to_mtk_gem_obj(x)	container_of(x, struct mtk_drm_gem_obj, base)</div><div class='add'>+#define to_mtk_gem_obj(x) container_of(x, struct mtk_gem_obj, base)</div><div class='ctx'> </div><div class='del'>-void mtk_drm_gem_free_object(struct drm_gem_object *gem);</div><div class='del'>-struct mtk_drm_gem_obj *mtk_drm_gem_create(struct drm_device *dev, size_t size,</div><div class='del'>-					   bool alloc_kmap);</div><div class='del'>-int mtk_drm_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,</div><div class='del'>-			    struct drm_mode_create_dumb *args);</div><div class='add'>+void mtk_gem_free_object(struct drm_gem_object *gem);</div><div class='add'>+struct mtk_gem_obj *mtk_gem_create(struct drm_device *dev, size_t size,</div><div class='add'>+				   bool alloc_kmap);</div><div class='add'>+int mtk_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,</div><div class='add'>+			struct drm_mode_create_dumb *args);</div><div class='ctx'> struct sg_table *mtk_gem_prime_get_sg_table(struct drm_gem_object *obj);</div><div class='ctx'> struct drm_gem_object *mtk_gem_prime_import_sg_table(struct drm_device *dev,</div><div class='ctx'> 			struct dma_buf_attachment *attach, struct sg_table *sg);</div><div class='del'>-int mtk_drm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map);</div><div class='del'>-void mtk_drm_gem_prime_vunmap(struct drm_gem_object *obj,</div><div class='del'>-			      struct iosys_map *map);</div><div class='add'>+int mtk_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map);</div><div class='add'>+void mtk_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c<br/>index c6bdc565e4a9..6e1cca97a654 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_hdmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_hdmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_hdmi.c</a></div><div class='hunk'>@@ -1695,7 +1695,7 @@ static int mtk_hdmi_register_audio_driver(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mtk_drm_hdmi_probe(struct platform_device *pdev)</div><div class='add'>+static int mtk_hdmi_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_hdmi *hdmi;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -1754,7 +1754,7 @@ err_bridge_remove:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_hdmi_remove(struct platform_device *pdev)</div><div class='add'>+static void mtk_hdmi_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_hdmi *hdmi = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1798,7 +1798,7 @@ static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8167 = {</div><div class='ctx'> 	.cea_modes_only = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id mtk_drm_hdmi_of_ids[] = {</div><div class='add'>+static const struct of_device_id mtk_hdmi_of_ids[] = {</div><div class='ctx'> 	{ .compatible = "mediatek,mt2701-hdmi",</div><div class='ctx'> 	  .data = &amp;mtk_hdmi_conf_mt2701,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1809,14 +1809,14 @@ static const struct of_device_id mtk_drm_hdmi_of_ids[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='del'>-MODULE_DEVICE_TABLE(of, mtk_drm_hdmi_of_ids);</div><div class='add'>+MODULE_DEVICE_TABLE(of, mtk_hdmi_of_ids);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver mtk_hdmi_driver = {</div><div class='del'>-	.probe = mtk_drm_hdmi_probe,</div><div class='del'>-	.remove_new = mtk_drm_hdmi_remove,</div><div class='add'>+	.probe = mtk_hdmi_probe,</div><div class='add'>+	.remove_new = mtk_hdmi_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "mediatek-drm-hdmi",</div><div class='del'>-		.of_match_table = mtk_drm_hdmi_of_ids,</div><div class='add'>+		.of_match_table = mtk_hdmi_of_ids,</div><div class='ctx'> 		.pm = &amp;mtk_hdmi_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c<br/>index 54e46e440e0f..52d55861f954 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c</a></div><div class='hunk'>@@ -284,8 +284,7 @@ static int mtk_hdmi_ddc_probe(struct platform_device *pdev)</div><div class='ctx'> 		return PTR_ERR(ddc-&gt;clk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	ddc-&gt;regs = devm_ioremap_resource(&amp;pdev-&gt;dev, mem);</div><div class='add'>+	ddc-&gt;regs = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;mem);</div><div class='ctx'> 	if (IS_ERR(ddc-&gt;regs))</div><div class='ctx'> 		return PTR_ERR(ddc-&gt;regs);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c<br/>index ee9ce9b6d078..925cbb7471ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_mdp_rdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_mdp_rdma.c</a></div><div class='hunk'>@@ -346,7 +346,6 @@ struct platform_driver mtk_mdp_rdma_driver = {</div><div class='ctx'> 	.remove_new = mtk_mdp_rdma_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "mediatek-mdp-rdma",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_mdp_rdma_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_padding.c b/drivers/gpu/drm/mediatek/mtk_padding.c<br/>index 0d6451c149b6..85bc6768b6bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_padding.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_padding.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_padding.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_padding.c</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/soc/mediatek/mtk-cmdq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_disp_drv.h"</div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='ctx'> </div><div class='ctx'> #define PADDING_CONTROL_REG	0x00</div><div class='ctx'> #define PADDING_BYPASS			BIT(0)</div><div class='hunk'>@@ -154,7 +154,6 @@ struct platform_driver mtk_padding_driver = {</div><div class='ctx'> 	.remove		= mtk_padding_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mediatek-disp-padding",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mtk_padding_driver_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c<br/>index ddc9355b06d5..4625deb21d40 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_plane.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_plane.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_plane.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_plane.c</a></div><div class='hunk'>@@ -13,11 +13,11 @@</div><div class='ctx'> #include &lt;drm/drm_gem_atomic_helper.h&gt;</div><div class='ctx'> #include &lt;linux/align.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mtk_drm_crtc.h"</div><div class='del'>-#include "mtk_drm_ddp_comp.h"</div><div class='add'>+#include "mtk_crtc.h"</div><div class='add'>+#include "mtk_ddp_comp.h"</div><div class='ctx'> #include "mtk_drm_drv.h"</div><div class='del'>-#include "mtk_drm_gem.h"</div><div class='del'>-#include "mtk_drm_plane.h"</div><div class='add'>+#include "mtk_gem.h"</div><div class='add'>+#include "mtk_plane.h"</div><div class='ctx'> </div><div class='ctx'> static const u64 modifiers[] = {</div><div class='ctx'> 	DRM_FORMAT_MOD_LINEAR,</div><div class='hunk'>@@ -93,8 +93,8 @@ static bool mtk_plane_format_mod_supported(struct drm_plane *plane,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_drm_plane_destroy_state(struct drm_plane *plane,</div><div class='del'>-					struct drm_plane_state *state)</div><div class='add'>+static void mtk_plane_destroy_state(struct drm_plane *plane,</div><div class='add'>+				    struct drm_plane_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	__drm_atomic_helper_plane_destroy_state(state);</div><div class='ctx'> 	kfree(to_mtk_plane_state(state));</div><div class='hunk'>@@ -117,8 +117,8 @@ static int mtk_plane_atomic_async_check(struct drm_plane *plane,</div><div class='ctx'> 	if (!plane-&gt;state-&gt;fb)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = mtk_drm_crtc_plane_check(new_plane_state-&gt;crtc, plane,</div><div class='del'>-				       to_mtk_plane_state(new_plane_state));</div><div class='add'>+	ret = mtk_crtc_plane_check(new_plane_state-&gt;crtc, plane,</div><div class='add'>+				   to_mtk_plane_state(new_plane_state));</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -135,7 +135,7 @@ static void mtk_plane_update_new_state(struct drm_plane_state *new_state,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_framebuffer *fb = new_state-&gt;fb;</div><div class='ctx'> 	struct drm_gem_object *gem;</div><div class='del'>-	struct mtk_drm_gem_obj *mtk_gem;</div><div class='add'>+	struct mtk_gem_obj *mtk_gem;</div><div class='ctx'> 	unsigned int pitch, format;</div><div class='ctx'> 	u64 modifier;</div><div class='ctx'> 	dma_addr_t addr;</div><div class='hunk'>@@ -232,7 +232,7 @@ static void mtk_plane_atomic_async_update(struct drm_plane *plane,</div><div class='ctx'> 	swap(plane-&gt;state-&gt;fb, new_state-&gt;fb);</div><div class='ctx'> 	wmb(); /* Make sure the above parameters are set before update */</div><div class='ctx'> 	new_plane_state-&gt;pending.async_dirty = true;</div><div class='del'>-	mtk_drm_crtc_async_update(new_state-&gt;crtc, plane, state);</div><div class='add'>+	mtk_crtc_async_update(new_state-&gt;crtc, plane, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct drm_plane_funcs mtk_plane_funcs = {</div><div class='hunk'>@@ -241,7 +241,7 @@ static const struct drm_plane_funcs mtk_plane_funcs = {</div><div class='ctx'> 	.destroy = drm_plane_cleanup,</div><div class='ctx'> 	.reset = mtk_plane_reset,</div><div class='ctx'> 	.atomic_duplicate_state = mtk_plane_duplicate_state,</div><div class='del'>-	.atomic_destroy_state = mtk_drm_plane_destroy_state,</div><div class='add'>+	.atomic_destroy_state = mtk_plane_destroy_state,</div><div class='ctx'> 	.format_mod_supported = mtk_plane_format_mod_supported,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -260,8 +260,8 @@ static int mtk_plane_atomic_check(struct drm_plane *plane,</div><div class='ctx'> 	if (WARN_ON(!new_plane_state-&gt;crtc))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = mtk_drm_crtc_plane_check(new_plane_state-&gt;crtc, plane,</div><div class='del'>-				       to_mtk_plane_state(new_plane_state));</div><div class='add'>+	ret = mtk_crtc_plane_check(new_plane_state-&gt;crtc, plane,</div><div class='add'>+				   to_mtk_plane_state(new_plane_state));</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h b/drivers/gpu/drm/mediatek/mtk_plane.h<br/>index 99aff7da0831..231bb7aac947 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_plane.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mediatek/mtk_drm_plane.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mediatek/mtk_plane.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mediatek/mtk_plane.h</a></div><div class='hunk'>@@ -4,8 +4,8 @@</div><div class='ctx'>  * Author: CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef _MTK_DRM_PLANE_H_</div><div class='del'>-#define _MTK_DRM_PLANE_H_</div><div class='add'>+#ifndef _MTK_PLANE_H_</div><div class='add'>+#define _MTK_PLANE_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_crtc.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='head'>diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c<br/>index 5a9538bc0e26..5565f7777529 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/meson/meson_dw_hdmi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/meson/meson_dw_hdmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/meson/meson_dw_hdmi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/meson/meson_dw_hdmi.c</a></div><div class='hunk'>@@ -106,6 +106,8 @@</div><div class='ctx'> #define HHI_HDMI_CLK_CNTL	0x1cc /* 0x73 */</div><div class='ctx'> #define HHI_HDMI_PHY_CNTL0	0x3a0 /* 0xe8 */</div><div class='ctx'> #define HHI_HDMI_PHY_CNTL1	0x3a4 /* 0xe9 */</div><div class='add'>+#define  PHY_CNTL1_INIT		0x03900000</div><div class='add'>+#define  PHY_INVERT		BIT(17)</div><div class='ctx'> #define HHI_HDMI_PHY_CNTL2	0x3a8 /* 0xea */</div><div class='ctx'> #define HHI_HDMI_PHY_CNTL3	0x3ac /* 0xeb */</div><div class='ctx'> #define HHI_HDMI_PHY_CNTL4	0x3b0 /* 0xec */</div><div class='hunk'>@@ -130,6 +132,8 @@ struct meson_dw_hdmi_data {</div><div class='ctx'> 				    unsigned int addr);</div><div class='ctx'> 	void		(*dwc_write)(struct meson_dw_hdmi *dw_hdmi,</div><div class='ctx'> 				     unsigned int addr, unsigned int data);</div><div class='add'>+	u32 cntl0_init;</div><div class='add'>+	u32 cntl1_init;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct meson_dw_hdmi {</div><div class='hunk'>@@ -384,26 +388,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,</div><div class='ctx'> 	    dw_hdmi_bus_fmt_is_420(hdmi))</div><div class='ctx'> 		mode_is_420 = true;</div><div class='ctx'> </div><div class='del'>-	/* Enable clocks */</div><div class='del'>-	regmap_update_bits(priv-&gt;hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);</div><div class='del'>-</div><div class='del'>-	/* Bring HDMITX MEM output of power down */</div><div class='del'>-	regmap_update_bits(priv-&gt;hhi, HHI_MEM_PD_REG0, 0xff &lt;&lt; 8, 0);</div><div class='del'>-</div><div class='del'>-	/* Bring out of reset */</div><div class='del'>-	dw_hdmi-&gt;data-&gt;top_write(dw_hdmi, HDMITX_TOP_SW_RESET,  0);</div><div class='del'>-</div><div class='del'>-	/* Enable internal pixclk, tmds_clk, spdif_clk, i2s_clk, cecclk */</div><div class='del'>-	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,</div><div class='del'>-			       0x3, 0x3);</div><div class='del'>-</div><div class='del'>-	/* Enable cec_clk and hdcp22_tmdsclk_en */</div><div class='del'>-	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,</div><div class='del'>-			       0x3 &lt;&lt; 4, 0x3 &lt;&lt; 4);</div><div class='del'>-</div><div class='del'>-	/* Enable normal output to PHY */</div><div class='del'>-	dw_hdmi-&gt;data-&gt;top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));</div><div class='del'>-</div><div class='ctx'> 	/* TMDS pattern setup */</div><div class='ctx'> 	if (mode-&gt;clock &gt; 340000 &amp;&amp; !mode_is_420) {</div><div class='ctx'> 		dw_hdmi-&gt;data-&gt;top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,</div><div class='hunk'>@@ -425,20 +409,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,</div><div class='ctx'> 	/* Setup PHY parameters */</div><div class='ctx'> 	meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420);</div><div class='ctx'> </div><div class='del'>-	/* Setup PHY */</div><div class='del'>-	regmap_update_bits(priv-&gt;hhi, HHI_HDMI_PHY_CNTL1,</div><div class='del'>-			   0xffff &lt;&lt; 16, 0x0390 &lt;&lt; 16);</div><div class='del'>-</div><div class='del'>-	/* BIT_INVERT */</div><div class='del'>-	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||</div><div class='del'>-	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi") ||</div><div class='del'>-	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))</div><div class='del'>-		regmap_update_bits(priv-&gt;hhi, HHI_HDMI_PHY_CNTL1,</div><div class='del'>-				   BIT(17), 0);</div><div class='del'>-	else</div><div class='del'>-		regmap_update_bits(priv-&gt;hhi, HHI_HDMI_PHY_CNTL1,</div><div class='del'>-				   BIT(17), BIT(17));</div><div class='del'>-</div><div class='ctx'> 	/* Disable clock, fifo, fifo_wr */</div><div class='ctx'> 	regmap_update_bits(priv-&gt;hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -492,7 +462,9 @@ static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_DRIVER("\n");</div><div class='ctx'> </div><div class='del'>-	regmap_write(priv-&gt;hhi, HHI_HDMI_PHY_CNTL0, 0);</div><div class='add'>+	/* Fallback to init mode */</div><div class='add'>+	regmap_write(priv-&gt;hhi, HHI_HDMI_PHY_CNTL1, dw_hdmi-&gt;data-&gt;cntl1_init);</div><div class='add'>+	regmap_write(priv-&gt;hhi, HHI_HDMI_PHY_CNTL0, dw_hdmi-&gt;data-&gt;cntl0_init);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,</div><div class='hunk'>@@ -610,11 +582,22 @@ static const struct regmap_config meson_dw_hdmi_regmap_config = {</div><div class='ctx'> 	.fast_io = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct meson_dw_hdmi_data meson_dw_hdmi_gx_data = {</div><div class='add'>+static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {</div><div class='ctx'> 	.top_read = dw_hdmi_top_read,</div><div class='ctx'> 	.top_write = dw_hdmi_top_write,</div><div class='ctx'> 	.dwc_read = dw_hdmi_dwc_read,</div><div class='ctx'> 	.dwc_write = dw_hdmi_dwc_write,</div><div class='add'>+	.cntl0_init = 0x0,</div><div class='add'>+	.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {</div><div class='add'>+	.top_read = dw_hdmi_top_read,</div><div class='add'>+	.top_write = dw_hdmi_top_write,</div><div class='add'>+	.dwc_read = dw_hdmi_dwc_read,</div><div class='add'>+	.dwc_write = dw_hdmi_dwc_write,</div><div class='add'>+	.cntl0_init = 0x0,</div><div class='add'>+	.cntl1_init = PHY_CNTL1_INIT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {</div><div class='hunk'>@@ -622,6 +605,8 @@ static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {</div><div class='ctx'> 	.top_write = dw_hdmi_g12a_top_write,</div><div class='ctx'> 	.dwc_read = dw_hdmi_g12a_dwc_read,</div><div class='ctx'> 	.dwc_write = dw_hdmi_g12a_dwc_write,</div><div class='add'>+	.cntl0_init = 0x000b4242, /* Bandgap */</div><div class='add'>+	.cntl1_init = PHY_CNTL1_INIT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)</div><div class='hunk'>@@ -656,6 +641,13 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)</div><div class='ctx'> 	meson_dw_hdmi-&gt;data-&gt;top_write(meson_dw_hdmi,</div><div class='ctx'> 				       HDMITX_TOP_CLK_CNTL, 0xff);</div><div class='ctx'> </div><div class='add'>+	/* Enable normal output to PHY */</div><div class='add'>+	meson_dw_hdmi-&gt;data-&gt;top_write(meson_dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));</div><div class='add'>+</div><div class='add'>+	/* Setup PHY */</div><div class='add'>+	regmap_write(priv-&gt;hhi, HHI_HDMI_PHY_CNTL1, meson_dw_hdmi-&gt;data-&gt;cntl1_init);</div><div class='add'>+	regmap_write(priv-&gt;hhi, HHI_HDMI_PHY_CNTL0, meson_dw_hdmi-&gt;data-&gt;cntl0_init);</div><div class='add'>+</div><div class='ctx'> 	/* Enable HDMI-TX Interrupt */</div><div class='ctx'> 	meson_dw_hdmi-&gt;data-&gt;top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,</div><div class='ctx'> 				       HDMITX_TOP_INTR_CORE);</div><div class='hunk'>@@ -865,11 +857,11 @@ static const struct dev_pm_ops meson_dw_hdmi_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id meson_dw_hdmi_of_table[] = {</div><div class='ctx'> 	{ .compatible = "amlogic,meson-gxbb-dw-hdmi",</div><div class='del'>-	  .data = &amp;meson_dw_hdmi_gx_data },</div><div class='add'>+	  .data = &amp;meson_dw_hdmi_gxbb_data },</div><div class='ctx'> 	{ .compatible = "amlogic,meson-gxl-dw-hdmi",</div><div class='del'>-	  .data = &amp;meson_dw_hdmi_gx_data },</div><div class='add'>+	  .data = &amp;meson_dw_hdmi_gxl_data },</div><div class='ctx'> 	{ .compatible = "amlogic,meson-gxm-dw-hdmi",</div><div class='del'>-	  .data = &amp;meson_dw_hdmi_gx_data },</div><div class='add'>+	  .data = &amp;meson_dw_hdmi_gxl_data },</div><div class='ctx'> 	{ .compatible = "amlogic,meson-g12a-dw-hdmi",</div><div class='ctx'> 	  .data = &amp;meson_dw_hdmi_g12a_data },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c<br/>index a6bc1bdb3d0d..a10cff3ca1fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/meson/meson_dw_mipi_dsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/meson/meson_dw_mipi_dsi.c</a></div><div class='hunk'>@@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	clk_disable_unprepare(mipi_dsi-&gt;px_clk);</div><div class='ctx'> 	ret = clk_set_rate(mipi_dsi-&gt;px_clk, mipi_dsi-&gt;mode-&gt;clock * 1000);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = clk_prepare_enable(mipi_dsi-&gt;px_clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(mipi_dsi-&gt;dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (mipi_dsi-&gt;dsi_device-&gt;format) {</div><div class='ctx'> 	case MIPI_DSI_FMT_RGB888:</div><div class='ctx'> 		dpi_data_format = DPI_COLOR_24BIT;</div><div class='head'>diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c<br/>index 2a82119eb58e..2a942dc6a6dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/meson/meson_vclk.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/meson/meson_vclk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/meson/meson_vclk.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/meson/meson_vclk.c</a></div><div class='hunk'>@@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,</div><div class='ctx'> 				 FREQ_1000_1001(params[i].pixel_freq));</div><div class='ctx'> 		DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",</div><div class='ctx'> 				 i, params[i].phy_freq,</div><div class='del'>-				 FREQ_1000_1001(params[i].phy_freq/10)*10);</div><div class='add'>+				 FREQ_1000_1001(params[i].phy_freq/1000)*1000);</div><div class='ctx'> 		/* Match strict frequency */</div><div class='ctx'> 		if (phy_freq == params[i].phy_freq &amp;&amp;</div><div class='ctx'> 		    vclk_freq == params[i].vclk_freq)</div><div class='ctx'> 			return MODE_OK;</div><div class='ctx'> 		/* Match 1000/1001 variant */</div><div class='del'>-		if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &amp;&amp;</div><div class='add'>+		if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/1000)*1000) &amp;&amp;</div><div class='ctx'> 		    vclk_freq == FREQ_1000_1001(params[i].vclk_freq))</div><div class='ctx'> 			return MODE_OK;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,</div><div class='ctx'> </div><div class='ctx'> 	for (freq = 0 ; params[freq].pixel_freq ; ++freq) {</div><div class='ctx'> 		if ((phy_freq == params[freq].phy_freq ||</div><div class='del'>-		     phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &amp;&amp;</div><div class='add'>+		     phy_freq == FREQ_1000_1001(params[freq].phy_freq/1000)*1000) &amp;&amp;</div><div class='ctx'> 		    (vclk_freq == params[freq].vclk_freq ||</div><div class='ctx'> 		     vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {</div><div class='ctx'> 			if (vclk_freq != params[freq].vclk_freq)</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h<br/>index 765e49fd8911..58a0e62eaf18 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mgag200/mgag200_drv.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mgag200/mgag200_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mgag200/mgag200_drv.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mgag200/mgag200_drv.h</a></div><div class='hunk'>@@ -366,6 +366,7 @@ struct drm_crtc_state;</div><div class='ctx'> struct drm_display_mode;</div><div class='ctx'> struct drm_plane;</div><div class='ctx'> struct drm_atomic_state;</div><div class='add'>+struct drm_scanout_buffer;</div><div class='ctx'> </div><div class='ctx'> extern const uint32_t mgag200_primary_plane_formats[];</div><div class='ctx'> extern const size_t   mgag200_primary_plane_formats_size;</div><div class='hunk'>@@ -379,12 +380,16 @@ void mgag200_primary_plane_helper_atomic_enable(struct drm_plane *plane,</div><div class='ctx'> 						struct drm_atomic_state *state);</div><div class='ctx'> void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane,</div><div class='ctx'> 						 struct drm_atomic_state *old_state);</div><div class='add'>+int mgag200_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,</div><div class='add'>+						    struct drm_scanout_buffer *sb);</div><div class='add'>+</div><div class='ctx'> #define MGAG200_PRIMARY_PLANE_HELPER_FUNCS \</div><div class='ctx'> 	DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, \</div><div class='ctx'> 	.atomic_check = mgag200_primary_plane_helper_atomic_check, \</div><div class='ctx'> 	.atomic_update = mgag200_primary_plane_helper_atomic_update, \</div><div class='ctx'> 	.atomic_enable = mgag200_primary_plane_helper_atomic_enable, \</div><div class='del'>-	.atomic_disable = mgag200_primary_plane_helper_atomic_disable</div><div class='add'>+	.atomic_disable = mgag200_primary_plane_helper_atomic_disable, \</div><div class='add'>+	.get_scanout_buffer = mgag200_primary_plane_helper_get_scanout_buffer</div><div class='ctx'> </div><div class='ctx'> #define MGAG200_PRIMARY_PLANE_FUNCS \</div><div class='ctx'> 	.update_plane = drm_atomic_helper_update_plane, \</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c<br/>index e17cb4c5f774..fc54851d3384 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mgag200/mgag200_mode.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/mgag200/mgag200_mode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/mgag200/mgag200_mode.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/mgag200/mgag200_mode.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;drm/drm_framebuffer.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_atomic_helper.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_framebuffer_helper.h&gt;</div><div class='add'>+#include &lt;drm/drm_panic.h&gt;</div><div class='ctx'> #include &lt;drm/drm_print.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mgag200_drv.h"</div><div class='hunk'>@@ -546,6 +547,23 @@ void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane,</div><div class='ctx'> 	msleep(20);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mgag200_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,</div><div class='add'>+						    struct drm_scanout_buffer *sb)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = to_mga_device(plane-&gt;dev);</div><div class='add'>+	struct iosys_map map = IOSYS_MAP_INIT_VADDR_IOMEM(mdev-&gt;vram);</div><div class='add'>+</div><div class='add'>+	if (plane-&gt;state &amp;&amp; plane-&gt;state-&gt;fb) {</div><div class='add'>+		sb-&gt;format = plane-&gt;state-&gt;fb-&gt;format;</div><div class='add'>+		sb-&gt;width = plane-&gt;state-&gt;fb-&gt;width;</div><div class='add'>+		sb-&gt;height = plane-&gt;state-&gt;fb-&gt;height;</div><div class='add'>+		sb-&gt;pitch[0] = plane-&gt;state-&gt;fb-&gt;pitches[0];</div><div class='add'>+		sb-&gt;map[0] = map;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * CRTC</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/gpu/drm/msm/.gitignore b/drivers/gpu/drm/msm/.gitignore<br/>new file mode 100644<br/>index 000000000000..9ab870da897d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/.gitignore?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/msm/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+generated/</div><div class='head'>diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig<br/>index f202f26adab2..1931ecf73e32 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/Kconfig?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/Kconfig?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/msm/Kconfig</a></div><div class='hunk'>@@ -14,7 +14,7 @@ config DRM_MSM</div><div class='ctx'> 	select IOMMU_IO_PGTABLE</div><div class='ctx'> 	select QCOM_MDT_LOADER if ARCH_QCOM</div><div class='ctx'> 	select REGULATOR</div><div class='del'>-	select DRM_DP_AUX_BUS</div><div class='add'>+	select DRM_DISPLAY_DP_AUX_BUS</div><div class='ctx'> 	select DRM_DISPLAY_DP_HELPER</div><div class='ctx'> 	select DRM_DISPLAY_HELPER</div><div class='ctx'> 	select DRM_EXEC</div><div class='hunk'>@@ -54,6 +54,14 @@ config DRM_MSM_GPU_SUDO</div><div class='ctx'> 	  Only use this if you are a driver developer.  This should *not*</div><div class='ctx'> 	  be enabled for production kernels.  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config DRM_MSM_VALIDATE_XML</div><div class='add'>+	bool "Validate XML register files against schema"</div><div class='add'>+	depends on DRM_MSM &amp;&amp; EXPERT</div><div class='add'>+	depends on $(success,$(PYTHON3) -c "import lxml")</div><div class='add'>+	help</div><div class='add'>+	  Validate XML files with register definitions against rules-fd schema.</div><div class='add'>+	  This option is mostly targeting DRM MSM developers. If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config DRM_MSM_MDSS</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on DRM_MSM</div><div class='head'>diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile<br/>index b21ae2880c71..718968717ad5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/Makefile?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/Makefile?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/msm/Makefile</a></div><div class='hunk'>@@ -1,13 +1,15 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> ccflags-y := -I $(srctree)/$(src)</div><div class='add'>+ccflags-y += -I $(obj)/generated</div><div class='ctx'> ccflags-y += -I $(srctree)/$(src)/disp/dpu1</div><div class='ctx'> ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi</div><div class='ctx'> ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp</div><div class='ctx'> </div><div class='del'>-msm-y := \</div><div class='add'>+adreno-y := \</div><div class='ctx'> 	adreno/adreno_device.o \</div><div class='ctx'> 	adreno/adreno_gpu.o \</div><div class='ctx'> 	adreno/a2xx_gpu.o \</div><div class='add'>+	adreno/a2xx_gpummu.o \</div><div class='ctx'> 	adreno/a3xx_gpu.o \</div><div class='ctx'> 	adreno/a4xx_gpu.o \</div><div class='ctx'> 	adreno/a5xx_gpu.o \</div><div class='hunk'>@@ -17,7 +19,11 @@ msm-y := \</div><div class='ctx'> 	adreno/a6xx_gmu.o \</div><div class='ctx'> 	adreno/a6xx_hfi.o \</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_HDMI) += \</div><div class='add'>+adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \</div><div class='add'>+</div><div class='add'>+adreno-$(CONFIG_DRM_MSM_GPU_STATE)	+= adreno/a6xx_gpu_state.o</div><div class='add'>+</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_HDMI) += \</div><div class='ctx'> 	hdmi/hdmi.o \</div><div class='ctx'> 	hdmi/hdmi_audio.o \</div><div class='ctx'> 	hdmi/hdmi_bridge.o \</div><div class='hunk'>@@ -30,7 +36,7 @@ msm-$(CONFIG_DRM_MSM_HDMI) += \</div><div class='ctx'> 	hdmi/hdmi_phy_8x74.o \</div><div class='ctx'> 	hdmi/hdmi_pll_8960.o \</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_MDP4) += \</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_MDP4) += \</div><div class='ctx'> 	disp/mdp4/mdp4_crtc.o \</div><div class='ctx'> 	disp/mdp4/mdp4_dsi_encoder.o \</div><div class='ctx'> 	disp/mdp4/mdp4_dtv_encoder.o \</div><div class='hunk'>@@ -41,7 +47,7 @@ msm-$(CONFIG_DRM_MSM_MDP4) += \</div><div class='ctx'> 	disp/mdp4/mdp4_kms.o \</div><div class='ctx'> 	disp/mdp4/mdp4_plane.o \</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_MDP5) += \</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_MDP5) += \</div><div class='ctx'> 	disp/mdp5/mdp5_cfg.o \</div><div class='ctx'> 	disp/mdp5/mdp5_cmd_encoder.o \</div><div class='ctx'> 	disp/mdp5/mdp5_ctl.o \</div><div class='hunk'>@@ -54,7 +60,7 @@ msm-$(CONFIG_DRM_MSM_MDP5) += \</div><div class='ctx'> 	disp/mdp5/mdp5_plane.o \</div><div class='ctx'> 	disp/mdp5/mdp5_smp.o \</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_DPU) += \</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DPU) += \</div><div class='ctx'> 	disp/dpu1/dpu_core_perf.o \</div><div class='ctx'> 	disp/dpu1/dpu_crtc.o \</div><div class='ctx'> 	disp/dpu1/dpu_encoder.o \</div><div class='hunk'>@@ -84,14 +90,16 @@ msm-$(CONFIG_DRM_MSM_DPU) += \</div><div class='ctx'> 	disp/dpu1/dpu_vbif.o \</div><div class='ctx'> 	disp/dpu1/dpu_writeback.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_MDSS) += \</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_MDSS) += \</div><div class='ctx'> 	msm_mdss.o \</div><div class='ctx'> </div><div class='del'>-msm-y += \</div><div class='add'>+msm-display-y += \</div><div class='ctx'> 	disp/mdp_format.o \</div><div class='ctx'> 	disp/mdp_kms.o \</div><div class='ctx'> 	disp/msm_disp_snapshot.o \</div><div class='ctx'> 	disp/msm_disp_snapshot_util.o \</div><div class='add'>+</div><div class='add'>+msm-y += \</div><div class='ctx'> 	msm_atomic.o \</div><div class='ctx'> 	msm_atomic_tracepoints.o \</div><div class='ctx'> 	msm_debugfs.o \</div><div class='hunk'>@@ -113,14 +121,13 @@ msm-y += \</div><div class='ctx'> 	msm_ringbuffer.o \</div><div class='ctx'> 	msm_submitqueue.o \</div><div class='ctx'> 	msm_gpu_tracepoints.o \</div><div class='del'>-	msm_gpummu.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \</div><div class='del'>-	dp/dp_debug.o</div><div class='add'>+msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_GPU_STATE)	+= adreno/a6xx_gpu_state.o</div><div class='add'>+msm-display-$(CONFIG_DEBUG_FS) += \</div><div class='add'>+	dp/dp_debug.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \</div><div class='ctx'> 	dp/dp_catalog.o \</div><div class='ctx'> 	dp/dp_ctrl.o \</div><div class='ctx'> 	dp/dp_display.o \</div><div class='hunk'>@@ -130,21 +137,76 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \</div><div class='ctx'> 	dp/dp_audio.o \</div><div class='ctx'> 	dp/dp_utils.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o</div><div class='del'>-</div><div class='del'>-msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \</div><div class='ctx'> 			dsi/dsi_cfg.o \</div><div class='ctx'> 			dsi/dsi_host.o \</div><div class='ctx'> 			dsi/dsi_manager.o \</div><div class='ctx'> 			dsi/phy/dsi_phy.o</div><div class='ctx'> </div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o</div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o</div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o</div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o</div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o</div><div class='del'>-msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o</div><div class='add'>+msm-display-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o</div><div class='add'>+</div><div class='add'>+msm-y += $(adreno-y) $(msm-display-y)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DRM_MSM)	+= msm.o</div><div class='add'>+</div><div class='add'>+ifeq (y,$(CONFIG_DRM_MSM_VALIDATE_XML))</div><div class='add'>+	headergen-opts += --validate</div><div class='add'>+else</div><div class='add'>+	headergen-opts += --no-validate</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+quiet_cmd_headergen = GENHDR  $@</div><div class='add'>+      cmd_headergen = mkdir -p $(obj)/generated &amp;&amp; $(PYTHON3) $(srctree)/$(src)/registers/gen_header.py \</div><div class='add'>+		      $(headergen-opts) --rnn $(srctree)/$(src)/registers --xml $&lt; c-defines &gt; $@</div><div class='add'>+</div><div class='add'>+$(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \</div><div class='add'>+		$(src)/registers/adreno/adreno_common.xml \</div><div class='add'>+		$(src)/registers/adreno/adreno_pm4.xml \</div><div class='add'>+		$(src)/registers/freedreno_copyright.xml \</div><div class='add'>+		$(src)/registers/gen_header.py \</div><div class='add'>+		$(src)/registers/rules-fd.xsd \</div><div class='add'>+		FORCE</div><div class='add'>+	$(call if_changed,headergen)</div><div class='add'>+</div><div class='add'>+$(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \</div><div class='add'>+		$(src)/registers/freedreno_copyright.xml \</div><div class='add'>+		$(src)/registers/gen_header.py \</div><div class='add'>+		$(src)/registers/rules-fd.xsd \</div><div class='add'>+		FORCE</div><div class='add'>+	$(call if_changed,headergen)</div><div class='add'>+</div><div class='add'>+ADRENO_HEADERS = \</div><div class='add'>+	generated/a2xx.xml.h \</div><div class='add'>+	generated/a3xx.xml.h \</div><div class='add'>+	generated/a4xx.xml.h \</div><div class='add'>+	generated/a5xx.xml.h \</div><div class='add'>+	generated/a6xx.xml.h \</div><div class='add'>+	generated/a6xx_gmu.xml.h \</div><div class='add'>+	generated/adreno_common.xml.h \</div><div class='add'>+	generated/adreno_pm4.xml.h \</div><div class='add'>+</div><div class='add'>+DISPLAY_HEADERS = \</div><div class='add'>+	generated/dsi_phy_7nm.xml.h \</div><div class='add'>+	generated/dsi_phy_10nm.xml.h \</div><div class='add'>+	generated/dsi_phy_14nm.xml.h \</div><div class='add'>+	generated/dsi_phy_20nm.xml.h \</div><div class='add'>+	generated/dsi_phy_28nm_8960.xml.h \</div><div class='add'>+	generated/dsi_phy_28nm.xml.h \</div><div class='add'>+	generated/dsi.xml.h \</div><div class='add'>+	generated/hdmi.xml.h \</div><div class='add'>+	generated/mdp4.xml.h \</div><div class='add'>+	generated/mdp5.xml.h \</div><div class='add'>+	generated/mdp_common.xml.h \</div><div class='add'>+	generated/sfpb.xml.h</div><div class='add'>+</div><div class='add'>+$(addprefix $(obj)/,$(adreno-y)): $(addprefix $(obj)/,$(ADRENO_HEADERS))</div><div class='add'>+$(addprefix $(obj)/,$(msm-display-y)): $(addprefix $(obj)/,$(DISPLAY_HEADERS))</div><div class='add'>+</div><div class='add'>+targets += $(ADRENO_HEADERS) $(DISPLAY_HEADERS)</div><div class='head'>diff --git a/drivers/gpu/drm/msm/adreno/a2xx.xml.h b/drivers/gpu/drm/msm/adreno/a2xx.xml.h<br/>deleted file mode 100644<br/>index 23141cbcea97..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a2xx.xml.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx.xml.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3251 +0,0 @@</div><div class='del'>-#ifndef A2XX_XML</div><div class='del'>-#define A2XX_XML</div><div class='del'>-</div><div class='del'>-/* Autogenerated file, DO NOT EDIT manually!</div><div class='del'>-</div><div class='del'>-This file was generated by the rules-ng-ng gen_header.py tool in this git repository:</div><div class='del'>-http://gitlab.freedesktop.org/mesa/mesa/</div><div class='del'>-git clone https://gitlab.freedesktop.org/mesa/mesa.git</div><div class='del'>-</div><div class='del'>-The rules-ng-ng source files this header was generated from are:</div><div class='del'>-</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a2xx.xml          (  91929 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml  (   1572 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_common.xml (  15434 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pm4.xml    (  85691 bytes, from Fri Feb 16 09:49:01 2024)</div><div class='del'>-</div><div class='del'>-Copyright (C) 2013-2024 by the following authors:</div><div class='del'>-- Rob Clark &lt;robdclark@gmail.com&gt; Rob Clark</div><div class='del'>-- Ilia Mirkin &lt;imirkin@alum.mit.edu&gt; Ilia Mirkin</div><div class='del'>-</div><div class='del'>-Permission is hereby granted, free of charge, to any person obtaining</div><div class='del'>-a copy of this software and associated documentation files (the</div><div class='del'>-"Software"), to deal in the Software without restriction, including</div><div class='del'>-without limitation the rights to use, copy, modify, merge, publish,</div><div class='del'>-distribute, sublicense, and/or sell copies of the Software, and to</div><div class='del'>-permit persons to whom the Software is furnished to do so, subject to</div><div class='del'>-the following conditions:</div><div class='del'>-</div><div class='del'>-The above copyright notice and this permission notice (including the</div><div class='del'>-next paragraph) shall be included in all copies or substantial</div><div class='del'>-portions of the Software.</div><div class='del'>-</div><div class='del'>-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='del'>-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.</div><div class='del'>-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE</div><div class='del'>-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION</div><div class='del'>-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION</div><div class='del'>-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#define assert(x) BUG_ON(!(x))</div><div class='del'>-#else</div><div class='del'>-#include &lt;assert.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#define __struct_cast(X)</div><div class='del'>-#else</div><div class='del'>-#define __struct_cast(X) (struct X)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum a2xx_rb_dither_type {</div><div class='del'>-	DITHER_PIXEL = 0,</div><div class='del'>-	DITHER_SUBPIXEL = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_colorformatx {</div><div class='del'>-	COLORX_4_4_4_4 = 0,</div><div class='del'>-	COLORX_1_5_5_5 = 1,</div><div class='del'>-	COLORX_5_6_5 = 2,</div><div class='del'>-	COLORX_8 = 3,</div><div class='del'>-	COLORX_8_8 = 4,</div><div class='del'>-	COLORX_8_8_8_8 = 5,</div><div class='del'>-	COLORX_S8_8_8_8 = 6,</div><div class='del'>-	COLORX_16_FLOAT = 7,</div><div class='del'>-	COLORX_16_16_FLOAT = 8,</div><div class='del'>-	COLORX_16_16_16_16_FLOAT = 9,</div><div class='del'>-	COLORX_32_FLOAT = 10,</div><div class='del'>-	COLORX_32_32_FLOAT = 11,</div><div class='del'>-	COLORX_32_32_32_32_FLOAT = 12,</div><div class='del'>-	COLORX_2_3_3 = 13,</div><div class='del'>-	COLORX_8_8_8 = 14,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_sq_surfaceformat {</div><div class='del'>-	FMT_1_REVERSE = 0,</div><div class='del'>-	FMT_1 = 1,</div><div class='del'>-	FMT_8 = 2,</div><div class='del'>-	FMT_1_5_5_5 = 3,</div><div class='del'>-	FMT_5_6_5 = 4,</div><div class='del'>-	FMT_6_5_5 = 5,</div><div class='del'>-	FMT_8_8_8_8 = 6,</div><div class='del'>-	FMT_2_10_10_10 = 7,</div><div class='del'>-	FMT_8_A = 8,</div><div class='del'>-	FMT_8_B = 9,</div><div class='del'>-	FMT_8_8 = 10,</div><div class='del'>-	FMT_Cr_Y1_Cb_Y0 = 11,</div><div class='del'>-	FMT_Y1_Cr_Y0_Cb = 12,</div><div class='del'>-	FMT_5_5_5_1 = 13,</div><div class='del'>-	FMT_8_8_8_8_A = 14,</div><div class='del'>-	FMT_4_4_4_4 = 15,</div><div class='del'>-	FMT_8_8_8 = 16,</div><div class='del'>-	FMT_DXT1 = 18,</div><div class='del'>-	FMT_DXT2_3 = 19,</div><div class='del'>-	FMT_DXT4_5 = 20,</div><div class='del'>-	FMT_10_10_10_2 = 21,</div><div class='del'>-	FMT_24_8 = 22,</div><div class='del'>-	FMT_16 = 24,</div><div class='del'>-	FMT_16_16 = 25,</div><div class='del'>-	FMT_16_16_16_16 = 26,</div><div class='del'>-	FMT_16_EXPAND = 27,</div><div class='del'>-	FMT_16_16_EXPAND = 28,</div><div class='del'>-	FMT_16_16_16_16_EXPAND = 29,</div><div class='del'>-	FMT_16_FLOAT = 30,</div><div class='del'>-	FMT_16_16_FLOAT = 31,</div><div class='del'>-	FMT_16_16_16_16_FLOAT = 32,</div><div class='del'>-	FMT_32 = 33,</div><div class='del'>-	FMT_32_32 = 34,</div><div class='del'>-	FMT_32_32_32_32 = 35,</div><div class='del'>-	FMT_32_FLOAT = 36,</div><div class='del'>-	FMT_32_32_FLOAT = 37,</div><div class='del'>-	FMT_32_32_32_32_FLOAT = 38,</div><div class='del'>-	FMT_ATI_TC_RGB = 39,</div><div class='del'>-	FMT_ATI_TC_RGBA = 40,</div><div class='del'>-	FMT_ATI_TC_555_565_RGB = 41,</div><div class='del'>-	FMT_ATI_TC_555_565_RGBA = 42,</div><div class='del'>-	FMT_ATI_TC_RGBA_INTERP = 43,</div><div class='del'>-	FMT_ATI_TC_555_565_RGBA_INTERP = 44,</div><div class='del'>-	FMT_ETC1_RGBA_INTERP = 46,</div><div class='del'>-	FMT_ETC1_RGB = 47,</div><div class='del'>-	FMT_ETC1_RGBA = 48,</div><div class='del'>-	FMT_DXN = 49,</div><div class='del'>-	FMT_2_3_3 = 51,</div><div class='del'>-	FMT_2_10_10_10_AS_16_16_16_16 = 54,</div><div class='del'>-	FMT_10_10_10_2_AS_16_16_16_16 = 55,</div><div class='del'>-	FMT_32_32_32_FLOAT = 57,</div><div class='del'>-	FMT_DXT3A = 58,</div><div class='del'>-	FMT_DXT5A = 59,</div><div class='del'>-	FMT_CTX1 = 60,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_sq_ps_vtx_mode {</div><div class='del'>-	POSITION_1_VECTOR = 0,</div><div class='del'>-	POSITION_2_VECTORS_UNUSED = 1,</div><div class='del'>-	POSITION_2_VECTORS_SPRITE = 2,</div><div class='del'>-	POSITION_2_VECTORS_EDGE = 3,</div><div class='del'>-	POSITION_2_VECTORS_KILL = 4,</div><div class='del'>-	POSITION_2_VECTORS_SPRITE_KILL = 5,</div><div class='del'>-	POSITION_2_VECTORS_EDGE_KILL = 6,</div><div class='del'>-	MULTIPASS = 7,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_sq_sample_cntl {</div><div class='del'>-	CENTROIDS_ONLY = 0,</div><div class='del'>-	CENTERS_ONLY = 1,</div><div class='del'>-	CENTROIDS_AND_CENTERS = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_dx_clip_space {</div><div class='del'>-	DXCLIP_OPENGL = 0,</div><div class='del'>-	DXCLIP_DIRECTX = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_pa_su_sc_polymode {</div><div class='del'>-	POLY_DISABLED = 0,</div><div class='del'>-	POLY_DUALMODE = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_rb_edram_mode {</div><div class='del'>-	EDRAM_NOP = 0,</div><div class='del'>-	COLOR_DEPTH = 4,</div><div class='del'>-	DEPTH_ONLY = 5,</div><div class='del'>-	EDRAM_COPY = 6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_pa_sc_pattern_bit_order {</div><div class='del'>-	LITTLE = 0,</div><div class='del'>-	BIG = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_pa_sc_auto_reset_cntl {</div><div class='del'>-	NEVER = 0,</div><div class='del'>-	EACH_PRIMITIVE = 1,</div><div class='del'>-	EACH_PACKET = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_pa_pixcenter {</div><div class='del'>-	PIXCENTER_D3D = 0,</div><div class='del'>-	PIXCENTER_OGL = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_pa_roundmode {</div><div class='del'>-	TRUNCATE = 0,</div><div class='del'>-	ROUND = 1,</div><div class='del'>-	ROUNDTOEVEN = 2,</div><div class='del'>-	ROUNDTOODD = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_pa_quantmode {</div><div class='del'>-	ONE_SIXTEENTH = 0,</div><div class='del'>-	ONE_EIGTH = 1,</div><div class='del'>-	ONE_QUARTER = 2,</div><div class='del'>-	ONE_HALF = 3,</div><div class='del'>-	ONE = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_rb_copy_sample_select {</div><div class='del'>-	SAMPLE_0 = 0,</div><div class='del'>-	SAMPLE_1 = 1,</div><div class='del'>-	SAMPLE_2 = 2,</div><div class='del'>-	SAMPLE_3 = 3,</div><div class='del'>-	SAMPLE_01 = 4,</div><div class='del'>-	SAMPLE_23 = 5,</div><div class='del'>-	SAMPLE_0123 = 6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_rb_blend_opcode {</div><div class='del'>-	BLEND2_DST_PLUS_SRC = 0,</div><div class='del'>-	BLEND2_SRC_MINUS_DST = 1,</div><div class='del'>-	BLEND2_MIN_DST_SRC = 2,</div><div class='del'>-	BLEND2_MAX_DST_SRC = 3,</div><div class='del'>-	BLEND2_DST_MINUS_SRC = 4,</div><div class='del'>-	BLEND2_DST_PLUS_SRC_BIAS = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_su_perfcnt_select {</div><div class='del'>-	PERF_PAPC_PASX_REQ = 0,</div><div class='del'>-	PERF_PAPC_PASX_FIRST_VECTOR = 2,</div><div class='del'>-	PERF_PAPC_PASX_SECOND_VECTOR = 3,</div><div class='del'>-	PERF_PAPC_PASX_FIRST_DEAD = 4,</div><div class='del'>-	PERF_PAPC_PASX_SECOND_DEAD = 5,</div><div class='del'>-	PERF_PAPC_PASX_VTX_KILL_DISCARD = 6,</div><div class='del'>-	PERF_PAPC_PASX_VTX_NAN_DISCARD = 7,</div><div class='del'>-	PERF_PAPC_PA_INPUT_PRIM = 8,</div><div class='del'>-	PERF_PAPC_PA_INPUT_NULL_PRIM = 9,</div><div class='del'>-	PERF_PAPC_PA_INPUT_EVENT_FLAG = 10,</div><div class='del'>-	PERF_PAPC_PA_INPUT_FIRST_PRIM_SLOT = 11,</div><div class='del'>-	PERF_PAPC_PA_INPUT_END_OF_PACKET = 12,</div><div class='del'>-	PERF_PAPC_CLPR_CULL_PRIM = 13,</div><div class='del'>-	PERF_PAPC_CLPR_VV_CULL_PRIM = 15,</div><div class='del'>-	PERF_PAPC_CLPR_VTX_KILL_CULL_PRIM = 17,</div><div class='del'>-	PERF_PAPC_CLPR_VTX_NAN_CULL_PRIM = 18,</div><div class='del'>-	PERF_PAPC_CLPR_CULL_TO_NULL_PRIM = 19,</div><div class='del'>-	PERF_PAPC_CLPR_VV_CLIP_PRIM = 21,</div><div class='del'>-	PERF_PAPC_CLPR_POINT_CLIP_CANDIDATE = 23,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_CNT_1 = 24,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_CNT_2 = 25,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_CNT_3 = 26,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_CNT_4 = 27,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_CNT_5 = 28,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_CNT_6 = 29,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_NEAR = 30,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_FAR = 31,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_LEFT = 32,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_RIGHT = 33,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_TOP = 34,</div><div class='del'>-	PERF_PAPC_CLPR_CLIP_PLANE_BOTTOM = 35,</div><div class='del'>-	PERF_PAPC_CLSM_NULL_PRIM = 36,</div><div class='del'>-	PERF_PAPC_CLSM_TOTALLY_VISIBLE_PRIM = 37,</div><div class='del'>-	PERF_PAPC_CLSM_CLIP_PRIM = 38,</div><div class='del'>-	PERF_PAPC_CLSM_CULL_TO_NULL_PRIM = 39,</div><div class='del'>-	PERF_PAPC_CLSM_OUT_PRIM_CNT_1 = 40,</div><div class='del'>-	PERF_PAPC_CLSM_OUT_PRIM_CNT_2 = 41,</div><div class='del'>-	PERF_PAPC_CLSM_OUT_PRIM_CNT_3 = 42,</div><div class='del'>-	PERF_PAPC_CLSM_OUT_PRIM_CNT_4 = 43,</div><div class='del'>-	PERF_PAPC_CLSM_OUT_PRIM_CNT_5 = 44,</div><div class='del'>-	PERF_PAPC_CLSM_OUT_PRIM_CNT_6_7 = 45,</div><div class='del'>-	PERF_PAPC_CLSM_NON_TRIVIAL_CULL = 46,</div><div class='del'>-	PERF_PAPC_SU_INPUT_PRIM = 47,</div><div class='del'>-	PERF_PAPC_SU_INPUT_CLIP_PRIM = 48,</div><div class='del'>-	PERF_PAPC_SU_INPUT_NULL_PRIM = 49,</div><div class='del'>-	PERF_PAPC_SU_ZERO_AREA_CULL_PRIM = 50,</div><div class='del'>-	PERF_PAPC_SU_BACK_FACE_CULL_PRIM = 51,</div><div class='del'>-	PERF_PAPC_SU_FRONT_FACE_CULL_PRIM = 52,</div><div class='del'>-	PERF_PAPC_SU_POLYMODE_FACE_CULL = 53,</div><div class='del'>-	PERF_PAPC_SU_POLYMODE_BACK_CULL = 54,</div><div class='del'>-	PERF_PAPC_SU_POLYMODE_FRONT_CULL = 55,</div><div class='del'>-	PERF_PAPC_SU_POLYMODE_INVALID_FILL = 56,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_PRIM = 57,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_CLIP_PRIM = 58,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_NULL_PRIM = 59,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_EVENT_FLAG = 60,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_FIRST_PRIM_SLOT = 61,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_END_OF_PACKET = 62,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_POLYMODE_FACE = 63,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_POLYMODE_BACK = 64,</div><div class='del'>-	PERF_PAPC_SU_OUTPUT_POLYMODE_FRONT = 65,</div><div class='del'>-	PERF_PAPC_SU_OUT_CLIP_POLYMODE_FACE = 66,</div><div class='del'>-	PERF_PAPC_SU_OUT_CLIP_POLYMODE_BACK = 67,</div><div class='del'>-	PERF_PAPC_SU_OUT_CLIP_POLYMODE_FRONT = 68,</div><div class='del'>-	PERF_PAPC_PASX_REQ_IDLE = 69,</div><div class='del'>-	PERF_PAPC_PASX_REQ_BUSY = 70,</div><div class='del'>-	PERF_PAPC_PASX_REQ_STALLED = 71,</div><div class='del'>-	PERF_PAPC_PASX_REC_IDLE = 72,</div><div class='del'>-	PERF_PAPC_PASX_REC_BUSY = 73,</div><div class='del'>-	PERF_PAPC_PASX_REC_STARVED_SX = 74,</div><div class='del'>-	PERF_PAPC_PASX_REC_STALLED = 75,</div><div class='del'>-	PERF_PAPC_PASX_REC_STALLED_POS_MEM = 76,</div><div class='del'>-	PERF_PAPC_PASX_REC_STALLED_CCGSM_IN = 77,</div><div class='del'>-	PERF_PAPC_CCGSM_IDLE = 78,</div><div class='del'>-	PERF_PAPC_CCGSM_BUSY = 79,</div><div class='del'>-	PERF_PAPC_CCGSM_STALLED = 80,</div><div class='del'>-	PERF_PAPC_CLPRIM_IDLE = 81,</div><div class='del'>-	PERF_PAPC_CLPRIM_BUSY = 82,</div><div class='del'>-	PERF_PAPC_CLPRIM_STALLED = 83,</div><div class='del'>-	PERF_PAPC_CLPRIM_STARVED_CCGSM = 84,</div><div class='del'>-	PERF_PAPC_CLIPSM_IDLE = 85,</div><div class='del'>-	PERF_PAPC_CLIPSM_BUSY = 86,</div><div class='del'>-	PERF_PAPC_CLIPSM_WAIT_CLIP_VERT_ENGH = 87,</div><div class='del'>-	PERF_PAPC_CLIPSM_WAIT_HIGH_PRI_SEQ = 88,</div><div class='del'>-	PERF_PAPC_CLIPSM_WAIT_CLIPGA = 89,</div><div class='del'>-	PERF_PAPC_CLIPSM_WAIT_AVAIL_VTE_CLIP = 90,</div><div class='del'>-	PERF_PAPC_CLIPSM_WAIT_CLIP_OUTSM = 91,</div><div class='del'>-	PERF_PAPC_CLIPGA_IDLE = 92,</div><div class='del'>-	PERF_PAPC_CLIPGA_BUSY = 93,</div><div class='del'>-	PERF_PAPC_CLIPGA_STARVED_VTE_CLIP = 94,</div><div class='del'>-	PERF_PAPC_CLIPGA_STALLED = 95,</div><div class='del'>-	PERF_PAPC_CLIP_IDLE = 96,</div><div class='del'>-	PERF_PAPC_CLIP_BUSY = 97,</div><div class='del'>-	PERF_PAPC_SU_IDLE = 98,</div><div class='del'>-	PERF_PAPC_SU_BUSY = 99,</div><div class='del'>-	PERF_PAPC_SU_STARVED_CLIP = 100,</div><div class='del'>-	PERF_PAPC_SU_STALLED_SC = 101,</div><div class='del'>-	PERF_PAPC_SU_FACENESS_CULL = 102,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_sc_perfcnt_select {</div><div class='del'>-	SC_SR_WINDOW_VALID = 0,</div><div class='del'>-	SC_CW_WINDOW_VALID = 1,</div><div class='del'>-	SC_QM_WINDOW_VALID = 2,</div><div class='del'>-	SC_FW_WINDOW_VALID = 3,</div><div class='del'>-	SC_EZ_WINDOW_VALID = 4,</div><div class='del'>-	SC_IT_WINDOW_VALID = 5,</div><div class='del'>-	SC_STARVED_BY_PA = 6,</div><div class='del'>-	SC_STALLED_BY_RB_TILE = 7,</div><div class='del'>-	SC_STALLED_BY_RB_SAMP = 8,</div><div class='del'>-	SC_STARVED_BY_RB_EZ = 9,</div><div class='del'>-	SC_STALLED_BY_SAMPLE_FF = 10,</div><div class='del'>-	SC_STALLED_BY_SQ = 11,</div><div class='del'>-	SC_STALLED_BY_SP = 12,</div><div class='del'>-	SC_TOTAL_NO_PRIMS = 13,</div><div class='del'>-	SC_NON_EMPTY_PRIMS = 14,</div><div class='del'>-	SC_NO_TILES_PASSING_QM = 15,</div><div class='del'>-	SC_NO_PIXELS_PRE_EZ = 16,</div><div class='del'>-	SC_NO_PIXELS_POST_EZ = 17,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_vgt_perfcount_select {</div><div class='del'>-	VGT_SQ_EVENT_WINDOW_ACTIVE = 0,</div><div class='del'>-	VGT_SQ_SEND = 1,</div><div class='del'>-	VGT_SQ_STALLED = 2,</div><div class='del'>-	VGT_SQ_STARVED_BUSY = 3,</div><div class='del'>-	VGT_SQ_STARVED_IDLE = 4,</div><div class='del'>-	VGT_SQ_STATIC = 5,</div><div class='del'>-	VGT_PA_EVENT_WINDOW_ACTIVE = 6,</div><div class='del'>-	VGT_PA_CLIP_V_SEND = 7,</div><div class='del'>-	VGT_PA_CLIP_V_STALLED = 8,</div><div class='del'>-	VGT_PA_CLIP_V_STARVED_BUSY = 9,</div><div class='del'>-	VGT_PA_CLIP_V_STARVED_IDLE = 10,</div><div class='del'>-	VGT_PA_CLIP_V_STATIC = 11,</div><div class='del'>-	VGT_PA_CLIP_P_SEND = 12,</div><div class='del'>-	VGT_PA_CLIP_P_STALLED = 13,</div><div class='del'>-	VGT_PA_CLIP_P_STARVED_BUSY = 14,</div><div class='del'>-	VGT_PA_CLIP_P_STARVED_IDLE = 15,</div><div class='del'>-	VGT_PA_CLIP_P_STATIC = 16,</div><div class='del'>-	VGT_PA_CLIP_S_SEND = 17,</div><div class='del'>-	VGT_PA_CLIP_S_STALLED = 18,</div><div class='del'>-	VGT_PA_CLIP_S_STARVED_BUSY = 19,</div><div class='del'>-	VGT_PA_CLIP_S_STARVED_IDLE = 20,</div><div class='del'>-	VGT_PA_CLIP_S_STATIC = 21,</div><div class='del'>-	RBIU_FIFOS_EVENT_WINDOW_ACTIVE = 22,</div><div class='del'>-	RBIU_IMMED_DATA_FIFO_STARVED = 23,</div><div class='del'>-	RBIU_IMMED_DATA_FIFO_STALLED = 24,</div><div class='del'>-	RBIU_DMA_REQUEST_FIFO_STARVED = 25,</div><div class='del'>-	RBIU_DMA_REQUEST_FIFO_STALLED = 26,</div><div class='del'>-	RBIU_DRAW_INITIATOR_FIFO_STARVED = 27,</div><div class='del'>-	RBIU_DRAW_INITIATOR_FIFO_STALLED = 28,</div><div class='del'>-	BIN_PRIM_NEAR_CULL = 29,</div><div class='del'>-	BIN_PRIM_ZERO_CULL = 30,</div><div class='del'>-	BIN_PRIM_FAR_CULL = 31,</div><div class='del'>-	BIN_PRIM_BIN_CULL = 32,</div><div class='del'>-	BIN_PRIM_FACE_CULL = 33,</div><div class='del'>-	SPARE34 = 34,</div><div class='del'>-	SPARE35 = 35,</div><div class='del'>-	SPARE36 = 36,</div><div class='del'>-	SPARE37 = 37,</div><div class='del'>-	SPARE38 = 38,</div><div class='del'>-	SPARE39 = 39,</div><div class='del'>-	TE_SU_IN_VALID = 40,</div><div class='del'>-	TE_SU_IN_READ = 41,</div><div class='del'>-	TE_SU_IN_PRIM = 42,</div><div class='del'>-	TE_SU_IN_EOP = 43,</div><div class='del'>-	TE_SU_IN_NULL_PRIM = 44,</div><div class='del'>-	TE_WK_IN_VALID = 45,</div><div class='del'>-	TE_WK_IN_READ = 46,</div><div class='del'>-	TE_OUT_PRIM_VALID = 47,</div><div class='del'>-	TE_OUT_PRIM_READ = 48,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_tcr_perfcount_select {</div><div class='del'>-	DGMMPD_IPMUX0_STALL = 0,</div><div class='del'>-	DGMMPD_IPMUX_ALL_STALL = 4,</div><div class='del'>-	OPMUX0_L2_WRITES = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_tp_perfcount_select {</div><div class='del'>-	POINT_QUADS = 0,</div><div class='del'>-	BILIN_QUADS = 1,</div><div class='del'>-	ANISO_QUADS = 2,</div><div class='del'>-	MIP_QUADS = 3,</div><div class='del'>-	VOL_QUADS = 4,</div><div class='del'>-	MIP_VOL_QUADS = 5,</div><div class='del'>-	MIP_ANISO_QUADS = 6,</div><div class='del'>-	VOL_ANISO_QUADS = 7,</div><div class='del'>-	ANISO_2_1_QUADS = 8,</div><div class='del'>-	ANISO_4_1_QUADS = 9,</div><div class='del'>-	ANISO_6_1_QUADS = 10,</div><div class='del'>-	ANISO_8_1_QUADS = 11,</div><div class='del'>-	ANISO_10_1_QUADS = 12,</div><div class='del'>-	ANISO_12_1_QUADS = 13,</div><div class='del'>-	ANISO_14_1_QUADS = 14,</div><div class='del'>-	ANISO_16_1_QUADS = 15,</div><div class='del'>-	MIP_VOL_ANISO_QUADS = 16,</div><div class='del'>-	ALIGN_2_QUADS = 17,</div><div class='del'>-	ALIGN_4_QUADS = 18,</div><div class='del'>-	PIX_0_QUAD = 19,</div><div class='del'>-	PIX_1_QUAD = 20,</div><div class='del'>-	PIX_2_QUAD = 21,</div><div class='del'>-	PIX_3_QUAD = 22,</div><div class='del'>-	PIX_4_QUAD = 23,</div><div class='del'>-	TP_MIPMAP_LOD0 = 24,</div><div class='del'>-	TP_MIPMAP_LOD1 = 25,</div><div class='del'>-	TP_MIPMAP_LOD2 = 26,</div><div class='del'>-	TP_MIPMAP_LOD3 = 27,</div><div class='del'>-	TP_MIPMAP_LOD4 = 28,</div><div class='del'>-	TP_MIPMAP_LOD5 = 29,</div><div class='del'>-	TP_MIPMAP_LOD6 = 30,</div><div class='del'>-	TP_MIPMAP_LOD7 = 31,</div><div class='del'>-	TP_MIPMAP_LOD8 = 32,</div><div class='del'>-	TP_MIPMAP_LOD9 = 33,</div><div class='del'>-	TP_MIPMAP_LOD10 = 34,</div><div class='del'>-	TP_MIPMAP_LOD11 = 35,</div><div class='del'>-	TP_MIPMAP_LOD12 = 36,</div><div class='del'>-	TP_MIPMAP_LOD13 = 37,</div><div class='del'>-	TP_MIPMAP_LOD14 = 38,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_tcm_perfcount_select {</div><div class='del'>-	QUAD0_RD_LAT_FIFO_EMPTY = 0,</div><div class='del'>-	QUAD0_RD_LAT_FIFO_4TH_FULL = 3,</div><div class='del'>-	QUAD0_RD_LAT_FIFO_HALF_FULL = 4,</div><div class='del'>-	QUAD0_RD_LAT_FIFO_FULL = 5,</div><div class='del'>-	QUAD0_RD_LAT_FIFO_LT_4TH_FULL = 6,</div><div class='del'>-	READ_STARVED_QUAD0 = 28,</div><div class='del'>-	READ_STARVED = 32,</div><div class='del'>-	READ_STALLED_QUAD0 = 33,</div><div class='del'>-	READ_STALLED = 37,</div><div class='del'>-	VALID_READ_QUAD0 = 38,</div><div class='del'>-	TC_TP_STARVED_QUAD0 = 42,</div><div class='del'>-	TC_TP_STARVED = 46,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_tcf_perfcount_select {</div><div class='del'>-	VALID_CYCLES = 0,</div><div class='del'>-	SINGLE_PHASES = 1,</div><div class='del'>-	ANISO_PHASES = 2,</div><div class='del'>-	MIP_PHASES = 3,</div><div class='del'>-	VOL_PHASES = 4,</div><div class='del'>-	MIP_VOL_PHASES = 5,</div><div class='del'>-	MIP_ANISO_PHASES = 6,</div><div class='del'>-	VOL_ANISO_PHASES = 7,</div><div class='del'>-	ANISO_2_1_PHASES = 8,</div><div class='del'>-	ANISO_4_1_PHASES = 9,</div><div class='del'>-	ANISO_6_1_PHASES = 10,</div><div class='del'>-	ANISO_8_1_PHASES = 11,</div><div class='del'>-	ANISO_10_1_PHASES = 12,</div><div class='del'>-	ANISO_12_1_PHASES = 13,</div><div class='del'>-	ANISO_14_1_PHASES = 14,</div><div class='del'>-	ANISO_16_1_PHASES = 15,</div><div class='del'>-	MIP_VOL_ANISO_PHASES = 16,</div><div class='del'>-	ALIGN_2_PHASES = 17,</div><div class='del'>-	ALIGN_4_PHASES = 18,</div><div class='del'>-	TPC_BUSY = 19,</div><div class='del'>-	TPC_STALLED = 20,</div><div class='del'>-	TPC_STARVED = 21,</div><div class='del'>-	TPC_WORKING = 22,</div><div class='del'>-	TPC_WALKER_BUSY = 23,</div><div class='del'>-	TPC_WALKER_STALLED = 24,</div><div class='del'>-	TPC_WALKER_WORKING = 25,</div><div class='del'>-	TPC_ALIGNER_BUSY = 26,</div><div class='del'>-	TPC_ALIGNER_STALLED = 27,</div><div class='del'>-	TPC_ALIGNER_STALLED_BY_BLEND = 28,</div><div class='del'>-	TPC_ALIGNER_STALLED_BY_CACHE = 29,</div><div class='del'>-	TPC_ALIGNER_WORKING = 30,</div><div class='del'>-	TPC_BLEND_BUSY = 31,</div><div class='del'>-	TPC_BLEND_SYNC = 32,</div><div class='del'>-	TPC_BLEND_STARVED = 33,</div><div class='del'>-	TPC_BLEND_WORKING = 34,</div><div class='del'>-	OPCODE_0x00 = 35,</div><div class='del'>-	OPCODE_0x01 = 36,</div><div class='del'>-	OPCODE_0x04 = 37,</div><div class='del'>-	OPCODE_0x10 = 38,</div><div class='del'>-	OPCODE_0x11 = 39,</div><div class='del'>-	OPCODE_0x12 = 40,</div><div class='del'>-	OPCODE_0x13 = 41,</div><div class='del'>-	OPCODE_0x18 = 42,</div><div class='del'>-	OPCODE_0x19 = 43,</div><div class='del'>-	OPCODE_0x1A = 44,</div><div class='del'>-	OPCODE_OTHER = 45,</div><div class='del'>-	IN_FIFO_0_EMPTY = 56,</div><div class='del'>-	IN_FIFO_0_LT_HALF_FULL = 57,</div><div class='del'>-	IN_FIFO_0_HALF_FULL = 58,</div><div class='del'>-	IN_FIFO_0_FULL = 59,</div><div class='del'>-	IN_FIFO_TPC_EMPTY = 72,</div><div class='del'>-	IN_FIFO_TPC_LT_HALF_FULL = 73,</div><div class='del'>-	IN_FIFO_TPC_HALF_FULL = 74,</div><div class='del'>-	IN_FIFO_TPC_FULL = 75,</div><div class='del'>-	TPC_TC_XFC = 76,</div><div class='del'>-	TPC_TC_STATE = 77,</div><div class='del'>-	TC_STALL = 78,</div><div class='del'>-	QUAD0_TAPS = 79,</div><div class='del'>-	QUADS = 83,</div><div class='del'>-	TCA_SYNC_STALL = 84,</div><div class='del'>-	TAG_STALL = 85,</div><div class='del'>-	TCB_SYNC_STALL = 88,</div><div class='del'>-	TCA_VALID = 89,</div><div class='del'>-	PROBES_VALID = 90,</div><div class='del'>-	MISS_STALL = 91,</div><div class='del'>-	FETCH_FIFO_STALL = 92,</div><div class='del'>-	TCO_STALL = 93,</div><div class='del'>-	ANY_STALL = 94,</div><div class='del'>-	TAG_MISSES = 95,</div><div class='del'>-	TAG_HITS = 96,</div><div class='del'>-	SUB_TAG_MISSES = 97,</div><div class='del'>-	SET0_INVALIDATES = 98,</div><div class='del'>-	SET1_INVALIDATES = 99,</div><div class='del'>-	SET2_INVALIDATES = 100,</div><div class='del'>-	SET3_INVALIDATES = 101,</div><div class='del'>-	SET0_TAG_MISSES = 102,</div><div class='del'>-	SET1_TAG_MISSES = 103,</div><div class='del'>-	SET2_TAG_MISSES = 104,</div><div class='del'>-	SET3_TAG_MISSES = 105,</div><div class='del'>-	SET0_TAG_HITS = 106,</div><div class='del'>-	SET1_TAG_HITS = 107,</div><div class='del'>-	SET2_TAG_HITS = 108,</div><div class='del'>-	SET3_TAG_HITS = 109,</div><div class='del'>-	SET0_SUB_TAG_MISSES = 110,</div><div class='del'>-	SET1_SUB_TAG_MISSES = 111,</div><div class='del'>-	SET2_SUB_TAG_MISSES = 112,</div><div class='del'>-	SET3_SUB_TAG_MISSES = 113,</div><div class='del'>-	SET0_EVICT1 = 114,</div><div class='del'>-	SET0_EVICT2 = 115,</div><div class='del'>-	SET0_EVICT3 = 116,</div><div class='del'>-	SET0_EVICT4 = 117,</div><div class='del'>-	SET0_EVICT5 = 118,</div><div class='del'>-	SET0_EVICT6 = 119,</div><div class='del'>-	SET0_EVICT7 = 120,</div><div class='del'>-	SET0_EVICT8 = 121,</div><div class='del'>-	SET1_EVICT1 = 130,</div><div class='del'>-	SET1_EVICT2 = 131,</div><div class='del'>-	SET1_EVICT3 = 132,</div><div class='del'>-	SET1_EVICT4 = 133,</div><div class='del'>-	SET1_EVICT5 = 134,</div><div class='del'>-	SET1_EVICT6 = 135,</div><div class='del'>-	SET1_EVICT7 = 136,</div><div class='del'>-	SET1_EVICT8 = 137,</div><div class='del'>-	SET2_EVICT1 = 146,</div><div class='del'>-	SET2_EVICT2 = 147,</div><div class='del'>-	SET2_EVICT3 = 148,</div><div class='del'>-	SET2_EVICT4 = 149,</div><div class='del'>-	SET2_EVICT5 = 150,</div><div class='del'>-	SET2_EVICT6 = 151,</div><div class='del'>-	SET2_EVICT7 = 152,</div><div class='del'>-	SET2_EVICT8 = 153,</div><div class='del'>-	SET3_EVICT1 = 162,</div><div class='del'>-	SET3_EVICT2 = 163,</div><div class='del'>-	SET3_EVICT3 = 164,</div><div class='del'>-	SET3_EVICT4 = 165,</div><div class='del'>-	SET3_EVICT5 = 166,</div><div class='del'>-	SET3_EVICT6 = 167,</div><div class='del'>-	SET3_EVICT7 = 168,</div><div class='del'>-	SET3_EVICT8 = 169,</div><div class='del'>-	FF_EMPTY = 178,</div><div class='del'>-	FF_LT_HALF_FULL = 179,</div><div class='del'>-	FF_HALF_FULL = 180,</div><div class='del'>-	FF_FULL = 181,</div><div class='del'>-	FF_XFC = 182,</div><div class='del'>-	FF_STALLED = 183,</div><div class='del'>-	FG_MASKS = 184,</div><div class='del'>-	FG_LEFT_MASKS = 185,</div><div class='del'>-	FG_LEFT_MASK_STALLED = 186,</div><div class='del'>-	FG_LEFT_NOT_DONE_STALL = 187,</div><div class='del'>-	FG_LEFT_FG_STALL = 188,</div><div class='del'>-	FG_LEFT_SECTORS = 189,</div><div class='del'>-	FG0_REQUESTS = 195,</div><div class='del'>-	FG0_STALLED = 196,</div><div class='del'>-	MEM_REQ512 = 199,</div><div class='del'>-	MEM_REQ_SENT = 200,</div><div class='del'>-	MEM_LOCAL_READ_REQ = 202,</div><div class='del'>-	TC0_MH_STALLED = 203,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_sq_perfcnt_select {</div><div class='del'>-	SQ_PIXEL_VECTORS_SUB = 0,</div><div class='del'>-	SQ_VERTEX_VECTORS_SUB = 1,</div><div class='del'>-	SQ_ALU0_ACTIVE_VTX_SIMD0 = 2,</div><div class='del'>-	SQ_ALU1_ACTIVE_VTX_SIMD0 = 3,</div><div class='del'>-	SQ_ALU0_ACTIVE_PIX_SIMD0 = 4,</div><div class='del'>-	SQ_ALU1_ACTIVE_PIX_SIMD0 = 5,</div><div class='del'>-	SQ_ALU0_ACTIVE_VTX_SIMD1 = 6,</div><div class='del'>-	SQ_ALU1_ACTIVE_VTX_SIMD1 = 7,</div><div class='del'>-	SQ_ALU0_ACTIVE_PIX_SIMD1 = 8,</div><div class='del'>-	SQ_ALU1_ACTIVE_PIX_SIMD1 = 9,</div><div class='del'>-	SQ_EXPORT_CYCLES = 10,</div><div class='del'>-	SQ_ALU_CST_WRITTEN = 11,</div><div class='del'>-	SQ_TEX_CST_WRITTEN = 12,</div><div class='del'>-	SQ_ALU_CST_STALL = 13,</div><div class='del'>-	SQ_ALU_TEX_STALL = 14,</div><div class='del'>-	SQ_INST_WRITTEN = 15,</div><div class='del'>-	SQ_BOOLEAN_WRITTEN = 16,</div><div class='del'>-	SQ_LOOPS_WRITTEN = 17,</div><div class='del'>-	SQ_PIXEL_SWAP_IN = 18,</div><div class='del'>-	SQ_PIXEL_SWAP_OUT = 19,</div><div class='del'>-	SQ_VERTEX_SWAP_IN = 20,</div><div class='del'>-	SQ_VERTEX_SWAP_OUT = 21,</div><div class='del'>-	SQ_ALU_VTX_INST_ISSUED = 22,</div><div class='del'>-	SQ_TEX_VTX_INST_ISSUED = 23,</div><div class='del'>-	SQ_VC_VTX_INST_ISSUED = 24,</div><div class='del'>-	SQ_CF_VTX_INST_ISSUED = 25,</div><div class='del'>-	SQ_ALU_PIX_INST_ISSUED = 26,</div><div class='del'>-	SQ_TEX_PIX_INST_ISSUED = 27,</div><div class='del'>-	SQ_VC_PIX_INST_ISSUED = 28,</div><div class='del'>-	SQ_CF_PIX_INST_ISSUED = 29,</div><div class='del'>-	SQ_ALU0_FIFO_EMPTY_SIMD0 = 30,</div><div class='del'>-	SQ_ALU1_FIFO_EMPTY_SIMD0 = 31,</div><div class='del'>-	SQ_ALU0_FIFO_EMPTY_SIMD1 = 32,</div><div class='del'>-	SQ_ALU1_FIFO_EMPTY_SIMD1 = 33,</div><div class='del'>-	SQ_ALU_NOPS = 34,</div><div class='del'>-	SQ_PRED_SKIP = 35,</div><div class='del'>-	SQ_SYNC_ALU_STALL_SIMD0_VTX = 36,</div><div class='del'>-	SQ_SYNC_ALU_STALL_SIMD1_VTX = 37,</div><div class='del'>-	SQ_SYNC_TEX_STALL_VTX = 38,</div><div class='del'>-	SQ_SYNC_VC_STALL_VTX = 39,</div><div class='del'>-	SQ_CONSTANTS_USED_SIMD0 = 40,</div><div class='del'>-	SQ_CONSTANTS_SENT_SP_SIMD0 = 41,</div><div class='del'>-	SQ_GPR_STALL_VTX = 42,</div><div class='del'>-	SQ_GPR_STALL_PIX = 43,</div><div class='del'>-	SQ_VTX_RS_STALL = 44,</div><div class='del'>-	SQ_PIX_RS_STALL = 45,</div><div class='del'>-	SQ_SX_PC_FULL = 46,</div><div class='del'>-	SQ_SX_EXP_BUFF_FULL = 47,</div><div class='del'>-	SQ_SX_POS_BUFF_FULL = 48,</div><div class='del'>-	SQ_INTERP_QUADS = 49,</div><div class='del'>-	SQ_INTERP_ACTIVE = 50,</div><div class='del'>-	SQ_IN_PIXEL_STALL = 51,</div><div class='del'>-	SQ_IN_VTX_STALL = 52,</div><div class='del'>-	SQ_VTX_CNT = 53,</div><div class='del'>-	SQ_VTX_VECTOR2 = 54,</div><div class='del'>-	SQ_VTX_VECTOR3 = 55,</div><div class='del'>-	SQ_VTX_VECTOR4 = 56,</div><div class='del'>-	SQ_PIXEL_VECTOR1 = 57,</div><div class='del'>-	SQ_PIXEL_VECTOR23 = 58,</div><div class='del'>-	SQ_PIXEL_VECTOR4 = 59,</div><div class='del'>-	SQ_CONSTANTS_USED_SIMD1 = 60,</div><div class='del'>-	SQ_CONSTANTS_SENT_SP_SIMD1 = 61,</div><div class='del'>-	SQ_SX_MEM_EXP_FULL = 62,</div><div class='del'>-	SQ_ALU0_ACTIVE_VTX_SIMD2 = 63,</div><div class='del'>-	SQ_ALU1_ACTIVE_VTX_SIMD2 = 64,</div><div class='del'>-	SQ_ALU0_ACTIVE_PIX_SIMD2 = 65,</div><div class='del'>-	SQ_ALU1_ACTIVE_PIX_SIMD2 = 66,</div><div class='del'>-	SQ_ALU0_ACTIVE_VTX_SIMD3 = 67,</div><div class='del'>-	SQ_PERFCOUNT_VTX_QUAL_TP_DONE = 68,</div><div class='del'>-	SQ_ALU0_ACTIVE_PIX_SIMD3 = 69,</div><div class='del'>-	SQ_PERFCOUNT_PIX_QUAL_TP_DONE = 70,</div><div class='del'>-	SQ_ALU0_FIFO_EMPTY_SIMD2 = 71,</div><div class='del'>-	SQ_ALU1_FIFO_EMPTY_SIMD2 = 72,</div><div class='del'>-	SQ_ALU0_FIFO_EMPTY_SIMD3 = 73,</div><div class='del'>-	SQ_ALU1_FIFO_EMPTY_SIMD3 = 74,</div><div class='del'>-	SQ_SYNC_ALU_STALL_SIMD2_VTX = 75,</div><div class='del'>-	SQ_PERFCOUNT_VTX_POP_THREAD = 76,</div><div class='del'>-	SQ_SYNC_ALU_STALL_SIMD0_PIX = 77,</div><div class='del'>-	SQ_SYNC_ALU_STALL_SIMD1_PIX = 78,</div><div class='del'>-	SQ_SYNC_ALU_STALL_SIMD2_PIX = 79,</div><div class='del'>-	SQ_PERFCOUNT_PIX_POP_THREAD = 80,</div><div class='del'>-	SQ_SYNC_TEX_STALL_PIX = 81,</div><div class='del'>-	SQ_SYNC_VC_STALL_PIX = 82,</div><div class='del'>-	SQ_CONSTANTS_USED_SIMD2 = 83,</div><div class='del'>-	SQ_CONSTANTS_SENT_SP_SIMD2 = 84,</div><div class='del'>-	SQ_PERFCOUNT_VTX_DEALLOC_ACK = 85,</div><div class='del'>-	SQ_PERFCOUNT_PIX_DEALLOC_ACK = 86,</div><div class='del'>-	SQ_ALU0_FIFO_FULL_SIMD0 = 87,</div><div class='del'>-	SQ_ALU1_FIFO_FULL_SIMD0 = 88,</div><div class='del'>-	SQ_ALU0_FIFO_FULL_SIMD1 = 89,</div><div class='del'>-	SQ_ALU1_FIFO_FULL_SIMD1 = 90,</div><div class='del'>-	SQ_ALU0_FIFO_FULL_SIMD2 = 91,</div><div class='del'>-	SQ_ALU1_FIFO_FULL_SIMD2 = 92,</div><div class='del'>-	SQ_ALU0_FIFO_FULL_SIMD3 = 93,</div><div class='del'>-	SQ_ALU1_FIFO_FULL_SIMD3 = 94,</div><div class='del'>-	VC_PERF_STATIC = 95,</div><div class='del'>-	VC_PERF_STALLED = 96,</div><div class='del'>-	VC_PERF_STARVED = 97,</div><div class='del'>-	VC_PERF_SEND = 98,</div><div class='del'>-	VC_PERF_ACTUAL_STARVED = 99,</div><div class='del'>-	PIXEL_THREAD_0_ACTIVE = 100,</div><div class='del'>-	VERTEX_THREAD_0_ACTIVE = 101,</div><div class='del'>-	PIXEL_THREAD_0_NUMBER = 102,</div><div class='del'>-	VERTEX_THREAD_0_NUMBER = 103,</div><div class='del'>-	VERTEX_EVENT_NUMBER = 104,</div><div class='del'>-	PIXEL_EVENT_NUMBER = 105,</div><div class='del'>-	PTRBUFF_EF_PUSH = 106,</div><div class='del'>-	PTRBUFF_EF_POP_EVENT = 107,</div><div class='del'>-	PTRBUFF_EF_POP_NEW_VTX = 108,</div><div class='del'>-	PTRBUFF_EF_POP_DEALLOC = 109,</div><div class='del'>-	PTRBUFF_EF_POP_PVECTOR = 110,</div><div class='del'>-	PTRBUFF_EF_POP_PVECTOR_X = 111,</div><div class='del'>-	PTRBUFF_EF_POP_PVECTOR_VNZ = 112,</div><div class='del'>-	PTRBUFF_PB_DEALLOC = 113,</div><div class='del'>-	PTRBUFF_PI_STATE_PPB_POP = 114,</div><div class='del'>-	PTRBUFF_PI_RTR = 115,</div><div class='del'>-	PTRBUFF_PI_READ_EN = 116,</div><div class='del'>-	PTRBUFF_PI_BUFF_SWAP = 117,</div><div class='del'>-	PTRBUFF_SQ_FREE_BUFF = 118,</div><div class='del'>-	PTRBUFF_SQ_DEC = 119,</div><div class='del'>-	PTRBUFF_SC_VALID_CNTL_EVENT = 120,</div><div class='del'>-	PTRBUFF_SC_VALID_IJ_XFER = 121,</div><div class='del'>-	PTRBUFF_SC_NEW_VECTOR_1_Q = 122,</div><div class='del'>-	PTRBUFF_QUAL_NEW_VECTOR = 123,</div><div class='del'>-	PTRBUFF_QUAL_EVENT = 124,</div><div class='del'>-	PTRBUFF_END_BUFFER = 125,</div><div class='del'>-	PTRBUFF_FILL_QUAD = 126,</div><div class='del'>-	VERTS_WRITTEN_SPI = 127,</div><div class='del'>-	TP_FETCH_INSTR_EXEC = 128,</div><div class='del'>-	TP_FETCH_INSTR_REQ = 129,</div><div class='del'>-	TP_DATA_RETURN = 130,</div><div class='del'>-	SPI_WRITE_CYCLES_SP = 131,</div><div class='del'>-	SPI_WRITES_SP = 132,</div><div class='del'>-	SP_ALU_INSTR_EXEC = 133,</div><div class='del'>-	SP_CONST_ADDR_TO_SQ = 134,</div><div class='del'>-	SP_PRED_KILLS_TO_SQ = 135,</div><div class='del'>-	SP_EXPORT_CYCLES_TO_SX = 136,</div><div class='del'>-	SP_EXPORTS_TO_SX = 137,</div><div class='del'>-	SQ_CYCLES_ELAPSED = 138,</div><div class='del'>-	SQ_TCFS_OPT_ALLOC_EXEC = 139,</div><div class='del'>-	SQ_TCFS_NO_OPT_ALLOC = 140,</div><div class='del'>-	SQ_ALU0_NO_OPT_ALLOC = 141,</div><div class='del'>-	SQ_ALU1_NO_OPT_ALLOC = 142,</div><div class='del'>-	SQ_TCFS_ARB_XFC_CNT = 143,</div><div class='del'>-	SQ_ALU0_ARB_XFC_CNT = 144,</div><div class='del'>-	SQ_ALU1_ARB_XFC_CNT = 145,</div><div class='del'>-	SQ_TCFS_CFS_UPDATE_CNT = 146,</div><div class='del'>-	SQ_ALU0_CFS_UPDATE_CNT = 147,</div><div class='del'>-	SQ_ALU1_CFS_UPDATE_CNT = 148,</div><div class='del'>-	SQ_VTX_PUSH_THREAD_CNT = 149,</div><div class='del'>-	SQ_VTX_POP_THREAD_CNT = 150,</div><div class='del'>-	SQ_PIX_PUSH_THREAD_CNT = 151,</div><div class='del'>-	SQ_PIX_POP_THREAD_CNT = 152,</div><div class='del'>-	SQ_PIX_TOTAL = 153,</div><div class='del'>-	SQ_PIX_KILLED = 154,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_sx_perfcnt_select {</div><div class='del'>-	SX_EXPORT_VECTORS = 0,</div><div class='del'>-	SX_DUMMY_QUADS = 1,</div><div class='del'>-	SX_ALPHA_FAIL = 2,</div><div class='del'>-	SX_RB_QUAD_BUSY = 3,</div><div class='del'>-	SX_RB_COLOR_BUSY = 4,</div><div class='del'>-	SX_RB_QUAD_STALL = 5,</div><div class='del'>-	SX_RB_COLOR_STALL = 6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_rbbm_perfcount1_sel {</div><div class='del'>-	RBBM1_COUNT = 0,</div><div class='del'>-	RBBM1_NRT_BUSY = 1,</div><div class='del'>-	RBBM1_RB_BUSY = 2,</div><div class='del'>-	RBBM1_SQ_CNTX0_BUSY = 3,</div><div class='del'>-	RBBM1_SQ_CNTX17_BUSY = 4,</div><div class='del'>-	RBBM1_VGT_BUSY = 5,</div><div class='del'>-	RBBM1_VGT_NODMA_BUSY = 6,</div><div class='del'>-	RBBM1_PA_BUSY = 7,</div><div class='del'>-	RBBM1_SC_CNTX_BUSY = 8,</div><div class='del'>-	RBBM1_TPC_BUSY = 9,</div><div class='del'>-	RBBM1_TC_BUSY = 10,</div><div class='del'>-	RBBM1_SX_BUSY = 11,</div><div class='del'>-	RBBM1_CP_COHER_BUSY = 12,</div><div class='del'>-	RBBM1_CP_NRT_BUSY = 13,</div><div class='del'>-	RBBM1_GFX_IDLE_STALL = 14,</div><div class='del'>-	RBBM1_INTERRUPT = 15,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_cp_perfcount_sel {</div><div class='del'>-	ALWAYS_COUNT = 0,</div><div class='del'>-	TRANS_FIFO_FULL = 1,</div><div class='del'>-	TRANS_FIFO_AF = 2,</div><div class='del'>-	RCIU_PFPTRANS_WAIT = 3,</div><div class='del'>-	RCIU_NRTTRANS_WAIT = 6,</div><div class='del'>-	CSF_NRT_READ_WAIT = 8,</div><div class='del'>-	CSF_I1_FIFO_FULL = 9,</div><div class='del'>-	CSF_I2_FIFO_FULL = 10,</div><div class='del'>-	CSF_ST_FIFO_FULL = 11,</div><div class='del'>-	CSF_RING_ROQ_FULL = 13,</div><div class='del'>-	CSF_I1_ROQ_FULL = 14,</div><div class='del'>-	CSF_I2_ROQ_FULL = 15,</div><div class='del'>-	CSF_ST_ROQ_FULL = 16,</div><div class='del'>-	MIU_TAG_MEM_FULL = 18,</div><div class='del'>-	MIU_WRITECLEAN = 19,</div><div class='del'>-	MIU_NRT_WRITE_STALLED = 22,</div><div class='del'>-	MIU_NRT_READ_STALLED = 23,</div><div class='del'>-	ME_WRITE_CONFIRM_FIFO_FULL = 24,</div><div class='del'>-	ME_VS_DEALLOC_FIFO_FULL = 25,</div><div class='del'>-	ME_PS_DEALLOC_FIFO_FULL = 26,</div><div class='del'>-	ME_REGS_VS_EVENT_FIFO_FULL = 27,</div><div class='del'>-	ME_REGS_PS_EVENT_FIFO_FULL = 28,</div><div class='del'>-	ME_REGS_CF_EVENT_FIFO_FULL = 29,</div><div class='del'>-	ME_MICRO_RB_STARVED = 30,</div><div class='del'>-	ME_MICRO_I1_STARVED = 31,</div><div class='del'>-	ME_MICRO_I2_STARVED = 32,</div><div class='del'>-	ME_MICRO_ST_STARVED = 33,</div><div class='del'>-	RCIU_RBBM_DWORD_SENT = 40,</div><div class='del'>-	ME_BUSY_CLOCKS = 41,</div><div class='del'>-	ME_WAIT_CONTEXT_AVAIL = 42,</div><div class='del'>-	PFP_TYPE0_PACKET = 43,</div><div class='del'>-	PFP_TYPE3_PACKET = 44,</div><div class='del'>-	CSF_RB_WPTR_NEQ_RPTR = 45,</div><div class='del'>-	CSF_I1_SIZE_NEQ_ZERO = 46,</div><div class='del'>-	CSF_I2_SIZE_NEQ_ZERO = 47,</div><div class='del'>-	CSF_RBI1I2_FETCHING = 48,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_rb_perfcnt_select {</div><div class='del'>-	RBPERF_CNTX_BUSY = 0,</div><div class='del'>-	RBPERF_CNTX_BUSY_MAX = 1,</div><div class='del'>-	RBPERF_SX_QUAD_STARVED = 2,</div><div class='del'>-	RBPERF_SX_QUAD_STARVED_MAX = 3,</div><div class='del'>-	RBPERF_GA_GC_CH0_SYS_REQ = 4,</div><div class='del'>-	RBPERF_GA_GC_CH0_SYS_REQ_MAX = 5,</div><div class='del'>-	RBPERF_GA_GC_CH1_SYS_REQ = 6,</div><div class='del'>-	RBPERF_GA_GC_CH1_SYS_REQ_MAX = 7,</div><div class='del'>-	RBPERF_MH_STARVED = 8,</div><div class='del'>-	RBPERF_MH_STARVED_MAX = 9,</div><div class='del'>-	RBPERF_AZ_BC_COLOR_BUSY = 10,</div><div class='del'>-	RBPERF_AZ_BC_COLOR_BUSY_MAX = 11,</div><div class='del'>-	RBPERF_AZ_BC_Z_BUSY = 12,</div><div class='del'>-	RBPERF_AZ_BC_Z_BUSY_MAX = 13,</div><div class='del'>-	RBPERF_RB_SC_TILE_RTR_N = 14,</div><div class='del'>-	RBPERF_RB_SC_TILE_RTR_N_MAX = 15,</div><div class='del'>-	RBPERF_RB_SC_SAMP_RTR_N = 16,</div><div class='del'>-	RBPERF_RB_SC_SAMP_RTR_N_MAX = 17,</div><div class='del'>-	RBPERF_RB_SX_QUAD_RTR_N = 18,</div><div class='del'>-	RBPERF_RB_SX_QUAD_RTR_N_MAX = 19,</div><div class='del'>-	RBPERF_RB_SX_COLOR_RTR_N = 20,</div><div class='del'>-	RBPERF_RB_SX_COLOR_RTR_N_MAX = 21,</div><div class='del'>-	RBPERF_RB_SC_SAMP_LZ_BUSY = 22,</div><div class='del'>-	RBPERF_RB_SC_SAMP_LZ_BUSY_MAX = 23,</div><div class='del'>-	RBPERF_ZXP_STALL = 24,</div><div class='del'>-	RBPERF_ZXP_STALL_MAX = 25,</div><div class='del'>-	RBPERF_EVENT_PENDING = 26,</div><div class='del'>-	RBPERF_EVENT_PENDING_MAX = 27,</div><div class='del'>-	RBPERF_RB_MH_VALID = 28,</div><div class='del'>-	RBPERF_RB_MH_VALID_MAX = 29,</div><div class='del'>-	RBPERF_SX_RB_QUAD_SEND = 30,</div><div class='del'>-	RBPERF_SX_RB_COLOR_SEND = 31,</div><div class='del'>-	RBPERF_SC_RB_TILE_SEND = 32,</div><div class='del'>-	RBPERF_SC_RB_SAMPLE_SEND = 33,</div><div class='del'>-	RBPERF_SX_RB_MEM_EXPORT = 34,</div><div class='del'>-	RBPERF_SX_RB_QUAD_EVENT = 35,</div><div class='del'>-	RBPERF_SC_RB_TILE_EVENT_FILTERED = 36,</div><div class='del'>-	RBPERF_SC_RB_TILE_EVENT_ALL = 37,</div><div class='del'>-	RBPERF_RB_SC_EZ_SEND = 38,</div><div class='del'>-	RBPERF_RB_SX_INDEX_SEND = 39,</div><div class='del'>-	RBPERF_GMEM_INTFO_RD = 40,</div><div class='del'>-	RBPERF_GMEM_INTF1_RD = 41,</div><div class='del'>-	RBPERF_GMEM_INTFO_WR = 42,</div><div class='del'>-	RBPERF_GMEM_INTF1_WR = 43,</div><div class='del'>-	RBPERF_RB_CP_CONTEXT_DONE = 44,</div><div class='del'>-	RBPERF_RB_CP_CACHE_FLUSH = 45,</div><div class='del'>-	RBPERF_ZPASS_DONE = 46,</div><div class='del'>-	RBPERF_ZCMD_VALID = 47,</div><div class='del'>-	RBPERF_CCMD_VALID = 48,</div><div class='del'>-	RBPERF_ACCUM_GRANT = 49,</div><div class='del'>-	RBPERF_ACCUM_C0_GRANT = 50,</div><div class='del'>-	RBPERF_ACCUM_C1_GRANT = 51,</div><div class='del'>-	RBPERF_ACCUM_FULL_BE_WR = 52,</div><div class='del'>-	RBPERF_ACCUM_REQUEST_NO_GRANT = 53,</div><div class='del'>-	RBPERF_ACCUM_TIMEOUT_PULSE = 54,</div><div class='del'>-	RBPERF_ACCUM_LIN_TIMEOUT_PULSE = 55,</div><div class='del'>-	RBPERF_ACCUM_CAM_HIT_FLUSHING = 56,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a2xx_mh_perfcnt_select {</div><div class='del'>-	CP_R0_REQUESTS = 0,</div><div class='del'>-	CP_R1_REQUESTS = 1,</div><div class='del'>-	CP_R2_REQUESTS = 2,</div><div class='del'>-	CP_R3_REQUESTS = 3,</div><div class='del'>-	CP_R4_REQUESTS = 4,</div><div class='del'>-	CP_TOTAL_READ_REQUESTS = 5,</div><div class='del'>-	CP_TOTAL_WRITE_REQUESTS = 6,</div><div class='del'>-	CP_TOTAL_REQUESTS = 7,</div><div class='del'>-	CP_DATA_BYTES_WRITTEN = 8,</div><div class='del'>-	CP_WRITE_CLEAN_RESPONSES = 9,</div><div class='del'>-	CP_R0_READ_BURSTS_RECEIVED = 10,</div><div class='del'>-	CP_R1_READ_BURSTS_RECEIVED = 11,</div><div class='del'>-	CP_R2_READ_BURSTS_RECEIVED = 12,</div><div class='del'>-	CP_R3_READ_BURSTS_RECEIVED = 13,</div><div class='del'>-	CP_R4_READ_BURSTS_RECEIVED = 14,</div><div class='del'>-	CP_TOTAL_READ_BURSTS_RECEIVED = 15,</div><div class='del'>-	CP_R0_DATA_BEATS_READ = 16,</div><div class='del'>-	CP_R1_DATA_BEATS_READ = 17,</div><div class='del'>-	CP_R2_DATA_BEATS_READ = 18,</div><div class='del'>-	CP_R3_DATA_BEATS_READ = 19,</div><div class='del'>-	CP_R4_DATA_BEATS_READ = 20,</div><div class='del'>-	CP_TOTAL_DATA_BEATS_READ = 21,</div><div class='del'>-	VGT_R0_REQUESTS = 22,</div><div class='del'>-	VGT_R1_REQUESTS = 23,</div><div class='del'>-	VGT_TOTAL_REQUESTS = 24,</div><div class='del'>-	VGT_R0_READ_BURSTS_RECEIVED = 25,</div><div class='del'>-	VGT_R1_READ_BURSTS_RECEIVED = 26,</div><div class='del'>-	VGT_TOTAL_READ_BURSTS_RECEIVED = 27,</div><div class='del'>-	VGT_R0_DATA_BEATS_READ = 28,</div><div class='del'>-	VGT_R1_DATA_BEATS_READ = 29,</div><div class='del'>-	VGT_TOTAL_DATA_BEATS_READ = 30,</div><div class='del'>-	TC_TOTAL_REQUESTS = 31,</div><div class='del'>-	TC_ROQ_REQUESTS = 32,</div><div class='del'>-	TC_INFO_SENT = 33,</div><div class='del'>-	TC_READ_BURSTS_RECEIVED = 34,</div><div class='del'>-	TC_DATA_BEATS_READ = 35,</div><div class='del'>-	TCD_BURSTS_READ = 36,</div><div class='del'>-	RB_REQUESTS = 37,</div><div class='del'>-	RB_DATA_BYTES_WRITTEN = 38,</div><div class='del'>-	RB_WRITE_CLEAN_RESPONSES = 39,</div><div class='del'>-	AXI_READ_REQUESTS_ID_0 = 40,</div><div class='del'>-	AXI_READ_REQUESTS_ID_1 = 41,</div><div class='del'>-	AXI_READ_REQUESTS_ID_2 = 42,</div><div class='del'>-	AXI_READ_REQUESTS_ID_3 = 43,</div><div class='del'>-	AXI_READ_REQUESTS_ID_4 = 44,</div><div class='del'>-	AXI_READ_REQUESTS_ID_5 = 45,</div><div class='del'>-	AXI_READ_REQUESTS_ID_6 = 46,</div><div class='del'>-	AXI_READ_REQUESTS_ID_7 = 47,</div><div class='del'>-	AXI_TOTAL_READ_REQUESTS = 48,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_0 = 49,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_1 = 50,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_2 = 51,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_3 = 52,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_4 = 53,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_5 = 54,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_6 = 55,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_7 = 56,</div><div class='del'>-	AXI_TOTAL_WRITE_REQUESTS = 57,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_0 = 58,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_1 = 59,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_2 = 60,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_3 = 61,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_4 = 62,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_5 = 63,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_6 = 64,</div><div class='del'>-	AXI_TOTAL_REQUESTS_ID_7 = 65,</div><div class='del'>-	AXI_TOTAL_REQUESTS = 66,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_0 = 67,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_1 = 68,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_2 = 69,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_3 = 70,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_4 = 71,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_5 = 72,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_6 = 73,</div><div class='del'>-	AXI_READ_CHANNEL_BURSTS_ID_7 = 74,</div><div class='del'>-	AXI_READ_CHANNEL_TOTAL_BURSTS = 75,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_0 = 76,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_1 = 77,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_2 = 78,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_3 = 79,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_4 = 80,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_5 = 81,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_6 = 82,</div><div class='del'>-	AXI_READ_CHANNEL_DATA_BEATS_READ_ID_7 = 83,</div><div class='del'>-	AXI_READ_CHANNEL_TOTAL_DATA_BEATS_READ = 84,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_0 = 85,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_1 = 86,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_2 = 87,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_3 = 88,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_4 = 89,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_5 = 90,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_6 = 91,</div><div class='del'>-	AXI_WRITE_CHANNEL_BURSTS_ID_7 = 92,</div><div class='del'>-	AXI_WRITE_CHANNEL_TOTAL_BURSTS = 93,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_0 = 94,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_1 = 95,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_2 = 96,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_3 = 97,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_4 = 98,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_5 = 99,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_6 = 100,</div><div class='del'>-	AXI_WRITE_CHANNEL_DATA_BYTES_WRITTEN_ID_7 = 101,</div><div class='del'>-	AXI_WRITE_CHANNEL_TOTAL_DATA_BYTES_WRITTEN = 102,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_0 = 103,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_1 = 104,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_2 = 105,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_3 = 106,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_4 = 107,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_5 = 108,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_6 = 109,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_RESPONSES_ID_7 = 110,</div><div class='del'>-	AXI_WRITE_RESPONSE_CHANNEL_TOTAL_RESPONSES = 111,</div><div class='del'>-	TOTAL_MMU_MISSES = 112,</div><div class='del'>-	MMU_READ_MISSES = 113,</div><div class='del'>-	MMU_WRITE_MISSES = 114,</div><div class='del'>-	TOTAL_MMU_HITS = 115,</div><div class='del'>-	MMU_READ_HITS = 116,</div><div class='del'>-	MMU_WRITE_HITS = 117,</div><div class='del'>-	SPLIT_MODE_TC_HITS = 118,</div><div class='del'>-	SPLIT_MODE_TC_MISSES = 119,</div><div class='del'>-	SPLIT_MODE_NON_TC_HITS = 120,</div><div class='del'>-	SPLIT_MODE_NON_TC_MISSES = 121,</div><div class='del'>-	STALL_AWAITING_TLB_MISS_FETCH = 122,</div><div class='del'>-	MMU_TLB_MISS_READ_BURSTS_RECEIVED = 123,</div><div class='del'>-	MMU_TLB_MISS_DATA_BEATS_READ = 124,</div><div class='del'>-	CP_CYCLES_HELD_OFF = 125,</div><div class='del'>-	VGT_CYCLES_HELD_OFF = 126,</div><div class='del'>-	TC_CYCLES_HELD_OFF = 127,</div><div class='del'>-	TC_ROQ_CYCLES_HELD_OFF = 128,</div><div class='del'>-	TC_CYCLES_HELD_OFF_TCD_FULL = 129,</div><div class='del'>-	RB_CYCLES_HELD_OFF = 130,</div><div class='del'>-	TOTAL_CYCLES_ANY_CLNT_HELD_OFF = 131,</div><div class='del'>-	TLB_MISS_CYCLES_HELD_OFF = 132,</div><div class='del'>-	AXI_READ_REQUEST_HELD_OFF = 133,</div><div class='del'>-	AXI_WRITE_REQUEST_HELD_OFF = 134,</div><div class='del'>-	AXI_REQUEST_HELD_OFF = 135,</div><div class='del'>-	AXI_REQUEST_HELD_OFF_INFLIGHT_LIMIT = 136,</div><div class='del'>-	AXI_WRITE_DATA_HELD_OFF = 137,</div><div class='del'>-	CP_SAME_PAGE_BANK_REQUESTS = 138,</div><div class='del'>-	VGT_SAME_PAGE_BANK_REQUESTS = 139,</div><div class='del'>-	TC_SAME_PAGE_BANK_REQUESTS = 140,</div><div class='del'>-	TC_ARB_HOLD_SAME_PAGE_BANK_REQUESTS = 141,</div><div class='del'>-	RB_SAME_PAGE_BANK_REQUESTS = 142,</div><div class='del'>-	TOTAL_SAME_PAGE_BANK_REQUESTS = 143,</div><div class='del'>-	CP_SAME_PAGE_BANK_REQUESTS_KILLED_FAIRNESS_LIMIT = 144,</div><div class='del'>-	VGT_SAME_PAGE_BANK_REQUESTS_KILLED_FAIRNESS_LIMIT = 145,</div><div class='del'>-	TC_SAME_PAGE_BANK_REQUESTS_KILLED_FAIRNESS_LIMIT = 146,</div><div class='del'>-	RB_SAME_PAGE_BANK_REQUESTS_KILLED_FAIRNESS_LIMIT = 147,</div><div class='del'>-	TOTAL_SAME_PAGE_BANK_KILLED_FAIRNESS_LIMIT = 148,</div><div class='del'>-	TOTAL_MH_READ_REQUESTS = 149,</div><div class='del'>-	TOTAL_MH_WRITE_REQUESTS = 150,</div><div class='del'>-	TOTAL_MH_REQUESTS = 151,</div><div class='del'>-	MH_BUSY = 152,</div><div class='del'>-	CP_NTH_ACCESS_SAME_PAGE_BANK_SEQUENCE = 153,</div><div class='del'>-	VGT_NTH_ACCESS_SAME_PAGE_BANK_SEQUENCE = 154,</div><div class='del'>-	TC_NTH_ACCESS_SAME_PAGE_BANK_SEQUENCE = 155,</div><div class='del'>-	RB_NTH_ACCESS_SAME_PAGE_BANK_SEQUENCE = 156,</div><div class='del'>-	TC_ROQ_N_VALID_ENTRIES = 157,</div><div class='del'>-	ARQ_N_ENTRIES = 158,</div><div class='del'>-	WDB_N_ENTRIES = 159,</div><div class='del'>-	MH_READ_LATENCY_OUTST_REQ_SUM = 160,</div><div class='del'>-	MC_READ_LATENCY_OUTST_REQ_SUM = 161,</div><div class='del'>-	MC_TOTAL_READ_REQUESTS = 162,</div><div class='del'>-	ELAPSED_CYCLES_MH_GATED_CLK = 163,</div><div class='del'>-	ELAPSED_CLK_CYCLES = 164,</div><div class='del'>-	CP_W_16B_REQUESTS = 165,</div><div class='del'>-	CP_W_32B_REQUESTS = 166,</div><div class='del'>-	TC_16B_REQUESTS = 167,</div><div class='del'>-	TC_32B_REQUESTS = 168,</div><div class='del'>-	PA_REQUESTS = 169,</div><div class='del'>-	PA_DATA_BYTES_WRITTEN = 170,</div><div class='del'>-	PA_WRITE_CLEAN_RESPONSES = 171,</div><div class='del'>-	PA_CYCLES_HELD_OFF = 172,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_0 = 173,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_1 = 174,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_2 = 175,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_3 = 176,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_4 = 177,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_5 = 178,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_6 = 179,</div><div class='del'>-	AXI_READ_REQUEST_DATA_BEATS_ID_7 = 180,</div><div class='del'>-	AXI_TOTAL_READ_REQUEST_DATA_BEATS = 181,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum perf_mode_cnt {</div><div class='del'>-	PERF_STATE_RESET = 0,</div><div class='del'>-	PERF_STATE_ENABLE = 1,</div><div class='del'>-	PERF_STATE_FREEZE = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum adreno_mmu_clnt_beh {</div><div class='del'>-	BEH_NEVR = 0,</div><div class='del'>-	BEH_TRAN_RNG = 1,</div><div class='del'>-	BEH_TRAN_FLT = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_clamp {</div><div class='del'>-	SQ_TEX_WRAP = 0,</div><div class='del'>-	SQ_TEX_MIRROR = 1,</div><div class='del'>-	SQ_TEX_CLAMP_LAST_TEXEL = 2,</div><div class='del'>-	SQ_TEX_MIRROR_ONCE_LAST_TEXEL = 3,</div><div class='del'>-	SQ_TEX_CLAMP_HALF_BORDER = 4,</div><div class='del'>-	SQ_TEX_MIRROR_ONCE_HALF_BORDER = 5,</div><div class='del'>-	SQ_TEX_CLAMP_BORDER = 6,</div><div class='del'>-	SQ_TEX_MIRROR_ONCE_BORDER = 7,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_swiz {</div><div class='del'>-	SQ_TEX_X = 0,</div><div class='del'>-	SQ_TEX_Y = 1,</div><div class='del'>-	SQ_TEX_Z = 2,</div><div class='del'>-	SQ_TEX_W = 3,</div><div class='del'>-	SQ_TEX_ZERO = 4,</div><div class='del'>-	SQ_TEX_ONE = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_filter {</div><div class='del'>-	SQ_TEX_FILTER_POINT = 0,</div><div class='del'>-	SQ_TEX_FILTER_BILINEAR = 1,</div><div class='del'>-	SQ_TEX_FILTER_BASEMAP = 2,</div><div class='del'>-	SQ_TEX_FILTER_USE_FETCH_CONST = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_aniso_filter {</div><div class='del'>-	SQ_TEX_ANISO_FILTER_DISABLED = 0,</div><div class='del'>-	SQ_TEX_ANISO_FILTER_MAX_1_1 = 1,</div><div class='del'>-	SQ_TEX_ANISO_FILTER_MAX_2_1 = 2,</div><div class='del'>-	SQ_TEX_ANISO_FILTER_MAX_4_1 = 3,</div><div class='del'>-	SQ_TEX_ANISO_FILTER_MAX_8_1 = 4,</div><div class='del'>-	SQ_TEX_ANISO_FILTER_MAX_16_1 = 5,</div><div class='del'>-	SQ_TEX_ANISO_FILTER_USE_FETCH_CONST = 7,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_dimension {</div><div class='del'>-	SQ_TEX_DIMENSION_1D = 0,</div><div class='del'>-	SQ_TEX_DIMENSION_2D = 1,</div><div class='del'>-	SQ_TEX_DIMENSION_3D = 2,</div><div class='del'>-	SQ_TEX_DIMENSION_CUBE = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_border_color {</div><div class='del'>-	SQ_TEX_BORDER_COLOR_BLACK = 0,</div><div class='del'>-	SQ_TEX_BORDER_COLOR_WHITE = 1,</div><div class='del'>-	SQ_TEX_BORDER_COLOR_ACBYCR_BLACK = 2,</div><div class='del'>-	SQ_TEX_BORDER_COLOR_ACBCRY_BLACK = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_sign {</div><div class='del'>-	SQ_TEX_SIGN_UNSIGNED = 0,</div><div class='del'>-	SQ_TEX_SIGN_SIGNED = 1,</div><div class='del'>-	SQ_TEX_SIGN_UNSIGNED_BIASED = 2,</div><div class='del'>-	SQ_TEX_SIGN_GAMMA = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_endian {</div><div class='del'>-	SQ_TEX_ENDIAN_NONE = 0,</div><div class='del'>-	SQ_TEX_ENDIAN_8IN16 = 1,</div><div class='del'>-	SQ_TEX_ENDIAN_8IN32 = 2,</div><div class='del'>-	SQ_TEX_ENDIAN_16IN32 = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_clamp_policy {</div><div class='del'>-	SQ_TEX_CLAMP_POLICY_D3D = 0,</div><div class='del'>-	SQ_TEX_CLAMP_POLICY_OGL = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_num_format {</div><div class='del'>-	SQ_TEX_NUM_FORMAT_FRAC = 0,</div><div class='del'>-	SQ_TEX_NUM_FORMAT_INT = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sq_tex_type {</div><div class='del'>-	SQ_TEX_TYPE_0 = 0,</div><div class='del'>-	SQ_TEX_TYPE_1 = 1,</div><div class='del'>-	SQ_TEX_TYPE_2 = 2,</div><div class='del'>-	SQ_TEX_TYPE_3 = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PATCH_RELEASE				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_CNTL					0x0000003b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_SOFT_RESET				0x0000003c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CP_PFP_UCODE_ADDR				0x000000c0</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CP_PFP_UCODE_DATA				0x000000c1</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_CONFIG					0x00000040</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_MMU_ENABLE				0x00000001</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_SPLIT_MODE_ENABLE			0x00000002</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR__MASK		0x00000030</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR__SHIFT		4</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR__MASK		0x000000c0</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR__SHIFT		6</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR__MASK		0x00000300</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR__MASK		0x00000c00</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR__SHIFT		10</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR__MASK		0x00003000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR__SHIFT		12</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR__MASK		0x0000c000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR__SHIFT		14</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR__MASK		0x00030000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR__SHIFT		16</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR__MASK		0x000c0000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR__SHIFT		18</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR__MASK		0x00300000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR__SHIFT		20</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR__MASK		0x00c00000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR__SHIFT		22</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR__MASK		0x03000000</div><div class='del'>-#define A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR__SHIFT		24</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR__SHIFT) &amp; A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_VA_RANGE				0x00000041</div><div class='del'>-#define A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS__MASK		0x00000fff</div><div class='del'>-#define A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS__SHIFT) &amp; A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_MMU_VA_RANGE_VA_BASE__MASK			0xfffff000</div><div class='del'>-#define A2XX_MH_MMU_VA_RANGE_VA_BASE__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_MH_MMU_VA_RANGE_VA_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_MMU_VA_RANGE_VA_BASE__SHIFT) &amp; A2XX_MH_MMU_VA_RANGE_VA_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_PT_BASE					0x00000042</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_PAGE_FAULT				0x00000043</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_TRAN_ERROR				0x00000044</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_INVALIDATE				0x00000045</div><div class='del'>-#define A2XX_MH_MMU_INVALIDATE_INVALIDATE_ALL			0x00000001</div><div class='del'>-#define A2XX_MH_MMU_INVALIDATE_INVALIDATE_TC			0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_MPU_BASE				0x00000046</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_MMU_MPU_END					0x00000047</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_NQWAIT_UNTIL					0x00000394</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERFCOUNTER0_SELECT			0x00000395</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERFCOUNTER1_SELECT			0x00000396</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERFCOUNTER0_LO				0x00000397</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERFCOUNTER0_HI				0x00000398</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERFCOUNTER1_LO				0x00000399</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERFCOUNTER1_HI				0x0000039a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_DEBUG					0x0000039b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PM_OVERRIDE1				0x0000039c</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_RBBM_AHBCLK_PM_OVERRIDE		0x00000001</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SC_REG_SCLK_PM_OVERRIDE		0x00000002</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SC_SCLK_PM_OVERRIDE		0x00000004</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SP_TOP_SCLK_PM_OVERRIDE		0x00000008</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SP_V0_SCLK_PM_OVERRIDE		0x00000010</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SQ_REG_SCLK_PM_OVERRIDE		0x00000020</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SQ_REG_FIFOS_SCLK_PM_OVERRIDE	0x00000040</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SQ_CONST_MEM_SCLK_PM_OVERRIDE	0x00000080</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SQ_SQ_SCLK_PM_OVERRIDE		0x00000100</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SX_SCLK_PM_OVERRIDE		0x00000200</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SX_REG_SCLK_PM_OVERRIDE		0x00000400</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCM_TCO_SCLK_PM_OVERRIDE		0x00000800</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCM_TCM_SCLK_PM_OVERRIDE		0x00001000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCM_TCD_SCLK_PM_OVERRIDE		0x00002000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCM_REG_SCLK_PM_OVERRIDE		0x00004000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TPC_TPC_SCLK_PM_OVERRIDE		0x00008000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TPC_REG_SCLK_PM_OVERRIDE		0x00010000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCF_TCA_SCLK_PM_OVERRIDE		0x00020000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCF_TCB_SCLK_PM_OVERRIDE		0x00040000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TCF_TCB_READ_SCLK_PM_OVERRIDE	0x00080000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TP_TP_SCLK_PM_OVERRIDE		0x00100000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_TP_REG_SCLK_PM_OVERRIDE		0x00200000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_CP_G_SCLK_PM_OVERRIDE		0x00400000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_CP_REG_SCLK_PM_OVERRIDE		0x00800000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_CP_G_REG_SCLK_PM_OVERRIDE	0x01000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_SPI_SCLK_PM_OVERRIDE		0x02000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_RB_REG_SCLK_PM_OVERRIDE		0x04000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_RB_SCLK_PM_OVERRIDE		0x08000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_MH_MH_SCLK_PM_OVERRIDE		0x10000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_MH_REG_SCLK_PM_OVERRIDE		0x20000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_MH_MMU_SCLK_PM_OVERRIDE		0x40000000</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE1_MH_TCROQ_SCLK_PM_OVERRIDE	0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PM_OVERRIDE2				0x0000039d</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_PA_REG_SCLK_PM_OVERRIDE		0x00000001</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_PA_PA_SCLK_PM_OVERRIDE		0x00000002</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_PA_AG_SCLK_PM_OVERRIDE		0x00000004</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_VGT_REG_SCLK_PM_OVERRIDE		0x00000008</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_VGT_FIFOS_SCLK_PM_OVERRIDE	0x00000010</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_VGT_VGT_SCLK_PM_OVERRIDE		0x00000020</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_DEBUG_PERF_SCLK_PM_OVERRIDE	0x00000040</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_PERM_SCLK_PM_OVERRIDE		0x00000080</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM0_PM_OVERRIDE		0x00000100</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM1_PM_OVERRIDE		0x00000200</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM2_PM_OVERRIDE		0x00000400</div><div class='del'>-#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM3_PM_OVERRIDE		0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_DEBUG_OUT					0x000003a0</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_DEBUG_CNTL				0x000003a1</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_READ_ERROR				0x000003b3</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_INT_CNTL					0x000003b4</div><div class='del'>-#define A2XX_RBBM_INT_CNTL_RDERR_INT_MASK			0x00000001</div><div class='del'>-#define A2XX_RBBM_INT_CNTL_DISPLAY_UPDATE_INT_MASK		0x00000002</div><div class='del'>-#define A2XX_RBBM_INT_CNTL_GUI_IDLE_INT_MASK			0x00080000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_INT_STATUS				0x000003b5</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_INT_ACK					0x000003b6</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MASTER_INT_SIGNAL				0x000003b7</div><div class='del'>-#define A2XX_MASTER_INT_SIGNAL_MH_INT_STAT			0x00000020</div><div class='del'>-#define A2XX_MASTER_INT_SIGNAL_SQ_INT_STAT			0x04000000</div><div class='del'>-#define A2XX_MASTER_INT_SIGNAL_CP_INT_STAT			0x40000000</div><div class='del'>-#define A2XX_MASTER_INT_SIGNAL_RBBM_INT_STAT			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERIPHID1					0x000003f9</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_PERIPHID2					0x000003fa</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CP_PERFMON_CNTL				0x00000444</div><div class='del'>-#define A2XX_CP_PERFMON_CNTL_PERF_MODE_CNT__MASK		0x00000007</div><div class='del'>-#define A2XX_CP_PERFMON_CNTL_PERF_MODE_CNT__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_CP_PERFMON_CNTL_PERF_MODE_CNT(enum perf_mode_cnt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_CP_PERFMON_CNTL_PERF_MODE_CNT__SHIFT) &amp; A2XX_CP_PERFMON_CNTL_PERF_MODE_CNT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CP_PERFCOUNTER_SELECT				0x00000445</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CP_PERFCOUNTER_LO				0x00000446</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CP_PERFCOUNTER_HI				0x00000447</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RBBM_STATUS					0x000005d0</div><div class='del'>-#define A2XX_RBBM_STATUS_CMDFIFO_AVAIL__MASK			0x0000001f</div><div class='del'>-#define A2XX_RBBM_STATUS_CMDFIFO_AVAIL__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RBBM_STATUS_CMDFIFO_AVAIL(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RBBM_STATUS_CMDFIFO_AVAIL__SHIFT) &amp; A2XX_RBBM_STATUS_CMDFIFO_AVAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RBBM_STATUS_TC_BUSY				0x00000020</div><div class='del'>-#define A2XX_RBBM_STATUS_HIRQ_PENDING				0x00000100</div><div class='del'>-#define A2XX_RBBM_STATUS_CPRQ_PENDING				0x00000200</div><div class='del'>-#define A2XX_RBBM_STATUS_CFRQ_PENDING				0x00000400</div><div class='del'>-#define A2XX_RBBM_STATUS_PFRQ_PENDING				0x00000800</div><div class='del'>-#define A2XX_RBBM_STATUS_VGT_BUSY_NO_DMA			0x00001000</div><div class='del'>-#define A2XX_RBBM_STATUS_RBBM_WU_BUSY				0x00004000</div><div class='del'>-#define A2XX_RBBM_STATUS_CP_NRT_BUSY				0x00010000</div><div class='del'>-#define A2XX_RBBM_STATUS_MH_BUSY				0x00040000</div><div class='del'>-#define A2XX_RBBM_STATUS_MH_COHERENCY_BUSY			0x00080000</div><div class='del'>-#define A2XX_RBBM_STATUS_SX_BUSY				0x00200000</div><div class='del'>-#define A2XX_RBBM_STATUS_TPC_BUSY				0x00400000</div><div class='del'>-#define A2XX_RBBM_STATUS_SC_CNTX_BUSY				0x01000000</div><div class='del'>-#define A2XX_RBBM_STATUS_PA_BUSY				0x02000000</div><div class='del'>-#define A2XX_RBBM_STATUS_VGT_BUSY				0x04000000</div><div class='del'>-#define A2XX_RBBM_STATUS_SQ_CNTX17_BUSY				0x08000000</div><div class='del'>-#define A2XX_RBBM_STATUS_SQ_CNTX0_BUSY				0x10000000</div><div class='del'>-#define A2XX_RBBM_STATUS_RB_CNTX_BUSY				0x40000000</div><div class='del'>-#define A2XX_RBBM_STATUS_GUI_ACTIVE				0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_ARBITER_CONFIG				0x00000a40</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT__MASK		0x0000003f</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT__SHIFT) &amp; A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_SAME_PAGE_GRANULARITY		0x00000040</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_L1_ARB_ENABLE			0x00000080</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_L1_ARB_HOLD_ENABLE		0x00000100</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_L2_ARB_CONTROL			0x00000200</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__MASK			0x00001c00</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__SHIFT			10</div><div class='del'>-static inline uint32_t A2XX_MH_ARBITER_CONFIG_PAGE_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__SHIFT) &amp; A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_TC_REORDER_ENABLE		0x00002000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_TC_ARB_HOLD_ENABLE		0x00004000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT_ENABLE		0x00008000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT__MASK		0x003f0000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT__SHIFT		16</div><div class='del'>-static inline uint32_t A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT__SHIFT) &amp; A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_CP_CLNT_ENABLE			0x00400000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_VGT_CLNT_ENABLE			0x00800000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_TC_CLNT_ENABLE			0x01000000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_RB_CLNT_ENABLE			0x02000000</div><div class='del'>-#define A2XX_MH_ARBITER_CONFIG_PA_CLNT_ENABLE			0x04000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_INTERRUPT_MASK				0x00000a42</div><div class='del'>-#define A2XX_MH_INTERRUPT_MASK_AXI_READ_ERROR			0x00000001</div><div class='del'>-#define A2XX_MH_INTERRUPT_MASK_AXI_WRITE_ERROR			0x00000002</div><div class='del'>-#define A2XX_MH_INTERRUPT_MASK_MMU_PAGE_FAULT			0x00000004</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_INTERRUPT_STATUS				0x00000a43</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_INTERRUPT_CLEAR				0x00000a44</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_CLNT_INTF_CTRL_CONFIG1			0x00000a54</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_CLNT_INTF_CTRL_CONFIG2			0x00000a55</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A220_VSC_BIN_SIZE				0x00000c01</div><div class='del'>-#define A2XX_A220_VSC_BIN_SIZE_WIDTH__MASK			0x0000001f</div><div class='del'>-#define A2XX_A220_VSC_BIN_SIZE_WIDTH__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_A220_VSC_BIN_SIZE_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A2XX_A220_VSC_BIN_SIZE_WIDTH__SHIFT) &amp; A2XX_A220_VSC_BIN_SIZE_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_A220_VSC_BIN_SIZE_HEIGHT__MASK			0x000003e0</div><div class='del'>-#define A2XX_A220_VSC_BIN_SIZE_HEIGHT__SHIFT			5</div><div class='del'>-static inline uint32_t A2XX_A220_VSC_BIN_SIZE_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A2XX_A220_VSC_BIN_SIZE_HEIGHT__SHIFT) &amp; A2XX_A220_VSC_BIN_SIZE_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VSC_PIPE(i0) (0x00000c06 + 0x3*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A2XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c06 + 0x3*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A2XX_VSC_PIPE_DATA_ADDRESS(uint32_t i0) { return 0x00000c07 + 0x3*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A2XX_VSC_PIPE_DATA_LENGTH(uint32_t i0) { return 0x00000c08 + 0x3*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PC_DEBUG_CNTL					0x00000c38</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PC_DEBUG_DATA					0x00000c39</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_VIZ_QUERY_STATUS				0x00000c44</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_GRAS_DEBUG_CNTL				0x00000c80</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_DEBUG_CNTL				0x00000c80</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_GRAS_DEBUG_DATA				0x00000c81</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_DEBUG_DATA				0x00000c81</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_FACE_DATA				0x00000c86</div><div class='del'>-#define A2XX_PA_SU_FACE_DATA_BASE_ADDR__MASK			0xffffffe0</div><div class='del'>-#define A2XX_PA_SU_FACE_DATA_BASE_ADDR__SHIFT			5</div><div class='del'>-static inline uint32_t A2XX_PA_SU_FACE_DATA_BASE_ADDR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_FACE_DATA_BASE_ADDR__SHIFT) &amp; A2XX_PA_SU_FACE_DATA_BASE_ADDR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_GPR_MANAGEMENT				0x00000d00</div><div class='del'>-#define A2XX_SQ_GPR_MANAGEMENT_REG_DYNAMIC			0x00000001</div><div class='del'>-#define A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX__MASK		0x00000ff0</div><div class='del'>-#define A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX__SHIFT		4</div><div class='del'>-static inline uint32_t A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX__SHIFT) &amp; A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__MASK		0x000ff000</div><div class='del'>-#define A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT		12</div><div class='del'>-static inline uint32_t A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT) &amp; A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_FLOW_CONTROL				0x00000d01</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_INST_STORE_MANAGMENT			0x00000d02</div><div class='del'>-#define A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX__MASK	0x00000fff</div><div class='del'>-#define A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX__SHIFT	0</div><div class='del'>-static inline uint32_t A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX__SHIFT) &amp; A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX__MASK	0x0fff0000</div><div class='del'>-#define A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX__SHIFT	16</div><div class='del'>-static inline uint32_t A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX__SHIFT) &amp; A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_MISC					0x00000d05</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_INT_CNTL					0x00000d34</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_INT_STATUS					0x00000d35</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_INT_ACK					0x00000d36</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_INPUT_FSM				0x00000dae</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_CONST_MGR_FSM				0x00000daf</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_TP_FSM				0x00000db0</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_FSM_ALU_0				0x00000db1</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_FSM_ALU_1				0x00000db2</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_EXP_ALLOC				0x00000db3</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PTR_BUFF				0x00000db4</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_GPR_VTX				0x00000db5</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_GPR_PIX				0x00000db6</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_TB_STATUS_SEL				0x00000db7</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_VTX_TB_0				0x00000db8</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_VTX_TB_1				0x00000db9</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_VTX_TB_STATUS_REG			0x00000dba</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_VTX_TB_STATE_MEM			0x00000dbb</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PIX_TB_0				0x00000dbc</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PIX_TB_STATUS_REG_0			0x00000dbd</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PIX_TB_STATUS_REG_1			0x00000dbe</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PIX_TB_STATUS_REG_2			0x00000dbf</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PIX_TB_STATUS_REG_3			0x00000dc0</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_PIX_TB_STATE_MEM			0x00000dc1</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TC_CNTL_STATUS					0x00000e00</div><div class='del'>-#define A2XX_TC_CNTL_STATUS_L2_INVALIDATE			0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_CHICKEN					0x00000e1e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_BC_CONTROL					0x00000f01</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_LINEAR_MODE_ENABLE		0x00000001</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT__MASK		0x00000006</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT__SHIFT		1</div><div class='del'>-static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT__SHIFT) &amp; A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BC_CONTROL_DISABLE_EDRAM_CAM			0x00000008</div><div class='del'>-#define A2XX_RB_BC_CONTROL_DISABLE_EZ_FAST_CONTEXT_SWITCH	0x00000010</div><div class='del'>-#define A2XX_RB_BC_CONTROL_DISABLE_EZ_NULL_ZCMD_DROP		0x00000020</div><div class='del'>-#define A2XX_RB_BC_CONTROL_DISABLE_LZ_NULL_ZCMD_DROP		0x00000040</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ENABLE_AZ_THROTTLE			0x00000080</div><div class='del'>-#define A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT__MASK		0x00001f00</div><div class='del'>-#define A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT__SHIFT) &amp; A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ENABLE_CRC_UPDATE			0x00004000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_CRC_MODE				0x00008000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_DISABLE_SAMPLE_COUNTERS		0x00010000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_DISABLE_ACCUM			0x00020000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK__MASK		0x003c0000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK__SHIFT		18</div><div class='del'>-static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK__SHIFT) &amp; A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BC_CONTROL_LINEAR_PERFORMANCE_ENABLE		0x00400000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT__MASK		0x07800000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT__SHIFT		23</div><div class='del'>-static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT__SHIFT) &amp; A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT__MASK	0x18000000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT__SHIFT	27</div><div class='del'>-static inline uint32_t A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT__SHIFT) &amp; A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BC_CONTROL_MEM_EXPORT_LINEAR_MODE_ENABLE	0x20000000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_CRC_SYSTEM				0x40000000</div><div class='del'>-#define A2XX_RB_BC_CONTROL_RESERVED6				0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_EDRAM_INFO					0x00000f02</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_DEBUG_CNTL					0x00000f26</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_DEBUG_DATA					0x00000f27</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_SURFACE_INFO				0x00002000</div><div class='del'>-#define A2XX_RB_SURFACE_INFO_SURFACE_PITCH__MASK		0x00003fff</div><div class='del'>-#define A2XX_RB_SURFACE_INFO_SURFACE_PITCH__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_RB_SURFACE_INFO_SURFACE_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_SURFACE_INFO_SURFACE_PITCH__SHIFT) &amp; A2XX_RB_SURFACE_INFO_SURFACE_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__MASK			0x0000c000</div><div class='del'>-#define A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__SHIFT		14</div><div class='del'>-static inline uint32_t A2XX_RB_SURFACE_INFO_MSAA_SAMPLES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__SHIFT) &amp; A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COLOR_INFO					0x00002001</div><div class='del'>-#define A2XX_RB_COLOR_INFO_FORMAT__MASK				0x0000000f</div><div class='del'>-#define A2XX_RB_COLOR_INFO_FORMAT__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RB_COLOR_INFO_FORMAT(enum a2xx_colorformatx val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLOR_INFO_FORMAT__SHIFT) &amp; A2XX_RB_COLOR_INFO_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLOR_INFO_ROUND_MODE__MASK			0x00000030</div><div class='del'>-#define A2XX_RB_COLOR_INFO_ROUND_MODE__SHIFT			4</div><div class='del'>-static inline uint32_t A2XX_RB_COLOR_INFO_ROUND_MODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLOR_INFO_ROUND_MODE__SHIFT) &amp; A2XX_RB_COLOR_INFO_ROUND_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLOR_INFO_LINEAR				0x00000040</div><div class='del'>-#define A2XX_RB_COLOR_INFO_ENDIAN__MASK				0x00000180</div><div class='del'>-#define A2XX_RB_COLOR_INFO_ENDIAN__SHIFT			7</div><div class='del'>-static inline uint32_t A2XX_RB_COLOR_INFO_ENDIAN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLOR_INFO_ENDIAN__SHIFT) &amp; A2XX_RB_COLOR_INFO_ENDIAN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLOR_INFO_SWAP__MASK				0x00000600</div><div class='del'>-#define A2XX_RB_COLOR_INFO_SWAP__SHIFT				9</div><div class='del'>-static inline uint32_t A2XX_RB_COLOR_INFO_SWAP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLOR_INFO_SWAP__SHIFT) &amp; A2XX_RB_COLOR_INFO_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLOR_INFO_BASE__MASK				0xfffff000</div><div class='del'>-#define A2XX_RB_COLOR_INFO_BASE__SHIFT				12</div><div class='del'>-static inline uint32_t A2XX_RB_COLOR_INFO_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A2XX_RB_COLOR_INFO_BASE__SHIFT) &amp; A2XX_RB_COLOR_INFO_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_DEPTH_INFO					0x00002002</div><div class='del'>-#define A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK			0x00000001</div><div class='del'>-#define A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) &amp; A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTH_INFO_DEPTH_BASE__MASK			0xfffff000</div><div class='del'>-#define A2XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A2XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) &amp; A2XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A225_RB_COLOR_INFO3				0x00002005</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_COHER_DEST_BASE_0				0x00002006</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_SCREEN_SCISSOR_TL			0x0000200e</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_SCREEN_SCISSOR_TL_X__SHIFT) &amp; A2XX_PA_SC_SCREEN_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__SHIFT) &amp; A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_SCREEN_SCISSOR_BR			0x0000200f</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_SCREEN_SCISSOR_BR_X__SHIFT) &amp; A2XX_PA_SC_SCREEN_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__SHIFT) &amp; A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_WINDOW_OFFSET				0x00002080</div><div class='del'>-#define A2XX_PA_SC_WINDOW_OFFSET_X__MASK			0x00007fff</div><div class='del'>-#define A2XX_PA_SC_WINDOW_OFFSET_X__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_WINDOW_OFFSET_X(int32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_WINDOW_OFFSET_X__SHIFT) &amp; A2XX_PA_SC_WINDOW_OFFSET_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_WINDOW_OFFSET_Y__MASK			0x7fff0000</div><div class='del'>-#define A2XX_PA_SC_WINDOW_OFFSET_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SC_WINDOW_OFFSET_Y(int32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_WINDOW_OFFSET_Y__SHIFT) &amp; A2XX_PA_SC_WINDOW_OFFSET_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_WINDOW_OFFSET_DISABLE			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_WINDOW_SCISSOR_TL			0x00002081</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_WINDOW_SCISSOR_TL_X__SHIFT) &amp; A2XX_PA_SC_WINDOW_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__SHIFT) &amp; A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_WINDOW_SCISSOR_BR			0x00002082</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_WINDOW_SCISSOR_BR_X__SHIFT) &amp; A2XX_PA_SC_WINDOW_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__SHIFT) &amp; A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_UNKNOWN_2010					0x00002010</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_MAX_VTX_INDX				0x00002100</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_MIN_VTX_INDX				0x00002101</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_INDX_OFFSET				0x00002102</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A225_PC_MULTI_PRIM_IB_RESET_INDX		0x00002103</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COLOR_MASK					0x00002104</div><div class='del'>-#define A2XX_RB_COLOR_MASK_WRITE_RED				0x00000001</div><div class='del'>-#define A2XX_RB_COLOR_MASK_WRITE_GREEN				0x00000002</div><div class='del'>-#define A2XX_RB_COLOR_MASK_WRITE_BLUE				0x00000004</div><div class='del'>-#define A2XX_RB_COLOR_MASK_WRITE_ALPHA				0x00000008</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_BLEND_RED					0x00002105</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_BLEND_GREEN					0x00002106</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_BLEND_BLUE					0x00002107</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_BLEND_ALPHA					0x00002108</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_FOG_COLOR					0x00002109</div><div class='del'>-#define A2XX_RB_FOG_COLOR_FOG_RED__MASK				0x000000ff</div><div class='del'>-#define A2XX_RB_FOG_COLOR_FOG_RED__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RB_FOG_COLOR_FOG_RED(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_FOG_COLOR_FOG_RED__SHIFT) &amp; A2XX_RB_FOG_COLOR_FOG_RED__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_FOG_COLOR_FOG_GREEN__MASK			0x0000ff00</div><div class='del'>-#define A2XX_RB_FOG_COLOR_FOG_GREEN__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_RB_FOG_COLOR_FOG_GREEN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_FOG_COLOR_FOG_GREEN__SHIFT) &amp; A2XX_RB_FOG_COLOR_FOG_GREEN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_FOG_COLOR_FOG_BLUE__MASK			0x00ff0000</div><div class='del'>-#define A2XX_RB_FOG_COLOR_FOG_BLUE__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_RB_FOG_COLOR_FOG_BLUE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_FOG_COLOR_FOG_BLUE__SHIFT) &amp; A2XX_RB_FOG_COLOR_FOG_BLUE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_STENCILREFMASK_BF				0x0000210c</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_BF_STENCILREF__MASK		0x000000ff</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) &amp; A2XX_RB_STENCILREFMASK_BF_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) &amp; A2XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK	0x00ff0000</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT	16</div><div class='del'>-static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) &amp; A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_STENCILREFMASK				0x0000210d</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_STENCILREF__MASK			0x000000ff</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_STENCILREFMASK_STENCILREF__SHIFT) &amp; A2XX_RB_STENCILREFMASK_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) &amp; A2XX_RB_STENCILREFMASK_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK		0x00ff0000</div><div class='del'>-#define A2XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT		16</div><div class='del'>-static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) &amp; A2XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_ALPHA_REF					0x0000210e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VPORT_XSCALE				0x0000210f</div><div class='del'>-#define A2XX_PA_CL_VPORT_XSCALE__MASK				0xffffffff</div><div class='del'>-#define A2XX_PA_CL_VPORT_XSCALE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_VPORT_XSCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_VPORT_XSCALE__SHIFT) &amp; A2XX_PA_CL_VPORT_XSCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VPORT_XOFFSET				0x00002110</div><div class='del'>-#define A2XX_PA_CL_VPORT_XOFFSET__MASK				0xffffffff</div><div class='del'>-#define A2XX_PA_CL_VPORT_XOFFSET__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_VPORT_XOFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_VPORT_XOFFSET__SHIFT) &amp; A2XX_PA_CL_VPORT_XOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VPORT_YSCALE				0x00002111</div><div class='del'>-#define A2XX_PA_CL_VPORT_YSCALE__MASK				0xffffffff</div><div class='del'>-#define A2XX_PA_CL_VPORT_YSCALE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_VPORT_YSCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_VPORT_YSCALE__SHIFT) &amp; A2XX_PA_CL_VPORT_YSCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VPORT_YOFFSET				0x00002112</div><div class='del'>-#define A2XX_PA_CL_VPORT_YOFFSET__MASK				0xffffffff</div><div class='del'>-#define A2XX_PA_CL_VPORT_YOFFSET__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_VPORT_YOFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_VPORT_YOFFSET__SHIFT) &amp; A2XX_PA_CL_VPORT_YOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VPORT_ZSCALE				0x00002113</div><div class='del'>-#define A2XX_PA_CL_VPORT_ZSCALE__MASK				0xffffffff</div><div class='del'>-#define A2XX_PA_CL_VPORT_ZSCALE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_VPORT_ZSCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_VPORT_ZSCALE__SHIFT) &amp; A2XX_PA_CL_VPORT_ZSCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VPORT_ZOFFSET				0x00002114</div><div class='del'>-#define A2XX_PA_CL_VPORT_ZOFFSET__MASK				0xffffffff</div><div class='del'>-#define A2XX_PA_CL_VPORT_ZOFFSET__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_VPORT_ZOFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_VPORT_ZOFFSET__SHIFT) &amp; A2XX_PA_CL_VPORT_ZOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PROGRAM_CNTL				0x00002180</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_REGS__MASK			0x000000ff</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_REGS__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_REGS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PROGRAM_CNTL_VS_REGS__SHIFT) &amp; A2XX_SQ_PROGRAM_CNTL_VS_REGS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_PS_REGS__MASK			0x0000ff00</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_PS_REGS__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_SQ_PROGRAM_CNTL_PS_REGS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PROGRAM_CNTL_PS_REGS__SHIFT) &amp; A2XX_SQ_PROGRAM_CNTL_PS_REGS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_RESOURCE			0x00010000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_PS_RESOURCE			0x00020000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_PARAM_GEN				0x00040000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_GEN_INDEX_PIX			0x00080000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT__MASK		0x00f00000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT__SHIFT		20</div><div class='del'>-static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT__SHIFT) &amp; A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE__MASK		0x07000000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE__SHIFT		24</div><div class='del'>-static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE(enum a2xx_sq_ps_vtx_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE__SHIFT) &amp; A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE__MASK		0x78000000</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE__SHIFT		27</div><div class='del'>-static inline uint32_t A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE__SHIFT) &amp; A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PROGRAM_CNTL_GEN_INDEX_VTX			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_CONTEXT_MISC				0x00002181</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_INST_PRED_OPTIMIZE			0x00000001</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_SC_OUTPUT_SCREEN_XY		0x00000002</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL__MASK		0x0000000c</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL__SHIFT		2</div><div class='del'>-static inline uint32_t A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(enum a2xx_sq_sample_cntl val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL__SHIFT) &amp; A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__MASK		0x0000ff00</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__SHIFT) &amp; A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_PERFCOUNTER_REF			0x00010000</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_YEILD_OPTIMIZE			0x00020000</div><div class='del'>-#define A2XX_SQ_CONTEXT_MISC_TX_CACHE_SEL			0x00040000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_INTERPOLATOR_CNTL				0x00002182</div><div class='del'>-#define A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE__MASK		0x0000ffff</div><div class='del'>-#define A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE__SHIFT) &amp; A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN__MASK	0xffff0000</div><div class='del'>-#define A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN__SHIFT	16</div><div class='del'>-static inline uint32_t A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN__SHIFT) &amp; A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_WRAPPING_0					0x00002183</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__MASK			0x0000000f</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__MASK			0x000000f0</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__SHIFT			4</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__MASK			0x00000f00</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__MASK			0x0000f000</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__MASK			0x000f0000</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_4(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__MASK			0x00f00000</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__SHIFT			20</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_5(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__MASK			0x0f000000</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__SHIFT			24</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_6(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__MASK			0xf0000000</div><div class='del'>-#define A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__SHIFT			28</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_7(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__SHIFT) &amp; A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_WRAPPING_1					0x00002184</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__MASK			0x0000000f</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_8(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__MASK			0x000000f0</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__SHIFT			4</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_9(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__MASK			0x00000f00</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_10(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__MASK			0x0000f000</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_11(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__MASK			0x000f0000</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_12(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__MASK			0x00f00000</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__SHIFT			20</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_13(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__MASK			0x0f000000</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__SHIFT			24</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_14(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__MASK			0xf0000000</div><div class='del'>-#define A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__SHIFT			28</div><div class='del'>-static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_15(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__SHIFT) &amp; A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PS_PROGRAM					0x000021f6</div><div class='del'>-#define A2XX_SQ_PS_PROGRAM_BASE__MASK				0x00000fff</div><div class='del'>-#define A2XX_SQ_PS_PROGRAM_BASE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_PS_PROGRAM_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PS_PROGRAM_BASE__SHIFT) &amp; A2XX_SQ_PS_PROGRAM_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PS_PROGRAM_SIZE__MASK				0x00fff000</div><div class='del'>-#define A2XX_SQ_PS_PROGRAM_SIZE__SHIFT				12</div><div class='del'>-static inline uint32_t A2XX_SQ_PS_PROGRAM_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PS_PROGRAM_SIZE__SHIFT) &amp; A2XX_SQ_PS_PROGRAM_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_VS_PROGRAM					0x000021f7</div><div class='del'>-#define A2XX_SQ_VS_PROGRAM_BASE__MASK				0x00000fff</div><div class='del'>-#define A2XX_SQ_VS_PROGRAM_BASE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_VS_PROGRAM_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_VS_PROGRAM_BASE__SHIFT) &amp; A2XX_SQ_VS_PROGRAM_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_VS_PROGRAM_SIZE__MASK				0x00fff000</div><div class='del'>-#define A2XX_SQ_VS_PROGRAM_SIZE__SHIFT				12</div><div class='del'>-static inline uint32_t A2XX_SQ_VS_PROGRAM_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_VS_PROGRAM_SIZE__SHIFT) &amp; A2XX_SQ_VS_PROGRAM_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_EVENT_INITIATOR				0x000021f9</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_DRAW_INITIATOR				0x000021fc</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MASK			0x0000003f</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT) &amp; A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__MASK		0x000000c0</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT		6</div><div class='del'>-static inline uint32_t A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT) &amp; A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK			0x00000600</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT			9</div><div class='del'>-static inline uint32_t A2XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT) &amp; A2XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__MASK		0x00000800</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT		11</div><div class='del'>-static inline uint32_t A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT) &amp; A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_NOT_EOP				0x00001000</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_SMALL_INDEX			0x00002000</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_PRE_DRAW_INITIATOR_ENABLE	0x00004000</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK		0xff000000</div><div class='del'>-#define A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT		24</div><div class='del'>-static inline uint32_t A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) &amp; A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_IMMED_DATA					0x000021fd</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_DEPTHCONTROL				0x00002200</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCIL_ENABLE			0x00000001</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_Z_ENABLE				0x00000002</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_Z_WRITE_ENABLE			0x00000004</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_EARLY_Z_ENABLE			0x00000008</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_ZFUNC__MASK			0x00000070</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_ZFUNC__SHIFT			4</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_ZFUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_ZFUNC__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_ZFUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_BACKFACE_ENABLE			0x00000080</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFUNC__MASK			0x00000700</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFUNC__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILFUNC__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILFUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFAIL__MASK			0x00003800</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFAIL__SHIFT			11</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILFAIL__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILFAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZPASS__MASK			0x0001c000</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZPASS__SHIFT		14</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZPASS(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILZPASS__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILZPASS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZFAIL__MASK			0x000e0000</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZFAIL__SHIFT		17</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZFAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILZFAIL__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILZFAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF__MASK		0x00700000</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF__SHIFT		20</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF__MASK		0x03800000</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF__SHIFT		23</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF__MASK		0x1c000000</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF__SHIFT		26</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF__MASK		0xe0000000</div><div class='del'>-#define A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF__SHIFT		29</div><div class='del'>-static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF__SHIFT) &amp; A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_BLEND_CONTROL				0x00002201</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND__MASK		0x0000001f</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND__SHIFT) &amp; A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN__MASK		0x000000e0</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN__SHIFT		5</div><div class='del'>-static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(enum a2xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN__SHIFT) &amp; A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND__MASK		0x00001f00</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND__SHIFT) &amp; A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND__MASK		0x001f0000</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND__SHIFT		16</div><div class='del'>-static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND__SHIFT) &amp; A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN__MASK		0x00e00000</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN__SHIFT		21</div><div class='del'>-static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(enum a2xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN__SHIFT) &amp; A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND__MASK		0x1f000000</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND__SHIFT		24</div><div class='del'>-static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND__SHIFT) &amp; A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_BLEND_FORCE_ENABLE		0x20000000</div><div class='del'>-#define A2XX_RB_BLEND_CONTROL_BLEND_FORCE			0x40000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COLORCONTROL				0x00002202</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_FUNC__MASK			0x00000007</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_FUNC__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_ALPHA_FUNC__SHIFT) &amp; A2XX_RB_COLORCONTROL_ALPHA_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TEST_ENABLE			0x00000008</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_ENABLE		0x00000010</div><div class='del'>-#define A2XX_RB_COLORCONTROL_BLEND_DISABLE			0x00000020</div><div class='del'>-#define A2XX_RB_COLORCONTROL_VOB_ENABLE				0x00000040</div><div class='del'>-#define A2XX_RB_COLORCONTROL_VS_EXPORTS_FOG			0x00000080</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ROP_CODE__MASK			0x00000f00</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ROP_CODE__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_ROP_CODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_ROP_CODE__SHIFT) &amp; A2XX_RB_COLORCONTROL_ROP_CODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_DITHER_MODE__MASK			0x00003000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_DITHER_MODE__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_DITHER_MODE__SHIFT) &amp; A2XX_RB_COLORCONTROL_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_DITHER_TYPE__MASK			0x0000c000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_DITHER_TYPE__SHIFT			14</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_DITHER_TYPE(enum a2xx_rb_dither_type val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_DITHER_TYPE__SHIFT) &amp; A2XX_RB_COLORCONTROL_DITHER_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_PIXEL_FOG				0x00010000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0__MASK	0x03000000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0__SHIFT	24</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0__SHIFT) &amp; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1__MASK	0x0c000000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1__SHIFT	26</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1__SHIFT) &amp; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2__MASK	0x30000000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2__SHIFT	28</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2__SHIFT) &amp; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3__MASK	0xc0000000</div><div class='del'>-#define A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3__SHIFT	30</div><div class='del'>-static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3__SHIFT) &amp; A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_CURRENT_BIN_ID_MAX				0x00002203</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__MASK		0x00000007</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__SHIFT) &amp; A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__MASK			0x00000038</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__SHIFT			3</div><div class='del'>-static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_ROW(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__SHIFT) &amp; A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK__MASK	0x000001c0</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK__SHIFT	6</div><div class='del'>-static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK__SHIFT) &amp; A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_CLIP_CNTL				0x00002204</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_CLIP_DISABLE			0x00010000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_BOUNDARY_EDGE_FLAG_ENA		0x00040000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF__MASK		0x00080000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF__SHIFT		19</div><div class='del'>-static inline uint32_t A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF(enum a2xx_dx_clip_space val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF__SHIFT) &amp; A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_DIS_CLIP_ERR_DETECT		0x00100000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_VTX_KILL_OR			0x00200000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_XY_NAN_RETAIN			0x00400000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_Z_NAN_RETAIN			0x00800000</div><div class='del'>-#define A2XX_PA_CL_CLIP_CNTL_W_NAN_RETAIN			0x01000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_SC_MODE_CNTL				0x00002205</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_CULL_FRONT			0x00000001</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_CULL_BACK			0x00000002</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_FACE				0x00000004</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__MASK			0x00000018</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__SHIFT			3</div><div class='del'>-static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_POLYMODE(enum a2xx_pa_su_sc_polymode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__SHIFT) &amp; A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE__MASK		0x000000e0</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE__SHIFT		5</div><div class='del'>-static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE__SHIFT) &amp; A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__MASK		0x00000700</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__SHIFT		8</div><div class='del'>-static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__SHIFT) &amp; A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_POLY_OFFSET_FRONT_ENABLE	0x00000800</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_POLY_OFFSET_BACK_ENABLE		0x00001000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_POLY_OFFSET_PARA_ENABLE		0x00002000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_MSAA_ENABLE			0x00008000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_VTX_WINDOW_OFFSET_ENABLE	0x00010000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_LINE_STIPPLE_ENABLE		0x00040000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_PROVOKING_VTX_LAST		0x00080000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_PERSP_CORR_DIS			0x00100000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_MULTI_PRIM_IB_ENA		0x00200000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_QUAD_ORDER_ENABLE		0x00800000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_WAIT_RB_IDLE_ALL_TRI		0x02000000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_WAIT_RB_IDLE_FIRST_TRI_NEW_STATE	0x04000000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_CLAMPED_FACENESS		0x10000000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_ZERO_AREA_FACENESS		0x20000000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_FACE_KILL_ENABLE		0x40000000</div><div class='del'>-#define A2XX_PA_SU_SC_MODE_CNTL_FACE_WRITE_ENABLE		0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_VTE_CNTL					0x00002206</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA			0x00000001</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA			0x00000002</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA			0x00000004</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA			0x00000008</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA			0x00000010</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA			0x00000020</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VTX_XY_FMT				0x00000100</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VTX_Z_FMT				0x00000200</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT				0x00000400</div><div class='del'>-#define A2XX_PA_CL_VTE_CNTL_PERFCOUNTER_REF			0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_CURRENT_BIN_ID_MIN				0x00002207</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__MASK		0x00000007</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__SHIFT) &amp; A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__MASK			0x00000038</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__SHIFT			3</div><div class='del'>-static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_ROW(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__SHIFT) &amp; A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK__MASK	0x000001c0</div><div class='del'>-#define A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK__SHIFT	6</div><div class='del'>-static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK__SHIFT) &amp; A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_MODECONTROL					0x00002208</div><div class='del'>-#define A2XX_RB_MODECONTROL_EDRAM_MODE__MASK			0x00000007</div><div class='del'>-#define A2XX_RB_MODECONTROL_EDRAM_MODE__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RB_MODECONTROL_EDRAM_MODE(enum a2xx_rb_edram_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_MODECONTROL_EDRAM_MODE__SHIFT) &amp; A2XX_RB_MODECONTROL_EDRAM_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A220_RB_LRZ_VSC_CONTROL			0x00002209</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_SAMPLE_POS					0x0000220a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_CLEAR_COLOR					0x0000220b</div><div class='del'>-#define A2XX_CLEAR_COLOR_RED__MASK				0x000000ff</div><div class='del'>-#define A2XX_CLEAR_COLOR_RED__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_CLEAR_COLOR_RED(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_CLEAR_COLOR_RED__SHIFT) &amp; A2XX_CLEAR_COLOR_RED__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_CLEAR_COLOR_GREEN__MASK				0x0000ff00</div><div class='del'>-#define A2XX_CLEAR_COLOR_GREEN__SHIFT				8</div><div class='del'>-static inline uint32_t A2XX_CLEAR_COLOR_GREEN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_CLEAR_COLOR_GREEN__SHIFT) &amp; A2XX_CLEAR_COLOR_GREEN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_CLEAR_COLOR_BLUE__MASK				0x00ff0000</div><div class='del'>-#define A2XX_CLEAR_COLOR_BLUE__SHIFT				16</div><div class='del'>-static inline uint32_t A2XX_CLEAR_COLOR_BLUE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_CLEAR_COLOR_BLUE__SHIFT) &amp; A2XX_CLEAR_COLOR_BLUE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_CLEAR_COLOR_ALPHA__MASK				0xff000000</div><div class='del'>-#define A2XX_CLEAR_COLOR_ALPHA__SHIFT				24</div><div class='del'>-static inline uint32_t A2XX_CLEAR_COLOR_ALPHA(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_CLEAR_COLOR_ALPHA__SHIFT) &amp; A2XX_CLEAR_COLOR_ALPHA__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A220_GRAS_CONTROL				0x00002210</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_POINT_SIZE				0x00002280</div><div class='del'>-#define A2XX_PA_SU_POINT_SIZE_HEIGHT__MASK			0x0000ffff</div><div class='del'>-#define A2XX_PA_SU_POINT_SIZE_HEIGHT__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SU_POINT_SIZE_HEIGHT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A2XX_PA_SU_POINT_SIZE_HEIGHT__SHIFT) &amp; A2XX_PA_SU_POINT_SIZE_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_POINT_SIZE_WIDTH__MASK			0xffff0000</div><div class='del'>-#define A2XX_PA_SU_POINT_SIZE_WIDTH__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SU_POINT_SIZE_WIDTH(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A2XX_PA_SU_POINT_SIZE_WIDTH__SHIFT) &amp; A2XX_PA_SU_POINT_SIZE_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_POINT_MINMAX				0x00002281</div><div class='del'>-#define A2XX_PA_SU_POINT_MINMAX_MIN__MASK			0x0000ffff</div><div class='del'>-#define A2XX_PA_SU_POINT_MINMAX_MIN__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SU_POINT_MINMAX_MIN(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A2XX_PA_SU_POINT_MINMAX_MIN__SHIFT) &amp; A2XX_PA_SU_POINT_MINMAX_MIN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_POINT_MINMAX_MAX__MASK			0xffff0000</div><div class='del'>-#define A2XX_PA_SU_POINT_MINMAX_MAX__SHIFT			16</div><div class='del'>-static inline uint32_t A2XX_PA_SU_POINT_MINMAX_MAX(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A2XX_PA_SU_POINT_MINMAX_MAX__SHIFT) &amp; A2XX_PA_SU_POINT_MINMAX_MAX__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_LINE_CNTL				0x00002282</div><div class='del'>-#define A2XX_PA_SU_LINE_CNTL_WIDTH__MASK			0x0000ffff</div><div class='del'>-#define A2XX_PA_SU_LINE_CNTL_WIDTH__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SU_LINE_CNTL_WIDTH(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A2XX_PA_SU_LINE_CNTL_WIDTH__SHIFT) &amp; A2XX_PA_SU_LINE_CNTL_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_LINE_STIPPLE				0x00002283</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN__MASK		0x0000ffff</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN__SHIFT) &amp; A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT__MASK		0x00ff0000</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT__SHIFT		16</div><div class='del'>-static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT__SHIFT) &amp; A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER__MASK		0x10000000</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER__SHIFT	28</div><div class='del'>-static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER(enum a2xx_pa_sc_pattern_bit_order val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER__SHIFT) &amp; A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL__MASK		0x60000000</div><div class='del'>-#define A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL__SHIFT		29</div><div class='del'>-static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL(enum a2xx_pa_sc_auto_reset_cntl val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL__SHIFT) &amp; A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_VIZ_QUERY				0x00002293</div><div class='del'>-#define A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ENA			0x00000001</div><div class='del'>-#define A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__MASK			0x0000007e</div><div class='del'>-#define A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__SHIFT		1</div><div class='del'>-static inline uint32_t A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__SHIFT) &amp; A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_VIZ_QUERY_KILL_PIX_POST_EARLY_Z		0x00000100</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_ENHANCE					0x00002294</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_LINE_CNTL				0x00002300</div><div class='del'>-#define A2XX_PA_SC_LINE_CNTL_BRES_CNTL__MASK			0x0000ffff</div><div class='del'>-#define A2XX_PA_SC_LINE_CNTL_BRES_CNTL__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_LINE_CNTL_BRES_CNTL(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_LINE_CNTL_BRES_CNTL__SHIFT) &amp; A2XX_PA_SC_LINE_CNTL_BRES_CNTL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_LINE_CNTL_USE_BRES_CNTL			0x00000100</div><div class='del'>-#define A2XX_PA_SC_LINE_CNTL_EXPAND_LINE_WIDTH			0x00000200</div><div class='del'>-#define A2XX_PA_SC_LINE_CNTL_LAST_PIXEL				0x00000400</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_AA_CONFIG				0x00002301</div><div class='del'>-#define A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES__MASK		0x00000007</div><div class='del'>-#define A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES__SHIFT) &amp; A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST__MASK		0x0001e000</div><div class='del'>-#define A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST__SHIFT		13</div><div class='del'>-static inline uint32_t A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST__SHIFT) &amp; A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_VTX_CNTL					0x00002302</div><div class='del'>-#define A2XX_PA_SU_VTX_CNTL_PIX_CENTER__MASK			0x00000001</div><div class='del'>-#define A2XX_PA_SU_VTX_CNTL_PIX_CENTER__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_SU_VTX_CNTL_PIX_CENTER(enum a2xx_pa_pixcenter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_VTX_CNTL_PIX_CENTER__SHIFT) &amp; A2XX_PA_SU_VTX_CNTL_PIX_CENTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_VTX_CNTL_ROUND_MODE__MASK			0x00000006</div><div class='del'>-#define A2XX_PA_SU_VTX_CNTL_ROUND_MODE__SHIFT			1</div><div class='del'>-static inline uint32_t A2XX_PA_SU_VTX_CNTL_ROUND_MODE(enum a2xx_pa_roundmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_VTX_CNTL_ROUND_MODE__SHIFT) &amp; A2XX_PA_SU_VTX_CNTL_ROUND_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_PA_SU_VTX_CNTL_QUANT_MODE__MASK			0x00000380</div><div class='del'>-#define A2XX_PA_SU_VTX_CNTL_QUANT_MODE__SHIFT			7</div><div class='del'>-static inline uint32_t A2XX_PA_SU_VTX_CNTL_QUANT_MODE(enum a2xx_pa_quantmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_PA_SU_VTX_CNTL_QUANT_MODE__SHIFT) &amp; A2XX_PA_SU_VTX_CNTL_QUANT_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_GB_VERT_CLIP_ADJ				0x00002303</div><div class='del'>-#define A2XX_PA_CL_GB_VERT_CLIP_ADJ__MASK			0xffffffff</div><div class='del'>-#define A2XX_PA_CL_GB_VERT_CLIP_ADJ__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_GB_VERT_CLIP_ADJ(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_GB_VERT_CLIP_ADJ__SHIFT) &amp; A2XX_PA_CL_GB_VERT_CLIP_ADJ__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_GB_VERT_DISC_ADJ				0x00002304</div><div class='del'>-#define A2XX_PA_CL_GB_VERT_DISC_ADJ__MASK			0xffffffff</div><div class='del'>-#define A2XX_PA_CL_GB_VERT_DISC_ADJ__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_GB_VERT_DISC_ADJ(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_GB_VERT_DISC_ADJ__SHIFT) &amp; A2XX_PA_CL_GB_VERT_DISC_ADJ__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_GB_HORZ_CLIP_ADJ				0x00002305</div><div class='del'>-#define A2XX_PA_CL_GB_HORZ_CLIP_ADJ__MASK			0xffffffff</div><div class='del'>-#define A2XX_PA_CL_GB_HORZ_CLIP_ADJ__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_GB_HORZ_CLIP_ADJ(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_GB_HORZ_CLIP_ADJ__SHIFT) &amp; A2XX_PA_CL_GB_HORZ_CLIP_ADJ__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_CL_GB_HORZ_DISC_ADJ				0x00002306</div><div class='del'>-#define A2XX_PA_CL_GB_HORZ_DISC_ADJ__MASK			0xffffffff</div><div class='del'>-#define A2XX_PA_CL_GB_HORZ_DISC_ADJ__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_PA_CL_GB_HORZ_DISC_ADJ(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A2XX_PA_CL_GB_HORZ_DISC_ADJ__SHIFT) &amp; A2XX_PA_CL_GB_HORZ_DISC_ADJ__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_VS_CONST					0x00002307</div><div class='del'>-#define A2XX_SQ_VS_CONST_BASE__MASK				0x000001ff</div><div class='del'>-#define A2XX_SQ_VS_CONST_BASE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_VS_CONST_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_VS_CONST_BASE__SHIFT) &amp; A2XX_SQ_VS_CONST_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_VS_CONST_SIZE__MASK				0x001ff000</div><div class='del'>-#define A2XX_SQ_VS_CONST_SIZE__SHIFT				12</div><div class='del'>-static inline uint32_t A2XX_SQ_VS_CONST_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_VS_CONST_SIZE__SHIFT) &amp; A2XX_SQ_VS_CONST_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PS_CONST					0x00002308</div><div class='del'>-#define A2XX_SQ_PS_CONST_BASE__MASK				0x000001ff</div><div class='del'>-#define A2XX_SQ_PS_CONST_BASE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_PS_CONST_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PS_CONST_BASE__SHIFT) &amp; A2XX_SQ_PS_CONST_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_PS_CONST_SIZE__MASK				0x001ff000</div><div class='del'>-#define A2XX_SQ_PS_CONST_SIZE__SHIFT				12</div><div class='del'>-static inline uint32_t A2XX_SQ_PS_CONST_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_PS_CONST_SIZE__SHIFT) &amp; A2XX_SQ_PS_CONST_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_MISC_0				0x00002309</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_DEBUG_MISC_1				0x0000230a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_AA_MASK					0x00002312</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL			0x00002316</div><div class='del'>-#define A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH__MASK	0x00000007</div><div class='del'>-#define A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH__SHIFT	0</div><div class='del'>-static inline uint32_t A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH__SHIFT) &amp; A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_OUT_DEALLOC_CNTL				0x00002317</div><div class='del'>-#define A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST__MASK		0x00000003</div><div class='del'>-#define A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST__SHIFT) &amp; A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COPY_CONTROL				0x00002318</div><div class='del'>-#define A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT__MASK		0x00000007</div><div class='del'>-#define A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT(enum a2xx_rb_copy_sample_select val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT__SHIFT) &amp; A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_CONTROL_DEPTH_CLEAR_ENABLE			0x00000008</div><div class='del'>-#define A2XX_RB_COPY_CONTROL_CLEAR_MASK__MASK			0x000000f0</div><div class='del'>-#define A2XX_RB_COPY_CONTROL_CLEAR_MASK__SHIFT			4</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_CONTROL_CLEAR_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_CONTROL_CLEAR_MASK__SHIFT) &amp; A2XX_RB_COPY_CONTROL_CLEAR_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COPY_DEST_BASE				0x00002319</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COPY_DEST_PITCH				0x0000231a</div><div class='del'>-#define A2XX_RB_COPY_DEST_PITCH__MASK				0xffffffff</div><div class='del'>-#define A2XX_RB_COPY_DEST_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A2XX_RB_COPY_DEST_PITCH__SHIFT) &amp; A2XX_RB_COPY_DEST_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COPY_DEST_INFO				0x0000231b</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__MASK		0x00000007</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__SHIFT		0</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN(enum adreno_rb_surface_endian val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__SHIFT) &amp; A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_LINEAR				0x00000008</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_FORMAT__MASK			0x000000f0</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_FORMAT__SHIFT			4</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_INFO_FORMAT(enum a2xx_colorformatx val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) &amp; A2XX_RB_COPY_DEST_INFO_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_SWAP__MASK			0x00000300</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_SWAP__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_INFO_SWAP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_INFO_SWAP__SHIFT) &amp; A2XX_RB_COPY_DEST_INFO_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_DITHER_MODE__MASK		0x00000c00</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT		10</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) &amp; A2XX_RB_COPY_DEST_INFO_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__MASK		0x00003000</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__SHIFT		12</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_INFO_DITHER_TYPE(enum a2xx_rb_dither_type val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__SHIFT) &amp; A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_WRITE_RED			0x00004000</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_WRITE_GREEN			0x00008000</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_WRITE_BLUE			0x00010000</div><div class='del'>-#define A2XX_RB_COPY_DEST_INFO_WRITE_ALPHA			0x00020000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COPY_DEST_OFFSET				0x0000231c</div><div class='del'>-#define A2XX_RB_COPY_DEST_OFFSET_X__MASK			0x00001fff</div><div class='del'>-#define A2XX_RB_COPY_DEST_OFFSET_X__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_OFFSET_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_OFFSET_X__SHIFT) &amp; A2XX_RB_COPY_DEST_OFFSET_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_RB_COPY_DEST_OFFSET_Y__MASK			0x03ffe000</div><div class='del'>-#define A2XX_RB_COPY_DEST_OFFSET_Y__SHIFT			13</div><div class='del'>-static inline uint32_t A2XX_RB_COPY_DEST_OFFSET_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_RB_COPY_DEST_OFFSET_Y__SHIFT) &amp; A2XX_RB_COPY_DEST_OFFSET_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_DEPTH_CLEAR					0x0000231d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_SAMPLE_COUNT_CTL				0x00002324</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_COLOR_DEST_MASK				0x00002326</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A225_GRAS_UCP0X				0x00002340</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A225_GRAS_UCP5W				0x00002357</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_A225_GRAS_UCP_ENABLED				0x00002360</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE			0x00002380</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_POLY_OFFSET_FRONT_OFFSET			0x00002381</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_POLY_OFFSET_BACK_SCALE			0x00002382</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_POLY_OFFSET_BACK_OFFSET			0x00002383</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_CONSTANT_0					0x00004000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_FETCH_0					0x00004800</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_CF_BOOLEANS					0x00004900</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_CF_LOOP					0x00004908</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_COHER_SIZE_PM4					0x00000a29</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_COHER_BASE_PM4					0x00000a2a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_COHER_STATUS_PM4				0x00000a2b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER0_SELECT			0x00000c88</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER1_SELECT			0x00000c89</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER2_SELECT			0x00000c8a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER3_SELECT			0x00000c8b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER0_LOW				0x00000c8c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER0_HI				0x00000c8d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER1_LOW				0x00000c8e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER1_HI				0x00000c8f</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER2_LOW				0x00000c90</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER2_HI				0x00000c91</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER3_LOW				0x00000c92</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SU_PERFCOUNTER3_HI				0x00000c93</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_PERFCOUNTER0_SELECT			0x00000c98</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_PERFCOUNTER0_LOW				0x00000c99</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_PA_SC_PERFCOUNTER0_HI				0x00000c9a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER0_SELECT			0x00000c48</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER1_SELECT			0x00000c49</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER2_SELECT			0x00000c4a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER3_SELECT			0x00000c4b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER0_LOW				0x00000c4c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER1_LOW				0x00000c4e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER2_LOW				0x00000c50</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER3_LOW				0x00000c52</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER0_HI				0x00000c4d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER1_HI				0x00000c4f</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER2_HI				0x00000c51</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_VGT_PERFCOUNTER3_HI				0x00000c53</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCR_PERFCOUNTER0_SELECT			0x00000e05</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCR_PERFCOUNTER1_SELECT			0x00000e08</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCR_PERFCOUNTER0_HI				0x00000e06</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCR_PERFCOUNTER1_HI				0x00000e09</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCR_PERFCOUNTER0_LOW				0x00000e07</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCR_PERFCOUNTER1_LOW				0x00000e0a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_PERFCOUNTER0_SELECT			0x00000e1f</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_PERFCOUNTER0_HI				0x00000e20</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_PERFCOUNTER0_LOW				0x00000e21</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_PERFCOUNTER1_SELECT			0x00000e22</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_PERFCOUNTER1_HI				0x00000e23</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TP0_PERFCOUNTER1_LOW				0x00000e24</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCM_PERFCOUNTER0_SELECT			0x00000e54</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCM_PERFCOUNTER1_SELECT			0x00000e57</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCM_PERFCOUNTER0_HI				0x00000e55</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCM_PERFCOUNTER1_HI				0x00000e58</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCM_PERFCOUNTER0_LOW				0x00000e56</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCM_PERFCOUNTER1_LOW				0x00000e59</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER0_SELECT			0x00000e5a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER1_SELECT			0x00000e5d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER2_SELECT			0x00000e60</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER3_SELECT			0x00000e63</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER4_SELECT			0x00000e66</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER5_SELECT			0x00000e69</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER6_SELECT			0x00000e6c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER7_SELECT			0x00000e6f</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER8_SELECT			0x00000e72</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER9_SELECT			0x00000e75</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER10_SELECT			0x00000e78</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER11_SELECT			0x00000e7b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER0_HI				0x00000e5b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER1_HI				0x00000e5e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER2_HI				0x00000e61</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER3_HI				0x00000e64</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER4_HI				0x00000e67</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER5_HI				0x00000e6a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER6_HI				0x00000e6d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER7_HI				0x00000e70</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER8_HI				0x00000e73</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER9_HI				0x00000e76</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER10_HI				0x00000e79</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER11_HI				0x00000e7c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER0_LOW				0x00000e5c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER1_LOW				0x00000e5f</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER2_LOW				0x00000e62</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER3_LOW				0x00000e65</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER4_LOW				0x00000e68</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER5_LOW				0x00000e6b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER6_LOW				0x00000e6e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER7_LOW				0x00000e71</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER8_LOW				0x00000e74</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER9_LOW				0x00000e77</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER10_LOW				0x00000e7a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_TCF_PERFCOUNTER11_LOW				0x00000e7d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER0_SELECT				0x00000dc8</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER1_SELECT				0x00000dc9</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER2_SELECT				0x00000dca</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER3_SELECT				0x00000dcb</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER0_LOW				0x00000dcc</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER0_HI				0x00000dcd</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER1_LOW				0x00000dce</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER1_HI				0x00000dcf</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER2_LOW				0x00000dd0</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER2_HI				0x00000dd1</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER3_LOW				0x00000dd2</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_PERFCOUNTER3_HI				0x00000dd3</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SX_PERFCOUNTER0_SELECT				0x00000dd4</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SX_PERFCOUNTER0_LOW				0x00000dd8</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SX_PERFCOUNTER0_HI				0x00000dd9</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER0_SELECT				0x00000a46</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER1_SELECT				0x00000a4a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER0_CONFIG				0x00000a47</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER1_CONFIG				0x00000a4b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER0_LOW				0x00000a48</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER1_LOW				0x00000a4c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER0_HI				0x00000a49</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_MH_PERFCOUNTER1_HI				0x00000a4d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER0_SELECT				0x00000f04</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER1_SELECT				0x00000f05</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER2_SELECT				0x00000f06</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER3_SELECT				0x00000f07</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER0_LOW				0x00000f08</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER0_HI				0x00000f09</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER1_LOW				0x00000f0a</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER1_HI				0x00000f0b</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER2_LOW				0x00000f0c</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER2_HI				0x00000f0d</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER3_LOW				0x00000f0e</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_RB_PERFCOUNTER3_HI				0x00000f0f</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_TEX_0					0x00000000</div><div class='del'>-#define A2XX_SQ_TEX_0_TYPE__MASK				0x00000003</div><div class='del'>-#define A2XX_SQ_TEX_0_TYPE__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_TYPE(enum sq_tex_type val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_TYPE__SHIFT) &amp; A2XX_SQ_TEX_0_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_X__MASK				0x0000000c</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_X__SHIFT				2</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_SIGN_X(enum sq_tex_sign val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_SIGN_X__SHIFT) &amp; A2XX_SQ_TEX_0_SIGN_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_Y__MASK				0x00000030</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_Y__SHIFT				4</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_SIGN_Y(enum sq_tex_sign val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_SIGN_Y__SHIFT) &amp; A2XX_SQ_TEX_0_SIGN_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_Z__MASK				0x000000c0</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_Z__SHIFT				6</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_SIGN_Z(enum sq_tex_sign val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_SIGN_Z__SHIFT) &amp; A2XX_SQ_TEX_0_SIGN_Z__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_W__MASK				0x00000300</div><div class='del'>-#define A2XX_SQ_TEX_0_SIGN_W__SHIFT				8</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_SIGN_W(enum sq_tex_sign val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_SIGN_W__SHIFT) &amp; A2XX_SQ_TEX_0_SIGN_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_CLAMP_X__MASK				0x00001c00</div><div class='del'>-#define A2XX_SQ_TEX_0_CLAMP_X__SHIFT				10</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_CLAMP_X(enum sq_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_CLAMP_X__SHIFT) &amp; A2XX_SQ_TEX_0_CLAMP_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_CLAMP_Y__MASK				0x0000e000</div><div class='del'>-#define A2XX_SQ_TEX_0_CLAMP_Y__SHIFT				13</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_CLAMP_Y(enum sq_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_CLAMP_Y__SHIFT) &amp; A2XX_SQ_TEX_0_CLAMP_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_CLAMP_Z__MASK				0x00070000</div><div class='del'>-#define A2XX_SQ_TEX_0_CLAMP_Z__SHIFT				16</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_CLAMP_Z(enum sq_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_0_CLAMP_Z__SHIFT) &amp; A2XX_SQ_TEX_0_CLAMP_Z__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_PITCH__MASK				0x7fc00000</div><div class='del'>-#define A2XX_SQ_TEX_0_PITCH__SHIFT				22</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_0_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A2XX_SQ_TEX_0_PITCH__SHIFT) &amp; A2XX_SQ_TEX_0_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_0_TILED					0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_TEX_1					0x00000001</div><div class='del'>-#define A2XX_SQ_TEX_1_FORMAT__MASK				0x0000003f</div><div class='del'>-#define A2XX_SQ_TEX_1_FORMAT__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_1_FORMAT(enum a2xx_sq_surfaceformat val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_1_FORMAT__SHIFT) &amp; A2XX_SQ_TEX_1_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_1_ENDIANNESS__MASK				0x000000c0</div><div class='del'>-#define A2XX_SQ_TEX_1_ENDIANNESS__SHIFT				6</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_1_ENDIANNESS(enum sq_tex_endian val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_1_ENDIANNESS__SHIFT) &amp; A2XX_SQ_TEX_1_ENDIANNESS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_1_REQUEST_SIZE__MASK			0x00000300</div><div class='del'>-#define A2XX_SQ_TEX_1_REQUEST_SIZE__SHIFT			8</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_1_REQUEST_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_1_REQUEST_SIZE__SHIFT) &amp; A2XX_SQ_TEX_1_REQUEST_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_1_STACKED					0x00000400</div><div class='del'>-#define A2XX_SQ_TEX_1_CLAMP_POLICY__MASK			0x00000800</div><div class='del'>-#define A2XX_SQ_TEX_1_CLAMP_POLICY__SHIFT			11</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_1_CLAMP_POLICY(enum sq_tex_clamp_policy val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_1_CLAMP_POLICY__SHIFT) &amp; A2XX_SQ_TEX_1_CLAMP_POLICY__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_1_BASE_ADDRESS__MASK			0xfffff000</div><div class='del'>-#define A2XX_SQ_TEX_1_BASE_ADDRESS__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_1_BASE_ADDRESS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A2XX_SQ_TEX_1_BASE_ADDRESS__SHIFT) &amp; A2XX_SQ_TEX_1_BASE_ADDRESS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_TEX_2					0x00000002</div><div class='del'>-#define A2XX_SQ_TEX_2_WIDTH__MASK				0x00001fff</div><div class='del'>-#define A2XX_SQ_TEX_2_WIDTH__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_2_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_2_WIDTH__SHIFT) &amp; A2XX_SQ_TEX_2_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_2_HEIGHT__MASK				0x03ffe000</div><div class='del'>-#define A2XX_SQ_TEX_2_HEIGHT__SHIFT				13</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_2_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_2_HEIGHT__SHIFT) &amp; A2XX_SQ_TEX_2_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_2_DEPTH__MASK				0xfc000000</div><div class='del'>-#define A2XX_SQ_TEX_2_DEPTH__SHIFT				26</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_2_DEPTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_2_DEPTH__SHIFT) &amp; A2XX_SQ_TEX_2_DEPTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_TEX_3					0x00000003</div><div class='del'>-#define A2XX_SQ_TEX_3_NUM_FORMAT__MASK				0x00000001</div><div class='del'>-#define A2XX_SQ_TEX_3_NUM_FORMAT__SHIFT				0</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_NUM_FORMAT(enum sq_tex_num_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_NUM_FORMAT__SHIFT) &amp; A2XX_SQ_TEX_3_NUM_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_X__MASK				0x0000000e</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_X__SHIFT				1</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_SWIZ_X(enum sq_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_SWIZ_X__SHIFT) &amp; A2XX_SQ_TEX_3_SWIZ_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_Y__MASK				0x00000070</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_Y__SHIFT				4</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_SWIZ_Y(enum sq_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_SWIZ_Y__SHIFT) &amp; A2XX_SQ_TEX_3_SWIZ_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_Z__MASK				0x00000380</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_Z__SHIFT				7</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_SWIZ_Z(enum sq_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_SWIZ_Z__SHIFT) &amp; A2XX_SQ_TEX_3_SWIZ_Z__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_W__MASK				0x00001c00</div><div class='del'>-#define A2XX_SQ_TEX_3_SWIZ_W__SHIFT				10</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_SWIZ_W(enum sq_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_SWIZ_W__SHIFT) &amp; A2XX_SQ_TEX_3_SWIZ_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_EXP_ADJUST__MASK				0x0007e000</div><div class='del'>-#define A2XX_SQ_TEX_3_EXP_ADJUST__SHIFT				13</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_EXP_ADJUST(int32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_EXP_ADJUST__SHIFT) &amp; A2XX_SQ_TEX_3_EXP_ADJUST__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_XY_MAG_FILTER__MASK			0x00180000</div><div class='del'>-#define A2XX_SQ_TEX_3_XY_MAG_FILTER__SHIFT			19</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_XY_MAG_FILTER(enum sq_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_XY_MAG_FILTER__SHIFT) &amp; A2XX_SQ_TEX_3_XY_MAG_FILTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_XY_MIN_FILTER__MASK			0x00600000</div><div class='del'>-#define A2XX_SQ_TEX_3_XY_MIN_FILTER__SHIFT			21</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_XY_MIN_FILTER(enum sq_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_XY_MIN_FILTER__SHIFT) &amp; A2XX_SQ_TEX_3_XY_MIN_FILTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_MIP_FILTER__MASK				0x01800000</div><div class='del'>-#define A2XX_SQ_TEX_3_MIP_FILTER__SHIFT				23</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_MIP_FILTER(enum sq_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_MIP_FILTER__SHIFT) &amp; A2XX_SQ_TEX_3_MIP_FILTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_ANISO_FILTER__MASK			0x0e000000</div><div class='del'>-#define A2XX_SQ_TEX_3_ANISO_FILTER__SHIFT			25</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_ANISO_FILTER(enum sq_tex_aniso_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_ANISO_FILTER__SHIFT) &amp; A2XX_SQ_TEX_3_ANISO_FILTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_3_BORDER_SIZE__MASK				0x80000000</div><div class='del'>-#define A2XX_SQ_TEX_3_BORDER_SIZE__SHIFT			31</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_3_BORDER_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_3_BORDER_SIZE__SHIFT) &amp; A2XX_SQ_TEX_3_BORDER_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_TEX_4					0x00000004</div><div class='del'>-#define A2XX_SQ_TEX_4_VOL_MAG_FILTER__MASK			0x00000001</div><div class='del'>-#define A2XX_SQ_TEX_4_VOL_MAG_FILTER__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_VOL_MAG_FILTER(enum sq_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_4_VOL_MAG_FILTER__SHIFT) &amp; A2XX_SQ_TEX_4_VOL_MAG_FILTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_4_VOL_MIN_FILTER__MASK			0x00000002</div><div class='del'>-#define A2XX_SQ_TEX_4_VOL_MIN_FILTER__SHIFT			1</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_VOL_MIN_FILTER(enum sq_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_4_VOL_MIN_FILTER__SHIFT) &amp; A2XX_SQ_TEX_4_VOL_MIN_FILTER__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_4_MIP_MIN_LEVEL__MASK			0x0000003c</div><div class='del'>-#define A2XX_SQ_TEX_4_MIP_MIN_LEVEL__SHIFT			2</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_MIP_MIN_LEVEL(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_4_MIP_MIN_LEVEL__SHIFT) &amp; A2XX_SQ_TEX_4_MIP_MIN_LEVEL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_4_MIP_MAX_LEVEL__MASK			0x000003c0</div><div class='del'>-#define A2XX_SQ_TEX_4_MIP_MAX_LEVEL__SHIFT			6</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_MIP_MAX_LEVEL(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_4_MIP_MAX_LEVEL__SHIFT) &amp; A2XX_SQ_TEX_4_MIP_MAX_LEVEL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_4_MAX_ANISO_WALK				0x00000400</div><div class='del'>-#define A2XX_SQ_TEX_4_MIN_ANISO_WALK				0x00000800</div><div class='del'>-#define A2XX_SQ_TEX_4_LOD_BIAS__MASK				0x003ff000</div><div class='del'>-#define A2XX_SQ_TEX_4_LOD_BIAS__SHIFT				12</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_LOD_BIAS(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 32.0))) &lt;&lt; A2XX_SQ_TEX_4_LOD_BIAS__SHIFT) &amp; A2XX_SQ_TEX_4_LOD_BIAS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__MASK			0x07c00000</div><div class='del'>-#define A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__SHIFT			22</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__SHIFT) &amp; A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__MASK			0xf8000000</div><div class='del'>-#define A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__SHIFT			27</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__SHIFT) &amp; A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A2XX_SQ_TEX_5					0x00000005</div><div class='del'>-#define A2XX_SQ_TEX_5_BORDER_COLOR__MASK			0x00000003</div><div class='del'>-#define A2XX_SQ_TEX_5_BORDER_COLOR__SHIFT			0</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_5_BORDER_COLOR(enum sq_tex_border_color val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_5_BORDER_COLOR__SHIFT) &amp; A2XX_SQ_TEX_5_BORDER_COLOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_5_FORCE_BCW_MAX				0x00000004</div><div class='del'>-#define A2XX_SQ_TEX_5_TRI_CLAMP__MASK				0x00000018</div><div class='del'>-#define A2XX_SQ_TEX_5_TRI_CLAMP__SHIFT				3</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_5_TRI_CLAMP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_5_TRI_CLAMP__SHIFT) &amp; A2XX_SQ_TEX_5_TRI_CLAMP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_5_ANISO_BIAS__MASK				0x000001e0</div><div class='del'>-#define A2XX_SQ_TEX_5_ANISO_BIAS__SHIFT				5</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_5_ANISO_BIAS(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 1.0))) &lt;&lt; A2XX_SQ_TEX_5_ANISO_BIAS__SHIFT) &amp; A2XX_SQ_TEX_5_ANISO_BIAS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_5_DIMENSION__MASK				0x00000600</div><div class='del'>-#define A2XX_SQ_TEX_5_DIMENSION__SHIFT				9</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_5_DIMENSION(enum sq_tex_dimension val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A2XX_SQ_TEX_5_DIMENSION__SHIFT) &amp; A2XX_SQ_TEX_5_DIMENSION__MASK;</div><div class='del'>-}</div><div class='del'>-#define A2XX_SQ_TEX_5_PACKED_MIPS				0x00000800</div><div class='del'>-#define A2XX_SQ_TEX_5_MIP_ADDRESS__MASK				0xfffff000</div><div class='del'>-#define A2XX_SQ_TEX_5_MIP_ADDRESS__SHIFT			12</div><div class='del'>-static inline uint32_t A2XX_SQ_TEX_5_MIP_ADDRESS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A2XX_SQ_TEX_5_MIP_ADDRESS__SHIFT) &amp; A2XX_SQ_TEX_5_MIP_ADDRESS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* A2XX_XML */</div><div class='head'>diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c<br/>index 0d8133f3174b..0dc255ddf5ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a2xx_gpu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx_gpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a2xx_gpu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/msm/adreno/a2xx_gpu.c</a></div><div class='hunk'>@@ -113,7 +113,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu)</div><div class='ctx'> 	uint32_t *ptr, len;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	msm_gpummu_params(gpu-&gt;aspace-&gt;mmu, &amp;pt_base, &amp;tran_error);</div><div class='add'>+	a2xx_gpummu_params(gpu-&gt;aspace-&gt;mmu, &amp;pt_base, &amp;tran_error);</div><div class='ctx'> </div><div class='ctx'> 	DBG("%s", gpu-&gt;name);</div><div class='ctx'> </div><div class='hunk'>@@ -469,7 +469,7 @@ static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu)</div><div class='ctx'> static struct msm_gem_address_space *</div><div class='ctx'> a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct msm_mmu *mmu = msm_gpummu_new(&amp;pdev-&gt;dev, gpu);</div><div class='add'>+	struct msm_mmu *mmu = a2xx_gpummu_new(&amp;pdev-&gt;dev, gpu);</div><div class='ctx'> 	struct msm_gem_address_space *aspace;</div><div class='ctx'> </div><div class='ctx'> 	aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M,</div><div class='head'>diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.h b/drivers/gpu/drm/msm/adreno/a2xx_gpu.h<br/>index 161a075f94af..53702f19990f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a2xx_gpu.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a2xx_gpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a2xx_gpu.h?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/msm/adreno/a2xx_gpu.h</a></div><div class='hunk'>@@ -19,4 +19,8 @@ struct a2xx_gpu {</div><div class='ctx'> };</div><div class='ctx'> #define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)</div><div class='ctx'> </div><div class='add'>+struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);</div><div class='add'>+void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,</div><div class='add'>+		dma_addr_t *tran_error);</div><div class='add'>+</div><div class='ctx'> #endif /* __A2XX_GPU_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/msm/msm_gpummu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpummu.c<br/>index f7d1945e0c9f..39641551eeb6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/msm_gpummu.c?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/msm_gpummu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a2xx_gpummu.c?h=v6.10-rc1&amp;id=c405aa3ea36c1f973a9f10bbcfabc9aeeb38040c'>drivers/gpu/drm/msm/adreno/a2xx_gpummu.c</a></div><div class='hunk'>@@ -5,30 +5,33 @@</div><div class='ctx'> </div><div class='ctx'> #include "msm_drv.h"</div><div class='ctx'> #include "msm_mmu.h"</div><div class='del'>-#include "adreno/adreno_gpu.h"</div><div class='del'>-#include "adreno/a2xx.xml.h"</div><div class='ctx'> </div><div class='del'>-struct msm_gpummu {</div><div class='add'>+#include "adreno_gpu.h"</div><div class='add'>+#include "a2xx_gpu.h"</div><div class='add'>+</div><div class='add'>+#include "a2xx.xml.h"</div><div class='add'>+</div><div class='add'>+struct a2xx_gpummu {</div><div class='ctx'> 	struct msm_mmu base;</div><div class='ctx'> 	struct msm_gpu *gpu;</div><div class='ctx'> 	dma_addr_t pt_base;</div><div class='ctx'> 	uint32_t *table;</div><div class='ctx'> };</div><div class='del'>-#define to_msm_gpummu(x) container_of(x, struct msm_gpummu, base)</div><div class='add'>+#define to_a2xx_gpummu(x) container_of(x, struct a2xx_gpummu, base)</div><div class='ctx'> </div><div class='ctx'> #define GPUMMU_VA_START SZ_16M</div><div class='ctx'> #define GPUMMU_VA_RANGE (0xfff * SZ_64K)</div><div class='ctx'> #define GPUMMU_PAGE_SIZE SZ_4K</div><div class='ctx'> #define TABLE_SIZE (sizeof(uint32_t) * GPUMMU_VA_RANGE / GPUMMU_PAGE_SIZE)</div><div class='ctx'> </div><div class='del'>-static void msm_gpummu_detach(struct msm_mmu *mmu)</div><div class='add'>+static void a2xx_gpummu_detach(struct msm_mmu *mmu)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,</div><div class='add'>+static int a2xx_gpummu_map(struct msm_mmu *mmu, uint64_t iova,</div><div class='ctx'> 		struct sg_table *sgt, size_t len, int prot)</div><div class='ctx'> {</div><div class='del'>-	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);</div><div class='add'>+	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);</div><div class='ctx'> 	unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;</div><div class='ctx'> 	struct sg_dma_page_iter dma_iter;</div><div class='ctx'> 	unsigned prot_bits = 0;</div><div class='hunk'>@@ -53,9 +56,9 @@ static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)</div><div class='add'>+static int a2xx_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);</div><div class='add'>+	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);</div><div class='ctx'> 	unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> </div><div class='hunk'>@@ -68,13 +71,13 @@ static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void msm_gpummu_resume_translation(struct msm_mmu *mmu)</div><div class='add'>+static void a2xx_gpummu_resume_translation(struct msm_mmu *mmu)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void msm_gpummu_destroy(struct msm_mmu *mmu)</div><div class='add'>+static void a2xx_gpummu_destroy(struct msm_mmu *mmu)</div><div class='ctx'> {</div><div class='del'>-	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);</div><div class='add'>+	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);</div><div class='ctx'> </div><div class='ctx'> 	dma_free_attrs(mmu-&gt;dev, TABLE_SIZE, gpummu-&gt;table, gpummu-&gt;pt_base,</div><div class='ctx'> 		DMA_ATTR_FORCE_CONTIGUOUS);</div><div class='hunk'>@@ -83,16 +86,16 @@ static void msm_gpummu_destroy(struct msm_mmu *mmu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct msm_mmu_funcs funcs = {</div><div class='del'>-		.detach = msm_gpummu_detach,</div><div class='del'>-		.map = msm_gpummu_map,</div><div class='del'>-		.unmap = msm_gpummu_unmap,</div><div class='del'>-		.destroy = msm_gpummu_destroy,</div><div class='del'>-		.resume_translation = msm_gpummu_resume_translation,</div><div class='add'>+		.detach = a2xx_gpummu_detach,</div><div class='add'>+		.map = a2xx_gpummu_map,</div><div class='add'>+		.unmap = a2xx_gpummu_unmap,</div><div class='add'>+		.destroy = a2xx_gpummu_destroy,</div><div class='add'>+		.resume_translation = a2xx_gpummu_resume_translation,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu)</div><div class='add'>+struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu)</div><div class='ctx'> {</div><div class='del'>-	struct msm_gpummu *gpummu;</div><div class='add'>+	struct a2xx_gpummu *gpummu;</div><div class='ctx'> </div><div class='ctx'> 	gpummu = kzalloc(sizeof(*gpummu), GFP_KERNEL);</div><div class='ctx'> 	if (!gpummu)</div><div class='hunk'>@@ -111,10 +114,10 @@ struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu)</div><div class='ctx'> 	return &amp;gpummu-&gt;base;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,</div><div class='add'>+void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,</div><div class='ctx'> 		dma_addr_t *tran_error)</div><div class='ctx'> {</div><div class='del'>-	dma_addr_t base = to_msm_gpummu(mmu)-&gt;pt_base;</div><div class='add'>+	dma_addr_t base = to_a2xx_gpummu(mmu)-&gt;pt_base;</div><div class='ctx'> </div><div class='ctx'> 	*pt_base = base;</div><div class='ctx'> 	*tran_error = base + TABLE_SIZE; /* 32-byte aligned */</div><div class='head'>diff --git a/drivers/gpu/drm/msm/adreno/a3xx.xml.h b/drivers/gpu/drm/msm/adreno/a3xx.xml.h<br/>deleted file mode 100644<br/>index 5edd740ad3bb..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a3xx.xml.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a3xx.xml.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3268 +0,0 @@</div><div class='del'>-#ifndef A3XX_XML</div><div class='del'>-#define A3XX_XML</div><div class='del'>-</div><div class='del'>-/* Autogenerated file, DO NOT EDIT manually!</div><div class='del'>-</div><div class='del'>-This file was generated by the rules-ng-ng gen_header.py tool in this git repository:</div><div class='del'>-http://gitlab.freedesktop.org/mesa/mesa/</div><div class='del'>-git clone https://gitlab.freedesktop.org/mesa/mesa.git</div><div class='del'>-</div><div class='del'>-The rules-ng-ng source files this header was generated from are:</div><div class='del'>-</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a3xx.xml          (  84323 bytes, from Wed Aug 23 10:39:39 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml  (   1572 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_common.xml (  15434 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pm4.xml    (  85691 bytes, from Fri Feb 16 09:49:01 2024)</div><div class='del'>-</div><div class='del'>-Copyright (C) 2013-2024 by the following authors:</div><div class='del'>-- Rob Clark &lt;robdclark@gmail.com&gt; Rob Clark</div><div class='del'>-- Ilia Mirkin &lt;imirkin@alum.mit.edu&gt; Ilia Mirkin</div><div class='del'>-</div><div class='del'>-Permission is hereby granted, free of charge, to any person obtaining</div><div class='del'>-a copy of this software and associated documentation files (the</div><div class='del'>-"Software"), to deal in the Software without restriction, including</div><div class='del'>-without limitation the rights to use, copy, modify, merge, publish,</div><div class='del'>-distribute, sublicense, and/or sell copies of the Software, and to</div><div class='del'>-permit persons to whom the Software is furnished to do so, subject to</div><div class='del'>-the following conditions:</div><div class='del'>-</div><div class='del'>-The above copyright notice and this permission notice (including the</div><div class='del'>-next paragraph) shall be included in all copies or substantial</div><div class='del'>-portions of the Software.</div><div class='del'>-</div><div class='del'>-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='del'>-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.</div><div class='del'>-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE</div><div class='del'>-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION</div><div class='del'>-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION</div><div class='del'>-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#define assert(x) BUG_ON(!(x))</div><div class='del'>-#else</div><div class='del'>-#include &lt;assert.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#define __struct_cast(X)</div><div class='del'>-#else</div><div class='del'>-#define __struct_cast(X) (struct X)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum a3xx_tile_mode {</div><div class='del'>-	LINEAR = 0,</div><div class='del'>-	TILE_4X4 = 1,</div><div class='del'>-	TILE_32X32 = 2,</div><div class='del'>-	TILE_4X2 = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_state_block_id {</div><div class='del'>-	HLSQ_BLOCK_ID_TP_TEX = 2,</div><div class='del'>-	HLSQ_BLOCK_ID_TP_MIPMAP = 3,</div><div class='del'>-	HLSQ_BLOCK_ID_SP_VS = 4,</div><div class='del'>-	HLSQ_BLOCK_ID_SP_FS = 6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_cache_opcode {</div><div class='del'>-	INVALIDATE = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_vtx_fmt {</div><div class='del'>-	VFMT_32_FLOAT = 0,</div><div class='del'>-	VFMT_32_32_FLOAT = 1,</div><div class='del'>-	VFMT_32_32_32_FLOAT = 2,</div><div class='del'>-	VFMT_32_32_32_32_FLOAT = 3,</div><div class='del'>-	VFMT_16_FLOAT = 4,</div><div class='del'>-	VFMT_16_16_FLOAT = 5,</div><div class='del'>-	VFMT_16_16_16_FLOAT = 6,</div><div class='del'>-	VFMT_16_16_16_16_FLOAT = 7,</div><div class='del'>-	VFMT_32_FIXED = 8,</div><div class='del'>-	VFMT_32_32_FIXED = 9,</div><div class='del'>-	VFMT_32_32_32_FIXED = 10,</div><div class='del'>-	VFMT_32_32_32_32_FIXED = 11,</div><div class='del'>-	VFMT_16_SINT = 16,</div><div class='del'>-	VFMT_16_16_SINT = 17,</div><div class='del'>-	VFMT_16_16_16_SINT = 18,</div><div class='del'>-	VFMT_16_16_16_16_SINT = 19,</div><div class='del'>-	VFMT_16_UINT = 20,</div><div class='del'>-	VFMT_16_16_UINT = 21,</div><div class='del'>-	VFMT_16_16_16_UINT = 22,</div><div class='del'>-	VFMT_16_16_16_16_UINT = 23,</div><div class='del'>-	VFMT_16_SNORM = 24,</div><div class='del'>-	VFMT_16_16_SNORM = 25,</div><div class='del'>-	VFMT_16_16_16_SNORM = 26,</div><div class='del'>-	VFMT_16_16_16_16_SNORM = 27,</div><div class='del'>-	VFMT_16_UNORM = 28,</div><div class='del'>-	VFMT_16_16_UNORM = 29,</div><div class='del'>-	VFMT_16_16_16_UNORM = 30,</div><div class='del'>-	VFMT_16_16_16_16_UNORM = 31,</div><div class='del'>-	VFMT_32_UINT = 32,</div><div class='del'>-	VFMT_32_32_UINT = 33,</div><div class='del'>-	VFMT_32_32_32_UINT = 34,</div><div class='del'>-	VFMT_32_32_32_32_UINT = 35,</div><div class='del'>-	VFMT_32_SINT = 36,</div><div class='del'>-	VFMT_32_32_SINT = 37,</div><div class='del'>-	VFMT_32_32_32_SINT = 38,</div><div class='del'>-	VFMT_32_32_32_32_SINT = 39,</div><div class='del'>-	VFMT_8_UINT = 40,</div><div class='del'>-	VFMT_8_8_UINT = 41,</div><div class='del'>-	VFMT_8_8_8_UINT = 42,</div><div class='del'>-	VFMT_8_8_8_8_UINT = 43,</div><div class='del'>-	VFMT_8_UNORM = 44,</div><div class='del'>-	VFMT_8_8_UNORM = 45,</div><div class='del'>-	VFMT_8_8_8_UNORM = 46,</div><div class='del'>-	VFMT_8_8_8_8_UNORM = 47,</div><div class='del'>-	VFMT_8_SINT = 48,</div><div class='del'>-	VFMT_8_8_SINT = 49,</div><div class='del'>-	VFMT_8_8_8_SINT = 50,</div><div class='del'>-	VFMT_8_8_8_8_SINT = 51,</div><div class='del'>-	VFMT_8_SNORM = 52,</div><div class='del'>-	VFMT_8_8_SNORM = 53,</div><div class='del'>-	VFMT_8_8_8_SNORM = 54,</div><div class='del'>-	VFMT_8_8_8_8_SNORM = 55,</div><div class='del'>-	VFMT_10_10_10_2_UINT = 56,</div><div class='del'>-	VFMT_10_10_10_2_UNORM = 57,</div><div class='del'>-	VFMT_10_10_10_2_SINT = 58,</div><div class='del'>-	VFMT_10_10_10_2_SNORM = 59,</div><div class='del'>-	VFMT_2_10_10_10_UINT = 60,</div><div class='del'>-	VFMT_2_10_10_10_UNORM = 61,</div><div class='del'>-	VFMT_2_10_10_10_SINT = 62,</div><div class='del'>-	VFMT_2_10_10_10_SNORM = 63,</div><div class='del'>-	VFMT_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_fmt {</div><div class='del'>-	TFMT_5_6_5_UNORM = 4,</div><div class='del'>-	TFMT_5_5_5_1_UNORM = 5,</div><div class='del'>-	TFMT_4_4_4_4_UNORM = 7,</div><div class='del'>-	TFMT_Z16_UNORM = 9,</div><div class='del'>-	TFMT_X8Z24_UNORM = 10,</div><div class='del'>-	TFMT_Z32_FLOAT = 11,</div><div class='del'>-	TFMT_UV_64X32 = 16,</div><div class='del'>-	TFMT_VU_64X32 = 17,</div><div class='del'>-	TFMT_Y_64X32 = 18,</div><div class='del'>-	TFMT_NV12_64X32 = 19,</div><div class='del'>-	TFMT_UV_LINEAR = 20,</div><div class='del'>-	TFMT_VU_LINEAR = 21,</div><div class='del'>-	TFMT_Y_LINEAR = 22,</div><div class='del'>-	TFMT_NV12_LINEAR = 23,</div><div class='del'>-	TFMT_I420_Y = 24,</div><div class='del'>-	TFMT_I420_U = 26,</div><div class='del'>-	TFMT_I420_V = 27,</div><div class='del'>-	TFMT_ATC_RGB = 32,</div><div class='del'>-	TFMT_ATC_RGBA_EXPLICIT = 33,</div><div class='del'>-	TFMT_ETC1 = 34,</div><div class='del'>-	TFMT_ATC_RGBA_INTERPOLATED = 35,</div><div class='del'>-	TFMT_DXT1 = 36,</div><div class='del'>-	TFMT_DXT3 = 37,</div><div class='del'>-	TFMT_DXT5 = 38,</div><div class='del'>-	TFMT_2_10_10_10_UNORM = 40,</div><div class='del'>-	TFMT_10_10_10_2_UNORM = 41,</div><div class='del'>-	TFMT_9_9_9_E5_FLOAT = 42,</div><div class='del'>-	TFMT_11_11_10_FLOAT = 43,</div><div class='del'>-	TFMT_A8_UNORM = 44,</div><div class='del'>-	TFMT_L8_UNORM = 45,</div><div class='del'>-	TFMT_L8_A8_UNORM = 47,</div><div class='del'>-	TFMT_8_UNORM = 48,</div><div class='del'>-	TFMT_8_8_UNORM = 49,</div><div class='del'>-	TFMT_8_8_8_UNORM = 50,</div><div class='del'>-	TFMT_8_8_8_8_UNORM = 51,</div><div class='del'>-	TFMT_8_SNORM = 52,</div><div class='del'>-	TFMT_8_8_SNORM = 53,</div><div class='del'>-	TFMT_8_8_8_SNORM = 54,</div><div class='del'>-	TFMT_8_8_8_8_SNORM = 55,</div><div class='del'>-	TFMT_8_UINT = 56,</div><div class='del'>-	TFMT_8_8_UINT = 57,</div><div class='del'>-	TFMT_8_8_8_UINT = 58,</div><div class='del'>-	TFMT_8_8_8_8_UINT = 59,</div><div class='del'>-	TFMT_8_SINT = 60,</div><div class='del'>-	TFMT_8_8_SINT = 61,</div><div class='del'>-	TFMT_8_8_8_SINT = 62,</div><div class='del'>-	TFMT_8_8_8_8_SINT = 63,</div><div class='del'>-	TFMT_16_FLOAT = 64,</div><div class='del'>-	TFMT_16_16_FLOAT = 65,</div><div class='del'>-	TFMT_16_16_16_16_FLOAT = 67,</div><div class='del'>-	TFMT_16_UINT = 68,</div><div class='del'>-	TFMT_16_16_UINT = 69,</div><div class='del'>-	TFMT_16_16_16_16_UINT = 71,</div><div class='del'>-	TFMT_16_SINT = 72,</div><div class='del'>-	TFMT_16_16_SINT = 73,</div><div class='del'>-	TFMT_16_16_16_16_SINT = 75,</div><div class='del'>-	TFMT_16_UNORM = 76,</div><div class='del'>-	TFMT_16_16_UNORM = 77,</div><div class='del'>-	TFMT_16_16_16_16_UNORM = 79,</div><div class='del'>-	TFMT_16_SNORM = 80,</div><div class='del'>-	TFMT_16_16_SNORM = 81,</div><div class='del'>-	TFMT_16_16_16_16_SNORM = 83,</div><div class='del'>-	TFMT_32_FLOAT = 84,</div><div class='del'>-	TFMT_32_32_FLOAT = 85,</div><div class='del'>-	TFMT_32_32_32_32_FLOAT = 87,</div><div class='del'>-	TFMT_32_UINT = 88,</div><div class='del'>-	TFMT_32_32_UINT = 89,</div><div class='del'>-	TFMT_32_32_32_32_UINT = 91,</div><div class='del'>-	TFMT_32_SINT = 92,</div><div class='del'>-	TFMT_32_32_SINT = 93,</div><div class='del'>-	TFMT_32_32_32_32_SINT = 95,</div><div class='del'>-	TFMT_2_10_10_10_UINT = 96,</div><div class='del'>-	TFMT_10_10_10_2_UINT = 97,</div><div class='del'>-	TFMT_ETC2_RG11_SNORM = 112,</div><div class='del'>-	TFMT_ETC2_RG11_UNORM = 113,</div><div class='del'>-	TFMT_ETC2_R11_SNORM = 114,</div><div class='del'>-	TFMT_ETC2_R11_UNORM = 115,</div><div class='del'>-	TFMT_ETC2_RGBA8 = 116,</div><div class='del'>-	TFMT_ETC2_RGB8A1 = 117,</div><div class='del'>-	TFMT_ETC2_RGB8 = 118,</div><div class='del'>-	TFMT_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_color_fmt {</div><div class='del'>-	RB_R5G6B5_UNORM = 0,</div><div class='del'>-	RB_R5G5B5A1_UNORM = 1,</div><div class='del'>-	RB_R4G4B4A4_UNORM = 3,</div><div class='del'>-	RB_R8G8B8_UNORM = 4,</div><div class='del'>-	RB_R8G8B8A8_UNORM = 8,</div><div class='del'>-	RB_R8G8B8A8_SNORM = 9,</div><div class='del'>-	RB_R8G8B8A8_UINT = 10,</div><div class='del'>-	RB_R8G8B8A8_SINT = 11,</div><div class='del'>-	RB_R8G8_UNORM = 12,</div><div class='del'>-	RB_R8G8_SNORM = 13,</div><div class='del'>-	RB_R8G8_UINT = 14,</div><div class='del'>-	RB_R8G8_SINT = 15,</div><div class='del'>-	RB_R10G10B10A2_UNORM = 16,</div><div class='del'>-	RB_A2R10G10B10_UNORM = 17,</div><div class='del'>-	RB_R10G10B10A2_UINT = 18,</div><div class='del'>-	RB_A2R10G10B10_UINT = 19,</div><div class='del'>-	RB_A8_UNORM = 20,</div><div class='del'>-	RB_R8_UNORM = 21,</div><div class='del'>-	RB_R16_FLOAT = 24,</div><div class='del'>-	RB_R16G16_FLOAT = 25,</div><div class='del'>-	RB_R16G16B16A16_FLOAT = 27,</div><div class='del'>-	RB_R11G11B10_FLOAT = 28,</div><div class='del'>-	RB_R16_SNORM = 32,</div><div class='del'>-	RB_R16G16_SNORM = 33,</div><div class='del'>-	RB_R16G16B16A16_SNORM = 35,</div><div class='del'>-	RB_R16_UNORM = 36,</div><div class='del'>-	RB_R16G16_UNORM = 37,</div><div class='del'>-	RB_R16G16B16A16_UNORM = 39,</div><div class='del'>-	RB_R16_SINT = 40,</div><div class='del'>-	RB_R16G16_SINT = 41,</div><div class='del'>-	RB_R16G16B16A16_SINT = 43,</div><div class='del'>-	RB_R16_UINT = 44,</div><div class='del'>-	RB_R16G16_UINT = 45,</div><div class='del'>-	RB_R16G16B16A16_UINT = 47,</div><div class='del'>-	RB_R32_FLOAT = 48,</div><div class='del'>-	RB_R32G32_FLOAT = 49,</div><div class='del'>-	RB_R32G32B32A32_FLOAT = 51,</div><div class='del'>-	RB_R32_SINT = 52,</div><div class='del'>-	RB_R32G32_SINT = 53,</div><div class='del'>-	RB_R32G32B32A32_SINT = 55,</div><div class='del'>-	RB_R32_UINT = 56,</div><div class='del'>-	RB_R32G32_UINT = 57,</div><div class='del'>-	RB_R32G32B32A32_UINT = 59,</div><div class='del'>-	RB_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_cp_perfcounter_select {</div><div class='del'>-	CP_ALWAYS_COUNT = 0,</div><div class='del'>-	CP_AHB_PFPTRANS_WAIT = 3,</div><div class='del'>-	CP_AHB_NRTTRANS_WAIT = 6,</div><div class='del'>-	CP_CSF_NRT_READ_WAIT = 8,</div><div class='del'>-	CP_CSF_I1_FIFO_FULL = 9,</div><div class='del'>-	CP_CSF_I2_FIFO_FULL = 10,</div><div class='del'>-	CP_CSF_ST_FIFO_FULL = 11,</div><div class='del'>-	CP_RESERVED_12 = 12,</div><div class='del'>-	CP_CSF_RING_ROQ_FULL = 13,</div><div class='del'>-	CP_CSF_I1_ROQ_FULL = 14,</div><div class='del'>-	CP_CSF_I2_ROQ_FULL = 15,</div><div class='del'>-	CP_CSF_ST_ROQ_FULL = 16,</div><div class='del'>-	CP_RESERVED_17 = 17,</div><div class='del'>-	CP_MIU_TAG_MEM_FULL = 18,</div><div class='del'>-	CP_MIU_NRT_WRITE_STALLED = 22,</div><div class='del'>-	CP_MIU_NRT_READ_STALLED = 23,</div><div class='del'>-	CP_ME_REGS_RB_DONE_FIFO_FULL = 26,</div><div class='del'>-	CP_ME_REGS_VS_EVENT_FIFO_FULL = 27,</div><div class='del'>-	CP_ME_REGS_PS_EVENT_FIFO_FULL = 28,</div><div class='del'>-	CP_ME_REGS_CF_EVENT_FIFO_FULL = 29,</div><div class='del'>-	CP_ME_MICRO_RB_STARVED = 30,</div><div class='del'>-	CP_AHB_RBBM_DWORD_SENT = 40,</div><div class='del'>-	CP_ME_BUSY_CLOCKS = 41,</div><div class='del'>-	CP_ME_WAIT_CONTEXT_AVAIL = 42,</div><div class='del'>-	CP_PFP_TYPE0_PACKET = 43,</div><div class='del'>-	CP_PFP_TYPE3_PACKET = 44,</div><div class='del'>-	CP_CSF_RB_WPTR_NEQ_RPTR = 45,</div><div class='del'>-	CP_CSF_I1_SIZE_NEQ_ZERO = 46,</div><div class='del'>-	CP_CSF_I2_SIZE_NEQ_ZERO = 47,</div><div class='del'>-	CP_CSF_RBI1I2_FETCHING = 48,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_gras_tse_perfcounter_select {</div><div class='del'>-	GRAS_TSEPERF_INPUT_PRIM = 0,</div><div class='del'>-	GRAS_TSEPERF_INPUT_NULL_PRIM = 1,</div><div class='del'>-	GRAS_TSEPERF_TRIVAL_REJ_PRIM = 2,</div><div class='del'>-	GRAS_TSEPERF_CLIPPED_PRIM = 3,</div><div class='del'>-	GRAS_TSEPERF_NEW_PRIM = 4,</div><div class='del'>-	GRAS_TSEPERF_ZERO_AREA_PRIM = 5,</div><div class='del'>-	GRAS_TSEPERF_FACENESS_CULLED_PRIM = 6,</div><div class='del'>-	GRAS_TSEPERF_ZERO_PIXEL_PRIM = 7,</div><div class='del'>-	GRAS_TSEPERF_OUTPUT_NULL_PRIM = 8,</div><div class='del'>-	GRAS_TSEPERF_OUTPUT_VISIBLE_PRIM = 9,</div><div class='del'>-	GRAS_TSEPERF_PRE_CLIP_PRIM = 10,</div><div class='del'>-	GRAS_TSEPERF_POST_CLIP_PRIM = 11,</div><div class='del'>-	GRAS_TSEPERF_WORKING_CYCLES = 12,</div><div class='del'>-	GRAS_TSEPERF_PC_STARVE = 13,</div><div class='del'>-	GRAS_TSERASPERF_STALL = 14,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_gras_ras_perfcounter_select {</div><div class='del'>-	GRAS_RASPERF_16X16_TILES = 0,</div><div class='del'>-	GRAS_RASPERF_8X8_TILES = 1,</div><div class='del'>-	GRAS_RASPERF_4X4_TILES = 2,</div><div class='del'>-	GRAS_RASPERF_WORKING_CYCLES = 3,</div><div class='del'>-	GRAS_RASPERF_STALL_CYCLES_BY_RB = 4,</div><div class='del'>-	GRAS_RASPERF_STALL_CYCLES_BY_VSC = 5,</div><div class='del'>-	GRAS_RASPERF_STARVE_CYCLES_BY_TSE = 6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_hlsq_perfcounter_select {</div><div class='del'>-	HLSQ_PERF_SP_VS_CONSTANT = 0,</div><div class='del'>-	HLSQ_PERF_SP_VS_INSTRUCTIONS = 1,</div><div class='del'>-	HLSQ_PERF_SP_FS_CONSTANT = 2,</div><div class='del'>-	HLSQ_PERF_SP_FS_INSTRUCTIONS = 3,</div><div class='del'>-	HLSQ_PERF_TP_STATE = 4,</div><div class='del'>-	HLSQ_PERF_QUADS = 5,</div><div class='del'>-	HLSQ_PERF_PIXELS = 6,</div><div class='del'>-	HLSQ_PERF_VERTICES = 7,</div><div class='del'>-	HLSQ_PERF_FS8_THREADS = 8,</div><div class='del'>-	HLSQ_PERF_FS16_THREADS = 9,</div><div class='del'>-	HLSQ_PERF_FS32_THREADS = 10,</div><div class='del'>-	HLSQ_PERF_VS8_THREADS = 11,</div><div class='del'>-	HLSQ_PERF_VS16_THREADS = 12,</div><div class='del'>-	HLSQ_PERF_SP_VS_DATA_BYTES = 13,</div><div class='del'>-	HLSQ_PERF_SP_FS_DATA_BYTES = 14,</div><div class='del'>-	HLSQ_PERF_ACTIVE_CYCLES = 15,</div><div class='del'>-	HLSQ_PERF_STALL_CYCLES_SP_STATE = 16,</div><div class='del'>-	HLSQ_PERF_STALL_CYCLES_SP_VS = 17,</div><div class='del'>-	HLSQ_PERF_STALL_CYCLES_SP_FS = 18,</div><div class='del'>-	HLSQ_PERF_STALL_CYCLES_UCHE = 19,</div><div class='del'>-	HLSQ_PERF_RBBM_LOAD_CYCLES = 20,</div><div class='del'>-	HLSQ_PERF_DI_TO_VS_START_SP0 = 21,</div><div class='del'>-	HLSQ_PERF_DI_TO_FS_START_SP0 = 22,</div><div class='del'>-	HLSQ_PERF_VS_START_TO_DONE_SP0 = 23,</div><div class='del'>-	HLSQ_PERF_FS_START_TO_DONE_SP0 = 24,</div><div class='del'>-	HLSQ_PERF_SP_STATE_COPY_CYCLES_VS = 25,</div><div class='del'>-	HLSQ_PERF_SP_STATE_COPY_CYCLES_FS = 26,</div><div class='del'>-	HLSQ_PERF_UCHE_LATENCY_CYCLES = 27,</div><div class='del'>-	HLSQ_PERF_UCHE_LATENCY_COUNT = 28,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_pc_perfcounter_select {</div><div class='del'>-	PC_PCPERF_VISIBILITY_STREAMS = 0,</div><div class='del'>-	PC_PCPERF_TOTAL_INSTANCES = 1,</div><div class='del'>-	PC_PCPERF_PRIMITIVES_PC_VPC = 2,</div><div class='del'>-	PC_PCPERF_PRIMITIVES_KILLED_BY_VS = 3,</div><div class='del'>-	PC_PCPERF_PRIMITIVES_VISIBLE_BY_VS = 4,</div><div class='del'>-	PC_PCPERF_DRAWCALLS_KILLED_BY_VS = 5,</div><div class='del'>-	PC_PCPERF_DRAWCALLS_VISIBLE_BY_VS = 6,</div><div class='del'>-	PC_PCPERF_VERTICES_TO_VFD = 7,</div><div class='del'>-	PC_PCPERF_REUSED_VERTICES = 8,</div><div class='del'>-	PC_PCPERF_CYCLES_STALLED_BY_VFD = 9,</div><div class='del'>-	PC_PCPERF_CYCLES_STALLED_BY_TSE = 10,</div><div class='del'>-	PC_PCPERF_CYCLES_STALLED_BY_VBIF = 11,</div><div class='del'>-	PC_PCPERF_CYCLES_IS_WORKING = 12,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_rb_perfcounter_select {</div><div class='del'>-	RB_RBPERF_ACTIVE_CYCLES_ANY = 0,</div><div class='del'>-	RB_RBPERF_ACTIVE_CYCLES_ALL = 1,</div><div class='del'>-	RB_RBPERF_STARVE_CYCLES_BY_SP = 2,</div><div class='del'>-	RB_RBPERF_STARVE_CYCLES_BY_RAS = 3,</div><div class='del'>-	RB_RBPERF_STARVE_CYCLES_BY_MARB = 4,</div><div class='del'>-	RB_RBPERF_STALL_CYCLES_BY_MARB = 5,</div><div class='del'>-	RB_RBPERF_STALL_CYCLES_BY_HLSQ = 6,</div><div class='del'>-	RB_RBPERF_RB_MARB_DATA = 7,</div><div class='del'>-	RB_RBPERF_SP_RB_QUAD = 8,</div><div class='del'>-	RB_RBPERF_RAS_EARLY_Z_QUADS = 9,</div><div class='del'>-	RB_RBPERF_GMEM_CH0_READ = 10,</div><div class='del'>-	RB_RBPERF_GMEM_CH1_READ = 11,</div><div class='del'>-	RB_RBPERF_GMEM_CH0_WRITE = 12,</div><div class='del'>-	RB_RBPERF_GMEM_CH1_WRITE = 13,</div><div class='del'>-	RB_RBPERF_CP_CONTEXT_DONE = 14,</div><div class='del'>-	RB_RBPERF_CP_CACHE_FLUSH = 15,</div><div class='del'>-	RB_RBPERF_CP_ZPASS_DONE = 16,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_rbbm_perfcounter_select {</div><div class='del'>-	RBBM_ALAWYS_ON = 0,</div><div class='del'>-	RBBM_VBIF_BUSY = 1,</div><div class='del'>-	RBBM_TSE_BUSY = 2,</div><div class='del'>-	RBBM_RAS_BUSY = 3,</div><div class='del'>-	RBBM_PC_DCALL_BUSY = 4,</div><div class='del'>-	RBBM_PC_VSD_BUSY = 5,</div><div class='del'>-	RBBM_VFD_BUSY = 6,</div><div class='del'>-	RBBM_VPC_BUSY = 7,</div><div class='del'>-	RBBM_UCHE_BUSY = 8,</div><div class='del'>-	RBBM_VSC_BUSY = 9,</div><div class='del'>-	RBBM_HLSQ_BUSY = 10,</div><div class='del'>-	RBBM_ANY_RB_BUSY = 11,</div><div class='del'>-	RBBM_ANY_TEX_BUSY = 12,</div><div class='del'>-	RBBM_ANY_USP_BUSY = 13,</div><div class='del'>-	RBBM_ANY_MARB_BUSY = 14,</div><div class='del'>-	RBBM_ANY_ARB_BUSY = 15,</div><div class='del'>-	RBBM_AHB_STATUS_BUSY = 16,</div><div class='del'>-	RBBM_AHB_STATUS_STALLED = 17,</div><div class='del'>-	RBBM_AHB_STATUS_TXFR = 18,</div><div class='del'>-	RBBM_AHB_STATUS_TXFR_SPLIT = 19,</div><div class='del'>-	RBBM_AHB_STATUS_TXFR_ERROR = 20,</div><div class='del'>-	RBBM_AHB_STATUS_LONG_STALL = 21,</div><div class='del'>-	RBBM_RBBM_STATUS_MASKED = 22,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_sp_perfcounter_select {</div><div class='del'>-	SP_LM_LOAD_INSTRUCTIONS = 0,</div><div class='del'>-	SP_LM_STORE_INSTRUCTIONS = 1,</div><div class='del'>-	SP_LM_ATOMICS = 2,</div><div class='del'>-	SP_UCHE_LOAD_INSTRUCTIONS = 3,</div><div class='del'>-	SP_UCHE_STORE_INSTRUCTIONS = 4,</div><div class='del'>-	SP_UCHE_ATOMICS = 5,</div><div class='del'>-	SP_VS_TEX_INSTRUCTIONS = 6,</div><div class='del'>-	SP_VS_CFLOW_INSTRUCTIONS = 7,</div><div class='del'>-	SP_VS_EFU_INSTRUCTIONS = 8,</div><div class='del'>-	SP_VS_FULL_ALU_INSTRUCTIONS = 9,</div><div class='del'>-	SP_VS_HALF_ALU_INSTRUCTIONS = 10,</div><div class='del'>-	SP_FS_TEX_INSTRUCTIONS = 11,</div><div class='del'>-	SP_FS_CFLOW_INSTRUCTIONS = 12,</div><div class='del'>-	SP_FS_EFU_INSTRUCTIONS = 13,</div><div class='del'>-	SP_FS_FULL_ALU_INSTRUCTIONS = 14,</div><div class='del'>-	SP_FS_HALF_ALU_INSTRUCTIONS = 15,</div><div class='del'>-	SP_FS_BARY_INSTRUCTIONS = 16,</div><div class='del'>-	SP_VS_INSTRUCTIONS = 17,</div><div class='del'>-	SP_FS_INSTRUCTIONS = 18,</div><div class='del'>-	SP_ADDR_LOCK_COUNT = 19,</div><div class='del'>-	SP_UCHE_READ_TRANS = 20,</div><div class='del'>-	SP_UCHE_WRITE_TRANS = 21,</div><div class='del'>-	SP_EXPORT_VPC_TRANS = 22,</div><div class='del'>-	SP_EXPORT_RB_TRANS = 23,</div><div class='del'>-	SP_PIXELS_KILLED = 24,</div><div class='del'>-	SP_ICL1_REQUESTS = 25,</div><div class='del'>-	SP_ICL1_MISSES = 26,</div><div class='del'>-	SP_ICL0_REQUESTS = 27,</div><div class='del'>-	SP_ICL0_MISSES = 28,</div><div class='del'>-	SP_ALU_ACTIVE_CYCLES = 29,</div><div class='del'>-	SP_EFU_ACTIVE_CYCLES = 30,</div><div class='del'>-	SP_STALL_CYCLES_BY_VPC = 31,</div><div class='del'>-	SP_STALL_CYCLES_BY_TP = 32,</div><div class='del'>-	SP_STALL_CYCLES_BY_UCHE = 33,</div><div class='del'>-	SP_STALL_CYCLES_BY_RB = 34,</div><div class='del'>-	SP_ACTIVE_CYCLES_ANY = 35,</div><div class='del'>-	SP_ACTIVE_CYCLES_ALL = 36,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tp_perfcounter_select {</div><div class='del'>-	TPL1_TPPERF_L1_REQUESTS = 0,</div><div class='del'>-	TPL1_TPPERF_TP0_L1_REQUESTS = 1,</div><div class='del'>-	TPL1_TPPERF_TP0_L1_MISSES = 2,</div><div class='del'>-	TPL1_TPPERF_TP1_L1_REQUESTS = 3,</div><div class='del'>-	TPL1_TPPERF_TP1_L1_MISSES = 4,</div><div class='del'>-	TPL1_TPPERF_TP2_L1_REQUESTS = 5,</div><div class='del'>-	TPL1_TPPERF_TP2_L1_MISSES = 6,</div><div class='del'>-	TPL1_TPPERF_TP3_L1_REQUESTS = 7,</div><div class='del'>-	TPL1_TPPERF_TP3_L1_MISSES = 8,</div><div class='del'>-	TPL1_TPPERF_OUTPUT_TEXELS_POINT = 9,</div><div class='del'>-	TPL1_TPPERF_OUTPUT_TEXELS_BILINEAR = 10,</div><div class='del'>-	TPL1_TPPERF_OUTPUT_TEXELS_MIP = 11,</div><div class='del'>-	TPL1_TPPERF_OUTPUT_TEXELS_ANISO = 12,</div><div class='del'>-	TPL1_TPPERF_BILINEAR_OPS = 13,</div><div class='del'>-	TPL1_TPPERF_QUADSQUADS_OFFSET = 14,</div><div class='del'>-	TPL1_TPPERF_QUADQUADS_SHADOW = 15,</div><div class='del'>-	TPL1_TPPERF_QUADS_ARRAY = 16,</div><div class='del'>-	TPL1_TPPERF_QUADS_PROJECTION = 17,</div><div class='del'>-	TPL1_TPPERF_QUADS_GRADIENT = 18,</div><div class='del'>-	TPL1_TPPERF_QUADS_1D2D = 19,</div><div class='del'>-	TPL1_TPPERF_QUADS_3DCUBE = 20,</div><div class='del'>-	TPL1_TPPERF_ZERO_LOD = 21,</div><div class='del'>-	TPL1_TPPERF_OUTPUT_TEXELS = 22,</div><div class='del'>-	TPL1_TPPERF_ACTIVE_CYCLES_ANY = 23,</div><div class='del'>-	TPL1_TPPERF_ACTIVE_CYCLES_ALL = 24,</div><div class='del'>-	TPL1_TPPERF_STALL_CYCLES_BY_ARB = 25,</div><div class='del'>-	TPL1_TPPERF_LATENCY = 26,</div><div class='del'>-	TPL1_TPPERF_LATENCY_TRANS = 27,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_vfd_perfcounter_select {</div><div class='del'>-	VFD_PERF_UCHE_BYTE_FETCHED = 0,</div><div class='del'>-	VFD_PERF_UCHE_TRANS = 1,</div><div class='del'>-	VFD_PERF_VPC_BYPASS_COMPONENTS = 2,</div><div class='del'>-	VFD_PERF_FETCH_INSTRUCTIONS = 3,</div><div class='del'>-	VFD_PERF_DECODE_INSTRUCTIONS = 4,</div><div class='del'>-	VFD_PERF_ACTIVE_CYCLES = 5,</div><div class='del'>-	VFD_PERF_STALL_CYCLES_UCHE = 6,</div><div class='del'>-	VFD_PERF_STALL_CYCLES_HLSQ = 7,</div><div class='del'>-	VFD_PERF_STALL_CYCLES_VPC_BYPASS = 8,</div><div class='del'>-	VFD_PERF_STALL_CYCLES_VPC_ALLOC = 9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_vpc_perfcounter_select {</div><div class='del'>-	VPC_PERF_SP_LM_PRIMITIVES = 0,</div><div class='del'>-	VPC_PERF_COMPONENTS_FROM_SP = 1,</div><div class='del'>-	VPC_PERF_SP_LM_COMPONENTS = 2,</div><div class='del'>-	VPC_PERF_ACTIVE_CYCLES = 3,</div><div class='del'>-	VPC_PERF_STALL_CYCLES_LM = 4,</div><div class='del'>-	VPC_PERF_STALL_CYCLES_RAS = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_uche_perfcounter_select {</div><div class='del'>-	UCHE_UCHEPERF_VBIF_READ_BEATS_TP = 0,</div><div class='del'>-	UCHE_UCHEPERF_VBIF_READ_BEATS_VFD = 1,</div><div class='del'>-	UCHE_UCHEPERF_VBIF_READ_BEATS_HLSQ = 2,</div><div class='del'>-	UCHE_UCHEPERF_VBIF_READ_BEATS_MARB = 3,</div><div class='del'>-	UCHE_UCHEPERF_VBIF_READ_BEATS_SP = 4,</div><div class='del'>-	UCHE_UCHEPERF_READ_REQUESTS_TP = 8,</div><div class='del'>-	UCHE_UCHEPERF_READ_REQUESTS_VFD = 9,</div><div class='del'>-	UCHE_UCHEPERF_READ_REQUESTS_HLSQ = 10,</div><div class='del'>-	UCHE_UCHEPERF_READ_REQUESTS_MARB = 11,</div><div class='del'>-	UCHE_UCHEPERF_READ_REQUESTS_SP = 12,</div><div class='del'>-	UCHE_UCHEPERF_WRITE_REQUESTS_MARB = 13,</div><div class='del'>-	UCHE_UCHEPERF_WRITE_REQUESTS_SP = 14,</div><div class='del'>-	UCHE_UCHEPERF_TAG_CHECK_FAILS = 15,</div><div class='del'>-	UCHE_UCHEPERF_EVICTS = 16,</div><div class='del'>-	UCHE_UCHEPERF_FLUSHES = 17,</div><div class='del'>-	UCHE_UCHEPERF_VBIF_LATENCY_CYCLES = 18,</div><div class='del'>-	UCHE_UCHEPERF_VBIF_LATENCY_SAMPLES = 19,</div><div class='del'>-	UCHE_UCHEPERF_ACTIVE_CYCLES = 20,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_intp_mode {</div><div class='del'>-	SMOOTH = 0,</div><div class='del'>-	FLAT = 1,</div><div class='del'>-	ZERO = 2,</div><div class='del'>-	ONE = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_repl_mode {</div><div class='del'>-	S = 1,</div><div class='del'>-	T = 2,</div><div class='del'>-	ONE_T = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_filter {</div><div class='del'>-	A3XX_TEX_NEAREST = 0,</div><div class='del'>-	A3XX_TEX_LINEAR = 1,</div><div class='del'>-	A3XX_TEX_ANISO = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_clamp {</div><div class='del'>-	A3XX_TEX_REPEAT = 0,</div><div class='del'>-	A3XX_TEX_CLAMP_TO_EDGE = 1,</div><div class='del'>-	A3XX_TEX_MIRROR_REPEAT = 2,</div><div class='del'>-	A3XX_TEX_CLAMP_TO_BORDER = 3,</div><div class='del'>-	A3XX_TEX_MIRROR_CLAMP = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_aniso {</div><div class='del'>-	A3XX_TEX_ANISO_1 = 0,</div><div class='del'>-	A3XX_TEX_ANISO_2 = 1,</div><div class='del'>-	A3XX_TEX_ANISO_4 = 2,</div><div class='del'>-	A3XX_TEX_ANISO_8 = 3,</div><div class='del'>-	A3XX_TEX_ANISO_16 = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_swiz {</div><div class='del'>-	A3XX_TEX_X = 0,</div><div class='del'>-	A3XX_TEX_Y = 1,</div><div class='del'>-	A3XX_TEX_Z = 2,</div><div class='del'>-	A3XX_TEX_W = 3,</div><div class='del'>-	A3XX_TEX_ZERO = 4,</div><div class='del'>-	A3XX_TEX_ONE = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_type {</div><div class='del'>-	A3XX_TEX_1D = 0,</div><div class='del'>-	A3XX_TEX_2D = 1,</div><div class='del'>-	A3XX_TEX_CUBE = 2,</div><div class='del'>-	A3XX_TEX_3D = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a3xx_tex_msaa {</div><div class='del'>-	A3XX_TPL1_MSAA1X = 0,</div><div class='del'>-	A3XX_TPL1_MSAA2X = 1,</div><div class='del'>-	A3XX_TPL1_MSAA4X = 2,</div><div class='del'>-	A3XX_TPL1_MSAA8X = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define A3XX_INT0_RBBM_GPU_IDLE					0x00000001</div><div class='del'>-#define A3XX_INT0_RBBM_AHB_ERROR				0x00000002</div><div class='del'>-#define A3XX_INT0_RBBM_REG_TIMEOUT				0x00000004</div><div class='del'>-#define A3XX_INT0_RBBM_ME_MS_TIMEOUT				0x00000008</div><div class='del'>-#define A3XX_INT0_RBBM_PFP_MS_TIMEOUT				0x00000010</div><div class='del'>-#define A3XX_INT0_RBBM_ATB_BUS_OVERFLOW				0x00000020</div><div class='del'>-#define A3XX_INT0_VFD_ERROR					0x00000040</div><div class='del'>-#define A3XX_INT0_CP_SW_INT					0x00000080</div><div class='del'>-#define A3XX_INT0_CP_T0_PACKET_IN_IB				0x00000100</div><div class='del'>-#define A3XX_INT0_CP_OPCODE_ERROR				0x00000200</div><div class='del'>-#define A3XX_INT0_CP_RESERVED_BIT_ERROR				0x00000400</div><div class='del'>-#define A3XX_INT0_CP_HW_FAULT					0x00000800</div><div class='del'>-#define A3XX_INT0_CP_DMA					0x00001000</div><div class='del'>-#define A3XX_INT0_CP_IB2_INT					0x00002000</div><div class='del'>-#define A3XX_INT0_CP_IB1_INT					0x00004000</div><div class='del'>-#define A3XX_INT0_CP_RB_INT					0x00008000</div><div class='del'>-#define A3XX_INT0_CP_REG_PROTECT_FAULT				0x00010000</div><div class='del'>-#define A3XX_INT0_CP_RB_DONE_TS					0x00020000</div><div class='del'>-#define A3XX_INT0_CP_VS_DONE_TS					0x00040000</div><div class='del'>-#define A3XX_INT0_CP_PS_DONE_TS					0x00080000</div><div class='del'>-#define A3XX_INT0_CACHE_FLUSH_TS				0x00100000</div><div class='del'>-#define A3XX_INT0_CP_AHB_ERROR_HALT				0x00200000</div><div class='del'>-#define A3XX_INT0_MISC_HANG_DETECT				0x01000000</div><div class='del'>-#define A3XX_INT0_UCHE_OOB_ACCESS				0x02000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_HW_VERSION				0x00000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_HW_RELEASE				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_HW_CONFIGURATION				0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_CLOCK_CTL					0x00000010</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_SP_HYST_CNT				0x00000012</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_SW_RESET_CMD				0x00000018</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_AHB_CTL0					0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_AHB_CTL1					0x00000021</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_AHB_CMD					0x00000022</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_AHB_ERROR_STATUS				0x00000027</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_GPR0_CTL					0x0000002e</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_STATUS					0x00000030</div><div class='del'>-#define A3XX_RBBM_STATUS_HI_BUSY				0x00000001</div><div class='del'>-#define A3XX_RBBM_STATUS_CP_ME_BUSY				0x00000002</div><div class='del'>-#define A3XX_RBBM_STATUS_CP_PFP_BUSY				0x00000004</div><div class='del'>-#define A3XX_RBBM_STATUS_CP_NRT_BUSY				0x00004000</div><div class='del'>-#define A3XX_RBBM_STATUS_VBIF_BUSY				0x00008000</div><div class='del'>-#define A3XX_RBBM_STATUS_TSE_BUSY				0x00010000</div><div class='del'>-#define A3XX_RBBM_STATUS_RAS_BUSY				0x00020000</div><div class='del'>-#define A3XX_RBBM_STATUS_RB_BUSY				0x00040000</div><div class='del'>-#define A3XX_RBBM_STATUS_PC_DCALL_BUSY				0x00080000</div><div class='del'>-#define A3XX_RBBM_STATUS_PC_VSD_BUSY				0x00100000</div><div class='del'>-#define A3XX_RBBM_STATUS_VFD_BUSY				0x00200000</div><div class='del'>-#define A3XX_RBBM_STATUS_VPC_BUSY				0x00400000</div><div class='del'>-#define A3XX_RBBM_STATUS_UCHE_BUSY				0x00800000</div><div class='del'>-#define A3XX_RBBM_STATUS_SP_BUSY				0x01000000</div><div class='del'>-#define A3XX_RBBM_STATUS_TPL1_BUSY				0x02000000</div><div class='del'>-#define A3XX_RBBM_STATUS_MARB_BUSY				0x04000000</div><div class='del'>-#define A3XX_RBBM_STATUS_VSC_BUSY				0x08000000</div><div class='del'>-#define A3XX_RBBM_STATUS_ARB_BUSY				0x10000000</div><div class='del'>-#define A3XX_RBBM_STATUS_HLSQ_BUSY				0x20000000</div><div class='del'>-#define A3XX_RBBM_STATUS_GPU_BUSY_NOHC				0x40000000</div><div class='del'>-#define A3XX_RBBM_STATUS_GPU_BUSY				0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_NQWAIT_UNTIL				0x00000040</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_WAIT_IDLE_CLOCKS_CTL			0x00000033</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_INTERFACE_HANG_INT_CTL			0x00000050</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_INTERFACE_HANG_MASK_CTL0			0x00000051</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_INTERFACE_HANG_MASK_CTL1			0x00000054</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_INTERFACE_HANG_MASK_CTL2			0x00000057</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_INTERFACE_HANG_MASK_CTL3			0x0000005a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_INT_SET_CMD				0x00000060</div><div class='del'>-#define REG_A3XX_RBBM_INT_CLEAR_CMD				0x00000061</div><div class='del'>-#define REG_A3XX_RBBM_INT_0_MASK				0x00000063</div><div class='del'>-#define REG_A3XX_RBBM_INT_0_STATUS				0x00000064</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_CTL				0x00000080</div><div class='del'>-#define A3XX_RBBM_PERFCTR_CTL_ENABLE				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_LOAD_CMD0				0x00000081</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_LOAD_CMD1				0x00000082</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_LOAD_VALUE_LO			0x00000084</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_LOAD_VALUE_HI			0x00000085</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCOUNTER0_SELECT			0x00000086</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCOUNTER1_SELECT			0x00000087</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_GPU_BUSY_MASKED				0x00000088</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_CP_0_LO				0x00000090</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_CP_0_HI				0x00000091</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RBBM_0_LO				0x00000092</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RBBM_0_HI				0x00000093</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RBBM_1_LO				0x00000094</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RBBM_1_HI				0x00000095</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_0_LO				0x00000096</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_0_HI				0x00000097</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_1_LO				0x00000098</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_1_HI				0x00000099</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_2_LO				0x0000009a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_2_HI				0x0000009b</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_3_LO				0x0000009c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PC_3_HI				0x0000009d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VFD_0_LO				0x0000009e</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VFD_0_HI				0x0000009f</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VFD_1_LO				0x000000a0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VFD_1_HI				0x000000a1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_0_LO				0x000000a2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_0_HI				0x000000a3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_1_LO				0x000000a4</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_1_HI				0x000000a5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_2_LO				0x000000a6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_2_HI				0x000000a7</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_3_LO				0x000000a8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_3_HI				0x000000a9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_4_LO				0x000000aa</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_4_HI				0x000000ab</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_5_LO				0x000000ac</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_HLSQ_5_HI				0x000000ad</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VPC_0_LO				0x000000ae</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VPC_0_HI				0x000000af</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VPC_1_LO				0x000000b0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_VPC_1_HI				0x000000b1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TSE_0_LO				0x000000b2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TSE_0_HI				0x000000b3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TSE_1_LO				0x000000b4</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TSE_1_HI				0x000000b5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RAS_0_LO				0x000000b6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RAS_0_HI				0x000000b7</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RAS_1_LO				0x000000b8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RAS_1_HI				0x000000b9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_0_LO				0x000000ba</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_0_HI				0x000000bb</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_1_LO				0x000000bc</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_1_HI				0x000000bd</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_2_LO				0x000000be</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_2_HI				0x000000bf</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_3_LO				0x000000c0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_3_HI				0x000000c1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_4_LO				0x000000c2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_4_HI				0x000000c3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_5_LO				0x000000c4</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_UCHE_5_HI				0x000000c5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_0_LO				0x000000c6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_0_HI				0x000000c7</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_1_LO				0x000000c8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_1_HI				0x000000c9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_2_LO				0x000000ca</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_2_HI				0x000000cb</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_3_LO				0x000000cc</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_3_HI				0x000000cd</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_4_LO				0x000000ce</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_4_HI				0x000000cf</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_5_LO				0x000000d0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_TP_5_HI				0x000000d1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_0_LO				0x000000d2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_0_HI				0x000000d3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_1_LO				0x000000d4</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_1_HI				0x000000d5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_2_LO				0x000000d6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_2_HI				0x000000d7</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_3_LO				0x000000d8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_3_HI				0x000000d9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_4_LO				0x000000da</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_4_HI				0x000000db</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_5_LO				0x000000dc</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_5_HI				0x000000dd</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_6_LO				0x000000de</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_6_HI				0x000000df</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_7_LO				0x000000e0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_SP_7_HI				0x000000e1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RB_0_LO				0x000000e2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RB_0_HI				0x000000e3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RB_1_LO				0x000000e4</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_RB_1_HI				0x000000e5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PWR_0_LO				0x000000ea</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PWR_0_HI				0x000000eb</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PWR_1_LO				0x000000ec</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PERFCTR_PWR_1_HI				0x000000ed</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_RBBM_CTL					0x00000100</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_DEBUG_BUS_CTL				0x00000111</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_DEBUG_BUS_DATA_STATUS			0x00000112</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_PFP_UCODE_ADDR				0x000001c9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_PFP_UCODE_DATA				0x000001ca</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_ROQ_ADDR					0x000001cc</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_ROQ_DATA					0x000001cd</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_MERCIU_ADDR					0x000001d1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_MERCIU_DATA					0x000001d2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_MERCIU_DATA2				0x000001d3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_MEQ_ADDR					0x000001da</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_MEQ_DATA					0x000001db</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_WFI_PEND_CTR				0x000001f5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RBBM_PM_OVERRIDE2				0x0000039d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_PERFCOUNTER_SELECT				0x00000445</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_HW_FAULT					0x0000045c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_PROTECT_CTRL				0x0000045e</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_PROTECT_STATUS				0x0000045f</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_PROTECT(i0) (0x00000460 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000460 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_CP_AHB_FAULT					0x0000054d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SQ_GPR_MANAGEMENT				0x00000d00</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SQ_INST_STORE_MANAGMENT			0x00000d02</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP0_CHICKEN					0x00000e1e</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_GLOBAL_MEM_SIZE				0x00000e22</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_GLOBAL_MEM_ADDR				0x00000e23</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_CLIP_CNTL				0x00002040</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_IJ_PERSP_CENTER			0x00001000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_IJ_NON_PERSP_CENTER		0x00002000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_IJ_PERSP_CENTROID		0x00004000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_IJ_NON_PERSP_CENTROID		0x00008000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_CLIP_DISABLE			0x00010000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_ZFAR_CLIP_DISABLE		0x00020000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_VP_CLIP_CODE_IGNORE		0x00080000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_VP_XFORM_DISABLE			0x00100000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_PERSP_DIVISION_DISABLE		0x00200000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_ZERO_GB_SCALE_Z			0x00400000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_ZCOORD				0x00800000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_WCOORD				0x01000000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_ZCLIP_DISABLE			0x02000000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__MASK	0x1c000000</div><div class='del'>-#define A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__SHIFT	26</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__SHIFT) &amp; A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_GB_CLIP_ADJ				0x00002044</div><div class='del'>-#define A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK			0x000003ff</div><div class='del'>-#define A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) &amp; A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK			0x000ffc00</div><div class='del'>-#define A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT			10</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) &amp; A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_VPORT_XOFFSET				0x00002048</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_XOFFSET__MASK			0xffffffff</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_XOFFSET__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A3XX_GRAS_CL_VPORT_XOFFSET__SHIFT) &amp; A3XX_GRAS_CL_VPORT_XOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_VPORT_XSCALE				0x00002049</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_XSCALE__MASK				0xffffffff</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_XSCALE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A3XX_GRAS_CL_VPORT_XSCALE__SHIFT) &amp; A3XX_GRAS_CL_VPORT_XSCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_VPORT_YOFFSET				0x0000204a</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_YOFFSET__MASK			0xffffffff</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_YOFFSET__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A3XX_GRAS_CL_VPORT_YOFFSET__SHIFT) &amp; A3XX_GRAS_CL_VPORT_YOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_VPORT_YSCALE				0x0000204b</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_YSCALE__MASK				0xffffffff</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_YSCALE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A3XX_GRAS_CL_VPORT_YSCALE__SHIFT) &amp; A3XX_GRAS_CL_VPORT_YSCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_VPORT_ZOFFSET				0x0000204c</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_ZOFFSET__MASK			0xffffffff</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_ZOFFSET__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A3XX_GRAS_CL_VPORT_ZOFFSET__SHIFT) &amp; A3XX_GRAS_CL_VPORT_ZOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_VPORT_ZSCALE				0x0000204d</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_ZSCALE__MASK				0xffffffff</div><div class='del'>-#define A3XX_GRAS_CL_VPORT_ZSCALE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A3XX_GRAS_CL_VPORT_ZSCALE__SHIFT) &amp; A3XX_GRAS_CL_VPORT_ZSCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SU_POINT_MINMAX				0x00002068</div><div class='del'>-#define A3XX_GRAS_SU_POINT_MINMAX_MIN__MASK			0x0000ffff</div><div class='del'>-#define A3XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A3XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) &amp; A3XX_GRAS_SU_POINT_MINMAX_MIN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SU_POINT_MINMAX_MAX__MASK			0xffff0000</div><div class='del'>-#define A3XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MAX(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A3XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) &amp; A3XX_GRAS_SU_POINT_MINMAX_MAX__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SU_POINT_SIZE				0x00002069</div><div class='del'>-#define A3XX_GRAS_SU_POINT_SIZE__MASK				0xffffffff</div><div class='del'>-#define A3XX_GRAS_SU_POINT_SIZE__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SU_POINT_SIZE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 16.0))) &lt;&lt; A3XX_GRAS_SU_POINT_SIZE__SHIFT) &amp; A3XX_GRAS_SU_POINT_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SU_POLY_OFFSET_SCALE			0x0000206c</div><div class='del'>-#define A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL__MASK		0x00ffffff</div><div class='del'>-#define A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 1048576.0))) &lt;&lt; A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL__SHIFT) &amp; A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SU_POLY_OFFSET_OFFSET			0x0000206d</div><div class='del'>-#define A3XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK			0xffffffff</div><div class='del'>-#define A3XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 64.0))) &lt;&lt; A3XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) &amp; A3XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SU_MODE_CONTROL				0x00002070</div><div class='del'>-#define A3XX_GRAS_SU_MODE_CONTROL_CULL_FRONT			0x00000001</div><div class='del'>-#define A3XX_GRAS_SU_MODE_CONTROL_CULL_BACK			0x00000002</div><div class='del'>-#define A3XX_GRAS_SU_MODE_CONTROL_FRONT_CW			0x00000004</div><div class='del'>-#define A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__MASK		0x000007f8</div><div class='del'>-#define A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT		3</div><div class='del'>-static inline uint32_t A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 4.0))) &lt;&lt; A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) &amp; A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SU_MODE_CONTROL_POLY_OFFSET			0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SC_CONTROL				0x00002072</div><div class='del'>-#define A3XX_GRAS_SC_CONTROL_RENDER_MODE__MASK			0x000000f0</div><div class='del'>-#define A3XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) &amp; A3XX_GRAS_SC_CONTROL_RENDER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MASK			0x00000f00</div><div class='del'>-#define A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT		8</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) &amp; A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SC_CONTROL_RASTER_MODE__MASK			0x0000f000</div><div class='del'>-#define A3XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT			12</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) &amp; A3XX_GRAS_SC_CONTROL_RASTER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SC_SCREEN_SCISSOR_TL			0x00002074</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) &amp; A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) &amp; A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SC_SCREEN_SCISSOR_BR			0x00002075</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) &amp; A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) &amp; A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SC_WINDOW_SCISSOR_TL			0x00002079</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) &amp; A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) &amp; A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_SC_WINDOW_SCISSOR_BR			0x0000207a</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) &amp; A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) &amp; A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_MODE_CONTROL				0x000020c0</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_GMEM_BYPASS			0x00000080</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_RENDER_MODE__MASK			0x00000700</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_RENDER_MODE__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_RB_MODE_CONTROL_RENDER_MODE(enum a3xx_render_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MODE_CONTROL_RENDER_MODE__SHIFT) &amp; A3XX_RB_MODE_CONTROL_RENDER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_MRT__MASK				0x00003000</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_MRT__SHIFT				12</div><div class='del'>-static inline uint32_t A3XX_RB_MODE_CONTROL_MRT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MODE_CONTROL_MRT__SHIFT) &amp; A3XX_RB_MODE_CONTROL_MRT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE		0x00008000</div><div class='del'>-#define A3XX_RB_MODE_CONTROL_PACKER_TIMER_ENABLE		0x00010000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_RENDER_CONTROL				0x000020c1</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_DUAL_COLOR_IN_ENABLE		0x00000001</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_YUV_IN_ENABLE			0x00000002</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_COV_VALUE_INPUT_ENABLE		0x00000004</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_FACENESS				0x00000008</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_BIN_WIDTH__MASK			0x00000ff0</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_BIN_WIDTH__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_RB_RENDER_CONTROL_BIN_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_RB_RENDER_CONTROL_BIN_WIDTH__SHIFT) &amp; A3XX_RB_RENDER_CONTROL_BIN_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE		0x00001000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_ENABLE_GMEM			0x00002000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_COORD_MASK__MASK			0x0003c000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_COORD_MASK__SHIFT		14</div><div class='del'>-static inline uint32_t A3XX_RB_RENDER_CONTROL_COORD_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_RENDER_CONTROL_COORD_MASK__SHIFT) &amp; A3XX_RB_RENDER_CONTROL_COORD_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_I_CLAMP_ENABLE			0x00080000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_COV_VALUE_OUTPUT_ENABLE		0x00100000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_ALPHA_TEST			0x00400000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__MASK		0x07000000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__SHIFT) &amp; A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_ALPHA_TO_COVERAGE		0x40000000</div><div class='del'>-#define A3XX_RB_RENDER_CONTROL_ALPHA_TO_ONE			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_MSAA_CONTROL				0x000020c2</div><div class='del'>-#define A3XX_RB_MSAA_CONTROL_DISABLE				0x00000400</div><div class='del'>-#define A3XX_RB_MSAA_CONTROL_SAMPLES__MASK			0x0000f000</div><div class='del'>-#define A3XX_RB_MSAA_CONTROL_SAMPLES__SHIFT			12</div><div class='del'>-static inline uint32_t A3XX_RB_MSAA_CONTROL_SAMPLES(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) &amp; A3XX_RB_MSAA_CONTROL_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__MASK			0xffff0000</div><div class='del'>-#define A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_RB_MSAA_CONTROL_SAMPLE_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__SHIFT) &amp; A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_ALPHA_REF					0x000020c3</div><div class='del'>-#define A3XX_RB_ALPHA_REF_UINT__MASK				0x0000ff00</div><div class='del'>-#define A3XX_RB_ALPHA_REF_UINT__SHIFT				8</div><div class='del'>-static inline uint32_t A3XX_RB_ALPHA_REF_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_ALPHA_REF_UINT__SHIFT) &amp; A3XX_RB_ALPHA_REF_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_ALPHA_REF_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A3XX_RB_ALPHA_REF_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A3XX_RB_ALPHA_REF_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A3XX_RB_ALPHA_REF_FLOAT__SHIFT) &amp; A3XX_RB_ALPHA_REF_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_MRT(i0) (0x000020c4 + 0x4*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_RB_MRT_CONTROL(uint32_t i0) { return 0x000020c4 + 0x4*i0; }</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_READ_DEST_ENABLE			0x00000008</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_BLEND				0x00000010</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_BLEND2				0x00000020</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_ROP_CODE__MASK			0x00000f00</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_ROP_CODE__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) &amp; A3XX_RB_MRT_CONTROL_ROP_CODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_DITHER_MODE__MASK			0x00003000</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_DITHER_MODE__SHIFT			12</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_CONTROL_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_CONTROL_DITHER_MODE__SHIFT) &amp; A3XX_RB_MRT_CONTROL_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK		0x0f000000</div><div class='del'>-#define A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) &amp; A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x000020c5 + 0x4*i0; }</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK			0x0000003f</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a3xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) &amp; A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK		0x000000c0</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT		6</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a3xx_tile_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) &amp; A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK			0x00000c00</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT			10</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) &amp; A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_SRGB				0x00004000</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK		0xfffe0000</div><div class='del'>-#define A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT		17</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) &amp; A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_RB_MRT_BUF_BASE(uint32_t i0) { return 0x000020c6 + 0x4*i0; }</div><div class='del'>-#define A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__MASK		0xfffffff0</div><div class='del'>-#define A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__SHIFT		4</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__SHIFT) &amp; A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x000020c7 + 0x4*i0; }</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK		0x0000001f</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) &amp; A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK	0x000000e0</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT	5</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) &amp; A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK		0x00001f00</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT	8</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) &amp; A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK	0x001f0000</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) &amp; A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK	0x00e00000</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT	21</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) &amp; A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK	0x1f000000</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT	24</div><div class='del'>-static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) &amp; A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE			0x20000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_BLEND_RED					0x000020e4</div><div class='del'>-#define A3XX_RB_BLEND_RED_UINT__MASK				0x000000ff</div><div class='del'>-#define A3XX_RB_BLEND_RED_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_RED_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_BLEND_RED_UINT__SHIFT) &amp; A3XX_RB_BLEND_RED_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_BLEND_RED_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A3XX_RB_BLEND_RED_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_RED_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A3XX_RB_BLEND_RED_FLOAT__SHIFT) &amp; A3XX_RB_BLEND_RED_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_BLEND_GREEN					0x000020e5</div><div class='del'>-#define A3XX_RB_BLEND_GREEN_UINT__MASK				0x000000ff</div><div class='del'>-#define A3XX_RB_BLEND_GREEN_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_GREEN_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_BLEND_GREEN_UINT__SHIFT) &amp; A3XX_RB_BLEND_GREEN_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_BLEND_GREEN_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A3XX_RB_BLEND_GREEN_FLOAT__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_GREEN_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A3XX_RB_BLEND_GREEN_FLOAT__SHIFT) &amp; A3XX_RB_BLEND_GREEN_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_BLEND_BLUE					0x000020e6</div><div class='del'>-#define A3XX_RB_BLEND_BLUE_UINT__MASK				0x000000ff</div><div class='del'>-#define A3XX_RB_BLEND_BLUE_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_BLUE_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_BLEND_BLUE_UINT__SHIFT) &amp; A3XX_RB_BLEND_BLUE_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_BLEND_BLUE_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A3XX_RB_BLEND_BLUE_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_BLUE_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A3XX_RB_BLEND_BLUE_FLOAT__SHIFT) &amp; A3XX_RB_BLEND_BLUE_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_BLEND_ALPHA					0x000020e7</div><div class='del'>-#define A3XX_RB_BLEND_ALPHA_UINT__MASK				0x000000ff</div><div class='del'>-#define A3XX_RB_BLEND_ALPHA_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_ALPHA_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_BLEND_ALPHA_UINT__SHIFT) &amp; A3XX_RB_BLEND_ALPHA_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_BLEND_ALPHA_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A3XX_RB_BLEND_ALPHA_FLOAT__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_RB_BLEND_ALPHA_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A3XX_RB_BLEND_ALPHA_FLOAT__SHIFT) &amp; A3XX_RB_BLEND_ALPHA_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_CLEAR_COLOR_DW0				0x000020e8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_CLEAR_COLOR_DW1				0x000020e9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_CLEAR_COLOR_DW2				0x000020ea</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_CLEAR_COLOR_DW3				0x000020eb</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_COPY_CONTROL				0x000020ec</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__MASK			0x00000003</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) &amp; A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_DEPTHCLEAR				0x00000008</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_MODE__MASK				0x00000070</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_MODE__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_CONTROL_MODE__SHIFT) &amp; A3XX_RB_COPY_CONTROL_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_MSAA_SRGB_DOWNSAMPLE		0x00000080</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK			0x00000f00</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) &amp; A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_DEPTH32_RESOLVE			0x00001000</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_GMEM_BASE__MASK			0xffffc000</div><div class='del'>-#define A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT			14</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3fff));</div><div class='del'>-	return (((val &gt;&gt; 14)) &lt;&lt; A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) &amp; A3XX_RB_COPY_CONTROL_GMEM_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_COPY_DEST_BASE				0x000020ed</div><div class='del'>-#define A3XX_RB_COPY_DEST_BASE_BASE__MASK			0xfffffff0</div><div class='del'>-#define A3XX_RB_COPY_DEST_BASE_BASE__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_BASE_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_RB_COPY_DEST_BASE_BASE__SHIFT) &amp; A3XX_RB_COPY_DEST_BASE_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_COPY_DEST_PITCH				0x000020ee</div><div class='del'>-#define A3XX_RB_COPY_DEST_PITCH_PITCH__MASK			0xffffffff</div><div class='del'>-#define A3XX_RB_COPY_DEST_PITCH_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) &amp; A3XX_RB_COPY_DEST_PITCH_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_COPY_DEST_INFO				0x000020ef</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_TILE__MASK			0x00000003</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_TILE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_INFO_TILE(enum a3xx_tile_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_DEST_INFO_TILE__SHIFT) &amp; A3XX_RB_COPY_DEST_INFO_TILE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_FORMAT__MASK			0x000000fc</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_FORMAT__SHIFT			2</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_INFO_FORMAT(enum a3xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) &amp; A3XX_RB_COPY_DEST_INFO_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_SWAP__MASK			0x00000300</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_SWAP__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_DEST_INFO_SWAP__SHIFT) &amp; A3XX_RB_COPY_DEST_INFO_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_DITHER_MODE__MASK		0x00000c00</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT		10</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) &amp; A3XX_RB_COPY_DEST_INFO_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__MASK		0x0003c000</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT		14</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) &amp; A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_ENDIAN__MASK			0x001c0000</div><div class='del'>-#define A3XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT			18</div><div class='del'>-static inline uint32_t A3XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) &amp; A3XX_RB_COPY_DEST_INFO_ENDIAN__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_DEPTH_CONTROL				0x00002100</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_FRAG_WRITES_Z			0x00000001</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE			0x00000002</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE			0x00000004</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE			0x00000008</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_ZFUNC__MASK			0x00000070</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) &amp; A3XX_RB_DEPTH_CONTROL_ZFUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_Z_CLAMP_ENABLE			0x00000080</div><div class='del'>-#define A3XX_RB_DEPTH_CONTROL_Z_READ_ENABLE			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_DEPTH_CLEAR					0x00002101</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_DEPTH_INFO					0x00002102</div><div class='del'>-#define A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK			0x00000003</div><div class='del'>-#define A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) &amp; A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_DEPTH_INFO_DEPTH_BASE__MASK			0xfffff800</div><div class='del'>-#define A3XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT			11</div><div class='del'>-static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A3XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) &amp; A3XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_DEPTH_PITCH					0x00002103</div><div class='del'>-#define A3XX_RB_DEPTH_PITCH__MASK				0xffffffff</div><div class='del'>-#define A3XX_RB_DEPTH_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_DEPTH_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x7));</div><div class='del'>-	return (((val &gt;&gt; 3)) &lt;&lt; A3XX_RB_DEPTH_PITCH__SHIFT) &amp; A3XX_RB_DEPTH_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_STENCIL_CONTROL				0x00002104</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_STENCIL_ENABLE			0x00000001</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF		0x00000002</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_STENCIL_READ			0x00000004</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FUNC__MASK			0x00000700</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FUNC__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_FUNC__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FAIL__MASK			0x00003800</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FAIL__SHIFT			11</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_FAIL__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_FAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZPASS__MASK			0x0001c000</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZPASS__SHIFT			14</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_ZPASS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZFAIL__MASK			0x000e0000</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT			17</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_ZFAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FUNC_BF__MASK			0x00700000</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FAIL_BF__MASK			0x03800000</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT			23</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK			0x1c000000</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT			26</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK			0xe0000000</div><div class='del'>-#define A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT			29</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) &amp; A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_STENCIL_CLEAR				0x00002105</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_STENCIL_INFO				0x00002106</div><div class='del'>-#define A3XX_RB_STENCIL_INFO_STENCIL_BASE__MASK			0xfffff800</div><div class='del'>-#define A3XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT		11</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A3XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) &amp; A3XX_RB_STENCIL_INFO_STENCIL_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_STENCIL_PITCH				0x00002107</div><div class='del'>-#define A3XX_RB_STENCIL_PITCH__MASK				0xffffffff</div><div class='del'>-#define A3XX_RB_STENCIL_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_STENCIL_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x7));</div><div class='del'>-	return (((val &gt;&gt; 3)) &lt;&lt; A3XX_RB_STENCIL_PITCH__SHIFT) &amp; A3XX_RB_STENCIL_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_STENCILREFMASK				0x00002108</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_STENCILREF__MASK			0x000000ff</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCILREFMASK_STENCILREF__SHIFT) &amp; A3XX_RB_STENCILREFMASK_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) &amp; A3XX_RB_STENCILREFMASK_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK		0x00ff0000</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT		16</div><div class='del'>-static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) &amp; A3XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_STENCILREFMASK_BF				0x00002109</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_BF_STENCILREF__MASK		0x000000ff</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) &amp; A3XX_RB_STENCILREFMASK_BF_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) &amp; A3XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK	0x00ff0000</div><div class='del'>-#define A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) &amp; A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_LRZ_VSC_CONTROL				0x0000210c</div><div class='del'>-#define A3XX_RB_LRZ_VSC_CONTROL_BINNING_ENABLE			0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_WINDOW_OFFSET				0x0000210e</div><div class='del'>-#define A3XX_RB_WINDOW_OFFSET_X__MASK				0x0000ffff</div><div class='del'>-#define A3XX_RB_WINDOW_OFFSET_X__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_RB_WINDOW_OFFSET_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_WINDOW_OFFSET_X__SHIFT) &amp; A3XX_RB_WINDOW_OFFSET_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_WINDOW_OFFSET_Y__MASK				0xffff0000</div><div class='del'>-#define A3XX_RB_WINDOW_OFFSET_Y__SHIFT				16</div><div class='del'>-static inline uint32_t A3XX_RB_WINDOW_OFFSET_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_WINDOW_OFFSET_Y__SHIFT) &amp; A3XX_RB_WINDOW_OFFSET_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_SAMPLE_COUNT_CONTROL			0x00002110</div><div class='del'>-#define A3XX_RB_SAMPLE_COUNT_CONTROL_RESET			0x00000001</div><div class='del'>-#define A3XX_RB_SAMPLE_COUNT_CONTROL_COPY			0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_SAMPLE_COUNT_ADDR				0x00002111</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_Z_CLAMP_MIN					0x00002114</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_Z_CLAMP_MAX					0x00002115</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VGT_BIN_BASE					0x000021e1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VGT_BIN_SIZE					0x000021e2</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_VSTREAM_CONTROL				0x000021e4</div><div class='del'>-#define A3XX_PC_VSTREAM_CONTROL_SIZE__MASK			0x003f0000</div><div class='del'>-#define A3XX_PC_VSTREAM_CONTROL_SIZE__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) &amp; A3XX_PC_VSTREAM_CONTROL_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_PC_VSTREAM_CONTROL_N__MASK				0x07c00000</div><div class='del'>-#define A3XX_PC_VSTREAM_CONTROL_N__SHIFT			22</div><div class='del'>-static inline uint32_t A3XX_PC_VSTREAM_CONTROL_N(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_PC_VSTREAM_CONTROL_N__SHIFT) &amp; A3XX_PC_VSTREAM_CONTROL_N__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_VERTEX_REUSE_BLOCK_CNTL			0x000021ea</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_PRIM_VTX_CNTL				0x000021ec</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC__MASK		0x0000001f</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC__SHIFT) &amp; A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE__MASK	0x000000e0</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE__SHIFT	5</div><div class='del'>-static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) &amp; A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE__MASK		0x00000700</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE__SHIFT	8</div><div class='del'>-static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE__SHIFT) &amp; A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_POLYMODE_ENABLE			0x00001000</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_PRIMITIVE_RESTART			0x00100000</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST		0x02000000</div><div class='del'>-#define A3XX_PC_PRIM_VTX_CNTL_PSIZE				0x04000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_RESTART_INDEX				0x000021ed</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CONTROL_0_REG				0x00002200</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__MASK		0x00000030</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT		4</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) &amp; A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_FSSUPERTHREADENABLE		0x00000040</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_COMPUTEMODE			0x00000100</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_SPSHADERRESTART			0x00000200</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_RESERVED2			0x00000400</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC__MASK	0x00fff000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC__SHIFT	12</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC__SHIFT) &amp; A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_FSONLYTEX			0x02000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_CHUNKDISABLE			0x04000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__MASK			0x08000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT		27</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) &amp; A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_LAZYUPDATEDISABLE		0x10000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_SPCONSTFULLUPDATE		0x20000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_TPFULLUPDATE			0x40000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_0_REG_SINGLECONTEXT			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CONTROL_1_REG				0x00002201</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__MASK		0x000000c0</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT		6</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) &amp; A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_VSSUPERTHREADENABLE		0x00000100</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID__MASK		0x00ff0000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID__SHIFT		16</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID__MASK		0xff000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CONTROL_2_REG				0x00002202</div><div class='del'>-#define A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID__MASK		0x000003fc</div><div class='del'>-#define A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID__SHIFT		2</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID__MASK		0x03fc0000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID__SHIFT		18</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__MASK	0xfc000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT	26</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) &amp; A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CONTROL_3_REG				0x00002203</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID__MASK	0x000000ff</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID__MASK	0x0000ff00</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID__SHIFT	8</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID__MASK	0x00ff0000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID__MASK	0xff000000</div><div class='del'>-#define A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID__SHIFT	24</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID__SHIFT) &amp; A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_VS_CONTROL_REG				0x00002204</div><div class='del'>-#define A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__MASK		0x000003ff</div><div class='del'>-#define A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET__MASK		0x001ff000</div><div class='del'>-#define A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT	12</div><div class='del'>-static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT) &amp; A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_FS_CONTROL_REG				0x00002205</div><div class='del'>-#define A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__MASK		0x000003ff</div><div class='del'>-#define A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET__MASK		0x001ff000</div><div class='del'>-#define A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT	12</div><div class='del'>-static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT) &amp; A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CONST_VSPRESV_RANGE_REG			0x00002206</div><div class='del'>-#define A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY__MASK	0x000001ff</div><div class='del'>-#define A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY__SHIFT) &amp; A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY__MASK	0x01ff0000</div><div class='del'>-#define A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY__SHIFT) &amp; A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CONST_FSPRESV_RANGE_REG			0x00002207</div><div class='del'>-#define A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY__MASK	0x000001ff</div><div class='del'>-#define A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY__SHIFT) &amp; A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY__MASK	0x01ff0000</div><div class='del'>-#define A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY__SHIFT) &amp; A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_NDRANGE_0_REG				0x0000220a</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__MASK		0x00000003</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__SHIFT) &amp; A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0__MASK		0x00000ffc</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0__SHIFT		2</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0__SHIFT) &amp; A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1__MASK		0x003ff000</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1__SHIFT		12</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1__SHIFT) &amp; A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2__MASK		0xffc00000</div><div class='del'>-#define A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2__SHIFT		22</div><div class='del'>-static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2__SHIFT) &amp; A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_GLOBAL_WORK(i0) (0x0000220b + 0x2*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_HLSQ_CL_GLOBAL_WORK_SIZE(uint32_t i0) { return 0x0000220b + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_HLSQ_CL_GLOBAL_WORK_OFFSET(uint32_t i0) { return 0x0000220c + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_CONTROL_0_REG				0x00002211</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_CONTROL_1_REG				0x00002212</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_KERNEL_CONST_REG			0x00002214</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_KERNEL_GROUP(i0) (0x00002215 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_HLSQ_CL_KERNEL_GROUP_RATIO(uint32_t i0) { return 0x00002215 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_KERNEL_GROUP_Y_REG			0x00002216</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_KERNEL_GROUP_Z_REG			0x00002217</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_CL_WG_OFFSET_REG				0x0000221a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_CONTROL_0					0x00002240</div><div class='del'>-#define A3XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK			0x0003ffff</div><div class='del'>-#define A3XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) &amp; A3XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_0_PACKETSIZE__MASK			0x003c0000</div><div class='del'>-#define A3XX_VFD_CONTROL_0_PACKETSIZE__SHIFT			18</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_0_PACKETSIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_0_PACKETSIZE__SHIFT) &amp; A3XX_VFD_CONTROL_0_PACKETSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__MASK		0x07c00000</div><div class='del'>-#define A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT		22</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) &amp; A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__MASK		0xf8000000</div><div class='del'>-#define A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT		27</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) &amp; A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_CONTROL_1					0x00002241</div><div class='del'>-#define A3XX_VFD_CONTROL_1_MAXSTORAGE__MASK			0x0000000f</div><div class='del'>-#define A3XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) &amp; A3XX_VFD_CONTROL_1_MAXSTORAGE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_1_MAXTHRESHOLD__MASK			0x000000f0</div><div class='del'>-#define A3XX_VFD_CONTROL_1_MAXTHRESHOLD__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_1_MAXTHRESHOLD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_1_MAXTHRESHOLD__SHIFT) &amp; A3XX_VFD_CONTROL_1_MAXTHRESHOLD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_1_MINTHRESHOLD__MASK			0x00000f00</div><div class='del'>-#define A3XX_VFD_CONTROL_1_MINTHRESHOLD__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_1_MINTHRESHOLD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_1_MINTHRESHOLD__SHIFT) &amp; A3XX_VFD_CONTROL_1_MINTHRESHOLD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_1_REGID4VTX__MASK			0x00ff0000</div><div class='del'>-#define A3XX_VFD_CONTROL_1_REGID4VTX__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_1_REGID4VTX__SHIFT) &amp; A3XX_VFD_CONTROL_1_REGID4VTX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_CONTROL_1_REGID4INST__MASK			0xff000000</div><div class='del'>-#define A3XX_VFD_CONTROL_1_REGID4INST__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_VFD_CONTROL_1_REGID4INST(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_CONTROL_1_REGID4INST__SHIFT) &amp; A3XX_VFD_CONTROL_1_REGID4INST__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_INDEX_MIN					0x00002242</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_INDEX_MAX					0x00002243</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_INSTANCEID_OFFSET				0x00002244</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_INDEX_OFFSET				0x00002245</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_FETCH(i0) (0x00002246 + 0x2*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VFD_FETCH_INSTR_0(uint32_t i0) { return 0x00002246 + 0x2*i0; }</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK			0x0000007f</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) &amp; A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK			0x0000ff80</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT			7</div><div class='del'>-static inline uint32_t A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) &amp; A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_INSTANCED			0x00010000</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_SWITCHNEXT			0x00020000</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_INDEXCODE__MASK			0x00fc0000</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_INDEXCODE__SHIFT			18</div><div class='del'>-static inline uint32_t A3XX_VFD_FETCH_INSTR_0_INDEXCODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_FETCH_INSTR_0_INDEXCODE__SHIFT) &amp; A3XX_VFD_FETCH_INSTR_0_INDEXCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_STEPRATE__MASK			0xff000000</div><div class='del'>-#define A3XX_VFD_FETCH_INSTR_0_STEPRATE__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_VFD_FETCH_INSTR_0_STEPRATE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_FETCH_INSTR_0_STEPRATE__SHIFT) &amp; A3XX_VFD_FETCH_INSTR_0_STEPRATE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x00002247 + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_DECODE(i0) (0x00002266 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x00002266 + 0x1*i0; }</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_WRITEMASK__MASK			0x0000000f</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) &amp; A3XX_VFD_DECODE_INSTR_WRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_CONSTFILL				0x00000010</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_FORMAT__MASK			0x00000fc0</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_FORMAT__SHIFT			6</div><div class='del'>-static inline uint32_t A3XX_VFD_DECODE_INSTR_FORMAT(enum a3xx_vtx_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_DECODE_INSTR_FORMAT__SHIFT) &amp; A3XX_VFD_DECODE_INSTR_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_REGID__MASK			0x000ff000</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_REGID__SHIFT			12</div><div class='del'>-static inline uint32_t A3XX_VFD_DECODE_INSTR_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_DECODE_INSTR_REGID__SHIFT) &amp; A3XX_VFD_DECODE_INSTR_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_INT				0x00100000</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_SWAP__MASK			0x00c00000</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_SWAP__SHIFT			22</div><div class='del'>-static inline uint32_t A3XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_DECODE_INSTR_SWAP__SHIFT) &amp; A3XX_VFD_DECODE_INSTR_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_SHIFTCNT__MASK			0x1f000000</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) &amp; A3XX_VFD_DECODE_INSTR_SHIFTCNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_LASTCOMPVALID			0x20000000</div><div class='del'>-#define A3XX_VFD_DECODE_INSTR_SWITCHNEXT			0x40000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_VS_THREADING_THRESHOLD			0x0000227e</div><div class='del'>-#define A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD__MASK	0x0000000f</div><div class='del'>-#define A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD__SHIFT) &amp; A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT__MASK	0x0000ff00</div><div class='del'>-#define A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT__SHIFT	8</div><div class='del'>-static inline uint32_t A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT__SHIFT) &amp; A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_ATTR					0x00002280</div><div class='del'>-#define A3XX_VPC_ATTR_TOTALATTR__MASK				0x000001ff</div><div class='del'>-#define A3XX_VPC_ATTR_TOTALATTR__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_VPC_ATTR_TOTALATTR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_ATTR_TOTALATTR__SHIFT) &amp; A3XX_VPC_ATTR_TOTALATTR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_ATTR_PSIZE					0x00000200</div><div class='del'>-#define A3XX_VPC_ATTR_THRDASSIGN__MASK				0x0ffff000</div><div class='del'>-#define A3XX_VPC_ATTR_THRDASSIGN__SHIFT				12</div><div class='del'>-static inline uint32_t A3XX_VPC_ATTR_THRDASSIGN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_ATTR_THRDASSIGN__SHIFT) &amp; A3XX_VPC_ATTR_THRDASSIGN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_ATTR_LMSIZE__MASK				0xf0000000</div><div class='del'>-#define A3XX_VPC_ATTR_LMSIZE__SHIFT				28</div><div class='del'>-static inline uint32_t A3XX_VPC_ATTR_LMSIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_ATTR_LMSIZE__SHIFT) &amp; A3XX_VPC_ATTR_LMSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_PACK					0x00002281</div><div class='del'>-#define A3XX_VPC_PACK_NUMFPNONPOSVAR__MASK			0x0000ff00</div><div class='del'>-#define A3XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) &amp; A3XX_VPC_PACK_NUMFPNONPOSVAR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_PACK_NUMNONPOSVSVAR__MASK			0x00ff0000</div><div class='del'>-#define A3XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) &amp; A3XX_VPC_PACK_NUMNONPOSVSVAR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_VARYING_INTERP(i0) (0x00002282 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00002282 + 0x1*i0; }</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C0__MASK			0x00000003</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C0__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C0(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C0__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C1__MASK			0x0000000c</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C1__SHIFT			2</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C1(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C1__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C2__MASK			0x00000030</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C2__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C2(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C2__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C3__MASK			0x000000c0</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C3__SHIFT			6</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C3(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C3__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C3__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C4__MASK			0x00000300</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C4__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C4(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C4__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C4__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C5__MASK			0x00000c00</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C5__SHIFT			10</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C5(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C5__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C5__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C6__MASK			0x00003000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C6__SHIFT			12</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C6(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C6__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C6__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C7__MASK			0x0000c000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C7__SHIFT			14</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C7(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C7__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C7__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C8__MASK			0x00030000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C8__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C8(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C8__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C8__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C9__MASK			0x000c0000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_C9__SHIFT			18</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C9(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_C9__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_C9__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CA__MASK			0x00300000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CA__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CA(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_CA__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_CA__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CB__MASK			0x00c00000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CB__SHIFT			22</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CB(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_CB__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_CB__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CC__MASK			0x03000000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CC__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CC(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_CC__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_CC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CD__MASK			0x0c000000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CD__SHIFT			26</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CD(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_CD__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_CD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CE__MASK			0x30000000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CE__SHIFT			28</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CE(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_CE__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_CE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CF__MASK			0xc0000000</div><div class='del'>-#define A3XX_VPC_VARYING_INTERP_MODE_CF__SHIFT			30</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CF(enum a3xx_intp_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_INTERP_MODE_CF__SHIFT) &amp; A3XX_VPC_VARYING_INTERP_MODE_CF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_VARYING_PS_REPL(i0) (0x00002286 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x00002286 + 0x1*i0; }</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C0__MASK			0x00000003</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C0__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C0(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C0__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C1__MASK			0x0000000c</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C1__SHIFT			2</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C1(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C1__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C2__MASK			0x00000030</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C2__SHIFT			4</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C2(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C2__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C3__MASK			0x000000c0</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C3__SHIFT			6</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C3(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C3__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C3__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C4__MASK			0x00000300</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C4__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C4(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C4__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C4__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C5__MASK			0x00000c00</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C5__SHIFT			10</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C5(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C5__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C5__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C6__MASK			0x00003000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C6__SHIFT			12</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C6(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C6__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C6__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C7__MASK			0x0000c000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C7__SHIFT			14</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C7(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C7__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C7__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C8__MASK			0x00030000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C8__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C8(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C8__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C8__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C9__MASK			0x000c0000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_C9__SHIFT			18</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C9(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_C9__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_C9__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CA__MASK			0x00300000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CA__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CA(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_CA__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_CA__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CB__MASK			0x00c00000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CB__SHIFT			22</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CB(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_CB__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_CB__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CC__MASK			0x03000000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CC__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CC(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_CC__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_CC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CD__MASK			0x0c000000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CD__SHIFT			26</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CD(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_CD__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_CD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CE__MASK			0x30000000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CE__SHIFT			28</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CE(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_CE__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_CE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CF__MASK			0xc0000000</div><div class='del'>-#define A3XX_VPC_VARYING_PS_REPL_MODE_CF__SHIFT			30</div><div class='del'>-static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CF(enum a3xx_repl_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VPC_VARYING_PS_REPL_MODE_CF__SHIFT) &amp; A3XX_VPC_VARYING_PS_REPL_MODE_CF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_VARY_CYLWRAP_ENABLE_0			0x0000228a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_VARY_CYLWRAP_ENABLE_1			0x0000228b</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_SP_CTRL_REG					0x000022c0</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_RESOLVE				0x00010000</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_CONSTMODE__MASK			0x00040000</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_CONSTMODE__SHIFT			18</div><div class='del'>-static inline uint32_t A3XX_SP_SP_CTRL_REG_CONSTMODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_SP_CTRL_REG_CONSTMODE__SHIFT) &amp; A3XX_SP_SP_CTRL_REG_CONSTMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_BINNING				0x00080000</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_SLEEPMODE__MASK			0x00300000</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_SLEEPMODE__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_SP_SP_CTRL_REG_SLEEPMODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_SP_CTRL_REG_SLEEPMODE__SHIFT) &amp; A3XX_SP_SP_CTRL_REG_SLEEPMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_L0MODE__MASK			0x00c00000</div><div class='del'>-#define A3XX_SP_SP_CTRL_REG_L0MODE__SHIFT			22</div><div class='del'>-static inline uint32_t A3XX_SP_SP_CTRL_REG_L0MODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_SP_CTRL_REG_L0MODE__SHIFT) &amp; A3XX_SP_SP_CTRL_REG_L0MODE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_CTRL_REG0				0x000022c4</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_THREADMODE__MASK			0x00000001</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) &amp; A3XX_SP_VS_CTRL_REG0_THREADMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE__MASK		0x00000002</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE__SHIFT		1</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE__SHIFT) &amp; A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_CACHEINVALID			0x00000004</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_ALUSCHMODE				0x00000008</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK		0x000003f0</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT		4</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) &amp; A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK		0x0000fc00</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) &amp; A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_THREADSIZE__MASK			0x00100000</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) &amp; A3XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_SUPERTHREADMODE			0x00200000</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_LENGTH__MASK			0xff000000</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG0_LENGTH__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG0_LENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG0_LENGTH__SHIFT) &amp; A3XX_SP_VS_CTRL_REG0_LENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_CTRL_REG1				0x000022c5</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK			0x000003ff</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) &amp; A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT__MASK		0x000ffc00</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT__SHIFT) &amp; A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__MASK		0x7f000000</div><div class='del'>-#define A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) &amp; A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_PARAM_REG				0x000022c6</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_POSREGID__MASK			0x000000ff</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_POSREGID__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_PARAM_REG_POSREGID__SHIFT) &amp; A3XX_SP_VS_PARAM_REG_POSREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_PSIZEREGID__MASK			0x0000ff00</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) &amp; A3XX_SP_VS_PARAM_REG_PSIZEREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_POS2DMODE				0x00010000</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__MASK		0x01f00000</div><div class='del'>-#define A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT		20</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) &amp; A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_OUT(i0) (0x000022c7 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_SP_VS_OUT_REG(uint32_t i0) { return 0x000022c7 + 0x1*i0; }</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_A_REGID__MASK			0x000000ff</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_A_REGID__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OUT_REG_A_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OUT_REG_A_REGID__SHIFT) &amp; A3XX_SP_VS_OUT_REG_A_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_A_HALF				0x00000100</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_A_COMPMASK__MASK			0x00001e00</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT			9</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) &amp; A3XX_SP_VS_OUT_REG_A_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_B_REGID__MASK			0x00ff0000</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_B_REGID__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OUT_REG_B_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OUT_REG_B_REGID__SHIFT) &amp; A3XX_SP_VS_OUT_REG_B_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_B_HALF				0x01000000</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_B_COMPMASK__MASK			0x1e000000</div><div class='del'>-#define A3XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT			25</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) &amp; A3XX_SP_VS_OUT_REG_B_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_VPC_DST(i0) (0x000022d0 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x000022d0 + 0x1*i0; }</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK			0x0000007f</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) &amp; A3XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK			0x00007f00</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT			8</div><div class='del'>-static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) &amp; A3XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK			0x007f0000</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT			16</div><div class='del'>-static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) &amp; A3XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK			0x7f000000</div><div class='del'>-#define A3XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) &amp; A3XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_OBJ_OFFSET_REG				0x000022d4</div><div class='del'>-#define A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__MASK	0x0000ffff</div><div class='del'>-#define A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT) &amp; A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_OBJ_START_REG				0x000022d5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_PVT_MEM_PARAM_REG			0x000022d6</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__MASK	0x000000ff</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x7f));</div><div class='del'>-	return (((val &gt;&gt; 7)) &lt;&lt; A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT) &amp; A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__MASK	0x00ffff00</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT) &amp; A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__MASK	0xff000000</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT	24</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT) &amp; A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_PVT_MEM_ADDR_REG				0x000022d7</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN__MASK		0x0000001f</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT) &amp; A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__MASK	0xffffffe0</div><div class='del'>-#define A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT	5</div><div class='del'>-static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) &amp; A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_PVT_MEM_SIZE_REG				0x000022d8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_VS_LENGTH_REG				0x000022df</div><div class='del'>-#define A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__MASK		0xffffffff</div><div class='del'>-#define A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_SP_VS_LENGTH_REG_SHADERLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__SHIFT) &amp; A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_CTRL_REG0				0x000022e0</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_THREADMODE__MASK			0x00000001</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) &amp; A3XX_SP_FS_CTRL_REG0_THREADMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE__MASK		0x00000002</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE__SHIFT		1</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE__SHIFT) &amp; A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_CACHEINVALID			0x00000004</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_ALUSCHMODE				0x00000008</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK		0x000003f0</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT		4</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) &amp; A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK		0x0000fc00</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) &amp; A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_FSBYPASSENABLE			0x00020000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP			0x00040000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_OUTORDERED				0x00080000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_THREADSIZE__MASK			0x00100000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) &amp; A3XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_SUPERTHREADMODE			0x00200000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_PIXLODENABLE			0x00400000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_COMPUTEMODE			0x00800000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_LENGTH__MASK			0xff000000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG0_LENGTH__SHIFT			24</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG0_LENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG0_LENGTH__SHIFT) &amp; A3XX_SP_FS_CTRL_REG0_LENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_CTRL_REG1				0x000022e1</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK			0x000003ff</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) &amp; A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT__MASK		0x000ffc00</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT__SHIFT) &amp; A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING__MASK		0x00f00000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING__SHIFT		20</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) &amp; A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET__MASK		0x7f000000</div><div class='del'>-#define A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET__SHIFT) &amp; A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_OBJ_OFFSET_REG				0x000022e2</div><div class='del'>-#define A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__MASK	0x0000ffff</div><div class='del'>-#define A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT) &amp; A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_OBJ_START_REG				0x000022e3</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_PVT_MEM_PARAM_REG			0x000022e4</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__MASK	0x000000ff</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT	0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT) &amp; A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__MASK	0x00ffff00</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT) &amp; A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__MASK	0xff000000</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT	24</div><div class='del'>-static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT) &amp; A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_PVT_MEM_ADDR_REG				0x000022e5</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN__MASK		0x0000001f</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT) &amp; A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__MASK	0xffffffe0</div><div class='del'>-#define A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT	5</div><div class='del'>-static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) &amp; A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_PVT_MEM_SIZE_REG				0x000022e6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_FLAT_SHAD_MODE_REG_0			0x000022e8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_FLAT_SHAD_MODE_REG_1			0x000022e9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_OUTPUT_REG				0x000022ec</div><div class='del'>-#define A3XX_SP_FS_OUTPUT_REG_MRT__MASK				0x00000003</div><div class='del'>-#define A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT) &amp; A3XX_SP_FS_OUTPUT_REG_MRT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_OUTPUT_REG_DEPTH_ENABLE			0x00000080</div><div class='del'>-#define A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MASK			0x0000ff00</div><div class='del'>-#define A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT		8</div><div class='del'>-static inline uint32_t A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) &amp; A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_MRT(i0) (0x000022f0 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_SP_FS_MRT_REG(uint32_t i0) { return 0x000022f0 + 0x1*i0; }</div><div class='del'>-#define A3XX_SP_FS_MRT_REG_REGID__MASK				0x000000ff</div><div class='del'>-#define A3XX_SP_FS_MRT_REG_REGID__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_MRT_REG_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_MRT_REG_REGID__SHIFT) &amp; A3XX_SP_FS_MRT_REG_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_SP_FS_MRT_REG_HALF_PRECISION			0x00000100</div><div class='del'>-#define A3XX_SP_FS_MRT_REG_SINT					0x00000400</div><div class='del'>-#define A3XX_SP_FS_MRT_REG_UINT					0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_IMAGE_OUTPUT(i0) (0x000022f4 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_SP_FS_IMAGE_OUTPUT_REG(uint32_t i0) { return 0x000022f4 + 0x1*i0; }</div><div class='del'>-#define A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT__MASK		0x0000003f</div><div class='del'>-#define A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT(enum a3xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT__SHIFT) &amp; A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_FS_LENGTH_REG				0x000022ff</div><div class='del'>-#define A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__MASK		0xffffffff</div><div class='del'>-#define A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_SP_FS_LENGTH_REG_SHADERLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__SHIFT) &amp; A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PA_SC_AA_CONFIG				0x00002301</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TPL1_TP_VS_TEX_OFFSET				0x00002340</div><div class='del'>-#define A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__MASK		0x000000ff</div><div class='del'>-#define A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__SHIFT) &amp; A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET__MASK		0x0000ff00</div><div class='del'>-#define A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET__SHIFT		8</div><div class='del'>-static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET__SHIFT) &amp; A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR__MASK		0xffff0000</div><div class='del'>-#define A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR__SHIFT		16</div><div class='del'>-static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR__SHIFT) &amp; A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TPL1_TP_VS_BORDER_COLOR_BASE_ADDR		0x00002341</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TPL1_TP_FS_TEX_OFFSET				0x00002342</div><div class='del'>-#define A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET__MASK		0x000000ff</div><div class='del'>-#define A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET__SHIFT) &amp; A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET__MASK		0x0000ff00</div><div class='del'>-#define A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET__SHIFT		8</div><div class='del'>-static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET__SHIFT) &amp; A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR__MASK		0xffff0000</div><div class='del'>-#define A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR__SHIFT		16</div><div class='del'>-static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR__SHIFT) &amp; A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TPL1_TP_FS_BORDER_COLOR_BASE_ADDR		0x00002343</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_CLKON					0x00003001</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_FIXED_SORT_EN				0x0000300c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_FIXED_SORT_SEL0				0x0000300d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_FIXED_SORT_SEL1				0x0000300e</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_ABIT_SORT					0x0000301c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_ABIT_SORT_CONF				0x0000301d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_GATE_OFF_WRREQ_EN				0x0000302a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_IN_RD_LIM_CONF0				0x0000302c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_IN_RD_LIM_CONF1				0x0000302d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_IN_WR_LIM_CONF0				0x00003030</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_IN_WR_LIM_CONF1				0x00003031</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_OUT_RD_LIM_CONF0				0x00003034</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_OUT_WR_LIM_CONF0				0x00003035</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_DDR_OUT_MAX_BURST				0x00003036</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_ARB_CTL					0x0000303c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_ROUND_ROBIN_QOS_ARB			0x00003049</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_OUT_AXI_AMEMTYPE_CONF0			0x00003058</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_OUT_AXI_AOOO_EN				0x0000305e</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_OUT_AXI_AOOO				0x0000305f</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT_EN				0x00003070</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_EN_CNT0				0x00000001</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_EN_CNT1				0x00000002</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_EN_PWRCNT0				0x00000004</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_EN_PWRCNT1				0x00000008</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_EN_PWRCNT2				0x00000010</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT_CLR				0x00003071</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_CLR_CNT0				0x00000001</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_CLR_CNT1				0x00000002</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_CLR_PWRCNT0				0x00000004</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_CLR_PWRCNT1				0x00000008</div><div class='del'>-#define A3XX_VBIF_PERF_CNT_CLR_PWRCNT2				0x00000010</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT_SEL				0x00003072</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT0_LO				0x00003073</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT0_HI				0x00003074</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT1_LO				0x00003075</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_CNT1_HI				0x00003076</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_PWR_CNT0_LO				0x00003077</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_PWR_CNT0_HI				0x00003078</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_PWR_CNT1_LO				0x00003079</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_PWR_CNT1_HI				0x0000307a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_PWR_CNT2_LO				0x0000307b</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VBIF_PERF_PWR_CNT2_HI				0x0000307c</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VSC_BIN_SIZE					0x00000c01</div><div class='del'>-#define A3XX_VSC_BIN_SIZE_WIDTH__MASK				0x0000001f</div><div class='del'>-#define A3XX_VSC_BIN_SIZE_WIDTH__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_VSC_BIN_SIZE_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_VSC_BIN_SIZE_WIDTH__SHIFT) &amp; A3XX_VSC_BIN_SIZE_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VSC_BIN_SIZE_HEIGHT__MASK				0x000003e0</div><div class='del'>-#define A3XX_VSC_BIN_SIZE_HEIGHT__SHIFT				5</div><div class='del'>-static inline uint32_t A3XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A3XX_VSC_BIN_SIZE_HEIGHT__SHIFT) &amp; A3XX_VSC_BIN_SIZE_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VSC_SIZE_ADDRESS				0x00000c02</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VSC_PIPE(i0) (0x00000c06 + 0x3*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c06 + 0x3*i0; }</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_X__MASK				0x000003ff</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_X__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_VSC_PIPE_CONFIG_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VSC_PIPE_CONFIG_X__SHIFT) &amp; A3XX_VSC_PIPE_CONFIG_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_Y__MASK				0x000ffc00</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_Y__SHIFT				10</div><div class='del'>-static inline uint32_t A3XX_VSC_PIPE_CONFIG_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VSC_PIPE_CONFIG_Y__SHIFT) &amp; A3XX_VSC_PIPE_CONFIG_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_W__MASK				0x00f00000</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_W__SHIFT				20</div><div class='del'>-static inline uint32_t A3XX_VSC_PIPE_CONFIG_W(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VSC_PIPE_CONFIG_W__SHIFT) &amp; A3XX_VSC_PIPE_CONFIG_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_H__MASK				0x0f000000</div><div class='del'>-#define A3XX_VSC_PIPE_CONFIG_H__SHIFT				24</div><div class='del'>-static inline uint32_t A3XX_VSC_PIPE_CONFIG_H(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VSC_PIPE_CONFIG_H__SHIFT) &amp; A3XX_VSC_PIPE_CONFIG_H__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VSC_PIPE_DATA_ADDRESS(uint32_t i0) { return 0x00000c07 + 0x3*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_VSC_PIPE_DATA_LENGTH(uint32_t i0) { return 0x00000c08 + 0x3*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VSC_BIN_CONTROL				0x00000c3c</div><div class='del'>-#define A3XX_VSC_BIN_CONTROL_BINNING_ENABLE			0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UNKNOWN_0C3D					0x00000c3d</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_PERFCOUNTER0_SELECT				0x00000c48</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_PERFCOUNTER1_SELECT				0x00000c49</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_PERFCOUNTER2_SELECT				0x00000c4a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_PC_PERFCOUNTER3_SELECT				0x00000c4b</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_TSE_DEBUG_ECO				0x00000c81</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_PERFCOUNTER0_SELECT			0x00000c88</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_PERFCOUNTER1_SELECT			0x00000c89</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_PERFCOUNTER2_SELECT			0x00000c8a</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_PERFCOUNTER3_SELECT			0x00000c8b</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_GRAS_CL_USER_PLANE(i0) (0x00000ca0 + 0x4*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_GRAS_CL_USER_PLANE_X(uint32_t i0) { return 0x00000ca0 + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_GRAS_CL_USER_PLANE_Y(uint32_t i0) { return 0x00000ca1 + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_GRAS_CL_USER_PLANE_Z(uint32_t i0) { return 0x00000ca2 + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A3XX_GRAS_CL_USER_PLANE_W(uint32_t i0) { return 0x00000ca3 + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_GMEM_BASE_ADDR				0x00000cc0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_DEBUG_ECO_CONTROLS_ADDR			0x00000cc1</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_PERFCOUNTER0_SELECT				0x00000cc6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_PERFCOUNTER1_SELECT				0x00000cc7</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_RB_FRAME_BUFFER_DIMENSION			0x00000ce0</div><div class='del'>-#define A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__MASK		0x00003fff</div><div class='del'>-#define A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) &amp; A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__MASK		0x0fffc000</div><div class='del'>-#define A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT		14</div><div class='del'>-static inline uint32_t A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) &amp; A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_PERFCOUNTER0_SELECT			0x00000e00</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_PERFCOUNTER1_SELECT			0x00000e01</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_PERFCOUNTER2_SELECT			0x00000e02</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_PERFCOUNTER3_SELECT			0x00000e03</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_PERFCOUNTER4_SELECT			0x00000e04</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_HLSQ_PERFCOUNTER5_SELECT			0x00000e05</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UNKNOWN_0E43					0x00000e43</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_PERFCOUNTER0_SELECT			0x00000e44</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VFD_PERFCOUNTER1_SELECT			0x00000e45</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_VPC_DEBUG_RAM_SEL				0x00000e61</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_VPC_DEBUG_RAM_READ				0x00000e62</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_PERFCOUNTER0_SELECT			0x00000e64</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VPC_PERFCOUNTER1_SELECT			0x00000e65</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_CACHE_MODE_CONTROL_REG			0x00000e82</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_PERFCOUNTER0_SELECT			0x00000e84</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_PERFCOUNTER1_SELECT			0x00000e85</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_PERFCOUNTER2_SELECT			0x00000e86</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_PERFCOUNTER3_SELECT			0x00000e87</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_PERFCOUNTER4_SELECT			0x00000e88</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_PERFCOUNTER5_SELECT			0x00000e89</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_CACHE_INVALIDATE0_REG			0x00000ea0</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR__MASK		0x0fffffff</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR__SHIFT) &amp; A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UCHE_CACHE_INVALIDATE1_REG			0x00000ea1</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR__MASK		0x0fffffff</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR__SHIFT) &amp; A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE__MASK		0x30000000</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE__SHIFT		28</div><div class='del'>-static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(enum a3xx_cache_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE__SHIFT) &amp; A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_UCHE_CACHE_INVALIDATE1_REG_ENTIRE_CACHE		0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UNKNOWN_0EA6					0x00000ea6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER0_SELECT				0x00000ec4</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER1_SELECT				0x00000ec5</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER2_SELECT				0x00000ec6</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER3_SELECT				0x00000ec7</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER4_SELECT				0x00000ec8</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER5_SELECT				0x00000ec9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER6_SELECT				0x00000eca</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_SP_PERFCOUNTER7_SELECT				0x00000ecb</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UNKNOWN_0EE0					0x00000ee0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_UNKNOWN_0F03					0x00000f03</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP_PERFCOUNTER0_SELECT				0x00000f04</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP_PERFCOUNTER1_SELECT				0x00000f05</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP_PERFCOUNTER2_SELECT				0x00000f06</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP_PERFCOUNTER3_SELECT				0x00000f07</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP_PERFCOUNTER4_SELECT				0x00000f08</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TP_PERFCOUNTER5_SELECT				0x00000f09</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VGT_CL_INITIATOR				0x000021f0</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VGT_EVENT_INITIATOR				0x000021f9</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VGT_DRAW_INITIATOR				0x000021fc</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MASK			0x0000003f</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT		0</div><div class='del'>-static inline uint32_t A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT) &amp; A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__MASK		0x000000c0</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT		6</div><div class='del'>-static inline uint32_t A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT) &amp; A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK			0x00000600</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT			9</div><div class='del'>-static inline uint32_t A3XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT) &amp; A3XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__MASK		0x00000800</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT		11</div><div class='del'>-static inline uint32_t A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT) &amp; A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_NOT_EOP				0x00001000</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_SMALL_INDEX			0x00002000</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_PRE_DRAW_INITIATOR_ENABLE	0x00004000</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK		0xff000000</div><div class='del'>-#define A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT		24</div><div class='del'>-static inline uint32_t A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) &amp; A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_VGT_IMMED_DATA					0x000021fd</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TEX_SAMP_0					0x00000000</div><div class='del'>-#define A3XX_TEX_SAMP_0_CLAMPENABLE				0x00000001</div><div class='del'>-#define A3XX_TEX_SAMP_0_MIPFILTER_LINEAR			0x00000002</div><div class='del'>-#define A3XX_TEX_SAMP_0_XY_MAG__MASK				0x0000000c</div><div class='del'>-#define A3XX_TEX_SAMP_0_XY_MAG__SHIFT				2</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_XY_MAG(enum a3xx_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_XY_MAG__SHIFT) &amp; A3XX_TEX_SAMP_0_XY_MAG__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_XY_MIN__MASK				0x00000030</div><div class='del'>-#define A3XX_TEX_SAMP_0_XY_MIN__SHIFT				4</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_XY_MIN(enum a3xx_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_XY_MIN__SHIFT) &amp; A3XX_TEX_SAMP_0_XY_MIN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_WRAP_S__MASK				0x000001c0</div><div class='del'>-#define A3XX_TEX_SAMP_0_WRAP_S__SHIFT				6</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_WRAP_S(enum a3xx_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_WRAP_S__SHIFT) &amp; A3XX_TEX_SAMP_0_WRAP_S__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_WRAP_T__MASK				0x00000e00</div><div class='del'>-#define A3XX_TEX_SAMP_0_WRAP_T__SHIFT				9</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_WRAP_T(enum a3xx_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_WRAP_T__SHIFT) &amp; A3XX_TEX_SAMP_0_WRAP_T__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_WRAP_R__MASK				0x00007000</div><div class='del'>-#define A3XX_TEX_SAMP_0_WRAP_R__SHIFT				12</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_WRAP_R(enum a3xx_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_WRAP_R__SHIFT) &amp; A3XX_TEX_SAMP_0_WRAP_R__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_ANISO__MASK				0x00038000</div><div class='del'>-#define A3XX_TEX_SAMP_0_ANISO__SHIFT				15</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_ANISO(enum a3xx_tex_aniso val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_ANISO__SHIFT) &amp; A3XX_TEX_SAMP_0_ANISO__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_COMPARE_FUNC__MASK			0x00700000</div><div class='del'>-#define A3XX_TEX_SAMP_0_COMPARE_FUNC__SHIFT			20</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_0_COMPARE_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_SAMP_0_COMPARE_FUNC__SHIFT) &amp; A3XX_TEX_SAMP_0_COMPARE_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_0_CUBEMAPSEAMLESSFILTOFF			0x01000000</div><div class='del'>-#define A3XX_TEX_SAMP_0_UNNORM_COORDS				0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TEX_SAMP_1					0x00000001</div><div class='del'>-#define A3XX_TEX_SAMP_1_LOD_BIAS__MASK				0x000007ff</div><div class='del'>-#define A3XX_TEX_SAMP_1_LOD_BIAS__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_1_LOD_BIAS(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 64.0))) &lt;&lt; A3XX_TEX_SAMP_1_LOD_BIAS__SHIFT) &amp; A3XX_TEX_SAMP_1_LOD_BIAS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_1_MAX_LOD__MASK				0x003ff000</div><div class='del'>-#define A3XX_TEX_SAMP_1_MAX_LOD__SHIFT				12</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_1_MAX_LOD(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 64.0))) &lt;&lt; A3XX_TEX_SAMP_1_MAX_LOD__SHIFT) &amp; A3XX_TEX_SAMP_1_MAX_LOD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_SAMP_1_MIN_LOD__MASK				0xffc00000</div><div class='del'>-#define A3XX_TEX_SAMP_1_MIN_LOD__SHIFT				22</div><div class='del'>-static inline uint32_t A3XX_TEX_SAMP_1_MIN_LOD(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 64.0))) &lt;&lt; A3XX_TEX_SAMP_1_MIN_LOD__SHIFT) &amp; A3XX_TEX_SAMP_1_MIN_LOD__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TEX_CONST_0					0x00000000</div><div class='del'>-#define A3XX_TEX_CONST_0_TILE_MODE__MASK			0x00000003</div><div class='del'>-#define A3XX_TEX_CONST_0_TILE_MODE__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_TILE_MODE(enum a3xx_tile_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_TILE_MODE__SHIFT) &amp; A3XX_TEX_CONST_0_TILE_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_SRGB					0x00000004</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_X__MASK				0x00000070</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_X__SHIFT				4</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_SWIZ_X(enum a3xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_SWIZ_X__SHIFT) &amp; A3XX_TEX_CONST_0_SWIZ_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_Y__MASK				0x00000380</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_Y__SHIFT				7</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_SWIZ_Y(enum a3xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_SWIZ_Y__SHIFT) &amp; A3XX_TEX_CONST_0_SWIZ_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_Z__MASK				0x00001c00</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_Z__SHIFT				10</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_SWIZ_Z(enum a3xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_SWIZ_Z__SHIFT) &amp; A3XX_TEX_CONST_0_SWIZ_Z__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_W__MASK				0x0000e000</div><div class='del'>-#define A3XX_TEX_CONST_0_SWIZ_W__SHIFT				13</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_SWIZ_W(enum a3xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_SWIZ_W__SHIFT) &amp; A3XX_TEX_CONST_0_SWIZ_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_MIPLVLS__MASK				0x000f0000</div><div class='del'>-#define A3XX_TEX_CONST_0_MIPLVLS__SHIFT				16</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_MIPLVLS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_MIPLVLS__SHIFT) &amp; A3XX_TEX_CONST_0_MIPLVLS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_MSAATEX__MASK				0x00300000</div><div class='del'>-#define A3XX_TEX_CONST_0_MSAATEX__SHIFT				20</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_MSAATEX(enum a3xx_tex_msaa val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_MSAATEX__SHIFT) &amp; A3XX_TEX_CONST_0_MSAATEX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_FMT__MASK				0x1fc00000</div><div class='del'>-#define A3XX_TEX_CONST_0_FMT__SHIFT				22</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_FMT(enum a3xx_tex_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_FMT__SHIFT) &amp; A3XX_TEX_CONST_0_FMT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_0_NOCONVERT				0x20000000</div><div class='del'>-#define A3XX_TEX_CONST_0_TYPE__MASK				0xc0000000</div><div class='del'>-#define A3XX_TEX_CONST_0_TYPE__SHIFT				30</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_0_TYPE(enum a3xx_tex_type val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_0_TYPE__SHIFT) &amp; A3XX_TEX_CONST_0_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TEX_CONST_1					0x00000001</div><div class='del'>-#define A3XX_TEX_CONST_1_HEIGHT__MASK				0x00003fff</div><div class='del'>-#define A3XX_TEX_CONST_1_HEIGHT__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_1_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_1_HEIGHT__SHIFT) &amp; A3XX_TEX_CONST_1_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_1_WIDTH__MASK				0x0fffc000</div><div class='del'>-#define A3XX_TEX_CONST_1_WIDTH__SHIFT				14</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_1_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_1_WIDTH__SHIFT) &amp; A3XX_TEX_CONST_1_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_1_PITCHALIGN__MASK			0xf0000000</div><div class='del'>-#define A3XX_TEX_CONST_1_PITCHALIGN__SHIFT			28</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_1_PITCHALIGN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_1_PITCHALIGN__SHIFT) &amp; A3XX_TEX_CONST_1_PITCHALIGN__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TEX_CONST_2					0x00000002</div><div class='del'>-#define A3XX_TEX_CONST_2_INDX__MASK				0x000001ff</div><div class='del'>-#define A3XX_TEX_CONST_2_INDX__SHIFT				0</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_2_INDX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_2_INDX__SHIFT) &amp; A3XX_TEX_CONST_2_INDX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_2_PITCH__MASK				0x3ffff000</div><div class='del'>-#define A3XX_TEX_CONST_2_PITCH__SHIFT				12</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_2_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_2_PITCH__SHIFT) &amp; A3XX_TEX_CONST_2_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_2_SWAP__MASK				0xc0000000</div><div class='del'>-#define A3XX_TEX_CONST_2_SWAP__SHIFT				30</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_2_SWAP__SHIFT) &amp; A3XX_TEX_CONST_2_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A3XX_TEX_CONST_3					0x00000003</div><div class='del'>-#define A3XX_TEX_CONST_3_LAYERSZ1__MASK				0x0001ffff</div><div class='del'>-#define A3XX_TEX_CONST_3_LAYERSZ1__SHIFT			0</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A3XX_TEX_CONST_3_LAYERSZ1__SHIFT) &amp; A3XX_TEX_CONST_3_LAYERSZ1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_3_DEPTH__MASK				0x0ffe0000</div><div class='del'>-#define A3XX_TEX_CONST_3_DEPTH__SHIFT				17</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_3_DEPTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A3XX_TEX_CONST_3_DEPTH__SHIFT) &amp; A3XX_TEX_CONST_3_DEPTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A3XX_TEX_CONST_3_LAYERSZ2__MASK				0xf0000000</div><div class='del'>-#define A3XX_TEX_CONST_3_LAYERSZ2__SHIFT			28</div><div class='del'>-static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A3XX_TEX_CONST_3_LAYERSZ2__SHIFT) &amp; A3XX_TEX_CONST_3_LAYERSZ2__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* A3XX_XML */</div><div class='head'>diff --git a/drivers/gpu/drm/msm/adreno/a4xx.xml.h b/drivers/gpu/drm/msm/adreno/a4xx.xml.h<br/>deleted file mode 100644<br/>index 103a416a787f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a4xx.xml.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a4xx.xml.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,4379 +0,0 @@</div><div class='del'>-#ifndef A4XX_XML</div><div class='del'>-#define A4XX_XML</div><div class='del'>-</div><div class='del'>-/* Autogenerated file, DO NOT EDIT manually!</div><div class='del'>-</div><div class='del'>-This file was generated by the rules-ng-ng gen_header.py tool in this git repository:</div><div class='del'>-http://gitlab.freedesktop.org/mesa/mesa/</div><div class='del'>-git clone https://gitlab.freedesktop.org/mesa/mesa.git</div><div class='del'>-</div><div class='del'>-The rules-ng-ng source files this header was generated from are:</div><div class='del'>-</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a4xx.xml          ( 113474 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml  (   1572 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_common.xml (  15434 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pm4.xml    (  85691 bytes, from Fri Feb 16 09:49:01 2024)</div><div class='del'>-</div><div class='del'>-Copyright (C) 2013-2024 by the following authors:</div><div class='del'>-- Rob Clark &lt;robdclark@gmail.com&gt; Rob Clark</div><div class='del'>-- Ilia Mirkin &lt;imirkin@alum.mit.edu&gt; Ilia Mirkin</div><div class='del'>-</div><div class='del'>-Permission is hereby granted, free of charge, to any person obtaining</div><div class='del'>-a copy of this software and associated documentation files (the</div><div class='del'>-"Software"), to deal in the Software without restriction, including</div><div class='del'>-without limitation the rights to use, copy, modify, merge, publish,</div><div class='del'>-distribute, sublicense, and/or sell copies of the Software, and to</div><div class='del'>-permit persons to whom the Software is furnished to do so, subject to</div><div class='del'>-the following conditions:</div><div class='del'>-</div><div class='del'>-The above copyright notice and this permission notice (including the</div><div class='del'>-next paragraph) shall be included in all copies or substantial</div><div class='del'>-portions of the Software.</div><div class='del'>-</div><div class='del'>-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='del'>-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.</div><div class='del'>-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE</div><div class='del'>-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION</div><div class='del'>-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION</div><div class='del'>-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#define assert(x) BUG_ON(!(x))</div><div class='del'>-#else</div><div class='del'>-#include &lt;assert.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#define __struct_cast(X)</div><div class='del'>-#else</div><div class='del'>-#define __struct_cast(X) (struct X)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum a4xx_color_fmt {</div><div class='del'>-	RB4_A8_UNORM = 1,</div><div class='del'>-	RB4_R8_UNORM = 2,</div><div class='del'>-	RB4_R8_SNORM = 3,</div><div class='del'>-	RB4_R8_UINT = 4,</div><div class='del'>-	RB4_R8_SINT = 5,</div><div class='del'>-	RB4_R4G4B4A4_UNORM = 8,</div><div class='del'>-	RB4_R5G5B5A1_UNORM = 10,</div><div class='del'>-	RB4_R5G6B5_UNORM = 14,</div><div class='del'>-	RB4_R8G8_UNORM = 15,</div><div class='del'>-	RB4_R8G8_SNORM = 16,</div><div class='del'>-	RB4_R8G8_UINT = 17,</div><div class='del'>-	RB4_R8G8_SINT = 18,</div><div class='del'>-	RB4_R16_UNORM = 19,</div><div class='del'>-	RB4_R16_SNORM = 20,</div><div class='del'>-	RB4_R16_FLOAT = 21,</div><div class='del'>-	RB4_R16_UINT = 22,</div><div class='del'>-	RB4_R16_SINT = 23,</div><div class='del'>-	RB4_R8G8B8_UNORM = 25,</div><div class='del'>-	RB4_R8G8B8A8_UNORM = 26,</div><div class='del'>-	RB4_R8G8B8A8_SNORM = 28,</div><div class='del'>-	RB4_R8G8B8A8_UINT = 29,</div><div class='del'>-	RB4_R8G8B8A8_SINT = 30,</div><div class='del'>-	RB4_R10G10B10A2_UNORM = 31,</div><div class='del'>-	RB4_R10G10B10A2_UINT = 34,</div><div class='del'>-	RB4_R11G11B10_FLOAT = 39,</div><div class='del'>-	RB4_R16G16_UNORM = 40,</div><div class='del'>-	RB4_R16G16_SNORM = 41,</div><div class='del'>-	RB4_R16G16_FLOAT = 42,</div><div class='del'>-	RB4_R16G16_UINT = 43,</div><div class='del'>-	RB4_R16G16_SINT = 44,</div><div class='del'>-	RB4_R32_FLOAT = 45,</div><div class='del'>-	RB4_R32_UINT = 46,</div><div class='del'>-	RB4_R32_SINT = 47,</div><div class='del'>-	RB4_R16G16B16A16_UNORM = 52,</div><div class='del'>-	RB4_R16G16B16A16_SNORM = 53,</div><div class='del'>-	RB4_R16G16B16A16_FLOAT = 54,</div><div class='del'>-	RB4_R16G16B16A16_UINT = 55,</div><div class='del'>-	RB4_R16G16B16A16_SINT = 56,</div><div class='del'>-	RB4_R32G32_FLOAT = 57,</div><div class='del'>-	RB4_R32G32_UINT = 58,</div><div class='del'>-	RB4_R32G32_SINT = 59,</div><div class='del'>-	RB4_R32G32B32A32_FLOAT = 60,</div><div class='del'>-	RB4_R32G32B32A32_UINT = 61,</div><div class='del'>-	RB4_R32G32B32A32_SINT = 62,</div><div class='del'>-	RB4_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tile_mode {</div><div class='del'>-	TILE4_LINEAR = 0,</div><div class='del'>-	TILE4_2 = 2,</div><div class='del'>-	TILE4_3 = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_vtx_fmt {</div><div class='del'>-	VFMT4_32_FLOAT = 1,</div><div class='del'>-	VFMT4_32_32_FLOAT = 2,</div><div class='del'>-	VFMT4_32_32_32_FLOAT = 3,</div><div class='del'>-	VFMT4_32_32_32_32_FLOAT = 4,</div><div class='del'>-	VFMT4_16_FLOAT = 5,</div><div class='del'>-	VFMT4_16_16_FLOAT = 6,</div><div class='del'>-	VFMT4_16_16_16_FLOAT = 7,</div><div class='del'>-	VFMT4_16_16_16_16_FLOAT = 8,</div><div class='del'>-	VFMT4_32_FIXED = 9,</div><div class='del'>-	VFMT4_32_32_FIXED = 10,</div><div class='del'>-	VFMT4_32_32_32_FIXED = 11,</div><div class='del'>-	VFMT4_32_32_32_32_FIXED = 12,</div><div class='del'>-	VFMT4_11_11_10_FLOAT = 13,</div><div class='del'>-	VFMT4_16_SINT = 16,</div><div class='del'>-	VFMT4_16_16_SINT = 17,</div><div class='del'>-	VFMT4_16_16_16_SINT = 18,</div><div class='del'>-	VFMT4_16_16_16_16_SINT = 19,</div><div class='del'>-	VFMT4_16_UINT = 20,</div><div class='del'>-	VFMT4_16_16_UINT = 21,</div><div class='del'>-	VFMT4_16_16_16_UINT = 22,</div><div class='del'>-	VFMT4_16_16_16_16_UINT = 23,</div><div class='del'>-	VFMT4_16_SNORM = 24,</div><div class='del'>-	VFMT4_16_16_SNORM = 25,</div><div class='del'>-	VFMT4_16_16_16_SNORM = 26,</div><div class='del'>-	VFMT4_16_16_16_16_SNORM = 27,</div><div class='del'>-	VFMT4_16_UNORM = 28,</div><div class='del'>-	VFMT4_16_16_UNORM = 29,</div><div class='del'>-	VFMT4_16_16_16_UNORM = 30,</div><div class='del'>-	VFMT4_16_16_16_16_UNORM = 31,</div><div class='del'>-	VFMT4_32_UINT = 32,</div><div class='del'>-	VFMT4_32_32_UINT = 33,</div><div class='del'>-	VFMT4_32_32_32_UINT = 34,</div><div class='del'>-	VFMT4_32_32_32_32_UINT = 35,</div><div class='del'>-	VFMT4_32_SINT = 36,</div><div class='del'>-	VFMT4_32_32_SINT = 37,</div><div class='del'>-	VFMT4_32_32_32_SINT = 38,</div><div class='del'>-	VFMT4_32_32_32_32_SINT = 39,</div><div class='del'>-	VFMT4_8_UINT = 40,</div><div class='del'>-	VFMT4_8_8_UINT = 41,</div><div class='del'>-	VFMT4_8_8_8_UINT = 42,</div><div class='del'>-	VFMT4_8_8_8_8_UINT = 43,</div><div class='del'>-	VFMT4_8_UNORM = 44,</div><div class='del'>-	VFMT4_8_8_UNORM = 45,</div><div class='del'>-	VFMT4_8_8_8_UNORM = 46,</div><div class='del'>-	VFMT4_8_8_8_8_UNORM = 47,</div><div class='del'>-	VFMT4_8_SINT = 48,</div><div class='del'>-	VFMT4_8_8_SINT = 49,</div><div class='del'>-	VFMT4_8_8_8_SINT = 50,</div><div class='del'>-	VFMT4_8_8_8_8_SINT = 51,</div><div class='del'>-	VFMT4_8_SNORM = 52,</div><div class='del'>-	VFMT4_8_8_SNORM = 53,</div><div class='del'>-	VFMT4_8_8_8_SNORM = 54,</div><div class='del'>-	VFMT4_8_8_8_8_SNORM = 55,</div><div class='del'>-	VFMT4_10_10_10_2_UINT = 56,</div><div class='del'>-	VFMT4_10_10_10_2_UNORM = 57,</div><div class='del'>-	VFMT4_10_10_10_2_SINT = 58,</div><div class='del'>-	VFMT4_10_10_10_2_SNORM = 59,</div><div class='del'>-	VFMT4_2_10_10_10_UINT = 60,</div><div class='del'>-	VFMT4_2_10_10_10_UNORM = 61,</div><div class='del'>-	VFMT4_2_10_10_10_SINT = 62,</div><div class='del'>-	VFMT4_2_10_10_10_SNORM = 63,</div><div class='del'>-	VFMT4_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tex_fmt {</div><div class='del'>-	TFMT4_A8_UNORM = 3,</div><div class='del'>-	TFMT4_8_UNORM = 4,</div><div class='del'>-	TFMT4_8_SNORM = 5,</div><div class='del'>-	TFMT4_8_UINT = 6,</div><div class='del'>-	TFMT4_8_SINT = 7,</div><div class='del'>-	TFMT4_4_4_4_4_UNORM = 8,</div><div class='del'>-	TFMT4_5_5_5_1_UNORM = 9,</div><div class='del'>-	TFMT4_5_6_5_UNORM = 11,</div><div class='del'>-	TFMT4_L8_A8_UNORM = 13,</div><div class='del'>-	TFMT4_8_8_UNORM = 14,</div><div class='del'>-	TFMT4_8_8_SNORM = 15,</div><div class='del'>-	TFMT4_8_8_UINT = 16,</div><div class='del'>-	TFMT4_8_8_SINT = 17,</div><div class='del'>-	TFMT4_16_UNORM = 18,</div><div class='del'>-	TFMT4_16_SNORM = 19,</div><div class='del'>-	TFMT4_16_FLOAT = 20,</div><div class='del'>-	TFMT4_16_UINT = 21,</div><div class='del'>-	TFMT4_16_SINT = 22,</div><div class='del'>-	TFMT4_8_8_8_8_UNORM = 28,</div><div class='del'>-	TFMT4_8_8_8_8_SNORM = 29,</div><div class='del'>-	TFMT4_8_8_8_8_UINT = 30,</div><div class='del'>-	TFMT4_8_8_8_8_SINT = 31,</div><div class='del'>-	TFMT4_9_9_9_E5_FLOAT = 32,</div><div class='del'>-	TFMT4_10_10_10_2_UNORM = 33,</div><div class='del'>-	TFMT4_10_10_10_2_UINT = 34,</div><div class='del'>-	TFMT4_11_11_10_FLOAT = 37,</div><div class='del'>-	TFMT4_16_16_UNORM = 38,</div><div class='del'>-	TFMT4_16_16_SNORM = 39,</div><div class='del'>-	TFMT4_16_16_FLOAT = 40,</div><div class='del'>-	TFMT4_16_16_UINT = 41,</div><div class='del'>-	TFMT4_16_16_SINT = 42,</div><div class='del'>-	TFMT4_32_FLOAT = 43,</div><div class='del'>-	TFMT4_32_UINT = 44,</div><div class='del'>-	TFMT4_32_SINT = 45,</div><div class='del'>-	TFMT4_16_16_16_16_UNORM = 51,</div><div class='del'>-	TFMT4_16_16_16_16_SNORM = 52,</div><div class='del'>-	TFMT4_16_16_16_16_FLOAT = 53,</div><div class='del'>-	TFMT4_16_16_16_16_UINT = 54,</div><div class='del'>-	TFMT4_16_16_16_16_SINT = 55,</div><div class='del'>-	TFMT4_32_32_FLOAT = 56,</div><div class='del'>-	TFMT4_32_32_UINT = 57,</div><div class='del'>-	TFMT4_32_32_SINT = 58,</div><div class='del'>-	TFMT4_32_32_32_FLOAT = 59,</div><div class='del'>-	TFMT4_32_32_32_UINT = 60,</div><div class='del'>-	TFMT4_32_32_32_SINT = 61,</div><div class='del'>-	TFMT4_32_32_32_32_FLOAT = 63,</div><div class='del'>-	TFMT4_32_32_32_32_UINT = 64,</div><div class='del'>-	TFMT4_32_32_32_32_SINT = 65,</div><div class='del'>-	TFMT4_X8Z24_UNORM = 71,</div><div class='del'>-	TFMT4_DXT1 = 86,</div><div class='del'>-	TFMT4_DXT3 = 87,</div><div class='del'>-	TFMT4_DXT5 = 88,</div><div class='del'>-	TFMT4_RGTC1_UNORM = 90,</div><div class='del'>-	TFMT4_RGTC1_SNORM = 91,</div><div class='del'>-	TFMT4_RGTC2_UNORM = 94,</div><div class='del'>-	TFMT4_RGTC2_SNORM = 95,</div><div class='del'>-	TFMT4_BPTC_UFLOAT = 97,</div><div class='del'>-	TFMT4_BPTC_FLOAT = 98,</div><div class='del'>-	TFMT4_BPTC = 99,</div><div class='del'>-	TFMT4_ATC_RGB = 100,</div><div class='del'>-	TFMT4_ATC_RGBA_EXPLICIT = 101,</div><div class='del'>-	TFMT4_ATC_RGBA_INTERPOLATED = 102,</div><div class='del'>-	TFMT4_ETC2_RG11_UNORM = 103,</div><div class='del'>-	TFMT4_ETC2_RG11_SNORM = 104,</div><div class='del'>-	TFMT4_ETC2_R11_UNORM = 105,</div><div class='del'>-	TFMT4_ETC2_R11_SNORM = 106,</div><div class='del'>-	TFMT4_ETC1 = 107,</div><div class='del'>-	TFMT4_ETC2_RGB8 = 108,</div><div class='del'>-	TFMT4_ETC2_RGBA8 = 109,</div><div class='del'>-	TFMT4_ETC2_RGB8A1 = 110,</div><div class='del'>-	TFMT4_ASTC_4x4 = 111,</div><div class='del'>-	TFMT4_ASTC_5x4 = 112,</div><div class='del'>-	TFMT4_ASTC_5x5 = 113,</div><div class='del'>-	TFMT4_ASTC_6x5 = 114,</div><div class='del'>-	TFMT4_ASTC_6x6 = 115,</div><div class='del'>-	TFMT4_ASTC_8x5 = 116,</div><div class='del'>-	TFMT4_ASTC_8x6 = 117,</div><div class='del'>-	TFMT4_ASTC_8x8 = 118,</div><div class='del'>-	TFMT4_ASTC_10x5 = 119,</div><div class='del'>-	TFMT4_ASTC_10x6 = 120,</div><div class='del'>-	TFMT4_ASTC_10x8 = 121,</div><div class='del'>-	TFMT4_ASTC_10x10 = 122,</div><div class='del'>-	TFMT4_ASTC_12x10 = 123,</div><div class='del'>-	TFMT4_ASTC_12x12 = 124,</div><div class='del'>-	TFMT4_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_depth_format {</div><div class='del'>-	DEPTH4_NONE = 0,</div><div class='del'>-	DEPTH4_16 = 1,</div><div class='del'>-	DEPTH4_24_8 = 2,</div><div class='del'>-	DEPTH4_32 = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_ccu_perfcounter_select {</div><div class='del'>-	CCU_BUSY_CYCLES = 0,</div><div class='del'>-	CCU_RB_DEPTH_RETURN_STALL = 2,</div><div class='del'>-	CCU_RB_COLOR_RETURN_STALL = 3,</div><div class='del'>-	CCU_DEPTH_BLOCKS = 6,</div><div class='del'>-	CCU_COLOR_BLOCKS = 7,</div><div class='del'>-	CCU_DEPTH_BLOCK_HIT = 8,</div><div class='del'>-	CCU_COLOR_BLOCK_HIT = 9,</div><div class='del'>-	CCU_DEPTH_FLAG1_COUNT = 10,</div><div class='del'>-	CCU_DEPTH_FLAG2_COUNT = 11,</div><div class='del'>-	CCU_DEPTH_FLAG3_COUNT = 12,</div><div class='del'>-	CCU_DEPTH_FLAG4_COUNT = 13,</div><div class='del'>-	CCU_COLOR_FLAG1_COUNT = 14,</div><div class='del'>-	CCU_COLOR_FLAG2_COUNT = 15,</div><div class='del'>-	CCU_COLOR_FLAG3_COUNT = 16,</div><div class='del'>-	CCU_COLOR_FLAG4_COUNT = 17,</div><div class='del'>-	CCU_PARTIAL_BLOCK_READ = 18,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_cp_perfcounter_select {</div><div class='del'>-	CP_ALWAYS_COUNT = 0,</div><div class='del'>-	CP_BUSY = 1,</div><div class='del'>-	CP_PFP_IDLE = 2,</div><div class='del'>-	CP_PFP_BUSY_WORKING = 3,</div><div class='del'>-	CP_PFP_STALL_CYCLES_ANY = 4,</div><div class='del'>-	CP_PFP_STARVE_CYCLES_ANY = 5,</div><div class='del'>-	CP_PFP_STARVED_PER_LOAD_ADDR = 6,</div><div class='del'>-	CP_PFP_STALLED_PER_STORE_ADDR = 7,</div><div class='del'>-	CP_PFP_PC_PROFILE = 8,</div><div class='del'>-	CP_PFP_MATCH_PM4_PKT_PROFILE = 9,</div><div class='del'>-	CP_PFP_COND_INDIRECT_DISCARDED = 10,</div><div class='del'>-	CP_LONG_RESUMPTIONS = 11,</div><div class='del'>-	CP_RESUME_CYCLES = 12,</div><div class='del'>-	CP_RESUME_TO_BOUNDARY_CYCLES = 13,</div><div class='del'>-	CP_LONG_PREEMPTIONS = 14,</div><div class='del'>-	CP_PREEMPT_CYCLES = 15,</div><div class='del'>-	CP_PREEMPT_TO_BOUNDARY_CYCLES = 16,</div><div class='del'>-	CP_ME_FIFO_EMPTY_PFP_IDLE = 17,</div><div class='del'>-	CP_ME_FIFO_EMPTY_PFP_BUSY = 18,</div><div class='del'>-	CP_ME_FIFO_NOT_EMPTY_NOT_FULL = 19,</div><div class='del'>-	CP_ME_FIFO_FULL_ME_BUSY = 20,</div><div class='del'>-	CP_ME_FIFO_FULL_ME_NON_WORKING = 21,</div><div class='del'>-	CP_ME_WAITING_FOR_PACKETS = 22,</div><div class='del'>-	CP_ME_BUSY_WORKING = 23,</div><div class='del'>-	CP_ME_STARVE_CYCLES_ANY = 24,</div><div class='del'>-	CP_ME_STARVE_CYCLES_PER_PROFILE = 25,</div><div class='del'>-	CP_ME_STALL_CYCLES_PER_PROFILE = 26,</div><div class='del'>-	CP_ME_PC_PROFILE = 27,</div><div class='del'>-	CP_RCIU_FIFO_EMPTY = 28,</div><div class='del'>-	CP_RCIU_FIFO_NOT_EMPTY_NOT_FULL = 29,</div><div class='del'>-	CP_RCIU_FIFO_FULL = 30,</div><div class='del'>-	CP_RCIU_FIFO_FULL_NO_CONTEXT = 31,</div><div class='del'>-	CP_RCIU_FIFO_FULL_AHB_MASTER = 32,</div><div class='del'>-	CP_RCIU_FIFO_FULL_OTHER = 33,</div><div class='del'>-	CP_AHB_IDLE = 34,</div><div class='del'>-	CP_AHB_STALL_ON_GRANT_NO_SPLIT = 35,</div><div class='del'>-	CP_AHB_STALL_ON_GRANT_SPLIT = 36,</div><div class='del'>-	CP_AHB_STALL_ON_GRANT_SPLIT_PROFILE = 37,</div><div class='del'>-	CP_AHB_BUSY_WORKING = 38,</div><div class='del'>-	CP_AHB_BUSY_STALL_ON_HRDY = 39,</div><div class='del'>-	CP_AHB_BUSY_STALL_ON_HRDY_PROFILE = 40,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_gras_ras_perfcounter_select {</div><div class='del'>-	RAS_SUPER_TILES = 0,</div><div class='del'>-	RAS_8X8_TILES = 1,</div><div class='del'>-	RAS_4X4_TILES = 2,</div><div class='del'>-	RAS_BUSY_CYCLES = 3,</div><div class='del'>-	RAS_STALL_CYCLES_BY_RB = 4,</div><div class='del'>-	RAS_STALL_CYCLES_BY_VSC = 5,</div><div class='del'>-	RAS_STARVE_CYCLES_BY_TSE = 6,</div><div class='del'>-	RAS_SUPERTILE_CYCLES = 7,</div><div class='del'>-	RAS_TILE_CYCLES = 8,</div><div class='del'>-	RAS_FULLY_COVERED_SUPER_TILES = 9,</div><div class='del'>-	RAS_FULLY_COVERED_8X8_TILES = 10,</div><div class='del'>-	RAS_4X4_PRIM = 11,</div><div class='del'>-	RAS_8X4_4X8_PRIM = 12,</div><div class='del'>-	RAS_8X8_PRIM = 13,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_gras_tse_perfcounter_select {</div><div class='del'>-	TSE_INPUT_PRIM = 0,</div><div class='del'>-	TSE_INPUT_NULL_PRIM = 1,</div><div class='del'>-	TSE_TRIVAL_REJ_PRIM = 2,</div><div class='del'>-	TSE_CLIPPED_PRIM = 3,</div><div class='del'>-	TSE_NEW_PRIM = 4,</div><div class='del'>-	TSE_ZERO_AREA_PRIM = 5,</div><div class='del'>-	TSE_FACENESS_CULLED_PRIM = 6,</div><div class='del'>-	TSE_ZERO_PIXEL_PRIM = 7,</div><div class='del'>-	TSE_OUTPUT_NULL_PRIM = 8,</div><div class='del'>-	TSE_OUTPUT_VISIBLE_PRIM = 9,</div><div class='del'>-	TSE_PRE_CLIP_PRIM = 10,</div><div class='del'>-	TSE_POST_CLIP_PRIM = 11,</div><div class='del'>-	TSE_BUSY_CYCLES = 12,</div><div class='del'>-	TSE_PC_STARVE = 13,</div><div class='del'>-	TSE_RAS_STALL = 14,</div><div class='del'>-	TSE_STALL_BARYPLANE_FIFO_FULL = 15,</div><div class='del'>-	TSE_STALL_ZPLANE_FIFO_FULL = 16,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_hlsq_perfcounter_select {</div><div class='del'>-	HLSQ_SP_VS_STAGE_CONSTANT = 0,</div><div class='del'>-	HLSQ_SP_VS_STAGE_INSTRUCTIONS = 1,</div><div class='del'>-	HLSQ_SP_FS_STAGE_CONSTANT = 2,</div><div class='del'>-	HLSQ_SP_FS_STAGE_INSTRUCTIONS = 3,</div><div class='del'>-	HLSQ_TP_STATE = 4,</div><div class='del'>-	HLSQ_QUADS = 5,</div><div class='del'>-	HLSQ_PIXELS = 6,</div><div class='del'>-	HLSQ_VERTICES = 7,</div><div class='del'>-	HLSQ_SP_VS_STAGE_DATA_BYTES = 13,</div><div class='del'>-	HLSQ_SP_FS_STAGE_DATA_BYTES = 14,</div><div class='del'>-	HLSQ_BUSY_CYCLES = 15,</div><div class='del'>-	HLSQ_STALL_CYCLES_SP_STATE = 16,</div><div class='del'>-	HLSQ_STALL_CYCLES_SP_VS_STAGE = 17,</div><div class='del'>-	HLSQ_STALL_CYCLES_SP_FS_STAGE = 18,</div><div class='del'>-	HLSQ_STALL_CYCLES_UCHE = 19,</div><div class='del'>-	HLSQ_RBBM_LOAD_CYCLES = 20,</div><div class='del'>-	HLSQ_DI_TO_VS_START_SP = 21,</div><div class='del'>-	HLSQ_DI_TO_FS_START_SP = 22,</div><div class='del'>-	HLSQ_VS_STAGE_START_TO_DONE_SP = 23,</div><div class='del'>-	HLSQ_FS_STAGE_START_TO_DONE_SP = 24,</div><div class='del'>-	HLSQ_SP_STATE_COPY_CYCLES_VS_STAGE = 25,</div><div class='del'>-	HLSQ_SP_STATE_COPY_CYCLES_FS_STAGE = 26,</div><div class='del'>-	HLSQ_UCHE_LATENCY_CYCLES = 27,</div><div class='del'>-	HLSQ_UCHE_LATENCY_COUNT = 28,</div><div class='del'>-	HLSQ_STARVE_CYCLES_VFD = 29,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_pc_perfcounter_select {</div><div class='del'>-	PC_VIS_STREAMS_LOADED = 0,</div><div class='del'>-	PC_VPC_PRIMITIVES = 2,</div><div class='del'>-	PC_DEAD_PRIM = 3,</div><div class='del'>-	PC_LIVE_PRIM = 4,</div><div class='del'>-	PC_DEAD_DRAWCALLS = 5,</div><div class='del'>-	PC_LIVE_DRAWCALLS = 6,</div><div class='del'>-	PC_VERTEX_MISSES = 7,</div><div class='del'>-	PC_STALL_CYCLES_VFD = 9,</div><div class='del'>-	PC_STALL_CYCLES_TSE = 10,</div><div class='del'>-	PC_STALL_CYCLES_UCHE = 11,</div><div class='del'>-	PC_WORKING_CYCLES = 12,</div><div class='del'>-	PC_IA_VERTICES = 13,</div><div class='del'>-	PC_GS_PRIMITIVES = 14,</div><div class='del'>-	PC_HS_INVOCATIONS = 15,</div><div class='del'>-	PC_DS_INVOCATIONS = 16,</div><div class='del'>-	PC_DS_PRIMITIVES = 17,</div><div class='del'>-	PC_STARVE_CYCLES_FOR_INDEX = 20,</div><div class='del'>-	PC_STARVE_CYCLES_FOR_TESS_FACTOR = 21,</div><div class='del'>-	PC_STARVE_CYCLES_FOR_VIZ_STREAM = 22,</div><div class='del'>-	PC_STALL_CYCLES_TESS = 23,</div><div class='del'>-	PC_STARVE_CYCLES_FOR_POSITION = 24,</div><div class='del'>-	PC_MODE0_DRAWCALL = 25,</div><div class='del'>-	PC_MODE1_DRAWCALL = 26,</div><div class='del'>-	PC_MODE2_DRAWCALL = 27,</div><div class='del'>-	PC_MODE3_DRAWCALL = 28,</div><div class='del'>-	PC_MODE4_DRAWCALL = 29,</div><div class='del'>-	PC_PREDICATED_DEAD_DRAWCALL = 30,</div><div class='del'>-	PC_STALL_CYCLES_BY_TSE_ONLY = 31,</div><div class='del'>-	PC_STALL_CYCLES_BY_VPC_ONLY = 32,</div><div class='del'>-	PC_VPC_POS_DATA_TRANSACTION = 33,</div><div class='del'>-	PC_BUSY_CYCLES = 34,</div><div class='del'>-	PC_STARVE_CYCLES_DI = 35,</div><div class='del'>-	PC_STALL_CYCLES_VPC = 36,</div><div class='del'>-	TESS_WORKING_CYCLES = 37,</div><div class='del'>-	TESS_NUM_CYCLES_SETUP_WORKING = 38,</div><div class='del'>-	TESS_NUM_CYCLES_PTGEN_WORKING = 39,</div><div class='del'>-	TESS_NUM_CYCLES_CONNGEN_WORKING = 40,</div><div class='del'>-	TESS_BUSY_CYCLES = 41,</div><div class='del'>-	TESS_STARVE_CYCLES_PC = 42,</div><div class='del'>-	TESS_STALL_CYCLES_PC = 43,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_pwr_perfcounter_select {</div><div class='del'>-	PWR_CORE_CLOCK_CYCLES = 0,</div><div class='del'>-	PWR_BUSY_CLOCK_CYCLES = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_rb_perfcounter_select {</div><div class='del'>-	RB_BUSY_CYCLES = 0,</div><div class='del'>-	RB_BUSY_CYCLES_BINNING = 1,</div><div class='del'>-	RB_BUSY_CYCLES_RENDERING = 2,</div><div class='del'>-	RB_BUSY_CYCLES_RESOLVE = 3,</div><div class='del'>-	RB_STARVE_CYCLES_BY_SP = 4,</div><div class='del'>-	RB_STARVE_CYCLES_BY_RAS = 5,</div><div class='del'>-	RB_STARVE_CYCLES_BY_MARB = 6,</div><div class='del'>-	RB_STALL_CYCLES_BY_MARB = 7,</div><div class='del'>-	RB_STALL_CYCLES_BY_HLSQ = 8,</div><div class='del'>-	RB_RB_RB_MARB_DATA = 9,</div><div class='del'>-	RB_SP_RB_QUAD = 10,</div><div class='del'>-	RB_RAS_RB_Z_QUADS = 11,</div><div class='del'>-	RB_GMEM_CH0_READ = 12,</div><div class='del'>-	RB_GMEM_CH1_READ = 13,</div><div class='del'>-	RB_GMEM_CH0_WRITE = 14,</div><div class='del'>-	RB_GMEM_CH1_WRITE = 15,</div><div class='del'>-	RB_CP_CONTEXT_DONE = 16,</div><div class='del'>-	RB_CP_CACHE_FLUSH = 17,</div><div class='del'>-	RB_CP_ZPASS_DONE = 18,</div><div class='del'>-	RB_STALL_FIFO0_FULL = 19,</div><div class='del'>-	RB_STALL_FIFO1_FULL = 20,</div><div class='del'>-	RB_STALL_FIFO2_FULL = 21,</div><div class='del'>-	RB_STALL_FIFO3_FULL = 22,</div><div class='del'>-	RB_RB_HLSQ_TRANSACTIONS = 23,</div><div class='del'>-	RB_Z_READ = 24,</div><div class='del'>-	RB_Z_WRITE = 25,</div><div class='del'>-	RB_C_READ = 26,</div><div class='del'>-	RB_C_WRITE = 27,</div><div class='del'>-	RB_C_READ_LATENCY = 28,</div><div class='del'>-	RB_Z_READ_LATENCY = 29,</div><div class='del'>-	RB_STALL_BY_UCHE = 30,</div><div class='del'>-	RB_MARB_UCHE_TRANSACTIONS = 31,</div><div class='del'>-	RB_CACHE_STALL_MISS = 32,</div><div class='del'>-	RB_CACHE_STALL_FIFO_FULL = 33,</div><div class='del'>-	RB_8BIT_BLENDER_UNITS_ACTIVE = 34,</div><div class='del'>-	RB_16BIT_BLENDER_UNITS_ACTIVE = 35,</div><div class='del'>-	RB_SAMPLER_UNITS_ACTIVE = 36,</div><div class='del'>-	RB_TOTAL_PASS = 38,</div><div class='del'>-	RB_Z_PASS = 39,</div><div class='del'>-	RB_Z_FAIL = 40,</div><div class='del'>-	RB_S_FAIL = 41,</div><div class='del'>-	RB_POWER0 = 42,</div><div class='del'>-	RB_POWER1 = 43,</div><div class='del'>-	RB_POWER2 = 44,</div><div class='del'>-	RB_POWER3 = 45,</div><div class='del'>-	RB_POWER4 = 46,</div><div class='del'>-	RB_POWER5 = 47,</div><div class='del'>-	RB_POWER6 = 48,</div><div class='del'>-	RB_POWER7 = 49,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_rbbm_perfcounter_select {</div><div class='del'>-	RBBM_ALWAYS_ON = 0,</div><div class='del'>-	RBBM_VBIF_BUSY = 1,</div><div class='del'>-	RBBM_TSE_BUSY = 2,</div><div class='del'>-	RBBM_RAS_BUSY = 3,</div><div class='del'>-	RBBM_PC_DCALL_BUSY = 4,</div><div class='del'>-	RBBM_PC_VSD_BUSY = 5,</div><div class='del'>-	RBBM_VFD_BUSY = 6,</div><div class='del'>-	RBBM_VPC_BUSY = 7,</div><div class='del'>-	RBBM_UCHE_BUSY = 8,</div><div class='del'>-	RBBM_VSC_BUSY = 9,</div><div class='del'>-	RBBM_HLSQ_BUSY = 10,</div><div class='del'>-	RBBM_ANY_RB_BUSY = 11,</div><div class='del'>-	RBBM_ANY_TPL1_BUSY = 12,</div><div class='del'>-	RBBM_ANY_SP_BUSY = 13,</div><div class='del'>-	RBBM_ANY_MARB_BUSY = 14,</div><div class='del'>-	RBBM_ANY_ARB_BUSY = 15,</div><div class='del'>-	RBBM_AHB_STATUS_BUSY = 16,</div><div class='del'>-	RBBM_AHB_STATUS_STALLED = 17,</div><div class='del'>-	RBBM_AHB_STATUS_TXFR = 18,</div><div class='del'>-	RBBM_AHB_STATUS_TXFR_SPLIT = 19,</div><div class='del'>-	RBBM_AHB_STATUS_TXFR_ERROR = 20,</div><div class='del'>-	RBBM_AHB_STATUS_LONG_STALL = 21,</div><div class='del'>-	RBBM_STATUS_MASKED = 22,</div><div class='del'>-	RBBM_CP_BUSY_GFX_CORE_IDLE = 23,</div><div class='del'>-	RBBM_TESS_BUSY = 24,</div><div class='del'>-	RBBM_COM_BUSY = 25,</div><div class='del'>-	RBBM_DCOM_BUSY = 32,</div><div class='del'>-	RBBM_ANY_CCU_BUSY = 33,</div><div class='del'>-	RBBM_DPM_BUSY = 34,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_sp_perfcounter_select {</div><div class='del'>-	SP_LM_LOAD_INSTRUCTIONS = 0,</div><div class='del'>-	SP_LM_STORE_INSTRUCTIONS = 1,</div><div class='del'>-	SP_LM_ATOMICS = 2,</div><div class='del'>-	SP_GM_LOAD_INSTRUCTIONS = 3,</div><div class='del'>-	SP_GM_STORE_INSTRUCTIONS = 4,</div><div class='del'>-	SP_GM_ATOMICS = 5,</div><div class='del'>-	SP_VS_STAGE_TEX_INSTRUCTIONS = 6,</div><div class='del'>-	SP_VS_STAGE_CFLOW_INSTRUCTIONS = 7,</div><div class='del'>-	SP_VS_STAGE_EFU_INSTRUCTIONS = 8,</div><div class='del'>-	SP_VS_STAGE_FULL_ALU_INSTRUCTIONS = 9,</div><div class='del'>-	SP_VS_STAGE_HALF_ALU_INSTRUCTIONS = 10,</div><div class='del'>-	SP_FS_STAGE_TEX_INSTRUCTIONS = 11,</div><div class='del'>-	SP_FS_STAGE_CFLOW_INSTRUCTIONS = 12,</div><div class='del'>-	SP_FS_STAGE_EFU_INSTRUCTIONS = 13,</div><div class='del'>-	SP_FS_STAGE_FULL_ALU_INSTRUCTIONS = 14,</div><div class='del'>-	SP_FS_STAGE_HALF_ALU_INSTRUCTIONS = 15,</div><div class='del'>-	SP_VS_INSTRUCTIONS = 17,</div><div class='del'>-	SP_FS_INSTRUCTIONS = 18,</div><div class='del'>-	SP_ADDR_LOCK_COUNT = 19,</div><div class='del'>-	SP_UCHE_READ_TRANS = 20,</div><div class='del'>-	SP_UCHE_WRITE_TRANS = 21,</div><div class='del'>-	SP_EXPORT_VPC_TRANS = 22,</div><div class='del'>-	SP_EXPORT_RB_TRANS = 23,</div><div class='del'>-	SP_PIXELS_KILLED = 24,</div><div class='del'>-	SP_ICL1_REQUESTS = 25,</div><div class='del'>-	SP_ICL1_MISSES = 26,</div><div class='del'>-	SP_ICL0_REQUESTS = 27,</div><div class='del'>-	SP_ICL0_MISSES = 28,</div><div class='del'>-	SP_ALU_WORKING_CYCLES = 29,</div><div class='del'>-	SP_EFU_WORKING_CYCLES = 30,</div><div class='del'>-	SP_STALL_CYCLES_BY_VPC = 31,</div><div class='del'>-	SP_STALL_CYCLES_BY_TP = 32,</div><div class='del'>-	SP_STALL_CYCLES_BY_UCHE = 33,</div><div class='del'>-	SP_STALL_CYCLES_BY_RB = 34,</div><div class='del'>-	SP_BUSY_CYCLES = 35,</div><div class='del'>-	SP_HS_INSTRUCTIONS = 36,</div><div class='del'>-	SP_DS_INSTRUCTIONS = 37,</div><div class='del'>-	SP_GS_INSTRUCTIONS = 38,</div><div class='del'>-	SP_CS_INSTRUCTIONS = 39,</div><div class='del'>-	SP_SCHEDULER_NON_WORKING = 40,</div><div class='del'>-	SP_WAVE_CONTEXTS = 41,</div><div class='del'>-	SP_WAVE_CONTEXT_CYCLES = 42,</div><div class='del'>-	SP_POWER0 = 43,</div><div class='del'>-	SP_POWER1 = 44,</div><div class='del'>-	SP_POWER2 = 45,</div><div class='del'>-	SP_POWER3 = 46,</div><div class='del'>-	SP_POWER4 = 47,</div><div class='del'>-	SP_POWER5 = 48,</div><div class='del'>-	SP_POWER6 = 49,</div><div class='del'>-	SP_POWER7 = 50,</div><div class='del'>-	SP_POWER8 = 51,</div><div class='del'>-	SP_POWER9 = 52,</div><div class='del'>-	SP_POWER10 = 53,</div><div class='del'>-	SP_POWER11 = 54,</div><div class='del'>-	SP_POWER12 = 55,</div><div class='del'>-	SP_POWER13 = 56,</div><div class='del'>-	SP_POWER14 = 57,</div><div class='del'>-	SP_POWER15 = 58,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tp_perfcounter_select {</div><div class='del'>-	TP_L1_REQUESTS = 0,</div><div class='del'>-	TP_L1_MISSES = 1,</div><div class='del'>-	TP_QUADS_OFFSET = 8,</div><div class='del'>-	TP_QUAD_SHADOW = 9,</div><div class='del'>-	TP_QUADS_ARRAY = 10,</div><div class='del'>-	TP_QUADS_GRADIENT = 11,</div><div class='del'>-	TP_QUADS_1D2D = 12,</div><div class='del'>-	TP_QUADS_3DCUBE = 13,</div><div class='del'>-	TP_BUSY_CYCLES = 16,</div><div class='del'>-	TP_STALL_CYCLES_BY_ARB = 17,</div><div class='del'>-	TP_STATE_CACHE_REQUESTS = 20,</div><div class='del'>-	TP_STATE_CACHE_MISSES = 21,</div><div class='del'>-	TP_POWER0 = 22,</div><div class='del'>-	TP_POWER1 = 23,</div><div class='del'>-	TP_POWER2 = 24,</div><div class='del'>-	TP_POWER3 = 25,</div><div class='del'>-	TP_POWER4 = 26,</div><div class='del'>-	TP_POWER5 = 27,</div><div class='del'>-	TP_POWER6 = 28,</div><div class='del'>-	TP_POWER7 = 29,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_uche_perfcounter_select {</div><div class='del'>-	UCHE_VBIF_READ_BEATS_TP = 0,</div><div class='del'>-	UCHE_VBIF_READ_BEATS_VFD = 1,</div><div class='del'>-	UCHE_VBIF_READ_BEATS_HLSQ = 2,</div><div class='del'>-	UCHE_VBIF_READ_BEATS_MARB = 3,</div><div class='del'>-	UCHE_VBIF_READ_BEATS_SP = 4,</div><div class='del'>-	UCHE_READ_REQUESTS_TP = 5,</div><div class='del'>-	UCHE_READ_REQUESTS_VFD = 6,</div><div class='del'>-	UCHE_READ_REQUESTS_HLSQ = 7,</div><div class='del'>-	UCHE_READ_REQUESTS_MARB = 8,</div><div class='del'>-	UCHE_READ_REQUESTS_SP = 9,</div><div class='del'>-	UCHE_WRITE_REQUESTS_MARB = 10,</div><div class='del'>-	UCHE_WRITE_REQUESTS_SP = 11,</div><div class='del'>-	UCHE_TAG_CHECK_FAILS = 12,</div><div class='del'>-	UCHE_EVICTS = 13,</div><div class='del'>-	UCHE_FLUSHES = 14,</div><div class='del'>-	UCHE_VBIF_LATENCY_CYCLES = 15,</div><div class='del'>-	UCHE_VBIF_LATENCY_SAMPLES = 16,</div><div class='del'>-	UCHE_BUSY_CYCLES = 17,</div><div class='del'>-	UCHE_VBIF_READ_BEATS_PC = 18,</div><div class='del'>-	UCHE_READ_REQUESTS_PC = 19,</div><div class='del'>-	UCHE_WRITE_REQUESTS_VPC = 20,</div><div class='del'>-	UCHE_STALL_BY_VBIF = 21,</div><div class='del'>-	UCHE_WRITE_REQUESTS_VSC = 22,</div><div class='del'>-	UCHE_POWER0 = 23,</div><div class='del'>-	UCHE_POWER1 = 24,</div><div class='del'>-	UCHE_POWER2 = 25,</div><div class='del'>-	UCHE_POWER3 = 26,</div><div class='del'>-	UCHE_POWER4 = 27,</div><div class='del'>-	UCHE_POWER5 = 28,</div><div class='del'>-	UCHE_POWER6 = 29,</div><div class='del'>-	UCHE_POWER7 = 30,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_vbif_perfcounter_select {</div><div class='del'>-	AXI_READ_REQUESTS_ID_0 = 0,</div><div class='del'>-	AXI_READ_REQUESTS_ID_1 = 1,</div><div class='del'>-	AXI_READ_REQUESTS_ID_2 = 2,</div><div class='del'>-	AXI_READ_REQUESTS_ID_3 = 3,</div><div class='del'>-	AXI_READ_REQUESTS_ID_4 = 4,</div><div class='del'>-	AXI_READ_REQUESTS_ID_5 = 5,</div><div class='del'>-	AXI_READ_REQUESTS_ID_6 = 6,</div><div class='del'>-	AXI_READ_REQUESTS_ID_7 = 7,</div><div class='del'>-	AXI_READ_REQUESTS_ID_8 = 8,</div><div class='del'>-	AXI_READ_REQUESTS_ID_9 = 9,</div><div class='del'>-	AXI_READ_REQUESTS_ID_10 = 10,</div><div class='del'>-	AXI_READ_REQUESTS_ID_11 = 11,</div><div class='del'>-	AXI_READ_REQUESTS_ID_12 = 12,</div><div class='del'>-	AXI_READ_REQUESTS_ID_13 = 13,</div><div class='del'>-	AXI_READ_REQUESTS_ID_14 = 14,</div><div class='del'>-	AXI_READ_REQUESTS_ID_15 = 15,</div><div class='del'>-	AXI0_READ_REQUESTS_TOTAL = 16,</div><div class='del'>-	AXI1_READ_REQUESTS_TOTAL = 17,</div><div class='del'>-	AXI2_READ_REQUESTS_TOTAL = 18,</div><div class='del'>-	AXI3_READ_REQUESTS_TOTAL = 19,</div><div class='del'>-	AXI_READ_REQUESTS_TOTAL = 20,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_0 = 21,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_1 = 22,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_2 = 23,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_3 = 24,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_4 = 25,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_5 = 26,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_6 = 27,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_7 = 28,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_8 = 29,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_9 = 30,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_10 = 31,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_11 = 32,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_12 = 33,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_13 = 34,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_14 = 35,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_15 = 36,</div><div class='del'>-	AXI0_WRITE_REQUESTS_TOTAL = 37,</div><div class='del'>-	AXI1_WRITE_REQUESTS_TOTAL = 38,</div><div class='del'>-	AXI2_WRITE_REQUESTS_TOTAL = 39,</div><div class='del'>-	AXI3_WRITE_REQUESTS_TOTAL = 40,</div><div class='del'>-	AXI_WRITE_REQUESTS_TOTAL = 41,</div><div class='del'>-	AXI_TOTAL_REQUESTS = 42,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_0 = 43,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_1 = 44,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_2 = 45,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_3 = 46,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_4 = 47,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_5 = 48,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_6 = 49,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_7 = 50,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_8 = 51,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_9 = 52,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_10 = 53,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_11 = 54,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_12 = 55,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_13 = 56,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_14 = 57,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_15 = 58,</div><div class='del'>-	AXI0_READ_DATA_BEATS_TOTAL = 59,</div><div class='del'>-	AXI1_READ_DATA_BEATS_TOTAL = 60,</div><div class='del'>-	AXI2_READ_DATA_BEATS_TOTAL = 61,</div><div class='del'>-	AXI3_READ_DATA_BEATS_TOTAL = 62,</div><div class='del'>-	AXI_READ_DATA_BEATS_TOTAL = 63,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_0 = 64,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_1 = 65,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_2 = 66,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_3 = 67,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_4 = 68,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_5 = 69,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_6 = 70,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_7 = 71,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_8 = 72,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_9 = 73,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_10 = 74,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_11 = 75,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_12 = 76,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_13 = 77,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_14 = 78,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_15 = 79,</div><div class='del'>-	AXI0_WRITE_DATA_BEATS_TOTAL = 80,</div><div class='del'>-	AXI1_WRITE_DATA_BEATS_TOTAL = 81,</div><div class='del'>-	AXI2_WRITE_DATA_BEATS_TOTAL = 82,</div><div class='del'>-	AXI3_WRITE_DATA_BEATS_TOTAL = 83,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_TOTAL = 84,</div><div class='del'>-	AXI_DATA_BEATS_TOTAL = 85,</div><div class='del'>-	CYCLES_HELD_OFF_ID_0 = 86,</div><div class='del'>-	CYCLES_HELD_OFF_ID_1 = 87,</div><div class='del'>-	CYCLES_HELD_OFF_ID_2 = 88,</div><div class='del'>-	CYCLES_HELD_OFF_ID_3 = 89,</div><div class='del'>-	CYCLES_HELD_OFF_ID_4 = 90,</div><div class='del'>-	CYCLES_HELD_OFF_ID_5 = 91,</div><div class='del'>-	CYCLES_HELD_OFF_ID_6 = 92,</div><div class='del'>-	CYCLES_HELD_OFF_ID_7 = 93,</div><div class='del'>-	CYCLES_HELD_OFF_ID_8 = 94,</div><div class='del'>-	CYCLES_HELD_OFF_ID_9 = 95,</div><div class='del'>-	CYCLES_HELD_OFF_ID_10 = 96,</div><div class='del'>-	CYCLES_HELD_OFF_ID_11 = 97,</div><div class='del'>-	CYCLES_HELD_OFF_ID_12 = 98,</div><div class='del'>-	CYCLES_HELD_OFF_ID_13 = 99,</div><div class='del'>-	CYCLES_HELD_OFF_ID_14 = 100,</div><div class='del'>-	CYCLES_HELD_OFF_ID_15 = 101,</div><div class='del'>-	AXI_READ_REQUEST_HELD_OFF = 102,</div><div class='del'>-	AXI_WRITE_REQUEST_HELD_OFF = 103,</div><div class='del'>-	AXI_REQUEST_HELD_OFF = 104,</div><div class='del'>-	AXI_WRITE_DATA_HELD_OFF = 105,</div><div class='del'>-	OCMEM_AXI_READ_REQUEST_HELD_OFF = 106,</div><div class='del'>-	OCMEM_AXI_WRITE_REQUEST_HELD_OFF = 107,</div><div class='del'>-	OCMEM_AXI_REQUEST_HELD_OFF = 108,</div><div class='del'>-	OCMEM_AXI_WRITE_DATA_HELD_OFF = 109,</div><div class='del'>-	ELAPSED_CYCLES_DDR = 110,</div><div class='del'>-	ELAPSED_CYCLES_OCMEM = 111,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_vfd_perfcounter_select {</div><div class='del'>-	VFD_UCHE_BYTE_FETCHED = 0,</div><div class='del'>-	VFD_UCHE_TRANS = 1,</div><div class='del'>-	VFD_FETCH_INSTRUCTIONS = 3,</div><div class='del'>-	VFD_BUSY_CYCLES = 5,</div><div class='del'>-	VFD_STALL_CYCLES_UCHE = 6,</div><div class='del'>-	VFD_STALL_CYCLES_HLSQ = 7,</div><div class='del'>-	VFD_STALL_CYCLES_VPC_BYPASS = 8,</div><div class='del'>-	VFD_STALL_CYCLES_VPC_ALLOC = 9,</div><div class='del'>-	VFD_MODE_0_FIBERS = 13,</div><div class='del'>-	VFD_MODE_1_FIBERS = 14,</div><div class='del'>-	VFD_MODE_2_FIBERS = 15,</div><div class='del'>-	VFD_MODE_3_FIBERS = 16,</div><div class='del'>-	VFD_MODE_4_FIBERS = 17,</div><div class='del'>-	VFD_BFIFO_STALL = 18,</div><div class='del'>-	VFD_NUM_VERTICES_TOTAL = 19,</div><div class='del'>-	VFD_PACKER_FULL = 20,</div><div class='del'>-	VFD_UCHE_REQUEST_FIFO_FULL = 21,</div><div class='del'>-	VFD_STARVE_CYCLES_PC = 22,</div><div class='del'>-	VFD_STARVE_CYCLES_UCHE = 23,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_vpc_perfcounter_select {</div><div class='del'>-	VPC_SP_LM_COMPONENTS = 2,</div><div class='del'>-	VPC_SP0_LM_BYTES = 3,</div><div class='del'>-	VPC_SP1_LM_BYTES = 4,</div><div class='del'>-	VPC_SP2_LM_BYTES = 5,</div><div class='del'>-	VPC_SP3_LM_BYTES = 6,</div><div class='del'>-	VPC_WORKING_CYCLES = 7,</div><div class='del'>-	VPC_STALL_CYCLES_LM = 8,</div><div class='del'>-	VPC_STARVE_CYCLES_RAS = 9,</div><div class='del'>-	VPC_STREAMOUT_CYCLES = 10,</div><div class='del'>-	VPC_UCHE_TRANSACTIONS = 12,</div><div class='del'>-	VPC_STALL_CYCLES_UCHE = 13,</div><div class='del'>-	VPC_BUSY_CYCLES = 14,</div><div class='del'>-	VPC_STARVE_CYCLES_SP = 15,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_vsc_perfcounter_select {</div><div class='del'>-	VSC_BUSY_CYCLES = 0,</div><div class='del'>-	VSC_WORKING_CYCLES = 1,</div><div class='del'>-	VSC_STALL_CYCLES_UCHE = 2,</div><div class='del'>-	VSC_STARVE_CYCLES_RAS = 3,</div><div class='del'>-	VSC_EOT_NUM = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tex_filter {</div><div class='del'>-	A4XX_TEX_NEAREST = 0,</div><div class='del'>-	A4XX_TEX_LINEAR = 1,</div><div class='del'>-	A4XX_TEX_ANISO = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tex_clamp {</div><div class='del'>-	A4XX_TEX_REPEAT = 0,</div><div class='del'>-	A4XX_TEX_CLAMP_TO_EDGE = 1,</div><div class='del'>-	A4XX_TEX_MIRROR_REPEAT = 2,</div><div class='del'>-	A4XX_TEX_CLAMP_TO_BORDER = 3,</div><div class='del'>-	A4XX_TEX_MIRROR_CLAMP = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tex_aniso {</div><div class='del'>-	A4XX_TEX_ANISO_1 = 0,</div><div class='del'>-	A4XX_TEX_ANISO_2 = 1,</div><div class='del'>-	A4XX_TEX_ANISO_4 = 2,</div><div class='del'>-	A4XX_TEX_ANISO_8 = 3,</div><div class='del'>-	A4XX_TEX_ANISO_16 = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tex_swiz {</div><div class='del'>-	A4XX_TEX_X = 0,</div><div class='del'>-	A4XX_TEX_Y = 1,</div><div class='del'>-	A4XX_TEX_Z = 2,</div><div class='del'>-	A4XX_TEX_W = 3,</div><div class='del'>-	A4XX_TEX_ZERO = 4,</div><div class='del'>-	A4XX_TEX_ONE = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a4xx_tex_type {</div><div class='del'>-	A4XX_TEX_1D = 0,</div><div class='del'>-	A4XX_TEX_2D = 1,</div><div class='del'>-	A4XX_TEX_CUBE = 2,</div><div class='del'>-	A4XX_TEX_3D = 3,</div><div class='del'>-	A4XX_TEX_BUFFER = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define A4XX_CGC_HLSQ_EARLY_CYC__MASK				0x00700000</div><div class='del'>-#define A4XX_CGC_HLSQ_EARLY_CYC__SHIFT				20</div><div class='del'>-static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_CGC_HLSQ_EARLY_CYC__SHIFT) &amp; A4XX_CGC_HLSQ_EARLY_CYC__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define A4XX_INT0_RBBM_GPU_IDLE					0x00000001</div><div class='del'>-#define A4XX_INT0_RBBM_AHB_ERROR				0x00000002</div><div class='del'>-#define A4XX_INT0_RBBM_REG_TIMEOUT				0x00000004</div><div class='del'>-#define A4XX_INT0_RBBM_ME_MS_TIMEOUT				0x00000008</div><div class='del'>-#define A4XX_INT0_RBBM_PFP_MS_TIMEOUT				0x00000010</div><div class='del'>-#define A4XX_INT0_RBBM_ATB_BUS_OVERFLOW				0x00000020</div><div class='del'>-#define A4XX_INT0_VFD_ERROR					0x00000040</div><div class='del'>-#define A4XX_INT0_CP_SW_INT					0x00000080</div><div class='del'>-#define A4XX_INT0_CP_T0_PACKET_IN_IB				0x00000100</div><div class='del'>-#define A4XX_INT0_CP_OPCODE_ERROR				0x00000200</div><div class='del'>-#define A4XX_INT0_CP_RESERVED_BIT_ERROR				0x00000400</div><div class='del'>-#define A4XX_INT0_CP_HW_FAULT					0x00000800</div><div class='del'>-#define A4XX_INT0_CP_DMA					0x00001000</div><div class='del'>-#define A4XX_INT0_CP_IB2_INT					0x00002000</div><div class='del'>-#define A4XX_INT0_CP_IB1_INT					0x00004000</div><div class='del'>-#define A4XX_INT0_CP_RB_INT					0x00008000</div><div class='del'>-#define A4XX_INT0_CP_REG_PROTECT_FAULT				0x00010000</div><div class='del'>-#define A4XX_INT0_CP_RB_DONE_TS					0x00020000</div><div class='del'>-#define A4XX_INT0_CP_VS_DONE_TS					0x00040000</div><div class='del'>-#define A4XX_INT0_CP_PS_DONE_TS					0x00080000</div><div class='del'>-#define A4XX_INT0_CACHE_FLUSH_TS				0x00100000</div><div class='del'>-#define A4XX_INT0_CP_AHB_ERROR_HALT				0x00200000</div><div class='del'>-#define A4XX_INT0_MISC_HANG_DETECT				0x01000000</div><div class='del'>-#define A4XX_INT0_UCHE_OOB_ACCESS				0x02000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_GMEM_BASE_ADDR				0x00000cc0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_0				0x00000cc7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_1				0x00000cc8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_2				0x00000cc9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_3				0x00000cca</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_4				0x00000ccb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_5				0x00000ccc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_6				0x00000ccd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_RB_SEL_7				0x00000cce</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_CCU_SEL_0				0x00000ccf</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_CCU_SEL_1				0x00000cd0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_CCU_SEL_2				0x00000cd1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_PERFCTR_CCU_SEL_3				0x00000cd2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_FRAME_BUFFER_DIMENSION			0x00000ce0</div><div class='del'>-#define A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__MASK		0x00003fff</div><div class='del'>-#define A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) &amp; A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__MASK		0x3fff0000</div><div class='del'>-#define A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT		16</div><div class='del'>-static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) &amp; A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_CLEAR_COLOR_DW0				0x000020cc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_CLEAR_COLOR_DW1				0x000020cd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_CLEAR_COLOR_DW2				0x000020ce</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_CLEAR_COLOR_DW3				0x000020cf</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_MODE_CONTROL				0x000020a0</div><div class='del'>-#define A4XX_RB_MODE_CONTROL_WIDTH__MASK			0x0000003f</div><div class='del'>-#define A4XX_RB_MODE_CONTROL_WIDTH__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_MODE_CONTROL_WIDTH__SHIFT) &amp; A4XX_RB_MODE_CONTROL_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MODE_CONTROL_HEIGHT__MASK			0x00003f00</div><div class='del'>-#define A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT) &amp; A4XX_RB_MODE_CONTROL_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MODE_CONTROL_ENABLE_GMEM			0x00010000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_RENDER_CONTROL				0x000020a1</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL_BINNING_PASS			0x00000001</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE		0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_MSAA_CONTROL				0x000020a2</div><div class='del'>-#define A4XX_RB_MSAA_CONTROL_DISABLE				0x00001000</div><div class='del'>-#define A4XX_RB_MSAA_CONTROL_SAMPLES__MASK			0x0000e000</div><div class='del'>-#define A4XX_RB_MSAA_CONTROL_SAMPLES__SHIFT			13</div><div class='del'>-static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) &amp; A4XX_RB_MSAA_CONTROL_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_RENDER_CONTROL2				0x000020a3</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_COORD_MASK__MASK		0x0000000f</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_COORD_MASK__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_CONTROL2_COORD_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_CONTROL2_COORD_MASK__SHIFT) &amp; A4XX_RB_RENDER_CONTROL2_COORD_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_SAMPLEMASK			0x00000010</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_FACENESS			0x00000020</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_SAMPLEID			0x00000040</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__MASK		0x00000380</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__SHIFT		7</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__SHIFT) &amp; A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_SAMPLEID_HR			0x00000800</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_IJ_PERSP_PIXEL			0x00001000</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_IJ_PERSP_CENTROID		0x00002000</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_IJ_PERSP_SAMPLE			0x00004000</div><div class='del'>-#define A4XX_RB_RENDER_CONTROL2_SIZE				0x00008000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_MRT(i0) (0x000020a4 + 0x5*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_MRT_CONTROL(uint32_t i0) { return 0x000020a4 + 0x5*i0; }</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE			0x00000008</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_BLEND				0x00000010</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_BLEND2				0x00000020</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_ROP_ENABLE				0x00000040</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_ROP_CODE__MASK			0x00000f00</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_ROP_CODE__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) &amp; A4XX_RB_MRT_CONTROL_ROP_CODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK		0x0f000000</div><div class='del'>-#define A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) &amp; A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x000020a5 + 0x5*i0; }</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK			0x0000003f</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) &amp; A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK		0x000000c0</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT		6</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a4xx_tile_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) &amp; A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK			0x00000600</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT			9</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) &amp; A4XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK			0x00001800</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT			11</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) &amp; A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_SRGB				0x00002000</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK		0xffffc000</div><div class='del'>-#define A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT		14</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xf));</div><div class='del'>-	return (((val &gt;&gt; 4)) &lt;&lt; A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) &amp; A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_MRT_BASE(uint32_t i0) { return 0x000020a6 + 0x5*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_MRT_CONTROL3(uint32_t i0) { return 0x000020a7 + 0x5*i0; }</div><div class='del'>-#define A4XX_RB_MRT_CONTROL3_STRIDE__MASK			0x03fffff8</div><div class='del'>-#define A4XX_RB_MRT_CONTROL3_STRIDE__SHIFT			3</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_CONTROL3_STRIDE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_CONTROL3_STRIDE__SHIFT) &amp; A4XX_RB_MRT_CONTROL3_STRIDE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x000020a8 + 0x5*i0; }</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK		0x0000001f</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) &amp; A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK	0x000000e0</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT	5</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) &amp; A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK		0x00001f00</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) &amp; A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK	0x001f0000</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) &amp; A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK	0x00e00000</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT	21</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) &amp; A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK	0x1f000000</div><div class='del'>-#define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT	24</div><div class='del'>-static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) &amp; A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_RED					0x000020f0</div><div class='del'>-#define A4XX_RB_BLEND_RED_UINT__MASK				0x000000ff</div><div class='del'>-#define A4XX_RB_BLEND_RED_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_RED_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_RED_UINT__SHIFT) &amp; A4XX_RB_BLEND_RED_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_RED_SINT__MASK				0x0000ff00</div><div class='del'>-#define A4XX_RB_BLEND_RED_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_RED_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_RED_SINT__SHIFT) &amp; A4XX_RB_BLEND_RED_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_RED_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A4XX_RB_BLEND_RED_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_RED_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A4XX_RB_BLEND_RED_FLOAT__SHIFT) &amp; A4XX_RB_BLEND_RED_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_RED_F32				0x000020f1</div><div class='del'>-#define A4XX_RB_BLEND_RED_F32__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_BLEND_RED_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_RED_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_RB_BLEND_RED_F32__SHIFT) &amp; A4XX_RB_BLEND_RED_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_GREEN					0x000020f2</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_UINT__MASK				0x000000ff</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_GREEN_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_GREEN_UINT__SHIFT) &amp; A4XX_RB_BLEND_GREEN_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_SINT__MASK				0x0000ff00</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_GREEN_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_GREEN_SINT__SHIFT) &amp; A4XX_RB_BLEND_GREEN_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_FLOAT__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_GREEN_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A4XX_RB_BLEND_GREEN_FLOAT__SHIFT) &amp; A4XX_RB_BLEND_GREEN_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_GREEN_F32				0x000020f3</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_F32__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_BLEND_GREEN_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_GREEN_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_RB_BLEND_GREEN_F32__SHIFT) &amp; A4XX_RB_BLEND_GREEN_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_BLUE					0x000020f4</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_UINT__MASK				0x000000ff</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_BLUE_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_BLUE_UINT__SHIFT) &amp; A4XX_RB_BLEND_BLUE_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_SINT__MASK				0x0000ff00</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_BLUE_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_BLUE_SINT__SHIFT) &amp; A4XX_RB_BLEND_BLUE_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_BLUE_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A4XX_RB_BLEND_BLUE_FLOAT__SHIFT) &amp; A4XX_RB_BLEND_BLUE_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_BLUE_F32				0x000020f5</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_F32__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_BLEND_BLUE_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_BLUE_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_RB_BLEND_BLUE_F32__SHIFT) &amp; A4XX_RB_BLEND_BLUE_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_ALPHA					0x000020f6</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_UINT__MASK				0x000000ff</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_ALPHA_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_ALPHA_UINT__SHIFT) &amp; A4XX_RB_BLEND_ALPHA_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_SINT__MASK				0x0000ff00</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_ALPHA_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BLEND_ALPHA_SINT__SHIFT) &amp; A4XX_RB_BLEND_ALPHA_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_FLOAT__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_ALPHA_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A4XX_RB_BLEND_ALPHA_FLOAT__SHIFT) &amp; A4XX_RB_BLEND_ALPHA_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BLEND_ALPHA_F32				0x000020f7</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_F32__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_BLEND_ALPHA_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BLEND_ALPHA_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_RB_BLEND_ALPHA_F32__SHIFT) &amp; A4XX_RB_BLEND_ALPHA_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_ALPHA_CONTROL				0x000020f8</div><div class='del'>-#define A4XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK			0x000000ff</div><div class='del'>-#define A4XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) &amp; A4XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_ALPHA_CONTROL_ALPHA_TEST			0x00000100</div><div class='del'>-#define A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__MASK		0x00000e00</div><div class='del'>-#define A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT		9</div><div class='del'>-static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) &amp; A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_FS_OUTPUT					0x000020f9</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_ENABLE_BLEND__MASK			0x000000ff</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_ENABLE_BLEND__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_FS_OUTPUT_ENABLE_BLEND(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_FS_OUTPUT_ENABLE_BLEND__SHIFT) &amp; A4XX_RB_FS_OUTPUT_ENABLE_BLEND__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_INDEPENDENT_BLEND			0x00000100</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_SAMPLE_MASK__MASK			0xffff0000</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_SAMPLE_MASK__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_RB_FS_OUTPUT_SAMPLE_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_FS_OUTPUT_SAMPLE_MASK__SHIFT) &amp; A4XX_RB_FS_OUTPUT_SAMPLE_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_SAMPLE_COUNT_CONTROL			0x000020fa</div><div class='del'>-#define A4XX_RB_SAMPLE_COUNT_CONTROL_COPY			0x00000002</div><div class='del'>-#define A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__MASK			0xfffffffc</div><div class='del'>-#define A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT		2</div><div class='del'>-static inline uint32_t A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3));</div><div class='del'>-	return (((val &gt;&gt; 2)) &lt;&lt; A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT) &amp; A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_RENDER_COMPONENTS				0x000020fb</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT0__MASK			0x0000000f</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT0__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT1__MASK			0x000000f0</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT1__SHIFT			4</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT1__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT2__MASK			0x00000f00</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT2__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT2__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT3__MASK			0x0000f000</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT3__SHIFT			12</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT3__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT3__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT4__MASK			0x000f0000</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT4__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT4__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT4__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT5__MASK			0x00f00000</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT5__SHIFT			20</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT5__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT5__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT6__MASK			0x0f000000</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT6__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT6__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT6__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT7__MASK			0xf0000000</div><div class='del'>-#define A4XX_RB_RENDER_COMPONENTS_RT7__SHIFT			28</div><div class='del'>-static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_RENDER_COMPONENTS_RT7__SHIFT) &amp; A4XX_RB_RENDER_COMPONENTS_RT7__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_COPY_CONTROL				0x000020fc</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__MASK			0x00000003</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) &amp; A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_MODE__MASK				0x00000070</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_MODE__SHIFT			4</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_CONTROL_MODE__SHIFT) &amp; A4XX_RB_COPY_CONTROL_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_FASTCLEAR__MASK			0x00000f00</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) &amp; A4XX_RB_COPY_CONTROL_FASTCLEAR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_GMEM_BASE__MASK			0xffffc000</div><div class='del'>-#define A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT			14</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3fff));</div><div class='del'>-	return (((val &gt;&gt; 14)) &lt;&lt; A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) &amp; A4XX_RB_COPY_CONTROL_GMEM_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_COPY_DEST_BASE				0x000020fd</div><div class='del'>-#define A4XX_RB_COPY_DEST_BASE_BASE__MASK			0xffffffe0</div><div class='del'>-#define A4XX_RB_COPY_DEST_BASE_BASE__SHIFT			5</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_COPY_DEST_BASE_BASE__SHIFT) &amp; A4XX_RB_COPY_DEST_BASE_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_COPY_DEST_PITCH				0x000020fe</div><div class='del'>-#define A4XX_RB_COPY_DEST_PITCH_PITCH__MASK			0xffffffff</div><div class='del'>-#define A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) &amp; A4XX_RB_COPY_DEST_PITCH_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_COPY_DEST_INFO				0x000020ff</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_FORMAT__MASK			0x000000fc</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_FORMAT__SHIFT			2</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_INFO_FORMAT(enum a4xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) &amp; A4XX_RB_COPY_DEST_INFO_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_SWAP__MASK			0x00000300</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_SWAP__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_DEST_INFO_SWAP__SHIFT) &amp; A4XX_RB_COPY_DEST_INFO_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_DITHER_MODE__MASK		0x00000c00</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT		10</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) &amp; A4XX_RB_COPY_DEST_INFO_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__MASK		0x0003c000</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT		14</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) &amp; A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_ENDIAN__MASK			0x001c0000</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT			18</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) &amp; A4XX_RB_COPY_DEST_INFO_ENDIAN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_TILE__MASK			0x03000000</div><div class='del'>-#define A4XX_RB_COPY_DEST_INFO_TILE__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_RB_COPY_DEST_INFO_TILE(enum a4xx_tile_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_COPY_DEST_INFO_TILE__SHIFT) &amp; A4XX_RB_COPY_DEST_INFO_TILE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_FS_OUTPUT_REG				0x00002100</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_REG_MRT__MASK				0x0000000f</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_REG_MRT__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_FS_OUTPUT_REG_MRT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_FS_OUTPUT_REG_MRT__SHIFT) &amp; A4XX_RB_FS_OUTPUT_REG_MRT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_FS_OUTPUT_REG_FRAG_WRITES_Z			0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_DEPTH_CONTROL				0x00002101</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_FRAG_WRITES_Z			0x00000001</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE			0x00000002</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE			0x00000004</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_ZFUNC__MASK			0x00000070</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT			4</div><div class='del'>-static inline uint32_t A4XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) &amp; A4XX_RB_DEPTH_CONTROL_ZFUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_Z_CLAMP_ENABLE			0x00000080</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE			0x00010000</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_FORCE_FRAGZ_TO_FS			0x00020000</div><div class='del'>-#define A4XX_RB_DEPTH_CONTROL_Z_READ_ENABLE			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_DEPTH_CLEAR					0x00002102</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_DEPTH_INFO					0x00002103</div><div class='del'>-#define A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK			0x00000003</div><div class='del'>-#define A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum a4xx_depth_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) &amp; A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK			0xfffff000</div><div class='del'>-#define A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT			12</div><div class='del'>-static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) &amp; A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_DEPTH_PITCH					0x00002104</div><div class='del'>-#define A4XX_RB_DEPTH_PITCH__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_DEPTH_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_DEPTH_PITCH__SHIFT) &amp; A4XX_RB_DEPTH_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_DEPTH_PITCH2				0x00002105</div><div class='del'>-#define A4XX_RB_DEPTH_PITCH2__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_DEPTH_PITCH2__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_DEPTH_PITCH2__SHIFT) &amp; A4XX_RB_DEPTH_PITCH2__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_STENCIL_CONTROL				0x00002106</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE			0x00000001</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF		0x00000002</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_STENCIL_READ			0x00000004</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FUNC__MASK			0x00000700</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FUNC__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_FUNC__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FAIL__MASK			0x00003800</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FAIL__SHIFT			11</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_FAIL__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_FAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZPASS__MASK			0x0001c000</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZPASS__SHIFT			14</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_ZPASS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZFAIL__MASK			0x000e0000</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT			17</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_ZFAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FUNC_BF__MASK			0x00700000</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT			20</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FAIL_BF__MASK			0x03800000</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT			23</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK			0x1c000000</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT			26</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK			0xe0000000</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT			29</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) &amp; A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_STENCIL_CONTROL2				0x00002107</div><div class='del'>-#define A4XX_RB_STENCIL_CONTROL2_STENCIL_BUFFER			0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_STENCIL_INFO				0x00002108</div><div class='del'>-#define A4XX_RB_STENCIL_INFO_SEPARATE_STENCIL			0x00000001</div><div class='del'>-#define A4XX_RB_STENCIL_INFO_STENCIL_BASE__MASK			0xfffff000</div><div class='del'>-#define A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT		12</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) &amp; A4XX_RB_STENCIL_INFO_STENCIL_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_STENCIL_PITCH				0x00002109</div><div class='del'>-#define A4XX_RB_STENCIL_PITCH__MASK				0xffffffff</div><div class='del'>-#define A4XX_RB_STENCIL_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_STENCIL_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_RB_STENCIL_PITCH__SHIFT) &amp; A4XX_RB_STENCIL_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_STENCILREFMASK				0x0000210b</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_STENCILREF__MASK			0x000000ff</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCILREFMASK_STENCILREF__SHIFT) &amp; A4XX_RB_STENCILREFMASK_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) &amp; A4XX_RB_STENCILREFMASK_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK		0x00ff0000</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT		16</div><div class='del'>-static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) &amp; A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_STENCILREFMASK_BF				0x0000210c</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_BF_STENCILREF__MASK		0x000000ff</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) &amp; A4XX_RB_STENCILREFMASK_BF_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) &amp; A4XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK	0x00ff0000</div><div class='del'>-#define A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) &amp; A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_BIN_OFFSET					0x0000210d</div><div class='del'>-#define A4XX_RB_BIN_OFFSET_WINDOW_OFFSET_DISABLE		0x80000000</div><div class='del'>-#define A4XX_RB_BIN_OFFSET_X__MASK				0x00007fff</div><div class='del'>-#define A4XX_RB_BIN_OFFSET_X__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_RB_BIN_OFFSET_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BIN_OFFSET_X__SHIFT) &amp; A4XX_RB_BIN_OFFSET_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_RB_BIN_OFFSET_Y__MASK				0x7fff0000</div><div class='del'>-#define A4XX_RB_BIN_OFFSET_Y__SHIFT				16</div><div class='del'>-static inline uint32_t A4XX_RB_BIN_OFFSET_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_RB_BIN_OFFSET_Y__SHIFT) &amp; A4XX_RB_BIN_OFFSET_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RB_VPORT_Z_CLAMP(i0) (0x00002120 + 0x2*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MIN(uint32_t i0) { return 0x00002120 + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MAX(uint32_t i0) { return 0x00002121 + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_HW_VERSION				0x00000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_HW_CONFIGURATION				0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_TP(i0) (0x00000004 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP_REG(uint32_t i0) { return 0x00000004 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL2_TP(i0) (0x00000008 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP_REG(uint32_t i0) { return 0x00000008 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_TP(i0) (0x0000000c + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP_REG(uint32_t i0) { return 0x0000000c + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_TP(i0) (0x00000010 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP_REG(uint32_t i0) { return 0x00000010 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_UCHE 				0x00000014</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL2_UCHE				0x00000015</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL3_UCHE				0x00000016</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL4_UCHE				0x00000017</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_UCHE				0x00000018</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_UCHE				0x00000019</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_MODE_GPC				0x0000001a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_GPC				0x0000001b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_GPC				0x0000001c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_TSE_RAS_RBBM			0x0000001d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_TSE_RAS_RBBM			0x0000001e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_TSE_RAS_RBBM			0x0000001f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL					0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_SP_HYST_CNT				0x00000021</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_SW_RESET_CMD				0x00000022</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_CTL0					0x00000023</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_CTL1					0x00000024</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_CMD					0x00000025</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_RB_SUB_BLOCK_SEL_CTL			0x00000026</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_RAM_ACC_63_32				0x00000028</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_WAIT_IDLE_CLOCKS_CTL			0x0000002b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_INTERFACE_HANG_INT_CTL			0x0000002f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_INTERFACE_HANG_MASK_CTL4			0x00000034</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_INT_CLEAR_CMD				0x00000036</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_INT_0_MASK				0x00000037</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_RBBM_CTL					0x0000003e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_DEBUG_CTL				0x0000003f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_VBIF_DEBUG_CTL				0x00000041</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL2				0x00000042</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_BLOCK_SW_RESET_CMD			0x00000045</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_RESET_CYCLES				0x00000047</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_EXT_TRACE_BUS_CTL				0x00000049</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CFG_DEBBUS_SEL_A				0x0000004a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CFG_DEBBUS_SEL_B				0x0000004b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CFG_DEBBUS_SEL_C				0x0000004c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CFG_DEBBUS_SEL_D				0x0000004d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_POWER_CNTL_IP				0x00000098</div><div class='del'>-#define A4XX_RBBM_POWER_CNTL_IP_SW_COLLAPSE			0x00000001</div><div class='del'>-#define A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON			0x00100000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_0_LO				0x0000009c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_0_HI				0x0000009d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_1_LO				0x0000009e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_1_HI				0x0000009f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_2_LO				0x000000a0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_2_HI				0x000000a1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_3_LO				0x000000a2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_3_HI				0x000000a3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_4_LO				0x000000a4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_4_HI				0x000000a5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_5_LO				0x000000a6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_5_HI				0x000000a7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_6_LO				0x000000a8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_6_HI				0x000000a9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_7_LO				0x000000aa</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CP_7_HI				0x000000ab</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_0_LO				0x000000ac</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_0_HI				0x000000ad</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_1_LO				0x000000ae</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_1_HI				0x000000af</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_2_LO				0x000000b0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_2_HI				0x000000b1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_3_LO				0x000000b2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_3_HI				0x000000b3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_0_LO				0x000000b4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_0_HI				0x000000b5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_1_LO				0x000000b6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_1_HI				0x000000b7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_2_LO				0x000000b8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_2_HI				0x000000b9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_3_LO				0x000000ba</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_3_HI				0x000000bb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_4_LO				0x000000bc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_4_HI				0x000000bd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_5_LO				0x000000be</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_5_HI				0x000000bf</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_6_LO				0x000000c0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_6_HI				0x000000c1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_7_LO				0x000000c2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PC_7_HI				0x000000c3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_0_LO				0x000000c4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_0_HI				0x000000c5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_1_LO				0x000000c6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_1_HI				0x000000c7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_2_LO				0x000000c8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_2_HI				0x000000c9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_3_LO				0x000000ca</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_3_HI				0x000000cb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_4_LO				0x000000cc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_4_HI				0x000000cd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_5_LO				0x000000ce</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_5_HI				0x000000cf</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_6_LO				0x000000d0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_6_HI				0x000000d1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_7_LO				0x000000d2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VFD_7_HI				0x000000d3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_0_LO				0x000000d4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_0_HI				0x000000d5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_1_LO				0x000000d6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_1_HI				0x000000d7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_2_LO				0x000000d8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_2_HI				0x000000d9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_3_LO				0x000000da</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_3_HI				0x000000db</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_4_LO				0x000000dc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_4_HI				0x000000dd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_5_LO				0x000000de</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_5_HI				0x000000df</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_6_LO				0x000000e0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_6_HI				0x000000e1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_7_LO				0x000000e2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_HLSQ_7_HI				0x000000e3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_0_LO				0x000000e4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_0_HI				0x000000e5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_1_LO				0x000000e6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_1_HI				0x000000e7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_2_LO				0x000000e8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_2_HI				0x000000e9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_3_LO				0x000000ea</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VPC_3_HI				0x000000eb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_0_LO				0x000000ec</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_0_HI				0x000000ed</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_1_LO				0x000000ee</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_1_HI				0x000000ef</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_2_LO				0x000000f0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_2_HI				0x000000f1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_3_LO				0x000000f2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CCU_3_HI				0x000000f3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_0_LO				0x000000f4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_0_HI				0x000000f5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_1_LO				0x000000f6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_1_HI				0x000000f7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_2_LO				0x000000f8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_2_HI				0x000000f9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_3_LO				0x000000fa</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TSE_3_HI				0x000000fb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_0_LO				0x000000fc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_0_HI				0x000000fd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_1_LO				0x000000fe</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_1_HI				0x000000ff</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_2_LO				0x00000100</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_2_HI				0x00000101</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_3_LO				0x00000102</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RAS_3_HI				0x00000103</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_0_LO				0x00000104</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_0_HI				0x00000105</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_1_LO				0x00000106</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_1_HI				0x00000107</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_2_LO				0x00000108</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_2_HI				0x00000109</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_3_LO				0x0000010a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_3_HI				0x0000010b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_4_LO				0x0000010c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_4_HI				0x0000010d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_5_LO				0x0000010e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_5_HI				0x0000010f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_6_LO				0x00000110</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_6_HI				0x00000111</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_7_LO				0x00000112</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_UCHE_7_HI				0x00000113</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_0_LO				0x00000114</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_0_HI				0x00000115</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_1_LO				0x00000116</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_1_HI				0x00000117</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_2_LO				0x00000118</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_2_HI				0x00000119</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_3_LO				0x0000011a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_3_HI				0x0000011b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_4_LO				0x0000011c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_4_HI				0x0000011d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_5_LO				0x0000011e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_5_HI				0x0000011f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_6_LO				0x00000120</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_6_HI				0x00000121</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_7_LO				0x00000122</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_TP_7_HI				0x00000123</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_0_LO				0x00000124</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_0_HI				0x00000125</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_1_LO				0x00000126</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_1_HI				0x00000127</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_2_LO				0x00000128</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_2_HI				0x00000129</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_3_LO				0x0000012a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_3_HI				0x0000012b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_4_LO				0x0000012c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_4_HI				0x0000012d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_5_LO				0x0000012e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_5_HI				0x0000012f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_6_LO				0x00000130</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_6_HI				0x00000131</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_7_LO				0x00000132</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_7_HI				0x00000133</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_8_LO				0x00000134</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_8_HI				0x00000135</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_9_LO				0x00000136</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_9_HI				0x00000137</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_10_LO				0x00000138</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_10_HI				0x00000139</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_11_LO				0x0000013a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_SP_11_HI				0x0000013b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_0_LO				0x0000013c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_0_HI				0x0000013d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_1_LO				0x0000013e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_1_HI				0x0000013f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_2_LO				0x00000140</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_2_HI				0x00000141</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_3_LO				0x00000142</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_3_HI				0x00000143</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_4_LO				0x00000144</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_4_HI				0x00000145</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_5_LO				0x00000146</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_5_HI				0x00000147</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_6_LO				0x00000148</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_6_HI				0x00000149</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_7_LO				0x0000014a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RB_7_HI				0x0000014b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VSC_0_LO				0x0000014c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VSC_0_HI				0x0000014d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VSC_1_LO				0x0000014e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_VSC_1_HI				0x0000014f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PWR_0_LO				0x00000166</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PWR_0_HI				0x00000167</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PWR_1_LO				0x00000168</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_PWR_1_HI				0x00000169</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_ALWAYSON_COUNTER_LO			0x0000016e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_ALWAYSON_COUNTER_HI			0x0000016f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_SP(i0) (0x00000068 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP_REG(uint32_t i0) { return 0x00000068 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL2_SP(i0) (0x0000006c + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP_REG(uint32_t i0) { return 0x0000006c + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_SP(i0) (0x00000070 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP_REG(uint32_t i0) { return 0x00000070 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_SP(i0) (0x00000074 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP_REG(uint32_t i0) { return 0x00000074 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_RB(i0) (0x00000078 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB_REG(uint32_t i0) { return 0x00000078 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL2_RB(i0) (0x0000007c + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB_REG(uint32_t i0) { return 0x0000007c + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU(i0) (0x00000082 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG(uint32_t i0) { return 0x00000082 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU(i0) (0x00000086 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG(uint32_t i0) { return 0x00000086 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_COM_DCOM			0x00000080</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_COM_DCOM			0x00000081</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_CTL_HLSQ				0x0000008a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_HYST_HLSQ				0x0000008b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_HLSQ				0x0000008c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_COM_DCOM			0x0000008d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1(i0) (0x0000008e + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0) { return 0x0000008e + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_SP_REGFILE_SLEEP_CNTL_0			0x00000099</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_SP_REGFILE_SLEEP_CNTL_1			0x0000009a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_CTL				0x00000170</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_LOAD_CMD0				0x00000171</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_LOAD_CMD1				0x00000172</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_LOAD_CMD2				0x00000173</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_LOAD_VALUE_LO			0x00000174</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_LOAD_VALUE_HI			0x00000175</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_SEL_0			0x00000176</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_SEL_1			0x00000177</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_SEL_2			0x00000178</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_PERFCTR_RBBM_SEL_3			0x00000179</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_GPU_BUSY_MASKED				0x0000017a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_INT_0_STATUS				0x0000017d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_CLOCK_STATUS				0x00000182</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_STATUS				0x00000189</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_ME_SPLIT_STATUS			0x0000018c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_PFP_SPLIT_STATUS			0x0000018d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_AHB_ERROR_STATUS				0x0000018f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_STATUS					0x00000191</div><div class='del'>-#define A4XX_RBBM_STATUS_HI_BUSY				0x00000001</div><div class='del'>-#define A4XX_RBBM_STATUS_CP_ME_BUSY				0x00000002</div><div class='del'>-#define A4XX_RBBM_STATUS_CP_PFP_BUSY				0x00000004</div><div class='del'>-#define A4XX_RBBM_STATUS_CP_NRT_BUSY				0x00004000</div><div class='del'>-#define A4XX_RBBM_STATUS_VBIF_BUSY				0x00008000</div><div class='del'>-#define A4XX_RBBM_STATUS_TSE_BUSY				0x00010000</div><div class='del'>-#define A4XX_RBBM_STATUS_RAS_BUSY				0x00020000</div><div class='del'>-#define A4XX_RBBM_STATUS_RB_BUSY				0x00040000</div><div class='del'>-#define A4XX_RBBM_STATUS_PC_DCALL_BUSY				0x00080000</div><div class='del'>-#define A4XX_RBBM_STATUS_PC_VSD_BUSY				0x00100000</div><div class='del'>-#define A4XX_RBBM_STATUS_VFD_BUSY				0x00200000</div><div class='del'>-#define A4XX_RBBM_STATUS_VPC_BUSY				0x00400000</div><div class='del'>-#define A4XX_RBBM_STATUS_UCHE_BUSY				0x00800000</div><div class='del'>-#define A4XX_RBBM_STATUS_SP_BUSY				0x01000000</div><div class='del'>-#define A4XX_RBBM_STATUS_TPL1_BUSY				0x02000000</div><div class='del'>-#define A4XX_RBBM_STATUS_MARB_BUSY				0x04000000</div><div class='del'>-#define A4XX_RBBM_STATUS_VSC_BUSY				0x08000000</div><div class='del'>-#define A4XX_RBBM_STATUS_ARB_BUSY				0x10000000</div><div class='del'>-#define A4XX_RBBM_STATUS_HLSQ_BUSY				0x20000000</div><div class='del'>-#define A4XX_RBBM_STATUS_GPU_BUSY_NOHC				0x40000000</div><div class='del'>-#define A4XX_RBBM_STATUS_GPU_BUSY				0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_INTERFACE_RRDY_STATUS5			0x0000019f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_POWER_STATUS				0x000001b0</div><div class='del'>-#define A4XX_RBBM_POWER_STATUS_SP_TP_PWR_ON			0x00100000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_RBBM_WAIT_IDLE_CLOCKS_CTL2			0x000001b8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_SCRATCH_UMASK				0x00000228</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_SCRATCH_ADDR				0x00000229</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_RB_BASE					0x00000200</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_RB_CNTL					0x00000201</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_RB_WPTR					0x00000205</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_RB_RPTR_ADDR				0x00000203</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_RB_RPTR					0x00000204</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_IB1_BASE					0x00000206</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_IB1_BUFSZ					0x00000207</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_IB2_BASE					0x00000208</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_IB2_BUFSZ					0x00000209</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_NRT_ADDR					0x0000020c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_NRT_DATA					0x0000020d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_RB_DONE_DATA				0x00000217</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_QUEUE_THRESH2				0x00000219</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MERCIU_SIZE					0x0000021b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ROQ_ADDR					0x0000021c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ROQ_DATA					0x0000021d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MEQ_ADDR					0x0000021e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MEQ_DATA					0x0000021f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MERCIU_ADDR					0x00000220</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MERCIU_DATA					0x00000221</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MERCIU_DATA2				0x00000222</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PFP_UCODE_ADDR				0x00000223</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PFP_UCODE_DATA				0x00000224</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_RAM_WADDR				0x00000225</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_RAM_RADDR				0x00000226</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_RAM_DATA					0x00000227</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PREEMPT					0x0000022a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_CNTL					0x0000022c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ME_CNTL					0x0000022d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_DEBUG					0x0000022e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_DEBUG_ECO_CONTROL				0x00000231</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_DRAW_STATE_ADDR				0x00000232</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PROTECT(i0) (0x00000240 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000240 + 0x1*i0; }</div><div class='del'>-#define A4XX_CP_PROTECT_REG_BASE_ADDR__MASK			0x0001ffff</div><div class='del'>-#define A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) &amp; A4XX_CP_PROTECT_REG_BASE_ADDR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_CP_PROTECT_REG_MASK_LEN__MASK			0x1f000000</div><div class='del'>-#define A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT) &amp; A4XX_CP_PROTECT_REG_MASK_LEN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_CP_PROTECT_REG_TRAP_WRITE				0x20000000</div><div class='del'>-#define A4XX_CP_PROTECT_REG_TRAP_READ				0x40000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PROTECT_CTRL				0x00000250</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_ST_BASE					0x000004c0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_STQ_AVAIL					0x000004ce</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_MERCIU_STAT					0x000004d0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_WFI_PEND_CTR				0x000004d2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_HW_FAULT					0x000004d8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PROTECT_STATUS				0x000004da</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_EVENTS_IN_FLIGHT				0x000004dd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_0				0x00000500</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_1				0x00000501</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_2				0x00000502</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_3				0x00000503</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_4				0x00000504</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_5				0x00000505</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_6				0x00000506</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCTR_CP_SEL_7				0x00000507</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_PERFCOMBINER_SELECT				0x0000050b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_CP_SCRATCH(i0) (0x00000578 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000578 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_STATUS					0x00000ec0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_MODE_CONTROL				0x00000ec3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_0				0x00000ec4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_1				0x00000ec5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_2				0x00000ec6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_3				0x00000ec7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_4				0x00000ec8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_5				0x00000ec9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_6				0x00000eca</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_7				0x00000ecb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_8				0x00000ecc</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_9				0x00000ecd</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_10				0x00000ece</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_PERFCTR_SP_SEL_11				0x00000ecf</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_SP_CTRL_REG					0x000022c0</div><div class='del'>-#define A4XX_SP_SP_CTRL_REG_BINNING_PASS			0x00080000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_INSTR_CACHE_CTRL				0x000022c1</div><div class='del'>-#define A4XX_SP_INSTR_CACHE_CTRL_VS_BUFFER			0x00000080</div><div class='del'>-#define A4XX_SP_INSTR_CACHE_CTRL_FS_BUFFER			0x00000100</div><div class='del'>-#define A4XX_SP_INSTR_CACHE_CTRL_INSTR_BUFFER			0x00000400</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_CTRL_REG0				0x000022c4</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_THREADMODE__MASK			0x00000001</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) &amp; A4XX_SP_VS_CTRL_REG0_THREADMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_VARYING				0x00000002</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_CACHEINVALID			0x00000004</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK		0x000003f0</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT		4</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) &amp; A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK		0x0000fc00</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) &amp; A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__MASK		0x000c0000</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__SHIFT		18</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) &amp; A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_THREADSIZE__MASK			0x00100000</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT			20</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) &amp; A4XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_SUPERTHREADMODE			0x00200000</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG0_PIXLODENABLE			0x00400000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_CTRL_REG1				0x000022c5</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) &amp; A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__MASK		0x7f000000</div><div class='del'>-#define A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) &amp; A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_PARAM_REG				0x000022c6</div><div class='del'>-#define A4XX_SP_VS_PARAM_REG_POSREGID__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_VS_PARAM_REG_POSREGID__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_PARAM_REG_POSREGID__SHIFT) &amp; A4XX_SP_VS_PARAM_REG_POSREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_PARAM_REG_PSIZEREGID__MASK			0x0000ff00</div><div class='del'>-#define A4XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) &amp; A4XX_SP_VS_PARAM_REG_PSIZEREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__MASK		0xfff00000</div><div class='del'>-#define A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT		20</div><div class='del'>-static inline uint32_t A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) &amp; A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_OUT(i0) (0x000022c7 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_VS_OUT_REG(uint32_t i0) { return 0x000022c7 + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_A_REGID__MASK			0x000001ff</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_A_REGID__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_VS_OUT_REG_A_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_OUT_REG_A_REGID__SHIFT) &amp; A4XX_SP_VS_OUT_REG_A_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_A_COMPMASK__MASK			0x00001e00</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT			9</div><div class='del'>-static inline uint32_t A4XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) &amp; A4XX_SP_VS_OUT_REG_A_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_B_REGID__MASK			0x01ff0000</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_B_REGID__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_SP_VS_OUT_REG_B_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_OUT_REG_B_REGID__SHIFT) &amp; A4XX_SP_VS_OUT_REG_B_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_B_COMPMASK__MASK			0x1e000000</div><div class='del'>-#define A4XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT			25</div><div class='del'>-static inline uint32_t A4XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) &amp; A4XX_SP_VS_OUT_REG_B_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_VPC_DST(i0) (0x000022d8 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x000022d8 + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) &amp; A4XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK			0x0000ff00</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) &amp; A4XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK			0x00ff0000</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) &amp; A4XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK			0xff000000</div><div class='del'>-#define A4XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) &amp; A4XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_OBJ_OFFSET_REG				0x000022e0</div><div class='del'>-#define A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_OBJ_START				0x000022e1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_PVT_MEM_PARAM				0x000022e2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_PVT_MEM_ADDR				0x000022e3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_VS_LENGTH_REG				0x000022e5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_CTRL_REG0				0x000022e8</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_THREADMODE__MASK			0x00000001</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) &amp; A4XX_SP_FS_CTRL_REG0_THREADMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_VARYING				0x00000002</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_CACHEINVALID			0x00000004</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK		0x000003f0</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT		4</div><div class='del'>-static inline uint32_t A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) &amp; A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK		0x0000fc00</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) &amp; A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__MASK		0x000c0000</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__SHIFT		18</div><div class='del'>-static inline uint32_t A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) &amp; A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_THREADSIZE__MASK			0x00100000</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT			20</div><div class='del'>-static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) &amp; A4XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_SUPERTHREADMODE			0x00200000</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG0_PIXLODENABLE			0x00400000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_CTRL_REG1				0x000022e9</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) &amp; A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG1_FACENESS				0x00080000</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG1_VARYING				0x00100000</div><div class='del'>-#define A4XX_SP_FS_CTRL_REG1_FRAGCOORD				0x00200000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_OBJ_OFFSET_REG				0x000022ea</div><div class='del'>-#define A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_OBJ_START				0x000022eb</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_PVT_MEM_PARAM				0x000022ec</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_PVT_MEM_ADDR				0x000022ed</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_LENGTH_REG				0x000022ef</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_OUTPUT_REG				0x000022f0</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_MRT__MASK				0x0000000f</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_MRT__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_OUTPUT_REG_MRT__SHIFT) &amp; A4XX_SP_FS_OUTPUT_REG_MRT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_DEPTH_ENABLE			0x00000080</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MASK			0x0000ff00</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT		8</div><div class='del'>-static inline uint32_t A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) &amp; A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__MASK		0xff000000</div><div class='del'>-#define A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__SHIFT) &amp; A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_FS_MRT(i0) (0x000022f1 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_FS_MRT_REG(uint32_t i0) { return 0x000022f1 + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_REGID__MASK				0x000000ff</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_REGID__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_SP_FS_MRT_REG_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_MRT_REG_REGID__SHIFT) &amp; A4XX_SP_FS_MRT_REG_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_HALF_PRECISION			0x00000100</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_COLOR_SINT				0x00000400</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_COLOR_UINT				0x00000800</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_MRTFORMAT__MASK			0x0003f000</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_MRTFORMAT__SHIFT			12</div><div class='del'>-static inline uint32_t A4XX_SP_FS_MRT_REG_MRTFORMAT(enum a4xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_FS_MRT_REG_MRTFORMAT__SHIFT) &amp; A4XX_SP_FS_MRT_REG_MRTFORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_FS_MRT_REG_COLOR_SRGB				0x00040000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_CTRL_REG0				0x00002300</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_THREADMODE__MASK			0x00000001</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_THREADMODE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_CS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_CS_CTRL_REG0_THREADMODE__SHIFT) &amp; A4XX_SP_CS_CTRL_REG0_THREADMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_VARYING				0x00000002</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_CACHEINVALID			0x00000004</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__MASK		0x000003f0</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT		4</div><div class='del'>-static inline uint32_t A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) &amp; A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__MASK		0x0000fc00</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT		10</div><div class='del'>-static inline uint32_t A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) &amp; A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP__MASK		0x000c0000</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP__SHIFT		18</div><div class='del'>-static inline uint32_t A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) &amp; A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_THREADSIZE__MASK			0x00100000</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_THREADSIZE__SHIFT			20</div><div class='del'>-static inline uint32_t A4XX_SP_CS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_CS_CTRL_REG0_THREADSIZE__SHIFT) &amp; A4XX_SP_CS_CTRL_REG0_THREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_SUPERTHREADMODE			0x00200000</div><div class='del'>-#define A4XX_SP_CS_CTRL_REG0_PIXLODENABLE			0x00400000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_OBJ_OFFSET_REG				0x00002301</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_OBJ_START				0x00002302</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_PVT_MEM_PARAM				0x00002303</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_PVT_MEM_ADDR				0x00002304</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_PVT_MEM_SIZE				0x00002305</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_CS_LENGTH_REG				0x00002306</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_HS_OBJ_OFFSET_REG				0x0000230d</div><div class='del'>-#define A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_HS_OBJ_START				0x0000230e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_HS_PVT_MEM_PARAM				0x0000230f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_HS_PVT_MEM_ADDR				0x00002310</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_HS_LENGTH_REG				0x00002312</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_PARAM_REG				0x0000231a</div><div class='del'>-#define A4XX_SP_DS_PARAM_REG_POSREGID__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_DS_PARAM_REG_POSREGID__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_DS_PARAM_REG_POSREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_PARAM_REG_POSREGID__SHIFT) &amp; A4XX_SP_DS_PARAM_REG_POSREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__MASK		0xfff00000</div><div class='del'>-#define A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__SHIFT		20</div><div class='del'>-static inline uint32_t A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__SHIFT) &amp; A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_OUT(i0) (0x0000231b + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_DS_OUT_REG(uint32_t i0) { return 0x0000231b + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_A_REGID__MASK			0x000001ff</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_A_REGID__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_DS_OUT_REG_A_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_OUT_REG_A_REGID__SHIFT) &amp; A4XX_SP_DS_OUT_REG_A_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_A_COMPMASK__MASK			0x00001e00</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_A_COMPMASK__SHIFT			9</div><div class='del'>-static inline uint32_t A4XX_SP_DS_OUT_REG_A_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_OUT_REG_A_COMPMASK__SHIFT) &amp; A4XX_SP_DS_OUT_REG_A_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_B_REGID__MASK			0x01ff0000</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_B_REGID__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_SP_DS_OUT_REG_B_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_OUT_REG_B_REGID__SHIFT) &amp; A4XX_SP_DS_OUT_REG_B_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_B_COMPMASK__MASK			0x1e000000</div><div class='del'>-#define A4XX_SP_DS_OUT_REG_B_COMPMASK__SHIFT			25</div><div class='del'>-static inline uint32_t A4XX_SP_DS_OUT_REG_B_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_OUT_REG_B_COMPMASK__SHIFT) &amp; A4XX_SP_DS_OUT_REG_B_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_VPC_DST(i0) (0x0000232c + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_DS_VPC_DST_REG(uint32_t i0) { return 0x0000232c + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC0__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_VPC_DST_REG_OUTLOC0__SHIFT) &amp; A4XX_SP_DS_VPC_DST_REG_OUTLOC0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC1__MASK			0x0000ff00</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC1__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_VPC_DST_REG_OUTLOC1__SHIFT) &amp; A4XX_SP_DS_VPC_DST_REG_OUTLOC1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC2__MASK			0x00ff0000</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC2__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_VPC_DST_REG_OUTLOC2__SHIFT) &amp; A4XX_SP_DS_VPC_DST_REG_OUTLOC2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC3__MASK			0xff000000</div><div class='del'>-#define A4XX_SP_DS_VPC_DST_REG_OUTLOC3__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_VPC_DST_REG_OUTLOC3__SHIFT) &amp; A4XX_SP_DS_VPC_DST_REG_OUTLOC3__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_OBJ_OFFSET_REG				0x00002334</div><div class='del'>-#define A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_OBJ_START				0x00002335</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_PVT_MEM_PARAM				0x00002336</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_PVT_MEM_ADDR				0x00002337</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_DS_LENGTH_REG				0x00002339</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_PARAM_REG				0x00002341</div><div class='del'>-#define A4XX_SP_GS_PARAM_REG_POSREGID__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_GS_PARAM_REG_POSREGID__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_GS_PARAM_REG_POSREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_PARAM_REG_POSREGID__SHIFT) &amp; A4XX_SP_GS_PARAM_REG_POSREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_PARAM_REG_PRIMREGID__MASK			0x0000ff00</div><div class='del'>-#define A4XX_SP_GS_PARAM_REG_PRIMREGID__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_SP_GS_PARAM_REG_PRIMREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_PARAM_REG_PRIMREGID__SHIFT) &amp; A4XX_SP_GS_PARAM_REG_PRIMREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__MASK		0xfff00000</div><div class='del'>-#define A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__SHIFT		20</div><div class='del'>-static inline uint32_t A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__SHIFT) &amp; A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_OUT(i0) (0x00002342 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_GS_OUT_REG(uint32_t i0) { return 0x00002342 + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_A_REGID__MASK			0x000001ff</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_A_REGID__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_GS_OUT_REG_A_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_OUT_REG_A_REGID__SHIFT) &amp; A4XX_SP_GS_OUT_REG_A_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_A_COMPMASK__MASK			0x00001e00</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_A_COMPMASK__SHIFT			9</div><div class='del'>-static inline uint32_t A4XX_SP_GS_OUT_REG_A_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_OUT_REG_A_COMPMASK__SHIFT) &amp; A4XX_SP_GS_OUT_REG_A_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_B_REGID__MASK			0x01ff0000</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_B_REGID__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_SP_GS_OUT_REG_B_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_OUT_REG_B_REGID__SHIFT) &amp; A4XX_SP_GS_OUT_REG_B_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_B_COMPMASK__MASK			0x1e000000</div><div class='del'>-#define A4XX_SP_GS_OUT_REG_B_COMPMASK__SHIFT			25</div><div class='del'>-static inline uint32_t A4XX_SP_GS_OUT_REG_B_COMPMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_OUT_REG_B_COMPMASK__SHIFT) &amp; A4XX_SP_GS_OUT_REG_B_COMPMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_VPC_DST(i0) (0x00002353 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_SP_GS_VPC_DST_REG(uint32_t i0) { return 0x00002353 + 0x1*i0; }</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC0__MASK			0x000000ff</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_VPC_DST_REG_OUTLOC0__SHIFT) &amp; A4XX_SP_GS_VPC_DST_REG_OUTLOC0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC1__MASK			0x0000ff00</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC1__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_VPC_DST_REG_OUTLOC1__SHIFT) &amp; A4XX_SP_GS_VPC_DST_REG_OUTLOC1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC2__MASK			0x00ff0000</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC2__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_VPC_DST_REG_OUTLOC2__SHIFT) &amp; A4XX_SP_GS_VPC_DST_REG_OUTLOC2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC3__MASK			0xff000000</div><div class='del'>-#define A4XX_SP_GS_VPC_DST_REG_OUTLOC3__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_VPC_DST_REG_OUTLOC3__SHIFT) &amp; A4XX_SP_GS_VPC_DST_REG_OUTLOC3__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_OBJ_OFFSET_REG				0x0000235b</div><div class='del'>-#define A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK	0x01ff0000</div><div class='del'>-#define A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK		0xfe000000</div><div class='del'>-#define A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT	25</div><div class='del'>-static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_OBJ_START				0x0000235c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_PVT_MEM_PARAM				0x0000235d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_PVT_MEM_ADDR				0x0000235e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SP_GS_LENGTH_REG				0x00002360</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_DEBUG_RAM_SEL				0x00000e60</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_DEBUG_RAM_READ				0x00000e61</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_DEBUG_ECO_CONTROL				0x00000e64</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_PERFCTR_VPC_SEL_0				0x00000e65</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_PERFCTR_VPC_SEL_1				0x00000e66</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_PERFCTR_VPC_SEL_2				0x00000e67</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_PERFCTR_VPC_SEL_3				0x00000e68</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_ATTR					0x00002140</div><div class='del'>-#define A4XX_VPC_ATTR_TOTALATTR__MASK				0x000001ff</div><div class='del'>-#define A4XX_VPC_ATTR_TOTALATTR__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_VPC_ATTR_TOTALATTR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VPC_ATTR_TOTALATTR__SHIFT) &amp; A4XX_VPC_ATTR_TOTALATTR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VPC_ATTR_PSIZE					0x00000200</div><div class='del'>-#define A4XX_VPC_ATTR_THRDASSIGN__MASK				0x00003000</div><div class='del'>-#define A4XX_VPC_ATTR_THRDASSIGN__SHIFT				12</div><div class='del'>-static inline uint32_t A4XX_VPC_ATTR_THRDASSIGN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VPC_ATTR_THRDASSIGN__SHIFT) &amp; A4XX_VPC_ATTR_THRDASSIGN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VPC_ATTR_ENABLE					0x02000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_PACK					0x00002141</div><div class='del'>-#define A4XX_VPC_PACK_NUMBYPASSVAR__MASK			0x000000ff</div><div class='del'>-#define A4XX_VPC_PACK_NUMBYPASSVAR__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VPC_PACK_NUMBYPASSVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VPC_PACK_NUMBYPASSVAR__SHIFT) &amp; A4XX_VPC_PACK_NUMBYPASSVAR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VPC_PACK_NUMFPNONPOSVAR__MASK			0x0000ff00</div><div class='del'>-#define A4XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) &amp; A4XX_VPC_PACK_NUMFPNONPOSVAR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VPC_PACK_NUMNONPOSVSVAR__MASK			0x00ff0000</div><div class='del'>-#define A4XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) &amp; A4XX_VPC_PACK_NUMNONPOSVSVAR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_VARYING_INTERP(i0) (0x00002142 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00002142 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_VARYING_PS_REPL(i0) (0x0000214a + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000214a + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VPC_SO_FLUSH_WADDR_3				0x0000216e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_BIN_SIZE					0x00000c00</div><div class='del'>-#define A4XX_VSC_BIN_SIZE_WIDTH__MASK				0x0000001f</div><div class='del'>-#define A4XX_VSC_BIN_SIZE_WIDTH__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_VSC_BIN_SIZE_WIDTH__SHIFT) &amp; A4XX_VSC_BIN_SIZE_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VSC_BIN_SIZE_HEIGHT__MASK				0x000003e0</div><div class='del'>-#define A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT				5</div><div class='del'>-static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT) &amp; A4XX_VSC_BIN_SIZE_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_SIZE_ADDRESS				0x00000c01</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_SIZE_ADDRESS2				0x00000c02</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_DEBUG_ECO_CONTROL				0x00000c03</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_PIPE_CONFIG(i0) (0x00000c08 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c08 + 0x1*i0; }</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_X__MASK			0x000003ff</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VSC_PIPE_CONFIG_REG_X__SHIFT) &amp; A4XX_VSC_PIPE_CONFIG_REG_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_Y__MASK			0x000ffc00</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_Y__SHIFT			10</div><div class='del'>-static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) &amp; A4XX_VSC_PIPE_CONFIG_REG_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_W__MASK			0x00f00000</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_W__SHIFT			20</div><div class='del'>-static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VSC_PIPE_CONFIG_REG_W__SHIFT) &amp; A4XX_VSC_PIPE_CONFIG_REG_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_H__MASK			0x0f000000</div><div class='del'>-#define A4XX_VSC_PIPE_CONFIG_REG_H__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VSC_PIPE_CONFIG_REG_H__SHIFT) &amp; A4XX_VSC_PIPE_CONFIG_REG_H__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_PIPE_DATA_ADDRESS(i0) (0x00000c10 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_PIPE_DATA_LENGTH(i0) (0x00000c18 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0x00000c18 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_PIPE_PARTIAL_POSN_1			0x00000c41</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_PERFCTR_VSC_SEL_0				0x00000c50</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VSC_PERFCTR_VSC_SEL_1				0x00000c51</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_DEBUG_CONTROL				0x00000e40</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_0				0x00000e43</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_1				0x00000e44</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_2				0x00000e45</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_3				0x00000e46</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_4				0x00000e47</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_5				0x00000e48</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_6				0x00000e49</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_PERFCTR_VFD_SEL_7				0x00000e4a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VGT_CL_INITIATOR				0x000021d0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VGT_EVENT_INITIATOR				0x000021d9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_CONTROL_0					0x00002200</div><div class='del'>-#define A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK			0x000000ff</div><div class='del'>-#define A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) &amp; A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_0_BYPASSATTROVS__MASK			0x0001fe00</div><div class='del'>-#define A4XX_VFD_CONTROL_0_BYPASSATTROVS__SHIFT			9</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_0_BYPASSATTROVS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_0_BYPASSATTROVS__SHIFT) &amp; A4XX_VFD_CONTROL_0_BYPASSATTROVS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__MASK		0x03f00000</div><div class='del'>-#define A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT		20</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) &amp; A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__MASK		0xfc000000</div><div class='del'>-#define A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT		26</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) &amp; A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_CONTROL_1					0x00002201</div><div class='del'>-#define A4XX_VFD_CONTROL_1_MAXSTORAGE__MASK			0x0000ffff</div><div class='del'>-#define A4XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) &amp; A4XX_VFD_CONTROL_1_MAXSTORAGE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_1_REGID4VTX__MASK			0x00ff0000</div><div class='del'>-#define A4XX_VFD_CONTROL_1_REGID4VTX__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_1_REGID4VTX__SHIFT) &amp; A4XX_VFD_CONTROL_1_REGID4VTX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_1_REGID4INST__MASK			0xff000000</div><div class='del'>-#define A4XX_VFD_CONTROL_1_REGID4INST__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_1_REGID4INST(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_1_REGID4INST__SHIFT) &amp; A4XX_VFD_CONTROL_1_REGID4INST__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_CONTROL_2					0x00002202</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_CONTROL_3					0x00002203</div><div class='del'>-#define A4XX_VFD_CONTROL_3_REGID_VTXCNT__MASK			0x0000ff00</div><div class='del'>-#define A4XX_VFD_CONTROL_3_REGID_VTXCNT__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_3_REGID_VTXCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_3_REGID_VTXCNT__SHIFT) &amp; A4XX_VFD_CONTROL_3_REGID_VTXCNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_3_REGID_TESSX__MASK			0x00ff0000</div><div class='del'>-#define A4XX_VFD_CONTROL_3_REGID_TESSX__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) &amp; A4XX_VFD_CONTROL_3_REGID_TESSX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_CONTROL_3_REGID_TESSY__MASK			0xff000000</div><div class='del'>-#define A4XX_VFD_CONTROL_3_REGID_TESSY__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) &amp; A4XX_VFD_CONTROL_3_REGID_TESSY__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_CONTROL_4					0x00002204</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_INDEX_OFFSET				0x00002208</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_FETCH(i0) (0x0000220a + 0x4*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_0(uint32_t i0) { return 0x0000220a + 0x4*i0; }</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK			0x0000007f</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) &amp; A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK			0x0001ff80</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT			7</div><div class='del'>-static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) &amp; A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_0_SWITCHNEXT			0x00080000</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_0_INSTANCED			0x00100000</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x0000220b + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_2(uint32_t i0) { return 0x0000220c + 0x4*i0; }</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_2_SIZE__MASK			0xffffffff</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) &amp; A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_3(uint32_t i0) { return 0x0000220d + 0x4*i0; }</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_3_STEPRATE__MASK			0x000001ff</div><div class='del'>-#define A4XX_VFD_FETCH_INSTR_3_STEPRATE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VFD_FETCH_INSTR_3_STEPRATE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_FETCH_INSTR_3_STEPRATE__SHIFT) &amp; A4XX_VFD_FETCH_INSTR_3_STEPRATE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VFD_DECODE(i0) (0x0000228a + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A4XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000228a + 0x1*i0; }</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_WRITEMASK__MASK			0x0000000f</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) &amp; A4XX_VFD_DECODE_INSTR_WRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_CONSTFILL				0x00000010</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_FORMAT__MASK			0x00000fc0</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_FORMAT__SHIFT			6</div><div class='del'>-static inline uint32_t A4XX_VFD_DECODE_INSTR_FORMAT(enum a4xx_vtx_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_DECODE_INSTR_FORMAT__SHIFT) &amp; A4XX_VFD_DECODE_INSTR_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_REGID__MASK			0x000ff000</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_REGID__SHIFT			12</div><div class='del'>-static inline uint32_t A4XX_VFD_DECODE_INSTR_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_DECODE_INSTR_REGID__SHIFT) &amp; A4XX_VFD_DECODE_INSTR_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_INT				0x00100000</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_SWAP__MASK			0x00c00000</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_SWAP__SHIFT			22</div><div class='del'>-static inline uint32_t A4XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_DECODE_INSTR_SWAP__SHIFT) &amp; A4XX_VFD_DECODE_INSTR_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_SHIFTCNT__MASK			0x1f000000</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) &amp; A4XX_VFD_DECODE_INSTR_SHIFTCNT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_LASTCOMPVALID			0x20000000</div><div class='del'>-#define A4XX_VFD_DECODE_INSTR_SWITCHNEXT			0x40000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_DEBUG_ECO_CONTROL				0x00000f00</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_MODE_CONTROL				0x00000f03</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_0				0x00000f04</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_1				0x00000f05</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_2				0x00000f06</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_3				0x00000f07</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_4				0x00000f08</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_5				0x00000f09</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_6				0x00000f0a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_PERFCTR_TP_SEL_7				0x00000f0b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_TEX_OFFSET				0x00002380</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_TEX_COUNT				0x00002381</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_VS__MASK				0x000000ff</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_VS__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_VS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TPL1_TP_TEX_COUNT_VS__SHIFT) &amp; A4XX_TPL1_TP_TEX_COUNT_VS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_HS__MASK				0x0000ff00</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_HS__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_HS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TPL1_TP_TEX_COUNT_HS__SHIFT) &amp; A4XX_TPL1_TP_TEX_COUNT_HS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_DS__MASK				0x00ff0000</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_DS__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_DS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TPL1_TP_TEX_COUNT_DS__SHIFT) &amp; A4XX_TPL1_TP_TEX_COUNT_DS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_GS__MASK				0xff000000</div><div class='del'>-#define A4XX_TPL1_TP_TEX_COUNT_GS__SHIFT			24</div><div class='del'>-static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_GS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TPL1_TP_TEX_COUNT_GS__SHIFT) &amp; A4XX_TPL1_TP_TEX_COUNT_GS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_VS_BORDER_COLOR_BASE_ADDR		0x00002384</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_HS_BORDER_COLOR_BASE_ADDR		0x00002387</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_DS_BORDER_COLOR_BASE_ADDR		0x0000238a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_GS_BORDER_COLOR_BASE_ADDR		0x0000238d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_FS_TEX_COUNT				0x000023a0</div><div class='del'>-#define A4XX_TPL1_TP_FS_TEX_COUNT_FS__MASK			0x000000ff</div><div class='del'>-#define A4XX_TPL1_TP_FS_TEX_COUNT_FS__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_TPL1_TP_FS_TEX_COUNT_FS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TPL1_TP_FS_TEX_COUNT_FS__SHIFT) &amp; A4XX_TPL1_TP_FS_TEX_COUNT_FS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TPL1_TP_FS_TEX_COUNT_CS__MASK			0x0000ff00</div><div class='del'>-#define A4XX_TPL1_TP_FS_TEX_COUNT_CS__SHIFT			8</div><div class='del'>-static inline uint32_t A4XX_TPL1_TP_FS_TEX_COUNT_CS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TPL1_TP_FS_TEX_COUNT_CS__SHIFT) &amp; A4XX_TPL1_TP_FS_TEX_COUNT_CS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_FS_BORDER_COLOR_BASE_ADDR		0x000023a1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_CS_BORDER_COLOR_BASE_ADDR		0x000023a4</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_CS_SAMPLER_BASE_ADDR			0x000023a5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TPL1_TP_CS_TEXMEMOBJ_BASE_ADDR			0x000023a6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_TSE_STATUS				0x00000c80</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_DEBUG_ECO_CONTROL				0x00000c81</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_TSE_SEL_0				0x00000c88</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_TSE_SEL_1				0x00000c89</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_TSE_SEL_2				0x00000c8a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_TSE_SEL_3				0x00000c8b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_RAS_SEL_0				0x00000c8c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_RAS_SEL_1				0x00000c8d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_RAS_SEL_2				0x00000c8e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_PERFCTR_RAS_SEL_3				0x00000c8f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_CLIP_CNTL				0x00002000</div><div class='del'>-#define A4XX_GRAS_CL_CLIP_CNTL_CLIP_DISABLE			0x00008000</div><div class='del'>-#define A4XX_GRAS_CL_CLIP_CNTL_ZNEAR_CLIP_DISABLE		0x00010000</div><div class='del'>-#define A4XX_GRAS_CL_CLIP_CNTL_ZFAR_CLIP_DISABLE		0x00020000</div><div class='del'>-#define A4XX_GRAS_CL_CLIP_CNTL_ZERO_GB_SCALE_Z			0x00400000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CNTL					0x00002003</div><div class='del'>-#define A4XX_GRAS_CNTL_IJ_PERSP					0x00000001</div><div class='del'>-#define A4XX_GRAS_CNTL_IJ_LINEAR				0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_GB_CLIP_ADJ				0x00002004</div><div class='del'>-#define A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK			0x000003ff</div><div class='del'>-#define A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) &amp; A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK			0x000ffc00</div><div class='del'>-#define A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT			10</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) &amp; A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_VPORT_XOFFSET_0			0x00002008</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_VPORT_XOFFSET_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) &amp; A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_VPORT_XSCALE_0				0x00002009</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_XSCALE_0__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_VPORT_XSCALE_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) &amp; A4XX_GRAS_CL_VPORT_XSCALE_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_VPORT_YOFFSET_0			0x0000200a</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_VPORT_YOFFSET_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) &amp; A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_VPORT_YSCALE_0				0x0000200b</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_YSCALE_0__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_VPORT_YSCALE_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) &amp; A4XX_GRAS_CL_VPORT_YSCALE_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_VPORT_ZOFFSET_0			0x0000200c</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_VPORT_ZOFFSET_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) &amp; A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_CL_VPORT_ZSCALE_0				0x0000200d</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_CL_VPORT_ZSCALE_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) &amp; A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SU_POINT_MINMAX				0x00002070</div><div class='del'>-#define A4XX_GRAS_SU_POINT_MINMAX_MIN__MASK			0x0000ffff</div><div class='del'>-#define A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MIN(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) &amp; A4XX_GRAS_SU_POINT_MINMAX_MIN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SU_POINT_MINMAX_MAX__MASK			0xffff0000</div><div class='del'>-#define A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MAX(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) &amp; A4XX_GRAS_SU_POINT_MINMAX_MAX__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SU_POINT_SIZE				0x00002071</div><div class='del'>-#define A4XX_GRAS_SU_POINT_SIZE__MASK				0xffffffff</div><div class='del'>-#define A4XX_GRAS_SU_POINT_SIZE__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_POINT_SIZE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 16.0))) &lt;&lt; A4XX_GRAS_SU_POINT_SIZE__SHIFT) &amp; A4XX_GRAS_SU_POINT_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_ALPHA_CONTROL				0x00002073</div><div class='del'>-#define A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE		0x00000004</div><div class='del'>-#define A4XX_GRAS_ALPHA_CONTROL_FORCE_FRAGZ_TO_FS		0x00000008</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SU_POLY_OFFSET_SCALE			0x00002074</div><div class='del'>-#define A4XX_GRAS_SU_POLY_OFFSET_SCALE__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_SCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) &amp; A4XX_GRAS_SU_POLY_OFFSET_SCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SU_POLY_OFFSET_OFFSET			0x00002075</div><div class='del'>-#define A4XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) &amp; A4XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SU_POLY_OFFSET_CLAMP			0x00002076</div><div class='del'>-#define A4XX_GRAS_SU_POLY_OFFSET_CLAMP__MASK			0xffffffff</div><div class='del'>-#define A4XX_GRAS_SU_POLY_OFFSET_CLAMP__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_CLAMP(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A4XX_GRAS_SU_POLY_OFFSET_CLAMP__SHIFT) &amp; A4XX_GRAS_SU_POLY_OFFSET_CLAMP__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_DEPTH_CONTROL				0x00002077</div><div class='del'>-#define A4XX_GRAS_DEPTH_CONTROL_FORMAT__MASK			0x00000003</div><div class='del'>-#define A4XX_GRAS_DEPTH_CONTROL_FORMAT__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_DEPTH_CONTROL_FORMAT(enum a4xx_depth_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_DEPTH_CONTROL_FORMAT__SHIFT) &amp; A4XX_GRAS_DEPTH_CONTROL_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SU_MODE_CONTROL				0x00002078</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_CULL_FRONT			0x00000001</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_CULL_BACK			0x00000002</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_FRONT_CW			0x00000004</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__MASK		0x000007f8</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT		3</div><div class='del'>-static inline uint32_t A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 4.0))) &lt;&lt; A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) &amp; A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_POLY_OFFSET			0x00000800</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_MSAA_ENABLE			0x00002000</div><div class='del'>-#define A4XX_GRAS_SU_MODE_CONTROL_RENDERING_PASS		0x00100000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_CONTROL				0x0000207b</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_RENDER_MODE__MASK			0x0000000c</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT			2</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) &amp; A4XX_GRAS_SC_CONTROL_RENDER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MASK			0x00000380</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT		7</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) &amp; A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_MSAA_DISABLE			0x00000800</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_RASTER_MODE__MASK			0x0000f000</div><div class='del'>-#define A4XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT			12</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) &amp; A4XX_GRAS_SC_CONTROL_RASTER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_SCREEN_SCISSOR_TL			0x0000207c</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) &amp; A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) &amp; A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_SCREEN_SCISSOR_BR			0x0000207d</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) &amp; A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) &amp; A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_WINDOW_SCISSOR_BR			0x0000209c</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) &amp; A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) &amp; A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_WINDOW_SCISSOR_TL			0x0000209d</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) &amp; A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) &amp; A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_EXTENT_WINDOW_BR			0x0000209e</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__MASK			0x00007fff</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__SHIFT) &amp; A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__SHIFT) &amp; A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_GRAS_SC_EXTENT_WINDOW_TL			0x0000209f</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__MASK			0x00007fff</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__SHIFT) &amp; A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__SHIFT) &amp; A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_CACHE_MODE_CONTROL			0x00000e80</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_TRAP_BASE_LO				0x00000e83</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_TRAP_BASE_HI				0x00000e84</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_CACHE_STATUS				0x00000e88</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_INVALIDATE0				0x00000e8a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_INVALIDATE1				0x00000e8b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_CACHE_WAYS_VFD				0x00000e8c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_0			0x00000e8e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_1			0x00000e8f</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_2			0x00000e90</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_3			0x00000e91</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_4			0x00000e92</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_5			0x00000e93</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_6			0x00000e94</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UCHE_PERFCTR_UCHE_SEL_7			0x00000e95</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_TIMEOUT_THRESHOLD				0x00000e00</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_DEBUG_ECO_CONTROL				0x00000e04</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_MODE_CONTROL				0x00000e05</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERF_PIPE_MASK				0x00000e0e</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_0			0x00000e06</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_1			0x00000e07</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_2			0x00000e08</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_3			0x00000e09</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_4			0x00000e0a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_5			0x00000e0b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_6			0x00000e0c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_PERFCTR_HLSQ_SEL_7			0x00000e0d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CONTROL_0_REG				0x000023c0</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__MASK		0x00000010</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT		4</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) &amp; A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_FSSUPERTHREADENABLE		0x00000040</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_SPSHADERRESTART			0x00000200</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_RESERVED2			0x00000400</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_CHUNKDISABLE			0x04000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__MASK			0x08000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT		27</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) &amp; A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_LAZYUPDATEDISABLE		0x10000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_SPCONSTFULLUPDATE		0x20000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_TPFULLUPDATE			0x40000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_0_REG_SINGLECONTEXT			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CONTROL_1_REG				0x000023c1</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__MASK		0x00000040</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT		6</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) &amp; A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_VSSUPERTHREADENABLE		0x00000100</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_RESERVED1			0x00000200</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_COORDREGID__MASK		0x00ff0000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_COORDREGID__SHIFT		16</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_COORDREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_1_REG_COORDREGID__SHIFT) &amp; A4XX_HLSQ_CONTROL_1_REG_COORDREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__SHIFT) &amp; A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CONTROL_2_REG				0x000023c2</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__MASK	0xfc000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT	26</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) &amp; A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_FACEREGID__MASK			0x000003fc</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT		2</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) &amp; A4XX_HLSQ_CONTROL_2_REG_FACEREGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__MASK		0x0003fc00</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__SHIFT		10</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__SHIFT) &amp; A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__MASK		0x03fc0000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__SHIFT		18</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__SHIFT) &amp; A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CONTROL_3_REG				0x000023c3</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__SHIFT) &amp; A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__MASK		0x0000ff00</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__SHIFT		8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__SHIFT) &amp; A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__MASK		0x00ff0000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__SHIFT	16</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__SHIFT) &amp; A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__MASK	0xff000000</div><div class='del'>-#define A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__SHIFT	24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__SHIFT) &amp; A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CONTROL_4_REG				0x000023c4</div><div class='del'>-#define A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__SHIFT) &amp; A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__MASK		0x0000ff00</div><div class='del'>-#define A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__SHIFT		8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__SHIFT) &amp; A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_VS_CONTROL_REG				0x000023c5</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__MASK	0x00007f00</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_SSBO_ENABLE			0x00008000</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_ENABLED			0x00010000</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__MASK		0x00fe0000</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT		17</div><div class='del'>-static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_FS_CONTROL_REG				0x000023c6</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__MASK	0x00007f00</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_SSBO_ENABLE			0x00008000</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_ENABLED			0x00010000</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__MASK		0x00fe0000</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT		17</div><div class='del'>-static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_HS_CONTROL_REG				0x000023c7</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__MASK	0x00007f00</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_SSBO_ENABLE			0x00008000</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_ENABLED			0x00010000</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__MASK		0x00fe0000</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT		17</div><div class='del'>-static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_DS_CONTROL_REG				0x000023c8</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__MASK	0x00007f00</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_SSBO_ENABLE			0x00008000</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_ENABLED			0x00010000</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__MASK		0x00fe0000</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT		17</div><div class='del'>-static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_GS_CONTROL_REG				0x000023c9</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__MASK	0x00007f00</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_SSBO_ENABLE			0x00008000</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_ENABLED			0x00010000</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__MASK		0x00fe0000</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT		17</div><div class='del'>-static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CS_CONTROL_REG				0x000023ca</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__MASK		0x000000ff</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__SHIFT) &amp; A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__MASK	0x00007f00</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT	8</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) &amp; A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_SSBO_ENABLE			0x00008000</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_ENABLED			0x00010000</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__MASK		0x00fe0000</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__SHIFT		17</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) &amp; A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__SHIFT) &amp; A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_0				0x000023cd</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__MASK			0x00000003</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__MASK			0x00000ffc</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__SHIFT		2</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__MASK			0x003ff000</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__SHIFT		12</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__MASK			0xffc00000</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__SHIFT		22</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_1				0x000023ce</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__MASK			0xffffffff</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_1_SIZE_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_2				0x000023cf</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_3				0x000023d0</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__MASK			0xffffffff</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_4				0x000023d1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_5				0x000023d2</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__MASK			0xffffffff</div><div class='del'>-#define A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__SHIFT) &amp; A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_NDRANGE_6				0x000023d3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_CONTROL_0				0x000023d4</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__MASK		0x00000fff</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__SHIFT) &amp; A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID__MASK		0x00fff000</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID__SHIFT		12</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID__SHIFT) &amp; A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__MASK		0xff000000</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__SHIFT		24</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__SHIFT) &amp; A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_CONTROL_1				0x000023d5</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID__MASK		0x00000fff</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID__SHIFT) &amp; A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID__MASK	0x00fff000</div><div class='del'>-#define A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID__SHIFT	12</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID__SHIFT) &amp; A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_KERNEL_CONST				0x000023d6</div><div class='del'>-#define A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID__MASK		0x00000fff</div><div class='del'>-#define A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID__SHIFT) &amp; A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID__MASK		0x00fff000</div><div class='del'>-#define A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID__SHIFT		12</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID__SHIFT) &amp; A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_KERNEL_GROUP_X				0x000023d7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_KERNEL_GROUP_Y				0x000023d8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_KERNEL_GROUP_Z				0x000023d9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_CL_WG_OFFSET				0x000023da</div><div class='del'>-#define A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID__MASK		0x00000fff</div><div class='del'>-#define A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID__SHIFT		0</div><div class='del'>-static inline uint32_t A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID__SHIFT) &amp; A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_HLSQ_UPDATE_CONTROL				0x000023db</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_BINNING_COMMAND				0x00000d00</div><div class='del'>-#define A4XX_PC_BINNING_COMMAND_BINNING_ENABLE			0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_TESSFACTOR_ADDR				0x00000d08</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_DRAWCALL_SETUP_OVERRIDE			0x00000d0c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_0				0x00000d10</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_1				0x00000d11</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_2				0x00000d12</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_3				0x00000d13</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_4				0x00000d14</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_5				0x00000d15</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_6				0x00000d16</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PERFCTR_PC_SEL_7				0x00000d17</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_BIN_BASE					0x000021c0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_VSTREAM_CONTROL				0x000021c2</div><div class='del'>-#define A4XX_PC_VSTREAM_CONTROL_SIZE__MASK			0x003f0000</div><div class='del'>-#define A4XX_PC_VSTREAM_CONTROL_SIZE__SHIFT			16</div><div class='del'>-static inline uint32_t A4XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) &amp; A4XX_PC_VSTREAM_CONTROL_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_VSTREAM_CONTROL_N__MASK				0x07c00000</div><div class='del'>-#define A4XX_PC_VSTREAM_CONTROL_N__SHIFT			22</div><div class='del'>-static inline uint32_t A4XX_PC_VSTREAM_CONTROL_N(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_VSTREAM_CONTROL_N__SHIFT) &amp; A4XX_PC_VSTREAM_CONTROL_N__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PRIM_VTX_CNTL				0x000021c4</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK			0x0000000f</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) &amp; A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL_PRIMITIVE_RESTART			0x00100000</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST		0x02000000</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL_PSIZE				0x04000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_PRIM_VTX_CNTL2				0x000021c5</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__MASK	0x00000007</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__SHIFT	0</div><div class='del'>-static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__SHIFT) &amp; A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__MASK	0x00000038</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__SHIFT	3</div><div class='del'>-static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__SHIFT) &amp; A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_ENABLE			0x00000040</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_RESTART_INDEX				0x000021c6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_GS_PARAM					0x000021e5</div><div class='del'>-#define A4XX_PC_GS_PARAM_MAX_VERTICES__MASK			0x000003ff</div><div class='del'>-#define A4XX_PC_GS_PARAM_MAX_VERTICES__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) &amp; A4XX_PC_GS_PARAM_MAX_VERTICES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_GS_PARAM_INVOCATIONS__MASK			0x0000f800</div><div class='del'>-#define A4XX_PC_GS_PARAM_INVOCATIONS__SHIFT			11</div><div class='del'>-static inline uint32_t A4XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_GS_PARAM_INVOCATIONS__SHIFT) &amp; A4XX_PC_GS_PARAM_INVOCATIONS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_GS_PARAM_PRIMTYPE__MASK				0x01800000</div><div class='del'>-#define A4XX_PC_GS_PARAM_PRIMTYPE__SHIFT			23</div><div class='del'>-static inline uint32_t A4XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_GS_PARAM_PRIMTYPE__SHIFT) &amp; A4XX_PC_GS_PARAM_PRIMTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_GS_PARAM_LAYER					0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_PC_HS_PARAM					0x000021e7</div><div class='del'>-#define A4XX_PC_HS_PARAM_VERTICES_OUT__MASK			0x0000003f</div><div class='del'>-#define A4XX_PC_HS_PARAM_VERTICES_OUT__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) &amp; A4XX_PC_HS_PARAM_VERTICES_OUT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_HS_PARAM_SPACING__MASK				0x00600000</div><div class='del'>-#define A4XX_PC_HS_PARAM_SPACING__SHIFT				21</div><div class='del'>-static inline uint32_t A4XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_PC_HS_PARAM_SPACING__SHIFT) &amp; A4XX_PC_HS_PARAM_SPACING__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_PC_HS_PARAM_CW					0x00800000</div><div class='del'>-#define A4XX_PC_HS_PARAM_CONNECTED				0x01000000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_VERSION					0x00003000</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_CLKON					0x00003001</div><div class='del'>-#define A4XX_VBIF_CLKON_FORCE_ON_TESTBUS			0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_ABIT_SORT					0x0000301c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_ABIT_SORT_CONF				0x0000301d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_GATE_OFF_WRREQ_EN				0x0000302a</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_IN_RD_LIM_CONF0				0x0000302c</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_IN_RD_LIM_CONF1				0x0000302d</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_IN_WR_LIM_CONF0				0x00003030</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_IN_WR_LIM_CONF1				0x00003031</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_ROUND_ROBIN_QOS_ARB			0x00003049</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_EN0				0x000030c0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_EN1				0x000030c1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_EN2				0x000030c2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_EN3				0x000030c3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_SEL0				0x000030d0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_SEL1				0x000030d1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_SEL2				0x000030d2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_SEL3				0x000030d3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_LOW0				0x000030d8</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_LOW1				0x000030d9</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_LOW2				0x000030da</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_LOW3				0x000030db</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_HIGH0				0x000030e0</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_HIGH1				0x000030e1</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_HIGH2				0x000030e2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_CNT_HIGH3				0x000030e3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_PWR_CNT_EN0				0x00003100</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_PWR_CNT_EN1				0x00003101</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_VBIF_PERF_PWR_CNT_EN2				0x00003102</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_0CC5					0x00000cc5</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_0CC6					0x00000cc6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_0D01					0x00000d01</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_0E42					0x00000e42</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_0EC2					0x00000ec2</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2001					0x00002001</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_209B					0x0000209b</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_20EF					0x000020ef</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2152					0x00002152</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2153					0x00002153</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2154					0x00002154</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2155					0x00002155</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2156					0x00002156</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2157					0x00002157</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_21C3					0x000021c3</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_21E6					0x000021e6</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2209					0x00002209</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_22D7					0x000022d7</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_UNKNOWN_2352					0x00002352</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_SAMP_0					0x00000000</div><div class='del'>-#define A4XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR			0x00000001</div><div class='del'>-#define A4XX_TEX_SAMP_0_XY_MAG__MASK				0x00000006</div><div class='del'>-#define A4XX_TEX_SAMP_0_XY_MAG__SHIFT				1</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_XY_MAG(enum a4xx_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_0_XY_MAG__SHIFT) &amp; A4XX_TEX_SAMP_0_XY_MAG__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_0_XY_MIN__MASK				0x00000018</div><div class='del'>-#define A4XX_TEX_SAMP_0_XY_MIN__SHIFT				3</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_XY_MIN(enum a4xx_tex_filter val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_0_XY_MIN__SHIFT) &amp; A4XX_TEX_SAMP_0_XY_MIN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_0_WRAP_S__MASK				0x000000e0</div><div class='del'>-#define A4XX_TEX_SAMP_0_WRAP_S__SHIFT				5</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_WRAP_S(enum a4xx_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_0_WRAP_S__SHIFT) &amp; A4XX_TEX_SAMP_0_WRAP_S__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_0_WRAP_T__MASK				0x00000700</div><div class='del'>-#define A4XX_TEX_SAMP_0_WRAP_T__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_WRAP_T(enum a4xx_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_0_WRAP_T__SHIFT) &amp; A4XX_TEX_SAMP_0_WRAP_T__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_0_WRAP_R__MASK				0x00003800</div><div class='del'>-#define A4XX_TEX_SAMP_0_WRAP_R__SHIFT				11</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_0_WRAP_R__SHIFT) &amp; A4XX_TEX_SAMP_0_WRAP_R__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_0_ANISO__MASK				0x0001c000</div><div class='del'>-#define A4XX_TEX_SAMP_0_ANISO__SHIFT				14</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_0_ANISO__SHIFT) &amp; A4XX_TEX_SAMP_0_ANISO__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_0_LOD_BIAS__MASK				0xfff80000</div><div class='del'>-#define A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT				19</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_0_LOD_BIAS(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 256.0))) &lt;&lt; A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT) &amp; A4XX_TEX_SAMP_0_LOD_BIAS__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_SAMP_1					0x00000001</div><div class='del'>-#define A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK			0x0000000e</div><div class='del'>-#define A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT			1</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) &amp; A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF			0x00000010</div><div class='del'>-#define A4XX_TEX_SAMP_1_UNNORM_COORDS				0x00000020</div><div class='del'>-#define A4XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR			0x00000040</div><div class='del'>-#define A4XX_TEX_SAMP_1_MAX_LOD__MASK				0x000fff00</div><div class='del'>-#define A4XX_TEX_SAMP_1_MAX_LOD__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_1_MAX_LOD(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 256.0))) &lt;&lt; A4XX_TEX_SAMP_1_MAX_LOD__SHIFT) &amp; A4XX_TEX_SAMP_1_MAX_LOD__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_SAMP_1_MIN_LOD__MASK				0xfff00000</div><div class='del'>-#define A4XX_TEX_SAMP_1_MIN_LOD__SHIFT				20</div><div class='del'>-static inline uint32_t A4XX_TEX_SAMP_1_MIN_LOD(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 256.0))) &lt;&lt; A4XX_TEX_SAMP_1_MIN_LOD__SHIFT) &amp; A4XX_TEX_SAMP_1_MIN_LOD__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_0					0x00000000</div><div class='del'>-#define A4XX_TEX_CONST_0_TILED					0x00000001</div><div class='del'>-#define A4XX_TEX_CONST_0_SRGB					0x00000004</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_X__MASK				0x00000070</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_X__SHIFT				4</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_SWIZ_X(enum a4xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_SWIZ_X__SHIFT) &amp; A4XX_TEX_CONST_0_SWIZ_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_Y__MASK				0x00000380</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_Y__SHIFT				7</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Y(enum a4xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_SWIZ_Y__SHIFT) &amp; A4XX_TEX_CONST_0_SWIZ_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_Z__MASK				0x00001c00</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_Z__SHIFT				10</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Z(enum a4xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_SWIZ_Z__SHIFT) &amp; A4XX_TEX_CONST_0_SWIZ_Z__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_W__MASK				0x0000e000</div><div class='del'>-#define A4XX_TEX_CONST_0_SWIZ_W__SHIFT				13</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_SWIZ_W(enum a4xx_tex_swiz val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_SWIZ_W__SHIFT) &amp; A4XX_TEX_CONST_0_SWIZ_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_0_MIPLVLS__MASK				0x000f0000</div><div class='del'>-#define A4XX_TEX_CONST_0_MIPLVLS__SHIFT				16</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_MIPLVLS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_MIPLVLS__SHIFT) &amp; A4XX_TEX_CONST_0_MIPLVLS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_0_FMT__MASK				0x1fc00000</div><div class='del'>-#define A4XX_TEX_CONST_0_FMT__SHIFT				22</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_FMT(enum a4xx_tex_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_FMT__SHIFT) &amp; A4XX_TEX_CONST_0_FMT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_0_TYPE__MASK				0xe0000000</div><div class='del'>-#define A4XX_TEX_CONST_0_TYPE__SHIFT				29</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_0_TYPE(enum a4xx_tex_type val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_0_TYPE__SHIFT) &amp; A4XX_TEX_CONST_0_TYPE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_1					0x00000001</div><div class='del'>-#define A4XX_TEX_CONST_1_HEIGHT__MASK				0x00007fff</div><div class='del'>-#define A4XX_TEX_CONST_1_HEIGHT__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_1_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_1_HEIGHT__SHIFT) &amp; A4XX_TEX_CONST_1_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_1_WIDTH__MASK				0x3fff8000</div><div class='del'>-#define A4XX_TEX_CONST_1_WIDTH__SHIFT				15</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_1_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_1_WIDTH__SHIFT) &amp; A4XX_TEX_CONST_1_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_2					0x00000002</div><div class='del'>-#define A4XX_TEX_CONST_2_PITCHALIGN__MASK			0x0000000f</div><div class='del'>-#define A4XX_TEX_CONST_2_PITCHALIGN__SHIFT			0</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_2_PITCHALIGN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_2_PITCHALIGN__SHIFT) &amp; A4XX_TEX_CONST_2_PITCHALIGN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_2_BUFFER					0x00000040</div><div class='del'>-#define A4XX_TEX_CONST_2_PITCH__MASK				0x3ffffe00</div><div class='del'>-#define A4XX_TEX_CONST_2_PITCH__SHIFT				9</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_2_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_2_PITCH__SHIFT) &amp; A4XX_TEX_CONST_2_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_2_SWAP__MASK				0xc0000000</div><div class='del'>-#define A4XX_TEX_CONST_2_SWAP__SHIFT				30</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_2_SWAP__SHIFT) &amp; A4XX_TEX_CONST_2_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_3					0x00000003</div><div class='del'>-#define A4XX_TEX_CONST_3_LAYERSZ__MASK				0x00003fff</div><div class='del'>-#define A4XX_TEX_CONST_3_LAYERSZ__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A4XX_TEX_CONST_3_LAYERSZ__SHIFT) &amp; A4XX_TEX_CONST_3_LAYERSZ__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_3_DEPTH__MASK				0x7ffc0000</div><div class='del'>-#define A4XX_TEX_CONST_3_DEPTH__SHIFT				18</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_3_DEPTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_TEX_CONST_3_DEPTH__SHIFT) &amp; A4XX_TEX_CONST_3_DEPTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_4					0x00000004</div><div class='del'>-#define A4XX_TEX_CONST_4_LAYERSZ__MASK				0x0000000f</div><div class='del'>-#define A4XX_TEX_CONST_4_LAYERSZ__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A4XX_TEX_CONST_4_LAYERSZ__SHIFT) &amp; A4XX_TEX_CONST_4_LAYERSZ__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_TEX_CONST_4_BASE__MASK				0xffffffe0</div><div class='del'>-#define A4XX_TEX_CONST_4_BASE__SHIFT				5</div><div class='del'>-static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_TEX_CONST_4_BASE__SHIFT) &amp; A4XX_TEX_CONST_4_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_5					0x00000005</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_6					0x00000006</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_TEX_CONST_7					0x00000007</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SSBO_0_0					0x00000000</div><div class='del'>-#define A4XX_SSBO_0_0_BASE__MASK				0xffffffe0</div><div class='del'>-#define A4XX_SSBO_0_0_BASE__SHIFT				5</div><div class='del'>-static inline uint32_t A4XX_SSBO_0_0_BASE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A4XX_SSBO_0_0_BASE__SHIFT) &amp; A4XX_SSBO_0_0_BASE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SSBO_0_1					0x00000001</div><div class='del'>-#define A4XX_SSBO_0_1_PITCH__MASK				0x003fffff</div><div class='del'>-#define A4XX_SSBO_0_1_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_SSBO_0_1_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_0_1_PITCH__SHIFT) &amp; A4XX_SSBO_0_1_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SSBO_0_2					0x00000002</div><div class='del'>-#define A4XX_SSBO_0_2_ARRAY_PITCH__MASK				0x03fff000</div><div class='del'>-#define A4XX_SSBO_0_2_ARRAY_PITCH__SHIFT			12</div><div class='del'>-static inline uint32_t A4XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0xfff));</div><div class='del'>-	return (((val &gt;&gt; 12)) &lt;&lt; A4XX_SSBO_0_2_ARRAY_PITCH__SHIFT) &amp; A4XX_SSBO_0_2_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SSBO_0_3					0x00000003</div><div class='del'>-#define A4XX_SSBO_0_3_CPP__MASK					0x0000003f</div><div class='del'>-#define A4XX_SSBO_0_3_CPP__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_SSBO_0_3_CPP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_0_3_CPP__SHIFT) &amp; A4XX_SSBO_0_3_CPP__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SSBO_1_0					0x00000000</div><div class='del'>-#define A4XX_SSBO_1_0_CPP__MASK					0x0000001f</div><div class='del'>-#define A4XX_SSBO_1_0_CPP__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_SSBO_1_0_CPP(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_1_0_CPP__SHIFT) &amp; A4XX_SSBO_1_0_CPP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SSBO_1_0_FMT__MASK					0x0000ff00</div><div class='del'>-#define A4XX_SSBO_1_0_FMT__SHIFT				8</div><div class='del'>-static inline uint32_t A4XX_SSBO_1_0_FMT(enum a4xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_1_0_FMT__SHIFT) &amp; A4XX_SSBO_1_0_FMT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SSBO_1_0_WIDTH__MASK				0xffff0000</div><div class='del'>-#define A4XX_SSBO_1_0_WIDTH__SHIFT				16</div><div class='del'>-static inline uint32_t A4XX_SSBO_1_0_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_1_0_WIDTH__SHIFT) &amp; A4XX_SSBO_1_0_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A4XX_SSBO_1_1					0x00000001</div><div class='del'>-#define A4XX_SSBO_1_1_HEIGHT__MASK				0x0000ffff</div><div class='del'>-#define A4XX_SSBO_1_1_HEIGHT__SHIFT				0</div><div class='del'>-static inline uint32_t A4XX_SSBO_1_1_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_1_1_HEIGHT__SHIFT) &amp; A4XX_SSBO_1_1_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A4XX_SSBO_1_1_DEPTH__MASK				0xffff0000</div><div class='del'>-#define A4XX_SSBO_1_1_DEPTH__SHIFT				16</div><div class='del'>-static inline uint32_t A4XX_SSBO_1_1_DEPTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A4XX_SSBO_1_1_DEPTH__SHIFT) &amp; A4XX_SSBO_1_1_DEPTH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* A4XX_XML */</div><div class='head'>diff --git a/drivers/gpu/drm/msm/adreno/a5xx.xml.h b/drivers/gpu/drm/msm/adreno/a5xx.xml.h<br/>deleted file mode 100644<br/>index d66306c14986..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/msm/adreno/a5xx.xml.h?h=v6.10-rc1&amp;id=41147b006be2174b825a54b0620ecf4cc7ec5c84'>drivers/gpu/drm/msm/adreno/a5xx.xml.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,5572 +0,0 @@</div><div class='del'>-#ifndef A5XX_XML</div><div class='del'>-#define A5XX_XML</div><div class='del'>-</div><div class='del'>-/* Autogenerated file, DO NOT EDIT manually!</div><div class='del'>-</div><div class='del'>-This file was generated by the rules-ng-ng gen_header.py tool in this git repository:</div><div class='del'>-http://gitlab.freedesktop.org/mesa/mesa/</div><div class='del'>-git clone https://gitlab.freedesktop.org/mesa/mesa.git</div><div class='del'>-</div><div class='del'>-The rules-ng-ng source files this header was generated from are:</div><div class='del'>-</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a5xx.xml          ( 151693 bytes, from Wed Aug 23 10:39:39 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml  (   1572 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_common.xml (  15434 bytes, from Fri Jun  2 14:59:26 2023)</div><div class='del'>-- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pm4.xml    (  85691 bytes, from Fri Feb 16 09:49:01 2024)</div><div class='del'>-</div><div class='del'>-Copyright (C) 2013-2024 by the following authors:</div><div class='del'>-- Rob Clark &lt;robdclark@gmail.com&gt; Rob Clark</div><div class='del'>-- Ilia Mirkin &lt;imirkin@alum.mit.edu&gt; Ilia Mirkin</div><div class='del'>-</div><div class='del'>-Permission is hereby granted, free of charge, to any person obtaining</div><div class='del'>-a copy of this software and associated documentation files (the</div><div class='del'>-"Software"), to deal in the Software without restriction, including</div><div class='del'>-without limitation the rights to use, copy, modify, merge, publish,</div><div class='del'>-distribute, sublicense, and/or sell copies of the Software, and to</div><div class='del'>-permit persons to whom the Software is furnished to do so, subject to</div><div class='del'>-the following conditions:</div><div class='del'>-</div><div class='del'>-The above copyright notice and this permission notice (including the</div><div class='del'>-next paragraph) shall be included in all copies or substantial</div><div class='del'>-portions of the Software.</div><div class='del'>-</div><div class='del'>-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='del'>-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.</div><div class='del'>-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE</div><div class='del'>-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION</div><div class='del'>-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION</div><div class='del'>-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#define assert(x) BUG_ON(!(x))</div><div class='del'>-#else</div><div class='del'>-#include &lt;assert.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef __cplusplus</div><div class='del'>-#define __struct_cast(X)</div><div class='del'>-#else</div><div class='del'>-#define __struct_cast(X) (struct X)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum a5xx_color_fmt {</div><div class='del'>-	RB5_A8_UNORM = 2,</div><div class='del'>-	RB5_R8_UNORM = 3,</div><div class='del'>-	RB5_R8_SNORM = 4,</div><div class='del'>-	RB5_R8_UINT = 5,</div><div class='del'>-	RB5_R8_SINT = 6,</div><div class='del'>-	RB5_R4G4B4A4_UNORM = 8,</div><div class='del'>-	RB5_R5G5B5A1_UNORM = 10,</div><div class='del'>-	RB5_R5G6B5_UNORM = 14,</div><div class='del'>-	RB5_R8G8_UNORM = 15,</div><div class='del'>-	RB5_R8G8_SNORM = 16,</div><div class='del'>-	RB5_R8G8_UINT = 17,</div><div class='del'>-	RB5_R8G8_SINT = 18,</div><div class='del'>-	RB5_R16_UNORM = 21,</div><div class='del'>-	RB5_R16_SNORM = 22,</div><div class='del'>-	RB5_R16_FLOAT = 23,</div><div class='del'>-	RB5_R16_UINT = 24,</div><div class='del'>-	RB5_R16_SINT = 25,</div><div class='del'>-	RB5_R8G8B8A8_UNORM = 48,</div><div class='del'>-	RB5_R8G8B8_UNORM = 49,</div><div class='del'>-	RB5_R8G8B8A8_SNORM = 50,</div><div class='del'>-	RB5_R8G8B8A8_UINT = 51,</div><div class='del'>-	RB5_R8G8B8A8_SINT = 52,</div><div class='del'>-	RB5_R10G10B10A2_UNORM = 55,</div><div class='del'>-	RB5_R10G10B10A2_UINT = 58,</div><div class='del'>-	RB5_R11G11B10_FLOAT = 66,</div><div class='del'>-	RB5_R16G16_UNORM = 67,</div><div class='del'>-	RB5_R16G16_SNORM = 68,</div><div class='del'>-	RB5_R16G16_FLOAT = 69,</div><div class='del'>-	RB5_R16G16_UINT = 70,</div><div class='del'>-	RB5_R16G16_SINT = 71,</div><div class='del'>-	RB5_R32_FLOAT = 74,</div><div class='del'>-	RB5_R32_UINT = 75,</div><div class='del'>-	RB5_R32_SINT = 76,</div><div class='del'>-	RB5_R16G16B16A16_UNORM = 96,</div><div class='del'>-	RB5_R16G16B16A16_SNORM = 97,</div><div class='del'>-	RB5_R16G16B16A16_FLOAT = 98,</div><div class='del'>-	RB5_R16G16B16A16_UINT = 99,</div><div class='del'>-	RB5_R16G16B16A16_SINT = 100,</div><div class='del'>-	RB5_R32G32_FLOAT = 103,</div><div class='del'>-	RB5_R32G32_UINT = 104,</div><div class='del'>-	RB5_R32G32_SINT = 105,</div><div class='del'>-	RB5_R32G32B32A32_FLOAT = 130,</div><div class='del'>-	RB5_R32G32B32A32_UINT = 131,</div><div class='del'>-	RB5_R32G32B32A32_SINT = 132,</div><div class='del'>-	RB5_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tile_mode {</div><div class='del'>-	TILE5_LINEAR = 0,</div><div class='del'>-	TILE5_2 = 2,</div><div class='del'>-	TILE5_3 = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_vtx_fmt {</div><div class='del'>-	VFMT5_8_UNORM = 3,</div><div class='del'>-	VFMT5_8_SNORM = 4,</div><div class='del'>-	VFMT5_8_UINT = 5,</div><div class='del'>-	VFMT5_8_SINT = 6,</div><div class='del'>-	VFMT5_8_8_UNORM = 15,</div><div class='del'>-	VFMT5_8_8_SNORM = 16,</div><div class='del'>-	VFMT5_8_8_UINT = 17,</div><div class='del'>-	VFMT5_8_8_SINT = 18,</div><div class='del'>-	VFMT5_16_UNORM = 21,</div><div class='del'>-	VFMT5_16_SNORM = 22,</div><div class='del'>-	VFMT5_16_FLOAT = 23,</div><div class='del'>-	VFMT5_16_UINT = 24,</div><div class='del'>-	VFMT5_16_SINT = 25,</div><div class='del'>-	VFMT5_8_8_8_UNORM = 33,</div><div class='del'>-	VFMT5_8_8_8_SNORM = 34,</div><div class='del'>-	VFMT5_8_8_8_UINT = 35,</div><div class='del'>-	VFMT5_8_8_8_SINT = 36,</div><div class='del'>-	VFMT5_8_8_8_8_UNORM = 48,</div><div class='del'>-	VFMT5_8_8_8_8_SNORM = 50,</div><div class='del'>-	VFMT5_8_8_8_8_UINT = 51,</div><div class='del'>-	VFMT5_8_8_8_8_SINT = 52,</div><div class='del'>-	VFMT5_10_10_10_2_UNORM = 54,</div><div class='del'>-	VFMT5_10_10_10_2_SNORM = 57,</div><div class='del'>-	VFMT5_10_10_10_2_UINT = 58,</div><div class='del'>-	VFMT5_10_10_10_2_SINT = 59,</div><div class='del'>-	VFMT5_11_11_10_FLOAT = 66,</div><div class='del'>-	VFMT5_16_16_UNORM = 67,</div><div class='del'>-	VFMT5_16_16_SNORM = 68,</div><div class='del'>-	VFMT5_16_16_FLOAT = 69,</div><div class='del'>-	VFMT5_16_16_UINT = 70,</div><div class='del'>-	VFMT5_16_16_SINT = 71,</div><div class='del'>-	VFMT5_32_UNORM = 72,</div><div class='del'>-	VFMT5_32_SNORM = 73,</div><div class='del'>-	VFMT5_32_FLOAT = 74,</div><div class='del'>-	VFMT5_32_UINT = 75,</div><div class='del'>-	VFMT5_32_SINT = 76,</div><div class='del'>-	VFMT5_32_FIXED = 77,</div><div class='del'>-	VFMT5_16_16_16_UNORM = 88,</div><div class='del'>-	VFMT5_16_16_16_SNORM = 89,</div><div class='del'>-	VFMT5_16_16_16_FLOAT = 90,</div><div class='del'>-	VFMT5_16_16_16_UINT = 91,</div><div class='del'>-	VFMT5_16_16_16_SINT = 92,</div><div class='del'>-	VFMT5_16_16_16_16_UNORM = 96,</div><div class='del'>-	VFMT5_16_16_16_16_SNORM = 97,</div><div class='del'>-	VFMT5_16_16_16_16_FLOAT = 98,</div><div class='del'>-	VFMT5_16_16_16_16_UINT = 99,</div><div class='del'>-	VFMT5_16_16_16_16_SINT = 100,</div><div class='del'>-	VFMT5_32_32_UNORM = 101,</div><div class='del'>-	VFMT5_32_32_SNORM = 102,</div><div class='del'>-	VFMT5_32_32_FLOAT = 103,</div><div class='del'>-	VFMT5_32_32_UINT = 104,</div><div class='del'>-	VFMT5_32_32_SINT = 105,</div><div class='del'>-	VFMT5_32_32_FIXED = 106,</div><div class='del'>-	VFMT5_32_32_32_UNORM = 112,</div><div class='del'>-	VFMT5_32_32_32_SNORM = 113,</div><div class='del'>-	VFMT5_32_32_32_UINT = 114,</div><div class='del'>-	VFMT5_32_32_32_SINT = 115,</div><div class='del'>-	VFMT5_32_32_32_FLOAT = 116,</div><div class='del'>-	VFMT5_32_32_32_FIXED = 117,</div><div class='del'>-	VFMT5_32_32_32_32_UNORM = 128,</div><div class='del'>-	VFMT5_32_32_32_32_SNORM = 129,</div><div class='del'>-	VFMT5_32_32_32_32_FLOAT = 130,</div><div class='del'>-	VFMT5_32_32_32_32_UINT = 131,</div><div class='del'>-	VFMT5_32_32_32_32_SINT = 132,</div><div class='del'>-	VFMT5_32_32_32_32_FIXED = 133,</div><div class='del'>-	VFMT5_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tex_fmt {</div><div class='del'>-	TFMT5_A8_UNORM = 2,</div><div class='del'>-	TFMT5_8_UNORM = 3,</div><div class='del'>-	TFMT5_8_SNORM = 4,</div><div class='del'>-	TFMT5_8_UINT = 5,</div><div class='del'>-	TFMT5_8_SINT = 6,</div><div class='del'>-	TFMT5_4_4_4_4_UNORM = 8,</div><div class='del'>-	TFMT5_5_5_5_1_UNORM = 10,</div><div class='del'>-	TFMT5_5_6_5_UNORM = 14,</div><div class='del'>-	TFMT5_8_8_UNORM = 15,</div><div class='del'>-	TFMT5_8_8_SNORM = 16,</div><div class='del'>-	TFMT5_8_8_UINT = 17,</div><div class='del'>-	TFMT5_8_8_SINT = 18,</div><div class='del'>-	TFMT5_L8_A8_UNORM = 19,</div><div class='del'>-	TFMT5_16_UNORM = 21,</div><div class='del'>-	TFMT5_16_SNORM = 22,</div><div class='del'>-	TFMT5_16_FLOAT = 23,</div><div class='del'>-	TFMT5_16_UINT = 24,</div><div class='del'>-	TFMT5_16_SINT = 25,</div><div class='del'>-	TFMT5_8_8_8_8_UNORM = 48,</div><div class='del'>-	TFMT5_8_8_8_UNORM = 49,</div><div class='del'>-	TFMT5_8_8_8_8_SNORM = 50,</div><div class='del'>-	TFMT5_8_8_8_8_UINT = 51,</div><div class='del'>-	TFMT5_8_8_8_8_SINT = 52,</div><div class='del'>-	TFMT5_9_9_9_E5_FLOAT = 53,</div><div class='del'>-	TFMT5_10_10_10_2_UNORM = 54,</div><div class='del'>-	TFMT5_10_10_10_2_UINT = 58,</div><div class='del'>-	TFMT5_11_11_10_FLOAT = 66,</div><div class='del'>-	TFMT5_16_16_UNORM = 67,</div><div class='del'>-	TFMT5_16_16_SNORM = 68,</div><div class='del'>-	TFMT5_16_16_FLOAT = 69,</div><div class='del'>-	TFMT5_16_16_UINT = 70,</div><div class='del'>-	TFMT5_16_16_SINT = 71,</div><div class='del'>-	TFMT5_32_FLOAT = 74,</div><div class='del'>-	TFMT5_32_UINT = 75,</div><div class='del'>-	TFMT5_32_SINT = 76,</div><div class='del'>-	TFMT5_16_16_16_16_UNORM = 96,</div><div class='del'>-	TFMT5_16_16_16_16_SNORM = 97,</div><div class='del'>-	TFMT5_16_16_16_16_FLOAT = 98,</div><div class='del'>-	TFMT5_16_16_16_16_UINT = 99,</div><div class='del'>-	TFMT5_16_16_16_16_SINT = 100,</div><div class='del'>-	TFMT5_32_32_FLOAT = 103,</div><div class='del'>-	TFMT5_32_32_UINT = 104,</div><div class='del'>-	TFMT5_32_32_SINT = 105,</div><div class='del'>-	TFMT5_32_32_32_UINT = 114,</div><div class='del'>-	TFMT5_32_32_32_SINT = 115,</div><div class='del'>-	TFMT5_32_32_32_FLOAT = 116,</div><div class='del'>-	TFMT5_32_32_32_32_FLOAT = 130,</div><div class='del'>-	TFMT5_32_32_32_32_UINT = 131,</div><div class='del'>-	TFMT5_32_32_32_32_SINT = 132,</div><div class='del'>-	TFMT5_X8Z24_UNORM = 160,</div><div class='del'>-	TFMT5_ETC2_RG11_UNORM = 171,</div><div class='del'>-	TFMT5_ETC2_RG11_SNORM = 172,</div><div class='del'>-	TFMT5_ETC2_R11_UNORM = 173,</div><div class='del'>-	TFMT5_ETC2_R11_SNORM = 174,</div><div class='del'>-	TFMT5_ETC1 = 175,</div><div class='del'>-	TFMT5_ETC2_RGB8 = 176,</div><div class='del'>-	TFMT5_ETC2_RGBA8 = 177,</div><div class='del'>-	TFMT5_ETC2_RGB8A1 = 178,</div><div class='del'>-	TFMT5_DXT1 = 179,</div><div class='del'>-	TFMT5_DXT3 = 180,</div><div class='del'>-	TFMT5_DXT5 = 181,</div><div class='del'>-	TFMT5_RGTC1_UNORM = 183,</div><div class='del'>-	TFMT5_RGTC1_SNORM = 184,</div><div class='del'>-	TFMT5_RGTC2_UNORM = 187,</div><div class='del'>-	TFMT5_RGTC2_SNORM = 188,</div><div class='del'>-	TFMT5_BPTC_UFLOAT = 190,</div><div class='del'>-	TFMT5_BPTC_FLOAT = 191,</div><div class='del'>-	TFMT5_BPTC = 192,</div><div class='del'>-	TFMT5_ASTC_4x4 = 193,</div><div class='del'>-	TFMT5_ASTC_5x4 = 194,</div><div class='del'>-	TFMT5_ASTC_5x5 = 195,</div><div class='del'>-	TFMT5_ASTC_6x5 = 196,</div><div class='del'>-	TFMT5_ASTC_6x6 = 197,</div><div class='del'>-	TFMT5_ASTC_8x5 = 198,</div><div class='del'>-	TFMT5_ASTC_8x6 = 199,</div><div class='del'>-	TFMT5_ASTC_8x8 = 200,</div><div class='del'>-	TFMT5_ASTC_10x5 = 201,</div><div class='del'>-	TFMT5_ASTC_10x6 = 202,</div><div class='del'>-	TFMT5_ASTC_10x8 = 203,</div><div class='del'>-	TFMT5_ASTC_10x10 = 204,</div><div class='del'>-	TFMT5_ASTC_12x10 = 205,</div><div class='del'>-	TFMT5_ASTC_12x12 = 206,</div><div class='del'>-	TFMT5_NONE = 255,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_depth_format {</div><div class='del'>-	DEPTH5_NONE = 0,</div><div class='del'>-	DEPTH5_16 = 1,</div><div class='del'>-	DEPTH5_24_8 = 2,</div><div class='del'>-	DEPTH5_32 = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_blit_buf {</div><div class='del'>-	BLIT_MRT0 = 0,</div><div class='del'>-	BLIT_MRT1 = 1,</div><div class='del'>-	BLIT_MRT2 = 2,</div><div class='del'>-	BLIT_MRT3 = 3,</div><div class='del'>-	BLIT_MRT4 = 4,</div><div class='del'>-	BLIT_MRT5 = 5,</div><div class='del'>-	BLIT_MRT6 = 6,</div><div class='del'>-	BLIT_MRT7 = 7,</div><div class='del'>-	BLIT_ZS = 8,</div><div class='del'>-	BLIT_S = 9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_cp_perfcounter_select {</div><div class='del'>-	PERF_CP_ALWAYS_COUNT = 0,</div><div class='del'>-	PERF_CP_BUSY_GFX_CORE_IDLE = 1,</div><div class='del'>-	PERF_CP_BUSY_CYCLES = 2,</div><div class='del'>-	PERF_CP_PFP_IDLE = 3,</div><div class='del'>-	PERF_CP_PFP_BUSY_WORKING = 4,</div><div class='del'>-	PERF_CP_PFP_STALL_CYCLES_ANY = 5,</div><div class='del'>-	PERF_CP_PFP_STARVE_CYCLES_ANY = 6,</div><div class='del'>-	PERF_CP_PFP_ICACHE_MISS = 7,</div><div class='del'>-	PERF_CP_PFP_ICACHE_HIT = 8,</div><div class='del'>-	PERF_CP_PFP_MATCH_PM4_PKT_PROFILE = 9,</div><div class='del'>-	PERF_CP_ME_BUSY_WORKING = 10,</div><div class='del'>-	PERF_CP_ME_IDLE = 11,</div><div class='del'>-	PERF_CP_ME_STARVE_CYCLES_ANY = 12,</div><div class='del'>-	PERF_CP_ME_FIFO_EMPTY_PFP_IDLE = 13,</div><div class='del'>-	PERF_CP_ME_FIFO_EMPTY_PFP_BUSY = 14,</div><div class='del'>-	PERF_CP_ME_FIFO_FULL_ME_BUSY = 15,</div><div class='del'>-	PERF_CP_ME_FIFO_FULL_ME_NON_WORKING = 16,</div><div class='del'>-	PERF_CP_ME_STALL_CYCLES_ANY = 17,</div><div class='del'>-	PERF_CP_ME_ICACHE_MISS = 18,</div><div class='del'>-	PERF_CP_ME_ICACHE_HIT = 19,</div><div class='del'>-	PERF_CP_NUM_PREEMPTIONS = 20,</div><div class='del'>-	PERF_CP_PREEMPTION_REACTION_DELAY = 21,</div><div class='del'>-	PERF_CP_PREEMPTION_SWITCH_OUT_TIME = 22,</div><div class='del'>-	PERF_CP_PREEMPTION_SWITCH_IN_TIME = 23,</div><div class='del'>-	PERF_CP_DEAD_DRAWS_IN_BIN_RENDER = 24,</div><div class='del'>-	PERF_CP_PREDICATED_DRAWS_KILLED = 25,</div><div class='del'>-	PERF_CP_MODE_SWITCH = 26,</div><div class='del'>-	PERF_CP_ZPASS_DONE = 27,</div><div class='del'>-	PERF_CP_CONTEXT_DONE = 28,</div><div class='del'>-	PERF_CP_CACHE_FLUSH = 29,</div><div class='del'>-	PERF_CP_LONG_PREEMPTIONS = 30,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_rbbm_perfcounter_select {</div><div class='del'>-	PERF_RBBM_ALWAYS_COUNT = 0,</div><div class='del'>-	PERF_RBBM_ALWAYS_ON = 1,</div><div class='del'>-	PERF_RBBM_TSE_BUSY = 2,</div><div class='del'>-	PERF_RBBM_RAS_BUSY = 3,</div><div class='del'>-	PERF_RBBM_PC_DCALL_BUSY = 4,</div><div class='del'>-	PERF_RBBM_PC_VSD_BUSY = 5,</div><div class='del'>-	PERF_RBBM_STATUS_MASKED = 6,</div><div class='del'>-	PERF_RBBM_COM_BUSY = 7,</div><div class='del'>-	PERF_RBBM_DCOM_BUSY = 8,</div><div class='del'>-	PERF_RBBM_VBIF_BUSY = 9,</div><div class='del'>-	PERF_RBBM_VSC_BUSY = 10,</div><div class='del'>-	PERF_RBBM_TESS_BUSY = 11,</div><div class='del'>-	PERF_RBBM_UCHE_BUSY = 12,</div><div class='del'>-	PERF_RBBM_HLSQ_BUSY = 13,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_pc_perfcounter_select {</div><div class='del'>-	PERF_PC_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_PC_WORKING_CYCLES = 1,</div><div class='del'>-	PERF_PC_STALL_CYCLES_VFD = 2,</div><div class='del'>-	PERF_PC_STALL_CYCLES_TSE = 3,</div><div class='del'>-	PERF_PC_STALL_CYCLES_VPC = 4,</div><div class='del'>-	PERF_PC_STALL_CYCLES_UCHE = 5,</div><div class='del'>-	PERF_PC_STALL_CYCLES_TESS = 6,</div><div class='del'>-	PERF_PC_STALL_CYCLES_TSE_ONLY = 7,</div><div class='del'>-	PERF_PC_STALL_CYCLES_VPC_ONLY = 8,</div><div class='del'>-	PERF_PC_PASS1_TF_STALL_CYCLES = 9,</div><div class='del'>-	PERF_PC_STARVE_CYCLES_FOR_INDEX = 10,</div><div class='del'>-	PERF_PC_STARVE_CYCLES_FOR_TESS_FACTOR = 11,</div><div class='del'>-	PERF_PC_STARVE_CYCLES_FOR_VIZ_STREAM = 12,</div><div class='del'>-	PERF_PC_STARVE_CYCLES_FOR_POSITION = 13,</div><div class='del'>-	PERF_PC_STARVE_CYCLES_DI = 14,</div><div class='del'>-	PERF_PC_VIS_STREAMS_LOADED = 15,</div><div class='del'>-	PERF_PC_INSTANCES = 16,</div><div class='del'>-	PERF_PC_VPC_PRIMITIVES = 17,</div><div class='del'>-	PERF_PC_DEAD_PRIM = 18,</div><div class='del'>-	PERF_PC_LIVE_PRIM = 19,</div><div class='del'>-	PERF_PC_VERTEX_HITS = 20,</div><div class='del'>-	PERF_PC_IA_VERTICES = 21,</div><div class='del'>-	PERF_PC_IA_PRIMITIVES = 22,</div><div class='del'>-	PERF_PC_GS_PRIMITIVES = 23,</div><div class='del'>-	PERF_PC_HS_INVOCATIONS = 24,</div><div class='del'>-	PERF_PC_DS_INVOCATIONS = 25,</div><div class='del'>-	PERF_PC_VS_INVOCATIONS = 26,</div><div class='del'>-	PERF_PC_GS_INVOCATIONS = 27,</div><div class='del'>-	PERF_PC_DS_PRIMITIVES = 28,</div><div class='del'>-	PERF_PC_VPC_POS_DATA_TRANSACTION = 29,</div><div class='del'>-	PERF_PC_3D_DRAWCALLS = 30,</div><div class='del'>-	PERF_PC_2D_DRAWCALLS = 31,</div><div class='del'>-	PERF_PC_NON_DRAWCALL_GLOBAL_EVENTS = 32,</div><div class='del'>-	PERF_TESS_BUSY_CYCLES = 33,</div><div class='del'>-	PERF_TESS_WORKING_CYCLES = 34,</div><div class='del'>-	PERF_TESS_STALL_CYCLES_PC = 35,</div><div class='del'>-	PERF_TESS_STARVE_CYCLES_PC = 36,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_vfd_perfcounter_select {</div><div class='del'>-	PERF_VFD_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_UCHE = 1,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_VPC_ALLOC = 2,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_MISS_VB = 3,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_MISS_Q = 4,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_SP_INFO = 5,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_SP_ATTR = 6,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_VFDP_VB = 7,</div><div class='del'>-	PERF_VFD_STALL_CYCLES_VFDP_Q = 8,</div><div class='del'>-	PERF_VFD_DECODER_PACKER_STALL = 9,</div><div class='del'>-	PERF_VFD_STARVE_CYCLES_UCHE = 10,</div><div class='del'>-	PERF_VFD_RBUFFER_FULL = 11,</div><div class='del'>-	PERF_VFD_ATTR_INFO_FIFO_FULL = 12,</div><div class='del'>-	PERF_VFD_DECODED_ATTRIBUTE_BYTES = 13,</div><div class='del'>-	PERF_VFD_NUM_ATTRIBUTES = 14,</div><div class='del'>-	PERF_VFD_INSTRUCTIONS = 15,</div><div class='del'>-	PERF_VFD_UPPER_SHADER_FIBERS = 16,</div><div class='del'>-	PERF_VFD_LOWER_SHADER_FIBERS = 17,</div><div class='del'>-	PERF_VFD_MODE_0_FIBERS = 18,</div><div class='del'>-	PERF_VFD_MODE_1_FIBERS = 19,</div><div class='del'>-	PERF_VFD_MODE_2_FIBERS = 20,</div><div class='del'>-	PERF_VFD_MODE_3_FIBERS = 21,</div><div class='del'>-	PERF_VFD_MODE_4_FIBERS = 22,</div><div class='del'>-	PERF_VFD_TOTAL_VERTICES = 23,</div><div class='del'>-	PERF_VFD_NUM_ATTR_MISS = 24,</div><div class='del'>-	PERF_VFD_1_BURST_REQ = 25,</div><div class='del'>-	PERF_VFDP_STALL_CYCLES_VFD = 26,</div><div class='del'>-	PERF_VFDP_STALL_CYCLES_VFD_INDEX = 27,</div><div class='del'>-	PERF_VFDP_STALL_CYCLES_VFD_PROG = 28,</div><div class='del'>-	PERF_VFDP_STARVE_CYCLES_PC = 29,</div><div class='del'>-	PERF_VFDP_VS_STAGE_32_WAVES = 30,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_hlsq_perfcounter_select {</div><div class='del'>-	PERF_HLSQ_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_HLSQ_STALL_CYCLES_UCHE = 1,</div><div class='del'>-	PERF_HLSQ_STALL_CYCLES_SP_STATE = 2,</div><div class='del'>-	PERF_HLSQ_STALL_CYCLES_SP_FS_STAGE = 3,</div><div class='del'>-	PERF_HLSQ_UCHE_LATENCY_CYCLES = 4,</div><div class='del'>-	PERF_HLSQ_UCHE_LATENCY_COUNT = 5,</div><div class='del'>-	PERF_HLSQ_FS_STAGE_32_WAVES = 6,</div><div class='del'>-	PERF_HLSQ_FS_STAGE_64_WAVES = 7,</div><div class='del'>-	PERF_HLSQ_QUADS = 8,</div><div class='del'>-	PERF_HLSQ_SP_STATE_COPY_TRANS_FS_STAGE = 9,</div><div class='del'>-	PERF_HLSQ_SP_STATE_COPY_TRANS_VS_STAGE = 10,</div><div class='del'>-	PERF_HLSQ_TP_STATE_COPY_TRANS_FS_STAGE = 11,</div><div class='del'>-	PERF_HLSQ_TP_STATE_COPY_TRANS_VS_STAGE = 12,</div><div class='del'>-	PERF_HLSQ_CS_INVOCATIONS = 13,</div><div class='del'>-	PERF_HLSQ_COMPUTE_DRAWCALLS = 14,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_vpc_perfcounter_select {</div><div class='del'>-	PERF_VPC_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_VPC_WORKING_CYCLES = 1,</div><div class='del'>-	PERF_VPC_STALL_CYCLES_UCHE = 2,</div><div class='del'>-	PERF_VPC_STALL_CYCLES_VFD_WACK = 3,</div><div class='del'>-	PERF_VPC_STALL_CYCLES_HLSQ_PRIM_ALLOC = 4,</div><div class='del'>-	PERF_VPC_STALL_CYCLES_PC = 5,</div><div class='del'>-	PERF_VPC_STALL_CYCLES_SP_LM = 6,</div><div class='del'>-	PERF_VPC_POS_EXPORT_STALL_CYCLES = 7,</div><div class='del'>-	PERF_VPC_STARVE_CYCLES_SP = 8,</div><div class='del'>-	PERF_VPC_STARVE_CYCLES_LRZ = 9,</div><div class='del'>-	PERF_VPC_PC_PRIMITIVES = 10,</div><div class='del'>-	PERF_VPC_SP_COMPONENTS = 11,</div><div class='del'>-	PERF_VPC_SP_LM_PRIMITIVES = 12,</div><div class='del'>-	PERF_VPC_SP_LM_COMPONENTS = 13,</div><div class='del'>-	PERF_VPC_SP_LM_DWORDS = 14,</div><div class='del'>-	PERF_VPC_STREAMOUT_COMPONENTS = 15,</div><div class='del'>-	PERF_VPC_GRANT_PHASES = 16,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tse_perfcounter_select {</div><div class='del'>-	PERF_TSE_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_TSE_CLIPPING_CYCLES = 1,</div><div class='del'>-	PERF_TSE_STALL_CYCLES_RAS = 2,</div><div class='del'>-	PERF_TSE_STALL_CYCLES_LRZ_BARYPLANE = 3,</div><div class='del'>-	PERF_TSE_STALL_CYCLES_LRZ_ZPLANE = 4,</div><div class='del'>-	PERF_TSE_STARVE_CYCLES_PC = 5,</div><div class='del'>-	PERF_TSE_INPUT_PRIM = 6,</div><div class='del'>-	PERF_TSE_INPUT_NULL_PRIM = 7,</div><div class='del'>-	PERF_TSE_TRIVAL_REJ_PRIM = 8,</div><div class='del'>-	PERF_TSE_CLIPPED_PRIM = 9,</div><div class='del'>-	PERF_TSE_ZERO_AREA_PRIM = 10,</div><div class='del'>-	PERF_TSE_FACENESS_CULLED_PRIM = 11,</div><div class='del'>-	PERF_TSE_ZERO_PIXEL_PRIM = 12,</div><div class='del'>-	PERF_TSE_OUTPUT_NULL_PRIM = 13,</div><div class='del'>-	PERF_TSE_OUTPUT_VISIBLE_PRIM = 14,</div><div class='del'>-	PERF_TSE_CINVOCATION = 15,</div><div class='del'>-	PERF_TSE_CPRIMITIVES = 16,</div><div class='del'>-	PERF_TSE_2D_INPUT_PRIM = 17,</div><div class='del'>-	PERF_TSE_2D_ALIVE_CLCLES = 18,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_ras_perfcounter_select {</div><div class='del'>-	PERF_RAS_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_RAS_SUPERTILE_ACTIVE_CYCLES = 1,</div><div class='del'>-	PERF_RAS_STALL_CYCLES_LRZ = 2,</div><div class='del'>-	PERF_RAS_STARVE_CYCLES_TSE = 3,</div><div class='del'>-	PERF_RAS_SUPER_TILES = 4,</div><div class='del'>-	PERF_RAS_8X4_TILES = 5,</div><div class='del'>-	PERF_RAS_MASKGEN_ACTIVE = 6,</div><div class='del'>-	PERF_RAS_FULLY_COVERED_SUPER_TILES = 7,</div><div class='del'>-	PERF_RAS_FULLY_COVERED_8X4_TILES = 8,</div><div class='del'>-	PERF_RAS_PRIM_KILLED_INVISILBE = 9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_lrz_perfcounter_select {</div><div class='del'>-	PERF_LRZ_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_LRZ_STARVE_CYCLES_RAS = 1,</div><div class='del'>-	PERF_LRZ_STALL_CYCLES_RB = 2,</div><div class='del'>-	PERF_LRZ_STALL_CYCLES_VSC = 3,</div><div class='del'>-	PERF_LRZ_STALL_CYCLES_VPC = 4,</div><div class='del'>-	PERF_LRZ_STALL_CYCLES_FLAG_PREFETCH = 5,</div><div class='del'>-	PERF_LRZ_STALL_CYCLES_UCHE = 6,</div><div class='del'>-	PERF_LRZ_LRZ_READ = 7,</div><div class='del'>-	PERF_LRZ_LRZ_WRITE = 8,</div><div class='del'>-	PERF_LRZ_READ_LATENCY = 9,</div><div class='del'>-	PERF_LRZ_MERGE_CACHE_UPDATING = 10,</div><div class='del'>-	PERF_LRZ_PRIM_KILLED_BY_MASKGEN = 11,</div><div class='del'>-	PERF_LRZ_PRIM_KILLED_BY_LRZ = 12,</div><div class='del'>-	PERF_LRZ_VISIBLE_PRIM_AFTER_LRZ = 13,</div><div class='del'>-	PERF_LRZ_FULL_8X8_TILES = 14,</div><div class='del'>-	PERF_LRZ_PARTIAL_8X8_TILES = 15,</div><div class='del'>-	PERF_LRZ_TILE_KILLED = 16,</div><div class='del'>-	PERF_LRZ_TOTAL_PIXEL = 17,</div><div class='del'>-	PERF_LRZ_VISIBLE_PIXEL_AFTER_LRZ = 18,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_uche_perfcounter_select {</div><div class='del'>-	PERF_UCHE_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_UCHE_STALL_CYCLES_VBIF = 1,</div><div class='del'>-	PERF_UCHE_VBIF_LATENCY_CYCLES = 2,</div><div class='del'>-	PERF_UCHE_VBIF_LATENCY_SAMPLES = 3,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_TP = 4,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_VFD = 5,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_HLSQ = 6,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_LRZ = 7,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_SP = 8,</div><div class='del'>-	PERF_UCHE_READ_REQUESTS_TP = 9,</div><div class='del'>-	PERF_UCHE_READ_REQUESTS_VFD = 10,</div><div class='del'>-	PERF_UCHE_READ_REQUESTS_HLSQ = 11,</div><div class='del'>-	PERF_UCHE_READ_REQUESTS_LRZ = 12,</div><div class='del'>-	PERF_UCHE_READ_REQUESTS_SP = 13,</div><div class='del'>-	PERF_UCHE_WRITE_REQUESTS_LRZ = 14,</div><div class='del'>-	PERF_UCHE_WRITE_REQUESTS_SP = 15,</div><div class='del'>-	PERF_UCHE_WRITE_REQUESTS_VPC = 16,</div><div class='del'>-	PERF_UCHE_WRITE_REQUESTS_VSC = 17,</div><div class='del'>-	PERF_UCHE_EVICTS = 18,</div><div class='del'>-	PERF_UCHE_BANK_REQ0 = 19,</div><div class='del'>-	PERF_UCHE_BANK_REQ1 = 20,</div><div class='del'>-	PERF_UCHE_BANK_REQ2 = 21,</div><div class='del'>-	PERF_UCHE_BANK_REQ3 = 22,</div><div class='del'>-	PERF_UCHE_BANK_REQ4 = 23,</div><div class='del'>-	PERF_UCHE_BANK_REQ5 = 24,</div><div class='del'>-	PERF_UCHE_BANK_REQ6 = 25,</div><div class='del'>-	PERF_UCHE_BANK_REQ7 = 26,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_CH0 = 27,</div><div class='del'>-	PERF_UCHE_VBIF_READ_BEATS_CH1 = 28,</div><div class='del'>-	PERF_UCHE_GMEM_READ_BEATS = 29,</div><div class='del'>-	PERF_UCHE_FLAG_COUNT = 30,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tp_perfcounter_select {</div><div class='del'>-	PERF_TP_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_TP_STALL_CYCLES_UCHE = 1,</div><div class='del'>-	PERF_TP_LATENCY_CYCLES = 2,</div><div class='del'>-	PERF_TP_LATENCY_TRANS = 3,</div><div class='del'>-	PERF_TP_FLAG_CACHE_REQUEST_SAMPLES = 4,</div><div class='del'>-	PERF_TP_FLAG_CACHE_REQUEST_LATENCY = 5,</div><div class='del'>-	PERF_TP_L1_CACHELINE_REQUESTS = 6,</div><div class='del'>-	PERF_TP_L1_CACHELINE_MISSES = 7,</div><div class='del'>-	PERF_TP_SP_TP_TRANS = 8,</div><div class='del'>-	PERF_TP_TP_SP_TRANS = 9,</div><div class='del'>-	PERF_TP_OUTPUT_PIXELS = 10,</div><div class='del'>-	PERF_TP_FILTER_WORKLOAD_16BIT = 11,</div><div class='del'>-	PERF_TP_FILTER_WORKLOAD_32BIT = 12,</div><div class='del'>-	PERF_TP_QUADS_RECEIVED = 13,</div><div class='del'>-	PERF_TP_QUADS_OFFSET = 14,</div><div class='del'>-	PERF_TP_QUADS_SHADOW = 15,</div><div class='del'>-	PERF_TP_QUADS_ARRAY = 16,</div><div class='del'>-	PERF_TP_QUADS_GRADIENT = 17,</div><div class='del'>-	PERF_TP_QUADS_1D = 18,</div><div class='del'>-	PERF_TP_QUADS_2D = 19,</div><div class='del'>-	PERF_TP_QUADS_BUFFER = 20,</div><div class='del'>-	PERF_TP_QUADS_3D = 21,</div><div class='del'>-	PERF_TP_QUADS_CUBE = 22,</div><div class='del'>-	PERF_TP_STATE_CACHE_REQUESTS = 23,</div><div class='del'>-	PERF_TP_STATE_CACHE_MISSES = 24,</div><div class='del'>-	PERF_TP_DIVERGENT_QUADS_RECEIVED = 25,</div><div class='del'>-	PERF_TP_BINDLESS_STATE_CACHE_REQUESTS = 26,</div><div class='del'>-	PERF_TP_BINDLESS_STATE_CACHE_MISSES = 27,</div><div class='del'>-	PERF_TP_PRT_NON_RESIDENT_EVENTS = 28,</div><div class='del'>-	PERF_TP_OUTPUT_PIXELS_POINT = 29,</div><div class='del'>-	PERF_TP_OUTPUT_PIXELS_BILINEAR = 30,</div><div class='del'>-	PERF_TP_OUTPUT_PIXELS_MIP = 31,</div><div class='del'>-	PERF_TP_OUTPUT_PIXELS_ANISO = 32,</div><div class='del'>-	PERF_TP_OUTPUT_PIXELS_ZERO_LOD = 33,</div><div class='del'>-	PERF_TP_FLAG_CACHE_REQUESTS = 34,</div><div class='del'>-	PERF_TP_FLAG_CACHE_MISSES = 35,</div><div class='del'>-	PERF_TP_L1_5_L2_REQUESTS = 36,</div><div class='del'>-	PERF_TP_2D_OUTPUT_PIXELS = 37,</div><div class='del'>-	PERF_TP_2D_OUTPUT_PIXELS_POINT = 38,</div><div class='del'>-	PERF_TP_2D_OUTPUT_PIXELS_BILINEAR = 39,</div><div class='del'>-	PERF_TP_2D_FILTER_WORKLOAD_16BIT = 40,</div><div class='del'>-	PERF_TP_2D_FILTER_WORKLOAD_32BIT = 41,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_sp_perfcounter_select {</div><div class='del'>-	PERF_SP_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_SP_ALU_WORKING_CYCLES = 1,</div><div class='del'>-	PERF_SP_EFU_WORKING_CYCLES = 2,</div><div class='del'>-	PERF_SP_STALL_CYCLES_VPC = 3,</div><div class='del'>-	PERF_SP_STALL_CYCLES_TP = 4,</div><div class='del'>-	PERF_SP_STALL_CYCLES_UCHE = 5,</div><div class='del'>-	PERF_SP_STALL_CYCLES_RB = 6,</div><div class='del'>-	PERF_SP_SCHEDULER_NON_WORKING = 7,</div><div class='del'>-	PERF_SP_WAVE_CONTEXTS = 8,</div><div class='del'>-	PERF_SP_WAVE_CONTEXT_CYCLES = 9,</div><div class='del'>-	PERF_SP_FS_STAGE_WAVE_CYCLES = 10,</div><div class='del'>-	PERF_SP_FS_STAGE_WAVE_SAMPLES = 11,</div><div class='del'>-	PERF_SP_VS_STAGE_WAVE_CYCLES = 12,</div><div class='del'>-	PERF_SP_VS_STAGE_WAVE_SAMPLES = 13,</div><div class='del'>-	PERF_SP_FS_STAGE_DURATION_CYCLES = 14,</div><div class='del'>-	PERF_SP_VS_STAGE_DURATION_CYCLES = 15,</div><div class='del'>-	PERF_SP_WAVE_CTRL_CYCLES = 16,</div><div class='del'>-	PERF_SP_WAVE_LOAD_CYCLES = 17,</div><div class='del'>-	PERF_SP_WAVE_EMIT_CYCLES = 18,</div><div class='del'>-	PERF_SP_WAVE_NOP_CYCLES = 19,</div><div class='del'>-	PERF_SP_WAVE_WAIT_CYCLES = 20,</div><div class='del'>-	PERF_SP_WAVE_FETCH_CYCLES = 21,</div><div class='del'>-	PERF_SP_WAVE_IDLE_CYCLES = 22,</div><div class='del'>-	PERF_SP_WAVE_END_CYCLES = 23,</div><div class='del'>-	PERF_SP_WAVE_LONG_SYNC_CYCLES = 24,</div><div class='del'>-	PERF_SP_WAVE_SHORT_SYNC_CYCLES = 25,</div><div class='del'>-	PERF_SP_WAVE_JOIN_CYCLES = 26,</div><div class='del'>-	PERF_SP_LM_LOAD_INSTRUCTIONS = 27,</div><div class='del'>-	PERF_SP_LM_STORE_INSTRUCTIONS = 28,</div><div class='del'>-	PERF_SP_LM_ATOMICS = 29,</div><div class='del'>-	PERF_SP_GM_LOAD_INSTRUCTIONS = 30,</div><div class='del'>-	PERF_SP_GM_STORE_INSTRUCTIONS = 31,</div><div class='del'>-	PERF_SP_GM_ATOMICS = 32,</div><div class='del'>-	PERF_SP_VS_STAGE_TEX_INSTRUCTIONS = 33,</div><div class='del'>-	PERF_SP_VS_STAGE_CFLOW_INSTRUCTIONS = 34,</div><div class='del'>-	PERF_SP_VS_STAGE_EFU_INSTRUCTIONS = 35,</div><div class='del'>-	PERF_SP_VS_STAGE_FULL_ALU_INSTRUCTIONS = 36,</div><div class='del'>-	PERF_SP_VS_STAGE_HALF_ALU_INSTRUCTIONS = 37,</div><div class='del'>-	PERF_SP_FS_STAGE_TEX_INSTRUCTIONS = 38,</div><div class='del'>-	PERF_SP_FS_STAGE_CFLOW_INSTRUCTIONS = 39,</div><div class='del'>-	PERF_SP_FS_STAGE_EFU_INSTRUCTIONS = 40,</div><div class='del'>-	PERF_SP_FS_STAGE_FULL_ALU_INSTRUCTIONS = 41,</div><div class='del'>-	PERF_SP_FS_STAGE_HALF_ALU_INSTRUCTIONS = 42,</div><div class='del'>-	PERF_SP_FS_STAGE_BARY_INSTRUCTIONS = 43,</div><div class='del'>-	PERF_SP_VS_INSTRUCTIONS = 44,</div><div class='del'>-	PERF_SP_FS_INSTRUCTIONS = 45,</div><div class='del'>-	PERF_SP_ADDR_LOCK_COUNT = 46,</div><div class='del'>-	PERF_SP_UCHE_READ_TRANS = 47,</div><div class='del'>-	PERF_SP_UCHE_WRITE_TRANS = 48,</div><div class='del'>-	PERF_SP_EXPORT_VPC_TRANS = 49,</div><div class='del'>-	PERF_SP_EXPORT_RB_TRANS = 50,</div><div class='del'>-	PERF_SP_PIXELS_KILLED = 51,</div><div class='del'>-	PERF_SP_ICL1_REQUESTS = 52,</div><div class='del'>-	PERF_SP_ICL1_MISSES = 53,</div><div class='del'>-	PERF_SP_ICL0_REQUESTS = 54,</div><div class='del'>-	PERF_SP_ICL0_MISSES = 55,</div><div class='del'>-	PERF_SP_HS_INSTRUCTIONS = 56,</div><div class='del'>-	PERF_SP_DS_INSTRUCTIONS = 57,</div><div class='del'>-	PERF_SP_GS_INSTRUCTIONS = 58,</div><div class='del'>-	PERF_SP_CS_INSTRUCTIONS = 59,</div><div class='del'>-	PERF_SP_GPR_READ = 60,</div><div class='del'>-	PERF_SP_GPR_WRITE = 61,</div><div class='del'>-	PERF_SP_LM_CH0_REQUESTS = 62,</div><div class='del'>-	PERF_SP_LM_CH1_REQUESTS = 63,</div><div class='del'>-	PERF_SP_LM_BANK_CONFLICTS = 64,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_rb_perfcounter_select {</div><div class='del'>-	PERF_RB_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_RB_STALL_CYCLES_CCU = 1,</div><div class='del'>-	PERF_RB_STALL_CYCLES_HLSQ = 2,</div><div class='del'>-	PERF_RB_STALL_CYCLES_FIFO0_FULL = 3,</div><div class='del'>-	PERF_RB_STALL_CYCLES_FIFO1_FULL = 4,</div><div class='del'>-	PERF_RB_STALL_CYCLES_FIFO2_FULL = 5,</div><div class='del'>-	PERF_RB_STARVE_CYCLES_SP = 6,</div><div class='del'>-	PERF_RB_STARVE_CYCLES_LRZ_TILE = 7,</div><div class='del'>-	PERF_RB_STARVE_CYCLES_CCU = 8,</div><div class='del'>-	PERF_RB_STARVE_CYCLES_Z_PLANE = 9,</div><div class='del'>-	PERF_RB_STARVE_CYCLES_BARY_PLANE = 10,</div><div class='del'>-	PERF_RB_Z_WORKLOAD = 11,</div><div class='del'>-	PERF_RB_HLSQ_ACTIVE = 12,</div><div class='del'>-	PERF_RB_Z_READ = 13,</div><div class='del'>-	PERF_RB_Z_WRITE = 14,</div><div class='del'>-	PERF_RB_C_READ = 15,</div><div class='del'>-	PERF_RB_C_WRITE = 16,</div><div class='del'>-	PERF_RB_TOTAL_PASS = 17,</div><div class='del'>-	PERF_RB_Z_PASS = 18,</div><div class='del'>-	PERF_RB_Z_FAIL = 19,</div><div class='del'>-	PERF_RB_S_FAIL = 20,</div><div class='del'>-	PERF_RB_BLENDED_FXP_COMPONENTS = 21,</div><div class='del'>-	PERF_RB_BLENDED_FP16_COMPONENTS = 22,</div><div class='del'>-	RB_RESERVED = 23,</div><div class='del'>-	PERF_RB_2D_ALIVE_CYCLES = 24,</div><div class='del'>-	PERF_RB_2D_STALL_CYCLES_A2D = 25,</div><div class='del'>-	PERF_RB_2D_STARVE_CYCLES_SRC = 26,</div><div class='del'>-	PERF_RB_2D_STARVE_CYCLES_SP = 27,</div><div class='del'>-	PERF_RB_2D_STARVE_CYCLES_DST = 28,</div><div class='del'>-	PERF_RB_2D_VALID_PIXELS = 29,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_rb_samples_perfcounter_select {</div><div class='del'>-	TOTAL_SAMPLES = 0,</div><div class='del'>-	ZPASS_SAMPLES = 1,</div><div class='del'>-	ZFAIL_SAMPLES = 2,</div><div class='del'>-	SFAIL_SAMPLES = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_vsc_perfcounter_select {</div><div class='del'>-	PERF_VSC_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_VSC_WORKING_CYCLES = 1,</div><div class='del'>-	PERF_VSC_STALL_CYCLES_UCHE = 2,</div><div class='del'>-	PERF_VSC_EOT_NUM = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_ccu_perfcounter_select {</div><div class='del'>-	PERF_CCU_BUSY_CYCLES = 0,</div><div class='del'>-	PERF_CCU_STALL_CYCLES_RB_DEPTH_RETURN = 1,</div><div class='del'>-	PERF_CCU_STALL_CYCLES_RB_COLOR_RETURN = 2,</div><div class='del'>-	PERF_CCU_STARVE_CYCLES_FLAG_RETURN = 3,</div><div class='del'>-	PERF_CCU_DEPTH_BLOCKS = 4,</div><div class='del'>-	PERF_CCU_COLOR_BLOCKS = 5,</div><div class='del'>-	PERF_CCU_DEPTH_BLOCK_HIT = 6,</div><div class='del'>-	PERF_CCU_COLOR_BLOCK_HIT = 7,</div><div class='del'>-	PERF_CCU_PARTIAL_BLOCK_READ = 8,</div><div class='del'>-	PERF_CCU_GMEM_READ = 9,</div><div class='del'>-	PERF_CCU_GMEM_WRITE = 10,</div><div class='del'>-	PERF_CCU_DEPTH_READ_FLAG0_COUNT = 11,</div><div class='del'>-	PERF_CCU_DEPTH_READ_FLAG1_COUNT = 12,</div><div class='del'>-	PERF_CCU_DEPTH_READ_FLAG2_COUNT = 13,</div><div class='del'>-	PERF_CCU_DEPTH_READ_FLAG3_COUNT = 14,</div><div class='del'>-	PERF_CCU_DEPTH_READ_FLAG4_COUNT = 15,</div><div class='del'>-	PERF_CCU_COLOR_READ_FLAG0_COUNT = 16,</div><div class='del'>-	PERF_CCU_COLOR_READ_FLAG1_COUNT = 17,</div><div class='del'>-	PERF_CCU_COLOR_READ_FLAG2_COUNT = 18,</div><div class='del'>-	PERF_CCU_COLOR_READ_FLAG3_COUNT = 19,</div><div class='del'>-	PERF_CCU_COLOR_READ_FLAG4_COUNT = 20,</div><div class='del'>-	PERF_CCU_2D_BUSY_CYCLES = 21,</div><div class='del'>-	PERF_CCU_2D_RD_REQ = 22,</div><div class='del'>-	PERF_CCU_2D_WR_REQ = 23,</div><div class='del'>-	PERF_CCU_2D_REORDER_STARVE_CYCLES = 24,</div><div class='del'>-	PERF_CCU_2D_PIXELS = 25,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_cmp_perfcounter_select {</div><div class='del'>-	PERF_CMPDECMP_STALL_CYCLES_VBIF = 0,</div><div class='del'>-	PERF_CMPDECMP_VBIF_LATENCY_CYCLES = 1,</div><div class='del'>-	PERF_CMPDECMP_VBIF_LATENCY_SAMPLES = 2,</div><div class='del'>-	PERF_CMPDECMP_VBIF_READ_DATA_CCU = 3,</div><div class='del'>-	PERF_CMPDECMP_VBIF_WRITE_DATA_CCU = 4,</div><div class='del'>-	PERF_CMPDECMP_VBIF_READ_REQUEST = 5,</div><div class='del'>-	PERF_CMPDECMP_VBIF_WRITE_REQUEST = 6,</div><div class='del'>-	PERF_CMPDECMP_VBIF_READ_DATA = 7,</div><div class='del'>-	PERF_CMPDECMP_VBIF_WRITE_DATA = 8,</div><div class='del'>-	PERF_CMPDECMP_FLAG_FETCH_CYCLES = 9,</div><div class='del'>-	PERF_CMPDECMP_FLAG_FETCH_SAMPLES = 10,</div><div class='del'>-	PERF_CMPDECMP_DEPTH_WRITE_FLAG1_COUNT = 11,</div><div class='del'>-	PERF_CMPDECMP_DEPTH_WRITE_FLAG2_COUNT = 12,</div><div class='del'>-	PERF_CMPDECMP_DEPTH_WRITE_FLAG3_COUNT = 13,</div><div class='del'>-	PERF_CMPDECMP_DEPTH_WRITE_FLAG4_COUNT = 14,</div><div class='del'>-	PERF_CMPDECMP_COLOR_WRITE_FLAG1_COUNT = 15,</div><div class='del'>-	PERF_CMPDECMP_COLOR_WRITE_FLAG2_COUNT = 16,</div><div class='del'>-	PERF_CMPDECMP_COLOR_WRITE_FLAG3_COUNT = 17,</div><div class='del'>-	PERF_CMPDECMP_COLOR_WRITE_FLAG4_COUNT = 18,</div><div class='del'>-	PERF_CMPDECMP_2D_STALL_CYCLES_VBIF_REQ = 19,</div><div class='del'>-	PERF_CMPDECMP_2D_STALL_CYCLES_VBIF_WR = 20,</div><div class='del'>-	PERF_CMPDECMP_2D_STALL_CYCLES_VBIF_RETURN = 21,</div><div class='del'>-	PERF_CMPDECMP_2D_RD_DATA = 22,</div><div class='del'>-	PERF_CMPDECMP_2D_WR_DATA = 23,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_vbif_perfcounter_select {</div><div class='del'>-	AXI_READ_REQUESTS_ID_0 = 0,</div><div class='del'>-	AXI_READ_REQUESTS_ID_1 = 1,</div><div class='del'>-	AXI_READ_REQUESTS_ID_2 = 2,</div><div class='del'>-	AXI_READ_REQUESTS_ID_3 = 3,</div><div class='del'>-	AXI_READ_REQUESTS_ID_4 = 4,</div><div class='del'>-	AXI_READ_REQUESTS_ID_5 = 5,</div><div class='del'>-	AXI_READ_REQUESTS_ID_6 = 6,</div><div class='del'>-	AXI_READ_REQUESTS_ID_7 = 7,</div><div class='del'>-	AXI_READ_REQUESTS_ID_8 = 8,</div><div class='del'>-	AXI_READ_REQUESTS_ID_9 = 9,</div><div class='del'>-	AXI_READ_REQUESTS_ID_10 = 10,</div><div class='del'>-	AXI_READ_REQUESTS_ID_11 = 11,</div><div class='del'>-	AXI_READ_REQUESTS_ID_12 = 12,</div><div class='del'>-	AXI_READ_REQUESTS_ID_13 = 13,</div><div class='del'>-	AXI_READ_REQUESTS_ID_14 = 14,</div><div class='del'>-	AXI_READ_REQUESTS_ID_15 = 15,</div><div class='del'>-	AXI0_READ_REQUESTS_TOTAL = 16,</div><div class='del'>-	AXI1_READ_REQUESTS_TOTAL = 17,</div><div class='del'>-	AXI2_READ_REQUESTS_TOTAL = 18,</div><div class='del'>-	AXI3_READ_REQUESTS_TOTAL = 19,</div><div class='del'>-	AXI_READ_REQUESTS_TOTAL = 20,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_0 = 21,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_1 = 22,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_2 = 23,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_3 = 24,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_4 = 25,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_5 = 26,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_6 = 27,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_7 = 28,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_8 = 29,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_9 = 30,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_10 = 31,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_11 = 32,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_12 = 33,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_13 = 34,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_14 = 35,</div><div class='del'>-	AXI_WRITE_REQUESTS_ID_15 = 36,</div><div class='del'>-	AXI0_WRITE_REQUESTS_TOTAL = 37,</div><div class='del'>-	AXI1_WRITE_REQUESTS_TOTAL = 38,</div><div class='del'>-	AXI2_WRITE_REQUESTS_TOTAL = 39,</div><div class='del'>-	AXI3_WRITE_REQUESTS_TOTAL = 40,</div><div class='del'>-	AXI_WRITE_REQUESTS_TOTAL = 41,</div><div class='del'>-	AXI_TOTAL_REQUESTS = 42,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_0 = 43,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_1 = 44,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_2 = 45,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_3 = 46,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_4 = 47,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_5 = 48,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_6 = 49,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_7 = 50,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_8 = 51,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_9 = 52,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_10 = 53,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_11 = 54,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_12 = 55,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_13 = 56,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_14 = 57,</div><div class='del'>-	AXI_READ_DATA_BEATS_ID_15 = 58,</div><div class='del'>-	AXI0_READ_DATA_BEATS_TOTAL = 59,</div><div class='del'>-	AXI1_READ_DATA_BEATS_TOTAL = 60,</div><div class='del'>-	AXI2_READ_DATA_BEATS_TOTAL = 61,</div><div class='del'>-	AXI3_READ_DATA_BEATS_TOTAL = 62,</div><div class='del'>-	AXI_READ_DATA_BEATS_TOTAL = 63,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_0 = 64,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_1 = 65,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_2 = 66,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_3 = 67,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_4 = 68,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_5 = 69,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_6 = 70,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_7 = 71,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_8 = 72,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_9 = 73,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_10 = 74,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_11 = 75,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_12 = 76,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_13 = 77,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_14 = 78,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_ID_15 = 79,</div><div class='del'>-	AXI0_WRITE_DATA_BEATS_TOTAL = 80,</div><div class='del'>-	AXI1_WRITE_DATA_BEATS_TOTAL = 81,</div><div class='del'>-	AXI2_WRITE_DATA_BEATS_TOTAL = 82,</div><div class='del'>-	AXI3_WRITE_DATA_BEATS_TOTAL = 83,</div><div class='del'>-	AXI_WRITE_DATA_BEATS_TOTAL = 84,</div><div class='del'>-	AXI_DATA_BEATS_TOTAL = 85,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tex_filter {</div><div class='del'>-	A5XX_TEX_NEAREST = 0,</div><div class='del'>-	A5XX_TEX_LINEAR = 1,</div><div class='del'>-	A5XX_TEX_ANISO = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tex_clamp {</div><div class='del'>-	A5XX_TEX_REPEAT = 0,</div><div class='del'>-	A5XX_TEX_CLAMP_TO_EDGE = 1,</div><div class='del'>-	A5XX_TEX_MIRROR_REPEAT = 2,</div><div class='del'>-	A5XX_TEX_CLAMP_TO_BORDER = 3,</div><div class='del'>-	A5XX_TEX_MIRROR_CLAMP = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tex_aniso {</div><div class='del'>-	A5XX_TEX_ANISO_1 = 0,</div><div class='del'>-	A5XX_TEX_ANISO_2 = 1,</div><div class='del'>-	A5XX_TEX_ANISO_4 = 2,</div><div class='del'>-	A5XX_TEX_ANISO_8 = 3,</div><div class='del'>-	A5XX_TEX_ANISO_16 = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tex_swiz {</div><div class='del'>-	A5XX_TEX_X = 0,</div><div class='del'>-	A5XX_TEX_Y = 1,</div><div class='del'>-	A5XX_TEX_Z = 2,</div><div class='del'>-	A5XX_TEX_W = 3,</div><div class='del'>-	A5XX_TEX_ZERO = 4,</div><div class='del'>-	A5XX_TEX_ONE = 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum a5xx_tex_type {</div><div class='del'>-	A5XX_TEX_1D = 0,</div><div class='del'>-	A5XX_TEX_2D = 1,</div><div class='del'>-	A5XX_TEX_CUBE = 2,</div><div class='del'>-	A5XX_TEX_3D = 3,</div><div class='del'>-	A5XX_TEX_BUFFER = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define A5XX_INT0_RBBM_GPU_IDLE					0x00000001</div><div class='del'>-#define A5XX_INT0_RBBM_AHB_ERROR				0x00000002</div><div class='del'>-#define A5XX_INT0_RBBM_TRANSFER_TIMEOUT				0x00000004</div><div class='del'>-#define A5XX_INT0_RBBM_ME_MS_TIMEOUT				0x00000008</div><div class='del'>-#define A5XX_INT0_RBBM_PFP_MS_TIMEOUT				0x00000010</div><div class='del'>-#define A5XX_INT0_RBBM_ETS_MS_TIMEOUT				0x00000020</div><div class='del'>-#define A5XX_INT0_RBBM_ATB_ASYNC_OVERFLOW			0x00000040</div><div class='del'>-#define A5XX_INT0_RBBM_GPC_ERROR				0x00000080</div><div class='del'>-#define A5XX_INT0_CP_SW						0x00000100</div><div class='del'>-#define A5XX_INT0_CP_HW_ERROR					0x00000200</div><div class='del'>-#define A5XX_INT0_CP_CCU_FLUSH_DEPTH_TS				0x00000400</div><div class='del'>-#define A5XX_INT0_CP_CCU_FLUSH_COLOR_TS				0x00000800</div><div class='del'>-#define A5XX_INT0_CP_CCU_RESOLVE_TS				0x00001000</div><div class='del'>-#define A5XX_INT0_CP_IB2					0x00002000</div><div class='del'>-#define A5XX_INT0_CP_IB1					0x00004000</div><div class='del'>-#define A5XX_INT0_CP_RB						0x00008000</div><div class='del'>-#define A5XX_INT0_CP_UNUSED_1					0x00010000</div><div class='del'>-#define A5XX_INT0_CP_RB_DONE_TS					0x00020000</div><div class='del'>-#define A5XX_INT0_CP_WT_DONE_TS					0x00040000</div><div class='del'>-#define A5XX_INT0_UNKNOWN_1					0x00080000</div><div class='del'>-#define A5XX_INT0_CP_CACHE_FLUSH_TS				0x00100000</div><div class='del'>-#define A5XX_INT0_UNUSED_2					0x00200000</div><div class='del'>-#define A5XX_INT0_RBBM_ATB_BUS_OVERFLOW				0x00400000</div><div class='del'>-#define A5XX_INT0_MISC_HANG_DETECT				0x00800000</div><div class='del'>-#define A5XX_INT0_UCHE_OOB_ACCESS				0x01000000</div><div class='del'>-#define A5XX_INT0_UCHE_TRAP_INTR				0x02000000</div><div class='del'>-#define A5XX_INT0_DEBBUS_INTR_0					0x04000000</div><div class='del'>-#define A5XX_INT0_DEBBUS_INTR_1					0x08000000</div><div class='del'>-#define A5XX_INT0_GPMU_VOLTAGE_DROOP				0x10000000</div><div class='del'>-#define A5XX_INT0_GPMU_FIRMWARE					0x20000000</div><div class='del'>-#define A5XX_INT0_ISDB_CPU_IRQ					0x40000000</div><div class='del'>-#define A5XX_INT0_ISDB_UNDER_DEBUG				0x80000000</div><div class='del'>-</div><div class='del'>-#define A5XX_CP_INT_CP_OPCODE_ERROR				0x00000001</div><div class='del'>-#define A5XX_CP_INT_CP_RESERVED_BIT_ERROR			0x00000002</div><div class='del'>-#define A5XX_CP_INT_CP_HW_FAULT_ERROR				0x00000004</div><div class='del'>-#define A5XX_CP_INT_CP_DMA_ERROR				0x00000008</div><div class='del'>-#define A5XX_CP_INT_CP_REGISTER_PROTECTION_ERROR		0x00000010</div><div class='del'>-#define A5XX_CP_INT_CP_AHB_ERROR				0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_BASE					0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_BASE_HI					0x00000801</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_CNTL					0x00000802</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_RPTR_ADDR				0x00000804</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_RPTR_ADDR_HI				0x00000805</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_RPTR					0x00000806</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_RB_WPTR					0x00000807</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_STAT_ADDR				0x00000808</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_STAT_DATA				0x00000809</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_DRAW_STATE_ADDR				0x0000080b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_DRAW_STATE_DATA				0x0000080c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_NRT_ADDR_LO				0x0000080d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_NRT_ADDR_HI				0x0000080e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_NRT_DATA					0x00000810</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CRASH_SCRIPT_BASE_LO			0x00000817</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CRASH_SCRIPT_BASE_HI			0x00000818</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CRASH_DUMP_CNTL				0x00000819</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_STAT_ADDR				0x0000081a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ROQ_THRESHOLDS_1				0x0000081f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ROQ_THRESHOLDS_2				0x00000820</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ROQ_DBG_ADDR				0x00000821</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ROQ_DBG_DATA				0x00000822</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MEQ_DBG_ADDR				0x00000823</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MEQ_DBG_DATA				0x00000824</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MEQ_THRESHOLDS				0x00000825</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MERCIU_SIZE					0x00000826</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MERCIU_DBG_ADDR				0x00000827</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MERCIU_DBG_DATA_1				0x00000828</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_MERCIU_DBG_DATA_2				0x00000829</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_UCODE_DBG_ADDR				0x0000082a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_UCODE_DBG_DATA				0x0000082b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_UCODE_DBG_ADDR				0x0000082f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_UCODE_DBG_DATA				0x00000830</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CNTL					0x00000831</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_ME_CNTL					0x00000832</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CHICKEN_DBG					0x00000833</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_INSTR_BASE_LO				0x00000835</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PFP_INSTR_BASE_HI				0x00000836</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_INSTR_BASE_LO				0x00000838</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_INSTR_BASE_HI				0x00000839</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_CNTL				0x0000083b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO		0x0000083c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_HI		0x0000083d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_SAVE_ADDR_LO			0x0000083e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_SAVE_ADDR_HI			0x0000083f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_SMMU_INFO_LO			0x00000840</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_CONTEXT_SWITCH_SMMU_INFO_HI			0x00000841</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ADDR_MODE_CNTL				0x00000860</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_ME_STAT_DATA				0x00000b14</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_WFI_PEND_CTR				0x00000b15</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_INTERRUPT_STATUS				0x00000b18</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_HW_FAULT					0x00000b1a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PROTECT_STATUS				0x00000b1c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_IB1_BASE					0x00000b1f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_IB1_BASE_HI					0x00000b20</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_IB1_BUFSZ					0x00000b21</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_IB2_BASE					0x00000b22</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_IB2_BASE_HI					0x00000b23</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_IB2_BUFSZ					0x00000b24</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_SCRATCH(i0) (0x00000b78 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000b78 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PROTECT(i0) (0x00000880 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000880 + 0x1*i0; }</div><div class='del'>-#define A5XX_CP_PROTECT_REG_BASE_ADDR__MASK			0x0001ffff</div><div class='del'>-#define A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) &amp; A5XX_CP_PROTECT_REG_BASE_ADDR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_CP_PROTECT_REG_MASK_LEN__MASK			0x1f000000</div><div class='del'>-#define A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT			24</div><div class='del'>-static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) &amp; A5XX_CP_PROTECT_REG_MASK_LEN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_CP_PROTECT_REG_TRAP_WRITE				0x20000000</div><div class='del'>-#define A5XX_CP_PROTECT_REG_TRAP_READ				0x40000000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PROTECT_CNTL				0x000008a0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_AHB_FAULT					0x00000b1b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_0				0x00000bb0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_1				0x00000bb1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_2				0x00000bb2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_3				0x00000bb3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_4				0x00000bb4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_5				0x00000bb5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_6				0x00000bb6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_PERFCTR_CP_SEL_7				0x00000bb7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_ADDR_MODE_CNTL				0x00000bc1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWERCTR_CP_SEL_0				0x00000bba</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWERCTR_CP_SEL_1				0x00000bbb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWERCTR_CP_SEL_2				0x00000bbc</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWERCTR_CP_SEL_3				0x00000bbd</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_A				0x00000004</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_B				0x00000005</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_C				0x00000006</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_D				0x00000007</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_CNTLT				0x00000008</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_CNTLM				0x00000009</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DEBBUS_CTLTM_ENABLE_SHIFT		0x00000018</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_OPL				0x0000000a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_OPE				0x0000000b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_0				0x0000000c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_1				0x0000000d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_2				0x0000000e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_3				0x0000000f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_0			0x00000010</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_1			0x00000011</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_2			0x00000012</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_3			0x00000013</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_BYTEL_0			0x00000014</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_BYTEL_1			0x00000015</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_0				0x00000016</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_1				0x00000017</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_2				0x00000018</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_3				0x00000019</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_0			0x0000001a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_1			0x0000001b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_2			0x0000001c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_3			0x0000001d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_NIBBLEE			0x0000001e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_PTRC0				0x0000001f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_PTRC1				0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_LOADREG			0x00000021</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_IDX				0x00000022</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_CLRC				0x00000023</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_LOADIVT			0x00000024</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_INT_CNTL			0x0000002f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INT_CLEAR_CMD				0x00000037</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INT_0_MASK				0x00000038</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_GPU_IDLE			0x00000001</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR			0x00000002</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_TRANSFER_TIMEOUT		0x00000004</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_ME_MS_TIMEOUT			0x00000008</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_PFP_MS_TIMEOUT		0x00000010</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_ETS_MS_TIMEOUT		0x00000020</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_ATB_ASYNC_OVERFLOW		0x00000040</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_GPC_ERROR			0x00000080</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_SW				0x00000100</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_HW_ERROR			0x00000200</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_CCU_FLUSH_DEPTH_TS		0x00000400</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_CCU_FLUSH_COLOR_TS		0x00000800</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_CCU_RESOLVE_TS			0x00001000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_IB2				0x00002000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_IB1				0x00004000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_RB				0x00008000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_RB_DONE_TS			0x00020000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_WT_DONE_TS			0x00040000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS			0x00100000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_RBBM_ATB_BUS_OVERFLOW		0x00400000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT			0x00800000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS			0x01000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_UCHE_TRAP_INTR			0x02000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_DEBBUS_INTR_0			0x04000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_DEBBUS_INTR_1			0x08000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP			0x10000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_GPMU_FIRMWARE			0x20000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_ISDB_CPU_IRQ			0x40000000</div><div class='del'>-#define A5XX_RBBM_INT_0_MASK_ISDB_UNDER_DEBUG			0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_DBG_CNTL				0x0000003f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_EXT_VBIF_DBG_CNTL				0x00000041</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SW_RESET_CMD				0x00000043</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_BLOCK_SW_RESET_CMD			0x00000045</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_BLOCK_SW_RESET_CMD2			0x00000046</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_DBG_LO_HI_GPIO				0x00000048</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_EXT_TRACE_BUS_CNTL			0x00000049</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_TP0				0x0000004a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_TP1				0x0000004b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_TP2				0x0000004c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_TP3				0x0000004d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_TP0				0x0000004e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_TP1				0x0000004f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_TP2				0x00000050</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_TP3				0x00000051</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL3_TP0				0x00000052</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL3_TP1				0x00000053</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL3_TP2				0x00000054</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL3_TP3				0x00000055</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_READ_AHB_THROUGH_DBG			0x00000059</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_UCHE				0x0000005a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_UCHE				0x0000005b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL3_UCHE				0x0000005c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL4_UCHE				0x0000005d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_UCHE				0x0000005e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_UCHE				0x0000005f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_MODE_GPC				0x00000060</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_GPC				0x00000061</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_GPC				0x00000062</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_TSE_RAS_RBBM			0x00000063</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_TSE_RAS_RBBM			0x00000064</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_TSE_RAS_RBBM			0x00000065</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_HLSQ				0x00000066</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL				0x00000067</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_SP0				0x00000068</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_SP1				0x00000069</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_SP2				0x0000006a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_SP3				0x0000006b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_SP0				0x0000006c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_SP1				0x0000006d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_SP2				0x0000006e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_SP3				0x0000006f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_SP0				0x00000070</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_SP1				0x00000071</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_SP2				0x00000072</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_SP3				0x00000073</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_SP0				0x00000074</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_SP1				0x00000075</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_SP2				0x00000076</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_SP3				0x00000077</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_RB0				0x00000078</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_RB1				0x00000079</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_RB2				0x0000007a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_RB3				0x0000007b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_RB0				0x0000007c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_RB1				0x0000007d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_RB2				0x0000007e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_RB3				0x0000007f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_RAC				0x00000080</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_RAC				0x00000081</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_CCU0				0x00000082</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_CCU1				0x00000083</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_CCU2				0x00000084</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_CCU3				0x00000085</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU0			0x00000086</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU1			0x00000087</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU2			0x00000088</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU3			0x00000089</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_RAC				0x0000008a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL2_RAC				0x0000008b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_0			0x0000008c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_1			0x0000008d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_2			0x0000008e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_3			0x0000008f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_VFD				0x00000090</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_MODE_VFD				0x00000091</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_VFD				0x00000092</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_CNTL0					0x00000093</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_CNTL1					0x00000094</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_CNTL2					0x00000095</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_CMD					0x00000096</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL11		0x0000009c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL12		0x0000009d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL13		0x0000009e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL14		0x0000009f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL15		0x000000a0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL16		0x000000a1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL17		0x000000a2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL18		0x000000a3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_TP0				0x000000a4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_TP1				0x000000a5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_TP2				0x000000a6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_TP3				0x000000a7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY2_TP0				0x000000a8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY2_TP1				0x000000a9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY2_TP2				0x000000aa</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY2_TP3				0x000000ab</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY3_TP0				0x000000ac</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY3_TP1				0x000000ad</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY3_TP2				0x000000ae</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY3_TP3				0x000000af</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_TP0				0x000000b0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_TP1				0x000000b1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_TP2				0x000000b2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_TP3				0x000000b3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST2_TP0				0x000000b4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST2_TP1				0x000000b5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST2_TP2				0x000000b6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST2_TP3				0x000000b7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST3_TP0				0x000000b8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST3_TP1				0x000000b9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST3_TP2				0x000000ba</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST3_TP3				0x000000bb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_CNTL_GPMU				0x000000c8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_DELAY_GPMU				0x000000c9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CLOCK_HYST_GPMU				0x000000ca</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_0_LO				0x000003a0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_0_HI				0x000003a1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_1_LO				0x000003a2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_1_HI				0x000003a3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_2_LO				0x000003a4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_2_HI				0x000003a5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_3_LO				0x000003a6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_3_HI				0x000003a7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_4_LO				0x000003a8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_4_HI				0x000003a9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_5_LO				0x000003aa</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_5_HI				0x000003ab</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_6_LO				0x000003ac</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_6_HI				0x000003ad</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_7_LO				0x000003ae</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CP_7_HI				0x000003af</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_0_LO				0x000003b0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_0_HI				0x000003b1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_1_LO				0x000003b2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_1_HI				0x000003b3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_2_LO				0x000003b4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_2_HI				0x000003b5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_3_LO				0x000003b6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_3_HI				0x000003b7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_0_LO				0x000003b8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_0_HI				0x000003b9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_1_LO				0x000003ba</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_1_HI				0x000003bb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_2_LO				0x000003bc</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_2_HI				0x000003bd</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_3_LO				0x000003be</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_3_HI				0x000003bf</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_4_LO				0x000003c0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_4_HI				0x000003c1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_5_LO				0x000003c2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_5_HI				0x000003c3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_6_LO				0x000003c4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_6_HI				0x000003c5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_7_LO				0x000003c6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_PC_7_HI				0x000003c7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_0_LO				0x000003c8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_0_HI				0x000003c9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_1_LO				0x000003ca</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_1_HI				0x000003cb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_2_LO				0x000003cc</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_2_HI				0x000003cd</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_3_LO				0x000003ce</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_3_HI				0x000003cf</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_4_LO				0x000003d0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_4_HI				0x000003d1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_5_LO				0x000003d2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_5_HI				0x000003d3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_6_LO				0x000003d4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_6_HI				0x000003d5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_7_LO				0x000003d6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VFD_7_HI				0x000003d7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_0_LO				0x000003d8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_0_HI				0x000003d9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_1_LO				0x000003da</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_1_HI				0x000003db</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_2_LO				0x000003dc</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_2_HI				0x000003dd</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_3_LO				0x000003de</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_3_HI				0x000003df</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_4_LO				0x000003e0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_4_HI				0x000003e1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_5_LO				0x000003e2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_5_HI				0x000003e3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_6_LO				0x000003e4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_6_HI				0x000003e5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_7_LO				0x000003e6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_HLSQ_7_HI				0x000003e7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_0_LO				0x000003e8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_0_HI				0x000003e9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_1_LO				0x000003ea</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_1_HI				0x000003eb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_2_LO				0x000003ec</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_2_HI				0x000003ed</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_3_LO				0x000003ee</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VPC_3_HI				0x000003ef</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_0_LO				0x000003f0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_0_HI				0x000003f1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_1_LO				0x000003f2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_1_HI				0x000003f3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_2_LO				0x000003f4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_2_HI				0x000003f5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_3_LO				0x000003f6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CCU_3_HI				0x000003f7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_0_LO				0x000003f8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_0_HI				0x000003f9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_1_LO				0x000003fa</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_1_HI				0x000003fb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_2_LO				0x000003fc</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_2_HI				0x000003fd</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_3_LO				0x000003fe</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TSE_3_HI				0x000003ff</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_0_LO				0x00000400</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_0_HI				0x00000401</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_1_LO				0x00000402</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_1_HI				0x00000403</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_2_LO				0x00000404</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_2_HI				0x00000405</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_3_LO				0x00000406</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RAS_3_HI				0x00000407</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_0_LO				0x00000408</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_0_HI				0x00000409</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_1_LO				0x0000040a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_1_HI				0x0000040b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_2_LO				0x0000040c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_2_HI				0x0000040d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_3_LO				0x0000040e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_3_HI				0x0000040f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_4_LO				0x00000410</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_4_HI				0x00000411</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_5_LO				0x00000412</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_5_HI				0x00000413</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_6_LO				0x00000414</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_6_HI				0x00000415</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_7_LO				0x00000416</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_UCHE_7_HI				0x00000417</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_0_LO				0x00000418</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_0_HI				0x00000419</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_1_LO				0x0000041a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_1_HI				0x0000041b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_2_LO				0x0000041c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_2_HI				0x0000041d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_3_LO				0x0000041e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_3_HI				0x0000041f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_4_LO				0x00000420</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_4_HI				0x00000421</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_5_LO				0x00000422</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_5_HI				0x00000423</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_6_LO				0x00000424</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_6_HI				0x00000425</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_7_LO				0x00000426</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_TP_7_HI				0x00000427</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_0_LO				0x00000428</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_0_HI				0x00000429</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_1_LO				0x0000042a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_1_HI				0x0000042b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_2_LO				0x0000042c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_2_HI				0x0000042d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_3_LO				0x0000042e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_3_HI				0x0000042f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_4_LO				0x00000430</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_4_HI				0x00000431</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_5_LO				0x00000432</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_5_HI				0x00000433</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_6_LO				0x00000434</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_6_HI				0x00000435</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_7_LO				0x00000436</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_7_HI				0x00000437</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_8_LO				0x00000438</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_8_HI				0x00000439</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_9_LO				0x0000043a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_9_HI				0x0000043b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_10_LO				0x0000043c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_10_HI				0x0000043d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_11_LO				0x0000043e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_SP_11_HI				0x0000043f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_0_LO				0x00000440</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_0_HI				0x00000441</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_1_LO				0x00000442</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_1_HI				0x00000443</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_2_LO				0x00000444</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_2_HI				0x00000445</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_3_LO				0x00000446</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_3_HI				0x00000447</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_4_LO				0x00000448</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_4_HI				0x00000449</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_5_LO				0x0000044a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_5_HI				0x0000044b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_6_LO				0x0000044c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_6_HI				0x0000044d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_7_LO				0x0000044e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RB_7_HI				0x0000044f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VSC_0_LO				0x00000450</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VSC_0_HI				0x00000451</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VSC_1_LO				0x00000452</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_VSC_1_HI				0x00000453</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_0_LO				0x00000454</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_0_HI				0x00000455</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_1_LO				0x00000456</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_1_HI				0x00000457</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_2_LO				0x00000458</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_2_HI				0x00000459</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_3_LO				0x0000045a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LRZ_3_HI				0x0000045b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_0_LO				0x0000045c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_0_HI				0x0000045d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_1_LO				0x0000045e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_1_HI				0x0000045f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_2_LO				0x00000460</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_2_HI				0x00000461</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_3_LO				0x00000462</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CMP_3_HI				0x00000463</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_0			0x0000046b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_1			0x0000046c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_2			0x0000046d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_3			0x0000046e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_ALWAYSON_COUNTER_LO			0x000004d2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_ALWAYSON_COUNTER_HI			0x000004d3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_STATUS					0x000004f5</div><div class='del'>-#define A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB			0x80000000</div><div class='del'>-#define A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP			0x40000000</div><div class='del'>-#define A5XX_RBBM_STATUS_HLSQ_BUSY				0x20000000</div><div class='del'>-#define A5XX_RBBM_STATUS_VSC_BUSY				0x10000000</div><div class='del'>-#define A5XX_RBBM_STATUS_TPL1_BUSY				0x08000000</div><div class='del'>-#define A5XX_RBBM_STATUS_SP_BUSY				0x04000000</div><div class='del'>-#define A5XX_RBBM_STATUS_UCHE_BUSY				0x02000000</div><div class='del'>-#define A5XX_RBBM_STATUS_VPC_BUSY				0x01000000</div><div class='del'>-#define A5XX_RBBM_STATUS_VFDP_BUSY				0x00800000</div><div class='del'>-#define A5XX_RBBM_STATUS_VFD_BUSY				0x00400000</div><div class='del'>-#define A5XX_RBBM_STATUS_TESS_BUSY				0x00200000</div><div class='del'>-#define A5XX_RBBM_STATUS_PC_VSD_BUSY				0x00100000</div><div class='del'>-#define A5XX_RBBM_STATUS_PC_DCALL_BUSY				0x00080000</div><div class='del'>-#define A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY			0x00040000</div><div class='del'>-#define A5XX_RBBM_STATUS_DCOM_BUSY				0x00020000</div><div class='del'>-#define A5XX_RBBM_STATUS_COM_BUSY				0x00010000</div><div class='del'>-#define A5XX_RBBM_STATUS_LRZ_BUZY				0x00008000</div><div class='del'>-#define A5XX_RBBM_STATUS_A2D_DSP_BUSY				0x00004000</div><div class='del'>-#define A5XX_RBBM_STATUS_CCUFCHE_BUSY				0x00002000</div><div class='del'>-#define A5XX_RBBM_STATUS_RB_BUSY				0x00001000</div><div class='del'>-#define A5XX_RBBM_STATUS_RAS_BUSY				0x00000800</div><div class='del'>-#define A5XX_RBBM_STATUS_TSE_BUSY				0x00000400</div><div class='del'>-#define A5XX_RBBM_STATUS_VBIF_BUSY				0x00000200</div><div class='del'>-#define A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST			0x00000100</div><div class='del'>-#define A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST			0x00000080</div><div class='del'>-#define A5XX_RBBM_STATUS_CP_BUSY				0x00000040</div><div class='del'>-#define A5XX_RBBM_STATUS_GPMU_MASTER_BUSY			0x00000020</div><div class='del'>-#define A5XX_RBBM_STATUS_CP_CRASH_BUSY				0x00000010</div><div class='del'>-#define A5XX_RBBM_STATUS_CP_ETS_BUSY				0x00000008</div><div class='del'>-#define A5XX_RBBM_STATUS_CP_PFP_BUSY				0x00000004</div><div class='del'>-#define A5XX_RBBM_STATUS_CP_ME_BUSY				0x00000002</div><div class='del'>-#define A5XX_RBBM_STATUS_HI_BUSY				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_STATUS3					0x00000530</div><div class='del'>-#define A5XX_RBBM_STATUS3_SMMU_STALLED_ON_FAULT			0x01000000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_INT_0_STATUS				0x000004e1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_ME_SPLIT_STATUS			0x000004f0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_PFP_SPLIT_STATUS			0x000004f1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_ETS_SPLIT_STATUS			0x000004f3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_ERROR_STATUS				0x000004f4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_CNTL				0x00000464</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD0				0x00000465</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD1				0x00000466</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD2				0x00000467</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD3				0x00000468</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LOAD_VALUE_LO			0x00000469</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_LOAD_VALUE_HI			0x0000046a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_PERFCTR_GPU_BUSY_MASKED			0x0000046f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_AHB_ERROR					0x000004ed</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_EVENT_LOGIC			0x00000504</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_OVER				0x00000505</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT0				0x00000506</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT1				0x00000507</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT2				0x00000508</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT3				0x00000509</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT4				0x0000050a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT5				0x0000050b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_ADDR			0x0000050c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF0			0x0000050d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF1			0x0000050e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF2			0x0000050f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF3			0x00000510</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF4			0x00000511</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MISR0				0x00000512</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_CFG_DBGBUS_MISR1				0x00000513</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_ISDB_CNT					0x00000533</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TRUST_CONFIG			0x0000f000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TRUST_CNTL				0x0000f400</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_TRUSTED_BASE_LO		0x0000f800</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_TRUSTED_BASE_HI		0x0000f801</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_TRUSTED_SIZE			0x0000f802</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_CNTL				0x0000f803</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_COMP_STATUS_LO			0x0000f804</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_COMP_STATUS_HI			0x0000f805</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_UCHE_STATUS_LO			0x0000f806</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_UCHE_STATUS_HI			0x0000f807</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL			0x0000f810</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_BIN_SIZE					0x00000bc2</div><div class='del'>-#define A5XX_VSC_BIN_SIZE_WIDTH__MASK				0x000000ff</div><div class='del'>-#define A5XX_VSC_BIN_SIZE_WIDTH__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_VSC_BIN_SIZE_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A5XX_VSC_BIN_SIZE_WIDTH__SHIFT) &amp; A5XX_VSC_BIN_SIZE_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VSC_BIN_SIZE_HEIGHT__MASK				0x0001fe00</div><div class='del'>-#define A5XX_VSC_BIN_SIZE_HEIGHT__SHIFT				9</div><div class='del'>-static inline uint32_t A5XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A5XX_VSC_BIN_SIZE_HEIGHT__SHIFT) &amp; A5XX_VSC_BIN_SIZE_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_SIZE_ADDRESS_LO				0x00000bc3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_SIZE_ADDRESS_HI				0x00000bc4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UNKNOWN_0BC5					0x00000bc5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UNKNOWN_0BC6					0x00000bc6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_PIPE_CONFIG(i0) (0x00000bd0 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000bd0 + 0x1*i0; }</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_X__MASK			0x000003ff</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_X__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VSC_PIPE_CONFIG_REG_X__SHIFT) &amp; A5XX_VSC_PIPE_CONFIG_REG_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_Y__MASK			0x000ffc00</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_Y__SHIFT			10</div><div class='del'>-static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) &amp; A5XX_VSC_PIPE_CONFIG_REG_Y__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_W__MASK			0x00f00000</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_W__SHIFT			20</div><div class='del'>-static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VSC_PIPE_CONFIG_REG_W__SHIFT) &amp; A5XX_VSC_PIPE_CONFIG_REG_W__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_H__MASK			0x0f000000</div><div class='del'>-#define A5XX_VSC_PIPE_CONFIG_REG_H__SHIFT			24</div><div class='del'>-static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VSC_PIPE_CONFIG_REG_H__SHIFT) &amp; A5XX_VSC_PIPE_CONFIG_REG_H__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_PIPE_DATA_ADDRESS(i0) (0x00000be0 + 0x2*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VSC_PIPE_DATA_ADDRESS_LO(uint32_t i0) { return 0x00000be0 + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VSC_PIPE_DATA_ADDRESS_HI(uint32_t i0) { return 0x00000be1 + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_PIPE_DATA_LENGTH(i0) (0x00000c00 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0x00000c00 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_PERFCTR_VSC_SEL_0				0x00000c60</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_PERFCTR_VSC_SEL_1				0x00000c61</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VSC_RESOLVE_CNTL				0x00000cdd</div><div class='del'>-#define A5XX_VSC_RESOLVE_CNTL_WINDOW_OFFSET_DISABLE		0x80000000</div><div class='del'>-#define A5XX_VSC_RESOLVE_CNTL_X__MASK				0x00007fff</div><div class='del'>-#define A5XX_VSC_RESOLVE_CNTL_X__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_VSC_RESOLVE_CNTL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VSC_RESOLVE_CNTL_X__SHIFT) &amp; A5XX_VSC_RESOLVE_CNTL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VSC_RESOLVE_CNTL_Y__MASK				0x7fff0000</div><div class='del'>-#define A5XX_VSC_RESOLVE_CNTL_Y__SHIFT				16</div><div class='del'>-static inline uint32_t A5XX_VSC_RESOLVE_CNTL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VSC_RESOLVE_CNTL_Y__SHIFT) &amp; A5XX_VSC_RESOLVE_CNTL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_ADDR_MODE_CNTL				0x00000c81</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_0				0x00000c90</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_1				0x00000c91</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_2				0x00000c92</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_3				0x00000c93</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_0				0x00000c94</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_1				0x00000c95</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_2				0x00000c96</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_3				0x00000c97</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_0				0x00000c98</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_1				0x00000c99</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_2				0x00000c9a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_3				0x00000c9b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DBG_ECO_CNTL				0x00000cc4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_ADDR_MODE_CNTL				0x00000cc5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_MODE_CNTL					0x00000cc6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CCU_CNTL					0x00000cc7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_0				0x00000cd0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_1				0x00000cd1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_2				0x00000cd2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_3				0x00000cd3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_4				0x00000cd4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_5				0x00000cd5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_6				0x00000cd6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_RB_SEL_7				0x00000cd7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CCU_SEL_0				0x00000cd8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CCU_SEL_1				0x00000cd9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CCU_SEL_2				0x00000cda</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CCU_SEL_3				0x00000cdb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWERCTR_RB_SEL_0				0x00000ce0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWERCTR_RB_SEL_1				0x00000ce1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWERCTR_RB_SEL_2				0x00000ce2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWERCTR_RB_SEL_3				0x00000ce3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWERCTR_CCU_SEL_0				0x00000ce4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWERCTR_CCU_SEL_1				0x00000ce5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CMP_SEL_0				0x00000cec</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CMP_SEL_1				0x00000ced</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CMP_SEL_2				0x00000cee</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_PERFCTR_CMP_SEL_3				0x00000cef</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_DBG_ECO_CNTL				0x00000d00</div><div class='del'>-#define A5XX_PC_DBG_ECO_CNTL_TWOPASSUSEWFI			0x00000100</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_ADDR_MODE_CNTL				0x00000d01</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_MODE_CNTL					0x00000d02</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_INDEX_BUF_LO				0x00000d04</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_INDEX_BUF_HI				0x00000d05</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_START_INDEX					0x00000d06</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_MAX_INDEX					0x00000d07</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_TESSFACTOR_ADDR_LO				0x00000d08</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_TESSFACTOR_ADDR_HI				0x00000d09</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_0				0x00000d10</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_1				0x00000d11</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_2				0x00000d12</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_3				0x00000d13</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_4				0x00000d14</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_5				0x00000d15</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_6				0x00000d16</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PERFCTR_PC_SEL_7				0x00000d17</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_TIMEOUT_THRESHOLD_0			0x00000e00</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_TIMEOUT_THRESHOLD_1			0x00000e01</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_DBG_ECO_CNTL				0x00000e04</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_ADDR_MODE_CNTL				0x00000e05</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_MODE_CNTL					0x00000e06</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_0			0x00000e10</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_1			0x00000e11</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_2			0x00000e12</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_3			0x00000e13</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_4			0x00000e14</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_5			0x00000e15</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_6			0x00000e16</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_7			0x00000e17</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_SPTP_RDSEL				0x00000f08</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_DBG_READ_SEL				0x0000bc00</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_HLSQ_DBG_AHB_READ_APERTURE			0x0000a000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_ADDR_MODE_CNTL				0x00000e41</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_MODE_CNTL					0x00000e42</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_0				0x00000e50</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_1				0x00000e51</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_2				0x00000e52</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_3				0x00000e53</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_4				0x00000e54</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_5				0x00000e55</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_6				0x00000e56</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_PERFCTR_VFD_SEL_7				0x00000e57</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_DBG_ECO_CNTL				0x00000e60</div><div class='del'>-#define A5XX_VPC_DBG_ECO_CNTL_ALLFLATOPTDIS			0x00000400</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_ADDR_MODE_CNTL				0x00000e61</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_MODE_CNTL					0x00000e62</div><div class='del'>-#define A5XX_VPC_MODE_CNTL_BINNING_PASS				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_PERFCTR_VPC_SEL_0				0x00000e64</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_PERFCTR_VPC_SEL_1				0x00000e65</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_PERFCTR_VPC_SEL_2				0x00000e66</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_PERFCTR_VPC_SEL_3				0x00000e67</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_ADDR_MODE_CNTL				0x00000e80</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_MODE_CNTL					0x00000e81</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_SVM_CNTL					0x00000e82</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_WRITE_THRU_BASE_LO			0x00000e87</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_WRITE_THRU_BASE_HI			0x00000e88</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_TRAP_BASE_LO				0x00000e89</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_TRAP_BASE_HI				0x00000e8a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_GMEM_RANGE_MIN_LO				0x00000e8b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_GMEM_RANGE_MIN_HI				0x00000e8c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_GMEM_RANGE_MAX_LO				0x00000e8d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_GMEM_RANGE_MAX_HI				0x00000e8e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_DBG_ECO_CNTL_2				0x00000e8f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_DBG_ECO_CNTL				0x00000e90</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO			0x00000e91</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_HI			0x00000e92</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_CACHE_INVALIDATE_MAX_LO			0x00000e93</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_CACHE_INVALIDATE_MAX_HI			0x00000e94</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_CACHE_INVALIDATE				0x00000e95</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_CACHE_WAYS				0x00000e96</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_0			0x00000ea0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_1			0x00000ea1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_2			0x00000ea2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_3			0x00000ea3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_4			0x00000ea4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_5			0x00000ea5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_6			0x00000ea6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_7			0x00000ea7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_0			0x00000ea8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_1			0x00000ea9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_2			0x00000eaa</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_3			0x00000eab</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_TRAP_LOG_LO				0x00000eb1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_TRAP_LOG_HI				0x00000eb2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_DBG_ECO_CNTL				0x00000ec0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_ADDR_MODE_CNTL				0x00000ec1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_MODE_CNTL					0x00000ec2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_0				0x00000ed0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_1				0x00000ed1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_2				0x00000ed2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_3				0x00000ed3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_4				0x00000ed4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_5				0x00000ed5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_6				0x00000ed6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_7				0x00000ed7</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_8				0x00000ed8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_9				0x00000ed9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_10				0x00000eda</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_PERFCTR_SP_SEL_11				0x00000edb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWERCTR_SP_SEL_0				0x00000edc</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWERCTR_SP_SEL_1				0x00000edd</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWERCTR_SP_SEL_2				0x00000ede</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWERCTR_SP_SEL_3				0x00000edf</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_ADDR_MODE_CNTL				0x00000f01</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_MODE_CNTL					0x00000f02</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_0				0x00000f10</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_1				0x00000f11</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_2				0x00000f12</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_3				0x00000f13</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_4				0x00000f14</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_5				0x00000f15</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_6				0x00000f16</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_PERFCTR_TP_SEL_7				0x00000f17</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_POWERCTR_TP_SEL_0				0x00000f18</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_POWERCTR_TP_SEL_1				0x00000f19</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_POWERCTR_TP_SEL_2				0x00000f1a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TPL1_POWERCTR_TP_SEL_3				0x00000f1b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_VERSION					0x00003000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_CLKON					0x00003001</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_ABIT_SORT					0x00003028</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_ABIT_SORT_CONF				0x00003029</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_ROUND_ROBIN_QOS_ARB			0x00003049</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_GATE_OFF_WRREQ_EN				0x0000302a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_IN_RD_LIM_CONF0				0x0000302c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_IN_RD_LIM_CONF1				0x0000302d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_XIN_HALT_CTRL0				0x00003080</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_XIN_HALT_CTRL1				0x00003081</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_TEST_BUS_OUT_CTRL				0x00003084</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_TEST_BUS1_CTRL0				0x00003085</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_TEST_BUS1_CTRL1				0x00003086</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_TEST_BUS2_CTRL0				0x00003087</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_TEST_BUS2_CTRL1				0x00003088</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_TEST_BUS_OUT				0x0000308c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_EN0				0x000030c0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_EN1				0x000030c1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_EN2				0x000030c2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_EN3				0x000030c3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_CLR0				0x000030c8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_CLR1				0x000030c9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_CLR2				0x000030ca</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_CLR3				0x000030cb</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_SEL0				0x000030d0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_SEL1				0x000030d1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_SEL2				0x000030d2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_SEL3				0x000030d3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_LOW0				0x000030d8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_LOW1				0x000030d9</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_LOW2				0x000030da</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_LOW3				0x000030db</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_HIGH0				0x000030e0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_HIGH1				0x000030e1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_HIGH2				0x000030e2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_CNT_HIGH3				0x000030e3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_EN0				0x00003100</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_EN1				0x00003101</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_EN2				0x00003102</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_LOW0				0x00003110</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_LOW1				0x00003111</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_LOW2				0x00003112</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_HIGH0			0x00003118</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_HIGH1			0x00003119</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VBIF_PERF_PWR_CNT_HIGH2			0x0000311a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_INST_RAM_BASE				0x00008800</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_DATA_RAM_BASE				0x00009800</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_0_LO				0x0000a840</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_0_HI				0x0000a841</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_1_LO				0x0000a842</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_1_HI				0x0000a843</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_2_LO				0x0000a844</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_2_HI				0x0000a845</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_3_LO				0x0000a846</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_POWER_COUNTER_3_HI				0x0000a847</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_0_LO				0x0000a848</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_0_HI				0x0000a849</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_1_LO				0x0000a84a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_1_HI				0x0000a84b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_2_LO				0x0000a84c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_2_HI				0x0000a84d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_3_LO				0x0000a84e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_TP_POWER_COUNTER_3_HI				0x0000a84f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_0_LO				0x0000a850</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_0_HI				0x0000a851</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_1_LO				0x0000a852</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_1_HI				0x0000a853</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_2_LO				0x0000a854</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_2_HI				0x0000a855</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_3_LO				0x0000a856</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_POWER_COUNTER_3_HI				0x0000a857</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CCU_POWER_COUNTER_0_LO				0x0000a858</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CCU_POWER_COUNTER_0_HI				0x0000a859</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CCU_POWER_COUNTER_1_LO				0x0000a85a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CCU_POWER_COUNTER_1_HI				0x0000a85b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_0_LO			0x0000a85c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_0_HI			0x0000a85d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_1_LO			0x0000a85e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_1_HI			0x0000a85f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_2_LO			0x0000a860</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_2_HI			0x0000a861</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_3_LO			0x0000a862</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UCHE_POWER_COUNTER_3_HI			0x0000a863</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_0_LO				0x0000a864</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_0_HI				0x0000a865</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_1_LO				0x0000a866</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_1_HI				0x0000a867</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_2_LO				0x0000a868</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_2_HI				0x0000a869</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_3_LO				0x0000a86a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_CP_POWER_COUNTER_3_HI				0x0000a86b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_0_LO			0x0000a86c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_0_HI			0x0000a86d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_1_LO			0x0000a86e</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_1_HI			0x0000a86f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_2_LO			0x0000a870</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_2_HI			0x0000a871</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_3_LO			0x0000a872</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_3_HI			0x0000a873</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_4_LO			0x0000a874</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_4_HI			0x0000a875</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_5_LO			0x0000a876</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_5_HI			0x0000a877</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_ENABLE			0x0000a878</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_ALWAYS_ON_COUNTER_LO			0x0000a879</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_ALWAYS_ON_COUNTER_HI			0x0000a87a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_ALWAYS_ON_COUNTER_RESET			0x0000a87b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_SELECT_0			0x0000a87c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_POWER_COUNTER_SELECT_1			0x0000a87d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_SP_CLOCK_CONTROL			0x0000a880</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_SP_POWER_CNTL				0x0000a881</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_RBCCU_CLOCK_CNTL				0x0000a886</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_RBCCU_POWER_CNTL				0x0000a887</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_SP_PWR_CLK_STATUS				0x0000a88b</div><div class='del'>-#define A5XX_GPMU_SP_PWR_CLK_STATUS_PWR_ON			0x00100000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_RBCCU_PWR_CLK_STATUS			0x0000a88d</div><div class='del'>-#define A5XX_GPMU_RBCCU_PWR_CLK_STATUS_PWR_ON			0x00100000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_PWR_COL_STAGGER_DELAY			0x0000a891</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_PWR_COL_INTER_FRAME_CTRL			0x0000a892</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_PWR_COL_INTER_FRAME_HYST			0x0000a893</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_PWR_COL_BINNING_CTRL			0x0000a894</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_CLOCK_THROTTLE_CTRL			0x0000a8a3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_THROTTLE_UNMASK_FORCE_CTRL		0x0000a8a8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_WFI_CONFIG				0x0000a8c1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_RBBM_INTR_INFO				0x0000a8d6</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_CM3_SYSRESET				0x0000a8d8</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GENERAL_0					0x0000a8e0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GENERAL_1					0x0000a8e1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_TEMP_SENSOR_ID				0x0000ac00</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_TEMP_SENSOR_CONFIG			0x0000ac01</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_TEMP_VAL					0x0000ac02</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_DELTA_TEMP_THRESHOLD			0x0000ac03</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_TEMP_THRESHOLD_INTR_STATUS		0x0000ac05</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_TEMP_THRESHOLD_INTR_EN_MASK		0x0000ac06</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_LEAKAGE_TEMP_COEFF_0_1			0x0000ac40</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_LEAKAGE_TEMP_COEFF_2_3			0x0000ac41</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_LEAKAGE_VTG_COEFF_0_1			0x0000ac42</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_LEAKAGE_VTG_COEFF_2_3			0x0000ac43</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_BASE_LEAKAGE				0x0000ac46</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_VOLTAGE				0x0000ac60</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_VOLTAGE_INTR_STATUS			0x0000ac61</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_VOLTAGE_INTR_EN_MASK			0x0000ac62</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_PWR_THRESHOLD			0x0000ac80</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_LLM_GLM_SLEEP_CTRL			0x0000acc4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_GPMU_LLM_GLM_SLEEP_STATUS			0x0000acc5</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GDPM_CONFIG1					0x0000b80c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GDPM_CONFIG2					0x0000b80d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GDPM_INT_EN					0x0000b80f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GDPM_INT_MASK					0x0000b811</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPMU_BEC_ENABLE				0x0000b9a0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPU_CS_SENSOR_GENERAL_STATUS			0x0000c41a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPU_CS_AMP_CALIBRATION_STATUS1_0		0x0000c41d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPU_CS_AMP_CALIBRATION_STATUS1_2		0x0000c41f</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPU_CS_AMP_CALIBRATION_STATUS1_4		0x0000c421</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPU_CS_ENABLE_REG				0x0000c520</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GPU_CS_AMP_CALIBRATION_CONTROL1		0x0000c557</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_CNTL					0x0000e000</div><div class='del'>-#define A5XX_GRAS_CL_CNTL_ZERO_GB_SCALE_Z			0x00000040</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_VS_CL_CNTL				0x0000e001</div><div class='del'>-#define A5XX_GRAS_VS_CL_CNTL_CLIP_MASK__MASK			0x000000ff</div><div class='del'>-#define A5XX_GRAS_VS_CL_CNTL_CLIP_MASK__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_VS_CL_CNTL_CLIP_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_VS_CL_CNTL_CLIP_MASK__SHIFT) &amp; A5XX_GRAS_VS_CL_CNTL_CLIP_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_VS_CL_CNTL_CULL_MASK__MASK			0x0000ff00</div><div class='del'>-#define A5XX_GRAS_VS_CL_CNTL_CULL_MASK__SHIFT			8</div><div class='del'>-static inline uint32_t A5XX_GRAS_VS_CL_CNTL_CULL_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_VS_CL_CNTL_CULL_MASK__SHIFT) &amp; A5XX_GRAS_VS_CL_CNTL_CULL_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UNKNOWN_E004					0x0000e004</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CNTL					0x0000e005</div><div class='del'>-#define A5XX_GRAS_CNTL_IJ_PERSP_PIXEL				0x00000001</div><div class='del'>-#define A5XX_GRAS_CNTL_IJ_PERSP_CENTROID			0x00000002</div><div class='del'>-#define A5XX_GRAS_CNTL_IJ_PERSP_SAMPLE				0x00000004</div><div class='del'>-#define A5XX_GRAS_CNTL_IJ_LINEAR_PIXEL				0x00000008</div><div class='del'>-#define A5XX_GRAS_CNTL_IJ_LINEAR_CENTROID			0x00000010</div><div class='del'>-#define A5XX_GRAS_CNTL_IJ_LINEAR_SAMPLE				0x00000020</div><div class='del'>-#define A5XX_GRAS_CNTL_COORD_MASK__MASK				0x000003c0</div><div class='del'>-#define A5XX_GRAS_CNTL_COORD_MASK__SHIFT			6</div><div class='del'>-static inline uint32_t A5XX_GRAS_CNTL_COORD_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_CNTL_COORD_MASK__SHIFT) &amp; A5XX_GRAS_CNTL_COORD_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ			0x0000e006</div><div class='del'>-#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__MASK		0x000003ff</div><div class='del'>-#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT) &amp; A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__MASK		0x000ffc00</div><div class='del'>-#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT		10</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT) &amp; A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_VPORT_XOFFSET_0			0x0000e010</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_VPORT_XOFFSET_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) &amp; A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_VPORT_XSCALE_0				0x0000e011</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_XSCALE_0__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_VPORT_XSCALE_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) &amp; A5XX_GRAS_CL_VPORT_XSCALE_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_VPORT_YOFFSET_0			0x0000e012</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_VPORT_YOFFSET_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) &amp; A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_VPORT_YSCALE_0				0x0000e013</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_YSCALE_0__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_VPORT_YSCALE_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) &amp; A5XX_GRAS_CL_VPORT_YSCALE_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_VPORT_ZOFFSET_0			0x0000e014</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) &amp; A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_CL_VPORT_ZSCALE_0				0x0000e015</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_CL_VPORT_ZSCALE_0(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) &amp; A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_CNTL					0x0000e090</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_CULL_FRONT				0x00000001</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_CULL_BACK				0x00000002</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_FRONT_CW				0x00000004</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__MASK			0x000007f8</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT			3</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 4.0))) &lt;&lt; A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT) &amp; A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_POLY_OFFSET				0x00000800</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_LINE_MODE__MASK			0x00002000</div><div class='del'>-#define A5XX_GRAS_SU_CNTL_LINE_MODE__SHIFT			13</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_CNTL_LINE_MODE(enum a5xx_line_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SU_CNTL_LINE_MODE__SHIFT) &amp; A5XX_GRAS_SU_CNTL_LINE_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_POINT_MINMAX				0x0000e091</div><div class='del'>-#define A5XX_GRAS_SU_POINT_MINMAX_MIN__MASK			0x0000ffff</div><div class='del'>-#define A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MIN(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) &amp; A5XX_GRAS_SU_POINT_MINMAX_MIN__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SU_POINT_MINMAX_MAX__MASK			0xffff0000</div><div class='del'>-#define A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MAX(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((uint32_t)(val * 16.0))) &lt;&lt; A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) &amp; A5XX_GRAS_SU_POINT_MINMAX_MAX__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_POINT_SIZE				0x0000e092</div><div class='del'>-#define A5XX_GRAS_SU_POINT_SIZE__MASK				0xffffffff</div><div class='del'>-#define A5XX_GRAS_SU_POINT_SIZE__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_POINT_SIZE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((((int32_t)(val * 16.0))) &lt;&lt; A5XX_GRAS_SU_POINT_SIZE__SHIFT) &amp; A5XX_GRAS_SU_POINT_SIZE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_LAYERED				0x0000e093</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL			0x0000e094</div><div class='del'>-#define A5XX_GRAS_SU_DEPTH_PLANE_CNTL_FRAG_WRITES_Z		0x00000001</div><div class='del'>-#define A5XX_GRAS_SU_DEPTH_PLANE_CNTL_UNK1			0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_POLY_OFFSET_SCALE			0x0000e095</div><div class='del'>-#define A5XX_GRAS_SU_POLY_OFFSET_SCALE__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) &amp; A5XX_GRAS_SU_POLY_OFFSET_SCALE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_POLY_OFFSET_OFFSET			0x0000e096</div><div class='del'>-#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) &amp; A5XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP		0x0000e097</div><div class='del'>-#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__MASK		0xffffffff</div><div class='del'>-#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) &amp; A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO			0x0000e098</div><div class='del'>-#define A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK	0x00000007</div><div class='del'>-#define A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT	0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) &amp; A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SU_CONSERVATIVE_RAS_CNTL			0x0000e099</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_CNTL					0x0000e0a0</div><div class='del'>-#define A5XX_GRAS_SC_CNTL_BINNING_PASS				0x00000001</div><div class='del'>-#define A5XX_GRAS_SC_CNTL_SAMPLES_PASSED			0x00008000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_BIN_CNTL				0x0000e0a1</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_RAS_MSAA_CNTL				0x0000e0a2</div><div class='del'>-#define A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__MASK		0x00000003</div><div class='del'>-#define A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT) &amp; A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_DEST_MSAA_CNTL				0x0000e0a3</div><div class='del'>-#define A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__MASK		0x00000003</div><div class='del'>-#define A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT) &amp; A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_DEST_MSAA_CNTL_MSAA_DISABLE		0x00000004</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_SCREEN_SCISSOR_CNTL			0x0000e0a4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0			0x0000e0aa</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__MASK		0x00007fff</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT) &amp; A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__MASK		0x7fff0000</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT		16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT) &amp; A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0			0x0000e0ab</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__MASK		0x00007fff</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT) &amp; A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__MASK		0x7fff0000</div><div class='del'>-#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT		16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT) &amp; A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0			0x0000e0ca</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__MASK		0x00007fff</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT) &amp; A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__MASK		0x7fff0000</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT		16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT) &amp; A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0			0x0000e0cb</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__MASK		0x00007fff</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT) &amp; A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__MASK		0x7fff0000</div><div class='del'>-#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT		16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT) &amp; A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL			0x0000e0ea</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK			0x00007fff</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) &amp; A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK			0x7fff0000</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) &amp; A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_SC_WINDOW_SCISSOR_BR			0x0000e0eb</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_WINDOW_OFFSET_DISABLE	0x80000000</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK			0x00007fff</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) &amp; A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK			0x7fff0000</div><div class='del'>-#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) &amp; A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_LRZ_CNTL					0x0000e100</div><div class='del'>-#define A5XX_GRAS_LRZ_CNTL_ENABLE				0x00000001</div><div class='del'>-#define A5XX_GRAS_LRZ_CNTL_LRZ_WRITE				0x00000002</div><div class='del'>-#define A5XX_GRAS_LRZ_CNTL_GREATER				0x00000004</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_LRZ_BUFFER_BASE_LO			0x0000e101</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_LRZ_BUFFER_BASE_HI			0x0000e102</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_LRZ_BUFFER_PITCH				0x0000e103</div><div class='del'>-#define A5XX_GRAS_LRZ_BUFFER_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_GRAS_LRZ_BUFFER_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_GRAS_LRZ_BUFFER_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A5XX_GRAS_LRZ_BUFFER_PITCH__SHIFT) &amp; A5XX_GRAS_LRZ_BUFFER_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO		0x0000e104</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_HI		0x0000e105</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CNTL					0x0000e140</div><div class='del'>-#define A5XX_RB_CNTL_WIDTH__MASK				0x000000ff</div><div class='del'>-#define A5XX_RB_CNTL_WIDTH__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_CNTL_WIDTH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A5XX_RB_CNTL_WIDTH__SHIFT) &amp; A5XX_RB_CNTL_WIDTH__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_CNTL_HEIGHT__MASK				0x0001fe00</div><div class='del'>-#define A5XX_RB_CNTL_HEIGHT__SHIFT				9</div><div class='del'>-static inline uint32_t A5XX_RB_CNTL_HEIGHT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x1f));</div><div class='del'>-	return (((val &gt;&gt; 5)) &lt;&lt; A5XX_RB_CNTL_HEIGHT__SHIFT) &amp; A5XX_RB_CNTL_HEIGHT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_CNTL_BYPASS					0x00020000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RENDER_CNTL					0x0000e141</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_BINNING_PASS			0x00000001</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_SAMPLES_PASSED			0x00000040</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_DISABLE_COLOR_PIPE			0x00000080</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_FLAG_DEPTH				0x00004000</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_FLAG_DEPTH2				0x00008000</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK			0x00ff0000</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT) &amp; A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK			0xff000000</div><div class='del'>-#define A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT			24</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT) &amp; A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RAS_MSAA_CNTL				0x0000e142</div><div class='del'>-#define A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK			0x00000003</div><div class='del'>-#define A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT) &amp; A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEST_MSAA_CNTL				0x0000e143</div><div class='del'>-#define A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK			0x00000003</div><div class='del'>-#define A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT) &amp; A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_DEST_MSAA_CNTL_MSAA_DISABLE			0x00000004</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RENDER_CONTROL0				0x0000e144</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_IJ_PERSP_PIXEL			0x00000001</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_IJ_PERSP_CENTROID		0x00000002</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_IJ_PERSP_SAMPLE			0x00000004</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_IJ_LINEAR_PIXEL			0x00000008</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_IJ_LINEAR_CENTROID		0x00000010</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_IJ_LINEAR_SAMPLE		0x00000020</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_COORD_MASK__MASK		0x000003c0</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL0_COORD_MASK__SHIFT		6</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_CONTROL0_COORD_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_CONTROL0_COORD_MASK__SHIFT) &amp; A5XX_RB_RENDER_CONTROL0_COORD_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RENDER_CONTROL1				0x0000e145</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL1_SAMPLEMASK			0x00000001</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL1_FACENESS			0x00000002</div><div class='del'>-#define A5XX_RB_RENDER_CONTROL1_SAMPLEID			0x00000004</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_FS_OUTPUT_CNTL				0x0000e146</div><div class='del'>-#define A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK			0x0000000f</div><div class='del'>-#define A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT) &amp; A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_FS_OUTPUT_CNTL_FRAG_WRITES_Z			0x00000020</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RENDER_COMPONENTS				0x0000e147</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT0__MASK			0x0000000f</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT0__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT1__MASK			0x000000f0</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT			4</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT1__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT2__MASK			0x00000f00</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT			8</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT2__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT3__MASK			0x0000f000</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT			12</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT3__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT4__MASK			0x000f0000</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT4__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT5__MASK			0x00f00000</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT			20</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT5__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT6__MASK			0x0f000000</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT			24</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT6__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT7__MASK			0xf0000000</div><div class='del'>-#define A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT			28</div><div class='del'>-static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT) &amp; A5XX_RB_RENDER_COMPONENTS_RT7__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_MRT(i0) (0x0000e150 + 0x7*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_CONTROL(uint32_t i0) { return 0x0000e150 + 0x7*i0; }</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_BLEND				0x00000001</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_BLEND2				0x00000002</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_ROP_ENABLE				0x00000004</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_ROP_CODE__MASK			0x00000078</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT			3</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) &amp; A5XX_RB_MRT_CONTROL_ROP_CODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK		0x00000780</div><div class='del'>-#define A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT		7</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) &amp; A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x0000e151 + 0x7*i0; }</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK		0x0000001f</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) &amp; A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK	0x000000e0</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT	5</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) &amp; A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK		0x00001f00</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT	8</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) &amp; A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK	0x001f0000</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT	16</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) &amp; A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK	0x00e00000</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT	21</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) &amp; A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK	0x1f000000</div><div class='del'>-#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT	24</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) &amp; A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x0000e152 + 0x7*i0; }</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK			0x000000ff</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) &amp; A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK		0x00000300</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT		8</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) &amp; A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK			0x00001800</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT			11</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) &amp; A5XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK			0x00006000</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT			13</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) &amp; A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_MRT_BUF_INFO_COLOR_SRGB				0x00008000</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_PITCH(uint32_t i0) { return 0x0000e153 + 0x7*i0; }</div><div class='del'>-#define A5XX_RB_MRT_PITCH__MASK					0xffffffff</div><div class='del'>-#define A5XX_RB_MRT_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_MRT_PITCH__SHIFT) &amp; A5XX_RB_MRT_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x0000e154 + 0x7*i0; }</div><div class='del'>-#define A5XX_RB_MRT_ARRAY_PITCH__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_MRT_ARRAY_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_MRT_ARRAY_PITCH__SHIFT) &amp; A5XX_RB_MRT_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_BASE_LO(uint32_t i0) { return 0x0000e155 + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_BASE_HI(uint32_t i0) { return 0x0000e156 + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_RED					0x0000e1a0</div><div class='del'>-#define A5XX_RB_BLEND_RED_UINT__MASK				0x000000ff</div><div class='del'>-#define A5XX_RB_BLEND_RED_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_RED_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_RED_UINT__SHIFT) &amp; A5XX_RB_BLEND_RED_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_RED_SINT__MASK				0x0000ff00</div><div class='del'>-#define A5XX_RB_BLEND_RED_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_RED_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_RED_SINT__SHIFT) &amp; A5XX_RB_BLEND_RED_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_RED_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A5XX_RB_BLEND_RED_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_RED_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A5XX_RB_BLEND_RED_FLOAT__SHIFT) &amp; A5XX_RB_BLEND_RED_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_RED_F32				0x0000e1a1</div><div class='del'>-#define A5XX_RB_BLEND_RED_F32__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_BLEND_RED_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_RED_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_RB_BLEND_RED_F32__SHIFT) &amp; A5XX_RB_BLEND_RED_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_GREEN					0x0000e1a2</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_UINT__MASK				0x000000ff</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_GREEN_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_GREEN_UINT__SHIFT) &amp; A5XX_RB_BLEND_GREEN_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_SINT__MASK				0x0000ff00</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_GREEN_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_GREEN_SINT__SHIFT) &amp; A5XX_RB_BLEND_GREEN_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_FLOAT__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_GREEN_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A5XX_RB_BLEND_GREEN_FLOAT__SHIFT) &amp; A5XX_RB_BLEND_GREEN_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_GREEN_F32				0x0000e1a3</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_F32__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_BLEND_GREEN_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_GREEN_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_RB_BLEND_GREEN_F32__SHIFT) &amp; A5XX_RB_BLEND_GREEN_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_BLUE					0x0000e1a4</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_UINT__MASK				0x000000ff</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_BLUE_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_BLUE_UINT__SHIFT) &amp; A5XX_RB_BLEND_BLUE_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_SINT__MASK				0x0000ff00</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_BLUE_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_BLUE_SINT__SHIFT) &amp; A5XX_RB_BLEND_BLUE_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_FLOAT__SHIFT				16</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_BLUE_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A5XX_RB_BLEND_BLUE_FLOAT__SHIFT) &amp; A5XX_RB_BLEND_BLUE_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_BLUE_F32				0x0000e1a5</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_F32__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_BLEND_BLUE_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_BLUE_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_RB_BLEND_BLUE_F32__SHIFT) &amp; A5XX_RB_BLEND_BLUE_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_ALPHA					0x0000e1a6</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_UINT__MASK				0x000000ff</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_UINT__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_ALPHA_UINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_ALPHA_UINT__SHIFT) &amp; A5XX_RB_BLEND_ALPHA_UINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_SINT__MASK				0x0000ff00</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_SINT__SHIFT				8</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_ALPHA_SINT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_ALPHA_SINT__SHIFT) &amp; A5XX_RB_BLEND_ALPHA_SINT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_FLOAT__MASK				0xffff0000</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_ALPHA_FLOAT(float val)</div><div class='del'>-{</div><div class='del'>-	return ((_mesa_float_to_half(val)) &lt;&lt; A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT) &amp; A5XX_RB_BLEND_ALPHA_FLOAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_ALPHA_F32				0x0000e1a7</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_F32__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_BLEND_ALPHA_F32__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_ALPHA_F32(float val)</div><div class='del'>-{</div><div class='del'>-	return ((fui(val)) &lt;&lt; A5XX_RB_BLEND_ALPHA_F32__SHIFT) &amp; A5XX_RB_BLEND_ALPHA_F32__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_ALPHA_CONTROL				0x0000e1a8</div><div class='del'>-#define A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK			0x000000ff</div><div class='del'>-#define A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) &amp; A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_ALPHA_CONTROL_ALPHA_TEST			0x00000100</div><div class='del'>-#define A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__MASK		0x00000e00</div><div class='del'>-#define A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT		9</div><div class='del'>-static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) &amp; A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLEND_CNTL					0x0000e1a9</div><div class='del'>-#define A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK			0x000000ff</div><div class='del'>-#define A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT) &amp; A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_BLEND_CNTL_INDEPENDENT_BLEND			0x00000100</div><div class='del'>-#define A5XX_RB_BLEND_CNTL_ALPHA_TO_COVERAGE			0x00000400</div><div class='del'>-#define A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK			0xffff0000</div><div class='del'>-#define A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT) &amp; A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_PLANE_CNTL				0x0000e1b0</div><div class='del'>-#define A5XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z			0x00000001</div><div class='del'>-#define A5XX_RB_DEPTH_PLANE_CNTL_UNK1				0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_CNTL					0x0000e1b1</div><div class='del'>-#define A5XX_RB_DEPTH_CNTL_Z_TEST_ENABLE			0x00000001</div><div class='del'>-#define A5XX_RB_DEPTH_CNTL_Z_WRITE_ENABLE			0x00000002</div><div class='del'>-#define A5XX_RB_DEPTH_CNTL_ZFUNC__MASK				0x0000001c</div><div class='del'>-#define A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT				2</div><div class='del'>-static inline uint32_t A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT) &amp; A5XX_RB_DEPTH_CNTL_ZFUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_DEPTH_CNTL_Z_READ_ENABLE			0x00000040</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_BUFFER_INFO				0x0000e1b2</div><div class='del'>-#define A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK		0x00000007</div><div class='del'>-#define A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) &amp; A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_BUFFER_BASE_LO			0x0000e1b3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_BUFFER_BASE_HI			0x0000e1b4</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_BUFFER_PITCH				0x0000e1b5</div><div class='del'>-#define A5XX_RB_DEPTH_BUFFER_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT) &amp; A5XX_RB_DEPTH_BUFFER_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH			0x0000e1b6</div><div class='del'>-#define A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT) &amp; A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCIL_CONTROL				0x0000e1c0</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE			0x00000001</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF		0x00000002</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_STENCIL_READ			0x00000004</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FUNC__MASK			0x00000700</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT			8</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_FUNC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FAIL__MASK			0x00003800</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT			11</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_FAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZPASS__MASK			0x0001c000</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT			14</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_ZPASS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK			0x000e0000</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT			17</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK			0x00700000</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT			20</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK			0x03800000</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT			23</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK			0x1c000000</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT			26</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK			0xe0000000</div><div class='del'>-#define A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT			29</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) &amp; A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCIL_INFO				0x0000e1c1</div><div class='del'>-#define A5XX_RB_STENCIL_INFO_SEPARATE_STENCIL			0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCIL_BASE_LO				0x0000e1c2</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCIL_BASE_HI				0x0000e1c3</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCIL_PITCH				0x0000e1c4</div><div class='del'>-#define A5XX_RB_STENCIL_PITCH__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_STENCIL_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_STENCIL_PITCH__SHIFT) &amp; A5XX_RB_STENCIL_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCIL_ARRAY_PITCH				0x0000e1c5</div><div class='del'>-#define A5XX_RB_STENCIL_ARRAY_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT) &amp; A5XX_RB_STENCIL_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCILREFMASK				0x0000e1c6</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_STENCILREF__MASK			0x000000ff</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT) &amp; A5XX_RB_STENCILREFMASK_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) &amp; A5XX_RB_STENCILREFMASK_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK		0x00ff0000</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT		16</div><div class='del'>-static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) &amp; A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_STENCILREFMASK_BF				0x0000e1c7</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_BF_STENCILREF__MASK		0x000000ff</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) &amp; A5XX_RB_STENCILREFMASK_BF_STENCILREF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK		0x0000ff00</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT		8</div><div class='del'>-static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) &amp; A5XX_RB_STENCILREFMASK_BF_STENCILMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK	0x00ff0000</div><div class='del'>-#define A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT	16</div><div class='del'>-static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) &amp; A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_WINDOW_OFFSET				0x0000e1d0</div><div class='del'>-#define A5XX_RB_WINDOW_OFFSET_WINDOW_OFFSET_DISABLE		0x80000000</div><div class='del'>-#define A5XX_RB_WINDOW_OFFSET_X__MASK				0x00007fff</div><div class='del'>-#define A5XX_RB_WINDOW_OFFSET_X__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_WINDOW_OFFSET_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_WINDOW_OFFSET_X__SHIFT) &amp; A5XX_RB_WINDOW_OFFSET_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_WINDOW_OFFSET_Y__MASK				0x7fff0000</div><div class='del'>-#define A5XX_RB_WINDOW_OFFSET_Y__SHIFT				16</div><div class='del'>-static inline uint32_t A5XX_RB_WINDOW_OFFSET_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_WINDOW_OFFSET_Y__SHIFT) &amp; A5XX_RB_WINDOW_OFFSET_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_SAMPLE_COUNT_CONTROL			0x0000e1d1</div><div class='del'>-#define A5XX_RB_SAMPLE_COUNT_CONTROL_COPY			0x00000002</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_CNTL					0x0000e210</div><div class='del'>-#define A5XX_RB_BLIT_CNTL_BUF__MASK				0x0000000f</div><div class='del'>-#define A5XX_RB_BLIT_CNTL_BUF__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_BLIT_CNTL_BUF__SHIFT) &amp; A5XX_RB_BLIT_CNTL_BUF__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RESOLVE_CNTL_1				0x0000e211</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_1_WINDOW_OFFSET_DISABLE		0x80000000</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_1_X__MASK				0x00007fff</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_1_X__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RESOLVE_CNTL_1_X__SHIFT) &amp; A5XX_RB_RESOLVE_CNTL_1_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_1_Y__MASK				0x7fff0000</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT				16</div><div class='del'>-static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT) &amp; A5XX_RB_RESOLVE_CNTL_1_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RESOLVE_CNTL_2				0x0000e212</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_2_WINDOW_OFFSET_DISABLE		0x80000000</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_2_X__MASK				0x00007fff</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_2_X__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RESOLVE_CNTL_2_X__SHIFT) &amp; A5XX_RB_RESOLVE_CNTL_2_X__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_2_Y__MASK				0x7fff0000</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT				16</div><div class='del'>-static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT) &amp; A5XX_RB_RESOLVE_CNTL_2_Y__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_RESOLVE_CNTL_3				0x0000e213</div><div class='del'>-#define A5XX_RB_RESOLVE_CNTL_3_TILED				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_DST_LO					0x0000e214</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_DST_HI					0x0000e215</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_DST_PITCH				0x0000e216</div><div class='del'>-#define A5XX_RB_BLIT_DST_PITCH__MASK				0xffffffff</div><div class='del'>-#define A5XX_RB_BLIT_DST_PITCH__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_RB_BLIT_DST_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_BLIT_DST_PITCH__SHIFT) &amp; A5XX_RB_BLIT_DST_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_DST_ARRAY_PITCH			0x0000e217</div><div class='del'>-#define A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT) &amp; A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CLEAR_COLOR_DW0				0x0000e218</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CLEAR_COLOR_DW1				0x0000e219</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CLEAR_COLOR_DW2				0x0000e21a</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CLEAR_COLOR_DW3				0x0000e21b</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_CLEAR_CNTL					0x0000e21c</div><div class='del'>-#define A5XX_RB_CLEAR_CNTL_FAST_CLEAR				0x00000002</div><div class='del'>-#define A5XX_RB_CLEAR_CNTL_MSAA_RESOLVE				0x00000004</div><div class='del'>-#define A5XX_RB_CLEAR_CNTL_MASK__MASK				0x000000f0</div><div class='del'>-#define A5XX_RB_CLEAR_CNTL_MASK__SHIFT				4</div><div class='del'>-static inline uint32_t A5XX_RB_CLEAR_CNTL_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_RB_CLEAR_CNTL_MASK__SHIFT) &amp; A5XX_RB_CLEAR_CNTL_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO			0x0000e240</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_HI			0x0000e241</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_DEPTH_FLAG_BUFFER_PITCH			0x0000e242</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_MRT_FLAG_BUFFER(i0) (0x0000e243 + 0x4*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_LO(uint32_t i0) { return 0x0000e243 + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_HI(uint32_t i0) { return 0x0000e244 + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x0000e245 + 0x4*i0; }</div><div class='del'>-#define A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT) &amp; A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t i0) { return 0x0000e246 + 0x4*i0; }</div><div class='del'>-#define A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__MASK		0xffffffff</div><div class='del'>-#define A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT) &amp; A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_FLAG_DST_LO				0x0000e263</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_FLAG_DST_HI				0x0000e264</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_FLAG_DST_PITCH				0x0000e265</div><div class='del'>-#define A5XX_RB_BLIT_FLAG_DST_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT) &amp; A5XX_RB_BLIT_FLAG_DST_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH			0x0000e266</div><div class='del'>-#define A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__MASK			0xffffffff</div><div class='del'>-#define A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3f));</div><div class='del'>-	return (((val &gt;&gt; 6)) &lt;&lt; A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT) &amp; A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_SAMPLE_COUNT_ADDR_LO			0x0000e267</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_RB_SAMPLE_COUNT_ADDR_HI			0x0000e268</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_CNTL_0					0x0000e280</div><div class='del'>-#define A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK			0x0000007f</div><div class='del'>-#define A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT) &amp; A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_CNTL_0_VARYING					0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_VARYING_INTERP(i0) (0x0000e282 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x0000e282 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_VARYING_PS_REPL(i0) (0x0000e28a + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000e28a + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UNKNOWN_E292					0x0000e292</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_UNKNOWN_E293					0x0000e293</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_VAR(i0) (0x0000e294 + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x0000e294 + 0x1*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_GS_SIV_CNTL				0x0000e298</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_CLIP_CNTL					0x0000e29a</div><div class='del'>-#define A5XX_VPC_CLIP_CNTL_CLIP_MASK__MASK			0x000000ff</div><div class='del'>-#define A5XX_VPC_CLIP_CNTL_CLIP_MASK__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VPC_CLIP_CNTL_CLIP_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_CLIP_CNTL_CLIP_MASK__SHIFT) &amp; A5XX_VPC_CLIP_CNTL_CLIP_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC__MASK		0x0000ff00</div><div class='del'>-#define A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC__SHIFT		8</div><div class='del'>-static inline uint32_t A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC__SHIFT) &amp; A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC__MASK		0x00ff0000</div><div class='del'>-#define A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC__SHIFT		16</div><div class='del'>-static inline uint32_t A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC__SHIFT) &amp; A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_PACK					0x0000e29d</div><div class='del'>-#define A5XX_VPC_PACK_NUMNONPOSVAR__MASK			0x000000ff</div><div class='del'>-#define A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT) &amp; A5XX_VPC_PACK_NUMNONPOSVAR__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_PACK_PSIZELOC__MASK				0x0000ff00</div><div class='del'>-#define A5XX_VPC_PACK_PSIZELOC__SHIFT				8</div><div class='del'>-static inline uint32_t A5XX_VPC_PACK_PSIZELOC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_PACK_PSIZELOC__SHIFT) &amp; A5XX_VPC_PACK_PSIZELOC__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_FS_PRIMITIVEID_CNTL			0x0000e2a0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_SO_BUF_CNTL				0x0000e2a1</div><div class='del'>-#define A5XX_VPC_SO_BUF_CNTL_BUF0				0x00000001</div><div class='del'>-#define A5XX_VPC_SO_BUF_CNTL_BUF1				0x00000008</div><div class='del'>-#define A5XX_VPC_SO_BUF_CNTL_BUF2				0x00000040</div><div class='del'>-#define A5XX_VPC_SO_BUF_CNTL_BUF3				0x00000200</div><div class='del'>-#define A5XX_VPC_SO_BUF_CNTL_ENABLE				0x00008000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_SO_OVERRIDE				0x0000e2a2</div><div class='del'>-#define A5XX_VPC_SO_OVERRIDE_SO_DISABLE				0x00000001</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_SO_CNTL					0x0000e2a3</div><div class='del'>-#define A5XX_VPC_SO_CNTL_ENABLE					0x00010000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_SO_PROG					0x0000e2a4</div><div class='del'>-#define A5XX_VPC_SO_PROG_A_BUF__MASK				0x00000003</div><div class='del'>-#define A5XX_VPC_SO_PROG_A_BUF__SHIFT				0</div><div class='del'>-static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_SO_PROG_A_BUF__SHIFT) &amp; A5XX_VPC_SO_PROG_A_BUF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_SO_PROG_A_OFF__MASK				0x000007fc</div><div class='del'>-#define A5XX_VPC_SO_PROG_A_OFF__SHIFT				2</div><div class='del'>-static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3));</div><div class='del'>-	return (((val &gt;&gt; 2)) &lt;&lt; A5XX_VPC_SO_PROG_A_OFF__SHIFT) &amp; A5XX_VPC_SO_PROG_A_OFF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_SO_PROG_A_EN					0x00000800</div><div class='del'>-#define A5XX_VPC_SO_PROG_B_BUF__MASK				0x00003000</div><div class='del'>-#define A5XX_VPC_SO_PROG_B_BUF__SHIFT				12</div><div class='del'>-static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VPC_SO_PROG_B_BUF__SHIFT) &amp; A5XX_VPC_SO_PROG_B_BUF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_SO_PROG_B_OFF__MASK				0x007fc000</div><div class='del'>-#define A5XX_VPC_SO_PROG_B_OFF__SHIFT				14</div><div class='del'>-static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	assert(!(val &amp; 0x3));</div><div class='del'>-	return (((val &gt;&gt; 2)) &lt;&lt; A5XX_VPC_SO_PROG_B_OFF__SHIFT) &amp; A5XX_VPC_SO_PROG_B_OFF__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VPC_SO_PROG_B_EN					0x00800000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VPC_SO(i0) (0x0000e2a7 + 0x7*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_LO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_HI(uint32_t i0) { return 0x0000e2a8 + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000e2a9 + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000e2aa + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000e2ab + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_LO(uint32_t i0) { return 0x0000e2ac + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_HI(uint32_t i0) { return 0x0000e2ad + 0x7*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PRIMITIVE_CNTL				0x0000e384</div><div class='del'>-#define A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__MASK		0x0000007f</div><div class='del'>-#define A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT) &amp; A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_PRIMITIVE_CNTL_PRIMITIVE_RESTART		0x00000100</div><div class='del'>-#define A5XX_PC_PRIMITIVE_CNTL_COUNT_PRIMITIVES			0x00000200</div><div class='del'>-#define A5XX_PC_PRIMITIVE_CNTL_PROVOKING_VTX_LAST		0x00000400</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_PRIM_VTX_CNTL				0x0000e385</div><div class='del'>-#define A5XX_PC_PRIM_VTX_CNTL_PSIZE				0x00000800</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_RASTER_CNTL					0x0000e388</div><div class='del'>-#define A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__MASK		0x00000007</div><div class='del'>-#define A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) &amp; A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__MASK		0x00000038</div><div class='del'>-#define A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT		3</div><div class='del'>-static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT) &amp; A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_RASTER_CNTL_POLYMODE_ENABLE			0x00000040</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_CLIP_CNTL					0x0000e389</div><div class='del'>-#define A5XX_PC_CLIP_CNTL_CLIP_MASK__MASK			0x000000ff</div><div class='del'>-#define A5XX_PC_CLIP_CNTL_CLIP_MASK__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_PC_CLIP_CNTL_CLIP_MASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_CLIP_CNTL_CLIP_MASK__SHIFT) &amp; A5XX_PC_CLIP_CNTL_CLIP_MASK__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_RESTART_INDEX				0x0000e38c</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_GS_LAYERED					0x0000e38d</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_GS_PARAM					0x0000e38e</div><div class='del'>-#define A5XX_PC_GS_PARAM_MAX_VERTICES__MASK			0x000003ff</div><div class='del'>-#define A5XX_PC_GS_PARAM_MAX_VERTICES__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) &amp; A5XX_PC_GS_PARAM_MAX_VERTICES__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_GS_PARAM_INVOCATIONS__MASK			0x0000f800</div><div class='del'>-#define A5XX_PC_GS_PARAM_INVOCATIONS__SHIFT			11</div><div class='del'>-static inline uint32_t A5XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_GS_PARAM_INVOCATIONS__SHIFT) &amp; A5XX_PC_GS_PARAM_INVOCATIONS__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_GS_PARAM_PRIMTYPE__MASK				0x01800000</div><div class='del'>-#define A5XX_PC_GS_PARAM_PRIMTYPE__SHIFT			23</div><div class='del'>-static inline uint32_t A5XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_GS_PARAM_PRIMTYPE__SHIFT) &amp; A5XX_PC_GS_PARAM_PRIMTYPE__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_HS_PARAM					0x0000e38f</div><div class='del'>-#define A5XX_PC_HS_PARAM_VERTICES_OUT__MASK			0x0000003f</div><div class='del'>-#define A5XX_PC_HS_PARAM_VERTICES_OUT__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) &amp; A5XX_PC_HS_PARAM_VERTICES_OUT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_HS_PARAM_SPACING__MASK				0x00600000</div><div class='del'>-#define A5XX_PC_HS_PARAM_SPACING__SHIFT				21</div><div class='del'>-static inline uint32_t A5XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_PC_HS_PARAM_SPACING__SHIFT) &amp; A5XX_PC_HS_PARAM_SPACING__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_PC_HS_PARAM_CW					0x00800000</div><div class='del'>-#define A5XX_PC_HS_PARAM_CONNECTED				0x01000000</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_PC_POWER_CNTL					0x0000e3b0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_CONTROL_0					0x0000e400</div><div class='del'>-#define A5XX_VFD_CONTROL_0_VTXCNT__MASK				0x0000003f</div><div class='del'>-#define A5XX_VFD_CONTROL_0_VTXCNT__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_0_VTXCNT__SHIFT) &amp; A5XX_VFD_CONTROL_0_VTXCNT__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_CONTROL_1					0x0000e401</div><div class='del'>-#define A5XX_VFD_CONTROL_1_REGID4VTX__MASK			0x000000ff</div><div class='del'>-#define A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT) &amp; A5XX_VFD_CONTROL_1_REGID4VTX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_CONTROL_1_REGID4INST__MASK			0x0000ff00</div><div class='del'>-#define A5XX_VFD_CONTROL_1_REGID4INST__SHIFT			8</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_1_REGID4INST__SHIFT) &amp; A5XX_VFD_CONTROL_1_REGID4INST__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_CONTROL_1_REGID4PRIMID__MASK			0x00ff0000</div><div class='del'>-#define A5XX_VFD_CONTROL_1_REGID4PRIMID__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_1_REGID4PRIMID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_1_REGID4PRIMID__SHIFT) &amp; A5XX_VFD_CONTROL_1_REGID4PRIMID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_CONTROL_2					0x0000e402</div><div class='del'>-#define A5XX_VFD_CONTROL_2_REGID_PATCHID__MASK			0x000000ff</div><div class='del'>-#define A5XX_VFD_CONTROL_2_REGID_PATCHID__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_2_REGID_PATCHID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_2_REGID_PATCHID__SHIFT) &amp; A5XX_VFD_CONTROL_2_REGID_PATCHID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_CONTROL_3					0x0000e403</div><div class='del'>-#define A5XX_VFD_CONTROL_3_REGID_PATCHID__MASK			0x0000ff00</div><div class='del'>-#define A5XX_VFD_CONTROL_3_REGID_PATCHID__SHIFT			8</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_3_REGID_PATCHID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_3_REGID_PATCHID__SHIFT) &amp; A5XX_VFD_CONTROL_3_REGID_PATCHID__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_CONTROL_3_REGID_TESSX__MASK			0x00ff0000</div><div class='del'>-#define A5XX_VFD_CONTROL_3_REGID_TESSX__SHIFT			16</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) &amp; A5XX_VFD_CONTROL_3_REGID_TESSX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_CONTROL_3_REGID_TESSY__MASK			0xff000000</div><div class='del'>-#define A5XX_VFD_CONTROL_3_REGID_TESSY__SHIFT			24</div><div class='del'>-static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) &amp; A5XX_VFD_CONTROL_3_REGID_TESSY__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_CONTROL_4					0x0000e404</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_CONTROL_5					0x0000e405</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_INDEX_OFFSET				0x0000e408</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_INSTANCE_START_OFFSET			0x0000e409</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_FETCH(i0) (0x0000e40a + 0x4*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_FETCH_BASE_LO(uint32_t i0) { return 0x0000e40a + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_FETCH_BASE_HI(uint32_t i0) { return 0x0000e40b + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000e40c + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000e40d + 0x4*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_DECODE(i0) (0x0000e48a + 0x2*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000e48a + 0x2*i0; }</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_IDX__MASK				0x0000001f</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_IDX__SHIFT			0</div><div class='del'>-static inline uint32_t A5XX_VFD_DECODE_INSTR_IDX(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_DECODE_INSTR_IDX__SHIFT) &amp; A5XX_VFD_DECODE_INSTR_IDX__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_INSTANCED				0x00020000</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_FORMAT__MASK			0x0ff00000</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT			20</div><div class='del'>-static inline uint32_t A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT) &amp; A5XX_VFD_DECODE_INSTR_FORMAT__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_SWAP__MASK			0x30000000</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_SWAP__SHIFT			28</div><div class='del'>-static inline uint32_t A5XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_DECODE_INSTR_SWAP__SHIFT) &amp; A5XX_VFD_DECODE_INSTR_SWAP__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_UNK30				0x40000000</div><div class='del'>-#define A5XX_VFD_DECODE_INSTR_FLOAT				0x80000000</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000e48b + 0x2*i0; }</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_DEST_CNTL(i0) (0x0000e4ca + 0x1*(i0))</div><div class='del'>-</div><div class='del'>-static inline uint32_t REG_A5XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000e4ca + 0x1*i0; }</div><div class='del'>-#define A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__MASK		0x0000000f</div><div class='del'>-#define A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT		0</div><div class='del'>-static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT) &amp; A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK			0x00000ff0</div><div class='del'>-#define A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT			4</div><div class='del'>-static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT) &amp; A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_VFD_POWER_CNTL					0x0000e4f0</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_SP_CNTL					0x0000e580</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_VS_CONFIG					0x0000e584</div><div class='del'>-#define A5XX_SP_VS_CONFIG_ENABLED				0x00000001</div><div class='del'>-#define A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__MASK		0x000000fe</div><div class='del'>-#define A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT		1</div><div class='del'>-static inline uint32_t A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) &amp; A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__MASK			0x00007f00</div><div class='del'>-#define A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__SHIFT		8</div><div class='del'>-static inline uint32_t A5XX_SP_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__SHIFT) &amp; A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define REG_A5XX_SP_FS_CONFIG					0x0000e585</div><div class='del'>-#define A5XX_SP_FS_CONFIG_ENABLED				0x00000001</div><div class='del'>-#define A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__MASK		0x000000fe</div><div class='del'>-#define A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT		1</div><div class='del'>-static inline uint32_t A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) &amp; A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-#define A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__MASK			0x00007f00</div><div class='del'>-#define A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__SHIFT		8</div><div class='del'>-static inline uint32_t A5XX_SP_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)</div><div class='del'>-{</div><div class='del'>-	return ((val) &lt;&lt; A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__SHIFT) &amp; A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__MASK;</div><div class='del'>-}</div><div class='del'>-